[thirdparty/gcc.git] / gcc / config / sparc / sol2-bi.h

/* Definitions of target machine for GCC, for bi-arch SPARC
   running Solaris 2 using the system assembler and linker.

Copyright (C) 2002, 2003, 2004, 2006, 2007, 2009 Free Software Foundation, Inc.

This file is part of GCC.

GCC is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License as published by the Free
Software Foundation; either version 3, or (at your option) any later
version.

GCC is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or
FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
for more details.

Under Section 7 of GPL version 3, you are granted additional
permissions described in the GCC Runtime Library Exception, version
3.1, as published by the Free Software Foundation.

You should have received a copy of the GNU General Public License and
a copy of the GCC Runtime Library Exception along with this program;
see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
<http://www.gnu.org/licenses/>.  */

/* The default code model used to be CM_MEDANY on Solaris
   but even Sun eventually found it to be quite wasteful
   and changed it to CM_MEDMID in the Studio 9 compiler.  */
#undef SPARC_DEFAULT_CMODEL
#define SPARC_DEFAULT_CMODEL CM_MEDMID

#define AS_SPARC64_FLAG	"-xarch=v9"

#undef ASM_CPU32_DEFAULT_SPEC
#define ASM_CPU32_DEFAULT_SPEC	""
#undef ASM_CPU64_DEFAULT_SPEC
#define ASM_CPU64_DEFAULT_SPEC	AS_SPARC64_FLAG

#if TARGET_CPU_DEFAULT == TARGET_CPU_v9
#undef CPP_CPU64_DEFAULT_SPEC
#define CPP_CPU64_DEFAULT_SPEC ""
#undef ASM_CPU32_DEFAULT_SPEC
#define ASM_CPU32_DEFAULT_SPEC "-xarch=v8plus"
#endif

#if TARGET_CPU_DEFAULT == TARGET_CPU_ultrasparc
#undef CPP_CPU64_DEFAULT_SPEC
#define CPP_CPU64_DEFAULT_SPEC ""
#undef ASM_CPU32_DEFAULT_SPEC
#define ASM_CPU32_DEFAULT_SPEC "-xarch=v8plusa"
#undef ASM_CPU64_DEFAULT_SPEC
#define ASM_CPU64_DEFAULT_SPEC AS_SPARC64_FLAG "a"
#endif

#if TARGET_CPU_DEFAULT == TARGET_CPU_ultrasparc3
#undef CPP_CPU64_DEFAULT_SPEC
#define CPP_CPU64_DEFAULT_SPEC ""
#undef ASM_CPU32_DEFAULT_SPEC
#define ASM_CPU32_DEFAULT_SPEC "-xarch=v8plusb"
#undef ASM_CPU64_DEFAULT_SPEC
#define ASM_CPU64_DEFAULT_SPEC AS_SPARC64_FLAG "b"
#endif

#if TARGET_CPU_DEFAULT == TARGET_CPU_niagara
#undef CPP_CPU64_DEFAULT_SPEC
#define CPP_CPU64_DEFAULT_SPEC ""
#undef ASM_CPU32_DEFAULT_SPEC
#define ASM_CPU32_DEFAULT_SPEC "-xarch=v8plusb"
#undef ASM_CPU64_DEFAULT_SPEC
#define ASM_CPU64_DEFAULT_SPEC AS_SPARC64_FLAG "b"
#endif

#if TARGET_CPU_DEFAULT == TARGET_CPU_niagara2
#undef CPP_CPU64_DEFAULT_SPEC
#define CPP_CPU64_DEFAULT_SPEC ""
#undef ASM_CPU32_DEFAULT_SPEC
#define ASM_CPU32_DEFAULT_SPEC "-xarch=v8plusb"
#undef ASM_CPU64_DEFAULT_SPEC
#define ASM_CPU64_DEFAULT_SPEC AS_SPARC64_FLAG "b"
#endif

#if DEFAULT_ARCH32_P
#define DEF_ARCH32_SPEC(__str) "%{!m64:" __str "}"
#define DEF_ARCH64_SPEC(__str) "%{m64:" __str "}"
#else
#define DEF_ARCH32_SPEC(__str) "%{m32:" __str "}"
#define DEF_ARCH64_SPEC(__str) "%{!m32:" __str "}"
#endif

#undef CPP_CPU_SPEC
#define CPP_CPU_SPEC "\
%{mcypress:} \
%{msparclite|mf930|mf934:-D__sparclite__} \
%{mv8:" DEF_ARCH32_SPEC("-D__sparcv8") "} \
%{msupersparc:-D__supersparc__ " DEF_ARCH32_SPEC("-D__sparcv8") "} \
%{mcpu=sparclet|mcpu=tsc701:-D__sparclet__} \
%{mcpu=sparclite|mcpu-f930|mcpu=f934:-D__sparclite__} \
%{mcpu=v8:" DEF_ARCH32_SPEC("-D__sparcv8") "} \
%{mcpu=supersparc:-D__supersparc__ " DEF_ARCH32_SPEC("-D__sparcv8") "} \
%{mcpu=v9|mcpu=ultrasparc|mcpu=ultrasparc3|mcpu=niagara|mcpu=niagara2:" DEF_ARCH32_SPEC("-D__sparcv8") "} \
%{!mcpu*:%{!mcypress:%{!msparclite:%{!mf930:%{!mf934:%{!mv8:%{!msupersparc:%(cpp_cpu_default)}}}}}}} \
"

#undef ASM_CPU_SPEC
#define ASM_CPU_SPEC "\
%{mcpu=v9:" DEF_ARCH32_SPEC("-xarch=v8plus") DEF_ARCH64_SPEC(AS_SPARC64_FLAG) "} \
%{mcpu=ultrasparc:" DEF_ARCH32_SPEC("-xarch=v8plusa") DEF_ARCH64_SPEC(AS_SPARC64_FLAG "a") "} \
%{mcpu=ultrasparc3:" DEF_ARCH32_SPEC("-xarch=v8plusb") DEF_ARCH64_SPEC(AS_SPARC64_FLAG "b") "} \
%{mcpu=niagara:" DEF_ARCH32_SPEC("-xarch=v8plusb") DEF_ARCH64_SPEC(AS_SPARC64_FLAG "b") "} \
%{mcpu=niagara2:" DEF_ARCH32_SPEC("-xarch=v8plusb") DEF_ARCH64_SPEC(AS_SPARC64_FLAG "b") "} \
%{!mcpu=niagara2:%{!mcpu=niagara:%{!mcpu=ultrasparc3:%{!mcpu=ultrasparc:%{!mcpu=v9:%{mcpu*:" DEF_ARCH32_SPEC("-xarch=v8") DEF_ARCH64_SPEC(AS_SPARC64_FLAG) "}}}}}} \
%{!mcpu*:%(asm_cpu_default)} \
"

#undef CPP_CPU_DEFAULT_SPEC
#define CPP_CPU_DEFAULT_SPEC \
(DEFAULT_ARCH32_P ? "\
%{m64:" CPP_CPU64_DEFAULT_SPEC "} \
%{!m64:" CPP_CPU32_DEFAULT_SPEC "} \
" : "\
%{m32:" CPP_CPU32_DEFAULT_SPEC "} \
%{!m32:" CPP_CPU64_DEFAULT_SPEC "} \
")

#undef ASM_CPU_DEFAULT_SPEC
#define ASM_CPU_DEFAULT_SPEC \
(DEFAULT_ARCH32_P ? "\
%{m64:" ASM_CPU64_DEFAULT_SPEC "} \
%{!m64:" ASM_CPU32_DEFAULT_SPEC "} \
" : "\
%{m32:" ASM_CPU32_DEFAULT_SPEC "} \
%{!m32:" ASM_CPU64_DEFAULT_SPEC "} \
")

/* wchar_t is called differently in <wchar.h> for 32 and 64-bit
   compilations.  This is called for by SCD 2.4.1, p. 6-83, Figure 6-65
   (32-bit) and p. 6P-10, Figure 6.38 (64-bit).  */

#undef WCHAR_TYPE
#define WCHAR_TYPE (TARGET_ARCH64 ? "int" : "long int")

#undef WCHAR_TYPE_SIZE
#define WCHAR_TYPE_SIZE 32

/* Same for wint_t.  See SCD 2.4.1, p. 6-83, Figure 6-66 (32-bit).  There's
   no corresponding 64-bit definition, but this is what Solaris 8
   <iso/wchar_iso.h> uses.  */

#undef WINT_TYPE
#define WINT_TYPE (TARGET_ARCH64 ? "int" : "long int")

#undef WINT_TYPE_SIZE
#define WINT_TYPE_SIZE 32

#undef CPP_ARCH32_SPEC
#define CPP_ARCH32_SPEC ""
#undef CPP_ARCH64_SPEC
#define CPP_ARCH64_SPEC "-D__arch64__ -D__sparcv9"

#undef CPP_ARCH_SPEC
#define CPP_ARCH_SPEC "\
%{m32:%(cpp_arch32)} \
%{m64:%(cpp_arch64)} \
%{!m32:%{!m64:%(cpp_arch_default)}} \
"

#undef ASM_ARCH_SPEC
#define ASM_ARCH_SPEC ""

#undef ASM_ARCH32_SPEC
#define ASM_ARCH32_SPEC ""

#undef ASM_ARCH64_SPEC
#define ASM_ARCH64_SPEC ""

#undef ASM_ARCH_DEFAULT_SPEC
#define ASM_ARCH_DEFAULT_SPEC ""

#undef SUBTARGET_EXTRA_SPECS
#define SUBTARGET_EXTRA_SPECS \
  { "startfile_arch",	 STARTFILE_ARCH_SPEC },		  \
  { "link_arch32",       LINK_ARCH32_SPEC },              \
  { "link_arch64",       LINK_ARCH64_SPEC },              \
  { "link_arch_default", LINK_ARCH_DEFAULT_SPEC },	  \
  { "link_arch",	 LINK_ARCH_SPEC },
    
/*
 * This should be the same as in sol2.h, except with "/sparcv9"
 * appended to the paths and /usr/ccs/lib is no longer necessary
 */
#define LINK_ARCH64_SPEC_BASE \
  "%{mcmodel=medlow:-M /usr/lib/ld/sparcv9/map.below4G} \
   %{G:-G} \
   %{YP,*} \
   %{R*} \
   %{compat-bsd: \
     %{!YP,*:%{p|pg:-Y P,%R/usr/ucblib/sparcv9:%R/usr/lib/libp/sparcv9:%R/usr/lib/sparcv9} \
       %{!p:%{!pg:-Y P,%R/usr/ucblib/sparcv9:%R/usr/lib/sparcv9}}} \
     -R %R/usr/ucblib/sparcv9} \
   %{!compat-bsd: \
     %{!YP,*:%{p|pg:-Y P,%R/usr/lib/libp/sparcv9:%R/usr/lib/sparcv9} \
       %{!p:%{!pg:-Y P,%R/usr/lib/sparcv9}}}}"

#define LINK_ARCH64_SPEC LINK_ARCH64_SPEC_BASE

#undef LINK_ARCH_SPEC
#if DISABLE_MULTILIB
#if DEFAULT_ARCH32_P
#define LINK_ARCH_SPEC "\
%{m32:%(link_arch32)} \
%{m64:%edoes not support multilib} \
%{!m32:%{!m64:%(link_arch_default)}} \
"
#else
#define LINK_ARCH_SPEC "\
%{m32:%edoes not support multilib} \
%{m64:%(link_arch64)} \
%{!m32:%{!m64:%(link_arch_default)}} \
"
#endif
#else
#define LINK_ARCH_SPEC "\
%{m32:%(link_arch32)} \
%{m64:%(link_arch64)} \
%{!m32:%{!m64:%(link_arch_default)}} \
"
#endif

#define LINK_ARCH_DEFAULT_SPEC \
(DEFAULT_ARCH32_P ? LINK_ARCH32_SPEC : LINK_ARCH64_SPEC)

#undef	CC1_SPEC
#if DEFAULT_ARCH32_P
#define CC1_SPEC "\
%{sun4:} %{target:} \
%{mcypress:-mcpu=cypress} \
%{msparclite:-mcpu=sparclite} %{mf930:-mcpu=f930} %{mf934:-mcpu=f934} \
%{mv8:-mcpu=v8} %{msupersparc:-mcpu=supersparc} \
%{m32:%{m64:%emay not use both -m32 and -m64}} \
%{m64:-mptr64 -mstack-bias -mno-v8plus \
  %{!mcpu*:%{!mcypress:%{!msparclite:%{!mf930:%{!mf934:%{!mv8*:%{!msupersparc:-mcpu=v9}}}}}}}} \
"
#else
#define CC1_SPEC "\
%{sun4:} %{target:} \
%{mcypress:-mcpu=cypress} \
%{msparclite:-mcpu=sparclite} %{mf930:-mcpu=f930} %{mf934:-mcpu=f934} \
%{mv8:-mcpu=v8} %{msupersparc:-mcpu=supersparc} \
%{m32:%{m64:%emay not use both -m32 and -m64}} \
%{m32:-mptr32 -mno-stack-bias \
  %{!mcpu*:%{!mcypress:%{!msparclite:%{!mf930:%{!mf934:%{!mv8*:%{!msupersparc:-mcpu=cypress}}}}}}}} \
%{mv8plus:-m32 -mptr32 -mno-stack-bias \
  %{!mcpu*:%{!mcypress:%{!msparclite:%{!mf930:%{!mf934:%{!mv8:%{!msupersparc:-mcpu=v9}}}}}}}} \
"
#endif

/* Support for a compile-time default CPU, et cetera.  The rules are:
   --with-cpu is ignored if -mcpu is specified.
   --with-tune is ignored if -mtune is specified.
   --with-float is ignored if -mhard-float, -msoft-float, -mfpu, or -mno-fpu
     are specified.
   In the SPARC_BI_ARCH compiler we cannot pass %{!mcpu=*:-mcpu=%(VALUE)}
   here, otherwise say -mcpu=v7 would be passed even when -m64.
   CC1_SPEC above takes care of this instead.  */
#undef OPTION_DEFAULT_SPECS
#if DEFAULT_ARCH32_P
#define OPTION_DEFAULT_SPECS \
  {"cpu", "%{!m64:%{!mcpu=*:-mcpu=%(VALUE)}}" }, \
  {"tune", "%{!mtune=*:-mtune=%(VALUE)}" }, \
  {"float", "%{!msoft-float:%{!mhard-float:%{!fpu:%{!no-fpu:-m%(VALUE)-float}}}}" }
#else
#define OPTION_DEFAULT_SPECS \
  {"cpu", "%{!m32:%{!mcpu=*:-mcpu=%(VALUE)}}" }, \
  {"tune", "%{!mtune=*:-mtune=%(VALUE)}" }, \
  {"float", "%{!msoft-float:%{!mhard-float:%{!fpu:%{!no-fpu:-m%(VALUE)-float}}}}" }
#endif

#if DEFAULT_ARCH32_P
#define MULTILIB_DEFAULTS { "m32" }
#else
#define MULTILIB_DEFAULTS { "m64" }
#endif
Commit	Line	Data
aea155fd	1	/* Definitions of target machine for GCC, for bi-arch SPARC
7dfbd804	2	running Solaris 2 using the system assembler and linker.
	3
	4	Copyright (C) 2002, 2003, 2004, 2006, 2007, 2009 Free Software Foundation, Inc.
	5
	6	This file is part of GCC.
	7
	8	GCC is free software; you can redistribute it and/or modify it under
	9	the terms of the GNU General Public License as published by the Free
	10	Software Foundation; either version 3, or (at your option) any later
	11	version.
	12
	13	GCC is distributed in the hope that it will be useful, but WITHOUT ANY
	14	WARRANTY; without even the implied warranty of MERCHANTABILITY or
	15	FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
	16	for more details.
	17
	18	Under Section 7 of GPL version 3, you are granted additional
	19	permissions described in the GCC Runtime Library Exception, version
	20	3.1, as published by the Free Software Foundation.
	21
	22	You should have received a copy of the GNU General Public License and
	23	a copy of the GCC Runtime Library Exception along with this program;
	24	see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
	25	<http://www.gnu.org/licenses/>. */
5c5060a1	26
18404dab	27	/* The default code model used to be CM_MEDANY on Solaris
	28	but even Sun eventually found it to be quite wasteful
	29	and changed it to CM_MEDMID in the Studio 9 compiler. */
5c5060a1	30	#undef SPARC_DEFAULT_CMODEL
18404dab	31	#define SPARC_DEFAULT_CMODEL CM_MEDMID
5c5060a1	32
b25d9808	33	#define AS_SPARC64_FLAG "-xarch=v9"
b25d9808	34
447b4bf2	35	#undef ASM_CPU32_DEFAULT_SPEC
	36	#define ASM_CPU32_DEFAULT_SPEC ""
	37	#undef ASM_CPU64_DEFAULT_SPEC
7ac84b8a	38	#define ASM_CPU64_DEFAULT_SPEC AS_SPARC64_FLAG
447b4bf2	39
5c5060a1	40	#if TARGET_CPU_DEFAULT == TARGET_CPU_v9
447b4bf2	41	#undef CPP_CPU64_DEFAULT_SPEC
	42	#define CPP_CPU64_DEFAULT_SPEC ""
	43	#undef ASM_CPU32_DEFAULT_SPEC
	44	#define ASM_CPU32_DEFAULT_SPEC "-xarch=v8plus"
5c5060a1	45	#endif
b97ba337	46
5c5060a1	47	#if TARGET_CPU_DEFAULT == TARGET_CPU_ultrasparc
447b4bf2	48	#undef CPP_CPU64_DEFAULT_SPEC
	49	#define CPP_CPU64_DEFAULT_SPEC ""
	50	#undef ASM_CPU32_DEFAULT_SPEC
	51	#define ASM_CPU32_DEFAULT_SPEC "-xarch=v8plusa"
	52	#undef ASM_CPU64_DEFAULT_SPEC
7ac84b8a	53	#define ASM_CPU64_DEFAULT_SPEC AS_SPARC64_FLAG "a"
447b4bf2	54	#endif
447b4bf2	55
b97ba337	56	#if TARGET_CPU_DEFAULT == TARGET_CPU_ultrasparc3
	57	#undef CPP_CPU64_DEFAULT_SPEC
	58	#define CPP_CPU64_DEFAULT_SPEC ""
	59	#undef ASM_CPU32_DEFAULT_SPEC
	60	#define ASM_CPU32_DEFAULT_SPEC "-xarch=v8plusb"
	61	#undef ASM_CPU64_DEFAULT_SPEC
	62	#define ASM_CPU64_DEFAULT_SPEC AS_SPARC64_FLAG "b"
	63	#endif
	64
6dbce0cb	65	#if TARGET_CPU_DEFAULT == TARGET_CPU_niagara
	66	#undef CPP_CPU64_DEFAULT_SPEC
	67	#define CPP_CPU64_DEFAULT_SPEC ""
	68	#undef ASM_CPU32_DEFAULT_SPEC
	69	#define ASM_CPU32_DEFAULT_SPEC "-xarch=v8plusb"
	70	#undef ASM_CPU64_DEFAULT_SPEC
	71	#define ASM_CPU64_DEFAULT_SPEC AS_SPARC64_FLAG "b"
	72	#endif
	73
d6ecc3a3	74	#if TARGET_CPU_DEFAULT == TARGET_CPU_niagara2
	75	#undef CPP_CPU64_DEFAULT_SPEC
	76	#define CPP_CPU64_DEFAULT_SPEC ""
	77	#undef ASM_CPU32_DEFAULT_SPEC
	78	#define ASM_CPU32_DEFAULT_SPEC "-xarch=v8plusb"
	79	#undef ASM_CPU64_DEFAULT_SPEC
	80	#define ASM_CPU64_DEFAULT_SPEC AS_SPARC64_FLAG "b"
	81	#endif
	82
447b4bf2	83	#if DEFAULT_ARCH32_P
447b4bf2	84	#define DEF_ARCH32_SPEC(__str) "%{!m64:" __str "}"
7ac84b8a	85	#define DEF_ARCH64_SPEC(__str) "%{m64:" __str "}"
447b4bf2	86	#else
447b4bf2	87	#define DEF_ARCH32_SPEC(__str) "%{m32:" __str "}"
7ac84b8a	88	#define DEF_ARCH64_SPEC(__str) "%{!m32:" __str "}"
447b4bf2	89	#endif
447b4bf2	90
5c5060a1	91	#undef CPP_CPU_SPEC
	92	#define CPP_CPU_SPEC "\
	93	%{mcypress:} \
0307caef	94	%{msparclite\|mf930\|mf934:-D__sparclite__} \
447b4bf2	95	%{mv8:" DEF_ARCH32_SPEC("-D__sparcv8") "} \
447b4bf2	96	%{msupersparc:-D__supersparc__ " DEF_ARCH32_SPEC("-D__sparcv8") "} \
0307caef	97	%{mcpu=sparclet\|mcpu=tsc701:-D__sparclet__} \
0307caef	98	%{mcpu=sparclite\|mcpu-f930\|mcpu=f934:-D__sparclite__} \
447b4bf2	99	%{mcpu=v8:" DEF_ARCH32_SPEC("-D__sparcv8") "} \
447b4bf2	100	%{mcpu=supersparc:-D__supersparc__ " DEF_ARCH32_SPEC("-D__sparcv8") "} \
d6ecc3a3	101	%{mcpu=v9\|mcpu=ultrasparc\|mcpu=ultrasparc3\|mcpu=niagara\|mcpu=niagara2:" DEF_ARCH32_SPEC("-D__sparcv8") "} \
5c5060a1	102	%{!mcpu*:%{!mcypress:%{!msparclite:%{!mf930:%{!mf934:%{!mv8:%{!msupersparc:%(cpp_cpu_default)}}}}}}} \
5c5060a1	103	"
5c5060a1	104
5c5060a1	105	#undef ASM_CPU_SPEC
e67d9290	106	#define ASM_CPU_SPEC "\
0569c094	107	%{mcpu=v9:" DEF_ARCH32_SPEC("-xarch=v8plus") DEF_ARCH64_SPEC(AS_SPARC64_FLAG) "} \
b97ba337	108	%{mcpu=ultrasparc:" DEF_ARCH32_SPEC("-xarch=v8plusa") DEF_ARCH64_SPEC(AS_SPARC64_FLAG "a") "} \
b97ba337	109	%{mcpu=ultrasparc3:" DEF_ARCH32_SPEC("-xarch=v8plusb") DEF_ARCH64_SPEC(AS_SPARC64_FLAG "b") "} \
6dbce0cb	110	%{mcpu=niagara:" DEF_ARCH32_SPEC("-xarch=v8plusb") DEF_ARCH64_SPEC(AS_SPARC64_FLAG "b") "} \
d6ecc3a3	111	%{mcpu=niagara2:" DEF_ARCH32_SPEC("-xarch=v8plusb") DEF_ARCH64_SPEC(AS_SPARC64_FLAG "b") "} \
d6ecc3a3	112	%{!mcpu=niagara2:%{!mcpu=niagara:%{!mcpu=ultrasparc3:%{!mcpu=ultrasparc:%{!mcpu=v9:%{mcpu*:" DEF_ARCH32_SPEC("-xarch=v8") DEF_ARCH64_SPEC(AS_SPARC64_FLAG) "}}}}}} \
5c5060a1	113	%{!mcpu*:%(asm_cpu_default)} \
	114	"
	115
447b4bf2	116	#undef CPP_CPU_DEFAULT_SPEC
	117	#define CPP_CPU_DEFAULT_SPEC \
	118	(DEFAULT_ARCH32_P ? "\
	119	%{m64:" CPP_CPU64_DEFAULT_SPEC "} \
	120	%{!m64:" CPP_CPU32_DEFAULT_SPEC "} \
	121	" : "\
	122	%{m32:" CPP_CPU32_DEFAULT_SPEC "} \
	123	%{!m32:" CPP_CPU64_DEFAULT_SPEC "} \
	124	")
	125
	126	#undef ASM_CPU_DEFAULT_SPEC
	127	#define ASM_CPU_DEFAULT_SPEC \
	128	(DEFAULT_ARCH32_P ? "\
	129	%{m64:" ASM_CPU64_DEFAULT_SPEC "} \
	130	%{!m64:" ASM_CPU32_DEFAULT_SPEC "} \
	131	" : "\
	132	%{m32:" ASM_CPU32_DEFAULT_SPEC "} \
	133	%{!m32:" ASM_CPU64_DEFAULT_SPEC "} \
	134	")
	135
bd015b4a	136	/* wchar_t is called differently in <wchar.h> for 32 and 64-bit
	137	compilations. This is called for by SCD 2.4.1, p. 6-83, Figure 6-65
	138	(32-bit) and p. 6P-10, Figure 6.38 (64-bit). */
bd015b4a	139
	140	#undef WCHAR_TYPE
	141	#define WCHAR_TYPE (TARGET_ARCH64 ? "int" : "long int")
	142
	143	#undef WCHAR_TYPE_SIZE
	144	#define WCHAR_TYPE_SIZE 32
	145
	146	/* Same for wint_t. See SCD 2.4.1, p. 6-83, Figure 6-66 (32-bit). There's
	147	no corresponding 64-bit definition, but this is what Solaris 8
	148	<iso/wchar_iso.h> uses. */
bd015b4a	149
	150	#undef WINT_TYPE
	151	#define WINT_TYPE (TARGET_ARCH64 ? "int" : "long int")
	152
	153	#undef WINT_TYPE_SIZE
	154	#define WINT_TYPE_SIZE 32
	155
447b4bf2	156	#undef CPP_ARCH32_SPEC
06585cbc	157	#define CPP_ARCH32_SPEC ""
447b4bf2	158	#undef CPP_ARCH64_SPEC
06585cbc	159	#define CPP_ARCH64_SPEC "-D__arch64__ -D__sparcv9"
447b4bf2	160
	161	#undef CPP_ARCH_SPEC
	162	#define CPP_ARCH_SPEC "\
	163	%{m32:%(cpp_arch32)} \
	164	%{m64:%(cpp_arch64)} \
	165	%{!m32:%{!m64:%(cpp_arch_default)}} \
	166	"
	167
	168	#undef ASM_ARCH_SPEC
	169	#define ASM_ARCH_SPEC ""
	170
	171	#undef ASM_ARCH32_SPEC
	172	#define ASM_ARCH32_SPEC ""
	173
	174	#undef ASM_ARCH64_SPEC
	175	#define ASM_ARCH64_SPEC ""
	176
	177	#undef ASM_ARCH_DEFAULT_SPEC
	178	#define ASM_ARCH_DEFAULT_SPEC ""
	179
	180	#undef SUBTARGET_EXTRA_SPECS
	181	#define SUBTARGET_EXTRA_SPECS \
0307caef	182	{ "startfile_arch", STARTFILE_ARCH_SPEC }, \
447b4bf2	183	{ "link_arch32", LINK_ARCH32_SPEC }, \
	184	{ "link_arch64", LINK_ARCH64_SPEC }, \
	185	{ "link_arch_default", LINK_ARCH_DEFAULT_SPEC }, \
	186	{ "link_arch", LINK_ARCH_SPEC },
	187
0307caef	188	/*
	189	* This should be the same as in sol2.h, except with "/sparcv9"
	190	* appended to the paths and /usr/ccs/lib is no longer necessary
	191	*/
17962134	192	#define LINK_ARCH64_SPEC_BASE \
447b4bf2	193	"%{mcmodel=medlow:-M /usr/lib/ld/sparcv9/map.below4G} \
	194	%{G:-G} \
	195	%{YP,*} \
	196	%{R*} \
	197	%{compat-bsd: \
f3245e9d	198	%{!YP,*:%{p\|pg:-Y P,%R/usr/ucblib/sparcv9:%R/usr/lib/libp/sparcv9:%R/usr/lib/sparcv9} \
	199	%{!p:%{!pg:-Y P,%R/usr/ucblib/sparcv9:%R/usr/lib/sparcv9}}} \
	200	-R %R/usr/ucblib/sparcv9} \
447b4bf2	201	%{!compat-bsd: \
f3245e9d	202	%{!YP,*:%{p\|pg:-Y P,%R/usr/lib/libp/sparcv9:%R/usr/lib/sparcv9} \
f3245e9d	203	%{!p:%{!pg:-Y P,%R/usr/lib/sparcv9}}}}"
447b4bf2	204
17962134	205	#define LINK_ARCH64_SPEC LINK_ARCH64_SPEC_BASE
17962134	206
0307caef	207	#undef LINK_ARCH_SPEC
0a2326d6	208	#if DISABLE_MULTILIB
0a2326d6	209	#if DEFAULT_ARCH32_P
447b4bf2	210	#define LINK_ARCH_SPEC "\
447b4bf2	211	%{m32:%(link_arch32)} \
0a2326d6	212	%{m64:%edoes not support multilib} \
	213	%{!m32:%{!m64:%(link_arch_default)}} \
	214	"
	215	#else
	216	#define LINK_ARCH_SPEC "\
	217	%{m32:%edoes not support multilib} \
447b4bf2	218	%{m64:%(link_arch64)} \
	219	%{!m32:%{!m64:%(link_arch_default)}} \
	220	"
0a2326d6	221	#endif
	222	#else
	223	#define LINK_ARCH_SPEC "\
	224	%{m32:%(link_arch32)} \
	225	%{m64:%(link_arch64)} \
	226	%{!m32:%{!m64:%(link_arch_default)}} \
	227	"
	228	#endif
447b4bf2	229
	230	#define LINK_ARCH_DEFAULT_SPEC \
	231	(DEFAULT_ARCH32_P ? LINK_ARCH32_SPEC : LINK_ARCH64_SPEC)
	232
447b4bf2	233	#undef CC1_SPEC
	234	#if DEFAULT_ARCH32_P
	235	#define CC1_SPEC "\
	236	%{sun4:} %{target:} \
	237	%{mcypress:-mcpu=cypress} \
	238	%{msparclite:-mcpu=sparclite} %{mf930:-mcpu=f930} %{mf934:-mcpu=f934} \
	239	%{mv8:-mcpu=v8} %{msupersparc:-mcpu=supersparc} \
701753a0	240	%{m32:%{m64:%emay not use both -m32 and -m64}} \
99227eff	241	%{m64:-mptr64 -mstack-bias -mno-v8plus \
99227eff	242	%{!mcpu:%{!mcypress:%{!msparclite:%{!mf930:%{!mf934:%{!mv8:%{!msupersparc:-mcpu=v9}}}}}}}} \
447b4bf2	243	"
	244	#else
	245	#define CC1_SPEC "\
	246	%{sun4:} %{target:} \
	247	%{mcypress:-mcpu=cypress} \
	248	%{msparclite:-mcpu=sparclite} %{mf930:-mcpu=f930} %{mf934:-mcpu=f934} \
	249	%{mv8:-mcpu=v8} %{msupersparc:-mcpu=supersparc} \
701753a0	250	%{m32:%{m64:%emay not use both -m32 and -m64}} \
99227eff	251	%{m32:-mptr32 -mno-stack-bias \
	252	%{!mcpu:%{!mcypress:%{!msparclite:%{!mf930:%{!mf934:%{!mv8:%{!msupersparc:-mcpu=cypress}}}}}}}} \
	253	%{mv8plus:-m32 -mptr32 -mno-stack-bias \
	254	%{!mcpu*:%{!mcypress:%{!msparclite:%{!mf930:%{!mf934:%{!mv8:%{!msupersparc:-mcpu=v9}}}}}}}} \
447b4bf2	255	"
	256	#endif
	257
ffb6ce65	258	/* Support for a compile-time default CPU, et cetera. The rules are:
	259	--with-cpu is ignored if -mcpu is specified.
	260	--with-tune is ignored if -mtune is specified.
	261	--with-float is ignored if -mhard-float, -msoft-float, -mfpu, or -mno-fpu
	262	are specified.
	263	In the SPARC_BI_ARCH compiler we cannot pass %{!mcpu=*:-mcpu=%(VALUE)}
	264	here, otherwise say -mcpu=v7 would be passed even when -m64.
	265	CC1_SPEC above takes care of this instead. */
	266	#undef OPTION_DEFAULT_SPECS
	267	#if DEFAULT_ARCH32_P
	268	#define OPTION_DEFAULT_SPECS \
	269	{"cpu", "%{!m64:%{!mcpu=*:-mcpu=%(VALUE)}}" }, \
	270	{"tune", "%{!mtune=*:-mtune=%(VALUE)}" }, \
	271	{"float", "%{!msoft-float:%{!mhard-float:%{!fpu:%{!no-fpu:-m%(VALUE)-float}}}}" }
	272	#else
	273	#define OPTION_DEFAULT_SPECS \
	274	{"cpu", "%{!m32:%{!mcpu=*:-mcpu=%(VALUE)}}" }, \
	275	{"tune", "%{!mtune=*:-mtune=%(VALUE)}" }, \
	276	{"float", "%{!msoft-float:%{!mhard-float:%{!fpu:%{!no-fpu:-m%(VALUE)-float}}}}" }
	277	#endif
	278
447b4bf2	279	#if DEFAULT_ARCH32_P
	280	#define MULTILIB_DEFAULTS { "m32" }
	281	#else
	282	#define MULTILIB_DEFAULTS { "m64" }
	283	#endif