[thirdparty/gcc.git] / gcc / config / sparc / sol2.h

/* Definitions of target machine for GCC, for SPARC running Solaris 2
   Copyright 1992, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2004, 2005,
   2006, 2007, 2008, 2010, 2011, 2012 Free Software Foundation, Inc.
   Contributed by Ron Guilmette (rfg@netcom.com).
   Additional changes by David V. Henkel-Wallace (gumby@cygnus.com).

This file is part of GCC.

GCC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3, or (at your option)
any later version.

GCC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
GNU General Public License for more details.

You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3.  If not see
<http://www.gnu.org/licenses/>.  */

/* Solaris allows 64-bit out and global registers to be used in 32-bit mode.
   sparc_override_options will disable V8+ if either not generating V9 code
   or generating 64-bit code.  */
#undef TARGET_DEFAULT
#ifdef TARGET_64BIT_DEFAULT
#define TARGET_DEFAULT \
  (MASK_V9 + MASK_64BIT + MASK_PTR64 + MASK_STACK_BIAS + \
   MASK_V8PLUS + MASK_APP_REGS + MASK_FPU + MASK_LONG_DOUBLE_128)
#else
#define TARGET_DEFAULT \
  (MASK_V8PLUS + MASK_APP_REGS + MASK_FPU + MASK_LONG_DOUBLE_128)
#endif

/* The default code model used to be CM_MEDANY on Solaris
   but even Sun eventually found it to be quite wasteful
   and changed it to CM_MEDMID in the Studio 9 compiler.  */
#undef SPARC_DEFAULT_CMODEL
#define SPARC_DEFAULT_CMODEL CM_MEDMID

/* Select a format to encode pointers in exception handling data.  CODE
   is 0 for data, 1 for code labels, 2 for function pointers.  GLOBAL is
   true if the symbol may be affected by dynamic relocations.

   Some Solaris dynamic linkers don't handle unaligned section relative
   relocs properly, so force them to be aligned.  */
#ifndef HAVE_AS_SPARC_UA_PCREL
#define ASM_PREFERRED_EH_DATA_FORMAT(CODE,GLOBAL)		\
  ((flag_pic || GLOBAL) ? DW_EH_PE_aligned : DW_EH_PE_absptr)
#endif

\f

/* Supposedly the same as vanilla sparc svr4, except for the stuff below: */

/* If the assembler supports -xarch=sparc4, we switch to the explicit
   word size selection mechanism available both in GNU as and Sun as,
   for the Niagara4 and above configurations.  */
#ifdef HAVE_AS_SPARC4

#define AS_SPARC32_FLAG ""
#define AS_SPARC64_FLAG ""

#ifndef USE_GAS
#undef ASM_ARCH32_SPEC
#define ASM_ARCH32_SPEC "-m32"
#undef ASM_ARCH64_SPEC
#define ASM_ARCH64_SPEC "-m64"
#endif

/* Both Sun as and GNU as understand -K PIC.  */
#undef ASM_SPEC
#define ASM_SPEC ASM_SPEC_BASE " %(asm_arch)" ASM_PIC_SPEC

#else /* HAVE_AS_SPARC4 */

#define AS_SPARC32_FLAG "-xarch=v8plus"
#define AS_SPARC64_FLAG "-xarch=v9"

#undef AS_NIAGARA4_FLAG
#define AS_NIAGARA4_FLAG AS_NIAGARA3_FLAG

#undef ASM_ARCH32_SPEC
#define ASM_ARCH32_SPEC ""

#undef ASM_ARCH64_SPEC
#define ASM_ARCH64_SPEC ""

#undef ASM_ARCH_DEFAULT_SPEC
#define ASM_ARCH_DEFAULT_SPEC ""

#undef ASM_ARCH_SPEC
#define ASM_ARCH_SPEC ""

/* Both Sun as and GNU as understand -K PIC.  */
#undef ASM_SPEC
#define ASM_SPEC ASM_SPEC_BASE ASM_PIC_SPEC

#endif /* HAVE_AS_SPARC4 */


#undef ASM_CPU32_DEFAULT_SPEC
#define ASM_CPU32_DEFAULT_SPEC	""
#undef ASM_CPU64_DEFAULT_SPEC
#define ASM_CPU64_DEFAULT_SPEC	"-xarch=v9"

#if TARGET_CPU_DEFAULT == TARGET_CPU_v9
#undef CPP_CPU64_DEFAULT_SPEC
#define CPP_CPU64_DEFAULT_SPEC ""
#undef ASM_CPU32_DEFAULT_SPEC
#define ASM_CPU32_DEFAULT_SPEC "-xarch=v8plus"
#undef ASM_CPU_DEFAULT_SPEC
#define ASM_CPU_DEFAULT_SPEC ASM_CPU32_DEFAULT_SPEC
#endif

#if TARGET_CPU_DEFAULT == TARGET_CPU_ultrasparc
#undef CPP_CPU64_DEFAULT_SPEC
#define CPP_CPU64_DEFAULT_SPEC ""
#undef ASM_CPU32_DEFAULT_SPEC
#define ASM_CPU32_DEFAULT_SPEC "-xarch=v8plusa"
#undef ASM_CPU64_DEFAULT_SPEC
#define ASM_CPU64_DEFAULT_SPEC "-xarch=v9a"
#undef ASM_CPU_DEFAULT_SPEC
#define ASM_CPU_DEFAULT_SPEC ASM_CPU32_DEFAULT_SPEC
#endif

#if TARGET_CPU_DEFAULT == TARGET_CPU_ultrasparc3
#undef CPP_CPU64_DEFAULT_SPEC
#define CPP_CPU64_DEFAULT_SPEC ""
#undef ASM_CPU32_DEFAULT_SPEC
#define ASM_CPU32_DEFAULT_SPEC "-xarch=v8plusb"
#undef ASM_CPU64_DEFAULT_SPEC
#define ASM_CPU64_DEFAULT_SPEC "-xarch=v9b"
#undef ASM_CPU_DEFAULT_SPEC
#define ASM_CPU_DEFAULT_SPEC ASM_CPU32_DEFAULT_SPEC
#endif

#if TARGET_CPU_DEFAULT == TARGET_CPU_niagara
#undef CPP_CPU64_DEFAULT_SPEC
#define CPP_CPU64_DEFAULT_SPEC ""
#undef ASM_CPU32_DEFAULT_SPEC
#define ASM_CPU32_DEFAULT_SPEC "-xarch=v8plusb"
#undef ASM_CPU64_DEFAULT_SPEC
#define ASM_CPU64_DEFAULT_SPEC "-xarch=v9b"
#undef ASM_CPU_DEFAULT_SPEC
#define ASM_CPU_DEFAULT_SPEC ASM_CPU32_DEFAULT_SPEC
#endif

#if TARGET_CPU_DEFAULT == TARGET_CPU_niagara2
#undef CPP_CPU64_DEFAULT_SPEC
#define CPP_CPU64_DEFAULT_SPEC ""
#undef ASM_CPU32_DEFAULT_SPEC
#define ASM_CPU32_DEFAULT_SPEC "-xarch=v8plusb"
#undef ASM_CPU64_DEFAULT_SPEC
#define ASM_CPU64_DEFAULT_SPEC "-xarch=v9b"
#undef ASM_CPU_DEFAULT_SPEC
#define ASM_CPU_DEFAULT_SPEC ASM_CPU32_DEFAULT_SPEC
#endif

#if TARGET_CPU_DEFAULT == TARGET_CPU_niagara3
#undef CPP_CPU64_DEFAULT_SPEC
#define CPP_CPU64_DEFAULT_SPEC ""
#undef ASM_CPU32_DEFAULT_SPEC
#define ASM_CPU32_DEFAULT_SPEC "-xarch=v8plus" AS_NIAGARA3_FLAG
#undef ASM_CPU64_DEFAULT_SPEC
#define ASM_CPU64_DEFAULT_SPEC "-xarch=v9" AS_NIAGARA3_FLAG
#undef ASM_CPU_DEFAULT_SPEC
#define ASM_CPU_DEFAULT_SPEC ASM_CPU32_DEFAULT_SPEC
#endif

#if TARGET_CPU_DEFAULT == TARGET_CPU_niagara4
#undef CPP_CPU64_DEFAULT_SPEC
#define CPP_CPU64_DEFAULT_SPEC ""
#undef ASM_CPU32_DEFAULT_SPEC
#define ASM_CPU32_DEFAULT_SPEC AS_SPARC32_FLAG AS_NIAGARA4_FLAG
#undef ASM_CPU64_DEFAULT_SPEC
#define ASM_CPU64_DEFAULT_SPEC AS_SPARC64_FLAG AS_NIAGARA4_FLAG
#undef ASM_CPU_DEFAULT_SPEC
#define ASM_CPU_DEFAULT_SPEC ASM_CPU32_DEFAULT_SPEC
#endif

#undef CPP_CPU_SPEC
#define CPP_CPU_SPEC "\
%{mcpu=sparclet|mcpu=tsc701:-D__sparclet__} \
%{mcpu=sparclite|mcpu-f930|mcpu=f934:-D__sparclite__} \
%{mcpu=v8:" DEF_ARCH32_SPEC("-D__sparcv8") "} \
%{mcpu=supersparc:-D__supersparc__ " DEF_ARCH32_SPEC("-D__sparcv8") "} \
%{mcpu=v9|mcpu=ultrasparc|mcpu=ultrasparc3|mcpu=niagara|mcpu=niagara2|mcpu=niagara3|mcpu=niagara4:" DEF_ARCH32_SPEC("-D__sparcv8") "} \
%{!mcpu*:%(cpp_cpu_default)} \
"

#undef CPP_CPU_DEFAULT_SPEC
#define CPP_CPU_DEFAULT_SPEC \
(DEFAULT_ARCH32_P ? "\
%{m64:" CPP_CPU64_DEFAULT_SPEC "} \
%{!m64:" CPP_CPU32_DEFAULT_SPEC "} \
" : "\
%{m32:" CPP_CPU32_DEFAULT_SPEC "} \
%{!m32:" CPP_CPU64_DEFAULT_SPEC "} \
")

#undef CPP_ARCH32_SPEC
#define CPP_ARCH32_SPEC ""
#undef CPP_ARCH64_SPEC
#define CPP_ARCH64_SPEC "-D__arch64__ -D__sparcv9"

#undef CPP_ARCH_SPEC
#define CPP_ARCH_SPEC "\
%{m32:%(cpp_arch32)} \
%{m64:%(cpp_arch64)} \
%{!m32:%{!m64:%(cpp_arch_default)}} \
"

/* -mcpu=native handling only makes sense with compiler running on
   a SPARC chip.  */
#if defined(__sparc__) && defined(__SVR4)
extern const char *host_detect_local_cpu (int argc, const char **argv);
# define EXTRA_SPEC_FUNCTIONS						\
  { "local_cpu_detect", host_detect_local_cpu },

# define MCPU_MTUNE_NATIVE_SPECS					\
   " %{mcpu=native:%<mcpu=native %:local_cpu_detect(cpu)}"		\
   " %{mtune=native:%<mtune=native %:local_cpu_detect(tune)}"
#else
# define MCPU_MTUNE_NATIVE_SPECS ""
#endif

#define DRIVER_SELF_SPECS MCPU_MTUNE_NATIVE_SPECS

#undef	CC1_SPEC
#if DEFAULT_ARCH32_P
#define CC1_SPEC "\
%{m64:%{m32:%emay not use both -m32 and -m64}} \
%{m64:-mptr64 -mstack-bias -mno-v8plus \
  %{!mcpu*:-%{!mv8plus:mcpu=v9}}} \
"
#else
#define CC1_SPEC "\
%{m32:%{m64:%emay not use both -m32 and -m64}} \
%{m32:-mptr32 -mno-stack-bias \
  %{!mcpu*:%{!mv8plus:-mcpu=v9}}} \
%{mv8plus:-m32 -mptr32 -mno-stack-bias \
  %{!mcpu*:-mcpu=v9}} \
"
#endif

/* Support for a compile-time default CPU, et cetera.  The rules are:
   --with-cpu is ignored if -mcpu is specified.
   --with-tune is ignored if -mtune is specified.
   --with-float is ignored if -mhard-float, -msoft-float, -mfpu, or -mno-fpu
     are specified.
   In the SPARC_BI_ARCH compiler we cannot pass %{!mcpu=*:-mcpu=%(VALUE)}
   here, otherwise say -mcpu=v7 would be passed even when -m64.
   CC1_SPEC above takes care of this instead.  */
#undef OPTION_DEFAULT_SPECS
#if DEFAULT_ARCH32_P
#define OPTION_DEFAULT_SPECS \
  {"cpu", "%{!m64:%{!mcpu=*:-mcpu=%(VALUE)}}" }, \
  {"tune", "%{!mtune=*:-mtune=%(VALUE)}" }, \
  {"float", "%{!msoft-float:%{!mhard-float:%{!mfpu:%{!mno-fpu:-m%(VALUE)-float}}}}" }
#else
#define OPTION_DEFAULT_SPECS \
  {"cpu", "%{!m32:%{!mcpu=*:-mcpu=%(VALUE)}}" }, \
  {"tune", "%{!mtune=*:-mtune=%(VALUE)}" }, \
  {"float", "%{!msoft-float:%{!mhard-float:%{!mfpu:%{!mno-fpu:-m%(VALUE)-float}}}}" }
#endif

#undef ASM_CPU_SPEC
#define ASM_CPU_SPEC "\
%{mcpu=v9:" DEF_ARCH32_SPEC("-xarch=v8plus") DEF_ARCH64_SPEC("-xarch=v9") "} \
%{mcpu=ultrasparc:" DEF_ARCH32_SPEC("-xarch=v8plusa") DEF_ARCH64_SPEC("-xarch=v9a") "} \
%{mcpu=ultrasparc3:" DEF_ARCH32_SPEC("-xarch=v8plusb") DEF_ARCH64_SPEC("-xarch=v9b") "} \
%{mcpu=niagara:" DEF_ARCH32_SPEC("-xarch=v8plusb") DEF_ARCH64_SPEC("-xarch=v9b") "} \
%{mcpu=niagara2:" DEF_ARCH32_SPEC("-xarch=v8plusb") DEF_ARCH64_SPEC("-xarch=v9b") "} \
%{mcpu=niagara3:" DEF_ARCH32_SPEC("-xarch=v8plus" AS_NIAGARA3_FLAG) DEF_ARCH64_SPEC("-xarch=v9" AS_NIAGARA3_FLAG) "} \
%{mcpu=niagara4:" DEF_ARCH32_SPEC(AS_SPARC32_FLAG AS_NIAGARA4_FLAG) DEF_ARCH64_SPEC(AS_SPARC64_FLAG AS_NIAGARA4_FLAG) "} \
%{!mcpu=niagara4:%{!mcpu=niagara3:%{!mcpu=niagara2:%{!mcpu=niagara:%{!mcpu=ultrasparc3:%{!mcpu=ultrasparc:%{!mcpu=v9:%{mcpu*:" DEF_ARCH32_SPEC("-xarch=v8") DEF_ARCH64_SPEC("-xarch=v9") "}}}}}}}} \
%{!mcpu*:%(asm_cpu_default)} \
"

#ifdef USE_GLD
/* Since binutils 2.21, GNU ld supports new *_sol2 emulations to strictly
   follow the Solaris 2 ABI.  Prefer them if present.  */
#ifdef HAVE_LD_SOL2_EMULATION
#define ARCH32_EMULATION "elf32_sparc_sol2"
#define ARCH64_EMULATION "elf64_sparc_sol2"
#else
#define ARCH32_EMULATION "elf32_sparc"
#define ARCH64_EMULATION "elf64_sparc"
#endif
#endif

#define ARCH64_SUBDIR "sparcv9"

#define SUBTARGET_CPU_EXTRA_SPECS

\f

/* Register the Solaris-specific #pragma directives.  */
#define REGISTER_TARGET_PRAGMAS() solaris_register_pragmas ()

#if defined(USE_GAS) && defined(HAVE_AS_TLS)
/* Use GNU extensions to TLS support.  */
#undef TARGET_SUN_TLS
#undef TARGET_GNU_TLS
#define TARGET_SUN_TLS 0
#define TARGET_GNU_TLS 1
#endif

#undef  LOCAL_LABEL_PREFIX
#define LOCAL_LABEL_PREFIX  "."

/* The Solaris 2 assembler uses .skip, not .zero, so put this back.  */
#undef ASM_OUTPUT_SKIP
#define ASM_OUTPUT_SKIP(FILE,SIZE)  \
  fprintf (FILE, "\t.skip %u\n", (int)(SIZE))

/* This is how to store into the string LABEL
   the symbol_ref name of an internal numbered label where
   PREFIX is the class of label and NUM is the number within the class.
   This is suitable for output with `assemble_name'.  */

#undef  ASM_GENERATE_INTERNAL_LABEL
#define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM)	\
  sprintf ((LABEL), "*.L%s%lu", (PREFIX), (unsigned long)(NUM))

/* The native TLS-enabled assembler requires the directive #tls_object
   to be put on objects in TLS sections (as of v7.1).  This is not
   required by GNU as but supported on SPARC.  */
#undef  ASM_DECLARE_OBJECT_NAME
#define ASM_DECLARE_OBJECT_NAME(FILE, NAME, DECL)		\
  do								\
    {								\
      HOST_WIDE_INT size;					\
								\
      if (targetm.have_tls && DECL_THREAD_LOCAL_P (DECL))	\
	ASM_OUTPUT_TYPE_DIRECTIVE (FILE, NAME, "tls_object");	\
      else							\
	ASM_OUTPUT_TYPE_DIRECTIVE (FILE, NAME, "object");	\
								\
      size_directive_output = 0;				\
      if (!flag_inhibit_size_directive				\
	  && (DECL) && DECL_SIZE (DECL))			\
	{							\
	  size_directive_output = 1;				\
	  size = int_size_in_bytes (TREE_TYPE (DECL));		\
	  ASM_OUTPUT_SIZE_DIRECTIVE (FILE, NAME, size);		\
	}							\
								\
      ASM_OUTPUT_LABEL (FILE, NAME);				\
    }								\
  while (0)

/* Output a simple call for .init/.fini.  */
#define ASM_OUTPUT_CALL(FILE, FN)				        \
  do									\
    {									\
      fprintf (FILE, "\tcall\t");					\
      targetm.asm_out.print_operand (FILE, XEXP (DECL_RTL (FN), 0), 0);	\
      fprintf (FILE, "\n\tnop\n");					\
    }									\
  while (0)

#ifndef USE_GAS
/* This is how to output an assembler line that says to advance
   the location counter to a multiple of 2**LOG bytes using the
   NOP instruction as padding.  The filler pattern doesn't work
   with GNU as. */
#define ASM_OUTPUT_ALIGN_WITH_NOP(FILE,LOG)   \
  if ((LOG) != 0)                             \
    fprintf (FILE, "\t.align %d,0x1000000\n", (1<<(LOG)))

/* Use Solaris ELF section syntax with Sun as.  */
#undef TARGET_ASM_NAMED_SECTION
#define TARGET_ASM_NAMED_SECTION sparc_solaris_elf_asm_named_section

/* Sun as requires doublequoted section names on SPARC.  While GNU as
   supports that, too, we prefer the standard variant.  */
#undef SECTION_NAME_FORMAT
#define SECTION_NAME_FORMAT	"\"%s\""
#endif /* !USE_GAS */

/* Undefine this so that attribute((init_priority)) works with GNU ld.  */
#ifdef USE_GLD
#undef CTORS_SECTION_ASM_OP
#undef DTORS_SECTION_ASM_OP
#endif

\f

/* Define for support of TFmode long double.
   SPARC ABI says that long double is 4 words.  */
#define LONG_DOUBLE_TYPE_SIZE 128

/* Solaris's _Qp_* library routine implementation clobbers the output
   memory before the inputs are fully consumed.  */

#undef TARGET_BUGGY_QP_LIB
#define TARGET_BUGGY_QP_LIB	1

#undef SUN_CONVERSION_LIBFUNCS
#define SUN_CONVERSION_LIBFUNCS 1

#undef DITF_CONVERSION_LIBFUNCS
#define DITF_CONVERSION_LIBFUNCS 1

#undef SUN_INTEGER_MULTIPLY_64
#define SUN_INTEGER_MULTIPLY_64 1
Commit	Line	Data
aea155fd	1	/* Definitions of target machine for GCC, for SPARC running Solaris 2
6dbce0cb	2	Copyright 1992, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2004, 2005,
71e45bc2	3	2006, 2007, 2008, 2010, 2011, 2012 Free Software Foundation, Inc.
6c7a614f	4	Contributed by Ron Guilmette (rfg@netcom.com).
2554c338	5	Additional changes by David V. Henkel-Wallace (gumby@cygnus.com).
1ada9a86	6
aea155fd	7	This file is part of GCC.
1ada9a86	8
aea155fd	9	GCC is free software; you can redistribute it and/or modify
1ada9a86	10	it under the terms of the GNU General Public License as published by
038d1e19	11	the Free Software Foundation; either version 3, or (at your option)
1ada9a86	12	any later version.
1ada9a86	13
aea155fd	14	GCC is distributed in the hope that it will be useful,
1ada9a86	15	but WITHOUT ANY WARRANTY; without even the implied warranty of
	16	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	17	GNU General Public License for more details.
	18
	19	You should have received a copy of the GNU General Public License
038d1e19	20	along with GCC; see the file COPYING3. If not see
038d1e19	21	<http://www.gnu.org/licenses/>. */
1ada9a86	22
28b9ad8f	23	/* Solaris allows 64-bit out and global registers to be used in 32-bit mode.
	24	sparc_override_options will disable V8+ if either not generating V9 code
	25	or generating 64-bit code. */
94bbf495	26	#undef TARGET_DEFAULT
	27	#ifdef TARGET_64BIT_DEFAULT
	28	#define TARGET_DEFAULT \
28b9ad8f	29	(MASK_V9 + MASK_64BIT + MASK_PTR64 + MASK_STACK_BIAS + \
28b9ad8f	30	MASK_V8PLUS + MASK_APP_REGS + MASK_FPU + MASK_LONG_DOUBLE_128)
94bbf495	31	#else
28b9ad8f	32	#define TARGET_DEFAULT \
28b9ad8f	33	(MASK_V8PLUS + MASK_APP_REGS + MASK_FPU + MASK_LONG_DOUBLE_128)
94bbf495	34	#endif
c2e7ebeb	35
	36	/* The default code model used to be CM_MEDANY on Solaris
	37	but even Sun eventually found it to be quite wasteful
	38	and changed it to CM_MEDMID in the Studio 9 compiler. */
	39	#undef SPARC_DEFAULT_CMODEL
	40	#define SPARC_DEFAULT_CMODEL CM_MEDMID
	41
	42	/* Select a format to encode pointers in exception handling data. CODE
	43	is 0 for data, 1 for code labels, 2 for function pointers. GLOBAL is
	44	true if the symbol may be affected by dynamic relocations.
	45
	46	Some Solaris dynamic linkers don't handle unaligned section relative
	47	relocs properly, so force them to be aligned. */
	48	#ifndef HAVE_AS_SPARC_UA_PCREL
	49	#define ASM_PREFERRED_EH_DATA_FORMAT(CODE,GLOBAL) \
	50	((flag_pic \|\| GLOBAL) ? DW_EH_PE_aligned : DW_EH_PE_absptr)
	51	#endif
	52
	53	\f
	54
e3225e4c	55	/* Supposedly the same as vanilla sparc svr4, except for the stuff below: */
1ada9a86	56
6c940e8d	57	/* If the assembler supports -xarch=sparc4, we switch to the explicit
	58	word size selection mechanism available both in GNU as and Sun as,
	59	for the Niagara4 and above configurations. */
	60	#ifdef HAVE_AS_SPARC4
	61
	62	#define AS_SPARC32_FLAG ""
	63	#define AS_SPARC64_FLAG ""
1711184f	64
c2e7ebeb	65	#ifndef USE_GAS
6c940e8d	66	#undef ASM_ARCH32_SPEC
	67	#define ASM_ARCH32_SPEC "-m32"
	68	#undef ASM_ARCH64_SPEC
	69	#define ASM_ARCH64_SPEC "-m64"
c2e7ebeb	70	#endif
c2e7ebeb	71
6c940e8d	72	/* Both Sun as and GNU as understand -K PIC. */
	73	#undef ASM_SPEC
	74	#define ASM_SPEC ASM_SPEC_BASE " %(asm_arch)" ASM_PIC_SPEC
	75
	76	#else /* HAVE_AS_SPARC4 */
	77
	78	#define AS_SPARC32_FLAG "-xarch=v8plus"
	79	#define AS_SPARC64_FLAG "-xarch=v9"
	80
	81	#undef AS_NIAGARA4_FLAG
	82	#define AS_NIAGARA4_FLAG AS_NIAGARA3_FLAG
	83
	84	#undef ASM_ARCH32_SPEC
	85	#define ASM_ARCH32_SPEC ""
	86
	87	#undef ASM_ARCH64_SPEC
	88	#define ASM_ARCH64_SPEC ""
	89
	90	#undef ASM_ARCH_DEFAULT_SPEC
	91	#define ASM_ARCH_DEFAULT_SPEC ""
	92
	93	#undef ASM_ARCH_SPEC
	94	#define ASM_ARCH_SPEC ""
	95
	96	/* Both Sun as and GNU as understand -K PIC. */
	97	#undef ASM_SPEC
	98	#define ASM_SPEC ASM_SPEC_BASE ASM_PIC_SPEC
	99
	100	#endif /* HAVE_AS_SPARC4 */
	101
	102
c2e7ebeb	103	#undef ASM_CPU32_DEFAULT_SPEC
	104	#define ASM_CPU32_DEFAULT_SPEC ""
	105	#undef ASM_CPU64_DEFAULT_SPEC
6c940e8d	106	#define ASM_CPU64_DEFAULT_SPEC "-xarch=v9"
c2e7ebeb	107
adf09a2f	108	#if TARGET_CPU_DEFAULT == TARGET_CPU_v9
c2e7ebeb	109	#undef CPP_CPU64_DEFAULT_SPEC
	110	#define CPP_CPU64_DEFAULT_SPEC ""
	111	#undef ASM_CPU32_DEFAULT_SPEC
	112	#define ASM_CPU32_DEFAULT_SPEC "-xarch=v8plus"
adf09a2f	113	#undef ASM_CPU_DEFAULT_SPEC
c2e7ebeb	114	#define ASM_CPU_DEFAULT_SPEC ASM_CPU32_DEFAULT_SPEC
adf09a2f	115	#endif
1711184f	116
adf09a2f	117	#if TARGET_CPU_DEFAULT == TARGET_CPU_ultrasparc
c2e7ebeb	118	#undef CPP_CPU64_DEFAULT_SPEC
	119	#define CPP_CPU64_DEFAULT_SPEC ""
	120	#undef ASM_CPU32_DEFAULT_SPEC
	121	#define ASM_CPU32_DEFAULT_SPEC "-xarch=v8plusa"
	122	#undef ASM_CPU64_DEFAULT_SPEC
6c940e8d	123	#define ASM_CPU64_DEFAULT_SPEC "-xarch=v9a"
adf09a2f	124	#undef ASM_CPU_DEFAULT_SPEC
c2e7ebeb	125	#define ASM_CPU_DEFAULT_SPEC ASM_CPU32_DEFAULT_SPEC
91eaedd6	126	#endif
1711184f	127
b97ba337	128	#if TARGET_CPU_DEFAULT == TARGET_CPU_ultrasparc3
c2e7ebeb	129	#undef CPP_CPU64_DEFAULT_SPEC
	130	#define CPP_CPU64_DEFAULT_SPEC ""
	131	#undef ASM_CPU32_DEFAULT_SPEC
	132	#define ASM_CPU32_DEFAULT_SPEC "-xarch=v8plusb"
	133	#undef ASM_CPU64_DEFAULT_SPEC
6c940e8d	134	#define ASM_CPU64_DEFAULT_SPEC "-xarch=v9b"
b97ba337	135	#undef ASM_CPU_DEFAULT_SPEC
c2e7ebeb	136	#define ASM_CPU_DEFAULT_SPEC ASM_CPU32_DEFAULT_SPEC
b97ba337	137	#endif
b97ba337	138
6dbce0cb	139	#if TARGET_CPU_DEFAULT == TARGET_CPU_niagara
c2e7ebeb	140	#undef CPP_CPU64_DEFAULT_SPEC
	141	#define CPP_CPU64_DEFAULT_SPEC ""
	142	#undef ASM_CPU32_DEFAULT_SPEC
	143	#define ASM_CPU32_DEFAULT_SPEC "-xarch=v8plusb"
	144	#undef ASM_CPU64_DEFAULT_SPEC
6c940e8d	145	#define ASM_CPU64_DEFAULT_SPEC "-xarch=v9b"
6dbce0cb	146	#undef ASM_CPU_DEFAULT_SPEC
c2e7ebeb	147	#define ASM_CPU_DEFAULT_SPEC ASM_CPU32_DEFAULT_SPEC
6dbce0cb	148	#endif
6dbce0cb	149
d6ecc3a3	150	#if TARGET_CPU_DEFAULT == TARGET_CPU_niagara2
c2e7ebeb	151	#undef CPP_CPU64_DEFAULT_SPEC
	152	#define CPP_CPU64_DEFAULT_SPEC ""
	153	#undef ASM_CPU32_DEFAULT_SPEC
	154	#define ASM_CPU32_DEFAULT_SPEC "-xarch=v8plusb"
	155	#undef ASM_CPU64_DEFAULT_SPEC
6c940e8d	156	#define ASM_CPU64_DEFAULT_SPEC "-xarch=v9b"
d6ecc3a3	157	#undef ASM_CPU_DEFAULT_SPEC
c2e7ebeb	158	#define ASM_CPU_DEFAULT_SPEC ASM_CPU32_DEFAULT_SPEC
	159	#endif
	160
3407e51d	161	#if TARGET_CPU_DEFAULT == TARGET_CPU_niagara3
	162	#undef CPP_CPU64_DEFAULT_SPEC
	163	#define CPP_CPU64_DEFAULT_SPEC ""
	164	#undef ASM_CPU32_DEFAULT_SPEC
0468cf8f	165	#define ASM_CPU32_DEFAULT_SPEC "-xarch=v8plus" AS_NIAGARA3_FLAG
3407e51d	166	#undef ASM_CPU64_DEFAULT_SPEC
6c940e8d	167	#define ASM_CPU64_DEFAULT_SPEC "-xarch=v9" AS_NIAGARA3_FLAG
3407e51d	168	#undef ASM_CPU_DEFAULT_SPEC
	169	#define ASM_CPU_DEFAULT_SPEC ASM_CPU32_DEFAULT_SPEC
	170	#endif
	171
	172	#if TARGET_CPU_DEFAULT == TARGET_CPU_niagara4
	173	#undef CPP_CPU64_DEFAULT_SPEC
	174	#define CPP_CPU64_DEFAULT_SPEC ""
	175	#undef ASM_CPU32_DEFAULT_SPEC
6c940e8d	176	#define ASM_CPU32_DEFAULT_SPEC AS_SPARC32_FLAG AS_NIAGARA4_FLAG
3407e51d	177	#undef ASM_CPU64_DEFAULT_SPEC
6c940e8d	178	#define ASM_CPU64_DEFAULT_SPEC AS_SPARC64_FLAG AS_NIAGARA4_FLAG
3407e51d	179	#undef ASM_CPU_DEFAULT_SPEC
	180	#define ASM_CPU_DEFAULT_SPEC ASM_CPU32_DEFAULT_SPEC
	181	#endif
	182
c2e7ebeb	183	#undef CPP_CPU_SPEC
	184	#define CPP_CPU_SPEC "\
	185	%{mcpu=sparclet\|mcpu=tsc701:-D__sparclet__} \
	186	%{mcpu=sparclite\|mcpu-f930\|mcpu=f934:-D__sparclite__} \
	187	%{mcpu=v8:" DEF_ARCH32_SPEC("-D__sparcv8") "} \
	188	%{mcpu=supersparc:-D__supersparc__ " DEF_ARCH32_SPEC("-D__sparcv8") "} \
3407e51d	189	%{mcpu=v9\|mcpu=ultrasparc\|mcpu=ultrasparc3\|mcpu=niagara\|mcpu=niagara2\|mcpu=niagara3\|mcpu=niagara4:" DEF_ARCH32_SPEC("-D__sparcv8") "} \
c2e7ebeb	190	%{!mcpu*:%(cpp_cpu_default)} \
	191	"
	192
	193	#undef CPP_CPU_DEFAULT_SPEC
	194	#define CPP_CPU_DEFAULT_SPEC \
	195	(DEFAULT_ARCH32_P ? "\
	196	%{m64:" CPP_CPU64_DEFAULT_SPEC "} \
	197	%{!m64:" CPP_CPU32_DEFAULT_SPEC "} \
	198	" : "\
	199	%{m32:" CPP_CPU32_DEFAULT_SPEC "} \
	200	%{!m32:" CPP_CPU64_DEFAULT_SPEC "} \
	201	")
	202
	203	#undef CPP_ARCH32_SPEC
	204	#define CPP_ARCH32_SPEC ""
	205	#undef CPP_ARCH64_SPEC
	206	#define CPP_ARCH64_SPEC "-D__arch64__ -D__sparcv9"
	207
	208	#undef CPP_ARCH_SPEC
	209	#define CPP_ARCH_SPEC "\
	210	%{m32:%(cpp_arch32)} \
	211	%{m64:%(cpp_arch64)} \
	212	%{!m32:%{!m64:%(cpp_arch_default)}} \
	213	"
	214
76fd9e61	215	/* -mcpu=native handling only makes sense with compiler running on
76fd9e61	216	a SPARC chip. */
5bd71bb8	217	#if defined(__sparc__) && defined(__SVR4)
76fd9e61	218	extern const char host_detect_local_cpu (int argc, const char *argv);
	219	# define EXTRA_SPEC_FUNCTIONS \
	220	{ "local_cpu_detect", host_detect_local_cpu },
	221
	222	# define MCPU_MTUNE_NATIVE_SPECS \
	223	" %{mcpu=native:%<mcpu=native %:local_cpu_detect(cpu)}" \
	224	" %{mtune=native:%<mtune=native %:local_cpu_detect(tune)}"
	225	#else
	226	# define MCPU_MTUNE_NATIVE_SPECS ""
	227	#endif
	228
	229	#define DRIVER_SELF_SPECS MCPU_MTUNE_NATIVE_SPECS
	230
c2e7ebeb	231	#undef CC1_SPEC
	232	#if DEFAULT_ARCH32_P
	233	#define CC1_SPEC "\
	234	%{m64:%{m32:%emay not use both -m32 and -m64}} \
	235	%{m64:-mptr64 -mstack-bias -mno-v8plus \
	236	%{!mcpu*:-%{!mv8plus:mcpu=v9}}} \
	237	"
	238	#else
	239	#define CC1_SPEC "\
	240	%{m32:%{m64:%emay not use both -m32 and -m64}} \
	241	%{m32:-mptr32 -mno-stack-bias \
	242	%{!mcpu*:%{!mv8plus:-mcpu=v9}}} \
	243	%{mv8plus:-m32 -mptr32 -mno-stack-bias \
	244	%{!mcpu*:-mcpu=v9}} \
	245	"
	246	#endif
	247
	248	/* Support for a compile-time default CPU, et cetera. The rules are:
	249	--with-cpu is ignored if -mcpu is specified.
	250	--with-tune is ignored if -mtune is specified.
	251	--with-float is ignored if -mhard-float, -msoft-float, -mfpu, or -mno-fpu
	252	are specified.
	253	In the SPARC_BI_ARCH compiler we cannot pass %{!mcpu=*:-mcpu=%(VALUE)}
	254	here, otherwise say -mcpu=v7 would be passed even when -m64.
	255	CC1_SPEC above takes care of this instead. */
	256	#undef OPTION_DEFAULT_SPECS
	257	#if DEFAULT_ARCH32_P
	258	#define OPTION_DEFAULT_SPECS \
	259	{"cpu", "%{!m64:%{!mcpu=*:-mcpu=%(VALUE)}}" }, \
	260	{"tune", "%{!mtune=*:-mtune=%(VALUE)}" }, \
	261	{"float", "%{!msoft-float:%{!mhard-float:%{!mfpu:%{!mno-fpu:-m%(VALUE)-float}}}}" }
	262	#else
	263	#define OPTION_DEFAULT_SPECS \
	264	{"cpu", "%{!m32:%{!mcpu=*:-mcpu=%(VALUE)}}" }, \
	265	{"tune", "%{!mtune=*:-mtune=%(VALUE)}" }, \
	266	{"float", "%{!msoft-float:%{!mhard-float:%{!mfpu:%{!mno-fpu:-m%(VALUE)-float}}}}" }
d6ecc3a3	267	#endif
d6ecc3a3	268
91eaedd6	269	#undef ASM_CPU_SPEC
91eaedd6	270	#define ASM_CPU_SPEC "\
6c940e8d	271	%{mcpu=v9:" DEF_ARCH32_SPEC("-xarch=v8plus") DEF_ARCH64_SPEC("-xarch=v9") "} \
	272	%{mcpu=ultrasparc:" DEF_ARCH32_SPEC("-xarch=v8plusa") DEF_ARCH64_SPEC("-xarch=v9a") "} \
	273	%{mcpu=ultrasparc3:" DEF_ARCH32_SPEC("-xarch=v8plusb") DEF_ARCH64_SPEC("-xarch=v9b") "} \
	274	%{mcpu=niagara:" DEF_ARCH32_SPEC("-xarch=v8plusb") DEF_ARCH64_SPEC("-xarch=v9b") "} \
	275	%{mcpu=niagara2:" DEF_ARCH32_SPEC("-xarch=v8plusb") DEF_ARCH64_SPEC("-xarch=v9b") "} \
	276	%{mcpu=niagara3:" DEF_ARCH32_SPEC("-xarch=v8plus" AS_NIAGARA3_FLAG) DEF_ARCH64_SPEC("-xarch=v9" AS_NIAGARA3_FLAG) "} \
	277	%{mcpu=niagara4:" DEF_ARCH32_SPEC(AS_SPARC32_FLAG AS_NIAGARA4_FLAG) DEF_ARCH64_SPEC(AS_SPARC64_FLAG AS_NIAGARA4_FLAG) "} \
	278	%{!mcpu=niagara4:%{!mcpu=niagara3:%{!mcpu=niagara2:%{!mcpu=niagara:%{!mcpu=ultrasparc3:%{!mcpu=ultrasparc:%{!mcpu=v9:%{mcpu*:" DEF_ARCH32_SPEC("-xarch=v8") DEF_ARCH64_SPEC("-xarch=v9") "}}}}}}}} \
adf09a2f	279	%{!mcpu*:%(asm_cpu_default)} \
91eaedd6	280	"
e3225e4c	281
c2e7ebeb	282	#ifdef USE_GLD
	283	/* Since binutils 2.21, GNU ld supports new *_sol2 emulations to strictly
	284	follow the Solaris 2 ABI. Prefer them if present. */
	285	#ifdef HAVE_LD_SOL2_EMULATION
	286	#define ARCH32_EMULATION "elf32_sparc_sol2"
	287	#define ARCH64_EMULATION "elf64_sparc_sol2"
	288	#else
	289	#define ARCH32_EMULATION "elf32_sparc"
	290	#define ARCH64_EMULATION "elf64_sparc"
	291	#endif
	292	#endif
	293
	294	#define ARCH64_SUBDIR "sparcv9"
ee371cff	295
c2e7ebeb	296	#define SUBTARGET_CPU_EXTRA_SPECS
	297
	298	\f
	299
	300	/* Register the Solaris-specific #pragma directives. */
	301	#define REGISTER_TARGET_PRAGMAS() solaris_register_pragmas ()
	302
	303	#if defined(USE_GAS) && defined(HAVE_AS_TLS)
	304	/* Use GNU extensions to TLS support. */
	305	#undef TARGET_SUN_TLS
	306	#undef TARGET_GNU_TLS
	307	#define TARGET_SUN_TLS 0
	308	#define TARGET_GNU_TLS 1
	309	#endif
	310
	311	#undef LOCAL_LABEL_PREFIX
	312	#define LOCAL_LABEL_PREFIX "."
e3225e4c	313
8eba0400	314	/* The Solaris 2 assembler uses .skip, not .zero, so put this back. */
e3225e4c	315	#undef ASM_OUTPUT_SKIP
e3225e4c	316	#define ASM_OUTPUT_SKIP(FILE,SIZE) \
d716c068	317	fprintf (FILE, "\t.skip %u\n", (int)(SIZE))
e3225e4c	318
e3225e4c	319	/* This is how to store into the string LABEL
	320	the symbol_ref name of an internal numbered label where
	321	PREFIX is the class of label and NUM is the number within the class.
	322	This is suitable for output with `assemble_name'. */
	323
	324	#undef ASM_GENERATE_INTERNAL_LABEL
	325	#define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
2bae62b6	326	sprintf ((LABEL), "*.L%s%lu", (PREFIX), (unsigned long)(NUM))
e3225e4c	327
07a23b4e	328	/* The native TLS-enabled assembler requires the directive #tls_object
07a23b4e	329	to be put on objects in TLS sections (as of v7.1). This is not
c2e7ebeb	330	required by GNU as but supported on SPARC. */
07a23b4e	331	#undef ASM_DECLARE_OBJECT_NAME
	332	#define ASM_DECLARE_OBJECT_NAME(FILE, NAME, DECL) \
	333	do \
	334	{ \
	335	HOST_WIDE_INT size; \
	336	\
9dda1f80	337	if (targetm.have_tls && DECL_THREAD_LOCAL_P (DECL)) \
07a23b4e	338	ASM_OUTPUT_TYPE_DIRECTIVE (FILE, NAME, "tls_object"); \
	339	else \
	340	ASM_OUTPUT_TYPE_DIRECTIVE (FILE, NAME, "object"); \
	341	\
	342	size_directive_output = 0; \
	343	if (!flag_inhibit_size_directive \
	344	&& (DECL) && DECL_SIZE (DECL)) \
	345	{ \
	346	size_directive_output = 1; \
	347	size = int_size_in_bytes (TREE_TYPE (DECL)); \
	348	ASM_OUTPUT_SIZE_DIRECTIVE (FILE, NAME, size); \
	349	} \
	350	\
	351	ASM_OUTPUT_LABEL (FILE, NAME); \
	352	} \
	353	while (0)
	354
e02a1225	355	/* Output a simple call for .init/.fini. */
b82b45b4	356	#define ASM_OUTPUT_CALL(FILE, FN) \
	357	do \
	358	{ \
	359	fprintf (FILE, "\tcall\t"); \
	360	targetm.asm_out.print_operand (FILE, XEXP (DECL_RTL (FN), 0), 0); \
	361	fprintf (FILE, "\n\tnop\n"); \
	362	} \
d960da42	363	while (0)
7496caca	364
c2e7ebeb	365	#ifndef USE_GAS
36391801	366	/* This is how to output an assembler line that says to advance
36391801	367	the location counter to a multiple of 2**LOG bytes using the
c2e7ebeb	368	NOP instruction as padding. The filler pattern doesn't work
c2e7ebeb	369	with GNU as. */
36391801	370	#define ASM_OUTPUT_ALIGN_WITH_NOP(FILE,LOG) \
	371	if ((LOG) != 0) \
	372	fprintf (FILE, "\t.align %d,0x1000000\n", (1<<(LOG)))
	373
c2e7ebeb	374	/* Use Solaris ELF section syntax with Sun as. */
16528046	375	#undef TARGET_ASM_NAMED_SECTION
	376	#define TARGET_ASM_NAMED_SECTION sparc_solaris_elf_asm_named_section
	377
c2e7ebeb	378	/* Sun as requires doublequoted section names on SPARC. While GNU as
3468b0d6	379	supports that, too, we prefer the standard variant. */
3468b0d6	380	#undef SECTION_NAME_FORMAT
3468b0d6	381	#define SECTION_NAME_FORMAT "\"%s\""
c2e7ebeb	382	#endif /* !USE_GAS */
	383
	384	/* Undefine this so that attribute((init_priority)) works with GNU ld. */
	385	#ifdef USE_GLD
	386	#undef CTORS_SECTION_ASM_OP
	387	#undef DTORS_SECTION_ASM_OP
3468b0d6	388	#endif
64920f70	389
c2e7ebeb	390	\f
	391
	392	/* Define for support of TFmode long double.
	393	SPARC ABI says that long double is 4 words. */
	394	#define LONG_DOUBLE_TYPE_SIZE 128
	395
	396	/* Solaris's _Qp_* library routine implementation clobbers the output
	397	memory before the inputs are fully consumed. */
	398
	399	#undef TARGET_BUGGY_QP_LIB
	400	#define TARGET_BUGGY_QP_LIB 1
	401
	402	#undef SUN_CONVERSION_LIBFUNCS
	403	#define SUN_CONVERSION_LIBFUNCS 1
	404
	405	#undef DITF_CONVERSION_LIBFUNCS
	406	#define DITF_CONVERSION_LIBFUNCS 1
	407
	408	#undef SUN_INTEGER_MULTIPLY_64
	409	#define SUN_INTEGER_MULTIPLY_64 1