]> git.ipfire.org Git - thirdparty/gcc.git/blame - gcc/config/sparc/sol2.h
Add support for floating-point fused multiply-add on Sparc.
[thirdparty/gcc.git] / gcc / config / sparc / sol2.h
CommitLineData
de0a398e 1/* Definitions of target machine for GCC, for SPARC running Solaris 2
4c837a1e 2 Copyright 1992, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2004, 2005,
d634bfa1 3 2006, 2007, 2008, 2010, 2011 Free Software Foundation, Inc.
7d4ea832 4 Contributed by Ron Guilmette (rfg@netcom.com).
ed1817c6 5 Additional changes by David V. Henkel-Wallace (gumby@cygnus.com).
4ab76dcd 6
de0a398e 7This file is part of GCC.
4ab76dcd 8
de0a398e 9GCC is free software; you can redistribute it and/or modify
4ab76dcd 10it under the terms of the GNU General Public License as published by
2f83c7d6 11the Free Software Foundation; either version 3, or (at your option)
4ab76dcd
RK
12any later version.
13
de0a398e 14GCC is distributed in the hope that it will be useful,
4ab76dcd
RK
15but WITHOUT ANY WARRANTY; without even the implied warranty of
16MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17GNU General Public License for more details.
18
19You should have received a copy of the GNU General Public License
2f83c7d6
NC
20along with GCC; see the file COPYING3. If not see
21<http://www.gnu.org/licenses/>. */
4ab76dcd 22
b286d9ed
EB
23/* Solaris allows 64-bit out and global registers to be used in 32-bit mode.
24 sparc_override_options will disable V8+ if either not generating V9 code
25 or generating 64-bit code. */
6138f9bd
RO
26#undef TARGET_DEFAULT
27#ifdef TARGET_64BIT_DEFAULT
28#define TARGET_DEFAULT \
b286d9ed
EB
29 (MASK_V9 + MASK_64BIT + MASK_PTR64 + MASK_STACK_BIAS + \
30 MASK_V8PLUS + MASK_APP_REGS + MASK_FPU + MASK_LONG_DOUBLE_128)
6138f9bd 31#else
b286d9ed
EB
32#define TARGET_DEFAULT \
33 (MASK_V8PLUS + MASK_APP_REGS + MASK_FPU + MASK_LONG_DOUBLE_128)
6138f9bd 34#endif
7ecfa34f
RO
35
36/* The default code model used to be CM_MEDANY on Solaris
37 but even Sun eventually found it to be quite wasteful
38 and changed it to CM_MEDMID in the Studio 9 compiler. */
39#undef SPARC_DEFAULT_CMODEL
40#define SPARC_DEFAULT_CMODEL CM_MEDMID
41
42/* Select a format to encode pointers in exception handling data. CODE
43 is 0 for data, 1 for code labels, 2 for function pointers. GLOBAL is
44 true if the symbol may be affected by dynamic relocations.
45
46 Some Solaris dynamic linkers don't handle unaligned section relative
47 relocs properly, so force them to be aligned. */
48#ifndef HAVE_AS_SPARC_UA_PCREL
49#define ASM_PREFERRED_EH_DATA_FORMAT(CODE,GLOBAL) \
50 ((flag_pic || GLOBAL) ? DW_EH_PE_aligned : DW_EH_PE_absptr)
51#endif
52
53\f
54
8f3d7f00 55/* Supposedly the same as vanilla sparc svr4, except for the stuff below: */
4ab76dcd 56
cbe16f8a
DE
57/* This is here rather than in sparc.h because it's not known what
58 other assemblers will accept. */
b7764693 59
7ecfa34f
RO
60#ifndef USE_GAS
61#define AS_SPARC64_FLAG "-xarch=v9"
62#else
63#define AS_SPARC64_FLAG "-TSO -64 -Av9"
64#endif
65
66#undef ASM_CPU32_DEFAULT_SPEC
67#define ASM_CPU32_DEFAULT_SPEC ""
68#undef ASM_CPU64_DEFAULT_SPEC
69#define ASM_CPU64_DEFAULT_SPEC AS_SPARC64_FLAG
70
a0a301fc 71#if TARGET_CPU_DEFAULT == TARGET_CPU_v9
7ecfa34f
RO
72#undef CPP_CPU64_DEFAULT_SPEC
73#define CPP_CPU64_DEFAULT_SPEC ""
74#undef ASM_CPU32_DEFAULT_SPEC
75#define ASM_CPU32_DEFAULT_SPEC "-xarch=v8plus"
a0a301fc 76#undef ASM_CPU_DEFAULT_SPEC
7ecfa34f 77#define ASM_CPU_DEFAULT_SPEC ASM_CPU32_DEFAULT_SPEC
a0a301fc 78#endif
b7764693 79
a0a301fc 80#if TARGET_CPU_DEFAULT == TARGET_CPU_ultrasparc
7ecfa34f
RO
81#undef CPP_CPU64_DEFAULT_SPEC
82#define CPP_CPU64_DEFAULT_SPEC ""
83#undef ASM_CPU32_DEFAULT_SPEC
84#define ASM_CPU32_DEFAULT_SPEC "-xarch=v8plusa"
85#undef ASM_CPU64_DEFAULT_SPEC
86#define ASM_CPU64_DEFAULT_SPEC AS_SPARC64_FLAG "a"
a0a301fc 87#undef ASM_CPU_DEFAULT_SPEC
7ecfa34f 88#define ASM_CPU_DEFAULT_SPEC ASM_CPU32_DEFAULT_SPEC
cbe16f8a 89#endif
b7764693 90
5202c5fe 91#if TARGET_CPU_DEFAULT == TARGET_CPU_ultrasparc3
7ecfa34f
RO
92#undef CPP_CPU64_DEFAULT_SPEC
93#define CPP_CPU64_DEFAULT_SPEC ""
94#undef ASM_CPU32_DEFAULT_SPEC
95#define ASM_CPU32_DEFAULT_SPEC "-xarch=v8plusb"
96#undef ASM_CPU64_DEFAULT_SPEC
97#define ASM_CPU64_DEFAULT_SPEC AS_SPARC64_FLAG "b"
5202c5fe 98#undef ASM_CPU_DEFAULT_SPEC
7ecfa34f 99#define ASM_CPU_DEFAULT_SPEC ASM_CPU32_DEFAULT_SPEC
5202c5fe
EB
100#endif
101
4c837a1e 102#if TARGET_CPU_DEFAULT == TARGET_CPU_niagara
7ecfa34f
RO
103#undef CPP_CPU64_DEFAULT_SPEC
104#define CPP_CPU64_DEFAULT_SPEC ""
105#undef ASM_CPU32_DEFAULT_SPEC
106#define ASM_CPU32_DEFAULT_SPEC "-xarch=v8plusb"
107#undef ASM_CPU64_DEFAULT_SPEC
108#define ASM_CPU64_DEFAULT_SPEC AS_SPARC64_FLAG "b"
4c837a1e 109#undef ASM_CPU_DEFAULT_SPEC
7ecfa34f 110#define ASM_CPU_DEFAULT_SPEC ASM_CPU32_DEFAULT_SPEC
4c837a1e
DM
111#endif
112
9eeaed6e 113#if TARGET_CPU_DEFAULT == TARGET_CPU_niagara2
7ecfa34f
RO
114#undef CPP_CPU64_DEFAULT_SPEC
115#define CPP_CPU64_DEFAULT_SPEC ""
116#undef ASM_CPU32_DEFAULT_SPEC
117#define ASM_CPU32_DEFAULT_SPEC "-xarch=v8plusb"
118#undef ASM_CPU64_DEFAULT_SPEC
119#define ASM_CPU64_DEFAULT_SPEC AS_SPARC64_FLAG "b"
9eeaed6e 120#undef ASM_CPU_DEFAULT_SPEC
7ecfa34f
RO
121#define ASM_CPU_DEFAULT_SPEC ASM_CPU32_DEFAULT_SPEC
122#endif
123
3e64c239
DM
124#if TARGET_CPU_DEFAULT == TARGET_CPU_niagara3
125#undef CPP_CPU64_DEFAULT_SPEC
126#define CPP_CPU64_DEFAULT_SPEC ""
127#undef ASM_CPU32_DEFAULT_SPEC
e8b141b5 128#define ASM_CPU32_DEFAULT_SPEC "-xarch=v8plus" AS_NIAGARA3_FLAG
3e64c239 129#undef ASM_CPU64_DEFAULT_SPEC
e8b141b5 130#define ASM_CPU64_DEFAULT_SPEC AS_SPARC64_FLAG AS_NIAGARA3_FLAG
3e64c239
DM
131#undef ASM_CPU_DEFAULT_SPEC
132#define ASM_CPU_DEFAULT_SPEC ASM_CPU32_DEFAULT_SPEC
133#endif
134
135#if TARGET_CPU_DEFAULT == TARGET_CPU_niagara4
136#undef CPP_CPU64_DEFAULT_SPEC
137#define CPP_CPU64_DEFAULT_SPEC ""
138#undef ASM_CPU32_DEFAULT_SPEC
139#define ASM_CPU32_DEFAULT_SPEC "-xarch=v8plusb"
140#undef ASM_CPU64_DEFAULT_SPEC
141#define ASM_CPU64_DEFAULT_SPEC AS_SPARC64_FLAG "b"
142#undef ASM_CPU_DEFAULT_SPEC
143#define ASM_CPU_DEFAULT_SPEC ASM_CPU32_DEFAULT_SPEC
144#endif
145
fcf7471a
RO
146/* Both Sun as and GNU as understand -K PIC. */
147#undef ASM_SPEC
148#define ASM_SPEC ASM_SPEC_BASE ASM_PIC_SPEC
149
7ecfa34f
RO
150#undef CPP_CPU_SPEC
151#define CPP_CPU_SPEC "\
152%{mcpu=sparclet|mcpu=tsc701:-D__sparclet__} \
153%{mcpu=sparclite|mcpu-f930|mcpu=f934:-D__sparclite__} \
154%{mcpu=v8:" DEF_ARCH32_SPEC("-D__sparcv8") "} \
155%{mcpu=supersparc:-D__supersparc__ " DEF_ARCH32_SPEC("-D__sparcv8") "} \
3e64c239 156%{mcpu=v9|mcpu=ultrasparc|mcpu=ultrasparc3|mcpu=niagara|mcpu=niagara2|mcpu=niagara3|mcpu=niagara4:" DEF_ARCH32_SPEC("-D__sparcv8") "} \
7ecfa34f
RO
157%{!mcpu*:%(cpp_cpu_default)} \
158"
159
160#undef CPP_CPU_DEFAULT_SPEC
161#define CPP_CPU_DEFAULT_SPEC \
162(DEFAULT_ARCH32_P ? "\
163%{m64:" CPP_CPU64_DEFAULT_SPEC "} \
164%{!m64:" CPP_CPU32_DEFAULT_SPEC "} \
165" : "\
166%{m32:" CPP_CPU32_DEFAULT_SPEC "} \
167%{!m32:" CPP_CPU64_DEFAULT_SPEC "} \
168")
169
170#undef CPP_ARCH32_SPEC
171#define CPP_ARCH32_SPEC ""
172#undef CPP_ARCH64_SPEC
173#define CPP_ARCH64_SPEC "-D__arch64__ -D__sparcv9"
174
175#undef CPP_ARCH_SPEC
176#define CPP_ARCH_SPEC "\
177%{m32:%(cpp_arch32)} \
178%{m64:%(cpp_arch64)} \
179%{!m32:%{!m64:%(cpp_arch_default)}} \
180"
181
e3b3fa45
RO
182/* -mcpu=native handling only makes sense with compiler running on
183 a SPARC chip. */
184#if defined(__sparc__)
185extern const char *host_detect_local_cpu (int argc, const char **argv);
186# define EXTRA_SPEC_FUNCTIONS \
187 { "local_cpu_detect", host_detect_local_cpu },
188
189# define MCPU_MTUNE_NATIVE_SPECS \
190 " %{mcpu=native:%<mcpu=native %:local_cpu_detect(cpu)}" \
191 " %{mtune=native:%<mtune=native %:local_cpu_detect(tune)}"
192#else
193# define MCPU_MTUNE_NATIVE_SPECS ""
194#endif
195
196#define DRIVER_SELF_SPECS MCPU_MTUNE_NATIVE_SPECS
197
7ecfa34f
RO
198#undef CC1_SPEC
199#if DEFAULT_ARCH32_P
200#define CC1_SPEC "\
201%{m64:%{m32:%emay not use both -m32 and -m64}} \
202%{m64:-mptr64 -mstack-bias -mno-v8plus \
203 %{!mcpu*:-%{!mv8plus:mcpu=v9}}} \
204"
205#else
206#define CC1_SPEC "\
207%{m32:%{m64:%emay not use both -m32 and -m64}} \
208%{m32:-mptr32 -mno-stack-bias \
209 %{!mcpu*:%{!mv8plus:-mcpu=v9}}} \
210%{mv8plus:-m32 -mptr32 -mno-stack-bias \
211 %{!mcpu*:-mcpu=v9}} \
212"
213#endif
214
215/* Support for a compile-time default CPU, et cetera. The rules are:
216 --with-cpu is ignored if -mcpu is specified.
217 --with-tune is ignored if -mtune is specified.
218 --with-float is ignored if -mhard-float, -msoft-float, -mfpu, or -mno-fpu
219 are specified.
220 In the SPARC_BI_ARCH compiler we cannot pass %{!mcpu=*:-mcpu=%(VALUE)}
221 here, otherwise say -mcpu=v7 would be passed even when -m64.
222 CC1_SPEC above takes care of this instead. */
223#undef OPTION_DEFAULT_SPECS
224#if DEFAULT_ARCH32_P
225#define OPTION_DEFAULT_SPECS \
226 {"cpu", "%{!m64:%{!mcpu=*:-mcpu=%(VALUE)}}" }, \
227 {"tune", "%{!mtune=*:-mtune=%(VALUE)}" }, \
228 {"float", "%{!msoft-float:%{!mhard-float:%{!mfpu:%{!mno-fpu:-m%(VALUE)-float}}}}" }
229#else
230#define OPTION_DEFAULT_SPECS \
231 {"cpu", "%{!m32:%{!mcpu=*:-mcpu=%(VALUE)}}" }, \
232 {"tune", "%{!mtune=*:-mtune=%(VALUE)}" }, \
233 {"float", "%{!msoft-float:%{!mhard-float:%{!mfpu:%{!mno-fpu:-m%(VALUE)-float}}}}" }
9eeaed6e
DM
234#endif
235
cbe16f8a
DE
236#undef ASM_CPU_SPEC
237#define ASM_CPU_SPEC "\
7ecfa34f
RO
238%{mcpu=v9:" DEF_ARCH32_SPEC("-xarch=v8plus") DEF_ARCH64_SPEC(AS_SPARC64_FLAG) "} \
239%{mcpu=ultrasparc:" DEF_ARCH32_SPEC("-xarch=v8plusa") DEF_ARCH64_SPEC(AS_SPARC64_FLAG "a") "} \
240%{mcpu=ultrasparc3:" DEF_ARCH32_SPEC("-xarch=v8plusb") DEF_ARCH64_SPEC(AS_SPARC64_FLAG "b") "} \
241%{mcpu=niagara:" DEF_ARCH32_SPEC("-xarch=v8plusb") DEF_ARCH64_SPEC(AS_SPARC64_FLAG "b") "} \
242%{mcpu=niagara2:" DEF_ARCH32_SPEC("-xarch=v8plusb") DEF_ARCH64_SPEC(AS_SPARC64_FLAG "b") "} \
e8b141b5
DM
243%{mcpu=niagara3:" DEF_ARCH32_SPEC("-xarch=v8plus" AS_NIAGARA3_FLAG) DEF_ARCH64_SPEC(AS_SPARC64_FLAG AS_NIAGARA3_FLAG) "} \
244%{mcpu=niagara4:" DEF_ARCH32_SPEC("-xarch=v8plus" AS_NIAGARA3_FLAG) DEF_ARCH64_SPEC(AS_SPARC64_FLAG AS_NIAGARA3_FLAG) "} \
3e64c239 245%{!mcpu=niagara4:%{!mcpu=niagara3:%{!mcpu=niagara2:%{!mcpu=niagara:%{!mcpu=ultrasparc3:%{!mcpu=ultrasparc:%{!mcpu=v9:%{mcpu*:" DEF_ARCH32_SPEC("-xarch=v8") DEF_ARCH64_SPEC(AS_SPARC64_FLAG) "}}}}}}}} \
a0a301fc 246%{!mcpu*:%(asm_cpu_default)} \
cbe16f8a 247"
8f3d7f00 248
7ecfa34f
RO
249#undef ASM_ARCH32_SPEC
250#define ASM_ARCH32_SPEC ""
251
252#undef ASM_ARCH64_SPEC
253#define ASM_ARCH64_SPEC ""
254
255#undef ASM_ARCH_DEFAULT_SPEC
256#define ASM_ARCH_DEFAULT_SPEC ""
257
258#undef ASM_ARCH_SPEC
259#define ASM_ARCH_SPEC ""
260
261#ifdef USE_GLD
262/* Since binutils 2.21, GNU ld supports new *_sol2 emulations to strictly
263 follow the Solaris 2 ABI. Prefer them if present. */
264#ifdef HAVE_LD_SOL2_EMULATION
265#define ARCH32_EMULATION "elf32_sparc_sol2"
266#define ARCH64_EMULATION "elf64_sparc_sol2"
267#else
268#define ARCH32_EMULATION "elf32_sparc"
269#define ARCH64_EMULATION "elf64_sparc"
270#endif
271#endif
272
273#define ARCH64_SUBDIR "sparcv9"
be3a0ce2 274
7ecfa34f
RO
275#define SUBTARGET_CPU_EXTRA_SPECS
276
277\f
278
279/* Register the Solaris-specific #pragma directives. */
280#define REGISTER_TARGET_PRAGMAS() solaris_register_pragmas ()
281
282#if defined(USE_GAS) && defined(HAVE_AS_TLS)
283/* Use GNU extensions to TLS support. */
284#undef TARGET_SUN_TLS
285#undef TARGET_GNU_TLS
286#define TARGET_SUN_TLS 0
287#define TARGET_GNU_TLS 1
288#endif
289
290#undef LOCAL_LABEL_PREFIX
291#define LOCAL_LABEL_PREFIX "."
8f3d7f00 292
80ffc95e 293/* The Solaris 2 assembler uses .skip, not .zero, so put this back. */
8f3d7f00
RS
294#undef ASM_OUTPUT_SKIP
295#define ASM_OUTPUT_SKIP(FILE,SIZE) \
58e15542 296 fprintf (FILE, "\t.skip %u\n", (int)(SIZE))
8f3d7f00 297
8f3d7f00
RS
298/* This is how to store into the string LABEL
299 the symbol_ref name of an internal numbered label where
300 PREFIX is the class of label and NUM is the number within the class.
301 This is suitable for output with `assemble_name'. */
302
303#undef ASM_GENERATE_INTERNAL_LABEL
304#define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
fca0efd4 305 sprintf ((LABEL), "*.L%s%lu", (PREFIX), (unsigned long)(NUM))
8f3d7f00 306
2f3321ca
EB
307/* The native TLS-enabled assembler requires the directive #tls_object
308 to be put on objects in TLS sections (as of v7.1). This is not
7ecfa34f 309 required by GNU as but supported on SPARC. */
2f3321ca
EB
310#undef ASM_DECLARE_OBJECT_NAME
311#define ASM_DECLARE_OBJECT_NAME(FILE, NAME, DECL) \
312 do \
313 { \
314 HOST_WIDE_INT size; \
315 \
8893239d 316 if (targetm.have_tls && DECL_THREAD_LOCAL_P (DECL)) \
2f3321ca
EB
317 ASM_OUTPUT_TYPE_DIRECTIVE (FILE, NAME, "tls_object"); \
318 else \
319 ASM_OUTPUT_TYPE_DIRECTIVE (FILE, NAME, "object"); \
320 \
321 size_directive_output = 0; \
322 if (!flag_inhibit_size_directive \
323 && (DECL) && DECL_SIZE (DECL)) \
324 { \
325 size_directive_output = 1; \
326 size = int_size_in_bytes (TREE_TYPE (DECL)); \
327 ASM_OUTPUT_SIZE_DIRECTIVE (FILE, NAME, size); \
328 } \
329 \
330 ASM_OUTPUT_LABEL (FILE, NAME); \
331 } \
332 while (0)
333
07a43492 334/* Output a simple call for .init/.fini. */
d634bfa1
RO
335#define ASM_OUTPUT_CALL(FILE, FN) \
336 do \
337 { \
338 fprintf (FILE, "\tcall\t"); \
339 targetm.asm_out.print_operand (FILE, XEXP (DECL_RTL (FN), 0), 0); \
340 fprintf (FILE, "\n\tnop\n"); \
341 } \
dbdd0cf3 342 while (0)
6ac16442 343
7ecfa34f 344#ifndef USE_GAS
233db724
EB
345/* This is how to output an assembler line that says to advance
346 the location counter to a multiple of 2**LOG bytes using the
7ecfa34f
RO
347 NOP instruction as padding. The filler pattern doesn't work
348 with GNU as. */
233db724
EB
349#define ASM_OUTPUT_ALIGN_WITH_NOP(FILE,LOG) \
350 if ((LOG) != 0) \
351 fprintf (FILE, "\t.align %d,0x1000000\n", (1<<(LOG)))
352
7ecfa34f 353/* Use Solaris ELF section syntax with Sun as. */
d1ced155
EB
354#undef TARGET_ASM_NAMED_SECTION
355#define TARGET_ASM_NAMED_SECTION sparc_solaris_elf_asm_named_section
356
7ecfa34f 357/* Sun as requires doublequoted section names on SPARC. While GNU as
2ca48caa 358 supports that, too, we prefer the standard variant. */
2ca48caa
RO
359#undef SECTION_NAME_FORMAT
360#define SECTION_NAME_FORMAT "\"%s\""
7ecfa34f
RO
361#endif /* !USE_GAS */
362
363/* Undefine this so that attribute((init_priority)) works with GNU ld. */
364#ifdef USE_GLD
365#undef CTORS_SECTION_ASM_OP
366#undef DTORS_SECTION_ASM_OP
2ca48caa 367#endif
a0c21029 368
7ecfa34f
RO
369\f
370
371/* Define for support of TFmode long double.
372 SPARC ABI says that long double is 4 words. */
373#define LONG_DOUBLE_TYPE_SIZE 128
374
375/* Solaris's _Qp_* library routine implementation clobbers the output
376 memory before the inputs are fully consumed. */
377
378#undef TARGET_BUGGY_QP_LIB
379#define TARGET_BUGGY_QP_LIB 1
380
381#undef SUN_CONVERSION_LIBFUNCS
382#define SUN_CONVERSION_LIBFUNCS 1
383
384#undef DITF_CONVERSION_LIBFUNCS
385#define DITF_CONVERSION_LIBFUNCS 1
386
387#undef SUN_INTEGER_MULTIPLY_64
388#define SUN_INTEGER_MULTIPLY_64 1