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1; Options for the SPARC port of the compiler
2;
a5544970 3; Copyright (C) 2005-2019 Free Software Foundation, Inc.
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4;
5; This file is part of GCC.
6;
7; GCC is free software; you can redistribute it and/or modify it under
8; the terms of the GNU General Public License as published by the Free
2f83c7d6 9; Software Foundation; either version 3, or (at your option) any later
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10; version.
11;
12; GCC is distributed in the hope that it will be useful, but WITHOUT
13; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15; License for more details.
16;
17; You should have received a copy of the GNU General Public License
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18; along with GCC; see the file COPYING3. If not see
19; <http://www.gnu.org/licenses/>.
fe609b0f 20
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21HeaderInclude
22config/sparc/sparc-opts.h
23
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24;; Debug flags
25TargetVariable
26unsigned int sparc_debug
27
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28mfpu
29Target Report Mask(FPU)
a7b2e184 30Use hardware FP.
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31
32mhard-float
719e1e80 33Target RejectNegative Mask(FPU)
a7b2e184 34Use hardware FP.
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35
36msoft-float
37Target RejectNegative InverseMask(FPU)
a7b2e184 38Do not use hardware FP.
fe609b0f 39
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40mflat
41Target Report Mask(FLAT)
a7b2e184 42Use flat register window model.
b11b0904 43
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44munaligned-doubles
45Target Report Mask(UNALIGNED_DOUBLES)
a7b2e184 46Assume possible double misalignment.
fe609b0f 47
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48mapp-regs
49Target Report Mask(APP_REGS)
a7b2e184 50Use ABI reserved registers.
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51
52mhard-quad-float
53Target Report RejectNegative Mask(HARD_QUAD)
a7b2e184 54Use hardware quad FP instructions.
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55
56msoft-quad-float
57Target Report RejectNegative InverseMask(HARD_QUAD)
a7b2e184 58Do not use hardware quad fp instructions.
fe609b0f 59
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60mlra
61Target Report Mask(LRA)
62Enable Local Register Allocation.
63
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64mv8plus
65Target Report Mask(V8PLUS)
a7b2e184 66Compile for V8+ ABI.
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67
68mvis
69Target Report Mask(VIS)
a7b2e184 70Use UltraSPARC Visual Instruction Set version 1.0 extensions.
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71
72mvis2
73Target Report Mask(VIS2)
a7b2e184 74Use UltraSPARC Visual Instruction Set version 2.0 extensions.
fe609b0f 75
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76mvis3
77Target Report Mask(VIS3)
a7b2e184 78Use UltraSPARC Visual Instruction Set version 3.0 extensions.
96d7b15f 79
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80mvis4
81Target Report Mask(VIS4)
82Use UltraSPARC Visual Instruction Set version 4.0 extensions.
83
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84mvis4b
85Target Report Mask(VIS4B)
86Use additional VIS instructions introduced in OSA2017.
87
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88mcbcond
89Target Report Mask(CBCOND)
a7b2e184 90Use UltraSPARC Compare-and-Branch extensions.
8b98b5fd 91
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92mfmaf
93Target Report Mask(FMAF)
a7b2e184 94Use UltraSPARC Fused Multiply-Add extensions.
e8b141b5 95
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96mfsmuld
97Target Report Mask(FSMULD)
98Use Floating-point Multiply Single to Double (FsMULd) instruction.
99
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100mpopc
101Target Report Mask(POPC)
a7b2e184 102Use UltraSPARC Population-Count instruction.
dc78280f 103
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104msubxc
105Target Report Mask(SUBXC)
106Use UltraSPARC Subtract-Extended-with-Carry instruction.
107
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108mptr64
109Target Report RejectNegative Mask(PTR64)
a7b2e184 110Pointers are 64-bit.
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111
112mptr32
113Target Report RejectNegative InverseMask(PTR64)
a7b2e184 114Pointers are 32-bit.
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115
116m64
117Target Report RejectNegative Mask(64BIT)
a7b2e184 118Use 64-bit ABI.
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119
120m32
121Target Report RejectNegative InverseMask(64BIT)
a7b2e184 122Use 32-bit ABI.
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123
124mstack-bias
125Target Report Mask(STACK_BIAS)
a7b2e184 126Use stack bias.
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127
128mfaster-structs
129Target Report Mask(FASTER_STRUCTS)
a7b2e184 130Use structs on stronger alignment for double-word copies.
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131
132mrelax
133Target
a7b2e184 134Optimize tail call instructions in assembler and linker.
fe609b0f 135
ba21a04a 136muser-mode
a01a33a2 137Target Report InverseMask(SV_MODE)
a7b2e184 138Do not generate code that can only run in supervisor mode (default).
ba21a04a 139
fe609b0f 140mcpu=
023592aa 141Target RejectNegative Joined Var(sparc_cpu_and_features) Enum(sparc_processor_type) Init(PROCESSOR_V7)
a7b2e184 142Use features of and schedule code for given CPU.
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143
144mtune=
023592aa 145Target RejectNegative Joined Var(sparc_cpu) Enum(sparc_processor_type) Init(PROCESSOR_V7)
a7b2e184 146Schedule code for given CPU.
fe609b0f 147
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148Enum
149Name(sparc_processor_type) Type(enum processor_type)
150
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151EnumValue
152Enum(sparc_processor_type) String(native) Value(PROCESSOR_NATIVE) DriverOnly
153
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154EnumValue
155Enum(sparc_processor_type) String(v7) Value(PROCESSOR_V7)
156
157EnumValue
158Enum(sparc_processor_type) String(cypress) Value(PROCESSOR_CYPRESS)
159
160EnumValue
161Enum(sparc_processor_type) String(v8) Value(PROCESSOR_V8)
162
163EnumValue
164Enum(sparc_processor_type) String(supersparc) Value(PROCESSOR_SUPERSPARC)
165
166EnumValue
167Enum(sparc_processor_type) String(hypersparc) Value(PROCESSOR_HYPERSPARC)
168
169EnumValue
170Enum(sparc_processor_type) String(leon) Value(PROCESSOR_LEON)
171
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172EnumValue
173Enum(sparc_processor_type) String(leon3) Value(PROCESSOR_LEON3)
174
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175EnumValue
176Enum(sparc_processor_type) String(leon3v7) Value(PROCESSOR_LEON3V7)
177
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178EnumValue
179Enum(sparc_processor_type) String(sparclite) Value(PROCESSOR_SPARCLITE)
180
181EnumValue
182Enum(sparc_processor_type) String(f930) Value(PROCESSOR_F930)
183
184EnumValue
185Enum(sparc_processor_type) String(f934) Value(PROCESSOR_F934)
186
187EnumValue
188Enum(sparc_processor_type) String(sparclite86x) Value(PROCESSOR_SPARCLITE86X)
189
190EnumValue
191Enum(sparc_processor_type) String(sparclet) Value(PROCESSOR_SPARCLET)
192
193EnumValue
194Enum(sparc_processor_type) String(tsc701) Value(PROCESSOR_TSC701)
195
196EnumValue
197Enum(sparc_processor_type) String(v9) Value(PROCESSOR_V9)
198
199EnumValue
200Enum(sparc_processor_type) String(ultrasparc) Value(PROCESSOR_ULTRASPARC)
201
202EnumValue
203Enum(sparc_processor_type) String(ultrasparc3) Value(PROCESSOR_ULTRASPARC3)
204
205EnumValue
206Enum(sparc_processor_type) String(niagara) Value(PROCESSOR_NIAGARA)
207
208EnumValue
209Enum(sparc_processor_type) String(niagara2) Value(PROCESSOR_NIAGARA2)
210
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211EnumValue
212Enum(sparc_processor_type) String(niagara3) Value(PROCESSOR_NIAGARA3)
213
214EnumValue
215Enum(sparc_processor_type) String(niagara4) Value(PROCESSOR_NIAGARA4)
216
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217EnumValue
218Enum(sparc_processor_type) String(niagara7) Value(PROCESSOR_NIAGARA7)
219
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220EnumValue
221Enum(sparc_processor_type) String(m8) Value(PROCESSOR_M8)
222
fe609b0f 223mcmodel=
55bea00a 224Target RejectNegative Joined Var(sparc_cmodel_string)
a7b2e184 225Use given SPARC-V9 code model.
fe609b0f 226
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227mdebug=
228Target RejectNegative Joined Var(sparc_debug_string)
a7b2e184 229Enable debug output.
a0bd60d1 230
2225b57c 231mstd-struct-return
9250444b 232Target Report Var(sparc_std_struct_return)
2225b57c 233Enable strict 32-bit psABI struct return checking.
fe609b0f 234
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235mfix-at697f
236Target Report RejectNegative Var(sparc_fix_at697f)
237Enable workaround for single erratum of AT697F processor
cad669df 238(corresponding to erratum #13 of AT697E processor).
c49c4c85 239
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240mfix-ut699
241Target Report RejectNegative Var(sparc_fix_ut699)
a7b2e184 242Enable workarounds for the errata of the UT699 processor.
5c3eacbb 243
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244mfix-ut700
245Target Report RejectNegative Var(sparc_fix_ut700)
246Enable workarounds for the errata of the UT699E/UT700 processor.
247
248mfix-gr712rc
249Target Report RejectNegative Var(sparc_fix_gr712rc)
250Enable workarounds for the errata of the GR712RC processor.
251
252;; Enable workaround for back-to-back store errata
253TargetVariable
254unsigned int sparc_fix_b2bst
255
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256;; Enable workaround for GRLIB-TN-0013 errata
257TargetVariable
258unsigned int sparc_fix_lost_divsqrt
259
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260Mask(LONG_DOUBLE_128)
261;; Use 128-bit long double
262
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263Mask(LEON)
264;; Generate code for LEON
265
266Mask(LEON3)
267;; Generate code for LEON3
268
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269Mask(SPARCLITE)
270;; Generate code for SPARClite
271
272Mask(SPARCLET)
273;; Generate code for SPARClet
274
275Mask(V8)
276;; Generate code for SPARC-V8
277
278Mask(V9)
279;; Generate code for SPARC-V9
280
281Mask(DEPRECATED_V8_INSNS)
282;; Generate code that uses the V8 instructions deprecated
283;; in the V9 architecture.
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284
285mmemory-model=
286Target RejectNegative Joined Var(sparc_memory_model) Enum(sparc_memory_model) Init(SMM_DEFAULT)
287Specify the memory model in effect for the program.
288
289Enum
290Name(sparc_memory_model) Type(enum sparc_memory_model_type)
291
292EnumValue
293Enum(sparc_memory_model) String(default) Value(SMM_DEFAULT)
294
295EnumValue
296Enum(sparc_memory_model) String(rmo) Value(SMM_RMO)
297
298EnumValue
299Enum(sparc_memory_model) String(pso) Value(SMM_PSO)
300
301EnumValue
302Enum(sparc_memory_model) String(tso) Value(SMM_TSO)
303
304EnumValue
305Enum(sparc_memory_model) String(sc) Value(SMM_SC)