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Add support for floating-point fused multiply-add on Sparc.
[thirdparty/gcc.git] / gcc / config / sparc / sparc.opt
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1; Options for the SPARC port of the compiler
2;
aa53e58b 3; Copyright (C) 2005, 2007, 2010, 2011 Free Software Foundation, Inc.
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4;
5; This file is part of GCC.
6;
7; GCC is free software; you can redistribute it and/or modify it under
8; the terms of the GNU General Public License as published by the Free
2f83c7d6 9; Software Foundation; either version 3, or (at your option) any later
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10; version.
11;
12; GCC is distributed in the hope that it will be useful, but WITHOUT
13; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15; License for more details.
16;
17; You should have received a copy of the GNU General Public License
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18; along with GCC; see the file COPYING3. If not see
19; <http://www.gnu.org/licenses/>.
fe609b0f 20
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21HeaderInclude
22config/sparc/sparc-opts.h
23
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24mfpu
25Target Report Mask(FPU)
26Use hardware FP
27
28mhard-float
29Target RejectNegative Mask(FPU) MaskExists
30Use hardware FP
31
32msoft-float
33Target RejectNegative InverseMask(FPU)
34Do not use hardware FP
35
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36mflat
37Target Report Mask(FLAT)
38Use flat register window model
39
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40munaligned-doubles
41Target Report Mask(UNALIGNED_DOUBLES)
42Assume possible double misalignment
43
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44mapp-regs
45Target Report Mask(APP_REGS)
46Use ABI reserved registers
47
48mhard-quad-float
49Target Report RejectNegative Mask(HARD_QUAD)
50Use hardware quad FP instructions
51
52msoft-quad-float
53Target Report RejectNegative InverseMask(HARD_QUAD)
54Do not use hardware quad fp instructions
55
56mv8plus
57Target Report Mask(V8PLUS)
58Compile for V8+ ABI
59
60mvis
61Target Report Mask(VIS)
62Use UltraSPARC Visual Instruction Set extensions
63
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64mfmaf
65Target Report Mask(FMAF)
66Use UltraSPARC Fused Multiply-Add extensions
67
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68mptr64
69Target Report RejectNegative Mask(PTR64)
70Pointers are 64-bit
71
72mptr32
73Target Report RejectNegative InverseMask(PTR64)
74Pointers are 32-bit
75
76m64
77Target Report RejectNegative Mask(64BIT)
78Use 64-bit ABI
79
80m32
81Target Report RejectNegative InverseMask(64BIT)
82Use 32-bit ABI
83
84mstack-bias
85Target Report Mask(STACK_BIAS)
86Use stack bias
87
88mfaster-structs
89Target Report Mask(FASTER_STRUCTS)
90Use structs on stronger alignment for double-word copies
91
92mrelax
93Target
94Optimize tail call instructions in assembler and linker
95
96mcpu=
023592aa 97Target RejectNegative Joined Var(sparc_cpu_and_features) Enum(sparc_processor_type) Init(PROCESSOR_V7)
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98Use features of and schedule code for given CPU
99
100mtune=
023592aa 101Target RejectNegative Joined Var(sparc_cpu) Enum(sparc_processor_type) Init(PROCESSOR_V7)
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102Schedule code for given CPU
103
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104Enum
105Name(sparc_processor_type) Type(enum processor_type)
106
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107EnumValue
108Enum(sparc_processor_type) String(native) Value(PROCESSOR_NATIVE) DriverOnly
109
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110EnumValue
111Enum(sparc_processor_type) String(v7) Value(PROCESSOR_V7)
112
113EnumValue
114Enum(sparc_processor_type) String(cypress) Value(PROCESSOR_CYPRESS)
115
116EnumValue
117Enum(sparc_processor_type) String(v8) Value(PROCESSOR_V8)
118
119EnumValue
120Enum(sparc_processor_type) String(supersparc) Value(PROCESSOR_SUPERSPARC)
121
122EnumValue
123Enum(sparc_processor_type) String(hypersparc) Value(PROCESSOR_HYPERSPARC)
124
125EnumValue
126Enum(sparc_processor_type) String(leon) Value(PROCESSOR_LEON)
127
128EnumValue
129Enum(sparc_processor_type) String(sparclite) Value(PROCESSOR_SPARCLITE)
130
131EnumValue
132Enum(sparc_processor_type) String(f930) Value(PROCESSOR_F930)
133
134EnumValue
135Enum(sparc_processor_type) String(f934) Value(PROCESSOR_F934)
136
137EnumValue
138Enum(sparc_processor_type) String(sparclite86x) Value(PROCESSOR_SPARCLITE86X)
139
140EnumValue
141Enum(sparc_processor_type) String(sparclet) Value(PROCESSOR_SPARCLET)
142
143EnumValue
144Enum(sparc_processor_type) String(tsc701) Value(PROCESSOR_TSC701)
145
146EnumValue
147Enum(sparc_processor_type) String(v9) Value(PROCESSOR_V9)
148
149EnumValue
150Enum(sparc_processor_type) String(ultrasparc) Value(PROCESSOR_ULTRASPARC)
151
152EnumValue
153Enum(sparc_processor_type) String(ultrasparc3) Value(PROCESSOR_ULTRASPARC3)
154
155EnumValue
156Enum(sparc_processor_type) String(niagara) Value(PROCESSOR_NIAGARA)
157
158EnumValue
159Enum(sparc_processor_type) String(niagara2) Value(PROCESSOR_NIAGARA2)
160
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161EnumValue
162Enum(sparc_processor_type) String(niagara3) Value(PROCESSOR_NIAGARA3)
163
164EnumValue
165Enum(sparc_processor_type) String(niagara4) Value(PROCESSOR_NIAGARA4)
166
fe609b0f 167mcmodel=
55bea00a 168Target RejectNegative Joined Var(sparc_cmodel_string)
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169Use given SPARC-V9 code model
170
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171mstd-struct-return
172Target Report RejectNegative Var(sparc_std_struct_return)
173Enable strict 32-bit psABI struct return checking.
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174
175Mask(LITTLE_ENDIAN)
176;; Generate code for little-endian
177
178Mask(LONG_DOUBLE_128)
179;; Use 128-bit long double
180
181Mask(SPARCLITE)
182;; Generate code for SPARClite
183
184Mask(SPARCLET)
185;; Generate code for SPARClet
186
187Mask(V8)
188;; Generate code for SPARC-V8
189
190Mask(V9)
191;; Generate code for SPARC-V9
192
193Mask(DEPRECATED_V8_INSNS)
194;; Generate code that uses the V8 instructions deprecated
195;; in the V9 architecture.