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524729d5 | 1 | /* Definitions of target machine for GNU compiler, for SPUR chip. |
c5c76735 | 2 | Copyright (C) 1988, 1995, 1996, 1998, 1999 Free Software Foundation, Inc. |
524729d5 JW |
3 | |
4 | This file is part of GNU CC. | |
5 | ||
6 | GNU CC is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 2, or (at your option) | |
9 | any later version. | |
10 | ||
11 | GNU CC is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with GNU CC; see the file COPYING. If not, write to | |
c15c9075 RK |
18 | the Free Software Foundation, 59 Temple Place - Suite 330, |
19 | Boston, MA 02111-1307, USA. */ | |
524729d5 JW |
20 | |
21 | ||
22 | /* Note that some other tm.h files include this one and then override | |
23 | many of the definitions that relate to assembler syntax. */ | |
24 | ||
25 | ||
26 | /* Names to predefine in the preprocessor for this target machine. */ | |
27 | ||
65c42379 | 28 | #define CPP_PREDEFINES "-Dspur -Acpu(spur) -Amachine(spur)" |
524729d5 JW |
29 | |
30 | /* Link with libg.a when debugging, for dbx's sake. */ | |
31 | ||
32 | #define LIB_SPEC "%{g:-lg} %{!p:%{!pg:-lc}}%{p:-lc_p}%{pg:-lc_p} " | |
33 | ||
34 | /* Print subsidiary information on the compiler version in use. */ | |
35 | #define TARGET_VERSION fprintf (stderr, " (spur)"); | |
36 | ||
37 | /* Run-time compilation parameters selecting different hardware subsets. | |
38 | ||
39 | On the SPUR, we don't yet need any. */ | |
40 | ||
41 | extern int target_flags; | |
42 | ||
43 | /* Nonzero if we should generate code to use the fpu. */ | |
44 | #define TARGET_FPU (target_flags & 1) | |
45 | ||
46 | /* Nonzero if we should expand constant shifts into series of shift | |
47 | instructions. */ | |
48 | #define TARGET_EXPAND_SHIFTS (target_flags & 2) | |
49 | ||
50 | /* Nonzero if we should generate long jumps for compares. */ | |
51 | #define TARGET_LONG_JUMPS (target_flags & 4) | |
52 | ||
53 | /* Macro to define tables used to set the flags. | |
54 | This is a list in braces of pairs in braces, | |
55 | each pair being { "NAME", VALUE } | |
56 | where VALUE is the bits to set or minus the bits to clear. | |
57 | An empty string NAME is used to identify the default VALUE. */ | |
58 | ||
59 | #define TARGET_SWITCHES \ | |
60 | { {"fpu", 1}, \ | |
61 | {"soft-float", -1}, \ | |
62 | {"expand-shifts", 2}, \ | |
63 | {"lib-shifts", -2}, \ | |
64 | {"long-jumps", 4}, \ | |
65 | {"short-jumps", -4}, \ | |
66 | { "", TARGET_DEFAULT}} | |
67 | ||
68 | #define TARGET_DEFAULT 0 | |
69 | \f | |
70 | /* target machine storage layout */ | |
71 | ||
72 | /* Define this if most significant bit is lowest numbered | |
73 | in instructions that operate on numbered bit-fields. | |
74 | This is a moot question on the SPUR due to the lack of bit-field insns. */ | |
75 | #define BITS_BIG_ENDIAN 0 | |
76 | ||
77 | /* Define this if most significant byte of a word is the lowest numbered. */ | |
78 | /* That is not true on SPUR. */ | |
79 | #define BYTES_BIG_ENDIAN 0 | |
80 | ||
81 | /* Define this if most significant word of a multiword number is the lowest | |
82 | numbered. */ | |
83 | /* For SPUR we can decide arbitrarily | |
84 | since there are no machine instructions for them. */ | |
85 | #define WORDS_BIG_ENDIAN 0 | |
86 | ||
b4ac57ab | 87 | /* number of bits in an addressable storage unit */ |
524729d5 JW |
88 | #define BITS_PER_UNIT 8 |
89 | ||
90 | /* Width in bits of a "word", which is the contents of a machine register. | |
91 | Note that this is not necessarily the width of data type `int'; | |
92 | if using 16-bit ints on a 68000, this would still be 32. | |
93 | But on a machine with 16-bit registers, this would be 16. */ | |
94 | #define BITS_PER_WORD 32 | |
95 | ||
96 | /* Width of a word, in units (bytes). */ | |
97 | #define UNITS_PER_WORD 4 | |
98 | ||
99 | /* Width in bits of a pointer. | |
100 | See also the macro `Pmode' defined below. */ | |
101 | #define POINTER_SIZE 32 | |
102 | ||
103 | /* Allocation boundary (in *bits*) for storing arguments in argument list. */ | |
104 | #define PARM_BOUNDARY 64 | |
105 | ||
106 | /* Boundary (in *bits*) on which stack pointer should be aligned. */ | |
107 | #define STACK_BOUNDARY 64 | |
108 | ||
109 | /* Allocation boundary (in *bits*) for the code of a function. */ | |
110 | #define FUNCTION_BOUNDARY 32 | |
111 | ||
112 | /* Alignment of field after `int : 0' in a structure. */ | |
113 | #define EMPTY_FIELD_BOUNDARY 32 | |
114 | ||
115 | /* Every structure's size must be a multiple of this. */ | |
116 | #define STRUCTURE_SIZE_BOUNDARY 32 | |
117 | ||
118 | /* No data type wants to be aligned rounder than this. */ | |
119 | #define BIGGEST_ALIGNMENT 64 | |
120 | ||
b4ac57ab | 121 | /* Set this nonzero if move instructions will actually fail to work |
524729d5 | 122 | when given unaligned data. */ |
b4ac57ab | 123 | #define STRICT_ALIGNMENT 1 |
524729d5 JW |
124 | \f |
125 | /* Standard register usage. */ | |
126 | ||
127 | /* Number of actual hardware registers. | |
128 | The hardware registers are assigned numbers for the compiler | |
129 | from 0 to just below FIRST_PSEUDO_REGISTER. | |
130 | All registers that the compiler knows about must be given numbers, | |
131 | even those that are not normally considered general registers. | |
132 | ||
133 | SPUR has 32 fullword registers and 15 floating point registers. */ | |
134 | ||
135 | #define FIRST_PSEUDO_REGISTER 47 | |
136 | ||
137 | /* 1 for registers that have pervasive standard uses | |
138 | and are not available for the register allocator. | |
139 | On SPUR, this includes all the global registers | |
140 | and the callee return address register. */ | |
141 | #define FIXED_REGISTERS \ | |
142 | {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ | |
143 | 1, 0, 0, 0, 0, 0, \ | |
144 | 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, \ | |
145 | 1, 0, 0, 0, 0, 0, \ | |
146 | 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} | |
147 | ||
148 | /* 1 for registers not available across function calls. | |
149 | These must include the FIXED_REGISTERS and also any | |
150 | registers that can be used without being saved. | |
151 | The latter must include the registers where values are returned | |
152 | and the register where structure-value addresses are passed. | |
153 | Aside from that, you can include as many other registers as you like. */ | |
154 | #define CALL_USED_REGISTERS \ | |
155 | {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ | |
156 | 1, 0, 0, 0, 0, 0, \ | |
157 | 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, \ | |
158 | 1, 1, 1, 1, 1, 1, \ | |
159 | 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0} | |
160 | ||
161 | /* Return number of consecutive hard regs needed starting at reg REGNO | |
162 | to hold something of mode MODE. | |
163 | This is ordinarily the length in words of a value of mode MODE | |
164 | but can be less for certain modes in special long registers. | |
165 | ||
166 | On SPUR, ordinary registers hold 32 bits worth; | |
167 | a single floating point register is always enough for | |
168 | anything that can be stored in them at all. */ | |
169 | #define HARD_REGNO_NREGS(REGNO, MODE) \ | |
170 | ((REGNO) >= 32 ? GET_MODE_NUNITS ((MODE)) \ | |
171 | : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)) | |
172 | ||
173 | /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. | |
174 | On SPUR, the cpu registers can hold any mode but the float registers | |
175 | can hold only floating point. And they can't hold anything if use | |
176 | of hardware floating point is disabled. */ | |
177 | #define HARD_REGNO_MODE_OK(REGNO, MODE) \ | |
178 | (((REGNO) < 32 \ | |
179 | && (REGNO) + ((GET_MODE_UNIT_SIZE ((MODE)) + 3) / 4) <= 32) \ | |
180 | || (TARGET_FPU && ((MODE) == SFmode || (MODE) == DFmode \ | |
181 | || (MODE) == SCmode || (MODE) == DCmode))) | |
182 | ||
183 | /* Value is 1 if it is a good idea to tie two pseudo registers | |
184 | when one has mode MODE1 and one has mode MODE2. | |
185 | If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2, | |
186 | for any hard reg, then this must be 0 for correct output. */ | |
187 | #define MODES_TIEABLE_P(MODE1, MODE2) \ | |
188 | (((MODE1) == SFmode || (MODE1) == DFmode \ | |
189 | || (MODE1) == SCmode || (MODE1) == DCmode) \ | |
190 | == ((MODE2) == SFmode || (MODE2) == DFmode \ | |
191 | || (MODE2) == SCmode || (MODE2) == DCmode)) | |
192 | ||
193 | /* Specify the registers used for certain standard purposes. | |
194 | The values of these macros are register numbers. */ | |
195 | ||
196 | /* SPUR pc isn't overloaded on a register that the compiler knows about. */ | |
197 | /* #define PC_REGNUM */ | |
198 | ||
199 | /* Register to use for pushing function arguments. */ | |
200 | #define STACK_POINTER_REGNUM 4 | |
201 | ||
202 | /* Base register for access to local variables of the function. */ | |
203 | #define FRAME_POINTER_REGNUM 25 | |
204 | ||
205 | /* Value should be nonzero if functions must have frame pointers. | |
206 | Zero means the frame pointer need not be set up (and parms | |
207 | may be accessed via the stack pointer) in functions that seem suitable. | |
208 | This is computed in `reload', in reload1.c. */ | |
209 | #define FRAME_POINTER_REQUIRED 1 | |
210 | ||
211 | /* Base register for access to arguments of the function. */ | |
212 | #define ARG_POINTER_REGNUM 25 | |
213 | ||
214 | /* Register in which static-chain is passed to a function. */ | |
215 | /* ??? */ | |
216 | #define STATIC_CHAIN_REGNUM 8 | |
217 | ||
218 | /* Register in which address to store a structure value | |
219 | is passed to a function. */ | |
220 | #define STRUCT_VALUE_REGNUM 27 | |
221 | #define STRUCT_VALUE_INCOMING_REGNUM 11 | |
222 | \f | |
223 | /* Define the classes of registers for register constraints in the | |
224 | machine description. Also define ranges of constants. | |
225 | ||
226 | One of the classes must always be named ALL_REGS and include all hard regs. | |
227 | If there is more than one class, another class must be named NO_REGS | |
228 | and contain no registers. | |
229 | ||
230 | The name GENERAL_REGS must be the name of a class (or an alias for | |
231 | another name such as ALL_REGS). This is the class of registers | |
232 | that is allowed by "g" or "r" in a register constraint. | |
233 | Also, registers outside this class are allocated only when | |
234 | instructions express preferences for them. | |
235 | ||
236 | The classes must be numbered in nondecreasing order; that is, | |
237 | a larger-numbered class must never be contained completely | |
238 | in a smaller-numbered class. | |
239 | ||
240 | For any two classes, it is very desirable that there be another | |
241 | class that represents their union. */ | |
242 | ||
243 | /* The 68000 has two kinds of registers, hence four classes. */ | |
244 | ||
245 | enum reg_class { NO_REGS, GENERAL_REGS, FP_REGS, ALL_REGS, LIM_REG_CLASSES }; | |
246 | ||
247 | #define N_REG_CLASSES (int) LIM_REG_CLASSES | |
248 | ||
249 | /* Give names of register classes as strings for dump file. */ | |
250 | ||
251 | #define REG_CLASS_NAMES \ | |
252 | {"NO_REGS", "GENERAL_REGS", "FP_REGS", "ALL_REGS" } | |
253 | ||
254 | /* Define which registers fit in which classes. | |
255 | This is an initializer for a vector of HARD_REG_SET | |
256 | of length N_REG_CLASSES. */ | |
257 | ||
258 | #define REG_CLASS_CONTENTS {{0, 0}, {-1, 0}, {0, 0x7fff}, {-1, 0x7fff}} | |
259 | ||
260 | /* The same information, inverted: | |
261 | Return the class number of the smallest class containing | |
262 | reg number REGNO. This could be a conditional expression | |
263 | or could index an array. */ | |
264 | ||
265 | #define REGNO_REG_CLASS(REGNO) \ | |
266 | ((REGNO) >= 32 ? FP_REGS : GENERAL_REGS) | |
267 | ||
268 | /* The class value for index registers, and the one for base regs. */ | |
269 | #define INDEX_REG_CLASS GENERAL_REGS | |
270 | #define BASE_REG_CLASS GENERAL_REGS | |
271 | ||
272 | /* Get reg_class from a letter such as appears in the machine description. */ | |
273 | ||
274 | #define REG_CLASS_FROM_LETTER(C) \ | |
275 | ((C) == 'f' ? FP_REGS : NO_REGS) | |
276 | ||
277 | /* The letters I, J, K, L and M in a register constraint string | |
278 | can be used to stand for particular ranges of immediate operands. | |
279 | This macro defines what the ranges are. | |
280 | C is the letter, and VALUE is a constant value. | |
281 | Return 1 if VALUE is in the range specified by C. | |
282 | ||
283 | For SPUR, `I' is used for the range of constants an insn | |
284 | can actually contain. | |
285 | `J' is used for the range which is just zero (since that is R0). | |
286 | `K' is used for the 5-bit operand of a compare insns. */ | |
287 | ||
288 | #define CONST_OK_FOR_LETTER_P(VALUE, C) \ | |
289 | ((C) == 'I' ? (unsigned) ((VALUE) + 0x2000) < 0x4000 \ | |
290 | : (C) == 'J' ? (VALUE) == 0 \ | |
291 | : (C) == 'K' ? (unsigned) (VALUE) < 0x20 \ | |
292 | : 0) | |
293 | ||
294 | /* Similar, but for floating constants, and defining letters G and H. | |
295 | Here VALUE is the CONST_DOUBLE rtx itself. */ | |
296 | ||
297 | #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \ | |
298 | ((C) == 'G' && CONST_DOUBLE_HIGH (VALUE) == 0 \ | |
299 | && CONST_DOUBLE_LOW (VALUE) == 0) | |
300 | ||
301 | /* Given an rtx X being reloaded into a reg required to be | |
302 | in class CLASS, return the class of reg to actually use. | |
303 | In general this is just CLASS; but on some machines | |
304 | in some cases it is preferable to use a more restrictive class. */ | |
305 | #define PREFERRED_RELOAD_CLASS(X,CLASS) (CLASS) | |
306 | ||
307 | /* Return the maximum number of consecutive registers | |
308 | needed to represent mode MODE in a register of class CLASS. */ | |
309 | /* On SPUR, this is the size of MODE in words, | |
310 | except in the FP regs, where a single reg is always enough. */ | |
311 | #define CLASS_MAX_NREGS(CLASS, MODE) \ | |
312 | ((CLASS) == FP_REGS ? 1 \ | |
313 | : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)) | |
314 | \f | |
315 | /* Stack layout; function entry, exit and calling. */ | |
316 | ||
317 | /* Define this if pushing a word on the stack | |
318 | makes the stack pointer a smaller address. */ | |
319 | #define STACK_GROWS_DOWNWARD | |
320 | ||
321 | /* Define this if the nominal address of the stack frame | |
322 | is at the high-address end of the local variables; | |
323 | that is, each additional local variable allocated | |
324 | goes at a more negative offset in the frame. */ | |
325 | #define FRAME_GROWS_DOWNWARD | |
326 | ||
327 | /* Offset within stack frame to start allocating local variables at. | |
328 | If FRAME_GROWS_DOWNWARD, this is the offset to the END of the | |
329 | first local allocated. Otherwise, it is the offset to the BEGINNING | |
330 | of the first local allocated. */ | |
331 | #define STARTING_FRAME_OFFSET 0 | |
332 | ||
333 | /* If we generate an insn to push BYTES bytes, | |
334 | this says how many the stack pointer really advances by. | |
335 | On SPUR, don't define this because there are no push insns. */ | |
336 | /* #define PUSH_ROUNDING(BYTES) */ | |
337 | ||
338 | /* Offset of first parameter from the argument pointer register value. */ | |
339 | #define FIRST_PARM_OFFSET(FNDECL) 0 | |
340 | ||
341 | /* Value is the number of bytes of arguments automatically | |
342 | popped when returning from a subroutine call. | |
8b109b37 | 343 | FUNDECL is the declaration node of the function (as a tree), |
524729d5 JW |
344 | FUNTYPE is the data type of the function (as a tree), |
345 | or for a library call it is an identifier node for the subroutine name. | |
346 | SIZE is the number of bytes of arguments passed on the stack. */ | |
347 | ||
8b109b37 | 348 | #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0 |
524729d5 JW |
349 | |
350 | /* Define how to find the value returned by a function. | |
351 | VALTYPE is the data type of the value (as a tree). | |
352 | If the precise function being called is known, FUNC is its FUNCTION_DECL; | |
353 | otherwise, FUNC is 0. */ | |
354 | ||
355 | /* On SPUR the value is found in the second "output" register. */ | |
356 | ||
357 | #define FUNCTION_VALUE(VALTYPE, FUNC) \ | |
c5c76735 | 358 | gen_rtx_REG (TYPE_MODE (VALTYPE), 27) |
524729d5 JW |
359 | |
360 | /* But the called function leaves it in the second "input" register. */ | |
361 | ||
362 | #define FUNCTION_OUTGOING_VALUE(VALTYPE, FUNC) \ | |
c5c76735 | 363 | gen_rtx_REG (TYPE_MODE (VALTYPE), 11) |
524729d5 JW |
364 | |
365 | /* Define how to find the value returned by a library function | |
366 | assuming the value has mode MODE. */ | |
367 | ||
c5c76735 | 368 | #define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, 27) |
524729d5 JW |
369 | |
370 | /* 1 if N is a possible register number for a function value | |
371 | as seen by the caller. | |
372 | On SPUR, the first "output" reg is the only register thus used. */ | |
373 | ||
374 | #define FUNCTION_VALUE_REGNO_P(N) ((N) == 27) | |
375 | ||
376 | /* 1 if N is a possible register number for function argument passing. | |
377 | On SPUR, these are the "output" registers. */ | |
378 | ||
379 | #define FUNCTION_ARG_REGNO_P(N) ((N) < 32 && (N) > 26) | |
8abded10 TW |
380 | |
381 | /* Define this macro if the target machine has "register windows". This | |
382 | C expression returns the register number as seen by the called function | |
383 | corresponding to register number OUT as seen by the calling function. | |
384 | Return OUT if register number OUT is not an outbound register. */ | |
385 | ||
386 | #define INCOMING_REGNO(OUT) \ | |
387 | (((OUT) < 27 || (OUT) > 31) ? (OUT) : (OUT) - 16) | |
388 | ||
389 | /* Define this macro if the target machine has "register windows". This | |
390 | C expression returns the register number as seen by the calling function | |
391 | corresponding to register number IN as seen by the called function. | |
392 | Return IN if register number IN is not an inbound register. */ | |
393 | ||
394 | #define OUTGOING_REGNO(IN) \ | |
395 | (((IN) < 11 || (IN) > 15) ? (IN) : (IN) + 16) | |
524729d5 JW |
396 | \f |
397 | /* Define a data type for recording info about an argument list | |
398 | during the scan of that argument list. This data type should | |
399 | hold all necessary information about the function itself | |
400 | and about the args processed so far, enough to enable macros | |
401 | such as FUNCTION_ARG to determine where the next arg should go. | |
402 | ||
403 | On SPUR, this is a single integer, which is a number of words | |
404 | of arguments scanned so far (including the invisible argument, | |
405 | if any, which holds the structure-value-address). | |
406 | Thus 5 or more means all following args should go on the stack. */ | |
407 | ||
408 | #define CUMULATIVE_ARGS int | |
409 | ||
410 | /* Initialize a variable CUM of type CUMULATIVE_ARGS | |
411 | for a call to a function whose data type is FNTYPE. | |
412 | For a library call, FNTYPE is 0. | |
413 | ||
414 | On SPUR, the offset normally starts at 0, but starts at 4 bytes | |
415 | when the function gets a structure-value-address as an | |
416 | invisible first argument. */ | |
417 | ||
2c7ee1a6 | 418 | #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT) \ |
76c30596 | 419 | ((CUM) = ((FNTYPE) != 0 && aggregate_value_p (TREE_TYPE ((FNTYPE))))) |
524729d5 JW |
420 | |
421 | /* Update the data in CUM to advance over an argument | |
422 | of mode MODE and data type TYPE. | |
423 | (TYPE is null for libcalls where that information may not be available.) */ | |
424 | ||
425 | #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \ | |
426 | ((CUM) += ((MODE) != BLKmode \ | |
427 | ? (GET_MODE_SIZE (MODE) + 3) / 4 \ | |
428 | : (int_size_in_bytes (TYPE) + 3) / 4)) | |
429 | ||
430 | /* Determine where to put an argument to a function. | |
431 | Value is zero to push the argument on the stack, | |
432 | or a hard register in which to store the argument. | |
433 | ||
434 | MODE is the argument's machine mode. | |
435 | TYPE is the data type of the argument (as a tree). | |
436 | This is null for libcalls where that information may | |
437 | not be available. | |
438 | CUM is a variable of type CUMULATIVE_ARGS which gives info about | |
439 | the preceding args and about the function being called. | |
440 | NAMED is nonzero if this argument is a named parameter | |
441 | (otherwise it is an extra parameter matching an ellipsis). */ | |
442 | ||
443 | /* On SPUR the first five words of args are normally in registers | |
444 | and the rest are pushed. But any arg that won't entirely fit in regs | |
445 | is pushed. */ | |
446 | ||
447 | #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ | |
448 | (5 >= ((CUM) \ | |
449 | + ((MODE) == BLKmode \ | |
450 | ? (int_size_in_bytes (TYPE) + 3) / 4 \ | |
451 | : (GET_MODE_SIZE (MODE) + 3) / 4)) \ | |
c5c76735 | 452 | ? gen_rtx_REG ((MODE), 27 + (CUM)) \ |
524729d5 JW |
453 | : 0) |
454 | ||
455 | /* Define where a function finds its arguments. | |
456 | This is different from FUNCTION_ARG because of register windows. */ | |
457 | ||
458 | #define FUNCTION_INCOMING_ARG(CUM, MODE, TYPE, NAMED) \ | |
459 | (5 >= ((CUM) \ | |
460 | + ((MODE) == BLKmode \ | |
461 | ? (int_size_in_bytes (TYPE) + 3) / 4 \ | |
462 | : (GET_MODE_SIZE (MODE) + 3) / 4)) \ | |
c5c76735 | 463 | ? gen_rtx_REG ((MODE), 11 + (CUM)) \ |
524729d5 JW |
464 | : 0) |
465 | ||
466 | /* For an arg passed partly in registers and partly in memory, | |
467 | this is the number of registers used. | |
468 | For args passed entirely in registers or entirely in memory, zero. */ | |
469 | ||
470 | #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) 0 | |
471 | ||
472 | /* This macro generates the assembly code for function entry. | |
473 | FILE is a stdio stream to output the code to. | |
474 | SIZE is an int: how many units of temporary storage to allocate. | |
475 | Refer to the array `regs_ever_live' to determine which registers | |
476 | to save; `regs_ever_live[I]' is nonzero if register number I | |
477 | is ever used in the function. This macro is responsible for | |
478 | knowing which registers should not be saved even if used. */ | |
479 | ||
480 | /* On spur, move-double insns between fpu and cpu need an 8-byte block | |
481 | of memory. If any fpu reg is used in the function, we allocate | |
482 | such a block here, at the bottom of the frame, just in case it's needed. */ | |
483 | ||
484 | #define FUNCTION_PROLOGUE(FILE, SIZE) \ | |
485 | { \ | |
486 | extern char call_used_regs[]; \ | |
524729d5 JW |
487 | int fsize = ((SIZE) + 7) & ~7; \ |
488 | int nregs, i, fp_used = 0; \ | |
489 | for (i = 32, nregs = 0; i < FIRST_PSEUDO_REGISTER; i++) \ | |
490 | { \ | |
491 | if (regs_ever_live[i] && ! call_used_regs[i]) \ | |
492 | nregs++; \ | |
493 | if (regs_ever_live[i]) fp_used = 1; \ | |
494 | } \ | |
495 | if (fp_used) fsize += 8; \ | |
496 | fprintf (FILE, "0:\trd_special r24,pc\n"); \ | |
497 | fprintf (FILE, "\tand r24,r24,$~0x3\n"); \ | |
498 | fprintf (FILE, "\tadd_nt r25,r4,$%d\n", \ | |
499 | - current_function_pretend_args_size); \ | |
500 | if (fsize + nregs != 0 || current_function_pretend_args_size > 0)\ | |
501 | { \ | |
502 | int n = - fsize - nregs * 16; \ | |
503 | if (n >= -8192) \ | |
504 | fprintf (FILE, "\tadd_nt r4,r25,$%d\n", n); \ | |
505 | else \ | |
506 | { \ | |
507 | fprintf (FILE, "\tadd_nt r4,r25,$-8192\n"); \ | |
508 | n += 8192; \ | |
509 | while (n < -8192) \ | |
510 | fprintf (FILE, "\tadd_nt r4,r4,$-8192\n"), n += 8192; \ | |
511 | if (n != 0) \ | |
512 | fprintf (FILE, "\tadd_nt r4,r4,$%d\n", n); \ | |
513 | } \ | |
514 | } \ | |
515 | for (i = 32, nregs = 0; i < FIRST_PSEUDO_REGISTER; i++) \ | |
516 | if (regs_ever_live[i] && ! call_used_regs[i]) \ | |
517 | { \ | |
518 | fprintf (FILE, "\tst_ext1 %s,r4,$%d\n", \ | |
519 | reg_names[i], 8 * nregs++); \ | |
520 | fprintf (FILE, "\tst_ext2 %s,r4,$%d\n", \ | |
521 | reg_names[i], 8 * nregs++); \ | |
522 | } \ | |
523 | } | |
524 | ||
525 | /* Output assembler code to FILE to increment profiler label # LABELNO | |
526 | for profiling a function entry. */ | |
527 | ||
528 | #define FUNCTION_PROFILER(FILE, LABELNO) \ | |
529 | abort (); | |
530 | ||
531 | /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, | |
532 | the stack pointer does not matter. The value is tested only in | |
533 | functions that have frame pointers. | |
534 | No definition is equivalent to always zero. */ | |
535 | ||
524729d5 JW |
536 | #define EXIT_IGNORE_STACK \ |
537 | (get_frame_size () != 0 \ | |
538 | || current_function_calls_alloca || current_function_pretend_args_size) | |
539 | ||
540 | /* This macro generates the assembly code for function exit, | |
541 | on machines that need it. If FUNCTION_EPILOGUE is not defined | |
542 | then individual return instructions are generated for each | |
543 | return statement. Args are same as for FUNCTION_PROLOGUE. | |
544 | ||
545 | The function epilogue should not depend on the current stack pointer! | |
546 | It should use the frame pointer only. This is mandatory because | |
547 | of alloca; we also take advantage of it to omit stack adjustments | |
548 | before returning. */ | |
549 | ||
550 | #define FUNCTION_EPILOGUE(FILE, SIZE) \ | |
551 | { \ | |
552 | extern char call_used_regs[]; \ | |
524729d5 JW |
553 | int fsize = ((SIZE) + 7) & ~7; \ |
554 | int nregs, i, fp_used = 0; \ | |
555 | for (i = 32, nregs = 0; i < FIRST_PSEUDO_REGISTER; i++) \ | |
556 | { \ | |
557 | if (regs_ever_live[i] && ! call_used_regs[i]) \ | |
558 | nregs++; \ | |
559 | if (regs_ever_live[i]) fp_used = 1; \ | |
560 | } \ | |
561 | if (fp_used) fsize += 8; \ | |
562 | if (nregs != 0) \ | |
563 | { \ | |
564 | fprintf (FILE, "\tadd_nt r4,r25,$%d\n", - fsize - nregs * 16); \ | |
565 | for (i = 32, nregs = 0; i < FIRST_PSEUDO_REGISTER; i++) \ | |
566 | if (regs_ever_live[i] && ! call_used_regs[i]) \ | |
567 | { \ | |
568 | fprintf (FILE, "\tld_ext1 %s,r4,$%d\n\tnop\n", \ | |
569 | reg_names[i], 8 * nregs++); \ | |
570 | fprintf (FILE, "\tld_ext2 %s,r4,$%d\n\tnop\n", \ | |
571 | reg_names[i], 8 * nregs++); \ | |
572 | } \ | |
573 | } \ | |
574 | if (fsize != 0 || nregs != 0 || current_function_calls_alloca \ | |
575 | || current_function_pretend_args_size > 0) \ | |
576 | fprintf (FILE, "\tadd_nt r4,r25,$%d\n", \ | |
577 | current_function_pretend_args_size); \ | |
578 | fprintf (FILE, "\treturn r10,$8\n\tnop\n"); \ | |
579 | } | |
580 | \f | |
581 | /* Addressing modes, and classification of registers for them. */ | |
582 | ||
940da324 JL |
583 | /* #define HAVE_POST_INCREMENT 0 */ |
584 | /* #define HAVE_POST_DECREMENT 0 */ | |
524729d5 | 585 | |
940da324 JL |
586 | /* #define HAVE_PRE_DECREMENT 0 */ |
587 | /* #define HAVE_PRE_INCREMENT 0 */ | |
524729d5 JW |
588 | |
589 | /* Macros to check register numbers against specific register classes. */ | |
590 | ||
591 | /* These assume that REGNO is a hard or pseudo reg number. | |
592 | They give nonzero only if REGNO is a hard reg of the suitable class | |
593 | or a pseudo reg currently allocated to a suitable hard reg. | |
594 | Since they use reg_renumber, they are safe only once reg_renumber | |
595 | has been allocated, which happens in local-alloc.c. */ | |
596 | ||
597 | #define REGNO_OK_FOR_INDEX_P(REGNO) \ | |
598 | ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32) | |
599 | #define REGNO_OK_FOR_BASE_P(REGNO) \ | |
600 | ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32) | |
601 | #define REGNO_OK_FOR_FP_P(REGNO) \ | |
602 | (((REGNO) ^ 0x20) < 14 || (unsigned) (reg_renumber[REGNO] ^ 0x20) < 14) | |
603 | ||
604 | /* Now macros that check whether X is a register and also, | |
605 | strictly, whether it is in a specified class. | |
606 | ||
607 | These macros are specific to the SPUR, and may be used only | |
608 | in code for printing assembler insns and in conditions for | |
609 | define_optimization. */ | |
610 | ||
611 | /* 1 if X is an fp register. */ | |
612 | ||
613 | #define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X))) | |
614 | \f | |
615 | /* Maximum number of registers that can appear in a valid memory address. */ | |
616 | ||
617 | #define MAX_REGS_PER_ADDRESS 2 | |
618 | ||
619 | /* Recognize any constant value that is a valid address. */ | |
620 | ||
6eff269e BK |
621 | #define CONSTANT_ADDRESS_P(X) \ |
622 | (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \ | |
623 | || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \ | |
624 | || GET_CODE (X) == HIGH) | |
524729d5 JW |
625 | |
626 | /* Nonzero if the constant value X is a legitimate general operand. | |
627 | It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */ | |
628 | ||
629 | #define LEGITIMATE_CONSTANT_P(X) \ | |
630 | ((GET_CODE (X) == CONST_INT \ | |
631 | && (unsigned) (INTVAL (X) + 0x2000) < 0x4000)\ | |
632 | || (GET_CODE (X) == SYMBOL_REF && (X)->unchanging)) | |
633 | ||
634 | /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx | |
635 | and check its validity for a certain class. | |
636 | We have two alternate definitions for each of them. | |
637 | The usual definition accepts all pseudo regs; the other rejects | |
638 | them unless they have been allocated suitable hard regs. | |
639 | The symbol REG_OK_STRICT causes the latter definition to be used. | |
640 | ||
641 | Most source files want to accept pseudo regs in the hope that | |
642 | they will get allocated to the class that the insn wants them to be in. | |
643 | Source files for reload pass need to be strict. | |
644 | After reload, it makes no difference, since pseudo regs have | |
645 | been eliminated by then. */ | |
646 | ||
647 | #ifndef REG_OK_STRICT | |
648 | ||
649 | /* Nonzero if X is a hard reg that can be used as an index | |
650 | or if it is a pseudo reg. */ | |
651 | #define REG_OK_FOR_INDEX_P(X) (((unsigned) REGNO (X)) - 32 >= 14) | |
652 | /* Nonzero if X is a hard reg that can be used as a base reg | |
653 | or if it is a pseudo reg. */ | |
654 | #define REG_OK_FOR_BASE_P(X) (((unsigned) REGNO (X)) - 32 >= 14) | |
655 | ||
656 | #else | |
657 | ||
658 | /* Nonzero if X is a hard reg that can be used as an index. */ | |
659 | #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X)) | |
660 | /* Nonzero if X is a hard reg that can be used as a base reg. */ | |
661 | #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X)) | |
662 | ||
663 | #endif | |
664 | \f | |
665 | /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression | |
666 | that is a valid memory address for an instruction. | |
667 | The MODE argument is the machine mode for the MEM expression | |
668 | that wants to use this address. | |
669 | ||
670 | On SPUR, the actual legitimate addresses must be REG+SMALLINT or REG+REG. | |
671 | Actually, REG+REG is not legitimate for stores, so | |
672 | it is obtained only by combination on loads. | |
673 | We can treat a SYMBOL_REF as legitimate if it is part of this | |
674 | function's constant-pool, because such addresses can actually | |
675 | be output as REG+SMALLINT. */ | |
676 | ||
677 | #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ | |
678 | { if (GET_CODE (X) == REG \ | |
679 | && REG_OK_FOR_BASE_P (X)) \ | |
680 | goto ADDR; \ | |
681 | if (GET_CODE (X) == SYMBOL_REF && (X)->unchanging) \ | |
682 | goto ADDR; \ | |
683 | if (GET_CODE (X) == PLUS \ | |
684 | && GET_CODE (XEXP (X, 0)) == REG \ | |
685 | && REG_OK_FOR_BASE_P (XEXP (X, 0))) \ | |
686 | { \ | |
687 | if (GET_CODE (XEXP (X, 1)) == CONST_INT \ | |
688 | && INTVAL (XEXP (X, 1)) >= -0x2000 \ | |
689 | && INTVAL (XEXP (X, 1)) < 0x2000) \ | |
690 | goto ADDR; \ | |
691 | } \ | |
692 | } | |
693 | \f | |
694 | /* Try machine-dependent ways of modifying an illegitimate address | |
695 | to be legitimate. If we find one, return the new, valid address. | |
696 | This macro is used in only one place: `memory_address' in explow.c. | |
697 | ||
698 | OLDX is the address as it was before break_out_memory_refs was called. | |
699 | In some cases it is useful to look at this to decide what needs to be done. | |
700 | ||
701 | MODE and WIN are passed so that this macro can use | |
702 | GO_IF_LEGITIMATE_ADDRESS. | |
703 | ||
704 | It is always safe for this macro to do nothing. It exists to recognize | |
705 | opportunities to optimize the output. */ | |
706 | ||
707 | /* On SPUR, change REG+N into REG+REG, and REG+(X*Y) into REG+REG. */ | |
708 | ||
709 | #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \ | |
710 | { if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 1))) \ | |
c5c76735 JL |
711 | (X) = gen_rtx_PLUS (SImode, XEXP (X, 0), \ |
712 | copy_to_mode_reg (SImode, XEXP (X, 1))); \ | |
524729d5 | 713 | if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 0))) \ |
c5c76735 JL |
714 | (X) = gen_rtx_PLUS (SImode, XEXP (X, 1), \ |
715 | copy_to_mode_reg (SImode, XEXP (X, 0))); \ | |
524729d5 | 716 | if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == MULT) \ |
c5c76735 JL |
717 | (X) = gen_rtx_PLUS (SImode, XEXP (X, 1), \ |
718 | force_operand (XEXP (X, 0), 0)); \ | |
524729d5 | 719 | if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == MULT) \ |
c5c76735 JL |
720 | (X) = gen_rtx_PLUS (SImode, XEXP (X, 0), \ |
721 | force_operand (XEXP (X, 1), 0)); \ | |
524729d5 JW |
722 | if (memory_address_p (MODE, X)) \ |
723 | goto WIN; } | |
724 | ||
725 | /* Go to LABEL if ADDR (a legitimate address expression) | |
726 | has an effect that depends on the machine mode it is used for. | |
727 | On the SPUR this is never true. */ | |
728 | ||
729 | #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) | |
730 | \f | |
731 | /* Specify the machine mode that this machine uses | |
732 | for the index in the tablejump instruction. */ | |
733 | #define CASE_VECTOR_MODE SImode | |
734 | ||
18543a22 ILT |
735 | /* Define as C expression which evaluates to nonzero if the tablejump |
736 | instruction expects the table to contain offsets from the address of the | |
737 | table. | |
738 | Do not define this if the table should contain absolute addresses. */ | |
739 | /* #define CASE_VECTOR_PC_RELATIVE 1 */ | |
524729d5 JW |
740 | |
741 | /* Specify the tree operation to be used to convert reals to integers. */ | |
742 | #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR | |
743 | ||
744 | /* This is the kind of divide that is easiest to do in the general case. */ | |
745 | #define EASY_DIV_EXPR TRUNC_DIV_EXPR | |
746 | ||
747 | /* Define this as 1 if `char' should by default be signed; else as 0. */ | |
748 | #define DEFAULT_SIGNED_CHAR 0 | |
749 | ||
750 | /* Max number of bytes we can move from memory to memory | |
751 | in one reasonably fast instruction. */ | |
752 | #define MOVE_MAX 4 | |
753 | ||
754 | /* Nonzero if access to memory by bytes is slow and undesirable. */ | |
755 | #define SLOW_BYTE_ACCESS 1 | |
756 | ||
757 | /* This is BSD, so it wants DBX format. */ | |
758 | #define DBX_DEBUGGING_INFO | |
759 | ||
760 | /* Do not break .stabs pseudos into continuations. */ | |
761 | #define DBX_CONTIN_LENGTH 0 | |
762 | ||
763 | /* Don't try to use the `x' type-cross-reference character in DBX data. | |
764 | Also has the consequence of putting each struct, union or enum | |
765 | into a separate .stabs, containing only cross-refs to the others. */ | |
766 | #define DBX_NO_XREFS | |
767 | ||
768 | /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits | |
769 | is done just by pretending it is already truncated. */ | |
770 | #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 | |
771 | ||
772 | /* Specify the machine mode that pointers have. | |
773 | After generation of rtl, the compiler makes no further distinction | |
774 | between pointers and any other objects of this machine mode. */ | |
775 | #define Pmode SImode | |
776 | ||
777 | /* A function address in a call instruction | |
778 | is a byte address (for indexing purposes) | |
779 | so give the MEM rtx a byte's mode. */ | |
780 | #define FUNCTION_MODE SImode | |
781 | ||
782 | /* Define this if addresses of constant functions | |
783 | shouldn't be put through pseudo regs where they can be cse'd. | |
784 | Desirable on machines where ordinary constants are expensive | |
785 | but a CALL with constant address is cheap. */ | |
786 | #define NO_FUNCTION_CSE | |
787 | ||
788 | /* Compute the cost of computing a constant rtl expression RTX | |
789 | whose rtx-code is CODE. The body of this macro is a portion | |
790 | of a switch statement. If the code is computed here, | |
791 | return it with a return statement. Otherwise, break from the switch. */ | |
792 | ||
e1fde2b5 | 793 | #define CONST_COSTS(RTX,CODE,OUTER_CODE) \ |
524729d5 JW |
794 | case CONST_INT: \ |
795 | if (INTVAL (RTX) < 0x2000 && INTVAL (RTX) >= -0x2000) return 1; \ | |
796 | case CONST: \ | |
797 | case LABEL_REF: \ | |
798 | case SYMBOL_REF: \ | |
799 | return 2; \ | |
800 | case CONST_DOUBLE: \ | |
801 | return 4; | |
802 | \f | |
803 | /* Tell final.c how to eliminate redundant test instructions. */ | |
804 | ||
805 | /* Here we define machine-dependent flags and fields in cc_status | |
806 | (see `conditions.h'). */ | |
807 | ||
808 | /* (None are needed on SPUR.) */ | |
809 | ||
810 | /* Store in cc_status the expressions | |
811 | that the condition codes will describe | |
812 | after execution of an instruction whose pattern is EXP. | |
813 | Do not alter them if the instruction would not alter the cc's. */ | |
814 | ||
815 | /* The SPUR does not really have a condition code. */ | |
816 | ||
817 | #define NOTICE_UPDATE_CC(EXP, INSN) \ | |
818 | { CC_STATUS_INIT; } | |
819 | \f | |
820 | /* Control the assembler format that we output. */ | |
821 | ||
822 | /* Output at beginning of assembler file. */ | |
823 | ||
824 | #define ASM_FILE_START(FILE) | |
825 | ||
826 | /* Output to assembler file text saying following lines | |
827 | may contain character constants, extra white space, comments, etc. */ | |
828 | ||
829 | #define ASM_APP_ON "" | |
830 | ||
831 | /* Output to assembler file text saying following lines | |
832 | no longer contain unusual constructs. */ | |
833 | ||
834 | #define ASM_APP_OFF "" | |
835 | ||
836 | /* Output before read-only data. */ | |
837 | ||
838 | #define TEXT_SECTION_ASM_OP ".text" | |
839 | ||
840 | /* Output before writable data. */ | |
841 | ||
842 | #define DATA_SECTION_ASM_OP ".data" | |
843 | ||
844 | /* How to refer to registers in assembler output. | |
845 | This sequence is indexed by compiler's hard-register-number (see above). */ | |
846 | ||
847 | #define REGISTER_NAMES \ | |
848 | {"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", \ | |
849 | "r10", "r11", "r12", "r13", "r14", "r15", "r16", "r17", "r18", "r19", \ | |
850 | "r20", "r21", "r22", "r23", "r24", "r25", "r26", "r27", "r28", "r29", \ | |
851 | "r30", "r31", \ | |
852 | "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", "f8", "f9", \ | |
853 | "f10", "f11", "f12", "f13", "f14" } | |
854 | ||
855 | /* How to renumber registers for dbx and gdb. */ | |
856 | ||
857 | #define DBX_REGISTER_NUMBER(REGNO) (REGNO) | |
858 | ||
859 | /* This is how to output the definition of a user-level label named NAME, | |
860 | such as the label on a static function or variable NAME. */ | |
861 | ||
862 | #define ASM_OUTPUT_LABEL(FILE,NAME) \ | |
863 | do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0) | |
864 | ||
865 | /* This is how to output a command to make the user-level label named NAME | |
866 | defined for reference from other files. */ | |
867 | ||
868 | #define ASM_GLOBALIZE_LABEL(FILE,NAME) \ | |
869 | do { fputs (".globl ", FILE); assemble_name (FILE, NAME); fputs ("\n", FILE);} while (0) | |
870 | ||
4e0c8ad2 | 871 | /* The prefix to add to user-visible assembler symbols. */ |
524729d5 | 872 | |
4e0c8ad2 | 873 | #define USER_LABEL_PREFIX "_" |
524729d5 JW |
874 | |
875 | /* This is how to output an internal numbered label where | |
876 | PREFIX is the class of label and NUM is the number within the class. */ | |
877 | ||
878 | #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \ | |
879 | fprintf (FILE, "%s%d:\n", PREFIX, NUM) | |
880 | ||
881 | /* This is how to store into the string LABEL | |
882 | the symbol_ref name of an internal numbered label where | |
883 | PREFIX is the class of label and NUM is the number within the class. | |
884 | This is suitable for output with `assemble_name'. */ | |
885 | ||
886 | #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \ | |
887 | sprintf (LABEL, "*%s%d", PREFIX, NUM) | |
888 | ||
889 | /* This is how to output an assembler line defining a `double' constant. */ | |
890 | ||
891 | #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \ | |
892 | fprintf (FILE, "\t.double %.20e\n", (VALUE)) | |
893 | ||
894 | /* This is how to output an assembler line defining a `float' constant. */ | |
895 | ||
896 | #define ASM_OUTPUT_FLOAT(FILE,VALUE) \ | |
897 | fprintf (FILE, "\t.single %.12e\n", (VALUE)) | |
898 | ||
899 | /* This is how to output an assembler line defining an `int' constant. */ | |
900 | ||
901 | #define ASM_OUTPUT_INT(FILE,VALUE) \ | |
902 | ( fprintf (FILE, "\t.long "), \ | |
903 | output_addr_const (FILE, (VALUE)), \ | |
904 | fprintf (FILE, "\n")) | |
905 | ||
906 | /* Likewise for `char' and `short' constants. */ | |
907 | ||
908 | #define ASM_OUTPUT_SHORT(FILE,VALUE) \ | |
909 | ( fprintf (FILE, "\t.word "), \ | |
910 | output_addr_const (FILE, (VALUE)), \ | |
911 | fprintf (FILE, "\n")) | |
912 | ||
913 | #define ASM_OUTPUT_CHAR(FILE,VALUE) \ | |
914 | ( fprintf (FILE, "\t.byte "), \ | |
915 | output_addr_const (FILE, (VALUE)), \ | |
916 | fprintf (FILE, "\n")) | |
917 | ||
918 | /* This is how to output an assembler line for a numeric constant byte. */ | |
919 | ||
920 | #define ASM_OUTPUT_BYTE(FILE,VALUE) \ | |
921 | fprintf (FILE, "\t.byte 0x%x\n", (VALUE)) | |
922 | ||
923 | /* This is how to output code to push a register on the stack. | |
924 | It need not be very fast code. */ | |
925 | ||
926 | #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \ | |
927 | fprintf (FILE, "\tadd_nt r4,r4,$-4\n\tst_32 %s,r4,$0\n", reg_names[REGNO]) | |
928 | ||
929 | /* This is how to output an insn to pop a register from the stack. | |
930 | It need not be very fast code. */ | |
931 | ||
932 | #define ASM_OUTPUT_REG_POP(FILE,REGNO) \ | |
933 | fprintf (FILE, "\tld_32 %s,r4,$0\n\tadd_nt r4,r4,$4\n", reg_names[REGNO]) | |
934 | ||
935 | /* This is how to output an element of a case-vector that is absolute. */ | |
936 | ||
937 | #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \ | |
938 | fprintf (FILE, "\t.long L%d\n", VALUE) | |
939 | ||
940 | /* This is how to output an element of a case-vector that is relative. | |
941 | (SPUR does not use such vectors, | |
942 | but we must define this macro anyway.) */ | |
943 | ||
33f7f353 | 944 | #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \ |
524729d5 JW |
945 | fprintf (FILE, "\t.word L%d-L%d\n", VALUE, REL) |
946 | ||
947 | /* This is how to output an assembler line | |
948 | that says to advance the location counter | |
949 | to a multiple of 2**LOG bytes. */ | |
950 | ||
951 | #define ASM_OUTPUT_ALIGN(FILE,LOG) \ | |
952 | if ((LOG) != 0) \ | |
953 | fprintf (FILE, "\t.align %d\n", (LOG)) | |
954 | ||
955 | #define ASM_OUTPUT_SKIP(FILE,SIZE) \ | |
956 | fprintf (FILE, "\t.space %u\n", (SIZE)) | |
957 | ||
958 | /* This says how to output an assembler line | |
959 | to define a global common symbol. */ | |
960 | ||
961 | #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \ | |
962 | ( fputs (".comm ", (FILE)), \ | |
963 | assemble_name ((FILE), (NAME)), \ | |
964 | fprintf ((FILE), ",%u\n", (ROUNDED))) | |
965 | ||
966 | /* This says how to output an assembler line | |
967 | to define a local common symbol. */ | |
968 | ||
969 | #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \ | |
970 | ( fputs (".lcomm ", (FILE)), \ | |
971 | assemble_name ((FILE), (NAME)), \ | |
972 | fprintf ((FILE), ",%u\n", (ROUNDED))) | |
973 | ||
974 | /* Store in OUTPUT a string (made with alloca) containing | |
975 | an assembler-name for a local static variable named NAME. | |
976 | LABELNO is an integer which is different for each call. */ | |
977 | ||
978 | #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ | |
979 | ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \ | |
980 | sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO))) | |
981 | ||
982 | /* Define the parentheses used to group arithmetic operations | |
983 | in assembler code. */ | |
984 | ||
985 | #define ASM_OPEN_PAREN "(" | |
986 | #define ASM_CLOSE_PAREN ")" | |
987 | ||
988 | /* Define results of standard character escape sequences. */ | |
989 | #define TARGET_BELL 007 | |
990 | #define TARGET_BS 010 | |
991 | #define TARGET_TAB 011 | |
992 | #define TARGET_NEWLINE 012 | |
993 | #define TARGET_VT 013 | |
994 | #define TARGET_FF 014 | |
995 | #define TARGET_CR 015 | |
996 | ||
997 | /* Print operand X (an rtx) in assembler syntax to file FILE. | |
998 | CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified. | |
999 | For `%' followed by punctuation, CODE is the punctuation and X is null. | |
1000 | ||
1001 | On SPUR, the CODE can be `r', meaning this is a register-only operand | |
1002 | and an immediate zero should be represented as `r0'. */ | |
1003 | ||
1004 | #define PRINT_OPERAND(FILE, X, CODE) \ | |
1005 | { if (GET_CODE (X) == REG) \ | |
1006 | fprintf (FILE, "%s", reg_names[REGNO (X)]); \ | |
1007 | else if (GET_CODE (X) == MEM) \ | |
1008 | output_address (XEXP (X, 0)); \ | |
1009 | else if (GET_CODE (X) == CONST_DOUBLE) \ | |
1010 | abort (); \ | |
1011 | else if ((CODE) == 'r' && (X) == const0_rtx) \ | |
1012 | fprintf (FILE, "r0"); \ | |
1013 | else { putc ('$', FILE); output_addr_const (FILE, X); }} | |
1014 | \f | |
1015 | /* Print a memory address as an operand to reference that memory location. */ | |
1016 | ||
1017 | #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \ | |
1018 | { register rtx base, index = 0; \ | |
1019 | int offset = 0; \ | |
1020 | register rtx addr = ADDR; \ | |
1021 | if (GET_CODE (addr) == REG) \ | |
1022 | { \ | |
1023 | fprintf (FILE, "%s,$0", reg_names[REGNO (addr)]); \ | |
1024 | } \ | |
1025 | else if (GET_CODE (addr) == PLUS) \ | |
1026 | { \ | |
1027 | if (GET_CODE (XEXP (addr, 0)) == CONST_INT) \ | |
1028 | offset = INTVAL (XEXP (addr, 0)), base = XEXP (addr, 1);\ | |
1029 | else if (GET_CODE (XEXP (addr, 1)) == CONST_INT) \ | |
1030 | offset = INTVAL (XEXP (addr, 1)), base = XEXP (addr, 0);\ | |
1031 | else \ | |
1032 | base = XEXP (addr, 0), index = XEXP (addr, 1); \ | |
1033 | fprintf (FILE, "%s,", reg_names[REGNO (base)]); \ | |
1034 | if (index == 0) \ | |
1035 | fprintf (FILE, "$%d", offset); \ | |
1036 | else \ | |
1037 | fprintf (FILE, "%s,", reg_names[REGNO (index)]); \ | |
1038 | } \ | |
1039 | else \ | |
1040 | { \ | |
1041 | fprintf (FILE, "r24,$("); \ | |
1042 | output_addr_const (FILE, addr); \ | |
1043 | fprintf (FILE, "-0b)"); \ | |
1044 | } \ | |
1045 | } |