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target.def (legitimate_constant_p): New hook.
[thirdparty/gcc.git] / gcc / config / v850 / v850.c
CommitLineData
ae180d84 1/* Subroutines for insn-output.c for NEC V850 series
6fb5fa3c 2 Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
24da2019 3 2006, 2007, 2008, 2009, 2010, 2011 Free Software Foundation, Inc.
ae180d84
JL		 4 Contributed by Jeff Law (law@cygnus.com).
5
301ee2f3 6 This file is part of GCC.
ae180d84 7
301ee2f3 8 GCC is free software; you can redistribute it and/or modify it
8376061d 9 under the terms of the GNU General Public License as published by
2f83c7d6 10 the Free Software Foundation; either version 3, or (at your option)
8376061d 11 any later version.
ae180d84 12
301ee2f3 13 GCC is distributed in the hope that it will be useful, but WITHOUT
8376061d
CM		 14 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 for more details.
ae180d84 17
8376061d 18 You should have received a copy of the GNU General Public License
2f83c7d6
NC		 19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
ae180d84 21
ab87f8c8 22#include "config.h"
c5c76735 23#include "system.h"
4977bab6
ZW		 24#include "coretypes.h"
25#include "tm.h"
3ce15347 26#include "tree.h"
ae180d84
JL		 27#include "rtl.h"
28#include "regs.h"
29#include "hard-reg-set.h"
ae180d84
JL		 30#include "insn-config.h"
31#include "conditions.h"
ae180d84
JL		 32#include "output.h"
33#include "insn-attr.h"
34#include "flags.h"
35#include "recog.h"
36#include "expr.h"
bf6bb899 37#include "function.h"
718f9c0f 38#include "diagnostic-core.h"
c3edd394 39#include "ggc.h"
1943c2c1 40#include "integrate.h"
8b97c5f8 41#include "tm_p.h"
672a6f42
NB		 42#include "target.h"
43#include "target-def.h"
90745823 44#include "df.h"
96e45421 45#include "opts.h"
3ce15347
NC		 46
47#ifndef streq
48#define streq(a,b) (strcmp (a, b) == 0)
49#endif
50
11d259f0 51static void v850_print_operand_address (FILE *, rtx);
ae180d84 52
ae180d84 53/* Information about the various small memory areas. */
4a8d3d91 54static const int small_memory_physical_max[(int) SMALL_MEMORY_max] =
ae180d84 55{
4a8d3d91
JM		 56 256,
57 65536,
58 32768,
ae180d84
JL		 59};
60
c3edd394
NC		 61/* Names of the various data areas used on the v850. */
62tree GHS_default_section_names [(int) COUNT_OF_GHS_SECTION_KINDS];
63tree GHS_current_section_names [(int) COUNT_OF_GHS_SECTION_KINDS];
64
65/* Track the current data area set by the data area pragma (which
66 can be nested). Tested by check_default_data_area. */
67data_area_stack_element * data_area_stack = NULL;
68
ae180d84 69/* True if we don't need to check any more if the current
c3edd394 70 function is an interrupt handler. */
ae180d84
JL		 71static int v850_interrupt_cache_p = FALSE;
72
223a9d64
N		 73rtx v850_compare_op0, v850_compare_op1;
74
ae180d84
JL		 75/* Whether current function is an interrupt handler. */
76static int v850_interrupt_p = FALSE;
d6b5193b 77
122603fa
N		 78static GTY(()) section * rosdata_section;
79static GTY(()) section * rozdata_section;
80static GTY(()) section * tdata_section;
81static GTY(()) section * zdata_section;
82static GTY(()) section * zbss_section;
ae180d84 83\f
0a0da1bc 84/* Set the maximum size of small memory area TYPE to the value given
4a8d3d91 85 by SIZE in structure OPTS (option text OPT passed at location LOC). */
ae180d84 86
4a8d3d91
JM		 87static void
88v850_handle_memory_option (enum small_memory_type type,
89 struct gcc_options *opts, const char *opt,
90 int size, location_t loc)
ae180d84 91{
4a8d3d91
JM		 92 if (size > small_memory_physical_max[type])
93 error_at (loc, "value passed in %qs is too large", opt);
0a0da1bc 94 else
4a8d3d91 95 opts->x_small_memory_max[type] = size;
0a0da1bc
RS		 96}
97
98/* Implement TARGET_HANDLE_OPTION. */
b4378319 99
0a0da1bc 100static bool
4a8d3d91
JM		 101v850_handle_option (struct gcc_options *opts,
102 struct gcc_options *opts_set ATTRIBUTE_UNUSED,
96e45421 103 const struct cl_decoded_option *decoded,
4a8d3d91 104 location_t loc)
0a0da1bc 105{
96e45421 106 size_t code = decoded->opt_index;
4a8d3d91 107 int value = decoded->value;
96e45421 108
0a0da1bc 109 switch (code)
b4378319 110 {
0a0da1bc 111 case OPT_mspace:
4a8d3d91 112 opts->x_target_flags |= MASK_EP | MASK_PROLOG_FUNCTION;
0a0da1bc
RS		 113 return true;
114
115 case OPT_mv850:
4a8d3d91 116 opts->x_target_flags &= ~(MASK_CPU ^ MASK_V850);
0a0da1bc
RS		 117 return true;
118
119 case OPT_mv850e:
120 case OPT_mv850e1:
4a8d3d91 121 opts->x_target_flags &= ~(MASK_CPU ^ MASK_V850E);
0a0da1bc
RS		 122 return true;
123
4a8d3d91
JM		 124 case OPT_mtda_:
125 v850_handle_memory_option (SMALL_MEMORY_TDA, opts,
126 decoded->orig_option_with_args_text,
127 value, loc);
128 return true;
0a0da1bc 129
4a8d3d91
JM		 130 case OPT_msda_:
131 v850_handle_memory_option (SMALL_MEMORY_SDA, opts,
132 decoded->orig_option_with_args_text,
133 value, loc);
134 return true;
0a0da1bc 135
4a8d3d91
JM		 136 case OPT_mzda_:
137 v850_handle_memory_option (SMALL_MEMORY_ZDA, opts,
138 decoded->orig_option_with_args_text,
139 value, loc);
140 return true;
0a0da1bc
RS		 141
142 default:
143 return true;
b4378319 144 }
ae180d84 145}
223a9d64 146
3020190e 147/* Implement TARGET_OPTION_OPTIMIZATION_TABLE. */
fac0f722 148
3020190e
JM		 149static const struct default_options v850_option_optimization_table[] =
150 {
151 { OPT_LEVELS_1_PLUS, OPT_fomit_frame_pointer, NULL, 1 },
fac0f722
JM		 152 /* Note - we no longer enable MASK_EP when optimizing. This is
153 because of a hardware bug which stops the SLD and SST instructions
154 from correctly detecting some hazards. If the user is sure that
155 their hardware is fixed or that their program will not encounter
156 the conditions that trigger the bug then they can enable -mep by
157 hand. */
3020190e
JM		 158 { OPT_LEVELS_1_PLUS, OPT_mprolog_function, NULL, 1 },
159 { OPT_LEVELS_NONE, 0, NULL, 0 }
160 };
fac0f722 161
223a9d64
N		 162/* Handle the TARGET_PASS_BY_REFERENCE target hook.
163 Specify whether to pass the argument by reference. */
164
8cd5a4e0
RH		 165static bool
166v850_pass_by_reference (CUMULATIVE_ARGS *cum ATTRIBUTE_UNUSED,
586de218 167 enum machine_mode mode, const_tree type,
8cd5a4e0
RH		 168 bool named ATTRIBUTE_UNUSED)
169{
170 unsigned HOST_WIDE_INT size;
171
172 if (type)
173 size = int_size_in_bytes (type);
174 else
175 size = GET_MODE_SIZE (mode);
176
177 return size > 8;
178}
ae180d84 179
223a9d64
N		 180/* Implementing the Varargs Macros. */
181
182static bool
183v850_strict_argument_naming (CUMULATIVE_ARGS * ca ATTRIBUTE_UNUSED)
184{
185 return !TARGET_GHS ? true : false;
186}
187
356aaf8b
NC		 188/* Return an RTX to represent where an argument with mode MODE
189 and type TYPE will be passed to a function. If the result
190 is NULL_RTX, the argument will be pushed. */
ae180d84 191
74a3d2c3
NF		 192static rtx
193v850_function_arg (CUMULATIVE_ARGS * cum, enum machine_mode mode,
194 const_tree type, bool named)
ae180d84 195{
356aaf8b 196 rtx result = NULL_RTX;
ae180d84
JL		 197 int size, align;
198
223a9d64 199 if (!named)
ae180d84
JL		 200 return NULL_RTX;
201
202 if (mode == BLKmode)
203 size = int_size_in_bytes (type);
204 else
205 size = GET_MODE_SIZE (mode);
206
223a9d64
N		 207 size = (size + UNITS_PER_WORD -1) & ~(UNITS_PER_WORD -1);
208
b4378319 209 if (size < 1)
356aaf8b
NC		 210 {
211 /* Once we have stopped using argument registers, do not start up again. */
212 cum->nbytes = 4 * UNITS_PER_WORD;
213 return NULL_RTX;
214 }
b4378319 215
223a9d64 216 if (size <= UNITS_PER_WORD && type)
ae180d84
JL		 217 align = TYPE_ALIGN (type) / BITS_PER_UNIT;
218 else
219 align = size;
220
221 cum->nbytes = (cum->nbytes + align - 1) &~(align - 1);
222
223 if (cum->nbytes > 4 * UNITS_PER_WORD)
356aaf8b 224 return NULL_RTX;
ae180d84
JL		 225
226 if (type == NULL_TREE
227 && cum->nbytes + size > 4 * UNITS_PER_WORD)
356aaf8b 228 return NULL_RTX;
ae180d84
JL		 229
230 switch (cum->nbytes / UNITS_PER_WORD)
231 {
232 case 0:
c5c76735 233 result = gen_rtx_REG (mode, 6);
ae180d84
JL		 234 break;
235 case 1:
c5c76735 236 result = gen_rtx_REG (mode, 7);
ae180d84
JL		 237 break;
238 case 2:
c5c76735 239 result = gen_rtx_REG (mode, 8);
ae180d84
JL		 240 break;
241 case 3:
c5c76735 242 result = gen_rtx_REG (mode, 9);
ae180d84
JL		 243 break;
244 default:
356aaf8b 245 result = NULL_RTX;
ae180d84
JL		 246 }
247
248 return result;
249}
250
78a52f11 251/* Return the number of bytes which must be put into registers
ae180d84 252 for values which are part in registers and part in memory. */
78a52f11
RH		 253static int
254v850_arg_partial_bytes (CUMULATIVE_ARGS * cum, enum machine_mode mode,
255 tree type, bool named)
ae180d84
JL		 256{
257 int size, align;
258
259 if (TARGET_GHS && !named)
260 return 0;
261
262 if (mode == BLKmode)
263 size = int_size_in_bytes (type);
264 else
265 size = GET_MODE_SIZE (mode);
266
356aaf8b
NC		 267 if (size < 1)
268 size = 1;
269
ae180d84
JL		 270 if (type)
271 align = TYPE_ALIGN (type) / BITS_PER_UNIT;
272 else
273 align = size;
274
356aaf8b 275 cum->nbytes = (cum->nbytes + align - 1) & ~ (align - 1);
ae180d84
JL		 276
277 if (cum->nbytes > 4 * UNITS_PER_WORD)
278 return 0;
279
280 if (cum->nbytes + size <= 4 * UNITS_PER_WORD)
281 return 0;
282
283 if (type == NULL_TREE
284 && cum->nbytes + size > 4 * UNITS_PER_WORD)
285 return 0;
286
78a52f11 287 return 4 * UNITS_PER_WORD - cum->nbytes;
ae180d84
JL		 288}
289
74a3d2c3
NF		 290/* Update the data in CUM to advance over an argument
291 of mode MODE and data type TYPE.
292 (TYPE is null for libcalls where that information may not be available.) */
293
294static void
295v850_function_arg_advance (CUMULATIVE_ARGS *cum, enum machine_mode mode,
296 const_tree type, bool named ATTRIBUTE_UNUSED)
297{
298 cum->nbytes += (((type && int_size_in_bytes (type) > 8
299 ? GET_MODE_SIZE (Pmode)
300 : (mode != BLKmode
301 ? GET_MODE_SIZE (mode)
302 : int_size_in_bytes (type))) + UNITS_PER_WORD - 1)
303 & -UNITS_PER_WORD);
304}
305
ae180d84
JL		 306/* Return the high and low words of a CONST_DOUBLE */
307
308static void
59f3507d 309const_double_split (rtx x, HOST_WIDE_INT * p_high, HOST_WIDE_INT * p_low)
ae180d84
JL		 310{
311 if (GET_CODE (x) == CONST_DOUBLE)
312 {
313 long t[2];
314 REAL_VALUE_TYPE rv;
315
316 switch (GET_MODE (x))
317 {
318 case DFmode:
319 REAL_VALUE_FROM_CONST_DOUBLE (rv, x);
320 REAL_VALUE_TO_TARGET_DOUBLE (rv, t);
321 *p_high = t[1]; /* since v850 is little endian */
322 *p_low = t[0]; /* high is second word */
323 return;
324
325 case SFmode:
326 REAL_VALUE_FROM_CONST_DOUBLE (rv, x);
327 REAL_VALUE_TO_TARGET_SINGLE (rv, *p_high);
328 *p_low = 0;
329 return;
330
331 case VOIDmode:
332 case DImode:
333 *p_high = CONST_DOUBLE_HIGH (x);
334 *p_low = CONST_DOUBLE_LOW (x);
335 return;
3ce15347
NC		 336
337 default:
338 break;
ae180d84
JL		 339 }
340 }
341
342 fatal_insn ("const_double_split got a bad insn:", x);
343}
344
345\f
346/* Return the cost of the rtx R with code CODE. */
347
348static int
59f3507d 349const_costs_int (HOST_WIDE_INT value, int zero_cost)
ae180d84
JL		 350{
351 if (CONST_OK_FOR_I (value))
352 return zero_cost;
353 else if (CONST_OK_FOR_J (value))
354 return 1;
355 else if (CONST_OK_FOR_K (value))
356 return 2;
357 else
358 return 4;
359}
360
3c50106f 361static int
59f3507d 362const_costs (rtx r, enum rtx_code c)
ae180d84
JL		 363{
364 HOST_WIDE_INT high, low;
365
366 switch (c)
367 {
368 case CONST_INT:
369 return const_costs_int (INTVAL (r), 0);
370
371 case CONST_DOUBLE:
372 const_double_split (r, &high, &low);
373 if (GET_MODE (r) == SFmode)
374 return const_costs_int (high, 1);
375 else
376 return const_costs_int (high, 1) + const_costs_int (low, 1);
377
378 case SYMBOL_REF:
379 case LABEL_REF:
380 case CONST:
381 return 2;
382
383 case HIGH:
384 return 1;
385
386 default:
387 return 4;
388 }
389}
390
3c50106f 391static bool
59f3507d 392v850_rtx_costs (rtx x,
5a82ecd9 393 int codearg,
59f3507d 394 int outer_code ATTRIBUTE_UNUSED,
f40751dd 395 int * total, bool speed)
3c50106f 396{
5a82ecd9
ILT		 397 enum rtx_code code = (enum rtx_code) codearg;
398
3c50106f
RH		 399 switch (code)
400 {
401 case CONST_INT:
402 case CONST_DOUBLE:
403 case CONST:
404 case SYMBOL_REF:
405 case LABEL_REF:
406 *total = COSTS_N_INSNS (const_costs (x, code));
407 return true;
408
409 case MOD:
410 case DIV:
411 case UMOD:
412 case UDIV:
f40751dd 413 if (TARGET_V850E && !speed)
3c50106f
RH		 414 *total = 6;
415 else
416 *total = 60;
417 return true;
418
419 case MULT:
420 if (TARGET_V850E
421 && ( GET_MODE (x) == SImode
422 || GET_MODE (x) == HImode
423 || GET_MODE (x) == QImode))
424 {
425 if (GET_CODE (XEXP (x, 1)) == REG)
426 *total = 4;
427 else if (GET_CODE (XEXP (x, 1)) == CONST_INT)
428 {
429 if (CONST_OK_FOR_O (INTVAL (XEXP (x, 1))))
430 *total = 6;
431 else if (CONST_OK_FOR_K (INTVAL (XEXP (x, 1))))
432 *total = 10;
433 }
434 }
435 else
436 *total = 20;
437 return true;
438
f90b7a5a
PB		 439 case ZERO_EXTRACT:
440 if (outer_code == COMPARE)
441 *total = 0;
442 return false;
443
3c50106f
RH		 444 default:
445 return false;
446 }
447}
ae180d84
JL		 448\f
449/* Print operand X using operand code CODE to assembly language output file
450 FILE. */
451
11d259f0
NF		 452static void
453v850_print_operand (FILE * file, rtx x, int code)
ae180d84
JL		 454{
455 HOST_WIDE_INT high, low;
456
457 switch (code)
458 {
5ca2111f
CM		 459 case 'c':
460 /* We use 'c' operands with symbols for .vtinherit */
461 if (GET_CODE (x) == SYMBOL_REF)
462 {
463 output_addr_const(file, x);
464 break;
465 }
466 /* fall through */
ae180d84
JL		 467 case 'b':
468 case 'B':
1933ec7e
JW		 469 case 'C':
470 switch ((code == 'B' || code == 'C')
471 ? reverse_condition (GET_CODE (x)) : GET_CODE (x))
ae180d84
JL		 472 {
473 case NE:
1933ec7e
JW		 474 if (code == 'c' || code == 'C')
475 fprintf (file, "nz");
476 else
477 fprintf (file, "ne");
ae180d84
JL		 478 break;
479 case EQ:
1933ec7e
JW		 480 if (code == 'c' || code == 'C')
481 fprintf (file, "z");
482 else
483 fprintf (file, "e");
ae180d84
JL		 484 break;
485 case GE:
1933ec7e 486 fprintf (file, "ge");
ae180d84
JL		 487 break;
488 case GT:
1933ec7e 489 fprintf (file, "gt");
ae180d84
JL		 490 break;
491 case LE:
1933ec7e 492 fprintf (file, "le");
ae180d84
JL		 493 break;
494 case LT:
1933ec7e 495 fprintf (file, "lt");
ae180d84
JL		 496 break;
497 case GEU:
1933ec7e 498 fprintf (file, "nl");
ae180d84
JL		 499 break;
500 case GTU:
1933ec7e 501 fprintf (file, "h");
ae180d84
JL		 502 break;
503 case LEU:
1933ec7e 504 fprintf (file, "nh");
ae180d84
JL		 505 break;
506 case LTU:
1933ec7e 507 fprintf (file, "l");
ae180d84
JL		 508 break;
509 default:
f2f84cba 510 gcc_unreachable ();
ae180d84
JL		 511 }
512 break;
513 case 'F': /* high word of CONST_DOUBLE */
f2f84cba 514 switch (GET_CODE (x))
ae180d84 515 {
f2f84cba
NS		 516 case CONST_INT:
517 fprintf (file, "%d", (INTVAL (x) >= 0) ? 0 : -1);
518 break;
519
520 case CONST_DOUBLE:
ae180d84
JL		 521 const_double_split (x, &high, &low);
522 fprintf (file, "%ld", (long) high);
f2f84cba
NS		 523 break;
524
525 default:
526 gcc_unreachable ();
ae180d84 527 }
ae180d84
JL		 528 break;
529 case 'G': /* low word of CONST_DOUBLE */
f2f84cba 530 switch (GET_CODE (x))
ae180d84 531 {
f2f84cba
NS		 532 case CONST_INT:
533 fprintf (file, "%ld", (long) INTVAL (x));
534 break;
535
536 case CONST_DOUBLE:
ae180d84
JL		 537 const_double_split (x, &high, &low);
538 fprintf (file, "%ld", (long) low);
f2f84cba
NS		 539 break;
540
541 default:
542 gcc_unreachable ();
ae180d84 543 }
ae180d84
JL		 544 break;
545 case 'L':
e0b3adcb 546 fprintf (file, "%d\n", (int)(INTVAL (x) & 0xffff));
ae180d84
JL		 547 break;
548 case 'M':
549 fprintf (file, "%d", exact_log2 (INTVAL (x)));
550 break;
551 case 'O':
f2f84cba
NS		 552 gcc_assert (special_symbolref_operand (x, VOIDmode));
553
554 if (GET_CODE (x) == CONST)
555 x = XEXP (XEXP (x, 0), 0);
556 else
557 gcc_assert (GET_CODE (x) == SYMBOL_REF);
558
559 if (SYMBOL_REF_ZDA_P (x))
560 fprintf (file, "zdaoff");
561 else if (SYMBOL_REF_SDA_P (x))
562 fprintf (file, "sdaoff");
563 else if (SYMBOL_REF_TDA_P (x))
564 fprintf (file, "tdaoff");
ae180d84 565 else
f2f84cba 566 gcc_unreachable ();
ae180d84
JL		 567 break;
568 case 'P':
f2f84cba
NS		 569 gcc_assert (special_symbolref_operand (x, VOIDmode));
570 output_addr_const (file, x);
ae180d84
JL		 571 break;
572 case 'Q':
f2f84cba
NS		 573 gcc_assert (special_symbolref_operand (x, VOIDmode));
574
575 if (GET_CODE (x) == CONST)
576 x = XEXP (XEXP (x, 0), 0);
ae180d84 577 else
f2f84cba
NS		 578 gcc_assert (GET_CODE (x) == SYMBOL_REF);
579
580 if (SYMBOL_REF_ZDA_P (x))
581 fprintf (file, "r0");
582 else if (SYMBOL_REF_SDA_P (x))
583 fprintf (file, "gp");
584 else if (SYMBOL_REF_TDA_P (x))
585 fprintf (file, "ep");
586 else
587 gcc_unreachable ();
ae180d84
JL		 588 break;
589 case 'R': /* 2nd word of a double. */
590 switch (GET_CODE (x))
591 {
3ce15347
NC		 592 case REG:
593 fprintf (file, reg_names[REGNO (x) + 1]);
594 break;
595 case MEM:
b72f00af 596 x = XEXP (adjust_address (x, SImode, 4), 0);
11d259f0 597 v850_print_operand_address (file, x);
7a846a6c
NC		 598 if (GET_CODE (x) == CONST_INT)
599 fprintf (file, "[r0]");
3ce15347
NC		 600 break;
601
602 default:
603 break;
ae180d84
JL		 604 }
605 break;
606 case 'S':
607 {
2ec6cd51 608 /* If it's a reference to a TDA variable, use sst/sld vs. st/ld. */
145870b5
NC		 609 if (GET_CODE (x) == MEM && ep_memory_operand (x, GET_MODE (x), FALSE))
610 fputs ("s", file);
611
612 break;
613 }
614 case 'T':
615 {
616 /* Like an 'S' operand above, but for unsigned loads only. */
617 if (GET_CODE (x) == MEM && ep_memory_operand (x, GET_MODE (x), TRUE))
ae180d84
JL		 618 fputs ("s", file);
619
620 break;
621 }
622 case 'W': /* print the instruction suffix */
623 switch (GET_MODE (x))
624 {
625 default:
f2f84cba 626 gcc_unreachable ();
ae180d84
JL		 627
628 case QImode: fputs (".b", file); break;
629 case HImode: fputs (".h", file); break;
630 case SImode: fputs (".w", file); break;
631 case SFmode: fputs (".w", file); break;
632 }
633 break;
634 case '.': /* register r0 */
635 fputs (reg_names[0], file);
636 break;
1933ec7e 637 case 'z': /* reg or zero */
f2f84cba 638 if (GET_CODE (x) == REG)
1933ec7e 639 fputs (reg_names[REGNO (x)], file);
223a9d64
N		 640 else if ((GET_MODE(x) == SImode
641 || GET_MODE(x) == DFmode
642 || GET_MODE(x) == SFmode)
643 && x == CONST0_RTX(GET_MODE(x)))
644 fputs (reg_names[0], file);
1933ec7e 645 else
f2f84cba
NS		 646 {
647 gcc_assert (x == const0_rtx);
648 fputs (reg_names[0], file);
649 }
1933ec7e 650 break;
ae180d84
JL		 651 default:
652 switch (GET_CODE (x))
653 {
654 case MEM:
655 if (GET_CODE (XEXP (x, 0)) == CONST_INT)
f1c25d3b 656 output_address (gen_rtx_PLUS (SImode, gen_rtx_REG (SImode, 0),
c5c76735 657 XEXP (x, 0)));
ae180d84
JL		 658 else
659 output_address (XEXP (x, 0));
660 break;
661
662 case REG:
663 fputs (reg_names[REGNO (x)], file);
664 break;
665 case SUBREG:
ddef6bc7 666 fputs (reg_names[subreg_regno (x)], file);
ae180d84
JL		 667 break;
668 case CONST_INT:
669 case SYMBOL_REF:
670 case CONST:
671 case LABEL_REF:
672 case CODE_LABEL:
11d259f0 673 v850_print_operand_address (file, x);
ae180d84
JL		 674 break;
675 default:
f2f84cba 676 gcc_unreachable ();
ae180d84
JL		 677 }
678 break;
679
680 }
681}
682
683\f
684/* Output assembly language output for the address ADDR to FILE. */
685
11d259f0
NF		 686static void
687v850_print_operand_address (FILE * file, rtx addr)
ae180d84
JL		 688{
689 switch (GET_CODE (addr))
690 {
691 case REG:
692 fprintf (file, "0[");
11d259f0 693 v850_print_operand (file, addr, 0);
ae180d84
JL		 694 fprintf (file, "]");
695 break;
696 case LO_SUM:
697 if (GET_CODE (XEXP (addr, 0)) == REG)
698 {
699 /* reg,foo */
700 fprintf (file, "lo(");
11d259f0 701 v850_print_operand (file, XEXP (addr, 1), 0);
ae180d84 702 fprintf (file, ")[");
11d259f0 703 v850_print_operand (file, XEXP (addr, 0), 0);
ae180d84
JL		 704 fprintf (file, "]");
705 }
706 break;
707 case PLUS:
708 if (GET_CODE (XEXP (addr, 0)) == REG
709 || GET_CODE (XEXP (addr, 0)) == SUBREG)
710 {
711 /* reg,foo */
11d259f0 712 v850_print_operand (file, XEXP (addr, 1), 0);
ae180d84 713 fprintf (file, "[");
11d259f0 714 v850_print_operand (file, XEXP (addr, 0), 0);
ae180d84
JL		 715 fprintf (file, "]");
716 }
717 else
718 {
11d259f0 719 v850_print_operand (file, XEXP (addr, 0), 0);
ae180d84 720 fprintf (file, "+");
11d259f0 721 v850_print_operand (file, XEXP (addr, 1), 0);
ae180d84
JL		 722 }
723 break;
724 case SYMBOL_REF:
50d1ff6a
RH		 725 {
726 const char *off_name = NULL;
727 const char *reg_name = NULL;
728
729 if (SYMBOL_REF_ZDA_P (addr))
730 {
731 off_name = "zdaoff";
732 reg_name = "r0";
733 }
734 else if (SYMBOL_REF_SDA_P (addr))
735 {
736 off_name = "sdaoff";
737 reg_name = "gp";
738 }
739 else if (SYMBOL_REF_TDA_P (addr))
740 {
741 off_name = "tdaoff";
742 reg_name = "ep";
743 }
744
745 if (off_name)
ae180d84 746 fprintf (file, "%s(", off_name);
ae180d84 747 output_addr_const (file, addr);
50d1ff6a
RH		 748 if (reg_name)
749 fprintf (file, ")[%s]", reg_name);
750 }
ae180d84
JL		 751 break;
752 case CONST:
753 if (special_symbolref_operand (addr, VOIDmode))
754 {
50d1ff6a 755 rtx x = XEXP (XEXP (addr, 0), 0);
3cce094d
KG		 756 const char *off_name;
757 const char *reg_name;
ae180d84 758
50d1ff6a 759 if (SYMBOL_REF_ZDA_P (x))
ae180d84
JL		 760 {
761 off_name = "zdaoff";
762 reg_name = "r0";
763 }
50d1ff6a 764 else if (SYMBOL_REF_SDA_P (x))
ae180d84
JL		 765 {
766 off_name = "sdaoff";
767 reg_name = "gp";
768 }
50d1ff6a 769 else if (SYMBOL_REF_TDA_P (x))
ae180d84
JL		 770 {
771 off_name = "tdaoff";
772 reg_name = "ep";
773 }
774 else
f2f84cba 775 gcc_unreachable ();
ae180d84
JL		 776
777 fprintf (file, "%s(", off_name);
778 output_addr_const (file, addr);
779 fprintf (file, ")[%s]", reg_name);
780 }
781 else
782 output_addr_const (file, addr);
783 break;
784 default:
785 output_addr_const (file, addr);
786 break;
787 }
788}
789
11d259f0
NF		 790static bool
791v850_print_operand_punct_valid_p (unsigned char code)
792{
793 return code == '.';
794}
795
b4378319
NC		 796/* When assemble_integer is used to emit the offsets for a switch
797 table it can encounter (TRUNCATE:HI (MINUS:SI (LABEL_REF:SI) (LABEL_REF:SI))).
798 output_addr_const will normally barf at this, but it is OK to omit
799 the truncate and just emit the difference of the two labels. The
800 .hword directive will automatically handle the truncation for us.
801
24da2019 802 Returns true if rtx was handled, false otherwise. */
b4378319 803
24da2019 804static bool
59f3507d 805v850_output_addr_const_extra (FILE * file, rtx x)
b4378319
NC		 806{
807 if (GET_CODE (x) != TRUNCATE)
24da2019 808 return false;
b4378319
NC		 809
810 x = XEXP (x, 0);
811
812 /* We must also handle the case where the switch table was passed a
813 constant value and so has been collapsed. In this case the first
814 label will have been deleted. In such a case it is OK to emit
815 nothing, since the table will not be used.
816 (cf gcc.c-torture/compile/990801-1.c). */
817 if (GET_CODE (x) == MINUS
818 && GET_CODE (XEXP (x, 0)) == LABEL_REF
819 && GET_CODE (XEXP (XEXP (x, 0), 0)) == CODE_LABEL
820 && INSN_DELETED_P (XEXP (XEXP (x, 0), 0)))
24da2019 821 return true;
b4378319
NC		 822
823 output_addr_const (file, x);
24da2019 824 return true;
b4378319 825}
ae180d84
JL		 826\f
827/* Return appropriate code to load up a 1, 2, or 4 integer/floating
828 point value. */
829
8b97c5f8 830const char *
59f3507d 831output_move_single (rtx * operands)
ae180d84
JL		 832{
833 rtx dst = operands[0];
834 rtx src = operands[1];
835
836 if (REG_P (dst))
837 {
838 if (REG_P (src))
839 return "mov %1,%0";
840
841 else if (GET_CODE (src) == CONST_INT)
842 {
843 HOST_WIDE_INT value = INTVAL (src);
844
22f23985 845 if (CONST_OK_FOR_J (value)) /* Signed 5-bit immediate. */
ae180d84
JL		 846 return "mov %1,%0";
847
22f23985 848 else if (CONST_OK_FOR_K (value)) /* Signed 16-bit immediate. */
223a9d64 849 return "movea %1,%.,%0";
ae180d84 850
b4378319 851 else if (CONST_OK_FOR_L (value)) /* Upper 16 bits were set. */
223a9d64 852 return "movhi hi0(%1),%.,%0";
ae180d84 853
b4378319 854 /* A random constant. */
223a9d64 855 else if (TARGET_V850E || TARGET_V850E2_ALL)
b4378319
NC		 856 return "mov %1,%0";
857 else
ae180d84
JL		 858 return "movhi hi(%1),%.,%0\n\tmovea lo(%1),%0,%0";
859 }
860
861 else if (GET_CODE (src) == CONST_DOUBLE && GET_MODE (src) == SFmode)
862 {
863 HOST_WIDE_INT high, low;
864
865 const_double_split (src, &high, &low);
b4378319 866
22f23985 867 if (CONST_OK_FOR_J (high)) /* Signed 5-bit immediate. */
ae180d84
JL		 868 return "mov %F1,%0";
869
22f23985 870 else if (CONST_OK_FOR_K (high)) /* Signed 16-bit immediate. */
223a9d64 871 return "movea %F1,%.,%0";
ae180d84 872
b4378319 873 else if (CONST_OK_FOR_L (high)) /* Upper 16 bits were set. */
223a9d64 874 return "movhi hi0(%F1),%.,%0";
ae180d84 875
b4378319 876 /* A random constant. */
223a9d64 877 else if (TARGET_V850E || TARGET_V850E2_ALL)
b4378319
NC		 878 return "mov %F1,%0";
879
880 else
ae180d84
JL		 881 return "movhi hi(%F1),%.,%0\n\tmovea lo(%F1),%0,%0";
882 }
883
884 else if (GET_CODE (src) == MEM)
885 return "%S1ld%W1 %1,%0";
886
887 else if (special_symbolref_operand (src, VOIDmode))
888 return "movea %O1(%P1),%Q1,%0";
889
890 else if (GET_CODE (src) == LABEL_REF
891 || GET_CODE (src) == SYMBOL_REF
892 || GET_CODE (src) == CONST)
145870b5 893 {
223a9d64 894 if (TARGET_V850E || TARGET_V850E2_ALL)
b4378319
NC		 895 return "mov hilo(%1),%0";
896 else
897 return "movhi hi(%1),%.,%0\n\tmovea lo(%1),%0,%0";
145870b5 898 }
ae180d84
JL		 899
900 else if (GET_CODE (src) == HIGH)
901 return "movhi hi(%1),%.,%0";
902
903 else if (GET_CODE (src) == LO_SUM)
904 {
905 operands[2] = XEXP (src, 0);
906 operands[3] = XEXP (src, 1);
907 return "movea lo(%3),%2,%0";
908 }
909 }
910
911 else if (GET_CODE (dst) == MEM)
912 {
913 if (REG_P (src))
914 return "%S0st%W0 %1,%0";
915
916 else if (GET_CODE (src) == CONST_INT && INTVAL (src) == 0)
917 return "%S0st%W0 %.,%0";
918
919 else if (GET_CODE (src) == CONST_DOUBLE
920 && CONST0_RTX (GET_MODE (dst)) == src)
921 return "%S0st%W0 %.,%0";
922 }
923
c5c76735 924 fatal_insn ("output_move_single:", gen_rtx_SET (VOIDmode, dst, src));
ae180d84
JL		 925 return "";
926}
927
223a9d64
N		 928/* Generate comparison code. */
929int
930v850_float_z_comparison_operator (rtx op, enum machine_mode mode)
931{
932 enum rtx_code code = GET_CODE (op);
933
934 if (GET_RTX_CLASS (code) != RTX_COMPARE
935 && GET_RTX_CLASS (code) != RTX_COMM_COMPARE)
936 return 0;
937
938 if (mode != GET_MODE (op) && mode != VOIDmode)
939 return 0;
940
941 if ((GET_CODE (XEXP (op, 0)) != REG
942 || REGNO (XEXP (op, 0)) != CC_REGNUM)
943 || XEXP (op, 1) != const0_rtx)
944 return 0;
945
946 if (GET_MODE (XEXP (op, 0)) == CC_FPU_LTmode)
947 return code == LT;
948 if (GET_MODE (XEXP (op, 0)) == CC_FPU_LEmode)
949 return code == LE;
950 if (GET_MODE (XEXP (op, 0)) == CC_FPU_EQmode)
951 return code == EQ;
952
953 return 0;
954}
955
956int
957v850_float_nz_comparison_operator (rtx op, enum machine_mode mode)
958{
959 enum rtx_code code = GET_CODE (op);
960
961 if (GET_RTX_CLASS (code) != RTX_COMPARE
962 && GET_RTX_CLASS (code) != RTX_COMM_COMPARE)
963 return 0;
964
965 if (mode != GET_MODE (op) && mode != VOIDmode)
966 return 0;
967
968 if ((GET_CODE (XEXP (op, 0)) != REG
969 || REGNO (XEXP (op, 0)) != CC_REGNUM)
970 || XEXP (op, 1) != const0_rtx)
971 return 0;
972
973 if (GET_MODE (XEXP (op, 0)) == CC_FPU_GTmode)
974 return code == GT;
975 if (GET_MODE (XEXP (op, 0)) == CC_FPU_GEmode)
976 return code == GE;
977 if (GET_MODE (XEXP (op, 0)) == CC_FPU_NEmode)
978 return code == NE;
979
980 return 0;
981}
982
983enum machine_mode
122603fa 984v850_select_cc_mode (enum rtx_code cond, rtx op0, rtx op1 ATTRIBUTE_UNUSED)
223a9d64
N		 985{
986 if (GET_MODE_CLASS (GET_MODE (op0)) == MODE_FLOAT)
987 {
988 switch (cond)
989 {
990 case LE:
991 return CC_FPU_LEmode;
992 case GE:
993 return CC_FPU_GEmode;
994 case LT:
995 return CC_FPU_LTmode;
996 case GT:
997 return CC_FPU_GTmode;
998 case EQ:
999 return CC_FPU_EQmode;
1000 case NE:
1001 return CC_FPU_NEmode;
1002 default:
1003 abort ();
1004 }
1005 }
1006 return CCmode;
1007}
1008
1009enum machine_mode
1010v850_gen_float_compare (enum rtx_code cond, enum machine_mode mode ATTRIBUTE_UNUSED, rtx op0, rtx op1)
1011{
1012 if (GET_MODE(op0) == DFmode)
1013 {
1014 switch (cond)
1015 {
1016 case LE:
1017 emit_insn (gen_cmpdf_le_insn (op0, op1));
1018 break;
1019 case GE:
1020 emit_insn (gen_cmpdf_ge_insn (op0, op1));
1021 break;
1022 case LT:
1023 emit_insn (gen_cmpdf_lt_insn (op0, op1));
1024 break;
1025 case GT:
1026 emit_insn (gen_cmpdf_gt_insn (op0, op1));
1027 break;
1028 case EQ:
1029 emit_insn (gen_cmpdf_eq_insn (op0, op1));
1030 break;
1031 case NE:
1032 emit_insn (gen_cmpdf_ne_insn (op0, op1));
1033 break;
1034 default:
1035 abort ();
1036 }
1037 }
1038 else if (GET_MODE(v850_compare_op0) == SFmode)
1039 {
1040 switch (cond)
1041 {
1042 case LE:
1043 emit_insn (gen_cmpsf_le_insn(op0, op1));
1044 break;
1045 case GE:
1046 emit_insn (gen_cmpsf_ge_insn(op0, op1));
1047 break;
1048 case LT:
1049 emit_insn (gen_cmpsf_lt_insn(op0, op1));
1050 break;
1051 case GT:
1052 emit_insn (gen_cmpsf_gt_insn(op0, op1));
1053 break;
1054 case EQ:
1055 emit_insn (gen_cmpsf_eq_insn(op0, op1));
1056 break;
1057 case NE:
1058 emit_insn (gen_cmpsf_ne_insn(op0, op1));
1059 break;
1060 default:
1061 abort ();
1062 }
1063 }
1064 else
1065 {
1066 abort ();
1067 }
1068
1069 return v850_select_cc_mode (cond, op0, op1);
1070}
1071
1072rtx
1073v850_gen_compare (enum rtx_code cond, enum machine_mode mode, rtx op0, rtx op1)
1074{
1075 if (GET_MODE_CLASS(GET_MODE (op0)) != MODE_FLOAT)
1076 {
1077 emit_insn (gen_cmpsi_insn (op0, op1));
1078 return gen_rtx_fmt_ee (cond, mode, gen_rtx_REG(CCmode, CC_REGNUM), const0_rtx);
1079 }
1080 else
1081 {
1082 rtx cc_reg;
1083 mode = v850_gen_float_compare (cond, mode, op0, op1);
1084 cc_reg = gen_rtx_REG (mode, CC_REGNUM);
1085 emit_insn (gen_rtx_SET(mode, cc_reg, gen_rtx_REG (mode, FCC_REGNUM)));
1086
1087 return gen_rtx_fmt_ee (cond, mode, cc_reg, const0_rtx);
1088 }
1089}
1090
1933ec7e
JW		 1091/* Return maximum offset supported for a short EP memory reference of mode
1092 MODE and signedness UNSIGNEDP. */
ae180d84 1093
3ce15347 1094static int
59f3507d 1095ep_memory_offset (enum machine_mode mode, int unsignedp ATTRIBUTE_UNUSED)
ae180d84 1096{
1933ec7e 1097 int max_offset = 0;
ae180d84 1098
1933ec7e 1099 switch (mode)
ae180d84 1100 {
ae180d84 1101 case QImode:
b4378319
NC		 1102 if (TARGET_SMALL_SLD)
1103 max_offset = (1 << 4);
223a9d64
N		 1104 else if ((TARGET_V850E || TARGET_V850E2_ALL)
1105 && unsignedp)
b4378319
NC		 1106 max_offset = (1 << 4);
1107 else
1108 max_offset = (1 << 7);
ae180d84
JL		 1109 break;
1110
1111 case HImode:
b4378319
NC		 1112 if (TARGET_SMALL_SLD)
1113 max_offset = (1 << 5);
223a9d64
N		 1114 else if ((TARGET_V850E || TARGET_V850E2_ALL)
1115 && unsignedp)
b4378319
NC		 1116 max_offset = (1 << 5);
1117 else
1118 max_offset = (1 << 8);
ae180d84
JL		 1119 break;
1120
1121 case SImode:
1122 case SFmode:
145870b5 1123 max_offset = (1 << 8);
ae180d84 1124 break;
3ce15347
NC		 1125
1126 default:
1127 break;
ae180d84
JL		 1128 }
1129
1933ec7e
JW		 1130 return max_offset;
1131}
1132
1133/* Return true if OP is a valid short EP memory reference */
1134
1135int
59f3507d 1136ep_memory_operand (rtx op, enum machine_mode mode, int unsigned_load)
1933ec7e
JW		 1137{
1138 rtx addr, op0, op1;
1139 int max_offset;
1140 int mask;
1141
2ec6cd51 1142 /* If we are not using the EP register on a per-function basis
6fc0bb99 1143 then do not allow this optimization at all. This is to
2ec6cd51
NC		 1144 prevent the use of the SLD/SST instructions which cannot be
1145 guaranteed to work properly due to a hardware bug. */
1146 if (!TARGET_EP)
1147 return FALSE;
1148
1933ec7e
JW		 1149 if (GET_CODE (op) != MEM)
1150 return FALSE;
1151
1152 max_offset = ep_memory_offset (mode, unsigned_load);
1153
1154 mask = GET_MODE_SIZE (mode) - 1;
1155
ae180d84
JL		 1156 addr = XEXP (op, 0);
1157 if (GET_CODE (addr) == CONST)
1158 addr = XEXP (addr, 0);
1159
1160 switch (GET_CODE (addr))
1161 {
1162 default:
1163 break;
1164
1165 case SYMBOL_REF:
50d1ff6a 1166 return SYMBOL_REF_TDA_P (addr);
ae180d84
JL		 1167
1168 case REG:
1169 return REGNO (addr) == EP_REGNUM;
1170
1171 case PLUS:
1172 op0 = XEXP (addr, 0);
1173 op1 = XEXP (addr, 1);
1174 if (GET_CODE (op1) == CONST_INT
1175 && INTVAL (op1) < max_offset
2268cc52 1176 && INTVAL (op1) >= 0
ae180d84
JL		 1177 && (INTVAL (op1) & mask) == 0)
1178 {
1179 if (GET_CODE (op0) == REG && REGNO (op0) == EP_REGNUM)
1180 return TRUE;
1181
50d1ff6a 1182 if (GET_CODE (op0) == SYMBOL_REF && SYMBOL_REF_TDA_P (op0))
ae180d84
JL		 1183 return TRUE;
1184 }
1185 break;
1186 }
1187
1188 return FALSE;
1189}
ae180d84
JL		 1190\f
1191/* Substitute memory references involving a pointer, to use the ep pointer,
1192 taking care to save and preserve the ep. */
1193
1194static void
59f3507d
NN		 1195substitute_ep_register (rtx first_insn,
1196 rtx last_insn,
1197 int uses,
1198 int regno,
1199 rtx * p_r1,
1200 rtx * p_ep)
ae180d84 1201{
c5c76735 1202 rtx reg = gen_rtx_REG (Pmode, regno);
ae180d84 1203 rtx insn;
ae180d84
JL		 1204
1205 if (!*p_r1)
1206 {
90745823 1207 df_set_regs_ever_live (1, true);
c5c76735
JL		 1208 *p_r1 = gen_rtx_REG (Pmode, 1);
1209 *p_ep = gen_rtx_REG (Pmode, 30);
ae180d84
JL		 1210 }
1211
1212 if (TARGET_DEBUG)
3ce15347
NC		 1213 fprintf (stderr, "\
1214Saved %d bytes (%d uses of register %s) in function %s, starting as insn %d, ending at %d\n",
ae180d84
JL		 1215 2 * (uses - 3), uses, reg_names[regno],
1216 IDENTIFIER_POINTER (DECL_NAME (current_function_decl)),
1217 INSN_UID (first_insn), INSN_UID (last_insn));
1218
1219 if (GET_CODE (first_insn) == NOTE)
1220 first_insn = next_nonnote_insn (first_insn);
1221
1222 last_insn = next_nonnote_insn (last_insn);
1223 for (insn = first_insn; insn && insn != last_insn; insn = NEXT_INSN (insn))
1224 {
1225 if (GET_CODE (insn) == INSN)
1226 {
1227 rtx pattern = single_set (insn);
1228
1229 /* Replace the memory references. */
1230 if (pattern)
1231 {
1232 rtx *p_mem;
1933ec7e
JW		 1233 /* Memory operands are signed by default. */
1234 int unsignedp = FALSE;
ae180d84
JL		 1235
1236 if (GET_CODE (SET_DEST (pattern)) == MEM
1237 && GET_CODE (SET_SRC (pattern)) == MEM)
1238 p_mem = (rtx *)0;
1239
1240 else if (GET_CODE (SET_DEST (pattern)) == MEM)
1241 p_mem = &SET_DEST (pattern);
1242
1243 else if (GET_CODE (SET_SRC (pattern)) == MEM)
1244 p_mem = &SET_SRC (pattern);
1245
b4378319
NC		 1246 else if (GET_CODE (SET_SRC (pattern)) == SIGN_EXTEND
1247 && GET_CODE (XEXP (SET_SRC (pattern), 0)) == MEM)
1248 p_mem = &XEXP (SET_SRC (pattern), 0);
1249
1250 else if (GET_CODE (SET_SRC (pattern)) == ZERO_EXTEND
1251 && GET_CODE (XEXP (SET_SRC (pattern), 0)) == MEM)
1252 {
1253 p_mem = &XEXP (SET_SRC (pattern), 0);
1254 unsignedp = TRUE;
1255 }
ae180d84
JL		 1256 else
1257 p_mem = (rtx *)0;
1258
1259 if (p_mem)
1260 {
1261 rtx addr = XEXP (*p_mem, 0);
1262
c3edd394 1263 if (GET_CODE (addr) == REG && REGNO (addr) == (unsigned) regno)
ae180d84
JL		 1264 *p_mem = change_address (*p_mem, VOIDmode, *p_ep);
1265
1266 else if (GET_CODE (addr) == PLUS
1267 && GET_CODE (XEXP (addr, 0)) == REG
c3edd394 1268 && REGNO (XEXP (addr, 0)) == (unsigned) regno
ae180d84 1269 && GET_CODE (XEXP (addr, 1)) == CONST_INT
3ce15347 1270 && ((INTVAL (XEXP (addr, 1)))
1933ec7e 1271 < ep_memory_offset (GET_MODE (*p_mem),
2268cc52
JL		 1272 unsignedp))
1273 && ((INTVAL (XEXP (addr, 1))) >= 0))
ae180d84 1274 *p_mem = change_address (*p_mem, VOIDmode,
c5c76735
JL		 1275 gen_rtx_PLUS (Pmode,
1276 *p_ep,
1277 XEXP (addr, 1)));
ae180d84
JL		 1278 }
1279 }
1280 }
1281 }
1282
1283 /* Optimize back to back cases of ep <- r1 & r1 <- ep. */
1284 insn = prev_nonnote_insn (first_insn);
1285 if (insn && GET_CODE (insn) == INSN
1286 && GET_CODE (PATTERN (insn)) == SET
1287 && SET_DEST (PATTERN (insn)) == *p_ep
1288 && SET_SRC (PATTERN (insn)) == *p_r1)
1289 delete_insn (insn);
1290 else
c5c76735 1291 emit_insn_before (gen_rtx_SET (Pmode, *p_r1, *p_ep), first_insn);
ae180d84 1292
c5c76735
JL		 1293 emit_insn_before (gen_rtx_SET (Pmode, *p_ep, reg), first_insn);
1294 emit_insn_before (gen_rtx_SET (Pmode, *p_ep, *p_r1), last_insn);
ae180d84
JL		 1295}
1296
1297\f
18dbd950
RS		 1298/* TARGET_MACHINE_DEPENDENT_REORG. On the 850, we use it to implement
1299 the -mep mode to copy heavily used pointers to ep to use the implicit
1300 addressing. */
ae180d84 1301
18dbd950 1302static void
59f3507d 1303v850_reorg (void)
ae180d84 1304{
3ce15347
NC		 1305 struct
1306 {
ae180d84
JL		 1307 int uses;
1308 rtx first_insn;
1309 rtx last_insn;
3ce15347
NC		 1310 }
1311 regs[FIRST_PSEUDO_REGISTER];
ae180d84
JL		 1312
1313 int i;
1314 int use_ep = FALSE;
1315 rtx r1 = NULL_RTX;
1316 rtx ep = NULL_RTX;
1317 rtx insn;
1318 rtx pattern;
1319
61db4608 1320 /* If not ep mode, just return now. */
ae180d84
JL		 1321 if (!TARGET_EP)
1322 return;
1323
1324 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1325 {
1326 regs[i].uses = 0;
1327 regs[i].first_insn = NULL_RTX;
1328 regs[i].last_insn = NULL_RTX;
1329 }
1330
18dbd950 1331 for (insn = get_insns (); insn != NULL_RTX; insn = NEXT_INSN (insn))
ae180d84
JL		 1332 {
1333 switch (GET_CODE (insn))
1334 {
1335 /* End of basic block */
1336 default:
1337 if (!use_ep)
1338 {
1339 int max_uses = -1;
1340 int max_regno = -1;
1341
1342 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1343 {
1344 if (max_uses < regs[i].uses)
1345 {
1346 max_uses = regs[i].uses;
1347 max_regno = i;
1348 }
1349 }
1350
1351 if (max_uses > 3)
1352 substitute_ep_register (regs[max_regno].first_insn,
1353 regs[max_regno].last_insn,
1354 max_uses, max_regno, &r1, &ep);
1355 }
1356
1357 use_ep = FALSE;
1358 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1359 {
1360 regs[i].uses = 0;
1361 regs[i].first_insn = NULL_RTX;
1362 regs[i].last_insn = NULL_RTX;
1363 }
1364 break;
1365
1366 case NOTE:
1367 break;
1368
1369 case INSN:
1370 pattern = single_set (insn);
1371
1372 /* See if there are any memory references we can shorten */
1373 if (pattern)
1374 {
1375 rtx src = SET_SRC (pattern);
1376 rtx dest = SET_DEST (pattern);
1377 rtx mem;
1933ec7e
JW		 1378 /* Memory operands are signed by default. */
1379 int unsignedp = FALSE;
ae180d84 1380
9324411a 1381 /* We might have (SUBREG (MEM)) here, so just get rid of the
68882f0f
JJ		 1382 subregs to make this code simpler. */
1383 if (GET_CODE (dest) == SUBREG
1384 && (GET_CODE (SUBREG_REG (dest)) == MEM
1385 || GET_CODE (SUBREG_REG (dest)) == REG))
1386 alter_subreg (&dest);
1387 if (GET_CODE (src) == SUBREG
1388 && (GET_CODE (SUBREG_REG (src)) == MEM
1389 || GET_CODE (SUBREG_REG (src)) == REG))
1390 alter_subreg (&src);
9324411a 1391
ae180d84
JL		 1392 if (GET_CODE (dest) == MEM && GET_CODE (src) == MEM)
1393 mem = NULL_RTX;
1394
1395 else if (GET_CODE (dest) == MEM)
1396 mem = dest;
1397
1398 else if (GET_CODE (src) == MEM)
1399 mem = src;
1400
b4378319
NC		 1401 else if (GET_CODE (src) == SIGN_EXTEND
1402 && GET_CODE (XEXP (src, 0)) == MEM)
1403 mem = XEXP (src, 0);
1404
1405 else if (GET_CODE (src) == ZERO_EXTEND
1406 && GET_CODE (XEXP (src, 0)) == MEM)
1407 {
1408 mem = XEXP (src, 0);
1409 unsignedp = TRUE;
1410 }
ae180d84
JL		 1411 else
1412 mem = NULL_RTX;
1413
1933ec7e 1414 if (mem && ep_memory_operand (mem, GET_MODE (mem), unsignedp))
ae180d84
JL		 1415 use_ep = TRUE;
1416
1417 else if (!use_ep && mem
1418 && GET_MODE_SIZE (GET_MODE (mem)) <= UNITS_PER_WORD)
1419 {
1420 rtx addr = XEXP (mem, 0);
1421 int regno = -1;
1422 int short_p;
1423
1424 if (GET_CODE (addr) == REG)
1425 {
1426 short_p = TRUE;
1427 regno = REGNO (addr);
1428 }
1429
1430 else if (GET_CODE (addr) == PLUS
1431 && GET_CODE (XEXP (addr, 0)) == REG
1432 && GET_CODE (XEXP (addr, 1)) == CONST_INT
3ce15347 1433 && ((INTVAL (XEXP (addr, 1)))
2268cc52
JL		 1434 < ep_memory_offset (GET_MODE (mem), unsignedp))
1435 && ((INTVAL (XEXP (addr, 1))) >= 0))
ae180d84
JL		 1436 {
1437 short_p = TRUE;
1438 regno = REGNO (XEXP (addr, 0));
1439 }
1440
1441 else
1442 short_p = FALSE;
1443
1444 if (short_p)
1445 {
1446 regs[regno].uses++;
1447 regs[regno].last_insn = insn;
1448 if (!regs[regno].first_insn)
1449 regs[regno].first_insn = insn;
1450 }
1451 }
1452
1453 /* Loading up a register in the basic block zaps any savings
1454 for the register */
9324411a 1455 if (GET_CODE (dest) == REG)
ae180d84
JL		 1456 {
1457 enum machine_mode mode = GET_MODE (dest);
ae180d84
JL		 1458 int regno;
1459 int endregno;
1460
9324411a 1461 regno = REGNO (dest);
ae180d84
JL		 1462 endregno = regno + HARD_REGNO_NREGS (regno, mode);
1463
1464 if (!use_ep)
1465 {
1466 /* See if we can use the pointer before this
1467 modification. */
1468 int max_uses = -1;
1469 int max_regno = -1;
1470
1471 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1472 {
1473 if (max_uses < regs[i].uses)
1474 {
1475 max_uses = regs[i].uses;
1476 max_regno = i;
1477 }
1478 }
1479
1480 if (max_uses > 3
1481 && max_regno >= regno
1482 && max_regno < endregno)
1483 {
1484 substitute_ep_register (regs[max_regno].first_insn,
1485 regs[max_regno].last_insn,
3ce15347
NC		 1486 max_uses, max_regno, &r1,
1487 &ep);
ae180d84
JL		 1488
1489 /* Since we made a substitution, zap all remembered
1490 registers. */
1491 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1492 {
1493 regs[i].uses = 0;
1494 regs[i].first_insn = NULL_RTX;
1495 regs[i].last_insn = NULL_RTX;
1496 }
1497 }
1498 }
1499
1500 for (i = regno; i < endregno; i++)
1501 {
1502 regs[i].uses = 0;
1503 regs[i].first_insn = NULL_RTX;
1504 regs[i].last_insn = NULL_RTX;
1505 }
1506 }
1507 }
1508 }
1509 }
1510}
1511
ae180d84 1512/* # of registers saved by the interrupt handler. */
223a9d64 1513#define INTERRUPT_FIXED_NUM 5
ae180d84
JL		 1514
1515/* # of bytes for registers saved by the interrupt handler. */
1516#define INTERRUPT_FIXED_SAVE_SIZE (4 * INTERRUPT_FIXED_NUM)
1517
ae180d84
JL		 1518/* # of words saved for other registers. */
1519#define INTERRUPT_ALL_SAVE_NUM \
223a9d64 1520 (30 - INTERRUPT_FIXED_NUM)
ae180d84
JL		 1521
1522#define INTERRUPT_ALL_SAVE_SIZE (4 * INTERRUPT_ALL_SAVE_NUM)
1523
1524int
59f3507d 1525compute_register_save_size (long * p_reg_saved)
ae180d84
JL		 1526{
1527 int size = 0;
1528 int i;
1529 int interrupt_handler = v850_interrupt_function_p (current_function_decl);
6fb5fa3c 1530 int call_p = df_regs_ever_live_p (LINK_POINTER_REGNUM);
ae180d84
JL		 1531 long reg_saved = 0;
1532
1533 /* Count the return pointer if we need to save it. */
e3b5732b 1534 if (crtl->profile && !call_p)
6fb5fa3c
DB		 1535 {
1536 df_set_regs_ever_live (LINK_POINTER_REGNUM, true);
1537 call_p = 1;
1538 }
ae180d84
JL		 1539
1540 /* Count space for the register saves. */
1541 if (interrupt_handler)
1542 {
1543 for (i = 0; i <= 31; i++)
1544 switch (i)
1545 {
1546 default:
6fb5fa3c 1547 if (df_regs_ever_live_p (i) || call_p)
ae180d84
JL		 1548 {
1549 size += 4;
1550 reg_saved |= 1L << i;
1551 }
1552 break;
1553
1554 /* We don't save/restore r0 or the stack pointer */
1555 case 0:
1556 case STACK_POINTER_REGNUM:
1557 break;
1558
1559 /* For registers with fixed use, we save them, set them to the
1560 appropriate value, and then restore them.
1561 These registers are handled specially, so don't list them
1562 on the list of registers to save in the prologue. */
1563 case 1: /* temp used to hold ep */
b24bcfb3 1564 case 4: /* gp */
ae180d84 1565 case 10: /* temp used to call interrupt save/restore */
223a9d64 1566 case 11: /* temp used to call interrupt save/restore (long call) */
ae180d84
JL		 1567 case EP_REGNUM: /* ep */
1568 size += 4;
1569 break;
1570 }
1571 }
ae180d84 1572 else
29a65e3d
NC		 1573 {
1574 /* Find the first register that needs to be saved. */
1575 for (i = 0; i <= 31; i++)
6fb5fa3c 1576 if (df_regs_ever_live_p (i) && ((! call_used_regs[i])
29a65e3d
NC		 1577 || i == LINK_POINTER_REGNUM))
1578 break;
1579
1580 /* If it is possible that an out-of-line helper function might be
1581 used to generate the prologue for the current function, then we
1582 need to cover the possibility that such a helper function will
1583 be used, despite the fact that there might be gaps in the list of
1584 registers that need to be saved. To detect this we note that the
a17a104c
CM		 1585 helper functions always push at least register r29 (provided
1586 that the function is not an interrupt handler). */
29a65e3d
NC		 1587
1588 if (TARGET_PROLOG_FUNCTION
a17a104c 1589 && (i == 2 || ((i >= 20) && (i < 30))))
ae180d84 1590 {
29a65e3d
NC		 1591 if (i == 2)
1592 {
1593 size += 4;
1594 reg_saved |= 1L << i;
1595
1596 i = 20;
1597 }
ae180d84 1598
29a65e3d
NC		 1599 /* Helper functions save all registers between the starting
1600 register and the last register, regardless of whether they
1601 are actually used by the function or not. */
1602 for (; i <= 29; i++)
1603 {
1604 size += 4;
1605 reg_saved |= 1L << i;
1606 }
1607
6fb5fa3c 1608 if (df_regs_ever_live_p (LINK_POINTER_REGNUM))
29a65e3d
NC		 1609 {
1610 size += 4;
1611 reg_saved |= 1L << LINK_POINTER_REGNUM;
1612 }
1613 }
1614 else
1615 {
1616 for (; i <= 31; i++)
6fb5fa3c 1617 if (df_regs_ever_live_p (i) && ((! call_used_regs[i])
29a65e3d
NC		 1618 || i == LINK_POINTER_REGNUM))
1619 {
1620 size += 4;
1621 reg_saved |= 1L << i;
1622 }
1623 }
1624 }
1625
ae180d84
JL		 1626 if (p_reg_saved)
1627 *p_reg_saved = reg_saved;
1628
1629 return size;
1630}
1631
1632int
59f3507d 1633compute_frame_size (int size, long * p_reg_saved)
ae180d84 1634{
ae180d84
JL		 1635 return (size
1636 + compute_register_save_size (p_reg_saved)
38173d38 1637 + crtl->outgoing_args_size);
ae180d84
JL		 1638}
1639
223a9d64
N		 1640static int
1641use_prolog_function (int num_save, int frame_size)
1642{
1643 int alloc_stack = (4 * num_save);
1644 int unalloc_stack = frame_size - alloc_stack;
1645 int save_func_len, restore_func_len;
1646 int save_normal_len, restore_normal_len;
1647
1648 if (! TARGET_DISABLE_CALLT)
1649 save_func_len = restore_func_len = 2;
1650 else
1651 save_func_len = restore_func_len = TARGET_LONG_CALLS ? (4+4+4+2+2) : 4;
1652
1653 if (unalloc_stack)
1654 {
1655 save_func_len += CONST_OK_FOR_J (-unalloc_stack) ? 2 : 4;
1656 restore_func_len += CONST_OK_FOR_J (-unalloc_stack) ? 2 : 4;
1657 }
1658
1659 /* See if we would have used ep to save the stack. */
1660 if (TARGET_EP && num_save > 3 && (unsigned)frame_size < 255)
1661 save_normal_len = restore_normal_len = (3 * 2) + (2 * num_save);
1662 else
1663 save_normal_len = restore_normal_len = 4 * num_save;
1664
1665 save_normal_len += CONST_OK_FOR_J (-frame_size) ? 2 : 4;
1666 restore_normal_len += (CONST_OK_FOR_J (frame_size) ? 2 : 4) + 2;
1667
1668 /* Don't bother checking if we don't actually save any space.
1669 This happens for instance if one register is saved and additional
1670 stack space is allocated. */
1671 return ((save_func_len + restore_func_len) < (save_normal_len + restore_normal_len));
1672}
1673
ae180d84 1674void
59f3507d 1675expand_prologue (void)
ae180d84
JL		 1676{
1677 unsigned int i;
ae180d84
JL		 1678 unsigned int size = get_frame_size ();
1679 unsigned int actual_fsize;
1680 unsigned int init_stack_alloc = 0;
1681 rtx save_regs[32];
1682 rtx save_all;
3ce15347 1683 unsigned int num_save;
ae180d84
JL		 1684 int code;
1685 int interrupt_handler = v850_interrupt_function_p (current_function_decl);
1686 long reg_saved = 0;
1687
1688 actual_fsize = compute_frame_size (size, &reg_saved);
1689
0e668396 1690 /* Save/setup global registers for interrupt functions right now. */
ae180d84
JL		 1691 if (interrupt_handler)
1692 {
e5db8f2f 1693 if (! TARGET_DISABLE_CALLT && (TARGET_V850E || TARGET_V850E2_ALL))
b4378319
NC		 1694 emit_insn (gen_callt_save_interrupt ());
1695 else
674fdc14 1696 emit_insn (gen_save_interrupt ());
b4378319 1697
ae180d84 1698 actual_fsize -= INTERRUPT_FIXED_SAVE_SIZE;
29a65e3d
NC		 1699
1700 if (((1L << LINK_POINTER_REGNUM) & reg_saved) != 0)
ae180d84
JL		 1701 actual_fsize -= INTERRUPT_ALL_SAVE_SIZE;
1702 }
1703
0e668396 1704 /* Identify all of the saved registers. */
ae180d84 1705 num_save = 0;
223a9d64 1706 for (i = 1; i < 32; i++)
ae180d84
JL		 1707 {
1708 if (((1L << i) & reg_saved) != 0)
c5c76735 1709 save_regs[num_save++] = gen_rtx_REG (Pmode, i);
ae180d84
JL		 1710 }
1711
ae180d84
JL		 1712 /* See if we have an insn that allocates stack space and saves the particular
1713 registers we want to. */
1714 save_all = NULL_RTX;
223a9d64 1715 if (TARGET_PROLOG_FUNCTION && num_save > 0)
ae180d84 1716 {
223a9d64 1717 if (use_prolog_function (num_save, actual_fsize))
ae180d84 1718 {
223a9d64
N		 1719 int alloc_stack = 4 * num_save;
1720 int offset = 0;
1721
c5c76735
JL		 1722 save_all = gen_rtx_PARALLEL
1723 (VOIDmode,
fdf3bb57 1724 rtvec_alloc (num_save + 1
223a9d64 1725 + (TARGET_DISABLE_CALLT ? (TARGET_LONG_CALLS ? 2 : 1) : 0)));
c5c76735
JL		 1726
1727 XVECEXP (save_all, 0, 0)
1728 = gen_rtx_SET (VOIDmode,
1729 stack_pointer_rtx,
223a9d64
N		 1730 gen_rtx_PLUS (Pmode,
1731 stack_pointer_rtx,
1732 GEN_INT(-alloc_stack)));
ae180d84
JL		 1733 for (i = 0; i < num_save; i++)
1734 {
223a9d64 1735 offset -= 4;
c5c76735
JL		 1736 XVECEXP (save_all, 0, i+1)
1737 = gen_rtx_SET (VOIDmode,
1738 gen_rtx_MEM (Pmode,
223a9d64
N		 1739 gen_rtx_PLUS (Pmode,
1740 stack_pointer_rtx,
1741 GEN_INT(offset))),
c5c76735 1742 save_regs[i]);
ae180d84
JL		 1743 }
1744
223a9d64 1745 if (TARGET_DISABLE_CALLT)
fdf3bb57
NC		 1746 {
1747 XVECEXP (save_all, 0, num_save + 1)
1748 = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (Pmode, 10));
1749
1750 if (TARGET_LONG_CALLS)
1751 XVECEXP (save_all, 0, num_save + 2)
1752 = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (Pmode, 11));
1753 }
1754
df4ae160 1755 code = recog (save_all, NULL_RTX, NULL);
ae180d84
JL		 1756 if (code >= 0)
1757 {
1758 rtx insn = emit_insn (save_all);
1759 INSN_CODE (insn) = code;
1760 actual_fsize -= alloc_stack;
29a65e3d 1761
ae180d84
JL		 1762 }
1763 else
1764 save_all = NULL_RTX;
1765 }
1766 }
1767
3ce15347 1768 /* If no prolog save function is available, store the registers the old
d4de0221 1769 fashioned way (one by one). */
ae180d84
JL		 1770 if (!save_all)
1771 {
1772 /* Special case interrupt functions that save all registers for a call. */
29a65e3d
NC		 1773 if (interrupt_handler && ((1L << LINK_POINTER_REGNUM) & reg_saved) != 0)
1774 {
e5db8f2f 1775 if (! TARGET_DISABLE_CALLT && (TARGET_V850E || TARGET_V850E2_ALL))
b4378319
NC		 1776 emit_insn (gen_callt_save_all_interrupt ());
1777 else
1778 emit_insn (gen_save_all_interrupt ());
29a65e3d 1779 }
ae180d84
JL		 1780 else
1781 {
223a9d64 1782 int offset;
ae180d84
JL		 1783 /* If the stack is too big, allocate it in chunks so we can do the
1784 register saves. We use the register save size so we use the ep
1785 register. */
1786 if (actual_fsize && !CONST_OK_FOR_K (-actual_fsize))
1787 init_stack_alloc = compute_register_save_size (NULL);
1788 else
1789 init_stack_alloc = actual_fsize;
145870b5 1790
d4de0221 1791 /* Save registers at the beginning of the stack frame. */
ae180d84 1792 offset = init_stack_alloc - 4;
145870b5 1793
ae180d84
JL		 1794 if (init_stack_alloc)
1795 emit_insn (gen_addsi3 (stack_pointer_rtx,
1796 stack_pointer_rtx,
fda41d93 1797 GEN_INT (- (signed) init_stack_alloc)));
145870b5 1798
ae180d84 1799 /* Save the return pointer first. */
29a65e3d 1800 if (num_save > 0 && REGNO (save_regs[num_save-1]) == LINK_POINTER_REGNUM)
ae180d84 1801 {
c5c76735
JL		 1802 emit_move_insn (gen_rtx_MEM (SImode,
1803 plus_constant (stack_pointer_rtx,
1804 offset)),
ae180d84
JL		 1805 save_regs[--num_save]);
1806 offset -= 4;
1807 }
145870b5 1808
ae180d84
JL		 1809 for (i = 0; i < num_save; i++)
1810 {
c5c76735
JL		 1811 emit_move_insn (gen_rtx_MEM (SImode,
1812 plus_constant (stack_pointer_rtx,
1813 offset)),
ae180d84
JL		 1814 save_regs[i]);
1815 offset -= 4;
1816 }
1817 }
1818 }
1819
1820 /* Allocate the rest of the stack that was not allocated above (either it is
1821 > 32K or we just called a function to save the registers and needed more
1822 stack. */
1823 if (actual_fsize > init_stack_alloc)
1824 {
1825 int diff = actual_fsize - init_stack_alloc;
223a9d64 1826 if (CONST_OK_FOR_K (-diff))
ae180d84
JL		 1827 emit_insn (gen_addsi3 (stack_pointer_rtx,
1828 stack_pointer_rtx,
1829 GEN_INT (-diff)));
1830 else
1831 {
c5c76735 1832 rtx reg = gen_rtx_REG (Pmode, 12);
ae180d84
JL		 1833 emit_move_insn (reg, GEN_INT (-diff));
1834 emit_insn (gen_addsi3 (stack_pointer_rtx, stack_pointer_rtx, reg));
1835 }
1836 }
1837
1838 /* If we need a frame pointer, set it up now. */
1839 if (frame_pointer_needed)
1840 emit_move_insn (hard_frame_pointer_rtx, stack_pointer_rtx);
1841}
1842\f
1843
1844void
59f3507d 1845expand_epilogue (void)
ae180d84
JL		 1846{
1847 unsigned int i;
ae180d84
JL		 1848 unsigned int size = get_frame_size ();
1849 long reg_saved = 0;
fda41d93 1850 int actual_fsize = compute_frame_size (size, &reg_saved);
ae180d84
JL		 1851 rtx restore_regs[32];
1852 rtx restore_all;
3ce15347 1853 unsigned int num_restore;
ae180d84
JL		 1854 int code;
1855 int interrupt_handler = v850_interrupt_function_p (current_function_decl);
1856
1857 /* Eliminate the initial stack stored by interrupt functions. */
1858 if (interrupt_handler)
1859 {
1860 actual_fsize -= INTERRUPT_FIXED_SAVE_SIZE;
29a65e3d 1861 if (((1L << LINK_POINTER_REGNUM) & reg_saved) != 0)
ae180d84
JL		 1862 actual_fsize -= INTERRUPT_ALL_SAVE_SIZE;
1863 }
1864
1865 /* Cut off any dynamic stack created. */
1866 if (frame_pointer_needed)
1867 emit_move_insn (stack_pointer_rtx, hard_frame_pointer_rtx);
1868
0e668396 1869 /* Identify all of the saved registers. */
ae180d84 1870 num_restore = 0;
223a9d64 1871 for (i = 1; i < 32; i++)
ae180d84
JL		 1872 {
1873 if (((1L << i) & reg_saved) != 0)
c5c76735 1874 restore_regs[num_restore++] = gen_rtx_REG (Pmode, i);
ae180d84
JL		 1875 }
1876
ae180d84
JL		 1877 /* See if we have an insn that restores the particular registers we
1878 want to. */
1879 restore_all = NULL_RTX;
223a9d64 1880
0e668396
NC		 1881 if (TARGET_PROLOG_FUNCTION
1882 && num_restore > 0
ae180d84
JL		 1883 && !interrupt_handler)
1884 {
223a9d64 1885 int alloc_stack = (4 * num_restore);
ae180d84 1886
ae180d84 1887 /* Don't bother checking if we don't actually save any space. */
223a9d64 1888 if (use_prolog_function (num_restore, actual_fsize))
ae180d84 1889 {
223a9d64 1890 int offset;
c5c76735
JL		 1891 restore_all = gen_rtx_PARALLEL (VOIDmode,
1892 rtvec_alloc (num_restore + 2));
1893 XVECEXP (restore_all, 0, 0) = gen_rtx_RETURN (VOIDmode);
ae180d84 1894 XVECEXP (restore_all, 0, 1)
c5c76735
JL		 1895 = gen_rtx_SET (VOIDmode, stack_pointer_rtx,
1896 gen_rtx_PLUS (Pmode,
1897 stack_pointer_rtx,
1898 GEN_INT (alloc_stack)));
ae180d84
JL		 1899
1900 offset = alloc_stack - 4;
1901 for (i = 0; i < num_restore; i++)
1902 {
1903 XVECEXP (restore_all, 0, i+2)
c5c76735
JL		 1904 = gen_rtx_SET (VOIDmode,
1905 restore_regs[i],
1906 gen_rtx_MEM (Pmode,
223a9d64
N		 1907 gen_rtx_PLUS (Pmode,
1908 stack_pointer_rtx,
1909 GEN_INT(offset))));
ae180d84
JL		 1910 offset -= 4;
1911 }
1912
df4ae160 1913 code = recog (restore_all, NULL_RTX, NULL);
0e668396 1914
ae180d84
JL		 1915 if (code >= 0)
1916 {
1917 rtx insn;
1918
1919 actual_fsize -= alloc_stack;
1920 if (actual_fsize)
1921 {
1922 if (CONST_OK_FOR_K (actual_fsize))
1923 emit_insn (gen_addsi3 (stack_pointer_rtx,
1924 stack_pointer_rtx,
1925 GEN_INT (actual_fsize)));
1926 else
1927 {
c5c76735 1928 rtx reg = gen_rtx_REG (Pmode, 12);
ae180d84
JL		 1929 emit_move_insn (reg, GEN_INT (actual_fsize));
1930 emit_insn (gen_addsi3 (stack_pointer_rtx,
1931 stack_pointer_rtx,
1932 reg));
1933 }
1934 }
1935
1936 insn = emit_jump_insn (restore_all);
1937 INSN_CODE (insn) = code;
1938
ae180d84
JL		 1939 }
1940 else
1941 restore_all = NULL_RTX;
1942 }
1943 }
1944
22f23985 1945 /* If no epilogue save function is available, restore the registers the
0e668396 1946 old fashioned way (one by one). */
ae180d84
JL		 1947 if (!restore_all)
1948 {
223a9d64
N		 1949 unsigned int init_stack_free;
1950
ae180d84 1951 /* If the stack is large, we need to cut it down in 2 pieces. */
223a9d64
N		 1952 if (interrupt_handler)
1953 init_stack_free = 0;
1954 else if (actual_fsize && !CONST_OK_FOR_K (-actual_fsize))
ae180d84
JL		 1955 init_stack_free = 4 * num_restore;
1956 else
fda41d93 1957 init_stack_free = (signed) actual_fsize;
ae180d84 1958
0e668396 1959 /* Deallocate the rest of the stack if it is > 32K. */
5a82ecd9 1960 if ((unsigned int) actual_fsize > init_stack_free)
ae180d84 1961 {
3ce15347
NC		 1962 int diff;
1963
223a9d64 1964 diff = actual_fsize - init_stack_free;
0e668396 1965
ae180d84
JL		 1966 if (CONST_OK_FOR_K (diff))
1967 emit_insn (gen_addsi3 (stack_pointer_rtx,
1968 stack_pointer_rtx,
1969 GEN_INT (diff)));
1970 else
1971 {
c5c76735 1972 rtx reg = gen_rtx_REG (Pmode, 12);
ae180d84
JL		 1973 emit_move_insn (reg, GEN_INT (diff));
1974 emit_insn (gen_addsi3 (stack_pointer_rtx,
1975 stack_pointer_rtx,
1976 reg));
1977 }
1978 }
1979
1980 /* Special case interrupt functions that save all registers
1981 for a call. */
29a65e3d
NC		 1982 if (interrupt_handler && ((1L << LINK_POINTER_REGNUM) & reg_saved) != 0)
1983 {
223a9d64 1984 if (! TARGET_DISABLE_CALLT)
b4378319
NC		 1985 emit_insn (gen_callt_restore_all_interrupt ());
1986 else
1987 emit_insn (gen_restore_all_interrupt ());
29a65e3d 1988 }
ae180d84
JL		 1989 else
1990 {
0e668396 1991 /* Restore registers from the beginning of the stack frame. */
223a9d64 1992 int offset = init_stack_free - 4;
ae180d84
JL		 1993
1994 /* Restore the return pointer first. */
29a65e3d
NC		 1995 if (num_restore > 0
1996 && REGNO (restore_regs [num_restore - 1]) == LINK_POINTER_REGNUM)
ae180d84
JL		 1997 {
1998 emit_move_insn (restore_regs[--num_restore],
c5c76735
JL		 1999 gen_rtx_MEM (SImode,
2000 plus_constant (stack_pointer_rtx,
2001 offset)));
ae180d84
JL		 2002 offset -= 4;
2003 }
2004
2005 for (i = 0; i < num_restore; i++)
2006 {
2007 emit_move_insn (restore_regs[i],
c5c76735
JL		 2008 gen_rtx_MEM (SImode,
2009 plus_constant (stack_pointer_rtx,
2010 offset)));
ae180d84 2011
c41c1387 2012 emit_use (restore_regs[i]);
ae180d84
JL		 2013 offset -= 4;
2014 }
2015
2016 /* Cut back the remainder of the stack. */
2017 if (init_stack_free)
2018 emit_insn (gen_addsi3 (stack_pointer_rtx,
2019 stack_pointer_rtx,
2020 GEN_INT (init_stack_free)));
2021 }
2022
2023 /* And return or use reti for interrupt handlers. */
2024 if (interrupt_handler)
b4378319 2025 {
e5db8f2f 2026 if (! TARGET_DISABLE_CALLT && (TARGET_V850E || TARGET_V850E2_ALL))
b4378319
NC		 2027 emit_insn (gen_callt_return_interrupt ());
2028 else
2029 emit_jump_insn (gen_return_interrupt ());
2030 }
ae180d84
JL		 2031 else if (actual_fsize)
2032 emit_jump_insn (gen_return_internal ());
2033 else
7323a100 2034 emit_jump_insn (gen_return_simple ());
ae180d84
JL		 2035 }
2036
ae180d84
JL		 2037 v850_interrupt_cache_p = FALSE;
2038 v850_interrupt_p = FALSE;
2039}
2040
ae180d84 2041/* Update the condition code from the insn. */
ae180d84 2042void
59f3507d 2043notice_update_cc (rtx body, rtx insn)
ae180d84
JL		 2044{
2045 switch (get_attr_cc (insn))
2046 {
2047 case CC_NONE:
2048 /* Insn does not affect CC at all. */
2049 break;
2050
2051 case CC_NONE_0HIT:
2052 /* Insn does not change CC, but the 0'th operand has been changed. */
2053 if (cc_status.value1 != 0
1ccbefce 2054 && reg_overlap_mentioned_p (recog_data.operand[0], cc_status.value1))
ae180d84
JL		 2055 cc_status.value1 = 0;
2056 break;
2057
2058 case CC_SET_ZN:
1ccbefce 2059 /* Insn sets the Z,N flags of CC to recog_data.operand[0].
ae180d84
JL		 2060 V,C is in an unusable state. */
2061 CC_STATUS_INIT;
2062 cc_status.flags |= CC_OVERFLOW_UNUSABLE | CC_NO_CARRY;
1ccbefce 2063 cc_status.value1 = recog_data.operand[0];
ae180d84
JL		 2064 break;
2065
2066 case CC_SET_ZNV:
1ccbefce 2067 /* Insn sets the Z,N,V flags of CC to recog_data.operand[0].
223a9d64 2068 C is in an unusable state. */
ae180d84
JL		 2069 CC_STATUS_INIT;
2070 cc_status.flags |= CC_NO_CARRY;
1ccbefce 2071 cc_status.value1 = recog_data.operand[0];
ae180d84
JL		 2072 break;
2073
2074 case CC_COMPARE:
2075 /* The insn is a compare instruction. */
2076 CC_STATUS_INIT;
2077 cc_status.value1 = SET_SRC (body);
2078 break;
2079
2080 case CC_CLOBBER:
2081 /* Insn doesn't leave CC in a usable state. */
2082 CC_STATUS_INIT;
2083 break;
122603fa
N		 2084
2085 default:
2086 break;
ae180d84
JL		 2087 }
2088}
223a9d64 2089
3ce15347 2090/* Retrieve the data area that has been chosen for the given decl. */
ae180d84 2091
3ce15347 2092v850_data_area
59f3507d 2093v850_get_data_area (tree decl)
3ce15347 2094{
91d231cb 2095 if (lookup_attribute ("sda", DECL_ATTRIBUTES (decl)) != NULL_TREE)
3ce15347
NC		 2096 return DATA_AREA_SDA;
2097
91d231cb 2098 if (lookup_attribute ("tda", DECL_ATTRIBUTES (decl)) != NULL_TREE)
3ce15347
NC		 2099 return DATA_AREA_TDA;
2100
91d231cb 2101 if (lookup_attribute ("zda", DECL_ATTRIBUTES (decl)) != NULL_TREE)
3ce15347
NC		 2102 return DATA_AREA_ZDA;
2103
2104 return DATA_AREA_NORMAL;
2105}
ae180d84 2106
3ce15347
NC		 2107/* Store the indicated data area in the decl's attributes. */
2108
2109static void
59f3507d 2110v850_set_data_area (tree decl, v850_data_area data_area)
3ce15347
NC		 2111{
2112 tree name;
2113
2114 switch (data_area)
2115 {
2116 case DATA_AREA_SDA: name = get_identifier ("sda"); break;
2117 case DATA_AREA_TDA: name = get_identifier ("tda"); break;
2118 case DATA_AREA_ZDA: name = get_identifier ("zda"); break;
2119 default:
2120 return;
2121 }
2122
91d231cb
JM		 2123 DECL_ATTRIBUTES (decl) = tree_cons
2124 (name, NULL, DECL_ATTRIBUTES (decl));
3ce15347
NC		 2125}
2126\f
91d231cb
JM		 2127/* Handle an "interrupt" attribute; arguments as in
2128 struct attribute_spec.handler. */
2129static tree
59f3507d
NN		 2130v850_handle_interrupt_attribute (tree * node,
2131 tree name,
2132 tree args ATTRIBUTE_UNUSED,
2133 int flags ATTRIBUTE_UNUSED,
2134 bool * no_add_attrs)
91d231cb
JM		 2135{
2136 if (TREE_CODE (*node) != FUNCTION_DECL)
2137 {
29d08eba
JM		 2138 warning (OPT_Wattributes, "%qE attribute only applies to functions",
2139 name);
91d231cb
JM		 2140 *no_add_attrs = true;
2141 }
2142
2143 return NULL_TREE;
2144}
2145
2146/* Handle a "sda", "tda" or "zda" attribute; arguments as in
2147 struct attribute_spec.handler. */
2148static tree
59f3507d
NN		 2149v850_handle_data_area_attribute (tree* node,
2150 tree name,
2151 tree args ATTRIBUTE_UNUSED,
2152 int flags ATTRIBUTE_UNUSED,
2153 bool * no_add_attrs)
ae180d84 2154{
3ce15347
NC		 2155 v850_data_area data_area;
2156 v850_data_area area;
91d231cb 2157 tree decl = *node;
ae180d84 2158
3ce15347 2159 /* Implement data area attribute. */
91d231cb 2160 if (is_attribute_p ("sda", name))
3ce15347 2161 data_area = DATA_AREA_SDA;
91d231cb 2162 else if (is_attribute_p ("tda", name))
3ce15347 2163 data_area = DATA_AREA_TDA;
91d231cb 2164 else if (is_attribute_p ("zda", name))
3ce15347
NC		 2165 data_area = DATA_AREA_ZDA;
2166 else
f2f84cba 2167 gcc_unreachable ();
3ce15347
NC		 2168
2169 switch (TREE_CODE (decl))
2170 {
2171 case VAR_DECL:
2172 if (current_function_decl != NULL_TREE)
91d231cb 2173 {
c5d75364
MLI		 2174 error_at (DECL_SOURCE_LOCATION (decl),
2175 "data area attributes cannot be specified for "
2176 "local variables");
91d231cb
JM		 2177 *no_add_attrs = true;
2178 }
2179
3ce15347
NC		 2180 /* Drop through. */
2181
2182 case FUNCTION_DECL:
2183 area = v850_get_data_area (decl);
2184 if (area != DATA_AREA_NORMAL && data_area != area)
91d231cb 2185 {
dee15844
JM		 2186 error ("data area of %q+D conflicts with previous declaration",
2187 decl);
91d231cb
JM		 2188 *no_add_attrs = true;
2189 }
2190 break;
3ce15347
NC		 2191
2192 default:
2193 break;
2194 }
91d231cb
JM		 2195
2196 return NULL_TREE;
ae180d84
JL		 2197}
2198
2199\f
2200/* Return nonzero if FUNC is an interrupt function as specified
2201 by the "interrupt" attribute. */
2202
2203int
59f3507d 2204v850_interrupt_function_p (tree func)
ae180d84
JL		 2205{
2206 tree a;
2207 int ret = 0;
2208
2209 if (v850_interrupt_cache_p)
2210 return v850_interrupt_p;
2211
2212 if (TREE_CODE (func) != FUNCTION_DECL)
2213 return 0;
2214
91d231cb 2215 a = lookup_attribute ("interrupt_handler", DECL_ATTRIBUTES (func));
ae180d84
JL		 2216 if (a != NULL_TREE)
2217 ret = 1;
2218
2219 else
2220 {
91d231cb 2221 a = lookup_attribute ("interrupt", DECL_ATTRIBUTES (func));
ae180d84
JL		 2222 ret = a != NULL_TREE;
2223 }
2224
2225 /* Its not safe to trust global variables until after function inlining has
2226 been done. */
2227 if (reload_completed | reload_in_progress)
2228 v850_interrupt_p = ret;
2229
2230 return ret;
2231}
2232
2233\f
fb49053f 2234static void
59f3507d 2235v850_encode_data_area (tree decl, rtx symbol)
ae180d84 2236{
50d1ff6a 2237 int flags;
3ce15347 2238
839a4992 2239 /* Map explicit sections into the appropriate attribute */
3ce15347
NC		 2240 if (v850_get_data_area (decl) == DATA_AREA_NORMAL)
2241 {
2242 if (DECL_SECTION_NAME (decl))
2243 {
3cce094d 2244 const char *name = TREE_STRING_POINTER (DECL_SECTION_NAME (decl));
3ce15347
NC		 2245
2246 if (streq (name, ".zdata") || streq (name, ".zbss"))
2247 v850_set_data_area (decl, DATA_AREA_ZDA);
2248
2249 else if (streq (name, ".sdata") || streq (name, ".sbss"))
2250 v850_set_data_area (decl, DATA_AREA_SDA);
2251
2252 else if (streq (name, ".tdata"))
2253 v850_set_data_area (decl, DATA_AREA_TDA);
2254 }
2255
2256 /* If no attribute, support -m{zda,sda,tda}=n */
2257 else
2258 {
2259 int size = int_size_in_bytes (TREE_TYPE (decl));
2260 if (size <= 0)
2261 ;
2262
4a8d3d91 2263 else if (size <= small_memory_max [(int) SMALL_MEMORY_TDA])
3ce15347
NC		 2264 v850_set_data_area (decl, DATA_AREA_TDA);
2265
4a8d3d91 2266 else if (size <= small_memory_max [(int) SMALL_MEMORY_SDA])
3ce15347
NC		 2267 v850_set_data_area (decl, DATA_AREA_SDA);
2268
4a8d3d91 2269 else if (size <= small_memory_max [(int) SMALL_MEMORY_ZDA])
3ce15347
NC		 2270 v850_set_data_area (decl, DATA_AREA_ZDA);
2271 }
2272
2273 if (v850_get_data_area (decl) == DATA_AREA_NORMAL)
2274 return;
2275 }
2276
50d1ff6a 2277 flags = SYMBOL_REF_FLAGS (symbol);
3ce15347
NC		 2278 switch (v850_get_data_area (decl))
2279 {
50d1ff6a
RH		 2280 case DATA_AREA_ZDA: flags |= SYMBOL_FLAG_ZDA; break;
2281 case DATA_AREA_TDA: flags |= SYMBOL_FLAG_TDA; break;
2282 case DATA_AREA_SDA: flags |= SYMBOL_FLAG_SDA; break;
f2f84cba 2283 default: gcc_unreachable ();
3ce15347 2284 }
50d1ff6a 2285 SYMBOL_REF_FLAGS (symbol) = flags;
ae180d84 2286}
145870b5 2287
fb49053f 2288static void
59f3507d 2289v850_encode_section_info (tree decl, rtx rtl, int first)
fb49053f 2290{
c6a2438a 2291 default_encode_section_info (decl, rtl, first);
50d1ff6a
RH		 2292
2293 if (TREE_CODE (decl) == VAR_DECL
fb49053f 2294 && (TREE_STATIC (decl) || DECL_EXTERNAL (decl)))
c6a2438a 2295 v850_encode_data_area (decl, XEXP (rtl, 0));
fb49053f
RH		 2296}
2297
145870b5
NC		 2298/* Construct a JR instruction to a routine that will perform the equivalent of
2299 the RTL passed in as an argument. This RTL is a function epilogue that
2300 pops registers off the stack and possibly releases some extra stack space
2301 as well. The code has already verified that the RTL matches these
2302 requirements. */
223a9d64 2303
145870b5 2304char *
59f3507d 2305construct_restore_jr (rtx op)
145870b5
NC		 2306{
2307 int count = XVECLEN (op, 0);
2308 int stack_bytes;
2309 unsigned long int mask;
2310 unsigned long int first;
2311 unsigned long int last;
2312 int i;
2313 static char buff [100]; /* XXX */
2314
2315 if (count <= 2)
2316 {
ab532386 2317 error ("bogus JR construction: %d", count);
145870b5
NC		 2318 return NULL;
2319 }
2320
2321 /* Work out how many bytes to pop off the stack before retrieving
2322 registers. */
f2f84cba
NS		 2323 gcc_assert (GET_CODE (XVECEXP (op, 0, 1)) == SET);
2324 gcc_assert (GET_CODE (SET_SRC (XVECEXP (op, 0, 1))) == PLUS);
2325 gcc_assert (GET_CODE (XEXP (SET_SRC (XVECEXP (op, 0, 1)), 1)) == CONST_INT);
145870b5
NC		 2326
2327 stack_bytes = INTVAL (XEXP (SET_SRC (XVECEXP (op, 0, 1)), 1));
2328
d4de0221 2329 /* Each pop will remove 4 bytes from the stack.... */
145870b5
NC		 2330 stack_bytes -= (count - 2) * 4;
2331
2332 /* Make sure that the amount we are popping either 0 or 16 bytes. */
223a9d64 2333 if (stack_bytes != 0)
145870b5 2334 {
c725bd79 2335 error ("bad amount of stack space removal: %d", stack_bytes);
145870b5
NC		 2336 return NULL;
2337 }
2338
2339 /* Now compute the bit mask of registers to push. */
2340 mask = 0;
2341 for (i = 2; i < count; i++)
2342 {
2343 rtx vector_element = XVECEXP (op, 0, i);
2344
f2f84cba
NS		 2345 gcc_assert (GET_CODE (vector_element) == SET);
2346 gcc_assert (GET_CODE (SET_DEST (vector_element)) == REG);
2347 gcc_assert (register_is_ok_for_epilogue (SET_DEST (vector_element),
2348 SImode));
145870b5
NC		 2349
2350 mask |= 1 << REGNO (SET_DEST (vector_element));
2351 }
2352
2353 /* Scan for the first register to pop. */
2354 for (first = 0; first < 32; first++)
2355 {
2356 if (mask & (1 << first))
2357 break;
2358 }
2359
f2f84cba 2360 gcc_assert (first < 32);
145870b5
NC		 2361
2362 /* Discover the last register to pop. */
29a65e3d 2363 if (mask & (1 << LINK_POINTER_REGNUM))
145870b5 2364 {
29a65e3d 2365 last = LINK_POINTER_REGNUM;
145870b5
NC		 2366 }
2367 else
2368 {
f2f84cba
NS		 2369 gcc_assert (!stack_bytes);
2370 gcc_assert (mask & (1 << 29));
145870b5
NC		 2371
2372 last = 29;
2373 }
2374
323d8e7b
JL		 2375 /* Note, it is possible to have gaps in the register mask.
2376 We ignore this here, and generate a JR anyway. We will
3ce15347 2377 be popping more registers than is strictly necessary, but
323d8e7b
JL		 2378 it does save code space. */
2379
be1d3f93
NC		 2380 if (TARGET_LONG_CALLS)
2381 {
2382 char name[40];
2383
2384 if (first == last)
2385 sprintf (name, "__return_%s", reg_names [first]);
2386 else
2387 sprintf (name, "__return_%s_%s", reg_names [first], reg_names [last]);
2388
2389 sprintf (buff, "movhi hi(%s), r0, r6\n\tmovea lo(%s), r6, r6\n\tjmp r6",
2390 name, name);
2391 }
145870b5 2392 else
be1d3f93
NC		 2393 {
2394 if (first == last)
2395 sprintf (buff, "jr __return_%s", reg_names [first]);
2396 else
2397 sprintf (buff, "jr __return_%s_%s", reg_names [first], reg_names [last]);
2398 }
2399
145870b5
NC		 2400 return buff;
2401}
2402
2403
145870b5
NC		 2404/* Construct a JARL instruction to a routine that will perform the equivalent
2405 of the RTL passed as a parameter. This RTL is a function prologue that
2406 saves some of the registers r20 - r31 onto the stack, and possibly acquires
2407 some stack space as well. The code has already verified that the RTL
2408 matches these requirements. */
2409char *
59f3507d 2410construct_save_jarl (rtx op)
145870b5
NC		 2411{
2412 int count = XVECLEN (op, 0);
2413 int stack_bytes;
2414 unsigned long int mask;
2415 unsigned long int first;
2416 unsigned long int last;
2417 int i;
2418 static char buff [100]; /* XXX */
2419
223a9d64 2420 if (count <= (TARGET_LONG_CALLS ? 3 : 2))
145870b5 2421 {
d8a07487 2422 error ("bogus JARL construction: %d", count);
145870b5
NC		 2423 return NULL;
2424 }
2425
2426 /* Paranoia. */
f2f84cba
NS		 2427 gcc_assert (GET_CODE (XVECEXP (op, 0, 0)) == SET);
2428 gcc_assert (GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) == PLUS);
2429 gcc_assert (GET_CODE (XEXP (SET_SRC (XVECEXP (op, 0, 0)), 0)) == REG);
2430 gcc_assert (GET_CODE (XEXP (SET_SRC (XVECEXP (op, 0, 0)), 1)) == CONST_INT);
145870b5
NC		 2431
2432 /* Work out how many bytes to push onto the stack after storing the
2433 registers. */
2434 stack_bytes = INTVAL (XEXP (SET_SRC (XVECEXP (op, 0, 0)), 1));
2435
d4de0221 2436 /* Each push will put 4 bytes from the stack.... */
fdf3bb57 2437 stack_bytes += (count - (TARGET_LONG_CALLS ? 3 : 2)) * 4;
145870b5
NC		 2438
2439 /* Make sure that the amount we are popping either 0 or 16 bytes. */
223a9d64 2440 if (stack_bytes != 0)
145870b5 2441 {
c725bd79 2442 error ("bad amount of stack space removal: %d", stack_bytes);
145870b5
NC		 2443 return NULL;
2444 }
2445
2446 /* Now compute the bit mask of registers to push. */
2447 mask = 0;
fdf3bb57 2448 for (i = 1; i < count - (TARGET_LONG_CALLS ? 2 : 1); i++)
145870b5
NC		 2449 {
2450 rtx vector_element = XVECEXP (op, 0, i);
2451
f2f84cba
NS		 2452 gcc_assert (GET_CODE (vector_element) == SET);
2453 gcc_assert (GET_CODE (SET_SRC (vector_element)) == REG);
2454 gcc_assert (register_is_ok_for_epilogue (SET_SRC (vector_element),
2455 SImode));
145870b5
NC		 2456
2457 mask |= 1 << REGNO (SET_SRC (vector_element));
2458 }
2459
2460 /* Scan for the first register to push. */
2461 for (first = 0; first < 32; first++)
2462 {
2463 if (mask & (1 << first))
2464 break;
2465 }
2466
f2f84cba 2467 gcc_assert (first < 32);
145870b5
NC		 2468
2469 /* Discover the last register to push. */
29a65e3d 2470 if (mask & (1 << LINK_POINTER_REGNUM))
145870b5 2471 {
29a65e3d 2472 last = LINK_POINTER_REGNUM;
145870b5
NC		 2473 }
2474 else
2475 {
f2f84cba
NS		 2476 gcc_assert (!stack_bytes);
2477 gcc_assert (mask & (1 << 29));
145870b5
NC		 2478
2479 last = 29;
2480 }
2481
323d8e7b
JL		 2482 /* Note, it is possible to have gaps in the register mask.
2483 We ignore this here, and generate a JARL anyway. We will
3ce15347 2484 be pushing more registers than is strictly necessary, but
323d8e7b
JL		 2485 it does save code space. */
2486
be1d3f93
NC		 2487 if (TARGET_LONG_CALLS)
2488 {
2489 char name[40];
2490
2491 if (first == last)
2492 sprintf (name, "__save_%s", reg_names [first]);
2493 else
2494 sprintf (name, "__save_%s_%s", reg_names [first], reg_names [last]);
2495
2496 sprintf (buff, "movhi hi(%s), r0, r11\n\tmovea lo(%s), r11, r11\n\tjarl .+4, r10\n\tadd 4, r10\n\tjmp r11",
2497 name, name);
2498 }
145870b5 2499 else
be1d3f93
NC		 2500 {
2501 if (first == last)
2502 sprintf (buff, "jarl __save_%s, r10", reg_names [first]);
2503 else
2504 sprintf (buff, "jarl __save_%s_%s, r10", reg_names [first],
2505 reg_names [last]);
2506 }
145870b5
NC		 2507
2508 return buff;
2509}
2510
3ce15347
NC		 2511extern tree last_assemble_variable_decl;
2512extern int size_directive_output;
2513
2514/* A version of asm_output_aligned_bss() that copes with the special
d4de0221 2515 data areas of the v850. */
3ce15347 2516void
59f3507d
NN		 2517v850_output_aligned_bss (FILE * file,
2518 tree decl,
2519 const char * name,
ea40ba9c 2520 unsigned HOST_WIDE_INT size,
59f3507d 2521 int align)
3ce15347 2522{
3ce15347
NC		 2523 switch (v850_get_data_area (decl))
2524 {
2525 case DATA_AREA_ZDA:
d6b5193b 2526 switch_to_section (zbss_section);
3ce15347
NC		 2527 break;
2528
2529 case DATA_AREA_SDA:
d6b5193b 2530 switch_to_section (sbss_section);
3ce15347
NC		 2531 break;
2532
2533 case DATA_AREA_TDA:
d6b5193b 2534 switch_to_section (tdata_section);
3ce15347
NC		 2535
2536 default:
d6b5193b 2537 switch_to_section (bss_section);
3ce15347
NC		 2538 break;
2539 }
2540
2541 ASM_OUTPUT_ALIGN (file, floor_log2 (align / BITS_PER_UNIT));
2542#ifdef ASM_DECLARE_OBJECT_NAME
2543 last_assemble_variable_decl = decl;
2544 ASM_DECLARE_OBJECT_NAME (file, name, decl);
2545#else
2546 /* Standard thing is just output label for the object. */
2547 ASM_OUTPUT_LABEL (file, name);
2548#endif /* ASM_DECLARE_OBJECT_NAME */
2549 ASM_OUTPUT_SKIP (file, size ? size : 1);
2550}
2551
2552/* Called via the macro ASM_OUTPUT_DECL_COMMON */
2553void
59f3507d
NN		 2554v850_output_common (FILE * file,
2555 tree decl,
2556 const char * name,
2557 int size,
2558 int align)
3ce15347
NC		 2559{
2560 if (decl == NULL_TREE)
2561 {
b9f7d63e 2562 fprintf (file, "%s", COMMON_ASM_OP);
3ce15347
NC		 2563 }
2564 else
2565 {
2566 switch (v850_get_data_area (decl))
2567 {
2568 case DATA_AREA_ZDA:
b9f7d63e 2569 fprintf (file, "%s", ZCOMMON_ASM_OP);
3ce15347
NC		 2570 break;
2571
2572 case DATA_AREA_SDA:
b9f7d63e 2573 fprintf (file, "%s", SCOMMON_ASM_OP);
3ce15347
NC		 2574 break;
2575
2576 case DATA_AREA_TDA:
b9f7d63e 2577 fprintf (file, "%s", TCOMMON_ASM_OP);
3ce15347
NC		 2578 break;
2579
2580 default:
b9f7d63e 2581 fprintf (file, "%s", COMMON_ASM_OP);
3ce15347
NC		 2582 break;
2583 }
2584 }
2585
2586 assemble_name (file, name);
2587 fprintf (file, ",%u,%u\n", size, align / BITS_PER_UNIT);
2588}
2589
2590/* Called via the macro ASM_OUTPUT_DECL_LOCAL */
2591void
59f3507d
NN		 2592v850_output_local (FILE * file,
2593 tree decl,
2594 const char * name,
2595 int size,
2596 int align)
3ce15347 2597{
b9f7d63e 2598 fprintf (file, "%s", LOCAL_ASM_OP);
3ce15347
NC		 2599 assemble_name (file, name);
2600 fprintf (file, "\n");
2601
2602 ASM_OUTPUT_ALIGNED_DECL_COMMON (file, decl, name, size, align);
2603}
3ce15347
NC		 2604
2605/* Add data area to the given declaration if a ghs data area pragma is
2606 currently in effect (#pragma ghs startXXX/endXXX). */
12a68f1f 2607static void
59f3507d 2608v850_insert_attributes (tree decl, tree * attr_ptr ATTRIBUTE_UNUSED )
3ce15347
NC		 2609{
2610 if (data_area_stack
2611 && data_area_stack->data_area
2612 && current_function_decl == NULL_TREE
2613 && (TREE_CODE (decl) == VAR_DECL || TREE_CODE (decl) == CONST_DECL)
2614 && v850_get_data_area (decl) == DATA_AREA_NORMAL)
2615 v850_set_data_area (decl, data_area_stack->data_area);
2616
4912a07c 2617 /* Initialize the default names of the v850 specific sections,
3ce15347
NC		 2618 if this has not been done before. */
2619
2620 if (GHS_default_section_names [(int) GHS_SECTION_KIND_SDATA] == NULL)
2621 {
2622 GHS_default_section_names [(int) GHS_SECTION_KIND_SDATA]
2623 = build_string (sizeof (".sdata")-1, ".sdata");
2624
2625 GHS_default_section_names [(int) GHS_SECTION_KIND_ROSDATA]
2626 = build_string (sizeof (".rosdata")-1, ".rosdata");
2627
2628 GHS_default_section_names [(int) GHS_SECTION_KIND_TDATA]
2629 = build_string (sizeof (".tdata")-1, ".tdata");
2630
2631 GHS_default_section_names [(int) GHS_SECTION_KIND_ZDATA]
2632 = build_string (sizeof (".zdata")-1, ".zdata");
2633
2634 GHS_default_section_names [(int) GHS_SECTION_KIND_ROZDATA]
2635 = build_string (sizeof (".rozdata")-1, ".rozdata");
2636 }
2637
2638 if (current_function_decl == NULL_TREE
2639 && (TREE_CODE (decl) == VAR_DECL
2640 || TREE_CODE (decl) == CONST_DECL
2641 || TREE_CODE (decl) == FUNCTION_DECL)
2642 && (!DECL_EXTERNAL (decl) || DECL_INITIAL (decl))
2643 && !DECL_SECTION_NAME (decl))
2644 {
2645 enum GHS_section_kind kind = GHS_SECTION_KIND_DEFAULT;
2646 tree chosen_section;
2647
2648 if (TREE_CODE (decl) == FUNCTION_DECL)
2649 kind = GHS_SECTION_KIND_TEXT;
2650 else
2651 {
d4de0221 2652 /* First choose a section kind based on the data area of the decl. */
3ce15347
NC		 2653 switch (v850_get_data_area (decl))
2654 {
2655 default:
f2f84cba 2656 gcc_unreachable ();
3ce15347
NC		 2657
2658 case DATA_AREA_SDA:
2659 kind = ((TREE_READONLY (decl))
2660 ? GHS_SECTION_KIND_ROSDATA
2661 : GHS_SECTION_KIND_SDATA);
2662 break;
2663
2664 case DATA_AREA_TDA:
2665 kind = GHS_SECTION_KIND_TDATA;
2666 break;
2667
2668 case DATA_AREA_ZDA:
2669 kind = ((TREE_READONLY (decl))
2670 ? GHS_SECTION_KIND_ROZDATA
2671 : GHS_SECTION_KIND_ZDATA);
2672 break;
2673
2674 case DATA_AREA_NORMAL: /* default data area */
2675 if (TREE_READONLY (decl))
2676 kind = GHS_SECTION_KIND_RODATA;
2677 else if (DECL_INITIAL (decl))
2678 kind = GHS_SECTION_KIND_DATA;
2679 else
2680 kind = GHS_SECTION_KIND_BSS;
2681 }
2682 }
2683
2684 /* Now, if the section kind has been explicitly renamed,
d4de0221 2685 then attach a section attribute. */
3ce15347
NC		 2686 chosen_section = GHS_current_section_names [(int) kind];
2687
2688 /* Otherwise, if this kind of section needs an explicit section
d4de0221 2689 attribute, then also attach one. */
3ce15347
NC		 2690 if (chosen_section == NULL)
2691 chosen_section = GHS_default_section_names [(int) kind];
2692
2693 if (chosen_section)
2694 {
2695 /* Only set the section name if specified by a pragma, because
2696 otherwise it will force those variables to get allocated storage
2697 in this module, rather than by the linker. */
2698 DECL_SECTION_NAME (decl) = chosen_section;
2699 }
2700 }
2701}
b4378319 2702
b4378319
NC		 2703/* Construct a DISPOSE instruction that is the equivalent of
2704 the given RTX. We have already verified that this should
2705 be possible. */
2706
2707char *
59f3507d 2708construct_dispose_instruction (rtx op)
b4378319
NC		 2709{
2710 int count = XVECLEN (op, 0);
2711 int stack_bytes;
2712 unsigned long int mask;
2713 int i;
2714 static char buff[ 100 ]; /* XXX */
2715 int use_callt = 0;
2716
2717 if (count <= 2)
2718 {
ab532386 2719 error ("bogus DISPOSE construction: %d", count);
b4378319
NC		 2720 return NULL;
2721 }
2722
2723 /* Work out how many bytes to pop off the
2724 stack before retrieving registers. */
f2f84cba
NS		 2725 gcc_assert (GET_CODE (XVECEXP (op, 0, 1)) == SET);
2726 gcc_assert (GET_CODE (SET_SRC (XVECEXP (op, 0, 1))) == PLUS);
2727 gcc_assert (GET_CODE (XEXP (SET_SRC (XVECEXP (op, 0, 1)), 1)) == CONST_INT);
b4378319
NC		 2728
2729 stack_bytes = INTVAL (XEXP (SET_SRC (XVECEXP (op, 0, 1)), 1));
2730
d4de0221 2731 /* Each pop will remove 4 bytes from the stack.... */
b4378319
NC		 2732 stack_bytes -= (count - 2) * 4;
2733
2734 /* Make sure that the amount we are popping
2735 will fit into the DISPOSE instruction. */
2736 if (stack_bytes > 128)
2737 {
ab532386 2738 error ("too much stack space to dispose of: %d", stack_bytes);
b4378319
NC		 2739 return NULL;
2740 }
2741
2742 /* Now compute the bit mask of registers to push. */
2743 mask = 0;
2744
2745 for (i = 2; i < count; i++)
2746 {
2747 rtx vector_element = XVECEXP (op, 0, i);
2748
f2f84cba
NS		 2749 gcc_assert (GET_CODE (vector_element) == SET);
2750 gcc_assert (GET_CODE (SET_DEST (vector_element)) == REG);
2751 gcc_assert (register_is_ok_for_epilogue (SET_DEST (vector_element),
2752 SImode));
b4378319
NC		 2753
2754 if (REGNO (SET_DEST (vector_element)) == 2)
2755 use_callt = 1;
2756 else
2757 mask |= 1 << REGNO (SET_DEST (vector_element));
2758 }
2759
2760 if (! TARGET_DISABLE_CALLT
223a9d64 2761 && (use_callt || stack_bytes == 0))
b4378319
NC		 2762 {
2763 if (use_callt)
2764 {
2765 sprintf (buff, "callt ctoff(__callt_return_r2_r%d)", (mask & (1 << 31)) ? 31 : 29);
2766 return buff;
2767 }
2768 else
2769 {
2770 for (i = 20; i < 32; i++)
2771 if (mask & (1 << i))
2772 break;
2773
2774 if (i == 31)
2775 sprintf (buff, "callt ctoff(__callt_return_r31c)");
2776 else
223a9d64
N		 2777 sprintf (buff, "callt ctoff(__callt_return_r%d_r%s)",
2778 i, (mask & (1 << 31)) ? "31c" : "29");
b4378319
NC		 2779 }
2780 }
2781 else
2782 {
2783 static char regs [100]; /* XXX */
2784 int done_one;
2785
2786 /* Generate the DISPOSE instruction. Note we could just issue the
2787 bit mask as a number as the assembler can cope with this, but for
2788 the sake of our readers we turn it into a textual description. */
2789 regs[0] = 0;
2790 done_one = 0;
2791
2792 for (i = 20; i < 32; i++)
2793 {
2794 if (mask & (1 << i))
2795 {
2796 int first;
2797
2798 if (done_one)
2799 strcat (regs, ", ");
2800 else
2801 done_one = 1;
2802
2803 first = i;
2804 strcat (regs, reg_names[ first ]);
2805
2806 for (i++; i < 32; i++)
2807 if ((mask & (1 << i)) == 0)
2808 break;
2809
2810 if (i > first + 1)
2811 {
2812 strcat (regs, " - ");
2813 strcat (regs, reg_names[ i - 1 ] );
2814 }
2815 }
2816 }
2817
2818 sprintf (buff, "dispose %d {%s}, r31", stack_bytes / 4, regs);
2819 }
2820
2821 return buff;
2822}
2823
b4378319
NC		 2824/* Construct a PREPARE instruction that is the equivalent of
2825 the given RTL. We have already verified that this should
2826 be possible. */
2827
2828char *
59f3507d 2829construct_prepare_instruction (rtx op)
b4378319 2830{
223a9d64 2831 int count;
b4378319
NC		 2832 int stack_bytes;
2833 unsigned long int mask;
2834 int i;
2835 static char buff[ 100 ]; /* XXX */
2836 int use_callt = 0;
2837
223a9d64 2838 if (XVECLEN (op, 0) <= 1)
b4378319 2839 {
223a9d64 2840 error ("bogus PREPEARE construction: %d", XVECLEN (op, 0));
b4378319
NC		 2841 return NULL;
2842 }
2843
2844 /* Work out how many bytes to push onto
2845 the stack after storing the registers. */
f2f84cba
NS		 2846 gcc_assert (GET_CODE (XVECEXP (op, 0, 0)) == SET);
2847 gcc_assert (GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) == PLUS);
2848 gcc_assert (GET_CODE (XEXP (SET_SRC (XVECEXP (op, 0, 0)), 1)) == CONST_INT);
b4378319
NC		 2849
2850 stack_bytes = INTVAL (XEXP (SET_SRC (XVECEXP (op, 0, 0)), 1));
2851
b4378319
NC		 2852
2853 /* Make sure that the amount we are popping
2854 will fit into the DISPOSE instruction. */
2855 if (stack_bytes < -128)
2856 {
ab532386 2857 error ("too much stack space to prepare: %d", stack_bytes);
b4378319
NC		 2858 return NULL;
2859 }
2860
2861 /* Now compute the bit mask of registers to push. */
223a9d64 2862 count = 0;
b4378319 2863 mask = 0;
223a9d64 2864 for (i = 1; i < XVECLEN (op, 0); i++)
b4378319
NC		 2865 {
2866 rtx vector_element = XVECEXP (op, 0, i);
2867
223a9d64
N		 2868 if (GET_CODE (vector_element) == CLOBBER)
2869 continue;
2870
f2f84cba
NS		 2871 gcc_assert (GET_CODE (vector_element) == SET);
2872 gcc_assert (GET_CODE (SET_SRC (vector_element)) == REG);
2873 gcc_assert (register_is_ok_for_epilogue (SET_SRC (vector_element),
2874 SImode));
b4378319
NC		 2875
2876 if (REGNO (SET_SRC (vector_element)) == 2)
2877 use_callt = 1;
2878 else
2879 mask |= 1 << REGNO (SET_SRC (vector_element));
223a9d64 2880 count++;
b4378319
NC		 2881 }
2882
223a9d64
N		 2883 stack_bytes += count * 4;
2884
b4378319 2885 if ((! TARGET_DISABLE_CALLT)
223a9d64 2886 && (use_callt || stack_bytes == 0))
b4378319
NC		 2887 {
2888 if (use_callt)
2889 {
2890 sprintf (buff, "callt ctoff(__callt_save_r2_r%d)", (mask & (1 << 31)) ? 31 : 29 );
2891 return buff;
2892 }
2893
2894 for (i = 20; i < 32; i++)
2895 if (mask & (1 << i))
2896 break;
2897
2898 if (i == 31)
2899 sprintf (buff, "callt ctoff(__callt_save_r31c)");
2900 else
223a9d64
N		 2901 sprintf (buff, "callt ctoff(__callt_save_r%d_r%s)",
2902 i, (mask & (1 << 31)) ? "31c" : "29");
b4378319
NC		 2903 }
2904 else
2905 {
2906 static char regs [100]; /* XXX */
2907 int done_one;
2908
2909
2910 /* Generate the PREPARE instruction. Note we could just issue the
2911 bit mask as a number as the assembler can cope with this, but for
2912 the sake of our readers we turn it into a textual description. */
2913 regs[0] = 0;
2914 done_one = 0;
2915
2916 for (i = 20; i < 32; i++)
2917 {
2918 if (mask & (1 << i))
2919 {
2920 int first;
2921
2922 if (done_one)
2923 strcat (regs, ", ");
2924 else
2925 done_one = 1;
2926
2927 first = i;
2928 strcat (regs, reg_names[ first ]);
2929
2930 for (i++; i < 32; i++)
2931 if ((mask & (1 << i)) == 0)
2932 break;
2933
2934 if (i > first + 1)
2935 {
2936 strcat (regs, " - ");
2937 strcat (regs, reg_names[ i - 1 ] );
2938 }
2939 }
2940 }
2941
2942 sprintf (buff, "prepare {%s}, %d", regs, (- stack_bytes) / 4);
2943 }
2944
2945 return buff;
2946}
223a9d64 2947
a64761a3
DD		 2948/* Return an RTX indicating where the return address to the
2949 calling function can be found. */
2950
2951rtx
59f3507d 2952v850_return_addr (int count)
a64761a3
DD		 2953{
2954 if (count != 0)
2955 return const0_rtx;
2956
9e2f7ec7 2957 return get_hard_reg_initial_val (Pmode, LINK_POINTER_REGNUM);
a64761a3 2958}
ae46c4e0 2959\f
d6b5193b
RS		 2960/* Implement TARGET_ASM_INIT_SECTIONS. */
2961
ae46c4e0 2962static void
d6b5193b
RS		 2963v850_asm_init_sections (void)
2964{
2965 rosdata_section
2966 = get_unnamed_section (0, output_section_asm_op,
2967 "\t.section .rosdata,\"a\"");
2968
2969 rozdata_section
2970 = get_unnamed_section (0, output_section_asm_op,
2971 "\t.section .rozdata,\"a\"");
2972
2973 tdata_section
2974 = get_unnamed_section (SECTION_WRITE, output_section_asm_op,
2975 "\t.section .tdata,\"aw\"");
2976
2977 zdata_section
2978 = get_unnamed_section (SECTION_WRITE, output_section_asm_op,
2979 "\t.section .zdata,\"aw\"");
2980
2981 zbss_section
2982 = get_unnamed_section (SECTION_WRITE | SECTION_BSS,
2983 output_section_asm_op,
2984 "\t.section .zbss,\"aw\"");
2985}
2986
2987static section *
59f3507d
NN		 2988v850_select_section (tree exp,
2989 int reloc ATTRIBUTE_UNUSED,
2990 unsigned HOST_WIDE_INT align ATTRIBUTE_UNUSED)
ae46c4e0
RH		 2991{
2992 if (TREE_CODE (exp) == VAR_DECL)
2993 {
2994 int is_const;
2995 if (!TREE_READONLY (exp)
2996 || TREE_SIDE_EFFECTS (exp)
2997 || !DECL_INITIAL (exp)
2998 || (DECL_INITIAL (exp) != error_mark_node
2999 && !TREE_CONSTANT (DECL_INITIAL (exp))))
3000 is_const = FALSE;
3001 else
3002 is_const = TRUE;
3003
3004 switch (v850_get_data_area (exp))
3005 {
3006 case DATA_AREA_ZDA:
d6b5193b 3007 return is_const ? rozdata_section : zdata_section;
ae46c4e0
RH		 3008
3009 case DATA_AREA_TDA:
d6b5193b 3010 return tdata_section;
ae46c4e0
RH		 3011
3012 case DATA_AREA_SDA:
d6b5193b 3013 return is_const ? rosdata_section : sdata_section;
ae46c4e0
RH		 3014
3015 default:
d6b5193b 3016 return is_const ? readonly_data_section : data_section;
ae46c4e0
RH		 3017 }
3018 }
d6b5193b 3019 return readonly_data_section;
ae46c4e0 3020}
fb7bc7fb 3021\f
122603fa
N		 3022/* Worker function for TARGET_FUNCTION_VALUE_REGNO_P. */
3023
3024static bool
3025v850_function_value_regno_p (const unsigned int regno)
3026{
3027 return (regno == 10);
3028}
3029
fb7bc7fb
KH		 3030/* Worker function for TARGET_RETURN_IN_MEMORY. */
3031
3032static bool
586de218 3033v850_return_in_memory (const_tree type, const_tree fntype ATTRIBUTE_UNUSED)
fb7bc7fb
KH		 3034{
3035 /* Return values > 8 bytes in length in memory. */
3036 return int_size_in_bytes (type) > 8 || TYPE_MODE (type) == BLKmode;
3037}
14a878f3
AS		 3038
3039/* Worker function for TARGET_FUNCTION_VALUE. */
3040
122603fa 3041static rtx
14a878f3
AS		 3042v850_function_value (const_tree valtype,
3043 const_tree fn_decl_or_type ATTRIBUTE_UNUSED,
3044 bool outgoing ATTRIBUTE_UNUSED)
3045{
3046 return gen_rtx_REG (TYPE_MODE (valtype), 10);
3047}
3048
fb7bc7fb
KH		 3049\f
3050/* Worker function for TARGET_SETUP_INCOMING_VARARGS. */
3051
3052static void
3053v850_setup_incoming_varargs (CUMULATIVE_ARGS *ca,
3054 enum machine_mode mode ATTRIBUTE_UNUSED,
3055 tree type ATTRIBUTE_UNUSED,
3056 int *pretend_arg_size ATTRIBUTE_UNUSED,
3057 int second_time ATTRIBUTE_UNUSED)
3058{
3059 ca->anonymous_args = (!TARGET_GHS ? 1 : 0);
3060}
d6b5193b 3061
7b5cbb57
AS		 3062/* Worker function for TARGET_CAN_ELIMINATE. */
3063
e0c6c273 3064static bool
7b5cbb57
AS		 3065v850_can_eliminate (const int from ATTRIBUTE_UNUSED, const int to)
3066{
3067 return (to == STACK_POINTER_REGNUM ? ! frame_pointer_needed : true);
3068}
3069
5efd84c5
NF		 3070/* Worker function for TARGET_CONDITIONAL_REGISTER_USAGE.
3071
3072 If TARGET_APP_REGS is not defined then add r2 and r5 to
3073 the pool of fixed registers. See PR 14505. */
3074
3075static void
3076v850_conditional_register_usage (void)
3077{
3078 if (TARGET_APP_REGS)
3079 {
3080 fixed_regs[2] = 0; call_used_regs[2] = 0;
3081 fixed_regs[5] = 0; call_used_regs[5] = 1;
3082 }
3083}
e0c6c273
RH		 3084\f
3085/* Worker function for TARGET_ASM_TRAMPOLINE_TEMPLATE. */
3086
3087static void
3088v850_asm_trampoline_template (FILE *f)
3089{
3090 fprintf (f, "\tjarl .+4,r12\n");
3091 fprintf (f, "\tld.w 12[r12],r20\n");
3092 fprintf (f, "\tld.w 16[r12],r12\n");
3093 fprintf (f, "\tjmp [r12]\n");
3094 fprintf (f, "\tnop\n");
3095 fprintf (f, "\t.long 0\n");
3096 fprintf (f, "\t.long 0\n");
3097}
3098
3099/* Worker function for TARGET_TRAMPOLINE_INIT. */
3100
3101static void
3102v850_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value)
3103{
3104 rtx mem, fnaddr = XEXP (DECL_RTL (fndecl), 0);
3105
3106 emit_block_move (m_tramp, assemble_trampoline_template (),
3107 GEN_INT (TRAMPOLINE_SIZE), BLOCK_OP_NORMAL);
3108
3109 mem = adjust_address (m_tramp, SImode, 16);
3110 emit_move_insn (mem, chain_value);
3111 mem = adjust_address (m_tramp, SImode, 20);
3112 emit_move_insn (mem, fnaddr);
3113}
223a9d64
N		 3114
3115static int
3116v850_issue_rate (void)
3117{
3118 return (TARGET_V850E2_ALL? 2 : 1);
3119}
1a627b35
RS		 3120
3121/* Implement TARGET_LEGITIMATE_CONSTANT_P. */
3122
3123static bool
3124v850_legitimate_constant_p (enum machine_mode mode ATTRIBUTE_UNUSED, rtx x)
3125{
3126 return (GET_CODE (x) == CONST_DOUBLE
3127 || !(GET_CODE (x) == CONST
3128 && GET_CODE (XEXP (x, 0)) == PLUS
3129 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
3130 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT
3131 && !CONST_OK_FOR_K (INTVAL (XEXP (XEXP (x, 0), 1)))));
3132}
122603fa
N		 3133\f
3134/* V850 specific attributes. */
3135
3136static const struct attribute_spec v850_attribute_table[] =
3137{
62d784f7
KT		 3138 /* { name, min_len, max_len, decl_req, type_req, fn_type_req, handler,
3139 affects_type_identity } */
3140 { "interrupt_handler", 0, 0, true, false, false,
3141 v850_handle_interrupt_attribute, false },
3142 { "interrupt", 0, 0, true, false, false,
3143 v850_handle_interrupt_attribute, false },
3144 { "sda", 0, 0, true, false, false,
3145 v850_handle_data_area_attribute, false },
3146 { "tda", 0, 0, true, false, false,
3147 v850_handle_data_area_attribute, false },
3148 { "zda", 0, 0, true, false, false,
3149 v850_handle_data_area_attribute, false },
3150 { NULL, 0, 0, false, false, false, NULL, false }
122603fa
N		 3151};
3152\f
3153/* Initialize the GCC target structure. */
3154#undef TARGET_ASM_ALIGNED_HI_OP
3155#define TARGET_ASM_ALIGNED_HI_OP "\t.hword\t"
3156
3157#undef TARGET_PRINT_OPERAND
3158#define TARGET_PRINT_OPERAND v850_print_operand
3159#undef TARGET_PRINT_OPERAND_ADDRESS
3160#define TARGET_PRINT_OPERAND_ADDRESS v850_print_operand_address
3161#undef TARGET_PRINT_OPERAND_PUNCT_VALID_P
3162#define TARGET_PRINT_OPERAND_PUNCT_VALID_P v850_print_operand_punct_valid_p
3163
24da2019
AS		 3164#undef TARGET_ASM_OUTPUT_ADDR_CONST_EXTRA
3165#define TARGET_ASM_OUTPUT_ADDR_CONST_EXTRA v850_output_addr_const_extra
3166
122603fa
N		 3167#undef TARGET_ATTRIBUTE_TABLE
3168#define TARGET_ATTRIBUTE_TABLE v850_attribute_table
3169
3170#undef TARGET_INSERT_ATTRIBUTES
3171#define TARGET_INSERT_ATTRIBUTES v850_insert_attributes
3172
3173#undef TARGET_ASM_SELECT_SECTION
3174#define TARGET_ASM_SELECT_SECTION v850_select_section
3175
3176/* The assembler supports switchable .bss sections, but
3177 v850_select_section doesn't yet make use of them. */
3178#undef TARGET_HAVE_SWITCHABLE_BSS_SECTIONS
3179#define TARGET_HAVE_SWITCHABLE_BSS_SECTIONS false
3180
3181#undef TARGET_ENCODE_SECTION_INFO
3182#define TARGET_ENCODE_SECTION_INFO v850_encode_section_info
3183
3184#undef TARGET_ASM_FILE_START_FILE_DIRECTIVE
3185#define TARGET_ASM_FILE_START_FILE_DIRECTIVE true
3186
3187#undef TARGET_DEFAULT_TARGET_FLAGS
3188#define TARGET_DEFAULT_TARGET_FLAGS (MASK_DEFAULT | MASK_APP_REGS)
3189#undef TARGET_HANDLE_OPTION
3190#define TARGET_HANDLE_OPTION v850_handle_option
3191
3192#undef TARGET_RTX_COSTS
3193#define TARGET_RTX_COSTS v850_rtx_costs
3194
3195#undef TARGET_ADDRESS_COST
3196#define TARGET_ADDRESS_COST hook_int_rtx_bool_0
3197
3198#undef TARGET_MACHINE_DEPENDENT_REORG
3199#define TARGET_MACHINE_DEPENDENT_REORG v850_reorg
3200
3201#undef TARGET_SCHED_ISSUE_RATE
3202#define TARGET_SCHED_ISSUE_RATE v850_issue_rate
3203
3204#undef TARGET_FUNCTION_VALUE_REGNO_P
3205#define TARGET_FUNCTION_VALUE_REGNO_P v850_function_value_regno_p
3206#undef TARGET_FUNCTION_VALUE
3207#define TARGET_FUNCTION_VALUE v850_function_value
3208
3209#undef TARGET_PROMOTE_PROTOTYPES
3210#define TARGET_PROMOTE_PROTOTYPES hook_bool_const_tree_true
3211
3212#undef TARGET_RETURN_IN_MEMORY
3213#define TARGET_RETURN_IN_MEMORY v850_return_in_memory
3214
3215#undef TARGET_PASS_BY_REFERENCE
3216#define TARGET_PASS_BY_REFERENCE v850_pass_by_reference
3217
3218#undef TARGET_CALLEE_COPIES
3219#define TARGET_CALLEE_COPIES hook_bool_CUMULATIVE_ARGS_mode_tree_bool_true
3220
3221#undef TARGET_SETUP_INCOMING_VARARGS
3222#define TARGET_SETUP_INCOMING_VARARGS v850_setup_incoming_varargs
3223
3224#undef TARGET_ARG_PARTIAL_BYTES
3225#define TARGET_ARG_PARTIAL_BYTES v850_arg_partial_bytes
3226
3227#undef TARGET_FUNCTION_ARG
3228#define TARGET_FUNCTION_ARG v850_function_arg
3229
3230#undef TARGET_FUNCTION_ARG_ADVANCE
3231#define TARGET_FUNCTION_ARG_ADVANCE v850_function_arg_advance
3232
3233#undef TARGET_CAN_ELIMINATE
3234#define TARGET_CAN_ELIMINATE v850_can_eliminate
3235
5efd84c5
NF		 3236#undef TARGET_CONDITIONAL_REGISTER_USAGE
3237#define TARGET_CONDITIONAL_REGISTER_USAGE v850_conditional_register_usage
3238
122603fa
N		 3239#undef TARGET_ASM_TRAMPOLINE_TEMPLATE
3240#define TARGET_ASM_TRAMPOLINE_TEMPLATE v850_asm_trampoline_template
3241#undef TARGET_TRAMPOLINE_INIT
3242#define TARGET_TRAMPOLINE_INIT v850_trampoline_init
3243
3244#undef TARGET_STRICT_ARGUMENT_NAMING
3245#define TARGET_STRICT_ARGUMENT_NAMING v850_strict_argument_naming
3246
3020190e
JM		 3247#undef TARGET_OPTION_OPTIMIZATION_TABLE
3248#define TARGET_OPTION_OPTIMIZATION_TABLE v850_option_optimization_table
122603fa 3249
1a627b35
RS		 3250#undef TARGET_LEGITIMATE_CONSTANT_P
3251#define TARGET_LEGITIMATE_CONSTANT_P v850_legitimate_constant_p
3252
122603fa
N		 3253struct gcc_target targetm = TARGET_INITIALIZER;
3254
d6b5193b 3255#include "gt-v850.h"
Mirror of https://gcc.gnu.org/git/gcc.git