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Merge tree-ssa-20020619-branch into mainline.
[thirdparty/gcc.git] / gcc / config / v850 / v850.c
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747fe2d1 1/* Subroutines for insn-output.c for NEC V850 series
6aa67e60 2 Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004
3756cb89 3 Free Software Foundation, Inc.
747fe2d1 4 Contributed by Jeff Law (law@cygnus.com).
5
b5b835e5 6 This file is part of GCC.
747fe2d1 7
b5b835e5 8 GCC is free software; you can redistribute it and/or modify it
b2ceeb6c 9 under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
11 any later version.
747fe2d1 12
b5b835e5 13 GCC is distributed in the hope that it will be useful, but WITHOUT
b2ceeb6c 14 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 for more details.
747fe2d1 17
b2ceeb6c 18 You should have received a copy of the GNU General Public License
b5b835e5 19 along with GCC; see the file COPYING. If not, write to the Free
b2ceeb6c 20 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
21 02111-1307, USA. */
747fe2d1 22
be2828ce 23#include "config.h"
7014838c 24#include "system.h"
805e22b2 25#include "coretypes.h"
26#include "tm.h"
a821813a 27#include "tree.h"
747fe2d1 28#include "rtl.h"
29#include "regs.h"
30#include "hard-reg-set.h"
31#include "real.h"
32#include "insn-config.h"
33#include "conditions.h"
747fe2d1 34#include "output.h"
35#include "insn-attr.h"
36#include "flags.h"
37#include "recog.h"
38#include "expr.h"
4faf81b8 39#include "function.h"
a821813a 40#include "toplev.h"
e101acea 41#include "ggc.h"
feb9af9f 42#include "integrate.h"
1fcd08b1 43#include "tm_p.h"
a767736d 44#include "target.h"
45#include "target-def.h"
a821813a 46
47#ifndef streq
48#define streq(a,b) (strcmp (a, b) == 0)
49#endif
50
a821813a 51/* Function prototypes for stupid compilers: */
39031315 52static void const_double_split (rtx, HOST_WIDE_INT *, HOST_WIDE_INT *);
53static int const_costs_int (HOST_WIDE_INT, int);
54static int const_costs (rtx, enum rtx_code);
55static bool v850_rtx_costs (rtx, int, int, int *);
56static void substitute_ep_register (rtx, rtx, int, int, rtx *, rtx *);
57static void v850_reorg (void);
58static int ep_memory_offset (enum machine_mode, int);
59static void v850_set_data_area (tree, v850_data_area);
e3c541f0 60const struct attribute_spec v850_attribute_table[];
39031315 61static tree v850_handle_interrupt_attribute (tree *, tree, tree, int, bool *);
62static tree v850_handle_data_area_attribute (tree *, tree, tree, int, bool *);
63static void v850_insert_attributes (tree, tree *);
64static void v850_select_section (tree, int, unsigned HOST_WIDE_INT);
65static void v850_encode_data_area (tree, rtx);
66static void v850_encode_section_info (tree, rtx, int);
6aa67e60 67static bool v850_return_in_memory (tree, tree);
68static void v850_setup_incoming_varargs (CUMULATIVE_ARGS *, enum machine_mode,
69 tree, int *, int);
747fe2d1 70
747fe2d1 71/* Information about the various small memory areas. */
72struct small_memory_info small_memory[ (int)SMALL_MEMORY_max ] =
73{
74 /* name value max physical max */
75 { "tda", (char *)0, 0, 256 },
76 { "sda", (char *)0, 0, 65536 },
77 { "zda", (char *)0, 0, 32768 },
78};
79
e101acea 80/* Names of the various data areas used on the v850. */
81tree GHS_default_section_names [(int) COUNT_OF_GHS_SECTION_KINDS];
82tree GHS_current_section_names [(int) COUNT_OF_GHS_SECTION_KINDS];
83
84/* Track the current data area set by the data area pragma (which
85 can be nested). Tested by check_default_data_area. */
86data_area_stack_element * data_area_stack = NULL;
87
747fe2d1 88/* True if we don't need to check any more if the current
e101acea 89 function is an interrupt handler. */
747fe2d1 90static int v850_interrupt_cache_p = FALSE;
91
92/* Whether current function is an interrupt handler. */
93static int v850_interrupt_p = FALSE;
a767736d 94\f
95/* Initialize the GCC target structure. */
58356836 96#undef TARGET_ASM_ALIGNED_HI_OP
97#define TARGET_ASM_ALIGNED_HI_OP "\t.hword\t"
98
e3c541f0 99#undef TARGET_ATTRIBUTE_TABLE
100#define TARGET_ATTRIBUTE_TABLE v850_attribute_table
747fe2d1 101
8ee295a7 102#undef TARGET_INSERT_ATTRIBUTES
103#define TARGET_INSERT_ATTRIBUTES v850_insert_attributes
104
52470889 105#undef TARGET_ASM_SELECT_SECTION
106#define TARGET_ASM_SELECT_SECTION v850_select_section
107
7811991d 108#undef TARGET_ENCODE_SECTION_INFO
109#define TARGET_ENCODE_SECTION_INFO v850_encode_section_info
110
92c473b8 111#undef TARGET_ASM_FILE_START_FILE_DIRECTIVE
112#define TARGET_ASM_FILE_START_FILE_DIRECTIVE true
113
fab7adbf 114#undef TARGET_RTX_COSTS
115#define TARGET_RTX_COSTS v850_rtx_costs
ec0457a8 116#undef TARGET_ADDRESS_COST
117#define TARGET_ADDRESS_COST hook_int_rtx_0
fab7adbf 118
2efea8c0 119#undef TARGET_MACHINE_DEPENDENT_REORG
120#define TARGET_MACHINE_DEPENDENT_REORG v850_reorg
121
6aa67e60 122#undef TARGET_PROMOTE_PROTOTYPES
123#define TARGET_PROMOTE_PROTOTYPES hook_bool_tree_true
124
6aa67e60 125#undef TARGET_RETURN_IN_MEMORY
126#define TARGET_RETURN_IN_MEMORY v850_return_in_memory
127
128#undef TARGET_SETUP_INCOMING_VARARGS
129#define TARGET_SETUP_INCOMING_VARARGS v850_setup_incoming_varargs
130
57e4bbfb 131struct gcc_target targetm = TARGET_INITIALIZER;
747fe2d1 132\f
133/* Sometimes certain combinations of command options do not make
134 sense on a particular target machine. You can define a macro
135 `OVERRIDE_OPTIONS' to take account of this. This macro, if
136 defined, is executed once just after all the command options have
137 been parsed.
138
139 Don't use this macro to turn on various extra optimizations for
140 `-O'. That is what `OPTIMIZATION_OPTIONS' is for. */
141
142void
39031315 143override_options (void)
747fe2d1 144{
145 int i;
39031315 146 extern int atoi (const char *);
747fe2d1 147
148 /* Parse -m{s,t,z}da=nnn switches */
149 for (i = 0; i < (int)SMALL_MEMORY_max; i++)
150 {
151 if (small_memory[i].value)
152 {
fa8da10b 153 if (!ISDIGIT (*small_memory[i].value))
68435912 154 error ("%s=%s is not numeric",
747fe2d1 155 small_memory[i].name,
156 small_memory[i].value);
157 else
158 {
159 small_memory[i].max = atoi (small_memory[i].value);
160 if (small_memory[i].max > small_memory[i].physical_max)
68435912 161 error ("%s=%s is too large",
747fe2d1 162 small_memory[i].name,
163 small_memory[i].value);
164 }
165 }
166 }
5dd3389c 167
457275b6 168 /* Make sure that the US_BIT_SET mask has been correctly initialized. */
5dd3389c 169 if ((target_flags & MASK_US_MASK_SET) == 0)
170 {
171 target_flags |= MASK_US_MASK_SET;
172 target_flags &= ~MASK_US_BIT_SET;
173 }
747fe2d1 174}
175
747fe2d1 176\f
177
178/* Return an RTX to represent where a value with mode MODE will be returned
179 from a function. If the result is 0, the argument is pushed. */
180
181rtx
39031315 182function_arg (CUMULATIVE_ARGS * cum,
183 enum machine_mode mode,
184 tree type,
185 int named)
747fe2d1 186{
187 rtx result = 0;
188 int size, align;
189
190 if (TARGET_GHS && !named)
191 return NULL_RTX;
192
193 if (mode == BLKmode)
194 size = int_size_in_bytes (type);
195 else
196 size = GET_MODE_SIZE (mode);
197
5dd3389c 198 if (size < 1)
199 return 0;
200
747fe2d1 201 if (type)
202 align = TYPE_ALIGN (type) / BITS_PER_UNIT;
203 else
204 align = size;
205
206 cum->nbytes = (cum->nbytes + align - 1) &~(align - 1);
207
208 if (cum->nbytes > 4 * UNITS_PER_WORD)
209 return 0;
210
211 if (type == NULL_TREE
212 && cum->nbytes + size > 4 * UNITS_PER_WORD)
213 return 0;
214
215 switch (cum->nbytes / UNITS_PER_WORD)
216 {
217 case 0:
7014838c 218 result = gen_rtx_REG (mode, 6);
747fe2d1 219 break;
220 case 1:
7014838c 221 result = gen_rtx_REG (mode, 7);
747fe2d1 222 break;
223 case 2:
7014838c 224 result = gen_rtx_REG (mode, 8);
747fe2d1 225 break;
226 case 3:
7014838c 227 result = gen_rtx_REG (mode, 9);
747fe2d1 228 break;
229 default:
230 result = 0;
231 }
232
233 return result;
234}
235
236\f
237/* Return the number of words which must be put into registers
238 for values which are part in registers and part in memory. */
239
240int
39031315 241function_arg_partial_nregs (CUMULATIVE_ARGS * cum,
242 enum machine_mode mode,
243 tree type,
244 int named)
747fe2d1 245{
246 int size, align;
247
248 if (TARGET_GHS && !named)
249 return 0;
250
251 if (mode == BLKmode)
252 size = int_size_in_bytes (type);
253 else
254 size = GET_MODE_SIZE (mode);
255
256 if (type)
257 align = TYPE_ALIGN (type) / BITS_PER_UNIT;
258 else
259 align = size;
260
261 cum->nbytes = (cum->nbytes + align - 1) &~(align - 1);
262
263 if (cum->nbytes > 4 * UNITS_PER_WORD)
264 return 0;
265
266 if (cum->nbytes + size <= 4 * UNITS_PER_WORD)
267 return 0;
268
269 if (type == NULL_TREE
270 && cum->nbytes + size > 4 * UNITS_PER_WORD)
271 return 0;
272
273 return (4 * UNITS_PER_WORD - cum->nbytes) / UNITS_PER_WORD;
274}
275
276\f
277/* Return the high and low words of a CONST_DOUBLE */
278
279static void
39031315 280const_double_split (rtx x, HOST_WIDE_INT * p_high, HOST_WIDE_INT * p_low)
747fe2d1 281{
282 if (GET_CODE (x) == CONST_DOUBLE)
283 {
284 long t[2];
285 REAL_VALUE_TYPE rv;
286
287 switch (GET_MODE (x))
288 {
289 case DFmode:
290 REAL_VALUE_FROM_CONST_DOUBLE (rv, x);
291 REAL_VALUE_TO_TARGET_DOUBLE (rv, t);
292 *p_high = t[1]; /* since v850 is little endian */
293 *p_low = t[0]; /* high is second word */
294 return;
295
296 case SFmode:
297 REAL_VALUE_FROM_CONST_DOUBLE (rv, x);
298 REAL_VALUE_TO_TARGET_SINGLE (rv, *p_high);
299 *p_low = 0;
300 return;
301
302 case VOIDmode:
303 case DImode:
304 *p_high = CONST_DOUBLE_HIGH (x);
305 *p_low = CONST_DOUBLE_LOW (x);
306 return;
a821813a 307
308 default:
309 break;
747fe2d1 310 }
311 }
312
313 fatal_insn ("const_double_split got a bad insn:", x);
314}
315
316\f
317/* Return the cost of the rtx R with code CODE. */
318
319static int
39031315 320const_costs_int (HOST_WIDE_INT value, int zero_cost)
747fe2d1 321{
322 if (CONST_OK_FOR_I (value))
323 return zero_cost;
324 else if (CONST_OK_FOR_J (value))
325 return 1;
326 else if (CONST_OK_FOR_K (value))
327 return 2;
328 else
329 return 4;
330}
331
fab7adbf 332static int
39031315 333const_costs (rtx r, enum rtx_code c)
747fe2d1 334{
335 HOST_WIDE_INT high, low;
336
337 switch (c)
338 {
339 case CONST_INT:
340 return const_costs_int (INTVAL (r), 0);
341
342 case CONST_DOUBLE:
343 const_double_split (r, &high, &low);
344 if (GET_MODE (r) == SFmode)
345 return const_costs_int (high, 1);
346 else
347 return const_costs_int (high, 1) + const_costs_int (low, 1);
348
349 case SYMBOL_REF:
350 case LABEL_REF:
351 case CONST:
352 return 2;
353
354 case HIGH:
355 return 1;
356
357 default:
358 return 4;
359 }
360}
361
fab7adbf 362static bool
39031315 363v850_rtx_costs (rtx x,
364 int code,
365 int outer_code ATTRIBUTE_UNUSED,
366 int * total)
fab7adbf 367{
368 switch (code)
369 {
370 case CONST_INT:
371 case CONST_DOUBLE:
372 case CONST:
373 case SYMBOL_REF:
374 case LABEL_REF:
375 *total = COSTS_N_INSNS (const_costs (x, code));
376 return true;
377
378 case MOD:
379 case DIV:
380 case UMOD:
381 case UDIV:
382 if (TARGET_V850E && optimize_size)
383 *total = 6;
384 else
385 *total = 60;
386 return true;
387
388 case MULT:
389 if (TARGET_V850E
390 && ( GET_MODE (x) == SImode
391 || GET_MODE (x) == HImode
392 || GET_MODE (x) == QImode))
393 {
394 if (GET_CODE (XEXP (x, 1)) == REG)
395 *total = 4;
396 else if (GET_CODE (XEXP (x, 1)) == CONST_INT)
397 {
398 if (CONST_OK_FOR_O (INTVAL (XEXP (x, 1))))
399 *total = 6;
400 else if (CONST_OK_FOR_K (INTVAL (XEXP (x, 1))))
401 *total = 10;
402 }
403 }
404 else
405 *total = 20;
406 return true;
407
408 default:
409 return false;
410 }
411}
747fe2d1 412\f
413/* Print operand X using operand code CODE to assembly language output file
414 FILE. */
415
416void
39031315 417print_operand (FILE * file, rtx x, int code)
747fe2d1 418{
419 HOST_WIDE_INT high, low;
420
421 switch (code)
422 {
57e629ba 423 case 'c':
424 /* We use 'c' operands with symbols for .vtinherit */
425 if (GET_CODE (x) == SYMBOL_REF)
426 {
427 output_addr_const(file, x);
428 break;
429 }
430 /* fall through */
747fe2d1 431 case 'b':
432 case 'B':
d0ab67df 433 case 'C':
434 switch ((code == 'B' || code == 'C')
435 ? reverse_condition (GET_CODE (x)) : GET_CODE (x))
747fe2d1 436 {
437 case NE:
d0ab67df 438 if (code == 'c' || code == 'C')
439 fprintf (file, "nz");
440 else
441 fprintf (file, "ne");
747fe2d1 442 break;
443 case EQ:
d0ab67df 444 if (code == 'c' || code == 'C')
445 fprintf (file, "z");
446 else
447 fprintf (file, "e");
747fe2d1 448 break;
449 case GE:
d0ab67df 450 fprintf (file, "ge");
747fe2d1 451 break;
452 case GT:
d0ab67df 453 fprintf (file, "gt");
747fe2d1 454 break;
455 case LE:
d0ab67df 456 fprintf (file, "le");
747fe2d1 457 break;
458 case LT:
d0ab67df 459 fprintf (file, "lt");
747fe2d1 460 break;
461 case GEU:
d0ab67df 462 fprintf (file, "nl");
747fe2d1 463 break;
464 case GTU:
d0ab67df 465 fprintf (file, "h");
747fe2d1 466 break;
467 case LEU:
d0ab67df 468 fprintf (file, "nh");
747fe2d1 469 break;
470 case LTU:
d0ab67df 471 fprintf (file, "l");
747fe2d1 472 break;
473 default:
474 abort ();
475 }
476 break;
477 case 'F': /* high word of CONST_DOUBLE */
478 if (GET_CODE (x) == CONST_INT)
479 fprintf (file, "%d", (INTVAL (x) >= 0) ? 0 : -1);
480 else if (GET_CODE (x) == CONST_DOUBLE)
481 {
482 const_double_split (x, &high, &low);
483 fprintf (file, "%ld", (long) high);
484 }
485 else
486 abort ();
487 break;
488 case 'G': /* low word of CONST_DOUBLE */
489 if (GET_CODE (x) == CONST_INT)
490 fprintf (file, "%ld", (long) INTVAL (x));
491 else if (GET_CODE (x) == CONST_DOUBLE)
492 {
493 const_double_split (x, &high, &low);
494 fprintf (file, "%ld", (long) low);
495 }
496 else
497 abort ();
498 break;
499 case 'L':
8c178e2a 500 fprintf (file, "%d\n", (int)(INTVAL (x) & 0xffff));
747fe2d1 501 break;
502 case 'M':
503 fprintf (file, "%d", exact_log2 (INTVAL (x)));
504 break;
505 case 'O':
506 if (special_symbolref_operand (x, VOIDmode))
507 {
747fe2d1 508 if (GET_CODE (x) == SYMBOL_REF)
91efe10c 509 ;
747fe2d1 510 else if (GET_CODE (x) == CONST)
91efe10c 511 x = XEXP (XEXP (x, 0), 0);
747fe2d1 512 else
513 abort ();
514
91efe10c 515 if (SYMBOL_REF_ZDA_P (x))
747fe2d1 516 fprintf (file, "zdaoff");
91efe10c 517 else if (SYMBOL_REF_SDA_P (x))
747fe2d1 518 fprintf (file, "sdaoff");
91efe10c 519 else if (SYMBOL_REF_TDA_P (x))
747fe2d1 520 fprintf (file, "tdaoff");
521 else
a59e9a3a 522 abort ();
747fe2d1 523 }
524 else
a59e9a3a 525 abort ();
747fe2d1 526 break;
527 case 'P':
528 if (special_symbolref_operand (x, VOIDmode))
529 output_addr_const (file, x);
530 else
a59e9a3a 531 abort ();
747fe2d1 532 break;
533 case 'Q':
534 if (special_symbolref_operand (x, VOIDmode))
535 {
747fe2d1 536 if (GET_CODE (x) == SYMBOL_REF)
91efe10c 537 ;
747fe2d1 538 else if (GET_CODE (x) == CONST)
91efe10c 539 x = XEXP (XEXP (x, 0), 0);
747fe2d1 540 else
541 abort ();
542
91efe10c 543 if (SYMBOL_REF_ZDA_P (x))
747fe2d1 544 fprintf (file, "r0");
91efe10c 545 else if (SYMBOL_REF_SDA_P (x))
747fe2d1 546 fprintf (file, "gp");
91efe10c 547 else if (SYMBOL_REF_TDA_P (x))
747fe2d1 548 fprintf (file, "ep");
549 else
a59e9a3a 550 abort ();
747fe2d1 551 }
552 else
a59e9a3a 553 abort ();
747fe2d1 554 break;
555 case 'R': /* 2nd word of a double. */
556 switch (GET_CODE (x))
557 {
a821813a 558 case REG:
559 fprintf (file, reg_names[REGNO (x) + 1]);
560 break;
561 case MEM:
eafc6604 562 x = XEXP (adjust_address (x, SImode, 4), 0);
2b33b157 563 print_operand_address (file, x);
564 if (GET_CODE (x) == CONST_INT)
565 fprintf (file, "[r0]");
a821813a 566 break;
567
568 default:
569 break;
747fe2d1 570 }
571 break;
572 case 'S':
573 {
ad87de1e 574 /* if it's a reference to a TDA variable, use sst/sld vs. st/ld */
65c7acad 575 if (GET_CODE (x) == MEM && ep_memory_operand (x, GET_MODE (x), FALSE))
576 fputs ("s", file);
577
578 break;
579 }
580 case 'T':
581 {
582 /* Like an 'S' operand above, but for unsigned loads only. */
583 if (GET_CODE (x) == MEM && ep_memory_operand (x, GET_MODE (x), TRUE))
747fe2d1 584 fputs ("s", file);
585
586 break;
587 }
588 case 'W': /* print the instruction suffix */
589 switch (GET_MODE (x))
590 {
591 default:
592 abort ();
593
594 case QImode: fputs (".b", file); break;
595 case HImode: fputs (".h", file); break;
596 case SImode: fputs (".w", file); break;
597 case SFmode: fputs (".w", file); break;
598 }
599 break;
600 case '.': /* register r0 */
601 fputs (reg_names[0], file);
602 break;
d0ab67df 603 case 'z': /* reg or zero */
604 if (x == const0_rtx)
605 fputs (reg_names[0], file);
606 else if (GET_CODE (x) == REG)
607 fputs (reg_names[REGNO (x)], file);
608 else
609 abort ();
610 break;
747fe2d1 611 default:
612 switch (GET_CODE (x))
613 {
614 case MEM:
615 if (GET_CODE (XEXP (x, 0)) == CONST_INT)
1a83b3ff 616 output_address (gen_rtx_PLUS (SImode, gen_rtx_REG (SImode, 0),
7014838c 617 XEXP (x, 0)));
747fe2d1 618 else
619 output_address (XEXP (x, 0));
620 break;
621
622 case REG:
623 fputs (reg_names[REGNO (x)], file);
624 break;
625 case SUBREG:
701e46d0 626 fputs (reg_names[subreg_regno (x)], file);
747fe2d1 627 break;
628 case CONST_INT:
629 case SYMBOL_REF:
630 case CONST:
631 case LABEL_REF:
632 case CODE_LABEL:
633 print_operand_address (file, x);
634 break;
635 default:
636 abort ();
637 }
638 break;
639
640 }
641}
642
643\f
644/* Output assembly language output for the address ADDR to FILE. */
645
646void
39031315 647print_operand_address (FILE * file, rtx addr)
747fe2d1 648{
649 switch (GET_CODE (addr))
650 {
651 case REG:
652 fprintf (file, "0[");
653 print_operand (file, addr, 0);
654 fprintf (file, "]");
655 break;
656 case LO_SUM:
657 if (GET_CODE (XEXP (addr, 0)) == REG)
658 {
659 /* reg,foo */
660 fprintf (file, "lo(");
661 print_operand (file, XEXP (addr, 1), 0);
662 fprintf (file, ")[");
663 print_operand (file, XEXP (addr, 0), 0);
664 fprintf (file, "]");
665 }
666 break;
667 case PLUS:
668 if (GET_CODE (XEXP (addr, 0)) == REG
669 || GET_CODE (XEXP (addr, 0)) == SUBREG)
670 {
671 /* reg,foo */
672 print_operand (file, XEXP (addr, 1), 0);
673 fprintf (file, "[");
674 print_operand (file, XEXP (addr, 0), 0);
675 fprintf (file, "]");
676 }
677 else
678 {
679 print_operand (file, XEXP (addr, 0), 0);
680 fprintf (file, "+");
681 print_operand (file, XEXP (addr, 1), 0);
682 }
683 break;
684 case SYMBOL_REF:
91efe10c 685 {
686 const char *off_name = NULL;
687 const char *reg_name = NULL;
688
689 if (SYMBOL_REF_ZDA_P (addr))
690 {
691 off_name = "zdaoff";
692 reg_name = "r0";
693 }
694 else if (SYMBOL_REF_SDA_P (addr))
695 {
696 off_name = "sdaoff";
697 reg_name = "gp";
698 }
699 else if (SYMBOL_REF_TDA_P (addr))
700 {
701 off_name = "tdaoff";
702 reg_name = "ep";
703 }
704
705 if (off_name)
747fe2d1 706 fprintf (file, "%s(", off_name);
747fe2d1 707 output_addr_const (file, addr);
91efe10c 708 if (reg_name)
709 fprintf (file, ")[%s]", reg_name);
710 }
747fe2d1 711 break;
712 case CONST:
713 if (special_symbolref_operand (addr, VOIDmode))
714 {
91efe10c 715 rtx x = XEXP (XEXP (addr, 0), 0);
9a356c3c 716 const char *off_name;
717 const char *reg_name;
747fe2d1 718
91efe10c 719 if (SYMBOL_REF_ZDA_P (x))
747fe2d1 720 {
721 off_name = "zdaoff";
722 reg_name = "r0";
723 }
91efe10c 724 else if (SYMBOL_REF_SDA_P (x))
747fe2d1 725 {
726 off_name = "sdaoff";
727 reg_name = "gp";
728 }
91efe10c 729 else if (SYMBOL_REF_TDA_P (x))
747fe2d1 730 {
731 off_name = "tdaoff";
732 reg_name = "ep";
733 }
734 else
a59e9a3a 735 abort ();
747fe2d1 736
737 fprintf (file, "%s(", off_name);
738 output_addr_const (file, addr);
739 fprintf (file, ")[%s]", reg_name);
740 }
741 else
742 output_addr_const (file, addr);
743 break;
744 default:
745 output_addr_const (file, addr);
746 break;
747 }
748}
749
5dd3389c 750/* When assemble_integer is used to emit the offsets for a switch
751 table it can encounter (TRUNCATE:HI (MINUS:SI (LABEL_REF:SI) (LABEL_REF:SI))).
752 output_addr_const will normally barf at this, but it is OK to omit
753 the truncate and just emit the difference of the two labels. The
754 .hword directive will automatically handle the truncation for us.
755
756 Returns 1 if rtx was handled, 0 otherwise. */
757
758int
39031315 759v850_output_addr_const_extra (FILE * file, rtx x)
5dd3389c 760{
761 if (GET_CODE (x) != TRUNCATE)
762 return 0;
763
764 x = XEXP (x, 0);
765
766 /* We must also handle the case where the switch table was passed a
767 constant value and so has been collapsed. In this case the first
768 label will have been deleted. In such a case it is OK to emit
769 nothing, since the table will not be used.
770 (cf gcc.c-torture/compile/990801-1.c). */
771 if (GET_CODE (x) == MINUS
772 && GET_CODE (XEXP (x, 0)) == LABEL_REF
773 && GET_CODE (XEXP (XEXP (x, 0), 0)) == CODE_LABEL
774 && INSN_DELETED_P (XEXP (XEXP (x, 0), 0)))
775 return 1;
776
777 output_addr_const (file, x);
778 return 1;
779}
747fe2d1 780\f
781/* Return appropriate code to load up a 1, 2, or 4 integer/floating
782 point value. */
783
1fcd08b1 784const char *
39031315 785output_move_single (rtx * operands)
747fe2d1 786{
787 rtx dst = operands[0];
788 rtx src = operands[1];
789
790 if (REG_P (dst))
791 {
792 if (REG_P (src))
793 return "mov %1,%0";
794
795 else if (GET_CODE (src) == CONST_INT)
796 {
797 HOST_WIDE_INT value = INTVAL (src);
798
5dd3389c 799 if (CONST_OK_FOR_J (value)) /* Signed 5 bit immediate. */
747fe2d1 800 return "mov %1,%0";
801
5dd3389c 802 else if (CONST_OK_FOR_K (value)) /* Signed 16 bit immediate. */
747fe2d1 803 return "movea lo(%1),%.,%0";
804
5dd3389c 805 else if (CONST_OK_FOR_L (value)) /* Upper 16 bits were set. */
747fe2d1 806 return "movhi hi(%1),%.,%0";
807
5dd3389c 808 /* A random constant. */
809 else if (TARGET_V850E)
810 return "mov %1,%0";
811 else
747fe2d1 812 return "movhi hi(%1),%.,%0\n\tmovea lo(%1),%0,%0";
813 }
814
815 else if (GET_CODE (src) == CONST_DOUBLE && GET_MODE (src) == SFmode)
816 {
817 HOST_WIDE_INT high, low;
818
819 const_double_split (src, &high, &low);
5dd3389c 820
821 if (CONST_OK_FOR_J (high)) /* Signed 5 bit immediate. */
747fe2d1 822 return "mov %F1,%0";
823
5dd3389c 824 else if (CONST_OK_FOR_K (high)) /* Signed 16 bit immediate. */
747fe2d1 825 return "movea lo(%F1),%.,%0";
826
5dd3389c 827 else if (CONST_OK_FOR_L (high)) /* Upper 16 bits were set. */
747fe2d1 828 return "movhi hi(%F1),%.,%0";
829
5dd3389c 830 /* A random constant. */
831 else if (TARGET_V850E)
832 return "mov %F1,%0";
833
834 else
747fe2d1 835 return "movhi hi(%F1),%.,%0\n\tmovea lo(%F1),%0,%0";
836 }
837
838 else if (GET_CODE (src) == MEM)
839 return "%S1ld%W1 %1,%0";
840
841 else if (special_symbolref_operand (src, VOIDmode))
842 return "movea %O1(%P1),%Q1,%0";
843
844 else if (GET_CODE (src) == LABEL_REF
845 || GET_CODE (src) == SYMBOL_REF
846 || GET_CODE (src) == CONST)
65c7acad 847 {
5dd3389c 848 if (TARGET_V850E)
849 return "mov hilo(%1),%0";
850 else
851 return "movhi hi(%1),%.,%0\n\tmovea lo(%1),%0,%0";
65c7acad 852 }
747fe2d1 853
854 else if (GET_CODE (src) == HIGH)
855 return "movhi hi(%1),%.,%0";
856
857 else if (GET_CODE (src) == LO_SUM)
858 {
859 operands[2] = XEXP (src, 0);
860 operands[3] = XEXP (src, 1);
861 return "movea lo(%3),%2,%0";
862 }
863 }
864
865 else if (GET_CODE (dst) == MEM)
866 {
867 if (REG_P (src))
868 return "%S0st%W0 %1,%0";
869
870 else if (GET_CODE (src) == CONST_INT && INTVAL (src) == 0)
871 return "%S0st%W0 %.,%0";
872
873 else if (GET_CODE (src) == CONST_DOUBLE
874 && CONST0_RTX (GET_MODE (dst)) == src)
875 return "%S0st%W0 %.,%0";
876 }
877
7014838c 878 fatal_insn ("output_move_single:", gen_rtx_SET (VOIDmode, dst, src));
747fe2d1 879 return "";
880}
881
882\f
a821813a 883/* Return appropriate code to load up an 8 byte integer or
884 floating point value */
747fe2d1 885
1fcd08b1 886const char *
39031315 887output_move_double (rtx * operands)
747fe2d1 888{
889 enum machine_mode mode = GET_MODE (operands[0]);
890 rtx dst = operands[0];
891 rtx src = operands[1];
892
893 if (register_operand (dst, mode)
894 && register_operand (src, mode))
895 {
896 if (REGNO (src) + 1 == REGNO (dst))
897 return "mov %R1,%R0\n\tmov %1,%0";
898 else
899 return "mov %1,%0\n\tmov %R1,%R0";
900 }
901
902 /* Storing 0 */
903 if (GET_CODE (dst) == MEM
904 && ((GET_CODE (src) == CONST_INT && INTVAL (src) == 0)
905 || (GET_CODE (src) == CONST_DOUBLE && CONST_DOUBLE_OK_FOR_G (src))))
906 return "st.w %.,%0\n\tst.w %.,%R0";
907
908 if (GET_CODE (src) == CONST_INT || GET_CODE (src) == CONST_DOUBLE)
909 {
910 HOST_WIDE_INT high_low[2];
911 int i;
912 rtx xop[10];
913
914 if (GET_CODE (src) == CONST_DOUBLE)
915 const_double_split (src, &high_low[1], &high_low[0]);
916 else
917 {
918 high_low[0] = INTVAL (src);
919 high_low[1] = (INTVAL (src) >= 0) ? 0 : -1;
920 }
921
922 for (i = 0; i < 2; i++)
923 {
7014838c 924 xop[0] = gen_rtx_REG (SImode, REGNO (dst)+i);
747fe2d1 925 xop[1] = GEN_INT (high_low[i]);
926 output_asm_insn (output_move_single (xop), xop);
927 }
928
929 return "";
930 }
931
932 if (GET_CODE (src) == MEM)
933 {
934 int ptrreg = -1;
935 int dreg = REGNO (dst);
936 rtx inside = XEXP (src, 0);
937
938 if (GET_CODE (inside) == REG)
939 ptrreg = REGNO (inside);
940 else if (GET_CODE (inside) == SUBREG)
701e46d0 941 ptrreg = subreg_regno (inside);
747fe2d1 942 else if (GET_CODE (inside) == PLUS)
943 ptrreg = REGNO (XEXP (inside, 0));
944 else if (GET_CODE (inside) == LO_SUM)
945 ptrreg = REGNO (XEXP (inside, 0));
946
947 if (dreg == ptrreg)
948 return "ld.w %R1,%R0\n\tld.w %1,%0";
949 }
950
951 if (GET_CODE (src) == MEM)
952 return "ld.w %1,%0\n\tld.w %R1,%R0";
953
954 if (GET_CODE (dst) == MEM)
955 return "st.w %1,%0\n\tst.w %R1,%R0";
956
957 return "mov %1,%0\n\tmov %R1,%R0";
958}
959
960\f
d0ab67df 961/* Return maximum offset supported for a short EP memory reference of mode
962 MODE and signedness UNSIGNEDP. */
747fe2d1 963
a821813a 964static int
39031315 965ep_memory_offset (enum machine_mode mode, int unsignedp ATTRIBUTE_UNUSED)
747fe2d1 966{
d0ab67df 967 int max_offset = 0;
747fe2d1 968
d0ab67df 969 switch (mode)
747fe2d1 970 {
747fe2d1 971 case QImode:
5dd3389c 972 if (TARGET_SMALL_SLD)
973 max_offset = (1 << 4);
974 else if (TARGET_V850E
975 && ( ( unsignedp && ! TARGET_US_BIT_SET)
976 || (! unsignedp && TARGET_US_BIT_SET)))
977 max_offset = (1 << 4);
978 else
979 max_offset = (1 << 7);
747fe2d1 980 break;
981
982 case HImode:
5dd3389c 983 if (TARGET_SMALL_SLD)
984 max_offset = (1 << 5);
985 else if (TARGET_V850E
986 && ( ( unsignedp && ! TARGET_US_BIT_SET)
987 || (! unsignedp && TARGET_US_BIT_SET)))
988 max_offset = (1 << 5);
989 else
990 max_offset = (1 << 8);
747fe2d1 991 break;
992
993 case SImode:
994 case SFmode:
65c7acad 995 max_offset = (1 << 8);
747fe2d1 996 break;
a821813a 997
998 default:
999 break;
747fe2d1 1000 }
1001
d0ab67df 1002 return max_offset;
1003}
1004
1005/* Return true if OP is a valid short EP memory reference */
1006
1007int
39031315 1008ep_memory_operand (rtx op, enum machine_mode mode, int unsigned_load)
d0ab67df 1009{
1010 rtx addr, op0, op1;
1011 int max_offset;
1012 int mask;
1013
1014 if (GET_CODE (op) != MEM)
1015 return FALSE;
1016
1017 max_offset = ep_memory_offset (mode, unsigned_load);
1018
1019 mask = GET_MODE_SIZE (mode) - 1;
1020
747fe2d1 1021 addr = XEXP (op, 0);
1022 if (GET_CODE (addr) == CONST)
1023 addr = XEXP (addr, 0);
1024
1025 switch (GET_CODE (addr))
1026 {
1027 default:
1028 break;
1029
1030 case SYMBOL_REF:
91efe10c 1031 return SYMBOL_REF_TDA_P (addr);
747fe2d1 1032
1033 case REG:
1034 return REGNO (addr) == EP_REGNUM;
1035
1036 case PLUS:
1037 op0 = XEXP (addr, 0);
1038 op1 = XEXP (addr, 1);
1039 if (GET_CODE (op1) == CONST_INT
1040 && INTVAL (op1) < max_offset
acd39194 1041 && INTVAL (op1) >= 0
747fe2d1 1042 && (INTVAL (op1) & mask) == 0)
1043 {
1044 if (GET_CODE (op0) == REG && REGNO (op0) == EP_REGNUM)
1045 return TRUE;
1046
91efe10c 1047 if (GET_CODE (op0) == SYMBOL_REF && SYMBOL_REF_TDA_P (op0))
747fe2d1 1048 return TRUE;
1049 }
1050 break;
1051 }
1052
1053 return FALSE;
1054}
1055
1056/* Return true if OP is either a register or 0 */
1057
1058int
39031315 1059reg_or_0_operand (rtx op, enum machine_mode mode)
747fe2d1 1060{
1061 if (GET_CODE (op) == CONST_INT)
1062 return INTVAL (op) == 0;
1063
1064 else if (GET_CODE (op) == CONST_DOUBLE)
1065 return CONST_DOUBLE_OK_FOR_G (op);
1066
d0ab67df 1067 else
1068 return register_operand (op, mode);
747fe2d1 1069}
1070
1071/* Return true if OP is either a register or a signed five bit integer */
1072
1073int
39031315 1074reg_or_int5_operand (rtx op, enum machine_mode mode)
747fe2d1 1075{
1076 if (GET_CODE (op) == CONST_INT)
1077 return CONST_OK_FOR_J (INTVAL (op));
1078
d0ab67df 1079 else
1080 return register_operand (op, mode);
747fe2d1 1081}
1082
5dd3389c 1083/* Return true if OP is either a register or a signed nine bit integer. */
1084
1085int
39031315 1086reg_or_int9_operand (rtx op, enum machine_mode mode)
5dd3389c 1087{
1088 if (GET_CODE (op) == CONST_INT)
1089 return CONST_OK_FOR_O (INTVAL (op));
1090
1091 return register_operand (op, mode);
1092}
1093
1094/* Return true if OP is either a register or a const integer. */
1095
1096int
39031315 1097reg_or_const_operand (rtx op, enum machine_mode mode)
5dd3389c 1098{
1099 if (GET_CODE (op) == CONST_INT)
1100 return TRUE;
1101
1102 return register_operand (op, mode);
1103}
1104
747fe2d1 1105/* Return true if OP is a valid call operand. */
1106
1107int
39031315 1108call_address_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
747fe2d1 1109{
1110 /* Only registers are valid call operands if TARGET_LONG_CALLS. */
1111 if (TARGET_LONG_CALLS)
1112 return GET_CODE (op) == REG;
1113 return (GET_CODE (op) == SYMBOL_REF || GET_CODE (op) == REG);
1114}
1115
1116int
39031315 1117special_symbolref_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
747fe2d1 1118{
91efe10c 1119 if (GET_CODE (op) == CONST
1120 && GET_CODE (XEXP (op, 0)) == PLUS
1121 && GET_CODE (XEXP (XEXP (op, 0), 1)) == CONST_INT
1122 && CONST_OK_FOR_K (INTVAL (XEXP (XEXP (op, 0), 1))))
1123 op = XEXP (XEXP (op, 0), 0);
747fe2d1 1124
91efe10c 1125 if (GET_CODE (op) == SYMBOL_REF)
1126 return (SYMBOL_REF_FLAGS (op)
1127 & (SYMBOL_FLAG_ZDA | SYMBOL_FLAG_TDA | SYMBOL_FLAG_SDA)) != 0;
747fe2d1 1128
1129 return FALSE;
1130}
1131
1132int
39031315 1133movsi_source_operand (rtx op, enum machine_mode mode)
747fe2d1 1134{
1135 /* Some constants, as well as symbolic operands
1136 must be done with HIGH & LO_SUM patterns. */
1137 if (CONSTANT_P (op)
1138 && GET_CODE (op) != HIGH
1139 && !(GET_CODE (op) == CONST_INT
1140 && (CONST_OK_FOR_J (INTVAL (op))
1141 || CONST_OK_FOR_K (INTVAL (op))
1142 || CONST_OK_FOR_L (INTVAL (op)))))
1143 return special_symbolref_operand (op, mode);
1144 else
1145 return general_operand (op, mode);
1146}
1147
1148int
39031315 1149power_of_two_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
747fe2d1 1150{
1151 if (GET_CODE (op) != CONST_INT)
1152 return 0;
1153
1154 if (exact_log2 (INTVAL (op)) == -1)
1155 return 0;
1156 return 1;
1157}
1158
1159int
39031315 1160not_power_of_two_operand (rtx op, enum machine_mode mode)
747fe2d1 1161{
1162 unsigned int mask;
1163
1164 if (mode == QImode)
1165 mask = 0xff;
1166 else if (mode == HImode)
1167 mask = 0xffff;
1168 else if (mode == SImode)
30435bf8 1169 mask = 0xffffffff;
747fe2d1 1170 else
1171 return 0;
1172
1173 if (GET_CODE (op) != CONST_INT)
1174 return 0;
1175
1176 if (exact_log2 (~INTVAL (op) & mask) == -1)
1177 return 0;
1178 return 1;
1179}
1180
1181\f
1182/* Substitute memory references involving a pointer, to use the ep pointer,
1183 taking care to save and preserve the ep. */
1184
1185static void
39031315 1186substitute_ep_register (rtx first_insn,
1187 rtx last_insn,
1188 int uses,
1189 int regno,
1190 rtx * p_r1,
1191 rtx * p_ep)
747fe2d1 1192{
7014838c 1193 rtx reg = gen_rtx_REG (Pmode, regno);
747fe2d1 1194 rtx insn;
747fe2d1 1195
1196 if (!*p_r1)
1197 {
1198 regs_ever_live[1] = 1;
7014838c 1199 *p_r1 = gen_rtx_REG (Pmode, 1);
1200 *p_ep = gen_rtx_REG (Pmode, 30);
747fe2d1 1201 }
1202
1203 if (TARGET_DEBUG)
a821813a 1204 fprintf (stderr, "\
1205Saved %d bytes (%d uses of register %s) in function %s, starting as insn %d, ending at %d\n",
747fe2d1 1206 2 * (uses - 3), uses, reg_names[regno],
1207 IDENTIFIER_POINTER (DECL_NAME (current_function_decl)),
1208 INSN_UID (first_insn), INSN_UID (last_insn));
1209
1210 if (GET_CODE (first_insn) == NOTE)
1211 first_insn = next_nonnote_insn (first_insn);
1212
1213 last_insn = next_nonnote_insn (last_insn);
1214 for (insn = first_insn; insn && insn != last_insn; insn = NEXT_INSN (insn))
1215 {
1216 if (GET_CODE (insn) == INSN)
1217 {
1218 rtx pattern = single_set (insn);
1219
1220 /* Replace the memory references. */
1221 if (pattern)
1222 {
1223 rtx *p_mem;
d0ab67df 1224 /* Memory operands are signed by default. */
1225 int unsignedp = FALSE;
747fe2d1 1226
1227 if (GET_CODE (SET_DEST (pattern)) == MEM
1228 && GET_CODE (SET_SRC (pattern)) == MEM)
1229 p_mem = (rtx *)0;
1230
1231 else if (GET_CODE (SET_DEST (pattern)) == MEM)
1232 p_mem = &SET_DEST (pattern);
1233
1234 else if (GET_CODE (SET_SRC (pattern)) == MEM)
1235 p_mem = &SET_SRC (pattern);
1236
5dd3389c 1237 else if (GET_CODE (SET_SRC (pattern)) == SIGN_EXTEND
1238 && GET_CODE (XEXP (SET_SRC (pattern), 0)) == MEM)
1239 p_mem = &XEXP (SET_SRC (pattern), 0);
1240
1241 else if (GET_CODE (SET_SRC (pattern)) == ZERO_EXTEND
1242 && GET_CODE (XEXP (SET_SRC (pattern), 0)) == MEM)
1243 {
1244 p_mem = &XEXP (SET_SRC (pattern), 0);
1245 unsignedp = TRUE;
1246 }
747fe2d1 1247 else
1248 p_mem = (rtx *)0;
1249
1250 if (p_mem)
1251 {
1252 rtx addr = XEXP (*p_mem, 0);
1253
e101acea 1254 if (GET_CODE (addr) == REG && REGNO (addr) == (unsigned) regno)
747fe2d1 1255 *p_mem = change_address (*p_mem, VOIDmode, *p_ep);
1256
1257 else if (GET_CODE (addr) == PLUS
1258 && GET_CODE (XEXP (addr, 0)) == REG
e101acea 1259 && REGNO (XEXP (addr, 0)) == (unsigned) regno
747fe2d1 1260 && GET_CODE (XEXP (addr, 1)) == CONST_INT
a821813a 1261 && ((INTVAL (XEXP (addr, 1)))
d0ab67df 1262 < ep_memory_offset (GET_MODE (*p_mem),
acd39194 1263 unsignedp))
1264 && ((INTVAL (XEXP (addr, 1))) >= 0))
747fe2d1 1265 *p_mem = change_address (*p_mem, VOIDmode,
7014838c 1266 gen_rtx_PLUS (Pmode,
1267 *p_ep,
1268 XEXP (addr, 1)));
747fe2d1 1269 }
1270 }
1271 }
1272 }
1273
1274 /* Optimize back to back cases of ep <- r1 & r1 <- ep. */
1275 insn = prev_nonnote_insn (first_insn);
1276 if (insn && GET_CODE (insn) == INSN
1277 && GET_CODE (PATTERN (insn)) == SET
1278 && SET_DEST (PATTERN (insn)) == *p_ep
1279 && SET_SRC (PATTERN (insn)) == *p_r1)
1280 delete_insn (insn);
1281 else
7014838c 1282 emit_insn_before (gen_rtx_SET (Pmode, *p_r1, *p_ep), first_insn);
747fe2d1 1283
7014838c 1284 emit_insn_before (gen_rtx_SET (Pmode, *p_ep, reg), first_insn);
1285 emit_insn_before (gen_rtx_SET (Pmode, *p_ep, *p_r1), last_insn);
747fe2d1 1286}
1287
1288\f
2efea8c0 1289/* TARGET_MACHINE_DEPENDENT_REORG. On the 850, we use it to implement
1290 the -mep mode to copy heavily used pointers to ep to use the implicit
1291 addressing. */
747fe2d1 1292
2efea8c0 1293static void
39031315 1294v850_reorg (void)
747fe2d1 1295{
a821813a 1296 struct
1297 {
747fe2d1 1298 int uses;
1299 rtx first_insn;
1300 rtx last_insn;
a821813a 1301 }
1302 regs[FIRST_PSEUDO_REGISTER];
747fe2d1 1303
1304 int i;
1305 int use_ep = FALSE;
1306 rtx r1 = NULL_RTX;
1307 rtx ep = NULL_RTX;
1308 rtx insn;
1309 rtx pattern;
1310
d32ccca7 1311 /* If not ep mode, just return now. */
747fe2d1 1312 if (!TARGET_EP)
1313 return;
1314
1315 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1316 {
1317 regs[i].uses = 0;
1318 regs[i].first_insn = NULL_RTX;
1319 regs[i].last_insn = NULL_RTX;
1320 }
1321
2efea8c0 1322 for (insn = get_insns (); insn != NULL_RTX; insn = NEXT_INSN (insn))
747fe2d1 1323 {
1324 switch (GET_CODE (insn))
1325 {
1326 /* End of basic block */
1327 default:
1328 if (!use_ep)
1329 {
1330 int max_uses = -1;
1331 int max_regno = -1;
1332
1333 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1334 {
1335 if (max_uses < regs[i].uses)
1336 {
1337 max_uses = regs[i].uses;
1338 max_regno = i;
1339 }
1340 }
1341
1342 if (max_uses > 3)
1343 substitute_ep_register (regs[max_regno].first_insn,
1344 regs[max_regno].last_insn,
1345 max_uses, max_regno, &r1, &ep);
1346 }
1347
1348 use_ep = FALSE;
1349 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1350 {
1351 regs[i].uses = 0;
1352 regs[i].first_insn = NULL_RTX;
1353 regs[i].last_insn = NULL_RTX;
1354 }
1355 break;
1356
1357 case NOTE:
1358 break;
1359
1360 case INSN:
1361 pattern = single_set (insn);
1362
1363 /* See if there are any memory references we can shorten */
1364 if (pattern)
1365 {
1366 rtx src = SET_SRC (pattern);
1367 rtx dest = SET_DEST (pattern);
1368 rtx mem;
d0ab67df 1369 /* Memory operands are signed by default. */
1370 int unsignedp = FALSE;
747fe2d1 1371
d0fafca1 1372 /* We might have (SUBREG (MEM)) here, so just get rid of the
e2c2ccf6 1373 subregs to make this code simpler. */
1374 if (GET_CODE (dest) == SUBREG
1375 && (GET_CODE (SUBREG_REG (dest)) == MEM
1376 || GET_CODE (SUBREG_REG (dest)) == REG))
1377 alter_subreg (&dest);
1378 if (GET_CODE (src) == SUBREG
1379 && (GET_CODE (SUBREG_REG (src)) == MEM
1380 || GET_CODE (SUBREG_REG (src)) == REG))
1381 alter_subreg (&src);
d0fafca1 1382
747fe2d1 1383 if (GET_CODE (dest) == MEM && GET_CODE (src) == MEM)
1384 mem = NULL_RTX;
1385
1386 else if (GET_CODE (dest) == MEM)
1387 mem = dest;
1388
1389 else if (GET_CODE (src) == MEM)
1390 mem = src;
1391
5dd3389c 1392 else if (GET_CODE (src) == SIGN_EXTEND
1393 && GET_CODE (XEXP (src, 0)) == MEM)
1394 mem = XEXP (src, 0);
1395
1396 else if (GET_CODE (src) == ZERO_EXTEND
1397 && GET_CODE (XEXP (src, 0)) == MEM)
1398 {
1399 mem = XEXP (src, 0);
1400 unsignedp = TRUE;
1401 }
747fe2d1 1402 else
1403 mem = NULL_RTX;
1404
d0ab67df 1405 if (mem && ep_memory_operand (mem, GET_MODE (mem), unsignedp))
747fe2d1 1406 use_ep = TRUE;
1407
1408 else if (!use_ep && mem
1409 && GET_MODE_SIZE (GET_MODE (mem)) <= UNITS_PER_WORD)
1410 {
1411 rtx addr = XEXP (mem, 0);
1412 int regno = -1;
1413 int short_p;
1414
1415 if (GET_CODE (addr) == REG)
1416 {
1417 short_p = TRUE;
1418 regno = REGNO (addr);
1419 }
1420
1421 else if (GET_CODE (addr) == PLUS
1422 && GET_CODE (XEXP (addr, 0)) == REG
1423 && GET_CODE (XEXP (addr, 1)) == CONST_INT
a821813a 1424 && ((INTVAL (XEXP (addr, 1)))
acd39194 1425 < ep_memory_offset (GET_MODE (mem), unsignedp))
1426 && ((INTVAL (XEXP (addr, 1))) >= 0))
747fe2d1 1427 {
1428 short_p = TRUE;
1429 regno = REGNO (XEXP (addr, 0));
1430 }
1431
1432 else
1433 short_p = FALSE;
1434
1435 if (short_p)
1436 {
1437 regs[regno].uses++;
1438 regs[regno].last_insn = insn;
1439 if (!regs[regno].first_insn)
1440 regs[regno].first_insn = insn;
1441 }
1442 }
1443
1444 /* Loading up a register in the basic block zaps any savings
1445 for the register */
d0fafca1 1446 if (GET_CODE (dest) == REG)
747fe2d1 1447 {
1448 enum machine_mode mode = GET_MODE (dest);
747fe2d1 1449 int regno;
1450 int endregno;
1451
d0fafca1 1452 regno = REGNO (dest);
747fe2d1 1453 endregno = regno + HARD_REGNO_NREGS (regno, mode);
1454
1455 if (!use_ep)
1456 {
1457 /* See if we can use the pointer before this
1458 modification. */
1459 int max_uses = -1;
1460 int max_regno = -1;
1461
1462 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1463 {
1464 if (max_uses < regs[i].uses)
1465 {
1466 max_uses = regs[i].uses;
1467 max_regno = i;
1468 }
1469 }
1470
1471 if (max_uses > 3
1472 && max_regno >= regno
1473 && max_regno < endregno)
1474 {
1475 substitute_ep_register (regs[max_regno].first_insn,
1476 regs[max_regno].last_insn,
a821813a 1477 max_uses, max_regno, &r1,
1478 &ep);
747fe2d1 1479
1480 /* Since we made a substitution, zap all remembered
1481 registers. */
1482 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1483 {
1484 regs[i].uses = 0;
1485 regs[i].first_insn = NULL_RTX;
1486 regs[i].last_insn = NULL_RTX;
1487 }
1488 }
1489 }
1490
1491 for (i = regno; i < endregno; i++)
1492 {
1493 regs[i].uses = 0;
1494 regs[i].first_insn = NULL_RTX;
1495 regs[i].last_insn = NULL_RTX;
1496 }
1497 }
1498 }
1499 }
1500 }
1501}
1502
1503\f
1504/* # of registers saved by the interrupt handler. */
1505#define INTERRUPT_FIXED_NUM 4
1506
1507/* # of bytes for registers saved by the interrupt handler. */
1508#define INTERRUPT_FIXED_SAVE_SIZE (4 * INTERRUPT_FIXED_NUM)
1509
1510/* # of registers saved in register parameter area. */
1511#define INTERRUPT_REGPARM_NUM 4
1512/* # of words saved for other registers. */
1513#define INTERRUPT_ALL_SAVE_NUM \
1514 (30 - INTERRUPT_FIXED_NUM + INTERRUPT_REGPARM_NUM)
1515
1516#define INTERRUPT_ALL_SAVE_SIZE (4 * INTERRUPT_ALL_SAVE_NUM)
1517
1518int
39031315 1519compute_register_save_size (long * p_reg_saved)
747fe2d1 1520{
1521 int size = 0;
1522 int i;
1523 int interrupt_handler = v850_interrupt_function_p (current_function_decl);
26845ab8 1524 int call_p = regs_ever_live [LINK_POINTER_REGNUM];
747fe2d1 1525 long reg_saved = 0;
1526
1527 /* Count the return pointer if we need to save it. */
7811c823 1528 if (current_function_profile && !call_p)
26845ab8 1529 regs_ever_live [LINK_POINTER_REGNUM] = call_p = 1;
747fe2d1 1530
1531 /* Count space for the register saves. */
1532 if (interrupt_handler)
1533 {
1534 for (i = 0; i <= 31; i++)
1535 switch (i)
1536 {
1537 default:
1538 if (regs_ever_live[i] || call_p)
1539 {
1540 size += 4;
1541 reg_saved |= 1L << i;
1542 }
1543 break;
1544
1545 /* We don't save/restore r0 or the stack pointer */
1546 case 0:
1547 case STACK_POINTER_REGNUM:
1548 break;
1549
1550 /* For registers with fixed use, we save them, set them to the
1551 appropriate value, and then restore them.
1552 These registers are handled specially, so don't list them
1553 on the list of registers to save in the prologue. */
1554 case 1: /* temp used to hold ep */
a1e077bd 1555 case 4: /* gp */
747fe2d1 1556 case 10: /* temp used to call interrupt save/restore */
1557 case EP_REGNUM: /* ep */
1558 size += 4;
1559 break;
1560 }
1561 }
747fe2d1 1562 else
26845ab8 1563 {
1564 /* Find the first register that needs to be saved. */
1565 for (i = 0; i <= 31; i++)
1566 if (regs_ever_live[i] && ((! call_used_regs[i])
1567 || i == LINK_POINTER_REGNUM))
1568 break;
1569
1570 /* If it is possible that an out-of-line helper function might be
1571 used to generate the prologue for the current function, then we
1572 need to cover the possibility that such a helper function will
1573 be used, despite the fact that there might be gaps in the list of
1574 registers that need to be saved. To detect this we note that the
f3d57f06 1575 helper functions always push at least register r29 (provided
1576 that the function is not an interrupt handler). */
26845ab8 1577
1578 if (TARGET_PROLOG_FUNCTION
f3d57f06 1579 && (i == 2 || ((i >= 20) && (i < 30))))
747fe2d1 1580 {
26845ab8 1581 if (i == 2)
1582 {
1583 size += 4;
1584 reg_saved |= 1L << i;
1585
1586 i = 20;
1587 }
747fe2d1 1588
26845ab8 1589 /* Helper functions save all registers between the starting
1590 register and the last register, regardless of whether they
1591 are actually used by the function or not. */
1592 for (; i <= 29; i++)
1593 {
1594 size += 4;
1595 reg_saved |= 1L << i;
1596 }
1597
1598 if (regs_ever_live [LINK_POINTER_REGNUM])
1599 {
1600 size += 4;
1601 reg_saved |= 1L << LINK_POINTER_REGNUM;
1602 }
1603 }
1604 else
1605 {
1606 for (; i <= 31; i++)
1607 if (regs_ever_live[i] && ((! call_used_regs[i])
1608 || i == LINK_POINTER_REGNUM))
1609 {
1610 size += 4;
1611 reg_saved |= 1L << i;
1612 }
1613 }
1614 }
1615
747fe2d1 1616 if (p_reg_saved)
1617 *p_reg_saved = reg_saved;
1618
1619 return size;
1620}
1621
1622int
39031315 1623compute_frame_size (int size, long * p_reg_saved)
747fe2d1 1624{
747fe2d1 1625 return (size
1626 + compute_register_save_size (p_reg_saved)
1627 + current_function_outgoing_args_size);
1628}
1629
1630\f
1631void
39031315 1632expand_prologue (void)
747fe2d1 1633{
1634 unsigned int i;
1635 int offset;
1636 unsigned int size = get_frame_size ();
1637 unsigned int actual_fsize;
1638 unsigned int init_stack_alloc = 0;
1639 rtx save_regs[32];
1640 rtx save_all;
a821813a 1641 unsigned int num_save;
1642 unsigned int default_stack;
747fe2d1 1643 int code;
1644 int interrupt_handler = v850_interrupt_function_p (current_function_decl);
1645 long reg_saved = 0;
1646
1647 actual_fsize = compute_frame_size (size, &reg_saved);
1648
d022cb59 1649 /* Save/setup global registers for interrupt functions right now. */
747fe2d1 1650 if (interrupt_handler)
1651 {
5dd3389c 1652 if (TARGET_V850E && ! TARGET_DISABLE_CALLT)
1653 emit_insn (gen_callt_save_interrupt ());
1654 else
9878c564 1655 emit_insn (gen_save_interrupt ());
5dd3389c 1656
747fe2d1 1657 actual_fsize -= INTERRUPT_FIXED_SAVE_SIZE;
26845ab8 1658
1659 if (((1L << LINK_POINTER_REGNUM) & reg_saved) != 0)
747fe2d1 1660 actual_fsize -= INTERRUPT_ALL_SAVE_SIZE;
1661 }
1662
1663 /* Save arg registers to the stack if necessary. */
0721ab49 1664 else if (current_function_args_info.anonymous_args)
747fe2d1 1665 {
a184c07b 1666 if (TARGET_PROLOG_FUNCTION && TARGET_V850E && !TARGET_DISABLE_CALLT)
1667 emit_insn (gen_save_r6_r9_v850e ());
1668 else if (TARGET_PROLOG_FUNCTION && ! TARGET_LONG_CALLS)
1669 emit_insn (gen_save_r6_r9 ());
747fe2d1 1670 else
1671 {
1672 offset = 0;
1673 for (i = 6; i < 10; i++)
1674 {
7014838c 1675 emit_move_insn (gen_rtx_MEM (SImode,
1676 plus_constant (stack_pointer_rtx,
1677 offset)),
1678 gen_rtx_REG (SImode, i));
747fe2d1 1679 offset += 4;
1680 }
1681 }
1682 }
1683
d022cb59 1684 /* Identify all of the saved registers. */
747fe2d1 1685 num_save = 0;
1686 default_stack = 0;
1687 for (i = 1; i < 31; i++)
1688 {
1689 if (((1L << i) & reg_saved) != 0)
7014838c 1690 save_regs[num_save++] = gen_rtx_REG (Pmode, i);
747fe2d1 1691 }
1692
1693 /* If the return pointer is saved, the helper functions also allocate
1694 16 bytes of stack for arguments to be saved in. */
26845ab8 1695 if (((1L << LINK_POINTER_REGNUM) & reg_saved) != 0)
747fe2d1 1696 {
7014838c 1697 save_regs[num_save++] = gen_rtx_REG (Pmode, LINK_POINTER_REGNUM);
747fe2d1 1698 default_stack = 16;
1699 }
1700
1701 /* See if we have an insn that allocates stack space and saves the particular
1702 registers we want to. */
1703 save_all = NULL_RTX;
1704 if (TARGET_PROLOG_FUNCTION && num_save > 0 && actual_fsize >= default_stack)
1705 {
1706 int alloc_stack = (4 * num_save) + default_stack;
1707 int unalloc_stack = actual_fsize - alloc_stack;
1708 int save_func_len = 4;
1709 int save_normal_len;
1710
1711 if (unalloc_stack)
1712 save_func_len += CONST_OK_FOR_J (unalloc_stack) ? 2 : 4;
1713
1714 /* see if we would have used ep to save the stack */
1715 if (TARGET_EP && num_save > 3 && (unsigned)actual_fsize < 255)
1716 save_normal_len = (3 * 2) + (2 * num_save);
1717 else
1718 save_normal_len = 4 * num_save;
1719
1720 save_normal_len += CONST_OK_FOR_J (actual_fsize) ? 2 : 4;
1721
1722 /* Don't bother checking if we don't actually save any space.
1723 This happens for instance if one register is saved and additional
1724 stack space is allocated. */
1725 if (save_func_len < save_normal_len)
1726 {
7014838c 1727 save_all = gen_rtx_PARALLEL
1728 (VOIDmode,
a184c07b 1729 rtvec_alloc (num_save + 1
1730 + (TARGET_V850 ? (TARGET_LONG_CALLS ? 2 : 1) : 0)));
7014838c 1731
1732 XVECEXP (save_all, 0, 0)
1733 = gen_rtx_SET (VOIDmode,
1734 stack_pointer_rtx,
1735 plus_constant (stack_pointer_rtx, -alloc_stack));
747fe2d1 1736
747fe2d1 1737 offset = - default_stack;
1738 for (i = 0; i < num_save; i++)
1739 {
7014838c 1740 XVECEXP (save_all, 0, i+1)
1741 = gen_rtx_SET (VOIDmode,
1742 gen_rtx_MEM (Pmode,
1743 plus_constant (stack_pointer_rtx,
1744 offset)),
1745 save_regs[i]);
747fe2d1 1746 offset -= 4;
1747 }
1748
a184c07b 1749 if (TARGET_V850)
1750 {
1751 XVECEXP (save_all, 0, num_save + 1)
1752 = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (Pmode, 10));
1753
1754 if (TARGET_LONG_CALLS)
1755 XVECEXP (save_all, 0, num_save + 2)
1756 = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (Pmode, 11));
1757 }
1758
2571646d 1759 code = recog (save_all, NULL_RTX, NULL);
747fe2d1 1760 if (code >= 0)
1761 {
1762 rtx insn = emit_insn (save_all);
1763 INSN_CODE (insn) = code;
1764 actual_fsize -= alloc_stack;
26845ab8 1765
747fe2d1 1766 if (TARGET_DEBUG)
a821813a 1767 fprintf (stderr, "\
1768Saved %d bytes via prologue function (%d vs. %d) for function %s\n",
747fe2d1 1769 save_normal_len - save_func_len,
1770 save_normal_len, save_func_len,
1771 IDENTIFIER_POINTER (DECL_NAME (current_function_decl)));
1772 }
1773 else
1774 save_all = NULL_RTX;
1775 }
1776 }
1777
a821813a 1778 /* If no prolog save function is available, store the registers the old
df978151 1779 fashioned way (one by one). */
747fe2d1 1780 if (!save_all)
1781 {
1782 /* Special case interrupt functions that save all registers for a call. */
26845ab8 1783 if (interrupt_handler && ((1L << LINK_POINTER_REGNUM) & reg_saved) != 0)
1784 {
5dd3389c 1785 if (TARGET_V850E && ! TARGET_DISABLE_CALLT)
1786 emit_insn (gen_callt_save_all_interrupt ());
1787 else
1788 emit_insn (gen_save_all_interrupt ());
26845ab8 1789 }
747fe2d1 1790 else
1791 {
1792 /* If the stack is too big, allocate it in chunks so we can do the
1793 register saves. We use the register save size so we use the ep
1794 register. */
1795 if (actual_fsize && !CONST_OK_FOR_K (-actual_fsize))
1796 init_stack_alloc = compute_register_save_size (NULL);
1797 else
1798 init_stack_alloc = actual_fsize;
65c7acad 1799
df978151 1800 /* Save registers at the beginning of the stack frame. */
747fe2d1 1801 offset = init_stack_alloc - 4;
65c7acad 1802
747fe2d1 1803 if (init_stack_alloc)
1804 emit_insn (gen_addsi3 (stack_pointer_rtx,
1805 stack_pointer_rtx,
1806 GEN_INT (-init_stack_alloc)));
65c7acad 1807
747fe2d1 1808 /* Save the return pointer first. */
26845ab8 1809 if (num_save > 0 && REGNO (save_regs[num_save-1]) == LINK_POINTER_REGNUM)
747fe2d1 1810 {
7014838c 1811 emit_move_insn (gen_rtx_MEM (SImode,
1812 plus_constant (stack_pointer_rtx,
1813 offset)),
747fe2d1 1814 save_regs[--num_save]);
1815 offset -= 4;
1816 }
65c7acad 1817
747fe2d1 1818 for (i = 0; i < num_save; i++)
1819 {
7014838c 1820 emit_move_insn (gen_rtx_MEM (SImode,
1821 plus_constant (stack_pointer_rtx,
1822 offset)),
747fe2d1 1823 save_regs[i]);
1824 offset -= 4;
1825 }
1826 }
1827 }
1828
1829 /* Allocate the rest of the stack that was not allocated above (either it is
1830 > 32K or we just called a function to save the registers and needed more
1831 stack. */
1832 if (actual_fsize > init_stack_alloc)
1833 {
1834 int diff = actual_fsize - init_stack_alloc;
1835 if (CONST_OK_FOR_K (diff))
1836 emit_insn (gen_addsi3 (stack_pointer_rtx,
1837 stack_pointer_rtx,
1838 GEN_INT (-diff)));
1839 else
1840 {
7014838c 1841 rtx reg = gen_rtx_REG (Pmode, 12);
747fe2d1 1842 emit_move_insn (reg, GEN_INT (-diff));
1843 emit_insn (gen_addsi3 (stack_pointer_rtx, stack_pointer_rtx, reg));
1844 }
1845 }
1846
1847 /* If we need a frame pointer, set it up now. */
1848 if (frame_pointer_needed)
1849 emit_move_insn (hard_frame_pointer_rtx, stack_pointer_rtx);
1850}
1851\f
1852
1853void
39031315 1854expand_epilogue (void)
747fe2d1 1855{
1856 unsigned int i;
1857 int offset;
1858 unsigned int size = get_frame_size ();
1859 long reg_saved = 0;
1860 unsigned int actual_fsize = compute_frame_size (size, &reg_saved);
1861 unsigned int init_stack_free = 0;
1862 rtx restore_regs[32];
1863 rtx restore_all;
a821813a 1864 unsigned int num_restore;
1865 unsigned int default_stack;
747fe2d1 1866 int code;
1867 int interrupt_handler = v850_interrupt_function_p (current_function_decl);
1868
1869 /* Eliminate the initial stack stored by interrupt functions. */
1870 if (interrupt_handler)
1871 {
1872 actual_fsize -= INTERRUPT_FIXED_SAVE_SIZE;
26845ab8 1873 if (((1L << LINK_POINTER_REGNUM) & reg_saved) != 0)
747fe2d1 1874 actual_fsize -= INTERRUPT_ALL_SAVE_SIZE;
1875 }
1876
1877 /* Cut off any dynamic stack created. */
1878 if (frame_pointer_needed)
1879 emit_move_insn (stack_pointer_rtx, hard_frame_pointer_rtx);
1880
d022cb59 1881 /* Identify all of the saved registers. */
747fe2d1 1882 num_restore = 0;
1883 default_stack = 0;
1884 for (i = 1; i < 31; i++)
1885 {
1886 if (((1L << i) & reg_saved) != 0)
7014838c 1887 restore_regs[num_restore++] = gen_rtx_REG (Pmode, i);
747fe2d1 1888 }
1889
1890 /* If the return pointer is saved, the helper functions also allocate
1891 16 bytes of stack for arguments to be saved in. */
26845ab8 1892 if (((1L << LINK_POINTER_REGNUM) & reg_saved) != 0)
747fe2d1 1893 {
7014838c 1894 restore_regs[num_restore++] = gen_rtx_REG (Pmode, LINK_POINTER_REGNUM);
747fe2d1 1895 default_stack = 16;
1896 }
1897
1898 /* See if we have an insn that restores the particular registers we
1899 want to. */
1900 restore_all = NULL_RTX;
d022cb59 1901
1902 if (TARGET_PROLOG_FUNCTION
1903 && num_restore > 0
a821813a 1904 && actual_fsize >= default_stack
747fe2d1 1905 && !interrupt_handler)
1906 {
1907 int alloc_stack = (4 * num_restore) + default_stack;
1908 int unalloc_stack = actual_fsize - alloc_stack;
1909 int restore_func_len = 4;
1910 int restore_normal_len;
1911
1912 if (unalloc_stack)
1913 restore_func_len += CONST_OK_FOR_J (unalloc_stack) ? 2 : 4;
1914
d022cb59 1915 /* See if we would have used ep to restore the registers. */
747fe2d1 1916 if (TARGET_EP && num_restore > 3 && (unsigned)actual_fsize < 255)
1917 restore_normal_len = (3 * 2) + (2 * num_restore);
1918 else
1919 restore_normal_len = 4 * num_restore;
1920
1921 restore_normal_len += (CONST_OK_FOR_J (actual_fsize) ? 2 : 4) + 2;
1922
1923 /* Don't bother checking if we don't actually save any space. */
1924 if (restore_func_len < restore_normal_len)
1925 {
7014838c 1926 restore_all = gen_rtx_PARALLEL (VOIDmode,
1927 rtvec_alloc (num_restore + 2));
1928 XVECEXP (restore_all, 0, 0) = gen_rtx_RETURN (VOIDmode);
747fe2d1 1929 XVECEXP (restore_all, 0, 1)
7014838c 1930 = gen_rtx_SET (VOIDmode, stack_pointer_rtx,
1931 gen_rtx_PLUS (Pmode,
1932 stack_pointer_rtx,
1933 GEN_INT (alloc_stack)));
747fe2d1 1934
1935 offset = alloc_stack - 4;
1936 for (i = 0; i < num_restore; i++)
1937 {
1938 XVECEXP (restore_all, 0, i+2)
7014838c 1939 = gen_rtx_SET (VOIDmode,
1940 restore_regs[i],
1941 gen_rtx_MEM (Pmode,
1942 plus_constant (stack_pointer_rtx,
1943 offset)));
747fe2d1 1944 offset -= 4;
1945 }
1946
2571646d 1947 code = recog (restore_all, NULL_RTX, NULL);
d022cb59 1948
747fe2d1 1949 if (code >= 0)
1950 {
1951 rtx insn;
1952
1953 actual_fsize -= alloc_stack;
1954 if (actual_fsize)
1955 {
1956 if (CONST_OK_FOR_K (actual_fsize))
1957 emit_insn (gen_addsi3 (stack_pointer_rtx,
1958 stack_pointer_rtx,
1959 GEN_INT (actual_fsize)));
1960 else
1961 {
7014838c 1962 rtx reg = gen_rtx_REG (Pmode, 12);
747fe2d1 1963 emit_move_insn (reg, GEN_INT (actual_fsize));
1964 emit_insn (gen_addsi3 (stack_pointer_rtx,
1965 stack_pointer_rtx,
1966 reg));
1967 }
1968 }
1969
1970 insn = emit_jump_insn (restore_all);
1971 INSN_CODE (insn) = code;
1972
1973 if (TARGET_DEBUG)
a821813a 1974 fprintf (stderr, "\
1975Saved %d bytes via epilogue function (%d vs. %d) in function %s\n",
747fe2d1 1976 restore_normal_len - restore_func_len,
1977 restore_normal_len, restore_func_len,
1978 IDENTIFIER_POINTER (DECL_NAME (current_function_decl)));
1979 }
1980 else
1981 restore_all = NULL_RTX;
1982 }
1983 }
1984
1985 /* If no epilog save function is available, restore the registers the
d022cb59 1986 old fashioned way (one by one). */
747fe2d1 1987 if (!restore_all)
1988 {
1989 /* If the stack is large, we need to cut it down in 2 pieces. */
1990 if (actual_fsize && !CONST_OK_FOR_K (-actual_fsize))
1991 init_stack_free = 4 * num_restore;
1992 else
1993 init_stack_free = actual_fsize;
1994
d022cb59 1995 /* Deallocate the rest of the stack if it is > 32K. */
1996 if (actual_fsize > init_stack_free)
747fe2d1 1997 {
a821813a 1998 int diff;
1999
2000 diff = actual_fsize - ((interrupt_handler) ? 0 : init_stack_free);
d022cb59 2001
747fe2d1 2002 if (CONST_OK_FOR_K (diff))
2003 emit_insn (gen_addsi3 (stack_pointer_rtx,
2004 stack_pointer_rtx,
2005 GEN_INT (diff)));
2006 else
2007 {
7014838c 2008 rtx reg = gen_rtx_REG (Pmode, 12);
747fe2d1 2009 emit_move_insn (reg, GEN_INT (diff));
2010 emit_insn (gen_addsi3 (stack_pointer_rtx,
2011 stack_pointer_rtx,
2012 reg));
2013 }
2014 }
2015
2016 /* Special case interrupt functions that save all registers
2017 for a call. */
26845ab8 2018 if (interrupt_handler && ((1L << LINK_POINTER_REGNUM) & reg_saved) != 0)
2019 {
5dd3389c 2020 if (TARGET_V850E && ! TARGET_DISABLE_CALLT)
2021 emit_insn (gen_callt_restore_all_interrupt ());
2022 else
2023 emit_insn (gen_restore_all_interrupt ());
26845ab8 2024 }
747fe2d1 2025 else
2026 {
d022cb59 2027 /* Restore registers from the beginning of the stack frame. */
747fe2d1 2028 offset = init_stack_free - 4;
2029
2030 /* Restore the return pointer first. */
26845ab8 2031 if (num_restore > 0
2032 && REGNO (restore_regs [num_restore - 1]) == LINK_POINTER_REGNUM)
747fe2d1 2033 {
2034 emit_move_insn (restore_regs[--num_restore],
7014838c 2035 gen_rtx_MEM (SImode,
2036 plus_constant (stack_pointer_rtx,
2037 offset)));
747fe2d1 2038 offset -= 4;
2039 }
2040
2041 for (i = 0; i < num_restore; i++)
2042 {
2043 emit_move_insn (restore_regs[i],
7014838c 2044 gen_rtx_MEM (SImode,
2045 plus_constant (stack_pointer_rtx,
2046 offset)));
747fe2d1 2047
d022cb59 2048 emit_insn (gen_rtx_USE (VOIDmode, restore_regs[i]));
747fe2d1 2049 offset -= 4;
2050 }
2051
2052 /* Cut back the remainder of the stack. */
2053 if (init_stack_free)
2054 emit_insn (gen_addsi3 (stack_pointer_rtx,
2055 stack_pointer_rtx,
2056 GEN_INT (init_stack_free)));
2057 }
2058
2059 /* And return or use reti for interrupt handlers. */
2060 if (interrupt_handler)
5dd3389c 2061 {
2062 if (TARGET_V850E && ! TARGET_DISABLE_CALLT)
2063 emit_insn (gen_callt_return_interrupt ());
2064 else
2065 emit_jump_insn (gen_return_interrupt ());
2066 }
747fe2d1 2067 else if (actual_fsize)
2068 emit_jump_insn (gen_return_internal ());
2069 else
2070 emit_jump_insn (gen_return ());
2071 }
2072
747fe2d1 2073 v850_interrupt_cache_p = FALSE;
2074 v850_interrupt_p = FALSE;
2075}
2076
2077\f
2078/* Update the condition code from the insn. */
2079
2080void
39031315 2081notice_update_cc (rtx body, rtx insn)
747fe2d1 2082{
2083 switch (get_attr_cc (insn))
2084 {
2085 case CC_NONE:
2086 /* Insn does not affect CC at all. */
2087 break;
2088
2089 case CC_NONE_0HIT:
2090 /* Insn does not change CC, but the 0'th operand has been changed. */
2091 if (cc_status.value1 != 0
ed420a25 2092 && reg_overlap_mentioned_p (recog_data.operand[0], cc_status.value1))
747fe2d1 2093 cc_status.value1 = 0;
2094 break;
2095
2096 case CC_SET_ZN:
ed420a25 2097 /* Insn sets the Z,N flags of CC to recog_data.operand[0].
747fe2d1 2098 V,C is in an unusable state. */
2099 CC_STATUS_INIT;
2100 cc_status.flags |= CC_OVERFLOW_UNUSABLE | CC_NO_CARRY;
ed420a25 2101 cc_status.value1 = recog_data.operand[0];
747fe2d1 2102 break;
2103
2104 case CC_SET_ZNV:
ed420a25 2105 /* Insn sets the Z,N,V flags of CC to recog_data.operand[0].
747fe2d1 2106 C is in an unusable state. */
2107 CC_STATUS_INIT;
2108 cc_status.flags |= CC_NO_CARRY;
ed420a25 2109 cc_status.value1 = recog_data.operand[0];
747fe2d1 2110 break;
2111
2112 case CC_COMPARE:
2113 /* The insn is a compare instruction. */
2114 CC_STATUS_INIT;
2115 cc_status.value1 = SET_SRC (body);
2116 break;
2117
2118 case CC_CLOBBER:
2119 /* Insn doesn't leave CC in a usable state. */
2120 CC_STATUS_INIT;
2121 break;
2122 }
2123}
747fe2d1 2124\f
a821813a 2125/* Retrieve the data area that has been chosen for the given decl. */
747fe2d1 2126
a821813a 2127v850_data_area
39031315 2128v850_get_data_area (tree decl)
a821813a 2129{
e3c541f0 2130 if (lookup_attribute ("sda", DECL_ATTRIBUTES (decl)) != NULL_TREE)
a821813a 2131 return DATA_AREA_SDA;
2132
e3c541f0 2133 if (lookup_attribute ("tda", DECL_ATTRIBUTES (decl)) != NULL_TREE)
a821813a 2134 return DATA_AREA_TDA;
2135
e3c541f0 2136 if (lookup_attribute ("zda", DECL_ATTRIBUTES (decl)) != NULL_TREE)
a821813a 2137 return DATA_AREA_ZDA;
2138
2139 return DATA_AREA_NORMAL;
2140}
747fe2d1 2141
a821813a 2142/* Store the indicated data area in the decl's attributes. */
2143
2144static void
39031315 2145v850_set_data_area (tree decl, v850_data_area data_area)
a821813a 2146{
2147 tree name;
2148
2149 switch (data_area)
2150 {
2151 case DATA_AREA_SDA: name = get_identifier ("sda"); break;
2152 case DATA_AREA_TDA: name = get_identifier ("tda"); break;
2153 case DATA_AREA_ZDA: name = get_identifier ("zda"); break;
2154 default:
2155 return;
2156 }
2157
e3c541f0 2158 DECL_ATTRIBUTES (decl) = tree_cons
2159 (name, NULL, DECL_ATTRIBUTES (decl));
a821813a 2160}
2161\f
e3c541f0 2162const struct attribute_spec v850_attribute_table[] =
2163{
2164 /* { name, min_len, max_len, decl_req, type_req, fn_type_req, handler } */
2165 { "interrupt_handler", 0, 0, true, false, false, v850_handle_interrupt_attribute },
2166 { "interrupt", 0, 0, true, false, false, v850_handle_interrupt_attribute },
2167 { "sda", 0, 0, true, false, false, v850_handle_data_area_attribute },
2168 { "tda", 0, 0, true, false, false, v850_handle_data_area_attribute },
2169 { "zda", 0, 0, true, false, false, v850_handle_data_area_attribute },
2170 { NULL, 0, 0, false, false, false, NULL }
2171};
747fe2d1 2172
e3c541f0 2173/* Handle an "interrupt" attribute; arguments as in
2174 struct attribute_spec.handler. */
2175static tree
39031315 2176v850_handle_interrupt_attribute (tree * node,
2177 tree name,
2178 tree args ATTRIBUTE_UNUSED,
2179 int flags ATTRIBUTE_UNUSED,
2180 bool * no_add_attrs)
e3c541f0 2181{
2182 if (TREE_CODE (*node) != FUNCTION_DECL)
2183 {
2184 warning ("`%s' attribute only applies to functions",
2185 IDENTIFIER_POINTER (name));
2186 *no_add_attrs = true;
2187 }
2188
2189 return NULL_TREE;
2190}
2191
2192/* Handle a "sda", "tda" or "zda" attribute; arguments as in
2193 struct attribute_spec.handler. */
2194static tree
39031315 2195v850_handle_data_area_attribute (tree* node,
2196 tree name,
2197 tree args ATTRIBUTE_UNUSED,
2198 int flags ATTRIBUTE_UNUSED,
2199 bool * no_add_attrs)
747fe2d1 2200{
a821813a 2201 v850_data_area data_area;
2202 v850_data_area area;
e3c541f0 2203 tree decl = *node;
747fe2d1 2204
a821813a 2205 /* Implement data area attribute. */
e3c541f0 2206 if (is_attribute_p ("sda", name))
a821813a 2207 data_area = DATA_AREA_SDA;
e3c541f0 2208 else if (is_attribute_p ("tda", name))
a821813a 2209 data_area = DATA_AREA_TDA;
e3c541f0 2210 else if (is_attribute_p ("zda", name))
a821813a 2211 data_area = DATA_AREA_ZDA;
2212 else
e3c541f0 2213 abort ();
a821813a 2214
2215 switch (TREE_CODE (decl))
2216 {
2217 case VAR_DECL:
2218 if (current_function_decl != NULL_TREE)
e3c541f0 2219 {
9bc3739f 2220 error ("%Jdata area attributes cannot be specified for "
2221 "local variables", decl, decl);
e3c541f0 2222 *no_add_attrs = true;
2223 }
2224
a821813a 2225 /* Drop through. */
2226
2227 case FUNCTION_DECL:
2228 area = v850_get_data_area (decl);
2229 if (area != DATA_AREA_NORMAL && data_area != area)
e3c541f0 2230 {
9bc3739f 2231 error ("%Jdata area of '%D' conflicts with previous declaration",
2232 decl, decl);
e3c541f0 2233 *no_add_attrs = true;
2234 }
2235 break;
a821813a 2236
2237 default:
2238 break;
2239 }
e3c541f0 2240
2241 return NULL_TREE;
747fe2d1 2242}
2243
2244\f
2245/* Return nonzero if FUNC is an interrupt function as specified
2246 by the "interrupt" attribute. */
2247
2248int
39031315 2249v850_interrupt_function_p (tree func)
747fe2d1 2250{
2251 tree a;
2252 int ret = 0;
2253
2254 if (v850_interrupt_cache_p)
2255 return v850_interrupt_p;
2256
2257 if (TREE_CODE (func) != FUNCTION_DECL)
2258 return 0;
2259
e3c541f0 2260 a = lookup_attribute ("interrupt_handler", DECL_ATTRIBUTES (func));
747fe2d1 2261 if (a != NULL_TREE)
2262 ret = 1;
2263
2264 else
2265 {
e3c541f0 2266 a = lookup_attribute ("interrupt", DECL_ATTRIBUTES (func));
747fe2d1 2267 ret = a != NULL_TREE;
2268 }
2269
2270 /* Its not safe to trust global variables until after function inlining has
2271 been done. */
2272 if (reload_completed | reload_in_progress)
2273 v850_interrupt_p = ret;
2274
2275 return ret;
2276}
2277
2278\f
7811991d 2279static void
39031315 2280v850_encode_data_area (tree decl, rtx symbol)
747fe2d1 2281{
91efe10c 2282 int flags;
a821813a 2283
efee20da 2284 /* Map explicit sections into the appropriate attribute */
a821813a 2285 if (v850_get_data_area (decl) == DATA_AREA_NORMAL)
2286 {
2287 if (DECL_SECTION_NAME (decl))
2288 {
9a356c3c 2289 const char *name = TREE_STRING_POINTER (DECL_SECTION_NAME (decl));
a821813a 2290
2291 if (streq (name, ".zdata") || streq (name, ".zbss"))
2292 v850_set_data_area (decl, DATA_AREA_ZDA);
2293
2294 else if (streq (name, ".sdata") || streq (name, ".sbss"))
2295 v850_set_data_area (decl, DATA_AREA_SDA);
2296
2297 else if (streq (name, ".tdata"))
2298 v850_set_data_area (decl, DATA_AREA_TDA);
2299 }
2300
2301 /* If no attribute, support -m{zda,sda,tda}=n */
2302 else
2303 {
2304 int size = int_size_in_bytes (TREE_TYPE (decl));
2305 if (size <= 0)
2306 ;
2307
2308 else if (size <= small_memory [(int) SMALL_MEMORY_TDA].max)
2309 v850_set_data_area (decl, DATA_AREA_TDA);
2310
2311 else if (size <= small_memory [(int) SMALL_MEMORY_SDA].max)
2312 v850_set_data_area (decl, DATA_AREA_SDA);
2313
2314 else if (size <= small_memory [(int) SMALL_MEMORY_ZDA].max)
2315 v850_set_data_area (decl, DATA_AREA_ZDA);
2316 }
2317
2318 if (v850_get_data_area (decl) == DATA_AREA_NORMAL)
2319 return;
2320 }
2321
91efe10c 2322 flags = SYMBOL_REF_FLAGS (symbol);
a821813a 2323 switch (v850_get_data_area (decl))
2324 {
91efe10c 2325 case DATA_AREA_ZDA: flags |= SYMBOL_FLAG_ZDA; break;
2326 case DATA_AREA_TDA: flags |= SYMBOL_FLAG_TDA; break;
2327 case DATA_AREA_SDA: flags |= SYMBOL_FLAG_SDA; break;
a821813a 2328 default: abort ();
2329 }
91efe10c 2330 SYMBOL_REF_FLAGS (symbol) = flags;
747fe2d1 2331}
65c7acad 2332
7811991d 2333static void
39031315 2334v850_encode_section_info (tree decl, rtx rtl, int first)
7811991d 2335{
2c129d70 2336 default_encode_section_info (decl, rtl, first);
91efe10c 2337
2338 if (TREE_CODE (decl) == VAR_DECL
7811991d 2339 && (TREE_STATIC (decl) || DECL_EXTERNAL (decl)))
2c129d70 2340 v850_encode_data_area (decl, XEXP (rtl, 0));
7811991d 2341}
2342
65c7acad 2343/* Return true if the given RTX is a register which can be restored
2344 by a function epilogue. */
2345int
39031315 2346register_is_ok_for_epilogue (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
65c7acad 2347{
5dd3389c 2348 /* The save/restore routines can only cope with registers 20 - 31. */
2349 return ((GET_CODE (op) == REG)
2350 && (((REGNO (op) >= 20) && REGNO (op) <= 31)));
65c7acad 2351}
2352
808a491c 2353/* Return nonzero if the given RTX is suitable for collapsing into
65c7acad 2354 jump to a function epilogue. */
2355int
39031315 2356pattern_is_ok_for_epilogue (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
65c7acad 2357{
2358 int count = XVECLEN (op, 0);
2359 int i;
2360
2361 /* If there are no registers to restore then the function epilogue
2362 is not suitable. */
2363 if (count <= 2)
2364 return 0;
2365
2366 /* The pattern matching has already established that we are performing a
2367 function epilogue and that we are popping at least one register. We must
2368 now check the remaining entries in the vector to make sure that they are
2369 also register pops. There is no good reason why there should ever be
2370 anything else in this vector, but being paranoid always helps...
2371
2372 The test below performs the C equivalent of this machine description
2373 pattern match:
2374
2375 (set (match_operand:SI n "register_is_ok_for_epilogue" "r")
2376 (mem:SI (plus:SI (reg:SI 3) (match_operand:SI n "immediate_operand" "i"))))
2377 */
2378
2379 for (i = 3; i < count; i++)
2380 {
2381 rtx vector_element = XVECEXP (op, 0, i);
2382 rtx dest;
2383 rtx src;
2384 rtx plus;
2385
2386 if (GET_CODE (vector_element) != SET)
2387 return 0;
2388
2389 dest = SET_DEST (vector_element);
2390 src = SET_SRC (vector_element);
2391
2392 if (GET_CODE (dest) != REG
2393 || GET_MODE (dest) != SImode
2394 || ! register_is_ok_for_epilogue (dest, SImode)
2395 || GET_CODE (src) != MEM
2396 || GET_MODE (src) != SImode)
2397 return 0;
2398
2399 plus = XEXP (src, 0);
2400
2401 if (GET_CODE (plus) != PLUS
2402 || GET_CODE (XEXP (plus, 0)) != REG
2403 || GET_MODE (XEXP (plus, 0)) != SImode
2404 || REGNO (XEXP (plus, 0)) != STACK_POINTER_REGNUM
2405 || GET_CODE (XEXP (plus, 1)) != CONST_INT)
2406 return 0;
2407 }
2408
2409 return 1;
2410}
2411
2412/* Construct a JR instruction to a routine that will perform the equivalent of
2413 the RTL passed in as an argument. This RTL is a function epilogue that
2414 pops registers off the stack and possibly releases some extra stack space
2415 as well. The code has already verified that the RTL matches these
2416 requirements. */
2417char *
39031315 2418construct_restore_jr (rtx op)
65c7acad 2419{
2420 int count = XVECLEN (op, 0);
2421 int stack_bytes;
2422 unsigned long int mask;
2423 unsigned long int first;
2424 unsigned long int last;
2425 int i;
2426 static char buff [100]; /* XXX */
2427
2428 if (count <= 2)
2429 {
68435912 2430 error ("bogus JR construction: %d\n", count);
65c7acad 2431 return NULL;
2432 }
2433
2434 /* Work out how many bytes to pop off the stack before retrieving
2435 registers. */
2436 if (GET_CODE (XVECEXP (op, 0, 1)) != SET)
2437 abort ();
2438 if (GET_CODE (SET_SRC (XVECEXP (op, 0, 1))) != PLUS)
2439 abort ();
2440 if (GET_CODE (XEXP (SET_SRC (XVECEXP (op, 0, 1)), 1)) != CONST_INT)
2441 abort ();
2442
2443 stack_bytes = INTVAL (XEXP (SET_SRC (XVECEXP (op, 0, 1)), 1));
2444
df978151 2445 /* Each pop will remove 4 bytes from the stack.... */
65c7acad 2446 stack_bytes -= (count - 2) * 4;
2447
2448 /* Make sure that the amount we are popping either 0 or 16 bytes. */
2449 if (stack_bytes != 0 && stack_bytes != 16)
2450 {
68435912 2451 error ("bad amount of stack space removal: %d", stack_bytes);
65c7acad 2452 return NULL;
2453 }
2454
2455 /* Now compute the bit mask of registers to push. */
2456 mask = 0;
2457 for (i = 2; i < count; i++)
2458 {
2459 rtx vector_element = XVECEXP (op, 0, i);
2460
2461 if (GET_CODE (vector_element) != SET)
2462 abort ();
2463 if (GET_CODE (SET_DEST (vector_element)) != REG)
2464 abort ();
2465 if (! register_is_ok_for_epilogue (SET_DEST (vector_element), SImode))
2466 abort ();
2467
2468 mask |= 1 << REGNO (SET_DEST (vector_element));
2469 }
2470
2471 /* Scan for the first register to pop. */
2472 for (first = 0; first < 32; first++)
2473 {
2474 if (mask & (1 << first))
2475 break;
2476 }
2477
2478 if (first >= 32)
2479 abort ();
2480
2481 /* Discover the last register to pop. */
26845ab8 2482 if (mask & (1 << LINK_POINTER_REGNUM))
65c7acad 2483 {
2484 if (stack_bytes != 16)
2485 abort ();
2486
26845ab8 2487 last = LINK_POINTER_REGNUM;
65c7acad 2488 }
2489 else
2490 {
2491 if (stack_bytes != 0)
2492 abort ();
26845ab8 2493
65c7acad 2494 if ((mask & (1 << 29)) == 0)
2495 abort ();
2496
2497 last = 29;
2498 }
2499
a59e9a3a 2500 /* Note, it is possible to have gaps in the register mask.
2501 We ignore this here, and generate a JR anyway. We will
a821813a 2502 be popping more registers than is strictly necessary, but
a59e9a3a 2503 it does save code space. */
2504
79d5927f 2505 if (TARGET_LONG_CALLS)
2506 {
2507 char name[40];
2508
2509 if (first == last)
2510 sprintf (name, "__return_%s", reg_names [first]);
2511 else
2512 sprintf (name, "__return_%s_%s", reg_names [first], reg_names [last]);
2513
2514 sprintf (buff, "movhi hi(%s), r0, r6\n\tmovea lo(%s), r6, r6\n\tjmp r6",
2515 name, name);
2516 }
65c7acad 2517 else
79d5927f 2518 {
2519 if (first == last)
2520 sprintf (buff, "jr __return_%s", reg_names [first]);
2521 else
2522 sprintf (buff, "jr __return_%s_%s", reg_names [first], reg_names [last]);
2523 }
2524
65c7acad 2525 return buff;
2526}
2527
2528
808a491c 2529/* Return nonzero if the given RTX is suitable for collapsing into
65c7acad 2530 a jump to a function prologue. */
2531int
39031315 2532pattern_is_ok_for_prologue (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
65c7acad 2533{
2534 int count = XVECLEN (op, 0);
2535 int i;
2536 rtx vector_element;
2537
2538 /* If there are no registers to save then the function prologue
2539 is not suitable. */
2540 if (count <= 2)
2541 return 0;
2542
2543 /* The pattern matching has already established that we are adjusting the
2544 stack and pushing at least one register. We must now check that the
2545 remaining entries in the vector to make sure that they are also register
2546 pushes, except for the last entry which should be a CLOBBER of r10.
2547
2548 The test below performs the C equivalent of this machine description
2549 pattern match:
2550
2551 (set (mem:SI (plus:SI (reg:SI 3)
2552 (match_operand:SI 2 "immediate_operand" "i")))
2553 (match_operand:SI 3 "register_is_ok_for_epilogue" "r"))
2554
2555 */
2556
a184c07b 2557 for (i = 2; i < count - (TARGET_LONG_CALLS ? 2: 1); i++)
65c7acad 2558 {
2559 rtx dest;
2560 rtx src;
2561 rtx plus;
2562
2563 vector_element = XVECEXP (op, 0, i);
2564
2565 if (GET_CODE (vector_element) != SET)
2566 return 0;
2567
2568 dest = SET_DEST (vector_element);
2569 src = SET_SRC (vector_element);
2570
2571 if (GET_CODE (dest) != MEM
2572 || GET_MODE (dest) != SImode
2573 || GET_CODE (src) != REG
2574 || GET_MODE (src) != SImode
2575 || ! register_is_ok_for_epilogue (src, SImode))
2576 return 0;
2577
2578 plus = XEXP (dest, 0);
2579
2580 if ( GET_CODE (plus) != PLUS
2581 || GET_CODE (XEXP (plus, 0)) != REG
2582 || GET_MODE (XEXP (plus, 0)) != SImode
2583 || REGNO (XEXP (plus, 0)) != STACK_POINTER_REGNUM
2584 || GET_CODE (XEXP (plus, 1)) != CONST_INT)
2585 return 0;
2586
2587 /* If the register is being pushed somewhere other than the stack
ad87de1e 2588 space just acquired by the first operand then abandon this quest.
2589 Note: the test is <= because both values are negative. */
65c7acad 2590 if (INTVAL (XEXP (plus, 1))
2591 <= INTVAL (XEXP (SET_SRC (XVECEXP (op, 0, 0)), 1)))
2592 {
2593 return 0;
2594 }
2595 }
2596
a184c07b 2597 /* Make sure that the last entries in the vector are clobbers. */
2598 for (; i < count; i++)
2599 {
2600 vector_element = XVECEXP (op, 0, i);
2601
2602 if (GET_CODE (vector_element) != CLOBBER
2603 || GET_CODE (XEXP (vector_element, 0)) != REG
2604 || !(REGNO (XEXP (vector_element, 0)) == 10
2605 || (TARGET_LONG_CALLS ? (REGNO (XEXP (vector_element, 0)) == 11) : 0 )))
2606 return 0;
2607 }
2608
65c7acad 2609 return 1;
2610}
2611
2612/* Construct a JARL instruction to a routine that will perform the equivalent
2613 of the RTL passed as a parameter. This RTL is a function prologue that
2614 saves some of the registers r20 - r31 onto the stack, and possibly acquires
2615 some stack space as well. The code has already verified that the RTL
2616 matches these requirements. */
2617char *
39031315 2618construct_save_jarl (rtx op)
65c7acad 2619{
2620 int count = XVECLEN (op, 0);
2621 int stack_bytes;
2622 unsigned long int mask;
2623 unsigned long int first;
2624 unsigned long int last;
2625 int i;
2626 static char buff [100]; /* XXX */
2627
2628 if (count <= 2)
2629 {
68435912 2630 error ("bogus JARL construction: %d\n", count);
65c7acad 2631 return NULL;
2632 }
2633
2634 /* Paranoia. */
2635 if (GET_CODE (XVECEXP (op, 0, 0)) != SET)
2636 abort ();
2637 if (GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != PLUS)
2638 abort ();
2639 if (GET_CODE (XEXP (SET_SRC (XVECEXP (op, 0, 0)), 0)) != REG)
2640 abort ();
2641 if (GET_CODE (XEXP (SET_SRC (XVECEXP (op, 0, 0)), 1)) != CONST_INT)
2642 abort ();
2643
2644 /* Work out how many bytes to push onto the stack after storing the
2645 registers. */
2646 stack_bytes = INTVAL (XEXP (SET_SRC (XVECEXP (op, 0, 0)), 1));
2647
df978151 2648 /* Each push will put 4 bytes from the stack.... */
a184c07b 2649 stack_bytes += (count - (TARGET_LONG_CALLS ? 3 : 2)) * 4;
65c7acad 2650
2651 /* Make sure that the amount we are popping either 0 or 16 bytes. */
2652 if (stack_bytes != 0 && stack_bytes != -16)
2653 {
68435912 2654 error ("bad amount of stack space removal: %d", stack_bytes);
65c7acad 2655 return NULL;
2656 }
2657
2658 /* Now compute the bit mask of registers to push. */
2659 mask = 0;
a184c07b 2660 for (i = 1; i < count - (TARGET_LONG_CALLS ? 2 : 1); i++)
65c7acad 2661 {
2662 rtx vector_element = XVECEXP (op, 0, i);
2663
2664 if (GET_CODE (vector_element) != SET)
2665 abort ();
2666 if (GET_CODE (SET_SRC (vector_element)) != REG)
2667 abort ();
2668 if (! register_is_ok_for_epilogue (SET_SRC (vector_element), SImode))
2669 abort ();
2670
2671 mask |= 1 << REGNO (SET_SRC (vector_element));
2672 }
2673
2674 /* Scan for the first register to push. */
2675 for (first = 0; first < 32; first++)
2676 {
2677 if (mask & (1 << first))
2678 break;
2679 }
2680
2681 if (first >= 32)
2682 abort ();
2683
2684 /* Discover the last register to push. */
26845ab8 2685 if (mask & (1 << LINK_POINTER_REGNUM))
65c7acad 2686 {
2687 if (stack_bytes != -16)
a59e9a3a 2688 abort ();
65c7acad 2689
26845ab8 2690 last = LINK_POINTER_REGNUM;
65c7acad 2691 }
2692 else
2693 {
2694 if (stack_bytes != 0)
2695 abort ();
2696 if ((mask & (1 << 29)) == 0)
2697 abort ();
2698
2699 last = 29;
2700 }
2701
a59e9a3a 2702 /* Note, it is possible to have gaps in the register mask.
2703 We ignore this here, and generate a JARL anyway. We will
a821813a 2704 be pushing more registers than is strictly necessary, but
a59e9a3a 2705 it does save code space. */
2706
79d5927f 2707 if (TARGET_LONG_CALLS)
2708 {
2709 char name[40];
2710
2711 if (first == last)
2712 sprintf (name, "__save_%s", reg_names [first]);
2713 else
2714 sprintf (name, "__save_%s_%s", reg_names [first], reg_names [last]);
2715
2716 sprintf (buff, "movhi hi(%s), r0, r11\n\tmovea lo(%s), r11, r11\n\tjarl .+4, r10\n\tadd 4, r10\n\tjmp r11",
2717 name, name);
2718 }
65c7acad 2719 else
79d5927f 2720 {
2721 if (first == last)
2722 sprintf (buff, "jarl __save_%s, r10", reg_names [first]);
2723 else
2724 sprintf (buff, "jarl __save_%s_%s, r10", reg_names [first],
2725 reg_names [last]);
2726 }
65c7acad 2727
2728 return buff;
2729}
2730
a821813a 2731extern tree last_assemble_variable_decl;
2732extern int size_directive_output;
2733
2734/* A version of asm_output_aligned_bss() that copes with the special
df978151 2735 data areas of the v850. */
a821813a 2736void
39031315 2737v850_output_aligned_bss (FILE * file,
2738 tree decl,
2739 const char * name,
2740 int size,
2741 int align)
a821813a 2742{
a821813a 2743 switch (v850_get_data_area (decl))
2744 {
2745 case DATA_AREA_ZDA:
2746 zbss_section ();
2747 break;
2748
2749 case DATA_AREA_SDA:
2750 sbss_section ();
2751 break;
2752
2753 case DATA_AREA_TDA:
2754 tdata_section ();
2755
2756 default:
2757 bss_section ();
2758 break;
2759 }
2760
2761 ASM_OUTPUT_ALIGN (file, floor_log2 (align / BITS_PER_UNIT));
2762#ifdef ASM_DECLARE_OBJECT_NAME
2763 last_assemble_variable_decl = decl;
2764 ASM_DECLARE_OBJECT_NAME (file, name, decl);
2765#else
2766 /* Standard thing is just output label for the object. */
2767 ASM_OUTPUT_LABEL (file, name);
2768#endif /* ASM_DECLARE_OBJECT_NAME */
2769 ASM_OUTPUT_SKIP (file, size ? size : 1);
2770}
2771
2772/* Called via the macro ASM_OUTPUT_DECL_COMMON */
2773void
39031315 2774v850_output_common (FILE * file,
2775 tree decl,
2776 const char * name,
2777 int size,
2778 int align)
a821813a 2779{
2780 if (decl == NULL_TREE)
2781 {
0068dfb2 2782 fprintf (file, "%s", COMMON_ASM_OP);
a821813a 2783 }
2784 else
2785 {
2786 switch (v850_get_data_area (decl))
2787 {
2788 case DATA_AREA_ZDA:
0068dfb2 2789 fprintf (file, "%s", ZCOMMON_ASM_OP);
a821813a 2790 break;
2791
2792 case DATA_AREA_SDA:
0068dfb2 2793 fprintf (file, "%s", SCOMMON_ASM_OP);
a821813a 2794 break;
2795
2796 case DATA_AREA_TDA:
0068dfb2 2797 fprintf (file, "%s", TCOMMON_ASM_OP);
a821813a 2798 break;
2799
2800 default:
0068dfb2 2801 fprintf (file, "%s", COMMON_ASM_OP);
a821813a 2802 break;
2803 }
2804 }
2805
2806 assemble_name (file, name);
2807 fprintf (file, ",%u,%u\n", size, align / BITS_PER_UNIT);
2808}
2809
2810/* Called via the macro ASM_OUTPUT_DECL_LOCAL */
2811void
39031315 2812v850_output_local (FILE * file,
2813 tree decl,
2814 const char * name,
2815 int size,
2816 int align)
a821813a 2817{
0068dfb2 2818 fprintf (file, "%s", LOCAL_ASM_OP);
a821813a 2819 assemble_name (file, name);
2820 fprintf (file, "\n");
2821
2822 ASM_OUTPUT_ALIGNED_DECL_COMMON (file, decl, name, size, align);
2823}
a821813a 2824
2825/* Add data area to the given declaration if a ghs data area pragma is
2826 currently in effect (#pragma ghs startXXX/endXXX). */
8ee295a7 2827static void
39031315 2828v850_insert_attributes (tree decl, tree * attr_ptr ATTRIBUTE_UNUSED )
a821813a 2829{
2830 if (data_area_stack
2831 && data_area_stack->data_area
2832 && current_function_decl == NULL_TREE
2833 && (TREE_CODE (decl) == VAR_DECL || TREE_CODE (decl) == CONST_DECL)
2834 && v850_get_data_area (decl) == DATA_AREA_NORMAL)
2835 v850_set_data_area (decl, data_area_stack->data_area);
2836
457275b6 2837 /* Initialize the default names of the v850 specific sections,
a821813a 2838 if this has not been done before. */
2839
2840 if (GHS_default_section_names [(int) GHS_SECTION_KIND_SDATA] == NULL)
2841 {
2842 GHS_default_section_names [(int) GHS_SECTION_KIND_SDATA]
2843 = build_string (sizeof (".sdata")-1, ".sdata");
2844
2845 GHS_default_section_names [(int) GHS_SECTION_KIND_ROSDATA]
2846 = build_string (sizeof (".rosdata")-1, ".rosdata");
2847
2848 GHS_default_section_names [(int) GHS_SECTION_KIND_TDATA]
2849 = build_string (sizeof (".tdata")-1, ".tdata");
2850
2851 GHS_default_section_names [(int) GHS_SECTION_KIND_ZDATA]
2852 = build_string (sizeof (".zdata")-1, ".zdata");
2853
2854 GHS_default_section_names [(int) GHS_SECTION_KIND_ROZDATA]
2855 = build_string (sizeof (".rozdata")-1, ".rozdata");
2856 }
2857
2858 if (current_function_decl == NULL_TREE
2859 && (TREE_CODE (decl) == VAR_DECL
2860 || TREE_CODE (decl) == CONST_DECL
2861 || TREE_CODE (decl) == FUNCTION_DECL)
2862 && (!DECL_EXTERNAL (decl) || DECL_INITIAL (decl))
2863 && !DECL_SECTION_NAME (decl))
2864 {
2865 enum GHS_section_kind kind = GHS_SECTION_KIND_DEFAULT;
2866 tree chosen_section;
2867
2868 if (TREE_CODE (decl) == FUNCTION_DECL)
2869 kind = GHS_SECTION_KIND_TEXT;
2870 else
2871 {
df978151 2872 /* First choose a section kind based on the data area of the decl. */
a821813a 2873 switch (v850_get_data_area (decl))
2874 {
2875 default:
2876 abort ();
2877
2878 case DATA_AREA_SDA:
2879 kind = ((TREE_READONLY (decl))
2880 ? GHS_SECTION_KIND_ROSDATA
2881 : GHS_SECTION_KIND_SDATA);
2882 break;
2883
2884 case DATA_AREA_TDA:
2885 kind = GHS_SECTION_KIND_TDATA;
2886 break;
2887
2888 case DATA_AREA_ZDA:
2889 kind = ((TREE_READONLY (decl))
2890 ? GHS_SECTION_KIND_ROZDATA
2891 : GHS_SECTION_KIND_ZDATA);
2892 break;
2893
2894 case DATA_AREA_NORMAL: /* default data area */
2895 if (TREE_READONLY (decl))
2896 kind = GHS_SECTION_KIND_RODATA;
2897 else if (DECL_INITIAL (decl))
2898 kind = GHS_SECTION_KIND_DATA;
2899 else
2900 kind = GHS_SECTION_KIND_BSS;
2901 }
2902 }
2903
2904 /* Now, if the section kind has been explicitly renamed,
df978151 2905 then attach a section attribute. */
a821813a 2906 chosen_section = GHS_current_section_names [(int) kind];
2907
2908 /* Otherwise, if this kind of section needs an explicit section
df978151 2909 attribute, then also attach one. */
a821813a 2910 if (chosen_section == NULL)
2911 chosen_section = GHS_default_section_names [(int) kind];
2912
2913 if (chosen_section)
2914 {
2915 /* Only set the section name if specified by a pragma, because
2916 otherwise it will force those variables to get allocated storage
2917 in this module, rather than by the linker. */
2918 DECL_SECTION_NAME (decl) = chosen_section;
2919 }
2920 }
2921}
5dd3389c 2922
808a491c 2923/* Return nonzero if the given RTX is suitable
5dd3389c 2924 for collapsing into a DISPOSE instruction. */
2925
2926int
39031315 2927pattern_is_ok_for_dispose (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
5dd3389c 2928{
2929 int count = XVECLEN (op, 0);
2930 int i;
2931
2932 /* If there are no registers to restore then
2933 the dispose instruction is not suitable. */
2934 if (count <= 2)
2935 return 0;
2936
2937 /* The pattern matching has already established that we are performing a
2938 function epilogue and that we are popping at least one register. We must
2939 now check the remaining entries in the vector to make sure that they are
2940 also register pops. There is no good reason why there should ever be
2941 anything else in this vector, but being paranoid always helps...
2942
2943 The test below performs the C equivalent of this machine description
2944 pattern match:
2945
2946 (set (match_operand:SI n "register_is_ok_for_epilogue" "r")
2947 (mem:SI (plus:SI (reg:SI 3)
2948 (match_operand:SI n "immediate_operand" "i"))))
2949 */
2950
2951 for (i = 3; i < count; i++)
2952 {
2953 rtx vector_element = XVECEXP (op, 0, i);
2954 rtx dest;
2955 rtx src;
2956 rtx plus;
2957
2958 if (GET_CODE (vector_element) != SET)
2959 return 0;
2960
2961 dest = SET_DEST (vector_element);
2962 src = SET_SRC (vector_element);
2963
2964 if ( GET_CODE (dest) != REG
2965 || GET_MODE (dest) != SImode
2966 || ! register_is_ok_for_epilogue (dest, SImode)
2967 || GET_CODE (src) != MEM
2968 || GET_MODE (src) != SImode)
2969 return 0;
2970
2971 plus = XEXP (src, 0);
2972
2973 if ( GET_CODE (plus) != PLUS
2974 || GET_CODE (XEXP (plus, 0)) != REG
2975 || GET_MODE (XEXP (plus, 0)) != SImode
2976 || REGNO (XEXP (plus, 0)) != STACK_POINTER_REGNUM
2977 || GET_CODE (XEXP (plus, 1)) != CONST_INT)
2978 return 0;
2979 }
2980
2981 return 1;
2982}
2983
2984/* Construct a DISPOSE instruction that is the equivalent of
2985 the given RTX. We have already verified that this should
2986 be possible. */
2987
2988char *
39031315 2989construct_dispose_instruction (rtx op)
5dd3389c 2990{
2991 int count = XVECLEN (op, 0);
2992 int stack_bytes;
2993 unsigned long int mask;
2994 int i;
2995 static char buff[ 100 ]; /* XXX */
2996 int use_callt = 0;
2997
2998 if (count <= 2)
2999 {
3000 error ("Bogus DISPOSE construction: %d\n", count);
3001 return NULL;
3002 }
3003
3004 /* Work out how many bytes to pop off the
3005 stack before retrieving registers. */
3006 if (GET_CODE (XVECEXP (op, 0, 1)) != SET)
3007 abort ();
3008 if (GET_CODE (SET_SRC (XVECEXP (op, 0, 1))) != PLUS)
3009 abort ();
3010 if (GET_CODE (XEXP (SET_SRC (XVECEXP (op, 0, 1)), 1)) != CONST_INT)
3011 abort ();
3012
3013 stack_bytes = INTVAL (XEXP (SET_SRC (XVECEXP (op, 0, 1)), 1));
3014
df978151 3015 /* Each pop will remove 4 bytes from the stack.... */
5dd3389c 3016 stack_bytes -= (count - 2) * 4;
3017
3018 /* Make sure that the amount we are popping
3019 will fit into the DISPOSE instruction. */
3020 if (stack_bytes > 128)
3021 {
3022 error ("Too much stack space to dispose of: %d", stack_bytes);
3023 return NULL;
3024 }
3025
3026 /* Now compute the bit mask of registers to push. */
3027 mask = 0;
3028
3029 for (i = 2; i < count; i++)
3030 {
3031 rtx vector_element = XVECEXP (op, 0, i);
3032
3033 if (GET_CODE (vector_element) != SET)
3034 abort ();
3035 if (GET_CODE (SET_DEST (vector_element)) != REG)
3036 abort ();
3037 if (! register_is_ok_for_epilogue (SET_DEST (vector_element), SImode))
3038 abort ();
3039
3040 if (REGNO (SET_DEST (vector_element)) == 2)
3041 use_callt = 1;
3042 else
3043 mask |= 1 << REGNO (SET_DEST (vector_element));
3044 }
3045
3046 if (! TARGET_DISABLE_CALLT
3047 && (use_callt || stack_bytes == 0 || stack_bytes == 16))
3048 {
3049 if (use_callt)
3050 {
3051 sprintf (buff, "callt ctoff(__callt_return_r2_r%d)", (mask & (1 << 31)) ? 31 : 29);
3052 return buff;
3053 }
3054 else
3055 {
3056 for (i = 20; i < 32; i++)
3057 if (mask & (1 << i))
3058 break;
3059
3060 if (i == 31)
3061 sprintf (buff, "callt ctoff(__callt_return_r31c)");
3062 else
3063 sprintf (buff, "callt ctoff(__callt_return_r%d_r%d%s)",
3064 i, (mask & (1 << 31)) ? 31 : 29, stack_bytes ? "c" : "");
3065 }
3066 }
3067 else
3068 {
3069 static char regs [100]; /* XXX */
3070 int done_one;
3071
3072 /* Generate the DISPOSE instruction. Note we could just issue the
3073 bit mask as a number as the assembler can cope with this, but for
3074 the sake of our readers we turn it into a textual description. */
3075 regs[0] = 0;
3076 done_one = 0;
3077
3078 for (i = 20; i < 32; i++)
3079 {
3080 if (mask & (1 << i))
3081 {
3082 int first;
3083
3084 if (done_one)
3085 strcat (regs, ", ");
3086 else
3087 done_one = 1;
3088
3089 first = i;
3090 strcat (regs, reg_names[ first ]);
3091
3092 for (i++; i < 32; i++)
3093 if ((mask & (1 << i)) == 0)
3094 break;
3095
3096 if (i > first + 1)
3097 {
3098 strcat (regs, " - ");
3099 strcat (regs, reg_names[ i - 1 ] );
3100 }
3101 }
3102 }
3103
3104 sprintf (buff, "dispose %d {%s}, r31", stack_bytes / 4, regs);
3105 }
3106
3107 return buff;
3108}
3109
808a491c 3110/* Return nonzero if the given RTX is suitable
5dd3389c 3111 for collapsing into a PREPARE instruction. */
3112
3113int
39031315 3114pattern_is_ok_for_prepare (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
5dd3389c 3115{
3116 int count = XVECLEN (op, 0);
3117 int i;
3118
3119 /* If there are no registers to restore then the prepare instruction
3120 is not suitable. */
3121 if (count <= 1)
3122 return 0;
3123
3124 /* The pattern matching has already established that we are adjusting the
3125 stack and pushing at least one register. We must now check that the
3126 remaining entries in the vector to make sure that they are also register
3127 pushes.
3128
3129 The test below performs the C equivalent of this machine description
3130 pattern match:
3131
3132 (set (mem:SI (plus:SI (reg:SI 3)
3133 (match_operand:SI 2 "immediate_operand" "i")))
3134 (match_operand:SI 3 "register_is_ok_for_epilogue" "r"))
3135
3136 */
3137
3138 for (i = 2; i < count; i++)
3139 {
3140 rtx vector_element = XVECEXP (op, 0, i);
3141 rtx dest;
3142 rtx src;
3143 rtx plus;
3144
3145 if (GET_CODE (vector_element) != SET)
3146 return 0;
3147
3148 dest = SET_DEST (vector_element);
3149 src = SET_SRC (vector_element);
3150
3151 if ( GET_CODE (dest) != MEM
3152 || GET_MODE (dest) != SImode
3153 || GET_CODE (src) != REG
3154 || GET_MODE (src) != SImode
3155 || ! register_is_ok_for_epilogue (src, SImode)
3156 )
3157 return 0;
3158
3159 plus = XEXP (dest, 0);
3160
3161 if ( GET_CODE (plus) != PLUS
3162 || GET_CODE (XEXP (plus, 0)) != REG
3163 || GET_MODE (XEXP (plus, 0)) != SImode
3164 || REGNO (XEXP (plus, 0)) != STACK_POINTER_REGNUM
3165 || GET_CODE (XEXP (plus, 1)) != CONST_INT)
3166 return 0;
3167
3168 /* If the register is being pushed somewhere other than the stack
efee20da 3169 space just acquired by the first operand then abandon this quest.
3170 Note: the test is <= because both values are negative. */
5dd3389c 3171 if (INTVAL (XEXP (plus, 1))
3172 <= INTVAL (XEXP (SET_SRC (XVECEXP (op, 0, 0)), 1)))
3173 return 0;
3174 }
3175
3176 return 1;
3177}
3178
3179/* Construct a PREPARE instruction that is the equivalent of
3180 the given RTL. We have already verified that this should
3181 be possible. */
3182
3183char *
39031315 3184construct_prepare_instruction (rtx op)
5dd3389c 3185{
3186 int count = XVECLEN (op, 0);
3187 int stack_bytes;
3188 unsigned long int mask;
3189 int i;
3190 static char buff[ 100 ]; /* XXX */
3191 int use_callt = 0;
3192
3193 if (count <= 1)
3194 {
3195 error ("Bogus PREPEARE construction: %d\n", count);
3196 return NULL;
3197 }
3198
3199 /* Work out how many bytes to push onto
3200 the stack after storing the registers. */
3201 if (GET_CODE (XVECEXP (op, 0, 0)) != SET)
3202 abort ();
3203 if (GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != PLUS)
3204 abort ();
3205 if (GET_CODE (XEXP (SET_SRC (XVECEXP (op, 0, 0)), 1)) != CONST_INT)
3206 abort ();
3207
3208 stack_bytes = INTVAL (XEXP (SET_SRC (XVECEXP (op, 0, 0)), 1));
3209
3210 /* Each push will put 4 bytes from the stack. */
3211 stack_bytes += (count - 1) * 4;
3212
3213 /* Make sure that the amount we are popping
3214 will fit into the DISPOSE instruction. */
3215 if (stack_bytes < -128)
3216 {
3217 error ("Too much stack space to prepare: %d", stack_bytes);
3218 return NULL;
3219 }
3220
3221 /* Now compute the bit mask of registers to push. */
3222 mask = 0;
3223 for (i = 1; i < count; i++)
3224 {
3225 rtx vector_element = XVECEXP (op, 0, i);
3226
3227 if (GET_CODE (vector_element) != SET)
3228 abort ();
3229 if (GET_CODE (SET_SRC (vector_element)) != REG)
3230 abort ();
3231 if (! register_is_ok_for_epilogue (SET_SRC (vector_element), SImode))
3232 abort ();
3233
3234 if (REGNO (SET_SRC (vector_element)) == 2)
3235 use_callt = 1;
3236 else
3237 mask |= 1 << REGNO (SET_SRC (vector_element));
3238 }
3239
3240 if ((! TARGET_DISABLE_CALLT)
3241 && (use_callt || stack_bytes == 0 || stack_bytes == -16))
3242 {
3243 if (use_callt)
3244 {
3245 sprintf (buff, "callt ctoff(__callt_save_r2_r%d)", (mask & (1 << 31)) ? 31 : 29 );
3246 return buff;
3247 }
3248
3249 for (i = 20; i < 32; i++)
3250 if (mask & (1 << i))
3251 break;
3252
3253 if (i == 31)
3254 sprintf (buff, "callt ctoff(__callt_save_r31c)");
3255 else
3256 sprintf (buff, "callt ctoff(__callt_save_r%d_r%d%s)",
3257 i, (mask & (1 << 31)) ? 31 : 29, stack_bytes ? "c" : "");
3258 }
3259 else
3260 {
3261 static char regs [100]; /* XXX */
3262 int done_one;
3263
3264
3265 /* Generate the PREPARE instruction. Note we could just issue the
3266 bit mask as a number as the assembler can cope with this, but for
3267 the sake of our readers we turn it into a textual description. */
3268 regs[0] = 0;
3269 done_one = 0;
3270
3271 for (i = 20; i < 32; i++)
3272 {
3273 if (mask & (1 << i))
3274 {
3275 int first;
3276
3277 if (done_one)
3278 strcat (regs, ", ");
3279 else
3280 done_one = 1;
3281
3282 first = i;
3283 strcat (regs, reg_names[ first ]);
3284
3285 for (i++; i < 32; i++)
3286 if ((mask & (1 << i)) == 0)
3287 break;
3288
3289 if (i > first + 1)
3290 {
3291 strcat (regs, " - ");
3292 strcat (regs, reg_names[ i - 1 ] );
3293 }
3294 }
3295 }
3296
3297 sprintf (buff, "prepare {%s}, %d", regs, (- stack_bytes) / 4);
3298 }
3299
3300 return buff;
3301}
0339ec1d 3302\f
3303/* Implement `va_arg'. */
3304
3305rtx
39031315 3306v850_va_arg (tree valist, tree type)
0339ec1d 3307{
9878c564 3308 HOST_WIDE_INT size, rsize;
0339ec1d 3309 tree addr, incr;
3310 rtx addr_rtx;
3311 int indirect;
3312
3313 /* Round up sizeof(type) to a word. */
3314 size = int_size_in_bytes (type);
3315 rsize = (size + UNITS_PER_WORD - 1) & -UNITS_PER_WORD;
3316 indirect = 0;
3317
3318 if (size > 8)
3319 {
3320 size = rsize = UNITS_PER_WORD;
3321 indirect = 1;
3322 }
3323
3324 addr = save_expr (valist);
f644b796 3325 incr = fold (build (PLUS_EXPR, ptr_type_node, addr,
0339ec1d 3326 build_int_2 (rsize, 0)));
3327
3328 incr = build (MODIFY_EXPR, ptr_type_node, valist, incr);
3329 TREE_SIDE_EFFECTS (incr) = 1;
3330 expand_expr (incr, const0_rtx, VOIDmode, EXPAND_NORMAL);
3331
3332 addr_rtx = expand_expr (addr, NULL, Pmode, EXPAND_NORMAL);
3333
3334 if (indirect)
3335 {
3336 addr_rtx = force_reg (Pmode, addr_rtx);
3337 addr_rtx = gen_rtx_MEM (Pmode, addr_rtx);
ab6ab77e 3338 set_mem_alias_set (addr_rtx, get_varargs_alias_set ());
0339ec1d 3339 }
3340
3341 return addr_rtx;
3342}
3756cb89 3343\f
3756cb89 3344/* Return an RTX indicating where the return address to the
3345 calling function can be found. */
3346
3347rtx
39031315 3348v850_return_addr (int count)
3756cb89 3349{
3350 if (count != 0)
3351 return const0_rtx;
3352
01d08833 3353 return get_hard_reg_initial_val (Pmode, LINK_POINTER_REGNUM);
3756cb89 3354}
52470889 3355\f
3356static void
39031315 3357v850_select_section (tree exp,
3358 int reloc ATTRIBUTE_UNUSED,
3359 unsigned HOST_WIDE_INT align ATTRIBUTE_UNUSED)
52470889 3360{
3361 if (TREE_CODE (exp) == VAR_DECL)
3362 {
3363 int is_const;
3364 if (!TREE_READONLY (exp)
3365 || TREE_SIDE_EFFECTS (exp)
3366 || !DECL_INITIAL (exp)
3367 || (DECL_INITIAL (exp) != error_mark_node
3368 && !TREE_CONSTANT (DECL_INITIAL (exp))))
3369 is_const = FALSE;
3370 else
3371 is_const = TRUE;
3372
3373 switch (v850_get_data_area (exp))
3374 {
3375 case DATA_AREA_ZDA:
3376 if (is_const)
3377 rozdata_section ();
3378 else
3379 zdata_section ();
3380 break;
3381
3382 case DATA_AREA_TDA:
3383 tdata_section ();
3384 break;
3385
3386 case DATA_AREA_SDA:
3387 if (is_const)
3388 rosdata_section ();
3389 else
3390 sdata_section ();
3391 break;
3392
3393 default:
3394 if (is_const)
6cde52a2 3395 readonly_data_section ();
52470889 3396 else
3397 data_section ();
3398 break;
3399 }
3400 }
52470889 3401 else
6cde52a2 3402 readonly_data_section ();
52470889 3403}
6aa67e60 3404\f
3405/* Worker function for TARGET_RETURN_IN_MEMORY. */
3406
3407static bool
3408v850_return_in_memory (tree type, tree fntype ATTRIBUTE_UNUSED)
3409{
3410 /* Return values > 8 bytes in length in memory. */
3411 return int_size_in_bytes (type) > 8 || TYPE_MODE (type) == BLKmode;
3412}
3413\f
3414/* Worker function for TARGET_SETUP_INCOMING_VARARGS. */
3415
3416static void
3417v850_setup_incoming_varargs (CUMULATIVE_ARGS *ca,
3418 enum machine_mode mode ATTRIBUTE_UNUSED,
3419 tree type ATTRIBUTE_UNUSED,
3420 int *pretend_arg_size ATTRIBUTE_UNUSED,
3421 int second_time ATTRIBUTE_UNUSED)
3422{
3423 ca->anonymous_args = (!TARGET_GHS ? 1 : 0);
3424}
Mirror of https://gcc.gnu.org/git/gcc.git