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ae180d84 1/* Subroutines for insn-output.c for NEC V850 series
d1e082c2 2 Copyright (C) 1996-2013 Free Software Foundation, Inc.
ae180d84
JL
3 Contributed by Jeff Law (law@cygnus.com).
4
301ee2f3 5 This file is part of GCC.
ae180d84 6
301ee2f3 7 GCC is free software; you can redistribute it and/or modify it
8376061d 8 under the terms of the GNU General Public License as published by
2f83c7d6 9 the Free Software Foundation; either version 3, or (at your option)
8376061d 10 any later version.
ae180d84 11
301ee2f3 12 GCC is distributed in the hope that it will be useful, but WITHOUT
8376061d
CM
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 for more details.
ae180d84 16
8376061d 17 You should have received a copy of the GNU General Public License
2f83c7d6
NC
18 along with GCC; see the file COPYING3. If not see
19 <http://www.gnu.org/licenses/>. */
ae180d84 20
ab87f8c8 21#include "config.h"
c5c76735 22#include "system.h"
4977bab6
ZW
23#include "coretypes.h"
24#include "tm.h"
3ce15347 25#include "tree.h"
d8a2d370
DN
26#include "stringpool.h"
27#include "stor-layout.h"
28#include "varasm.h"
29#include "calls.h"
ae180d84
JL
30#include "rtl.h"
31#include "regs.h"
32#include "hard-reg-set.h"
ae180d84
JL
33#include "insn-config.h"
34#include "conditions.h"
ae180d84
JL
35#include "output.h"
36#include "insn-attr.h"
37#include "flags.h"
38#include "recog.h"
39#include "expr.h"
bf6bb899 40#include "function.h"
718f9c0f 41#include "diagnostic-core.h"
c3edd394 42#include "ggc.h"
8b97c5f8 43#include "tm_p.h"
672a6f42
NB
44#include "target.h"
45#include "target-def.h"
90745823 46#include "df.h"
96e45421 47#include "opts.h"
3ce15347
NC
48
49#ifndef streq
50#define streq(a,b) (strcmp (a, b) == 0)
51#endif
52
11d259f0 53static void v850_print_operand_address (FILE *, rtx);
ae180d84 54
c3edd394
NC
55/* Names of the various data areas used on the v850. */
56tree GHS_default_section_names [(int) COUNT_OF_GHS_SECTION_KINDS];
57tree GHS_current_section_names [(int) COUNT_OF_GHS_SECTION_KINDS];
58
59/* Track the current data area set by the data area pragma (which
60 can be nested). Tested by check_default_data_area. */
61data_area_stack_element * data_area_stack = NULL;
62
ae180d84 63/* True if we don't need to check any more if the current
c3edd394 64 function is an interrupt handler. */
ae180d84
JL
65static int v850_interrupt_cache_p = FALSE;
66
223a9d64
N
67rtx v850_compare_op0, v850_compare_op1;
68
ae180d84
JL
69/* Whether current function is an interrupt handler. */
70static int v850_interrupt_p = FALSE;
d6b5193b 71
122603fa
N
72static GTY(()) section * rosdata_section;
73static GTY(()) section * rozdata_section;
74static GTY(()) section * tdata_section;
75static GTY(()) section * zdata_section;
76static GTY(()) section * zbss_section;
ae180d84 77\f
b84d824d
NC
78/* We use this to wrap all emitted insns in the prologue. */
79static rtx
80F (rtx x)
81{
82 if (GET_CODE (x) != CLOBBER)
83 RTX_FRAME_RELATED_P (x) = 1;
84 return x;
85}
86
87/* Mark all the subexpressions of the PARALLEL rtx PAR as
88 frame-related. Return PAR.
89
90 dwarf2out.c:dwarf2out_frame_debug_expr ignores sub-expressions of a
91 PARALLEL rtx other than the first if they do not have the
92 FRAME_RELATED flag set on them. */
93
94static rtx
95v850_all_frame_related (rtx par)
96{
97 int len = XVECLEN (par, 0);
98 int i;
99
100 gcc_assert (GET_CODE (par) == PARALLEL);
101 for (i = 0; i < len; i++)
102 F (XVECEXP (par, 0, i));
103
104 return par;
105}
106
223a9d64
N
107/* Handle the TARGET_PASS_BY_REFERENCE target hook.
108 Specify whether to pass the argument by reference. */
109
8cd5a4e0 110static bool
d5cc9181 111v850_pass_by_reference (cumulative_args_t cum ATTRIBUTE_UNUSED,
586de218 112 enum machine_mode mode, const_tree type,
8cd5a4e0
RH
113 bool named ATTRIBUTE_UNUSED)
114{
115 unsigned HOST_WIDE_INT size;
116
b84d824d
NC
117 if (!TARGET_GCC_ABI)
118 return 0;
119
8cd5a4e0
RH
120 if (type)
121 size = int_size_in_bytes (type);
122 else
123 size = GET_MODE_SIZE (mode);
124
125 return size > 8;
126}
ae180d84 127
356aaf8b
NC
128/* Return an RTX to represent where an argument with mode MODE
129 and type TYPE will be passed to a function. If the result
130 is NULL_RTX, the argument will be pushed. */
ae180d84 131
74a3d2c3 132static rtx
d5cc9181 133v850_function_arg (cumulative_args_t cum_v, enum machine_mode mode,
74a3d2c3 134 const_tree type, bool named)
ae180d84 135{
d5cc9181 136 CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
356aaf8b 137 rtx result = NULL_RTX;
ae180d84
JL
138 int size, align;
139
223a9d64 140 if (!named)
ae180d84
JL
141 return NULL_RTX;
142
143 if (mode == BLKmode)
144 size = int_size_in_bytes (type);
145 else
146 size = GET_MODE_SIZE (mode);
147
223a9d64
N
148 size = (size + UNITS_PER_WORD -1) & ~(UNITS_PER_WORD -1);
149
b4378319 150 if (size < 1)
356aaf8b
NC
151 {
152 /* Once we have stopped using argument registers, do not start up again. */
153 cum->nbytes = 4 * UNITS_PER_WORD;
154 return NULL_RTX;
155 }
b4378319 156
b84d824d
NC
157 if (!TARGET_GCC_ABI)
158 align = UNITS_PER_WORD;
159 else if (size <= UNITS_PER_WORD && type)
ae180d84
JL
160 align = TYPE_ALIGN (type) / BITS_PER_UNIT;
161 else
162 align = size;
163
164 cum->nbytes = (cum->nbytes + align - 1) &~(align - 1);
165
166 if (cum->nbytes > 4 * UNITS_PER_WORD)
356aaf8b 167 return NULL_RTX;
ae180d84
JL
168
169 if (type == NULL_TREE
170 && cum->nbytes + size > 4 * UNITS_PER_WORD)
356aaf8b 171 return NULL_RTX;
ae180d84
JL
172
173 switch (cum->nbytes / UNITS_PER_WORD)
174 {
175 case 0:
c5c76735 176 result = gen_rtx_REG (mode, 6);
ae180d84
JL
177 break;
178 case 1:
c5c76735 179 result = gen_rtx_REG (mode, 7);
ae180d84
JL
180 break;
181 case 2:
c5c76735 182 result = gen_rtx_REG (mode, 8);
ae180d84
JL
183 break;
184 case 3:
c5c76735 185 result = gen_rtx_REG (mode, 9);
ae180d84
JL
186 break;
187 default:
356aaf8b 188 result = NULL_RTX;
ae180d84
JL
189 }
190
191 return result;
192}
193
78a52f11 194/* Return the number of bytes which must be put into registers
ae180d84 195 for values which are part in registers and part in memory. */
78a52f11 196static int
d5cc9181 197v850_arg_partial_bytes (cumulative_args_t cum_v, enum machine_mode mode,
78a52f11 198 tree type, bool named)
ae180d84 199{
d5cc9181 200 CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
ae180d84
JL
201 int size, align;
202
b84d824d 203 if (!named)
ae180d84
JL
204 return 0;
205
206 if (mode == BLKmode)
207 size = int_size_in_bytes (type);
208 else
209 size = GET_MODE_SIZE (mode);
210
356aaf8b
NC
211 if (size < 1)
212 size = 1;
213
b84d824d
NC
214 if (!TARGET_GCC_ABI)
215 align = UNITS_PER_WORD;
216 else if (type)
ae180d84
JL
217 align = TYPE_ALIGN (type) / BITS_PER_UNIT;
218 else
219 align = size;
220
356aaf8b 221 cum->nbytes = (cum->nbytes + align - 1) & ~ (align - 1);
ae180d84
JL
222
223 if (cum->nbytes > 4 * UNITS_PER_WORD)
224 return 0;
225
226 if (cum->nbytes + size <= 4 * UNITS_PER_WORD)
227 return 0;
228
229 if (type == NULL_TREE
230 && cum->nbytes + size > 4 * UNITS_PER_WORD)
231 return 0;
232
78a52f11 233 return 4 * UNITS_PER_WORD - cum->nbytes;
ae180d84
JL
234}
235
74a3d2c3
NF
236/* Update the data in CUM to advance over an argument
237 of mode MODE and data type TYPE.
238 (TYPE is null for libcalls where that information may not be available.) */
239
240static void
d5cc9181 241v850_function_arg_advance (cumulative_args_t cum_v, enum machine_mode mode,
74a3d2c3
NF
242 const_tree type, bool named ATTRIBUTE_UNUSED)
243{
d5cc9181
JR
244 CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
245
b84d824d
NC
246 if (!TARGET_GCC_ABI)
247 cum->nbytes += (((mode != BLKmode
248 ? GET_MODE_SIZE (mode)
249 : int_size_in_bytes (type)) + UNITS_PER_WORD - 1)
250 & -UNITS_PER_WORD);
251 else
252 cum->nbytes += (((type && int_size_in_bytes (type) > 8
253 ? GET_MODE_SIZE (Pmode)
254 : (mode != BLKmode
255 ? GET_MODE_SIZE (mode)
256 : int_size_in_bytes (type))) + UNITS_PER_WORD - 1)
257 & -UNITS_PER_WORD);
74a3d2c3
NF
258}
259
ae180d84
JL
260/* Return the high and low words of a CONST_DOUBLE */
261
262static void
59f3507d 263const_double_split (rtx x, HOST_WIDE_INT * p_high, HOST_WIDE_INT * p_low)
ae180d84
JL
264{
265 if (GET_CODE (x) == CONST_DOUBLE)
266 {
267 long t[2];
268 REAL_VALUE_TYPE rv;
269
270 switch (GET_MODE (x))
271 {
272 case DFmode:
273 REAL_VALUE_FROM_CONST_DOUBLE (rv, x);
274 REAL_VALUE_TO_TARGET_DOUBLE (rv, t);
275 *p_high = t[1]; /* since v850 is little endian */
276 *p_low = t[0]; /* high is second word */
277 return;
278
279 case SFmode:
280 REAL_VALUE_FROM_CONST_DOUBLE (rv, x);
281 REAL_VALUE_TO_TARGET_SINGLE (rv, *p_high);
282 *p_low = 0;
283 return;
284
285 case VOIDmode:
286 case DImode:
287 *p_high = CONST_DOUBLE_HIGH (x);
288 *p_low = CONST_DOUBLE_LOW (x);
289 return;
3ce15347
NC
290
291 default:
292 break;
ae180d84
JL
293 }
294 }
295
296 fatal_insn ("const_double_split got a bad insn:", x);
297}
298
299\f
300/* Return the cost of the rtx R with code CODE. */
301
302static int
59f3507d 303const_costs_int (HOST_WIDE_INT value, int zero_cost)
ae180d84
JL
304{
305 if (CONST_OK_FOR_I (value))
306 return zero_cost;
307 else if (CONST_OK_FOR_J (value))
308 return 1;
309 else if (CONST_OK_FOR_K (value))
310 return 2;
311 else
312 return 4;
313}
314
3c50106f 315static int
59f3507d 316const_costs (rtx r, enum rtx_code c)
ae180d84
JL
317{
318 HOST_WIDE_INT high, low;
319
320 switch (c)
321 {
322 case CONST_INT:
323 return const_costs_int (INTVAL (r), 0);
324
325 case CONST_DOUBLE:
326 const_double_split (r, &high, &low);
327 if (GET_MODE (r) == SFmode)
328 return const_costs_int (high, 1);
329 else
330 return const_costs_int (high, 1) + const_costs_int (low, 1);
331
332 case SYMBOL_REF:
333 case LABEL_REF:
334 case CONST:
335 return 2;
336
337 case HIGH:
338 return 1;
339
340 default:
341 return 4;
342 }
343}
344
3c50106f 345static bool
59f3507d 346v850_rtx_costs (rtx x,
5a82ecd9 347 int codearg,
59f3507d 348 int outer_code ATTRIBUTE_UNUSED,
68f932c4 349 int opno ATTRIBUTE_UNUSED,
f40751dd 350 int * total, bool speed)
3c50106f 351{
5a82ecd9
ILT
352 enum rtx_code code = (enum rtx_code) codearg;
353
3c50106f
RH
354 switch (code)
355 {
356 case CONST_INT:
357 case CONST_DOUBLE:
358 case CONST:
359 case SYMBOL_REF:
360 case LABEL_REF:
361 *total = COSTS_N_INSNS (const_costs (x, code));
362 return true;
363
364 case MOD:
365 case DIV:
366 case UMOD:
367 case UDIV:
f40751dd 368 if (TARGET_V850E && !speed)
3c50106f
RH
369 *total = 6;
370 else
371 *total = 60;
372 return true;
373
374 case MULT:
375 if (TARGET_V850E
376 && ( GET_MODE (x) == SImode
377 || GET_MODE (x) == HImode
378 || GET_MODE (x) == QImode))
379 {
380 if (GET_CODE (XEXP (x, 1)) == REG)
381 *total = 4;
382 else if (GET_CODE (XEXP (x, 1)) == CONST_INT)
383 {
384 if (CONST_OK_FOR_O (INTVAL (XEXP (x, 1))))
385 *total = 6;
386 else if (CONST_OK_FOR_K (INTVAL (XEXP (x, 1))))
387 *total = 10;
388 }
389 }
390 else
391 *total = 20;
392 return true;
393
f90b7a5a
PB
394 case ZERO_EXTRACT:
395 if (outer_code == COMPARE)
396 *total = 0;
397 return false;
398
3c50106f
RH
399 default:
400 return false;
401 }
402}
ae180d84
JL
403\f
404/* Print operand X using operand code CODE to assembly language output file
405 FILE. */
406
11d259f0
NF
407static void
408v850_print_operand (FILE * file, rtx x, int code)
ae180d84
JL
409{
410 HOST_WIDE_INT high, low;
411
412 switch (code)
413 {
5ca2111f 414 case 'c':
b12b5029 415 /* We use 'c' operands with symbols for .vtinherit. */
5ca2111f
CM
416 if (GET_CODE (x) == SYMBOL_REF)
417 {
418 output_addr_const(file, x);
419 break;
420 }
b12b5029 421 /* Fall through. */
ae180d84
JL
422 case 'b':
423 case 'B':
1933ec7e
JW
424 case 'C':
425 switch ((code == 'B' || code == 'C')
426 ? reverse_condition (GET_CODE (x)) : GET_CODE (x))
ae180d84
JL
427 {
428 case NE:
1933ec7e
JW
429 if (code == 'c' || code == 'C')
430 fprintf (file, "nz");
431 else
432 fprintf (file, "ne");
ae180d84
JL
433 break;
434 case EQ:
1933ec7e
JW
435 if (code == 'c' || code == 'C')
436 fprintf (file, "z");
437 else
438 fprintf (file, "e");
ae180d84
JL
439 break;
440 case GE:
1933ec7e 441 fprintf (file, "ge");
ae180d84
JL
442 break;
443 case GT:
1933ec7e 444 fprintf (file, "gt");
ae180d84
JL
445 break;
446 case LE:
1933ec7e 447 fprintf (file, "le");
ae180d84
JL
448 break;
449 case LT:
1933ec7e 450 fprintf (file, "lt");
ae180d84
JL
451 break;
452 case GEU:
1933ec7e 453 fprintf (file, "nl");
ae180d84
JL
454 break;
455 case GTU:
1933ec7e 456 fprintf (file, "h");
ae180d84
JL
457 break;
458 case LEU:
1933ec7e 459 fprintf (file, "nh");
ae180d84
JL
460 break;
461 case LTU:
1933ec7e 462 fprintf (file, "l");
ae180d84
JL
463 break;
464 default:
f2f84cba 465 gcc_unreachable ();
ae180d84
JL
466 }
467 break;
b12b5029 468 case 'F': /* High word of CONST_DOUBLE. */
f2f84cba 469 switch (GET_CODE (x))
ae180d84 470 {
f2f84cba
NS
471 case CONST_INT:
472 fprintf (file, "%d", (INTVAL (x) >= 0) ? 0 : -1);
473 break;
474
475 case CONST_DOUBLE:
ae180d84
JL
476 const_double_split (x, &high, &low);
477 fprintf (file, "%ld", (long) high);
f2f84cba
NS
478 break;
479
480 default:
481 gcc_unreachable ();
ae180d84 482 }
ae180d84 483 break;
b12b5029 484 case 'G': /* Low word of CONST_DOUBLE. */
f2f84cba 485 switch (GET_CODE (x))
ae180d84 486 {
f2f84cba
NS
487 case CONST_INT:
488 fprintf (file, "%ld", (long) INTVAL (x));
489 break;
490
491 case CONST_DOUBLE:
ae180d84
JL
492 const_double_split (x, &high, &low);
493 fprintf (file, "%ld", (long) low);
f2f84cba
NS
494 break;
495
496 default:
497 gcc_unreachable ();
ae180d84 498 }
ae180d84
JL
499 break;
500 case 'L':
e0b3adcb 501 fprintf (file, "%d\n", (int)(INTVAL (x) & 0xffff));
ae180d84
JL
502 break;
503 case 'M':
504 fprintf (file, "%d", exact_log2 (INTVAL (x)));
505 break;
506 case 'O':
f2f84cba
NS
507 gcc_assert (special_symbolref_operand (x, VOIDmode));
508
509 if (GET_CODE (x) == CONST)
510 x = XEXP (XEXP (x, 0), 0);
511 else
512 gcc_assert (GET_CODE (x) == SYMBOL_REF);
513
514 if (SYMBOL_REF_ZDA_P (x))
515 fprintf (file, "zdaoff");
516 else if (SYMBOL_REF_SDA_P (x))
517 fprintf (file, "sdaoff");
518 else if (SYMBOL_REF_TDA_P (x))
519 fprintf (file, "tdaoff");
ae180d84 520 else
f2f84cba 521 gcc_unreachable ();
ae180d84
JL
522 break;
523 case 'P':
f2f84cba
NS
524 gcc_assert (special_symbolref_operand (x, VOIDmode));
525 output_addr_const (file, x);
ae180d84
JL
526 break;
527 case 'Q':
f2f84cba
NS
528 gcc_assert (special_symbolref_operand (x, VOIDmode));
529
530 if (GET_CODE (x) == CONST)
531 x = XEXP (XEXP (x, 0), 0);
ae180d84 532 else
f2f84cba
NS
533 gcc_assert (GET_CODE (x) == SYMBOL_REF);
534
535 if (SYMBOL_REF_ZDA_P (x))
536 fprintf (file, "r0");
537 else if (SYMBOL_REF_SDA_P (x))
538 fprintf (file, "gp");
539 else if (SYMBOL_REF_TDA_P (x))
540 fprintf (file, "ep");
541 else
542 gcc_unreachable ();
ae180d84
JL
543 break;
544 case 'R': /* 2nd word of a double. */
545 switch (GET_CODE (x))
546 {
3ce15347
NC
547 case REG:
548 fprintf (file, reg_names[REGNO (x) + 1]);
549 break;
550 case MEM:
b72f00af 551 x = XEXP (adjust_address (x, SImode, 4), 0);
11d259f0 552 v850_print_operand_address (file, x);
7a846a6c
NC
553 if (GET_CODE (x) == CONST_INT)
554 fprintf (file, "[r0]");
3ce15347
NC
555 break;
556
b84d824d
NC
557 case CONST_INT:
558 {
559 unsigned HOST_WIDE_INT v = INTVAL (x);
560
561 /* Trickery to avoid problems with shifting
562 32-bits at a time on a 32-bit host. */
563 v = v >> 16;
564 v = v >> 16;
565 fprintf (file, HOST_WIDE_INT_PRINT_HEX, v);
566 break;
567 }
568
569 case CONST_DOUBLE:
570 fprintf (file, HOST_WIDE_INT_PRINT_HEX, CONST_DOUBLE_HIGH (x));
3ce15347 571 break;
b84d824d
NC
572
573 default:
574 debug_rtx (x);
575 gcc_unreachable ();
ae180d84
JL
576 }
577 break;
578 case 'S':
579 {
2ec6cd51 580 /* If it's a reference to a TDA variable, use sst/sld vs. st/ld. */
145870b5
NC
581 if (GET_CODE (x) == MEM && ep_memory_operand (x, GET_MODE (x), FALSE))
582 fputs ("s", file);
583
584 break;
585 }
586 case 'T':
587 {
588 /* Like an 'S' operand above, but for unsigned loads only. */
589 if (GET_CODE (x) == MEM && ep_memory_operand (x, GET_MODE (x), TRUE))
ae180d84
JL
590 fputs ("s", file);
591
592 break;
593 }
b12b5029 594 case 'W': /* Print the instruction suffix. */
ae180d84
JL
595 switch (GET_MODE (x))
596 {
597 default:
f2f84cba 598 gcc_unreachable ();
ae180d84
JL
599
600 case QImode: fputs (".b", file); break;
601 case HImode: fputs (".h", file); break;
602 case SImode: fputs (".w", file); break;
603 case SFmode: fputs (".w", file); break;
604 }
605 break;
b12b5029 606 case '.': /* Register r0. */
ae180d84
JL
607 fputs (reg_names[0], file);
608 break;
b12b5029
NC
609 case 'z': /* Reg or zero. */
610 if (REG_P (x))
1933ec7e 611 fputs (reg_names[REGNO (x)], file);
223a9d64
N
612 else if ((GET_MODE(x) == SImode
613 || GET_MODE(x) == DFmode
614 || GET_MODE(x) == SFmode)
615 && x == CONST0_RTX(GET_MODE(x)))
616 fputs (reg_names[0], file);
1933ec7e 617 else
f2f84cba
NS
618 {
619 gcc_assert (x == const0_rtx);
620 fputs (reg_names[0], file);
621 }
1933ec7e 622 break;
ae180d84
JL
623 default:
624 switch (GET_CODE (x))
625 {
626 case MEM:
627 if (GET_CODE (XEXP (x, 0)) == CONST_INT)
f1c25d3b 628 output_address (gen_rtx_PLUS (SImode, gen_rtx_REG (SImode, 0),
c5c76735 629 XEXP (x, 0)));
ae180d84
JL
630 else
631 output_address (XEXP (x, 0));
632 break;
633
634 case REG:
635 fputs (reg_names[REGNO (x)], file);
636 break;
637 case SUBREG:
ddef6bc7 638 fputs (reg_names[subreg_regno (x)], file);
ae180d84 639 break;
b84d824d
NC
640 case CONST_DOUBLE:
641 fprintf (file, HOST_WIDE_INT_PRINT_HEX, CONST_DOUBLE_LOW (x));
642 break;
643
ae180d84
JL
644 case CONST_INT:
645 case SYMBOL_REF:
646 case CONST:
647 case LABEL_REF:
648 case CODE_LABEL:
11d259f0 649 v850_print_operand_address (file, x);
ae180d84
JL
650 break;
651 default:
f2f84cba 652 gcc_unreachable ();
ae180d84
JL
653 }
654 break;
655
656 }
657}
658
659\f
660/* Output assembly language output for the address ADDR to FILE. */
661
11d259f0
NF
662static void
663v850_print_operand_address (FILE * file, rtx addr)
ae180d84
JL
664{
665 switch (GET_CODE (addr))
666 {
667 case REG:
668 fprintf (file, "0[");
11d259f0 669 v850_print_operand (file, addr, 0);
ae180d84
JL
670 fprintf (file, "]");
671 break;
672 case LO_SUM:
673 if (GET_CODE (XEXP (addr, 0)) == REG)
674 {
675 /* reg,foo */
676 fprintf (file, "lo(");
11d259f0 677 v850_print_operand (file, XEXP (addr, 1), 0);
ae180d84 678 fprintf (file, ")[");
11d259f0 679 v850_print_operand (file, XEXP (addr, 0), 0);
ae180d84
JL
680 fprintf (file, "]");
681 }
682 break;
683 case PLUS:
684 if (GET_CODE (XEXP (addr, 0)) == REG
685 || GET_CODE (XEXP (addr, 0)) == SUBREG)
686 {
687 /* reg,foo */
11d259f0 688 v850_print_operand (file, XEXP (addr, 1), 0);
ae180d84 689 fprintf (file, "[");
11d259f0 690 v850_print_operand (file, XEXP (addr, 0), 0);
ae180d84
JL
691 fprintf (file, "]");
692 }
693 else
694 {
11d259f0 695 v850_print_operand (file, XEXP (addr, 0), 0);
ae180d84 696 fprintf (file, "+");
11d259f0 697 v850_print_operand (file, XEXP (addr, 1), 0);
ae180d84
JL
698 }
699 break;
700 case SYMBOL_REF:
50d1ff6a
RH
701 {
702 const char *off_name = NULL;
703 const char *reg_name = NULL;
704
705 if (SYMBOL_REF_ZDA_P (addr))
706 {
707 off_name = "zdaoff";
708 reg_name = "r0";
709 }
710 else if (SYMBOL_REF_SDA_P (addr))
711 {
712 off_name = "sdaoff";
713 reg_name = "gp";
714 }
715 else if (SYMBOL_REF_TDA_P (addr))
716 {
717 off_name = "tdaoff";
718 reg_name = "ep";
719 }
720
721 if (off_name)
ae180d84 722 fprintf (file, "%s(", off_name);
ae180d84 723 output_addr_const (file, addr);
50d1ff6a
RH
724 if (reg_name)
725 fprintf (file, ")[%s]", reg_name);
726 }
ae180d84
JL
727 break;
728 case CONST:
729 if (special_symbolref_operand (addr, VOIDmode))
730 {
50d1ff6a 731 rtx x = XEXP (XEXP (addr, 0), 0);
3cce094d
KG
732 const char *off_name;
733 const char *reg_name;
ae180d84 734
50d1ff6a 735 if (SYMBOL_REF_ZDA_P (x))
ae180d84
JL
736 {
737 off_name = "zdaoff";
738 reg_name = "r0";
739 }
50d1ff6a 740 else if (SYMBOL_REF_SDA_P (x))
ae180d84
JL
741 {
742 off_name = "sdaoff";
743 reg_name = "gp";
744 }
50d1ff6a 745 else if (SYMBOL_REF_TDA_P (x))
ae180d84
JL
746 {
747 off_name = "tdaoff";
748 reg_name = "ep";
749 }
750 else
f2f84cba 751 gcc_unreachable ();
ae180d84
JL
752
753 fprintf (file, "%s(", off_name);
754 output_addr_const (file, addr);
755 fprintf (file, ")[%s]", reg_name);
756 }
757 else
758 output_addr_const (file, addr);
759 break;
760 default:
761 output_addr_const (file, addr);
762 break;
763 }
764}
765
11d259f0
NF
766static bool
767v850_print_operand_punct_valid_p (unsigned char code)
768{
769 return code == '.';
770}
771
b4378319
NC
772/* When assemble_integer is used to emit the offsets for a switch
773 table it can encounter (TRUNCATE:HI (MINUS:SI (LABEL_REF:SI) (LABEL_REF:SI))).
774 output_addr_const will normally barf at this, but it is OK to omit
775 the truncate and just emit the difference of the two labels. The
776 .hword directive will automatically handle the truncation for us.
777
24da2019 778 Returns true if rtx was handled, false otherwise. */
b4378319 779
24da2019 780static bool
59f3507d 781v850_output_addr_const_extra (FILE * file, rtx x)
b4378319
NC
782{
783 if (GET_CODE (x) != TRUNCATE)
24da2019 784 return false;
b4378319
NC
785
786 x = XEXP (x, 0);
787
788 /* We must also handle the case where the switch table was passed a
789 constant value and so has been collapsed. In this case the first
790 label will have been deleted. In such a case it is OK to emit
791 nothing, since the table will not be used.
792 (cf gcc.c-torture/compile/990801-1.c). */
793 if (GET_CODE (x) == MINUS
794 && GET_CODE (XEXP (x, 0)) == LABEL_REF
795 && GET_CODE (XEXP (XEXP (x, 0), 0)) == CODE_LABEL
796 && INSN_DELETED_P (XEXP (XEXP (x, 0), 0)))
24da2019 797 return true;
b4378319
NC
798
799 output_addr_const (file, x);
24da2019 800 return true;
b4378319 801}
ae180d84
JL
802\f
803/* Return appropriate code to load up a 1, 2, or 4 integer/floating
804 point value. */
805
8b97c5f8 806const char *
59f3507d 807output_move_single (rtx * operands)
ae180d84
JL
808{
809 rtx dst = operands[0];
810 rtx src = operands[1];
811
812 if (REG_P (dst))
813 {
814 if (REG_P (src))
815 return "mov %1,%0";
816
817 else if (GET_CODE (src) == CONST_INT)
818 {
819 HOST_WIDE_INT value = INTVAL (src);
820
22f23985 821 if (CONST_OK_FOR_J (value)) /* Signed 5-bit immediate. */
ae180d84
JL
822 return "mov %1,%0";
823
22f23985 824 else if (CONST_OK_FOR_K (value)) /* Signed 16-bit immediate. */
223a9d64 825 return "movea %1,%.,%0";
ae180d84 826
b4378319 827 else if (CONST_OK_FOR_L (value)) /* Upper 16 bits were set. */
223a9d64 828 return "movhi hi0(%1),%.,%0";
ae180d84 829
b4378319 830 /* A random constant. */
dbdbd982 831 else if (TARGET_V850E_UP)
b4378319
NC
832 return "mov %1,%0";
833 else
ae180d84
JL
834 return "movhi hi(%1),%.,%0\n\tmovea lo(%1),%0,%0";
835 }
836
837 else if (GET_CODE (src) == CONST_DOUBLE && GET_MODE (src) == SFmode)
838 {
839 HOST_WIDE_INT high, low;
840
841 const_double_split (src, &high, &low);
b4378319 842
22f23985 843 if (CONST_OK_FOR_J (high)) /* Signed 5-bit immediate. */
ae180d84
JL
844 return "mov %F1,%0";
845
22f23985 846 else if (CONST_OK_FOR_K (high)) /* Signed 16-bit immediate. */
223a9d64 847 return "movea %F1,%.,%0";
ae180d84 848
b4378319 849 else if (CONST_OK_FOR_L (high)) /* Upper 16 bits were set. */
223a9d64 850 return "movhi hi0(%F1),%.,%0";
ae180d84 851
b4378319 852 /* A random constant. */
dbdbd982 853 else if (TARGET_V850E_UP)
b4378319
NC
854 return "mov %F1,%0";
855
856 else
ae180d84
JL
857 return "movhi hi(%F1),%.,%0\n\tmovea lo(%F1),%0,%0";
858 }
859
860 else if (GET_CODE (src) == MEM)
861 return "%S1ld%W1 %1,%0";
862
863 else if (special_symbolref_operand (src, VOIDmode))
864 return "movea %O1(%P1),%Q1,%0";
865
866 else if (GET_CODE (src) == LABEL_REF
867 || GET_CODE (src) == SYMBOL_REF
868 || GET_CODE (src) == CONST)
145870b5 869 {
dbdbd982 870 if (TARGET_V850E_UP)
b4378319
NC
871 return "mov hilo(%1),%0";
872 else
873 return "movhi hi(%1),%.,%0\n\tmovea lo(%1),%0,%0";
145870b5 874 }
ae180d84
JL
875
876 else if (GET_CODE (src) == HIGH)
877 return "movhi hi(%1),%.,%0";
878
879 else if (GET_CODE (src) == LO_SUM)
880 {
881 operands[2] = XEXP (src, 0);
882 operands[3] = XEXP (src, 1);
883 return "movea lo(%3),%2,%0";
884 }
885 }
886
887 else if (GET_CODE (dst) == MEM)
888 {
889 if (REG_P (src))
890 return "%S0st%W0 %1,%0";
891
892 else if (GET_CODE (src) == CONST_INT && INTVAL (src) == 0)
893 return "%S0st%W0 %.,%0";
894
895 else if (GET_CODE (src) == CONST_DOUBLE
896 && CONST0_RTX (GET_MODE (dst)) == src)
897 return "%S0st%W0 %.,%0";
898 }
899
c5c76735 900 fatal_insn ("output_move_single:", gen_rtx_SET (VOIDmode, dst, src));
ae180d84
JL
901 return "";
902}
903
223a9d64 904enum machine_mode
122603fa 905v850_select_cc_mode (enum rtx_code cond, rtx op0, rtx op1 ATTRIBUTE_UNUSED)
223a9d64
N
906{
907 if (GET_MODE_CLASS (GET_MODE (op0)) == MODE_FLOAT)
908 {
909 switch (cond)
910 {
911 case LE:
912 return CC_FPU_LEmode;
913 case GE:
914 return CC_FPU_GEmode;
915 case LT:
916 return CC_FPU_LTmode;
917 case GT:
918 return CC_FPU_GTmode;
919 case EQ:
920 return CC_FPU_EQmode;
921 case NE:
922 return CC_FPU_NEmode;
923 default:
3cd232b5 924 gcc_unreachable ();
223a9d64
N
925 }
926 }
927 return CCmode;
928}
929
930enum machine_mode
931v850_gen_float_compare (enum rtx_code cond, enum machine_mode mode ATTRIBUTE_UNUSED, rtx op0, rtx op1)
932{
3cd232b5 933 if (GET_MODE (op0) == DFmode)
223a9d64
N
934 {
935 switch (cond)
936 {
937 case LE:
938 emit_insn (gen_cmpdf_le_insn (op0, op1));
939 break;
940 case GE:
941 emit_insn (gen_cmpdf_ge_insn (op0, op1));
942 break;
943 case LT:
944 emit_insn (gen_cmpdf_lt_insn (op0, op1));
945 break;
946 case GT:
947 emit_insn (gen_cmpdf_gt_insn (op0, op1));
948 break;
3cd232b5
NDD
949 case NE:
950 /* Note: There is no NE comparison operator. So we
951 perform an EQ comparison and invert the branch.
952 See v850_float_nz_comparison for how this is done. */
223a9d64
N
953 case EQ:
954 emit_insn (gen_cmpdf_eq_insn (op0, op1));
955 break;
223a9d64 956 default:
3cd232b5 957 gcc_unreachable ();
223a9d64
N
958 }
959 }
3cd232b5 960 else if (GET_MODE (v850_compare_op0) == SFmode)
223a9d64
N
961 {
962 switch (cond)
963 {
964 case LE:
965 emit_insn (gen_cmpsf_le_insn(op0, op1));
966 break;
967 case GE:
968 emit_insn (gen_cmpsf_ge_insn(op0, op1));
969 break;
970 case LT:
971 emit_insn (gen_cmpsf_lt_insn(op0, op1));
972 break;
973 case GT:
974 emit_insn (gen_cmpsf_gt_insn(op0, op1));
975 break;
3cd232b5
NDD
976 case NE:
977 /* Note: There is no NE comparison operator. So we
978 perform an EQ comparison and invert the branch.
979 See v850_float_nz_comparison for how this is done. */
223a9d64
N
980 case EQ:
981 emit_insn (gen_cmpsf_eq_insn(op0, op1));
982 break;
223a9d64 983 default:
3cd232b5 984 gcc_unreachable ();
223a9d64
N
985 }
986 }
987 else
3cd232b5 988 gcc_unreachable ();
223a9d64
N
989
990 return v850_select_cc_mode (cond, op0, op1);
991}
992
993rtx
994v850_gen_compare (enum rtx_code cond, enum machine_mode mode, rtx op0, rtx op1)
995{
996 if (GET_MODE_CLASS(GET_MODE (op0)) != MODE_FLOAT)
997 {
998 emit_insn (gen_cmpsi_insn (op0, op1));
999 return gen_rtx_fmt_ee (cond, mode, gen_rtx_REG(CCmode, CC_REGNUM), const0_rtx);
1000 }
1001 else
1002 {
1003 rtx cc_reg;
1004 mode = v850_gen_float_compare (cond, mode, op0, op1);
1005 cc_reg = gen_rtx_REG (mode, CC_REGNUM);
1006 emit_insn (gen_rtx_SET(mode, cc_reg, gen_rtx_REG (mode, FCC_REGNUM)));
1007
1008 return gen_rtx_fmt_ee (cond, mode, cc_reg, const0_rtx);
1009 }
1010}
1011
1933ec7e
JW
1012/* Return maximum offset supported for a short EP memory reference of mode
1013 MODE and signedness UNSIGNEDP. */
ae180d84 1014
3ce15347 1015static int
59f3507d 1016ep_memory_offset (enum machine_mode mode, int unsignedp ATTRIBUTE_UNUSED)
ae180d84 1017{
1933ec7e 1018 int max_offset = 0;
ae180d84 1019
1933ec7e 1020 switch (mode)
ae180d84 1021 {
ae180d84 1022 case QImode:
b4378319
NC
1023 if (TARGET_SMALL_SLD)
1024 max_offset = (1 << 4);
dbdbd982 1025 else if ((TARGET_V850E_UP)
223a9d64 1026 && unsignedp)
b4378319
NC
1027 max_offset = (1 << 4);
1028 else
1029 max_offset = (1 << 7);
ae180d84
JL
1030 break;
1031
1032 case HImode:
b4378319
NC
1033 if (TARGET_SMALL_SLD)
1034 max_offset = (1 << 5);
dbdbd982 1035 else if ((TARGET_V850E_UP)
223a9d64 1036 && unsignedp)
b4378319
NC
1037 max_offset = (1 << 5);
1038 else
1039 max_offset = (1 << 8);
ae180d84
JL
1040 break;
1041
1042 case SImode:
1043 case SFmode:
145870b5 1044 max_offset = (1 << 8);
ae180d84 1045 break;
3ce15347
NC
1046
1047 default:
1048 break;
ae180d84
JL
1049 }
1050
1933ec7e
JW
1051 return max_offset;
1052}
1053
1054/* Return true if OP is a valid short EP memory reference */
1055
1056int
59f3507d 1057ep_memory_operand (rtx op, enum machine_mode mode, int unsigned_load)
1933ec7e
JW
1058{
1059 rtx addr, op0, op1;
1060 int max_offset;
1061 int mask;
1062
2ec6cd51 1063 /* If we are not using the EP register on a per-function basis
6fc0bb99 1064 then do not allow this optimization at all. This is to
2ec6cd51
NC
1065 prevent the use of the SLD/SST instructions which cannot be
1066 guaranteed to work properly due to a hardware bug. */
1067 if (!TARGET_EP)
1068 return FALSE;
1069
1933ec7e
JW
1070 if (GET_CODE (op) != MEM)
1071 return FALSE;
1072
1073 max_offset = ep_memory_offset (mode, unsigned_load);
1074
1075 mask = GET_MODE_SIZE (mode) - 1;
1076
ae180d84
JL
1077 addr = XEXP (op, 0);
1078 if (GET_CODE (addr) == CONST)
1079 addr = XEXP (addr, 0);
1080
1081 switch (GET_CODE (addr))
1082 {
1083 default:
1084 break;
1085
1086 case SYMBOL_REF:
50d1ff6a 1087 return SYMBOL_REF_TDA_P (addr);
ae180d84
JL
1088
1089 case REG:
1090 return REGNO (addr) == EP_REGNUM;
1091
1092 case PLUS:
1093 op0 = XEXP (addr, 0);
1094 op1 = XEXP (addr, 1);
1095 if (GET_CODE (op1) == CONST_INT
1096 && INTVAL (op1) < max_offset
2268cc52 1097 && INTVAL (op1) >= 0
ae180d84
JL
1098 && (INTVAL (op1) & mask) == 0)
1099 {
1100 if (GET_CODE (op0) == REG && REGNO (op0) == EP_REGNUM)
1101 return TRUE;
1102
50d1ff6a 1103 if (GET_CODE (op0) == SYMBOL_REF && SYMBOL_REF_TDA_P (op0))
ae180d84
JL
1104 return TRUE;
1105 }
1106 break;
1107 }
1108
1109 return FALSE;
1110}
ae180d84
JL
1111\f
1112/* Substitute memory references involving a pointer, to use the ep pointer,
1113 taking care to save and preserve the ep. */
1114
1115static void
59f3507d
NN
1116substitute_ep_register (rtx first_insn,
1117 rtx last_insn,
1118 int uses,
1119 int regno,
1120 rtx * p_r1,
1121 rtx * p_ep)
ae180d84 1122{
c5c76735 1123 rtx reg = gen_rtx_REG (Pmode, regno);
ae180d84 1124 rtx insn;
ae180d84
JL
1125
1126 if (!*p_r1)
1127 {
90745823 1128 df_set_regs_ever_live (1, true);
c5c76735
JL
1129 *p_r1 = gen_rtx_REG (Pmode, 1);
1130 *p_ep = gen_rtx_REG (Pmode, 30);
ae180d84
JL
1131 }
1132
1133 if (TARGET_DEBUG)
3ce15347
NC
1134 fprintf (stderr, "\
1135Saved %d bytes (%d uses of register %s) in function %s, starting as insn %d, ending at %d\n",
ae180d84
JL
1136 2 * (uses - 3), uses, reg_names[regno],
1137 IDENTIFIER_POINTER (DECL_NAME (current_function_decl)),
1138 INSN_UID (first_insn), INSN_UID (last_insn));
1139
b64925dc 1140 if (NOTE_P (first_insn))
ae180d84
JL
1141 first_insn = next_nonnote_insn (first_insn);
1142
1143 last_insn = next_nonnote_insn (last_insn);
1144 for (insn = first_insn; insn && insn != last_insn; insn = NEXT_INSN (insn))
1145 {
b64925dc 1146 if (NONJUMP_INSN_P (insn))
ae180d84
JL
1147 {
1148 rtx pattern = single_set (insn);
1149
1150 /* Replace the memory references. */
1151 if (pattern)
1152 {
1153 rtx *p_mem;
1933ec7e
JW
1154 /* Memory operands are signed by default. */
1155 int unsignedp = FALSE;
ae180d84
JL
1156
1157 if (GET_CODE (SET_DEST (pattern)) == MEM
1158 && GET_CODE (SET_SRC (pattern)) == MEM)
1159 p_mem = (rtx *)0;
1160
1161 else if (GET_CODE (SET_DEST (pattern)) == MEM)
1162 p_mem = &SET_DEST (pattern);
1163
1164 else if (GET_CODE (SET_SRC (pattern)) == MEM)
1165 p_mem = &SET_SRC (pattern);
1166
b4378319
NC
1167 else if (GET_CODE (SET_SRC (pattern)) == SIGN_EXTEND
1168 && GET_CODE (XEXP (SET_SRC (pattern), 0)) == MEM)
1169 p_mem = &XEXP (SET_SRC (pattern), 0);
1170
1171 else if (GET_CODE (SET_SRC (pattern)) == ZERO_EXTEND
1172 && GET_CODE (XEXP (SET_SRC (pattern), 0)) == MEM)
1173 {
1174 p_mem = &XEXP (SET_SRC (pattern), 0);
1175 unsignedp = TRUE;
1176 }
ae180d84
JL
1177 else
1178 p_mem = (rtx *)0;
1179
1180 if (p_mem)
1181 {
1182 rtx addr = XEXP (*p_mem, 0);
1183
c3edd394 1184 if (GET_CODE (addr) == REG && REGNO (addr) == (unsigned) regno)
ae180d84
JL
1185 *p_mem = change_address (*p_mem, VOIDmode, *p_ep);
1186
1187 else if (GET_CODE (addr) == PLUS
1188 && GET_CODE (XEXP (addr, 0)) == REG
c3edd394 1189 && REGNO (XEXP (addr, 0)) == (unsigned) regno
ae180d84 1190 && GET_CODE (XEXP (addr, 1)) == CONST_INT
3ce15347 1191 && ((INTVAL (XEXP (addr, 1)))
1933ec7e 1192 < ep_memory_offset (GET_MODE (*p_mem),
2268cc52
JL
1193 unsignedp))
1194 && ((INTVAL (XEXP (addr, 1))) >= 0))
ae180d84 1195 *p_mem = change_address (*p_mem, VOIDmode,
c5c76735
JL
1196 gen_rtx_PLUS (Pmode,
1197 *p_ep,
1198 XEXP (addr, 1)));
ae180d84
JL
1199 }
1200 }
1201 }
1202 }
1203
1204 /* Optimize back to back cases of ep <- r1 & r1 <- ep. */
1205 insn = prev_nonnote_insn (first_insn);
b64925dc 1206 if (insn && NONJUMP_INSN_P (insn)
ae180d84
JL
1207 && GET_CODE (PATTERN (insn)) == SET
1208 && SET_DEST (PATTERN (insn)) == *p_ep
1209 && SET_SRC (PATTERN (insn)) == *p_r1)
1210 delete_insn (insn);
1211 else
c5c76735 1212 emit_insn_before (gen_rtx_SET (Pmode, *p_r1, *p_ep), first_insn);
ae180d84 1213
c5c76735
JL
1214 emit_insn_before (gen_rtx_SET (Pmode, *p_ep, reg), first_insn);
1215 emit_insn_before (gen_rtx_SET (Pmode, *p_ep, *p_r1), last_insn);
ae180d84
JL
1216}
1217
1218\f
18dbd950
RS
1219/* TARGET_MACHINE_DEPENDENT_REORG. On the 850, we use it to implement
1220 the -mep mode to copy heavily used pointers to ep to use the implicit
1221 addressing. */
ae180d84 1222
18dbd950 1223static void
59f3507d 1224v850_reorg (void)
ae180d84 1225{
3ce15347
NC
1226 struct
1227 {
ae180d84
JL
1228 int uses;
1229 rtx first_insn;
1230 rtx last_insn;
3ce15347
NC
1231 }
1232 regs[FIRST_PSEUDO_REGISTER];
ae180d84
JL
1233
1234 int i;
1235 int use_ep = FALSE;
1236 rtx r1 = NULL_RTX;
1237 rtx ep = NULL_RTX;
1238 rtx insn;
1239 rtx pattern;
1240
61db4608 1241 /* If not ep mode, just return now. */
ae180d84
JL
1242 if (!TARGET_EP)
1243 return;
1244
1245 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1246 {
1247 regs[i].uses = 0;
1248 regs[i].first_insn = NULL_RTX;
1249 regs[i].last_insn = NULL_RTX;
1250 }
1251
18dbd950 1252 for (insn = get_insns (); insn != NULL_RTX; insn = NEXT_INSN (insn))
ae180d84
JL
1253 {
1254 switch (GET_CODE (insn))
1255 {
1256 /* End of basic block */
1257 default:
1258 if (!use_ep)
1259 {
1260 int max_uses = -1;
1261 int max_regno = -1;
1262
1263 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1264 {
1265 if (max_uses < regs[i].uses)
1266 {
1267 max_uses = regs[i].uses;
1268 max_regno = i;
1269 }
1270 }
1271
1272 if (max_uses > 3)
1273 substitute_ep_register (regs[max_regno].first_insn,
1274 regs[max_regno].last_insn,
1275 max_uses, max_regno, &r1, &ep);
1276 }
1277
1278 use_ep = FALSE;
1279 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1280 {
1281 regs[i].uses = 0;
1282 regs[i].first_insn = NULL_RTX;
1283 regs[i].last_insn = NULL_RTX;
1284 }
1285 break;
1286
1287 case NOTE:
1288 break;
1289
1290 case INSN:
1291 pattern = single_set (insn);
1292
b84d824d 1293 /* See if there are any memory references we can shorten. */
ae180d84
JL
1294 if (pattern)
1295 {
1296 rtx src = SET_SRC (pattern);
1297 rtx dest = SET_DEST (pattern);
1298 rtx mem;
1933ec7e
JW
1299 /* Memory operands are signed by default. */
1300 int unsignedp = FALSE;
ae180d84 1301
9324411a 1302 /* We might have (SUBREG (MEM)) here, so just get rid of the
68882f0f
JJ
1303 subregs to make this code simpler. */
1304 if (GET_CODE (dest) == SUBREG
1305 && (GET_CODE (SUBREG_REG (dest)) == MEM
1306 || GET_CODE (SUBREG_REG (dest)) == REG))
b84d824d 1307 alter_subreg (&dest, false);
68882f0f
JJ
1308 if (GET_CODE (src) == SUBREG
1309 && (GET_CODE (SUBREG_REG (src)) == MEM
1310 || GET_CODE (SUBREG_REG (src)) == REG))
b84d824d 1311 alter_subreg (&src, false);
9324411a 1312
ae180d84
JL
1313 if (GET_CODE (dest) == MEM && GET_CODE (src) == MEM)
1314 mem = NULL_RTX;
1315
1316 else if (GET_CODE (dest) == MEM)
1317 mem = dest;
1318
1319 else if (GET_CODE (src) == MEM)
1320 mem = src;
1321
b4378319
NC
1322 else if (GET_CODE (src) == SIGN_EXTEND
1323 && GET_CODE (XEXP (src, 0)) == MEM)
1324 mem = XEXP (src, 0);
1325
1326 else if (GET_CODE (src) == ZERO_EXTEND
1327 && GET_CODE (XEXP (src, 0)) == MEM)
1328 {
1329 mem = XEXP (src, 0);
1330 unsignedp = TRUE;
1331 }
ae180d84
JL
1332 else
1333 mem = NULL_RTX;
1334
1933ec7e 1335 if (mem && ep_memory_operand (mem, GET_MODE (mem), unsignedp))
ae180d84
JL
1336 use_ep = TRUE;
1337
1338 else if (!use_ep && mem
1339 && GET_MODE_SIZE (GET_MODE (mem)) <= UNITS_PER_WORD)
1340 {
1341 rtx addr = XEXP (mem, 0);
1342 int regno = -1;
1343 int short_p;
1344
1345 if (GET_CODE (addr) == REG)
1346 {
1347 short_p = TRUE;
1348 regno = REGNO (addr);
1349 }
1350
1351 else if (GET_CODE (addr) == PLUS
1352 && GET_CODE (XEXP (addr, 0)) == REG
1353 && GET_CODE (XEXP (addr, 1)) == CONST_INT
3ce15347 1354 && ((INTVAL (XEXP (addr, 1)))
2268cc52
JL
1355 < ep_memory_offset (GET_MODE (mem), unsignedp))
1356 && ((INTVAL (XEXP (addr, 1))) >= 0))
ae180d84
JL
1357 {
1358 short_p = TRUE;
1359 regno = REGNO (XEXP (addr, 0));
1360 }
1361
1362 else
1363 short_p = FALSE;
1364
1365 if (short_p)
1366 {
1367 regs[regno].uses++;
1368 regs[regno].last_insn = insn;
1369 if (!regs[regno].first_insn)
1370 regs[regno].first_insn = insn;
1371 }
1372 }
1373
1374 /* Loading up a register in the basic block zaps any savings
1375 for the register */
9324411a 1376 if (GET_CODE (dest) == REG)
ae180d84
JL
1377 {
1378 enum machine_mode mode = GET_MODE (dest);
ae180d84
JL
1379 int regno;
1380 int endregno;
1381
9324411a 1382 regno = REGNO (dest);
ae180d84
JL
1383 endregno = regno + HARD_REGNO_NREGS (regno, mode);
1384
1385 if (!use_ep)
1386 {
1387 /* See if we can use the pointer before this
1388 modification. */
1389 int max_uses = -1;
1390 int max_regno = -1;
1391
1392 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1393 {
1394 if (max_uses < regs[i].uses)
1395 {
1396 max_uses = regs[i].uses;
1397 max_regno = i;
1398 }
1399 }
1400
1401 if (max_uses > 3
1402 && max_regno >= regno
1403 && max_regno < endregno)
1404 {
1405 substitute_ep_register (regs[max_regno].first_insn,
1406 regs[max_regno].last_insn,
3ce15347
NC
1407 max_uses, max_regno, &r1,
1408 &ep);
ae180d84
JL
1409
1410 /* Since we made a substitution, zap all remembered
1411 registers. */
1412 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1413 {
1414 regs[i].uses = 0;
1415 regs[i].first_insn = NULL_RTX;
1416 regs[i].last_insn = NULL_RTX;
1417 }
1418 }
1419 }
1420
1421 for (i = regno; i < endregno; i++)
1422 {
1423 regs[i].uses = 0;
1424 regs[i].first_insn = NULL_RTX;
1425 regs[i].last_insn = NULL_RTX;
1426 }
1427 }
1428 }
1429 }
1430 }
1431}
1432
ae180d84 1433/* # of registers saved by the interrupt handler. */
223a9d64 1434#define INTERRUPT_FIXED_NUM 5
ae180d84
JL
1435
1436/* # of bytes for registers saved by the interrupt handler. */
1437#define INTERRUPT_FIXED_SAVE_SIZE (4 * INTERRUPT_FIXED_NUM)
1438
ae180d84
JL
1439/* # of words saved for other registers. */
1440#define INTERRUPT_ALL_SAVE_NUM \
223a9d64 1441 (30 - INTERRUPT_FIXED_NUM)
ae180d84
JL
1442
1443#define INTERRUPT_ALL_SAVE_SIZE (4 * INTERRUPT_ALL_SAVE_NUM)
1444
1445int
59f3507d 1446compute_register_save_size (long * p_reg_saved)
ae180d84
JL
1447{
1448 int size = 0;
1449 int i;
1450 int interrupt_handler = v850_interrupt_function_p (current_function_decl);
6fb5fa3c 1451 int call_p = df_regs_ever_live_p (LINK_POINTER_REGNUM);
ae180d84
JL
1452 long reg_saved = 0;
1453
ae180d84
JL
1454 /* Count space for the register saves. */
1455 if (interrupt_handler)
1456 {
1457 for (i = 0; i <= 31; i++)
1458 switch (i)
1459 {
1460 default:
6fb5fa3c 1461 if (df_regs_ever_live_p (i) || call_p)
ae180d84
JL
1462 {
1463 size += 4;
1464 reg_saved |= 1L << i;
1465 }
1466 break;
1467
1468 /* We don't save/restore r0 or the stack pointer */
1469 case 0:
1470 case STACK_POINTER_REGNUM:
1471 break;
1472
1473 /* For registers with fixed use, we save them, set them to the
1474 appropriate value, and then restore them.
1475 These registers are handled specially, so don't list them
1476 on the list of registers to save in the prologue. */
1477 case 1: /* temp used to hold ep */
b24bcfb3 1478 case 4: /* gp */
ae180d84 1479 case 10: /* temp used to call interrupt save/restore */
223a9d64 1480 case 11: /* temp used to call interrupt save/restore (long call) */
ae180d84
JL
1481 case EP_REGNUM: /* ep */
1482 size += 4;
1483 break;
1484 }
1485 }
ae180d84 1486 else
29a65e3d
NC
1487 {
1488 /* Find the first register that needs to be saved. */
1489 for (i = 0; i <= 31; i++)
6fb5fa3c 1490 if (df_regs_ever_live_p (i) && ((! call_used_regs[i])
29a65e3d
NC
1491 || i == LINK_POINTER_REGNUM))
1492 break;
1493
1494 /* If it is possible that an out-of-line helper function might be
1495 used to generate the prologue for the current function, then we
1496 need to cover the possibility that such a helper function will
1497 be used, despite the fact that there might be gaps in the list of
1498 registers that need to be saved. To detect this we note that the
a17a104c
CM
1499 helper functions always push at least register r29 (provided
1500 that the function is not an interrupt handler). */
29a65e3d
NC
1501
1502 if (TARGET_PROLOG_FUNCTION
a17a104c 1503 && (i == 2 || ((i >= 20) && (i < 30))))
ae180d84 1504 {
29a65e3d
NC
1505 if (i == 2)
1506 {
1507 size += 4;
1508 reg_saved |= 1L << i;
1509
1510 i = 20;
1511 }
ae180d84 1512
29a65e3d
NC
1513 /* Helper functions save all registers between the starting
1514 register and the last register, regardless of whether they
1515 are actually used by the function or not. */
1516 for (; i <= 29; i++)
1517 {
1518 size += 4;
1519 reg_saved |= 1L << i;
1520 }
1521
6fb5fa3c 1522 if (df_regs_ever_live_p (LINK_POINTER_REGNUM))
29a65e3d
NC
1523 {
1524 size += 4;
1525 reg_saved |= 1L << LINK_POINTER_REGNUM;
1526 }
1527 }
1528 else
1529 {
1530 for (; i <= 31; i++)
6fb5fa3c 1531 if (df_regs_ever_live_p (i) && ((! call_used_regs[i])
29a65e3d
NC
1532 || i == LINK_POINTER_REGNUM))
1533 {
1534 size += 4;
1535 reg_saved |= 1L << i;
1536 }
1537 }
1538 }
1539
ae180d84
JL
1540 if (p_reg_saved)
1541 *p_reg_saved = reg_saved;
1542
1543 return size;
1544}
1545
b84d824d
NC
1546/* Typical stack layout should looks like this after the function's prologue:
1547
1548 | |
1549 -- ^
1550 | | \ |
1551 | | arguments saved | Increasing
1552 | | on the stack | addresses
1553 PARENT arg pointer -> | | /
1554 -------------------------- ---- -------------------
1555 | | - space for argument split between regs & stack
1556 --
1557 CHILD | | \ <-- (return address here)
1558 | | other call
1559 | | saved registers
1560 | | /
1561 --
1562 frame pointer -> | | \ ___
1563 | | local |
1564 | | variables |f
1565 | | / |r
1566 -- |a
1567 | | \ |m
1568 | | outgoing |e
1569 | | arguments | | Decreasing
1570 (hard) frame pointer | | / | | addresses
1571 and stack pointer -> | | / _|_ |
1572 -------------------------- ---- ------------------ V */
1573
ae180d84 1574int
59f3507d 1575compute_frame_size (int size, long * p_reg_saved)
ae180d84 1576{
ae180d84
JL
1577 return (size
1578 + compute_register_save_size (p_reg_saved)
38173d38 1579 + crtl->outgoing_args_size);
ae180d84
JL
1580}
1581
223a9d64
N
1582static int
1583use_prolog_function (int num_save, int frame_size)
1584{
1585 int alloc_stack = (4 * num_save);
1586 int unalloc_stack = frame_size - alloc_stack;
1587 int save_func_len, restore_func_len;
1588 int save_normal_len, restore_normal_len;
1589
1590 if (! TARGET_DISABLE_CALLT)
1591 save_func_len = restore_func_len = 2;
1592 else
1593 save_func_len = restore_func_len = TARGET_LONG_CALLS ? (4+4+4+2+2) : 4;
1594
1595 if (unalloc_stack)
1596 {
1597 save_func_len += CONST_OK_FOR_J (-unalloc_stack) ? 2 : 4;
1598 restore_func_len += CONST_OK_FOR_J (-unalloc_stack) ? 2 : 4;
1599 }
1600
1601 /* See if we would have used ep to save the stack. */
1602 if (TARGET_EP && num_save > 3 && (unsigned)frame_size < 255)
1603 save_normal_len = restore_normal_len = (3 * 2) + (2 * num_save);
1604 else
1605 save_normal_len = restore_normal_len = 4 * num_save;
1606
1607 save_normal_len += CONST_OK_FOR_J (-frame_size) ? 2 : 4;
1608 restore_normal_len += (CONST_OK_FOR_J (frame_size) ? 2 : 4) + 2;
1609
1610 /* Don't bother checking if we don't actually save any space.
1611 This happens for instance if one register is saved and additional
1612 stack space is allocated. */
1613 return ((save_func_len + restore_func_len) < (save_normal_len + restore_normal_len));
1614}
1615
b12b5029 1616static void
b84d824d 1617increment_stack (signed int amount, bool in_prologue)
b12b5029
NC
1618{
1619 rtx inc;
1620
1621 if (amount == 0)
1622 return;
1623
1624 inc = GEN_INT (amount);
1625
1626 if (! CONST_OK_FOR_K (amount))
1627 {
1628 rtx reg = gen_rtx_REG (Pmode, 12);
1629
b84d824d
NC
1630 inc = emit_move_insn (reg, inc);
1631 if (in_prologue)
1632 F (inc);
b12b5029
NC
1633 inc = reg;
1634 }
1635
b84d824d
NC
1636 inc = emit_insn (gen_addsi3 (stack_pointer_rtx, stack_pointer_rtx, inc));
1637 if (in_prologue)
1638 F (inc);
b12b5029
NC
1639}
1640
ae180d84 1641void
59f3507d 1642expand_prologue (void)
ae180d84
JL
1643{
1644 unsigned int i;
ae180d84
JL
1645 unsigned int size = get_frame_size ();
1646 unsigned int actual_fsize;
1647 unsigned int init_stack_alloc = 0;
1648 rtx save_regs[32];
1649 rtx save_all;
3ce15347 1650 unsigned int num_save;
ae180d84
JL
1651 int code;
1652 int interrupt_handler = v850_interrupt_function_p (current_function_decl);
1653 long reg_saved = 0;
1654
1655 actual_fsize = compute_frame_size (size, &reg_saved);
1656
b12b5029
NC
1657 if (flag_stack_usage_info)
1658 current_function_static_stack_size = actual_fsize;
1659
0e668396 1660 /* Save/setup global registers for interrupt functions right now. */
ae180d84
JL
1661 if (interrupt_handler)
1662 {
dbdbd982 1663 if (! TARGET_DISABLE_CALLT && (TARGET_V850E_UP))
b4378319
NC
1664 emit_insn (gen_callt_save_interrupt ());
1665 else
674fdc14 1666 emit_insn (gen_save_interrupt ());
b4378319 1667
ae180d84 1668 actual_fsize -= INTERRUPT_FIXED_SAVE_SIZE;
29a65e3d
NC
1669
1670 if (((1L << LINK_POINTER_REGNUM) & reg_saved) != 0)
ae180d84 1671 actual_fsize -= INTERRUPT_ALL_SAVE_SIZE;
b84d824d
NC
1672
1673 /* Interrupt functions are not passed arguments, so no need to
1674 allocate space for split structure arguments. */
1675 gcc_assert (crtl->args.pretend_args_size == 0);
ae180d84
JL
1676 }
1677
0e668396 1678 /* Identify all of the saved registers. */
ae180d84 1679 num_save = 0;
223a9d64 1680 for (i = 1; i < 32; i++)
ae180d84
JL
1681 {
1682 if (((1L << i) & reg_saved) != 0)
c5c76735 1683 save_regs[num_save++] = gen_rtx_REG (Pmode, i);
ae180d84
JL
1684 }
1685
b84d824d
NC
1686 if (crtl->args.pretend_args_size)
1687 {
1688 if (num_save == 0)
1689 {
1690 increment_stack (- (actual_fsize + crtl->args.pretend_args_size), true);
1691 actual_fsize = 0;
1692 }
1693 else
1694 increment_stack (- crtl->args.pretend_args_size, true);
1695 }
1696
ae180d84 1697 /* See if we have an insn that allocates stack space and saves the particular
b84d824d
NC
1698 registers we want to. Note that the helpers won't
1699 allocate additional space for registers GCC saves to complete a
1700 "split" structure argument. */
ae180d84 1701 save_all = NULL_RTX;
b84d824d
NC
1702 if (TARGET_PROLOG_FUNCTION
1703 && !crtl->args.pretend_args_size
1704 && num_save > 0)
ae180d84 1705 {
223a9d64 1706 if (use_prolog_function (num_save, actual_fsize))
ae180d84 1707 {
223a9d64
N
1708 int alloc_stack = 4 * num_save;
1709 int offset = 0;
1710
c5c76735
JL
1711 save_all = gen_rtx_PARALLEL
1712 (VOIDmode,
fdf3bb57 1713 rtvec_alloc (num_save + 1
223a9d64 1714 + (TARGET_DISABLE_CALLT ? (TARGET_LONG_CALLS ? 2 : 1) : 0)));
c5c76735
JL
1715
1716 XVECEXP (save_all, 0, 0)
1717 = gen_rtx_SET (VOIDmode,
1718 stack_pointer_rtx,
223a9d64
N
1719 gen_rtx_PLUS (Pmode,
1720 stack_pointer_rtx,
1721 GEN_INT(-alloc_stack)));
ae180d84
JL
1722 for (i = 0; i < num_save; i++)
1723 {
223a9d64 1724 offset -= 4;
c5c76735
JL
1725 XVECEXP (save_all, 0, i+1)
1726 = gen_rtx_SET (VOIDmode,
1727 gen_rtx_MEM (Pmode,
223a9d64
N
1728 gen_rtx_PLUS (Pmode,
1729 stack_pointer_rtx,
1730 GEN_INT(offset))),
c5c76735 1731 save_regs[i]);
ae180d84
JL
1732 }
1733
223a9d64 1734 if (TARGET_DISABLE_CALLT)
fdf3bb57
NC
1735 {
1736 XVECEXP (save_all, 0, num_save + 1)
1737 = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (Pmode, 10));
1738
1739 if (TARGET_LONG_CALLS)
1740 XVECEXP (save_all, 0, num_save + 2)
1741 = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (Pmode, 11));
1742 }
1743
b84d824d
NC
1744 v850_all_frame_related (save_all);
1745
df4ae160 1746 code = recog (save_all, NULL_RTX, NULL);
ae180d84
JL
1747 if (code >= 0)
1748 {
1749 rtx insn = emit_insn (save_all);
1750 INSN_CODE (insn) = code;
1751 actual_fsize -= alloc_stack;
29a65e3d 1752
ae180d84
JL
1753 }
1754 else
1755 save_all = NULL_RTX;
1756 }
1757 }
1758
3ce15347 1759 /* If no prolog save function is available, store the registers the old
d4de0221 1760 fashioned way (one by one). */
ae180d84
JL
1761 if (!save_all)
1762 {
1763 /* Special case interrupt functions that save all registers for a call. */
29a65e3d
NC
1764 if (interrupt_handler && ((1L << LINK_POINTER_REGNUM) & reg_saved) != 0)
1765 {
dbdbd982 1766 if (! TARGET_DISABLE_CALLT && (TARGET_V850E_UP))
b4378319
NC
1767 emit_insn (gen_callt_save_all_interrupt ());
1768 else
1769 emit_insn (gen_save_all_interrupt ());
29a65e3d 1770 }
ae180d84
JL
1771 else
1772 {
223a9d64 1773 int offset;
ae180d84
JL
1774 /* If the stack is too big, allocate it in chunks so we can do the
1775 register saves. We use the register save size so we use the ep
1776 register. */
1777 if (actual_fsize && !CONST_OK_FOR_K (-actual_fsize))
1778 init_stack_alloc = compute_register_save_size (NULL);
1779 else
1780 init_stack_alloc = actual_fsize;
145870b5 1781
d4de0221 1782 /* Save registers at the beginning of the stack frame. */
ae180d84 1783 offset = init_stack_alloc - 4;
145870b5 1784
ae180d84 1785 if (init_stack_alloc)
b84d824d 1786 increment_stack (- (signed) init_stack_alloc, true);
145870b5 1787
ae180d84 1788 /* Save the return pointer first. */
29a65e3d 1789 if (num_save > 0 && REGNO (save_regs[num_save-1]) == LINK_POINTER_REGNUM)
ae180d84 1790 {
b84d824d
NC
1791 F (emit_move_insn (gen_rtx_MEM (SImode,
1792 plus_constant (Pmode,
1793 stack_pointer_rtx,
1794 offset)),
1795 save_regs[--num_save]));
ae180d84
JL
1796 offset -= 4;
1797 }
145870b5 1798
ae180d84
JL
1799 for (i = 0; i < num_save; i++)
1800 {
b84d824d
NC
1801 F (emit_move_insn (gen_rtx_MEM (SImode,
1802 plus_constant (Pmode,
1803 stack_pointer_rtx,
1804 offset)),
1805 save_regs[i]));
ae180d84
JL
1806 offset -= 4;
1807 }
1808 }
1809 }
1810
1811 /* Allocate the rest of the stack that was not allocated above (either it is
1812 > 32K or we just called a function to save the registers and needed more
1813 stack. */
1814 if (actual_fsize > init_stack_alloc)
b84d824d 1815 increment_stack (init_stack_alloc - actual_fsize, true);
ae180d84
JL
1816
1817 /* If we need a frame pointer, set it up now. */
1818 if (frame_pointer_needed)
b84d824d 1819 F (emit_move_insn (hard_frame_pointer_rtx, stack_pointer_rtx));
ae180d84
JL
1820}
1821\f
1822
1823void
59f3507d 1824expand_epilogue (void)
ae180d84
JL
1825{
1826 unsigned int i;
ae180d84
JL
1827 unsigned int size = get_frame_size ();
1828 long reg_saved = 0;
fda41d93 1829 int actual_fsize = compute_frame_size (size, &reg_saved);
ae180d84
JL
1830 rtx restore_regs[32];
1831 rtx restore_all;
3ce15347 1832 unsigned int num_restore;
ae180d84
JL
1833 int code;
1834 int interrupt_handler = v850_interrupt_function_p (current_function_decl);
1835
1836 /* Eliminate the initial stack stored by interrupt functions. */
1837 if (interrupt_handler)
1838 {
1839 actual_fsize -= INTERRUPT_FIXED_SAVE_SIZE;
29a65e3d 1840 if (((1L << LINK_POINTER_REGNUM) & reg_saved) != 0)
ae180d84
JL
1841 actual_fsize -= INTERRUPT_ALL_SAVE_SIZE;
1842 }
1843
1844 /* Cut off any dynamic stack created. */
1845 if (frame_pointer_needed)
1846 emit_move_insn (stack_pointer_rtx, hard_frame_pointer_rtx);
1847
0e668396 1848 /* Identify all of the saved registers. */
ae180d84 1849 num_restore = 0;
223a9d64 1850 for (i = 1; i < 32; i++)
ae180d84
JL
1851 {
1852 if (((1L << i) & reg_saved) != 0)
c5c76735 1853 restore_regs[num_restore++] = gen_rtx_REG (Pmode, i);
ae180d84
JL
1854 }
1855
ae180d84
JL
1856 /* See if we have an insn that restores the particular registers we
1857 want to. */
1858 restore_all = NULL_RTX;
223a9d64 1859
0e668396
NC
1860 if (TARGET_PROLOG_FUNCTION
1861 && num_restore > 0
b84d824d 1862 && !crtl->args.pretend_args_size
ae180d84
JL
1863 && !interrupt_handler)
1864 {
223a9d64 1865 int alloc_stack = (4 * num_restore);
ae180d84 1866
ae180d84 1867 /* Don't bother checking if we don't actually save any space. */
223a9d64 1868 if (use_prolog_function (num_restore, actual_fsize))
ae180d84 1869 {
223a9d64 1870 int offset;
c5c76735
JL
1871 restore_all = gen_rtx_PARALLEL (VOIDmode,
1872 rtvec_alloc (num_restore + 2));
3810076b 1873 XVECEXP (restore_all, 0, 0) = ret_rtx;
ae180d84 1874 XVECEXP (restore_all, 0, 1)
c5c76735
JL
1875 = gen_rtx_SET (VOIDmode, stack_pointer_rtx,
1876 gen_rtx_PLUS (Pmode,
1877 stack_pointer_rtx,
1878 GEN_INT (alloc_stack)));
ae180d84
JL
1879
1880 offset = alloc_stack - 4;
1881 for (i = 0; i < num_restore; i++)
1882 {
1883 XVECEXP (restore_all, 0, i+2)
c5c76735
JL
1884 = gen_rtx_SET (VOIDmode,
1885 restore_regs[i],
1886 gen_rtx_MEM (Pmode,
223a9d64
N
1887 gen_rtx_PLUS (Pmode,
1888 stack_pointer_rtx,
1889 GEN_INT(offset))));
ae180d84
JL
1890 offset -= 4;
1891 }
1892
df4ae160 1893 code = recog (restore_all, NULL_RTX, NULL);
0e668396 1894
ae180d84
JL
1895 if (code >= 0)
1896 {
1897 rtx insn;
1898
1899 actual_fsize -= alloc_stack;
b84d824d 1900 increment_stack (actual_fsize, false);
ae180d84
JL
1901
1902 insn = emit_jump_insn (restore_all);
1903 INSN_CODE (insn) = code;
ae180d84
JL
1904 }
1905 else
1906 restore_all = NULL_RTX;
1907 }
1908 }
1909
22f23985 1910 /* If no epilogue save function is available, restore the registers the
0e668396 1911 old fashioned way (one by one). */
ae180d84
JL
1912 if (!restore_all)
1913 {
223a9d64
N
1914 unsigned int init_stack_free;
1915
ae180d84 1916 /* If the stack is large, we need to cut it down in 2 pieces. */
223a9d64
N
1917 if (interrupt_handler)
1918 init_stack_free = 0;
1919 else if (actual_fsize && !CONST_OK_FOR_K (-actual_fsize))
ae180d84
JL
1920 init_stack_free = 4 * num_restore;
1921 else
fda41d93 1922 init_stack_free = (signed) actual_fsize;
ae180d84 1923
0e668396 1924 /* Deallocate the rest of the stack if it is > 32K. */
5a82ecd9 1925 if ((unsigned int) actual_fsize > init_stack_free)
b84d824d 1926 increment_stack (actual_fsize - init_stack_free, false);
ae180d84
JL
1927
1928 /* Special case interrupt functions that save all registers
1929 for a call. */
29a65e3d
NC
1930 if (interrupt_handler && ((1L << LINK_POINTER_REGNUM) & reg_saved) != 0)
1931 {
223a9d64 1932 if (! TARGET_DISABLE_CALLT)
b4378319
NC
1933 emit_insn (gen_callt_restore_all_interrupt ());
1934 else
1935 emit_insn (gen_restore_all_interrupt ());
29a65e3d 1936 }
ae180d84
JL
1937 else
1938 {
0e668396 1939 /* Restore registers from the beginning of the stack frame. */
223a9d64 1940 int offset = init_stack_free - 4;
ae180d84
JL
1941
1942 /* Restore the return pointer first. */
29a65e3d
NC
1943 if (num_restore > 0
1944 && REGNO (restore_regs [num_restore - 1]) == LINK_POINTER_REGNUM)
ae180d84
JL
1945 {
1946 emit_move_insn (restore_regs[--num_restore],
c5c76735 1947 gen_rtx_MEM (SImode,
0a81f074
RS
1948 plus_constant (Pmode,
1949 stack_pointer_rtx,
c5c76735 1950 offset)));
ae180d84
JL
1951 offset -= 4;
1952 }
1953
1954 for (i = 0; i < num_restore; i++)
1955 {
1956 emit_move_insn (restore_regs[i],
c5c76735 1957 gen_rtx_MEM (SImode,
0a81f074
RS
1958 plus_constant (Pmode,
1959 stack_pointer_rtx,
c5c76735 1960 offset)));
ae180d84 1961
c41c1387 1962 emit_use (restore_regs[i]);
ae180d84
JL
1963 offset -= 4;
1964 }
1965
1966 /* Cut back the remainder of the stack. */
b84d824d
NC
1967 increment_stack (init_stack_free + crtl->args.pretend_args_size,
1968 false);
ae180d84
JL
1969 }
1970
1971 /* And return or use reti for interrupt handlers. */
1972 if (interrupt_handler)
b4378319 1973 {
dbdbd982 1974 if (! TARGET_DISABLE_CALLT && (TARGET_V850E_UP))
b4378319
NC
1975 emit_insn (gen_callt_return_interrupt ());
1976 else
1977 emit_jump_insn (gen_return_interrupt ());
1978 }
ae180d84
JL
1979 else if (actual_fsize)
1980 emit_jump_insn (gen_return_internal ());
1981 else
7323a100 1982 emit_jump_insn (gen_return_simple ());
ae180d84
JL
1983 }
1984
ae180d84
JL
1985 v850_interrupt_cache_p = FALSE;
1986 v850_interrupt_p = FALSE;
1987}
1988
ae180d84 1989/* Update the condition code from the insn. */
ae180d84 1990void
59f3507d 1991notice_update_cc (rtx body, rtx insn)
ae180d84
JL
1992{
1993 switch (get_attr_cc (insn))
1994 {
1995 case CC_NONE:
1996 /* Insn does not affect CC at all. */
1997 break;
1998
1999 case CC_NONE_0HIT:
2000 /* Insn does not change CC, but the 0'th operand has been changed. */
2001 if (cc_status.value1 != 0
1ccbefce 2002 && reg_overlap_mentioned_p (recog_data.operand[0], cc_status.value1))
ae180d84
JL
2003 cc_status.value1 = 0;
2004 break;
2005
2006 case CC_SET_ZN:
1ccbefce 2007 /* Insn sets the Z,N flags of CC to recog_data.operand[0].
ae180d84
JL
2008 V,C is in an unusable state. */
2009 CC_STATUS_INIT;
2010 cc_status.flags |= CC_OVERFLOW_UNUSABLE | CC_NO_CARRY;
1ccbefce 2011 cc_status.value1 = recog_data.operand[0];
ae180d84
JL
2012 break;
2013
2014 case CC_SET_ZNV:
1ccbefce 2015 /* Insn sets the Z,N,V flags of CC to recog_data.operand[0].
223a9d64 2016 C is in an unusable state. */
ae180d84
JL
2017 CC_STATUS_INIT;
2018 cc_status.flags |= CC_NO_CARRY;
1ccbefce 2019 cc_status.value1 = recog_data.operand[0];
ae180d84
JL
2020 break;
2021
2022 case CC_COMPARE:
2023 /* The insn is a compare instruction. */
2024 CC_STATUS_INIT;
2025 cc_status.value1 = SET_SRC (body);
2026 break;
2027
2028 case CC_CLOBBER:
2029 /* Insn doesn't leave CC in a usable state. */
2030 CC_STATUS_INIT;
2031 break;
122603fa
N
2032
2033 default:
2034 break;
ae180d84
JL
2035 }
2036}
223a9d64 2037
3ce15347 2038/* Retrieve the data area that has been chosen for the given decl. */
ae180d84 2039
3ce15347 2040v850_data_area
59f3507d 2041v850_get_data_area (tree decl)
3ce15347 2042{
91d231cb 2043 if (lookup_attribute ("sda", DECL_ATTRIBUTES (decl)) != NULL_TREE)
3ce15347
NC
2044 return DATA_AREA_SDA;
2045
91d231cb 2046 if (lookup_attribute ("tda", DECL_ATTRIBUTES (decl)) != NULL_TREE)
3ce15347
NC
2047 return DATA_AREA_TDA;
2048
91d231cb 2049 if (lookup_attribute ("zda", DECL_ATTRIBUTES (decl)) != NULL_TREE)
3ce15347
NC
2050 return DATA_AREA_ZDA;
2051
2052 return DATA_AREA_NORMAL;
2053}
ae180d84 2054
3ce15347
NC
2055/* Store the indicated data area in the decl's attributes. */
2056
2057static void
59f3507d 2058v850_set_data_area (tree decl, v850_data_area data_area)
3ce15347
NC
2059{
2060 tree name;
2061
2062 switch (data_area)
2063 {
2064 case DATA_AREA_SDA: name = get_identifier ("sda"); break;
2065 case DATA_AREA_TDA: name = get_identifier ("tda"); break;
2066 case DATA_AREA_ZDA: name = get_identifier ("zda"); break;
2067 default:
2068 return;
2069 }
2070
91d231cb
JM
2071 DECL_ATTRIBUTES (decl) = tree_cons
2072 (name, NULL, DECL_ATTRIBUTES (decl));
3ce15347
NC
2073}
2074\f
91d231cb
JM
2075/* Handle an "interrupt" attribute; arguments as in
2076 struct attribute_spec.handler. */
2077static tree
59f3507d
NN
2078v850_handle_interrupt_attribute (tree * node,
2079 tree name,
2080 tree args ATTRIBUTE_UNUSED,
2081 int flags ATTRIBUTE_UNUSED,
2082 bool * no_add_attrs)
91d231cb
JM
2083{
2084 if (TREE_CODE (*node) != FUNCTION_DECL)
2085 {
29d08eba
JM
2086 warning (OPT_Wattributes, "%qE attribute only applies to functions",
2087 name);
91d231cb
JM
2088 *no_add_attrs = true;
2089 }
2090
2091 return NULL_TREE;
2092}
2093
2094/* Handle a "sda", "tda" or "zda" attribute; arguments as in
2095 struct attribute_spec.handler. */
2096static tree
59f3507d
NN
2097v850_handle_data_area_attribute (tree* node,
2098 tree name,
2099 tree args ATTRIBUTE_UNUSED,
2100 int flags ATTRIBUTE_UNUSED,
2101 bool * no_add_attrs)
ae180d84 2102{
3ce15347
NC
2103 v850_data_area data_area;
2104 v850_data_area area;
91d231cb 2105 tree decl = *node;
ae180d84 2106
3ce15347 2107 /* Implement data area attribute. */
91d231cb 2108 if (is_attribute_p ("sda", name))
3ce15347 2109 data_area = DATA_AREA_SDA;
91d231cb 2110 else if (is_attribute_p ("tda", name))
3ce15347 2111 data_area = DATA_AREA_TDA;
91d231cb 2112 else if (is_attribute_p ("zda", name))
3ce15347
NC
2113 data_area = DATA_AREA_ZDA;
2114 else
f2f84cba 2115 gcc_unreachable ();
3ce15347
NC
2116
2117 switch (TREE_CODE (decl))
2118 {
2119 case VAR_DECL:
2120 if (current_function_decl != NULL_TREE)
91d231cb 2121 {
c5d75364
MLI
2122 error_at (DECL_SOURCE_LOCATION (decl),
2123 "data area attributes cannot be specified for "
2124 "local variables");
91d231cb
JM
2125 *no_add_attrs = true;
2126 }
2127
3ce15347
NC
2128 /* Drop through. */
2129
2130 case FUNCTION_DECL:
2131 area = v850_get_data_area (decl);
2132 if (area != DATA_AREA_NORMAL && data_area != area)
91d231cb 2133 {
dee15844
JM
2134 error ("data area of %q+D conflicts with previous declaration",
2135 decl);
91d231cb
JM
2136 *no_add_attrs = true;
2137 }
2138 break;
3ce15347
NC
2139
2140 default:
2141 break;
2142 }
91d231cb
JM
2143
2144 return NULL_TREE;
ae180d84
JL
2145}
2146
2147\f
2148/* Return nonzero if FUNC is an interrupt function as specified
2149 by the "interrupt" attribute. */
2150
2151int
59f3507d 2152v850_interrupt_function_p (tree func)
ae180d84
JL
2153{
2154 tree a;
2155 int ret = 0;
2156
2157 if (v850_interrupt_cache_p)
2158 return v850_interrupt_p;
2159
2160 if (TREE_CODE (func) != FUNCTION_DECL)
2161 return 0;
2162
91d231cb 2163 a = lookup_attribute ("interrupt_handler", DECL_ATTRIBUTES (func));
ae180d84
JL
2164 if (a != NULL_TREE)
2165 ret = 1;
2166
2167 else
2168 {
91d231cb 2169 a = lookup_attribute ("interrupt", DECL_ATTRIBUTES (func));
ae180d84
JL
2170 ret = a != NULL_TREE;
2171 }
2172
2173 /* Its not safe to trust global variables until after function inlining has
2174 been done. */
2175 if (reload_completed | reload_in_progress)
2176 v850_interrupt_p = ret;
2177
2178 return ret;
2179}
2180
2181\f
fb49053f 2182static void
59f3507d 2183v850_encode_data_area (tree decl, rtx symbol)
ae180d84 2184{
50d1ff6a 2185 int flags;
3ce15347 2186
839a4992 2187 /* Map explicit sections into the appropriate attribute */
3ce15347
NC
2188 if (v850_get_data_area (decl) == DATA_AREA_NORMAL)
2189 {
2190 if (DECL_SECTION_NAME (decl))
2191 {
3cce094d 2192 const char *name = TREE_STRING_POINTER (DECL_SECTION_NAME (decl));
3ce15347
NC
2193
2194 if (streq (name, ".zdata") || streq (name, ".zbss"))
2195 v850_set_data_area (decl, DATA_AREA_ZDA);
2196
2197 else if (streq (name, ".sdata") || streq (name, ".sbss"))
2198 v850_set_data_area (decl, DATA_AREA_SDA);
2199
2200 else if (streq (name, ".tdata"))
2201 v850_set_data_area (decl, DATA_AREA_TDA);
2202 }
2203
2204 /* If no attribute, support -m{zda,sda,tda}=n */
2205 else
2206 {
2207 int size = int_size_in_bytes (TREE_TYPE (decl));
2208 if (size <= 0)
2209 ;
2210
4a8d3d91 2211 else if (size <= small_memory_max [(int) SMALL_MEMORY_TDA])
3ce15347
NC
2212 v850_set_data_area (decl, DATA_AREA_TDA);
2213
4a8d3d91 2214 else if (size <= small_memory_max [(int) SMALL_MEMORY_SDA])
3ce15347
NC
2215 v850_set_data_area (decl, DATA_AREA_SDA);
2216
4a8d3d91 2217 else if (size <= small_memory_max [(int) SMALL_MEMORY_ZDA])
3ce15347
NC
2218 v850_set_data_area (decl, DATA_AREA_ZDA);
2219 }
2220
2221 if (v850_get_data_area (decl) == DATA_AREA_NORMAL)
2222 return;
2223 }
2224
50d1ff6a 2225 flags = SYMBOL_REF_FLAGS (symbol);
3ce15347
NC
2226 switch (v850_get_data_area (decl))
2227 {
50d1ff6a
RH
2228 case DATA_AREA_ZDA: flags |= SYMBOL_FLAG_ZDA; break;
2229 case DATA_AREA_TDA: flags |= SYMBOL_FLAG_TDA; break;
2230 case DATA_AREA_SDA: flags |= SYMBOL_FLAG_SDA; break;
f2f84cba 2231 default: gcc_unreachable ();
3ce15347 2232 }
50d1ff6a 2233 SYMBOL_REF_FLAGS (symbol) = flags;
ae180d84 2234}
145870b5 2235
fb49053f 2236static void
59f3507d 2237v850_encode_section_info (tree decl, rtx rtl, int first)
fb49053f 2238{
c6a2438a 2239 default_encode_section_info (decl, rtl, first);
50d1ff6a
RH
2240
2241 if (TREE_CODE (decl) == VAR_DECL
fb49053f 2242 && (TREE_STATIC (decl) || DECL_EXTERNAL (decl)))
c6a2438a 2243 v850_encode_data_area (decl, XEXP (rtl, 0));
fb49053f
RH
2244}
2245
145870b5
NC
2246/* Construct a JR instruction to a routine that will perform the equivalent of
2247 the RTL passed in as an argument. This RTL is a function epilogue that
2248 pops registers off the stack and possibly releases some extra stack space
2249 as well. The code has already verified that the RTL matches these
2250 requirements. */
223a9d64 2251
145870b5 2252char *
59f3507d 2253construct_restore_jr (rtx op)
145870b5
NC
2254{
2255 int count = XVECLEN (op, 0);
2256 int stack_bytes;
2257 unsigned long int mask;
2258 unsigned long int first;
2259 unsigned long int last;
2260 int i;
2261 static char buff [100]; /* XXX */
2262
2263 if (count <= 2)
2264 {
ab532386 2265 error ("bogus JR construction: %d", count);
145870b5
NC
2266 return NULL;
2267 }
2268
2269 /* Work out how many bytes to pop off the stack before retrieving
2270 registers. */
f2f84cba
NS
2271 gcc_assert (GET_CODE (XVECEXP (op, 0, 1)) == SET);
2272 gcc_assert (GET_CODE (SET_SRC (XVECEXP (op, 0, 1))) == PLUS);
2273 gcc_assert (GET_CODE (XEXP (SET_SRC (XVECEXP (op, 0, 1)), 1)) == CONST_INT);
145870b5
NC
2274
2275 stack_bytes = INTVAL (XEXP (SET_SRC (XVECEXP (op, 0, 1)), 1));
2276
d4de0221 2277 /* Each pop will remove 4 bytes from the stack.... */
145870b5
NC
2278 stack_bytes -= (count - 2) * 4;
2279
2280 /* Make sure that the amount we are popping either 0 or 16 bytes. */
223a9d64 2281 if (stack_bytes != 0)
145870b5 2282 {
c725bd79 2283 error ("bad amount of stack space removal: %d", stack_bytes);
145870b5
NC
2284 return NULL;
2285 }
2286
2287 /* Now compute the bit mask of registers to push. */
2288 mask = 0;
2289 for (i = 2; i < count; i++)
2290 {
2291 rtx vector_element = XVECEXP (op, 0, i);
2292
f2f84cba
NS
2293 gcc_assert (GET_CODE (vector_element) == SET);
2294 gcc_assert (GET_CODE (SET_DEST (vector_element)) == REG);
2295 gcc_assert (register_is_ok_for_epilogue (SET_DEST (vector_element),
2296 SImode));
145870b5
NC
2297
2298 mask |= 1 << REGNO (SET_DEST (vector_element));
2299 }
2300
2301 /* Scan for the first register to pop. */
2302 for (first = 0; first < 32; first++)
2303 {
2304 if (mask & (1 << first))
2305 break;
2306 }
2307
f2f84cba 2308 gcc_assert (first < 32);
145870b5
NC
2309
2310 /* Discover the last register to pop. */
29a65e3d 2311 if (mask & (1 << LINK_POINTER_REGNUM))
145870b5 2312 {
29a65e3d 2313 last = LINK_POINTER_REGNUM;
145870b5
NC
2314 }
2315 else
2316 {
f2f84cba
NS
2317 gcc_assert (!stack_bytes);
2318 gcc_assert (mask & (1 << 29));
145870b5
NC
2319
2320 last = 29;
2321 }
2322
323d8e7b
JL
2323 /* Note, it is possible to have gaps in the register mask.
2324 We ignore this here, and generate a JR anyway. We will
3ce15347 2325 be popping more registers than is strictly necessary, but
323d8e7b
JL
2326 it does save code space. */
2327
be1d3f93
NC
2328 if (TARGET_LONG_CALLS)
2329 {
2330 char name[40];
2331
2332 if (first == last)
2333 sprintf (name, "__return_%s", reg_names [first]);
2334 else
2335 sprintf (name, "__return_%s_%s", reg_names [first], reg_names [last]);
2336
2337 sprintf (buff, "movhi hi(%s), r0, r6\n\tmovea lo(%s), r6, r6\n\tjmp r6",
2338 name, name);
2339 }
145870b5 2340 else
be1d3f93
NC
2341 {
2342 if (first == last)
2343 sprintf (buff, "jr __return_%s", reg_names [first]);
2344 else
2345 sprintf (buff, "jr __return_%s_%s", reg_names [first], reg_names [last]);
2346 }
2347
145870b5
NC
2348 return buff;
2349}
2350
2351
145870b5
NC
2352/* Construct a JARL instruction to a routine that will perform the equivalent
2353 of the RTL passed as a parameter. This RTL is a function prologue that
2354 saves some of the registers r20 - r31 onto the stack, and possibly acquires
2355 some stack space as well. The code has already verified that the RTL
2356 matches these requirements. */
2357char *
59f3507d 2358construct_save_jarl (rtx op)
145870b5
NC
2359{
2360 int count = XVECLEN (op, 0);
2361 int stack_bytes;
2362 unsigned long int mask;
2363 unsigned long int first;
2364 unsigned long int last;
2365 int i;
2366 static char buff [100]; /* XXX */
2367
223a9d64 2368 if (count <= (TARGET_LONG_CALLS ? 3 : 2))
145870b5 2369 {
d8a07487 2370 error ("bogus JARL construction: %d", count);
145870b5
NC
2371 return NULL;
2372 }
2373
2374 /* Paranoia. */
f2f84cba
NS
2375 gcc_assert (GET_CODE (XVECEXP (op, 0, 0)) == SET);
2376 gcc_assert (GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) == PLUS);
2377 gcc_assert (GET_CODE (XEXP (SET_SRC (XVECEXP (op, 0, 0)), 0)) == REG);
2378 gcc_assert (GET_CODE (XEXP (SET_SRC (XVECEXP (op, 0, 0)), 1)) == CONST_INT);
145870b5
NC
2379
2380 /* Work out how many bytes to push onto the stack after storing the
2381 registers. */
2382 stack_bytes = INTVAL (XEXP (SET_SRC (XVECEXP (op, 0, 0)), 1));
2383
d4de0221 2384 /* Each push will put 4 bytes from the stack.... */
fdf3bb57 2385 stack_bytes += (count - (TARGET_LONG_CALLS ? 3 : 2)) * 4;
145870b5
NC
2386
2387 /* Make sure that the amount we are popping either 0 or 16 bytes. */
223a9d64 2388 if (stack_bytes != 0)
145870b5 2389 {
c725bd79 2390 error ("bad amount of stack space removal: %d", stack_bytes);
145870b5
NC
2391 return NULL;
2392 }
2393
2394 /* Now compute the bit mask of registers to push. */
2395 mask = 0;
fdf3bb57 2396 for (i = 1; i < count - (TARGET_LONG_CALLS ? 2 : 1); i++)
145870b5
NC
2397 {
2398 rtx vector_element = XVECEXP (op, 0, i);
2399
f2f84cba
NS
2400 gcc_assert (GET_CODE (vector_element) == SET);
2401 gcc_assert (GET_CODE (SET_SRC (vector_element)) == REG);
2402 gcc_assert (register_is_ok_for_epilogue (SET_SRC (vector_element),
2403 SImode));
145870b5
NC
2404
2405 mask |= 1 << REGNO (SET_SRC (vector_element));
2406 }
2407
2408 /* Scan for the first register to push. */
2409 for (first = 0; first < 32; first++)
2410 {
2411 if (mask & (1 << first))
2412 break;
2413 }
2414
f2f84cba 2415 gcc_assert (first < 32);
145870b5
NC
2416
2417 /* Discover the last register to push. */
29a65e3d 2418 if (mask & (1 << LINK_POINTER_REGNUM))
145870b5 2419 {
29a65e3d 2420 last = LINK_POINTER_REGNUM;
145870b5
NC
2421 }
2422 else
2423 {
f2f84cba
NS
2424 gcc_assert (!stack_bytes);
2425 gcc_assert (mask & (1 << 29));
145870b5
NC
2426
2427 last = 29;
2428 }
2429
323d8e7b
JL
2430 /* Note, it is possible to have gaps in the register mask.
2431 We ignore this here, and generate a JARL anyway. We will
3ce15347 2432 be pushing more registers than is strictly necessary, but
323d8e7b
JL
2433 it does save code space. */
2434
be1d3f93
NC
2435 if (TARGET_LONG_CALLS)
2436 {
2437 char name[40];
2438
2439 if (first == last)
2440 sprintf (name, "__save_%s", reg_names [first]);
2441 else
2442 sprintf (name, "__save_%s_%s", reg_names [first], reg_names [last]);
2443
dbdbd982
NC
2444 if (TARGET_V850E3V5_UP)
2445 sprintf (buff, "mov hilo(%s), r11\n\tjarl [r11], r10", name);
2446 else
2447 sprintf (buff, "movhi hi(%s), r0, r11\n\tmovea lo(%s), r11, r11\n\tjarl .+4, r10\n\tadd 4, r10\n\tjmp r11",
2448 name, name);
be1d3f93 2449 }
145870b5 2450 else
be1d3f93
NC
2451 {
2452 if (first == last)
2453 sprintf (buff, "jarl __save_%s, r10", reg_names [first]);
2454 else
2455 sprintf (buff, "jarl __save_%s_%s, r10", reg_names [first],
2456 reg_names [last]);
2457 }
145870b5
NC
2458
2459 return buff;
2460}
2461
3ce15347 2462/* A version of asm_output_aligned_bss() that copes with the special
d4de0221 2463 data areas of the v850. */
3ce15347 2464void
59f3507d
NN
2465v850_output_aligned_bss (FILE * file,
2466 tree decl,
2467 const char * name,
ea40ba9c 2468 unsigned HOST_WIDE_INT size,
59f3507d 2469 int align)
3ce15347 2470{
3ce15347
NC
2471 switch (v850_get_data_area (decl))
2472 {
2473 case DATA_AREA_ZDA:
d6b5193b 2474 switch_to_section (zbss_section);
3ce15347
NC
2475 break;
2476
2477 case DATA_AREA_SDA:
d6b5193b 2478 switch_to_section (sbss_section);
3ce15347
NC
2479 break;
2480
2481 case DATA_AREA_TDA:
d6b5193b 2482 switch_to_section (tdata_section);
3ce15347
NC
2483
2484 default:
d6b5193b 2485 switch_to_section (bss_section);
3ce15347
NC
2486 break;
2487 }
2488
2489 ASM_OUTPUT_ALIGN (file, floor_log2 (align / BITS_PER_UNIT));
2490#ifdef ASM_DECLARE_OBJECT_NAME
2491 last_assemble_variable_decl = decl;
2492 ASM_DECLARE_OBJECT_NAME (file, name, decl);
2493#else
2494 /* Standard thing is just output label for the object. */
2495 ASM_OUTPUT_LABEL (file, name);
2496#endif /* ASM_DECLARE_OBJECT_NAME */
2497 ASM_OUTPUT_SKIP (file, size ? size : 1);
2498}
2499
2500/* Called via the macro ASM_OUTPUT_DECL_COMMON */
2501void
59f3507d
NN
2502v850_output_common (FILE * file,
2503 tree decl,
2504 const char * name,
2505 int size,
2506 int align)
3ce15347
NC
2507{
2508 if (decl == NULL_TREE)
2509 {
b9f7d63e 2510 fprintf (file, "%s", COMMON_ASM_OP);
3ce15347
NC
2511 }
2512 else
2513 {
2514 switch (v850_get_data_area (decl))
2515 {
2516 case DATA_AREA_ZDA:
b9f7d63e 2517 fprintf (file, "%s", ZCOMMON_ASM_OP);
3ce15347
NC
2518 break;
2519
2520 case DATA_AREA_SDA:
b9f7d63e 2521 fprintf (file, "%s", SCOMMON_ASM_OP);
3ce15347
NC
2522 break;
2523
2524 case DATA_AREA_TDA:
b9f7d63e 2525 fprintf (file, "%s", TCOMMON_ASM_OP);
3ce15347
NC
2526 break;
2527
2528 default:
b9f7d63e 2529 fprintf (file, "%s", COMMON_ASM_OP);
3ce15347
NC
2530 break;
2531 }
2532 }
2533
2534 assemble_name (file, name);
2535 fprintf (file, ",%u,%u\n", size, align / BITS_PER_UNIT);
2536}
2537
2538/* Called via the macro ASM_OUTPUT_DECL_LOCAL */
2539void
59f3507d
NN
2540v850_output_local (FILE * file,
2541 tree decl,
2542 const char * name,
2543 int size,
2544 int align)
3ce15347 2545{
b9f7d63e 2546 fprintf (file, "%s", LOCAL_ASM_OP);
3ce15347
NC
2547 assemble_name (file, name);
2548 fprintf (file, "\n");
2549
2550 ASM_OUTPUT_ALIGNED_DECL_COMMON (file, decl, name, size, align);
2551}
3ce15347
NC
2552
2553/* Add data area to the given declaration if a ghs data area pragma is
2554 currently in effect (#pragma ghs startXXX/endXXX). */
12a68f1f 2555static void
59f3507d 2556v850_insert_attributes (tree decl, tree * attr_ptr ATTRIBUTE_UNUSED )
3ce15347
NC
2557{
2558 if (data_area_stack
2559 && data_area_stack->data_area
2560 && current_function_decl == NULL_TREE
2561 && (TREE_CODE (decl) == VAR_DECL || TREE_CODE (decl) == CONST_DECL)
2562 && v850_get_data_area (decl) == DATA_AREA_NORMAL)
2563 v850_set_data_area (decl, data_area_stack->data_area);
2564
4912a07c 2565 /* Initialize the default names of the v850 specific sections,
3ce15347
NC
2566 if this has not been done before. */
2567
2568 if (GHS_default_section_names [(int) GHS_SECTION_KIND_SDATA] == NULL)
2569 {
2570 GHS_default_section_names [(int) GHS_SECTION_KIND_SDATA]
2571 = build_string (sizeof (".sdata")-1, ".sdata");
2572
2573 GHS_default_section_names [(int) GHS_SECTION_KIND_ROSDATA]
2574 = build_string (sizeof (".rosdata")-1, ".rosdata");
2575
2576 GHS_default_section_names [(int) GHS_SECTION_KIND_TDATA]
2577 = build_string (sizeof (".tdata")-1, ".tdata");
2578
2579 GHS_default_section_names [(int) GHS_SECTION_KIND_ZDATA]
2580 = build_string (sizeof (".zdata")-1, ".zdata");
2581
2582 GHS_default_section_names [(int) GHS_SECTION_KIND_ROZDATA]
2583 = build_string (sizeof (".rozdata")-1, ".rozdata");
2584 }
2585
2586 if (current_function_decl == NULL_TREE
2587 && (TREE_CODE (decl) == VAR_DECL
2588 || TREE_CODE (decl) == CONST_DECL
2589 || TREE_CODE (decl) == FUNCTION_DECL)
2590 && (!DECL_EXTERNAL (decl) || DECL_INITIAL (decl))
2591 && !DECL_SECTION_NAME (decl))
2592 {
2593 enum GHS_section_kind kind = GHS_SECTION_KIND_DEFAULT;
2594 tree chosen_section;
2595
2596 if (TREE_CODE (decl) == FUNCTION_DECL)
2597 kind = GHS_SECTION_KIND_TEXT;
2598 else
2599 {
d4de0221 2600 /* First choose a section kind based on the data area of the decl. */
3ce15347
NC
2601 switch (v850_get_data_area (decl))
2602 {
2603 default:
f2f84cba 2604 gcc_unreachable ();
3ce15347
NC
2605
2606 case DATA_AREA_SDA:
2607 kind = ((TREE_READONLY (decl))
2608 ? GHS_SECTION_KIND_ROSDATA
2609 : GHS_SECTION_KIND_SDATA);
2610 break;
2611
2612 case DATA_AREA_TDA:
2613 kind = GHS_SECTION_KIND_TDATA;
2614 break;
2615
2616 case DATA_AREA_ZDA:
2617 kind = ((TREE_READONLY (decl))
2618 ? GHS_SECTION_KIND_ROZDATA
2619 : GHS_SECTION_KIND_ZDATA);
2620 break;
2621
2622 case DATA_AREA_NORMAL: /* default data area */
2623 if (TREE_READONLY (decl))
2624 kind = GHS_SECTION_KIND_RODATA;
2625 else if (DECL_INITIAL (decl))
2626 kind = GHS_SECTION_KIND_DATA;
2627 else
2628 kind = GHS_SECTION_KIND_BSS;
2629 }
2630 }
2631
2632 /* Now, if the section kind has been explicitly renamed,
d4de0221 2633 then attach a section attribute. */
3ce15347
NC
2634 chosen_section = GHS_current_section_names [(int) kind];
2635
2636 /* Otherwise, if this kind of section needs an explicit section
d4de0221 2637 attribute, then also attach one. */
3ce15347
NC
2638 if (chosen_section == NULL)
2639 chosen_section = GHS_default_section_names [(int) kind];
2640
2641 if (chosen_section)
2642 {
2643 /* Only set the section name if specified by a pragma, because
2644 otherwise it will force those variables to get allocated storage
2645 in this module, rather than by the linker. */
2646 DECL_SECTION_NAME (decl) = chosen_section;
2647 }
2648 }
2649}
b4378319 2650
b4378319
NC
2651/* Construct a DISPOSE instruction that is the equivalent of
2652 the given RTX. We have already verified that this should
2653 be possible. */
2654
2655char *
59f3507d 2656construct_dispose_instruction (rtx op)
b4378319
NC
2657{
2658 int count = XVECLEN (op, 0);
2659 int stack_bytes;
2660 unsigned long int mask;
2661 int i;
2662 static char buff[ 100 ]; /* XXX */
2663 int use_callt = 0;
2664
2665 if (count <= 2)
2666 {
ab532386 2667 error ("bogus DISPOSE construction: %d", count);
b4378319
NC
2668 return NULL;
2669 }
2670
2671 /* Work out how many bytes to pop off the
2672 stack before retrieving registers. */
f2f84cba
NS
2673 gcc_assert (GET_CODE (XVECEXP (op, 0, 1)) == SET);
2674 gcc_assert (GET_CODE (SET_SRC (XVECEXP (op, 0, 1))) == PLUS);
2675 gcc_assert (GET_CODE (XEXP (SET_SRC (XVECEXP (op, 0, 1)), 1)) == CONST_INT);
b4378319
NC
2676
2677 stack_bytes = INTVAL (XEXP (SET_SRC (XVECEXP (op, 0, 1)), 1));
2678
d4de0221 2679 /* Each pop will remove 4 bytes from the stack.... */
b4378319
NC
2680 stack_bytes -= (count - 2) * 4;
2681
2682 /* Make sure that the amount we are popping
2683 will fit into the DISPOSE instruction. */
2684 if (stack_bytes > 128)
2685 {
ab532386 2686 error ("too much stack space to dispose of: %d", stack_bytes);
b4378319
NC
2687 return NULL;
2688 }
2689
2690 /* Now compute the bit mask of registers to push. */
2691 mask = 0;
2692
2693 for (i = 2; i < count; i++)
2694 {
2695 rtx vector_element = XVECEXP (op, 0, i);
2696
f2f84cba
NS
2697 gcc_assert (GET_CODE (vector_element) == SET);
2698 gcc_assert (GET_CODE (SET_DEST (vector_element)) == REG);
2699 gcc_assert (register_is_ok_for_epilogue (SET_DEST (vector_element),
2700 SImode));
b4378319
NC
2701
2702 if (REGNO (SET_DEST (vector_element)) == 2)
2703 use_callt = 1;
2704 else
2705 mask |= 1 << REGNO (SET_DEST (vector_element));
2706 }
2707
2708 if (! TARGET_DISABLE_CALLT
223a9d64 2709 && (use_callt || stack_bytes == 0))
b4378319
NC
2710 {
2711 if (use_callt)
2712 {
2713 sprintf (buff, "callt ctoff(__callt_return_r2_r%d)", (mask & (1 << 31)) ? 31 : 29);
2714 return buff;
2715 }
2716 else
2717 {
2718 for (i = 20; i < 32; i++)
2719 if (mask & (1 << i))
2720 break;
2721
2722 if (i == 31)
2723 sprintf (buff, "callt ctoff(__callt_return_r31c)");
2724 else
223a9d64
N
2725 sprintf (buff, "callt ctoff(__callt_return_r%d_r%s)",
2726 i, (mask & (1 << 31)) ? "31c" : "29");
b4378319
NC
2727 }
2728 }
2729 else
2730 {
2731 static char regs [100]; /* XXX */
2732 int done_one;
2733
2734 /* Generate the DISPOSE instruction. Note we could just issue the
2735 bit mask as a number as the assembler can cope with this, but for
2736 the sake of our readers we turn it into a textual description. */
2737 regs[0] = 0;
2738 done_one = 0;
2739
2740 for (i = 20; i < 32; i++)
2741 {
2742 if (mask & (1 << i))
2743 {
2744 int first;
2745
2746 if (done_one)
2747 strcat (regs, ", ");
2748 else
2749 done_one = 1;
2750
2751 first = i;
2752 strcat (regs, reg_names[ first ]);
2753
2754 for (i++; i < 32; i++)
2755 if ((mask & (1 << i)) == 0)
2756 break;
2757
2758 if (i > first + 1)
2759 {
2760 strcat (regs, " - ");
2761 strcat (regs, reg_names[ i - 1 ] );
2762 }
2763 }
2764 }
2765
2766 sprintf (buff, "dispose %d {%s}, r31", stack_bytes / 4, regs);
2767 }
2768
2769 return buff;
2770}
2771
b4378319
NC
2772/* Construct a PREPARE instruction that is the equivalent of
2773 the given RTL. We have already verified that this should
2774 be possible. */
2775
2776char *
59f3507d 2777construct_prepare_instruction (rtx op)
b4378319 2778{
223a9d64 2779 int count;
b4378319
NC
2780 int stack_bytes;
2781 unsigned long int mask;
2782 int i;
2783 static char buff[ 100 ]; /* XXX */
2784 int use_callt = 0;
2785
223a9d64 2786 if (XVECLEN (op, 0) <= 1)
b4378319 2787 {
223a9d64 2788 error ("bogus PREPEARE construction: %d", XVECLEN (op, 0));
b4378319
NC
2789 return NULL;
2790 }
2791
2792 /* Work out how many bytes to push onto
2793 the stack after storing the registers. */
f2f84cba
NS
2794 gcc_assert (GET_CODE (XVECEXP (op, 0, 0)) == SET);
2795 gcc_assert (GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) == PLUS);
2796 gcc_assert (GET_CODE (XEXP (SET_SRC (XVECEXP (op, 0, 0)), 1)) == CONST_INT);
b4378319
NC
2797
2798 stack_bytes = INTVAL (XEXP (SET_SRC (XVECEXP (op, 0, 0)), 1));
2799
b4378319
NC
2800
2801 /* Make sure that the amount we are popping
2802 will fit into the DISPOSE instruction. */
2803 if (stack_bytes < -128)
2804 {
ab532386 2805 error ("too much stack space to prepare: %d", stack_bytes);
b4378319
NC
2806 return NULL;
2807 }
2808
2809 /* Now compute the bit mask of registers to push. */
223a9d64 2810 count = 0;
b4378319 2811 mask = 0;
223a9d64 2812 for (i = 1; i < XVECLEN (op, 0); i++)
b4378319
NC
2813 {
2814 rtx vector_element = XVECEXP (op, 0, i);
2815
223a9d64
N
2816 if (GET_CODE (vector_element) == CLOBBER)
2817 continue;
2818
f2f84cba
NS
2819 gcc_assert (GET_CODE (vector_element) == SET);
2820 gcc_assert (GET_CODE (SET_SRC (vector_element)) == REG);
2821 gcc_assert (register_is_ok_for_epilogue (SET_SRC (vector_element),
2822 SImode));
b4378319
NC
2823
2824 if (REGNO (SET_SRC (vector_element)) == 2)
2825 use_callt = 1;
2826 else
2827 mask |= 1 << REGNO (SET_SRC (vector_element));
223a9d64 2828 count++;
b4378319
NC
2829 }
2830
223a9d64
N
2831 stack_bytes += count * 4;
2832
b4378319 2833 if ((! TARGET_DISABLE_CALLT)
223a9d64 2834 && (use_callt || stack_bytes == 0))
b4378319
NC
2835 {
2836 if (use_callt)
2837 {
2838 sprintf (buff, "callt ctoff(__callt_save_r2_r%d)", (mask & (1 << 31)) ? 31 : 29 );
2839 return buff;
2840 }
2841
2842 for (i = 20; i < 32; i++)
2843 if (mask & (1 << i))
2844 break;
2845
2846 if (i == 31)
2847 sprintf (buff, "callt ctoff(__callt_save_r31c)");
2848 else
223a9d64
N
2849 sprintf (buff, "callt ctoff(__callt_save_r%d_r%s)",
2850 i, (mask & (1 << 31)) ? "31c" : "29");
b4378319
NC
2851 }
2852 else
2853 {
2854 static char regs [100]; /* XXX */
2855 int done_one;
2856
2857
2858 /* Generate the PREPARE instruction. Note we could just issue the
2859 bit mask as a number as the assembler can cope with this, but for
2860 the sake of our readers we turn it into a textual description. */
2861 regs[0] = 0;
2862 done_one = 0;
2863
2864 for (i = 20; i < 32; i++)
2865 {
2866 if (mask & (1 << i))
2867 {
2868 int first;
2869
2870 if (done_one)
2871 strcat (regs, ", ");
2872 else
2873 done_one = 1;
2874
2875 first = i;
2876 strcat (regs, reg_names[ first ]);
2877
2878 for (i++; i < 32; i++)
2879 if ((mask & (1 << i)) == 0)
2880 break;
2881
2882 if (i > first + 1)
2883 {
2884 strcat (regs, " - ");
2885 strcat (regs, reg_names[ i - 1 ] );
2886 }
2887 }
2888 }
2889
2890 sprintf (buff, "prepare {%s}, %d", regs, (- stack_bytes) / 4);
2891 }
2892
2893 return buff;
2894}
223a9d64 2895
a64761a3
DD
2896/* Return an RTX indicating where the return address to the
2897 calling function can be found. */
2898
2899rtx
59f3507d 2900v850_return_addr (int count)
a64761a3
DD
2901{
2902 if (count != 0)
2903 return const0_rtx;
2904
9e2f7ec7 2905 return get_hard_reg_initial_val (Pmode, LINK_POINTER_REGNUM);
a64761a3 2906}
ae46c4e0 2907\f
d6b5193b
RS
2908/* Implement TARGET_ASM_INIT_SECTIONS. */
2909
ae46c4e0 2910static void
d6b5193b
RS
2911v850_asm_init_sections (void)
2912{
2913 rosdata_section
2914 = get_unnamed_section (0, output_section_asm_op,
2915 "\t.section .rosdata,\"a\"");
2916
2917 rozdata_section
2918 = get_unnamed_section (0, output_section_asm_op,
2919 "\t.section .rozdata,\"a\"");
2920
2921 tdata_section
2922 = get_unnamed_section (SECTION_WRITE, output_section_asm_op,
2923 "\t.section .tdata,\"aw\"");
2924
2925 zdata_section
2926 = get_unnamed_section (SECTION_WRITE, output_section_asm_op,
2927 "\t.section .zdata,\"aw\"");
2928
2929 zbss_section
2930 = get_unnamed_section (SECTION_WRITE | SECTION_BSS,
2931 output_section_asm_op,
2932 "\t.section .zbss,\"aw\"");
2933}
2934
2935static section *
59f3507d
NN
2936v850_select_section (tree exp,
2937 int reloc ATTRIBUTE_UNUSED,
2938 unsigned HOST_WIDE_INT align ATTRIBUTE_UNUSED)
ae46c4e0
RH
2939{
2940 if (TREE_CODE (exp) == VAR_DECL)
2941 {
2942 int is_const;
2943 if (!TREE_READONLY (exp)
2944 || TREE_SIDE_EFFECTS (exp)
2945 || !DECL_INITIAL (exp)
2946 || (DECL_INITIAL (exp) != error_mark_node
2947 && !TREE_CONSTANT (DECL_INITIAL (exp))))
2948 is_const = FALSE;
2949 else
2950 is_const = TRUE;
2951
2952 switch (v850_get_data_area (exp))
2953 {
2954 case DATA_AREA_ZDA:
d6b5193b 2955 return is_const ? rozdata_section : zdata_section;
ae46c4e0
RH
2956
2957 case DATA_AREA_TDA:
d6b5193b 2958 return tdata_section;
ae46c4e0
RH
2959
2960 case DATA_AREA_SDA:
d6b5193b 2961 return is_const ? rosdata_section : sdata_section;
ae46c4e0
RH
2962
2963 default:
d6b5193b 2964 return is_const ? readonly_data_section : data_section;
ae46c4e0
RH
2965 }
2966 }
d6b5193b 2967 return readonly_data_section;
ae46c4e0 2968}
fb7bc7fb 2969\f
122603fa
N
2970/* Worker function for TARGET_FUNCTION_VALUE_REGNO_P. */
2971
2972static bool
2973v850_function_value_regno_p (const unsigned int regno)
2974{
2975 return (regno == 10);
2976}
2977
fb7bc7fb
KH
2978/* Worker function for TARGET_RETURN_IN_MEMORY. */
2979
2980static bool
586de218 2981v850_return_in_memory (const_tree type, const_tree fntype ATTRIBUTE_UNUSED)
fb7bc7fb
KH
2982{
2983 /* Return values > 8 bytes in length in memory. */
b84d824d
NC
2984 return int_size_in_bytes (type) > 8
2985 || TYPE_MODE (type) == BLKmode
2986 /* With the rh850 ABI return all aggregates in memory. */
2987 || ((! TARGET_GCC_ABI) && AGGREGATE_TYPE_P (type))
2988 ;
fb7bc7fb 2989}
14a878f3
AS
2990
2991/* Worker function for TARGET_FUNCTION_VALUE. */
2992
122603fa 2993static rtx
14a878f3
AS
2994v850_function_value (const_tree valtype,
2995 const_tree fn_decl_or_type ATTRIBUTE_UNUSED,
2996 bool outgoing ATTRIBUTE_UNUSED)
2997{
2998 return gen_rtx_REG (TYPE_MODE (valtype), 10);
2999}
3000
fb7bc7fb 3001\f
7b5cbb57
AS
3002/* Worker function for TARGET_CAN_ELIMINATE. */
3003
e0c6c273 3004static bool
7b5cbb57
AS
3005v850_can_eliminate (const int from ATTRIBUTE_UNUSED, const int to)
3006{
3007 return (to == STACK_POINTER_REGNUM ? ! frame_pointer_needed : true);
3008}
3009
5efd84c5
NF
3010/* Worker function for TARGET_CONDITIONAL_REGISTER_USAGE.
3011
3012 If TARGET_APP_REGS is not defined then add r2 and r5 to
3013 the pool of fixed registers. See PR 14505. */
3014
3015static void
3016v850_conditional_register_usage (void)
3017{
3018 if (TARGET_APP_REGS)
3019 {
3020 fixed_regs[2] = 0; call_used_regs[2] = 0;
3021 fixed_regs[5] = 0; call_used_regs[5] = 1;
3022 }
3023}
e0c6c273
RH
3024\f
3025/* Worker function for TARGET_ASM_TRAMPOLINE_TEMPLATE. */
3026
3027static void
3028v850_asm_trampoline_template (FILE *f)
3029{
3030 fprintf (f, "\tjarl .+4,r12\n");
3031 fprintf (f, "\tld.w 12[r12],r20\n");
3032 fprintf (f, "\tld.w 16[r12],r12\n");
3033 fprintf (f, "\tjmp [r12]\n");
3034 fprintf (f, "\tnop\n");
3035 fprintf (f, "\t.long 0\n");
3036 fprintf (f, "\t.long 0\n");
3037}
3038
3039/* Worker function for TARGET_TRAMPOLINE_INIT. */
3040
3041static void
3042v850_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value)
3043{
3044 rtx mem, fnaddr = XEXP (DECL_RTL (fndecl), 0);
3045
3046 emit_block_move (m_tramp, assemble_trampoline_template (),
3047 GEN_INT (TRAMPOLINE_SIZE), BLOCK_OP_NORMAL);
3048
3049 mem = adjust_address (m_tramp, SImode, 16);
3050 emit_move_insn (mem, chain_value);
3051 mem = adjust_address (m_tramp, SImode, 20);
3052 emit_move_insn (mem, fnaddr);
3053}
223a9d64
N
3054
3055static int
3056v850_issue_rate (void)
3057{
dbdbd982 3058 return (TARGET_V850E2_UP ? 2 : 1);
223a9d64 3059}
1a627b35
RS
3060
3061/* Implement TARGET_LEGITIMATE_CONSTANT_P. */
3062
3063static bool
3064v850_legitimate_constant_p (enum machine_mode mode ATTRIBUTE_UNUSED, rtx x)
3065{
3066 return (GET_CODE (x) == CONST_DOUBLE
3067 || !(GET_CODE (x) == CONST
3068 && GET_CODE (XEXP (x, 0)) == PLUS
3069 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
3070 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT
3071 && !CONST_OK_FOR_K (INTVAL (XEXP (XEXP (x, 0), 1)))));
3072}
1dcad079
NC
3073
3074static int
0ccef3d2
NC
3075v850_memory_move_cost (enum machine_mode mode,
3076 reg_class_t reg_class ATTRIBUTE_UNUSED,
3077 bool in)
1dcad079
NC
3078{
3079 switch (GET_MODE_SIZE (mode))
3080 {
3081 case 0:
3082 return in ? 24 : 8;
3083 case 1:
3084 case 2:
3085 case 3:
3086 case 4:
3087 return in ? 6 : 2;
3088 default:
3089 return (GET_MODE_SIZE (mode) / 2) * (in ? 3 : 1);
3090 }
3091}
dbdbd982
NC
3092
3093int
3094v850_adjust_insn_length (rtx insn, int length)
3095{
3096 if (TARGET_V850E3V5_UP)
3097 {
3098 if (CALL_P (insn))
3099 {
3100 if (TARGET_LONG_CALLS)
3101 {
3102 /* call_internal_long, call_value_internal_long. */
3103 if (length == 8)
3104 length = 4;
3105 if (length == 16)
3106 length = 10;
3107 }
3108 else
3109 {
3110 /* call_internal_short, call_value_internal_short. */
3111 if (length == 8)
3112 length = 4;
3113 }
3114 }
3115 }
3116 return length;
3117}
122603fa
N
3118\f
3119/* V850 specific attributes. */
3120
3121static const struct attribute_spec v850_attribute_table[] =
3122{
62d784f7
KT
3123 /* { name, min_len, max_len, decl_req, type_req, fn_type_req, handler,
3124 affects_type_identity } */
3125 { "interrupt_handler", 0, 0, true, false, false,
3126 v850_handle_interrupt_attribute, false },
3127 { "interrupt", 0, 0, true, false, false,
3128 v850_handle_interrupt_attribute, false },
3129 { "sda", 0, 0, true, false, false,
3130 v850_handle_data_area_attribute, false },
3131 { "tda", 0, 0, true, false, false,
3132 v850_handle_data_area_attribute, false },
3133 { "zda", 0, 0, true, false, false,
3134 v850_handle_data_area_attribute, false },
3135 { NULL, 0, 0, false, false, false, NULL, false }
122603fa
N
3136};
3137\f
b84d824d
NC
3138static void
3139v850_option_override (void)
b12b5029 3140{
b84d824d
NC
3141 if (flag_exceptions || flag_non_call_exceptions)
3142 flag_omit_frame_pointer = 0;
b12b5029 3143
b84d824d
NC
3144 /* The RH850 ABI does not (currently) support the use of the CALLT instruction. */
3145 if (! TARGET_GCC_ABI)
3146 target_flags |= MASK_DISABLE_CALLT;
3147}
b12b5029 3148\f
dbdbd982
NC
3149const char *
3150v850_gen_movdi (rtx * operands)
3151{
3152 if (REG_P (operands[0]))
3153 {
3154 if (REG_P (operands[1]))
3155 {
3156 if (REGNO (operands[0]) == (REGNO (operands[1]) - 1))
3157 return "mov %1, %0; mov %R1, %R0";
3158
3159 return "mov %R1, %R0; mov %1, %0";
3160 }
3161
3162 if (MEM_P (operands[1]))
3163 {
3164 if (REGNO (operands[0]) & 1)
3165 /* Use two load word instructions to synthesise a load double. */
3166 return "ld.w %1, %0 ; ld.w %R1, %R0" ;
3167
3168 return "ld.dw %1, %0";
3169 }
3170
3171 return "mov %1, %0; mov %R1, %R0";
3172 }
3173
3174 gcc_assert (REG_P (operands[1]));
3175
3176 if (REGNO (operands[1]) & 1)
3177 /* Use two store word instructions to synthesise a store double. */
3178 return "st.w %1, %0 ; st.w %R1, %R0 ";
3179
3180 return "st.dw %1, %0";
3181}
3182\f
122603fa 3183/* Initialize the GCC target structure. */
1dcad079 3184
b84d824d
NC
3185#undef TARGET_OPTION_OVERRIDE
3186#define TARGET_OPTION_OVERRIDE v850_option_override
3187
1dcad079 3188#undef TARGET_MEMORY_MOVE_COST
b84d824d 3189#define TARGET_MEMORY_MOVE_COST v850_memory_move_cost
1dcad079 3190
122603fa
N
3191#undef TARGET_ASM_ALIGNED_HI_OP
3192#define TARGET_ASM_ALIGNED_HI_OP "\t.hword\t"
3193
3194#undef TARGET_PRINT_OPERAND
b84d824d 3195#define TARGET_PRINT_OPERAND v850_print_operand
122603fa 3196#undef TARGET_PRINT_OPERAND_ADDRESS
b84d824d 3197#define TARGET_PRINT_OPERAND_ADDRESS v850_print_operand_address
122603fa 3198#undef TARGET_PRINT_OPERAND_PUNCT_VALID_P
b84d824d 3199#define TARGET_PRINT_OPERAND_PUNCT_VALID_P v850_print_operand_punct_valid_p
122603fa 3200
24da2019
AS
3201#undef TARGET_ASM_OUTPUT_ADDR_CONST_EXTRA
3202#define TARGET_ASM_OUTPUT_ADDR_CONST_EXTRA v850_output_addr_const_extra
3203
122603fa
N
3204#undef TARGET_ATTRIBUTE_TABLE
3205#define TARGET_ATTRIBUTE_TABLE v850_attribute_table
3206
3207#undef TARGET_INSERT_ATTRIBUTES
3208#define TARGET_INSERT_ATTRIBUTES v850_insert_attributes
3209
3210#undef TARGET_ASM_SELECT_SECTION
3211#define TARGET_ASM_SELECT_SECTION v850_select_section
3212
3213/* The assembler supports switchable .bss sections, but
3214 v850_select_section doesn't yet make use of them. */
3215#undef TARGET_HAVE_SWITCHABLE_BSS_SECTIONS
3216#define TARGET_HAVE_SWITCHABLE_BSS_SECTIONS false
3217
3218#undef TARGET_ENCODE_SECTION_INFO
3219#define TARGET_ENCODE_SECTION_INFO v850_encode_section_info
3220
3221#undef TARGET_ASM_FILE_START_FILE_DIRECTIVE
3222#define TARGET_ASM_FILE_START_FILE_DIRECTIVE true
3223
122603fa
N
3224#undef TARGET_RTX_COSTS
3225#define TARGET_RTX_COSTS v850_rtx_costs
3226
3227#undef TARGET_ADDRESS_COST
b413068c 3228#define TARGET_ADDRESS_COST hook_int_rtx_mode_as_bool_0
122603fa
N
3229
3230#undef TARGET_MACHINE_DEPENDENT_REORG
3231#define TARGET_MACHINE_DEPENDENT_REORG v850_reorg
3232
3233#undef TARGET_SCHED_ISSUE_RATE
3234#define TARGET_SCHED_ISSUE_RATE v850_issue_rate
3235
3236#undef TARGET_FUNCTION_VALUE_REGNO_P
3237#define TARGET_FUNCTION_VALUE_REGNO_P v850_function_value_regno_p
3238#undef TARGET_FUNCTION_VALUE
3239#define TARGET_FUNCTION_VALUE v850_function_value
3240
3241#undef TARGET_PROMOTE_PROTOTYPES
3242#define TARGET_PROMOTE_PROTOTYPES hook_bool_const_tree_true
3243
3244#undef TARGET_RETURN_IN_MEMORY
3245#define TARGET_RETURN_IN_MEMORY v850_return_in_memory
3246
3247#undef TARGET_PASS_BY_REFERENCE
3248#define TARGET_PASS_BY_REFERENCE v850_pass_by_reference
3249
3250#undef TARGET_CALLEE_COPIES
3251#define TARGET_CALLEE_COPIES hook_bool_CUMULATIVE_ARGS_mode_tree_bool_true
3252
122603fa
N
3253#undef TARGET_ARG_PARTIAL_BYTES
3254#define TARGET_ARG_PARTIAL_BYTES v850_arg_partial_bytes
3255
3256#undef TARGET_FUNCTION_ARG
3257#define TARGET_FUNCTION_ARG v850_function_arg
3258
3259#undef TARGET_FUNCTION_ARG_ADVANCE
3260#define TARGET_FUNCTION_ARG_ADVANCE v850_function_arg_advance
3261
3262#undef TARGET_CAN_ELIMINATE
3263#define TARGET_CAN_ELIMINATE v850_can_eliminate
3264
5efd84c5
NF
3265#undef TARGET_CONDITIONAL_REGISTER_USAGE
3266#define TARGET_CONDITIONAL_REGISTER_USAGE v850_conditional_register_usage
3267
122603fa
N
3268#undef TARGET_ASM_TRAMPOLINE_TEMPLATE
3269#define TARGET_ASM_TRAMPOLINE_TEMPLATE v850_asm_trampoline_template
3270#undef TARGET_TRAMPOLINE_INIT
3271#define TARGET_TRAMPOLINE_INIT v850_trampoline_init
3272
1a627b35
RS
3273#undef TARGET_LEGITIMATE_CONSTANT_P
3274#define TARGET_LEGITIMATE_CONSTANT_P v850_legitimate_constant_p
3275
1d0216c8
RS
3276#undef TARGET_CAN_USE_DOLOOP_P
3277#define TARGET_CAN_USE_DOLOOP_P can_use_doloop_if_innermost
3278
122603fa
N
3279struct gcc_target targetm = TARGET_INITIALIZER;
3280
d6b5193b 3281#include "gt-v850.h"