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poly_int: frame allocations
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ae180d84 1/* Subroutines for insn-output.c for NEC V850 series
cbe34bb5 2 Copyright (C) 1996-2017 Free Software Foundation, Inc.
ae180d84
JL		 3 Contributed by Jeff Law (law@cygnus.com).
4
301ee2f3 5 This file is part of GCC.
ae180d84 6
301ee2f3 7 GCC is free software; you can redistribute it and/or modify it
8376061d 8 under the terms of the GNU General Public License as published by
2f83c7d6 9 the Free Software Foundation; either version 3, or (at your option)
8376061d 10 any later version.
ae180d84 11
301ee2f3 12 GCC is distributed in the hope that it will be useful, but WITHOUT
8376061d
CM		 13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 for more details.
ae180d84 16
8376061d 17 You should have received a copy of the GNU General Public License
2f83c7d6
NC		 18 along with GCC; see the file COPYING3. If not see
19 <http://www.gnu.org/licenses/>. */
ae180d84 20
8fcc61f8
RS		 21#define IN_TARGET_CODE 1
22
ab87f8c8 23#include "config.h"
c5c76735 24#include "system.h"
4977bab6 25#include "coretypes.h"
c7131fb2 26#include "backend.h"
e11c4407 27#include "target.h"
c7131fb2 28#include "rtl.h"
e11c4407 29#include "tree.h"
c7131fb2 30#include "df.h"
4d0cdd0c 31#include "memmodel.h"
e11c4407 32#include "tm_p.h"
d8a2d370 33#include "stringpool.h"
2643d17f 34#include "attribs.h"
e11c4407
AM		 35#include "insn-config.h"
36#include "regs.h"
37#include "emit-rtl.h"
38#include "recog.h"
39#include "diagnostic-core.h"
d8a2d370
DN		 40#include "stor-layout.h"
41#include "varasm.h"
42#include "calls.h"
ae180d84 43#include "conditions.h"
ae180d84
JL		 44#include "output.h"
45#include "insn-attr.h"
36566b39 46#include "expr.h"
60393bbc 47#include "cfgrtl.h"
9b2b7279 48#include "builtins.h"
3ce15347 49
994c5d85 50/* This file should be included last. */
d58627a0
RS		 51#include "target-def.h"
52
3ce15347
NC		 53#ifndef streq
54#define streq(a,b) (strcmp (a, b) == 0)
55#endif
56
cc8ca59e 57static void v850_print_operand_address (FILE *, machine_mode, rtx);
ae180d84 58
c3edd394 59/* Names of the various data areas used on the v850. */
cd47dfd0
NC		 60const char * GHS_default_section_names [(int) COUNT_OF_GHS_SECTION_KINDS];
61const char * GHS_current_section_names [(int) COUNT_OF_GHS_SECTION_KINDS];
c3edd394
NC		 62
63/* Track the current data area set by the data area pragma (which
64 can be nested). Tested by check_default_data_area. */
65data_area_stack_element * data_area_stack = NULL;
66
ae180d84 67/* True if we don't need to check any more if the current
c3edd394 68 function is an interrupt handler. */
ae180d84
JL		 69static int v850_interrupt_cache_p = FALSE;
70
223a9d64
N		 71rtx v850_compare_op0, v850_compare_op1;
72
ae180d84
JL		 73/* Whether current function is an interrupt handler. */
74static int v850_interrupt_p = FALSE;
d6b5193b 75
122603fa
N		 76static GTY(()) section * rosdata_section;
77static GTY(()) section * rozdata_section;
78static GTY(()) section * tdata_section;
79static GTY(()) section * zdata_section;
80static GTY(()) section * zbss_section;
ae180d84 81\f
b84d824d
NC		 82/* We use this to wrap all emitted insns in the prologue. */
83static rtx
84F (rtx x)
85{
86 if (GET_CODE (x) != CLOBBER)
87 RTX_FRAME_RELATED_P (x) = 1;
88 return x;
89}
90
91/* Mark all the subexpressions of the PARALLEL rtx PAR as
92 frame-related. Return PAR.
93
94 dwarf2out.c:dwarf2out_frame_debug_expr ignores sub-expressions of a
95 PARALLEL rtx other than the first if they do not have the
96 FRAME_RELATED flag set on them. */
97
98static rtx
99v850_all_frame_related (rtx par)
100{
101 int len = XVECLEN (par, 0);
102 int i;
103
104 gcc_assert (GET_CODE (par) == PARALLEL);
105 for (i = 0; i < len; i++)
106 F (XVECEXP (par, 0, i));
107
108 return par;
109}
110
223a9d64
N		 111/* Handle the TARGET_PASS_BY_REFERENCE target hook.
112 Specify whether to pass the argument by reference. */
113
8cd5a4e0 114static bool
d5cc9181 115v850_pass_by_reference (cumulative_args_t cum ATTRIBUTE_UNUSED,
ef4bddc2 116 machine_mode mode, const_tree type,
8cd5a4e0
RH		 117 bool named ATTRIBUTE_UNUSED)
118{
119 unsigned HOST_WIDE_INT size;
120
b84d824d
NC		 121 if (!TARGET_GCC_ABI)
122 return 0;
123
8cd5a4e0
RH		 124 if (type)
125 size = int_size_in_bytes (type);
126 else
127 size = GET_MODE_SIZE (mode);
128
129 return size > 8;
130}
ae180d84 131
356aaf8b
NC		 132/* Return an RTX to represent where an argument with mode MODE
133 and type TYPE will be passed to a function. If the result
134 is NULL_RTX, the argument will be pushed. */
ae180d84 135
74a3d2c3 136static rtx
ef4bddc2 137v850_function_arg (cumulative_args_t cum_v, machine_mode mode,
74a3d2c3 138 const_tree type, bool named)
ae180d84 139{
d5cc9181 140 CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
356aaf8b 141 rtx result = NULL_RTX;
ae180d84
JL		 142 int size, align;
143
223a9d64 144 if (!named)
ae180d84
JL		 145 return NULL_RTX;
146
147 if (mode == BLKmode)
148 size = int_size_in_bytes (type);
149 else
150 size = GET_MODE_SIZE (mode);
151
223a9d64
N		 152 size = (size + UNITS_PER_WORD -1) & ~(UNITS_PER_WORD -1);
153
b4378319 154 if (size < 1)
356aaf8b
NC		 155 {
156 /* Once we have stopped using argument registers, do not start up again. */
157 cum->nbytes = 4 * UNITS_PER_WORD;
158 return NULL_RTX;
159 }
b4378319 160
b84d824d
NC		 161 if (!TARGET_GCC_ABI)
162 align = UNITS_PER_WORD;
163 else if (size <= UNITS_PER_WORD && type)
ae180d84
JL		 164 align = TYPE_ALIGN (type) / BITS_PER_UNIT;
165 else
166 align = size;
167
168 cum->nbytes = (cum->nbytes + align - 1) &~(align - 1);
169
170 if (cum->nbytes > 4 * UNITS_PER_WORD)
356aaf8b 171 return NULL_RTX;
ae180d84
JL		 172
173 if (type == NULL_TREE
174 && cum->nbytes + size > 4 * UNITS_PER_WORD)
356aaf8b 175 return NULL_RTX;
ae180d84
JL		 176
177 switch (cum->nbytes / UNITS_PER_WORD)
178 {
179 case 0:
c5c76735 180 result = gen_rtx_REG (mode, 6);
ae180d84
JL		 181 break;
182 case 1:
c5c76735 183 result = gen_rtx_REG (mode, 7);
ae180d84
JL		 184 break;
185 case 2:
c5c76735 186 result = gen_rtx_REG (mode, 8);
ae180d84
JL		 187 break;
188 case 3:
c5c76735 189 result = gen_rtx_REG (mode, 9);
ae180d84
JL		 190 break;
191 default:
356aaf8b 192 result = NULL_RTX;
ae180d84
JL		 193 }
194
195 return result;
196}
197
78a52f11 198/* Return the number of bytes which must be put into registers
ae180d84 199 for values which are part in registers and part in memory. */
78a52f11 200static int
ef4bddc2 201v850_arg_partial_bytes (cumulative_args_t cum_v, machine_mode mode,
78a52f11 202 tree type, bool named)
ae180d84 203{
d5cc9181 204 CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
ae180d84
JL		 205 int size, align;
206
b84d824d 207 if (!named)
ae180d84
JL		 208 return 0;
209
210 if (mode == BLKmode)
211 size = int_size_in_bytes (type);
212 else
213 size = GET_MODE_SIZE (mode);
214
356aaf8b
NC		 215 if (size < 1)
216 size = 1;
217
b84d824d
NC		 218 if (!TARGET_GCC_ABI)
219 align = UNITS_PER_WORD;
220 else if (type)
ae180d84
JL		 221 align = TYPE_ALIGN (type) / BITS_PER_UNIT;
222 else
223 align = size;
224
356aaf8b 225 cum->nbytes = (cum->nbytes + align - 1) & ~ (align - 1);
ae180d84
JL		 226
227 if (cum->nbytes > 4 * UNITS_PER_WORD)
228 return 0;
229
230 if (cum->nbytes + size <= 4 * UNITS_PER_WORD)
231 return 0;
232
233 if (type == NULL_TREE
234 && cum->nbytes + size > 4 * UNITS_PER_WORD)
235 return 0;
236
78a52f11 237 return 4 * UNITS_PER_WORD - cum->nbytes;
ae180d84
JL		 238}
239
74a3d2c3
NF		 240/* Update the data in CUM to advance over an argument
241 of mode MODE and data type TYPE.
242 (TYPE is null for libcalls where that information may not be available.) */
243
244static void
ef4bddc2 245v850_function_arg_advance (cumulative_args_t cum_v, machine_mode mode,
74a3d2c3
NF		 246 const_tree type, bool named ATTRIBUTE_UNUSED)
247{
d5cc9181
JR		 248 CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
249
b84d824d
NC		 250 if (!TARGET_GCC_ABI)
251 cum->nbytes += (((mode != BLKmode
252 ? GET_MODE_SIZE (mode)
253 : int_size_in_bytes (type)) + UNITS_PER_WORD - 1)
254 & -UNITS_PER_WORD);
255 else
256 cum->nbytes += (((type && int_size_in_bytes (type) > 8
257 ? GET_MODE_SIZE (Pmode)
258 : (mode != BLKmode
259 ? GET_MODE_SIZE (mode)
260 : int_size_in_bytes (type))) + UNITS_PER_WORD - 1)
261 & -UNITS_PER_WORD);
74a3d2c3
NF		 262}
263
ae180d84
JL		 264/* Return the high and low words of a CONST_DOUBLE */
265
266static void
59f3507d 267const_double_split (rtx x, HOST_WIDE_INT * p_high, HOST_WIDE_INT * p_low)
ae180d84
JL		 268{
269 if (GET_CODE (x) == CONST_DOUBLE)
270 {
271 long t[2];
ae180d84
JL		 272
273 switch (GET_MODE (x))
274 {
4e10a5a7 275 case E_DFmode:
34a72c33 276 REAL_VALUE_TO_TARGET_DOUBLE (*CONST_DOUBLE_REAL_VALUE (x), t);
ae180d84
JL		 277 *p_high = t[1]; /* since v850 is little endian */
278 *p_low = t[0]; /* high is second word */
279 return;
280
4e10a5a7 281 case E_SFmode:
34a72c33 282 REAL_VALUE_TO_TARGET_SINGLE (*CONST_DOUBLE_REAL_VALUE (x), *p_high);
ae180d84
JL		 283 *p_low = 0;
284 return;
285
4e10a5a7
RS		 286 case E_VOIDmode:
287 case E_DImode:
ae180d84
JL		 288 *p_high = CONST_DOUBLE_HIGH (x);
289 *p_low = CONST_DOUBLE_LOW (x);
290 return;
3ce15347
NC		 291
292 default:
293 break;
ae180d84
JL		 294 }
295 }
296
297 fatal_insn ("const_double_split got a bad insn:", x);
298}
299
300\f
301/* Return the cost of the rtx R with code CODE. */
302
303static int
59f3507d 304const_costs_int (HOST_WIDE_INT value, int zero_cost)
ae180d84
JL		 305{
306 if (CONST_OK_FOR_I (value))
307 return zero_cost;
308 else if (CONST_OK_FOR_J (value))
309 return 1;
310 else if (CONST_OK_FOR_K (value))
311 return 2;
312 else
313 return 4;
314}
315
3c50106f 316static int
59f3507d 317const_costs (rtx r, enum rtx_code c)
ae180d84
JL		 318{
319 HOST_WIDE_INT high, low;
320
321 switch (c)
322 {
323 case CONST_INT:
324 return const_costs_int (INTVAL (r), 0);
325
326 case CONST_DOUBLE:
327 const_double_split (r, &high, &low);
328 if (GET_MODE (r) == SFmode)
329 return const_costs_int (high, 1);
330 else
331 return const_costs_int (high, 1) + const_costs_int (low, 1);
332
333 case SYMBOL_REF:
334 case LABEL_REF:
335 case CONST:
336 return 2;
337
338 case HIGH:
339 return 1;
340
341 default:
342 return 4;
343 }
344}
345
3c50106f 346static bool
e548c9df
AM		 347v850_rtx_costs (rtx x, machine_mode mode, int outer_code,
348 int opno ATTRIBUTE_UNUSED, int *total, bool speed)
3c50106f 349{
e548c9df 350 enum rtx_code code = GET_CODE (x);
5a82ecd9 351
3c50106f
RH		 352 switch (code)
353 {
354 case CONST_INT:
355 case CONST_DOUBLE:
356 case CONST:
357 case SYMBOL_REF:
358 case LABEL_REF:
359 *total = COSTS_N_INSNS (const_costs (x, code));
360 return true;
361
362 case MOD:
363 case DIV:
364 case UMOD:
365 case UDIV:
f40751dd 366 if (TARGET_V850E && !speed)
3c50106f
RH		 367 *total = 6;
368 else
369 *total = 60;
370 return true;
371
372 case MULT:
373 if (TARGET_V850E
e548c9df 374 && (mode == SImode || mode == HImode || mode == QImode))
3c50106f
RH		 375 {
376 if (GET_CODE (XEXP (x, 1)) == REG)
377 *total = 4;
378 else if (GET_CODE (XEXP (x, 1)) == CONST_INT)
379 {
380 if (CONST_OK_FOR_O (INTVAL (XEXP (x, 1))))
381 *total = 6;
382 else if (CONST_OK_FOR_K (INTVAL (XEXP (x, 1))))
383 *total = 10;
384 }
385 }
386 else
387 *total = 20;
388 return true;
389
f90b7a5a
PB		 390 case ZERO_EXTRACT:
391 if (outer_code == COMPARE)
392 *total = 0;
393 return false;
394
3c50106f
RH		 395 default:
396 return false;
397 }
398}
ae180d84
JL		 399\f
400/* Print operand X using operand code CODE to assembly language output file
401 FILE. */
402
11d259f0
NF		 403static void
404v850_print_operand (FILE * file, rtx x, int code)
ae180d84
JL		 405{
406 HOST_WIDE_INT high, low;
407
408 switch (code)
409 {
5ca2111f 410 case 'c':
b12b5029 411 /* We use 'c' operands with symbols for .vtinherit. */
5ca2111f
CM		 412 if (GET_CODE (x) == SYMBOL_REF)
413 {
414 output_addr_const(file, x);
415 break;
416 }
b12b5029 417 /* Fall through. */
ae180d84
JL		 418 case 'b':
419 case 'B':
1933ec7e
JW		 420 case 'C':
421 switch ((code == 'B' || code == 'C')
422 ? reverse_condition (GET_CODE (x)) : GET_CODE (x))
ae180d84
JL		 423 {
424 case NE:
1933ec7e
JW		 425 if (code == 'c' || code == 'C')
426 fprintf (file, "nz");
427 else
428 fprintf (file, "ne");
ae180d84
JL		 429 break;
430 case EQ:
1933ec7e
JW		 431 if (code == 'c' || code == 'C')
432 fprintf (file, "z");
433 else
434 fprintf (file, "e");
ae180d84
JL		 435 break;
436 case GE:
1933ec7e 437 fprintf (file, "ge");
ae180d84
JL		 438 break;
439 case GT:
1933ec7e 440 fprintf (file, "gt");
ae180d84
JL		 441 break;
442 case LE:
1933ec7e 443 fprintf (file, "le");
ae180d84
JL		 444 break;
445 case LT:
1933ec7e 446 fprintf (file, "lt");
ae180d84
JL		 447 break;
448 case GEU:
1933ec7e 449 fprintf (file, "nl");
ae180d84
JL		 450 break;
451 case GTU:
1933ec7e 452 fprintf (file, "h");
ae180d84
JL		 453 break;
454 case LEU:
1933ec7e 455 fprintf (file, "nh");
ae180d84
JL		 456 break;
457 case LTU:
1933ec7e 458 fprintf (file, "l");
ae180d84
JL		 459 break;
460 default:
f2f84cba 461 gcc_unreachable ();
ae180d84
JL		 462 }
463 break;
b12b5029 464 case 'F': /* High word of CONST_DOUBLE. */
f2f84cba 465 switch (GET_CODE (x))
ae180d84 466 {
f2f84cba
NS		 467 case CONST_INT:
468 fprintf (file, "%d", (INTVAL (x) >= 0) ? 0 : -1);
469 break;
470
471 case CONST_DOUBLE:
ae180d84
JL		 472 const_double_split (x, &high, &low);
473 fprintf (file, "%ld", (long) high);
f2f84cba
NS		 474 break;
475
476 default:
477 gcc_unreachable ();
ae180d84 478 }
ae180d84 479 break;
b12b5029 480 case 'G': /* Low word of CONST_DOUBLE. */
f2f84cba 481 switch (GET_CODE (x))
ae180d84 482 {
f2f84cba
NS		 483 case CONST_INT:
484 fprintf (file, "%ld", (long) INTVAL (x));
485 break;
486
487 case CONST_DOUBLE:
ae180d84
JL		 488 const_double_split (x, &high, &low);
489 fprintf (file, "%ld", (long) low);
f2f84cba
NS		 490 break;
491
492 default:
493 gcc_unreachable ();
ae180d84 494 }
ae180d84
JL		 495 break;
496 case 'L':
e0b3adcb 497 fprintf (file, "%d\n", (int)(INTVAL (x) & 0xffff));
ae180d84
JL		 498 break;
499 case 'M':
500 fprintf (file, "%d", exact_log2 (INTVAL (x)));
501 break;
502 case 'O':
f2f84cba
NS		 503 gcc_assert (special_symbolref_operand (x, VOIDmode));
504
505 if (GET_CODE (x) == CONST)
506 x = XEXP (XEXP (x, 0), 0);
507 else
508 gcc_assert (GET_CODE (x) == SYMBOL_REF);
509
510 if (SYMBOL_REF_ZDA_P (x))
511 fprintf (file, "zdaoff");
512 else if (SYMBOL_REF_SDA_P (x))
513 fprintf (file, "sdaoff");
514 else if (SYMBOL_REF_TDA_P (x))
515 fprintf (file, "tdaoff");
ae180d84 516 else
f2f84cba 517 gcc_unreachable ();
ae180d84
JL		 518 break;
519 case 'P':
f2f84cba
NS		 520 gcc_assert (special_symbolref_operand (x, VOIDmode));
521 output_addr_const (file, x);
ae180d84
JL		 522 break;
523 case 'Q':
f2f84cba
NS		 524 gcc_assert (special_symbolref_operand (x, VOIDmode));
525
526 if (GET_CODE (x) == CONST)
527 x = XEXP (XEXP (x, 0), 0);
ae180d84 528 else
f2f84cba
NS		 529 gcc_assert (GET_CODE (x) == SYMBOL_REF);
530
531 if (SYMBOL_REF_ZDA_P (x))
532 fprintf (file, "r0");
533 else if (SYMBOL_REF_SDA_P (x))
534 fprintf (file, "gp");
535 else if (SYMBOL_REF_TDA_P (x))
536 fprintf (file, "ep");
537 else
538 gcc_unreachable ();
ae180d84
JL		 539 break;
540 case 'R': /* 2nd word of a double. */
541 switch (GET_CODE (x))
542 {
3ce15347
NC		 543 case REG:
544 fprintf (file, reg_names[REGNO (x) + 1]);
545 break;
546 case MEM:
cc8ca59e
JB		 547 {
548 machine_mode mode = GET_MODE (x);
549 x = XEXP (adjust_address (x, SImode, 4), 0);
550 v850_print_operand_address (file, mode, x);
551 if (GET_CODE (x) == CONST_INT)
552 fprintf (file, "[r0]");
553 }
3ce15347
NC		 554 break;
555
b84d824d
NC		 556 case CONST_INT:
557 {
558 unsigned HOST_WIDE_INT v = INTVAL (x);
559
560 /* Trickery to avoid problems with shifting
561 32-bits at a time on a 32-bit host. */
562 v = v >> 16;
563 v = v >> 16;
564 fprintf (file, HOST_WIDE_INT_PRINT_HEX, v);
565 break;
566 }
567
568 case CONST_DOUBLE:
569 fprintf (file, HOST_WIDE_INT_PRINT_HEX, CONST_DOUBLE_HIGH (x));
3ce15347 570 break;
b84d824d
NC		 571
572 default:
573 debug_rtx (x);
574 gcc_unreachable ();
ae180d84
JL		 575 }
576 break;
577 case 'S':
578 {
2ec6cd51 579 /* If it's a reference to a TDA variable, use sst/sld vs. st/ld. */
145870b5
NC		 580 if (GET_CODE (x) == MEM && ep_memory_operand (x, GET_MODE (x), FALSE))
581 fputs ("s", file);
582
583 break;
584 }
585 case 'T':
586 {
587 /* Like an 'S' operand above, but for unsigned loads only. */
588 if (GET_CODE (x) == MEM && ep_memory_operand (x, GET_MODE (x), TRUE))
ae180d84
JL		 589 fputs ("s", file);
590
591 break;
592 }
b12b5029 593 case 'W': /* Print the instruction suffix. */
ae180d84
JL		 594 switch (GET_MODE (x))
595 {
596 default:
f2f84cba 597 gcc_unreachable ();
ae180d84 598
4e10a5a7
RS		 599 case E_QImode: fputs (".b", file); break;
600 case E_HImode: fputs (".h", file); break;
601 case E_SImode: fputs (".w", file); break;
602 case E_SFmode: fputs (".w", file); break;
ae180d84
JL		 603 }
604 break;
b12b5029 605 case '.': /* Register r0. */
ae180d84
JL		 606 fputs (reg_names[0], file);
607 break;
b12b5029
NC		 608 case 'z': /* Reg or zero. */
609 if (REG_P (x))
1933ec7e 610 fputs (reg_names[REGNO (x)], file);
223a9d64
N		 611 else if ((GET_MODE(x) == SImode
612 || GET_MODE(x) == DFmode
613 || GET_MODE(x) == SFmode)
614 && x == CONST0_RTX(GET_MODE(x)))
615 fputs (reg_names[0], file);
1933ec7e 616 else
f2f84cba
NS		 617 {
618 gcc_assert (x == const0_rtx);
619 fputs (reg_names[0], file);
620 }
1933ec7e 621 break;
ae180d84
JL		 622 default:
623 switch (GET_CODE (x))
624 {
625 case MEM:
626 if (GET_CODE (XEXP (x, 0)) == CONST_INT)
cc8ca59e
JB		 627 output_address (GET_MODE (x),
628 gen_rtx_PLUS (SImode, gen_rtx_REG (SImode, 0),
c5c76735 629 XEXP (x, 0)));
ae180d84 630 else
cc8ca59e 631 output_address (GET_MODE (x), XEXP (x, 0));
ae180d84
JL		 632 break;
633
634 case REG:
635 fputs (reg_names[REGNO (x)], file);
636 break;
637 case SUBREG:
ddef6bc7 638 fputs (reg_names[subreg_regno (x)], file);
ae180d84 639 break;
b84d824d
NC		 640 case CONST_DOUBLE:
641 fprintf (file, HOST_WIDE_INT_PRINT_HEX, CONST_DOUBLE_LOW (x));
642 break;
643
ae180d84
JL		 644 case CONST_INT:
645 case SYMBOL_REF:
646 case CONST:
647 case LABEL_REF:
648 case CODE_LABEL:
cc8ca59e 649 v850_print_operand_address (file, VOIDmode, x);
ae180d84
JL		 650 break;
651 default:
f2f84cba 652 gcc_unreachable ();
ae180d84
JL		 653 }
654 break;
655
656 }
657}
658
659\f
660/* Output assembly language output for the address ADDR to FILE. */
661
11d259f0 662static void
cc8ca59e 663v850_print_operand_address (FILE * file, machine_mode /*mode*/, rtx addr)
ae180d84
JL		 664{
665 switch (GET_CODE (addr))
666 {
667 case REG:
668 fprintf (file, "0[");
11d259f0 669 v850_print_operand (file, addr, 0);
ae180d84
JL		 670 fprintf (file, "]");
671 break;
672 case LO_SUM:
673 if (GET_CODE (XEXP (addr, 0)) == REG)
674 {
675 /* reg,foo */
676 fprintf (file, "lo(");
11d259f0 677 v850_print_operand (file, XEXP (addr, 1), 0);
ae180d84 678 fprintf (file, ")[");
11d259f0 679 v850_print_operand (file, XEXP (addr, 0), 0);
ae180d84
JL		 680 fprintf (file, "]");
681 }
682 break;
683 case PLUS:
684 if (GET_CODE (XEXP (addr, 0)) == REG
685 || GET_CODE (XEXP (addr, 0)) == SUBREG)
686 {
687 /* reg,foo */
11d259f0 688 v850_print_operand (file, XEXP (addr, 1), 0);
ae180d84 689 fprintf (file, "[");
11d259f0 690 v850_print_operand (file, XEXP (addr, 0), 0);
ae180d84
JL		 691 fprintf (file, "]");
692 }
693 else
694 {
11d259f0 695 v850_print_operand (file, XEXP (addr, 0), 0);
ae180d84 696 fprintf (file, "+");
11d259f0 697 v850_print_operand (file, XEXP (addr, 1), 0);
ae180d84
JL		 698 }
699 break;
700 case SYMBOL_REF:
50d1ff6a
RH		 701 {
702 const char *off_name = NULL;
703 const char *reg_name = NULL;
704
705 if (SYMBOL_REF_ZDA_P (addr))
706 {
707 off_name = "zdaoff";
708 reg_name = "r0";
709 }
710 else if (SYMBOL_REF_SDA_P (addr))
711 {
712 off_name = "sdaoff";
713 reg_name = "gp";
714 }
715 else if (SYMBOL_REF_TDA_P (addr))
716 {
717 off_name = "tdaoff";
718 reg_name = "ep";
719 }
720
721 if (off_name)
ae180d84 722 fprintf (file, "%s(", off_name);
ae180d84 723 output_addr_const (file, addr);
50d1ff6a
RH		 724 if (reg_name)
725 fprintf (file, ")[%s]", reg_name);
726 }
ae180d84
JL		 727 break;
728 case CONST:
729 if (special_symbolref_operand (addr, VOIDmode))
730 {
50d1ff6a 731 rtx x = XEXP (XEXP (addr, 0), 0);
3cce094d
KG		 732 const char *off_name;
733 const char *reg_name;
ae180d84 734
50d1ff6a 735 if (SYMBOL_REF_ZDA_P (x))
ae180d84
JL		 736 {
737 off_name = "zdaoff";
738 reg_name = "r0";
739 }
50d1ff6a 740 else if (SYMBOL_REF_SDA_P (x))
ae180d84
JL		 741 {
742 off_name = "sdaoff";
743 reg_name = "gp";
744 }
50d1ff6a 745 else if (SYMBOL_REF_TDA_P (x))
ae180d84
JL		 746 {
747 off_name = "tdaoff";
748 reg_name = "ep";
749 }
750 else
f2f84cba 751 gcc_unreachable ();
ae180d84
JL		 752
753 fprintf (file, "%s(", off_name);
754 output_addr_const (file, addr);
755 fprintf (file, ")[%s]", reg_name);
756 }
757 else
758 output_addr_const (file, addr);
759 break;
760 default:
761 output_addr_const (file, addr);
762 break;
763 }
764}
765
11d259f0
NF		 766static bool
767v850_print_operand_punct_valid_p (unsigned char code)
768{
769 return code == '.';
770}
771
b4378319
NC		 772/* When assemble_integer is used to emit the offsets for a switch
773 table it can encounter (TRUNCATE:HI (MINUS:SI (LABEL_REF:SI) (LABEL_REF:SI))).
774 output_addr_const will normally barf at this, but it is OK to omit
775 the truncate and just emit the difference of the two labels. The
776 .hword directive will automatically handle the truncation for us.
777
24da2019 778 Returns true if rtx was handled, false otherwise. */
b4378319 779
24da2019 780static bool
59f3507d 781v850_output_addr_const_extra (FILE * file, rtx x)
b4378319
NC		 782{
783 if (GET_CODE (x) != TRUNCATE)
24da2019 784 return false;
b4378319
NC		 785
786 x = XEXP (x, 0);
787
788 /* We must also handle the case where the switch table was passed a
789 constant value and so has been collapsed. In this case the first
790 label will have been deleted. In such a case it is OK to emit
791 nothing, since the table will not be used.
792 (cf gcc.c-torture/compile/990801-1.c). */
793 if (GET_CODE (x) == MINUS
4654c0cf
TS		 794 && GET_CODE (XEXP (x, 0)) == LABEL_REF)
795 {
796 rtx_code_label *label
797 = dyn_cast<rtx_code_label *> (XEXP (XEXP (x, 0), 0));
798 if (label && label->deleted ())
799 return true;
800 }
b4378319
NC		 801
802 output_addr_const (file, x);
24da2019 803 return true;
b4378319 804}
ae180d84
JL		 805\f
806/* Return appropriate code to load up a 1, 2, or 4 integer/floating
807 point value. */
808
8b97c5f8 809const char *
59f3507d 810output_move_single (rtx * operands)
ae180d84
JL		 811{
812 rtx dst = operands[0];
813 rtx src = operands[1];
814
815 if (REG_P (dst))
816 {
817 if (REG_P (src))
818 return "mov %1,%0";
819
820 else if (GET_CODE (src) == CONST_INT)
821 {
822 HOST_WIDE_INT value = INTVAL (src);
823
22f23985 824 if (CONST_OK_FOR_J (value)) /* Signed 5-bit immediate. */
ae180d84
JL		 825 return "mov %1,%0";
826
22f23985 827 else if (CONST_OK_FOR_K (value)) /* Signed 16-bit immediate. */
223a9d64 828 return "movea %1,%.,%0";
ae180d84 829
b4378319 830 else if (CONST_OK_FOR_L (value)) /* Upper 16 bits were set. */
223a9d64 831 return "movhi hi0(%1),%.,%0";
ae180d84 832
b4378319 833 /* A random constant. */
dbdbd982 834 else if (TARGET_V850E_UP)
b4378319
NC		 835 return "mov %1,%0";
836 else
ae180d84
JL		 837 return "movhi hi(%1),%.,%0\n\tmovea lo(%1),%0,%0";
838 }
839
840 else if (GET_CODE (src) == CONST_DOUBLE && GET_MODE (src) == SFmode)
841 {
842 HOST_WIDE_INT high, low;
843
844 const_double_split (src, &high, &low);
b4378319 845
22f23985 846 if (CONST_OK_FOR_J (high)) /* Signed 5-bit immediate. */
ae180d84
JL		 847 return "mov %F1,%0";
848
22f23985 849 else if (CONST_OK_FOR_K (high)) /* Signed 16-bit immediate. */
223a9d64 850 return "movea %F1,%.,%0";
ae180d84 851
b4378319 852 else if (CONST_OK_FOR_L (high)) /* Upper 16 bits were set. */
223a9d64 853 return "movhi hi0(%F1),%.,%0";
ae180d84 854
b4378319 855 /* A random constant. */
dbdbd982 856 else if (TARGET_V850E_UP)
b4378319
NC		 857 return "mov %F1,%0";
858
859 else
ae180d84
JL		 860 return "movhi hi(%F1),%.,%0\n\tmovea lo(%F1),%0,%0";
861 }
862
863 else if (GET_CODE (src) == MEM)
864 return "%S1ld%W1 %1,%0";
865
866 else if (special_symbolref_operand (src, VOIDmode))
867 return "movea %O1(%P1),%Q1,%0";
868
869 else if (GET_CODE (src) == LABEL_REF
870 || GET_CODE (src) == SYMBOL_REF
871 || GET_CODE (src) == CONST)
145870b5 872 {
dbdbd982 873 if (TARGET_V850E_UP)
b4378319
NC		 874 return "mov hilo(%1),%0";
875 else
876 return "movhi hi(%1),%.,%0\n\tmovea lo(%1),%0,%0";
145870b5 877 }
ae180d84
JL		 878
879 else if (GET_CODE (src) == HIGH)
880 return "movhi hi(%1),%.,%0";
881
882 else if (GET_CODE (src) == LO_SUM)
883 {
884 operands[2] = XEXP (src, 0);
885 operands[3] = XEXP (src, 1);
886 return "movea lo(%3),%2,%0";
887 }
888 }
889
890 else if (GET_CODE (dst) == MEM)
891 {
892 if (REG_P (src))
893 return "%S0st%W0 %1,%0";
894
895 else if (GET_CODE (src) == CONST_INT && INTVAL (src) == 0)
896 return "%S0st%W0 %.,%0";
897
898 else if (GET_CODE (src) == CONST_DOUBLE
899 && CONST0_RTX (GET_MODE (dst)) == src)
900 return "%S0st%W0 %.,%0";
901 }
902
f7df4a84 903 fatal_insn ("output_move_single:", gen_rtx_SET (dst, src));
ae180d84
JL		 904 return "";
905}
906
ef4bddc2 907machine_mode
122603fa 908v850_select_cc_mode (enum rtx_code cond, rtx op0, rtx op1 ATTRIBUTE_UNUSED)
223a9d64
N		 909{
910 if (GET_MODE_CLASS (GET_MODE (op0)) == MODE_FLOAT)
911 {
912 switch (cond)
913 {
914 case LE:
915 return CC_FPU_LEmode;
916 case GE:
917 return CC_FPU_GEmode;
918 case LT:
919 return CC_FPU_LTmode;
920 case GT:
921 return CC_FPU_GTmode;
922 case EQ:
923 return CC_FPU_EQmode;
924 case NE:
925 return CC_FPU_NEmode;
926 default:
3cd232b5 927 gcc_unreachable ();
223a9d64
N		 928 }
929 }
930 return CCmode;
931}
932
ef4bddc2
RS		 933machine_mode
934v850_gen_float_compare (enum rtx_code cond, machine_mode mode ATTRIBUTE_UNUSED, rtx op0, rtx op1)
223a9d64 935{
3cd232b5 936 if (GET_MODE (op0) == DFmode)
223a9d64
N		 937 {
938 switch (cond)
939 {
940 case LE:
941 emit_insn (gen_cmpdf_le_insn (op0, op1));
942 break;
943 case GE:
944 emit_insn (gen_cmpdf_ge_insn (op0, op1));
945 break;
946 case LT:
947 emit_insn (gen_cmpdf_lt_insn (op0, op1));
948 break;
949 case GT:
950 emit_insn (gen_cmpdf_gt_insn (op0, op1));
951 break;
3cd232b5
NDD		 952 case NE:
953 /* Note: There is no NE comparison operator. So we
954 perform an EQ comparison and invert the branch.
955 See v850_float_nz_comparison for how this is done. */
223a9d64
N		 956 case EQ:
957 emit_insn (gen_cmpdf_eq_insn (op0, op1));
958 break;
223a9d64 959 default:
3cd232b5 960 gcc_unreachable ();
223a9d64
N		 961 }
962 }
3cd232b5 963 else if (GET_MODE (v850_compare_op0) == SFmode)
223a9d64
N		 964 {
965 switch (cond)
966 {
967 case LE:
968 emit_insn (gen_cmpsf_le_insn(op0, op1));
969 break;
970 case GE:
971 emit_insn (gen_cmpsf_ge_insn(op0, op1));
972 break;
973 case LT:
974 emit_insn (gen_cmpsf_lt_insn(op0, op1));
975 break;
976 case GT:
977 emit_insn (gen_cmpsf_gt_insn(op0, op1));
978 break;
3cd232b5
NDD		 979 case NE:
980 /* Note: There is no NE comparison operator. So we
981 perform an EQ comparison and invert the branch.
982 See v850_float_nz_comparison for how this is done. */
223a9d64
N		 983 case EQ:
984 emit_insn (gen_cmpsf_eq_insn(op0, op1));
985 break;
223a9d64 986 default:
3cd232b5 987 gcc_unreachable ();
223a9d64
N		 988 }
989 }
990 else
3cd232b5 991 gcc_unreachable ();
223a9d64
N		 992
993 return v850_select_cc_mode (cond, op0, op1);
994}
995
996rtx
ef4bddc2 997v850_gen_compare (enum rtx_code cond, machine_mode mode, rtx op0, rtx op1)
223a9d64
N		 998{
999 if (GET_MODE_CLASS(GET_MODE (op0)) != MODE_FLOAT)
1000 {
1001 emit_insn (gen_cmpsi_insn (op0, op1));
1002 return gen_rtx_fmt_ee (cond, mode, gen_rtx_REG(CCmode, CC_REGNUM), const0_rtx);
1003 }
1004 else
1005 {
1006 rtx cc_reg;
1007 mode = v850_gen_float_compare (cond, mode, op0, op1);
1008 cc_reg = gen_rtx_REG (mode, CC_REGNUM);
f7df4a84 1009 emit_insn (gen_rtx_SET (cc_reg, gen_rtx_REG (mode, FCC_REGNUM)));
223a9d64
N		 1010
1011 return gen_rtx_fmt_ee (cond, mode, cc_reg, const0_rtx);
1012 }
1013}
1014
1933ec7e
JW		 1015/* Return maximum offset supported for a short EP memory reference of mode
1016 MODE and signedness UNSIGNEDP. */
ae180d84 1017
3ce15347 1018static int
ef4bddc2 1019ep_memory_offset (machine_mode mode, int unsignedp ATTRIBUTE_UNUSED)
ae180d84 1020{
1933ec7e 1021 int max_offset = 0;
ae180d84 1022
1933ec7e 1023 switch (mode)
ae180d84 1024 {
4e10a5a7 1025 case E_QImode:
b4378319
NC		 1026 if (TARGET_SMALL_SLD)
1027 max_offset = (1 << 4);
dbdbd982 1028 else if ((TARGET_V850E_UP)
223a9d64 1029 && unsignedp)
b4378319
NC		 1030 max_offset = (1 << 4);
1031 else
1032 max_offset = (1 << 7);
ae180d84
JL		 1033 break;
1034
4e10a5a7 1035 case E_HImode:
b4378319
NC		 1036 if (TARGET_SMALL_SLD)
1037 max_offset = (1 << 5);
dbdbd982 1038 else if ((TARGET_V850E_UP)
223a9d64 1039 && unsignedp)
b4378319
NC		 1040 max_offset = (1 << 5);
1041 else
1042 max_offset = (1 << 8);
ae180d84
JL		 1043 break;
1044
4e10a5a7
RS		 1045 case E_SImode:
1046 case E_SFmode:
145870b5 1047 max_offset = (1 << 8);
ae180d84 1048 break;
3ce15347
NC		 1049
1050 default:
1051 break;
ae180d84
JL		 1052 }
1053
1933ec7e
JW		 1054 return max_offset;
1055}
1056
1057/* Return true if OP is a valid short EP memory reference */
1058
1059int
ef4bddc2 1060ep_memory_operand (rtx op, machine_mode mode, int unsigned_load)
1933ec7e
JW		 1061{
1062 rtx addr, op0, op1;
1063 int max_offset;
1064 int mask;
1065
2ec6cd51 1066 /* If we are not using the EP register on a per-function basis
6fc0bb99 1067 then do not allow this optimization at all. This is to
2ec6cd51
NC		 1068 prevent the use of the SLD/SST instructions which cannot be
1069 guaranteed to work properly due to a hardware bug. */
1070 if (!TARGET_EP)
1071 return FALSE;
1072
1933ec7e
JW		 1073 if (GET_CODE (op) != MEM)
1074 return FALSE;
1075
1076 max_offset = ep_memory_offset (mode, unsigned_load);
1077
1078 mask = GET_MODE_SIZE (mode) - 1;
1079
ae180d84
JL		 1080 addr = XEXP (op, 0);
1081 if (GET_CODE (addr) == CONST)
1082 addr = XEXP (addr, 0);
1083
1084 switch (GET_CODE (addr))
1085 {
1086 default:
1087 break;
1088
1089 case SYMBOL_REF:
50d1ff6a 1090 return SYMBOL_REF_TDA_P (addr);
ae180d84
JL		 1091
1092 case REG:
1093 return REGNO (addr) == EP_REGNUM;
1094
1095 case PLUS:
1096 op0 = XEXP (addr, 0);
1097 op1 = XEXP (addr, 1);
1098 if (GET_CODE (op1) == CONST_INT
1099 && INTVAL (op1) < max_offset
2268cc52 1100 && INTVAL (op1) >= 0
ae180d84
JL		 1101 && (INTVAL (op1) & mask) == 0)
1102 {
1103 if (GET_CODE (op0) == REG && REGNO (op0) == EP_REGNUM)
1104 return TRUE;
1105
50d1ff6a 1106 if (GET_CODE (op0) == SYMBOL_REF && SYMBOL_REF_TDA_P (op0))
ae180d84
JL		 1107 return TRUE;
1108 }
1109 break;
1110 }
1111
1112 return FALSE;
1113}
ae180d84
JL		 1114\f
1115/* Substitute memory references involving a pointer, to use the ep pointer,
1116 taking care to save and preserve the ep. */
1117
1118static void
b32d5189
DM		 1119substitute_ep_register (rtx_insn *first_insn,
1120 rtx_insn *last_insn,
59f3507d
NN		 1121 int uses,
1122 int regno,
1123 rtx * p_r1,
1124 rtx * p_ep)
ae180d84 1125{
c5c76735 1126 rtx reg = gen_rtx_REG (Pmode, regno);
b32d5189 1127 rtx_insn *insn;
ae180d84
JL		 1128
1129 if (!*p_r1)
1130 {
90745823 1131 df_set_regs_ever_live (1, true);
c5c76735
JL		 1132 *p_r1 = gen_rtx_REG (Pmode, 1);
1133 *p_ep = gen_rtx_REG (Pmode, 30);
ae180d84
JL		 1134 }
1135
1136 if (TARGET_DEBUG)
3ce15347
NC		 1137 fprintf (stderr, "\
1138Saved %d bytes (%d uses of register %s) in function %s, starting as insn %d, ending at %d\n",
ae180d84
JL		 1139 2 * (uses - 3), uses, reg_names[regno],
1140 IDENTIFIER_POINTER (DECL_NAME (current_function_decl)),
1141 INSN_UID (first_insn), INSN_UID (last_insn));
1142
b64925dc 1143 if (NOTE_P (first_insn))
ae180d84
JL		 1144 first_insn = next_nonnote_insn (first_insn);
1145
1146 last_insn = next_nonnote_insn (last_insn);
1147 for (insn = first_insn; insn && insn != last_insn; insn = NEXT_INSN (insn))
1148 {
b64925dc 1149 if (NONJUMP_INSN_P (insn))
ae180d84
JL		 1150 {
1151 rtx pattern = single_set (insn);
1152
1153 /* Replace the memory references. */
1154 if (pattern)
1155 {
1156 rtx *p_mem;
1933ec7e
JW		 1157 /* Memory operands are signed by default. */
1158 int unsignedp = FALSE;
ae180d84
JL		 1159
1160 if (GET_CODE (SET_DEST (pattern)) == MEM
1161 && GET_CODE (SET_SRC (pattern)) == MEM)
1162 p_mem = (rtx *)0;
1163
1164 else if (GET_CODE (SET_DEST (pattern)) == MEM)
1165 p_mem = &SET_DEST (pattern);
1166
1167 else if (GET_CODE (SET_SRC (pattern)) == MEM)
1168 p_mem = &SET_SRC (pattern);
1169
b4378319
NC		 1170 else if (GET_CODE (SET_SRC (pattern)) == SIGN_EXTEND
1171 && GET_CODE (XEXP (SET_SRC (pattern), 0)) == MEM)
1172 p_mem = &XEXP (SET_SRC (pattern), 0);
1173
1174 else if (GET_CODE (SET_SRC (pattern)) == ZERO_EXTEND
1175 && GET_CODE (XEXP (SET_SRC (pattern), 0)) == MEM)
1176 {
1177 p_mem = &XEXP (SET_SRC (pattern), 0);
1178 unsignedp = TRUE;
1179 }
ae180d84
JL		 1180 else
1181 p_mem = (rtx *)0;
1182
1183 if (p_mem)
1184 {
1185 rtx addr = XEXP (*p_mem, 0);
1186
c3edd394 1187 if (GET_CODE (addr) == REG && REGNO (addr) == (unsigned) regno)
ae180d84
JL		 1188 *p_mem = change_address (*p_mem, VOIDmode, *p_ep);
1189
1190 else if (GET_CODE (addr) == PLUS
1191 && GET_CODE (XEXP (addr, 0)) == REG
c3edd394 1192 && REGNO (XEXP (addr, 0)) == (unsigned) regno
ae180d84 1193 && GET_CODE (XEXP (addr, 1)) == CONST_INT
3ce15347 1194 && ((INTVAL (XEXP (addr, 1)))
1933ec7e 1195 < ep_memory_offset (GET_MODE (*p_mem),
2268cc52
JL		 1196 unsignedp))
1197 && ((INTVAL (XEXP (addr, 1))) >= 0))
ae180d84 1198 *p_mem = change_address (*p_mem, VOIDmode,
c5c76735
JL		 1199 gen_rtx_PLUS (Pmode,
1200 *p_ep,
1201 XEXP (addr, 1)));
ae180d84
JL		 1202 }
1203 }
1204 }
1205 }
1206
1207 /* Optimize back to back cases of ep <- r1 & r1 <- ep. */
1208 insn = prev_nonnote_insn (first_insn);
b64925dc 1209 if (insn && NONJUMP_INSN_P (insn)
ae180d84
JL		 1210 && GET_CODE (PATTERN (insn)) == SET
1211 && SET_DEST (PATTERN (insn)) == *p_ep
1212 && SET_SRC (PATTERN (insn)) == *p_r1)
1213 delete_insn (insn);
1214 else
f7df4a84 1215 emit_insn_before (gen_rtx_SET (*p_r1, *p_ep), first_insn);
ae180d84 1216
f7df4a84
RS		 1217 emit_insn_before (gen_rtx_SET (*p_ep, reg), first_insn);
1218 emit_insn_before (gen_rtx_SET (*p_ep, *p_r1), last_insn);
ae180d84
JL		 1219}
1220
1221\f
18dbd950
RS		 1222/* TARGET_MACHINE_DEPENDENT_REORG. On the 850, we use it to implement
1223 the -mep mode to copy heavily used pointers to ep to use the implicit
1224 addressing. */
ae180d84 1225
18dbd950 1226static void
59f3507d 1227v850_reorg (void)
ae180d84 1228{
3ce15347
NC		 1229 struct
1230 {
ae180d84 1231 int uses;
b32d5189
DM		 1232 rtx_insn *first_insn;
1233 rtx_insn *last_insn;
3ce15347
NC		 1234 }
1235 regs[FIRST_PSEUDO_REGISTER];
ae180d84
JL		 1236
1237 int i;
1238 int use_ep = FALSE;
1239 rtx r1 = NULL_RTX;
1240 rtx ep = NULL_RTX;
b32d5189 1241 rtx_insn *insn;
ae180d84
JL		 1242 rtx pattern;
1243
61db4608 1244 /* If not ep mode, just return now. */
ae180d84
JL		 1245 if (!TARGET_EP)
1246 return;
1247
1248 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1249 {
1250 regs[i].uses = 0;
b32d5189
DM		 1251 regs[i].first_insn = NULL;
1252 regs[i].last_insn = NULL;
ae180d84
JL		 1253 }
1254
18dbd950 1255 for (insn = get_insns (); insn != NULL_RTX; insn = NEXT_INSN (insn))
ae180d84
JL		 1256 {
1257 switch (GET_CODE (insn))
1258 {
1259 /* End of basic block */
1260 default:
1261 if (!use_ep)
1262 {
1263 int max_uses = -1;
1264 int max_regno = -1;
1265
1266 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1267 {
1268 if (max_uses < regs[i].uses)
1269 {
1270 max_uses = regs[i].uses;
1271 max_regno = i;
1272 }
1273 }
1274
1275 if (max_uses > 3)
1276 substitute_ep_register (regs[max_regno].first_insn,
1277 regs[max_regno].last_insn,
1278 max_uses, max_regno, &r1, &ep);
1279 }
1280
1281 use_ep = FALSE;
1282 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1283 {
1284 regs[i].uses = 0;
b32d5189
DM		 1285 regs[i].first_insn = NULL;
1286 regs[i].last_insn = NULL;
ae180d84
JL		 1287 }
1288 break;
1289
1290 case NOTE:
1291 break;
1292
1293 case INSN:
1294 pattern = single_set (insn);
1295
b84d824d 1296 /* See if there are any memory references we can shorten. */
ae180d84
JL		 1297 if (pattern)
1298 {
1299 rtx src = SET_SRC (pattern);
1300 rtx dest = SET_DEST (pattern);
1301 rtx mem;
1933ec7e
JW		 1302 /* Memory operands are signed by default. */
1303 int unsignedp = FALSE;
ae180d84 1304
9324411a 1305 /* We might have (SUBREG (MEM)) here, so just get rid of the
68882f0f
JJ		 1306 subregs to make this code simpler. */
1307 if (GET_CODE (dest) == SUBREG
1308 && (GET_CODE (SUBREG_REG (dest)) == MEM
1309 || GET_CODE (SUBREG_REG (dest)) == REG))
b84d824d 1310 alter_subreg (&dest, false);
68882f0f
JJ		 1311 if (GET_CODE (src) == SUBREG
1312 && (GET_CODE (SUBREG_REG (src)) == MEM
1313 || GET_CODE (SUBREG_REG (src)) == REG))
b84d824d 1314 alter_subreg (&src, false);
9324411a 1315
ae180d84
JL		 1316 if (GET_CODE (dest) == MEM && GET_CODE (src) == MEM)
1317 mem = NULL_RTX;
1318
1319 else if (GET_CODE (dest) == MEM)
1320 mem = dest;
1321
1322 else if (GET_CODE (src) == MEM)
1323 mem = src;
1324
b4378319
NC		 1325 else if (GET_CODE (src) == SIGN_EXTEND
1326 && GET_CODE (XEXP (src, 0)) == MEM)
1327 mem = XEXP (src, 0);
1328
1329 else if (GET_CODE (src) == ZERO_EXTEND
1330 && GET_CODE (XEXP (src, 0)) == MEM)
1331 {
1332 mem = XEXP (src, 0);
1333 unsignedp = TRUE;
1334 }
ae180d84
JL		 1335 else
1336 mem = NULL_RTX;
1337
1933ec7e 1338 if (mem && ep_memory_operand (mem, GET_MODE (mem), unsignedp))
ae180d84
JL		 1339 use_ep = TRUE;
1340
1341 else if (!use_ep && mem
1342 && GET_MODE_SIZE (GET_MODE (mem)) <= UNITS_PER_WORD)
1343 {
1344 rtx addr = XEXP (mem, 0);
1345 int regno = -1;
1346 int short_p;
1347
1348 if (GET_CODE (addr) == REG)
1349 {
1350 short_p = TRUE;
1351 regno = REGNO (addr);
1352 }
1353
1354 else if (GET_CODE (addr) == PLUS
1355 && GET_CODE (XEXP (addr, 0)) == REG
1356 && GET_CODE (XEXP (addr, 1)) == CONST_INT
3ce15347 1357 && ((INTVAL (XEXP (addr, 1)))
2268cc52
JL		 1358 < ep_memory_offset (GET_MODE (mem), unsignedp))
1359 && ((INTVAL (XEXP (addr, 1))) >= 0))
ae180d84
JL		 1360 {
1361 short_p = TRUE;
1362 regno = REGNO (XEXP (addr, 0));
1363 }
1364
1365 else
1366 short_p = FALSE;
1367
1368 if (short_p)
1369 {
1370 regs[regno].uses++;
1371 regs[regno].last_insn = insn;
1372 if (!regs[regno].first_insn)
1373 regs[regno].first_insn = insn;
1374 }
1375 }
1376
1377 /* Loading up a register in the basic block zaps any savings
1378 for the register */
9324411a 1379 if (GET_CODE (dest) == REG)
ae180d84 1380 {
ae180d84
JL		 1381 int regno;
1382 int endregno;
1383
9324411a 1384 regno = REGNO (dest);
036620db 1385 endregno = END_REGNO (dest);
ae180d84
JL		 1386
1387 if (!use_ep)
1388 {
1389 /* See if we can use the pointer before this
1390 modification. */
1391 int max_uses = -1;
1392 int max_regno = -1;
1393
1394 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1395 {
1396 if (max_uses < regs[i].uses)
1397 {
1398 max_uses = regs[i].uses;
1399 max_regno = i;
1400 }
1401 }
1402
1403 if (max_uses > 3
1404 && max_regno >= regno
1405 && max_regno < endregno)
1406 {
1407 substitute_ep_register (regs[max_regno].first_insn,
1408 regs[max_regno].last_insn,
3ce15347
NC		 1409 max_uses, max_regno, &r1,
1410 &ep);
ae180d84
JL		 1411
1412 /* Since we made a substitution, zap all remembered
1413 registers. */
1414 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1415 {
1416 regs[i].uses = 0;
b32d5189
DM		 1417 regs[i].first_insn = NULL;
1418 regs[i].last_insn = NULL;
ae180d84
JL		 1419 }
1420 }
1421 }
1422
1423 for (i = regno; i < endregno; i++)
1424 {
1425 regs[i].uses = 0;
b32d5189
DM		 1426 regs[i].first_insn = NULL;
1427 regs[i].last_insn = NULL;
ae180d84
JL		 1428 }
1429 }
1430 }
1431 }
1432 }
1433}
1434
ae180d84 1435/* # of registers saved by the interrupt handler. */
223a9d64 1436#define INTERRUPT_FIXED_NUM 5
ae180d84
JL		 1437
1438/* # of bytes for registers saved by the interrupt handler. */
1439#define INTERRUPT_FIXED_SAVE_SIZE (4 * INTERRUPT_FIXED_NUM)
1440
ae180d84
JL		 1441/* # of words saved for other registers. */
1442#define INTERRUPT_ALL_SAVE_NUM \
223a9d64 1443 (30 - INTERRUPT_FIXED_NUM)
ae180d84
JL		 1444
1445#define INTERRUPT_ALL_SAVE_SIZE (4 * INTERRUPT_ALL_SAVE_NUM)
1446
1447int
59f3507d 1448compute_register_save_size (long * p_reg_saved)
ae180d84
JL		 1449{
1450 int size = 0;
1451 int i;
1452 int interrupt_handler = v850_interrupt_function_p (current_function_decl);
6fb5fa3c 1453 int call_p = df_regs_ever_live_p (LINK_POINTER_REGNUM);
ae180d84
JL		 1454 long reg_saved = 0;
1455
ae180d84
JL		 1456 /* Count space for the register saves. */
1457 if (interrupt_handler)
1458 {
1459 for (i = 0; i <= 31; i++)
1460 switch (i)
1461 {
1462 default:
6fb5fa3c 1463 if (df_regs_ever_live_p (i) || call_p)
ae180d84
JL		 1464 {
1465 size += 4;
1466 reg_saved |= 1L << i;
1467 }
1468 break;
1469
1470 /* We don't save/restore r0 or the stack pointer */
1471 case 0:
1472 case STACK_POINTER_REGNUM:
1473 break;
1474
1475 /* For registers with fixed use, we save them, set them to the
1476 appropriate value, and then restore them.
1477 These registers are handled specially, so don't list them
1478 on the list of registers to save in the prologue. */
1479 case 1: /* temp used to hold ep */
b24bcfb3 1480 case 4: /* gp */
ae180d84 1481 case 10: /* temp used to call interrupt save/restore */
223a9d64 1482 case 11: /* temp used to call interrupt save/restore (long call) */
ae180d84
JL		 1483 case EP_REGNUM: /* ep */
1484 size += 4;
1485 break;
1486 }
1487 }
ae180d84 1488 else
29a65e3d
NC		 1489 {
1490 /* Find the first register that needs to be saved. */
1491 for (i = 0; i <= 31; i++)
6fb5fa3c 1492 if (df_regs_ever_live_p (i) && ((! call_used_regs[i])
29a65e3d
NC		 1493 || i == LINK_POINTER_REGNUM))
1494 break;
1495
1496 /* If it is possible that an out-of-line helper function might be
1497 used to generate the prologue for the current function, then we
1498 need to cover the possibility that such a helper function will
1499 be used, despite the fact that there might be gaps in the list of
1500 registers that need to be saved. To detect this we note that the
a17a104c
CM		 1501 helper functions always push at least register r29 (provided
1502 that the function is not an interrupt handler). */
29a65e3d
NC		 1503
1504 if (TARGET_PROLOG_FUNCTION
a17a104c 1505 && (i == 2 || ((i >= 20) && (i < 30))))
ae180d84 1506 {
29a65e3d
NC		 1507 if (i == 2)
1508 {
1509 size += 4;
1510 reg_saved |= 1L << i;
1511
1512 i = 20;
1513 }
ae180d84 1514
29a65e3d
NC		 1515 /* Helper functions save all registers between the starting
1516 register and the last register, regardless of whether they
1517 are actually used by the function or not. */
1518 for (; i <= 29; i++)
1519 {
1520 size += 4;
1521 reg_saved |= 1L << i;
1522 }
1523
6fb5fa3c 1524 if (df_regs_ever_live_p (LINK_POINTER_REGNUM))
29a65e3d
NC		 1525 {
1526 size += 4;
1527 reg_saved |= 1L << LINK_POINTER_REGNUM;
1528 }
1529 }
1530 else
1531 {
1532 for (; i <= 31; i++)
6fb5fa3c 1533 if (df_regs_ever_live_p (i) && ((! call_used_regs[i])
29a65e3d
NC		 1534 || i == LINK_POINTER_REGNUM))
1535 {
1536 size += 4;
1537 reg_saved |= 1L << i;
1538 }
1539 }
1540 }
1541
ae180d84
JL		 1542 if (p_reg_saved)
1543 *p_reg_saved = reg_saved;
1544
1545 return size;
1546}
1547
b84d824d
NC		 1548/* Typical stack layout should looks like this after the function's prologue:
1549
1550 | |
1551 -- ^
1552 | | \ |
1553 | | arguments saved | Increasing
1554 | | on the stack | addresses
1555 PARENT arg pointer -> | | /
1556 -------------------------- ---- -------------------
1557 | | - space for argument split between regs & stack
1558 --
1559 CHILD | | \ <-- (return address here)
1560 | | other call
1561 | | saved registers
1562 | | /
1563 --
1564 frame pointer -> | | \ ___
1565 | | local |
1566 | | variables |f
1567 | | / |r
1568 -- |a
1569 | | \ |m
1570 | | outgoing |e
1571 | | arguments | | Decreasing
1572 (hard) frame pointer | | / | | addresses
1573 and stack pointer -> | | / _|_ |
1574 -------------------------- ---- ------------------ V */
1575
ae180d84 1576int
f075bd95 1577compute_frame_size (poly_int64 size, long * p_reg_saved)
ae180d84 1578{
ae180d84
JL		 1579 return (size
1580 + compute_register_save_size (p_reg_saved)
38173d38 1581 + crtl->outgoing_args_size);
ae180d84
JL		 1582}
1583
223a9d64
N		 1584static int
1585use_prolog_function (int num_save, int frame_size)
1586{
1587 int alloc_stack = (4 * num_save);
1588 int unalloc_stack = frame_size - alloc_stack;
1589 int save_func_len, restore_func_len;
1590 int save_normal_len, restore_normal_len;
1591
1592 if (! TARGET_DISABLE_CALLT)
1593 save_func_len = restore_func_len = 2;
1594 else
1595 save_func_len = restore_func_len = TARGET_LONG_CALLS ? (4+4+4+2+2) : 4;
1596
1597 if (unalloc_stack)
1598 {
1599 save_func_len += CONST_OK_FOR_J (-unalloc_stack) ? 2 : 4;
1600 restore_func_len += CONST_OK_FOR_J (-unalloc_stack) ? 2 : 4;
1601 }
1602
1603 /* See if we would have used ep to save the stack. */
1604 if (TARGET_EP && num_save > 3 && (unsigned)frame_size < 255)
1605 save_normal_len = restore_normal_len = (3 * 2) + (2 * num_save);
1606 else
1607 save_normal_len = restore_normal_len = 4 * num_save;
1608
1609 save_normal_len += CONST_OK_FOR_J (-frame_size) ? 2 : 4;
1610 restore_normal_len += (CONST_OK_FOR_J (frame_size) ? 2 : 4) + 2;
1611
1612 /* Don't bother checking if we don't actually save any space.
1613 This happens for instance if one register is saved and additional
1614 stack space is allocated. */
1615 return ((save_func_len + restore_func_len) < (save_normal_len + restore_normal_len));
1616}
1617
b12b5029 1618static void
b84d824d 1619increment_stack (signed int amount, bool in_prologue)
b12b5029
NC		 1620{
1621 rtx inc;
1622
1623 if (amount == 0)
1624 return;
1625
1626 inc = GEN_INT (amount);
1627
1628 if (! CONST_OK_FOR_K (amount))
1629 {
1630 rtx reg = gen_rtx_REG (Pmode, 12);
1631
b84d824d
NC		 1632 inc = emit_move_insn (reg, inc);
1633 if (in_prologue)
1634 F (inc);
b12b5029
NC		 1635 inc = reg;
1636 }
1637
b84d824d
NC		 1638 inc = emit_insn (gen_addsi3 (stack_pointer_rtx, stack_pointer_rtx, inc));
1639 if (in_prologue)
1640 F (inc);
b12b5029
NC		 1641}
1642
ae180d84 1643void
59f3507d 1644expand_prologue (void)
ae180d84
JL		 1645{
1646 unsigned int i;
ae180d84
JL		 1647 unsigned int size = get_frame_size ();
1648 unsigned int actual_fsize;
1649 unsigned int init_stack_alloc = 0;
1650 rtx save_regs[32];
1651 rtx save_all;
3ce15347 1652 unsigned int num_save;
ae180d84
JL		 1653 int code;
1654 int interrupt_handler = v850_interrupt_function_p (current_function_decl);
1655 long reg_saved = 0;
1656
1657 actual_fsize = compute_frame_size (size, &reg_saved);
1658
b12b5029
NC		 1659 if (flag_stack_usage_info)
1660 current_function_static_stack_size = actual_fsize;
1661
0e668396 1662 /* Save/setup global registers for interrupt functions right now. */
ae180d84
JL		 1663 if (interrupt_handler)
1664 {
dbdbd982 1665 if (! TARGET_DISABLE_CALLT && (TARGET_V850E_UP))
b4378319
NC		 1666 emit_insn (gen_callt_save_interrupt ());
1667 else
674fdc14 1668 emit_insn (gen_save_interrupt ());
b4378319 1669
ae180d84 1670 actual_fsize -= INTERRUPT_FIXED_SAVE_SIZE;
29a65e3d
NC		 1671
1672 if (((1L << LINK_POINTER_REGNUM) & reg_saved) != 0)
ae180d84 1673 actual_fsize -= INTERRUPT_ALL_SAVE_SIZE;
b84d824d
NC		 1674
1675 /* Interrupt functions are not passed arguments, so no need to
1676 allocate space for split structure arguments. */
1677 gcc_assert (crtl->args.pretend_args_size == 0);
ae180d84
JL		 1678 }
1679
0e668396 1680 /* Identify all of the saved registers. */
ae180d84 1681 num_save = 0;
223a9d64 1682 for (i = 1; i < 32; i++)
ae180d84
JL		 1683 {
1684 if (((1L << i) & reg_saved) != 0)
c5c76735 1685 save_regs[num_save++] = gen_rtx_REG (Pmode, i);
ae180d84
JL		 1686 }
1687
b84d824d
NC		 1688 if (crtl->args.pretend_args_size)
1689 {
1690 if (num_save == 0)
1691 {
1692 increment_stack (- (actual_fsize + crtl->args.pretend_args_size), true);
1693 actual_fsize = 0;
1694 }
1695 else
1696 increment_stack (- crtl->args.pretend_args_size, true);
1697 }
1698
ae180d84 1699 /* See if we have an insn that allocates stack space and saves the particular
b84d824d
NC		 1700 registers we want to. Note that the helpers won't
1701 allocate additional space for registers GCC saves to complete a
1702 "split" structure argument. */
ae180d84 1703 save_all = NULL_RTX;
b84d824d
NC		 1704 if (TARGET_PROLOG_FUNCTION
1705 && !crtl->args.pretend_args_size
1706 && num_save > 0)
ae180d84 1707 {
223a9d64 1708 if (use_prolog_function (num_save, actual_fsize))
ae180d84 1709 {
223a9d64
N		 1710 int alloc_stack = 4 * num_save;
1711 int offset = 0;
1712
c5c76735
JL		 1713 save_all = gen_rtx_PARALLEL
1714 (VOIDmode,
fdf3bb57 1715 rtvec_alloc (num_save + 1
223a9d64 1716 + (TARGET_DISABLE_CALLT ? (TARGET_LONG_CALLS ? 2 : 1) : 0)));
c5c76735
JL		 1717
1718 XVECEXP (save_all, 0, 0)
f7df4a84 1719 = gen_rtx_SET (stack_pointer_rtx,
223a9d64
N		 1720 gen_rtx_PLUS (Pmode,
1721 stack_pointer_rtx,
1722 GEN_INT(-alloc_stack)));
ae180d84
JL		 1723 for (i = 0; i < num_save; i++)
1724 {
223a9d64 1725 offset -= 4;
c5c76735 1726 XVECEXP (save_all, 0, i+1)
f7df4a84 1727 = gen_rtx_SET (gen_rtx_MEM (Pmode,
223a9d64
N		 1728 gen_rtx_PLUS (Pmode,
1729 stack_pointer_rtx,
1730 GEN_INT(offset))),
c5c76735 1731 save_regs[i]);
ae180d84
JL		 1732 }
1733
223a9d64 1734 if (TARGET_DISABLE_CALLT)
fdf3bb57
NC		 1735 {
1736 XVECEXP (save_all, 0, num_save + 1)
1737 = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (Pmode, 10));
1738
1739 if (TARGET_LONG_CALLS)
1740 XVECEXP (save_all, 0, num_save + 2)
1741 = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (Pmode, 11));
1742 }
1743
b84d824d
NC		 1744 v850_all_frame_related (save_all);
1745
800dcd86 1746 code = recog (save_all, NULL, NULL);
ae180d84
JL		 1747 if (code >= 0)
1748 {
1749 rtx insn = emit_insn (save_all);
1750 INSN_CODE (insn) = code;
1751 actual_fsize -= alloc_stack;
29a65e3d 1752
ae180d84
JL		 1753 }
1754 else
1755 save_all = NULL_RTX;
1756 }
1757 }
1758
3ce15347 1759 /* If no prolog save function is available, store the registers the old
d4de0221 1760 fashioned way (one by one). */
ae180d84
JL		 1761 if (!save_all)
1762 {
1763 /* Special case interrupt functions that save all registers for a call. */
29a65e3d
NC		 1764 if (interrupt_handler && ((1L << LINK_POINTER_REGNUM) & reg_saved) != 0)
1765 {
dbdbd982 1766 if (! TARGET_DISABLE_CALLT && (TARGET_V850E_UP))
b4378319
NC		 1767 emit_insn (gen_callt_save_all_interrupt ());
1768 else
1769 emit_insn (gen_save_all_interrupt ());
29a65e3d 1770 }
ae180d84
JL		 1771 else
1772 {
223a9d64 1773 int offset;
ae180d84
JL		 1774 /* If the stack is too big, allocate it in chunks so we can do the
1775 register saves. We use the register save size so we use the ep
1776 register. */
1777 if (actual_fsize && !CONST_OK_FOR_K (-actual_fsize))
1778 init_stack_alloc = compute_register_save_size (NULL);
1779 else
1780 init_stack_alloc = actual_fsize;
145870b5 1781
d4de0221 1782 /* Save registers at the beginning of the stack frame. */
ae180d84 1783 offset = init_stack_alloc - 4;
145870b5 1784
ae180d84 1785 if (init_stack_alloc)
b84d824d 1786 increment_stack (- (signed) init_stack_alloc, true);
145870b5 1787
ae180d84 1788 /* Save the return pointer first. */
29a65e3d 1789 if (num_save > 0 && REGNO (save_regs[num_save-1]) == LINK_POINTER_REGNUM)
ae180d84 1790 {
b84d824d
NC		 1791 F (emit_move_insn (gen_rtx_MEM (SImode,
1792 plus_constant (Pmode,
1793 stack_pointer_rtx,
1794 offset)),
1795 save_regs[--num_save]));
ae180d84
JL		 1796 offset -= 4;
1797 }
145870b5 1798
ae180d84
JL		 1799 for (i = 0; i < num_save; i++)
1800 {
b84d824d
NC		 1801 F (emit_move_insn (gen_rtx_MEM (SImode,
1802 plus_constant (Pmode,
1803 stack_pointer_rtx,
1804 offset)),
1805 save_regs[i]));
ae180d84
JL		 1806 offset -= 4;
1807 }
1808 }
1809 }
1810
1811 /* Allocate the rest of the stack that was not allocated above (either it is
1812 > 32K or we just called a function to save the registers and needed more
1813 stack. */
1814 if (actual_fsize > init_stack_alloc)
b84d824d 1815 increment_stack (init_stack_alloc - actual_fsize, true);
ae180d84
JL		 1816
1817 /* If we need a frame pointer, set it up now. */
1818 if (frame_pointer_needed)
b84d824d 1819 F (emit_move_insn (hard_frame_pointer_rtx, stack_pointer_rtx));
ae180d84
JL		 1820}
1821\f
1822
1823void
59f3507d 1824expand_epilogue (void)
ae180d84
JL		 1825{
1826 unsigned int i;
ae180d84
JL		 1827 unsigned int size = get_frame_size ();
1828 long reg_saved = 0;
fda41d93 1829 int actual_fsize = compute_frame_size (size, &reg_saved);
ae180d84
JL		 1830 rtx restore_regs[32];
1831 rtx restore_all;
3ce15347 1832 unsigned int num_restore;
ae180d84
JL		 1833 int code;
1834 int interrupt_handler = v850_interrupt_function_p (current_function_decl);
1835
1836 /* Eliminate the initial stack stored by interrupt functions. */
1837 if (interrupt_handler)
1838 {
1839 actual_fsize -= INTERRUPT_FIXED_SAVE_SIZE;
29a65e3d 1840 if (((1L << LINK_POINTER_REGNUM) & reg_saved) != 0)
ae180d84
JL		 1841 actual_fsize -= INTERRUPT_ALL_SAVE_SIZE;
1842 }
1843
1844 /* Cut off any dynamic stack created. */
1845 if (frame_pointer_needed)
1846 emit_move_insn (stack_pointer_rtx, hard_frame_pointer_rtx);
1847
0e668396 1848 /* Identify all of the saved registers. */
ae180d84 1849 num_restore = 0;
223a9d64 1850 for (i = 1; i < 32; i++)
ae180d84
JL		 1851 {
1852 if (((1L << i) & reg_saved) != 0)
c5c76735 1853 restore_regs[num_restore++] = gen_rtx_REG (Pmode, i);
ae180d84
JL		 1854 }
1855
ae180d84
JL		 1856 /* See if we have an insn that restores the particular registers we
1857 want to. */
1858 restore_all = NULL_RTX;
223a9d64 1859
0e668396
NC		 1860 if (TARGET_PROLOG_FUNCTION
1861 && num_restore > 0
b84d824d 1862 && !crtl->args.pretend_args_size
ae180d84
JL		 1863 && !interrupt_handler)
1864 {
223a9d64 1865 int alloc_stack = (4 * num_restore);
ae180d84 1866
ae180d84 1867 /* Don't bother checking if we don't actually save any space. */
223a9d64 1868 if (use_prolog_function (num_restore, actual_fsize))
ae180d84 1869 {
223a9d64 1870 int offset;
c5c76735
JL		 1871 restore_all = gen_rtx_PARALLEL (VOIDmode,
1872 rtvec_alloc (num_restore + 2));
3810076b 1873 XVECEXP (restore_all, 0, 0) = ret_rtx;
ae180d84 1874 XVECEXP (restore_all, 0, 1)
f7df4a84
RS		 1875 = gen_rtx_SET (stack_pointer_rtx,
1876 gen_rtx_PLUS (Pmode,
1877 stack_pointer_rtx,
1878 GEN_INT (alloc_stack)));
ae180d84
JL		 1879
1880 offset = alloc_stack - 4;
1881 for (i = 0; i < num_restore; i++)
1882 {
1883 XVECEXP (restore_all, 0, i+2)
f7df4a84 1884 = gen_rtx_SET (restore_regs[i],
c5c76735 1885 gen_rtx_MEM (Pmode,
223a9d64
N		 1886 gen_rtx_PLUS (Pmode,
1887 stack_pointer_rtx,
1888 GEN_INT(offset))));
ae180d84
JL		 1889 offset -= 4;
1890 }
1891
800dcd86 1892 code = recog (restore_all, NULL, NULL);
0e668396 1893
ae180d84
JL		 1894 if (code >= 0)
1895 {
1896 rtx insn;
1897
1898 actual_fsize -= alloc_stack;
b84d824d 1899 increment_stack (actual_fsize, false);
ae180d84
JL		 1900
1901 insn = emit_jump_insn (restore_all);
1902 INSN_CODE (insn) = code;
ae180d84
JL		 1903 }
1904 else
1905 restore_all = NULL_RTX;
1906 }
1907 }
1908
22f23985 1909 /* If no epilogue save function is available, restore the registers the
0e668396 1910 old fashioned way (one by one). */
ae180d84
JL		 1911 if (!restore_all)
1912 {
223a9d64
N		 1913 unsigned int init_stack_free;
1914
ae180d84 1915 /* If the stack is large, we need to cut it down in 2 pieces. */
223a9d64
N		 1916 if (interrupt_handler)
1917 init_stack_free = 0;
1918 else if (actual_fsize && !CONST_OK_FOR_K (-actual_fsize))
ae180d84
JL		 1919 init_stack_free = 4 * num_restore;
1920 else
fda41d93 1921 init_stack_free = (signed) actual_fsize;
ae180d84 1922
0e668396 1923 /* Deallocate the rest of the stack if it is > 32K. */
5a82ecd9 1924 if ((unsigned int) actual_fsize > init_stack_free)
b84d824d 1925 increment_stack (actual_fsize - init_stack_free, false);
ae180d84
JL		 1926
1927 /* Special case interrupt functions that save all registers
1928 for a call. */
29a65e3d
NC		 1929 if (interrupt_handler && ((1L << LINK_POINTER_REGNUM) & reg_saved) != 0)
1930 {
223a9d64 1931 if (! TARGET_DISABLE_CALLT)
b4378319
NC		 1932 emit_insn (gen_callt_restore_all_interrupt ());
1933 else
1934 emit_insn (gen_restore_all_interrupt ());
29a65e3d 1935 }
ae180d84
JL		 1936 else
1937 {
0e668396 1938 /* Restore registers from the beginning of the stack frame. */
223a9d64 1939 int offset = init_stack_free - 4;
ae180d84
JL		 1940
1941 /* Restore the return pointer first. */
29a65e3d
NC		 1942 if (num_restore > 0
1943 && REGNO (restore_regs [num_restore - 1]) == LINK_POINTER_REGNUM)
ae180d84
JL		 1944 {
1945 emit_move_insn (restore_regs[--num_restore],
c5c76735 1946 gen_rtx_MEM (SImode,
0a81f074
RS		 1947 plus_constant (Pmode,
1948 stack_pointer_rtx,
c5c76735 1949 offset)));
ae180d84
JL		 1950 offset -= 4;
1951 }
1952
1953 for (i = 0; i < num_restore; i++)
1954 {
1955 emit_move_insn (restore_regs[i],
c5c76735 1956 gen_rtx_MEM (SImode,
0a81f074
RS		 1957 plus_constant (Pmode,
1958 stack_pointer_rtx,
c5c76735 1959 offset)));
ae180d84 1960
c41c1387 1961 emit_use (restore_regs[i]);
ae180d84
JL		 1962 offset -= 4;
1963 }
1964
1965 /* Cut back the remainder of the stack. */
b84d824d
NC		 1966 increment_stack (init_stack_free + crtl->args.pretend_args_size,
1967 false);
ae180d84
JL		 1968 }
1969
1970 /* And return or use reti for interrupt handlers. */
1971 if (interrupt_handler)
b4378319 1972 {
dbdbd982 1973 if (! TARGET_DISABLE_CALLT && (TARGET_V850E_UP))
b4378319
NC		 1974 emit_insn (gen_callt_return_interrupt ());
1975 else
1976 emit_jump_insn (gen_return_interrupt ());
1977 }
ae180d84
JL		 1978 else if (actual_fsize)
1979 emit_jump_insn (gen_return_internal ());
1980 else
7323a100 1981 emit_jump_insn (gen_return_simple ());
ae180d84
JL		 1982 }
1983
ae180d84
JL		 1984 v850_interrupt_cache_p = FALSE;
1985 v850_interrupt_p = FALSE;
1986}
1987
ae180d84 1988/* Update the condition code from the insn. */
ae180d84 1989void
84034c69 1990notice_update_cc (rtx body, rtx_insn *insn)
ae180d84
JL		 1991{
1992 switch (get_attr_cc (insn))
1993 {
1994 case CC_NONE:
1995 /* Insn does not affect CC at all. */
1996 break;
1997
1998 case CC_NONE_0HIT:
1999 /* Insn does not change CC, but the 0'th operand has been changed. */
2000 if (cc_status.value1 != 0
1ccbefce 2001 && reg_overlap_mentioned_p (recog_data.operand[0], cc_status.value1))
ae180d84
JL		 2002 cc_status.value1 = 0;
2003 break;
2004
2005 case CC_SET_ZN:
1ccbefce 2006 /* Insn sets the Z,N flags of CC to recog_data.operand[0].
ae180d84
JL		 2007 V,C is in an unusable state. */
2008 CC_STATUS_INIT;
2009 cc_status.flags |= CC_OVERFLOW_UNUSABLE | CC_NO_CARRY;
1ccbefce 2010 cc_status.value1 = recog_data.operand[0];
ae180d84
JL		 2011 break;
2012
2013 case CC_SET_ZNV:
1ccbefce 2014 /* Insn sets the Z,N,V flags of CC to recog_data.operand[0].
223a9d64 2015 C is in an unusable state. */
ae180d84
JL		 2016 CC_STATUS_INIT;
2017 cc_status.flags |= CC_NO_CARRY;
1ccbefce 2018 cc_status.value1 = recog_data.operand[0];
ae180d84
JL		 2019 break;
2020
2021 case CC_COMPARE:
2022 /* The insn is a compare instruction. */
2023 CC_STATUS_INIT;
2024 cc_status.value1 = SET_SRC (body);
2025 break;
2026
2027 case CC_CLOBBER:
2028 /* Insn doesn't leave CC in a usable state. */
2029 CC_STATUS_INIT;
2030 break;
122603fa
N		 2031
2032 default:
2033 break;
ae180d84
JL		 2034 }
2035}
223a9d64 2036
3ce15347 2037/* Retrieve the data area that has been chosen for the given decl. */
ae180d84 2038
3ce15347 2039v850_data_area
59f3507d 2040v850_get_data_area (tree decl)
3ce15347 2041{
91d231cb 2042 if (lookup_attribute ("sda", DECL_ATTRIBUTES (decl)) != NULL_TREE)
3ce15347
NC		 2043 return DATA_AREA_SDA;
2044
91d231cb 2045 if (lookup_attribute ("tda", DECL_ATTRIBUTES (decl)) != NULL_TREE)
3ce15347
NC		 2046 return DATA_AREA_TDA;
2047
91d231cb 2048 if (lookup_attribute ("zda", DECL_ATTRIBUTES (decl)) != NULL_TREE)
3ce15347
NC		 2049 return DATA_AREA_ZDA;
2050
2051 return DATA_AREA_NORMAL;
2052}
ae180d84 2053
3ce15347
NC		 2054/* Store the indicated data area in the decl's attributes. */
2055
2056static void
59f3507d 2057v850_set_data_area (tree decl, v850_data_area data_area)
3ce15347
NC		 2058{
2059 tree name;
2060
2061 switch (data_area)
2062 {
2063 case DATA_AREA_SDA: name = get_identifier ("sda"); break;
2064 case DATA_AREA_TDA: name = get_identifier ("tda"); break;
2065 case DATA_AREA_ZDA: name = get_identifier ("zda"); break;
2066 default:
2067 return;
2068 }
2069
91d231cb
JM		 2070 DECL_ATTRIBUTES (decl) = tree_cons
2071 (name, NULL, DECL_ATTRIBUTES (decl));
3ce15347
NC		 2072}
2073\f
91d231cb
JM		 2074/* Handle an "interrupt" attribute; arguments as in
2075 struct attribute_spec.handler. */
2076static tree
4849deb1 2077v850_handle_interrupt_attribute (tree *node, tree name,
59f3507d
NN		 2078 tree args ATTRIBUTE_UNUSED,
2079 int flags ATTRIBUTE_UNUSED,
2080 bool * no_add_attrs)
91d231cb
JM		 2081{
2082 if (TREE_CODE (*node) != FUNCTION_DECL)
2083 {
29d08eba
JM		 2084 warning (OPT_Wattributes, "%qE attribute only applies to functions",
2085 name);
91d231cb
JM		 2086 *no_add_attrs = true;
2087 }
2088
2089 return NULL_TREE;
2090}
2091
2092/* Handle a "sda", "tda" or "zda" attribute; arguments as in
2093 struct attribute_spec.handler. */
2094static tree
4849deb1 2095v850_handle_data_area_attribute (tree *node, tree name,
59f3507d
NN		 2096 tree args ATTRIBUTE_UNUSED,
2097 int flags ATTRIBUTE_UNUSED,
2098 bool * no_add_attrs)
ae180d84 2099{
3ce15347
NC		 2100 v850_data_area data_area;
2101 v850_data_area area;
91d231cb 2102 tree decl = *node;
ae180d84 2103
3ce15347 2104 /* Implement data area attribute. */
91d231cb 2105 if (is_attribute_p ("sda", name))
3ce15347 2106 data_area = DATA_AREA_SDA;
91d231cb 2107 else if (is_attribute_p ("tda", name))
3ce15347 2108 data_area = DATA_AREA_TDA;
91d231cb 2109 else if (is_attribute_p ("zda", name))
3ce15347
NC		 2110 data_area = DATA_AREA_ZDA;
2111 else
f2f84cba 2112 gcc_unreachable ();
3ce15347
NC		 2113
2114 switch (TREE_CODE (decl))
2115 {
2116 case VAR_DECL:
2117 if (current_function_decl != NULL_TREE)
91d231cb 2118 {
c5d75364
MLI		 2119 error_at (DECL_SOURCE_LOCATION (decl),
2120 "data area attributes cannot be specified for "
2121 "local variables");
91d231cb
JM		 2122 *no_add_attrs = true;
2123 }
2124
d5356522 2125 /* FALLTHRU */
3ce15347
NC		 2126
2127 case FUNCTION_DECL:
2128 area = v850_get_data_area (decl);
2129 if (area != DATA_AREA_NORMAL && data_area != area)
91d231cb 2130 {
dee15844
JM		 2131 error ("data area of %q+D conflicts with previous declaration",
2132 decl);
91d231cb
JM		 2133 *no_add_attrs = true;
2134 }
2135 break;
3ce15347
NC		 2136
2137 default:
2138 break;
2139 }
91d231cb
JM		 2140
2141 return NULL_TREE;
ae180d84
JL		 2142}
2143
2144\f
2145/* Return nonzero if FUNC is an interrupt function as specified
2146 by the "interrupt" attribute. */
2147
2148int
59f3507d 2149v850_interrupt_function_p (tree func)
ae180d84
JL		 2150{
2151 tree a;
2152 int ret = 0;
2153
2154 if (v850_interrupt_cache_p)
2155 return v850_interrupt_p;
2156
2157 if (TREE_CODE (func) != FUNCTION_DECL)
2158 return 0;
2159
91d231cb 2160 a = lookup_attribute ("interrupt_handler", DECL_ATTRIBUTES (func));
ae180d84
JL		 2161 if (a != NULL_TREE)
2162 ret = 1;
2163
2164 else
2165 {
91d231cb 2166 a = lookup_attribute ("interrupt", DECL_ATTRIBUTES (func));
ae180d84
JL		 2167 ret = a != NULL_TREE;
2168 }
2169
2170 /* Its not safe to trust global variables until after function inlining has
2171 been done. */
2172 if (reload_completed | reload_in_progress)
2173 v850_interrupt_p = ret;
2174
2175 return ret;
2176}
2177
2178\f
fb49053f 2179static void
59f3507d 2180v850_encode_data_area (tree decl, rtx symbol)
ae180d84 2181{
50d1ff6a 2182 int flags;
3ce15347 2183
839a4992 2184 /* Map explicit sections into the appropriate attribute */
3ce15347
NC		 2185 if (v850_get_data_area (decl) == DATA_AREA_NORMAL)
2186 {
2187 if (DECL_SECTION_NAME (decl))
2188 {
f961457f 2189 const char *name = DECL_SECTION_NAME (decl);
3ce15347
NC		 2190
2191 if (streq (name, ".zdata") || streq (name, ".zbss"))
2192 v850_set_data_area (decl, DATA_AREA_ZDA);
2193
2194 else if (streq (name, ".sdata") || streq (name, ".sbss"))
2195 v850_set_data_area (decl, DATA_AREA_SDA);
2196
2197 else if (streq (name, ".tdata"))
2198 v850_set_data_area (decl, DATA_AREA_TDA);
2199 }
2200
2201 /* If no attribute, support -m{zda,sda,tda}=n */
2202 else
2203 {
2204 int size = int_size_in_bytes (TREE_TYPE (decl));
2205 if (size <= 0)
2206 ;
2207
4a8d3d91 2208 else if (size <= small_memory_max [(int) SMALL_MEMORY_TDA])
3ce15347
NC		 2209 v850_set_data_area (decl, DATA_AREA_TDA);
2210
4a8d3d91 2211 else if (size <= small_memory_max [(int) SMALL_MEMORY_SDA])
3ce15347
NC		 2212 v850_set_data_area (decl, DATA_AREA_SDA);
2213
4a8d3d91 2214 else if (size <= small_memory_max [(int) SMALL_MEMORY_ZDA])
3ce15347
NC		 2215 v850_set_data_area (decl, DATA_AREA_ZDA);
2216 }
2217
2218 if (v850_get_data_area (decl) == DATA_AREA_NORMAL)
2219 return;
2220 }
2221
50d1ff6a 2222 flags = SYMBOL_REF_FLAGS (symbol);
3ce15347
NC		 2223 switch (v850_get_data_area (decl))
2224 {
50d1ff6a
RH		 2225 case DATA_AREA_ZDA: flags |= SYMBOL_FLAG_ZDA; break;
2226 case DATA_AREA_TDA: flags |= SYMBOL_FLAG_TDA; break;
2227 case DATA_AREA_SDA: flags |= SYMBOL_FLAG_SDA; break;
f2f84cba 2228 default: gcc_unreachable ();
3ce15347 2229 }
50d1ff6a 2230 SYMBOL_REF_FLAGS (symbol) = flags;
ae180d84 2231}
145870b5 2232
fb49053f 2233static void
59f3507d 2234v850_encode_section_info (tree decl, rtx rtl, int first)
fb49053f 2235{
c6a2438a 2236 default_encode_section_info (decl, rtl, first);
50d1ff6a
RH		 2237
2238 if (TREE_CODE (decl) == VAR_DECL
fb49053f 2239 && (TREE_STATIC (decl) || DECL_EXTERNAL (decl)))
c6a2438a 2240 v850_encode_data_area (decl, XEXP (rtl, 0));
fb49053f
RH		 2241}
2242
145870b5
NC		 2243/* Construct a JR instruction to a routine that will perform the equivalent of
2244 the RTL passed in as an argument. This RTL is a function epilogue that
2245 pops registers off the stack and possibly releases some extra stack space
2246 as well. The code has already verified that the RTL matches these
2247 requirements. */
223a9d64 2248
145870b5 2249char *
59f3507d 2250construct_restore_jr (rtx op)
145870b5
NC		 2251{
2252 int count = XVECLEN (op, 0);
2253 int stack_bytes;
2254 unsigned long int mask;
2255 unsigned long int first;
2256 unsigned long int last;
2257 int i;
2258 static char buff [100]; /* XXX */
2259
2260 if (count <= 2)
2261 {
ab532386 2262 error ("bogus JR construction: %d", count);
145870b5
NC		 2263 return NULL;
2264 }
2265
2266 /* Work out how many bytes to pop off the stack before retrieving
2267 registers. */
f2f84cba
NS		 2268 gcc_assert (GET_CODE (XVECEXP (op, 0, 1)) == SET);
2269 gcc_assert (GET_CODE (SET_SRC (XVECEXP (op, 0, 1))) == PLUS);
2270 gcc_assert (GET_CODE (XEXP (SET_SRC (XVECEXP (op, 0, 1)), 1)) == CONST_INT);
145870b5
NC		 2271
2272 stack_bytes = INTVAL (XEXP (SET_SRC (XVECEXP (op, 0, 1)), 1));
2273
d4de0221 2274 /* Each pop will remove 4 bytes from the stack.... */
145870b5
NC		 2275 stack_bytes -= (count - 2) * 4;
2276
2277 /* Make sure that the amount we are popping either 0 or 16 bytes. */
223a9d64 2278 if (stack_bytes != 0)
145870b5 2279 {
c725bd79 2280 error ("bad amount of stack space removal: %d", stack_bytes);
145870b5
NC		 2281 return NULL;
2282 }
2283
2284 /* Now compute the bit mask of registers to push. */
2285 mask = 0;
2286 for (i = 2; i < count; i++)
2287 {
2288 rtx vector_element = XVECEXP (op, 0, i);
2289
f2f84cba
NS		 2290 gcc_assert (GET_CODE (vector_element) == SET);
2291 gcc_assert (GET_CODE (SET_DEST (vector_element)) == REG);
2292 gcc_assert (register_is_ok_for_epilogue (SET_DEST (vector_element),
2293 SImode));
145870b5
NC		 2294
2295 mask |= 1 << REGNO (SET_DEST (vector_element));
2296 }
2297
2298 /* Scan for the first register to pop. */
2299 for (first = 0; first < 32; first++)
2300 {
2301 if (mask & (1 << first))
2302 break;
2303 }
2304
f2f84cba 2305 gcc_assert (first < 32);
145870b5
NC		 2306
2307 /* Discover the last register to pop. */
29a65e3d 2308 if (mask & (1 << LINK_POINTER_REGNUM))
145870b5 2309 {
29a65e3d 2310 last = LINK_POINTER_REGNUM;
145870b5
NC		 2311 }
2312 else
2313 {
f2f84cba
NS		 2314 gcc_assert (!stack_bytes);
2315 gcc_assert (mask & (1 << 29));
145870b5
NC		 2316
2317 last = 29;
2318 }
2319
323d8e7b
JL		 2320 /* Note, it is possible to have gaps in the register mask.
2321 We ignore this here, and generate a JR anyway. We will
3ce15347 2322 be popping more registers than is strictly necessary, but
323d8e7b
JL		 2323 it does save code space. */
2324
be1d3f93
NC		 2325 if (TARGET_LONG_CALLS)
2326 {
2327 char name[40];
2328
2329 if (first == last)
2330 sprintf (name, "__return_%s", reg_names [first]);
2331 else
2332 sprintf (name, "__return_%s_%s", reg_names [first], reg_names [last]);
2333
2334 sprintf (buff, "movhi hi(%s), r0, r6\n\tmovea lo(%s), r6, r6\n\tjmp r6",
2335 name, name);
2336 }
145870b5 2337 else
be1d3f93
NC		 2338 {
2339 if (first == last)
2340 sprintf (buff, "jr __return_%s", reg_names [first]);
2341 else
2342 sprintf (buff, "jr __return_%s_%s", reg_names [first], reg_names [last]);
2343 }
2344
145870b5
NC		 2345 return buff;
2346}
2347
2348
145870b5
NC		 2349/* Construct a JARL instruction to a routine that will perform the equivalent
2350 of the RTL passed as a parameter. This RTL is a function prologue that
2351 saves some of the registers r20 - r31 onto the stack, and possibly acquires
2352 some stack space as well. The code has already verified that the RTL
2353 matches these requirements. */
2354char *
59f3507d 2355construct_save_jarl (rtx op)
145870b5
NC		 2356{
2357 int count = XVECLEN (op, 0);
2358 int stack_bytes;
2359 unsigned long int mask;
2360 unsigned long int first;
2361 unsigned long int last;
2362 int i;
2363 static char buff [100]; /* XXX */
2364
223a9d64 2365 if (count <= (TARGET_LONG_CALLS ? 3 : 2))
145870b5 2366 {
d8a07487 2367 error ("bogus JARL construction: %d", count);
145870b5
NC		 2368 return NULL;
2369 }
2370
2371 /* Paranoia. */
f2f84cba
NS		 2372 gcc_assert (GET_CODE (XVECEXP (op, 0, 0)) == SET);
2373 gcc_assert (GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) == PLUS);
2374 gcc_assert (GET_CODE (XEXP (SET_SRC (XVECEXP (op, 0, 0)), 0)) == REG);
2375 gcc_assert (GET_CODE (XEXP (SET_SRC (XVECEXP (op, 0, 0)), 1)) == CONST_INT);
145870b5
NC		 2376
2377 /* Work out how many bytes to push onto the stack after storing the
2378 registers. */
2379 stack_bytes = INTVAL (XEXP (SET_SRC (XVECEXP (op, 0, 0)), 1));
2380
d4de0221 2381 /* Each push will put 4 bytes from the stack.... */
fdf3bb57 2382 stack_bytes += (count - (TARGET_LONG_CALLS ? 3 : 2)) * 4;
145870b5
NC		 2383
2384 /* Make sure that the amount we are popping either 0 or 16 bytes. */
223a9d64 2385 if (stack_bytes != 0)
145870b5 2386 {
c725bd79 2387 error ("bad amount of stack space removal: %d", stack_bytes);
145870b5
NC		 2388 return NULL;
2389 }
2390
2391 /* Now compute the bit mask of registers to push. */
2392 mask = 0;
fdf3bb57 2393 for (i = 1; i < count - (TARGET_LONG_CALLS ? 2 : 1); i++)
145870b5
NC		 2394 {
2395 rtx vector_element = XVECEXP (op, 0, i);
2396
f2f84cba
NS		 2397 gcc_assert (GET_CODE (vector_element) == SET);
2398 gcc_assert (GET_CODE (SET_SRC (vector_element)) == REG);
2399 gcc_assert (register_is_ok_for_epilogue (SET_SRC (vector_element),
2400 SImode));
145870b5
NC		 2401
2402 mask |= 1 << REGNO (SET_SRC (vector_element));
2403 }
2404
2405 /* Scan for the first register to push. */
2406 for (first = 0; first < 32; first++)
2407 {
2408 if (mask & (1 << first))
2409 break;
2410 }
2411
f2f84cba 2412 gcc_assert (first < 32);
145870b5
NC		 2413
2414 /* Discover the last register to push. */
29a65e3d 2415 if (mask & (1 << LINK_POINTER_REGNUM))
145870b5 2416 {
29a65e3d 2417 last = LINK_POINTER_REGNUM;
145870b5
NC		 2418 }
2419 else
2420 {
f2f84cba
NS		 2421 gcc_assert (!stack_bytes);
2422 gcc_assert (mask & (1 << 29));
145870b5
NC		 2423
2424 last = 29;
2425 }
2426
323d8e7b
JL		 2427 /* Note, it is possible to have gaps in the register mask.
2428 We ignore this here, and generate a JARL anyway. We will
3ce15347 2429 be pushing more registers than is strictly necessary, but
323d8e7b
JL		 2430 it does save code space. */
2431
be1d3f93
NC		 2432 if (TARGET_LONG_CALLS)
2433 {
2434 char name[40];
2435
2436 if (first == last)
2437 sprintf (name, "__save_%s", reg_names [first]);
2438 else
2439 sprintf (name, "__save_%s_%s", reg_names [first], reg_names [last]);
2440
dbdbd982
NC		 2441 if (TARGET_V850E3V5_UP)
2442 sprintf (buff, "mov hilo(%s), r11\n\tjarl [r11], r10", name);
2443 else
2444 sprintf (buff, "movhi hi(%s), r0, r11\n\tmovea lo(%s), r11, r11\n\tjarl .+4, r10\n\tadd 4, r10\n\tjmp r11",
2445 name, name);
be1d3f93 2446 }
145870b5 2447 else
be1d3f93
NC		 2448 {
2449 if (first == last)
2450 sprintf (buff, "jarl __save_%s, r10", reg_names [first]);
2451 else
2452 sprintf (buff, "jarl __save_%s_%s, r10", reg_names [first],
2453 reg_names [last]);
2454 }
145870b5
NC		 2455
2456 return buff;
2457}
2458
3ce15347 2459/* A version of asm_output_aligned_bss() that copes with the special
d4de0221 2460 data areas of the v850. */
3ce15347 2461void
59f3507d
NN		 2462v850_output_aligned_bss (FILE * file,
2463 tree decl,
2464 const char * name,
ea40ba9c 2465 unsigned HOST_WIDE_INT size,
59f3507d 2466 int align)
3ce15347 2467{
3ce15347
NC		 2468 switch (v850_get_data_area (decl))
2469 {
2470 case DATA_AREA_ZDA:
d6b5193b 2471 switch_to_section (zbss_section);
3ce15347
NC		 2472 break;
2473
2474 case DATA_AREA_SDA:
d6b5193b 2475 switch_to_section (sbss_section);
3ce15347
NC		 2476 break;
2477
2478 case DATA_AREA_TDA:
d6b5193b 2479 switch_to_section (tdata_section);
d5356522 2480 break;
3ce15347
NC		 2481
2482 default:
d6b5193b 2483 switch_to_section (bss_section);
3ce15347
NC		 2484 break;
2485 }
2486
2487 ASM_OUTPUT_ALIGN (file, floor_log2 (align / BITS_PER_UNIT));
2488#ifdef ASM_DECLARE_OBJECT_NAME
2489 last_assemble_variable_decl = decl;
2490 ASM_DECLARE_OBJECT_NAME (file, name, decl);
2491#else
2492 /* Standard thing is just output label for the object. */
2493 ASM_OUTPUT_LABEL (file, name);
2494#endif /* ASM_DECLARE_OBJECT_NAME */
2495 ASM_OUTPUT_SKIP (file, size ? size : 1);
2496}
2497
2498/* Called via the macro ASM_OUTPUT_DECL_COMMON */
2499void
59f3507d
NN		 2500v850_output_common (FILE * file,
2501 tree decl,
2502 const char * name,
2503 int size,
2504 int align)
3ce15347
NC		 2505{
2506 if (decl == NULL_TREE)
2507 {
b9f7d63e 2508 fprintf (file, "%s", COMMON_ASM_OP);
3ce15347
NC		 2509 }
2510 else
2511 {
2512 switch (v850_get_data_area (decl))
2513 {
2514 case DATA_AREA_ZDA:
b9f7d63e 2515 fprintf (file, "%s", ZCOMMON_ASM_OP);
3ce15347
NC		 2516 break;
2517
2518 case DATA_AREA_SDA:
b9f7d63e 2519 fprintf (file, "%s", SCOMMON_ASM_OP);
3ce15347
NC		 2520 break;
2521
2522 case DATA_AREA_TDA:
b9f7d63e 2523 fprintf (file, "%s", TCOMMON_ASM_OP);
3ce15347
NC		 2524 break;
2525
2526 default:
b9f7d63e 2527 fprintf (file, "%s", COMMON_ASM_OP);
3ce15347
NC		 2528 break;
2529 }
2530 }
2531
2532 assemble_name (file, name);
2533 fprintf (file, ",%u,%u\n", size, align / BITS_PER_UNIT);
2534}
2535
2536/* Called via the macro ASM_OUTPUT_DECL_LOCAL */
2537void
59f3507d
NN		 2538v850_output_local (FILE * file,
2539 tree decl,
2540 const char * name,
2541 int size,
2542 int align)
3ce15347 2543{
b9f7d63e 2544 fprintf (file, "%s", LOCAL_ASM_OP);
3ce15347
NC		 2545 assemble_name (file, name);
2546 fprintf (file, "\n");
2547
2548 ASM_OUTPUT_ALIGNED_DECL_COMMON (file, decl, name, size, align);
2549}
3ce15347
NC		 2550
2551/* Add data area to the given declaration if a ghs data area pragma is
2552 currently in effect (#pragma ghs startXXX/endXXX). */
12a68f1f 2553static void
59f3507d 2554v850_insert_attributes (tree decl, tree * attr_ptr ATTRIBUTE_UNUSED )
3ce15347
NC		 2555{
2556 if (data_area_stack
2557 && data_area_stack->data_area
2558 && current_function_decl == NULL_TREE
2559 && (TREE_CODE (decl) == VAR_DECL || TREE_CODE (decl) == CONST_DECL)
2560 && v850_get_data_area (decl) == DATA_AREA_NORMAL)
2561 v850_set_data_area (decl, data_area_stack->data_area);
2562
4912a07c 2563 /* Initialize the default names of the v850 specific sections,
3ce15347
NC		 2564 if this has not been done before. */
2565
2566 if (GHS_default_section_names [(int) GHS_SECTION_KIND_SDATA] == NULL)
2567 {
2568 GHS_default_section_names [(int) GHS_SECTION_KIND_SDATA]
cd47dfd0 2569 = ".sdata";
3ce15347
NC		 2570
2571 GHS_default_section_names [(int) GHS_SECTION_KIND_ROSDATA]
cd47dfd0 2572 = ".rosdata";
3ce15347
NC		 2573
2574 GHS_default_section_names [(int) GHS_SECTION_KIND_TDATA]
cd47dfd0 2575 = ".tdata";
3ce15347
NC		 2576
2577 GHS_default_section_names [(int) GHS_SECTION_KIND_ZDATA]
cd47dfd0 2578 = ".zdata";
3ce15347
NC		 2579
2580 GHS_default_section_names [(int) GHS_SECTION_KIND_ROZDATA]
cd47dfd0 2581 = ".rozdata";
3ce15347
NC		 2582 }
2583
2584 if (current_function_decl == NULL_TREE
2585 && (TREE_CODE (decl) == VAR_DECL
2586 || TREE_CODE (decl) == CONST_DECL
2587 || TREE_CODE (decl) == FUNCTION_DECL)
2588 && (!DECL_EXTERNAL (decl) || DECL_INITIAL (decl))
2589 && !DECL_SECTION_NAME (decl))
2590 {
2591 enum GHS_section_kind kind = GHS_SECTION_KIND_DEFAULT;
cd47dfd0 2592 const char * chosen_section;
3ce15347
NC		 2593
2594 if (TREE_CODE (decl) == FUNCTION_DECL)
2595 kind = GHS_SECTION_KIND_TEXT;
2596 else
2597 {
d4de0221 2598 /* First choose a section kind based on the data area of the decl. */
3ce15347
NC		 2599 switch (v850_get_data_area (decl))
2600 {
2601 default:
f2f84cba 2602 gcc_unreachable ();
3ce15347
NC		 2603
2604 case DATA_AREA_SDA:
2605 kind = ((TREE_READONLY (decl))
2606 ? GHS_SECTION_KIND_ROSDATA
2607 : GHS_SECTION_KIND_SDATA);
2608 break;
2609
2610 case DATA_AREA_TDA:
2611 kind = GHS_SECTION_KIND_TDATA;
2612 break;
2613
2614 case DATA_AREA_ZDA:
2615 kind = ((TREE_READONLY (decl))
2616 ? GHS_SECTION_KIND_ROZDATA
2617 : GHS_SECTION_KIND_ZDATA);
2618 break;
2619
2620 case DATA_AREA_NORMAL: /* default data area */
2621 if (TREE_READONLY (decl))
2622 kind = GHS_SECTION_KIND_RODATA;
2623 else if (DECL_INITIAL (decl))
2624 kind = GHS_SECTION_KIND_DATA;
2625 else
2626 kind = GHS_SECTION_KIND_BSS;
2627 }
2628 }
2629
2630 /* Now, if the section kind has been explicitly renamed,
d4de0221 2631 then attach a section attribute. */
3ce15347
NC		 2632 chosen_section = GHS_current_section_names [(int) kind];
2633
2634 /* Otherwise, if this kind of section needs an explicit section
d4de0221 2635 attribute, then also attach one. */
3ce15347
NC		 2636 if (chosen_section == NULL)
2637 chosen_section = GHS_default_section_names [(int) kind];
2638
2639 if (chosen_section)
2640 {
2641 /* Only set the section name if specified by a pragma, because
2642 otherwise it will force those variables to get allocated storage
2643 in this module, rather than by the linker. */
24d047a3 2644 set_decl_section_name (decl, chosen_section);
3ce15347
NC		 2645 }
2646 }
2647}
b4378319 2648
b4378319
NC		 2649/* Construct a DISPOSE instruction that is the equivalent of
2650 the given RTX. We have already verified that this should
2651 be possible. */
2652
2653char *
59f3507d 2654construct_dispose_instruction (rtx op)
b4378319
NC		 2655{
2656 int count = XVECLEN (op, 0);
2657 int stack_bytes;
2658 unsigned long int mask;
2659 int i;
2660 static char buff[ 100 ]; /* XXX */
2661 int use_callt = 0;
2662
2663 if (count <= 2)
2664 {
ab532386 2665 error ("bogus DISPOSE construction: %d", count);
b4378319
NC		 2666 return NULL;
2667 }
2668
2669 /* Work out how many bytes to pop off the
2670 stack before retrieving registers. */
f2f84cba
NS		 2671 gcc_assert (GET_CODE (XVECEXP (op, 0, 1)) == SET);
2672 gcc_assert (GET_CODE (SET_SRC (XVECEXP (op, 0, 1))) == PLUS);
2673 gcc_assert (GET_CODE (XEXP (SET_SRC (XVECEXP (op, 0, 1)), 1)) == CONST_INT);
b4378319
NC		 2674
2675 stack_bytes = INTVAL (XEXP (SET_SRC (XVECEXP (op, 0, 1)), 1));
2676
d4de0221 2677 /* Each pop will remove 4 bytes from the stack.... */
b4378319
NC		 2678 stack_bytes -= (count - 2) * 4;
2679
2680 /* Make sure that the amount we are popping
2681 will fit into the DISPOSE instruction. */
2682 if (stack_bytes > 128)
2683 {
ab532386 2684 error ("too much stack space to dispose of: %d", stack_bytes);
b4378319
NC		 2685 return NULL;
2686 }
2687
2688 /* Now compute the bit mask of registers to push. */
2689 mask = 0;
2690
2691 for (i = 2; i < count; i++)
2692 {
2693 rtx vector_element = XVECEXP (op, 0, i);
2694
f2f84cba
NS		 2695 gcc_assert (GET_CODE (vector_element) == SET);
2696 gcc_assert (GET_CODE (SET_DEST (vector_element)) == REG);
2697 gcc_assert (register_is_ok_for_epilogue (SET_DEST (vector_element),
2698 SImode));
b4378319
NC		 2699
2700 if (REGNO (SET_DEST (vector_element)) == 2)
2701 use_callt = 1;
2702 else
2703 mask |= 1 << REGNO (SET_DEST (vector_element));
2704 }
2705
2706 if (! TARGET_DISABLE_CALLT
223a9d64 2707 && (use_callt || stack_bytes == 0))
b4378319
NC		 2708 {
2709 if (use_callt)
2710 {
2711 sprintf (buff, "callt ctoff(__callt_return_r2_r%d)", (mask & (1 << 31)) ? 31 : 29);
2712 return buff;
2713 }
2714 else
2715 {
2716 for (i = 20; i < 32; i++)
2717 if (mask & (1 << i))
2718 break;
2719
2720 if (i == 31)
2721 sprintf (buff, "callt ctoff(__callt_return_r31c)");
2722 else
223a9d64
N		 2723 sprintf (buff, "callt ctoff(__callt_return_r%d_r%s)",
2724 i, (mask & (1 << 31)) ? "31c" : "29");
b4378319
NC		 2725 }
2726 }
2727 else
2728 {
2729 static char regs [100]; /* XXX */
2730 int done_one;
2731
2732 /* Generate the DISPOSE instruction. Note we could just issue the
2733 bit mask as a number as the assembler can cope with this, but for
2734 the sake of our readers we turn it into a textual description. */
2735 regs[0] = 0;
2736 done_one = 0;
2737
2738 for (i = 20; i < 32; i++)
2739 {
2740 if (mask & (1 << i))
2741 {
2742 int first;
2743
2744 if (done_one)
2745 strcat (regs, ", ");
2746 else
2747 done_one = 1;
2748
2749 first = i;
2750 strcat (regs, reg_names[ first ]);
2751
2752 for (i++; i < 32; i++)
2753 if ((mask & (1 << i)) == 0)
2754 break;
2755
2756 if (i > first + 1)
2757 {
2758 strcat (regs, " - ");
2759 strcat (regs, reg_names[ i - 1 ] );
2760 }
2761 }
2762 }
2763
2764 sprintf (buff, "dispose %d {%s}, r31", stack_bytes / 4, regs);
2765 }
2766
2767 return buff;
2768}
2769
b4378319
NC		 2770/* Construct a PREPARE instruction that is the equivalent of
2771 the given RTL. We have already verified that this should
2772 be possible. */
2773
2774char *
59f3507d 2775construct_prepare_instruction (rtx op)
b4378319 2776{
223a9d64 2777 int count;
b4378319
NC		 2778 int stack_bytes;
2779 unsigned long int mask;
2780 int i;
2781 static char buff[ 100 ]; /* XXX */
2782 int use_callt = 0;
2783
223a9d64 2784 if (XVECLEN (op, 0) <= 1)
b4378319 2785 {
223a9d64 2786 error ("bogus PREPEARE construction: %d", XVECLEN (op, 0));
b4378319
NC		 2787 return NULL;
2788 }
2789
2790 /* Work out how many bytes to push onto
2791 the stack after storing the registers. */
f2f84cba
NS		 2792 gcc_assert (GET_CODE (XVECEXP (op, 0, 0)) == SET);
2793 gcc_assert (GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) == PLUS);
2794 gcc_assert (GET_CODE (XEXP (SET_SRC (XVECEXP (op, 0, 0)), 1)) == CONST_INT);
b4378319
NC		 2795
2796 stack_bytes = INTVAL (XEXP (SET_SRC (XVECEXP (op, 0, 0)), 1));
2797
b4378319
NC		 2798
2799 /* Make sure that the amount we are popping
2800 will fit into the DISPOSE instruction. */
2801 if (stack_bytes < -128)
2802 {
ab532386 2803 error ("too much stack space to prepare: %d", stack_bytes);
b4378319
NC		 2804 return NULL;
2805 }
2806
2807 /* Now compute the bit mask of registers to push. */
223a9d64 2808 count = 0;
b4378319 2809 mask = 0;
223a9d64 2810 for (i = 1; i < XVECLEN (op, 0); i++)
b4378319
NC		 2811 {
2812 rtx vector_element = XVECEXP (op, 0, i);
2813
223a9d64
N		 2814 if (GET_CODE (vector_element) == CLOBBER)
2815 continue;
2816
f2f84cba
NS		 2817 gcc_assert (GET_CODE (vector_element) == SET);
2818 gcc_assert (GET_CODE (SET_SRC (vector_element)) == REG);
2819 gcc_assert (register_is_ok_for_epilogue (SET_SRC (vector_element),
2820 SImode));
b4378319
NC		 2821
2822 if (REGNO (SET_SRC (vector_element)) == 2)
2823 use_callt = 1;
2824 else
2825 mask |= 1 << REGNO (SET_SRC (vector_element));
223a9d64 2826 count++;
b4378319
NC		 2827 }
2828
223a9d64
N		 2829 stack_bytes += count * 4;
2830
b4378319 2831 if ((! TARGET_DISABLE_CALLT)
223a9d64 2832 && (use_callt || stack_bytes == 0))
b4378319
NC		 2833 {
2834 if (use_callt)
2835 {
2836 sprintf (buff, "callt ctoff(__callt_save_r2_r%d)", (mask & (1 << 31)) ? 31 : 29 );
2837 return buff;
2838 }
2839
2840 for (i = 20; i < 32; i++)
2841 if (mask & (1 << i))
2842 break;
2843
2844 if (i == 31)
2845 sprintf (buff, "callt ctoff(__callt_save_r31c)");
2846 else
223a9d64
N		 2847 sprintf (buff, "callt ctoff(__callt_save_r%d_r%s)",
2848 i, (mask & (1 << 31)) ? "31c" : "29");
b4378319
NC		 2849 }
2850 else
2851 {
2852 static char regs [100]; /* XXX */
2853 int done_one;
2854
2855
2856 /* Generate the PREPARE instruction. Note we could just issue the
2857 bit mask as a number as the assembler can cope with this, but for
2858 the sake of our readers we turn it into a textual description. */
2859 regs[0] = 0;
2860 done_one = 0;
2861
2862 for (i = 20; i < 32; i++)
2863 {
2864 if (mask & (1 << i))
2865 {
2866 int first;
2867
2868 if (done_one)
2869 strcat (regs, ", ");
2870 else
2871 done_one = 1;
2872
2873 first = i;
2874 strcat (regs, reg_names[ first ]);
2875
2876 for (i++; i < 32; i++)
2877 if ((mask & (1 << i)) == 0)
2878 break;
2879
2880 if (i > first + 1)
2881 {
2882 strcat (regs, " - ");
2883 strcat (regs, reg_names[ i - 1 ] );
2884 }
2885 }
2886 }
2887
2888 sprintf (buff, "prepare {%s}, %d", regs, (- stack_bytes) / 4);
2889 }
2890
2891 return buff;
2892}
223a9d64 2893
a64761a3
DD		 2894/* Return an RTX indicating where the return address to the
2895 calling function can be found. */
2896
2897rtx
59f3507d 2898v850_return_addr (int count)
a64761a3
DD		 2899{
2900 if (count != 0)
2901 return const0_rtx;
2902
9e2f7ec7 2903 return get_hard_reg_initial_val (Pmode, LINK_POINTER_REGNUM);
a64761a3 2904}
ae46c4e0 2905\f
d6b5193b
RS		 2906/* Implement TARGET_ASM_INIT_SECTIONS. */
2907
ae46c4e0 2908static void
d6b5193b
RS		 2909v850_asm_init_sections (void)
2910{
2911 rosdata_section
2912 = get_unnamed_section (0, output_section_asm_op,
2913 "\t.section .rosdata,\"a\"");
2914
2915 rozdata_section
2916 = get_unnamed_section (0, output_section_asm_op,
2917 "\t.section .rozdata,\"a\"");
2918
2919 tdata_section
2920 = get_unnamed_section (SECTION_WRITE, output_section_asm_op,
2921 "\t.section .tdata,\"aw\"");
2922
2923 zdata_section
2924 = get_unnamed_section (SECTION_WRITE, output_section_asm_op,
2925 "\t.section .zdata,\"aw\"");
2926
2927 zbss_section
2928 = get_unnamed_section (SECTION_WRITE | SECTION_BSS,
2929 output_section_asm_op,
2930 "\t.section .zbss,\"aw\"");
2931}
2932
2933static section *
59f3507d
NN		 2934v850_select_section (tree exp,
2935 int reloc ATTRIBUTE_UNUSED,
2936 unsigned HOST_WIDE_INT align ATTRIBUTE_UNUSED)
ae46c4e0
RH		 2937{
2938 if (TREE_CODE (exp) == VAR_DECL)
2939 {
2940 int is_const;
2941 if (!TREE_READONLY (exp)
2942 || TREE_SIDE_EFFECTS (exp)
2943 || !DECL_INITIAL (exp)
2944 || (DECL_INITIAL (exp) != error_mark_node
2945 && !TREE_CONSTANT (DECL_INITIAL (exp))))
2946 is_const = FALSE;
2947 else
2948 is_const = TRUE;
2949
2950 switch (v850_get_data_area (exp))
2951 {
2952 case DATA_AREA_ZDA:
d6b5193b 2953 return is_const ? rozdata_section : zdata_section;
ae46c4e0
RH		 2954
2955 case DATA_AREA_TDA:
d6b5193b 2956 return tdata_section;
ae46c4e0
RH		 2957
2958 case DATA_AREA_SDA:
d6b5193b 2959 return is_const ? rosdata_section : sdata_section;
ae46c4e0
RH		 2960
2961 default:
d6b5193b 2962 return is_const ? readonly_data_section : data_section;
ae46c4e0
RH		 2963 }
2964 }
d6b5193b 2965 return readonly_data_section;
ae46c4e0 2966}
fb7bc7fb 2967\f
122603fa
N		 2968/* Worker function for TARGET_FUNCTION_VALUE_REGNO_P. */
2969
2970static bool
2971v850_function_value_regno_p (const unsigned int regno)
2972{
1a31dcd0 2973 return (regno == RV_REGNUM);
122603fa
N		 2974}
2975
fb7bc7fb
KH		 2976/* Worker function for TARGET_RETURN_IN_MEMORY. */
2977
2978static bool
586de218 2979v850_return_in_memory (const_tree type, const_tree fntype ATTRIBUTE_UNUSED)
fb7bc7fb
KH		 2980{
2981 /* Return values > 8 bytes in length in memory. */
b84d824d
NC		 2982 return int_size_in_bytes (type) > 8
2983 || TYPE_MODE (type) == BLKmode
2984 /* With the rh850 ABI return all aggregates in memory. */
2985 || ((! TARGET_GCC_ABI) && AGGREGATE_TYPE_P (type))
2986 ;
fb7bc7fb 2987}
14a878f3
AS		 2988
2989/* Worker function for TARGET_FUNCTION_VALUE. */
2990
122603fa 2991static rtx
14a878f3
AS		 2992v850_function_value (const_tree valtype,
2993 const_tree fn_decl_or_type ATTRIBUTE_UNUSED,
2994 bool outgoing ATTRIBUTE_UNUSED)
2995{
1a31dcd0
AS		 2996 return gen_rtx_REG (TYPE_MODE (valtype), RV_REGNUM);
2997}
2998
2999/* Implement TARGET_LIBCALL_VALUE. */
3000
3001static rtx
3002v850_libcall_value (machine_mode mode,
3003 const_rtx func ATTRIBUTE_UNUSED)
3004{
3005 return gen_rtx_REG (mode, RV_REGNUM);
14a878f3
AS		 3006}
3007
fb7bc7fb 3008\f
7b5cbb57
AS		 3009/* Worker function for TARGET_CAN_ELIMINATE. */
3010
e0c6c273 3011static bool
7b5cbb57
AS		 3012v850_can_eliminate (const int from ATTRIBUTE_UNUSED, const int to)
3013{
3014 return (to == STACK_POINTER_REGNUM ? ! frame_pointer_needed : true);
3015}
3016
5efd84c5
NF		 3017/* Worker function for TARGET_CONDITIONAL_REGISTER_USAGE.
3018
3019 If TARGET_APP_REGS is not defined then add r2 and r5 to
3020 the pool of fixed registers. See PR 14505. */
3021
3022static void
3023v850_conditional_register_usage (void)
3024{
3025 if (TARGET_APP_REGS)
3026 {
3027 fixed_regs[2] = 0; call_used_regs[2] = 0;
3028 fixed_regs[5] = 0; call_used_regs[5] = 1;
3029 }
3030}
e0c6c273
RH		 3031\f
3032/* Worker function for TARGET_ASM_TRAMPOLINE_TEMPLATE. */
3033
3034static void
3035v850_asm_trampoline_template (FILE *f)
3036{
3037 fprintf (f, "\tjarl .+4,r12\n");
3038 fprintf (f, "\tld.w 12[r12],r20\n");
3039 fprintf (f, "\tld.w 16[r12],r12\n");
3040 fprintf (f, "\tjmp [r12]\n");
3041 fprintf (f, "\tnop\n");
3042 fprintf (f, "\t.long 0\n");
3043 fprintf (f, "\t.long 0\n");
3044}
3045
3046/* Worker function for TARGET_TRAMPOLINE_INIT. */
3047
3048static void
3049v850_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value)
3050{
3051 rtx mem, fnaddr = XEXP (DECL_RTL (fndecl), 0);
3052
3053 emit_block_move (m_tramp, assemble_trampoline_template (),
3054 GEN_INT (TRAMPOLINE_SIZE), BLOCK_OP_NORMAL);
3055
3056 mem = adjust_address (m_tramp, SImode, 16);
3057 emit_move_insn (mem, chain_value);
3058 mem = adjust_address (m_tramp, SImode, 20);
3059 emit_move_insn (mem, fnaddr);
3060}
223a9d64
N		 3061
3062static int
3063v850_issue_rate (void)
3064{
dbdbd982 3065 return (TARGET_V850E2_UP ? 2 : 1);
223a9d64 3066}
1a627b35
RS		 3067
3068/* Implement TARGET_LEGITIMATE_CONSTANT_P. */
3069
3070static bool
ef4bddc2 3071v850_legitimate_constant_p (machine_mode mode ATTRIBUTE_UNUSED, rtx x)
1a627b35
RS		 3072{
3073 return (GET_CODE (x) == CONST_DOUBLE
3074 || !(GET_CODE (x) == CONST
3075 && GET_CODE (XEXP (x, 0)) == PLUS
3076 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
3077 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT
3078 && !CONST_OK_FOR_K (INTVAL (XEXP (XEXP (x, 0), 1)))));
3079}
1dcad079 3080
b3ba1c09
AS		 3081/* Helper function for `v850_legitimate_address_p'. */
3082
3083static bool
3084v850_reg_ok_for_base_p (const_rtx reg, bool strict_p)
3085{
3086 if (strict_p)
3087 {
3088 return REGNO_OK_FOR_BASE_P (REGNO (reg));
3089 } else {
3090 return true;
3091 }
3092}
3093
3094/* Accept either REG or SUBREG where a register is valid. */
3095
3096static bool
3097v850_rtx_ok_for_base_p (const_rtx x, bool strict_p)
3098{
3099 return ((REG_P (x) && v850_reg_ok_for_base_p (x, strict_p))
3100 || (SUBREG_P (x) && REG_P (SUBREG_REG (x))
3101 && v850_reg_ok_for_base_p (SUBREG_REG (x), strict_p)));
3102}
3103
3104/* Implement TARGET_LEGITIMATE_ADDRESS_P. */
3105
3106static bool
3107v850_legitimate_address_p (machine_mode mode, rtx x, bool strict_p,
3108 addr_space_t as ATTRIBUTE_UNUSED)
3109{
3110 gcc_assert (ADDR_SPACE_GENERIC_P (as));
3111
3112 if (v850_rtx_ok_for_base_p (x, strict_p))
3113 return true;
3114 if (CONSTANT_ADDRESS_P (x)
3115 && (mode == QImode || INTVAL (x) % 2 == 0)
3116 && (GET_MODE_SIZE (mode) <= 4 || INTVAL (x) % 4 == 0))
3117 return true;
3118 if (GET_CODE (x) == LO_SUM
3119 && REG_P (XEXP (x, 0))
3120 && v850_reg_ok_for_base_p (XEXP (x, 0), strict_p)
3121 && CONSTANT_P (XEXP (x, 1))
3122 && (!CONST_INT_P (XEXP (x, 1))
3123 || ((mode == QImode || INTVAL (XEXP (x, 1)) % 2 == 0)
3124 && constraint_satisfied_p (XEXP (x, 1), CONSTRAINT_K)))
3125 && GET_MODE_SIZE (mode) <= GET_MODE_SIZE (word_mode))
3126 return true;
3127 if (special_symbolref_operand (x, mode)
3128 && (GET_MODE_SIZE (mode) <= GET_MODE_SIZE (word_mode)))
3129 return true;
3130 if (GET_CODE (x) == PLUS
3131 && v850_rtx_ok_for_base_p (XEXP (x, 0), strict_p)
3132 && constraint_satisfied_p (XEXP (x,1), CONSTRAINT_K)
3133 && ((mode == QImode || INTVAL (XEXP (x, 1)) % 2 == 0)
3134 && CONST_OK_FOR_K (INTVAL (XEXP (x, 1))
3135 + (GET_MODE_NUNITS (mode) * UNITS_PER_WORD))))
3136 return true;
3137
3138 return false;
3139}
3140
1dcad079 3141static int
ef4bddc2 3142v850_memory_move_cost (machine_mode mode,
0ccef3d2
NC		 3143 reg_class_t reg_class ATTRIBUTE_UNUSED,
3144 bool in)
1dcad079
NC		 3145{
3146 switch (GET_MODE_SIZE (mode))
3147 {
3148 case 0:
3149 return in ? 24 : 8;
3150 case 1:
3151 case 2:
3152 case 3:
3153 case 4:
3154 return in ? 6 : 2;
3155 default:
3156 return (GET_MODE_SIZE (mode) / 2) * (in ? 3 : 1);
3157 }
3158}
dbdbd982
NC		 3159
3160int
5dc2bb45 3161v850_adjust_insn_length (rtx_insn *insn, int length)
dbdbd982
NC		 3162{
3163 if (TARGET_V850E3V5_UP)
3164 {
3165 if (CALL_P (insn))
3166 {
3167 if (TARGET_LONG_CALLS)
3168 {
3169 /* call_internal_long, call_value_internal_long. */
3170 if (length == 8)
3171 length = 4;
3172 if (length == 16)
3173 length = 10;
3174 }
3175 else
3176 {
3177 /* call_internal_short, call_value_internal_short. */
3178 if (length == 8)
3179 length = 4;
3180 }
3181 }
3182 }
3183 return length;
3184}
122603fa
N		 3185\f
3186/* V850 specific attributes. */
3187
3188static const struct attribute_spec v850_attribute_table[] =
3189{
4849deb1
JJ		 3190 /* { name, min_len, max_len, decl_req, type_req, fn_type_req,
3191 affects_type_identity, handler, exclude } */
3192 { "interrupt_handler", 0, 0, true, false, false, false,
3193 v850_handle_interrupt_attribute, NULL },
3194 { "interrupt", 0, 0, true, false, false, false,
3195 v850_handle_interrupt_attribute, NULL },
3196 { "sda", 0, 0, true, false, false, false,
3197 v850_handle_data_area_attribute, NULL },
3198 { "tda", 0, 0, true, false, false, false,
3199 v850_handle_data_area_attribute, NULL },
3200 { "zda", 0, 0, true, false, false, false,
3201 v850_handle_data_area_attribute, NULL },
3202 { NULL, 0, 0, false, false, false, false, NULL, NULL }
122603fa
N		 3203};
3204\f
b84d824d
NC		 3205static void
3206v850_option_override (void)
b12b5029 3207{
b84d824d
NC		 3208 if (flag_exceptions || flag_non_call_exceptions)
3209 flag_omit_frame_pointer = 0;
b12b5029 3210
b84d824d
NC		 3211 /* The RH850 ABI does not (currently) support the use of the CALLT instruction. */
3212 if (! TARGET_GCC_ABI)
3213 target_flags |= MASK_DISABLE_CALLT;
3214}
b12b5029 3215\f
dbdbd982
NC		 3216const char *
3217v850_gen_movdi (rtx * operands)
3218{
3219 if (REG_P (operands[0]))
3220 {
3221 if (REG_P (operands[1]))
3222 {
3223 if (REGNO (operands[0]) == (REGNO (operands[1]) - 1))
3224 return "mov %1, %0; mov %R1, %R0";
3225
3226 return "mov %R1, %R0; mov %1, %0";
3227 }
3228
3229 if (MEM_P (operands[1]))
3230 {
3231 if (REGNO (operands[0]) & 1)
3232 /* Use two load word instructions to synthesise a load double. */
3233 return "ld.w %1, %0 ; ld.w %R1, %R0" ;
3234
3235 return "ld.dw %1, %0";
3236 }
3237
3238 return "mov %1, %0; mov %R1, %R0";
3239 }
3240
3241 gcc_assert (REG_P (operands[1]));
3242
3243 if (REGNO (operands[1]) & 1)
3244 /* Use two store word instructions to synthesise a store double. */
3245 return "st.w %1, %0 ; st.w %R1, %R0 ";
3246
3247 return "st.dw %1, %0";
3248}
f939c3e6
RS		 3249
3250/* Implement TARGET_HARD_REGNO_MODE_OK. */
3251
3252static bool
3253v850_hard_regno_mode_ok (unsigned int regno, machine_mode mode)
3254{
3255 return GET_MODE_SIZE (mode) <= 4 || ((regno & 1) == 0 && regno != 0);
3256}
99e1629f
RS		 3257
3258/* Implement TARGET_MODES_TIEABLE_P. */
3259
3260static bool
3261v850_modes_tieable_p (machine_mode mode1, machine_mode mode2)
3262{
3263 return (mode1 == mode2
3264 || (GET_MODE_SIZE (mode1) <= 4 && GET_MODE_SIZE (mode2) <= 4));
3265}
dbdbd982 3266\f
122603fa 3267/* Initialize the GCC target structure. */
1dcad079 3268
b84d824d
NC		 3269#undef TARGET_OPTION_OVERRIDE
3270#define TARGET_OPTION_OVERRIDE v850_option_override
3271
1dcad079 3272#undef TARGET_MEMORY_MOVE_COST
b84d824d 3273#define TARGET_MEMORY_MOVE_COST v850_memory_move_cost
1dcad079 3274
122603fa
N		 3275#undef TARGET_ASM_ALIGNED_HI_OP
3276#define TARGET_ASM_ALIGNED_HI_OP "\t.hword\t"
3277
3278#undef TARGET_PRINT_OPERAND
b84d824d 3279#define TARGET_PRINT_OPERAND v850_print_operand
122603fa 3280#undef TARGET_PRINT_OPERAND_ADDRESS
b84d824d 3281#define TARGET_PRINT_OPERAND_ADDRESS v850_print_operand_address
122603fa 3282#undef TARGET_PRINT_OPERAND_PUNCT_VALID_P
b84d824d 3283#define TARGET_PRINT_OPERAND_PUNCT_VALID_P v850_print_operand_punct_valid_p
122603fa 3284
24da2019
AS		 3285#undef TARGET_ASM_OUTPUT_ADDR_CONST_EXTRA
3286#define TARGET_ASM_OUTPUT_ADDR_CONST_EXTRA v850_output_addr_const_extra
3287
122603fa
N		 3288#undef TARGET_ATTRIBUTE_TABLE
3289#define TARGET_ATTRIBUTE_TABLE v850_attribute_table
3290
3291#undef TARGET_INSERT_ATTRIBUTES
3292#define TARGET_INSERT_ATTRIBUTES v850_insert_attributes
3293
3294#undef TARGET_ASM_SELECT_SECTION
3295#define TARGET_ASM_SELECT_SECTION v850_select_section
3296
3297/* The assembler supports switchable .bss sections, but
3298 v850_select_section doesn't yet make use of them. */
3299#undef TARGET_HAVE_SWITCHABLE_BSS_SECTIONS
3300#define TARGET_HAVE_SWITCHABLE_BSS_SECTIONS false
3301
3302#undef TARGET_ENCODE_SECTION_INFO
3303#define TARGET_ENCODE_SECTION_INFO v850_encode_section_info
3304
3305#undef TARGET_ASM_FILE_START_FILE_DIRECTIVE
3306#define TARGET_ASM_FILE_START_FILE_DIRECTIVE true
3307
122603fa
N		 3308#undef TARGET_RTX_COSTS
3309#define TARGET_RTX_COSTS v850_rtx_costs
3310
3311#undef TARGET_ADDRESS_COST
b413068c 3312#define TARGET_ADDRESS_COST hook_int_rtx_mode_as_bool_0
122603fa
N		 3313
3314#undef TARGET_MACHINE_DEPENDENT_REORG
3315#define TARGET_MACHINE_DEPENDENT_REORG v850_reorg
3316
3317#undef TARGET_SCHED_ISSUE_RATE
3318#define TARGET_SCHED_ISSUE_RATE v850_issue_rate
3319
3320#undef TARGET_FUNCTION_VALUE_REGNO_P
3321#define TARGET_FUNCTION_VALUE_REGNO_P v850_function_value_regno_p
3322#undef TARGET_FUNCTION_VALUE
3323#define TARGET_FUNCTION_VALUE v850_function_value
1a31dcd0
AS		 3324#undef TARGET_LIBCALL_VALUE
3325#define TARGET_LIBCALL_VALUE v850_libcall_value
122603fa
N		 3326
3327#undef TARGET_PROMOTE_PROTOTYPES
3328#define TARGET_PROMOTE_PROTOTYPES hook_bool_const_tree_true
3329
3330#undef TARGET_RETURN_IN_MEMORY
3331#define TARGET_RETURN_IN_MEMORY v850_return_in_memory
3332
3333#undef TARGET_PASS_BY_REFERENCE
3334#define TARGET_PASS_BY_REFERENCE v850_pass_by_reference
3335
3336#undef TARGET_CALLEE_COPIES
3337#define TARGET_CALLEE_COPIES hook_bool_CUMULATIVE_ARGS_mode_tree_bool_true
3338
122603fa
N		 3339#undef TARGET_ARG_PARTIAL_BYTES
3340#define TARGET_ARG_PARTIAL_BYTES v850_arg_partial_bytes
3341
3342#undef TARGET_FUNCTION_ARG
3343#define TARGET_FUNCTION_ARG v850_function_arg
3344
3345#undef TARGET_FUNCTION_ARG_ADVANCE
3346#define TARGET_FUNCTION_ARG_ADVANCE v850_function_arg_advance
3347
3348#undef TARGET_CAN_ELIMINATE
3349#define TARGET_CAN_ELIMINATE v850_can_eliminate
3350
5efd84c5
NF		 3351#undef TARGET_CONDITIONAL_REGISTER_USAGE
3352#define TARGET_CONDITIONAL_REGISTER_USAGE v850_conditional_register_usage
3353
122603fa
N		 3354#undef TARGET_ASM_TRAMPOLINE_TEMPLATE
3355#define TARGET_ASM_TRAMPOLINE_TEMPLATE v850_asm_trampoline_template
3356#undef TARGET_TRAMPOLINE_INIT
3357#define TARGET_TRAMPOLINE_INIT v850_trampoline_init
3358
1a627b35
RS		 3359#undef TARGET_LEGITIMATE_CONSTANT_P
3360#define TARGET_LEGITIMATE_CONSTANT_P v850_legitimate_constant_p
3361
d81db636
SB		 3362#undef TARGET_LRA_P
3363#define TARGET_LRA_P hook_bool_void_false
3364
b3ba1c09
AS		 3365#undef TARGET_ADDR_SPACE_LEGITIMATE_ADDRESS_P
3366#define TARGET_ADDR_SPACE_LEGITIMATE_ADDRESS_P v850_legitimate_address_p
3367
1d0216c8
RS		 3368#undef TARGET_CAN_USE_DOLOOP_P
3369#define TARGET_CAN_USE_DOLOOP_P can_use_doloop_if_innermost
3370
f939c3e6
RS		 3371#undef TARGET_HARD_REGNO_MODE_OK
3372#define TARGET_HARD_REGNO_MODE_OK v850_hard_regno_mode_ok
3373
99e1629f
RS		 3374#undef TARGET_MODES_TIEABLE_P
3375#define TARGET_MODES_TIEABLE_P v850_modes_tieable_p
3376
122603fa
N		 3377struct gcc_target targetm = TARGET_INITIALIZER;
3378
d6b5193b 3379#include "gt-v850.h"
Mirror of https://gcc.gnu.org/git/gcc.git