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747fe2d1 1/* Subroutines for insn-output.c for NEC V850 series
f1717362 2 Copyright (C) 1996-2016 Free Software Foundation, Inc.
747fe2d1 3 Contributed by Jeff Law (law@cygnus.com).
4
b5b835e5 5 This file is part of GCC.
747fe2d1 6
b5b835e5 7 GCC is free software; you can redistribute it and/or modify it
b2ceeb6c 8 under the terms of the GNU General Public License as published by
038d1e19 9 the Free Software Foundation; either version 3, or (at your option)
b2ceeb6c 10 any later version.
747fe2d1 11
b5b835e5 12 GCC is distributed in the hope that it will be useful, but WITHOUT
b2ceeb6c 13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 for more details.
747fe2d1 16
b2ceeb6c 17 You should have received a copy of the GNU General Public License
038d1e19 18 along with GCC; see the file COPYING3. If not see
19 <http://www.gnu.org/licenses/>. */
747fe2d1 20
be2828ce 21#include "config.h"
7014838c 22#include "system.h"
805e22b2 23#include "coretypes.h"
9ef16211 24#include "backend.h"
c1eb80de 25#include "target.h"
9ef16211 26#include "rtl.h"
c1eb80de 27#include "tree.h"
9ef16211 28#include "df.h"
c1eb80de 29#include "tm_p.h"
9ed99284 30#include "stringpool.h"
c1eb80de 31#include "insn-config.h"
32#include "regs.h"
33#include "emit-rtl.h"
34#include "recog.h"
35#include "diagnostic-core.h"
9ed99284 36#include "stor-layout.h"
37#include "varasm.h"
38#include "calls.h"
747fe2d1 39#include "conditions.h"
747fe2d1 40#include "output.h"
41#include "insn-attr.h"
d53441c8 42#include "expr.h"
94ea8568 43#include "cfgrtl.h"
f7715905 44#include "builtins.h"
a821813a 45
0c71fb4f 46/* This file should be included last. */
4b498588 47#include "target-def.h"
48
a821813a 49#ifndef streq
50#define streq(a,b) (strcmp (a, b) == 0)
51#endif
52
3c047fe9 53static void v850_print_operand_address (FILE *, machine_mode, rtx);
747fe2d1 54
e101acea 55/* Names of the various data areas used on the v850. */
d88fa80d 56const char * GHS_default_section_names [(int) COUNT_OF_GHS_SECTION_KINDS];
57const char * GHS_current_section_names [(int) COUNT_OF_GHS_SECTION_KINDS];
e101acea 58
59/* Track the current data area set by the data area pragma (which
60 can be nested). Tested by check_default_data_area. */
61data_area_stack_element * data_area_stack = NULL;
62
747fe2d1 63/* True if we don't need to check any more if the current
e101acea 64 function is an interrupt handler. */
747fe2d1 65static int v850_interrupt_cache_p = FALSE;
66
65b688d7 67rtx v850_compare_op0, v850_compare_op1;
68
747fe2d1 69/* Whether current function is an interrupt handler. */
70static int v850_interrupt_p = FALSE;
2f14b1f9 71
c60e4982 72static GTY(()) section * rosdata_section;
73static GTY(()) section * rozdata_section;
74static GTY(()) section * tdata_section;
75static GTY(()) section * zdata_section;
76static GTY(()) section * zbss_section;
747fe2d1 77\f
85a79c1e 78/* We use this to wrap all emitted insns in the prologue. */
79static rtx
80F (rtx x)
81{
82 if (GET_CODE (x) != CLOBBER)
83 RTX_FRAME_RELATED_P (x) = 1;
84 return x;
85}
86
87/* Mark all the subexpressions of the PARALLEL rtx PAR as
88 frame-related. Return PAR.
89
90 dwarf2out.c:dwarf2out_frame_debug_expr ignores sub-expressions of a
91 PARALLEL rtx other than the first if they do not have the
92 FRAME_RELATED flag set on them. */
93
94static rtx
95v850_all_frame_related (rtx par)
96{
97 int len = XVECLEN (par, 0);
98 int i;
99
100 gcc_assert (GET_CODE (par) == PARALLEL);
101 for (i = 0; i < len; i++)
102 F (XVECEXP (par, 0, i));
103
104 return par;
105}
106
65b688d7 107/* Handle the TARGET_PASS_BY_REFERENCE target hook.
108 Specify whether to pass the argument by reference. */
109
b981d932 110static bool
39cba157 111v850_pass_by_reference (cumulative_args_t cum ATTRIBUTE_UNUSED,
3754d046 112 machine_mode mode, const_tree type,
b981d932 113 bool named ATTRIBUTE_UNUSED)
114{
115 unsigned HOST_WIDE_INT size;
116
85a79c1e 117 if (!TARGET_GCC_ABI)
118 return 0;
119
b981d932 120 if (type)
121 size = int_size_in_bytes (type);
122 else
123 size = GET_MODE_SIZE (mode);
124
125 return size > 8;
126}
747fe2d1 127
df9d2e34 128/* Return an RTX to represent where an argument with mode MODE
129 and type TYPE will be passed to a function. If the result
130 is NULL_RTX, the argument will be pushed. */
747fe2d1 131
1936e29b 132static rtx
3754d046 133v850_function_arg (cumulative_args_t cum_v, machine_mode mode,
1936e29b 134 const_tree type, bool named)
747fe2d1 135{
39cba157 136 CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
df9d2e34 137 rtx result = NULL_RTX;
747fe2d1 138 int size, align;
139
65b688d7 140 if (!named)
747fe2d1 141 return NULL_RTX;
142
143 if (mode == BLKmode)
144 size = int_size_in_bytes (type);
145 else
146 size = GET_MODE_SIZE (mode);
147
65b688d7 148 size = (size + UNITS_PER_WORD -1) & ~(UNITS_PER_WORD -1);
149
5dd3389c 150 if (size < 1)
df9d2e34 151 {
152 /* Once we have stopped using argument registers, do not start up again. */
153 cum->nbytes = 4 * UNITS_PER_WORD;
154 return NULL_RTX;
155 }
5dd3389c 156
85a79c1e 157 if (!TARGET_GCC_ABI)
158 align = UNITS_PER_WORD;
159 else if (size <= UNITS_PER_WORD && type)
747fe2d1 160 align = TYPE_ALIGN (type) / BITS_PER_UNIT;
161 else
162 align = size;
163
164 cum->nbytes = (cum->nbytes + align - 1) &~(align - 1);
165
166 if (cum->nbytes > 4 * UNITS_PER_WORD)
df9d2e34 167 return NULL_RTX;
747fe2d1 168
169 if (type == NULL_TREE
170 && cum->nbytes + size > 4 * UNITS_PER_WORD)
df9d2e34 171 return NULL_RTX;
747fe2d1 172
173 switch (cum->nbytes / UNITS_PER_WORD)
174 {
175 case 0:
7014838c 176 result = gen_rtx_REG (mode, 6);
747fe2d1 177 break;
178 case 1:
7014838c 179 result = gen_rtx_REG (mode, 7);
747fe2d1 180 break;
181 case 2:
7014838c 182 result = gen_rtx_REG (mode, 8);
747fe2d1 183 break;
184 case 3:
7014838c 185 result = gen_rtx_REG (mode, 9);
747fe2d1 186 break;
187 default:
df9d2e34 188 result = NULL_RTX;
747fe2d1 189 }
190
191 return result;
192}
193
f054eb3c 194/* Return the number of bytes which must be put into registers
747fe2d1 195 for values which are part in registers and part in memory. */
f054eb3c 196static int
3754d046 197v850_arg_partial_bytes (cumulative_args_t cum_v, machine_mode mode,
f054eb3c 198 tree type, bool named)
747fe2d1 199{
39cba157 200 CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
747fe2d1 201 int size, align;
202
85a79c1e 203 if (!named)
747fe2d1 204 return 0;
205
206 if (mode == BLKmode)
207 size = int_size_in_bytes (type);
208 else
209 size = GET_MODE_SIZE (mode);
210
df9d2e34 211 if (size < 1)
212 size = 1;
213
85a79c1e 214 if (!TARGET_GCC_ABI)
215 align = UNITS_PER_WORD;
216 else if (type)
747fe2d1 217 align = TYPE_ALIGN (type) / BITS_PER_UNIT;
218 else
219 align = size;
220
df9d2e34 221 cum->nbytes = (cum->nbytes + align - 1) & ~ (align - 1);
747fe2d1 222
223 if (cum->nbytes > 4 * UNITS_PER_WORD)
224 return 0;
225
226 if (cum->nbytes + size <= 4 * UNITS_PER_WORD)
227 return 0;
228
229 if (type == NULL_TREE
230 && cum->nbytes + size > 4 * UNITS_PER_WORD)
231 return 0;
232
f054eb3c 233 return 4 * UNITS_PER_WORD - cum->nbytes;
747fe2d1 234}
235
1936e29b 236/* Update the data in CUM to advance over an argument
237 of mode MODE and data type TYPE.
238 (TYPE is null for libcalls where that information may not be available.) */
239
240static void
3754d046 241v850_function_arg_advance (cumulative_args_t cum_v, machine_mode mode,
1936e29b 242 const_tree type, bool named ATTRIBUTE_UNUSED)
243{
39cba157 244 CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
245
85a79c1e 246 if (!TARGET_GCC_ABI)
247 cum->nbytes += (((mode != BLKmode
248 ? GET_MODE_SIZE (mode)
249 : int_size_in_bytes (type)) + UNITS_PER_WORD - 1)
250 & -UNITS_PER_WORD);
251 else
252 cum->nbytes += (((type && int_size_in_bytes (type) > 8
253 ? GET_MODE_SIZE (Pmode)
254 : (mode != BLKmode
255 ? GET_MODE_SIZE (mode)
256 : int_size_in_bytes (type))) + UNITS_PER_WORD - 1)
257 & -UNITS_PER_WORD);
1936e29b 258}
259
747fe2d1 260/* Return the high and low words of a CONST_DOUBLE */
261
262static void
39031315 263const_double_split (rtx x, HOST_WIDE_INT * p_high, HOST_WIDE_INT * p_low)
747fe2d1 264{
265 if (GET_CODE (x) == CONST_DOUBLE)
266 {
267 long t[2];
747fe2d1 268
269 switch (GET_MODE (x))
270 {
271 case DFmode:
945f7b03 272 REAL_VALUE_TO_TARGET_DOUBLE (*CONST_DOUBLE_REAL_VALUE (x), t);
747fe2d1 273 *p_high = t[1]; /* since v850 is little endian */
274 *p_low = t[0]; /* high is second word */
275 return;
276
277 case SFmode:
945f7b03 278 REAL_VALUE_TO_TARGET_SINGLE (*CONST_DOUBLE_REAL_VALUE (x), *p_high);
747fe2d1 279 *p_low = 0;
280 return;
281
282 case VOIDmode:
283 case DImode:
284 *p_high = CONST_DOUBLE_HIGH (x);
285 *p_low = CONST_DOUBLE_LOW (x);
286 return;
a821813a 287
288 default:
289 break;
747fe2d1 290 }
291 }
292
293 fatal_insn ("const_double_split got a bad insn:", x);
294}
295
296\f
297/* Return the cost of the rtx R with code CODE. */
298
299static int
39031315 300const_costs_int (HOST_WIDE_INT value, int zero_cost)
747fe2d1 301{
302 if (CONST_OK_FOR_I (value))
303 return zero_cost;
304 else if (CONST_OK_FOR_J (value))
305 return 1;
306 else if (CONST_OK_FOR_K (value))
307 return 2;
308 else
309 return 4;
310}
311
fab7adbf 312static int
39031315 313const_costs (rtx r, enum rtx_code c)
747fe2d1 314{
315 HOST_WIDE_INT high, low;
316
317 switch (c)
318 {
319 case CONST_INT:
320 return const_costs_int (INTVAL (r), 0);
321
322 case CONST_DOUBLE:
323 const_double_split (r, &high, &low);
324 if (GET_MODE (r) == SFmode)
325 return const_costs_int (high, 1);
326 else
327 return const_costs_int (high, 1) + const_costs_int (low, 1);
328
329 case SYMBOL_REF:
330 case LABEL_REF:
331 case CONST:
332 return 2;
333
334 case HIGH:
335 return 1;
336
337 default:
338 return 4;
339 }
340}
341
fab7adbf 342static bool
5ae4887d 343v850_rtx_costs (rtx x, machine_mode mode, int outer_code,
344 int opno ATTRIBUTE_UNUSED, int *total, bool speed)
fab7adbf 345{
5ae4887d 346 enum rtx_code code = GET_CODE (x);
ef51d1e3 347
fab7adbf 348 switch (code)
349 {
350 case CONST_INT:
351 case CONST_DOUBLE:
352 case CONST:
353 case SYMBOL_REF:
354 case LABEL_REF:
355 *total = COSTS_N_INSNS (const_costs (x, code));
356 return true;
357
358 case MOD:
359 case DIV:
360 case UMOD:
361 case UDIV:
f529eb25 362 if (TARGET_V850E && !speed)
fab7adbf 363 *total = 6;
364 else
365 *total = 60;
366 return true;
367
368 case MULT:
369 if (TARGET_V850E
5ae4887d 370 && (mode == SImode || mode == HImode || mode == QImode))
fab7adbf 371 {
372 if (GET_CODE (XEXP (x, 1)) == REG)
373 *total = 4;
374 else if (GET_CODE (XEXP (x, 1)) == CONST_INT)
375 {
376 if (CONST_OK_FOR_O (INTVAL (XEXP (x, 1))))
377 *total = 6;
378 else if (CONST_OK_FOR_K (INTVAL (XEXP (x, 1))))
379 *total = 10;
380 }
381 }
382 else
383 *total = 20;
384 return true;
385
74f4459c 386 case ZERO_EXTRACT:
387 if (outer_code == COMPARE)
388 *total = 0;
389 return false;
390
fab7adbf 391 default:
392 return false;
393 }
394}
747fe2d1 395\f
396/* Print operand X using operand code CODE to assembly language output file
397 FILE. */
398
73a49e11 399static void
400v850_print_operand (FILE * file, rtx x, int code)
747fe2d1 401{
402 HOST_WIDE_INT high, low;
403
404 switch (code)
405 {
57e629ba 406 case 'c':
9a9267b3 407 /* We use 'c' operands with symbols for .vtinherit. */
57e629ba 408 if (GET_CODE (x) == SYMBOL_REF)
409 {
410 output_addr_const(file, x);
411 break;
412 }
9a9267b3 413 /* Fall through. */
747fe2d1 414 case 'b':
415 case 'B':
d0ab67df 416 case 'C':
417 switch ((code == 'B' || code == 'C')
418 ? reverse_condition (GET_CODE (x)) : GET_CODE (x))
747fe2d1 419 {
420 case NE:
d0ab67df 421 if (code == 'c' || code == 'C')
422 fprintf (file, "nz");
423 else
424 fprintf (file, "ne");
747fe2d1 425 break;
426 case EQ:
d0ab67df 427 if (code == 'c' || code == 'C')
428 fprintf (file, "z");
429 else
430 fprintf (file, "e");
747fe2d1 431 break;
432 case GE:
d0ab67df 433 fprintf (file, "ge");
747fe2d1 434 break;
435 case GT:
d0ab67df 436 fprintf (file, "gt");
747fe2d1 437 break;
438 case LE:
d0ab67df 439 fprintf (file, "le");
747fe2d1 440 break;
441 case LT:
d0ab67df 442 fprintf (file, "lt");
747fe2d1 443 break;
444 case GEU:
d0ab67df 445 fprintf (file, "nl");
747fe2d1 446 break;
447 case GTU:
d0ab67df 448 fprintf (file, "h");
747fe2d1 449 break;
450 case LEU:
d0ab67df 451 fprintf (file, "nh");
747fe2d1 452 break;
453 case LTU:
d0ab67df 454 fprintf (file, "l");
747fe2d1 455 break;
456 default:
9623efd7 457 gcc_unreachable ();
747fe2d1 458 }
459 break;
9a9267b3 460 case 'F': /* High word of CONST_DOUBLE. */
9623efd7 461 switch (GET_CODE (x))
747fe2d1 462 {
9623efd7 463 case CONST_INT:
464 fprintf (file, "%d", (INTVAL (x) >= 0) ? 0 : -1);
465 break;
466
467 case CONST_DOUBLE:
747fe2d1 468 const_double_split (x, &high, &low);
469 fprintf (file, "%ld", (long) high);
9623efd7 470 break;
471
472 default:
473 gcc_unreachable ();
747fe2d1 474 }
747fe2d1 475 break;
9a9267b3 476 case 'G': /* Low word of CONST_DOUBLE. */
9623efd7 477 switch (GET_CODE (x))
747fe2d1 478 {
9623efd7 479 case CONST_INT:
480 fprintf (file, "%ld", (long) INTVAL (x));
481 break;
482
483 case CONST_DOUBLE:
747fe2d1 484 const_double_split (x, &high, &low);
485 fprintf (file, "%ld", (long) low);
9623efd7 486 break;
487
488 default:
489 gcc_unreachable ();
747fe2d1 490 }
747fe2d1 491 break;
492 case 'L':
8c178e2a 493 fprintf (file, "%d\n", (int)(INTVAL (x) & 0xffff));
747fe2d1 494 break;
495 case 'M':
496 fprintf (file, "%d", exact_log2 (INTVAL (x)));
497 break;
498 case 'O':
9623efd7 499 gcc_assert (special_symbolref_operand (x, VOIDmode));
500
501 if (GET_CODE (x) == CONST)
502 x = XEXP (XEXP (x, 0), 0);
503 else
504 gcc_assert (GET_CODE (x) == SYMBOL_REF);
505
506 if (SYMBOL_REF_ZDA_P (x))
507 fprintf (file, "zdaoff");
508 else if (SYMBOL_REF_SDA_P (x))
509 fprintf (file, "sdaoff");
510 else if (SYMBOL_REF_TDA_P (x))
511 fprintf (file, "tdaoff");
747fe2d1 512 else
9623efd7 513 gcc_unreachable ();
747fe2d1 514 break;
515 case 'P':
9623efd7 516 gcc_assert (special_symbolref_operand (x, VOIDmode));
517 output_addr_const (file, x);
747fe2d1 518 break;
519 case 'Q':
9623efd7 520 gcc_assert (special_symbolref_operand (x, VOIDmode));
521
522 if (GET_CODE (x) == CONST)
523 x = XEXP (XEXP (x, 0), 0);
747fe2d1 524 else
9623efd7 525 gcc_assert (GET_CODE (x) == SYMBOL_REF);
526
527 if (SYMBOL_REF_ZDA_P (x))
528 fprintf (file, "r0");
529 else if (SYMBOL_REF_SDA_P (x))
530 fprintf (file, "gp");
531 else if (SYMBOL_REF_TDA_P (x))
532 fprintf (file, "ep");
533 else
534 gcc_unreachable ();
747fe2d1 535 break;
536 case 'R': /* 2nd word of a double. */
537 switch (GET_CODE (x))
538 {
a821813a 539 case REG:
540 fprintf (file, reg_names[REGNO (x) + 1]);
541 break;
542 case MEM:
3c047fe9 543 {
544 machine_mode mode = GET_MODE (x);
545 x = XEXP (adjust_address (x, SImode, 4), 0);
546 v850_print_operand_address (file, mode, x);
547 if (GET_CODE (x) == CONST_INT)
548 fprintf (file, "[r0]");
549 }
a821813a 550 break;
551
85a79c1e 552 case CONST_INT:
553 {
554 unsigned HOST_WIDE_INT v = INTVAL (x);
555
556 /* Trickery to avoid problems with shifting
557 32-bits at a time on a 32-bit host. */
558 v = v >> 16;
559 v = v >> 16;
560 fprintf (file, HOST_WIDE_INT_PRINT_HEX, v);
561 break;
562 }
563
564 case CONST_DOUBLE:
565 fprintf (file, HOST_WIDE_INT_PRINT_HEX, CONST_DOUBLE_HIGH (x));
a821813a 566 break;
85a79c1e 567
568 default:
569 debug_rtx (x);
570 gcc_unreachable ();
747fe2d1 571 }
572 break;
573 case 'S':
574 {
d05e7146 575 /* If it's a reference to a TDA variable, use sst/sld vs. st/ld. */
65c7acad 576 if (GET_CODE (x) == MEM && ep_memory_operand (x, GET_MODE (x), FALSE))
577 fputs ("s", file);
578
579 break;
580 }
581 case 'T':
582 {
583 /* Like an 'S' operand above, but for unsigned loads only. */
584 if (GET_CODE (x) == MEM && ep_memory_operand (x, GET_MODE (x), TRUE))
747fe2d1 585 fputs ("s", file);
586
587 break;
588 }
9a9267b3 589 case 'W': /* Print the instruction suffix. */
747fe2d1 590 switch (GET_MODE (x))
591 {
592 default:
9623efd7 593 gcc_unreachable ();
747fe2d1 594
595 case QImode: fputs (".b", file); break;
596 case HImode: fputs (".h", file); break;
597 case SImode: fputs (".w", file); break;
598 case SFmode: fputs (".w", file); break;
599 }
600 break;
9a9267b3 601 case '.': /* Register r0. */
747fe2d1 602 fputs (reg_names[0], file);
603 break;
9a9267b3 604 case 'z': /* Reg or zero. */
605 if (REG_P (x))
d0ab67df 606 fputs (reg_names[REGNO (x)], file);
65b688d7 607 else if ((GET_MODE(x) == SImode
608 || GET_MODE(x) == DFmode
609 || GET_MODE(x) == SFmode)
610 && x == CONST0_RTX(GET_MODE(x)))
611 fputs (reg_names[0], file);
d0ab67df 612 else
9623efd7 613 {
614 gcc_assert (x == const0_rtx);
615 fputs (reg_names[0], file);
616 }
d0ab67df 617 break;
747fe2d1 618 default:
619 switch (GET_CODE (x))
620 {
621 case MEM:
622 if (GET_CODE (XEXP (x, 0)) == CONST_INT)
3c047fe9 623 output_address (GET_MODE (x),
624 gen_rtx_PLUS (SImode, gen_rtx_REG (SImode, 0),
7014838c 625 XEXP (x, 0)));
747fe2d1 626 else
3c047fe9 627 output_address (GET_MODE (x), XEXP (x, 0));
747fe2d1 628 break;
629
630 case REG:
631 fputs (reg_names[REGNO (x)], file);
632 break;
633 case SUBREG:
701e46d0 634 fputs (reg_names[subreg_regno (x)], file);
747fe2d1 635 break;
85a79c1e 636 case CONST_DOUBLE:
637 fprintf (file, HOST_WIDE_INT_PRINT_HEX, CONST_DOUBLE_LOW (x));
638 break;
639
747fe2d1 640 case CONST_INT:
641 case SYMBOL_REF:
642 case CONST:
643 case LABEL_REF:
644 case CODE_LABEL:
3c047fe9 645 v850_print_operand_address (file, VOIDmode, x);
747fe2d1 646 break;
647 default:
9623efd7 648 gcc_unreachable ();
747fe2d1 649 }
650 break;
651
652 }
653}
654
655\f
656/* Output assembly language output for the address ADDR to FILE. */
657
73a49e11 658static void
3c047fe9 659v850_print_operand_address (FILE * file, machine_mode /*mode*/, rtx addr)
747fe2d1 660{
661 switch (GET_CODE (addr))
662 {
663 case REG:
664 fprintf (file, "0[");
73a49e11 665 v850_print_operand (file, addr, 0);
747fe2d1 666 fprintf (file, "]");
667 break;
668 case LO_SUM:
669 if (GET_CODE (XEXP (addr, 0)) == REG)
670 {
671 /* reg,foo */
672 fprintf (file, "lo(");
73a49e11 673 v850_print_operand (file, XEXP (addr, 1), 0);
747fe2d1 674 fprintf (file, ")[");
73a49e11 675 v850_print_operand (file, XEXP (addr, 0), 0);
747fe2d1 676 fprintf (file, "]");
677 }
678 break;
679 case PLUS:
680 if (GET_CODE (XEXP (addr, 0)) == REG
681 || GET_CODE (XEXP (addr, 0)) == SUBREG)
682 {
683 /* reg,foo */
73a49e11 684 v850_print_operand (file, XEXP (addr, 1), 0);
747fe2d1 685 fprintf (file, "[");
73a49e11 686 v850_print_operand (file, XEXP (addr, 0), 0);
747fe2d1 687 fprintf (file, "]");
688 }
689 else
690 {
73a49e11 691 v850_print_operand (file, XEXP (addr, 0), 0);
747fe2d1 692 fprintf (file, "+");
73a49e11 693 v850_print_operand (file, XEXP (addr, 1), 0);
747fe2d1 694 }
695 break;
696 case SYMBOL_REF:
91efe10c 697 {
698 const char *off_name = NULL;
699 const char *reg_name = NULL;
700
701 if (SYMBOL_REF_ZDA_P (addr))
702 {
703 off_name = "zdaoff";
704 reg_name = "r0";
705 }
706 else if (SYMBOL_REF_SDA_P (addr))
707 {
708 off_name = "sdaoff";
709 reg_name = "gp";
710 }
711 else if (SYMBOL_REF_TDA_P (addr))
712 {
713 off_name = "tdaoff";
714 reg_name = "ep";
715 }
716
717 if (off_name)
747fe2d1 718 fprintf (file, "%s(", off_name);
747fe2d1 719 output_addr_const (file, addr);
91efe10c 720 if (reg_name)
721 fprintf (file, ")[%s]", reg_name);
722 }
747fe2d1 723 break;
724 case CONST:
725 if (special_symbolref_operand (addr, VOIDmode))
726 {
91efe10c 727 rtx x = XEXP (XEXP (addr, 0), 0);
9a356c3c 728 const char *off_name;
729 const char *reg_name;
747fe2d1 730
91efe10c 731 if (SYMBOL_REF_ZDA_P (x))
747fe2d1 732 {
733 off_name = "zdaoff";
734 reg_name = "r0";
735 }
91efe10c 736 else if (SYMBOL_REF_SDA_P (x))
747fe2d1 737 {
738 off_name = "sdaoff";
739 reg_name = "gp";
740 }
91efe10c 741 else if (SYMBOL_REF_TDA_P (x))
747fe2d1 742 {
743 off_name = "tdaoff";
744 reg_name = "ep";
745 }
746 else
9623efd7 747 gcc_unreachable ();
747fe2d1 748
749 fprintf (file, "%s(", off_name);
750 output_addr_const (file, addr);
751 fprintf (file, ")[%s]", reg_name);
752 }
753 else
754 output_addr_const (file, addr);
755 break;
756 default:
757 output_addr_const (file, addr);
758 break;
759 }
760}
761
73a49e11 762static bool
763v850_print_operand_punct_valid_p (unsigned char code)
764{
765 return code == '.';
766}
767
5dd3389c 768/* When assemble_integer is used to emit the offsets for a switch
769 table it can encounter (TRUNCATE:HI (MINUS:SI (LABEL_REF:SI) (LABEL_REF:SI))).
770 output_addr_const will normally barf at this, but it is OK to omit
771 the truncate and just emit the difference of the two labels. The
772 .hword directive will automatically handle the truncation for us.
773
6d0d55a1 774 Returns true if rtx was handled, false otherwise. */
5dd3389c 775
6d0d55a1 776static bool
39031315 777v850_output_addr_const_extra (FILE * file, rtx x)
5dd3389c 778{
779 if (GET_CODE (x) != TRUNCATE)
6d0d55a1 780 return false;
5dd3389c 781
782 x = XEXP (x, 0);
783
784 /* We must also handle the case where the switch table was passed a
785 constant value and so has been collapsed. In this case the first
786 label will have been deleted. In such a case it is OK to emit
787 nothing, since the table will not be used.
788 (cf gcc.c-torture/compile/990801-1.c). */
789 if (GET_CODE (x) == MINUS
dd1286fb 790 && GET_CODE (XEXP (x, 0)) == LABEL_REF)
791 {
792 rtx_code_label *label
793 = dyn_cast<rtx_code_label *> (XEXP (XEXP (x, 0), 0));
794 if (label && label->deleted ())
795 return true;
796 }
5dd3389c 797
798 output_addr_const (file, x);
6d0d55a1 799 return true;
5dd3389c 800}
747fe2d1 801\f
802/* Return appropriate code to load up a 1, 2, or 4 integer/floating
803 point value. */
804
1fcd08b1 805const char *
39031315 806output_move_single (rtx * operands)
747fe2d1 807{
808 rtx dst = operands[0];
809 rtx src = operands[1];
810
811 if (REG_P (dst))
812 {
813 if (REG_P (src))
814 return "mov %1,%0";
815
816 else if (GET_CODE (src) == CONST_INT)
817 {
818 HOST_WIDE_INT value = INTVAL (src);
819
d15353b6 820 if (CONST_OK_FOR_J (value)) /* Signed 5-bit immediate. */
747fe2d1 821 return "mov %1,%0";
822
d15353b6 823 else if (CONST_OK_FOR_K (value)) /* Signed 16-bit immediate. */
65b688d7 824 return "movea %1,%.,%0";
747fe2d1 825
5dd3389c 826 else if (CONST_OK_FOR_L (value)) /* Upper 16 bits were set. */
65b688d7 827 return "movhi hi0(%1),%.,%0";
747fe2d1 828
5dd3389c 829 /* A random constant. */
9a5788ea 830 else if (TARGET_V850E_UP)
5dd3389c 831 return "mov %1,%0";
832 else
747fe2d1 833 return "movhi hi(%1),%.,%0\n\tmovea lo(%1),%0,%0";
834 }
835
836 else if (GET_CODE (src) == CONST_DOUBLE && GET_MODE (src) == SFmode)
837 {
838 HOST_WIDE_INT high, low;
839
840 const_double_split (src, &high, &low);
5dd3389c 841
d15353b6 842 if (CONST_OK_FOR_J (high)) /* Signed 5-bit immediate. */
747fe2d1 843 return "mov %F1,%0";
844
d15353b6 845 else if (CONST_OK_FOR_K (high)) /* Signed 16-bit immediate. */
65b688d7 846 return "movea %F1,%.,%0";
747fe2d1 847
5dd3389c 848 else if (CONST_OK_FOR_L (high)) /* Upper 16 bits were set. */
65b688d7 849 return "movhi hi0(%F1),%.,%0";
747fe2d1 850
5dd3389c 851 /* A random constant. */
9a5788ea 852 else if (TARGET_V850E_UP)
5dd3389c 853 return "mov %F1,%0";
854
855 else
747fe2d1 856 return "movhi hi(%F1),%.,%0\n\tmovea lo(%F1),%0,%0";
857 }
858
859 else if (GET_CODE (src) == MEM)
860 return "%S1ld%W1 %1,%0";
861
862 else if (special_symbolref_operand (src, VOIDmode))
863 return "movea %O1(%P1),%Q1,%0";
864
865 else if (GET_CODE (src) == LABEL_REF
866 || GET_CODE (src) == SYMBOL_REF
867 || GET_CODE (src) == CONST)
65c7acad 868 {
9a5788ea 869 if (TARGET_V850E_UP)
5dd3389c 870 return "mov hilo(%1),%0";
871 else
872 return "movhi hi(%1),%.,%0\n\tmovea lo(%1),%0,%0";
65c7acad 873 }
747fe2d1 874
875 else if (GET_CODE (src) == HIGH)
876 return "movhi hi(%1),%.,%0";
877
878 else if (GET_CODE (src) == LO_SUM)
879 {
880 operands[2] = XEXP (src, 0);
881 operands[3] = XEXP (src, 1);
882 return "movea lo(%3),%2,%0";
883 }
884 }
885
886 else if (GET_CODE (dst) == MEM)
887 {
888 if (REG_P (src))
889 return "%S0st%W0 %1,%0";
890
891 else if (GET_CODE (src) == CONST_INT && INTVAL (src) == 0)
892 return "%S0st%W0 %.,%0";
893
894 else if (GET_CODE (src) == CONST_DOUBLE
895 && CONST0_RTX (GET_MODE (dst)) == src)
896 return "%S0st%W0 %.,%0";
897 }
898
d1f9b275 899 fatal_insn ("output_move_single:", gen_rtx_SET (dst, src));
747fe2d1 900 return "";
901}
902
3754d046 903machine_mode
c60e4982 904v850_select_cc_mode (enum rtx_code cond, rtx op0, rtx op1 ATTRIBUTE_UNUSED)
65b688d7 905{
906 if (GET_MODE_CLASS (GET_MODE (op0)) == MODE_FLOAT)
907 {
908 switch (cond)
909 {
910 case LE:
911 return CC_FPU_LEmode;
912 case GE:
913 return CC_FPU_GEmode;
914 case LT:
915 return CC_FPU_LTmode;
916 case GT:
917 return CC_FPU_GTmode;
918 case EQ:
919 return CC_FPU_EQmode;
920 case NE:
921 return CC_FPU_NEmode;
922 default:
bd38291a 923 gcc_unreachable ();
65b688d7 924 }
925 }
926 return CCmode;
927}
928
3754d046 929machine_mode
930v850_gen_float_compare (enum rtx_code cond, machine_mode mode ATTRIBUTE_UNUSED, rtx op0, rtx op1)
65b688d7 931{
bd38291a 932 if (GET_MODE (op0) == DFmode)
65b688d7 933 {
934 switch (cond)
935 {
936 case LE:
937 emit_insn (gen_cmpdf_le_insn (op0, op1));
938 break;
939 case GE:
940 emit_insn (gen_cmpdf_ge_insn (op0, op1));
941 break;
942 case LT:
943 emit_insn (gen_cmpdf_lt_insn (op0, op1));
944 break;
945 case GT:
946 emit_insn (gen_cmpdf_gt_insn (op0, op1));
947 break;
bd38291a 948 case NE:
949 /* Note: There is no NE comparison operator. So we
950 perform an EQ comparison and invert the branch.
951 See v850_float_nz_comparison for how this is done. */
65b688d7 952 case EQ:
953 emit_insn (gen_cmpdf_eq_insn (op0, op1));
954 break;
65b688d7 955 default:
bd38291a 956 gcc_unreachable ();
65b688d7 957 }
958 }
bd38291a 959 else if (GET_MODE (v850_compare_op0) == SFmode)
65b688d7 960 {
961 switch (cond)
962 {
963 case LE:
964 emit_insn (gen_cmpsf_le_insn(op0, op1));
965 break;
966 case GE:
967 emit_insn (gen_cmpsf_ge_insn(op0, op1));
968 break;
969 case LT:
970 emit_insn (gen_cmpsf_lt_insn(op0, op1));
971 break;
972 case GT:
973 emit_insn (gen_cmpsf_gt_insn(op0, op1));
974 break;
bd38291a 975 case NE:
976 /* Note: There is no NE comparison operator. So we
977 perform an EQ comparison and invert the branch.
978 See v850_float_nz_comparison for how this is done. */
65b688d7 979 case EQ:
980 emit_insn (gen_cmpsf_eq_insn(op0, op1));
981 break;
65b688d7 982 default:
bd38291a 983 gcc_unreachable ();
65b688d7 984 }
985 }
986 else
bd38291a 987 gcc_unreachable ();
65b688d7 988
989 return v850_select_cc_mode (cond, op0, op1);
990}
991
992rtx
3754d046 993v850_gen_compare (enum rtx_code cond, machine_mode mode, rtx op0, rtx op1)
65b688d7 994{
995 if (GET_MODE_CLASS(GET_MODE (op0)) != MODE_FLOAT)
996 {
997 emit_insn (gen_cmpsi_insn (op0, op1));
998 return gen_rtx_fmt_ee (cond, mode, gen_rtx_REG(CCmode, CC_REGNUM), const0_rtx);
999 }
1000 else
1001 {
1002 rtx cc_reg;
1003 mode = v850_gen_float_compare (cond, mode, op0, op1);
1004 cc_reg = gen_rtx_REG (mode, CC_REGNUM);
d1f9b275 1005 emit_insn (gen_rtx_SET (cc_reg, gen_rtx_REG (mode, FCC_REGNUM)));
65b688d7 1006
1007 return gen_rtx_fmt_ee (cond, mode, cc_reg, const0_rtx);
1008 }
1009}
1010
d0ab67df 1011/* Return maximum offset supported for a short EP memory reference of mode
1012 MODE and signedness UNSIGNEDP. */
747fe2d1 1013
a821813a 1014static int
3754d046 1015ep_memory_offset (machine_mode mode, int unsignedp ATTRIBUTE_UNUSED)
747fe2d1 1016{
d0ab67df 1017 int max_offset = 0;
747fe2d1 1018
d0ab67df 1019 switch (mode)
747fe2d1 1020 {
747fe2d1 1021 case QImode:
5dd3389c 1022 if (TARGET_SMALL_SLD)
1023 max_offset = (1 << 4);
9a5788ea 1024 else if ((TARGET_V850E_UP)
65b688d7 1025 && unsignedp)
5dd3389c 1026 max_offset = (1 << 4);
1027 else
1028 max_offset = (1 << 7);
747fe2d1 1029 break;
1030
1031 case HImode:
5dd3389c 1032 if (TARGET_SMALL_SLD)
1033 max_offset = (1 << 5);
9a5788ea 1034 else if ((TARGET_V850E_UP)
65b688d7 1035 && unsignedp)
5dd3389c 1036 max_offset = (1 << 5);
1037 else
1038 max_offset = (1 << 8);
747fe2d1 1039 break;
1040
1041 case SImode:
1042 case SFmode:
65c7acad 1043 max_offset = (1 << 8);
747fe2d1 1044 break;
a821813a 1045
1046 default:
1047 break;
747fe2d1 1048 }
1049
d0ab67df 1050 return max_offset;
1051}
1052
1053/* Return true if OP is a valid short EP memory reference */
1054
1055int
3754d046 1056ep_memory_operand (rtx op, machine_mode mode, int unsigned_load)
d0ab67df 1057{
1058 rtx addr, op0, op1;
1059 int max_offset;
1060 int mask;
1061
d05e7146 1062 /* If we are not using the EP register on a per-function basis
554f2707 1063 then do not allow this optimization at all. This is to
d05e7146 1064 prevent the use of the SLD/SST instructions which cannot be
1065 guaranteed to work properly due to a hardware bug. */
1066 if (!TARGET_EP)
1067 return FALSE;
1068
d0ab67df 1069 if (GET_CODE (op) != MEM)
1070 return FALSE;
1071
1072 max_offset = ep_memory_offset (mode, unsigned_load);
1073
1074 mask = GET_MODE_SIZE (mode) - 1;
1075
747fe2d1 1076 addr = XEXP (op, 0);
1077 if (GET_CODE (addr) == CONST)
1078 addr = XEXP (addr, 0);
1079
1080 switch (GET_CODE (addr))
1081 {
1082 default:
1083 break;
1084
1085 case SYMBOL_REF:
91efe10c 1086 return SYMBOL_REF_TDA_P (addr);
747fe2d1 1087
1088 case REG:
1089 return REGNO (addr) == EP_REGNUM;
1090
1091 case PLUS:
1092 op0 = XEXP (addr, 0);
1093 op1 = XEXP (addr, 1);
1094 if (GET_CODE (op1) == CONST_INT
1095 && INTVAL (op1) < max_offset
acd39194 1096 && INTVAL (op1) >= 0
747fe2d1 1097 && (INTVAL (op1) & mask) == 0)
1098 {
1099 if (GET_CODE (op0) == REG && REGNO (op0) == EP_REGNUM)
1100 return TRUE;
1101
91efe10c 1102 if (GET_CODE (op0) == SYMBOL_REF && SYMBOL_REF_TDA_P (op0))
747fe2d1 1103 return TRUE;
1104 }
1105 break;
1106 }
1107
1108 return FALSE;
1109}
747fe2d1 1110\f
1111/* Substitute memory references involving a pointer, to use the ep pointer,
1112 taking care to save and preserve the ep. */
1113
1114static void
91a55c11 1115substitute_ep_register (rtx_insn *first_insn,
1116 rtx_insn *last_insn,
39031315 1117 int uses,
1118 int regno,
1119 rtx * p_r1,
1120 rtx * p_ep)
747fe2d1 1121{
7014838c 1122 rtx reg = gen_rtx_REG (Pmode, regno);
91a55c11 1123 rtx_insn *insn;
747fe2d1 1124
1125 if (!*p_r1)
1126 {
9f8151b9 1127 df_set_regs_ever_live (1, true);
7014838c 1128 *p_r1 = gen_rtx_REG (Pmode, 1);
1129 *p_ep = gen_rtx_REG (Pmode, 30);
747fe2d1 1130 }
1131
1132 if (TARGET_DEBUG)
a821813a 1133 fprintf (stderr, "\
1134Saved %d bytes (%d uses of register %s) in function %s, starting as insn %d, ending at %d\n",
747fe2d1 1135 2 * (uses - 3), uses, reg_names[regno],
1136 IDENTIFIER_POINTER (DECL_NAME (current_function_decl)),
1137 INSN_UID (first_insn), INSN_UID (last_insn));
1138
aa90bb35 1139 if (NOTE_P (first_insn))
747fe2d1 1140 first_insn = next_nonnote_insn (first_insn);
1141
1142 last_insn = next_nonnote_insn (last_insn);
1143 for (insn = first_insn; insn && insn != last_insn; insn = NEXT_INSN (insn))
1144 {
aa90bb35 1145 if (NONJUMP_INSN_P (insn))
747fe2d1 1146 {
1147 rtx pattern = single_set (insn);
1148
1149 /* Replace the memory references. */
1150 if (pattern)
1151 {
1152 rtx *p_mem;
d0ab67df 1153 /* Memory operands are signed by default. */
1154 int unsignedp = FALSE;
747fe2d1 1155
1156 if (GET_CODE (SET_DEST (pattern)) == MEM
1157 && GET_CODE (SET_SRC (pattern)) == MEM)
1158 p_mem = (rtx *)0;
1159
1160 else if (GET_CODE (SET_DEST (pattern)) == MEM)
1161 p_mem = &SET_DEST (pattern);
1162
1163 else if (GET_CODE (SET_SRC (pattern)) == MEM)
1164 p_mem = &SET_SRC (pattern);
1165
5dd3389c 1166 else if (GET_CODE (SET_SRC (pattern)) == SIGN_EXTEND
1167 && GET_CODE (XEXP (SET_SRC (pattern), 0)) == MEM)
1168 p_mem = &XEXP (SET_SRC (pattern), 0);
1169
1170 else if (GET_CODE (SET_SRC (pattern)) == ZERO_EXTEND
1171 && GET_CODE (XEXP (SET_SRC (pattern), 0)) == MEM)
1172 {
1173 p_mem = &XEXP (SET_SRC (pattern), 0);
1174 unsignedp = TRUE;
1175 }
747fe2d1 1176 else
1177 p_mem = (rtx *)0;
1178
1179 if (p_mem)
1180 {
1181 rtx addr = XEXP (*p_mem, 0);
1182
e101acea 1183 if (GET_CODE (addr) == REG && REGNO (addr) == (unsigned) regno)
747fe2d1 1184 *p_mem = change_address (*p_mem, VOIDmode, *p_ep);
1185
1186 else if (GET_CODE (addr) == PLUS
1187 && GET_CODE (XEXP (addr, 0)) == REG
e101acea 1188 && REGNO (XEXP (addr, 0)) == (unsigned) regno
747fe2d1 1189 && GET_CODE (XEXP (addr, 1)) == CONST_INT
a821813a 1190 && ((INTVAL (XEXP (addr, 1)))
d0ab67df 1191 < ep_memory_offset (GET_MODE (*p_mem),
acd39194 1192 unsignedp))
1193 && ((INTVAL (XEXP (addr, 1))) >= 0))
747fe2d1 1194 *p_mem = change_address (*p_mem, VOIDmode,
7014838c 1195 gen_rtx_PLUS (Pmode,
1196 *p_ep,
1197 XEXP (addr, 1)));
747fe2d1 1198 }
1199 }
1200 }
1201 }
1202
1203 /* Optimize back to back cases of ep <- r1 & r1 <- ep. */
1204 insn = prev_nonnote_insn (first_insn);
aa90bb35 1205 if (insn && NONJUMP_INSN_P (insn)
747fe2d1 1206 && GET_CODE (PATTERN (insn)) == SET
1207 && SET_DEST (PATTERN (insn)) == *p_ep
1208 && SET_SRC (PATTERN (insn)) == *p_r1)
1209 delete_insn (insn);
1210 else
d1f9b275 1211 emit_insn_before (gen_rtx_SET (*p_r1, *p_ep), first_insn);
747fe2d1 1212
d1f9b275 1213 emit_insn_before (gen_rtx_SET (*p_ep, reg), first_insn);
1214 emit_insn_before (gen_rtx_SET (*p_ep, *p_r1), last_insn);
747fe2d1 1215}
1216
1217\f
2efea8c0 1218/* TARGET_MACHINE_DEPENDENT_REORG. On the 850, we use it to implement
1219 the -mep mode to copy heavily used pointers to ep to use the implicit
1220 addressing. */
747fe2d1 1221
2efea8c0 1222static void
39031315 1223v850_reorg (void)
747fe2d1 1224{
a821813a 1225 struct
1226 {
747fe2d1 1227 int uses;
91a55c11 1228 rtx_insn *first_insn;
1229 rtx_insn *last_insn;
a821813a 1230 }
1231 regs[FIRST_PSEUDO_REGISTER];
747fe2d1 1232
1233 int i;
1234 int use_ep = FALSE;
1235 rtx r1 = NULL_RTX;
1236 rtx ep = NULL_RTX;
91a55c11 1237 rtx_insn *insn;
747fe2d1 1238 rtx pattern;
1239
d32ccca7 1240 /* If not ep mode, just return now. */
747fe2d1 1241 if (!TARGET_EP)
1242 return;
1243
1244 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1245 {
1246 regs[i].uses = 0;
91a55c11 1247 regs[i].first_insn = NULL;
1248 regs[i].last_insn = NULL;
747fe2d1 1249 }
1250
2efea8c0 1251 for (insn = get_insns (); insn != NULL_RTX; insn = NEXT_INSN (insn))
747fe2d1 1252 {
1253 switch (GET_CODE (insn))
1254 {
1255 /* End of basic block */
1256 default:
1257 if (!use_ep)
1258 {
1259 int max_uses = -1;
1260 int max_regno = -1;
1261
1262 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1263 {
1264 if (max_uses < regs[i].uses)
1265 {
1266 max_uses = regs[i].uses;
1267 max_regno = i;
1268 }
1269 }
1270
1271 if (max_uses > 3)
1272 substitute_ep_register (regs[max_regno].first_insn,
1273 regs[max_regno].last_insn,
1274 max_uses, max_regno, &r1, &ep);
1275 }
1276
1277 use_ep = FALSE;
1278 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1279 {
1280 regs[i].uses = 0;
91a55c11 1281 regs[i].first_insn = NULL;
1282 regs[i].last_insn = NULL;
747fe2d1 1283 }
1284 break;
1285
1286 case NOTE:
1287 break;
1288
1289 case INSN:
1290 pattern = single_set (insn);
1291
85a79c1e 1292 /* See if there are any memory references we can shorten. */
747fe2d1 1293 if (pattern)
1294 {
1295 rtx src = SET_SRC (pattern);
1296 rtx dest = SET_DEST (pattern);
1297 rtx mem;
d0ab67df 1298 /* Memory operands are signed by default. */
1299 int unsignedp = FALSE;
747fe2d1 1300
d0fafca1 1301 /* We might have (SUBREG (MEM)) here, so just get rid of the
e2c2ccf6 1302 subregs to make this code simpler. */
1303 if (GET_CODE (dest) == SUBREG
1304 && (GET_CODE (SUBREG_REG (dest)) == MEM
1305 || GET_CODE (SUBREG_REG (dest)) == REG))
85a79c1e 1306 alter_subreg (&dest, false);
e2c2ccf6 1307 if (GET_CODE (src) == SUBREG
1308 && (GET_CODE (SUBREG_REG (src)) == MEM
1309 || GET_CODE (SUBREG_REG (src)) == REG))
85a79c1e 1310 alter_subreg (&src, false);
d0fafca1 1311
747fe2d1 1312 if (GET_CODE (dest) == MEM && GET_CODE (src) == MEM)
1313 mem = NULL_RTX;
1314
1315 else if (GET_CODE (dest) == MEM)
1316 mem = dest;
1317
1318 else if (GET_CODE (src) == MEM)
1319 mem = src;
1320
5dd3389c 1321 else if (GET_CODE (src) == SIGN_EXTEND
1322 && GET_CODE (XEXP (src, 0)) == MEM)
1323 mem = XEXP (src, 0);
1324
1325 else if (GET_CODE (src) == ZERO_EXTEND
1326 && GET_CODE (XEXP (src, 0)) == MEM)
1327 {
1328 mem = XEXP (src, 0);
1329 unsignedp = TRUE;
1330 }
747fe2d1 1331 else
1332 mem = NULL_RTX;
1333
d0ab67df 1334 if (mem && ep_memory_operand (mem, GET_MODE (mem), unsignedp))
747fe2d1 1335 use_ep = TRUE;
1336
1337 else if (!use_ep && mem
1338 && GET_MODE_SIZE (GET_MODE (mem)) <= UNITS_PER_WORD)
1339 {
1340 rtx addr = XEXP (mem, 0);
1341 int regno = -1;
1342 int short_p;
1343
1344 if (GET_CODE (addr) == REG)
1345 {
1346 short_p = TRUE;
1347 regno = REGNO (addr);
1348 }
1349
1350 else if (GET_CODE (addr) == PLUS
1351 && GET_CODE (XEXP (addr, 0)) == REG
1352 && GET_CODE (XEXP (addr, 1)) == CONST_INT
a821813a 1353 && ((INTVAL (XEXP (addr, 1)))
acd39194 1354 < ep_memory_offset (GET_MODE (mem), unsignedp))
1355 && ((INTVAL (XEXP (addr, 1))) >= 0))
747fe2d1 1356 {
1357 short_p = TRUE;
1358 regno = REGNO (XEXP (addr, 0));
1359 }
1360
1361 else
1362 short_p = FALSE;
1363
1364 if (short_p)
1365 {
1366 regs[regno].uses++;
1367 regs[regno].last_insn = insn;
1368 if (!regs[regno].first_insn)
1369 regs[regno].first_insn = insn;
1370 }
1371 }
1372
1373 /* Loading up a register in the basic block zaps any savings
1374 for the register */
d0fafca1 1375 if (GET_CODE (dest) == REG)
747fe2d1 1376 {
3754d046 1377 machine_mode mode = GET_MODE (dest);
747fe2d1 1378 int regno;
1379 int endregno;
1380
d0fafca1 1381 regno = REGNO (dest);
747fe2d1 1382 endregno = regno + HARD_REGNO_NREGS (regno, mode);
1383
1384 if (!use_ep)
1385 {
1386 /* See if we can use the pointer before this
1387 modification. */
1388 int max_uses = -1;
1389 int max_regno = -1;
1390
1391 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1392 {
1393 if (max_uses < regs[i].uses)
1394 {
1395 max_uses = regs[i].uses;
1396 max_regno = i;
1397 }
1398 }
1399
1400 if (max_uses > 3
1401 && max_regno >= regno
1402 && max_regno < endregno)
1403 {
1404 substitute_ep_register (regs[max_regno].first_insn,
1405 regs[max_regno].last_insn,
a821813a 1406 max_uses, max_regno, &r1,
1407 &ep);
747fe2d1 1408
1409 /* Since we made a substitution, zap all remembered
1410 registers. */
1411 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1412 {
1413 regs[i].uses = 0;
91a55c11 1414 regs[i].first_insn = NULL;
1415 regs[i].last_insn = NULL;
747fe2d1 1416 }
1417 }
1418 }
1419
1420 for (i = regno; i < endregno; i++)
1421 {
1422 regs[i].uses = 0;
91a55c11 1423 regs[i].first_insn = NULL;
1424 regs[i].last_insn = NULL;
747fe2d1 1425 }
1426 }
1427 }
1428 }
1429 }
1430}
1431
747fe2d1 1432/* # of registers saved by the interrupt handler. */
65b688d7 1433#define INTERRUPT_FIXED_NUM 5
747fe2d1 1434
1435/* # of bytes for registers saved by the interrupt handler. */
1436#define INTERRUPT_FIXED_SAVE_SIZE (4 * INTERRUPT_FIXED_NUM)
1437
747fe2d1 1438/* # of words saved for other registers. */
1439#define INTERRUPT_ALL_SAVE_NUM \
65b688d7 1440 (30 - INTERRUPT_FIXED_NUM)
747fe2d1 1441
1442#define INTERRUPT_ALL_SAVE_SIZE (4 * INTERRUPT_ALL_SAVE_NUM)
1443
1444int
39031315 1445compute_register_save_size (long * p_reg_saved)
747fe2d1 1446{
1447 int size = 0;
1448 int i;
1449 int interrupt_handler = v850_interrupt_function_p (current_function_decl);
3072d30e 1450 int call_p = df_regs_ever_live_p (LINK_POINTER_REGNUM);
747fe2d1 1451 long reg_saved = 0;
1452
747fe2d1 1453 /* Count space for the register saves. */
1454 if (interrupt_handler)
1455 {
1456 for (i = 0; i <= 31; i++)
1457 switch (i)
1458 {
1459 default:
3072d30e 1460 if (df_regs_ever_live_p (i) || call_p)
747fe2d1 1461 {
1462 size += 4;
1463 reg_saved |= 1L << i;
1464 }
1465 break;
1466
1467 /* We don't save/restore r0 or the stack pointer */
1468 case 0:
1469 case STACK_POINTER_REGNUM:
1470 break;
1471
1472 /* For registers with fixed use, we save them, set them to the
1473 appropriate value, and then restore them.
1474 These registers are handled specially, so don't list them
1475 on the list of registers to save in the prologue. */
1476 case 1: /* temp used to hold ep */
a1e077bd 1477 case 4: /* gp */
747fe2d1 1478 case 10: /* temp used to call interrupt save/restore */
65b688d7 1479 case 11: /* temp used to call interrupt save/restore (long call) */
747fe2d1 1480 case EP_REGNUM: /* ep */
1481 size += 4;
1482 break;
1483 }
1484 }
747fe2d1 1485 else
26845ab8 1486 {
1487 /* Find the first register that needs to be saved. */
1488 for (i = 0; i <= 31; i++)
3072d30e 1489 if (df_regs_ever_live_p (i) && ((! call_used_regs[i])
26845ab8 1490 || i == LINK_POINTER_REGNUM))
1491 break;
1492
1493 /* If it is possible that an out-of-line helper function might be
1494 used to generate the prologue for the current function, then we
1495 need to cover the possibility that such a helper function will
1496 be used, despite the fact that there might be gaps in the list of
1497 registers that need to be saved. To detect this we note that the
f3d57f06 1498 helper functions always push at least register r29 (provided
1499 that the function is not an interrupt handler). */
26845ab8 1500
1501 if (TARGET_PROLOG_FUNCTION
f3d57f06 1502 && (i == 2 || ((i >= 20) && (i < 30))))
747fe2d1 1503 {
26845ab8 1504 if (i == 2)
1505 {
1506 size += 4;
1507 reg_saved |= 1L << i;
1508
1509 i = 20;
1510 }
747fe2d1 1511
26845ab8 1512 /* Helper functions save all registers between the starting
1513 register and the last register, regardless of whether they
1514 are actually used by the function or not. */
1515 for (; i <= 29; i++)
1516 {
1517 size += 4;
1518 reg_saved |= 1L << i;
1519 }
1520
3072d30e 1521 if (df_regs_ever_live_p (LINK_POINTER_REGNUM))
26845ab8 1522 {
1523 size += 4;
1524 reg_saved |= 1L << LINK_POINTER_REGNUM;
1525 }
1526 }
1527 else
1528 {
1529 for (; i <= 31; i++)
3072d30e 1530 if (df_regs_ever_live_p (i) && ((! call_used_regs[i])
26845ab8 1531 || i == LINK_POINTER_REGNUM))
1532 {
1533 size += 4;
1534 reg_saved |= 1L << i;
1535 }
1536 }
1537 }
1538
747fe2d1 1539 if (p_reg_saved)
1540 *p_reg_saved = reg_saved;
1541
1542 return size;
1543}
1544
85a79c1e 1545/* Typical stack layout should looks like this after the function's prologue:
1546
1547 | |
1548 -- ^
1549 | | \ |
1550 | | arguments saved | Increasing
1551 | | on the stack | addresses
1552 PARENT arg pointer -> | | /
1553 -------------------------- ---- -------------------
1554 | | - space for argument split between regs & stack
1555 --
1556 CHILD | | \ <-- (return address here)
1557 | | other call
1558 | | saved registers
1559 | | /
1560 --
1561 frame pointer -> | | \ ___
1562 | | local |
1563 | | variables |f
1564 | | / |r
1565 -- |a
1566 | | \ |m
1567 | | outgoing |e
1568 | | arguments | | Decreasing
1569 (hard) frame pointer | | / | | addresses
1570 and stack pointer -> | | / _|_ |
1571 -------------------------- ---- ------------------ V */
1572
747fe2d1 1573int
39031315 1574compute_frame_size (int size, long * p_reg_saved)
747fe2d1 1575{
747fe2d1 1576 return (size
1577 + compute_register_save_size (p_reg_saved)
abe32cce 1578 + crtl->outgoing_args_size);
747fe2d1 1579}
1580
65b688d7 1581static int
1582use_prolog_function (int num_save, int frame_size)
1583{
1584 int alloc_stack = (4 * num_save);
1585 int unalloc_stack = frame_size - alloc_stack;
1586 int save_func_len, restore_func_len;
1587 int save_normal_len, restore_normal_len;
1588
1589 if (! TARGET_DISABLE_CALLT)
1590 save_func_len = restore_func_len = 2;
1591 else
1592 save_func_len = restore_func_len = TARGET_LONG_CALLS ? (4+4+4+2+2) : 4;
1593
1594 if (unalloc_stack)
1595 {
1596 save_func_len += CONST_OK_FOR_J (-unalloc_stack) ? 2 : 4;
1597 restore_func_len += CONST_OK_FOR_J (-unalloc_stack) ? 2 : 4;
1598 }
1599
1600 /* See if we would have used ep to save the stack. */
1601 if (TARGET_EP && num_save > 3 && (unsigned)frame_size < 255)
1602 save_normal_len = restore_normal_len = (3 * 2) + (2 * num_save);
1603 else
1604 save_normal_len = restore_normal_len = 4 * num_save;
1605
1606 save_normal_len += CONST_OK_FOR_J (-frame_size) ? 2 : 4;
1607 restore_normal_len += (CONST_OK_FOR_J (frame_size) ? 2 : 4) + 2;
1608
1609 /* Don't bother checking if we don't actually save any space.
1610 This happens for instance if one register is saved and additional
1611 stack space is allocated. */
1612 return ((save_func_len + restore_func_len) < (save_normal_len + restore_normal_len));
1613}
1614
9a9267b3 1615static void
85a79c1e 1616increment_stack (signed int amount, bool in_prologue)
9a9267b3 1617{
1618 rtx inc;
1619
1620 if (amount == 0)
1621 return;
1622
1623 inc = GEN_INT (amount);
1624
1625 if (! CONST_OK_FOR_K (amount))
1626 {
1627 rtx reg = gen_rtx_REG (Pmode, 12);
1628
85a79c1e 1629 inc = emit_move_insn (reg, inc);
1630 if (in_prologue)
1631 F (inc);
9a9267b3 1632 inc = reg;
1633 }
1634
85a79c1e 1635 inc = emit_insn (gen_addsi3 (stack_pointer_rtx, stack_pointer_rtx, inc));
1636 if (in_prologue)
1637 F (inc);
9a9267b3 1638}
1639
747fe2d1 1640void
39031315 1641expand_prologue (void)
747fe2d1 1642{
1643 unsigned int i;
747fe2d1 1644 unsigned int size = get_frame_size ();
1645 unsigned int actual_fsize;
1646 unsigned int init_stack_alloc = 0;
1647 rtx save_regs[32];
1648 rtx save_all;
a821813a 1649 unsigned int num_save;
747fe2d1 1650 int code;
1651 int interrupt_handler = v850_interrupt_function_p (current_function_decl);
1652 long reg_saved = 0;
1653
1654 actual_fsize = compute_frame_size (size, &reg_saved);
1655
9a9267b3 1656 if (flag_stack_usage_info)
1657 current_function_static_stack_size = actual_fsize;
1658
d022cb59 1659 /* Save/setup global registers for interrupt functions right now. */
747fe2d1 1660 if (interrupt_handler)
1661 {
9a5788ea 1662 if (! TARGET_DISABLE_CALLT && (TARGET_V850E_UP))
5dd3389c 1663 emit_insn (gen_callt_save_interrupt ());
1664 else
9878c564 1665 emit_insn (gen_save_interrupt ());
5dd3389c 1666
747fe2d1 1667 actual_fsize -= INTERRUPT_FIXED_SAVE_SIZE;
26845ab8 1668
1669 if (((1L << LINK_POINTER_REGNUM) & reg_saved) != 0)
747fe2d1 1670 actual_fsize -= INTERRUPT_ALL_SAVE_SIZE;
85a79c1e 1671
1672 /* Interrupt functions are not passed arguments, so no need to
1673 allocate space for split structure arguments. */
1674 gcc_assert (crtl->args.pretend_args_size == 0);
747fe2d1 1675 }
1676
d022cb59 1677 /* Identify all of the saved registers. */
747fe2d1 1678 num_save = 0;
65b688d7 1679 for (i = 1; i < 32; i++)
747fe2d1 1680 {
1681 if (((1L << i) & reg_saved) != 0)
7014838c 1682 save_regs[num_save++] = gen_rtx_REG (Pmode, i);
747fe2d1 1683 }
1684
85a79c1e 1685 if (crtl->args.pretend_args_size)
1686 {
1687 if (num_save == 0)
1688 {
1689 increment_stack (- (actual_fsize + crtl->args.pretend_args_size), true);
1690 actual_fsize = 0;
1691 }
1692 else
1693 increment_stack (- crtl->args.pretend_args_size, true);
1694 }
1695
747fe2d1 1696 /* See if we have an insn that allocates stack space and saves the particular
85a79c1e 1697 registers we want to. Note that the helpers won't
1698 allocate additional space for registers GCC saves to complete a
1699 "split" structure argument. */
747fe2d1 1700 save_all = NULL_RTX;
85a79c1e 1701 if (TARGET_PROLOG_FUNCTION
1702 && !crtl->args.pretend_args_size
1703 && num_save > 0)
747fe2d1 1704 {
65b688d7 1705 if (use_prolog_function (num_save, actual_fsize))
747fe2d1 1706 {
65b688d7 1707 int alloc_stack = 4 * num_save;
1708 int offset = 0;
1709
7014838c 1710 save_all = gen_rtx_PARALLEL
1711 (VOIDmode,
a184c07b 1712 rtvec_alloc (num_save + 1
65b688d7 1713 + (TARGET_DISABLE_CALLT ? (TARGET_LONG_CALLS ? 2 : 1) : 0)));
7014838c 1714
1715 XVECEXP (save_all, 0, 0)
d1f9b275 1716 = gen_rtx_SET (stack_pointer_rtx,
65b688d7 1717 gen_rtx_PLUS (Pmode,
1718 stack_pointer_rtx,
1719 GEN_INT(-alloc_stack)));
747fe2d1 1720 for (i = 0; i < num_save; i++)
1721 {
65b688d7 1722 offset -= 4;
7014838c 1723 XVECEXP (save_all, 0, i+1)
d1f9b275 1724 = gen_rtx_SET (gen_rtx_MEM (Pmode,
65b688d7 1725 gen_rtx_PLUS (Pmode,
1726 stack_pointer_rtx,
1727 GEN_INT(offset))),
7014838c 1728 save_regs[i]);
747fe2d1 1729 }
1730
65b688d7 1731 if (TARGET_DISABLE_CALLT)
a184c07b 1732 {
1733 XVECEXP (save_all, 0, num_save + 1)
1734 = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (Pmode, 10));
1735
1736 if (TARGET_LONG_CALLS)
1737 XVECEXP (save_all, 0, num_save + 2)
1738 = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (Pmode, 11));
1739 }
1740
85a79c1e 1741 v850_all_frame_related (save_all);
1742
2571646d 1743 code = recog (save_all, NULL_RTX, NULL);
747fe2d1 1744 if (code >= 0)
1745 {
1746 rtx insn = emit_insn (save_all);
1747 INSN_CODE (insn) = code;
1748 actual_fsize -= alloc_stack;
26845ab8 1749
747fe2d1 1750 }
1751 else
1752 save_all = NULL_RTX;
1753 }
1754 }
1755
a821813a 1756 /* If no prolog save function is available, store the registers the old
df978151 1757 fashioned way (one by one). */
747fe2d1 1758 if (!save_all)
1759 {
1760 /* Special case interrupt functions that save all registers for a call. */
26845ab8 1761 if (interrupt_handler && ((1L << LINK_POINTER_REGNUM) & reg_saved) != 0)
1762 {
9a5788ea 1763 if (! TARGET_DISABLE_CALLT && (TARGET_V850E_UP))
5dd3389c 1764 emit_insn (gen_callt_save_all_interrupt ());
1765 else
1766 emit_insn (gen_save_all_interrupt ());
26845ab8 1767 }
747fe2d1 1768 else
1769 {
65b688d7 1770 int offset;
747fe2d1 1771 /* If the stack is too big, allocate it in chunks so we can do the
1772 register saves. We use the register save size so we use the ep
1773 register. */
1774 if (actual_fsize && !CONST_OK_FOR_K (-actual_fsize))
1775 init_stack_alloc = compute_register_save_size (NULL);
1776 else
1777 init_stack_alloc = actual_fsize;
65c7acad 1778
df978151 1779 /* Save registers at the beginning of the stack frame. */
747fe2d1 1780 offset = init_stack_alloc - 4;
65c7acad 1781
747fe2d1 1782 if (init_stack_alloc)
85a79c1e 1783 increment_stack (- (signed) init_stack_alloc, true);
65c7acad 1784
747fe2d1 1785 /* Save the return pointer first. */
26845ab8 1786 if (num_save > 0 && REGNO (save_regs[num_save-1]) == LINK_POINTER_REGNUM)
747fe2d1 1787 {
85a79c1e 1788 F (emit_move_insn (gen_rtx_MEM (SImode,
1789 plus_constant (Pmode,
1790 stack_pointer_rtx,
1791 offset)),
1792 save_regs[--num_save]));
747fe2d1 1793 offset -= 4;
1794 }
65c7acad 1795
747fe2d1 1796 for (i = 0; i < num_save; i++)
1797 {
85a79c1e 1798 F (emit_move_insn (gen_rtx_MEM (SImode,
1799 plus_constant (Pmode,
1800 stack_pointer_rtx,
1801 offset)),
1802 save_regs[i]));
747fe2d1 1803 offset -= 4;
1804 }
1805 }
1806 }
1807
1808 /* Allocate the rest of the stack that was not allocated above (either it is
1809 > 32K or we just called a function to save the registers and needed more
1810 stack. */
1811 if (actual_fsize > init_stack_alloc)
85a79c1e 1812 increment_stack (init_stack_alloc - actual_fsize, true);
747fe2d1 1813
1814 /* If we need a frame pointer, set it up now. */
1815 if (frame_pointer_needed)
85a79c1e 1816 F (emit_move_insn (hard_frame_pointer_rtx, stack_pointer_rtx));
747fe2d1 1817}
1818\f
1819
1820void
39031315 1821expand_epilogue (void)
747fe2d1 1822{
1823 unsigned int i;
747fe2d1 1824 unsigned int size = get_frame_size ();
1825 long reg_saved = 0;
4c369c58 1826 int actual_fsize = compute_frame_size (size, &reg_saved);
747fe2d1 1827 rtx restore_regs[32];
1828 rtx restore_all;
a821813a 1829 unsigned int num_restore;
747fe2d1 1830 int code;
1831 int interrupt_handler = v850_interrupt_function_p (current_function_decl);
1832
1833 /* Eliminate the initial stack stored by interrupt functions. */
1834 if (interrupt_handler)
1835 {
1836 actual_fsize -= INTERRUPT_FIXED_SAVE_SIZE;
26845ab8 1837 if (((1L << LINK_POINTER_REGNUM) & reg_saved) != 0)
747fe2d1 1838 actual_fsize -= INTERRUPT_ALL_SAVE_SIZE;
1839 }
1840
1841 /* Cut off any dynamic stack created. */
1842 if (frame_pointer_needed)
1843 emit_move_insn (stack_pointer_rtx, hard_frame_pointer_rtx);
1844
d022cb59 1845 /* Identify all of the saved registers. */
747fe2d1 1846 num_restore = 0;
65b688d7 1847 for (i = 1; i < 32; i++)
747fe2d1 1848 {
1849 if (((1L << i) & reg_saved) != 0)
7014838c 1850 restore_regs[num_restore++] = gen_rtx_REG (Pmode, i);
747fe2d1 1851 }
1852
747fe2d1 1853 /* See if we have an insn that restores the particular registers we
1854 want to. */
1855 restore_all = NULL_RTX;
65b688d7 1856
d022cb59 1857 if (TARGET_PROLOG_FUNCTION
1858 && num_restore > 0
85a79c1e 1859 && !crtl->args.pretend_args_size
747fe2d1 1860 && !interrupt_handler)
1861 {
65b688d7 1862 int alloc_stack = (4 * num_restore);
747fe2d1 1863
747fe2d1 1864 /* Don't bother checking if we don't actually save any space. */
65b688d7 1865 if (use_prolog_function (num_restore, actual_fsize))
747fe2d1 1866 {
65b688d7 1867 int offset;
7014838c 1868 restore_all = gen_rtx_PARALLEL (VOIDmode,
1869 rtvec_alloc (num_restore + 2));
1a860023 1870 XVECEXP (restore_all, 0, 0) = ret_rtx;
747fe2d1 1871 XVECEXP (restore_all, 0, 1)
d1f9b275 1872 = gen_rtx_SET (stack_pointer_rtx,
1873 gen_rtx_PLUS (Pmode,
1874 stack_pointer_rtx,
1875 GEN_INT (alloc_stack)));
747fe2d1 1876
1877 offset = alloc_stack - 4;
1878 for (i = 0; i < num_restore; i++)
1879 {
1880 XVECEXP (restore_all, 0, i+2)
d1f9b275 1881 = gen_rtx_SET (restore_regs[i],
7014838c 1882 gen_rtx_MEM (Pmode,
65b688d7 1883 gen_rtx_PLUS (Pmode,
1884 stack_pointer_rtx,
1885 GEN_INT(offset))));
747fe2d1 1886 offset -= 4;
1887 }
1888
2571646d 1889 code = recog (restore_all, NULL_RTX, NULL);
d022cb59 1890
747fe2d1 1891 if (code >= 0)
1892 {
1893 rtx insn;
1894
1895 actual_fsize -= alloc_stack;
85a79c1e 1896 increment_stack (actual_fsize, false);
747fe2d1 1897
1898 insn = emit_jump_insn (restore_all);
1899 INSN_CODE (insn) = code;
747fe2d1 1900 }
1901 else
1902 restore_all = NULL_RTX;
1903 }
1904 }
1905
d15353b6 1906 /* If no epilogue save function is available, restore the registers the
d022cb59 1907 old fashioned way (one by one). */
747fe2d1 1908 if (!restore_all)
1909 {
65b688d7 1910 unsigned int init_stack_free;
1911
747fe2d1 1912 /* If the stack is large, we need to cut it down in 2 pieces. */
65b688d7 1913 if (interrupt_handler)
1914 init_stack_free = 0;
1915 else if (actual_fsize && !CONST_OK_FOR_K (-actual_fsize))
747fe2d1 1916 init_stack_free = 4 * num_restore;
1917 else
4c369c58 1918 init_stack_free = (signed) actual_fsize;
747fe2d1 1919
d022cb59 1920 /* Deallocate the rest of the stack if it is > 32K. */
ef51d1e3 1921 if ((unsigned int) actual_fsize > init_stack_free)
85a79c1e 1922 increment_stack (actual_fsize - init_stack_free, false);
747fe2d1 1923
1924 /* Special case interrupt functions that save all registers
1925 for a call. */
26845ab8 1926 if (interrupt_handler && ((1L << LINK_POINTER_REGNUM) & reg_saved) != 0)
1927 {
65b688d7 1928 if (! TARGET_DISABLE_CALLT)
5dd3389c 1929 emit_insn (gen_callt_restore_all_interrupt ());
1930 else
1931 emit_insn (gen_restore_all_interrupt ());
26845ab8 1932 }
747fe2d1 1933 else
1934 {
d022cb59 1935 /* Restore registers from the beginning of the stack frame. */
65b688d7 1936 int offset = init_stack_free - 4;
747fe2d1 1937
1938 /* Restore the return pointer first. */
26845ab8 1939 if (num_restore > 0
1940 && REGNO (restore_regs [num_restore - 1]) == LINK_POINTER_REGNUM)
747fe2d1 1941 {
1942 emit_move_insn (restore_regs[--num_restore],
7014838c 1943 gen_rtx_MEM (SImode,
29c05e22 1944 plus_constant (Pmode,
1945 stack_pointer_rtx,
7014838c 1946 offset)));
747fe2d1 1947 offset -= 4;
1948 }
1949
1950 for (i = 0; i < num_restore; i++)
1951 {
1952 emit_move_insn (restore_regs[i],
7014838c 1953 gen_rtx_MEM (SImode,
29c05e22 1954 plus_constant (Pmode,
1955 stack_pointer_rtx,
7014838c 1956 offset)));
747fe2d1 1957
18b42941 1958 emit_use (restore_regs[i]);
747fe2d1 1959 offset -= 4;
1960 }
1961
1962 /* Cut back the remainder of the stack. */
85a79c1e 1963 increment_stack (init_stack_free + crtl->args.pretend_args_size,
1964 false);
747fe2d1 1965 }
1966
1967 /* And return or use reti for interrupt handlers. */
1968 if (interrupt_handler)
5dd3389c 1969 {
9a5788ea 1970 if (! TARGET_DISABLE_CALLT && (TARGET_V850E_UP))
5dd3389c 1971 emit_insn (gen_callt_return_interrupt ());
1972 else
1973 emit_jump_insn (gen_return_interrupt ());
1974 }
747fe2d1 1975 else if (actual_fsize)
1976 emit_jump_insn (gen_return_internal ());
1977 else
5027f179 1978 emit_jump_insn (gen_return_simple ());
747fe2d1 1979 }
1980
747fe2d1 1981 v850_interrupt_cache_p = FALSE;
1982 v850_interrupt_p = FALSE;
1983}
1984
747fe2d1 1985/* Update the condition code from the insn. */
747fe2d1 1986void
d3ffa7b4 1987notice_update_cc (rtx body, rtx_insn *insn)
747fe2d1 1988{
1989 switch (get_attr_cc (insn))
1990 {
1991 case CC_NONE:
1992 /* Insn does not affect CC at all. */
1993 break;
1994
1995 case CC_NONE_0HIT:
1996 /* Insn does not change CC, but the 0'th operand has been changed. */
1997 if (cc_status.value1 != 0
ed420a25 1998 && reg_overlap_mentioned_p (recog_data.operand[0], cc_status.value1))
747fe2d1 1999 cc_status.value1 = 0;
2000 break;
2001
2002 case CC_SET_ZN:
ed420a25 2003 /* Insn sets the Z,N flags of CC to recog_data.operand[0].
747fe2d1 2004 V,C is in an unusable state. */
2005 CC_STATUS_INIT;
2006 cc_status.flags |= CC_OVERFLOW_UNUSABLE | CC_NO_CARRY;
ed420a25 2007 cc_status.value1 = recog_data.operand[0];
747fe2d1 2008 break;
2009
2010 case CC_SET_ZNV:
ed420a25 2011 /* Insn sets the Z,N,V flags of CC to recog_data.operand[0].
65b688d7 2012 C is in an unusable state. */
747fe2d1 2013 CC_STATUS_INIT;
2014 cc_status.flags |= CC_NO_CARRY;
ed420a25 2015 cc_status.value1 = recog_data.operand[0];
747fe2d1 2016 break;
2017
2018 case CC_COMPARE:
2019 /* The insn is a compare instruction. */
2020 CC_STATUS_INIT;
2021 cc_status.value1 = SET_SRC (body);
2022 break;
2023
2024 case CC_CLOBBER:
2025 /* Insn doesn't leave CC in a usable state. */
2026 CC_STATUS_INIT;
2027 break;
c60e4982 2028
2029 default:
2030 break;
747fe2d1 2031 }
2032}
65b688d7 2033
a821813a 2034/* Retrieve the data area that has been chosen for the given decl. */
747fe2d1 2035
a821813a 2036v850_data_area
39031315 2037v850_get_data_area (tree decl)
a821813a 2038{
e3c541f0 2039 if (lookup_attribute ("sda", DECL_ATTRIBUTES (decl)) != NULL_TREE)
a821813a 2040 return DATA_AREA_SDA;
2041
e3c541f0 2042 if (lookup_attribute ("tda", DECL_ATTRIBUTES (decl)) != NULL_TREE)
a821813a 2043 return DATA_AREA_TDA;
2044
e3c541f0 2045 if (lookup_attribute ("zda", DECL_ATTRIBUTES (decl)) != NULL_TREE)
a821813a 2046 return DATA_AREA_ZDA;
2047
2048 return DATA_AREA_NORMAL;
2049}
747fe2d1 2050
a821813a 2051/* Store the indicated data area in the decl's attributes. */
2052
2053static void
39031315 2054v850_set_data_area (tree decl, v850_data_area data_area)
a821813a 2055{
2056 tree name;
2057
2058 switch (data_area)
2059 {
2060 case DATA_AREA_SDA: name = get_identifier ("sda"); break;
2061 case DATA_AREA_TDA: name = get_identifier ("tda"); break;
2062 case DATA_AREA_ZDA: name = get_identifier ("zda"); break;
2063 default:
2064 return;
2065 }
2066
e3c541f0 2067 DECL_ATTRIBUTES (decl) = tree_cons
2068 (name, NULL, DECL_ATTRIBUTES (decl));
a821813a 2069}
2070\f
e3c541f0 2071/* Handle an "interrupt" attribute; arguments as in
2072 struct attribute_spec.handler. */
2073static tree
39031315 2074v850_handle_interrupt_attribute (tree * node,
2075 tree name,
2076 tree args ATTRIBUTE_UNUSED,
2077 int flags ATTRIBUTE_UNUSED,
2078 bool * no_add_attrs)
e3c541f0 2079{
2080 if (TREE_CODE (*node) != FUNCTION_DECL)
2081 {
67a779df 2082 warning (OPT_Wattributes, "%qE attribute only applies to functions",
2083 name);
e3c541f0 2084 *no_add_attrs = true;
2085 }
2086
2087 return NULL_TREE;
2088}
2089
2090/* Handle a "sda", "tda" or "zda" attribute; arguments as in
2091 struct attribute_spec.handler. */
2092static tree
39031315 2093v850_handle_data_area_attribute (tree* node,
2094 tree name,
2095 tree args ATTRIBUTE_UNUSED,
2096 int flags ATTRIBUTE_UNUSED,
2097 bool * no_add_attrs)
747fe2d1 2098{
a821813a 2099 v850_data_area data_area;
2100 v850_data_area area;
e3c541f0 2101 tree decl = *node;
747fe2d1 2102
a821813a 2103 /* Implement data area attribute. */
e3c541f0 2104 if (is_attribute_p ("sda", name))
a821813a 2105 data_area = DATA_AREA_SDA;
e3c541f0 2106 else if (is_attribute_p ("tda", name))
a821813a 2107 data_area = DATA_AREA_TDA;
e3c541f0 2108 else if (is_attribute_p ("zda", name))
a821813a 2109 data_area = DATA_AREA_ZDA;
2110 else
9623efd7 2111 gcc_unreachable ();
a821813a 2112
2113 switch (TREE_CODE (decl))
2114 {
2115 case VAR_DECL:
2116 if (current_function_decl != NULL_TREE)
e3c541f0 2117 {
712d2297 2118 error_at (DECL_SOURCE_LOCATION (decl),
2119 "data area attributes cannot be specified for "
2120 "local variables");
e3c541f0 2121 *no_add_attrs = true;
2122 }
2123
a821813a 2124 /* Drop through. */
2125
2126 case FUNCTION_DECL:
2127 area = v850_get_data_area (decl);
2128 if (area != DATA_AREA_NORMAL && data_area != area)
e3c541f0 2129 {
3cf8b391 2130 error ("data area of %q+D conflicts with previous declaration",
2131 decl);
e3c541f0 2132 *no_add_attrs = true;
2133 }
2134 break;
a821813a 2135
2136 default:
2137 break;
2138 }
e3c541f0 2139
2140 return NULL_TREE;
747fe2d1 2141}
2142
2143\f
2144/* Return nonzero if FUNC is an interrupt function as specified
2145 by the "interrupt" attribute. */
2146
2147int
39031315 2148v850_interrupt_function_p (tree func)
747fe2d1 2149{
2150 tree a;
2151 int ret = 0;
2152
2153 if (v850_interrupt_cache_p)
2154 return v850_interrupt_p;
2155
2156 if (TREE_CODE (func) != FUNCTION_DECL)
2157 return 0;
2158
e3c541f0 2159 a = lookup_attribute ("interrupt_handler", DECL_ATTRIBUTES (func));
747fe2d1 2160 if (a != NULL_TREE)
2161 ret = 1;
2162
2163 else
2164 {
e3c541f0 2165 a = lookup_attribute ("interrupt", DECL_ATTRIBUTES (func));
747fe2d1 2166 ret = a != NULL_TREE;
2167 }
2168
2169 /* Its not safe to trust global variables until after function inlining has
2170 been done. */
2171 if (reload_completed | reload_in_progress)
2172 v850_interrupt_p = ret;
2173
2174 return ret;
2175}
2176
2177\f
7811991d 2178static void
39031315 2179v850_encode_data_area (tree decl, rtx symbol)
747fe2d1 2180{
91efe10c 2181 int flags;
a821813a 2182
efee20da 2183 /* Map explicit sections into the appropriate attribute */
a821813a 2184 if (v850_get_data_area (decl) == DATA_AREA_NORMAL)
2185 {
2186 if (DECL_SECTION_NAME (decl))
2187 {
738a6bda 2188 const char *name = DECL_SECTION_NAME (decl);
a821813a 2189
2190 if (streq (name, ".zdata") || streq (name, ".zbss"))
2191 v850_set_data_area (decl, DATA_AREA_ZDA);
2192
2193 else if (streq (name, ".sdata") || streq (name, ".sbss"))
2194 v850_set_data_area (decl, DATA_AREA_SDA);
2195
2196 else if (streq (name, ".tdata"))
2197 v850_set_data_area (decl, DATA_AREA_TDA);
2198 }
2199
2200 /* If no attribute, support -m{zda,sda,tda}=n */
2201 else
2202 {
2203 int size = int_size_in_bytes (TREE_TYPE (decl));
2204 if (size <= 0)
2205 ;
2206
34491a51 2207 else if (size <= small_memory_max [(int) SMALL_MEMORY_TDA])
a821813a 2208 v850_set_data_area (decl, DATA_AREA_TDA);
2209
34491a51 2210 else if (size <= small_memory_max [(int) SMALL_MEMORY_SDA])
a821813a 2211 v850_set_data_area (decl, DATA_AREA_SDA);
2212
34491a51 2213 else if (size <= small_memory_max [(int) SMALL_MEMORY_ZDA])
a821813a 2214 v850_set_data_area (decl, DATA_AREA_ZDA);
2215 }
2216
2217 if (v850_get_data_area (decl) == DATA_AREA_NORMAL)
2218 return;
2219 }
2220
91efe10c 2221 flags = SYMBOL_REF_FLAGS (symbol);
a821813a 2222 switch (v850_get_data_area (decl))
2223 {
91efe10c 2224 case DATA_AREA_ZDA: flags |= SYMBOL_FLAG_ZDA; break;
2225 case DATA_AREA_TDA: flags |= SYMBOL_FLAG_TDA; break;
2226 case DATA_AREA_SDA: flags |= SYMBOL_FLAG_SDA; break;
9623efd7 2227 default: gcc_unreachable ();
a821813a 2228 }
91efe10c 2229 SYMBOL_REF_FLAGS (symbol) = flags;
747fe2d1 2230}
65c7acad 2231
7811991d 2232static void
39031315 2233v850_encode_section_info (tree decl, rtx rtl, int first)
7811991d 2234{
2c129d70 2235 default_encode_section_info (decl, rtl, first);
91efe10c 2236
2237 if (TREE_CODE (decl) == VAR_DECL
7811991d 2238 && (TREE_STATIC (decl) || DECL_EXTERNAL (decl)))
2c129d70 2239 v850_encode_data_area (decl, XEXP (rtl, 0));
7811991d 2240}
2241
65c7acad 2242/* Construct a JR instruction to a routine that will perform the equivalent of
2243 the RTL passed in as an argument. This RTL is a function epilogue that
2244 pops registers off the stack and possibly releases some extra stack space
2245 as well. The code has already verified that the RTL matches these
2246 requirements. */
65b688d7 2247
65c7acad 2248char *
39031315 2249construct_restore_jr (rtx op)
65c7acad 2250{
2251 int count = XVECLEN (op, 0);
2252 int stack_bytes;
2253 unsigned long int mask;
2254 unsigned long int first;
2255 unsigned long int last;
2256 int i;
2257 static char buff [100]; /* XXX */
2258
2259 if (count <= 2)
2260 {
0a81f5a0 2261 error ("bogus JR construction: %d", count);
65c7acad 2262 return NULL;
2263 }
2264
2265 /* Work out how many bytes to pop off the stack before retrieving
2266 registers. */
9623efd7 2267 gcc_assert (GET_CODE (XVECEXP (op, 0, 1)) == SET);
2268 gcc_assert (GET_CODE (SET_SRC (XVECEXP (op, 0, 1))) == PLUS);
2269 gcc_assert (GET_CODE (XEXP (SET_SRC (XVECEXP (op, 0, 1)), 1)) == CONST_INT);
65c7acad 2270
2271 stack_bytes = INTVAL (XEXP (SET_SRC (XVECEXP (op, 0, 1)), 1));
2272
df978151 2273 /* Each pop will remove 4 bytes from the stack.... */
65c7acad 2274 stack_bytes -= (count - 2) * 4;
2275
2276 /* Make sure that the amount we are popping either 0 or 16 bytes. */
65b688d7 2277 if (stack_bytes != 0)
65c7acad 2278 {
68435912 2279 error ("bad amount of stack space removal: %d", stack_bytes);
65c7acad 2280 return NULL;
2281 }
2282
2283 /* Now compute the bit mask of registers to push. */
2284 mask = 0;
2285 for (i = 2; i < count; i++)
2286 {
2287 rtx vector_element = XVECEXP (op, 0, i);
2288
9623efd7 2289 gcc_assert (GET_CODE (vector_element) == SET);
2290 gcc_assert (GET_CODE (SET_DEST (vector_element)) == REG);
2291 gcc_assert (register_is_ok_for_epilogue (SET_DEST (vector_element),
2292 SImode));
65c7acad 2293
2294 mask |= 1 << REGNO (SET_DEST (vector_element));
2295 }
2296
2297 /* Scan for the first register to pop. */
2298 for (first = 0; first < 32; first++)
2299 {
2300 if (mask & (1 << first))
2301 break;
2302 }
2303
9623efd7 2304 gcc_assert (first < 32);
65c7acad 2305
2306 /* Discover the last register to pop. */
26845ab8 2307 if (mask & (1 << LINK_POINTER_REGNUM))
65c7acad 2308 {
26845ab8 2309 last = LINK_POINTER_REGNUM;
65c7acad 2310 }
2311 else
2312 {
9623efd7 2313 gcc_assert (!stack_bytes);
2314 gcc_assert (mask & (1 << 29));
65c7acad 2315
2316 last = 29;
2317 }
2318
a59e9a3a 2319 /* Note, it is possible to have gaps in the register mask.
2320 We ignore this here, and generate a JR anyway. We will
a821813a 2321 be popping more registers than is strictly necessary, but
a59e9a3a 2322 it does save code space. */
2323
79d5927f 2324 if (TARGET_LONG_CALLS)
2325 {
2326 char name[40];
2327
2328 if (first == last)
2329 sprintf (name, "__return_%s", reg_names [first]);
2330 else
2331 sprintf (name, "__return_%s_%s", reg_names [first], reg_names [last]);
2332
2333 sprintf (buff, "movhi hi(%s), r0, r6\n\tmovea lo(%s), r6, r6\n\tjmp r6",
2334 name, name);
2335 }
65c7acad 2336 else
79d5927f 2337 {
2338 if (first == last)
2339 sprintf (buff, "jr __return_%s", reg_names [first]);
2340 else
2341 sprintf (buff, "jr __return_%s_%s", reg_names [first], reg_names [last]);
2342 }
2343
65c7acad 2344 return buff;
2345}
2346
2347
65c7acad 2348/* Construct a JARL instruction to a routine that will perform the equivalent
2349 of the RTL passed as a parameter. This RTL is a function prologue that
2350 saves some of the registers r20 - r31 onto the stack, and possibly acquires
2351 some stack space as well. The code has already verified that the RTL
2352 matches these requirements. */
2353char *
39031315 2354construct_save_jarl (rtx op)
65c7acad 2355{
2356 int count = XVECLEN (op, 0);
2357 int stack_bytes;
2358 unsigned long int mask;
2359 unsigned long int first;
2360 unsigned long int last;
2361 int i;
2362 static char buff [100]; /* XXX */
2363
65b688d7 2364 if (count <= (TARGET_LONG_CALLS ? 3 : 2))
65c7acad 2365 {
bf776685 2366 error ("bogus JARL construction: %d", count);
65c7acad 2367 return NULL;
2368 }
2369
2370 /* Paranoia. */
9623efd7 2371 gcc_assert (GET_CODE (XVECEXP (op, 0, 0)) == SET);
2372 gcc_assert (GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) == PLUS);
2373 gcc_assert (GET_CODE (XEXP (SET_SRC (XVECEXP (op, 0, 0)), 0)) == REG);
2374 gcc_assert (GET_CODE (XEXP (SET_SRC (XVECEXP (op, 0, 0)), 1)) == CONST_INT);
65c7acad 2375
2376 /* Work out how many bytes to push onto the stack after storing the
2377 registers. */
2378 stack_bytes = INTVAL (XEXP (SET_SRC (XVECEXP (op, 0, 0)), 1));
2379
df978151 2380 /* Each push will put 4 bytes from the stack.... */
a184c07b 2381 stack_bytes += (count - (TARGET_LONG_CALLS ? 3 : 2)) * 4;
65c7acad 2382
2383 /* Make sure that the amount we are popping either 0 or 16 bytes. */
65b688d7 2384 if (stack_bytes != 0)
65c7acad 2385 {
68435912 2386 error ("bad amount of stack space removal: %d", stack_bytes);
65c7acad 2387 return NULL;
2388 }
2389
2390 /* Now compute the bit mask of registers to push. */
2391 mask = 0;
a184c07b 2392 for (i = 1; i < count - (TARGET_LONG_CALLS ? 2 : 1); i++)
65c7acad 2393 {
2394 rtx vector_element = XVECEXP (op, 0, i);
2395
9623efd7 2396 gcc_assert (GET_CODE (vector_element) == SET);
2397 gcc_assert (GET_CODE (SET_SRC (vector_element)) == REG);
2398 gcc_assert (register_is_ok_for_epilogue (SET_SRC (vector_element),
2399 SImode));
65c7acad 2400
2401 mask |= 1 << REGNO (SET_SRC (vector_element));
2402 }
2403
2404 /* Scan for the first register to push. */
2405 for (first = 0; first < 32; first++)
2406 {
2407 if (mask & (1 << first))
2408 break;
2409 }
2410
9623efd7 2411 gcc_assert (first < 32);
65c7acad 2412
2413 /* Discover the last register to push. */
26845ab8 2414 if (mask & (1 << LINK_POINTER_REGNUM))
65c7acad 2415 {
26845ab8 2416 last = LINK_POINTER_REGNUM;
65c7acad 2417 }
2418 else
2419 {
9623efd7 2420 gcc_assert (!stack_bytes);
2421 gcc_assert (mask & (1 << 29));
65c7acad 2422
2423 last = 29;
2424 }
2425
a59e9a3a 2426 /* Note, it is possible to have gaps in the register mask.
2427 We ignore this here, and generate a JARL anyway. We will
a821813a 2428 be pushing more registers than is strictly necessary, but
a59e9a3a 2429 it does save code space. */
2430
79d5927f 2431 if (TARGET_LONG_CALLS)
2432 {
2433 char name[40];
2434
2435 if (first == last)
2436 sprintf (name, "__save_%s", reg_names [first]);
2437 else
2438 sprintf (name, "__save_%s_%s", reg_names [first], reg_names [last]);
2439
9a5788ea 2440 if (TARGET_V850E3V5_UP)
2441 sprintf (buff, "mov hilo(%s), r11\n\tjarl [r11], r10", name);
2442 else
2443 sprintf (buff, "movhi hi(%s), r0, r11\n\tmovea lo(%s), r11, r11\n\tjarl .+4, r10\n\tadd 4, r10\n\tjmp r11",
2444 name, name);
79d5927f 2445 }
65c7acad 2446 else
79d5927f 2447 {
2448 if (first == last)
2449 sprintf (buff, "jarl __save_%s, r10", reg_names [first]);
2450 else
2451 sprintf (buff, "jarl __save_%s_%s, r10", reg_names [first],
2452 reg_names [last]);
2453 }
65c7acad 2454
2455 return buff;
2456}
2457
a821813a 2458/* A version of asm_output_aligned_bss() that copes with the special
df978151 2459 data areas of the v850. */
a821813a 2460void
39031315 2461v850_output_aligned_bss (FILE * file,
2462 tree decl,
2463 const char * name,
7781aa77 2464 unsigned HOST_WIDE_INT size,
39031315 2465 int align)
a821813a 2466{
a821813a 2467 switch (v850_get_data_area (decl))
2468 {
2469 case DATA_AREA_ZDA:
2f14b1f9 2470 switch_to_section (zbss_section);
a821813a 2471 break;
2472
2473 case DATA_AREA_SDA:
2f14b1f9 2474 switch_to_section (sbss_section);
a821813a 2475 break;
2476
2477 case DATA_AREA_TDA:
2f14b1f9 2478 switch_to_section (tdata_section);
a821813a 2479
2480 default:
2f14b1f9 2481 switch_to_section (bss_section);
a821813a 2482 break;
2483 }
2484
2485 ASM_OUTPUT_ALIGN (file, floor_log2 (align / BITS_PER_UNIT));
2486#ifdef ASM_DECLARE_OBJECT_NAME
2487 last_assemble_variable_decl = decl;
2488 ASM_DECLARE_OBJECT_NAME (file, name, decl);
2489#else
2490 /* Standard thing is just output label for the object. */
2491 ASM_OUTPUT_LABEL (file, name);
2492#endif /* ASM_DECLARE_OBJECT_NAME */
2493 ASM_OUTPUT_SKIP (file, size ? size : 1);
2494}
2495
2496/* Called via the macro ASM_OUTPUT_DECL_COMMON */
2497void
39031315 2498v850_output_common (FILE * file,
2499 tree decl,
2500 const char * name,
2501 int size,
2502 int align)
a821813a 2503{
2504 if (decl == NULL_TREE)
2505 {
0068dfb2 2506 fprintf (file, "%s", COMMON_ASM_OP);
a821813a 2507 }
2508 else
2509 {
2510 switch (v850_get_data_area (decl))
2511 {
2512 case DATA_AREA_ZDA:
0068dfb2 2513 fprintf (file, "%s", ZCOMMON_ASM_OP);
a821813a 2514 break;
2515
2516 case DATA_AREA_SDA:
0068dfb2 2517 fprintf (file, "%s", SCOMMON_ASM_OP);
a821813a 2518 break;
2519
2520 case DATA_AREA_TDA:
0068dfb2 2521 fprintf (file, "%s", TCOMMON_ASM_OP);
a821813a 2522 break;
2523
2524 default:
0068dfb2 2525 fprintf (file, "%s", COMMON_ASM_OP);
a821813a 2526 break;
2527 }
2528 }
2529
2530 assemble_name (file, name);
2531 fprintf (file, ",%u,%u\n", size, align / BITS_PER_UNIT);
2532}
2533
2534/* Called via the macro ASM_OUTPUT_DECL_LOCAL */
2535void
39031315 2536v850_output_local (FILE * file,
2537 tree decl,
2538 const char * name,
2539 int size,
2540 int align)
a821813a 2541{
0068dfb2 2542 fprintf (file, "%s", LOCAL_ASM_OP);
a821813a 2543 assemble_name (file, name);
2544 fprintf (file, "\n");
2545
2546 ASM_OUTPUT_ALIGNED_DECL_COMMON (file, decl, name, size, align);
2547}
a821813a 2548
2549/* Add data area to the given declaration if a ghs data area pragma is
2550 currently in effect (#pragma ghs startXXX/endXXX). */
8ee295a7 2551static void
39031315 2552v850_insert_attributes (tree decl, tree * attr_ptr ATTRIBUTE_UNUSED )
a821813a 2553{
2554 if (data_area_stack
2555 && data_area_stack->data_area
2556 && current_function_decl == NULL_TREE
2557 && (TREE_CODE (decl) == VAR_DECL || TREE_CODE (decl) == CONST_DECL)
2558 && v850_get_data_area (decl) == DATA_AREA_NORMAL)
2559 v850_set_data_area (decl, data_area_stack->data_area);
2560
457275b6 2561 /* Initialize the default names of the v850 specific sections,
a821813a 2562 if this has not been done before. */
2563
2564 if (GHS_default_section_names [(int) GHS_SECTION_KIND_SDATA] == NULL)
2565 {
2566 GHS_default_section_names [(int) GHS_SECTION_KIND_SDATA]
d88fa80d 2567 = ".sdata";
a821813a 2568
2569 GHS_default_section_names [(int) GHS_SECTION_KIND_ROSDATA]
d88fa80d 2570 = ".rosdata";
a821813a 2571
2572 GHS_default_section_names [(int) GHS_SECTION_KIND_TDATA]
d88fa80d 2573 = ".tdata";
a821813a 2574
2575 GHS_default_section_names [(int) GHS_SECTION_KIND_ZDATA]
d88fa80d 2576 = ".zdata";
a821813a 2577
2578 GHS_default_section_names [(int) GHS_SECTION_KIND_ROZDATA]
d88fa80d 2579 = ".rozdata";
a821813a 2580 }
2581
2582 if (current_function_decl == NULL_TREE
2583 && (TREE_CODE (decl) == VAR_DECL
2584 || TREE_CODE (decl) == CONST_DECL
2585 || TREE_CODE (decl) == FUNCTION_DECL)
2586 && (!DECL_EXTERNAL (decl) || DECL_INITIAL (decl))
2587 && !DECL_SECTION_NAME (decl))
2588 {
2589 enum GHS_section_kind kind = GHS_SECTION_KIND_DEFAULT;
d88fa80d 2590 const char * chosen_section;
a821813a 2591
2592 if (TREE_CODE (decl) == FUNCTION_DECL)
2593 kind = GHS_SECTION_KIND_TEXT;
2594 else
2595 {
df978151 2596 /* First choose a section kind based on the data area of the decl. */
a821813a 2597 switch (v850_get_data_area (decl))
2598 {
2599 default:
9623efd7 2600 gcc_unreachable ();
a821813a 2601
2602 case DATA_AREA_SDA:
2603 kind = ((TREE_READONLY (decl))
2604 ? GHS_SECTION_KIND_ROSDATA
2605 : GHS_SECTION_KIND_SDATA);
2606 break;
2607
2608 case DATA_AREA_TDA:
2609 kind = GHS_SECTION_KIND_TDATA;
2610 break;
2611
2612 case DATA_AREA_ZDA:
2613 kind = ((TREE_READONLY (decl))
2614 ? GHS_SECTION_KIND_ROZDATA
2615 : GHS_SECTION_KIND_ZDATA);
2616 break;
2617
2618 case DATA_AREA_NORMAL: /* default data area */
2619 if (TREE_READONLY (decl))
2620 kind = GHS_SECTION_KIND_RODATA;
2621 else if (DECL_INITIAL (decl))
2622 kind = GHS_SECTION_KIND_DATA;
2623 else
2624 kind = GHS_SECTION_KIND_BSS;
2625 }
2626 }
2627
2628 /* Now, if the section kind has been explicitly renamed,
df978151 2629 then attach a section attribute. */
a821813a 2630 chosen_section = GHS_current_section_names [(int) kind];
2631
2632 /* Otherwise, if this kind of section needs an explicit section
df978151 2633 attribute, then also attach one. */
a821813a 2634 if (chosen_section == NULL)
2635 chosen_section = GHS_default_section_names [(int) kind];
2636
2637 if (chosen_section)
2638 {
2639 /* Only set the section name if specified by a pragma, because
2640 otherwise it will force those variables to get allocated storage
2641 in this module, rather than by the linker. */
71e19e54 2642 set_decl_section_name (decl, chosen_section);
a821813a 2643 }
2644 }
2645}
5dd3389c 2646
5dd3389c 2647/* Construct a DISPOSE instruction that is the equivalent of
2648 the given RTX. We have already verified that this should
2649 be possible. */
2650
2651char *
39031315 2652construct_dispose_instruction (rtx op)
5dd3389c 2653{
2654 int count = XVECLEN (op, 0);
2655 int stack_bytes;
2656 unsigned long int mask;
2657 int i;
2658 static char buff[ 100 ]; /* XXX */
2659 int use_callt = 0;
2660
2661 if (count <= 2)
2662 {
0a81f5a0 2663 error ("bogus DISPOSE construction: %d", count);
5dd3389c 2664 return NULL;
2665 }
2666
2667 /* Work out how many bytes to pop off the
2668 stack before retrieving registers. */
9623efd7 2669 gcc_assert (GET_CODE (XVECEXP (op, 0, 1)) == SET);
2670 gcc_assert (GET_CODE (SET_SRC (XVECEXP (op, 0, 1))) == PLUS);
2671 gcc_assert (GET_CODE (XEXP (SET_SRC (XVECEXP (op, 0, 1)), 1)) == CONST_INT);
5dd3389c 2672
2673 stack_bytes = INTVAL (XEXP (SET_SRC (XVECEXP (op, 0, 1)), 1));
2674
df978151 2675 /* Each pop will remove 4 bytes from the stack.... */
5dd3389c 2676 stack_bytes -= (count - 2) * 4;
2677
2678 /* Make sure that the amount we are popping
2679 will fit into the DISPOSE instruction. */
2680 if (stack_bytes > 128)
2681 {
0a81f5a0 2682 error ("too much stack space to dispose of: %d", stack_bytes);
5dd3389c 2683 return NULL;
2684 }
2685
2686 /* Now compute the bit mask of registers to push. */
2687 mask = 0;
2688
2689 for (i = 2; i < count; i++)
2690 {
2691 rtx vector_element = XVECEXP (op, 0, i);
2692
9623efd7 2693 gcc_assert (GET_CODE (vector_element) == SET);
2694 gcc_assert (GET_CODE (SET_DEST (vector_element)) == REG);
2695 gcc_assert (register_is_ok_for_epilogue (SET_DEST (vector_element),
2696 SImode));
5dd3389c 2697
2698 if (REGNO (SET_DEST (vector_element)) == 2)
2699 use_callt = 1;
2700 else
2701 mask |= 1 << REGNO (SET_DEST (vector_element));
2702 }
2703
2704 if (! TARGET_DISABLE_CALLT
65b688d7 2705 && (use_callt || stack_bytes == 0))
5dd3389c 2706 {
2707 if (use_callt)
2708 {
2709 sprintf (buff, "callt ctoff(__callt_return_r2_r%d)", (mask & (1 << 31)) ? 31 : 29);
2710 return buff;
2711 }
2712 else
2713 {
2714 for (i = 20; i < 32; i++)
2715 if (mask & (1 << i))
2716 break;
2717
2718 if (i == 31)
2719 sprintf (buff, "callt ctoff(__callt_return_r31c)");
2720 else
65b688d7 2721 sprintf (buff, "callt ctoff(__callt_return_r%d_r%s)",
2722 i, (mask & (1 << 31)) ? "31c" : "29");
5dd3389c 2723 }
2724 }
2725 else
2726 {
2727 static char regs [100]; /* XXX */
2728 int done_one;
2729
2730 /* Generate the DISPOSE instruction. Note we could just issue the
2731 bit mask as a number as the assembler can cope with this, but for
2732 the sake of our readers we turn it into a textual description. */
2733 regs[0] = 0;
2734 done_one = 0;
2735
2736 for (i = 20; i < 32; i++)
2737 {
2738 if (mask & (1 << i))
2739 {
2740 int first;
2741
2742 if (done_one)
2743 strcat (regs, ", ");
2744 else
2745 done_one = 1;
2746
2747 first = i;
2748 strcat (regs, reg_names[ first ]);
2749
2750 for (i++; i < 32; i++)
2751 if ((mask & (1 << i)) == 0)
2752 break;
2753
2754 if (i > first + 1)
2755 {
2756 strcat (regs, " - ");
2757 strcat (regs, reg_names[ i - 1 ] );
2758 }
2759 }
2760 }
2761
2762 sprintf (buff, "dispose %d {%s}, r31", stack_bytes / 4, regs);
2763 }
2764
2765 return buff;
2766}
2767
5dd3389c 2768/* Construct a PREPARE instruction that is the equivalent of
2769 the given RTL. We have already verified that this should
2770 be possible. */
2771
2772char *
39031315 2773construct_prepare_instruction (rtx op)
5dd3389c 2774{
65b688d7 2775 int count;
5dd3389c 2776 int stack_bytes;
2777 unsigned long int mask;
2778 int i;
2779 static char buff[ 100 ]; /* XXX */
2780 int use_callt = 0;
2781
65b688d7 2782 if (XVECLEN (op, 0) <= 1)
5dd3389c 2783 {
65b688d7 2784 error ("bogus PREPEARE construction: %d", XVECLEN (op, 0));
5dd3389c 2785 return NULL;
2786 }
2787
2788 /* Work out how many bytes to push onto
2789 the stack after storing the registers. */
9623efd7 2790 gcc_assert (GET_CODE (XVECEXP (op, 0, 0)) == SET);
2791 gcc_assert (GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) == PLUS);
2792 gcc_assert (GET_CODE (XEXP (SET_SRC (XVECEXP (op, 0, 0)), 1)) == CONST_INT);
5dd3389c 2793
2794 stack_bytes = INTVAL (XEXP (SET_SRC (XVECEXP (op, 0, 0)), 1));
2795
5dd3389c 2796
2797 /* Make sure that the amount we are popping
2798 will fit into the DISPOSE instruction. */
2799 if (stack_bytes < -128)
2800 {
0a81f5a0 2801 error ("too much stack space to prepare: %d", stack_bytes);
5dd3389c 2802 return NULL;
2803 }
2804
2805 /* Now compute the bit mask of registers to push. */
65b688d7 2806 count = 0;
5dd3389c 2807 mask = 0;
65b688d7 2808 for (i = 1; i < XVECLEN (op, 0); i++)
5dd3389c 2809 {
2810 rtx vector_element = XVECEXP (op, 0, i);
2811
65b688d7 2812 if (GET_CODE (vector_element) == CLOBBER)
2813 continue;
2814
9623efd7 2815 gcc_assert (GET_CODE (vector_element) == SET);
2816 gcc_assert (GET_CODE (SET_SRC (vector_element)) == REG);
2817 gcc_assert (register_is_ok_for_epilogue (SET_SRC (vector_element),
2818 SImode));
5dd3389c 2819
2820 if (REGNO (SET_SRC (vector_element)) == 2)
2821 use_callt = 1;
2822 else
2823 mask |= 1 << REGNO (SET_SRC (vector_element));
65b688d7 2824 count++;
5dd3389c 2825 }
2826
65b688d7 2827 stack_bytes += count * 4;
2828
5dd3389c 2829 if ((! TARGET_DISABLE_CALLT)
65b688d7 2830 && (use_callt || stack_bytes == 0))
5dd3389c 2831 {
2832 if (use_callt)
2833 {
2834 sprintf (buff, "callt ctoff(__callt_save_r2_r%d)", (mask & (1 << 31)) ? 31 : 29 );
2835 return buff;
2836 }
2837
2838 for (i = 20; i < 32; i++)
2839 if (mask & (1 << i))
2840 break;
2841
2842 if (i == 31)
2843 sprintf (buff, "callt ctoff(__callt_save_r31c)");
2844 else
65b688d7 2845 sprintf (buff, "callt ctoff(__callt_save_r%d_r%s)",
2846 i, (mask & (1 << 31)) ? "31c" : "29");
5dd3389c 2847 }
2848 else
2849 {
2850 static char regs [100]; /* XXX */
2851 int done_one;
2852
2853
2854 /* Generate the PREPARE instruction. Note we could just issue the
2855 bit mask as a number as the assembler can cope with this, but for
2856 the sake of our readers we turn it into a textual description. */
2857 regs[0] = 0;
2858 done_one = 0;
2859
2860 for (i = 20; i < 32; i++)
2861 {
2862 if (mask & (1 << i))
2863 {
2864 int first;
2865
2866 if (done_one)
2867 strcat (regs, ", ");
2868 else
2869 done_one = 1;
2870
2871 first = i;
2872 strcat (regs, reg_names[ first ]);
2873
2874 for (i++; i < 32; i++)
2875 if ((mask & (1 << i)) == 0)
2876 break;
2877
2878 if (i > first + 1)
2879 {
2880 strcat (regs, " - ");
2881 strcat (regs, reg_names[ i - 1 ] );
2882 }
2883 }
2884 }
2885
2886 sprintf (buff, "prepare {%s}, %d", regs, (- stack_bytes) / 4);
2887 }
2888
2889 return buff;
2890}
65b688d7 2891
3756cb89 2892/* Return an RTX indicating where the return address to the
2893 calling function can be found. */
2894
2895rtx
39031315 2896v850_return_addr (int count)
3756cb89 2897{
2898 if (count != 0)
2899 return const0_rtx;
2900
01d08833 2901 return get_hard_reg_initial_val (Pmode, LINK_POINTER_REGNUM);
3756cb89 2902}
52470889 2903\f
2f14b1f9 2904/* Implement TARGET_ASM_INIT_SECTIONS. */
2905
52470889 2906static void
2f14b1f9 2907v850_asm_init_sections (void)
2908{
2909 rosdata_section
2910 = get_unnamed_section (0, output_section_asm_op,
2911 "\t.section .rosdata,\"a\"");
2912
2913 rozdata_section
2914 = get_unnamed_section (0, output_section_asm_op,
2915 "\t.section .rozdata,\"a\"");
2916
2917 tdata_section
2918 = get_unnamed_section (SECTION_WRITE, output_section_asm_op,
2919 "\t.section .tdata,\"aw\"");
2920
2921 zdata_section
2922 = get_unnamed_section (SECTION_WRITE, output_section_asm_op,
2923 "\t.section .zdata,\"aw\"");
2924
2925 zbss_section
2926 = get_unnamed_section (SECTION_WRITE | SECTION_BSS,
2927 output_section_asm_op,
2928 "\t.section .zbss,\"aw\"");
2929}
2930
2931static section *
39031315 2932v850_select_section (tree exp,
2933 int reloc ATTRIBUTE_UNUSED,
2934 unsigned HOST_WIDE_INT align ATTRIBUTE_UNUSED)
52470889 2935{
2936 if (TREE_CODE (exp) == VAR_DECL)
2937 {
2938 int is_const;
2939 if (!TREE_READONLY (exp)
2940 || TREE_SIDE_EFFECTS (exp)
2941 || !DECL_INITIAL (exp)
2942 || (DECL_INITIAL (exp) != error_mark_node
2943 && !TREE_CONSTANT (DECL_INITIAL (exp))))
2944 is_const = FALSE;
2945 else
2946 is_const = TRUE;
2947
2948 switch (v850_get_data_area (exp))
2949 {
2950 case DATA_AREA_ZDA:
2f14b1f9 2951 return is_const ? rozdata_section : zdata_section;
52470889 2952
2953 case DATA_AREA_TDA:
2f14b1f9 2954 return tdata_section;
52470889 2955
2956 case DATA_AREA_SDA:
2f14b1f9 2957 return is_const ? rosdata_section : sdata_section;
52470889 2958
2959 default:
2f14b1f9 2960 return is_const ? readonly_data_section : data_section;
52470889 2961 }
2962 }
2f14b1f9 2963 return readonly_data_section;
52470889 2964}
6aa67e60 2965\f
c60e4982 2966/* Worker function for TARGET_FUNCTION_VALUE_REGNO_P. */
2967
2968static bool
2969v850_function_value_regno_p (const unsigned int regno)
2970{
be3783f2 2971 return (regno == RV_REGNUM);
c60e4982 2972}
2973
6aa67e60 2974/* Worker function for TARGET_RETURN_IN_MEMORY. */
2975
2976static bool
fb80456a 2977v850_return_in_memory (const_tree type, const_tree fntype ATTRIBUTE_UNUSED)
6aa67e60 2978{
2979 /* Return values > 8 bytes in length in memory. */
85a79c1e 2980 return int_size_in_bytes (type) > 8
2981 || TYPE_MODE (type) == BLKmode
2982 /* With the rh850 ABI return all aggregates in memory. */
2983 || ((! TARGET_GCC_ABI) && AGGREGATE_TYPE_P (type))
2984 ;
6aa67e60 2985}
105c31a7 2986
2987/* Worker function for TARGET_FUNCTION_VALUE. */
2988
c60e4982 2989static rtx
105c31a7 2990v850_function_value (const_tree valtype,
2991 const_tree fn_decl_or_type ATTRIBUTE_UNUSED,
2992 bool outgoing ATTRIBUTE_UNUSED)
2993{
be3783f2 2994 return gen_rtx_REG (TYPE_MODE (valtype), RV_REGNUM);
2995}
2996
2997/* Implement TARGET_LIBCALL_VALUE. */
2998
2999static rtx
3000v850_libcall_value (machine_mode mode,
3001 const_rtx func ATTRIBUTE_UNUSED)
3002{
3003 return gen_rtx_REG (mode, RV_REGNUM);
105c31a7 3004}
3005
6aa67e60 3006\f
cd90919d 3007/* Worker function for TARGET_CAN_ELIMINATE. */
3008
12b3af25 3009static bool
cd90919d 3010v850_can_eliminate (const int from ATTRIBUTE_UNUSED, const int to)
3011{
3012 return (to == STACK_POINTER_REGNUM ? ! frame_pointer_needed : true);
3013}
3014
b2d7ede1 3015/* Worker function for TARGET_CONDITIONAL_REGISTER_USAGE.
3016
3017 If TARGET_APP_REGS is not defined then add r2 and r5 to
3018 the pool of fixed registers. See PR 14505. */
3019
3020static void
3021v850_conditional_register_usage (void)
3022{
3023 if (TARGET_APP_REGS)
3024 {
3025 fixed_regs[2] = 0; call_used_regs[2] = 0;
3026 fixed_regs[5] = 0; call_used_regs[5] = 1;
3027 }
3028}
12b3af25 3029\f
3030/* Worker function for TARGET_ASM_TRAMPOLINE_TEMPLATE. */
3031
3032static void
3033v850_asm_trampoline_template (FILE *f)
3034{
3035 fprintf (f, "\tjarl .+4,r12\n");
3036 fprintf (f, "\tld.w 12[r12],r20\n");
3037 fprintf (f, "\tld.w 16[r12],r12\n");
3038 fprintf (f, "\tjmp [r12]\n");
3039 fprintf (f, "\tnop\n");
3040 fprintf (f, "\t.long 0\n");
3041 fprintf (f, "\t.long 0\n");
3042}
3043
3044/* Worker function for TARGET_TRAMPOLINE_INIT. */
3045
3046static void
3047v850_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value)
3048{
3049 rtx mem, fnaddr = XEXP (DECL_RTL (fndecl), 0);
3050
3051 emit_block_move (m_tramp, assemble_trampoline_template (),
3052 GEN_INT (TRAMPOLINE_SIZE), BLOCK_OP_NORMAL);
3053
3054 mem = adjust_address (m_tramp, SImode, 16);
3055 emit_move_insn (mem, chain_value);
3056 mem = adjust_address (m_tramp, SImode, 20);
3057 emit_move_insn (mem, fnaddr);
3058}
65b688d7 3059
3060static int
3061v850_issue_rate (void)
3062{
9a5788ea 3063 return (TARGET_V850E2_UP ? 2 : 1);
65b688d7 3064}
ca316360 3065
3066/* Implement TARGET_LEGITIMATE_CONSTANT_P. */
3067
3068static bool
3754d046 3069v850_legitimate_constant_p (machine_mode mode ATTRIBUTE_UNUSED, rtx x)
ca316360 3070{
3071 return (GET_CODE (x) == CONST_DOUBLE
3072 || !(GET_CODE (x) == CONST
3073 && GET_CODE (XEXP (x, 0)) == PLUS
3074 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
3075 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT
3076 && !CONST_OK_FOR_K (INTVAL (XEXP (XEXP (x, 0), 1)))));
3077}
f5ec6516 3078
f0b35865 3079/* Helper function for `v850_legitimate_address_p'. */
3080
3081static bool
3082v850_reg_ok_for_base_p (const_rtx reg, bool strict_p)
3083{
3084 if (strict_p)
3085 {
3086 return REGNO_OK_FOR_BASE_P (REGNO (reg));
3087 } else {
3088 return true;
3089 }
3090}
3091
3092/* Accept either REG or SUBREG where a register is valid. */
3093
3094static bool
3095v850_rtx_ok_for_base_p (const_rtx x, bool strict_p)
3096{
3097 return ((REG_P (x) && v850_reg_ok_for_base_p (x, strict_p))
3098 || (SUBREG_P (x) && REG_P (SUBREG_REG (x))
3099 && v850_reg_ok_for_base_p (SUBREG_REG (x), strict_p)));
3100}
3101
3102/* Implement TARGET_LEGITIMATE_ADDRESS_P. */
3103
3104static bool
3105v850_legitimate_address_p (machine_mode mode, rtx x, bool strict_p,
3106 addr_space_t as ATTRIBUTE_UNUSED)
3107{
3108 gcc_assert (ADDR_SPACE_GENERIC_P (as));
3109
3110 if (v850_rtx_ok_for_base_p (x, strict_p))
3111 return true;
3112 if (CONSTANT_ADDRESS_P (x)
3113 && (mode == QImode || INTVAL (x) % 2 == 0)
3114 && (GET_MODE_SIZE (mode) <= 4 || INTVAL (x) % 4 == 0))
3115 return true;
3116 if (GET_CODE (x) == LO_SUM
3117 && REG_P (XEXP (x, 0))
3118 && v850_reg_ok_for_base_p (XEXP (x, 0), strict_p)
3119 && CONSTANT_P (XEXP (x, 1))
3120 && (!CONST_INT_P (XEXP (x, 1))
3121 || ((mode == QImode || INTVAL (XEXP (x, 1)) % 2 == 0)
3122 && constraint_satisfied_p (XEXP (x, 1), CONSTRAINT_K)))
3123 && GET_MODE_SIZE (mode) <= GET_MODE_SIZE (word_mode))
3124 return true;
3125 if (special_symbolref_operand (x, mode)
3126 && (GET_MODE_SIZE (mode) <= GET_MODE_SIZE (word_mode)))
3127 return true;
3128 if (GET_CODE (x) == PLUS
3129 && v850_rtx_ok_for_base_p (XEXP (x, 0), strict_p)
3130 && constraint_satisfied_p (XEXP (x,1), CONSTRAINT_K)
3131 && ((mode == QImode || INTVAL (XEXP (x, 1)) % 2 == 0)
3132 && CONST_OK_FOR_K (INTVAL (XEXP (x, 1))
3133 + (GET_MODE_NUNITS (mode) * UNITS_PER_WORD))))
3134 return true;
3135
3136 return false;
3137}
3138
f5ec6516 3139static int
3754d046 3140v850_memory_move_cost (machine_mode mode,
3f6c197f 3141 reg_class_t reg_class ATTRIBUTE_UNUSED,
3142 bool in)
f5ec6516 3143{
3144 switch (GET_MODE_SIZE (mode))
3145 {
3146 case 0:
3147 return in ? 24 : 8;
3148 case 1:
3149 case 2:
3150 case 3:
3151 case 4:
3152 return in ? 6 : 2;
3153 default:
3154 return (GET_MODE_SIZE (mode) / 2) * (in ? 3 : 1);
3155 }
3156}
9a5788ea 3157
3158int
dbac2734 3159v850_adjust_insn_length (rtx_insn *insn, int length)
9a5788ea 3160{
3161 if (TARGET_V850E3V5_UP)
3162 {
3163 if (CALL_P (insn))
3164 {
3165 if (TARGET_LONG_CALLS)
3166 {
3167 /* call_internal_long, call_value_internal_long. */
3168 if (length == 8)
3169 length = 4;
3170 if (length == 16)
3171 length = 10;
3172 }
3173 else
3174 {
3175 /* call_internal_short, call_value_internal_short. */
3176 if (length == 8)
3177 length = 4;
3178 }
3179 }
3180 }
3181 return length;
3182}
c60e4982 3183\f
3184/* V850 specific attributes. */
3185
3186static const struct attribute_spec v850_attribute_table[] =
3187{
ac86af5d 3188 /* { name, min_len, max_len, decl_req, type_req, fn_type_req, handler,
3189 affects_type_identity } */
3190 { "interrupt_handler", 0, 0, true, false, false,
3191 v850_handle_interrupt_attribute, false },
3192 { "interrupt", 0, 0, true, false, false,
3193 v850_handle_interrupt_attribute, false },
3194 { "sda", 0, 0, true, false, false,
3195 v850_handle_data_area_attribute, false },
3196 { "tda", 0, 0, true, false, false,
3197 v850_handle_data_area_attribute, false },
3198 { "zda", 0, 0, true, false, false,
3199 v850_handle_data_area_attribute, false },
3200 { NULL, 0, 0, false, false, false, NULL, false }
c60e4982 3201};
3202\f
85a79c1e 3203static void
3204v850_option_override (void)
9a9267b3 3205{
85a79c1e 3206 if (flag_exceptions || flag_non_call_exceptions)
3207 flag_omit_frame_pointer = 0;
9a9267b3 3208
85a79c1e 3209 /* The RH850 ABI does not (currently) support the use of the CALLT instruction. */
3210 if (! TARGET_GCC_ABI)
3211 target_flags |= MASK_DISABLE_CALLT;
3212}
9a9267b3 3213\f
9a5788ea 3214const char *
3215v850_gen_movdi (rtx * operands)
3216{
3217 if (REG_P (operands[0]))
3218 {
3219 if (REG_P (operands[1]))
3220 {
3221 if (REGNO (operands[0]) == (REGNO (operands[1]) - 1))
3222 return "mov %1, %0; mov %R1, %R0";
3223
3224 return "mov %R1, %R0; mov %1, %0";
3225 }
3226
3227 if (MEM_P (operands[1]))
3228 {
3229 if (REGNO (operands[0]) & 1)
3230 /* Use two load word instructions to synthesise a load double. */
3231 return "ld.w %1, %0 ; ld.w %R1, %R0" ;
3232
3233 return "ld.dw %1, %0";
3234 }
3235
3236 return "mov %1, %0; mov %R1, %R0";
3237 }
3238
3239 gcc_assert (REG_P (operands[1]));
3240
3241 if (REGNO (operands[1]) & 1)
3242 /* Use two store word instructions to synthesise a store double. */
3243 return "st.w %1, %0 ; st.w %R1, %R0 ";
3244
3245 return "st.dw %1, %0";
3246}
3247\f
c60e4982 3248/* Initialize the GCC target structure. */
f5ec6516 3249
85a79c1e 3250#undef TARGET_OPTION_OVERRIDE
3251#define TARGET_OPTION_OVERRIDE v850_option_override
3252
f5ec6516 3253#undef TARGET_MEMORY_MOVE_COST
85a79c1e 3254#define TARGET_MEMORY_MOVE_COST v850_memory_move_cost
f5ec6516 3255
c60e4982 3256#undef TARGET_ASM_ALIGNED_HI_OP
3257#define TARGET_ASM_ALIGNED_HI_OP "\t.hword\t"
3258
3259#undef TARGET_PRINT_OPERAND
85a79c1e 3260#define TARGET_PRINT_OPERAND v850_print_operand
c60e4982 3261#undef TARGET_PRINT_OPERAND_ADDRESS
85a79c1e 3262#define TARGET_PRINT_OPERAND_ADDRESS v850_print_operand_address
c60e4982 3263#undef TARGET_PRINT_OPERAND_PUNCT_VALID_P
85a79c1e 3264#define TARGET_PRINT_OPERAND_PUNCT_VALID_P v850_print_operand_punct_valid_p
c60e4982 3265
6d0d55a1 3266#undef TARGET_ASM_OUTPUT_ADDR_CONST_EXTRA
3267#define TARGET_ASM_OUTPUT_ADDR_CONST_EXTRA v850_output_addr_const_extra
3268
c60e4982 3269#undef TARGET_ATTRIBUTE_TABLE
3270#define TARGET_ATTRIBUTE_TABLE v850_attribute_table
3271
3272#undef TARGET_INSERT_ATTRIBUTES
3273#define TARGET_INSERT_ATTRIBUTES v850_insert_attributes
3274
3275#undef TARGET_ASM_SELECT_SECTION
3276#define TARGET_ASM_SELECT_SECTION v850_select_section
3277
3278/* The assembler supports switchable .bss sections, but
3279 v850_select_section doesn't yet make use of them. */
3280#undef TARGET_HAVE_SWITCHABLE_BSS_SECTIONS
3281#define TARGET_HAVE_SWITCHABLE_BSS_SECTIONS false
3282
3283#undef TARGET_ENCODE_SECTION_INFO
3284#define TARGET_ENCODE_SECTION_INFO v850_encode_section_info
3285
3286#undef TARGET_ASM_FILE_START_FILE_DIRECTIVE
3287#define TARGET_ASM_FILE_START_FILE_DIRECTIVE true
3288
c60e4982 3289#undef TARGET_RTX_COSTS
3290#define TARGET_RTX_COSTS v850_rtx_costs
3291
3292#undef TARGET_ADDRESS_COST
d9c5e5f4 3293#define TARGET_ADDRESS_COST hook_int_rtx_mode_as_bool_0
c60e4982 3294
3295#undef TARGET_MACHINE_DEPENDENT_REORG
3296#define TARGET_MACHINE_DEPENDENT_REORG v850_reorg
3297
3298#undef TARGET_SCHED_ISSUE_RATE
3299#define TARGET_SCHED_ISSUE_RATE v850_issue_rate
3300
3301#undef TARGET_FUNCTION_VALUE_REGNO_P
3302#define TARGET_FUNCTION_VALUE_REGNO_P v850_function_value_regno_p
3303#undef TARGET_FUNCTION_VALUE
3304#define TARGET_FUNCTION_VALUE v850_function_value
be3783f2 3305#undef TARGET_LIBCALL_VALUE
3306#define TARGET_LIBCALL_VALUE v850_libcall_value
c60e4982 3307
3308#undef TARGET_PROMOTE_PROTOTYPES
3309#define TARGET_PROMOTE_PROTOTYPES hook_bool_const_tree_true
3310
3311#undef TARGET_RETURN_IN_MEMORY
3312#define TARGET_RETURN_IN_MEMORY v850_return_in_memory
3313
3314#undef TARGET_PASS_BY_REFERENCE
3315#define TARGET_PASS_BY_REFERENCE v850_pass_by_reference
3316
3317#undef TARGET_CALLEE_COPIES
3318#define TARGET_CALLEE_COPIES hook_bool_CUMULATIVE_ARGS_mode_tree_bool_true
3319
c60e4982 3320#undef TARGET_ARG_PARTIAL_BYTES
3321#define TARGET_ARG_PARTIAL_BYTES v850_arg_partial_bytes
3322
3323#undef TARGET_FUNCTION_ARG
3324#define TARGET_FUNCTION_ARG v850_function_arg
3325
3326#undef TARGET_FUNCTION_ARG_ADVANCE
3327#define TARGET_FUNCTION_ARG_ADVANCE v850_function_arg_advance
3328
3329#undef TARGET_CAN_ELIMINATE
3330#define TARGET_CAN_ELIMINATE v850_can_eliminate
3331
b2d7ede1 3332#undef TARGET_CONDITIONAL_REGISTER_USAGE
3333#define TARGET_CONDITIONAL_REGISTER_USAGE v850_conditional_register_usage
3334
c60e4982 3335#undef TARGET_ASM_TRAMPOLINE_TEMPLATE
3336#define TARGET_ASM_TRAMPOLINE_TEMPLATE v850_asm_trampoline_template
3337#undef TARGET_TRAMPOLINE_INIT
3338#define TARGET_TRAMPOLINE_INIT v850_trampoline_init
3339
ca316360 3340#undef TARGET_LEGITIMATE_CONSTANT_P
3341#define TARGET_LEGITIMATE_CONSTANT_P v850_legitimate_constant_p
3342
f0b35865 3343#undef TARGET_ADDR_SPACE_LEGITIMATE_ADDRESS_P
3344#define TARGET_ADDR_SPACE_LEGITIMATE_ADDRESS_P v850_legitimate_address_p
3345
5f35dd0e 3346#undef TARGET_CAN_USE_DOLOOP_P
3347#define TARGET_CAN_USE_DOLOOP_P can_use_doloop_if_innermost
3348
c60e4982 3349struct gcc_target targetm = TARGET_INITIALIZER;
3350
2f14b1f9 3351#include "gt-v850.h"
Mirror of https://gcc.gnu.org/git/gcc.git