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* expr.h: Remove prototypes of functions defined in builtins.c.
[thirdparty/gcc.git] / gcc / config / v850 / v850.c
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747fe2d1 1/* Subroutines for insn-output.c for NEC V850 series
3aea1f79 2 Copyright (C) 1996-2014 Free Software Foundation, Inc.
747fe2d1 3 Contributed by Jeff Law (law@cygnus.com).
4
b5b835e5 5 This file is part of GCC.
747fe2d1 6
b5b835e5 7 GCC is free software; you can redistribute it and/or modify it
b2ceeb6c 8 under the terms of the GNU General Public License as published by
038d1e19 9 the Free Software Foundation; either version 3, or (at your option)
b2ceeb6c 10 any later version.
747fe2d1 11
b5b835e5 12 GCC is distributed in the hope that it will be useful, but WITHOUT
b2ceeb6c 13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 for more details.
747fe2d1 16
b2ceeb6c 17 You should have received a copy of the GNU General Public License
038d1e19 18 along with GCC; see the file COPYING3. If not see
19 <http://www.gnu.org/licenses/>. */
747fe2d1 20
be2828ce 21#include "config.h"
7014838c 22#include "system.h"
805e22b2 23#include "coretypes.h"
24#include "tm.h"
a821813a 25#include "tree.h"
9ed99284 26#include "stringpool.h"
27#include "stor-layout.h"
28#include "varasm.h"
29#include "calls.h"
747fe2d1 30#include "rtl.h"
31#include "regs.h"
32#include "hard-reg-set.h"
747fe2d1 33#include "insn-config.h"
34#include "conditions.h"
747fe2d1 35#include "output.h"
36#include "insn-attr.h"
37#include "flags.h"
38#include "recog.h"
39#include "expr.h"
4faf81b8 40#include "function.h"
0b205f4c 41#include "diagnostic-core.h"
e101acea 42#include "ggc.h"
1fcd08b1 43#include "tm_p.h"
a767736d 44#include "target.h"
45#include "target-def.h"
9f8151b9 46#include "df.h"
fba5dd52 47#include "opts.h"
f7715905 48#include "builtins.h"
a821813a 49
50#ifndef streq
51#define streq(a,b) (strcmp (a, b) == 0)
52#endif
53
73a49e11 54static void v850_print_operand_address (FILE *, rtx);
747fe2d1 55
e101acea 56/* Names of the various data areas used on the v850. */
57tree GHS_default_section_names [(int) COUNT_OF_GHS_SECTION_KINDS];
58tree GHS_current_section_names [(int) COUNT_OF_GHS_SECTION_KINDS];
59
60/* Track the current data area set by the data area pragma (which
61 can be nested). Tested by check_default_data_area. */
62data_area_stack_element * data_area_stack = NULL;
63
747fe2d1 64/* True if we don't need to check any more if the current
e101acea 65 function is an interrupt handler. */
747fe2d1 66static int v850_interrupt_cache_p = FALSE;
67
65b688d7 68rtx v850_compare_op0, v850_compare_op1;
69
747fe2d1 70/* Whether current function is an interrupt handler. */
71static int v850_interrupt_p = FALSE;
2f14b1f9 72
c60e4982 73static GTY(()) section * rosdata_section;
74static GTY(()) section * rozdata_section;
75static GTY(()) section * tdata_section;
76static GTY(()) section * zdata_section;
77static GTY(()) section * zbss_section;
747fe2d1 78\f
85a79c1e 79/* We use this to wrap all emitted insns in the prologue. */
80static rtx
81F (rtx x)
82{
83 if (GET_CODE (x) != CLOBBER)
84 RTX_FRAME_RELATED_P (x) = 1;
85 return x;
86}
87
88/* Mark all the subexpressions of the PARALLEL rtx PAR as
89 frame-related. Return PAR.
90
91 dwarf2out.c:dwarf2out_frame_debug_expr ignores sub-expressions of a
92 PARALLEL rtx other than the first if they do not have the
93 FRAME_RELATED flag set on them. */
94
95static rtx
96v850_all_frame_related (rtx par)
97{
98 int len = XVECLEN (par, 0);
99 int i;
100
101 gcc_assert (GET_CODE (par) == PARALLEL);
102 for (i = 0; i < len; i++)
103 F (XVECEXP (par, 0, i));
104
105 return par;
106}
107
65b688d7 108/* Handle the TARGET_PASS_BY_REFERENCE target hook.
109 Specify whether to pass the argument by reference. */
110
b981d932 111static bool
39cba157 112v850_pass_by_reference (cumulative_args_t cum ATTRIBUTE_UNUSED,
fb80456a 113 enum machine_mode mode, const_tree type,
b981d932 114 bool named ATTRIBUTE_UNUSED)
115{
116 unsigned HOST_WIDE_INT size;
117
85a79c1e 118 if (!TARGET_GCC_ABI)
119 return 0;
120
b981d932 121 if (type)
122 size = int_size_in_bytes (type);
123 else
124 size = GET_MODE_SIZE (mode);
125
126 return size > 8;
127}
747fe2d1 128
df9d2e34 129/* Return an RTX to represent where an argument with mode MODE
130 and type TYPE will be passed to a function. If the result
131 is NULL_RTX, the argument will be pushed. */
747fe2d1 132
1936e29b 133static rtx
39cba157 134v850_function_arg (cumulative_args_t cum_v, enum machine_mode mode,
1936e29b 135 const_tree type, bool named)
747fe2d1 136{
39cba157 137 CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
df9d2e34 138 rtx result = NULL_RTX;
747fe2d1 139 int size, align;
140
65b688d7 141 if (!named)
747fe2d1 142 return NULL_RTX;
143
144 if (mode == BLKmode)
145 size = int_size_in_bytes (type);
146 else
147 size = GET_MODE_SIZE (mode);
148
65b688d7 149 size = (size + UNITS_PER_WORD -1) & ~(UNITS_PER_WORD -1);
150
5dd3389c 151 if (size < 1)
df9d2e34 152 {
153 /* Once we have stopped using argument registers, do not start up again. */
154 cum->nbytes = 4 * UNITS_PER_WORD;
155 return NULL_RTX;
156 }
5dd3389c 157
85a79c1e 158 if (!TARGET_GCC_ABI)
159 align = UNITS_PER_WORD;
160 else if (size <= UNITS_PER_WORD && type)
747fe2d1 161 align = TYPE_ALIGN (type) / BITS_PER_UNIT;
162 else
163 align = size;
164
165 cum->nbytes = (cum->nbytes + align - 1) &~(align - 1);
166
167 if (cum->nbytes > 4 * UNITS_PER_WORD)
df9d2e34 168 return NULL_RTX;
747fe2d1 169
170 if (type == NULL_TREE
171 && cum->nbytes + size > 4 * UNITS_PER_WORD)
df9d2e34 172 return NULL_RTX;
747fe2d1 173
174 switch (cum->nbytes / UNITS_PER_WORD)
175 {
176 case 0:
7014838c 177 result = gen_rtx_REG (mode, 6);
747fe2d1 178 break;
179 case 1:
7014838c 180 result = gen_rtx_REG (mode, 7);
747fe2d1 181 break;
182 case 2:
7014838c 183 result = gen_rtx_REG (mode, 8);
747fe2d1 184 break;
185 case 3:
7014838c 186 result = gen_rtx_REG (mode, 9);
747fe2d1 187 break;
188 default:
df9d2e34 189 result = NULL_RTX;
747fe2d1 190 }
191
192 return result;
193}
194
f054eb3c 195/* Return the number of bytes which must be put into registers
747fe2d1 196 for values which are part in registers and part in memory. */
f054eb3c 197static int
39cba157 198v850_arg_partial_bytes (cumulative_args_t cum_v, enum machine_mode mode,
f054eb3c 199 tree type, bool named)
747fe2d1 200{
39cba157 201 CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
747fe2d1 202 int size, align;
203
85a79c1e 204 if (!named)
747fe2d1 205 return 0;
206
207 if (mode == BLKmode)
208 size = int_size_in_bytes (type);
209 else
210 size = GET_MODE_SIZE (mode);
211
df9d2e34 212 if (size < 1)
213 size = 1;
214
85a79c1e 215 if (!TARGET_GCC_ABI)
216 align = UNITS_PER_WORD;
217 else if (type)
747fe2d1 218 align = TYPE_ALIGN (type) / BITS_PER_UNIT;
219 else
220 align = size;
221
df9d2e34 222 cum->nbytes = (cum->nbytes + align - 1) & ~ (align - 1);
747fe2d1 223
224 if (cum->nbytes > 4 * UNITS_PER_WORD)
225 return 0;
226
227 if (cum->nbytes + size <= 4 * UNITS_PER_WORD)
228 return 0;
229
230 if (type == NULL_TREE
231 && cum->nbytes + size > 4 * UNITS_PER_WORD)
232 return 0;
233
f054eb3c 234 return 4 * UNITS_PER_WORD - cum->nbytes;
747fe2d1 235}
236
1936e29b 237/* Update the data in CUM to advance over an argument
238 of mode MODE and data type TYPE.
239 (TYPE is null for libcalls where that information may not be available.) */
240
241static void
39cba157 242v850_function_arg_advance (cumulative_args_t cum_v, enum machine_mode mode,
1936e29b 243 const_tree type, bool named ATTRIBUTE_UNUSED)
244{
39cba157 245 CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
246
85a79c1e 247 if (!TARGET_GCC_ABI)
248 cum->nbytes += (((mode != BLKmode
249 ? GET_MODE_SIZE (mode)
250 : int_size_in_bytes (type)) + UNITS_PER_WORD - 1)
251 & -UNITS_PER_WORD);
252 else
253 cum->nbytes += (((type && int_size_in_bytes (type) > 8
254 ? GET_MODE_SIZE (Pmode)
255 : (mode != BLKmode
256 ? GET_MODE_SIZE (mode)
257 : int_size_in_bytes (type))) + UNITS_PER_WORD - 1)
258 & -UNITS_PER_WORD);
1936e29b 259}
260
747fe2d1 261/* Return the high and low words of a CONST_DOUBLE */
262
263static void
39031315 264const_double_split (rtx x, HOST_WIDE_INT * p_high, HOST_WIDE_INT * p_low)
747fe2d1 265{
266 if (GET_CODE (x) == CONST_DOUBLE)
267 {
268 long t[2];
269 REAL_VALUE_TYPE rv;
270
271 switch (GET_MODE (x))
272 {
273 case DFmode:
274 REAL_VALUE_FROM_CONST_DOUBLE (rv, x);
275 REAL_VALUE_TO_TARGET_DOUBLE (rv, t);
276 *p_high = t[1]; /* since v850 is little endian */
277 *p_low = t[0]; /* high is second word */
278 return;
279
280 case SFmode:
281 REAL_VALUE_FROM_CONST_DOUBLE (rv, x);
282 REAL_VALUE_TO_TARGET_SINGLE (rv, *p_high);
283 *p_low = 0;
284 return;
285
286 case VOIDmode:
287 case DImode:
288 *p_high = CONST_DOUBLE_HIGH (x);
289 *p_low = CONST_DOUBLE_LOW (x);
290 return;
a821813a 291
292 default:
293 break;
747fe2d1 294 }
295 }
296
297 fatal_insn ("const_double_split got a bad insn:", x);
298}
299
300\f
301/* Return the cost of the rtx R with code CODE. */
302
303static int
39031315 304const_costs_int (HOST_WIDE_INT value, int zero_cost)
747fe2d1 305{
306 if (CONST_OK_FOR_I (value))
307 return zero_cost;
308 else if (CONST_OK_FOR_J (value))
309 return 1;
310 else if (CONST_OK_FOR_K (value))
311 return 2;
312 else
313 return 4;
314}
315
fab7adbf 316static int
39031315 317const_costs (rtx r, enum rtx_code c)
747fe2d1 318{
319 HOST_WIDE_INT high, low;
320
321 switch (c)
322 {
323 case CONST_INT:
324 return const_costs_int (INTVAL (r), 0);
325
326 case CONST_DOUBLE:
327 const_double_split (r, &high, &low);
328 if (GET_MODE (r) == SFmode)
329 return const_costs_int (high, 1);
330 else
331 return const_costs_int (high, 1) + const_costs_int (low, 1);
332
333 case SYMBOL_REF:
334 case LABEL_REF:
335 case CONST:
336 return 2;
337
338 case HIGH:
339 return 1;
340
341 default:
342 return 4;
343 }
344}
345
fab7adbf 346static bool
39031315 347v850_rtx_costs (rtx x,
ef51d1e3 348 int codearg,
39031315 349 int outer_code ATTRIBUTE_UNUSED,
20d892d1 350 int opno ATTRIBUTE_UNUSED,
f529eb25 351 int * total, bool speed)
fab7adbf 352{
ef51d1e3 353 enum rtx_code code = (enum rtx_code) codearg;
354
fab7adbf 355 switch (code)
356 {
357 case CONST_INT:
358 case CONST_DOUBLE:
359 case CONST:
360 case SYMBOL_REF:
361 case LABEL_REF:
362 *total = COSTS_N_INSNS (const_costs (x, code));
363 return true;
364
365 case MOD:
366 case DIV:
367 case UMOD:
368 case UDIV:
f529eb25 369 if (TARGET_V850E && !speed)
fab7adbf 370 *total = 6;
371 else
372 *total = 60;
373 return true;
374
375 case MULT:
376 if (TARGET_V850E
377 && ( GET_MODE (x) == SImode
378 || GET_MODE (x) == HImode
379 || GET_MODE (x) == QImode))
380 {
381 if (GET_CODE (XEXP (x, 1)) == REG)
382 *total = 4;
383 else if (GET_CODE (XEXP (x, 1)) == CONST_INT)
384 {
385 if (CONST_OK_FOR_O (INTVAL (XEXP (x, 1))))
386 *total = 6;
387 else if (CONST_OK_FOR_K (INTVAL (XEXP (x, 1))))
388 *total = 10;
389 }
390 }
391 else
392 *total = 20;
393 return true;
394
74f4459c 395 case ZERO_EXTRACT:
396 if (outer_code == COMPARE)
397 *total = 0;
398 return false;
399
fab7adbf 400 default:
401 return false;
402 }
403}
747fe2d1 404\f
405/* Print operand X using operand code CODE to assembly language output file
406 FILE. */
407
73a49e11 408static void
409v850_print_operand (FILE * file, rtx x, int code)
747fe2d1 410{
411 HOST_WIDE_INT high, low;
412
413 switch (code)
414 {
57e629ba 415 case 'c':
9a9267b3 416 /* We use 'c' operands with symbols for .vtinherit. */
57e629ba 417 if (GET_CODE (x) == SYMBOL_REF)
418 {
419 output_addr_const(file, x);
420 break;
421 }
9a9267b3 422 /* Fall through. */
747fe2d1 423 case 'b':
424 case 'B':
d0ab67df 425 case 'C':
426 switch ((code == 'B' || code == 'C')
427 ? reverse_condition (GET_CODE (x)) : GET_CODE (x))
747fe2d1 428 {
429 case NE:
d0ab67df 430 if (code == 'c' || code == 'C')
431 fprintf (file, "nz");
432 else
433 fprintf (file, "ne");
747fe2d1 434 break;
435 case EQ:
d0ab67df 436 if (code == 'c' || code == 'C')
437 fprintf (file, "z");
438 else
439 fprintf (file, "e");
747fe2d1 440 break;
441 case GE:
d0ab67df 442 fprintf (file, "ge");
747fe2d1 443 break;
444 case GT:
d0ab67df 445 fprintf (file, "gt");
747fe2d1 446 break;
447 case LE:
d0ab67df 448 fprintf (file, "le");
747fe2d1 449 break;
450 case LT:
d0ab67df 451 fprintf (file, "lt");
747fe2d1 452 break;
453 case GEU:
d0ab67df 454 fprintf (file, "nl");
747fe2d1 455 break;
456 case GTU:
d0ab67df 457 fprintf (file, "h");
747fe2d1 458 break;
459 case LEU:
d0ab67df 460 fprintf (file, "nh");
747fe2d1 461 break;
462 case LTU:
d0ab67df 463 fprintf (file, "l");
747fe2d1 464 break;
465 default:
9623efd7 466 gcc_unreachable ();
747fe2d1 467 }
468 break;
9a9267b3 469 case 'F': /* High word of CONST_DOUBLE. */
9623efd7 470 switch (GET_CODE (x))
747fe2d1 471 {
9623efd7 472 case CONST_INT:
473 fprintf (file, "%d", (INTVAL (x) >= 0) ? 0 : -1);
474 break;
475
476 case CONST_DOUBLE:
747fe2d1 477 const_double_split (x, &high, &low);
478 fprintf (file, "%ld", (long) high);
9623efd7 479 break;
480
481 default:
482 gcc_unreachable ();
747fe2d1 483 }
747fe2d1 484 break;
9a9267b3 485 case 'G': /* Low word of CONST_DOUBLE. */
9623efd7 486 switch (GET_CODE (x))
747fe2d1 487 {
9623efd7 488 case CONST_INT:
489 fprintf (file, "%ld", (long) INTVAL (x));
490 break;
491
492 case CONST_DOUBLE:
747fe2d1 493 const_double_split (x, &high, &low);
494 fprintf (file, "%ld", (long) low);
9623efd7 495 break;
496
497 default:
498 gcc_unreachable ();
747fe2d1 499 }
747fe2d1 500 break;
501 case 'L':
8c178e2a 502 fprintf (file, "%d\n", (int)(INTVAL (x) & 0xffff));
747fe2d1 503 break;
504 case 'M':
505 fprintf (file, "%d", exact_log2 (INTVAL (x)));
506 break;
507 case 'O':
9623efd7 508 gcc_assert (special_symbolref_operand (x, VOIDmode));
509
510 if (GET_CODE (x) == CONST)
511 x = XEXP (XEXP (x, 0), 0);
512 else
513 gcc_assert (GET_CODE (x) == SYMBOL_REF);
514
515 if (SYMBOL_REF_ZDA_P (x))
516 fprintf (file, "zdaoff");
517 else if (SYMBOL_REF_SDA_P (x))
518 fprintf (file, "sdaoff");
519 else if (SYMBOL_REF_TDA_P (x))
520 fprintf (file, "tdaoff");
747fe2d1 521 else
9623efd7 522 gcc_unreachable ();
747fe2d1 523 break;
524 case 'P':
9623efd7 525 gcc_assert (special_symbolref_operand (x, VOIDmode));
526 output_addr_const (file, x);
747fe2d1 527 break;
528 case 'Q':
9623efd7 529 gcc_assert (special_symbolref_operand (x, VOIDmode));
530
531 if (GET_CODE (x) == CONST)
532 x = XEXP (XEXP (x, 0), 0);
747fe2d1 533 else
9623efd7 534 gcc_assert (GET_CODE (x) == SYMBOL_REF);
535
536 if (SYMBOL_REF_ZDA_P (x))
537 fprintf (file, "r0");
538 else if (SYMBOL_REF_SDA_P (x))
539 fprintf (file, "gp");
540 else if (SYMBOL_REF_TDA_P (x))
541 fprintf (file, "ep");
542 else
543 gcc_unreachable ();
747fe2d1 544 break;
545 case 'R': /* 2nd word of a double. */
546 switch (GET_CODE (x))
547 {
a821813a 548 case REG:
549 fprintf (file, reg_names[REGNO (x) + 1]);
550 break;
551 case MEM:
eafc6604 552 x = XEXP (adjust_address (x, SImode, 4), 0);
73a49e11 553 v850_print_operand_address (file, x);
2b33b157 554 if (GET_CODE (x) == CONST_INT)
555 fprintf (file, "[r0]");
a821813a 556 break;
557
85a79c1e 558 case CONST_INT:
559 {
560 unsigned HOST_WIDE_INT v = INTVAL (x);
561
562 /* Trickery to avoid problems with shifting
563 32-bits at a time on a 32-bit host. */
564 v = v >> 16;
565 v = v >> 16;
566 fprintf (file, HOST_WIDE_INT_PRINT_HEX, v);
567 break;
568 }
569
570 case CONST_DOUBLE:
571 fprintf (file, HOST_WIDE_INT_PRINT_HEX, CONST_DOUBLE_HIGH (x));
a821813a 572 break;
85a79c1e 573
574 default:
575 debug_rtx (x);
576 gcc_unreachable ();
747fe2d1 577 }
578 break;
579 case 'S':
580 {
d05e7146 581 /* If it's a reference to a TDA variable, use sst/sld vs. st/ld. */
65c7acad 582 if (GET_CODE (x) == MEM && ep_memory_operand (x, GET_MODE (x), FALSE))
583 fputs ("s", file);
584
585 break;
586 }
587 case 'T':
588 {
589 /* Like an 'S' operand above, but for unsigned loads only. */
590 if (GET_CODE (x) == MEM && ep_memory_operand (x, GET_MODE (x), TRUE))
747fe2d1 591 fputs ("s", file);
592
593 break;
594 }
9a9267b3 595 case 'W': /* Print the instruction suffix. */
747fe2d1 596 switch (GET_MODE (x))
597 {
598 default:
9623efd7 599 gcc_unreachable ();
747fe2d1 600
601 case QImode: fputs (".b", file); break;
602 case HImode: fputs (".h", file); break;
603 case SImode: fputs (".w", file); break;
604 case SFmode: fputs (".w", file); break;
605 }
606 break;
9a9267b3 607 case '.': /* Register r0. */
747fe2d1 608 fputs (reg_names[0], file);
609 break;
9a9267b3 610 case 'z': /* Reg or zero. */
611 if (REG_P (x))
d0ab67df 612 fputs (reg_names[REGNO (x)], file);
65b688d7 613 else if ((GET_MODE(x) == SImode
614 || GET_MODE(x) == DFmode
615 || GET_MODE(x) == SFmode)
616 && x == CONST0_RTX(GET_MODE(x)))
617 fputs (reg_names[0], file);
d0ab67df 618 else
9623efd7 619 {
620 gcc_assert (x == const0_rtx);
621 fputs (reg_names[0], file);
622 }
d0ab67df 623 break;
747fe2d1 624 default:
625 switch (GET_CODE (x))
626 {
627 case MEM:
628 if (GET_CODE (XEXP (x, 0)) == CONST_INT)
1a83b3ff 629 output_address (gen_rtx_PLUS (SImode, gen_rtx_REG (SImode, 0),
7014838c 630 XEXP (x, 0)));
747fe2d1 631 else
632 output_address (XEXP (x, 0));
633 break;
634
635 case REG:
636 fputs (reg_names[REGNO (x)], file);
637 break;
638 case SUBREG:
701e46d0 639 fputs (reg_names[subreg_regno (x)], file);
747fe2d1 640 break;
85a79c1e 641 case CONST_DOUBLE:
642 fprintf (file, HOST_WIDE_INT_PRINT_HEX, CONST_DOUBLE_LOW (x));
643 break;
644
747fe2d1 645 case CONST_INT:
646 case SYMBOL_REF:
647 case CONST:
648 case LABEL_REF:
649 case CODE_LABEL:
73a49e11 650 v850_print_operand_address (file, x);
747fe2d1 651 break;
652 default:
9623efd7 653 gcc_unreachable ();
747fe2d1 654 }
655 break;
656
657 }
658}
659
660\f
661/* Output assembly language output for the address ADDR to FILE. */
662
73a49e11 663static void
664v850_print_operand_address (FILE * file, rtx addr)
747fe2d1 665{
666 switch (GET_CODE (addr))
667 {
668 case REG:
669 fprintf (file, "0[");
73a49e11 670 v850_print_operand (file, addr, 0);
747fe2d1 671 fprintf (file, "]");
672 break;
673 case LO_SUM:
674 if (GET_CODE (XEXP (addr, 0)) == REG)
675 {
676 /* reg,foo */
677 fprintf (file, "lo(");
73a49e11 678 v850_print_operand (file, XEXP (addr, 1), 0);
747fe2d1 679 fprintf (file, ")[");
73a49e11 680 v850_print_operand (file, XEXP (addr, 0), 0);
747fe2d1 681 fprintf (file, "]");
682 }
683 break;
684 case PLUS:
685 if (GET_CODE (XEXP (addr, 0)) == REG
686 || GET_CODE (XEXP (addr, 0)) == SUBREG)
687 {
688 /* reg,foo */
73a49e11 689 v850_print_operand (file, XEXP (addr, 1), 0);
747fe2d1 690 fprintf (file, "[");
73a49e11 691 v850_print_operand (file, XEXP (addr, 0), 0);
747fe2d1 692 fprintf (file, "]");
693 }
694 else
695 {
73a49e11 696 v850_print_operand (file, XEXP (addr, 0), 0);
747fe2d1 697 fprintf (file, "+");
73a49e11 698 v850_print_operand (file, XEXP (addr, 1), 0);
747fe2d1 699 }
700 break;
701 case SYMBOL_REF:
91efe10c 702 {
703 const char *off_name = NULL;
704 const char *reg_name = NULL;
705
706 if (SYMBOL_REF_ZDA_P (addr))
707 {
708 off_name = "zdaoff";
709 reg_name = "r0";
710 }
711 else if (SYMBOL_REF_SDA_P (addr))
712 {
713 off_name = "sdaoff";
714 reg_name = "gp";
715 }
716 else if (SYMBOL_REF_TDA_P (addr))
717 {
718 off_name = "tdaoff";
719 reg_name = "ep";
720 }
721
722 if (off_name)
747fe2d1 723 fprintf (file, "%s(", off_name);
747fe2d1 724 output_addr_const (file, addr);
91efe10c 725 if (reg_name)
726 fprintf (file, ")[%s]", reg_name);
727 }
747fe2d1 728 break;
729 case CONST:
730 if (special_symbolref_operand (addr, VOIDmode))
731 {
91efe10c 732 rtx x = XEXP (XEXP (addr, 0), 0);
9a356c3c 733 const char *off_name;
734 const char *reg_name;
747fe2d1 735
91efe10c 736 if (SYMBOL_REF_ZDA_P (x))
747fe2d1 737 {
738 off_name = "zdaoff";
739 reg_name = "r0";
740 }
91efe10c 741 else if (SYMBOL_REF_SDA_P (x))
747fe2d1 742 {
743 off_name = "sdaoff";
744 reg_name = "gp";
745 }
91efe10c 746 else if (SYMBOL_REF_TDA_P (x))
747fe2d1 747 {
748 off_name = "tdaoff";
749 reg_name = "ep";
750 }
751 else
9623efd7 752 gcc_unreachable ();
747fe2d1 753
754 fprintf (file, "%s(", off_name);
755 output_addr_const (file, addr);
756 fprintf (file, ")[%s]", reg_name);
757 }
758 else
759 output_addr_const (file, addr);
760 break;
761 default:
762 output_addr_const (file, addr);
763 break;
764 }
765}
766
73a49e11 767static bool
768v850_print_operand_punct_valid_p (unsigned char code)
769{
770 return code == '.';
771}
772
5dd3389c 773/* When assemble_integer is used to emit the offsets for a switch
774 table it can encounter (TRUNCATE:HI (MINUS:SI (LABEL_REF:SI) (LABEL_REF:SI))).
775 output_addr_const will normally barf at this, but it is OK to omit
776 the truncate and just emit the difference of the two labels. The
777 .hword directive will automatically handle the truncation for us.
778
6d0d55a1 779 Returns true if rtx was handled, false otherwise. */
5dd3389c 780
6d0d55a1 781static bool
39031315 782v850_output_addr_const_extra (FILE * file, rtx x)
5dd3389c 783{
784 if (GET_CODE (x) != TRUNCATE)
6d0d55a1 785 return false;
5dd3389c 786
787 x = XEXP (x, 0);
788
789 /* We must also handle the case where the switch table was passed a
790 constant value and so has been collapsed. In this case the first
791 label will have been deleted. In such a case it is OK to emit
792 nothing, since the table will not be used.
793 (cf gcc.c-torture/compile/990801-1.c). */
794 if (GET_CODE (x) == MINUS
795 && GET_CODE (XEXP (x, 0)) == LABEL_REF
796 && GET_CODE (XEXP (XEXP (x, 0), 0)) == CODE_LABEL
797 && INSN_DELETED_P (XEXP (XEXP (x, 0), 0)))
6d0d55a1 798 return true;
5dd3389c 799
800 output_addr_const (file, x);
6d0d55a1 801 return true;
5dd3389c 802}
747fe2d1 803\f
804/* Return appropriate code to load up a 1, 2, or 4 integer/floating
805 point value. */
806
1fcd08b1 807const char *
39031315 808output_move_single (rtx * operands)
747fe2d1 809{
810 rtx dst = operands[0];
811 rtx src = operands[1];
812
813 if (REG_P (dst))
814 {
815 if (REG_P (src))
816 return "mov %1,%0";
817
818 else if (GET_CODE (src) == CONST_INT)
819 {
820 HOST_WIDE_INT value = INTVAL (src);
821
d15353b6 822 if (CONST_OK_FOR_J (value)) /* Signed 5-bit immediate. */
747fe2d1 823 return "mov %1,%0";
824
d15353b6 825 else if (CONST_OK_FOR_K (value)) /* Signed 16-bit immediate. */
65b688d7 826 return "movea %1,%.,%0";
747fe2d1 827
5dd3389c 828 else if (CONST_OK_FOR_L (value)) /* Upper 16 bits were set. */
65b688d7 829 return "movhi hi0(%1),%.,%0";
747fe2d1 830
5dd3389c 831 /* A random constant. */
9a5788ea 832 else if (TARGET_V850E_UP)
5dd3389c 833 return "mov %1,%0";
834 else
747fe2d1 835 return "movhi hi(%1),%.,%0\n\tmovea lo(%1),%0,%0";
836 }
837
838 else if (GET_CODE (src) == CONST_DOUBLE && GET_MODE (src) == SFmode)
839 {
840 HOST_WIDE_INT high, low;
841
842 const_double_split (src, &high, &low);
5dd3389c 843
d15353b6 844 if (CONST_OK_FOR_J (high)) /* Signed 5-bit immediate. */
747fe2d1 845 return "mov %F1,%0";
846
d15353b6 847 else if (CONST_OK_FOR_K (high)) /* Signed 16-bit immediate. */
65b688d7 848 return "movea %F1,%.,%0";
747fe2d1 849
5dd3389c 850 else if (CONST_OK_FOR_L (high)) /* Upper 16 bits were set. */
65b688d7 851 return "movhi hi0(%F1),%.,%0";
747fe2d1 852
5dd3389c 853 /* A random constant. */
9a5788ea 854 else if (TARGET_V850E_UP)
5dd3389c 855 return "mov %F1,%0";
856
857 else
747fe2d1 858 return "movhi hi(%F1),%.,%0\n\tmovea lo(%F1),%0,%0";
859 }
860
861 else if (GET_CODE (src) == MEM)
862 return "%S1ld%W1 %1,%0";
863
864 else if (special_symbolref_operand (src, VOIDmode))
865 return "movea %O1(%P1),%Q1,%0";
866
867 else if (GET_CODE (src) == LABEL_REF
868 || GET_CODE (src) == SYMBOL_REF
869 || GET_CODE (src) == CONST)
65c7acad 870 {
9a5788ea 871 if (TARGET_V850E_UP)
5dd3389c 872 return "mov hilo(%1),%0";
873 else
874 return "movhi hi(%1),%.,%0\n\tmovea lo(%1),%0,%0";
65c7acad 875 }
747fe2d1 876
877 else if (GET_CODE (src) == HIGH)
878 return "movhi hi(%1),%.,%0";
879
880 else if (GET_CODE (src) == LO_SUM)
881 {
882 operands[2] = XEXP (src, 0);
883 operands[3] = XEXP (src, 1);
884 return "movea lo(%3),%2,%0";
885 }
886 }
887
888 else if (GET_CODE (dst) == MEM)
889 {
890 if (REG_P (src))
891 return "%S0st%W0 %1,%0";
892
893 else if (GET_CODE (src) == CONST_INT && INTVAL (src) == 0)
894 return "%S0st%W0 %.,%0";
895
896 else if (GET_CODE (src) == CONST_DOUBLE
897 && CONST0_RTX (GET_MODE (dst)) == src)
898 return "%S0st%W0 %.,%0";
899 }
900
7014838c 901 fatal_insn ("output_move_single:", gen_rtx_SET (VOIDmode, dst, src));
747fe2d1 902 return "";
903}
904
65b688d7 905enum machine_mode
c60e4982 906v850_select_cc_mode (enum rtx_code cond, rtx op0, rtx op1 ATTRIBUTE_UNUSED)
65b688d7 907{
908 if (GET_MODE_CLASS (GET_MODE (op0)) == MODE_FLOAT)
909 {
910 switch (cond)
911 {
912 case LE:
913 return CC_FPU_LEmode;
914 case GE:
915 return CC_FPU_GEmode;
916 case LT:
917 return CC_FPU_LTmode;
918 case GT:
919 return CC_FPU_GTmode;
920 case EQ:
921 return CC_FPU_EQmode;
922 case NE:
923 return CC_FPU_NEmode;
924 default:
bd38291a 925 gcc_unreachable ();
65b688d7 926 }
927 }
928 return CCmode;
929}
930
931enum machine_mode
932v850_gen_float_compare (enum rtx_code cond, enum machine_mode mode ATTRIBUTE_UNUSED, rtx op0, rtx op1)
933{
bd38291a 934 if (GET_MODE (op0) == DFmode)
65b688d7 935 {
936 switch (cond)
937 {
938 case LE:
939 emit_insn (gen_cmpdf_le_insn (op0, op1));
940 break;
941 case GE:
942 emit_insn (gen_cmpdf_ge_insn (op0, op1));
943 break;
944 case LT:
945 emit_insn (gen_cmpdf_lt_insn (op0, op1));
946 break;
947 case GT:
948 emit_insn (gen_cmpdf_gt_insn (op0, op1));
949 break;
bd38291a 950 case NE:
951 /* Note: There is no NE comparison operator. So we
952 perform an EQ comparison and invert the branch.
953 See v850_float_nz_comparison for how this is done. */
65b688d7 954 case EQ:
955 emit_insn (gen_cmpdf_eq_insn (op0, op1));
956 break;
65b688d7 957 default:
bd38291a 958 gcc_unreachable ();
65b688d7 959 }
960 }
bd38291a 961 else if (GET_MODE (v850_compare_op0) == SFmode)
65b688d7 962 {
963 switch (cond)
964 {
965 case LE:
966 emit_insn (gen_cmpsf_le_insn(op0, op1));
967 break;
968 case GE:
969 emit_insn (gen_cmpsf_ge_insn(op0, op1));
970 break;
971 case LT:
972 emit_insn (gen_cmpsf_lt_insn(op0, op1));
973 break;
974 case GT:
975 emit_insn (gen_cmpsf_gt_insn(op0, op1));
976 break;
bd38291a 977 case NE:
978 /* Note: There is no NE comparison operator. So we
979 perform an EQ comparison and invert the branch.
980 See v850_float_nz_comparison for how this is done. */
65b688d7 981 case EQ:
982 emit_insn (gen_cmpsf_eq_insn(op0, op1));
983 break;
65b688d7 984 default:
bd38291a 985 gcc_unreachable ();
65b688d7 986 }
987 }
988 else
bd38291a 989 gcc_unreachable ();
65b688d7 990
991 return v850_select_cc_mode (cond, op0, op1);
992}
993
994rtx
995v850_gen_compare (enum rtx_code cond, enum machine_mode mode, rtx op0, rtx op1)
996{
997 if (GET_MODE_CLASS(GET_MODE (op0)) != MODE_FLOAT)
998 {
999 emit_insn (gen_cmpsi_insn (op0, op1));
1000 return gen_rtx_fmt_ee (cond, mode, gen_rtx_REG(CCmode, CC_REGNUM), const0_rtx);
1001 }
1002 else
1003 {
1004 rtx cc_reg;
1005 mode = v850_gen_float_compare (cond, mode, op0, op1);
1006 cc_reg = gen_rtx_REG (mode, CC_REGNUM);
1007 emit_insn (gen_rtx_SET(mode, cc_reg, gen_rtx_REG (mode, FCC_REGNUM)));
1008
1009 return gen_rtx_fmt_ee (cond, mode, cc_reg, const0_rtx);
1010 }
1011}
1012
d0ab67df 1013/* Return maximum offset supported for a short EP memory reference of mode
1014 MODE and signedness UNSIGNEDP. */
747fe2d1 1015
a821813a 1016static int
39031315 1017ep_memory_offset (enum machine_mode mode, int unsignedp ATTRIBUTE_UNUSED)
747fe2d1 1018{
d0ab67df 1019 int max_offset = 0;
747fe2d1 1020
d0ab67df 1021 switch (mode)
747fe2d1 1022 {
747fe2d1 1023 case QImode:
5dd3389c 1024 if (TARGET_SMALL_SLD)
1025 max_offset = (1 << 4);
9a5788ea 1026 else if ((TARGET_V850E_UP)
65b688d7 1027 && unsignedp)
5dd3389c 1028 max_offset = (1 << 4);
1029 else
1030 max_offset = (1 << 7);
747fe2d1 1031 break;
1032
1033 case HImode:
5dd3389c 1034 if (TARGET_SMALL_SLD)
1035 max_offset = (1 << 5);
9a5788ea 1036 else if ((TARGET_V850E_UP)
65b688d7 1037 && unsignedp)
5dd3389c 1038 max_offset = (1 << 5);
1039 else
1040 max_offset = (1 << 8);
747fe2d1 1041 break;
1042
1043 case SImode:
1044 case SFmode:
65c7acad 1045 max_offset = (1 << 8);
747fe2d1 1046 break;
a821813a 1047
1048 default:
1049 break;
747fe2d1 1050 }
1051
d0ab67df 1052 return max_offset;
1053}
1054
1055/* Return true if OP is a valid short EP memory reference */
1056
1057int
39031315 1058ep_memory_operand (rtx op, enum machine_mode mode, int unsigned_load)
d0ab67df 1059{
1060 rtx addr, op0, op1;
1061 int max_offset;
1062 int mask;
1063
d05e7146 1064 /* If we are not using the EP register on a per-function basis
554f2707 1065 then do not allow this optimization at all. This is to
d05e7146 1066 prevent the use of the SLD/SST instructions which cannot be
1067 guaranteed to work properly due to a hardware bug. */
1068 if (!TARGET_EP)
1069 return FALSE;
1070
d0ab67df 1071 if (GET_CODE (op) != MEM)
1072 return FALSE;
1073
1074 max_offset = ep_memory_offset (mode, unsigned_load);
1075
1076 mask = GET_MODE_SIZE (mode) - 1;
1077
747fe2d1 1078 addr = XEXP (op, 0);
1079 if (GET_CODE (addr) == CONST)
1080 addr = XEXP (addr, 0);
1081
1082 switch (GET_CODE (addr))
1083 {
1084 default:
1085 break;
1086
1087 case SYMBOL_REF:
91efe10c 1088 return SYMBOL_REF_TDA_P (addr);
747fe2d1 1089
1090 case REG:
1091 return REGNO (addr) == EP_REGNUM;
1092
1093 case PLUS:
1094 op0 = XEXP (addr, 0);
1095 op1 = XEXP (addr, 1);
1096 if (GET_CODE (op1) == CONST_INT
1097 && INTVAL (op1) < max_offset
acd39194 1098 && INTVAL (op1) >= 0
747fe2d1 1099 && (INTVAL (op1) & mask) == 0)
1100 {
1101 if (GET_CODE (op0) == REG && REGNO (op0) == EP_REGNUM)
1102 return TRUE;
1103
91efe10c 1104 if (GET_CODE (op0) == SYMBOL_REF && SYMBOL_REF_TDA_P (op0))
747fe2d1 1105 return TRUE;
1106 }
1107 break;
1108 }
1109
1110 return FALSE;
1111}
747fe2d1 1112\f
1113/* Substitute memory references involving a pointer, to use the ep pointer,
1114 taking care to save and preserve the ep. */
1115
1116static void
39031315 1117substitute_ep_register (rtx first_insn,
1118 rtx last_insn,
1119 int uses,
1120 int regno,
1121 rtx * p_r1,
1122 rtx * p_ep)
747fe2d1 1123{
7014838c 1124 rtx reg = gen_rtx_REG (Pmode, regno);
747fe2d1 1125 rtx insn;
747fe2d1 1126
1127 if (!*p_r1)
1128 {
9f8151b9 1129 df_set_regs_ever_live (1, true);
7014838c 1130 *p_r1 = gen_rtx_REG (Pmode, 1);
1131 *p_ep = gen_rtx_REG (Pmode, 30);
747fe2d1 1132 }
1133
1134 if (TARGET_DEBUG)
a821813a 1135 fprintf (stderr, "\
1136Saved %d bytes (%d uses of register %s) in function %s, starting as insn %d, ending at %d\n",
747fe2d1 1137 2 * (uses - 3), uses, reg_names[regno],
1138 IDENTIFIER_POINTER (DECL_NAME (current_function_decl)),
1139 INSN_UID (first_insn), INSN_UID (last_insn));
1140
aa90bb35 1141 if (NOTE_P (first_insn))
747fe2d1 1142 first_insn = next_nonnote_insn (first_insn);
1143
1144 last_insn = next_nonnote_insn (last_insn);
1145 for (insn = first_insn; insn && insn != last_insn; insn = NEXT_INSN (insn))
1146 {
aa90bb35 1147 if (NONJUMP_INSN_P (insn))
747fe2d1 1148 {
1149 rtx pattern = single_set (insn);
1150
1151 /* Replace the memory references. */
1152 if (pattern)
1153 {
1154 rtx *p_mem;
d0ab67df 1155 /* Memory operands are signed by default. */
1156 int unsignedp = FALSE;
747fe2d1 1157
1158 if (GET_CODE (SET_DEST (pattern)) == MEM
1159 && GET_CODE (SET_SRC (pattern)) == MEM)
1160 p_mem = (rtx *)0;
1161
1162 else if (GET_CODE (SET_DEST (pattern)) == MEM)
1163 p_mem = &SET_DEST (pattern);
1164
1165 else if (GET_CODE (SET_SRC (pattern)) == MEM)
1166 p_mem = &SET_SRC (pattern);
1167
5dd3389c 1168 else if (GET_CODE (SET_SRC (pattern)) == SIGN_EXTEND
1169 && GET_CODE (XEXP (SET_SRC (pattern), 0)) == MEM)
1170 p_mem = &XEXP (SET_SRC (pattern), 0);
1171
1172 else if (GET_CODE (SET_SRC (pattern)) == ZERO_EXTEND
1173 && GET_CODE (XEXP (SET_SRC (pattern), 0)) == MEM)
1174 {
1175 p_mem = &XEXP (SET_SRC (pattern), 0);
1176 unsignedp = TRUE;
1177 }
747fe2d1 1178 else
1179 p_mem = (rtx *)0;
1180
1181 if (p_mem)
1182 {
1183 rtx addr = XEXP (*p_mem, 0);
1184
e101acea 1185 if (GET_CODE (addr) == REG && REGNO (addr) == (unsigned) regno)
747fe2d1 1186 *p_mem = change_address (*p_mem, VOIDmode, *p_ep);
1187
1188 else if (GET_CODE (addr) == PLUS
1189 && GET_CODE (XEXP (addr, 0)) == REG
e101acea 1190 && REGNO (XEXP (addr, 0)) == (unsigned) regno
747fe2d1 1191 && GET_CODE (XEXP (addr, 1)) == CONST_INT
a821813a 1192 && ((INTVAL (XEXP (addr, 1)))
d0ab67df 1193 < ep_memory_offset (GET_MODE (*p_mem),
acd39194 1194 unsignedp))
1195 && ((INTVAL (XEXP (addr, 1))) >= 0))
747fe2d1 1196 *p_mem = change_address (*p_mem, VOIDmode,
7014838c 1197 gen_rtx_PLUS (Pmode,
1198 *p_ep,
1199 XEXP (addr, 1)));
747fe2d1 1200 }
1201 }
1202 }
1203 }
1204
1205 /* Optimize back to back cases of ep <- r1 & r1 <- ep. */
1206 insn = prev_nonnote_insn (first_insn);
aa90bb35 1207 if (insn && NONJUMP_INSN_P (insn)
747fe2d1 1208 && GET_CODE (PATTERN (insn)) == SET
1209 && SET_DEST (PATTERN (insn)) == *p_ep
1210 && SET_SRC (PATTERN (insn)) == *p_r1)
1211 delete_insn (insn);
1212 else
7014838c 1213 emit_insn_before (gen_rtx_SET (Pmode, *p_r1, *p_ep), first_insn);
747fe2d1 1214
7014838c 1215 emit_insn_before (gen_rtx_SET (Pmode, *p_ep, reg), first_insn);
1216 emit_insn_before (gen_rtx_SET (Pmode, *p_ep, *p_r1), last_insn);
747fe2d1 1217}
1218
1219\f
2efea8c0 1220/* TARGET_MACHINE_DEPENDENT_REORG. On the 850, we use it to implement
1221 the -mep mode to copy heavily used pointers to ep to use the implicit
1222 addressing. */
747fe2d1 1223
2efea8c0 1224static void
39031315 1225v850_reorg (void)
747fe2d1 1226{
a821813a 1227 struct
1228 {
747fe2d1 1229 int uses;
1230 rtx first_insn;
1231 rtx last_insn;
a821813a 1232 }
1233 regs[FIRST_PSEUDO_REGISTER];
747fe2d1 1234
1235 int i;
1236 int use_ep = FALSE;
1237 rtx r1 = NULL_RTX;
1238 rtx ep = NULL_RTX;
1239 rtx insn;
1240 rtx pattern;
1241
d32ccca7 1242 /* If not ep mode, just return now. */
747fe2d1 1243 if (!TARGET_EP)
1244 return;
1245
1246 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1247 {
1248 regs[i].uses = 0;
1249 regs[i].first_insn = NULL_RTX;
1250 regs[i].last_insn = NULL_RTX;
1251 }
1252
2efea8c0 1253 for (insn = get_insns (); insn != NULL_RTX; insn = NEXT_INSN (insn))
747fe2d1 1254 {
1255 switch (GET_CODE (insn))
1256 {
1257 /* End of basic block */
1258 default:
1259 if (!use_ep)
1260 {
1261 int max_uses = -1;
1262 int max_regno = -1;
1263
1264 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1265 {
1266 if (max_uses < regs[i].uses)
1267 {
1268 max_uses = regs[i].uses;
1269 max_regno = i;
1270 }
1271 }
1272
1273 if (max_uses > 3)
1274 substitute_ep_register (regs[max_regno].first_insn,
1275 regs[max_regno].last_insn,
1276 max_uses, max_regno, &r1, &ep);
1277 }
1278
1279 use_ep = FALSE;
1280 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1281 {
1282 regs[i].uses = 0;
1283 regs[i].first_insn = NULL_RTX;
1284 regs[i].last_insn = NULL_RTX;
1285 }
1286 break;
1287
1288 case NOTE:
1289 break;
1290
1291 case INSN:
1292 pattern = single_set (insn);
1293
85a79c1e 1294 /* See if there are any memory references we can shorten. */
747fe2d1 1295 if (pattern)
1296 {
1297 rtx src = SET_SRC (pattern);
1298 rtx dest = SET_DEST (pattern);
1299 rtx mem;
d0ab67df 1300 /* Memory operands are signed by default. */
1301 int unsignedp = FALSE;
747fe2d1 1302
d0fafca1 1303 /* We might have (SUBREG (MEM)) here, so just get rid of the
e2c2ccf6 1304 subregs to make this code simpler. */
1305 if (GET_CODE (dest) == SUBREG
1306 && (GET_CODE (SUBREG_REG (dest)) == MEM
1307 || GET_CODE (SUBREG_REG (dest)) == REG))
85a79c1e 1308 alter_subreg (&dest, false);
e2c2ccf6 1309 if (GET_CODE (src) == SUBREG
1310 && (GET_CODE (SUBREG_REG (src)) == MEM
1311 || GET_CODE (SUBREG_REG (src)) == REG))
85a79c1e 1312 alter_subreg (&src, false);
d0fafca1 1313
747fe2d1 1314 if (GET_CODE (dest) == MEM && GET_CODE (src) == MEM)
1315 mem = NULL_RTX;
1316
1317 else if (GET_CODE (dest) == MEM)
1318 mem = dest;
1319
1320 else if (GET_CODE (src) == MEM)
1321 mem = src;
1322
5dd3389c 1323 else if (GET_CODE (src) == SIGN_EXTEND
1324 && GET_CODE (XEXP (src, 0)) == MEM)
1325 mem = XEXP (src, 0);
1326
1327 else if (GET_CODE (src) == ZERO_EXTEND
1328 && GET_CODE (XEXP (src, 0)) == MEM)
1329 {
1330 mem = XEXP (src, 0);
1331 unsignedp = TRUE;
1332 }
747fe2d1 1333 else
1334 mem = NULL_RTX;
1335
d0ab67df 1336 if (mem && ep_memory_operand (mem, GET_MODE (mem), unsignedp))
747fe2d1 1337 use_ep = TRUE;
1338
1339 else if (!use_ep && mem
1340 && GET_MODE_SIZE (GET_MODE (mem)) <= UNITS_PER_WORD)
1341 {
1342 rtx addr = XEXP (mem, 0);
1343 int regno = -1;
1344 int short_p;
1345
1346 if (GET_CODE (addr) == REG)
1347 {
1348 short_p = TRUE;
1349 regno = REGNO (addr);
1350 }
1351
1352 else if (GET_CODE (addr) == PLUS
1353 && GET_CODE (XEXP (addr, 0)) == REG
1354 && GET_CODE (XEXP (addr, 1)) == CONST_INT
a821813a 1355 && ((INTVAL (XEXP (addr, 1)))
acd39194 1356 < ep_memory_offset (GET_MODE (mem), unsignedp))
1357 && ((INTVAL (XEXP (addr, 1))) >= 0))
747fe2d1 1358 {
1359 short_p = TRUE;
1360 regno = REGNO (XEXP (addr, 0));
1361 }
1362
1363 else
1364 short_p = FALSE;
1365
1366 if (short_p)
1367 {
1368 regs[regno].uses++;
1369 regs[regno].last_insn = insn;
1370 if (!regs[regno].first_insn)
1371 regs[regno].first_insn = insn;
1372 }
1373 }
1374
1375 /* Loading up a register in the basic block zaps any savings
1376 for the register */
d0fafca1 1377 if (GET_CODE (dest) == REG)
747fe2d1 1378 {
1379 enum machine_mode mode = GET_MODE (dest);
747fe2d1 1380 int regno;
1381 int endregno;
1382
d0fafca1 1383 regno = REGNO (dest);
747fe2d1 1384 endregno = regno + HARD_REGNO_NREGS (regno, mode);
1385
1386 if (!use_ep)
1387 {
1388 /* See if we can use the pointer before this
1389 modification. */
1390 int max_uses = -1;
1391 int max_regno = -1;
1392
1393 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1394 {
1395 if (max_uses < regs[i].uses)
1396 {
1397 max_uses = regs[i].uses;
1398 max_regno = i;
1399 }
1400 }
1401
1402 if (max_uses > 3
1403 && max_regno >= regno
1404 && max_regno < endregno)
1405 {
1406 substitute_ep_register (regs[max_regno].first_insn,
1407 regs[max_regno].last_insn,
a821813a 1408 max_uses, max_regno, &r1,
1409 &ep);
747fe2d1 1410
1411 /* Since we made a substitution, zap all remembered
1412 registers. */
1413 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1414 {
1415 regs[i].uses = 0;
1416 regs[i].first_insn = NULL_RTX;
1417 regs[i].last_insn = NULL_RTX;
1418 }
1419 }
1420 }
1421
1422 for (i = regno; i < endregno; i++)
1423 {
1424 regs[i].uses = 0;
1425 regs[i].first_insn = NULL_RTX;
1426 regs[i].last_insn = NULL_RTX;
1427 }
1428 }
1429 }
1430 }
1431 }
1432}
1433
747fe2d1 1434/* # of registers saved by the interrupt handler. */
65b688d7 1435#define INTERRUPT_FIXED_NUM 5
747fe2d1 1436
1437/* # of bytes for registers saved by the interrupt handler. */
1438#define INTERRUPT_FIXED_SAVE_SIZE (4 * INTERRUPT_FIXED_NUM)
1439
747fe2d1 1440/* # of words saved for other registers. */
1441#define INTERRUPT_ALL_SAVE_NUM \
65b688d7 1442 (30 - INTERRUPT_FIXED_NUM)
747fe2d1 1443
1444#define INTERRUPT_ALL_SAVE_SIZE (4 * INTERRUPT_ALL_SAVE_NUM)
1445
1446int
39031315 1447compute_register_save_size (long * p_reg_saved)
747fe2d1 1448{
1449 int size = 0;
1450 int i;
1451 int interrupt_handler = v850_interrupt_function_p (current_function_decl);
3072d30e 1452 int call_p = df_regs_ever_live_p (LINK_POINTER_REGNUM);
747fe2d1 1453 long reg_saved = 0;
1454
747fe2d1 1455 /* Count space for the register saves. */
1456 if (interrupt_handler)
1457 {
1458 for (i = 0; i <= 31; i++)
1459 switch (i)
1460 {
1461 default:
3072d30e 1462 if (df_regs_ever_live_p (i) || call_p)
747fe2d1 1463 {
1464 size += 4;
1465 reg_saved |= 1L << i;
1466 }
1467 break;
1468
1469 /* We don't save/restore r0 or the stack pointer */
1470 case 0:
1471 case STACK_POINTER_REGNUM:
1472 break;
1473
1474 /* For registers with fixed use, we save them, set them to the
1475 appropriate value, and then restore them.
1476 These registers are handled specially, so don't list them
1477 on the list of registers to save in the prologue. */
1478 case 1: /* temp used to hold ep */
a1e077bd 1479 case 4: /* gp */
747fe2d1 1480 case 10: /* temp used to call interrupt save/restore */
65b688d7 1481 case 11: /* temp used to call interrupt save/restore (long call) */
747fe2d1 1482 case EP_REGNUM: /* ep */
1483 size += 4;
1484 break;
1485 }
1486 }
747fe2d1 1487 else
26845ab8 1488 {
1489 /* Find the first register that needs to be saved. */
1490 for (i = 0; i <= 31; i++)
3072d30e 1491 if (df_regs_ever_live_p (i) && ((! call_used_regs[i])
26845ab8 1492 || i == LINK_POINTER_REGNUM))
1493 break;
1494
1495 /* If it is possible that an out-of-line helper function might be
1496 used to generate the prologue for the current function, then we
1497 need to cover the possibility that such a helper function will
1498 be used, despite the fact that there might be gaps in the list of
1499 registers that need to be saved. To detect this we note that the
f3d57f06 1500 helper functions always push at least register r29 (provided
1501 that the function is not an interrupt handler). */
26845ab8 1502
1503 if (TARGET_PROLOG_FUNCTION
f3d57f06 1504 && (i == 2 || ((i >= 20) && (i < 30))))
747fe2d1 1505 {
26845ab8 1506 if (i == 2)
1507 {
1508 size += 4;
1509 reg_saved |= 1L << i;
1510
1511 i = 20;
1512 }
747fe2d1 1513
26845ab8 1514 /* Helper functions save all registers between the starting
1515 register and the last register, regardless of whether they
1516 are actually used by the function or not. */
1517 for (; i <= 29; i++)
1518 {
1519 size += 4;
1520 reg_saved |= 1L << i;
1521 }
1522
3072d30e 1523 if (df_regs_ever_live_p (LINK_POINTER_REGNUM))
26845ab8 1524 {
1525 size += 4;
1526 reg_saved |= 1L << LINK_POINTER_REGNUM;
1527 }
1528 }
1529 else
1530 {
1531 for (; i <= 31; i++)
3072d30e 1532 if (df_regs_ever_live_p (i) && ((! call_used_regs[i])
26845ab8 1533 || i == LINK_POINTER_REGNUM))
1534 {
1535 size += 4;
1536 reg_saved |= 1L << i;
1537 }
1538 }
1539 }
1540
747fe2d1 1541 if (p_reg_saved)
1542 *p_reg_saved = reg_saved;
1543
1544 return size;
1545}
1546
85a79c1e 1547/* Typical stack layout should looks like this after the function's prologue:
1548
1549 | |
1550 -- ^
1551 | | \ |
1552 | | arguments saved | Increasing
1553 | | on the stack | addresses
1554 PARENT arg pointer -> | | /
1555 -------------------------- ---- -------------------
1556 | | - space for argument split between regs & stack
1557 --
1558 CHILD | | \ <-- (return address here)
1559 | | other call
1560 | | saved registers
1561 | | /
1562 --
1563 frame pointer -> | | \ ___
1564 | | local |
1565 | | variables |f
1566 | | / |r
1567 -- |a
1568 | | \ |m
1569 | | outgoing |e
1570 | | arguments | | Decreasing
1571 (hard) frame pointer | | / | | addresses
1572 and stack pointer -> | | / _|_ |
1573 -------------------------- ---- ------------------ V */
1574
747fe2d1 1575int
39031315 1576compute_frame_size (int size, long * p_reg_saved)
747fe2d1 1577{
747fe2d1 1578 return (size
1579 + compute_register_save_size (p_reg_saved)
abe32cce 1580 + crtl->outgoing_args_size);
747fe2d1 1581}
1582
65b688d7 1583static int
1584use_prolog_function (int num_save, int frame_size)
1585{
1586 int alloc_stack = (4 * num_save);
1587 int unalloc_stack = frame_size - alloc_stack;
1588 int save_func_len, restore_func_len;
1589 int save_normal_len, restore_normal_len;
1590
1591 if (! TARGET_DISABLE_CALLT)
1592 save_func_len = restore_func_len = 2;
1593 else
1594 save_func_len = restore_func_len = TARGET_LONG_CALLS ? (4+4+4+2+2) : 4;
1595
1596 if (unalloc_stack)
1597 {
1598 save_func_len += CONST_OK_FOR_J (-unalloc_stack) ? 2 : 4;
1599 restore_func_len += CONST_OK_FOR_J (-unalloc_stack) ? 2 : 4;
1600 }
1601
1602 /* See if we would have used ep to save the stack. */
1603 if (TARGET_EP && num_save > 3 && (unsigned)frame_size < 255)
1604 save_normal_len = restore_normal_len = (3 * 2) + (2 * num_save);
1605 else
1606 save_normal_len = restore_normal_len = 4 * num_save;
1607
1608 save_normal_len += CONST_OK_FOR_J (-frame_size) ? 2 : 4;
1609 restore_normal_len += (CONST_OK_FOR_J (frame_size) ? 2 : 4) + 2;
1610
1611 /* Don't bother checking if we don't actually save any space.
1612 This happens for instance if one register is saved and additional
1613 stack space is allocated. */
1614 return ((save_func_len + restore_func_len) < (save_normal_len + restore_normal_len));
1615}
1616
9a9267b3 1617static void
85a79c1e 1618increment_stack (signed int amount, bool in_prologue)
9a9267b3 1619{
1620 rtx inc;
1621
1622 if (amount == 0)
1623 return;
1624
1625 inc = GEN_INT (amount);
1626
1627 if (! CONST_OK_FOR_K (amount))
1628 {
1629 rtx reg = gen_rtx_REG (Pmode, 12);
1630
85a79c1e 1631 inc = emit_move_insn (reg, inc);
1632 if (in_prologue)
1633 F (inc);
9a9267b3 1634 inc = reg;
1635 }
1636
85a79c1e 1637 inc = emit_insn (gen_addsi3 (stack_pointer_rtx, stack_pointer_rtx, inc));
1638 if (in_prologue)
1639 F (inc);
9a9267b3 1640}
1641
747fe2d1 1642void
39031315 1643expand_prologue (void)
747fe2d1 1644{
1645 unsigned int i;
747fe2d1 1646 unsigned int size = get_frame_size ();
1647 unsigned int actual_fsize;
1648 unsigned int init_stack_alloc = 0;
1649 rtx save_regs[32];
1650 rtx save_all;
a821813a 1651 unsigned int num_save;
747fe2d1 1652 int code;
1653 int interrupt_handler = v850_interrupt_function_p (current_function_decl);
1654 long reg_saved = 0;
1655
1656 actual_fsize = compute_frame_size (size, &reg_saved);
1657
9a9267b3 1658 if (flag_stack_usage_info)
1659 current_function_static_stack_size = actual_fsize;
1660
d022cb59 1661 /* Save/setup global registers for interrupt functions right now. */
747fe2d1 1662 if (interrupt_handler)
1663 {
9a5788ea 1664 if (! TARGET_DISABLE_CALLT && (TARGET_V850E_UP))
5dd3389c 1665 emit_insn (gen_callt_save_interrupt ());
1666 else
9878c564 1667 emit_insn (gen_save_interrupt ());
5dd3389c 1668
747fe2d1 1669 actual_fsize -= INTERRUPT_FIXED_SAVE_SIZE;
26845ab8 1670
1671 if (((1L << LINK_POINTER_REGNUM) & reg_saved) != 0)
747fe2d1 1672 actual_fsize -= INTERRUPT_ALL_SAVE_SIZE;
85a79c1e 1673
1674 /* Interrupt functions are not passed arguments, so no need to
1675 allocate space for split structure arguments. */
1676 gcc_assert (crtl->args.pretend_args_size == 0);
747fe2d1 1677 }
1678
d022cb59 1679 /* Identify all of the saved registers. */
747fe2d1 1680 num_save = 0;
65b688d7 1681 for (i = 1; i < 32; i++)
747fe2d1 1682 {
1683 if (((1L << i) & reg_saved) != 0)
7014838c 1684 save_regs[num_save++] = gen_rtx_REG (Pmode, i);
747fe2d1 1685 }
1686
85a79c1e 1687 if (crtl->args.pretend_args_size)
1688 {
1689 if (num_save == 0)
1690 {
1691 increment_stack (- (actual_fsize + crtl->args.pretend_args_size), true);
1692 actual_fsize = 0;
1693 }
1694 else
1695 increment_stack (- crtl->args.pretend_args_size, true);
1696 }
1697
747fe2d1 1698 /* See if we have an insn that allocates stack space and saves the particular
85a79c1e 1699 registers we want to. Note that the helpers won't
1700 allocate additional space for registers GCC saves to complete a
1701 "split" structure argument. */
747fe2d1 1702 save_all = NULL_RTX;
85a79c1e 1703 if (TARGET_PROLOG_FUNCTION
1704 && !crtl->args.pretend_args_size
1705 && num_save > 0)
747fe2d1 1706 {
65b688d7 1707 if (use_prolog_function (num_save, actual_fsize))
747fe2d1 1708 {
65b688d7 1709 int alloc_stack = 4 * num_save;
1710 int offset = 0;
1711
7014838c 1712 save_all = gen_rtx_PARALLEL
1713 (VOIDmode,
a184c07b 1714 rtvec_alloc (num_save + 1
65b688d7 1715 + (TARGET_DISABLE_CALLT ? (TARGET_LONG_CALLS ? 2 : 1) : 0)));
7014838c 1716
1717 XVECEXP (save_all, 0, 0)
1718 = gen_rtx_SET (VOIDmode,
1719 stack_pointer_rtx,
65b688d7 1720 gen_rtx_PLUS (Pmode,
1721 stack_pointer_rtx,
1722 GEN_INT(-alloc_stack)));
747fe2d1 1723 for (i = 0; i < num_save; i++)
1724 {
65b688d7 1725 offset -= 4;
7014838c 1726 XVECEXP (save_all, 0, i+1)
1727 = gen_rtx_SET (VOIDmode,
1728 gen_rtx_MEM (Pmode,
65b688d7 1729 gen_rtx_PLUS (Pmode,
1730 stack_pointer_rtx,
1731 GEN_INT(offset))),
7014838c 1732 save_regs[i]);
747fe2d1 1733 }
1734
65b688d7 1735 if (TARGET_DISABLE_CALLT)
a184c07b 1736 {
1737 XVECEXP (save_all, 0, num_save + 1)
1738 = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (Pmode, 10));
1739
1740 if (TARGET_LONG_CALLS)
1741 XVECEXP (save_all, 0, num_save + 2)
1742 = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (Pmode, 11));
1743 }
1744
85a79c1e 1745 v850_all_frame_related (save_all);
1746
2571646d 1747 code = recog (save_all, NULL_RTX, NULL);
747fe2d1 1748 if (code >= 0)
1749 {
1750 rtx insn = emit_insn (save_all);
1751 INSN_CODE (insn) = code;
1752 actual_fsize -= alloc_stack;
26845ab8 1753
747fe2d1 1754 }
1755 else
1756 save_all = NULL_RTX;
1757 }
1758 }
1759
a821813a 1760 /* If no prolog save function is available, store the registers the old
df978151 1761 fashioned way (one by one). */
747fe2d1 1762 if (!save_all)
1763 {
1764 /* Special case interrupt functions that save all registers for a call. */
26845ab8 1765 if (interrupt_handler && ((1L << LINK_POINTER_REGNUM) & reg_saved) != 0)
1766 {
9a5788ea 1767 if (! TARGET_DISABLE_CALLT && (TARGET_V850E_UP))
5dd3389c 1768 emit_insn (gen_callt_save_all_interrupt ());
1769 else
1770 emit_insn (gen_save_all_interrupt ());
26845ab8 1771 }
747fe2d1 1772 else
1773 {
65b688d7 1774 int offset;
747fe2d1 1775 /* If the stack is too big, allocate it in chunks so we can do the
1776 register saves. We use the register save size so we use the ep
1777 register. */
1778 if (actual_fsize && !CONST_OK_FOR_K (-actual_fsize))
1779 init_stack_alloc = compute_register_save_size (NULL);
1780 else
1781 init_stack_alloc = actual_fsize;
65c7acad 1782
df978151 1783 /* Save registers at the beginning of the stack frame. */
747fe2d1 1784 offset = init_stack_alloc - 4;
65c7acad 1785
747fe2d1 1786 if (init_stack_alloc)
85a79c1e 1787 increment_stack (- (signed) init_stack_alloc, true);
65c7acad 1788
747fe2d1 1789 /* Save the return pointer first. */
26845ab8 1790 if (num_save > 0 && REGNO (save_regs[num_save-1]) == LINK_POINTER_REGNUM)
747fe2d1 1791 {
85a79c1e 1792 F (emit_move_insn (gen_rtx_MEM (SImode,
1793 plus_constant (Pmode,
1794 stack_pointer_rtx,
1795 offset)),
1796 save_regs[--num_save]));
747fe2d1 1797 offset -= 4;
1798 }
65c7acad 1799
747fe2d1 1800 for (i = 0; i < num_save; i++)
1801 {
85a79c1e 1802 F (emit_move_insn (gen_rtx_MEM (SImode,
1803 plus_constant (Pmode,
1804 stack_pointer_rtx,
1805 offset)),
1806 save_regs[i]));
747fe2d1 1807 offset -= 4;
1808 }
1809 }
1810 }
1811
1812 /* Allocate the rest of the stack that was not allocated above (either it is
1813 > 32K or we just called a function to save the registers and needed more
1814 stack. */
1815 if (actual_fsize > init_stack_alloc)
85a79c1e 1816 increment_stack (init_stack_alloc - actual_fsize, true);
747fe2d1 1817
1818 /* If we need a frame pointer, set it up now. */
1819 if (frame_pointer_needed)
85a79c1e 1820 F (emit_move_insn (hard_frame_pointer_rtx, stack_pointer_rtx));
747fe2d1 1821}
1822\f
1823
1824void
39031315 1825expand_epilogue (void)
747fe2d1 1826{
1827 unsigned int i;
747fe2d1 1828 unsigned int size = get_frame_size ();
1829 long reg_saved = 0;
4c369c58 1830 int actual_fsize = compute_frame_size (size, &reg_saved);
747fe2d1 1831 rtx restore_regs[32];
1832 rtx restore_all;
a821813a 1833 unsigned int num_restore;
747fe2d1 1834 int code;
1835 int interrupt_handler = v850_interrupt_function_p (current_function_decl);
1836
1837 /* Eliminate the initial stack stored by interrupt functions. */
1838 if (interrupt_handler)
1839 {
1840 actual_fsize -= INTERRUPT_FIXED_SAVE_SIZE;
26845ab8 1841 if (((1L << LINK_POINTER_REGNUM) & reg_saved) != 0)
747fe2d1 1842 actual_fsize -= INTERRUPT_ALL_SAVE_SIZE;
1843 }
1844
1845 /* Cut off any dynamic stack created. */
1846 if (frame_pointer_needed)
1847 emit_move_insn (stack_pointer_rtx, hard_frame_pointer_rtx);
1848
d022cb59 1849 /* Identify all of the saved registers. */
747fe2d1 1850 num_restore = 0;
65b688d7 1851 for (i = 1; i < 32; i++)
747fe2d1 1852 {
1853 if (((1L << i) & reg_saved) != 0)
7014838c 1854 restore_regs[num_restore++] = gen_rtx_REG (Pmode, i);
747fe2d1 1855 }
1856
747fe2d1 1857 /* See if we have an insn that restores the particular registers we
1858 want to. */
1859 restore_all = NULL_RTX;
65b688d7 1860
d022cb59 1861 if (TARGET_PROLOG_FUNCTION
1862 && num_restore > 0
85a79c1e 1863 && !crtl->args.pretend_args_size
747fe2d1 1864 && !interrupt_handler)
1865 {
65b688d7 1866 int alloc_stack = (4 * num_restore);
747fe2d1 1867
747fe2d1 1868 /* Don't bother checking if we don't actually save any space. */
65b688d7 1869 if (use_prolog_function (num_restore, actual_fsize))
747fe2d1 1870 {
65b688d7 1871 int offset;
7014838c 1872 restore_all = gen_rtx_PARALLEL (VOIDmode,
1873 rtvec_alloc (num_restore + 2));
1a860023 1874 XVECEXP (restore_all, 0, 0) = ret_rtx;
747fe2d1 1875 XVECEXP (restore_all, 0, 1)
7014838c 1876 = gen_rtx_SET (VOIDmode, stack_pointer_rtx,
1877 gen_rtx_PLUS (Pmode,
1878 stack_pointer_rtx,
1879 GEN_INT (alloc_stack)));
747fe2d1 1880
1881 offset = alloc_stack - 4;
1882 for (i = 0; i < num_restore; i++)
1883 {
1884 XVECEXP (restore_all, 0, i+2)
7014838c 1885 = gen_rtx_SET (VOIDmode,
1886 restore_regs[i],
1887 gen_rtx_MEM (Pmode,
65b688d7 1888 gen_rtx_PLUS (Pmode,
1889 stack_pointer_rtx,
1890 GEN_INT(offset))));
747fe2d1 1891 offset -= 4;
1892 }
1893
2571646d 1894 code = recog (restore_all, NULL_RTX, NULL);
d022cb59 1895
747fe2d1 1896 if (code >= 0)
1897 {
1898 rtx insn;
1899
1900 actual_fsize -= alloc_stack;
85a79c1e 1901 increment_stack (actual_fsize, false);
747fe2d1 1902
1903 insn = emit_jump_insn (restore_all);
1904 INSN_CODE (insn) = code;
747fe2d1 1905 }
1906 else
1907 restore_all = NULL_RTX;
1908 }
1909 }
1910
d15353b6 1911 /* If no epilogue save function is available, restore the registers the
d022cb59 1912 old fashioned way (one by one). */
747fe2d1 1913 if (!restore_all)
1914 {
65b688d7 1915 unsigned int init_stack_free;
1916
747fe2d1 1917 /* If the stack is large, we need to cut it down in 2 pieces. */
65b688d7 1918 if (interrupt_handler)
1919 init_stack_free = 0;
1920 else if (actual_fsize && !CONST_OK_FOR_K (-actual_fsize))
747fe2d1 1921 init_stack_free = 4 * num_restore;
1922 else
4c369c58 1923 init_stack_free = (signed) actual_fsize;
747fe2d1 1924
d022cb59 1925 /* Deallocate the rest of the stack if it is > 32K. */
ef51d1e3 1926 if ((unsigned int) actual_fsize > init_stack_free)
85a79c1e 1927 increment_stack (actual_fsize - init_stack_free, false);
747fe2d1 1928
1929 /* Special case interrupt functions that save all registers
1930 for a call. */
26845ab8 1931 if (interrupt_handler && ((1L << LINK_POINTER_REGNUM) & reg_saved) != 0)
1932 {
65b688d7 1933 if (! TARGET_DISABLE_CALLT)
5dd3389c 1934 emit_insn (gen_callt_restore_all_interrupt ());
1935 else
1936 emit_insn (gen_restore_all_interrupt ());
26845ab8 1937 }
747fe2d1 1938 else
1939 {
d022cb59 1940 /* Restore registers from the beginning of the stack frame. */
65b688d7 1941 int offset = init_stack_free - 4;
747fe2d1 1942
1943 /* Restore the return pointer first. */
26845ab8 1944 if (num_restore > 0
1945 && REGNO (restore_regs [num_restore - 1]) == LINK_POINTER_REGNUM)
747fe2d1 1946 {
1947 emit_move_insn (restore_regs[--num_restore],
7014838c 1948 gen_rtx_MEM (SImode,
29c05e22 1949 plus_constant (Pmode,
1950 stack_pointer_rtx,
7014838c 1951 offset)));
747fe2d1 1952 offset -= 4;
1953 }
1954
1955 for (i = 0; i < num_restore; i++)
1956 {
1957 emit_move_insn (restore_regs[i],
7014838c 1958 gen_rtx_MEM (SImode,
29c05e22 1959 plus_constant (Pmode,
1960 stack_pointer_rtx,
7014838c 1961 offset)));
747fe2d1 1962
18b42941 1963 emit_use (restore_regs[i]);
747fe2d1 1964 offset -= 4;
1965 }
1966
1967 /* Cut back the remainder of the stack. */
85a79c1e 1968 increment_stack (init_stack_free + crtl->args.pretend_args_size,
1969 false);
747fe2d1 1970 }
1971
1972 /* And return or use reti for interrupt handlers. */
1973 if (interrupt_handler)
5dd3389c 1974 {
9a5788ea 1975 if (! TARGET_DISABLE_CALLT && (TARGET_V850E_UP))
5dd3389c 1976 emit_insn (gen_callt_return_interrupt ());
1977 else
1978 emit_jump_insn (gen_return_interrupt ());
1979 }
747fe2d1 1980 else if (actual_fsize)
1981 emit_jump_insn (gen_return_internal ());
1982 else
5027f179 1983 emit_jump_insn (gen_return_simple ());
747fe2d1 1984 }
1985
747fe2d1 1986 v850_interrupt_cache_p = FALSE;
1987 v850_interrupt_p = FALSE;
1988}
1989
747fe2d1 1990/* Update the condition code from the insn. */
747fe2d1 1991void
39031315 1992notice_update_cc (rtx body, rtx insn)
747fe2d1 1993{
1994 switch (get_attr_cc (insn))
1995 {
1996 case CC_NONE:
1997 /* Insn does not affect CC at all. */
1998 break;
1999
2000 case CC_NONE_0HIT:
2001 /* Insn does not change CC, but the 0'th operand has been changed. */
2002 if (cc_status.value1 != 0
ed420a25 2003 && reg_overlap_mentioned_p (recog_data.operand[0], cc_status.value1))
747fe2d1 2004 cc_status.value1 = 0;
2005 break;
2006
2007 case CC_SET_ZN:
ed420a25 2008 /* Insn sets the Z,N flags of CC to recog_data.operand[0].
747fe2d1 2009 V,C is in an unusable state. */
2010 CC_STATUS_INIT;
2011 cc_status.flags |= CC_OVERFLOW_UNUSABLE | CC_NO_CARRY;
ed420a25 2012 cc_status.value1 = recog_data.operand[0];
747fe2d1 2013 break;
2014
2015 case CC_SET_ZNV:
ed420a25 2016 /* Insn sets the Z,N,V flags of CC to recog_data.operand[0].
65b688d7 2017 C is in an unusable state. */
747fe2d1 2018 CC_STATUS_INIT;
2019 cc_status.flags |= CC_NO_CARRY;
ed420a25 2020 cc_status.value1 = recog_data.operand[0];
747fe2d1 2021 break;
2022
2023 case CC_COMPARE:
2024 /* The insn is a compare instruction. */
2025 CC_STATUS_INIT;
2026 cc_status.value1 = SET_SRC (body);
2027 break;
2028
2029 case CC_CLOBBER:
2030 /* Insn doesn't leave CC in a usable state. */
2031 CC_STATUS_INIT;
2032 break;
c60e4982 2033
2034 default:
2035 break;
747fe2d1 2036 }
2037}
65b688d7 2038
a821813a 2039/* Retrieve the data area that has been chosen for the given decl. */
747fe2d1 2040
a821813a 2041v850_data_area
39031315 2042v850_get_data_area (tree decl)
a821813a 2043{
e3c541f0 2044 if (lookup_attribute ("sda", DECL_ATTRIBUTES (decl)) != NULL_TREE)
a821813a 2045 return DATA_AREA_SDA;
2046
e3c541f0 2047 if (lookup_attribute ("tda", DECL_ATTRIBUTES (decl)) != NULL_TREE)
a821813a 2048 return DATA_AREA_TDA;
2049
e3c541f0 2050 if (lookup_attribute ("zda", DECL_ATTRIBUTES (decl)) != NULL_TREE)
a821813a 2051 return DATA_AREA_ZDA;
2052
2053 return DATA_AREA_NORMAL;
2054}
747fe2d1 2055
a821813a 2056/* Store the indicated data area in the decl's attributes. */
2057
2058static void
39031315 2059v850_set_data_area (tree decl, v850_data_area data_area)
a821813a 2060{
2061 tree name;
2062
2063 switch (data_area)
2064 {
2065 case DATA_AREA_SDA: name = get_identifier ("sda"); break;
2066 case DATA_AREA_TDA: name = get_identifier ("tda"); break;
2067 case DATA_AREA_ZDA: name = get_identifier ("zda"); break;
2068 default:
2069 return;
2070 }
2071
e3c541f0 2072 DECL_ATTRIBUTES (decl) = tree_cons
2073 (name, NULL, DECL_ATTRIBUTES (decl));
a821813a 2074}
2075\f
e3c541f0 2076/* Handle an "interrupt" attribute; arguments as in
2077 struct attribute_spec.handler. */
2078static tree
39031315 2079v850_handle_interrupt_attribute (tree * node,
2080 tree name,
2081 tree args ATTRIBUTE_UNUSED,
2082 int flags ATTRIBUTE_UNUSED,
2083 bool * no_add_attrs)
e3c541f0 2084{
2085 if (TREE_CODE (*node) != FUNCTION_DECL)
2086 {
67a779df 2087 warning (OPT_Wattributes, "%qE attribute only applies to functions",
2088 name);
e3c541f0 2089 *no_add_attrs = true;
2090 }
2091
2092 return NULL_TREE;
2093}
2094
2095/* Handle a "sda", "tda" or "zda" attribute; arguments as in
2096 struct attribute_spec.handler. */
2097static tree
39031315 2098v850_handle_data_area_attribute (tree* node,
2099 tree name,
2100 tree args ATTRIBUTE_UNUSED,
2101 int flags ATTRIBUTE_UNUSED,
2102 bool * no_add_attrs)
747fe2d1 2103{
a821813a 2104 v850_data_area data_area;
2105 v850_data_area area;
e3c541f0 2106 tree decl = *node;
747fe2d1 2107
a821813a 2108 /* Implement data area attribute. */
e3c541f0 2109 if (is_attribute_p ("sda", name))
a821813a 2110 data_area = DATA_AREA_SDA;
e3c541f0 2111 else if (is_attribute_p ("tda", name))
a821813a 2112 data_area = DATA_AREA_TDA;
e3c541f0 2113 else if (is_attribute_p ("zda", name))
a821813a 2114 data_area = DATA_AREA_ZDA;
2115 else
9623efd7 2116 gcc_unreachable ();
a821813a 2117
2118 switch (TREE_CODE (decl))
2119 {
2120 case VAR_DECL:
2121 if (current_function_decl != NULL_TREE)
e3c541f0 2122 {
712d2297 2123 error_at (DECL_SOURCE_LOCATION (decl),
2124 "data area attributes cannot be specified for "
2125 "local variables");
e3c541f0 2126 *no_add_attrs = true;
2127 }
2128
a821813a 2129 /* Drop through. */
2130
2131 case FUNCTION_DECL:
2132 area = v850_get_data_area (decl);
2133 if (area != DATA_AREA_NORMAL && data_area != area)
e3c541f0 2134 {
3cf8b391 2135 error ("data area of %q+D conflicts with previous declaration",
2136 decl);
e3c541f0 2137 *no_add_attrs = true;
2138 }
2139 break;
a821813a 2140
2141 default:
2142 break;
2143 }
e3c541f0 2144
2145 return NULL_TREE;
747fe2d1 2146}
2147
2148\f
2149/* Return nonzero if FUNC is an interrupt function as specified
2150 by the "interrupt" attribute. */
2151
2152int
39031315 2153v850_interrupt_function_p (tree func)
747fe2d1 2154{
2155 tree a;
2156 int ret = 0;
2157
2158 if (v850_interrupt_cache_p)
2159 return v850_interrupt_p;
2160
2161 if (TREE_CODE (func) != FUNCTION_DECL)
2162 return 0;
2163
e3c541f0 2164 a = lookup_attribute ("interrupt_handler", DECL_ATTRIBUTES (func));
747fe2d1 2165 if (a != NULL_TREE)
2166 ret = 1;
2167
2168 else
2169 {
e3c541f0 2170 a = lookup_attribute ("interrupt", DECL_ATTRIBUTES (func));
747fe2d1 2171 ret = a != NULL_TREE;
2172 }
2173
2174 /* Its not safe to trust global variables until after function inlining has
2175 been done. */
2176 if (reload_completed | reload_in_progress)
2177 v850_interrupt_p = ret;
2178
2179 return ret;
2180}
2181
2182\f
7811991d 2183static void
39031315 2184v850_encode_data_area (tree decl, rtx symbol)
747fe2d1 2185{
91efe10c 2186 int flags;
a821813a 2187
efee20da 2188 /* Map explicit sections into the appropriate attribute */
a821813a 2189 if (v850_get_data_area (decl) == DATA_AREA_NORMAL)
2190 {
2191 if (DECL_SECTION_NAME (decl))
2192 {
9a356c3c 2193 const char *name = TREE_STRING_POINTER (DECL_SECTION_NAME (decl));
a821813a 2194
2195 if (streq (name, ".zdata") || streq (name, ".zbss"))
2196 v850_set_data_area (decl, DATA_AREA_ZDA);
2197
2198 else if (streq (name, ".sdata") || streq (name, ".sbss"))
2199 v850_set_data_area (decl, DATA_AREA_SDA);
2200
2201 else if (streq (name, ".tdata"))
2202 v850_set_data_area (decl, DATA_AREA_TDA);
2203 }
2204
2205 /* If no attribute, support -m{zda,sda,tda}=n */
2206 else
2207 {
2208 int size = int_size_in_bytes (TREE_TYPE (decl));
2209 if (size <= 0)
2210 ;
2211
34491a51 2212 else if (size <= small_memory_max [(int) SMALL_MEMORY_TDA])
a821813a 2213 v850_set_data_area (decl, DATA_AREA_TDA);
2214
34491a51 2215 else if (size <= small_memory_max [(int) SMALL_MEMORY_SDA])
a821813a 2216 v850_set_data_area (decl, DATA_AREA_SDA);
2217
34491a51 2218 else if (size <= small_memory_max [(int) SMALL_MEMORY_ZDA])
a821813a 2219 v850_set_data_area (decl, DATA_AREA_ZDA);
2220 }
2221
2222 if (v850_get_data_area (decl) == DATA_AREA_NORMAL)
2223 return;
2224 }
2225
91efe10c 2226 flags = SYMBOL_REF_FLAGS (symbol);
a821813a 2227 switch (v850_get_data_area (decl))
2228 {
91efe10c 2229 case DATA_AREA_ZDA: flags |= SYMBOL_FLAG_ZDA; break;
2230 case DATA_AREA_TDA: flags |= SYMBOL_FLAG_TDA; break;
2231 case DATA_AREA_SDA: flags |= SYMBOL_FLAG_SDA; break;
9623efd7 2232 default: gcc_unreachable ();
a821813a 2233 }
91efe10c 2234 SYMBOL_REF_FLAGS (symbol) = flags;
747fe2d1 2235}
65c7acad 2236
7811991d 2237static void
39031315 2238v850_encode_section_info (tree decl, rtx rtl, int first)
7811991d 2239{
2c129d70 2240 default_encode_section_info (decl, rtl, first);
91efe10c 2241
2242 if (TREE_CODE (decl) == VAR_DECL
7811991d 2243 && (TREE_STATIC (decl) || DECL_EXTERNAL (decl)))
2c129d70 2244 v850_encode_data_area (decl, XEXP (rtl, 0));
7811991d 2245}
2246
65c7acad 2247/* Construct a JR instruction to a routine that will perform the equivalent of
2248 the RTL passed in as an argument. This RTL is a function epilogue that
2249 pops registers off the stack and possibly releases some extra stack space
2250 as well. The code has already verified that the RTL matches these
2251 requirements. */
65b688d7 2252
65c7acad 2253char *
39031315 2254construct_restore_jr (rtx op)
65c7acad 2255{
2256 int count = XVECLEN (op, 0);
2257 int stack_bytes;
2258 unsigned long int mask;
2259 unsigned long int first;
2260 unsigned long int last;
2261 int i;
2262 static char buff [100]; /* XXX */
2263
2264 if (count <= 2)
2265 {
0a81f5a0 2266 error ("bogus JR construction: %d", count);
65c7acad 2267 return NULL;
2268 }
2269
2270 /* Work out how many bytes to pop off the stack before retrieving
2271 registers. */
9623efd7 2272 gcc_assert (GET_CODE (XVECEXP (op, 0, 1)) == SET);
2273 gcc_assert (GET_CODE (SET_SRC (XVECEXP (op, 0, 1))) == PLUS);
2274 gcc_assert (GET_CODE (XEXP (SET_SRC (XVECEXP (op, 0, 1)), 1)) == CONST_INT);
65c7acad 2275
2276 stack_bytes = INTVAL (XEXP (SET_SRC (XVECEXP (op, 0, 1)), 1));
2277
df978151 2278 /* Each pop will remove 4 bytes from the stack.... */
65c7acad 2279 stack_bytes -= (count - 2) * 4;
2280
2281 /* Make sure that the amount we are popping either 0 or 16 bytes. */
65b688d7 2282 if (stack_bytes != 0)
65c7acad 2283 {
68435912 2284 error ("bad amount of stack space removal: %d", stack_bytes);
65c7acad 2285 return NULL;
2286 }
2287
2288 /* Now compute the bit mask of registers to push. */
2289 mask = 0;
2290 for (i = 2; i < count; i++)
2291 {
2292 rtx vector_element = XVECEXP (op, 0, i);
2293
9623efd7 2294 gcc_assert (GET_CODE (vector_element) == SET);
2295 gcc_assert (GET_CODE (SET_DEST (vector_element)) == REG);
2296 gcc_assert (register_is_ok_for_epilogue (SET_DEST (vector_element),
2297 SImode));
65c7acad 2298
2299 mask |= 1 << REGNO (SET_DEST (vector_element));
2300 }
2301
2302 /* Scan for the first register to pop. */
2303 for (first = 0; first < 32; first++)
2304 {
2305 if (mask & (1 << first))
2306 break;
2307 }
2308
9623efd7 2309 gcc_assert (first < 32);
65c7acad 2310
2311 /* Discover the last register to pop. */
26845ab8 2312 if (mask & (1 << LINK_POINTER_REGNUM))
65c7acad 2313 {
26845ab8 2314 last = LINK_POINTER_REGNUM;
65c7acad 2315 }
2316 else
2317 {
9623efd7 2318 gcc_assert (!stack_bytes);
2319 gcc_assert (mask & (1 << 29));
65c7acad 2320
2321 last = 29;
2322 }
2323
a59e9a3a 2324 /* Note, it is possible to have gaps in the register mask.
2325 We ignore this here, and generate a JR anyway. We will
a821813a 2326 be popping more registers than is strictly necessary, but
a59e9a3a 2327 it does save code space. */
2328
79d5927f 2329 if (TARGET_LONG_CALLS)
2330 {
2331 char name[40];
2332
2333 if (first == last)
2334 sprintf (name, "__return_%s", reg_names [first]);
2335 else
2336 sprintf (name, "__return_%s_%s", reg_names [first], reg_names [last]);
2337
2338 sprintf (buff, "movhi hi(%s), r0, r6\n\tmovea lo(%s), r6, r6\n\tjmp r6",
2339 name, name);
2340 }
65c7acad 2341 else
79d5927f 2342 {
2343 if (first == last)
2344 sprintf (buff, "jr __return_%s", reg_names [first]);
2345 else
2346 sprintf (buff, "jr __return_%s_%s", reg_names [first], reg_names [last]);
2347 }
2348
65c7acad 2349 return buff;
2350}
2351
2352
65c7acad 2353/* Construct a JARL instruction to a routine that will perform the equivalent
2354 of the RTL passed as a parameter. This RTL is a function prologue that
2355 saves some of the registers r20 - r31 onto the stack, and possibly acquires
2356 some stack space as well. The code has already verified that the RTL
2357 matches these requirements. */
2358char *
39031315 2359construct_save_jarl (rtx op)
65c7acad 2360{
2361 int count = XVECLEN (op, 0);
2362 int stack_bytes;
2363 unsigned long int mask;
2364 unsigned long int first;
2365 unsigned long int last;
2366 int i;
2367 static char buff [100]; /* XXX */
2368
65b688d7 2369 if (count <= (TARGET_LONG_CALLS ? 3 : 2))
65c7acad 2370 {
bf776685 2371 error ("bogus JARL construction: %d", count);
65c7acad 2372 return NULL;
2373 }
2374
2375 /* Paranoia. */
9623efd7 2376 gcc_assert (GET_CODE (XVECEXP (op, 0, 0)) == SET);
2377 gcc_assert (GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) == PLUS);
2378 gcc_assert (GET_CODE (XEXP (SET_SRC (XVECEXP (op, 0, 0)), 0)) == REG);
2379 gcc_assert (GET_CODE (XEXP (SET_SRC (XVECEXP (op, 0, 0)), 1)) == CONST_INT);
65c7acad 2380
2381 /* Work out how many bytes to push onto the stack after storing the
2382 registers. */
2383 stack_bytes = INTVAL (XEXP (SET_SRC (XVECEXP (op, 0, 0)), 1));
2384
df978151 2385 /* Each push will put 4 bytes from the stack.... */
a184c07b 2386 stack_bytes += (count - (TARGET_LONG_CALLS ? 3 : 2)) * 4;
65c7acad 2387
2388 /* Make sure that the amount we are popping either 0 or 16 bytes. */
65b688d7 2389 if (stack_bytes != 0)
65c7acad 2390 {
68435912 2391 error ("bad amount of stack space removal: %d", stack_bytes);
65c7acad 2392 return NULL;
2393 }
2394
2395 /* Now compute the bit mask of registers to push. */
2396 mask = 0;
a184c07b 2397 for (i = 1; i < count - (TARGET_LONG_CALLS ? 2 : 1); i++)
65c7acad 2398 {
2399 rtx vector_element = XVECEXP (op, 0, i);
2400
9623efd7 2401 gcc_assert (GET_CODE (vector_element) == SET);
2402 gcc_assert (GET_CODE (SET_SRC (vector_element)) == REG);
2403 gcc_assert (register_is_ok_for_epilogue (SET_SRC (vector_element),
2404 SImode));
65c7acad 2405
2406 mask |= 1 << REGNO (SET_SRC (vector_element));
2407 }
2408
2409 /* Scan for the first register to push. */
2410 for (first = 0; first < 32; first++)
2411 {
2412 if (mask & (1 << first))
2413 break;
2414 }
2415
9623efd7 2416 gcc_assert (first < 32);
65c7acad 2417
2418 /* Discover the last register to push. */
26845ab8 2419 if (mask & (1 << LINK_POINTER_REGNUM))
65c7acad 2420 {
26845ab8 2421 last = LINK_POINTER_REGNUM;
65c7acad 2422 }
2423 else
2424 {
9623efd7 2425 gcc_assert (!stack_bytes);
2426 gcc_assert (mask & (1 << 29));
65c7acad 2427
2428 last = 29;
2429 }
2430
a59e9a3a 2431 /* Note, it is possible to have gaps in the register mask.
2432 We ignore this here, and generate a JARL anyway. We will
a821813a 2433 be pushing more registers than is strictly necessary, but
a59e9a3a 2434 it does save code space. */
2435
79d5927f 2436 if (TARGET_LONG_CALLS)
2437 {
2438 char name[40];
2439
2440 if (first == last)
2441 sprintf (name, "__save_%s", reg_names [first]);
2442 else
2443 sprintf (name, "__save_%s_%s", reg_names [first], reg_names [last]);
2444
9a5788ea 2445 if (TARGET_V850E3V5_UP)
2446 sprintf (buff, "mov hilo(%s), r11\n\tjarl [r11], r10", name);
2447 else
2448 sprintf (buff, "movhi hi(%s), r0, r11\n\tmovea lo(%s), r11, r11\n\tjarl .+4, r10\n\tadd 4, r10\n\tjmp r11",
2449 name, name);
79d5927f 2450 }
65c7acad 2451 else
79d5927f 2452 {
2453 if (first == last)
2454 sprintf (buff, "jarl __save_%s, r10", reg_names [first]);
2455 else
2456 sprintf (buff, "jarl __save_%s_%s, r10", reg_names [first],
2457 reg_names [last]);
2458 }
65c7acad 2459
2460 return buff;
2461}
2462
a821813a 2463/* A version of asm_output_aligned_bss() that copes with the special
df978151 2464 data areas of the v850. */
a821813a 2465void
39031315 2466v850_output_aligned_bss (FILE * file,
2467 tree decl,
2468 const char * name,
7781aa77 2469 unsigned HOST_WIDE_INT size,
39031315 2470 int align)
a821813a 2471{
a821813a 2472 switch (v850_get_data_area (decl))
2473 {
2474 case DATA_AREA_ZDA:
2f14b1f9 2475 switch_to_section (zbss_section);
a821813a 2476 break;
2477
2478 case DATA_AREA_SDA:
2f14b1f9 2479 switch_to_section (sbss_section);
a821813a 2480 break;
2481
2482 case DATA_AREA_TDA:
2f14b1f9 2483 switch_to_section (tdata_section);
a821813a 2484
2485 default:
2f14b1f9 2486 switch_to_section (bss_section);
a821813a 2487 break;
2488 }
2489
2490 ASM_OUTPUT_ALIGN (file, floor_log2 (align / BITS_PER_UNIT));
2491#ifdef ASM_DECLARE_OBJECT_NAME
2492 last_assemble_variable_decl = decl;
2493 ASM_DECLARE_OBJECT_NAME (file, name, decl);
2494#else
2495 /* Standard thing is just output label for the object. */
2496 ASM_OUTPUT_LABEL (file, name);
2497#endif /* ASM_DECLARE_OBJECT_NAME */
2498 ASM_OUTPUT_SKIP (file, size ? size : 1);
2499}
2500
2501/* Called via the macro ASM_OUTPUT_DECL_COMMON */
2502void
39031315 2503v850_output_common (FILE * file,
2504 tree decl,
2505 const char * name,
2506 int size,
2507 int align)
a821813a 2508{
2509 if (decl == NULL_TREE)
2510 {
0068dfb2 2511 fprintf (file, "%s", COMMON_ASM_OP);
a821813a 2512 }
2513 else
2514 {
2515 switch (v850_get_data_area (decl))
2516 {
2517 case DATA_AREA_ZDA:
0068dfb2 2518 fprintf (file, "%s", ZCOMMON_ASM_OP);
a821813a 2519 break;
2520
2521 case DATA_AREA_SDA:
0068dfb2 2522 fprintf (file, "%s", SCOMMON_ASM_OP);
a821813a 2523 break;
2524
2525 case DATA_AREA_TDA:
0068dfb2 2526 fprintf (file, "%s", TCOMMON_ASM_OP);
a821813a 2527 break;
2528
2529 default:
0068dfb2 2530 fprintf (file, "%s", COMMON_ASM_OP);
a821813a 2531 break;
2532 }
2533 }
2534
2535 assemble_name (file, name);
2536 fprintf (file, ",%u,%u\n", size, align / BITS_PER_UNIT);
2537}
2538
2539/* Called via the macro ASM_OUTPUT_DECL_LOCAL */
2540void
39031315 2541v850_output_local (FILE * file,
2542 tree decl,
2543 const char * name,
2544 int size,
2545 int align)
a821813a 2546{
0068dfb2 2547 fprintf (file, "%s", LOCAL_ASM_OP);
a821813a 2548 assemble_name (file, name);
2549 fprintf (file, "\n");
2550
2551 ASM_OUTPUT_ALIGNED_DECL_COMMON (file, decl, name, size, align);
2552}
a821813a 2553
2554/* Add data area to the given declaration if a ghs data area pragma is
2555 currently in effect (#pragma ghs startXXX/endXXX). */
8ee295a7 2556static void
39031315 2557v850_insert_attributes (tree decl, tree * attr_ptr ATTRIBUTE_UNUSED )
a821813a 2558{
2559 if (data_area_stack
2560 && data_area_stack->data_area
2561 && current_function_decl == NULL_TREE
2562 && (TREE_CODE (decl) == VAR_DECL || TREE_CODE (decl) == CONST_DECL)
2563 && v850_get_data_area (decl) == DATA_AREA_NORMAL)
2564 v850_set_data_area (decl, data_area_stack->data_area);
2565
457275b6 2566 /* Initialize the default names of the v850 specific sections,
a821813a 2567 if this has not been done before. */
2568
2569 if (GHS_default_section_names [(int) GHS_SECTION_KIND_SDATA] == NULL)
2570 {
2571 GHS_default_section_names [(int) GHS_SECTION_KIND_SDATA]
2572 = build_string (sizeof (".sdata")-1, ".sdata");
2573
2574 GHS_default_section_names [(int) GHS_SECTION_KIND_ROSDATA]
2575 = build_string (sizeof (".rosdata")-1, ".rosdata");
2576
2577 GHS_default_section_names [(int) GHS_SECTION_KIND_TDATA]
2578 = build_string (sizeof (".tdata")-1, ".tdata");
2579
2580 GHS_default_section_names [(int) GHS_SECTION_KIND_ZDATA]
2581 = build_string (sizeof (".zdata")-1, ".zdata");
2582
2583 GHS_default_section_names [(int) GHS_SECTION_KIND_ROZDATA]
2584 = build_string (sizeof (".rozdata")-1, ".rozdata");
2585 }
2586
2587 if (current_function_decl == NULL_TREE
2588 && (TREE_CODE (decl) == VAR_DECL
2589 || TREE_CODE (decl) == CONST_DECL
2590 || TREE_CODE (decl) == FUNCTION_DECL)
2591 && (!DECL_EXTERNAL (decl) || DECL_INITIAL (decl))
2592 && !DECL_SECTION_NAME (decl))
2593 {
2594 enum GHS_section_kind kind = GHS_SECTION_KIND_DEFAULT;
2595 tree chosen_section;
2596
2597 if (TREE_CODE (decl) == FUNCTION_DECL)
2598 kind = GHS_SECTION_KIND_TEXT;
2599 else
2600 {
df978151 2601 /* First choose a section kind based on the data area of the decl. */
a821813a 2602 switch (v850_get_data_area (decl))
2603 {
2604 default:
9623efd7 2605 gcc_unreachable ();
a821813a 2606
2607 case DATA_AREA_SDA:
2608 kind = ((TREE_READONLY (decl))
2609 ? GHS_SECTION_KIND_ROSDATA
2610 : GHS_SECTION_KIND_SDATA);
2611 break;
2612
2613 case DATA_AREA_TDA:
2614 kind = GHS_SECTION_KIND_TDATA;
2615 break;
2616
2617 case DATA_AREA_ZDA:
2618 kind = ((TREE_READONLY (decl))
2619 ? GHS_SECTION_KIND_ROZDATA
2620 : GHS_SECTION_KIND_ZDATA);
2621 break;
2622
2623 case DATA_AREA_NORMAL: /* default data area */
2624 if (TREE_READONLY (decl))
2625 kind = GHS_SECTION_KIND_RODATA;
2626 else if (DECL_INITIAL (decl))
2627 kind = GHS_SECTION_KIND_DATA;
2628 else
2629 kind = GHS_SECTION_KIND_BSS;
2630 }
2631 }
2632
2633 /* Now, if the section kind has been explicitly renamed,
df978151 2634 then attach a section attribute. */
a821813a 2635 chosen_section = GHS_current_section_names [(int) kind];
2636
2637 /* Otherwise, if this kind of section needs an explicit section
df978151 2638 attribute, then also attach one. */
a821813a 2639 if (chosen_section == NULL)
2640 chosen_section = GHS_default_section_names [(int) kind];
2641
2642 if (chosen_section)
2643 {
2644 /* Only set the section name if specified by a pragma, because
2645 otherwise it will force those variables to get allocated storage
2646 in this module, rather than by the linker. */
2647 DECL_SECTION_NAME (decl) = chosen_section;
2648 }
2649 }
2650}
5dd3389c 2651
5dd3389c 2652/* Construct a DISPOSE instruction that is the equivalent of
2653 the given RTX. We have already verified that this should
2654 be possible. */
2655
2656char *
39031315 2657construct_dispose_instruction (rtx op)
5dd3389c 2658{
2659 int count = XVECLEN (op, 0);
2660 int stack_bytes;
2661 unsigned long int mask;
2662 int i;
2663 static char buff[ 100 ]; /* XXX */
2664 int use_callt = 0;
2665
2666 if (count <= 2)
2667 {
0a81f5a0 2668 error ("bogus DISPOSE construction: %d", count);
5dd3389c 2669 return NULL;
2670 }
2671
2672 /* Work out how many bytes to pop off the
2673 stack before retrieving registers. */
9623efd7 2674 gcc_assert (GET_CODE (XVECEXP (op, 0, 1)) == SET);
2675 gcc_assert (GET_CODE (SET_SRC (XVECEXP (op, 0, 1))) == PLUS);
2676 gcc_assert (GET_CODE (XEXP (SET_SRC (XVECEXP (op, 0, 1)), 1)) == CONST_INT);
5dd3389c 2677
2678 stack_bytes = INTVAL (XEXP (SET_SRC (XVECEXP (op, 0, 1)), 1));
2679
df978151 2680 /* Each pop will remove 4 bytes from the stack.... */
5dd3389c 2681 stack_bytes -= (count - 2) * 4;
2682
2683 /* Make sure that the amount we are popping
2684 will fit into the DISPOSE instruction. */
2685 if (stack_bytes > 128)
2686 {
0a81f5a0 2687 error ("too much stack space to dispose of: %d", stack_bytes);
5dd3389c 2688 return NULL;
2689 }
2690
2691 /* Now compute the bit mask of registers to push. */
2692 mask = 0;
2693
2694 for (i = 2; i < count; i++)
2695 {
2696 rtx vector_element = XVECEXP (op, 0, i);
2697
9623efd7 2698 gcc_assert (GET_CODE (vector_element) == SET);
2699 gcc_assert (GET_CODE (SET_DEST (vector_element)) == REG);
2700 gcc_assert (register_is_ok_for_epilogue (SET_DEST (vector_element),
2701 SImode));
5dd3389c 2702
2703 if (REGNO (SET_DEST (vector_element)) == 2)
2704 use_callt = 1;
2705 else
2706 mask |= 1 << REGNO (SET_DEST (vector_element));
2707 }
2708
2709 if (! TARGET_DISABLE_CALLT
65b688d7 2710 && (use_callt || stack_bytes == 0))
5dd3389c 2711 {
2712 if (use_callt)
2713 {
2714 sprintf (buff, "callt ctoff(__callt_return_r2_r%d)", (mask & (1 << 31)) ? 31 : 29);
2715 return buff;
2716 }
2717 else
2718 {
2719 for (i = 20; i < 32; i++)
2720 if (mask & (1 << i))
2721 break;
2722
2723 if (i == 31)
2724 sprintf (buff, "callt ctoff(__callt_return_r31c)");
2725 else
65b688d7 2726 sprintf (buff, "callt ctoff(__callt_return_r%d_r%s)",
2727 i, (mask & (1 << 31)) ? "31c" : "29");
5dd3389c 2728 }
2729 }
2730 else
2731 {
2732 static char regs [100]; /* XXX */
2733 int done_one;
2734
2735 /* Generate the DISPOSE instruction. Note we could just issue the
2736 bit mask as a number as the assembler can cope with this, but for
2737 the sake of our readers we turn it into a textual description. */
2738 regs[0] = 0;
2739 done_one = 0;
2740
2741 for (i = 20; i < 32; i++)
2742 {
2743 if (mask & (1 << i))
2744 {
2745 int first;
2746
2747 if (done_one)
2748 strcat (regs, ", ");
2749 else
2750 done_one = 1;
2751
2752 first = i;
2753 strcat (regs, reg_names[ first ]);
2754
2755 for (i++; i < 32; i++)
2756 if ((mask & (1 << i)) == 0)
2757 break;
2758
2759 if (i > first + 1)
2760 {
2761 strcat (regs, " - ");
2762 strcat (regs, reg_names[ i - 1 ] );
2763 }
2764 }
2765 }
2766
2767 sprintf (buff, "dispose %d {%s}, r31", stack_bytes / 4, regs);
2768 }
2769
2770 return buff;
2771}
2772
5dd3389c 2773/* Construct a PREPARE instruction that is the equivalent of
2774 the given RTL. We have already verified that this should
2775 be possible. */
2776
2777char *
39031315 2778construct_prepare_instruction (rtx op)
5dd3389c 2779{
65b688d7 2780 int count;
5dd3389c 2781 int stack_bytes;
2782 unsigned long int mask;
2783 int i;
2784 static char buff[ 100 ]; /* XXX */
2785 int use_callt = 0;
2786
65b688d7 2787 if (XVECLEN (op, 0) <= 1)
5dd3389c 2788 {
65b688d7 2789 error ("bogus PREPEARE construction: %d", XVECLEN (op, 0));
5dd3389c 2790 return NULL;
2791 }
2792
2793 /* Work out how many bytes to push onto
2794 the stack after storing the registers. */
9623efd7 2795 gcc_assert (GET_CODE (XVECEXP (op, 0, 0)) == SET);
2796 gcc_assert (GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) == PLUS);
2797 gcc_assert (GET_CODE (XEXP (SET_SRC (XVECEXP (op, 0, 0)), 1)) == CONST_INT);
5dd3389c 2798
2799 stack_bytes = INTVAL (XEXP (SET_SRC (XVECEXP (op, 0, 0)), 1));
2800
5dd3389c 2801
2802 /* Make sure that the amount we are popping
2803 will fit into the DISPOSE instruction. */
2804 if (stack_bytes < -128)
2805 {
0a81f5a0 2806 error ("too much stack space to prepare: %d", stack_bytes);
5dd3389c 2807 return NULL;
2808 }
2809
2810 /* Now compute the bit mask of registers to push. */
65b688d7 2811 count = 0;
5dd3389c 2812 mask = 0;
65b688d7 2813 for (i = 1; i < XVECLEN (op, 0); i++)
5dd3389c 2814 {
2815 rtx vector_element = XVECEXP (op, 0, i);
2816
65b688d7 2817 if (GET_CODE (vector_element) == CLOBBER)
2818 continue;
2819
9623efd7 2820 gcc_assert (GET_CODE (vector_element) == SET);
2821 gcc_assert (GET_CODE (SET_SRC (vector_element)) == REG);
2822 gcc_assert (register_is_ok_for_epilogue (SET_SRC (vector_element),
2823 SImode));
5dd3389c 2824
2825 if (REGNO (SET_SRC (vector_element)) == 2)
2826 use_callt = 1;
2827 else
2828 mask |= 1 << REGNO (SET_SRC (vector_element));
65b688d7 2829 count++;
5dd3389c 2830 }
2831
65b688d7 2832 stack_bytes += count * 4;
2833
5dd3389c 2834 if ((! TARGET_DISABLE_CALLT)
65b688d7 2835 && (use_callt || stack_bytes == 0))
5dd3389c 2836 {
2837 if (use_callt)
2838 {
2839 sprintf (buff, "callt ctoff(__callt_save_r2_r%d)", (mask & (1 << 31)) ? 31 : 29 );
2840 return buff;
2841 }
2842
2843 for (i = 20; i < 32; i++)
2844 if (mask & (1 << i))
2845 break;
2846
2847 if (i == 31)
2848 sprintf (buff, "callt ctoff(__callt_save_r31c)");
2849 else
65b688d7 2850 sprintf (buff, "callt ctoff(__callt_save_r%d_r%s)",
2851 i, (mask & (1 << 31)) ? "31c" : "29");
5dd3389c 2852 }
2853 else
2854 {
2855 static char regs [100]; /* XXX */
2856 int done_one;
2857
2858
2859 /* Generate the PREPARE instruction. Note we could just issue the
2860 bit mask as a number as the assembler can cope with this, but for
2861 the sake of our readers we turn it into a textual description. */
2862 regs[0] = 0;
2863 done_one = 0;
2864
2865 for (i = 20; i < 32; i++)
2866 {
2867 if (mask & (1 << i))
2868 {
2869 int first;
2870
2871 if (done_one)
2872 strcat (regs, ", ");
2873 else
2874 done_one = 1;
2875
2876 first = i;
2877 strcat (regs, reg_names[ first ]);
2878
2879 for (i++; i < 32; i++)
2880 if ((mask & (1 << i)) == 0)
2881 break;
2882
2883 if (i > first + 1)
2884 {
2885 strcat (regs, " - ");
2886 strcat (regs, reg_names[ i - 1 ] );
2887 }
2888 }
2889 }
2890
2891 sprintf (buff, "prepare {%s}, %d", regs, (- stack_bytes) / 4);
2892 }
2893
2894 return buff;
2895}
65b688d7 2896
3756cb89 2897/* Return an RTX indicating where the return address to the
2898 calling function can be found. */
2899
2900rtx
39031315 2901v850_return_addr (int count)
3756cb89 2902{
2903 if (count != 0)
2904 return const0_rtx;
2905
01d08833 2906 return get_hard_reg_initial_val (Pmode, LINK_POINTER_REGNUM);
3756cb89 2907}
52470889 2908\f
2f14b1f9 2909/* Implement TARGET_ASM_INIT_SECTIONS. */
2910
52470889 2911static void
2f14b1f9 2912v850_asm_init_sections (void)
2913{
2914 rosdata_section
2915 = get_unnamed_section (0, output_section_asm_op,
2916 "\t.section .rosdata,\"a\"");
2917
2918 rozdata_section
2919 = get_unnamed_section (0, output_section_asm_op,
2920 "\t.section .rozdata,\"a\"");
2921
2922 tdata_section
2923 = get_unnamed_section (SECTION_WRITE, output_section_asm_op,
2924 "\t.section .tdata,\"aw\"");
2925
2926 zdata_section
2927 = get_unnamed_section (SECTION_WRITE, output_section_asm_op,
2928 "\t.section .zdata,\"aw\"");
2929
2930 zbss_section
2931 = get_unnamed_section (SECTION_WRITE | SECTION_BSS,
2932 output_section_asm_op,
2933 "\t.section .zbss,\"aw\"");
2934}
2935
2936static section *
39031315 2937v850_select_section (tree exp,
2938 int reloc ATTRIBUTE_UNUSED,
2939 unsigned HOST_WIDE_INT align ATTRIBUTE_UNUSED)
52470889 2940{
2941 if (TREE_CODE (exp) == VAR_DECL)
2942 {
2943 int is_const;
2944 if (!TREE_READONLY (exp)
2945 || TREE_SIDE_EFFECTS (exp)
2946 || !DECL_INITIAL (exp)
2947 || (DECL_INITIAL (exp) != error_mark_node
2948 && !TREE_CONSTANT (DECL_INITIAL (exp))))
2949 is_const = FALSE;
2950 else
2951 is_const = TRUE;
2952
2953 switch (v850_get_data_area (exp))
2954 {
2955 case DATA_AREA_ZDA:
2f14b1f9 2956 return is_const ? rozdata_section : zdata_section;
52470889 2957
2958 case DATA_AREA_TDA:
2f14b1f9 2959 return tdata_section;
52470889 2960
2961 case DATA_AREA_SDA:
2f14b1f9 2962 return is_const ? rosdata_section : sdata_section;
52470889 2963
2964 default:
2f14b1f9 2965 return is_const ? readonly_data_section : data_section;
52470889 2966 }
2967 }
2f14b1f9 2968 return readonly_data_section;
52470889 2969}
6aa67e60 2970\f
c60e4982 2971/* Worker function for TARGET_FUNCTION_VALUE_REGNO_P. */
2972
2973static bool
2974v850_function_value_regno_p (const unsigned int regno)
2975{
2976 return (regno == 10);
2977}
2978
6aa67e60 2979/* Worker function for TARGET_RETURN_IN_MEMORY. */
2980
2981static bool
fb80456a 2982v850_return_in_memory (const_tree type, const_tree fntype ATTRIBUTE_UNUSED)
6aa67e60 2983{
2984 /* Return values > 8 bytes in length in memory. */
85a79c1e 2985 return int_size_in_bytes (type) > 8
2986 || TYPE_MODE (type) == BLKmode
2987 /* With the rh850 ABI return all aggregates in memory. */
2988 || ((! TARGET_GCC_ABI) && AGGREGATE_TYPE_P (type))
2989 ;
6aa67e60 2990}
105c31a7 2991
2992/* Worker function for TARGET_FUNCTION_VALUE. */
2993
c60e4982 2994static rtx
105c31a7 2995v850_function_value (const_tree valtype,
2996 const_tree fn_decl_or_type ATTRIBUTE_UNUSED,
2997 bool outgoing ATTRIBUTE_UNUSED)
2998{
2999 return gen_rtx_REG (TYPE_MODE (valtype), 10);
3000}
3001
6aa67e60 3002\f
cd90919d 3003/* Worker function for TARGET_CAN_ELIMINATE. */
3004
12b3af25 3005static bool
cd90919d 3006v850_can_eliminate (const int from ATTRIBUTE_UNUSED, const int to)
3007{
3008 return (to == STACK_POINTER_REGNUM ? ! frame_pointer_needed : true);
3009}
3010
b2d7ede1 3011/* Worker function for TARGET_CONDITIONAL_REGISTER_USAGE.
3012
3013 If TARGET_APP_REGS is not defined then add r2 and r5 to
3014 the pool of fixed registers. See PR 14505. */
3015
3016static void
3017v850_conditional_register_usage (void)
3018{
3019 if (TARGET_APP_REGS)
3020 {
3021 fixed_regs[2] = 0; call_used_regs[2] = 0;
3022 fixed_regs[5] = 0; call_used_regs[5] = 1;
3023 }
3024}
12b3af25 3025\f
3026/* Worker function for TARGET_ASM_TRAMPOLINE_TEMPLATE. */
3027
3028static void
3029v850_asm_trampoline_template (FILE *f)
3030{
3031 fprintf (f, "\tjarl .+4,r12\n");
3032 fprintf (f, "\tld.w 12[r12],r20\n");
3033 fprintf (f, "\tld.w 16[r12],r12\n");
3034 fprintf (f, "\tjmp [r12]\n");
3035 fprintf (f, "\tnop\n");
3036 fprintf (f, "\t.long 0\n");
3037 fprintf (f, "\t.long 0\n");
3038}
3039
3040/* Worker function for TARGET_TRAMPOLINE_INIT. */
3041
3042static void
3043v850_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value)
3044{
3045 rtx mem, fnaddr = XEXP (DECL_RTL (fndecl), 0);
3046
3047 emit_block_move (m_tramp, assemble_trampoline_template (),
3048 GEN_INT (TRAMPOLINE_SIZE), BLOCK_OP_NORMAL);
3049
3050 mem = adjust_address (m_tramp, SImode, 16);
3051 emit_move_insn (mem, chain_value);
3052 mem = adjust_address (m_tramp, SImode, 20);
3053 emit_move_insn (mem, fnaddr);
3054}
65b688d7 3055
3056static int
3057v850_issue_rate (void)
3058{
9a5788ea 3059 return (TARGET_V850E2_UP ? 2 : 1);
65b688d7 3060}
ca316360 3061
3062/* Implement TARGET_LEGITIMATE_CONSTANT_P. */
3063
3064static bool
3065v850_legitimate_constant_p (enum machine_mode mode ATTRIBUTE_UNUSED, rtx x)
3066{
3067 return (GET_CODE (x) == CONST_DOUBLE
3068 || !(GET_CODE (x) == CONST
3069 && GET_CODE (XEXP (x, 0)) == PLUS
3070 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
3071 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT
3072 && !CONST_OK_FOR_K (INTVAL (XEXP (XEXP (x, 0), 1)))));
3073}
f5ec6516 3074
3075static int
3f6c197f 3076v850_memory_move_cost (enum machine_mode mode,
3077 reg_class_t reg_class ATTRIBUTE_UNUSED,
3078 bool in)
f5ec6516 3079{
3080 switch (GET_MODE_SIZE (mode))
3081 {
3082 case 0:
3083 return in ? 24 : 8;
3084 case 1:
3085 case 2:
3086 case 3:
3087 case 4:
3088 return in ? 6 : 2;
3089 default:
3090 return (GET_MODE_SIZE (mode) / 2) * (in ? 3 : 1);
3091 }
3092}
9a5788ea 3093
3094int
3095v850_adjust_insn_length (rtx insn, int length)
3096{
3097 if (TARGET_V850E3V5_UP)
3098 {
3099 if (CALL_P (insn))
3100 {
3101 if (TARGET_LONG_CALLS)
3102 {
3103 /* call_internal_long, call_value_internal_long. */
3104 if (length == 8)
3105 length = 4;
3106 if (length == 16)
3107 length = 10;
3108 }
3109 else
3110 {
3111 /* call_internal_short, call_value_internal_short. */
3112 if (length == 8)
3113 length = 4;
3114 }
3115 }
3116 }
3117 return length;
3118}
c60e4982 3119\f
3120/* V850 specific attributes. */
3121
3122static const struct attribute_spec v850_attribute_table[] =
3123{
ac86af5d 3124 /* { name, min_len, max_len, decl_req, type_req, fn_type_req, handler,
3125 affects_type_identity } */
3126 { "interrupt_handler", 0, 0, true, false, false,
3127 v850_handle_interrupt_attribute, false },
3128 { "interrupt", 0, 0, true, false, false,
3129 v850_handle_interrupt_attribute, false },
3130 { "sda", 0, 0, true, false, false,
3131 v850_handle_data_area_attribute, false },
3132 { "tda", 0, 0, true, false, false,
3133 v850_handle_data_area_attribute, false },
3134 { "zda", 0, 0, true, false, false,
3135 v850_handle_data_area_attribute, false },
3136 { NULL, 0, 0, false, false, false, NULL, false }
c60e4982 3137};
3138\f
85a79c1e 3139static void
3140v850_option_override (void)
9a9267b3 3141{
85a79c1e 3142 if (flag_exceptions || flag_non_call_exceptions)
3143 flag_omit_frame_pointer = 0;
9a9267b3 3144
85a79c1e 3145 /* The RH850 ABI does not (currently) support the use of the CALLT instruction. */
3146 if (! TARGET_GCC_ABI)
3147 target_flags |= MASK_DISABLE_CALLT;
3148}
9a9267b3 3149\f
9a5788ea 3150const char *
3151v850_gen_movdi (rtx * operands)
3152{
3153 if (REG_P (operands[0]))
3154 {
3155 if (REG_P (operands[1]))
3156 {
3157 if (REGNO (operands[0]) == (REGNO (operands[1]) - 1))
3158 return "mov %1, %0; mov %R1, %R0";
3159
3160 return "mov %R1, %R0; mov %1, %0";
3161 }
3162
3163 if (MEM_P (operands[1]))
3164 {
3165 if (REGNO (operands[0]) & 1)
3166 /* Use two load word instructions to synthesise a load double. */
3167 return "ld.w %1, %0 ; ld.w %R1, %R0" ;
3168
3169 return "ld.dw %1, %0";
3170 }
3171
3172 return "mov %1, %0; mov %R1, %R0";
3173 }
3174
3175 gcc_assert (REG_P (operands[1]));
3176
3177 if (REGNO (operands[1]) & 1)
3178 /* Use two store word instructions to synthesise a store double. */
3179 return "st.w %1, %0 ; st.w %R1, %R0 ";
3180
3181 return "st.dw %1, %0";
3182}
3183\f
c60e4982 3184/* Initialize the GCC target structure. */
f5ec6516 3185
85a79c1e 3186#undef TARGET_OPTION_OVERRIDE
3187#define TARGET_OPTION_OVERRIDE v850_option_override
3188
f5ec6516 3189#undef TARGET_MEMORY_MOVE_COST
85a79c1e 3190#define TARGET_MEMORY_MOVE_COST v850_memory_move_cost
f5ec6516 3191
c60e4982 3192#undef TARGET_ASM_ALIGNED_HI_OP
3193#define TARGET_ASM_ALIGNED_HI_OP "\t.hword\t"
3194
3195#undef TARGET_PRINT_OPERAND
85a79c1e 3196#define TARGET_PRINT_OPERAND v850_print_operand
c60e4982 3197#undef TARGET_PRINT_OPERAND_ADDRESS
85a79c1e 3198#define TARGET_PRINT_OPERAND_ADDRESS v850_print_operand_address
c60e4982 3199#undef TARGET_PRINT_OPERAND_PUNCT_VALID_P
85a79c1e 3200#define TARGET_PRINT_OPERAND_PUNCT_VALID_P v850_print_operand_punct_valid_p
c60e4982 3201
6d0d55a1 3202#undef TARGET_ASM_OUTPUT_ADDR_CONST_EXTRA
3203#define TARGET_ASM_OUTPUT_ADDR_CONST_EXTRA v850_output_addr_const_extra
3204
c60e4982 3205#undef TARGET_ATTRIBUTE_TABLE
3206#define TARGET_ATTRIBUTE_TABLE v850_attribute_table
3207
3208#undef TARGET_INSERT_ATTRIBUTES
3209#define TARGET_INSERT_ATTRIBUTES v850_insert_attributes
3210
3211#undef TARGET_ASM_SELECT_SECTION
3212#define TARGET_ASM_SELECT_SECTION v850_select_section
3213
3214/* The assembler supports switchable .bss sections, but
3215 v850_select_section doesn't yet make use of them. */
3216#undef TARGET_HAVE_SWITCHABLE_BSS_SECTIONS
3217#define TARGET_HAVE_SWITCHABLE_BSS_SECTIONS false
3218
3219#undef TARGET_ENCODE_SECTION_INFO
3220#define TARGET_ENCODE_SECTION_INFO v850_encode_section_info
3221
3222#undef TARGET_ASM_FILE_START_FILE_DIRECTIVE
3223#define TARGET_ASM_FILE_START_FILE_DIRECTIVE true
3224
c60e4982 3225#undef TARGET_RTX_COSTS
3226#define TARGET_RTX_COSTS v850_rtx_costs
3227
3228#undef TARGET_ADDRESS_COST
d9c5e5f4 3229#define TARGET_ADDRESS_COST hook_int_rtx_mode_as_bool_0
c60e4982 3230
3231#undef TARGET_MACHINE_DEPENDENT_REORG
3232#define TARGET_MACHINE_DEPENDENT_REORG v850_reorg
3233
3234#undef TARGET_SCHED_ISSUE_RATE
3235#define TARGET_SCHED_ISSUE_RATE v850_issue_rate
3236
3237#undef TARGET_FUNCTION_VALUE_REGNO_P
3238#define TARGET_FUNCTION_VALUE_REGNO_P v850_function_value_regno_p
3239#undef TARGET_FUNCTION_VALUE
3240#define TARGET_FUNCTION_VALUE v850_function_value
3241
3242#undef TARGET_PROMOTE_PROTOTYPES
3243#define TARGET_PROMOTE_PROTOTYPES hook_bool_const_tree_true
3244
3245#undef TARGET_RETURN_IN_MEMORY
3246#define TARGET_RETURN_IN_MEMORY v850_return_in_memory
3247
3248#undef TARGET_PASS_BY_REFERENCE
3249#define TARGET_PASS_BY_REFERENCE v850_pass_by_reference
3250
3251#undef TARGET_CALLEE_COPIES
3252#define TARGET_CALLEE_COPIES hook_bool_CUMULATIVE_ARGS_mode_tree_bool_true
3253
c60e4982 3254#undef TARGET_ARG_PARTIAL_BYTES
3255#define TARGET_ARG_PARTIAL_BYTES v850_arg_partial_bytes
3256
3257#undef TARGET_FUNCTION_ARG
3258#define TARGET_FUNCTION_ARG v850_function_arg
3259
3260#undef TARGET_FUNCTION_ARG_ADVANCE
3261#define TARGET_FUNCTION_ARG_ADVANCE v850_function_arg_advance
3262
3263#undef TARGET_CAN_ELIMINATE
3264#define TARGET_CAN_ELIMINATE v850_can_eliminate
3265
b2d7ede1 3266#undef TARGET_CONDITIONAL_REGISTER_USAGE
3267#define TARGET_CONDITIONAL_REGISTER_USAGE v850_conditional_register_usage
3268
c60e4982 3269#undef TARGET_ASM_TRAMPOLINE_TEMPLATE
3270#define TARGET_ASM_TRAMPOLINE_TEMPLATE v850_asm_trampoline_template
3271#undef TARGET_TRAMPOLINE_INIT
3272#define TARGET_TRAMPOLINE_INIT v850_trampoline_init
3273
ca316360 3274#undef TARGET_LEGITIMATE_CONSTANT_P
3275#define TARGET_LEGITIMATE_CONSTANT_P v850_legitimate_constant_p
3276
5f35dd0e 3277#undef TARGET_CAN_USE_DOLOOP_P
3278#define TARGET_CAN_USE_DOLOOP_P can_use_doloop_if_innermost
3279
c60e4982 3280struct gcc_target targetm = TARGET_INITIALIZER;
3281
2f14b1f9 3282#include "gt-v850.h"
Mirror of https://gcc.gnu.org/git/gcc.git