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956d6950 | 1 | /* Definitions of target machine for GNU compiler. NEC V850 series |
2f83c7d6 | 2 | Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, |
b84d824d | 3 | 2007, 2008, 2009, 2010, 2011, 2012 Free Software Foundation, Inc. |
ae180d84 JL |
4 | Contributed by Jeff Law (law@cygnus.com). |
5 | ||
301ee2f3 | 6 | This file is part of GCC. |
ae180d84 | 7 | |
301ee2f3 | 8 | GCC is free software; you can redistribute it and/or modify |
8376061d | 9 | it under the terms of the GNU General Public License as published by |
2f83c7d6 | 10 | the Free Software Foundation; either version 3, or (at your option) |
8376061d | 11 | any later version. |
ae180d84 | 12 | |
301ee2f3 | 13 | GCC is distributed in the hope that it will be useful, |
8376061d CM |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
ae180d84 | 17 | |
8376061d | 18 | You should have received a copy of the GNU General Public License |
2f83c7d6 NC |
19 | along with GCC; see the file COPYING3. If not see |
20 | <http://www.gnu.org/licenses/>. */ | |
ae180d84 | 21 | |
8b97c5f8 ZW |
22 | #ifndef GCC_V850_H |
23 | #define GCC_V850_H | |
24 | ||
223a9d64 N |
25 | extern GTY(()) rtx v850_compare_op0; |
26 | extern GTY(()) rtx v850_compare_op1; | |
27 | ||
ae180d84 | 28 | #undef LIB_SPEC |
223a9d64 N |
29 | #define LIB_SPEC "%{!shared:%{!symbolic:--start-group -lc -lgcc --end-group}}" |
30 | ||
ae180d84 JL |
31 | #undef ENDFILE_SPEC |
32 | #undef LINK_SPEC | |
33 | #undef STARTFILE_SPEC | |
7a846a6c | 34 | #undef ASM_SPEC |
ae180d84 | 35 | |
7a846a6c | 36 | #define TARGET_CPU_generic 1 |
b4378319 | 37 | #define TARGET_CPU_v850e 2 |
223a9d64 N |
38 | #define TARGET_CPU_v850e1 3 |
39 | #define TARGET_CPU_v850e2 4 | |
40 | #define TARGET_CPU_v850e2v3 5 | |
41 | ||
74aca74b | 42 | |
7a846a6c NC |
43 | #ifndef TARGET_CPU_DEFAULT |
44 | #define TARGET_CPU_DEFAULT TARGET_CPU_generic | |
74aca74b | 45 | #endif |
ae180d84 | 46 | |
7a846a6c NC |
47 | #define MASK_DEFAULT MASK_V850 |
48 | #define SUBTARGET_ASM_SPEC "%{!mv*:-mv850}" | |
49 | #define SUBTARGET_CPP_SPEC "%{!mv*:-D__v850__}" | |
7a846a6c | 50 | |
b4378319 NC |
51 | /* Choose which processor will be the default. |
52 | We must pass a -mv850xx option to the assembler if no explicit -mv* option | |
53 | is given, because the assembler's processor default may not be correct. */ | |
54 | #if TARGET_CPU_DEFAULT == TARGET_CPU_v850e | |
55 | #undef MASK_DEFAULT | |
56 | #define MASK_DEFAULT MASK_V850E | |
57 | #undef SUBTARGET_ASM_SPEC | |
58 | #define SUBTARGET_ASM_SPEC "%{!mv*:-mv850e}" | |
59 | #undef SUBTARGET_CPP_SPEC | |
60 | #define SUBTARGET_CPP_SPEC "%{!mv*:-D__v850e__}" | |
b4378319 | 61 | #endif |
7a846a6c | 62 | |
232830b7 NC |
63 | #if TARGET_CPU_DEFAULT == TARGET_CPU_v850e1 |
64 | #undef MASK_DEFAULT | |
223a9d64 N |
65 | #define MASK_DEFAULT MASK_V850E /* No practical difference. */ |
66 | #undef SUBTARGET_ASM_SPEC | |
67 | #define SUBTARGET_ASM_SPEC "%{!mv*:-mv850e1}" | |
68 | #undef SUBTARGET_CPP_SPEC | |
69 | #define SUBTARGET_CPP_SPEC "%{!mv*:-D__v850e1__} %{mv850e1:-D__v850e1__}" | |
223a9d64 N |
70 | #endif |
71 | ||
72 | #if TARGET_CPU_DEFAULT == TARGET_CPU_v850e2 | |
73 | #undef MASK_DEFAULT | |
74 | #define MASK_DEFAULT MASK_V850E2 | |
75 | #undef SUBTARGET_ASM_SPEC | |
76 | #define SUBTARGET_ASM_SPEC "%{!mv*:-mv850e2}" | |
77 | #undef SUBTARGET_CPP_SPEC | |
78 | #define SUBTARGET_CPP_SPEC "%{!mv*:-D__v850e2__} %{mv850e2:-D__v850e2__}" | |
223a9d64 N |
79 | #endif |
80 | ||
81 | #if TARGET_CPU_DEFAULT == TARGET_CPU_v850e2v3 | |
82 | #undef MASK_DEFAULT | |
83 | #define MASK_DEFAULT MASK_V850E2V3 | |
232830b7 | 84 | #undef SUBTARGET_ASM_SPEC |
223a9d64 | 85 | #define SUBTARGET_ASM_SPEC "%{!mv*:-mv850e2v3}" |
232830b7 | 86 | #undef SUBTARGET_CPP_SPEC |
223a9d64 | 87 | #define SUBTARGET_CPP_SPEC "%{!mv*:-D__v850e2v3__} %{mv850e2v3:-D__v850e2v3__}" |
232830b7 NC |
88 | #endif |
89 | ||
223a9d64 N |
90 | #define TARGET_V850E2_ALL (TARGET_V850E2 || TARGET_V850E2V3) |
91 | ||
b84d824d NC |
92 | #define ASM_SPEC "%{m850es:-mv850e1}%{!mv850es:%{mv*:-mv%*}} \ |
93 | %{mrelax:-mrelax} \ | |
94 | %{m8byte-align:-m8byte-align} \ | |
95 | %{mgcc-abi:-mgcc-abi}" | |
96 | ||
97 | #define LINK_SPEC "%{mgcc-abi:-m v850}" | |
98 | ||
a40d79d7 NC |
99 | #define CPP_SPEC "\ |
100 | %{mv850e2v3:-D__v850e2v3__} \ | |
101 | %{mv850e2:-D__v850e2__} \ | |
102 | %{mv850es:-D__v850e1__} \ | |
103 | %{mv850e1:-D__v850e1__} \ | |
7cce15d4 | 104 | %{mv850e:-D__v850e__} \ |
a40d79d7 NC |
105 | %{mv850:-D__v850__} \ |
106 | %(subtarget_cpp_spec)" \ | |
107 | " %{mep:-D__EP__}" | |
7a846a6c NC |
108 | |
109 | #define EXTRA_SPECS \ | |
110 | { "subtarget_asm_spec", SUBTARGET_ASM_SPEC }, \ | |
111 | { "subtarget_cpp_spec", SUBTARGET_CPP_SPEC } | |
112 | ||
b84d824d NC |
113 | |
114 | /* Macro to decide when FPU instructions can be used. */ | |
115 | #define TARGET_USE_FPU (TARGET_V850E2V3 && ! TARGET_SOFT_FLOAT) | |
116 | ||
117 | #define TARGET_CPU_CPP_BUILTINS() \ | |
118 | do \ | |
119 | { \ | |
120 | builtin_define( "__v851__" ); \ | |
121 | builtin_define( "__v850" ); \ | |
122 | builtin_define( "__v850__" ); \ | |
123 | builtin_assert( "machine=v850" ); \ | |
124 | builtin_assert( "cpu=v850" ); \ | |
125 | if (TARGET_EP) \ | |
126 | builtin_define ("__EP__"); \ | |
127 | if (TARGET_GCC_ABI) \ | |
128 | builtin_define ("__V850_GCC_ABI__"); \ | |
129 | else \ | |
130 | builtin_define ("__V850_RH850_ABI__"); \ | |
131 | if (! TARGET_DISABLE_CALLT) \ | |
132 | builtin_define ("__V850_CALLT__"); \ | |
133 | if (TARGET_8BYTE_ALIGN) \ | |
134 | builtin_define ("__V850_8BYTE_ALIGN__");\ | |
135 | builtin_define (TARGET_USE_FPU ? \ | |
136 | "__FPU_OK__" : "__NO_FPU__");\ | |
137 | } \ | |
138 | while(0) | |
ae180d84 | 139 | |
1dcad079 | 140 | #define MASK_CPU (MASK_V850 | MASK_V850E | MASK_V850E1 | MASK_V850E2 | MASK_V850E2V3) |
ae180d84 JL |
141 | \f |
142 | /* Target machine storage layout */ | |
143 | ||
144 | /* Define this if most significant bit is lowest numbered | |
145 | in instructions that operate on numbered bit-fields. | |
146 | This is not true on the NEC V850. */ | |
147 | #define BITS_BIG_ENDIAN 0 | |
148 | ||
149 | /* Define this if most significant byte of a word is the lowest numbered. */ | |
150 | /* This is not true on the NEC V850. */ | |
151 | #define BYTES_BIG_ENDIAN 0 | |
152 | ||
153 | /* Define this if most significant word of a multiword number is lowest | |
154 | numbered. | |
155 | This is not true on the NEC V850. */ | |
156 | #define WORDS_BIG_ENDIAN 0 | |
157 | ||
ae180d84 JL |
158 | /* Width of a word, in units (bytes). */ |
159 | #define UNITS_PER_WORD 4 | |
160 | ||
ae180d84 JL |
161 | /* Define this macro if it is advisable to hold scalars in registers |
162 | in a wider mode than that declared by the program. In such cases, | |
163 | the value is constrained to be within the bounds of the declared | |
164 | type, but kept valid in the wider mode. The signedness of the | |
165 | extension may differ from that of the type. | |
166 | ||
167 | Some simple experiments have shown that leaving UNSIGNEDP alone | |
168 | generates the best overall code. */ | |
169 | ||
170 | #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \ | |
171 | if (GET_MODE_CLASS (MODE) == MODE_INT \ | |
172 | && GET_MODE_SIZE (MODE) < 4) \ | |
173 | { (MODE) = SImode; } | |
174 | ||
175 | /* Allocation boundary (in *bits*) for storing arguments in argument list. */ | |
176 | #define PARM_BOUNDARY 32 | |
177 | ||
22f23985 | 178 | /* The stack goes in 32-bit lumps. */ |
b84d824d | 179 | #define STACK_BOUNDARY BIGGEST_ALIGNMENT |
ae180d84 JL |
180 | |
181 | /* Allocation boundary (in *bits*) for the code of a function. | |
182 | 16 is the minimum boundary; 32 would give better performance. */ | |
b84d824d | 183 | #define FUNCTION_BOUNDARY (((! TARGET_GCC_ABI) || optimize_size) ? 16 : 32) |
ae180d84 JL |
184 | |
185 | /* No data type wants to be aligned rounder than this. */ | |
b84d824d | 186 | #define BIGGEST_ALIGNMENT (TARGET_8BYTE_ALIGN ? 64 : 32) |
ae180d84 JL |
187 | |
188 | /* Alignment of field after `int : 0' in a structure. */ | |
189 | #define EMPTY_FIELD_BOUNDARY 32 | |
190 | ||
191 | /* No structure field wants to be aligned rounder than this. */ | |
b84d824d | 192 | #define BIGGEST_FIELD_ALIGNMENT BIGGEST_ALIGNMENT |
ae180d84 JL |
193 | |
194 | /* Define this if move instructions will actually fail to work | |
195 | when given unaligned data. */ | |
223a9d64 | 196 | #define STRICT_ALIGNMENT (!TARGET_NO_STRICT_ALIGN) |
ae180d84 JL |
197 | |
198 | /* Define this as 1 if `char' should by default be signed; else as 0. | |
199 | ||
d4de0221 | 200 | On the NEC V850, loads do sign extension, so make this default. */ |
ae180d84 | 201 | #define DEFAULT_SIGNED_CHAR 1 |
fcbf5a00 JM |
202 | |
203 | #undef SIZE_TYPE | |
204 | #define SIZE_TYPE "unsigned int" | |
205 | ||
206 | #undef PTRDIFF_TYPE | |
207 | #define PTRDIFF_TYPE "int" | |
208 | ||
209 | #undef WCHAR_TYPE | |
210 | #define WCHAR_TYPE "long int" | |
211 | ||
212 | #undef WCHAR_TYPE_SIZE | |
213 | #define WCHAR_TYPE_SIZE BITS_PER_WORD | |
ae180d84 JL |
214 | \f |
215 | /* Standard register usage. */ | |
216 | ||
217 | /* Number of actual hardware registers. | |
218 | The hardware registers are assigned numbers for the compiler | |
219 | from 0 to just below FIRST_PSEUDO_REGISTER. | |
220 | ||
221 | All registers that the compiler knows about must be given numbers, | |
222 | even those that are not normally considered general registers. */ | |
223 | ||
223a9d64 | 224 | #define FIRST_PSEUDO_REGISTER 36 |
ae180d84 JL |
225 | |
226 | /* 1 for registers that have pervasive standard uses | |
227 | and are not available for the register allocator. */ | |
228 | ||
229 | #define FIXED_REGISTERS \ | |
223a9d64 | 230 | { 1, 1, 1, 1, 1, 1, 0, 0, \ |
ae180d84 JL |
231 | 0, 0, 0, 0, 0, 0, 0, 0, \ |
232 | 0, 0, 0, 0, 0, 0, 0, 0, \ | |
233 | 0, 0, 0, 0, 0, 0, 1, 0, \ | |
223a9d64 | 234 | 1, 1, \ |
ae180d84 JL |
235 | 1, 1} |
236 | ||
237 | /* 1 for registers not available across function calls. | |
238 | These must include the FIXED_REGISTERS and also any | |
239 | registers that can be used without being saved. | |
240 | The latter must include the registers where values are returned | |
241 | and the register where structure-value addresses are passed. | |
242 | Aside from that, you can include as many other registers as you | |
243 | like. */ | |
244 | ||
245 | #define CALL_USED_REGISTERS \ | |
223a9d64 | 246 | { 1, 1, 1, 1, 1, 1, 1, 1, \ |
ae180d84 JL |
247 | 1, 1, 1, 1, 1, 1, 1, 1, \ |
248 | 1, 1, 1, 1, 0, 0, 0, 0, \ | |
249 | 0, 0, 0, 0, 0, 0, 1, 1, \ | |
223a9d64 | 250 | 1, 1, \ |
ae180d84 JL |
251 | 1, 1} |
252 | ||
253 | /* List the order in which to allocate registers. Each register must be | |
254 | listed once, even those in FIXED_REGISTERS. | |
255 | ||
256 | On the 850, we make the return registers first, then all of the volatile | |
257 | registers, then the saved registers in reverse order to better save the | |
956d6950 | 258 | registers with an out of line function, and finally the fixed |
ae180d84 JL |
259 | registers. */ |
260 | ||
261 | #define REG_ALLOC_ORDER \ | |
262 | { \ | |
263 | 10, 11, /* return registers */ \ | |
264 | 12, 13, 14, 15, 16, 17, 18, 19, /* scratch registers */ \ | |
265 | 6, 7, 8, 9, 31, /* argument registers */ \ | |
266 | 29, 28, 27, 26, 25, 24, 23, 22, /* saved registers */ \ | |
267 | 21, 20, 2, \ | |
223a9d64 N |
268 | 0, 1, 3, 4, 5, 30, 32, 33, /* fixed registers */ \ |
269 | 34, 35 \ | |
ae180d84 JL |
270 | } |
271 | ||
272 | /* Return number of consecutive hard regs needed starting at reg REGNO | |
273 | to hold something of mode MODE. | |
274 | ||
275 | This is ordinarily the length in words of a value of mode MODE | |
276 | but can be less for certain modes in special long registers. */ | |
277 | ||
278 | #define HARD_REGNO_NREGS(REGNO, MODE) \ | |
279 | ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) | |
280 | ||
281 | /* Value is 1 if hard register REGNO can hold a value of machine-mode | |
282 | MODE. */ | |
283 | ||
284 | #define HARD_REGNO_MODE_OK(REGNO, MODE) \ | |
223a9d64 | 285 | ((GET_MODE_SIZE (MODE) <= 4) || (((REGNO) & 1) == 0 && (REGNO) != 0)) |
ae180d84 JL |
286 | |
287 | /* Value is 1 if it is a good idea to tie two pseudo registers | |
288 | when one has mode MODE1 and one has mode MODE2. | |
289 | If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2, | |
290 | for any hard reg, then this must be 0 for correct output. */ | |
291 | #define MODES_TIEABLE_P(MODE1, MODE2) \ | |
674fdc14 | 292 | (MODE1 == MODE2 || (GET_MODE_SIZE (MODE1) <= 4 && GET_MODE_SIZE (MODE2) <= 4)) |
ae180d84 JL |
293 | |
294 | \f | |
295 | /* Define the classes of registers for register constraints in the | |
296 | machine description. Also define ranges of constants. | |
297 | ||
298 | One of the classes must always be named ALL_REGS and include all hard regs. | |
299 | If there is more than one class, another class must be named NO_REGS | |
300 | and contain no registers. | |
301 | ||
302 | The name GENERAL_REGS must be the name of a class (or an alias for | |
303 | another name such as ALL_REGS). This is the class of registers | |
304 | that is allowed by "g" or "r" in a register constraint. | |
305 | Also, registers outside this class are allocated only when | |
306 | instructions express preferences for them. | |
307 | ||
308 | The classes must be numbered in nondecreasing order; that is, | |
309 | a larger-numbered class must never be contained completely | |
310 | in a smaller-numbered class. | |
311 | ||
312 | For any two classes, it is very desirable that there be another | |
313 | class that represents their union. */ | |
314 | ||
3ce15347 NC |
315 | enum reg_class |
316 | { | |
b84d824d | 317 | NO_REGS, EVEN_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES |
ae180d84 JL |
318 | }; |
319 | ||
320 | #define N_REG_CLASSES (int) LIM_REG_CLASSES | |
321 | ||
d4de0221 | 322 | /* Give names of register classes as strings for dump file. */ |
ae180d84 JL |
323 | |
324 | #define REG_CLASS_NAMES \ | |
b84d824d | 325 | { "NO_REGS", "EVEN_REGS", "GENERAL_REGS", "ALL_REGS", "LIM_REGS" } |
ae180d84 JL |
326 | |
327 | /* Define which registers fit in which classes. | |
328 | This is an initializer for a vector of HARD_REG_SET | |
329 | of length N_REG_CLASSES. */ | |
330 | ||
223a9d64 N |
331 | #define REG_CLASS_CONTENTS \ |
332 | { \ | |
333 | { 0x00000000,0x0 }, /* NO_REGS */ \ | |
223a9d64 | 334 | { 0x55555554,0x0 }, /* EVEN_REGS */ \ |
b84d824d | 335 | { 0xfffffffe,0x0 }, /* GENERAL_REGS */ \ |
223a9d64 | 336 | { 0xffffffff,0x0 }, /* ALL_REGS */ \ |
ae180d84 JL |
337 | } |
338 | ||
339 | /* The same information, inverted: | |
340 | Return the class number of the smallest class containing | |
341 | reg number REGNO. This could be a conditional expression | |
342 | or could index an array. */ | |
343 | ||
223a9d64 | 344 | #define REGNO_REG_CLASS(REGNO) ((REGNO == CC_REGNUM || REGNO == FCC_REGNUM) ? NO_REGS : GENERAL_REGS) |
ae180d84 JL |
345 | |
346 | /* The class value for index registers, and the one for base regs. */ | |
347 | ||
348 | #define INDEX_REG_CLASS NO_REGS | |
349 | #define BASE_REG_CLASS GENERAL_REGS | |
350 | ||
ae180d84 JL |
351 | /* Macros to check register numbers against specific register classes. */ |
352 | ||
353 | /* These assume that REGNO is a hard or pseudo reg number. | |
354 | They give nonzero only if REGNO is a hard reg of the suitable class | |
355 | or a pseudo reg currently allocated to a suitable hard reg. | |
356 | Since they use reg_renumber, they are safe only once reg_renumber | |
357 | has been allocated, which happens in local-alloc.c. */ | |
358 | ||
223a9d64 N |
359 | #define REGNO_OK_FOR_BASE_P(regno) \ |
360 | (((regno) < FIRST_PSEUDO_REGISTER \ | |
361 | && (regno) != CC_REGNUM \ | |
362 | && (regno) != FCC_REGNUM) \ | |
363 | || reg_renumber[regno] >= 0) | |
ae180d84 JL |
364 | |
365 | #define REGNO_OK_FOR_INDEX_P(regno) 0 | |
366 | ||
c6150df6 | 367 | /* Convenience wrappers around insn_const_int_ok_for_constraint. */ |
ae180d84 | 368 | |
c6150df6 NF |
369 | #define CONST_OK_FOR_I(VALUE) \ |
370 | insn_const_int_ok_for_constraint (VALUE, CONSTRAINT_I) | |
371 | #define CONST_OK_FOR_J(VALUE) \ | |
372 | insn_const_int_ok_for_constraint (VALUE, CONSTRAINT_J) | |
373 | #define CONST_OK_FOR_K(VALUE) \ | |
374 | insn_const_int_ok_for_constraint (VALUE, CONSTRAINT_K) | |
375 | #define CONST_OK_FOR_L(VALUE) \ | |
376 | insn_const_int_ok_for_constraint (VALUE, CONSTRAINT_L) | |
377 | #define CONST_OK_FOR_M(VALUE) \ | |
378 | insn_const_int_ok_for_constraint (VALUE, CONSTRAINT_M) | |
379 | #define CONST_OK_FOR_N(VALUE) \ | |
380 | insn_const_int_ok_for_constraint (VALUE, CONSTRAINT_N) | |
381 | #define CONST_OK_FOR_O(VALUE) \ | |
382 | insn_const_int_ok_for_constraint (VALUE, CONSTRAINT_O) | |
ae180d84 JL |
383 | |
384 | \f | |
385 | /* Stack layout; function entry, exit and calling. */ | |
386 | ||
387 | /* Define this if pushing a word on the stack | |
388 | makes the stack pointer a smaller address. */ | |
389 | ||
390 | #define STACK_GROWS_DOWNWARD | |
391 | ||
a4d05547 | 392 | /* Define this to nonzero if the nominal address of the stack frame |
ae180d84 JL |
393 | is at the high-address end of the local variables; |
394 | that is, each additional local variable allocated | |
395 | goes at a more negative offset in the frame. */ | |
396 | ||
f62c8a5c | 397 | #define FRAME_GROWS_DOWNWARD 1 |
ae180d84 JL |
398 | |
399 | /* Offset within stack frame to start allocating local variables at. | |
400 | If FRAME_GROWS_DOWNWARD, this is the offset to the END of the | |
401 | first local allocated. Otherwise, it is the offset to the BEGINNING | |
402 | of the first local allocated. */ | |
403 | ||
404 | #define STARTING_FRAME_OFFSET 0 | |
405 | ||
406 | /* Offset of first parameter from the argument pointer register value. */ | |
407 | /* Is equal to the size of the saved fp + pc, even if an fp isn't | |
408 | saved since the value is used before we know. */ | |
409 | ||
410 | #define FIRST_PARM_OFFSET(FNDECL) 0 | |
411 | ||
412 | /* Specify the registers used for certain standard purposes. | |
413 | The values of these macros are register numbers. */ | |
414 | ||
415 | /* Register to use for pushing function arguments. */ | |
223a9d64 | 416 | #define STACK_POINTER_REGNUM SP_REGNUM |
ae180d84 JL |
417 | |
418 | /* Base register for access to local variables of the function. */ | |
223a9d64 | 419 | #define FRAME_POINTER_REGNUM 34 |
ae180d84 | 420 | |
29a65e3d | 421 | /* Register containing return address from latest function call. */ |
223a9d64 | 422 | #define LINK_POINTER_REGNUM LP_REGNUM |
29a65e3d | 423 | |
ae180d84 JL |
424 | /* On some machines the offset between the frame pointer and starting |
425 | offset of the automatic variables is not known until after register | |
426 | allocation has been done (for example, because the saved registers | |
427 | are between these two locations). On those machines, define | |
428 | `FRAME_POINTER_REGNUM' the number of a special, fixed register to | |
429 | be used internally until the offset is known, and define | |
430 | `HARD_FRAME_POINTER_REGNUM' to be actual the hard register number | |
431 | used for the frame pointer. | |
432 | ||
433 | You should define this macro only in the very rare circumstances | |
434 | when it is not possible to calculate the offset between the frame | |
435 | pointer and the automatic variables until after register | |
436 | allocation has been completed. When this macro is defined, you | |
437 | must also indicate in your definition of `ELIMINABLE_REGS' how to | |
438 | eliminate `FRAME_POINTER_REGNUM' into either | |
439 | `HARD_FRAME_POINTER_REGNUM' or `STACK_POINTER_REGNUM'. | |
440 | ||
441 | Do not define this macro if it would be the same as | |
d4de0221 | 442 | `FRAME_POINTER_REGNUM'. */ |
3ce15347 | 443 | #undef HARD_FRAME_POINTER_REGNUM |
ae180d84 JL |
444 | #define HARD_FRAME_POINTER_REGNUM 29 |
445 | ||
446 | /* Base register for access to arguments of the function. */ | |
223a9d64 | 447 | #define ARG_POINTER_REGNUM 35 |
ae180d84 JL |
448 | |
449 | /* Register in which static-chain is passed to a function. */ | |
3ce15347 | 450 | #define STATIC_CHAIN_REGNUM 20 |
ae180d84 | 451 | |
ae180d84 JL |
452 | /* If defined, this macro specifies a table of register pairs used to |
453 | eliminate unneeded registers that point into the stack frame. If | |
454 | it is not defined, the only elimination attempted by the compiler | |
455 | is to replace references to the frame pointer with references to | |
456 | the stack pointer. | |
457 | ||
458 | The definition of this macro is a list of structure | |
459 | initializations, each of which specifies an original and | |
460 | replacement register. | |
461 | ||
462 | On some machines, the position of the argument pointer is not | |
463 | known until the compilation is completed. In such a case, a | |
464 | separate hard register must be used for the argument pointer. | |
465 | This register can be eliminated by replacing it with either the | |
466 | frame pointer or the argument pointer, depending on whether or not | |
467 | the frame pointer has been eliminated. | |
468 | ||
469 | In this case, you might specify: | |
470 | #define ELIMINABLE_REGS \ | |
471 | {{ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ | |
472 | {ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \ | |
473 | {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}} | |
474 | ||
475 | Note that the elimination of the argument pointer with the stack | |
d4de0221 | 476 | pointer is specified first since that is the preferred elimination. */ |
ae180d84 JL |
477 | |
478 | #define ELIMINABLE_REGS \ | |
479 | {{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM }, \ | |
480 | { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM }, \ | |
481 | { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM }, \ | |
482 | { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM }} \ | |
483 | ||
ae180d84 JL |
484 | /* This macro is similar to `INITIAL_FRAME_POINTER_OFFSET'. It |
485 | specifies the initial difference between the specified pair of | |
486 | registers. This macro must be defined if `ELIMINABLE_REGS' is | |
d4de0221 | 487 | defined. */ |
ae180d84 JL |
488 | |
489 | #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ | |
490 | { \ | |
491 | if ((FROM) == FRAME_POINTER_REGNUM) \ | |
38173d38 | 492 | (OFFSET) = get_frame_size () + crtl->outgoing_args_size; \ |
ae180d84 JL |
493 | else if ((FROM) == ARG_POINTER_REGNUM) \ |
494 | (OFFSET) = compute_frame_size (get_frame_size (), (long *)0); \ | |
495 | else \ | |
f2f84cba | 496 | gcc_unreachable (); \ |
ae180d84 JL |
497 | } |
498 | ||
ae180d84 | 499 | /* Keep the stack pointer constant throughout the function. */ |
f73ad30e | 500 | #define ACCUMULATE_OUTGOING_ARGS 1 |
ae180d84 | 501 | |
a64761a3 | 502 | #define RETURN_ADDR_RTX(COUNT, FP) v850_return_addr (COUNT) |
ae180d84 JL |
503 | \f |
504 | /* Define a data type for recording info about an argument list | |
505 | during the scan of that argument list. This data type should | |
506 | hold all necessary information about the function itself | |
507 | and about the args processed so far, enough to enable macros | |
508 | such as FUNCTION_ARG to determine where the next arg should go. */ | |
509 | ||
510 | #define CUMULATIVE_ARGS struct cum_arg | |
b84d824d | 511 | struct cum_arg { int nbytes; }; |
ae180d84 | 512 | |
ae180d84 JL |
513 | /* Initialize a variable CUM of type CUMULATIVE_ARGS |
514 | for a call to a function whose data type is FNTYPE. | |
515 | For a library call, FNTYPE is 0. */ | |
516 | ||
0f6937fe | 517 | #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \ |
b84d824d | 518 | do { (CUM).nbytes = 0; } while (0) |
ae180d84 | 519 | |
ae180d84 JL |
520 | /* When a parameter is passed in a register, stack space is still |
521 | allocated for it. */ | |
223a9d64 | 522 | #define REG_PARM_STACK_SPACE(DECL) 0 |
ae180d84 | 523 | |
ae180d84 JL |
524 | /* 1 if N is a possible register number for function argument passing. */ |
525 | ||
526 | #define FUNCTION_ARG_REGNO_P(N) (N >= 6 && N <= 9) | |
527 | ||
ae180d84 JL |
528 | /* Define how to find the value returned by a library function |
529 | assuming the value has mode MODE. */ | |
530 | ||
531 | #define LIBCALL_VALUE(MODE) \ | |
c5c76735 | 532 | gen_rtx_REG (MODE, 10) |
ae180d84 | 533 | |
ae180d84 | 534 | #define DEFAULT_PCC_STRUCT_RETURN 0 |
ae180d84 JL |
535 | |
536 | /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, | |
537 | the stack pointer does not matter. The value is tested only in | |
538 | functions that have frame pointers. | |
539 | No definition is equivalent to always zero. */ | |
540 | ||
541 | #define EXIT_IGNORE_STACK 1 | |
542 | ||
bc9ec51b JW |
543 | /* Define this macro as a C expression that is nonzero for registers |
544 | used by the epilogue or the `return' pattern. */ | |
545 | ||
546 | #define EPILOGUE_USES(REGNO) \ | |
547 | (reload_completed && (REGNO) == LINK_POINTER_REGNUM) | |
548 | ||
ae180d84 JL |
549 | /* Output assembler code to FILE to increment profiler label # LABELNO |
550 | for profiling a function entry. */ | |
551 | ||
552 | #define FUNCTION_PROFILER(FILE, LABELNO) ; | |
553 | ||
ae180d84 JL |
554 | /* Length in units of the trampoline for entering a nested function. */ |
555 | ||
556 | #define TRAMPOLINE_SIZE 24 | |
557 | ||
ae180d84 JL |
558 | /* Addressing modes, and classification of registers for them. */ |
559 | ||
560 | \f | |
561 | /* 1 if X is an rtx for a constant that is a valid address. */ | |
562 | ||
1933ec7e JW |
563 | /* ??? This seems too exclusive. May get better code by accepting more |
564 | possibilities here, in particular, should accept ZDA_NAME SYMBOL_REFs. */ | |
565 | ||
c6150df6 | 566 | #define CONSTANT_ADDRESS_P(X) constraint_satisfied_p (X, CONSTRAINT_K) |
ae180d84 JL |
567 | |
568 | /* Maximum number of registers that can appear in a valid memory address. */ | |
569 | ||
570 | #define MAX_REGS_PER_ADDRESS 1 | |
571 | ||
572 | /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx | |
573 | and check its validity for a certain class. | |
574 | We have two alternate definitions for each of them. | |
575 | The usual definition accepts all pseudo regs; the other rejects | |
576 | them unless they have been allocated suitable hard regs. | |
577 | The symbol REG_OK_STRICT causes the latter definition to be used. | |
578 | ||
579 | Most source files want to accept pseudo regs in the hope that | |
580 | they will get allocated to the class that the insn wants them to be in. | |
581 | Source files for reload pass need to be strict. | |
582 | After reload, it makes no difference, since pseudo regs have | |
583 | been eliminated by then. */ | |
584 | ||
585 | #ifndef REG_OK_STRICT | |
586 | ||
587 | /* Nonzero if X is a hard reg that can be used as an index | |
588 | or if it is a pseudo reg. */ | |
589 | #define REG_OK_FOR_INDEX_P(X) 0 | |
590 | /* Nonzero if X is a hard reg that can be used as a base reg | |
591 | or if it is a pseudo reg. */ | |
592 | #define REG_OK_FOR_BASE_P(X) 1 | |
593 | #define REG_OK_FOR_INDEX_P_STRICT(X) 0 | |
594 | #define REG_OK_FOR_BASE_P_STRICT(X) REGNO_OK_FOR_BASE_P (REGNO (X)) | |
595 | #define STRICT 0 | |
596 | ||
597 | #else | |
598 | ||
599 | /* Nonzero if X is a hard reg that can be used as an index. */ | |
600 | #define REG_OK_FOR_INDEX_P(X) 0 | |
601 | /* Nonzero if X is a hard reg that can be used as a base reg. */ | |
602 | #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X)) | |
603 | #define STRICT 1 | |
604 | ||
605 | #endif | |
606 | ||
ae180d84 JL |
607 | \f |
608 | /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression | |
609 | that is a valid memory address for an instruction. | |
610 | The MODE argument is the machine mode for the MEM expression | |
611 | that wants to use this address. | |
612 | ||
613 | The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS, | |
614 | except for CONSTANT_ADDRESS_P which is actually | |
615 | machine-independent. */ | |
616 | ||
617 | /* Accept either REG or SUBREG where a register is valid. */ | |
618 | ||
619 | #define RTX_OK_FOR_BASE_P(X) \ | |
620 | ((REG_P (X) && REG_OK_FOR_BASE_P (X)) \ | |
621 | || (GET_CODE (X) == SUBREG && REG_P (SUBREG_REG (X)) \ | |
622 | && REG_OK_FOR_BASE_P (SUBREG_REG (X)))) | |
623 | ||
624 | #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ | |
625 | do { \ | |
7d866c52 NC |
626 | if (RTX_OK_FOR_BASE_P (X)) \ |
627 | goto ADDR; \ | |
ae180d84 | 628 | if (CONSTANT_ADDRESS_P (X) \ |
7a846a6c NC |
629 | && (MODE == QImode || INTVAL (X) % 2 == 0) \ |
630 | && (GET_MODE_SIZE (MODE) <= 4 || INTVAL (X) % 4 == 0)) \ | |
ae180d84 JL |
631 | goto ADDR; \ |
632 | if (GET_CODE (X) == LO_SUM \ | |
7d866c52 | 633 | && REG_P (XEXP (X, 0)) \ |
ae180d84 JL |
634 | && REG_OK_FOR_BASE_P (XEXP (X, 0)) \ |
635 | && CONSTANT_P (XEXP (X, 1)) \ | |
636 | && (GET_CODE (XEXP (X, 1)) != CONST_INT \ | |
637 | || ((MODE == QImode || INTVAL (XEXP (X, 1)) % 2 == 0) \ | |
638 | && CONST_OK_FOR_K (INTVAL (XEXP (X, 1))))) \ | |
639 | && GET_MODE_SIZE (MODE) <= GET_MODE_SIZE (word_mode)) \ | |
640 | goto ADDR; \ | |
641 | if (special_symbolref_operand (X, MODE) \ | |
642 | && (GET_MODE_SIZE (MODE) <= GET_MODE_SIZE (word_mode))) \ | |
643 | goto ADDR; \ | |
644 | if (GET_CODE (X) == PLUS \ | |
7d866c52 | 645 | && RTX_OK_FOR_BASE_P (XEXP (X, 0)) \ |
c6150df6 | 646 | && constraint_satisfied_p (XEXP (X,1), CONSTRAINT_K) \ |
7d866c52 NC |
647 | && ((MODE == QImode || INTVAL (XEXP (X, 1)) % 2 == 0) \ |
648 | && CONST_OK_FOR_K (INTVAL (XEXP (X, 1)) \ | |
649 | + (GET_MODE_NUNITS (MODE) * UNITS_PER_WORD)))) \ | |
650 | goto ADDR; \ | |
ae180d84 JL |
651 | } while (0) |
652 | ||
653 | \f | |
223a9d64 N |
654 | /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE, |
655 | return the mode to be used for the comparison. | |
656 | ||
657 | For floating-point equality comparisons, CCFPEQmode should be used. | |
658 | VOIDmode should be used in all other cases. | |
659 | ||
660 | For integer comparisons against zero, reduce to CCNOmode or CCZmode if | |
661 | possible, to allow for more combinations. */ | |
662 | ||
663 | #define SELECT_CC_MODE(OP, X, Y) v850_select_cc_mode (OP, X, Y) | |
664 | ||
ae180d84 JL |
665 | /* Tell final.c how to eliminate redundant test instructions. */ |
666 | ||
667 | /* Here we define machine-dependent flags and fields in cc_status | |
8aeea6e6 | 668 | (see `conditions.h'). No extra ones are needed for the VAX. */ |
ae180d84 JL |
669 | |
670 | /* Store in cc_status the expressions | |
671 | that the condition codes will describe | |
672 | after execution of an instruction whose pattern is EXP. | |
673 | Do not alter them if the instruction would not alter the cc's. */ | |
674 | ||
675 | #define CC_OVERFLOW_UNUSABLE 0x200 | |
676 | #define CC_NO_CARRY CC_NO_OVERFLOW | |
677 | #define NOTICE_UPDATE_CC(EXP, INSN) notice_update_cc(EXP, INSN) | |
678 | ||
ae180d84 JL |
679 | /* Nonzero if access to memory by bytes or half words is no faster |
680 | than accessing full words. */ | |
681 | #define SLOW_BYTE_ACCESS 1 | |
682 | ||
ae180d84 JL |
683 | /* According expr.c, a value of around 6 should minimize code size, and |
684 | for the V850 series, that's our primary concern. */ | |
e04ad03d | 685 | #define MOVE_RATIO(speed) 6 |
ae180d84 JL |
686 | |
687 | /* Indirect calls are expensive, never turn a direct call | |
688 | into an indirect call. */ | |
689 | #define NO_FUNCTION_CSE | |
690 | ||
3ce15347 NC |
691 | /* The four different data regions on the v850. */ |
692 | typedef enum | |
693 | { | |
694 | DATA_AREA_NORMAL, | |
695 | DATA_AREA_SDA, | |
696 | DATA_AREA_TDA, | |
697 | DATA_AREA_ZDA | |
698 | } v850_data_area; | |
699 | ||
3ce15347 NC |
700 | #define TEXT_SECTION_ASM_OP "\t.section .text" |
701 | #define DATA_SECTION_ASM_OP "\t.section .data" | |
702 | #define BSS_SECTION_ASM_OP "\t.section .bss" | |
ae180d84 | 703 | #define SDATA_SECTION_ASM_OP "\t.section .sdata,\"aw\"" |
3ce15347 | 704 | #define SBSS_SECTION_ASM_OP "\t.section .sbss,\"aw\"" |
3ce15347 | 705 | |
471b6f1b HPN |
706 | #define SCOMMON_ASM_OP "\t.scomm\t" |
707 | #define ZCOMMON_ASM_OP "\t.zcomm\t" | |
708 | #define TCOMMON_ASM_OP "\t.tcomm\t" | |
ae180d84 | 709 | |
ae180d84 JL |
710 | #define ASM_COMMENT_START "#" |
711 | ||
712 | /* Output to assembler file text saying following lines | |
713 | may contain character constants, extra white space, comments, etc. */ | |
714 | ||
715 | #define ASM_APP_ON "#APP\n" | |
716 | ||
717 | /* Output to assembler file text saying following lines | |
718 | no longer contain unusual constructs. */ | |
719 | ||
720 | #define ASM_APP_OFF "#NO_APP\n" | |
721 | ||
61db4608 NC |
722 | #undef USER_LABEL_PREFIX |
723 | #define USER_LABEL_PREFIX "_" | |
724 | ||
ae180d84 | 725 | /* This says how to output the assembler to define a global |
6db34dd4 | 726 | uninitialized but not common symbol. */ |
ae180d84 | 727 | |
f7620587 | 728 | #define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \ |
6db34dd4 | 729 | asm_output_aligned_bss ((FILE), (DECL), (NAME), (SIZE), (ALIGN)) |
ae180d84 | 730 | |
3ce15347 NC |
731 | #undef ASM_OUTPUT_ALIGNED_BSS |
732 | #define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \ | |
733 | v850_output_aligned_bss (FILE, DECL, NAME, SIZE, ALIGN) | |
734 | ||
735 | /* This says how to output the assembler to define a global | |
d4de0221 | 736 | uninitialized, common symbol. */ |
3ce15347 NC |
737 | #undef ASM_OUTPUT_ALIGNED_COMMON |
738 | #undef ASM_OUTPUT_COMMON | |
739 | #define ASM_OUTPUT_ALIGNED_DECL_COMMON(FILE, DECL, NAME, SIZE, ALIGN) \ | |
740 | v850_output_common (FILE, DECL, NAME, SIZE, ALIGN) | |
741 | ||
742 | /* This says how to output the assembler to define a local | |
d4de0221 | 743 | uninitialized symbol. */ |
3ce15347 NC |
744 | #undef ASM_OUTPUT_ALIGNED_LOCAL |
745 | #undef ASM_OUTPUT_LOCAL | |
746 | #define ASM_OUTPUT_ALIGNED_DECL_LOCAL(FILE, DECL, NAME, SIZE, ALIGN) \ | |
747 | v850_output_local (FILE, DECL, NAME, SIZE, ALIGN) | |
748 | ||
506a61b1 KG |
749 | /* Globalizing directive for a label. */ |
750 | #define GLOBAL_ASM_OP "\t.global " | |
ae180d84 | 751 | |
4977bab6 | 752 | #define ASM_PN_FORMAT "%s___%lu" |
ae180d84 JL |
753 | |
754 | /* This is how we tell the assembler that two symbols have the same value. */ | |
755 | ||
756 | #define ASM_OUTPUT_DEF(FILE,NAME1,NAME2) \ | |
757 | do { assemble_name(FILE, NAME1); \ | |
758 | fputs(" = ", FILE); \ | |
759 | assemble_name(FILE, NAME2); \ | |
760 | fputc('\n', FILE); } while (0) | |
761 | ||
762 | ||
763 | /* How to refer to registers in assembler output. | |
764 | This sequence is indexed by compiler's hard-register-number (see above). */ | |
765 | ||
223a9d64 N |
766 | #define REGISTER_NAMES \ |
767 | { "r0", "r1", "r2", "sp", "gp", "r5", "r6" , "r7", \ | |
768 | "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", \ | |
769 | "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", \ | |
770 | "r24", "r25", "r26", "r27", "r28", "r29", "ep", "r31", \ | |
771 | "psw", "fcc", \ | |
ae180d84 JL |
772 | ".fp", ".ap"} |
773 | ||
223a9d64 N |
774 | /* Register numbers */ |
775 | ||
776 | #define ADDITIONAL_REGISTER_NAMES \ | |
777 | { { "zero", ZERO_REGNUM }, \ | |
778 | { "hp", 2 }, \ | |
779 | { "r3", 3 }, \ | |
780 | { "r4", 4 }, \ | |
781 | { "tp", 5 }, \ | |
782 | { "fp", 29 }, \ | |
783 | { "r30", 30 }, \ | |
784 | { "lp", LP_REGNUM} } | |
ae180d84 | 785 | |
ae180d84 JL |
786 | /* This is how to output an element of a case-vector that is absolute. */ |
787 | ||
788 | #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \ | |
761c70aa KG |
789 | fprintf (FILE, "\t%s .L%d\n", \ |
790 | (TARGET_BIG_SWITCH ? ".long" : ".short"), VALUE) | |
ae180d84 JL |
791 | |
792 | /* This is how to output an element of a case-vector that is relative. */ | |
793 | ||
df5c71ac DD |
794 | /* Disable the shift, which is for the currently disabled "switch" |
795 | opcode. Se casesi in v850.md. */ | |
223a9d64 | 796 | |
b4378319 NC |
797 | #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \ |
798 | fprintf (FILE, "\t%s %s.L%d-.L%d%s\n", \ | |
1933ec7e | 799 | (TARGET_BIG_SWITCH ? ".long" : ".short"), \ |
223a9d64 | 800 | (0 && ! TARGET_BIG_SWITCH && (TARGET_V850E || TARGET_V850E2_ALL) ? "(" : ""), \ |
b4378319 | 801 | VALUE, REL, \ |
223a9d64 | 802 | (0 && ! TARGET_BIG_SWITCH && (TARGET_V850E || TARGET_V850E2_ALL) ? ")>>1" : "")) |
ae180d84 | 803 | |
674fdc14 | 804 | #define ASM_OUTPUT_ALIGN(FILE, LOG) \ |
ae180d84 JL |
805 | if ((LOG) != 0) \ |
806 | fprintf (FILE, "\t.align %d\n", (LOG)) | |
807 | ||
956d6950 | 808 | /* We don't have to worry about dbx compatibility for the v850. */ |
ae180d84 JL |
809 | #define DEFAULT_GDB_EXTENSIONS 1 |
810 | ||
b84d824d | 811 | /* Use dwarf2 debugging info by default. */ |
b12b5029 | 812 | #undef PREFERRED_DEBUGGING_TYPE |
b84d824d NC |
813 | #define PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG |
814 | ||
815 | #define DWARF2_FRAME_INFO 1 | |
816 | #define DWARF2_UNWIND_INFO 0 | |
817 | #define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, LINK_POINTER_REGNUM) | |
818 | #define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (LINK_POINTER_REGNUM) | |
b12b5029 NC |
819 | |
820 | #ifndef ASM_GENERATE_INTERNAL_LABEL | |
821 | #define ASM_GENERATE_INTERNAL_LABEL(STRING, PREFIX, NUM) \ | |
822 | sprintf (STRING, "*.%s%u", PREFIX, (unsigned int)(NUM)) | |
823 | #endif | |
ae180d84 | 824 | |
ae180d84 JL |
825 | /* Specify the machine mode that this machine uses |
826 | for the index in the tablejump instruction. */ | |
1933ec7e | 827 | #define CASE_VECTOR_MODE (TARGET_BIG_SWITCH ? SImode : HImode) |
ae180d84 | 828 | |
18543a22 ILT |
829 | /* Define as C expression which evaluates to nonzero if the tablejump |
830 | instruction expects the table to contain offsets from the address of the | |
831 | table. | |
d4de0221 | 832 | Do not define this if the table should contain absolute addresses. */ |
18543a22 | 833 | #define CASE_VECTOR_PC_RELATIVE 1 |
1933ec7e JW |
834 | |
835 | /* The switch instruction requires that the jump table immediately follow | |
d4de0221 | 836 | it. */ |
223a9d64 | 837 | #define JUMP_TABLES_IN_TEXT_SECTION (!TARGET_JUMP_TABLES_IN_DATA_SECTION) |
1933ec7e | 838 | |
1933ec7e JW |
839 | #undef ASM_OUTPUT_BEFORE_CASE_LABEL |
840 | #define ASM_OUTPUT_BEFORE_CASE_LABEL(FILE,PREFIX,NUM,TABLE) \ | |
841 | ASM_OUTPUT_ALIGN ((FILE), (TARGET_BIG_SWITCH ? 2 : 1)); | |
ae180d84 JL |
842 | |
843 | #define WORD_REGISTER_OPERATIONS | |
844 | ||
845 | /* Byte and short loads sign extend the value to a word. */ | |
846 | #define LOAD_EXTEND_OP(MODE) SIGN_EXTEND | |
847 | ||
ae180d84 JL |
848 | /* Max number of bytes we can move from memory to memory |
849 | in one reasonably fast instruction. */ | |
850 | #define MOVE_MAX 4 | |
851 | ||
852 | /* Define if shifts truncate the shift count | |
853 | which implies one can omit a sign-extension or zero-extension | |
854 | of a shift count. */ | |
855 | #define SHIFT_COUNT_TRUNCATED 1 | |
856 | ||
857 | /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits | |
858 | is done just by pretending it is already truncated. */ | |
859 | #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 | |
860 | ||
ae180d84 JL |
861 | /* Specify the machine mode that pointers have. |
862 | After generation of rtl, the compiler makes no further distinction | |
863 | between pointers and any other objects of this machine mode. */ | |
864 | #define Pmode SImode | |
865 | ||
866 | /* A function address in a call instruction | |
867 | is a byte address (for indexing purposes) | |
868 | so give the MEM rtx a byte's mode. */ | |
869 | #define FUNCTION_MODE QImode | |
870 | ||
ae180d84 | 871 | /* Tell compiler we want to support GHS pragmas */ |
c58b209a NB |
872 | #define REGISTER_TARGET_PRAGMAS() do { \ |
873 | c_register_pragma ("ghs", "interrupt", ghs_pragma_interrupt); \ | |
874 | c_register_pragma ("ghs", "section", ghs_pragma_section); \ | |
875 | c_register_pragma ("ghs", "starttda", ghs_pragma_starttda); \ | |
876 | c_register_pragma ("ghs", "startsda", ghs_pragma_startsda); \ | |
877 | c_register_pragma ("ghs", "startzda", ghs_pragma_startzda); \ | |
878 | c_register_pragma ("ghs", "endtda", ghs_pragma_endtda); \ | |
879 | c_register_pragma ("ghs", "endsda", ghs_pragma_endsda); \ | |
880 | c_register_pragma ("ghs", "endzda", ghs_pragma_endzda); \ | |
8b97c5f8 | 881 | } while (0) |
3ce15347 NC |
882 | |
883 | /* enum GHS_SECTION_KIND is an enumeration of the kinds of sections that | |
884 | can appear in the "ghs section" pragma. These names are used to index | |
885 | into the GHS_default_section_names[] and GHS_current_section_names[] | |
886 | that are defined in v850.c, and so the ordering of each must remain | |
839a4992 | 887 | consistent. |
3ce15347 NC |
888 | |
889 | These arrays give the default and current names for each kind of | |
890 | section defined by the GHS pragmas. The current names can be changed | |
891 | by the "ghs section" pragma. If the current names are null, use | |
892 | the default names. Note that the two arrays have different types. | |
893 | ||
894 | For the *normal* section kinds (like .data, .text, etc.) we do not | |
895 | want to explicitly force the name of these sections, but would rather | |
896 | let the linker (or at least the back end) choose the name of the | |
897 | section, UNLESS the user has force a specific name for these section | |
898 | kinds. To accomplish this set the name in ghs_default_section_names | |
899 | to null. */ | |
900 | ||
901 | enum GHS_section_kind | |
902 | { | |
903 | GHS_SECTION_KIND_DEFAULT, | |
904 | ||
905 | GHS_SECTION_KIND_TEXT, | |
906 | GHS_SECTION_KIND_DATA, | |
907 | GHS_SECTION_KIND_RODATA, | |
908 | GHS_SECTION_KIND_BSS, | |
909 | GHS_SECTION_KIND_SDATA, | |
910 | GHS_SECTION_KIND_ROSDATA, | |
911 | GHS_SECTION_KIND_TDATA, | |
912 | GHS_SECTION_KIND_ZDATA, | |
913 | GHS_SECTION_KIND_ROZDATA, | |
914 | ||
915 | COUNT_OF_GHS_SECTION_KINDS /* must be last */ | |
916 | }; | |
ae180d84 | 917 | |
c3edd394 NC |
918 | /* The following code is for handling pragmas supported by the |
919 | v850 compiler produced by Green Hills Software. This is at | |
920 | the specific request of a customer. */ | |
921 | ||
922 | typedef struct data_area_stack_element | |
923 | { | |
924 | struct data_area_stack_element * prev; | |
925 | v850_data_area data_area; /* Current default data area. */ | |
926 | } data_area_stack_element; | |
927 | ||
928 | /* Track the current data area set by the | |
929 | data area pragma (which can be nested). */ | |
930 | extern data_area_stack_element * data_area_stack; | |
931 | ||
932 | /* Names of the various data areas used on the v850. */ | |
35a5db04 JM |
933 | extern tree GHS_default_section_names [(int) COUNT_OF_GHS_SECTION_KINDS]; |
934 | extern tree GHS_current_section_names [(int) COUNT_OF_GHS_SECTION_KINDS]; | |
c3edd394 | 935 | |
38e01259 | 936 | /* The assembler op to start the file. */ |
ae180d84 JL |
937 | |
938 | #define FILE_ASM_OP "\t.file\n" | |
939 | ||
940 | /* Enable the register move pass to improve code. */ | |
941 | #define ENABLE_REGMOVE_PASS | |
942 | ||
943 | ||
944 | /* Implement ZDA, TDA, and SDA */ | |
945 | ||
946 | #define EP_REGNUM 30 /* ep register number */ | |
947 | ||
50d1ff6a RH |
948 | #define SYMBOL_FLAG_ZDA (SYMBOL_FLAG_MACH_DEP << 0) |
949 | #define SYMBOL_FLAG_TDA (SYMBOL_FLAG_MACH_DEP << 1) | |
950 | #define SYMBOL_FLAG_SDA (SYMBOL_FLAG_MACH_DEP << 2) | |
951 | #define SYMBOL_REF_ZDA_P(X) ((SYMBOL_REF_FLAGS (X) & SYMBOL_FLAG_ZDA) != 0) | |
952 | #define SYMBOL_REF_TDA_P(X) ((SYMBOL_REF_FLAGS (X) & SYMBOL_FLAG_TDA) != 0) | |
953 | #define SYMBOL_REF_SDA_P(X) ((SYMBOL_REF_FLAGS (X) & SYMBOL_FLAG_SDA) != 0) | |
ae180d84 | 954 | |
d6b5193b RS |
955 | #define TARGET_ASM_INIT_SECTIONS v850_asm_init_sections |
956 | ||
122603fa N |
957 | /* Define this so that the cc1plus will not think that system header files |
958 | need an implicit 'extern "C" { ... }' assumed. This breaks testing C++ | |
959 | in a build directory where the libstdc++ header files are found via a | |
960 | -isystem <path-to-build-dir>. */ | |
961 | #define NO_IMPLICIT_EXTERN_C | |
223a9d64 | 962 | |
122603fa | 963 | #endif /* ! GCC_V850_H */ |