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956d6950 | 1 | /* Definitions of target machine for GNU compiler. NEC V850 series |
aeee4812 | 2 | Copyright (C) 1996-2023 Free Software Foundation, Inc. |
ae180d84 JL |
3 | Contributed by Jeff Law (law@cygnus.com). |
4 | ||
301ee2f3 | 5 | This file is part of GCC. |
ae180d84 | 6 | |
301ee2f3 | 7 | GCC is free software; you can redistribute it and/or modify |
8376061d | 8 | it under the terms of the GNU General Public License as published by |
2f83c7d6 | 9 | the Free Software Foundation; either version 3, or (at your option) |
8376061d | 10 | any later version. |
ae180d84 | 11 | |
301ee2f3 | 12 | GCC is distributed in the hope that it will be useful, |
8376061d CM |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
ae180d84 | 16 | |
ca48e5ef GJL |
17 | Under Section 7 of GPL version 3, you are granted additional |
18 | permissions described in the GCC Runtime Library Exception, version | |
19 | 3.1, as published by the Free Software Foundation. | |
20 | ||
21 | You should have received a copy of the GNU General Public License and | |
22 | a copy of the GCC Runtime Library Exception along with this program; | |
23 | see the files COPYING3 and COPYING.RUNTIME respectively. If not, see | |
2f83c7d6 | 24 | <http://www.gnu.org/licenses/>. */ |
ae180d84 | 25 | |
8b97c5f8 ZW |
26 | #ifndef GCC_V850_H |
27 | #define GCC_V850_H | |
28 | ||
ae180d84 | 29 | #undef LIB_SPEC |
223a9d64 N |
30 | #define LIB_SPEC "%{!shared:%{!symbolic:--start-group -lc -lgcc --end-group}}" |
31 | ||
ae180d84 JL |
32 | #undef ENDFILE_SPEC |
33 | #undef LINK_SPEC | |
34 | #undef STARTFILE_SPEC | |
7a846a6c | 35 | #undef ASM_SPEC |
ae180d84 | 36 | |
7a846a6c | 37 | #define TARGET_CPU_generic 1 |
b4378319 | 38 | #define TARGET_CPU_v850e 2 |
223a9d64 N |
39 | #define TARGET_CPU_v850e1 3 |
40 | #define TARGET_CPU_v850e2 4 | |
41 | #define TARGET_CPU_v850e2v3 5 | |
dbdbd982 | 42 | #define TARGET_CPU_v850e3v5 6 |
74aca74b | 43 | |
7a846a6c NC |
44 | #ifndef TARGET_CPU_DEFAULT |
45 | #define TARGET_CPU_DEFAULT TARGET_CPU_generic | |
74aca74b | 46 | #endif |
ae180d84 | 47 | |
7a846a6c NC |
48 | #define MASK_DEFAULT MASK_V850 |
49 | #define SUBTARGET_ASM_SPEC "%{!mv*:-mv850}" | |
50 | #define SUBTARGET_CPP_SPEC "%{!mv*:-D__v850__}" | |
7a846a6c | 51 | |
b4378319 NC |
52 | /* Choose which processor will be the default. |
53 | We must pass a -mv850xx option to the assembler if no explicit -mv* option | |
54 | is given, because the assembler's processor default may not be correct. */ | |
55 | #if TARGET_CPU_DEFAULT == TARGET_CPU_v850e | |
56 | #undef MASK_DEFAULT | |
57 | #define MASK_DEFAULT MASK_V850E | |
58 | #undef SUBTARGET_ASM_SPEC | |
59 | #define SUBTARGET_ASM_SPEC "%{!mv*:-mv850e}" | |
60 | #undef SUBTARGET_CPP_SPEC | |
61 | #define SUBTARGET_CPP_SPEC "%{!mv*:-D__v850e__}" | |
b4378319 | 62 | #endif |
7a846a6c | 63 | |
232830b7 NC |
64 | #if TARGET_CPU_DEFAULT == TARGET_CPU_v850e1 |
65 | #undef MASK_DEFAULT | |
223a9d64 N |
66 | #define MASK_DEFAULT MASK_V850E /* No practical difference. */ |
67 | #undef SUBTARGET_ASM_SPEC | |
68 | #define SUBTARGET_ASM_SPEC "%{!mv*:-mv850e1}" | |
69 | #undef SUBTARGET_CPP_SPEC | |
70 | #define SUBTARGET_CPP_SPEC "%{!mv*:-D__v850e1__} %{mv850e1:-D__v850e1__}" | |
223a9d64 N |
71 | #endif |
72 | ||
73 | #if TARGET_CPU_DEFAULT == TARGET_CPU_v850e2 | |
74 | #undef MASK_DEFAULT | |
75 | #define MASK_DEFAULT MASK_V850E2 | |
76 | #undef SUBTARGET_ASM_SPEC | |
77 | #define SUBTARGET_ASM_SPEC "%{!mv*:-mv850e2}" | |
78 | #undef SUBTARGET_CPP_SPEC | |
79 | #define SUBTARGET_CPP_SPEC "%{!mv*:-D__v850e2__} %{mv850e2:-D__v850e2__}" | |
223a9d64 N |
80 | #endif |
81 | ||
82 | #if TARGET_CPU_DEFAULT == TARGET_CPU_v850e2v3 | |
83 | #undef MASK_DEFAULT | |
84 | #define MASK_DEFAULT MASK_V850E2V3 | |
232830b7 | 85 | #undef SUBTARGET_ASM_SPEC |
223a9d64 | 86 | #define SUBTARGET_ASM_SPEC "%{!mv*:-mv850e2v3}" |
232830b7 | 87 | #undef SUBTARGET_CPP_SPEC |
223a9d64 | 88 | #define SUBTARGET_CPP_SPEC "%{!mv*:-D__v850e2v3__} %{mv850e2v3:-D__v850e2v3__}" |
232830b7 NC |
89 | #endif |
90 | ||
dbdbd982 NC |
91 | #if TARGET_CPU_DEFAULT == TARGET_CPU_v850e3v5 |
92 | #undef MASK_DEFAULT | |
93 | #define MASK_DEFAULT MASK_V850E3V5 | |
94 | #undef SUBTARGET_ASM_SPEC | |
95 | #define SUBTARGET_ASM_SPEC "%{!mv*:-mv850e3v5}" | |
96 | #undef SUBTARGET_CPP_SPEC | |
97 | #define SUBTARGET_CPP_SPEC "%{!mv*:-D__v850e3v5__} %{mv850e3v5:-D__v850e3v5__}" | |
98 | #undef TARGET_VERSION | |
99 | #define TARGET_VERSION fprintf (stderr, " (Renesas V850E3V5)"); | |
100 | #endif | |
101 | ||
102 | #define TARGET_V850E3V5_UP ((TARGET_V850E3V5)) | |
103 | #define TARGET_V850E2V3_UP ((TARGET_V850E2V3) || TARGET_V850E3V5_UP) | |
104 | #define TARGET_V850E2_UP ((TARGET_V850E2) || TARGET_V850E2V3_UP) | |
105 | #define TARGET_V850E_UP ((TARGET_V850E) || TARGET_V850E2_UP) | |
106 | #define TARGET_ALL ((TARGET_V850) || TARGET_V850E_UP) | |
223a9d64 | 107 | |
b84d824d NC |
108 | #define ASM_SPEC "%{m850es:-mv850e1}%{!mv850es:%{mv*:-mv%*}} \ |
109 | %{mrelax:-mrelax} \ | |
110 | %{m8byte-align:-m8byte-align} \ | |
ff544f6b NC |
111 | %{msoft-float:-msoft-float} \ |
112 | %{mhard-float:-mhard-float} \ | |
b84d824d NC |
113 | %{mgcc-abi:-mgcc-abi}" |
114 | ||
115 | #define LINK_SPEC "%{mgcc-abi:-m v850}" | |
116 | ||
a40d79d7 | 117 | #define CPP_SPEC "\ |
dbdbd982 | 118 | %{mv850e3v5:-D__v850e3v5__} \ |
a40d79d7 NC |
119 | %{mv850e2v3:-D__v850e2v3__} \ |
120 | %{mv850e2:-D__v850e2__} \ | |
121 | %{mv850es:-D__v850e1__} \ | |
122 | %{mv850e1:-D__v850e1__} \ | |
7cce15d4 | 123 | %{mv850e:-D__v850e__} \ |
a40d79d7 | 124 | %{mv850:-D__v850__} \ |
dbdbd982 NC |
125 | %(subtarget_cpp_spec) \ |
126 | %{mep:-D__EP__}" | |
7a846a6c NC |
127 | |
128 | #define EXTRA_SPECS \ | |
129 | { "subtarget_asm_spec", SUBTARGET_ASM_SPEC }, \ | |
130 | { "subtarget_cpp_spec", SUBTARGET_CPP_SPEC } | |
131 | ||
b84d824d NC |
132 | |
133 | /* Macro to decide when FPU instructions can be used. */ | |
dbdbd982 | 134 | #define TARGET_USE_FPU (TARGET_V850E2V3_UP && ! TARGET_SOFT_FLOAT) |
b84d824d NC |
135 | |
136 | #define TARGET_CPU_CPP_BUILTINS() \ | |
137 | do \ | |
138 | { \ | |
139 | builtin_define( "__v851__" ); \ | |
140 | builtin_define( "__v850" ); \ | |
141 | builtin_define( "__v850__" ); \ | |
142 | builtin_assert( "machine=v850" ); \ | |
143 | builtin_assert( "cpu=v850" ); \ | |
144 | if (TARGET_EP) \ | |
145 | builtin_define ("__EP__"); \ | |
146 | if (TARGET_GCC_ABI) \ | |
147 | builtin_define ("__V850_GCC_ABI__"); \ | |
148 | else \ | |
149 | builtin_define ("__V850_RH850_ABI__"); \ | |
150 | if (! TARGET_DISABLE_CALLT) \ | |
151 | builtin_define ("__V850_CALLT__"); \ | |
152 | if (TARGET_8BYTE_ALIGN) \ | |
153 | builtin_define ("__V850_8BYTE_ALIGN__");\ | |
154 | builtin_define (TARGET_USE_FPU ? \ | |
155 | "__FPU_OK__" : "__NO_FPU__");\ | |
156 | } \ | |
157 | while(0) | |
ae180d84 | 158 | |
dbdbd982 | 159 | #define MASK_CPU (MASK_V850 | MASK_V850E | MASK_V850E1 | MASK_V850E2 | MASK_V850E2V3 | MASK_V850E3V5) |
ae180d84 JL |
160 | \f |
161 | /* Target machine storage layout */ | |
162 | ||
163 | /* Define this if most significant bit is lowest numbered | |
164 | in instructions that operate on numbered bit-fields. | |
165 | This is not true on the NEC V850. */ | |
166 | #define BITS_BIG_ENDIAN 0 | |
167 | ||
168 | /* Define this if most significant byte of a word is the lowest numbered. */ | |
169 | /* This is not true on the NEC V850. */ | |
170 | #define BYTES_BIG_ENDIAN 0 | |
171 | ||
172 | /* Define this if most significant word of a multiword number is lowest | |
173 | numbered. | |
174 | This is not true on the NEC V850. */ | |
175 | #define WORDS_BIG_ENDIAN 0 | |
176 | ||
ae180d84 JL |
177 | /* Width of a word, in units (bytes). */ |
178 | #define UNITS_PER_WORD 4 | |
179 | ||
ae180d84 JL |
180 | /* Define this macro if it is advisable to hold scalars in registers |
181 | in a wider mode than that declared by the program. In such cases, | |
182 | the value is constrained to be within the bounds of the declared | |
183 | type, but kept valid in the wider mode. The signedness of the | |
184 | extension may differ from that of the type. | |
185 | ||
186 | Some simple experiments have shown that leaving UNSIGNEDP alone | |
187 | generates the best overall code. */ | |
188 | ||
189 | #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \ | |
190 | if (GET_MODE_CLASS (MODE) == MODE_INT \ | |
191 | && GET_MODE_SIZE (MODE) < 4) \ | |
192 | { (MODE) = SImode; } | |
193 | ||
194 | /* Allocation boundary (in *bits*) for storing arguments in argument list. */ | |
195 | #define PARM_BOUNDARY 32 | |
196 | ||
22f23985 | 197 | /* The stack goes in 32-bit lumps. */ |
b84d824d | 198 | #define STACK_BOUNDARY BIGGEST_ALIGNMENT |
ae180d84 JL |
199 | |
200 | /* Allocation boundary (in *bits*) for the code of a function. | |
201 | 16 is the minimum boundary; 32 would give better performance. */ | |
b84d824d | 202 | #define FUNCTION_BOUNDARY (((! TARGET_GCC_ABI) || optimize_size) ? 16 : 32) |
ae180d84 JL |
203 | |
204 | /* No data type wants to be aligned rounder than this. */ | |
b84d824d | 205 | #define BIGGEST_ALIGNMENT (TARGET_8BYTE_ALIGN ? 64 : 32) |
ae180d84 JL |
206 | |
207 | /* Alignment of field after `int : 0' in a structure. */ | |
208 | #define EMPTY_FIELD_BOUNDARY 32 | |
209 | ||
210 | /* No structure field wants to be aligned rounder than this. */ | |
b84d824d | 211 | #define BIGGEST_FIELD_ALIGNMENT BIGGEST_ALIGNMENT |
ae180d84 JL |
212 | |
213 | /* Define this if move instructions will actually fail to work | |
214 | when given unaligned data. */ | |
223a9d64 | 215 | #define STRICT_ALIGNMENT (!TARGET_NO_STRICT_ALIGN) |
ae180d84 JL |
216 | |
217 | /* Define this as 1 if `char' should by default be signed; else as 0. | |
218 | ||
d4de0221 | 219 | On the NEC V850, loads do sign extension, so make this default. */ |
ae180d84 | 220 | #define DEFAULT_SIGNED_CHAR 1 |
fcbf5a00 JM |
221 | |
222 | #undef SIZE_TYPE | |
223 | #define SIZE_TYPE "unsigned int" | |
224 | ||
225 | #undef PTRDIFF_TYPE | |
226 | #define PTRDIFF_TYPE "int" | |
227 | ||
228 | #undef WCHAR_TYPE | |
229 | #define WCHAR_TYPE "long int" | |
230 | ||
231 | #undef WCHAR_TYPE_SIZE | |
232 | #define WCHAR_TYPE_SIZE BITS_PER_WORD | |
ae180d84 JL |
233 | \f |
234 | /* Standard register usage. */ | |
235 | ||
236 | /* Number of actual hardware registers. | |
237 | The hardware registers are assigned numbers for the compiler | |
238 | from 0 to just below FIRST_PSEUDO_REGISTER. | |
239 | ||
240 | All registers that the compiler knows about must be given numbers, | |
241 | even those that are not normally considered general registers. */ | |
242 | ||
223a9d64 | 243 | #define FIRST_PSEUDO_REGISTER 36 |
ae180d84 JL |
244 | |
245 | /* 1 for registers that have pervasive standard uses | |
246 | and are not available for the register allocator. */ | |
247 | ||
248 | #define FIXED_REGISTERS \ | |
223a9d64 | 249 | { 1, 1, 1, 1, 1, 1, 0, 0, \ |
ae180d84 JL |
250 | 0, 0, 0, 0, 0, 0, 0, 0, \ |
251 | 0, 0, 0, 0, 0, 0, 0, 0, \ | |
252 | 0, 0, 0, 0, 0, 0, 1, 0, \ | |
223a9d64 | 253 | 1, 1, \ |
ae180d84 JL |
254 | 1, 1} |
255 | ||
256 | /* 1 for registers not available across function calls. | |
257 | These must include the FIXED_REGISTERS and also any | |
258 | registers that can be used without being saved. | |
259 | The latter must include the registers where values are returned | |
260 | and the register where structure-value addresses are passed. | |
261 | Aside from that, you can include as many other registers as you | |
262 | like. */ | |
263 | ||
264 | #define CALL_USED_REGISTERS \ | |
223a9d64 | 265 | { 1, 1, 1, 1, 1, 1, 1, 1, \ |
ae180d84 JL |
266 | 1, 1, 1, 1, 1, 1, 1, 1, \ |
267 | 1, 1, 1, 1, 0, 0, 0, 0, \ | |
268 | 0, 0, 0, 0, 0, 0, 1, 1, \ | |
223a9d64 | 269 | 1, 1, \ |
ae180d84 JL |
270 | 1, 1} |
271 | ||
272 | /* List the order in which to allocate registers. Each register must be | |
273 | listed once, even those in FIXED_REGISTERS. | |
274 | ||
275 | On the 850, we make the return registers first, then all of the volatile | |
276 | registers, then the saved registers in reverse order to better save the | |
956d6950 | 277 | registers with an out of line function, and finally the fixed |
ae180d84 JL |
278 | registers. */ |
279 | ||
280 | #define REG_ALLOC_ORDER \ | |
281 | { \ | |
282 | 10, 11, /* return registers */ \ | |
283 | 12, 13, 14, 15, 16, 17, 18, 19, /* scratch registers */ \ | |
284 | 6, 7, 8, 9, 31, /* argument registers */ \ | |
285 | 29, 28, 27, 26, 25, 24, 23, 22, /* saved registers */ \ | |
286 | 21, 20, 2, \ | |
223a9d64 N |
287 | 0, 1, 3, 4, 5, 30, 32, 33, /* fixed registers */ \ |
288 | 34, 35 \ | |
ae180d84 JL |
289 | } |
290 | ||
ae180d84 JL |
291 | \f |
292 | /* Define the classes of registers for register constraints in the | |
293 | machine description. Also define ranges of constants. | |
294 | ||
295 | One of the classes must always be named ALL_REGS and include all hard regs. | |
296 | If there is more than one class, another class must be named NO_REGS | |
297 | and contain no registers. | |
298 | ||
299 | The name GENERAL_REGS must be the name of a class (or an alias for | |
300 | another name such as ALL_REGS). This is the class of registers | |
301 | that is allowed by "g" or "r" in a register constraint. | |
302 | Also, registers outside this class are allocated only when | |
303 | instructions express preferences for them. | |
304 | ||
305 | The classes must be numbered in nondecreasing order; that is, | |
306 | a larger-numbered class must never be contained completely | |
307 | in a smaller-numbered class. | |
308 | ||
309 | For any two classes, it is very desirable that there be another | |
310 | class that represents their union. */ | |
311 | ||
3ce15347 NC |
312 | enum reg_class |
313 | { | |
b84d824d | 314 | NO_REGS, EVEN_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES |
ae180d84 JL |
315 | }; |
316 | ||
317 | #define N_REG_CLASSES (int) LIM_REG_CLASSES | |
318 | ||
d4de0221 | 319 | /* Give names of register classes as strings for dump file. */ |
ae180d84 JL |
320 | |
321 | #define REG_CLASS_NAMES \ | |
b84d824d | 322 | { "NO_REGS", "EVEN_REGS", "GENERAL_REGS", "ALL_REGS", "LIM_REGS" } |
ae180d84 JL |
323 | |
324 | /* Define which registers fit in which classes. | |
325 | This is an initializer for a vector of HARD_REG_SET | |
326 | of length N_REG_CLASSES. */ | |
327 | ||
223a9d64 N |
328 | #define REG_CLASS_CONTENTS \ |
329 | { \ | |
330 | { 0x00000000,0x0 }, /* NO_REGS */ \ | |
223a9d64 | 331 | { 0x55555554,0x0 }, /* EVEN_REGS */ \ |
b84d824d | 332 | { 0xfffffffe,0x0 }, /* GENERAL_REGS */ \ |
223a9d64 | 333 | { 0xffffffff,0x0 }, /* ALL_REGS */ \ |
ae180d84 JL |
334 | } |
335 | ||
336 | /* The same information, inverted: | |
337 | Return the class number of the smallest class containing | |
338 | reg number REGNO. This could be a conditional expression | |
339 | or could index an array. */ | |
340 | ||
223a9d64 | 341 | #define REGNO_REG_CLASS(REGNO) ((REGNO == CC_REGNUM || REGNO == FCC_REGNUM) ? NO_REGS : GENERAL_REGS) |
ae180d84 JL |
342 | |
343 | /* The class value for index registers, and the one for base regs. */ | |
344 | ||
345 | #define INDEX_REG_CLASS NO_REGS | |
346 | #define BASE_REG_CLASS GENERAL_REGS | |
347 | ||
ae180d84 JL |
348 | /* Macros to check register numbers against specific register classes. */ |
349 | ||
350 | /* These assume that REGNO is a hard or pseudo reg number. | |
351 | They give nonzero only if REGNO is a hard reg of the suitable class | |
352 | or a pseudo reg currently allocated to a suitable hard reg. | |
353 | Since they use reg_renumber, they are safe only once reg_renumber | |
e53b6e56 | 354 | has been allocated, which happens in reginfo.cc during register |
aeb9f7cf | 355 | allocation. */ |
ae180d84 | 356 | |
223a9d64 N |
357 | #define REGNO_OK_FOR_BASE_P(regno) \ |
358 | (((regno) < FIRST_PSEUDO_REGISTER \ | |
359 | && (regno) != CC_REGNUM \ | |
360 | && (regno) != FCC_REGNUM) \ | |
361 | || reg_renumber[regno] >= 0) | |
ae180d84 JL |
362 | |
363 | #define REGNO_OK_FOR_INDEX_P(regno) 0 | |
364 | ||
c6150df6 | 365 | /* Convenience wrappers around insn_const_int_ok_for_constraint. */ |
ae180d84 | 366 | |
c6150df6 NF |
367 | #define CONST_OK_FOR_I(VALUE) \ |
368 | insn_const_int_ok_for_constraint (VALUE, CONSTRAINT_I) | |
369 | #define CONST_OK_FOR_J(VALUE) \ | |
370 | insn_const_int_ok_for_constraint (VALUE, CONSTRAINT_J) | |
371 | #define CONST_OK_FOR_K(VALUE) \ | |
372 | insn_const_int_ok_for_constraint (VALUE, CONSTRAINT_K) | |
373 | #define CONST_OK_FOR_L(VALUE) \ | |
374 | insn_const_int_ok_for_constraint (VALUE, CONSTRAINT_L) | |
375 | #define CONST_OK_FOR_M(VALUE) \ | |
376 | insn_const_int_ok_for_constraint (VALUE, CONSTRAINT_M) | |
377 | #define CONST_OK_FOR_N(VALUE) \ | |
378 | insn_const_int_ok_for_constraint (VALUE, CONSTRAINT_N) | |
379 | #define CONST_OK_FOR_O(VALUE) \ | |
380 | insn_const_int_ok_for_constraint (VALUE, CONSTRAINT_O) | |
dbdbd982 NC |
381 | #define CONST_OK_FOR_W(VALUE) \ |
382 | insn_const_int_ok_for_constraint (VALUE, CONSTRAINT_W) | |
ae180d84 JL |
383 | \f |
384 | /* Stack layout; function entry, exit and calling. */ | |
385 | ||
386 | /* Define this if pushing a word on the stack | |
387 | makes the stack pointer a smaller address. */ | |
388 | ||
62f9f30b | 389 | #define STACK_GROWS_DOWNWARD 1 |
ae180d84 | 390 | |
a4d05547 | 391 | /* Define this to nonzero if the nominal address of the stack frame |
ae180d84 JL |
392 | is at the high-address end of the local variables; |
393 | that is, each additional local variable allocated | |
394 | goes at a more negative offset in the frame. */ | |
395 | ||
f62c8a5c | 396 | #define FRAME_GROWS_DOWNWARD 1 |
ae180d84 | 397 | |
ae180d84 JL |
398 | /* Offset of first parameter from the argument pointer register value. */ |
399 | /* Is equal to the size of the saved fp + pc, even if an fp isn't | |
400 | saved since the value is used before we know. */ | |
401 | ||
402 | #define FIRST_PARM_OFFSET(FNDECL) 0 | |
403 | ||
404 | /* Specify the registers used for certain standard purposes. | |
405 | The values of these macros are register numbers. */ | |
406 | ||
407 | /* Register to use for pushing function arguments. */ | |
223a9d64 | 408 | #define STACK_POINTER_REGNUM SP_REGNUM |
ae180d84 JL |
409 | |
410 | /* Base register for access to local variables of the function. */ | |
223a9d64 | 411 | #define FRAME_POINTER_REGNUM 34 |
ae180d84 | 412 | |
29a65e3d | 413 | /* Register containing return address from latest function call. */ |
223a9d64 | 414 | #define LINK_POINTER_REGNUM LP_REGNUM |
29a65e3d | 415 | |
ae180d84 JL |
416 | /* On some machines the offset between the frame pointer and starting |
417 | offset of the automatic variables is not known until after register | |
418 | allocation has been done (for example, because the saved registers | |
419 | are between these two locations). On those machines, define | |
420 | `FRAME_POINTER_REGNUM' the number of a special, fixed register to | |
421 | be used internally until the offset is known, and define | |
422 | `HARD_FRAME_POINTER_REGNUM' to be actual the hard register number | |
423 | used for the frame pointer. | |
424 | ||
425 | You should define this macro only in the very rare circumstances | |
426 | when it is not possible to calculate the offset between the frame | |
427 | pointer and the automatic variables until after register | |
428 | allocation has been completed. When this macro is defined, you | |
429 | must also indicate in your definition of `ELIMINABLE_REGS' how to | |
430 | eliminate `FRAME_POINTER_REGNUM' into either | |
431 | `HARD_FRAME_POINTER_REGNUM' or `STACK_POINTER_REGNUM'. | |
432 | ||
433 | Do not define this macro if it would be the same as | |
d4de0221 | 434 | `FRAME_POINTER_REGNUM'. */ |
3ce15347 | 435 | #undef HARD_FRAME_POINTER_REGNUM |
ae180d84 JL |
436 | #define HARD_FRAME_POINTER_REGNUM 29 |
437 | ||
438 | /* Base register for access to arguments of the function. */ | |
223a9d64 | 439 | #define ARG_POINTER_REGNUM 35 |
ae180d84 | 440 | |
c7dbc549 JL |
441 | /* Register in which static-chain is passed to a function. |
442 | This must be a call used register. */ | |
443 | #define STATIC_CHAIN_REGNUM 19 | |
ae180d84 | 444 | |
ae180d84 JL |
445 | /* If defined, this macro specifies a table of register pairs used to |
446 | eliminate unneeded registers that point into the stack frame. If | |
447 | it is not defined, the only elimination attempted by the compiler | |
448 | is to replace references to the frame pointer with references to | |
449 | the stack pointer. | |
450 | ||
451 | The definition of this macro is a list of structure | |
452 | initializations, each of which specifies an original and | |
453 | replacement register. | |
454 | ||
455 | On some machines, the position of the argument pointer is not | |
456 | known until the compilation is completed. In such a case, a | |
457 | separate hard register must be used for the argument pointer. | |
458 | This register can be eliminated by replacing it with either the | |
459 | frame pointer or the argument pointer, depending on whether or not | |
460 | the frame pointer has been eliminated. | |
461 | ||
462 | In this case, you might specify: | |
463 | #define ELIMINABLE_REGS \ | |
464 | {{ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ | |
465 | {ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \ | |
466 | {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}} | |
467 | ||
468 | Note that the elimination of the argument pointer with the stack | |
d4de0221 | 469 | pointer is specified first since that is the preferred elimination. */ |
ae180d84 JL |
470 | |
471 | #define ELIMINABLE_REGS \ | |
472 | {{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM }, \ | |
473 | { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM }, \ | |
474 | { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM }, \ | |
475 | { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM }} \ | |
476 | ||
53680238 BE |
477 | /* This macro returns the initial difference between the specified pair |
478 | of registers. */ | |
ae180d84 JL |
479 | |
480 | #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ | |
481 | { \ | |
482 | if ((FROM) == FRAME_POINTER_REGNUM) \ | |
38173d38 | 483 | (OFFSET) = get_frame_size () + crtl->outgoing_args_size; \ |
ae180d84 JL |
484 | else if ((FROM) == ARG_POINTER_REGNUM) \ |
485 | (OFFSET) = compute_frame_size (get_frame_size (), (long *)0); \ | |
486 | else \ | |
f2f84cba | 487 | gcc_unreachable (); \ |
ae180d84 JL |
488 | } |
489 | ||
ae180d84 | 490 | /* Keep the stack pointer constant throughout the function. */ |
f73ad30e | 491 | #define ACCUMULATE_OUTGOING_ARGS 1 |
ae180d84 | 492 | |
a64761a3 | 493 | #define RETURN_ADDR_RTX(COUNT, FP) v850_return_addr (COUNT) |
ae180d84 JL |
494 | \f |
495 | /* Define a data type for recording info about an argument list | |
496 | during the scan of that argument list. This data type should | |
497 | hold all necessary information about the function itself | |
498 | and about the args processed so far, enough to enable macros | |
499 | such as FUNCTION_ARG to determine where the next arg should go. */ | |
500 | ||
501 | #define CUMULATIVE_ARGS struct cum_arg | |
b84d824d | 502 | struct cum_arg { int nbytes; }; |
ae180d84 | 503 | |
ae180d84 JL |
504 | /* Initialize a variable CUM of type CUMULATIVE_ARGS |
505 | for a call to a function whose data type is FNTYPE. | |
506 | For a library call, FNTYPE is 0. */ | |
507 | ||
0f6937fe | 508 | #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \ |
b84d824d | 509 | do { (CUM).nbytes = 0; } while (0) |
ae180d84 | 510 | |
ae180d84 JL |
511 | /* When a parameter is passed in a register, stack space is still |
512 | allocated for it. */ | |
223a9d64 | 513 | #define REG_PARM_STACK_SPACE(DECL) 0 |
ae180d84 | 514 | |
ae180d84 JL |
515 | /* 1 if N is a possible register number for function argument passing. */ |
516 | ||
517 | #define FUNCTION_ARG_REGNO_P(N) (N >= 6 && N <= 9) | |
518 | ||
ae180d84 | 519 | #define DEFAULT_PCC_STRUCT_RETURN 0 |
ae180d84 JL |
520 | |
521 | /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, | |
522 | the stack pointer does not matter. The value is tested only in | |
523 | functions that have frame pointers. | |
524 | No definition is equivalent to always zero. */ | |
525 | ||
526 | #define EXIT_IGNORE_STACK 1 | |
527 | ||
bc9ec51b JW |
528 | /* Define this macro as a C expression that is nonzero for registers |
529 | used by the epilogue or the `return' pattern. */ | |
530 | ||
531 | #define EPILOGUE_USES(REGNO) \ | |
532 | (reload_completed && (REGNO) == LINK_POINTER_REGNUM) | |
533 | ||
ae180d84 JL |
534 | /* Output assembler code to FILE to increment profiler label # LABELNO |
535 | for profiling a function entry. */ | |
536 | ||
537 | #define FUNCTION_PROFILER(FILE, LABELNO) ; | |
538 | ||
ae180d84 JL |
539 | /* Length in units of the trampoline for entering a nested function. */ |
540 | ||
541 | #define TRAMPOLINE_SIZE 24 | |
542 | ||
ae180d84 JL |
543 | /* Addressing modes, and classification of registers for them. */ |
544 | ||
545 | \f | |
546 | /* 1 if X is an rtx for a constant that is a valid address. */ | |
547 | ||
1933ec7e JW |
548 | /* ??? This seems too exclusive. May get better code by accepting more |
549 | possibilities here, in particular, should accept ZDA_NAME SYMBOL_REFs. */ | |
550 | ||
c6150df6 | 551 | #define CONSTANT_ADDRESS_P(X) constraint_satisfied_p (X, CONSTRAINT_K) |
ae180d84 JL |
552 | |
553 | /* Maximum number of registers that can appear in a valid memory address. */ | |
554 | ||
555 | #define MAX_REGS_PER_ADDRESS 1 | |
ae180d84 | 556 | \f |
223a9d64 N |
557 | /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE, |
558 | return the mode to be used for the comparison. | |
559 | ||
560 | For floating-point equality comparisons, CCFPEQmode should be used. | |
561 | VOIDmode should be used in all other cases. | |
562 | ||
563 | For integer comparisons against zero, reduce to CCNOmode or CCZmode if | |
564 | possible, to allow for more combinations. */ | |
565 | ||
566 | #define SELECT_CC_MODE(OP, X, Y) v850_select_cc_mode (OP, X, Y) | |
567 | ||
ae180d84 JL |
568 | /* Nonzero if access to memory by bytes or half words is no faster |
569 | than accessing full words. */ | |
570 | #define SLOW_BYTE_ACCESS 1 | |
571 | ||
e53b6e56 | 572 | /* According expr.cc, a value of around 6 should minimize code size, and |
ae180d84 | 573 | for the V850 series, that's our primary concern. */ |
e04ad03d | 574 | #define MOVE_RATIO(speed) 6 |
ae180d84 JL |
575 | |
576 | /* Indirect calls are expensive, never turn a direct call | |
577 | into an indirect call. */ | |
1e8552c2 | 578 | #define NO_FUNCTION_CSE 1 |
ae180d84 | 579 | |
3ce15347 NC |
580 | /* The four different data regions on the v850. */ |
581 | typedef enum | |
582 | { | |
583 | DATA_AREA_NORMAL, | |
584 | DATA_AREA_SDA, | |
585 | DATA_AREA_TDA, | |
586 | DATA_AREA_ZDA | |
587 | } v850_data_area; | |
588 | ||
3ce15347 NC |
589 | #define TEXT_SECTION_ASM_OP "\t.section .text" |
590 | #define DATA_SECTION_ASM_OP "\t.section .data" | |
591 | #define BSS_SECTION_ASM_OP "\t.section .bss" | |
ae180d84 | 592 | #define SDATA_SECTION_ASM_OP "\t.section .sdata,\"aw\"" |
3ce15347 | 593 | #define SBSS_SECTION_ASM_OP "\t.section .sbss,\"aw\"" |
3ce15347 | 594 | |
471b6f1b HPN |
595 | #define SCOMMON_ASM_OP "\t.scomm\t" |
596 | #define ZCOMMON_ASM_OP "\t.zcomm\t" | |
597 | #define TCOMMON_ASM_OP "\t.tcomm\t" | |
ae180d84 | 598 | |
ae180d84 JL |
599 | #define ASM_COMMENT_START "#" |
600 | ||
601 | /* Output to assembler file text saying following lines | |
602 | may contain character constants, extra white space, comments, etc. */ | |
603 | ||
604 | #define ASM_APP_ON "#APP\n" | |
605 | ||
606 | /* Output to assembler file text saying following lines | |
607 | no longer contain unusual constructs. */ | |
608 | ||
609 | #define ASM_APP_OFF "#NO_APP\n" | |
610 | ||
61db4608 NC |
611 | #undef USER_LABEL_PREFIX |
612 | #define USER_LABEL_PREFIX "_" | |
613 | ||
ae180d84 | 614 | /* This says how to output the assembler to define a global |
6db34dd4 | 615 | uninitialized but not common symbol. */ |
ae180d84 | 616 | |
f7620587 | 617 | #define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \ |
6db34dd4 | 618 | asm_output_aligned_bss ((FILE), (DECL), (NAME), (SIZE), (ALIGN)) |
ae180d84 | 619 | |
3ce15347 NC |
620 | #undef ASM_OUTPUT_ALIGNED_BSS |
621 | #define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \ | |
622 | v850_output_aligned_bss (FILE, DECL, NAME, SIZE, ALIGN) | |
623 | ||
624 | /* This says how to output the assembler to define a global | |
d4de0221 | 625 | uninitialized, common symbol. */ |
3ce15347 NC |
626 | #undef ASM_OUTPUT_ALIGNED_COMMON |
627 | #undef ASM_OUTPUT_COMMON | |
628 | #define ASM_OUTPUT_ALIGNED_DECL_COMMON(FILE, DECL, NAME, SIZE, ALIGN) \ | |
629 | v850_output_common (FILE, DECL, NAME, SIZE, ALIGN) | |
630 | ||
631 | /* This says how to output the assembler to define a local | |
d4de0221 | 632 | uninitialized symbol. */ |
3ce15347 NC |
633 | #undef ASM_OUTPUT_ALIGNED_LOCAL |
634 | #undef ASM_OUTPUT_LOCAL | |
635 | #define ASM_OUTPUT_ALIGNED_DECL_LOCAL(FILE, DECL, NAME, SIZE, ALIGN) \ | |
636 | v850_output_local (FILE, DECL, NAME, SIZE, ALIGN) | |
637 | ||
506a61b1 KG |
638 | /* Globalizing directive for a label. */ |
639 | #define GLOBAL_ASM_OP "\t.global " | |
ae180d84 | 640 | |
4977bab6 | 641 | #define ASM_PN_FORMAT "%s___%lu" |
ae180d84 JL |
642 | |
643 | /* This is how we tell the assembler that two symbols have the same value. */ | |
644 | ||
645 | #define ASM_OUTPUT_DEF(FILE,NAME1,NAME2) \ | |
646 | do { assemble_name(FILE, NAME1); \ | |
647 | fputs(" = ", FILE); \ | |
648 | assemble_name(FILE, NAME2); \ | |
649 | fputc('\n', FILE); } while (0) | |
650 | ||
651 | ||
652 | /* How to refer to registers in assembler output. | |
653 | This sequence is indexed by compiler's hard-register-number (see above). */ | |
654 | ||
223a9d64 N |
655 | #define REGISTER_NAMES \ |
656 | { "r0", "r1", "r2", "sp", "gp", "r5", "r6" , "r7", \ | |
657 | "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", \ | |
658 | "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", \ | |
659 | "r24", "r25", "r26", "r27", "r28", "r29", "ep", "r31", \ | |
660 | "psw", "fcc", \ | |
ae180d84 JL |
661 | ".fp", ".ap"} |
662 | ||
223a9d64 N |
663 | /* Register numbers */ |
664 | ||
665 | #define ADDITIONAL_REGISTER_NAMES \ | |
666 | { { "zero", ZERO_REGNUM }, \ | |
667 | { "hp", 2 }, \ | |
668 | { "r3", 3 }, \ | |
669 | { "r4", 4 }, \ | |
670 | { "tp", 5 }, \ | |
671 | { "fp", 29 }, \ | |
672 | { "r30", 30 }, \ | |
673 | { "lp", LP_REGNUM} } | |
ae180d84 | 674 | |
ae180d84 JL |
675 | /* This is how to output an element of a case-vector that is absolute. */ |
676 | ||
677 | #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \ | |
761c70aa KG |
678 | fprintf (FILE, "\t%s .L%d\n", \ |
679 | (TARGET_BIG_SWITCH ? ".long" : ".short"), VALUE) | |
ae180d84 JL |
680 | |
681 | /* This is how to output an element of a case-vector that is relative. */ | |
682 | ||
df5c71ac DD |
683 | /* Disable the shift, which is for the currently disabled "switch" |
684 | opcode. Se casesi in v850.md. */ | |
223a9d64 | 685 | |
b4378319 NC |
686 | #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \ |
687 | fprintf (FILE, "\t%s %s.L%d-.L%d%s\n", \ | |
1933ec7e | 688 | (TARGET_BIG_SWITCH ? ".long" : ".short"), \ |
dbdbd982 | 689 | (0 && ! TARGET_BIG_SWITCH && (TARGET_V850E_UP) ? "(" : ""), \ |
b4378319 | 690 | VALUE, REL, \ |
dbdbd982 | 691 | (0 && ! TARGET_BIG_SWITCH && (TARGET_V850E_UP) ? ")>>1" : "")) |
ae180d84 | 692 | |
674fdc14 | 693 | #define ASM_OUTPUT_ALIGN(FILE, LOG) \ |
ae180d84 JL |
694 | if ((LOG) != 0) \ |
695 | fprintf (FILE, "\t.align %d\n", (LOG)) | |
696 | ||
b84d824d | 697 | /* Use dwarf2 debugging info by default. */ |
b12b5029 | 698 | #undef PREFERRED_DEBUGGING_TYPE |
b84d824d | 699 | #define PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG |
073595ef | 700 | #define DWARF2_DEBUGGING_INFO 1 |
b84d824d NC |
701 | |
702 | #define DWARF2_FRAME_INFO 1 | |
703 | #define DWARF2_UNWIND_INFO 0 | |
704 | #define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, LINK_POINTER_REGNUM) | |
705 | #define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (LINK_POINTER_REGNUM) | |
b12b5029 NC |
706 | |
707 | #ifndef ASM_GENERATE_INTERNAL_LABEL | |
708 | #define ASM_GENERATE_INTERNAL_LABEL(STRING, PREFIX, NUM) \ | |
709 | sprintf (STRING, "*.%s%u", PREFIX, (unsigned int)(NUM)) | |
710 | #endif | |
ae180d84 | 711 | |
ae180d84 JL |
712 | /* Specify the machine mode that this machine uses |
713 | for the index in the tablejump instruction. */ | |
1933ec7e | 714 | #define CASE_VECTOR_MODE (TARGET_BIG_SWITCH ? SImode : HImode) |
ae180d84 | 715 | |
18543a22 ILT |
716 | /* Define as C expression which evaluates to nonzero if the tablejump |
717 | instruction expects the table to contain offsets from the address of the | |
718 | table. | |
d4de0221 | 719 | Do not define this if the table should contain absolute addresses. */ |
18543a22 | 720 | #define CASE_VECTOR_PC_RELATIVE 1 |
1933ec7e JW |
721 | |
722 | /* The switch instruction requires that the jump table immediately follow | |
d4de0221 | 723 | it. */ |
223a9d64 | 724 | #define JUMP_TABLES_IN_TEXT_SECTION (!TARGET_JUMP_TABLES_IN_DATA_SECTION) |
1933ec7e | 725 | |
1933ec7e JW |
726 | #undef ASM_OUTPUT_BEFORE_CASE_LABEL |
727 | #define ASM_OUTPUT_BEFORE_CASE_LABEL(FILE,PREFIX,NUM,TABLE) \ | |
9739c3d3 | 728 | ASM_OUTPUT_ALIGN ((FILE), (TARGET_BIG_SWITCH ? 2 : 1)) |
ae180d84 | 729 | |
9e11bfef | 730 | #define WORD_REGISTER_OPERATIONS 1 |
ae180d84 JL |
731 | |
732 | /* Byte and short loads sign extend the value to a word. */ | |
733 | #define LOAD_EXTEND_OP(MODE) SIGN_EXTEND | |
734 | ||
ae180d84 JL |
735 | /* Max number of bytes we can move from memory to memory |
736 | in one reasonably fast instruction. */ | |
737 | #define MOVE_MAX 4 | |
738 | ||
739 | /* Define if shifts truncate the shift count | |
740 | which implies one can omit a sign-extension or zero-extension | |
741 | of a shift count. */ | |
742 | #define SHIFT_COUNT_TRUNCATED 1 | |
743 | ||
ae180d84 JL |
744 | /* Specify the machine mode that pointers have. |
745 | After generation of rtl, the compiler makes no further distinction | |
746 | between pointers and any other objects of this machine mode. */ | |
747 | #define Pmode SImode | |
748 | ||
749 | /* A function address in a call instruction | |
750 | is a byte address (for indexing purposes) | |
751 | so give the MEM rtx a byte's mode. */ | |
752 | #define FUNCTION_MODE QImode | |
753 | ||
ae180d84 | 754 | /* Tell compiler we want to support GHS pragmas */ |
c58b209a NB |
755 | #define REGISTER_TARGET_PRAGMAS() do { \ |
756 | c_register_pragma ("ghs", "interrupt", ghs_pragma_interrupt); \ | |
757 | c_register_pragma ("ghs", "section", ghs_pragma_section); \ | |
758 | c_register_pragma ("ghs", "starttda", ghs_pragma_starttda); \ | |
759 | c_register_pragma ("ghs", "startsda", ghs_pragma_startsda); \ | |
760 | c_register_pragma ("ghs", "startzda", ghs_pragma_startzda); \ | |
761 | c_register_pragma ("ghs", "endtda", ghs_pragma_endtda); \ | |
762 | c_register_pragma ("ghs", "endsda", ghs_pragma_endsda); \ | |
763 | c_register_pragma ("ghs", "endzda", ghs_pragma_endzda); \ | |
8b97c5f8 | 764 | } while (0) |
3ce15347 NC |
765 | |
766 | /* enum GHS_SECTION_KIND is an enumeration of the kinds of sections that | |
767 | can appear in the "ghs section" pragma. These names are used to index | |
768 | into the GHS_default_section_names[] and GHS_current_section_names[] | |
e53b6e56 | 769 | that are defined in v850.cc, and so the ordering of each must remain |
839a4992 | 770 | consistent. |
3ce15347 NC |
771 | |
772 | These arrays give the default and current names for each kind of | |
773 | section defined by the GHS pragmas. The current names can be changed | |
774 | by the "ghs section" pragma. If the current names are null, use | |
775 | the default names. Note that the two arrays have different types. | |
776 | ||
777 | For the *normal* section kinds (like .data, .text, etc.) we do not | |
778 | want to explicitly force the name of these sections, but would rather | |
779 | let the linker (or at least the back end) choose the name of the | |
cd47dfd0 | 780 | section, UNLESS the user has forced a specific name for these section |
3ce15347 NC |
781 | kinds. To accomplish this set the name in ghs_default_section_names |
782 | to null. */ | |
783 | ||
784 | enum GHS_section_kind | |
785 | { | |
786 | GHS_SECTION_KIND_DEFAULT, | |
787 | ||
788 | GHS_SECTION_KIND_TEXT, | |
789 | GHS_SECTION_KIND_DATA, | |
790 | GHS_SECTION_KIND_RODATA, | |
791 | GHS_SECTION_KIND_BSS, | |
792 | GHS_SECTION_KIND_SDATA, | |
793 | GHS_SECTION_KIND_ROSDATA, | |
794 | GHS_SECTION_KIND_TDATA, | |
795 | GHS_SECTION_KIND_ZDATA, | |
796 | GHS_SECTION_KIND_ROZDATA, | |
797 | ||
798 | COUNT_OF_GHS_SECTION_KINDS /* must be last */ | |
799 | }; | |
ae180d84 | 800 | |
c3edd394 NC |
801 | /* The following code is for handling pragmas supported by the |
802 | v850 compiler produced by Green Hills Software. This is at | |
803 | the specific request of a customer. */ | |
804 | ||
805 | typedef struct data_area_stack_element | |
806 | { | |
807 | struct data_area_stack_element * prev; | |
808 | v850_data_area data_area; /* Current default data area. */ | |
809 | } data_area_stack_element; | |
810 | ||
811 | /* Track the current data area set by the | |
812 | data area pragma (which can be nested). */ | |
813 | extern data_area_stack_element * data_area_stack; | |
814 | ||
815 | /* Names of the various data areas used on the v850. */ | |
cd47dfd0 NC |
816 | extern const char * GHS_default_section_names [(int) COUNT_OF_GHS_SECTION_KINDS]; |
817 | extern const char * GHS_current_section_names [(int) COUNT_OF_GHS_SECTION_KINDS]; | |
c3edd394 | 818 | |
38e01259 | 819 | /* The assembler op to start the file. */ |
ae180d84 JL |
820 | |
821 | #define FILE_ASM_OP "\t.file\n" | |
822 | ||
ae180d84 JL |
823 | /* Implement ZDA, TDA, and SDA */ |
824 | ||
825 | #define EP_REGNUM 30 /* ep register number */ | |
826 | ||
50d1ff6a RH |
827 | #define SYMBOL_FLAG_ZDA (SYMBOL_FLAG_MACH_DEP << 0) |
828 | #define SYMBOL_FLAG_TDA (SYMBOL_FLAG_MACH_DEP << 1) | |
829 | #define SYMBOL_FLAG_SDA (SYMBOL_FLAG_MACH_DEP << 2) | |
830 | #define SYMBOL_REF_ZDA_P(X) ((SYMBOL_REF_FLAGS (X) & SYMBOL_FLAG_ZDA) != 0) | |
831 | #define SYMBOL_REF_TDA_P(X) ((SYMBOL_REF_FLAGS (X) & SYMBOL_FLAG_TDA) != 0) | |
832 | #define SYMBOL_REF_SDA_P(X) ((SYMBOL_REF_FLAGS (X) & SYMBOL_FLAG_SDA) != 0) | |
ae180d84 | 833 | |
d6b5193b RS |
834 | #define TARGET_ASM_INIT_SECTIONS v850_asm_init_sections |
835 | ||
dbdbd982 NC |
836 | #define ADJUST_INSN_LENGTH(INSN, LENGTH) \ |
837 | ((LENGTH) = v850_adjust_insn_length ((INSN), (LENGTH))) | |
838 | ||
122603fa | 839 | #endif /* ! GCC_V850_H */ |