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752df20e | 1 | /* Common subexpression elimination for GNU compiler. |
fbd26352 | 2 | Copyright (C) 1987-2019 Free Software Foundation, Inc. |
752df20e | 3 | |
f12b58b3 | 4 | This file is part of GCC. |
752df20e | 5 | |
f12b58b3 | 6 | GCC is free software; you can redistribute it and/or modify it under |
7 | the terms of the GNU General Public License as published by the Free | |
8c4c00c1 | 8 | Software Foundation; either version 3, or (at your option) any later |
f12b58b3 | 9 | version. |
752df20e | 10 | |
f12b58b3 | 11 | GCC is distributed in the hope that it will be useful, but WITHOUT ANY |
12 | WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
13 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
14 | for more details. | |
752df20e | 15 | |
16 | You should have received a copy of the GNU General Public License | |
8c4c00c1 | 17 | along with GCC; see the file COPYING3. If not see |
18 | <http://www.gnu.org/licenses/>. */ | |
752df20e | 19 | |
752df20e | 20 | #include "config.h" |
405711de | 21 | #include "system.h" |
805e22b2 | 22 | #include "coretypes.h" |
9ef16211 | 23 | #include "backend.h" |
7c29e30e | 24 | #include "target.h" |
752df20e | 25 | #include "rtl.h" |
7c29e30e | 26 | #include "tree.h" |
27 | #include "cfghooks.h" | |
9ef16211 | 28 | #include "df.h" |
ad7b10a2 | 29 | #include "memmodel.h" |
7953c610 | 30 | #include "tm_p.h" |
7c29e30e | 31 | #include "insn-config.h" |
42fe97ed | 32 | #include "regs.h" |
7c29e30e | 33 | #include "emit-rtl.h" |
34 | #include "recog.h" | |
94ea8568 | 35 | #include "cfgrtl.h" |
36 | #include "cfganal.h" | |
37 | #include "cfgcleanup.h" | |
d53441c8 | 38 | #include "alias.h" |
ebd9163c | 39 | #include "toplev.h" |
38ccff25 | 40 | #include "params.h" |
d263732c | 41 | #include "rtlhooks-def.h" |
77fce4cd | 42 | #include "tree-pass.h" |
3072d30e | 43 | #include "dbgcnt.h" |
ff17e9ce | 44 | #include "rtl-iter.h" |
7e871eb5 | 45 | #include "regs.h" |
46 | #include "function-abi.h" | |
752df20e | 47 | |
48 | /* The basic idea of common subexpression elimination is to go | |
49 | through the code, keeping a record of expressions that would | |
50 | have the same value at the current scan point, and replacing | |
51 | expressions encountered with the cheapest equivalent expression. | |
52 | ||
53 | It is too complicated to keep track of the different possibilities | |
c863f0f6 | 54 | when control paths merge in this code; so, at each label, we forget all |
55 | that is known and start fresh. This can be described as processing each | |
56 | extended basic block separately. We have a separate pass to perform | |
57 | global CSE. | |
58 | ||
59 | Note CSE can turn a conditional or computed jump into a nop or | |
60 | an unconditional jump. When this occurs we arrange to run the jump | |
61 | optimizer after CSE to delete the unreachable code. | |
752df20e | 62 | |
63 | We use two data structures to record the equivalent expressions: | |
a7f3b1c7 | 64 | a hash table for most expressions, and a vector of "quantity |
65 | numbers" to record equivalent (pseudo) registers. | |
752df20e | 66 | |
67 | The use of the special data structure for registers is desirable | |
68 | because it is faster. It is possible because registers references | |
69 | contain a fairly small number, the register number, taken from | |
70 | a contiguously allocated series, and two register references are | |
71 | identical if they have the same number. General expressions | |
72 | do not have any such thing, so the only way to retrieve the | |
73 | information recorded on an expression other than a register | |
74 | is to keep it in a hash table. | |
75 | ||
76 | Registers and "quantity numbers": | |
cb10db9d | 77 | |
752df20e | 78 | At the start of each basic block, all of the (hardware and pseudo) |
79 | registers used in the function are given distinct quantity | |
80 | numbers to indicate their contents. During scan, when the code | |
81 | copies one register into another, we copy the quantity number. | |
82 | When a register is loaded in any other way, we allocate a new | |
83 | quantity number to describe the value generated by this operation. | |
96d808c2 | 84 | `REG_QTY (N)' records what quantity register N is currently thought |
752df20e | 85 | of as containing. |
86 | ||
1a5bccce | 87 | All real quantity numbers are greater than or equal to zero. |
96d808c2 | 88 | If register N has not been assigned a quantity, `REG_QTY (N)' will |
1a5bccce | 89 | equal -N - 1, which is always negative. |
752df20e | 90 | |
1a5bccce | 91 | Quantity numbers below zero do not exist and none of the `qty_table' |
92 | entries should be referenced with a negative index. | |
752df20e | 93 | |
94 | We also maintain a bidirectional chain of registers for each | |
a7f3b1c7 | 95 | quantity number. The `qty_table` members `first_reg' and `last_reg', |
96 | and `reg_eqv_table' members `next' and `prev' hold these chains. | |
752df20e | 97 | |
98 | The first register in a chain is the one whose lifespan is least local. | |
99 | Among equals, it is the one that was seen first. | |
100 | We replace any equivalent register with that one. | |
101 | ||
102 | If two registers have the same quantity number, it must be true that | |
a7f3b1c7 | 103 | REG expressions with qty_table `mode' must be in the hash table for both |
752df20e | 104 | registers and must be in the same class. |
105 | ||
106 | The converse is not true. Since hard registers may be referenced in | |
107 | any mode, two REG expressions might be equivalent in the hash table | |
108 | but not have the same quantity number if the quantity number of one | |
109 | of the registers is not the same mode as those expressions. | |
cb10db9d | 110 | |
752df20e | 111 | Constants and quantity numbers |
112 | ||
113 | When a quantity has a known constant value, that value is stored | |
a7f3b1c7 | 114 | in the appropriate qty_table `const_rtx'. This is in addition to |
752df20e | 115 | putting the constant in the hash table as is usual for non-regs. |
116 | ||
f9e15121 | 117 | Whether a reg or a constant is preferred is determined by the configuration |
752df20e | 118 | macro CONST_COSTS and will often depend on the constant value. In any |
119 | event, expressions containing constants can be simplified, by fold_rtx. | |
120 | ||
121 | When a quantity has a known nearly constant value (such as an address | |
a7f3b1c7 | 122 | of a stack slot), that value is stored in the appropriate qty_table |
123 | `const_rtx'. | |
752df20e | 124 | |
125 | Integer constants don't have a machine mode. However, cse | |
126 | determines the intended machine mode from the destination | |
127 | of the instruction that moves the constant. The machine mode | |
128 | is recorded in the hash table along with the actual RTL | |
129 | constant expression so that different modes are kept separate. | |
130 | ||
131 | Other expressions: | |
132 | ||
133 | To record known equivalences among expressions in general | |
134 | we use a hash table called `table'. It has a fixed number of buckets | |
135 | that contain chains of `struct table_elt' elements for expressions. | |
136 | These chains connect the elements whose expressions have the same | |
137 | hash codes. | |
138 | ||
139 | Other chains through the same elements connect the elements which | |
140 | currently have equivalent values. | |
141 | ||
142 | Register references in an expression are canonicalized before hashing | |
a7f3b1c7 | 143 | the expression. This is done using `reg_qty' and qty_table `first_reg'. |
752df20e | 144 | The hash code of a register reference is computed using the quantity |
145 | number, not the register number. | |
146 | ||
147 | When the value of an expression changes, it is necessary to remove from the | |
148 | hash table not just that expression but all expressions whose values | |
149 | could be different as a result. | |
150 | ||
151 | 1. If the value changing is in memory, except in special cases | |
152 | ANYTHING referring to memory could be changed. That is because | |
153 | nobody knows where a pointer does not point. | |
154 | The function `invalidate_memory' removes what is necessary. | |
155 | ||
156 | The special cases are when the address is constant or is | |
157 | a constant plus a fixed register such as the frame pointer | |
158 | or a static chain pointer. When such addresses are stored in, | |
159 | we can tell exactly which other such addresses must be invalidated | |
160 | due to overlap. `invalidate' does this. | |
161 | All expressions that refer to non-constant | |
162 | memory addresses are also invalidated. `invalidate_memory' does this. | |
163 | ||
164 | 2. If the value changing is a register, all expressions | |
165 | containing references to that register, and only those, | |
166 | must be removed. | |
167 | ||
168 | Because searching the entire hash table for expressions that contain | |
169 | a register is very slow, we try to figure out when it isn't necessary. | |
170 | Precisely, this is necessary only when expressions have been | |
171 | entered in the hash table using this register, and then the value has | |
172 | changed, and then another expression wants to be added to refer to | |
173 | the register's new value. This sequence of circumstances is rare | |
174 | within any one basic block. | |
175 | ||
96d808c2 | 176 | `REG_TICK' and `REG_IN_TABLE', accessors for members of |
177 | cse_reg_info, are used to detect this case. REG_TICK (i) is | |
178 | incremented whenever a value is stored in register i. | |
179 | REG_IN_TABLE (i) holds -1 if no references to register i have been | |
180 | entered in the table; otherwise, it contains the value REG_TICK (i) | |
181 | had when the references were entered. If we want to enter a | |
182 | reference and REG_IN_TABLE (i) != REG_TICK (i), we must scan and | |
183 | remove old references. Until we want to enter a new entry, the | |
184 | mere fact that the two vectors don't match makes the entries be | |
185 | ignored if anyone tries to match them. | |
752df20e | 186 | |
187 | Registers themselves are entered in the hash table as well as in | |
96d808c2 | 188 | the equivalent-register chains. However, `REG_TICK' and |
189 | `REG_IN_TABLE' do not apply to expressions which are simple | |
752df20e | 190 | register references. These expressions are removed from the table |
191 | immediately when they become invalid, and this can be done even if | |
192 | we do not immediately search for all the expressions that refer to | |
193 | the register. | |
194 | ||
195 | A CLOBBER rtx in an instruction invalidates its operand for further | |
196 | reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK | |
197 | invalidates everything that resides in memory. | |
198 | ||
199 | Related expressions: | |
200 | ||
201 | Constant expressions that differ only by an additive integer | |
202 | are called related. When a constant expression is put in | |
203 | the table, the related expression with no constant term | |
204 | is also entered. These are made to point at each other | |
205 | so that it is possible to find out if there exists any | |
206 | register equivalent to an expression related to a given expression. */ | |
cb10db9d | 207 | |
a7f3b1c7 | 208 | /* Length of qty_table vector. We know in advance we will not need |
209 | a quantity number this big. */ | |
752df20e | 210 | |
211 | static int max_qty; | |
212 | ||
213 | /* Next quantity number to be allocated. | |
214 | This is 1 + the largest number needed so far. */ | |
215 | ||
216 | static int next_qty; | |
217 | ||
a7f3b1c7 | 218 | /* Per-qty information tracking. |
752df20e | 219 | |
a7f3b1c7 | 220 | `first_reg' and `last_reg' track the head and tail of the |
221 | chain of registers which currently contain this quantity. | |
752df20e | 222 | |
a7f3b1c7 | 223 | `mode' contains the machine mode of this quantity. |
752df20e | 224 | |
a7f3b1c7 | 225 | `const_rtx' holds the rtx of the constant value of this |
226 | quantity, if known. A summations of the frame/arg pointer | |
227 | and a constant can also be entered here. When this holds | |
228 | a known value, `const_insn' is the insn which stored the | |
229 | constant value. | |
752df20e | 230 | |
a7f3b1c7 | 231 | `comparison_{code,const,qty}' are used to track when a |
232 | comparison between a quantity and some constant or register has | |
233 | been passed. In such a case, we know the results of the comparison | |
234 | in case we see it again. These members record a comparison that | |
235 | is known to be true. `comparison_code' holds the rtx code of such | |
236 | a comparison, else it is set to UNKNOWN and the other two | |
237 | comparison members are undefined. `comparison_const' holds | |
238 | the constant being compared against, or zero if the comparison | |
239 | is not against a constant. `comparison_qty' holds the quantity | |
240 | being compared against when the result is known. If the comparison | |
241 | is not with a register, `comparison_qty' is -1. */ | |
752df20e | 242 | |
a7f3b1c7 | 243 | struct qty_table_elem |
244 | { | |
245 | rtx const_rtx; | |
47f1d198 | 246 | rtx_insn *const_insn; |
a7f3b1c7 | 247 | rtx comparison_const; |
248 | int comparison_qty; | |
02e7a332 | 249 | unsigned int first_reg, last_reg; |
d8b9732d | 250 | /* The sizes of these fields should match the sizes of the |
251 | code and mode fields of struct rtx_def (see rtl.h). */ | |
252 | ENUM_BITFIELD(rtx_code) comparison_code : 16; | |
253 | ENUM_BITFIELD(machine_mode) mode : 8; | |
a7f3b1c7 | 254 | }; |
752df20e | 255 | |
a7f3b1c7 | 256 | /* The table of all qtys, indexed by qty number. */ |
257 | static struct qty_table_elem *qty_table; | |
752df20e | 258 | |
752df20e | 259 | /* For machines that have a CC0, we do not record its value in the hash |
260 | table since its use is guaranteed to be the insn immediately following | |
261 | its definition and any other insn is presumed to invalidate it. | |
262 | ||
c6ddfc69 | 263 | Instead, we store below the current and last value assigned to CC0. |
264 | If it should happen to be a constant, it is stored in preference | |
265 | to the actual assigned value. In case it is a constant, we store | |
266 | the mode in which the constant should be interpreted. */ | |
752df20e | 267 | |
c6ddfc69 | 268 | static rtx this_insn_cc0, prev_insn_cc0; |
3754d046 | 269 | static machine_mode this_insn_cc0_mode, prev_insn_cc0_mode; |
752df20e | 270 | |
271 | /* Insn being scanned. */ | |
272 | ||
47f1d198 | 273 | static rtx_insn *this_insn; |
f529eb25 | 274 | static bool optimize_this_for_speed_p; |
752df20e | 275 | |
2a384a22 | 276 | /* Index by register number, gives the number of the next (or |
277 | previous) register in the chain of registers sharing the same | |
752df20e | 278 | value. |
279 | ||
280 | Or -1 if this register is at the end of the chain. | |
281 | ||
96d808c2 | 282 | If REG_QTY (N) == -N - 1, reg_eqv_table[N].next is undefined. */ |
a7f3b1c7 | 283 | |
284 | /* Per-register equivalence chain. */ | |
285 | struct reg_eqv_elem | |
286 | { | |
287 | int next, prev; | |
288 | }; | |
752df20e | 289 | |
a7f3b1c7 | 290 | /* The table of all register equivalence chains. */ |
291 | static struct reg_eqv_elem *reg_eqv_table; | |
752df20e | 292 | |
155b05dc | 293 | struct cse_reg_info |
294 | { | |
3bd20490 | 295 | /* The timestamp at which this register is initialized. */ |
296 | unsigned int timestamp; | |
9c4f3716 | 297 | |
298 | /* The quantity number of the register's current contents. */ | |
299 | int reg_qty; | |
300 | ||
301 | /* The number of times the register has been altered in the current | |
302 | basic block. */ | |
303 | int reg_tick; | |
304 | ||
d1264606 | 305 | /* The REG_TICK value at which rtx's containing this register are |
306 | valid in the hash table. If this does not equal the current | |
307 | reg_tick value, such expressions existing in the hash table are | |
308 | invalid. */ | |
309 | int reg_in_table; | |
126fb012 | 310 | |
311 | /* The SUBREG that was set when REG_TICK was last incremented. Set | |
312 | to -1 if the last store was to the whole register, not a subreg. */ | |
70e488ba | 313 | unsigned int subreg_ticked; |
d1264606 | 314 | }; |
752df20e | 315 | |
3bd20490 | 316 | /* A table of cse_reg_info indexed by register numbers. */ |
f9413025 | 317 | static struct cse_reg_info *cse_reg_info_table; |
ac613367 | 318 | |
3bd20490 | 319 | /* The size of the above table. */ |
320 | static unsigned int cse_reg_info_table_size; | |
9c4f3716 | 321 | |
3bd20490 | 322 | /* The index of the first entry that has not been initialized. */ |
323 | static unsigned int cse_reg_info_table_first_uninitialized; | |
752df20e | 324 | |
3bd20490 | 325 | /* The timestamp at the beginning of the current run of |
be22716f | 326 | cse_extended_basic_block. We increment this variable at the beginning of |
327 | the current run of cse_extended_basic_block. The timestamp field of a | |
3bd20490 | 328 | cse_reg_info entry matches the value of this variable if and only |
329 | if the entry has been initialized during the current run of | |
be22716f | 330 | cse_extended_basic_block. */ |
3bd20490 | 331 | static unsigned int cse_reg_info_timestamp; |
752df20e | 332 | |
cb10db9d | 333 | /* A HARD_REG_SET containing all the hard registers for which there is |
752df20e | 334 | currently a REG expression in the hash table. Note the difference |
335 | from the above variables, which indicate if the REG is mentioned in some | |
336 | expression in the table. */ | |
337 | ||
338 | static HARD_REG_SET hard_regs_in_table; | |
339 | ||
283a6b26 | 340 | /* True if CSE has altered the CFG. */ |
341 | static bool cse_cfg_altered; | |
752df20e | 342 | |
283a6b26 | 343 | /* True if CSE has altered conditional jump insns in such a way |
344 | that jump optimization should be redone. */ | |
345 | static bool cse_jumps_altered; | |
752df20e | 346 | |
283a6b26 | 347 | /* True if we put a LABEL_REF into the hash table for an INSN |
348 | without a REG_LABEL_OPERAND, we have to rerun jump after CSE | |
349 | to put in the note. */ | |
350 | static bool recorded_label_ref; | |
26db0da8 | 351 | |
752df20e | 352 | /* canon_hash stores 1 in do_not_record |
353 | if it notices a reference to CC0, PC, or some other volatile | |
354 | subexpression. */ | |
355 | ||
356 | static int do_not_record; | |
357 | ||
358 | /* canon_hash stores 1 in hash_arg_in_memory | |
359 | if it notices a reference to memory within the expression being hashed. */ | |
360 | ||
361 | static int hash_arg_in_memory; | |
362 | ||
752df20e | 363 | /* The hash table contains buckets which are chains of `struct table_elt's, |
364 | each recording one expression's information. | |
365 | That expression is in the `exp' field. | |
366 | ||
7cfb9bcf | 367 | The canon_exp field contains a canonical (from the point of view of |
368 | alias analysis) version of the `exp' field. | |
369 | ||
752df20e | 370 | Those elements with the same hash code are chained in both directions |
371 | through the `next_same_hash' and `prev_same_hash' fields. | |
372 | ||
373 | Each set of expressions with equivalent values | |
374 | are on a two-way chain through the `next_same_value' | |
375 | and `prev_same_value' fields, and all point with | |
376 | the `first_same_value' field at the first element in | |
377 | that chain. The chain is in order of increasing cost. | |
378 | Each element's cost value is in its `cost' field. | |
379 | ||
380 | The `in_memory' field is nonzero for elements that | |
381 | involve any reference to memory. These elements are removed | |
382 | whenever a write is done to an unidentified location in memory. | |
383 | To be safe, we assume that a memory address is unidentified unless | |
384 | the address is either a symbol constant or a constant plus | |
385 | the frame pointer or argument pointer. | |
386 | ||
752df20e | 387 | The `related_value' field is used to connect related expressions |
388 | (that differ by adding an integer). | |
389 | The related expressions are chained in a circular fashion. | |
390 | `related_value' is zero for expressions for which this | |
391 | chain is not useful. | |
392 | ||
393 | The `cost' field stores the cost of this element's expression. | |
d27eb4b1 | 394 | The `regcost' field stores the value returned by approx_reg_cost for |
395 | this element's expression. | |
752df20e | 396 | |
397 | The `is_const' flag is set if the element is a constant (including | |
398 | a fixed address). | |
399 | ||
400 | The `flag' field is used as a temporary during some search routines. | |
401 | ||
402 | The `mode' field is usually the same as GET_MODE (`exp'), but | |
403 | if `exp' is a CONST_INT and has no machine mode then the `mode' | |
404 | field is the mode it was being used as. Each constant is | |
405 | recorded separately for each mode it is used with. */ | |
406 | ||
752df20e | 407 | struct table_elt |
408 | { | |
409 | rtx exp; | |
7cfb9bcf | 410 | rtx canon_exp; |
752df20e | 411 | struct table_elt *next_same_hash; |
412 | struct table_elt *prev_same_hash; | |
413 | struct table_elt *next_same_value; | |
414 | struct table_elt *prev_same_value; | |
415 | struct table_elt *first_same_value; | |
416 | struct table_elt *related_value; | |
417 | int cost; | |
d27eb4b1 | 418 | int regcost; |
d8b9732d | 419 | /* The size of this field should match the size |
420 | of the mode field of struct rtx_def (see rtl.h). */ | |
421 | ENUM_BITFIELD(machine_mode) mode : 8; | |
752df20e | 422 | char in_memory; |
752df20e | 423 | char is_const; |
424 | char flag; | |
425 | }; | |
426 | ||
752df20e | 427 | /* We don't want a lot of buckets, because we rarely have very many |
428 | things stored in the hash table, and a lot of buckets slows | |
429 | down a lot of loops that happen frequently. */ | |
9c4f3716 | 430 | #define HASH_SHIFT 5 |
431 | #define HASH_SIZE (1 << HASH_SHIFT) | |
432 | #define HASH_MASK (HASH_SIZE - 1) | |
752df20e | 433 | |
434 | /* Compute hash code of X in mode M. Special-case case where X is a pseudo | |
435 | register (hard registers may require `do_not_record' to be set). */ | |
436 | ||
437 | #define HASH(X, M) \ | |
8ad4c111 | 438 | ((REG_P (X) && REGNO (X) >= FIRST_PSEUDO_REGISTER \ |
9c4f3716 | 439 | ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \ |
440 | : canon_hash (X, M)) & HASH_MASK) | |
752df20e | 441 | |
78d140c9 | 442 | /* Like HASH, but without side-effects. */ |
443 | #define SAFE_HASH(X, M) \ | |
444 | ((REG_P (X) && REGNO (X) >= FIRST_PSEUDO_REGISTER \ | |
445 | ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \ | |
446 | : safe_hash (X, M)) & HASH_MASK) | |
447 | ||
d27eb4b1 | 448 | /* Determine whether register number N is considered a fixed register for the |
449 | purpose of approximating register costs. | |
752df20e | 450 | It is desirable to replace other regs with fixed regs, to reduce need for |
451 | non-fixed hard regs. | |
349858d4 | 452 | A reg wins if it is either the frame pointer or designated as fixed. */ |
752df20e | 453 | #define FIXED_REGNO_P(N) \ |
b69007e1 | 454 | ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \ |
4313a67c | 455 | || fixed_regs[N] || global_regs[N]) |
752df20e | 456 | |
457 | /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed | |
2e16c7bd | 458 | hard registers and pointers into the frame are the cheapest with a cost |
459 | of 0. Next come pseudos with a cost of one and other hard registers with | |
460 | a cost of 2. Aside from these special cases, call `rtx_cost'. */ | |
461 | ||
5bbaf5ca | 462 | #define CHEAP_REGNO(N) \ |
9af5ce0c | 463 | (REGNO_PTR_FRAME_P (N) \ |
5bbaf5ca | 464 | || (HARD_REGISTER_NUM_P (N) \ |
c0191571 | 465 | && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS)) |
752df20e | 466 | |
5ae4887d | 467 | #define COST(X, MODE) \ |
468 | (REG_P (X) ? 0 : notreg_cost (X, MODE, SET, 1)) | |
469 | #define COST_IN(X, MODE, OUTER, OPNO) \ | |
470 | (REG_P (X) ? 0 : notreg_cost (X, MODE, OUTER, OPNO)) | |
752df20e | 471 | |
d1264606 | 472 | /* Get the number of times this register has been updated in this |
473 | basic block. */ | |
474 | ||
3bd20490 | 475 | #define REG_TICK(N) (get_cse_reg_info (N)->reg_tick) |
d1264606 | 476 | |
477 | /* Get the point at which REG was recorded in the table. */ | |
478 | ||
3bd20490 | 479 | #define REG_IN_TABLE(N) (get_cse_reg_info (N)->reg_in_table) |
d1264606 | 480 | |
126fb012 | 481 | /* Get the SUBREG set at the last increment to REG_TICK (-1 if not a |
482 | SUBREG). */ | |
483 | ||
3bd20490 | 484 | #define SUBREG_TICKED(N) (get_cse_reg_info (N)->subreg_ticked) |
126fb012 | 485 | |
d1264606 | 486 | /* Get the quantity number for REG. */ |
487 | ||
3bd20490 | 488 | #define REG_QTY(N) (get_cse_reg_info (N)->reg_qty) |
d1264606 | 489 | |
752df20e | 490 | /* Determine if the quantity number for register X represents a valid index |
a7f3b1c7 | 491 | into the qty_table. */ |
752df20e | 492 | |
1a5bccce | 493 | #define REGNO_QTY_VALID_P(N) (REG_QTY (N) >= 0) |
752df20e | 494 | |
01c8e4c9 | 495 | /* Compare table_elt X and Y and return true iff X is cheaper than Y. */ |
496 | ||
497 | #define CHEAPER(X, Y) \ | |
498 | (preferable ((X)->cost, (X)->regcost, (Y)->cost, (Y)->regcost) < 0) | |
499 | ||
9c4f3716 | 500 | static struct table_elt *table[HASH_SIZE]; |
752df20e | 501 | |
502 | /* Chain of `struct table_elt's made so far for this function | |
503 | but currently removed from the table. */ | |
504 | ||
505 | static struct table_elt *free_element_chain; | |
506 | ||
752df20e | 507 | /* Set to the cost of a constant pool reference if one was found for a |
508 | symbolic constant. If this was found, it means we should try to | |
509 | convert constants into constant pool entries if they don't fit in | |
510 | the insn. */ | |
511 | ||
512 | static int constant_pool_entries_cost; | |
634d45d7 | 513 | static int constant_pool_entries_regcost; |
752df20e | 514 | |
0b09525f | 515 | /* Trace a patch through the CFG. */ |
516 | ||
517 | struct branch_path | |
518 | { | |
519 | /* The basic block for this path entry. */ | |
520 | basic_block bb; | |
521 | }; | |
522 | ||
be22716f | 523 | /* This data describes a block that will be processed by |
524 | cse_extended_basic_block. */ | |
9def8c3e | 525 | |
155b05dc | 526 | struct cse_basic_block_data |
527 | { | |
9def8c3e | 528 | /* Total number of SETs in block. */ |
529 | int nsets; | |
9def8c3e | 530 | /* Size of current branch path, if any. */ |
531 | int path_size; | |
be22716f | 532 | /* Current path, indicating which basic_blocks will be processed. */ |
0b09525f | 533 | struct branch_path *path; |
9def8c3e | 534 | }; |
535 | ||
3072d30e | 536 | |
537 | /* Pointers to the live in/live out bitmaps for the boundaries of the | |
538 | current EBB. */ | |
539 | static bitmap cse_ebb_live_in, cse_ebb_live_out; | |
540 | ||
be22716f | 541 | /* A simple bitmap to track which basic blocks have been visited |
542 | already as part of an already processed extended basic block. */ | |
543 | static sbitmap cse_visited_basic_blocks; | |
544 | ||
8ec3a57b | 545 | static bool fixed_base_plus_p (rtx x); |
5ae4887d | 546 | static int notreg_cost (rtx, machine_mode, enum rtx_code, int); |
069eea26 | 547 | static int preferable (int, int, int, int); |
8ec3a57b | 548 | static void new_basic_block (void); |
3754d046 | 549 | static void make_new_qty (unsigned int, machine_mode); |
8ec3a57b | 550 | static void make_regs_eqv (unsigned int, unsigned int); |
551 | static void delete_reg_equiv (unsigned int); | |
552 | static int mention_regs (rtx); | |
553 | static int insert_regs (rtx, struct table_elt *, int); | |
554 | static void remove_from_table (struct table_elt *, unsigned); | |
d2c970fe | 555 | static void remove_pseudo_from_table (rtx, unsigned); |
3754d046 | 556 | static struct table_elt *lookup (rtx, unsigned, machine_mode); |
557 | static struct table_elt *lookup_for_remove (rtx, unsigned, machine_mode); | |
8ec3a57b | 558 | static rtx lookup_as_function (rtx, enum rtx_code); |
01c8e4c9 | 559 | static struct table_elt *insert_with_costs (rtx, struct table_elt *, unsigned, |
3754d046 | 560 | machine_mode, int, int); |
8ec3a57b | 561 | static struct table_elt *insert (rtx, struct table_elt *, unsigned, |
3754d046 | 562 | machine_mode); |
8ec3a57b | 563 | static void merge_equiv_classes (struct table_elt *, struct table_elt *); |
3754d046 | 564 | static void invalidate (rtx, machine_mode); |
8ec3a57b | 565 | static void remove_invalid_refs (unsigned int); |
9edf7ea8 | 566 | static void remove_invalid_subreg_refs (unsigned int, poly_uint64, |
3754d046 | 567 | machine_mode); |
8ec3a57b | 568 | static void rehash_using_reg (rtx); |
569 | static void invalidate_memory (void); | |
8ec3a57b | 570 | static rtx use_related_value (rtx, struct table_elt *); |
78d140c9 | 571 | |
3754d046 | 572 | static inline unsigned canon_hash (rtx, machine_mode); |
573 | static inline unsigned safe_hash (rtx, machine_mode); | |
e1ab7874 | 574 | static inline unsigned hash_rtx_string (const char *); |
78d140c9 | 575 | |
47f1d198 | 576 | static rtx canon_reg (rtx, rtx_insn *); |
8ec3a57b | 577 | static enum rtx_code find_comparison_args (enum rtx_code, rtx *, rtx *, |
3754d046 | 578 | machine_mode *, |
579 | machine_mode *); | |
47f1d198 | 580 | static rtx fold_rtx (rtx, rtx_insn *); |
8ec3a57b | 581 | static rtx equiv_constant (rtx); |
47f1d198 | 582 | static void record_jump_equiv (rtx_insn *, bool); |
3754d046 | 583 | static void record_jump_cond (enum rtx_code, machine_mode, rtx, rtx, |
8ec3a57b | 584 | int); |
47f1d198 | 585 | static void cse_insn (rtx_insn *); |
be22716f | 586 | static void cse_prescan_path (struct cse_basic_block_data *); |
47f1d198 | 587 | static void invalidate_from_clobbers (rtx_insn *); |
588 | static void invalidate_from_sets_and_clobbers (rtx_insn *); | |
3072d30e | 589 | static rtx cse_process_notes (rtx, rtx, bool *); |
be22716f | 590 | static void cse_extended_basic_block (struct cse_basic_block_data *); |
8ec3a57b | 591 | extern void dump_class (struct table_elt*); |
3bd20490 | 592 | static void get_cse_reg_info_1 (unsigned int regno); |
593 | static struct cse_reg_info * get_cse_reg_info (unsigned int regno); | |
8ec3a57b | 594 | |
595 | static void flush_hash_table (void); | |
47f1d198 | 596 | static bool insn_live_p (rtx_insn *, int *); |
597 | static bool set_live_p (rtx, rtx_insn *, int *); | |
47f1d198 | 598 | static void cse_change_cc_mode_insn (rtx_insn *, rtx); |
599 | static void cse_change_cc_mode_insns (rtx_insn *, rtx_insn *, rtx); | |
3754d046 | 600 | static machine_mode cse_cc_succs (basic_block, basic_block, rtx, rtx, |
650d2134 | 601 | bool); |
752df20e | 602 | \f |
d263732c | 603 | |
604 | #undef RTL_HOOKS_GEN_LOWPART | |
605 | #define RTL_HOOKS_GEN_LOWPART gen_lowpart_if_possible | |
606 | ||
607 | static const struct rtl_hooks cse_rtl_hooks = RTL_HOOKS_INITIALIZER; | |
608 | \f | |
ea1760a3 | 609 | /* Nonzero if X has the form (PLUS frame-pointer integer). */ |
805e22b2 | 610 | |
611 | static bool | |
8ec3a57b | 612 | fixed_base_plus_p (rtx x) |
805e22b2 | 613 | { |
614 | switch (GET_CODE (x)) | |
615 | { | |
616 | case REG: | |
617 | if (x == frame_pointer_rtx || x == hard_frame_pointer_rtx) | |
618 | return true; | |
619 | if (x == arg_pointer_rtx && fixed_regs[ARG_POINTER_REGNUM]) | |
620 | return true; | |
805e22b2 | 621 | return false; |
622 | ||
623 | case PLUS: | |
971ba038 | 624 | if (!CONST_INT_P (XEXP (x, 1))) |
805e22b2 | 625 | return false; |
626 | return fixed_base_plus_p (XEXP (x, 0)); | |
627 | ||
805e22b2 | 628 | default: |
629 | return false; | |
630 | } | |
631 | } | |
632 | ||
59241190 | 633 | /* Dump the expressions in the equivalence class indicated by CLASSP. |
634 | This function is used only for debugging. */ | |
d2bb3f9d | 635 | DEBUG_FUNCTION void |
8ec3a57b | 636 | dump_class (struct table_elt *classp) |
59241190 | 637 | { |
638 | struct table_elt *elt; | |
639 | ||
640 | fprintf (stderr, "Equivalence chain for "); | |
641 | print_rtl (stderr, classp->exp); | |
642 | fprintf (stderr, ": \n"); | |
cb10db9d | 643 | |
59241190 | 644 | for (elt = classp->first_same_value; elt; elt = elt->next_same_value) |
645 | { | |
646 | print_rtl (stderr, elt->exp); | |
647 | fprintf (stderr, "\n"); | |
648 | } | |
649 | } | |
650 | ||
ff17e9ce | 651 | /* Return an estimate of the cost of the registers used in an rtx. |
652 | This is mostly the number of different REG expressions in the rtx; | |
653 | however for some exceptions like fixed registers we use a cost of | |
654 | 0. If any other hard register reference occurs, return MAX_COST. */ | |
37b8a8d6 | 655 | |
d27eb4b1 | 656 | static int |
ff17e9ce | 657 | approx_reg_cost (const_rtx x) |
d27eb4b1 | 658 | { |
ff17e9ce | 659 | int cost = 0; |
660 | subrtx_iterator::array_type array; | |
661 | FOR_EACH_SUBRTX (iter, array, x, NONCONST) | |
88bc3f54 | 662 | { |
ff17e9ce | 663 | const_rtx x = *iter; |
664 | if (REG_P (x)) | |
88bc3f54 | 665 | { |
ff17e9ce | 666 | unsigned int regno = REGNO (x); |
667 | if (!CHEAP_REGNO (regno)) | |
88bc3f54 | 668 | { |
ff17e9ce | 669 | if (regno < FIRST_PSEUDO_REGISTER) |
670 | { | |
671 | if (targetm.small_register_classes_for_mode_p (GET_MODE (x))) | |
672 | return MAX_COST; | |
673 | cost += 2; | |
674 | } | |
675 | else | |
676 | cost += 1; | |
88bc3f54 | 677 | } |
88bc3f54 | 678 | } |
679 | } | |
88bc3f54 | 680 | return cost; |
d27eb4b1 | 681 | } |
682 | ||
683 | /* Return a negative value if an rtx A, whose costs are given by COST_A | |
684 | and REGCOST_A, is more desirable than an rtx B. | |
685 | Return a positive value if A is less desirable, or 0 if the two are | |
686 | equally good. */ | |
687 | static int | |
069eea26 | 688 | preferable (int cost_a, int regcost_a, int cost_b, int regcost_b) |
d27eb4b1 | 689 | { |
e61c498c | 690 | /* First, get rid of cases involving expressions that are entirely |
589ff9e7 | 691 | unwanted. */ |
692 | if (cost_a != cost_b) | |
693 | { | |
694 | if (cost_a == MAX_COST) | |
695 | return 1; | |
696 | if (cost_b == MAX_COST) | |
697 | return -1; | |
698 | } | |
699 | ||
700 | /* Avoid extending lifetimes of hardregs. */ | |
701 | if (regcost_a != regcost_b) | |
702 | { | |
703 | if (regcost_a == MAX_COST) | |
704 | return 1; | |
705 | if (regcost_b == MAX_COST) | |
706 | return -1; | |
707 | } | |
708 | ||
709 | /* Normal operation costs take precedence. */ | |
d27eb4b1 | 710 | if (cost_a != cost_b) |
711 | return cost_a - cost_b; | |
589ff9e7 | 712 | /* Only if these are identical consider effects on register pressure. */ |
d27eb4b1 | 713 | if (regcost_a != regcost_b) |
714 | return regcost_a - regcost_b; | |
715 | return 0; | |
716 | } | |
717 | ||
de164820 | 718 | /* Internal function, to compute cost when X is not a register; called |
719 | from COST macro to keep it simple. */ | |
720 | ||
721 | static int | |
5ae4887d | 722 | notreg_cost (rtx x, machine_mode mode, enum rtx_code outer, int opno) |
de164820 | 723 | { |
8b449599 | 724 | scalar_int_mode int_mode, inner_mode; |
de164820 | 725 | return ((GET_CODE (x) == SUBREG |
8ad4c111 | 726 | && REG_P (SUBREG_REG (x)) |
8b449599 | 727 | && is_int_mode (mode, &int_mode) |
728 | && is_int_mode (GET_MODE (SUBREG_REG (x)), &inner_mode) | |
729 | && GET_MODE_SIZE (int_mode) < GET_MODE_SIZE (inner_mode) | |
de164820 | 730 | && subreg_lowpart_p (x) |
8b449599 | 731 | && TRULY_NOOP_TRUNCATION_MODES_P (int_mode, inner_mode)) |
d27eb4b1 | 732 | ? 0 |
5ae4887d | 733 | : rtx_cost (x, mode, outer, opno, optimize_this_for_speed_p) * 2); |
de164820 | 734 | } |
735 | ||
cf495191 | 736 | \f |
3bd20490 | 737 | /* Initialize CSE_REG_INFO_TABLE. */ |
9c4f3716 | 738 | |
3bd20490 | 739 | static void |
740 | init_cse_reg_info (unsigned int nregs) | |
741 | { | |
742 | /* Do we need to grow the table? */ | |
743 | if (nregs > cse_reg_info_table_size) | |
d1264606 | 744 | { |
3bd20490 | 745 | unsigned int new_size; |
746 | ||
747 | if (cse_reg_info_table_size < 2048) | |
d1264606 | 748 | { |
3bd20490 | 749 | /* Compute a new size that is a power of 2 and no smaller |
750 | than the large of NREGS and 64. */ | |
751 | new_size = (cse_reg_info_table_size | |
752 | ? cse_reg_info_table_size : 64); | |
753 | ||
754 | while (new_size < nregs) | |
755 | new_size *= 2; | |
d1264606 | 756 | } |
757 | else | |
926f1f1f | 758 | { |
3bd20490 | 759 | /* If we need a big table, allocate just enough to hold |
760 | NREGS registers. */ | |
761 | new_size = nregs; | |
926f1f1f | 762 | } |
9c4f3716 | 763 | |
3bd20490 | 764 | /* Reallocate the table with NEW_SIZE entries. */ |
dd045aee | 765 | free (cse_reg_info_table); |
4c36ffe6 | 766 | cse_reg_info_table = XNEWVEC (struct cse_reg_info, new_size); |
3bd20490 | 767 | cse_reg_info_table_size = new_size; |
bee2651c | 768 | cse_reg_info_table_first_uninitialized = 0; |
3bd20490 | 769 | } |
770 | ||
771 | /* Do we have all of the first NREGS entries initialized? */ | |
772 | if (cse_reg_info_table_first_uninitialized < nregs) | |
773 | { | |
774 | unsigned int old_timestamp = cse_reg_info_timestamp - 1; | |
775 | unsigned int i; | |
776 | ||
777 | /* Put the old timestamp on newly allocated entries so that they | |
778 | will all be considered out of date. We do not touch those | |
779 | entries beyond the first NREGS entries to be nice to the | |
780 | virtual memory. */ | |
781 | for (i = cse_reg_info_table_first_uninitialized; i < nregs; i++) | |
782 | cse_reg_info_table[i].timestamp = old_timestamp; | |
d1264606 | 783 | |
3bd20490 | 784 | cse_reg_info_table_first_uninitialized = nregs; |
d1264606 | 785 | } |
3bd20490 | 786 | } |
787 | ||
b5ee2efd | 788 | /* Given REGNO, initialize the cse_reg_info entry for REGNO. */ |
3bd20490 | 789 | |
790 | static void | |
791 | get_cse_reg_info_1 (unsigned int regno) | |
792 | { | |
793 | /* Set TIMESTAMP field to CSE_REG_INFO_TIMESTAMP so that this | |
794 | entry will be considered to have been initialized. */ | |
795 | cse_reg_info_table[regno].timestamp = cse_reg_info_timestamp; | |
796 | ||
797 | /* Initialize the rest of the entry. */ | |
798 | cse_reg_info_table[regno].reg_tick = 1; | |
799 | cse_reg_info_table[regno].reg_in_table = -1; | |
800 | cse_reg_info_table[regno].subreg_ticked = -1; | |
801 | cse_reg_info_table[regno].reg_qty = -regno - 1; | |
802 | } | |
803 | ||
804 | /* Find a cse_reg_info entry for REGNO. */ | |
d1264606 | 805 | |
3bd20490 | 806 | static inline struct cse_reg_info * |
807 | get_cse_reg_info (unsigned int regno) | |
808 | { | |
809 | struct cse_reg_info *p = &cse_reg_info_table[regno]; | |
810 | ||
e02a4f0d | 811 | /* If this entry has not been initialized, go ahead and initialize |
812 | it. */ | |
3bd20490 | 813 | if (p->timestamp != cse_reg_info_timestamp) |
814 | get_cse_reg_info_1 (regno); | |
d1264606 | 815 | |
9c4f3716 | 816 | return p; |
d1264606 | 817 | } |
818 | ||
752df20e | 819 | /* Clear the hash table and initialize each register with its own quantity, |
820 | for a new basic block. */ | |
821 | ||
822 | static void | |
8ec3a57b | 823 | new_basic_block (void) |
752df20e | 824 | { |
19cb6b50 | 825 | int i; |
752df20e | 826 | |
1a5bccce | 827 | next_qty = 0; |
752df20e | 828 | |
b5ee2efd | 829 | /* Invalidate cse_reg_info_table. */ |
3bd20490 | 830 | cse_reg_info_timestamp++; |
752df20e | 831 | |
3bd20490 | 832 | /* Clear out hash table state for this pass. */ |
752df20e | 833 | CLEAR_HARD_REG_SET (hard_regs_in_table); |
834 | ||
835 | /* The per-quantity values used to be initialized here, but it is | |
836 | much faster to initialize each as it is made in `make_new_qty'. */ | |
837 | ||
9c4f3716 | 838 | for (i = 0; i < HASH_SIZE; i++) |
752df20e | 839 | { |
9c4f3716 | 840 | struct table_elt *first; |
841 | ||
842 | first = table[i]; | |
843 | if (first != NULL) | |
752df20e | 844 | { |
9c4f3716 | 845 | struct table_elt *last = first; |
846 | ||
847 | table[i] = NULL; | |
848 | ||
849 | while (last->next_same_hash != NULL) | |
850 | last = last->next_same_hash; | |
851 | ||
852 | /* Now relink this hash entire chain into | |
853 | the free element list. */ | |
854 | ||
855 | last->next_same_hash = free_element_chain; | |
856 | free_element_chain = first; | |
752df20e | 857 | } |
858 | } | |
859 | ||
752df20e | 860 | prev_insn_cc0 = 0; |
752df20e | 861 | } |
862 | ||
a7f3b1c7 | 863 | /* Say that register REG contains a quantity in mode MODE not in any |
864 | register before and initialize that quantity. */ | |
752df20e | 865 | |
866 | static void | |
3754d046 | 867 | make_new_qty (unsigned int reg, machine_mode mode) |
752df20e | 868 | { |
19cb6b50 | 869 | int q; |
870 | struct qty_table_elem *ent; | |
871 | struct reg_eqv_elem *eqv; | |
752df20e | 872 | |
cc636d56 | 873 | gcc_assert (next_qty < max_qty); |
752df20e | 874 | |
d1264606 | 875 | q = REG_QTY (reg) = next_qty++; |
a7f3b1c7 | 876 | ent = &qty_table[q]; |
877 | ent->first_reg = reg; | |
878 | ent->last_reg = reg; | |
879 | ent->mode = mode; | |
47f1d198 | 880 | ent->const_rtx = ent->const_insn = NULL; |
a7f3b1c7 | 881 | ent->comparison_code = UNKNOWN; |
882 | ||
883 | eqv = ®_eqv_table[reg]; | |
884 | eqv->next = eqv->prev = -1; | |
752df20e | 885 | } |
886 | ||
887 | /* Make reg NEW equivalent to reg OLD. | |
888 | OLD is not changing; NEW is. */ | |
889 | ||
890 | static void | |
d328ebdf | 891 | make_regs_eqv (unsigned int new_reg, unsigned int old_reg) |
752df20e | 892 | { |
02e7a332 | 893 | unsigned int lastr, firstr; |
d328ebdf | 894 | int q = REG_QTY (old_reg); |
02e7a332 | 895 | struct qty_table_elem *ent; |
a7f3b1c7 | 896 | |
897 | ent = &qty_table[q]; | |
752df20e | 898 | |
899 | /* Nothing should become eqv until it has a "non-invalid" qty number. */ | |
d328ebdf | 900 | gcc_assert (REGNO_QTY_VALID_P (old_reg)); |
752df20e | 901 | |
d328ebdf | 902 | REG_QTY (new_reg) = q; |
a7f3b1c7 | 903 | firstr = ent->first_reg; |
904 | lastr = ent->last_reg; | |
752df20e | 905 | |
906 | /* Prefer fixed hard registers to anything. Prefer pseudo regs to other | |
907 | hard regs. Among pseudos, if NEW will live longer than any other reg | |
908 | of the same qty, and that is beyond the current basic block, | |
909 | make it the new canonical replacement for this qty. */ | |
910 | if (! (firstr < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (firstr)) | |
911 | /* Certain fixed registers might be of the class NO_REGS. This means | |
912 | that not only can they not be allocated by the compiler, but | |
5202ecf2 | 913 | they cannot be used in substitutions or canonicalizations |
752df20e | 914 | either. */ |
d328ebdf | 915 | && (new_reg >= FIRST_PSEUDO_REGISTER || REGNO_REG_CLASS (new_reg) != NO_REGS) |
916 | && ((new_reg < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (new_reg)) | |
917 | || (new_reg >= FIRST_PSEUDO_REGISTER | |
752df20e | 918 | && (firstr < FIRST_PSEUDO_REGISTER |
d328ebdf | 919 | || (bitmap_bit_p (cse_ebb_live_out, new_reg) |
3072d30e | 920 | && !bitmap_bit_p (cse_ebb_live_out, firstr)) |
d328ebdf | 921 | || (bitmap_bit_p (cse_ebb_live_in, new_reg) |
3072d30e | 922 | && !bitmap_bit_p (cse_ebb_live_in, firstr)))))) |
752df20e | 923 | { |
d328ebdf | 924 | reg_eqv_table[firstr].prev = new_reg; |
925 | reg_eqv_table[new_reg].next = firstr; | |
926 | reg_eqv_table[new_reg].prev = -1; | |
927 | ent->first_reg = new_reg; | |
752df20e | 928 | } |
929 | else | |
930 | { | |
931 | /* If NEW is a hard reg (known to be non-fixed), insert at end. | |
932 | Otherwise, insert before any non-fixed hard regs that are at the | |
933 | end. Registers of class NO_REGS cannot be used as an | |
934 | equivalent for anything. */ | |
a7f3b1c7 | 935 | while (lastr < FIRST_PSEUDO_REGISTER && reg_eqv_table[lastr].prev >= 0 |
752df20e | 936 | && (REGNO_REG_CLASS (lastr) == NO_REGS || ! FIXED_REGNO_P (lastr)) |
d328ebdf | 937 | && new_reg >= FIRST_PSEUDO_REGISTER) |
a7f3b1c7 | 938 | lastr = reg_eqv_table[lastr].prev; |
d328ebdf | 939 | reg_eqv_table[new_reg].next = reg_eqv_table[lastr].next; |
a7f3b1c7 | 940 | if (reg_eqv_table[lastr].next >= 0) |
d328ebdf | 941 | reg_eqv_table[reg_eqv_table[lastr].next].prev = new_reg; |
752df20e | 942 | else |
d328ebdf | 943 | qty_table[q].last_reg = new_reg; |
944 | reg_eqv_table[lastr].next = new_reg; | |
945 | reg_eqv_table[new_reg].prev = lastr; | |
752df20e | 946 | } |
947 | } | |
948 | ||
949 | /* Remove REG from its equivalence class. */ | |
950 | ||
951 | static void | |
8ec3a57b | 952 | delete_reg_equiv (unsigned int reg) |
752df20e | 953 | { |
19cb6b50 | 954 | struct qty_table_elem *ent; |
955 | int q = REG_QTY (reg); | |
956 | int p, n; | |
752df20e | 957 | |
7046c09e | 958 | /* If invalid, do nothing. */ |
1a5bccce | 959 | if (! REGNO_QTY_VALID_P (reg)) |
752df20e | 960 | return; |
961 | ||
a7f3b1c7 | 962 | ent = &qty_table[q]; |
963 | ||
964 | p = reg_eqv_table[reg].prev; | |
965 | n = reg_eqv_table[reg].next; | |
7046c09e | 966 | |
752df20e | 967 | if (n != -1) |
a7f3b1c7 | 968 | reg_eqv_table[n].prev = p; |
752df20e | 969 | else |
a7f3b1c7 | 970 | ent->last_reg = p; |
752df20e | 971 | if (p != -1) |
a7f3b1c7 | 972 | reg_eqv_table[p].next = n; |
752df20e | 973 | else |
a7f3b1c7 | 974 | ent->first_reg = n; |
752df20e | 975 | |
1a5bccce | 976 | REG_QTY (reg) = -reg - 1; |
752df20e | 977 | } |
978 | ||
979 | /* Remove any invalid expressions from the hash table | |
980 | that refer to any of the registers contained in expression X. | |
981 | ||
982 | Make sure that newly inserted references to those registers | |
983 | as subexpressions will be considered valid. | |
984 | ||
985 | mention_regs is not called when a register itself | |
986 | is being stored in the table. | |
987 | ||
988 | Return 1 if we have done something that may have changed the hash code | |
989 | of X. */ | |
990 | ||
991 | static int | |
8ec3a57b | 992 | mention_regs (rtx x) |
752df20e | 993 | { |
19cb6b50 | 994 | enum rtx_code code; |
995 | int i, j; | |
996 | const char *fmt; | |
997 | int changed = 0; | |
752df20e | 998 | |
999 | if (x == 0) | |
c39100fe | 1000 | return 0; |
752df20e | 1001 | |
1002 | code = GET_CODE (x); | |
1003 | if (code == REG) | |
1004 | { | |
02e7a332 | 1005 | unsigned int regno = REGNO (x); |
a2c6f0b7 | 1006 | unsigned int endregno = END_REGNO (x); |
02e7a332 | 1007 | unsigned int i; |
752df20e | 1008 | |
1009 | for (i = regno; i < endregno; i++) | |
1010 | { | |
d1264606 | 1011 | if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i)) |
752df20e | 1012 | remove_invalid_refs (i); |
1013 | ||
d1264606 | 1014 | REG_IN_TABLE (i) = REG_TICK (i); |
126fb012 | 1015 | SUBREG_TICKED (i) = -1; |
752df20e | 1016 | } |
1017 | ||
1018 | return 0; | |
1019 | } | |
1020 | ||
e6860d27 | 1021 | /* If this is a SUBREG, we don't want to discard other SUBREGs of the same |
1022 | pseudo if they don't use overlapping words. We handle only pseudos | |
1023 | here for simplicity. */ | |
8ad4c111 | 1024 | if (code == SUBREG && REG_P (SUBREG_REG (x)) |
e6860d27 | 1025 | && REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER) |
1026 | { | |
02e7a332 | 1027 | unsigned int i = REGNO (SUBREG_REG (x)); |
e6860d27 | 1028 | |
d1264606 | 1029 | if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i)) |
e6860d27 | 1030 | { |
126fb012 | 1031 | /* If REG_IN_TABLE (i) differs from REG_TICK (i) by one, and |
1032 | the last store to this register really stored into this | |
1033 | subreg, then remove the memory of this subreg. | |
1034 | Otherwise, remove any memory of the entire register and | |
1035 | all its subregs from the table. */ | |
1036 | if (REG_TICK (i) - REG_IN_TABLE (i) > 1 | |
70e488ba | 1037 | || SUBREG_TICKED (i) != REGNO (SUBREG_REG (x))) |
e6860d27 | 1038 | remove_invalid_refs (i); |
1039 | else | |
701e46d0 | 1040 | remove_invalid_subreg_refs (i, SUBREG_BYTE (x), GET_MODE (x)); |
e6860d27 | 1041 | } |
1042 | ||
d1264606 | 1043 | REG_IN_TABLE (i) = REG_TICK (i); |
70e488ba | 1044 | SUBREG_TICKED (i) = REGNO (SUBREG_REG (x)); |
e6860d27 | 1045 | return 0; |
1046 | } | |
1047 | ||
752df20e | 1048 | /* If X is a comparison or a COMPARE and either operand is a register |
1049 | that does not have a quantity, give it one. This is so that a later | |
1050 | call to record_jump_equiv won't cause X to be assigned a different | |
1051 | hash code and not found in the table after that call. | |
1052 | ||
1053 | It is not necessary to do this here, since rehash_using_reg can | |
1054 | fix up the table later, but doing this here eliminates the need to | |
1055 | call that expensive function in the most common case where the only | |
1056 | use of the register is in the comparison. */ | |
1057 | ||
6720e96c | 1058 | if (code == COMPARE || COMPARISON_P (x)) |
752df20e | 1059 | { |
8ad4c111 | 1060 | if (REG_P (XEXP (x, 0)) |
752df20e | 1061 | && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 0)))) |
4679ade3 | 1062 | if (insert_regs (XEXP (x, 0), NULL, 0)) |
752df20e | 1063 | { |
1064 | rehash_using_reg (XEXP (x, 0)); | |
1065 | changed = 1; | |
1066 | } | |
1067 | ||
8ad4c111 | 1068 | if (REG_P (XEXP (x, 1)) |
752df20e | 1069 | && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 1)))) |
4679ade3 | 1070 | if (insert_regs (XEXP (x, 1), NULL, 0)) |
752df20e | 1071 | { |
1072 | rehash_using_reg (XEXP (x, 1)); | |
1073 | changed = 1; | |
1074 | } | |
1075 | } | |
1076 | ||
1077 | fmt = GET_RTX_FORMAT (code); | |
1078 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
1079 | if (fmt[i] == 'e') | |
1080 | changed |= mention_regs (XEXP (x, i)); | |
1081 | else if (fmt[i] == 'E') | |
1082 | for (j = 0; j < XVECLEN (x, i); j++) | |
1083 | changed |= mention_regs (XVECEXP (x, i, j)); | |
1084 | ||
1085 | return changed; | |
1086 | } | |
1087 | ||
1088 | /* Update the register quantities for inserting X into the hash table | |
1089 | with a value equivalent to CLASSP. | |
1090 | (If the class does not contain a REG, it is irrelevant.) | |
1091 | If MODIFIED is nonzero, X is a destination; it is being modified. | |
1092 | Note that delete_reg_equiv should be called on a register | |
1093 | before insert_regs is done on that register with MODIFIED != 0. | |
1094 | ||
1095 | Nonzero value means that elements of reg_qty have changed | |
1096 | so X's hash code may be different. */ | |
1097 | ||
1098 | static int | |
8ec3a57b | 1099 | insert_regs (rtx x, struct table_elt *classp, int modified) |
752df20e | 1100 | { |
8ad4c111 | 1101 | if (REG_P (x)) |
752df20e | 1102 | { |
02e7a332 | 1103 | unsigned int regno = REGNO (x); |
1104 | int qty_valid; | |
752df20e | 1105 | |
0aee3bb1 | 1106 | /* If REGNO is in the equivalence table already but is of the |
1107 | wrong mode for that equivalence, don't do anything here. */ | |
1108 | ||
a7f3b1c7 | 1109 | qty_valid = REGNO_QTY_VALID_P (regno); |
1110 | if (qty_valid) | |
1111 | { | |
1112 | struct qty_table_elem *ent = &qty_table[REG_QTY (regno)]; | |
0aee3bb1 | 1113 | |
a7f3b1c7 | 1114 | if (ent->mode != GET_MODE (x)) |
1115 | return 0; | |
1116 | } | |
1117 | ||
1118 | if (modified || ! qty_valid) | |
752df20e | 1119 | { |
1120 | if (classp) | |
1121 | for (classp = classp->first_same_value; | |
1122 | classp != 0; | |
1123 | classp = classp->next_same_value) | |
8ad4c111 | 1124 | if (REG_P (classp->exp) |
752df20e | 1125 | && GET_MODE (classp->exp) == GET_MODE (x)) |
1126 | { | |
412c63b0 | 1127 | unsigned c_regno = REGNO (classp->exp); |
1128 | ||
1129 | gcc_assert (REGNO_QTY_VALID_P (c_regno)); | |
1130 | ||
1131 | /* Suppose that 5 is hard reg and 100 and 101 are | |
1132 | pseudos. Consider | |
1133 | ||
1134 | (set (reg:si 100) (reg:si 5)) | |
1135 | (set (reg:si 5) (reg:si 100)) | |
1136 | (set (reg:di 101) (reg:di 5)) | |
1137 | ||
1138 | We would now set REG_QTY (101) = REG_QTY (5), but the | |
1139 | entry for 5 is in SImode. When we use this later in | |
1140 | copy propagation, we get the register in wrong mode. */ | |
1141 | if (qty_table[REG_QTY (c_regno)].mode != GET_MODE (x)) | |
1142 | continue; | |
1143 | ||
1144 | make_regs_eqv (regno, c_regno); | |
752df20e | 1145 | return 1; |
1146 | } | |
1147 | ||
6c1128fe | 1148 | /* Mention_regs for a SUBREG checks if REG_TICK is exactly one larger |
1149 | than REG_IN_TABLE to find out if there was only a single preceding | |
1150 | invalidation - for the SUBREG - or another one, which would be | |
1151 | for the full register. However, if we find here that REG_TICK | |
1152 | indicates that the register is invalid, it means that it has | |
1153 | been invalidated in a separate operation. The SUBREG might be used | |
1154 | now (then this is a recursive call), or we might use the full REG | |
1155 | now and a SUBREG of it later. So bump up REG_TICK so that | |
1156 | mention_regs will do the right thing. */ | |
1157 | if (! modified | |
1158 | && REG_IN_TABLE (regno) >= 0 | |
1159 | && REG_TICK (regno) == REG_IN_TABLE (regno) + 1) | |
1160 | REG_TICK (regno)++; | |
a7f3b1c7 | 1161 | make_new_qty (regno, GET_MODE (x)); |
752df20e | 1162 | return 1; |
1163 | } | |
89bbb48f | 1164 | |
1165 | return 0; | |
752df20e | 1166 | } |
50cf1c21 | 1167 | |
1168 | /* If X is a SUBREG, we will likely be inserting the inner register in the | |
1169 | table. If that register doesn't have an assigned quantity number at | |
1170 | this point but does later, the insertion that we will be doing now will | |
1171 | not be accessible because its hash code will have changed. So assign | |
1172 | a quantity number now. */ | |
1173 | ||
8ad4c111 | 1174 | else if (GET_CODE (x) == SUBREG && REG_P (SUBREG_REG (x)) |
50cf1c21 | 1175 | && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x)))) |
1176 | { | |
4679ade3 | 1177 | insert_regs (SUBREG_REG (x), NULL, 0); |
e6860d27 | 1178 | mention_regs (x); |
50cf1c21 | 1179 | return 1; |
1180 | } | |
752df20e | 1181 | else |
1182 | return mention_regs (x); | |
1183 | } | |
1184 | \f | |
01c8e4c9 | 1185 | |
1186 | /* Compute upper and lower anchors for CST. Also compute the offset of CST | |
1187 | from these anchors/bases such that *_BASE + *_OFFS = CST. Return false iff | |
1188 | CST is equal to an anchor. */ | |
1189 | ||
1190 | static bool | |
1191 | compute_const_anchors (rtx cst, | |
1192 | HOST_WIDE_INT *lower_base, HOST_WIDE_INT *lower_offs, | |
1193 | HOST_WIDE_INT *upper_base, HOST_WIDE_INT *upper_offs) | |
1194 | { | |
1195 | HOST_WIDE_INT n = INTVAL (cst); | |
1196 | ||
1197 | *lower_base = n & ~(targetm.const_anchor - 1); | |
1198 | if (*lower_base == n) | |
1199 | return false; | |
1200 | ||
1201 | *upper_base = | |
1202 | (n + (targetm.const_anchor - 1)) & ~(targetm.const_anchor - 1); | |
1203 | *upper_offs = n - *upper_base; | |
1204 | *lower_offs = n - *lower_base; | |
1205 | return true; | |
1206 | } | |
1207 | ||
1208 | /* Insert the equivalence between ANCHOR and (REG + OFF) in mode MODE. */ | |
1209 | ||
1210 | static void | |
1211 | insert_const_anchor (HOST_WIDE_INT anchor, rtx reg, HOST_WIDE_INT offs, | |
3754d046 | 1212 | machine_mode mode) |
01c8e4c9 | 1213 | { |
1214 | struct table_elt *elt; | |
1215 | unsigned hash; | |
1216 | rtx anchor_exp; | |
1217 | rtx exp; | |
1218 | ||
1219 | anchor_exp = GEN_INT (anchor); | |
1220 | hash = HASH (anchor_exp, mode); | |
1221 | elt = lookup (anchor_exp, hash, mode); | |
1222 | if (!elt) | |
1223 | elt = insert (anchor_exp, NULL, hash, mode); | |
1224 | ||
29c05e22 | 1225 | exp = plus_constant (mode, reg, offs); |
01c8e4c9 | 1226 | /* REG has just been inserted and the hash codes recomputed. */ |
1227 | mention_regs (exp); | |
1228 | hash = HASH (exp, mode); | |
1229 | ||
1230 | /* Use the cost of the register rather than the whole expression. When | |
1231 | looking up constant anchors we will further offset the corresponding | |
1232 | expression therefore it does not make sense to prefer REGs over | |
1233 | reg-immediate additions. Prefer instead the oldest expression. Also | |
1234 | don't prefer pseudos over hard regs so that we derive constants in | |
1235 | argument registers from other argument registers rather than from the | |
1236 | original pseudo that was used to synthesize the constant. */ | |
5ae4887d | 1237 | insert_with_costs (exp, elt, hash, mode, COST (reg, mode), 1); |
01c8e4c9 | 1238 | } |
1239 | ||
1240 | /* The constant CST is equivalent to the register REG. Create | |
1241 | equivalences between the two anchors of CST and the corresponding | |
1242 | register-offset expressions using REG. */ | |
1243 | ||
1244 | static void | |
3754d046 | 1245 | insert_const_anchors (rtx reg, rtx cst, machine_mode mode) |
01c8e4c9 | 1246 | { |
1247 | HOST_WIDE_INT lower_base, lower_offs, upper_base, upper_offs; | |
1248 | ||
1249 | if (!compute_const_anchors (cst, &lower_base, &lower_offs, | |
1250 | &upper_base, &upper_offs)) | |
1251 | return; | |
1252 | ||
1253 | /* Ignore anchors of value 0. Constants accessible from zero are | |
1254 | simple. */ | |
1255 | if (lower_base != 0) | |
1256 | insert_const_anchor (lower_base, reg, -lower_offs, mode); | |
1257 | ||
1258 | if (upper_base != 0) | |
1259 | insert_const_anchor (upper_base, reg, -upper_offs, mode); | |
1260 | } | |
1261 | ||
1262 | /* We need to express ANCHOR_ELT->exp + OFFS. Walk the equivalence list of | |
1263 | ANCHOR_ELT and see if offsetting any of the entries by OFFS would create a | |
1264 | valid expression. Return the cheapest and oldest of such expressions. In | |
1265 | *OLD, return how old the resulting expression is compared to the other | |
1266 | equivalent expressions. */ | |
1267 | ||
1268 | static rtx | |
1269 | find_reg_offset_for_const (struct table_elt *anchor_elt, HOST_WIDE_INT offs, | |
1270 | unsigned *old) | |
1271 | { | |
1272 | struct table_elt *elt; | |
1273 | unsigned idx; | |
1274 | struct table_elt *match_elt; | |
1275 | rtx match; | |
1276 | ||
1277 | /* Find the cheapest and *oldest* expression to maximize the chance of | |
1278 | reusing the same pseudo. */ | |
1279 | ||
1280 | match_elt = NULL; | |
1281 | match = NULL_RTX; | |
1282 | for (elt = anchor_elt->first_same_value, idx = 0; | |
1283 | elt; | |
1284 | elt = elt->next_same_value, idx++) | |
1285 | { | |
1286 | if (match_elt && CHEAPER (match_elt, elt)) | |
1287 | return match; | |
1288 | ||
1289 | if (REG_P (elt->exp) | |
1290 | || (GET_CODE (elt->exp) == PLUS | |
1291 | && REG_P (XEXP (elt->exp, 0)) | |
1292 | && GET_CODE (XEXP (elt->exp, 1)) == CONST_INT)) | |
1293 | { | |
1294 | rtx x; | |
1295 | ||
1296 | /* Ignore expressions that are no longer valid. */ | |
1297 | if (!REG_P (elt->exp) && !exp_equiv_p (elt->exp, elt->exp, 1, false)) | |
1298 | continue; | |
1299 | ||
29c05e22 | 1300 | x = plus_constant (GET_MODE (elt->exp), elt->exp, offs); |
01c8e4c9 | 1301 | if (REG_P (x) |
1302 | || (GET_CODE (x) == PLUS | |
1303 | && IN_RANGE (INTVAL (XEXP (x, 1)), | |
1304 | -targetm.const_anchor, | |
1305 | targetm.const_anchor - 1))) | |
1306 | { | |
1307 | match = x; | |
1308 | match_elt = elt; | |
1309 | *old = idx; | |
1310 | } | |
1311 | } | |
1312 | } | |
1313 | ||
1314 | return match; | |
1315 | } | |
1316 | ||
1317 | /* Try to express the constant SRC_CONST using a register+offset expression | |
1318 | derived from a constant anchor. Return it if successful or NULL_RTX, | |
1319 | otherwise. */ | |
1320 | ||
1321 | static rtx | |
3754d046 | 1322 | try_const_anchors (rtx src_const, machine_mode mode) |
01c8e4c9 | 1323 | { |
1324 | struct table_elt *lower_elt, *upper_elt; | |
1325 | HOST_WIDE_INT lower_base, lower_offs, upper_base, upper_offs; | |
1326 | rtx lower_anchor_rtx, upper_anchor_rtx; | |
1327 | rtx lower_exp = NULL_RTX, upper_exp = NULL_RTX; | |
1328 | unsigned lower_old, upper_old; | |
1329 | ||
211e63b0 | 1330 | /* CONST_INT is used for CC modes, but we should leave those alone. */ |
1331 | if (GET_MODE_CLASS (mode) == MODE_CC) | |
1332 | return NULL_RTX; | |
1333 | ||
1334 | gcc_assert (SCALAR_INT_MODE_P (mode)); | |
01c8e4c9 | 1335 | if (!compute_const_anchors (src_const, &lower_base, &lower_offs, |
1336 | &upper_base, &upper_offs)) | |
1337 | return NULL_RTX; | |
1338 | ||
1339 | lower_anchor_rtx = GEN_INT (lower_base); | |
1340 | upper_anchor_rtx = GEN_INT (upper_base); | |
1341 | lower_elt = lookup (lower_anchor_rtx, HASH (lower_anchor_rtx, mode), mode); | |
1342 | upper_elt = lookup (upper_anchor_rtx, HASH (upper_anchor_rtx, mode), mode); | |
1343 | ||
1344 | if (lower_elt) | |
1345 | lower_exp = find_reg_offset_for_const (lower_elt, lower_offs, &lower_old); | |
1346 | if (upper_elt) | |
1347 | upper_exp = find_reg_offset_for_const (upper_elt, upper_offs, &upper_old); | |
1348 | ||
1349 | if (!lower_exp) | |
1350 | return upper_exp; | |
1351 | if (!upper_exp) | |
1352 | return lower_exp; | |
1353 | ||
1354 | /* Return the older expression. */ | |
1355 | return (upper_old > lower_old ? upper_exp : lower_exp); | |
1356 | } | |
1357 | \f | |
752df20e | 1358 | /* Look in or update the hash table. */ |
1359 | ||
752df20e | 1360 | /* Remove table element ELT from use in the table. |
1361 | HASH is its hash code, made using the HASH macro. | |
1362 | It's an argument because often that is known in advance | |
1363 | and we save much time not recomputing it. */ | |
1364 | ||
1365 | static void | |
8ec3a57b | 1366 | remove_from_table (struct table_elt *elt, unsigned int hash) |
752df20e | 1367 | { |
1368 | if (elt == 0) | |
1369 | return; | |
1370 | ||
1371 | /* Mark this element as removed. See cse_insn. */ | |
1372 | elt->first_same_value = 0; | |
1373 | ||
1374 | /* Remove the table element from its equivalence class. */ | |
cb10db9d | 1375 | |
752df20e | 1376 | { |
19cb6b50 | 1377 | struct table_elt *prev = elt->prev_same_value; |
1378 | struct table_elt *next = elt->next_same_value; | |
752df20e | 1379 | |
cb10db9d | 1380 | if (next) |
1381 | next->prev_same_value = prev; | |
752df20e | 1382 | |
1383 | if (prev) | |
1384 | prev->next_same_value = next; | |
1385 | else | |
1386 | { | |
19cb6b50 | 1387 | struct table_elt *newfirst = next; |
752df20e | 1388 | while (next) |
1389 | { | |
1390 | next->first_same_value = newfirst; | |
1391 | next = next->next_same_value; | |
1392 | } | |
1393 | } | |
1394 | } | |
1395 | ||
1396 | /* Remove the table element from its hash bucket. */ | |
1397 | ||
1398 | { | |
19cb6b50 | 1399 | struct table_elt *prev = elt->prev_same_hash; |
1400 | struct table_elt *next = elt->next_same_hash; | |
752df20e | 1401 | |
cb10db9d | 1402 | if (next) |
1403 | next->prev_same_hash = prev; | |
752df20e | 1404 | |
1405 | if (prev) | |
1406 | prev->next_same_hash = next; | |
1407 | else if (table[hash] == elt) | |
1408 | table[hash] = next; | |
1409 | else | |
1410 | { | |
1411 | /* This entry is not in the proper hash bucket. This can happen | |
1412 | when two classes were merged by `merge_equiv_classes'. Search | |
1413 | for the hash bucket that it heads. This happens only very | |
1414 | rarely, so the cost is acceptable. */ | |
9c4f3716 | 1415 | for (hash = 0; hash < HASH_SIZE; hash++) |
752df20e | 1416 | if (table[hash] == elt) |
1417 | table[hash] = next; | |
1418 | } | |
1419 | } | |
1420 | ||
1421 | /* Remove the table element from its related-value circular chain. */ | |
1422 | ||
1423 | if (elt->related_value != 0 && elt->related_value != elt) | |
1424 | { | |
19cb6b50 | 1425 | struct table_elt *p = elt->related_value; |
02e7a332 | 1426 | |
752df20e | 1427 | while (p->related_value != elt) |
1428 | p = p->related_value; | |
1429 | p->related_value = elt->related_value; | |
1430 | if (p->related_value == p) | |
1431 | p->related_value = 0; | |
1432 | } | |
1433 | ||
9c4f3716 | 1434 | /* Now add it to the free element chain. */ |
1435 | elt->next_same_hash = free_element_chain; | |
1436 | free_element_chain = elt; | |
752df20e | 1437 | } |
1438 | ||
d2c970fe | 1439 | /* Same as above, but X is a pseudo-register. */ |
1440 | ||
1441 | static void | |
1442 | remove_pseudo_from_table (rtx x, unsigned int hash) | |
1443 | { | |
1444 | struct table_elt *elt; | |
1445 | ||
1446 | /* Because a pseudo-register can be referenced in more than one | |
1447 | mode, we might have to remove more than one table entry. */ | |
1448 | while ((elt = lookup_for_remove (x, hash, VOIDmode))) | |
1449 | remove_from_table (elt, hash); | |
1450 | } | |
1451 | ||
752df20e | 1452 | /* Look up X in the hash table and return its table element, |
1453 | or 0 if X is not in the table. | |
1454 | ||
1455 | MODE is the machine-mode of X, or if X is an integer constant | |
1456 | with VOIDmode then MODE is the mode with which X will be used. | |
1457 | ||
1458 | Here we are satisfied to find an expression whose tree structure | |
1459 | looks like X. */ | |
1460 | ||
1461 | static struct table_elt * | |
3754d046 | 1462 | lookup (rtx x, unsigned int hash, machine_mode mode) |
752df20e | 1463 | { |
19cb6b50 | 1464 | struct table_elt *p; |
752df20e | 1465 | |
1466 | for (p = table[hash]; p; p = p->next_same_hash) | |
8ad4c111 | 1467 | if (mode == p->mode && ((x == p->exp && REG_P (x)) |
78d140c9 | 1468 | || exp_equiv_p (x, p->exp, !REG_P (x), false))) |
752df20e | 1469 | return p; |
1470 | ||
1471 | return 0; | |
1472 | } | |
1473 | ||
1474 | /* Like `lookup' but don't care whether the table element uses invalid regs. | |
1475 | Also ignore discrepancies in the machine mode of a register. */ | |
1476 | ||
1477 | static struct table_elt * | |
3754d046 | 1478 | lookup_for_remove (rtx x, unsigned int hash, machine_mode mode) |
752df20e | 1479 | { |
19cb6b50 | 1480 | struct table_elt *p; |
752df20e | 1481 | |
8ad4c111 | 1482 | if (REG_P (x)) |
752df20e | 1483 | { |
02e7a332 | 1484 | unsigned int regno = REGNO (x); |
1485 | ||
752df20e | 1486 | /* Don't check the machine mode when comparing registers; |
1487 | invalidating (REG:SI 0) also invalidates (REG:DF 0). */ | |
1488 | for (p = table[hash]; p; p = p->next_same_hash) | |
8ad4c111 | 1489 | if (REG_P (p->exp) |
752df20e | 1490 | && REGNO (p->exp) == regno) |
1491 | return p; | |
1492 | } | |
1493 | else | |
1494 | { | |
1495 | for (p = table[hash]; p; p = p->next_same_hash) | |
78d140c9 | 1496 | if (mode == p->mode |
1497 | && (x == p->exp || exp_equiv_p (x, p->exp, 0, false))) | |
752df20e | 1498 | return p; |
1499 | } | |
1500 | ||
1501 | return 0; | |
1502 | } | |
1503 | ||
1504 | /* Look for an expression equivalent to X and with code CODE. | |
1505 | If one is found, return that expression. */ | |
1506 | ||
1507 | static rtx | |
8ec3a57b | 1508 | lookup_as_function (rtx x, enum rtx_code code) |
752df20e | 1509 | { |
19cb6b50 | 1510 | struct table_elt *p |
78d140c9 | 1511 | = lookup (x, SAFE_HASH (x, VOIDmode), GET_MODE (x)); |
02e7a332 | 1512 | |
752df20e | 1513 | if (p == 0) |
1514 | return 0; | |
1515 | ||
1516 | for (p = p->first_same_value; p; p = p->next_same_value) | |
02e7a332 | 1517 | if (GET_CODE (p->exp) == code |
1518 | /* Make sure this is a valid entry in the table. */ | |
78d140c9 | 1519 | && exp_equiv_p (p->exp, p->exp, 1, false)) |
02e7a332 | 1520 | return p->exp; |
cb10db9d | 1521 | |
752df20e | 1522 | return 0; |
1523 | } | |
1524 | ||
01c8e4c9 | 1525 | /* Insert X in the hash table, assuming HASH is its hash code and |
1526 | CLASSP is an element of the class it should go in (or 0 if a new | |
1527 | class should be made). COST is the code of X and reg_cost is the | |
1528 | cost of registers in X. It is inserted at the proper position to | |
1529 | keep the class in the order cheapest first. | |
752df20e | 1530 | |
1531 | MODE is the machine-mode of X, or if X is an integer constant | |
1532 | with VOIDmode then MODE is the mode with which X will be used. | |
1533 | ||
1534 | For elements of equal cheapness, the most recent one | |
1535 | goes in front, except that the first element in the list | |
1536 | remains first unless a cheaper element is added. The order of | |
1537 | pseudo-registers does not matter, as canon_reg will be called to | |
5202ecf2 | 1538 | find the cheapest when a register is retrieved from the table. |
752df20e | 1539 | |
1540 | The in_memory field in the hash table element is set to 0. | |
1541 | The caller must set it nonzero if appropriate. | |
1542 | ||
1543 | You should call insert_regs (X, CLASSP, MODIFY) before calling here, | |
1544 | and if insert_regs returns a nonzero value | |
1545 | you must then recompute its hash code before calling here. | |
1546 | ||
1547 | If necessary, update table showing constant values of quantities. */ | |
1548 | ||
752df20e | 1549 | static struct table_elt * |
01c8e4c9 | 1550 | insert_with_costs (rtx x, struct table_elt *classp, unsigned int hash, |
3754d046 | 1551 | machine_mode mode, int cost, int reg_cost) |
752df20e | 1552 | { |
19cb6b50 | 1553 | struct table_elt *elt; |
752df20e | 1554 | |
1555 | /* If X is a register and we haven't made a quantity for it, | |
1556 | something is wrong. */ | |
cc636d56 | 1557 | gcc_assert (!REG_P (x) || REGNO_QTY_VALID_P (REGNO (x))); |
752df20e | 1558 | |
1559 | /* If X is a hard register, show it is being put in the table. */ | |
8ad4c111 | 1560 | if (REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER) |
a2c6f0b7 | 1561 | add_to_hard_reg_set (&hard_regs_in_table, GET_MODE (x), REGNO (x)); |
752df20e | 1562 | |
752df20e | 1563 | /* Put an element for X into the right hash bucket. */ |
1564 | ||
9c4f3716 | 1565 | elt = free_element_chain; |
1566 | if (elt) | |
02e7a332 | 1567 | free_element_chain = elt->next_same_hash; |
9c4f3716 | 1568 | else |
4c36ffe6 | 1569 | elt = XNEW (struct table_elt); |
9c4f3716 | 1570 | |
752df20e | 1571 | elt->exp = x; |
7cfb9bcf | 1572 | elt->canon_exp = NULL_RTX; |
01c8e4c9 | 1573 | elt->cost = cost; |
1574 | elt->regcost = reg_cost; | |
752df20e | 1575 | elt->next_same_value = 0; |
1576 | elt->prev_same_value = 0; | |
1577 | elt->next_same_hash = table[hash]; | |
1578 | elt->prev_same_hash = 0; | |
1579 | elt->related_value = 0; | |
1580 | elt->in_memory = 0; | |
1581 | elt->mode = mode; | |
b04fab2a | 1582 | elt->is_const = (CONSTANT_P (x) || fixed_base_plus_p (x)); |
752df20e | 1583 | |
1584 | if (table[hash]) | |
1585 | table[hash]->prev_same_hash = elt; | |
1586 | table[hash] = elt; | |
1587 | ||
1588 | /* Put it into the proper value-class. */ | |
1589 | if (classp) | |
1590 | { | |
1591 | classp = classp->first_same_value; | |
1592 | if (CHEAPER (elt, classp)) | |
2358393e | 1593 | /* Insert at the head of the class. */ |
752df20e | 1594 | { |
19cb6b50 | 1595 | struct table_elt *p; |
752df20e | 1596 | elt->next_same_value = classp; |
1597 | classp->prev_same_value = elt; | |
1598 | elt->first_same_value = elt; | |
1599 | ||
1600 | for (p = classp; p; p = p->next_same_value) | |
1601 | p->first_same_value = elt; | |
1602 | } | |
1603 | else | |
1604 | { | |
1605 | /* Insert not at head of the class. */ | |
1606 | /* Put it after the last element cheaper than X. */ | |
19cb6b50 | 1607 | struct table_elt *p, *next; |
02e7a332 | 1608 | |
3c802a1e | 1609 | for (p = classp; |
1610 | (next = p->next_same_value) && CHEAPER (next, elt); | |
1611 | p = next) | |
1612 | ; | |
02e7a332 | 1613 | |
752df20e | 1614 | /* Put it after P and before NEXT. */ |
1615 | elt->next_same_value = next; | |
1616 | if (next) | |
1617 | next->prev_same_value = elt; | |
02e7a332 | 1618 | |
752df20e | 1619 | elt->prev_same_value = p; |
1620 | p->next_same_value = elt; | |
1621 | elt->first_same_value = classp; | |
1622 | } | |
1623 | } | |
1624 | else | |
1625 | elt->first_same_value = elt; | |
1626 | ||
1627 | /* If this is a constant being set equivalent to a register or a register | |
1628 | being set equivalent to a constant, note the constant equivalence. | |
1629 | ||
1630 | If this is a constant, it cannot be equivalent to a different constant, | |
1631 | and a constant is the only thing that can be cheaper than a register. So | |
1632 | we know the register is the head of the class (before the constant was | |
1633 | inserted). | |
1634 | ||
1635 | If this is a register that is not already known equivalent to a | |
1636 | constant, we must check the entire class. | |
1637 | ||
1638 | If this is a register that is already known equivalent to an insn, | |
a7f3b1c7 | 1639 | update the qtys `const_insn' to show that `this_insn' is the latest |
752df20e | 1640 | insn making that quantity equivalent to the constant. */ |
1641 | ||
8ad4c111 | 1642 | if (elt->is_const && classp && REG_P (classp->exp) |
1643 | && !REG_P (x)) | |
752df20e | 1644 | { |
a7f3b1c7 | 1645 | int exp_q = REG_QTY (REGNO (classp->exp)); |
1646 | struct qty_table_elem *exp_ent = &qty_table[exp_q]; | |
1647 | ||
316f48ea | 1648 | exp_ent->const_rtx = gen_lowpart (exp_ent->mode, x); |
a7f3b1c7 | 1649 | exp_ent->const_insn = this_insn; |
752df20e | 1650 | } |
1651 | ||
8ad4c111 | 1652 | else if (REG_P (x) |
a7f3b1c7 | 1653 | && classp |
1654 | && ! qty_table[REG_QTY (REGNO (x))].const_rtx | |
67123c3e | 1655 | && ! elt->is_const) |
752df20e | 1656 | { |
19cb6b50 | 1657 | struct table_elt *p; |
752df20e | 1658 | |
1659 | for (p = classp; p != 0; p = p->next_same_value) | |
1660 | { | |
8ad4c111 | 1661 | if (p->is_const && !REG_P (p->exp)) |
752df20e | 1662 | { |
a7f3b1c7 | 1663 | int x_q = REG_QTY (REGNO (x)); |
1664 | struct qty_table_elem *x_ent = &qty_table[x_q]; | |
1665 | ||
02e7a332 | 1666 | x_ent->const_rtx |
316f48ea | 1667 | = gen_lowpart (GET_MODE (x), p->exp); |
a7f3b1c7 | 1668 | x_ent->const_insn = this_insn; |
752df20e | 1669 | break; |
1670 | } | |
1671 | } | |
1672 | } | |
1673 | ||
8ad4c111 | 1674 | else if (REG_P (x) |
a7f3b1c7 | 1675 | && qty_table[REG_QTY (REGNO (x))].const_rtx |
1676 | && GET_MODE (x) == qty_table[REG_QTY (REGNO (x))].mode) | |
1677 | qty_table[REG_QTY (REGNO (x))].const_insn = this_insn; | |
752df20e | 1678 | |
1679 | /* If this is a constant with symbolic value, | |
1680 | and it has a term with an explicit integer value, | |
1681 | link it up with related expressions. */ | |
1682 | if (GET_CODE (x) == CONST) | |
1683 | { | |
1684 | rtx subexp = get_related_value (x); | |
952bc06d | 1685 | unsigned subhash; |
752df20e | 1686 | struct table_elt *subelt, *subelt_prev; |
1687 | ||
1688 | if (subexp != 0) | |
1689 | { | |
1690 | /* Get the integer-free subexpression in the hash table. */ | |
78d140c9 | 1691 | subhash = SAFE_HASH (subexp, mode); |
752df20e | 1692 | subelt = lookup (subexp, subhash, mode); |
1693 | if (subelt == 0) | |
4679ade3 | 1694 | subelt = insert (subexp, NULL, subhash, mode); |
752df20e | 1695 | /* Initialize SUBELT's circular chain if it has none. */ |
1696 | if (subelt->related_value == 0) | |
1697 | subelt->related_value = subelt; | |
1698 | /* Find the element in the circular chain that precedes SUBELT. */ | |
1699 | subelt_prev = subelt; | |
1700 | while (subelt_prev->related_value != subelt) | |
1701 | subelt_prev = subelt_prev->related_value; | |
1702 | /* Put new ELT into SUBELT's circular chain just before SUBELT. | |
1703 | This way the element that follows SUBELT is the oldest one. */ | |
1704 | elt->related_value = subelt_prev->related_value; | |
1705 | subelt_prev->related_value = elt; | |
1706 | } | |
1707 | } | |
1708 | ||
1709 | return elt; | |
1710 | } | |
01c8e4c9 | 1711 | |
1712 | /* Wrap insert_with_costs by passing the default costs. */ | |
1713 | ||
1714 | static struct table_elt * | |
1715 | insert (rtx x, struct table_elt *classp, unsigned int hash, | |
3754d046 | 1716 | machine_mode mode) |
01c8e4c9 | 1717 | { |
5ae4887d | 1718 | return insert_with_costs (x, classp, hash, mode, |
1719 | COST (x, mode), approx_reg_cost (x)); | |
01c8e4c9 | 1720 | } |
1721 | ||
752df20e | 1722 | \f |
1723 | /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from | |
1724 | CLASS2 into CLASS1. This is done when we have reached an insn which makes | |
1725 | the two classes equivalent. | |
1726 | ||
1727 | CLASS1 will be the surviving class; CLASS2 should not be used after this | |
1728 | call. | |
1729 | ||
1730 | Any invalid entries in CLASS2 will not be copied. */ | |
1731 | ||
1732 | static void | |
8ec3a57b | 1733 | merge_equiv_classes (struct table_elt *class1, struct table_elt *class2) |
752df20e | 1734 | { |
d328ebdf | 1735 | struct table_elt *elt, *next, *new_elt; |
752df20e | 1736 | |
1737 | /* Ensure we start with the head of the classes. */ | |
1738 | class1 = class1->first_same_value; | |
1739 | class2 = class2->first_same_value; | |
1740 | ||
1741 | /* If they were already equal, forget it. */ | |
1742 | if (class1 == class2) | |
1743 | return; | |
1744 | ||
1745 | for (elt = class2; elt; elt = next) | |
1746 | { | |
02e7a332 | 1747 | unsigned int hash; |
752df20e | 1748 | rtx exp = elt->exp; |
3754d046 | 1749 | machine_mode mode = elt->mode; |
752df20e | 1750 | |
1751 | next = elt->next_same_value; | |
1752 | ||
1753 | /* Remove old entry, make a new one in CLASS1's class. | |
1754 | Don't do this for invalid entries as we cannot find their | |
a92771b8 | 1755 | hash code (it also isn't necessary). */ |
78d140c9 | 1756 | if (REG_P (exp) || exp_equiv_p (exp, exp, 1, false)) |
752df20e | 1757 | { |
b57e33a4 | 1758 | bool need_rehash = false; |
1759 | ||
752df20e | 1760 | hash_arg_in_memory = 0; |
752df20e | 1761 | hash = HASH (exp, mode); |
cb10db9d | 1762 | |
8ad4c111 | 1763 | if (REG_P (exp)) |
b57e33a4 | 1764 | { |
1a5bccce | 1765 | need_rehash = REGNO_QTY_VALID_P (REGNO (exp)); |
b57e33a4 | 1766 | delete_reg_equiv (REGNO (exp)); |
1767 | } | |
cb10db9d | 1768 | |
d2c970fe | 1769 | if (REG_P (exp) && REGNO (exp) >= FIRST_PSEUDO_REGISTER) |
1770 | remove_pseudo_from_table (exp, hash); | |
1771 | else | |
1772 | remove_from_table (elt, hash); | |
752df20e | 1773 | |
b57e33a4 | 1774 | if (insert_regs (exp, class1, 0) || need_rehash) |
1b033cc3 | 1775 | { |
1776 | rehash_using_reg (exp); | |
1777 | hash = HASH (exp, mode); | |
1778 | } | |
d328ebdf | 1779 | new_elt = insert (exp, class1, hash, mode); |
1780 | new_elt->in_memory = hash_arg_in_memory; | |
20d3ff08 | 1781 | if (GET_CODE (exp) == ASM_OPERANDS && elt->cost == MAX_COST) |
1782 | new_elt->cost = MAX_COST; | |
752df20e | 1783 | } |
1784 | } | |
1785 | } | |
1786 | \f | |
53d90e4e | 1787 | /* Flush the entire hash table. */ |
1788 | ||
1789 | static void | |
8ec3a57b | 1790 | flush_hash_table (void) |
53d90e4e | 1791 | { |
1792 | int i; | |
1793 | struct table_elt *p; | |
1794 | ||
9c4f3716 | 1795 | for (i = 0; i < HASH_SIZE; i++) |
53d90e4e | 1796 | for (p = table[i]; p; p = table[i]) |
1797 | { | |
1798 | /* Note that invalidate can remove elements | |
1799 | after P in the current hash chain. */ | |
8ad4c111 | 1800 | if (REG_P (p->exp)) |
4c958a22 | 1801 | invalidate (p->exp, VOIDmode); |
53d90e4e | 1802 | else |
1803 | remove_from_table (p, i); | |
1804 | } | |
1805 | } | |
155b05dc | 1806 | \f |
e4a58c60 | 1807 | /* Check whether an anti dependence exists between X and EXP. MODE and |
1808 | ADDR are as for canon_anti_dependence. */ | |
37b8a8d6 | 1809 | |
e4a58c60 | 1810 | static bool |
3754d046 | 1811 | check_dependence (const_rtx x, rtx exp, machine_mode mode, rtx addr) |
02b0feeb | 1812 | { |
e4a58c60 | 1813 | subrtx_iterator::array_type array; |
1814 | FOR_EACH_SUBRTX (iter, array, x, NONCONST) | |
1815 | { | |
1816 | const_rtx x = *iter; | |
1817 | if (MEM_P (x) && canon_anti_dependence (x, true, exp, mode, addr)) | |
1818 | return true; | |
1819 | } | |
1820 | return false; | |
02b0feeb | 1821 | } |
52620891 | 1822 | |
1823 | /* Remove from the hash table, or mark as invalid, all expressions whose | |
f03bb97b | 1824 | values could be altered by storing in register X. */ |
52620891 | 1825 | |
1826 | static void | |
f03bb97b | 1827 | invalidate_reg (rtx x) |
52620891 | 1828 | { |
1829 | gcc_assert (GET_CODE (x) == REG); | |
1830 | ||
1831 | /* If X is a register, dependencies on its contents are recorded | |
1832 | through the qty number mechanism. Just change the qty number of | |
1833 | the register, mark it as invalid for expressions that refer to it, | |
1834 | and remove it itself. */ | |
1835 | unsigned int regno = REGNO (x); | |
1836 | unsigned int hash = HASH (x, GET_MODE (x)); | |
1837 | ||
1838 | /* Remove REGNO from any quantity list it might be on and indicate | |
1839 | that its value might have changed. If it is a pseudo, remove its | |
1840 | entry from the hash table. | |
1841 | ||
1842 | For a hard register, we do the first two actions above for any | |
1843 | additional hard registers corresponding to X. Then, if any of these | |
1844 | registers are in the table, we must remove any REG entries that | |
1845 | overlap these registers. */ | |
1846 | ||
1847 | delete_reg_equiv (regno); | |
1848 | REG_TICK (regno)++; | |
1849 | SUBREG_TICKED (regno) = -1; | |
1850 | ||
1851 | if (regno >= FIRST_PSEUDO_REGISTER) | |
f03bb97b | 1852 | remove_pseudo_from_table (x, hash); |
52620891 | 1853 | else |
1854 | { | |
1855 | HOST_WIDE_INT in_table = TEST_HARD_REG_BIT (hard_regs_in_table, regno); | |
1856 | unsigned int endregno = END_REGNO (x); | |
1857 | unsigned int rn; | |
1858 | struct table_elt *p, *next; | |
1859 | ||
1860 | CLEAR_HARD_REG_BIT (hard_regs_in_table, regno); | |
1861 | ||
1862 | for (rn = regno + 1; rn < endregno; rn++) | |
1863 | { | |
1864 | in_table |= TEST_HARD_REG_BIT (hard_regs_in_table, rn); | |
1865 | CLEAR_HARD_REG_BIT (hard_regs_in_table, rn); | |
1866 | delete_reg_equiv (rn); | |
1867 | REG_TICK (rn)++; | |
1868 | SUBREG_TICKED (rn) = -1; | |
1869 | } | |
1870 | ||
1871 | if (in_table) | |
1872 | for (hash = 0; hash < HASH_SIZE; hash++) | |
1873 | for (p = table[hash]; p; p = next) | |
1874 | { | |
1875 | next = p->next_same_hash; | |
1876 | ||
1877 | if (!REG_P (p->exp) || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER) | |
1878 | continue; | |
1879 | ||
f03bb97b | 1880 | unsigned int tregno = REGNO (p->exp); |
1881 | unsigned int tendregno = END_REGNO (p->exp); | |
1882 | if (tendregno > regno && tregno < endregno) | |
1883 | remove_from_table (p, hash); | |
52620891 | 1884 | } |
1885 | } | |
1886 | } | |
1887 | ||
155b05dc | 1888 | /* Remove from the hash table, or mark as invalid, all expressions whose |
1889 | values could be altered by storing in X. X is a register, a subreg, or | |
1890 | a memory reference with nonvarying address (because, when a memory | |
1891 | reference with a varying address is stored in, all memory references are | |
1892 | removed by invalidate_memory so specific invalidation is superfluous). | |
1893 | FULL_MODE, if not VOIDmode, indicates that this much should be | |
1894 | invalidated instead of just the amount indicated by the mode of X. This | |
1895 | is only used for bitfield stores into memory. | |
1896 | ||
1897 | A nonvarying address may be just a register or just a symbol reference, | |
1898 | or it may be either of those plus a numeric offset. */ | |
752df20e | 1899 | |
1900 | static void | |
3754d046 | 1901 | invalidate (rtx x, machine_mode full_mode) |
752df20e | 1902 | { |
19cb6b50 | 1903 | int i; |
1904 | struct table_elt *p; | |
56bbdce4 | 1905 | rtx addr; |
752df20e | 1906 | |
155b05dc | 1907 | switch (GET_CODE (x)) |
752df20e | 1908 | { |
155b05dc | 1909 | case REG: |
f03bb97b | 1910 | invalidate_reg (x); |
752df20e | 1911 | return; |
752df20e | 1912 | |
155b05dc | 1913 | case SUBREG: |
fdb25961 | 1914 | invalidate (SUBREG_REG (x), VOIDmode); |
752df20e | 1915 | return; |
6ede8018 | 1916 | |
155b05dc | 1917 | case PARALLEL: |
cb10db9d | 1918 | for (i = XVECLEN (x, 0) - 1; i >= 0; --i) |
6ede8018 | 1919 | invalidate (XVECEXP (x, 0, i), VOIDmode); |
1920 | return; | |
6ede8018 | 1921 | |
155b05dc | 1922 | case EXPR_LIST: |
1923 | /* This is part of a disjoint return value; extract the location in | |
1924 | question ignoring the offset. */ | |
6ede8018 | 1925 | invalidate (XEXP (x, 0), VOIDmode); |
1926 | return; | |
752df20e | 1927 | |
155b05dc | 1928 | case MEM: |
56bbdce4 | 1929 | addr = canon_rtx (get_addr (XEXP (x, 0))); |
7cfb9bcf | 1930 | /* Calculate the canonical version of X here so that |
1931 | true_dependence doesn't generate new RTL for X on each call. */ | |
1932 | x = canon_rtx (x); | |
1933 | ||
155b05dc | 1934 | /* Remove all hash table elements that refer to overlapping pieces of |
1935 | memory. */ | |
1936 | if (full_mode == VOIDmode) | |
1937 | full_mode = GET_MODE (x); | |
fdb25961 | 1938 | |
9c4f3716 | 1939 | for (i = 0; i < HASH_SIZE; i++) |
752df20e | 1940 | { |
19cb6b50 | 1941 | struct table_elt *next; |
155b05dc | 1942 | |
1943 | for (p = table[i]; p; p = next) | |
1944 | { | |
1945 | next = p->next_same_hash; | |
7cfb9bcf | 1946 | if (p->in_memory) |
1947 | { | |
02b0feeb | 1948 | /* Just canonicalize the expression once; |
1949 | otherwise each time we call invalidate | |
1950 | true_dependence will canonicalize the | |
1951 | expression again. */ | |
1952 | if (!p->canon_exp) | |
1953 | p->canon_exp = canon_rtx (p->exp); | |
e4a58c60 | 1954 | if (check_dependence (p->canon_exp, x, full_mode, addr)) |
7cfb9bcf | 1955 | remove_from_table (p, i); |
7cfb9bcf | 1956 | } |
155b05dc | 1957 | } |
752df20e | 1958 | } |
155b05dc | 1959 | return; |
1960 | ||
1961 | default: | |
cc636d56 | 1962 | gcc_unreachable (); |
752df20e | 1963 | } |
1964 | } | |
7a49a822 | 1965 | |
1966 | /* Invalidate DEST. Used when DEST is not going to be added | |
1967 | into the hash table for some reason, e.g. do_not_record | |
1968 | flagged on it. */ | |
1969 | ||
1970 | static void | |
1971 | invalidate_dest (rtx dest) | |
1972 | { | |
1973 | if (REG_P (dest) | |
1974 | || GET_CODE (dest) == SUBREG | |
1975 | || MEM_P (dest)) | |
1976 | invalidate (dest, VOIDmode); | |
1977 | else if (GET_CODE (dest) == STRICT_LOW_PART | |
1978 | || GET_CODE (dest) == ZERO_EXTRACT) | |
1979 | invalidate (XEXP (dest, 0), GET_MODE (dest)); | |
1980 | } | |
155b05dc | 1981 | \f |
752df20e | 1982 | /* Remove all expressions that refer to register REGNO, |
1983 | since they are already invalid, and we are about to | |
1984 | mark that register valid again and don't want the old | |
1985 | expressions to reappear as valid. */ | |
1986 | ||
1987 | static void | |
8ec3a57b | 1988 | remove_invalid_refs (unsigned int regno) |
752df20e | 1989 | { |
02e7a332 | 1990 | unsigned int i; |
1991 | struct table_elt *p, *next; | |
752df20e | 1992 | |
9c4f3716 | 1993 | for (i = 0; i < HASH_SIZE; i++) |
752df20e | 1994 | for (p = table[i]; p; p = next) |
1995 | { | |
1996 | next = p->next_same_hash; | |
2ec77a7c | 1997 | if (!REG_P (p->exp) && refers_to_regno_p (regno, p->exp)) |
752df20e | 1998 | remove_from_table (p, i); |
1999 | } | |
2000 | } | |
e6860d27 | 2001 | |
701e46d0 | 2002 | /* Likewise for a subreg with subreg_reg REGNO, subreg_byte OFFSET, |
2003 | and mode MODE. */ | |
e6860d27 | 2004 | static void |
9edf7ea8 | 2005 | remove_invalid_subreg_refs (unsigned int regno, poly_uint64 offset, |
3754d046 | 2006 | machine_mode mode) |
e6860d27 | 2007 | { |
02e7a332 | 2008 | unsigned int i; |
2009 | struct table_elt *p, *next; | |
e6860d27 | 2010 | |
9c4f3716 | 2011 | for (i = 0; i < HASH_SIZE; i++) |
e6860d27 | 2012 | for (p = table[i]; p; p = next) |
2013 | { | |
701e46d0 | 2014 | rtx exp = p->exp; |
e6860d27 | 2015 | next = p->next_same_hash; |
cb10db9d | 2016 | |
8ad4c111 | 2017 | if (!REG_P (exp) |
e6860d27 | 2018 | && (GET_CODE (exp) != SUBREG |
8ad4c111 | 2019 | || !REG_P (SUBREG_REG (exp)) |
e6860d27 | 2020 | || REGNO (SUBREG_REG (exp)) != regno |
9edf7ea8 | 2021 | || ranges_maybe_overlap_p (SUBREG_BYTE (exp), |
2022 | GET_MODE_SIZE (GET_MODE (exp)), | |
2023 | offset, GET_MODE_SIZE (mode))) | |
2ec77a7c | 2024 | && refers_to_regno_p (regno, p->exp)) |
e6860d27 | 2025 | remove_from_table (p, i); |
2026 | } | |
2027 | } | |
752df20e | 2028 | \f |
2029 | /* Recompute the hash codes of any valid entries in the hash table that | |
2030 | reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG. | |
2031 | ||
2032 | This is called when we make a jump equivalence. */ | |
2033 | ||
2034 | static void | |
8ec3a57b | 2035 | rehash_using_reg (rtx x) |
752df20e | 2036 | { |
3c1d7436 | 2037 | unsigned int i; |
752df20e | 2038 | struct table_elt *p, *next; |
952bc06d | 2039 | unsigned hash; |
752df20e | 2040 | |
2041 | if (GET_CODE (x) == SUBREG) | |
2042 | x = SUBREG_REG (x); | |
2043 | ||
2044 | /* If X is not a register or if the register is known not to be in any | |
2045 | valid entries in the table, we have no work to do. */ | |
2046 | ||
8ad4c111 | 2047 | if (!REG_P (x) |
d1264606 | 2048 | || REG_IN_TABLE (REGNO (x)) < 0 |
2049 | || REG_IN_TABLE (REGNO (x)) != REG_TICK (REGNO (x))) | |
752df20e | 2050 | return; |
2051 | ||
2052 | /* Scan all hash chains looking for valid entries that mention X. | |
b57e33a4 | 2053 | If we find one and it is in the wrong hash chain, move it. */ |
752df20e | 2054 | |
9c4f3716 | 2055 | for (i = 0; i < HASH_SIZE; i++) |
752df20e | 2056 | for (p = table[i]; p; p = next) |
2057 | { | |
2058 | next = p->next_same_hash; | |
b57e33a4 | 2059 | if (reg_mentioned_p (x, p->exp) |
78d140c9 | 2060 | && exp_equiv_p (p->exp, p->exp, 1, false) |
2061 | && i != (hash = SAFE_HASH (p->exp, p->mode))) | |
752df20e | 2062 | { |
2063 | if (p->next_same_hash) | |
2064 | p->next_same_hash->prev_same_hash = p->prev_same_hash; | |
2065 | ||
2066 | if (p->prev_same_hash) | |
2067 | p->prev_same_hash->next_same_hash = p->next_same_hash; | |
2068 | else | |
2069 | table[i] = p->next_same_hash; | |
2070 | ||
2071 | p->next_same_hash = table[hash]; | |
2072 | p->prev_same_hash = 0; | |
2073 | if (table[hash]) | |
2074 | table[hash]->prev_same_hash = p; | |
2075 | table[hash] = p; | |
2076 | } | |
2077 | } | |
2078 | } | |
2079 | \f | |
752df20e | 2080 | /* Remove from the hash table any expression that is a call-clobbered |
7e871eb5 | 2081 | register in INSN. Also update their TICK values. */ |
752df20e | 2082 | |
2083 | static void | |
7e871eb5 | 2084 | invalidate_for_call (rtx_insn *insn) |
752df20e | 2085 | { |
7e871eb5 | 2086 | unsigned int regno; |
952bc06d | 2087 | unsigned hash; |
752df20e | 2088 | struct table_elt *p, *next; |
2089 | int in_table = 0; | |
24ec6636 | 2090 | hard_reg_set_iterator hrsi; |
752df20e | 2091 | |
7e871eb5 | 2092 | /* Go through all the hard registers. For each that might be clobbered |
2093 | in call insn INSN, remove the register from quantity chains and update | |
752df20e | 2094 | reg_tick if defined. Also see if any of these registers is currently |
7e871eb5 | 2095 | in the table. |
2096 | ||
2097 | ??? We could be more precise for partially-clobbered registers, | |
2098 | and only invalidate values that actually occupy the clobbered part | |
2099 | of the registers. It doesn't seem worth the effort though, since | |
2100 | we shouldn't see this situation much before RA. Whatever choice | |
2101 | we make here has to be consistent with the table walk below, | |
2102 | so any change to this test will require a change there too. */ | |
2103 | HARD_REG_SET callee_clobbers | |
2104 | = insn_callee_abi (insn).full_and_partial_reg_clobbers (); | |
2105 | EXECUTE_IF_SET_IN_HARD_REG_SET (callee_clobbers, 0, regno, hrsi) | |
24ec6636 | 2106 | { |
2107 | delete_reg_equiv (regno); | |
2108 | if (REG_TICK (regno) >= 0) | |
2109 | { | |
2110 | REG_TICK (regno)++; | |
2111 | SUBREG_TICKED (regno) = -1; | |
2112 | } | |
2113 | in_table |= (TEST_HARD_REG_BIT (hard_regs_in_table, regno) != 0); | |
2114 | } | |
752df20e | 2115 | |
2116 | /* In the case where we have no call-clobbered hard registers in the | |
2117 | table, we are done. Otherwise, scan the table and remove any | |
2118 | entry that overlaps a call-clobbered register. */ | |
2119 | ||
2120 | if (in_table) | |
9c4f3716 | 2121 | for (hash = 0; hash < HASH_SIZE; hash++) |
752df20e | 2122 | for (p = table[hash]; p; p = next) |
2123 | { | |
2124 | next = p->next_same_hash; | |
2125 | ||
8ad4c111 | 2126 | if (!REG_P (p->exp) |
752df20e | 2127 | || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER) |
2128 | continue; | |
2129 | ||
7e871eb5 | 2130 | /* This must use the same test as above rather than the |
2131 | more accurate clobbers_reg_p. */ | |
2132 | if (overlaps_hard_reg_set_p (callee_clobbers, GET_MODE (p->exp), | |
2133 | REGNO (p->exp))) | |
2134 | remove_from_table (p, hash); | |
752df20e | 2135 | } |
2136 | } | |
2137 | \f | |
2138 | /* Given an expression X of type CONST, | |
2139 | and ELT which is its table entry (or 0 if it | |
2140 | is not in the hash table), | |
2141 | return an alternate expression for X as a register plus integer. | |
2142 | If none can be found, return 0. */ | |
2143 | ||
2144 | static rtx | |
8ec3a57b | 2145 | use_related_value (rtx x, struct table_elt *elt) |
752df20e | 2146 | { |
19cb6b50 | 2147 | struct table_elt *relt = 0; |
2148 | struct table_elt *p, *q; | |
b572011e | 2149 | HOST_WIDE_INT offset; |
752df20e | 2150 | |
2151 | /* First, is there anything related known? | |
2152 | If we have a table element, we can tell from that. | |
2153 | Otherwise, must look it up. */ | |
2154 | ||
2155 | if (elt != 0 && elt->related_value != 0) | |
2156 | relt = elt; | |
2157 | else if (elt == 0 && GET_CODE (x) == CONST) | |
2158 | { | |
2159 | rtx subexp = get_related_value (x); | |
2160 | if (subexp != 0) | |
2161 | relt = lookup (subexp, | |
78d140c9 | 2162 | SAFE_HASH (subexp, GET_MODE (subexp)), |
752df20e | 2163 | GET_MODE (subexp)); |
2164 | } | |
2165 | ||
2166 | if (relt == 0) | |
2167 | return 0; | |
2168 | ||
2169 | /* Search all related table entries for one that has an | |
2170 | equivalent register. */ | |
2171 | ||
2172 | p = relt; | |
2173 | while (1) | |
2174 | { | |
2175 | /* This loop is strange in that it is executed in two different cases. | |
2176 | The first is when X is already in the table. Then it is searching | |
2177 | the RELATED_VALUE list of X's class (RELT). The second case is when | |
2178 | X is not in the table. Then RELT points to a class for the related | |
2179 | value. | |
2180 | ||
2181 | Ensure that, whatever case we are in, that we ignore classes that have | |
2182 | the same value as X. */ | |
2183 | ||
2184 | if (rtx_equal_p (x, p->exp)) | |
2185 | q = 0; | |
2186 | else | |
2187 | for (q = p->first_same_value; q; q = q->next_same_value) | |
8ad4c111 | 2188 | if (REG_P (q->exp)) |
752df20e | 2189 | break; |
2190 | ||
2191 | if (q) | |
2192 | break; | |
2193 | ||
2194 | p = p->related_value; | |
2195 | ||
2196 | /* We went all the way around, so there is nothing to be found. | |
2197 | Alternatively, perhaps RELT was in the table for some other reason | |
2198 | and it has no related values recorded. */ | |
2199 | if (p == relt || p == 0) | |
2200 | break; | |
2201 | } | |
2202 | ||
2203 | if (q == 0) | |
2204 | return 0; | |
2205 | ||
2206 | offset = (get_integer_term (x) - get_integer_term (p->exp)); | |
2207 | /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */ | |
29c05e22 | 2208 | return plus_constant (q->mode, q->exp, offset); |
752df20e | 2209 | } |
2210 | \f | |
e1ab7874 | 2211 | |
d91f2122 | 2212 | /* Hash a string. Just add its bytes up. */ |
2213 | static inline unsigned | |
78d140c9 | 2214 | hash_rtx_string (const char *ps) |
d91f2122 | 2215 | { |
2216 | unsigned hash = 0; | |
d4c5e26d | 2217 | const unsigned char *p = (const unsigned char *) ps; |
2218 | ||
d91f2122 | 2219 | if (p) |
2220 | while (*p) | |
2221 | hash += *p++; | |
2222 | ||
2223 | return hash; | |
2224 | } | |
2225 | ||
48e1416a | 2226 | /* Same as hash_rtx, but call CB on each rtx if it is not NULL. |
e1ab7874 | 2227 | When the callback returns true, we continue with the new rtx. */ |
752df20e | 2228 | |
78d140c9 | 2229 | unsigned |
3754d046 | 2230 | hash_rtx_cb (const_rtx x, machine_mode mode, |
e1ab7874 | 2231 | int *do_not_record_p, int *hash_arg_in_memory_p, |
2232 | bool have_reg_qty, hash_rtx_callback_function cb) | |
752df20e | 2233 | { |
19cb6b50 | 2234 | int i, j; |
2235 | unsigned hash = 0; | |
2236 | enum rtx_code code; | |
2237 | const char *fmt; | |
3754d046 | 2238 | machine_mode newmode; |
e1ab7874 | 2239 | rtx newx; |
752df20e | 2240 | |
78d140c9 | 2241 | /* Used to turn recursion into iteration. We can't rely on GCC's |
2242 | tail-recursion elimination since we need to keep accumulating values | |
2243 | in HASH. */ | |
752df20e | 2244 | repeat: |
2245 | if (x == 0) | |
2246 | return hash; | |
2247 | ||
e1ab7874 | 2248 | /* Invoke the callback first. */ |
48e1416a | 2249 | if (cb != NULL |
e1ab7874 | 2250 | && ((*cb) (x, mode, &newx, &newmode))) |
2251 | { | |
2252 | hash += hash_rtx_cb (newx, newmode, do_not_record_p, | |
2253 | hash_arg_in_memory_p, have_reg_qty, cb); | |
2254 | return hash; | |
2255 | } | |
2256 | ||
752df20e | 2257 | code = GET_CODE (x); |
2258 | switch (code) | |
2259 | { | |
2260 | case REG: | |
2261 | { | |
02e7a332 | 2262 | unsigned int regno = REGNO (x); |
752df20e | 2263 | |
e1ab7874 | 2264 | if (do_not_record_p && !reload_completed) |
752df20e | 2265 | { |
78d140c9 | 2266 | /* On some machines, we can't record any non-fixed hard register, |
2267 | because extending its life will cause reload problems. We | |
2268 | consider ap, fp, sp, gp to be fixed for this purpose. | |
2269 | ||
2270 | We also consider CCmode registers to be fixed for this purpose; | |
2271 | failure to do so leads to failure to simplify 0<100 type of | |
2272 | conditionals. | |
2273 | ||
2274 | On all machines, we can't record any global registers. | |
2275 | Nor should we record any register that is in a small | |
24dd0668 | 2276 | class, as defined by TARGET_CLASS_LIKELY_SPILLED_P. */ |
78d140c9 | 2277 | bool record; |
2278 | ||
2279 | if (regno >= FIRST_PSEUDO_REGISTER) | |
2280 | record = true; | |
2281 | else if (x == frame_pointer_rtx | |
2282 | || x == hard_frame_pointer_rtx | |
2283 | || x == arg_pointer_rtx | |
2284 | || x == stack_pointer_rtx | |
2285 | || x == pic_offset_table_rtx) | |
2286 | record = true; | |
2287 | else if (global_regs[regno]) | |
2288 | record = false; | |
2289 | else if (fixed_regs[regno]) | |
2290 | record = true; | |
2291 | else if (GET_MODE_CLASS (GET_MODE (x)) == MODE_CC) | |
2292 | record = true; | |
ed5527ca | 2293 | else if (targetm.small_register_classes_for_mode_p (GET_MODE (x))) |
78d140c9 | 2294 | record = false; |
24dd0668 | 2295 | else if (targetm.class_likely_spilled_p (REGNO_REG_CLASS (regno))) |
78d140c9 | 2296 | record = false; |
2297 | else | |
2298 | record = true; | |
2299 | ||
2300 | if (!record) | |
2301 | { | |
2302 | *do_not_record_p = 1; | |
2303 | return 0; | |
2304 | } | |
752df20e | 2305 | } |
02e7a332 | 2306 | |
78d140c9 | 2307 | hash += ((unsigned int) REG << 7); |
2308 | hash += (have_reg_qty ? (unsigned) REG_QTY (regno) : regno); | |
952bc06d | 2309 | return hash; |
752df20e | 2310 | } |
2311 | ||
e6860d27 | 2312 | /* We handle SUBREG of a REG specially because the underlying |
2313 | reg changes its hash value with every value change; we don't | |
2314 | want to have to forget unrelated subregs when one subreg changes. */ | |
2315 | case SUBREG: | |
2316 | { | |
8ad4c111 | 2317 | if (REG_P (SUBREG_REG (x))) |
e6860d27 | 2318 | { |
78d140c9 | 2319 | hash += (((unsigned int) SUBREG << 7) |
701e46d0 | 2320 | + REGNO (SUBREG_REG (x)) |
9edf7ea8 | 2321 | + (constant_lower_bound (SUBREG_BYTE (x)) |
2322 | / UNITS_PER_WORD)); | |
e6860d27 | 2323 | return hash; |
2324 | } | |
2325 | break; | |
2326 | } | |
2327 | ||
752df20e | 2328 | case CONST_INT: |
78d140c9 | 2329 | hash += (((unsigned int) CONST_INT << 7) + (unsigned int) mode |
2330 | + (unsigned int) INTVAL (x)); | |
2331 | return hash; | |
752df20e | 2332 | |
e913b5cd | 2333 | case CONST_WIDE_INT: |
c4050ce7 | 2334 | for (i = 0; i < CONST_WIDE_INT_NUNITS (x); i++) |
2335 | hash += CONST_WIDE_INT_ELT (x, i); | |
e913b5cd | 2336 | return hash; |
2337 | ||
bbad7cd0 | 2338 | case CONST_POLY_INT: |
2339 | { | |
2340 | inchash::hash h; | |
2341 | h.add_int (hash); | |
2342 | for (unsigned int i = 0; i < NUM_POLY_INT_COEFFS; ++i) | |
2343 | h.add_wide_int (CONST_POLY_INT_COEFFS (x)[i]); | |
2344 | return h.end (); | |
2345 | } | |
2346 | ||
752df20e | 2347 | case CONST_DOUBLE: |
2348 | /* This is like the general case, except that it only counts | |
2349 | the integers representing the constant. */ | |
78d140c9 | 2350 | hash += (unsigned int) code + (unsigned int) GET_MODE (x); |
e913b5cd | 2351 | if (TARGET_SUPPORTS_WIDE_INT == 0 && GET_MODE (x) == VOIDmode) |
78d140c9 | 2352 | hash += ((unsigned int) CONST_DOUBLE_LOW (x) |
2353 | + (unsigned int) CONST_DOUBLE_HIGH (x)); | |
e913b5cd | 2354 | else |
2355 | hash += real_hash (CONST_DOUBLE_REAL_VALUE (x)); | |
752df20e | 2356 | return hash; |
2357 | ||
e397ad8e | 2358 | case CONST_FIXED: |
2359 | hash += (unsigned int) code + (unsigned int) GET_MODE (x); | |
2360 | hash += fixed_hash (CONST_FIXED_VALUE (x)); | |
2361 | return hash; | |
2362 | ||
886cfd4f | 2363 | case CONST_VECTOR: |
2364 | { | |
2365 | int units; | |
2366 | rtx elt; | |
2367 | ||
00bc18a2 | 2368 | units = const_vector_encoded_nelts (x); |
886cfd4f | 2369 | |
2370 | for (i = 0; i < units; ++i) | |
2371 | { | |
00bc18a2 | 2372 | elt = CONST_VECTOR_ENCODED_ELT (x, i); |
e1ab7874 | 2373 | hash += hash_rtx_cb (elt, GET_MODE (elt), |
48e1416a | 2374 | do_not_record_p, hash_arg_in_memory_p, |
e1ab7874 | 2375 | have_reg_qty, cb); |
886cfd4f | 2376 | } |
2377 | ||
2378 | return hash; | |
2379 | } | |
2380 | ||
752df20e | 2381 | /* Assume there is only one rtx object for any given label. */ |
2382 | case LABEL_REF: | |
78d140c9 | 2383 | /* We don't hash on the address of the CODE_LABEL to avoid bootstrap |
2384 | differences and differences between each stage's debugging dumps. */ | |
2385 | hash += (((unsigned int) LABEL_REF << 7) | |
c7799456 | 2386 | + CODE_LABEL_NUMBER (label_ref_label (x))); |
952bc06d | 2387 | return hash; |
752df20e | 2388 | |
2389 | case SYMBOL_REF: | |
78d140c9 | 2390 | { |
2391 | /* Don't hash on the symbol's address to avoid bootstrap differences. | |
2392 | Different hash values may cause expressions to be recorded in | |
2393 | different orders and thus different registers to be used in the | |
2394 | final assembler. This also avoids differences in the dump files | |
2395 | between various stages. */ | |
2396 | unsigned int h = 0; | |
2397 | const unsigned char *p = (const unsigned char *) XSTR (x, 0); | |
2398 | ||
2399 | while (*p) | |
2400 | h += (h << 7) + *p++; /* ??? revisit */ | |
2401 | ||
2402 | hash += ((unsigned int) SYMBOL_REF << 7) + h; | |
2403 | return hash; | |
2404 | } | |
752df20e | 2405 | |
2406 | case MEM: | |
155b05dc | 2407 | /* We don't record if marked volatile or if BLKmode since we don't |
2408 | know the size of the move. */ | |
e1ab7874 | 2409 | if (do_not_record_p && (MEM_VOLATILE_P (x) || GET_MODE (x) == BLKmode)) |
752df20e | 2410 | { |
78d140c9 | 2411 | *do_not_record_p = 1; |
752df20e | 2412 | return 0; |
2413 | } | |
78d140c9 | 2414 | if (hash_arg_in_memory_p && !MEM_READONLY_P (x)) |
2415 | *hash_arg_in_memory_p = 1; | |
805e22b2 | 2416 | |
752df20e | 2417 | /* Now that we have already found this special case, |
2418 | might as well speed it up as much as possible. */ | |
952bc06d | 2419 | hash += (unsigned) MEM; |
752df20e | 2420 | x = XEXP (x, 0); |
2421 | goto repeat; | |
2422 | ||
7002e559 | 2423 | case USE: |
2424 | /* A USE that mentions non-volatile memory needs special | |
2425 | handling since the MEM may be BLKmode which normally | |
2426 | prevents an entry from being made. Pure calls are | |
78d140c9 | 2427 | marked by a USE which mentions BLKmode memory. |
2428 | See calls.c:emit_call_1. */ | |
e16ceb8e | 2429 | if (MEM_P (XEXP (x, 0)) |
7002e559 | 2430 | && ! MEM_VOLATILE_P (XEXP (x, 0))) |
2431 | { | |
d4c5e26d | 2432 | hash += (unsigned) USE; |
7002e559 | 2433 | x = XEXP (x, 0); |
2434 | ||
78d140c9 | 2435 | if (hash_arg_in_memory_p && !MEM_READONLY_P (x)) |
2436 | *hash_arg_in_memory_p = 1; | |
7002e559 | 2437 | |
2438 | /* Now that we have already found this special case, | |
2439 | might as well speed it up as much as possible. */ | |
2440 | hash += (unsigned) MEM; | |
2441 | x = XEXP (x, 0); | |
2442 | goto repeat; | |
2443 | } | |
2444 | break; | |
2445 | ||
752df20e | 2446 | case PRE_DEC: |
2447 | case PRE_INC: | |
2448 | case POST_DEC: | |
2449 | case POST_INC: | |
40988080 | 2450 | case PRE_MODIFY: |
2451 | case POST_MODIFY: | |
752df20e | 2452 | case PC: |
2453 | case CC0: | |
2454 | case CALL: | |
2455 | case UNSPEC_VOLATILE: | |
e1ab7874 | 2456 | if (do_not_record_p) { |
2457 | *do_not_record_p = 1; | |
2458 | return 0; | |
2459 | } | |
2460 | else | |
2461 | return hash; | |
2462 | break; | |
752df20e | 2463 | |
2464 | case ASM_OPERANDS: | |
e1ab7874 | 2465 | if (do_not_record_p && MEM_VOLATILE_P (x)) |
752df20e | 2466 | { |
78d140c9 | 2467 | *do_not_record_p = 1; |
752df20e | 2468 | return 0; |
2469 | } | |
d91f2122 | 2470 | else |
2471 | { | |
2472 | /* We don't want to take the filename and line into account. */ | |
2473 | hash += (unsigned) code + (unsigned) GET_MODE (x) | |
78d140c9 | 2474 | + hash_rtx_string (ASM_OPERANDS_TEMPLATE (x)) |
2475 | + hash_rtx_string (ASM_OPERANDS_OUTPUT_CONSTRAINT (x)) | |
d91f2122 | 2476 | + (unsigned) ASM_OPERANDS_OUTPUT_IDX (x); |
2477 | ||
2478 | if (ASM_OPERANDS_INPUT_LENGTH (x)) | |
2479 | { | |
2480 | for (i = 1; i < ASM_OPERANDS_INPUT_LENGTH (x); i++) | |
2481 | { | |
e1ab7874 | 2482 | hash += (hash_rtx_cb (ASM_OPERANDS_INPUT (x, i), |
2483 | GET_MODE (ASM_OPERANDS_INPUT (x, i)), | |
2484 | do_not_record_p, hash_arg_in_memory_p, | |
2485 | have_reg_qty, cb) | |
78d140c9 | 2486 | + hash_rtx_string |
e1ab7874 | 2487 | (ASM_OPERANDS_INPUT_CONSTRAINT (x, i))); |
d91f2122 | 2488 | } |
2489 | ||
78d140c9 | 2490 | hash += hash_rtx_string (ASM_OPERANDS_INPUT_CONSTRAINT (x, 0)); |
d91f2122 | 2491 | x = ASM_OPERANDS_INPUT (x, 0); |
2492 | mode = GET_MODE (x); | |
2493 | goto repeat; | |
2494 | } | |
2495 | ||
2496 | return hash; | |
2497 | } | |
0dbd1c74 | 2498 | break; |
cb10db9d | 2499 | |
0dbd1c74 | 2500 | default: |
2501 | break; | |
752df20e | 2502 | } |
2503 | ||
2504 | i = GET_RTX_LENGTH (code) - 1; | |
952bc06d | 2505 | hash += (unsigned) code + (unsigned) GET_MODE (x); |
752df20e | 2506 | fmt = GET_RTX_FORMAT (code); |
2507 | for (; i >= 0; i--) | |
2508 | { | |
cc636d56 | 2509 | switch (fmt[i]) |
752df20e | 2510 | { |
cc636d56 | 2511 | case 'e': |
752df20e | 2512 | /* If we are about to do the last recursive call |
2513 | needed at this level, change it into iteration. | |
2514 | This function is called enough to be worth it. */ | |
2515 | if (i == 0) | |
2516 | { | |
78d140c9 | 2517 | x = XEXP (x, i); |
752df20e | 2518 | goto repeat; |
2519 | } | |
48e1416a | 2520 | |
b9c74b4d | 2521 | hash += hash_rtx_cb (XEXP (x, i), VOIDmode, do_not_record_p, |
e1ab7874 | 2522 | hash_arg_in_memory_p, |
2523 | have_reg_qty, cb); | |
cc636d56 | 2524 | break; |
78d140c9 | 2525 | |
cc636d56 | 2526 | case 'E': |
2527 | for (j = 0; j < XVECLEN (x, i); j++) | |
b9c74b4d | 2528 | hash += hash_rtx_cb (XVECEXP (x, i, j), VOIDmode, do_not_record_p, |
e1ab7874 | 2529 | hash_arg_in_memory_p, |
2530 | have_reg_qty, cb); | |
cc636d56 | 2531 | break; |
78d140c9 | 2532 | |
cc636d56 | 2533 | case 's': |
2534 | hash += hash_rtx_string (XSTR (x, i)); | |
2535 | break; | |
2536 | ||
2537 | case 'i': | |
2538 | hash += (unsigned int) XINT (x, i); | |
2539 | break; | |
2540 | ||
9edf7ea8 | 2541 | case 'p': |
2542 | hash += constant_lower_bound (SUBREG_BYTE (x)); | |
2543 | break; | |
2544 | ||
cc636d56 | 2545 | case '0': case 't': |
2546 | /* Unused. */ | |
2547 | break; | |
2548 | ||
2549 | default: | |
2550 | gcc_unreachable (); | |
2551 | } | |
752df20e | 2552 | } |
78d140c9 | 2553 | |
752df20e | 2554 | return hash; |
2555 | } | |
2556 | ||
e1ab7874 | 2557 | /* Hash an rtx. We are careful to make sure the value is never negative. |
2558 | Equivalent registers hash identically. | |
2559 | MODE is used in hashing for CONST_INTs only; | |
2560 | otherwise the mode of X is used. | |
2561 | ||
2562 | Store 1 in DO_NOT_RECORD_P if any subexpression is volatile. | |
2563 | ||
2564 | If HASH_ARG_IN_MEMORY_P is not NULL, store 1 in it if X contains | |
2e444733 | 2565 | a MEM rtx which does not have the MEM_READONLY_P flag set. |
e1ab7874 | 2566 | |
2567 | Note that cse_insn knows that the hash code of a MEM expression | |
2568 | is just (int) MEM plus the hash code of the address. */ | |
2569 | ||
2570 | unsigned | |
3754d046 | 2571 | hash_rtx (const_rtx x, machine_mode mode, int *do_not_record_p, |
e1ab7874 | 2572 | int *hash_arg_in_memory_p, bool have_reg_qty) |
2573 | { | |
2574 | return hash_rtx_cb (x, mode, do_not_record_p, | |
2575 | hash_arg_in_memory_p, have_reg_qty, NULL); | |
2576 | } | |
2577 | ||
78d140c9 | 2578 | /* Hash an rtx X for cse via hash_rtx. |
2579 | Stores 1 in do_not_record if any subexpression is volatile. | |
2580 | Stores 1 in hash_arg_in_memory if X contains a mem rtx which | |
2e444733 | 2581 | does not have the MEM_READONLY_P flag set. */ |
78d140c9 | 2582 | |
2583 | static inline unsigned | |
3754d046 | 2584 | canon_hash (rtx x, machine_mode mode) |
78d140c9 | 2585 | { |
2586 | return hash_rtx (x, mode, &do_not_record, &hash_arg_in_memory, true); | |
2587 | } | |
2588 | ||
2589 | /* Like canon_hash but with no side effects, i.e. do_not_record | |
2590 | and hash_arg_in_memory are not changed. */ | |
752df20e | 2591 | |
78d140c9 | 2592 | static inline unsigned |
3754d046 | 2593 | safe_hash (rtx x, machine_mode mode) |
752df20e | 2594 | { |
78d140c9 | 2595 | int dummy_do_not_record; |
2596 | return hash_rtx (x, mode, &dummy_do_not_record, NULL, true); | |
752df20e | 2597 | } |
2598 | \f | |
2599 | /* Return 1 iff X and Y would canonicalize into the same thing, | |
2600 | without actually constructing the canonicalization of either one. | |
2601 | If VALIDATE is nonzero, | |
2602 | we assume X is an expression being processed from the rtl | |
2603 | and Y was found in the hash table. We check register refs | |
2604 | in Y for being marked as valid. | |
2605 | ||
78d140c9 | 2606 | If FOR_GCSE is true, we compare X and Y for equivalence for GCSE. */ |
752df20e | 2607 | |
78d140c9 | 2608 | int |
52d07779 | 2609 | exp_equiv_p (const_rtx x, const_rtx y, int validate, bool for_gcse) |
752df20e | 2610 | { |
19cb6b50 | 2611 | int i, j; |
2612 | enum rtx_code code; | |
2613 | const char *fmt; | |
752df20e | 2614 | |
2615 | /* Note: it is incorrect to assume an expression is equivalent to itself | |
2616 | if VALIDATE is nonzero. */ | |
2617 | if (x == y && !validate) | |
2618 | return 1; | |
78d140c9 | 2619 | |
752df20e | 2620 | if (x == 0 || y == 0) |
2621 | return x == y; | |
2622 | ||
2623 | code = GET_CODE (x); | |
2624 | if (code != GET_CODE (y)) | |
78d140c9 | 2625 | return 0; |
752df20e | 2626 | |
2627 | /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */ | |
2628 | if (GET_MODE (x) != GET_MODE (y)) | |
2629 | return 0; | |
2630 | ||
04ec15fa | 2631 | /* MEMs referring to different address space are not equivalent. */ |
bd1a81f7 | 2632 | if (code == MEM && MEM_ADDR_SPACE (x) != MEM_ADDR_SPACE (y)) |
2633 | return 0; | |
2634 | ||
752df20e | 2635 | switch (code) |
2636 | { | |
2637 | case PC: | |
2638 | case CC0: | |
0349edce | 2639 | CASE_CONST_UNIQUE: |
73f5c1e3 | 2640 | return x == y; |
752df20e | 2641 | |
2642 | case LABEL_REF: | |
c7799456 | 2643 | return label_ref_label (x) == label_ref_label (y); |
752df20e | 2644 | |
d1a40e76 | 2645 | case SYMBOL_REF: |
2646 | return XSTR (x, 0) == XSTR (y, 0); | |
2647 | ||
752df20e | 2648 | case REG: |
78d140c9 | 2649 | if (for_gcse) |
2650 | return REGNO (x) == REGNO (y); | |
2651 | else | |
2652 | { | |
2653 | unsigned int regno = REGNO (y); | |
2654 | unsigned int i; | |
a2c6f0b7 | 2655 | unsigned int endregno = END_REGNO (y); |
752df20e | 2656 | |
78d140c9 | 2657 | /* If the quantities are not the same, the expressions are not |
2658 | equivalent. If there are and we are not to validate, they | |
2659 | are equivalent. Otherwise, ensure all regs are up-to-date. */ | |
752df20e | 2660 | |
78d140c9 | 2661 | if (REG_QTY (REGNO (x)) != REG_QTY (regno)) |
2662 | return 0; | |
2663 | ||
2664 | if (! validate) | |
2665 | return 1; | |
2666 | ||
2667 | for (i = regno; i < endregno; i++) | |
2668 | if (REG_IN_TABLE (i) != REG_TICK (i)) | |
2669 | return 0; | |
752df20e | 2670 | |
752df20e | 2671 | return 1; |
78d140c9 | 2672 | } |
752df20e | 2673 | |
78d140c9 | 2674 | case MEM: |
2675 | if (for_gcse) | |
2676 | { | |
78d140c9 | 2677 | /* A volatile mem should not be considered equivalent to any |
2678 | other. */ | |
2679 | if (MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y)) | |
2680 | return 0; | |
a79761ff | 2681 | |
2682 | /* Can't merge two expressions in different alias sets, since we | |
2683 | can decide that the expression is transparent in a block when | |
2684 | it isn't, due to it being set with the different alias set. | |
2685 | ||
2686 | Also, can't merge two expressions with different MEM_ATTRS. | |
2687 | They could e.g. be two different entities allocated into the | |
2688 | same space on the stack (see e.g. PR25130). In that case, the | |
2689 | MEM addresses can be the same, even though the two MEMs are | |
2690 | absolutely not equivalent. | |
2691 | ||
2692 | But because really all MEM attributes should be the same for | |
2693 | equivalent MEMs, we just use the invariant that MEMs that have | |
2694 | the same attributes share the same mem_attrs data structure. */ | |
7e304b71 | 2695 | if (!mem_attrs_eq_p (MEM_ATTRS (x), MEM_ATTRS (y))) |
a79761ff | 2696 | return 0; |
4ee783fc | 2697 | |
2698 | /* If we are handling exceptions, we cannot consider two expressions | |
2699 | with different trapping status as equivalent, because simple_mem | |
2700 | might accept one and reject the other. */ | |
2701 | if (cfun->can_throw_non_call_exceptions | |
2702 | && (MEM_NOTRAP_P (x) != MEM_NOTRAP_P (y))) | |
2703 | return 0; | |
78d140c9 | 2704 | } |
2705 | break; | |
752df20e | 2706 | |
2707 | /* For commutative operations, check both orders. */ | |
2708 | case PLUS: | |
2709 | case MULT: | |
2710 | case AND: | |
2711 | case IOR: | |
2712 | case XOR: | |
2713 | case NE: | |
2714 | case EQ: | |
78d140c9 | 2715 | return ((exp_equiv_p (XEXP (x, 0), XEXP (y, 0), |
2716 | validate, for_gcse) | |
752df20e | 2717 | && exp_equiv_p (XEXP (x, 1), XEXP (y, 1), |
78d140c9 | 2718 | validate, for_gcse)) |
752df20e | 2719 | || (exp_equiv_p (XEXP (x, 0), XEXP (y, 1), |
78d140c9 | 2720 | validate, for_gcse) |
752df20e | 2721 | && exp_equiv_p (XEXP (x, 1), XEXP (y, 0), |
78d140c9 | 2722 | validate, for_gcse))); |
cb10db9d | 2723 | |
d91f2122 | 2724 | case ASM_OPERANDS: |
2725 | /* We don't use the generic code below because we want to | |
2726 | disregard filename and line numbers. */ | |
2727 | ||
2728 | /* A volatile asm isn't equivalent to any other. */ | |
2729 | if (MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y)) | |
2730 | return 0; | |
2731 | ||
2732 | if (GET_MODE (x) != GET_MODE (y) | |
2733 | || strcmp (ASM_OPERANDS_TEMPLATE (x), ASM_OPERANDS_TEMPLATE (y)) | |
2734 | || strcmp (ASM_OPERANDS_OUTPUT_CONSTRAINT (x), | |
2735 | ASM_OPERANDS_OUTPUT_CONSTRAINT (y)) | |
2736 | || ASM_OPERANDS_OUTPUT_IDX (x) != ASM_OPERANDS_OUTPUT_IDX (y) | |
2737 | || ASM_OPERANDS_INPUT_LENGTH (x) != ASM_OPERANDS_INPUT_LENGTH (y)) | |
2738 | return 0; | |
2739 | ||
2740 | if (ASM_OPERANDS_INPUT_LENGTH (x)) | |
2741 | { | |
2742 | for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--) | |
2743 | if (! exp_equiv_p (ASM_OPERANDS_INPUT (x, i), | |
2744 | ASM_OPERANDS_INPUT (y, i), | |
78d140c9 | 2745 | validate, for_gcse) |
d91f2122 | 2746 | || strcmp (ASM_OPERANDS_INPUT_CONSTRAINT (x, i), |
2747 | ASM_OPERANDS_INPUT_CONSTRAINT (y, i))) | |
2748 | return 0; | |
2749 | } | |
2750 | ||
2751 | return 1; | |
2752 | ||
0dbd1c74 | 2753 | default: |
2754 | break; | |
752df20e | 2755 | } |
2756 | ||
2757 | /* Compare the elements. If any pair of corresponding elements | |
78d140c9 | 2758 | fail to match, return 0 for the whole thing. */ |
752df20e | 2759 | |
2760 | fmt = GET_RTX_FORMAT (code); | |
2761 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
2762 | { | |
b572011e | 2763 | switch (fmt[i]) |
752df20e | 2764 | { |
b572011e | 2765 | case 'e': |
78d140c9 | 2766 | if (! exp_equiv_p (XEXP (x, i), XEXP (y, i), |
2767 | validate, for_gcse)) | |
752df20e | 2768 | return 0; |
b572011e | 2769 | break; |
2770 | ||
2771 | case 'E': | |
752df20e | 2772 | if (XVECLEN (x, i) != XVECLEN (y, i)) |
2773 | return 0; | |
2774 | for (j = 0; j < XVECLEN (x, i); j++) | |
2775 | if (! exp_equiv_p (XVECEXP (x, i, j), XVECEXP (y, i, j), | |
78d140c9 | 2776 | validate, for_gcse)) |
752df20e | 2777 | return 0; |
b572011e | 2778 | break; |
2779 | ||
2780 | case 's': | |
752df20e | 2781 | if (strcmp (XSTR (x, i), XSTR (y, i))) |
2782 | return 0; | |
b572011e | 2783 | break; |
2784 | ||
2785 | case 'i': | |
752df20e | 2786 | if (XINT (x, i) != XINT (y, i)) |
2787 | return 0; | |
b572011e | 2788 | break; |
2789 | ||
2790 | case 'w': | |
2791 | if (XWINT (x, i) != XWINT (y, i)) | |
2792 | return 0; | |
cb10db9d | 2793 | break; |
b572011e | 2794 | |
9edf7ea8 | 2795 | case 'p': |
2796 | if (maybe_ne (SUBREG_BYTE (x), SUBREG_BYTE (y))) | |
2797 | return 0; | |
2798 | break; | |
2799 | ||
b572011e | 2800 | case '0': |
a4070a91 | 2801 | case 't': |
b572011e | 2802 | break; |
2803 | ||
2804 | default: | |
cc636d56 | 2805 | gcc_unreachable (); |
752df20e | 2806 | } |
cb10db9d | 2807 | } |
b572011e | 2808 | |
752df20e | 2809 | return 1; |
2810 | } | |
2811 | \f | |
1cc37766 | 2812 | /* Subroutine of canon_reg. Pass *XLOC through canon_reg, and validate |
2813 | the result if necessary. INSN is as for canon_reg. */ | |
2814 | ||
2815 | static void | |
47f1d198 | 2816 | validate_canon_reg (rtx *xloc, rtx_insn *insn) |
1cc37766 | 2817 | { |
3072d30e | 2818 | if (*xloc) |
2819 | { | |
d328ebdf | 2820 | rtx new_rtx = canon_reg (*xloc, insn); |
1cc37766 | 2821 | |
3072d30e | 2822 | /* If replacing pseudo with hard reg or vice versa, ensure the |
2823 | insn remains valid. Likewise if the insn has MATCH_DUPs. */ | |
d328ebdf | 2824 | gcc_assert (insn && new_rtx); |
2825 | validate_change (insn, xloc, new_rtx, 1); | |
3072d30e | 2826 | } |
1cc37766 | 2827 | } |
2828 | ||
752df20e | 2829 | /* Canonicalize an expression: |
2830 | replace each register reference inside it | |
2831 | with the "oldest" equivalent register. | |
2832 | ||
0c0acbaa | 2833 | If INSN is nonzero validate_change is used to ensure that INSN remains valid |
d10cfa8d | 2834 | after we make our substitution. The calls are made with IN_GROUP nonzero |
8d5dd220 | 2835 | so apply_change_group must be called upon the outermost return from this |
2836 | function (unless INSN is zero). The result of apply_change_group can | |
2837 | generally be discarded since the changes we are making are optional. */ | |
752df20e | 2838 | |
2839 | static rtx | |
47f1d198 | 2840 | canon_reg (rtx x, rtx_insn *insn) |
752df20e | 2841 | { |
19cb6b50 | 2842 | int i; |
2843 | enum rtx_code code; | |
2844 | const char *fmt; | |
752df20e | 2845 | |
2846 | if (x == 0) | |
2847 | return x; | |
2848 | ||
2849 | code = GET_CODE (x); | |
2850 | switch (code) | |
2851 | { | |
2852 | case PC: | |
2853 | case CC0: | |
2854 | case CONST: | |
0349edce | 2855 | CASE_CONST_ANY: |
752df20e | 2856 | case SYMBOL_REF: |
2857 | case LABEL_REF: | |
2858 | case ADDR_VEC: | |
2859 | case ADDR_DIFF_VEC: | |
2860 | return x; | |
2861 | ||
2862 | case REG: | |
2863 | { | |
19cb6b50 | 2864 | int first; |
2865 | int q; | |
2866 | struct qty_table_elem *ent; | |
752df20e | 2867 | |
2868 | /* Never replace a hard reg, because hard regs can appear | |
2869 | in more than one machine mode, and we must preserve the mode | |
2870 | of each occurrence. Also, some hard regs appear in | |
2871 | MEMs that are shared and mustn't be altered. Don't try to | |
2872 | replace any reg that maps to a reg of class NO_REGS. */ | |
2873 | if (REGNO (x) < FIRST_PSEUDO_REGISTER | |
2874 | || ! REGNO_QTY_VALID_P (REGNO (x))) | |
2875 | return x; | |
2876 | ||
cb10db9d | 2877 | q = REG_QTY (REGNO (x)); |
a7f3b1c7 | 2878 | ent = &qty_table[q]; |
2879 | first = ent->first_reg; | |
752df20e | 2880 | return (first >= FIRST_PSEUDO_REGISTER ? regno_reg_rtx[first] |
2881 | : REGNO_REG_CLASS (first) == NO_REGS ? x | |
a7f3b1c7 | 2882 | : gen_rtx_REG (ent->mode, first)); |
752df20e | 2883 | } |
cb10db9d | 2884 | |
0dbd1c74 | 2885 | default: |
2886 | break; | |
752df20e | 2887 | } |
2888 | ||
2889 | fmt = GET_RTX_FORMAT (code); | |
2890 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
2891 | { | |
19cb6b50 | 2892 | int j; |
752df20e | 2893 | |
2894 | if (fmt[i] == 'e') | |
1cc37766 | 2895 | validate_canon_reg (&XEXP (x, i), insn); |
752df20e | 2896 | else if (fmt[i] == 'E') |
2897 | for (j = 0; j < XVECLEN (x, i); j++) | |
1cc37766 | 2898 | validate_canon_reg (&XVECEXP (x, i, j), insn); |
752df20e | 2899 | } |
2900 | ||
2901 | return x; | |
2902 | } | |
2903 | \f | |
6a8939cc | 2904 | /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison |
2905 | operation (EQ, NE, GT, etc.), follow it back through the hash table and | |
2906 | what values are being compared. | |
9ce37dcf | 2907 | |
6a8939cc | 2908 | *PARG1 and *PARG2 are updated to contain the rtx representing the values |
2909 | actually being compared. For example, if *PARG1 was (cc0) and *PARG2 | |
2910 | was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were | |
2911 | compared to produce cc0. | |
61b1f5a7 | 2912 | |
6a8939cc | 2913 | The return value is the comparison operator and is either the code of |
2914 | A or the code corresponding to the inverse of the comparison. */ | |
752df20e | 2915 | |
af21a202 | 2916 | static enum rtx_code |
8ec3a57b | 2917 | find_comparison_args (enum rtx_code code, rtx *parg1, rtx *parg2, |
3754d046 | 2918 | machine_mode *pmode1, machine_mode *pmode2) |
752df20e | 2919 | { |
af21a202 | 2920 | rtx arg1, arg2; |
431205b7 | 2921 | hash_set<rtx> *visited = NULL; |
7d8df2ae | 2922 | /* Set nonzero when we find something of interest. */ |
2923 | rtx x = NULL; | |
9ce37dcf | 2924 | |
af21a202 | 2925 | arg1 = *parg1, arg2 = *parg2; |
752df20e | 2926 | |
af21a202 | 2927 | /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */ |
752df20e | 2928 | |
af21a202 | 2929 | while (arg2 == CONST0_RTX (GET_MODE (arg1))) |
61b1f5a7 | 2930 | { |
af21a202 | 2931 | int reverse_code = 0; |
2932 | struct table_elt *p = 0; | |
308a5ff6 | 2933 | |
7d8df2ae | 2934 | /* Remember state from previous iteration. */ |
2935 | if (x) | |
2936 | { | |
2937 | if (!visited) | |
431205b7 | 2938 | visited = new hash_set<rtx>; |
2939 | visited->add (x); | |
7d8df2ae | 2940 | x = 0; |
2941 | } | |
2942 | ||
af21a202 | 2943 | /* If arg1 is a COMPARE, extract the comparison arguments from it. |
2944 | On machines with CC0, this is the only case that can occur, since | |
2945 | fold_rtx will return the COMPARE or item being compared with zero | |
2946 | when given CC0. */ | |
308a5ff6 | 2947 | |
af21a202 | 2948 | if (GET_CODE (arg1) == COMPARE && arg2 == const0_rtx) |
2949 | x = arg1; | |
308a5ff6 | 2950 | |
af21a202 | 2951 | /* If ARG1 is a comparison operator and CODE is testing for |
2952 | STORE_FLAG_VALUE, get the inner arguments. */ | |
61b1f5a7 | 2953 | |
6720e96c | 2954 | else if (COMPARISON_P (arg1)) |
752df20e | 2955 | { |
aa870c1b | 2956 | #ifdef FLOAT_STORE_FLAG_VALUE |
2957 | REAL_VALUE_TYPE fsfv; | |
2958 | #endif | |
2959 | ||
af21a202 | 2960 | if (code == NE |
2961 | || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT | |
2962 | && code == LT && STORE_FLAG_VALUE == -1) | |
2963 | #ifdef FLOAT_STORE_FLAG_VALUE | |
95204692 | 2964 | || (SCALAR_FLOAT_MODE_P (GET_MODE (arg1)) |
aa870c1b | 2965 | && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)), |
2966 | REAL_VALUE_NEGATIVE (fsfv))) | |
752df20e | 2967 | #endif |
61b1f5a7 | 2968 | ) |
af21a202 | 2969 | x = arg1; |
2970 | else if (code == EQ | |
2971 | || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT | |
2972 | && code == GE && STORE_FLAG_VALUE == -1) | |
2973 | #ifdef FLOAT_STORE_FLAG_VALUE | |
95204692 | 2974 | || (SCALAR_FLOAT_MODE_P (GET_MODE (arg1)) |
aa870c1b | 2975 | && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)), |
2976 | REAL_VALUE_NEGATIVE (fsfv))) | |
af21a202 | 2977 | #endif |
2978 | ) | |
2979 | x = arg1, reverse_code = 1; | |
752df20e | 2980 | } |
2981 | ||
af21a202 | 2982 | /* ??? We could also check for |
752df20e | 2983 | |
af21a202 | 2984 | (ne (and (eq (...) (const_int 1))) (const_int 0)) |
752df20e | 2985 | |
af21a202 | 2986 | and related forms, but let's wait until we see them occurring. */ |
752df20e | 2987 | |
af21a202 | 2988 | if (x == 0) |
2989 | /* Look up ARG1 in the hash table and see if it has an equivalence | |
2990 | that lets us see what is being compared. */ | |
78d140c9 | 2991 | p = lookup (arg1, SAFE_HASH (arg1, GET_MODE (arg1)), GET_MODE (arg1)); |
cb10db9d | 2992 | if (p) |
e9a91a9e | 2993 | { |
2994 | p = p->first_same_value; | |
2995 | ||
2996 | /* If what we compare is already known to be constant, that is as | |
2997 | good as it gets. | |
2998 | We need to break the loop in this case, because otherwise we | |
2999 | can have an infinite loop when looking at a reg that is known | |
3000 | to be a constant which is the same as a comparison of a reg | |
3001 | against zero which appears later in the insn stream, which in | |
3002 | turn is constant and the same as the comparison of the first reg | |
3003 | against zero... */ | |
3004 | if (p->is_const) | |
3005 | break; | |
3006 | } | |
752df20e | 3007 | |
af21a202 | 3008 | for (; p; p = p->next_same_value) |
752df20e | 3009 | { |
3754d046 | 3010 | machine_mode inner_mode = GET_MODE (p->exp); |
aa870c1b | 3011 | #ifdef FLOAT_STORE_FLAG_VALUE |
3012 | REAL_VALUE_TYPE fsfv; | |
3013 | #endif | |
752df20e | 3014 | |
af21a202 | 3015 | /* If the entry isn't valid, skip it. */ |
78d140c9 | 3016 | if (! exp_equiv_p (p->exp, p->exp, 1, false)) |
af21a202 | 3017 | continue; |
51356f86 | 3018 | |
7d8df2ae | 3019 | /* If it's a comparison we've used before, skip it. */ |
431205b7 | 3020 | if (visited && visited->contains (p->exp)) |
7a49726a | 3021 | continue; |
3022 | ||
6a8939cc | 3023 | if (GET_CODE (p->exp) == COMPARE |
3024 | /* Another possibility is that this machine has a compare insn | |
3025 | that includes the comparison code. In that case, ARG1 would | |
3026 | be equivalent to a comparison operation that would set ARG1 to | |
3027 | either STORE_FLAG_VALUE or zero. If this is an NE operation, | |
3028 | ORIG_CODE is the actual comparison being done; if it is an EQ, | |
3029 | we must reverse ORIG_CODE. On machine with a negative value | |
3030 | for STORE_FLAG_VALUE, also look at LT and GE operations. */ | |
3031 | || ((code == NE | |
3032 | || (code == LT | |
f92430e0 | 3033 | && val_signbit_known_set_p (inner_mode, |
3034 | STORE_FLAG_VALUE)) | |
af21a202 | 3035 | #ifdef FLOAT_STORE_FLAG_VALUE |
6a8939cc | 3036 | || (code == LT |
cee7491d | 3037 | && SCALAR_FLOAT_MODE_P (inner_mode) |
aa870c1b | 3038 | && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)), |
3039 | REAL_VALUE_NEGATIVE (fsfv))) | |
af21a202 | 3040 | #endif |
6a8939cc | 3041 | ) |
6720e96c | 3042 | && COMPARISON_P (p->exp))) |
752df20e | 3043 | { |
af21a202 | 3044 | x = p->exp; |
3045 | break; | |
3046 | } | |
3047 | else if ((code == EQ | |
3048 | || (code == GE | |
f92430e0 | 3049 | && val_signbit_known_set_p (inner_mode, |
3050 | STORE_FLAG_VALUE)) | |
af21a202 | 3051 | #ifdef FLOAT_STORE_FLAG_VALUE |
3052 | || (code == GE | |
cee7491d | 3053 | && SCALAR_FLOAT_MODE_P (inner_mode) |
aa870c1b | 3054 | && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)), |
3055 | REAL_VALUE_NEGATIVE (fsfv))) | |
af21a202 | 3056 | #endif |
3057 | ) | |
6720e96c | 3058 | && COMPARISON_P (p->exp)) |
af21a202 | 3059 | { |
3060 | reverse_code = 1; | |
3061 | x = p->exp; | |
3062 | break; | |
752df20e | 3063 | } |
3064 | ||
805e22b2 | 3065 | /* If this non-trapping address, e.g. fp + constant, the |
3066 | equivalent is a better operand since it may let us predict | |
3067 | the value of the comparison. */ | |
3068 | else if (!rtx_addr_can_trap_p (p->exp)) | |
af21a202 | 3069 | { |
3070 | arg1 = p->exp; | |
3071 | continue; | |
3072 | } | |
752df20e | 3073 | } |
752df20e | 3074 | |
af21a202 | 3075 | /* If we didn't find a useful equivalence for ARG1, we are done. |
3076 | Otherwise, set up for the next iteration. */ | |
3077 | if (x == 0) | |
3078 | break; | |
752df20e | 3079 | |
47ae02b7 | 3080 | /* If we need to reverse the comparison, make sure that is |
6d1304b6 | 3081 | possible -- we can't necessarily infer the value of GE from LT |
3082 | with floating-point operands. */ | |
af21a202 | 3083 | if (reverse_code) |
7da6ea0c | 3084 | { |
4066f31e | 3085 | enum rtx_code reversed = reversed_comparison_code (x, NULL); |
7da6ea0c | 3086 | if (reversed == UNKNOWN) |
3087 | break; | |
d4c5e26d | 3088 | else |
3089 | code = reversed; | |
7da6ea0c | 3090 | } |
6720e96c | 3091 | else if (COMPARISON_P (x)) |
7da6ea0c | 3092 | code = GET_CODE (x); |
3093 | arg1 = XEXP (x, 0), arg2 = XEXP (x, 1); | |
752df20e | 3094 | } |
3095 | ||
af21a202 | 3096 | /* Return our results. Return the modes from before fold_rtx |
3097 | because fold_rtx might produce const_int, and then it's too late. */ | |
3098 | *pmode1 = GET_MODE (arg1), *pmode2 = GET_MODE (arg2); | |
3099 | *parg1 = fold_rtx (arg1, 0), *parg2 = fold_rtx (arg2, 0); | |
3100 | ||
7d8df2ae | 3101 | if (visited) |
431205b7 | 3102 | delete visited; |
af21a202 | 3103 | return code; |
752df20e | 3104 | } |
3105 | \f | |
42a3a38b | 3106 | /* If X is a nontrivial arithmetic operation on an argument for which |
3107 | a constant value can be determined, return the result of operating | |
3108 | on that value, as a constant. Otherwise, return X, possibly with | |
3109 | one or more operands changed to a forward-propagated constant. | |
18b14db6 | 3110 | |
42a3a38b | 3111 | If X is a register whose contents are known, we do NOT return |
3112 | those contents here; equiv_constant is called to perform that task. | |
3113 | For SUBREGs and MEMs, we do that both here and in equiv_constant. | |
752df20e | 3114 | |
3115 | INSN is the insn that we may be modifying. If it is 0, make a copy | |
3116 | of X before modifying it. */ | |
3117 | ||
3118 | static rtx | |
47f1d198 | 3119 | fold_rtx (rtx x, rtx_insn *insn) |
752df20e | 3120 | { |
19cb6b50 | 3121 | enum rtx_code code; |
3754d046 | 3122 | machine_mode mode; |
19cb6b50 | 3123 | const char *fmt; |
3124 | int i; | |
d328ebdf | 3125 | rtx new_rtx = 0; |
42a3a38b | 3126 | int changed = 0; |
7e3747b0 | 3127 | poly_int64 xval; |
752df20e | 3128 | |
42a3a38b | 3129 | /* Operands of X. */ |
a561ec10 | 3130 | /* Workaround -Wmaybe-uninitialized false positive during |
3131 | profiledbootstrap by initializing them. */ | |
3132 | rtx folded_arg0 = NULL_RTX; | |
3133 | rtx folded_arg1 = NULL_RTX; | |
752df20e | 3134 | |
3135 | /* Constant equivalents of first three operands of X; | |
3136 | 0 when no such equivalent is known. */ | |
3137 | rtx const_arg0; | |
3138 | rtx const_arg1; | |
3139 | rtx const_arg2; | |
3140 | ||
3141 | /* The mode of the first operand of X. We need this for sign and zero | |
3142 | extends. */ | |
3754d046 | 3143 | machine_mode mode_arg0; |
752df20e | 3144 | |
3145 | if (x == 0) | |
3146 | return x; | |
3147 | ||
42a3a38b | 3148 | /* Try to perform some initial simplifications on X. */ |
752df20e | 3149 | code = GET_CODE (x); |
3150 | switch (code) | |
3151 | { | |
42a3a38b | 3152 | case MEM: |
3153 | case SUBREG: | |
b803a3c1 | 3154 | /* The first operand of a SIGN/ZERO_EXTRACT has a different meaning |
3155 | than it would in other contexts. Basically its mode does not | |
3156 | signify the size of the object read. That information is carried | |
3157 | by size operand. If we happen to have a MEM of the appropriate | |
3158 | mode in our tables with a constant value we could simplify the | |
3159 | extraction incorrectly if we allowed substitution of that value | |
3160 | for the MEM. */ | |
3161 | case ZERO_EXTRACT: | |
3162 | case SIGN_EXTRACT: | |
d328ebdf | 3163 | if ((new_rtx = equiv_constant (x)) != NULL_RTX) |
3164 | return new_rtx; | |
42a3a38b | 3165 | return x; |
3166 | ||
752df20e | 3167 | case CONST: |
0349edce | 3168 | CASE_CONST_ANY: |
752df20e | 3169 | case SYMBOL_REF: |
3170 | case LABEL_REF: | |
3171 | case REG: | |
97108156 | 3172 | case PC: |
752df20e | 3173 | /* No use simplifying an EXPR_LIST |
3174 | since they are used only for lists of args | |
3175 | in a function call's REG_EQUAL note. */ | |
3176 | case EXPR_LIST: | |
3177 | return x; | |
3178 | ||
752df20e | 3179 | case CC0: |
3180 | return prev_insn_cc0; | |
752df20e | 3181 | |
c97a7837 | 3182 | case ASM_OPERANDS: |
d239a9ad | 3183 | if (insn) |
3184 | { | |
3185 | for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--) | |
3186 | validate_change (insn, &ASM_OPERANDS_INPUT (x, i), | |
3187 | fold_rtx (ASM_OPERANDS_INPUT (x, i), insn), 0); | |
3188 | } | |
42a3a38b | 3189 | return x; |
3190 | ||
42a3a38b | 3191 | case CALL: |
93516111 | 3192 | if (NO_FUNCTION_CSE && CONSTANT_P (XEXP (XEXP (x, 0), 0))) |
42a3a38b | 3193 | return x; |
c97a7837 | 3194 | break; |
cb10db9d | 3195 | |
42a3a38b | 3196 | /* Anything else goes through the loop below. */ |
0dbd1c74 | 3197 | default: |
3198 | break; | |
752df20e | 3199 | } |
3200 | ||
42a3a38b | 3201 | mode = GET_MODE (x); |
752df20e | 3202 | const_arg0 = 0; |
3203 | const_arg1 = 0; | |
3204 | const_arg2 = 0; | |
3205 | mode_arg0 = VOIDmode; | |
3206 | ||
3207 | /* Try folding our operands. | |
3208 | Then see which ones have constant values known. */ | |
3209 | ||
3210 | fmt = GET_RTX_FORMAT (code); | |
3211 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
3212 | if (fmt[i] == 'e') | |
3213 | { | |
42a3a38b | 3214 | rtx folded_arg = XEXP (x, i), const_arg; |
3754d046 | 3215 | machine_mode mode_arg = GET_MODE (folded_arg); |
06320855 | 3216 | |
3217 | switch (GET_CODE (folded_arg)) | |
3218 | { | |
3219 | case MEM: | |
3220 | case REG: | |
3221 | case SUBREG: | |
3222 | const_arg = equiv_constant (folded_arg); | |
3223 | break; | |
3224 | ||
3225 | case CONST: | |
0349edce | 3226 | CASE_CONST_ANY: |
06320855 | 3227 | case SYMBOL_REF: |
3228 | case LABEL_REF: | |
06320855 | 3229 | const_arg = folded_arg; |
3230 | break; | |
3231 | ||
06320855 | 3232 | case CC0: |
77cb85b2 | 3233 | /* The cc0-user and cc0-setter may be in different blocks if |
3234 | the cc0-setter potentially traps. In that case PREV_INSN_CC0 | |
3235 | will have been cleared as we exited the block with the | |
3236 | setter. | |
3237 | ||
3238 | While we could potentially track cc0 in this case, it just | |
3239 | doesn't seem to be worth it given that cc0 targets are not | |
3240 | terribly common or important these days and trapping math | |
3241 | is rarely used. The combination of those two conditions | |
3242 | necessary to trip this situation is exceedingly rare in the | |
3243 | real world. */ | |
3244 | if (!prev_insn_cc0) | |
3245 | { | |
3246 | const_arg = NULL_RTX; | |
3247 | } | |
3248 | else | |
3249 | { | |
3250 | folded_arg = prev_insn_cc0; | |
3251 | mode_arg = prev_insn_cc0_mode; | |
3252 | const_arg = equiv_constant (folded_arg); | |
3253 | } | |
06320855 | 3254 | break; |
06320855 | 3255 | |
3256 | default: | |
3257 | folded_arg = fold_rtx (folded_arg, insn); | |
3258 | const_arg = equiv_constant (folded_arg); | |
3259 | break; | |
3260 | } | |
752df20e | 3261 | |
3262 | /* For the first three operands, see if the operand | |
3263 | is constant or equivalent to a constant. */ | |
3264 | switch (i) | |
3265 | { | |
3266 | case 0: | |
3267 | folded_arg0 = folded_arg; | |
3268 | const_arg0 = const_arg; | |
3269 | mode_arg0 = mode_arg; | |
3270 | break; | |
3271 | case 1: | |
3272 | folded_arg1 = folded_arg; | |
3273 | const_arg1 = const_arg; | |
3274 | break; | |
3275 | case 2: | |
3276 | const_arg2 = const_arg; | |
3277 | break; | |
3278 | } | |
3279 | ||
42a3a38b | 3280 | /* Pick the least expensive of the argument and an equivalent constant |
3281 | argument. */ | |
3282 | if (const_arg != 0 | |
3283 | && const_arg != folded_arg | |
5ae4887d | 3284 | && (COST_IN (const_arg, mode_arg, code, i) |
3285 | <= COST_IN (folded_arg, mode_arg, code, i)) | |
f35e401c | 3286 | |
8f1e01cb | 3287 | /* It's not safe to substitute the operand of a conversion |
3288 | operator with a constant, as the conversion's identity | |
fe24f256 | 3289 | depends upon the mode of its operand. This optimization |
8f1e01cb | 3290 | is handled by the call to simplify_unary_operation. */ |
42a3a38b | 3291 | && (GET_RTX_CLASS (code) != RTX_UNARY |
3292 | || GET_MODE (const_arg) == mode_arg0 | |
3293 | || (code != ZERO_EXTEND | |
3294 | && code != SIGN_EXTEND | |
3295 | && code != TRUNCATE | |
3296 | && code != FLOAT_TRUNCATE | |
3297 | && code != FLOAT_EXTEND | |
3298 | && code != FLOAT | |
3299 | && code != FIX | |
3300 | && code != UNSIGNED_FLOAT | |
3301 | && code != UNSIGNED_FIX))) | |
3302 | folded_arg = const_arg; | |
3303 | ||
3304 | if (folded_arg == XEXP (x, i)) | |
3305 | continue; | |
752df20e | 3306 | |
42a3a38b | 3307 | if (insn == NULL_RTX && !changed) |
3308 | x = copy_rtx (x); | |
3309 | changed = 1; | |
4f34fbd6 | 3310 | validate_unshare_change (insn, &XEXP (x, i), folded_arg, 1); |
c08e043f | 3311 | } |
752df20e | 3312 | |
42a3a38b | 3313 | if (changed) |
752df20e | 3314 | { |
42a3a38b | 3315 | /* Canonicalize X if necessary, and keep const_argN and folded_argN |
3316 | consistent with the order in X. */ | |
3317 | if (canonicalize_change_group (insn, x)) | |
752df20e | 3318 | { |
c586a5e3 | 3319 | std::swap (const_arg0, const_arg1); |
3320 | std::swap (folded_arg0, folded_arg1); | |
752df20e | 3321 | } |
42a3a38b | 3322 | |
3323 | apply_change_group (); | |
752df20e | 3324 | } |
3325 | ||
3326 | /* If X is an arithmetic operation, see if we can simplify it. */ | |
3327 | ||
3328 | switch (GET_RTX_CLASS (code)) | |
3329 | { | |
6720e96c | 3330 | case RTX_UNARY: |
528b0df8 | 3331 | { |
528b0df8 | 3332 | /* We can't simplify extension ops unless we know the |
3333 | original mode. */ | |
3334 | if ((code == ZERO_EXTEND || code == SIGN_EXTEND) | |
3335 | && mode_arg0 == VOIDmode) | |
3336 | break; | |
3337 | ||
d328ebdf | 3338 | new_rtx = simplify_unary_operation (code, mode, |
2bde5b8e | 3339 | const_arg0 ? const_arg0 : folded_arg0, |
3340 | mode_arg0); | |
528b0df8 | 3341 | } |
752df20e | 3342 | break; |
cb10db9d | 3343 | |
6720e96c | 3344 | case RTX_COMPARE: |
3345 | case RTX_COMM_COMPARE: | |
752df20e | 3346 | /* See what items are actually being compared and set FOLDED_ARG[01] |
3347 | to those values and CODE to the actual comparison code. If any are | |
3348 | constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't | |
3349 | do anything if both operands are already known to be constant. */ | |
3350 | ||
5b2d8298 | 3351 | /* ??? Vector mode comparisons are not supported yet. */ |
3352 | if (VECTOR_MODE_P (mode)) | |
3353 | break; | |
3354 | ||
752df20e | 3355 | if (const_arg0 == 0 || const_arg1 == 0) |
3356 | { | |
3357 | struct table_elt *p0, *p1; | |
ecb6ee6d | 3358 | rtx true_rtx, false_rtx; |
3754d046 | 3359 | machine_mode mode_arg1; |
50cf1c21 | 3360 | |
95204692 | 3361 | if (SCALAR_FLOAT_MODE_P (mode)) |
50cf1c21 | 3362 | { |
ecb6ee6d | 3363 | #ifdef FLOAT_STORE_FLAG_VALUE |
d5f9611d | 3364 | true_rtx = (const_double_from_real_value |
d4c5e26d | 3365 | (FLOAT_STORE_FLAG_VALUE (mode), mode)); |
ecb6ee6d | 3366 | #else |
3367 | true_rtx = NULL_RTX; | |
3368 | #endif | |
9c811526 | 3369 | false_rtx = CONST0_RTX (mode); |
50cf1c21 | 3370 | } |
ecb6ee6d | 3371 | else |
3372 | { | |
3373 | true_rtx = const_true_rtx; | |
3374 | false_rtx = const0_rtx; | |
3375 | } | |
752df20e | 3376 | |
5c4c31e3 | 3377 | code = find_comparison_args (code, &folded_arg0, &folded_arg1, |
3378 | &mode_arg0, &mode_arg1); | |
752df20e | 3379 | |
5c4c31e3 | 3380 | /* If the mode is VOIDmode or a MODE_CC mode, we don't know |
3381 | what kinds of things are being compared, so we can't do | |
3382 | anything with this comparison. */ | |
752df20e | 3383 | |
3384 | if (mode_arg0 == VOIDmode || GET_MODE_CLASS (mode_arg0) == MODE_CC) | |
3385 | break; | |
3386 | ||
58a1adea | 3387 | const_arg0 = equiv_constant (folded_arg0); |
3388 | const_arg1 = equiv_constant (folded_arg1); | |
3389 | ||
a92771b8 | 3390 | /* If we do not now have two constants being compared, see |
3391 | if we can nevertheless deduce some things about the | |
3392 | comparison. */ | |
752df20e | 3393 | if (const_arg0 == 0 || const_arg1 == 0) |
3394 | { | |
9d3874a6 | 3395 | if (const_arg1 != NULL) |
3396 | { | |
3397 | rtx cheapest_simplification; | |
3398 | int cheapest_cost; | |
3399 | rtx simp_result; | |
3400 | struct table_elt *p; | |
3401 | ||
3402 | /* See if we can find an equivalent of folded_arg0 | |
3403 | that gets us a cheaper expression, possibly a | |
3404 | constant through simplifications. */ | |
3405 | p = lookup (folded_arg0, SAFE_HASH (folded_arg0, mode_arg0), | |
3406 | mode_arg0); | |
48e1416a | 3407 | |
9d3874a6 | 3408 | if (p != NULL) |
3409 | { | |
3410 | cheapest_simplification = x; | |
5ae4887d | 3411 | cheapest_cost = COST (x, mode); |
9d3874a6 | 3412 | |
3413 | for (p = p->first_same_value; p != NULL; p = p->next_same_value) | |
3414 | { | |
3415 | int cost; | |
3416 | ||
3417 | /* If the entry isn't valid, skip it. */ | |
3418 | if (! exp_equiv_p (p->exp, p->exp, 1, false)) | |
3419 | continue; | |
3420 | ||
3421 | /* Try to simplify using this equivalence. */ | |
3422 | simp_result | |
3423 | = simplify_relational_operation (code, mode, | |
3424 | mode_arg0, | |
3425 | p->exp, | |
3426 | const_arg1); | |
3427 | ||
3428 | if (simp_result == NULL) | |
3429 | continue; | |
3430 | ||
5ae4887d | 3431 | cost = COST (simp_result, mode); |
9d3874a6 | 3432 | if (cost < cheapest_cost) |
3433 | { | |
3434 | cheapest_cost = cost; | |
3435 | cheapest_simplification = simp_result; | |
3436 | } | |
3437 | } | |
3438 | ||
3439 | /* If we have a cheaper expression now, use that | |
3440 | and try folding it further, from the top. */ | |
3441 | if (cheapest_simplification != x) | |
045ed337 | 3442 | return fold_rtx (copy_rtx (cheapest_simplification), |
3443 | insn); | |
9d3874a6 | 3444 | } |
3445 | } | |
3446 | ||
03a563f6 | 3447 | /* See if the two operands are the same. */ |
3448 | ||
3bac3cce | 3449 | if ((REG_P (folded_arg0) |
3450 | && REG_P (folded_arg1) | |
3451 | && (REG_QTY (REGNO (folded_arg0)) | |
3452 | == REG_QTY (REGNO (folded_arg1)))) | |
03a563f6 | 3453 | || ((p0 = lookup (folded_arg0, |
78d140c9 | 3454 | SAFE_HASH (folded_arg0, mode_arg0), |
3455 | mode_arg0)) | |
03a563f6 | 3456 | && (p1 = lookup (folded_arg1, |
78d140c9 | 3457 | SAFE_HASH (folded_arg1, mode_arg0), |
3458 | mode_arg0)) | |
03a563f6 | 3459 | && p0->first_same_value == p1->first_same_value)) |
3bac3cce | 3460 | folded_arg1 = folded_arg0; |
752df20e | 3461 | |
3462 | /* If FOLDED_ARG0 is a register, see if the comparison we are | |
3463 | doing now is either the same as we did before or the reverse | |
3464 | (we only check the reverse if not floating-point). */ | |
8ad4c111 | 3465 | else if (REG_P (folded_arg0)) |
752df20e | 3466 | { |
d1264606 | 3467 | int qty = REG_QTY (REGNO (folded_arg0)); |
752df20e | 3468 | |
a7f3b1c7 | 3469 | if (REGNO_QTY_VALID_P (REGNO (folded_arg0))) |
3470 | { | |
3471 | struct qty_table_elem *ent = &qty_table[qty]; | |
3472 | ||
3473 | if ((comparison_dominates_p (ent->comparison_code, code) | |
a4110d9a | 3474 | || (! FLOAT_MODE_P (mode_arg0) |
3475 | && comparison_dominates_p (ent->comparison_code, | |
3476 | reverse_condition (code)))) | |
a7f3b1c7 | 3477 | && (rtx_equal_p (ent->comparison_const, folded_arg1) |
3478 | || (const_arg1 | |
3479 | && rtx_equal_p (ent->comparison_const, | |
3480 | const_arg1)) | |
8ad4c111 | 3481 | || (REG_P (folded_arg1) |
a7f3b1c7 | 3482 | && (REG_QTY (REGNO (folded_arg1)) == ent->comparison_qty)))) |
ecb6ee6d | 3483 | { |
3484 | if (comparison_dominates_p (ent->comparison_code, code)) | |
3485 | { | |
3486 | if (true_rtx) | |
3487 | return true_rtx; | |
3488 | else | |
3489 | break; | |
3490 | } | |
3491 | else | |
3492 | return false_rtx; | |
3493 | } | |
a7f3b1c7 | 3494 | } |
752df20e | 3495 | } |
3496 | } | |
3497 | } | |
3498 | ||
3499 | /* If we are comparing against zero, see if the first operand is | |
3500 | equivalent to an IOR with a constant. If so, we may be able to | |
3501 | determine the result of this comparison. */ | |
3bac3cce | 3502 | if (const_arg1 == const0_rtx && !const_arg0) |
752df20e | 3503 | { |
3504 | rtx y = lookup_as_function (folded_arg0, IOR); | |
3505 | rtx inner_const; | |
3506 | ||
3507 | if (y != 0 | |
3508 | && (inner_const = equiv_constant (XEXP (y, 1))) != 0 | |
971ba038 | 3509 | && CONST_INT_P (inner_const) |
752df20e | 3510 | && INTVAL (inner_const) != 0) |
3bac3cce | 3511 | folded_arg0 = gen_rtx_IOR (mode_arg0, XEXP (y, 0), inner_const); |
752df20e | 3512 | } |
3513 | ||
ac503e50 | 3514 | { |
b9b50b55 | 3515 | rtx op0 = const_arg0 ? const_arg0 : copy_rtx (folded_arg0); |
3516 | rtx op1 = const_arg1 ? const_arg1 : copy_rtx (folded_arg1); | |
3517 | new_rtx = simplify_relational_operation (code, mode, mode_arg0, | |
3518 | op0, op1); | |
ac503e50 | 3519 | } |
752df20e | 3520 | break; |
3521 | ||
6720e96c | 3522 | case RTX_BIN_ARITH: |
3523 | case RTX_COMM_ARITH: | |
752df20e | 3524 | switch (code) |
3525 | { | |
3526 | case PLUS: | |
3527 | /* If the second operand is a LABEL_REF, see if the first is a MINUS | |
3528 | with that LABEL_REF as its second operand. If so, the result is | |
3529 | the first operand of that MINUS. This handles switches with an | |
3530 | ADDR_DIFF_VEC table. */ | |
3531 | if (const_arg1 && GET_CODE (const_arg1) == LABEL_REF) | |
3532 | { | |
e6d1f05b | 3533 | rtx y |
3534 | = GET_CODE (folded_arg0) == MINUS ? folded_arg0 | |
b74befc5 | 3535 | : lookup_as_function (folded_arg0, MINUS); |
752df20e | 3536 | |
3537 | if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF | |
c7799456 | 3538 | && label_ref_label (XEXP (y, 1)) == label_ref_label (const_arg1)) |
752df20e | 3539 | return XEXP (y, 0); |
528b0df8 | 3540 | |
3541 | /* Now try for a CONST of a MINUS like the above. */ | |
e6d1f05b | 3542 | if ((y = (GET_CODE (folded_arg0) == CONST ? folded_arg0 |
3543 | : lookup_as_function (folded_arg0, CONST))) != 0 | |
528b0df8 | 3544 | && GET_CODE (XEXP (y, 0)) == MINUS |
3545 | && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF | |
c7799456 | 3546 | && label_ref_label (XEXP (XEXP (y, 0), 1)) == label_ref_label (const_arg1)) |
528b0df8 | 3547 | return XEXP (XEXP (y, 0), 0); |
752df20e | 3548 | } |
f7cf73ed | 3549 | |
e6d1f05b | 3550 | /* Likewise if the operands are in the other order. */ |
3551 | if (const_arg0 && GET_CODE (const_arg0) == LABEL_REF) | |
3552 | { | |
3553 | rtx y | |
3554 | = GET_CODE (folded_arg1) == MINUS ? folded_arg1 | |
b74befc5 | 3555 | : lookup_as_function (folded_arg1, MINUS); |
e6d1f05b | 3556 | |
3557 | if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF | |
c7799456 | 3558 | && label_ref_label (XEXP (y, 1)) == label_ref_label (const_arg0)) |
e6d1f05b | 3559 | return XEXP (y, 0); |
3560 | ||
3561 | /* Now try for a CONST of a MINUS like the above. */ | |
3562 | if ((y = (GET_CODE (folded_arg1) == CONST ? folded_arg1 | |
3563 | : lookup_as_function (folded_arg1, CONST))) != 0 | |
3564 | && GET_CODE (XEXP (y, 0)) == MINUS | |
3565 | && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF | |
c7799456 | 3566 | && label_ref_label (XEXP (XEXP (y, 0), 1)) == label_ref_label (const_arg0)) |
e6d1f05b | 3567 | return XEXP (XEXP (y, 0), 0); |
3568 | } | |
3569 | ||
f7cf73ed | 3570 | /* If second operand is a register equivalent to a negative |
3571 | CONST_INT, see if we can find a register equivalent to the | |
3572 | positive constant. Make a MINUS if so. Don't do this for | |
337bf63c | 3573 | a non-negative constant since we might then alternate between |
3fb1e43b | 3574 | choosing positive and negative constants. Having the positive |
337bf63c | 3575 | constant previously-used is the more common case. Be sure |
3576 | the resulting constant is non-negative; if const_arg1 were | |
3577 | the smallest negative number this would overflow: depending | |
3578 | on the mode, this would either just be the same value (and | |
3579 | hence not save anything) or be incorrect. */ | |
971ba038 | 3580 | if (const_arg1 != 0 && CONST_INT_P (const_arg1) |
337bf63c | 3581 | && INTVAL (const_arg1) < 0 |
aaa2446c | 3582 | /* This used to test |
3583 | ||
b74befc5 | 3584 | -INTVAL (const_arg1) >= 0 |
aaa2446c | 3585 | |
3586 | But The Sun V5.0 compilers mis-compiled that test. So | |
3587 | instead we test for the problematic value in a more direct | |
3588 | manner and hope the Sun compilers get it correct. */ | |
76d98649 | 3589 | && INTVAL (const_arg1) != |
edc19fd0 | 3590 | (HOST_WIDE_INT_1 << (HOST_BITS_PER_WIDE_INT - 1)) |
8ad4c111 | 3591 | && REG_P (folded_arg1)) |
f7cf73ed | 3592 | { |
b74befc5 | 3593 | rtx new_const = GEN_INT (-INTVAL (const_arg1)); |
f7cf73ed | 3594 | struct table_elt *p |
78d140c9 | 3595 | = lookup (new_const, SAFE_HASH (new_const, mode), mode); |
f7cf73ed | 3596 | |
3597 | if (p) | |
3598 | for (p = p->first_same_value; p; p = p->next_same_value) | |
8ad4c111 | 3599 | if (REG_P (p->exp)) |
af21a202 | 3600 | return simplify_gen_binary (MINUS, mode, folded_arg0, |
47f1d198 | 3601 | canon_reg (p->exp, NULL)); |
f7cf73ed | 3602 | } |
5c4c31e3 | 3603 | goto from_plus; |
3604 | ||
3605 | case MINUS: | |
3606 | /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2). | |
3607 | If so, produce (PLUS Z C2-C). */ | |
7e3747b0 | 3608 | if (const_arg1 != 0 && poly_int_rtx_p (const_arg1, &xval)) |
5c4c31e3 | 3609 | { |
3610 | rtx y = lookup_as_function (XEXP (x, 0), PLUS); | |
7e3747b0 | 3611 | if (y && poly_int_rtx_p (XEXP (y, 1))) |
3612 | return fold_rtx (plus_constant (mode, copy_rtx (y), -xval), | |
47f1d198 | 3613 | NULL); |
5c4c31e3 | 3614 | } |
752df20e | 3615 | |
b74befc5 | 3616 | /* Fall through. */ |
752df20e | 3617 | |
5c4c31e3 | 3618 | from_plus: |
752df20e | 3619 | case SMIN: case SMAX: case UMIN: case UMAX: |
3620 | case IOR: case AND: case XOR: | |
7a4fa2a1 | 3621 | case MULT: |
752df20e | 3622 | case ASHIFT: case LSHIFTRT: case ASHIFTRT: |
3623 | /* If we have (<op> <reg> <const_int>) for an associative OP and REG | |
3624 | is known to be of similar form, we may be able to replace the | |
3625 | operation with a combined operation. This may eliminate the | |
3626 | intermediate operation if every use is simplified in this way. | |
3627 | Note that the similar optimization done by combine.c only works | |
3628 | if the intermediate operation's result has only one reference. */ | |
3629 | ||
8ad4c111 | 3630 | if (REG_P (folded_arg0) |
971ba038 | 3631 | && const_arg1 && CONST_INT_P (const_arg1)) |
752df20e | 3632 | { |
3633 | int is_shift | |
3634 | = (code == ASHIFT || code == ASHIFTRT || code == LSHIFTRT); | |
8f353ea8 | 3635 | rtx y, inner_const, new_const; |
6026d749 | 3636 | rtx canon_const_arg1 = const_arg1; |
752df20e | 3637 | enum rtx_code associate_code; |
752df20e | 3638 | |
0518a465 | 3639 | if (is_shift |
1048c155 | 3640 | && (INTVAL (const_arg1) >= GET_MODE_UNIT_PRECISION (mode) |
0518a465 | 3641 | || INTVAL (const_arg1) < 0)) |
3642 | { | |
3643 | if (SHIFT_COUNT_TRUNCATED) | |
bd39703a | 3644 | canon_const_arg1 = gen_int_shift_amount |
3645 | (mode, (INTVAL (const_arg1) | |
3646 | & (GET_MODE_UNIT_BITSIZE (mode) - 1))); | |
0518a465 | 3647 | else |
3648 | break; | |
3649 | } | |
3650 | ||
8f353ea8 | 3651 | y = lookup_as_function (folded_arg0, code); |
0518a465 | 3652 | if (y == 0) |
3653 | break; | |
0518a465 | 3654 | |
3655 | /* If we have compiled a statement like | |
3656 | "if (x == (x & mask1))", and now are looking at | |
3657 | "x & mask2", we will have a case where the first operand | |
3658 | of Y is the same as our first operand. Unless we detect | |
3659 | this case, an infinite loop will result. */ | |
3660 | if (XEXP (y, 0) == folded_arg0) | |
752df20e | 3661 | break; |
3662 | ||
8f353ea8 | 3663 | inner_const = equiv_constant (fold_rtx (XEXP (y, 1), 0)); |
971ba038 | 3664 | if (!inner_const || !CONST_INT_P (inner_const)) |
8f353ea8 | 3665 | break; |
3666 | ||
752df20e | 3667 | /* Don't associate these operations if they are a PLUS with the |
3668 | same constant and it is a power of two. These might be doable | |
3669 | with a pre- or post-increment. Similarly for two subtracts of | |
3670 | identical powers of two with post decrement. */ | |
3671 | ||
9cae6d48 | 3672 | if (code == PLUS && const_arg1 == inner_const |
e4e498cf | 3673 | && ((HAVE_PRE_INCREMENT |
ac29ece2 | 3674 | && pow2p_hwi (INTVAL (const_arg1))) |
e4e498cf | 3675 | || (HAVE_POST_INCREMENT |
ac29ece2 | 3676 | && pow2p_hwi (INTVAL (const_arg1))) |
e4e498cf | 3677 | || (HAVE_PRE_DECREMENT |
ac29ece2 | 3678 | && pow2p_hwi (- INTVAL (const_arg1))) |
e4e498cf | 3679 | || (HAVE_POST_DECREMENT |
ac29ece2 | 3680 | && pow2p_hwi (- INTVAL (const_arg1))))) |
752df20e | 3681 | break; |
3682 | ||
e7323ddd | 3683 | /* ??? Vector mode shifts by scalar |
3684 | shift operand are not supported yet. */ | |
3685 | if (is_shift && VECTOR_MODE_P (mode)) | |
3686 | break; | |
3687 | ||
0518a465 | 3688 | if (is_shift |
1048c155 | 3689 | && (INTVAL (inner_const) >= GET_MODE_UNIT_PRECISION (mode) |
0518a465 | 3690 | || INTVAL (inner_const) < 0)) |
3691 | { | |
3692 | if (SHIFT_COUNT_TRUNCATED) | |
bd39703a | 3693 | inner_const = gen_int_shift_amount |
3694 | (mode, (INTVAL (inner_const) | |
3695 | & (GET_MODE_UNIT_BITSIZE (mode) - 1))); | |
0518a465 | 3696 | else |
3697 | break; | |
3698 | } | |
3699 | ||
752df20e | 3700 | /* Compute the code used to compose the constants. For example, |
7a4fa2a1 | 3701 | A-C1-C2 is A-(C1 + C2), so if CODE == MINUS, we want PLUS. */ |
752df20e | 3702 | |
7a4fa2a1 | 3703 | associate_code = (is_shift || code == MINUS ? PLUS : code); |
752df20e | 3704 | |
3705 | new_const = simplify_binary_operation (associate_code, mode, | |
6026d749 | 3706 | canon_const_arg1, |
3707 | inner_const); | |
752df20e | 3708 | |
3709 | if (new_const == 0) | |
3710 | break; | |
3711 | ||
3712 | /* If we are associating shift operations, don't let this | |
94ad8c53 | 3713 | produce a shift of the size of the object or larger. |
3714 | This could occur when we follow a sign-extend by a right | |
3715 | shift on a machine that does a sign-extend as a pair | |
3716 | of shifts. */ | |
752df20e | 3717 | |
0518a465 | 3718 | if (is_shift |
971ba038 | 3719 | && CONST_INT_P (new_const) |
1048c155 | 3720 | && INTVAL (new_const) >= GET_MODE_UNIT_PRECISION (mode)) |
94ad8c53 | 3721 | { |
3722 | /* As an exception, we can turn an ASHIFTRT of this | |
3723 | form into a shift of the number of bits - 1. */ | |
3724 | if (code == ASHIFTRT) | |
bd39703a | 3725 | new_const = gen_int_shift_amount |
3726 | (mode, GET_MODE_UNIT_BITSIZE (mode) - 1); | |
0518a465 | 3727 | else if (!side_effects_p (XEXP (y, 0))) |
3728 | return CONST0_RTX (mode); | |
94ad8c53 | 3729 | else |
3730 | break; | |
3731 | } | |
752df20e | 3732 | |
3733 | y = copy_rtx (XEXP (y, 0)); | |
3734 | ||
3735 | /* If Y contains our first operand (the most common way this | |
3736 | can happen is if Y is a MEM), we would do into an infinite | |
3737 | loop if we tried to fold it. So don't in that case. */ | |
3738 | ||
3739 | if (! reg_mentioned_p (folded_arg0, y)) | |
3740 | y = fold_rtx (y, insn); | |
3741 | ||
af21a202 | 3742 | return simplify_gen_binary (code, mode, y, new_const); |
752df20e | 3743 | } |
0dbd1c74 | 3744 | break; |
3745 | ||
7a4fa2a1 | 3746 | case DIV: case UDIV: |
3747 | /* ??? The associative optimization performed immediately above is | |
3748 | also possible for DIV and UDIV using associate_code of MULT. | |
3749 | However, we would need extra code to verify that the | |
3750 | multiplication does not overflow, that is, there is no overflow | |
3751 | in the calculation of new_const. */ | |
3752 | break; | |
3753 | ||
0dbd1c74 | 3754 | default: |
3755 | break; | |
752df20e | 3756 | } |
3757 | ||
d328ebdf | 3758 | new_rtx = simplify_binary_operation (code, mode, |
752df20e | 3759 | const_arg0 ? const_arg0 : folded_arg0, |
3760 | const_arg1 ? const_arg1 : folded_arg1); | |
3761 | break; | |
3762 | ||
6720e96c | 3763 | case RTX_OBJ: |
752df20e | 3764 | /* (lo_sum (high X) X) is simply X. */ |
3765 | if (code == LO_SUM && const_arg0 != 0 | |
3766 | && GET_CODE (const_arg0) == HIGH | |
3767 | && rtx_equal_p (XEXP (const_arg0, 0), const_arg1)) | |
3768 | return const_arg1; | |
3769 | break; | |
3770 | ||
6720e96c | 3771 | case RTX_TERNARY: |
3772 | case RTX_BITFIELD_OPS: | |
d328ebdf | 3773 | new_rtx = simplify_ternary_operation (code, mode, mode_arg0, |
752df20e | 3774 | const_arg0 ? const_arg0 : folded_arg0, |
3775 | const_arg1 ? const_arg1 : folded_arg1, | |
3776 | const_arg2 ? const_arg2 : XEXP (x, 2)); | |
3777 | break; | |
dd5ff96d | 3778 | |
6720e96c | 3779 | default: |
3780 | break; | |
752df20e | 3781 | } |
3782 | ||
d328ebdf | 3783 | return new_rtx ? new_rtx : x; |
752df20e | 3784 | } |
3785 | \f | |
3786 | /* Return a constant value currently equivalent to X. | |
3787 | Return 0 if we don't know one. */ | |
3788 | ||
3789 | static rtx | |
8ec3a57b | 3790 | equiv_constant (rtx x) |
752df20e | 3791 | { |
8ad4c111 | 3792 | if (REG_P (x) |
a7f3b1c7 | 3793 | && REGNO_QTY_VALID_P (REGNO (x))) |
3794 | { | |
3795 | int x_q = REG_QTY (REGNO (x)); | |
3796 | struct qty_table_elem *x_ent = &qty_table[x_q]; | |
3797 | ||
3798 | if (x_ent->const_rtx) | |
316f48ea | 3799 | x = gen_lowpart (GET_MODE (x), x_ent->const_rtx); |
a7f3b1c7 | 3800 | } |
752df20e | 3801 | |
f2f6be45 | 3802 | if (x == 0 || CONSTANT_P (x)) |
752df20e | 3803 | return x; |
3804 | ||
42a3a38b | 3805 | if (GET_CODE (x) == SUBREG) |
3806 | { | |
3754d046 | 3807 | machine_mode mode = GET_MODE (x); |
3808 | machine_mode imode = GET_MODE (SUBREG_REG (x)); | |
d328ebdf | 3809 | rtx new_rtx; |
42a3a38b | 3810 | |
3811 | /* See if we previously assigned a constant value to this SUBREG. */ | |
d328ebdf | 3812 | if ((new_rtx = lookup_as_function (x, CONST_INT)) != 0 |
e913b5cd | 3813 | || (new_rtx = lookup_as_function (x, CONST_WIDE_INT)) != 0 |
bbad7cd0 | 3814 | || (NUM_POLY_INT_COEFFS > 1 |
3815 | && (new_rtx = lookup_as_function (x, CONST_POLY_INT)) != 0) | |
d328ebdf | 3816 | || (new_rtx = lookup_as_function (x, CONST_DOUBLE)) != 0 |
3817 | || (new_rtx = lookup_as_function (x, CONST_FIXED)) != 0) | |
3818 | return new_rtx; | |
42a3a38b | 3819 | |
5216d9e8 | 3820 | /* If we didn't and if doing so makes sense, see if we previously |
3821 | assigned a constant value to the enclosing word mode SUBREG. */ | |
52acb7ae | 3822 | if (known_lt (GET_MODE_SIZE (mode), UNITS_PER_WORD) |
3823 | && known_lt (UNITS_PER_WORD, GET_MODE_SIZE (imode))) | |
5216d9e8 | 3824 | { |
9edf7ea8 | 3825 | poly_int64 byte = (SUBREG_BYTE (x) |
3826 | - subreg_lowpart_offset (mode, word_mode)); | |
3827 | if (known_ge (byte, 0) && multiple_p (byte, UNITS_PER_WORD)) | |
5216d9e8 | 3828 | { |
3829 | rtx y = gen_rtx_SUBREG (word_mode, SUBREG_REG (x), byte); | |
3830 | new_rtx = lookup_as_function (y, CONST_INT); | |
3831 | if (new_rtx) | |
3832 | return gen_lowpart (mode, new_rtx); | |
3833 | } | |
3834 | } | |
3835 | ||
3a966565 | 3836 | /* Otherwise see if we already have a constant for the inner REG, |
3837 | and if that is enough to calculate an equivalent constant for | |
3838 | the subreg. Note that the upper bits of paradoxical subregs | |
3839 | are undefined, so they cannot be said to equal anything. */ | |
42a3a38b | 3840 | if (REG_P (SUBREG_REG (x)) |
d0257d43 | 3841 | && !paradoxical_subreg_p (x) |
d328ebdf | 3842 | && (new_rtx = equiv_constant (SUBREG_REG (x))) != 0) |
5216d9e8 | 3843 | return simplify_subreg (mode, new_rtx, imode, SUBREG_BYTE (x)); |
42a3a38b | 3844 | |
3845 | return 0; | |
3846 | } | |
3847 | ||
3848 | /* If X is a MEM, see if it is a constant-pool reference, or look it up in | |
3849 | the hash table in case its value was seen before. */ | |
e516eaa9 | 3850 | |
e16ceb8e | 3851 | if (MEM_P (x)) |
e516eaa9 | 3852 | { |
3853 | struct table_elt *elt; | |
3854 | ||
42a3a38b | 3855 | x = avoid_constant_pool_reference (x); |
e516eaa9 | 3856 | if (CONSTANT_P (x)) |
3857 | return x; | |
3858 | ||
78d140c9 | 3859 | elt = lookup (x, SAFE_HASH (x, GET_MODE (x)), GET_MODE (x)); |
e516eaa9 | 3860 | if (elt == 0) |
3861 | return 0; | |
3862 | ||
3863 | for (elt = elt->first_same_value; elt; elt = elt->next_same_value) | |
3864 | if (elt->is_const && CONSTANT_P (elt->exp)) | |
3865 | return elt->exp; | |
3866 | } | |
3867 | ||
752df20e | 3868 | return 0; |
3869 | } | |
3870 | \f | |
bbe0b6d7 | 3871 | /* Given INSN, a jump insn, TAKEN indicates if we are following the |
3872 | "taken" branch. | |
752df20e | 3873 | |
3874 | In certain cases, this can cause us to add an equivalence. For example, | |
cb10db9d | 3875 | if we are following the taken case of |
8ec3a57b | 3876 | if (i == 2) |
752df20e | 3877 | we can add the fact that `i' and '2' are now equivalent. |
3878 | ||
3879 | In any case, we can record that this comparison was passed. If the same | |
3880 | comparison is seen later, we will know its value. */ | |
3881 | ||
3882 | static void | |
47f1d198 | 3883 | record_jump_equiv (rtx_insn *insn, bool taken) |
752df20e | 3884 | { |
3885 | int cond_known_true; | |
3886 | rtx op0, op1; | |
b2816317 | 3887 | rtx set; |
3754d046 | 3888 | machine_mode mode, mode0, mode1; |
752df20e | 3889 | int reversed_nonequality = 0; |
3890 | enum rtx_code code; | |
3891 | ||
3892 | /* Ensure this is the right kind of insn. */ | |
bbe0b6d7 | 3893 | gcc_assert (any_condjump_p (insn)); |
3894 | ||
b2816317 | 3895 | set = pc_set (insn); |
752df20e | 3896 | |
3897 | /* See if this jump condition is known true or false. */ | |
3898 | if (taken) | |
b2816317 | 3899 | cond_known_true = (XEXP (SET_SRC (set), 2) == pc_rtx); |
752df20e | 3900 | else |
b2816317 | 3901 | cond_known_true = (XEXP (SET_SRC (set), 1) == pc_rtx); |
752df20e | 3902 | |
3903 | /* Get the type of comparison being done and the operands being compared. | |
3904 | If we had to reverse a non-equality condition, record that fact so we | |
3905 | know that it isn't valid for floating-point. */ | |
b2816317 | 3906 | code = GET_CODE (XEXP (SET_SRC (set), 0)); |
3907 | op0 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 0), insn); | |
3908 | op1 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 1), insn); | |
752df20e | 3909 | |
40c562ee | 3910 | /* On a cc0 target the cc0-setter and cc0-user may end up in different |
3911 | blocks. When that happens the tracking of the cc0-setter via | |
3912 | PREV_INSN_CC0 is spoiled. That means that fold_rtx may return | |
3913 | NULL_RTX. In those cases, there's nothing to record. */ | |
3914 | if (op0 == NULL_RTX || op1 == NULL_RTX) | |
3915 | return; | |
3916 | ||
5c4c31e3 | 3917 | code = find_comparison_args (code, &op0, &op1, &mode0, &mode1); |
752df20e | 3918 | if (! cond_known_true) |
3919 | { | |
7da6ea0c | 3920 | code = reversed_comparison_code_parts (code, op0, op1, insn); |
a4110d9a | 3921 | |
3922 | /* Don't remember if we can't find the inverse. */ | |
3923 | if (code == UNKNOWN) | |
3924 | return; | |
752df20e | 3925 | } |
3926 | ||
3927 | /* The mode is the mode of the non-constant. */ | |
5c4c31e3 | 3928 | mode = mode0; |
3929 | if (mode1 != VOIDmode) | |
3930 | mode = mode1; | |
752df20e | 3931 | |
3932 | record_jump_cond (code, mode, op0, op1, reversed_nonequality); | |
3933 | } | |
3934 | ||
cfa1a80d | 3935 | /* Yet another form of subreg creation. In this case, we want something in |
3936 | MODE, and we should assume OP has MODE iff it is naturally modeless. */ | |
3937 | ||
3938 | static rtx | |
3754d046 | 3939 | record_jump_cond_subreg (machine_mode mode, rtx op) |
cfa1a80d | 3940 | { |
3754d046 | 3941 | machine_mode op_mode = GET_MODE (op); |
cfa1a80d | 3942 | if (op_mode == mode || op_mode == VOIDmode) |
3943 | return op; | |
3944 | return lowpart_subreg (mode, op, op_mode); | |
3945 | } | |
3946 | ||
752df20e | 3947 | /* We know that comparison CODE applied to OP0 and OP1 in MODE is true. |
3948 | REVERSED_NONEQUALITY is nonzero if CODE had to be swapped. | |
3949 | Make any useful entries we can with that information. Called from | |
3950 | above function and called recursively. */ | |
3951 | ||
3952 | static void | |
3754d046 | 3953 | record_jump_cond (enum rtx_code code, machine_mode mode, rtx op0, |
8ec3a57b | 3954 | rtx op1, int reversed_nonequality) |
752df20e | 3955 | { |
952bc06d | 3956 | unsigned op0_hash, op1_hash; |
0af17926 | 3957 | int op0_in_memory, op1_in_memory; |
752df20e | 3958 | struct table_elt *op0_elt, *op1_elt; |
3959 | ||
3960 | /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG, | |
3961 | we know that they are also equal in the smaller mode (this is also | |
3962 | true for all smaller modes whether or not there is a SUBREG, but | |
f5d1f9f9 | 3963 | is not worth testing for with no SUBREG). */ |
752df20e | 3964 | |
3c5cc27f | 3965 | /* Note that GET_MODE (op0) may not equal MODE. */ |
b537bfdb | 3966 | if (code == EQ && paradoxical_subreg_p (op0)) |
752df20e | 3967 | { |
3754d046 | 3968 | machine_mode inner_mode = GET_MODE (SUBREG_REG (op0)); |
cfa1a80d | 3969 | rtx tem = record_jump_cond_subreg (inner_mode, op1); |
3970 | if (tem) | |
3971 | record_jump_cond (code, mode, SUBREG_REG (op0), tem, | |
3972 | reversed_nonequality); | |
752df20e | 3973 | } |
3974 | ||
b537bfdb | 3975 | if (code == EQ && paradoxical_subreg_p (op1)) |
752df20e | 3976 | { |
3754d046 | 3977 | machine_mode inner_mode = GET_MODE (SUBREG_REG (op1)); |
cfa1a80d | 3978 | rtx tem = record_jump_cond_subreg (inner_mode, op0); |
3979 | if (tem) | |
3980 | record_jump_cond (code, mode, SUBREG_REG (op1), tem, | |
3981 | reversed_nonequality); | |
752df20e | 3982 | } |
3983 | ||
cb10db9d | 3984 | /* Similarly, if this is an NE comparison, and either is a SUBREG |
752df20e | 3985 | making a smaller mode, we know the whole thing is also NE. */ |
3986 | ||
3c5cc27f | 3987 | /* Note that GET_MODE (op0) may not equal MODE; |
3988 | if we test MODE instead, we can get an infinite recursion | |
3989 | alternating between two modes each wider than MODE. */ | |
3990 | ||
974534ab | 3991 | if (code == NE |
3992 | && partial_subreg_p (op0) | |
3993 | && subreg_lowpart_p (op0)) | |
752df20e | 3994 | { |
3754d046 | 3995 | machine_mode inner_mode = GET_MODE (SUBREG_REG (op0)); |
cfa1a80d | 3996 | rtx tem = record_jump_cond_subreg (inner_mode, op1); |
3997 | if (tem) | |
3998 | record_jump_cond (code, mode, SUBREG_REG (op0), tem, | |
3999 | reversed_nonequality); | |
752df20e | 4000 | } |
4001 | ||
974534ab | 4002 | if (code == NE |
4003 | && partial_subreg_p (op1) | |
4004 | && subreg_lowpart_p (op1)) | |
752df20e | 4005 | { |
3754d046 | 4006 | machine_mode inner_mode = GET_MODE (SUBREG_REG (op1)); |
cfa1a80d | 4007 | rtx tem = record_jump_cond_subreg (inner_mode, op0); |
4008 | if (tem) | |
4009 | record_jump_cond (code, mode, SUBREG_REG (op1), tem, | |
4010 | reversed_nonequality); | |
752df20e | 4011 | } |
4012 | ||
4013 | /* Hash both operands. */ | |
4014 | ||
4015 | do_not_record = 0; | |
4016 | hash_arg_in_memory = 0; | |
952bc06d | 4017 | op0_hash = HASH (op0, mode); |
752df20e | 4018 | op0_in_memory = hash_arg_in_memory; |
752df20e | 4019 | |
4020 | if (do_not_record) | |
4021 | return; | |
4022 | ||
4023 | do_not_record = 0; | |
4024 | hash_arg_in_memory = 0; | |
952bc06d | 4025 | op1_hash = HASH (op1, mode); |
752df20e | 4026 | op1_in_memory = hash_arg_in_memory; |
cb10db9d | 4027 | |
752df20e | 4028 | if (do_not_record) |
4029 | return; | |
4030 | ||
4031 | /* Look up both operands. */ | |
952bc06d | 4032 | op0_elt = lookup (op0, op0_hash, mode); |
4033 | op1_elt = lookup (op1, op1_hash, mode); | |
752df20e | 4034 | |
9f8339f2 | 4035 | /* If both operands are already equivalent or if they are not in the |
4036 | table but are identical, do nothing. */ | |
4037 | if ((op0_elt != 0 && op1_elt != 0 | |
4038 | && op0_elt->first_same_value == op1_elt->first_same_value) | |
4039 | || op0 == op1 || rtx_equal_p (op0, op1)) | |
4040 | return; | |
4041 | ||
752df20e | 4042 | /* If we aren't setting two things equal all we can do is save this |
5b620701 | 4043 | comparison. Similarly if this is floating-point. In the latter |
4044 | case, OP1 might be zero and both -0.0 and 0.0 are equal to it. | |
4045 | If we record the equality, we might inadvertently delete code | |
4046 | whose intent was to change -0 to +0. */ | |
4047 | ||
c1712420 | 4048 | if (code != EQ || FLOAT_MODE_P (GET_MODE (op0))) |
752df20e | 4049 | { |
a7f3b1c7 | 4050 | struct qty_table_elem *ent; |
4051 | int qty; | |
4052 | ||
752df20e | 4053 | /* If we reversed a floating-point comparison, if OP0 is not a |
4054 | register, or if OP1 is neither a register or constant, we can't | |
4055 | do anything. */ | |
4056 | ||
8ad4c111 | 4057 | if (!REG_P (op1)) |
752df20e | 4058 | op1 = equiv_constant (op1); |
4059 | ||
c1712420 | 4060 | if ((reversed_nonequality && FLOAT_MODE_P (mode)) |
8ad4c111 | 4061 | || !REG_P (op0) || op1 == 0) |
752df20e | 4062 | return; |
4063 | ||
4064 | /* Put OP0 in the hash table if it isn't already. This gives it a | |
4065 | new quantity number. */ | |
4066 | if (op0_elt == 0) | |
4067 | { | |
4679ade3 | 4068 | if (insert_regs (op0, NULL, 0)) |
752df20e | 4069 | { |
4070 | rehash_using_reg (op0); | |
952bc06d | 4071 | op0_hash = HASH (op0, mode); |
a45f1da6 | 4072 | |
4073 | /* If OP0 is contained in OP1, this changes its hash code | |
4074 | as well. Faster to rehash than to check, except | |
4075 | for the simple case of a constant. */ | |
4076 | if (! CONSTANT_P (op1)) | |
952bc06d | 4077 | op1_hash = HASH (op1,mode); |
752df20e | 4078 | } |
4079 | ||
4679ade3 | 4080 | op0_elt = insert (op0, NULL, op0_hash, mode); |
752df20e | 4081 | op0_elt->in_memory = op0_in_memory; |
752df20e | 4082 | } |
4083 | ||
a7f3b1c7 | 4084 | qty = REG_QTY (REGNO (op0)); |
4085 | ent = &qty_table[qty]; | |
4086 | ||
4087 | ent->comparison_code = code; | |
8ad4c111 | 4088 | if (REG_P (op1)) |
752df20e | 4089 | { |
95f65c26 | 4090 | /* Look it up again--in case op0 and op1 are the same. */ |
952bc06d | 4091 | op1_elt = lookup (op1, op1_hash, mode); |
95f65c26 | 4092 | |
752df20e | 4093 | /* Put OP1 in the hash table so it gets a new quantity number. */ |
4094 | if (op1_elt == 0) | |
4095 | { | |
4679ade3 | 4096 | if (insert_regs (op1, NULL, 0)) |
752df20e | 4097 | { |
4098 | rehash_using_reg (op1); | |
952bc06d | 4099 | op1_hash = HASH (op1, mode); |
752df20e | 4100 | } |
4101 | ||
4679ade3 | 4102 | op1_elt = insert (op1, NULL, op1_hash, mode); |
752df20e | 4103 | op1_elt->in_memory = op1_in_memory; |
752df20e | 4104 | } |
4105 | ||
a7f3b1c7 | 4106 | ent->comparison_const = NULL_RTX; |
4107 | ent->comparison_qty = REG_QTY (REGNO (op1)); | |
752df20e | 4108 | } |
4109 | else | |
4110 | { | |
a7f3b1c7 | 4111 | ent->comparison_const = op1; |
4112 | ent->comparison_qty = -1; | |
752df20e | 4113 | } |
4114 | ||
4115 | return; | |
4116 | } | |
4117 | ||
56e155ea | 4118 | /* If either side is still missing an equivalence, make it now, |
4119 | then merge the equivalences. */ | |
752df20e | 4120 | |
752df20e | 4121 | if (op0_elt == 0) |
4122 | { | |
4679ade3 | 4123 | if (insert_regs (op0, NULL, 0)) |
752df20e | 4124 | { |
4125 | rehash_using_reg (op0); | |
952bc06d | 4126 | op0_hash = HASH (op0, mode); |
752df20e | 4127 | } |
4128 | ||
4679ade3 | 4129 | op0_elt = insert (op0, NULL, op0_hash, mode); |
752df20e | 4130 | op0_elt->in_memory = op0_in_memory; |
752df20e | 4131 | } |
4132 | ||
4133 | if (op1_elt == 0) | |
4134 | { | |
4679ade3 | 4135 | if (insert_regs (op1, NULL, 0)) |
752df20e | 4136 | { |
4137 | rehash_using_reg (op1); | |
952bc06d | 4138 | op1_hash = HASH (op1, mode); |
752df20e | 4139 | } |
4140 | ||
4679ade3 | 4141 | op1_elt = insert (op1, NULL, op1_hash, mode); |
752df20e | 4142 | op1_elt->in_memory = op1_in_memory; |
752df20e | 4143 | } |
56e155ea | 4144 | |
4145 | merge_equiv_classes (op0_elt, op1_elt); | |
752df20e | 4146 | } |
4147 | \f | |
4148 | /* CSE processing for one instruction. | |
2aca5650 | 4149 | |
4150 | Most "true" common subexpressions are mostly optimized away in GIMPLE, | |
4151 | but the few that "leak through" are cleaned up by cse_insn, and complex | |
4152 | addressing modes are often formed here. | |
4153 | ||
4154 | The main function is cse_insn, and between here and that function | |
4155 | a couple of helper functions is defined to keep the size of cse_insn | |
4156 | within reasonable proportions. | |
4157 | ||
4158 | Data is shared between the main and helper functions via STRUCT SET, | |
4159 | that contains all data related for every set in the instruction that | |
4160 | is being processed. | |
4161 | ||
4162 | Note that cse_main processes all sets in the instruction. Most | |
4163 | passes in GCC only process simple SET insns or single_set insns, but | |
4164 | CSE processes insns with multiple sets as well. */ | |
752df20e | 4165 | |
4166 | /* Data on one SET contained in the instruction. */ | |
4167 | ||
4168 | struct set | |
4169 | { | |
4170 | /* The SET rtx itself. */ | |
4171 | rtx rtl; | |
4172 | /* The SET_SRC of the rtx (the original value, if it is changing). */ | |
4173 | rtx src; | |
4174 | /* The hash-table element for the SET_SRC of the SET. */ | |
4175 | struct table_elt *src_elt; | |
952bc06d | 4176 | /* Hash value for the SET_SRC. */ |
4177 | unsigned src_hash; | |
4178 | /* Hash value for the SET_DEST. */ | |
4179 | unsigned dest_hash; | |
752df20e | 4180 | /* The SET_DEST, with SUBREG, etc., stripped. */ |
4181 | rtx inner_dest; | |
cb10db9d | 4182 | /* Nonzero if the SET_SRC is in memory. */ |
752df20e | 4183 | char src_in_memory; |
752df20e | 4184 | /* Nonzero if the SET_SRC contains something |
4185 | whose value cannot be predicted and understood. */ | |
4186 | char src_volatile; | |
d8b9732d | 4187 | /* Original machine mode, in case it becomes a CONST_INT. |
4188 | The size of this field should match the size of the mode | |
4189 | field of struct rtx_def (see rtl.h). */ | |
4190 | ENUM_BITFIELD(machine_mode) mode : 8; | |
952bc06d | 4191 | /* Hash value of constant equivalent for SET_SRC. */ |
4192 | unsigned src_const_hash; | |
487798e2 | 4193 | /* A constant equivalent for SET_SRC, if any. */ |
4194 | rtx src_const; | |
752df20e | 4195 | /* Table entry for constant equivalent for SET_SRC, if any. */ |
4196 | struct table_elt *src_const_elt; | |
977ffed2 | 4197 | /* Table entry for the destination address. */ |
4198 | struct table_elt *dest_addr_elt; | |
752df20e | 4199 | }; |
2aca5650 | 4200 | \f |
4201 | /* Special handling for (set REG0 REG1) where REG0 is the | |
4202 | "cheapest", cheaper than REG1. After cse, REG1 will probably not | |
4203 | be used in the sequel, so (if easily done) change this insn to | |
4204 | (set REG1 REG0) and replace REG1 with REG0 in the previous insn | |
4205 | that computed their value. Then REG1 will become a dead store | |
4206 | and won't cloud the situation for later optimizations. | |
4207 | ||
4208 | Do not make this change if REG1 is a hard register, because it will | |
4209 | then be used in the sequel and we may be changing a two-operand insn | |
4210 | into a three-operand insn. | |
4211 | ||
4212 | This is the last transformation that cse_insn will try to do. */ | |
752df20e | 4213 | |
4214 | static void | |
47f1d198 | 4215 | try_back_substitute_reg (rtx set, rtx_insn *insn) |
752df20e | 4216 | { |
2aca5650 | 4217 | rtx dest = SET_DEST (set); |
4218 | rtx src = SET_SRC (set); | |
752df20e | 4219 | |
2aca5650 | 4220 | if (REG_P (dest) |
4221 | && REG_P (src) && ! HARD_REGISTER_P (src) | |
4222 | && REGNO_QTY_VALID_P (REGNO (src))) | |
4223 | { | |
4224 | int src_q = REG_QTY (REGNO (src)); | |
4225 | struct qty_table_elem *src_ent = &qty_table[src_q]; | |
752df20e | 4226 | |
2aca5650 | 4227 | if (src_ent->first_reg == REGNO (dest)) |
4228 | { | |
4229 | /* Scan for the previous nonnote insn, but stop at a basic | |
4230 | block boundary. */ | |
47f1d198 | 4231 | rtx_insn *prev = insn; |
4232 | rtx_insn *bb_head = BB_HEAD (BLOCK_FOR_INSN (insn)); | |
2aca5650 | 4233 | do |
4234 | { | |
4235 | prev = PREV_INSN (prev); | |
4236 | } | |
4237 | while (prev != bb_head && (NOTE_P (prev) || DEBUG_INSN_P (prev))); | |
752df20e | 4238 | |
2aca5650 | 4239 | /* Do not swap the registers around if the previous instruction |
4240 | attaches a REG_EQUIV note to REG1. | |
752df20e | 4241 | |
2aca5650 | 4242 | ??? It's not entirely clear whether we can transfer a REG_EQUIV |
4243 | from the pseudo that originally shadowed an incoming argument | |
4244 | to another register. Some uses of REG_EQUIV might rely on it | |
4245 | being attached to REG1 rather than REG2. | |
752df20e | 4246 | |
2aca5650 | 4247 | This section previously turned the REG_EQUIV into a REG_EQUAL |
4248 | note. We cannot do that because REG_EQUIV may provide an | |
4249 | uninitialized stack slot when REG_PARM_STACK_SPACE is used. */ | |
4250 | if (NONJUMP_INSN_P (prev) | |
4251 | && GET_CODE (PATTERN (prev)) == SET | |
4252 | && SET_DEST (PATTERN (prev)) == src | |
4253 | && ! find_reg_note (prev, REG_EQUIV, NULL_RTX)) | |
4254 | { | |
4255 | rtx note; | |
4256 | ||
4257 | validate_change (prev, &SET_DEST (PATTERN (prev)), dest, 1); | |
4258 | validate_change (insn, &SET_DEST (set), src, 1); | |
4259 | validate_change (insn, &SET_SRC (set), dest, 1); | |
4260 | apply_change_group (); | |
4261 | ||
4262 | /* If INSN has a REG_EQUAL note, and this note mentions | |
4263 | REG0, then we must delete it, because the value in | |
4264 | REG0 has changed. If the note's value is REG1, we must | |
4265 | also delete it because that is now this insn's dest. */ | |
4266 | note = find_reg_note (insn, REG_EQUAL, NULL_RTX); | |
4267 | if (note != 0 | |
4268 | && (reg_mentioned_p (dest, XEXP (note, 0)) | |
4269 | || rtx_equal_p (src, XEXP (note, 0)))) | |
4270 | remove_note (insn, note); | |
322eecc0 | 4271 | |
4272 | /* If INSN has a REG_ARGS_SIZE note, move it to PREV. */ | |
4273 | note = find_reg_note (insn, REG_ARGS_SIZE, NULL_RTX); | |
4274 | if (note != 0) | |
4275 | { | |
4276 | remove_note (insn, note); | |
4277 | gcc_assert (!find_reg_note (prev, REG_ARGS_SIZE, NULL_RTX)); | |
4278 | set_unique_reg_note (prev, REG_ARGS_SIZE, XEXP (note, 0)); | |
4279 | } | |
2aca5650 | 4280 | } |
ddaf7ad3 | 4281 | } |
b84155cd | 4282 | } |
2aca5650 | 4283 | } |
4284 | \f | |
4285 | /* Record all the SETs in this instruction into SETS_PTR, | |
4286 | and return the number of recorded sets. */ | |
4287 | static int | |
47f1d198 | 4288 | find_sets_in_insn (rtx_insn *insn, struct set **psets) |
2aca5650 | 4289 | { |
4290 | struct set *sets = *psets; | |
4291 | int n_sets = 0; | |
4292 | rtx x = PATTERN (insn); | |
b84155cd | 4293 | |
752df20e | 4294 | if (GET_CODE (x) == SET) |
4295 | { | |
752df20e | 4296 | /* Ignore SETs that are unconditional jumps. |
4297 | They never need cse processing, so this does not hurt. | |
4298 | The reason is not efficiency but rather | |
4299 | so that we can test at the end for instructions | |
4300 | that have been simplified to unconditional jumps | |
4301 | and not be misled by unchanged instructions | |
4302 | that were unconditional jumps to begin with. */ | |
4303 | if (SET_DEST (x) == pc_rtx | |
4304 | && GET_CODE (SET_SRC (x)) == LABEL_REF) | |
4305 | ; | |
752df20e | 4306 | /* Don't count call-insns, (set (reg 0) (call ...)), as a set. |
4307 | The hard function value register is used only once, to copy to | |
2aca5650 | 4308 | someplace else, so it isn't worth cse'ing. */ |
752df20e | 4309 | else if (GET_CODE (SET_SRC (x)) == CALL) |
2aca5650 | 4310 | ; |
752df20e | 4311 | else |
2aca5650 | 4312 | sets[n_sets++].rtl = x; |
752df20e | 4313 | } |
4314 | else if (GET_CODE (x) == PARALLEL) | |
4315 | { | |
2aca5650 | 4316 | int i, lim = XVECLEN (x, 0); |
cb10db9d | 4317 | |
20d3ff08 | 4318 | /* Go over the expressions of the PARALLEL in forward order, to |
2aca5650 | 4319 | put them in the same order in the SETS array. */ |
752df20e | 4320 | for (i = 0; i < lim; i++) |
4321 | { | |
19cb6b50 | 4322 | rtx y = XVECEXP (x, 0, i); |
752df20e | 4323 | if (GET_CODE (y) == SET) |
4324 | { | |
8d5dd220 | 4325 | /* As above, we ignore unconditional jumps and call-insns and |
4326 | ignore the result of apply_change_group. */ | |
2aca5650 | 4327 | if (SET_DEST (y) == pc_rtx |
4328 | && GET_CODE (SET_SRC (y)) == LABEL_REF) | |
4329 | ; | |
4330 | else if (GET_CODE (SET_SRC (y)) == CALL) | |
752df20e | 4331 | ; |
4332 | else | |
4333 | sets[n_sets++].rtl = y; | |
4334 | } | |
752df20e | 4335 | } |
4336 | } | |
2aca5650 | 4337 | |
4338 | return n_sets; | |
4339 | } | |
4340 | \f | |
c0ac34cf | 4341 | /* Subroutine of canonicalize_insn. X is an ASM_OPERANDS in INSN. */ |
4342 | ||
4343 | static void | |
4344 | canon_asm_operands (rtx x, rtx_insn *insn) | |
4345 | { | |
4346 | for (int i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--) | |
4347 | { | |
4348 | rtx input = ASM_OPERANDS_INPUT (x, i); | |
4349 | if (!(REG_P (input) && HARD_REGISTER_P (input))) | |
4350 | { | |
4351 | input = canon_reg (input, insn); | |
4352 | validate_change (insn, &ASM_OPERANDS_INPUT (x, i), input, 1); | |
4353 | } | |
4354 | } | |
4355 | } | |
4356 | ||
2aca5650 | 4357 | /* Where possible, substitute every register reference in the N_SETS |
47ae02b7 | 4358 | number of SETS in INSN with the canonical register. |
2aca5650 | 4359 | |
4360 | Register canonicalization propagatest the earliest register (i.e. | |
4361 | one that is set before INSN) with the same value. This is a very | |
4362 | useful, simple form of CSE, to clean up warts from expanding GIMPLE | |
4363 | to RTL. For instance, a CONST for an address is usually expanded | |
4364 | multiple times to loads into different registers, thus creating many | |
4365 | subexpressions of the form: | |
4366 | ||
4367 | (set (reg1) (some_const)) | |
4368 | (set (mem (... reg1 ...) (thing))) | |
4369 | (set (reg2) (some_const)) | |
4370 | (set (mem (... reg2 ...) (thing))) | |
4371 | ||
4372 | After canonicalizing, the code takes the following form: | |
4373 | ||
4374 | (set (reg1) (some_const)) | |
4375 | (set (mem (... reg1 ...) (thing))) | |
4376 | (set (reg2) (some_const)) | |
4377 | (set (mem (... reg1 ...) (thing))) | |
4378 | ||
4379 | The set to reg2 is now trivially dead, and the memory reference (or | |
4380 | address, or whatever) may be a candidate for further CSEing. | |
4381 | ||
4382 | In this function, the result of apply_change_group can be ignored; | |
4383 | see canon_reg. */ | |
4384 | ||
4385 | static void | |
47f1d198 | 4386 | canonicalize_insn (rtx_insn *insn, struct set **psets, int n_sets) |
2aca5650 | 4387 | { |
4388 | struct set *sets = *psets; | |
4389 | rtx tem; | |
4390 | rtx x = PATTERN (insn); | |
4391 | int i; | |
4392 | ||
4393 | if (CALL_P (insn)) | |
4394 | { | |
4395 | for (tem = CALL_INSN_FUNCTION_USAGE (insn); tem; tem = XEXP (tem, 1)) | |
c8010b80 | 4396 | if (GET_CODE (XEXP (tem, 0)) != SET) |
4397 | XEXP (tem, 0) = canon_reg (XEXP (tem, 0), insn); | |
2aca5650 | 4398 | } |
4399 | ||
4400 | if (GET_CODE (x) == SET && GET_CODE (SET_SRC (x)) == CALL) | |
4401 | { | |
4402 | canon_reg (SET_SRC (x), insn); | |
4403 | apply_change_group (); | |
4404 | fold_rtx (SET_SRC (x), insn); | |
4405 | } | |
752df20e | 4406 | else if (GET_CODE (x) == CLOBBER) |
4407 | { | |
2aca5650 | 4408 | /* If we clobber memory, canon the address. |
4409 | This does nothing when a register is clobbered | |
4410 | because we have already invalidated the reg. */ | |
e16ceb8e | 4411 | if (MEM_P (XEXP (x, 0))) |
3072d30e | 4412 | canon_reg (XEXP (x, 0), insn); |
752df20e | 4413 | } |
752df20e | 4414 | else if (GET_CODE (x) == USE |
8ad4c111 | 4415 | && ! (REG_P (XEXP (x, 0)) |
752df20e | 4416 | && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)) |
2aca5650 | 4417 | /* Canonicalize a USE of a pseudo register or memory location. */ |
e126ac03 | 4418 | canon_reg (x, insn); |
4419 | else if (GET_CODE (x) == ASM_OPERANDS) | |
c0ac34cf | 4420 | canon_asm_operands (x, insn); |
752df20e | 4421 | else if (GET_CODE (x) == CALL) |
4422 | { | |
4423 | canon_reg (x, insn); | |
8b82837b | 4424 | apply_change_group (); |
752df20e | 4425 | fold_rtx (x, insn); |
4426 | } | |
9845d120 | 4427 | else if (DEBUG_INSN_P (insn)) |
4428 | canon_reg (PATTERN (insn), insn); | |
2aca5650 | 4429 | else if (GET_CODE (x) == PARALLEL) |
4430 | { | |
4431 | for (i = XVECLEN (x, 0) - 1; i >= 0; i--) | |
4432 | { | |
4433 | rtx y = XVECEXP (x, 0, i); | |
4434 | if (GET_CODE (y) == SET && GET_CODE (SET_SRC (y)) == CALL) | |
4435 | { | |
4436 | canon_reg (SET_SRC (y), insn); | |
4437 | apply_change_group (); | |
4438 | fold_rtx (SET_SRC (y), insn); | |
4439 | } | |
4440 | else if (GET_CODE (y) == CLOBBER) | |
4441 | { | |
4442 | if (MEM_P (XEXP (y, 0))) | |
4443 | canon_reg (XEXP (y, 0), insn); | |
4444 | } | |
4445 | else if (GET_CODE (y) == USE | |
4446 | && ! (REG_P (XEXP (y, 0)) | |
4447 | && REGNO (XEXP (y, 0)) < FIRST_PSEUDO_REGISTER)) | |
4448 | canon_reg (y, insn); | |
c0ac34cf | 4449 | else if (GET_CODE (y) == ASM_OPERANDS) |
4450 | canon_asm_operands (y, insn); | |
2aca5650 | 4451 | else if (GET_CODE (y) == CALL) |
4452 | { | |
4453 | canon_reg (y, insn); | |
4454 | apply_change_group (); | |
4455 | fold_rtx (y, insn); | |
4456 | } | |
4457 | } | |
4458 | } | |
752df20e | 4459 | |
384770d0 | 4460 | if (n_sets == 1 && REG_NOTES (insn) != 0 |
2aca5650 | 4461 | && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0) |
24d87432 | 4462 | { |
2aca5650 | 4463 | /* We potentially will process this insn many times. Therefore, |
4464 | drop the REG_EQUAL note if it is equal to the SET_SRC of the | |
4465 | unique set in INSN. | |
4466 | ||
4467 | Do not do so if the REG_EQUAL note is for a STRICT_LOW_PART, | |
4468 | because cse_insn handles those specially. */ | |
4469 | if (GET_CODE (SET_DEST (sets[0].rtl)) != STRICT_LOW_PART | |
4470 | && rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl))) | |
4471 | remove_note (insn, tem); | |
4472 | else | |
4473 | { | |
4474 | canon_reg (XEXP (tem, 0), insn); | |
4475 | apply_change_group (); | |
4476 | XEXP (tem, 0) = fold_rtx (XEXP (tem, 0), insn); | |
4477 | df_notes_rescan (insn); | |
4478 | } | |
24d87432 | 4479 | } |
752df20e | 4480 | |
4481 | /* Canonicalize sources and addresses of destinations. | |
4482 | We do this in a separate pass to avoid problems when a MATCH_DUP is | |
4483 | present in the insn pattern. In that case, we want to ensure that | |
4484 | we don't break the duplicate nature of the pattern. So we will replace | |
4485 | both operands at the same time. Otherwise, we would fail to find an | |
4486 | equivalent substitution in the loop calling validate_change below. | |
752df20e | 4487 | |
4488 | We used to suppress canonicalization of DEST if it appears in SRC, | |
8b82837b | 4489 | but we don't do this any more. */ |
752df20e | 4490 | |
4491 | for (i = 0; i < n_sets; i++) | |
4492 | { | |
4493 | rtx dest = SET_DEST (sets[i].rtl); | |
4494 | rtx src = SET_SRC (sets[i].rtl); | |
d328ebdf | 4495 | rtx new_rtx = canon_reg (src, insn); |
752df20e | 4496 | |
d328ebdf | 4497 | validate_change (insn, &SET_SRC (sets[i].rtl), new_rtx, 1); |
752df20e | 4498 | |
476d094d | 4499 | if (GET_CODE (dest) == ZERO_EXTRACT) |
752df20e | 4500 | { |
4501 | validate_change (insn, &XEXP (dest, 1), | |
8b82837b | 4502 | canon_reg (XEXP (dest, 1), insn), 1); |
752df20e | 4503 | validate_change (insn, &XEXP (dest, 2), |
8b82837b | 4504 | canon_reg (XEXP (dest, 2), insn), 1); |
752df20e | 4505 | } |
4506 | ||
476d094d | 4507 | while (GET_CODE (dest) == SUBREG |
752df20e | 4508 | || GET_CODE (dest) == ZERO_EXTRACT |
476d094d | 4509 | || GET_CODE (dest) == STRICT_LOW_PART) |
752df20e | 4510 | dest = XEXP (dest, 0); |
4511 | ||
e16ceb8e | 4512 | if (MEM_P (dest)) |
752df20e | 4513 | canon_reg (dest, insn); |
4514 | } | |
4515 | ||
8b82837b | 4516 | /* Now that we have done all the replacements, we can apply the change |
4517 | group and see if they all work. Note that this will cause some | |
4518 | canonicalizations that would have worked individually not to be applied | |
4519 | because some other canonicalization didn't work, but this should not | |
cb10db9d | 4520 | occur often. |
8d5dd220 | 4521 | |
4522 | The result of apply_change_group can be ignored; see canon_reg. */ | |
8b82837b | 4523 | |
4524 | apply_change_group (); | |
2aca5650 | 4525 | } |
4526 | \f | |
4527 | /* Main function of CSE. | |
4528 | First simplify sources and addresses of all assignments | |
4529 | in the instruction, using previously-computed equivalents values. | |
4530 | Then install the new sources and destinations in the table | |
4531 | of available values. */ | |
4532 | ||
4533 | static void | |
47f1d198 | 4534 | cse_insn (rtx_insn *insn) |
2aca5650 | 4535 | { |
4536 | rtx x = PATTERN (insn); | |
4537 | int i; | |
4538 | rtx tem; | |
4539 | int n_sets = 0; | |
4540 | ||
4541 | rtx src_eqv = 0; | |
4542 | struct table_elt *src_eqv_elt = 0; | |
4543 | int src_eqv_volatile = 0; | |
4544 | int src_eqv_in_memory = 0; | |
4545 | unsigned src_eqv_hash = 0; | |
4546 | ||
4547 | struct set *sets = (struct set *) 0; | |
4548 | ||
4549 | if (GET_CODE (x) == SET) | |
4550 | sets = XALLOCA (struct set); | |
4551 | else if (GET_CODE (x) == PARALLEL) | |
4552 | sets = XALLOCAVEC (struct set, XVECLEN (x, 0)); | |
4553 | ||
4554 | this_insn = insn; | |
2aca5650 | 4555 | /* Records what this insn does to set CC0. */ |
4556 | this_insn_cc0 = 0; | |
4557 | this_insn_cc0_mode = VOIDmode; | |
2aca5650 | 4558 | |
4559 | /* Find all regs explicitly clobbered in this insn, | |
4560 | to ensure they are not replaced with any other regs | |
4561 | elsewhere in this insn. */ | |
4562 | invalidate_from_sets_and_clobbers (insn); | |
4563 | ||
4564 | /* Record all the SETs in this instruction. */ | |
4565 | n_sets = find_sets_in_insn (insn, &sets); | |
4566 | ||
4567 | /* Substitute the canonical register where possible. */ | |
4568 | canonicalize_insn (insn, &sets, n_sets); | |
4569 | ||
4570 | /* If this insn has a REG_EQUAL note, store the equivalent value in SRC_EQV, | |
f2c7e335 | 4571 | if different, or if the DEST is a STRICT_LOW_PART/ZERO_EXTRACT. The |
4572 | latter condition is necessary because SRC_EQV is handled specially for | |
4573 | this case, and if it isn't set, then there will be no equivalence | |
4574 | for the destination. */ | |
2aca5650 | 4575 | if (n_sets == 1 && REG_NOTES (insn) != 0 |
6c1fc504 | 4576 | && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0) |
f2c7e335 | 4577 | { |
f2c7e335 | 4578 | |
6c1fc504 | 4579 | if (GET_CODE (SET_DEST (sets[0].rtl)) != ZERO_EXTRACT |
4580 | && (! rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl)) | |
4581 | || GET_CODE (SET_DEST (sets[0].rtl)) == STRICT_LOW_PART)) | |
4582 | src_eqv = copy_rtx (XEXP (tem, 0)); | |
f2c7e335 | 4583 | /* If DEST is of the form ZERO_EXTACT, as in: |
4584 | (set (zero_extract:SI (reg:SI 119) | |
4585 | (const_int 16 [0x10]) | |
4586 | (const_int 16 [0x10])) | |
4587 | (const_int 51154 [0xc7d2])) | |
4588 | REG_EQUAL note will specify the value of register (reg:SI 119) at this | |
4589 | point. Note that this is different from SRC_EQV. We can however | |
4590 | calculate SRC_EQV with the position and width of ZERO_EXTRACT. */ | |
4591 | else if (GET_CODE (SET_DEST (sets[0].rtl)) == ZERO_EXTRACT | |
a76e121f | 4592 | && CONST_INT_P (XEXP (tem, 0)) |
f2c7e335 | 4593 | && CONST_INT_P (XEXP (SET_DEST (sets[0].rtl), 1)) |
4594 | && CONST_INT_P (XEXP (SET_DEST (sets[0].rtl), 2))) | |
4595 | { | |
4596 | rtx dest_reg = XEXP (SET_DEST (sets[0].rtl), 0); | |
7a6aeeed | 4597 | /* This is the mode of XEXP (tem, 0) as well. */ |
4598 | scalar_int_mode dest_mode | |
4599 | = as_a <scalar_int_mode> (GET_MODE (dest_reg)); | |
f2c7e335 | 4600 | rtx width = XEXP (SET_DEST (sets[0].rtl), 1); |
4601 | rtx pos = XEXP (SET_DEST (sets[0].rtl), 2); | |
a76e121f | 4602 | HOST_WIDE_INT val = INTVAL (XEXP (tem, 0)); |
f2c7e335 | 4603 | HOST_WIDE_INT mask; |
4604 | unsigned int shift; | |
4605 | if (BITS_BIG_ENDIAN) | |
7a6aeeed | 4606 | shift = (GET_MODE_PRECISION (dest_mode) |
4607 | - INTVAL (pos) - INTVAL (width)); | |
f2c7e335 | 4608 | else |
4609 | shift = INTVAL (pos); | |
4610 | if (INTVAL (width) == HOST_BITS_PER_WIDE_INT) | |
7097b942 | 4611 | mask = HOST_WIDE_INT_M1; |
f2c7e335 | 4612 | else |
edc19fd0 | 4613 | mask = (HOST_WIDE_INT_1 << INTVAL (width)) - 1; |
f2c7e335 | 4614 | val = (val >> shift) & mask; |
4615 | src_eqv = GEN_INT (val); | |
4616 | } | |
4617 | } | |
8b82837b | 4618 | |
752df20e | 4619 | /* Set sets[i].src_elt to the class each source belongs to. |
4620 | Detect assignments from or to volatile things | |
4621 | and set set[i] to zero so they will be ignored | |
4622 | in the rest of this function. | |
4623 | ||
4624 | Nothing in this loop changes the hash table or the register chains. */ | |
4625 | ||
4626 | for (i = 0; i < n_sets; i++) | |
4627 | { | |
a49d9163 | 4628 | bool repeat = false; |
663f4248 | 4629 | bool mem_noop_insn = false; |
19cb6b50 | 4630 | rtx src, dest; |
4631 | rtx src_folded; | |
4632 | struct table_elt *elt = 0, *p; | |
3754d046 | 4633 | machine_mode mode; |
752df20e | 4634 | rtx src_eqv_here; |
4635 | rtx src_const = 0; | |
4636 | rtx src_related = 0; | |
01c8e4c9 | 4637 | bool src_related_is_const_anchor = false; |
752df20e | 4638 | struct table_elt *src_const_elt = 0; |
fb561825 | 4639 | int src_cost = MAX_COST; |
4640 | int src_eqv_cost = MAX_COST; | |
4641 | int src_folded_cost = MAX_COST; | |
4642 | int src_related_cost = MAX_COST; | |
4643 | int src_elt_cost = MAX_COST; | |
4644 | int src_regcost = MAX_COST; | |
4645 | int src_eqv_regcost = MAX_COST; | |
4646 | int src_folded_regcost = MAX_COST; | |
4647 | int src_related_regcost = MAX_COST; | |
4648 | int src_elt_regcost = MAX_COST; | |
d10cfa8d | 4649 | /* Set nonzero if we need to call force_const_mem on with the |
752df20e | 4650 | contents of src_folded before using it. */ |
4651 | int src_folded_force_flag = 0; | |
8b449599 | 4652 | scalar_int_mode int_mode; |
752df20e | 4653 | |
4654 | dest = SET_DEST (sets[i].rtl); | |
4655 | src = SET_SRC (sets[i].rtl); | |
4656 | ||
4657 | /* If SRC is a constant that has no machine mode, | |
4658 | hash it with the destination's machine mode. | |
4659 | This way we can keep different modes separate. */ | |
4660 | ||
4661 | mode = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src); | |
4662 | sets[i].mode = mode; | |
4663 | ||
4664 | if (src_eqv) | |
4665 | { | |
3754d046 | 4666 | machine_mode eqvmode = mode; |
752df20e | 4667 | if (GET_CODE (dest) == STRICT_LOW_PART) |
4668 | eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0))); | |
4669 | do_not_record = 0; | |
4670 | hash_arg_in_memory = 0; | |
952bc06d | 4671 | src_eqv_hash = HASH (src_eqv, eqvmode); |
752df20e | 4672 | |
4673 | /* Find the equivalence class for the equivalent expression. */ | |
4674 | ||
4675 | if (!do_not_record) | |
952bc06d | 4676 | src_eqv_elt = lookup (src_eqv, src_eqv_hash, eqvmode); |
752df20e | 4677 | |
4678 | src_eqv_volatile = do_not_record; | |
4679 | src_eqv_in_memory = hash_arg_in_memory; | |
752df20e | 4680 | } |
4681 | ||
4682 | /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the | |
4683 | value of the INNER register, not the destination. So it is not | |
fd6efe25 | 4684 | a valid substitution for the source. But save it for later. */ |
752df20e | 4685 | if (GET_CODE (dest) == STRICT_LOW_PART) |
4686 | src_eqv_here = 0; | |
4687 | else | |
4688 | src_eqv_here = src_eqv; | |
4689 | ||
4690 | /* Simplify and foldable subexpressions in SRC. Then get the fully- | |
4691 | simplified result, which may not necessarily be valid. */ | |
afabf5e0 | 4692 | src_folded = fold_rtx (src, NULL); |
752df20e | 4693 | |
c93674f2 | 4694 | #if 0 |
4695 | /* ??? This caused bad code to be generated for the m68k port with -O2. | |
4696 | Suppose src is (CONST_INT -1), and that after truncation src_folded | |
4697 | is (CONST_INT 3). Suppose src_folded is then used for src_const. | |
4698 | At the end we will add src and src_const to the same equivalence | |
4699 | class. We now have 3 and -1 on the same equivalence class. This | |
4700 | causes later instructions to be mis-optimized. */ | |
752df20e | 4701 | /* If storing a constant in a bitfield, pre-truncate the constant |
4702 | so we will be able to record it later. */ | |
476d094d | 4703 | if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT) |
752df20e | 4704 | { |
4705 | rtx width = XEXP (SET_DEST (sets[i].rtl), 1); | |
4706 | ||
971ba038 | 4707 | if (CONST_INT_P (src) |
4708 | && CONST_INT_P (width) | |
b572011e | 4709 | && INTVAL (width) < HOST_BITS_PER_WIDE_INT |
4710 | && (INTVAL (src) & ((HOST_WIDE_INT) (-1) << INTVAL (width)))) | |
4711 | src_folded | |
edc19fd0 | 4712 | = GEN_INT (INTVAL (src) & ((HOST_WIDE_INT_1 |
b572011e | 4713 | << INTVAL (width)) - 1)); |
752df20e | 4714 | } |
c93674f2 | 4715 | #endif |
752df20e | 4716 | |
4717 | /* Compute SRC's hash code, and also notice if it | |
4718 | should not be recorded at all. In that case, | |
4719 | prevent any further processing of this assignment. */ | |
4720 | do_not_record = 0; | |
4721 | hash_arg_in_memory = 0; | |
752df20e | 4722 | |
4723 | sets[i].src = src; | |
952bc06d | 4724 | sets[i].src_hash = HASH (src, mode); |
752df20e | 4725 | sets[i].src_volatile = do_not_record; |
4726 | sets[i].src_in_memory = hash_arg_in_memory; | |
752df20e | 4727 | |
6ea5a450 | 4728 | /* If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is |
75f84104 | 4729 | a pseudo, do not record SRC. Using SRC as a replacement for |
4730 | anything else will be incorrect in that situation. Note that | |
4731 | this usually occurs only for stack slots, in which case all the | |
4732 | RTL would be referring to SRC, so we don't lose any optimization | |
4733 | opportunities by not having SRC in the hash table. */ | |
6ea5a450 | 4734 | |
e16ceb8e | 4735 | if (MEM_P (src) |
75f84104 | 4736 | && find_reg_note (insn, REG_EQUIV, NULL_RTX) != 0 |
8ad4c111 | 4737 | && REG_P (dest) |
75f84104 | 4738 | && REGNO (dest) >= FIRST_PSEUDO_REGISTER) |
6ea5a450 | 4739 | sets[i].src_volatile = 1; |
4740 | ||
f3f18244 | 4741 | else if (GET_CODE (src) == ASM_OPERANDS |
4742 | && GET_CODE (x) == PARALLEL) | |
20d3ff08 | 4743 | { |
4744 | /* Do not record result of a non-volatile inline asm with | |
4745 | more than one result. */ | |
4746 | if (n_sets > 1) | |
4747 | sets[i].src_volatile = 1; | |
4748 | ||
4749 | int j, lim = XVECLEN (x, 0); | |
4750 | for (j = 0; j < lim; j++) | |
4751 | { | |
4752 | rtx y = XVECEXP (x, 0, j); | |
4753 | /* And do not record result of a non-volatile inline asm | |
4754 | with "memory" clobber. */ | |
4755 | if (GET_CODE (y) == CLOBBER && MEM_P (XEXP (y, 0))) | |
4756 | { | |
4757 | sets[i].src_volatile = 1; | |
4758 | break; | |
4759 | } | |
4760 | } | |
4761 | } | |
f3f18244 | 4762 | |
c538053c | 4763 | #if 0 |
4764 | /* It is no longer clear why we used to do this, but it doesn't | |
4765 | appear to still be needed. So let's try without it since this | |
4766 | code hurts cse'ing widened ops. */ | |
5f3447b0 | 4767 | /* If source is a paradoxical subreg (such as QI treated as an SI), |
752df20e | 4768 | treat it as volatile. It may do the work of an SI in one context |
4769 | where the extra bits are not being used, but cannot replace an SI | |
4770 | in general. */ | |
b537bfdb | 4771 | if (paradoxical_subreg_p (src)) |
752df20e | 4772 | sets[i].src_volatile = 1; |
c538053c | 4773 | #endif |
752df20e | 4774 | |
4775 | /* Locate all possible equivalent forms for SRC. Try to replace | |
4776 | SRC in the insn with each cheaper equivalent. | |
4777 | ||
4778 | We have the following types of equivalents: SRC itself, a folded | |
4779 | version, a value given in a REG_EQUAL note, or a value related | |
4780 | to a constant. | |
4781 | ||
4782 | Each of these equivalents may be part of an additional class | |
4783 | of equivalents (if more than one is in the table, they must be in | |
4784 | the same class; we check for this). | |
4785 | ||
4786 | If the source is volatile, we don't do any table lookups. | |
4787 | ||
4788 | We note any constant equivalent for possible later use in a | |
4789 | REG_NOTE. */ | |
4790 | ||
4791 | if (!sets[i].src_volatile) | |
952bc06d | 4792 | elt = lookup (src, sets[i].src_hash, mode); |
752df20e | 4793 | |
4794 | sets[i].src_elt = elt; | |
4795 | ||
4796 | if (elt && src_eqv_here && src_eqv_elt) | |
cb10db9d | 4797 | { |
4798 | if (elt->first_same_value != src_eqv_elt->first_same_value) | |
752df20e | 4799 | { |
4800 | /* The REG_EQUAL is indicating that two formerly distinct | |
4801 | classes are now equivalent. So merge them. */ | |
4802 | merge_equiv_classes (elt, src_eqv_elt); | |
952bc06d | 4803 | src_eqv_hash = HASH (src_eqv, elt->mode); |
4804 | src_eqv_elt = lookup (src_eqv, src_eqv_hash, elt->mode); | |
752df20e | 4805 | } |
4806 | ||
cb10db9d | 4807 | src_eqv_here = 0; |
4808 | } | |
752df20e | 4809 | |
4810 | else if (src_eqv_elt) | |
cb10db9d | 4811 | elt = src_eqv_elt; |
752df20e | 4812 | |
4813 | /* Try to find a constant somewhere and record it in `src_const'. | |
4814 | Record its table element, if any, in `src_const_elt'. Look in | |
4815 | any known equivalences first. (If the constant is not in the | |
952bc06d | 4816 | table, also set `sets[i].src_const_hash'). */ |
752df20e | 4817 | if (elt) |
cb10db9d | 4818 | for (p = elt->first_same_value; p; p = p->next_same_value) |
752df20e | 4819 | if (p->is_const) |
4820 | { | |
4821 | src_const = p->exp; | |
4822 | src_const_elt = elt; | |
4823 | break; | |
4824 | } | |
4825 | ||
4826 | if (src_const == 0 | |
4827 | && (CONSTANT_P (src_folded) | |
cb10db9d | 4828 | /* Consider (minus (label_ref L1) (label_ref L2)) as |
752df20e | 4829 | "constant" here so we will record it. This allows us |
4830 | to fold switch statements when an ADDR_DIFF_VEC is used. */ | |
4831 | || (GET_CODE (src_folded) == MINUS | |
4832 | && GET_CODE (XEXP (src_folded, 0)) == LABEL_REF | |
4833 | && GET_CODE (XEXP (src_folded, 1)) == LABEL_REF))) | |
4834 | src_const = src_folded, src_const_elt = elt; | |
4835 | else if (src_const == 0 && src_eqv_here && CONSTANT_P (src_eqv_here)) | |
4836 | src_const = src_eqv_here, src_const_elt = src_eqv_elt; | |
4837 | ||
4838 | /* If we don't know if the constant is in the table, get its | |
4839 | hash code and look it up. */ | |
4840 | if (src_const && src_const_elt == 0) | |
4841 | { | |
952bc06d | 4842 | sets[i].src_const_hash = HASH (src_const, mode); |
4843 | src_const_elt = lookup (src_const, sets[i].src_const_hash, mode); | |
752df20e | 4844 | } |
4845 | ||
4846 | sets[i].src_const = src_const; | |
4847 | sets[i].src_const_elt = src_const_elt; | |
4848 | ||
4849 | /* If the constant and our source are both in the table, mark them as | |
4850 | equivalent. Otherwise, if a constant is in the table but the source | |
4851 | isn't, set ELT to it. */ | |
4852 | if (src_const_elt && elt | |
4853 | && src_const_elt->first_same_value != elt->first_same_value) | |
4854 | merge_equiv_classes (elt, src_const_elt); | |
4855 | else if (src_const_elt && elt == 0) | |
4856 | elt = src_const_elt; | |
4857 | ||
4858 | /* See if there is a register linearly related to a constant | |
4859 | equivalent of SRC. */ | |
4860 | if (src_const | |
4861 | && (GET_CODE (src_const) == CONST | |
4862 | || (src_const_elt && src_const_elt->related_value != 0))) | |
cb10db9d | 4863 | { |
4864 | src_related = use_related_value (src_const, src_const_elt); | |
4865 | if (src_related) | |
4866 | { | |
752df20e | 4867 | struct table_elt *src_related_elt |
cb10db9d | 4868 | = lookup (src_related, HASH (src_related, mode), mode); |
752df20e | 4869 | if (src_related_elt && elt) |
cb10db9d | 4870 | { |
752df20e | 4871 | if (elt->first_same_value |
4872 | != src_related_elt->first_same_value) | |
cb10db9d | 4873 | /* This can occur when we previously saw a CONST |
752df20e | 4874 | involving a SYMBOL_REF and then see the SYMBOL_REF |
4875 | twice. Merge the involved classes. */ | |
4876 | merge_equiv_classes (elt, src_related_elt); | |
4877 | ||
cb10db9d | 4878 | src_related = 0; |
752df20e | 4879 | src_related_elt = 0; |
cb10db9d | 4880 | } |
4881 | else if (src_related_elt && elt == 0) | |
4882 | elt = src_related_elt; | |
752df20e | 4883 | } |
cb10db9d | 4884 | } |
752df20e | 4885 | |
4023cea7 | 4886 | /* See if we have a CONST_INT that is already in a register in a |
4887 | wider mode. */ | |
4888 | ||
971ba038 | 4889 | if (src_const && src_related == 0 && CONST_INT_P (src_const) |
8b449599 | 4890 | && is_int_mode (mode, &int_mode) |
4891 | && GET_MODE_PRECISION (int_mode) < BITS_PER_WORD) | |
4023cea7 | 4892 | { |
8b449599 | 4893 | opt_scalar_int_mode wider_mode_iter; |
4894 | FOR_EACH_WIDER_MODE (wider_mode_iter, int_mode) | |
4023cea7 | 4895 | { |
8b449599 | 4896 | scalar_int_mode wider_mode = wider_mode_iter.require (); |
19a4dce4 | 4897 | if (GET_MODE_PRECISION (wider_mode) > BITS_PER_WORD) |
4898 | break; | |
4899 | ||
4023cea7 | 4900 | struct table_elt *const_elt |
4901 | = lookup (src_const, HASH (src_const, wider_mode), wider_mode); | |
4902 | ||
4903 | if (const_elt == 0) | |
4904 | continue; | |
4905 | ||
4906 | for (const_elt = const_elt->first_same_value; | |
4907 | const_elt; const_elt = const_elt->next_same_value) | |
8ad4c111 | 4908 | if (REG_P (const_elt->exp)) |
4023cea7 | 4909 | { |
8b449599 | 4910 | src_related = gen_lowpart (int_mode, const_elt->exp); |
4023cea7 | 4911 | break; |
4912 | } | |
19a4dce4 | 4913 | |
4914 | if (src_related != 0) | |
4915 | break; | |
4023cea7 | 4916 | } |
4917 | } | |
4918 | ||
f9e15121 | 4919 | /* Another possibility is that we have an AND with a constant in |
4920 | a mode narrower than a word. If so, it might have been generated | |
4921 | as part of an "if" which would narrow the AND. If we already | |
4922 | have done the AND in a wider mode, we can use a SUBREG of that | |
4923 | value. */ | |
4924 | ||
4925 | if (flag_expensive_optimizations && ! src_related | |
58a70f63 | 4926 | && is_a <scalar_int_mode> (mode, &int_mode) |
971ba038 | 4927 | && GET_CODE (src) == AND && CONST_INT_P (XEXP (src, 1)) |
58a70f63 | 4928 | && GET_MODE_SIZE (int_mode) < UNITS_PER_WORD) |
f9e15121 | 4929 | { |
2216255f | 4930 | opt_scalar_int_mode tmode_iter; |
941522d6 | 4931 | rtx new_and = gen_rtx_AND (VOIDmode, NULL_RTX, XEXP (src, 1)); |
f9e15121 | 4932 | |
2216255f | 4933 | FOR_EACH_WIDER_MODE (tmode_iter, int_mode) |
f9e15121 | 4934 | { |
2216255f | 4935 | scalar_int_mode tmode = tmode_iter.require (); |
19a4dce4 | 4936 | if (GET_MODE_SIZE (tmode) > UNITS_PER_WORD) |
4937 | break; | |
4938 | ||
316f48ea | 4939 | rtx inner = gen_lowpart (tmode, XEXP (src, 0)); |
f9e15121 | 4940 | struct table_elt *larger_elt; |
4941 | ||
4942 | if (inner) | |
4943 | { | |
4944 | PUT_MODE (new_and, tmode); | |
4945 | XEXP (new_and, 0) = inner; | |
4946 | larger_elt = lookup (new_and, HASH (new_and, tmode), tmode); | |
4947 | if (larger_elt == 0) | |
4948 | continue; | |
4949 | ||
4950 | for (larger_elt = larger_elt->first_same_value; | |
4951 | larger_elt; larger_elt = larger_elt->next_same_value) | |
8ad4c111 | 4952 | if (REG_P (larger_elt->exp)) |
f9e15121 | 4953 | { |
4954 | src_related | |
58a70f63 | 4955 | = gen_lowpart (int_mode, larger_elt->exp); |
f9e15121 | 4956 | break; |
4957 | } | |
4958 | ||
4959 | if (src_related) | |
4960 | break; | |
4961 | } | |
4962 | } | |
4963 | } | |
c13941f4 | 4964 | |
c13941f4 | 4965 | /* See if a MEM has already been loaded with a widening operation; |
4966 | if it has, we can use a subreg of that. Many CISC machines | |
4967 | also have such operations, but this is only likely to be | |
5aedf60c | 4968 | beneficial on these machines. */ |
cb10db9d | 4969 | |
e73fe78f | 4970 | rtx_code extend_op; |
b74befc5 | 4971 | if (flag_expensive_optimizations && src_related == 0 |
e16ceb8e | 4972 | && MEM_P (src) && ! do_not_record |
4a36ac44 | 4973 | && is_a <scalar_int_mode> (mode, &int_mode) |
4974 | && (extend_op = load_extend_op (int_mode)) != UNKNOWN) | |
c13941f4 | 4975 | { |
89333dfe | 4976 | struct rtx_def memory_extend_buf; |
4977 | rtx memory_extend_rtx = &memory_extend_buf; | |
cb10db9d | 4978 | |
c13941f4 | 4979 | /* Set what we are trying to extend and the operation it might |
4980 | have been extended with. */ | |
9af5ce0c | 4981 | memset (memory_extend_rtx, 0, sizeof (*memory_extend_rtx)); |
e73fe78f | 4982 | PUT_CODE (memory_extend_rtx, extend_op); |
c13941f4 | 4983 | XEXP (memory_extend_rtx, 0) = src; |
cb10db9d | 4984 | |
2216255f | 4985 | opt_scalar_int_mode tmode_iter; |
4986 | FOR_EACH_WIDER_MODE (tmode_iter, int_mode) | |
c13941f4 | 4987 | { |
4988 | struct table_elt *larger_elt; | |
cb10db9d | 4989 | |
2216255f | 4990 | scalar_int_mode tmode = tmode_iter.require (); |
19a4dce4 | 4991 | if (GET_MODE_SIZE (tmode) > UNITS_PER_WORD) |
4992 | break; | |
4993 | ||
c13941f4 | 4994 | PUT_MODE (memory_extend_rtx, tmode); |
cb10db9d | 4995 | larger_elt = lookup (memory_extend_rtx, |
c13941f4 | 4996 | HASH (memory_extend_rtx, tmode), tmode); |
4997 | if (larger_elt == 0) | |
4998 | continue; | |
cb10db9d | 4999 | |
c13941f4 | 5000 | for (larger_elt = larger_elt->first_same_value; |
5001 | larger_elt; larger_elt = larger_elt->next_same_value) | |
8ad4c111 | 5002 | if (REG_P (larger_elt->exp)) |
c13941f4 | 5003 | { |
4a36ac44 | 5004 | src_related = gen_lowpart (int_mode, larger_elt->exp); |
c13941f4 | 5005 | break; |
5006 | } | |
cb10db9d | 5007 | |
c13941f4 | 5008 | if (src_related) |
5009 | break; | |
5010 | } | |
5011 | } | |
cb10db9d | 5012 | |
01c8e4c9 | 5013 | /* Try to express the constant using a register+offset expression |
5014 | derived from a constant anchor. */ | |
5015 | ||
5016 | if (targetm.const_anchor | |
5017 | && !src_related | |
5018 | && src_const | |
5019 | && GET_CODE (src_const) == CONST_INT) | |
5020 | { | |
5021 | src_related = try_const_anchors (src_const, mode); | |
5022 | src_related_is_const_anchor = src_related != NULL_RTX; | |
5023 | } | |
5024 | ||
5025 | ||
752df20e | 5026 | if (src == src_folded) |
cb10db9d | 5027 | src_folded = 0; |
752df20e | 5028 | |
d10cfa8d | 5029 | /* At this point, ELT, if nonzero, points to a class of expressions |
752df20e | 5030 | equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED, |
d10cfa8d | 5031 | and SRC_RELATED, if nonzero, each contain additional equivalent |
752df20e | 5032 | expressions. Prune these latter expressions by deleting expressions |
5033 | already in the equivalence class. | |
5034 | ||
5035 | Check for an equivalent identical to the destination. If found, | |
5036 | this is the preferred equivalent since it will likely lead to | |
5037 | elimination of the insn. Indicate this by placing it in | |
5038 | `src_related'. */ | |
5039 | ||
cb10db9d | 5040 | if (elt) |
5041 | elt = elt->first_same_value; | |
752df20e | 5042 | for (p = elt; p; p = p->next_same_value) |
cb10db9d | 5043 | { |
752df20e | 5044 | enum rtx_code code = GET_CODE (p->exp); |
5045 | ||
5046 | /* If the expression is not valid, ignore it. Then we do not | |
5047 | have to check for validity below. In most cases, we can use | |
5048 | `rtx_equal_p', since canonicalization has already been done. */ | |
78d140c9 | 5049 | if (code != REG && ! exp_equiv_p (p->exp, p->exp, 1, false)) |
752df20e | 5050 | continue; |
5051 | ||
47ac60a3 | 5052 | /* Also skip paradoxical subregs, unless that's what we're |
5053 | looking for. */ | |
b537bfdb | 5054 | if (paradoxical_subreg_p (p->exp) |
47ac60a3 | 5055 | && ! (src != 0 |
5056 | && GET_CODE (src) == SUBREG | |
5057 | && GET_MODE (src) == GET_MODE (p->exp) | |
974534ab | 5058 | && partial_subreg_p (GET_MODE (SUBREG_REG (src)), |
5059 | GET_MODE (SUBREG_REG (p->exp))))) | |
47ac60a3 | 5060 | continue; |
5061 | ||
cb10db9d | 5062 | if (src && GET_CODE (src) == code && rtx_equal_p (src, p->exp)) |
752df20e | 5063 | src = 0; |
cb10db9d | 5064 | else if (src_folded && GET_CODE (src_folded) == code |
752df20e | 5065 | && rtx_equal_p (src_folded, p->exp)) |
5066 | src_folded = 0; | |
cb10db9d | 5067 | else if (src_eqv_here && GET_CODE (src_eqv_here) == code |
752df20e | 5068 | && rtx_equal_p (src_eqv_here, p->exp)) |
5069 | src_eqv_here = 0; | |
cb10db9d | 5070 | else if (src_related && GET_CODE (src_related) == code |
752df20e | 5071 | && rtx_equal_p (src_related, p->exp)) |
5072 | src_related = 0; | |
5073 | ||
5074 | /* This is the same as the destination of the insns, we want | |
5075 | to prefer it. Copy it to src_related. The code below will | |
5076 | then give it a negative cost. */ | |
5077 | if (GET_CODE (dest) == code && rtx_equal_p (p->exp, dest)) | |
5078 | src_related = dest; | |
cb10db9d | 5079 | } |
752df20e | 5080 | |
5081 | /* Find the cheapest valid equivalent, trying all the available | |
5082 | possibilities. Prefer items not in the hash table to ones | |
5083 | that are when they are equal cost. Note that we can never | |
5084 | worsen an insn as the current contents will also succeed. | |
e2ef73d2 | 5085 | If we find an equivalent identical to the destination, use it as best, |
a92771b8 | 5086 | since this insn will probably be eliminated in that case. */ |
752df20e | 5087 | if (src) |
5088 | { | |
5089 | if (rtx_equal_p (src, dest)) | |
589ff9e7 | 5090 | src_cost = src_regcost = -1; |
752df20e | 5091 | else |
d27eb4b1 | 5092 | { |
5ae4887d | 5093 | src_cost = COST (src, mode); |
d27eb4b1 | 5094 | src_regcost = approx_reg_cost (src); |
5095 | } | |
752df20e | 5096 | } |
5097 | ||
5098 | if (src_eqv_here) | |
5099 | { | |
5100 | if (rtx_equal_p (src_eqv_here, dest)) | |
589ff9e7 | 5101 | src_eqv_cost = src_eqv_regcost = -1; |
752df20e | 5102 | else |
d27eb4b1 | 5103 | { |
5ae4887d | 5104 | src_eqv_cost = COST (src_eqv_here, mode); |
d27eb4b1 | 5105 | src_eqv_regcost = approx_reg_cost (src_eqv_here); |
5106 | } | |
752df20e | 5107 | } |
5108 | ||
5109 | if (src_folded) | |
5110 | { | |
5111 | if (rtx_equal_p (src_folded, dest)) | |
589ff9e7 | 5112 | src_folded_cost = src_folded_regcost = -1; |
752df20e | 5113 | else |
d27eb4b1 | 5114 | { |
5ae4887d | 5115 | src_folded_cost = COST (src_folded, mode); |
d27eb4b1 | 5116 | src_folded_regcost = approx_reg_cost (src_folded); |
5117 | } | |
752df20e | 5118 | } |
5119 | ||
5120 | if (src_related) | |
5121 | { | |
5122 | if (rtx_equal_p (src_related, dest)) | |
589ff9e7 | 5123 | src_related_cost = src_related_regcost = -1; |
752df20e | 5124 | else |
d27eb4b1 | 5125 | { |
5ae4887d | 5126 | src_related_cost = COST (src_related, mode); |
d27eb4b1 | 5127 | src_related_regcost = approx_reg_cost (src_related); |
01c8e4c9 | 5128 | |
5129 | /* If a const-anchor is used to synthesize a constant that | |
5130 | normally requires multiple instructions then slightly prefer | |
5131 | it over the original sequence. These instructions are likely | |
5132 | to become redundant now. We can't compare against the cost | |
5133 | of src_eqv_here because, on MIPS for example, multi-insn | |
5134 | constants have zero cost; they are assumed to be hoisted from | |
5135 | loops. */ | |
5136 | if (src_related_is_const_anchor | |
5137 | && src_related_cost == src_cost | |
5138 | && src_eqv_here) | |
5139 | src_related_cost--; | |
d27eb4b1 | 5140 | } |
752df20e | 5141 | } |
5142 | ||
5143 | /* If this was an indirect jump insn, a known label will really be | |
5144 | cheaper even though it looks more expensive. */ | |
5145 | if (dest == pc_rtx && src_const && GET_CODE (src_const) == LABEL_REF) | |
fb561825 | 5146 | src_folded = src_const, src_folded_cost = src_folded_regcost = -1; |
cb10db9d | 5147 | |
752df20e | 5148 | /* Terminate loop when replacement made. This must terminate since |
5149 | the current contents will be tested and will always be valid. */ | |
5150 | while (1) | |
cb10db9d | 5151 | { |
5152 | rtx trial; | |
752df20e | 5153 | |
cb10db9d | 5154 | /* Skip invalid entries. */ |
8ad4c111 | 5155 | while (elt && !REG_P (elt->exp) |
78d140c9 | 5156 | && ! exp_equiv_p (elt->exp, elt->exp, 1, false)) |
cb10db9d | 5157 | elt = elt->next_same_value; |
47ac60a3 | 5158 | |
5159 | /* A paradoxical subreg would be bad here: it'll be the right | |
5160 | size, but later may be adjusted so that the upper bits aren't | |
5161 | what we want. So reject it. */ | |
5162 | if (elt != 0 | |
b537bfdb | 5163 | && paradoxical_subreg_p (elt->exp) |
47ac60a3 | 5164 | /* It is okay, though, if the rtx we're trying to match |
5165 | will ignore any of the bits we can't predict. */ | |
5166 | && ! (src != 0 | |
5167 | && GET_CODE (src) == SUBREG | |
5168 | && GET_MODE (src) == GET_MODE (elt->exp) | |
974534ab | 5169 | && partial_subreg_p (GET_MODE (SUBREG_REG (src)), |
5170 | GET_MODE (SUBREG_REG (elt->exp))))) | |
47ac60a3 | 5171 | { |
5172 | elt = elt->next_same_value; | |
5173 | continue; | |
5174 | } | |
cb10db9d | 5175 | |
d4c5e26d | 5176 | if (elt) |
d27eb4b1 | 5177 | { |
5178 | src_elt_cost = elt->cost; | |
5179 | src_elt_regcost = elt->regcost; | |
5180 | } | |
752df20e | 5181 | |
d4c5e26d | 5182 | /* Find cheapest and skip it for the next time. For items |
752df20e | 5183 | of equal cost, use this order: |
5184 | src_folded, src, src_eqv, src_related and hash table entry. */ | |
fb561825 | 5185 | if (src_folded |
069eea26 | 5186 | && preferable (src_folded_cost, src_folded_regcost, |
5187 | src_cost, src_regcost) <= 0 | |
5188 | && preferable (src_folded_cost, src_folded_regcost, | |
5189 | src_eqv_cost, src_eqv_regcost) <= 0 | |
5190 | && preferable (src_folded_cost, src_folded_regcost, | |
5191 | src_related_cost, src_related_regcost) <= 0 | |
5192 | && preferable (src_folded_cost, src_folded_regcost, | |
5193 | src_elt_cost, src_elt_regcost) <= 0) | |
752df20e | 5194 | { |
589ff9e7 | 5195 | trial = src_folded, src_folded_cost = MAX_COST; |
752df20e | 5196 | if (src_folded_force_flag) |
d4a75790 | 5197 | { |
5198 | rtx forced = force_const_mem (mode, trial); | |
5199 | if (forced) | |
5200 | trial = forced; | |
5201 | } | |
752df20e | 5202 | } |
fb561825 | 5203 | else if (src |
069eea26 | 5204 | && preferable (src_cost, src_regcost, |
5205 | src_eqv_cost, src_eqv_regcost) <= 0 | |
5206 | && preferable (src_cost, src_regcost, | |
5207 | src_related_cost, src_related_regcost) <= 0 | |
5208 | && preferable (src_cost, src_regcost, | |
5209 | src_elt_cost, src_elt_regcost) <= 0) | |
589ff9e7 | 5210 | trial = src, src_cost = MAX_COST; |
fb561825 | 5211 | else if (src_eqv_here |
069eea26 | 5212 | && preferable (src_eqv_cost, src_eqv_regcost, |
5213 | src_related_cost, src_related_regcost) <= 0 | |
5214 | && preferable (src_eqv_cost, src_eqv_regcost, | |
5215 | src_elt_cost, src_elt_regcost) <= 0) | |
0806b508 | 5216 | trial = src_eqv_here, src_eqv_cost = MAX_COST; |
fb561825 | 5217 | else if (src_related |
069eea26 | 5218 | && preferable (src_related_cost, src_related_regcost, |
5219 | src_elt_cost, src_elt_regcost) <= 0) | |
0806b508 | 5220 | trial = src_related, src_related_cost = MAX_COST; |
cb10db9d | 5221 | else |
752df20e | 5222 | { |
0806b508 | 5223 | trial = elt->exp; |
752df20e | 5224 | elt = elt->next_same_value; |
589ff9e7 | 5225 | src_elt_cost = MAX_COST; |
752df20e | 5226 | } |
5227 | ||
a49d9163 | 5228 | /* Try to optimize |
5229 | (set (reg:M N) (const_int A)) | |
5230 | (set (reg:M2 O) (const_int B)) | |
5231 | (set (zero_extract:M2 (reg:M N) (const_int C) (const_int D)) | |
5232 | (reg:M2 O)). */ | |
5233 | if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT | |
5234 | && CONST_INT_P (trial) | |
5235 | && CONST_INT_P (XEXP (SET_DEST (sets[i].rtl), 1)) | |
5236 | && CONST_INT_P (XEXP (SET_DEST (sets[i].rtl), 2)) | |
5237 | && REG_P (XEXP (SET_DEST (sets[i].rtl), 0)) | |
3ce67adc | 5238 | && (known_ge |
5239 | (GET_MODE_PRECISION (GET_MODE (SET_DEST (sets[i].rtl))), | |
5240 | INTVAL (XEXP (SET_DEST (sets[i].rtl), 1)))) | |
a49d9163 | 5241 | && ((unsigned) INTVAL (XEXP (SET_DEST (sets[i].rtl), 1)) |
5242 | + (unsigned) INTVAL (XEXP (SET_DEST (sets[i].rtl), 2)) | |
5243 | <= HOST_BITS_PER_WIDE_INT)) | |
5244 | { | |
5245 | rtx dest_reg = XEXP (SET_DEST (sets[i].rtl), 0); | |
5246 | rtx width = XEXP (SET_DEST (sets[i].rtl), 1); | |
5247 | rtx pos = XEXP (SET_DEST (sets[i].rtl), 2); | |
5248 | unsigned int dest_hash = HASH (dest_reg, GET_MODE (dest_reg)); | |
5249 | struct table_elt *dest_elt | |
5250 | = lookup (dest_reg, dest_hash, GET_MODE (dest_reg)); | |
5251 | rtx dest_cst = NULL; | |
5252 | ||
5253 | if (dest_elt) | |
5254 | for (p = dest_elt->first_same_value; p; p = p->next_same_value) | |
5255 | if (p->is_const && CONST_INT_P (p->exp)) | |
5256 | { | |
5257 | dest_cst = p->exp; | |
5258 | break; | |
5259 | } | |
5260 | if (dest_cst) | |
5261 | { | |
5262 | HOST_WIDE_INT val = INTVAL (dest_cst); | |
5263 | HOST_WIDE_INT mask; | |
5264 | unsigned int shift; | |
7a6aeeed | 5265 | /* This is the mode of DEST_CST as well. */ |
5266 | scalar_int_mode dest_mode | |
5267 | = as_a <scalar_int_mode> (GET_MODE (dest_reg)); | |
a49d9163 | 5268 | if (BITS_BIG_ENDIAN) |
7a6aeeed | 5269 | shift = GET_MODE_PRECISION (dest_mode) |
a49d9163 | 5270 | - INTVAL (pos) - INTVAL (width); |
5271 | else | |
5272 | shift = INTVAL (pos); | |
5273 | if (INTVAL (width) == HOST_BITS_PER_WIDE_INT) | |
7097b942 | 5274 | mask = HOST_WIDE_INT_M1; |
a49d9163 | 5275 | else |
edc19fd0 | 5276 | mask = (HOST_WIDE_INT_1 << INTVAL (width)) - 1; |
a49d9163 | 5277 | val &= ~(mask << shift); |
5278 | val |= (INTVAL (trial) & mask) << shift; | |
7a6aeeed | 5279 | val = trunc_int_for_mode (val, dest_mode); |
a49d9163 | 5280 | validate_unshare_change (insn, &SET_DEST (sets[i].rtl), |
5281 | dest_reg, 1); | |
5282 | validate_unshare_change (insn, &SET_SRC (sets[i].rtl), | |
5283 | GEN_INT (val), 1); | |
5284 | if (apply_change_group ()) | |
5285 | { | |
5286 | rtx note = find_reg_note (insn, REG_EQUAL, NULL_RTX); | |
5287 | if (note) | |
5288 | { | |
5289 | remove_note (insn, note); | |
5290 | df_notes_rescan (insn); | |
5291 | } | |
5292 | src_eqv = NULL_RTX; | |
5293 | src_eqv_elt = NULL; | |
5294 | src_eqv_volatile = 0; | |
5295 | src_eqv_in_memory = 0; | |
5296 | src_eqv_hash = 0; | |
5297 | repeat = true; | |
5298 | break; | |
5299 | } | |
5300 | } | |
5301 | } | |
5302 | ||
752df20e | 5303 | /* We don't normally have an insn matching (set (pc) (pc)), so |
5304 | check for this separately here. We will delete such an | |
5305 | insn below. | |
5306 | ||
0f48207f | 5307 | For other cases such as a table jump or conditional jump |
5308 | where we know the ultimate target, go ahead and replace the | |
5309 | operand. While that may not make a valid insn, we will | |
5310 | reemit the jump below (and also insert any necessary | |
5311 | barriers). */ | |
752df20e | 5312 | if (n_sets == 1 && dest == pc_rtx |
5313 | && (trial == pc_rtx | |
5314 | || (GET_CODE (trial) == LABEL_REF | |
5315 | && ! condjump_p (insn)))) | |
5316 | { | |
806351c6 | 5317 | /* Don't substitute non-local labels, this confuses CFG. */ |
5318 | if (GET_CODE (trial) == LABEL_REF | |
5319 | && LABEL_REF_NONLOCAL_P (trial)) | |
5320 | continue; | |
5321 | ||
0f48207f | 5322 | SET_SRC (sets[i].rtl) = trial; |
283a6b26 | 5323 | cse_jumps_altered = true; |
752df20e | 5324 | break; |
5325 | } | |
cb10db9d | 5326 | |
663f4248 | 5327 | /* Similarly, lots of targets don't allow no-op |
5328 | (set (mem x) (mem x)) moves. */ | |
5329 | else if (n_sets == 1 | |
5330 | && MEM_P (trial) | |
5331 | && MEM_P (dest) | |
5332 | && rtx_equal_p (trial, dest) | |
5333 | && !side_effects_p (dest) | |
5334 | && (cfun->can_delete_dead_exceptions | |
5335 | || insn_nothrow_p (insn))) | |
5336 | { | |
5337 | SET_SRC (sets[i].rtl) = trial; | |
5338 | mem_noop_insn = true; | |
5339 | break; | |
5340 | } | |
5341 | ||
0ab04fbf | 5342 | /* Reject certain invalid forms of CONST that we create. */ |
5343 | else if (CONSTANT_P (trial) | |
5344 | && GET_CODE (trial) == CONST | |
5345 | /* Reject cases that will cause decode_rtx_const to | |
5346 | die. On the alpha when simplifying a switch, we | |
5347 | get (const (truncate (minus (label_ref) | |
5348 | (label_ref)))). */ | |
5349 | && (GET_CODE (XEXP (trial, 0)) == TRUNCATE | |
5350 | /* Likewise on IA-64, except without the | |
5351 | truncate. */ | |
5352 | || (GET_CODE (XEXP (trial, 0)) == MINUS | |
5353 | && GET_CODE (XEXP (XEXP (trial, 0), 0)) == LABEL_REF | |
5354 | && GET_CODE (XEXP (XEXP (trial, 0), 1)) == LABEL_REF))) | |
5355 | /* Do nothing for this case. */ | |
5356 | ; | |
5357 | ||
82db3d4a | 5358 | /* Do not replace anything with a MEM, except the replacement |
5359 | is a no-op. This allows this loop to terminate. */ | |
5360 | else if (MEM_P (trial) && !rtx_equal_p (trial, SET_SRC(sets[i].rtl))) | |
5361 | /* Do nothing for this case. */ | |
5362 | ; | |
5363 | ||
752df20e | 5364 | /* Look for a substitution that makes a valid insn. */ |
20d3ff08 | 5365 | else if (validate_unshare_change (insn, &SET_SRC (sets[i].rtl), |
5366 | trial, 0)) | |
e2ef73d2 | 5367 | { |
d328ebdf | 5368 | rtx new_rtx = canon_reg (SET_SRC (sets[i].rtl), insn); |
e30d7fb3 | 5369 | |
8d5dd220 | 5370 | /* The result of apply_change_group can be ignored; see |
5371 | canon_reg. */ | |
5372 | ||
d328ebdf | 5373 | validate_change (insn, &SET_SRC (sets[i].rtl), new_rtx, 1); |
e443ebaf | 5374 | apply_change_group (); |
be22716f | 5375 | |
e2ef73d2 | 5376 | break; |
5377 | } | |
752df20e | 5378 | |
cb10db9d | 5379 | /* If we previously found constant pool entries for |
752df20e | 5380 | constants and this is a constant, try making a |
5381 | pool entry. Put it in src_folded unless we already have done | |
5382 | this since that is where it likely came from. */ | |
5383 | ||
5384 | else if (constant_pool_entries_cost | |
5385 | && CONSTANT_P (trial) | |
88f6e1a4 | 5386 | && (src_folded == 0 |
e16ceb8e | 5387 | || (!MEM_P (src_folded) |
88f6e1a4 | 5388 | && ! src_folded_force_flag)) |
ea0cb7ae | 5389 | && GET_MODE_CLASS (mode) != MODE_CC |
5390 | && mode != VOIDmode) | |
752df20e | 5391 | { |
5392 | src_folded_force_flag = 1; | |
5393 | src_folded = trial; | |
5394 | src_folded_cost = constant_pool_entries_cost; | |
634d45d7 | 5395 | src_folded_regcost = constant_pool_entries_regcost; |
752df20e | 5396 | } |
cb10db9d | 5397 | } |
752df20e | 5398 | |
a49d9163 | 5399 | /* If we changed the insn too much, handle this set from scratch. */ |
5400 | if (repeat) | |
5401 | { | |
5402 | i--; | |
5403 | continue; | |
5404 | } | |
5405 | ||
752df20e | 5406 | src = SET_SRC (sets[i].rtl); |
5407 | ||
5408 | /* In general, it is good to have a SET with SET_SRC == SET_DEST. | |
5409 | However, there is an important exception: If both are registers | |
5410 | that are not the head of their equivalence class, replace SET_SRC | |
5411 | with the head of the class. If we do not do this, we will have | |
5412 | both registers live over a portion of the basic block. This way, | |
5413 | their lifetimes will likely abut instead of overlapping. */ | |
8ad4c111 | 5414 | if (REG_P (dest) |
a7f3b1c7 | 5415 | && REGNO_QTY_VALID_P (REGNO (dest))) |
752df20e | 5416 | { |
a7f3b1c7 | 5417 | int dest_q = REG_QTY (REGNO (dest)); |
5418 | struct qty_table_elem *dest_ent = &qty_table[dest_q]; | |
5419 | ||
5420 | if (dest_ent->mode == GET_MODE (dest) | |
5421 | && dest_ent->first_reg != REGNO (dest) | |
8ad4c111 | 5422 | && REG_P (src) && REGNO (src) == REGNO (dest) |
a7f3b1c7 | 5423 | /* Don't do this if the original insn had a hard reg as |
5424 | SET_SRC or SET_DEST. */ | |
8ad4c111 | 5425 | && (!REG_P (sets[i].src) |
a7f3b1c7 | 5426 | || REGNO (sets[i].src) >= FIRST_PSEUDO_REGISTER) |
8ad4c111 | 5427 | && (!REG_P (dest) || REGNO (dest) >= FIRST_PSEUDO_REGISTER)) |
a7f3b1c7 | 5428 | /* We can't call canon_reg here because it won't do anything if |
5429 | SRC is a hard register. */ | |
05b1716f | 5430 | { |
a7f3b1c7 | 5431 | int src_q = REG_QTY (REGNO (src)); |
5432 | struct qty_table_elem *src_ent = &qty_table[src_q]; | |
5433 | int first = src_ent->first_reg; | |
5434 | rtx new_src | |
5435 | = (first >= FIRST_PSEUDO_REGISTER | |
5436 | ? regno_reg_rtx[first] : gen_rtx_REG (GET_MODE (src), first)); | |
5437 | ||
5438 | /* We must use validate-change even for this, because this | |
5439 | might be a special no-op instruction, suitable only to | |
5440 | tag notes onto. */ | |
5441 | if (validate_change (insn, &SET_SRC (sets[i].rtl), new_src, 0)) | |
5442 | { | |
5443 | src = new_src; | |
5444 | /* If we had a constant that is cheaper than what we are now | |
5445 | setting SRC to, use that constant. We ignored it when we | |
5446 | thought we could make this into a no-op. */ | |
5ae4887d | 5447 | if (src_const && COST (src_const, mode) < COST (src, mode) |
cb10db9d | 5448 | && validate_change (insn, &SET_SRC (sets[i].rtl), |
5449 | src_const, 0)) | |
a7f3b1c7 | 5450 | src = src_const; |
5451 | } | |
05b1716f | 5452 | } |
752df20e | 5453 | } |
5454 | ||
5455 | /* If we made a change, recompute SRC values. */ | |
5456 | if (src != sets[i].src) | |
cb10db9d | 5457 | { |
cb10db9d | 5458 | do_not_record = 0; |
5459 | hash_arg_in_memory = 0; | |
752df20e | 5460 | sets[i].src = src; |
cb10db9d | 5461 | sets[i].src_hash = HASH (src, mode); |
5462 | sets[i].src_volatile = do_not_record; | |
5463 | sets[i].src_in_memory = hash_arg_in_memory; | |
5464 | sets[i].src_elt = lookup (src, sets[i].src_hash, mode); | |
5465 | } | |
752df20e | 5466 | |
5467 | /* If this is a single SET, we are setting a register, and we have an | |
a24ec999 | 5468 | equivalent constant, we want to add a REG_EQUAL note if the constant |
5469 | is different from the source. We don't want to do it for a constant | |
5470 | pseudo since verifying that this pseudo hasn't been eliminated is a | |
5471 | pain; moreover such a note won't help anything. | |
f5d1f9f9 | 5472 | |
5473 | Avoid a REG_EQUAL note for (CONST (MINUS (LABEL_REF) (LABEL_REF))) | |
5474 | which can be created for a reference to a compile time computable | |
5475 | entry in a jump table. */ | |
a24ec999 | 5476 | if (n_sets == 1 |
5477 | && REG_P (dest) | |
5478 | && src_const | |
8ad4c111 | 5479 | && !REG_P (src_const) |
a24ec999 | 5480 | && !(GET_CODE (src_const) == SUBREG |
5481 | && REG_P (SUBREG_REG (src_const))) | |
5482 | && !(GET_CODE (src_const) == CONST | |
5483 | && GET_CODE (XEXP (src_const, 0)) == MINUS | |
5484 | && GET_CODE (XEXP (XEXP (src_const, 0), 0)) == LABEL_REF | |
5485 | && GET_CODE (XEXP (XEXP (src_const, 0), 1)) == LABEL_REF) | |
5486 | && !rtx_equal_p (src, src_const)) | |
752df20e | 5487 | { |
a24ec999 | 5488 | /* Make sure that the rtx is not shared. */ |
5489 | src_const = copy_rtx (src_const); | |
c69ad724 | 5490 | |
a24ec999 | 5491 | /* Record the actual constant value in a REG_EQUAL note, |
5492 | making a new one if one does not already exist. */ | |
5493 | set_unique_reg_note (insn, REG_EQUAL, src_const); | |
5494 | df_notes_rescan (insn); | |
752df20e | 5495 | } |
5496 | ||
5497 | /* Now deal with the destination. */ | |
5498 | do_not_record = 0; | |
752df20e | 5499 | |
476d094d | 5500 | /* Look within any ZERO_EXTRACT to the MEM or REG within it. */ |
5501 | while (GET_CODE (dest) == SUBREG | |
752df20e | 5502 | || GET_CODE (dest) == ZERO_EXTRACT |
752df20e | 5503 | || GET_CODE (dest) == STRICT_LOW_PART) |
8f4cc641 | 5504 | dest = XEXP (dest, 0); |
752df20e | 5505 | |
5506 | sets[i].inner_dest = dest; | |
5507 | ||
e16ceb8e | 5508 | if (MEM_P (dest)) |
752df20e | 5509 | { |
ea0cb7ae | 5510 | #ifdef PUSH_ROUNDING |
5511 | /* Stack pushes invalidate the stack pointer. */ | |
5512 | rtx addr = XEXP (dest, 0); | |
6720e96c | 5513 | if (GET_RTX_CLASS (GET_CODE (addr)) == RTX_AUTOINC |
ea0cb7ae | 5514 | && XEXP (addr, 0) == stack_pointer_rtx) |
4c958a22 | 5515 | invalidate (stack_pointer_rtx, VOIDmode); |
ea0cb7ae | 5516 | #endif |
752df20e | 5517 | dest = fold_rtx (dest, insn); |
752df20e | 5518 | } |
5519 | ||
5520 | /* Compute the hash code of the destination now, | |
5521 | before the effects of this instruction are recorded, | |
5522 | since the register values used in the address computation | |
5523 | are those before this instruction. */ | |
952bc06d | 5524 | sets[i].dest_hash = HASH (dest, mode); |
752df20e | 5525 | |
5526 | /* Don't enter a bit-field in the hash table | |
5527 | because the value in it after the store | |
5528 | may not equal what was stored, due to truncation. */ | |
5529 | ||
476d094d | 5530 | if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT) |
752df20e | 5531 | { |
5532 | rtx width = XEXP (SET_DEST (sets[i].rtl), 1); | |
5533 | ||
971ba038 | 5534 | if (src_const != 0 && CONST_INT_P (src_const) |
5535 | && CONST_INT_P (width) | |
b572011e | 5536 | && INTVAL (width) < HOST_BITS_PER_WIDE_INT |
5537 | && ! (INTVAL (src_const) | |
561f0ec8 | 5538 | & (HOST_WIDE_INT_M1U << INTVAL (width)))) |
752df20e | 5539 | /* Exception: if the value is constant, |
5540 | and it won't be truncated, record it. */ | |
5541 | ; | |
5542 | else | |
5543 | { | |
5544 | /* This is chosen so that the destination will be invalidated | |
5545 | but no new value will be recorded. | |
5546 | We must invalidate because sometimes constant | |
5547 | values can be recorded for bitfields. */ | |
5548 | sets[i].src_elt = 0; | |
5549 | sets[i].src_volatile = 1; | |
5550 | src_eqv = 0; | |
5551 | src_eqv_elt = 0; | |
5552 | } | |
5553 | } | |
5554 | ||
5555 | /* If only one set in a JUMP_INSN and it is now a no-op, we can delete | |
5556 | the insn. */ | |
5557 | else if (n_sets == 1 && dest == pc_rtx && src == pc_rtx) | |
5558 | { | |
25999090 | 5559 | /* One less use of the label this insn used to jump to. */ |
bfa8ea12 | 5560 | cse_cfg_altered |= delete_insn_and_edges (insn); |
283a6b26 | 5561 | cse_jumps_altered = true; |
752df20e | 5562 | /* No more processing for this set. */ |
5563 | sets[i].rtl = 0; | |
5564 | } | |
5565 | ||
663f4248 | 5566 | /* Similarly for no-op MEM moves. */ |
5567 | else if (mem_noop_insn) | |
5568 | { | |
5569 | if (cfun->can_throw_non_call_exceptions && can_throw_internal (insn)) | |
5570 | cse_cfg_altered = true; | |
bfa8ea12 | 5571 | cse_cfg_altered |= delete_insn_and_edges (insn); |
663f4248 | 5572 | /* No more processing for this set. */ |
5573 | sets[i].rtl = 0; | |
5574 | } | |
5575 | ||
752df20e | 5576 | /* If this SET is now setting PC to a label, we know it used to |
0f48207f | 5577 | be a conditional or computed branch. */ |
9d95b2b0 | 5578 | else if (dest == pc_rtx && GET_CODE (src) == LABEL_REF |
5579 | && !LABEL_REF_NONLOCAL_P (src)) | |
752df20e | 5580 | { |
0f48207f | 5581 | /* We reemit the jump in as many cases as possible just in |
5582 | case the form of an unconditional jump is significantly | |
5583 | different than a computed jump or conditional jump. | |
5584 | ||
5585 | If this insn has multiple sets, then reemitting the | |
5586 | jump is nontrivial. So instead we just force rerecognition | |
5587 | and hope for the best. */ | |
5588 | if (n_sets == 1) | |
752df20e | 5589 | { |
9ed997be | 5590 | rtx_jump_insn *new_rtx; |
32a6f3ca | 5591 | rtx note; |
743ce3f8 | 5592 | |
1d5ad681 | 5593 | rtx_insn *seq = targetm.gen_jump (XEXP (src, 0)); |
5594 | new_rtx = emit_jump_insn_before (seq, insn); | |
d328ebdf | 5595 | JUMP_LABEL (new_rtx) = XEXP (src, 0); |
752df20e | 5596 | LABEL_NUSES (XEXP (src, 0))++; |
9074c68b | 5597 | |
5598 | /* Make sure to copy over REG_NON_LOCAL_GOTO. */ | |
5599 | note = find_reg_note (insn, REG_NON_LOCAL_GOTO, 0); | |
5600 | if (note) | |
5601 | { | |
5602 | XEXP (note, 1) = NULL_RTX; | |
d328ebdf | 5603 | REG_NOTES (new_rtx) = note; |
9074c68b | 5604 | } |
5605 | ||
bfa8ea12 | 5606 | cse_cfg_altered |= delete_insn_and_edges (insn); |
32a6f3ca | 5607 | insn = new_rtx; |
752df20e | 5608 | } |
d578a436 | 5609 | else |
d578a436 | 5610 | INSN_CODE (insn) = -1; |
752df20e | 5611 | |
283a6b26 | 5612 | /* Do not bother deleting any unreachable code, let jump do it. */ |
5613 | cse_jumps_altered = true; | |
752df20e | 5614 | sets[i].rtl = 0; |
5615 | } | |
5616 | ||
8cdd0f84 | 5617 | /* If destination is volatile, invalidate it and then do no further |
5618 | processing for this assignment. */ | |
752df20e | 5619 | |
5620 | else if (do_not_record) | |
8cdd0f84 | 5621 | { |
7a49a822 | 5622 | invalidate_dest (dest); |
8cdd0f84 | 5623 | sets[i].rtl = 0; |
5624 | } | |
752df20e | 5625 | |
5626 | if (sets[i].rtl != 0 && dest != SET_DEST (sets[i].rtl)) | |
7a49a822 | 5627 | { |
5628 | do_not_record = 0; | |
5629 | sets[i].dest_hash = HASH (SET_DEST (sets[i].rtl), mode); | |
5630 | if (do_not_record) | |
5631 | { | |
5632 | invalidate_dest (SET_DEST (sets[i].rtl)); | |
5633 | sets[i].rtl = 0; | |
5634 | } | |
5635 | } | |
752df20e | 5636 | |
752df20e | 5637 | /* If setting CC0, record what it was set to, or a constant, if it |
5638 | is equivalent to a constant. If it is being set to a floating-point | |
5639 | value, make a COMPARE with the appropriate constant of 0. If we | |
5640 | don't do this, later code can interpret this as a test against | |
5641 | const0_rtx, which can cause problems if we try to put it into an | |
5642 | insn as a floating-point operand. */ | |
5643 | if (dest == cc0_rtx) | |
5644 | { | |
5645 | this_insn_cc0 = src_const && mode != VOIDmode ? src_const : src; | |
5646 | this_insn_cc0_mode = mode; | |
c1712420 | 5647 | if (FLOAT_MODE_P (mode)) |
941522d6 | 5648 | this_insn_cc0 = gen_rtx_COMPARE (VOIDmode, this_insn_cc0, |
5649 | CONST0_RTX (mode)); | |
752df20e | 5650 | } |
752df20e | 5651 | } |
5652 | ||
5653 | /* Now enter all non-volatile source expressions in the hash table | |
5654 | if they are not already present. | |
5655 | Record their equivalence classes in src_elt. | |
5656 | This way we can insert the corresponding destinations into | |
5657 | the same classes even if the actual sources are no longer in them | |
5658 | (having been invalidated). */ | |
5659 | ||
5660 | if (src_eqv && src_eqv_elt == 0 && sets[0].rtl != 0 && ! src_eqv_volatile | |
5661 | && ! rtx_equal_p (src_eqv, SET_DEST (sets[0].rtl))) | |
5662 | { | |
19cb6b50 | 5663 | struct table_elt *elt; |
5664 | struct table_elt *classp = sets[0].src_elt; | |
752df20e | 5665 | rtx dest = SET_DEST (sets[0].rtl); |
3754d046 | 5666 | machine_mode eqvmode = GET_MODE (dest); |
752df20e | 5667 | |
5668 | if (GET_CODE (dest) == STRICT_LOW_PART) | |
5669 | { | |
5670 | eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0))); | |
5671 | classp = 0; | |
5672 | } | |
5673 | if (insert_regs (src_eqv, classp, 0)) | |
1b033cc3 | 5674 | { |
5675 | rehash_using_reg (src_eqv); | |
5676 | src_eqv_hash = HASH (src_eqv, eqvmode); | |
5677 | } | |
952bc06d | 5678 | elt = insert (src_eqv, classp, src_eqv_hash, eqvmode); |
752df20e | 5679 | elt->in_memory = src_eqv_in_memory; |
752df20e | 5680 | src_eqv_elt = elt; |
c697ea36 | 5681 | |
5682 | /* Check to see if src_eqv_elt is the same as a set source which | |
5683 | does not yet have an elt, and if so set the elt of the set source | |
5684 | to src_eqv_elt. */ | |
5685 | for (i = 0; i < n_sets; i++) | |
cf541778 | 5686 | if (sets[i].rtl && sets[i].src_elt == 0 |
5687 | && rtx_equal_p (SET_SRC (sets[i].rtl), src_eqv)) | |
c697ea36 | 5688 | sets[i].src_elt = src_eqv_elt; |
752df20e | 5689 | } |
5690 | ||
5691 | for (i = 0; i < n_sets; i++) | |
5692 | if (sets[i].rtl && ! sets[i].src_volatile | |
5693 | && ! rtx_equal_p (SET_SRC (sets[i].rtl), SET_DEST (sets[i].rtl))) | |
5694 | { | |
5695 | if (GET_CODE (SET_DEST (sets[i].rtl)) == STRICT_LOW_PART) | |
5696 | { | |
5697 | /* REG_EQUAL in setting a STRICT_LOW_PART | |
5698 | gives an equivalent for the entire destination register, | |
5699 | not just for the subreg being stored in now. | |
5700 | This is a more interesting equivalence, so we arrange later | |
5701 | to treat the entire reg as the destination. */ | |
5702 | sets[i].src_elt = src_eqv_elt; | |
952bc06d | 5703 | sets[i].src_hash = src_eqv_hash; |
752df20e | 5704 | } |
5705 | else | |
5706 | { | |
5707 | /* Insert source and constant equivalent into hash table, if not | |
5708 | already present. */ | |
19cb6b50 | 5709 | struct table_elt *classp = src_eqv_elt; |
5710 | rtx src = sets[i].src; | |
5711 | rtx dest = SET_DEST (sets[i].rtl); | |
3754d046 | 5712 | machine_mode mode |
752df20e | 5713 | = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src); |
5714 | ||
3c512ee7 | 5715 | /* It's possible that we have a source value known to be |
5716 | constant but don't have a REG_EQUAL note on the insn. | |
5717 | Lack of a note will mean src_eqv_elt will be NULL. This | |
5718 | can happen where we've generated a SUBREG to access a | |
5719 | CONST_INT that is already in a register in a wider mode. | |
5720 | Ensure that the source expression is put in the proper | |
5721 | constant class. */ | |
5722 | if (!classp) | |
5723 | classp = sets[i].src_const_elt; | |
5724 | ||
cf541778 | 5725 | if (sets[i].src_elt == 0) |
752df20e | 5726 | { |
1e5b92fa | 5727 | struct table_elt *elt; |
cf541778 | 5728 | |
1e5b92fa | 5729 | /* Note that these insert_regs calls cannot remove |
5730 | any of the src_elt's, because they would have failed to | |
5731 | match if not still valid. */ | |
5732 | if (insert_regs (src, classp, 0)) | |
5733 | { | |
5734 | rehash_using_reg (src); | |
5735 | sets[i].src_hash = HASH (src, mode); | |
1b033cc3 | 5736 | } |
1e5b92fa | 5737 | elt = insert (src, classp, sets[i].src_hash, mode); |
5738 | elt->in_memory = sets[i].src_in_memory; | |
20d3ff08 | 5739 | /* If inline asm has any clobbers, ensure we only reuse |
5740 | existing inline asms and never try to put the ASM_OPERANDS | |
5741 | into an insn that isn't inline asm. */ | |
5742 | if (GET_CODE (src) == ASM_OPERANDS | |
5743 | && GET_CODE (x) == PARALLEL) | |
5744 | elt->cost = MAX_COST; | |
1e5b92fa | 5745 | sets[i].src_elt = classp = elt; |
752df20e | 5746 | } |
752df20e | 5747 | if (sets[i].src_const && sets[i].src_const_elt == 0 |
5748 | && src != sets[i].src_const | |
5749 | && ! rtx_equal_p (sets[i].src_const, src)) | |
5750 | sets[i].src_elt = insert (sets[i].src_const, classp, | |
952bc06d | 5751 | sets[i].src_const_hash, mode); |
752df20e | 5752 | } |
5753 | } | |
5754 | else if (sets[i].src_elt == 0) | |
5755 | /* If we did not insert the source into the hash table (e.g., it was | |
5756 | volatile), note the equivalence class for the REG_EQUAL value, if any, | |
5757 | so that the destination goes into that class. */ | |
5758 | sets[i].src_elt = src_eqv_elt; | |
5759 | ||
977ffed2 | 5760 | /* Record destination addresses in the hash table. This allows us to |
5761 | check if they are invalidated by other sets. */ | |
5762 | for (i = 0; i < n_sets; i++) | |
5763 | { | |
5764 | if (sets[i].rtl) | |
5765 | { | |
5766 | rtx x = sets[i].inner_dest; | |
5767 | struct table_elt *elt; | |
3754d046 | 5768 | machine_mode mode; |
977ffed2 | 5769 | unsigned hash; |
5770 | ||
5771 | if (MEM_P (x)) | |
5772 | { | |
5773 | x = XEXP (x, 0); | |
5774 | mode = GET_MODE (x); | |
5775 | hash = HASH (x, mode); | |
5776 | elt = lookup (x, hash, mode); | |
5777 | if (!elt) | |
5778 | { | |
5779 | if (insert_regs (x, NULL, 0)) | |
5780 | { | |
06320855 | 5781 | rtx dest = SET_DEST (sets[i].rtl); |
5782 | ||
977ffed2 | 5783 | rehash_using_reg (x); |
5784 | hash = HASH (x, mode); | |
06320855 | 5785 | sets[i].dest_hash = HASH (dest, GET_MODE (dest)); |
977ffed2 | 5786 | } |
5787 | elt = insert (x, NULL, hash, mode); | |
5788 | } | |
5789 | ||
5790 | sets[i].dest_addr_elt = elt; | |
5791 | } | |
5792 | else | |
5793 | sets[i].dest_addr_elt = NULL; | |
5794 | } | |
5795 | } | |
5796 | ||
2aca5650 | 5797 | invalidate_from_clobbers (insn); |
8b82837b | 5798 | |
cb10db9d | 5799 | /* Some registers are invalidated by subroutine calls. Memory is |
8b82837b | 5800 | invalidated by non-constant calls. */ |
5801 | ||
6d7dc5b9 | 5802 | if (CALL_P (insn)) |
752df20e | 5803 | { |
9c2a0c05 | 5804 | if (!(RTL_CONST_OR_PURE_CALL_P (insn))) |
ea0cb7ae | 5805 | invalidate_memory (); |
33698dfe | 5806 | else |
5807 | /* For const/pure calls, invalidate any argument slots, because | |
5808 | those are owned by the callee. */ | |
5809 | for (tem = CALL_INSN_FUNCTION_USAGE (insn); tem; tem = XEXP (tem, 1)) | |
5810 | if (GET_CODE (XEXP (tem, 0)) == USE | |
5811 | && MEM_P (XEXP (XEXP (tem, 0), 0))) | |
5812 | invalidate (XEXP (XEXP (tem, 0), 0), VOIDmode); | |
7e871eb5 | 5813 | invalidate_for_call (insn); |
752df20e | 5814 | } |
5815 | ||
5816 | /* Now invalidate everything set by this instruction. | |
5817 | If a SUBREG or other funny destination is being set, | |
5818 | sets[i].rtl is still nonzero, so here we invalidate the reg | |
5819 | a part of which is being set. */ | |
5820 | ||
5821 | for (i = 0; i < n_sets; i++) | |
5822 | if (sets[i].rtl) | |
5823 | { | |
fdb25961 | 5824 | /* We can't use the inner dest, because the mode associated with |
5825 | a ZERO_EXTRACT is significant. */ | |
19cb6b50 | 5826 | rtx dest = SET_DEST (sets[i].rtl); |
752df20e | 5827 | |
5828 | /* Needed for registers to remove the register from its | |
5829 | previous quantity's chain. | |
5830 | Needed for memory if this is a nonvarying address, unless | |
5831 | we have just done an invalidate_memory that covers even those. */ | |
8ad4c111 | 5832 | if (REG_P (dest) || GET_CODE (dest) == SUBREG) |
fdb25961 | 5833 | invalidate (dest, VOIDmode); |
e16ceb8e | 5834 | else if (MEM_P (dest)) |
2046d6d5 | 5835 | invalidate (dest, VOIDmode); |
319134e7 | 5836 | else if (GET_CODE (dest) == STRICT_LOW_PART |
5837 | || GET_CODE (dest) == ZERO_EXTRACT) | |
fdb25961 | 5838 | invalidate (XEXP (dest, 0), GET_MODE (dest)); |
752df20e | 5839 | } |
5840 | ||
be22716f | 5841 | /* Don't cse over a call to setjmp; on some machines (eg VAX) |
5842 | the regs restored by the longjmp come from a later time | |
5843 | than the setjmp. */ | |
5844 | if (CALL_P (insn) && find_reg_note (insn, REG_SETJMP, NULL)) | |
5845 | { | |
5846 | flush_hash_table (); | |
5847 | goto done; | |
5848 | } | |
5849 | ||
752df20e | 5850 | /* Make sure registers mentioned in destinations |
5851 | are safe for use in an expression to be inserted. | |
5852 | This removes from the hash table | |
5853 | any invalid entry that refers to one of these registers. | |
5854 | ||
5855 | We don't care about the return value from mention_regs because | |
5856 | we are going to hash the SET_DEST values unconditionally. */ | |
5857 | ||
5858 | for (i = 0; i < n_sets; i++) | |
e6860d27 | 5859 | { |
5860 | if (sets[i].rtl) | |
5861 | { | |
5862 | rtx x = SET_DEST (sets[i].rtl); | |
5863 | ||
8ad4c111 | 5864 | if (!REG_P (x)) |
e6860d27 | 5865 | mention_regs (x); |
5866 | else | |
5867 | { | |
5868 | /* We used to rely on all references to a register becoming | |
5869 | inaccessible when a register changes to a new quantity, | |
5870 | since that changes the hash code. However, that is not | |
9c4f3716 | 5871 | safe, since after HASH_SIZE new quantities we get a |
e6860d27 | 5872 | hash 'collision' of a register with its own invalid |
5873 | entries. And since SUBREGs have been changed not to | |
5874 | change their hash code with the hash code of the register, | |
5875 | it wouldn't work any longer at all. So we have to check | |
5876 | for any invalid references lying around now. | |
5877 | This code is similar to the REG case in mention_regs, | |
5878 | but it knows that reg_tick has been incremented, and | |
5879 | it leaves reg_in_table as -1 . */ | |
02e7a332 | 5880 | unsigned int regno = REGNO (x); |
a2c6f0b7 | 5881 | unsigned int endregno = END_REGNO (x); |
02e7a332 | 5882 | unsigned int i; |
e6860d27 | 5883 | |
5884 | for (i = regno; i < endregno; i++) | |
5885 | { | |
d1264606 | 5886 | if (REG_IN_TABLE (i) >= 0) |
e6860d27 | 5887 | { |
5888 | remove_invalid_refs (i); | |
d1264606 | 5889 | REG_IN_TABLE (i) = -1; |
e6860d27 | 5890 | } |
5891 | } | |
5892 | } | |
5893 | } | |
5894 | } | |
752df20e | 5895 | |
5896 | /* We may have just removed some of the src_elt's from the hash table. | |
977ffed2 | 5897 | So replace each one with the current head of the same class. |
5898 | Also check if destination addresses have been removed. */ | |
752df20e | 5899 | |
5900 | for (i = 0; i < n_sets; i++) | |
5901 | if (sets[i].rtl) | |
5902 | { | |
977ffed2 | 5903 | if (sets[i].dest_addr_elt |
5904 | && sets[i].dest_addr_elt->first_same_value == 0) | |
5905 | { | |
d249588e | 5906 | /* The elt was removed, which means this destination is not |
977ffed2 | 5907 | valid after this instruction. */ |
5908 | sets[i].rtl = NULL_RTX; | |
5909 | } | |
5910 | else if (sets[i].src_elt && sets[i].src_elt->first_same_value == 0) | |
752df20e | 5911 | /* If elt was removed, find current head of same class, |
5912 | or 0 if nothing remains of that class. */ | |
5913 | { | |
19cb6b50 | 5914 | struct table_elt *elt = sets[i].src_elt; |
752df20e | 5915 | |
5916 | while (elt && elt->prev_same_value) | |
5917 | elt = elt->prev_same_value; | |
5918 | ||
5919 | while (elt && elt->first_same_value == 0) | |
5920 | elt = elt->next_same_value; | |
5921 | sets[i].src_elt = elt ? elt->first_same_value : 0; | |
5922 | } | |
5923 | } | |
5924 | ||
5925 | /* Now insert the destinations into their equivalence classes. */ | |
5926 | ||
5927 | for (i = 0; i < n_sets; i++) | |
5928 | if (sets[i].rtl) | |
5929 | { | |
19cb6b50 | 5930 | rtx dest = SET_DEST (sets[i].rtl); |
19cb6b50 | 5931 | struct table_elt *elt; |
752df20e | 5932 | |
5933 | /* Don't record value if we are not supposed to risk allocating | |
5934 | floating-point values in registers that might be wider than | |
5935 | memory. */ | |
5936 | if ((flag_float_store | |
e16ceb8e | 5937 | && MEM_P (dest) |
c1712420 | 5938 | && FLOAT_MODE_P (GET_MODE (dest))) |
6510de05 | 5939 | /* Don't record BLKmode values, because we don't know the |
5940 | size of it, and can't be sure that other BLKmode values | |
5941 | have the same or smaller size. */ | |
5942 | || GET_MODE (dest) == BLKmode | |
752df20e | 5943 | /* If we didn't put a REG_EQUAL value or a source into the hash |
5944 | table, there is no point is recording DEST. */ | |
e8dedc4a | 5945 | || sets[i].src_elt == 0) |
752df20e | 5946 | continue; |
5947 | ||
5948 | /* STRICT_LOW_PART isn't part of the value BEING set, | |
5949 | and neither is the SUBREG inside it. | |
5950 | Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */ | |
5951 | if (GET_CODE (dest) == STRICT_LOW_PART) | |
5952 | dest = SUBREG_REG (XEXP (dest, 0)); | |
5953 | ||
8ad4c111 | 5954 | if (REG_P (dest) || GET_CODE (dest) == SUBREG) |
752df20e | 5955 | /* Registers must also be inserted into chains for quantities. */ |
5956 | if (insert_regs (dest, sets[i].src_elt, 1)) | |
1b033cc3 | 5957 | { |
5958 | /* If `insert_regs' changes something, the hash code must be | |
5959 | recalculated. */ | |
5960 | rehash_using_reg (dest); | |
5961 | sets[i].dest_hash = HASH (dest, GET_MODE (dest)); | |
5962 | } | |
752df20e | 5963 | |
e8dedc4a | 5964 | /* If DEST is a paradoxical SUBREG, don't record DEST since the bits |
5965 | outside the mode of GET_MODE (SUBREG_REG (dest)) are undefined. */ | |
5966 | if (paradoxical_subreg_p (dest)) | |
5967 | continue; | |
5968 | ||
e8825bb0 | 5969 | elt = insert (dest, sets[i].src_elt, |
5970 | sets[i].dest_hash, GET_MODE (dest)); | |
a97275a9 | 5971 | |
01c8e4c9 | 5972 | /* If this is a constant, insert the constant anchors with the |
5973 | equivalent register-offset expressions using register DEST. */ | |
5974 | if (targetm.const_anchor | |
5975 | && REG_P (dest) | |
5976 | && SCALAR_INT_MODE_P (GET_MODE (dest)) | |
5977 | && GET_CODE (sets[i].src_elt->exp) == CONST_INT) | |
5978 | insert_const_anchors (dest, sets[i].src_elt->exp, GET_MODE (dest)); | |
5979 | ||
e16ceb8e | 5980 | elt->in_memory = (MEM_P (sets[i].inner_dest) |
b04fab2a | 5981 | && !MEM_READONLY_P (sets[i].inner_dest)); |
26830081 | 5982 | |
e516eaa9 | 5983 | /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no |
5984 | narrower than M2, and both M1 and M2 are the same number of words, | |
5985 | we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so | |
5986 | make that equivalence as well. | |
752df20e | 5987 | |
316f48ea | 5988 | However, BAR may have equivalences for which gen_lowpart |
5989 | will produce a simpler value than gen_lowpart applied to | |
752df20e | 5990 | BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all |
cb10db9d | 5991 | BAR's equivalences. If we don't get a simplified form, make |
752df20e | 5992 | the SUBREG. It will not be used in an equivalence, but will |
5993 | cause two similar assignments to be detected. | |
5994 | ||
5995 | Note the loop below will find SUBREG_REG (DEST) since we have | |
5996 | already entered SRC and DEST of the SET in the table. */ | |
5997 | ||
5998 | if (GET_CODE (dest) == SUBREG | |
52acb7ae | 5999 | && (known_equal_after_align_down |
6000 | (GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) - 1, | |
6001 | GET_MODE_SIZE (GET_MODE (dest)) - 1, | |
6002 | UNITS_PER_WORD)) | |
974534ab | 6003 | && !partial_subreg_p (dest) |
752df20e | 6004 | && sets[i].src_elt != 0) |
6005 | { | |
3754d046 | 6006 | machine_mode new_mode = GET_MODE (SUBREG_REG (dest)); |
752df20e | 6007 | struct table_elt *elt, *classp = 0; |
6008 | ||
6009 | for (elt = sets[i].src_elt->first_same_value; elt; | |
6010 | elt = elt->next_same_value) | |
6011 | { | |
6012 | rtx new_src = 0; | |
952bc06d | 6013 | unsigned src_hash; |
752df20e | 6014 | struct table_elt *src_elt; |
6015 | ||
6016 | /* Ignore invalid entries. */ | |
8ad4c111 | 6017 | if (!REG_P (elt->exp) |
78d140c9 | 6018 | && ! exp_equiv_p (elt->exp, elt->exp, 1, false)) |
752df20e | 6019 | continue; |
6020 | ||
38b13a9b | 6021 | /* We may have already been playing subreg games. If the |
6022 | mode is already correct for the destination, use it. */ | |
6023 | if (GET_MODE (elt->exp) == new_mode) | |
6024 | new_src = elt->exp; | |
6025 | else | |
6026 | { | |
9edf7ea8 | 6027 | poly_uint64 byte |
41aff804 | 6028 | = subreg_lowpart_offset (new_mode, GET_MODE (dest)); |
38b13a9b | 6029 | new_src = simplify_gen_subreg (new_mode, elt->exp, |
6030 | GET_MODE (dest), byte); | |
6031 | } | |
6032 | ||
cdc84acd | 6033 | /* The call to simplify_gen_subreg fails if the value |
6034 | is VOIDmode, yet we can't do any simplification, e.g. | |
6035 | for EXPR_LISTs denoting function call results. | |
6036 | It is invalid to construct a SUBREG with a VOIDmode | |
6037 | SUBREG_REG, hence a zero new_src means we can't do | |
6038 | this substitution. */ | |
6039 | if (! new_src) | |
6040 | continue; | |
752df20e | 6041 | |
6042 | src_hash = HASH (new_src, new_mode); | |
6043 | src_elt = lookup (new_src, src_hash, new_mode); | |
6044 | ||
6045 | /* Put the new source in the hash table is if isn't | |
6046 | already. */ | |
6047 | if (src_elt == 0) | |
6048 | { | |
6049 | if (insert_regs (new_src, classp, 0)) | |
1b033cc3 | 6050 | { |
6051 | rehash_using_reg (new_src); | |
6052 | src_hash = HASH (new_src, new_mode); | |
6053 | } | |
752df20e | 6054 | src_elt = insert (new_src, classp, src_hash, new_mode); |
6055 | src_elt->in_memory = elt->in_memory; | |
20d3ff08 | 6056 | if (GET_CODE (new_src) == ASM_OPERANDS |
6057 | && elt->cost == MAX_COST) | |
6058 | src_elt->cost = MAX_COST; | |
752df20e | 6059 | } |
6060 | else if (classp && classp != src_elt->first_same_value) | |
cb10db9d | 6061 | /* Show that two things that we've seen before are |
752df20e | 6062 | actually the same. */ |
6063 | merge_equiv_classes (src_elt, classp); | |
6064 | ||
6065 | classp = src_elt->first_same_value; | |
7720c877 | 6066 | /* Ignore invalid entries. */ |
6067 | while (classp | |
8ad4c111 | 6068 | && !REG_P (classp->exp) |
78d140c9 | 6069 | && ! exp_equiv_p (classp->exp, classp->exp, 1, false)) |
7720c877 | 6070 | classp = classp->next_same_value; |
752df20e | 6071 | } |
6072 | } | |
6073 | } | |
6074 | ||
01a22203 | 6075 | /* Special handling for (set REG0 REG1) where REG0 is the |
6076 | "cheapest", cheaper than REG1. After cse, REG1 will probably not | |
6077 | be used in the sequel, so (if easily done) change this insn to | |
6078 | (set REG1 REG0) and replace REG1 with REG0 in the previous insn | |
6079 | that computed their value. Then REG1 will become a dead store | |
6080 | and won't cloud the situation for later optimizations. | |
752df20e | 6081 | |
6082 | Do not make this change if REG1 is a hard register, because it will | |
6083 | then be used in the sequel and we may be changing a two-operand insn | |
6084 | into a three-operand insn. | |
6085 | ||
1e5b92fa | 6086 | Also do not do this if we are operating on a copy of INSN. */ |
752df20e | 6087 | |
2aca5650 | 6088 | if (n_sets == 1 && sets[0].rtl) |
6089 | try_back_substitute_reg (sets[0].rtl, insn); | |
752df20e | 6090 | |
be22716f | 6091 | done:; |
752df20e | 6092 | } |
6093 | \f | |
59241190 | 6094 | /* Remove from the hash table all expressions that reference memory. */ |
155b05dc | 6095 | |
752df20e | 6096 | static void |
8ec3a57b | 6097 | invalidate_memory (void) |
752df20e | 6098 | { |
19cb6b50 | 6099 | int i; |
6100 | struct table_elt *p, *next; | |
752df20e | 6101 | |
9c4f3716 | 6102 | for (i = 0; i < HASH_SIZE; i++) |
ea0cb7ae | 6103 | for (p = table[i]; p; p = next) |
6104 | { | |
6105 | next = p->next_same_hash; | |
6106 | if (p->in_memory) | |
6107 | remove_from_table (p, i); | |
6108 | } | |
6109 | } | |
6110 | ||
2aca5650 | 6111 | /* Perform invalidation on the basis of everything about INSN, |
752df20e | 6112 | except for invalidating the actual places that are SET in it. |
6113 | This includes the places CLOBBERed, and anything that might | |
2aca5650 | 6114 | alias with something that is SET or CLOBBERed. */ |
752df20e | 6115 | |
6116 | static void | |
47f1d198 | 6117 | invalidate_from_clobbers (rtx_insn *insn) |
752df20e | 6118 | { |
2aca5650 | 6119 | rtx x = PATTERN (insn); |
6120 | ||
752df20e | 6121 | if (GET_CODE (x) == CLOBBER) |
6122 | { | |
6123 | rtx ref = XEXP (x, 0); | |
ea0cb7ae | 6124 | if (ref) |
6125 | { | |
8ad4c111 | 6126 | if (REG_P (ref) || GET_CODE (ref) == SUBREG |
e16ceb8e | 6127 | || MEM_P (ref)) |
ea0cb7ae | 6128 | invalidate (ref, VOIDmode); |
6129 | else if (GET_CODE (ref) == STRICT_LOW_PART | |
6130 | || GET_CODE (ref) == ZERO_EXTRACT) | |
6131 | invalidate (XEXP (ref, 0), GET_MODE (ref)); | |
6132 | } | |
752df20e | 6133 | } |
6134 | else if (GET_CODE (x) == PARALLEL) | |
6135 | { | |
19cb6b50 | 6136 | int i; |
752df20e | 6137 | for (i = XVECLEN (x, 0) - 1; i >= 0; i--) |
6138 | { | |
19cb6b50 | 6139 | rtx y = XVECEXP (x, 0, i); |
752df20e | 6140 | if (GET_CODE (y) == CLOBBER) |
6141 | { | |
6142 | rtx ref = XEXP (y, 0); | |
8ad4c111 | 6143 | if (REG_P (ref) || GET_CODE (ref) == SUBREG |
e16ceb8e | 6144 | || MEM_P (ref)) |
ea0cb7ae | 6145 | invalidate (ref, VOIDmode); |
6146 | else if (GET_CODE (ref) == STRICT_LOW_PART | |
6147 | || GET_CODE (ref) == ZERO_EXTRACT) | |
6148 | invalidate (XEXP (ref, 0), GET_MODE (ref)); | |
752df20e | 6149 | } |
6150 | } | |
6151 | } | |
6152 | } | |
6153 | \f | |
2aca5650 | 6154 | /* Perform invalidation on the basis of everything about INSN. |
6155 | This includes the places CLOBBERed, and anything that might | |
6156 | alias with something that is SET or CLOBBERed. */ | |
6157 | ||
6158 | static void | |
47f1d198 | 6159 | invalidate_from_sets_and_clobbers (rtx_insn *insn) |
2aca5650 | 6160 | { |
6161 | rtx tem; | |
6162 | rtx x = PATTERN (insn); | |
6163 | ||
6164 | if (CALL_P (insn)) | |
6165 | { | |
6166 | for (tem = CALL_INSN_FUNCTION_USAGE (insn); tem; tem = XEXP (tem, 1)) | |
52620891 | 6167 | { |
6168 | rtx temx = XEXP (tem, 0); | |
6169 | if (GET_CODE (temx) == CLOBBER) | |
6170 | invalidate (SET_DEST (temx), VOIDmode); | |
52620891 | 6171 | } |
2aca5650 | 6172 | } |
6173 | ||
6174 | /* Ensure we invalidate the destination register of a CALL insn. | |
6175 | This is necessary for machines where this register is a fixed_reg, | |
6176 | because no other code would invalidate it. */ | |
6177 | if (GET_CODE (x) == SET && GET_CODE (SET_SRC (x)) == CALL) | |
6178 | invalidate (SET_DEST (x), VOIDmode); | |
6179 | ||
6180 | else if (GET_CODE (x) == PARALLEL) | |
6181 | { | |
6182 | int i; | |
6183 | ||
6184 | for (i = XVECLEN (x, 0) - 1; i >= 0; i--) | |
6185 | { | |
6186 | rtx y = XVECEXP (x, 0, i); | |
6187 | if (GET_CODE (y) == CLOBBER) | |
6188 | { | |
6189 | rtx clobbered = XEXP (y, 0); | |
6190 | ||
6191 | if (REG_P (clobbered) | |
6192 | || GET_CODE (clobbered) == SUBREG) | |
6193 | invalidate (clobbered, VOIDmode); | |
6194 | else if (GET_CODE (clobbered) == STRICT_LOW_PART | |
6195 | || GET_CODE (clobbered) == ZERO_EXTRACT) | |
6196 | invalidate (XEXP (clobbered, 0), GET_MODE (clobbered)); | |
6197 | } | |
6198 | else if (GET_CODE (y) == SET && GET_CODE (SET_SRC (y)) == CALL) | |
6199 | invalidate (SET_DEST (y), VOIDmode); | |
6200 | } | |
6201 | } | |
6202 | } | |
6203 | \f | |
752df20e | 6204 | /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes |
6205 | and replace any registers in them with either an equivalent constant | |
6206 | or the canonical form of the register. If we are inside an address, | |
6207 | only do this if the address remains valid. | |
6208 | ||
6209 | OBJECT is 0 except when within a MEM in which case it is the MEM. | |
6210 | ||
6211 | Return the replacement for X. */ | |
6212 | ||
6213 | static rtx | |
3072d30e | 6214 | cse_process_notes_1 (rtx x, rtx object, bool *changed) |
752df20e | 6215 | { |
6216 | enum rtx_code code = GET_CODE (x); | |
d2ca078f | 6217 | const char *fmt = GET_RTX_FORMAT (code); |
752df20e | 6218 | int i; |
6219 | ||
6220 | switch (code) | |
6221 | { | |
752df20e | 6222 | case CONST: |
6223 | case SYMBOL_REF: | |
6224 | case LABEL_REF: | |
0349edce | 6225 | CASE_CONST_ANY: |
752df20e | 6226 | case PC: |
6227 | case CC0: | |
6228 | case LO_SUM: | |
6229 | return x; | |
6230 | ||
6231 | case MEM: | |
a344307e | 6232 | validate_change (x, &XEXP (x, 0), |
3072d30e | 6233 | cse_process_notes (XEXP (x, 0), x, changed), 0); |
752df20e | 6234 | return x; |
6235 | ||
6236 | case EXPR_LIST: | |
752df20e | 6237 | if (REG_NOTE_KIND (x) == REG_EQUAL) |
3072d30e | 6238 | XEXP (x, 0) = cse_process_notes (XEXP (x, 0), NULL_RTX, changed); |
9eb946de | 6239 | /* Fall through. */ |
6240 | ||
6241 | case INSN_LIST: | |
6242 | case INT_LIST: | |
752df20e | 6243 | if (XEXP (x, 1)) |
3072d30e | 6244 | XEXP (x, 1) = cse_process_notes (XEXP (x, 1), NULL_RTX, changed); |
752df20e | 6245 | return x; |
6246 | ||
21c77c5d | 6247 | case SIGN_EXTEND: |
6248 | case ZERO_EXTEND: | |
5afa7a07 | 6249 | case SUBREG: |
21c77c5d | 6250 | { |
d328ebdf | 6251 | rtx new_rtx = cse_process_notes (XEXP (x, 0), object, changed); |
21c77c5d | 6252 | /* We don't substitute VOIDmode constants into these rtx, |
6253 | since they would impede folding. */ | |
d328ebdf | 6254 | if (GET_MODE (new_rtx) != VOIDmode) |
6255 | validate_change (object, &XEXP (x, 0), new_rtx, 0); | |
21c77c5d | 6256 | return x; |
6257 | } | |
6258 | ||
d733203b | 6259 | case UNSIGNED_FLOAT: |
6260 | { | |
6261 | rtx new_rtx = cse_process_notes (XEXP (x, 0), object, changed); | |
6262 | /* We don't substitute negative VOIDmode constants into these rtx, | |
6263 | since they would impede folding. */ | |
6264 | if (GET_MODE (new_rtx) != VOIDmode | |
6265 | || (CONST_INT_P (new_rtx) && INTVAL (new_rtx) >= 0) | |
6266 | || (CONST_DOUBLE_P (new_rtx) && CONST_DOUBLE_HIGH (new_rtx) >= 0)) | |
6267 | validate_change (object, &XEXP (x, 0), new_rtx, 0); | |
6268 | return x; | |
6269 | } | |
6270 | ||
752df20e | 6271 | case REG: |
d1264606 | 6272 | i = REG_QTY (REGNO (x)); |
752df20e | 6273 | |
6274 | /* Return a constant or a constant register. */ | |
a7f3b1c7 | 6275 | if (REGNO_QTY_VALID_P (REGNO (x))) |
752df20e | 6276 | { |
a7f3b1c7 | 6277 | struct qty_table_elem *ent = &qty_table[i]; |
6278 | ||
6279 | if (ent->const_rtx != NULL_RTX | |
6280 | && (CONSTANT_P (ent->const_rtx) | |
8ad4c111 | 6281 | || REG_P (ent->const_rtx))) |
a7f3b1c7 | 6282 | { |
d328ebdf | 6283 | rtx new_rtx = gen_lowpart (GET_MODE (x), ent->const_rtx); |
6284 | if (new_rtx) | |
6285 | return copy_rtx (new_rtx); | |
a7f3b1c7 | 6286 | } |
752df20e | 6287 | } |
6288 | ||
6289 | /* Otherwise, canonicalize this register. */ | |
47f1d198 | 6290 | return canon_reg (x, NULL); |
cb10db9d | 6291 | |
0dbd1c74 | 6292 | default: |
6293 | break; | |
752df20e | 6294 | } |
6295 | ||
6296 | for (i = 0; i < GET_RTX_LENGTH (code); i++) | |
6297 | if (fmt[i] == 'e') | |
6298 | validate_change (object, &XEXP (x, i), | |
3072d30e | 6299 | cse_process_notes (XEXP (x, i), object, changed), 0); |
752df20e | 6300 | |
6301 | return x; | |
6302 | } | |
3072d30e | 6303 | |
6304 | static rtx | |
6305 | cse_process_notes (rtx x, rtx object, bool *changed) | |
6306 | { | |
d328ebdf | 6307 | rtx new_rtx = cse_process_notes_1 (x, object, changed); |
6308 | if (new_rtx != x) | |
3072d30e | 6309 | *changed = true; |
d328ebdf | 6310 | return new_rtx; |
3072d30e | 6311 | } |
6312 | ||
752df20e | 6313 | \f |
be22716f | 6314 | /* Find a path in the CFG, starting with FIRST_BB to perform CSE on. |
752df20e | 6315 | |
be22716f | 6316 | DATA is a pointer to a struct cse_basic_block_data, that is used to |
6317 | describe the path. | |
6318 | It is filled with a queue of basic blocks, starting with FIRST_BB | |
6319 | and following a trace through the CFG. | |
48e1416a | 6320 | |
be22716f | 6321 | If all paths starting at FIRST_BB have been followed, or no new path |
6322 | starting at FIRST_BB can be constructed, this function returns FALSE. | |
6323 | Otherwise, DATA->path is filled and the function returns TRUE indicating | |
6324 | that a path to follow was found. | |
752df20e | 6325 | |
7920eed5 | 6326 | If FOLLOW_JUMPS is false, the maximum path length is 1 and the only |
be22716f | 6327 | block in the path will be FIRST_BB. */ |
752df20e | 6328 | |
be22716f | 6329 | static bool |
6330 | cse_find_path (basic_block first_bb, struct cse_basic_block_data *data, | |
6331 | int follow_jumps) | |
752df20e | 6332 | { |
be22716f | 6333 | basic_block bb; |
6334 | edge e; | |
6335 | int path_size; | |
48e1416a | 6336 | |
08b7917c | 6337 | bitmap_set_bit (cse_visited_basic_blocks, first_bb->index); |
752df20e | 6338 | |
be22716f | 6339 | /* See if there is a previous path. */ |
6340 | path_size = data->path_size; | |
6341 | ||
6342 | /* There is a previous path. Make sure it started with FIRST_BB. */ | |
6343 | if (path_size) | |
6344 | gcc_assert (data->path[0].bb == first_bb); | |
6345 | ||
6346 | /* There was only one basic block in the last path. Clear the path and | |
6347 | return, so that paths starting at another basic block can be tried. */ | |
6348 | if (path_size == 1) | |
6349 | { | |
6350 | path_size = 0; | |
6351 | goto done; | |
6352 | } | |
6353 | ||
6354 | /* If the path was empty from the beginning, construct a new path. */ | |
6355 | if (path_size == 0) | |
6356 | data->path[path_size++].bb = first_bb; | |
6357 | else | |
752df20e | 6358 | { |
be22716f | 6359 | /* Otherwise, path_size must be equal to or greater than 2, because |
6360 | a previous path exists that is at least two basic blocks long. | |
6361 | ||
6362 | Update the previous branch path, if any. If the last branch was | |
6363 | previously along the branch edge, take the fallthrough edge now. */ | |
6364 | while (path_size >= 2) | |
752df20e | 6365 | { |
be22716f | 6366 | basic_block last_bb_in_path, previous_bb_in_path; |
6367 | edge e; | |
6368 | ||
6369 | --path_size; | |
6370 | last_bb_in_path = data->path[path_size].bb; | |
6371 | previous_bb_in_path = data->path[path_size - 1].bb; | |
6372 | ||
6373 | /* If we previously followed a path along the branch edge, try | |
6374 | the fallthru edge now. */ | |
6375 | if (EDGE_COUNT (previous_bb_in_path->succs) == 2 | |
6376 | && any_condjump_p (BB_END (previous_bb_in_path)) | |
6377 | && (e = find_edge (previous_bb_in_path, last_bb_in_path)) | |
6378 | && e == BRANCH_EDGE (previous_bb_in_path)) | |
6379 | { | |
6380 | bb = FALLTHRU_EDGE (previous_bb_in_path)->dest; | |
34154e27 | 6381 | if (bb != EXIT_BLOCK_PTR_FOR_FN (cfun) |
3752d411 | 6382 | && single_pred_p (bb) |
6383 | /* We used to assert here that we would only see blocks | |
6384 | that we have not visited yet. But we may end up | |
6385 | visiting basic blocks twice if the CFG has changed | |
6386 | in this run of cse_main, because when the CFG changes | |
6387 | the topological sort of the CFG also changes. A basic | |
6388 | blocks that previously had more than two predecessors | |
6389 | may now have a single predecessor, and become part of | |
6390 | a path that starts at another basic block. | |
6391 | ||
6392 | We still want to visit each basic block only once, so | |
6393 | halt the path here if we have already visited BB. */ | |
08b7917c | 6394 | && !bitmap_bit_p (cse_visited_basic_blocks, bb->index)) |
be22716f | 6395 | { |
08b7917c | 6396 | bitmap_set_bit (cse_visited_basic_blocks, bb->index); |
be22716f | 6397 | data->path[path_size++].bb = bb; |
6398 | break; | |
6399 | } | |
6400 | } | |
6401 | ||
6402 | data->path[path_size].bb = NULL; | |
6403 | } | |
6404 | ||
6405 | /* If only one block remains in the path, bail. */ | |
6406 | if (path_size == 1) | |
6407 | { | |
6408 | path_size = 0; | |
6409 | goto done; | |
752df20e | 6410 | } |
752df20e | 6411 | } |
6412 | ||
be22716f | 6413 | /* Extend the path if possible. */ |
6414 | if (follow_jumps) | |
752df20e | 6415 | { |
be22716f | 6416 | bb = data->path[path_size - 1].bb; |
6417 | while (bb && path_size < PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH)) | |
6418 | { | |
6419 | if (single_succ_p (bb)) | |
6420 | e = single_succ_edge (bb); | |
6421 | else if (EDGE_COUNT (bb->succs) == 2 | |
6422 | && any_condjump_p (BB_END (bb))) | |
6423 | { | |
6424 | /* First try to follow the branch. If that doesn't lead | |
6425 | to a useful path, follow the fallthru edge. */ | |
6426 | e = BRANCH_EDGE (bb); | |
6427 | if (!single_pred_p (e->dest)) | |
6428 | e = FALLTHRU_EDGE (bb); | |
6429 | } | |
6430 | else | |
6431 | e = NULL; | |
752df20e | 6432 | |
d1ff492e | 6433 | if (e |
4c43a998 | 6434 | && !((e->flags & EDGE_ABNORMAL_CALL) && cfun->has_nonlocal_label) |
34154e27 | 6435 | && e->dest != EXIT_BLOCK_PTR_FOR_FN (cfun) |
3752d411 | 6436 | && single_pred_p (e->dest) |
6437 | /* Avoid visiting basic blocks twice. The large comment | |
6438 | above explains why this can happen. */ | |
08b7917c | 6439 | && !bitmap_bit_p (cse_visited_basic_blocks, e->dest->index)) |
be22716f | 6440 | { |
6441 | basic_block bb2 = e->dest; | |
08b7917c | 6442 | bitmap_set_bit (cse_visited_basic_blocks, bb2->index); |
be22716f | 6443 | data->path[path_size++].bb = bb2; |
6444 | bb = bb2; | |
6445 | } | |
6446 | else | |
6447 | bb = NULL; | |
6448 | } | |
6449 | } | |
6450 | ||
6451 | done: | |
6452 | data->path_size = path_size; | |
6453 | return path_size != 0; | |
6454 | } | |
6455 | \f | |
6456 | /* Dump the path in DATA to file F. NSETS is the number of sets | |
6457 | in the path. */ | |
6458 | ||
6459 | static void | |
6460 | cse_dump_path (struct cse_basic_block_data *data, int nsets, FILE *f) | |
6461 | { | |
6462 | int path_entry; | |
6463 | ||
6464 | fprintf (f, ";; Following path with %d sets: ", nsets); | |
6465 | for (path_entry = 0; path_entry < data->path_size; path_entry++) | |
6466 | fprintf (f, "%d ", (data->path[path_entry].bb)->index); | |
40d10c37 | 6467 | fputc ('\n', f); |
be22716f | 6468 | fflush (f); |
6469 | } | |
6470 | ||
99013338 | 6471 | \f |
6472 | /* Return true if BB has exception handling successor edges. */ | |
6473 | ||
6474 | static bool | |
6475 | have_eh_succ_edges (basic_block bb) | |
6476 | { | |
6477 | edge e; | |
6478 | edge_iterator ei; | |
6479 | ||
6480 | FOR_EACH_EDGE (e, ei, bb->succs) | |
6481 | if (e->flags & EDGE_EH) | |
6482 | return true; | |
6483 | ||
6484 | return false; | |
6485 | } | |
6486 | ||
be22716f | 6487 | \f |
6488 | /* Scan to the end of the path described by DATA. Return an estimate of | |
3072d30e | 6489 | the total number of SETs of all insns in the path. */ |
be22716f | 6490 | |
6491 | static void | |
6492 | cse_prescan_path (struct cse_basic_block_data *data) | |
6493 | { | |
6494 | int nsets = 0; | |
be22716f | 6495 | int path_size = data->path_size; |
6496 | int path_entry; | |
6497 | ||
6498 | /* Scan to end of each basic block in the path. */ | |
48e1416a | 6499 | for (path_entry = 0; path_entry < path_size; path_entry++) |
be22716f | 6500 | { |
6501 | basic_block bb; | |
47f1d198 | 6502 | rtx_insn *insn; |
dfcbcd81 | 6503 | |
be22716f | 6504 | bb = data->path[path_entry].bb; |
752df20e | 6505 | |
be22716f | 6506 | FOR_BB_INSNS (bb, insn) |
752df20e | 6507 | { |
be22716f | 6508 | if (!INSN_P (insn)) |
6509 | continue; | |
cb10db9d | 6510 | |
be22716f | 6511 | /* A PARALLEL can have lots of SETs in it, |
6512 | especially if it is really an ASM_OPERANDS. */ | |
6513 | if (GET_CODE (PATTERN (insn)) == PARALLEL) | |
6514 | nsets += XVECLEN (PATTERN (insn), 0); | |
6515 | else | |
6516 | nsets += 1; | |
752df20e | 6517 | } |
be22716f | 6518 | } |
6519 | ||
be22716f | 6520 | data->nsets = nsets; |
6521 | } | |
6522 | \f | |
9206d997 | 6523 | /* Return true if the pattern of INSN uses a LABEL_REF for which |
6524 | there isn't a REG_LABEL_OPERAND note. */ | |
6525 | ||
6526 | static bool | |
6527 | check_for_label_ref (rtx_insn *insn) | |
6528 | { | |
6529 | /* If this insn uses a LABEL_REF and there isn't a REG_LABEL_OPERAND | |
6530 | note for it, we must rerun jump since it needs to place the note. If | |
6531 | this is a LABEL_REF for a CODE_LABEL that isn't in the insn chain, | |
6532 | don't do this since no REG_LABEL_OPERAND will be added. */ | |
6533 | subrtx_iterator::array_type array; | |
6534 | FOR_EACH_SUBRTX (iter, array, PATTERN (insn), ALL) | |
6535 | { | |
6536 | const_rtx x = *iter; | |
6537 | if (GET_CODE (x) == LABEL_REF | |
6538 | && !LABEL_REF_NONLOCAL_P (x) | |
6539 | && (!JUMP_P (insn) | |
c7799456 | 6540 | || !label_is_jump_target_p (label_ref_label (x), insn)) |
6541 | && LABEL_P (label_ref_label (x)) | |
6542 | && INSN_UID (label_ref_label (x)) != 0 | |
6543 | && !find_reg_note (insn, REG_LABEL_OPERAND, label_ref_label (x))) | |
9206d997 | 6544 | return true; |
6545 | } | |
6546 | return false; | |
6547 | } | |
6548 | ||
be22716f | 6549 | /* Process a single extended basic block described by EBB_DATA. */ |
752df20e | 6550 | |
be22716f | 6551 | static void |
6552 | cse_extended_basic_block (struct cse_basic_block_data *ebb_data) | |
6553 | { | |
6554 | int path_size = ebb_data->path_size; | |
6555 | int path_entry; | |
6556 | int num_insns = 0; | |
6557 | ||
6558 | /* Allocate the space needed by qty_table. */ | |
6559 | qty_table = XNEWVEC (struct qty_table_elem, max_qty); | |
6560 | ||
6561 | new_basic_block (); | |
deb2741b | 6562 | cse_ebb_live_in = df_get_live_in (ebb_data->path[0].bb); |
6563 | cse_ebb_live_out = df_get_live_out (ebb_data->path[path_size - 1].bb); | |
be22716f | 6564 | for (path_entry = 0; path_entry < path_size; path_entry++) |
6565 | { | |
6566 | basic_block bb; | |
47f1d198 | 6567 | rtx_insn *insn; |
be22716f | 6568 | |
6569 | bb = ebb_data->path[path_entry].bb; | |
b357aba8 | 6570 | |
6571 | /* Invalidate recorded information for eh regs if there is an EH | |
6572 | edge pointing to that bb. */ | |
6573 | if (bb_has_eh_pred (bb)) | |
6574 | { | |
f1c570a6 | 6575 | df_ref def; |
b357aba8 | 6576 | |
f1c570a6 | 6577 | FOR_EACH_ARTIFICIAL_DEF (def, bb->index) |
6578 | if (DF_REF_FLAGS (def) & DF_REF_AT_TOP) | |
6579 | invalidate (DF_REF_REG (def), GET_MODE (DF_REF_REG (def))); | |
b357aba8 | 6580 | } |
6581 | ||
396a4a1d | 6582 | optimize_this_for_speed_p = optimize_bb_for_speed_p (bb); |
201f6961 | 6583 | FOR_BB_INSNS (bb, insn) |
752df20e | 6584 | { |
be22716f | 6585 | /* If we have processed 1,000 insns, flush the hash table to |
6586 | avoid extreme quadratic behavior. We must not include NOTEs | |
6587 | in the count since there may be more of them when generating | |
6588 | debugging information. If we clear the table at different | |
6589 | times, code generated with -g -O might be different than code | |
6590 | generated with -O but not -g. | |
6591 | ||
6592 | FIXME: This is a real kludge and needs to be done some other | |
6593 | way. */ | |
9845d120 | 6594 | if (NONDEBUG_INSN_P (insn) |
be22716f | 6595 | && num_insns++ > PARAM_VALUE (PARAM_MAX_CSE_INSNS)) |
6596 | { | |
6597 | flush_hash_table (); | |
6598 | num_insns = 0; | |
6599 | } | |
752df20e | 6600 | |
be22716f | 6601 | if (INSN_P (insn)) |
752df20e | 6602 | { |
be22716f | 6603 | /* Process notes first so we have all notes in canonical forms |
6604 | when looking for duplicate operations. */ | |
6605 | if (REG_NOTES (insn)) | |
3072d30e | 6606 | { |
6607 | bool changed = false; | |
6608 | REG_NOTES (insn) = cse_process_notes (REG_NOTES (insn), | |
6609 | NULL_RTX, &changed); | |
6610 | if (changed) | |
6611 | df_notes_rescan (insn); | |
6612 | } | |
be22716f | 6613 | |
1e5b92fa | 6614 | cse_insn (insn); |
be22716f | 6615 | |
be22716f | 6616 | /* If we haven't already found an insn where we added a LABEL_REF, |
6617 | check this one. */ | |
283a6b26 | 6618 | if (INSN_P (insn) && !recorded_label_ref |
9206d997 | 6619 | && check_for_label_ref (insn)) |
283a6b26 | 6620 | recorded_label_ref = true; |
c6ddfc69 | 6621 | |
ff900b8e | 6622 | if (HAVE_cc0 && NONDEBUG_INSN_P (insn)) |
c6ddfc69 | 6623 | { |
5542b661 | 6624 | /* If the previous insn sets CC0 and this insn no |
6625 | longer references CC0, delete the previous insn. | |
6626 | Here we use fact that nothing expects CC0 to be | |
6627 | valid over an insn, which is true until the final | |
6628 | pass. */ | |
47f1d198 | 6629 | rtx_insn *prev_insn; |
6630 | rtx tem; | |
5542b661 | 6631 | |
6632 | prev_insn = prev_nonnote_nondebug_insn (insn); | |
6633 | if (prev_insn && NONJUMP_INSN_P (prev_insn) | |
6634 | && (tem = single_set (prev_insn)) != NULL_RTX | |
6635 | && SET_DEST (tem) == cc0_rtx | |
6636 | && ! reg_mentioned_p (cc0_rtx, PATTERN (insn))) | |
6637 | delete_insn (prev_insn); | |
6638 | ||
6639 | /* If this insn is not the last insn in the basic | |
6640 | block, it will be PREV_INSN(insn) in the next | |
6641 | iteration. If we recorded any CC0-related | |
6642 | information for this insn, remember it. */ | |
6643 | if (insn != BB_END (bb)) | |
6644 | { | |
6645 | prev_insn_cc0 = this_insn_cc0; | |
6646 | prev_insn_cc0_mode = this_insn_cc0_mode; | |
6647 | } | |
c6ddfc69 | 6648 | } |
be22716f | 6649 | } |
6650 | } | |
752df20e | 6651 | |
99013338 | 6652 | /* With non-call exceptions, we are not always able to update |
6653 | the CFG properly inside cse_insn. So clean up possibly | |
6654 | redundant EH edges here. */ | |
cbeb677e | 6655 | if (cfun->can_throw_non_call_exceptions && have_eh_succ_edges (bb)) |
283a6b26 | 6656 | cse_cfg_altered |= purge_dead_edges (bb); |
99013338 | 6657 | |
be22716f | 6658 | /* If we changed a conditional jump, we may have terminated |
6659 | the path we are following. Check that by verifying that | |
6660 | the edge we would take still exists. If the edge does | |
6661 | not exist anymore, purge the remainder of the path. | |
6662 | Note that this will cause us to return to the caller. */ | |
6663 | if (path_entry < path_size - 1) | |
6664 | { | |
6665 | basic_block next_bb = ebb_data->path[path_entry + 1].bb; | |
6666 | if (!find_edge (bb, next_bb)) | |
5b58e627 | 6667 | { |
6668 | do | |
6669 | { | |
6670 | path_size--; | |
6671 | ||
6672 | /* If we truncate the path, we must also reset the | |
6673 | visited bit on the remaining blocks in the path, | |
6674 | or we will never visit them at all. */ | |
08b7917c | 6675 | bitmap_clear_bit (cse_visited_basic_blocks, |
5b58e627 | 6676 | ebb_data->path[path_size].bb->index); |
6677 | ebb_data->path[path_size].bb = NULL; | |
6678 | } | |
6679 | while (path_size - 1 != path_entry); | |
6680 | ebb_data->path_size = path_size; | |
6681 | } | |
752df20e | 6682 | } |
752df20e | 6683 | |
be22716f | 6684 | /* If this is a conditional jump insn, record any known |
6685 | equivalences due to the condition being tested. */ | |
6686 | insn = BB_END (bb); | |
6687 | if (path_entry < path_size - 1 | |
1a0056ba | 6688 | && EDGE_COUNT (bb->succs) == 2 |
be22716f | 6689 | && JUMP_P (insn) |
6690 | && single_set (insn) | |
6691 | && any_condjump_p (insn)) | |
6692 | { | |
6693 | basic_block next_bb = ebb_data->path[path_entry + 1].bb; | |
6694 | bool taken = (next_bb == BRANCH_EDGE (bb)->dest); | |
6695 | record_jump_equiv (insn, taken); | |
6696 | } | |
c6ddfc69 | 6697 | |
c6ddfc69 | 6698 | /* Clear the CC0-tracking related insns, they can't provide |
6699 | useful information across basic block boundaries. */ | |
6700 | prev_insn_cc0 = 0; | |
be22716f | 6701 | } |
752df20e | 6702 | |
be22716f | 6703 | gcc_assert (next_qty <= max_qty); |
752df20e | 6704 | |
be22716f | 6705 | free (qty_table); |
752df20e | 6706 | } |
3072d30e | 6707 | |
752df20e | 6708 | \f |
752df20e | 6709 | /* Perform cse on the instructions of a function. |
6710 | F is the first instruction. | |
6711 | NREGS is one plus the highest pseudo-reg number used in the instruction. | |
6712 | ||
283a6b26 | 6713 | Return 2 if jump optimizations should be redone due to simplifications |
6714 | in conditional jump instructions. | |
6715 | Return 1 if the CFG should be cleaned up because it has been modified. | |
6716 | Return 0 otherwise. */ | |
752df20e | 6717 | |
d2bb3f9d | 6718 | static int |
47f1d198 | 6719 | cse_main (rtx_insn *f ATTRIBUTE_UNUSED, int nregs) |
752df20e | 6720 | { |
be22716f | 6721 | struct cse_basic_block_data ebb_data; |
6722 | basic_block bb; | |
fe672ac0 | 6723 | int *rc_order = XNEWVEC (int, last_basic_block_for_fn (cfun)); |
be22716f | 6724 | int i, n_blocks; |
752df20e | 6725 | |
c28211ae | 6726 | /* CSE doesn't use dominane info but can invalidate it in different ways. |
6727 | For simplicity free dominance info here. */ | |
6728 | free_dominance_info (CDI_DOMINATORS); | |
6729 | ||
3072d30e | 6730 | df_set_flags (DF_LR_RUN_DCE); |
264adf90 | 6731 | df_note_add_problem (); |
3072d30e | 6732 | df_analyze (); |
6733 | df_set_flags (DF_DEFER_INSN_RESCAN); | |
6734 | ||
6735 | reg_scan (get_insns (), max_reg_num ()); | |
3bd20490 | 6736 | init_cse_reg_info (nregs); |
6737 | ||
be22716f | 6738 | ebb_data.path = XNEWVEC (struct branch_path, |
6739 | PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH)); | |
38ccff25 | 6740 | |
283a6b26 | 6741 | cse_cfg_altered = false; |
6742 | cse_jumps_altered = false; | |
6743 | recorded_label_ref = false; | |
752df20e | 6744 | constant_pool_entries_cost = 0; |
634d45d7 | 6745 | constant_pool_entries_regcost = 0; |
be22716f | 6746 | ebb_data.path_size = 0; |
6747 | ebb_data.nsets = 0; | |
d263732c | 6748 | rtl_hooks = cse_rtl_hooks; |
752df20e | 6749 | |
6750 | init_recog (); | |
ea0cb7ae | 6751 | init_alias_analysis (); |
752df20e | 6752 | |
4c36ffe6 | 6753 | reg_eqv_table = XNEWVEC (struct reg_eqv_elem, nregs); |
752df20e | 6754 | |
be22716f | 6755 | /* Set up the table of already visited basic blocks. */ |
fe672ac0 | 6756 | cse_visited_basic_blocks = sbitmap_alloc (last_basic_block_for_fn (cfun)); |
53c5d9d4 | 6757 | bitmap_clear (cse_visited_basic_blocks); |
752df20e | 6758 | |
99013338 | 6759 | /* Loop over basic blocks in reverse completion order (RPO), |
be22716f | 6760 | excluding the ENTRY and EXIT blocks. */ |
5b58e627 | 6761 | n_blocks = pre_and_rev_post_order_compute (NULL, rc_order, false); |
be22716f | 6762 | i = 0; |
6763 | while (i < n_blocks) | |
752df20e | 6764 | { |
99013338 | 6765 | /* Find the first block in the RPO queue that we have not yet |
be22716f | 6766 | processed before. */ |
6767 | do | |
0dbd1c74 | 6768 | { |
f5a6b05f | 6769 | bb = BASIC_BLOCK_FOR_FN (cfun, rc_order[i++]); |
0dbd1c74 | 6770 | } |
08b7917c | 6771 | while (bitmap_bit_p (cse_visited_basic_blocks, bb->index) |
be22716f | 6772 | && i < n_blocks); |
752df20e | 6773 | |
be22716f | 6774 | /* Find all paths starting with BB, and process them. */ |
6775 | while (cse_find_path (bb, &ebb_data, flag_cse_follow_jumps)) | |
752df20e | 6776 | { |
be22716f | 6777 | /* Pre-scan the path. */ |
6778 | cse_prescan_path (&ebb_data); | |
752df20e | 6779 | |
be22716f | 6780 | /* If this basic block has no sets, skip it. */ |
6781 | if (ebb_data.nsets == 0) | |
6782 | continue; | |
752df20e | 6783 | |
7920eed5 | 6784 | /* Get a reasonable estimate for the maximum number of qty's |
be22716f | 6785 | needed for this path. For this, we take the number of sets |
6786 | and multiply that by MAX_RECOG_OPERANDS. */ | |
6787 | max_qty = ebb_data.nsets * MAX_RECOG_OPERANDS; | |
752df20e | 6788 | |
be22716f | 6789 | /* Dump the path we're about to process. */ |
6790 | if (dump_file) | |
6791 | cse_dump_path (&ebb_data, ebb_data.nsets, dump_file); | |
541a035f | 6792 | |
be22716f | 6793 | cse_extended_basic_block (&ebb_data); |
752df20e | 6794 | } |
752df20e | 6795 | } |
6796 | ||
be22716f | 6797 | /* Clean up. */ |
6798 | end_alias_analysis (); | |
be22716f | 6799 | free (reg_eqv_table); |
6800 | free (ebb_data.path); | |
6801 | sbitmap_free (cse_visited_basic_blocks); | |
5b58e627 | 6802 | free (rc_order); |
be22716f | 6803 | rtl_hooks = general_rtl_hooks; |
ef866782 | 6804 | |
283a6b26 | 6805 | if (cse_jumps_altered || recorded_label_ref) |
6806 | return 2; | |
6807 | else if (cse_cfg_altered) | |
6808 | return 1; | |
6809 | else | |
6810 | return 0; | |
752df20e | 6811 | } |
6812 | \f | |
6813 | /* Count the number of times registers are used (not set) in X. | |
6814 | COUNTS is an array in which we accumulate the count, INCR is how much | |
e6bf10d8 | 6815 | we count each register usage. |
6816 | ||
6817 | Don't count a usage of DEST, which is the SET_DEST of a SET which | |
6818 | contains X in its SET_SRC. This is because such a SET does not | |
6819 | modify the liveness of DEST. | |
46313beb | 6820 | DEST is set to pc_rtx for a trapping insn, or for an insn with side effects. |
6821 | We must then count uses of a SET_DEST regardless, because the insn can't be | |
6822 | deleted here. */ | |
752df20e | 6823 | |
6824 | static void | |
e6bf10d8 | 6825 | count_reg_usage (rtx x, int *counts, rtx dest, int incr) |
752df20e | 6826 | { |
b84155cd | 6827 | enum rtx_code code; |
ce32fe65 | 6828 | rtx note; |
d2ca078f | 6829 | const char *fmt; |
752df20e | 6830 | int i, j; |
6831 | ||
b84155cd | 6832 | if (x == 0) |
6833 | return; | |
6834 | ||
6835 | switch (code = GET_CODE (x)) | |
752df20e | 6836 | { |
6837 | case REG: | |
e6bf10d8 | 6838 | if (x != dest) |
6839 | counts[REGNO (x)] += incr; | |
752df20e | 6840 | return; |
6841 | ||
6842 | case PC: | |
6843 | case CC0: | |
6844 | case CONST: | |
0349edce | 6845 | CASE_CONST_ANY: |
752df20e | 6846 | case SYMBOL_REF: |
6847 | case LABEL_REF: | |
a51d039e | 6848 | return; |
6849 | ||
cb10db9d | 6850 | case CLOBBER: |
a51d039e | 6851 | /* If we are clobbering a MEM, mark any registers inside the address |
6852 | as being used. */ | |
e16ceb8e | 6853 | if (MEM_P (XEXP (x, 0))) |
e6bf10d8 | 6854 | count_reg_usage (XEXP (XEXP (x, 0), 0), counts, NULL_RTX, incr); |
752df20e | 6855 | return; |
6856 | ||
6857 | case SET: | |
6858 | /* Unless we are setting a REG, count everything in SET_DEST. */ | |
8ad4c111 | 6859 | if (!REG_P (SET_DEST (x))) |
e6bf10d8 | 6860 | count_reg_usage (SET_DEST (x), counts, NULL_RTX, incr); |
6861 | count_reg_usage (SET_SRC (x), counts, | |
6862 | dest ? dest : SET_DEST (x), | |
6863 | incr); | |
752df20e | 6864 | return; |
6865 | ||
9845d120 | 6866 | case DEBUG_INSN: |
6867 | return; | |
6868 | ||
b84155cd | 6869 | case CALL_INSN: |
752df20e | 6870 | case INSN: |
6871 | case JUMP_INSN: | |
bc0dfc8d | 6872 | /* We expect dest to be NULL_RTX here. If the insn may throw, |
46313beb | 6873 | or if it cannot be deleted due to side-effects, mark this fact |
6874 | by setting DEST to pc_rtx. */ | |
bc0dfc8d | 6875 | if ((!cfun->can_delete_dead_exceptions && !insn_nothrow_p (x)) |
6876 | || side_effects_p (PATTERN (x))) | |
e6bf10d8 | 6877 | dest = pc_rtx; |
6878 | if (code == CALL_INSN) | |
6879 | count_reg_usage (CALL_INSN_FUNCTION_USAGE (x), counts, dest, incr); | |
6880 | count_reg_usage (PATTERN (x), counts, dest, incr); | |
752df20e | 6881 | |
6882 | /* Things used in a REG_EQUAL note aren't dead since loop may try to | |
6883 | use them. */ | |
6884 | ||
ce32fe65 | 6885 | note = find_reg_equal_equiv_note (x); |
6886 | if (note) | |
86178c33 | 6887 | { |
6888 | rtx eqv = XEXP (note, 0); | |
6889 | ||
6890 | if (GET_CODE (eqv) == EXPR_LIST) | |
6891 | /* This REG_EQUAL note describes the result of a function call. | |
6892 | Process all the arguments. */ | |
6893 | do | |
6894 | { | |
e6bf10d8 | 6895 | count_reg_usage (XEXP (eqv, 0), counts, dest, incr); |
86178c33 | 6896 | eqv = XEXP (eqv, 1); |
6897 | } | |
6898 | while (eqv && GET_CODE (eqv) == EXPR_LIST); | |
6899 | else | |
e6bf10d8 | 6900 | count_reg_usage (eqv, counts, dest, incr); |
86178c33 | 6901 | } |
752df20e | 6902 | return; |
6903 | ||
d5f9786f | 6904 | case EXPR_LIST: |
6905 | if (REG_NOTE_KIND (x) == REG_EQUAL | |
6906 | || (REG_NOTE_KIND (x) != REG_NONNEG && GET_CODE (XEXP (x,0)) == USE) | |
6907 | /* FUNCTION_USAGE expression lists may include (CLOBBER (mem /u)), | |
6908 | involving registers in the address. */ | |
f03bb97b | 6909 | || GET_CODE (XEXP (x, 0)) == CLOBBER) |
e6bf10d8 | 6910 | count_reg_usage (XEXP (x, 0), counts, NULL_RTX, incr); |
d5f9786f | 6911 | |
e6bf10d8 | 6912 | count_reg_usage (XEXP (x, 1), counts, NULL_RTX, incr); |
d5f9786f | 6913 | return; |
6914 | ||
16d4da86 | 6915 | case ASM_OPERANDS: |
16d4da86 | 6916 | /* Iterate over just the inputs, not the constraints as well. */ |
6917 | for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--) | |
e6bf10d8 | 6918 | count_reg_usage (ASM_OPERANDS_INPUT (x, i), counts, dest, incr); |
16d4da86 | 6919 | return; |
6920 | ||
752df20e | 6921 | case INSN_LIST: |
b3578ae7 | 6922 | case INT_LIST: |
cc636d56 | 6923 | gcc_unreachable (); |
cb10db9d | 6924 | |
0dbd1c74 | 6925 | default: |
6926 | break; | |
752df20e | 6927 | } |
6928 | ||
6929 | fmt = GET_RTX_FORMAT (code); | |
6930 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
6931 | { | |
6932 | if (fmt[i] == 'e') | |
e6bf10d8 | 6933 | count_reg_usage (XEXP (x, i), counts, dest, incr); |
752df20e | 6934 | else if (fmt[i] == 'E') |
6935 | for (j = XVECLEN (x, i) - 1; j >= 0; j--) | |
e6bf10d8 | 6936 | count_reg_usage (XVECEXP (x, i, j), counts, dest, incr); |
752df20e | 6937 | } |
6938 | } | |
6939 | \f | |
a52dfddb | 6940 | /* Return true if X is a dead register. */ |
9845d120 | 6941 | |
a52dfddb | 6942 | static inline int |
a51848dc | 6943 | is_dead_reg (const_rtx x, int *counts) |
9845d120 | 6944 | { |
9845d120 | 6945 | return (REG_P (x) |
6946 | && REGNO (x) >= FIRST_PSEUDO_REGISTER | |
6947 | && counts[REGNO (x)] == 0); | |
6948 | } | |
6949 | ||
6d866f03 | 6950 | /* Return true if set is live. */ |
6951 | static bool | |
47f1d198 | 6952 | set_live_p (rtx set, rtx_insn *insn ATTRIBUTE_UNUSED, /* Only used with HAVE_cc0. */ |
8ec3a57b | 6953 | int *counts) |
6d866f03 | 6954 | { |
9ed997be | 6955 | rtx_insn *tem; |
6d866f03 | 6956 | |
6957 | if (set_noop_p (set)) | |
6958 | ; | |
6959 | ||
6d866f03 | 6960 | else if (GET_CODE (SET_DEST (set)) == CC0 |
6961 | && !side_effects_p (SET_SRC (set)) | |
5542b661 | 6962 | && ((tem = next_nonnote_nondebug_insn (insn)) == NULL_RTX |
6d866f03 | 6963 | || !INSN_P (tem) |
6964 | || !reg_referenced_p (cc0_rtx, PATTERN (tem)))) | |
6965 | return false; | |
a52dfddb | 6966 | else if (!is_dead_reg (SET_DEST (set), counts) |
e8825bb0 | 6967 | || side_effects_p (SET_SRC (set))) |
6d866f03 | 6968 | return true; |
6969 | return false; | |
6970 | } | |
6971 | ||
6972 | /* Return true if insn is live. */ | |
6973 | ||
6974 | static bool | |
47f1d198 | 6975 | insn_live_p (rtx_insn *insn, int *counts) |
6d866f03 | 6976 | { |
6977 | int i; | |
bc0dfc8d | 6978 | if (!cfun->can_delete_dead_exceptions && !insn_nothrow_p (insn)) |
8ca56a3b | 6979 | return true; |
6980 | else if (GET_CODE (PATTERN (insn)) == SET) | |
6fc669ae | 6981 | return set_live_p (PATTERN (insn), insn, counts); |
6d866f03 | 6982 | else if (GET_CODE (PATTERN (insn)) == PARALLEL) |
6fc669ae | 6983 | { |
6984 | for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--) | |
6985 | { | |
6986 | rtx elt = XVECEXP (PATTERN (insn), 0, i); | |
6d866f03 | 6987 | |
6fc669ae | 6988 | if (GET_CODE (elt) == SET) |
6989 | { | |
6990 | if (set_live_p (elt, insn, counts)) | |
6991 | return true; | |
6992 | } | |
f03bb97b | 6993 | else if (GET_CODE (elt) != CLOBBER && GET_CODE (elt) != USE) |
6fc669ae | 6994 | return true; |
6995 | } | |
6996 | return false; | |
6997 | } | |
9845d120 | 6998 | else if (DEBUG_INSN_P (insn)) |
6999 | { | |
47f1d198 | 7000 | rtx_insn *next; |
9845d120 | 7001 | |
90567983 | 7002 | if (DEBUG_MARKER_INSN_P (insn)) |
7003 | return true; | |
7004 | ||
9845d120 | 7005 | for (next = NEXT_INSN (insn); next; next = NEXT_INSN (next)) |
7006 | if (NOTE_P (next)) | |
7007 | continue; | |
7008 | else if (!DEBUG_INSN_P (next)) | |
7009 | return true; | |
90567983 | 7010 | /* If we find an inspection point, such as a debug begin stmt, |
7011 | we want to keep the earlier debug insn. */ | |
7012 | else if (DEBUG_MARKER_INSN_P (next)) | |
7013 | return true; | |
9845d120 | 7014 | else if (INSN_VAR_LOCATION_DECL (insn) == INSN_VAR_LOCATION_DECL (next)) |
7015 | return false; | |
7016 | ||
9845d120 | 7017 | return true; |
7018 | } | |
6d866f03 | 7019 | else |
7020 | return true; | |
7021 | } | |
7022 | ||
a52dfddb | 7023 | /* Count the number of stores into pseudo. Callback for note_stores. */ |
7024 | ||
7025 | static void | |
7026 | count_stores (rtx x, const_rtx set ATTRIBUTE_UNUSED, void *data) | |
7027 | { | |
7028 | int *counts = (int *) data; | |
7029 | if (REG_P (x) && REGNO (x) >= FIRST_PSEUDO_REGISTER) | |
7030 | counts[REGNO (x)]++; | |
7031 | } | |
7032 | ||
a51848dc | 7033 | /* Return if DEBUG_INSN pattern PAT needs to be reset because some dead |
7034 | pseudo doesn't have a replacement. COUNTS[X] is zero if register X | |
7035 | is dead and REPLACEMENTS[X] is null if it has no replacemenet. | |
7036 | Set *SEEN_REPL to true if we see a dead register that does have | |
7037 | a replacement. */ | |
a52dfddb | 7038 | |
a51848dc | 7039 | static bool |
7040 | is_dead_debug_insn (const_rtx pat, int *counts, rtx *replacements, | |
7041 | bool *seen_repl) | |
a52dfddb | 7042 | { |
a51848dc | 7043 | subrtx_iterator::array_type array; |
7044 | FOR_EACH_SUBRTX (iter, array, pat, NONCONST) | |
a52dfddb | 7045 | { |
a51848dc | 7046 | const_rtx x = *iter; |
7047 | if (is_dead_reg (x, counts)) | |
7048 | { | |
7049 | if (replacements && replacements[REGNO (x)] != NULL_RTX) | |
7050 | *seen_repl = true; | |
7051 | else | |
7052 | return true; | |
7053 | } | |
a52dfddb | 7054 | } |
a51848dc | 7055 | return false; |
a52dfddb | 7056 | } |
7057 | ||
7058 | /* Replace a dead pseudo in a DEBUG_INSN with replacement DEBUG_EXPR. | |
7059 | Callback for simplify_replace_fn_rtx. */ | |
7060 | ||
7061 | static rtx | |
7062 | replace_dead_reg (rtx x, const_rtx old_rtx ATTRIBUTE_UNUSED, void *data) | |
7063 | { | |
7064 | rtx *replacements = (rtx *) data; | |
7065 | ||
7066 | if (REG_P (x) | |
7067 | && REGNO (x) >= FIRST_PSEUDO_REGISTER | |
7068 | && replacements[REGNO (x)] != NULL_RTX) | |
7069 | { | |
7070 | if (GET_MODE (x) == GET_MODE (replacements[REGNO (x)])) | |
7071 | return replacements[REGNO (x)]; | |
7072 | return lowpart_subreg (GET_MODE (x), replacements[REGNO (x)], | |
7073 | GET_MODE (replacements[REGNO (x)])); | |
7074 | } | |
7075 | return NULL_RTX; | |
7076 | } | |
7077 | ||
752df20e | 7078 | /* Scan all the insns and delete any that are dead; i.e., they store a register |
7079 | that is never used or they copy a register to itself. | |
7080 | ||
33752533 | 7081 | This is used to remove insns made obviously dead by cse, loop or other |
7082 | optimizations. It improves the heuristics in loop since it won't try to | |
7083 | move dead invariants out of loops or make givs for dead quantities. The | |
7084 | remaining passes of the compilation are also sped up. */ | |
752df20e | 7085 | |
fb20d6fa | 7086 | int |
f2f648a3 | 7087 | delete_trivially_dead_insns (rtx_insn *insns, int nreg) |
752df20e | 7088 | { |
b9cf3f63 | 7089 | int *counts; |
f2f648a3 | 7090 | rtx_insn *insn, *prev; |
a52dfddb | 7091 | rtx *replacements = NULL; |
2aaf7099 | 7092 | int ndead = 0; |
752df20e | 7093 | |
fb20d6fa | 7094 | timevar_push (TV_DELETE_TRIVIALLY_DEAD); |
752df20e | 7095 | /* First count the number of times each register is used. */ |
c64f38bf | 7096 | if (MAY_HAVE_DEBUG_BIND_INSNS) |
a52dfddb | 7097 | { |
7098 | counts = XCNEWVEC (int, nreg * 3); | |
7099 | for (insn = insns; insn; insn = NEXT_INSN (insn)) | |
c64f38bf | 7100 | if (DEBUG_BIND_INSN_P (insn)) |
a52dfddb | 7101 | count_reg_usage (INSN_VAR_LOCATION_LOC (insn), counts + nreg, |
7102 | NULL_RTX, 1); | |
7103 | else if (INSN_P (insn)) | |
7104 | { | |
7105 | count_reg_usage (insn, counts, NULL_RTX, 1); | |
dfa9d60a | 7106 | note_stores (insn, count_stores, counts + nreg * 2); |
a52dfddb | 7107 | } |
7108 | /* If there can be debug insns, COUNTS are 3 consecutive arrays. | |
7109 | First one counts how many times each pseudo is used outside | |
7110 | of debug insns, second counts how many times each pseudo is | |
7111 | used in debug insns and third counts how many times a pseudo | |
7112 | is stored. */ | |
7113 | } | |
7114 | else | |
7115 | { | |
7116 | counts = XCNEWVEC (int, nreg); | |
7117 | for (insn = insns; insn; insn = NEXT_INSN (insn)) | |
7118 | if (INSN_P (insn)) | |
7119 | count_reg_usage (insn, counts, NULL_RTX, 1); | |
7120 | /* If no debug insns can be present, COUNTS is just an array | |
7121 | which counts how many times each pseudo is used. */ | |
7122 | } | |
0d1f9fde | 7123 | /* Pseudo PIC register should be considered as used due to possible |
7124 | new usages generated. */ | |
7125 | if (!reload_completed | |
7126 | && pic_offset_table_rtx | |
7127 | && REGNO (pic_offset_table_rtx) >= FIRST_PSEUDO_REGISTER) | |
7128 | counts[REGNO (pic_offset_table_rtx)]++; | |
2aaf7099 | 7129 | /* Go from the last insn to the first and delete insns that only set unused |
7130 | registers or copy a register to itself. As we delete an insn, remove | |
7131 | usage counts for registers it uses. | |
af21a202 | 7132 | |
2aaf7099 | 7133 | The first jump optimization pass may leave a real insn as the last |
7134 | insn in the function. We must not skip that insn or we may end | |
a52dfddb | 7135 | up deleting code that is not really dead. |
7136 | ||
7137 | If some otherwise unused register is only used in DEBUG_INSNs, | |
7138 | try to create a DEBUG_EXPR temporary and emit a DEBUG_INSN before | |
7139 | the setter. Then go through DEBUG_INSNs and if a DEBUG_EXPR | |
7140 | has been created for the unused register, replace it with | |
7141 | the DEBUG_EXPR, otherwise reset the DEBUG_INSN. */ | |
4ac6fa85 | 7142 | for (insn = get_last_insn (); insn; insn = prev) |
2aaf7099 | 7143 | { |
7144 | int live_insn = 0; | |
752df20e | 7145 | |
4ac6fa85 | 7146 | prev = PREV_INSN (insn); |
7147 | if (!INSN_P (insn)) | |
7148 | continue; | |
752df20e | 7149 | |
1e5b92fa | 7150 | live_insn = insn_live_p (insn, counts); |
752df20e | 7151 | |
2aaf7099 | 7152 | /* If this is a dead insn, delete it and show registers in it aren't |
7153 | being used. */ | |
752df20e | 7154 | |
3072d30e | 7155 | if (! live_insn && dbg_cnt (delete_trivial_dead)) |
2aaf7099 | 7156 | { |
a52dfddb | 7157 | if (DEBUG_INSN_P (insn)) |
c64f38bf | 7158 | { |
7159 | if (DEBUG_BIND_INSN_P (insn)) | |
7160 | count_reg_usage (INSN_VAR_LOCATION_LOC (insn), counts + nreg, | |
7161 | NULL_RTX, -1); | |
7162 | } | |
a52dfddb | 7163 | else |
7164 | { | |
7165 | rtx set; | |
c64f38bf | 7166 | if (MAY_HAVE_DEBUG_BIND_INSNS |
a52dfddb | 7167 | && (set = single_set (insn)) != NULL_RTX |
7168 | && is_dead_reg (SET_DEST (set), counts) | |
7169 | /* Used at least once in some DEBUG_INSN. */ | |
7170 | && counts[REGNO (SET_DEST (set)) + nreg] > 0 | |
7171 | /* And set exactly once. */ | |
7172 | && counts[REGNO (SET_DEST (set)) + nreg * 2] == 1 | |
7173 | && !side_effects_p (SET_SRC (set)) | |
7174 | && asm_noperands (PATTERN (insn)) < 0) | |
7175 | { | |
e149ca56 | 7176 | rtx dval, bind_var_loc; |
7177 | rtx_insn *bind; | |
a52dfddb | 7178 | |
7179 | /* Create DEBUG_EXPR (and DEBUG_EXPR_DECL). */ | |
7180 | dval = make_debug_expr_from_rtl (SET_DEST (set)); | |
7181 | ||
7182 | /* Emit a debug bind insn before the insn in which | |
7183 | reg dies. */ | |
e149ca56 | 7184 | bind_var_loc = |
7185 | gen_rtx_VAR_LOCATION (GET_MODE (SET_DEST (set)), | |
7186 | DEBUG_EXPR_TREE_DECL (dval), | |
7187 | SET_SRC (set), | |
7188 | VAR_INIT_STATUS_INITIALIZED); | |
7189 | count_reg_usage (bind_var_loc, counts + nreg, NULL_RTX, 1); | |
7190 | ||
7191 | bind = emit_debug_insn_before (bind_var_loc, insn); | |
a52dfddb | 7192 | df_insn_rescan (bind); |
7193 | ||
7194 | if (replacements == NULL) | |
7195 | replacements = XCNEWVEC (rtx, nreg); | |
7196 | replacements[REGNO (SET_DEST (set))] = dval; | |
7197 | } | |
7198 | ||
7199 | count_reg_usage (insn, counts, NULL_RTX, -1); | |
7200 | ndead++; | |
7201 | } | |
bfa8ea12 | 7202 | cse_cfg_altered |= delete_insn_and_edges (insn); |
2aaf7099 | 7203 | } |
d4c5e26d | 7204 | } |
b9cf3f63 | 7205 | |
c64f38bf | 7206 | if (MAY_HAVE_DEBUG_BIND_INSNS) |
a52dfddb | 7207 | { |
a52dfddb | 7208 | for (insn = get_last_insn (); insn; insn = PREV_INSN (insn)) |
c64f38bf | 7209 | if (DEBUG_BIND_INSN_P (insn)) |
a52dfddb | 7210 | { |
7211 | /* If this debug insn references a dead register that wasn't replaced | |
7212 | with an DEBUG_EXPR, reset the DEBUG_INSN. */ | |
a51848dc | 7213 | bool seen_repl = false; |
7214 | if (is_dead_debug_insn (INSN_VAR_LOCATION_LOC (insn), | |
7215 | counts, replacements, &seen_repl)) | |
a52dfddb | 7216 | { |
7217 | INSN_VAR_LOCATION_LOC (insn) = gen_rtx_UNKNOWN_VAR_LOC (); | |
7218 | df_insn_rescan (insn); | |
7219 | } | |
a51848dc | 7220 | else if (seen_repl) |
a52dfddb | 7221 | { |
7222 | INSN_VAR_LOCATION_LOC (insn) | |
7223 | = simplify_replace_fn_rtx (INSN_VAR_LOCATION_LOC (insn), | |
7224 | NULL_RTX, replace_dead_reg, | |
7225 | replacements); | |
7226 | df_insn_rescan (insn); | |
7227 | } | |
7228 | } | |
dd045aee | 7229 | free (replacements); |
a52dfddb | 7230 | } |
7231 | ||
450d042a | 7232 | if (dump_file && ndead) |
2aaf7099 | 7233 | fprintf (dump_file, "Deleted %i trivially dead insns\n", |
7234 | ndead); | |
b9cf3f63 | 7235 | /* Clean up. */ |
7236 | free (counts); | |
fb20d6fa | 7237 | timevar_pop (TV_DELETE_TRIVIALLY_DEAD); |
7238 | return ndead; | |
752df20e | 7239 | } |
124ac4e4 | 7240 | |
2342ac7b | 7241 | /* If LOC contains references to NEWREG in a different mode, change them |
7242 | to use NEWREG instead. */ | |
124ac4e4 | 7243 | |
2342ac7b | 7244 | static void |
7245 | cse_change_cc_mode (subrtx_ptr_iterator::array_type &array, | |
41805aed | 7246 | rtx *loc, rtx_insn *insn, rtx newreg) |
124ac4e4 | 7247 | { |
2342ac7b | 7248 | FOR_EACH_SUBRTX_PTR (iter, array, loc, NONCONST) |
124ac4e4 | 7249 | { |
2342ac7b | 7250 | rtx *loc = *iter; |
7251 | rtx x = *loc; | |
7252 | if (x | |
7253 | && REG_P (x) | |
7254 | && REGNO (x) == REGNO (newreg) | |
7255 | && GET_MODE (x) != GET_MODE (newreg)) | |
7256 | { | |
7257 | validate_change (insn, loc, newreg, 1); | |
7258 | iter.skip_subrtxes (); | |
7259 | } | |
124ac4e4 | 7260 | } |
124ac4e4 | 7261 | } |
7262 | ||
b866694e | 7263 | /* Change the mode of any reference to the register REGNO (NEWREG) to |
7264 | GET_MODE (NEWREG) in INSN. */ | |
7265 | ||
7266 | static void | |
47f1d198 | 7267 | cse_change_cc_mode_insn (rtx_insn *insn, rtx newreg) |
b866694e | 7268 | { |
b866694e | 7269 | int success; |
7270 | ||
7271 | if (!INSN_P (insn)) | |
7272 | return; | |
7273 | ||
2342ac7b | 7274 | subrtx_ptr_iterator::array_type array; |
7275 | cse_change_cc_mode (array, &PATTERN (insn), insn, newreg); | |
7276 | cse_change_cc_mode (array, ®_NOTES (insn), insn, newreg); | |
48e1416a | 7277 | |
b866694e | 7278 | /* If the following assertion was triggered, there is most probably |
7279 | something wrong with the cc_modes_compatible back end function. | |
7280 | CC modes only can be considered compatible if the insn - with the mode | |
7281 | replaced by any of the compatible modes - can still be recognized. */ | |
7282 | success = apply_change_group (); | |
7283 | gcc_assert (success); | |
7284 | } | |
7285 | ||
124ac4e4 | 7286 | /* Change the mode of any reference to the register REGNO (NEWREG) to |
7287 | GET_MODE (NEWREG), starting at START. Stop before END. Stop at | |
4362e8e0 | 7288 | any instruction which modifies NEWREG. */ |
124ac4e4 | 7289 | |
7290 | static void | |
47f1d198 | 7291 | cse_change_cc_mode_insns (rtx_insn *start, rtx_insn *end, rtx newreg) |
124ac4e4 | 7292 | { |
47f1d198 | 7293 | rtx_insn *insn; |
124ac4e4 | 7294 | |
7295 | for (insn = start; insn != end; insn = NEXT_INSN (insn)) | |
7296 | { | |
7297 | if (! INSN_P (insn)) | |
7298 | continue; | |
7299 | ||
4362e8e0 | 7300 | if (reg_set_p (newreg, insn)) |
124ac4e4 | 7301 | return; |
7302 | ||
b866694e | 7303 | cse_change_cc_mode_insn (insn, newreg); |
124ac4e4 | 7304 | } |
7305 | } | |
7306 | ||
7307 | /* BB is a basic block which finishes with CC_REG as a condition code | |
7308 | register which is set to CC_SRC. Look through the successors of BB | |
7309 | to find blocks which have a single predecessor (i.e., this one), | |
7310 | and look through those blocks for an assignment to CC_REG which is | |
7311 | equivalent to CC_SRC. CAN_CHANGE_MODE indicates whether we are | |
7312 | permitted to change the mode of CC_SRC to a compatible mode. This | |
7313 | returns VOIDmode if no equivalent assignments were found. | |
7314 | Otherwise it returns the mode which CC_SRC should wind up with. | |
650d2134 | 7315 | ORIG_BB should be the same as BB in the outermost cse_cc_succs call, |
7316 | but is passed unmodified down to recursive calls in order to prevent | |
7317 | endless recursion. | |
124ac4e4 | 7318 | |
7319 | The main complexity in this function is handling the mode issues. | |
7320 | We may have more than one duplicate which we can eliminate, and we | |
7321 | try to find a mode which will work for multiple duplicates. */ | |
7322 | ||
3754d046 | 7323 | static machine_mode |
650d2134 | 7324 | cse_cc_succs (basic_block bb, basic_block orig_bb, rtx cc_reg, rtx cc_src, |
7325 | bool can_change_mode) | |
124ac4e4 | 7326 | { |
7327 | bool found_equiv; | |
3754d046 | 7328 | machine_mode mode; |
124ac4e4 | 7329 | unsigned int insn_count; |
7330 | edge e; | |
47f1d198 | 7331 | rtx_insn *insns[2]; |
3754d046 | 7332 | machine_mode modes[2]; |
47f1d198 | 7333 | rtx_insn *last_insns[2]; |
124ac4e4 | 7334 | unsigned int i; |
7335 | rtx newreg; | |
cd665a06 | 7336 | edge_iterator ei; |
124ac4e4 | 7337 | |
7338 | /* We expect to have two successors. Look at both before picking | |
7339 | the final mode for the comparison. If we have more successors | |
7340 | (i.e., some sort of table jump, although that seems unlikely), | |
7341 | then we require all beyond the first two to use the same | |
7342 | mode. */ | |
7343 | ||
7344 | found_equiv = false; | |
7345 | mode = GET_MODE (cc_src); | |
7346 | insn_count = 0; | |
cd665a06 | 7347 | FOR_EACH_EDGE (e, ei, bb->succs) |
124ac4e4 | 7348 | { |
47f1d198 | 7349 | rtx_insn *insn; |
7350 | rtx_insn *end; | |
124ac4e4 | 7351 | |
7352 | if (e->flags & EDGE_COMPLEX) | |
7353 | continue; | |
7354 | ||
cd665a06 | 7355 | if (EDGE_COUNT (e->dest->preds) != 1 |
34154e27 | 7356 | || e->dest == EXIT_BLOCK_PTR_FOR_FN (cfun) |
650d2134 | 7357 | /* Avoid endless recursion on unreachable blocks. */ |
7358 | || e->dest == orig_bb) | |
124ac4e4 | 7359 | continue; |
7360 | ||
7361 | end = NEXT_INSN (BB_END (e->dest)); | |
7362 | for (insn = BB_HEAD (e->dest); insn != end; insn = NEXT_INSN (insn)) | |
7363 | { | |
7364 | rtx set; | |
7365 | ||
7366 | if (! INSN_P (insn)) | |
7367 | continue; | |
7368 | ||
7369 | /* If CC_SRC is modified, we have to stop looking for | |
7370 | something which uses it. */ | |
7371 | if (modified_in_p (cc_src, insn)) | |
7372 | break; | |
7373 | ||
7374 | /* Check whether INSN sets CC_REG to CC_SRC. */ | |
7375 | set = single_set (insn); | |
7376 | if (set | |
8ad4c111 | 7377 | && REG_P (SET_DEST (set)) |
124ac4e4 | 7378 | && REGNO (SET_DEST (set)) == REGNO (cc_reg)) |
7379 | { | |
7380 | bool found; | |
3754d046 | 7381 | machine_mode set_mode; |
7382 | machine_mode comp_mode; | |
124ac4e4 | 7383 | |
7384 | found = false; | |
7385 | set_mode = GET_MODE (SET_SRC (set)); | |
7386 | comp_mode = set_mode; | |
7387 | if (rtx_equal_p (cc_src, SET_SRC (set))) | |
7388 | found = true; | |
7389 | else if (GET_CODE (cc_src) == COMPARE | |
7390 | && GET_CODE (SET_SRC (set)) == COMPARE | |
960670fc | 7391 | && mode != set_mode |
124ac4e4 | 7392 | && rtx_equal_p (XEXP (cc_src, 0), |
7393 | XEXP (SET_SRC (set), 0)) | |
7394 | && rtx_equal_p (XEXP (cc_src, 1), | |
7395 | XEXP (SET_SRC (set), 1))) | |
48e1416a | 7396 | |
124ac4e4 | 7397 | { |
883b2e73 | 7398 | comp_mode = targetm.cc_modes_compatible (mode, set_mode); |
124ac4e4 | 7399 | if (comp_mode != VOIDmode |
7400 | && (can_change_mode || comp_mode == mode)) | |
7401 | found = true; | |
7402 | } | |
7403 | ||
7404 | if (found) | |
7405 | { | |
7406 | found_equiv = true; | |
960670fc | 7407 | if (insn_count < ARRAY_SIZE (insns)) |
124ac4e4 | 7408 | { |
7409 | insns[insn_count] = insn; | |
7410 | modes[insn_count] = set_mode; | |
7411 | last_insns[insn_count] = end; | |
7412 | ++insn_count; | |
7413 | ||
960670fc | 7414 | if (mode != comp_mode) |
7415 | { | |
cc636d56 | 7416 | gcc_assert (can_change_mode); |
960670fc | 7417 | mode = comp_mode; |
b866694e | 7418 | |
7419 | /* The modified insn will be re-recognized later. */ | |
960670fc | 7420 | PUT_MODE (cc_src, mode); |
7421 | } | |
124ac4e4 | 7422 | } |
7423 | else | |
7424 | { | |
7425 | if (set_mode != mode) | |
960670fc | 7426 | { |
7427 | /* We found a matching expression in the | |
7428 | wrong mode, but we don't have room to | |
7429 | store it in the array. Punt. This case | |
7430 | should be rare. */ | |
7431 | break; | |
7432 | } | |
124ac4e4 | 7433 | /* INSN sets CC_REG to a value equal to CC_SRC |
7434 | with the right mode. We can simply delete | |
7435 | it. */ | |
7436 | delete_insn (insn); | |
7437 | } | |
7438 | ||
7439 | /* We found an instruction to delete. Keep looking, | |
7440 | in the hopes of finding a three-way jump. */ | |
7441 | continue; | |
7442 | } | |
7443 | ||
7444 | /* We found an instruction which sets the condition | |
7445 | code, so don't look any farther. */ | |
7446 | break; | |
7447 | } | |
7448 | ||
7449 | /* If INSN sets CC_REG in some other way, don't look any | |
7450 | farther. */ | |
7451 | if (reg_set_p (cc_reg, insn)) | |
7452 | break; | |
7453 | } | |
7454 | ||
7455 | /* If we fell off the bottom of the block, we can keep looking | |
7456 | through successors. We pass CAN_CHANGE_MODE as false because | |
7457 | we aren't prepared to handle compatibility between the | |
7458 | further blocks and this block. */ | |
7459 | if (insn == end) | |
7460 | { | |
3754d046 | 7461 | machine_mode submode; |
960670fc | 7462 | |
650d2134 | 7463 | submode = cse_cc_succs (e->dest, orig_bb, cc_reg, cc_src, false); |
960670fc | 7464 | if (submode != VOIDmode) |
7465 | { | |
cc636d56 | 7466 | gcc_assert (submode == mode); |
960670fc | 7467 | found_equiv = true; |
7468 | can_change_mode = false; | |
7469 | } | |
124ac4e4 | 7470 | } |
7471 | } | |
7472 | ||
7473 | if (! found_equiv) | |
7474 | return VOIDmode; | |
7475 | ||
7476 | /* Now INSN_COUNT is the number of instructions we found which set | |
7477 | CC_REG to a value equivalent to CC_SRC. The instructions are in | |
7478 | INSNS. The modes used by those instructions are in MODES. */ | |
7479 | ||
7480 | newreg = NULL_RTX; | |
7481 | for (i = 0; i < insn_count; ++i) | |
7482 | { | |
7483 | if (modes[i] != mode) | |
7484 | { | |
7485 | /* We need to change the mode of CC_REG in INSNS[i] and | |
7486 | subsequent instructions. */ | |
7487 | if (! newreg) | |
7488 | { | |
7489 | if (GET_MODE (cc_reg) == mode) | |
7490 | newreg = cc_reg; | |
7491 | else | |
7492 | newreg = gen_rtx_REG (mode, REGNO (cc_reg)); | |
7493 | } | |
7494 | cse_change_cc_mode_insns (NEXT_INSN (insns[i]), last_insns[i], | |
7495 | newreg); | |
7496 | } | |
7497 | ||
bfa8ea12 | 7498 | cse_cfg_altered |= delete_insn_and_edges (insns[i]); |
124ac4e4 | 7499 | } |
7500 | ||
7501 | return mode; | |
7502 | } | |
7503 | ||
7504 | /* If we have a fixed condition code register (or two), walk through | |
7505 | the instructions and try to eliminate duplicate assignments. */ | |
7506 | ||
66c2c707 | 7507 | static void |
124ac4e4 | 7508 | cse_condition_code_reg (void) |
7509 | { | |
7510 | unsigned int cc_regno_1; | |
7511 | unsigned int cc_regno_2; | |
7512 | rtx cc_reg_1; | |
7513 | rtx cc_reg_2; | |
7514 | basic_block bb; | |
7515 | ||
883b2e73 | 7516 | if (! targetm.fixed_condition_code_regs (&cc_regno_1, &cc_regno_2)) |
124ac4e4 | 7517 | return; |
7518 | ||
7519 | cc_reg_1 = gen_rtx_REG (CCmode, cc_regno_1); | |
7520 | if (cc_regno_2 != INVALID_REGNUM) | |
7521 | cc_reg_2 = gen_rtx_REG (CCmode, cc_regno_2); | |
7522 | else | |
7523 | cc_reg_2 = NULL_RTX; | |
7524 | ||
fc00614f | 7525 | FOR_EACH_BB_FN (bb, cfun) |
124ac4e4 | 7526 | { |
47f1d198 | 7527 | rtx_insn *last_insn; |
124ac4e4 | 7528 | rtx cc_reg; |
47f1d198 | 7529 | rtx_insn *insn; |
7530 | rtx_insn *cc_src_insn; | |
124ac4e4 | 7531 | rtx cc_src; |
3754d046 | 7532 | machine_mode mode; |
7533 | machine_mode orig_mode; | |
124ac4e4 | 7534 | |
7535 | /* Look for blocks which end with a conditional jump based on a | |
7536 | condition code register. Then look for the instruction which | |
7537 | sets the condition code register. Then look through the | |
7538 | successor blocks for instructions which set the condition | |
7539 | code register to the same value. There are other possible | |
7540 | uses of the condition code register, but these are by far the | |
7541 | most common and the ones which we are most likely to be able | |
7542 | to optimize. */ | |
7543 | ||
7544 | last_insn = BB_END (bb); | |
6d7dc5b9 | 7545 | if (!JUMP_P (last_insn)) |
124ac4e4 | 7546 | continue; |
7547 | ||
7548 | if (reg_referenced_p (cc_reg_1, PATTERN (last_insn))) | |
7549 | cc_reg = cc_reg_1; | |
7550 | else if (cc_reg_2 && reg_referenced_p (cc_reg_2, PATTERN (last_insn))) | |
7551 | cc_reg = cc_reg_2; | |
7552 | else | |
7553 | continue; | |
7554 | ||
47f1d198 | 7555 | cc_src_insn = NULL; |
124ac4e4 | 7556 | cc_src = NULL_RTX; |
7557 | for (insn = PREV_INSN (last_insn); | |
7558 | insn && insn != PREV_INSN (BB_HEAD (bb)); | |
7559 | insn = PREV_INSN (insn)) | |
7560 | { | |
7561 | rtx set; | |
7562 | ||
7563 | if (! INSN_P (insn)) | |
7564 | continue; | |
7565 | set = single_set (insn); | |
7566 | if (set | |
8ad4c111 | 7567 | && REG_P (SET_DEST (set)) |
124ac4e4 | 7568 | && REGNO (SET_DEST (set)) == REGNO (cc_reg)) |
7569 | { | |
7570 | cc_src_insn = insn; | |
7571 | cc_src = SET_SRC (set); | |
7572 | break; | |
7573 | } | |
7574 | else if (reg_set_p (cc_reg, insn)) | |
7575 | break; | |
7576 | } | |
7577 | ||
7578 | if (! cc_src_insn) | |
7579 | continue; | |
7580 | ||
7581 | if (modified_between_p (cc_src, cc_src_insn, NEXT_INSN (last_insn))) | |
7582 | continue; | |
7583 | ||
7584 | /* Now CC_REG is a condition code register used for a | |
7585 | conditional jump at the end of the block, and CC_SRC, in | |
7586 | CC_SRC_INSN, is the value to which that condition code | |
7587 | register is set, and CC_SRC is still meaningful at the end of | |
7588 | the basic block. */ | |
7589 | ||
960670fc | 7590 | orig_mode = GET_MODE (cc_src); |
650d2134 | 7591 | mode = cse_cc_succs (bb, bb, cc_reg, cc_src, true); |
960670fc | 7592 | if (mode != VOIDmode) |
124ac4e4 | 7593 | { |
cc636d56 | 7594 | gcc_assert (mode == GET_MODE (cc_src)); |
960670fc | 7595 | if (mode != orig_mode) |
4362e8e0 | 7596 | { |
7597 | rtx newreg = gen_rtx_REG (mode, REGNO (cc_reg)); | |
7598 | ||
b866694e | 7599 | cse_change_cc_mode_insn (cc_src_insn, newreg); |
4362e8e0 | 7600 | |
7601 | /* Do the same in the following insns that use the | |
7602 | current value of CC_REG within BB. */ | |
7603 | cse_change_cc_mode_insns (NEXT_INSN (cc_src_insn), | |
7604 | NEXT_INSN (last_insn), | |
7605 | newreg); | |
7606 | } | |
124ac4e4 | 7607 | } |
7608 | } | |
7609 | } | |
77fce4cd | 7610 | \f |
7611 | ||
7612 | /* Perform common subexpression elimination. Nonzero value from | |
7613 | `cse_main' means that jumps were simplified and some code may now | |
7614 | be unreachable, so do jump optimization again. */ | |
2a1990e9 | 7615 | static unsigned int |
77fce4cd | 7616 | rest_of_handle_cse (void) |
7617 | { | |
7618 | int tem; | |
3072d30e | 7619 | |
77fce4cd | 7620 | if (dump_file) |
562d71e8 | 7621 | dump_flow_info (dump_file, dump_flags); |
77fce4cd | 7622 | |
3f5be5f4 | 7623 | tem = cse_main (get_insns (), max_reg_num ()); |
77fce4cd | 7624 | |
7625 | /* If we are not running more CSE passes, then we are no longer | |
7626 | expecting CSE to be run. But always rerun it in a cheap mode. */ | |
7627 | cse_not_expected = !flag_rerun_cse_after_loop && !flag_gcse; | |
7628 | ||
283a6b26 | 7629 | if (tem == 2) |
7630 | { | |
7631 | timevar_push (TV_JUMP); | |
7632 | rebuild_jump_labels (get_insns ()); | |
03a400fb | 7633 | cse_cfg_altered |= cleanup_cfg (CLEANUP_CFG_CHANGED); |
283a6b26 | 7634 | timevar_pop (TV_JUMP); |
7635 | } | |
7636 | else if (tem == 1 || optimize > 1) | |
03a400fb | 7637 | cse_cfg_altered |= cleanup_cfg (0); |
be22716f | 7638 | |
2a1990e9 | 7639 | return 0; |
77fce4cd | 7640 | } |
7641 | ||
cbe8bda8 | 7642 | namespace { |
7643 | ||
7644 | const pass_data pass_data_cse = | |
77fce4cd | 7645 | { |
cbe8bda8 | 7646 | RTL_PASS, /* type */ |
7647 | "cse1", /* name */ | |
7648 | OPTGROUP_NONE, /* optinfo_flags */ | |
cbe8bda8 | 7649 | TV_CSE, /* tv_id */ |
7650 | 0, /* properties_required */ | |
7651 | 0, /* properties_provided */ | |
7652 | 0, /* properties_destroyed */ | |
7653 | 0, /* todo_flags_start */ | |
8b88439e | 7654 | TODO_df_finish, /* todo_flags_finish */ |
77fce4cd | 7655 | }; |
7656 | ||
cbe8bda8 | 7657 | class pass_cse : public rtl_opt_pass |
7658 | { | |
7659 | public: | |
9af5ce0c | 7660 | pass_cse (gcc::context *ctxt) |
7661 | : rtl_opt_pass (pass_data_cse, ctxt) | |
cbe8bda8 | 7662 | {} |
7663 | ||
7664 | /* opt_pass methods: */ | |
31315c24 | 7665 | virtual bool gate (function *) { return optimize > 0; } |
65b0537f | 7666 | virtual unsigned int execute (function *) { return rest_of_handle_cse (); } |
cbe8bda8 | 7667 | |
7668 | }; // class pass_cse | |
7669 | ||
7670 | } // anon namespace | |
7671 | ||
7672 | rtl_opt_pass * | |
7673 | make_pass_cse (gcc::context *ctxt) | |
7674 | { | |
7675 | return new pass_cse (ctxt); | |
7676 | } | |
7677 | ||
77fce4cd | 7678 | |
77fce4cd | 7679 | /* Run second CSE pass after loop optimizations. */ |
2a1990e9 | 7680 | static unsigned int |
77fce4cd | 7681 | rest_of_handle_cse2 (void) |
7682 | { | |
7683 | int tem; | |
7684 | ||
7685 | if (dump_file) | |
562d71e8 | 7686 | dump_flow_info (dump_file, dump_flags); |
77fce4cd | 7687 | |
3f5be5f4 | 7688 | tem = cse_main (get_insns (), max_reg_num ()); |
77fce4cd | 7689 | |
7690 | /* Run a pass to eliminate duplicated assignments to condition code | |
7691 | registers. We have to run this after bypass_jumps, because it | |
7692 | makes it harder for that pass to determine whether a jump can be | |
7693 | bypassed safely. */ | |
7694 | cse_condition_code_reg (); | |
7695 | ||
77fce4cd | 7696 | delete_trivially_dead_insns (get_insns (), max_reg_num ()); |
7697 | ||
283a6b26 | 7698 | if (tem == 2) |
77fce4cd | 7699 | { |
7700 | timevar_push (TV_JUMP); | |
7701 | rebuild_jump_labels (get_insns ()); | |
03a400fb | 7702 | cse_cfg_altered |= cleanup_cfg (CLEANUP_CFG_CHANGED); |
77fce4cd | 7703 | timevar_pop (TV_JUMP); |
7704 | } | |
283a6b26 | 7705 | else if (tem == 1) |
03a400fb | 7706 | cse_cfg_altered |= cleanup_cfg (0); |
283a6b26 | 7707 | |
77fce4cd | 7708 | cse_not_expected = 1; |
2a1990e9 | 7709 | return 0; |
77fce4cd | 7710 | } |
7711 | ||
7712 | ||
cbe8bda8 | 7713 | namespace { |
7714 | ||
7715 | const pass_data pass_data_cse2 = | |
77fce4cd | 7716 | { |
cbe8bda8 | 7717 | RTL_PASS, /* type */ |
7718 | "cse2", /* name */ | |
7719 | OPTGROUP_NONE, /* optinfo_flags */ | |
cbe8bda8 | 7720 | TV_CSE2, /* tv_id */ |
7721 | 0, /* properties_required */ | |
7722 | 0, /* properties_provided */ | |
7723 | 0, /* properties_destroyed */ | |
7724 | 0, /* todo_flags_start */ | |
8b88439e | 7725 | TODO_df_finish, /* todo_flags_finish */ |
77fce4cd | 7726 | }; |
d743aba2 | 7727 | |
cbe8bda8 | 7728 | class pass_cse2 : public rtl_opt_pass |
7729 | { | |
7730 | public: | |
9af5ce0c | 7731 | pass_cse2 (gcc::context *ctxt) |
7732 | : rtl_opt_pass (pass_data_cse2, ctxt) | |
cbe8bda8 | 7733 | {} |
7734 | ||
7735 | /* opt_pass methods: */ | |
31315c24 | 7736 | virtual bool gate (function *) |
7737 | { | |
7738 | return optimize > 0 && flag_rerun_cse_after_loop; | |
7739 | } | |
7740 | ||
65b0537f | 7741 | virtual unsigned int execute (function *) { return rest_of_handle_cse2 (); } |
cbe8bda8 | 7742 | |
7743 | }; // class pass_cse2 | |
7744 | ||
7745 | } // anon namespace | |
7746 | ||
7747 | rtl_opt_pass * | |
7748 | make_pass_cse2 (gcc::context *ctxt) | |
7749 | { | |
7750 | return new pass_cse2 (ctxt); | |
7751 | } | |
7752 | ||
d743aba2 | 7753 | /* Run second CSE pass after loop optimizations. */ |
7754 | static unsigned int | |
7755 | rest_of_handle_cse_after_global_opts (void) | |
7756 | { | |
7757 | int save_cfj; | |
7758 | int tem; | |
7759 | ||
7760 | /* We only want to do local CSE, so don't follow jumps. */ | |
7761 | save_cfj = flag_cse_follow_jumps; | |
7762 | flag_cse_follow_jumps = 0; | |
7763 | ||
7764 | rebuild_jump_labels (get_insns ()); | |
7765 | tem = cse_main (get_insns (), max_reg_num ()); | |
bfa8ea12 | 7766 | cse_cfg_altered |= purge_all_dead_edges (); |
d743aba2 | 7767 | delete_trivially_dead_insns (get_insns (), max_reg_num ()); |
7768 | ||
7769 | cse_not_expected = !flag_rerun_cse_after_loop; | |
7770 | ||
7771 | /* If cse altered any jumps, rerun jump opts to clean things up. */ | |
7772 | if (tem == 2) | |
7773 | { | |
7774 | timevar_push (TV_JUMP); | |
7775 | rebuild_jump_labels (get_insns ()); | |
03a400fb | 7776 | cse_cfg_altered |= cleanup_cfg (CLEANUP_CFG_CHANGED); |
d743aba2 | 7777 | timevar_pop (TV_JUMP); |
7778 | } | |
7779 | else if (tem == 1) | |
03a400fb | 7780 | cse_cfg_altered |= cleanup_cfg (0); |
d743aba2 | 7781 | |
7782 | flag_cse_follow_jumps = save_cfj; | |
7783 | return 0; | |
7784 | } | |
7785 | ||
cbe8bda8 | 7786 | namespace { |
7787 | ||
7788 | const pass_data pass_data_cse_after_global_opts = | |
d743aba2 | 7789 | { |
cbe8bda8 | 7790 | RTL_PASS, /* type */ |
7791 | "cse_local", /* name */ | |
7792 | OPTGROUP_NONE, /* optinfo_flags */ | |
cbe8bda8 | 7793 | TV_CSE, /* tv_id */ |
7794 | 0, /* properties_required */ | |
7795 | 0, /* properties_provided */ | |
7796 | 0, /* properties_destroyed */ | |
7797 | 0, /* todo_flags_start */ | |
8b88439e | 7798 | TODO_df_finish, /* todo_flags_finish */ |
d743aba2 | 7799 | }; |
cbe8bda8 | 7800 | |
7801 | class pass_cse_after_global_opts : public rtl_opt_pass | |
7802 | { | |
7803 | public: | |
9af5ce0c | 7804 | pass_cse_after_global_opts (gcc::context *ctxt) |
7805 | : rtl_opt_pass (pass_data_cse_after_global_opts, ctxt) | |
cbe8bda8 | 7806 | {} |
7807 | ||
7808 | /* opt_pass methods: */ | |
31315c24 | 7809 | virtual bool gate (function *) |
7810 | { | |
7811 | return optimize > 0 && flag_rerun_cse_after_global_opts; | |
7812 | } | |
7813 | ||
65b0537f | 7814 | virtual unsigned int execute (function *) |
7815 | { | |
7816 | return rest_of_handle_cse_after_global_opts (); | |
7817 | } | |
cbe8bda8 | 7818 | |
7819 | }; // class pass_cse_after_global_opts | |
7820 | ||
7821 | } // anon namespace | |
7822 | ||
7823 | rtl_opt_pass * | |
7824 | make_pass_cse_after_global_opts (gcc::context *ctxt) | |
7825 | { | |
7826 | return new pass_cse_after_global_opts (ctxt); | |
7827 | } |