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7afe21cc | 1 | /* Common subexpression elimination for GNU compiler. |
5e7b4e25 | 2 | Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998 |
ad616de1 | 3 | 1999, 2000, 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc. |
7afe21cc | 4 | |
1322177d | 5 | This file is part of GCC. |
7afe21cc | 6 | |
1322177d LB |
7 | GCC is free software; you can redistribute it and/or modify it under |
8 | the terms of the GNU General Public License as published by the Free | |
9 | Software Foundation; either version 2, or (at your option) any later | |
10 | version. | |
7afe21cc | 11 | |
1322177d LB |
12 | GCC is distributed in the hope that it will be useful, but WITHOUT ANY |
13 | WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
14 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
15 | for more details. | |
7afe21cc RK |
16 | |
17 | You should have received a copy of the GNU General Public License | |
1322177d LB |
18 | along with GCC; see the file COPYING. If not, write to the Free |
19 | Software Foundation, 59 Temple Place - Suite 330, Boston, MA | |
20 | 02111-1307, USA. */ | |
7afe21cc | 21 | |
7afe21cc | 22 | #include "config.h" |
670ee920 KG |
23 | /* stdio.h must precede rtl.h for FFS. */ |
24 | #include "system.h" | |
4977bab6 ZW |
25 | #include "coretypes.h" |
26 | #include "tm.h" | |
7afe21cc | 27 | #include "rtl.h" |
6baf1cc8 | 28 | #include "tm_p.h" |
7afe21cc | 29 | #include "hard-reg-set.h" |
7932a3db | 30 | #include "regs.h" |
630c79be | 31 | #include "basic-block.h" |
7afe21cc RK |
32 | #include "flags.h" |
33 | #include "real.h" | |
34 | #include "insn-config.h" | |
35 | #include "recog.h" | |
49ad7cfa | 36 | #include "function.h" |
956d6950 | 37 | #include "expr.h" |
50b2596f KG |
38 | #include "toplev.h" |
39 | #include "output.h" | |
1497faf6 | 40 | #include "ggc.h" |
3dec4024 | 41 | #include "timevar.h" |
26771da7 | 42 | #include "except.h" |
3c50106f | 43 | #include "target.h" |
9bf8cfbf | 44 | #include "params.h" |
2f93eea8 | 45 | #include "rtlhooks-def.h" |
7afe21cc RK |
46 | |
47 | /* The basic idea of common subexpression elimination is to go | |
48 | through the code, keeping a record of expressions that would | |
49 | have the same value at the current scan point, and replacing | |
50 | expressions encountered with the cheapest equivalent expression. | |
51 | ||
52 | It is too complicated to keep track of the different possibilities | |
e48a7fbe JL |
53 | when control paths merge in this code; so, at each label, we forget all |
54 | that is known and start fresh. This can be described as processing each | |
55 | extended basic block separately. We have a separate pass to perform | |
56 | global CSE. | |
57 | ||
58 | Note CSE can turn a conditional or computed jump into a nop or | |
59 | an unconditional jump. When this occurs we arrange to run the jump | |
60 | optimizer after CSE to delete the unreachable code. | |
7afe21cc RK |
61 | |
62 | We use two data structures to record the equivalent expressions: | |
1bb98cec DM |
63 | a hash table for most expressions, and a vector of "quantity |
64 | numbers" to record equivalent (pseudo) registers. | |
7afe21cc RK |
65 | |
66 | The use of the special data structure for registers is desirable | |
67 | because it is faster. It is possible because registers references | |
68 | contain a fairly small number, the register number, taken from | |
69 | a contiguously allocated series, and two register references are | |
70 | identical if they have the same number. General expressions | |
71 | do not have any such thing, so the only way to retrieve the | |
72 | information recorded on an expression other than a register | |
73 | is to keep it in a hash table. | |
74 | ||
75 | Registers and "quantity numbers": | |
278a83b2 | 76 | |
7afe21cc RK |
77 | At the start of each basic block, all of the (hardware and pseudo) |
78 | registers used in the function are given distinct quantity | |
79 | numbers to indicate their contents. During scan, when the code | |
80 | copies one register into another, we copy the quantity number. | |
81 | When a register is loaded in any other way, we allocate a new | |
82 | quantity number to describe the value generated by this operation. | |
459281be | 83 | `REG_QTY (N)' records what quantity register N is currently thought |
7afe21cc RK |
84 | of as containing. |
85 | ||
08a69267 | 86 | All real quantity numbers are greater than or equal to zero. |
459281be | 87 | If register N has not been assigned a quantity, `REG_QTY (N)' will |
08a69267 | 88 | equal -N - 1, which is always negative. |
7afe21cc | 89 | |
08a69267 RS |
90 | Quantity numbers below zero do not exist and none of the `qty_table' |
91 | entries should be referenced with a negative index. | |
7afe21cc RK |
92 | |
93 | We also maintain a bidirectional chain of registers for each | |
1bb98cec DM |
94 | quantity number. The `qty_table` members `first_reg' and `last_reg', |
95 | and `reg_eqv_table' members `next' and `prev' hold these chains. | |
7afe21cc RK |
96 | |
97 | The first register in a chain is the one whose lifespan is least local. | |
98 | Among equals, it is the one that was seen first. | |
99 | We replace any equivalent register with that one. | |
100 | ||
101 | If two registers have the same quantity number, it must be true that | |
1bb98cec | 102 | REG expressions with qty_table `mode' must be in the hash table for both |
7afe21cc RK |
103 | registers and must be in the same class. |
104 | ||
105 | The converse is not true. Since hard registers may be referenced in | |
106 | any mode, two REG expressions might be equivalent in the hash table | |
107 | but not have the same quantity number if the quantity number of one | |
108 | of the registers is not the same mode as those expressions. | |
278a83b2 | 109 | |
7afe21cc RK |
110 | Constants and quantity numbers |
111 | ||
112 | When a quantity has a known constant value, that value is stored | |
1bb98cec | 113 | in the appropriate qty_table `const_rtx'. This is in addition to |
7afe21cc RK |
114 | putting the constant in the hash table as is usual for non-regs. |
115 | ||
d45cf215 | 116 | Whether a reg or a constant is preferred is determined by the configuration |
7afe21cc RK |
117 | macro CONST_COSTS and will often depend on the constant value. In any |
118 | event, expressions containing constants can be simplified, by fold_rtx. | |
119 | ||
120 | When a quantity has a known nearly constant value (such as an address | |
1bb98cec DM |
121 | of a stack slot), that value is stored in the appropriate qty_table |
122 | `const_rtx'. | |
7afe21cc RK |
123 | |
124 | Integer constants don't have a machine mode. However, cse | |
125 | determines the intended machine mode from the destination | |
126 | of the instruction that moves the constant. The machine mode | |
127 | is recorded in the hash table along with the actual RTL | |
128 | constant expression so that different modes are kept separate. | |
129 | ||
130 | Other expressions: | |
131 | ||
132 | To record known equivalences among expressions in general | |
133 | we use a hash table called `table'. It has a fixed number of buckets | |
134 | that contain chains of `struct table_elt' elements for expressions. | |
135 | These chains connect the elements whose expressions have the same | |
136 | hash codes. | |
137 | ||
138 | Other chains through the same elements connect the elements which | |
139 | currently have equivalent values. | |
140 | ||
141 | Register references in an expression are canonicalized before hashing | |
1bb98cec | 142 | the expression. This is done using `reg_qty' and qty_table `first_reg'. |
7afe21cc RK |
143 | The hash code of a register reference is computed using the quantity |
144 | number, not the register number. | |
145 | ||
146 | When the value of an expression changes, it is necessary to remove from the | |
147 | hash table not just that expression but all expressions whose values | |
148 | could be different as a result. | |
149 | ||
150 | 1. If the value changing is in memory, except in special cases | |
151 | ANYTHING referring to memory could be changed. That is because | |
152 | nobody knows where a pointer does not point. | |
153 | The function `invalidate_memory' removes what is necessary. | |
154 | ||
155 | The special cases are when the address is constant or is | |
156 | a constant plus a fixed register such as the frame pointer | |
157 | or a static chain pointer. When such addresses are stored in, | |
158 | we can tell exactly which other such addresses must be invalidated | |
159 | due to overlap. `invalidate' does this. | |
160 | All expressions that refer to non-constant | |
161 | memory addresses are also invalidated. `invalidate_memory' does this. | |
162 | ||
163 | 2. If the value changing is a register, all expressions | |
164 | containing references to that register, and only those, | |
165 | must be removed. | |
166 | ||
167 | Because searching the entire hash table for expressions that contain | |
168 | a register is very slow, we try to figure out when it isn't necessary. | |
169 | Precisely, this is necessary only when expressions have been | |
170 | entered in the hash table using this register, and then the value has | |
171 | changed, and then another expression wants to be added to refer to | |
172 | the register's new value. This sequence of circumstances is rare | |
173 | within any one basic block. | |
174 | ||
459281be KH |
175 | `REG_TICK' and `REG_IN_TABLE', accessors for members of |
176 | cse_reg_info, are used to detect this case. REG_TICK (i) is | |
177 | incremented whenever a value is stored in register i. | |
178 | REG_IN_TABLE (i) holds -1 if no references to register i have been | |
179 | entered in the table; otherwise, it contains the value REG_TICK (i) | |
180 | had when the references were entered. If we want to enter a | |
181 | reference and REG_IN_TABLE (i) != REG_TICK (i), we must scan and | |
182 | remove old references. Until we want to enter a new entry, the | |
183 | mere fact that the two vectors don't match makes the entries be | |
184 | ignored if anyone tries to match them. | |
7afe21cc RK |
185 | |
186 | Registers themselves are entered in the hash table as well as in | |
459281be KH |
187 | the equivalent-register chains. However, `REG_TICK' and |
188 | `REG_IN_TABLE' do not apply to expressions which are simple | |
7afe21cc RK |
189 | register references. These expressions are removed from the table |
190 | immediately when they become invalid, and this can be done even if | |
191 | we do not immediately search for all the expressions that refer to | |
192 | the register. | |
193 | ||
194 | A CLOBBER rtx in an instruction invalidates its operand for further | |
195 | reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK | |
196 | invalidates everything that resides in memory. | |
197 | ||
198 | Related expressions: | |
199 | ||
200 | Constant expressions that differ only by an additive integer | |
201 | are called related. When a constant expression is put in | |
202 | the table, the related expression with no constant term | |
203 | is also entered. These are made to point at each other | |
204 | so that it is possible to find out if there exists any | |
205 | register equivalent to an expression related to a given expression. */ | |
278a83b2 | 206 | |
1bb98cec DM |
207 | /* Length of qty_table vector. We know in advance we will not need |
208 | a quantity number this big. */ | |
7afe21cc RK |
209 | |
210 | static int max_qty; | |
211 | ||
212 | /* Next quantity number to be allocated. | |
213 | This is 1 + the largest number needed so far. */ | |
214 | ||
215 | static int next_qty; | |
216 | ||
1bb98cec | 217 | /* Per-qty information tracking. |
7afe21cc | 218 | |
1bb98cec DM |
219 | `first_reg' and `last_reg' track the head and tail of the |
220 | chain of registers which currently contain this quantity. | |
7afe21cc | 221 | |
1bb98cec | 222 | `mode' contains the machine mode of this quantity. |
7afe21cc | 223 | |
1bb98cec DM |
224 | `const_rtx' holds the rtx of the constant value of this |
225 | quantity, if known. A summations of the frame/arg pointer | |
226 | and a constant can also be entered here. When this holds | |
227 | a known value, `const_insn' is the insn which stored the | |
228 | constant value. | |
7afe21cc | 229 | |
1bb98cec DM |
230 | `comparison_{code,const,qty}' are used to track when a |
231 | comparison between a quantity and some constant or register has | |
232 | been passed. In such a case, we know the results of the comparison | |
233 | in case we see it again. These members record a comparison that | |
234 | is known to be true. `comparison_code' holds the rtx code of such | |
235 | a comparison, else it is set to UNKNOWN and the other two | |
236 | comparison members are undefined. `comparison_const' holds | |
237 | the constant being compared against, or zero if the comparison | |
238 | is not against a constant. `comparison_qty' holds the quantity | |
239 | being compared against when the result is known. If the comparison | |
240 | is not with a register, `comparison_qty' is -1. */ | |
7afe21cc | 241 | |
1bb98cec DM |
242 | struct qty_table_elem |
243 | { | |
244 | rtx const_rtx; | |
245 | rtx const_insn; | |
246 | rtx comparison_const; | |
247 | int comparison_qty; | |
770ae6cc | 248 | unsigned int first_reg, last_reg; |
496324d0 DN |
249 | /* The sizes of these fields should match the sizes of the |
250 | code and mode fields of struct rtx_def (see rtl.h). */ | |
251 | ENUM_BITFIELD(rtx_code) comparison_code : 16; | |
252 | ENUM_BITFIELD(machine_mode) mode : 8; | |
1bb98cec | 253 | }; |
7afe21cc | 254 | |
1bb98cec DM |
255 | /* The table of all qtys, indexed by qty number. */ |
256 | static struct qty_table_elem *qty_table; | |
7afe21cc | 257 | |
fc188d37 AK |
258 | /* Structure used to pass arguments via for_each_rtx to function |
259 | cse_change_cc_mode. */ | |
260 | struct change_cc_mode_args | |
261 | { | |
262 | rtx insn; | |
263 | rtx newreg; | |
264 | }; | |
265 | ||
7afe21cc RK |
266 | #ifdef HAVE_cc0 |
267 | /* For machines that have a CC0, we do not record its value in the hash | |
268 | table since its use is guaranteed to be the insn immediately following | |
269 | its definition and any other insn is presumed to invalidate it. | |
270 | ||
271 | Instead, we store below the value last assigned to CC0. If it should | |
272 | happen to be a constant, it is stored in preference to the actual | |
273 | assigned value. In case it is a constant, we store the mode in which | |
274 | the constant should be interpreted. */ | |
275 | ||
276 | static rtx prev_insn_cc0; | |
277 | static enum machine_mode prev_insn_cc0_mode; | |
7afe21cc RK |
278 | |
279 | /* Previous actual insn. 0 if at first insn of basic block. */ | |
280 | ||
281 | static rtx prev_insn; | |
4977bab6 | 282 | #endif |
7afe21cc RK |
283 | |
284 | /* Insn being scanned. */ | |
285 | ||
286 | static rtx this_insn; | |
287 | ||
71d306d1 DE |
288 | /* Index by register number, gives the number of the next (or |
289 | previous) register in the chain of registers sharing the same | |
7afe21cc RK |
290 | value. |
291 | ||
292 | Or -1 if this register is at the end of the chain. | |
293 | ||
459281be | 294 | If REG_QTY (N) == -N - 1, reg_eqv_table[N].next is undefined. */ |
1bb98cec DM |
295 | |
296 | /* Per-register equivalence chain. */ | |
297 | struct reg_eqv_elem | |
298 | { | |
299 | int next, prev; | |
300 | }; | |
7afe21cc | 301 | |
1bb98cec DM |
302 | /* The table of all register equivalence chains. */ |
303 | static struct reg_eqv_elem *reg_eqv_table; | |
7afe21cc | 304 | |
14a774a9 RK |
305 | struct cse_reg_info |
306 | { | |
bc5e3b54 KH |
307 | /* The timestamp at which this register is initialized. */ |
308 | unsigned int timestamp; | |
9b1549b8 DM |
309 | |
310 | /* The quantity number of the register's current contents. */ | |
311 | int reg_qty; | |
312 | ||
313 | /* The number of times the register has been altered in the current | |
314 | basic block. */ | |
315 | int reg_tick; | |
316 | ||
30f72379 MM |
317 | /* The REG_TICK value at which rtx's containing this register are |
318 | valid in the hash table. If this does not equal the current | |
319 | reg_tick value, such expressions existing in the hash table are | |
320 | invalid. */ | |
321 | int reg_in_table; | |
46081bb3 SH |
322 | |
323 | /* The SUBREG that was set when REG_TICK was last incremented. Set | |
324 | to -1 if the last store was to the whole register, not a subreg. */ | |
5dd78e9a | 325 | unsigned int subreg_ticked; |
30f72379 | 326 | }; |
7afe21cc | 327 | |
bc5e3b54 | 328 | /* A table of cse_reg_info indexed by register numbers. */ |
f00822b2 | 329 | static struct cse_reg_info *cse_reg_info_table; |
c1edba58 | 330 | |
bc5e3b54 KH |
331 | /* The size of the above table. */ |
332 | static unsigned int cse_reg_info_table_size; | |
9b1549b8 | 333 | |
bc5e3b54 KH |
334 | /* The index of the first entry that has not been initialized. */ |
335 | static unsigned int cse_reg_info_table_first_uninitialized; | |
7afe21cc | 336 | |
bc5e3b54 | 337 | /* The timestamp at the beginning of the current run of |
0388d40a | 338 | cse_basic_block. We increment this variable at the beginning of |
bc5e3b54 KH |
339 | the current run of cse_basic_block. The timestamp field of a |
340 | cse_reg_info entry matches the value of this variable if and only | |
341 | if the entry has been initialized during the current run of | |
342 | cse_basic_block. */ | |
343 | static unsigned int cse_reg_info_timestamp; | |
7afe21cc | 344 | |
278a83b2 | 345 | /* A HARD_REG_SET containing all the hard registers for which there is |
7afe21cc RK |
346 | currently a REG expression in the hash table. Note the difference |
347 | from the above variables, which indicate if the REG is mentioned in some | |
348 | expression in the table. */ | |
349 | ||
350 | static HARD_REG_SET hard_regs_in_table; | |
351 | ||
7afe21cc RK |
352 | /* CUID of insn that starts the basic block currently being cse-processed. */ |
353 | ||
354 | static int cse_basic_block_start; | |
355 | ||
356 | /* CUID of insn that ends the basic block currently being cse-processed. */ | |
357 | ||
358 | static int cse_basic_block_end; | |
359 | ||
360 | /* Vector mapping INSN_UIDs to cuids. | |
d45cf215 | 361 | The cuids are like uids but increase monotonically always. |
7afe21cc RK |
362 | We use them to see whether a reg is used outside a given basic block. */ |
363 | ||
906c4e36 | 364 | static int *uid_cuid; |
7afe21cc | 365 | |
164c8956 RK |
366 | /* Highest UID in UID_CUID. */ |
367 | static int max_uid; | |
368 | ||
7afe21cc RK |
369 | /* Get the cuid of an insn. */ |
370 | ||
371 | #define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)]) | |
372 | ||
4eadede7 ZW |
373 | /* Nonzero if this pass has made changes, and therefore it's |
374 | worthwhile to run the garbage collector. */ | |
375 | ||
376 | static int cse_altered; | |
377 | ||
7afe21cc RK |
378 | /* Nonzero if cse has altered conditional jump insns |
379 | in such a way that jump optimization should be redone. */ | |
380 | ||
381 | static int cse_jumps_altered; | |
382 | ||
f85cc4cb RK |
383 | /* Nonzero if we put a LABEL_REF into the hash table for an INSN without a |
384 | REG_LABEL, we have to rerun jump after CSE to put in the note. */ | |
a5dfb4ee RK |
385 | static int recorded_label_ref; |
386 | ||
7afe21cc RK |
387 | /* canon_hash stores 1 in do_not_record |
388 | if it notices a reference to CC0, PC, or some other volatile | |
389 | subexpression. */ | |
390 | ||
391 | static int do_not_record; | |
392 | ||
393 | /* canon_hash stores 1 in hash_arg_in_memory | |
394 | if it notices a reference to memory within the expression being hashed. */ | |
395 | ||
396 | static int hash_arg_in_memory; | |
397 | ||
7afe21cc RK |
398 | /* The hash table contains buckets which are chains of `struct table_elt's, |
399 | each recording one expression's information. | |
400 | That expression is in the `exp' field. | |
401 | ||
db048faf MM |
402 | The canon_exp field contains a canonical (from the point of view of |
403 | alias analysis) version of the `exp' field. | |
404 | ||
7afe21cc RK |
405 | Those elements with the same hash code are chained in both directions |
406 | through the `next_same_hash' and `prev_same_hash' fields. | |
407 | ||
408 | Each set of expressions with equivalent values | |
409 | are on a two-way chain through the `next_same_value' | |
410 | and `prev_same_value' fields, and all point with | |
411 | the `first_same_value' field at the first element in | |
412 | that chain. The chain is in order of increasing cost. | |
413 | Each element's cost value is in its `cost' field. | |
414 | ||
415 | The `in_memory' field is nonzero for elements that | |
416 | involve any reference to memory. These elements are removed | |
417 | whenever a write is done to an unidentified location in memory. | |
418 | To be safe, we assume that a memory address is unidentified unless | |
419 | the address is either a symbol constant or a constant plus | |
420 | the frame pointer or argument pointer. | |
421 | ||
7afe21cc RK |
422 | The `related_value' field is used to connect related expressions |
423 | (that differ by adding an integer). | |
424 | The related expressions are chained in a circular fashion. | |
425 | `related_value' is zero for expressions for which this | |
426 | chain is not useful. | |
427 | ||
428 | The `cost' field stores the cost of this element's expression. | |
630c79be BS |
429 | The `regcost' field stores the value returned by approx_reg_cost for |
430 | this element's expression. | |
7afe21cc RK |
431 | |
432 | The `is_const' flag is set if the element is a constant (including | |
433 | a fixed address). | |
434 | ||
435 | The `flag' field is used as a temporary during some search routines. | |
436 | ||
437 | The `mode' field is usually the same as GET_MODE (`exp'), but | |
438 | if `exp' is a CONST_INT and has no machine mode then the `mode' | |
439 | field is the mode it was being used as. Each constant is | |
440 | recorded separately for each mode it is used with. */ | |
441 | ||
7afe21cc RK |
442 | struct table_elt |
443 | { | |
444 | rtx exp; | |
db048faf | 445 | rtx canon_exp; |
7afe21cc RK |
446 | struct table_elt *next_same_hash; |
447 | struct table_elt *prev_same_hash; | |
448 | struct table_elt *next_same_value; | |
449 | struct table_elt *prev_same_value; | |
450 | struct table_elt *first_same_value; | |
451 | struct table_elt *related_value; | |
452 | int cost; | |
630c79be | 453 | int regcost; |
496324d0 DN |
454 | /* The size of this field should match the size |
455 | of the mode field of struct rtx_def (see rtl.h). */ | |
456 | ENUM_BITFIELD(machine_mode) mode : 8; | |
7afe21cc | 457 | char in_memory; |
7afe21cc RK |
458 | char is_const; |
459 | char flag; | |
460 | }; | |
461 | ||
7afe21cc RK |
462 | /* We don't want a lot of buckets, because we rarely have very many |
463 | things stored in the hash table, and a lot of buckets slows | |
464 | down a lot of loops that happen frequently. */ | |
9b1549b8 DM |
465 | #define HASH_SHIFT 5 |
466 | #define HASH_SIZE (1 << HASH_SHIFT) | |
467 | #define HASH_MASK (HASH_SIZE - 1) | |
7afe21cc RK |
468 | |
469 | /* Compute hash code of X in mode M. Special-case case where X is a pseudo | |
470 | register (hard registers may require `do_not_record' to be set). */ | |
471 | ||
472 | #define HASH(X, M) \ | |
f8cfc6aa | 473 | ((REG_P (X) && REGNO (X) >= FIRST_PSEUDO_REGISTER \ |
9b1549b8 DM |
474 | ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \ |
475 | : canon_hash (X, M)) & HASH_MASK) | |
7afe21cc | 476 | |
0516f6fe SB |
477 | /* Like HASH, but without side-effects. */ |
478 | #define SAFE_HASH(X, M) \ | |
479 | ((REG_P (X) && REGNO (X) >= FIRST_PSEUDO_REGISTER \ | |
480 | ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \ | |
481 | : safe_hash (X, M)) & HASH_MASK) | |
482 | ||
630c79be BS |
483 | /* Determine whether register number N is considered a fixed register for the |
484 | purpose of approximating register costs. | |
7afe21cc RK |
485 | It is desirable to replace other regs with fixed regs, to reduce need for |
486 | non-fixed hard regs. | |
553687c9 | 487 | A reg wins if it is either the frame pointer or designated as fixed. */ |
7afe21cc | 488 | #define FIXED_REGNO_P(N) \ |
8bc169f2 | 489 | ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \ |
6ab832bc | 490 | || fixed_regs[N] || global_regs[N]) |
7afe21cc RK |
491 | |
492 | /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed | |
ac07e066 RK |
493 | hard registers and pointers into the frame are the cheapest with a cost |
494 | of 0. Next come pseudos with a cost of one and other hard registers with | |
495 | a cost of 2. Aside from these special cases, call `rtx_cost'. */ | |
496 | ||
d67fb775 SB |
497 | #define CHEAP_REGNO(N) \ |
498 | (REGNO_PTR_FRAME_P(N) \ | |
499 | || (HARD_REGISTER_NUM_P (N) \ | |
e7bb59fa | 500 | && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS)) |
7afe21cc | 501 | |
f8cfc6aa JQ |
502 | #define COST(X) (REG_P (X) ? 0 : notreg_cost (X, SET)) |
503 | #define COST_IN(X,OUTER) (REG_P (X) ? 0 : notreg_cost (X, OUTER)) | |
7afe21cc | 504 | |
30f72379 MM |
505 | /* Get the number of times this register has been updated in this |
506 | basic block. */ | |
507 | ||
bc5e3b54 | 508 | #define REG_TICK(N) (get_cse_reg_info (N)->reg_tick) |
30f72379 MM |
509 | |
510 | /* Get the point at which REG was recorded in the table. */ | |
511 | ||
bc5e3b54 | 512 | #define REG_IN_TABLE(N) (get_cse_reg_info (N)->reg_in_table) |
30f72379 | 513 | |
46081bb3 SH |
514 | /* Get the SUBREG set at the last increment to REG_TICK (-1 if not a |
515 | SUBREG). */ | |
516 | ||
bc5e3b54 | 517 | #define SUBREG_TICKED(N) (get_cse_reg_info (N)->subreg_ticked) |
46081bb3 | 518 | |
30f72379 MM |
519 | /* Get the quantity number for REG. */ |
520 | ||
bc5e3b54 | 521 | #define REG_QTY(N) (get_cse_reg_info (N)->reg_qty) |
30f72379 | 522 | |
7afe21cc | 523 | /* Determine if the quantity number for register X represents a valid index |
1bb98cec | 524 | into the qty_table. */ |
7afe21cc | 525 | |
08a69267 | 526 | #define REGNO_QTY_VALID_P(N) (REG_QTY (N) >= 0) |
7afe21cc | 527 | |
9b1549b8 | 528 | static struct table_elt *table[HASH_SIZE]; |
7afe21cc RK |
529 | |
530 | /* Chain of `struct table_elt's made so far for this function | |
531 | but currently removed from the table. */ | |
532 | ||
533 | static struct table_elt *free_element_chain; | |
534 | ||
7afe21cc RK |
535 | /* Set to the cost of a constant pool reference if one was found for a |
536 | symbolic constant. If this was found, it means we should try to | |
537 | convert constants into constant pool entries if they don't fit in | |
538 | the insn. */ | |
539 | ||
540 | static int constant_pool_entries_cost; | |
dd0ba281 | 541 | static int constant_pool_entries_regcost; |
7afe21cc | 542 | |
6cd4575e RK |
543 | /* This data describes a block that will be processed by cse_basic_block. */ |
544 | ||
14a774a9 RK |
545 | struct cse_basic_block_data |
546 | { | |
6cd4575e RK |
547 | /* Lowest CUID value of insns in block. */ |
548 | int low_cuid; | |
549 | /* Highest CUID value of insns in block. */ | |
550 | int high_cuid; | |
551 | /* Total number of SETs in block. */ | |
552 | int nsets; | |
553 | /* Last insn in the block. */ | |
554 | rtx last; | |
555 | /* Size of current branch path, if any. */ | |
556 | int path_size; | |
557 | /* Current branch path, indicating which branches will be taken. */ | |
14a774a9 RK |
558 | struct branch_path |
559 | { | |
560 | /* The branch insn. */ | |
561 | rtx branch; | |
562 | /* Whether it should be taken or not. AROUND is the same as taken | |
563 | except that it is used when the destination label is not preceded | |
6cd4575e | 564 | by a BARRIER. */ |
6de9cd9a | 565 | enum taken {PATH_TAKEN, PATH_NOT_TAKEN, PATH_AROUND} status; |
9bf8cfbf | 566 | } *path; |
6cd4575e RK |
567 | }; |
568 | ||
7080f735 AJ |
569 | static bool fixed_base_plus_p (rtx x); |
570 | static int notreg_cost (rtx, enum rtx_code); | |
571 | static int approx_reg_cost_1 (rtx *, void *); | |
572 | static int approx_reg_cost (rtx); | |
56ae04af | 573 | static int preferable (int, int, int, int); |
7080f735 AJ |
574 | static void new_basic_block (void); |
575 | static void make_new_qty (unsigned int, enum machine_mode); | |
576 | static void make_regs_eqv (unsigned int, unsigned int); | |
577 | static void delete_reg_equiv (unsigned int); | |
578 | static int mention_regs (rtx); | |
579 | static int insert_regs (rtx, struct table_elt *, int); | |
580 | static void remove_from_table (struct table_elt *, unsigned); | |
581 | static struct table_elt *lookup (rtx, unsigned, enum machine_mode); | |
582 | static struct table_elt *lookup_for_remove (rtx, unsigned, enum machine_mode); | |
583 | static rtx lookup_as_function (rtx, enum rtx_code); | |
584 | static struct table_elt *insert (rtx, struct table_elt *, unsigned, | |
585 | enum machine_mode); | |
586 | static void merge_equiv_classes (struct table_elt *, struct table_elt *); | |
587 | static void invalidate (rtx, enum machine_mode); | |
588 | static int cse_rtx_varies_p (rtx, int); | |
589 | static void remove_invalid_refs (unsigned int); | |
590 | static void remove_invalid_subreg_refs (unsigned int, unsigned int, | |
591 | enum machine_mode); | |
592 | static void rehash_using_reg (rtx); | |
593 | static void invalidate_memory (void); | |
594 | static void invalidate_for_call (void); | |
595 | static rtx use_related_value (rtx, struct table_elt *); | |
0516f6fe SB |
596 | |
597 | static inline unsigned canon_hash (rtx, enum machine_mode); | |
598 | static inline unsigned safe_hash (rtx, enum machine_mode); | |
599 | static unsigned hash_rtx_string (const char *); | |
600 | ||
7080f735 AJ |
601 | static rtx canon_reg (rtx, rtx); |
602 | static void find_best_addr (rtx, rtx *, enum machine_mode); | |
603 | static enum rtx_code find_comparison_args (enum rtx_code, rtx *, rtx *, | |
604 | enum machine_mode *, | |
605 | enum machine_mode *); | |
606 | static rtx fold_rtx (rtx, rtx); | |
607 | static rtx equiv_constant (rtx); | |
608 | static void record_jump_equiv (rtx, int); | |
609 | static void record_jump_cond (enum rtx_code, enum machine_mode, rtx, rtx, | |
610 | int); | |
611 | static void cse_insn (rtx, rtx); | |
86caf04d | 612 | static void cse_end_of_basic_block (rtx, struct cse_basic_block_data *, |
5affca01 | 613 | int, int); |
7080f735 AJ |
614 | static int addr_affects_sp_p (rtx); |
615 | static void invalidate_from_clobbers (rtx); | |
616 | static rtx cse_process_notes (rtx, rtx); | |
7080f735 AJ |
617 | static void invalidate_skipped_set (rtx, rtx, void *); |
618 | static void invalidate_skipped_block (rtx); | |
5affca01 | 619 | static rtx cse_basic_block (rtx, rtx, struct branch_path *); |
9ab81df2 | 620 | static void count_reg_usage (rtx, int *, int); |
7080f735 AJ |
621 | static int check_for_label_ref (rtx *, void *); |
622 | extern void dump_class (struct table_elt*); | |
bc5e3b54 KH |
623 | static void get_cse_reg_info_1 (unsigned int regno); |
624 | static struct cse_reg_info * get_cse_reg_info (unsigned int regno); | |
7080f735 AJ |
625 | static int check_dependence (rtx *, void *); |
626 | ||
627 | static void flush_hash_table (void); | |
628 | static bool insn_live_p (rtx, int *); | |
629 | static bool set_live_p (rtx, rtx, int *); | |
630 | static bool dead_libcall_p (rtx, int *); | |
e129d93a | 631 | static int cse_change_cc_mode (rtx *, void *); |
fc188d37 | 632 | static void cse_change_cc_mode_insn (rtx, rtx); |
e129d93a ILT |
633 | static void cse_change_cc_mode_insns (rtx, rtx, rtx); |
634 | static enum machine_mode cse_cc_succs (basic_block, rtx, rtx, bool); | |
7afe21cc | 635 | \f |
2f93eea8 PB |
636 | |
637 | #undef RTL_HOOKS_GEN_LOWPART | |
638 | #define RTL_HOOKS_GEN_LOWPART gen_lowpart_if_possible | |
639 | ||
640 | static const struct rtl_hooks cse_rtl_hooks = RTL_HOOKS_INITIALIZER; | |
641 | \f | |
4977bab6 ZW |
642 | /* Nonzero if X has the form (PLUS frame-pointer integer). We check for |
643 | virtual regs here because the simplify_*_operation routines are called | |
644 | by integrate.c, which is called before virtual register instantiation. */ | |
645 | ||
646 | static bool | |
7080f735 | 647 | fixed_base_plus_p (rtx x) |
4977bab6 ZW |
648 | { |
649 | switch (GET_CODE (x)) | |
650 | { | |
651 | case REG: | |
652 | if (x == frame_pointer_rtx || x == hard_frame_pointer_rtx) | |
653 | return true; | |
654 | if (x == arg_pointer_rtx && fixed_regs[ARG_POINTER_REGNUM]) | |
655 | return true; | |
656 | if (REGNO (x) >= FIRST_VIRTUAL_REGISTER | |
657 | && REGNO (x) <= LAST_VIRTUAL_REGISTER) | |
658 | return true; | |
659 | return false; | |
660 | ||
661 | case PLUS: | |
662 | if (GET_CODE (XEXP (x, 1)) != CONST_INT) | |
663 | return false; | |
664 | return fixed_base_plus_p (XEXP (x, 0)); | |
665 | ||
4977bab6 ZW |
666 | default: |
667 | return false; | |
668 | } | |
669 | } | |
670 | ||
a4c6502a MM |
671 | /* Dump the expressions in the equivalence class indicated by CLASSP. |
672 | This function is used only for debugging. */ | |
a0153051 | 673 | void |
7080f735 | 674 | dump_class (struct table_elt *classp) |
a4c6502a MM |
675 | { |
676 | struct table_elt *elt; | |
677 | ||
678 | fprintf (stderr, "Equivalence chain for "); | |
679 | print_rtl (stderr, classp->exp); | |
680 | fprintf (stderr, ": \n"); | |
278a83b2 | 681 | |
a4c6502a MM |
682 | for (elt = classp->first_same_value; elt; elt = elt->next_same_value) |
683 | { | |
684 | print_rtl (stderr, elt->exp); | |
685 | fprintf (stderr, "\n"); | |
686 | } | |
687 | } | |
688 | ||
630c79be | 689 | /* Subroutine of approx_reg_cost; called through for_each_rtx. */ |
be8ac49a | 690 | |
630c79be | 691 | static int |
7080f735 | 692 | approx_reg_cost_1 (rtx *xp, void *data) |
630c79be BS |
693 | { |
694 | rtx x = *xp; | |
c863f8c2 | 695 | int *cost_p = data; |
630c79be | 696 | |
f8cfc6aa | 697 | if (x && REG_P (x)) |
c863f8c2 DM |
698 | { |
699 | unsigned int regno = REGNO (x); | |
700 | ||
701 | if (! CHEAP_REGNO (regno)) | |
702 | { | |
703 | if (regno < FIRST_PSEUDO_REGISTER) | |
704 | { | |
705 | if (SMALL_REGISTER_CLASSES) | |
706 | return 1; | |
707 | *cost_p += 2; | |
708 | } | |
709 | else | |
710 | *cost_p += 1; | |
711 | } | |
712 | } | |
713 | ||
630c79be BS |
714 | return 0; |
715 | } | |
716 | ||
717 | /* Return an estimate of the cost of the registers used in an rtx. | |
718 | This is mostly the number of different REG expressions in the rtx; | |
a1f300c0 | 719 | however for some exceptions like fixed registers we use a cost of |
f1c1dfc3 | 720 | 0. If any other hard register reference occurs, return MAX_COST. */ |
630c79be BS |
721 | |
722 | static int | |
7080f735 | 723 | approx_reg_cost (rtx x) |
630c79be | 724 | { |
630c79be | 725 | int cost = 0; |
f1c1dfc3 | 726 | |
c863f8c2 DM |
727 | if (for_each_rtx (&x, approx_reg_cost_1, (void *) &cost)) |
728 | return MAX_COST; | |
630c79be | 729 | |
c863f8c2 | 730 | return cost; |
630c79be BS |
731 | } |
732 | ||
b7ca416f | 733 | /* Returns a canonical version of X for the address, from the point of view, |
6668f6a7 KH |
734 | that all multiplications are represented as MULT instead of the multiply |
735 | by a power of 2 being represented as ASHIFT. */ | |
b7ca416f AP |
736 | |
737 | static rtx | |
738 | canon_for_address (rtx x) | |
739 | { | |
740 | enum rtx_code code; | |
741 | enum machine_mode mode; | |
742 | rtx new = 0; | |
743 | int i; | |
744 | const char *fmt; | |
745 | ||
746 | if (!x) | |
747 | return x; | |
748 | ||
749 | code = GET_CODE (x); | |
750 | mode = GET_MODE (x); | |
751 | ||
752 | switch (code) | |
753 | { | |
754 | case ASHIFT: | |
755 | if (GET_CODE (XEXP (x, 1)) == CONST_INT | |
756 | && INTVAL (XEXP (x, 1)) < GET_MODE_BITSIZE (mode) | |
757 | && INTVAL (XEXP (x, 1)) >= 0) | |
758 | { | |
759 | new = canon_for_address (XEXP (x, 0)); | |
760 | new = gen_rtx_MULT (mode, new, | |
761 | gen_int_mode ((HOST_WIDE_INT) 1 | |
762 | << INTVAL (XEXP (x, 1)), | |
763 | mode)); | |
764 | } | |
765 | break; | |
766 | default: | |
767 | break; | |
768 | ||
769 | } | |
770 | if (new) | |
771 | return new; | |
772 | ||
773 | /* Now recursively process each operand of this operation. */ | |
774 | fmt = GET_RTX_FORMAT (code); | |
775 | for (i = 0; i < GET_RTX_LENGTH (code); i++) | |
776 | if (fmt[i] == 'e') | |
777 | { | |
778 | new = canon_for_address (XEXP (x, i)); | |
779 | XEXP (x, i) = new; | |
780 | } | |
781 | return x; | |
782 | } | |
783 | ||
630c79be BS |
784 | /* Return a negative value if an rtx A, whose costs are given by COST_A |
785 | and REGCOST_A, is more desirable than an rtx B. | |
786 | Return a positive value if A is less desirable, or 0 if the two are | |
787 | equally good. */ | |
788 | static int | |
56ae04af | 789 | preferable (int cost_a, int regcost_a, int cost_b, int regcost_b) |
630c79be | 790 | { |
423adbb9 | 791 | /* First, get rid of cases involving expressions that are entirely |
f1c1dfc3 BS |
792 | unwanted. */ |
793 | if (cost_a != cost_b) | |
794 | { | |
795 | if (cost_a == MAX_COST) | |
796 | return 1; | |
797 | if (cost_b == MAX_COST) | |
798 | return -1; | |
799 | } | |
800 | ||
801 | /* Avoid extending lifetimes of hardregs. */ | |
802 | if (regcost_a != regcost_b) | |
803 | { | |
804 | if (regcost_a == MAX_COST) | |
805 | return 1; | |
806 | if (regcost_b == MAX_COST) | |
807 | return -1; | |
808 | } | |
809 | ||
810 | /* Normal operation costs take precedence. */ | |
630c79be BS |
811 | if (cost_a != cost_b) |
812 | return cost_a - cost_b; | |
f1c1dfc3 | 813 | /* Only if these are identical consider effects on register pressure. */ |
630c79be BS |
814 | if (regcost_a != regcost_b) |
815 | return regcost_a - regcost_b; | |
816 | return 0; | |
817 | } | |
818 | ||
954a5693 RK |
819 | /* Internal function, to compute cost when X is not a register; called |
820 | from COST macro to keep it simple. */ | |
821 | ||
822 | static int | |
7080f735 | 823 | notreg_cost (rtx x, enum rtx_code outer) |
954a5693 RK |
824 | { |
825 | return ((GET_CODE (x) == SUBREG | |
f8cfc6aa | 826 | && REG_P (SUBREG_REG (x)) |
954a5693 RK |
827 | && GET_MODE_CLASS (GET_MODE (x)) == MODE_INT |
828 | && GET_MODE_CLASS (GET_MODE (SUBREG_REG (x))) == MODE_INT | |
829 | && (GET_MODE_SIZE (GET_MODE (x)) | |
830 | < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))) | |
831 | && subreg_lowpart_p (x) | |
832 | && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE (x)), | |
833 | GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x))))) | |
630c79be | 834 | ? 0 |
f2fa288f | 835 | : rtx_cost (x, outer) * 2); |
954a5693 RK |
836 | } |
837 | ||
01329426 | 838 | \f |
bc5e3b54 | 839 | /* Initialize CSE_REG_INFO_TABLE. */ |
9b1549b8 | 840 | |
bc5e3b54 KH |
841 | static void |
842 | init_cse_reg_info (unsigned int nregs) | |
843 | { | |
844 | /* Do we need to grow the table? */ | |
845 | if (nregs > cse_reg_info_table_size) | |
30f72379 | 846 | { |
bc5e3b54 KH |
847 | unsigned int new_size; |
848 | ||
849 | if (cse_reg_info_table_size < 2048) | |
30f72379 | 850 | { |
bc5e3b54 KH |
851 | /* Compute a new size that is a power of 2 and no smaller |
852 | than the large of NREGS and 64. */ | |
853 | new_size = (cse_reg_info_table_size | |
854 | ? cse_reg_info_table_size : 64); | |
855 | ||
856 | while (new_size < nregs) | |
857 | new_size *= 2; | |
30f72379 MM |
858 | } |
859 | else | |
1590d0d4 | 860 | { |
bc5e3b54 KH |
861 | /* If we need a big table, allocate just enough to hold |
862 | NREGS registers. */ | |
863 | new_size = nregs; | |
1590d0d4 | 864 | } |
9b1549b8 | 865 | |
bc5e3b54 | 866 | /* Reallocate the table with NEW_SIZE entries. */ |
a811c672 KH |
867 | if (cse_reg_info_table) |
868 | free (cse_reg_info_table); | |
869 | cse_reg_info_table = xmalloc (sizeof (struct cse_reg_info) | |
870 | * new_size); | |
bc5e3b54 | 871 | cse_reg_info_table_size = new_size; |
a811c672 | 872 | cse_reg_info_table_first_uninitialized = 0; |
bc5e3b54 KH |
873 | } |
874 | ||
875 | /* Do we have all of the first NREGS entries initialized? */ | |
876 | if (cse_reg_info_table_first_uninitialized < nregs) | |
877 | { | |
878 | unsigned int old_timestamp = cse_reg_info_timestamp - 1; | |
879 | unsigned int i; | |
880 | ||
881 | /* Put the old timestamp on newly allocated entries so that they | |
882 | will all be considered out of date. We do not touch those | |
883 | entries beyond the first NREGS entries to be nice to the | |
884 | virtual memory. */ | |
885 | for (i = cse_reg_info_table_first_uninitialized; i < nregs; i++) | |
886 | cse_reg_info_table[i].timestamp = old_timestamp; | |
30f72379 | 887 | |
bc5e3b54 | 888 | cse_reg_info_table_first_uninitialized = nregs; |
30f72379 | 889 | } |
bc5e3b54 KH |
890 | } |
891 | ||
a52aff23 | 892 | /* Given REGNO, initialize the cse_reg_info entry for REGNO. */ |
bc5e3b54 KH |
893 | |
894 | static void | |
895 | get_cse_reg_info_1 (unsigned int regno) | |
896 | { | |
897 | /* Set TIMESTAMP field to CSE_REG_INFO_TIMESTAMP so that this | |
898 | entry will be considered to have been initialized. */ | |
899 | cse_reg_info_table[regno].timestamp = cse_reg_info_timestamp; | |
900 | ||
901 | /* Initialize the rest of the entry. */ | |
902 | cse_reg_info_table[regno].reg_tick = 1; | |
903 | cse_reg_info_table[regno].reg_in_table = -1; | |
904 | cse_reg_info_table[regno].subreg_ticked = -1; | |
905 | cse_reg_info_table[regno].reg_qty = -regno - 1; | |
906 | } | |
907 | ||
908 | /* Find a cse_reg_info entry for REGNO. */ | |
30f72379 | 909 | |
bc5e3b54 KH |
910 | static inline struct cse_reg_info * |
911 | get_cse_reg_info (unsigned int regno) | |
912 | { | |
913 | struct cse_reg_info *p = &cse_reg_info_table[regno]; | |
914 | ||
782c0a3e KH |
915 | /* If this entry has not been initialized, go ahead and initialize |
916 | it. */ | |
bc5e3b54 KH |
917 | if (p->timestamp != cse_reg_info_timestamp) |
918 | get_cse_reg_info_1 (regno); | |
30f72379 | 919 | |
9b1549b8 | 920 | return p; |
30f72379 MM |
921 | } |
922 | ||
7afe21cc RK |
923 | /* Clear the hash table and initialize each register with its own quantity, |
924 | for a new basic block. */ | |
925 | ||
926 | static void | |
7080f735 | 927 | new_basic_block (void) |
7afe21cc | 928 | { |
b3694847 | 929 | int i; |
7afe21cc | 930 | |
08a69267 | 931 | next_qty = 0; |
7afe21cc | 932 | |
a52aff23 | 933 | /* Invalidate cse_reg_info_table. */ |
bc5e3b54 | 934 | cse_reg_info_timestamp++; |
7afe21cc | 935 | |
bc5e3b54 | 936 | /* Clear out hash table state for this pass. */ |
7afe21cc RK |
937 | CLEAR_HARD_REG_SET (hard_regs_in_table); |
938 | ||
939 | /* The per-quantity values used to be initialized here, but it is | |
940 | much faster to initialize each as it is made in `make_new_qty'. */ | |
941 | ||
9b1549b8 | 942 | for (i = 0; i < HASH_SIZE; i++) |
7afe21cc | 943 | { |
9b1549b8 DM |
944 | struct table_elt *first; |
945 | ||
946 | first = table[i]; | |
947 | if (first != NULL) | |
7afe21cc | 948 | { |
9b1549b8 DM |
949 | struct table_elt *last = first; |
950 | ||
951 | table[i] = NULL; | |
952 | ||
953 | while (last->next_same_hash != NULL) | |
954 | last = last->next_same_hash; | |
955 | ||
956 | /* Now relink this hash entire chain into | |
957 | the free element list. */ | |
958 | ||
959 | last->next_same_hash = free_element_chain; | |
960 | free_element_chain = first; | |
7afe21cc RK |
961 | } |
962 | } | |
963 | ||
7afe21cc | 964 | #ifdef HAVE_cc0 |
4977bab6 | 965 | prev_insn = 0; |
7afe21cc RK |
966 | prev_insn_cc0 = 0; |
967 | #endif | |
968 | } | |
969 | ||
1bb98cec DM |
970 | /* Say that register REG contains a quantity in mode MODE not in any |
971 | register before and initialize that quantity. */ | |
7afe21cc RK |
972 | |
973 | static void | |
7080f735 | 974 | make_new_qty (unsigned int reg, enum machine_mode mode) |
7afe21cc | 975 | { |
b3694847 SS |
976 | int q; |
977 | struct qty_table_elem *ent; | |
978 | struct reg_eqv_elem *eqv; | |
7afe21cc | 979 | |
341c100f | 980 | gcc_assert (next_qty < max_qty); |
7afe21cc | 981 | |
30f72379 | 982 | q = REG_QTY (reg) = next_qty++; |
1bb98cec DM |
983 | ent = &qty_table[q]; |
984 | ent->first_reg = reg; | |
985 | ent->last_reg = reg; | |
986 | ent->mode = mode; | |
987 | ent->const_rtx = ent->const_insn = NULL_RTX; | |
988 | ent->comparison_code = UNKNOWN; | |
989 | ||
990 | eqv = ®_eqv_table[reg]; | |
991 | eqv->next = eqv->prev = -1; | |
7afe21cc RK |
992 | } |
993 | ||
994 | /* Make reg NEW equivalent to reg OLD. | |
995 | OLD is not changing; NEW is. */ | |
996 | ||
997 | static void | |
7080f735 | 998 | make_regs_eqv (unsigned int new, unsigned int old) |
7afe21cc | 999 | { |
770ae6cc RK |
1000 | unsigned int lastr, firstr; |
1001 | int q = REG_QTY (old); | |
1002 | struct qty_table_elem *ent; | |
1bb98cec DM |
1003 | |
1004 | ent = &qty_table[q]; | |
7afe21cc RK |
1005 | |
1006 | /* Nothing should become eqv until it has a "non-invalid" qty number. */ | |
341c100f | 1007 | gcc_assert (REGNO_QTY_VALID_P (old)); |
7afe21cc | 1008 | |
30f72379 | 1009 | REG_QTY (new) = q; |
1bb98cec DM |
1010 | firstr = ent->first_reg; |
1011 | lastr = ent->last_reg; | |
7afe21cc RK |
1012 | |
1013 | /* Prefer fixed hard registers to anything. Prefer pseudo regs to other | |
1014 | hard regs. Among pseudos, if NEW will live longer than any other reg | |
1015 | of the same qty, and that is beyond the current basic block, | |
1016 | make it the new canonical replacement for this qty. */ | |
1017 | if (! (firstr < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (firstr)) | |
1018 | /* Certain fixed registers might be of the class NO_REGS. This means | |
1019 | that not only can they not be allocated by the compiler, but | |
830a38ee | 1020 | they cannot be used in substitutions or canonicalizations |
7afe21cc RK |
1021 | either. */ |
1022 | && (new >= FIRST_PSEUDO_REGISTER || REGNO_REG_CLASS (new) != NO_REGS) | |
1023 | && ((new < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (new)) | |
1024 | || (new >= FIRST_PSEUDO_REGISTER | |
1025 | && (firstr < FIRST_PSEUDO_REGISTER | |
b1f21e0a MM |
1026 | || ((uid_cuid[REGNO_LAST_UID (new)] > cse_basic_block_end |
1027 | || (uid_cuid[REGNO_FIRST_UID (new)] | |
7afe21cc | 1028 | < cse_basic_block_start)) |
b1f21e0a MM |
1029 | && (uid_cuid[REGNO_LAST_UID (new)] |
1030 | > uid_cuid[REGNO_LAST_UID (firstr)])))))) | |
7afe21cc | 1031 | { |
1bb98cec DM |
1032 | reg_eqv_table[firstr].prev = new; |
1033 | reg_eqv_table[new].next = firstr; | |
1034 | reg_eqv_table[new].prev = -1; | |
1035 | ent->first_reg = new; | |
7afe21cc RK |
1036 | } |
1037 | else | |
1038 | { | |
1039 | /* If NEW is a hard reg (known to be non-fixed), insert at end. | |
1040 | Otherwise, insert before any non-fixed hard regs that are at the | |
1041 | end. Registers of class NO_REGS cannot be used as an | |
1042 | equivalent for anything. */ | |
1bb98cec | 1043 | while (lastr < FIRST_PSEUDO_REGISTER && reg_eqv_table[lastr].prev >= 0 |
7afe21cc RK |
1044 | && (REGNO_REG_CLASS (lastr) == NO_REGS || ! FIXED_REGNO_P (lastr)) |
1045 | && new >= FIRST_PSEUDO_REGISTER) | |
1bb98cec DM |
1046 | lastr = reg_eqv_table[lastr].prev; |
1047 | reg_eqv_table[new].next = reg_eqv_table[lastr].next; | |
1048 | if (reg_eqv_table[lastr].next >= 0) | |
1049 | reg_eqv_table[reg_eqv_table[lastr].next].prev = new; | |
7afe21cc | 1050 | else |
1bb98cec DM |
1051 | qty_table[q].last_reg = new; |
1052 | reg_eqv_table[lastr].next = new; | |
1053 | reg_eqv_table[new].prev = lastr; | |
7afe21cc RK |
1054 | } |
1055 | } | |
1056 | ||
1057 | /* Remove REG from its equivalence class. */ | |
1058 | ||
1059 | static void | |
7080f735 | 1060 | delete_reg_equiv (unsigned int reg) |
7afe21cc | 1061 | { |
b3694847 SS |
1062 | struct qty_table_elem *ent; |
1063 | int q = REG_QTY (reg); | |
1064 | int p, n; | |
7afe21cc | 1065 | |
a4e262bc | 1066 | /* If invalid, do nothing. */ |
08a69267 | 1067 | if (! REGNO_QTY_VALID_P (reg)) |
7afe21cc RK |
1068 | return; |
1069 | ||
1bb98cec DM |
1070 | ent = &qty_table[q]; |
1071 | ||
1072 | p = reg_eqv_table[reg].prev; | |
1073 | n = reg_eqv_table[reg].next; | |
a4e262bc | 1074 | |
7afe21cc | 1075 | if (n != -1) |
1bb98cec | 1076 | reg_eqv_table[n].prev = p; |
7afe21cc | 1077 | else |
1bb98cec | 1078 | ent->last_reg = p; |
7afe21cc | 1079 | if (p != -1) |
1bb98cec | 1080 | reg_eqv_table[p].next = n; |
7afe21cc | 1081 | else |
1bb98cec | 1082 | ent->first_reg = n; |
7afe21cc | 1083 | |
08a69267 | 1084 | REG_QTY (reg) = -reg - 1; |
7afe21cc RK |
1085 | } |
1086 | ||
1087 | /* Remove any invalid expressions from the hash table | |
1088 | that refer to any of the registers contained in expression X. | |
1089 | ||
1090 | Make sure that newly inserted references to those registers | |
1091 | as subexpressions will be considered valid. | |
1092 | ||
1093 | mention_regs is not called when a register itself | |
1094 | is being stored in the table. | |
1095 | ||
1096 | Return 1 if we have done something that may have changed the hash code | |
1097 | of X. */ | |
1098 | ||
1099 | static int | |
7080f735 | 1100 | mention_regs (rtx x) |
7afe21cc | 1101 | { |
b3694847 SS |
1102 | enum rtx_code code; |
1103 | int i, j; | |
1104 | const char *fmt; | |
1105 | int changed = 0; | |
7afe21cc RK |
1106 | |
1107 | if (x == 0) | |
e5f6a288 | 1108 | return 0; |
7afe21cc RK |
1109 | |
1110 | code = GET_CODE (x); | |
1111 | if (code == REG) | |
1112 | { | |
770ae6cc RK |
1113 | unsigned int regno = REGNO (x); |
1114 | unsigned int endregno | |
7afe21cc | 1115 | = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1 |
66fd46b6 | 1116 | : hard_regno_nregs[regno][GET_MODE (x)]); |
770ae6cc | 1117 | unsigned int i; |
7afe21cc RK |
1118 | |
1119 | for (i = regno; i < endregno; i++) | |
1120 | { | |
30f72379 | 1121 | if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i)) |
7afe21cc RK |
1122 | remove_invalid_refs (i); |
1123 | ||
30f72379 | 1124 | REG_IN_TABLE (i) = REG_TICK (i); |
46081bb3 | 1125 | SUBREG_TICKED (i) = -1; |
7afe21cc RK |
1126 | } |
1127 | ||
1128 | return 0; | |
1129 | } | |
1130 | ||
34c73909 R |
1131 | /* If this is a SUBREG, we don't want to discard other SUBREGs of the same |
1132 | pseudo if they don't use overlapping words. We handle only pseudos | |
1133 | here for simplicity. */ | |
f8cfc6aa | 1134 | if (code == SUBREG && REG_P (SUBREG_REG (x)) |
34c73909 R |
1135 | && REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER) |
1136 | { | |
770ae6cc | 1137 | unsigned int i = REGNO (SUBREG_REG (x)); |
34c73909 | 1138 | |
30f72379 | 1139 | if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i)) |
34c73909 | 1140 | { |
46081bb3 SH |
1141 | /* If REG_IN_TABLE (i) differs from REG_TICK (i) by one, and |
1142 | the last store to this register really stored into this | |
1143 | subreg, then remove the memory of this subreg. | |
1144 | Otherwise, remove any memory of the entire register and | |
1145 | all its subregs from the table. */ | |
1146 | if (REG_TICK (i) - REG_IN_TABLE (i) > 1 | |
5dd78e9a | 1147 | || SUBREG_TICKED (i) != REGNO (SUBREG_REG (x))) |
34c73909 R |
1148 | remove_invalid_refs (i); |
1149 | else | |
ddef6bc7 | 1150 | remove_invalid_subreg_refs (i, SUBREG_BYTE (x), GET_MODE (x)); |
34c73909 R |
1151 | } |
1152 | ||
30f72379 | 1153 | REG_IN_TABLE (i) = REG_TICK (i); |
5dd78e9a | 1154 | SUBREG_TICKED (i) = REGNO (SUBREG_REG (x)); |
34c73909 R |
1155 | return 0; |
1156 | } | |
1157 | ||
7afe21cc RK |
1158 | /* If X is a comparison or a COMPARE and either operand is a register |
1159 | that does not have a quantity, give it one. This is so that a later | |
1160 | call to record_jump_equiv won't cause X to be assigned a different | |
1161 | hash code and not found in the table after that call. | |
1162 | ||
1163 | It is not necessary to do this here, since rehash_using_reg can | |
1164 | fix up the table later, but doing this here eliminates the need to | |
1165 | call that expensive function in the most common case where the only | |
1166 | use of the register is in the comparison. */ | |
1167 | ||
ec8e098d | 1168 | if (code == COMPARE || COMPARISON_P (x)) |
7afe21cc | 1169 | { |
f8cfc6aa | 1170 | if (REG_P (XEXP (x, 0)) |
7afe21cc | 1171 | && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 0)))) |
9714cf43 | 1172 | if (insert_regs (XEXP (x, 0), NULL, 0)) |
7afe21cc RK |
1173 | { |
1174 | rehash_using_reg (XEXP (x, 0)); | |
1175 | changed = 1; | |
1176 | } | |
1177 | ||
f8cfc6aa | 1178 | if (REG_P (XEXP (x, 1)) |
7afe21cc | 1179 | && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 1)))) |
9714cf43 | 1180 | if (insert_regs (XEXP (x, 1), NULL, 0)) |
7afe21cc RK |
1181 | { |
1182 | rehash_using_reg (XEXP (x, 1)); | |
1183 | changed = 1; | |
1184 | } | |
1185 | } | |
1186 | ||
1187 | fmt = GET_RTX_FORMAT (code); | |
1188 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
1189 | if (fmt[i] == 'e') | |
1190 | changed |= mention_regs (XEXP (x, i)); | |
1191 | else if (fmt[i] == 'E') | |
1192 | for (j = 0; j < XVECLEN (x, i); j++) | |
1193 | changed |= mention_regs (XVECEXP (x, i, j)); | |
1194 | ||
1195 | return changed; | |
1196 | } | |
1197 | ||
1198 | /* Update the register quantities for inserting X into the hash table | |
1199 | with a value equivalent to CLASSP. | |
1200 | (If the class does not contain a REG, it is irrelevant.) | |
1201 | If MODIFIED is nonzero, X is a destination; it is being modified. | |
1202 | Note that delete_reg_equiv should be called on a register | |
1203 | before insert_regs is done on that register with MODIFIED != 0. | |
1204 | ||
1205 | Nonzero value means that elements of reg_qty have changed | |
1206 | so X's hash code may be different. */ | |
1207 | ||
1208 | static int | |
7080f735 | 1209 | insert_regs (rtx x, struct table_elt *classp, int modified) |
7afe21cc | 1210 | { |
f8cfc6aa | 1211 | if (REG_P (x)) |
7afe21cc | 1212 | { |
770ae6cc RK |
1213 | unsigned int regno = REGNO (x); |
1214 | int qty_valid; | |
7afe21cc | 1215 | |
1ff0c00d RK |
1216 | /* If REGNO is in the equivalence table already but is of the |
1217 | wrong mode for that equivalence, don't do anything here. */ | |
1218 | ||
1bb98cec DM |
1219 | qty_valid = REGNO_QTY_VALID_P (regno); |
1220 | if (qty_valid) | |
1221 | { | |
1222 | struct qty_table_elem *ent = &qty_table[REG_QTY (regno)]; | |
1ff0c00d | 1223 | |
1bb98cec DM |
1224 | if (ent->mode != GET_MODE (x)) |
1225 | return 0; | |
1226 | } | |
1227 | ||
1228 | if (modified || ! qty_valid) | |
7afe21cc RK |
1229 | { |
1230 | if (classp) | |
1231 | for (classp = classp->first_same_value; | |
1232 | classp != 0; | |
1233 | classp = classp->next_same_value) | |
f8cfc6aa | 1234 | if (REG_P (classp->exp) |
7afe21cc RK |
1235 | && GET_MODE (classp->exp) == GET_MODE (x)) |
1236 | { | |
cd928652 ZD |
1237 | unsigned c_regno = REGNO (classp->exp); |
1238 | ||
1239 | gcc_assert (REGNO_QTY_VALID_P (c_regno)); | |
1240 | ||
1241 | /* Suppose that 5 is hard reg and 100 and 101 are | |
1242 | pseudos. Consider | |
1243 | ||
1244 | (set (reg:si 100) (reg:si 5)) | |
1245 | (set (reg:si 5) (reg:si 100)) | |
1246 | (set (reg:di 101) (reg:di 5)) | |
1247 | ||
1248 | We would now set REG_QTY (101) = REG_QTY (5), but the | |
1249 | entry for 5 is in SImode. When we use this later in | |
1250 | copy propagation, we get the register in wrong mode. */ | |
1251 | if (qty_table[REG_QTY (c_regno)].mode != GET_MODE (x)) | |
1252 | continue; | |
1253 | ||
1254 | make_regs_eqv (regno, c_regno); | |
7afe21cc RK |
1255 | return 1; |
1256 | } | |
1257 | ||
d9f20424 R |
1258 | /* Mention_regs for a SUBREG checks if REG_TICK is exactly one larger |
1259 | than REG_IN_TABLE to find out if there was only a single preceding | |
1260 | invalidation - for the SUBREG - or another one, which would be | |
1261 | for the full register. However, if we find here that REG_TICK | |
1262 | indicates that the register is invalid, it means that it has | |
1263 | been invalidated in a separate operation. The SUBREG might be used | |
1264 | now (then this is a recursive call), or we might use the full REG | |
1265 | now and a SUBREG of it later. So bump up REG_TICK so that | |
1266 | mention_regs will do the right thing. */ | |
1267 | if (! modified | |
1268 | && REG_IN_TABLE (regno) >= 0 | |
1269 | && REG_TICK (regno) == REG_IN_TABLE (regno) + 1) | |
1270 | REG_TICK (regno)++; | |
1bb98cec | 1271 | make_new_qty (regno, GET_MODE (x)); |
7afe21cc RK |
1272 | return 1; |
1273 | } | |
cdf4112f TG |
1274 | |
1275 | return 0; | |
7afe21cc | 1276 | } |
c610adec RK |
1277 | |
1278 | /* If X is a SUBREG, we will likely be inserting the inner register in the | |
1279 | table. If that register doesn't have an assigned quantity number at | |
1280 | this point but does later, the insertion that we will be doing now will | |
1281 | not be accessible because its hash code will have changed. So assign | |
1282 | a quantity number now. */ | |
1283 | ||
f8cfc6aa | 1284 | else if (GET_CODE (x) == SUBREG && REG_P (SUBREG_REG (x)) |
c610adec RK |
1285 | && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x)))) |
1286 | { | |
9714cf43 | 1287 | insert_regs (SUBREG_REG (x), NULL, 0); |
34c73909 | 1288 | mention_regs (x); |
c610adec RK |
1289 | return 1; |
1290 | } | |
7afe21cc RK |
1291 | else |
1292 | return mention_regs (x); | |
1293 | } | |
1294 | \f | |
1295 | /* Look in or update the hash table. */ | |
1296 | ||
7afe21cc RK |
1297 | /* Remove table element ELT from use in the table. |
1298 | HASH is its hash code, made using the HASH macro. | |
1299 | It's an argument because often that is known in advance | |
1300 | and we save much time not recomputing it. */ | |
1301 | ||
1302 | static void | |
7080f735 | 1303 | remove_from_table (struct table_elt *elt, unsigned int hash) |
7afe21cc RK |
1304 | { |
1305 | if (elt == 0) | |
1306 | return; | |
1307 | ||
1308 | /* Mark this element as removed. See cse_insn. */ | |
1309 | elt->first_same_value = 0; | |
1310 | ||
1311 | /* Remove the table element from its equivalence class. */ | |
278a83b2 | 1312 | |
7afe21cc | 1313 | { |
b3694847 SS |
1314 | struct table_elt *prev = elt->prev_same_value; |
1315 | struct table_elt *next = elt->next_same_value; | |
7afe21cc | 1316 | |
278a83b2 KH |
1317 | if (next) |
1318 | next->prev_same_value = prev; | |
7afe21cc RK |
1319 | |
1320 | if (prev) | |
1321 | prev->next_same_value = next; | |
1322 | else | |
1323 | { | |
b3694847 | 1324 | struct table_elt *newfirst = next; |
7afe21cc RK |
1325 | while (next) |
1326 | { | |
1327 | next->first_same_value = newfirst; | |
1328 | next = next->next_same_value; | |
1329 | } | |
1330 | } | |
1331 | } | |
1332 | ||
1333 | /* Remove the table element from its hash bucket. */ | |
1334 | ||
1335 | { | |
b3694847 SS |
1336 | struct table_elt *prev = elt->prev_same_hash; |
1337 | struct table_elt *next = elt->next_same_hash; | |
7afe21cc | 1338 | |
278a83b2 KH |
1339 | if (next) |
1340 | next->prev_same_hash = prev; | |
7afe21cc RK |
1341 | |
1342 | if (prev) | |
1343 | prev->next_same_hash = next; | |
1344 | else if (table[hash] == elt) | |
1345 | table[hash] = next; | |
1346 | else | |
1347 | { | |
1348 | /* This entry is not in the proper hash bucket. This can happen | |
1349 | when two classes were merged by `merge_equiv_classes'. Search | |
1350 | for the hash bucket that it heads. This happens only very | |
1351 | rarely, so the cost is acceptable. */ | |
9b1549b8 | 1352 | for (hash = 0; hash < HASH_SIZE; hash++) |
7afe21cc RK |
1353 | if (table[hash] == elt) |
1354 | table[hash] = next; | |
1355 | } | |
1356 | } | |
1357 | ||
1358 | /* Remove the table element from its related-value circular chain. */ | |
1359 | ||
1360 | if (elt->related_value != 0 && elt->related_value != elt) | |
1361 | { | |
b3694847 | 1362 | struct table_elt *p = elt->related_value; |
770ae6cc | 1363 | |
7afe21cc RK |
1364 | while (p->related_value != elt) |
1365 | p = p->related_value; | |
1366 | p->related_value = elt->related_value; | |
1367 | if (p->related_value == p) | |
1368 | p->related_value = 0; | |
1369 | } | |
1370 | ||
9b1549b8 DM |
1371 | /* Now add it to the free element chain. */ |
1372 | elt->next_same_hash = free_element_chain; | |
1373 | free_element_chain = elt; | |
7afe21cc RK |
1374 | } |
1375 | ||
1376 | /* Look up X in the hash table and return its table element, | |
1377 | or 0 if X is not in the table. | |
1378 | ||
1379 | MODE is the machine-mode of X, or if X is an integer constant | |
1380 | with VOIDmode then MODE is the mode with which X will be used. | |
1381 | ||
1382 | Here we are satisfied to find an expression whose tree structure | |
1383 | looks like X. */ | |
1384 | ||
1385 | static struct table_elt * | |
7080f735 | 1386 | lookup (rtx x, unsigned int hash, enum machine_mode mode) |
7afe21cc | 1387 | { |
b3694847 | 1388 | struct table_elt *p; |
7afe21cc RK |
1389 | |
1390 | for (p = table[hash]; p; p = p->next_same_hash) | |
f8cfc6aa | 1391 | if (mode == p->mode && ((x == p->exp && REG_P (x)) |
0516f6fe | 1392 | || exp_equiv_p (x, p->exp, !REG_P (x), false))) |
7afe21cc RK |
1393 | return p; |
1394 | ||
1395 | return 0; | |
1396 | } | |
1397 | ||
1398 | /* Like `lookup' but don't care whether the table element uses invalid regs. | |
1399 | Also ignore discrepancies in the machine mode of a register. */ | |
1400 | ||
1401 | static struct table_elt * | |
7080f735 | 1402 | lookup_for_remove (rtx x, unsigned int hash, enum machine_mode mode) |
7afe21cc | 1403 | { |
b3694847 | 1404 | struct table_elt *p; |
7afe21cc | 1405 | |
f8cfc6aa | 1406 | if (REG_P (x)) |
7afe21cc | 1407 | { |
770ae6cc RK |
1408 | unsigned int regno = REGNO (x); |
1409 | ||
7afe21cc RK |
1410 | /* Don't check the machine mode when comparing registers; |
1411 | invalidating (REG:SI 0) also invalidates (REG:DF 0). */ | |
1412 | for (p = table[hash]; p; p = p->next_same_hash) | |
f8cfc6aa | 1413 | if (REG_P (p->exp) |
7afe21cc RK |
1414 | && REGNO (p->exp) == regno) |
1415 | return p; | |
1416 | } | |
1417 | else | |
1418 | { | |
1419 | for (p = table[hash]; p; p = p->next_same_hash) | |
0516f6fe SB |
1420 | if (mode == p->mode |
1421 | && (x == p->exp || exp_equiv_p (x, p->exp, 0, false))) | |
7afe21cc RK |
1422 | return p; |
1423 | } | |
1424 | ||
1425 | return 0; | |
1426 | } | |
1427 | ||
1428 | /* Look for an expression equivalent to X and with code CODE. | |
1429 | If one is found, return that expression. */ | |
1430 | ||
1431 | static rtx | |
7080f735 | 1432 | lookup_as_function (rtx x, enum rtx_code code) |
7afe21cc | 1433 | { |
b3694847 | 1434 | struct table_elt *p |
0516f6fe | 1435 | = lookup (x, SAFE_HASH (x, VOIDmode), GET_MODE (x)); |
770ae6cc | 1436 | |
34c73909 R |
1437 | /* If we are looking for a CONST_INT, the mode doesn't really matter, as |
1438 | long as we are narrowing. So if we looked in vain for a mode narrower | |
1439 | than word_mode before, look for word_mode now. */ | |
1440 | if (p == 0 && code == CONST_INT | |
1441 | && GET_MODE_SIZE (GET_MODE (x)) < GET_MODE_SIZE (word_mode)) | |
1442 | { | |
1443 | x = copy_rtx (x); | |
1444 | PUT_MODE (x, word_mode); | |
0516f6fe | 1445 | p = lookup (x, SAFE_HASH (x, VOIDmode), word_mode); |
34c73909 R |
1446 | } |
1447 | ||
7afe21cc RK |
1448 | if (p == 0) |
1449 | return 0; | |
1450 | ||
1451 | for (p = p->first_same_value; p; p = p->next_same_value) | |
770ae6cc RK |
1452 | if (GET_CODE (p->exp) == code |
1453 | /* Make sure this is a valid entry in the table. */ | |
0516f6fe | 1454 | && exp_equiv_p (p->exp, p->exp, 1, false)) |
770ae6cc | 1455 | return p->exp; |
278a83b2 | 1456 | |
7afe21cc RK |
1457 | return 0; |
1458 | } | |
1459 | ||
1460 | /* Insert X in the hash table, assuming HASH is its hash code | |
1461 | and CLASSP is an element of the class it should go in | |
1462 | (or 0 if a new class should be made). | |
1463 | It is inserted at the proper position to keep the class in | |
1464 | the order cheapest first. | |
1465 | ||
1466 | MODE is the machine-mode of X, or if X is an integer constant | |
1467 | with VOIDmode then MODE is the mode with which X will be used. | |
1468 | ||
1469 | For elements of equal cheapness, the most recent one | |
1470 | goes in front, except that the first element in the list | |
1471 | remains first unless a cheaper element is added. The order of | |
1472 | pseudo-registers does not matter, as canon_reg will be called to | |
830a38ee | 1473 | find the cheapest when a register is retrieved from the table. |
7afe21cc RK |
1474 | |
1475 | The in_memory field in the hash table element is set to 0. | |
1476 | The caller must set it nonzero if appropriate. | |
1477 | ||
1478 | You should call insert_regs (X, CLASSP, MODIFY) before calling here, | |
1479 | and if insert_regs returns a nonzero value | |
1480 | you must then recompute its hash code before calling here. | |
1481 | ||
1482 | If necessary, update table showing constant values of quantities. */ | |
1483 | ||
630c79be | 1484 | #define CHEAPER(X, Y) \ |
56ae04af | 1485 | (preferable ((X)->cost, (X)->regcost, (Y)->cost, (Y)->regcost) < 0) |
7afe21cc RK |
1486 | |
1487 | static struct table_elt * | |
7080f735 | 1488 | insert (rtx x, struct table_elt *classp, unsigned int hash, enum machine_mode mode) |
7afe21cc | 1489 | { |
b3694847 | 1490 | struct table_elt *elt; |
7afe21cc RK |
1491 | |
1492 | /* If X is a register and we haven't made a quantity for it, | |
1493 | something is wrong. */ | |
341c100f | 1494 | gcc_assert (!REG_P (x) || REGNO_QTY_VALID_P (REGNO (x))); |
7afe21cc RK |
1495 | |
1496 | /* If X is a hard register, show it is being put in the table. */ | |
f8cfc6aa | 1497 | if (REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER) |
7afe21cc | 1498 | { |
770ae6cc | 1499 | unsigned int regno = REGNO (x); |
66fd46b6 | 1500 | unsigned int endregno = regno + hard_regno_nregs[regno][GET_MODE (x)]; |
770ae6cc | 1501 | unsigned int i; |
7afe21cc RK |
1502 | |
1503 | for (i = regno; i < endregno; i++) | |
770ae6cc | 1504 | SET_HARD_REG_BIT (hard_regs_in_table, i); |
7afe21cc RK |
1505 | } |
1506 | ||
7afe21cc RK |
1507 | /* Put an element for X into the right hash bucket. */ |
1508 | ||
9b1549b8 DM |
1509 | elt = free_element_chain; |
1510 | if (elt) | |
770ae6cc | 1511 | free_element_chain = elt->next_same_hash; |
9b1549b8 | 1512 | else |
26af0046 | 1513 | elt = xmalloc (sizeof (struct table_elt)); |
9b1549b8 | 1514 | |
7afe21cc | 1515 | elt->exp = x; |
db048faf | 1516 | elt->canon_exp = NULL_RTX; |
7afe21cc | 1517 | elt->cost = COST (x); |
630c79be | 1518 | elt->regcost = approx_reg_cost (x); |
7afe21cc RK |
1519 | elt->next_same_value = 0; |
1520 | elt->prev_same_value = 0; | |
1521 | elt->next_same_hash = table[hash]; | |
1522 | elt->prev_same_hash = 0; | |
1523 | elt->related_value = 0; | |
1524 | elt->in_memory = 0; | |
1525 | elt->mode = mode; | |
389fdba0 | 1526 | elt->is_const = (CONSTANT_P (x) || fixed_base_plus_p (x)); |
7afe21cc RK |
1527 | |
1528 | if (table[hash]) | |
1529 | table[hash]->prev_same_hash = elt; | |
1530 | table[hash] = elt; | |
1531 | ||
1532 | /* Put it into the proper value-class. */ | |
1533 | if (classp) | |
1534 | { | |
1535 | classp = classp->first_same_value; | |
1536 | if (CHEAPER (elt, classp)) | |
f9da5064 | 1537 | /* Insert at the head of the class. */ |
7afe21cc | 1538 | { |
b3694847 | 1539 | struct table_elt *p; |
7afe21cc RK |
1540 | elt->next_same_value = classp; |
1541 | classp->prev_same_value = elt; | |
1542 | elt->first_same_value = elt; | |
1543 | ||
1544 | for (p = classp; p; p = p->next_same_value) | |
1545 | p->first_same_value = elt; | |
1546 | } | |
1547 | else | |
1548 | { | |
1549 | /* Insert not at head of the class. */ | |
1550 | /* Put it after the last element cheaper than X. */ | |
b3694847 | 1551 | struct table_elt *p, *next; |
770ae6cc | 1552 | |
7afe21cc RK |
1553 | for (p = classp; (next = p->next_same_value) && CHEAPER (next, elt); |
1554 | p = next); | |
770ae6cc | 1555 | |
7afe21cc RK |
1556 | /* Put it after P and before NEXT. */ |
1557 | elt->next_same_value = next; | |
1558 | if (next) | |
1559 | next->prev_same_value = elt; | |
770ae6cc | 1560 | |
7afe21cc RK |
1561 | elt->prev_same_value = p; |
1562 | p->next_same_value = elt; | |
1563 | elt->first_same_value = classp; | |
1564 | } | |
1565 | } | |
1566 | else | |
1567 | elt->first_same_value = elt; | |
1568 | ||
1569 | /* If this is a constant being set equivalent to a register or a register | |
1570 | being set equivalent to a constant, note the constant equivalence. | |
1571 | ||
1572 | If this is a constant, it cannot be equivalent to a different constant, | |
1573 | and a constant is the only thing that can be cheaper than a register. So | |
1574 | we know the register is the head of the class (before the constant was | |
1575 | inserted). | |
1576 | ||
1577 | If this is a register that is not already known equivalent to a | |
1578 | constant, we must check the entire class. | |
1579 | ||
1580 | If this is a register that is already known equivalent to an insn, | |
1bb98cec | 1581 | update the qtys `const_insn' to show that `this_insn' is the latest |
7afe21cc RK |
1582 | insn making that quantity equivalent to the constant. */ |
1583 | ||
f8cfc6aa JQ |
1584 | if (elt->is_const && classp && REG_P (classp->exp) |
1585 | && !REG_P (x)) | |
7afe21cc | 1586 | { |
1bb98cec DM |
1587 | int exp_q = REG_QTY (REGNO (classp->exp)); |
1588 | struct qty_table_elem *exp_ent = &qty_table[exp_q]; | |
1589 | ||
4de249d9 | 1590 | exp_ent->const_rtx = gen_lowpart (exp_ent->mode, x); |
1bb98cec | 1591 | exp_ent->const_insn = this_insn; |
7afe21cc RK |
1592 | } |
1593 | ||
f8cfc6aa | 1594 | else if (REG_P (x) |
1bb98cec DM |
1595 | && classp |
1596 | && ! qty_table[REG_QTY (REGNO (x))].const_rtx | |
f353588a | 1597 | && ! elt->is_const) |
7afe21cc | 1598 | { |
b3694847 | 1599 | struct table_elt *p; |
7afe21cc RK |
1600 | |
1601 | for (p = classp; p != 0; p = p->next_same_value) | |
1602 | { | |
f8cfc6aa | 1603 | if (p->is_const && !REG_P (p->exp)) |
7afe21cc | 1604 | { |
1bb98cec DM |
1605 | int x_q = REG_QTY (REGNO (x)); |
1606 | struct qty_table_elem *x_ent = &qty_table[x_q]; | |
1607 | ||
770ae6cc | 1608 | x_ent->const_rtx |
4de249d9 | 1609 | = gen_lowpart (GET_MODE (x), p->exp); |
1bb98cec | 1610 | x_ent->const_insn = this_insn; |
7afe21cc RK |
1611 | break; |
1612 | } | |
1613 | } | |
1614 | } | |
1615 | ||
f8cfc6aa | 1616 | else if (REG_P (x) |
1bb98cec DM |
1617 | && qty_table[REG_QTY (REGNO (x))].const_rtx |
1618 | && GET_MODE (x) == qty_table[REG_QTY (REGNO (x))].mode) | |
1619 | qty_table[REG_QTY (REGNO (x))].const_insn = this_insn; | |
7afe21cc RK |
1620 | |
1621 | /* If this is a constant with symbolic value, | |
1622 | and it has a term with an explicit integer value, | |
1623 | link it up with related expressions. */ | |
1624 | if (GET_CODE (x) == CONST) | |
1625 | { | |
1626 | rtx subexp = get_related_value (x); | |
2197a88a | 1627 | unsigned subhash; |
7afe21cc RK |
1628 | struct table_elt *subelt, *subelt_prev; |
1629 | ||
1630 | if (subexp != 0) | |
1631 | { | |
1632 | /* Get the integer-free subexpression in the hash table. */ | |
0516f6fe | 1633 | subhash = SAFE_HASH (subexp, mode); |
7afe21cc RK |
1634 | subelt = lookup (subexp, subhash, mode); |
1635 | if (subelt == 0) | |
9714cf43 | 1636 | subelt = insert (subexp, NULL, subhash, mode); |
7afe21cc RK |
1637 | /* Initialize SUBELT's circular chain if it has none. */ |
1638 | if (subelt->related_value == 0) | |
1639 | subelt->related_value = subelt; | |
1640 | /* Find the element in the circular chain that precedes SUBELT. */ | |
1641 | subelt_prev = subelt; | |
1642 | while (subelt_prev->related_value != subelt) | |
1643 | subelt_prev = subelt_prev->related_value; | |
1644 | /* Put new ELT into SUBELT's circular chain just before SUBELT. | |
1645 | This way the element that follows SUBELT is the oldest one. */ | |
1646 | elt->related_value = subelt_prev->related_value; | |
1647 | subelt_prev->related_value = elt; | |
1648 | } | |
1649 | } | |
1650 | ||
1651 | return elt; | |
1652 | } | |
1653 | \f | |
1654 | /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from | |
1655 | CLASS2 into CLASS1. This is done when we have reached an insn which makes | |
1656 | the two classes equivalent. | |
1657 | ||
1658 | CLASS1 will be the surviving class; CLASS2 should not be used after this | |
1659 | call. | |
1660 | ||
1661 | Any invalid entries in CLASS2 will not be copied. */ | |
1662 | ||
1663 | static void | |
7080f735 | 1664 | merge_equiv_classes (struct table_elt *class1, struct table_elt *class2) |
7afe21cc RK |
1665 | { |
1666 | struct table_elt *elt, *next, *new; | |
1667 | ||
1668 | /* Ensure we start with the head of the classes. */ | |
1669 | class1 = class1->first_same_value; | |
1670 | class2 = class2->first_same_value; | |
1671 | ||
1672 | /* If they were already equal, forget it. */ | |
1673 | if (class1 == class2) | |
1674 | return; | |
1675 | ||
1676 | for (elt = class2; elt; elt = next) | |
1677 | { | |
770ae6cc | 1678 | unsigned int hash; |
7afe21cc RK |
1679 | rtx exp = elt->exp; |
1680 | enum machine_mode mode = elt->mode; | |
1681 | ||
1682 | next = elt->next_same_value; | |
1683 | ||
1684 | /* Remove old entry, make a new one in CLASS1's class. | |
1685 | Don't do this for invalid entries as we cannot find their | |
0f41302f | 1686 | hash code (it also isn't necessary). */ |
0516f6fe | 1687 | if (REG_P (exp) || exp_equiv_p (exp, exp, 1, false)) |
7afe21cc | 1688 | { |
a90fc8e0 RH |
1689 | bool need_rehash = false; |
1690 | ||
7afe21cc | 1691 | hash_arg_in_memory = 0; |
7afe21cc | 1692 | hash = HASH (exp, mode); |
278a83b2 | 1693 | |
f8cfc6aa | 1694 | if (REG_P (exp)) |
a90fc8e0 | 1695 | { |
08a69267 | 1696 | need_rehash = REGNO_QTY_VALID_P (REGNO (exp)); |
a90fc8e0 RH |
1697 | delete_reg_equiv (REGNO (exp)); |
1698 | } | |
278a83b2 | 1699 | |
7afe21cc RK |
1700 | remove_from_table (elt, hash); |
1701 | ||
a90fc8e0 | 1702 | if (insert_regs (exp, class1, 0) || need_rehash) |
8ae2b8f6 JW |
1703 | { |
1704 | rehash_using_reg (exp); | |
1705 | hash = HASH (exp, mode); | |
1706 | } | |
7afe21cc RK |
1707 | new = insert (exp, class1, hash, mode); |
1708 | new->in_memory = hash_arg_in_memory; | |
7afe21cc RK |
1709 | } |
1710 | } | |
1711 | } | |
1712 | \f | |
01e752d3 JL |
1713 | /* Flush the entire hash table. */ |
1714 | ||
1715 | static void | |
7080f735 | 1716 | flush_hash_table (void) |
01e752d3 JL |
1717 | { |
1718 | int i; | |
1719 | struct table_elt *p; | |
1720 | ||
9b1549b8 | 1721 | for (i = 0; i < HASH_SIZE; i++) |
01e752d3 JL |
1722 | for (p = table[i]; p; p = table[i]) |
1723 | { | |
1724 | /* Note that invalidate can remove elements | |
1725 | after P in the current hash chain. */ | |
f8cfc6aa | 1726 | if (REG_P (p->exp)) |
01e752d3 JL |
1727 | invalidate (p->exp, p->mode); |
1728 | else | |
1729 | remove_from_table (p, i); | |
1730 | } | |
1731 | } | |
14a774a9 | 1732 | \f |
2ce6dc2f JH |
1733 | /* Function called for each rtx to check whether true dependence exist. */ |
1734 | struct check_dependence_data | |
1735 | { | |
1736 | enum machine_mode mode; | |
1737 | rtx exp; | |
9ddb66ca | 1738 | rtx addr; |
2ce6dc2f | 1739 | }; |
be8ac49a | 1740 | |
2ce6dc2f | 1741 | static int |
7080f735 | 1742 | check_dependence (rtx *x, void *data) |
2ce6dc2f JH |
1743 | { |
1744 | struct check_dependence_data *d = (struct check_dependence_data *) data; | |
3c0cb5de | 1745 | if (*x && MEM_P (*x)) |
9ddb66ca JH |
1746 | return canon_true_dependence (d->exp, d->mode, d->addr, *x, |
1747 | cse_rtx_varies_p); | |
2ce6dc2f JH |
1748 | else |
1749 | return 0; | |
1750 | } | |
1751 | \f | |
14a774a9 RK |
1752 | /* Remove from the hash table, or mark as invalid, all expressions whose |
1753 | values could be altered by storing in X. X is a register, a subreg, or | |
1754 | a memory reference with nonvarying address (because, when a memory | |
1755 | reference with a varying address is stored in, all memory references are | |
1756 | removed by invalidate_memory so specific invalidation is superfluous). | |
1757 | FULL_MODE, if not VOIDmode, indicates that this much should be | |
1758 | invalidated instead of just the amount indicated by the mode of X. This | |
1759 | is only used for bitfield stores into memory. | |
1760 | ||
1761 | A nonvarying address may be just a register or just a symbol reference, | |
1762 | or it may be either of those plus a numeric offset. */ | |
7afe21cc RK |
1763 | |
1764 | static void | |
7080f735 | 1765 | invalidate (rtx x, enum machine_mode full_mode) |
7afe21cc | 1766 | { |
b3694847 SS |
1767 | int i; |
1768 | struct table_elt *p; | |
9ddb66ca | 1769 | rtx addr; |
7afe21cc | 1770 | |
14a774a9 | 1771 | switch (GET_CODE (x)) |
7afe21cc | 1772 | { |
14a774a9 RK |
1773 | case REG: |
1774 | { | |
1775 | /* If X is a register, dependencies on its contents are recorded | |
1776 | through the qty number mechanism. Just change the qty number of | |
1777 | the register, mark it as invalid for expressions that refer to it, | |
1778 | and remove it itself. */ | |
770ae6cc RK |
1779 | unsigned int regno = REGNO (x); |
1780 | unsigned int hash = HASH (x, GET_MODE (x)); | |
7afe21cc | 1781 | |
14a774a9 RK |
1782 | /* Remove REGNO from any quantity list it might be on and indicate |
1783 | that its value might have changed. If it is a pseudo, remove its | |
1784 | entry from the hash table. | |
7afe21cc | 1785 | |
14a774a9 RK |
1786 | For a hard register, we do the first two actions above for any |
1787 | additional hard registers corresponding to X. Then, if any of these | |
1788 | registers are in the table, we must remove any REG entries that | |
1789 | overlap these registers. */ | |
7afe21cc | 1790 | |
14a774a9 RK |
1791 | delete_reg_equiv (regno); |
1792 | REG_TICK (regno)++; | |
46081bb3 | 1793 | SUBREG_TICKED (regno) = -1; |
85e4d983 | 1794 | |
14a774a9 RK |
1795 | if (regno >= FIRST_PSEUDO_REGISTER) |
1796 | { | |
1797 | /* Because a register can be referenced in more than one mode, | |
1798 | we might have to remove more than one table entry. */ | |
1799 | struct table_elt *elt; | |
85e4d983 | 1800 | |
14a774a9 RK |
1801 | while ((elt = lookup_for_remove (x, hash, GET_MODE (x)))) |
1802 | remove_from_table (elt, hash); | |
1803 | } | |
1804 | else | |
1805 | { | |
1806 | HOST_WIDE_INT in_table | |
1807 | = TEST_HARD_REG_BIT (hard_regs_in_table, regno); | |
770ae6cc | 1808 | unsigned int endregno |
66fd46b6 | 1809 | = regno + hard_regno_nregs[regno][GET_MODE (x)]; |
770ae6cc | 1810 | unsigned int tregno, tendregno, rn; |
b3694847 | 1811 | struct table_elt *p, *next; |
7afe21cc | 1812 | |
14a774a9 | 1813 | CLEAR_HARD_REG_BIT (hard_regs_in_table, regno); |
7afe21cc | 1814 | |
770ae6cc | 1815 | for (rn = regno + 1; rn < endregno; rn++) |
14a774a9 | 1816 | { |
770ae6cc RK |
1817 | in_table |= TEST_HARD_REG_BIT (hard_regs_in_table, rn); |
1818 | CLEAR_HARD_REG_BIT (hard_regs_in_table, rn); | |
1819 | delete_reg_equiv (rn); | |
1820 | REG_TICK (rn)++; | |
46081bb3 | 1821 | SUBREG_TICKED (rn) = -1; |
14a774a9 | 1822 | } |
7afe21cc | 1823 | |
14a774a9 | 1824 | if (in_table) |
9b1549b8 | 1825 | for (hash = 0; hash < HASH_SIZE; hash++) |
14a774a9 RK |
1826 | for (p = table[hash]; p; p = next) |
1827 | { | |
1828 | next = p->next_same_hash; | |
7afe21cc | 1829 | |
f8cfc6aa | 1830 | if (!REG_P (p->exp) |
278a83b2 KH |
1831 | || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER) |
1832 | continue; | |
1833 | ||
14a774a9 RK |
1834 | tregno = REGNO (p->exp); |
1835 | tendregno | |
66fd46b6 | 1836 | = tregno + hard_regno_nregs[tregno][GET_MODE (p->exp)]; |
14a774a9 RK |
1837 | if (tendregno > regno && tregno < endregno) |
1838 | remove_from_table (p, hash); | |
1839 | } | |
1840 | } | |
1841 | } | |
7afe21cc | 1842 | return; |
7afe21cc | 1843 | |
14a774a9 | 1844 | case SUBREG: |
bb4034b3 | 1845 | invalidate (SUBREG_REG (x), VOIDmode); |
7afe21cc | 1846 | return; |
aac5cc16 | 1847 | |
14a774a9 | 1848 | case PARALLEL: |
278a83b2 | 1849 | for (i = XVECLEN (x, 0) - 1; i >= 0; --i) |
aac5cc16 RH |
1850 | invalidate (XVECEXP (x, 0, i), VOIDmode); |
1851 | return; | |
aac5cc16 | 1852 | |
14a774a9 RK |
1853 | case EXPR_LIST: |
1854 | /* This is part of a disjoint return value; extract the location in | |
1855 | question ignoring the offset. */ | |
aac5cc16 RH |
1856 | invalidate (XEXP (x, 0), VOIDmode); |
1857 | return; | |
7afe21cc | 1858 | |
14a774a9 | 1859 | case MEM: |
9ddb66ca | 1860 | addr = canon_rtx (get_addr (XEXP (x, 0))); |
db048faf MM |
1861 | /* Calculate the canonical version of X here so that |
1862 | true_dependence doesn't generate new RTL for X on each call. */ | |
1863 | x = canon_rtx (x); | |
1864 | ||
14a774a9 RK |
1865 | /* Remove all hash table elements that refer to overlapping pieces of |
1866 | memory. */ | |
1867 | if (full_mode == VOIDmode) | |
1868 | full_mode = GET_MODE (x); | |
bb4034b3 | 1869 | |
9b1549b8 | 1870 | for (i = 0; i < HASH_SIZE; i++) |
7afe21cc | 1871 | { |
b3694847 | 1872 | struct table_elt *next; |
14a774a9 RK |
1873 | |
1874 | for (p = table[i]; p; p = next) | |
1875 | { | |
1876 | next = p->next_same_hash; | |
db048faf MM |
1877 | if (p->in_memory) |
1878 | { | |
2ce6dc2f JH |
1879 | struct check_dependence_data d; |
1880 | ||
1881 | /* Just canonicalize the expression once; | |
1882 | otherwise each time we call invalidate | |
1883 | true_dependence will canonicalize the | |
1884 | expression again. */ | |
1885 | if (!p->canon_exp) | |
1886 | p->canon_exp = canon_rtx (p->exp); | |
1887 | d.exp = x; | |
9ddb66ca | 1888 | d.addr = addr; |
2ce6dc2f JH |
1889 | d.mode = full_mode; |
1890 | if (for_each_rtx (&p->canon_exp, check_dependence, &d)) | |
db048faf | 1891 | remove_from_table (p, i); |
db048faf | 1892 | } |
14a774a9 | 1893 | } |
7afe21cc | 1894 | } |
14a774a9 RK |
1895 | return; |
1896 | ||
1897 | default: | |
341c100f | 1898 | gcc_unreachable (); |
7afe21cc RK |
1899 | } |
1900 | } | |
14a774a9 | 1901 | \f |
7afe21cc RK |
1902 | /* Remove all expressions that refer to register REGNO, |
1903 | since they are already invalid, and we are about to | |
1904 | mark that register valid again and don't want the old | |
1905 | expressions to reappear as valid. */ | |
1906 | ||
1907 | static void | |
7080f735 | 1908 | remove_invalid_refs (unsigned int regno) |
7afe21cc | 1909 | { |
770ae6cc RK |
1910 | unsigned int i; |
1911 | struct table_elt *p, *next; | |
7afe21cc | 1912 | |
9b1549b8 | 1913 | for (i = 0; i < HASH_SIZE; i++) |
7afe21cc RK |
1914 | for (p = table[i]; p; p = next) |
1915 | { | |
1916 | next = p->next_same_hash; | |
f8cfc6aa | 1917 | if (!REG_P (p->exp) |
68252e27 | 1918 | && refers_to_regno_p (regno, regno + 1, p->exp, (rtx *) 0)) |
7afe21cc RK |
1919 | remove_from_table (p, i); |
1920 | } | |
1921 | } | |
34c73909 | 1922 | |
ddef6bc7 JJ |
1923 | /* Likewise for a subreg with subreg_reg REGNO, subreg_byte OFFSET, |
1924 | and mode MODE. */ | |
34c73909 | 1925 | static void |
7080f735 AJ |
1926 | remove_invalid_subreg_refs (unsigned int regno, unsigned int offset, |
1927 | enum machine_mode mode) | |
34c73909 | 1928 | { |
770ae6cc RK |
1929 | unsigned int i; |
1930 | struct table_elt *p, *next; | |
ddef6bc7 | 1931 | unsigned int end = offset + (GET_MODE_SIZE (mode) - 1); |
34c73909 | 1932 | |
9b1549b8 | 1933 | for (i = 0; i < HASH_SIZE; i++) |
34c73909 R |
1934 | for (p = table[i]; p; p = next) |
1935 | { | |
ddef6bc7 | 1936 | rtx exp = p->exp; |
34c73909 | 1937 | next = p->next_same_hash; |
278a83b2 | 1938 | |
f8cfc6aa | 1939 | if (!REG_P (exp) |
34c73909 | 1940 | && (GET_CODE (exp) != SUBREG |
f8cfc6aa | 1941 | || !REG_P (SUBREG_REG (exp)) |
34c73909 | 1942 | || REGNO (SUBREG_REG (exp)) != regno |
ddef6bc7 JJ |
1943 | || (((SUBREG_BYTE (exp) |
1944 | + (GET_MODE_SIZE (GET_MODE (exp)) - 1)) >= offset) | |
1945 | && SUBREG_BYTE (exp) <= end)) | |
68252e27 | 1946 | && refers_to_regno_p (regno, regno + 1, p->exp, (rtx *) 0)) |
34c73909 R |
1947 | remove_from_table (p, i); |
1948 | } | |
1949 | } | |
7afe21cc RK |
1950 | \f |
1951 | /* Recompute the hash codes of any valid entries in the hash table that | |
1952 | reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG. | |
1953 | ||
1954 | This is called when we make a jump equivalence. */ | |
1955 | ||
1956 | static void | |
7080f735 | 1957 | rehash_using_reg (rtx x) |
7afe21cc | 1958 | { |
973838fd | 1959 | unsigned int i; |
7afe21cc | 1960 | struct table_elt *p, *next; |
2197a88a | 1961 | unsigned hash; |
7afe21cc RK |
1962 | |
1963 | if (GET_CODE (x) == SUBREG) | |
1964 | x = SUBREG_REG (x); | |
1965 | ||
1966 | /* If X is not a register or if the register is known not to be in any | |
1967 | valid entries in the table, we have no work to do. */ | |
1968 | ||
f8cfc6aa | 1969 | if (!REG_P (x) |
30f72379 MM |
1970 | || REG_IN_TABLE (REGNO (x)) < 0 |
1971 | || REG_IN_TABLE (REGNO (x)) != REG_TICK (REGNO (x))) | |
7afe21cc RK |
1972 | return; |
1973 | ||
1974 | /* Scan all hash chains looking for valid entries that mention X. | |
a90fc8e0 | 1975 | If we find one and it is in the wrong hash chain, move it. */ |
7afe21cc | 1976 | |
9b1549b8 | 1977 | for (i = 0; i < HASH_SIZE; i++) |
7afe21cc RK |
1978 | for (p = table[i]; p; p = next) |
1979 | { | |
1980 | next = p->next_same_hash; | |
a90fc8e0 | 1981 | if (reg_mentioned_p (x, p->exp) |
0516f6fe SB |
1982 | && exp_equiv_p (p->exp, p->exp, 1, false) |
1983 | && i != (hash = SAFE_HASH (p->exp, p->mode))) | |
7afe21cc RK |
1984 | { |
1985 | if (p->next_same_hash) | |
1986 | p->next_same_hash->prev_same_hash = p->prev_same_hash; | |
1987 | ||
1988 | if (p->prev_same_hash) | |
1989 | p->prev_same_hash->next_same_hash = p->next_same_hash; | |
1990 | else | |
1991 | table[i] = p->next_same_hash; | |
1992 | ||
1993 | p->next_same_hash = table[hash]; | |
1994 | p->prev_same_hash = 0; | |
1995 | if (table[hash]) | |
1996 | table[hash]->prev_same_hash = p; | |
1997 | table[hash] = p; | |
1998 | } | |
1999 | } | |
2000 | } | |
2001 | \f | |
7afe21cc RK |
2002 | /* Remove from the hash table any expression that is a call-clobbered |
2003 | register. Also update their TICK values. */ | |
2004 | ||
2005 | static void | |
7080f735 | 2006 | invalidate_for_call (void) |
7afe21cc | 2007 | { |
770ae6cc RK |
2008 | unsigned int regno, endregno; |
2009 | unsigned int i; | |
2197a88a | 2010 | unsigned hash; |
7afe21cc RK |
2011 | struct table_elt *p, *next; |
2012 | int in_table = 0; | |
2013 | ||
2014 | /* Go through all the hard registers. For each that is clobbered in | |
2015 | a CALL_INSN, remove the register from quantity chains and update | |
2016 | reg_tick if defined. Also see if any of these registers is currently | |
2017 | in the table. */ | |
2018 | ||
2019 | for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) | |
2020 | if (TEST_HARD_REG_BIT (regs_invalidated_by_call, regno)) | |
2021 | { | |
2022 | delete_reg_equiv (regno); | |
30f72379 | 2023 | if (REG_TICK (regno) >= 0) |
46081bb3 SH |
2024 | { |
2025 | REG_TICK (regno)++; | |
2026 | SUBREG_TICKED (regno) = -1; | |
2027 | } | |
7afe21cc | 2028 | |
0e227018 | 2029 | in_table |= (TEST_HARD_REG_BIT (hard_regs_in_table, regno) != 0); |
7afe21cc RK |
2030 | } |
2031 | ||
2032 | /* In the case where we have no call-clobbered hard registers in the | |
2033 | table, we are done. Otherwise, scan the table and remove any | |
2034 | entry that overlaps a call-clobbered register. */ | |
2035 | ||
2036 | if (in_table) | |
9b1549b8 | 2037 | for (hash = 0; hash < HASH_SIZE; hash++) |
7afe21cc RK |
2038 | for (p = table[hash]; p; p = next) |
2039 | { | |
2040 | next = p->next_same_hash; | |
2041 | ||
f8cfc6aa | 2042 | if (!REG_P (p->exp) |
7afe21cc RK |
2043 | || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER) |
2044 | continue; | |
2045 | ||
2046 | regno = REGNO (p->exp); | |
66fd46b6 | 2047 | endregno = regno + hard_regno_nregs[regno][GET_MODE (p->exp)]; |
7afe21cc RK |
2048 | |
2049 | for (i = regno; i < endregno; i++) | |
2050 | if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i)) | |
2051 | { | |
2052 | remove_from_table (p, hash); | |
2053 | break; | |
2054 | } | |
2055 | } | |
2056 | } | |
2057 | \f | |
2058 | /* Given an expression X of type CONST, | |
2059 | and ELT which is its table entry (or 0 if it | |
2060 | is not in the hash table), | |
2061 | return an alternate expression for X as a register plus integer. | |
2062 | If none can be found, return 0. */ | |
2063 | ||
2064 | static rtx | |
7080f735 | 2065 | use_related_value (rtx x, struct table_elt *elt) |
7afe21cc | 2066 | { |
b3694847 SS |
2067 | struct table_elt *relt = 0; |
2068 | struct table_elt *p, *q; | |
906c4e36 | 2069 | HOST_WIDE_INT offset; |
7afe21cc RK |
2070 | |
2071 | /* First, is there anything related known? | |
2072 | If we have a table element, we can tell from that. | |
2073 | Otherwise, must look it up. */ | |
2074 | ||
2075 | if (elt != 0 && elt->related_value != 0) | |
2076 | relt = elt; | |
2077 | else if (elt == 0 && GET_CODE (x) == CONST) | |
2078 | { | |
2079 | rtx subexp = get_related_value (x); | |
2080 | if (subexp != 0) | |
2081 | relt = lookup (subexp, | |
0516f6fe | 2082 | SAFE_HASH (subexp, GET_MODE (subexp)), |
7afe21cc RK |
2083 | GET_MODE (subexp)); |
2084 | } | |
2085 | ||
2086 | if (relt == 0) | |
2087 | return 0; | |
2088 | ||
2089 | /* Search all related table entries for one that has an | |
2090 | equivalent register. */ | |
2091 | ||
2092 | p = relt; | |
2093 | while (1) | |
2094 | { | |
2095 | /* This loop is strange in that it is executed in two different cases. | |
2096 | The first is when X is already in the table. Then it is searching | |
2097 | the RELATED_VALUE list of X's class (RELT). The second case is when | |
2098 | X is not in the table. Then RELT points to a class for the related | |
2099 | value. | |
2100 | ||
2101 | Ensure that, whatever case we are in, that we ignore classes that have | |
2102 | the same value as X. */ | |
2103 | ||
2104 | if (rtx_equal_p (x, p->exp)) | |
2105 | q = 0; | |
2106 | else | |
2107 | for (q = p->first_same_value; q; q = q->next_same_value) | |
f8cfc6aa | 2108 | if (REG_P (q->exp)) |
7afe21cc RK |
2109 | break; |
2110 | ||
2111 | if (q) | |
2112 | break; | |
2113 | ||
2114 | p = p->related_value; | |
2115 | ||
2116 | /* We went all the way around, so there is nothing to be found. | |
2117 | Alternatively, perhaps RELT was in the table for some other reason | |
2118 | and it has no related values recorded. */ | |
2119 | if (p == relt || p == 0) | |
2120 | break; | |
2121 | } | |
2122 | ||
2123 | if (q == 0) | |
2124 | return 0; | |
2125 | ||
2126 | offset = (get_integer_term (x) - get_integer_term (p->exp)); | |
2127 | /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */ | |
2128 | return plus_constant (q->exp, offset); | |
2129 | } | |
2130 | \f | |
6462bb43 AO |
2131 | /* Hash a string. Just add its bytes up. */ |
2132 | static inline unsigned | |
0516f6fe | 2133 | hash_rtx_string (const char *ps) |
6462bb43 AO |
2134 | { |
2135 | unsigned hash = 0; | |
68252e27 KH |
2136 | const unsigned char *p = (const unsigned char *) ps; |
2137 | ||
6462bb43 AO |
2138 | if (p) |
2139 | while (*p) | |
2140 | hash += *p++; | |
2141 | ||
2142 | return hash; | |
2143 | } | |
2144 | ||
7afe21cc RK |
2145 | /* Hash an rtx. We are careful to make sure the value is never negative. |
2146 | Equivalent registers hash identically. | |
2147 | MODE is used in hashing for CONST_INTs only; | |
2148 | otherwise the mode of X is used. | |
2149 | ||
0516f6fe | 2150 | Store 1 in DO_NOT_RECORD_P if any subexpression is volatile. |
7afe21cc | 2151 | |
0516f6fe SB |
2152 | If HASH_ARG_IN_MEMORY_P is not NULL, store 1 in it if X contains |
2153 | a MEM rtx which does not have the RTX_UNCHANGING_P bit set. | |
7afe21cc RK |
2154 | |
2155 | Note that cse_insn knows that the hash code of a MEM expression | |
2156 | is just (int) MEM plus the hash code of the address. */ | |
2157 | ||
0516f6fe SB |
2158 | unsigned |
2159 | hash_rtx (rtx x, enum machine_mode mode, int *do_not_record_p, | |
2160 | int *hash_arg_in_memory_p, bool have_reg_qty) | |
7afe21cc | 2161 | { |
b3694847 SS |
2162 | int i, j; |
2163 | unsigned hash = 0; | |
2164 | enum rtx_code code; | |
2165 | const char *fmt; | |
7afe21cc | 2166 | |
0516f6fe SB |
2167 | /* Used to turn recursion into iteration. We can't rely on GCC's |
2168 | tail-recursion elimination since we need to keep accumulating values | |
2169 | in HASH. */ | |
7afe21cc RK |
2170 | repeat: |
2171 | if (x == 0) | |
2172 | return hash; | |
2173 | ||
2174 | code = GET_CODE (x); | |
2175 | switch (code) | |
2176 | { | |
2177 | case REG: | |
2178 | { | |
770ae6cc | 2179 | unsigned int regno = REGNO (x); |
7afe21cc | 2180 | |
0516f6fe | 2181 | if (!reload_completed) |
7afe21cc | 2182 | { |
0516f6fe SB |
2183 | /* On some machines, we can't record any non-fixed hard register, |
2184 | because extending its life will cause reload problems. We | |
2185 | consider ap, fp, sp, gp to be fixed for this purpose. | |
2186 | ||
2187 | We also consider CCmode registers to be fixed for this purpose; | |
2188 | failure to do so leads to failure to simplify 0<100 type of | |
2189 | conditionals. | |
2190 | ||
2191 | On all machines, we can't record any global registers. | |
2192 | Nor should we record any register that is in a small | |
2193 | class, as defined by CLASS_LIKELY_SPILLED_P. */ | |
2194 | bool record; | |
2195 | ||
2196 | if (regno >= FIRST_PSEUDO_REGISTER) | |
2197 | record = true; | |
2198 | else if (x == frame_pointer_rtx | |
2199 | || x == hard_frame_pointer_rtx | |
2200 | || x == arg_pointer_rtx | |
2201 | || x == stack_pointer_rtx | |
2202 | || x == pic_offset_table_rtx) | |
2203 | record = true; | |
2204 | else if (global_regs[regno]) | |
2205 | record = false; | |
2206 | else if (fixed_regs[regno]) | |
2207 | record = true; | |
2208 | else if (GET_MODE_CLASS (GET_MODE (x)) == MODE_CC) | |
2209 | record = true; | |
2210 | else if (SMALL_REGISTER_CLASSES) | |
2211 | record = false; | |
2212 | else if (CLASS_LIKELY_SPILLED_P (REGNO_REG_CLASS (regno))) | |
2213 | record = false; | |
2214 | else | |
2215 | record = true; | |
2216 | ||
2217 | if (!record) | |
2218 | { | |
2219 | *do_not_record_p = 1; | |
2220 | return 0; | |
2221 | } | |
7afe21cc | 2222 | } |
770ae6cc | 2223 | |
0516f6fe SB |
2224 | hash += ((unsigned int) REG << 7); |
2225 | hash += (have_reg_qty ? (unsigned) REG_QTY (regno) : regno); | |
2197a88a | 2226 | return hash; |
7afe21cc RK |
2227 | } |
2228 | ||
34c73909 R |
2229 | /* We handle SUBREG of a REG specially because the underlying |
2230 | reg changes its hash value with every value change; we don't | |
2231 | want to have to forget unrelated subregs when one subreg changes. */ | |
2232 | case SUBREG: | |
2233 | { | |
f8cfc6aa | 2234 | if (REG_P (SUBREG_REG (x))) |
34c73909 | 2235 | { |
0516f6fe | 2236 | hash += (((unsigned int) SUBREG << 7) |
ddef6bc7 JJ |
2237 | + REGNO (SUBREG_REG (x)) |
2238 | + (SUBREG_BYTE (x) / UNITS_PER_WORD)); | |
34c73909 R |
2239 | return hash; |
2240 | } | |
2241 | break; | |
2242 | } | |
2243 | ||
7afe21cc | 2244 | case CONST_INT: |
0516f6fe SB |
2245 | hash += (((unsigned int) CONST_INT << 7) + (unsigned int) mode |
2246 | + (unsigned int) INTVAL (x)); | |
2247 | return hash; | |
7afe21cc RK |
2248 | |
2249 | case CONST_DOUBLE: | |
2250 | /* This is like the general case, except that it only counts | |
2251 | the integers representing the constant. */ | |
0516f6fe | 2252 | hash += (unsigned int) code + (unsigned int) GET_MODE (x); |
969c8517 | 2253 | if (GET_MODE (x) != VOIDmode) |
46b33600 | 2254 | hash += real_hash (CONST_DOUBLE_REAL_VALUE (x)); |
969c8517 | 2255 | else |
0516f6fe SB |
2256 | hash += ((unsigned int) CONST_DOUBLE_LOW (x) |
2257 | + (unsigned int) CONST_DOUBLE_HIGH (x)); | |
7afe21cc RK |
2258 | return hash; |
2259 | ||
69ef87e2 AH |
2260 | case CONST_VECTOR: |
2261 | { | |
2262 | int units; | |
2263 | rtx elt; | |
2264 | ||
2265 | units = CONST_VECTOR_NUNITS (x); | |
2266 | ||
2267 | for (i = 0; i < units; ++i) | |
2268 | { | |
2269 | elt = CONST_VECTOR_ELT (x, i); | |
0516f6fe SB |
2270 | hash += hash_rtx (elt, GET_MODE (elt), do_not_record_p, |
2271 | hash_arg_in_memory_p, have_reg_qty); | |
69ef87e2 AH |
2272 | } |
2273 | ||
2274 | return hash; | |
2275 | } | |
2276 | ||
7afe21cc RK |
2277 | /* Assume there is only one rtx object for any given label. */ |
2278 | case LABEL_REF: | |
0516f6fe SB |
2279 | /* We don't hash on the address of the CODE_LABEL to avoid bootstrap |
2280 | differences and differences between each stage's debugging dumps. */ | |
2281 | hash += (((unsigned int) LABEL_REF << 7) | |
2282 | + CODE_LABEL_NUMBER (XEXP (x, 0))); | |
2197a88a | 2283 | return hash; |
7afe21cc RK |
2284 | |
2285 | case SYMBOL_REF: | |
0516f6fe SB |
2286 | { |
2287 | /* Don't hash on the symbol's address to avoid bootstrap differences. | |
2288 | Different hash values may cause expressions to be recorded in | |
2289 | different orders and thus different registers to be used in the | |
2290 | final assembler. This also avoids differences in the dump files | |
2291 | between various stages. */ | |
2292 | unsigned int h = 0; | |
2293 | const unsigned char *p = (const unsigned char *) XSTR (x, 0); | |
2294 | ||
2295 | while (*p) | |
2296 | h += (h << 7) + *p++; /* ??? revisit */ | |
2297 | ||
2298 | hash += ((unsigned int) SYMBOL_REF << 7) + h; | |
2299 | return hash; | |
2300 | } | |
7afe21cc RK |
2301 | |
2302 | case MEM: | |
14a774a9 RK |
2303 | /* We don't record if marked volatile or if BLKmode since we don't |
2304 | know the size of the move. */ | |
2305 | if (MEM_VOLATILE_P (x) || GET_MODE (x) == BLKmode) | |
7afe21cc | 2306 | { |
0516f6fe | 2307 | *do_not_record_p = 1; |
7afe21cc RK |
2308 | return 0; |
2309 | } | |
0516f6fe SB |
2310 | if (hash_arg_in_memory_p && !MEM_READONLY_P (x)) |
2311 | *hash_arg_in_memory_p = 1; | |
4977bab6 | 2312 | |
7afe21cc RK |
2313 | /* Now that we have already found this special case, |
2314 | might as well speed it up as much as possible. */ | |
2197a88a | 2315 | hash += (unsigned) MEM; |
7afe21cc RK |
2316 | x = XEXP (x, 0); |
2317 | goto repeat; | |
2318 | ||
bb07060a JW |
2319 | case USE: |
2320 | /* A USE that mentions non-volatile memory needs special | |
2321 | handling since the MEM may be BLKmode which normally | |
2322 | prevents an entry from being made. Pure calls are | |
0516f6fe SB |
2323 | marked by a USE which mentions BLKmode memory. |
2324 | See calls.c:emit_call_1. */ | |
3c0cb5de | 2325 | if (MEM_P (XEXP (x, 0)) |
bb07060a JW |
2326 | && ! MEM_VOLATILE_P (XEXP (x, 0))) |
2327 | { | |
68252e27 | 2328 | hash += (unsigned) USE; |
bb07060a JW |
2329 | x = XEXP (x, 0); |
2330 | ||
0516f6fe SB |
2331 | if (hash_arg_in_memory_p && !MEM_READONLY_P (x)) |
2332 | *hash_arg_in_memory_p = 1; | |
bb07060a JW |
2333 | |
2334 | /* Now that we have already found this special case, | |
2335 | might as well speed it up as much as possible. */ | |
2336 | hash += (unsigned) MEM; | |
2337 | x = XEXP (x, 0); | |
2338 | goto repeat; | |
2339 | } | |
2340 | break; | |
2341 | ||
7afe21cc RK |
2342 | case PRE_DEC: |
2343 | case PRE_INC: | |
2344 | case POST_DEC: | |
2345 | case POST_INC: | |
4b983fdc RH |
2346 | case PRE_MODIFY: |
2347 | case POST_MODIFY: | |
7afe21cc RK |
2348 | case PC: |
2349 | case CC0: | |
2350 | case CALL: | |
2351 | case UNSPEC_VOLATILE: | |
0516f6fe | 2352 | *do_not_record_p = 1; |
7afe21cc RK |
2353 | return 0; |
2354 | ||
2355 | case ASM_OPERANDS: | |
2356 | if (MEM_VOLATILE_P (x)) | |
2357 | { | |
0516f6fe | 2358 | *do_not_record_p = 1; |
7afe21cc RK |
2359 | return 0; |
2360 | } | |
6462bb43 AO |
2361 | else |
2362 | { | |
2363 | /* We don't want to take the filename and line into account. */ | |
2364 | hash += (unsigned) code + (unsigned) GET_MODE (x) | |
0516f6fe SB |
2365 | + hash_rtx_string (ASM_OPERANDS_TEMPLATE (x)) |
2366 | + hash_rtx_string (ASM_OPERANDS_OUTPUT_CONSTRAINT (x)) | |
6462bb43 AO |
2367 | + (unsigned) ASM_OPERANDS_OUTPUT_IDX (x); |
2368 | ||
2369 | if (ASM_OPERANDS_INPUT_LENGTH (x)) | |
2370 | { | |
2371 | for (i = 1; i < ASM_OPERANDS_INPUT_LENGTH (x); i++) | |
2372 | { | |
0516f6fe SB |
2373 | hash += (hash_rtx (ASM_OPERANDS_INPUT (x, i), |
2374 | GET_MODE (ASM_OPERANDS_INPUT (x, i)), | |
2375 | do_not_record_p, hash_arg_in_memory_p, | |
2376 | have_reg_qty) | |
2377 | + hash_rtx_string | |
2378 | (ASM_OPERANDS_INPUT_CONSTRAINT (x, i))); | |
6462bb43 AO |
2379 | } |
2380 | ||
0516f6fe | 2381 | hash += hash_rtx_string (ASM_OPERANDS_INPUT_CONSTRAINT (x, 0)); |
6462bb43 AO |
2382 | x = ASM_OPERANDS_INPUT (x, 0); |
2383 | mode = GET_MODE (x); | |
2384 | goto repeat; | |
2385 | } | |
2386 | ||
2387 | return hash; | |
2388 | } | |
e9a25f70 | 2389 | break; |
278a83b2 | 2390 | |
e9a25f70 JL |
2391 | default: |
2392 | break; | |
7afe21cc RK |
2393 | } |
2394 | ||
2395 | i = GET_RTX_LENGTH (code) - 1; | |
2197a88a | 2396 | hash += (unsigned) code + (unsigned) GET_MODE (x); |
7afe21cc RK |
2397 | fmt = GET_RTX_FORMAT (code); |
2398 | for (; i >= 0; i--) | |
2399 | { | |
341c100f | 2400 | switch (fmt[i]) |
7afe21cc | 2401 | { |
341c100f | 2402 | case 'e': |
7afe21cc RK |
2403 | /* If we are about to do the last recursive call |
2404 | needed at this level, change it into iteration. | |
2405 | This function is called enough to be worth it. */ | |
2406 | if (i == 0) | |
2407 | { | |
0516f6fe | 2408 | x = XEXP (x, i); |
7afe21cc RK |
2409 | goto repeat; |
2410 | } | |
0516f6fe SB |
2411 | |
2412 | hash += hash_rtx (XEXP (x, i), 0, do_not_record_p, | |
2413 | hash_arg_in_memory_p, have_reg_qty); | |
341c100f | 2414 | break; |
0516f6fe | 2415 | |
341c100f NS |
2416 | case 'E': |
2417 | for (j = 0; j < XVECLEN (x, i); j++) | |
0516f6fe SB |
2418 | hash += hash_rtx (XVECEXP (x, i, j), 0, do_not_record_p, |
2419 | hash_arg_in_memory_p, have_reg_qty); | |
341c100f | 2420 | break; |
0516f6fe | 2421 | |
341c100f NS |
2422 | case 's': |
2423 | hash += hash_rtx_string (XSTR (x, i)); | |
2424 | break; | |
2425 | ||
2426 | case 'i': | |
2427 | hash += (unsigned int) XINT (x, i); | |
2428 | break; | |
2429 | ||
2430 | case '0': case 't': | |
2431 | /* Unused. */ | |
2432 | break; | |
2433 | ||
2434 | default: | |
2435 | gcc_unreachable (); | |
2436 | } | |
7afe21cc | 2437 | } |
0516f6fe | 2438 | |
7afe21cc RK |
2439 | return hash; |
2440 | } | |
2441 | ||
0516f6fe SB |
2442 | /* Hash an rtx X for cse via hash_rtx. |
2443 | Stores 1 in do_not_record if any subexpression is volatile. | |
2444 | Stores 1 in hash_arg_in_memory if X contains a mem rtx which | |
2445 | does not have the RTX_UNCHANGING_P bit set. */ | |
2446 | ||
2447 | static inline unsigned | |
2448 | canon_hash (rtx x, enum machine_mode mode) | |
2449 | { | |
2450 | return hash_rtx (x, mode, &do_not_record, &hash_arg_in_memory, true); | |
2451 | } | |
2452 | ||
2453 | /* Like canon_hash but with no side effects, i.e. do_not_record | |
2454 | and hash_arg_in_memory are not changed. */ | |
7afe21cc | 2455 | |
0516f6fe | 2456 | static inline unsigned |
7080f735 | 2457 | safe_hash (rtx x, enum machine_mode mode) |
7afe21cc | 2458 | { |
0516f6fe SB |
2459 | int dummy_do_not_record; |
2460 | return hash_rtx (x, mode, &dummy_do_not_record, NULL, true); | |
7afe21cc RK |
2461 | } |
2462 | \f | |
2463 | /* Return 1 iff X and Y would canonicalize into the same thing, | |
2464 | without actually constructing the canonicalization of either one. | |
2465 | If VALIDATE is nonzero, | |
2466 | we assume X is an expression being processed from the rtl | |
2467 | and Y was found in the hash table. We check register refs | |
2468 | in Y for being marked as valid. | |
2469 | ||
0516f6fe | 2470 | If FOR_GCSE is true, we compare X and Y for equivalence for GCSE. */ |
7afe21cc | 2471 | |
0516f6fe SB |
2472 | int |
2473 | exp_equiv_p (rtx x, rtx y, int validate, bool for_gcse) | |
7afe21cc | 2474 | { |
b3694847 SS |
2475 | int i, j; |
2476 | enum rtx_code code; | |
2477 | const char *fmt; | |
7afe21cc RK |
2478 | |
2479 | /* Note: it is incorrect to assume an expression is equivalent to itself | |
2480 | if VALIDATE is nonzero. */ | |
2481 | if (x == y && !validate) | |
2482 | return 1; | |
0516f6fe | 2483 | |
7afe21cc RK |
2484 | if (x == 0 || y == 0) |
2485 | return x == y; | |
2486 | ||
2487 | code = GET_CODE (x); | |
2488 | if (code != GET_CODE (y)) | |
0516f6fe | 2489 | return 0; |
7afe21cc RK |
2490 | |
2491 | /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */ | |
2492 | if (GET_MODE (x) != GET_MODE (y)) | |
2493 | return 0; | |
2494 | ||
2495 | switch (code) | |
2496 | { | |
2497 | case PC: | |
2498 | case CC0: | |
7afe21cc | 2499 | case CONST_INT: |
c13e8210 | 2500 | return x == y; |
7afe21cc RK |
2501 | |
2502 | case LABEL_REF: | |
7afe21cc RK |
2503 | return XEXP (x, 0) == XEXP (y, 0); |
2504 | ||
f54d4924 RK |
2505 | case SYMBOL_REF: |
2506 | return XSTR (x, 0) == XSTR (y, 0); | |
2507 | ||
7afe21cc | 2508 | case REG: |
0516f6fe SB |
2509 | if (for_gcse) |
2510 | return REGNO (x) == REGNO (y); | |
2511 | else | |
2512 | { | |
2513 | unsigned int regno = REGNO (y); | |
2514 | unsigned int i; | |
2515 | unsigned int endregno | |
2516 | = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1 | |
2517 | : hard_regno_nregs[regno][GET_MODE (y)]); | |
7afe21cc | 2518 | |
0516f6fe SB |
2519 | /* If the quantities are not the same, the expressions are not |
2520 | equivalent. If there are and we are not to validate, they | |
2521 | are equivalent. Otherwise, ensure all regs are up-to-date. */ | |
7afe21cc | 2522 | |
0516f6fe SB |
2523 | if (REG_QTY (REGNO (x)) != REG_QTY (regno)) |
2524 | return 0; | |
2525 | ||
2526 | if (! validate) | |
2527 | return 1; | |
2528 | ||
2529 | for (i = regno; i < endregno; i++) | |
2530 | if (REG_IN_TABLE (i) != REG_TICK (i)) | |
2531 | return 0; | |
7afe21cc | 2532 | |
7afe21cc | 2533 | return 1; |
0516f6fe | 2534 | } |
7afe21cc | 2535 | |
0516f6fe SB |
2536 | case MEM: |
2537 | if (for_gcse) | |
2538 | { | |
2539 | /* Can't merge two expressions in different alias sets, since we | |
2540 | can decide that the expression is transparent in a block when | |
2541 | it isn't, due to it being set with the different alias set. */ | |
2542 | if (MEM_ALIAS_SET (x) != MEM_ALIAS_SET (y)) | |
7afe21cc RK |
2543 | return 0; |
2544 | ||
0516f6fe SB |
2545 | /* A volatile mem should not be considered equivalent to any |
2546 | other. */ | |
2547 | if (MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y)) | |
2548 | return 0; | |
2549 | } | |
2550 | break; | |
7afe21cc RK |
2551 | |
2552 | /* For commutative operations, check both orders. */ | |
2553 | case PLUS: | |
2554 | case MULT: | |
2555 | case AND: | |
2556 | case IOR: | |
2557 | case XOR: | |
2558 | case NE: | |
2559 | case EQ: | |
0516f6fe SB |
2560 | return ((exp_equiv_p (XEXP (x, 0), XEXP (y, 0), |
2561 | validate, for_gcse) | |
7afe21cc | 2562 | && exp_equiv_p (XEXP (x, 1), XEXP (y, 1), |
0516f6fe | 2563 | validate, for_gcse)) |
7afe21cc | 2564 | || (exp_equiv_p (XEXP (x, 0), XEXP (y, 1), |
0516f6fe | 2565 | validate, for_gcse) |
7afe21cc | 2566 | && exp_equiv_p (XEXP (x, 1), XEXP (y, 0), |
0516f6fe | 2567 | validate, for_gcse))); |
278a83b2 | 2568 | |
6462bb43 AO |
2569 | case ASM_OPERANDS: |
2570 | /* We don't use the generic code below because we want to | |
2571 | disregard filename and line numbers. */ | |
2572 | ||
2573 | /* A volatile asm isn't equivalent to any other. */ | |
2574 | if (MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y)) | |
2575 | return 0; | |
2576 | ||
2577 | if (GET_MODE (x) != GET_MODE (y) | |
2578 | || strcmp (ASM_OPERANDS_TEMPLATE (x), ASM_OPERANDS_TEMPLATE (y)) | |
2579 | || strcmp (ASM_OPERANDS_OUTPUT_CONSTRAINT (x), | |
2580 | ASM_OPERANDS_OUTPUT_CONSTRAINT (y)) | |
2581 | || ASM_OPERANDS_OUTPUT_IDX (x) != ASM_OPERANDS_OUTPUT_IDX (y) | |
2582 | || ASM_OPERANDS_INPUT_LENGTH (x) != ASM_OPERANDS_INPUT_LENGTH (y)) | |
2583 | return 0; | |
2584 | ||
2585 | if (ASM_OPERANDS_INPUT_LENGTH (x)) | |
2586 | { | |
2587 | for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--) | |
2588 | if (! exp_equiv_p (ASM_OPERANDS_INPUT (x, i), | |
2589 | ASM_OPERANDS_INPUT (y, i), | |
0516f6fe | 2590 | validate, for_gcse) |
6462bb43 AO |
2591 | || strcmp (ASM_OPERANDS_INPUT_CONSTRAINT (x, i), |
2592 | ASM_OPERANDS_INPUT_CONSTRAINT (y, i))) | |
2593 | return 0; | |
2594 | } | |
2595 | ||
2596 | return 1; | |
2597 | ||
e9a25f70 JL |
2598 | default: |
2599 | break; | |
7afe21cc RK |
2600 | } |
2601 | ||
2602 | /* Compare the elements. If any pair of corresponding elements | |
0516f6fe | 2603 | fail to match, return 0 for the whole thing. */ |
7afe21cc RK |
2604 | |
2605 | fmt = GET_RTX_FORMAT (code); | |
2606 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
2607 | { | |
906c4e36 | 2608 | switch (fmt[i]) |
7afe21cc | 2609 | { |
906c4e36 | 2610 | case 'e': |
0516f6fe SB |
2611 | if (! exp_equiv_p (XEXP (x, i), XEXP (y, i), |
2612 | validate, for_gcse)) | |
7afe21cc | 2613 | return 0; |
906c4e36 RK |
2614 | break; |
2615 | ||
2616 | case 'E': | |
7afe21cc RK |
2617 | if (XVECLEN (x, i) != XVECLEN (y, i)) |
2618 | return 0; | |
2619 | for (j = 0; j < XVECLEN (x, i); j++) | |
2620 | if (! exp_equiv_p (XVECEXP (x, i, j), XVECEXP (y, i, j), | |
0516f6fe | 2621 | validate, for_gcse)) |
7afe21cc | 2622 | return 0; |
906c4e36 RK |
2623 | break; |
2624 | ||
2625 | case 's': | |
7afe21cc RK |
2626 | if (strcmp (XSTR (x, i), XSTR (y, i))) |
2627 | return 0; | |
906c4e36 RK |
2628 | break; |
2629 | ||
2630 | case 'i': | |
7afe21cc RK |
2631 | if (XINT (x, i) != XINT (y, i)) |
2632 | return 0; | |
906c4e36 RK |
2633 | break; |
2634 | ||
2635 | case 'w': | |
2636 | if (XWINT (x, i) != XWINT (y, i)) | |
2637 | return 0; | |
278a83b2 | 2638 | break; |
906c4e36 RK |
2639 | |
2640 | case '0': | |
8f985ec4 | 2641 | case 't': |
906c4e36 RK |
2642 | break; |
2643 | ||
2644 | default: | |
341c100f | 2645 | gcc_unreachable (); |
7afe21cc | 2646 | } |
278a83b2 | 2647 | } |
906c4e36 | 2648 | |
7afe21cc RK |
2649 | return 1; |
2650 | } | |
2651 | \f | |
9ae8ffe7 JL |
2652 | /* Return 1 if X has a value that can vary even between two |
2653 | executions of the program. 0 means X can be compared reliably | |
2654 | against certain constants or near-constants. */ | |
7afe21cc RK |
2655 | |
2656 | static int | |
7080f735 | 2657 | cse_rtx_varies_p (rtx x, int from_alias) |
7afe21cc RK |
2658 | { |
2659 | /* We need not check for X and the equivalence class being of the same | |
2660 | mode because if X is equivalent to a constant in some mode, it | |
2661 | doesn't vary in any mode. */ | |
2662 | ||
f8cfc6aa | 2663 | if (REG_P (x) |
1bb98cec DM |
2664 | && REGNO_QTY_VALID_P (REGNO (x))) |
2665 | { | |
2666 | int x_q = REG_QTY (REGNO (x)); | |
2667 | struct qty_table_elem *x_ent = &qty_table[x_q]; | |
2668 | ||
2669 | if (GET_MODE (x) == x_ent->mode | |
2670 | && x_ent->const_rtx != NULL_RTX) | |
2671 | return 0; | |
2672 | } | |
7afe21cc | 2673 | |
9ae8ffe7 JL |
2674 | if (GET_CODE (x) == PLUS |
2675 | && GET_CODE (XEXP (x, 1)) == CONST_INT | |
f8cfc6aa | 2676 | && REG_P (XEXP (x, 0)) |
1bb98cec DM |
2677 | && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0)))) |
2678 | { | |
2679 | int x0_q = REG_QTY (REGNO (XEXP (x, 0))); | |
2680 | struct qty_table_elem *x0_ent = &qty_table[x0_q]; | |
2681 | ||
2682 | if ((GET_MODE (XEXP (x, 0)) == x0_ent->mode) | |
2683 | && x0_ent->const_rtx != NULL_RTX) | |
2684 | return 0; | |
2685 | } | |
7afe21cc | 2686 | |
9c6b0bae RK |
2687 | /* This can happen as the result of virtual register instantiation, if |
2688 | the initial constant is too large to be a valid address. This gives | |
2689 | us a three instruction sequence, load large offset into a register, | |
2690 | load fp minus a constant into a register, then a MEM which is the | |
2691 | sum of the two `constant' registers. */ | |
9ae8ffe7 | 2692 | if (GET_CODE (x) == PLUS |
f8cfc6aa JQ |
2693 | && REG_P (XEXP (x, 0)) |
2694 | && REG_P (XEXP (x, 1)) | |
9ae8ffe7 | 2695 | && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))) |
1bb98cec DM |
2696 | && REGNO_QTY_VALID_P (REGNO (XEXP (x, 1)))) |
2697 | { | |
2698 | int x0_q = REG_QTY (REGNO (XEXP (x, 0))); | |
2699 | int x1_q = REG_QTY (REGNO (XEXP (x, 1))); | |
2700 | struct qty_table_elem *x0_ent = &qty_table[x0_q]; | |
2701 | struct qty_table_elem *x1_ent = &qty_table[x1_q]; | |
2702 | ||
2703 | if ((GET_MODE (XEXP (x, 0)) == x0_ent->mode) | |
2704 | && x0_ent->const_rtx != NULL_RTX | |
2705 | && (GET_MODE (XEXP (x, 1)) == x1_ent->mode) | |
2706 | && x1_ent->const_rtx != NULL_RTX) | |
2707 | return 0; | |
2708 | } | |
9c6b0bae | 2709 | |
2be28ee2 | 2710 | return rtx_varies_p (x, from_alias); |
7afe21cc RK |
2711 | } |
2712 | \f | |
eef3c949 RS |
2713 | /* Subroutine of canon_reg. Pass *XLOC through canon_reg, and validate |
2714 | the result if necessary. INSN is as for canon_reg. */ | |
2715 | ||
2716 | static void | |
2717 | validate_canon_reg (rtx *xloc, rtx insn) | |
2718 | { | |
2719 | rtx new = canon_reg (*xloc, insn); | |
2720 | int insn_code; | |
2721 | ||
2722 | /* If replacing pseudo with hard reg or vice versa, ensure the | |
2723 | insn remains valid. Likewise if the insn has MATCH_DUPs. */ | |
2724 | if (insn != 0 && new != 0 | |
2725 | && REG_P (new) && REG_P (*xloc) | |
2726 | && (((REGNO (new) < FIRST_PSEUDO_REGISTER) | |
2727 | != (REGNO (*xloc) < FIRST_PSEUDO_REGISTER)) | |
2728 | || GET_MODE (new) != GET_MODE (*xloc) | |
2729 | || (insn_code = recog_memoized (insn)) < 0 | |
2730 | || insn_data[insn_code].n_dups > 0)) | |
2731 | validate_change (insn, xloc, new, 1); | |
2732 | else | |
2733 | *xloc = new; | |
2734 | } | |
2735 | ||
7afe21cc RK |
2736 | /* Canonicalize an expression: |
2737 | replace each register reference inside it | |
2738 | with the "oldest" equivalent register. | |
2739 | ||
da7d8304 | 2740 | If INSN is nonzero and we are replacing a pseudo with a hard register |
7722328e | 2741 | or vice versa, validate_change is used to ensure that INSN remains valid |
da7d8304 | 2742 | after we make our substitution. The calls are made with IN_GROUP nonzero |
7722328e RK |
2743 | so apply_change_group must be called upon the outermost return from this |
2744 | function (unless INSN is zero). The result of apply_change_group can | |
2745 | generally be discarded since the changes we are making are optional. */ | |
7afe21cc RK |
2746 | |
2747 | static rtx | |
7080f735 | 2748 | canon_reg (rtx x, rtx insn) |
7afe21cc | 2749 | { |
b3694847 SS |
2750 | int i; |
2751 | enum rtx_code code; | |
2752 | const char *fmt; | |
7afe21cc RK |
2753 | |
2754 | if (x == 0) | |
2755 | return x; | |
2756 | ||
2757 | code = GET_CODE (x); | |
2758 | switch (code) | |
2759 | { | |
2760 | case PC: | |
2761 | case CC0: | |
2762 | case CONST: | |
2763 | case CONST_INT: | |
2764 | case CONST_DOUBLE: | |
69ef87e2 | 2765 | case CONST_VECTOR: |
7afe21cc RK |
2766 | case SYMBOL_REF: |
2767 | case LABEL_REF: | |
2768 | case ADDR_VEC: | |
2769 | case ADDR_DIFF_VEC: | |
2770 | return x; | |
2771 | ||
2772 | case REG: | |
2773 | { | |
b3694847 SS |
2774 | int first; |
2775 | int q; | |
2776 | struct qty_table_elem *ent; | |
7afe21cc RK |
2777 | |
2778 | /* Never replace a hard reg, because hard regs can appear | |
2779 | in more than one machine mode, and we must preserve the mode | |
2780 | of each occurrence. Also, some hard regs appear in | |
2781 | MEMs that are shared and mustn't be altered. Don't try to | |
2782 | replace any reg that maps to a reg of class NO_REGS. */ | |
2783 | if (REGNO (x) < FIRST_PSEUDO_REGISTER | |
2784 | || ! REGNO_QTY_VALID_P (REGNO (x))) | |
2785 | return x; | |
2786 | ||
278a83b2 | 2787 | q = REG_QTY (REGNO (x)); |
1bb98cec DM |
2788 | ent = &qty_table[q]; |
2789 | first = ent->first_reg; | |
7afe21cc RK |
2790 | return (first >= FIRST_PSEUDO_REGISTER ? regno_reg_rtx[first] |
2791 | : REGNO_REG_CLASS (first) == NO_REGS ? x | |
1bb98cec | 2792 | : gen_rtx_REG (ent->mode, first)); |
7afe21cc | 2793 | } |
278a83b2 | 2794 | |
e9a25f70 JL |
2795 | default: |
2796 | break; | |
7afe21cc RK |
2797 | } |
2798 | ||
2799 | fmt = GET_RTX_FORMAT (code); | |
2800 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
2801 | { | |
b3694847 | 2802 | int j; |
7afe21cc RK |
2803 | |
2804 | if (fmt[i] == 'e') | |
eef3c949 | 2805 | validate_canon_reg (&XEXP (x, i), insn); |
7afe21cc RK |
2806 | else if (fmt[i] == 'E') |
2807 | for (j = 0; j < XVECLEN (x, i); j++) | |
eef3c949 | 2808 | validate_canon_reg (&XVECEXP (x, i, j), insn); |
7afe21cc RK |
2809 | } |
2810 | ||
2811 | return x; | |
2812 | } | |
2813 | \f | |
a2cabb29 | 2814 | /* LOC is a location within INSN that is an operand address (the contents of |
7afe21cc RK |
2815 | a MEM). Find the best equivalent address to use that is valid for this |
2816 | insn. | |
2817 | ||
2818 | On most CISC machines, complicated address modes are costly, and rtx_cost | |
2819 | is a good approximation for that cost. However, most RISC machines have | |
2820 | only a few (usually only one) memory reference formats. If an address is | |
2821 | valid at all, it is often just as cheap as any other address. Hence, for | |
e37135f7 RH |
2822 | RISC machines, we use `address_cost' to compare the costs of various |
2823 | addresses. For two addresses of equal cost, choose the one with the | |
2824 | highest `rtx_cost' value as that has the potential of eliminating the | |
2825 | most insns. For equal costs, we choose the first in the equivalence | |
2826 | class. Note that we ignore the fact that pseudo registers are cheaper than | |
2827 | hard registers here because we would also prefer the pseudo registers. */ | |
7afe21cc | 2828 | |
6cd4575e | 2829 | static void |
7080f735 | 2830 | find_best_addr (rtx insn, rtx *loc, enum machine_mode mode) |
7afe21cc | 2831 | { |
7a87758d | 2832 | struct table_elt *elt; |
7afe21cc | 2833 | rtx addr = *loc; |
7a87758d | 2834 | struct table_elt *p; |
7afe21cc RK |
2835 | int found_better = 1; |
2836 | int save_do_not_record = do_not_record; | |
2837 | int save_hash_arg_in_memory = hash_arg_in_memory; | |
7afe21cc RK |
2838 | int addr_volatile; |
2839 | int regno; | |
2197a88a | 2840 | unsigned hash; |
7afe21cc RK |
2841 | |
2842 | /* Do not try to replace constant addresses or addresses of local and | |
2843 | argument slots. These MEM expressions are made only once and inserted | |
2844 | in many instructions, as well as being used to control symbol table | |
2845 | output. It is not safe to clobber them. | |
2846 | ||
2847 | There are some uncommon cases where the address is already in a register | |
2848 | for some reason, but we cannot take advantage of that because we have | |
2849 | no easy way to unshare the MEM. In addition, looking up all stack | |
2850 | addresses is costly. */ | |
2851 | if ((GET_CODE (addr) == PLUS | |
f8cfc6aa | 2852 | && REG_P (XEXP (addr, 0)) |
7afe21cc RK |
2853 | && GET_CODE (XEXP (addr, 1)) == CONST_INT |
2854 | && (regno = REGNO (XEXP (addr, 0)), | |
8bc169f2 DE |
2855 | regno == FRAME_POINTER_REGNUM || regno == HARD_FRAME_POINTER_REGNUM |
2856 | || regno == ARG_POINTER_REGNUM)) | |
f8cfc6aa | 2857 | || (REG_P (addr) |
8bc169f2 DE |
2858 | && (regno = REGNO (addr), regno == FRAME_POINTER_REGNUM |
2859 | || regno == HARD_FRAME_POINTER_REGNUM | |
2860 | || regno == ARG_POINTER_REGNUM)) | |
7afe21cc RK |
2861 | || CONSTANT_ADDRESS_P (addr)) |
2862 | return; | |
2863 | ||
2864 | /* If this address is not simply a register, try to fold it. This will | |
2865 | sometimes simplify the expression. Many simplifications | |
2866 | will not be valid, but some, usually applying the associative rule, will | |
2867 | be valid and produce better code. */ | |
f8cfc6aa | 2868 | if (!REG_P (addr)) |
8c87f107 | 2869 | { |
21cf294f ZD |
2870 | rtx folded = canon_for_address (fold_rtx (addr, NULL_RTX)); |
2871 | ||
6c667859 AB |
2872 | if (folded != addr) |
2873 | { | |
2874 | int addr_folded_cost = address_cost (folded, mode); | |
2875 | int addr_cost = address_cost (addr, mode); | |
2876 | ||
2877 | if ((addr_folded_cost < addr_cost | |
2878 | || (addr_folded_cost == addr_cost | |
2879 | /* ??? The rtx_cost comparison is left over from an older | |
2880 | version of this code. It is probably no longer helpful.*/ | |
2881 | && (rtx_cost (folded, MEM) > rtx_cost (addr, MEM) | |
2882 | || approx_reg_cost (folded) < approx_reg_cost (addr)))) | |
2883 | && validate_change (insn, loc, folded, 0)) | |
2884 | addr = folded; | |
2885 | } | |
8c87f107 | 2886 | } |
278a83b2 | 2887 | |
42495ca0 RK |
2888 | /* If this address is not in the hash table, we can't look for equivalences |
2889 | of the whole address. Also, ignore if volatile. */ | |
2890 | ||
7afe21cc | 2891 | do_not_record = 0; |
2197a88a | 2892 | hash = HASH (addr, Pmode); |
7afe21cc RK |
2893 | addr_volatile = do_not_record; |
2894 | do_not_record = save_do_not_record; | |
2895 | hash_arg_in_memory = save_hash_arg_in_memory; | |
7afe21cc RK |
2896 | |
2897 | if (addr_volatile) | |
2898 | return; | |
2899 | ||
2197a88a | 2900 | elt = lookup (addr, hash, Pmode); |
7afe21cc | 2901 | |
42495ca0 RK |
2902 | if (elt) |
2903 | { | |
2904 | /* We need to find the best (under the criteria documented above) entry | |
2905 | in the class that is valid. We use the `flag' field to indicate | |
2906 | choices that were invalid and iterate until we can't find a better | |
2907 | one that hasn't already been tried. */ | |
7afe21cc | 2908 | |
42495ca0 RK |
2909 | for (p = elt->first_same_value; p; p = p->next_same_value) |
2910 | p->flag = 0; | |
7afe21cc | 2911 | |
42495ca0 RK |
2912 | while (found_better) |
2913 | { | |
01329426 | 2914 | int best_addr_cost = address_cost (*loc, mode); |
42495ca0 | 2915 | int best_rtx_cost = (elt->cost + 1) >> 1; |
01329426 | 2916 | int exp_cost; |
278a83b2 | 2917 | struct table_elt *best_elt = elt; |
42495ca0 RK |
2918 | |
2919 | found_better = 0; | |
2920 | for (p = elt->first_same_value; p; p = p->next_same_value) | |
2f541799 | 2921 | if (! p->flag) |
42495ca0 | 2922 | { |
f8cfc6aa | 2923 | if ((REG_P (p->exp) |
0516f6fe | 2924 | || exp_equiv_p (p->exp, p->exp, 1, false)) |
01329426 JH |
2925 | && ((exp_cost = address_cost (p->exp, mode)) < best_addr_cost |
2926 | || (exp_cost == best_addr_cost | |
05bd3d41 | 2927 | && ((p->cost + 1) >> 1) > best_rtx_cost))) |
2f541799 MM |
2928 | { |
2929 | found_better = 1; | |
01329426 | 2930 | best_addr_cost = exp_cost; |
2f541799 MM |
2931 | best_rtx_cost = (p->cost + 1) >> 1; |
2932 | best_elt = p; | |
2933 | } | |
42495ca0 | 2934 | } |
7afe21cc | 2935 | |
42495ca0 RK |
2936 | if (found_better) |
2937 | { | |
2938 | if (validate_change (insn, loc, | |
906c4e36 RK |
2939 | canon_reg (copy_rtx (best_elt->exp), |
2940 | NULL_RTX), 0)) | |
42495ca0 RK |
2941 | return; |
2942 | else | |
2943 | best_elt->flag = 1; | |
2944 | } | |
2945 | } | |
2946 | } | |
7afe21cc | 2947 | |
42495ca0 RK |
2948 | /* If the address is a binary operation with the first operand a register |
2949 | and the second a constant, do the same as above, but looking for | |
2950 | equivalences of the register. Then try to simplify before checking for | |
2951 | the best address to use. This catches a few cases: First is when we | |
2952 | have REG+const and the register is another REG+const. We can often merge | |
2953 | the constants and eliminate one insn and one register. It may also be | |
2954 | that a machine has a cheap REG+REG+const. Finally, this improves the | |
2955 | code on the Alpha for unaligned byte stores. */ | |
2956 | ||
2957 | if (flag_expensive_optimizations | |
ec8e098d | 2958 | && ARITHMETIC_P (*loc) |
f8cfc6aa | 2959 | && REG_P (XEXP (*loc, 0))) |
7afe21cc | 2960 | { |
7b9c108f | 2961 | rtx op1 = XEXP (*loc, 1); |
42495ca0 RK |
2962 | |
2963 | do_not_record = 0; | |
2197a88a | 2964 | hash = HASH (XEXP (*loc, 0), Pmode); |
42495ca0 RK |
2965 | do_not_record = save_do_not_record; |
2966 | hash_arg_in_memory = save_hash_arg_in_memory; | |
42495ca0 | 2967 | |
2197a88a | 2968 | elt = lookup (XEXP (*loc, 0), hash, Pmode); |
42495ca0 RK |
2969 | if (elt == 0) |
2970 | return; | |
2971 | ||
2972 | /* We need to find the best (under the criteria documented above) entry | |
2973 | in the class that is valid. We use the `flag' field to indicate | |
2974 | choices that were invalid and iterate until we can't find a better | |
2975 | one that hasn't already been tried. */ | |
7afe21cc | 2976 | |
7afe21cc | 2977 | for (p = elt->first_same_value; p; p = p->next_same_value) |
42495ca0 | 2978 | p->flag = 0; |
7afe21cc | 2979 | |
42495ca0 | 2980 | while (found_better) |
7afe21cc | 2981 | { |
01329426 | 2982 | int best_addr_cost = address_cost (*loc, mode); |
42495ca0 | 2983 | int best_rtx_cost = (COST (*loc) + 1) >> 1; |
278a83b2 | 2984 | struct table_elt *best_elt = elt; |
42495ca0 | 2985 | rtx best_rtx = *loc; |
f6516aee JW |
2986 | int count; |
2987 | ||
2988 | /* This is at worst case an O(n^2) algorithm, so limit our search | |
2989 | to the first 32 elements on the list. This avoids trouble | |
2990 | compiling code with very long basic blocks that can easily | |
0cedb36c JL |
2991 | call simplify_gen_binary so many times that we run out of |
2992 | memory. */ | |
96b0e481 | 2993 | |
0cedb36c JL |
2994 | found_better = 0; |
2995 | for (p = elt->first_same_value, count = 0; | |
2996 | p && count < 32; | |
2997 | p = p->next_same_value, count++) | |
2998 | if (! p->flag | |
f8cfc6aa | 2999 | && (REG_P (p->exp) |
0516f6fe | 3000 | || exp_equiv_p (p->exp, p->exp, 1, false))) |
0cedb36c JL |
3001 | { |
3002 | rtx new = simplify_gen_binary (GET_CODE (*loc), Pmode, | |
7b9c108f | 3003 | p->exp, op1); |
01329426 | 3004 | int new_cost; |
b7ca416f AP |
3005 | |
3006 | /* Get the canonical version of the address so we can accept | |
6c6cfbfd | 3007 | more. */ |
b7ca416f AP |
3008 | new = canon_for_address (new); |
3009 | ||
01329426 | 3010 | new_cost = address_cost (new, mode); |
96b0e481 | 3011 | |
01329426 JH |
3012 | if (new_cost < best_addr_cost |
3013 | || (new_cost == best_addr_cost | |
3014 | && (COST (new) + 1) >> 1 > best_rtx_cost)) | |
0cedb36c JL |
3015 | { |
3016 | found_better = 1; | |
01329426 | 3017 | best_addr_cost = new_cost; |
0cedb36c JL |
3018 | best_rtx_cost = (COST (new) + 1) >> 1; |
3019 | best_elt = p; | |
3020 | best_rtx = new; | |
3021 | } | |
3022 | } | |
96b0e481 | 3023 | |
0cedb36c JL |
3024 | if (found_better) |
3025 | { | |
3026 | if (validate_change (insn, loc, | |
3027 | canon_reg (copy_rtx (best_rtx), | |
3028 | NULL_RTX), 0)) | |
3029 | return; | |
3030 | else | |
3031 | best_elt->flag = 1; | |
3032 | } | |
3033 | } | |
3034 | } | |
96b0e481 RK |
3035 | } |
3036 | \f | |
bca05d20 RK |
3037 | /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison |
3038 | operation (EQ, NE, GT, etc.), follow it back through the hash table and | |
3039 | what values are being compared. | |
1a87eea2 | 3040 | |
bca05d20 RK |
3041 | *PARG1 and *PARG2 are updated to contain the rtx representing the values |
3042 | actually being compared. For example, if *PARG1 was (cc0) and *PARG2 | |
3043 | was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were | |
3044 | compared to produce cc0. | |
a432f20d | 3045 | |
bca05d20 RK |
3046 | The return value is the comparison operator and is either the code of |
3047 | A or the code corresponding to the inverse of the comparison. */ | |
7afe21cc | 3048 | |
0cedb36c | 3049 | static enum rtx_code |
7080f735 AJ |
3050 | find_comparison_args (enum rtx_code code, rtx *parg1, rtx *parg2, |
3051 | enum machine_mode *pmode1, enum machine_mode *pmode2) | |
7afe21cc | 3052 | { |
0cedb36c | 3053 | rtx arg1, arg2; |
1a87eea2 | 3054 | |
0cedb36c | 3055 | arg1 = *parg1, arg2 = *parg2; |
7afe21cc | 3056 | |
0cedb36c | 3057 | /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */ |
7afe21cc | 3058 | |
0cedb36c | 3059 | while (arg2 == CONST0_RTX (GET_MODE (arg1))) |
a432f20d | 3060 | { |
da7d8304 | 3061 | /* Set nonzero when we find something of interest. */ |
0cedb36c JL |
3062 | rtx x = 0; |
3063 | int reverse_code = 0; | |
3064 | struct table_elt *p = 0; | |
6076248a | 3065 | |
0cedb36c JL |
3066 | /* If arg1 is a COMPARE, extract the comparison arguments from it. |
3067 | On machines with CC0, this is the only case that can occur, since | |
3068 | fold_rtx will return the COMPARE or item being compared with zero | |
3069 | when given CC0. */ | |
6076248a | 3070 | |
0cedb36c JL |
3071 | if (GET_CODE (arg1) == COMPARE && arg2 == const0_rtx) |
3072 | x = arg1; | |
6076248a | 3073 | |
0cedb36c JL |
3074 | /* If ARG1 is a comparison operator and CODE is testing for |
3075 | STORE_FLAG_VALUE, get the inner arguments. */ | |
a432f20d | 3076 | |
ec8e098d | 3077 | else if (COMPARISON_P (arg1)) |
7afe21cc | 3078 | { |
efdc7e19 RH |
3079 | #ifdef FLOAT_STORE_FLAG_VALUE |
3080 | REAL_VALUE_TYPE fsfv; | |
3081 | #endif | |
3082 | ||
0cedb36c JL |
3083 | if (code == NE |
3084 | || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT | |
3085 | && code == LT && STORE_FLAG_VALUE == -1) | |
3086 | #ifdef FLOAT_STORE_FLAG_VALUE | |
3087 | || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT | |
efdc7e19 RH |
3088 | && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)), |
3089 | REAL_VALUE_NEGATIVE (fsfv))) | |
7afe21cc | 3090 | #endif |
a432f20d | 3091 | ) |
0cedb36c JL |
3092 | x = arg1; |
3093 | else if (code == EQ | |
3094 | || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT | |
3095 | && code == GE && STORE_FLAG_VALUE == -1) | |
3096 | #ifdef FLOAT_STORE_FLAG_VALUE | |
3097 | || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT | |
efdc7e19 RH |
3098 | && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)), |
3099 | REAL_VALUE_NEGATIVE (fsfv))) | |
0cedb36c JL |
3100 | #endif |
3101 | ) | |
3102 | x = arg1, reverse_code = 1; | |
7afe21cc RK |
3103 | } |
3104 | ||
0cedb36c | 3105 | /* ??? We could also check for |
7afe21cc | 3106 | |
0cedb36c | 3107 | (ne (and (eq (...) (const_int 1))) (const_int 0)) |
7afe21cc | 3108 | |
0cedb36c | 3109 | and related forms, but let's wait until we see them occurring. */ |
7afe21cc | 3110 | |
0cedb36c JL |
3111 | if (x == 0) |
3112 | /* Look up ARG1 in the hash table and see if it has an equivalence | |
3113 | that lets us see what is being compared. */ | |
0516f6fe | 3114 | p = lookup (arg1, SAFE_HASH (arg1, GET_MODE (arg1)), GET_MODE (arg1)); |
278a83b2 | 3115 | if (p) |
8b03b984 R |
3116 | { |
3117 | p = p->first_same_value; | |
3118 | ||
3119 | /* If what we compare is already known to be constant, that is as | |
3120 | good as it gets. | |
3121 | We need to break the loop in this case, because otherwise we | |
3122 | can have an infinite loop when looking at a reg that is known | |
3123 | to be a constant which is the same as a comparison of a reg | |
3124 | against zero which appears later in the insn stream, which in | |
3125 | turn is constant and the same as the comparison of the first reg | |
3126 | against zero... */ | |
3127 | if (p->is_const) | |
3128 | break; | |
3129 | } | |
7afe21cc | 3130 | |
0cedb36c | 3131 | for (; p; p = p->next_same_value) |
7afe21cc | 3132 | { |
0cedb36c | 3133 | enum machine_mode inner_mode = GET_MODE (p->exp); |
efdc7e19 RH |
3134 | #ifdef FLOAT_STORE_FLAG_VALUE |
3135 | REAL_VALUE_TYPE fsfv; | |
3136 | #endif | |
7afe21cc | 3137 | |
0cedb36c | 3138 | /* If the entry isn't valid, skip it. */ |
0516f6fe | 3139 | if (! exp_equiv_p (p->exp, p->exp, 1, false)) |
0cedb36c | 3140 | continue; |
f76b9db2 | 3141 | |
bca05d20 RK |
3142 | if (GET_CODE (p->exp) == COMPARE |
3143 | /* Another possibility is that this machine has a compare insn | |
3144 | that includes the comparison code. In that case, ARG1 would | |
3145 | be equivalent to a comparison operation that would set ARG1 to | |
3146 | either STORE_FLAG_VALUE or zero. If this is an NE operation, | |
3147 | ORIG_CODE is the actual comparison being done; if it is an EQ, | |
3148 | we must reverse ORIG_CODE. On machine with a negative value | |
3149 | for STORE_FLAG_VALUE, also look at LT and GE operations. */ | |
3150 | || ((code == NE | |
3151 | || (code == LT | |
3152 | && GET_MODE_CLASS (inner_mode) == MODE_INT | |
3153 | && (GET_MODE_BITSIZE (inner_mode) | |
3154 | <= HOST_BITS_PER_WIDE_INT) | |
3155 | && (STORE_FLAG_VALUE | |
3156 | & ((HOST_WIDE_INT) 1 | |
3157 | << (GET_MODE_BITSIZE (inner_mode) - 1)))) | |
0cedb36c | 3158 | #ifdef FLOAT_STORE_FLAG_VALUE |
bca05d20 RK |
3159 | || (code == LT |
3160 | && GET_MODE_CLASS (inner_mode) == MODE_FLOAT | |
efdc7e19 RH |
3161 | && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)), |
3162 | REAL_VALUE_NEGATIVE (fsfv))) | |
0cedb36c | 3163 | #endif |
bca05d20 | 3164 | ) |
ec8e098d | 3165 | && COMPARISON_P (p->exp))) |
7afe21cc | 3166 | { |
0cedb36c JL |
3167 | x = p->exp; |
3168 | break; | |
3169 | } | |
3170 | else if ((code == EQ | |
3171 | || (code == GE | |
3172 | && GET_MODE_CLASS (inner_mode) == MODE_INT | |
3173 | && (GET_MODE_BITSIZE (inner_mode) | |
3174 | <= HOST_BITS_PER_WIDE_INT) | |
3175 | && (STORE_FLAG_VALUE | |
3176 | & ((HOST_WIDE_INT) 1 | |
3177 | << (GET_MODE_BITSIZE (inner_mode) - 1)))) | |
3178 | #ifdef FLOAT_STORE_FLAG_VALUE | |
3179 | || (code == GE | |
3180 | && GET_MODE_CLASS (inner_mode) == MODE_FLOAT | |
efdc7e19 RH |
3181 | && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)), |
3182 | REAL_VALUE_NEGATIVE (fsfv))) | |
0cedb36c JL |
3183 | #endif |
3184 | ) | |
ec8e098d | 3185 | && COMPARISON_P (p->exp)) |
0cedb36c JL |
3186 | { |
3187 | reverse_code = 1; | |
3188 | x = p->exp; | |
3189 | break; | |
7afe21cc RK |
3190 | } |
3191 | ||
4977bab6 ZW |
3192 | /* If this non-trapping address, e.g. fp + constant, the |
3193 | equivalent is a better operand since it may let us predict | |
3194 | the value of the comparison. */ | |
3195 | else if (!rtx_addr_can_trap_p (p->exp)) | |
0cedb36c JL |
3196 | { |
3197 | arg1 = p->exp; | |
3198 | continue; | |
3199 | } | |
7afe21cc | 3200 | } |
7afe21cc | 3201 | |
0cedb36c JL |
3202 | /* If we didn't find a useful equivalence for ARG1, we are done. |
3203 | Otherwise, set up for the next iteration. */ | |
3204 | if (x == 0) | |
3205 | break; | |
7afe21cc | 3206 | |
78192b09 RH |
3207 | /* If we need to reverse the comparison, make sure that that is |
3208 | possible -- we can't necessarily infer the value of GE from LT | |
3209 | with floating-point operands. */ | |
0cedb36c | 3210 | if (reverse_code) |
261efdef JH |
3211 | { |
3212 | enum rtx_code reversed = reversed_comparison_code (x, NULL_RTX); | |
3213 | if (reversed == UNKNOWN) | |
3214 | break; | |
68252e27 KH |
3215 | else |
3216 | code = reversed; | |
261efdef | 3217 | } |
ec8e098d | 3218 | else if (COMPARISON_P (x)) |
261efdef JH |
3219 | code = GET_CODE (x); |
3220 | arg1 = XEXP (x, 0), arg2 = XEXP (x, 1); | |
7afe21cc RK |
3221 | } |
3222 | ||
0cedb36c JL |
3223 | /* Return our results. Return the modes from before fold_rtx |
3224 | because fold_rtx might produce const_int, and then it's too late. */ | |
3225 | *pmode1 = GET_MODE (arg1), *pmode2 = GET_MODE (arg2); | |
3226 | *parg1 = fold_rtx (arg1, 0), *parg2 = fold_rtx (arg2, 0); | |
3227 | ||
3228 | return code; | |
7afe21cc RK |
3229 | } |
3230 | \f | |
25910ca4 KH |
3231 | /* Fold SUBREG. */ |
3232 | ||
3233 | static rtx | |
3234 | fold_rtx_subreg (rtx x, rtx insn) | |
3235 | { | |
3236 | enum machine_mode mode = GET_MODE (x); | |
3237 | rtx folded_arg0; | |
3238 | rtx const_arg0; | |
3239 | rtx new; | |
3240 | ||
3241 | /* See if we previously assigned a constant value to this SUBREG. */ | |
3242 | if ((new = lookup_as_function (x, CONST_INT)) != 0 | |
3243 | || (new = lookup_as_function (x, CONST_DOUBLE)) != 0) | |
3244 | return new; | |
3245 | ||
3246 | /* If this is a paradoxical SUBREG, we have no idea what value the | |
3247 | extra bits would have. However, if the operand is equivalent to | |
3248 | a SUBREG whose operand is the same as our mode, and all the modes | |
3249 | are within a word, we can just use the inner operand because | |
3250 | these SUBREGs just say how to treat the register. | |
3251 | ||
3252 | Similarly if we find an integer constant. */ | |
3253 | ||
3254 | if (GET_MODE_SIZE (mode) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))) | |
3255 | { | |
3256 | enum machine_mode imode = GET_MODE (SUBREG_REG (x)); | |
3257 | struct table_elt *elt; | |
3258 | ||
3259 | if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD | |
3260 | && GET_MODE_SIZE (imode) <= UNITS_PER_WORD | |
3261 | && (elt = lookup (SUBREG_REG (x), HASH (SUBREG_REG (x), imode), | |
3262 | imode)) != 0) | |
3263 | for (elt = elt->first_same_value; elt; elt = elt->next_same_value) | |
3264 | { | |
3265 | if (CONSTANT_P (elt->exp) | |
3266 | && GET_MODE (elt->exp) == VOIDmode) | |
3267 | return elt->exp; | |
3268 | ||
3269 | if (GET_CODE (elt->exp) == SUBREG | |
3270 | && GET_MODE (SUBREG_REG (elt->exp)) == mode | |
3271 | && exp_equiv_p (elt->exp, elt->exp, 1, false)) | |
3272 | return copy_rtx (SUBREG_REG (elt->exp)); | |
3273 | } | |
3274 | ||
3275 | return x; | |
3276 | } | |
3277 | ||
3278 | /* Fold SUBREG_REG. If it changed, see if we can simplify the | |
3279 | SUBREG. We might be able to if the SUBREG is extracting a single | |
3280 | word in an integral mode or extracting the low part. */ | |
3281 | ||
3282 | folded_arg0 = fold_rtx (SUBREG_REG (x), insn); | |
3283 | const_arg0 = equiv_constant (folded_arg0); | |
3284 | if (const_arg0) | |
3285 | folded_arg0 = const_arg0; | |
3286 | ||
3287 | if (folded_arg0 != SUBREG_REG (x)) | |
3288 | { | |
3289 | new = simplify_subreg (mode, folded_arg0, | |
3290 | GET_MODE (SUBREG_REG (x)), SUBREG_BYTE (x)); | |
3291 | if (new) | |
3292 | return new; | |
3293 | } | |
3294 | ||
3295 | if (REG_P (folded_arg0) | |
3296 | && GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (folded_arg0))) | |
3297 | { | |
3298 | struct table_elt *elt; | |
3299 | ||
3300 | elt = lookup (folded_arg0, | |
3301 | HASH (folded_arg0, GET_MODE (folded_arg0)), | |
3302 | GET_MODE (folded_arg0)); | |
3303 | ||
3304 | if (elt) | |
3305 | elt = elt->first_same_value; | |
3306 | ||
3307 | if (subreg_lowpart_p (x)) | |
3308 | /* If this is a narrowing SUBREG and our operand is a REG, see | |
3309 | if we can find an equivalence for REG that is an arithmetic | |
3310 | operation in a wider mode where both operands are | |
3311 | paradoxical SUBREGs from objects of our result mode. In | |
3312 | that case, we couldn-t report an equivalent value for that | |
3313 | operation, since we don't know what the extra bits will be. | |
3314 | But we can find an equivalence for this SUBREG by folding | |
3315 | that operation in the narrow mode. This allows us to fold | |
3316 | arithmetic in narrow modes when the machine only supports | |
3317 | word-sized arithmetic. | |
3318 | ||
3319 | Also look for a case where we have a SUBREG whose operand | |
3320 | is the same as our result. If both modes are smaller than | |
3321 | a word, we are simply interpreting a register in different | |
3322 | modes and we can use the inner value. */ | |
3323 | ||
3324 | for (; elt; elt = elt->next_same_value) | |
3325 | { | |
3326 | enum rtx_code eltcode = GET_CODE (elt->exp); | |
3327 | ||
3328 | /* Just check for unary and binary operations. */ | |
3329 | if (UNARY_P (elt->exp) | |
3330 | && eltcode != SIGN_EXTEND | |
3331 | && eltcode != ZERO_EXTEND | |
3332 | && GET_CODE (XEXP (elt->exp, 0)) == SUBREG | |
3333 | && GET_MODE (SUBREG_REG (XEXP (elt->exp, 0))) == mode | |
3334 | && (GET_MODE_CLASS (mode) | |
3335 | == GET_MODE_CLASS (GET_MODE (XEXP (elt->exp, 0))))) | |
3336 | { | |
3337 | rtx op0 = SUBREG_REG (XEXP (elt->exp, 0)); | |
3338 | ||
3339 | if (!REG_P (op0) && ! CONSTANT_P (op0)) | |
3340 | op0 = fold_rtx (op0, NULL_RTX); | |
3341 | ||
3342 | op0 = equiv_constant (op0); | |
3343 | if (op0) | |
3344 | new = simplify_unary_operation (GET_CODE (elt->exp), mode, | |
3345 | op0, mode); | |
3346 | } | |
3347 | else if (ARITHMETIC_P (elt->exp) | |
3348 | && eltcode != DIV && eltcode != MOD | |
3349 | && eltcode != UDIV && eltcode != UMOD | |
3350 | && eltcode != ASHIFTRT && eltcode != LSHIFTRT | |
3351 | && eltcode != ROTATE && eltcode != ROTATERT | |
3352 | && ((GET_CODE (XEXP (elt->exp, 0)) == SUBREG | |
3353 | && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 0))) | |
3354 | == mode)) | |
3355 | || CONSTANT_P (XEXP (elt->exp, 0))) | |
3356 | && ((GET_CODE (XEXP (elt->exp, 1)) == SUBREG | |
3357 | && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 1))) | |
3358 | == mode)) | |
3359 | || CONSTANT_P (XEXP (elt->exp, 1)))) | |
3360 | { | |
3361 | rtx op0 = gen_lowpart_common (mode, XEXP (elt->exp, 0)); | |
3362 | rtx op1 = gen_lowpart_common (mode, XEXP (elt->exp, 1)); | |
3363 | ||
3364 | if (op0 && !REG_P (op0) && ! CONSTANT_P (op0)) | |
3365 | op0 = fold_rtx (op0, NULL_RTX); | |
3366 | ||
3367 | if (op0) | |
3368 | op0 = equiv_constant (op0); | |
3369 | ||
3370 | if (op1 && !REG_P (op1) && ! CONSTANT_P (op1)) | |
3371 | op1 = fold_rtx (op1, NULL_RTX); | |
3372 | ||
3373 | if (op1) | |
3374 | op1 = equiv_constant (op1); | |
3375 | ||
3376 | /* If we are looking for the low SImode part of | |
3377 | (ashift:DI c (const_int 32)), it doesn't work to | |
3378 | compute that in SImode, because a 32-bit shift in | |
3379 | SImode is unpredictable. We know the value is | |
3380 | 0. */ | |
3381 | if (op0 && op1 | |
3382 | && GET_CODE (elt->exp) == ASHIFT | |
3383 | && GET_CODE (op1) == CONST_INT | |
3384 | && INTVAL (op1) >= GET_MODE_BITSIZE (mode)) | |
3385 | { | |
3386 | if (INTVAL (op1) | |
3387 | < GET_MODE_BITSIZE (GET_MODE (elt->exp))) | |
3388 | /* If the count fits in the inner mode's width, | |
3389 | but exceeds the outer mode's width, the value | |
3390 | will get truncated to 0 by the subreg. */ | |
3391 | new = CONST0_RTX (mode); | |
3392 | else | |
3393 | /* If the count exceeds even the inner mode's width, | |
3394 | don't fold this expression. */ | |
3395 | new = 0; | |
3396 | } | |
3397 | else if (op0 && op1) | |
3398 | new = simplify_binary_operation (GET_CODE (elt->exp), | |
3399 | mode, op0, op1); | |
3400 | } | |
3401 | ||
3402 | else if (GET_CODE (elt->exp) == SUBREG | |
3403 | && GET_MODE (SUBREG_REG (elt->exp)) == mode | |
3404 | && (GET_MODE_SIZE (GET_MODE (folded_arg0)) | |
3405 | <= UNITS_PER_WORD) | |
3406 | && exp_equiv_p (elt->exp, elt->exp, 1, false)) | |
3407 | new = copy_rtx (SUBREG_REG (elt->exp)); | |
3408 | ||
3409 | if (new) | |
3410 | return new; | |
3411 | } | |
3412 | else | |
3413 | /* A SUBREG resulting from a zero extension may fold to zero | |
3414 | if it extracts higher bits than the ZERO_EXTEND's source | |
3415 | bits. FIXME: if combine tried to, er, combine these | |
3416 | instructions, this transformation may be moved to | |
3417 | simplify_subreg. */ | |
3418 | for (; elt; elt = elt->next_same_value) | |
3419 | { | |
3420 | if (GET_CODE (elt->exp) == ZERO_EXTEND | |
3421 | && subreg_lsb (x) | |
3422 | >= GET_MODE_BITSIZE (GET_MODE (XEXP (elt->exp, 0)))) | |
3423 | return CONST0_RTX (mode); | |
3424 | } | |
3425 | } | |
3426 | ||
3427 | return x; | |
3428 | } | |
3429 | ||
3430 | /* Fold MEM. */ | |
3431 | ||
3432 | static rtx | |
3433 | fold_rtx_mem (rtx x, rtx insn) | |
3434 | { | |
3435 | enum machine_mode mode = GET_MODE (x); | |
3436 | rtx new; | |
3437 | ||
3438 | /* If we are not actually processing an insn, don't try to find the | |
3439 | best address. Not only don't we care, but we could modify the | |
3440 | MEM in an invalid way since we have no insn to validate | |
3441 | against. */ | |
3442 | if (insn != 0) | |
3443 | find_best_addr (insn, &XEXP (x, 0), mode); | |
3444 | ||
3445 | { | |
3446 | /* Even if we don't fold in the insn itself, we can safely do so | |
3447 | here, in hopes of getting a constant. */ | |
3448 | rtx addr = fold_rtx (XEXP (x, 0), NULL_RTX); | |
3449 | rtx base = 0; | |
3450 | HOST_WIDE_INT offset = 0; | |
3451 | ||
3452 | if (REG_P (addr) | |
3453 | && REGNO_QTY_VALID_P (REGNO (addr))) | |
3454 | { | |
3455 | int addr_q = REG_QTY (REGNO (addr)); | |
3456 | struct qty_table_elem *addr_ent = &qty_table[addr_q]; | |
3457 | ||
3458 | if (GET_MODE (addr) == addr_ent->mode | |
3459 | && addr_ent->const_rtx != NULL_RTX) | |
3460 | addr = addr_ent->const_rtx; | |
3461 | } | |
3462 | ||
3463 | /* If address is constant, split it into a base and integer | |
3464 | offset. */ | |
3465 | if (GET_CODE (addr) == SYMBOL_REF || GET_CODE (addr) == LABEL_REF) | |
3466 | base = addr; | |
3467 | else if (GET_CODE (addr) == CONST && GET_CODE (XEXP (addr, 0)) == PLUS | |
3468 | && GET_CODE (XEXP (XEXP (addr, 0), 1)) == CONST_INT) | |
3469 | { | |
3470 | base = XEXP (XEXP (addr, 0), 0); | |
3471 | offset = INTVAL (XEXP (XEXP (addr, 0), 1)); | |
3472 | } | |
3473 | else if (GET_CODE (addr) == LO_SUM | |
3474 | && GET_CODE (XEXP (addr, 1)) == SYMBOL_REF) | |
3475 | base = XEXP (addr, 1); | |
3476 | ||
3477 | /* If this is a constant pool reference, we can fold it into its | |
3478 | constant to allow better value tracking. */ | |
3479 | if (base && GET_CODE (base) == SYMBOL_REF | |
3480 | && CONSTANT_POOL_ADDRESS_P (base)) | |
3481 | { | |
3482 | rtx constant = get_pool_constant (base); | |
3483 | enum machine_mode const_mode = get_pool_mode (base); | |
3484 | rtx new; | |
3485 | ||
3486 | if (CONSTANT_P (constant) && GET_CODE (constant) != CONST_INT) | |
3487 | { | |
3488 | constant_pool_entries_cost = COST (constant); | |
3489 | constant_pool_entries_regcost = approx_reg_cost (constant); | |
3490 | } | |
3491 | ||
3492 | /* If we are loading the full constant, we have an | |
3493 | equivalence. */ | |
3494 | if (offset == 0 && mode == const_mode) | |
3495 | return constant; | |
3496 | ||
3497 | /* If this actually isn't a constant (weird!), we can't do | |
3498 | anything. Otherwise, handle the two most common cases: | |
3499 | extracting a word from a multi-word constant, and | |
3500 | extracting the low-order bits. Other cases don't seem | |
3501 | common enough to worry about. */ | |
3502 | if (! CONSTANT_P (constant)) | |
3503 | return x; | |
3504 | ||
3505 | if (GET_MODE_CLASS (mode) == MODE_INT | |
3506 | && GET_MODE_SIZE (mode) == UNITS_PER_WORD | |
3507 | && offset % UNITS_PER_WORD == 0 | |
3508 | && (new = operand_subword (constant, | |
3509 | offset / UNITS_PER_WORD, | |
3510 | 0, const_mode)) != 0) | |
3511 | return new; | |
3512 | ||
3513 | if (((BYTES_BIG_ENDIAN | |
3514 | && offset == GET_MODE_SIZE (GET_MODE (constant)) - 1) | |
3515 | || (! BYTES_BIG_ENDIAN && offset == 0)) | |
3516 | && (new = gen_lowpart (mode, constant)) != 0) | |
3517 | return new; | |
3518 | } | |
3519 | ||
3520 | /* If this is a reference to a label at a known position in a jump | |
3521 | table, we also know its value. */ | |
3522 | if (base && GET_CODE (base) == LABEL_REF) | |
3523 | { | |
3524 | rtx label = XEXP (base, 0); | |
3525 | rtx table_insn = NEXT_INSN (label); | |
3526 | ||
3527 | if (table_insn && JUMP_P (table_insn) | |
3528 | && GET_CODE (PATTERN (table_insn)) == ADDR_VEC) | |
3529 | { | |
3530 | rtx table = PATTERN (table_insn); | |
3531 | ||
3532 | if (offset >= 0 | |
3533 | && (offset / GET_MODE_SIZE (GET_MODE (table)) | |
3534 | < XVECLEN (table, 0))) | |
3a3b81e7 AO |
3535 | { |
3536 | rtx label = XVECEXP | |
3537 | (table, 0, offset / GET_MODE_SIZE (GET_MODE (table))); | |
3538 | rtx set; | |
3539 | ||
3540 | /* If we have an insn that loads the label from the | |
3541 | jumptable into a reg, we don't want to set the reg | |
3542 | to the label, because this may cause a reference to | |
3543 | the label to remain after the label is removed in | |
3544 | some very obscure cases (PR middle-end/18628). */ | |
3545 | if (!insn) | |
3546 | return label; | |
3547 | ||
3548 | set = single_set (insn); | |
3549 | ||
3550 | if (! set || SET_SRC (set) != x) | |
3551 | return x; | |
3552 | ||
3553 | /* If it's a jump, it's safe to reference the label. */ | |
3554 | if (SET_DEST (set) == pc_rtx) | |
3555 | return label; | |
3556 | ||
3557 | return x; | |
3558 | } | |
25910ca4 KH |
3559 | } |
3560 | if (table_insn && JUMP_P (table_insn) | |
3561 | && GET_CODE (PATTERN (table_insn)) == ADDR_DIFF_VEC) | |
3562 | { | |
3563 | rtx table = PATTERN (table_insn); | |
3564 | ||
3565 | if (offset >= 0 | |
3566 | && (offset / GET_MODE_SIZE (GET_MODE (table)) | |
3567 | < XVECLEN (table, 1))) | |
3568 | { | |
3569 | offset /= GET_MODE_SIZE (GET_MODE (table)); | |
3570 | new = gen_rtx_MINUS (Pmode, XVECEXP (table, 1, offset), | |
3571 | XEXP (table, 0)); | |
3572 | ||
3573 | if (GET_MODE (table) != Pmode) | |
3574 | new = gen_rtx_TRUNCATE (GET_MODE (table), new); | |
3575 | ||
3576 | /* Indicate this is a constant. This isn't a valid | |
3577 | form of CONST, but it will only be used to fold the | |
3578 | next insns and then discarded, so it should be | |
3579 | safe. | |
3580 | ||
3581 | Note this expression must be explicitly discarded, | |
3582 | by cse_insn, else it may end up in a REG_EQUAL note | |
3583 | and "escape" to cause problems elsewhere. */ | |
3584 | return gen_rtx_CONST (GET_MODE (new), new); | |
3585 | } | |
3586 | } | |
3587 | } | |
3588 | ||
3589 | return x; | |
3590 | } | |
3591 | } | |
3592 | ||
7afe21cc RK |
3593 | /* If X is a nontrivial arithmetic operation on an argument |
3594 | for which a constant value can be determined, return | |
3595 | the result of operating on that value, as a constant. | |
3596 | Otherwise, return X, possibly with one or more operands | |
3597 | modified by recursive calls to this function. | |
3598 | ||
e7bb59fa RK |
3599 | If X is a register whose contents are known, we do NOT |
3600 | return those contents here. equiv_constant is called to | |
3601 | perform that task. | |
7afe21cc RK |
3602 | |
3603 | INSN is the insn that we may be modifying. If it is 0, make a copy | |
3604 | of X before modifying it. */ | |
3605 | ||
3606 | static rtx | |
7080f735 | 3607 | fold_rtx (rtx x, rtx insn) |
7afe21cc | 3608 | { |
b3694847 SS |
3609 | enum rtx_code code; |
3610 | enum machine_mode mode; | |
3611 | const char *fmt; | |
3612 | int i; | |
7afe21cc RK |
3613 | rtx new = 0; |
3614 | int copied = 0; | |
3615 | int must_swap = 0; | |
3616 | ||
3617 | /* Folded equivalents of first two operands of X. */ | |
3618 | rtx folded_arg0; | |
3619 | rtx folded_arg1; | |
3620 | ||
3621 | /* Constant equivalents of first three operands of X; | |
3622 | 0 when no such equivalent is known. */ | |
3623 | rtx const_arg0; | |
3624 | rtx const_arg1; | |
3625 | rtx const_arg2; | |
3626 | ||
3627 | /* The mode of the first operand of X. We need this for sign and zero | |
3628 | extends. */ | |
3629 | enum machine_mode mode_arg0; | |
3630 | ||
3631 | if (x == 0) | |
3632 | return x; | |
3633 | ||
3634 | mode = GET_MODE (x); | |
3635 | code = GET_CODE (x); | |
3636 | switch (code) | |
3637 | { | |
3638 | case CONST: | |
3639 | case CONST_INT: | |
3640 | case CONST_DOUBLE: | |
69ef87e2 | 3641 | case CONST_VECTOR: |
7afe21cc RK |
3642 | case SYMBOL_REF: |
3643 | case LABEL_REF: | |
3644 | case REG: | |
01aa1d43 | 3645 | case PC: |
7afe21cc RK |
3646 | /* No use simplifying an EXPR_LIST |
3647 | since they are used only for lists of args | |
3648 | in a function call's REG_EQUAL note. */ | |
3649 | case EXPR_LIST: | |
3650 | return x; | |
3651 | ||
3652 | #ifdef HAVE_cc0 | |
3653 | case CC0: | |
3654 | return prev_insn_cc0; | |
3655 | #endif | |
3656 | ||
7afe21cc | 3657 | case SUBREG: |
25910ca4 | 3658 | return fold_rtx_subreg (x, insn); |
7afe21cc RK |
3659 | |
3660 | case NOT: | |
3661 | case NEG: | |
3662 | /* If we have (NOT Y), see if Y is known to be (NOT Z). | |
3663 | If so, (NOT Y) simplifies to Z. Similarly for NEG. */ | |
3664 | new = lookup_as_function (XEXP (x, 0), code); | |
3665 | if (new) | |
3666 | return fold_rtx (copy_rtx (XEXP (new, 0)), insn); | |
3667 | break; | |
13c9910f | 3668 | |
7afe21cc | 3669 | case MEM: |
25910ca4 | 3670 | return fold_rtx_mem (x, insn); |
9255709c | 3671 | |
a5e5cf67 RH |
3672 | #ifdef NO_FUNCTION_CSE |
3673 | case CALL: | |
3674 | if (CONSTANT_P (XEXP (XEXP (x, 0), 0))) | |
3675 | return x; | |
3676 | break; | |
3677 | #endif | |
3678 | ||
9255709c | 3679 | case ASM_OPERANDS: |
6c667859 AB |
3680 | if (insn) |
3681 | { | |
3682 | for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--) | |
3683 | validate_change (insn, &ASM_OPERANDS_INPUT (x, i), | |
3684 | fold_rtx (ASM_OPERANDS_INPUT (x, i), insn), 0); | |
3685 | } | |
9255709c | 3686 | break; |
278a83b2 | 3687 | |
e9a25f70 JL |
3688 | default: |
3689 | break; | |
7afe21cc RK |
3690 | } |
3691 | ||
3692 | const_arg0 = 0; | |
3693 | const_arg1 = 0; | |
3694 | const_arg2 = 0; | |
3695 | mode_arg0 = VOIDmode; | |
3696 | ||
3697 | /* Try folding our operands. | |
3698 | Then see which ones have constant values known. */ | |
3699 | ||
3700 | fmt = GET_RTX_FORMAT (code); | |
3701 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
3702 | if (fmt[i] == 'e') | |
3703 | { | |
3704 | rtx arg = XEXP (x, i); | |
3705 | rtx folded_arg = arg, const_arg = 0; | |
3706 | enum machine_mode mode_arg = GET_MODE (arg); | |
3707 | rtx cheap_arg, expensive_arg; | |
3708 | rtx replacements[2]; | |
3709 | int j; | |
5b437e0f | 3710 | int old_cost = COST_IN (XEXP (x, i), code); |
7afe21cc RK |
3711 | |
3712 | /* Most arguments are cheap, so handle them specially. */ | |
3713 | switch (GET_CODE (arg)) | |
3714 | { | |
3715 | case REG: | |
3716 | /* This is the same as calling equiv_constant; it is duplicated | |
3717 | here for speed. */ | |
1bb98cec DM |
3718 | if (REGNO_QTY_VALID_P (REGNO (arg))) |
3719 | { | |
3720 | int arg_q = REG_QTY (REGNO (arg)); | |
3721 | struct qty_table_elem *arg_ent = &qty_table[arg_q]; | |
3722 | ||
3723 | if (arg_ent->const_rtx != NULL_RTX | |
f8cfc6aa | 3724 | && !REG_P (arg_ent->const_rtx) |
1bb98cec DM |
3725 | && GET_CODE (arg_ent->const_rtx) != PLUS) |
3726 | const_arg | |
4de249d9 | 3727 | = gen_lowpart (GET_MODE (arg), |
1bb98cec DM |
3728 | arg_ent->const_rtx); |
3729 | } | |
7afe21cc RK |
3730 | break; |
3731 | ||
3732 | case CONST: | |
3733 | case CONST_INT: | |
3734 | case SYMBOL_REF: | |
3735 | case LABEL_REF: | |
3736 | case CONST_DOUBLE: | |
69ef87e2 | 3737 | case CONST_VECTOR: |
7afe21cc RK |
3738 | const_arg = arg; |
3739 | break; | |
3740 | ||
3741 | #ifdef HAVE_cc0 | |
3742 | case CC0: | |
3743 | folded_arg = prev_insn_cc0; | |
3744 | mode_arg = prev_insn_cc0_mode; | |
3745 | const_arg = equiv_constant (folded_arg); | |
3746 | break; | |
3747 | #endif | |
3748 | ||
3749 | default: | |
3750 | folded_arg = fold_rtx (arg, insn); | |
3751 | const_arg = equiv_constant (folded_arg); | |
3752 | } | |
3753 | ||
3754 | /* For the first three operands, see if the operand | |
3755 | is constant or equivalent to a constant. */ | |
3756 | switch (i) | |
3757 | { | |
3758 | case 0: | |
3759 | folded_arg0 = folded_arg; | |
3760 | const_arg0 = const_arg; | |
3761 | mode_arg0 = mode_arg; | |
3762 | break; | |
3763 | case 1: | |
3764 | folded_arg1 = folded_arg; | |
3765 | const_arg1 = const_arg; | |
3766 | break; | |
3767 | case 2: | |
3768 | const_arg2 = const_arg; | |
3769 | break; | |
3770 | } | |
3771 | ||
3772 | /* Pick the least expensive of the folded argument and an | |
3773 | equivalent constant argument. */ | |
3774 | if (const_arg == 0 || const_arg == folded_arg | |
f2fa288f | 3775 | || COST_IN (const_arg, code) > COST_IN (folded_arg, code)) |
7afe21cc RK |
3776 | cheap_arg = folded_arg, expensive_arg = const_arg; |
3777 | else | |
3778 | cheap_arg = const_arg, expensive_arg = folded_arg; | |
3779 | ||
3780 | /* Try to replace the operand with the cheapest of the two | |
3781 | possibilities. If it doesn't work and this is either of the first | |
3782 | two operands of a commutative operation, try swapping them. | |
3783 | If THAT fails, try the more expensive, provided it is cheaper | |
3784 | than what is already there. */ | |
3785 | ||
3786 | if (cheap_arg == XEXP (x, i)) | |
3787 | continue; | |
3788 | ||
3789 | if (insn == 0 && ! copied) | |
3790 | { | |
3791 | x = copy_rtx (x); | |
3792 | copied = 1; | |
3793 | } | |
3794 | ||
f2fa288f RH |
3795 | /* Order the replacements from cheapest to most expensive. */ |
3796 | replacements[0] = cheap_arg; | |
3797 | replacements[1] = expensive_arg; | |
3798 | ||
68252e27 | 3799 | for (j = 0; j < 2 && replacements[j]; j++) |
7afe21cc | 3800 | { |
f2fa288f RH |
3801 | int new_cost = COST_IN (replacements[j], code); |
3802 | ||
3803 | /* Stop if what existed before was cheaper. Prefer constants | |
3804 | in the case of a tie. */ | |
3805 | if (new_cost > old_cost | |
3806 | || (new_cost == old_cost && CONSTANT_P (XEXP (x, i)))) | |
3807 | break; | |
3808 | ||
8cce3d04 RS |
3809 | /* It's not safe to substitute the operand of a conversion |
3810 | operator with a constant, as the conversion's identity | |
f652d14b | 3811 | depends upon the mode of its operand. This optimization |
8cce3d04 RS |
3812 | is handled by the call to simplify_unary_operation. */ |
3813 | if (GET_RTX_CLASS (code) == RTX_UNARY | |
3814 | && GET_MODE (replacements[j]) != mode_arg0 | |
3815 | && (code == ZERO_EXTEND | |
3816 | || code == SIGN_EXTEND | |
3817 | || code == TRUNCATE | |
3818 | || code == FLOAT_TRUNCATE | |
3819 | || code == FLOAT_EXTEND | |
3820 | || code == FLOAT | |
3821 | || code == FIX | |
3822 | || code == UNSIGNED_FLOAT | |
3823 | || code == UNSIGNED_FIX)) | |
3824 | continue; | |
3825 | ||
7afe21cc RK |
3826 | if (validate_change (insn, &XEXP (x, i), replacements[j], 0)) |
3827 | break; | |
3828 | ||
ec8e098d PB |
3829 | if (GET_RTX_CLASS (code) == RTX_COMM_COMPARE |
3830 | || GET_RTX_CLASS (code) == RTX_COMM_ARITH) | |
7afe21cc RK |
3831 | { |
3832 | validate_change (insn, &XEXP (x, i), XEXP (x, 1 - i), 1); | |
3833 | validate_change (insn, &XEXP (x, 1 - i), replacements[j], 1); | |
3834 | ||
3835 | if (apply_change_group ()) | |
3836 | { | |
3837 | /* Swap them back to be invalid so that this loop can | |
3838 | continue and flag them to be swapped back later. */ | |
3839 | rtx tem; | |
3840 | ||
3841 | tem = XEXP (x, 0); XEXP (x, 0) = XEXP (x, 1); | |
3842 | XEXP (x, 1) = tem; | |
3843 | must_swap = 1; | |
3844 | break; | |
3845 | } | |
3846 | } | |
3847 | } | |
3848 | } | |
3849 | ||
2d8b0f3a JL |
3850 | else |
3851 | { | |
3852 | if (fmt[i] == 'E') | |
3853 | /* Don't try to fold inside of a vector of expressions. | |
3854 | Doing nothing is harmless. */ | |
e49a1d2e | 3855 | {;} |
2d8b0f3a | 3856 | } |
7afe21cc RK |
3857 | |
3858 | /* If a commutative operation, place a constant integer as the second | |
3859 | operand unless the first operand is also a constant integer. Otherwise, | |
3860 | place any constant second unless the first operand is also a constant. */ | |
3861 | ||
ec8e098d | 3862 | if (COMMUTATIVE_P (x)) |
7afe21cc | 3863 | { |
c715abdd RS |
3864 | if (must_swap |
3865 | || swap_commutative_operands_p (const_arg0 ? const_arg0 | |
3866 | : XEXP (x, 0), | |
3867 | const_arg1 ? const_arg1 | |
3868 | : XEXP (x, 1))) | |
7afe21cc | 3869 | { |
b3694847 | 3870 | rtx tem = XEXP (x, 0); |
7afe21cc RK |
3871 | |
3872 | if (insn == 0 && ! copied) | |
3873 | { | |
3874 | x = copy_rtx (x); | |
3875 | copied = 1; | |
3876 | } | |
3877 | ||
3878 | validate_change (insn, &XEXP (x, 0), XEXP (x, 1), 1); | |
3879 | validate_change (insn, &XEXP (x, 1), tem, 1); | |
3880 | if (apply_change_group ()) | |
3881 | { | |
3882 | tem = const_arg0, const_arg0 = const_arg1, const_arg1 = tem; | |
3883 | tem = folded_arg0, folded_arg0 = folded_arg1, folded_arg1 = tem; | |
3884 | } | |
3885 | } | |
3886 | } | |
3887 | ||
3888 | /* If X is an arithmetic operation, see if we can simplify it. */ | |
3889 | ||
3890 | switch (GET_RTX_CLASS (code)) | |
3891 | { | |
ec8e098d | 3892 | case RTX_UNARY: |
67a37737 RK |
3893 | { |
3894 | int is_const = 0; | |
3895 | ||
3896 | /* We can't simplify extension ops unless we know the | |
3897 | original mode. */ | |
3898 | if ((code == ZERO_EXTEND || code == SIGN_EXTEND) | |
3899 | && mode_arg0 == VOIDmode) | |
3900 | break; | |
3901 | ||
3902 | /* If we had a CONST, strip it off and put it back later if we | |
3903 | fold. */ | |
3904 | if (const_arg0 != 0 && GET_CODE (const_arg0) == CONST) | |
3905 | is_const = 1, const_arg0 = XEXP (const_arg0, 0); | |
3906 | ||
3907 | new = simplify_unary_operation (code, mode, | |
3908 | const_arg0 ? const_arg0 : folded_arg0, | |
3909 | mode_arg0); | |
ec666d23 JH |
3910 | /* NEG of PLUS could be converted into MINUS, but that causes |
3911 | expressions of the form | |
3912 | (CONST (MINUS (CONST_INT) (SYMBOL_REF))) | |
3913 | which many ports mistakenly treat as LEGITIMATE_CONSTANT_P. | |
3914 | FIXME: those ports should be fixed. */ | |
3915 | if (new != 0 && is_const | |
3916 | && GET_CODE (new) == PLUS | |
3917 | && (GET_CODE (XEXP (new, 0)) == SYMBOL_REF | |
3918 | || GET_CODE (XEXP (new, 0)) == LABEL_REF) | |
3919 | && GET_CODE (XEXP (new, 1)) == CONST_INT) | |
38a448ca | 3920 | new = gen_rtx_CONST (mode, new); |
67a37737 | 3921 | } |
7afe21cc | 3922 | break; |
278a83b2 | 3923 | |
ec8e098d PB |
3924 | case RTX_COMPARE: |
3925 | case RTX_COMM_COMPARE: | |
7afe21cc RK |
3926 | /* See what items are actually being compared and set FOLDED_ARG[01] |
3927 | to those values and CODE to the actual comparison code. If any are | |
3928 | constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't | |
3929 | do anything if both operands are already known to be constant. */ | |
3930 | ||
21e5076a UB |
3931 | /* ??? Vector mode comparisons are not supported yet. */ |
3932 | if (VECTOR_MODE_P (mode)) | |
3933 | break; | |
3934 | ||
7afe21cc RK |
3935 | if (const_arg0 == 0 || const_arg1 == 0) |
3936 | { | |
3937 | struct table_elt *p0, *p1; | |
d6edb99e | 3938 | rtx true_rtx = const_true_rtx, false_rtx = const0_rtx; |
13c9910f | 3939 | enum machine_mode mode_arg1; |
c610adec RK |
3940 | |
3941 | #ifdef FLOAT_STORE_FLAG_VALUE | |
c7c955ee | 3942 | if (GET_MODE_CLASS (mode) == MODE_FLOAT) |
c610adec | 3943 | { |
d6edb99e | 3944 | true_rtx = (CONST_DOUBLE_FROM_REAL_VALUE |
68252e27 | 3945 | (FLOAT_STORE_FLAG_VALUE (mode), mode)); |
d6edb99e | 3946 | false_rtx = CONST0_RTX (mode); |
c610adec RK |
3947 | } |
3948 | #endif | |
7afe21cc | 3949 | |
13c9910f RS |
3950 | code = find_comparison_args (code, &folded_arg0, &folded_arg1, |
3951 | &mode_arg0, &mode_arg1); | |
7afe21cc | 3952 | |
13c9910f RS |
3953 | /* If the mode is VOIDmode or a MODE_CC mode, we don't know |
3954 | what kinds of things are being compared, so we can't do | |
3955 | anything with this comparison. */ | |
7afe21cc RK |
3956 | |
3957 | if (mode_arg0 == VOIDmode || GET_MODE_CLASS (mode_arg0) == MODE_CC) | |
3958 | break; | |
3959 | ||
75335440 KH |
3960 | const_arg0 = equiv_constant (folded_arg0); |
3961 | const_arg1 = equiv_constant (folded_arg1); | |
3962 | ||
0f41302f MS |
3963 | /* If we do not now have two constants being compared, see |
3964 | if we can nevertheless deduce some things about the | |
3965 | comparison. */ | |
7afe21cc RK |
3966 | if (const_arg0 == 0 || const_arg1 == 0) |
3967 | { | |
4977bab6 ZW |
3968 | /* Some addresses are known to be nonzero. We don't know |
3969 | their sign, but equality comparisons are known. */ | |
7afe21cc | 3970 | if (const_arg1 == const0_rtx |
4977bab6 | 3971 | && nonzero_address_p (folded_arg0)) |
7afe21cc RK |
3972 | { |
3973 | if (code == EQ) | |
d6edb99e | 3974 | return false_rtx; |
7afe21cc | 3975 | else if (code == NE) |
d6edb99e | 3976 | return true_rtx; |
7afe21cc RK |
3977 | } |
3978 | ||
fd13313f JH |
3979 | /* See if the two operands are the same. */ |
3980 | ||
3981 | if (folded_arg0 == folded_arg1 | |
f8cfc6aa JQ |
3982 | || (REG_P (folded_arg0) |
3983 | && REG_P (folded_arg1) | |
fd13313f JH |
3984 | && (REG_QTY (REGNO (folded_arg0)) |
3985 | == REG_QTY (REGNO (folded_arg1)))) | |
3986 | || ((p0 = lookup (folded_arg0, | |
0516f6fe SB |
3987 | SAFE_HASH (folded_arg0, mode_arg0), |
3988 | mode_arg0)) | |
fd13313f | 3989 | && (p1 = lookup (folded_arg1, |
0516f6fe SB |
3990 | SAFE_HASH (folded_arg1, mode_arg0), |
3991 | mode_arg0)) | |
fd13313f JH |
3992 | && p0->first_same_value == p1->first_same_value)) |
3993 | { | |
71925bc0 RS |
3994 | /* Sadly two equal NaNs are not equivalent. */ |
3995 | if (!HONOR_NANS (mode_arg0)) | |
3996 | return ((code == EQ || code == LE || code == GE | |
3997 | || code == LEU || code == GEU || code == UNEQ | |
3998 | || code == UNLE || code == UNGE | |
3999 | || code == ORDERED) | |
4000 | ? true_rtx : false_rtx); | |
4001 | /* Take care for the FP compares we can resolve. */ | |
4002 | if (code == UNEQ || code == UNLE || code == UNGE) | |
4003 | return true_rtx; | |
4004 | if (code == LTGT || code == LT || code == GT) | |
4005 | return false_rtx; | |
fd13313f | 4006 | } |
7afe21cc RK |
4007 | |
4008 | /* If FOLDED_ARG0 is a register, see if the comparison we are | |
4009 | doing now is either the same as we did before or the reverse | |
4010 | (we only check the reverse if not floating-point). */ | |
f8cfc6aa | 4011 | else if (REG_P (folded_arg0)) |
7afe21cc | 4012 | { |
30f72379 | 4013 | int qty = REG_QTY (REGNO (folded_arg0)); |
7afe21cc | 4014 | |
1bb98cec DM |
4015 | if (REGNO_QTY_VALID_P (REGNO (folded_arg0))) |
4016 | { | |
4017 | struct qty_table_elem *ent = &qty_table[qty]; | |
4018 | ||
4019 | if ((comparison_dominates_p (ent->comparison_code, code) | |
1eb8759b RH |
4020 | || (! FLOAT_MODE_P (mode_arg0) |
4021 | && comparison_dominates_p (ent->comparison_code, | |
4022 | reverse_condition (code)))) | |
1bb98cec DM |
4023 | && (rtx_equal_p (ent->comparison_const, folded_arg1) |
4024 | || (const_arg1 | |
4025 | && rtx_equal_p (ent->comparison_const, | |
4026 | const_arg1)) | |
f8cfc6aa | 4027 | || (REG_P (folded_arg1) |
1bb98cec DM |
4028 | && (REG_QTY (REGNO (folded_arg1)) == ent->comparison_qty)))) |
4029 | return (comparison_dominates_p (ent->comparison_code, code) | |
d6edb99e | 4030 | ? true_rtx : false_rtx); |
1bb98cec | 4031 | } |
7afe21cc RK |
4032 | } |
4033 | } | |
4034 | } | |
4035 | ||
4036 | /* If we are comparing against zero, see if the first operand is | |
4037 | equivalent to an IOR with a constant. If so, we may be able to | |
4038 | determine the result of this comparison. */ | |
4039 | ||
4040 | if (const_arg1 == const0_rtx) | |
4041 | { | |
4042 | rtx y = lookup_as_function (folded_arg0, IOR); | |
4043 | rtx inner_const; | |
4044 | ||
4045 | if (y != 0 | |
4046 | && (inner_const = equiv_constant (XEXP (y, 1))) != 0 | |
4047 | && GET_CODE (inner_const) == CONST_INT | |
4048 | && INTVAL (inner_const) != 0) | |
4049 | { | |
4050 | int sign_bitnum = GET_MODE_BITSIZE (mode_arg0) - 1; | |
906c4e36 RK |
4051 | int has_sign = (HOST_BITS_PER_WIDE_INT >= sign_bitnum |
4052 | && (INTVAL (inner_const) | |
4053 | & ((HOST_WIDE_INT) 1 << sign_bitnum))); | |
d6edb99e | 4054 | rtx true_rtx = const_true_rtx, false_rtx = const0_rtx; |
c610adec RK |
4055 | |
4056 | #ifdef FLOAT_STORE_FLAG_VALUE | |
c7c955ee | 4057 | if (GET_MODE_CLASS (mode) == MODE_FLOAT) |
c610adec | 4058 | { |
d6edb99e | 4059 | true_rtx = (CONST_DOUBLE_FROM_REAL_VALUE |
12530dbe | 4060 | (FLOAT_STORE_FLAG_VALUE (mode), mode)); |
d6edb99e | 4061 | false_rtx = CONST0_RTX (mode); |
c610adec RK |
4062 | } |
4063 | #endif | |
7afe21cc RK |
4064 | |
4065 | switch (code) | |
4066 | { | |
4067 | case EQ: | |
d6edb99e | 4068 | return false_rtx; |
7afe21cc | 4069 | case NE: |
d6edb99e | 4070 | return true_rtx; |
7afe21cc RK |
4071 | case LT: case LE: |
4072 | if (has_sign) | |
d6edb99e | 4073 | return true_rtx; |
7afe21cc RK |
4074 | break; |
4075 | case GT: case GE: | |
4076 | if (has_sign) | |
d6edb99e | 4077 | return false_rtx; |
7afe21cc | 4078 | break; |
e9a25f70 JL |
4079 | default: |
4080 | break; | |
7afe21cc RK |
4081 | } |
4082 | } | |
4083 | } | |
4084 | ||
c6fb08ad PB |
4085 | { |
4086 | rtx op0 = const_arg0 ? const_arg0 : folded_arg0; | |
4087 | rtx op1 = const_arg1 ? const_arg1 : folded_arg1; | |
4088 | new = simplify_relational_operation (code, mode, mode_arg0, op0, op1); | |
4089 | } | |
7afe21cc RK |
4090 | break; |
4091 | ||
ec8e098d PB |
4092 | case RTX_BIN_ARITH: |
4093 | case RTX_COMM_ARITH: | |
7afe21cc RK |
4094 | switch (code) |
4095 | { | |
4096 | case PLUS: | |
4097 | /* If the second operand is a LABEL_REF, see if the first is a MINUS | |
4098 | with that LABEL_REF as its second operand. If so, the result is | |
4099 | the first operand of that MINUS. This handles switches with an | |
4100 | ADDR_DIFF_VEC table. */ | |
4101 | if (const_arg1 && GET_CODE (const_arg1) == LABEL_REF) | |
4102 | { | |
e650cbda RK |
4103 | rtx y |
4104 | = GET_CODE (folded_arg0) == MINUS ? folded_arg0 | |
ddc356e8 | 4105 | : lookup_as_function (folded_arg0, MINUS); |
7afe21cc RK |
4106 | |
4107 | if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF | |
4108 | && XEXP (XEXP (y, 1), 0) == XEXP (const_arg1, 0)) | |
4109 | return XEXP (y, 0); | |
67a37737 RK |
4110 | |
4111 | /* Now try for a CONST of a MINUS like the above. */ | |
e650cbda RK |
4112 | if ((y = (GET_CODE (folded_arg0) == CONST ? folded_arg0 |
4113 | : lookup_as_function (folded_arg0, CONST))) != 0 | |
67a37737 RK |
4114 | && GET_CODE (XEXP (y, 0)) == MINUS |
4115 | && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF | |
ddc356e8 | 4116 | && XEXP (XEXP (XEXP (y, 0), 1), 0) == XEXP (const_arg1, 0)) |
67a37737 | 4117 | return XEXP (XEXP (y, 0), 0); |
7afe21cc | 4118 | } |
c2cc0778 | 4119 | |
e650cbda RK |
4120 | /* Likewise if the operands are in the other order. */ |
4121 | if (const_arg0 && GET_CODE (const_arg0) == LABEL_REF) | |
4122 | { | |
4123 | rtx y | |
4124 | = GET_CODE (folded_arg1) == MINUS ? folded_arg1 | |
ddc356e8 | 4125 | : lookup_as_function (folded_arg1, MINUS); |
e650cbda RK |
4126 | |
4127 | if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF | |
4128 | && XEXP (XEXP (y, 1), 0) == XEXP (const_arg0, 0)) | |
4129 | return XEXP (y, 0); | |
4130 | ||
4131 | /* Now try for a CONST of a MINUS like the above. */ | |
4132 | if ((y = (GET_CODE (folded_arg1) == CONST ? folded_arg1 | |
4133 | : lookup_as_function (folded_arg1, CONST))) != 0 | |
4134 | && GET_CODE (XEXP (y, 0)) == MINUS | |
4135 | && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF | |
ddc356e8 | 4136 | && XEXP (XEXP (XEXP (y, 0), 1), 0) == XEXP (const_arg0, 0)) |
e650cbda RK |
4137 | return XEXP (XEXP (y, 0), 0); |
4138 | } | |
4139 | ||
c2cc0778 RK |
4140 | /* If second operand is a register equivalent to a negative |
4141 | CONST_INT, see if we can find a register equivalent to the | |
4142 | positive constant. Make a MINUS if so. Don't do this for | |
5d595063 | 4143 | a non-negative constant since we might then alternate between |
a1f300c0 | 4144 | choosing positive and negative constants. Having the positive |
5d595063 RK |
4145 | constant previously-used is the more common case. Be sure |
4146 | the resulting constant is non-negative; if const_arg1 were | |
4147 | the smallest negative number this would overflow: depending | |
4148 | on the mode, this would either just be the same value (and | |
4149 | hence not save anything) or be incorrect. */ | |
4150 | if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT | |
4151 | && INTVAL (const_arg1) < 0 | |
4741f6ad JL |
4152 | /* This used to test |
4153 | ||
ddc356e8 | 4154 | -INTVAL (const_arg1) >= 0 |
4741f6ad JL |
4155 | |
4156 | But The Sun V5.0 compilers mis-compiled that test. So | |
4157 | instead we test for the problematic value in a more direct | |
4158 | manner and hope the Sun compilers get it correct. */ | |
5c45a8ac KG |
4159 | && INTVAL (const_arg1) != |
4160 | ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT - 1)) | |
f8cfc6aa | 4161 | && REG_P (folded_arg1)) |
c2cc0778 | 4162 | { |
ddc356e8 | 4163 | rtx new_const = GEN_INT (-INTVAL (const_arg1)); |
c2cc0778 | 4164 | struct table_elt *p |
0516f6fe | 4165 | = lookup (new_const, SAFE_HASH (new_const, mode), mode); |
c2cc0778 RK |
4166 | |
4167 | if (p) | |
4168 | for (p = p->first_same_value; p; p = p->next_same_value) | |
f8cfc6aa | 4169 | if (REG_P (p->exp)) |
0cedb36c JL |
4170 | return simplify_gen_binary (MINUS, mode, folded_arg0, |
4171 | canon_reg (p->exp, NULL_RTX)); | |
c2cc0778 | 4172 | } |
13c9910f RS |
4173 | goto from_plus; |
4174 | ||
4175 | case MINUS: | |
4176 | /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2). | |
4177 | If so, produce (PLUS Z C2-C). */ | |
4178 | if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT) | |
4179 | { | |
4180 | rtx y = lookup_as_function (XEXP (x, 0), PLUS); | |
4181 | if (y && GET_CODE (XEXP (y, 1)) == CONST_INT) | |
f3becefd RK |
4182 | return fold_rtx (plus_constant (copy_rtx (y), |
4183 | -INTVAL (const_arg1)), | |
a3b5c94a | 4184 | NULL_RTX); |
13c9910f | 4185 | } |
7afe21cc | 4186 | |
ddc356e8 | 4187 | /* Fall through. */ |
7afe21cc | 4188 | |
13c9910f | 4189 | from_plus: |
7afe21cc RK |
4190 | case SMIN: case SMAX: case UMIN: case UMAX: |
4191 | case IOR: case AND: case XOR: | |
f930bfd0 | 4192 | case MULT: |
7afe21cc RK |
4193 | case ASHIFT: case LSHIFTRT: case ASHIFTRT: |
4194 | /* If we have (<op> <reg> <const_int>) for an associative OP and REG | |
4195 | is known to be of similar form, we may be able to replace the | |
4196 | operation with a combined operation. This may eliminate the | |
4197 | intermediate operation if every use is simplified in this way. | |
4198 | Note that the similar optimization done by combine.c only works | |
4199 | if the intermediate operation's result has only one reference. */ | |
4200 | ||
f8cfc6aa | 4201 | if (REG_P (folded_arg0) |
7afe21cc RK |
4202 | && const_arg1 && GET_CODE (const_arg1) == CONST_INT) |
4203 | { | |
4204 | int is_shift | |
4205 | = (code == ASHIFT || code == ASHIFTRT || code == LSHIFTRT); | |
4206 | rtx y = lookup_as_function (folded_arg0, code); | |
4207 | rtx inner_const; | |
4208 | enum rtx_code associate_code; | |
4209 | rtx new_const; | |
4210 | ||
4211 | if (y == 0 | |
4212 | || 0 == (inner_const | |
4213 | = equiv_constant (fold_rtx (XEXP (y, 1), 0))) | |
4214 | || GET_CODE (inner_const) != CONST_INT | |
4215 | /* If we have compiled a statement like | |
4216 | "if (x == (x & mask1))", and now are looking at | |
4217 | "x & mask2", we will have a case where the first operand | |
4218 | of Y is the same as our first operand. Unless we detect | |
4219 | this case, an infinite loop will result. */ | |
4220 | || XEXP (y, 0) == folded_arg0) | |
4221 | break; | |
4222 | ||
4223 | /* Don't associate these operations if they are a PLUS with the | |
4224 | same constant and it is a power of two. These might be doable | |
4225 | with a pre- or post-increment. Similarly for two subtracts of | |
4226 | identical powers of two with post decrement. */ | |
4227 | ||
213d5fbc | 4228 | if (code == PLUS && const_arg1 == inner_const |
940da324 JL |
4229 | && ((HAVE_PRE_INCREMENT |
4230 | && exact_log2 (INTVAL (const_arg1)) >= 0) | |
4231 | || (HAVE_POST_INCREMENT | |
4232 | && exact_log2 (INTVAL (const_arg1)) >= 0) | |
4233 | || (HAVE_PRE_DECREMENT | |
4234 | && exact_log2 (- INTVAL (const_arg1)) >= 0) | |
4235 | || (HAVE_POST_DECREMENT | |
4236 | && exact_log2 (- INTVAL (const_arg1)) >= 0))) | |
7afe21cc RK |
4237 | break; |
4238 | ||
4239 | /* Compute the code used to compose the constants. For example, | |
f930bfd0 | 4240 | A-C1-C2 is A-(C1 + C2), so if CODE == MINUS, we want PLUS. */ |
7afe21cc | 4241 | |
f930bfd0 | 4242 | associate_code = (is_shift || code == MINUS ? PLUS : code); |
7afe21cc RK |
4243 | |
4244 | new_const = simplify_binary_operation (associate_code, mode, | |
4245 | const_arg1, inner_const); | |
4246 | ||
4247 | if (new_const == 0) | |
4248 | break; | |
4249 | ||
4250 | /* If we are associating shift operations, don't let this | |
4908e508 RS |
4251 | produce a shift of the size of the object or larger. |
4252 | This could occur when we follow a sign-extend by a right | |
4253 | shift on a machine that does a sign-extend as a pair | |
4254 | of shifts. */ | |
7afe21cc RK |
4255 | |
4256 | if (is_shift && GET_CODE (new_const) == CONST_INT | |
4908e508 RS |
4257 | && INTVAL (new_const) >= GET_MODE_BITSIZE (mode)) |
4258 | { | |
4259 | /* As an exception, we can turn an ASHIFTRT of this | |
4260 | form into a shift of the number of bits - 1. */ | |
4261 | if (code == ASHIFTRT) | |
4262 | new_const = GEN_INT (GET_MODE_BITSIZE (mode) - 1); | |
4263 | else | |
4264 | break; | |
4265 | } | |
7afe21cc RK |
4266 | |
4267 | y = copy_rtx (XEXP (y, 0)); | |
4268 | ||
4269 | /* If Y contains our first operand (the most common way this | |
4270 | can happen is if Y is a MEM), we would do into an infinite | |
4271 | loop if we tried to fold it. So don't in that case. */ | |
4272 | ||
4273 | if (! reg_mentioned_p (folded_arg0, y)) | |
4274 | y = fold_rtx (y, insn); | |
4275 | ||
0cedb36c | 4276 | return simplify_gen_binary (code, mode, y, new_const); |
7afe21cc | 4277 | } |
e9a25f70 JL |
4278 | break; |
4279 | ||
f930bfd0 JW |
4280 | case DIV: case UDIV: |
4281 | /* ??? The associative optimization performed immediately above is | |
4282 | also possible for DIV and UDIV using associate_code of MULT. | |
4283 | However, we would need extra code to verify that the | |
4284 | multiplication does not overflow, that is, there is no overflow | |
4285 | in the calculation of new_const. */ | |
4286 | break; | |
4287 | ||
e9a25f70 JL |
4288 | default: |
4289 | break; | |
7afe21cc RK |
4290 | } |
4291 | ||
4292 | new = simplify_binary_operation (code, mode, | |
4293 | const_arg0 ? const_arg0 : folded_arg0, | |
4294 | const_arg1 ? const_arg1 : folded_arg1); | |
4295 | break; | |
4296 | ||
ec8e098d | 4297 | case RTX_OBJ: |
7afe21cc RK |
4298 | /* (lo_sum (high X) X) is simply X. */ |
4299 | if (code == LO_SUM && const_arg0 != 0 | |
4300 | && GET_CODE (const_arg0) == HIGH | |
4301 | && rtx_equal_p (XEXP (const_arg0, 0), const_arg1)) | |
4302 | return const_arg1; | |
4303 | break; | |
4304 | ||
ec8e098d PB |
4305 | case RTX_TERNARY: |
4306 | case RTX_BITFIELD_OPS: | |
7afe21cc RK |
4307 | new = simplify_ternary_operation (code, mode, mode_arg0, |
4308 | const_arg0 ? const_arg0 : folded_arg0, | |
4309 | const_arg1 ? const_arg1 : folded_arg1, | |
4310 | const_arg2 ? const_arg2 : XEXP (x, 2)); | |
4311 | break; | |
ee5332b8 | 4312 | |
ec8e098d PB |
4313 | default: |
4314 | break; | |
7afe21cc RK |
4315 | } |
4316 | ||
4317 | return new ? new : x; | |
4318 | } | |
4319 | \f | |
4320 | /* Return a constant value currently equivalent to X. | |
4321 | Return 0 if we don't know one. */ | |
4322 | ||
4323 | static rtx | |
7080f735 | 4324 | equiv_constant (rtx x) |
7afe21cc | 4325 | { |
f8cfc6aa | 4326 | if (REG_P (x) |
1bb98cec DM |
4327 | && REGNO_QTY_VALID_P (REGNO (x))) |
4328 | { | |
4329 | int x_q = REG_QTY (REGNO (x)); | |
4330 | struct qty_table_elem *x_ent = &qty_table[x_q]; | |
4331 | ||
4332 | if (x_ent->const_rtx) | |
4de249d9 | 4333 | x = gen_lowpart (GET_MODE (x), x_ent->const_rtx); |
1bb98cec | 4334 | } |
7afe21cc | 4335 | |
2ce5e1b4 | 4336 | if (x == 0 || CONSTANT_P (x)) |
7afe21cc RK |
4337 | return x; |
4338 | ||
fc3ffe83 RK |
4339 | /* If X is a MEM, try to fold it outside the context of any insn to see if |
4340 | it might be equivalent to a constant. That handles the case where it | |
4341 | is a constant-pool reference. Then try to look it up in the hash table | |
4342 | in case it is something whose value we have seen before. */ | |
4343 | ||
3c0cb5de | 4344 | if (MEM_P (x)) |
fc3ffe83 RK |
4345 | { |
4346 | struct table_elt *elt; | |
4347 | ||
906c4e36 | 4348 | x = fold_rtx (x, NULL_RTX); |
fc3ffe83 RK |
4349 | if (CONSTANT_P (x)) |
4350 | return x; | |
4351 | ||
0516f6fe | 4352 | elt = lookup (x, SAFE_HASH (x, GET_MODE (x)), GET_MODE (x)); |
fc3ffe83 RK |
4353 | if (elt == 0) |
4354 | return 0; | |
4355 | ||
4356 | for (elt = elt->first_same_value; elt; elt = elt->next_same_value) | |
4357 | if (elt->is_const && CONSTANT_P (elt->exp)) | |
4358 | return elt->exp; | |
4359 | } | |
4360 | ||
7afe21cc RK |
4361 | return 0; |
4362 | } | |
4363 | \f | |
6de9cd9a | 4364 | /* Given INSN, a jump insn, PATH_TAKEN indicates if we are following the "taken" |
7afe21cc RK |
4365 | branch. It will be zero if not. |
4366 | ||
4367 | In certain cases, this can cause us to add an equivalence. For example, | |
278a83b2 | 4368 | if we are following the taken case of |
7080f735 | 4369 | if (i == 2) |
7afe21cc RK |
4370 | we can add the fact that `i' and '2' are now equivalent. |
4371 | ||
4372 | In any case, we can record that this comparison was passed. If the same | |
4373 | comparison is seen later, we will know its value. */ | |
4374 | ||
4375 | static void | |
7080f735 | 4376 | record_jump_equiv (rtx insn, int taken) |
7afe21cc RK |
4377 | { |
4378 | int cond_known_true; | |
4379 | rtx op0, op1; | |
7f1c097d | 4380 | rtx set; |
13c9910f | 4381 | enum machine_mode mode, mode0, mode1; |
7afe21cc RK |
4382 | int reversed_nonequality = 0; |
4383 | enum rtx_code code; | |
4384 | ||
4385 | /* Ensure this is the right kind of insn. */ | |
7f1c097d | 4386 | if (! any_condjump_p (insn)) |
7afe21cc | 4387 | return; |
7f1c097d | 4388 | set = pc_set (insn); |
7afe21cc RK |
4389 | |
4390 | /* See if this jump condition is known true or false. */ | |
4391 | if (taken) | |
7f1c097d | 4392 | cond_known_true = (XEXP (SET_SRC (set), 2) == pc_rtx); |
7afe21cc | 4393 | else |
7f1c097d | 4394 | cond_known_true = (XEXP (SET_SRC (set), 1) == pc_rtx); |
7afe21cc RK |
4395 | |
4396 | /* Get the type of comparison being done and the operands being compared. | |
4397 | If we had to reverse a non-equality condition, record that fact so we | |
4398 | know that it isn't valid for floating-point. */ | |
7f1c097d JH |
4399 | code = GET_CODE (XEXP (SET_SRC (set), 0)); |
4400 | op0 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 0), insn); | |
4401 | op1 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 1), insn); | |
7afe21cc | 4402 | |
13c9910f | 4403 | code = find_comparison_args (code, &op0, &op1, &mode0, &mode1); |
7afe21cc RK |
4404 | if (! cond_known_true) |
4405 | { | |
261efdef | 4406 | code = reversed_comparison_code_parts (code, op0, op1, insn); |
1eb8759b RH |
4407 | |
4408 | /* Don't remember if we can't find the inverse. */ | |
4409 | if (code == UNKNOWN) | |
4410 | return; | |
7afe21cc RK |
4411 | } |
4412 | ||
4413 | /* The mode is the mode of the non-constant. */ | |
13c9910f RS |
4414 | mode = mode0; |
4415 | if (mode1 != VOIDmode) | |
4416 | mode = mode1; | |
7afe21cc RK |
4417 | |
4418 | record_jump_cond (code, mode, op0, op1, reversed_nonequality); | |
4419 | } | |
4420 | ||
794693c0 RH |
4421 | /* Yet another form of subreg creation. In this case, we want something in |
4422 | MODE, and we should assume OP has MODE iff it is naturally modeless. */ | |
4423 | ||
4424 | static rtx | |
4425 | record_jump_cond_subreg (enum machine_mode mode, rtx op) | |
4426 | { | |
4427 | enum machine_mode op_mode = GET_MODE (op); | |
4428 | if (op_mode == mode || op_mode == VOIDmode) | |
4429 | return op; | |
4430 | return lowpart_subreg (mode, op, op_mode); | |
4431 | } | |
4432 | ||
7afe21cc RK |
4433 | /* We know that comparison CODE applied to OP0 and OP1 in MODE is true. |
4434 | REVERSED_NONEQUALITY is nonzero if CODE had to be swapped. | |
4435 | Make any useful entries we can with that information. Called from | |
4436 | above function and called recursively. */ | |
4437 | ||
4438 | static void | |
7080f735 AJ |
4439 | record_jump_cond (enum rtx_code code, enum machine_mode mode, rtx op0, |
4440 | rtx op1, int reversed_nonequality) | |
7afe21cc | 4441 | { |
2197a88a | 4442 | unsigned op0_hash, op1_hash; |
e428d738 | 4443 | int op0_in_memory, op1_in_memory; |
7afe21cc RK |
4444 | struct table_elt *op0_elt, *op1_elt; |
4445 | ||
4446 | /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG, | |
4447 | we know that they are also equal in the smaller mode (this is also | |
4448 | true for all smaller modes whether or not there is a SUBREG, but | |
ac7ef8d5 | 4449 | is not worth testing for with no SUBREG). */ |
7afe21cc | 4450 | |
2e794ee8 | 4451 | /* Note that GET_MODE (op0) may not equal MODE. */ |
7afe21cc | 4452 | if (code == EQ && GET_CODE (op0) == SUBREG |
2e794ee8 RS |
4453 | && (GET_MODE_SIZE (GET_MODE (op0)) |
4454 | > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0))))) | |
7afe21cc RK |
4455 | { |
4456 | enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0)); | |
794693c0 RH |
4457 | rtx tem = record_jump_cond_subreg (inner_mode, op1); |
4458 | if (tem) | |
4459 | record_jump_cond (code, mode, SUBREG_REG (op0), tem, | |
4460 | reversed_nonequality); | |
7afe21cc RK |
4461 | } |
4462 | ||
4463 | if (code == EQ && GET_CODE (op1) == SUBREG | |
2e794ee8 RS |
4464 | && (GET_MODE_SIZE (GET_MODE (op1)) |
4465 | > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1))))) | |
7afe21cc RK |
4466 | { |
4467 | enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1)); | |
794693c0 RH |
4468 | rtx tem = record_jump_cond_subreg (inner_mode, op0); |
4469 | if (tem) | |
4470 | record_jump_cond (code, mode, SUBREG_REG (op1), tem, | |
4471 | reversed_nonequality); | |
7afe21cc RK |
4472 | } |
4473 | ||
278a83b2 | 4474 | /* Similarly, if this is an NE comparison, and either is a SUBREG |
7afe21cc RK |
4475 | making a smaller mode, we know the whole thing is also NE. */ |
4476 | ||
2e794ee8 RS |
4477 | /* Note that GET_MODE (op0) may not equal MODE; |
4478 | if we test MODE instead, we can get an infinite recursion | |
4479 | alternating between two modes each wider than MODE. */ | |
4480 | ||
7afe21cc RK |
4481 | if (code == NE && GET_CODE (op0) == SUBREG |
4482 | && subreg_lowpart_p (op0) | |
2e794ee8 RS |
4483 | && (GET_MODE_SIZE (GET_MODE (op0)) |
4484 | < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0))))) | |
7afe21cc RK |
4485 | { |
4486 | enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0)); | |
794693c0 RH |
4487 | rtx tem = record_jump_cond_subreg (inner_mode, op1); |
4488 | if (tem) | |
4489 | record_jump_cond (code, mode, SUBREG_REG (op0), tem, | |
4490 | reversed_nonequality); | |
7afe21cc RK |
4491 | } |
4492 | ||
4493 | if (code == NE && GET_CODE (op1) == SUBREG | |
4494 | && subreg_lowpart_p (op1) | |
2e794ee8 RS |
4495 | && (GET_MODE_SIZE (GET_MODE (op1)) |
4496 | < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1))))) | |
7afe21cc RK |
4497 | { |
4498 | enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1)); | |
794693c0 RH |
4499 | rtx tem = record_jump_cond_subreg (inner_mode, op0); |
4500 | if (tem) | |
4501 | record_jump_cond (code, mode, SUBREG_REG (op1), tem, | |
4502 | reversed_nonequality); | |
7afe21cc RK |
4503 | } |
4504 | ||
4505 | /* Hash both operands. */ | |
4506 | ||
4507 | do_not_record = 0; | |
4508 | hash_arg_in_memory = 0; | |
2197a88a | 4509 | op0_hash = HASH (op0, mode); |
7afe21cc | 4510 | op0_in_memory = hash_arg_in_memory; |
7afe21cc RK |
4511 | |
4512 | if (do_not_record) | |
4513 | return; | |
4514 | ||
4515 | do_not_record = 0; | |
4516 | hash_arg_in_memory = 0; | |
2197a88a | 4517 | op1_hash = HASH (op1, mode); |
7afe21cc | 4518 | op1_in_memory = hash_arg_in_memory; |
278a83b2 | 4519 | |
7afe21cc RK |
4520 | if (do_not_record) |
4521 | return; | |
4522 | ||
4523 | /* Look up both operands. */ | |
2197a88a RK |
4524 | op0_elt = lookup (op0, op0_hash, mode); |
4525 | op1_elt = lookup (op1, op1_hash, mode); | |
7afe21cc | 4526 | |
af3869c1 RK |
4527 | /* If both operands are already equivalent or if they are not in the |
4528 | table but are identical, do nothing. */ | |
4529 | if ((op0_elt != 0 && op1_elt != 0 | |
4530 | && op0_elt->first_same_value == op1_elt->first_same_value) | |
4531 | || op0 == op1 || rtx_equal_p (op0, op1)) | |
4532 | return; | |
4533 | ||
7afe21cc | 4534 | /* If we aren't setting two things equal all we can do is save this |
b2796a4b RK |
4535 | comparison. Similarly if this is floating-point. In the latter |
4536 | case, OP1 might be zero and both -0.0 and 0.0 are equal to it. | |
4537 | If we record the equality, we might inadvertently delete code | |
4538 | whose intent was to change -0 to +0. */ | |
4539 | ||
cbf6a543 | 4540 | if (code != EQ || FLOAT_MODE_P (GET_MODE (op0))) |
7afe21cc | 4541 | { |
1bb98cec DM |
4542 | struct qty_table_elem *ent; |
4543 | int qty; | |
4544 | ||
7afe21cc RK |
4545 | /* If we reversed a floating-point comparison, if OP0 is not a |
4546 | register, or if OP1 is neither a register or constant, we can't | |
4547 | do anything. */ | |
4548 | ||
f8cfc6aa | 4549 | if (!REG_P (op1)) |
7afe21cc RK |
4550 | op1 = equiv_constant (op1); |
4551 | ||
cbf6a543 | 4552 | if ((reversed_nonequality && FLOAT_MODE_P (mode)) |
f8cfc6aa | 4553 | || !REG_P (op0) || op1 == 0) |
7afe21cc RK |
4554 | return; |
4555 | ||
4556 | /* Put OP0 in the hash table if it isn't already. This gives it a | |
4557 | new quantity number. */ | |
4558 | if (op0_elt == 0) | |
4559 | { | |
9714cf43 | 4560 | if (insert_regs (op0, NULL, 0)) |
7afe21cc RK |
4561 | { |
4562 | rehash_using_reg (op0); | |
2197a88a | 4563 | op0_hash = HASH (op0, mode); |
2bb81c86 RK |
4564 | |
4565 | /* If OP0 is contained in OP1, this changes its hash code | |
4566 | as well. Faster to rehash than to check, except | |
4567 | for the simple case of a constant. */ | |
4568 | if (! CONSTANT_P (op1)) | |
2197a88a | 4569 | op1_hash = HASH (op1,mode); |
7afe21cc RK |
4570 | } |
4571 | ||
9714cf43 | 4572 | op0_elt = insert (op0, NULL, op0_hash, mode); |
7afe21cc | 4573 | op0_elt->in_memory = op0_in_memory; |
7afe21cc RK |
4574 | } |
4575 | ||
1bb98cec DM |
4576 | qty = REG_QTY (REGNO (op0)); |
4577 | ent = &qty_table[qty]; | |
4578 | ||
4579 | ent->comparison_code = code; | |
f8cfc6aa | 4580 | if (REG_P (op1)) |
7afe21cc | 4581 | { |
5d5ea909 | 4582 | /* Look it up again--in case op0 and op1 are the same. */ |
2197a88a | 4583 | op1_elt = lookup (op1, op1_hash, mode); |
5d5ea909 | 4584 | |
7afe21cc RK |
4585 | /* Put OP1 in the hash table so it gets a new quantity number. */ |
4586 | if (op1_elt == 0) | |
4587 | { | |
9714cf43 | 4588 | if (insert_regs (op1, NULL, 0)) |
7afe21cc RK |
4589 | { |
4590 | rehash_using_reg (op1); | |
2197a88a | 4591 | op1_hash = HASH (op1, mode); |
7afe21cc RK |
4592 | } |
4593 | ||
9714cf43 | 4594 | op1_elt = insert (op1, NULL, op1_hash, mode); |
7afe21cc | 4595 | op1_elt->in_memory = op1_in_memory; |
7afe21cc RK |
4596 | } |
4597 | ||
1bb98cec DM |
4598 | ent->comparison_const = NULL_RTX; |
4599 | ent->comparison_qty = REG_QTY (REGNO (op1)); | |
7afe21cc RK |
4600 | } |
4601 | else | |
4602 | { | |
1bb98cec DM |
4603 | ent->comparison_const = op1; |
4604 | ent->comparison_qty = -1; | |
7afe21cc RK |
4605 | } |
4606 | ||
4607 | return; | |
4608 | } | |
4609 | ||
eb5ad42a RS |
4610 | /* If either side is still missing an equivalence, make it now, |
4611 | then merge the equivalences. */ | |
7afe21cc | 4612 | |
7afe21cc RK |
4613 | if (op0_elt == 0) |
4614 | { | |
9714cf43 | 4615 | if (insert_regs (op0, NULL, 0)) |
7afe21cc RK |
4616 | { |
4617 | rehash_using_reg (op0); | |
2197a88a | 4618 | op0_hash = HASH (op0, mode); |
7afe21cc RK |
4619 | } |
4620 | ||
9714cf43 | 4621 | op0_elt = insert (op0, NULL, op0_hash, mode); |
7afe21cc | 4622 | op0_elt->in_memory = op0_in_memory; |
7afe21cc RK |
4623 | } |
4624 | ||
4625 | if (op1_elt == 0) | |
4626 | { | |
9714cf43 | 4627 | if (insert_regs (op1, NULL, 0)) |
7afe21cc RK |
4628 | { |
4629 | rehash_using_reg (op1); | |
2197a88a | 4630 | op1_hash = HASH (op1, mode); |
7afe21cc RK |
4631 | } |
4632 | ||
9714cf43 | 4633 | op1_elt = insert (op1, NULL, op1_hash, mode); |
7afe21cc | 4634 | op1_elt->in_memory = op1_in_memory; |
7afe21cc | 4635 | } |
eb5ad42a RS |
4636 | |
4637 | merge_equiv_classes (op0_elt, op1_elt); | |
7afe21cc RK |
4638 | } |
4639 | \f | |
4640 | /* CSE processing for one instruction. | |
4641 | First simplify sources and addresses of all assignments | |
4642 | in the instruction, using previously-computed equivalents values. | |
4643 | Then install the new sources and destinations in the table | |
278a83b2 | 4644 | of available values. |
7afe21cc | 4645 | |
1ed0205e VM |
4646 | If LIBCALL_INSN is nonzero, don't record any equivalence made in |
4647 | the insn. It means that INSN is inside libcall block. In this | |
ddc356e8 | 4648 | case LIBCALL_INSN is the corresponding insn with REG_LIBCALL. */ |
7afe21cc RK |
4649 | |
4650 | /* Data on one SET contained in the instruction. */ | |
4651 | ||
4652 | struct set | |
4653 | { | |
4654 | /* The SET rtx itself. */ | |
4655 | rtx rtl; | |
4656 | /* The SET_SRC of the rtx (the original value, if it is changing). */ | |
4657 | rtx src; | |
4658 | /* The hash-table element for the SET_SRC of the SET. */ | |
4659 | struct table_elt *src_elt; | |
2197a88a RK |
4660 | /* Hash value for the SET_SRC. */ |
4661 | unsigned src_hash; | |
4662 | /* Hash value for the SET_DEST. */ | |
4663 | unsigned dest_hash; | |
7afe21cc RK |
4664 | /* The SET_DEST, with SUBREG, etc., stripped. */ |
4665 | rtx inner_dest; | |
278a83b2 | 4666 | /* Nonzero if the SET_SRC is in memory. */ |
7afe21cc | 4667 | char src_in_memory; |
7afe21cc RK |
4668 | /* Nonzero if the SET_SRC contains something |
4669 | whose value cannot be predicted and understood. */ | |
4670 | char src_volatile; | |
496324d0 DN |
4671 | /* Original machine mode, in case it becomes a CONST_INT. |
4672 | The size of this field should match the size of the mode | |
4673 | field of struct rtx_def (see rtl.h). */ | |
4674 | ENUM_BITFIELD(machine_mode) mode : 8; | |
7afe21cc RK |
4675 | /* A constant equivalent for SET_SRC, if any. */ |
4676 | rtx src_const; | |
47841d1b JJ |
4677 | /* Original SET_SRC value used for libcall notes. */ |
4678 | rtx orig_src; | |
2197a88a RK |
4679 | /* Hash value of constant equivalent for SET_SRC. */ |
4680 | unsigned src_const_hash; | |
7afe21cc RK |
4681 | /* Table entry for constant equivalent for SET_SRC, if any. */ |
4682 | struct table_elt *src_const_elt; | |
4683 | }; | |
4684 | ||
4685 | static void | |
7080f735 | 4686 | cse_insn (rtx insn, rtx libcall_insn) |
7afe21cc | 4687 | { |
b3694847 SS |
4688 | rtx x = PATTERN (insn); |
4689 | int i; | |
92f9aa51 | 4690 | rtx tem; |
b3694847 | 4691 | int n_sets = 0; |
7afe21cc | 4692 | |
2d8b0f3a | 4693 | #ifdef HAVE_cc0 |
7afe21cc RK |
4694 | /* Records what this insn does to set CC0. */ |
4695 | rtx this_insn_cc0 = 0; | |
135d84b8 | 4696 | enum machine_mode this_insn_cc0_mode = VOIDmode; |
2d8b0f3a | 4697 | #endif |
7afe21cc RK |
4698 | |
4699 | rtx src_eqv = 0; | |
4700 | struct table_elt *src_eqv_elt = 0; | |
6a651371 KG |
4701 | int src_eqv_volatile = 0; |
4702 | int src_eqv_in_memory = 0; | |
6a651371 | 4703 | unsigned src_eqv_hash = 0; |
7afe21cc | 4704 | |
9714cf43 | 4705 | struct set *sets = (struct set *) 0; |
7afe21cc RK |
4706 | |
4707 | this_insn = insn; | |
7afe21cc RK |
4708 | |
4709 | /* Find all the SETs and CLOBBERs in this instruction. | |
4710 | Record all the SETs in the array `set' and count them. | |
4711 | Also determine whether there is a CLOBBER that invalidates | |
4712 | all memory references, or all references at varying addresses. */ | |
4713 | ||
4b4bf941 | 4714 | if (CALL_P (insn)) |
f1e7c95f RK |
4715 | { |
4716 | for (tem = CALL_INSN_FUNCTION_USAGE (insn); tem; tem = XEXP (tem, 1)) | |
f474c6f8 AO |
4717 | { |
4718 | if (GET_CODE (XEXP (tem, 0)) == CLOBBER) | |
4719 | invalidate (SET_DEST (XEXP (tem, 0)), VOIDmode); | |
4720 | XEXP (tem, 0) = canon_reg (XEXP (tem, 0), insn); | |
4721 | } | |
f1e7c95f RK |
4722 | } |
4723 | ||
7afe21cc RK |
4724 | if (GET_CODE (x) == SET) |
4725 | { | |
703ad42b | 4726 | sets = alloca (sizeof (struct set)); |
7afe21cc RK |
4727 | sets[0].rtl = x; |
4728 | ||
4729 | /* Ignore SETs that are unconditional jumps. | |
4730 | They never need cse processing, so this does not hurt. | |
4731 | The reason is not efficiency but rather | |
4732 | so that we can test at the end for instructions | |
4733 | that have been simplified to unconditional jumps | |
4734 | and not be misled by unchanged instructions | |
4735 | that were unconditional jumps to begin with. */ | |
4736 | if (SET_DEST (x) == pc_rtx | |
4737 | && GET_CODE (SET_SRC (x)) == LABEL_REF) | |
4738 | ; | |
4739 | ||
4740 | /* Don't count call-insns, (set (reg 0) (call ...)), as a set. | |
4741 | The hard function value register is used only once, to copy to | |
4742 | someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)! | |
4743 | Ensure we invalidate the destination register. On the 80386 no | |
7722328e | 4744 | other code would invalidate it since it is a fixed_reg. |
0f41302f | 4745 | We need not check the return of apply_change_group; see canon_reg. */ |
7afe21cc RK |
4746 | |
4747 | else if (GET_CODE (SET_SRC (x)) == CALL) | |
4748 | { | |
4749 | canon_reg (SET_SRC (x), insn); | |
77fa0940 | 4750 | apply_change_group (); |
7afe21cc | 4751 | fold_rtx (SET_SRC (x), insn); |
bb4034b3 | 4752 | invalidate (SET_DEST (x), VOIDmode); |
7afe21cc RK |
4753 | } |
4754 | else | |
4755 | n_sets = 1; | |
4756 | } | |
4757 | else if (GET_CODE (x) == PARALLEL) | |
4758 | { | |
b3694847 | 4759 | int lim = XVECLEN (x, 0); |
7afe21cc | 4760 | |
703ad42b | 4761 | sets = alloca (lim * sizeof (struct set)); |
7afe21cc RK |
4762 | |
4763 | /* Find all regs explicitly clobbered in this insn, | |
4764 | and ensure they are not replaced with any other regs | |
4765 | elsewhere in this insn. | |
4766 | When a reg that is clobbered is also used for input, | |
4767 | we should presume that that is for a reason, | |
4768 | and we should not substitute some other register | |
4769 | which is not supposed to be clobbered. | |
4770 | Therefore, this loop cannot be merged into the one below | |
830a38ee | 4771 | because a CALL may precede a CLOBBER and refer to the |
7afe21cc RK |
4772 | value clobbered. We must not let a canonicalization do |
4773 | anything in that case. */ | |
4774 | for (i = 0; i < lim; i++) | |
4775 | { | |
b3694847 | 4776 | rtx y = XVECEXP (x, 0, i); |
2708da92 RS |
4777 | if (GET_CODE (y) == CLOBBER) |
4778 | { | |
4779 | rtx clobbered = XEXP (y, 0); | |
4780 | ||
f8cfc6aa | 4781 | if (REG_P (clobbered) |
2708da92 | 4782 | || GET_CODE (clobbered) == SUBREG) |
bb4034b3 | 4783 | invalidate (clobbered, VOIDmode); |
2708da92 RS |
4784 | else if (GET_CODE (clobbered) == STRICT_LOW_PART |
4785 | || GET_CODE (clobbered) == ZERO_EXTRACT) | |
bb4034b3 | 4786 | invalidate (XEXP (clobbered, 0), GET_MODE (clobbered)); |
2708da92 | 4787 | } |
7afe21cc | 4788 | } |
278a83b2 | 4789 | |
7afe21cc RK |
4790 | for (i = 0; i < lim; i++) |
4791 | { | |
b3694847 | 4792 | rtx y = XVECEXP (x, 0, i); |
7afe21cc RK |
4793 | if (GET_CODE (y) == SET) |
4794 | { | |
7722328e RK |
4795 | /* As above, we ignore unconditional jumps and call-insns and |
4796 | ignore the result of apply_change_group. */ | |
7afe21cc RK |
4797 | if (GET_CODE (SET_SRC (y)) == CALL) |
4798 | { | |
4799 | canon_reg (SET_SRC (y), insn); | |
77fa0940 | 4800 | apply_change_group (); |
7afe21cc | 4801 | fold_rtx (SET_SRC (y), insn); |
bb4034b3 | 4802 | invalidate (SET_DEST (y), VOIDmode); |
7afe21cc RK |
4803 | } |
4804 | else if (SET_DEST (y) == pc_rtx | |
4805 | && GET_CODE (SET_SRC (y)) == LABEL_REF) | |
4806 | ; | |
4807 | else | |
4808 | sets[n_sets++].rtl = y; | |
4809 | } | |
4810 | else if (GET_CODE (y) == CLOBBER) | |
4811 | { | |
9ae8ffe7 | 4812 | /* If we clobber memory, canon the address. |
7afe21cc RK |
4813 | This does nothing when a register is clobbered |
4814 | because we have already invalidated the reg. */ | |
3c0cb5de | 4815 | if (MEM_P (XEXP (y, 0))) |
9ae8ffe7 | 4816 | canon_reg (XEXP (y, 0), NULL_RTX); |
7afe21cc RK |
4817 | } |
4818 | else if (GET_CODE (y) == USE | |
f8cfc6aa | 4819 | && ! (REG_P (XEXP (y, 0)) |
7afe21cc | 4820 | && REGNO (XEXP (y, 0)) < FIRST_PSEUDO_REGISTER)) |
906c4e36 | 4821 | canon_reg (y, NULL_RTX); |
7afe21cc RK |
4822 | else if (GET_CODE (y) == CALL) |
4823 | { | |
7722328e RK |
4824 | /* The result of apply_change_group can be ignored; see |
4825 | canon_reg. */ | |
7afe21cc | 4826 | canon_reg (y, insn); |
77fa0940 | 4827 | apply_change_group (); |
7afe21cc RK |
4828 | fold_rtx (y, insn); |
4829 | } | |
4830 | } | |
4831 | } | |
4832 | else if (GET_CODE (x) == CLOBBER) | |
4833 | { | |
3c0cb5de | 4834 | if (MEM_P (XEXP (x, 0))) |
9ae8ffe7 | 4835 | canon_reg (XEXP (x, 0), NULL_RTX); |
7afe21cc RK |
4836 | } |
4837 | ||
4838 | /* Canonicalize a USE of a pseudo register or memory location. */ | |
4839 | else if (GET_CODE (x) == USE | |
f8cfc6aa | 4840 | && ! (REG_P (XEXP (x, 0)) |
7afe21cc | 4841 | && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)) |
906c4e36 | 4842 | canon_reg (XEXP (x, 0), NULL_RTX); |
7afe21cc RK |
4843 | else if (GET_CODE (x) == CALL) |
4844 | { | |
7722328e | 4845 | /* The result of apply_change_group can be ignored; see canon_reg. */ |
7afe21cc | 4846 | canon_reg (x, insn); |
77fa0940 | 4847 | apply_change_group (); |
7afe21cc RK |
4848 | fold_rtx (x, insn); |
4849 | } | |
4850 | ||
7b3ab05e JW |
4851 | /* Store the equivalent value in SRC_EQV, if different, or if the DEST |
4852 | is a STRICT_LOW_PART. The latter condition is necessary because SRC_EQV | |
4853 | is handled specially for this case, and if it isn't set, then there will | |
9faa82d8 | 4854 | be no equivalence for the destination. */ |
92f9aa51 RK |
4855 | if (n_sets == 1 && REG_NOTES (insn) != 0 |
4856 | && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0 | |
7b3ab05e JW |
4857 | && (! rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl)) |
4858 | || GET_CODE (SET_DEST (sets[0].rtl)) == STRICT_LOW_PART)) | |
7b668f9e JJ |
4859 | { |
4860 | src_eqv = fold_rtx (canon_reg (XEXP (tem, 0), NULL_RTX), insn); | |
4861 | XEXP (tem, 0) = src_eqv; | |
4862 | } | |
7afe21cc RK |
4863 | |
4864 | /* Canonicalize sources and addresses of destinations. | |
4865 | We do this in a separate pass to avoid problems when a MATCH_DUP is | |
4866 | present in the insn pattern. In that case, we want to ensure that | |
4867 | we don't break the duplicate nature of the pattern. So we will replace | |
4868 | both operands at the same time. Otherwise, we would fail to find an | |
4869 | equivalent substitution in the loop calling validate_change below. | |
7afe21cc RK |
4870 | |
4871 | We used to suppress canonicalization of DEST if it appears in SRC, | |
77fa0940 | 4872 | but we don't do this any more. */ |
7afe21cc RK |
4873 | |
4874 | for (i = 0; i < n_sets; i++) | |
4875 | { | |
4876 | rtx dest = SET_DEST (sets[i].rtl); | |
4877 | rtx src = SET_SRC (sets[i].rtl); | |
4878 | rtx new = canon_reg (src, insn); | |
58873255 | 4879 | int insn_code; |
7afe21cc | 4880 | |
47841d1b | 4881 | sets[i].orig_src = src; |
f8cfc6aa | 4882 | if ((REG_P (new) && REG_P (src) |
77fa0940 RK |
4883 | && ((REGNO (new) < FIRST_PSEUDO_REGISTER) |
4884 | != (REGNO (src) < FIRST_PSEUDO_REGISTER))) | |
58873255 | 4885 | || (insn_code = recog_memoized (insn)) < 0 |
a995e389 | 4886 | || insn_data[insn_code].n_dups > 0) |
77fa0940 | 4887 | validate_change (insn, &SET_SRC (sets[i].rtl), new, 1); |
7afe21cc RK |
4888 | else |
4889 | SET_SRC (sets[i].rtl) = new; | |
4890 | ||
46d096a3 | 4891 | if (GET_CODE (dest) == ZERO_EXTRACT) |
7afe21cc RK |
4892 | { |
4893 | validate_change (insn, &XEXP (dest, 1), | |
77fa0940 | 4894 | canon_reg (XEXP (dest, 1), insn), 1); |
7afe21cc | 4895 | validate_change (insn, &XEXP (dest, 2), |
77fa0940 | 4896 | canon_reg (XEXP (dest, 2), insn), 1); |
7afe21cc RK |
4897 | } |
4898 | ||
46d096a3 | 4899 | while (GET_CODE (dest) == SUBREG |
7afe21cc | 4900 | || GET_CODE (dest) == ZERO_EXTRACT |
46d096a3 | 4901 | || GET_CODE (dest) == STRICT_LOW_PART) |
7afe21cc RK |
4902 | dest = XEXP (dest, 0); |
4903 | ||
3c0cb5de | 4904 | if (MEM_P (dest)) |
7afe21cc RK |
4905 | canon_reg (dest, insn); |
4906 | } | |
4907 | ||
77fa0940 RK |
4908 | /* Now that we have done all the replacements, we can apply the change |
4909 | group and see if they all work. Note that this will cause some | |
4910 | canonicalizations that would have worked individually not to be applied | |
4911 | because some other canonicalization didn't work, but this should not | |
278a83b2 | 4912 | occur often. |
7722328e RK |
4913 | |
4914 | The result of apply_change_group can be ignored; see canon_reg. */ | |
77fa0940 RK |
4915 | |
4916 | apply_change_group (); | |
4917 | ||
7afe21cc RK |
4918 | /* Set sets[i].src_elt to the class each source belongs to. |
4919 | Detect assignments from or to volatile things | |
4920 | and set set[i] to zero so they will be ignored | |
4921 | in the rest of this function. | |
4922 | ||
4923 | Nothing in this loop changes the hash table or the register chains. */ | |
4924 | ||
4925 | for (i = 0; i < n_sets; i++) | |
4926 | { | |
b3694847 SS |
4927 | rtx src, dest; |
4928 | rtx src_folded; | |
4929 | struct table_elt *elt = 0, *p; | |
7afe21cc RK |
4930 | enum machine_mode mode; |
4931 | rtx src_eqv_here; | |
4932 | rtx src_const = 0; | |
4933 | rtx src_related = 0; | |
4934 | struct table_elt *src_const_elt = 0; | |
99a9c946 GS |
4935 | int src_cost = MAX_COST; |
4936 | int src_eqv_cost = MAX_COST; | |
4937 | int src_folded_cost = MAX_COST; | |
4938 | int src_related_cost = MAX_COST; | |
4939 | int src_elt_cost = MAX_COST; | |
4940 | int src_regcost = MAX_COST; | |
4941 | int src_eqv_regcost = MAX_COST; | |
4942 | int src_folded_regcost = MAX_COST; | |
4943 | int src_related_regcost = MAX_COST; | |
4944 | int src_elt_regcost = MAX_COST; | |
da7d8304 | 4945 | /* Set nonzero if we need to call force_const_mem on with the |
7afe21cc RK |
4946 | contents of src_folded before using it. */ |
4947 | int src_folded_force_flag = 0; | |
4948 | ||
4949 | dest = SET_DEST (sets[i].rtl); | |
4950 | src = SET_SRC (sets[i].rtl); | |
4951 | ||
4952 | /* If SRC is a constant that has no machine mode, | |
4953 | hash it with the destination's machine mode. | |
4954 | This way we can keep different modes separate. */ | |
4955 | ||
4956 | mode = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src); | |
4957 | sets[i].mode = mode; | |
4958 | ||
4959 | if (src_eqv) | |
4960 | { | |
4961 | enum machine_mode eqvmode = mode; | |
4962 | if (GET_CODE (dest) == STRICT_LOW_PART) | |
4963 | eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0))); | |
4964 | do_not_record = 0; | |
4965 | hash_arg_in_memory = 0; | |
2197a88a | 4966 | src_eqv_hash = HASH (src_eqv, eqvmode); |
7afe21cc RK |
4967 | |
4968 | /* Find the equivalence class for the equivalent expression. */ | |
4969 | ||
4970 | if (!do_not_record) | |
2197a88a | 4971 | src_eqv_elt = lookup (src_eqv, src_eqv_hash, eqvmode); |
7afe21cc RK |
4972 | |
4973 | src_eqv_volatile = do_not_record; | |
4974 | src_eqv_in_memory = hash_arg_in_memory; | |
7afe21cc RK |
4975 | } |
4976 | ||
4977 | /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the | |
4978 | value of the INNER register, not the destination. So it is not | |
3826a3da | 4979 | a valid substitution for the source. But save it for later. */ |
7afe21cc RK |
4980 | if (GET_CODE (dest) == STRICT_LOW_PART) |
4981 | src_eqv_here = 0; | |
4982 | else | |
4983 | src_eqv_here = src_eqv; | |
4984 | ||
4985 | /* Simplify and foldable subexpressions in SRC. Then get the fully- | |
4986 | simplified result, which may not necessarily be valid. */ | |
4987 | src_folded = fold_rtx (src, insn); | |
4988 | ||
e6a125a0 RK |
4989 | #if 0 |
4990 | /* ??? This caused bad code to be generated for the m68k port with -O2. | |
4991 | Suppose src is (CONST_INT -1), and that after truncation src_folded | |
4992 | is (CONST_INT 3). Suppose src_folded is then used for src_const. | |
4993 | At the end we will add src and src_const to the same equivalence | |
4994 | class. We now have 3 and -1 on the same equivalence class. This | |
4995 | causes later instructions to be mis-optimized. */ | |
7afe21cc RK |
4996 | /* If storing a constant in a bitfield, pre-truncate the constant |
4997 | so we will be able to record it later. */ | |
46d096a3 | 4998 | if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT) |
7afe21cc RK |
4999 | { |
5000 | rtx width = XEXP (SET_DEST (sets[i].rtl), 1); | |
5001 | ||
5002 | if (GET_CODE (src) == CONST_INT | |
5003 | && GET_CODE (width) == CONST_INT | |
906c4e36 RK |
5004 | && INTVAL (width) < HOST_BITS_PER_WIDE_INT |
5005 | && (INTVAL (src) & ((HOST_WIDE_INT) (-1) << INTVAL (width)))) | |
5006 | src_folded | |
5007 | = GEN_INT (INTVAL (src) & (((HOST_WIDE_INT) 1 | |
5008 | << INTVAL (width)) - 1)); | |
7afe21cc | 5009 | } |
e6a125a0 | 5010 | #endif |
7afe21cc RK |
5011 | |
5012 | /* Compute SRC's hash code, and also notice if it | |
5013 | should not be recorded at all. In that case, | |
5014 | prevent any further processing of this assignment. */ | |
5015 | do_not_record = 0; | |
5016 | hash_arg_in_memory = 0; | |
7afe21cc RK |
5017 | |
5018 | sets[i].src = src; | |
2197a88a | 5019 | sets[i].src_hash = HASH (src, mode); |
7afe21cc RK |
5020 | sets[i].src_volatile = do_not_record; |
5021 | sets[i].src_in_memory = hash_arg_in_memory; | |
7afe21cc | 5022 | |
50196afa | 5023 | /* If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is |
43e72072 JJ |
5024 | a pseudo, do not record SRC. Using SRC as a replacement for |
5025 | anything else will be incorrect in that situation. Note that | |
5026 | this usually occurs only for stack slots, in which case all the | |
5027 | RTL would be referring to SRC, so we don't lose any optimization | |
5028 | opportunities by not having SRC in the hash table. */ | |
50196afa | 5029 | |
3c0cb5de | 5030 | if (MEM_P (src) |
43e72072 | 5031 | && find_reg_note (insn, REG_EQUIV, NULL_RTX) != 0 |
f8cfc6aa | 5032 | && REG_P (dest) |
43e72072 | 5033 | && REGNO (dest) >= FIRST_PSEUDO_REGISTER) |
50196afa RK |
5034 | sets[i].src_volatile = 1; |
5035 | ||
0dadecf6 RK |
5036 | #if 0 |
5037 | /* It is no longer clear why we used to do this, but it doesn't | |
5038 | appear to still be needed. So let's try without it since this | |
5039 | code hurts cse'ing widened ops. */ | |
9a5a17f3 | 5040 | /* If source is a paradoxical subreg (such as QI treated as an SI), |
7afe21cc RK |
5041 | treat it as volatile. It may do the work of an SI in one context |
5042 | where the extra bits are not being used, but cannot replace an SI | |
5043 | in general. */ | |
5044 | if (GET_CODE (src) == SUBREG | |
5045 | && (GET_MODE_SIZE (GET_MODE (src)) | |
5046 | > GET_MODE_SIZE (GET_MODE (SUBREG_REG (src))))) | |
5047 | sets[i].src_volatile = 1; | |
0dadecf6 | 5048 | #endif |
7afe21cc RK |
5049 | |
5050 | /* Locate all possible equivalent forms for SRC. Try to replace | |
5051 | SRC in the insn with each cheaper equivalent. | |
5052 | ||
5053 | We have the following types of equivalents: SRC itself, a folded | |
5054 | version, a value given in a REG_EQUAL note, or a value related | |
5055 | to a constant. | |
5056 | ||
5057 | Each of these equivalents may be part of an additional class | |
5058 | of equivalents (if more than one is in the table, they must be in | |
5059 | the same class; we check for this). | |
5060 | ||
5061 | If the source is volatile, we don't do any table lookups. | |
5062 | ||
5063 | We note any constant equivalent for possible later use in a | |
5064 | REG_NOTE. */ | |
5065 | ||
5066 | if (!sets[i].src_volatile) | |
2197a88a | 5067 | elt = lookup (src, sets[i].src_hash, mode); |
7afe21cc RK |
5068 | |
5069 | sets[i].src_elt = elt; | |
5070 | ||
5071 | if (elt && src_eqv_here && src_eqv_elt) | |
278a83b2 KH |
5072 | { |
5073 | if (elt->first_same_value != src_eqv_elt->first_same_value) | |
7afe21cc RK |
5074 | { |
5075 | /* The REG_EQUAL is indicating that two formerly distinct | |
5076 | classes are now equivalent. So merge them. */ | |
5077 | merge_equiv_classes (elt, src_eqv_elt); | |
2197a88a RK |
5078 | src_eqv_hash = HASH (src_eqv, elt->mode); |
5079 | src_eqv_elt = lookup (src_eqv, src_eqv_hash, elt->mode); | |
7afe21cc RK |
5080 | } |
5081 | ||
278a83b2 KH |
5082 | src_eqv_here = 0; |
5083 | } | |
7afe21cc RK |
5084 | |
5085 | else if (src_eqv_elt) | |
278a83b2 | 5086 | elt = src_eqv_elt; |
7afe21cc RK |
5087 | |
5088 | /* Try to find a constant somewhere and record it in `src_const'. | |
5089 | Record its table element, if any, in `src_const_elt'. Look in | |
5090 | any known equivalences first. (If the constant is not in the | |
2197a88a | 5091 | table, also set `sets[i].src_const_hash'). */ |
7afe21cc | 5092 | if (elt) |
278a83b2 | 5093 | for (p = elt->first_same_value; p; p = p->next_same_value) |
7afe21cc RK |
5094 | if (p->is_const) |
5095 | { | |
5096 | src_const = p->exp; | |
5097 | src_const_elt = elt; | |
5098 | break; | |
5099 | } | |
5100 | ||
5101 | if (src_const == 0 | |
5102 | && (CONSTANT_P (src_folded) | |
278a83b2 | 5103 | /* Consider (minus (label_ref L1) (label_ref L2)) as |
7afe21cc RK |
5104 | "constant" here so we will record it. This allows us |
5105 | to fold switch statements when an ADDR_DIFF_VEC is used. */ | |
5106 | || (GET_CODE (src_folded) == MINUS | |
5107 | && GET_CODE (XEXP (src_folded, 0)) == LABEL_REF | |
5108 | && GET_CODE (XEXP (src_folded, 1)) == LABEL_REF))) | |
5109 | src_const = src_folded, src_const_elt = elt; | |
5110 | else if (src_const == 0 && src_eqv_here && CONSTANT_P (src_eqv_here)) | |
5111 | src_const = src_eqv_here, src_const_elt = src_eqv_elt; | |
5112 | ||
5113 | /* If we don't know if the constant is in the table, get its | |
5114 | hash code and look it up. */ | |
5115 | if (src_const && src_const_elt == 0) | |
5116 | { | |
2197a88a RK |
5117 | sets[i].src_const_hash = HASH (src_const, mode); |
5118 | src_const_elt = lookup (src_const, sets[i].src_const_hash, mode); | |
7afe21cc RK |
5119 | } |
5120 | ||
5121 | sets[i].src_const = src_const; | |
5122 | sets[i].src_const_elt = src_const_elt; | |
5123 | ||
5124 | /* If the constant and our source are both in the table, mark them as | |
5125 | equivalent. Otherwise, if a constant is in the table but the source | |
5126 | isn't, set ELT to it. */ | |
5127 | if (src_const_elt && elt | |
5128 | && src_const_elt->first_same_value != elt->first_same_value) | |
5129 | merge_equiv_classes (elt, src_const_elt); | |
5130 | else if (src_const_elt && elt == 0) | |
5131 | elt = src_const_elt; | |
5132 | ||
5133 | /* See if there is a register linearly related to a constant | |
5134 | equivalent of SRC. */ | |
5135 | if (src_const | |
5136 | && (GET_CODE (src_const) == CONST | |
5137 | || (src_const_elt && src_const_elt->related_value != 0))) | |
278a83b2 KH |
5138 | { |
5139 | src_related = use_related_value (src_const, src_const_elt); | |
5140 | if (src_related) | |
5141 | { | |
7afe21cc | 5142 | struct table_elt *src_related_elt |
278a83b2 | 5143 | = lookup (src_related, HASH (src_related, mode), mode); |
7afe21cc | 5144 | if (src_related_elt && elt) |
278a83b2 | 5145 | { |
7afe21cc RK |
5146 | if (elt->first_same_value |
5147 | != src_related_elt->first_same_value) | |
278a83b2 | 5148 | /* This can occur when we previously saw a CONST |
7afe21cc RK |
5149 | involving a SYMBOL_REF and then see the SYMBOL_REF |
5150 | twice. Merge the involved classes. */ | |
5151 | merge_equiv_classes (elt, src_related_elt); | |
5152 | ||
278a83b2 | 5153 | src_related = 0; |
7afe21cc | 5154 | src_related_elt = 0; |
278a83b2 KH |
5155 | } |
5156 | else if (src_related_elt && elt == 0) | |
5157 | elt = src_related_elt; | |
7afe21cc | 5158 | } |
278a83b2 | 5159 | } |
7afe21cc | 5160 | |
e4600702 RK |
5161 | /* See if we have a CONST_INT that is already in a register in a |
5162 | wider mode. */ | |
5163 | ||
5164 | if (src_const && src_related == 0 && GET_CODE (src_const) == CONST_INT | |
5165 | && GET_MODE_CLASS (mode) == MODE_INT | |
5166 | && GET_MODE_BITSIZE (mode) < BITS_PER_WORD) | |
5167 | { | |
5168 | enum machine_mode wider_mode; | |
5169 | ||
5170 | for (wider_mode = GET_MODE_WIDER_MODE (mode); | |
5171 | GET_MODE_BITSIZE (wider_mode) <= BITS_PER_WORD | |
5172 | && src_related == 0; | |
5173 | wider_mode = GET_MODE_WIDER_MODE (wider_mode)) | |
5174 | { | |
5175 | struct table_elt *const_elt | |
5176 | = lookup (src_const, HASH (src_const, wider_mode), wider_mode); | |
5177 | ||
5178 | if (const_elt == 0) | |
5179 | continue; | |
5180 | ||
5181 | for (const_elt = const_elt->first_same_value; | |
5182 | const_elt; const_elt = const_elt->next_same_value) | |
f8cfc6aa | 5183 | if (REG_P (const_elt->exp)) |
e4600702 | 5184 | { |
4de249d9 | 5185 | src_related = gen_lowpart (mode, |
e4600702 RK |
5186 | const_elt->exp); |
5187 | break; | |
5188 | } | |
5189 | } | |
5190 | } | |
5191 | ||
d45cf215 RS |
5192 | /* Another possibility is that we have an AND with a constant in |
5193 | a mode narrower than a word. If so, it might have been generated | |
5194 | as part of an "if" which would narrow the AND. If we already | |
5195 | have done the AND in a wider mode, we can use a SUBREG of that | |
5196 | value. */ | |
5197 | ||
5198 | if (flag_expensive_optimizations && ! src_related | |
5199 | && GET_CODE (src) == AND && GET_CODE (XEXP (src, 1)) == CONST_INT | |
5200 | && GET_MODE_SIZE (mode) < UNITS_PER_WORD) | |
5201 | { | |
5202 | enum machine_mode tmode; | |
38a448ca | 5203 | rtx new_and = gen_rtx_AND (VOIDmode, NULL_RTX, XEXP (src, 1)); |
d45cf215 RS |
5204 | |
5205 | for (tmode = GET_MODE_WIDER_MODE (mode); | |
5206 | GET_MODE_SIZE (tmode) <= UNITS_PER_WORD; | |
5207 | tmode = GET_MODE_WIDER_MODE (tmode)) | |
5208 | { | |
4de249d9 | 5209 | rtx inner = gen_lowpart (tmode, XEXP (src, 0)); |
d45cf215 RS |
5210 | struct table_elt *larger_elt; |
5211 | ||
5212 | if (inner) | |
5213 | { | |
5214 | PUT_MODE (new_and, tmode); | |
5215 | XEXP (new_and, 0) = inner; | |
5216 | larger_elt = lookup (new_and, HASH (new_and, tmode), tmode); | |
5217 | if (larger_elt == 0) | |
5218 | continue; | |
5219 | ||
5220 | for (larger_elt = larger_elt->first_same_value; | |
5221 | larger_elt; larger_elt = larger_elt->next_same_value) | |
f8cfc6aa | 5222 | if (REG_P (larger_elt->exp)) |
d45cf215 RS |
5223 | { |
5224 | src_related | |
4de249d9 | 5225 | = gen_lowpart (mode, larger_elt->exp); |
d45cf215 RS |
5226 | break; |
5227 | } | |
5228 | ||
5229 | if (src_related) | |
5230 | break; | |
5231 | } | |
5232 | } | |
5233 | } | |
7bac1be0 RK |
5234 | |
5235 | #ifdef LOAD_EXTEND_OP | |
5236 | /* See if a MEM has already been loaded with a widening operation; | |
5237 | if it has, we can use a subreg of that. Many CISC machines | |
5238 | also have such operations, but this is only likely to be | |
71cc389b | 5239 | beneficial on these machines. */ |
278a83b2 | 5240 | |
ddc356e8 | 5241 | if (flag_expensive_optimizations && src_related == 0 |
7bac1be0 RK |
5242 | && (GET_MODE_SIZE (mode) < UNITS_PER_WORD) |
5243 | && GET_MODE_CLASS (mode) == MODE_INT | |
3c0cb5de | 5244 | && MEM_P (src) && ! do_not_record |
f822d252 | 5245 | && LOAD_EXTEND_OP (mode) != UNKNOWN) |
7bac1be0 | 5246 | { |
9d80ef7c RH |
5247 | struct rtx_def memory_extend_buf; |
5248 | rtx memory_extend_rtx = &memory_extend_buf; | |
7bac1be0 | 5249 | enum machine_mode tmode; |
278a83b2 | 5250 | |
7bac1be0 RK |
5251 | /* Set what we are trying to extend and the operation it might |
5252 | have been extended with. */ | |
9d80ef7c | 5253 | memset (memory_extend_rtx, 0, sizeof(*memory_extend_rtx)); |
7bac1be0 RK |
5254 | PUT_CODE (memory_extend_rtx, LOAD_EXTEND_OP (mode)); |
5255 | XEXP (memory_extend_rtx, 0) = src; | |
278a83b2 | 5256 | |
7bac1be0 RK |
5257 | for (tmode = GET_MODE_WIDER_MODE (mode); |
5258 | GET_MODE_SIZE (tmode) <= UNITS_PER_WORD; | |
5259 | tmode = GET_MODE_WIDER_MODE (tmode)) | |
5260 | { | |
5261 | struct table_elt *larger_elt; | |
278a83b2 | 5262 | |
7bac1be0 | 5263 | PUT_MODE (memory_extend_rtx, tmode); |
278a83b2 | 5264 | larger_elt = lookup (memory_extend_rtx, |
7bac1be0 RK |
5265 | HASH (memory_extend_rtx, tmode), tmode); |
5266 | if (larger_elt == 0) | |
5267 | continue; | |
278a83b2 | 5268 | |
7bac1be0 RK |
5269 | for (larger_elt = larger_elt->first_same_value; |
5270 | larger_elt; larger_elt = larger_elt->next_same_value) | |
f8cfc6aa | 5271 | if (REG_P (larger_elt->exp)) |
7bac1be0 | 5272 | { |
4de249d9 | 5273 | src_related = gen_lowpart (mode, |
7bac1be0 RK |
5274 | larger_elt->exp); |
5275 | break; | |
5276 | } | |
278a83b2 | 5277 | |
7bac1be0 RK |
5278 | if (src_related) |
5279 | break; | |
5280 | } | |
5281 | } | |
5282 | #endif /* LOAD_EXTEND_OP */ | |
278a83b2 | 5283 | |
7afe21cc | 5284 | if (src == src_folded) |
278a83b2 | 5285 | src_folded = 0; |
7afe21cc | 5286 | |
da7d8304 | 5287 | /* At this point, ELT, if nonzero, points to a class of expressions |
7afe21cc | 5288 | equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED, |
da7d8304 | 5289 | and SRC_RELATED, if nonzero, each contain additional equivalent |
7afe21cc RK |
5290 | expressions. Prune these latter expressions by deleting expressions |
5291 | already in the equivalence class. | |
5292 | ||
5293 | Check for an equivalent identical to the destination. If found, | |
5294 | this is the preferred equivalent since it will likely lead to | |
5295 | elimination of the insn. Indicate this by placing it in | |
5296 | `src_related'. */ | |
5297 | ||
278a83b2 KH |
5298 | if (elt) |
5299 | elt = elt->first_same_value; | |
7afe21cc | 5300 | for (p = elt; p; p = p->next_same_value) |
278a83b2 | 5301 | { |
7afe21cc RK |
5302 | enum rtx_code code = GET_CODE (p->exp); |
5303 | ||
5304 | /* If the expression is not valid, ignore it. Then we do not | |
5305 | have to check for validity below. In most cases, we can use | |
5306 | `rtx_equal_p', since canonicalization has already been done. */ | |
0516f6fe | 5307 | if (code != REG && ! exp_equiv_p (p->exp, p->exp, 1, false)) |
7afe21cc RK |
5308 | continue; |
5309 | ||
5a03c8c4 RK |
5310 | /* Also skip paradoxical subregs, unless that's what we're |
5311 | looking for. */ | |
5312 | if (code == SUBREG | |
5313 | && (GET_MODE_SIZE (GET_MODE (p->exp)) | |
5314 | > GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp)))) | |
5315 | && ! (src != 0 | |
5316 | && GET_CODE (src) == SUBREG | |
5317 | && GET_MODE (src) == GET_MODE (p->exp) | |
5318 | && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src))) | |
5319 | < GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp)))))) | |
5320 | continue; | |
5321 | ||
278a83b2 | 5322 | if (src && GET_CODE (src) == code && rtx_equal_p (src, p->exp)) |
7afe21cc | 5323 | src = 0; |
278a83b2 | 5324 | else if (src_folded && GET_CODE (src_folded) == code |
7afe21cc RK |
5325 | && rtx_equal_p (src_folded, p->exp)) |
5326 | src_folded = 0; | |
278a83b2 | 5327 | else if (src_eqv_here && GET_CODE (src_eqv_here) == code |
7afe21cc RK |
5328 | && rtx_equal_p (src_eqv_here, p->exp)) |
5329 | src_eqv_here = 0; | |
278a83b2 | 5330 | else if (src_related && GET_CODE (src_related) == code |
7afe21cc RK |
5331 | && rtx_equal_p (src_related, p->exp)) |
5332 | src_related = 0; | |
5333 | ||
5334 | /* This is the same as the destination of the insns, we want | |
5335 | to prefer it. Copy it to src_related. The code below will | |
5336 | then give it a negative cost. */ | |
5337 | if (GET_CODE (dest) == code && rtx_equal_p (p->exp, dest)) | |
5338 | src_related = dest; | |
278a83b2 | 5339 | } |
7afe21cc RK |
5340 | |
5341 | /* Find the cheapest valid equivalent, trying all the available | |
5342 | possibilities. Prefer items not in the hash table to ones | |
5343 | that are when they are equal cost. Note that we can never | |
5344 | worsen an insn as the current contents will also succeed. | |
05c33dd8 | 5345 | If we find an equivalent identical to the destination, use it as best, |
0f41302f | 5346 | since this insn will probably be eliminated in that case. */ |
7afe21cc RK |
5347 | if (src) |
5348 | { | |
5349 | if (rtx_equal_p (src, dest)) | |
f1c1dfc3 | 5350 | src_cost = src_regcost = -1; |
7afe21cc | 5351 | else |
630c79be BS |
5352 | { |
5353 | src_cost = COST (src); | |
5354 | src_regcost = approx_reg_cost (src); | |
5355 | } | |
7afe21cc RK |
5356 | } |
5357 | ||
5358 | if (src_eqv_here) | |
5359 | { | |
5360 | if (rtx_equal_p (src_eqv_here, dest)) | |
f1c1dfc3 | 5361 | src_eqv_cost = src_eqv_regcost = -1; |
7afe21cc | 5362 | else |
630c79be BS |
5363 | { |
5364 | src_eqv_cost = COST (src_eqv_here); | |
5365 | src_eqv_regcost = approx_reg_cost (src_eqv_here); | |
5366 | } | |
7afe21cc RK |
5367 | } |
5368 | ||
5369 | if (src_folded) | |
5370 | { | |
5371 | if (rtx_equal_p (src_folded, dest)) | |
f1c1dfc3 | 5372 | src_folded_cost = src_folded_regcost = -1; |
7afe21cc | 5373 | else |
630c79be BS |
5374 | { |
5375 | src_folded_cost = COST (src_folded); | |
5376 | src_folded_regcost = approx_reg_cost (src_folded); | |
5377 | } | |
7afe21cc RK |
5378 | } |
5379 | ||
5380 | if (src_related) | |
5381 | { | |
5382 | if (rtx_equal_p (src_related, dest)) | |
f1c1dfc3 | 5383 | src_related_cost = src_related_regcost = -1; |
7afe21cc | 5384 | else |
630c79be BS |
5385 | { |
5386 | src_related_cost = COST (src_related); | |
5387 | src_related_regcost = approx_reg_cost (src_related); | |
5388 | } | |
7afe21cc RK |
5389 | } |
5390 | ||
5391 | /* If this was an indirect jump insn, a known label will really be | |
5392 | cheaper even though it looks more expensive. */ | |
5393 | if (dest == pc_rtx && src_const && GET_CODE (src_const) == LABEL_REF) | |
99a9c946 | 5394 | src_folded = src_const, src_folded_cost = src_folded_regcost = -1; |
278a83b2 | 5395 | |
7afe21cc RK |
5396 | /* Terminate loop when replacement made. This must terminate since |
5397 | the current contents will be tested and will always be valid. */ | |
5398 | while (1) | |
278a83b2 KH |
5399 | { |
5400 | rtx trial; | |
7afe21cc | 5401 | |
278a83b2 | 5402 | /* Skip invalid entries. */ |
f8cfc6aa | 5403 | while (elt && !REG_P (elt->exp) |
0516f6fe | 5404 | && ! exp_equiv_p (elt->exp, elt->exp, 1, false)) |
278a83b2 | 5405 | elt = elt->next_same_value; |
5a03c8c4 RK |
5406 | |
5407 | /* A paradoxical subreg would be bad here: it'll be the right | |
5408 | size, but later may be adjusted so that the upper bits aren't | |
5409 | what we want. So reject it. */ | |
5410 | if (elt != 0 | |
5411 | && GET_CODE (elt->exp) == SUBREG | |
5412 | && (GET_MODE_SIZE (GET_MODE (elt->exp)) | |
5413 | > GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp)))) | |
5414 | /* It is okay, though, if the rtx we're trying to match | |
5415 | will ignore any of the bits we can't predict. */ | |
5416 | && ! (src != 0 | |
5417 | && GET_CODE (src) == SUBREG | |
5418 | && GET_MODE (src) == GET_MODE (elt->exp) | |
5419 | && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src))) | |
5420 | < GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp)))))) | |
5421 | { | |
5422 | elt = elt->next_same_value; | |
5423 | continue; | |
5424 | } | |
278a83b2 | 5425 | |
68252e27 | 5426 | if (elt) |
630c79be BS |
5427 | { |
5428 | src_elt_cost = elt->cost; | |
5429 | src_elt_regcost = elt->regcost; | |
5430 | } | |
7afe21cc | 5431 | |
68252e27 | 5432 | /* Find cheapest and skip it for the next time. For items |
7afe21cc RK |
5433 | of equal cost, use this order: |
5434 | src_folded, src, src_eqv, src_related and hash table entry. */ | |
99a9c946 | 5435 | if (src_folded |
56ae04af KH |
5436 | && preferable (src_folded_cost, src_folded_regcost, |
5437 | src_cost, src_regcost) <= 0 | |
5438 | && preferable (src_folded_cost, src_folded_regcost, | |
5439 | src_eqv_cost, src_eqv_regcost) <= 0 | |
5440 | && preferable (src_folded_cost, src_folded_regcost, | |
5441 | src_related_cost, src_related_regcost) <= 0 | |
5442 | && preferable (src_folded_cost, src_folded_regcost, | |
5443 | src_elt_cost, src_elt_regcost) <= 0) | |
7afe21cc | 5444 | { |
f1c1dfc3 | 5445 | trial = src_folded, src_folded_cost = MAX_COST; |
7afe21cc | 5446 | if (src_folded_force_flag) |
9d8de1de EB |
5447 | { |
5448 | rtx forced = force_const_mem (mode, trial); | |
5449 | if (forced) | |
5450 | trial = forced; | |
5451 | } | |
7afe21cc | 5452 | } |
99a9c946 | 5453 | else if (src |
56ae04af KH |
5454 | && preferable (src_cost, src_regcost, |
5455 | src_eqv_cost, src_eqv_regcost) <= 0 | |
5456 | && preferable (src_cost, src_regcost, | |
5457 | src_related_cost, src_related_regcost) <= 0 | |
5458 | && preferable (src_cost, src_regcost, | |
5459 | src_elt_cost, src_elt_regcost) <= 0) | |
f1c1dfc3 | 5460 | trial = src, src_cost = MAX_COST; |
99a9c946 | 5461 | else if (src_eqv_here |
56ae04af KH |
5462 | && preferable (src_eqv_cost, src_eqv_regcost, |
5463 | src_related_cost, src_related_regcost) <= 0 | |
5464 | && preferable (src_eqv_cost, src_eqv_regcost, | |
5465 | src_elt_cost, src_elt_regcost) <= 0) | |
f1c1dfc3 | 5466 | trial = copy_rtx (src_eqv_here), src_eqv_cost = MAX_COST; |
99a9c946 | 5467 | else if (src_related |
56ae04af KH |
5468 | && preferable (src_related_cost, src_related_regcost, |
5469 | src_elt_cost, src_elt_regcost) <= 0) | |
68252e27 | 5470 | trial = copy_rtx (src_related), src_related_cost = MAX_COST; |
278a83b2 | 5471 | else |
7afe21cc | 5472 | { |
05c33dd8 | 5473 | trial = copy_rtx (elt->exp); |
7afe21cc | 5474 | elt = elt->next_same_value; |
f1c1dfc3 | 5475 | src_elt_cost = MAX_COST; |
7afe21cc RK |
5476 | } |
5477 | ||
5478 | /* We don't normally have an insn matching (set (pc) (pc)), so | |
5479 | check for this separately here. We will delete such an | |
5480 | insn below. | |
5481 | ||
d466c016 JL |
5482 | For other cases such as a table jump or conditional jump |
5483 | where we know the ultimate target, go ahead and replace the | |
5484 | operand. While that may not make a valid insn, we will | |
5485 | reemit the jump below (and also insert any necessary | |
5486 | barriers). */ | |
7afe21cc RK |
5487 | if (n_sets == 1 && dest == pc_rtx |
5488 | && (trial == pc_rtx | |
5489 | || (GET_CODE (trial) == LABEL_REF | |
5490 | && ! condjump_p (insn)))) | |
5491 | { | |
2f39b6ca UW |
5492 | /* Don't substitute non-local labels, this confuses CFG. */ |
5493 | if (GET_CODE (trial) == LABEL_REF | |
5494 | && LABEL_REF_NONLOCAL_P (trial)) | |
5495 | continue; | |
5496 | ||
d466c016 | 5497 | SET_SRC (sets[i].rtl) = trial; |
602c4c0d | 5498 | cse_jumps_altered = 1; |
7afe21cc RK |
5499 | break; |
5500 | } | |
278a83b2 | 5501 | |
7afe21cc | 5502 | /* Look for a substitution that makes a valid insn. */ |
ddc356e8 | 5503 | else if (validate_change (insn, &SET_SRC (sets[i].rtl), trial, 0)) |
05c33dd8 | 5504 | { |
dbaff908 RS |
5505 | rtx new = canon_reg (SET_SRC (sets[i].rtl), insn); |
5506 | ||
7bd8b2a8 JL |
5507 | /* If we just made a substitution inside a libcall, then we |
5508 | need to make the same substitution in any notes attached | |
5509 | to the RETVAL insn. */ | |
1ed0205e | 5510 | if (libcall_insn |
f8cfc6aa | 5511 | && (REG_P (sets[i].orig_src) |
47841d1b | 5512 | || GET_CODE (sets[i].orig_src) == SUBREG |
3c0cb5de | 5513 | || MEM_P (sets[i].orig_src))) |
d8b7ec41 RS |
5514 | { |
5515 | rtx note = find_reg_equal_equiv_note (libcall_insn); | |
5516 | if (note != 0) | |
5517 | XEXP (note, 0) = simplify_replace_rtx (XEXP (note, 0), | |
5518 | sets[i].orig_src, | |
5519 | copy_rtx (new)); | |
5520 | } | |
7bd8b2a8 | 5521 | |
7722328e RK |
5522 | /* The result of apply_change_group can be ignored; see |
5523 | canon_reg. */ | |
5524 | ||
dbaff908 | 5525 | validate_change (insn, &SET_SRC (sets[i].rtl), new, 1); |
6702af89 | 5526 | apply_change_group (); |
05c33dd8 RK |
5527 | break; |
5528 | } | |
7afe21cc | 5529 | |
278a83b2 | 5530 | /* If we previously found constant pool entries for |
7afe21cc RK |
5531 | constants and this is a constant, try making a |
5532 | pool entry. Put it in src_folded unless we already have done | |
5533 | this since that is where it likely came from. */ | |
5534 | ||
5535 | else if (constant_pool_entries_cost | |
5536 | && CONSTANT_P (trial) | |
535a42b1 NS |
5537 | /* Reject cases that will cause decode_rtx_const to |
5538 | die. On the alpha when simplifying a switch, we | |
5539 | get (const (truncate (minus (label_ref) | |
5540 | (label_ref)))). */ | |
1bbd065b RK |
5541 | && ! (GET_CODE (trial) == CONST |
5542 | && GET_CODE (XEXP (trial, 0)) == TRUNCATE) | |
d51ff7cb JW |
5543 | /* Likewise on IA-64, except without the truncate. */ |
5544 | && ! (GET_CODE (trial) == CONST | |
5545 | && GET_CODE (XEXP (trial, 0)) == MINUS | |
5546 | && GET_CODE (XEXP (XEXP (trial, 0), 0)) == LABEL_REF | |
5547 | && GET_CODE (XEXP (XEXP (trial, 0), 1)) == LABEL_REF) | |
1bbd065b | 5548 | && (src_folded == 0 |
3c0cb5de | 5549 | || (!MEM_P (src_folded) |
1bbd065b | 5550 | && ! src_folded_force_flag)) |
9ae8ffe7 JL |
5551 | && GET_MODE_CLASS (mode) != MODE_CC |
5552 | && mode != VOIDmode) | |
7afe21cc RK |
5553 | { |
5554 | src_folded_force_flag = 1; | |
5555 | src_folded = trial; | |
5556 | src_folded_cost = constant_pool_entries_cost; | |
dd0ba281 | 5557 | src_folded_regcost = constant_pool_entries_regcost; |
7afe21cc | 5558 | } |
278a83b2 | 5559 | } |
7afe21cc RK |
5560 | |
5561 | src = SET_SRC (sets[i].rtl); | |
5562 | ||
5563 | /* In general, it is good to have a SET with SET_SRC == SET_DEST. | |
5564 | However, there is an important exception: If both are registers | |
5565 | that are not the head of their equivalence class, replace SET_SRC | |
5566 | with the head of the class. If we do not do this, we will have | |
5567 | both registers live over a portion of the basic block. This way, | |
5568 | their lifetimes will likely abut instead of overlapping. */ | |
f8cfc6aa | 5569 | if (REG_P (dest) |
1bb98cec | 5570 | && REGNO_QTY_VALID_P (REGNO (dest))) |
7afe21cc | 5571 | { |
1bb98cec DM |
5572 | int dest_q = REG_QTY (REGNO (dest)); |
5573 | struct qty_table_elem *dest_ent = &qty_table[dest_q]; | |
5574 | ||
5575 | if (dest_ent->mode == GET_MODE (dest) | |
5576 | && dest_ent->first_reg != REGNO (dest) | |
f8cfc6aa | 5577 | && REG_P (src) && REGNO (src) == REGNO (dest) |
1bb98cec DM |
5578 | /* Don't do this if the original insn had a hard reg as |
5579 | SET_SRC or SET_DEST. */ | |
f8cfc6aa | 5580 | && (!REG_P (sets[i].src) |
1bb98cec | 5581 | || REGNO (sets[i].src) >= FIRST_PSEUDO_REGISTER) |
f8cfc6aa | 5582 | && (!REG_P (dest) || REGNO (dest) >= FIRST_PSEUDO_REGISTER)) |
1bb98cec DM |
5583 | /* We can't call canon_reg here because it won't do anything if |
5584 | SRC is a hard register. */ | |
759bd8b7 | 5585 | { |
1bb98cec DM |
5586 | int src_q = REG_QTY (REGNO (src)); |
5587 | struct qty_table_elem *src_ent = &qty_table[src_q]; | |
5588 | int first = src_ent->first_reg; | |
5589 | rtx new_src | |
5590 | = (first >= FIRST_PSEUDO_REGISTER | |
5591 | ? regno_reg_rtx[first] : gen_rtx_REG (GET_MODE (src), first)); | |
5592 | ||
5593 | /* We must use validate-change even for this, because this | |
5594 | might be a special no-op instruction, suitable only to | |
5595 | tag notes onto. */ | |
5596 | if (validate_change (insn, &SET_SRC (sets[i].rtl), new_src, 0)) | |
5597 | { | |
5598 | src = new_src; | |
5599 | /* If we had a constant that is cheaper than what we are now | |
5600 | setting SRC to, use that constant. We ignored it when we | |
5601 | thought we could make this into a no-op. */ | |
5602 | if (src_const && COST (src_const) < COST (src) | |
278a83b2 KH |
5603 | && validate_change (insn, &SET_SRC (sets[i].rtl), |
5604 | src_const, 0)) | |
1bb98cec DM |
5605 | src = src_const; |
5606 | } | |
759bd8b7 | 5607 | } |
7afe21cc RK |
5608 | } |
5609 | ||
5610 | /* If we made a change, recompute SRC values. */ | |
5611 | if (src != sets[i].src) | |
278a83b2 | 5612 | { |
4eadede7 | 5613 | cse_altered = 1; |
278a83b2 KH |
5614 | do_not_record = 0; |
5615 | hash_arg_in_memory = 0; | |
7afe21cc | 5616 | sets[i].src = src; |
278a83b2 KH |
5617 | sets[i].src_hash = HASH (src, mode); |
5618 | sets[i].src_volatile = do_not_record; | |
5619 | sets[i].src_in_memory = hash_arg_in_memory; | |
5620 | sets[i].src_elt = lookup (src, sets[i].src_hash, mode); | |
5621 | } | |
7afe21cc RK |
5622 | |
5623 | /* If this is a single SET, we are setting a register, and we have an | |
5624 | equivalent constant, we want to add a REG_NOTE. We don't want | |
5625 | to write a REG_EQUAL note for a constant pseudo since verifying that | |
d45cf215 | 5626 | that pseudo hasn't been eliminated is a pain. Such a note also |
278a83b2 | 5627 | won't help anything. |
ac7ef8d5 FS |
5628 | |
5629 | Avoid a REG_EQUAL note for (CONST (MINUS (LABEL_REF) (LABEL_REF))) | |
5630 | which can be created for a reference to a compile time computable | |
5631 | entry in a jump table. */ | |
5632 | ||
f8cfc6aa JQ |
5633 | if (n_sets == 1 && src_const && REG_P (dest) |
5634 | && !REG_P (src_const) | |
ac7ef8d5 FS |
5635 | && ! (GET_CODE (src_const) == CONST |
5636 | && GET_CODE (XEXP (src_const, 0)) == MINUS | |
5637 | && GET_CODE (XEXP (XEXP (src_const, 0), 0)) == LABEL_REF | |
5638 | && GET_CODE (XEXP (XEXP (src_const, 0), 1)) == LABEL_REF)) | |
7afe21cc | 5639 | { |
a77b7e32 RS |
5640 | /* We only want a REG_EQUAL note if src_const != src. */ |
5641 | if (! rtx_equal_p (src, src_const)) | |
5642 | { | |
5643 | /* Make sure that the rtx is not shared. */ | |
5644 | src_const = copy_rtx (src_const); | |
51e2a951 | 5645 | |
a77b7e32 RS |
5646 | /* Record the actual constant value in a REG_EQUAL note, |
5647 | making a new one if one does not already exist. */ | |
5648 | set_unique_reg_note (insn, REG_EQUAL, src_const); | |
5649 | } | |
7afe21cc RK |
5650 | } |
5651 | ||
5652 | /* Now deal with the destination. */ | |
5653 | do_not_record = 0; | |
7afe21cc | 5654 | |
46d096a3 SB |
5655 | /* Look within any ZERO_EXTRACT to the MEM or REG within it. */ |
5656 | while (GET_CODE (dest) == SUBREG | |
7afe21cc | 5657 | || GET_CODE (dest) == ZERO_EXTRACT |
7afe21cc | 5658 | || GET_CODE (dest) == STRICT_LOW_PART) |
0339ce7e | 5659 | dest = XEXP (dest, 0); |
7afe21cc RK |
5660 | |
5661 | sets[i].inner_dest = dest; | |
5662 | ||
3c0cb5de | 5663 | if (MEM_P (dest)) |
7afe21cc | 5664 | { |
9ae8ffe7 JL |
5665 | #ifdef PUSH_ROUNDING |
5666 | /* Stack pushes invalidate the stack pointer. */ | |
5667 | rtx addr = XEXP (dest, 0); | |
ec8e098d | 5668 | if (GET_RTX_CLASS (GET_CODE (addr)) == RTX_AUTOINC |
9ae8ffe7 JL |
5669 | && XEXP (addr, 0) == stack_pointer_rtx) |
5670 | invalidate (stack_pointer_rtx, Pmode); | |
5671 | #endif | |
7afe21cc | 5672 | dest = fold_rtx (dest, insn); |
7afe21cc RK |
5673 | } |
5674 | ||
5675 | /* Compute the hash code of the destination now, | |
5676 | before the effects of this instruction are recorded, | |
5677 | since the register values used in the address computation | |
5678 | are those before this instruction. */ | |
2197a88a | 5679 | sets[i].dest_hash = HASH (dest, mode); |
7afe21cc RK |
5680 | |
5681 | /* Don't enter a bit-field in the hash table | |
5682 | because the value in it after the store | |
5683 | may not equal what was stored, due to truncation. */ | |
5684 | ||
46d096a3 | 5685 | if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT) |
7afe21cc RK |
5686 | { |
5687 | rtx width = XEXP (SET_DEST (sets[i].rtl), 1); | |
5688 | ||
5689 | if (src_const != 0 && GET_CODE (src_const) == CONST_INT | |
5690 | && GET_CODE (width) == CONST_INT | |
906c4e36 RK |
5691 | && INTVAL (width) < HOST_BITS_PER_WIDE_INT |
5692 | && ! (INTVAL (src_const) | |
5693 | & ((HOST_WIDE_INT) (-1) << INTVAL (width)))) | |
7afe21cc RK |
5694 | /* Exception: if the value is constant, |
5695 | and it won't be truncated, record it. */ | |
5696 | ; | |
5697 | else | |
5698 | { | |
5699 | /* This is chosen so that the destination will be invalidated | |
5700 | but no new value will be recorded. | |
5701 | We must invalidate because sometimes constant | |
5702 | values can be recorded for bitfields. */ | |
5703 | sets[i].src_elt = 0; | |
5704 | sets[i].src_volatile = 1; | |
5705 | src_eqv = 0; | |
5706 | src_eqv_elt = 0; | |
5707 | } | |
5708 | } | |
5709 | ||
5710 | /* If only one set in a JUMP_INSN and it is now a no-op, we can delete | |
5711 | the insn. */ | |
5712 | else if (n_sets == 1 && dest == pc_rtx && src == pc_rtx) | |
5713 | { | |
ef178af3 | 5714 | /* One less use of the label this insn used to jump to. */ |
49ce134f | 5715 | delete_insn (insn); |
7afe21cc | 5716 | cse_jumps_altered = 1; |
7afe21cc RK |
5717 | /* No more processing for this set. */ |
5718 | sets[i].rtl = 0; | |
5719 | } | |
5720 | ||
5721 | /* If this SET is now setting PC to a label, we know it used to | |
d466c016 | 5722 | be a conditional or computed branch. */ |
8f235343 JH |
5723 | else if (dest == pc_rtx && GET_CODE (src) == LABEL_REF |
5724 | && !LABEL_REF_NONLOCAL_P (src)) | |
7afe21cc | 5725 | { |
8fb1e50e GS |
5726 | /* Now emit a BARRIER after the unconditional jump. */ |
5727 | if (NEXT_INSN (insn) == 0 | |
4b4bf941 | 5728 | || !BARRIER_P (NEXT_INSN (insn))) |
8fb1e50e GS |
5729 | emit_barrier_after (insn); |
5730 | ||
d466c016 JL |
5731 | /* We reemit the jump in as many cases as possible just in |
5732 | case the form of an unconditional jump is significantly | |
5733 | different than a computed jump or conditional jump. | |
5734 | ||
5735 | If this insn has multiple sets, then reemitting the | |
5736 | jump is nontrivial. So instead we just force rerecognition | |
5737 | and hope for the best. */ | |
5738 | if (n_sets == 1) | |
7afe21cc | 5739 | { |
9dcb4381 | 5740 | rtx new, note; |
8fb1e50e | 5741 | |
9dcb4381 | 5742 | new = emit_jump_insn_after (gen_jump (XEXP (src, 0)), insn); |
7afe21cc RK |
5743 | JUMP_LABEL (new) = XEXP (src, 0); |
5744 | LABEL_NUSES (XEXP (src, 0))++; | |
9dcb4381 RH |
5745 | |
5746 | /* Make sure to copy over REG_NON_LOCAL_GOTO. */ | |
5747 | note = find_reg_note (insn, REG_NON_LOCAL_GOTO, 0); | |
5748 | if (note) | |
5749 | { | |
5750 | XEXP (note, 1) = NULL_RTX; | |
5751 | REG_NOTES (new) = note; | |
5752 | } | |
5753 | ||
38c1593d | 5754 | delete_insn (insn); |
7afe21cc | 5755 | insn = new; |
8fb1e50e GS |
5756 | |
5757 | /* Now emit a BARRIER after the unconditional jump. */ | |
5758 | if (NEXT_INSN (insn) == 0 | |
4b4bf941 | 5759 | || !BARRIER_P (NEXT_INSN (insn))) |
8fb1e50e | 5760 | emit_barrier_after (insn); |
7afe21cc | 5761 | } |
31dcf83f | 5762 | else |
31dcf83f | 5763 | INSN_CODE (insn) = -1; |
7afe21cc | 5764 | |
8fb1e50e GS |
5765 | /* Do not bother deleting any unreachable code, |
5766 | let jump/flow do that. */ | |
7afe21cc RK |
5767 | |
5768 | cse_jumps_altered = 1; | |
5769 | sets[i].rtl = 0; | |
5770 | } | |
5771 | ||
c2a47e48 RK |
5772 | /* If destination is volatile, invalidate it and then do no further |
5773 | processing for this assignment. */ | |
7afe21cc RK |
5774 | |
5775 | else if (do_not_record) | |
c2a47e48 | 5776 | { |
f8cfc6aa | 5777 | if (REG_P (dest) || GET_CODE (dest) == SUBREG) |
bb4034b3 | 5778 | invalidate (dest, VOIDmode); |
3c0cb5de | 5779 | else if (MEM_P (dest)) |
32fab725 | 5780 | invalidate (dest, VOIDmode); |
2708da92 RS |
5781 | else if (GET_CODE (dest) == STRICT_LOW_PART |
5782 | || GET_CODE (dest) == ZERO_EXTRACT) | |
bb4034b3 | 5783 | invalidate (XEXP (dest, 0), GET_MODE (dest)); |
c2a47e48 RK |
5784 | sets[i].rtl = 0; |
5785 | } | |
7afe21cc RK |
5786 | |
5787 | if (sets[i].rtl != 0 && dest != SET_DEST (sets[i].rtl)) | |
2197a88a | 5788 | sets[i].dest_hash = HASH (SET_DEST (sets[i].rtl), mode); |
7afe21cc RK |
5789 | |
5790 | #ifdef HAVE_cc0 | |
5791 | /* If setting CC0, record what it was set to, or a constant, if it | |
5792 | is equivalent to a constant. If it is being set to a floating-point | |
5793 | value, make a COMPARE with the appropriate constant of 0. If we | |
5794 | don't do this, later code can interpret this as a test against | |
5795 | const0_rtx, which can cause problems if we try to put it into an | |
5796 | insn as a floating-point operand. */ | |
5797 | if (dest == cc0_rtx) | |
5798 | { | |
5799 | this_insn_cc0 = src_const && mode != VOIDmode ? src_const : src; | |
5800 | this_insn_cc0_mode = mode; | |
cbf6a543 | 5801 | if (FLOAT_MODE_P (mode)) |
38a448ca RH |
5802 | this_insn_cc0 = gen_rtx_COMPARE (VOIDmode, this_insn_cc0, |
5803 | CONST0_RTX (mode)); | |
7afe21cc RK |
5804 | } |
5805 | #endif | |
5806 | } | |
5807 | ||
5808 | /* Now enter all non-volatile source expressions in the hash table | |
5809 | if they are not already present. | |
5810 | Record their equivalence classes in src_elt. | |
5811 | This way we can insert the corresponding destinations into | |
5812 | the same classes even if the actual sources are no longer in them | |
5813 | (having been invalidated). */ | |
5814 | ||
5815 | if (src_eqv && src_eqv_elt == 0 && sets[0].rtl != 0 && ! src_eqv_volatile | |
5816 | && ! rtx_equal_p (src_eqv, SET_DEST (sets[0].rtl))) | |
5817 | { | |
b3694847 SS |
5818 | struct table_elt *elt; |
5819 | struct table_elt *classp = sets[0].src_elt; | |
7afe21cc RK |
5820 | rtx dest = SET_DEST (sets[0].rtl); |
5821 | enum machine_mode eqvmode = GET_MODE (dest); | |
5822 | ||
5823 | if (GET_CODE (dest) == STRICT_LOW_PART) | |
5824 | { | |
5825 | eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0))); | |
5826 | classp = 0; | |
5827 | } | |
5828 | if (insert_regs (src_eqv, classp, 0)) | |
8ae2b8f6 JW |
5829 | { |
5830 | rehash_using_reg (src_eqv); | |
5831 | src_eqv_hash = HASH (src_eqv, eqvmode); | |
5832 | } | |
2197a88a | 5833 | elt = insert (src_eqv, classp, src_eqv_hash, eqvmode); |
7afe21cc | 5834 | elt->in_memory = src_eqv_in_memory; |
7afe21cc | 5835 | src_eqv_elt = elt; |
f7911249 JW |
5836 | |
5837 | /* Check to see if src_eqv_elt is the same as a set source which | |
5838 | does not yet have an elt, and if so set the elt of the set source | |
5839 | to src_eqv_elt. */ | |
5840 | for (i = 0; i < n_sets; i++) | |
26132f71 JW |
5841 | if (sets[i].rtl && sets[i].src_elt == 0 |
5842 | && rtx_equal_p (SET_SRC (sets[i].rtl), src_eqv)) | |
f7911249 | 5843 | sets[i].src_elt = src_eqv_elt; |
7afe21cc RK |
5844 | } |
5845 | ||
5846 | for (i = 0; i < n_sets; i++) | |
5847 | if (sets[i].rtl && ! sets[i].src_volatile | |
5848 | && ! rtx_equal_p (SET_SRC (sets[i].rtl), SET_DEST (sets[i].rtl))) | |
5849 | { | |
5850 | if (GET_CODE (SET_DEST (sets[i].rtl)) == STRICT_LOW_PART) | |
5851 | { | |
5852 | /* REG_EQUAL in setting a STRICT_LOW_PART | |
5853 | gives an equivalent for the entire destination register, | |
5854 | not just for the subreg being stored in now. | |
5855 | This is a more interesting equivalence, so we arrange later | |
5856 | to treat the entire reg as the destination. */ | |
5857 | sets[i].src_elt = src_eqv_elt; | |
2197a88a | 5858 | sets[i].src_hash = src_eqv_hash; |
7afe21cc RK |
5859 | } |
5860 | else | |
5861 | { | |
5862 | /* Insert source and constant equivalent into hash table, if not | |
5863 | already present. */ | |
b3694847 SS |
5864 | struct table_elt *classp = src_eqv_elt; |
5865 | rtx src = sets[i].src; | |
5866 | rtx dest = SET_DEST (sets[i].rtl); | |
7afe21cc RK |
5867 | enum machine_mode mode |
5868 | = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src); | |
5869 | ||
1fcc57f1 AM |
5870 | /* It's possible that we have a source value known to be |
5871 | constant but don't have a REG_EQUAL note on the insn. | |
5872 | Lack of a note will mean src_eqv_elt will be NULL. This | |
5873 | can happen where we've generated a SUBREG to access a | |
5874 | CONST_INT that is already in a register in a wider mode. | |
5875 | Ensure that the source expression is put in the proper | |
5876 | constant class. */ | |
5877 | if (!classp) | |
5878 | classp = sets[i].src_const_elt; | |
5879 | ||
26132f71 | 5880 | if (sets[i].src_elt == 0) |
7afe21cc | 5881 | { |
26132f71 JW |
5882 | /* Don't put a hard register source into the table if this is |
5883 | the last insn of a libcall. In this case, we only need | |
5884 | to put src_eqv_elt in src_elt. */ | |
db4a8254 | 5885 | if (! find_reg_note (insn, REG_RETVAL, NULL_RTX)) |
8ae2b8f6 | 5886 | { |
b3694847 | 5887 | struct table_elt *elt; |
26132f71 JW |
5888 | |
5889 | /* Note that these insert_regs calls cannot remove | |
5890 | any of the src_elt's, because they would have failed to | |
5891 | match if not still valid. */ | |
5892 | if (insert_regs (src, classp, 0)) | |
5893 | { | |
5894 | rehash_using_reg (src); | |
5895 | sets[i].src_hash = HASH (src, mode); | |
5896 | } | |
5897 | elt = insert (src, classp, sets[i].src_hash, mode); | |
5898 | elt->in_memory = sets[i].src_in_memory; | |
26132f71 | 5899 | sets[i].src_elt = classp = elt; |
8ae2b8f6 | 5900 | } |
26132f71 JW |
5901 | else |
5902 | sets[i].src_elt = classp; | |
7afe21cc | 5903 | } |
7afe21cc RK |
5904 | if (sets[i].src_const && sets[i].src_const_elt == 0 |
5905 | && src != sets[i].src_const | |
5906 | && ! rtx_equal_p (sets[i].src_const, src)) | |
5907 | sets[i].src_elt = insert (sets[i].src_const, classp, | |
2197a88a | 5908 | sets[i].src_const_hash, mode); |
7afe21cc RK |
5909 | } |
5910 | } | |
5911 | else if (sets[i].src_elt == 0) | |
5912 | /* If we did not insert the source into the hash table (e.g., it was | |
5913 | volatile), note the equivalence class for the REG_EQUAL value, if any, | |
5914 | so that the destination goes into that class. */ | |
5915 | sets[i].src_elt = src_eqv_elt; | |
5916 | ||
9ae8ffe7 | 5917 | invalidate_from_clobbers (x); |
77fa0940 | 5918 | |
278a83b2 | 5919 | /* Some registers are invalidated by subroutine calls. Memory is |
77fa0940 RK |
5920 | invalidated by non-constant calls. */ |
5921 | ||
4b4bf941 | 5922 | if (CALL_P (insn)) |
7afe21cc | 5923 | { |
24a28584 | 5924 | if (! CONST_OR_PURE_CALL_P (insn)) |
9ae8ffe7 | 5925 | invalidate_memory (); |
7afe21cc RK |
5926 | invalidate_for_call (); |
5927 | } | |
5928 | ||
5929 | /* Now invalidate everything set by this instruction. | |
5930 | If a SUBREG or other funny destination is being set, | |
5931 | sets[i].rtl is still nonzero, so here we invalidate the reg | |
5932 | a part of which is being set. */ | |
5933 | ||
5934 | for (i = 0; i < n_sets; i++) | |
5935 | if (sets[i].rtl) | |
5936 | { | |
bb4034b3 JW |
5937 | /* We can't use the inner dest, because the mode associated with |
5938 | a ZERO_EXTRACT is significant. */ | |
b3694847 | 5939 | rtx dest = SET_DEST (sets[i].rtl); |
7afe21cc RK |
5940 | |
5941 | /* Needed for registers to remove the register from its | |
5942 | previous quantity's chain. | |
5943 | Needed for memory if this is a nonvarying address, unless | |
5944 | we have just done an invalidate_memory that covers even those. */ | |
f8cfc6aa | 5945 | if (REG_P (dest) || GET_CODE (dest) == SUBREG) |
bb4034b3 | 5946 | invalidate (dest, VOIDmode); |
3c0cb5de | 5947 | else if (MEM_P (dest)) |
32fab725 | 5948 | invalidate (dest, VOIDmode); |
2708da92 RS |
5949 | else if (GET_CODE (dest) == STRICT_LOW_PART |
5950 | || GET_CODE (dest) == ZERO_EXTRACT) | |
bb4034b3 | 5951 | invalidate (XEXP (dest, 0), GET_MODE (dest)); |
7afe21cc RK |
5952 | } |
5953 | ||
01e752d3 | 5954 | /* A volatile ASM invalidates everything. */ |
4b4bf941 | 5955 | if (NONJUMP_INSN_P (insn) |
01e752d3 JL |
5956 | && GET_CODE (PATTERN (insn)) == ASM_OPERANDS |
5957 | && MEM_VOLATILE_P (PATTERN (insn))) | |
5958 | flush_hash_table (); | |
5959 | ||
7afe21cc RK |
5960 | /* Make sure registers mentioned in destinations |
5961 | are safe for use in an expression to be inserted. | |
5962 | This removes from the hash table | |
5963 | any invalid entry that refers to one of these registers. | |
5964 | ||
5965 | We don't care about the return value from mention_regs because | |
5966 | we are going to hash the SET_DEST values unconditionally. */ | |
5967 | ||
5968 | for (i = 0; i < n_sets; i++) | |
34c73909 R |
5969 | { |
5970 | if (sets[i].rtl) | |
5971 | { | |
5972 | rtx x = SET_DEST (sets[i].rtl); | |
5973 | ||
f8cfc6aa | 5974 | if (!REG_P (x)) |
34c73909 R |
5975 | mention_regs (x); |
5976 | else | |
5977 | { | |
5978 | /* We used to rely on all references to a register becoming | |
5979 | inaccessible when a register changes to a new quantity, | |
5980 | since that changes the hash code. However, that is not | |
9b1549b8 | 5981 | safe, since after HASH_SIZE new quantities we get a |
34c73909 R |
5982 | hash 'collision' of a register with its own invalid |
5983 | entries. And since SUBREGs have been changed not to | |
5984 | change their hash code with the hash code of the register, | |
5985 | it wouldn't work any longer at all. So we have to check | |
5986 | for any invalid references lying around now. | |
5987 | This code is similar to the REG case in mention_regs, | |
5988 | but it knows that reg_tick has been incremented, and | |
5989 | it leaves reg_in_table as -1 . */ | |
770ae6cc RK |
5990 | unsigned int regno = REGNO (x); |
5991 | unsigned int endregno | |
34c73909 | 5992 | = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1 |
66fd46b6 | 5993 | : hard_regno_nregs[regno][GET_MODE (x)]); |
770ae6cc | 5994 | unsigned int i; |
34c73909 R |
5995 | |
5996 | for (i = regno; i < endregno; i++) | |
5997 | { | |
30f72379 | 5998 | if (REG_IN_TABLE (i) >= 0) |
34c73909 R |
5999 | { |
6000 | remove_invalid_refs (i); | |
30f72379 | 6001 | REG_IN_TABLE (i) = -1; |
34c73909 R |
6002 | } |
6003 | } | |
6004 | } | |
6005 | } | |
6006 | } | |
7afe21cc RK |
6007 | |
6008 | /* We may have just removed some of the src_elt's from the hash table. | |
6009 | So replace each one with the current head of the same class. */ | |
6010 | ||
6011 | for (i = 0; i < n_sets; i++) | |
6012 | if (sets[i].rtl) | |
6013 | { | |
6014 | if (sets[i].src_elt && sets[i].src_elt->first_same_value == 0) | |
6015 | /* If elt was removed, find current head of same class, | |
6016 | or 0 if nothing remains of that class. */ | |
6017 | { | |
b3694847 | 6018 | struct table_elt *elt = sets[i].src_elt; |
7afe21cc RK |
6019 | |
6020 | while (elt && elt->prev_same_value) | |
6021 | elt = elt->prev_same_value; | |
6022 | ||
6023 | while (elt && elt->first_same_value == 0) | |
6024 | elt = elt->next_same_value; | |
6025 | sets[i].src_elt = elt ? elt->first_same_value : 0; | |
6026 | } | |
6027 | } | |
6028 | ||
6029 | /* Now insert the destinations into their equivalence classes. */ | |
6030 | ||
6031 | for (i = 0; i < n_sets; i++) | |
6032 | if (sets[i].rtl) | |
6033 | { | |
b3694847 | 6034 | rtx dest = SET_DEST (sets[i].rtl); |
b3694847 | 6035 | struct table_elt *elt; |
7afe21cc RK |
6036 | |
6037 | /* Don't record value if we are not supposed to risk allocating | |
6038 | floating-point values in registers that might be wider than | |
6039 | memory. */ | |
6040 | if ((flag_float_store | |
3c0cb5de | 6041 | && MEM_P (dest) |
cbf6a543 | 6042 | && FLOAT_MODE_P (GET_MODE (dest))) |
bc4ddc77 JW |
6043 | /* Don't record BLKmode values, because we don't know the |
6044 | size of it, and can't be sure that other BLKmode values | |
6045 | have the same or smaller size. */ | |
6046 | || GET_MODE (dest) == BLKmode | |
7afe21cc RK |
6047 | /* Don't record values of destinations set inside a libcall block |
6048 | since we might delete the libcall. Things should have been set | |
6049 | up so we won't want to reuse such a value, but we play it safe | |
6050 | here. */ | |
7bd8b2a8 | 6051 | || libcall_insn |
7afe21cc RK |
6052 | /* If we didn't put a REG_EQUAL value or a source into the hash |
6053 | table, there is no point is recording DEST. */ | |
1a8e9a8e RK |
6054 | || sets[i].src_elt == 0 |
6055 | /* If DEST is a paradoxical SUBREG and SRC is a ZERO_EXTEND | |
6056 | or SIGN_EXTEND, don't record DEST since it can cause | |
6057 | some tracking to be wrong. | |
6058 | ||
6059 | ??? Think about this more later. */ | |
6060 | || (GET_CODE (dest) == SUBREG | |
6061 | && (GET_MODE_SIZE (GET_MODE (dest)) | |
6062 | > GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest)))) | |
6063 | && (GET_CODE (sets[i].src) == SIGN_EXTEND | |
6064 | || GET_CODE (sets[i].src) == ZERO_EXTEND))) | |
7afe21cc RK |
6065 | continue; |
6066 | ||
6067 | /* STRICT_LOW_PART isn't part of the value BEING set, | |
6068 | and neither is the SUBREG inside it. | |
6069 | Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */ | |
6070 | if (GET_CODE (dest) == STRICT_LOW_PART) | |
6071 | dest = SUBREG_REG (XEXP (dest, 0)); | |
6072 | ||
f8cfc6aa | 6073 | if (REG_P (dest) || GET_CODE (dest) == SUBREG) |
7afe21cc RK |
6074 | /* Registers must also be inserted into chains for quantities. */ |
6075 | if (insert_regs (dest, sets[i].src_elt, 1)) | |
8ae2b8f6 JW |
6076 | { |
6077 | /* If `insert_regs' changes something, the hash code must be | |
6078 | recalculated. */ | |
6079 | rehash_using_reg (dest); | |
6080 | sets[i].dest_hash = HASH (dest, GET_MODE (dest)); | |
6081 | } | |
7afe21cc | 6082 | |
8fff4fc1 RH |
6083 | elt = insert (dest, sets[i].src_elt, |
6084 | sets[i].dest_hash, GET_MODE (dest)); | |
9de2c71a | 6085 | |
3c0cb5de | 6086 | elt->in_memory = (MEM_P (sets[i].inner_dest) |
389fdba0 | 6087 | && !MEM_READONLY_P (sets[i].inner_dest)); |
c256df0b | 6088 | |
fc3ffe83 RK |
6089 | /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no |
6090 | narrower than M2, and both M1 and M2 are the same number of words, | |
6091 | we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so | |
6092 | make that equivalence as well. | |
7afe21cc | 6093 | |
4de249d9 PB |
6094 | However, BAR may have equivalences for which gen_lowpart |
6095 | will produce a simpler value than gen_lowpart applied to | |
7afe21cc | 6096 | BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all |
278a83b2 | 6097 | BAR's equivalences. If we don't get a simplified form, make |
7afe21cc RK |
6098 | the SUBREG. It will not be used in an equivalence, but will |
6099 | cause two similar assignments to be detected. | |
6100 | ||
6101 | Note the loop below will find SUBREG_REG (DEST) since we have | |
6102 | already entered SRC and DEST of the SET in the table. */ | |
6103 | ||
6104 | if (GET_CODE (dest) == SUBREG | |
6cdbaec4 RK |
6105 | && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) - 1) |
6106 | / UNITS_PER_WORD) | |
278a83b2 | 6107 | == (GET_MODE_SIZE (GET_MODE (dest)) - 1) / UNITS_PER_WORD) |
7afe21cc RK |
6108 | && (GET_MODE_SIZE (GET_MODE (dest)) |
6109 | >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest)))) | |
6110 | && sets[i].src_elt != 0) | |
6111 | { | |
6112 | enum machine_mode new_mode = GET_MODE (SUBREG_REG (dest)); | |
6113 | struct table_elt *elt, *classp = 0; | |
6114 | ||
6115 | for (elt = sets[i].src_elt->first_same_value; elt; | |
6116 | elt = elt->next_same_value) | |
6117 | { | |
6118 | rtx new_src = 0; | |
2197a88a | 6119 | unsigned src_hash; |
7afe21cc | 6120 | struct table_elt *src_elt; |
ff27a429 | 6121 | int byte = 0; |
7afe21cc RK |
6122 | |
6123 | /* Ignore invalid entries. */ | |
f8cfc6aa | 6124 | if (!REG_P (elt->exp) |
0516f6fe | 6125 | && ! exp_equiv_p (elt->exp, elt->exp, 1, false)) |
7afe21cc RK |
6126 | continue; |
6127 | ||
9beb7d20 RH |
6128 | /* We may have already been playing subreg games. If the |
6129 | mode is already correct for the destination, use it. */ | |
6130 | if (GET_MODE (elt->exp) == new_mode) | |
6131 | new_src = elt->exp; | |
6132 | else | |
6133 | { | |
6134 | /* Calculate big endian correction for the SUBREG_BYTE. | |
6135 | We have already checked that M1 (GET_MODE (dest)) | |
6136 | is not narrower than M2 (new_mode). */ | |
6137 | if (BYTES_BIG_ENDIAN) | |
6138 | byte = (GET_MODE_SIZE (GET_MODE (dest)) | |
6139 | - GET_MODE_SIZE (new_mode)); | |
6140 | ||
6141 | new_src = simplify_gen_subreg (new_mode, elt->exp, | |
6142 | GET_MODE (dest), byte); | |
6143 | } | |
6144 | ||
ff27a429 R |
6145 | /* The call to simplify_gen_subreg fails if the value |
6146 | is VOIDmode, yet we can't do any simplification, e.g. | |
6147 | for EXPR_LISTs denoting function call results. | |
6148 | It is invalid to construct a SUBREG with a VOIDmode | |
6149 | SUBREG_REG, hence a zero new_src means we can't do | |
6150 | this substitution. */ | |
6151 | if (! new_src) | |
6152 | continue; | |
7afe21cc RK |
6153 | |
6154 | src_hash = HASH (new_src, new_mode); | |
6155 | src_elt = lookup (new_src, src_hash, new_mode); | |
6156 | ||
6157 | /* Put the new source in the hash table is if isn't | |
6158 | already. */ | |
6159 | if (src_elt == 0) | |
6160 | { | |
6161 | if (insert_regs (new_src, classp, 0)) | |
8ae2b8f6 JW |
6162 | { |
6163 | rehash_using_reg (new_src); | |
6164 | src_hash = HASH (new_src, new_mode); | |
6165 | } | |
7afe21cc RK |
6166 | src_elt = insert (new_src, classp, src_hash, new_mode); |
6167 | src_elt->in_memory = elt->in_memory; | |
7afe21cc RK |
6168 | } |
6169 | else if (classp && classp != src_elt->first_same_value) | |
278a83b2 | 6170 | /* Show that two things that we've seen before are |
7afe21cc RK |
6171 | actually the same. */ |
6172 | merge_equiv_classes (src_elt, classp); | |
6173 | ||
6174 | classp = src_elt->first_same_value; | |
da932f04 JL |
6175 | /* Ignore invalid entries. */ |
6176 | while (classp | |
f8cfc6aa | 6177 | && !REG_P (classp->exp) |
0516f6fe | 6178 | && ! exp_equiv_p (classp->exp, classp->exp, 1, false)) |
da932f04 | 6179 | classp = classp->next_same_value; |
7afe21cc RK |
6180 | } |
6181 | } | |
6182 | } | |
6183 | ||
403e25d0 RK |
6184 | /* Special handling for (set REG0 REG1) where REG0 is the |
6185 | "cheapest", cheaper than REG1. After cse, REG1 will probably not | |
6186 | be used in the sequel, so (if easily done) change this insn to | |
6187 | (set REG1 REG0) and replace REG1 with REG0 in the previous insn | |
6188 | that computed their value. Then REG1 will become a dead store | |
6189 | and won't cloud the situation for later optimizations. | |
7afe21cc RK |
6190 | |
6191 | Do not make this change if REG1 is a hard register, because it will | |
6192 | then be used in the sequel and we may be changing a two-operand insn | |
6193 | into a three-operand insn. | |
6194 | ||
50270076 R |
6195 | Also do not do this if we are operating on a copy of INSN. |
6196 | ||
6197 | Also don't do this if INSN ends a libcall; this would cause an unrelated | |
6198 | register to be set in the middle of a libcall, and we then get bad code | |
6199 | if the libcall is deleted. */ | |
7afe21cc | 6200 | |
f8cfc6aa | 6201 | if (n_sets == 1 && sets[0].rtl && REG_P (SET_DEST (sets[0].rtl)) |
7afe21cc | 6202 | && NEXT_INSN (PREV_INSN (insn)) == insn |
f8cfc6aa | 6203 | && REG_P (SET_SRC (sets[0].rtl)) |
7afe21cc | 6204 | && REGNO (SET_SRC (sets[0].rtl)) >= FIRST_PSEUDO_REGISTER |
1bb98cec | 6205 | && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets[0].rtl)))) |
7afe21cc | 6206 | { |
1bb98cec DM |
6207 | int src_q = REG_QTY (REGNO (SET_SRC (sets[0].rtl))); |
6208 | struct qty_table_elem *src_ent = &qty_table[src_q]; | |
7afe21cc | 6209 | |
1bb98cec DM |
6210 | if ((src_ent->first_reg == REGNO (SET_DEST (sets[0].rtl))) |
6211 | && ! find_reg_note (insn, REG_RETVAL, NULL_RTX)) | |
7afe21cc | 6212 | { |
3e25353e AH |
6213 | rtx prev = insn; |
6214 | /* Scan for the previous nonnote insn, but stop at a basic | |
6215 | block boundary. */ | |
6216 | do | |
6217 | { | |
6218 | prev = PREV_INSN (prev); | |
6219 | } | |
4b4bf941 | 6220 | while (prev && NOTE_P (prev) |
3e25353e | 6221 | && NOTE_LINE_NUMBER (prev) != NOTE_INSN_BASIC_BLOCK); |
7080f735 | 6222 | |
58ecb5e2 RS |
6223 | /* Do not swap the registers around if the previous instruction |
6224 | attaches a REG_EQUIV note to REG1. | |
6225 | ||
6226 | ??? It's not entirely clear whether we can transfer a REG_EQUIV | |
6227 | from the pseudo that originally shadowed an incoming argument | |
6228 | to another register. Some uses of REG_EQUIV might rely on it | |
6229 | being attached to REG1 rather than REG2. | |
6230 | ||
6231 | This section previously turned the REG_EQUIV into a REG_EQUAL | |
6232 | note. We cannot do that because REG_EQUIV may provide an | |
4912a07c | 6233 | uninitialized stack slot when REG_PARM_STACK_SPACE is used. */ |
58ecb5e2 | 6234 | |
4b4bf941 | 6235 | if (prev != 0 && NONJUMP_INSN_P (prev) |
403e25d0 | 6236 | && GET_CODE (PATTERN (prev)) == SET |
58ecb5e2 RS |
6237 | && SET_DEST (PATTERN (prev)) == SET_SRC (sets[0].rtl) |
6238 | && ! find_reg_note (prev, REG_EQUIV, NULL_RTX)) | |
1bb98cec DM |
6239 | { |
6240 | rtx dest = SET_DEST (sets[0].rtl); | |
403e25d0 | 6241 | rtx src = SET_SRC (sets[0].rtl); |
58ecb5e2 | 6242 | rtx note; |
7afe21cc | 6243 | |
278a83b2 KH |
6244 | validate_change (prev, &SET_DEST (PATTERN (prev)), dest, 1); |
6245 | validate_change (insn, &SET_DEST (sets[0].rtl), src, 1); | |
6246 | validate_change (insn, &SET_SRC (sets[0].rtl), dest, 1); | |
1bb98cec | 6247 | apply_change_group (); |
7afe21cc | 6248 | |
403e25d0 RK |
6249 | /* If INSN has a REG_EQUAL note, and this note mentions |
6250 | REG0, then we must delete it, because the value in | |
6251 | REG0 has changed. If the note's value is REG1, we must | |
6252 | also delete it because that is now this insn's dest. */ | |
1bb98cec | 6253 | note = find_reg_note (insn, REG_EQUAL, NULL_RTX); |
403e25d0 RK |
6254 | if (note != 0 |
6255 | && (reg_mentioned_p (dest, XEXP (note, 0)) | |
6256 | || rtx_equal_p (src, XEXP (note, 0)))) | |
1bb98cec DM |
6257 | remove_note (insn, note); |
6258 | } | |
7afe21cc RK |
6259 | } |
6260 | } | |
6261 | ||
6262 | /* If this is a conditional jump insn, record any known equivalences due to | |
6263 | the condition being tested. */ | |
6264 | ||
4b4bf941 | 6265 | if (JUMP_P (insn) |
7afe21cc RK |
6266 | && n_sets == 1 && GET_CODE (x) == SET |
6267 | && GET_CODE (SET_SRC (x)) == IF_THEN_ELSE) | |
6268 | record_jump_equiv (insn, 0); | |
6269 | ||
6270 | #ifdef HAVE_cc0 | |
6271 | /* If the previous insn set CC0 and this insn no longer references CC0, | |
6272 | delete the previous insn. Here we use the fact that nothing expects CC0 | |
6273 | to be valid over an insn, which is true until the final pass. */ | |
4b4bf941 | 6274 | if (prev_insn && NONJUMP_INSN_P (prev_insn) |
7afe21cc RK |
6275 | && (tem = single_set (prev_insn)) != 0 |
6276 | && SET_DEST (tem) == cc0_rtx | |
6277 | && ! reg_mentioned_p (cc0_rtx, x)) | |
6dee7384 | 6278 | delete_insn (prev_insn); |
7afe21cc RK |
6279 | |
6280 | prev_insn_cc0 = this_insn_cc0; | |
6281 | prev_insn_cc0_mode = this_insn_cc0_mode; | |
7afe21cc | 6282 | prev_insn = insn; |
4977bab6 | 6283 | #endif |
7afe21cc RK |
6284 | } |
6285 | \f | |
a4c6502a | 6286 | /* Remove from the hash table all expressions that reference memory. */ |
14a774a9 | 6287 | |
7afe21cc | 6288 | static void |
7080f735 | 6289 | invalidate_memory (void) |
7afe21cc | 6290 | { |
b3694847 SS |
6291 | int i; |
6292 | struct table_elt *p, *next; | |
7afe21cc | 6293 | |
9b1549b8 | 6294 | for (i = 0; i < HASH_SIZE; i++) |
9ae8ffe7 JL |
6295 | for (p = table[i]; p; p = next) |
6296 | { | |
6297 | next = p->next_same_hash; | |
6298 | if (p->in_memory) | |
6299 | remove_from_table (p, i); | |
6300 | } | |
6301 | } | |
6302 | ||
14a774a9 RK |
6303 | /* If ADDR is an address that implicitly affects the stack pointer, return |
6304 | 1 and update the register tables to show the effect. Else, return 0. */ | |
6305 | ||
9ae8ffe7 | 6306 | static int |
7080f735 | 6307 | addr_affects_sp_p (rtx addr) |
9ae8ffe7 | 6308 | { |
ec8e098d | 6309 | if (GET_RTX_CLASS (GET_CODE (addr)) == RTX_AUTOINC |
f8cfc6aa | 6310 | && REG_P (XEXP (addr, 0)) |
9ae8ffe7 | 6311 | && REGNO (XEXP (addr, 0)) == STACK_POINTER_REGNUM) |
7afe21cc | 6312 | { |
30f72379 | 6313 | if (REG_TICK (STACK_POINTER_REGNUM) >= 0) |
46081bb3 SH |
6314 | { |
6315 | REG_TICK (STACK_POINTER_REGNUM)++; | |
6316 | /* Is it possible to use a subreg of SP? */ | |
6317 | SUBREG_TICKED (STACK_POINTER_REGNUM) = -1; | |
6318 | } | |
9ae8ffe7 JL |
6319 | |
6320 | /* This should be *very* rare. */ | |
6321 | if (TEST_HARD_REG_BIT (hard_regs_in_table, STACK_POINTER_REGNUM)) | |
6322 | invalidate (stack_pointer_rtx, VOIDmode); | |
14a774a9 | 6323 | |
9ae8ffe7 | 6324 | return 1; |
7afe21cc | 6325 | } |
14a774a9 | 6326 | |
9ae8ffe7 | 6327 | return 0; |
7afe21cc RK |
6328 | } |
6329 | ||
6330 | /* Perform invalidation on the basis of everything about an insn | |
6331 | except for invalidating the actual places that are SET in it. | |
6332 | This includes the places CLOBBERed, and anything that might | |
6333 | alias with something that is SET or CLOBBERed. | |
6334 | ||
7afe21cc RK |
6335 | X is the pattern of the insn. */ |
6336 | ||
6337 | static void | |
7080f735 | 6338 | invalidate_from_clobbers (rtx x) |
7afe21cc | 6339 | { |
7afe21cc RK |
6340 | if (GET_CODE (x) == CLOBBER) |
6341 | { | |
6342 | rtx ref = XEXP (x, 0); | |
9ae8ffe7 JL |
6343 | if (ref) |
6344 | { | |
f8cfc6aa | 6345 | if (REG_P (ref) || GET_CODE (ref) == SUBREG |
3c0cb5de | 6346 | || MEM_P (ref)) |
9ae8ffe7 JL |
6347 | invalidate (ref, VOIDmode); |
6348 | else if (GET_CODE (ref) == STRICT_LOW_PART | |
6349 | || GET_CODE (ref) == ZERO_EXTRACT) | |
6350 | invalidate (XEXP (ref, 0), GET_MODE (ref)); | |
6351 | } | |
7afe21cc RK |
6352 | } |
6353 | else if (GET_CODE (x) == PARALLEL) | |
6354 | { | |
b3694847 | 6355 | int i; |
7afe21cc RK |
6356 | for (i = XVECLEN (x, 0) - 1; i >= 0; i--) |
6357 | { | |
b3694847 | 6358 | rtx y = XVECEXP (x, 0, i); |
7afe21cc RK |
6359 | if (GET_CODE (y) == CLOBBER) |
6360 | { | |
6361 | rtx ref = XEXP (y, 0); | |
f8cfc6aa | 6362 | if (REG_P (ref) || GET_CODE (ref) == SUBREG |
3c0cb5de | 6363 | || MEM_P (ref)) |
9ae8ffe7 JL |
6364 | invalidate (ref, VOIDmode); |
6365 | else if (GET_CODE (ref) == STRICT_LOW_PART | |
6366 | || GET_CODE (ref) == ZERO_EXTRACT) | |
6367 | invalidate (XEXP (ref, 0), GET_MODE (ref)); | |
7afe21cc RK |
6368 | } |
6369 | } | |
6370 | } | |
6371 | } | |
6372 | \f | |
6373 | /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes | |
6374 | and replace any registers in them with either an equivalent constant | |
6375 | or the canonical form of the register. If we are inside an address, | |
6376 | only do this if the address remains valid. | |
6377 | ||
6378 | OBJECT is 0 except when within a MEM in which case it is the MEM. | |
6379 | ||
6380 | Return the replacement for X. */ | |
6381 | ||
6382 | static rtx | |
7080f735 | 6383 | cse_process_notes (rtx x, rtx object) |
7afe21cc RK |
6384 | { |
6385 | enum rtx_code code = GET_CODE (x); | |
6f7d635c | 6386 | const char *fmt = GET_RTX_FORMAT (code); |
7afe21cc RK |
6387 | int i; |
6388 | ||
6389 | switch (code) | |
6390 | { | |
6391 | case CONST_INT: | |
6392 | case CONST: | |
6393 | case SYMBOL_REF: | |
6394 | case LABEL_REF: | |
6395 | case CONST_DOUBLE: | |
69ef87e2 | 6396 | case CONST_VECTOR: |
7afe21cc RK |
6397 | case PC: |
6398 | case CC0: | |
6399 | case LO_SUM: | |
6400 | return x; | |
6401 | ||
6402 | case MEM: | |
c96208fa DC |
6403 | validate_change (x, &XEXP (x, 0), |
6404 | cse_process_notes (XEXP (x, 0), x), 0); | |
7afe21cc RK |
6405 | return x; |
6406 | ||
6407 | case EXPR_LIST: | |
6408 | case INSN_LIST: | |
6409 | if (REG_NOTE_KIND (x) == REG_EQUAL) | |
906c4e36 | 6410 | XEXP (x, 0) = cse_process_notes (XEXP (x, 0), NULL_RTX); |
7afe21cc | 6411 | if (XEXP (x, 1)) |
906c4e36 | 6412 | XEXP (x, 1) = cse_process_notes (XEXP (x, 1), NULL_RTX); |
7afe21cc RK |
6413 | return x; |
6414 | ||
e4890d45 RS |
6415 | case SIGN_EXTEND: |
6416 | case ZERO_EXTEND: | |
0b0ee36c | 6417 | case SUBREG: |
e4890d45 RS |
6418 | { |
6419 | rtx new = cse_process_notes (XEXP (x, 0), object); | |
6420 | /* We don't substitute VOIDmode constants into these rtx, | |
6421 | since they would impede folding. */ | |
6422 | if (GET_MODE (new) != VOIDmode) | |
6423 | validate_change (object, &XEXP (x, 0), new, 0); | |
6424 | return x; | |
6425 | } | |
6426 | ||
7afe21cc | 6427 | case REG: |
30f72379 | 6428 | i = REG_QTY (REGNO (x)); |
7afe21cc RK |
6429 | |
6430 | /* Return a constant or a constant register. */ | |
1bb98cec | 6431 | if (REGNO_QTY_VALID_P (REGNO (x))) |
7afe21cc | 6432 | { |
1bb98cec DM |
6433 | struct qty_table_elem *ent = &qty_table[i]; |
6434 | ||
6435 | if (ent->const_rtx != NULL_RTX | |
6436 | && (CONSTANT_P (ent->const_rtx) | |
f8cfc6aa | 6437 | || REG_P (ent->const_rtx))) |
1bb98cec | 6438 | { |
4de249d9 | 6439 | rtx new = gen_lowpart (GET_MODE (x), ent->const_rtx); |
1bb98cec DM |
6440 | if (new) |
6441 | return new; | |
6442 | } | |
7afe21cc RK |
6443 | } |
6444 | ||
6445 | /* Otherwise, canonicalize this register. */ | |
906c4e36 | 6446 | return canon_reg (x, NULL_RTX); |
278a83b2 | 6447 | |
e9a25f70 JL |
6448 | default: |
6449 | break; | |
7afe21cc RK |
6450 | } |
6451 | ||
6452 | for (i = 0; i < GET_RTX_LENGTH (code); i++) | |
6453 | if (fmt[i] == 'e') | |
6454 | validate_change (object, &XEXP (x, i), | |
7fe34fdf | 6455 | cse_process_notes (XEXP (x, i), object), 0); |
7afe21cc RK |
6456 | |
6457 | return x; | |
6458 | } | |
6459 | \f | |
8b3686ed RK |
6460 | /* Process one SET of an insn that was skipped. We ignore CLOBBERs |
6461 | since they are done elsewhere. This function is called via note_stores. */ | |
6462 | ||
6463 | static void | |
7080f735 | 6464 | invalidate_skipped_set (rtx dest, rtx set, void *data ATTRIBUTE_UNUSED) |
8b3686ed | 6465 | { |
9ae8ffe7 JL |
6466 | enum rtx_code code = GET_CODE (dest); |
6467 | ||
6468 | if (code == MEM | |
ddc356e8 | 6469 | && ! addr_affects_sp_p (dest) /* If this is not a stack push ... */ |
9ae8ffe7 JL |
6470 | /* There are times when an address can appear varying and be a PLUS |
6471 | during this scan when it would be a fixed address were we to know | |
6472 | the proper equivalences. So invalidate all memory if there is | |
6473 | a BLKmode or nonscalar memory reference or a reference to a | |
6474 | variable address. */ | |
6475 | && (MEM_IN_STRUCT_P (dest) || GET_MODE (dest) == BLKmode | |
2be28ee2 | 6476 | || cse_rtx_varies_p (XEXP (dest, 0), 0))) |
9ae8ffe7 JL |
6477 | { |
6478 | invalidate_memory (); | |
6479 | return; | |
6480 | } | |
ffcf6393 | 6481 | |
f47c02fa | 6482 | if (GET_CODE (set) == CLOBBER |
8beccec8 | 6483 | || CC0_P (dest) |
f47c02fa RK |
6484 | || dest == pc_rtx) |
6485 | return; | |
6486 | ||
9ae8ffe7 | 6487 | if (code == STRICT_LOW_PART || code == ZERO_EXTRACT) |
bb4034b3 | 6488 | invalidate (XEXP (dest, 0), GET_MODE (dest)); |
9ae8ffe7 JL |
6489 | else if (code == REG || code == SUBREG || code == MEM) |
6490 | invalidate (dest, VOIDmode); | |
8b3686ed RK |
6491 | } |
6492 | ||
6493 | /* Invalidate all insns from START up to the end of the function or the | |
6494 | next label. This called when we wish to CSE around a block that is | |
6495 | conditionally executed. */ | |
6496 | ||
6497 | static void | |
7080f735 | 6498 | invalidate_skipped_block (rtx start) |
8b3686ed RK |
6499 | { |
6500 | rtx insn; | |
8b3686ed | 6501 | |
4b4bf941 | 6502 | for (insn = start; insn && !LABEL_P (insn); |
8b3686ed RK |
6503 | insn = NEXT_INSN (insn)) |
6504 | { | |
2c3c49de | 6505 | if (! INSN_P (insn)) |
8b3686ed RK |
6506 | continue; |
6507 | ||
4b4bf941 | 6508 | if (CALL_P (insn)) |
8b3686ed | 6509 | { |
24a28584 | 6510 | if (! CONST_OR_PURE_CALL_P (insn)) |
9ae8ffe7 | 6511 | invalidate_memory (); |
8b3686ed | 6512 | invalidate_for_call (); |
8b3686ed RK |
6513 | } |
6514 | ||
97577254 | 6515 | invalidate_from_clobbers (PATTERN (insn)); |
84832317 | 6516 | note_stores (PATTERN (insn), invalidate_skipped_set, NULL); |
8b3686ed RK |
6517 | } |
6518 | } | |
6519 | \f | |
7afe21cc RK |
6520 | /* Find the end of INSN's basic block and return its range, |
6521 | the total number of SETs in all the insns of the block, the last insn of the | |
6522 | block, and the branch path. | |
6523 | ||
da7d8304 | 6524 | The branch path indicates which branches should be followed. If a nonzero |
7afe21cc RK |
6525 | path size is specified, the block should be rescanned and a different set |
6526 | of branches will be taken. The branch path is only used if | |
da7d8304 | 6527 | FLAG_CSE_FOLLOW_JUMPS or FLAG_CSE_SKIP_BLOCKS is nonzero. |
7afe21cc RK |
6528 | |
6529 | DATA is a pointer to a struct cse_basic_block_data, defined below, that is | |
6530 | used to describe the block. It is filled in with the information about | |
6531 | the current block. The incoming structure's branch path, if any, is used | |
6532 | to construct the output branch path. */ | |
6533 | ||
86caf04d | 6534 | static void |
7080f735 | 6535 | cse_end_of_basic_block (rtx insn, struct cse_basic_block_data *data, |
5affca01 | 6536 | int follow_jumps, int skip_blocks) |
7afe21cc RK |
6537 | { |
6538 | rtx p = insn, q; | |
6539 | int nsets = 0; | |
6540 | int low_cuid = INSN_CUID (insn), high_cuid = INSN_CUID (insn); | |
2c3c49de | 6541 | rtx next = INSN_P (insn) ? insn : next_real_insn (insn); |
7afe21cc RK |
6542 | int path_size = data->path_size; |
6543 | int path_entry = 0; | |
6544 | int i; | |
6545 | ||
6546 | /* Update the previous branch path, if any. If the last branch was | |
6de9cd9a DN |
6547 | previously PATH_TAKEN, mark it PATH_NOT_TAKEN. |
6548 | If it was previously PATH_NOT_TAKEN, | |
7afe21cc | 6549 | shorten the path by one and look at the previous branch. We know that |
da7d8304 | 6550 | at least one branch must have been taken if PATH_SIZE is nonzero. */ |
7afe21cc RK |
6551 | while (path_size > 0) |
6552 | { | |
6de9cd9a | 6553 | if (data->path[path_size - 1].status != PATH_NOT_TAKEN) |
7afe21cc | 6554 | { |
6de9cd9a | 6555 | data->path[path_size - 1].status = PATH_NOT_TAKEN; |
7afe21cc RK |
6556 | break; |
6557 | } | |
6558 | else | |
6559 | path_size--; | |
6560 | } | |
6561 | ||
16b702cd MM |
6562 | /* If the first instruction is marked with QImode, that means we've |
6563 | already processed this block. Our caller will look at DATA->LAST | |
6564 | to figure out where to go next. We want to return the next block | |
6565 | in the instruction stream, not some branched-to block somewhere | |
6566 | else. We accomplish this by pretending our called forbid us to | |
6567 | follow jumps, or skip blocks. */ | |
6568 | if (GET_MODE (insn) == QImode) | |
6569 | follow_jumps = skip_blocks = 0; | |
6570 | ||
7afe21cc | 6571 | /* Scan to end of this basic block. */ |
4b4bf941 | 6572 | while (p && !LABEL_P (p)) |
7afe21cc | 6573 | { |
8aeea6e6 | 6574 | /* Don't cse over a call to setjmp; on some machines (eg VAX) |
7afe21cc RK |
6575 | the regs restored by the longjmp come from |
6576 | a later time than the setjmp. */ | |
4b4bf941 | 6577 | if (PREV_INSN (p) && CALL_P (PREV_INSN (p)) |
570a98eb | 6578 | && find_reg_note (PREV_INSN (p), REG_SETJMP, NULL)) |
7afe21cc RK |
6579 | break; |
6580 | ||
6581 | /* A PARALLEL can have lots of SETs in it, | |
6582 | especially if it is really an ASM_OPERANDS. */ | |
2c3c49de | 6583 | if (INSN_P (p) && GET_CODE (PATTERN (p)) == PARALLEL) |
7afe21cc | 6584 | nsets += XVECLEN (PATTERN (p), 0); |
4b4bf941 | 6585 | else if (!NOTE_P (p)) |
7afe21cc | 6586 | nsets += 1; |
278a83b2 | 6587 | |
164c8956 RK |
6588 | /* Ignore insns made by CSE; they cannot affect the boundaries of |
6589 | the basic block. */ | |
6590 | ||
6591 | if (INSN_UID (p) <= max_uid && INSN_CUID (p) > high_cuid) | |
8b3686ed | 6592 | high_cuid = INSN_CUID (p); |
164c8956 RK |
6593 | if (INSN_UID (p) <= max_uid && INSN_CUID (p) < low_cuid) |
6594 | low_cuid = INSN_CUID (p); | |
7afe21cc RK |
6595 | |
6596 | /* See if this insn is in our branch path. If it is and we are to | |
6597 | take it, do so. */ | |
6598 | if (path_entry < path_size && data->path[path_entry].branch == p) | |
6599 | { | |
6de9cd9a | 6600 | if (data->path[path_entry].status != PATH_NOT_TAKEN) |
7afe21cc | 6601 | p = JUMP_LABEL (p); |
278a83b2 | 6602 | |
7afe21cc RK |
6603 | /* Point to next entry in path, if any. */ |
6604 | path_entry++; | |
6605 | } | |
6606 | ||
6607 | /* If this is a conditional jump, we can follow it if -fcse-follow-jumps | |
6608 | was specified, we haven't reached our maximum path length, there are | |
6609 | insns following the target of the jump, this is the only use of the | |
8b3686ed RK |
6610 | jump label, and the target label is preceded by a BARRIER. |
6611 | ||
6612 | Alternatively, we can follow the jump if it branches around a | |
6613 | block of code and there are no other branches into the block. | |
6614 | In this case invalidate_skipped_block will be called to invalidate any | |
6615 | registers set in the block when following the jump. */ | |
6616 | ||
9bf8cfbf | 6617 | else if ((follow_jumps || skip_blocks) && path_size < PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH) - 1 |
4b4bf941 | 6618 | && JUMP_P (p) |
278a83b2 | 6619 | && GET_CODE (PATTERN (p)) == SET |
7afe21cc | 6620 | && GET_CODE (SET_SRC (PATTERN (p))) == IF_THEN_ELSE |
85c3ba60 | 6621 | && JUMP_LABEL (p) != 0 |
7afe21cc RK |
6622 | && LABEL_NUSES (JUMP_LABEL (p)) == 1 |
6623 | && NEXT_INSN (JUMP_LABEL (p)) != 0) | |
6624 | { | |
6625 | for (q = PREV_INSN (JUMP_LABEL (p)); q; q = PREV_INSN (q)) | |
4b4bf941 | 6626 | if ((!NOTE_P (q) |
278a83b2 | 6627 | || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END |
4b4bf941 | 6628 | || (PREV_INSN (q) && CALL_P (PREV_INSN (q)) |
570a98eb | 6629 | && find_reg_note (PREV_INSN (q), REG_SETJMP, NULL))) |
4b4bf941 | 6630 | && (!LABEL_P (q) || LABEL_NUSES (q) != 0)) |
7afe21cc RK |
6631 | break; |
6632 | ||
6633 | /* If we ran into a BARRIER, this code is an extension of the | |
6634 | basic block when the branch is taken. */ | |
4b4bf941 | 6635 | if (follow_jumps && q != 0 && BARRIER_P (q)) |
7afe21cc RK |
6636 | { |
6637 | /* Don't allow ourself to keep walking around an | |
6638 | always-executed loop. */ | |
fc3ffe83 RK |
6639 | if (next_real_insn (q) == next) |
6640 | { | |
6641 | p = NEXT_INSN (p); | |
6642 | continue; | |
6643 | } | |
7afe21cc RK |
6644 | |
6645 | /* Similarly, don't put a branch in our path more than once. */ | |
6646 | for (i = 0; i < path_entry; i++) | |
6647 | if (data->path[i].branch == p) | |
6648 | break; | |
6649 | ||
6650 | if (i != path_entry) | |
6651 | break; | |
6652 | ||
6653 | data->path[path_entry].branch = p; | |
6de9cd9a | 6654 | data->path[path_entry++].status = PATH_TAKEN; |
7afe21cc RK |
6655 | |
6656 | /* This branch now ends our path. It was possible that we | |
6657 | didn't see this branch the last time around (when the | |
6658 | insn in front of the target was a JUMP_INSN that was | |
6659 | turned into a no-op). */ | |
6660 | path_size = path_entry; | |
6661 | ||
6662 | p = JUMP_LABEL (p); | |
6663 | /* Mark block so we won't scan it again later. */ | |
6664 | PUT_MODE (NEXT_INSN (p), QImode); | |
6665 | } | |
8b3686ed | 6666 | /* Detect a branch around a block of code. */ |
4b4bf941 | 6667 | else if (skip_blocks && q != 0 && !LABEL_P (q)) |
8b3686ed | 6668 | { |
b3694847 | 6669 | rtx tmp; |
8b3686ed | 6670 | |
fc3ffe83 RK |
6671 | if (next_real_insn (q) == next) |
6672 | { | |
6673 | p = NEXT_INSN (p); | |
6674 | continue; | |
6675 | } | |
8b3686ed RK |
6676 | |
6677 | for (i = 0; i < path_entry; i++) | |
6678 | if (data->path[i].branch == p) | |
6679 | break; | |
6680 | ||
6681 | if (i != path_entry) | |
6682 | break; | |
6683 | ||
6684 | /* This is no_labels_between_p (p, q) with an added check for | |
6685 | reaching the end of a function (in case Q precedes P). */ | |
6686 | for (tmp = NEXT_INSN (p); tmp && tmp != q; tmp = NEXT_INSN (tmp)) | |
4b4bf941 | 6687 | if (LABEL_P (tmp)) |
8b3686ed | 6688 | break; |
278a83b2 | 6689 | |
8b3686ed RK |
6690 | if (tmp == q) |
6691 | { | |
6692 | data->path[path_entry].branch = p; | |
6de9cd9a | 6693 | data->path[path_entry++].status = PATH_AROUND; |
8b3686ed RK |
6694 | |
6695 | path_size = path_entry; | |
6696 | ||
6697 | p = JUMP_LABEL (p); | |
6698 | /* Mark block so we won't scan it again later. */ | |
6699 | PUT_MODE (NEXT_INSN (p), QImode); | |
6700 | } | |
6701 | } | |
7afe21cc | 6702 | } |
7afe21cc RK |
6703 | p = NEXT_INSN (p); |
6704 | } | |
6705 | ||
6706 | data->low_cuid = low_cuid; | |
6707 | data->high_cuid = high_cuid; | |
6708 | data->nsets = nsets; | |
6709 | data->last = p; | |
6710 | ||
6711 | /* If all jumps in the path are not taken, set our path length to zero | |
6712 | so a rescan won't be done. */ | |
6713 | for (i = path_size - 1; i >= 0; i--) | |
6de9cd9a | 6714 | if (data->path[i].status != PATH_NOT_TAKEN) |
7afe21cc RK |
6715 | break; |
6716 | ||
6717 | if (i == -1) | |
6718 | data->path_size = 0; | |
6719 | else | |
6720 | data->path_size = path_size; | |
6721 | ||
6722 | /* End the current branch path. */ | |
6723 | data->path[path_size].branch = 0; | |
6724 | } | |
6725 | \f | |
7afe21cc RK |
6726 | /* Perform cse on the instructions of a function. |
6727 | F is the first instruction. | |
6728 | NREGS is one plus the highest pseudo-reg number used in the instruction. | |
6729 | ||
7afe21cc RK |
6730 | Returns 1 if jump_optimize should be redone due to simplifications |
6731 | in conditional jump instructions. */ | |
6732 | ||
6733 | int | |
5affca01 | 6734 | cse_main (rtx f, int nregs, FILE *file) |
7afe21cc RK |
6735 | { |
6736 | struct cse_basic_block_data val; | |
b3694847 SS |
6737 | rtx insn = f; |
6738 | int i; | |
7afe21cc | 6739 | |
bc5e3b54 KH |
6740 | init_cse_reg_info (nregs); |
6741 | ||
9bf8cfbf ZD |
6742 | val.path = xmalloc (sizeof (struct branch_path) |
6743 | * PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH)); | |
6744 | ||
7afe21cc | 6745 | cse_jumps_altered = 0; |
a5dfb4ee | 6746 | recorded_label_ref = 0; |
7afe21cc | 6747 | constant_pool_entries_cost = 0; |
dd0ba281 | 6748 | constant_pool_entries_regcost = 0; |
7afe21cc | 6749 | val.path_size = 0; |
2f93eea8 | 6750 | rtl_hooks = cse_rtl_hooks; |
7afe21cc RK |
6751 | |
6752 | init_recog (); | |
9ae8ffe7 | 6753 | init_alias_analysis (); |
7afe21cc | 6754 | |
703ad42b | 6755 | reg_eqv_table = xmalloc (nregs * sizeof (struct reg_eqv_elem)); |
7afe21cc | 6756 | |
7afe21cc RK |
6757 | /* Find the largest uid. */ |
6758 | ||
164c8956 | 6759 | max_uid = get_max_uid (); |
703ad42b | 6760 | uid_cuid = xcalloc (max_uid + 1, sizeof (int)); |
7afe21cc RK |
6761 | |
6762 | /* Compute the mapping from uids to cuids. | |
6763 | CUIDs are numbers assigned to insns, like uids, | |
6764 | except that cuids increase monotonically through the code. | |
6765 | Don't assign cuids to line-number NOTEs, so that the distance in cuids | |
6766 | between two insns is not affected by -g. */ | |
6767 | ||
6768 | for (insn = f, i = 0; insn; insn = NEXT_INSN (insn)) | |
6769 | { | |
4b4bf941 | 6770 | if (!NOTE_P (insn) |
7afe21cc RK |
6771 | || NOTE_LINE_NUMBER (insn) < 0) |
6772 | INSN_CUID (insn) = ++i; | |
6773 | else | |
6774 | /* Give a line number note the same cuid as preceding insn. */ | |
6775 | INSN_CUID (insn) = i; | |
6776 | } | |
6777 | ||
7afe21cc RK |
6778 | /* Loop over basic blocks. |
6779 | Compute the maximum number of qty's needed for each basic block | |
6780 | (which is 2 for each SET). */ | |
6781 | insn = f; | |
6782 | while (insn) | |
6783 | { | |
4eadede7 | 6784 | cse_altered = 0; |
5affca01 | 6785 | cse_end_of_basic_block (insn, &val, flag_cse_follow_jumps, |
8b3686ed | 6786 | flag_cse_skip_blocks); |
7afe21cc RK |
6787 | |
6788 | /* If this basic block was already processed or has no sets, skip it. */ | |
6789 | if (val.nsets == 0 || GET_MODE (insn) == QImode) | |
6790 | { | |
6791 | PUT_MODE (insn, VOIDmode); | |
6792 | insn = (val.last ? NEXT_INSN (val.last) : 0); | |
6793 | val.path_size = 0; | |
6794 | continue; | |
6795 | } | |
6796 | ||
6797 | cse_basic_block_start = val.low_cuid; | |
6798 | cse_basic_block_end = val.high_cuid; | |
6799 | max_qty = val.nsets * 2; | |
278a83b2 | 6800 | |
7afe21cc | 6801 | if (file) |
ab87f8c8 | 6802 | fnotice (file, ";; Processing block from %d to %d, %d sets.\n", |
7afe21cc RK |
6803 | INSN_UID (insn), val.last ? INSN_UID (val.last) : 0, |
6804 | val.nsets); | |
6805 | ||
6806 | /* Make MAX_QTY bigger to give us room to optimize | |
6807 | past the end of this basic block, if that should prove useful. */ | |
6808 | if (max_qty < 500) | |
6809 | max_qty = 500; | |
6810 | ||
7afe21cc RK |
6811 | /* If this basic block is being extended by following certain jumps, |
6812 | (see `cse_end_of_basic_block'), we reprocess the code from the start. | |
6813 | Otherwise, we start after this basic block. */ | |
6814 | if (val.path_size > 0) | |
5affca01 | 6815 | cse_basic_block (insn, val.last, val.path); |
7afe21cc RK |
6816 | else |
6817 | { | |
6818 | int old_cse_jumps_altered = cse_jumps_altered; | |
6819 | rtx temp; | |
6820 | ||
6821 | /* When cse changes a conditional jump to an unconditional | |
6822 | jump, we want to reprocess the block, since it will give | |
6823 | us a new branch path to investigate. */ | |
6824 | cse_jumps_altered = 0; | |
5affca01 | 6825 | temp = cse_basic_block (insn, val.last, val.path); |
8b3686ed RK |
6826 | if (cse_jumps_altered == 0 |
6827 | || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0)) | |
7afe21cc RK |
6828 | insn = temp; |
6829 | ||
6830 | cse_jumps_altered |= old_cse_jumps_altered; | |
6831 | } | |
6832 | ||
1f8f4a0b | 6833 | if (cse_altered) |
1497faf6 RH |
6834 | ggc_collect (); |
6835 | ||
7afe21cc RK |
6836 | #ifdef USE_C_ALLOCA |
6837 | alloca (0); | |
6838 | #endif | |
6839 | } | |
6840 | ||
e05e2395 MM |
6841 | /* Clean up. */ |
6842 | end_alias_analysis (); | |
75c6bd46 | 6843 | free (uid_cuid); |
1bb98cec | 6844 | free (reg_eqv_table); |
9bf8cfbf | 6845 | free (val.path); |
2f93eea8 | 6846 | rtl_hooks = general_rtl_hooks; |
e05e2395 | 6847 | |
a5dfb4ee | 6848 | return cse_jumps_altered || recorded_label_ref; |
7afe21cc RK |
6849 | } |
6850 | ||
6851 | /* Process a single basic block. FROM and TO and the limits of the basic | |
6852 | block. NEXT_BRANCH points to the branch path when following jumps or | |
75473b02 | 6853 | a null path when not following jumps. */ |
7afe21cc RK |
6854 | |
6855 | static rtx | |
5affca01 | 6856 | cse_basic_block (rtx from, rtx to, struct branch_path *next_branch) |
7afe21cc | 6857 | { |
b3694847 | 6858 | rtx insn; |
7afe21cc | 6859 | int to_usage = 0; |
7bd8b2a8 | 6860 | rtx libcall_insn = NULL_RTX; |
e9a25f70 | 6861 | int num_insns = 0; |
26d107db | 6862 | int no_conflict = 0; |
7afe21cc | 6863 | |
08a69267 RS |
6864 | /* Allocate the space needed by qty_table. */ |
6865 | qty_table = xmalloc (max_qty * sizeof (struct qty_table_elem)); | |
7afe21cc RK |
6866 | |
6867 | new_basic_block (); | |
6868 | ||
6869 | /* TO might be a label. If so, protect it from being deleted. */ | |
4b4bf941 | 6870 | if (to != 0 && LABEL_P (to)) |
7afe21cc RK |
6871 | ++LABEL_NUSES (to); |
6872 | ||
6873 | for (insn = from; insn != to; insn = NEXT_INSN (insn)) | |
6874 | { | |
b3694847 | 6875 | enum rtx_code code = GET_CODE (insn); |
e9a25f70 | 6876 | |
1d22a2c1 MM |
6877 | /* If we have processed 1,000 insns, flush the hash table to |
6878 | avoid extreme quadratic behavior. We must not include NOTEs | |
c13e8210 | 6879 | in the count since there may be more of them when generating |
1d22a2c1 MM |
6880 | debugging information. If we clear the table at different |
6881 | times, code generated with -g -O might be different than code | |
6882 | generated with -O but not -g. | |
e9a25f70 JL |
6883 | |
6884 | ??? This is a real kludge and needs to be done some other way. | |
6885 | Perhaps for 2.9. */ | |
1d22a2c1 | 6886 | if (code != NOTE && num_insns++ > 1000) |
e9a25f70 | 6887 | { |
01e752d3 | 6888 | flush_hash_table (); |
e9a25f70 JL |
6889 | num_insns = 0; |
6890 | } | |
7afe21cc RK |
6891 | |
6892 | /* See if this is a branch that is part of the path. If so, and it is | |
6893 | to be taken, do so. */ | |
6894 | if (next_branch->branch == insn) | |
6895 | { | |
8b3686ed | 6896 | enum taken status = next_branch++->status; |
6de9cd9a | 6897 | if (status != PATH_NOT_TAKEN) |
7afe21cc | 6898 | { |
6de9cd9a | 6899 | if (status == PATH_TAKEN) |
8b3686ed RK |
6900 | record_jump_equiv (insn, 1); |
6901 | else | |
6902 | invalidate_skipped_block (NEXT_INSN (insn)); | |
6903 | ||
7afe21cc RK |
6904 | /* Set the last insn as the jump insn; it doesn't affect cc0. |
6905 | Then follow this branch. */ | |
6906 | #ifdef HAVE_cc0 | |
6907 | prev_insn_cc0 = 0; | |
7afe21cc | 6908 | prev_insn = insn; |
4977bab6 | 6909 | #endif |
7afe21cc RK |
6910 | insn = JUMP_LABEL (insn); |
6911 | continue; | |
6912 | } | |
6913 | } | |
278a83b2 | 6914 | |
7afe21cc RK |
6915 | if (GET_MODE (insn) == QImode) |
6916 | PUT_MODE (insn, VOIDmode); | |
6917 | ||
ec8e098d | 6918 | if (GET_RTX_CLASS (code) == RTX_INSN) |
7afe21cc | 6919 | { |
7bd8b2a8 JL |
6920 | rtx p; |
6921 | ||
7afe21cc RK |
6922 | /* Process notes first so we have all notes in canonical forms when |
6923 | looking for duplicate operations. */ | |
6924 | ||
6925 | if (REG_NOTES (insn)) | |
906c4e36 | 6926 | REG_NOTES (insn) = cse_process_notes (REG_NOTES (insn), NULL_RTX); |
7afe21cc RK |
6927 | |
6928 | /* Track when we are inside in LIBCALL block. Inside such a block, | |
6929 | we do not want to record destinations. The last insn of a | |
6930 | LIBCALL block is not considered to be part of the block, since | |
830a38ee | 6931 | its destination is the result of the block and hence should be |
7afe21cc RK |
6932 | recorded. */ |
6933 | ||
efc9bd41 RK |
6934 | if (REG_NOTES (insn) != 0) |
6935 | { | |
6936 | if ((p = find_reg_note (insn, REG_LIBCALL, NULL_RTX))) | |
6937 | libcall_insn = XEXP (p, 0); | |
6938 | else if (find_reg_note (insn, REG_RETVAL, NULL_RTX)) | |
26d107db KK |
6939 | { |
6940 | /* Keep libcall_insn for the last SET insn of a no-conflict | |
6941 | block to prevent changing the destination. */ | |
6942 | if (! no_conflict) | |
6943 | libcall_insn = 0; | |
6944 | else | |
6945 | no_conflict = -1; | |
6946 | } | |
6947 | else if (find_reg_note (insn, REG_NO_CONFLICT, NULL_RTX)) | |
6948 | no_conflict = 1; | |
efc9bd41 | 6949 | } |
7afe21cc | 6950 | |
7bd8b2a8 | 6951 | cse_insn (insn, libcall_insn); |
f85cc4cb | 6952 | |
26d107db KK |
6953 | if (no_conflict == -1) |
6954 | { | |
6955 | libcall_insn = 0; | |
6956 | no_conflict = 0; | |
6957 | } | |
6958 | ||
be8ac49a RK |
6959 | /* If we haven't already found an insn where we added a LABEL_REF, |
6960 | check this one. */ | |
4b4bf941 | 6961 | if (NONJUMP_INSN_P (insn) && ! recorded_label_ref |
be8ac49a RK |
6962 | && for_each_rtx (&PATTERN (insn), check_for_label_ref, |
6963 | (void *) insn)) | |
f85cc4cb | 6964 | recorded_label_ref = 1; |
7afe21cc RK |
6965 | } |
6966 | ||
6967 | /* If INSN is now an unconditional jump, skip to the end of our | |
6968 | basic block by pretending that we just did the last insn in the | |
6969 | basic block. If we are jumping to the end of our block, show | |
6970 | that we can have one usage of TO. */ | |
6971 | ||
7f1c097d | 6972 | if (any_uncondjump_p (insn)) |
7afe21cc RK |
6973 | { |
6974 | if (to == 0) | |
fa0933ba | 6975 | { |
08a69267 | 6976 | free (qty_table); |
fa0933ba JL |
6977 | return 0; |
6978 | } | |
7afe21cc RK |
6979 | |
6980 | if (JUMP_LABEL (insn) == to) | |
6981 | to_usage = 1; | |
6982 | ||
6a5293dc RS |
6983 | /* Maybe TO was deleted because the jump is unconditional. |
6984 | If so, there is nothing left in this basic block. */ | |
6985 | /* ??? Perhaps it would be smarter to set TO | |
278a83b2 | 6986 | to whatever follows this insn, |
6a5293dc RS |
6987 | and pretend the basic block had always ended here. */ |
6988 | if (INSN_DELETED_P (to)) | |
6989 | break; | |
6990 | ||
7afe21cc RK |
6991 | insn = PREV_INSN (to); |
6992 | } | |
6993 | ||
6994 | /* See if it is ok to keep on going past the label | |
6995 | which used to end our basic block. Remember that we incremented | |
d45cf215 | 6996 | the count of that label, so we decrement it here. If we made |
7afe21cc RK |
6997 | a jump unconditional, TO_USAGE will be one; in that case, we don't |
6998 | want to count the use in that jump. */ | |
6999 | ||
7000 | if (to != 0 && NEXT_INSN (insn) == to | |
4b4bf941 | 7001 | && LABEL_P (to) && --LABEL_NUSES (to) == to_usage) |
7afe21cc RK |
7002 | { |
7003 | struct cse_basic_block_data val; | |
146135d6 | 7004 | rtx prev; |
7afe21cc RK |
7005 | |
7006 | insn = NEXT_INSN (to); | |
7007 | ||
146135d6 RK |
7008 | /* If TO was the last insn in the function, we are done. */ |
7009 | if (insn == 0) | |
fa0933ba | 7010 | { |
08a69267 | 7011 | free (qty_table); |
fa0933ba JL |
7012 | return 0; |
7013 | } | |
7afe21cc | 7014 | |
146135d6 RK |
7015 | /* If TO was preceded by a BARRIER we are done with this block |
7016 | because it has no continuation. */ | |
7017 | prev = prev_nonnote_insn (to); | |
4b4bf941 | 7018 | if (prev && BARRIER_P (prev)) |
fa0933ba | 7019 | { |
08a69267 | 7020 | free (qty_table); |
fa0933ba JL |
7021 | return insn; |
7022 | } | |
146135d6 RK |
7023 | |
7024 | /* Find the end of the following block. Note that we won't be | |
7025 | following branches in this case. */ | |
7afe21cc RK |
7026 | to_usage = 0; |
7027 | val.path_size = 0; | |
9bf8cfbf ZD |
7028 | val.path = xmalloc (sizeof (struct branch_path) |
7029 | * PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH)); | |
5affca01 | 7030 | cse_end_of_basic_block (insn, &val, 0, 0); |
9bf8cfbf | 7031 | free (val.path); |
7afe21cc RK |
7032 | |
7033 | /* If the tables we allocated have enough space left | |
7034 | to handle all the SETs in the next basic block, | |
7035 | continue through it. Otherwise, return, | |
7036 | and that block will be scanned individually. */ | |
7037 | if (val.nsets * 2 + next_qty > max_qty) | |
7038 | break; | |
7039 | ||
7040 | cse_basic_block_start = val.low_cuid; | |
7041 | cse_basic_block_end = val.high_cuid; | |
7042 | to = val.last; | |
7043 | ||
7044 | /* Prevent TO from being deleted if it is a label. */ | |
4b4bf941 | 7045 | if (to != 0 && LABEL_P (to)) |
7afe21cc RK |
7046 | ++LABEL_NUSES (to); |
7047 | ||
7048 | /* Back up so we process the first insn in the extension. */ | |
7049 | insn = PREV_INSN (insn); | |
7050 | } | |
7051 | } | |
7052 | ||
341c100f | 7053 | gcc_assert (next_qty <= max_qty); |
7afe21cc | 7054 | |
08a69267 | 7055 | free (qty_table); |
75c6bd46 | 7056 | |
7afe21cc RK |
7057 | return to ? NEXT_INSN (to) : 0; |
7058 | } | |
7059 | \f | |
be8ac49a | 7060 | /* Called via for_each_rtx to see if an insn is using a LABEL_REF for which |
45c23566 | 7061 | there isn't a REG_LABEL note. Return one if so. DATA is the insn. */ |
be8ac49a RK |
7062 | |
7063 | static int | |
7080f735 | 7064 | check_for_label_ref (rtx *rtl, void *data) |
be8ac49a RK |
7065 | { |
7066 | rtx insn = (rtx) data; | |
7067 | ||
7068 | /* If this insn uses a LABEL_REF and there isn't a REG_LABEL note for it, | |
7069 | we must rerun jump since it needs to place the note. If this is a | |
7070 | LABEL_REF for a CODE_LABEL that isn't in the insn chain, don't do this | |
ec5c56db | 7071 | since no REG_LABEL will be added. */ |
be8ac49a | 7072 | return (GET_CODE (*rtl) == LABEL_REF |
45c23566 | 7073 | && ! LABEL_REF_NONLOCAL_P (*rtl) |
4838c5ee | 7074 | && LABEL_P (XEXP (*rtl, 0)) |
be8ac49a RK |
7075 | && INSN_UID (XEXP (*rtl, 0)) != 0 |
7076 | && ! find_reg_note (insn, REG_LABEL, XEXP (*rtl, 0))); | |
7077 | } | |
7078 | \f | |
7afe21cc RK |
7079 | /* Count the number of times registers are used (not set) in X. |
7080 | COUNTS is an array in which we accumulate the count, INCR is how much | |
9ab81df2 | 7081 | we count each register usage. */ |
7afe21cc RK |
7082 | |
7083 | static void | |
9ab81df2 | 7084 | count_reg_usage (rtx x, int *counts, int incr) |
7afe21cc | 7085 | { |
f1e7c95f | 7086 | enum rtx_code code; |
b17d5d7c | 7087 | rtx note; |
6f7d635c | 7088 | const char *fmt; |
7afe21cc RK |
7089 | int i, j; |
7090 | ||
f1e7c95f RK |
7091 | if (x == 0) |
7092 | return; | |
7093 | ||
7094 | switch (code = GET_CODE (x)) | |
7afe21cc RK |
7095 | { |
7096 | case REG: | |
9ab81df2 | 7097 | counts[REGNO (x)] += incr; |
7afe21cc RK |
7098 | return; |
7099 | ||
7100 | case PC: | |
7101 | case CC0: | |
7102 | case CONST: | |
7103 | case CONST_INT: | |
7104 | case CONST_DOUBLE: | |
69ef87e2 | 7105 | case CONST_VECTOR: |
7afe21cc RK |
7106 | case SYMBOL_REF: |
7107 | case LABEL_REF: | |
02e39abc JL |
7108 | return; |
7109 | ||
278a83b2 | 7110 | case CLOBBER: |
02e39abc JL |
7111 | /* If we are clobbering a MEM, mark any registers inside the address |
7112 | as being used. */ | |
3c0cb5de | 7113 | if (MEM_P (XEXP (x, 0))) |
9ab81df2 | 7114 | count_reg_usage (XEXP (XEXP (x, 0), 0), counts, incr); |
7afe21cc RK |
7115 | return; |
7116 | ||
7117 | case SET: | |
7118 | /* Unless we are setting a REG, count everything in SET_DEST. */ | |
f8cfc6aa | 7119 | if (!REG_P (SET_DEST (x))) |
9ab81df2 JDA |
7120 | count_reg_usage (SET_DEST (x), counts, incr); |
7121 | count_reg_usage (SET_SRC (x), counts, incr); | |
7afe21cc RK |
7122 | return; |
7123 | ||
f1e7c95f | 7124 | case CALL_INSN: |
9ab81df2 | 7125 | count_reg_usage (CALL_INSN_FUNCTION_USAGE (x), counts, incr); |
ddc356e8 | 7126 | /* Fall through. */ |
f1e7c95f | 7127 | |
7afe21cc RK |
7128 | case INSN: |
7129 | case JUMP_INSN: | |
9ab81df2 | 7130 | count_reg_usage (PATTERN (x), counts, incr); |
7afe21cc RK |
7131 | |
7132 | /* Things used in a REG_EQUAL note aren't dead since loop may try to | |
7133 | use them. */ | |
7134 | ||
b17d5d7c ZD |
7135 | note = find_reg_equal_equiv_note (x); |
7136 | if (note) | |
839844be R |
7137 | { |
7138 | rtx eqv = XEXP (note, 0); | |
7139 | ||
7140 | if (GET_CODE (eqv) == EXPR_LIST) | |
7141 | /* This REG_EQUAL note describes the result of a function call. | |
7142 | Process all the arguments. */ | |
7143 | do | |
7144 | { | |
9ab81df2 | 7145 | count_reg_usage (XEXP (eqv, 0), counts, incr); |
839844be R |
7146 | eqv = XEXP (eqv, 1); |
7147 | } | |
7148 | while (eqv && GET_CODE (eqv) == EXPR_LIST); | |
7149 | else | |
9ab81df2 | 7150 | count_reg_usage (eqv, counts, incr); |
839844be | 7151 | } |
7afe21cc RK |
7152 | return; |
7153 | ||
ee960939 OH |
7154 | case EXPR_LIST: |
7155 | if (REG_NOTE_KIND (x) == REG_EQUAL | |
7156 | || (REG_NOTE_KIND (x) != REG_NONNEG && GET_CODE (XEXP (x,0)) == USE) | |
7157 | /* FUNCTION_USAGE expression lists may include (CLOBBER (mem /u)), | |
7158 | involving registers in the address. */ | |
7159 | || GET_CODE (XEXP (x, 0)) == CLOBBER) | |
9ab81df2 | 7160 | count_reg_usage (XEXP (x, 0), counts, incr); |
ee960939 | 7161 | |
9ab81df2 | 7162 | count_reg_usage (XEXP (x, 1), counts, incr); |
ee960939 OH |
7163 | return; |
7164 | ||
a6c14a64 | 7165 | case ASM_OPERANDS: |
a6c14a64 RH |
7166 | /* Iterate over just the inputs, not the constraints as well. */ |
7167 | for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--) | |
9ab81df2 | 7168 | count_reg_usage (ASM_OPERANDS_INPUT (x, i), counts, incr); |
a6c14a64 RH |
7169 | return; |
7170 | ||
7afe21cc | 7171 | case INSN_LIST: |
341c100f | 7172 | gcc_unreachable (); |
278a83b2 | 7173 | |
e9a25f70 JL |
7174 | default: |
7175 | break; | |
7afe21cc RK |
7176 | } |
7177 | ||
7178 | fmt = GET_RTX_FORMAT (code); | |
7179 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
7180 | { | |
7181 | if (fmt[i] == 'e') | |
9ab81df2 | 7182 | count_reg_usage (XEXP (x, i), counts, incr); |
7afe21cc RK |
7183 | else if (fmt[i] == 'E') |
7184 | for (j = XVECLEN (x, i) - 1; j >= 0; j--) | |
9ab81df2 | 7185 | count_reg_usage (XVECEXP (x, i, j), counts, incr); |
7afe21cc RK |
7186 | } |
7187 | } | |
7188 | \f | |
4793dca1 JH |
7189 | /* Return true if set is live. */ |
7190 | static bool | |
7080f735 AJ |
7191 | set_live_p (rtx set, rtx insn ATTRIBUTE_UNUSED, /* Only used with HAVE_cc0. */ |
7192 | int *counts) | |
4793dca1 JH |
7193 | { |
7194 | #ifdef HAVE_cc0 | |
7195 | rtx tem; | |
7196 | #endif | |
7197 | ||
7198 | if (set_noop_p (set)) | |
7199 | ; | |
7200 | ||
7201 | #ifdef HAVE_cc0 | |
7202 | else if (GET_CODE (SET_DEST (set)) == CC0 | |
7203 | && !side_effects_p (SET_SRC (set)) | |
7204 | && ((tem = next_nonnote_insn (insn)) == 0 | |
7205 | || !INSN_P (tem) | |
7206 | || !reg_referenced_p (cc0_rtx, PATTERN (tem)))) | |
7207 | return false; | |
7208 | #endif | |
f8cfc6aa | 7209 | else if (!REG_P (SET_DEST (set)) |
4793dca1 JH |
7210 | || REGNO (SET_DEST (set)) < FIRST_PSEUDO_REGISTER |
7211 | || counts[REGNO (SET_DEST (set))] != 0 | |
8fff4fc1 | 7212 | || side_effects_p (SET_SRC (set))) |
4793dca1 JH |
7213 | return true; |
7214 | return false; | |
7215 | } | |
7216 | ||
7217 | /* Return true if insn is live. */ | |
7218 | ||
7219 | static bool | |
7080f735 | 7220 | insn_live_p (rtx insn, int *counts) |
4793dca1 JH |
7221 | { |
7222 | int i; | |
a3745024 | 7223 | if (flag_non_call_exceptions && may_trap_p (PATTERN (insn))) |
a646f6cc AH |
7224 | return true; |
7225 | else if (GET_CODE (PATTERN (insn)) == SET) | |
0021de69 | 7226 | return set_live_p (PATTERN (insn), insn, counts); |
4793dca1 | 7227 | else if (GET_CODE (PATTERN (insn)) == PARALLEL) |
0021de69 DB |
7228 | { |
7229 | for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--) | |
7230 | { | |
7231 | rtx elt = XVECEXP (PATTERN (insn), 0, i); | |
4793dca1 | 7232 | |
0021de69 DB |
7233 | if (GET_CODE (elt) == SET) |
7234 | { | |
7235 | if (set_live_p (elt, insn, counts)) | |
7236 | return true; | |
7237 | } | |
7238 | else if (GET_CODE (elt) != CLOBBER && GET_CODE (elt) != USE) | |
7239 | return true; | |
7240 | } | |
7241 | return false; | |
7242 | } | |
4793dca1 JH |
7243 | else |
7244 | return true; | |
7245 | } | |
7246 | ||
7247 | /* Return true if libcall is dead as a whole. */ | |
7248 | ||
7249 | static bool | |
7080f735 | 7250 | dead_libcall_p (rtx insn, int *counts) |
4793dca1 | 7251 | { |
0c19a26f RS |
7252 | rtx note, set, new; |
7253 | ||
4793dca1 JH |
7254 | /* See if there's a REG_EQUAL note on this insn and try to |
7255 | replace the source with the REG_EQUAL expression. | |
7256 | ||
7257 | We assume that insns with REG_RETVALs can only be reg->reg | |
7258 | copies at this point. */ | |
7259 | note = find_reg_note (insn, REG_EQUAL, NULL_RTX); | |
0c19a26f RS |
7260 | if (!note) |
7261 | return false; | |
7262 | ||
7263 | set = single_set (insn); | |
7264 | if (!set) | |
7265 | return false; | |
4793dca1 | 7266 | |
0c19a26f RS |
7267 | new = simplify_rtx (XEXP (note, 0)); |
7268 | if (!new) | |
7269 | new = XEXP (note, 0); | |
4793dca1 | 7270 | |
0c19a26f | 7271 | /* While changing insn, we must update the counts accordingly. */ |
9ab81df2 | 7272 | count_reg_usage (insn, counts, -1); |
1e150f2c | 7273 | |
0c19a26f RS |
7274 | if (validate_change (insn, &SET_SRC (set), new, 0)) |
7275 | { | |
9ab81df2 | 7276 | count_reg_usage (insn, counts, 1); |
0c19a26f RS |
7277 | remove_note (insn, find_reg_note (insn, REG_RETVAL, NULL_RTX)); |
7278 | remove_note (insn, note); | |
7279 | return true; | |
7280 | } | |
7281 | ||
7282 | if (CONSTANT_P (new)) | |
7283 | { | |
7284 | new = force_const_mem (GET_MODE (SET_DEST (set)), new); | |
7285 | if (new && validate_change (insn, &SET_SRC (set), new, 0)) | |
4793dca1 | 7286 | { |
9ab81df2 | 7287 | count_reg_usage (insn, counts, 1); |
4793dca1 | 7288 | remove_note (insn, find_reg_note (insn, REG_RETVAL, NULL_RTX)); |
1e150f2c | 7289 | remove_note (insn, note); |
4793dca1 JH |
7290 | return true; |
7291 | } | |
7292 | } | |
7080f735 | 7293 | |
9ab81df2 | 7294 | count_reg_usage (insn, counts, 1); |
4793dca1 JH |
7295 | return false; |
7296 | } | |
7297 | ||
7afe21cc RK |
7298 | /* Scan all the insns and delete any that are dead; i.e., they store a register |
7299 | that is never used or they copy a register to itself. | |
7300 | ||
c6a26dc4 JL |
7301 | This is used to remove insns made obviously dead by cse, loop or other |
7302 | optimizations. It improves the heuristics in loop since it won't try to | |
7303 | move dead invariants out of loops or make givs for dead quantities. The | |
7304 | remaining passes of the compilation are also sped up. */ | |
7afe21cc | 7305 | |
3dec4024 | 7306 | int |
7080f735 | 7307 | delete_trivially_dead_insns (rtx insns, int nreg) |
7afe21cc | 7308 | { |
4da896b2 | 7309 | int *counts; |
77fa0940 | 7310 | rtx insn, prev; |
614bb5d4 | 7311 | int in_libcall = 0, dead_libcall = 0; |
65e9fa10 | 7312 | int ndead = 0; |
7afe21cc | 7313 | |
3dec4024 | 7314 | timevar_push (TV_DELETE_TRIVIALLY_DEAD); |
7afe21cc | 7315 | /* First count the number of times each register is used. */ |
703ad42b | 7316 | counts = xcalloc (nreg, sizeof (int)); |
03ce14db KH |
7317 | for (insn = insns; insn; insn = NEXT_INSN (insn)) |
7318 | if (INSN_P (insn)) | |
7319 | count_reg_usage (insn, counts, 1); | |
7afe21cc | 7320 | |
65e9fa10 KH |
7321 | /* Go from the last insn to the first and delete insns that only set unused |
7322 | registers or copy a register to itself. As we delete an insn, remove | |
7323 | usage counts for registers it uses. | |
0cedb36c | 7324 | |
65e9fa10 KH |
7325 | The first jump optimization pass may leave a real insn as the last |
7326 | insn in the function. We must not skip that insn or we may end | |
7327 | up deleting code that is not really dead. */ | |
03ce14db | 7328 | for (insn = get_last_insn (); insn; insn = prev) |
65e9fa10 KH |
7329 | { |
7330 | int live_insn = 0; | |
7afe21cc | 7331 | |
03ce14db KH |
7332 | prev = PREV_INSN (insn); |
7333 | if (!INSN_P (insn)) | |
7334 | continue; | |
7afe21cc | 7335 | |
65e9fa10 KH |
7336 | /* Don't delete any insns that are part of a libcall block unless |
7337 | we can delete the whole libcall block. | |
7338 | ||
7339 | Flow or loop might get confused if we did that. Remember | |
7340 | that we are scanning backwards. */ | |
7341 | if (find_reg_note (insn, REG_RETVAL, NULL_RTX)) | |
7342 | { | |
7343 | in_libcall = 1; | |
7344 | live_insn = 1; | |
7345 | dead_libcall = dead_libcall_p (insn, counts); | |
7346 | } | |
7347 | else if (in_libcall) | |
7348 | live_insn = ! dead_libcall; | |
7349 | else | |
7350 | live_insn = insn_live_p (insn, counts); | |
7afe21cc | 7351 | |
65e9fa10 KH |
7352 | /* If this is a dead insn, delete it and show registers in it aren't |
7353 | being used. */ | |
7afe21cc | 7354 | |
65e9fa10 KH |
7355 | if (! live_insn) |
7356 | { | |
7357 | count_reg_usage (insn, counts, -1); | |
7358 | delete_insn_and_edges (insn); | |
7359 | ndead++; | |
7360 | } | |
e4890d45 | 7361 | |
2b5936fd | 7362 | if (in_libcall && find_reg_note (insn, REG_LIBCALL, NULL_RTX)) |
65e9fa10 KH |
7363 | { |
7364 | in_libcall = 0; | |
7365 | dead_libcall = 0; | |
614bb5d4 | 7366 | } |
68252e27 | 7367 | } |
4da896b2 | 7368 | |
c263766c | 7369 | if (dump_file && ndead) |
65e9fa10 KH |
7370 | fprintf (dump_file, "Deleted %i trivially dead insns\n", |
7371 | ndead); | |
4da896b2 MM |
7372 | /* Clean up. */ |
7373 | free (counts); | |
3dec4024 JH |
7374 | timevar_pop (TV_DELETE_TRIVIALLY_DEAD); |
7375 | return ndead; | |
7afe21cc | 7376 | } |
e129d93a ILT |
7377 | |
7378 | /* This function is called via for_each_rtx. The argument, NEWREG, is | |
7379 | a condition code register with the desired mode. If we are looking | |
7380 | at the same register in a different mode, replace it with | |
7381 | NEWREG. */ | |
7382 | ||
7383 | static int | |
7384 | cse_change_cc_mode (rtx *loc, void *data) | |
7385 | { | |
fc188d37 | 7386 | struct change_cc_mode_args* args = (struct change_cc_mode_args*)data; |
e129d93a ILT |
7387 | |
7388 | if (*loc | |
f8cfc6aa | 7389 | && REG_P (*loc) |
fc188d37 AK |
7390 | && REGNO (*loc) == REGNO (args->newreg) |
7391 | && GET_MODE (*loc) != GET_MODE (args->newreg)) | |
e129d93a | 7392 | { |
fc188d37 AK |
7393 | validate_change (args->insn, loc, args->newreg, 1); |
7394 | ||
e129d93a ILT |
7395 | return -1; |
7396 | } | |
7397 | return 0; | |
7398 | } | |
7399 | ||
fc188d37 AK |
7400 | /* Change the mode of any reference to the register REGNO (NEWREG) to |
7401 | GET_MODE (NEWREG) in INSN. */ | |
7402 | ||
7403 | static void | |
7404 | cse_change_cc_mode_insn (rtx insn, rtx newreg) | |
7405 | { | |
7406 | struct change_cc_mode_args args; | |
7407 | int success; | |
7408 | ||
7409 | if (!INSN_P (insn)) | |
7410 | return; | |
7411 | ||
7412 | args.insn = insn; | |
7413 | args.newreg = newreg; | |
7414 | ||
7415 | for_each_rtx (&PATTERN (insn), cse_change_cc_mode, &args); | |
7416 | for_each_rtx (®_NOTES (insn), cse_change_cc_mode, &args); | |
7417 | ||
7418 | /* If the following assertion was triggered, there is most probably | |
7419 | something wrong with the cc_modes_compatible back end function. | |
7420 | CC modes only can be considered compatible if the insn - with the mode | |
7421 | replaced by any of the compatible modes - can still be recognized. */ | |
7422 | success = apply_change_group (); | |
7423 | gcc_assert (success); | |
7424 | } | |
7425 | ||
e129d93a ILT |
7426 | /* Change the mode of any reference to the register REGNO (NEWREG) to |
7427 | GET_MODE (NEWREG), starting at START. Stop before END. Stop at | |
2e802a6f | 7428 | any instruction which modifies NEWREG. */ |
e129d93a ILT |
7429 | |
7430 | static void | |
7431 | cse_change_cc_mode_insns (rtx start, rtx end, rtx newreg) | |
7432 | { | |
7433 | rtx insn; | |
7434 | ||
7435 | for (insn = start; insn != end; insn = NEXT_INSN (insn)) | |
7436 | { | |
7437 | if (! INSN_P (insn)) | |
7438 | continue; | |
7439 | ||
2e802a6f | 7440 | if (reg_set_p (newreg, insn)) |
e129d93a ILT |
7441 | return; |
7442 | ||
fc188d37 | 7443 | cse_change_cc_mode_insn (insn, newreg); |
e129d93a ILT |
7444 | } |
7445 | } | |
7446 | ||
7447 | /* BB is a basic block which finishes with CC_REG as a condition code | |
7448 | register which is set to CC_SRC. Look through the successors of BB | |
7449 | to find blocks which have a single predecessor (i.e., this one), | |
7450 | and look through those blocks for an assignment to CC_REG which is | |
7451 | equivalent to CC_SRC. CAN_CHANGE_MODE indicates whether we are | |
7452 | permitted to change the mode of CC_SRC to a compatible mode. This | |
7453 | returns VOIDmode if no equivalent assignments were found. | |
7454 | Otherwise it returns the mode which CC_SRC should wind up with. | |
7455 | ||
7456 | The main complexity in this function is handling the mode issues. | |
7457 | We may have more than one duplicate which we can eliminate, and we | |
7458 | try to find a mode which will work for multiple duplicates. */ | |
7459 | ||
7460 | static enum machine_mode | |
7461 | cse_cc_succs (basic_block bb, rtx cc_reg, rtx cc_src, bool can_change_mode) | |
7462 | { | |
7463 | bool found_equiv; | |
7464 | enum machine_mode mode; | |
7465 | unsigned int insn_count; | |
7466 | edge e; | |
7467 | rtx insns[2]; | |
7468 | enum machine_mode modes[2]; | |
7469 | rtx last_insns[2]; | |
7470 | unsigned int i; | |
7471 | rtx newreg; | |
628f6a4e | 7472 | edge_iterator ei; |
e129d93a ILT |
7473 | |
7474 | /* We expect to have two successors. Look at both before picking | |
7475 | the final mode for the comparison. If we have more successors | |
7476 | (i.e., some sort of table jump, although that seems unlikely), | |
7477 | then we require all beyond the first two to use the same | |
7478 | mode. */ | |
7479 | ||
7480 | found_equiv = false; | |
7481 | mode = GET_MODE (cc_src); | |
7482 | insn_count = 0; | |
628f6a4e | 7483 | FOR_EACH_EDGE (e, ei, bb->succs) |
e129d93a ILT |
7484 | { |
7485 | rtx insn; | |
7486 | rtx end; | |
7487 | ||
7488 | if (e->flags & EDGE_COMPLEX) | |
7489 | continue; | |
7490 | ||
628f6a4e | 7491 | if (EDGE_COUNT (e->dest->preds) != 1 |
e129d93a ILT |
7492 | || e->dest == EXIT_BLOCK_PTR) |
7493 | continue; | |
7494 | ||
7495 | end = NEXT_INSN (BB_END (e->dest)); | |
7496 | for (insn = BB_HEAD (e->dest); insn != end; insn = NEXT_INSN (insn)) | |
7497 | { | |
7498 | rtx set; | |
7499 | ||
7500 | if (! INSN_P (insn)) | |
7501 | continue; | |
7502 | ||
7503 | /* If CC_SRC is modified, we have to stop looking for | |
7504 | something which uses it. */ | |
7505 | if (modified_in_p (cc_src, insn)) | |
7506 | break; | |
7507 | ||
7508 | /* Check whether INSN sets CC_REG to CC_SRC. */ | |
7509 | set = single_set (insn); | |
7510 | if (set | |
f8cfc6aa | 7511 | && REG_P (SET_DEST (set)) |
e129d93a ILT |
7512 | && REGNO (SET_DEST (set)) == REGNO (cc_reg)) |
7513 | { | |
7514 | bool found; | |
7515 | enum machine_mode set_mode; | |
7516 | enum machine_mode comp_mode; | |
7517 | ||
7518 | found = false; | |
7519 | set_mode = GET_MODE (SET_SRC (set)); | |
7520 | comp_mode = set_mode; | |
7521 | if (rtx_equal_p (cc_src, SET_SRC (set))) | |
7522 | found = true; | |
7523 | else if (GET_CODE (cc_src) == COMPARE | |
7524 | && GET_CODE (SET_SRC (set)) == COMPARE | |
1f44254c | 7525 | && mode != set_mode |
e129d93a ILT |
7526 | && rtx_equal_p (XEXP (cc_src, 0), |
7527 | XEXP (SET_SRC (set), 0)) | |
7528 | && rtx_equal_p (XEXP (cc_src, 1), | |
7529 | XEXP (SET_SRC (set), 1))) | |
7530 | ||
7531 | { | |
5fd9b178 | 7532 | comp_mode = targetm.cc_modes_compatible (mode, set_mode); |
e129d93a ILT |
7533 | if (comp_mode != VOIDmode |
7534 | && (can_change_mode || comp_mode == mode)) | |
7535 | found = true; | |
7536 | } | |
7537 | ||
7538 | if (found) | |
7539 | { | |
7540 | found_equiv = true; | |
1f44254c | 7541 | if (insn_count < ARRAY_SIZE (insns)) |
e129d93a ILT |
7542 | { |
7543 | insns[insn_count] = insn; | |
7544 | modes[insn_count] = set_mode; | |
7545 | last_insns[insn_count] = end; | |
7546 | ++insn_count; | |
7547 | ||
1f44254c ILT |
7548 | if (mode != comp_mode) |
7549 | { | |
341c100f | 7550 | gcc_assert (can_change_mode); |
1f44254c | 7551 | mode = comp_mode; |
fc188d37 AK |
7552 | |
7553 | /* The modified insn will be re-recognized later. */ | |
1f44254c ILT |
7554 | PUT_MODE (cc_src, mode); |
7555 | } | |
e129d93a ILT |
7556 | } |
7557 | else | |
7558 | { | |
7559 | if (set_mode != mode) | |
1f44254c ILT |
7560 | { |
7561 | /* We found a matching expression in the | |
7562 | wrong mode, but we don't have room to | |
7563 | store it in the array. Punt. This case | |
7564 | should be rare. */ | |
7565 | break; | |
7566 | } | |
e129d93a ILT |
7567 | /* INSN sets CC_REG to a value equal to CC_SRC |
7568 | with the right mode. We can simply delete | |
7569 | it. */ | |
7570 | delete_insn (insn); | |
7571 | } | |
7572 | ||
7573 | /* We found an instruction to delete. Keep looking, | |
7574 | in the hopes of finding a three-way jump. */ | |
7575 | continue; | |
7576 | } | |
7577 | ||
7578 | /* We found an instruction which sets the condition | |
7579 | code, so don't look any farther. */ | |
7580 | break; | |
7581 | } | |
7582 | ||
7583 | /* If INSN sets CC_REG in some other way, don't look any | |
7584 | farther. */ | |
7585 | if (reg_set_p (cc_reg, insn)) | |
7586 | break; | |
7587 | } | |
7588 | ||
7589 | /* If we fell off the bottom of the block, we can keep looking | |
7590 | through successors. We pass CAN_CHANGE_MODE as false because | |
7591 | we aren't prepared to handle compatibility between the | |
7592 | further blocks and this block. */ | |
7593 | if (insn == end) | |
7594 | { | |
1f44254c ILT |
7595 | enum machine_mode submode; |
7596 | ||
7597 | submode = cse_cc_succs (e->dest, cc_reg, cc_src, false); | |
7598 | if (submode != VOIDmode) | |
7599 | { | |
341c100f | 7600 | gcc_assert (submode == mode); |
1f44254c ILT |
7601 | found_equiv = true; |
7602 | can_change_mode = false; | |
7603 | } | |
e129d93a ILT |
7604 | } |
7605 | } | |
7606 | ||
7607 | if (! found_equiv) | |
7608 | return VOIDmode; | |
7609 | ||
7610 | /* Now INSN_COUNT is the number of instructions we found which set | |
7611 | CC_REG to a value equivalent to CC_SRC. The instructions are in | |
7612 | INSNS. The modes used by those instructions are in MODES. */ | |
7613 | ||
7614 | newreg = NULL_RTX; | |
7615 | for (i = 0; i < insn_count; ++i) | |
7616 | { | |
7617 | if (modes[i] != mode) | |
7618 | { | |
7619 | /* We need to change the mode of CC_REG in INSNS[i] and | |
7620 | subsequent instructions. */ | |
7621 | if (! newreg) | |
7622 | { | |
7623 | if (GET_MODE (cc_reg) == mode) | |
7624 | newreg = cc_reg; | |
7625 | else | |
7626 | newreg = gen_rtx_REG (mode, REGNO (cc_reg)); | |
7627 | } | |
7628 | cse_change_cc_mode_insns (NEXT_INSN (insns[i]), last_insns[i], | |
7629 | newreg); | |
7630 | } | |
7631 | ||
7632 | delete_insn (insns[i]); | |
7633 | } | |
7634 | ||
7635 | return mode; | |
7636 | } | |
7637 | ||
7638 | /* If we have a fixed condition code register (or two), walk through | |
7639 | the instructions and try to eliminate duplicate assignments. */ | |
7640 | ||
7641 | void | |
7642 | cse_condition_code_reg (void) | |
7643 | { | |
7644 | unsigned int cc_regno_1; | |
7645 | unsigned int cc_regno_2; | |
7646 | rtx cc_reg_1; | |
7647 | rtx cc_reg_2; | |
7648 | basic_block bb; | |
7649 | ||
5fd9b178 | 7650 | if (! targetm.fixed_condition_code_regs (&cc_regno_1, &cc_regno_2)) |
e129d93a ILT |
7651 | return; |
7652 | ||
7653 | cc_reg_1 = gen_rtx_REG (CCmode, cc_regno_1); | |
7654 | if (cc_regno_2 != INVALID_REGNUM) | |
7655 | cc_reg_2 = gen_rtx_REG (CCmode, cc_regno_2); | |
7656 | else | |
7657 | cc_reg_2 = NULL_RTX; | |
7658 | ||
7659 | FOR_EACH_BB (bb) | |
7660 | { | |
7661 | rtx last_insn; | |
7662 | rtx cc_reg; | |
7663 | rtx insn; | |
7664 | rtx cc_src_insn; | |
7665 | rtx cc_src; | |
7666 | enum machine_mode mode; | |
1f44254c | 7667 | enum machine_mode orig_mode; |
e129d93a ILT |
7668 | |
7669 | /* Look for blocks which end with a conditional jump based on a | |
7670 | condition code register. Then look for the instruction which | |
7671 | sets the condition code register. Then look through the | |
7672 | successor blocks for instructions which set the condition | |
7673 | code register to the same value. There are other possible | |
7674 | uses of the condition code register, but these are by far the | |
7675 | most common and the ones which we are most likely to be able | |
7676 | to optimize. */ | |
7677 | ||
7678 | last_insn = BB_END (bb); | |
4b4bf941 | 7679 | if (!JUMP_P (last_insn)) |
e129d93a ILT |
7680 | continue; |
7681 | ||
7682 | if (reg_referenced_p (cc_reg_1, PATTERN (last_insn))) | |
7683 | cc_reg = cc_reg_1; | |
7684 | else if (cc_reg_2 && reg_referenced_p (cc_reg_2, PATTERN (last_insn))) | |
7685 | cc_reg = cc_reg_2; | |
7686 | else | |
7687 | continue; | |
7688 | ||
7689 | cc_src_insn = NULL_RTX; | |
7690 | cc_src = NULL_RTX; | |
7691 | for (insn = PREV_INSN (last_insn); | |
7692 | insn && insn != PREV_INSN (BB_HEAD (bb)); | |
7693 | insn = PREV_INSN (insn)) | |
7694 | { | |
7695 | rtx set; | |
7696 | ||
7697 | if (! INSN_P (insn)) | |
7698 | continue; | |
7699 | set = single_set (insn); | |
7700 | if (set | |
f8cfc6aa | 7701 | && REG_P (SET_DEST (set)) |
e129d93a ILT |
7702 | && REGNO (SET_DEST (set)) == REGNO (cc_reg)) |
7703 | { | |
7704 | cc_src_insn = insn; | |
7705 | cc_src = SET_SRC (set); | |
7706 | break; | |
7707 | } | |
7708 | else if (reg_set_p (cc_reg, insn)) | |
7709 | break; | |
7710 | } | |
7711 | ||
7712 | if (! cc_src_insn) | |
7713 | continue; | |
7714 | ||
7715 | if (modified_between_p (cc_src, cc_src_insn, NEXT_INSN (last_insn))) | |
7716 | continue; | |
7717 | ||
7718 | /* Now CC_REG is a condition code register used for a | |
7719 | conditional jump at the end of the block, and CC_SRC, in | |
7720 | CC_SRC_INSN, is the value to which that condition code | |
7721 | register is set, and CC_SRC is still meaningful at the end of | |
7722 | the basic block. */ | |
7723 | ||
1f44254c | 7724 | orig_mode = GET_MODE (cc_src); |
e129d93a | 7725 | mode = cse_cc_succs (bb, cc_reg, cc_src, true); |
1f44254c | 7726 | if (mode != VOIDmode) |
e129d93a | 7727 | { |
341c100f | 7728 | gcc_assert (mode == GET_MODE (cc_src)); |
1f44254c | 7729 | if (mode != orig_mode) |
2e802a6f KH |
7730 | { |
7731 | rtx newreg = gen_rtx_REG (mode, REGNO (cc_reg)); | |
7732 | ||
fc188d37 | 7733 | cse_change_cc_mode_insn (cc_src_insn, newreg); |
2e802a6f KH |
7734 | |
7735 | /* Do the same in the following insns that use the | |
7736 | current value of CC_REG within BB. */ | |
7737 | cse_change_cc_mode_insns (NEXT_INSN (cc_src_insn), | |
7738 | NEXT_INSN (last_insn), | |
7739 | newreg); | |
7740 | } | |
e129d93a ILT |
7741 | } |
7742 | } | |
7743 | } |