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7afe21cc 1/* Common subexpression elimination for GNU compiler.
5e7b4e25 2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998
26d107db 3 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
7afe21cc 4
1322177d 5This file is part of GCC.
7afe21cc 6
1322177d
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7GCC is free software; you can redistribute it and/or modify it under
8the terms of the GNU General Public License as published by the Free
9Software Foundation; either version 2, or (at your option) any later
10version.
7afe21cc 11
1322177d
LB
12GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13WARRANTY; without even the implied warranty of MERCHANTABILITY or
14FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15for more details.
7afe21cc
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16
17You should have received a copy of the GNU General Public License
1322177d
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18along with GCC; see the file COPYING. If not, write to the Free
19Software Foundation, 59 Temple Place - Suite 330, Boston, MA
2002111-1307, USA. */
7afe21cc 21
7afe21cc 22#include "config.h"
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23/* stdio.h must precede rtl.h for FFS. */
24#include "system.h"
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25#include "coretypes.h"
26#include "tm.h"
9c3b4c8b 27
7afe21cc 28#include "rtl.h"
6baf1cc8 29#include "tm_p.h"
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30#include "regs.h"
31#include "hard-reg-set.h"
630c79be 32#include "basic-block.h"
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33#include "flags.h"
34#include "real.h"
35#include "insn-config.h"
36#include "recog.h"
49ad7cfa 37#include "function.h"
956d6950 38#include "expr.h"
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39#include "toplev.h"
40#include "output.h"
1497faf6 41#include "ggc.h"
3dec4024 42#include "timevar.h"
26771da7 43#include "except.h"
3c50106f 44#include "target.h"
9bf8cfbf 45#include "params.h"
2f93eea8 46#include "rtlhooks-def.h"
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47
48/* The basic idea of common subexpression elimination is to go
49 through the code, keeping a record of expressions that would
50 have the same value at the current scan point, and replacing
51 expressions encountered with the cheapest equivalent expression.
52
53 It is too complicated to keep track of the different possibilities
e48a7fbe
JL
54 when control paths merge in this code; so, at each label, we forget all
55 that is known and start fresh. This can be described as processing each
56 extended basic block separately. We have a separate pass to perform
57 global CSE.
58
59 Note CSE can turn a conditional or computed jump into a nop or
60 an unconditional jump. When this occurs we arrange to run the jump
61 optimizer after CSE to delete the unreachable code.
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62
63 We use two data structures to record the equivalent expressions:
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64 a hash table for most expressions, and a vector of "quantity
65 numbers" to record equivalent (pseudo) registers.
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66
67 The use of the special data structure for registers is desirable
68 because it is faster. It is possible because registers references
69 contain a fairly small number, the register number, taken from
70 a contiguously allocated series, and two register references are
71 identical if they have the same number. General expressions
72 do not have any such thing, so the only way to retrieve the
73 information recorded on an expression other than a register
74 is to keep it in a hash table.
75
76Registers and "quantity numbers":
278a83b2 77
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78 At the start of each basic block, all of the (hardware and pseudo)
79 registers used in the function are given distinct quantity
80 numbers to indicate their contents. During scan, when the code
81 copies one register into another, we copy the quantity number.
82 When a register is loaded in any other way, we allocate a new
83 quantity number to describe the value generated by this operation.
84 `reg_qty' records what quantity a register is currently thought
85 of as containing.
86
87 All real quantity numbers are greater than or equal to `max_reg'.
88 If register N has not been assigned a quantity, reg_qty[N] will equal N.
89
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90 Quantity numbers below `max_reg' do not exist and none of the `qty_table'
91 entries should be referenced with an index below `max_reg'.
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92
93 We also maintain a bidirectional chain of registers for each
1bb98cec
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94 quantity number. The `qty_table` members `first_reg' and `last_reg',
95 and `reg_eqv_table' members `next' and `prev' hold these chains.
7afe21cc
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96
97 The first register in a chain is the one whose lifespan is least local.
98 Among equals, it is the one that was seen first.
99 We replace any equivalent register with that one.
100
101 If two registers have the same quantity number, it must be true that
1bb98cec 102 REG expressions with qty_table `mode' must be in the hash table for both
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103 registers and must be in the same class.
104
105 The converse is not true. Since hard registers may be referenced in
106 any mode, two REG expressions might be equivalent in the hash table
107 but not have the same quantity number if the quantity number of one
108 of the registers is not the same mode as those expressions.
278a83b2 109
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110Constants and quantity numbers
111
112 When a quantity has a known constant value, that value is stored
1bb98cec 113 in the appropriate qty_table `const_rtx'. This is in addition to
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114 putting the constant in the hash table as is usual for non-regs.
115
d45cf215 116 Whether a reg or a constant is preferred is determined by the configuration
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117 macro CONST_COSTS and will often depend on the constant value. In any
118 event, expressions containing constants can be simplified, by fold_rtx.
119
120 When a quantity has a known nearly constant value (such as an address
1bb98cec
DM
121 of a stack slot), that value is stored in the appropriate qty_table
122 `const_rtx'.
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123
124 Integer constants don't have a machine mode. However, cse
125 determines the intended machine mode from the destination
126 of the instruction that moves the constant. The machine mode
127 is recorded in the hash table along with the actual RTL
128 constant expression so that different modes are kept separate.
129
130Other expressions:
131
132 To record known equivalences among expressions in general
133 we use a hash table called `table'. It has a fixed number of buckets
134 that contain chains of `struct table_elt' elements for expressions.
135 These chains connect the elements whose expressions have the same
136 hash codes.
137
138 Other chains through the same elements connect the elements which
139 currently have equivalent values.
140
141 Register references in an expression are canonicalized before hashing
1bb98cec 142 the expression. This is done using `reg_qty' and qty_table `first_reg'.
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143 The hash code of a register reference is computed using the quantity
144 number, not the register number.
145
146 When the value of an expression changes, it is necessary to remove from the
147 hash table not just that expression but all expressions whose values
148 could be different as a result.
149
150 1. If the value changing is in memory, except in special cases
151 ANYTHING referring to memory could be changed. That is because
152 nobody knows where a pointer does not point.
153 The function `invalidate_memory' removes what is necessary.
154
155 The special cases are when the address is constant or is
156 a constant plus a fixed register such as the frame pointer
157 or a static chain pointer. When such addresses are stored in,
158 we can tell exactly which other such addresses must be invalidated
159 due to overlap. `invalidate' does this.
160 All expressions that refer to non-constant
161 memory addresses are also invalidated. `invalidate_memory' does this.
162
163 2. If the value changing is a register, all expressions
164 containing references to that register, and only those,
165 must be removed.
166
167 Because searching the entire hash table for expressions that contain
168 a register is very slow, we try to figure out when it isn't necessary.
169 Precisely, this is necessary only when expressions have been
170 entered in the hash table using this register, and then the value has
171 changed, and then another expression wants to be added to refer to
172 the register's new value. This sequence of circumstances is rare
173 within any one basic block.
174
175 The vectors `reg_tick' and `reg_in_table' are used to detect this case.
176 reg_tick[i] is incremented whenever a value is stored in register i.
177 reg_in_table[i] holds -1 if no references to register i have been
178 entered in the table; otherwise, it contains the value reg_tick[i] had
179 when the references were entered. If we want to enter a reference
180 and reg_in_table[i] != reg_tick[i], we must scan and remove old references.
181 Until we want to enter a new entry, the mere fact that the two vectors
182 don't match makes the entries be ignored if anyone tries to match them.
183
184 Registers themselves are entered in the hash table as well as in
185 the equivalent-register chains. However, the vectors `reg_tick'
186 and `reg_in_table' do not apply to expressions which are simple
187 register references. These expressions are removed from the table
188 immediately when they become invalid, and this can be done even if
189 we do not immediately search for all the expressions that refer to
190 the register.
191
192 A CLOBBER rtx in an instruction invalidates its operand for further
193 reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
194 invalidates everything that resides in memory.
195
196Related expressions:
197
198 Constant expressions that differ only by an additive integer
199 are called related. When a constant expression is put in
200 the table, the related expression with no constant term
201 is also entered. These are made to point at each other
202 so that it is possible to find out if there exists any
203 register equivalent to an expression related to a given expression. */
278a83b2 204
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205/* One plus largest register number used in this function. */
206
207static int max_reg;
208
556c714b
JW
209/* One plus largest instruction UID used in this function at time of
210 cse_main call. */
211
212static int max_insn_uid;
213
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214/* Length of qty_table vector. We know in advance we will not need
215 a quantity number this big. */
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216
217static int max_qty;
218
219/* Next quantity number to be allocated.
220 This is 1 + the largest number needed so far. */
221
222static int next_qty;
223
1bb98cec 224/* Per-qty information tracking.
7afe21cc 225
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DM
226 `first_reg' and `last_reg' track the head and tail of the
227 chain of registers which currently contain this quantity.
7afe21cc 228
1bb98cec 229 `mode' contains the machine mode of this quantity.
7afe21cc 230
1bb98cec
DM
231 `const_rtx' holds the rtx of the constant value of this
232 quantity, if known. A summations of the frame/arg pointer
233 and a constant can also be entered here. When this holds
234 a known value, `const_insn' is the insn which stored the
235 constant value.
7afe21cc 236
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DM
237 `comparison_{code,const,qty}' are used to track when a
238 comparison between a quantity and some constant or register has
239 been passed. In such a case, we know the results of the comparison
240 in case we see it again. These members record a comparison that
241 is known to be true. `comparison_code' holds the rtx code of such
242 a comparison, else it is set to UNKNOWN and the other two
243 comparison members are undefined. `comparison_const' holds
244 the constant being compared against, or zero if the comparison
245 is not against a constant. `comparison_qty' holds the quantity
246 being compared against when the result is known. If the comparison
247 is not with a register, `comparison_qty' is -1. */
7afe21cc 248
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249struct qty_table_elem
250{
251 rtx const_rtx;
252 rtx const_insn;
253 rtx comparison_const;
254 int comparison_qty;
770ae6cc 255 unsigned int first_reg, last_reg;
496324d0
DN
256 /* The sizes of these fields should match the sizes of the
257 code and mode fields of struct rtx_def (see rtl.h). */
258 ENUM_BITFIELD(rtx_code) comparison_code : 16;
259 ENUM_BITFIELD(machine_mode) mode : 8;
1bb98cec 260};
7afe21cc 261
1bb98cec
DM
262/* The table of all qtys, indexed by qty number. */
263static struct qty_table_elem *qty_table;
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264
265#ifdef HAVE_cc0
266/* For machines that have a CC0, we do not record its value in the hash
267 table since its use is guaranteed to be the insn immediately following
268 its definition and any other insn is presumed to invalidate it.
269
270 Instead, we store below the value last assigned to CC0. If it should
271 happen to be a constant, it is stored in preference to the actual
272 assigned value. In case it is a constant, we store the mode in which
273 the constant should be interpreted. */
274
275static rtx prev_insn_cc0;
276static enum machine_mode prev_insn_cc0_mode;
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277
278/* Previous actual insn. 0 if at first insn of basic block. */
279
280static rtx prev_insn;
4977bab6 281#endif
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282
283/* Insn being scanned. */
284
285static rtx this_insn;
286
71d306d1
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287/* Index by register number, gives the number of the next (or
288 previous) register in the chain of registers sharing the same
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289 value.
290
291 Or -1 if this register is at the end of the chain.
292
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293 If reg_qty[N] == N, reg_eqv_table[N].next is undefined. */
294
295/* Per-register equivalence chain. */
296struct reg_eqv_elem
297{
298 int next, prev;
299};
7afe21cc 300
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301/* The table of all register equivalence chains. */
302static struct reg_eqv_elem *reg_eqv_table;
7afe21cc 303
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RK
304struct cse_reg_info
305{
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306 /* Next in hash chain. */
307 struct cse_reg_info *hash_next;
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308
309 /* The next cse_reg_info structure in the free or used list. */
14a774a9 310 struct cse_reg_info *next;
30f72379 311
9b1549b8 312 /* Search key */
770ae6cc 313 unsigned int regno;
9b1549b8
DM
314
315 /* The quantity number of the register's current contents. */
316 int reg_qty;
317
318 /* The number of times the register has been altered in the current
319 basic block. */
320 int reg_tick;
321
30f72379
MM
322 /* The REG_TICK value at which rtx's containing this register are
323 valid in the hash table. If this does not equal the current
324 reg_tick value, such expressions existing in the hash table are
325 invalid. */
326 int reg_in_table;
46081bb3
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327
328 /* The SUBREG that was set when REG_TICK was last incremented. Set
329 to -1 if the last store was to the whole register, not a subreg. */
5dd78e9a 330 unsigned int subreg_ticked;
30f72379 331};
7afe21cc 332
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333/* A free list of cse_reg_info entries. */
334static struct cse_reg_info *cse_reg_info_free_list;
7afe21cc 335
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336/* A used list of cse_reg_info entries. */
337static struct cse_reg_info *cse_reg_info_used_list;
338static struct cse_reg_info *cse_reg_info_used_list_end;
339
30f72379 340/* A mapping from registers to cse_reg_info data structures. */
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DM
341#define REGHASH_SHIFT 7
342#define REGHASH_SIZE (1 << REGHASH_SHIFT)
343#define REGHASH_MASK (REGHASH_SIZE - 1)
344static struct cse_reg_info *reg_hash[REGHASH_SIZE];
345
346#define REGHASH_FN(REGNO) \
347 (((REGNO) ^ ((REGNO) >> REGHASH_SHIFT)) & REGHASH_MASK)
7afe21cc 348
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MM
349/* The last lookup we did into the cse_reg_info_tree. This allows us
350 to cache repeated lookups. */
770ae6cc 351static unsigned int cached_regno;
30f72379 352static struct cse_reg_info *cached_cse_reg_info;
7afe21cc 353
278a83b2 354/* A HARD_REG_SET containing all the hard registers for which there is
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355 currently a REG expression in the hash table. Note the difference
356 from the above variables, which indicate if the REG is mentioned in some
357 expression in the table. */
358
359static HARD_REG_SET hard_regs_in_table;
360
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361/* CUID of insn that starts the basic block currently being cse-processed. */
362
363static int cse_basic_block_start;
364
365/* CUID of insn that ends the basic block currently being cse-processed. */
366
367static int cse_basic_block_end;
368
369/* Vector mapping INSN_UIDs to cuids.
d45cf215 370 The cuids are like uids but increase monotonically always.
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371 We use them to see whether a reg is used outside a given basic block. */
372
906c4e36 373static int *uid_cuid;
7afe21cc 374
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375/* Highest UID in UID_CUID. */
376static int max_uid;
377
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378/* Get the cuid of an insn. */
379
380#define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)])
381
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382/* Nonzero if this pass has made changes, and therefore it's
383 worthwhile to run the garbage collector. */
384
385static int cse_altered;
386
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387/* Nonzero if cse has altered conditional jump insns
388 in such a way that jump optimization should be redone. */
389
390static int cse_jumps_altered;
391
f85cc4cb
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392/* Nonzero if we put a LABEL_REF into the hash table for an INSN without a
393 REG_LABEL, we have to rerun jump after CSE to put in the note. */
a5dfb4ee
RK
394static int recorded_label_ref;
395
7afe21cc
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396/* canon_hash stores 1 in do_not_record
397 if it notices a reference to CC0, PC, or some other volatile
398 subexpression. */
399
400static int do_not_record;
401
7bac1be0
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402#ifdef LOAD_EXTEND_OP
403
404/* Scratch rtl used when looking for load-extended copy of a MEM. */
405static rtx memory_extend_rtx;
406#endif
407
7afe21cc
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408/* canon_hash stores 1 in hash_arg_in_memory
409 if it notices a reference to memory within the expression being hashed. */
410
411static int hash_arg_in_memory;
412
7afe21cc
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413/* The hash table contains buckets which are chains of `struct table_elt's,
414 each recording one expression's information.
415 That expression is in the `exp' field.
416
db048faf
MM
417 The canon_exp field contains a canonical (from the point of view of
418 alias analysis) version of the `exp' field.
419
7afe21cc
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420 Those elements with the same hash code are chained in both directions
421 through the `next_same_hash' and `prev_same_hash' fields.
422
423 Each set of expressions with equivalent values
424 are on a two-way chain through the `next_same_value'
425 and `prev_same_value' fields, and all point with
426 the `first_same_value' field at the first element in
427 that chain. The chain is in order of increasing cost.
428 Each element's cost value is in its `cost' field.
429
430 The `in_memory' field is nonzero for elements that
431 involve any reference to memory. These elements are removed
432 whenever a write is done to an unidentified location in memory.
433 To be safe, we assume that a memory address is unidentified unless
434 the address is either a symbol constant or a constant plus
435 the frame pointer or argument pointer.
436
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437 The `related_value' field is used to connect related expressions
438 (that differ by adding an integer).
439 The related expressions are chained in a circular fashion.
440 `related_value' is zero for expressions for which this
441 chain is not useful.
442
443 The `cost' field stores the cost of this element's expression.
630c79be
BS
444 The `regcost' field stores the value returned by approx_reg_cost for
445 this element's expression.
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446
447 The `is_const' flag is set if the element is a constant (including
448 a fixed address).
449
450 The `flag' field is used as a temporary during some search routines.
451
452 The `mode' field is usually the same as GET_MODE (`exp'), but
453 if `exp' is a CONST_INT and has no machine mode then the `mode'
454 field is the mode it was being used as. Each constant is
455 recorded separately for each mode it is used with. */
456
7afe21cc
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457struct table_elt
458{
459 rtx exp;
db048faf 460 rtx canon_exp;
7afe21cc
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461 struct table_elt *next_same_hash;
462 struct table_elt *prev_same_hash;
463 struct table_elt *next_same_value;
464 struct table_elt *prev_same_value;
465 struct table_elt *first_same_value;
466 struct table_elt *related_value;
467 int cost;
630c79be 468 int regcost;
496324d0
DN
469 /* The size of this field should match the size
470 of the mode field of struct rtx_def (see rtl.h). */
471 ENUM_BITFIELD(machine_mode) mode : 8;
7afe21cc 472 char in_memory;
7afe21cc
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473 char is_const;
474 char flag;
475};
476
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477/* We don't want a lot of buckets, because we rarely have very many
478 things stored in the hash table, and a lot of buckets slows
479 down a lot of loops that happen frequently. */
9b1549b8
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480#define HASH_SHIFT 5
481#define HASH_SIZE (1 << HASH_SHIFT)
482#define HASH_MASK (HASH_SIZE - 1)
7afe21cc
RK
483
484/* Compute hash code of X in mode M. Special-case case where X is a pseudo
485 register (hard registers may require `do_not_record' to be set). */
486
487#define HASH(X, M) \
f8cfc6aa 488 ((REG_P (X) && REGNO (X) >= FIRST_PSEUDO_REGISTER \
9b1549b8
DM
489 ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \
490 : canon_hash (X, M)) & HASH_MASK)
7afe21cc 491
630c79be
BS
492/* Determine whether register number N is considered a fixed register for the
493 purpose of approximating register costs.
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494 It is desirable to replace other regs with fixed regs, to reduce need for
495 non-fixed hard regs.
553687c9 496 A reg wins if it is either the frame pointer or designated as fixed. */
7afe21cc 497#define FIXED_REGNO_P(N) \
8bc169f2 498 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
6ab832bc 499 || fixed_regs[N] || global_regs[N])
7afe21cc
RK
500
501/* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
ac07e066
RK
502 hard registers and pointers into the frame are the cheapest with a cost
503 of 0. Next come pseudos with a cost of one and other hard registers with
504 a cost of 2. Aside from these special cases, call `rtx_cost'. */
505
6ab832bc 506#define CHEAP_REGNO(N) \
7080f735
AJ
507 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
508 || (N) == STACK_POINTER_REGNUM || (N) == ARG_POINTER_REGNUM \
509 || ((N) >= FIRST_VIRTUAL_REGISTER && (N) <= LAST_VIRTUAL_REGISTER) \
8bc169f2 510 || ((N) < FIRST_PSEUDO_REGISTER \
e7bb59fa 511 && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
7afe21cc 512
f8cfc6aa
JQ
513#define COST(X) (REG_P (X) ? 0 : notreg_cost (X, SET))
514#define COST_IN(X,OUTER) (REG_P (X) ? 0 : notreg_cost (X, OUTER))
7afe21cc 515
30f72379
MM
516/* Get the info associated with register N. */
517
7080f735 518#define GET_CSE_REG_INFO(N) \
30f72379
MM
519 (((N) == cached_regno && cached_cse_reg_info) \
520 ? cached_cse_reg_info : get_cse_reg_info ((N)))
521
522/* Get the number of times this register has been updated in this
523 basic block. */
524
c1edba58 525#define REG_TICK(N) ((GET_CSE_REG_INFO (N))->reg_tick)
30f72379
MM
526
527/* Get the point at which REG was recorded in the table. */
528
529#define REG_IN_TABLE(N) ((GET_CSE_REG_INFO (N))->reg_in_table)
530
46081bb3
SH
531/* Get the SUBREG set at the last increment to REG_TICK (-1 if not a
532 SUBREG). */
533
534#define SUBREG_TICKED(N) ((GET_CSE_REG_INFO (N))->subreg_ticked)
535
30f72379
MM
536/* Get the quantity number for REG. */
537
538#define REG_QTY(N) ((GET_CSE_REG_INFO (N))->reg_qty)
539
7afe21cc 540/* Determine if the quantity number for register X represents a valid index
1bb98cec 541 into the qty_table. */
7afe21cc 542
770ae6cc 543#define REGNO_QTY_VALID_P(N) (REG_QTY (N) != (int) (N))
7afe21cc 544
9b1549b8 545static struct table_elt *table[HASH_SIZE];
7afe21cc
RK
546
547/* Chain of `struct table_elt's made so far for this function
548 but currently removed from the table. */
549
550static struct table_elt *free_element_chain;
551
552/* Number of `struct table_elt' structures made so far for this function. */
553
554static int n_elements_made;
555
556/* Maximum value `n_elements_made' has had so far in this compilation
557 for functions previously processed. */
558
559static int max_elements_made;
560
278a83b2 561/* Surviving equivalence class when two equivalence classes are merged
7afe21cc
RK
562 by recording the effects of a jump in the last insn. Zero if the
563 last insn was not a conditional jump. */
564
565static struct table_elt *last_jump_equiv_class;
566
567/* Set to the cost of a constant pool reference if one was found for a
568 symbolic constant. If this was found, it means we should try to
569 convert constants into constant pool entries if they don't fit in
570 the insn. */
571
572static int constant_pool_entries_cost;
dd0ba281 573static int constant_pool_entries_regcost;
7afe21cc 574
6cd4575e
RK
575/* This data describes a block that will be processed by cse_basic_block. */
576
14a774a9
RK
577struct cse_basic_block_data
578{
6cd4575e
RK
579 /* Lowest CUID value of insns in block. */
580 int low_cuid;
581 /* Highest CUID value of insns in block. */
582 int high_cuid;
583 /* Total number of SETs in block. */
584 int nsets;
585 /* Last insn in the block. */
586 rtx last;
587 /* Size of current branch path, if any. */
588 int path_size;
589 /* Current branch path, indicating which branches will be taken. */
14a774a9
RK
590 struct branch_path
591 {
592 /* The branch insn. */
593 rtx branch;
594 /* Whether it should be taken or not. AROUND is the same as taken
595 except that it is used when the destination label is not preceded
6cd4575e 596 by a BARRIER. */
6de9cd9a 597 enum taken {PATH_TAKEN, PATH_NOT_TAKEN, PATH_AROUND} status;
9bf8cfbf 598 } *path;
6cd4575e
RK
599};
600
7080f735
AJ
601static bool fixed_base_plus_p (rtx x);
602static int notreg_cost (rtx, enum rtx_code);
603static int approx_reg_cost_1 (rtx *, void *);
604static int approx_reg_cost (rtx);
56ae04af 605static int preferable (int, int, int, int);
7080f735
AJ
606static void new_basic_block (void);
607static void make_new_qty (unsigned int, enum machine_mode);
608static void make_regs_eqv (unsigned int, unsigned int);
609static void delete_reg_equiv (unsigned int);
610static int mention_regs (rtx);
611static int insert_regs (rtx, struct table_elt *, int);
612static void remove_from_table (struct table_elt *, unsigned);
613static struct table_elt *lookup (rtx, unsigned, enum machine_mode);
614static struct table_elt *lookup_for_remove (rtx, unsigned, enum machine_mode);
615static rtx lookup_as_function (rtx, enum rtx_code);
616static struct table_elt *insert (rtx, struct table_elt *, unsigned,
617 enum machine_mode);
618static void merge_equiv_classes (struct table_elt *, struct table_elt *);
619static void invalidate (rtx, enum machine_mode);
620static int cse_rtx_varies_p (rtx, int);
621static void remove_invalid_refs (unsigned int);
622static void remove_invalid_subreg_refs (unsigned int, unsigned int,
623 enum machine_mode);
624static void rehash_using_reg (rtx);
625static void invalidate_memory (void);
626static void invalidate_for_call (void);
627static rtx use_related_value (rtx, struct table_elt *);
628static unsigned canon_hash (rtx, enum machine_mode);
629static unsigned canon_hash_string (const char *);
630static unsigned safe_hash (rtx, enum machine_mode);
631static int exp_equiv_p (rtx, rtx, int, int);
632static rtx canon_reg (rtx, rtx);
633static void find_best_addr (rtx, rtx *, enum machine_mode);
634static enum rtx_code find_comparison_args (enum rtx_code, rtx *, rtx *,
635 enum machine_mode *,
636 enum machine_mode *);
637static rtx fold_rtx (rtx, rtx);
638static rtx equiv_constant (rtx);
639static void record_jump_equiv (rtx, int);
640static void record_jump_cond (enum rtx_code, enum machine_mode, rtx, rtx,
641 int);
642static void cse_insn (rtx, rtx);
86caf04d
PB
643static void cse_end_of_basic_block (rtx, struct cse_basic_block_data *,
644 int, int, int);
7080f735
AJ
645static int addr_affects_sp_p (rtx);
646static void invalidate_from_clobbers (rtx);
647static rtx cse_process_notes (rtx, rtx);
648static void cse_around_loop (rtx);
649static void invalidate_skipped_set (rtx, rtx, void *);
650static void invalidate_skipped_block (rtx);
651static void cse_check_loop_start (rtx, rtx, void *);
652static void cse_set_around_loop (rtx, rtx, rtx);
653static rtx cse_basic_block (rtx, rtx, struct branch_path *, int);
9ab81df2 654static void count_reg_usage (rtx, int *, int);
7080f735
AJ
655static int check_for_label_ref (rtx *, void *);
656extern void dump_class (struct table_elt*);
657static struct cse_reg_info * get_cse_reg_info (unsigned int);
658static int check_dependence (rtx *, void *);
659
660static void flush_hash_table (void);
661static bool insn_live_p (rtx, int *);
662static bool set_live_p (rtx, rtx, int *);
663static bool dead_libcall_p (rtx, int *);
e129d93a
ILT
664static int cse_change_cc_mode (rtx *, void *);
665static void cse_change_cc_mode_insns (rtx, rtx, rtx);
666static enum machine_mode cse_cc_succs (basic_block, rtx, rtx, bool);
7afe21cc 667\f
2f93eea8
PB
668
669#undef RTL_HOOKS_GEN_LOWPART
670#define RTL_HOOKS_GEN_LOWPART gen_lowpart_if_possible
671
672static const struct rtl_hooks cse_rtl_hooks = RTL_HOOKS_INITIALIZER;
673\f
4977bab6
ZW
674/* Nonzero if X has the form (PLUS frame-pointer integer). We check for
675 virtual regs here because the simplify_*_operation routines are called
676 by integrate.c, which is called before virtual register instantiation. */
677
678static bool
7080f735 679fixed_base_plus_p (rtx x)
4977bab6
ZW
680{
681 switch (GET_CODE (x))
682 {
683 case REG:
684 if (x == frame_pointer_rtx || x == hard_frame_pointer_rtx)
685 return true;
686 if (x == arg_pointer_rtx && fixed_regs[ARG_POINTER_REGNUM])
687 return true;
688 if (REGNO (x) >= FIRST_VIRTUAL_REGISTER
689 && REGNO (x) <= LAST_VIRTUAL_REGISTER)
690 return true;
691 return false;
692
693 case PLUS:
694 if (GET_CODE (XEXP (x, 1)) != CONST_INT)
695 return false;
696 return fixed_base_plus_p (XEXP (x, 0));
697
4977bab6
ZW
698 default:
699 return false;
700 }
701}
702
a4c6502a
MM
703/* Dump the expressions in the equivalence class indicated by CLASSP.
704 This function is used only for debugging. */
a0153051 705void
7080f735 706dump_class (struct table_elt *classp)
a4c6502a
MM
707{
708 struct table_elt *elt;
709
710 fprintf (stderr, "Equivalence chain for ");
711 print_rtl (stderr, classp->exp);
712 fprintf (stderr, ": \n");
278a83b2 713
a4c6502a
MM
714 for (elt = classp->first_same_value; elt; elt = elt->next_same_value)
715 {
716 print_rtl (stderr, elt->exp);
717 fprintf (stderr, "\n");
718 }
719}
720
630c79be 721/* Subroutine of approx_reg_cost; called through for_each_rtx. */
be8ac49a 722
630c79be 723static int
7080f735 724approx_reg_cost_1 (rtx *xp, void *data)
630c79be
BS
725{
726 rtx x = *xp;
c863f8c2 727 int *cost_p = data;
630c79be 728
f8cfc6aa 729 if (x && REG_P (x))
c863f8c2
DM
730 {
731 unsigned int regno = REGNO (x);
732
733 if (! CHEAP_REGNO (regno))
734 {
735 if (regno < FIRST_PSEUDO_REGISTER)
736 {
737 if (SMALL_REGISTER_CLASSES)
738 return 1;
739 *cost_p += 2;
740 }
741 else
742 *cost_p += 1;
743 }
744 }
745
630c79be
BS
746 return 0;
747}
748
749/* Return an estimate of the cost of the registers used in an rtx.
750 This is mostly the number of different REG expressions in the rtx;
a1f300c0 751 however for some exceptions like fixed registers we use a cost of
f1c1dfc3 752 0. If any other hard register reference occurs, return MAX_COST. */
630c79be
BS
753
754static int
7080f735 755approx_reg_cost (rtx x)
630c79be 756{
630c79be 757 int cost = 0;
f1c1dfc3 758
c863f8c2
DM
759 if (for_each_rtx (&x, approx_reg_cost_1, (void *) &cost))
760 return MAX_COST;
630c79be 761
c863f8c2 762 return cost;
630c79be
BS
763}
764
765/* Return a negative value if an rtx A, whose costs are given by COST_A
766 and REGCOST_A, is more desirable than an rtx B.
767 Return a positive value if A is less desirable, or 0 if the two are
768 equally good. */
769static int
56ae04af 770preferable (int cost_a, int regcost_a, int cost_b, int regcost_b)
630c79be 771{
423adbb9 772 /* First, get rid of cases involving expressions that are entirely
f1c1dfc3
BS
773 unwanted. */
774 if (cost_a != cost_b)
775 {
776 if (cost_a == MAX_COST)
777 return 1;
778 if (cost_b == MAX_COST)
779 return -1;
780 }
781
782 /* Avoid extending lifetimes of hardregs. */
783 if (regcost_a != regcost_b)
784 {
785 if (regcost_a == MAX_COST)
786 return 1;
787 if (regcost_b == MAX_COST)
788 return -1;
789 }
790
791 /* Normal operation costs take precedence. */
630c79be
BS
792 if (cost_a != cost_b)
793 return cost_a - cost_b;
f1c1dfc3 794 /* Only if these are identical consider effects on register pressure. */
630c79be
BS
795 if (regcost_a != regcost_b)
796 return regcost_a - regcost_b;
797 return 0;
798}
799
954a5693
RK
800/* Internal function, to compute cost when X is not a register; called
801 from COST macro to keep it simple. */
802
803static int
7080f735 804notreg_cost (rtx x, enum rtx_code outer)
954a5693
RK
805{
806 return ((GET_CODE (x) == SUBREG
f8cfc6aa 807 && REG_P (SUBREG_REG (x))
954a5693
RK
808 && GET_MODE_CLASS (GET_MODE (x)) == MODE_INT
809 && GET_MODE_CLASS (GET_MODE (SUBREG_REG (x))) == MODE_INT
810 && (GET_MODE_SIZE (GET_MODE (x))
811 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
812 && subreg_lowpart_p (x)
813 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE (x)),
814 GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x)))))
630c79be 815 ? 0
f2fa288f 816 : rtx_cost (x, outer) * 2);
954a5693
RK
817}
818
01329426 819\f
30f72379 820static struct cse_reg_info *
7080f735 821get_cse_reg_info (unsigned int regno)
30f72379 822{
9b1549b8
DM
823 struct cse_reg_info **hash_head = &reg_hash[REGHASH_FN (regno)];
824 struct cse_reg_info *p;
825
278a83b2 826 for (p = *hash_head; p != NULL; p = p->hash_next)
9b1549b8
DM
827 if (p->regno == regno)
828 break;
829
830 if (p == NULL)
30f72379
MM
831 {
832 /* Get a new cse_reg_info structure. */
9b1549b8 833 if (cse_reg_info_free_list)
30f72379 834 {
9b1549b8
DM
835 p = cse_reg_info_free_list;
836 cse_reg_info_free_list = p->next;
30f72379
MM
837 }
838 else
703ad42b 839 p = xmalloc (sizeof (struct cse_reg_info));
9b1549b8
DM
840
841 /* Insert into hash table. */
842 p->hash_next = *hash_head;
843 *hash_head = p;
30f72379
MM
844
845 /* Initialize it. */
9b1549b8
DM
846 p->reg_tick = 1;
847 p->reg_in_table = -1;
46081bb3 848 p->subreg_ticked = -1;
9b1549b8
DM
849 p->reg_qty = regno;
850 p->regno = regno;
851 p->next = cse_reg_info_used_list;
852 cse_reg_info_used_list = p;
c1edba58 853 if (!cse_reg_info_used_list_end)
9b1549b8 854 cse_reg_info_used_list_end = p;
30f72379
MM
855 }
856
857 /* Cache this lookup; we tend to be looking up information about the
858 same register several times in a row. */
859 cached_regno = regno;
9b1549b8 860 cached_cse_reg_info = p;
30f72379 861
9b1549b8 862 return p;
30f72379
MM
863}
864
7afe21cc
RK
865/* Clear the hash table and initialize each register with its own quantity,
866 for a new basic block. */
867
868static void
7080f735 869new_basic_block (void)
7afe21cc 870{
b3694847 871 int i;
7afe21cc
RK
872
873 next_qty = max_reg;
874
9b1549b8
DM
875 /* Clear out hash table state for this pass. */
876
703ad42b 877 memset (reg_hash, 0, sizeof reg_hash);
9b1549b8
DM
878
879 if (cse_reg_info_used_list)
30f72379 880 {
9b1549b8
DM
881 cse_reg_info_used_list_end->next = cse_reg_info_free_list;
882 cse_reg_info_free_list = cse_reg_info_used_list;
883 cse_reg_info_used_list = cse_reg_info_used_list_end = 0;
30f72379 884 }
9b1549b8 885 cached_cse_reg_info = 0;
7afe21cc 886
7afe21cc
RK
887 CLEAR_HARD_REG_SET (hard_regs_in_table);
888
889 /* The per-quantity values used to be initialized here, but it is
890 much faster to initialize each as it is made in `make_new_qty'. */
891
9b1549b8 892 for (i = 0; i < HASH_SIZE; i++)
7afe21cc 893 {
9b1549b8
DM
894 struct table_elt *first;
895
896 first = table[i];
897 if (first != NULL)
7afe21cc 898 {
9b1549b8
DM
899 struct table_elt *last = first;
900
901 table[i] = NULL;
902
903 while (last->next_same_hash != NULL)
904 last = last->next_same_hash;
905
906 /* Now relink this hash entire chain into
907 the free element list. */
908
909 last->next_same_hash = free_element_chain;
910 free_element_chain = first;
7afe21cc
RK
911 }
912 }
913
7afe21cc 914#ifdef HAVE_cc0
4977bab6 915 prev_insn = 0;
7afe21cc
RK
916 prev_insn_cc0 = 0;
917#endif
918}
919
1bb98cec
DM
920/* Say that register REG contains a quantity in mode MODE not in any
921 register before and initialize that quantity. */
7afe21cc
RK
922
923static void
7080f735 924make_new_qty (unsigned int reg, enum machine_mode mode)
7afe21cc 925{
b3694847
SS
926 int q;
927 struct qty_table_elem *ent;
928 struct reg_eqv_elem *eqv;
7afe21cc
RK
929
930 if (next_qty >= max_qty)
931 abort ();
932
30f72379 933 q = REG_QTY (reg) = next_qty++;
1bb98cec
DM
934 ent = &qty_table[q];
935 ent->first_reg = reg;
936 ent->last_reg = reg;
937 ent->mode = mode;
938 ent->const_rtx = ent->const_insn = NULL_RTX;
939 ent->comparison_code = UNKNOWN;
940
941 eqv = &reg_eqv_table[reg];
942 eqv->next = eqv->prev = -1;
7afe21cc
RK
943}
944
945/* Make reg NEW equivalent to reg OLD.
946 OLD is not changing; NEW is. */
947
948static void
7080f735 949make_regs_eqv (unsigned int new, unsigned int old)
7afe21cc 950{
770ae6cc
RK
951 unsigned int lastr, firstr;
952 int q = REG_QTY (old);
953 struct qty_table_elem *ent;
1bb98cec
DM
954
955 ent = &qty_table[q];
7afe21cc
RK
956
957 /* Nothing should become eqv until it has a "non-invalid" qty number. */
958 if (! REGNO_QTY_VALID_P (old))
959 abort ();
960
30f72379 961 REG_QTY (new) = q;
1bb98cec
DM
962 firstr = ent->first_reg;
963 lastr = ent->last_reg;
7afe21cc
RK
964
965 /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
966 hard regs. Among pseudos, if NEW will live longer than any other reg
967 of the same qty, and that is beyond the current basic block,
968 make it the new canonical replacement for this qty. */
969 if (! (firstr < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (firstr))
970 /* Certain fixed registers might be of the class NO_REGS. This means
971 that not only can they not be allocated by the compiler, but
830a38ee 972 they cannot be used in substitutions or canonicalizations
7afe21cc
RK
973 either. */
974 && (new >= FIRST_PSEUDO_REGISTER || REGNO_REG_CLASS (new) != NO_REGS)
975 && ((new < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (new))
976 || (new >= FIRST_PSEUDO_REGISTER
977 && (firstr < FIRST_PSEUDO_REGISTER
b1f21e0a
MM
978 || ((uid_cuid[REGNO_LAST_UID (new)] > cse_basic_block_end
979 || (uid_cuid[REGNO_FIRST_UID (new)]
7afe21cc 980 < cse_basic_block_start))
b1f21e0a
MM
981 && (uid_cuid[REGNO_LAST_UID (new)]
982 > uid_cuid[REGNO_LAST_UID (firstr)]))))))
7afe21cc 983 {
1bb98cec
DM
984 reg_eqv_table[firstr].prev = new;
985 reg_eqv_table[new].next = firstr;
986 reg_eqv_table[new].prev = -1;
987 ent->first_reg = new;
7afe21cc
RK
988 }
989 else
990 {
991 /* If NEW is a hard reg (known to be non-fixed), insert at end.
992 Otherwise, insert before any non-fixed hard regs that are at the
993 end. Registers of class NO_REGS cannot be used as an
994 equivalent for anything. */
1bb98cec 995 while (lastr < FIRST_PSEUDO_REGISTER && reg_eqv_table[lastr].prev >= 0
7afe21cc
RK
996 && (REGNO_REG_CLASS (lastr) == NO_REGS || ! FIXED_REGNO_P (lastr))
997 && new >= FIRST_PSEUDO_REGISTER)
1bb98cec
DM
998 lastr = reg_eqv_table[lastr].prev;
999 reg_eqv_table[new].next = reg_eqv_table[lastr].next;
1000 if (reg_eqv_table[lastr].next >= 0)
1001 reg_eqv_table[reg_eqv_table[lastr].next].prev = new;
7afe21cc 1002 else
1bb98cec
DM
1003 qty_table[q].last_reg = new;
1004 reg_eqv_table[lastr].next = new;
1005 reg_eqv_table[new].prev = lastr;
7afe21cc
RK
1006 }
1007}
1008
1009/* Remove REG from its equivalence class. */
1010
1011static void
7080f735 1012delete_reg_equiv (unsigned int reg)
7afe21cc 1013{
b3694847
SS
1014 struct qty_table_elem *ent;
1015 int q = REG_QTY (reg);
1016 int p, n;
7afe21cc 1017
a4e262bc 1018 /* If invalid, do nothing. */
770ae6cc 1019 if (q == (int) reg)
7afe21cc
RK
1020 return;
1021
1bb98cec
DM
1022 ent = &qty_table[q];
1023
1024 p = reg_eqv_table[reg].prev;
1025 n = reg_eqv_table[reg].next;
a4e262bc 1026
7afe21cc 1027 if (n != -1)
1bb98cec 1028 reg_eqv_table[n].prev = p;
7afe21cc 1029 else
1bb98cec 1030 ent->last_reg = p;
7afe21cc 1031 if (p != -1)
1bb98cec 1032 reg_eqv_table[p].next = n;
7afe21cc 1033 else
1bb98cec 1034 ent->first_reg = n;
7afe21cc 1035
30f72379 1036 REG_QTY (reg) = reg;
7afe21cc
RK
1037}
1038
1039/* Remove any invalid expressions from the hash table
1040 that refer to any of the registers contained in expression X.
1041
1042 Make sure that newly inserted references to those registers
1043 as subexpressions will be considered valid.
1044
1045 mention_regs is not called when a register itself
1046 is being stored in the table.
1047
1048 Return 1 if we have done something that may have changed the hash code
1049 of X. */
1050
1051static int
7080f735 1052mention_regs (rtx x)
7afe21cc 1053{
b3694847
SS
1054 enum rtx_code code;
1055 int i, j;
1056 const char *fmt;
1057 int changed = 0;
7afe21cc
RK
1058
1059 if (x == 0)
e5f6a288 1060 return 0;
7afe21cc
RK
1061
1062 code = GET_CODE (x);
1063 if (code == REG)
1064 {
770ae6cc
RK
1065 unsigned int regno = REGNO (x);
1066 unsigned int endregno
7afe21cc 1067 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
66fd46b6 1068 : hard_regno_nregs[regno][GET_MODE (x)]);
770ae6cc 1069 unsigned int i;
7afe21cc
RK
1070
1071 for (i = regno; i < endregno; i++)
1072 {
30f72379 1073 if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
7afe21cc
RK
1074 remove_invalid_refs (i);
1075
30f72379 1076 REG_IN_TABLE (i) = REG_TICK (i);
46081bb3 1077 SUBREG_TICKED (i) = -1;
7afe21cc
RK
1078 }
1079
1080 return 0;
1081 }
1082
34c73909
R
1083 /* If this is a SUBREG, we don't want to discard other SUBREGs of the same
1084 pseudo if they don't use overlapping words. We handle only pseudos
1085 here for simplicity. */
f8cfc6aa 1086 if (code == SUBREG && REG_P (SUBREG_REG (x))
34c73909
R
1087 && REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER)
1088 {
770ae6cc 1089 unsigned int i = REGNO (SUBREG_REG (x));
34c73909 1090
30f72379 1091 if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
34c73909 1092 {
46081bb3
SH
1093 /* If REG_IN_TABLE (i) differs from REG_TICK (i) by one, and
1094 the last store to this register really stored into this
1095 subreg, then remove the memory of this subreg.
1096 Otherwise, remove any memory of the entire register and
1097 all its subregs from the table. */
1098 if (REG_TICK (i) - REG_IN_TABLE (i) > 1
5dd78e9a 1099 || SUBREG_TICKED (i) != REGNO (SUBREG_REG (x)))
34c73909
R
1100 remove_invalid_refs (i);
1101 else
ddef6bc7 1102 remove_invalid_subreg_refs (i, SUBREG_BYTE (x), GET_MODE (x));
34c73909
R
1103 }
1104
30f72379 1105 REG_IN_TABLE (i) = REG_TICK (i);
5dd78e9a 1106 SUBREG_TICKED (i) = REGNO (SUBREG_REG (x));
34c73909
R
1107 return 0;
1108 }
1109
7afe21cc
RK
1110 /* If X is a comparison or a COMPARE and either operand is a register
1111 that does not have a quantity, give it one. This is so that a later
1112 call to record_jump_equiv won't cause X to be assigned a different
1113 hash code and not found in the table after that call.
1114
1115 It is not necessary to do this here, since rehash_using_reg can
1116 fix up the table later, but doing this here eliminates the need to
1117 call that expensive function in the most common case where the only
1118 use of the register is in the comparison. */
1119
ec8e098d 1120 if (code == COMPARE || COMPARISON_P (x))
7afe21cc 1121 {
f8cfc6aa 1122 if (REG_P (XEXP (x, 0))
7afe21cc 1123 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
9714cf43 1124 if (insert_regs (XEXP (x, 0), NULL, 0))
7afe21cc
RK
1125 {
1126 rehash_using_reg (XEXP (x, 0));
1127 changed = 1;
1128 }
1129
f8cfc6aa 1130 if (REG_P (XEXP (x, 1))
7afe21cc 1131 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
9714cf43 1132 if (insert_regs (XEXP (x, 1), NULL, 0))
7afe21cc
RK
1133 {
1134 rehash_using_reg (XEXP (x, 1));
1135 changed = 1;
1136 }
1137 }
1138
1139 fmt = GET_RTX_FORMAT (code);
1140 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1141 if (fmt[i] == 'e')
1142 changed |= mention_regs (XEXP (x, i));
1143 else if (fmt[i] == 'E')
1144 for (j = 0; j < XVECLEN (x, i); j++)
1145 changed |= mention_regs (XVECEXP (x, i, j));
1146
1147 return changed;
1148}
1149
1150/* Update the register quantities for inserting X into the hash table
1151 with a value equivalent to CLASSP.
1152 (If the class does not contain a REG, it is irrelevant.)
1153 If MODIFIED is nonzero, X is a destination; it is being modified.
1154 Note that delete_reg_equiv should be called on a register
1155 before insert_regs is done on that register with MODIFIED != 0.
1156
1157 Nonzero value means that elements of reg_qty have changed
1158 so X's hash code may be different. */
1159
1160static int
7080f735 1161insert_regs (rtx x, struct table_elt *classp, int modified)
7afe21cc 1162{
f8cfc6aa 1163 if (REG_P (x))
7afe21cc 1164 {
770ae6cc
RK
1165 unsigned int regno = REGNO (x);
1166 int qty_valid;
7afe21cc 1167
1ff0c00d
RK
1168 /* If REGNO is in the equivalence table already but is of the
1169 wrong mode for that equivalence, don't do anything here. */
1170
1bb98cec
DM
1171 qty_valid = REGNO_QTY_VALID_P (regno);
1172 if (qty_valid)
1173 {
1174 struct qty_table_elem *ent = &qty_table[REG_QTY (regno)];
1ff0c00d 1175
1bb98cec
DM
1176 if (ent->mode != GET_MODE (x))
1177 return 0;
1178 }
1179
1180 if (modified || ! qty_valid)
7afe21cc
RK
1181 {
1182 if (classp)
1183 for (classp = classp->first_same_value;
1184 classp != 0;
1185 classp = classp->next_same_value)
f8cfc6aa 1186 if (REG_P (classp->exp)
7afe21cc
RK
1187 && GET_MODE (classp->exp) == GET_MODE (x))
1188 {
1189 make_regs_eqv (regno, REGNO (classp->exp));
1190 return 1;
1191 }
1192
d9f20424
R
1193 /* Mention_regs for a SUBREG checks if REG_TICK is exactly one larger
1194 than REG_IN_TABLE to find out if there was only a single preceding
1195 invalidation - for the SUBREG - or another one, which would be
1196 for the full register. However, if we find here that REG_TICK
1197 indicates that the register is invalid, it means that it has
1198 been invalidated in a separate operation. The SUBREG might be used
1199 now (then this is a recursive call), or we might use the full REG
1200 now and a SUBREG of it later. So bump up REG_TICK so that
1201 mention_regs will do the right thing. */
1202 if (! modified
1203 && REG_IN_TABLE (regno) >= 0
1204 && REG_TICK (regno) == REG_IN_TABLE (regno) + 1)
1205 REG_TICK (regno)++;
1bb98cec 1206 make_new_qty (regno, GET_MODE (x));
7afe21cc
RK
1207 return 1;
1208 }
cdf4112f
TG
1209
1210 return 0;
7afe21cc 1211 }
c610adec
RK
1212
1213 /* If X is a SUBREG, we will likely be inserting the inner register in the
1214 table. If that register doesn't have an assigned quantity number at
1215 this point but does later, the insertion that we will be doing now will
1216 not be accessible because its hash code will have changed. So assign
1217 a quantity number now. */
1218
f8cfc6aa 1219 else if (GET_CODE (x) == SUBREG && REG_P (SUBREG_REG (x))
c610adec
RK
1220 && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x))))
1221 {
9714cf43 1222 insert_regs (SUBREG_REG (x), NULL, 0);
34c73909 1223 mention_regs (x);
c610adec
RK
1224 return 1;
1225 }
7afe21cc
RK
1226 else
1227 return mention_regs (x);
1228}
1229\f
1230/* Look in or update the hash table. */
1231
7afe21cc
RK
1232/* Remove table element ELT from use in the table.
1233 HASH is its hash code, made using the HASH macro.
1234 It's an argument because often that is known in advance
1235 and we save much time not recomputing it. */
1236
1237static void
7080f735 1238remove_from_table (struct table_elt *elt, unsigned int hash)
7afe21cc
RK
1239{
1240 if (elt == 0)
1241 return;
1242
1243 /* Mark this element as removed. See cse_insn. */
1244 elt->first_same_value = 0;
1245
1246 /* Remove the table element from its equivalence class. */
278a83b2 1247
7afe21cc 1248 {
b3694847
SS
1249 struct table_elt *prev = elt->prev_same_value;
1250 struct table_elt *next = elt->next_same_value;
7afe21cc 1251
278a83b2
KH
1252 if (next)
1253 next->prev_same_value = prev;
7afe21cc
RK
1254
1255 if (prev)
1256 prev->next_same_value = next;
1257 else
1258 {
b3694847 1259 struct table_elt *newfirst = next;
7afe21cc
RK
1260 while (next)
1261 {
1262 next->first_same_value = newfirst;
1263 next = next->next_same_value;
1264 }
1265 }
1266 }
1267
1268 /* Remove the table element from its hash bucket. */
1269
1270 {
b3694847
SS
1271 struct table_elt *prev = elt->prev_same_hash;
1272 struct table_elt *next = elt->next_same_hash;
7afe21cc 1273
278a83b2
KH
1274 if (next)
1275 next->prev_same_hash = prev;
7afe21cc
RK
1276
1277 if (prev)
1278 prev->next_same_hash = next;
1279 else if (table[hash] == elt)
1280 table[hash] = next;
1281 else
1282 {
1283 /* This entry is not in the proper hash bucket. This can happen
1284 when two classes were merged by `merge_equiv_classes'. Search
1285 for the hash bucket that it heads. This happens only very
1286 rarely, so the cost is acceptable. */
9b1549b8 1287 for (hash = 0; hash < HASH_SIZE; hash++)
7afe21cc
RK
1288 if (table[hash] == elt)
1289 table[hash] = next;
1290 }
1291 }
1292
1293 /* Remove the table element from its related-value circular chain. */
1294
1295 if (elt->related_value != 0 && elt->related_value != elt)
1296 {
b3694847 1297 struct table_elt *p = elt->related_value;
770ae6cc 1298
7afe21cc
RK
1299 while (p->related_value != elt)
1300 p = p->related_value;
1301 p->related_value = elt->related_value;
1302 if (p->related_value == p)
1303 p->related_value = 0;
1304 }
1305
9b1549b8
DM
1306 /* Now add it to the free element chain. */
1307 elt->next_same_hash = free_element_chain;
1308 free_element_chain = elt;
7afe21cc
RK
1309}
1310
1311/* Look up X in the hash table and return its table element,
1312 or 0 if X is not in the table.
1313
1314 MODE is the machine-mode of X, or if X is an integer constant
1315 with VOIDmode then MODE is the mode with which X will be used.
1316
1317 Here we are satisfied to find an expression whose tree structure
1318 looks like X. */
1319
1320static struct table_elt *
7080f735 1321lookup (rtx x, unsigned int hash, enum machine_mode mode)
7afe21cc 1322{
b3694847 1323 struct table_elt *p;
7afe21cc
RK
1324
1325 for (p = table[hash]; p; p = p->next_same_hash)
f8cfc6aa
JQ
1326 if (mode == p->mode && ((x == p->exp && REG_P (x))
1327 || exp_equiv_p (x, p->exp, !REG_P (x), 0)))
7afe21cc
RK
1328 return p;
1329
1330 return 0;
1331}
1332
1333/* Like `lookup' but don't care whether the table element uses invalid regs.
1334 Also ignore discrepancies in the machine mode of a register. */
1335
1336static struct table_elt *
7080f735 1337lookup_for_remove (rtx x, unsigned int hash, enum machine_mode mode)
7afe21cc 1338{
b3694847 1339 struct table_elt *p;
7afe21cc 1340
f8cfc6aa 1341 if (REG_P (x))
7afe21cc 1342 {
770ae6cc
RK
1343 unsigned int regno = REGNO (x);
1344
7afe21cc
RK
1345 /* Don't check the machine mode when comparing registers;
1346 invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1347 for (p = table[hash]; p; p = p->next_same_hash)
f8cfc6aa 1348 if (REG_P (p->exp)
7afe21cc
RK
1349 && REGNO (p->exp) == regno)
1350 return p;
1351 }
1352 else
1353 {
1354 for (p = table[hash]; p; p = p->next_same_hash)
1355 if (mode == p->mode && (x == p->exp || exp_equiv_p (x, p->exp, 0, 0)))
1356 return p;
1357 }
1358
1359 return 0;
1360}
1361
1362/* Look for an expression equivalent to X and with code CODE.
1363 If one is found, return that expression. */
1364
1365static rtx
7080f735 1366lookup_as_function (rtx x, enum rtx_code code)
7afe21cc 1367{
b3694847 1368 struct table_elt *p
770ae6cc
RK
1369 = lookup (x, safe_hash (x, VOIDmode) & HASH_MASK, GET_MODE (x));
1370
34c73909
R
1371 /* If we are looking for a CONST_INT, the mode doesn't really matter, as
1372 long as we are narrowing. So if we looked in vain for a mode narrower
1373 than word_mode before, look for word_mode now. */
1374 if (p == 0 && code == CONST_INT
1375 && GET_MODE_SIZE (GET_MODE (x)) < GET_MODE_SIZE (word_mode))
1376 {
1377 x = copy_rtx (x);
1378 PUT_MODE (x, word_mode);
9b1549b8 1379 p = lookup (x, safe_hash (x, VOIDmode) & HASH_MASK, word_mode);
34c73909
R
1380 }
1381
7afe21cc
RK
1382 if (p == 0)
1383 return 0;
1384
1385 for (p = p->first_same_value; p; p = p->next_same_value)
770ae6cc
RK
1386 if (GET_CODE (p->exp) == code
1387 /* Make sure this is a valid entry in the table. */
1388 && exp_equiv_p (p->exp, p->exp, 1, 0))
1389 return p->exp;
278a83b2 1390
7afe21cc
RK
1391 return 0;
1392}
1393
1394/* Insert X in the hash table, assuming HASH is its hash code
1395 and CLASSP is an element of the class it should go in
1396 (or 0 if a new class should be made).
1397 It is inserted at the proper position to keep the class in
1398 the order cheapest first.
1399
1400 MODE is the machine-mode of X, or if X is an integer constant
1401 with VOIDmode then MODE is the mode with which X will be used.
1402
1403 For elements of equal cheapness, the most recent one
1404 goes in front, except that the first element in the list
1405 remains first unless a cheaper element is added. The order of
1406 pseudo-registers does not matter, as canon_reg will be called to
830a38ee 1407 find the cheapest when a register is retrieved from the table.
7afe21cc
RK
1408
1409 The in_memory field in the hash table element is set to 0.
1410 The caller must set it nonzero if appropriate.
1411
1412 You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1413 and if insert_regs returns a nonzero value
1414 you must then recompute its hash code before calling here.
1415
1416 If necessary, update table showing constant values of quantities. */
1417
630c79be 1418#define CHEAPER(X, Y) \
56ae04af 1419 (preferable ((X)->cost, (X)->regcost, (Y)->cost, (Y)->regcost) < 0)
7afe21cc
RK
1420
1421static struct table_elt *
7080f735 1422insert (rtx x, struct table_elt *classp, unsigned int hash, enum machine_mode mode)
7afe21cc 1423{
b3694847 1424 struct table_elt *elt;
7afe21cc
RK
1425
1426 /* If X is a register and we haven't made a quantity for it,
1427 something is wrong. */
f8cfc6aa 1428 if (REG_P (x) && ! REGNO_QTY_VALID_P (REGNO (x)))
7afe21cc
RK
1429 abort ();
1430
1431 /* If X is a hard register, show it is being put in the table. */
f8cfc6aa 1432 if (REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
7afe21cc 1433 {
770ae6cc 1434 unsigned int regno = REGNO (x);
66fd46b6 1435 unsigned int endregno = regno + hard_regno_nregs[regno][GET_MODE (x)];
770ae6cc 1436 unsigned int i;
7afe21cc
RK
1437
1438 for (i = regno; i < endregno; i++)
770ae6cc 1439 SET_HARD_REG_BIT (hard_regs_in_table, i);
7afe21cc
RK
1440 }
1441
7afe21cc
RK
1442 /* Put an element for X into the right hash bucket. */
1443
9b1549b8
DM
1444 elt = free_element_chain;
1445 if (elt)
770ae6cc 1446 free_element_chain = elt->next_same_hash;
9b1549b8
DM
1447 else
1448 {
1449 n_elements_made++;
703ad42b 1450 elt = xmalloc (sizeof (struct table_elt));
9b1549b8
DM
1451 }
1452
7afe21cc 1453 elt->exp = x;
db048faf 1454 elt->canon_exp = NULL_RTX;
7afe21cc 1455 elt->cost = COST (x);
630c79be 1456 elt->regcost = approx_reg_cost (x);
7afe21cc
RK
1457 elt->next_same_value = 0;
1458 elt->prev_same_value = 0;
1459 elt->next_same_hash = table[hash];
1460 elt->prev_same_hash = 0;
1461 elt->related_value = 0;
1462 elt->in_memory = 0;
1463 elt->mode = mode;
1464 elt->is_const = (CONSTANT_P (x)
1465 /* GNU C++ takes advantage of this for `this'
1466 (and other const values). */
f8cfc6aa 1467 || (REG_P (x)
2adc7f12 1468 && RTX_UNCHANGING_P (x)
7afe21cc 1469 && REGNO (x) >= FIRST_PSEUDO_REGISTER)
4977bab6 1470 || fixed_base_plus_p (x));
7afe21cc
RK
1471
1472 if (table[hash])
1473 table[hash]->prev_same_hash = elt;
1474 table[hash] = elt;
1475
1476 /* Put it into the proper value-class. */
1477 if (classp)
1478 {
1479 classp = classp->first_same_value;
1480 if (CHEAPER (elt, classp))
f9da5064 1481 /* Insert at the head of the class. */
7afe21cc 1482 {
b3694847 1483 struct table_elt *p;
7afe21cc
RK
1484 elt->next_same_value = classp;
1485 classp->prev_same_value = elt;
1486 elt->first_same_value = elt;
1487
1488 for (p = classp; p; p = p->next_same_value)
1489 p->first_same_value = elt;
1490 }
1491 else
1492 {
1493 /* Insert not at head of the class. */
1494 /* Put it after the last element cheaper than X. */
b3694847 1495 struct table_elt *p, *next;
770ae6cc 1496
7afe21cc
RK
1497 for (p = classp; (next = p->next_same_value) && CHEAPER (next, elt);
1498 p = next);
770ae6cc 1499
7afe21cc
RK
1500 /* Put it after P and before NEXT. */
1501 elt->next_same_value = next;
1502 if (next)
1503 next->prev_same_value = elt;
770ae6cc 1504
7afe21cc
RK
1505 elt->prev_same_value = p;
1506 p->next_same_value = elt;
1507 elt->first_same_value = classp;
1508 }
1509 }
1510 else
1511 elt->first_same_value = elt;
1512
1513 /* If this is a constant being set equivalent to a register or a register
1514 being set equivalent to a constant, note the constant equivalence.
1515
1516 If this is a constant, it cannot be equivalent to a different constant,
1517 and a constant is the only thing that can be cheaper than a register. So
1518 we know the register is the head of the class (before the constant was
1519 inserted).
1520
1521 If this is a register that is not already known equivalent to a
1522 constant, we must check the entire class.
1523
1524 If this is a register that is already known equivalent to an insn,
1bb98cec 1525 update the qtys `const_insn' to show that `this_insn' is the latest
7afe21cc
RK
1526 insn making that quantity equivalent to the constant. */
1527
f8cfc6aa
JQ
1528 if (elt->is_const && classp && REG_P (classp->exp)
1529 && !REG_P (x))
7afe21cc 1530 {
1bb98cec
DM
1531 int exp_q = REG_QTY (REGNO (classp->exp));
1532 struct qty_table_elem *exp_ent = &qty_table[exp_q];
1533
4de249d9 1534 exp_ent->const_rtx = gen_lowpart (exp_ent->mode, x);
1bb98cec 1535 exp_ent->const_insn = this_insn;
7afe21cc
RK
1536 }
1537
f8cfc6aa 1538 else if (REG_P (x)
1bb98cec
DM
1539 && classp
1540 && ! qty_table[REG_QTY (REGNO (x))].const_rtx
f353588a 1541 && ! elt->is_const)
7afe21cc 1542 {
b3694847 1543 struct table_elt *p;
7afe21cc
RK
1544
1545 for (p = classp; p != 0; p = p->next_same_value)
1546 {
f8cfc6aa 1547 if (p->is_const && !REG_P (p->exp))
7afe21cc 1548 {
1bb98cec
DM
1549 int x_q = REG_QTY (REGNO (x));
1550 struct qty_table_elem *x_ent = &qty_table[x_q];
1551
770ae6cc 1552 x_ent->const_rtx
4de249d9 1553 = gen_lowpart (GET_MODE (x), p->exp);
1bb98cec 1554 x_ent->const_insn = this_insn;
7afe21cc
RK
1555 break;
1556 }
1557 }
1558 }
1559
f8cfc6aa 1560 else if (REG_P (x)
1bb98cec
DM
1561 && qty_table[REG_QTY (REGNO (x))].const_rtx
1562 && GET_MODE (x) == qty_table[REG_QTY (REGNO (x))].mode)
1563 qty_table[REG_QTY (REGNO (x))].const_insn = this_insn;
7afe21cc
RK
1564
1565 /* If this is a constant with symbolic value,
1566 and it has a term with an explicit integer value,
1567 link it up with related expressions. */
1568 if (GET_CODE (x) == CONST)
1569 {
1570 rtx subexp = get_related_value (x);
2197a88a 1571 unsigned subhash;
7afe21cc
RK
1572 struct table_elt *subelt, *subelt_prev;
1573
1574 if (subexp != 0)
1575 {
1576 /* Get the integer-free subexpression in the hash table. */
9b1549b8 1577 subhash = safe_hash (subexp, mode) & HASH_MASK;
7afe21cc
RK
1578 subelt = lookup (subexp, subhash, mode);
1579 if (subelt == 0)
9714cf43 1580 subelt = insert (subexp, NULL, subhash, mode);
7afe21cc
RK
1581 /* Initialize SUBELT's circular chain if it has none. */
1582 if (subelt->related_value == 0)
1583 subelt->related_value = subelt;
1584 /* Find the element in the circular chain that precedes SUBELT. */
1585 subelt_prev = subelt;
1586 while (subelt_prev->related_value != subelt)
1587 subelt_prev = subelt_prev->related_value;
1588 /* Put new ELT into SUBELT's circular chain just before SUBELT.
1589 This way the element that follows SUBELT is the oldest one. */
1590 elt->related_value = subelt_prev->related_value;
1591 subelt_prev->related_value = elt;
1592 }
1593 }
1594
1595 return elt;
1596}
1597\f
1598/* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1599 CLASS2 into CLASS1. This is done when we have reached an insn which makes
1600 the two classes equivalent.
1601
1602 CLASS1 will be the surviving class; CLASS2 should not be used after this
1603 call.
1604
1605 Any invalid entries in CLASS2 will not be copied. */
1606
1607static void
7080f735 1608merge_equiv_classes (struct table_elt *class1, struct table_elt *class2)
7afe21cc
RK
1609{
1610 struct table_elt *elt, *next, *new;
1611
1612 /* Ensure we start with the head of the classes. */
1613 class1 = class1->first_same_value;
1614 class2 = class2->first_same_value;
1615
1616 /* If they were already equal, forget it. */
1617 if (class1 == class2)
1618 return;
1619
1620 for (elt = class2; elt; elt = next)
1621 {
770ae6cc 1622 unsigned int hash;
7afe21cc
RK
1623 rtx exp = elt->exp;
1624 enum machine_mode mode = elt->mode;
1625
1626 next = elt->next_same_value;
1627
1628 /* Remove old entry, make a new one in CLASS1's class.
1629 Don't do this for invalid entries as we cannot find their
0f41302f 1630 hash code (it also isn't necessary). */
f8cfc6aa 1631 if (REG_P (exp) || exp_equiv_p (exp, exp, 1, 0))
7afe21cc 1632 {
a90fc8e0
RH
1633 bool need_rehash = false;
1634
7afe21cc 1635 hash_arg_in_memory = 0;
7afe21cc 1636 hash = HASH (exp, mode);
278a83b2 1637
f8cfc6aa 1638 if (REG_P (exp))
a90fc8e0
RH
1639 {
1640 need_rehash = (unsigned) REG_QTY (REGNO (exp)) != REGNO (exp);
1641 delete_reg_equiv (REGNO (exp));
1642 }
278a83b2 1643
7afe21cc
RK
1644 remove_from_table (elt, hash);
1645
a90fc8e0 1646 if (insert_regs (exp, class1, 0) || need_rehash)
8ae2b8f6
JW
1647 {
1648 rehash_using_reg (exp);
1649 hash = HASH (exp, mode);
1650 }
7afe21cc
RK
1651 new = insert (exp, class1, hash, mode);
1652 new->in_memory = hash_arg_in_memory;
7afe21cc
RK
1653 }
1654 }
1655}
1656\f
01e752d3
JL
1657/* Flush the entire hash table. */
1658
1659static void
7080f735 1660flush_hash_table (void)
01e752d3
JL
1661{
1662 int i;
1663 struct table_elt *p;
1664
9b1549b8 1665 for (i = 0; i < HASH_SIZE; i++)
01e752d3
JL
1666 for (p = table[i]; p; p = table[i])
1667 {
1668 /* Note that invalidate can remove elements
1669 after P in the current hash chain. */
f8cfc6aa 1670 if (REG_P (p->exp))
01e752d3
JL
1671 invalidate (p->exp, p->mode);
1672 else
1673 remove_from_table (p, i);
1674 }
1675}
14a774a9 1676\f
2ce6dc2f
JH
1677/* Function called for each rtx to check whether true dependence exist. */
1678struct check_dependence_data
1679{
1680 enum machine_mode mode;
1681 rtx exp;
9ddb66ca 1682 rtx addr;
2ce6dc2f 1683};
be8ac49a 1684
2ce6dc2f 1685static int
7080f735 1686check_dependence (rtx *x, void *data)
2ce6dc2f
JH
1687{
1688 struct check_dependence_data *d = (struct check_dependence_data *) data;
3c0cb5de 1689 if (*x && MEM_P (*x))
9ddb66ca
JH
1690 return canon_true_dependence (d->exp, d->mode, d->addr, *x,
1691 cse_rtx_varies_p);
2ce6dc2f
JH
1692 else
1693 return 0;
1694}
1695\f
14a774a9
RK
1696/* Remove from the hash table, or mark as invalid, all expressions whose
1697 values could be altered by storing in X. X is a register, a subreg, or
1698 a memory reference with nonvarying address (because, when a memory
1699 reference with a varying address is stored in, all memory references are
1700 removed by invalidate_memory so specific invalidation is superfluous).
1701 FULL_MODE, if not VOIDmode, indicates that this much should be
1702 invalidated instead of just the amount indicated by the mode of X. This
1703 is only used for bitfield stores into memory.
1704
1705 A nonvarying address may be just a register or just a symbol reference,
1706 or it may be either of those plus a numeric offset. */
7afe21cc
RK
1707
1708static void
7080f735 1709invalidate (rtx x, enum machine_mode full_mode)
7afe21cc 1710{
b3694847
SS
1711 int i;
1712 struct table_elt *p;
9ddb66ca 1713 rtx addr;
7afe21cc 1714
14a774a9 1715 switch (GET_CODE (x))
7afe21cc 1716 {
14a774a9
RK
1717 case REG:
1718 {
1719 /* If X is a register, dependencies on its contents are recorded
1720 through the qty number mechanism. Just change the qty number of
1721 the register, mark it as invalid for expressions that refer to it,
1722 and remove it itself. */
770ae6cc
RK
1723 unsigned int regno = REGNO (x);
1724 unsigned int hash = HASH (x, GET_MODE (x));
7afe21cc 1725
14a774a9
RK
1726 /* Remove REGNO from any quantity list it might be on and indicate
1727 that its value might have changed. If it is a pseudo, remove its
1728 entry from the hash table.
7afe21cc 1729
14a774a9
RK
1730 For a hard register, we do the first two actions above for any
1731 additional hard registers corresponding to X. Then, if any of these
1732 registers are in the table, we must remove any REG entries that
1733 overlap these registers. */
7afe21cc 1734
14a774a9
RK
1735 delete_reg_equiv (regno);
1736 REG_TICK (regno)++;
46081bb3 1737 SUBREG_TICKED (regno) = -1;
85e4d983 1738
14a774a9
RK
1739 if (regno >= FIRST_PSEUDO_REGISTER)
1740 {
1741 /* Because a register can be referenced in more than one mode,
1742 we might have to remove more than one table entry. */
1743 struct table_elt *elt;
85e4d983 1744
14a774a9
RK
1745 while ((elt = lookup_for_remove (x, hash, GET_MODE (x))))
1746 remove_from_table (elt, hash);
1747 }
1748 else
1749 {
1750 HOST_WIDE_INT in_table
1751 = TEST_HARD_REG_BIT (hard_regs_in_table, regno);
770ae6cc 1752 unsigned int endregno
66fd46b6 1753 = regno + hard_regno_nregs[regno][GET_MODE (x)];
770ae6cc 1754 unsigned int tregno, tendregno, rn;
b3694847 1755 struct table_elt *p, *next;
7afe21cc 1756
14a774a9 1757 CLEAR_HARD_REG_BIT (hard_regs_in_table, regno);
7afe21cc 1758
770ae6cc 1759 for (rn = regno + 1; rn < endregno; rn++)
14a774a9 1760 {
770ae6cc
RK
1761 in_table |= TEST_HARD_REG_BIT (hard_regs_in_table, rn);
1762 CLEAR_HARD_REG_BIT (hard_regs_in_table, rn);
1763 delete_reg_equiv (rn);
1764 REG_TICK (rn)++;
46081bb3 1765 SUBREG_TICKED (rn) = -1;
14a774a9 1766 }
7afe21cc 1767
14a774a9 1768 if (in_table)
9b1549b8 1769 for (hash = 0; hash < HASH_SIZE; hash++)
14a774a9
RK
1770 for (p = table[hash]; p; p = next)
1771 {
1772 next = p->next_same_hash;
7afe21cc 1773
f8cfc6aa 1774 if (!REG_P (p->exp)
278a83b2
KH
1775 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1776 continue;
1777
14a774a9
RK
1778 tregno = REGNO (p->exp);
1779 tendregno
66fd46b6 1780 = tregno + hard_regno_nregs[tregno][GET_MODE (p->exp)];
14a774a9
RK
1781 if (tendregno > regno && tregno < endregno)
1782 remove_from_table (p, hash);
1783 }
1784 }
1785 }
7afe21cc 1786 return;
7afe21cc 1787
14a774a9 1788 case SUBREG:
bb4034b3 1789 invalidate (SUBREG_REG (x), VOIDmode);
7afe21cc 1790 return;
aac5cc16 1791
14a774a9 1792 case PARALLEL:
278a83b2 1793 for (i = XVECLEN (x, 0) - 1; i >= 0; --i)
aac5cc16
RH
1794 invalidate (XVECEXP (x, 0, i), VOIDmode);
1795 return;
aac5cc16 1796
14a774a9
RK
1797 case EXPR_LIST:
1798 /* This is part of a disjoint return value; extract the location in
1799 question ignoring the offset. */
aac5cc16
RH
1800 invalidate (XEXP (x, 0), VOIDmode);
1801 return;
7afe21cc 1802
14a774a9 1803 case MEM:
9ddb66ca 1804 addr = canon_rtx (get_addr (XEXP (x, 0)));
db048faf
MM
1805 /* Calculate the canonical version of X here so that
1806 true_dependence doesn't generate new RTL for X on each call. */
1807 x = canon_rtx (x);
1808
14a774a9
RK
1809 /* Remove all hash table elements that refer to overlapping pieces of
1810 memory. */
1811 if (full_mode == VOIDmode)
1812 full_mode = GET_MODE (x);
bb4034b3 1813
9b1549b8 1814 for (i = 0; i < HASH_SIZE; i++)
7afe21cc 1815 {
b3694847 1816 struct table_elt *next;
14a774a9
RK
1817
1818 for (p = table[i]; p; p = next)
1819 {
1820 next = p->next_same_hash;
db048faf
MM
1821 if (p->in_memory)
1822 {
2ce6dc2f
JH
1823 struct check_dependence_data d;
1824
1825 /* Just canonicalize the expression once;
1826 otherwise each time we call invalidate
1827 true_dependence will canonicalize the
1828 expression again. */
1829 if (!p->canon_exp)
1830 p->canon_exp = canon_rtx (p->exp);
1831 d.exp = x;
9ddb66ca 1832 d.addr = addr;
2ce6dc2f
JH
1833 d.mode = full_mode;
1834 if (for_each_rtx (&p->canon_exp, check_dependence, &d))
db048faf 1835 remove_from_table (p, i);
db048faf 1836 }
14a774a9 1837 }
7afe21cc 1838 }
14a774a9
RK
1839 return;
1840
1841 default:
1842 abort ();
7afe21cc
RK
1843 }
1844}
14a774a9 1845\f
7afe21cc
RK
1846/* Remove all expressions that refer to register REGNO,
1847 since they are already invalid, and we are about to
1848 mark that register valid again and don't want the old
1849 expressions to reappear as valid. */
1850
1851static void
7080f735 1852remove_invalid_refs (unsigned int regno)
7afe21cc 1853{
770ae6cc
RK
1854 unsigned int i;
1855 struct table_elt *p, *next;
7afe21cc 1856
9b1549b8 1857 for (i = 0; i < HASH_SIZE; i++)
7afe21cc
RK
1858 for (p = table[i]; p; p = next)
1859 {
1860 next = p->next_same_hash;
f8cfc6aa 1861 if (!REG_P (p->exp)
68252e27 1862 && refers_to_regno_p (regno, regno + 1, p->exp, (rtx *) 0))
7afe21cc
RK
1863 remove_from_table (p, i);
1864 }
1865}
34c73909 1866
ddef6bc7
JJ
1867/* Likewise for a subreg with subreg_reg REGNO, subreg_byte OFFSET,
1868 and mode MODE. */
34c73909 1869static void
7080f735
AJ
1870remove_invalid_subreg_refs (unsigned int regno, unsigned int offset,
1871 enum machine_mode mode)
34c73909 1872{
770ae6cc
RK
1873 unsigned int i;
1874 struct table_elt *p, *next;
ddef6bc7 1875 unsigned int end = offset + (GET_MODE_SIZE (mode) - 1);
34c73909 1876
9b1549b8 1877 for (i = 0; i < HASH_SIZE; i++)
34c73909
R
1878 for (p = table[i]; p; p = next)
1879 {
ddef6bc7 1880 rtx exp = p->exp;
34c73909 1881 next = p->next_same_hash;
278a83b2 1882
f8cfc6aa 1883 if (!REG_P (exp)
34c73909 1884 && (GET_CODE (exp) != SUBREG
f8cfc6aa 1885 || !REG_P (SUBREG_REG (exp))
34c73909 1886 || REGNO (SUBREG_REG (exp)) != regno
ddef6bc7
JJ
1887 || (((SUBREG_BYTE (exp)
1888 + (GET_MODE_SIZE (GET_MODE (exp)) - 1)) >= offset)
1889 && SUBREG_BYTE (exp) <= end))
68252e27 1890 && refers_to_regno_p (regno, regno + 1, p->exp, (rtx *) 0))
34c73909
R
1891 remove_from_table (p, i);
1892 }
1893}
7afe21cc
RK
1894\f
1895/* Recompute the hash codes of any valid entries in the hash table that
1896 reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
1897
1898 This is called when we make a jump equivalence. */
1899
1900static void
7080f735 1901rehash_using_reg (rtx x)
7afe21cc 1902{
973838fd 1903 unsigned int i;
7afe21cc 1904 struct table_elt *p, *next;
2197a88a 1905 unsigned hash;
7afe21cc
RK
1906
1907 if (GET_CODE (x) == SUBREG)
1908 x = SUBREG_REG (x);
1909
1910 /* If X is not a register or if the register is known not to be in any
1911 valid entries in the table, we have no work to do. */
1912
f8cfc6aa 1913 if (!REG_P (x)
30f72379
MM
1914 || REG_IN_TABLE (REGNO (x)) < 0
1915 || REG_IN_TABLE (REGNO (x)) != REG_TICK (REGNO (x)))
7afe21cc
RK
1916 return;
1917
1918 /* Scan all hash chains looking for valid entries that mention X.
a90fc8e0 1919 If we find one and it is in the wrong hash chain, move it. */
7afe21cc 1920
9b1549b8 1921 for (i = 0; i < HASH_SIZE; i++)
7afe21cc
RK
1922 for (p = table[i]; p; p = next)
1923 {
1924 next = p->next_same_hash;
a90fc8e0 1925 if (reg_mentioned_p (x, p->exp)
538b78e7 1926 && exp_equiv_p (p->exp, p->exp, 1, 0)
9b1549b8 1927 && i != (hash = safe_hash (p->exp, p->mode) & HASH_MASK))
7afe21cc
RK
1928 {
1929 if (p->next_same_hash)
1930 p->next_same_hash->prev_same_hash = p->prev_same_hash;
1931
1932 if (p->prev_same_hash)
1933 p->prev_same_hash->next_same_hash = p->next_same_hash;
1934 else
1935 table[i] = p->next_same_hash;
1936
1937 p->next_same_hash = table[hash];
1938 p->prev_same_hash = 0;
1939 if (table[hash])
1940 table[hash]->prev_same_hash = p;
1941 table[hash] = p;
1942 }
1943 }
1944}
1945\f
7afe21cc
RK
1946/* Remove from the hash table any expression that is a call-clobbered
1947 register. Also update their TICK values. */
1948
1949static void
7080f735 1950invalidate_for_call (void)
7afe21cc 1951{
770ae6cc
RK
1952 unsigned int regno, endregno;
1953 unsigned int i;
2197a88a 1954 unsigned hash;
7afe21cc
RK
1955 struct table_elt *p, *next;
1956 int in_table = 0;
1957
1958 /* Go through all the hard registers. For each that is clobbered in
1959 a CALL_INSN, remove the register from quantity chains and update
1960 reg_tick if defined. Also see if any of these registers is currently
1961 in the table. */
1962
1963 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
1964 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, regno))
1965 {
1966 delete_reg_equiv (regno);
30f72379 1967 if (REG_TICK (regno) >= 0)
46081bb3
SH
1968 {
1969 REG_TICK (regno)++;
1970 SUBREG_TICKED (regno) = -1;
1971 }
7afe21cc 1972
0e227018 1973 in_table |= (TEST_HARD_REG_BIT (hard_regs_in_table, regno) != 0);
7afe21cc
RK
1974 }
1975
1976 /* In the case where we have no call-clobbered hard registers in the
1977 table, we are done. Otherwise, scan the table and remove any
1978 entry that overlaps a call-clobbered register. */
1979
1980 if (in_table)
9b1549b8 1981 for (hash = 0; hash < HASH_SIZE; hash++)
7afe21cc
RK
1982 for (p = table[hash]; p; p = next)
1983 {
1984 next = p->next_same_hash;
1985
f8cfc6aa 1986 if (!REG_P (p->exp)
7afe21cc
RK
1987 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1988 continue;
1989
1990 regno = REGNO (p->exp);
66fd46b6 1991 endregno = regno + hard_regno_nregs[regno][GET_MODE (p->exp)];
7afe21cc
RK
1992
1993 for (i = regno; i < endregno; i++)
1994 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i))
1995 {
1996 remove_from_table (p, hash);
1997 break;
1998 }
1999 }
2000}
2001\f
2002/* Given an expression X of type CONST,
2003 and ELT which is its table entry (or 0 if it
2004 is not in the hash table),
2005 return an alternate expression for X as a register plus integer.
2006 If none can be found, return 0. */
2007
2008static rtx
7080f735 2009use_related_value (rtx x, struct table_elt *elt)
7afe21cc 2010{
b3694847
SS
2011 struct table_elt *relt = 0;
2012 struct table_elt *p, *q;
906c4e36 2013 HOST_WIDE_INT offset;
7afe21cc
RK
2014
2015 /* First, is there anything related known?
2016 If we have a table element, we can tell from that.
2017 Otherwise, must look it up. */
2018
2019 if (elt != 0 && elt->related_value != 0)
2020 relt = elt;
2021 else if (elt == 0 && GET_CODE (x) == CONST)
2022 {
2023 rtx subexp = get_related_value (x);
2024 if (subexp != 0)
2025 relt = lookup (subexp,
9b1549b8 2026 safe_hash (subexp, GET_MODE (subexp)) & HASH_MASK,
7afe21cc
RK
2027 GET_MODE (subexp));
2028 }
2029
2030 if (relt == 0)
2031 return 0;
2032
2033 /* Search all related table entries for one that has an
2034 equivalent register. */
2035
2036 p = relt;
2037 while (1)
2038 {
2039 /* This loop is strange in that it is executed in two different cases.
2040 The first is when X is already in the table. Then it is searching
2041 the RELATED_VALUE list of X's class (RELT). The second case is when
2042 X is not in the table. Then RELT points to a class for the related
2043 value.
2044
2045 Ensure that, whatever case we are in, that we ignore classes that have
2046 the same value as X. */
2047
2048 if (rtx_equal_p (x, p->exp))
2049 q = 0;
2050 else
2051 for (q = p->first_same_value; q; q = q->next_same_value)
f8cfc6aa 2052 if (REG_P (q->exp))
7afe21cc
RK
2053 break;
2054
2055 if (q)
2056 break;
2057
2058 p = p->related_value;
2059
2060 /* We went all the way around, so there is nothing to be found.
2061 Alternatively, perhaps RELT was in the table for some other reason
2062 and it has no related values recorded. */
2063 if (p == relt || p == 0)
2064 break;
2065 }
2066
2067 if (q == 0)
2068 return 0;
2069
2070 offset = (get_integer_term (x) - get_integer_term (p->exp));
2071 /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
2072 return plus_constant (q->exp, offset);
2073}
2074\f
6462bb43
AO
2075/* Hash a string. Just add its bytes up. */
2076static inline unsigned
7080f735 2077canon_hash_string (const char *ps)
6462bb43
AO
2078{
2079 unsigned hash = 0;
68252e27
KH
2080 const unsigned char *p = (const unsigned char *) ps;
2081
6462bb43
AO
2082 if (p)
2083 while (*p)
2084 hash += *p++;
2085
2086 return hash;
2087}
2088
7afe21cc
RK
2089/* Hash an rtx. We are careful to make sure the value is never negative.
2090 Equivalent registers hash identically.
2091 MODE is used in hashing for CONST_INTs only;
2092 otherwise the mode of X is used.
2093
2094 Store 1 in do_not_record if any subexpression is volatile.
2095
2096 Store 1 in hash_arg_in_memory if X contains a MEM rtx
2097 which does not have the RTX_UNCHANGING_P bit set.
7afe21cc
RK
2098
2099 Note that cse_insn knows that the hash code of a MEM expression
2100 is just (int) MEM plus the hash code of the address. */
2101
2197a88a 2102static unsigned
7080f735 2103canon_hash (rtx x, enum machine_mode mode)
7afe21cc 2104{
b3694847
SS
2105 int i, j;
2106 unsigned hash = 0;
2107 enum rtx_code code;
2108 const char *fmt;
7afe21cc
RK
2109
2110 /* repeat is used to turn tail-recursion into iteration. */
2111 repeat:
2112 if (x == 0)
2113 return hash;
2114
2115 code = GET_CODE (x);
2116 switch (code)
2117 {
2118 case REG:
2119 {
770ae6cc 2120 unsigned int regno = REGNO (x);
1441374b 2121 bool record;
7afe21cc
RK
2122
2123 /* On some machines, we can't record any non-fixed hard register,
2124 because extending its life will cause reload problems. We
1441374b 2125 consider ap, fp, sp, gp to be fixed for this purpose.
9a794e50
RH
2126
2127 We also consider CCmode registers to be fixed for this purpose;
2128 failure to do so leads to failure to simplify 0<100 type of
2129 conditionals.
2130
68252e27 2131 On all machines, we can't record any global registers.
8bf4dfc2
GK
2132 Nor should we record any register that is in a small
2133 class, as defined by CLASS_LIKELY_SPILLED_P. */
7afe21cc 2134
1441374b
RH
2135 if (regno >= FIRST_PSEUDO_REGISTER)
2136 record = true;
2137 else if (x == frame_pointer_rtx
2138 || x == hard_frame_pointer_rtx
2139 || x == arg_pointer_rtx
2140 || x == stack_pointer_rtx
2141 || x == pic_offset_table_rtx)
2142 record = true;
2143 else if (global_regs[regno])
2144 record = false;
2145 else if (fixed_regs[regno])
2146 record = true;
2147 else if (GET_MODE_CLASS (GET_MODE (x)) == MODE_CC)
2148 record = true;
2149 else if (SMALL_REGISTER_CLASSES)
2150 record = false;
2151 else if (CLASS_LIKELY_SPILLED_P (REGNO_REG_CLASS (regno)))
2152 record = false;
2153 else
2154 record = true;
7080f735 2155
1441374b 2156 if (!record)
7afe21cc
RK
2157 {
2158 do_not_record = 1;
2159 return 0;
2160 }
770ae6cc 2161
30f72379 2162 hash += ((unsigned) REG << 7) + (unsigned) REG_QTY (regno);
2197a88a 2163 return hash;
7afe21cc
RK
2164 }
2165
34c73909
R
2166 /* We handle SUBREG of a REG specially because the underlying
2167 reg changes its hash value with every value change; we don't
2168 want to have to forget unrelated subregs when one subreg changes. */
2169 case SUBREG:
2170 {
f8cfc6aa 2171 if (REG_P (SUBREG_REG (x)))
34c73909
R
2172 {
2173 hash += (((unsigned) SUBREG << 7)
ddef6bc7
JJ
2174 + REGNO (SUBREG_REG (x))
2175 + (SUBREG_BYTE (x) / UNITS_PER_WORD));
34c73909
R
2176 return hash;
2177 }
2178 break;
2179 }
2180
7afe21cc 2181 case CONST_INT:
2197a88a
RK
2182 {
2183 unsigned HOST_WIDE_INT tem = INTVAL (x);
2184 hash += ((unsigned) CONST_INT << 7) + (unsigned) mode + tem;
2185 return hash;
2186 }
7afe21cc
RK
2187
2188 case CONST_DOUBLE:
2189 /* This is like the general case, except that it only counts
2190 the integers representing the constant. */
2197a88a 2191 hash += (unsigned) code + (unsigned) GET_MODE (x);
969c8517 2192 if (GET_MODE (x) != VOIDmode)
46b33600 2193 hash += real_hash (CONST_DOUBLE_REAL_VALUE (x));
969c8517
RK
2194 else
2195 hash += ((unsigned) CONST_DOUBLE_LOW (x)
2196 + (unsigned) CONST_DOUBLE_HIGH (x));
7afe21cc
RK
2197 return hash;
2198
69ef87e2
AH
2199 case CONST_VECTOR:
2200 {
2201 int units;
2202 rtx elt;
2203
2204 units = CONST_VECTOR_NUNITS (x);
2205
2206 for (i = 0; i < units; ++i)
2207 {
2208 elt = CONST_VECTOR_ELT (x, i);
2209 hash += canon_hash (elt, GET_MODE (elt));
2210 }
2211
2212 return hash;
2213 }
2214
7afe21cc
RK
2215 /* Assume there is only one rtx object for any given label. */
2216 case LABEL_REF:
ddc356e8 2217 hash += ((unsigned) LABEL_REF << 7) + (unsigned long) XEXP (x, 0);
2197a88a 2218 return hash;
7afe21cc
RK
2219
2220 case SYMBOL_REF:
ddc356e8 2221 hash += ((unsigned) SYMBOL_REF << 7) + (unsigned long) XSTR (x, 0);
2197a88a 2222 return hash;
7afe21cc
RK
2223
2224 case MEM:
14a774a9
RK
2225 /* We don't record if marked volatile or if BLKmode since we don't
2226 know the size of the move. */
2227 if (MEM_VOLATILE_P (x) || GET_MODE (x) == BLKmode)
7afe21cc
RK
2228 {
2229 do_not_record = 1;
2230 return 0;
2231 }
4977bab6
ZW
2232 if (! RTX_UNCHANGING_P (x) || fixed_base_plus_p (XEXP (x, 0)))
2233 hash_arg_in_memory = 1;
2234
7afe21cc
RK
2235 /* Now that we have already found this special case,
2236 might as well speed it up as much as possible. */
2197a88a 2237 hash += (unsigned) MEM;
7afe21cc
RK
2238 x = XEXP (x, 0);
2239 goto repeat;
2240
bb07060a
JW
2241 case USE:
2242 /* A USE that mentions non-volatile memory needs special
2243 handling since the MEM may be BLKmode which normally
2244 prevents an entry from being made. Pure calls are
2245 marked by a USE which mentions BLKmode memory. */
3c0cb5de 2246 if (MEM_P (XEXP (x, 0))
bb07060a
JW
2247 && ! MEM_VOLATILE_P (XEXP (x, 0)))
2248 {
68252e27 2249 hash += (unsigned) USE;
bb07060a
JW
2250 x = XEXP (x, 0);
2251
4977bab6 2252 if (! RTX_UNCHANGING_P (x) || fixed_base_plus_p (XEXP (x, 0)))
bb07060a
JW
2253 hash_arg_in_memory = 1;
2254
2255 /* Now that we have already found this special case,
2256 might as well speed it up as much as possible. */
2257 hash += (unsigned) MEM;
2258 x = XEXP (x, 0);
2259 goto repeat;
2260 }
2261 break;
2262
7afe21cc
RK
2263 case PRE_DEC:
2264 case PRE_INC:
2265 case POST_DEC:
2266 case POST_INC:
4b983fdc
RH
2267 case PRE_MODIFY:
2268 case POST_MODIFY:
7afe21cc
RK
2269 case PC:
2270 case CC0:
2271 case CALL:
2272 case UNSPEC_VOLATILE:
2273 do_not_record = 1;
2274 return 0;
2275
2276 case ASM_OPERANDS:
2277 if (MEM_VOLATILE_P (x))
2278 {
2279 do_not_record = 1;
2280 return 0;
2281 }
6462bb43
AO
2282 else
2283 {
2284 /* We don't want to take the filename and line into account. */
2285 hash += (unsigned) code + (unsigned) GET_MODE (x)
2286 + canon_hash_string (ASM_OPERANDS_TEMPLATE (x))
2287 + canon_hash_string (ASM_OPERANDS_OUTPUT_CONSTRAINT (x))
2288 + (unsigned) ASM_OPERANDS_OUTPUT_IDX (x);
2289
2290 if (ASM_OPERANDS_INPUT_LENGTH (x))
2291 {
2292 for (i = 1; i < ASM_OPERANDS_INPUT_LENGTH (x); i++)
2293 {
2294 hash += (canon_hash (ASM_OPERANDS_INPUT (x, i),
2295 GET_MODE (ASM_OPERANDS_INPUT (x, i)))
2296 + canon_hash_string (ASM_OPERANDS_INPUT_CONSTRAINT
2297 (x, i)));
2298 }
2299
2300 hash += canon_hash_string (ASM_OPERANDS_INPUT_CONSTRAINT (x, 0));
2301 x = ASM_OPERANDS_INPUT (x, 0);
2302 mode = GET_MODE (x);
2303 goto repeat;
2304 }
2305
2306 return hash;
2307 }
e9a25f70 2308 break;
278a83b2 2309
e9a25f70
JL
2310 default:
2311 break;
7afe21cc
RK
2312 }
2313
2314 i = GET_RTX_LENGTH (code) - 1;
2197a88a 2315 hash += (unsigned) code + (unsigned) GET_MODE (x);
7afe21cc
RK
2316 fmt = GET_RTX_FORMAT (code);
2317 for (; i >= 0; i--)
2318 {
2319 if (fmt[i] == 'e')
2320 {
2321 rtx tem = XEXP (x, i);
7afe21cc
RK
2322
2323 /* If we are about to do the last recursive call
2324 needed at this level, change it into iteration.
2325 This function is called enough to be worth it. */
2326 if (i == 0)
2327 {
2328 x = tem;
2329 goto repeat;
2330 }
2331 hash += canon_hash (tem, 0);
2332 }
2333 else if (fmt[i] == 'E')
2334 for (j = 0; j < XVECLEN (x, i); j++)
2335 hash += canon_hash (XVECEXP (x, i, j), 0);
2336 else if (fmt[i] == 's')
6462bb43 2337 hash += canon_hash_string (XSTR (x, i));
7afe21cc
RK
2338 else if (fmt[i] == 'i')
2339 {
b3694847 2340 unsigned tem = XINT (x, i);
2197a88a 2341 hash += tem;
7afe21cc 2342 }
8f985ec4 2343 else if (fmt[i] == '0' || fmt[i] == 't')
ddc356e8
KH
2344 /* Unused. */
2345 ;
7afe21cc
RK
2346 else
2347 abort ();
2348 }
2349 return hash;
2350}
2351
2352/* Like canon_hash but with no side effects. */
2353
2197a88a 2354static unsigned
7080f735 2355safe_hash (rtx x, enum machine_mode mode)
7afe21cc
RK
2356{
2357 int save_do_not_record = do_not_record;
2358 int save_hash_arg_in_memory = hash_arg_in_memory;
2197a88a 2359 unsigned hash = canon_hash (x, mode);
7afe21cc 2360 hash_arg_in_memory = save_hash_arg_in_memory;
7afe21cc
RK
2361 do_not_record = save_do_not_record;
2362 return hash;
2363}
2364\f
2365/* Return 1 iff X and Y would canonicalize into the same thing,
2366 without actually constructing the canonicalization of either one.
2367 If VALIDATE is nonzero,
2368 we assume X is an expression being processed from the rtl
2369 and Y was found in the hash table. We check register refs
2370 in Y for being marked as valid.
2371
2372 If EQUAL_VALUES is nonzero, we allow a register to match a constant value
2373 that is known to be in the register. Ordinarily, we don't allow them
2374 to match, because letting them match would cause unpredictable results
2375 in all the places that search a hash table chain for an equivalent
2376 for a given value. A possible equivalent that has different structure
2377 has its hash code computed from different data. Whether the hash code
38e01259 2378 is the same as that of the given value is pure luck. */
7afe21cc
RK
2379
2380static int
7080f735 2381exp_equiv_p (rtx x, rtx y, int validate, int equal_values)
7afe21cc 2382{
b3694847
SS
2383 int i, j;
2384 enum rtx_code code;
2385 const char *fmt;
7afe21cc
RK
2386
2387 /* Note: it is incorrect to assume an expression is equivalent to itself
2388 if VALIDATE is nonzero. */
2389 if (x == y && !validate)
2390 return 1;
2391 if (x == 0 || y == 0)
2392 return x == y;
2393
2394 code = GET_CODE (x);
2395 if (code != GET_CODE (y))
2396 {
2397 if (!equal_values)
2398 return 0;
2399
2400 /* If X is a constant and Y is a register or vice versa, they may be
2401 equivalent. We only have to validate if Y is a register. */
f8cfc6aa 2402 if (CONSTANT_P (x) && REG_P (y)
1bb98cec
DM
2403 && REGNO_QTY_VALID_P (REGNO (y)))
2404 {
2405 int y_q = REG_QTY (REGNO (y));
2406 struct qty_table_elem *y_ent = &qty_table[y_q];
2407
2408 if (GET_MODE (y) == y_ent->mode
2409 && rtx_equal_p (x, y_ent->const_rtx)
2410 && (! validate || REG_IN_TABLE (REGNO (y)) == REG_TICK (REGNO (y))))
2411 return 1;
2412 }
7afe21cc
RK
2413
2414 if (CONSTANT_P (y) && code == REG
1bb98cec
DM
2415 && REGNO_QTY_VALID_P (REGNO (x)))
2416 {
2417 int x_q = REG_QTY (REGNO (x));
2418 struct qty_table_elem *x_ent = &qty_table[x_q];
2419
2420 if (GET_MODE (x) == x_ent->mode
2421 && rtx_equal_p (y, x_ent->const_rtx))
2422 return 1;
2423 }
7afe21cc
RK
2424
2425 return 0;
2426 }
2427
2428 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2429 if (GET_MODE (x) != GET_MODE (y))
2430 return 0;
2431
2432 switch (code)
2433 {
2434 case PC:
2435 case CC0:
7afe21cc 2436 case CONST_INT:
c13e8210 2437 return x == y;
7afe21cc
RK
2438
2439 case LABEL_REF:
7afe21cc
RK
2440 return XEXP (x, 0) == XEXP (y, 0);
2441
f54d4924
RK
2442 case SYMBOL_REF:
2443 return XSTR (x, 0) == XSTR (y, 0);
2444
7afe21cc
RK
2445 case REG:
2446 {
770ae6cc
RK
2447 unsigned int regno = REGNO (y);
2448 unsigned int endregno
7afe21cc 2449 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
66fd46b6 2450 : hard_regno_nregs[regno][GET_MODE (y)]);
770ae6cc 2451 unsigned int i;
7afe21cc
RK
2452
2453 /* If the quantities are not the same, the expressions are not
2454 equivalent. If there are and we are not to validate, they
2455 are equivalent. Otherwise, ensure all regs are up-to-date. */
2456
30f72379 2457 if (REG_QTY (REGNO (x)) != REG_QTY (regno))
7afe21cc
RK
2458 return 0;
2459
2460 if (! validate)
2461 return 1;
2462
2463 for (i = regno; i < endregno; i++)
30f72379 2464 if (REG_IN_TABLE (i) != REG_TICK (i))
7afe21cc
RK
2465 return 0;
2466
2467 return 1;
2468 }
2469
2470 /* For commutative operations, check both orders. */
2471 case PLUS:
2472 case MULT:
2473 case AND:
2474 case IOR:
2475 case XOR:
2476 case NE:
2477 case EQ:
2478 return ((exp_equiv_p (XEXP (x, 0), XEXP (y, 0), validate, equal_values)
2479 && exp_equiv_p (XEXP (x, 1), XEXP (y, 1),
2480 validate, equal_values))
2481 || (exp_equiv_p (XEXP (x, 0), XEXP (y, 1),
2482 validate, equal_values)
2483 && exp_equiv_p (XEXP (x, 1), XEXP (y, 0),
2484 validate, equal_values)));
278a83b2 2485
6462bb43
AO
2486 case ASM_OPERANDS:
2487 /* We don't use the generic code below because we want to
2488 disregard filename and line numbers. */
2489
2490 /* A volatile asm isn't equivalent to any other. */
2491 if (MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y))
2492 return 0;
2493
2494 if (GET_MODE (x) != GET_MODE (y)
2495 || strcmp (ASM_OPERANDS_TEMPLATE (x), ASM_OPERANDS_TEMPLATE (y))
2496 || strcmp (ASM_OPERANDS_OUTPUT_CONSTRAINT (x),
2497 ASM_OPERANDS_OUTPUT_CONSTRAINT (y))
2498 || ASM_OPERANDS_OUTPUT_IDX (x) != ASM_OPERANDS_OUTPUT_IDX (y)
2499 || ASM_OPERANDS_INPUT_LENGTH (x) != ASM_OPERANDS_INPUT_LENGTH (y))
2500 return 0;
2501
2502 if (ASM_OPERANDS_INPUT_LENGTH (x))
2503 {
2504 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
2505 if (! exp_equiv_p (ASM_OPERANDS_INPUT (x, i),
2506 ASM_OPERANDS_INPUT (y, i),
2507 validate, equal_values)
2508 || strcmp (ASM_OPERANDS_INPUT_CONSTRAINT (x, i),
2509 ASM_OPERANDS_INPUT_CONSTRAINT (y, i)))
2510 return 0;
2511 }
2512
2513 return 1;
2514
e9a25f70
JL
2515 default:
2516 break;
7afe21cc
RK
2517 }
2518
2519 /* Compare the elements. If any pair of corresponding elements
2520 fail to match, return 0 for the whole things. */
2521
2522 fmt = GET_RTX_FORMAT (code);
2523 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2524 {
906c4e36 2525 switch (fmt[i])
7afe21cc 2526 {
906c4e36 2527 case 'e':
7afe21cc
RK
2528 if (! exp_equiv_p (XEXP (x, i), XEXP (y, i), validate, equal_values))
2529 return 0;
906c4e36
RK
2530 break;
2531
2532 case 'E':
7afe21cc
RK
2533 if (XVECLEN (x, i) != XVECLEN (y, i))
2534 return 0;
2535 for (j = 0; j < XVECLEN (x, i); j++)
2536 if (! exp_equiv_p (XVECEXP (x, i, j), XVECEXP (y, i, j),
2537 validate, equal_values))
2538 return 0;
906c4e36
RK
2539 break;
2540
2541 case 's':
7afe21cc
RK
2542 if (strcmp (XSTR (x, i), XSTR (y, i)))
2543 return 0;
906c4e36
RK
2544 break;
2545
2546 case 'i':
7afe21cc
RK
2547 if (XINT (x, i) != XINT (y, i))
2548 return 0;
906c4e36
RK
2549 break;
2550
2551 case 'w':
2552 if (XWINT (x, i) != XWINT (y, i))
2553 return 0;
278a83b2 2554 break;
906c4e36
RK
2555
2556 case '0':
8f985ec4 2557 case 't':
906c4e36
RK
2558 break;
2559
2560 default:
2561 abort ();
7afe21cc 2562 }
278a83b2 2563 }
906c4e36 2564
7afe21cc
RK
2565 return 1;
2566}
2567\f
9ae8ffe7
JL
2568/* Return 1 if X has a value that can vary even between two
2569 executions of the program. 0 means X can be compared reliably
2570 against certain constants or near-constants. */
7afe21cc
RK
2571
2572static int
7080f735 2573cse_rtx_varies_p (rtx x, int from_alias)
7afe21cc
RK
2574{
2575 /* We need not check for X and the equivalence class being of the same
2576 mode because if X is equivalent to a constant in some mode, it
2577 doesn't vary in any mode. */
2578
f8cfc6aa 2579 if (REG_P (x)
1bb98cec
DM
2580 && REGNO_QTY_VALID_P (REGNO (x)))
2581 {
2582 int x_q = REG_QTY (REGNO (x));
2583 struct qty_table_elem *x_ent = &qty_table[x_q];
2584
2585 if (GET_MODE (x) == x_ent->mode
2586 && x_ent->const_rtx != NULL_RTX)
2587 return 0;
2588 }
7afe21cc 2589
9ae8ffe7
JL
2590 if (GET_CODE (x) == PLUS
2591 && GET_CODE (XEXP (x, 1)) == CONST_INT
f8cfc6aa 2592 && REG_P (XEXP (x, 0))
1bb98cec
DM
2593 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
2594 {
2595 int x0_q = REG_QTY (REGNO (XEXP (x, 0)));
2596 struct qty_table_elem *x0_ent = &qty_table[x0_q];
2597
2598 if ((GET_MODE (XEXP (x, 0)) == x0_ent->mode)
2599 && x0_ent->const_rtx != NULL_RTX)
2600 return 0;
2601 }
7afe21cc 2602
9c6b0bae
RK
2603 /* This can happen as the result of virtual register instantiation, if
2604 the initial constant is too large to be a valid address. This gives
2605 us a three instruction sequence, load large offset into a register,
2606 load fp minus a constant into a register, then a MEM which is the
2607 sum of the two `constant' registers. */
9ae8ffe7 2608 if (GET_CODE (x) == PLUS
f8cfc6aa
JQ
2609 && REG_P (XEXP (x, 0))
2610 && REG_P (XEXP (x, 1))
9ae8ffe7 2611 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0)))
1bb98cec
DM
2612 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
2613 {
2614 int x0_q = REG_QTY (REGNO (XEXP (x, 0)));
2615 int x1_q = REG_QTY (REGNO (XEXP (x, 1)));
2616 struct qty_table_elem *x0_ent = &qty_table[x0_q];
2617 struct qty_table_elem *x1_ent = &qty_table[x1_q];
2618
2619 if ((GET_MODE (XEXP (x, 0)) == x0_ent->mode)
2620 && x0_ent->const_rtx != NULL_RTX
2621 && (GET_MODE (XEXP (x, 1)) == x1_ent->mode)
2622 && x1_ent->const_rtx != NULL_RTX)
2623 return 0;
2624 }
9c6b0bae 2625
2be28ee2 2626 return rtx_varies_p (x, from_alias);
7afe21cc
RK
2627}
2628\f
2629/* Canonicalize an expression:
2630 replace each register reference inside it
2631 with the "oldest" equivalent register.
2632
da7d8304 2633 If INSN is nonzero and we are replacing a pseudo with a hard register
7722328e 2634 or vice versa, validate_change is used to ensure that INSN remains valid
da7d8304 2635 after we make our substitution. The calls are made with IN_GROUP nonzero
7722328e
RK
2636 so apply_change_group must be called upon the outermost return from this
2637 function (unless INSN is zero). The result of apply_change_group can
2638 generally be discarded since the changes we are making are optional. */
7afe21cc
RK
2639
2640static rtx
7080f735 2641canon_reg (rtx x, rtx insn)
7afe21cc 2642{
b3694847
SS
2643 int i;
2644 enum rtx_code code;
2645 const char *fmt;
7afe21cc
RK
2646
2647 if (x == 0)
2648 return x;
2649
2650 code = GET_CODE (x);
2651 switch (code)
2652 {
2653 case PC:
2654 case CC0:
2655 case CONST:
2656 case CONST_INT:
2657 case CONST_DOUBLE:
69ef87e2 2658 case CONST_VECTOR:
7afe21cc
RK
2659 case SYMBOL_REF:
2660 case LABEL_REF:
2661 case ADDR_VEC:
2662 case ADDR_DIFF_VEC:
2663 return x;
2664
2665 case REG:
2666 {
b3694847
SS
2667 int first;
2668 int q;
2669 struct qty_table_elem *ent;
7afe21cc
RK
2670
2671 /* Never replace a hard reg, because hard regs can appear
2672 in more than one machine mode, and we must preserve the mode
2673 of each occurrence. Also, some hard regs appear in
2674 MEMs that are shared and mustn't be altered. Don't try to
2675 replace any reg that maps to a reg of class NO_REGS. */
2676 if (REGNO (x) < FIRST_PSEUDO_REGISTER
2677 || ! REGNO_QTY_VALID_P (REGNO (x)))
2678 return x;
2679
278a83b2 2680 q = REG_QTY (REGNO (x));
1bb98cec
DM
2681 ent = &qty_table[q];
2682 first = ent->first_reg;
7afe21cc
RK
2683 return (first >= FIRST_PSEUDO_REGISTER ? regno_reg_rtx[first]
2684 : REGNO_REG_CLASS (first) == NO_REGS ? x
1bb98cec 2685 : gen_rtx_REG (ent->mode, first));
7afe21cc 2686 }
278a83b2 2687
e9a25f70
JL
2688 default:
2689 break;
7afe21cc
RK
2690 }
2691
2692 fmt = GET_RTX_FORMAT (code);
2693 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2694 {
b3694847 2695 int j;
7afe21cc
RK
2696
2697 if (fmt[i] == 'e')
2698 {
2699 rtx new = canon_reg (XEXP (x, i), insn);
58873255 2700 int insn_code;
7afe21cc
RK
2701
2702 /* If replacing pseudo with hard reg or vice versa, ensure the
178c39f6 2703 insn remains valid. Likewise if the insn has MATCH_DUPs. */
aee9dc31 2704 if (insn != 0 && new != 0
f8cfc6aa 2705 && REG_P (new) && REG_P (XEXP (x, i))
178c39f6
RK
2706 && (((REGNO (new) < FIRST_PSEUDO_REGISTER)
2707 != (REGNO (XEXP (x, i)) < FIRST_PSEUDO_REGISTER))
58873255 2708 || (insn_code = recog_memoized (insn)) < 0
a995e389 2709 || insn_data[insn_code].n_dups > 0))
77fa0940 2710 validate_change (insn, &XEXP (x, i), new, 1);
7afe21cc
RK
2711 else
2712 XEXP (x, i) = new;
2713 }
2714 else if (fmt[i] == 'E')
2715 for (j = 0; j < XVECLEN (x, i); j++)
2716 XVECEXP (x, i, j) = canon_reg (XVECEXP (x, i, j), insn);
2717 }
2718
2719 return x;
2720}
2721\f
a2cabb29 2722/* LOC is a location within INSN that is an operand address (the contents of
7afe21cc
RK
2723 a MEM). Find the best equivalent address to use that is valid for this
2724 insn.
2725
2726 On most CISC machines, complicated address modes are costly, and rtx_cost
2727 is a good approximation for that cost. However, most RISC machines have
2728 only a few (usually only one) memory reference formats. If an address is
2729 valid at all, it is often just as cheap as any other address. Hence, for
e37135f7
RH
2730 RISC machines, we use `address_cost' to compare the costs of various
2731 addresses. For two addresses of equal cost, choose the one with the
2732 highest `rtx_cost' value as that has the potential of eliminating the
2733 most insns. For equal costs, we choose the first in the equivalence
2734 class. Note that we ignore the fact that pseudo registers are cheaper than
2735 hard registers here because we would also prefer the pseudo registers. */
7afe21cc 2736
6cd4575e 2737static void
7080f735 2738find_best_addr (rtx insn, rtx *loc, enum machine_mode mode)
7afe21cc 2739{
7a87758d 2740 struct table_elt *elt;
7afe21cc 2741 rtx addr = *loc;
7a87758d 2742 struct table_elt *p;
7afe21cc
RK
2743 int found_better = 1;
2744 int save_do_not_record = do_not_record;
2745 int save_hash_arg_in_memory = hash_arg_in_memory;
7afe21cc
RK
2746 int addr_volatile;
2747 int regno;
2197a88a 2748 unsigned hash;
7afe21cc
RK
2749
2750 /* Do not try to replace constant addresses or addresses of local and
2751 argument slots. These MEM expressions are made only once and inserted
2752 in many instructions, as well as being used to control symbol table
2753 output. It is not safe to clobber them.
2754
2755 There are some uncommon cases where the address is already in a register
2756 for some reason, but we cannot take advantage of that because we have
2757 no easy way to unshare the MEM. In addition, looking up all stack
2758 addresses is costly. */
2759 if ((GET_CODE (addr) == PLUS
f8cfc6aa 2760 && REG_P (XEXP (addr, 0))
7afe21cc
RK
2761 && GET_CODE (XEXP (addr, 1)) == CONST_INT
2762 && (regno = REGNO (XEXP (addr, 0)),
8bc169f2
DE
2763 regno == FRAME_POINTER_REGNUM || regno == HARD_FRAME_POINTER_REGNUM
2764 || regno == ARG_POINTER_REGNUM))
f8cfc6aa 2765 || (REG_P (addr)
8bc169f2
DE
2766 && (regno = REGNO (addr), regno == FRAME_POINTER_REGNUM
2767 || regno == HARD_FRAME_POINTER_REGNUM
2768 || regno == ARG_POINTER_REGNUM))
7afe21cc
RK
2769 || CONSTANT_ADDRESS_P (addr))
2770 return;
2771
2772 /* If this address is not simply a register, try to fold it. This will
2773 sometimes simplify the expression. Many simplifications
2774 will not be valid, but some, usually applying the associative rule, will
2775 be valid and produce better code. */
f8cfc6aa 2776 if (!REG_P (addr))
8c87f107
RK
2777 {
2778 rtx folded = fold_rtx (copy_rtx (addr), NULL_RTX);
630c79be
BS
2779 int addr_folded_cost = address_cost (folded, mode);
2780 int addr_cost = address_cost (addr, mode);
2781
2782 if ((addr_folded_cost < addr_cost
2783 || (addr_folded_cost == addr_cost
2784 /* ??? The rtx_cost comparison is left over from an older
2785 version of this code. It is probably no longer helpful. */
2786 && (rtx_cost (folded, MEM) > rtx_cost (addr, MEM)
2787 || approx_reg_cost (folded) < approx_reg_cost (addr))))
8c87f107
RK
2788 && validate_change (insn, loc, folded, 0))
2789 addr = folded;
2790 }
278a83b2 2791
42495ca0
RK
2792 /* If this address is not in the hash table, we can't look for equivalences
2793 of the whole address. Also, ignore if volatile. */
2794
7afe21cc 2795 do_not_record = 0;
2197a88a 2796 hash = HASH (addr, Pmode);
7afe21cc
RK
2797 addr_volatile = do_not_record;
2798 do_not_record = save_do_not_record;
2799 hash_arg_in_memory = save_hash_arg_in_memory;
7afe21cc
RK
2800
2801 if (addr_volatile)
2802 return;
2803
2197a88a 2804 elt = lookup (addr, hash, Pmode);
7afe21cc 2805
42495ca0
RK
2806 if (elt)
2807 {
2808 /* We need to find the best (under the criteria documented above) entry
2809 in the class that is valid. We use the `flag' field to indicate
2810 choices that were invalid and iterate until we can't find a better
2811 one that hasn't already been tried. */
7afe21cc 2812
42495ca0
RK
2813 for (p = elt->first_same_value; p; p = p->next_same_value)
2814 p->flag = 0;
7afe21cc 2815
42495ca0
RK
2816 while (found_better)
2817 {
01329426 2818 int best_addr_cost = address_cost (*loc, mode);
42495ca0 2819 int best_rtx_cost = (elt->cost + 1) >> 1;
01329426 2820 int exp_cost;
278a83b2 2821 struct table_elt *best_elt = elt;
42495ca0
RK
2822
2823 found_better = 0;
2824 for (p = elt->first_same_value; p; p = p->next_same_value)
2f541799 2825 if (! p->flag)
42495ca0 2826 {
f8cfc6aa 2827 if ((REG_P (p->exp)
2f541799 2828 || exp_equiv_p (p->exp, p->exp, 1, 0))
01329426
JH
2829 && ((exp_cost = address_cost (p->exp, mode)) < best_addr_cost
2830 || (exp_cost == best_addr_cost
05bd3d41 2831 && ((p->cost + 1) >> 1) > best_rtx_cost)))
2f541799
MM
2832 {
2833 found_better = 1;
01329426 2834 best_addr_cost = exp_cost;
2f541799
MM
2835 best_rtx_cost = (p->cost + 1) >> 1;
2836 best_elt = p;
2837 }
42495ca0 2838 }
7afe21cc 2839
42495ca0
RK
2840 if (found_better)
2841 {
2842 if (validate_change (insn, loc,
906c4e36
RK
2843 canon_reg (copy_rtx (best_elt->exp),
2844 NULL_RTX), 0))
42495ca0
RK
2845 return;
2846 else
2847 best_elt->flag = 1;
2848 }
2849 }
2850 }
7afe21cc 2851
42495ca0
RK
2852 /* If the address is a binary operation with the first operand a register
2853 and the second a constant, do the same as above, but looking for
2854 equivalences of the register. Then try to simplify before checking for
2855 the best address to use. This catches a few cases: First is when we
2856 have REG+const and the register is another REG+const. We can often merge
2857 the constants and eliminate one insn and one register. It may also be
2858 that a machine has a cheap REG+REG+const. Finally, this improves the
2859 code on the Alpha for unaligned byte stores. */
2860
2861 if (flag_expensive_optimizations
ec8e098d 2862 && ARITHMETIC_P (*loc)
f8cfc6aa 2863 && REG_P (XEXP (*loc, 0)))
7afe21cc 2864 {
7b9c108f 2865 rtx op1 = XEXP (*loc, 1);
42495ca0
RK
2866
2867 do_not_record = 0;
2197a88a 2868 hash = HASH (XEXP (*loc, 0), Pmode);
42495ca0
RK
2869 do_not_record = save_do_not_record;
2870 hash_arg_in_memory = save_hash_arg_in_memory;
42495ca0 2871
2197a88a 2872 elt = lookup (XEXP (*loc, 0), hash, Pmode);
42495ca0
RK
2873 if (elt == 0)
2874 return;
2875
2876 /* We need to find the best (under the criteria documented above) entry
2877 in the class that is valid. We use the `flag' field to indicate
2878 choices that were invalid and iterate until we can't find a better
2879 one that hasn't already been tried. */
7afe21cc 2880
7afe21cc 2881 for (p = elt->first_same_value; p; p = p->next_same_value)
42495ca0 2882 p->flag = 0;
7afe21cc 2883
42495ca0 2884 while (found_better)
7afe21cc 2885 {
01329426 2886 int best_addr_cost = address_cost (*loc, mode);
42495ca0 2887 int best_rtx_cost = (COST (*loc) + 1) >> 1;
278a83b2 2888 struct table_elt *best_elt = elt;
42495ca0 2889 rtx best_rtx = *loc;
f6516aee
JW
2890 int count;
2891
2892 /* This is at worst case an O(n^2) algorithm, so limit our search
2893 to the first 32 elements on the list. This avoids trouble
2894 compiling code with very long basic blocks that can easily
0cedb36c
JL
2895 call simplify_gen_binary so many times that we run out of
2896 memory. */
96b0e481 2897
0cedb36c
JL
2898 found_better = 0;
2899 for (p = elt->first_same_value, count = 0;
2900 p && count < 32;
2901 p = p->next_same_value, count++)
2902 if (! p->flag
f8cfc6aa 2903 && (REG_P (p->exp)
0cedb36c
JL
2904 || exp_equiv_p (p->exp, p->exp, 1, 0)))
2905 {
2906 rtx new = simplify_gen_binary (GET_CODE (*loc), Pmode,
7b9c108f 2907 p->exp, op1);
01329426
JH
2908 int new_cost;
2909 new_cost = address_cost (new, mode);
96b0e481 2910
01329426
JH
2911 if (new_cost < best_addr_cost
2912 || (new_cost == best_addr_cost
2913 && (COST (new) + 1) >> 1 > best_rtx_cost))
0cedb36c
JL
2914 {
2915 found_better = 1;
01329426 2916 best_addr_cost = new_cost;
0cedb36c
JL
2917 best_rtx_cost = (COST (new) + 1) >> 1;
2918 best_elt = p;
2919 best_rtx = new;
2920 }
2921 }
96b0e481 2922
0cedb36c
JL
2923 if (found_better)
2924 {
2925 if (validate_change (insn, loc,
2926 canon_reg (copy_rtx (best_rtx),
2927 NULL_RTX), 0))
2928 return;
2929 else
2930 best_elt->flag = 1;
2931 }
2932 }
2933 }
96b0e481
RK
2934}
2935\f
bca05d20
RK
2936/* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
2937 operation (EQ, NE, GT, etc.), follow it back through the hash table and
2938 what values are being compared.
1a87eea2 2939
bca05d20
RK
2940 *PARG1 and *PARG2 are updated to contain the rtx representing the values
2941 actually being compared. For example, if *PARG1 was (cc0) and *PARG2
2942 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were
2943 compared to produce cc0.
a432f20d 2944
bca05d20
RK
2945 The return value is the comparison operator and is either the code of
2946 A or the code corresponding to the inverse of the comparison. */
7afe21cc 2947
0cedb36c 2948static enum rtx_code
7080f735
AJ
2949find_comparison_args (enum rtx_code code, rtx *parg1, rtx *parg2,
2950 enum machine_mode *pmode1, enum machine_mode *pmode2)
7afe21cc 2951{
0cedb36c 2952 rtx arg1, arg2;
1a87eea2 2953
0cedb36c 2954 arg1 = *parg1, arg2 = *parg2;
7afe21cc 2955
0cedb36c 2956 /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
7afe21cc 2957
0cedb36c 2958 while (arg2 == CONST0_RTX (GET_MODE (arg1)))
a432f20d 2959 {
da7d8304 2960 /* Set nonzero when we find something of interest. */
0cedb36c
JL
2961 rtx x = 0;
2962 int reverse_code = 0;
2963 struct table_elt *p = 0;
6076248a 2964
0cedb36c
JL
2965 /* If arg1 is a COMPARE, extract the comparison arguments from it.
2966 On machines with CC0, this is the only case that can occur, since
2967 fold_rtx will return the COMPARE or item being compared with zero
2968 when given CC0. */
6076248a 2969
0cedb36c
JL
2970 if (GET_CODE (arg1) == COMPARE && arg2 == const0_rtx)
2971 x = arg1;
6076248a 2972
0cedb36c
JL
2973 /* If ARG1 is a comparison operator and CODE is testing for
2974 STORE_FLAG_VALUE, get the inner arguments. */
a432f20d 2975
ec8e098d 2976 else if (COMPARISON_P (arg1))
7afe21cc 2977 {
efdc7e19
RH
2978#ifdef FLOAT_STORE_FLAG_VALUE
2979 REAL_VALUE_TYPE fsfv;
2980#endif
2981
0cedb36c
JL
2982 if (code == NE
2983 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
2984 && code == LT && STORE_FLAG_VALUE == -1)
2985#ifdef FLOAT_STORE_FLAG_VALUE
2986 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
efdc7e19
RH
2987 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
2988 REAL_VALUE_NEGATIVE (fsfv)))
7afe21cc 2989#endif
a432f20d 2990 )
0cedb36c
JL
2991 x = arg1;
2992 else if (code == EQ
2993 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
2994 && code == GE && STORE_FLAG_VALUE == -1)
2995#ifdef FLOAT_STORE_FLAG_VALUE
2996 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
efdc7e19
RH
2997 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
2998 REAL_VALUE_NEGATIVE (fsfv)))
0cedb36c
JL
2999#endif
3000 )
3001 x = arg1, reverse_code = 1;
7afe21cc
RK
3002 }
3003
0cedb36c 3004 /* ??? We could also check for
7afe21cc 3005
0cedb36c 3006 (ne (and (eq (...) (const_int 1))) (const_int 0))
7afe21cc 3007
0cedb36c 3008 and related forms, but let's wait until we see them occurring. */
7afe21cc 3009
0cedb36c
JL
3010 if (x == 0)
3011 /* Look up ARG1 in the hash table and see if it has an equivalence
3012 that lets us see what is being compared. */
9b1549b8 3013 p = lookup (arg1, safe_hash (arg1, GET_MODE (arg1)) & HASH_MASK,
0cedb36c 3014 GET_MODE (arg1));
278a83b2 3015 if (p)
8b03b984
R
3016 {
3017 p = p->first_same_value;
3018
3019 /* If what we compare is already known to be constant, that is as
3020 good as it gets.
3021 We need to break the loop in this case, because otherwise we
3022 can have an infinite loop when looking at a reg that is known
3023 to be a constant which is the same as a comparison of a reg
3024 against zero which appears later in the insn stream, which in
3025 turn is constant and the same as the comparison of the first reg
3026 against zero... */
3027 if (p->is_const)
3028 break;
3029 }
7afe21cc 3030
0cedb36c 3031 for (; p; p = p->next_same_value)
7afe21cc 3032 {
0cedb36c 3033 enum machine_mode inner_mode = GET_MODE (p->exp);
efdc7e19
RH
3034#ifdef FLOAT_STORE_FLAG_VALUE
3035 REAL_VALUE_TYPE fsfv;
3036#endif
7afe21cc 3037
0cedb36c
JL
3038 /* If the entry isn't valid, skip it. */
3039 if (! exp_equiv_p (p->exp, p->exp, 1, 0))
3040 continue;
f76b9db2 3041
bca05d20
RK
3042 if (GET_CODE (p->exp) == COMPARE
3043 /* Another possibility is that this machine has a compare insn
3044 that includes the comparison code. In that case, ARG1 would
3045 be equivalent to a comparison operation that would set ARG1 to
3046 either STORE_FLAG_VALUE or zero. If this is an NE operation,
3047 ORIG_CODE is the actual comparison being done; if it is an EQ,
3048 we must reverse ORIG_CODE. On machine with a negative value
3049 for STORE_FLAG_VALUE, also look at LT and GE operations. */
3050 || ((code == NE
3051 || (code == LT
3052 && GET_MODE_CLASS (inner_mode) == MODE_INT
3053 && (GET_MODE_BITSIZE (inner_mode)
3054 <= HOST_BITS_PER_WIDE_INT)
3055 && (STORE_FLAG_VALUE
3056 & ((HOST_WIDE_INT) 1
3057 << (GET_MODE_BITSIZE (inner_mode) - 1))))
0cedb36c 3058#ifdef FLOAT_STORE_FLAG_VALUE
bca05d20
RK
3059 || (code == LT
3060 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
efdc7e19
RH
3061 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
3062 REAL_VALUE_NEGATIVE (fsfv)))
0cedb36c 3063#endif
bca05d20 3064 )
ec8e098d 3065 && COMPARISON_P (p->exp)))
7afe21cc 3066 {
0cedb36c
JL
3067 x = p->exp;
3068 break;
3069 }
3070 else if ((code == EQ
3071 || (code == GE
3072 && GET_MODE_CLASS (inner_mode) == MODE_INT
3073 && (GET_MODE_BITSIZE (inner_mode)
3074 <= HOST_BITS_PER_WIDE_INT)
3075 && (STORE_FLAG_VALUE
3076 & ((HOST_WIDE_INT) 1
3077 << (GET_MODE_BITSIZE (inner_mode) - 1))))
3078#ifdef FLOAT_STORE_FLAG_VALUE
3079 || (code == GE
3080 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
efdc7e19
RH
3081 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
3082 REAL_VALUE_NEGATIVE (fsfv)))
0cedb36c
JL
3083#endif
3084 )
ec8e098d 3085 && COMPARISON_P (p->exp))
0cedb36c
JL
3086 {
3087 reverse_code = 1;
3088 x = p->exp;
3089 break;
7afe21cc
RK
3090 }
3091
4977bab6
ZW
3092 /* If this non-trapping address, e.g. fp + constant, the
3093 equivalent is a better operand since it may let us predict
3094 the value of the comparison. */
3095 else if (!rtx_addr_can_trap_p (p->exp))
0cedb36c
JL
3096 {
3097 arg1 = p->exp;
3098 continue;
3099 }
7afe21cc 3100 }
7afe21cc 3101
0cedb36c
JL
3102 /* If we didn't find a useful equivalence for ARG1, we are done.
3103 Otherwise, set up for the next iteration. */
3104 if (x == 0)
3105 break;
7afe21cc 3106
78192b09
RH
3107 /* If we need to reverse the comparison, make sure that that is
3108 possible -- we can't necessarily infer the value of GE from LT
3109 with floating-point operands. */
0cedb36c 3110 if (reverse_code)
261efdef
JH
3111 {
3112 enum rtx_code reversed = reversed_comparison_code (x, NULL_RTX);
3113 if (reversed == UNKNOWN)
3114 break;
68252e27
KH
3115 else
3116 code = reversed;
261efdef 3117 }
ec8e098d 3118 else if (COMPARISON_P (x))
261efdef
JH
3119 code = GET_CODE (x);
3120 arg1 = XEXP (x, 0), arg2 = XEXP (x, 1);
7afe21cc
RK
3121 }
3122
0cedb36c
JL
3123 /* Return our results. Return the modes from before fold_rtx
3124 because fold_rtx might produce const_int, and then it's too late. */
3125 *pmode1 = GET_MODE (arg1), *pmode2 = GET_MODE (arg2);
3126 *parg1 = fold_rtx (arg1, 0), *parg2 = fold_rtx (arg2, 0);
3127
3128 return code;
7afe21cc
RK
3129}
3130\f
3131/* If X is a nontrivial arithmetic operation on an argument
3132 for which a constant value can be determined, return
3133 the result of operating on that value, as a constant.
3134 Otherwise, return X, possibly with one or more operands
3135 modified by recursive calls to this function.
3136
e7bb59fa
RK
3137 If X is a register whose contents are known, we do NOT
3138 return those contents here. equiv_constant is called to
3139 perform that task.
7afe21cc
RK
3140
3141 INSN is the insn that we may be modifying. If it is 0, make a copy
3142 of X before modifying it. */
3143
3144static rtx
7080f735 3145fold_rtx (rtx x, rtx insn)
7afe21cc 3146{
b3694847
SS
3147 enum rtx_code code;
3148 enum machine_mode mode;
3149 const char *fmt;
3150 int i;
7afe21cc
RK
3151 rtx new = 0;
3152 int copied = 0;
3153 int must_swap = 0;
3154
3155 /* Folded equivalents of first two operands of X. */
3156 rtx folded_arg0;
3157 rtx folded_arg1;
3158
3159 /* Constant equivalents of first three operands of X;
3160 0 when no such equivalent is known. */
3161 rtx const_arg0;
3162 rtx const_arg1;
3163 rtx const_arg2;
3164
3165 /* The mode of the first operand of X. We need this for sign and zero
3166 extends. */
3167 enum machine_mode mode_arg0;
3168
3169 if (x == 0)
3170 return x;
3171
3172 mode = GET_MODE (x);
3173 code = GET_CODE (x);
3174 switch (code)
3175 {
3176 case CONST:
3177 case CONST_INT:
3178 case CONST_DOUBLE:
69ef87e2 3179 case CONST_VECTOR:
7afe21cc
RK
3180 case SYMBOL_REF:
3181 case LABEL_REF:
3182 case REG:
3183 /* No use simplifying an EXPR_LIST
3184 since they are used only for lists of args
3185 in a function call's REG_EQUAL note. */
3186 case EXPR_LIST:
3187 return x;
3188
3189#ifdef HAVE_cc0
3190 case CC0:
3191 return prev_insn_cc0;
3192#endif
3193
3194 case PC:
3195 /* If the next insn is a CODE_LABEL followed by a jump table,
3196 PC's value is a LABEL_REF pointing to that label. That
8aeea6e6 3197 lets us fold switch statements on the VAX. */
e1233a7d
RH
3198 {
3199 rtx next;
7c2aa9d7 3200 if (insn && tablejump_p (insn, &next, NULL))
e1233a7d
RH
3201 return gen_rtx_LABEL_REF (Pmode, next);
3202 }
7afe21cc
RK
3203 break;
3204
3205 case SUBREG:
c610adec
RK
3206 /* See if we previously assigned a constant value to this SUBREG. */
3207 if ((new = lookup_as_function (x, CONST_INT)) != 0
3208 || (new = lookup_as_function (x, CONST_DOUBLE)) != 0)
7afe21cc
RK
3209 return new;
3210
4b980e20
RK
3211 /* If this is a paradoxical SUBREG, we have no idea what value the
3212 extra bits would have. However, if the operand is equivalent
3213 to a SUBREG whose operand is the same as our mode, and all the
3214 modes are within a word, we can just use the inner operand
31c85c78
RK
3215 because these SUBREGs just say how to treat the register.
3216
3217 Similarly if we find an integer constant. */
4b980e20 3218
e5f6a288 3219 if (GET_MODE_SIZE (mode) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
4b980e20
RK
3220 {
3221 enum machine_mode imode = GET_MODE (SUBREG_REG (x));
3222 struct table_elt *elt;
3223
3224 if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
3225 && GET_MODE_SIZE (imode) <= UNITS_PER_WORD
3226 && (elt = lookup (SUBREG_REG (x), HASH (SUBREG_REG (x), imode),
3227 imode)) != 0)
ddc356e8 3228 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
31c85c78
RK
3229 {
3230 if (CONSTANT_P (elt->exp)
3231 && GET_MODE (elt->exp) == VOIDmode)
3232 return elt->exp;
3233
4b980e20
RK
3234 if (GET_CODE (elt->exp) == SUBREG
3235 && GET_MODE (SUBREG_REG (elt->exp)) == mode
906c4e36 3236 && exp_equiv_p (elt->exp, elt->exp, 1, 0))
4b980e20 3237 return copy_rtx (SUBREG_REG (elt->exp));
1bb98cec 3238 }
4b980e20
RK
3239
3240 return x;
3241 }
e5f6a288 3242
7afe21cc
RK
3243 /* Fold SUBREG_REG. If it changed, see if we can simplify the SUBREG.
3244 We might be able to if the SUBREG is extracting a single word in an
3245 integral mode or extracting the low part. */
3246
3247 folded_arg0 = fold_rtx (SUBREG_REG (x), insn);
3248 const_arg0 = equiv_constant (folded_arg0);
3249 if (const_arg0)
3250 folded_arg0 = const_arg0;
3251
3252 if (folded_arg0 != SUBREG_REG (x))
3253 {
949c5d62
JH
3254 new = simplify_subreg (mode, folded_arg0,
3255 GET_MODE (SUBREG_REG (x)), SUBREG_BYTE (x));
7afe21cc
RK
3256 if (new)
3257 return new;
3258 }
e5f6a288 3259
f8cfc6aa 3260 if (REG_P (folded_arg0)
4c442790 3261 && GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (folded_arg0)))
e5f6a288
RK
3262 {
3263 struct table_elt *elt;
3264
3265 /* We can use HASH here since we know that canon_hash won't be
3266 called. */
3267 elt = lookup (folded_arg0,
3268 HASH (folded_arg0, GET_MODE (folded_arg0)),
3269 GET_MODE (folded_arg0));
3270
3271 if (elt)
3272 elt = elt->first_same_value;
3273
4c442790
PB
3274 if (subreg_lowpart_p (x))
3275 /* If this is a narrowing SUBREG and our operand is a REG, see
3276 if we can find an equivalence for REG that is an arithmetic
3277 operation in a wider mode where both operands are paradoxical
3278 SUBREGs from objects of our result mode. In that case, we
3279 couldn-t report an equivalent value for that operation, since we
3280 don't know what the extra bits will be. But we can find an
3281 equivalence for this SUBREG by folding that operation in the
3282 narrow mode. This allows us to fold arithmetic in narrow modes
3283 when the machine only supports word-sized arithmetic.
3284
3285 Also look for a case where we have a SUBREG whose operand
3286 is the same as our result. If both modes are smaller
3287 than a word, we are simply interpreting a register in
3288 different modes and we can use the inner value. */
3289
3290 for (; elt; elt = elt->next_same_value)
3291 {
3292 enum rtx_code eltcode = GET_CODE (elt->exp);
3293
3294 /* Just check for unary and binary operations. */
ec8e098d
PB
3295 if (UNARY_P (elt->exp)
3296 && eltcode != SIGN_EXTEND
3297 && eltcode != ZERO_EXTEND
4c442790
PB
3298 && GET_CODE (XEXP (elt->exp, 0)) == SUBREG
3299 && GET_MODE (SUBREG_REG (XEXP (elt->exp, 0))) == mode
3300 && (GET_MODE_CLASS (mode)
3301 == GET_MODE_CLASS (GET_MODE (XEXP (elt->exp, 0)))))
3302 {
3303 rtx op0 = SUBREG_REG (XEXP (elt->exp, 0));
e5f6a288 3304
f8cfc6aa 3305 if (!REG_P (op0) && ! CONSTANT_P (op0))
4c442790 3306 op0 = fold_rtx (op0, NULL_RTX);
e5f6a288 3307
e5f6a288 3308 op0 = equiv_constant (op0);
4c442790
PB
3309 if (op0)
3310 new = simplify_unary_operation (GET_CODE (elt->exp), mode,
3311 op0, mode);
3312 }
ec8e098d 3313 else if (ARITHMETIC_P (elt->exp)
4c442790
PB
3314 && eltcode != DIV && eltcode != MOD
3315 && eltcode != UDIV && eltcode != UMOD
3316 && eltcode != ASHIFTRT && eltcode != LSHIFTRT
3317 && eltcode != ROTATE && eltcode != ROTATERT
3318 && ((GET_CODE (XEXP (elt->exp, 0)) == SUBREG
3319 && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 0)))
3320 == mode))
3321 || CONSTANT_P (XEXP (elt->exp, 0)))
3322 && ((GET_CODE (XEXP (elt->exp, 1)) == SUBREG
3323 && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 1)))
3324 == mode))
3325 || CONSTANT_P (XEXP (elt->exp, 1))))
3326 {
3327 rtx op0 = gen_lowpart_common (mode, XEXP (elt->exp, 0));
3328 rtx op1 = gen_lowpart_common (mode, XEXP (elt->exp, 1));
3329
f8cfc6aa 3330 if (op0 && !REG_P (op0) && ! CONSTANT_P (op0))
4c442790
PB
3331 op0 = fold_rtx (op0, NULL_RTX);
3332
3333 if (op0)
3334 op0 = equiv_constant (op0);
3335
f8cfc6aa 3336 if (op1 && !REG_P (op1) && ! CONSTANT_P (op1))
4c442790
PB
3337 op1 = fold_rtx (op1, NULL_RTX);
3338
3339 if (op1)
3340 op1 = equiv_constant (op1);
3341
3342 /* If we are looking for the low SImode part of
3343 (ashift:DI c (const_int 32)), it doesn't work
3344 to compute that in SImode, because a 32-bit shift
3345 in SImode is unpredictable. We know the value is 0. */
3346 if (op0 && op1
3347 && GET_CODE (elt->exp) == ASHIFT
3348 && GET_CODE (op1) == CONST_INT
3349 && INTVAL (op1) >= GET_MODE_BITSIZE (mode))
3350 {
3351 if (INTVAL (op1)
3352 < GET_MODE_BITSIZE (GET_MODE (elt->exp)))
3353 /* If the count fits in the inner mode's width,
3354 but exceeds the outer mode's width,
3355 the value will get truncated to 0
3356 by the subreg. */
3357 new = CONST0_RTX (mode);
3358 else
3359 /* If the count exceeds even the inner mode's width,
76fb0b60 3360 don't fold this expression. */
4c442790
PB
3361 new = 0;
3362 }
3363 else if (op0 && op1)
3364 new = simplify_binary_operation (GET_CODE (elt->exp), mode, op0, op1);
3365 }
e5f6a288 3366
4c442790
PB
3367 else if (GET_CODE (elt->exp) == SUBREG
3368 && GET_MODE (SUBREG_REG (elt->exp)) == mode
3369 && (GET_MODE_SIZE (GET_MODE (folded_arg0))
3370 <= UNITS_PER_WORD)
3371 && exp_equiv_p (elt->exp, elt->exp, 1, 0))
3372 new = copy_rtx (SUBREG_REG (elt->exp));
4b980e20 3373
4c442790
PB
3374 if (new)
3375 return new;
3376 }
3377 else
3378 /* A SUBREG resulting from a zero extension may fold to zero if
3379 it extracts higher bits than the ZERO_EXTEND's source bits.
3380 FIXME: if combine tried to, er, combine these instructions,
3381 this transformation may be moved to simplify_subreg. */
3382 for (; elt; elt = elt->next_same_value)
3383 {
3384 if (GET_CODE (elt->exp) == ZERO_EXTEND
3385 && subreg_lsb (x)
3386 >= GET_MODE_BITSIZE (GET_MODE (XEXP (elt->exp, 0))))
3387 return CONST0_RTX (mode);
3388 }
e5f6a288
RK
3389 }
3390
7afe21cc
RK
3391 return x;
3392
3393 case NOT:
3394 case NEG:
3395 /* If we have (NOT Y), see if Y is known to be (NOT Z).
3396 If so, (NOT Y) simplifies to Z. Similarly for NEG. */
3397 new = lookup_as_function (XEXP (x, 0), code);
3398 if (new)
3399 return fold_rtx (copy_rtx (XEXP (new, 0)), insn);
3400 break;
13c9910f 3401
7afe21cc
RK
3402 case MEM:
3403 /* If we are not actually processing an insn, don't try to find the
3404 best address. Not only don't we care, but we could modify the
3405 MEM in an invalid way since we have no insn to validate against. */
3406 if (insn != 0)
01329426 3407 find_best_addr (insn, &XEXP (x, 0), GET_MODE (x));
7afe21cc
RK
3408
3409 {
3410 /* Even if we don't fold in the insn itself,
3411 we can safely do so here, in hopes of getting a constant. */
906c4e36 3412 rtx addr = fold_rtx (XEXP (x, 0), NULL_RTX);
7afe21cc 3413 rtx base = 0;
906c4e36 3414 HOST_WIDE_INT offset = 0;
7afe21cc 3415
f8cfc6aa 3416 if (REG_P (addr)
1bb98cec
DM
3417 && REGNO_QTY_VALID_P (REGNO (addr)))
3418 {
3419 int addr_q = REG_QTY (REGNO (addr));
3420 struct qty_table_elem *addr_ent = &qty_table[addr_q];
3421
3422 if (GET_MODE (addr) == addr_ent->mode
3423 && addr_ent->const_rtx != NULL_RTX)
3424 addr = addr_ent->const_rtx;
3425 }
7afe21cc
RK
3426
3427 /* If address is constant, split it into a base and integer offset. */
3428 if (GET_CODE (addr) == SYMBOL_REF || GET_CODE (addr) == LABEL_REF)
3429 base = addr;
3430 else if (GET_CODE (addr) == CONST && GET_CODE (XEXP (addr, 0)) == PLUS
3431 && GET_CODE (XEXP (XEXP (addr, 0), 1)) == CONST_INT)
3432 {
3433 base = XEXP (XEXP (addr, 0), 0);
3434 offset = INTVAL (XEXP (XEXP (addr, 0), 1));
3435 }
3436 else if (GET_CODE (addr) == LO_SUM
3437 && GET_CODE (XEXP (addr, 1)) == SYMBOL_REF)
3438 base = XEXP (addr, 1);
3439
3440 /* If this is a constant pool reference, we can fold it into its
3441 constant to allow better value tracking. */
3442 if (base && GET_CODE (base) == SYMBOL_REF
3443 && CONSTANT_POOL_ADDRESS_P (base))
3444 {
3445 rtx constant = get_pool_constant (base);
3446 enum machine_mode const_mode = get_pool_mode (base);
3447 rtx new;
3448
3449 if (CONSTANT_P (constant) && GET_CODE (constant) != CONST_INT)
dd0ba281
RS
3450 {
3451 constant_pool_entries_cost = COST (constant);
3452 constant_pool_entries_regcost = approx_reg_cost (constant);
3453 }
7afe21cc
RK
3454
3455 /* If we are loading the full constant, we have an equivalence. */
3456 if (offset == 0 && mode == const_mode)
3457 return constant;
3458
9faa82d8 3459 /* If this actually isn't a constant (weird!), we can't do
7afe21cc
RK
3460 anything. Otherwise, handle the two most common cases:
3461 extracting a word from a multi-word constant, and extracting
3462 the low-order bits. Other cases don't seem common enough to
3463 worry about. */
3464 if (! CONSTANT_P (constant))
3465 return x;
3466
3467 if (GET_MODE_CLASS (mode) == MODE_INT
3468 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
3469 && offset % UNITS_PER_WORD == 0
3470 && (new = operand_subword (constant,
3471 offset / UNITS_PER_WORD,
3472 0, const_mode)) != 0)
3473 return new;
3474
3475 if (((BYTES_BIG_ENDIAN
3476 && offset == GET_MODE_SIZE (GET_MODE (constant)) - 1)
3477 || (! BYTES_BIG_ENDIAN && offset == 0))
4de249d9 3478 && (new = gen_lowpart (mode, constant)) != 0)
7afe21cc
RK
3479 return new;
3480 }
3481
3482 /* If this is a reference to a label at a known position in a jump
3483 table, we also know its value. */
3484 if (base && GET_CODE (base) == LABEL_REF)
3485 {
3486 rtx label = XEXP (base, 0);
3487 rtx table_insn = NEXT_INSN (label);
278a83b2 3488
4b4bf941 3489 if (table_insn && JUMP_P (table_insn)
7afe21cc
RK
3490 && GET_CODE (PATTERN (table_insn)) == ADDR_VEC)
3491 {
3492 rtx table = PATTERN (table_insn);
3493
3494 if (offset >= 0
3495 && (offset / GET_MODE_SIZE (GET_MODE (table))
3496 < XVECLEN (table, 0)))
3497 return XVECEXP (table, 0,
3498 offset / GET_MODE_SIZE (GET_MODE (table)));
3499 }
4b4bf941 3500 if (table_insn && JUMP_P (table_insn)
7afe21cc
RK
3501 && GET_CODE (PATTERN (table_insn)) == ADDR_DIFF_VEC)
3502 {
3503 rtx table = PATTERN (table_insn);
3504
3505 if (offset >= 0
3506 && (offset / GET_MODE_SIZE (GET_MODE (table))
3507 < XVECLEN (table, 1)))
3508 {
3509 offset /= GET_MODE_SIZE (GET_MODE (table));
38a448ca
RH
3510 new = gen_rtx_MINUS (Pmode, XVECEXP (table, 1, offset),
3511 XEXP (table, 0));
7afe21cc
RK
3512
3513 if (GET_MODE (table) != Pmode)
38a448ca 3514 new = gen_rtx_TRUNCATE (GET_MODE (table), new);
7afe21cc 3515
278a83b2 3516 /* Indicate this is a constant. This isn't a
67a37737
RK
3517 valid form of CONST, but it will only be used
3518 to fold the next insns and then discarded, so
ac7ef8d5
FS
3519 it should be safe.
3520
3521 Note this expression must be explicitly discarded,
3522 by cse_insn, else it may end up in a REG_EQUAL note
3523 and "escape" to cause problems elsewhere. */
38a448ca 3524 return gen_rtx_CONST (GET_MODE (new), new);
7afe21cc
RK
3525 }
3526 }
3527 }
3528
3529 return x;
3530 }
9255709c 3531
a5e5cf67
RH
3532#ifdef NO_FUNCTION_CSE
3533 case CALL:
3534 if (CONSTANT_P (XEXP (XEXP (x, 0), 0)))
3535 return x;
3536 break;
3537#endif
3538
9255709c 3539 case ASM_OPERANDS:
6462bb43
AO
3540 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
3541 validate_change (insn, &ASM_OPERANDS_INPUT (x, i),
3542 fold_rtx (ASM_OPERANDS_INPUT (x, i), insn), 0);
9255709c 3543 break;
278a83b2 3544
e9a25f70
JL
3545 default:
3546 break;
7afe21cc
RK
3547 }
3548
3549 const_arg0 = 0;
3550 const_arg1 = 0;
3551 const_arg2 = 0;
3552 mode_arg0 = VOIDmode;
3553
3554 /* Try folding our operands.
3555 Then see which ones have constant values known. */
3556
3557 fmt = GET_RTX_FORMAT (code);
3558 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3559 if (fmt[i] == 'e')
3560 {
3561 rtx arg = XEXP (x, i);
3562 rtx folded_arg = arg, const_arg = 0;
3563 enum machine_mode mode_arg = GET_MODE (arg);
3564 rtx cheap_arg, expensive_arg;
3565 rtx replacements[2];
3566 int j;
5b437e0f 3567 int old_cost = COST_IN (XEXP (x, i), code);
7afe21cc
RK
3568
3569 /* Most arguments are cheap, so handle them specially. */
3570 switch (GET_CODE (arg))
3571 {
3572 case REG:
3573 /* This is the same as calling equiv_constant; it is duplicated
3574 here for speed. */
1bb98cec
DM
3575 if (REGNO_QTY_VALID_P (REGNO (arg)))
3576 {
3577 int arg_q = REG_QTY (REGNO (arg));
3578 struct qty_table_elem *arg_ent = &qty_table[arg_q];
3579
3580 if (arg_ent->const_rtx != NULL_RTX
f8cfc6aa 3581 && !REG_P (arg_ent->const_rtx)
1bb98cec
DM
3582 && GET_CODE (arg_ent->const_rtx) != PLUS)
3583 const_arg
4de249d9 3584 = gen_lowpart (GET_MODE (arg),
1bb98cec
DM
3585 arg_ent->const_rtx);
3586 }
7afe21cc
RK
3587 break;
3588
3589 case CONST:
3590 case CONST_INT:
3591 case SYMBOL_REF:
3592 case LABEL_REF:
3593 case CONST_DOUBLE:
69ef87e2 3594 case CONST_VECTOR:
7afe21cc
RK
3595 const_arg = arg;
3596 break;
3597
3598#ifdef HAVE_cc0
3599 case CC0:
3600 folded_arg = prev_insn_cc0;
3601 mode_arg = prev_insn_cc0_mode;
3602 const_arg = equiv_constant (folded_arg);
3603 break;
3604#endif
3605
3606 default:
3607 folded_arg = fold_rtx (arg, insn);
3608 const_arg = equiv_constant (folded_arg);
3609 }
3610
3611 /* For the first three operands, see if the operand
3612 is constant or equivalent to a constant. */
3613 switch (i)
3614 {
3615 case 0:
3616 folded_arg0 = folded_arg;
3617 const_arg0 = const_arg;
3618 mode_arg0 = mode_arg;
3619 break;
3620 case 1:
3621 folded_arg1 = folded_arg;
3622 const_arg1 = const_arg;
3623 break;
3624 case 2:
3625 const_arg2 = const_arg;
3626 break;
3627 }
3628
3629 /* Pick the least expensive of the folded argument and an
3630 equivalent constant argument. */
3631 if (const_arg == 0 || const_arg == folded_arg
f2fa288f 3632 || COST_IN (const_arg, code) > COST_IN (folded_arg, code))
7afe21cc
RK
3633 cheap_arg = folded_arg, expensive_arg = const_arg;
3634 else
3635 cheap_arg = const_arg, expensive_arg = folded_arg;
3636
3637 /* Try to replace the operand with the cheapest of the two
3638 possibilities. If it doesn't work and this is either of the first
3639 two operands of a commutative operation, try swapping them.
3640 If THAT fails, try the more expensive, provided it is cheaper
3641 than what is already there. */
3642
3643 if (cheap_arg == XEXP (x, i))
3644 continue;
3645
3646 if (insn == 0 && ! copied)
3647 {
3648 x = copy_rtx (x);
3649 copied = 1;
3650 }
3651
f2fa288f
RH
3652 /* Order the replacements from cheapest to most expensive. */
3653 replacements[0] = cheap_arg;
3654 replacements[1] = expensive_arg;
3655
68252e27 3656 for (j = 0; j < 2 && replacements[j]; j++)
7afe21cc 3657 {
f2fa288f
RH
3658 int new_cost = COST_IN (replacements[j], code);
3659
3660 /* Stop if what existed before was cheaper. Prefer constants
3661 in the case of a tie. */
3662 if (new_cost > old_cost
3663 || (new_cost == old_cost && CONSTANT_P (XEXP (x, i))))
3664 break;
3665
8cce3d04
RS
3666 /* It's not safe to substitute the operand of a conversion
3667 operator with a constant, as the conversion's identity
3668 depends upon the mode of it's operand. This optimization
3669 is handled by the call to simplify_unary_operation. */
3670 if (GET_RTX_CLASS (code) == RTX_UNARY
3671 && GET_MODE (replacements[j]) != mode_arg0
3672 && (code == ZERO_EXTEND
3673 || code == SIGN_EXTEND
3674 || code == TRUNCATE
3675 || code == FLOAT_TRUNCATE
3676 || code == FLOAT_EXTEND
3677 || code == FLOAT
3678 || code == FIX
3679 || code == UNSIGNED_FLOAT
3680 || code == UNSIGNED_FIX))
3681 continue;
3682
7afe21cc
RK
3683 if (validate_change (insn, &XEXP (x, i), replacements[j], 0))
3684 break;
3685
ec8e098d
PB
3686 if (GET_RTX_CLASS (code) == RTX_COMM_COMPARE
3687 || GET_RTX_CLASS (code) == RTX_COMM_ARITH)
7afe21cc
RK
3688 {
3689 validate_change (insn, &XEXP (x, i), XEXP (x, 1 - i), 1);
3690 validate_change (insn, &XEXP (x, 1 - i), replacements[j], 1);
3691
3692 if (apply_change_group ())
3693 {
3694 /* Swap them back to be invalid so that this loop can
3695 continue and flag them to be swapped back later. */
3696 rtx tem;
3697
3698 tem = XEXP (x, 0); XEXP (x, 0) = XEXP (x, 1);
3699 XEXP (x, 1) = tem;
3700 must_swap = 1;
3701 break;
3702 }
3703 }
3704 }
3705 }
3706
2d8b0f3a
JL
3707 else
3708 {
3709 if (fmt[i] == 'E')
3710 /* Don't try to fold inside of a vector of expressions.
3711 Doing nothing is harmless. */
e49a1d2e 3712 {;}
2d8b0f3a 3713 }
7afe21cc
RK
3714
3715 /* If a commutative operation, place a constant integer as the second
3716 operand unless the first operand is also a constant integer. Otherwise,
3717 place any constant second unless the first operand is also a constant. */
3718
ec8e098d 3719 if (COMMUTATIVE_P (x))
7afe21cc 3720 {
c715abdd
RS
3721 if (must_swap
3722 || swap_commutative_operands_p (const_arg0 ? const_arg0
3723 : XEXP (x, 0),
3724 const_arg1 ? const_arg1
3725 : XEXP (x, 1)))
7afe21cc 3726 {
b3694847 3727 rtx tem = XEXP (x, 0);
7afe21cc
RK
3728
3729 if (insn == 0 && ! copied)
3730 {
3731 x = copy_rtx (x);
3732 copied = 1;
3733 }
3734
3735 validate_change (insn, &XEXP (x, 0), XEXP (x, 1), 1);
3736 validate_change (insn, &XEXP (x, 1), tem, 1);
3737 if (apply_change_group ())
3738 {
3739 tem = const_arg0, const_arg0 = const_arg1, const_arg1 = tem;
3740 tem = folded_arg0, folded_arg0 = folded_arg1, folded_arg1 = tem;
3741 }
3742 }
3743 }
3744
3745 /* If X is an arithmetic operation, see if we can simplify it. */
3746
3747 switch (GET_RTX_CLASS (code))
3748 {
ec8e098d 3749 case RTX_UNARY:
67a37737
RK
3750 {
3751 int is_const = 0;
3752
3753 /* We can't simplify extension ops unless we know the
3754 original mode. */
3755 if ((code == ZERO_EXTEND || code == SIGN_EXTEND)
3756 && mode_arg0 == VOIDmode)
3757 break;
3758
3759 /* If we had a CONST, strip it off and put it back later if we
3760 fold. */
3761 if (const_arg0 != 0 && GET_CODE (const_arg0) == CONST)
3762 is_const = 1, const_arg0 = XEXP (const_arg0, 0);
3763
3764 new = simplify_unary_operation (code, mode,
3765 const_arg0 ? const_arg0 : folded_arg0,
3766 mode_arg0);
3767 if (new != 0 && is_const)
38a448ca 3768 new = gen_rtx_CONST (mode, new);
67a37737 3769 }
7afe21cc 3770 break;
278a83b2 3771
ec8e098d
PB
3772 case RTX_COMPARE:
3773 case RTX_COMM_COMPARE:
7afe21cc
RK
3774 /* See what items are actually being compared and set FOLDED_ARG[01]
3775 to those values and CODE to the actual comparison code. If any are
3776 constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
3777 do anything if both operands are already known to be constant. */
3778
3779 if (const_arg0 == 0 || const_arg1 == 0)
3780 {
3781 struct table_elt *p0, *p1;
d6edb99e 3782 rtx true_rtx = const_true_rtx, false_rtx = const0_rtx;
13c9910f 3783 enum machine_mode mode_arg1;
c610adec
RK
3784
3785#ifdef FLOAT_STORE_FLAG_VALUE
c7c955ee 3786 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
c610adec 3787 {
d6edb99e 3788 true_rtx = (CONST_DOUBLE_FROM_REAL_VALUE
68252e27 3789 (FLOAT_STORE_FLAG_VALUE (mode), mode));
d6edb99e 3790 false_rtx = CONST0_RTX (mode);
c610adec
RK
3791 }
3792#endif
7afe21cc 3793
13c9910f
RS
3794 code = find_comparison_args (code, &folded_arg0, &folded_arg1,
3795 &mode_arg0, &mode_arg1);
7afe21cc
RK
3796 const_arg0 = equiv_constant (folded_arg0);
3797 const_arg1 = equiv_constant (folded_arg1);
3798
13c9910f
RS
3799 /* If the mode is VOIDmode or a MODE_CC mode, we don't know
3800 what kinds of things are being compared, so we can't do
3801 anything with this comparison. */
7afe21cc
RK
3802
3803 if (mode_arg0 == VOIDmode || GET_MODE_CLASS (mode_arg0) == MODE_CC)
3804 break;
3805
0f41302f
MS
3806 /* If we do not now have two constants being compared, see
3807 if we can nevertheless deduce some things about the
3808 comparison. */
7afe21cc
RK
3809 if (const_arg0 == 0 || const_arg1 == 0)
3810 {
4977bab6
ZW
3811 /* Some addresses are known to be nonzero. We don't know
3812 their sign, but equality comparisons are known. */
7afe21cc 3813 if (const_arg1 == const0_rtx
4977bab6 3814 && nonzero_address_p (folded_arg0))
7afe21cc
RK
3815 {
3816 if (code == EQ)
d6edb99e 3817 return false_rtx;
7afe21cc 3818 else if (code == NE)
d6edb99e 3819 return true_rtx;
7afe21cc
RK
3820 }
3821
fd13313f
JH
3822 /* See if the two operands are the same. */
3823
3824 if (folded_arg0 == folded_arg1
f8cfc6aa
JQ
3825 || (REG_P (folded_arg0)
3826 && REG_P (folded_arg1)
fd13313f
JH
3827 && (REG_QTY (REGNO (folded_arg0))
3828 == REG_QTY (REGNO (folded_arg1))))
3829 || ((p0 = lookup (folded_arg0,
3830 (safe_hash (folded_arg0, mode_arg0)
3831 & HASH_MASK), mode_arg0))
3832 && (p1 = lookup (folded_arg1,
3833 (safe_hash (folded_arg1, mode_arg0)
3834 & HASH_MASK), mode_arg0))
3835 && p0->first_same_value == p1->first_same_value))
3836 {
71925bc0
RS
3837 /* Sadly two equal NaNs are not equivalent. */
3838 if (!HONOR_NANS (mode_arg0))
3839 return ((code == EQ || code == LE || code == GE
3840 || code == LEU || code == GEU || code == UNEQ
3841 || code == UNLE || code == UNGE
3842 || code == ORDERED)
3843 ? true_rtx : false_rtx);
3844 /* Take care for the FP compares we can resolve. */
3845 if (code == UNEQ || code == UNLE || code == UNGE)
3846 return true_rtx;
3847 if (code == LTGT || code == LT || code == GT)
3848 return false_rtx;
fd13313f 3849 }
7afe21cc
RK
3850
3851 /* If FOLDED_ARG0 is a register, see if the comparison we are
3852 doing now is either the same as we did before or the reverse
3853 (we only check the reverse if not floating-point). */
f8cfc6aa 3854 else if (REG_P (folded_arg0))
7afe21cc 3855 {
30f72379 3856 int qty = REG_QTY (REGNO (folded_arg0));
7afe21cc 3857
1bb98cec
DM
3858 if (REGNO_QTY_VALID_P (REGNO (folded_arg0)))
3859 {
3860 struct qty_table_elem *ent = &qty_table[qty];
3861
3862 if ((comparison_dominates_p (ent->comparison_code, code)
1eb8759b
RH
3863 || (! FLOAT_MODE_P (mode_arg0)
3864 && comparison_dominates_p (ent->comparison_code,
3865 reverse_condition (code))))
1bb98cec
DM
3866 && (rtx_equal_p (ent->comparison_const, folded_arg1)
3867 || (const_arg1
3868 && rtx_equal_p (ent->comparison_const,
3869 const_arg1))
f8cfc6aa 3870 || (REG_P (folded_arg1)
1bb98cec
DM
3871 && (REG_QTY (REGNO (folded_arg1)) == ent->comparison_qty))))
3872 return (comparison_dominates_p (ent->comparison_code, code)
d6edb99e 3873 ? true_rtx : false_rtx);
1bb98cec 3874 }
7afe21cc
RK
3875 }
3876 }
3877 }
3878
3879 /* If we are comparing against zero, see if the first operand is
3880 equivalent to an IOR with a constant. If so, we may be able to
3881 determine the result of this comparison. */
3882
3883 if (const_arg1 == const0_rtx)
3884 {
3885 rtx y = lookup_as_function (folded_arg0, IOR);
3886 rtx inner_const;
3887
3888 if (y != 0
3889 && (inner_const = equiv_constant (XEXP (y, 1))) != 0
3890 && GET_CODE (inner_const) == CONST_INT
3891 && INTVAL (inner_const) != 0)
3892 {
3893 int sign_bitnum = GET_MODE_BITSIZE (mode_arg0) - 1;
906c4e36
RK
3894 int has_sign = (HOST_BITS_PER_WIDE_INT >= sign_bitnum
3895 && (INTVAL (inner_const)
3896 & ((HOST_WIDE_INT) 1 << sign_bitnum)));
d6edb99e 3897 rtx true_rtx = const_true_rtx, false_rtx = const0_rtx;
c610adec
RK
3898
3899#ifdef FLOAT_STORE_FLAG_VALUE
c7c955ee 3900 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
c610adec 3901 {
d6edb99e 3902 true_rtx = (CONST_DOUBLE_FROM_REAL_VALUE
12530dbe 3903 (FLOAT_STORE_FLAG_VALUE (mode), mode));
d6edb99e 3904 false_rtx = CONST0_RTX (mode);
c610adec
RK
3905 }
3906#endif
7afe21cc
RK
3907
3908 switch (code)
3909 {
3910 case EQ:
d6edb99e 3911 return false_rtx;
7afe21cc 3912 case NE:
d6edb99e 3913 return true_rtx;
7afe21cc
RK
3914 case LT: case LE:
3915 if (has_sign)
d6edb99e 3916 return true_rtx;
7afe21cc
RK
3917 break;
3918 case GT: case GE:
3919 if (has_sign)
d6edb99e 3920 return false_rtx;
7afe21cc 3921 break;
e9a25f70
JL
3922 default:
3923 break;
7afe21cc
RK
3924 }
3925 }
3926 }
3927
c6fb08ad
PB
3928 {
3929 rtx op0 = const_arg0 ? const_arg0 : folded_arg0;
3930 rtx op1 = const_arg1 ? const_arg1 : folded_arg1;
3931 new = simplify_relational_operation (code, mode, mode_arg0, op0, op1);
3932 }
7afe21cc
RK
3933 break;
3934
ec8e098d
PB
3935 case RTX_BIN_ARITH:
3936 case RTX_COMM_ARITH:
7afe21cc
RK
3937 switch (code)
3938 {
3939 case PLUS:
3940 /* If the second operand is a LABEL_REF, see if the first is a MINUS
3941 with that LABEL_REF as its second operand. If so, the result is
3942 the first operand of that MINUS. This handles switches with an
3943 ADDR_DIFF_VEC table. */
3944 if (const_arg1 && GET_CODE (const_arg1) == LABEL_REF)
3945 {
e650cbda
RK
3946 rtx y
3947 = GET_CODE (folded_arg0) == MINUS ? folded_arg0
ddc356e8 3948 : lookup_as_function (folded_arg0, MINUS);
7afe21cc
RK
3949
3950 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
3951 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg1, 0))
3952 return XEXP (y, 0);
67a37737
RK
3953
3954 /* Now try for a CONST of a MINUS like the above. */
e650cbda
RK
3955 if ((y = (GET_CODE (folded_arg0) == CONST ? folded_arg0
3956 : lookup_as_function (folded_arg0, CONST))) != 0
67a37737
RK
3957 && GET_CODE (XEXP (y, 0)) == MINUS
3958 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
ddc356e8 3959 && XEXP (XEXP (XEXP (y, 0), 1), 0) == XEXP (const_arg1, 0))
67a37737 3960 return XEXP (XEXP (y, 0), 0);
7afe21cc 3961 }
c2cc0778 3962
e650cbda
RK
3963 /* Likewise if the operands are in the other order. */
3964 if (const_arg0 && GET_CODE (const_arg0) == LABEL_REF)
3965 {
3966 rtx y
3967 = GET_CODE (folded_arg1) == MINUS ? folded_arg1
ddc356e8 3968 : lookup_as_function (folded_arg1, MINUS);
e650cbda
RK
3969
3970 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
3971 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg0, 0))
3972 return XEXP (y, 0);
3973
3974 /* Now try for a CONST of a MINUS like the above. */
3975 if ((y = (GET_CODE (folded_arg1) == CONST ? folded_arg1
3976 : lookup_as_function (folded_arg1, CONST))) != 0
3977 && GET_CODE (XEXP (y, 0)) == MINUS
3978 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
ddc356e8 3979 && XEXP (XEXP (XEXP (y, 0), 1), 0) == XEXP (const_arg0, 0))
e650cbda
RK
3980 return XEXP (XEXP (y, 0), 0);
3981 }
3982
c2cc0778
RK
3983 /* If second operand is a register equivalent to a negative
3984 CONST_INT, see if we can find a register equivalent to the
3985 positive constant. Make a MINUS if so. Don't do this for
5d595063 3986 a non-negative constant since we might then alternate between
a1f300c0 3987 choosing positive and negative constants. Having the positive
5d595063
RK
3988 constant previously-used is the more common case. Be sure
3989 the resulting constant is non-negative; if const_arg1 were
3990 the smallest negative number this would overflow: depending
3991 on the mode, this would either just be the same value (and
3992 hence not save anything) or be incorrect. */
3993 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT
3994 && INTVAL (const_arg1) < 0
4741f6ad
JL
3995 /* This used to test
3996
ddc356e8 3997 -INTVAL (const_arg1) >= 0
4741f6ad
JL
3998
3999 But The Sun V5.0 compilers mis-compiled that test. So
4000 instead we test for the problematic value in a more direct
4001 manner and hope the Sun compilers get it correct. */
5c45a8ac
KG
4002 && INTVAL (const_arg1) !=
4003 ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT - 1))
f8cfc6aa 4004 && REG_P (folded_arg1))
c2cc0778 4005 {
ddc356e8 4006 rtx new_const = GEN_INT (-INTVAL (const_arg1));
c2cc0778 4007 struct table_elt *p
9b1549b8 4008 = lookup (new_const, safe_hash (new_const, mode) & HASH_MASK,
c2cc0778
RK
4009 mode);
4010
4011 if (p)
4012 for (p = p->first_same_value; p; p = p->next_same_value)
f8cfc6aa 4013 if (REG_P (p->exp))
0cedb36c
JL
4014 return simplify_gen_binary (MINUS, mode, folded_arg0,
4015 canon_reg (p->exp, NULL_RTX));
c2cc0778 4016 }
13c9910f
RS
4017 goto from_plus;
4018
4019 case MINUS:
4020 /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
4021 If so, produce (PLUS Z C2-C). */
4022 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT)
4023 {
4024 rtx y = lookup_as_function (XEXP (x, 0), PLUS);
4025 if (y && GET_CODE (XEXP (y, 1)) == CONST_INT)
f3becefd
RK
4026 return fold_rtx (plus_constant (copy_rtx (y),
4027 -INTVAL (const_arg1)),
a3b5c94a 4028 NULL_RTX);
13c9910f 4029 }
7afe21cc 4030
ddc356e8 4031 /* Fall through. */
7afe21cc 4032
13c9910f 4033 from_plus:
7afe21cc
RK
4034 case SMIN: case SMAX: case UMIN: case UMAX:
4035 case IOR: case AND: case XOR:
f930bfd0 4036 case MULT:
7afe21cc
RK
4037 case ASHIFT: case LSHIFTRT: case ASHIFTRT:
4038 /* If we have (<op> <reg> <const_int>) for an associative OP and REG
4039 is known to be of similar form, we may be able to replace the
4040 operation with a combined operation. This may eliminate the
4041 intermediate operation if every use is simplified in this way.
4042 Note that the similar optimization done by combine.c only works
4043 if the intermediate operation's result has only one reference. */
4044
f8cfc6aa 4045 if (REG_P (folded_arg0)
7afe21cc
RK
4046 && const_arg1 && GET_CODE (const_arg1) == CONST_INT)
4047 {
4048 int is_shift
4049 = (code == ASHIFT || code == ASHIFTRT || code == LSHIFTRT);
4050 rtx y = lookup_as_function (folded_arg0, code);
4051 rtx inner_const;
4052 enum rtx_code associate_code;
4053 rtx new_const;
4054
4055 if (y == 0
4056 || 0 == (inner_const
4057 = equiv_constant (fold_rtx (XEXP (y, 1), 0)))
4058 || GET_CODE (inner_const) != CONST_INT
4059 /* If we have compiled a statement like
4060 "if (x == (x & mask1))", and now are looking at
4061 "x & mask2", we will have a case where the first operand
4062 of Y is the same as our first operand. Unless we detect
4063 this case, an infinite loop will result. */
4064 || XEXP (y, 0) == folded_arg0)
4065 break;
4066
4067 /* Don't associate these operations if they are a PLUS with the
4068 same constant and it is a power of two. These might be doable
4069 with a pre- or post-increment. Similarly for two subtracts of
4070 identical powers of two with post decrement. */
4071
213d5fbc 4072 if (code == PLUS && const_arg1 == inner_const
940da324
JL
4073 && ((HAVE_PRE_INCREMENT
4074 && exact_log2 (INTVAL (const_arg1)) >= 0)
4075 || (HAVE_POST_INCREMENT
4076 && exact_log2 (INTVAL (const_arg1)) >= 0)
4077 || (HAVE_PRE_DECREMENT
4078 && exact_log2 (- INTVAL (const_arg1)) >= 0)
4079 || (HAVE_POST_DECREMENT
4080 && exact_log2 (- INTVAL (const_arg1)) >= 0)))
7afe21cc
RK
4081 break;
4082
4083 /* Compute the code used to compose the constants. For example,
f930bfd0 4084 A-C1-C2 is A-(C1 + C2), so if CODE == MINUS, we want PLUS. */
7afe21cc 4085
f930bfd0 4086 associate_code = (is_shift || code == MINUS ? PLUS : code);
7afe21cc
RK
4087
4088 new_const = simplify_binary_operation (associate_code, mode,
4089 const_arg1, inner_const);
4090
4091 if (new_const == 0)
4092 break;
4093
4094 /* If we are associating shift operations, don't let this
4908e508
RS
4095 produce a shift of the size of the object or larger.
4096 This could occur when we follow a sign-extend by a right
4097 shift on a machine that does a sign-extend as a pair
4098 of shifts. */
7afe21cc
RK
4099
4100 if (is_shift && GET_CODE (new_const) == CONST_INT
4908e508
RS
4101 && INTVAL (new_const) >= GET_MODE_BITSIZE (mode))
4102 {
4103 /* As an exception, we can turn an ASHIFTRT of this
4104 form into a shift of the number of bits - 1. */
4105 if (code == ASHIFTRT)
4106 new_const = GEN_INT (GET_MODE_BITSIZE (mode) - 1);
4107 else
4108 break;
4109 }
7afe21cc
RK
4110
4111 y = copy_rtx (XEXP (y, 0));
4112
4113 /* If Y contains our first operand (the most common way this
4114 can happen is if Y is a MEM), we would do into an infinite
4115 loop if we tried to fold it. So don't in that case. */
4116
4117 if (! reg_mentioned_p (folded_arg0, y))
4118 y = fold_rtx (y, insn);
4119
0cedb36c 4120 return simplify_gen_binary (code, mode, y, new_const);
7afe21cc 4121 }
e9a25f70
JL
4122 break;
4123
f930bfd0
JW
4124 case DIV: case UDIV:
4125 /* ??? The associative optimization performed immediately above is
4126 also possible for DIV and UDIV using associate_code of MULT.
4127 However, we would need extra code to verify that the
4128 multiplication does not overflow, that is, there is no overflow
4129 in the calculation of new_const. */
4130 break;
4131
e9a25f70
JL
4132 default:
4133 break;
7afe21cc
RK
4134 }
4135
4136 new = simplify_binary_operation (code, mode,
4137 const_arg0 ? const_arg0 : folded_arg0,
4138 const_arg1 ? const_arg1 : folded_arg1);
4139 break;
4140
ec8e098d 4141 case RTX_OBJ:
7afe21cc
RK
4142 /* (lo_sum (high X) X) is simply X. */
4143 if (code == LO_SUM && const_arg0 != 0
4144 && GET_CODE (const_arg0) == HIGH
4145 && rtx_equal_p (XEXP (const_arg0, 0), const_arg1))
4146 return const_arg1;
4147 break;
4148
ec8e098d
PB
4149 case RTX_TERNARY:
4150 case RTX_BITFIELD_OPS:
7afe21cc
RK
4151 new = simplify_ternary_operation (code, mode, mode_arg0,
4152 const_arg0 ? const_arg0 : folded_arg0,
4153 const_arg1 ? const_arg1 : folded_arg1,
4154 const_arg2 ? const_arg2 : XEXP (x, 2));
4155 break;
ee5332b8 4156
ec8e098d
PB
4157 default:
4158 break;
7afe21cc
RK
4159 }
4160
4161 return new ? new : x;
4162}
4163\f
4164/* Return a constant value currently equivalent to X.
4165 Return 0 if we don't know one. */
4166
4167static rtx
7080f735 4168equiv_constant (rtx x)
7afe21cc 4169{
f8cfc6aa 4170 if (REG_P (x)
1bb98cec
DM
4171 && REGNO_QTY_VALID_P (REGNO (x)))
4172 {
4173 int x_q = REG_QTY (REGNO (x));
4174 struct qty_table_elem *x_ent = &qty_table[x_q];
4175
4176 if (x_ent->const_rtx)
4de249d9 4177 x = gen_lowpart (GET_MODE (x), x_ent->const_rtx);
1bb98cec 4178 }
7afe21cc 4179
2ce5e1b4 4180 if (x == 0 || CONSTANT_P (x))
7afe21cc
RK
4181 return x;
4182
fc3ffe83
RK
4183 /* If X is a MEM, try to fold it outside the context of any insn to see if
4184 it might be equivalent to a constant. That handles the case where it
4185 is a constant-pool reference. Then try to look it up in the hash table
4186 in case it is something whose value we have seen before. */
4187
3c0cb5de 4188 if (MEM_P (x))
fc3ffe83
RK
4189 {
4190 struct table_elt *elt;
4191
906c4e36 4192 x = fold_rtx (x, NULL_RTX);
fc3ffe83
RK
4193 if (CONSTANT_P (x))
4194 return x;
4195
9b1549b8 4196 elt = lookup (x, safe_hash (x, GET_MODE (x)) & HASH_MASK, GET_MODE (x));
fc3ffe83
RK
4197 if (elt == 0)
4198 return 0;
4199
4200 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
4201 if (elt->is_const && CONSTANT_P (elt->exp))
4202 return elt->exp;
4203 }
4204
7afe21cc
RK
4205 return 0;
4206}
4207\f
4208/* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a fixed-point
4209 number, return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
4210 least-significant part of X.
278a83b2 4211 MODE specifies how big a part of X to return.
7afe21cc
RK
4212
4213 If the requested operation cannot be done, 0 is returned.
4214
4de249d9 4215 This is similar to gen_lowpart_general in emit-rtl.c. */
7afe21cc
RK
4216
4217rtx
7080f735 4218gen_lowpart_if_possible (enum machine_mode mode, rtx x)
7afe21cc
RK
4219{
4220 rtx result = gen_lowpart_common (mode, x);
4221
4222 if (result)
4223 return result;
3c0cb5de 4224 else if (MEM_P (x))
7afe21cc
RK
4225 {
4226 /* This is the only other case we handle. */
b3694847 4227 int offset = 0;
7afe21cc
RK
4228 rtx new;
4229
f76b9db2
ILT
4230 if (WORDS_BIG_ENDIAN)
4231 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
4232 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
4233 if (BYTES_BIG_ENDIAN)
f1ec5147
RK
4234 /* Adjust the address so that the address-after-the-data is
4235 unchanged. */
4236 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
4237 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
4238
4239 new = adjust_address_nv (x, mode, offset);
7afe21cc
RK
4240 if (! memory_address_p (mode, XEXP (new, 0)))
4241 return 0;
f1ec5147 4242
7afe21cc
RK
4243 return new;
4244 }
4245 else
4246 return 0;
4247}
4248\f
6de9cd9a 4249/* Given INSN, a jump insn, PATH_TAKEN indicates if we are following the "taken"
7afe21cc
RK
4250 branch. It will be zero if not.
4251
4252 In certain cases, this can cause us to add an equivalence. For example,
278a83b2 4253 if we are following the taken case of
7080f735 4254 if (i == 2)
7afe21cc
RK
4255 we can add the fact that `i' and '2' are now equivalent.
4256
4257 In any case, we can record that this comparison was passed. If the same
4258 comparison is seen later, we will know its value. */
4259
4260static void
7080f735 4261record_jump_equiv (rtx insn, int taken)
7afe21cc
RK
4262{
4263 int cond_known_true;
4264 rtx op0, op1;
7f1c097d 4265 rtx set;
13c9910f 4266 enum machine_mode mode, mode0, mode1;
7afe21cc
RK
4267 int reversed_nonequality = 0;
4268 enum rtx_code code;
4269
4270 /* Ensure this is the right kind of insn. */
7f1c097d 4271 if (! any_condjump_p (insn))
7afe21cc 4272 return;
7f1c097d 4273 set = pc_set (insn);
7afe21cc
RK
4274
4275 /* See if this jump condition is known true or false. */
4276 if (taken)
7f1c097d 4277 cond_known_true = (XEXP (SET_SRC (set), 2) == pc_rtx);
7afe21cc 4278 else
7f1c097d 4279 cond_known_true = (XEXP (SET_SRC (set), 1) == pc_rtx);
7afe21cc
RK
4280
4281 /* Get the type of comparison being done and the operands being compared.
4282 If we had to reverse a non-equality condition, record that fact so we
4283 know that it isn't valid for floating-point. */
7f1c097d
JH
4284 code = GET_CODE (XEXP (SET_SRC (set), 0));
4285 op0 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 0), insn);
4286 op1 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 1), insn);
7afe21cc 4287
13c9910f 4288 code = find_comparison_args (code, &op0, &op1, &mode0, &mode1);
7afe21cc
RK
4289 if (! cond_known_true)
4290 {
261efdef 4291 code = reversed_comparison_code_parts (code, op0, op1, insn);
1eb8759b
RH
4292
4293 /* Don't remember if we can't find the inverse. */
4294 if (code == UNKNOWN)
4295 return;
7afe21cc
RK
4296 }
4297
4298 /* The mode is the mode of the non-constant. */
13c9910f
RS
4299 mode = mode0;
4300 if (mode1 != VOIDmode)
4301 mode = mode1;
7afe21cc
RK
4302
4303 record_jump_cond (code, mode, op0, op1, reversed_nonequality);
4304}
4305
4306/* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
4307 REVERSED_NONEQUALITY is nonzero if CODE had to be swapped.
4308 Make any useful entries we can with that information. Called from
4309 above function and called recursively. */
4310
4311static void
7080f735
AJ
4312record_jump_cond (enum rtx_code code, enum machine_mode mode, rtx op0,
4313 rtx op1, int reversed_nonequality)
7afe21cc 4314{
2197a88a 4315 unsigned op0_hash, op1_hash;
e428d738 4316 int op0_in_memory, op1_in_memory;
7afe21cc
RK
4317 struct table_elt *op0_elt, *op1_elt;
4318
4319 /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
4320 we know that they are also equal in the smaller mode (this is also
4321 true for all smaller modes whether or not there is a SUBREG, but
ac7ef8d5 4322 is not worth testing for with no SUBREG). */
7afe21cc 4323
2e794ee8 4324 /* Note that GET_MODE (op0) may not equal MODE. */
7afe21cc 4325 if (code == EQ && GET_CODE (op0) == SUBREG
2e794ee8
RS
4326 && (GET_MODE_SIZE (GET_MODE (op0))
4327 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
7afe21cc
RK
4328 {
4329 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
4de249d9 4330 rtx tem = gen_lowpart (inner_mode, op1);
7afe21cc
RK
4331
4332 record_jump_cond (code, mode, SUBREG_REG (op0),
38a448ca 4333 tem ? tem : gen_rtx_SUBREG (inner_mode, op1, 0),
7afe21cc
RK
4334 reversed_nonequality);
4335 }
4336
4337 if (code == EQ && GET_CODE (op1) == SUBREG
2e794ee8
RS
4338 && (GET_MODE_SIZE (GET_MODE (op1))
4339 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
7afe21cc
RK
4340 {
4341 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
4de249d9 4342 rtx tem = gen_lowpart (inner_mode, op0);
7afe21cc
RK
4343
4344 record_jump_cond (code, mode, SUBREG_REG (op1),
38a448ca 4345 tem ? tem : gen_rtx_SUBREG (inner_mode, op0, 0),
7afe21cc
RK
4346 reversed_nonequality);
4347 }
4348
278a83b2 4349 /* Similarly, if this is an NE comparison, and either is a SUBREG
7afe21cc
RK
4350 making a smaller mode, we know the whole thing is also NE. */
4351
2e794ee8
RS
4352 /* Note that GET_MODE (op0) may not equal MODE;
4353 if we test MODE instead, we can get an infinite recursion
4354 alternating between two modes each wider than MODE. */
4355
7afe21cc
RK
4356 if (code == NE && GET_CODE (op0) == SUBREG
4357 && subreg_lowpart_p (op0)
2e794ee8
RS
4358 && (GET_MODE_SIZE (GET_MODE (op0))
4359 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
7afe21cc
RK
4360 {
4361 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
4de249d9 4362 rtx tem = gen_lowpart (inner_mode, op1);
7afe21cc
RK
4363
4364 record_jump_cond (code, mode, SUBREG_REG (op0),
38a448ca 4365 tem ? tem : gen_rtx_SUBREG (inner_mode, op1, 0),
7afe21cc
RK
4366 reversed_nonequality);
4367 }
4368
4369 if (code == NE && GET_CODE (op1) == SUBREG
4370 && subreg_lowpart_p (op1)
2e794ee8
RS
4371 && (GET_MODE_SIZE (GET_MODE (op1))
4372 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
7afe21cc
RK
4373 {
4374 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
4de249d9 4375 rtx tem = gen_lowpart (inner_mode, op0);
7afe21cc
RK
4376
4377 record_jump_cond (code, mode, SUBREG_REG (op1),
38a448ca 4378 tem ? tem : gen_rtx_SUBREG (inner_mode, op0, 0),
7afe21cc
RK
4379 reversed_nonequality);
4380 }
4381
4382 /* Hash both operands. */
4383
4384 do_not_record = 0;
4385 hash_arg_in_memory = 0;
2197a88a 4386 op0_hash = HASH (op0, mode);
7afe21cc 4387 op0_in_memory = hash_arg_in_memory;
7afe21cc
RK
4388
4389 if (do_not_record)
4390 return;
4391
4392 do_not_record = 0;
4393 hash_arg_in_memory = 0;
2197a88a 4394 op1_hash = HASH (op1, mode);
7afe21cc 4395 op1_in_memory = hash_arg_in_memory;
278a83b2 4396
7afe21cc
RK
4397 if (do_not_record)
4398 return;
4399
4400 /* Look up both operands. */
2197a88a
RK
4401 op0_elt = lookup (op0, op0_hash, mode);
4402 op1_elt = lookup (op1, op1_hash, mode);
7afe21cc 4403
af3869c1
RK
4404 /* If both operands are already equivalent or if they are not in the
4405 table but are identical, do nothing. */
4406 if ((op0_elt != 0 && op1_elt != 0
4407 && op0_elt->first_same_value == op1_elt->first_same_value)
4408 || op0 == op1 || rtx_equal_p (op0, op1))
4409 return;
4410
7afe21cc 4411 /* If we aren't setting two things equal all we can do is save this
b2796a4b
RK
4412 comparison. Similarly if this is floating-point. In the latter
4413 case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
4414 If we record the equality, we might inadvertently delete code
4415 whose intent was to change -0 to +0. */
4416
cbf6a543 4417 if (code != EQ || FLOAT_MODE_P (GET_MODE (op0)))
7afe21cc 4418 {
1bb98cec
DM
4419 struct qty_table_elem *ent;
4420 int qty;
4421
7afe21cc
RK
4422 /* If we reversed a floating-point comparison, if OP0 is not a
4423 register, or if OP1 is neither a register or constant, we can't
4424 do anything. */
4425
f8cfc6aa 4426 if (!REG_P (op1))
7afe21cc
RK
4427 op1 = equiv_constant (op1);
4428
cbf6a543 4429 if ((reversed_nonequality && FLOAT_MODE_P (mode))
f8cfc6aa 4430 || !REG_P (op0) || op1 == 0)
7afe21cc
RK
4431 return;
4432
4433 /* Put OP0 in the hash table if it isn't already. This gives it a
4434 new quantity number. */
4435 if (op0_elt == 0)
4436 {
9714cf43 4437 if (insert_regs (op0, NULL, 0))
7afe21cc
RK
4438 {
4439 rehash_using_reg (op0);
2197a88a 4440 op0_hash = HASH (op0, mode);
2bb81c86
RK
4441
4442 /* If OP0 is contained in OP1, this changes its hash code
4443 as well. Faster to rehash than to check, except
4444 for the simple case of a constant. */
4445 if (! CONSTANT_P (op1))
2197a88a 4446 op1_hash = HASH (op1,mode);
7afe21cc
RK
4447 }
4448
9714cf43 4449 op0_elt = insert (op0, NULL, op0_hash, mode);
7afe21cc 4450 op0_elt->in_memory = op0_in_memory;
7afe21cc
RK
4451 }
4452
1bb98cec
DM
4453 qty = REG_QTY (REGNO (op0));
4454 ent = &qty_table[qty];
4455
4456 ent->comparison_code = code;
f8cfc6aa 4457 if (REG_P (op1))
7afe21cc 4458 {
5d5ea909 4459 /* Look it up again--in case op0 and op1 are the same. */
2197a88a 4460 op1_elt = lookup (op1, op1_hash, mode);
5d5ea909 4461
7afe21cc
RK
4462 /* Put OP1 in the hash table so it gets a new quantity number. */
4463 if (op1_elt == 0)
4464 {
9714cf43 4465 if (insert_regs (op1, NULL, 0))
7afe21cc
RK
4466 {
4467 rehash_using_reg (op1);
2197a88a 4468 op1_hash = HASH (op1, mode);
7afe21cc
RK
4469 }
4470
9714cf43 4471 op1_elt = insert (op1, NULL, op1_hash, mode);
7afe21cc 4472 op1_elt->in_memory = op1_in_memory;
7afe21cc
RK
4473 }
4474
1bb98cec
DM
4475 ent->comparison_const = NULL_RTX;
4476 ent->comparison_qty = REG_QTY (REGNO (op1));
7afe21cc
RK
4477 }
4478 else
4479 {
1bb98cec
DM
4480 ent->comparison_const = op1;
4481 ent->comparison_qty = -1;
7afe21cc
RK
4482 }
4483
4484 return;
4485 }
4486
eb5ad42a
RS
4487 /* If either side is still missing an equivalence, make it now,
4488 then merge the equivalences. */
7afe21cc 4489
7afe21cc
RK
4490 if (op0_elt == 0)
4491 {
9714cf43 4492 if (insert_regs (op0, NULL, 0))
7afe21cc
RK
4493 {
4494 rehash_using_reg (op0);
2197a88a 4495 op0_hash = HASH (op0, mode);
7afe21cc
RK
4496 }
4497
9714cf43 4498 op0_elt = insert (op0, NULL, op0_hash, mode);
7afe21cc 4499 op0_elt->in_memory = op0_in_memory;
7afe21cc
RK
4500 }
4501
4502 if (op1_elt == 0)
4503 {
9714cf43 4504 if (insert_regs (op1, NULL, 0))
7afe21cc
RK
4505 {
4506 rehash_using_reg (op1);
2197a88a 4507 op1_hash = HASH (op1, mode);
7afe21cc
RK
4508 }
4509
9714cf43 4510 op1_elt = insert (op1, NULL, op1_hash, mode);
7afe21cc 4511 op1_elt->in_memory = op1_in_memory;
7afe21cc 4512 }
eb5ad42a
RS
4513
4514 merge_equiv_classes (op0_elt, op1_elt);
4515 last_jump_equiv_class = op0_elt;
7afe21cc
RK
4516}
4517\f
4518/* CSE processing for one instruction.
4519 First simplify sources and addresses of all assignments
4520 in the instruction, using previously-computed equivalents values.
4521 Then install the new sources and destinations in the table
278a83b2 4522 of available values.
7afe21cc 4523
1ed0205e
VM
4524 If LIBCALL_INSN is nonzero, don't record any equivalence made in
4525 the insn. It means that INSN is inside libcall block. In this
ddc356e8 4526 case LIBCALL_INSN is the corresponding insn with REG_LIBCALL. */
7afe21cc
RK
4527
4528/* Data on one SET contained in the instruction. */
4529
4530struct set
4531{
4532 /* The SET rtx itself. */
4533 rtx rtl;
4534 /* The SET_SRC of the rtx (the original value, if it is changing). */
4535 rtx src;
4536 /* The hash-table element for the SET_SRC of the SET. */
4537 struct table_elt *src_elt;
2197a88a
RK
4538 /* Hash value for the SET_SRC. */
4539 unsigned src_hash;
4540 /* Hash value for the SET_DEST. */
4541 unsigned dest_hash;
7afe21cc
RK
4542 /* The SET_DEST, with SUBREG, etc., stripped. */
4543 rtx inner_dest;
278a83b2 4544 /* Nonzero if the SET_SRC is in memory. */
7afe21cc 4545 char src_in_memory;
7afe21cc
RK
4546 /* Nonzero if the SET_SRC contains something
4547 whose value cannot be predicted and understood. */
4548 char src_volatile;
496324d0
DN
4549 /* Original machine mode, in case it becomes a CONST_INT.
4550 The size of this field should match the size of the mode
4551 field of struct rtx_def (see rtl.h). */
4552 ENUM_BITFIELD(machine_mode) mode : 8;
7afe21cc
RK
4553 /* A constant equivalent for SET_SRC, if any. */
4554 rtx src_const;
47841d1b
JJ
4555 /* Original SET_SRC value used for libcall notes. */
4556 rtx orig_src;
2197a88a
RK
4557 /* Hash value of constant equivalent for SET_SRC. */
4558 unsigned src_const_hash;
7afe21cc
RK
4559 /* Table entry for constant equivalent for SET_SRC, if any. */
4560 struct table_elt *src_const_elt;
4561};
4562
4563static void
7080f735 4564cse_insn (rtx insn, rtx libcall_insn)
7afe21cc 4565{
b3694847
SS
4566 rtx x = PATTERN (insn);
4567 int i;
92f9aa51 4568 rtx tem;
b3694847 4569 int n_sets = 0;
7afe21cc 4570
2d8b0f3a 4571#ifdef HAVE_cc0
7afe21cc
RK
4572 /* Records what this insn does to set CC0. */
4573 rtx this_insn_cc0 = 0;
135d84b8 4574 enum machine_mode this_insn_cc0_mode = VOIDmode;
2d8b0f3a 4575#endif
7afe21cc
RK
4576
4577 rtx src_eqv = 0;
4578 struct table_elt *src_eqv_elt = 0;
6a651371
KG
4579 int src_eqv_volatile = 0;
4580 int src_eqv_in_memory = 0;
6a651371 4581 unsigned src_eqv_hash = 0;
7afe21cc 4582
9714cf43 4583 struct set *sets = (struct set *) 0;
7afe21cc
RK
4584
4585 this_insn = insn;
7afe21cc
RK
4586
4587 /* Find all the SETs and CLOBBERs in this instruction.
4588 Record all the SETs in the array `set' and count them.
4589 Also determine whether there is a CLOBBER that invalidates
4590 all memory references, or all references at varying addresses. */
4591
4b4bf941 4592 if (CALL_P (insn))
f1e7c95f
RK
4593 {
4594 for (tem = CALL_INSN_FUNCTION_USAGE (insn); tem; tem = XEXP (tem, 1))
f474c6f8
AO
4595 {
4596 if (GET_CODE (XEXP (tem, 0)) == CLOBBER)
4597 invalidate (SET_DEST (XEXP (tem, 0)), VOIDmode);
4598 XEXP (tem, 0) = canon_reg (XEXP (tem, 0), insn);
4599 }
f1e7c95f
RK
4600 }
4601
7afe21cc
RK
4602 if (GET_CODE (x) == SET)
4603 {
703ad42b 4604 sets = alloca (sizeof (struct set));
7afe21cc
RK
4605 sets[0].rtl = x;
4606
4607 /* Ignore SETs that are unconditional jumps.
4608 They never need cse processing, so this does not hurt.
4609 The reason is not efficiency but rather
4610 so that we can test at the end for instructions
4611 that have been simplified to unconditional jumps
4612 and not be misled by unchanged instructions
4613 that were unconditional jumps to begin with. */
4614 if (SET_DEST (x) == pc_rtx
4615 && GET_CODE (SET_SRC (x)) == LABEL_REF)
4616 ;
4617
4618 /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
4619 The hard function value register is used only once, to copy to
4620 someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)!
4621 Ensure we invalidate the destination register. On the 80386 no
7722328e 4622 other code would invalidate it since it is a fixed_reg.
0f41302f 4623 We need not check the return of apply_change_group; see canon_reg. */
7afe21cc
RK
4624
4625 else if (GET_CODE (SET_SRC (x)) == CALL)
4626 {
4627 canon_reg (SET_SRC (x), insn);
77fa0940 4628 apply_change_group ();
7afe21cc 4629 fold_rtx (SET_SRC (x), insn);
bb4034b3 4630 invalidate (SET_DEST (x), VOIDmode);
7afe21cc
RK
4631 }
4632 else
4633 n_sets = 1;
4634 }
4635 else if (GET_CODE (x) == PARALLEL)
4636 {
b3694847 4637 int lim = XVECLEN (x, 0);
7afe21cc 4638
703ad42b 4639 sets = alloca (lim * sizeof (struct set));
7afe21cc
RK
4640
4641 /* Find all regs explicitly clobbered in this insn,
4642 and ensure they are not replaced with any other regs
4643 elsewhere in this insn.
4644 When a reg that is clobbered is also used for input,
4645 we should presume that that is for a reason,
4646 and we should not substitute some other register
4647 which is not supposed to be clobbered.
4648 Therefore, this loop cannot be merged into the one below
830a38ee 4649 because a CALL may precede a CLOBBER and refer to the
7afe21cc
RK
4650 value clobbered. We must not let a canonicalization do
4651 anything in that case. */
4652 for (i = 0; i < lim; i++)
4653 {
b3694847 4654 rtx y = XVECEXP (x, 0, i);
2708da92
RS
4655 if (GET_CODE (y) == CLOBBER)
4656 {
4657 rtx clobbered = XEXP (y, 0);
4658
f8cfc6aa 4659 if (REG_P (clobbered)
2708da92 4660 || GET_CODE (clobbered) == SUBREG)
bb4034b3 4661 invalidate (clobbered, VOIDmode);
2708da92
RS
4662 else if (GET_CODE (clobbered) == STRICT_LOW_PART
4663 || GET_CODE (clobbered) == ZERO_EXTRACT)
bb4034b3 4664 invalidate (XEXP (clobbered, 0), GET_MODE (clobbered));
2708da92 4665 }
7afe21cc 4666 }
278a83b2 4667
7afe21cc
RK
4668 for (i = 0; i < lim; i++)
4669 {
b3694847 4670 rtx y = XVECEXP (x, 0, i);
7afe21cc
RK
4671 if (GET_CODE (y) == SET)
4672 {
7722328e
RK
4673 /* As above, we ignore unconditional jumps and call-insns and
4674 ignore the result of apply_change_group. */
7afe21cc
RK
4675 if (GET_CODE (SET_SRC (y)) == CALL)
4676 {
4677 canon_reg (SET_SRC (y), insn);
77fa0940 4678 apply_change_group ();
7afe21cc 4679 fold_rtx (SET_SRC (y), insn);
bb4034b3 4680 invalidate (SET_DEST (y), VOIDmode);
7afe21cc
RK
4681 }
4682 else if (SET_DEST (y) == pc_rtx
4683 && GET_CODE (SET_SRC (y)) == LABEL_REF)
4684 ;
4685 else
4686 sets[n_sets++].rtl = y;
4687 }
4688 else if (GET_CODE (y) == CLOBBER)
4689 {
9ae8ffe7 4690 /* If we clobber memory, canon the address.
7afe21cc
RK
4691 This does nothing when a register is clobbered
4692 because we have already invalidated the reg. */
3c0cb5de 4693 if (MEM_P (XEXP (y, 0)))
9ae8ffe7 4694 canon_reg (XEXP (y, 0), NULL_RTX);
7afe21cc
RK
4695 }
4696 else if (GET_CODE (y) == USE
f8cfc6aa 4697 && ! (REG_P (XEXP (y, 0))
7afe21cc 4698 && REGNO (XEXP (y, 0)) < FIRST_PSEUDO_REGISTER))
906c4e36 4699 canon_reg (y, NULL_RTX);
7afe21cc
RK
4700 else if (GET_CODE (y) == CALL)
4701 {
7722328e
RK
4702 /* The result of apply_change_group can be ignored; see
4703 canon_reg. */
7afe21cc 4704 canon_reg (y, insn);
77fa0940 4705 apply_change_group ();
7afe21cc
RK
4706 fold_rtx (y, insn);
4707 }
4708 }
4709 }
4710 else if (GET_CODE (x) == CLOBBER)
4711 {
3c0cb5de 4712 if (MEM_P (XEXP (x, 0)))
9ae8ffe7 4713 canon_reg (XEXP (x, 0), NULL_RTX);
7afe21cc
RK
4714 }
4715
4716 /* Canonicalize a USE of a pseudo register or memory location. */
4717 else if (GET_CODE (x) == USE
f8cfc6aa 4718 && ! (REG_P (XEXP (x, 0))
7afe21cc 4719 && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER))
906c4e36 4720 canon_reg (XEXP (x, 0), NULL_RTX);
7afe21cc
RK
4721 else if (GET_CODE (x) == CALL)
4722 {
7722328e 4723 /* The result of apply_change_group can be ignored; see canon_reg. */
7afe21cc 4724 canon_reg (x, insn);
77fa0940 4725 apply_change_group ();
7afe21cc
RK
4726 fold_rtx (x, insn);
4727 }
4728
7b3ab05e
JW
4729 /* Store the equivalent value in SRC_EQV, if different, or if the DEST
4730 is a STRICT_LOW_PART. The latter condition is necessary because SRC_EQV
4731 is handled specially for this case, and if it isn't set, then there will
9faa82d8 4732 be no equivalence for the destination. */
92f9aa51
RK
4733 if (n_sets == 1 && REG_NOTES (insn) != 0
4734 && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0
7b3ab05e
JW
4735 && (! rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl))
4736 || GET_CODE (SET_DEST (sets[0].rtl)) == STRICT_LOW_PART))
7b668f9e
JJ
4737 {
4738 src_eqv = fold_rtx (canon_reg (XEXP (tem, 0), NULL_RTX), insn);
4739 XEXP (tem, 0) = src_eqv;
4740 }
7afe21cc
RK
4741
4742 /* Canonicalize sources and addresses of destinations.
4743 We do this in a separate pass to avoid problems when a MATCH_DUP is
4744 present in the insn pattern. In that case, we want to ensure that
4745 we don't break the duplicate nature of the pattern. So we will replace
4746 both operands at the same time. Otherwise, we would fail to find an
4747 equivalent substitution in the loop calling validate_change below.
7afe21cc
RK
4748
4749 We used to suppress canonicalization of DEST if it appears in SRC,
77fa0940 4750 but we don't do this any more. */
7afe21cc
RK
4751
4752 for (i = 0; i < n_sets; i++)
4753 {
4754 rtx dest = SET_DEST (sets[i].rtl);
4755 rtx src = SET_SRC (sets[i].rtl);
4756 rtx new = canon_reg (src, insn);
58873255 4757 int insn_code;
7afe21cc 4758
47841d1b 4759 sets[i].orig_src = src;
f8cfc6aa 4760 if ((REG_P (new) && REG_P (src)
77fa0940
RK
4761 && ((REGNO (new) < FIRST_PSEUDO_REGISTER)
4762 != (REGNO (src) < FIRST_PSEUDO_REGISTER)))
58873255 4763 || (insn_code = recog_memoized (insn)) < 0
a995e389 4764 || insn_data[insn_code].n_dups > 0)
77fa0940 4765 validate_change (insn, &SET_SRC (sets[i].rtl), new, 1);
7afe21cc
RK
4766 else
4767 SET_SRC (sets[i].rtl) = new;
4768
4769 if (GET_CODE (dest) == ZERO_EXTRACT || GET_CODE (dest) == SIGN_EXTRACT)
4770 {
4771 validate_change (insn, &XEXP (dest, 1),
77fa0940 4772 canon_reg (XEXP (dest, 1), insn), 1);
7afe21cc 4773 validate_change (insn, &XEXP (dest, 2),
77fa0940 4774 canon_reg (XEXP (dest, 2), insn), 1);
7afe21cc
RK
4775 }
4776
4777 while (GET_CODE (dest) == SUBREG || GET_CODE (dest) == STRICT_LOW_PART
4778 || GET_CODE (dest) == ZERO_EXTRACT
4779 || GET_CODE (dest) == SIGN_EXTRACT)
4780 dest = XEXP (dest, 0);
4781
3c0cb5de 4782 if (MEM_P (dest))
7afe21cc
RK
4783 canon_reg (dest, insn);
4784 }
4785
77fa0940
RK
4786 /* Now that we have done all the replacements, we can apply the change
4787 group and see if they all work. Note that this will cause some
4788 canonicalizations that would have worked individually not to be applied
4789 because some other canonicalization didn't work, but this should not
278a83b2 4790 occur often.
7722328e
RK
4791
4792 The result of apply_change_group can be ignored; see canon_reg. */
77fa0940
RK
4793
4794 apply_change_group ();
4795
7afe21cc
RK
4796 /* Set sets[i].src_elt to the class each source belongs to.
4797 Detect assignments from or to volatile things
4798 and set set[i] to zero so they will be ignored
4799 in the rest of this function.
4800
4801 Nothing in this loop changes the hash table or the register chains. */
4802
4803 for (i = 0; i < n_sets; i++)
4804 {
b3694847
SS
4805 rtx src, dest;
4806 rtx src_folded;
4807 struct table_elt *elt = 0, *p;
7afe21cc
RK
4808 enum machine_mode mode;
4809 rtx src_eqv_here;
4810 rtx src_const = 0;
4811 rtx src_related = 0;
4812 struct table_elt *src_const_elt = 0;
99a9c946
GS
4813 int src_cost = MAX_COST;
4814 int src_eqv_cost = MAX_COST;
4815 int src_folded_cost = MAX_COST;
4816 int src_related_cost = MAX_COST;
4817 int src_elt_cost = MAX_COST;
4818 int src_regcost = MAX_COST;
4819 int src_eqv_regcost = MAX_COST;
4820 int src_folded_regcost = MAX_COST;
4821 int src_related_regcost = MAX_COST;
4822 int src_elt_regcost = MAX_COST;
da7d8304 4823 /* Set nonzero if we need to call force_const_mem on with the
7afe21cc
RK
4824 contents of src_folded before using it. */
4825 int src_folded_force_flag = 0;
4826
4827 dest = SET_DEST (sets[i].rtl);
4828 src = SET_SRC (sets[i].rtl);
4829
4830 /* If SRC is a constant that has no machine mode,
4831 hash it with the destination's machine mode.
4832 This way we can keep different modes separate. */
4833
4834 mode = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
4835 sets[i].mode = mode;
4836
4837 if (src_eqv)
4838 {
4839 enum machine_mode eqvmode = mode;
4840 if (GET_CODE (dest) == STRICT_LOW_PART)
4841 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
4842 do_not_record = 0;
4843 hash_arg_in_memory = 0;
2197a88a 4844 src_eqv_hash = HASH (src_eqv, eqvmode);
7afe21cc
RK
4845
4846 /* Find the equivalence class for the equivalent expression. */
4847
4848 if (!do_not_record)
2197a88a 4849 src_eqv_elt = lookup (src_eqv, src_eqv_hash, eqvmode);
7afe21cc
RK
4850
4851 src_eqv_volatile = do_not_record;
4852 src_eqv_in_memory = hash_arg_in_memory;
7afe21cc
RK
4853 }
4854
4855 /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
4856 value of the INNER register, not the destination. So it is not
3826a3da 4857 a valid substitution for the source. But save it for later. */
7afe21cc
RK
4858 if (GET_CODE (dest) == STRICT_LOW_PART)
4859 src_eqv_here = 0;
4860 else
4861 src_eqv_here = src_eqv;
4862
4863 /* Simplify and foldable subexpressions in SRC. Then get the fully-
4864 simplified result, which may not necessarily be valid. */
4865 src_folded = fold_rtx (src, insn);
4866
e6a125a0
RK
4867#if 0
4868 /* ??? This caused bad code to be generated for the m68k port with -O2.
4869 Suppose src is (CONST_INT -1), and that after truncation src_folded
4870 is (CONST_INT 3). Suppose src_folded is then used for src_const.
4871 At the end we will add src and src_const to the same equivalence
4872 class. We now have 3 and -1 on the same equivalence class. This
4873 causes later instructions to be mis-optimized. */
7afe21cc
RK
4874 /* If storing a constant in a bitfield, pre-truncate the constant
4875 so we will be able to record it later. */
4876 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
4877 || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT)
4878 {
4879 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
4880
4881 if (GET_CODE (src) == CONST_INT
4882 && GET_CODE (width) == CONST_INT
906c4e36
RK
4883 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
4884 && (INTVAL (src) & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
4885 src_folded
4886 = GEN_INT (INTVAL (src) & (((HOST_WIDE_INT) 1
4887 << INTVAL (width)) - 1));
7afe21cc 4888 }
e6a125a0 4889#endif
7afe21cc
RK
4890
4891 /* Compute SRC's hash code, and also notice if it
4892 should not be recorded at all. In that case,
4893 prevent any further processing of this assignment. */
4894 do_not_record = 0;
4895 hash_arg_in_memory = 0;
7afe21cc
RK
4896
4897 sets[i].src = src;
2197a88a 4898 sets[i].src_hash = HASH (src, mode);
7afe21cc
RK
4899 sets[i].src_volatile = do_not_record;
4900 sets[i].src_in_memory = hash_arg_in_memory;
7afe21cc 4901
50196afa 4902 /* If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is
43e72072
JJ
4903 a pseudo, do not record SRC. Using SRC as a replacement for
4904 anything else will be incorrect in that situation. Note that
4905 this usually occurs only for stack slots, in which case all the
4906 RTL would be referring to SRC, so we don't lose any optimization
4907 opportunities by not having SRC in the hash table. */
50196afa 4908
3c0cb5de 4909 if (MEM_P (src)
43e72072 4910 && find_reg_note (insn, REG_EQUIV, NULL_RTX) != 0
f8cfc6aa 4911 && REG_P (dest)
43e72072 4912 && REGNO (dest) >= FIRST_PSEUDO_REGISTER)
50196afa
RK
4913 sets[i].src_volatile = 1;
4914
0dadecf6
RK
4915#if 0
4916 /* It is no longer clear why we used to do this, but it doesn't
4917 appear to still be needed. So let's try without it since this
4918 code hurts cse'ing widened ops. */
9a5a17f3 4919 /* If source is a paradoxical subreg (such as QI treated as an SI),
7afe21cc
RK
4920 treat it as volatile. It may do the work of an SI in one context
4921 where the extra bits are not being used, but cannot replace an SI
4922 in general. */
4923 if (GET_CODE (src) == SUBREG
4924 && (GET_MODE_SIZE (GET_MODE (src))
4925 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))))
4926 sets[i].src_volatile = 1;
0dadecf6 4927#endif
7afe21cc
RK
4928
4929 /* Locate all possible equivalent forms for SRC. Try to replace
4930 SRC in the insn with each cheaper equivalent.
4931
4932 We have the following types of equivalents: SRC itself, a folded
4933 version, a value given in a REG_EQUAL note, or a value related
4934 to a constant.
4935
4936 Each of these equivalents may be part of an additional class
4937 of equivalents (if more than one is in the table, they must be in
4938 the same class; we check for this).
4939
4940 If the source is volatile, we don't do any table lookups.
4941
4942 We note any constant equivalent for possible later use in a
4943 REG_NOTE. */
4944
4945 if (!sets[i].src_volatile)
2197a88a 4946 elt = lookup (src, sets[i].src_hash, mode);
7afe21cc
RK
4947
4948 sets[i].src_elt = elt;
4949
4950 if (elt && src_eqv_here && src_eqv_elt)
278a83b2
KH
4951 {
4952 if (elt->first_same_value != src_eqv_elt->first_same_value)
7afe21cc
RK
4953 {
4954 /* The REG_EQUAL is indicating that two formerly distinct
4955 classes are now equivalent. So merge them. */
4956 merge_equiv_classes (elt, src_eqv_elt);
2197a88a
RK
4957 src_eqv_hash = HASH (src_eqv, elt->mode);
4958 src_eqv_elt = lookup (src_eqv, src_eqv_hash, elt->mode);
7afe21cc
RK
4959 }
4960
278a83b2
KH
4961 src_eqv_here = 0;
4962 }
7afe21cc
RK
4963
4964 else if (src_eqv_elt)
278a83b2 4965 elt = src_eqv_elt;
7afe21cc
RK
4966
4967 /* Try to find a constant somewhere and record it in `src_const'.
4968 Record its table element, if any, in `src_const_elt'. Look in
4969 any known equivalences first. (If the constant is not in the
2197a88a 4970 table, also set `sets[i].src_const_hash'). */
7afe21cc 4971 if (elt)
278a83b2 4972 for (p = elt->first_same_value; p; p = p->next_same_value)
7afe21cc
RK
4973 if (p->is_const)
4974 {
4975 src_const = p->exp;
4976 src_const_elt = elt;
4977 break;
4978 }
4979
4980 if (src_const == 0
4981 && (CONSTANT_P (src_folded)
278a83b2 4982 /* Consider (minus (label_ref L1) (label_ref L2)) as
7afe21cc
RK
4983 "constant" here so we will record it. This allows us
4984 to fold switch statements when an ADDR_DIFF_VEC is used. */
4985 || (GET_CODE (src_folded) == MINUS
4986 && GET_CODE (XEXP (src_folded, 0)) == LABEL_REF
4987 && GET_CODE (XEXP (src_folded, 1)) == LABEL_REF)))
4988 src_const = src_folded, src_const_elt = elt;
4989 else if (src_const == 0 && src_eqv_here && CONSTANT_P (src_eqv_here))
4990 src_const = src_eqv_here, src_const_elt = src_eqv_elt;
4991
4992 /* If we don't know if the constant is in the table, get its
4993 hash code and look it up. */
4994 if (src_const && src_const_elt == 0)
4995 {
2197a88a
RK
4996 sets[i].src_const_hash = HASH (src_const, mode);
4997 src_const_elt = lookup (src_const, sets[i].src_const_hash, mode);
7afe21cc
RK
4998 }
4999
5000 sets[i].src_const = src_const;
5001 sets[i].src_const_elt = src_const_elt;
5002
5003 /* If the constant and our source are both in the table, mark them as
5004 equivalent. Otherwise, if a constant is in the table but the source
5005 isn't, set ELT to it. */
5006 if (src_const_elt && elt
5007 && src_const_elt->first_same_value != elt->first_same_value)
5008 merge_equiv_classes (elt, src_const_elt);
5009 else if (src_const_elt && elt == 0)
5010 elt = src_const_elt;
5011
5012 /* See if there is a register linearly related to a constant
5013 equivalent of SRC. */
5014 if (src_const
5015 && (GET_CODE (src_const) == CONST
5016 || (src_const_elt && src_const_elt->related_value != 0)))
278a83b2
KH
5017 {
5018 src_related = use_related_value (src_const, src_const_elt);
5019 if (src_related)
5020 {
7afe21cc 5021 struct table_elt *src_related_elt
278a83b2 5022 = lookup (src_related, HASH (src_related, mode), mode);
7afe21cc 5023 if (src_related_elt && elt)
278a83b2 5024 {
7afe21cc
RK
5025 if (elt->first_same_value
5026 != src_related_elt->first_same_value)
278a83b2 5027 /* This can occur when we previously saw a CONST
7afe21cc
RK
5028 involving a SYMBOL_REF and then see the SYMBOL_REF
5029 twice. Merge the involved classes. */
5030 merge_equiv_classes (elt, src_related_elt);
5031
278a83b2 5032 src_related = 0;
7afe21cc 5033 src_related_elt = 0;
278a83b2
KH
5034 }
5035 else if (src_related_elt && elt == 0)
5036 elt = src_related_elt;
7afe21cc 5037 }
278a83b2 5038 }
7afe21cc 5039
e4600702
RK
5040 /* See if we have a CONST_INT that is already in a register in a
5041 wider mode. */
5042
5043 if (src_const && src_related == 0 && GET_CODE (src_const) == CONST_INT
5044 && GET_MODE_CLASS (mode) == MODE_INT
5045 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD)
5046 {
5047 enum machine_mode wider_mode;
5048
5049 for (wider_mode = GET_MODE_WIDER_MODE (mode);
5050 GET_MODE_BITSIZE (wider_mode) <= BITS_PER_WORD
5051 && src_related == 0;
5052 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
5053 {
5054 struct table_elt *const_elt
5055 = lookup (src_const, HASH (src_const, wider_mode), wider_mode);
5056
5057 if (const_elt == 0)
5058 continue;
5059
5060 for (const_elt = const_elt->first_same_value;
5061 const_elt; const_elt = const_elt->next_same_value)
f8cfc6aa 5062 if (REG_P (const_elt->exp))
e4600702 5063 {
4de249d9 5064 src_related = gen_lowpart (mode,
e4600702
RK
5065 const_elt->exp);
5066 break;
5067 }
5068 }
5069 }
5070
d45cf215
RS
5071 /* Another possibility is that we have an AND with a constant in
5072 a mode narrower than a word. If so, it might have been generated
5073 as part of an "if" which would narrow the AND. If we already
5074 have done the AND in a wider mode, we can use a SUBREG of that
5075 value. */
5076
5077 if (flag_expensive_optimizations && ! src_related
5078 && GET_CODE (src) == AND && GET_CODE (XEXP (src, 1)) == CONST_INT
5079 && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
5080 {
5081 enum machine_mode tmode;
38a448ca 5082 rtx new_and = gen_rtx_AND (VOIDmode, NULL_RTX, XEXP (src, 1));
d45cf215
RS
5083
5084 for (tmode = GET_MODE_WIDER_MODE (mode);
5085 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
5086 tmode = GET_MODE_WIDER_MODE (tmode))
5087 {
4de249d9 5088 rtx inner = gen_lowpart (tmode, XEXP (src, 0));
d45cf215
RS
5089 struct table_elt *larger_elt;
5090
5091 if (inner)
5092 {
5093 PUT_MODE (new_and, tmode);
5094 XEXP (new_and, 0) = inner;
5095 larger_elt = lookup (new_and, HASH (new_and, tmode), tmode);
5096 if (larger_elt == 0)
5097 continue;
5098
5099 for (larger_elt = larger_elt->first_same_value;
5100 larger_elt; larger_elt = larger_elt->next_same_value)
f8cfc6aa 5101 if (REG_P (larger_elt->exp))
d45cf215
RS
5102 {
5103 src_related
4de249d9 5104 = gen_lowpart (mode, larger_elt->exp);
d45cf215
RS
5105 break;
5106 }
5107
5108 if (src_related)
5109 break;
5110 }
5111 }
5112 }
7bac1be0
RK
5113
5114#ifdef LOAD_EXTEND_OP
5115 /* See if a MEM has already been loaded with a widening operation;
5116 if it has, we can use a subreg of that. Many CISC machines
5117 also have such operations, but this is only likely to be
71cc389b 5118 beneficial on these machines. */
278a83b2 5119
ddc356e8 5120 if (flag_expensive_optimizations && src_related == 0
7bac1be0
RK
5121 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD)
5122 && GET_MODE_CLASS (mode) == MODE_INT
3c0cb5de 5123 && MEM_P (src) && ! do_not_record
7bac1be0
RK
5124 && LOAD_EXTEND_OP (mode) != NIL)
5125 {
5126 enum machine_mode tmode;
278a83b2 5127
7bac1be0
RK
5128 /* Set what we are trying to extend and the operation it might
5129 have been extended with. */
5130 PUT_CODE (memory_extend_rtx, LOAD_EXTEND_OP (mode));
5131 XEXP (memory_extend_rtx, 0) = src;
278a83b2 5132
7bac1be0
RK
5133 for (tmode = GET_MODE_WIDER_MODE (mode);
5134 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
5135 tmode = GET_MODE_WIDER_MODE (tmode))
5136 {
5137 struct table_elt *larger_elt;
278a83b2 5138
7bac1be0 5139 PUT_MODE (memory_extend_rtx, tmode);
278a83b2 5140 larger_elt = lookup (memory_extend_rtx,
7bac1be0
RK
5141 HASH (memory_extend_rtx, tmode), tmode);
5142 if (larger_elt == 0)
5143 continue;
278a83b2 5144
7bac1be0
RK
5145 for (larger_elt = larger_elt->first_same_value;
5146 larger_elt; larger_elt = larger_elt->next_same_value)
f8cfc6aa 5147 if (REG_P (larger_elt->exp))
7bac1be0 5148 {
4de249d9 5149 src_related = gen_lowpart (mode,
7bac1be0
RK
5150 larger_elt->exp);
5151 break;
5152 }
278a83b2 5153
7bac1be0
RK
5154 if (src_related)
5155 break;
5156 }
5157 }
5158#endif /* LOAD_EXTEND_OP */
278a83b2 5159
7afe21cc 5160 if (src == src_folded)
278a83b2 5161 src_folded = 0;
7afe21cc 5162
da7d8304 5163 /* At this point, ELT, if nonzero, points to a class of expressions
7afe21cc 5164 equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
da7d8304 5165 and SRC_RELATED, if nonzero, each contain additional equivalent
7afe21cc
RK
5166 expressions. Prune these latter expressions by deleting expressions
5167 already in the equivalence class.
5168
5169 Check for an equivalent identical to the destination. If found,
5170 this is the preferred equivalent since it will likely lead to
5171 elimination of the insn. Indicate this by placing it in
5172 `src_related'. */
5173
278a83b2
KH
5174 if (elt)
5175 elt = elt->first_same_value;
7afe21cc 5176 for (p = elt; p; p = p->next_same_value)
278a83b2 5177 {
7afe21cc
RK
5178 enum rtx_code code = GET_CODE (p->exp);
5179
5180 /* If the expression is not valid, ignore it. Then we do not
5181 have to check for validity below. In most cases, we can use
5182 `rtx_equal_p', since canonicalization has already been done. */
5183 if (code != REG && ! exp_equiv_p (p->exp, p->exp, 1, 0))
5184 continue;
5185
5a03c8c4
RK
5186 /* Also skip paradoxical subregs, unless that's what we're
5187 looking for. */
5188 if (code == SUBREG
5189 && (GET_MODE_SIZE (GET_MODE (p->exp))
5190 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))
5191 && ! (src != 0
5192 && GET_CODE (src) == SUBREG
5193 && GET_MODE (src) == GET_MODE (p->exp)
5194 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
5195 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))))
5196 continue;
5197
278a83b2 5198 if (src && GET_CODE (src) == code && rtx_equal_p (src, p->exp))
7afe21cc 5199 src = 0;
278a83b2 5200 else if (src_folded && GET_CODE (src_folded) == code
7afe21cc
RK
5201 && rtx_equal_p (src_folded, p->exp))
5202 src_folded = 0;
278a83b2 5203 else if (src_eqv_here && GET_CODE (src_eqv_here) == code
7afe21cc
RK
5204 && rtx_equal_p (src_eqv_here, p->exp))
5205 src_eqv_here = 0;
278a83b2 5206 else if (src_related && GET_CODE (src_related) == code
7afe21cc
RK
5207 && rtx_equal_p (src_related, p->exp))
5208 src_related = 0;
5209
5210 /* This is the same as the destination of the insns, we want
5211 to prefer it. Copy it to src_related. The code below will
5212 then give it a negative cost. */
5213 if (GET_CODE (dest) == code && rtx_equal_p (p->exp, dest))
5214 src_related = dest;
278a83b2 5215 }
7afe21cc
RK
5216
5217 /* Find the cheapest valid equivalent, trying all the available
5218 possibilities. Prefer items not in the hash table to ones
5219 that are when they are equal cost. Note that we can never
5220 worsen an insn as the current contents will also succeed.
05c33dd8 5221 If we find an equivalent identical to the destination, use it as best,
0f41302f 5222 since this insn will probably be eliminated in that case. */
7afe21cc
RK
5223 if (src)
5224 {
5225 if (rtx_equal_p (src, dest))
f1c1dfc3 5226 src_cost = src_regcost = -1;
7afe21cc 5227 else
630c79be
BS
5228 {
5229 src_cost = COST (src);
5230 src_regcost = approx_reg_cost (src);
5231 }
7afe21cc
RK
5232 }
5233
5234 if (src_eqv_here)
5235 {
5236 if (rtx_equal_p (src_eqv_here, dest))
f1c1dfc3 5237 src_eqv_cost = src_eqv_regcost = -1;
7afe21cc 5238 else
630c79be
BS
5239 {
5240 src_eqv_cost = COST (src_eqv_here);
5241 src_eqv_regcost = approx_reg_cost (src_eqv_here);
5242 }
7afe21cc
RK
5243 }
5244
5245 if (src_folded)
5246 {
5247 if (rtx_equal_p (src_folded, dest))
f1c1dfc3 5248 src_folded_cost = src_folded_regcost = -1;
7afe21cc 5249 else
630c79be
BS
5250 {
5251 src_folded_cost = COST (src_folded);
5252 src_folded_regcost = approx_reg_cost (src_folded);
5253 }
7afe21cc
RK
5254 }
5255
5256 if (src_related)
5257 {
5258 if (rtx_equal_p (src_related, dest))
f1c1dfc3 5259 src_related_cost = src_related_regcost = -1;
7afe21cc 5260 else
630c79be
BS
5261 {
5262 src_related_cost = COST (src_related);
5263 src_related_regcost = approx_reg_cost (src_related);
5264 }
7afe21cc
RK
5265 }
5266
5267 /* If this was an indirect jump insn, a known label will really be
5268 cheaper even though it looks more expensive. */
5269 if (dest == pc_rtx && src_const && GET_CODE (src_const) == LABEL_REF)
99a9c946 5270 src_folded = src_const, src_folded_cost = src_folded_regcost = -1;
278a83b2 5271
7afe21cc
RK
5272 /* Terminate loop when replacement made. This must terminate since
5273 the current contents will be tested and will always be valid. */
5274 while (1)
278a83b2
KH
5275 {
5276 rtx trial;
7afe21cc 5277
278a83b2 5278 /* Skip invalid entries. */
f8cfc6aa 5279 while (elt && !REG_P (elt->exp)
278a83b2
KH
5280 && ! exp_equiv_p (elt->exp, elt->exp, 1, 0))
5281 elt = elt->next_same_value;
5a03c8c4
RK
5282
5283 /* A paradoxical subreg would be bad here: it'll be the right
5284 size, but later may be adjusted so that the upper bits aren't
5285 what we want. So reject it. */
5286 if (elt != 0
5287 && GET_CODE (elt->exp) == SUBREG
5288 && (GET_MODE_SIZE (GET_MODE (elt->exp))
5289 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))
5290 /* It is okay, though, if the rtx we're trying to match
5291 will ignore any of the bits we can't predict. */
5292 && ! (src != 0
5293 && GET_CODE (src) == SUBREG
5294 && GET_MODE (src) == GET_MODE (elt->exp)
5295 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
5296 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))))
5297 {
5298 elt = elt->next_same_value;
5299 continue;
5300 }
278a83b2 5301
68252e27 5302 if (elt)
630c79be
BS
5303 {
5304 src_elt_cost = elt->cost;
5305 src_elt_regcost = elt->regcost;
5306 }
7afe21cc 5307
68252e27 5308 /* Find cheapest and skip it for the next time. For items
7afe21cc
RK
5309 of equal cost, use this order:
5310 src_folded, src, src_eqv, src_related and hash table entry. */
99a9c946 5311 if (src_folded
56ae04af
KH
5312 && preferable (src_folded_cost, src_folded_regcost,
5313 src_cost, src_regcost) <= 0
5314 && preferable (src_folded_cost, src_folded_regcost,
5315 src_eqv_cost, src_eqv_regcost) <= 0
5316 && preferable (src_folded_cost, src_folded_regcost,
5317 src_related_cost, src_related_regcost) <= 0
5318 && preferable (src_folded_cost, src_folded_regcost,
5319 src_elt_cost, src_elt_regcost) <= 0)
7afe21cc 5320 {
f1c1dfc3 5321 trial = src_folded, src_folded_cost = MAX_COST;
7afe21cc 5322 if (src_folded_force_flag)
9d8de1de
EB
5323 {
5324 rtx forced = force_const_mem (mode, trial);
5325 if (forced)
5326 trial = forced;
5327 }
7afe21cc 5328 }
99a9c946 5329 else if (src
56ae04af
KH
5330 && preferable (src_cost, src_regcost,
5331 src_eqv_cost, src_eqv_regcost) <= 0
5332 && preferable (src_cost, src_regcost,
5333 src_related_cost, src_related_regcost) <= 0
5334 && preferable (src_cost, src_regcost,
5335 src_elt_cost, src_elt_regcost) <= 0)
f1c1dfc3 5336 trial = src, src_cost = MAX_COST;
99a9c946 5337 else if (src_eqv_here
56ae04af
KH
5338 && preferable (src_eqv_cost, src_eqv_regcost,
5339 src_related_cost, src_related_regcost) <= 0
5340 && preferable (src_eqv_cost, src_eqv_regcost,
5341 src_elt_cost, src_elt_regcost) <= 0)
f1c1dfc3 5342 trial = copy_rtx (src_eqv_here), src_eqv_cost = MAX_COST;
99a9c946 5343 else if (src_related
56ae04af
KH
5344 && preferable (src_related_cost, src_related_regcost,
5345 src_elt_cost, src_elt_regcost) <= 0)
68252e27 5346 trial = copy_rtx (src_related), src_related_cost = MAX_COST;
278a83b2 5347 else
7afe21cc 5348 {
05c33dd8 5349 trial = copy_rtx (elt->exp);
7afe21cc 5350 elt = elt->next_same_value;
f1c1dfc3 5351 src_elt_cost = MAX_COST;
7afe21cc
RK
5352 }
5353
5354 /* We don't normally have an insn matching (set (pc) (pc)), so
5355 check for this separately here. We will delete such an
5356 insn below.
5357
d466c016
JL
5358 For other cases such as a table jump or conditional jump
5359 where we know the ultimate target, go ahead and replace the
5360 operand. While that may not make a valid insn, we will
5361 reemit the jump below (and also insert any necessary
5362 barriers). */
7afe21cc
RK
5363 if (n_sets == 1 && dest == pc_rtx
5364 && (trial == pc_rtx
5365 || (GET_CODE (trial) == LABEL_REF
5366 && ! condjump_p (insn))))
5367 {
d466c016 5368 SET_SRC (sets[i].rtl) = trial;
602c4c0d 5369 cse_jumps_altered = 1;
7afe21cc
RK
5370 break;
5371 }
278a83b2 5372
7afe21cc 5373 /* Look for a substitution that makes a valid insn. */
ddc356e8 5374 else if (validate_change (insn, &SET_SRC (sets[i].rtl), trial, 0))
05c33dd8 5375 {
dbaff908
RS
5376 rtx new = canon_reg (SET_SRC (sets[i].rtl), insn);
5377
7bd8b2a8
JL
5378 /* If we just made a substitution inside a libcall, then we
5379 need to make the same substitution in any notes attached
5380 to the RETVAL insn. */
1ed0205e 5381 if (libcall_insn
f8cfc6aa 5382 && (REG_P (sets[i].orig_src)
47841d1b 5383 || GET_CODE (sets[i].orig_src) == SUBREG
3c0cb5de 5384 || MEM_P (sets[i].orig_src)))
d8b7ec41
RS
5385 {
5386 rtx note = find_reg_equal_equiv_note (libcall_insn);
5387 if (note != 0)
5388 XEXP (note, 0) = simplify_replace_rtx (XEXP (note, 0),
5389 sets[i].orig_src,
5390 copy_rtx (new));
5391 }
7bd8b2a8 5392
7722328e
RK
5393 /* The result of apply_change_group can be ignored; see
5394 canon_reg. */
5395
dbaff908 5396 validate_change (insn, &SET_SRC (sets[i].rtl), new, 1);
6702af89 5397 apply_change_group ();
05c33dd8
RK
5398 break;
5399 }
7afe21cc 5400
278a83b2 5401 /* If we previously found constant pool entries for
7afe21cc
RK
5402 constants and this is a constant, try making a
5403 pool entry. Put it in src_folded unless we already have done
5404 this since that is where it likely came from. */
5405
5406 else if (constant_pool_entries_cost
5407 && CONSTANT_P (trial)
d51ff7cb
JW
5408 /* Reject cases that will abort in decode_rtx_const.
5409 On the alpha when simplifying a switch, we get
5410 (const (truncate (minus (label_ref) (label_ref)))). */
1bbd065b
RK
5411 && ! (GET_CODE (trial) == CONST
5412 && GET_CODE (XEXP (trial, 0)) == TRUNCATE)
d51ff7cb
JW
5413 /* Likewise on IA-64, except without the truncate. */
5414 && ! (GET_CODE (trial) == CONST
5415 && GET_CODE (XEXP (trial, 0)) == MINUS
5416 && GET_CODE (XEXP (XEXP (trial, 0), 0)) == LABEL_REF
5417 && GET_CODE (XEXP (XEXP (trial, 0), 1)) == LABEL_REF)
1bbd065b 5418 && (src_folded == 0
3c0cb5de 5419 || (!MEM_P (src_folded)
1bbd065b 5420 && ! src_folded_force_flag))
9ae8ffe7
JL
5421 && GET_MODE_CLASS (mode) != MODE_CC
5422 && mode != VOIDmode)
7afe21cc
RK
5423 {
5424 src_folded_force_flag = 1;
5425 src_folded = trial;
5426 src_folded_cost = constant_pool_entries_cost;
dd0ba281 5427 src_folded_regcost = constant_pool_entries_regcost;
7afe21cc 5428 }
278a83b2 5429 }
7afe21cc
RK
5430
5431 src = SET_SRC (sets[i].rtl);
5432
5433 /* In general, it is good to have a SET with SET_SRC == SET_DEST.
5434 However, there is an important exception: If both are registers
5435 that are not the head of their equivalence class, replace SET_SRC
5436 with the head of the class. If we do not do this, we will have
5437 both registers live over a portion of the basic block. This way,
5438 their lifetimes will likely abut instead of overlapping. */
f8cfc6aa 5439 if (REG_P (dest)
1bb98cec 5440 && REGNO_QTY_VALID_P (REGNO (dest)))
7afe21cc 5441 {
1bb98cec
DM
5442 int dest_q = REG_QTY (REGNO (dest));
5443 struct qty_table_elem *dest_ent = &qty_table[dest_q];
5444
5445 if (dest_ent->mode == GET_MODE (dest)
5446 && dest_ent->first_reg != REGNO (dest)
f8cfc6aa 5447 && REG_P (src) && REGNO (src) == REGNO (dest)
1bb98cec
DM
5448 /* Don't do this if the original insn had a hard reg as
5449 SET_SRC or SET_DEST. */
f8cfc6aa 5450 && (!REG_P (sets[i].src)
1bb98cec 5451 || REGNO (sets[i].src) >= FIRST_PSEUDO_REGISTER)
f8cfc6aa 5452 && (!REG_P (dest) || REGNO (dest) >= FIRST_PSEUDO_REGISTER))
1bb98cec
DM
5453 /* We can't call canon_reg here because it won't do anything if
5454 SRC is a hard register. */
759bd8b7 5455 {
1bb98cec
DM
5456 int src_q = REG_QTY (REGNO (src));
5457 struct qty_table_elem *src_ent = &qty_table[src_q];
5458 int first = src_ent->first_reg;
5459 rtx new_src
5460 = (first >= FIRST_PSEUDO_REGISTER
5461 ? regno_reg_rtx[first] : gen_rtx_REG (GET_MODE (src), first));
5462
5463 /* We must use validate-change even for this, because this
5464 might be a special no-op instruction, suitable only to
5465 tag notes onto. */
5466 if (validate_change (insn, &SET_SRC (sets[i].rtl), new_src, 0))
5467 {
5468 src = new_src;
5469 /* If we had a constant that is cheaper than what we are now
5470 setting SRC to, use that constant. We ignored it when we
5471 thought we could make this into a no-op. */
5472 if (src_const && COST (src_const) < COST (src)
278a83b2
KH
5473 && validate_change (insn, &SET_SRC (sets[i].rtl),
5474 src_const, 0))
1bb98cec
DM
5475 src = src_const;
5476 }
759bd8b7 5477 }
7afe21cc
RK
5478 }
5479
5480 /* If we made a change, recompute SRC values. */
5481 if (src != sets[i].src)
278a83b2 5482 {
4eadede7 5483 cse_altered = 1;
278a83b2
KH
5484 do_not_record = 0;
5485 hash_arg_in_memory = 0;
7afe21cc 5486 sets[i].src = src;
278a83b2
KH
5487 sets[i].src_hash = HASH (src, mode);
5488 sets[i].src_volatile = do_not_record;
5489 sets[i].src_in_memory = hash_arg_in_memory;
5490 sets[i].src_elt = lookup (src, sets[i].src_hash, mode);
5491 }
7afe21cc
RK
5492
5493 /* If this is a single SET, we are setting a register, and we have an
5494 equivalent constant, we want to add a REG_NOTE. We don't want
5495 to write a REG_EQUAL note for a constant pseudo since verifying that
d45cf215 5496 that pseudo hasn't been eliminated is a pain. Such a note also
278a83b2 5497 won't help anything.
ac7ef8d5
FS
5498
5499 Avoid a REG_EQUAL note for (CONST (MINUS (LABEL_REF) (LABEL_REF)))
5500 which can be created for a reference to a compile time computable
5501 entry in a jump table. */
5502
f8cfc6aa
JQ
5503 if (n_sets == 1 && src_const && REG_P (dest)
5504 && !REG_P (src_const)
ac7ef8d5
FS
5505 && ! (GET_CODE (src_const) == CONST
5506 && GET_CODE (XEXP (src_const, 0)) == MINUS
5507 && GET_CODE (XEXP (XEXP (src_const, 0), 0)) == LABEL_REF
5508 && GET_CODE (XEXP (XEXP (src_const, 0), 1)) == LABEL_REF))
7afe21cc 5509 {
a77b7e32
RS
5510 /* We only want a REG_EQUAL note if src_const != src. */
5511 if (! rtx_equal_p (src, src_const))
5512 {
5513 /* Make sure that the rtx is not shared. */
5514 src_const = copy_rtx (src_const);
51e2a951 5515
a77b7e32
RS
5516 /* Record the actual constant value in a REG_EQUAL note,
5517 making a new one if one does not already exist. */
5518 set_unique_reg_note (insn, REG_EQUAL, src_const);
5519 }
7afe21cc
RK
5520 }
5521
5522 /* Now deal with the destination. */
5523 do_not_record = 0;
7afe21cc
RK
5524
5525 /* Look within any SIGN_EXTRACT or ZERO_EXTRACT
5526 to the MEM or REG within it. */
5527 while (GET_CODE (dest) == SIGN_EXTRACT
5528 || GET_CODE (dest) == ZERO_EXTRACT
5529 || GET_CODE (dest) == SUBREG
5530 || GET_CODE (dest) == STRICT_LOW_PART)
0339ce7e 5531 dest = XEXP (dest, 0);
7afe21cc
RK
5532
5533 sets[i].inner_dest = dest;
5534
3c0cb5de 5535 if (MEM_P (dest))
7afe21cc 5536 {
9ae8ffe7
JL
5537#ifdef PUSH_ROUNDING
5538 /* Stack pushes invalidate the stack pointer. */
5539 rtx addr = XEXP (dest, 0);
ec8e098d 5540 if (GET_RTX_CLASS (GET_CODE (addr)) == RTX_AUTOINC
9ae8ffe7
JL
5541 && XEXP (addr, 0) == stack_pointer_rtx)
5542 invalidate (stack_pointer_rtx, Pmode);
5543#endif
7afe21cc 5544 dest = fold_rtx (dest, insn);
7afe21cc
RK
5545 }
5546
5547 /* Compute the hash code of the destination now,
5548 before the effects of this instruction are recorded,
5549 since the register values used in the address computation
5550 are those before this instruction. */
2197a88a 5551 sets[i].dest_hash = HASH (dest, mode);
7afe21cc
RK
5552
5553 /* Don't enter a bit-field in the hash table
5554 because the value in it after the store
5555 may not equal what was stored, due to truncation. */
5556
5557 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
5558 || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT)
5559 {
5560 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
5561
5562 if (src_const != 0 && GET_CODE (src_const) == CONST_INT
5563 && GET_CODE (width) == CONST_INT
906c4e36
RK
5564 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
5565 && ! (INTVAL (src_const)
5566 & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
7afe21cc
RK
5567 /* Exception: if the value is constant,
5568 and it won't be truncated, record it. */
5569 ;
5570 else
5571 {
5572 /* This is chosen so that the destination will be invalidated
5573 but no new value will be recorded.
5574 We must invalidate because sometimes constant
5575 values can be recorded for bitfields. */
5576 sets[i].src_elt = 0;
5577 sets[i].src_volatile = 1;
5578 src_eqv = 0;
5579 src_eqv_elt = 0;
5580 }
5581 }
5582
5583 /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
5584 the insn. */
5585 else if (n_sets == 1 && dest == pc_rtx && src == pc_rtx)
5586 {
ef178af3 5587 /* One less use of the label this insn used to jump to. */
49ce134f 5588 delete_insn (insn);
7afe21cc 5589 cse_jumps_altered = 1;
7afe21cc
RK
5590 /* No more processing for this set. */
5591 sets[i].rtl = 0;
5592 }
5593
5594 /* If this SET is now setting PC to a label, we know it used to
d466c016 5595 be a conditional or computed branch. */
7afe21cc
RK
5596 else if (dest == pc_rtx && GET_CODE (src) == LABEL_REF)
5597 {
8fb1e50e
GS
5598 /* Now emit a BARRIER after the unconditional jump. */
5599 if (NEXT_INSN (insn) == 0
4b4bf941 5600 || !BARRIER_P (NEXT_INSN (insn)))
8fb1e50e
GS
5601 emit_barrier_after (insn);
5602
d466c016
JL
5603 /* We reemit the jump in as many cases as possible just in
5604 case the form of an unconditional jump is significantly
5605 different than a computed jump or conditional jump.
5606
5607 If this insn has multiple sets, then reemitting the
5608 jump is nontrivial. So instead we just force rerecognition
5609 and hope for the best. */
5610 if (n_sets == 1)
7afe21cc 5611 {
9dcb4381 5612 rtx new, note;
8fb1e50e 5613
9dcb4381 5614 new = emit_jump_insn_after (gen_jump (XEXP (src, 0)), insn);
7afe21cc
RK
5615 JUMP_LABEL (new) = XEXP (src, 0);
5616 LABEL_NUSES (XEXP (src, 0))++;
9dcb4381
RH
5617
5618 /* Make sure to copy over REG_NON_LOCAL_GOTO. */
5619 note = find_reg_note (insn, REG_NON_LOCAL_GOTO, 0);
5620 if (note)
5621 {
5622 XEXP (note, 1) = NULL_RTX;
5623 REG_NOTES (new) = note;
5624 }
5625
38c1593d 5626 delete_insn (insn);
7afe21cc 5627 insn = new;
8fb1e50e
GS
5628
5629 /* Now emit a BARRIER after the unconditional jump. */
5630 if (NEXT_INSN (insn) == 0
4b4bf941 5631 || !BARRIER_P (NEXT_INSN (insn)))
8fb1e50e 5632 emit_barrier_after (insn);
7afe21cc 5633 }
31dcf83f 5634 else
31dcf83f 5635 INSN_CODE (insn) = -1;
7afe21cc 5636
8fb1e50e
GS
5637 /* Do not bother deleting any unreachable code,
5638 let jump/flow do that. */
7afe21cc
RK
5639
5640 cse_jumps_altered = 1;
5641 sets[i].rtl = 0;
5642 }
5643
c2a47e48
RK
5644 /* If destination is volatile, invalidate it and then do no further
5645 processing for this assignment. */
7afe21cc
RK
5646
5647 else if (do_not_record)
c2a47e48 5648 {
f8cfc6aa 5649 if (REG_P (dest) || GET_CODE (dest) == SUBREG)
bb4034b3 5650 invalidate (dest, VOIDmode);
3c0cb5de 5651 else if (MEM_P (dest))
bb07060a
JW
5652 {
5653 /* Outgoing arguments for a libcall don't
5654 affect any recorded expressions. */
5655 if (! libcall_insn || insn == libcall_insn)
5656 invalidate (dest, VOIDmode);
5657 }
2708da92
RS
5658 else if (GET_CODE (dest) == STRICT_LOW_PART
5659 || GET_CODE (dest) == ZERO_EXTRACT)
bb4034b3 5660 invalidate (XEXP (dest, 0), GET_MODE (dest));
c2a47e48
RK
5661 sets[i].rtl = 0;
5662 }
7afe21cc
RK
5663
5664 if (sets[i].rtl != 0 && dest != SET_DEST (sets[i].rtl))
2197a88a 5665 sets[i].dest_hash = HASH (SET_DEST (sets[i].rtl), mode);
7afe21cc
RK
5666
5667#ifdef HAVE_cc0
5668 /* If setting CC0, record what it was set to, or a constant, if it
5669 is equivalent to a constant. If it is being set to a floating-point
5670 value, make a COMPARE with the appropriate constant of 0. If we
5671 don't do this, later code can interpret this as a test against
5672 const0_rtx, which can cause problems if we try to put it into an
5673 insn as a floating-point operand. */
5674 if (dest == cc0_rtx)
5675 {
5676 this_insn_cc0 = src_const && mode != VOIDmode ? src_const : src;
5677 this_insn_cc0_mode = mode;
cbf6a543 5678 if (FLOAT_MODE_P (mode))
38a448ca
RH
5679 this_insn_cc0 = gen_rtx_COMPARE (VOIDmode, this_insn_cc0,
5680 CONST0_RTX (mode));
7afe21cc
RK
5681 }
5682#endif
5683 }
5684
5685 /* Now enter all non-volatile source expressions in the hash table
5686 if they are not already present.
5687 Record their equivalence classes in src_elt.
5688 This way we can insert the corresponding destinations into
5689 the same classes even if the actual sources are no longer in them
5690 (having been invalidated). */
5691
5692 if (src_eqv && src_eqv_elt == 0 && sets[0].rtl != 0 && ! src_eqv_volatile
5693 && ! rtx_equal_p (src_eqv, SET_DEST (sets[0].rtl)))
5694 {
b3694847
SS
5695 struct table_elt *elt;
5696 struct table_elt *classp = sets[0].src_elt;
7afe21cc
RK
5697 rtx dest = SET_DEST (sets[0].rtl);
5698 enum machine_mode eqvmode = GET_MODE (dest);
5699
5700 if (GET_CODE (dest) == STRICT_LOW_PART)
5701 {
5702 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
5703 classp = 0;
5704 }
5705 if (insert_regs (src_eqv, classp, 0))
8ae2b8f6
JW
5706 {
5707 rehash_using_reg (src_eqv);
5708 src_eqv_hash = HASH (src_eqv, eqvmode);
5709 }
2197a88a 5710 elt = insert (src_eqv, classp, src_eqv_hash, eqvmode);
7afe21cc 5711 elt->in_memory = src_eqv_in_memory;
7afe21cc 5712 src_eqv_elt = elt;
f7911249
JW
5713
5714 /* Check to see if src_eqv_elt is the same as a set source which
5715 does not yet have an elt, and if so set the elt of the set source
5716 to src_eqv_elt. */
5717 for (i = 0; i < n_sets; i++)
26132f71
JW
5718 if (sets[i].rtl && sets[i].src_elt == 0
5719 && rtx_equal_p (SET_SRC (sets[i].rtl), src_eqv))
f7911249 5720 sets[i].src_elt = src_eqv_elt;
7afe21cc
RK
5721 }
5722
5723 for (i = 0; i < n_sets; i++)
5724 if (sets[i].rtl && ! sets[i].src_volatile
5725 && ! rtx_equal_p (SET_SRC (sets[i].rtl), SET_DEST (sets[i].rtl)))
5726 {
5727 if (GET_CODE (SET_DEST (sets[i].rtl)) == STRICT_LOW_PART)
5728 {
5729 /* REG_EQUAL in setting a STRICT_LOW_PART
5730 gives an equivalent for the entire destination register,
5731 not just for the subreg being stored in now.
5732 This is a more interesting equivalence, so we arrange later
5733 to treat the entire reg as the destination. */
5734 sets[i].src_elt = src_eqv_elt;
2197a88a 5735 sets[i].src_hash = src_eqv_hash;
7afe21cc
RK
5736 }
5737 else
5738 {
5739 /* Insert source and constant equivalent into hash table, if not
5740 already present. */
b3694847
SS
5741 struct table_elt *classp = src_eqv_elt;
5742 rtx src = sets[i].src;
5743 rtx dest = SET_DEST (sets[i].rtl);
7afe21cc
RK
5744 enum machine_mode mode
5745 = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
5746
1fcc57f1
AM
5747 /* It's possible that we have a source value known to be
5748 constant but don't have a REG_EQUAL note on the insn.
5749 Lack of a note will mean src_eqv_elt will be NULL. This
5750 can happen where we've generated a SUBREG to access a
5751 CONST_INT that is already in a register in a wider mode.
5752 Ensure that the source expression is put in the proper
5753 constant class. */
5754 if (!classp)
5755 classp = sets[i].src_const_elt;
5756
26132f71 5757 if (sets[i].src_elt == 0)
7afe21cc 5758 {
26132f71
JW
5759 /* Don't put a hard register source into the table if this is
5760 the last insn of a libcall. In this case, we only need
5761 to put src_eqv_elt in src_elt. */
db4a8254 5762 if (! find_reg_note (insn, REG_RETVAL, NULL_RTX))
8ae2b8f6 5763 {
b3694847 5764 struct table_elt *elt;
26132f71
JW
5765
5766 /* Note that these insert_regs calls cannot remove
5767 any of the src_elt's, because they would have failed to
5768 match if not still valid. */
5769 if (insert_regs (src, classp, 0))
5770 {
5771 rehash_using_reg (src);
5772 sets[i].src_hash = HASH (src, mode);
5773 }
5774 elt = insert (src, classp, sets[i].src_hash, mode);
5775 elt->in_memory = sets[i].src_in_memory;
26132f71 5776 sets[i].src_elt = classp = elt;
8ae2b8f6 5777 }
26132f71
JW
5778 else
5779 sets[i].src_elt = classp;
7afe21cc 5780 }
7afe21cc
RK
5781 if (sets[i].src_const && sets[i].src_const_elt == 0
5782 && src != sets[i].src_const
5783 && ! rtx_equal_p (sets[i].src_const, src))
5784 sets[i].src_elt = insert (sets[i].src_const, classp,
2197a88a 5785 sets[i].src_const_hash, mode);
7afe21cc
RK
5786 }
5787 }
5788 else if (sets[i].src_elt == 0)
5789 /* If we did not insert the source into the hash table (e.g., it was
5790 volatile), note the equivalence class for the REG_EQUAL value, if any,
5791 so that the destination goes into that class. */
5792 sets[i].src_elt = src_eqv_elt;
5793
9ae8ffe7 5794 invalidate_from_clobbers (x);
77fa0940 5795
278a83b2 5796 /* Some registers are invalidated by subroutine calls. Memory is
77fa0940
RK
5797 invalidated by non-constant calls. */
5798
4b4bf941 5799 if (CALL_P (insn))
7afe21cc 5800 {
24a28584 5801 if (! CONST_OR_PURE_CALL_P (insn))
9ae8ffe7 5802 invalidate_memory ();
7afe21cc
RK
5803 invalidate_for_call ();
5804 }
5805
5806 /* Now invalidate everything set by this instruction.
5807 If a SUBREG or other funny destination is being set,
5808 sets[i].rtl is still nonzero, so here we invalidate the reg
5809 a part of which is being set. */
5810
5811 for (i = 0; i < n_sets; i++)
5812 if (sets[i].rtl)
5813 {
bb4034b3
JW
5814 /* We can't use the inner dest, because the mode associated with
5815 a ZERO_EXTRACT is significant. */
b3694847 5816 rtx dest = SET_DEST (sets[i].rtl);
7afe21cc
RK
5817
5818 /* Needed for registers to remove the register from its
5819 previous quantity's chain.
5820 Needed for memory if this is a nonvarying address, unless
5821 we have just done an invalidate_memory that covers even those. */
f8cfc6aa 5822 if (REG_P (dest) || GET_CODE (dest) == SUBREG)
bb4034b3 5823 invalidate (dest, VOIDmode);
3c0cb5de 5824 else if (MEM_P (dest))
bb07060a
JW
5825 {
5826 /* Outgoing arguments for a libcall don't
5827 affect any recorded expressions. */
5828 if (! libcall_insn || insn == libcall_insn)
5829 invalidate (dest, VOIDmode);
5830 }
2708da92
RS
5831 else if (GET_CODE (dest) == STRICT_LOW_PART
5832 || GET_CODE (dest) == ZERO_EXTRACT)
bb4034b3 5833 invalidate (XEXP (dest, 0), GET_MODE (dest));
7afe21cc
RK
5834 }
5835
01e752d3 5836 /* A volatile ASM invalidates everything. */
4b4bf941 5837 if (NONJUMP_INSN_P (insn)
01e752d3
JL
5838 && GET_CODE (PATTERN (insn)) == ASM_OPERANDS
5839 && MEM_VOLATILE_P (PATTERN (insn)))
5840 flush_hash_table ();
5841
7afe21cc
RK
5842 /* Make sure registers mentioned in destinations
5843 are safe for use in an expression to be inserted.
5844 This removes from the hash table
5845 any invalid entry that refers to one of these registers.
5846
5847 We don't care about the return value from mention_regs because
5848 we are going to hash the SET_DEST values unconditionally. */
5849
5850 for (i = 0; i < n_sets; i++)
34c73909
R
5851 {
5852 if (sets[i].rtl)
5853 {
5854 rtx x = SET_DEST (sets[i].rtl);
5855
f8cfc6aa 5856 if (!REG_P (x))
34c73909
R
5857 mention_regs (x);
5858 else
5859 {
5860 /* We used to rely on all references to a register becoming
5861 inaccessible when a register changes to a new quantity,
5862 since that changes the hash code. However, that is not
9b1549b8 5863 safe, since after HASH_SIZE new quantities we get a
34c73909
R
5864 hash 'collision' of a register with its own invalid
5865 entries. And since SUBREGs have been changed not to
5866 change their hash code with the hash code of the register,
5867 it wouldn't work any longer at all. So we have to check
5868 for any invalid references lying around now.
5869 This code is similar to the REG case in mention_regs,
5870 but it knows that reg_tick has been incremented, and
5871 it leaves reg_in_table as -1 . */
770ae6cc
RK
5872 unsigned int regno = REGNO (x);
5873 unsigned int endregno
34c73909 5874 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
66fd46b6 5875 : hard_regno_nregs[regno][GET_MODE (x)]);
770ae6cc 5876 unsigned int i;
34c73909
R
5877
5878 for (i = regno; i < endregno; i++)
5879 {
30f72379 5880 if (REG_IN_TABLE (i) >= 0)
34c73909
R
5881 {
5882 remove_invalid_refs (i);
30f72379 5883 REG_IN_TABLE (i) = -1;
34c73909
R
5884 }
5885 }
5886 }
5887 }
5888 }
7afe21cc
RK
5889
5890 /* We may have just removed some of the src_elt's from the hash table.
5891 So replace each one with the current head of the same class. */
5892
5893 for (i = 0; i < n_sets; i++)
5894 if (sets[i].rtl)
5895 {
5896 if (sets[i].src_elt && sets[i].src_elt->first_same_value == 0)
5897 /* If elt was removed, find current head of same class,
5898 or 0 if nothing remains of that class. */
5899 {
b3694847 5900 struct table_elt *elt = sets[i].src_elt;
7afe21cc
RK
5901
5902 while (elt && elt->prev_same_value)
5903 elt = elt->prev_same_value;
5904
5905 while (elt && elt->first_same_value == 0)
5906 elt = elt->next_same_value;
5907 sets[i].src_elt = elt ? elt->first_same_value : 0;
5908 }
5909 }
5910
5911 /* Now insert the destinations into their equivalence classes. */
5912
5913 for (i = 0; i < n_sets; i++)
5914 if (sets[i].rtl)
5915 {
b3694847 5916 rtx dest = SET_DEST (sets[i].rtl);
b3694847 5917 struct table_elt *elt;
7afe21cc
RK
5918
5919 /* Don't record value if we are not supposed to risk allocating
5920 floating-point values in registers that might be wider than
5921 memory. */
5922 if ((flag_float_store
3c0cb5de 5923 && MEM_P (dest)
cbf6a543 5924 && FLOAT_MODE_P (GET_MODE (dest)))
bc4ddc77
JW
5925 /* Don't record BLKmode values, because we don't know the
5926 size of it, and can't be sure that other BLKmode values
5927 have the same or smaller size. */
5928 || GET_MODE (dest) == BLKmode
7afe21cc
RK
5929 /* Don't record values of destinations set inside a libcall block
5930 since we might delete the libcall. Things should have been set
5931 up so we won't want to reuse such a value, but we play it safe
5932 here. */
7bd8b2a8 5933 || libcall_insn
7afe21cc
RK
5934 /* If we didn't put a REG_EQUAL value or a source into the hash
5935 table, there is no point is recording DEST. */
1a8e9a8e
RK
5936 || sets[i].src_elt == 0
5937 /* If DEST is a paradoxical SUBREG and SRC is a ZERO_EXTEND
5938 or SIGN_EXTEND, don't record DEST since it can cause
5939 some tracking to be wrong.
5940
5941 ??? Think about this more later. */
5942 || (GET_CODE (dest) == SUBREG
5943 && (GET_MODE_SIZE (GET_MODE (dest))
5944 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
5945 && (GET_CODE (sets[i].src) == SIGN_EXTEND
5946 || GET_CODE (sets[i].src) == ZERO_EXTEND)))
7afe21cc
RK
5947 continue;
5948
5949 /* STRICT_LOW_PART isn't part of the value BEING set,
5950 and neither is the SUBREG inside it.
5951 Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
5952 if (GET_CODE (dest) == STRICT_LOW_PART)
5953 dest = SUBREG_REG (XEXP (dest, 0));
5954
f8cfc6aa 5955 if (REG_P (dest) || GET_CODE (dest) == SUBREG)
7afe21cc
RK
5956 /* Registers must also be inserted into chains for quantities. */
5957 if (insert_regs (dest, sets[i].src_elt, 1))
8ae2b8f6
JW
5958 {
5959 /* If `insert_regs' changes something, the hash code must be
5960 recalculated. */
5961 rehash_using_reg (dest);
5962 sets[i].dest_hash = HASH (dest, GET_MODE (dest));
5963 }
7afe21cc 5964
8fff4fc1
RH
5965 elt = insert (dest, sets[i].src_elt,
5966 sets[i].dest_hash, GET_MODE (dest));
9de2c71a 5967
3c0cb5de 5968 elt->in_memory = (MEM_P (sets[i].inner_dest)
9ad91d71 5969 && (! RTX_UNCHANGING_P (sets[i].inner_dest)
4977bab6 5970 || fixed_base_plus_p (XEXP (sets[i].inner_dest,
9ad91d71 5971 0))));
c256df0b 5972
fc3ffe83
RK
5973 /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
5974 narrower than M2, and both M1 and M2 are the same number of words,
5975 we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
5976 make that equivalence as well.
7afe21cc 5977
4de249d9
PB
5978 However, BAR may have equivalences for which gen_lowpart
5979 will produce a simpler value than gen_lowpart applied to
7afe21cc 5980 BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
278a83b2 5981 BAR's equivalences. If we don't get a simplified form, make
7afe21cc
RK
5982 the SUBREG. It will not be used in an equivalence, but will
5983 cause two similar assignments to be detected.
5984
5985 Note the loop below will find SUBREG_REG (DEST) since we have
5986 already entered SRC and DEST of the SET in the table. */
5987
5988 if (GET_CODE (dest) == SUBREG
6cdbaec4
RK
5989 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) - 1)
5990 / UNITS_PER_WORD)
278a83b2 5991 == (GET_MODE_SIZE (GET_MODE (dest)) - 1) / UNITS_PER_WORD)
7afe21cc
RK
5992 && (GET_MODE_SIZE (GET_MODE (dest))
5993 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
5994 && sets[i].src_elt != 0)
5995 {
5996 enum machine_mode new_mode = GET_MODE (SUBREG_REG (dest));
5997 struct table_elt *elt, *classp = 0;
5998
5999 for (elt = sets[i].src_elt->first_same_value; elt;
6000 elt = elt->next_same_value)
6001 {
6002 rtx new_src = 0;
2197a88a 6003 unsigned src_hash;
7afe21cc 6004 struct table_elt *src_elt;
ff27a429 6005 int byte = 0;
7afe21cc
RK
6006
6007 /* Ignore invalid entries. */
f8cfc6aa 6008 if (!REG_P (elt->exp)
7afe21cc
RK
6009 && ! exp_equiv_p (elt->exp, elt->exp, 1, 0))
6010 continue;
6011
9beb7d20
RH
6012 /* We may have already been playing subreg games. If the
6013 mode is already correct for the destination, use it. */
6014 if (GET_MODE (elt->exp) == new_mode)
6015 new_src = elt->exp;
6016 else
6017 {
6018 /* Calculate big endian correction for the SUBREG_BYTE.
6019 We have already checked that M1 (GET_MODE (dest))
6020 is not narrower than M2 (new_mode). */
6021 if (BYTES_BIG_ENDIAN)
6022 byte = (GET_MODE_SIZE (GET_MODE (dest))
6023 - GET_MODE_SIZE (new_mode));
6024
6025 new_src = simplify_gen_subreg (new_mode, elt->exp,
6026 GET_MODE (dest), byte);
6027 }
6028
ff27a429
R
6029 /* The call to simplify_gen_subreg fails if the value
6030 is VOIDmode, yet we can't do any simplification, e.g.
6031 for EXPR_LISTs denoting function call results.
6032 It is invalid to construct a SUBREG with a VOIDmode
6033 SUBREG_REG, hence a zero new_src means we can't do
6034 this substitution. */
6035 if (! new_src)
6036 continue;
7afe21cc
RK
6037
6038 src_hash = HASH (new_src, new_mode);
6039 src_elt = lookup (new_src, src_hash, new_mode);
6040
6041 /* Put the new source in the hash table is if isn't
6042 already. */
6043 if (src_elt == 0)
6044 {
6045 if (insert_regs (new_src, classp, 0))
8ae2b8f6
JW
6046 {
6047 rehash_using_reg (new_src);
6048 src_hash = HASH (new_src, new_mode);
6049 }
7afe21cc
RK
6050 src_elt = insert (new_src, classp, src_hash, new_mode);
6051 src_elt->in_memory = elt->in_memory;
7afe21cc
RK
6052 }
6053 else if (classp && classp != src_elt->first_same_value)
278a83b2 6054 /* Show that two things that we've seen before are
7afe21cc
RK
6055 actually the same. */
6056 merge_equiv_classes (src_elt, classp);
6057
6058 classp = src_elt->first_same_value;
da932f04
JL
6059 /* Ignore invalid entries. */
6060 while (classp
f8cfc6aa 6061 && !REG_P (classp->exp)
da932f04
JL
6062 && ! exp_equiv_p (classp->exp, classp->exp, 1, 0))
6063 classp = classp->next_same_value;
7afe21cc
RK
6064 }
6065 }
6066 }
6067
403e25d0
RK
6068 /* Special handling for (set REG0 REG1) where REG0 is the
6069 "cheapest", cheaper than REG1. After cse, REG1 will probably not
6070 be used in the sequel, so (if easily done) change this insn to
6071 (set REG1 REG0) and replace REG1 with REG0 in the previous insn
6072 that computed their value. Then REG1 will become a dead store
6073 and won't cloud the situation for later optimizations.
7afe21cc
RK
6074
6075 Do not make this change if REG1 is a hard register, because it will
6076 then be used in the sequel and we may be changing a two-operand insn
6077 into a three-operand insn.
6078
50270076
R
6079 Also do not do this if we are operating on a copy of INSN.
6080
6081 Also don't do this if INSN ends a libcall; this would cause an unrelated
6082 register to be set in the middle of a libcall, and we then get bad code
6083 if the libcall is deleted. */
7afe21cc 6084
f8cfc6aa 6085 if (n_sets == 1 && sets[0].rtl && REG_P (SET_DEST (sets[0].rtl))
7afe21cc 6086 && NEXT_INSN (PREV_INSN (insn)) == insn
f8cfc6aa 6087 && REG_P (SET_SRC (sets[0].rtl))
7afe21cc 6088 && REGNO (SET_SRC (sets[0].rtl)) >= FIRST_PSEUDO_REGISTER
1bb98cec 6089 && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets[0].rtl))))
7afe21cc 6090 {
1bb98cec
DM
6091 int src_q = REG_QTY (REGNO (SET_SRC (sets[0].rtl)));
6092 struct qty_table_elem *src_ent = &qty_table[src_q];
7afe21cc 6093
1bb98cec
DM
6094 if ((src_ent->first_reg == REGNO (SET_DEST (sets[0].rtl)))
6095 && ! find_reg_note (insn, REG_RETVAL, NULL_RTX))
7afe21cc 6096 {
3e25353e
AH
6097 rtx prev = insn;
6098 /* Scan for the previous nonnote insn, but stop at a basic
6099 block boundary. */
6100 do
6101 {
6102 prev = PREV_INSN (prev);
6103 }
4b4bf941 6104 while (prev && NOTE_P (prev)
3e25353e 6105 && NOTE_LINE_NUMBER (prev) != NOTE_INSN_BASIC_BLOCK);
7080f735 6106
58ecb5e2
RS
6107 /* Do not swap the registers around if the previous instruction
6108 attaches a REG_EQUIV note to REG1.
6109
6110 ??? It's not entirely clear whether we can transfer a REG_EQUIV
6111 from the pseudo that originally shadowed an incoming argument
6112 to another register. Some uses of REG_EQUIV might rely on it
6113 being attached to REG1 rather than REG2.
6114
6115 This section previously turned the REG_EQUIV into a REG_EQUAL
6116 note. We cannot do that because REG_EQUIV may provide an
4912a07c 6117 uninitialized stack slot when REG_PARM_STACK_SPACE is used. */
58ecb5e2 6118
4b4bf941 6119 if (prev != 0 && NONJUMP_INSN_P (prev)
403e25d0 6120 && GET_CODE (PATTERN (prev)) == SET
58ecb5e2
RS
6121 && SET_DEST (PATTERN (prev)) == SET_SRC (sets[0].rtl)
6122 && ! find_reg_note (prev, REG_EQUIV, NULL_RTX))
1bb98cec
DM
6123 {
6124 rtx dest = SET_DEST (sets[0].rtl);
403e25d0 6125 rtx src = SET_SRC (sets[0].rtl);
58ecb5e2 6126 rtx note;
7afe21cc 6127
278a83b2
KH
6128 validate_change (prev, &SET_DEST (PATTERN (prev)), dest, 1);
6129 validate_change (insn, &SET_DEST (sets[0].rtl), src, 1);
6130 validate_change (insn, &SET_SRC (sets[0].rtl), dest, 1);
1bb98cec 6131 apply_change_group ();
7afe21cc 6132
403e25d0
RK
6133 /* If INSN has a REG_EQUAL note, and this note mentions
6134 REG0, then we must delete it, because the value in
6135 REG0 has changed. If the note's value is REG1, we must
6136 also delete it because that is now this insn's dest. */
1bb98cec 6137 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
403e25d0
RK
6138 if (note != 0
6139 && (reg_mentioned_p (dest, XEXP (note, 0))
6140 || rtx_equal_p (src, XEXP (note, 0))))
1bb98cec
DM
6141 remove_note (insn, note);
6142 }
7afe21cc
RK
6143 }
6144 }
6145
6146 /* If this is a conditional jump insn, record any known equivalences due to
6147 the condition being tested. */
6148
6149 last_jump_equiv_class = 0;
4b4bf941 6150 if (JUMP_P (insn)
7afe21cc
RK
6151 && n_sets == 1 && GET_CODE (x) == SET
6152 && GET_CODE (SET_SRC (x)) == IF_THEN_ELSE)
6153 record_jump_equiv (insn, 0);
6154
6155#ifdef HAVE_cc0
6156 /* If the previous insn set CC0 and this insn no longer references CC0,
6157 delete the previous insn. Here we use the fact that nothing expects CC0
6158 to be valid over an insn, which is true until the final pass. */
4b4bf941 6159 if (prev_insn && NONJUMP_INSN_P (prev_insn)
7afe21cc
RK
6160 && (tem = single_set (prev_insn)) != 0
6161 && SET_DEST (tem) == cc0_rtx
6162 && ! reg_mentioned_p (cc0_rtx, x))
6dee7384 6163 delete_insn (prev_insn);
7afe21cc
RK
6164
6165 prev_insn_cc0 = this_insn_cc0;
6166 prev_insn_cc0_mode = this_insn_cc0_mode;
7afe21cc 6167 prev_insn = insn;
4977bab6 6168#endif
7afe21cc
RK
6169}
6170\f
a4c6502a 6171/* Remove from the hash table all expressions that reference memory. */
14a774a9 6172
7afe21cc 6173static void
7080f735 6174invalidate_memory (void)
7afe21cc 6175{
b3694847
SS
6176 int i;
6177 struct table_elt *p, *next;
7afe21cc 6178
9b1549b8 6179 for (i = 0; i < HASH_SIZE; i++)
9ae8ffe7
JL
6180 for (p = table[i]; p; p = next)
6181 {
6182 next = p->next_same_hash;
6183 if (p->in_memory)
6184 remove_from_table (p, i);
6185 }
6186}
6187
14a774a9
RK
6188/* If ADDR is an address that implicitly affects the stack pointer, return
6189 1 and update the register tables to show the effect. Else, return 0. */
6190
9ae8ffe7 6191static int
7080f735 6192addr_affects_sp_p (rtx addr)
9ae8ffe7 6193{
ec8e098d 6194 if (GET_RTX_CLASS (GET_CODE (addr)) == RTX_AUTOINC
f8cfc6aa 6195 && REG_P (XEXP (addr, 0))
9ae8ffe7 6196 && REGNO (XEXP (addr, 0)) == STACK_POINTER_REGNUM)
7afe21cc 6197 {
30f72379 6198 if (REG_TICK (STACK_POINTER_REGNUM) >= 0)
46081bb3
SH
6199 {
6200 REG_TICK (STACK_POINTER_REGNUM)++;
6201 /* Is it possible to use a subreg of SP? */
6202 SUBREG_TICKED (STACK_POINTER_REGNUM) = -1;
6203 }
9ae8ffe7
JL
6204
6205 /* This should be *very* rare. */
6206 if (TEST_HARD_REG_BIT (hard_regs_in_table, STACK_POINTER_REGNUM))
6207 invalidate (stack_pointer_rtx, VOIDmode);
14a774a9 6208
9ae8ffe7 6209 return 1;
7afe21cc 6210 }
14a774a9 6211
9ae8ffe7 6212 return 0;
7afe21cc
RK
6213}
6214
6215/* Perform invalidation on the basis of everything about an insn
6216 except for invalidating the actual places that are SET in it.
6217 This includes the places CLOBBERed, and anything that might
6218 alias with something that is SET or CLOBBERed.
6219
7afe21cc
RK
6220 X is the pattern of the insn. */
6221
6222static void
7080f735 6223invalidate_from_clobbers (rtx x)
7afe21cc 6224{
7afe21cc
RK
6225 if (GET_CODE (x) == CLOBBER)
6226 {
6227 rtx ref = XEXP (x, 0);
9ae8ffe7
JL
6228 if (ref)
6229 {
f8cfc6aa 6230 if (REG_P (ref) || GET_CODE (ref) == SUBREG
3c0cb5de 6231 || MEM_P (ref))
9ae8ffe7
JL
6232 invalidate (ref, VOIDmode);
6233 else if (GET_CODE (ref) == STRICT_LOW_PART
6234 || GET_CODE (ref) == ZERO_EXTRACT)
6235 invalidate (XEXP (ref, 0), GET_MODE (ref));
6236 }
7afe21cc
RK
6237 }
6238 else if (GET_CODE (x) == PARALLEL)
6239 {
b3694847 6240 int i;
7afe21cc
RK
6241 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
6242 {
b3694847 6243 rtx y = XVECEXP (x, 0, i);
7afe21cc
RK
6244 if (GET_CODE (y) == CLOBBER)
6245 {
6246 rtx ref = XEXP (y, 0);
f8cfc6aa 6247 if (REG_P (ref) || GET_CODE (ref) == SUBREG
3c0cb5de 6248 || MEM_P (ref))
9ae8ffe7
JL
6249 invalidate (ref, VOIDmode);
6250 else if (GET_CODE (ref) == STRICT_LOW_PART
6251 || GET_CODE (ref) == ZERO_EXTRACT)
6252 invalidate (XEXP (ref, 0), GET_MODE (ref));
7afe21cc
RK
6253 }
6254 }
6255 }
6256}
6257\f
6258/* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes
6259 and replace any registers in them with either an equivalent constant
6260 or the canonical form of the register. If we are inside an address,
6261 only do this if the address remains valid.
6262
6263 OBJECT is 0 except when within a MEM in which case it is the MEM.
6264
6265 Return the replacement for X. */
6266
6267static rtx
7080f735 6268cse_process_notes (rtx x, rtx object)
7afe21cc
RK
6269{
6270 enum rtx_code code = GET_CODE (x);
6f7d635c 6271 const char *fmt = GET_RTX_FORMAT (code);
7afe21cc
RK
6272 int i;
6273
6274 switch (code)
6275 {
6276 case CONST_INT:
6277 case CONST:
6278 case SYMBOL_REF:
6279 case LABEL_REF:
6280 case CONST_DOUBLE:
69ef87e2 6281 case CONST_VECTOR:
7afe21cc
RK
6282 case PC:
6283 case CC0:
6284 case LO_SUM:
6285 return x;
6286
6287 case MEM:
c96208fa
DC
6288 validate_change (x, &XEXP (x, 0),
6289 cse_process_notes (XEXP (x, 0), x), 0);
7afe21cc
RK
6290 return x;
6291
6292 case EXPR_LIST:
6293 case INSN_LIST:
6294 if (REG_NOTE_KIND (x) == REG_EQUAL)
906c4e36 6295 XEXP (x, 0) = cse_process_notes (XEXP (x, 0), NULL_RTX);
7afe21cc 6296 if (XEXP (x, 1))
906c4e36 6297 XEXP (x, 1) = cse_process_notes (XEXP (x, 1), NULL_RTX);
7afe21cc
RK
6298 return x;
6299
e4890d45
RS
6300 case SIGN_EXTEND:
6301 case ZERO_EXTEND:
0b0ee36c 6302 case SUBREG:
e4890d45
RS
6303 {
6304 rtx new = cse_process_notes (XEXP (x, 0), object);
6305 /* We don't substitute VOIDmode constants into these rtx,
6306 since they would impede folding. */
6307 if (GET_MODE (new) != VOIDmode)
6308 validate_change (object, &XEXP (x, 0), new, 0);
6309 return x;
6310 }
6311
7afe21cc 6312 case REG:
30f72379 6313 i = REG_QTY (REGNO (x));
7afe21cc
RK
6314
6315 /* Return a constant or a constant register. */
1bb98cec 6316 if (REGNO_QTY_VALID_P (REGNO (x)))
7afe21cc 6317 {
1bb98cec
DM
6318 struct qty_table_elem *ent = &qty_table[i];
6319
6320 if (ent->const_rtx != NULL_RTX
6321 && (CONSTANT_P (ent->const_rtx)
f8cfc6aa 6322 || REG_P (ent->const_rtx)))
1bb98cec 6323 {
4de249d9 6324 rtx new = gen_lowpart (GET_MODE (x), ent->const_rtx);
1bb98cec
DM
6325 if (new)
6326 return new;
6327 }
7afe21cc
RK
6328 }
6329
6330 /* Otherwise, canonicalize this register. */
906c4e36 6331 return canon_reg (x, NULL_RTX);
278a83b2 6332
e9a25f70
JL
6333 default:
6334 break;
7afe21cc
RK
6335 }
6336
6337 for (i = 0; i < GET_RTX_LENGTH (code); i++)
6338 if (fmt[i] == 'e')
6339 validate_change (object, &XEXP (x, i),
7fe34fdf 6340 cse_process_notes (XEXP (x, i), object), 0);
7afe21cc
RK
6341
6342 return x;
6343}
6344\f
6345/* Find common subexpressions between the end test of a loop and the beginning
6346 of the loop. LOOP_START is the CODE_LABEL at the start of a loop.
6347
6348 Often we have a loop where an expression in the exit test is used
6349 in the body of the loop. For example "while (*p) *q++ = *p++;".
6350 Because of the way we duplicate the loop exit test in front of the loop,
6351 however, we don't detect that common subexpression. This will be caught
6352 when global cse is implemented, but this is a quite common case.
6353
6354 This function handles the most common cases of these common expressions.
6355 It is called after we have processed the basic block ending with the
6356 NOTE_INSN_LOOP_END note that ends a loop and the previous JUMP_INSN
6357 jumps to a label used only once. */
6358
6359static void
7080f735 6360cse_around_loop (rtx loop_start)
7afe21cc
RK
6361{
6362 rtx insn;
6363 int i;
6364 struct table_elt *p;
6365
6366 /* If the jump at the end of the loop doesn't go to the start, we don't
6367 do anything. */
6368 for (insn = PREV_INSN (loop_start);
4b4bf941 6369 insn && (NOTE_P (insn) && NOTE_LINE_NUMBER (insn) >= 0);
7afe21cc
RK
6370 insn = PREV_INSN (insn))
6371 ;
6372
6373 if (insn == 0
4b4bf941 6374 || !NOTE_P (insn)
7afe21cc
RK
6375 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG)
6376 return;
6377
6378 /* If the last insn of the loop (the end test) was an NE comparison,
6379 we will interpret it as an EQ comparison, since we fell through
f72aed24 6380 the loop. Any equivalences resulting from that comparison are
7afe21cc
RK
6381 therefore not valid and must be invalidated. */
6382 if (last_jump_equiv_class)
6383 for (p = last_jump_equiv_class->first_same_value; p;
6384 p = p->next_same_value)
51723711 6385 {
f8cfc6aa 6386 if (MEM_P (p->exp) || REG_P (p->exp)
51723711 6387 || (GET_CODE (p->exp) == SUBREG
f8cfc6aa 6388 && REG_P (SUBREG_REG (p->exp))))
51723711 6389 invalidate (p->exp, VOIDmode);
278a83b2
KH
6390 else if (GET_CODE (p->exp) == STRICT_LOW_PART
6391 || GET_CODE (p->exp) == ZERO_EXTRACT)
51723711
KG
6392 invalidate (XEXP (p->exp, 0), GET_MODE (p->exp));
6393 }
7afe21cc
RK
6394
6395 /* Process insns starting after LOOP_START until we hit a CALL_INSN or
6396 a CODE_LABEL (we could handle a CALL_INSN, but it isn't worth it).
6397
6398 The only thing we do with SET_DEST is invalidate entries, so we
6399 can safely process each SET in order. It is slightly less efficient
556c714b
JW
6400 to do so, but we only want to handle the most common cases.
6401
6402 The gen_move_insn call in cse_set_around_loop may create new pseudos.
6403 These pseudos won't have valid entries in any of the tables indexed
6404 by register number, such as reg_qty. We avoid out-of-range array
6405 accesses by not processing any instructions created after cse started. */
7afe21cc
RK
6406
6407 for (insn = NEXT_INSN (loop_start);
4b4bf941 6408 !CALL_P (insn) && !LABEL_P (insn)
556c714b 6409 && INSN_UID (insn) < max_insn_uid
4b4bf941 6410 && ! (NOTE_P (insn)
7afe21cc
RK
6411 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END);
6412 insn = NEXT_INSN (insn))
6413 {
2c3c49de 6414 if (INSN_P (insn)
7afe21cc
RK
6415 && (GET_CODE (PATTERN (insn)) == SET
6416 || GET_CODE (PATTERN (insn)) == CLOBBER))
6417 cse_set_around_loop (PATTERN (insn), insn, loop_start);
2c3c49de 6418 else if (INSN_P (insn) && GET_CODE (PATTERN (insn)) == PARALLEL)
7afe21cc
RK
6419 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
6420 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == SET
6421 || GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == CLOBBER)
6422 cse_set_around_loop (XVECEXP (PATTERN (insn), 0, i), insn,
6423 loop_start);
6424 }
6425}
6426\f
8b3686ed
RK
6427/* Process one SET of an insn that was skipped. We ignore CLOBBERs
6428 since they are done elsewhere. This function is called via note_stores. */
6429
6430static void
7080f735 6431invalidate_skipped_set (rtx dest, rtx set, void *data ATTRIBUTE_UNUSED)
8b3686ed 6432{
9ae8ffe7
JL
6433 enum rtx_code code = GET_CODE (dest);
6434
6435 if (code == MEM
ddc356e8 6436 && ! addr_affects_sp_p (dest) /* If this is not a stack push ... */
9ae8ffe7
JL
6437 /* There are times when an address can appear varying and be a PLUS
6438 during this scan when it would be a fixed address were we to know
6439 the proper equivalences. So invalidate all memory if there is
6440 a BLKmode or nonscalar memory reference or a reference to a
6441 variable address. */
6442 && (MEM_IN_STRUCT_P (dest) || GET_MODE (dest) == BLKmode
2be28ee2 6443 || cse_rtx_varies_p (XEXP (dest, 0), 0)))
9ae8ffe7
JL
6444 {
6445 invalidate_memory ();
6446 return;
6447 }
ffcf6393 6448
f47c02fa 6449 if (GET_CODE (set) == CLOBBER
8beccec8 6450 || CC0_P (dest)
f47c02fa
RK
6451 || dest == pc_rtx)
6452 return;
6453
9ae8ffe7 6454 if (code == STRICT_LOW_PART || code == ZERO_EXTRACT)
bb4034b3 6455 invalidate (XEXP (dest, 0), GET_MODE (dest));
9ae8ffe7
JL
6456 else if (code == REG || code == SUBREG || code == MEM)
6457 invalidate (dest, VOIDmode);
8b3686ed
RK
6458}
6459
6460/* Invalidate all insns from START up to the end of the function or the
6461 next label. This called when we wish to CSE around a block that is
6462 conditionally executed. */
6463
6464static void
7080f735 6465invalidate_skipped_block (rtx start)
8b3686ed
RK
6466{
6467 rtx insn;
8b3686ed 6468
4b4bf941 6469 for (insn = start; insn && !LABEL_P (insn);
8b3686ed
RK
6470 insn = NEXT_INSN (insn))
6471 {
2c3c49de 6472 if (! INSN_P (insn))
8b3686ed
RK
6473 continue;
6474
4b4bf941 6475 if (CALL_P (insn))
8b3686ed 6476 {
24a28584 6477 if (! CONST_OR_PURE_CALL_P (insn))
9ae8ffe7 6478 invalidate_memory ();
8b3686ed 6479 invalidate_for_call ();
8b3686ed
RK
6480 }
6481
97577254 6482 invalidate_from_clobbers (PATTERN (insn));
84832317 6483 note_stores (PATTERN (insn), invalidate_skipped_set, NULL);
8b3686ed
RK
6484 }
6485}
6486\f
84832317
MM
6487/* If modifying X will modify the value in *DATA (which is really an
6488 `rtx *'), indicate that fact by setting the pointed to value to
6489 NULL_RTX. */
7afe21cc
RK
6490
6491static void
7080f735 6492cse_check_loop_start (rtx x, rtx set ATTRIBUTE_UNUSED, void *data)
7afe21cc 6493{
84832317
MM
6494 rtx *cse_check_loop_start_value = (rtx *) data;
6495
6496 if (*cse_check_loop_start_value == NULL_RTX
7afe21cc
RK
6497 || GET_CODE (x) == CC0 || GET_CODE (x) == PC)
6498 return;
6499
3c0cb5de 6500 if ((MEM_P (x) && MEM_P (*cse_check_loop_start_value))
84832317
MM
6501 || reg_overlap_mentioned_p (x, *cse_check_loop_start_value))
6502 *cse_check_loop_start_value = NULL_RTX;
7afe21cc
RK
6503}
6504
6505/* X is a SET or CLOBBER contained in INSN that was found near the start of
6506 a loop that starts with the label at LOOP_START.
6507
6508 If X is a SET, we see if its SET_SRC is currently in our hash table.
6509 If so, we see if it has a value equal to some register used only in the
6510 loop exit code (as marked by jump.c).
6511
6512 If those two conditions are true, we search backwards from the start of
6513 the loop to see if that same value was loaded into a register that still
6514 retains its value at the start of the loop.
6515
6516 If so, we insert an insn after the load to copy the destination of that
6517 load into the equivalent register and (try to) replace our SET_SRC with that
6518 register.
6519
6520 In any event, we invalidate whatever this SET or CLOBBER modifies. */
6521
6522static void
7080f735 6523cse_set_around_loop (rtx x, rtx insn, rtx loop_start)
7afe21cc 6524{
7afe21cc 6525 struct table_elt *src_elt;
7afe21cc
RK
6526
6527 /* If this is a SET, see if we can replace SET_SRC, but ignore SETs that
6528 are setting PC or CC0 or whose SET_SRC is already a register. */
6529 if (GET_CODE (x) == SET
6530 && GET_CODE (SET_DEST (x)) != PC && GET_CODE (SET_DEST (x)) != CC0
f8cfc6aa 6531 && !REG_P (SET_SRC (x)))
7afe21cc
RK
6532 {
6533 src_elt = lookup (SET_SRC (x),
6534 HASH (SET_SRC (x), GET_MODE (SET_DEST (x))),
6535 GET_MODE (SET_DEST (x)));
6536
6537 if (src_elt)
6538 for (src_elt = src_elt->first_same_value; src_elt;
6539 src_elt = src_elt->next_same_value)
f8cfc6aa 6540 if (REG_P (src_elt->exp) && REG_LOOP_TEST_P (src_elt->exp)
7afe21cc
RK
6541 && COST (src_elt->exp) < COST (SET_SRC (x)))
6542 {
6543 rtx p, set;
6544
6545 /* Look for an insn in front of LOOP_START that sets
6546 something in the desired mode to SET_SRC (x) before we hit
6547 a label or CALL_INSN. */
6548
6549 for (p = prev_nonnote_insn (loop_start);
4b4bf941
JQ
6550 p && !CALL_P (p)
6551 && !LABEL_P (p);
7afe21cc
RK
6552 p = prev_nonnote_insn (p))
6553 if ((set = single_set (p)) != 0
f8cfc6aa 6554 && REG_P (SET_DEST (set))
7afe21cc
RK
6555 && GET_MODE (SET_DEST (set)) == src_elt->mode
6556 && rtx_equal_p (SET_SRC (set), SET_SRC (x)))
6557 {
6558 /* We now have to ensure that nothing between P
6559 and LOOP_START modified anything referenced in
6560 SET_SRC (x). We know that nothing within the loop
6561 can modify it, or we would have invalidated it in
6562 the hash table. */
6563 rtx q;
84832317 6564 rtx cse_check_loop_start_value = SET_SRC (x);
7afe21cc 6565 for (q = p; q != loop_start; q = NEXT_INSN (q))
2c3c49de 6566 if (INSN_P (q))
84832317
MM
6567 note_stores (PATTERN (q),
6568 cse_check_loop_start,
6569 &cse_check_loop_start_value);
7afe21cc
RK
6570
6571 /* If nothing was changed and we can replace our
6572 SET_SRC, add an insn after P to copy its destination
6573 to what we will be replacing SET_SRC with. */
6574 if (cse_check_loop_start_value
26771da7
JH
6575 && single_set (p)
6576 && !can_throw_internal (insn)
7afe21cc
RK
6577 && validate_change (insn, &SET_SRC (x),
6578 src_elt->exp, 0))
e89d3e6f
R
6579 {
6580 /* If this creates new pseudos, this is unsafe,
6581 because the regno of new pseudo is unsuitable
6582 to index into reg_qty when cse_insn processes
6583 the new insn. Therefore, if a new pseudo was
6584 created, discard this optimization. */
6585 int nregs = max_reg_num ();
6586 rtx move
6587 = gen_move_insn (src_elt->exp, SET_DEST (set));
6588 if (nregs != max_reg_num ())
6589 {
6590 if (! validate_change (insn, &SET_SRC (x),
6591 SET_SRC (set), 0))
6592 abort ();
6593 }
6594 else
9ebfd78b 6595 {
f3ea0706
R
6596 if (CONSTANT_P (SET_SRC (set))
6597 && ! find_reg_equal_equiv_note (insn))
6598 set_unique_reg_note (insn, REG_EQUAL,
6599 SET_SRC (set));
9ebfd78b
EB
6600 if (control_flow_insn_p (p))
6601 /* p can cause a control flow transfer so it
6602 is the last insn of a basic block. We can't
6603 therefore use emit_insn_after. */
6604 emit_insn_before (move, next_nonnote_insn (p));
6605 else
6606 emit_insn_after (move, p);
6607 }
e89d3e6f 6608 }
7afe21cc
RK
6609 break;
6610 }
6611 }
6612 }
6613
14a774a9
RK
6614 /* Deal with the destination of X affecting the stack pointer. */
6615 addr_affects_sp_p (SET_DEST (x));
7afe21cc 6616
14a774a9
RK
6617 /* See comment on similar code in cse_insn for explanation of these
6618 tests. */
f8cfc6aa 6619 if (REG_P (SET_DEST (x)) || GET_CODE (SET_DEST (x)) == SUBREG
3c0cb5de 6620 || MEM_P (SET_DEST (x)))
bb4034b3 6621 invalidate (SET_DEST (x), VOIDmode);
2708da92
RS
6622 else if (GET_CODE (SET_DEST (x)) == STRICT_LOW_PART
6623 || GET_CODE (SET_DEST (x)) == ZERO_EXTRACT)
bb4034b3 6624 invalidate (XEXP (SET_DEST (x), 0), GET_MODE (SET_DEST (x)));
7afe21cc
RK
6625}
6626\f
6627/* Find the end of INSN's basic block and return its range,
6628 the total number of SETs in all the insns of the block, the last insn of the
6629 block, and the branch path.
6630
da7d8304 6631 The branch path indicates which branches should be followed. If a nonzero
7afe21cc
RK
6632 path size is specified, the block should be rescanned and a different set
6633 of branches will be taken. The branch path is only used if
da7d8304 6634 FLAG_CSE_FOLLOW_JUMPS or FLAG_CSE_SKIP_BLOCKS is nonzero.
7afe21cc
RK
6635
6636 DATA is a pointer to a struct cse_basic_block_data, defined below, that is
6637 used to describe the block. It is filled in with the information about
6638 the current block. The incoming structure's branch path, if any, is used
6639 to construct the output branch path. */
6640
86caf04d 6641static void
7080f735
AJ
6642cse_end_of_basic_block (rtx insn, struct cse_basic_block_data *data,
6643 int follow_jumps, int after_loop, int skip_blocks)
7afe21cc
RK
6644{
6645 rtx p = insn, q;
6646 int nsets = 0;
6647 int low_cuid = INSN_CUID (insn), high_cuid = INSN_CUID (insn);
2c3c49de 6648 rtx next = INSN_P (insn) ? insn : next_real_insn (insn);
7afe21cc
RK
6649 int path_size = data->path_size;
6650 int path_entry = 0;
6651 int i;
6652
6653 /* Update the previous branch path, if any. If the last branch was
6de9cd9a
DN
6654 previously PATH_TAKEN, mark it PATH_NOT_TAKEN.
6655 If it was previously PATH_NOT_TAKEN,
7afe21cc 6656 shorten the path by one and look at the previous branch. We know that
da7d8304 6657 at least one branch must have been taken if PATH_SIZE is nonzero. */
7afe21cc
RK
6658 while (path_size > 0)
6659 {
6de9cd9a 6660 if (data->path[path_size - 1].status != PATH_NOT_TAKEN)
7afe21cc 6661 {
6de9cd9a 6662 data->path[path_size - 1].status = PATH_NOT_TAKEN;
7afe21cc
RK
6663 break;
6664 }
6665 else
6666 path_size--;
6667 }
6668
16b702cd
MM
6669 /* If the first instruction is marked with QImode, that means we've
6670 already processed this block. Our caller will look at DATA->LAST
6671 to figure out where to go next. We want to return the next block
6672 in the instruction stream, not some branched-to block somewhere
6673 else. We accomplish this by pretending our called forbid us to
6674 follow jumps, or skip blocks. */
6675 if (GET_MODE (insn) == QImode)
6676 follow_jumps = skip_blocks = 0;
6677
7afe21cc 6678 /* Scan to end of this basic block. */
4b4bf941 6679 while (p && !LABEL_P (p))
7afe21cc
RK
6680 {
6681 /* Don't cse out the end of a loop. This makes a difference
6682 only for the unusual loops that always execute at least once;
6683 all other loops have labels there so we will stop in any case.
6684 Cse'ing out the end of the loop is dangerous because it
6685 might cause an invariant expression inside the loop
6686 to be reused after the end of the loop. This would make it
6687 hard to move the expression out of the loop in loop.c,
6688 especially if it is one of several equivalent expressions
6689 and loop.c would like to eliminate it.
6690
6691 If we are running after loop.c has finished, we can ignore
6692 the NOTE_INSN_LOOP_END. */
6693
4b4bf941 6694 if (! after_loop && NOTE_P (p)
7afe21cc
RK
6695 && NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
6696 break;
6697
8aeea6e6 6698 /* Don't cse over a call to setjmp; on some machines (eg VAX)
7afe21cc
RK
6699 the regs restored by the longjmp come from
6700 a later time than the setjmp. */
4b4bf941 6701 if (PREV_INSN (p) && CALL_P (PREV_INSN (p))
570a98eb 6702 && find_reg_note (PREV_INSN (p), REG_SETJMP, NULL))
7afe21cc
RK
6703 break;
6704
6705 /* A PARALLEL can have lots of SETs in it,
6706 especially if it is really an ASM_OPERANDS. */
2c3c49de 6707 if (INSN_P (p) && GET_CODE (PATTERN (p)) == PARALLEL)
7afe21cc 6708 nsets += XVECLEN (PATTERN (p), 0);
4b4bf941 6709 else if (!NOTE_P (p))
7afe21cc 6710 nsets += 1;
278a83b2 6711
164c8956
RK
6712 /* Ignore insns made by CSE; they cannot affect the boundaries of
6713 the basic block. */
6714
6715 if (INSN_UID (p) <= max_uid && INSN_CUID (p) > high_cuid)
8b3686ed 6716 high_cuid = INSN_CUID (p);
164c8956
RK
6717 if (INSN_UID (p) <= max_uid && INSN_CUID (p) < low_cuid)
6718 low_cuid = INSN_CUID (p);
7afe21cc
RK
6719
6720 /* See if this insn is in our branch path. If it is and we are to
6721 take it, do so. */
6722 if (path_entry < path_size && data->path[path_entry].branch == p)
6723 {
6de9cd9a 6724 if (data->path[path_entry].status != PATH_NOT_TAKEN)
7afe21cc 6725 p = JUMP_LABEL (p);
278a83b2 6726
7afe21cc
RK
6727 /* Point to next entry in path, if any. */
6728 path_entry++;
6729 }
6730
6731 /* If this is a conditional jump, we can follow it if -fcse-follow-jumps
6732 was specified, we haven't reached our maximum path length, there are
6733 insns following the target of the jump, this is the only use of the
8b3686ed
RK
6734 jump label, and the target label is preceded by a BARRIER.
6735
6736 Alternatively, we can follow the jump if it branches around a
6737 block of code and there are no other branches into the block.
6738 In this case invalidate_skipped_block will be called to invalidate any
6739 registers set in the block when following the jump. */
6740
9bf8cfbf 6741 else if ((follow_jumps || skip_blocks) && path_size < PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH) - 1
4b4bf941 6742 && JUMP_P (p)
278a83b2 6743 && GET_CODE (PATTERN (p)) == SET
7afe21cc 6744 && GET_CODE (SET_SRC (PATTERN (p))) == IF_THEN_ELSE
85c3ba60 6745 && JUMP_LABEL (p) != 0
7afe21cc
RK
6746 && LABEL_NUSES (JUMP_LABEL (p)) == 1
6747 && NEXT_INSN (JUMP_LABEL (p)) != 0)
6748 {
6749 for (q = PREV_INSN (JUMP_LABEL (p)); q; q = PREV_INSN (q))
4b4bf941 6750 if ((!NOTE_P (q)
278a83b2 6751 || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END
4b4bf941 6752 || (PREV_INSN (q) && CALL_P (PREV_INSN (q))
570a98eb 6753 && find_reg_note (PREV_INSN (q), REG_SETJMP, NULL)))
4b4bf941 6754 && (!LABEL_P (q) || LABEL_NUSES (q) != 0))
7afe21cc
RK
6755 break;
6756
6757 /* If we ran into a BARRIER, this code is an extension of the
6758 basic block when the branch is taken. */
4b4bf941 6759 if (follow_jumps && q != 0 && BARRIER_P (q))
7afe21cc
RK
6760 {
6761 /* Don't allow ourself to keep walking around an
6762 always-executed loop. */
fc3ffe83
RK
6763 if (next_real_insn (q) == next)
6764 {
6765 p = NEXT_INSN (p);
6766 continue;
6767 }
7afe21cc
RK
6768
6769 /* Similarly, don't put a branch in our path more than once. */
6770 for (i = 0; i < path_entry; i++)
6771 if (data->path[i].branch == p)
6772 break;
6773
6774 if (i != path_entry)
6775 break;
6776
6777 data->path[path_entry].branch = p;
6de9cd9a 6778 data->path[path_entry++].status = PATH_TAKEN;
7afe21cc
RK
6779
6780 /* This branch now ends our path. It was possible that we
6781 didn't see this branch the last time around (when the
6782 insn in front of the target was a JUMP_INSN that was
6783 turned into a no-op). */
6784 path_size = path_entry;
6785
6786 p = JUMP_LABEL (p);
6787 /* Mark block so we won't scan it again later. */
6788 PUT_MODE (NEXT_INSN (p), QImode);
6789 }
8b3686ed 6790 /* Detect a branch around a block of code. */
4b4bf941 6791 else if (skip_blocks && q != 0 && !LABEL_P (q))
8b3686ed 6792 {
b3694847 6793 rtx tmp;
8b3686ed 6794
fc3ffe83
RK
6795 if (next_real_insn (q) == next)
6796 {
6797 p = NEXT_INSN (p);
6798 continue;
6799 }
8b3686ed
RK
6800
6801 for (i = 0; i < path_entry; i++)
6802 if (data->path[i].branch == p)
6803 break;
6804
6805 if (i != path_entry)
6806 break;
6807
6808 /* This is no_labels_between_p (p, q) with an added check for
6809 reaching the end of a function (in case Q precedes P). */
6810 for (tmp = NEXT_INSN (p); tmp && tmp != q; tmp = NEXT_INSN (tmp))
4b4bf941 6811 if (LABEL_P (tmp))
8b3686ed 6812 break;
278a83b2 6813
8b3686ed
RK
6814 if (tmp == q)
6815 {
6816 data->path[path_entry].branch = p;
6de9cd9a 6817 data->path[path_entry++].status = PATH_AROUND;
8b3686ed
RK
6818
6819 path_size = path_entry;
6820
6821 p = JUMP_LABEL (p);
6822 /* Mark block so we won't scan it again later. */
6823 PUT_MODE (NEXT_INSN (p), QImode);
6824 }
6825 }
7afe21cc 6826 }
7afe21cc
RK
6827 p = NEXT_INSN (p);
6828 }
6829
6830 data->low_cuid = low_cuid;
6831 data->high_cuid = high_cuid;
6832 data->nsets = nsets;
6833 data->last = p;
6834
6835 /* If all jumps in the path are not taken, set our path length to zero
6836 so a rescan won't be done. */
6837 for (i = path_size - 1; i >= 0; i--)
6de9cd9a 6838 if (data->path[i].status != PATH_NOT_TAKEN)
7afe21cc
RK
6839 break;
6840
6841 if (i == -1)
6842 data->path_size = 0;
6843 else
6844 data->path_size = path_size;
6845
6846 /* End the current branch path. */
6847 data->path[path_size].branch = 0;
6848}
6849\f
7afe21cc
RK
6850/* Perform cse on the instructions of a function.
6851 F is the first instruction.
6852 NREGS is one plus the highest pseudo-reg number used in the instruction.
6853
6854 AFTER_LOOP is 1 if this is the cse call done after loop optimization
6855 (only if -frerun-cse-after-loop).
6856
6857 Returns 1 if jump_optimize should be redone due to simplifications
6858 in conditional jump instructions. */
6859
6860int
7080f735 6861cse_main (rtx f, int nregs, int after_loop, FILE *file)
7afe21cc
RK
6862{
6863 struct cse_basic_block_data val;
b3694847
SS
6864 rtx insn = f;
6865 int i;
7afe21cc 6866
9bf8cfbf
ZD
6867 val.path = xmalloc (sizeof (struct branch_path)
6868 * PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH));
6869
7afe21cc 6870 cse_jumps_altered = 0;
a5dfb4ee 6871 recorded_label_ref = 0;
7afe21cc 6872 constant_pool_entries_cost = 0;
dd0ba281 6873 constant_pool_entries_regcost = 0;
7afe21cc 6874 val.path_size = 0;
2f93eea8 6875 rtl_hooks = cse_rtl_hooks;
7afe21cc
RK
6876
6877 init_recog ();
9ae8ffe7 6878 init_alias_analysis ();
7afe21cc
RK
6879
6880 max_reg = nregs;
6881
556c714b
JW
6882 max_insn_uid = get_max_uid ();
6883
703ad42b 6884 reg_eqv_table = xmalloc (nregs * sizeof (struct reg_eqv_elem));
7afe21cc 6885
7bac1be0
RK
6886#ifdef LOAD_EXTEND_OP
6887
6888 /* Allocate scratch rtl here. cse_insn will fill in the memory reference
6889 and change the code and mode as appropriate. */
38a448ca 6890 memory_extend_rtx = gen_rtx_ZERO_EXTEND (VOIDmode, NULL_RTX);
7bac1be0
RK
6891#endif
6892
1f8f4a0b
MM
6893 /* Reset the counter indicating how many elements have been made
6894 thus far. */
7afe21cc
RK
6895 n_elements_made = 0;
6896
6897 /* Find the largest uid. */
6898
164c8956 6899 max_uid = get_max_uid ();
703ad42b 6900 uid_cuid = xcalloc (max_uid + 1, sizeof (int));
7afe21cc
RK
6901
6902 /* Compute the mapping from uids to cuids.
6903 CUIDs are numbers assigned to insns, like uids,
6904 except that cuids increase monotonically through the code.
6905 Don't assign cuids to line-number NOTEs, so that the distance in cuids
6906 between two insns is not affected by -g. */
6907
6908 for (insn = f, i = 0; insn; insn = NEXT_INSN (insn))
6909 {
4b4bf941 6910 if (!NOTE_P (insn)
7afe21cc
RK
6911 || NOTE_LINE_NUMBER (insn) < 0)
6912 INSN_CUID (insn) = ++i;
6913 else
6914 /* Give a line number note the same cuid as preceding insn. */
6915 INSN_CUID (insn) = i;
6916 }
6917
1f8f4a0b 6918 ggc_push_context ();
1497faf6 6919
7afe21cc
RK
6920 /* Loop over basic blocks.
6921 Compute the maximum number of qty's needed for each basic block
6922 (which is 2 for each SET). */
6923 insn = f;
6924 while (insn)
6925 {
4eadede7 6926 cse_altered = 0;
8b3686ed
RK
6927 cse_end_of_basic_block (insn, &val, flag_cse_follow_jumps, after_loop,
6928 flag_cse_skip_blocks);
7afe21cc
RK
6929
6930 /* If this basic block was already processed or has no sets, skip it. */
6931 if (val.nsets == 0 || GET_MODE (insn) == QImode)
6932 {
6933 PUT_MODE (insn, VOIDmode);
6934 insn = (val.last ? NEXT_INSN (val.last) : 0);
6935 val.path_size = 0;
6936 continue;
6937 }
6938
6939 cse_basic_block_start = val.low_cuid;
6940 cse_basic_block_end = val.high_cuid;
6941 max_qty = val.nsets * 2;
278a83b2 6942
7afe21cc 6943 if (file)
ab87f8c8 6944 fnotice (file, ";; Processing block from %d to %d, %d sets.\n",
7afe21cc
RK
6945 INSN_UID (insn), val.last ? INSN_UID (val.last) : 0,
6946 val.nsets);
6947
6948 /* Make MAX_QTY bigger to give us room to optimize
6949 past the end of this basic block, if that should prove useful. */
6950 if (max_qty < 500)
6951 max_qty = 500;
6952
6953 max_qty += max_reg;
6954
6955 /* If this basic block is being extended by following certain jumps,
6956 (see `cse_end_of_basic_block'), we reprocess the code from the start.
6957 Otherwise, we start after this basic block. */
6958 if (val.path_size > 0)
278a83b2 6959 cse_basic_block (insn, val.last, val.path, 0);
7afe21cc
RK
6960 else
6961 {
6962 int old_cse_jumps_altered = cse_jumps_altered;
6963 rtx temp;
6964
6965 /* When cse changes a conditional jump to an unconditional
6966 jump, we want to reprocess the block, since it will give
6967 us a new branch path to investigate. */
6968 cse_jumps_altered = 0;
6969 temp = cse_basic_block (insn, val.last, val.path, ! after_loop);
8b3686ed
RK
6970 if (cse_jumps_altered == 0
6971 || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0))
7afe21cc
RK
6972 insn = temp;
6973
6974 cse_jumps_altered |= old_cse_jumps_altered;
6975 }
6976
1f8f4a0b 6977 if (cse_altered)
1497faf6
RH
6978 ggc_collect ();
6979
7afe21cc
RK
6980#ifdef USE_C_ALLOCA
6981 alloca (0);
6982#endif
6983 }
6984
1f8f4a0b 6985 ggc_pop_context ();
1497faf6 6986
7afe21cc
RK
6987 if (max_elements_made < n_elements_made)
6988 max_elements_made = n_elements_made;
6989
e05e2395
MM
6990 /* Clean up. */
6991 end_alias_analysis ();
75c6bd46 6992 free (uid_cuid);
1bb98cec 6993 free (reg_eqv_table);
9bf8cfbf 6994 free (val.path);
2f93eea8 6995 rtl_hooks = general_rtl_hooks;
e05e2395 6996
a5dfb4ee 6997 return cse_jumps_altered || recorded_label_ref;
7afe21cc
RK
6998}
6999
7000/* Process a single basic block. FROM and TO and the limits of the basic
7001 block. NEXT_BRANCH points to the branch path when following jumps or
7002 a null path when not following jumps.
7003
da7d8304 7004 AROUND_LOOP is nonzero if we are to try to cse around to the start of a
7afe21cc
RK
7005 loop. This is true when we are being called for the last time on a
7006 block and this CSE pass is before loop.c. */
7007
7008static rtx
7080f735
AJ
7009cse_basic_block (rtx from, rtx to, struct branch_path *next_branch,
7010 int around_loop)
7afe21cc 7011{
b3694847 7012 rtx insn;
7afe21cc 7013 int to_usage = 0;
7bd8b2a8 7014 rtx libcall_insn = NULL_RTX;
e9a25f70 7015 int num_insns = 0;
26d107db 7016 int no_conflict = 0;
7afe21cc 7017
1bb98cec
DM
7018 /* This array is undefined before max_reg, so only allocate
7019 the space actually needed and adjust the start. */
7020
703ad42b 7021 qty_table = xmalloc ((max_qty - max_reg) * sizeof (struct qty_table_elem));
1bb98cec 7022 qty_table -= max_reg;
7afe21cc
RK
7023
7024 new_basic_block ();
7025
7026 /* TO might be a label. If so, protect it from being deleted. */
4b4bf941 7027 if (to != 0 && LABEL_P (to))
7afe21cc
RK
7028 ++LABEL_NUSES (to);
7029
7030 for (insn = from; insn != to; insn = NEXT_INSN (insn))
7031 {
b3694847 7032 enum rtx_code code = GET_CODE (insn);
e9a25f70 7033
1d22a2c1
MM
7034 /* If we have processed 1,000 insns, flush the hash table to
7035 avoid extreme quadratic behavior. We must not include NOTEs
c13e8210 7036 in the count since there may be more of them when generating
1d22a2c1
MM
7037 debugging information. If we clear the table at different
7038 times, code generated with -g -O might be different than code
7039 generated with -O but not -g.
e9a25f70
JL
7040
7041 ??? This is a real kludge and needs to be done some other way.
7042 Perhaps for 2.9. */
1d22a2c1 7043 if (code != NOTE && num_insns++ > 1000)
e9a25f70 7044 {
01e752d3 7045 flush_hash_table ();
e9a25f70
JL
7046 num_insns = 0;
7047 }
7afe21cc
RK
7048
7049 /* See if this is a branch that is part of the path. If so, and it is
7050 to be taken, do so. */
7051 if (next_branch->branch == insn)
7052 {
8b3686ed 7053 enum taken status = next_branch++->status;
6de9cd9a 7054 if (status != PATH_NOT_TAKEN)
7afe21cc 7055 {
6de9cd9a 7056 if (status == PATH_TAKEN)
8b3686ed
RK
7057 record_jump_equiv (insn, 1);
7058 else
7059 invalidate_skipped_block (NEXT_INSN (insn));
7060
7afe21cc
RK
7061 /* Set the last insn as the jump insn; it doesn't affect cc0.
7062 Then follow this branch. */
7063#ifdef HAVE_cc0
7064 prev_insn_cc0 = 0;
7afe21cc 7065 prev_insn = insn;
4977bab6 7066#endif
7afe21cc
RK
7067 insn = JUMP_LABEL (insn);
7068 continue;
7069 }
7070 }
278a83b2 7071
7afe21cc
RK
7072 if (GET_MODE (insn) == QImode)
7073 PUT_MODE (insn, VOIDmode);
7074
ec8e098d 7075 if (GET_RTX_CLASS (code) == RTX_INSN)
7afe21cc 7076 {
7bd8b2a8
JL
7077 rtx p;
7078
7afe21cc
RK
7079 /* Process notes first so we have all notes in canonical forms when
7080 looking for duplicate operations. */
7081
7082 if (REG_NOTES (insn))
906c4e36 7083 REG_NOTES (insn) = cse_process_notes (REG_NOTES (insn), NULL_RTX);
7afe21cc
RK
7084
7085 /* Track when we are inside in LIBCALL block. Inside such a block,
7086 we do not want to record destinations. The last insn of a
7087 LIBCALL block is not considered to be part of the block, since
830a38ee 7088 its destination is the result of the block and hence should be
7afe21cc
RK
7089 recorded. */
7090
efc9bd41
RK
7091 if (REG_NOTES (insn) != 0)
7092 {
7093 if ((p = find_reg_note (insn, REG_LIBCALL, NULL_RTX)))
7094 libcall_insn = XEXP (p, 0);
7095 else if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
26d107db
KK
7096 {
7097 /* Keep libcall_insn for the last SET insn of a no-conflict
7098 block to prevent changing the destination. */
7099 if (! no_conflict)
7100 libcall_insn = 0;
7101 else
7102 no_conflict = -1;
7103 }
7104 else if (find_reg_note (insn, REG_NO_CONFLICT, NULL_RTX))
7105 no_conflict = 1;
efc9bd41 7106 }
7afe21cc 7107
7bd8b2a8 7108 cse_insn (insn, libcall_insn);
f85cc4cb 7109
26d107db
KK
7110 if (no_conflict == -1)
7111 {
7112 libcall_insn = 0;
7113 no_conflict = 0;
7114 }
7115
be8ac49a
RK
7116 /* If we haven't already found an insn where we added a LABEL_REF,
7117 check this one. */
4b4bf941 7118 if (NONJUMP_INSN_P (insn) && ! recorded_label_ref
be8ac49a
RK
7119 && for_each_rtx (&PATTERN (insn), check_for_label_ref,
7120 (void *) insn))
f85cc4cb 7121 recorded_label_ref = 1;
7afe21cc
RK
7122 }
7123
7124 /* If INSN is now an unconditional jump, skip to the end of our
7125 basic block by pretending that we just did the last insn in the
7126 basic block. If we are jumping to the end of our block, show
7127 that we can have one usage of TO. */
7128
7f1c097d 7129 if (any_uncondjump_p (insn))
7afe21cc
RK
7130 {
7131 if (to == 0)
fa0933ba
JL
7132 {
7133 free (qty_table + max_reg);
7134 return 0;
7135 }
7afe21cc
RK
7136
7137 if (JUMP_LABEL (insn) == to)
7138 to_usage = 1;
7139
6a5293dc
RS
7140 /* Maybe TO was deleted because the jump is unconditional.
7141 If so, there is nothing left in this basic block. */
7142 /* ??? Perhaps it would be smarter to set TO
278a83b2 7143 to whatever follows this insn,
6a5293dc
RS
7144 and pretend the basic block had always ended here. */
7145 if (INSN_DELETED_P (to))
7146 break;
7147
7afe21cc
RK
7148 insn = PREV_INSN (to);
7149 }
7150
7151 /* See if it is ok to keep on going past the label
7152 which used to end our basic block. Remember that we incremented
d45cf215 7153 the count of that label, so we decrement it here. If we made
7afe21cc
RK
7154 a jump unconditional, TO_USAGE will be one; in that case, we don't
7155 want to count the use in that jump. */
7156
7157 if (to != 0 && NEXT_INSN (insn) == to
4b4bf941 7158 && LABEL_P (to) && --LABEL_NUSES (to) == to_usage)
7afe21cc
RK
7159 {
7160 struct cse_basic_block_data val;
146135d6 7161 rtx prev;
7afe21cc
RK
7162
7163 insn = NEXT_INSN (to);
7164
146135d6
RK
7165 /* If TO was the last insn in the function, we are done. */
7166 if (insn == 0)
fa0933ba
JL
7167 {
7168 free (qty_table + max_reg);
7169 return 0;
7170 }
7afe21cc 7171
146135d6
RK
7172 /* If TO was preceded by a BARRIER we are done with this block
7173 because it has no continuation. */
7174 prev = prev_nonnote_insn (to);
4b4bf941 7175 if (prev && BARRIER_P (prev))
fa0933ba
JL
7176 {
7177 free (qty_table + max_reg);
7178 return insn;
7179 }
146135d6
RK
7180
7181 /* Find the end of the following block. Note that we won't be
7182 following branches in this case. */
7afe21cc
RK
7183 to_usage = 0;
7184 val.path_size = 0;
9bf8cfbf
ZD
7185 val.path = xmalloc (sizeof (struct branch_path)
7186 * PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH));
8b3686ed 7187 cse_end_of_basic_block (insn, &val, 0, 0, 0);
9bf8cfbf 7188 free (val.path);
7afe21cc
RK
7189
7190 /* If the tables we allocated have enough space left
7191 to handle all the SETs in the next basic block,
7192 continue through it. Otherwise, return,
7193 and that block will be scanned individually. */
7194 if (val.nsets * 2 + next_qty > max_qty)
7195 break;
7196
7197 cse_basic_block_start = val.low_cuid;
7198 cse_basic_block_end = val.high_cuid;
7199 to = val.last;
7200
7201 /* Prevent TO from being deleted if it is a label. */
4b4bf941 7202 if (to != 0 && LABEL_P (to))
7afe21cc
RK
7203 ++LABEL_NUSES (to);
7204
7205 /* Back up so we process the first insn in the extension. */
7206 insn = PREV_INSN (insn);
7207 }
7208 }
7209
7210 if (next_qty > max_qty)
7211 abort ();
7212
7213 /* If we are running before loop.c, we stopped on a NOTE_INSN_LOOP_END, and
7214 the previous insn is the only insn that branches to the head of a loop,
7215 we can cse into the loop. Don't do this if we changed the jump
7216 structure of a loop unless we aren't going to be following jumps. */
7217
68252e27 7218 insn = prev_nonnote_insn (to);
8b3686ed
RK
7219 if ((cse_jumps_altered == 0
7220 || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0))
7afe21cc 7221 && around_loop && to != 0
4b4bf941
JQ
7222 && NOTE_P (to) && NOTE_LINE_NUMBER (to) == NOTE_INSN_LOOP_END
7223 && JUMP_P (insn)
b5a696fb
RZ
7224 && JUMP_LABEL (insn) != 0
7225 && LABEL_NUSES (JUMP_LABEL (insn)) == 1)
7226 cse_around_loop (JUMP_LABEL (insn));
7afe21cc 7227
1bb98cec 7228 free (qty_table + max_reg);
75c6bd46 7229
7afe21cc
RK
7230 return to ? NEXT_INSN (to) : 0;
7231}
7232\f
be8ac49a 7233/* Called via for_each_rtx to see if an insn is using a LABEL_REF for which
45c23566 7234 there isn't a REG_LABEL note. Return one if so. DATA is the insn. */
be8ac49a
RK
7235
7236static int
7080f735 7237check_for_label_ref (rtx *rtl, void *data)
be8ac49a
RK
7238{
7239 rtx insn = (rtx) data;
7240
7241 /* If this insn uses a LABEL_REF and there isn't a REG_LABEL note for it,
7242 we must rerun jump since it needs to place the note. If this is a
7243 LABEL_REF for a CODE_LABEL that isn't in the insn chain, don't do this
ec5c56db 7244 since no REG_LABEL will be added. */
be8ac49a 7245 return (GET_CODE (*rtl) == LABEL_REF
45c23566 7246 && ! LABEL_REF_NONLOCAL_P (*rtl)
4838c5ee 7247 && LABEL_P (XEXP (*rtl, 0))
be8ac49a
RK
7248 && INSN_UID (XEXP (*rtl, 0)) != 0
7249 && ! find_reg_note (insn, REG_LABEL, XEXP (*rtl, 0)));
7250}
7251\f
7afe21cc
RK
7252/* Count the number of times registers are used (not set) in X.
7253 COUNTS is an array in which we accumulate the count, INCR is how much
9ab81df2 7254 we count each register usage. */
7afe21cc
RK
7255
7256static void
9ab81df2 7257count_reg_usage (rtx x, int *counts, int incr)
7afe21cc 7258{
f1e7c95f 7259 enum rtx_code code;
b17d5d7c 7260 rtx note;
6f7d635c 7261 const char *fmt;
7afe21cc
RK
7262 int i, j;
7263
f1e7c95f
RK
7264 if (x == 0)
7265 return;
7266
7267 switch (code = GET_CODE (x))
7afe21cc
RK
7268 {
7269 case REG:
9ab81df2 7270 counts[REGNO (x)] += incr;
7afe21cc
RK
7271 return;
7272
7273 case PC:
7274 case CC0:
7275 case CONST:
7276 case CONST_INT:
7277 case CONST_DOUBLE:
69ef87e2 7278 case CONST_VECTOR:
7afe21cc
RK
7279 case SYMBOL_REF:
7280 case LABEL_REF:
02e39abc
JL
7281 return;
7282
278a83b2 7283 case CLOBBER:
02e39abc
JL
7284 /* If we are clobbering a MEM, mark any registers inside the address
7285 as being used. */
3c0cb5de 7286 if (MEM_P (XEXP (x, 0)))
9ab81df2 7287 count_reg_usage (XEXP (XEXP (x, 0), 0), counts, incr);
7afe21cc
RK
7288 return;
7289
7290 case SET:
7291 /* Unless we are setting a REG, count everything in SET_DEST. */
f8cfc6aa 7292 if (!REG_P (SET_DEST (x)))
9ab81df2
JDA
7293 count_reg_usage (SET_DEST (x), counts, incr);
7294 count_reg_usage (SET_SRC (x), counts, incr);
7afe21cc
RK
7295 return;
7296
f1e7c95f 7297 case CALL_INSN:
9ab81df2 7298 count_reg_usage (CALL_INSN_FUNCTION_USAGE (x), counts, incr);
ddc356e8 7299 /* Fall through. */
f1e7c95f 7300
7afe21cc
RK
7301 case INSN:
7302 case JUMP_INSN:
9ab81df2 7303 count_reg_usage (PATTERN (x), counts, incr);
7afe21cc
RK
7304
7305 /* Things used in a REG_EQUAL note aren't dead since loop may try to
7306 use them. */
7307
b17d5d7c
ZD
7308 note = find_reg_equal_equiv_note (x);
7309 if (note)
839844be
R
7310 {
7311 rtx eqv = XEXP (note, 0);
7312
7313 if (GET_CODE (eqv) == EXPR_LIST)
7314 /* This REG_EQUAL note describes the result of a function call.
7315 Process all the arguments. */
7316 do
7317 {
9ab81df2 7318 count_reg_usage (XEXP (eqv, 0), counts, incr);
839844be
R
7319 eqv = XEXP (eqv, 1);
7320 }
7321 while (eqv && GET_CODE (eqv) == EXPR_LIST);
7322 else
9ab81df2 7323 count_reg_usage (eqv, counts, incr);
839844be 7324 }
7afe21cc
RK
7325 return;
7326
ee960939
OH
7327 case EXPR_LIST:
7328 if (REG_NOTE_KIND (x) == REG_EQUAL
7329 || (REG_NOTE_KIND (x) != REG_NONNEG && GET_CODE (XEXP (x,0)) == USE)
7330 /* FUNCTION_USAGE expression lists may include (CLOBBER (mem /u)),
7331 involving registers in the address. */
7332 || GET_CODE (XEXP (x, 0)) == CLOBBER)
9ab81df2 7333 count_reg_usage (XEXP (x, 0), counts, incr);
ee960939 7334
9ab81df2 7335 count_reg_usage (XEXP (x, 1), counts, incr);
ee960939
OH
7336 return;
7337
a6c14a64 7338 case ASM_OPERANDS:
a6c14a64
RH
7339 /* Iterate over just the inputs, not the constraints as well. */
7340 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
9ab81df2 7341 count_reg_usage (ASM_OPERANDS_INPUT (x, i), counts, incr);
a6c14a64
RH
7342 return;
7343
7afe21cc 7344 case INSN_LIST:
b17d5d7c 7345 abort ();
278a83b2 7346
e9a25f70
JL
7347 default:
7348 break;
7afe21cc
RK
7349 }
7350
7351 fmt = GET_RTX_FORMAT (code);
7352 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
7353 {
7354 if (fmt[i] == 'e')
9ab81df2 7355 count_reg_usage (XEXP (x, i), counts, incr);
7afe21cc
RK
7356 else if (fmt[i] == 'E')
7357 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
9ab81df2 7358 count_reg_usage (XVECEXP (x, i, j), counts, incr);
7afe21cc
RK
7359 }
7360}
7361\f
4793dca1
JH
7362/* Return true if set is live. */
7363static bool
7080f735
AJ
7364set_live_p (rtx set, rtx insn ATTRIBUTE_UNUSED, /* Only used with HAVE_cc0. */
7365 int *counts)
4793dca1
JH
7366{
7367#ifdef HAVE_cc0
7368 rtx tem;
7369#endif
7370
7371 if (set_noop_p (set))
7372 ;
7373
7374#ifdef HAVE_cc0
7375 else if (GET_CODE (SET_DEST (set)) == CC0
7376 && !side_effects_p (SET_SRC (set))
7377 && ((tem = next_nonnote_insn (insn)) == 0
7378 || !INSN_P (tem)
7379 || !reg_referenced_p (cc0_rtx, PATTERN (tem))))
7380 return false;
7381#endif
f8cfc6aa 7382 else if (!REG_P (SET_DEST (set))
4793dca1
JH
7383 || REGNO (SET_DEST (set)) < FIRST_PSEUDO_REGISTER
7384 || counts[REGNO (SET_DEST (set))] != 0
8fff4fc1 7385 || side_effects_p (SET_SRC (set)))
4793dca1
JH
7386 return true;
7387 return false;
7388}
7389
7390/* Return true if insn is live. */
7391
7392static bool
7080f735 7393insn_live_p (rtx insn, int *counts)
4793dca1
JH
7394{
7395 int i;
a3745024 7396 if (flag_non_call_exceptions && may_trap_p (PATTERN (insn)))
a646f6cc
AH
7397 return true;
7398 else if (GET_CODE (PATTERN (insn)) == SET)
0021de69 7399 return set_live_p (PATTERN (insn), insn, counts);
4793dca1 7400 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
0021de69
DB
7401 {
7402 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
7403 {
7404 rtx elt = XVECEXP (PATTERN (insn), 0, i);
4793dca1 7405
0021de69
DB
7406 if (GET_CODE (elt) == SET)
7407 {
7408 if (set_live_p (elt, insn, counts))
7409 return true;
7410 }
7411 else if (GET_CODE (elt) != CLOBBER && GET_CODE (elt) != USE)
7412 return true;
7413 }
7414 return false;
7415 }
4793dca1
JH
7416 else
7417 return true;
7418}
7419
7420/* Return true if libcall is dead as a whole. */
7421
7422static bool
7080f735 7423dead_libcall_p (rtx insn, int *counts)
4793dca1 7424{
0c19a26f
RS
7425 rtx note, set, new;
7426
4793dca1
JH
7427 /* See if there's a REG_EQUAL note on this insn and try to
7428 replace the source with the REG_EQUAL expression.
7429
7430 We assume that insns with REG_RETVALs can only be reg->reg
7431 copies at this point. */
7432 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
0c19a26f
RS
7433 if (!note)
7434 return false;
7435
7436 set = single_set (insn);
7437 if (!set)
7438 return false;
4793dca1 7439
0c19a26f
RS
7440 new = simplify_rtx (XEXP (note, 0));
7441 if (!new)
7442 new = XEXP (note, 0);
4793dca1 7443
0c19a26f 7444 /* While changing insn, we must update the counts accordingly. */
9ab81df2 7445 count_reg_usage (insn, counts, -1);
1e150f2c 7446
0c19a26f
RS
7447 if (validate_change (insn, &SET_SRC (set), new, 0))
7448 {
9ab81df2 7449 count_reg_usage (insn, counts, 1);
0c19a26f
RS
7450 remove_note (insn, find_reg_note (insn, REG_RETVAL, NULL_RTX));
7451 remove_note (insn, note);
7452 return true;
7453 }
7454
7455 if (CONSTANT_P (new))
7456 {
7457 new = force_const_mem (GET_MODE (SET_DEST (set)), new);
7458 if (new && validate_change (insn, &SET_SRC (set), new, 0))
4793dca1 7459 {
9ab81df2 7460 count_reg_usage (insn, counts, 1);
4793dca1 7461 remove_note (insn, find_reg_note (insn, REG_RETVAL, NULL_RTX));
1e150f2c 7462 remove_note (insn, note);
4793dca1
JH
7463 return true;
7464 }
7465 }
7080f735 7466
9ab81df2 7467 count_reg_usage (insn, counts, 1);
4793dca1
JH
7468 return false;
7469}
7470
7afe21cc
RK
7471/* Scan all the insns and delete any that are dead; i.e., they store a register
7472 that is never used or they copy a register to itself.
7473
c6a26dc4
JL
7474 This is used to remove insns made obviously dead by cse, loop or other
7475 optimizations. It improves the heuristics in loop since it won't try to
7476 move dead invariants out of loops or make givs for dead quantities. The
7477 remaining passes of the compilation are also sped up. */
7afe21cc 7478
3dec4024 7479int
7080f735 7480delete_trivially_dead_insns (rtx insns, int nreg)
7afe21cc 7481{
4da896b2 7482 int *counts;
77fa0940 7483 rtx insn, prev;
614bb5d4 7484 int in_libcall = 0, dead_libcall = 0;
3dec4024 7485 int ndead = 0, nlastdead, niterations = 0;
7afe21cc 7486
3dec4024 7487 timevar_push (TV_DELETE_TRIVIALLY_DEAD);
7afe21cc 7488 /* First count the number of times each register is used. */
703ad42b 7489 counts = xcalloc (nreg, sizeof (int));
7afe21cc 7490 for (insn = next_real_insn (insns); insn; insn = next_real_insn (insn))
9ab81df2 7491 count_reg_usage (insn, counts, 1);
7afe21cc 7492
3dec4024
JH
7493 do
7494 {
7495 nlastdead = ndead;
7496 niterations++;
7497 /* Go from the last insn to the first and delete insns that only set unused
7498 registers or copy a register to itself. As we delete an insn, remove
7499 usage counts for registers it uses.
7500
7501 The first jump optimization pass may leave a real insn as the last
7502 insn in the function. We must not skip that insn or we may end
7503 up deleting code that is not really dead. */
7504 insn = get_last_insn ();
7505 if (! INSN_P (insn))
7506 insn = prev_real_insn (insn);
0cedb36c 7507
3dec4024 7508 for (; insn; insn = prev)
7afe21cc 7509 {
4793dca1 7510 int live_insn = 0;
7afe21cc 7511
3dec4024 7512 prev = prev_real_insn (insn);
7afe21cc 7513
4793dca1
JH
7514 /* Don't delete any insns that are part of a libcall block unless
7515 we can delete the whole libcall block.
7afe21cc 7516
4793dca1
JH
7517 Flow or loop might get confused if we did that. Remember
7518 that we are scanning backwards. */
7519 if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
7520 {
7521 in_libcall = 1;
dc42616f 7522 live_insn = 1;
1e150f2c 7523 dead_libcall = dead_libcall_p (insn, counts);
4793dca1
JH
7524 }
7525 else if (in_libcall)
7526 live_insn = ! dead_libcall;
7527 else
7528 live_insn = insn_live_p (insn, counts);
7afe21cc 7529
4793dca1
JH
7530 /* If this is a dead insn, delete it and show registers in it aren't
7531 being used. */
7afe21cc 7532
4793dca1
JH
7533 if (! live_insn)
7534 {
9ab81df2 7535 count_reg_usage (insn, counts, -1);
3dec4024
JH
7536 delete_insn_and_edges (insn);
7537 ndead++;
4793dca1 7538 }
e4890d45 7539
4793dca1
JH
7540 if (find_reg_note (insn, REG_LIBCALL, NULL_RTX))
7541 {
7542 in_libcall = 0;
7543 dead_libcall = 0;
7544 }
614bb5d4 7545 }
68252e27
KH
7546 }
7547 while (ndead != nlastdead);
4da896b2 7548
c263766c
RH
7549 if (dump_file && ndead)
7550 fprintf (dump_file, "Deleted %i trivially dead insns; %i iterations\n",
3dec4024 7551 ndead, niterations);
4da896b2
MM
7552 /* Clean up. */
7553 free (counts);
3dec4024
JH
7554 timevar_pop (TV_DELETE_TRIVIALLY_DEAD);
7555 return ndead;
7afe21cc 7556}
e129d93a
ILT
7557
7558/* This function is called via for_each_rtx. The argument, NEWREG, is
7559 a condition code register with the desired mode. If we are looking
7560 at the same register in a different mode, replace it with
7561 NEWREG. */
7562
7563static int
7564cse_change_cc_mode (rtx *loc, void *data)
7565{
7566 rtx newreg = (rtx) data;
7567
7568 if (*loc
f8cfc6aa 7569 && REG_P (*loc)
e129d93a
ILT
7570 && REGNO (*loc) == REGNO (newreg)
7571 && GET_MODE (*loc) != GET_MODE (newreg))
7572 {
7573 *loc = newreg;
7574 return -1;
7575 }
7576 return 0;
7577}
7578
7579/* Change the mode of any reference to the register REGNO (NEWREG) to
7580 GET_MODE (NEWREG), starting at START. Stop before END. Stop at
2e802a6f 7581 any instruction which modifies NEWREG. */
e129d93a
ILT
7582
7583static void
7584cse_change_cc_mode_insns (rtx start, rtx end, rtx newreg)
7585{
7586 rtx insn;
7587
7588 for (insn = start; insn != end; insn = NEXT_INSN (insn))
7589 {
7590 if (! INSN_P (insn))
7591 continue;
7592
2e802a6f 7593 if (reg_set_p (newreg, insn))
e129d93a
ILT
7594 return;
7595
7596 for_each_rtx (&PATTERN (insn), cse_change_cc_mode, newreg);
7597 for_each_rtx (&REG_NOTES (insn), cse_change_cc_mode, newreg);
7598 }
7599}
7600
7601/* BB is a basic block which finishes with CC_REG as a condition code
7602 register which is set to CC_SRC. Look through the successors of BB
7603 to find blocks which have a single predecessor (i.e., this one),
7604 and look through those blocks for an assignment to CC_REG which is
7605 equivalent to CC_SRC. CAN_CHANGE_MODE indicates whether we are
7606 permitted to change the mode of CC_SRC to a compatible mode. This
7607 returns VOIDmode if no equivalent assignments were found.
7608 Otherwise it returns the mode which CC_SRC should wind up with.
7609
7610 The main complexity in this function is handling the mode issues.
7611 We may have more than one duplicate which we can eliminate, and we
7612 try to find a mode which will work for multiple duplicates. */
7613
7614static enum machine_mode
7615cse_cc_succs (basic_block bb, rtx cc_reg, rtx cc_src, bool can_change_mode)
7616{
7617 bool found_equiv;
7618 enum machine_mode mode;
7619 unsigned int insn_count;
7620 edge e;
7621 rtx insns[2];
7622 enum machine_mode modes[2];
7623 rtx last_insns[2];
7624 unsigned int i;
7625 rtx newreg;
7626
7627 /* We expect to have two successors. Look at both before picking
7628 the final mode for the comparison. If we have more successors
7629 (i.e., some sort of table jump, although that seems unlikely),
7630 then we require all beyond the first two to use the same
7631 mode. */
7632
7633 found_equiv = false;
7634 mode = GET_MODE (cc_src);
7635 insn_count = 0;
7636 for (e = bb->succ; e; e = e->succ_next)
7637 {
7638 rtx insn;
7639 rtx end;
7640
7641 if (e->flags & EDGE_COMPLEX)
7642 continue;
7643
7644 if (! e->dest->pred
7645 || e->dest->pred->pred_next
7646 || e->dest == EXIT_BLOCK_PTR)
7647 continue;
7648
7649 end = NEXT_INSN (BB_END (e->dest));
7650 for (insn = BB_HEAD (e->dest); insn != end; insn = NEXT_INSN (insn))
7651 {
7652 rtx set;
7653
7654 if (! INSN_P (insn))
7655 continue;
7656
7657 /* If CC_SRC is modified, we have to stop looking for
7658 something which uses it. */
7659 if (modified_in_p (cc_src, insn))
7660 break;
7661
7662 /* Check whether INSN sets CC_REG to CC_SRC. */
7663 set = single_set (insn);
7664 if (set
f8cfc6aa 7665 && REG_P (SET_DEST (set))
e129d93a
ILT
7666 && REGNO (SET_DEST (set)) == REGNO (cc_reg))
7667 {
7668 bool found;
7669 enum machine_mode set_mode;
7670 enum machine_mode comp_mode;
7671
7672 found = false;
7673 set_mode = GET_MODE (SET_SRC (set));
7674 comp_mode = set_mode;
7675 if (rtx_equal_p (cc_src, SET_SRC (set)))
7676 found = true;
7677 else if (GET_CODE (cc_src) == COMPARE
7678 && GET_CODE (SET_SRC (set)) == COMPARE
1f44254c 7679 && mode != set_mode
e129d93a
ILT
7680 && rtx_equal_p (XEXP (cc_src, 0),
7681 XEXP (SET_SRC (set), 0))
7682 && rtx_equal_p (XEXP (cc_src, 1),
7683 XEXP (SET_SRC (set), 1)))
7684
7685 {
5fd9b178 7686 comp_mode = targetm.cc_modes_compatible (mode, set_mode);
e129d93a
ILT
7687 if (comp_mode != VOIDmode
7688 && (can_change_mode || comp_mode == mode))
7689 found = true;
7690 }
7691
7692 if (found)
7693 {
7694 found_equiv = true;
1f44254c 7695 if (insn_count < ARRAY_SIZE (insns))
e129d93a
ILT
7696 {
7697 insns[insn_count] = insn;
7698 modes[insn_count] = set_mode;
7699 last_insns[insn_count] = end;
7700 ++insn_count;
7701
1f44254c
ILT
7702 if (mode != comp_mode)
7703 {
7704 if (! can_change_mode)
7705 abort ();
7706 mode = comp_mode;
7707 PUT_MODE (cc_src, mode);
7708 }
e129d93a
ILT
7709 }
7710 else
7711 {
7712 if (set_mode != mode)
1f44254c
ILT
7713 {
7714 /* We found a matching expression in the
7715 wrong mode, but we don't have room to
7716 store it in the array. Punt. This case
7717 should be rare. */
7718 break;
7719 }
e129d93a
ILT
7720 /* INSN sets CC_REG to a value equal to CC_SRC
7721 with the right mode. We can simply delete
7722 it. */
7723 delete_insn (insn);
7724 }
7725
7726 /* We found an instruction to delete. Keep looking,
7727 in the hopes of finding a three-way jump. */
7728 continue;
7729 }
7730
7731 /* We found an instruction which sets the condition
7732 code, so don't look any farther. */
7733 break;
7734 }
7735
7736 /* If INSN sets CC_REG in some other way, don't look any
7737 farther. */
7738 if (reg_set_p (cc_reg, insn))
7739 break;
7740 }
7741
7742 /* If we fell off the bottom of the block, we can keep looking
7743 through successors. We pass CAN_CHANGE_MODE as false because
7744 we aren't prepared to handle compatibility between the
7745 further blocks and this block. */
7746 if (insn == end)
7747 {
1f44254c
ILT
7748 enum machine_mode submode;
7749
7750 submode = cse_cc_succs (e->dest, cc_reg, cc_src, false);
7751 if (submode != VOIDmode)
7752 {
7753 if (submode != mode)
7754 abort ();
7755 found_equiv = true;
7756 can_change_mode = false;
7757 }
e129d93a
ILT
7758 }
7759 }
7760
7761 if (! found_equiv)
7762 return VOIDmode;
7763
7764 /* Now INSN_COUNT is the number of instructions we found which set
7765 CC_REG to a value equivalent to CC_SRC. The instructions are in
7766 INSNS. The modes used by those instructions are in MODES. */
7767
7768 newreg = NULL_RTX;
7769 for (i = 0; i < insn_count; ++i)
7770 {
7771 if (modes[i] != mode)
7772 {
7773 /* We need to change the mode of CC_REG in INSNS[i] and
7774 subsequent instructions. */
7775 if (! newreg)
7776 {
7777 if (GET_MODE (cc_reg) == mode)
7778 newreg = cc_reg;
7779 else
7780 newreg = gen_rtx_REG (mode, REGNO (cc_reg));
7781 }
7782 cse_change_cc_mode_insns (NEXT_INSN (insns[i]), last_insns[i],
7783 newreg);
7784 }
7785
7786 delete_insn (insns[i]);
7787 }
7788
7789 return mode;
7790}
7791
7792/* If we have a fixed condition code register (or two), walk through
7793 the instructions and try to eliminate duplicate assignments. */
7794
7795void
7796cse_condition_code_reg (void)
7797{
7798 unsigned int cc_regno_1;
7799 unsigned int cc_regno_2;
7800 rtx cc_reg_1;
7801 rtx cc_reg_2;
7802 basic_block bb;
7803
5fd9b178 7804 if (! targetm.fixed_condition_code_regs (&cc_regno_1, &cc_regno_2))
e129d93a
ILT
7805 return;
7806
7807 cc_reg_1 = gen_rtx_REG (CCmode, cc_regno_1);
7808 if (cc_regno_2 != INVALID_REGNUM)
7809 cc_reg_2 = gen_rtx_REG (CCmode, cc_regno_2);
7810 else
7811 cc_reg_2 = NULL_RTX;
7812
7813 FOR_EACH_BB (bb)
7814 {
7815 rtx last_insn;
7816 rtx cc_reg;
7817 rtx insn;
7818 rtx cc_src_insn;
7819 rtx cc_src;
7820 enum machine_mode mode;
1f44254c 7821 enum machine_mode orig_mode;
e129d93a
ILT
7822
7823 /* Look for blocks which end with a conditional jump based on a
7824 condition code register. Then look for the instruction which
7825 sets the condition code register. Then look through the
7826 successor blocks for instructions which set the condition
7827 code register to the same value. There are other possible
7828 uses of the condition code register, but these are by far the
7829 most common and the ones which we are most likely to be able
7830 to optimize. */
7831
7832 last_insn = BB_END (bb);
4b4bf941 7833 if (!JUMP_P (last_insn))
e129d93a
ILT
7834 continue;
7835
7836 if (reg_referenced_p (cc_reg_1, PATTERN (last_insn)))
7837 cc_reg = cc_reg_1;
7838 else if (cc_reg_2 && reg_referenced_p (cc_reg_2, PATTERN (last_insn)))
7839 cc_reg = cc_reg_2;
7840 else
7841 continue;
7842
7843 cc_src_insn = NULL_RTX;
7844 cc_src = NULL_RTX;
7845 for (insn = PREV_INSN (last_insn);
7846 insn && insn != PREV_INSN (BB_HEAD (bb));
7847 insn = PREV_INSN (insn))
7848 {
7849 rtx set;
7850
7851 if (! INSN_P (insn))
7852 continue;
7853 set = single_set (insn);
7854 if (set
f8cfc6aa 7855 && REG_P (SET_DEST (set))
e129d93a
ILT
7856 && REGNO (SET_DEST (set)) == REGNO (cc_reg))
7857 {
7858 cc_src_insn = insn;
7859 cc_src = SET_SRC (set);
7860 break;
7861 }
7862 else if (reg_set_p (cc_reg, insn))
7863 break;
7864 }
7865
7866 if (! cc_src_insn)
7867 continue;
7868
7869 if (modified_between_p (cc_src, cc_src_insn, NEXT_INSN (last_insn)))
7870 continue;
7871
7872 /* Now CC_REG is a condition code register used for a
7873 conditional jump at the end of the block, and CC_SRC, in
7874 CC_SRC_INSN, is the value to which that condition code
7875 register is set, and CC_SRC is still meaningful at the end of
7876 the basic block. */
7877
1f44254c 7878 orig_mode = GET_MODE (cc_src);
e129d93a 7879 mode = cse_cc_succs (bb, cc_reg, cc_src, true);
1f44254c 7880 if (mode != VOIDmode)
e129d93a 7881 {
1f44254c
ILT
7882 if (mode != GET_MODE (cc_src))
7883 abort ();
7884 if (mode != orig_mode)
2e802a6f
KH
7885 {
7886 rtx newreg = gen_rtx_REG (mode, REGNO (cc_reg));
7887
7888 /* Change the mode of CC_REG in CC_SRC_INSN to
7889 GET_MODE (NEWREG). */
7890 for_each_rtx (&PATTERN (cc_src_insn), cse_change_cc_mode,
7891 newreg);
7892 for_each_rtx (&REG_NOTES (cc_src_insn), cse_change_cc_mode,
7893 newreg);
7894
7895 /* Do the same in the following insns that use the
7896 current value of CC_REG within BB. */
7897 cse_change_cc_mode_insns (NEXT_INSN (cc_src_insn),
7898 NEXT_INSN (last_insn),
7899 newreg);
7900 }
e129d93a
ILT
7901 }
7902 }
7903}