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7afe21cc | 1 | /* Common subexpression elimination for GNU compiler. |
d1e082c2 | 2 | Copyright (C) 1987-2013 Free Software Foundation, Inc. |
7afe21cc | 3 | |
1322177d | 4 | This file is part of GCC. |
7afe21cc | 5 | |
1322177d LB |
6 | GCC is free software; you can redistribute it and/or modify it under |
7 | the terms of the GNU General Public License as published by the Free | |
9dcd6f09 | 8 | Software Foundation; either version 3, or (at your option) any later |
1322177d | 9 | version. |
7afe21cc | 10 | |
1322177d LB |
11 | GCC is distributed in the hope that it will be useful, but WITHOUT ANY |
12 | WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
13 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
14 | for more details. | |
7afe21cc RK |
15 | |
16 | You should have received a copy of the GNU General Public License | |
9dcd6f09 NC |
17 | along with GCC; see the file COPYING3. If not see |
18 | <http://www.gnu.org/licenses/>. */ | |
7afe21cc | 19 | |
7afe21cc | 20 | #include "config.h" |
670ee920 | 21 | #include "system.h" |
4977bab6 ZW |
22 | #include "coretypes.h" |
23 | #include "tm.h" | |
7afe21cc | 24 | #include "rtl.h" |
6baf1cc8 | 25 | #include "tm_p.h" |
7afe21cc | 26 | #include "hard-reg-set.h" |
7932a3db | 27 | #include "regs.h" |
630c79be | 28 | #include "basic-block.h" |
7afe21cc | 29 | #include "flags.h" |
7afe21cc RK |
30 | #include "insn-config.h" |
31 | #include "recog.h" | |
49ad7cfa | 32 | #include "function.h" |
956d6950 | 33 | #include "expr.h" |
718f9c0f | 34 | #include "diagnostic-core.h" |
50b2596f | 35 | #include "toplev.h" |
1497faf6 | 36 | #include "ggc.h" |
26771da7 | 37 | #include "except.h" |
3c50106f | 38 | #include "target.h" |
9bf8cfbf | 39 | #include "params.h" |
2f93eea8 | 40 | #include "rtlhooks-def.h" |
ef330312 | 41 | #include "tree-pass.h" |
6fb5fa3c DB |
42 | #include "df.h" |
43 | #include "dbgcnt.h" | |
27ec0502 | 44 | #include "pointer-set.h" |
7afe21cc RK |
45 | |
46 | /* The basic idea of common subexpression elimination is to go | |
47 | through the code, keeping a record of expressions that would | |
48 | have the same value at the current scan point, and replacing | |
49 | expressions encountered with the cheapest equivalent expression. | |
50 | ||
51 | It is too complicated to keep track of the different possibilities | |
e48a7fbe JL |
52 | when control paths merge in this code; so, at each label, we forget all |
53 | that is known and start fresh. This can be described as processing each | |
54 | extended basic block separately. We have a separate pass to perform | |
55 | global CSE. | |
56 | ||
57 | Note CSE can turn a conditional or computed jump into a nop or | |
58 | an unconditional jump. When this occurs we arrange to run the jump | |
59 | optimizer after CSE to delete the unreachable code. | |
7afe21cc RK |
60 | |
61 | We use two data structures to record the equivalent expressions: | |
1bb98cec DM |
62 | a hash table for most expressions, and a vector of "quantity |
63 | numbers" to record equivalent (pseudo) registers. | |
7afe21cc RK |
64 | |
65 | The use of the special data structure for registers is desirable | |
66 | because it is faster. It is possible because registers references | |
67 | contain a fairly small number, the register number, taken from | |
68 | a contiguously allocated series, and two register references are | |
69 | identical if they have the same number. General expressions | |
70 | do not have any such thing, so the only way to retrieve the | |
71 | information recorded on an expression other than a register | |
72 | is to keep it in a hash table. | |
73 | ||
74 | Registers and "quantity numbers": | |
278a83b2 | 75 | |
7afe21cc RK |
76 | At the start of each basic block, all of the (hardware and pseudo) |
77 | registers used in the function are given distinct quantity | |
78 | numbers to indicate their contents. During scan, when the code | |
79 | copies one register into another, we copy the quantity number. | |
80 | When a register is loaded in any other way, we allocate a new | |
81 | quantity number to describe the value generated by this operation. | |
459281be | 82 | `REG_QTY (N)' records what quantity register N is currently thought |
7afe21cc RK |
83 | of as containing. |
84 | ||
08a69267 | 85 | All real quantity numbers are greater than or equal to zero. |
459281be | 86 | If register N has not been assigned a quantity, `REG_QTY (N)' will |
08a69267 | 87 | equal -N - 1, which is always negative. |
7afe21cc | 88 | |
08a69267 RS |
89 | Quantity numbers below zero do not exist and none of the `qty_table' |
90 | entries should be referenced with a negative index. | |
7afe21cc RK |
91 | |
92 | We also maintain a bidirectional chain of registers for each | |
1bb98cec DM |
93 | quantity number. The `qty_table` members `first_reg' and `last_reg', |
94 | and `reg_eqv_table' members `next' and `prev' hold these chains. | |
7afe21cc RK |
95 | |
96 | The first register in a chain is the one whose lifespan is least local. | |
97 | Among equals, it is the one that was seen first. | |
98 | We replace any equivalent register with that one. | |
99 | ||
100 | If two registers have the same quantity number, it must be true that | |
1bb98cec | 101 | REG expressions with qty_table `mode' must be in the hash table for both |
7afe21cc RK |
102 | registers and must be in the same class. |
103 | ||
104 | The converse is not true. Since hard registers may be referenced in | |
105 | any mode, two REG expressions might be equivalent in the hash table | |
106 | but not have the same quantity number if the quantity number of one | |
107 | of the registers is not the same mode as those expressions. | |
278a83b2 | 108 | |
7afe21cc RK |
109 | Constants and quantity numbers |
110 | ||
111 | When a quantity has a known constant value, that value is stored | |
1bb98cec | 112 | in the appropriate qty_table `const_rtx'. This is in addition to |
7afe21cc RK |
113 | putting the constant in the hash table as is usual for non-regs. |
114 | ||
d45cf215 | 115 | Whether a reg or a constant is preferred is determined by the configuration |
7afe21cc RK |
116 | macro CONST_COSTS and will often depend on the constant value. In any |
117 | event, expressions containing constants can be simplified, by fold_rtx. | |
118 | ||
119 | When a quantity has a known nearly constant value (such as an address | |
1bb98cec DM |
120 | of a stack slot), that value is stored in the appropriate qty_table |
121 | `const_rtx'. | |
7afe21cc RK |
122 | |
123 | Integer constants don't have a machine mode. However, cse | |
124 | determines the intended machine mode from the destination | |
125 | of the instruction that moves the constant. The machine mode | |
126 | is recorded in the hash table along with the actual RTL | |
127 | constant expression so that different modes are kept separate. | |
128 | ||
129 | Other expressions: | |
130 | ||
131 | To record known equivalences among expressions in general | |
132 | we use a hash table called `table'. It has a fixed number of buckets | |
133 | that contain chains of `struct table_elt' elements for expressions. | |
134 | These chains connect the elements whose expressions have the same | |
135 | hash codes. | |
136 | ||
137 | Other chains through the same elements connect the elements which | |
138 | currently have equivalent values. | |
139 | ||
140 | Register references in an expression are canonicalized before hashing | |
1bb98cec | 141 | the expression. This is done using `reg_qty' and qty_table `first_reg'. |
7afe21cc RK |
142 | The hash code of a register reference is computed using the quantity |
143 | number, not the register number. | |
144 | ||
145 | When the value of an expression changes, it is necessary to remove from the | |
146 | hash table not just that expression but all expressions whose values | |
147 | could be different as a result. | |
148 | ||
149 | 1. If the value changing is in memory, except in special cases | |
150 | ANYTHING referring to memory could be changed. That is because | |
151 | nobody knows where a pointer does not point. | |
152 | The function `invalidate_memory' removes what is necessary. | |
153 | ||
154 | The special cases are when the address is constant or is | |
155 | a constant plus a fixed register such as the frame pointer | |
156 | or a static chain pointer. When such addresses are stored in, | |
157 | we can tell exactly which other such addresses must be invalidated | |
158 | due to overlap. `invalidate' does this. | |
159 | All expressions that refer to non-constant | |
160 | memory addresses are also invalidated. `invalidate_memory' does this. | |
161 | ||
162 | 2. If the value changing is a register, all expressions | |
163 | containing references to that register, and only those, | |
164 | must be removed. | |
165 | ||
166 | Because searching the entire hash table for expressions that contain | |
167 | a register is very slow, we try to figure out when it isn't necessary. | |
168 | Precisely, this is necessary only when expressions have been | |
169 | entered in the hash table using this register, and then the value has | |
170 | changed, and then another expression wants to be added to refer to | |
171 | the register's new value. This sequence of circumstances is rare | |
172 | within any one basic block. | |
173 | ||
459281be KH |
174 | `REG_TICK' and `REG_IN_TABLE', accessors for members of |
175 | cse_reg_info, are used to detect this case. REG_TICK (i) is | |
176 | incremented whenever a value is stored in register i. | |
177 | REG_IN_TABLE (i) holds -1 if no references to register i have been | |
178 | entered in the table; otherwise, it contains the value REG_TICK (i) | |
179 | had when the references were entered. If we want to enter a | |
180 | reference and REG_IN_TABLE (i) != REG_TICK (i), we must scan and | |
181 | remove old references. Until we want to enter a new entry, the | |
182 | mere fact that the two vectors don't match makes the entries be | |
183 | ignored if anyone tries to match them. | |
7afe21cc RK |
184 | |
185 | Registers themselves are entered in the hash table as well as in | |
459281be KH |
186 | the equivalent-register chains. However, `REG_TICK' and |
187 | `REG_IN_TABLE' do not apply to expressions which are simple | |
7afe21cc RK |
188 | register references. These expressions are removed from the table |
189 | immediately when they become invalid, and this can be done even if | |
190 | we do not immediately search for all the expressions that refer to | |
191 | the register. | |
192 | ||
193 | A CLOBBER rtx in an instruction invalidates its operand for further | |
194 | reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK | |
195 | invalidates everything that resides in memory. | |
196 | ||
197 | Related expressions: | |
198 | ||
199 | Constant expressions that differ only by an additive integer | |
200 | are called related. When a constant expression is put in | |
201 | the table, the related expression with no constant term | |
202 | is also entered. These are made to point at each other | |
203 | so that it is possible to find out if there exists any | |
204 | register equivalent to an expression related to a given expression. */ | |
278a83b2 | 205 | |
1bb98cec DM |
206 | /* Length of qty_table vector. We know in advance we will not need |
207 | a quantity number this big. */ | |
7afe21cc RK |
208 | |
209 | static int max_qty; | |
210 | ||
211 | /* Next quantity number to be allocated. | |
212 | This is 1 + the largest number needed so far. */ | |
213 | ||
214 | static int next_qty; | |
215 | ||
1bb98cec | 216 | /* Per-qty information tracking. |
7afe21cc | 217 | |
1bb98cec DM |
218 | `first_reg' and `last_reg' track the head and tail of the |
219 | chain of registers which currently contain this quantity. | |
7afe21cc | 220 | |
1bb98cec | 221 | `mode' contains the machine mode of this quantity. |
7afe21cc | 222 | |
1bb98cec DM |
223 | `const_rtx' holds the rtx of the constant value of this |
224 | quantity, if known. A summations of the frame/arg pointer | |
225 | and a constant can also be entered here. When this holds | |
226 | a known value, `const_insn' is the insn which stored the | |
227 | constant value. | |
7afe21cc | 228 | |
1bb98cec DM |
229 | `comparison_{code,const,qty}' are used to track when a |
230 | comparison between a quantity and some constant or register has | |
231 | been passed. In such a case, we know the results of the comparison | |
232 | in case we see it again. These members record a comparison that | |
233 | is known to be true. `comparison_code' holds the rtx code of such | |
234 | a comparison, else it is set to UNKNOWN and the other two | |
235 | comparison members are undefined. `comparison_const' holds | |
236 | the constant being compared against, or zero if the comparison | |
237 | is not against a constant. `comparison_qty' holds the quantity | |
238 | being compared against when the result is known. If the comparison | |
239 | is not with a register, `comparison_qty' is -1. */ | |
7afe21cc | 240 | |
1bb98cec DM |
241 | struct qty_table_elem |
242 | { | |
243 | rtx const_rtx; | |
244 | rtx const_insn; | |
245 | rtx comparison_const; | |
246 | int comparison_qty; | |
770ae6cc | 247 | unsigned int first_reg, last_reg; |
496324d0 DN |
248 | /* The sizes of these fields should match the sizes of the |
249 | code and mode fields of struct rtx_def (see rtl.h). */ | |
250 | ENUM_BITFIELD(rtx_code) comparison_code : 16; | |
251 | ENUM_BITFIELD(machine_mode) mode : 8; | |
1bb98cec | 252 | }; |
7afe21cc | 253 | |
1bb98cec DM |
254 | /* The table of all qtys, indexed by qty number. */ |
255 | static struct qty_table_elem *qty_table; | |
7afe21cc | 256 | |
fc188d37 AK |
257 | /* Structure used to pass arguments via for_each_rtx to function |
258 | cse_change_cc_mode. */ | |
259 | struct change_cc_mode_args | |
260 | { | |
261 | rtx insn; | |
262 | rtx newreg; | |
263 | }; | |
264 | ||
7afe21cc RK |
265 | #ifdef HAVE_cc0 |
266 | /* For machines that have a CC0, we do not record its value in the hash | |
267 | table since its use is guaranteed to be the insn immediately following | |
268 | its definition and any other insn is presumed to invalidate it. | |
269 | ||
96fb470d SB |
270 | Instead, we store below the current and last value assigned to CC0. |
271 | If it should happen to be a constant, it is stored in preference | |
272 | to the actual assigned value. In case it is a constant, we store | |
273 | the mode in which the constant should be interpreted. */ | |
7afe21cc | 274 | |
96fb470d SB |
275 | static rtx this_insn_cc0, prev_insn_cc0; |
276 | static enum machine_mode this_insn_cc0_mode, prev_insn_cc0_mode; | |
4977bab6 | 277 | #endif |
7afe21cc RK |
278 | |
279 | /* Insn being scanned. */ | |
280 | ||
281 | static rtx this_insn; | |
f40751dd | 282 | static bool optimize_this_for_speed_p; |
7afe21cc | 283 | |
71d306d1 DE |
284 | /* Index by register number, gives the number of the next (or |
285 | previous) register in the chain of registers sharing the same | |
7afe21cc RK |
286 | value. |
287 | ||
288 | Or -1 if this register is at the end of the chain. | |
289 | ||
459281be | 290 | If REG_QTY (N) == -N - 1, reg_eqv_table[N].next is undefined. */ |
1bb98cec DM |
291 | |
292 | /* Per-register equivalence chain. */ | |
293 | struct reg_eqv_elem | |
294 | { | |
295 | int next, prev; | |
296 | }; | |
7afe21cc | 297 | |
1bb98cec DM |
298 | /* The table of all register equivalence chains. */ |
299 | static struct reg_eqv_elem *reg_eqv_table; | |
7afe21cc | 300 | |
14a774a9 RK |
301 | struct cse_reg_info |
302 | { | |
bc5e3b54 KH |
303 | /* The timestamp at which this register is initialized. */ |
304 | unsigned int timestamp; | |
9b1549b8 DM |
305 | |
306 | /* The quantity number of the register's current contents. */ | |
307 | int reg_qty; | |
308 | ||
309 | /* The number of times the register has been altered in the current | |
310 | basic block. */ | |
311 | int reg_tick; | |
312 | ||
30f72379 MM |
313 | /* The REG_TICK value at which rtx's containing this register are |
314 | valid in the hash table. If this does not equal the current | |
315 | reg_tick value, such expressions existing in the hash table are | |
316 | invalid. */ | |
317 | int reg_in_table; | |
46081bb3 SH |
318 | |
319 | /* The SUBREG that was set when REG_TICK was last incremented. Set | |
320 | to -1 if the last store was to the whole register, not a subreg. */ | |
5dd78e9a | 321 | unsigned int subreg_ticked; |
30f72379 | 322 | }; |
7afe21cc | 323 | |
bc5e3b54 | 324 | /* A table of cse_reg_info indexed by register numbers. */ |
f00822b2 | 325 | static struct cse_reg_info *cse_reg_info_table; |
c1edba58 | 326 | |
bc5e3b54 KH |
327 | /* The size of the above table. */ |
328 | static unsigned int cse_reg_info_table_size; | |
9b1549b8 | 329 | |
bc5e3b54 KH |
330 | /* The index of the first entry that has not been initialized. */ |
331 | static unsigned int cse_reg_info_table_first_uninitialized; | |
7afe21cc | 332 | |
bc5e3b54 | 333 | /* The timestamp at the beginning of the current run of |
932ad4d9 SB |
334 | cse_extended_basic_block. We increment this variable at the beginning of |
335 | the current run of cse_extended_basic_block. The timestamp field of a | |
bc5e3b54 KH |
336 | cse_reg_info entry matches the value of this variable if and only |
337 | if the entry has been initialized during the current run of | |
932ad4d9 | 338 | cse_extended_basic_block. */ |
bc5e3b54 | 339 | static unsigned int cse_reg_info_timestamp; |
7afe21cc | 340 | |
278a83b2 | 341 | /* A HARD_REG_SET containing all the hard registers for which there is |
7afe21cc RK |
342 | currently a REG expression in the hash table. Note the difference |
343 | from the above variables, which indicate if the REG is mentioned in some | |
344 | expression in the table. */ | |
345 | ||
346 | static HARD_REG_SET hard_regs_in_table; | |
347 | ||
2aac3a01 EB |
348 | /* True if CSE has altered the CFG. */ |
349 | static bool cse_cfg_altered; | |
7afe21cc | 350 | |
2aac3a01 EB |
351 | /* True if CSE has altered conditional jump insns in such a way |
352 | that jump optimization should be redone. */ | |
353 | static bool cse_jumps_altered; | |
7afe21cc | 354 | |
2aac3a01 EB |
355 | /* True if we put a LABEL_REF into the hash table for an INSN |
356 | without a REG_LABEL_OPERAND, we have to rerun jump after CSE | |
357 | to put in the note. */ | |
358 | static bool recorded_label_ref; | |
a5dfb4ee | 359 | |
7afe21cc RK |
360 | /* canon_hash stores 1 in do_not_record |
361 | if it notices a reference to CC0, PC, or some other volatile | |
362 | subexpression. */ | |
363 | ||
364 | static int do_not_record; | |
365 | ||
366 | /* canon_hash stores 1 in hash_arg_in_memory | |
367 | if it notices a reference to memory within the expression being hashed. */ | |
368 | ||
369 | static int hash_arg_in_memory; | |
370 | ||
7afe21cc RK |
371 | /* The hash table contains buckets which are chains of `struct table_elt's, |
372 | each recording one expression's information. | |
373 | That expression is in the `exp' field. | |
374 | ||
db048faf MM |
375 | The canon_exp field contains a canonical (from the point of view of |
376 | alias analysis) version of the `exp' field. | |
377 | ||
7afe21cc RK |
378 | Those elements with the same hash code are chained in both directions |
379 | through the `next_same_hash' and `prev_same_hash' fields. | |
380 | ||
381 | Each set of expressions with equivalent values | |
382 | are on a two-way chain through the `next_same_value' | |
383 | and `prev_same_value' fields, and all point with | |
384 | the `first_same_value' field at the first element in | |
385 | that chain. The chain is in order of increasing cost. | |
386 | Each element's cost value is in its `cost' field. | |
387 | ||
388 | The `in_memory' field is nonzero for elements that | |
389 | involve any reference to memory. These elements are removed | |
390 | whenever a write is done to an unidentified location in memory. | |
391 | To be safe, we assume that a memory address is unidentified unless | |
392 | the address is either a symbol constant or a constant plus | |
393 | the frame pointer or argument pointer. | |
394 | ||
7afe21cc RK |
395 | The `related_value' field is used to connect related expressions |
396 | (that differ by adding an integer). | |
397 | The related expressions are chained in a circular fashion. | |
398 | `related_value' is zero for expressions for which this | |
399 | chain is not useful. | |
400 | ||
401 | The `cost' field stores the cost of this element's expression. | |
630c79be BS |
402 | The `regcost' field stores the value returned by approx_reg_cost for |
403 | this element's expression. | |
7afe21cc RK |
404 | |
405 | The `is_const' flag is set if the element is a constant (including | |
406 | a fixed address). | |
407 | ||
408 | The `flag' field is used as a temporary during some search routines. | |
409 | ||
410 | The `mode' field is usually the same as GET_MODE (`exp'), but | |
411 | if `exp' is a CONST_INT and has no machine mode then the `mode' | |
412 | field is the mode it was being used as. Each constant is | |
413 | recorded separately for each mode it is used with. */ | |
414 | ||
7afe21cc RK |
415 | struct table_elt |
416 | { | |
417 | rtx exp; | |
db048faf | 418 | rtx canon_exp; |
7afe21cc RK |
419 | struct table_elt *next_same_hash; |
420 | struct table_elt *prev_same_hash; | |
421 | struct table_elt *next_same_value; | |
422 | struct table_elt *prev_same_value; | |
423 | struct table_elt *first_same_value; | |
424 | struct table_elt *related_value; | |
425 | int cost; | |
630c79be | 426 | int regcost; |
496324d0 DN |
427 | /* The size of this field should match the size |
428 | of the mode field of struct rtx_def (see rtl.h). */ | |
429 | ENUM_BITFIELD(machine_mode) mode : 8; | |
7afe21cc | 430 | char in_memory; |
7afe21cc RK |
431 | char is_const; |
432 | char flag; | |
433 | }; | |
434 | ||
7afe21cc RK |
435 | /* We don't want a lot of buckets, because we rarely have very many |
436 | things stored in the hash table, and a lot of buckets slows | |
437 | down a lot of loops that happen frequently. */ | |
9b1549b8 DM |
438 | #define HASH_SHIFT 5 |
439 | #define HASH_SIZE (1 << HASH_SHIFT) | |
440 | #define HASH_MASK (HASH_SIZE - 1) | |
7afe21cc RK |
441 | |
442 | /* Compute hash code of X in mode M. Special-case case where X is a pseudo | |
443 | register (hard registers may require `do_not_record' to be set). */ | |
444 | ||
445 | #define HASH(X, M) \ | |
f8cfc6aa | 446 | ((REG_P (X) && REGNO (X) >= FIRST_PSEUDO_REGISTER \ |
9b1549b8 DM |
447 | ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \ |
448 | : canon_hash (X, M)) & HASH_MASK) | |
7afe21cc | 449 | |
0516f6fe SB |
450 | /* Like HASH, but without side-effects. */ |
451 | #define SAFE_HASH(X, M) \ | |
452 | ((REG_P (X) && REGNO (X) >= FIRST_PSEUDO_REGISTER \ | |
453 | ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \ | |
454 | : safe_hash (X, M)) & HASH_MASK) | |
455 | ||
630c79be BS |
456 | /* Determine whether register number N is considered a fixed register for the |
457 | purpose of approximating register costs. | |
7afe21cc RK |
458 | It is desirable to replace other regs with fixed regs, to reduce need for |
459 | non-fixed hard regs. | |
553687c9 | 460 | A reg wins if it is either the frame pointer or designated as fixed. */ |
7afe21cc | 461 | #define FIXED_REGNO_P(N) \ |
8bc169f2 | 462 | ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \ |
6ab832bc | 463 | || fixed_regs[N] || global_regs[N]) |
7afe21cc RK |
464 | |
465 | /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed | |
ac07e066 RK |
466 | hard registers and pointers into the frame are the cheapest with a cost |
467 | of 0. Next come pseudos with a cost of one and other hard registers with | |
468 | a cost of 2. Aside from these special cases, call `rtx_cost'. */ | |
469 | ||
d67fb775 | 470 | #define CHEAP_REGNO(N) \ |
c3284718 | 471 | (REGNO_PTR_FRAME_P (N) \ |
d67fb775 | 472 | || (HARD_REGISTER_NUM_P (N) \ |
e7bb59fa | 473 | && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS)) |
7afe21cc | 474 | |
68f932c4 RS |
475 | #define COST(X) (REG_P (X) ? 0 : notreg_cost (X, SET, 1)) |
476 | #define COST_IN(X, OUTER, OPNO) (REG_P (X) ? 0 : notreg_cost (X, OUTER, OPNO)) | |
7afe21cc | 477 | |
30f72379 MM |
478 | /* Get the number of times this register has been updated in this |
479 | basic block. */ | |
480 | ||
bc5e3b54 | 481 | #define REG_TICK(N) (get_cse_reg_info (N)->reg_tick) |
30f72379 MM |
482 | |
483 | /* Get the point at which REG was recorded in the table. */ | |
484 | ||
bc5e3b54 | 485 | #define REG_IN_TABLE(N) (get_cse_reg_info (N)->reg_in_table) |
30f72379 | 486 | |
46081bb3 SH |
487 | /* Get the SUBREG set at the last increment to REG_TICK (-1 if not a |
488 | SUBREG). */ | |
489 | ||
bc5e3b54 | 490 | #define SUBREG_TICKED(N) (get_cse_reg_info (N)->subreg_ticked) |
46081bb3 | 491 | |
30f72379 MM |
492 | /* Get the quantity number for REG. */ |
493 | ||
bc5e3b54 | 494 | #define REG_QTY(N) (get_cse_reg_info (N)->reg_qty) |
30f72379 | 495 | |
7afe21cc | 496 | /* Determine if the quantity number for register X represents a valid index |
1bb98cec | 497 | into the qty_table. */ |
7afe21cc | 498 | |
08a69267 | 499 | #define REGNO_QTY_VALID_P(N) (REG_QTY (N) >= 0) |
7afe21cc | 500 | |
2c5bfdf7 AN |
501 | /* Compare table_elt X and Y and return true iff X is cheaper than Y. */ |
502 | ||
503 | #define CHEAPER(X, Y) \ | |
504 | (preferable ((X)->cost, (X)->regcost, (Y)->cost, (Y)->regcost) < 0) | |
505 | ||
9b1549b8 | 506 | static struct table_elt *table[HASH_SIZE]; |
7afe21cc RK |
507 | |
508 | /* Chain of `struct table_elt's made so far for this function | |
509 | but currently removed from the table. */ | |
510 | ||
511 | static struct table_elt *free_element_chain; | |
512 | ||
7afe21cc RK |
513 | /* Set to the cost of a constant pool reference if one was found for a |
514 | symbolic constant. If this was found, it means we should try to | |
515 | convert constants into constant pool entries if they don't fit in | |
516 | the insn. */ | |
517 | ||
518 | static int constant_pool_entries_cost; | |
dd0ba281 | 519 | static int constant_pool_entries_regcost; |
7afe21cc | 520 | |
24b97832 ILT |
521 | /* Trace a patch through the CFG. */ |
522 | ||
523 | struct branch_path | |
524 | { | |
525 | /* The basic block for this path entry. */ | |
526 | basic_block bb; | |
527 | }; | |
528 | ||
932ad4d9 SB |
529 | /* This data describes a block that will be processed by |
530 | cse_extended_basic_block. */ | |
6cd4575e | 531 | |
14a774a9 RK |
532 | struct cse_basic_block_data |
533 | { | |
6cd4575e RK |
534 | /* Total number of SETs in block. */ |
535 | int nsets; | |
6cd4575e RK |
536 | /* Size of current branch path, if any. */ |
537 | int path_size; | |
932ad4d9 | 538 | /* Current path, indicating which basic_blocks will be processed. */ |
24b97832 | 539 | struct branch_path *path; |
6cd4575e RK |
540 | }; |
541 | ||
6fb5fa3c DB |
542 | |
543 | /* Pointers to the live in/live out bitmaps for the boundaries of the | |
544 | current EBB. */ | |
545 | static bitmap cse_ebb_live_in, cse_ebb_live_out; | |
546 | ||
932ad4d9 SB |
547 | /* A simple bitmap to track which basic blocks have been visited |
548 | already as part of an already processed extended basic block. */ | |
549 | static sbitmap cse_visited_basic_blocks; | |
550 | ||
7080f735 | 551 | static bool fixed_base_plus_p (rtx x); |
68f932c4 | 552 | static int notreg_cost (rtx, enum rtx_code, int); |
7080f735 AJ |
553 | static int approx_reg_cost_1 (rtx *, void *); |
554 | static int approx_reg_cost (rtx); | |
56ae04af | 555 | static int preferable (int, int, int, int); |
7080f735 AJ |
556 | static void new_basic_block (void); |
557 | static void make_new_qty (unsigned int, enum machine_mode); | |
558 | static void make_regs_eqv (unsigned int, unsigned int); | |
559 | static void delete_reg_equiv (unsigned int); | |
560 | static int mention_regs (rtx); | |
561 | static int insert_regs (rtx, struct table_elt *, int); | |
562 | static void remove_from_table (struct table_elt *, unsigned); | |
d556d181 EB |
563 | static void remove_pseudo_from_table (rtx, unsigned); |
564 | static struct table_elt *lookup (rtx, unsigned, enum machine_mode); | |
7080f735 AJ |
565 | static struct table_elt *lookup_for_remove (rtx, unsigned, enum machine_mode); |
566 | static rtx lookup_as_function (rtx, enum rtx_code); | |
2c5bfdf7 AN |
567 | static struct table_elt *insert_with_costs (rtx, struct table_elt *, unsigned, |
568 | enum machine_mode, int, int); | |
7080f735 AJ |
569 | static struct table_elt *insert (rtx, struct table_elt *, unsigned, |
570 | enum machine_mode); | |
571 | static void merge_equiv_classes (struct table_elt *, struct table_elt *); | |
572 | static void invalidate (rtx, enum machine_mode); | |
7080f735 AJ |
573 | static void remove_invalid_refs (unsigned int); |
574 | static void remove_invalid_subreg_refs (unsigned int, unsigned int, | |
575 | enum machine_mode); | |
576 | static void rehash_using_reg (rtx); | |
577 | static void invalidate_memory (void); | |
578 | static void invalidate_for_call (void); | |
579 | static rtx use_related_value (rtx, struct table_elt *); | |
0516f6fe SB |
580 | |
581 | static inline unsigned canon_hash (rtx, enum machine_mode); | |
582 | static inline unsigned safe_hash (rtx, enum machine_mode); | |
e855c69d | 583 | static inline unsigned hash_rtx_string (const char *); |
0516f6fe | 584 | |
7080f735 | 585 | static rtx canon_reg (rtx, rtx); |
7080f735 AJ |
586 | static enum rtx_code find_comparison_args (enum rtx_code, rtx *, rtx *, |
587 | enum machine_mode *, | |
588 | enum machine_mode *); | |
589 | static rtx fold_rtx (rtx, rtx); | |
590 | static rtx equiv_constant (rtx); | |
0129d079 | 591 | static void record_jump_equiv (rtx, bool); |
7080f735 AJ |
592 | static void record_jump_cond (enum rtx_code, enum machine_mode, rtx, rtx, |
593 | int); | |
4a8cae83 | 594 | static void cse_insn (rtx); |
932ad4d9 | 595 | static void cse_prescan_path (struct cse_basic_block_data *); |
7080f735 | 596 | static void invalidate_from_clobbers (rtx); |
7b02f4e0 | 597 | static void invalidate_from_sets_and_clobbers (rtx); |
6fb5fa3c | 598 | static rtx cse_process_notes (rtx, rtx, bool *); |
932ad4d9 | 599 | static void cse_extended_basic_block (struct cse_basic_block_data *); |
7080f735 AJ |
600 | static int check_for_label_ref (rtx *, void *); |
601 | extern void dump_class (struct table_elt*); | |
bc5e3b54 KH |
602 | static void get_cse_reg_info_1 (unsigned int regno); |
603 | static struct cse_reg_info * get_cse_reg_info (unsigned int regno); | |
7080f735 AJ |
604 | static int check_dependence (rtx *, void *); |
605 | ||
606 | static void flush_hash_table (void); | |
607 | static bool insn_live_p (rtx, int *); | |
608 | static bool set_live_p (rtx, rtx, int *); | |
e129d93a | 609 | static int cse_change_cc_mode (rtx *, void *); |
fc188d37 | 610 | static void cse_change_cc_mode_insn (rtx, rtx); |
e129d93a | 611 | static void cse_change_cc_mode_insns (rtx, rtx, rtx); |
31e9ebaf JJ |
612 | static enum machine_mode cse_cc_succs (basic_block, basic_block, rtx, rtx, |
613 | bool); | |
7afe21cc | 614 | \f |
2f93eea8 PB |
615 | |
616 | #undef RTL_HOOKS_GEN_LOWPART | |
617 | #define RTL_HOOKS_GEN_LOWPART gen_lowpart_if_possible | |
618 | ||
619 | static const struct rtl_hooks cse_rtl_hooks = RTL_HOOKS_INITIALIZER; | |
620 | \f | |
6399c0ab | 621 | /* Nonzero if X has the form (PLUS frame-pointer integer). */ |
4977bab6 ZW |
622 | |
623 | static bool | |
7080f735 | 624 | fixed_base_plus_p (rtx x) |
4977bab6 ZW |
625 | { |
626 | switch (GET_CODE (x)) | |
627 | { | |
628 | case REG: | |
629 | if (x == frame_pointer_rtx || x == hard_frame_pointer_rtx) | |
630 | return true; | |
631 | if (x == arg_pointer_rtx && fixed_regs[ARG_POINTER_REGNUM]) | |
632 | return true; | |
4977bab6 ZW |
633 | return false; |
634 | ||
635 | case PLUS: | |
481683e1 | 636 | if (!CONST_INT_P (XEXP (x, 1))) |
4977bab6 ZW |
637 | return false; |
638 | return fixed_base_plus_p (XEXP (x, 0)); | |
639 | ||
4977bab6 ZW |
640 | default: |
641 | return false; | |
642 | } | |
643 | } | |
644 | ||
a4c6502a MM |
645 | /* Dump the expressions in the equivalence class indicated by CLASSP. |
646 | This function is used only for debugging. */ | |
711417cd | 647 | DEBUG_FUNCTION void |
7080f735 | 648 | dump_class (struct table_elt *classp) |
a4c6502a MM |
649 | { |
650 | struct table_elt *elt; | |
651 | ||
652 | fprintf (stderr, "Equivalence chain for "); | |
653 | print_rtl (stderr, classp->exp); | |
654 | fprintf (stderr, ": \n"); | |
278a83b2 | 655 | |
a4c6502a MM |
656 | for (elt = classp->first_same_value; elt; elt = elt->next_same_value) |
657 | { | |
658 | print_rtl (stderr, elt->exp); | |
659 | fprintf (stderr, "\n"); | |
660 | } | |
661 | } | |
662 | ||
630c79be | 663 | /* Subroutine of approx_reg_cost; called through for_each_rtx. */ |
be8ac49a | 664 | |
630c79be | 665 | static int |
7080f735 | 666 | approx_reg_cost_1 (rtx *xp, void *data) |
630c79be BS |
667 | { |
668 | rtx x = *xp; | |
7cbb2a85 | 669 | int *cost_p = (int *) data; |
630c79be | 670 | |
f8cfc6aa | 671 | if (x && REG_P (x)) |
c863f8c2 DM |
672 | { |
673 | unsigned int regno = REGNO (x); | |
674 | ||
675 | if (! CHEAP_REGNO (regno)) | |
676 | { | |
677 | if (regno < FIRST_PSEUDO_REGISTER) | |
678 | { | |
42db504c | 679 | if (targetm.small_register_classes_for_mode_p (GET_MODE (x))) |
c863f8c2 DM |
680 | return 1; |
681 | *cost_p += 2; | |
682 | } | |
683 | else | |
684 | *cost_p += 1; | |
685 | } | |
686 | } | |
687 | ||
630c79be BS |
688 | return 0; |
689 | } | |
690 | ||
691 | /* Return an estimate of the cost of the registers used in an rtx. | |
692 | This is mostly the number of different REG expressions in the rtx; | |
a1f300c0 | 693 | however for some exceptions like fixed registers we use a cost of |
f1c1dfc3 | 694 | 0. If any other hard register reference occurs, return MAX_COST. */ |
630c79be BS |
695 | |
696 | static int | |
7080f735 | 697 | approx_reg_cost (rtx x) |
630c79be | 698 | { |
630c79be | 699 | int cost = 0; |
f1c1dfc3 | 700 | |
c863f8c2 DM |
701 | if (for_each_rtx (&x, approx_reg_cost_1, (void *) &cost)) |
702 | return MAX_COST; | |
630c79be | 703 | |
c863f8c2 | 704 | return cost; |
630c79be BS |
705 | } |
706 | ||
707 | /* Return a negative value if an rtx A, whose costs are given by COST_A | |
708 | and REGCOST_A, is more desirable than an rtx B. | |
709 | Return a positive value if A is less desirable, or 0 if the two are | |
710 | equally good. */ | |
711 | static int | |
56ae04af | 712 | preferable (int cost_a, int regcost_a, int cost_b, int regcost_b) |
630c79be | 713 | { |
423adbb9 | 714 | /* First, get rid of cases involving expressions that are entirely |
f1c1dfc3 BS |
715 | unwanted. */ |
716 | if (cost_a != cost_b) | |
717 | { | |
718 | if (cost_a == MAX_COST) | |
719 | return 1; | |
720 | if (cost_b == MAX_COST) | |
721 | return -1; | |
722 | } | |
723 | ||
724 | /* Avoid extending lifetimes of hardregs. */ | |
725 | if (regcost_a != regcost_b) | |
726 | { | |
727 | if (regcost_a == MAX_COST) | |
728 | return 1; | |
729 | if (regcost_b == MAX_COST) | |
730 | return -1; | |
731 | } | |
732 | ||
733 | /* Normal operation costs take precedence. */ | |
630c79be BS |
734 | if (cost_a != cost_b) |
735 | return cost_a - cost_b; | |
f1c1dfc3 | 736 | /* Only if these are identical consider effects on register pressure. */ |
630c79be BS |
737 | if (regcost_a != regcost_b) |
738 | return regcost_a - regcost_b; | |
739 | return 0; | |
740 | } | |
741 | ||
954a5693 RK |
742 | /* Internal function, to compute cost when X is not a register; called |
743 | from COST macro to keep it simple. */ | |
744 | ||
745 | static int | |
68f932c4 | 746 | notreg_cost (rtx x, enum rtx_code outer, int opno) |
954a5693 RK |
747 | { |
748 | return ((GET_CODE (x) == SUBREG | |
f8cfc6aa | 749 | && REG_P (SUBREG_REG (x)) |
954a5693 RK |
750 | && GET_MODE_CLASS (GET_MODE (x)) == MODE_INT |
751 | && GET_MODE_CLASS (GET_MODE (SUBREG_REG (x))) == MODE_INT | |
752 | && (GET_MODE_SIZE (GET_MODE (x)) | |
753 | < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))) | |
754 | && subreg_lowpart_p (x) | |
d0edd768 BS |
755 | && TRULY_NOOP_TRUNCATION_MODES_P (GET_MODE (x), |
756 | GET_MODE (SUBREG_REG (x)))) | |
630c79be | 757 | ? 0 |
68f932c4 | 758 | : rtx_cost (x, outer, opno, optimize_this_for_speed_p) * 2); |
954a5693 RK |
759 | } |
760 | ||
01329426 | 761 | \f |
bc5e3b54 | 762 | /* Initialize CSE_REG_INFO_TABLE. */ |
9b1549b8 | 763 | |
bc5e3b54 KH |
764 | static void |
765 | init_cse_reg_info (unsigned int nregs) | |
766 | { | |
767 | /* Do we need to grow the table? */ | |
768 | if (nregs > cse_reg_info_table_size) | |
30f72379 | 769 | { |
bc5e3b54 KH |
770 | unsigned int new_size; |
771 | ||
772 | if (cse_reg_info_table_size < 2048) | |
30f72379 | 773 | { |
bc5e3b54 KH |
774 | /* Compute a new size that is a power of 2 and no smaller |
775 | than the large of NREGS and 64. */ | |
776 | new_size = (cse_reg_info_table_size | |
777 | ? cse_reg_info_table_size : 64); | |
778 | ||
779 | while (new_size < nregs) | |
780 | new_size *= 2; | |
30f72379 MM |
781 | } |
782 | else | |
1590d0d4 | 783 | { |
bc5e3b54 KH |
784 | /* If we need a big table, allocate just enough to hold |
785 | NREGS registers. */ | |
786 | new_size = nregs; | |
1590d0d4 | 787 | } |
9b1549b8 | 788 | |
bc5e3b54 | 789 | /* Reallocate the table with NEW_SIZE entries. */ |
04695783 | 790 | free (cse_reg_info_table); |
5ed6ace5 | 791 | cse_reg_info_table = XNEWVEC (struct cse_reg_info, new_size); |
bc5e3b54 | 792 | cse_reg_info_table_size = new_size; |
a811c672 | 793 | cse_reg_info_table_first_uninitialized = 0; |
bc5e3b54 KH |
794 | } |
795 | ||
796 | /* Do we have all of the first NREGS entries initialized? */ | |
797 | if (cse_reg_info_table_first_uninitialized < nregs) | |
798 | { | |
799 | unsigned int old_timestamp = cse_reg_info_timestamp - 1; | |
800 | unsigned int i; | |
801 | ||
802 | /* Put the old timestamp on newly allocated entries so that they | |
803 | will all be considered out of date. We do not touch those | |
804 | entries beyond the first NREGS entries to be nice to the | |
805 | virtual memory. */ | |
806 | for (i = cse_reg_info_table_first_uninitialized; i < nregs; i++) | |
807 | cse_reg_info_table[i].timestamp = old_timestamp; | |
30f72379 | 808 | |
bc5e3b54 | 809 | cse_reg_info_table_first_uninitialized = nregs; |
30f72379 | 810 | } |
bc5e3b54 KH |
811 | } |
812 | ||
a52aff23 | 813 | /* Given REGNO, initialize the cse_reg_info entry for REGNO. */ |
bc5e3b54 KH |
814 | |
815 | static void | |
816 | get_cse_reg_info_1 (unsigned int regno) | |
817 | { | |
818 | /* Set TIMESTAMP field to CSE_REG_INFO_TIMESTAMP so that this | |
819 | entry will be considered to have been initialized. */ | |
820 | cse_reg_info_table[regno].timestamp = cse_reg_info_timestamp; | |
821 | ||
822 | /* Initialize the rest of the entry. */ | |
823 | cse_reg_info_table[regno].reg_tick = 1; | |
824 | cse_reg_info_table[regno].reg_in_table = -1; | |
825 | cse_reg_info_table[regno].subreg_ticked = -1; | |
826 | cse_reg_info_table[regno].reg_qty = -regno - 1; | |
827 | } | |
828 | ||
829 | /* Find a cse_reg_info entry for REGNO. */ | |
30f72379 | 830 | |
bc5e3b54 KH |
831 | static inline struct cse_reg_info * |
832 | get_cse_reg_info (unsigned int regno) | |
833 | { | |
834 | struct cse_reg_info *p = &cse_reg_info_table[regno]; | |
835 | ||
782c0a3e KH |
836 | /* If this entry has not been initialized, go ahead and initialize |
837 | it. */ | |
bc5e3b54 KH |
838 | if (p->timestamp != cse_reg_info_timestamp) |
839 | get_cse_reg_info_1 (regno); | |
30f72379 | 840 | |
9b1549b8 | 841 | return p; |
30f72379 MM |
842 | } |
843 | ||
7afe21cc RK |
844 | /* Clear the hash table and initialize each register with its own quantity, |
845 | for a new basic block. */ | |
846 | ||
847 | static void | |
7080f735 | 848 | new_basic_block (void) |
7afe21cc | 849 | { |
b3694847 | 850 | int i; |
7afe21cc | 851 | |
08a69267 | 852 | next_qty = 0; |
7afe21cc | 853 | |
a52aff23 | 854 | /* Invalidate cse_reg_info_table. */ |
bc5e3b54 | 855 | cse_reg_info_timestamp++; |
7afe21cc | 856 | |
bc5e3b54 | 857 | /* Clear out hash table state for this pass. */ |
7afe21cc RK |
858 | CLEAR_HARD_REG_SET (hard_regs_in_table); |
859 | ||
860 | /* The per-quantity values used to be initialized here, but it is | |
861 | much faster to initialize each as it is made in `make_new_qty'. */ | |
862 | ||
9b1549b8 | 863 | for (i = 0; i < HASH_SIZE; i++) |
7afe21cc | 864 | { |
9b1549b8 DM |
865 | struct table_elt *first; |
866 | ||
867 | first = table[i]; | |
868 | if (first != NULL) | |
7afe21cc | 869 | { |
9b1549b8 DM |
870 | struct table_elt *last = first; |
871 | ||
872 | table[i] = NULL; | |
873 | ||
874 | while (last->next_same_hash != NULL) | |
875 | last = last->next_same_hash; | |
876 | ||
877 | /* Now relink this hash entire chain into | |
878 | the free element list. */ | |
879 | ||
880 | last->next_same_hash = free_element_chain; | |
881 | free_element_chain = first; | |
7afe21cc RK |
882 | } |
883 | } | |
884 | ||
7afe21cc RK |
885 | #ifdef HAVE_cc0 |
886 | prev_insn_cc0 = 0; | |
887 | #endif | |
888 | } | |
889 | ||
1bb98cec DM |
890 | /* Say that register REG contains a quantity in mode MODE not in any |
891 | register before and initialize that quantity. */ | |
7afe21cc RK |
892 | |
893 | static void | |
7080f735 | 894 | make_new_qty (unsigned int reg, enum machine_mode mode) |
7afe21cc | 895 | { |
b3694847 SS |
896 | int q; |
897 | struct qty_table_elem *ent; | |
898 | struct reg_eqv_elem *eqv; | |
7afe21cc | 899 | |
341c100f | 900 | gcc_assert (next_qty < max_qty); |
7afe21cc | 901 | |
30f72379 | 902 | q = REG_QTY (reg) = next_qty++; |
1bb98cec DM |
903 | ent = &qty_table[q]; |
904 | ent->first_reg = reg; | |
905 | ent->last_reg = reg; | |
906 | ent->mode = mode; | |
907 | ent->const_rtx = ent->const_insn = NULL_RTX; | |
908 | ent->comparison_code = UNKNOWN; | |
909 | ||
910 | eqv = ®_eqv_table[reg]; | |
911 | eqv->next = eqv->prev = -1; | |
7afe21cc RK |
912 | } |
913 | ||
914 | /* Make reg NEW equivalent to reg OLD. | |
915 | OLD is not changing; NEW is. */ | |
916 | ||
917 | static void | |
32e9fa48 | 918 | make_regs_eqv (unsigned int new_reg, unsigned int old_reg) |
7afe21cc | 919 | { |
770ae6cc | 920 | unsigned int lastr, firstr; |
32e9fa48 | 921 | int q = REG_QTY (old_reg); |
770ae6cc | 922 | struct qty_table_elem *ent; |
1bb98cec DM |
923 | |
924 | ent = &qty_table[q]; | |
7afe21cc RK |
925 | |
926 | /* Nothing should become eqv until it has a "non-invalid" qty number. */ | |
32e9fa48 | 927 | gcc_assert (REGNO_QTY_VALID_P (old_reg)); |
7afe21cc | 928 | |
32e9fa48 | 929 | REG_QTY (new_reg) = q; |
1bb98cec DM |
930 | firstr = ent->first_reg; |
931 | lastr = ent->last_reg; | |
7afe21cc RK |
932 | |
933 | /* Prefer fixed hard registers to anything. Prefer pseudo regs to other | |
934 | hard regs. Among pseudos, if NEW will live longer than any other reg | |
935 | of the same qty, and that is beyond the current basic block, | |
936 | make it the new canonical replacement for this qty. */ | |
937 | if (! (firstr < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (firstr)) | |
938 | /* Certain fixed registers might be of the class NO_REGS. This means | |
939 | that not only can they not be allocated by the compiler, but | |
830a38ee | 940 | they cannot be used in substitutions or canonicalizations |
7afe21cc | 941 | either. */ |
32e9fa48 KG |
942 | && (new_reg >= FIRST_PSEUDO_REGISTER || REGNO_REG_CLASS (new_reg) != NO_REGS) |
943 | && ((new_reg < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (new_reg)) | |
944 | || (new_reg >= FIRST_PSEUDO_REGISTER | |
7afe21cc | 945 | && (firstr < FIRST_PSEUDO_REGISTER |
32e9fa48 | 946 | || (bitmap_bit_p (cse_ebb_live_out, new_reg) |
6fb5fa3c | 947 | && !bitmap_bit_p (cse_ebb_live_out, firstr)) |
32e9fa48 | 948 | || (bitmap_bit_p (cse_ebb_live_in, new_reg) |
6fb5fa3c | 949 | && !bitmap_bit_p (cse_ebb_live_in, firstr)))))) |
7afe21cc | 950 | { |
32e9fa48 KG |
951 | reg_eqv_table[firstr].prev = new_reg; |
952 | reg_eqv_table[new_reg].next = firstr; | |
953 | reg_eqv_table[new_reg].prev = -1; | |
954 | ent->first_reg = new_reg; | |
7afe21cc RK |
955 | } |
956 | else | |
957 | { | |
958 | /* If NEW is a hard reg (known to be non-fixed), insert at end. | |
959 | Otherwise, insert before any non-fixed hard regs that are at the | |
960 | end. Registers of class NO_REGS cannot be used as an | |
961 | equivalent for anything. */ | |
1bb98cec | 962 | while (lastr < FIRST_PSEUDO_REGISTER && reg_eqv_table[lastr].prev >= 0 |
7afe21cc | 963 | && (REGNO_REG_CLASS (lastr) == NO_REGS || ! FIXED_REGNO_P (lastr)) |
32e9fa48 | 964 | && new_reg >= FIRST_PSEUDO_REGISTER) |
1bb98cec | 965 | lastr = reg_eqv_table[lastr].prev; |
32e9fa48 | 966 | reg_eqv_table[new_reg].next = reg_eqv_table[lastr].next; |
1bb98cec | 967 | if (reg_eqv_table[lastr].next >= 0) |
32e9fa48 | 968 | reg_eqv_table[reg_eqv_table[lastr].next].prev = new_reg; |
7afe21cc | 969 | else |
32e9fa48 KG |
970 | qty_table[q].last_reg = new_reg; |
971 | reg_eqv_table[lastr].next = new_reg; | |
972 | reg_eqv_table[new_reg].prev = lastr; | |
7afe21cc RK |
973 | } |
974 | } | |
975 | ||
976 | /* Remove REG from its equivalence class. */ | |
977 | ||
978 | static void | |
7080f735 | 979 | delete_reg_equiv (unsigned int reg) |
7afe21cc | 980 | { |
b3694847 SS |
981 | struct qty_table_elem *ent; |
982 | int q = REG_QTY (reg); | |
983 | int p, n; | |
7afe21cc | 984 | |
a4e262bc | 985 | /* If invalid, do nothing. */ |
08a69267 | 986 | if (! REGNO_QTY_VALID_P (reg)) |
7afe21cc RK |
987 | return; |
988 | ||
1bb98cec DM |
989 | ent = &qty_table[q]; |
990 | ||
991 | p = reg_eqv_table[reg].prev; | |
992 | n = reg_eqv_table[reg].next; | |
a4e262bc | 993 | |
7afe21cc | 994 | if (n != -1) |
1bb98cec | 995 | reg_eqv_table[n].prev = p; |
7afe21cc | 996 | else |
1bb98cec | 997 | ent->last_reg = p; |
7afe21cc | 998 | if (p != -1) |
1bb98cec | 999 | reg_eqv_table[p].next = n; |
7afe21cc | 1000 | else |
1bb98cec | 1001 | ent->first_reg = n; |
7afe21cc | 1002 | |
08a69267 | 1003 | REG_QTY (reg) = -reg - 1; |
7afe21cc RK |
1004 | } |
1005 | ||
1006 | /* Remove any invalid expressions from the hash table | |
1007 | that refer to any of the registers contained in expression X. | |
1008 | ||
1009 | Make sure that newly inserted references to those registers | |
1010 | as subexpressions will be considered valid. | |
1011 | ||
1012 | mention_regs is not called when a register itself | |
1013 | is being stored in the table. | |
1014 | ||
1015 | Return 1 if we have done something that may have changed the hash code | |
1016 | of X. */ | |
1017 | ||
1018 | static int | |
7080f735 | 1019 | mention_regs (rtx x) |
7afe21cc | 1020 | { |
b3694847 SS |
1021 | enum rtx_code code; |
1022 | int i, j; | |
1023 | const char *fmt; | |
1024 | int changed = 0; | |
7afe21cc RK |
1025 | |
1026 | if (x == 0) | |
e5f6a288 | 1027 | return 0; |
7afe21cc RK |
1028 | |
1029 | code = GET_CODE (x); | |
1030 | if (code == REG) | |
1031 | { | |
770ae6cc | 1032 | unsigned int regno = REGNO (x); |
09e18274 | 1033 | unsigned int endregno = END_REGNO (x); |
770ae6cc | 1034 | unsigned int i; |
7afe21cc RK |
1035 | |
1036 | for (i = regno; i < endregno; i++) | |
1037 | { | |
30f72379 | 1038 | if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i)) |
7afe21cc RK |
1039 | remove_invalid_refs (i); |
1040 | ||
30f72379 | 1041 | REG_IN_TABLE (i) = REG_TICK (i); |
46081bb3 | 1042 | SUBREG_TICKED (i) = -1; |
7afe21cc RK |
1043 | } |
1044 | ||
1045 | return 0; | |
1046 | } | |
1047 | ||
34c73909 R |
1048 | /* If this is a SUBREG, we don't want to discard other SUBREGs of the same |
1049 | pseudo if they don't use overlapping words. We handle only pseudos | |
1050 | here for simplicity. */ | |
f8cfc6aa | 1051 | if (code == SUBREG && REG_P (SUBREG_REG (x)) |
34c73909 R |
1052 | && REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER) |
1053 | { | |
770ae6cc | 1054 | unsigned int i = REGNO (SUBREG_REG (x)); |
34c73909 | 1055 | |
30f72379 | 1056 | if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i)) |
34c73909 | 1057 | { |
46081bb3 SH |
1058 | /* If REG_IN_TABLE (i) differs from REG_TICK (i) by one, and |
1059 | the last store to this register really stored into this | |
1060 | subreg, then remove the memory of this subreg. | |
1061 | Otherwise, remove any memory of the entire register and | |
1062 | all its subregs from the table. */ | |
1063 | if (REG_TICK (i) - REG_IN_TABLE (i) > 1 | |
5dd78e9a | 1064 | || SUBREG_TICKED (i) != REGNO (SUBREG_REG (x))) |
34c73909 R |
1065 | remove_invalid_refs (i); |
1066 | else | |
ddef6bc7 | 1067 | remove_invalid_subreg_refs (i, SUBREG_BYTE (x), GET_MODE (x)); |
34c73909 R |
1068 | } |
1069 | ||
30f72379 | 1070 | REG_IN_TABLE (i) = REG_TICK (i); |
5dd78e9a | 1071 | SUBREG_TICKED (i) = REGNO (SUBREG_REG (x)); |
34c73909 R |
1072 | return 0; |
1073 | } | |
1074 | ||
7afe21cc RK |
1075 | /* If X is a comparison or a COMPARE and either operand is a register |
1076 | that does not have a quantity, give it one. This is so that a later | |
1077 | call to record_jump_equiv won't cause X to be assigned a different | |
1078 | hash code and not found in the table after that call. | |
1079 | ||
1080 | It is not necessary to do this here, since rehash_using_reg can | |
1081 | fix up the table later, but doing this here eliminates the need to | |
1082 | call that expensive function in the most common case where the only | |
1083 | use of the register is in the comparison. */ | |
1084 | ||
ec8e098d | 1085 | if (code == COMPARE || COMPARISON_P (x)) |
7afe21cc | 1086 | { |
f8cfc6aa | 1087 | if (REG_P (XEXP (x, 0)) |
7afe21cc | 1088 | && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 0)))) |
9714cf43 | 1089 | if (insert_regs (XEXP (x, 0), NULL, 0)) |
7afe21cc RK |
1090 | { |
1091 | rehash_using_reg (XEXP (x, 0)); | |
1092 | changed = 1; | |
1093 | } | |
1094 | ||
f8cfc6aa | 1095 | if (REG_P (XEXP (x, 1)) |
7afe21cc | 1096 | && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 1)))) |
9714cf43 | 1097 | if (insert_regs (XEXP (x, 1), NULL, 0)) |
7afe21cc RK |
1098 | { |
1099 | rehash_using_reg (XEXP (x, 1)); | |
1100 | changed = 1; | |
1101 | } | |
1102 | } | |
1103 | ||
1104 | fmt = GET_RTX_FORMAT (code); | |
1105 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
1106 | if (fmt[i] == 'e') | |
1107 | changed |= mention_regs (XEXP (x, i)); | |
1108 | else if (fmt[i] == 'E') | |
1109 | for (j = 0; j < XVECLEN (x, i); j++) | |
1110 | changed |= mention_regs (XVECEXP (x, i, j)); | |
1111 | ||
1112 | return changed; | |
1113 | } | |
1114 | ||
1115 | /* Update the register quantities for inserting X into the hash table | |
1116 | with a value equivalent to CLASSP. | |
1117 | (If the class does not contain a REG, it is irrelevant.) | |
1118 | If MODIFIED is nonzero, X is a destination; it is being modified. | |
1119 | Note that delete_reg_equiv should be called on a register | |
1120 | before insert_regs is done on that register with MODIFIED != 0. | |
1121 | ||
1122 | Nonzero value means that elements of reg_qty have changed | |
1123 | so X's hash code may be different. */ | |
1124 | ||
1125 | static int | |
7080f735 | 1126 | insert_regs (rtx x, struct table_elt *classp, int modified) |
7afe21cc | 1127 | { |
f8cfc6aa | 1128 | if (REG_P (x)) |
7afe21cc | 1129 | { |
770ae6cc RK |
1130 | unsigned int regno = REGNO (x); |
1131 | int qty_valid; | |
7afe21cc | 1132 | |
1ff0c00d RK |
1133 | /* If REGNO is in the equivalence table already but is of the |
1134 | wrong mode for that equivalence, don't do anything here. */ | |
1135 | ||
1bb98cec DM |
1136 | qty_valid = REGNO_QTY_VALID_P (regno); |
1137 | if (qty_valid) | |
1138 | { | |
1139 | struct qty_table_elem *ent = &qty_table[REG_QTY (regno)]; | |
1ff0c00d | 1140 | |
1bb98cec DM |
1141 | if (ent->mode != GET_MODE (x)) |
1142 | return 0; | |
1143 | } | |
1144 | ||
1145 | if (modified || ! qty_valid) | |
7afe21cc RK |
1146 | { |
1147 | if (classp) | |
1148 | for (classp = classp->first_same_value; | |
1149 | classp != 0; | |
1150 | classp = classp->next_same_value) | |
f8cfc6aa | 1151 | if (REG_P (classp->exp) |
7afe21cc RK |
1152 | && GET_MODE (classp->exp) == GET_MODE (x)) |
1153 | { | |
cd928652 ZD |
1154 | unsigned c_regno = REGNO (classp->exp); |
1155 | ||
1156 | gcc_assert (REGNO_QTY_VALID_P (c_regno)); | |
1157 | ||
1158 | /* Suppose that 5 is hard reg and 100 and 101 are | |
1159 | pseudos. Consider | |
1160 | ||
1161 | (set (reg:si 100) (reg:si 5)) | |
1162 | (set (reg:si 5) (reg:si 100)) | |
1163 | (set (reg:di 101) (reg:di 5)) | |
1164 | ||
1165 | We would now set REG_QTY (101) = REG_QTY (5), but the | |
1166 | entry for 5 is in SImode. When we use this later in | |
1167 | copy propagation, we get the register in wrong mode. */ | |
1168 | if (qty_table[REG_QTY (c_regno)].mode != GET_MODE (x)) | |
1169 | continue; | |
1170 | ||
1171 | make_regs_eqv (regno, c_regno); | |
7afe21cc RK |
1172 | return 1; |
1173 | } | |
1174 | ||
d9f20424 R |
1175 | /* Mention_regs for a SUBREG checks if REG_TICK is exactly one larger |
1176 | than REG_IN_TABLE to find out if there was only a single preceding | |
1177 | invalidation - for the SUBREG - or another one, which would be | |
1178 | for the full register. However, if we find here that REG_TICK | |
1179 | indicates that the register is invalid, it means that it has | |
1180 | been invalidated in a separate operation. The SUBREG might be used | |
1181 | now (then this is a recursive call), or we might use the full REG | |
1182 | now and a SUBREG of it later. So bump up REG_TICK so that | |
1183 | mention_regs will do the right thing. */ | |
1184 | if (! modified | |
1185 | && REG_IN_TABLE (regno) >= 0 | |
1186 | && REG_TICK (regno) == REG_IN_TABLE (regno) + 1) | |
1187 | REG_TICK (regno)++; | |
1bb98cec | 1188 | make_new_qty (regno, GET_MODE (x)); |
7afe21cc RK |
1189 | return 1; |
1190 | } | |
cdf4112f TG |
1191 | |
1192 | return 0; | |
7afe21cc | 1193 | } |
c610adec RK |
1194 | |
1195 | /* If X is a SUBREG, we will likely be inserting the inner register in the | |
1196 | table. If that register doesn't have an assigned quantity number at | |
1197 | this point but does later, the insertion that we will be doing now will | |
1198 | not be accessible because its hash code will have changed. So assign | |
1199 | a quantity number now. */ | |
1200 | ||
f8cfc6aa | 1201 | else if (GET_CODE (x) == SUBREG && REG_P (SUBREG_REG (x)) |
c610adec RK |
1202 | && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x)))) |
1203 | { | |
9714cf43 | 1204 | insert_regs (SUBREG_REG (x), NULL, 0); |
34c73909 | 1205 | mention_regs (x); |
c610adec RK |
1206 | return 1; |
1207 | } | |
7afe21cc RK |
1208 | else |
1209 | return mention_regs (x); | |
1210 | } | |
1211 | \f | |
2c5bfdf7 AN |
1212 | |
1213 | /* Compute upper and lower anchors for CST. Also compute the offset of CST | |
1214 | from these anchors/bases such that *_BASE + *_OFFS = CST. Return false iff | |
1215 | CST is equal to an anchor. */ | |
1216 | ||
1217 | static bool | |
1218 | compute_const_anchors (rtx cst, | |
1219 | HOST_WIDE_INT *lower_base, HOST_WIDE_INT *lower_offs, | |
1220 | HOST_WIDE_INT *upper_base, HOST_WIDE_INT *upper_offs) | |
1221 | { | |
1222 | HOST_WIDE_INT n = INTVAL (cst); | |
1223 | ||
1224 | *lower_base = n & ~(targetm.const_anchor - 1); | |
1225 | if (*lower_base == n) | |
1226 | return false; | |
1227 | ||
1228 | *upper_base = | |
1229 | (n + (targetm.const_anchor - 1)) & ~(targetm.const_anchor - 1); | |
1230 | *upper_offs = n - *upper_base; | |
1231 | *lower_offs = n - *lower_base; | |
1232 | return true; | |
1233 | } | |
1234 | ||
1235 | /* Insert the equivalence between ANCHOR and (REG + OFF) in mode MODE. */ | |
1236 | ||
1237 | static void | |
1238 | insert_const_anchor (HOST_WIDE_INT anchor, rtx reg, HOST_WIDE_INT offs, | |
1239 | enum machine_mode mode) | |
1240 | { | |
1241 | struct table_elt *elt; | |
1242 | unsigned hash; | |
1243 | rtx anchor_exp; | |
1244 | rtx exp; | |
1245 | ||
1246 | anchor_exp = GEN_INT (anchor); | |
1247 | hash = HASH (anchor_exp, mode); | |
1248 | elt = lookup (anchor_exp, hash, mode); | |
1249 | if (!elt) | |
1250 | elt = insert (anchor_exp, NULL, hash, mode); | |
1251 | ||
0a81f074 | 1252 | exp = plus_constant (mode, reg, offs); |
2c5bfdf7 AN |
1253 | /* REG has just been inserted and the hash codes recomputed. */ |
1254 | mention_regs (exp); | |
1255 | hash = HASH (exp, mode); | |
1256 | ||
1257 | /* Use the cost of the register rather than the whole expression. When | |
1258 | looking up constant anchors we will further offset the corresponding | |
1259 | expression therefore it does not make sense to prefer REGs over | |
1260 | reg-immediate additions. Prefer instead the oldest expression. Also | |
1261 | don't prefer pseudos over hard regs so that we derive constants in | |
1262 | argument registers from other argument registers rather than from the | |
1263 | original pseudo that was used to synthesize the constant. */ | |
1264 | insert_with_costs (exp, elt, hash, mode, COST (reg), 1); | |
1265 | } | |
1266 | ||
1267 | /* The constant CST is equivalent to the register REG. Create | |
1268 | equivalences between the two anchors of CST and the corresponding | |
1269 | register-offset expressions using REG. */ | |
1270 | ||
1271 | static void | |
1272 | insert_const_anchors (rtx reg, rtx cst, enum machine_mode mode) | |
1273 | { | |
1274 | HOST_WIDE_INT lower_base, lower_offs, upper_base, upper_offs; | |
1275 | ||
1276 | if (!compute_const_anchors (cst, &lower_base, &lower_offs, | |
1277 | &upper_base, &upper_offs)) | |
1278 | return; | |
1279 | ||
1280 | /* Ignore anchors of value 0. Constants accessible from zero are | |
1281 | simple. */ | |
1282 | if (lower_base != 0) | |
1283 | insert_const_anchor (lower_base, reg, -lower_offs, mode); | |
1284 | ||
1285 | if (upper_base != 0) | |
1286 | insert_const_anchor (upper_base, reg, -upper_offs, mode); | |
1287 | } | |
1288 | ||
1289 | /* We need to express ANCHOR_ELT->exp + OFFS. Walk the equivalence list of | |
1290 | ANCHOR_ELT and see if offsetting any of the entries by OFFS would create a | |
1291 | valid expression. Return the cheapest and oldest of such expressions. In | |
1292 | *OLD, return how old the resulting expression is compared to the other | |
1293 | equivalent expressions. */ | |
1294 | ||
1295 | static rtx | |
1296 | find_reg_offset_for_const (struct table_elt *anchor_elt, HOST_WIDE_INT offs, | |
1297 | unsigned *old) | |
1298 | { | |
1299 | struct table_elt *elt; | |
1300 | unsigned idx; | |
1301 | struct table_elt *match_elt; | |
1302 | rtx match; | |
1303 | ||
1304 | /* Find the cheapest and *oldest* expression to maximize the chance of | |
1305 | reusing the same pseudo. */ | |
1306 | ||
1307 | match_elt = NULL; | |
1308 | match = NULL_RTX; | |
1309 | for (elt = anchor_elt->first_same_value, idx = 0; | |
1310 | elt; | |
1311 | elt = elt->next_same_value, idx++) | |
1312 | { | |
1313 | if (match_elt && CHEAPER (match_elt, elt)) | |
1314 | return match; | |
1315 | ||
1316 | if (REG_P (elt->exp) | |
1317 | || (GET_CODE (elt->exp) == PLUS | |
1318 | && REG_P (XEXP (elt->exp, 0)) | |
1319 | && GET_CODE (XEXP (elt->exp, 1)) == CONST_INT)) | |
1320 | { | |
1321 | rtx x; | |
1322 | ||
1323 | /* Ignore expressions that are no longer valid. */ | |
1324 | if (!REG_P (elt->exp) && !exp_equiv_p (elt->exp, elt->exp, 1, false)) | |
1325 | continue; | |
1326 | ||
0a81f074 | 1327 | x = plus_constant (GET_MODE (elt->exp), elt->exp, offs); |
2c5bfdf7 AN |
1328 | if (REG_P (x) |
1329 | || (GET_CODE (x) == PLUS | |
1330 | && IN_RANGE (INTVAL (XEXP (x, 1)), | |
1331 | -targetm.const_anchor, | |
1332 | targetm.const_anchor - 1))) | |
1333 | { | |
1334 | match = x; | |
1335 | match_elt = elt; | |
1336 | *old = idx; | |
1337 | } | |
1338 | } | |
1339 | } | |
1340 | ||
1341 | return match; | |
1342 | } | |
1343 | ||
1344 | /* Try to express the constant SRC_CONST using a register+offset expression | |
1345 | derived from a constant anchor. Return it if successful or NULL_RTX, | |
1346 | otherwise. */ | |
1347 | ||
1348 | static rtx | |
1349 | try_const_anchors (rtx src_const, enum machine_mode mode) | |
1350 | { | |
1351 | struct table_elt *lower_elt, *upper_elt; | |
1352 | HOST_WIDE_INT lower_base, lower_offs, upper_base, upper_offs; | |
1353 | rtx lower_anchor_rtx, upper_anchor_rtx; | |
1354 | rtx lower_exp = NULL_RTX, upper_exp = NULL_RTX; | |
1355 | unsigned lower_old, upper_old; | |
1356 | ||
40dbb05c RS |
1357 | /* CONST_INT is used for CC modes, but we should leave those alone. */ |
1358 | if (GET_MODE_CLASS (mode) == MODE_CC) | |
1359 | return NULL_RTX; | |
1360 | ||
1361 | gcc_assert (SCALAR_INT_MODE_P (mode)); | |
2c5bfdf7 AN |
1362 | if (!compute_const_anchors (src_const, &lower_base, &lower_offs, |
1363 | &upper_base, &upper_offs)) | |
1364 | return NULL_RTX; | |
1365 | ||
1366 | lower_anchor_rtx = GEN_INT (lower_base); | |
1367 | upper_anchor_rtx = GEN_INT (upper_base); | |
1368 | lower_elt = lookup (lower_anchor_rtx, HASH (lower_anchor_rtx, mode), mode); | |
1369 | upper_elt = lookup (upper_anchor_rtx, HASH (upper_anchor_rtx, mode), mode); | |
1370 | ||
1371 | if (lower_elt) | |
1372 | lower_exp = find_reg_offset_for_const (lower_elt, lower_offs, &lower_old); | |
1373 | if (upper_elt) | |
1374 | upper_exp = find_reg_offset_for_const (upper_elt, upper_offs, &upper_old); | |
1375 | ||
1376 | if (!lower_exp) | |
1377 | return upper_exp; | |
1378 | if (!upper_exp) | |
1379 | return lower_exp; | |
1380 | ||
1381 | /* Return the older expression. */ | |
1382 | return (upper_old > lower_old ? upper_exp : lower_exp); | |
1383 | } | |
1384 | \f | |
7afe21cc RK |
1385 | /* Look in or update the hash table. */ |
1386 | ||
7afe21cc RK |
1387 | /* Remove table element ELT from use in the table. |
1388 | HASH is its hash code, made using the HASH macro. | |
1389 | It's an argument because often that is known in advance | |
1390 | and we save much time not recomputing it. */ | |
1391 | ||
1392 | static void | |
7080f735 | 1393 | remove_from_table (struct table_elt *elt, unsigned int hash) |
7afe21cc RK |
1394 | { |
1395 | if (elt == 0) | |
1396 | return; | |
1397 | ||
1398 | /* Mark this element as removed. See cse_insn. */ | |
1399 | elt->first_same_value = 0; | |
1400 | ||
1401 | /* Remove the table element from its equivalence class. */ | |
278a83b2 | 1402 | |
7afe21cc | 1403 | { |
b3694847 SS |
1404 | struct table_elt *prev = elt->prev_same_value; |
1405 | struct table_elt *next = elt->next_same_value; | |
7afe21cc | 1406 | |
278a83b2 KH |
1407 | if (next) |
1408 | next->prev_same_value = prev; | |
7afe21cc RK |
1409 | |
1410 | if (prev) | |
1411 | prev->next_same_value = next; | |
1412 | else | |
1413 | { | |
b3694847 | 1414 | struct table_elt *newfirst = next; |
7afe21cc RK |
1415 | while (next) |
1416 | { | |
1417 | next->first_same_value = newfirst; | |
1418 | next = next->next_same_value; | |
1419 | } | |
1420 | } | |
1421 | } | |
1422 | ||
1423 | /* Remove the table element from its hash bucket. */ | |
1424 | ||
1425 | { | |
b3694847 SS |
1426 | struct table_elt *prev = elt->prev_same_hash; |
1427 | struct table_elt *next = elt->next_same_hash; | |
7afe21cc | 1428 | |
278a83b2 KH |
1429 | if (next) |
1430 | next->prev_same_hash = prev; | |
7afe21cc RK |
1431 | |
1432 | if (prev) | |
1433 | prev->next_same_hash = next; | |
1434 | else if (table[hash] == elt) | |
1435 | table[hash] = next; | |
1436 | else | |
1437 | { | |
1438 | /* This entry is not in the proper hash bucket. This can happen | |
1439 | when two classes were merged by `merge_equiv_classes'. Search | |
1440 | for the hash bucket that it heads. This happens only very | |
1441 | rarely, so the cost is acceptable. */ | |
9b1549b8 | 1442 | for (hash = 0; hash < HASH_SIZE; hash++) |
7afe21cc RK |
1443 | if (table[hash] == elt) |
1444 | table[hash] = next; | |
1445 | } | |
1446 | } | |
1447 | ||
1448 | /* Remove the table element from its related-value circular chain. */ | |
1449 | ||
1450 | if (elt->related_value != 0 && elt->related_value != elt) | |
1451 | { | |
b3694847 | 1452 | struct table_elt *p = elt->related_value; |
770ae6cc | 1453 | |
7afe21cc RK |
1454 | while (p->related_value != elt) |
1455 | p = p->related_value; | |
1456 | p->related_value = elt->related_value; | |
1457 | if (p->related_value == p) | |
1458 | p->related_value = 0; | |
1459 | } | |
1460 | ||
9b1549b8 DM |
1461 | /* Now add it to the free element chain. */ |
1462 | elt->next_same_hash = free_element_chain; | |
1463 | free_element_chain = elt; | |
7afe21cc RK |
1464 | } |
1465 | ||
d556d181 EB |
1466 | /* Same as above, but X is a pseudo-register. */ |
1467 | ||
1468 | static void | |
1469 | remove_pseudo_from_table (rtx x, unsigned int hash) | |
1470 | { | |
1471 | struct table_elt *elt; | |
1472 | ||
1473 | /* Because a pseudo-register can be referenced in more than one | |
1474 | mode, we might have to remove more than one table entry. */ | |
1475 | while ((elt = lookup_for_remove (x, hash, VOIDmode))) | |
1476 | remove_from_table (elt, hash); | |
1477 | } | |
1478 | ||
7afe21cc RK |
1479 | /* Look up X in the hash table and return its table element, |
1480 | or 0 if X is not in the table. | |
1481 | ||
1482 | MODE is the machine-mode of X, or if X is an integer constant | |
1483 | with VOIDmode then MODE is the mode with which X will be used. | |
1484 | ||
1485 | Here we are satisfied to find an expression whose tree structure | |
1486 | looks like X. */ | |
1487 | ||
1488 | static struct table_elt * | |
7080f735 | 1489 | lookup (rtx x, unsigned int hash, enum machine_mode mode) |
7afe21cc | 1490 | { |
b3694847 | 1491 | struct table_elt *p; |
7afe21cc RK |
1492 | |
1493 | for (p = table[hash]; p; p = p->next_same_hash) | |
f8cfc6aa | 1494 | if (mode == p->mode && ((x == p->exp && REG_P (x)) |
0516f6fe | 1495 | || exp_equiv_p (x, p->exp, !REG_P (x), false))) |
7afe21cc RK |
1496 | return p; |
1497 | ||
1498 | return 0; | |
1499 | } | |
1500 | ||
1501 | /* Like `lookup' but don't care whether the table element uses invalid regs. | |
1502 | Also ignore discrepancies in the machine mode of a register. */ | |
1503 | ||
1504 | static struct table_elt * | |
7080f735 | 1505 | lookup_for_remove (rtx x, unsigned int hash, enum machine_mode mode) |
7afe21cc | 1506 | { |
b3694847 | 1507 | struct table_elt *p; |
7afe21cc | 1508 | |
f8cfc6aa | 1509 | if (REG_P (x)) |
7afe21cc | 1510 | { |
770ae6cc RK |
1511 | unsigned int regno = REGNO (x); |
1512 | ||
7afe21cc RK |
1513 | /* Don't check the machine mode when comparing registers; |
1514 | invalidating (REG:SI 0) also invalidates (REG:DF 0). */ | |
1515 | for (p = table[hash]; p; p = p->next_same_hash) | |
f8cfc6aa | 1516 | if (REG_P (p->exp) |
7afe21cc RK |
1517 | && REGNO (p->exp) == regno) |
1518 | return p; | |
1519 | } | |
1520 | else | |
1521 | { | |
1522 | for (p = table[hash]; p; p = p->next_same_hash) | |
0516f6fe SB |
1523 | if (mode == p->mode |
1524 | && (x == p->exp || exp_equiv_p (x, p->exp, 0, false))) | |
7afe21cc RK |
1525 | return p; |
1526 | } | |
1527 | ||
1528 | return 0; | |
1529 | } | |
1530 | ||
1531 | /* Look for an expression equivalent to X and with code CODE. | |
1532 | If one is found, return that expression. */ | |
1533 | ||
1534 | static rtx | |
7080f735 | 1535 | lookup_as_function (rtx x, enum rtx_code code) |
7afe21cc | 1536 | { |
b3694847 | 1537 | struct table_elt *p |
0516f6fe | 1538 | = lookup (x, SAFE_HASH (x, VOIDmode), GET_MODE (x)); |
770ae6cc | 1539 | |
7afe21cc RK |
1540 | if (p == 0) |
1541 | return 0; | |
1542 | ||
1543 | for (p = p->first_same_value; p; p = p->next_same_value) | |
770ae6cc RK |
1544 | if (GET_CODE (p->exp) == code |
1545 | /* Make sure this is a valid entry in the table. */ | |
0516f6fe | 1546 | && exp_equiv_p (p->exp, p->exp, 1, false)) |
770ae6cc | 1547 | return p->exp; |
278a83b2 | 1548 | |
7afe21cc RK |
1549 | return 0; |
1550 | } | |
1551 | ||
2c5bfdf7 AN |
1552 | /* Insert X in the hash table, assuming HASH is its hash code and |
1553 | CLASSP is an element of the class it should go in (or 0 if a new | |
1554 | class should be made). COST is the code of X and reg_cost is the | |
1555 | cost of registers in X. It is inserted at the proper position to | |
1556 | keep the class in the order cheapest first. | |
7afe21cc RK |
1557 | |
1558 | MODE is the machine-mode of X, or if X is an integer constant | |
1559 | with VOIDmode then MODE is the mode with which X will be used. | |
1560 | ||
1561 | For elements of equal cheapness, the most recent one | |
1562 | goes in front, except that the first element in the list | |
1563 | remains first unless a cheaper element is added. The order of | |
1564 | pseudo-registers does not matter, as canon_reg will be called to | |
830a38ee | 1565 | find the cheapest when a register is retrieved from the table. |
7afe21cc RK |
1566 | |
1567 | The in_memory field in the hash table element is set to 0. | |
1568 | The caller must set it nonzero if appropriate. | |
1569 | ||
1570 | You should call insert_regs (X, CLASSP, MODIFY) before calling here, | |
1571 | and if insert_regs returns a nonzero value | |
1572 | you must then recompute its hash code before calling here. | |
1573 | ||
1574 | If necessary, update table showing constant values of quantities. */ | |
1575 | ||
7afe21cc | 1576 | static struct table_elt * |
2c5bfdf7 AN |
1577 | insert_with_costs (rtx x, struct table_elt *classp, unsigned int hash, |
1578 | enum machine_mode mode, int cost, int reg_cost) | |
7afe21cc | 1579 | { |
b3694847 | 1580 | struct table_elt *elt; |
7afe21cc RK |
1581 | |
1582 | /* If X is a register and we haven't made a quantity for it, | |
1583 | something is wrong. */ | |
341c100f | 1584 | gcc_assert (!REG_P (x) || REGNO_QTY_VALID_P (REGNO (x))); |
7afe21cc RK |
1585 | |
1586 | /* If X is a hard register, show it is being put in the table. */ | |
f8cfc6aa | 1587 | if (REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER) |
09e18274 | 1588 | add_to_hard_reg_set (&hard_regs_in_table, GET_MODE (x), REGNO (x)); |
7afe21cc | 1589 | |
7afe21cc RK |
1590 | /* Put an element for X into the right hash bucket. */ |
1591 | ||
9b1549b8 DM |
1592 | elt = free_element_chain; |
1593 | if (elt) | |
770ae6cc | 1594 | free_element_chain = elt->next_same_hash; |
9b1549b8 | 1595 | else |
5ed6ace5 | 1596 | elt = XNEW (struct table_elt); |
9b1549b8 | 1597 | |
7afe21cc | 1598 | elt->exp = x; |
db048faf | 1599 | elt->canon_exp = NULL_RTX; |
2c5bfdf7 AN |
1600 | elt->cost = cost; |
1601 | elt->regcost = reg_cost; | |
7afe21cc RK |
1602 | elt->next_same_value = 0; |
1603 | elt->prev_same_value = 0; | |
1604 | elt->next_same_hash = table[hash]; | |
1605 | elt->prev_same_hash = 0; | |
1606 | elt->related_value = 0; | |
1607 | elt->in_memory = 0; | |
1608 | elt->mode = mode; | |
389fdba0 | 1609 | elt->is_const = (CONSTANT_P (x) || fixed_base_plus_p (x)); |
7afe21cc RK |
1610 | |
1611 | if (table[hash]) | |
1612 | table[hash]->prev_same_hash = elt; | |
1613 | table[hash] = elt; | |
1614 | ||
1615 | /* Put it into the proper value-class. */ | |
1616 | if (classp) | |
1617 | { | |
1618 | classp = classp->first_same_value; | |
1619 | if (CHEAPER (elt, classp)) | |
f9da5064 | 1620 | /* Insert at the head of the class. */ |
7afe21cc | 1621 | { |
b3694847 | 1622 | struct table_elt *p; |
7afe21cc RK |
1623 | elt->next_same_value = classp; |
1624 | classp->prev_same_value = elt; | |
1625 | elt->first_same_value = elt; | |
1626 | ||
1627 | for (p = classp; p; p = p->next_same_value) | |
1628 | p->first_same_value = elt; | |
1629 | } | |
1630 | else | |
1631 | { | |
1632 | /* Insert not at head of the class. */ | |
1633 | /* Put it after the last element cheaper than X. */ | |
b3694847 | 1634 | struct table_elt *p, *next; |
770ae6cc | 1635 | |
e84a58ff EB |
1636 | for (p = classp; |
1637 | (next = p->next_same_value) && CHEAPER (next, elt); | |
1638 | p = next) | |
1639 | ; | |
770ae6cc | 1640 | |
7afe21cc RK |
1641 | /* Put it after P and before NEXT. */ |
1642 | elt->next_same_value = next; | |
1643 | if (next) | |
1644 | next->prev_same_value = elt; | |
770ae6cc | 1645 | |
7afe21cc RK |
1646 | elt->prev_same_value = p; |
1647 | p->next_same_value = elt; | |
1648 | elt->first_same_value = classp; | |
1649 | } | |
1650 | } | |
1651 | else | |
1652 | elt->first_same_value = elt; | |
1653 | ||
1654 | /* If this is a constant being set equivalent to a register or a register | |
1655 | being set equivalent to a constant, note the constant equivalence. | |
1656 | ||
1657 | If this is a constant, it cannot be equivalent to a different constant, | |
1658 | and a constant is the only thing that can be cheaper than a register. So | |
1659 | we know the register is the head of the class (before the constant was | |
1660 | inserted). | |
1661 | ||
1662 | If this is a register that is not already known equivalent to a | |
1663 | constant, we must check the entire class. | |
1664 | ||
1665 | If this is a register that is already known equivalent to an insn, | |
1bb98cec | 1666 | update the qtys `const_insn' to show that `this_insn' is the latest |
7afe21cc RK |
1667 | insn making that quantity equivalent to the constant. */ |
1668 | ||
f8cfc6aa JQ |
1669 | if (elt->is_const && classp && REG_P (classp->exp) |
1670 | && !REG_P (x)) | |
7afe21cc | 1671 | { |
1bb98cec DM |
1672 | int exp_q = REG_QTY (REGNO (classp->exp)); |
1673 | struct qty_table_elem *exp_ent = &qty_table[exp_q]; | |
1674 | ||
4de249d9 | 1675 | exp_ent->const_rtx = gen_lowpart (exp_ent->mode, x); |
1bb98cec | 1676 | exp_ent->const_insn = this_insn; |
7afe21cc RK |
1677 | } |
1678 | ||
f8cfc6aa | 1679 | else if (REG_P (x) |
1bb98cec DM |
1680 | && classp |
1681 | && ! qty_table[REG_QTY (REGNO (x))].const_rtx | |
f353588a | 1682 | && ! elt->is_const) |
7afe21cc | 1683 | { |
b3694847 | 1684 | struct table_elt *p; |
7afe21cc RK |
1685 | |
1686 | for (p = classp; p != 0; p = p->next_same_value) | |
1687 | { | |
f8cfc6aa | 1688 | if (p->is_const && !REG_P (p->exp)) |
7afe21cc | 1689 | { |
1bb98cec DM |
1690 | int x_q = REG_QTY (REGNO (x)); |
1691 | struct qty_table_elem *x_ent = &qty_table[x_q]; | |
1692 | ||
770ae6cc | 1693 | x_ent->const_rtx |
4de249d9 | 1694 | = gen_lowpart (GET_MODE (x), p->exp); |
1bb98cec | 1695 | x_ent->const_insn = this_insn; |
7afe21cc RK |
1696 | break; |
1697 | } | |
1698 | } | |
1699 | } | |
1700 | ||
f8cfc6aa | 1701 | else if (REG_P (x) |
1bb98cec DM |
1702 | && qty_table[REG_QTY (REGNO (x))].const_rtx |
1703 | && GET_MODE (x) == qty_table[REG_QTY (REGNO (x))].mode) | |
1704 | qty_table[REG_QTY (REGNO (x))].const_insn = this_insn; | |
7afe21cc RK |
1705 | |
1706 | /* If this is a constant with symbolic value, | |
1707 | and it has a term with an explicit integer value, | |
1708 | link it up with related expressions. */ | |
1709 | if (GET_CODE (x) == CONST) | |
1710 | { | |
1711 | rtx subexp = get_related_value (x); | |
2197a88a | 1712 | unsigned subhash; |
7afe21cc RK |
1713 | struct table_elt *subelt, *subelt_prev; |
1714 | ||
1715 | if (subexp != 0) | |
1716 | { | |
1717 | /* Get the integer-free subexpression in the hash table. */ | |
0516f6fe | 1718 | subhash = SAFE_HASH (subexp, mode); |
7afe21cc RK |
1719 | subelt = lookup (subexp, subhash, mode); |
1720 | if (subelt == 0) | |
9714cf43 | 1721 | subelt = insert (subexp, NULL, subhash, mode); |
7afe21cc RK |
1722 | /* Initialize SUBELT's circular chain if it has none. */ |
1723 | if (subelt->related_value == 0) | |
1724 | subelt->related_value = subelt; | |
1725 | /* Find the element in the circular chain that precedes SUBELT. */ | |
1726 | subelt_prev = subelt; | |
1727 | while (subelt_prev->related_value != subelt) | |
1728 | subelt_prev = subelt_prev->related_value; | |
1729 | /* Put new ELT into SUBELT's circular chain just before SUBELT. | |
1730 | This way the element that follows SUBELT is the oldest one. */ | |
1731 | elt->related_value = subelt_prev->related_value; | |
1732 | subelt_prev->related_value = elt; | |
1733 | } | |
1734 | } | |
1735 | ||
1736 | return elt; | |
1737 | } | |
2c5bfdf7 AN |
1738 | |
1739 | /* Wrap insert_with_costs by passing the default costs. */ | |
1740 | ||
1741 | static struct table_elt * | |
1742 | insert (rtx x, struct table_elt *classp, unsigned int hash, | |
1743 | enum machine_mode mode) | |
1744 | { | |
1745 | return | |
1746 | insert_with_costs (x, classp, hash, mode, COST (x), approx_reg_cost (x)); | |
1747 | } | |
1748 | ||
7afe21cc RK |
1749 | \f |
1750 | /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from | |
1751 | CLASS2 into CLASS1. This is done when we have reached an insn which makes | |
1752 | the two classes equivalent. | |
1753 | ||
1754 | CLASS1 will be the surviving class; CLASS2 should not be used after this | |
1755 | call. | |
1756 | ||
1757 | Any invalid entries in CLASS2 will not be copied. */ | |
1758 | ||
1759 | static void | |
7080f735 | 1760 | merge_equiv_classes (struct table_elt *class1, struct table_elt *class2) |
7afe21cc | 1761 | { |
32e9fa48 | 1762 | struct table_elt *elt, *next, *new_elt; |
7afe21cc RK |
1763 | |
1764 | /* Ensure we start with the head of the classes. */ | |
1765 | class1 = class1->first_same_value; | |
1766 | class2 = class2->first_same_value; | |
1767 | ||
1768 | /* If they were already equal, forget it. */ | |
1769 | if (class1 == class2) | |
1770 | return; | |
1771 | ||
1772 | for (elt = class2; elt; elt = next) | |
1773 | { | |
770ae6cc | 1774 | unsigned int hash; |
7afe21cc RK |
1775 | rtx exp = elt->exp; |
1776 | enum machine_mode mode = elt->mode; | |
1777 | ||
1778 | next = elt->next_same_value; | |
1779 | ||
1780 | /* Remove old entry, make a new one in CLASS1's class. | |
1781 | Don't do this for invalid entries as we cannot find their | |
0f41302f | 1782 | hash code (it also isn't necessary). */ |
0516f6fe | 1783 | if (REG_P (exp) || exp_equiv_p (exp, exp, 1, false)) |
7afe21cc | 1784 | { |
a90fc8e0 RH |
1785 | bool need_rehash = false; |
1786 | ||
7afe21cc | 1787 | hash_arg_in_memory = 0; |
7afe21cc | 1788 | hash = HASH (exp, mode); |
278a83b2 | 1789 | |
f8cfc6aa | 1790 | if (REG_P (exp)) |
a90fc8e0 | 1791 | { |
08a69267 | 1792 | need_rehash = REGNO_QTY_VALID_P (REGNO (exp)); |
a90fc8e0 RH |
1793 | delete_reg_equiv (REGNO (exp)); |
1794 | } | |
278a83b2 | 1795 | |
d556d181 EB |
1796 | if (REG_P (exp) && REGNO (exp) >= FIRST_PSEUDO_REGISTER) |
1797 | remove_pseudo_from_table (exp, hash); | |
1798 | else | |
1799 | remove_from_table (elt, hash); | |
7afe21cc | 1800 | |
a90fc8e0 | 1801 | if (insert_regs (exp, class1, 0) || need_rehash) |
8ae2b8f6 JW |
1802 | { |
1803 | rehash_using_reg (exp); | |
1804 | hash = HASH (exp, mode); | |
1805 | } | |
32e9fa48 KG |
1806 | new_elt = insert (exp, class1, hash, mode); |
1807 | new_elt->in_memory = hash_arg_in_memory; | |
7afe21cc RK |
1808 | } |
1809 | } | |
1810 | } | |
1811 | \f | |
01e752d3 JL |
1812 | /* Flush the entire hash table. */ |
1813 | ||
1814 | static void | |
7080f735 | 1815 | flush_hash_table (void) |
01e752d3 JL |
1816 | { |
1817 | int i; | |
1818 | struct table_elt *p; | |
1819 | ||
9b1549b8 | 1820 | for (i = 0; i < HASH_SIZE; i++) |
01e752d3 JL |
1821 | for (p = table[i]; p; p = table[i]) |
1822 | { | |
1823 | /* Note that invalidate can remove elements | |
1824 | after P in the current hash chain. */ | |
f8cfc6aa | 1825 | if (REG_P (p->exp)) |
524e3576 | 1826 | invalidate (p->exp, VOIDmode); |
01e752d3 JL |
1827 | else |
1828 | remove_from_table (p, i); | |
1829 | } | |
1830 | } | |
14a774a9 | 1831 | \f |
393f9fed | 1832 | /* Function called for each rtx to check whether an anti dependence exist. */ |
2ce6dc2f JH |
1833 | struct check_dependence_data |
1834 | { | |
1835 | enum machine_mode mode; | |
1836 | rtx exp; | |
9ddb66ca | 1837 | rtx addr; |
2ce6dc2f | 1838 | }; |
be8ac49a | 1839 | |
2ce6dc2f | 1840 | static int |
7080f735 | 1841 | check_dependence (rtx *x, void *data) |
2ce6dc2f JH |
1842 | { |
1843 | struct check_dependence_data *d = (struct check_dependence_data *) data; | |
3c0cb5de | 1844 | if (*x && MEM_P (*x)) |
bd280792 | 1845 | return canon_anti_dependence (*x, true, d->exp, d->mode, d->addr); |
2ce6dc2f JH |
1846 | else |
1847 | return 0; | |
1848 | } | |
1849 | \f | |
14a774a9 RK |
1850 | /* Remove from the hash table, or mark as invalid, all expressions whose |
1851 | values could be altered by storing in X. X is a register, a subreg, or | |
1852 | a memory reference with nonvarying address (because, when a memory | |
1853 | reference with a varying address is stored in, all memory references are | |
1854 | removed by invalidate_memory so specific invalidation is superfluous). | |
1855 | FULL_MODE, if not VOIDmode, indicates that this much should be | |
1856 | invalidated instead of just the amount indicated by the mode of X. This | |
1857 | is only used for bitfield stores into memory. | |
1858 | ||
1859 | A nonvarying address may be just a register or just a symbol reference, | |
1860 | or it may be either of those plus a numeric offset. */ | |
7afe21cc RK |
1861 | |
1862 | static void | |
7080f735 | 1863 | invalidate (rtx x, enum machine_mode full_mode) |
7afe21cc | 1864 | { |
b3694847 SS |
1865 | int i; |
1866 | struct table_elt *p; | |
9ddb66ca | 1867 | rtx addr; |
7afe21cc | 1868 | |
14a774a9 | 1869 | switch (GET_CODE (x)) |
7afe21cc | 1870 | { |
14a774a9 RK |
1871 | case REG: |
1872 | { | |
1873 | /* If X is a register, dependencies on its contents are recorded | |
1874 | through the qty number mechanism. Just change the qty number of | |
1875 | the register, mark it as invalid for expressions that refer to it, | |
1876 | and remove it itself. */ | |
770ae6cc RK |
1877 | unsigned int regno = REGNO (x); |
1878 | unsigned int hash = HASH (x, GET_MODE (x)); | |
7afe21cc | 1879 | |
14a774a9 RK |
1880 | /* Remove REGNO from any quantity list it might be on and indicate |
1881 | that its value might have changed. If it is a pseudo, remove its | |
1882 | entry from the hash table. | |
7afe21cc | 1883 | |
14a774a9 RK |
1884 | For a hard register, we do the first two actions above for any |
1885 | additional hard registers corresponding to X. Then, if any of these | |
1886 | registers are in the table, we must remove any REG entries that | |
1887 | overlap these registers. */ | |
7afe21cc | 1888 | |
14a774a9 RK |
1889 | delete_reg_equiv (regno); |
1890 | REG_TICK (regno)++; | |
46081bb3 | 1891 | SUBREG_TICKED (regno) = -1; |
85e4d983 | 1892 | |
14a774a9 | 1893 | if (regno >= FIRST_PSEUDO_REGISTER) |
d556d181 | 1894 | remove_pseudo_from_table (x, hash); |
14a774a9 RK |
1895 | else |
1896 | { | |
1897 | HOST_WIDE_INT in_table | |
1898 | = TEST_HARD_REG_BIT (hard_regs_in_table, regno); | |
09e18274 | 1899 | unsigned int endregno = END_HARD_REGNO (x); |
770ae6cc | 1900 | unsigned int tregno, tendregno, rn; |
b3694847 | 1901 | struct table_elt *p, *next; |
7afe21cc | 1902 | |
14a774a9 | 1903 | CLEAR_HARD_REG_BIT (hard_regs_in_table, regno); |
7afe21cc | 1904 | |
770ae6cc | 1905 | for (rn = regno + 1; rn < endregno; rn++) |
14a774a9 | 1906 | { |
770ae6cc RK |
1907 | in_table |= TEST_HARD_REG_BIT (hard_regs_in_table, rn); |
1908 | CLEAR_HARD_REG_BIT (hard_regs_in_table, rn); | |
1909 | delete_reg_equiv (rn); | |
1910 | REG_TICK (rn)++; | |
46081bb3 | 1911 | SUBREG_TICKED (rn) = -1; |
14a774a9 | 1912 | } |
7afe21cc | 1913 | |
14a774a9 | 1914 | if (in_table) |
9b1549b8 | 1915 | for (hash = 0; hash < HASH_SIZE; hash++) |
14a774a9 RK |
1916 | for (p = table[hash]; p; p = next) |
1917 | { | |
1918 | next = p->next_same_hash; | |
7afe21cc | 1919 | |
f8cfc6aa | 1920 | if (!REG_P (p->exp) |
278a83b2 KH |
1921 | || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER) |
1922 | continue; | |
1923 | ||
14a774a9 | 1924 | tregno = REGNO (p->exp); |
09e18274 | 1925 | tendregno = END_HARD_REGNO (p->exp); |
14a774a9 RK |
1926 | if (tendregno > regno && tregno < endregno) |
1927 | remove_from_table (p, hash); | |
1928 | } | |
1929 | } | |
1930 | } | |
7afe21cc | 1931 | return; |
7afe21cc | 1932 | |
14a774a9 | 1933 | case SUBREG: |
bb4034b3 | 1934 | invalidate (SUBREG_REG (x), VOIDmode); |
7afe21cc | 1935 | return; |
aac5cc16 | 1936 | |
14a774a9 | 1937 | case PARALLEL: |
278a83b2 | 1938 | for (i = XVECLEN (x, 0) - 1; i >= 0; --i) |
aac5cc16 RH |
1939 | invalidate (XVECEXP (x, 0, i), VOIDmode); |
1940 | return; | |
aac5cc16 | 1941 | |
14a774a9 RK |
1942 | case EXPR_LIST: |
1943 | /* This is part of a disjoint return value; extract the location in | |
1944 | question ignoring the offset. */ | |
aac5cc16 RH |
1945 | invalidate (XEXP (x, 0), VOIDmode); |
1946 | return; | |
7afe21cc | 1947 | |
14a774a9 | 1948 | case MEM: |
9ddb66ca | 1949 | addr = canon_rtx (get_addr (XEXP (x, 0))); |
db048faf MM |
1950 | /* Calculate the canonical version of X here so that |
1951 | true_dependence doesn't generate new RTL for X on each call. */ | |
1952 | x = canon_rtx (x); | |
1953 | ||
14a774a9 RK |
1954 | /* Remove all hash table elements that refer to overlapping pieces of |
1955 | memory. */ | |
1956 | if (full_mode == VOIDmode) | |
1957 | full_mode = GET_MODE (x); | |
bb4034b3 | 1958 | |
9b1549b8 | 1959 | for (i = 0; i < HASH_SIZE; i++) |
7afe21cc | 1960 | { |
b3694847 | 1961 | struct table_elt *next; |
14a774a9 RK |
1962 | |
1963 | for (p = table[i]; p; p = next) | |
1964 | { | |
1965 | next = p->next_same_hash; | |
db048faf MM |
1966 | if (p->in_memory) |
1967 | { | |
2ce6dc2f JH |
1968 | struct check_dependence_data d; |
1969 | ||
1970 | /* Just canonicalize the expression once; | |
1971 | otherwise each time we call invalidate | |
1972 | true_dependence will canonicalize the | |
1973 | expression again. */ | |
1974 | if (!p->canon_exp) | |
1975 | p->canon_exp = canon_rtx (p->exp); | |
1976 | d.exp = x; | |
9ddb66ca | 1977 | d.addr = addr; |
2ce6dc2f JH |
1978 | d.mode = full_mode; |
1979 | if (for_each_rtx (&p->canon_exp, check_dependence, &d)) | |
db048faf | 1980 | remove_from_table (p, i); |
db048faf | 1981 | } |
14a774a9 | 1982 | } |
7afe21cc | 1983 | } |
14a774a9 RK |
1984 | return; |
1985 | ||
1986 | default: | |
341c100f | 1987 | gcc_unreachable (); |
7afe21cc RK |
1988 | } |
1989 | } | |
14a774a9 | 1990 | \f |
7afe21cc RK |
1991 | /* Remove all expressions that refer to register REGNO, |
1992 | since they are already invalid, and we are about to | |
1993 | mark that register valid again and don't want the old | |
1994 | expressions to reappear as valid. */ | |
1995 | ||
1996 | static void | |
7080f735 | 1997 | remove_invalid_refs (unsigned int regno) |
7afe21cc | 1998 | { |
770ae6cc RK |
1999 | unsigned int i; |
2000 | struct table_elt *p, *next; | |
7afe21cc | 2001 | |
9b1549b8 | 2002 | for (i = 0; i < HASH_SIZE; i++) |
7afe21cc RK |
2003 | for (p = table[i]; p; p = next) |
2004 | { | |
2005 | next = p->next_same_hash; | |
f8cfc6aa | 2006 | if (!REG_P (p->exp) |
68252e27 | 2007 | && refers_to_regno_p (regno, regno + 1, p->exp, (rtx *) 0)) |
7afe21cc RK |
2008 | remove_from_table (p, i); |
2009 | } | |
2010 | } | |
34c73909 | 2011 | |
ddef6bc7 JJ |
2012 | /* Likewise for a subreg with subreg_reg REGNO, subreg_byte OFFSET, |
2013 | and mode MODE. */ | |
34c73909 | 2014 | static void |
7080f735 AJ |
2015 | remove_invalid_subreg_refs (unsigned int regno, unsigned int offset, |
2016 | enum machine_mode mode) | |
34c73909 | 2017 | { |
770ae6cc RK |
2018 | unsigned int i; |
2019 | struct table_elt *p, *next; | |
ddef6bc7 | 2020 | unsigned int end = offset + (GET_MODE_SIZE (mode) - 1); |
34c73909 | 2021 | |
9b1549b8 | 2022 | for (i = 0; i < HASH_SIZE; i++) |
34c73909 R |
2023 | for (p = table[i]; p; p = next) |
2024 | { | |
ddef6bc7 | 2025 | rtx exp = p->exp; |
34c73909 | 2026 | next = p->next_same_hash; |
278a83b2 | 2027 | |
f8cfc6aa | 2028 | if (!REG_P (exp) |
34c73909 | 2029 | && (GET_CODE (exp) != SUBREG |
f8cfc6aa | 2030 | || !REG_P (SUBREG_REG (exp)) |
34c73909 | 2031 | || REGNO (SUBREG_REG (exp)) != regno |
ddef6bc7 JJ |
2032 | || (((SUBREG_BYTE (exp) |
2033 | + (GET_MODE_SIZE (GET_MODE (exp)) - 1)) >= offset) | |
2034 | && SUBREG_BYTE (exp) <= end)) | |
68252e27 | 2035 | && refers_to_regno_p (regno, regno + 1, p->exp, (rtx *) 0)) |
34c73909 R |
2036 | remove_from_table (p, i); |
2037 | } | |
2038 | } | |
7afe21cc RK |
2039 | \f |
2040 | /* Recompute the hash codes of any valid entries in the hash table that | |
2041 | reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG. | |
2042 | ||
2043 | This is called when we make a jump equivalence. */ | |
2044 | ||
2045 | static void | |
7080f735 | 2046 | rehash_using_reg (rtx x) |
7afe21cc | 2047 | { |
973838fd | 2048 | unsigned int i; |
7afe21cc | 2049 | struct table_elt *p, *next; |
2197a88a | 2050 | unsigned hash; |
7afe21cc RK |
2051 | |
2052 | if (GET_CODE (x) == SUBREG) | |
2053 | x = SUBREG_REG (x); | |
2054 | ||
2055 | /* If X is not a register or if the register is known not to be in any | |
2056 | valid entries in the table, we have no work to do. */ | |
2057 | ||
f8cfc6aa | 2058 | if (!REG_P (x) |
30f72379 MM |
2059 | || REG_IN_TABLE (REGNO (x)) < 0 |
2060 | || REG_IN_TABLE (REGNO (x)) != REG_TICK (REGNO (x))) | |
7afe21cc RK |
2061 | return; |
2062 | ||
2063 | /* Scan all hash chains looking for valid entries that mention X. | |
a90fc8e0 | 2064 | If we find one and it is in the wrong hash chain, move it. */ |
7afe21cc | 2065 | |
9b1549b8 | 2066 | for (i = 0; i < HASH_SIZE; i++) |
7afe21cc RK |
2067 | for (p = table[i]; p; p = next) |
2068 | { | |
2069 | next = p->next_same_hash; | |
a90fc8e0 | 2070 | if (reg_mentioned_p (x, p->exp) |
0516f6fe SB |
2071 | && exp_equiv_p (p->exp, p->exp, 1, false) |
2072 | && i != (hash = SAFE_HASH (p->exp, p->mode))) | |
7afe21cc RK |
2073 | { |
2074 | if (p->next_same_hash) | |
2075 | p->next_same_hash->prev_same_hash = p->prev_same_hash; | |
2076 | ||
2077 | if (p->prev_same_hash) | |
2078 | p->prev_same_hash->next_same_hash = p->next_same_hash; | |
2079 | else | |
2080 | table[i] = p->next_same_hash; | |
2081 | ||
2082 | p->next_same_hash = table[hash]; | |
2083 | p->prev_same_hash = 0; | |
2084 | if (table[hash]) | |
2085 | table[hash]->prev_same_hash = p; | |
2086 | table[hash] = p; | |
2087 | } | |
2088 | } | |
2089 | } | |
2090 | \f | |
7afe21cc RK |
2091 | /* Remove from the hash table any expression that is a call-clobbered |
2092 | register. Also update their TICK values. */ | |
2093 | ||
2094 | static void | |
7080f735 | 2095 | invalidate_for_call (void) |
7afe21cc | 2096 | { |
770ae6cc RK |
2097 | unsigned int regno, endregno; |
2098 | unsigned int i; | |
2197a88a | 2099 | unsigned hash; |
7afe21cc RK |
2100 | struct table_elt *p, *next; |
2101 | int in_table = 0; | |
c7fb4c7a | 2102 | hard_reg_set_iterator hrsi; |
7afe21cc RK |
2103 | |
2104 | /* Go through all the hard registers. For each that is clobbered in | |
2105 | a CALL_INSN, remove the register from quantity chains and update | |
2106 | reg_tick if defined. Also see if any of these registers is currently | |
2107 | in the table. */ | |
c7fb4c7a SB |
2108 | EXECUTE_IF_SET_IN_HARD_REG_SET (regs_invalidated_by_call, 0, regno, hrsi) |
2109 | { | |
2110 | delete_reg_equiv (regno); | |
2111 | if (REG_TICK (regno) >= 0) | |
2112 | { | |
2113 | REG_TICK (regno)++; | |
2114 | SUBREG_TICKED (regno) = -1; | |
2115 | } | |
2116 | in_table |= (TEST_HARD_REG_BIT (hard_regs_in_table, regno) != 0); | |
2117 | } | |
7afe21cc RK |
2118 | |
2119 | /* In the case where we have no call-clobbered hard registers in the | |
2120 | table, we are done. Otherwise, scan the table and remove any | |
2121 | entry that overlaps a call-clobbered register. */ | |
2122 | ||
2123 | if (in_table) | |
9b1549b8 | 2124 | for (hash = 0; hash < HASH_SIZE; hash++) |
7afe21cc RK |
2125 | for (p = table[hash]; p; p = next) |
2126 | { | |
2127 | next = p->next_same_hash; | |
2128 | ||
f8cfc6aa | 2129 | if (!REG_P (p->exp) |
7afe21cc RK |
2130 | || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER) |
2131 | continue; | |
2132 | ||
2133 | regno = REGNO (p->exp); | |
09e18274 | 2134 | endregno = END_HARD_REGNO (p->exp); |
7afe21cc RK |
2135 | |
2136 | for (i = regno; i < endregno; i++) | |
2137 | if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i)) | |
2138 | { | |
2139 | remove_from_table (p, hash); | |
2140 | break; | |
2141 | } | |
2142 | } | |
2143 | } | |
2144 | \f | |
2145 | /* Given an expression X of type CONST, | |
2146 | and ELT which is its table entry (or 0 if it | |
2147 | is not in the hash table), | |
2148 | return an alternate expression for X as a register plus integer. | |
2149 | If none can be found, return 0. */ | |
2150 | ||
2151 | static rtx | |
7080f735 | 2152 | use_related_value (rtx x, struct table_elt *elt) |
7afe21cc | 2153 | { |
b3694847 SS |
2154 | struct table_elt *relt = 0; |
2155 | struct table_elt *p, *q; | |
906c4e36 | 2156 | HOST_WIDE_INT offset; |
7afe21cc RK |
2157 | |
2158 | /* First, is there anything related known? | |
2159 | If we have a table element, we can tell from that. | |
2160 | Otherwise, must look it up. */ | |
2161 | ||
2162 | if (elt != 0 && elt->related_value != 0) | |
2163 | relt = elt; | |
2164 | else if (elt == 0 && GET_CODE (x) == CONST) | |
2165 | { | |
2166 | rtx subexp = get_related_value (x); | |
2167 | if (subexp != 0) | |
2168 | relt = lookup (subexp, | |
0516f6fe | 2169 | SAFE_HASH (subexp, GET_MODE (subexp)), |
7afe21cc RK |
2170 | GET_MODE (subexp)); |
2171 | } | |
2172 | ||
2173 | if (relt == 0) | |
2174 | return 0; | |
2175 | ||
2176 | /* Search all related table entries for one that has an | |
2177 | equivalent register. */ | |
2178 | ||
2179 | p = relt; | |
2180 | while (1) | |
2181 | { | |
2182 | /* This loop is strange in that it is executed in two different cases. | |
2183 | The first is when X is already in the table. Then it is searching | |
2184 | the RELATED_VALUE list of X's class (RELT). The second case is when | |
2185 | X is not in the table. Then RELT points to a class for the related | |
2186 | value. | |
2187 | ||
2188 | Ensure that, whatever case we are in, that we ignore classes that have | |
2189 | the same value as X. */ | |
2190 | ||
2191 | if (rtx_equal_p (x, p->exp)) | |
2192 | q = 0; | |
2193 | else | |
2194 | for (q = p->first_same_value; q; q = q->next_same_value) | |
f8cfc6aa | 2195 | if (REG_P (q->exp)) |
7afe21cc RK |
2196 | break; |
2197 | ||
2198 | if (q) | |
2199 | break; | |
2200 | ||
2201 | p = p->related_value; | |
2202 | ||
2203 | /* We went all the way around, so there is nothing to be found. | |
2204 | Alternatively, perhaps RELT was in the table for some other reason | |
2205 | and it has no related values recorded. */ | |
2206 | if (p == relt || p == 0) | |
2207 | break; | |
2208 | } | |
2209 | ||
2210 | if (q == 0) | |
2211 | return 0; | |
2212 | ||
2213 | offset = (get_integer_term (x) - get_integer_term (p->exp)); | |
2214 | /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */ | |
0a81f074 | 2215 | return plus_constant (q->mode, q->exp, offset); |
7afe21cc RK |
2216 | } |
2217 | \f | |
e855c69d | 2218 | |
6462bb43 AO |
2219 | /* Hash a string. Just add its bytes up. */ |
2220 | static inline unsigned | |
0516f6fe | 2221 | hash_rtx_string (const char *ps) |
6462bb43 AO |
2222 | { |
2223 | unsigned hash = 0; | |
68252e27 KH |
2224 | const unsigned char *p = (const unsigned char *) ps; |
2225 | ||
6462bb43 AO |
2226 | if (p) |
2227 | while (*p) | |
2228 | hash += *p++; | |
2229 | ||
2230 | return hash; | |
2231 | } | |
2232 | ||
b8698a0f | 2233 | /* Same as hash_rtx, but call CB on each rtx if it is not NULL. |
e855c69d | 2234 | When the callback returns true, we continue with the new rtx. */ |
7afe21cc | 2235 | |
0516f6fe | 2236 | unsigned |
e855c69d AB |
2237 | hash_rtx_cb (const_rtx x, enum machine_mode mode, |
2238 | int *do_not_record_p, int *hash_arg_in_memory_p, | |
2239 | bool have_reg_qty, hash_rtx_callback_function cb) | |
7afe21cc | 2240 | { |
b3694847 SS |
2241 | int i, j; |
2242 | unsigned hash = 0; | |
2243 | enum rtx_code code; | |
2244 | const char *fmt; | |
e855c69d AB |
2245 | enum machine_mode newmode; |
2246 | rtx newx; | |
7afe21cc | 2247 | |
0516f6fe SB |
2248 | /* Used to turn recursion into iteration. We can't rely on GCC's |
2249 | tail-recursion elimination since we need to keep accumulating values | |
2250 | in HASH. */ | |
7afe21cc RK |
2251 | repeat: |
2252 | if (x == 0) | |
2253 | return hash; | |
2254 | ||
e855c69d | 2255 | /* Invoke the callback first. */ |
b8698a0f | 2256 | if (cb != NULL |
e855c69d AB |
2257 | && ((*cb) (x, mode, &newx, &newmode))) |
2258 | { | |
2259 | hash += hash_rtx_cb (newx, newmode, do_not_record_p, | |
2260 | hash_arg_in_memory_p, have_reg_qty, cb); | |
2261 | return hash; | |
2262 | } | |
2263 | ||
7afe21cc RK |
2264 | code = GET_CODE (x); |
2265 | switch (code) | |
2266 | { | |
2267 | case REG: | |
2268 | { | |
770ae6cc | 2269 | unsigned int regno = REGNO (x); |
7afe21cc | 2270 | |
e855c69d | 2271 | if (do_not_record_p && !reload_completed) |
7afe21cc | 2272 | { |
0516f6fe SB |
2273 | /* On some machines, we can't record any non-fixed hard register, |
2274 | because extending its life will cause reload problems. We | |
2275 | consider ap, fp, sp, gp to be fixed for this purpose. | |
2276 | ||
2277 | We also consider CCmode registers to be fixed for this purpose; | |
2278 | failure to do so leads to failure to simplify 0<100 type of | |
2279 | conditionals. | |
2280 | ||
2281 | On all machines, we can't record any global registers. | |
2282 | Nor should we record any register that is in a small | |
07b8f0a8 | 2283 | class, as defined by TARGET_CLASS_LIKELY_SPILLED_P. */ |
0516f6fe SB |
2284 | bool record; |
2285 | ||
2286 | if (regno >= FIRST_PSEUDO_REGISTER) | |
2287 | record = true; | |
2288 | else if (x == frame_pointer_rtx | |
2289 | || x == hard_frame_pointer_rtx | |
2290 | || x == arg_pointer_rtx | |
2291 | || x == stack_pointer_rtx | |
2292 | || x == pic_offset_table_rtx) | |
2293 | record = true; | |
2294 | else if (global_regs[regno]) | |
2295 | record = false; | |
2296 | else if (fixed_regs[regno]) | |
2297 | record = true; | |
2298 | else if (GET_MODE_CLASS (GET_MODE (x)) == MODE_CC) | |
2299 | record = true; | |
42db504c | 2300 | else if (targetm.small_register_classes_for_mode_p (GET_MODE (x))) |
0516f6fe | 2301 | record = false; |
07b8f0a8 | 2302 | else if (targetm.class_likely_spilled_p (REGNO_REG_CLASS (regno))) |
0516f6fe SB |
2303 | record = false; |
2304 | else | |
2305 | record = true; | |
2306 | ||
2307 | if (!record) | |
2308 | { | |
2309 | *do_not_record_p = 1; | |
2310 | return 0; | |
2311 | } | |
7afe21cc | 2312 | } |
770ae6cc | 2313 | |
0516f6fe SB |
2314 | hash += ((unsigned int) REG << 7); |
2315 | hash += (have_reg_qty ? (unsigned) REG_QTY (regno) : regno); | |
2197a88a | 2316 | return hash; |
7afe21cc RK |
2317 | } |
2318 | ||
34c73909 R |
2319 | /* We handle SUBREG of a REG specially because the underlying |
2320 | reg changes its hash value with every value change; we don't | |
2321 | want to have to forget unrelated subregs when one subreg changes. */ | |
2322 | case SUBREG: | |
2323 | { | |
f8cfc6aa | 2324 | if (REG_P (SUBREG_REG (x))) |
34c73909 | 2325 | { |
0516f6fe | 2326 | hash += (((unsigned int) SUBREG << 7) |
ddef6bc7 JJ |
2327 | + REGNO (SUBREG_REG (x)) |
2328 | + (SUBREG_BYTE (x) / UNITS_PER_WORD)); | |
34c73909 R |
2329 | return hash; |
2330 | } | |
2331 | break; | |
2332 | } | |
2333 | ||
7afe21cc | 2334 | case CONST_INT: |
0516f6fe SB |
2335 | hash += (((unsigned int) CONST_INT << 7) + (unsigned int) mode |
2336 | + (unsigned int) INTVAL (x)); | |
2337 | return hash; | |
7afe21cc RK |
2338 | |
2339 | case CONST_DOUBLE: | |
2340 | /* This is like the general case, except that it only counts | |
2341 | the integers representing the constant. */ | |
0516f6fe | 2342 | hash += (unsigned int) code + (unsigned int) GET_MODE (x); |
969c8517 | 2343 | if (GET_MODE (x) != VOIDmode) |
46b33600 | 2344 | hash += real_hash (CONST_DOUBLE_REAL_VALUE (x)); |
969c8517 | 2345 | else |
0516f6fe SB |
2346 | hash += ((unsigned int) CONST_DOUBLE_LOW (x) |
2347 | + (unsigned int) CONST_DOUBLE_HIGH (x)); | |
7afe21cc RK |
2348 | return hash; |
2349 | ||
091a3ac7 CF |
2350 | case CONST_FIXED: |
2351 | hash += (unsigned int) code + (unsigned int) GET_MODE (x); | |
2352 | hash += fixed_hash (CONST_FIXED_VALUE (x)); | |
2353 | return hash; | |
2354 | ||
69ef87e2 AH |
2355 | case CONST_VECTOR: |
2356 | { | |
2357 | int units; | |
2358 | rtx elt; | |
2359 | ||
2360 | units = CONST_VECTOR_NUNITS (x); | |
2361 | ||
2362 | for (i = 0; i < units; ++i) | |
2363 | { | |
2364 | elt = CONST_VECTOR_ELT (x, i); | |
e855c69d | 2365 | hash += hash_rtx_cb (elt, GET_MODE (elt), |
b8698a0f | 2366 | do_not_record_p, hash_arg_in_memory_p, |
e855c69d | 2367 | have_reg_qty, cb); |
69ef87e2 AH |
2368 | } |
2369 | ||
2370 | return hash; | |
2371 | } | |
2372 | ||
7afe21cc RK |
2373 | /* Assume there is only one rtx object for any given label. */ |
2374 | case LABEL_REF: | |
0516f6fe SB |
2375 | /* We don't hash on the address of the CODE_LABEL to avoid bootstrap |
2376 | differences and differences between each stage's debugging dumps. */ | |
2377 | hash += (((unsigned int) LABEL_REF << 7) | |
2378 | + CODE_LABEL_NUMBER (XEXP (x, 0))); | |
2197a88a | 2379 | return hash; |
7afe21cc RK |
2380 | |
2381 | case SYMBOL_REF: | |
0516f6fe SB |
2382 | { |
2383 | /* Don't hash on the symbol's address to avoid bootstrap differences. | |
2384 | Different hash values may cause expressions to be recorded in | |
2385 | different orders and thus different registers to be used in the | |
2386 | final assembler. This also avoids differences in the dump files | |
2387 | between various stages. */ | |
2388 | unsigned int h = 0; | |
2389 | const unsigned char *p = (const unsigned char *) XSTR (x, 0); | |
2390 | ||
2391 | while (*p) | |
2392 | h += (h << 7) + *p++; /* ??? revisit */ | |
2393 | ||
2394 | hash += ((unsigned int) SYMBOL_REF << 7) + h; | |
2395 | return hash; | |
2396 | } | |
7afe21cc RK |
2397 | |
2398 | case MEM: | |
14a774a9 RK |
2399 | /* We don't record if marked volatile or if BLKmode since we don't |
2400 | know the size of the move. */ | |
e855c69d | 2401 | if (do_not_record_p && (MEM_VOLATILE_P (x) || GET_MODE (x) == BLKmode)) |
7afe21cc | 2402 | { |
0516f6fe | 2403 | *do_not_record_p = 1; |
7afe21cc RK |
2404 | return 0; |
2405 | } | |
0516f6fe SB |
2406 | if (hash_arg_in_memory_p && !MEM_READONLY_P (x)) |
2407 | *hash_arg_in_memory_p = 1; | |
4977bab6 | 2408 | |
7afe21cc RK |
2409 | /* Now that we have already found this special case, |
2410 | might as well speed it up as much as possible. */ | |
2197a88a | 2411 | hash += (unsigned) MEM; |
7afe21cc RK |
2412 | x = XEXP (x, 0); |
2413 | goto repeat; | |
2414 | ||
bb07060a JW |
2415 | case USE: |
2416 | /* A USE that mentions non-volatile memory needs special | |
2417 | handling since the MEM may be BLKmode which normally | |
2418 | prevents an entry from being made. Pure calls are | |
0516f6fe SB |
2419 | marked by a USE which mentions BLKmode memory. |
2420 | See calls.c:emit_call_1. */ | |
3c0cb5de | 2421 | if (MEM_P (XEXP (x, 0)) |
bb07060a JW |
2422 | && ! MEM_VOLATILE_P (XEXP (x, 0))) |
2423 | { | |
68252e27 | 2424 | hash += (unsigned) USE; |
bb07060a JW |
2425 | x = XEXP (x, 0); |
2426 | ||
0516f6fe SB |
2427 | if (hash_arg_in_memory_p && !MEM_READONLY_P (x)) |
2428 | *hash_arg_in_memory_p = 1; | |
bb07060a JW |
2429 | |
2430 | /* Now that we have already found this special case, | |
2431 | might as well speed it up as much as possible. */ | |
2432 | hash += (unsigned) MEM; | |
2433 | x = XEXP (x, 0); | |
2434 | goto repeat; | |
2435 | } | |
2436 | break; | |
2437 | ||
7afe21cc RK |
2438 | case PRE_DEC: |
2439 | case PRE_INC: | |
2440 | case POST_DEC: | |
2441 | case POST_INC: | |
4b983fdc RH |
2442 | case PRE_MODIFY: |
2443 | case POST_MODIFY: | |
7afe21cc RK |
2444 | case PC: |
2445 | case CC0: | |
2446 | case CALL: | |
2447 | case UNSPEC_VOLATILE: | |
e855c69d AB |
2448 | if (do_not_record_p) { |
2449 | *do_not_record_p = 1; | |
2450 | return 0; | |
2451 | } | |
2452 | else | |
2453 | return hash; | |
2454 | break; | |
7afe21cc RK |
2455 | |
2456 | case ASM_OPERANDS: | |
e855c69d | 2457 | if (do_not_record_p && MEM_VOLATILE_P (x)) |
7afe21cc | 2458 | { |
0516f6fe | 2459 | *do_not_record_p = 1; |
7afe21cc RK |
2460 | return 0; |
2461 | } | |
6462bb43 AO |
2462 | else |
2463 | { | |
2464 | /* We don't want to take the filename and line into account. */ | |
2465 | hash += (unsigned) code + (unsigned) GET_MODE (x) | |
0516f6fe SB |
2466 | + hash_rtx_string (ASM_OPERANDS_TEMPLATE (x)) |
2467 | + hash_rtx_string (ASM_OPERANDS_OUTPUT_CONSTRAINT (x)) | |
6462bb43 AO |
2468 | + (unsigned) ASM_OPERANDS_OUTPUT_IDX (x); |
2469 | ||
2470 | if (ASM_OPERANDS_INPUT_LENGTH (x)) | |
2471 | { | |
2472 | for (i = 1; i < ASM_OPERANDS_INPUT_LENGTH (x); i++) | |
2473 | { | |
e855c69d AB |
2474 | hash += (hash_rtx_cb (ASM_OPERANDS_INPUT (x, i), |
2475 | GET_MODE (ASM_OPERANDS_INPUT (x, i)), | |
2476 | do_not_record_p, hash_arg_in_memory_p, | |
2477 | have_reg_qty, cb) | |
0516f6fe | 2478 | + hash_rtx_string |
e855c69d | 2479 | (ASM_OPERANDS_INPUT_CONSTRAINT (x, i))); |
6462bb43 AO |
2480 | } |
2481 | ||
0516f6fe | 2482 | hash += hash_rtx_string (ASM_OPERANDS_INPUT_CONSTRAINT (x, 0)); |
6462bb43 AO |
2483 | x = ASM_OPERANDS_INPUT (x, 0); |
2484 | mode = GET_MODE (x); | |
2485 | goto repeat; | |
2486 | } | |
2487 | ||
2488 | return hash; | |
2489 | } | |
e9a25f70 | 2490 | break; |
278a83b2 | 2491 | |
e9a25f70 JL |
2492 | default: |
2493 | break; | |
7afe21cc RK |
2494 | } |
2495 | ||
2496 | i = GET_RTX_LENGTH (code) - 1; | |
2197a88a | 2497 | hash += (unsigned) code + (unsigned) GET_MODE (x); |
7afe21cc RK |
2498 | fmt = GET_RTX_FORMAT (code); |
2499 | for (; i >= 0; i--) | |
2500 | { | |
341c100f | 2501 | switch (fmt[i]) |
7afe21cc | 2502 | { |
341c100f | 2503 | case 'e': |
7afe21cc RK |
2504 | /* If we are about to do the last recursive call |
2505 | needed at this level, change it into iteration. | |
2506 | This function is called enough to be worth it. */ | |
2507 | if (i == 0) | |
2508 | { | |
0516f6fe | 2509 | x = XEXP (x, i); |
7afe21cc RK |
2510 | goto repeat; |
2511 | } | |
b8698a0f | 2512 | |
bbbbb16a | 2513 | hash += hash_rtx_cb (XEXP (x, i), VOIDmode, do_not_record_p, |
e855c69d AB |
2514 | hash_arg_in_memory_p, |
2515 | have_reg_qty, cb); | |
341c100f | 2516 | break; |
0516f6fe | 2517 | |
341c100f NS |
2518 | case 'E': |
2519 | for (j = 0; j < XVECLEN (x, i); j++) | |
bbbbb16a | 2520 | hash += hash_rtx_cb (XVECEXP (x, i, j), VOIDmode, do_not_record_p, |
e855c69d AB |
2521 | hash_arg_in_memory_p, |
2522 | have_reg_qty, cb); | |
341c100f | 2523 | break; |
0516f6fe | 2524 | |
341c100f NS |
2525 | case 's': |
2526 | hash += hash_rtx_string (XSTR (x, i)); | |
2527 | break; | |
2528 | ||
2529 | case 'i': | |
2530 | hash += (unsigned int) XINT (x, i); | |
2531 | break; | |
2532 | ||
2533 | case '0': case 't': | |
2534 | /* Unused. */ | |
2535 | break; | |
2536 | ||
2537 | default: | |
2538 | gcc_unreachable (); | |
2539 | } | |
7afe21cc | 2540 | } |
0516f6fe | 2541 | |
7afe21cc RK |
2542 | return hash; |
2543 | } | |
2544 | ||
e855c69d AB |
2545 | /* Hash an rtx. We are careful to make sure the value is never negative. |
2546 | Equivalent registers hash identically. | |
2547 | MODE is used in hashing for CONST_INTs only; | |
2548 | otherwise the mode of X is used. | |
2549 | ||
2550 | Store 1 in DO_NOT_RECORD_P if any subexpression is volatile. | |
2551 | ||
2552 | If HASH_ARG_IN_MEMORY_P is not NULL, store 1 in it if X contains | |
3e55d79b | 2553 | a MEM rtx which does not have the MEM_READONLY_P flag set. |
e855c69d AB |
2554 | |
2555 | Note that cse_insn knows that the hash code of a MEM expression | |
2556 | is just (int) MEM plus the hash code of the address. */ | |
2557 | ||
2558 | unsigned | |
2559 | hash_rtx (const_rtx x, enum machine_mode mode, int *do_not_record_p, | |
2560 | int *hash_arg_in_memory_p, bool have_reg_qty) | |
2561 | { | |
2562 | return hash_rtx_cb (x, mode, do_not_record_p, | |
2563 | hash_arg_in_memory_p, have_reg_qty, NULL); | |
2564 | } | |
2565 | ||
0516f6fe SB |
2566 | /* Hash an rtx X for cse via hash_rtx. |
2567 | Stores 1 in do_not_record if any subexpression is volatile. | |
2568 | Stores 1 in hash_arg_in_memory if X contains a mem rtx which | |
3e55d79b | 2569 | does not have the MEM_READONLY_P flag set. */ |
0516f6fe SB |
2570 | |
2571 | static inline unsigned | |
2572 | canon_hash (rtx x, enum machine_mode mode) | |
2573 | { | |
2574 | return hash_rtx (x, mode, &do_not_record, &hash_arg_in_memory, true); | |
2575 | } | |
2576 | ||
2577 | /* Like canon_hash but with no side effects, i.e. do_not_record | |
2578 | and hash_arg_in_memory are not changed. */ | |
7afe21cc | 2579 | |
0516f6fe | 2580 | static inline unsigned |
7080f735 | 2581 | safe_hash (rtx x, enum machine_mode mode) |
7afe21cc | 2582 | { |
0516f6fe SB |
2583 | int dummy_do_not_record; |
2584 | return hash_rtx (x, mode, &dummy_do_not_record, NULL, true); | |
7afe21cc RK |
2585 | } |
2586 | \f | |
2587 | /* Return 1 iff X and Y would canonicalize into the same thing, | |
2588 | without actually constructing the canonicalization of either one. | |
2589 | If VALIDATE is nonzero, | |
2590 | we assume X is an expression being processed from the rtl | |
2591 | and Y was found in the hash table. We check register refs | |
2592 | in Y for being marked as valid. | |
2593 | ||
0516f6fe | 2594 | If FOR_GCSE is true, we compare X and Y for equivalence for GCSE. */ |
7afe21cc | 2595 | |
0516f6fe | 2596 | int |
4f588890 | 2597 | exp_equiv_p (const_rtx x, const_rtx y, int validate, bool for_gcse) |
7afe21cc | 2598 | { |
b3694847 SS |
2599 | int i, j; |
2600 | enum rtx_code code; | |
2601 | const char *fmt; | |
7afe21cc RK |
2602 | |
2603 | /* Note: it is incorrect to assume an expression is equivalent to itself | |
2604 | if VALIDATE is nonzero. */ | |
2605 | if (x == y && !validate) | |
2606 | return 1; | |
0516f6fe | 2607 | |
7afe21cc RK |
2608 | if (x == 0 || y == 0) |
2609 | return x == y; | |
2610 | ||
2611 | code = GET_CODE (x); | |
2612 | if (code != GET_CODE (y)) | |
0516f6fe | 2613 | return 0; |
7afe21cc RK |
2614 | |
2615 | /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */ | |
2616 | if (GET_MODE (x) != GET_MODE (y)) | |
2617 | return 0; | |
2618 | ||
5932a4d4 | 2619 | /* MEMs referring to different address space are not equivalent. */ |
09e881c9 BE |
2620 | if (code == MEM && MEM_ADDR_SPACE (x) != MEM_ADDR_SPACE (y)) |
2621 | return 0; | |
2622 | ||
7afe21cc RK |
2623 | switch (code) |
2624 | { | |
2625 | case PC: | |
2626 | case CC0: | |
d8116890 | 2627 | CASE_CONST_UNIQUE: |
c13e8210 | 2628 | return x == y; |
7afe21cc RK |
2629 | |
2630 | case LABEL_REF: | |
7afe21cc RK |
2631 | return XEXP (x, 0) == XEXP (y, 0); |
2632 | ||
f54d4924 RK |
2633 | case SYMBOL_REF: |
2634 | return XSTR (x, 0) == XSTR (y, 0); | |
2635 | ||
7afe21cc | 2636 | case REG: |
0516f6fe SB |
2637 | if (for_gcse) |
2638 | return REGNO (x) == REGNO (y); | |
2639 | else | |
2640 | { | |
2641 | unsigned int regno = REGNO (y); | |
2642 | unsigned int i; | |
09e18274 | 2643 | unsigned int endregno = END_REGNO (y); |
7afe21cc | 2644 | |
0516f6fe SB |
2645 | /* If the quantities are not the same, the expressions are not |
2646 | equivalent. If there are and we are not to validate, they | |
2647 | are equivalent. Otherwise, ensure all regs are up-to-date. */ | |
7afe21cc | 2648 | |
0516f6fe SB |
2649 | if (REG_QTY (REGNO (x)) != REG_QTY (regno)) |
2650 | return 0; | |
2651 | ||
2652 | if (! validate) | |
2653 | return 1; | |
2654 | ||
2655 | for (i = regno; i < endregno; i++) | |
2656 | if (REG_IN_TABLE (i) != REG_TICK (i)) | |
2657 | return 0; | |
7afe21cc | 2658 | |
7afe21cc | 2659 | return 1; |
0516f6fe | 2660 | } |
7afe21cc | 2661 | |
0516f6fe SB |
2662 | case MEM: |
2663 | if (for_gcse) | |
2664 | { | |
0516f6fe SB |
2665 | /* A volatile mem should not be considered equivalent to any |
2666 | other. */ | |
2667 | if (MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y)) | |
2668 | return 0; | |
8a76c4a0 JJ |
2669 | |
2670 | /* Can't merge two expressions in different alias sets, since we | |
2671 | can decide that the expression is transparent in a block when | |
2672 | it isn't, due to it being set with the different alias set. | |
2673 | ||
2674 | Also, can't merge two expressions with different MEM_ATTRS. | |
2675 | They could e.g. be two different entities allocated into the | |
2676 | same space on the stack (see e.g. PR25130). In that case, the | |
2677 | MEM addresses can be the same, even though the two MEMs are | |
2678 | absolutely not equivalent. | |
2679 | ||
2680 | But because really all MEM attributes should be the same for | |
2681 | equivalent MEMs, we just use the invariant that MEMs that have | |
2682 | the same attributes share the same mem_attrs data structure. */ | |
2683 | if (MEM_ATTRS (x) != MEM_ATTRS (y)) | |
2684 | return 0; | |
0516f6fe SB |
2685 | } |
2686 | break; | |
7afe21cc RK |
2687 | |
2688 | /* For commutative operations, check both orders. */ | |
2689 | case PLUS: | |
2690 | case MULT: | |
2691 | case AND: | |
2692 | case IOR: | |
2693 | case XOR: | |
2694 | case NE: | |
2695 | case EQ: | |
0516f6fe SB |
2696 | return ((exp_equiv_p (XEXP (x, 0), XEXP (y, 0), |
2697 | validate, for_gcse) | |
7afe21cc | 2698 | && exp_equiv_p (XEXP (x, 1), XEXP (y, 1), |
0516f6fe | 2699 | validate, for_gcse)) |
7afe21cc | 2700 | || (exp_equiv_p (XEXP (x, 0), XEXP (y, 1), |
0516f6fe | 2701 | validate, for_gcse) |
7afe21cc | 2702 | && exp_equiv_p (XEXP (x, 1), XEXP (y, 0), |
0516f6fe | 2703 | validate, for_gcse))); |
278a83b2 | 2704 | |
6462bb43 AO |
2705 | case ASM_OPERANDS: |
2706 | /* We don't use the generic code below because we want to | |
2707 | disregard filename and line numbers. */ | |
2708 | ||
2709 | /* A volatile asm isn't equivalent to any other. */ | |
2710 | if (MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y)) | |
2711 | return 0; | |
2712 | ||
2713 | if (GET_MODE (x) != GET_MODE (y) | |
2714 | || strcmp (ASM_OPERANDS_TEMPLATE (x), ASM_OPERANDS_TEMPLATE (y)) | |
2715 | || strcmp (ASM_OPERANDS_OUTPUT_CONSTRAINT (x), | |
2716 | ASM_OPERANDS_OUTPUT_CONSTRAINT (y)) | |
2717 | || ASM_OPERANDS_OUTPUT_IDX (x) != ASM_OPERANDS_OUTPUT_IDX (y) | |
2718 | || ASM_OPERANDS_INPUT_LENGTH (x) != ASM_OPERANDS_INPUT_LENGTH (y)) | |
2719 | return 0; | |
2720 | ||
2721 | if (ASM_OPERANDS_INPUT_LENGTH (x)) | |
2722 | { | |
2723 | for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--) | |
2724 | if (! exp_equiv_p (ASM_OPERANDS_INPUT (x, i), | |
2725 | ASM_OPERANDS_INPUT (y, i), | |
0516f6fe | 2726 | validate, for_gcse) |
6462bb43 AO |
2727 | || strcmp (ASM_OPERANDS_INPUT_CONSTRAINT (x, i), |
2728 | ASM_OPERANDS_INPUT_CONSTRAINT (y, i))) | |
2729 | return 0; | |
2730 | } | |
2731 | ||
2732 | return 1; | |
2733 | ||
e9a25f70 JL |
2734 | default: |
2735 | break; | |
7afe21cc RK |
2736 | } |
2737 | ||
2738 | /* Compare the elements. If any pair of corresponding elements | |
0516f6fe | 2739 | fail to match, return 0 for the whole thing. */ |
7afe21cc RK |
2740 | |
2741 | fmt = GET_RTX_FORMAT (code); | |
2742 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
2743 | { | |
906c4e36 | 2744 | switch (fmt[i]) |
7afe21cc | 2745 | { |
906c4e36 | 2746 | case 'e': |
0516f6fe SB |
2747 | if (! exp_equiv_p (XEXP (x, i), XEXP (y, i), |
2748 | validate, for_gcse)) | |
7afe21cc | 2749 | return 0; |
906c4e36 RK |
2750 | break; |
2751 | ||
2752 | case 'E': | |
7afe21cc RK |
2753 | if (XVECLEN (x, i) != XVECLEN (y, i)) |
2754 | return 0; | |
2755 | for (j = 0; j < XVECLEN (x, i); j++) | |
2756 | if (! exp_equiv_p (XVECEXP (x, i, j), XVECEXP (y, i, j), | |
0516f6fe | 2757 | validate, for_gcse)) |
7afe21cc | 2758 | return 0; |
906c4e36 RK |
2759 | break; |
2760 | ||
2761 | case 's': | |
7afe21cc RK |
2762 | if (strcmp (XSTR (x, i), XSTR (y, i))) |
2763 | return 0; | |
906c4e36 RK |
2764 | break; |
2765 | ||
2766 | case 'i': | |
7afe21cc RK |
2767 | if (XINT (x, i) != XINT (y, i)) |
2768 | return 0; | |
906c4e36 RK |
2769 | break; |
2770 | ||
2771 | case 'w': | |
2772 | if (XWINT (x, i) != XWINT (y, i)) | |
2773 | return 0; | |
278a83b2 | 2774 | break; |
906c4e36 RK |
2775 | |
2776 | case '0': | |
8f985ec4 | 2777 | case 't': |
906c4e36 RK |
2778 | break; |
2779 | ||
2780 | default: | |
341c100f | 2781 | gcc_unreachable (); |
7afe21cc | 2782 | } |
278a83b2 | 2783 | } |
906c4e36 | 2784 | |
7afe21cc RK |
2785 | return 1; |
2786 | } | |
2787 | \f | |
eef3c949 RS |
2788 | /* Subroutine of canon_reg. Pass *XLOC through canon_reg, and validate |
2789 | the result if necessary. INSN is as for canon_reg. */ | |
2790 | ||
2791 | static void | |
2792 | validate_canon_reg (rtx *xloc, rtx insn) | |
2793 | { | |
6fb5fa3c DB |
2794 | if (*xloc) |
2795 | { | |
32e9fa48 | 2796 | rtx new_rtx = canon_reg (*xloc, insn); |
eef3c949 | 2797 | |
6fb5fa3c DB |
2798 | /* If replacing pseudo with hard reg or vice versa, ensure the |
2799 | insn remains valid. Likewise if the insn has MATCH_DUPs. */ | |
32e9fa48 KG |
2800 | gcc_assert (insn && new_rtx); |
2801 | validate_change (insn, xloc, new_rtx, 1); | |
6fb5fa3c | 2802 | } |
eef3c949 RS |
2803 | } |
2804 | ||
7afe21cc RK |
2805 | /* Canonicalize an expression: |
2806 | replace each register reference inside it | |
2807 | with the "oldest" equivalent register. | |
2808 | ||
67e0a632 | 2809 | If INSN is nonzero validate_change is used to ensure that INSN remains valid |
da7d8304 | 2810 | after we make our substitution. The calls are made with IN_GROUP nonzero |
7722328e RK |
2811 | so apply_change_group must be called upon the outermost return from this |
2812 | function (unless INSN is zero). The result of apply_change_group can | |
2813 | generally be discarded since the changes we are making are optional. */ | |
7afe21cc RK |
2814 | |
2815 | static rtx | |
7080f735 | 2816 | canon_reg (rtx x, rtx insn) |
7afe21cc | 2817 | { |
b3694847 SS |
2818 | int i; |
2819 | enum rtx_code code; | |
2820 | const char *fmt; | |
7afe21cc RK |
2821 | |
2822 | if (x == 0) | |
2823 | return x; | |
2824 | ||
2825 | code = GET_CODE (x); | |
2826 | switch (code) | |
2827 | { | |
2828 | case PC: | |
2829 | case CC0: | |
2830 | case CONST: | |
d8116890 | 2831 | CASE_CONST_ANY: |
7afe21cc RK |
2832 | case SYMBOL_REF: |
2833 | case LABEL_REF: | |
2834 | case ADDR_VEC: | |
2835 | case ADDR_DIFF_VEC: | |
2836 | return x; | |
2837 | ||
2838 | case REG: | |
2839 | { | |
b3694847 SS |
2840 | int first; |
2841 | int q; | |
2842 | struct qty_table_elem *ent; | |
7afe21cc RK |
2843 | |
2844 | /* Never replace a hard reg, because hard regs can appear | |
2845 | in more than one machine mode, and we must preserve the mode | |
2846 | of each occurrence. Also, some hard regs appear in | |
2847 | MEMs that are shared and mustn't be altered. Don't try to | |
2848 | replace any reg that maps to a reg of class NO_REGS. */ | |
2849 | if (REGNO (x) < FIRST_PSEUDO_REGISTER | |
2850 | || ! REGNO_QTY_VALID_P (REGNO (x))) | |
2851 | return x; | |
2852 | ||
278a83b2 | 2853 | q = REG_QTY (REGNO (x)); |
1bb98cec DM |
2854 | ent = &qty_table[q]; |
2855 | first = ent->first_reg; | |
7afe21cc RK |
2856 | return (first >= FIRST_PSEUDO_REGISTER ? regno_reg_rtx[first] |
2857 | : REGNO_REG_CLASS (first) == NO_REGS ? x | |
1bb98cec | 2858 | : gen_rtx_REG (ent->mode, first)); |
7afe21cc | 2859 | } |
278a83b2 | 2860 | |
e9a25f70 JL |
2861 | default: |
2862 | break; | |
7afe21cc RK |
2863 | } |
2864 | ||
2865 | fmt = GET_RTX_FORMAT (code); | |
2866 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
2867 | { | |
b3694847 | 2868 | int j; |
7afe21cc RK |
2869 | |
2870 | if (fmt[i] == 'e') | |
eef3c949 | 2871 | validate_canon_reg (&XEXP (x, i), insn); |
7afe21cc RK |
2872 | else if (fmt[i] == 'E') |
2873 | for (j = 0; j < XVECLEN (x, i); j++) | |
eef3c949 | 2874 | validate_canon_reg (&XVECEXP (x, i, j), insn); |
7afe21cc RK |
2875 | } |
2876 | ||
2877 | return x; | |
2878 | } | |
2879 | \f | |
bca05d20 RK |
2880 | /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison |
2881 | operation (EQ, NE, GT, etc.), follow it back through the hash table and | |
2882 | what values are being compared. | |
1a87eea2 | 2883 | |
bca05d20 RK |
2884 | *PARG1 and *PARG2 are updated to contain the rtx representing the values |
2885 | actually being compared. For example, if *PARG1 was (cc0) and *PARG2 | |
2886 | was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were | |
2887 | compared to produce cc0. | |
a432f20d | 2888 | |
bca05d20 RK |
2889 | The return value is the comparison operator and is either the code of |
2890 | A or the code corresponding to the inverse of the comparison. */ | |
7afe21cc | 2891 | |
0cedb36c | 2892 | static enum rtx_code |
7080f735 AJ |
2893 | find_comparison_args (enum rtx_code code, rtx *parg1, rtx *parg2, |
2894 | enum machine_mode *pmode1, enum machine_mode *pmode2) | |
7afe21cc | 2895 | { |
0cedb36c | 2896 | rtx arg1, arg2; |
27ec0502 AJ |
2897 | struct pointer_set_t *visited = NULL; |
2898 | /* Set nonzero when we find something of interest. */ | |
2899 | rtx x = NULL; | |
1a87eea2 | 2900 | |
0cedb36c | 2901 | arg1 = *parg1, arg2 = *parg2; |
7afe21cc | 2902 | |
0cedb36c | 2903 | /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */ |
7afe21cc | 2904 | |
0cedb36c | 2905 | while (arg2 == CONST0_RTX (GET_MODE (arg1))) |
a432f20d | 2906 | { |
0cedb36c JL |
2907 | int reverse_code = 0; |
2908 | struct table_elt *p = 0; | |
6076248a | 2909 | |
27ec0502 AJ |
2910 | /* Remember state from previous iteration. */ |
2911 | if (x) | |
2912 | { | |
2913 | if (!visited) | |
2914 | visited = pointer_set_create (); | |
2915 | pointer_set_insert (visited, x); | |
2916 | x = 0; | |
2917 | } | |
2918 | ||
0cedb36c JL |
2919 | /* If arg1 is a COMPARE, extract the comparison arguments from it. |
2920 | On machines with CC0, this is the only case that can occur, since | |
2921 | fold_rtx will return the COMPARE or item being compared with zero | |
2922 | when given CC0. */ | |
6076248a | 2923 | |
0cedb36c JL |
2924 | if (GET_CODE (arg1) == COMPARE && arg2 == const0_rtx) |
2925 | x = arg1; | |
6076248a | 2926 | |
0cedb36c JL |
2927 | /* If ARG1 is a comparison operator and CODE is testing for |
2928 | STORE_FLAG_VALUE, get the inner arguments. */ | |
a432f20d | 2929 | |
ec8e098d | 2930 | else if (COMPARISON_P (arg1)) |
7afe21cc | 2931 | { |
efdc7e19 RH |
2932 | #ifdef FLOAT_STORE_FLAG_VALUE |
2933 | REAL_VALUE_TYPE fsfv; | |
2934 | #endif | |
2935 | ||
0cedb36c JL |
2936 | if (code == NE |
2937 | || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT | |
2938 | && code == LT && STORE_FLAG_VALUE == -1) | |
2939 | #ifdef FLOAT_STORE_FLAG_VALUE | |
9b92bf04 | 2940 | || (SCALAR_FLOAT_MODE_P (GET_MODE (arg1)) |
efdc7e19 RH |
2941 | && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)), |
2942 | REAL_VALUE_NEGATIVE (fsfv))) | |
7afe21cc | 2943 | #endif |
a432f20d | 2944 | ) |
0cedb36c JL |
2945 | x = arg1; |
2946 | else if (code == EQ | |
2947 | || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT | |
2948 | && code == GE && STORE_FLAG_VALUE == -1) | |
2949 | #ifdef FLOAT_STORE_FLAG_VALUE | |
9b92bf04 | 2950 | || (SCALAR_FLOAT_MODE_P (GET_MODE (arg1)) |
efdc7e19 RH |
2951 | && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)), |
2952 | REAL_VALUE_NEGATIVE (fsfv))) | |
0cedb36c JL |
2953 | #endif |
2954 | ) | |
2955 | x = arg1, reverse_code = 1; | |
7afe21cc RK |
2956 | } |
2957 | ||
0cedb36c | 2958 | /* ??? We could also check for |
7afe21cc | 2959 | |
0cedb36c | 2960 | (ne (and (eq (...) (const_int 1))) (const_int 0)) |
7afe21cc | 2961 | |
0cedb36c | 2962 | and related forms, but let's wait until we see them occurring. */ |
7afe21cc | 2963 | |
0cedb36c JL |
2964 | if (x == 0) |
2965 | /* Look up ARG1 in the hash table and see if it has an equivalence | |
2966 | that lets us see what is being compared. */ | |
0516f6fe | 2967 | p = lookup (arg1, SAFE_HASH (arg1, GET_MODE (arg1)), GET_MODE (arg1)); |
278a83b2 | 2968 | if (p) |
8b03b984 R |
2969 | { |
2970 | p = p->first_same_value; | |
2971 | ||
2972 | /* If what we compare is already known to be constant, that is as | |
2973 | good as it gets. | |
2974 | We need to break the loop in this case, because otherwise we | |
2975 | can have an infinite loop when looking at a reg that is known | |
2976 | to be a constant which is the same as a comparison of a reg | |
2977 | against zero which appears later in the insn stream, which in | |
2978 | turn is constant and the same as the comparison of the first reg | |
2979 | against zero... */ | |
2980 | if (p->is_const) | |
2981 | break; | |
2982 | } | |
7afe21cc | 2983 | |
0cedb36c | 2984 | for (; p; p = p->next_same_value) |
7afe21cc | 2985 | { |
0cedb36c | 2986 | enum machine_mode inner_mode = GET_MODE (p->exp); |
efdc7e19 RH |
2987 | #ifdef FLOAT_STORE_FLAG_VALUE |
2988 | REAL_VALUE_TYPE fsfv; | |
2989 | #endif | |
7afe21cc | 2990 | |
0cedb36c | 2991 | /* If the entry isn't valid, skip it. */ |
0516f6fe | 2992 | if (! exp_equiv_p (p->exp, p->exp, 1, false)) |
0cedb36c | 2993 | continue; |
f76b9db2 | 2994 | |
27ec0502 AJ |
2995 | /* If it's a comparison we've used before, skip it. */ |
2996 | if (visited && pointer_set_contains (visited, p->exp)) | |
8f1ad6b6 SL |
2997 | continue; |
2998 | ||
bca05d20 RK |
2999 | if (GET_CODE (p->exp) == COMPARE |
3000 | /* Another possibility is that this machine has a compare insn | |
3001 | that includes the comparison code. In that case, ARG1 would | |
3002 | be equivalent to a comparison operation that would set ARG1 to | |
3003 | either STORE_FLAG_VALUE or zero. If this is an NE operation, | |
3004 | ORIG_CODE is the actual comparison being done; if it is an EQ, | |
3005 | we must reverse ORIG_CODE. On machine with a negative value | |
3006 | for STORE_FLAG_VALUE, also look at LT and GE operations. */ | |
3007 | || ((code == NE | |
3008 | || (code == LT | |
2d0c270f BS |
3009 | && val_signbit_known_set_p (inner_mode, |
3010 | STORE_FLAG_VALUE)) | |
0cedb36c | 3011 | #ifdef FLOAT_STORE_FLAG_VALUE |
bca05d20 | 3012 | || (code == LT |
3d8bf70f | 3013 | && SCALAR_FLOAT_MODE_P (inner_mode) |
efdc7e19 RH |
3014 | && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)), |
3015 | REAL_VALUE_NEGATIVE (fsfv))) | |
0cedb36c | 3016 | #endif |
bca05d20 | 3017 | ) |
ec8e098d | 3018 | && COMPARISON_P (p->exp))) |
7afe21cc | 3019 | { |
0cedb36c JL |
3020 | x = p->exp; |
3021 | break; | |
3022 | } | |
3023 | else if ((code == EQ | |
3024 | || (code == GE | |
2d0c270f BS |
3025 | && val_signbit_known_set_p (inner_mode, |
3026 | STORE_FLAG_VALUE)) | |
0cedb36c JL |
3027 | #ifdef FLOAT_STORE_FLAG_VALUE |
3028 | || (code == GE | |
3d8bf70f | 3029 | && SCALAR_FLOAT_MODE_P (inner_mode) |
efdc7e19 RH |
3030 | && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)), |
3031 | REAL_VALUE_NEGATIVE (fsfv))) | |
0cedb36c JL |
3032 | #endif |
3033 | ) | |
ec8e098d | 3034 | && COMPARISON_P (p->exp)) |
0cedb36c JL |
3035 | { |
3036 | reverse_code = 1; | |
3037 | x = p->exp; | |
3038 | break; | |
7afe21cc RK |
3039 | } |
3040 | ||
4977bab6 ZW |
3041 | /* If this non-trapping address, e.g. fp + constant, the |
3042 | equivalent is a better operand since it may let us predict | |
3043 | the value of the comparison. */ | |
3044 | else if (!rtx_addr_can_trap_p (p->exp)) | |
0cedb36c JL |
3045 | { |
3046 | arg1 = p->exp; | |
3047 | continue; | |
3048 | } | |
7afe21cc | 3049 | } |
7afe21cc | 3050 | |
0cedb36c JL |
3051 | /* If we didn't find a useful equivalence for ARG1, we are done. |
3052 | Otherwise, set up for the next iteration. */ | |
3053 | if (x == 0) | |
3054 | break; | |
7afe21cc | 3055 | |
78192b09 RH |
3056 | /* If we need to reverse the comparison, make sure that that is |
3057 | possible -- we can't necessarily infer the value of GE from LT | |
3058 | with floating-point operands. */ | |
0cedb36c | 3059 | if (reverse_code) |
261efdef JH |
3060 | { |
3061 | enum rtx_code reversed = reversed_comparison_code (x, NULL_RTX); | |
3062 | if (reversed == UNKNOWN) | |
3063 | break; | |
68252e27 KH |
3064 | else |
3065 | code = reversed; | |
261efdef | 3066 | } |
ec8e098d | 3067 | else if (COMPARISON_P (x)) |
261efdef JH |
3068 | code = GET_CODE (x); |
3069 | arg1 = XEXP (x, 0), arg2 = XEXP (x, 1); | |
7afe21cc RK |
3070 | } |
3071 | ||
0cedb36c JL |
3072 | /* Return our results. Return the modes from before fold_rtx |
3073 | because fold_rtx might produce const_int, and then it's too late. */ | |
3074 | *pmode1 = GET_MODE (arg1), *pmode2 = GET_MODE (arg2); | |
3075 | *parg1 = fold_rtx (arg1, 0), *parg2 = fold_rtx (arg2, 0); | |
3076 | ||
27ec0502 AJ |
3077 | if (visited) |
3078 | pointer_set_destroy (visited); | |
0cedb36c | 3079 | return code; |
7afe21cc RK |
3080 | } |
3081 | \f | |
a52b023a PB |
3082 | /* If X is a nontrivial arithmetic operation on an argument for which |
3083 | a constant value can be determined, return the result of operating | |
3084 | on that value, as a constant. Otherwise, return X, possibly with | |
3085 | one or more operands changed to a forward-propagated constant. | |
25910ca4 | 3086 | |
a52b023a PB |
3087 | If X is a register whose contents are known, we do NOT return |
3088 | those contents here; equiv_constant is called to perform that task. | |
3089 | For SUBREGs and MEMs, we do that both here and in equiv_constant. | |
7afe21cc RK |
3090 | |
3091 | INSN is the insn that we may be modifying. If it is 0, make a copy | |
3092 | of X before modifying it. */ | |
3093 | ||
3094 | static rtx | |
7080f735 | 3095 | fold_rtx (rtx x, rtx insn) |
7afe21cc | 3096 | { |
b3694847 SS |
3097 | enum rtx_code code; |
3098 | enum machine_mode mode; | |
3099 | const char *fmt; | |
3100 | int i; | |
32e9fa48 | 3101 | rtx new_rtx = 0; |
a52b023a | 3102 | int changed = 0; |
7afe21cc | 3103 | |
a52b023a | 3104 | /* Operands of X. */ |
7afe21cc RK |
3105 | rtx folded_arg0; |
3106 | rtx folded_arg1; | |
3107 | ||
3108 | /* Constant equivalents of first three operands of X; | |
3109 | 0 when no such equivalent is known. */ | |
3110 | rtx const_arg0; | |
3111 | rtx const_arg1; | |
3112 | rtx const_arg2; | |
3113 | ||
3114 | /* The mode of the first operand of X. We need this for sign and zero | |
3115 | extends. */ | |
3116 | enum machine_mode mode_arg0; | |
3117 | ||
3118 | if (x == 0) | |
3119 | return x; | |
3120 | ||
a52b023a | 3121 | /* Try to perform some initial simplifications on X. */ |
7afe21cc RK |
3122 | code = GET_CODE (x); |
3123 | switch (code) | |
3124 | { | |
a52b023a PB |
3125 | case MEM: |
3126 | case SUBREG: | |
32e9fa48 KG |
3127 | if ((new_rtx = equiv_constant (x)) != NULL_RTX) |
3128 | return new_rtx; | |
a52b023a PB |
3129 | return x; |
3130 | ||
7afe21cc | 3131 | case CONST: |
d8116890 | 3132 | CASE_CONST_ANY: |
7afe21cc RK |
3133 | case SYMBOL_REF: |
3134 | case LABEL_REF: | |
3135 | case REG: | |
01aa1d43 | 3136 | case PC: |
7afe21cc RK |
3137 | /* No use simplifying an EXPR_LIST |
3138 | since they are used only for lists of args | |
3139 | in a function call's REG_EQUAL note. */ | |
3140 | case EXPR_LIST: | |
3141 | return x; | |
3142 | ||
3143 | #ifdef HAVE_cc0 | |
3144 | case CC0: | |
3145 | return prev_insn_cc0; | |
3146 | #endif | |
3147 | ||
9255709c | 3148 | case ASM_OPERANDS: |
6c667859 AB |
3149 | if (insn) |
3150 | { | |
3151 | for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--) | |
3152 | validate_change (insn, &ASM_OPERANDS_INPUT (x, i), | |
3153 | fold_rtx (ASM_OPERANDS_INPUT (x, i), insn), 0); | |
3154 | } | |
a52b023a PB |
3155 | return x; |
3156 | ||
3157 | #ifdef NO_FUNCTION_CSE | |
3158 | case CALL: | |
3159 | if (CONSTANT_P (XEXP (XEXP (x, 0), 0))) | |
3160 | return x; | |
9255709c | 3161 | break; |
a52b023a | 3162 | #endif |
278a83b2 | 3163 | |
a52b023a | 3164 | /* Anything else goes through the loop below. */ |
e9a25f70 JL |
3165 | default: |
3166 | break; | |
7afe21cc RK |
3167 | } |
3168 | ||
a52b023a | 3169 | mode = GET_MODE (x); |
7afe21cc RK |
3170 | const_arg0 = 0; |
3171 | const_arg1 = 0; | |
3172 | const_arg2 = 0; | |
3173 | mode_arg0 = VOIDmode; | |
3174 | ||
3175 | /* Try folding our operands. | |
3176 | Then see which ones have constant values known. */ | |
3177 | ||
3178 | fmt = GET_RTX_FORMAT (code); | |
3179 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
3180 | if (fmt[i] == 'e') | |
3181 | { | |
a52b023a PB |
3182 | rtx folded_arg = XEXP (x, i), const_arg; |
3183 | enum machine_mode mode_arg = GET_MODE (folded_arg); | |
7e7e28c7 AO |
3184 | |
3185 | switch (GET_CODE (folded_arg)) | |
3186 | { | |
3187 | case MEM: | |
3188 | case REG: | |
3189 | case SUBREG: | |
3190 | const_arg = equiv_constant (folded_arg); | |
3191 | break; | |
3192 | ||
3193 | case CONST: | |
d8116890 | 3194 | CASE_CONST_ANY: |
7e7e28c7 AO |
3195 | case SYMBOL_REF: |
3196 | case LABEL_REF: | |
7e7e28c7 AO |
3197 | const_arg = folded_arg; |
3198 | break; | |
3199 | ||
7afe21cc | 3200 | #ifdef HAVE_cc0 |
7e7e28c7 AO |
3201 | case CC0: |
3202 | folded_arg = prev_insn_cc0; | |
3203 | mode_arg = prev_insn_cc0_mode; | |
3204 | const_arg = equiv_constant (folded_arg); | |
3205 | break; | |
7afe21cc | 3206 | #endif |
7e7e28c7 AO |
3207 | |
3208 | default: | |
3209 | folded_arg = fold_rtx (folded_arg, insn); | |
3210 | const_arg = equiv_constant (folded_arg); | |
3211 | break; | |
3212 | } | |
7afe21cc RK |
3213 | |
3214 | /* For the first three operands, see if the operand | |
3215 | is constant or equivalent to a constant. */ | |
3216 | switch (i) | |
3217 | { | |
3218 | case 0: | |
3219 | folded_arg0 = folded_arg; | |
3220 | const_arg0 = const_arg; | |
3221 | mode_arg0 = mode_arg; | |
3222 | break; | |
3223 | case 1: | |
3224 | folded_arg1 = folded_arg; | |
3225 | const_arg1 = const_arg; | |
3226 | break; | |
3227 | case 2: | |
3228 | const_arg2 = const_arg; | |
3229 | break; | |
3230 | } | |
3231 | ||
a52b023a PB |
3232 | /* Pick the least expensive of the argument and an equivalent constant |
3233 | argument. */ | |
3234 | if (const_arg != 0 | |
3235 | && const_arg != folded_arg | |
68f932c4 | 3236 | && COST_IN (const_arg, code, i) <= COST_IN (folded_arg, code, i) |
f2fa288f | 3237 | |
8cce3d04 RS |
3238 | /* It's not safe to substitute the operand of a conversion |
3239 | operator with a constant, as the conversion's identity | |
f652d14b | 3240 | depends upon the mode of its operand. This optimization |
8cce3d04 | 3241 | is handled by the call to simplify_unary_operation. */ |
a52b023a PB |
3242 | && (GET_RTX_CLASS (code) != RTX_UNARY |
3243 | || GET_MODE (const_arg) == mode_arg0 | |
3244 | || (code != ZERO_EXTEND | |
3245 | && code != SIGN_EXTEND | |
3246 | && code != TRUNCATE | |
3247 | && code != FLOAT_TRUNCATE | |
3248 | && code != FLOAT_EXTEND | |
3249 | && code != FLOAT | |
3250 | && code != FIX | |
3251 | && code != UNSIGNED_FLOAT | |
3252 | && code != UNSIGNED_FIX))) | |
3253 | folded_arg = const_arg; | |
3254 | ||
3255 | if (folded_arg == XEXP (x, i)) | |
3256 | continue; | |
7afe21cc | 3257 | |
a52b023a PB |
3258 | if (insn == NULL_RTX && !changed) |
3259 | x = copy_rtx (x); | |
3260 | changed = 1; | |
b8b89e7c | 3261 | validate_unshare_change (insn, &XEXP (x, i), folded_arg, 1); |
2d8b0f3a | 3262 | } |
7afe21cc | 3263 | |
a52b023a | 3264 | if (changed) |
7afe21cc | 3265 | { |
a52b023a PB |
3266 | /* Canonicalize X if necessary, and keep const_argN and folded_argN |
3267 | consistent with the order in X. */ | |
3268 | if (canonicalize_change_group (insn, x)) | |
7afe21cc | 3269 | { |
a52b023a PB |
3270 | rtx tem; |
3271 | tem = const_arg0, const_arg0 = const_arg1, const_arg1 = tem; | |
3272 | tem = folded_arg0, folded_arg0 = folded_arg1, folded_arg1 = tem; | |
7afe21cc | 3273 | } |
a52b023a PB |
3274 | |
3275 | apply_change_group (); | |
7afe21cc RK |
3276 | } |
3277 | ||
3278 | /* If X is an arithmetic operation, see if we can simplify it. */ | |
3279 | ||
3280 | switch (GET_RTX_CLASS (code)) | |
3281 | { | |
ec8e098d | 3282 | case RTX_UNARY: |
67a37737 | 3283 | { |
67a37737 RK |
3284 | /* We can't simplify extension ops unless we know the |
3285 | original mode. */ | |
3286 | if ((code == ZERO_EXTEND || code == SIGN_EXTEND) | |
3287 | && mode_arg0 == VOIDmode) | |
3288 | break; | |
3289 | ||
32e9fa48 | 3290 | new_rtx = simplify_unary_operation (code, mode, |
696d76a5 MS |
3291 | const_arg0 ? const_arg0 : folded_arg0, |
3292 | mode_arg0); | |
67a37737 | 3293 | } |
7afe21cc | 3294 | break; |
278a83b2 | 3295 | |
ec8e098d PB |
3296 | case RTX_COMPARE: |
3297 | case RTX_COMM_COMPARE: | |
7afe21cc RK |
3298 | /* See what items are actually being compared and set FOLDED_ARG[01] |
3299 | to those values and CODE to the actual comparison code. If any are | |
3300 | constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't | |
3301 | do anything if both operands are already known to be constant. */ | |
3302 | ||
21e5076a UB |
3303 | /* ??? Vector mode comparisons are not supported yet. */ |
3304 | if (VECTOR_MODE_P (mode)) | |
3305 | break; | |
3306 | ||
7afe21cc RK |
3307 | if (const_arg0 == 0 || const_arg1 == 0) |
3308 | { | |
3309 | struct table_elt *p0, *p1; | |
9e6a14a4 | 3310 | rtx true_rtx, false_rtx; |
13c9910f | 3311 | enum machine_mode mode_arg1; |
c610adec | 3312 | |
9b92bf04 | 3313 | if (SCALAR_FLOAT_MODE_P (mode)) |
c610adec | 3314 | { |
9e6a14a4 | 3315 | #ifdef FLOAT_STORE_FLAG_VALUE |
d6edb99e | 3316 | true_rtx = (CONST_DOUBLE_FROM_REAL_VALUE |
68252e27 | 3317 | (FLOAT_STORE_FLAG_VALUE (mode), mode)); |
9e6a14a4 L |
3318 | #else |
3319 | true_rtx = NULL_RTX; | |
3320 | #endif | |
d6edb99e | 3321 | false_rtx = CONST0_RTX (mode); |
c610adec | 3322 | } |
9e6a14a4 L |
3323 | else |
3324 | { | |
3325 | true_rtx = const_true_rtx; | |
3326 | false_rtx = const0_rtx; | |
3327 | } | |
7afe21cc | 3328 | |
13c9910f RS |
3329 | code = find_comparison_args (code, &folded_arg0, &folded_arg1, |
3330 | &mode_arg0, &mode_arg1); | |
7afe21cc | 3331 | |
13c9910f RS |
3332 | /* If the mode is VOIDmode or a MODE_CC mode, we don't know |
3333 | what kinds of things are being compared, so we can't do | |
3334 | anything with this comparison. */ | |
7afe21cc RK |
3335 | |
3336 | if (mode_arg0 == VOIDmode || GET_MODE_CLASS (mode_arg0) == MODE_CC) | |
3337 | break; | |
3338 | ||
75335440 KH |
3339 | const_arg0 = equiv_constant (folded_arg0); |
3340 | const_arg1 = equiv_constant (folded_arg1); | |
3341 | ||
0f41302f MS |
3342 | /* If we do not now have two constants being compared, see |
3343 | if we can nevertheless deduce some things about the | |
3344 | comparison. */ | |
7afe21cc RK |
3345 | if (const_arg0 == 0 || const_arg1 == 0) |
3346 | { | |
08678f51 HPN |
3347 | if (const_arg1 != NULL) |
3348 | { | |
3349 | rtx cheapest_simplification; | |
3350 | int cheapest_cost; | |
3351 | rtx simp_result; | |
3352 | struct table_elt *p; | |
3353 | ||
3354 | /* See if we can find an equivalent of folded_arg0 | |
3355 | that gets us a cheaper expression, possibly a | |
3356 | constant through simplifications. */ | |
3357 | p = lookup (folded_arg0, SAFE_HASH (folded_arg0, mode_arg0), | |
3358 | mode_arg0); | |
b8698a0f | 3359 | |
08678f51 HPN |
3360 | if (p != NULL) |
3361 | { | |
3362 | cheapest_simplification = x; | |
3363 | cheapest_cost = COST (x); | |
3364 | ||
3365 | for (p = p->first_same_value; p != NULL; p = p->next_same_value) | |
3366 | { | |
3367 | int cost; | |
3368 | ||
3369 | /* If the entry isn't valid, skip it. */ | |
3370 | if (! exp_equiv_p (p->exp, p->exp, 1, false)) | |
3371 | continue; | |
3372 | ||
3373 | /* Try to simplify using this equivalence. */ | |
3374 | simp_result | |
3375 | = simplify_relational_operation (code, mode, | |
3376 | mode_arg0, | |
3377 | p->exp, | |
3378 | const_arg1); | |
3379 | ||
3380 | if (simp_result == NULL) | |
3381 | continue; | |
3382 | ||
3383 | cost = COST (simp_result); | |
3384 | if (cost < cheapest_cost) | |
3385 | { | |
3386 | cheapest_cost = cost; | |
3387 | cheapest_simplification = simp_result; | |
3388 | } | |
3389 | } | |
3390 | ||
3391 | /* If we have a cheaper expression now, use that | |
3392 | and try folding it further, from the top. */ | |
3393 | if (cheapest_simplification != x) | |
7903b3e5 JH |
3394 | return fold_rtx (copy_rtx (cheapest_simplification), |
3395 | insn); | |
08678f51 HPN |
3396 | } |
3397 | } | |
3398 | ||
fd13313f JH |
3399 | /* See if the two operands are the same. */ |
3400 | ||
39641489 PB |
3401 | if ((REG_P (folded_arg0) |
3402 | && REG_P (folded_arg1) | |
3403 | && (REG_QTY (REGNO (folded_arg0)) | |
3404 | == REG_QTY (REGNO (folded_arg1)))) | |
fd13313f | 3405 | || ((p0 = lookup (folded_arg0, |
0516f6fe SB |
3406 | SAFE_HASH (folded_arg0, mode_arg0), |
3407 | mode_arg0)) | |
fd13313f | 3408 | && (p1 = lookup (folded_arg1, |
0516f6fe SB |
3409 | SAFE_HASH (folded_arg1, mode_arg0), |
3410 | mode_arg0)) | |
fd13313f | 3411 | && p0->first_same_value == p1->first_same_value)) |
39641489 | 3412 | folded_arg1 = folded_arg0; |
7afe21cc RK |
3413 | |
3414 | /* If FOLDED_ARG0 is a register, see if the comparison we are | |
3415 | doing now is either the same as we did before or the reverse | |
3416 | (we only check the reverse if not floating-point). */ | |
f8cfc6aa | 3417 | else if (REG_P (folded_arg0)) |
7afe21cc | 3418 | { |
30f72379 | 3419 | int qty = REG_QTY (REGNO (folded_arg0)); |
7afe21cc | 3420 | |
1bb98cec DM |
3421 | if (REGNO_QTY_VALID_P (REGNO (folded_arg0))) |
3422 | { | |
3423 | struct qty_table_elem *ent = &qty_table[qty]; | |
3424 | ||
3425 | if ((comparison_dominates_p (ent->comparison_code, code) | |
1eb8759b RH |
3426 | || (! FLOAT_MODE_P (mode_arg0) |
3427 | && comparison_dominates_p (ent->comparison_code, | |
3428 | reverse_condition (code)))) | |
1bb98cec DM |
3429 | && (rtx_equal_p (ent->comparison_const, folded_arg1) |
3430 | || (const_arg1 | |
3431 | && rtx_equal_p (ent->comparison_const, | |
3432 | const_arg1)) | |
f8cfc6aa | 3433 | || (REG_P (folded_arg1) |
1bb98cec | 3434 | && (REG_QTY (REGNO (folded_arg1)) == ent->comparison_qty)))) |
9e6a14a4 L |
3435 | { |
3436 | if (comparison_dominates_p (ent->comparison_code, code)) | |
3437 | { | |
3438 | if (true_rtx) | |
3439 | return true_rtx; | |
3440 | else | |
3441 | break; | |
3442 | } | |
3443 | else | |
3444 | return false_rtx; | |
3445 | } | |
1bb98cec | 3446 | } |
7afe21cc RK |
3447 | } |
3448 | } | |
3449 | } | |
3450 | ||
3451 | /* If we are comparing against zero, see if the first operand is | |
3452 | equivalent to an IOR with a constant. If so, we may be able to | |
3453 | determine the result of this comparison. */ | |
39641489 | 3454 | if (const_arg1 == const0_rtx && !const_arg0) |
7afe21cc RK |
3455 | { |
3456 | rtx y = lookup_as_function (folded_arg0, IOR); | |
3457 | rtx inner_const; | |
3458 | ||
3459 | if (y != 0 | |
3460 | && (inner_const = equiv_constant (XEXP (y, 1))) != 0 | |
481683e1 | 3461 | && CONST_INT_P (inner_const) |
7afe21cc | 3462 | && INTVAL (inner_const) != 0) |
39641489 | 3463 | folded_arg0 = gen_rtx_IOR (mode_arg0, XEXP (y, 0), inner_const); |
7afe21cc RK |
3464 | } |
3465 | ||
c6fb08ad | 3466 | { |
bca3cc97 JJ |
3467 | rtx op0 = const_arg0 ? const_arg0 : copy_rtx (folded_arg0); |
3468 | rtx op1 = const_arg1 ? const_arg1 : copy_rtx (folded_arg1); | |
3469 | new_rtx = simplify_relational_operation (code, mode, mode_arg0, | |
3470 | op0, op1); | |
c6fb08ad | 3471 | } |
7afe21cc RK |
3472 | break; |
3473 | ||
ec8e098d PB |
3474 | case RTX_BIN_ARITH: |
3475 | case RTX_COMM_ARITH: | |
7afe21cc RK |
3476 | switch (code) |
3477 | { | |
3478 | case PLUS: | |
3479 | /* If the second operand is a LABEL_REF, see if the first is a MINUS | |
3480 | with that LABEL_REF as its second operand. If so, the result is | |
3481 | the first operand of that MINUS. This handles switches with an | |
3482 | ADDR_DIFF_VEC table. */ | |
3483 | if (const_arg1 && GET_CODE (const_arg1) == LABEL_REF) | |
3484 | { | |
e650cbda RK |
3485 | rtx y |
3486 | = GET_CODE (folded_arg0) == MINUS ? folded_arg0 | |
ddc356e8 | 3487 | : lookup_as_function (folded_arg0, MINUS); |
7afe21cc RK |
3488 | |
3489 | if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF | |
3490 | && XEXP (XEXP (y, 1), 0) == XEXP (const_arg1, 0)) | |
3491 | return XEXP (y, 0); | |
67a37737 RK |
3492 | |
3493 | /* Now try for a CONST of a MINUS like the above. */ | |
e650cbda RK |
3494 | if ((y = (GET_CODE (folded_arg0) == CONST ? folded_arg0 |
3495 | : lookup_as_function (folded_arg0, CONST))) != 0 | |
67a37737 RK |
3496 | && GET_CODE (XEXP (y, 0)) == MINUS |
3497 | && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF | |
ddc356e8 | 3498 | && XEXP (XEXP (XEXP (y, 0), 1), 0) == XEXP (const_arg1, 0)) |
67a37737 | 3499 | return XEXP (XEXP (y, 0), 0); |
7afe21cc | 3500 | } |
c2cc0778 | 3501 | |
e650cbda RK |
3502 | /* Likewise if the operands are in the other order. */ |
3503 | if (const_arg0 && GET_CODE (const_arg0) == LABEL_REF) | |
3504 | { | |
3505 | rtx y | |
3506 | = GET_CODE (folded_arg1) == MINUS ? folded_arg1 | |
ddc356e8 | 3507 | : lookup_as_function (folded_arg1, MINUS); |
e650cbda RK |
3508 | |
3509 | if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF | |
3510 | && XEXP (XEXP (y, 1), 0) == XEXP (const_arg0, 0)) | |
3511 | return XEXP (y, 0); | |
3512 | ||
3513 | /* Now try for a CONST of a MINUS like the above. */ | |
3514 | if ((y = (GET_CODE (folded_arg1) == CONST ? folded_arg1 | |
3515 | : lookup_as_function (folded_arg1, CONST))) != 0 | |
3516 | && GET_CODE (XEXP (y, 0)) == MINUS | |
3517 | && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF | |
ddc356e8 | 3518 | && XEXP (XEXP (XEXP (y, 0), 1), 0) == XEXP (const_arg0, 0)) |
e650cbda RK |
3519 | return XEXP (XEXP (y, 0), 0); |
3520 | } | |
3521 | ||
c2cc0778 RK |
3522 | /* If second operand is a register equivalent to a negative |
3523 | CONST_INT, see if we can find a register equivalent to the | |
3524 | positive constant. Make a MINUS if so. Don't do this for | |
5d595063 | 3525 | a non-negative constant since we might then alternate between |
a1f300c0 | 3526 | choosing positive and negative constants. Having the positive |
5d595063 RK |
3527 | constant previously-used is the more common case. Be sure |
3528 | the resulting constant is non-negative; if const_arg1 were | |
3529 | the smallest negative number this would overflow: depending | |
3530 | on the mode, this would either just be the same value (and | |
3531 | hence not save anything) or be incorrect. */ | |
481683e1 | 3532 | if (const_arg1 != 0 && CONST_INT_P (const_arg1) |
5d595063 | 3533 | && INTVAL (const_arg1) < 0 |
4741f6ad JL |
3534 | /* This used to test |
3535 | ||
ddc356e8 | 3536 | -INTVAL (const_arg1) >= 0 |
4741f6ad JL |
3537 | |
3538 | But The Sun V5.0 compilers mis-compiled that test. So | |
3539 | instead we test for the problematic value in a more direct | |
3540 | manner and hope the Sun compilers get it correct. */ | |
5c45a8ac KG |
3541 | && INTVAL (const_arg1) != |
3542 | ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT - 1)) | |
f8cfc6aa | 3543 | && REG_P (folded_arg1)) |
c2cc0778 | 3544 | { |
ddc356e8 | 3545 | rtx new_const = GEN_INT (-INTVAL (const_arg1)); |
c2cc0778 | 3546 | struct table_elt *p |
0516f6fe | 3547 | = lookup (new_const, SAFE_HASH (new_const, mode), mode); |
c2cc0778 RK |
3548 | |
3549 | if (p) | |
3550 | for (p = p->first_same_value; p; p = p->next_same_value) | |
f8cfc6aa | 3551 | if (REG_P (p->exp)) |
0cedb36c JL |
3552 | return simplify_gen_binary (MINUS, mode, folded_arg0, |
3553 | canon_reg (p->exp, NULL_RTX)); | |
c2cc0778 | 3554 | } |
13c9910f RS |
3555 | goto from_plus; |
3556 | ||
3557 | case MINUS: | |
3558 | /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2). | |
3559 | If so, produce (PLUS Z C2-C). */ | |
481683e1 | 3560 | if (const_arg1 != 0 && CONST_INT_P (const_arg1)) |
13c9910f RS |
3561 | { |
3562 | rtx y = lookup_as_function (XEXP (x, 0), PLUS); | |
481683e1 | 3563 | if (y && CONST_INT_P (XEXP (y, 1))) |
0a81f074 | 3564 | return fold_rtx (plus_constant (mode, copy_rtx (y), |
f3becefd | 3565 | -INTVAL (const_arg1)), |
a3b5c94a | 3566 | NULL_RTX); |
13c9910f | 3567 | } |
7afe21cc | 3568 | |
ddc356e8 | 3569 | /* Fall through. */ |
7afe21cc | 3570 | |
13c9910f | 3571 | from_plus: |
7afe21cc RK |
3572 | case SMIN: case SMAX: case UMIN: case UMAX: |
3573 | case IOR: case AND: case XOR: | |
f930bfd0 | 3574 | case MULT: |
7afe21cc RK |
3575 | case ASHIFT: case LSHIFTRT: case ASHIFTRT: |
3576 | /* If we have (<op> <reg> <const_int>) for an associative OP and REG | |
3577 | is known to be of similar form, we may be able to replace the | |
3578 | operation with a combined operation. This may eliminate the | |
3579 | intermediate operation if every use is simplified in this way. | |
3580 | Note that the similar optimization done by combine.c only works | |
3581 | if the intermediate operation's result has only one reference. */ | |
3582 | ||
f8cfc6aa | 3583 | if (REG_P (folded_arg0) |
481683e1 | 3584 | && const_arg1 && CONST_INT_P (const_arg1)) |
7afe21cc RK |
3585 | { |
3586 | int is_shift | |
3587 | = (code == ASHIFT || code == ASHIFTRT || code == LSHIFTRT); | |
5bb51e1d | 3588 | rtx y, inner_const, new_const; |
39b2ac74 | 3589 | rtx canon_const_arg1 = const_arg1; |
7afe21cc | 3590 | enum rtx_code associate_code; |
7afe21cc | 3591 | |
824a4527 | 3592 | if (is_shift |
5511bc5a | 3593 | && (INTVAL (const_arg1) >= GET_MODE_PRECISION (mode) |
824a4527 JDA |
3594 | || INTVAL (const_arg1) < 0)) |
3595 | { | |
3596 | if (SHIFT_COUNT_TRUNCATED) | |
39b2ac74 JJ |
3597 | canon_const_arg1 = GEN_INT (INTVAL (const_arg1) |
3598 | & (GET_MODE_BITSIZE (mode) | |
3599 | - 1)); | |
824a4527 JDA |
3600 | else |
3601 | break; | |
3602 | } | |
3603 | ||
5bb51e1d | 3604 | y = lookup_as_function (folded_arg0, code); |
824a4527 JDA |
3605 | if (y == 0) |
3606 | break; | |
824a4527 JDA |
3607 | |
3608 | /* If we have compiled a statement like | |
3609 | "if (x == (x & mask1))", and now are looking at | |
3610 | "x & mask2", we will have a case where the first operand | |
3611 | of Y is the same as our first operand. Unless we detect | |
3612 | this case, an infinite loop will result. */ | |
3613 | if (XEXP (y, 0) == folded_arg0) | |
7afe21cc RK |
3614 | break; |
3615 | ||
5bb51e1d | 3616 | inner_const = equiv_constant (fold_rtx (XEXP (y, 1), 0)); |
481683e1 | 3617 | if (!inner_const || !CONST_INT_P (inner_const)) |
5bb51e1d EB |
3618 | break; |
3619 | ||
7afe21cc RK |
3620 | /* Don't associate these operations if they are a PLUS with the |
3621 | same constant and it is a power of two. These might be doable | |
3622 | with a pre- or post-increment. Similarly for two subtracts of | |
3623 | identical powers of two with post decrement. */ | |
3624 | ||
213d5fbc | 3625 | if (code == PLUS && const_arg1 == inner_const |
940da324 JL |
3626 | && ((HAVE_PRE_INCREMENT |
3627 | && exact_log2 (INTVAL (const_arg1)) >= 0) | |
3628 | || (HAVE_POST_INCREMENT | |
3629 | && exact_log2 (INTVAL (const_arg1)) >= 0) | |
3630 | || (HAVE_PRE_DECREMENT | |
3631 | && exact_log2 (- INTVAL (const_arg1)) >= 0) | |
3632 | || (HAVE_POST_DECREMENT | |
3633 | && exact_log2 (- INTVAL (const_arg1)) >= 0))) | |
7afe21cc RK |
3634 | break; |
3635 | ||
88057dc8 UB |
3636 | /* ??? Vector mode shifts by scalar |
3637 | shift operand are not supported yet. */ | |
3638 | if (is_shift && VECTOR_MODE_P (mode)) | |
3639 | break; | |
3640 | ||
824a4527 | 3641 | if (is_shift |
5511bc5a | 3642 | && (INTVAL (inner_const) >= GET_MODE_PRECISION (mode) |
824a4527 JDA |
3643 | || INTVAL (inner_const) < 0)) |
3644 | { | |
3645 | if (SHIFT_COUNT_TRUNCATED) | |
3646 | inner_const = GEN_INT (INTVAL (inner_const) | |
3647 | & (GET_MODE_BITSIZE (mode) - 1)); | |
3648 | else | |
3649 | break; | |
3650 | } | |
3651 | ||
7afe21cc | 3652 | /* Compute the code used to compose the constants. For example, |
f930bfd0 | 3653 | A-C1-C2 is A-(C1 + C2), so if CODE == MINUS, we want PLUS. */ |
7afe21cc | 3654 | |
f930bfd0 | 3655 | associate_code = (is_shift || code == MINUS ? PLUS : code); |
7afe21cc RK |
3656 | |
3657 | new_const = simplify_binary_operation (associate_code, mode, | |
39b2ac74 JJ |
3658 | canon_const_arg1, |
3659 | inner_const); | |
7afe21cc RK |
3660 | |
3661 | if (new_const == 0) | |
3662 | break; | |
3663 | ||
3664 | /* If we are associating shift operations, don't let this | |
4908e508 RS |
3665 | produce a shift of the size of the object or larger. |
3666 | This could occur when we follow a sign-extend by a right | |
3667 | shift on a machine that does a sign-extend as a pair | |
3668 | of shifts. */ | |
7afe21cc | 3669 | |
824a4527 | 3670 | if (is_shift |
481683e1 | 3671 | && CONST_INT_P (new_const) |
5511bc5a | 3672 | && INTVAL (new_const) >= GET_MODE_PRECISION (mode)) |
4908e508 RS |
3673 | { |
3674 | /* As an exception, we can turn an ASHIFTRT of this | |
3675 | form into a shift of the number of bits - 1. */ | |
3676 | if (code == ASHIFTRT) | |
3677 | new_const = GEN_INT (GET_MODE_BITSIZE (mode) - 1); | |
824a4527 JDA |
3678 | else if (!side_effects_p (XEXP (y, 0))) |
3679 | return CONST0_RTX (mode); | |
4908e508 RS |
3680 | else |
3681 | break; | |
3682 | } | |
7afe21cc RK |
3683 | |
3684 | y = copy_rtx (XEXP (y, 0)); | |
3685 | ||
3686 | /* If Y contains our first operand (the most common way this | |
3687 | can happen is if Y is a MEM), we would do into an infinite | |
3688 | loop if we tried to fold it. So don't in that case. */ | |
3689 | ||
3690 | if (! reg_mentioned_p (folded_arg0, y)) | |
3691 | y = fold_rtx (y, insn); | |
3692 | ||
0cedb36c | 3693 | return simplify_gen_binary (code, mode, y, new_const); |
7afe21cc | 3694 | } |
e9a25f70 JL |
3695 | break; |
3696 | ||
f930bfd0 JW |
3697 | case DIV: case UDIV: |
3698 | /* ??? The associative optimization performed immediately above is | |
3699 | also possible for DIV and UDIV using associate_code of MULT. | |
3700 | However, we would need extra code to verify that the | |
3701 | multiplication does not overflow, that is, there is no overflow | |
3702 | in the calculation of new_const. */ | |
3703 | break; | |
3704 | ||
e9a25f70 JL |
3705 | default: |
3706 | break; | |
7afe21cc RK |
3707 | } |
3708 | ||
32e9fa48 | 3709 | new_rtx = simplify_binary_operation (code, mode, |
7afe21cc RK |
3710 | const_arg0 ? const_arg0 : folded_arg0, |
3711 | const_arg1 ? const_arg1 : folded_arg1); | |
3712 | break; | |
3713 | ||
ec8e098d | 3714 | case RTX_OBJ: |
7afe21cc RK |
3715 | /* (lo_sum (high X) X) is simply X. */ |
3716 | if (code == LO_SUM && const_arg0 != 0 | |
3717 | && GET_CODE (const_arg0) == HIGH | |
3718 | && rtx_equal_p (XEXP (const_arg0, 0), const_arg1)) | |
3719 | return const_arg1; | |
3720 | break; | |
3721 | ||
ec8e098d PB |
3722 | case RTX_TERNARY: |
3723 | case RTX_BITFIELD_OPS: | |
32e9fa48 | 3724 | new_rtx = simplify_ternary_operation (code, mode, mode_arg0, |
7afe21cc RK |
3725 | const_arg0 ? const_arg0 : folded_arg0, |
3726 | const_arg1 ? const_arg1 : folded_arg1, | |
3727 | const_arg2 ? const_arg2 : XEXP (x, 2)); | |
3728 | break; | |
ee5332b8 | 3729 | |
ec8e098d PB |
3730 | default: |
3731 | break; | |
7afe21cc RK |
3732 | } |
3733 | ||
32e9fa48 | 3734 | return new_rtx ? new_rtx : x; |
7afe21cc RK |
3735 | } |
3736 | \f | |
3737 | /* Return a constant value currently equivalent to X. | |
3738 | Return 0 if we don't know one. */ | |
3739 | ||
3740 | static rtx | |
7080f735 | 3741 | equiv_constant (rtx x) |
7afe21cc | 3742 | { |
f8cfc6aa | 3743 | if (REG_P (x) |
1bb98cec DM |
3744 | && REGNO_QTY_VALID_P (REGNO (x))) |
3745 | { | |
3746 | int x_q = REG_QTY (REGNO (x)); | |
3747 | struct qty_table_elem *x_ent = &qty_table[x_q]; | |
3748 | ||
3749 | if (x_ent->const_rtx) | |
4de249d9 | 3750 | x = gen_lowpart (GET_MODE (x), x_ent->const_rtx); |
1bb98cec | 3751 | } |
7afe21cc | 3752 | |
2ce5e1b4 | 3753 | if (x == 0 || CONSTANT_P (x)) |
7afe21cc RK |
3754 | return x; |
3755 | ||
a52b023a PB |
3756 | if (GET_CODE (x) == SUBREG) |
3757 | { | |
f5f8d79d EB |
3758 | enum machine_mode mode = GET_MODE (x); |
3759 | enum machine_mode imode = GET_MODE (SUBREG_REG (x)); | |
32e9fa48 | 3760 | rtx new_rtx; |
a52b023a PB |
3761 | |
3762 | /* See if we previously assigned a constant value to this SUBREG. */ | |
32e9fa48 KG |
3763 | if ((new_rtx = lookup_as_function (x, CONST_INT)) != 0 |
3764 | || (new_rtx = lookup_as_function (x, CONST_DOUBLE)) != 0 | |
3765 | || (new_rtx = lookup_as_function (x, CONST_FIXED)) != 0) | |
3766 | return new_rtx; | |
a52b023a | 3767 | |
f5f8d79d EB |
3768 | /* If we didn't and if doing so makes sense, see if we previously |
3769 | assigned a constant value to the enclosing word mode SUBREG. */ | |
3770 | if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (word_mode) | |
3771 | && GET_MODE_SIZE (word_mode) < GET_MODE_SIZE (imode)) | |
3772 | { | |
3773 | int byte = SUBREG_BYTE (x) - subreg_lowpart_offset (mode, word_mode); | |
3774 | if (byte >= 0 && (byte % UNITS_PER_WORD) == 0) | |
3775 | { | |
3776 | rtx y = gen_rtx_SUBREG (word_mode, SUBREG_REG (x), byte); | |
3777 | new_rtx = lookup_as_function (y, CONST_INT); | |
3778 | if (new_rtx) | |
3779 | return gen_lowpart (mode, new_rtx); | |
3780 | } | |
3781 | } | |
3782 | ||
7cb6668a MI |
3783 | /* Otherwise see if we already have a constant for the inner REG, |
3784 | and if that is enough to calculate an equivalent constant for | |
3785 | the subreg. Note that the upper bits of paradoxical subregs | |
3786 | are undefined, so they cannot be said to equal anything. */ | |
a52b023a | 3787 | if (REG_P (SUBREG_REG (x)) |
7cb6668a | 3788 | && GET_MODE_SIZE (mode) <= GET_MODE_SIZE (imode) |
32e9fa48 | 3789 | && (new_rtx = equiv_constant (SUBREG_REG (x))) != 0) |
f5f8d79d | 3790 | return simplify_subreg (mode, new_rtx, imode, SUBREG_BYTE (x)); |
a52b023a PB |
3791 | |
3792 | return 0; | |
3793 | } | |
3794 | ||
3795 | /* If X is a MEM, see if it is a constant-pool reference, or look it up in | |
3796 | the hash table in case its value was seen before. */ | |
fc3ffe83 | 3797 | |
3c0cb5de | 3798 | if (MEM_P (x)) |
fc3ffe83 RK |
3799 | { |
3800 | struct table_elt *elt; | |
3801 | ||
a52b023a | 3802 | x = avoid_constant_pool_reference (x); |
fc3ffe83 RK |
3803 | if (CONSTANT_P (x)) |
3804 | return x; | |
3805 | ||
0516f6fe | 3806 | elt = lookup (x, SAFE_HASH (x, GET_MODE (x)), GET_MODE (x)); |
fc3ffe83 RK |
3807 | if (elt == 0) |
3808 | return 0; | |
3809 | ||
3810 | for (elt = elt->first_same_value; elt; elt = elt->next_same_value) | |
3811 | if (elt->is_const && CONSTANT_P (elt->exp)) | |
3812 | return elt->exp; | |
3813 | } | |
3814 | ||
7afe21cc RK |
3815 | return 0; |
3816 | } | |
3817 | \f | |
0129d079 SB |
3818 | /* Given INSN, a jump insn, TAKEN indicates if we are following the |
3819 | "taken" branch. | |
7afe21cc RK |
3820 | |
3821 | In certain cases, this can cause us to add an equivalence. For example, | |
278a83b2 | 3822 | if we are following the taken case of |
7080f735 | 3823 | if (i == 2) |
7afe21cc RK |
3824 | we can add the fact that `i' and '2' are now equivalent. |
3825 | ||
3826 | In any case, we can record that this comparison was passed. If the same | |
3827 | comparison is seen later, we will know its value. */ | |
3828 | ||
3829 | static void | |
0129d079 | 3830 | record_jump_equiv (rtx insn, bool taken) |
7afe21cc RK |
3831 | { |
3832 | int cond_known_true; | |
3833 | rtx op0, op1; | |
7f1c097d | 3834 | rtx set; |
13c9910f | 3835 | enum machine_mode mode, mode0, mode1; |
7afe21cc RK |
3836 | int reversed_nonequality = 0; |
3837 | enum rtx_code code; | |
3838 | ||
3839 | /* Ensure this is the right kind of insn. */ | |
0129d079 SB |
3840 | gcc_assert (any_condjump_p (insn)); |
3841 | ||
7f1c097d | 3842 | set = pc_set (insn); |
7afe21cc RK |
3843 | |
3844 | /* See if this jump condition is known true or false. */ | |
3845 | if (taken) | |
7f1c097d | 3846 | cond_known_true = (XEXP (SET_SRC (set), 2) == pc_rtx); |
7afe21cc | 3847 | else |
7f1c097d | 3848 | cond_known_true = (XEXP (SET_SRC (set), 1) == pc_rtx); |
7afe21cc RK |
3849 | |
3850 | /* Get the type of comparison being done and the operands being compared. | |
3851 | If we had to reverse a non-equality condition, record that fact so we | |
3852 | know that it isn't valid for floating-point. */ | |
7f1c097d JH |
3853 | code = GET_CODE (XEXP (SET_SRC (set), 0)); |
3854 | op0 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 0), insn); | |
3855 | op1 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 1), insn); | |
7afe21cc | 3856 | |
13c9910f | 3857 | code = find_comparison_args (code, &op0, &op1, &mode0, &mode1); |
7afe21cc RK |
3858 | if (! cond_known_true) |
3859 | { | |
261efdef | 3860 | code = reversed_comparison_code_parts (code, op0, op1, insn); |
1eb8759b RH |
3861 | |
3862 | /* Don't remember if we can't find the inverse. */ | |
3863 | if (code == UNKNOWN) | |
3864 | return; | |
7afe21cc RK |
3865 | } |
3866 | ||
3867 | /* The mode is the mode of the non-constant. */ | |
13c9910f RS |
3868 | mode = mode0; |
3869 | if (mode1 != VOIDmode) | |
3870 | mode = mode1; | |
7afe21cc RK |
3871 | |
3872 | record_jump_cond (code, mode, op0, op1, reversed_nonequality); | |
3873 | } | |
3874 | ||
794693c0 RH |
3875 | /* Yet another form of subreg creation. In this case, we want something in |
3876 | MODE, and we should assume OP has MODE iff it is naturally modeless. */ | |
3877 | ||
3878 | static rtx | |
3879 | record_jump_cond_subreg (enum machine_mode mode, rtx op) | |
3880 | { | |
3881 | enum machine_mode op_mode = GET_MODE (op); | |
3882 | if (op_mode == mode || op_mode == VOIDmode) | |
3883 | return op; | |
3884 | return lowpart_subreg (mode, op, op_mode); | |
3885 | } | |
3886 | ||
7afe21cc RK |
3887 | /* We know that comparison CODE applied to OP0 and OP1 in MODE is true. |
3888 | REVERSED_NONEQUALITY is nonzero if CODE had to be swapped. | |
3889 | Make any useful entries we can with that information. Called from | |
3890 | above function and called recursively. */ | |
3891 | ||
3892 | static void | |
7080f735 AJ |
3893 | record_jump_cond (enum rtx_code code, enum machine_mode mode, rtx op0, |
3894 | rtx op1, int reversed_nonequality) | |
7afe21cc | 3895 | { |
2197a88a | 3896 | unsigned op0_hash, op1_hash; |
e428d738 | 3897 | int op0_in_memory, op1_in_memory; |
7afe21cc RK |
3898 | struct table_elt *op0_elt, *op1_elt; |
3899 | ||
3900 | /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG, | |
3901 | we know that they are also equal in the smaller mode (this is also | |
3902 | true for all smaller modes whether or not there is a SUBREG, but | |
ac7ef8d5 | 3903 | is not worth testing for with no SUBREG). */ |
7afe21cc | 3904 | |
2e794ee8 | 3905 | /* Note that GET_MODE (op0) may not equal MODE. */ |
6a4bdc79 | 3906 | if (code == EQ && paradoxical_subreg_p (op0)) |
7afe21cc RK |
3907 | { |
3908 | enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0)); | |
794693c0 RH |
3909 | rtx tem = record_jump_cond_subreg (inner_mode, op1); |
3910 | if (tem) | |
3911 | record_jump_cond (code, mode, SUBREG_REG (op0), tem, | |
3912 | reversed_nonequality); | |
7afe21cc RK |
3913 | } |
3914 | ||
6a4bdc79 | 3915 | if (code == EQ && paradoxical_subreg_p (op1)) |
7afe21cc RK |
3916 | { |
3917 | enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1)); | |
794693c0 RH |
3918 | rtx tem = record_jump_cond_subreg (inner_mode, op0); |
3919 | if (tem) | |
3920 | record_jump_cond (code, mode, SUBREG_REG (op1), tem, | |
3921 | reversed_nonequality); | |
7afe21cc RK |
3922 | } |
3923 | ||
278a83b2 | 3924 | /* Similarly, if this is an NE comparison, and either is a SUBREG |
7afe21cc RK |
3925 | making a smaller mode, we know the whole thing is also NE. */ |
3926 | ||
2e794ee8 RS |
3927 | /* Note that GET_MODE (op0) may not equal MODE; |
3928 | if we test MODE instead, we can get an infinite recursion | |
3929 | alternating between two modes each wider than MODE. */ | |
3930 | ||
7afe21cc RK |
3931 | if (code == NE && GET_CODE (op0) == SUBREG |
3932 | && subreg_lowpart_p (op0) | |
2e794ee8 RS |
3933 | && (GET_MODE_SIZE (GET_MODE (op0)) |
3934 | < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0))))) | |
7afe21cc RK |
3935 | { |
3936 | enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0)); | |
794693c0 RH |
3937 | rtx tem = record_jump_cond_subreg (inner_mode, op1); |
3938 | if (tem) | |
3939 | record_jump_cond (code, mode, SUBREG_REG (op0), tem, | |
3940 | reversed_nonequality); | |
7afe21cc RK |
3941 | } |
3942 | ||
3943 | if (code == NE && GET_CODE (op1) == SUBREG | |
3944 | && subreg_lowpart_p (op1) | |
2e794ee8 RS |
3945 | && (GET_MODE_SIZE (GET_MODE (op1)) |
3946 | < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1))))) | |
7afe21cc RK |
3947 | { |
3948 | enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1)); | |
794693c0 RH |
3949 | rtx tem = record_jump_cond_subreg (inner_mode, op0); |
3950 | if (tem) | |
3951 | record_jump_cond (code, mode, SUBREG_REG (op1), tem, | |
3952 | reversed_nonequality); | |
7afe21cc RK |
3953 | } |
3954 | ||
3955 | /* Hash both operands. */ | |
3956 | ||
3957 | do_not_record = 0; | |
3958 | hash_arg_in_memory = 0; | |
2197a88a | 3959 | op0_hash = HASH (op0, mode); |
7afe21cc | 3960 | op0_in_memory = hash_arg_in_memory; |
7afe21cc RK |
3961 | |
3962 | if (do_not_record) | |
3963 | return; | |
3964 | ||
3965 | do_not_record = 0; | |
3966 | hash_arg_in_memory = 0; | |
2197a88a | 3967 | op1_hash = HASH (op1, mode); |
7afe21cc | 3968 | op1_in_memory = hash_arg_in_memory; |
278a83b2 | 3969 | |
7afe21cc RK |
3970 | if (do_not_record) |
3971 | return; | |
3972 | ||
3973 | /* Look up both operands. */ | |
2197a88a RK |
3974 | op0_elt = lookup (op0, op0_hash, mode); |
3975 | op1_elt = lookup (op1, op1_hash, mode); | |
7afe21cc | 3976 | |
af3869c1 RK |
3977 | /* If both operands are already equivalent or if they are not in the |
3978 | table but are identical, do nothing. */ | |
3979 | if ((op0_elt != 0 && op1_elt != 0 | |
3980 | && op0_elt->first_same_value == op1_elt->first_same_value) | |
3981 | || op0 == op1 || rtx_equal_p (op0, op1)) | |
3982 | return; | |
3983 | ||
7afe21cc | 3984 | /* If we aren't setting two things equal all we can do is save this |
b2796a4b RK |
3985 | comparison. Similarly if this is floating-point. In the latter |
3986 | case, OP1 might be zero and both -0.0 and 0.0 are equal to it. | |
3987 | If we record the equality, we might inadvertently delete code | |
3988 | whose intent was to change -0 to +0. */ | |
3989 | ||
cbf6a543 | 3990 | if (code != EQ || FLOAT_MODE_P (GET_MODE (op0))) |
7afe21cc | 3991 | { |
1bb98cec DM |
3992 | struct qty_table_elem *ent; |
3993 | int qty; | |
3994 | ||
7afe21cc RK |
3995 | /* If we reversed a floating-point comparison, if OP0 is not a |
3996 | register, or if OP1 is neither a register or constant, we can't | |
3997 | do anything. */ | |
3998 | ||
f8cfc6aa | 3999 | if (!REG_P (op1)) |
7afe21cc RK |
4000 | op1 = equiv_constant (op1); |
4001 | ||
cbf6a543 | 4002 | if ((reversed_nonequality && FLOAT_MODE_P (mode)) |
f8cfc6aa | 4003 | || !REG_P (op0) || op1 == 0) |
7afe21cc RK |
4004 | return; |
4005 | ||
4006 | /* Put OP0 in the hash table if it isn't already. This gives it a | |
4007 | new quantity number. */ | |
4008 | if (op0_elt == 0) | |
4009 | { | |
9714cf43 | 4010 | if (insert_regs (op0, NULL, 0)) |
7afe21cc RK |
4011 | { |
4012 | rehash_using_reg (op0); | |
2197a88a | 4013 | op0_hash = HASH (op0, mode); |
2bb81c86 RK |
4014 | |
4015 | /* If OP0 is contained in OP1, this changes its hash code | |
4016 | as well. Faster to rehash than to check, except | |
4017 | for the simple case of a constant. */ | |
4018 | if (! CONSTANT_P (op1)) | |
2197a88a | 4019 | op1_hash = HASH (op1,mode); |
7afe21cc RK |
4020 | } |
4021 | ||
9714cf43 | 4022 | op0_elt = insert (op0, NULL, op0_hash, mode); |
7afe21cc | 4023 | op0_elt->in_memory = op0_in_memory; |
7afe21cc RK |
4024 | } |
4025 | ||
1bb98cec DM |
4026 | qty = REG_QTY (REGNO (op0)); |
4027 | ent = &qty_table[qty]; | |
4028 | ||
4029 | ent->comparison_code = code; | |
f8cfc6aa | 4030 | if (REG_P (op1)) |
7afe21cc | 4031 | { |
5d5ea909 | 4032 | /* Look it up again--in case op0 and op1 are the same. */ |
2197a88a | 4033 | op1_elt = lookup (op1, op1_hash, mode); |
5d5ea909 | 4034 | |
7afe21cc RK |
4035 | /* Put OP1 in the hash table so it gets a new quantity number. */ |
4036 | if (op1_elt == 0) | |
4037 | { | |
9714cf43 | 4038 | if (insert_regs (op1, NULL, 0)) |
7afe21cc RK |
4039 | { |
4040 | rehash_using_reg (op1); | |
2197a88a | 4041 | op1_hash = HASH (op1, mode); |
7afe21cc RK |
4042 | } |
4043 | ||
9714cf43 | 4044 | op1_elt = insert (op1, NULL, op1_hash, mode); |
7afe21cc | 4045 | op1_elt->in_memory = op1_in_memory; |
7afe21cc RK |
4046 | } |
4047 | ||
1bb98cec DM |
4048 | ent->comparison_const = NULL_RTX; |
4049 | ent->comparison_qty = REG_QTY (REGNO (op1)); | |
7afe21cc RK |
4050 | } |
4051 | else | |
4052 | { | |
1bb98cec DM |
4053 | ent->comparison_const = op1; |
4054 | ent->comparison_qty = -1; | |
7afe21cc RK |
4055 | } |
4056 | ||
4057 | return; | |
4058 | } | |
4059 | ||
eb5ad42a RS |
4060 | /* If either side is still missing an equivalence, make it now, |
4061 | then merge the equivalences. */ | |
7afe21cc | 4062 | |
7afe21cc RK |
4063 | if (op0_elt == 0) |
4064 | { | |
9714cf43 | 4065 | if (insert_regs (op0, NULL, 0)) |
7afe21cc RK |
4066 | { |
4067 | rehash_using_reg (op0); | |
2197a88a | 4068 | op0_hash = HASH (op0, mode); |
7afe21cc RK |
4069 | } |
4070 | ||
9714cf43 | 4071 | op0_elt = insert (op0, NULL, op0_hash, mode); |
7afe21cc | 4072 | op0_elt->in_memory = op0_in_memory; |
7afe21cc RK |
4073 | } |
4074 | ||
4075 | if (op1_elt == 0) | |
4076 | { | |
9714cf43 | 4077 | if (insert_regs (op1, NULL, 0)) |
7afe21cc RK |
4078 | { |
4079 | rehash_using_reg (op1); | |
2197a88a | 4080 | op1_hash = HASH (op1, mode); |
7afe21cc RK |
4081 | } |
4082 | ||
9714cf43 | 4083 | op1_elt = insert (op1, NULL, op1_hash, mode); |
7afe21cc | 4084 | op1_elt->in_memory = op1_in_memory; |
7afe21cc | 4085 | } |
eb5ad42a RS |
4086 | |
4087 | merge_equiv_classes (op0_elt, op1_elt); | |
7afe21cc RK |
4088 | } |
4089 | \f | |
4090 | /* CSE processing for one instruction. | |
7b02f4e0 SB |
4091 | |
4092 | Most "true" common subexpressions are mostly optimized away in GIMPLE, | |
4093 | but the few that "leak through" are cleaned up by cse_insn, and complex | |
4094 | addressing modes are often formed here. | |
4095 | ||
4096 | The main function is cse_insn, and between here and that function | |
4097 | a couple of helper functions is defined to keep the size of cse_insn | |
4098 | within reasonable proportions. | |
4099 | ||
4100 | Data is shared between the main and helper functions via STRUCT SET, | |
4101 | that contains all data related for every set in the instruction that | |
4102 | is being processed. | |
4103 | ||
4104 | Note that cse_main processes all sets in the instruction. Most | |
4105 | passes in GCC only process simple SET insns or single_set insns, but | |
4106 | CSE processes insns with multiple sets as well. */ | |
7afe21cc RK |
4107 | |
4108 | /* Data on one SET contained in the instruction. */ | |
4109 | ||
4110 | struct set | |
4111 | { | |
4112 | /* The SET rtx itself. */ | |
4113 | rtx rtl; | |
4114 | /* The SET_SRC of the rtx (the original value, if it is changing). */ | |
4115 | rtx src; | |
4116 | /* The hash-table element for the SET_SRC of the SET. */ | |
4117 | struct table_elt *src_elt; | |
2197a88a RK |
4118 | /* Hash value for the SET_SRC. */ |
4119 | unsigned src_hash; | |
4120 | /* Hash value for the SET_DEST. */ | |
4121 | unsigned dest_hash; | |
7afe21cc RK |
4122 | /* The SET_DEST, with SUBREG, etc., stripped. */ |
4123 | rtx inner_dest; | |
278a83b2 | 4124 | /* Nonzero if the SET_SRC is in memory. */ |
7afe21cc | 4125 | char src_in_memory; |
7afe21cc RK |
4126 | /* Nonzero if the SET_SRC contains something |
4127 | whose value cannot be predicted and understood. */ | |
4128 | char src_volatile; | |
496324d0 DN |
4129 | /* Original machine mode, in case it becomes a CONST_INT. |
4130 | The size of this field should match the size of the mode | |
4131 | field of struct rtx_def (see rtl.h). */ | |
4132 | ENUM_BITFIELD(machine_mode) mode : 8; | |
7afe21cc RK |
4133 | /* A constant equivalent for SET_SRC, if any. */ |
4134 | rtx src_const; | |
2197a88a RK |
4135 | /* Hash value of constant equivalent for SET_SRC. */ |
4136 | unsigned src_const_hash; | |
7afe21cc RK |
4137 | /* Table entry for constant equivalent for SET_SRC, if any. */ |
4138 | struct table_elt *src_const_elt; | |
05c433f3 PB |
4139 | /* Table entry for the destination address. */ |
4140 | struct table_elt *dest_addr_elt; | |
7afe21cc | 4141 | }; |
7b02f4e0 SB |
4142 | \f |
4143 | /* Special handling for (set REG0 REG1) where REG0 is the | |
4144 | "cheapest", cheaper than REG1. After cse, REG1 will probably not | |
4145 | be used in the sequel, so (if easily done) change this insn to | |
4146 | (set REG1 REG0) and replace REG1 with REG0 in the previous insn | |
4147 | that computed their value. Then REG1 will become a dead store | |
4148 | and won't cloud the situation for later optimizations. | |
4149 | ||
4150 | Do not make this change if REG1 is a hard register, because it will | |
4151 | then be used in the sequel and we may be changing a two-operand insn | |
4152 | into a three-operand insn. | |
4153 | ||
4154 | This is the last transformation that cse_insn will try to do. */ | |
7afe21cc RK |
4155 | |
4156 | static void | |
7b02f4e0 | 4157 | try_back_substitute_reg (rtx set, rtx insn) |
7afe21cc | 4158 | { |
7b02f4e0 SB |
4159 | rtx dest = SET_DEST (set); |
4160 | rtx src = SET_SRC (set); | |
7afe21cc | 4161 | |
7b02f4e0 SB |
4162 | if (REG_P (dest) |
4163 | && REG_P (src) && ! HARD_REGISTER_P (src) | |
4164 | && REGNO_QTY_VALID_P (REGNO (src))) | |
4165 | { | |
4166 | int src_q = REG_QTY (REGNO (src)); | |
4167 | struct qty_table_elem *src_ent = &qty_table[src_q]; | |
7afe21cc | 4168 | |
7b02f4e0 SB |
4169 | if (src_ent->first_reg == REGNO (dest)) |
4170 | { | |
4171 | /* Scan for the previous nonnote insn, but stop at a basic | |
4172 | block boundary. */ | |
4173 | rtx prev = insn; | |
4174 | rtx bb_head = BB_HEAD (BLOCK_FOR_INSN (insn)); | |
4175 | do | |
4176 | { | |
4177 | prev = PREV_INSN (prev); | |
4178 | } | |
4179 | while (prev != bb_head && (NOTE_P (prev) || DEBUG_INSN_P (prev))); | |
7afe21cc | 4180 | |
7b02f4e0 SB |
4181 | /* Do not swap the registers around if the previous instruction |
4182 | attaches a REG_EQUIV note to REG1. | |
7afe21cc | 4183 | |
7b02f4e0 SB |
4184 | ??? It's not entirely clear whether we can transfer a REG_EQUIV |
4185 | from the pseudo that originally shadowed an incoming argument | |
4186 | to another register. Some uses of REG_EQUIV might rely on it | |
4187 | being attached to REG1 rather than REG2. | |
7afe21cc | 4188 | |
7b02f4e0 SB |
4189 | This section previously turned the REG_EQUIV into a REG_EQUAL |
4190 | note. We cannot do that because REG_EQUIV may provide an | |
4191 | uninitialized stack slot when REG_PARM_STACK_SPACE is used. */ | |
4192 | if (NONJUMP_INSN_P (prev) | |
4193 | && GET_CODE (PATTERN (prev)) == SET | |
4194 | && SET_DEST (PATTERN (prev)) == src | |
4195 | && ! find_reg_note (prev, REG_EQUIV, NULL_RTX)) | |
4196 | { | |
4197 | rtx note; | |
4198 | ||
4199 | validate_change (prev, &SET_DEST (PATTERN (prev)), dest, 1); | |
4200 | validate_change (insn, &SET_DEST (set), src, 1); | |
4201 | validate_change (insn, &SET_SRC (set), dest, 1); | |
4202 | apply_change_group (); | |
4203 | ||
4204 | /* If INSN has a REG_EQUAL note, and this note mentions | |
4205 | REG0, then we must delete it, because the value in | |
4206 | REG0 has changed. If the note's value is REG1, we must | |
4207 | also delete it because that is now this insn's dest. */ | |
4208 | note = find_reg_note (insn, REG_EQUAL, NULL_RTX); | |
4209 | if (note != 0 | |
4210 | && (reg_mentioned_p (dest, XEXP (note, 0)) | |
4211 | || rtx_equal_p (src, XEXP (note, 0)))) | |
4212 | remove_note (insn, note); | |
4213 | } | |
f474c6f8 | 4214 | } |
f1e7c95f | 4215 | } |
7b02f4e0 SB |
4216 | } |
4217 | \f | |
4218 | /* Record all the SETs in this instruction into SETS_PTR, | |
4219 | and return the number of recorded sets. */ | |
4220 | static int | |
4221 | find_sets_in_insn (rtx insn, struct set **psets) | |
4222 | { | |
4223 | struct set *sets = *psets; | |
4224 | int n_sets = 0; | |
4225 | rtx x = PATTERN (insn); | |
f1e7c95f | 4226 | |
7afe21cc RK |
4227 | if (GET_CODE (x) == SET) |
4228 | { | |
7afe21cc RK |
4229 | /* Ignore SETs that are unconditional jumps. |
4230 | They never need cse processing, so this does not hurt. | |
4231 | The reason is not efficiency but rather | |
4232 | so that we can test at the end for instructions | |
4233 | that have been simplified to unconditional jumps | |
4234 | and not be misled by unchanged instructions | |
4235 | that were unconditional jumps to begin with. */ | |
4236 | if (SET_DEST (x) == pc_rtx | |
4237 | && GET_CODE (SET_SRC (x)) == LABEL_REF) | |
4238 | ; | |
7afe21cc RK |
4239 | /* Don't count call-insns, (set (reg 0) (call ...)), as a set. |
4240 | The hard function value register is used only once, to copy to | |
7b02f4e0 | 4241 | someplace else, so it isn't worth cse'ing. */ |
7afe21cc | 4242 | else if (GET_CODE (SET_SRC (x)) == CALL) |
7b02f4e0 | 4243 | ; |
7afe21cc | 4244 | else |
7b02f4e0 | 4245 | sets[n_sets++].rtl = x; |
7afe21cc RK |
4246 | } |
4247 | else if (GET_CODE (x) == PARALLEL) | |
4248 | { | |
7b02f4e0 | 4249 | int i, lim = XVECLEN (x, 0); |
278a83b2 | 4250 | |
7b02f4e0 SB |
4251 | /* Go over the epressions of the PARALLEL in forward order, to |
4252 | put them in the same order in the SETS array. */ | |
7afe21cc RK |
4253 | for (i = 0; i < lim; i++) |
4254 | { | |
b3694847 | 4255 | rtx y = XVECEXP (x, 0, i); |
7afe21cc RK |
4256 | if (GET_CODE (y) == SET) |
4257 | { | |
7722328e RK |
4258 | /* As above, we ignore unconditional jumps and call-insns and |
4259 | ignore the result of apply_change_group. */ | |
7b02f4e0 SB |
4260 | if (SET_DEST (y) == pc_rtx |
4261 | && GET_CODE (SET_SRC (y)) == LABEL_REF) | |
4262 | ; | |
4263 | else if (GET_CODE (SET_SRC (y)) == CALL) | |
7afe21cc RK |
4264 | ; |
4265 | else | |
4266 | sets[n_sets++].rtl = y; | |
4267 | } | |
7afe21cc RK |
4268 | } |
4269 | } | |
7b02f4e0 SB |
4270 | |
4271 | return n_sets; | |
4272 | } | |
4273 | \f | |
4274 | /* Where possible, substitute every register reference in the N_SETS | |
4275 | number of SETS in INSN with the the canonical register. | |
4276 | ||
4277 | Register canonicalization propagatest the earliest register (i.e. | |
4278 | one that is set before INSN) with the same value. This is a very | |
4279 | useful, simple form of CSE, to clean up warts from expanding GIMPLE | |
4280 | to RTL. For instance, a CONST for an address is usually expanded | |
4281 | multiple times to loads into different registers, thus creating many | |
4282 | subexpressions of the form: | |
4283 | ||
4284 | (set (reg1) (some_const)) | |
4285 | (set (mem (... reg1 ...) (thing))) | |
4286 | (set (reg2) (some_const)) | |
4287 | (set (mem (... reg2 ...) (thing))) | |
4288 | ||
4289 | After canonicalizing, the code takes the following form: | |
4290 | ||
4291 | (set (reg1) (some_const)) | |
4292 | (set (mem (... reg1 ...) (thing))) | |
4293 | (set (reg2) (some_const)) | |
4294 | (set (mem (... reg1 ...) (thing))) | |
4295 | ||
4296 | The set to reg2 is now trivially dead, and the memory reference (or | |
4297 | address, or whatever) may be a candidate for further CSEing. | |
4298 | ||
4299 | In this function, the result of apply_change_group can be ignored; | |
4300 | see canon_reg. */ | |
4301 | ||
4302 | static void | |
4303 | canonicalize_insn (rtx insn, struct set **psets, int n_sets) | |
4304 | { | |
4305 | struct set *sets = *psets; | |
4306 | rtx tem; | |
4307 | rtx x = PATTERN (insn); | |
4308 | int i; | |
4309 | ||
4310 | if (CALL_P (insn)) | |
4311 | { | |
4312 | for (tem = CALL_INSN_FUNCTION_USAGE (insn); tem; tem = XEXP (tem, 1)) | |
e384e6b5 BS |
4313 | if (GET_CODE (XEXP (tem, 0)) != SET) |
4314 | XEXP (tem, 0) = canon_reg (XEXP (tem, 0), insn); | |
7b02f4e0 SB |
4315 | } |
4316 | ||
4317 | if (GET_CODE (x) == SET && GET_CODE (SET_SRC (x)) == CALL) | |
4318 | { | |
4319 | canon_reg (SET_SRC (x), insn); | |
4320 | apply_change_group (); | |
4321 | fold_rtx (SET_SRC (x), insn); | |
4322 | } | |
7afe21cc RK |
4323 | else if (GET_CODE (x) == CLOBBER) |
4324 | { | |
7b02f4e0 SB |
4325 | /* If we clobber memory, canon the address. |
4326 | This does nothing when a register is clobbered | |
4327 | because we have already invalidated the reg. */ | |
3c0cb5de | 4328 | if (MEM_P (XEXP (x, 0))) |
6fb5fa3c | 4329 | canon_reg (XEXP (x, 0), insn); |
7afe21cc | 4330 | } |
7afe21cc | 4331 | else if (GET_CODE (x) == USE |
f8cfc6aa | 4332 | && ! (REG_P (XEXP (x, 0)) |
7afe21cc | 4333 | && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)) |
7b02f4e0 | 4334 | /* Canonicalize a USE of a pseudo register or memory location. */ |
b1ba284c EB |
4335 | canon_reg (x, insn); |
4336 | else if (GET_CODE (x) == ASM_OPERANDS) | |
4337 | { | |
4338 | for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--) | |
4339 | { | |
4340 | rtx input = ASM_OPERANDS_INPUT (x, i); | |
4341 | if (!(REG_P (input) && REGNO (input) < FIRST_PSEUDO_REGISTER)) | |
4342 | { | |
4343 | input = canon_reg (input, insn); | |
4344 | validate_change (insn, &ASM_OPERANDS_INPUT (x, i), input, 1); | |
4345 | } | |
4346 | } | |
4347 | } | |
7afe21cc RK |
4348 | else if (GET_CODE (x) == CALL) |
4349 | { | |
4350 | canon_reg (x, insn); | |
77fa0940 | 4351 | apply_change_group (); |
7afe21cc RK |
4352 | fold_rtx (x, insn); |
4353 | } | |
b5b8b0ac AO |
4354 | else if (DEBUG_INSN_P (insn)) |
4355 | canon_reg (PATTERN (insn), insn); | |
7b02f4e0 SB |
4356 | else if (GET_CODE (x) == PARALLEL) |
4357 | { | |
4358 | for (i = XVECLEN (x, 0) - 1; i >= 0; i--) | |
4359 | { | |
4360 | rtx y = XVECEXP (x, 0, i); | |
4361 | if (GET_CODE (y) == SET && GET_CODE (SET_SRC (y)) == CALL) | |
4362 | { | |
4363 | canon_reg (SET_SRC (y), insn); | |
4364 | apply_change_group (); | |
4365 | fold_rtx (SET_SRC (y), insn); | |
4366 | } | |
4367 | else if (GET_CODE (y) == CLOBBER) | |
4368 | { | |
4369 | if (MEM_P (XEXP (y, 0))) | |
4370 | canon_reg (XEXP (y, 0), insn); | |
4371 | } | |
4372 | else if (GET_CODE (y) == USE | |
4373 | && ! (REG_P (XEXP (y, 0)) | |
4374 | && REGNO (XEXP (y, 0)) < FIRST_PSEUDO_REGISTER)) | |
4375 | canon_reg (y, insn); | |
4376 | else if (GET_CODE (y) == CALL) | |
4377 | { | |
4378 | canon_reg (y, insn); | |
4379 | apply_change_group (); | |
4380 | fold_rtx (y, insn); | |
4381 | } | |
4382 | } | |
4383 | } | |
7afe21cc | 4384 | |
92f9aa51 | 4385 | if (n_sets == 1 && REG_NOTES (insn) != 0 |
7b02f4e0 | 4386 | && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0) |
7b668f9e | 4387 | { |
7b02f4e0 SB |
4388 | /* We potentially will process this insn many times. Therefore, |
4389 | drop the REG_EQUAL note if it is equal to the SET_SRC of the | |
4390 | unique set in INSN. | |
4391 | ||
4392 | Do not do so if the REG_EQUAL note is for a STRICT_LOW_PART, | |
4393 | because cse_insn handles those specially. */ | |
4394 | if (GET_CODE (SET_DEST (sets[0].rtl)) != STRICT_LOW_PART | |
4395 | && rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl))) | |
4396 | remove_note (insn, tem); | |
4397 | else | |
4398 | { | |
4399 | canon_reg (XEXP (tem, 0), insn); | |
4400 | apply_change_group (); | |
4401 | XEXP (tem, 0) = fold_rtx (XEXP (tem, 0), insn); | |
4402 | df_notes_rescan (insn); | |
4403 | } | |
7b668f9e | 4404 | } |
7afe21cc RK |
4405 | |
4406 | /* Canonicalize sources and addresses of destinations. | |
4407 | We do this in a separate pass to avoid problems when a MATCH_DUP is | |
4408 | present in the insn pattern. In that case, we want to ensure that | |
4409 | we don't break the duplicate nature of the pattern. So we will replace | |
4410 | both operands at the same time. Otherwise, we would fail to find an | |
4411 | equivalent substitution in the loop calling validate_change below. | |
7afe21cc RK |
4412 | |
4413 | We used to suppress canonicalization of DEST if it appears in SRC, | |
77fa0940 | 4414 | but we don't do this any more. */ |
7afe21cc RK |
4415 | |
4416 | for (i = 0; i < n_sets; i++) | |
4417 | { | |
4418 | rtx dest = SET_DEST (sets[i].rtl); | |
4419 | rtx src = SET_SRC (sets[i].rtl); | |
32e9fa48 | 4420 | rtx new_rtx = canon_reg (src, insn); |
7afe21cc | 4421 | |
32e9fa48 | 4422 | validate_change (insn, &SET_SRC (sets[i].rtl), new_rtx, 1); |
7afe21cc | 4423 | |
46d096a3 | 4424 | if (GET_CODE (dest) == ZERO_EXTRACT) |
7afe21cc RK |
4425 | { |
4426 | validate_change (insn, &XEXP (dest, 1), | |
77fa0940 | 4427 | canon_reg (XEXP (dest, 1), insn), 1); |
7afe21cc | 4428 | validate_change (insn, &XEXP (dest, 2), |
77fa0940 | 4429 | canon_reg (XEXP (dest, 2), insn), 1); |
7afe21cc RK |
4430 | } |
4431 | ||
46d096a3 | 4432 | while (GET_CODE (dest) == SUBREG |
7afe21cc | 4433 | || GET_CODE (dest) == ZERO_EXTRACT |
46d096a3 | 4434 | || GET_CODE (dest) == STRICT_LOW_PART) |
7afe21cc RK |
4435 | dest = XEXP (dest, 0); |
4436 | ||
3c0cb5de | 4437 | if (MEM_P (dest)) |
7afe21cc RK |
4438 | canon_reg (dest, insn); |
4439 | } | |
4440 | ||
77fa0940 RK |
4441 | /* Now that we have done all the replacements, we can apply the change |
4442 | group and see if they all work. Note that this will cause some | |
4443 | canonicalizations that would have worked individually not to be applied | |
4444 | because some other canonicalization didn't work, but this should not | |
278a83b2 | 4445 | occur often. |
7722328e RK |
4446 | |
4447 | The result of apply_change_group can be ignored; see canon_reg. */ | |
77fa0940 RK |
4448 | |
4449 | apply_change_group (); | |
7b02f4e0 SB |
4450 | } |
4451 | \f | |
4452 | /* Main function of CSE. | |
4453 | First simplify sources and addresses of all assignments | |
4454 | in the instruction, using previously-computed equivalents values. | |
4455 | Then install the new sources and destinations in the table | |
4456 | of available values. */ | |
4457 | ||
4458 | static void | |
4459 | cse_insn (rtx insn) | |
4460 | { | |
4461 | rtx x = PATTERN (insn); | |
4462 | int i; | |
4463 | rtx tem; | |
4464 | int n_sets = 0; | |
4465 | ||
4466 | rtx src_eqv = 0; | |
4467 | struct table_elt *src_eqv_elt = 0; | |
4468 | int src_eqv_volatile = 0; | |
4469 | int src_eqv_in_memory = 0; | |
4470 | unsigned src_eqv_hash = 0; | |
4471 | ||
4472 | struct set *sets = (struct set *) 0; | |
4473 | ||
4474 | if (GET_CODE (x) == SET) | |
4475 | sets = XALLOCA (struct set); | |
4476 | else if (GET_CODE (x) == PARALLEL) | |
4477 | sets = XALLOCAVEC (struct set, XVECLEN (x, 0)); | |
4478 | ||
4479 | this_insn = insn; | |
4480 | #ifdef HAVE_cc0 | |
4481 | /* Records what this insn does to set CC0. */ | |
4482 | this_insn_cc0 = 0; | |
4483 | this_insn_cc0_mode = VOIDmode; | |
4484 | #endif | |
4485 | ||
4486 | /* Find all regs explicitly clobbered in this insn, | |
4487 | to ensure they are not replaced with any other regs | |
4488 | elsewhere in this insn. */ | |
4489 | invalidate_from_sets_and_clobbers (insn); | |
4490 | ||
4491 | /* Record all the SETs in this instruction. */ | |
4492 | n_sets = find_sets_in_insn (insn, &sets); | |
4493 | ||
4494 | /* Substitute the canonical register where possible. */ | |
4495 | canonicalize_insn (insn, &sets, n_sets); | |
4496 | ||
4497 | /* If this insn has a REG_EQUAL note, store the equivalent value in SRC_EQV, | |
4498 | if different, or if the DEST is a STRICT_LOW_PART. The latter condition | |
4499 | is necessary because SRC_EQV is handled specially for this case, and if | |
4500 | it isn't set, then there will be no equivalence for the destination. */ | |
4501 | if (n_sets == 1 && REG_NOTES (insn) != 0 | |
4502 | && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0 | |
4503 | && (! rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl)) | |
4504 | || GET_CODE (SET_DEST (sets[0].rtl)) == STRICT_LOW_PART)) | |
4505 | src_eqv = copy_rtx (XEXP (tem, 0)); | |
77fa0940 | 4506 | |
7afe21cc RK |
4507 | /* Set sets[i].src_elt to the class each source belongs to. |
4508 | Detect assignments from or to volatile things | |
4509 | and set set[i] to zero so they will be ignored | |
4510 | in the rest of this function. | |
4511 | ||
4512 | Nothing in this loop changes the hash table or the register chains. */ | |
4513 | ||
4514 | for (i = 0; i < n_sets; i++) | |
4515 | { | |
b4ab701f | 4516 | bool repeat = false; |
b3694847 SS |
4517 | rtx src, dest; |
4518 | rtx src_folded; | |
4519 | struct table_elt *elt = 0, *p; | |
7afe21cc RK |
4520 | enum machine_mode mode; |
4521 | rtx src_eqv_here; | |
4522 | rtx src_const = 0; | |
4523 | rtx src_related = 0; | |
2c5bfdf7 | 4524 | bool src_related_is_const_anchor = false; |
7afe21cc | 4525 | struct table_elt *src_const_elt = 0; |
99a9c946 GS |
4526 | int src_cost = MAX_COST; |
4527 | int src_eqv_cost = MAX_COST; | |
4528 | int src_folded_cost = MAX_COST; | |
4529 | int src_related_cost = MAX_COST; | |
4530 | int src_elt_cost = MAX_COST; | |
4531 | int src_regcost = MAX_COST; | |
4532 | int src_eqv_regcost = MAX_COST; | |
4533 | int src_folded_regcost = MAX_COST; | |
4534 | int src_related_regcost = MAX_COST; | |
4535 | int src_elt_regcost = MAX_COST; | |
da7d8304 | 4536 | /* Set nonzero if we need to call force_const_mem on with the |
7afe21cc RK |
4537 | contents of src_folded before using it. */ |
4538 | int src_folded_force_flag = 0; | |
4539 | ||
4540 | dest = SET_DEST (sets[i].rtl); | |
4541 | src = SET_SRC (sets[i].rtl); | |
4542 | ||
4543 | /* If SRC is a constant that has no machine mode, | |
4544 | hash it with the destination's machine mode. | |
4545 | This way we can keep different modes separate. */ | |
4546 | ||
4547 | mode = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src); | |
4548 | sets[i].mode = mode; | |
4549 | ||
4550 | if (src_eqv) | |
4551 | { | |
4552 | enum machine_mode eqvmode = mode; | |
4553 | if (GET_CODE (dest) == STRICT_LOW_PART) | |
4554 | eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0))); | |
4555 | do_not_record = 0; | |
4556 | hash_arg_in_memory = 0; | |
2197a88a | 4557 | src_eqv_hash = HASH (src_eqv, eqvmode); |
7afe21cc RK |
4558 | |
4559 | /* Find the equivalence class for the equivalent expression. */ | |
4560 | ||
4561 | if (!do_not_record) | |
2197a88a | 4562 | src_eqv_elt = lookup (src_eqv, src_eqv_hash, eqvmode); |
7afe21cc RK |
4563 | |
4564 | src_eqv_volatile = do_not_record; | |
4565 | src_eqv_in_memory = hash_arg_in_memory; | |
7afe21cc RK |
4566 | } |
4567 | ||
4568 | /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the | |
4569 | value of the INNER register, not the destination. So it is not | |
3826a3da | 4570 | a valid substitution for the source. But save it for later. */ |
7afe21cc RK |
4571 | if (GET_CODE (dest) == STRICT_LOW_PART) |
4572 | src_eqv_here = 0; | |
4573 | else | |
4574 | src_eqv_here = src_eqv; | |
4575 | ||
4576 | /* Simplify and foldable subexpressions in SRC. Then get the fully- | |
4577 | simplified result, which may not necessarily be valid. */ | |
4578 | src_folded = fold_rtx (src, insn); | |
4579 | ||
e6a125a0 RK |
4580 | #if 0 |
4581 | /* ??? This caused bad code to be generated for the m68k port with -O2. | |
4582 | Suppose src is (CONST_INT -1), and that after truncation src_folded | |
4583 | is (CONST_INT 3). Suppose src_folded is then used for src_const. | |
4584 | At the end we will add src and src_const to the same equivalence | |
4585 | class. We now have 3 and -1 on the same equivalence class. This | |
4586 | causes later instructions to be mis-optimized. */ | |
7afe21cc RK |
4587 | /* If storing a constant in a bitfield, pre-truncate the constant |
4588 | so we will be able to record it later. */ | |
46d096a3 | 4589 | if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT) |
7afe21cc RK |
4590 | { |
4591 | rtx width = XEXP (SET_DEST (sets[i].rtl), 1); | |
4592 | ||
481683e1 SZ |
4593 | if (CONST_INT_P (src) |
4594 | && CONST_INT_P (width) | |
906c4e36 RK |
4595 | && INTVAL (width) < HOST_BITS_PER_WIDE_INT |
4596 | && (INTVAL (src) & ((HOST_WIDE_INT) (-1) << INTVAL (width)))) | |
4597 | src_folded | |
4598 | = GEN_INT (INTVAL (src) & (((HOST_WIDE_INT) 1 | |
4599 | << INTVAL (width)) - 1)); | |
7afe21cc | 4600 | } |
e6a125a0 | 4601 | #endif |
7afe21cc RK |
4602 | |
4603 | /* Compute SRC's hash code, and also notice if it | |
4604 | should not be recorded at all. In that case, | |
4605 | prevent any further processing of this assignment. */ | |
4606 | do_not_record = 0; | |
4607 | hash_arg_in_memory = 0; | |
7afe21cc RK |
4608 | |
4609 | sets[i].src = src; | |
2197a88a | 4610 | sets[i].src_hash = HASH (src, mode); |
7afe21cc RK |
4611 | sets[i].src_volatile = do_not_record; |
4612 | sets[i].src_in_memory = hash_arg_in_memory; | |
7afe21cc | 4613 | |
50196afa | 4614 | /* If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is |
43e72072 JJ |
4615 | a pseudo, do not record SRC. Using SRC as a replacement for |
4616 | anything else will be incorrect in that situation. Note that | |
4617 | this usually occurs only for stack slots, in which case all the | |
4618 | RTL would be referring to SRC, so we don't lose any optimization | |
4619 | opportunities by not having SRC in the hash table. */ | |
50196afa | 4620 | |
3c0cb5de | 4621 | if (MEM_P (src) |
43e72072 | 4622 | && find_reg_note (insn, REG_EQUIV, NULL_RTX) != 0 |
f8cfc6aa | 4623 | && REG_P (dest) |
43e72072 | 4624 | && REGNO (dest) >= FIRST_PSEUDO_REGISTER) |
50196afa RK |
4625 | sets[i].src_volatile = 1; |
4626 | ||
0dadecf6 RK |
4627 | #if 0 |
4628 | /* It is no longer clear why we used to do this, but it doesn't | |
4629 | appear to still be needed. So let's try without it since this | |
4630 | code hurts cse'ing widened ops. */ | |
9a5a17f3 | 4631 | /* If source is a paradoxical subreg (such as QI treated as an SI), |
7afe21cc RK |
4632 | treat it as volatile. It may do the work of an SI in one context |
4633 | where the extra bits are not being used, but cannot replace an SI | |
4634 | in general. */ | |
6a4bdc79 | 4635 | if (paradoxical_subreg_p (src)) |
7afe21cc | 4636 | sets[i].src_volatile = 1; |
0dadecf6 | 4637 | #endif |
7afe21cc RK |
4638 | |
4639 | /* Locate all possible equivalent forms for SRC. Try to replace | |
4640 | SRC in the insn with each cheaper equivalent. | |
4641 | ||
4642 | We have the following types of equivalents: SRC itself, a folded | |
4643 | version, a value given in a REG_EQUAL note, or a value related | |
4644 | to a constant. | |
4645 | ||
4646 | Each of these equivalents may be part of an additional class | |
4647 | of equivalents (if more than one is in the table, they must be in | |
4648 | the same class; we check for this). | |
4649 | ||
4650 | If the source is volatile, we don't do any table lookups. | |
4651 | ||
4652 | We note any constant equivalent for possible later use in a | |
4653 | REG_NOTE. */ | |
4654 | ||
4655 | if (!sets[i].src_volatile) | |
2197a88a | 4656 | elt = lookup (src, sets[i].src_hash, mode); |
7afe21cc RK |
4657 | |
4658 | sets[i].src_elt = elt; | |
4659 | ||
4660 | if (elt && src_eqv_here && src_eqv_elt) | |
278a83b2 KH |
4661 | { |
4662 | if (elt->first_same_value != src_eqv_elt->first_same_value) | |
7afe21cc RK |
4663 | { |
4664 | /* The REG_EQUAL is indicating that two formerly distinct | |
4665 | classes are now equivalent. So merge them. */ | |
4666 | merge_equiv_classes (elt, src_eqv_elt); | |
2197a88a RK |
4667 | src_eqv_hash = HASH (src_eqv, elt->mode); |
4668 | src_eqv_elt = lookup (src_eqv, src_eqv_hash, elt->mode); | |
7afe21cc RK |
4669 | } |
4670 | ||
278a83b2 KH |
4671 | src_eqv_here = 0; |
4672 | } | |
7afe21cc RK |
4673 | |
4674 | else if (src_eqv_elt) | |
278a83b2 | 4675 | elt = src_eqv_elt; |
7afe21cc RK |
4676 | |
4677 | /* Try to find a constant somewhere and record it in `src_const'. | |
4678 | Record its table element, if any, in `src_const_elt'. Look in | |
4679 | any known equivalences first. (If the constant is not in the | |
2197a88a | 4680 | table, also set `sets[i].src_const_hash'). */ |
7afe21cc | 4681 | if (elt) |
278a83b2 | 4682 | for (p = elt->first_same_value; p; p = p->next_same_value) |
7afe21cc RK |
4683 | if (p->is_const) |
4684 | { | |
4685 | src_const = p->exp; | |
4686 | src_const_elt = elt; | |
4687 | break; | |
4688 | } | |
4689 | ||
4690 | if (src_const == 0 | |
4691 | && (CONSTANT_P (src_folded) | |
278a83b2 | 4692 | /* Consider (minus (label_ref L1) (label_ref L2)) as |
7afe21cc RK |
4693 | "constant" here so we will record it. This allows us |
4694 | to fold switch statements when an ADDR_DIFF_VEC is used. */ | |
4695 | || (GET_CODE (src_folded) == MINUS | |
4696 | && GET_CODE (XEXP (src_folded, 0)) == LABEL_REF | |
4697 | && GET_CODE (XEXP (src_folded, 1)) == LABEL_REF))) | |
4698 | src_const = src_folded, src_const_elt = elt; | |
4699 | else if (src_const == 0 && src_eqv_here && CONSTANT_P (src_eqv_here)) | |
4700 | src_const = src_eqv_here, src_const_elt = src_eqv_elt; | |
4701 | ||
4702 | /* If we don't know if the constant is in the table, get its | |
4703 | hash code and look it up. */ | |
4704 | if (src_const && src_const_elt == 0) | |
4705 | { | |
2197a88a RK |
4706 | sets[i].src_const_hash = HASH (src_const, mode); |
4707 | src_const_elt = lookup (src_const, sets[i].src_const_hash, mode); | |
7afe21cc RK |
4708 | } |
4709 | ||
4710 | sets[i].src_const = src_const; | |
4711 | sets[i].src_const_elt = src_const_elt; | |
4712 | ||
4713 | /* If the constant and our source are both in the table, mark them as | |
4714 | equivalent. Otherwise, if a constant is in the table but the source | |
4715 | isn't, set ELT to it. */ | |
4716 | if (src_const_elt && elt | |
4717 | && src_const_elt->first_same_value != elt->first_same_value) | |
4718 | merge_equiv_classes (elt, src_const_elt); | |
4719 | else if (src_const_elt && elt == 0) | |
4720 | elt = src_const_elt; | |
4721 | ||
4722 | /* See if there is a register linearly related to a constant | |
4723 | equivalent of SRC. */ | |
4724 | if (src_const | |
4725 | && (GET_CODE (src_const) == CONST | |
4726 | || (src_const_elt && src_const_elt->related_value != 0))) | |
278a83b2 KH |
4727 | { |
4728 | src_related = use_related_value (src_const, src_const_elt); | |
4729 | if (src_related) | |
4730 | { | |
7afe21cc | 4731 | struct table_elt *src_related_elt |
278a83b2 | 4732 | = lookup (src_related, HASH (src_related, mode), mode); |
7afe21cc | 4733 | if (src_related_elt && elt) |
278a83b2 | 4734 | { |
7afe21cc RK |
4735 | if (elt->first_same_value |
4736 | != src_related_elt->first_same_value) | |
278a83b2 | 4737 | /* This can occur when we previously saw a CONST |
7afe21cc RK |
4738 | involving a SYMBOL_REF and then see the SYMBOL_REF |
4739 | twice. Merge the involved classes. */ | |
4740 | merge_equiv_classes (elt, src_related_elt); | |
4741 | ||
278a83b2 | 4742 | src_related = 0; |
7afe21cc | 4743 | src_related_elt = 0; |
278a83b2 KH |
4744 | } |
4745 | else if (src_related_elt && elt == 0) | |
4746 | elt = src_related_elt; | |
7afe21cc | 4747 | } |
278a83b2 | 4748 | } |
7afe21cc | 4749 | |
e4600702 RK |
4750 | /* See if we have a CONST_INT that is already in a register in a |
4751 | wider mode. */ | |
4752 | ||
481683e1 | 4753 | if (src_const && src_related == 0 && CONST_INT_P (src_const) |
e4600702 | 4754 | && GET_MODE_CLASS (mode) == MODE_INT |
5511bc5a | 4755 | && GET_MODE_PRECISION (mode) < BITS_PER_WORD) |
e4600702 RK |
4756 | { |
4757 | enum machine_mode wider_mode; | |
4758 | ||
4759 | for (wider_mode = GET_MODE_WIDER_MODE (mode); | |
1f3ad3f0 | 4760 | wider_mode != VOIDmode |
5511bc5a | 4761 | && GET_MODE_PRECISION (wider_mode) <= BITS_PER_WORD |
e4600702 RK |
4762 | && src_related == 0; |
4763 | wider_mode = GET_MODE_WIDER_MODE (wider_mode)) | |
4764 | { | |
4765 | struct table_elt *const_elt | |
4766 | = lookup (src_const, HASH (src_const, wider_mode), wider_mode); | |
4767 | ||
4768 | if (const_elt == 0) | |
4769 | continue; | |
4770 | ||
4771 | for (const_elt = const_elt->first_same_value; | |
4772 | const_elt; const_elt = const_elt->next_same_value) | |
f8cfc6aa | 4773 | if (REG_P (const_elt->exp)) |
e4600702 | 4774 | { |
73ca11ed | 4775 | src_related = gen_lowpart (mode, const_elt->exp); |
e4600702 RK |
4776 | break; |
4777 | } | |
4778 | } | |
4779 | } | |
4780 | ||
d45cf215 RS |
4781 | /* Another possibility is that we have an AND with a constant in |
4782 | a mode narrower than a word. If so, it might have been generated | |
4783 | as part of an "if" which would narrow the AND. If we already | |
4784 | have done the AND in a wider mode, we can use a SUBREG of that | |
4785 | value. */ | |
4786 | ||
4787 | if (flag_expensive_optimizations && ! src_related | |
481683e1 | 4788 | && GET_CODE (src) == AND && CONST_INT_P (XEXP (src, 1)) |
d45cf215 RS |
4789 | && GET_MODE_SIZE (mode) < UNITS_PER_WORD) |
4790 | { | |
4791 | enum machine_mode tmode; | |
38a448ca | 4792 | rtx new_and = gen_rtx_AND (VOIDmode, NULL_RTX, XEXP (src, 1)); |
d45cf215 RS |
4793 | |
4794 | for (tmode = GET_MODE_WIDER_MODE (mode); | |
4795 | GET_MODE_SIZE (tmode) <= UNITS_PER_WORD; | |
4796 | tmode = GET_MODE_WIDER_MODE (tmode)) | |
4797 | { | |
4de249d9 | 4798 | rtx inner = gen_lowpart (tmode, XEXP (src, 0)); |
d45cf215 RS |
4799 | struct table_elt *larger_elt; |
4800 | ||
4801 | if (inner) | |
4802 | { | |
4803 | PUT_MODE (new_and, tmode); | |
4804 | XEXP (new_and, 0) = inner; | |
4805 | larger_elt = lookup (new_and, HASH (new_and, tmode), tmode); | |
4806 | if (larger_elt == 0) | |
4807 | continue; | |
4808 | ||
4809 | for (larger_elt = larger_elt->first_same_value; | |
4810 | larger_elt; larger_elt = larger_elt->next_same_value) | |
f8cfc6aa | 4811 | if (REG_P (larger_elt->exp)) |
d45cf215 RS |
4812 | { |
4813 | src_related | |
4de249d9 | 4814 | = gen_lowpart (mode, larger_elt->exp); |
d45cf215 RS |
4815 | break; |
4816 | } | |
4817 | ||
4818 | if (src_related) | |
4819 | break; | |
4820 | } | |
4821 | } | |
4822 | } | |
7bac1be0 RK |
4823 | |
4824 | #ifdef LOAD_EXTEND_OP | |
4825 | /* See if a MEM has already been loaded with a widening operation; | |
4826 | if it has, we can use a subreg of that. Many CISC machines | |
4827 | also have such operations, but this is only likely to be | |
71cc389b | 4828 | beneficial on these machines. */ |
278a83b2 | 4829 | |
ddc356e8 | 4830 | if (flag_expensive_optimizations && src_related == 0 |
7bac1be0 RK |
4831 | && (GET_MODE_SIZE (mode) < UNITS_PER_WORD) |
4832 | && GET_MODE_CLASS (mode) == MODE_INT | |
3c0cb5de | 4833 | && MEM_P (src) && ! do_not_record |
f822d252 | 4834 | && LOAD_EXTEND_OP (mode) != UNKNOWN) |
7bac1be0 | 4835 | { |
9d80ef7c RH |
4836 | struct rtx_def memory_extend_buf; |
4837 | rtx memory_extend_rtx = &memory_extend_buf; | |
7bac1be0 | 4838 | enum machine_mode tmode; |
278a83b2 | 4839 | |
7bac1be0 RK |
4840 | /* Set what we are trying to extend and the operation it might |
4841 | have been extended with. */ | |
c3284718 | 4842 | memset (memory_extend_rtx, 0, sizeof (*memory_extend_rtx)); |
7bac1be0 RK |
4843 | PUT_CODE (memory_extend_rtx, LOAD_EXTEND_OP (mode)); |
4844 | XEXP (memory_extend_rtx, 0) = src; | |
278a83b2 | 4845 | |
7bac1be0 RK |
4846 | for (tmode = GET_MODE_WIDER_MODE (mode); |
4847 | GET_MODE_SIZE (tmode) <= UNITS_PER_WORD; | |
4848 | tmode = GET_MODE_WIDER_MODE (tmode)) | |
4849 | { | |
4850 | struct table_elt *larger_elt; | |
278a83b2 | 4851 | |
7bac1be0 | 4852 | PUT_MODE (memory_extend_rtx, tmode); |
278a83b2 | 4853 | larger_elt = lookup (memory_extend_rtx, |
7bac1be0 RK |
4854 | HASH (memory_extend_rtx, tmode), tmode); |
4855 | if (larger_elt == 0) | |
4856 | continue; | |
278a83b2 | 4857 | |
7bac1be0 RK |
4858 | for (larger_elt = larger_elt->first_same_value; |
4859 | larger_elt; larger_elt = larger_elt->next_same_value) | |
f8cfc6aa | 4860 | if (REG_P (larger_elt->exp)) |
7bac1be0 | 4861 | { |
73ca11ed | 4862 | src_related = gen_lowpart (mode, larger_elt->exp); |
7bac1be0 RK |
4863 | break; |
4864 | } | |
278a83b2 | 4865 | |
7bac1be0 RK |
4866 | if (src_related) |
4867 | break; | |
4868 | } | |
4869 | } | |
4870 | #endif /* LOAD_EXTEND_OP */ | |
278a83b2 | 4871 | |
2c5bfdf7 AN |
4872 | /* Try to express the constant using a register+offset expression |
4873 | derived from a constant anchor. */ | |
4874 | ||
4875 | if (targetm.const_anchor | |
4876 | && !src_related | |
4877 | && src_const | |
4878 | && GET_CODE (src_const) == CONST_INT) | |
4879 | { | |
4880 | src_related = try_const_anchors (src_const, mode); | |
4881 | src_related_is_const_anchor = src_related != NULL_RTX; | |
4882 | } | |
4883 | ||
4884 | ||
7afe21cc | 4885 | if (src == src_folded) |
278a83b2 | 4886 | src_folded = 0; |
7afe21cc | 4887 | |
da7d8304 | 4888 | /* At this point, ELT, if nonzero, points to a class of expressions |
7afe21cc | 4889 | equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED, |
da7d8304 | 4890 | and SRC_RELATED, if nonzero, each contain additional equivalent |
7afe21cc RK |
4891 | expressions. Prune these latter expressions by deleting expressions |
4892 | already in the equivalence class. | |
4893 | ||
4894 | Check for an equivalent identical to the destination. If found, | |
4895 | this is the preferred equivalent since it will likely lead to | |
4896 | elimination of the insn. Indicate this by placing it in | |
4897 | `src_related'. */ | |
4898 | ||
278a83b2 KH |
4899 | if (elt) |
4900 | elt = elt->first_same_value; | |
7afe21cc | 4901 | for (p = elt; p; p = p->next_same_value) |
278a83b2 | 4902 | { |
7afe21cc RK |
4903 | enum rtx_code code = GET_CODE (p->exp); |
4904 | ||
4905 | /* If the expression is not valid, ignore it. Then we do not | |
4906 | have to check for validity below. In most cases, we can use | |
4907 | `rtx_equal_p', since canonicalization has already been done. */ | |
0516f6fe | 4908 | if (code != REG && ! exp_equiv_p (p->exp, p->exp, 1, false)) |
7afe21cc RK |
4909 | continue; |
4910 | ||
5a03c8c4 RK |
4911 | /* Also skip paradoxical subregs, unless that's what we're |
4912 | looking for. */ | |
6a4bdc79 | 4913 | if (paradoxical_subreg_p (p->exp) |
5a03c8c4 RK |
4914 | && ! (src != 0 |
4915 | && GET_CODE (src) == SUBREG | |
4916 | && GET_MODE (src) == GET_MODE (p->exp) | |
4917 | && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src))) | |
4918 | < GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp)))))) | |
4919 | continue; | |
4920 | ||
278a83b2 | 4921 | if (src && GET_CODE (src) == code && rtx_equal_p (src, p->exp)) |
7afe21cc | 4922 | src = 0; |
278a83b2 | 4923 | else if (src_folded && GET_CODE (src_folded) == code |
7afe21cc RK |
4924 | && rtx_equal_p (src_folded, p->exp)) |
4925 | src_folded = 0; | |
278a83b2 | 4926 | else if (src_eqv_here && GET_CODE (src_eqv_here) == code |
7afe21cc RK |
4927 | && rtx_equal_p (src_eqv_here, p->exp)) |
4928 | src_eqv_here = 0; | |
278a83b2 | 4929 | else if (src_related && GET_CODE (src_related) == code |
7afe21cc RK |
4930 | && rtx_equal_p (src_related, p->exp)) |
4931 | src_related = 0; | |
4932 | ||
4933 | /* This is the same as the destination of the insns, we want | |
4934 | to prefer it. Copy it to src_related. The code below will | |
4935 | then give it a negative cost. */ | |
4936 | if (GET_CODE (dest) == code && rtx_equal_p (p->exp, dest)) | |
4937 | src_related = dest; | |
278a83b2 | 4938 | } |
7afe21cc RK |
4939 | |
4940 | /* Find the cheapest valid equivalent, trying all the available | |
4941 | possibilities. Prefer items not in the hash table to ones | |
4942 | that are when they are equal cost. Note that we can never | |
4943 | worsen an insn as the current contents will also succeed. | |
05c33dd8 | 4944 | If we find an equivalent identical to the destination, use it as best, |
0f41302f | 4945 | since this insn will probably be eliminated in that case. */ |
7afe21cc RK |
4946 | if (src) |
4947 | { | |
4948 | if (rtx_equal_p (src, dest)) | |
f1c1dfc3 | 4949 | src_cost = src_regcost = -1; |
7afe21cc | 4950 | else |
630c79be BS |
4951 | { |
4952 | src_cost = COST (src); | |
4953 | src_regcost = approx_reg_cost (src); | |
4954 | } | |
7afe21cc RK |
4955 | } |
4956 | ||
4957 | if (src_eqv_here) | |
4958 | { | |
4959 | if (rtx_equal_p (src_eqv_here, dest)) | |
f1c1dfc3 | 4960 | src_eqv_cost = src_eqv_regcost = -1; |
7afe21cc | 4961 | else |
630c79be BS |
4962 | { |
4963 | src_eqv_cost = COST (src_eqv_here); | |
4964 | src_eqv_regcost = approx_reg_cost (src_eqv_here); | |
4965 | } | |
7afe21cc RK |
4966 | } |
4967 | ||
4968 | if (src_folded) | |
4969 | { | |
4970 | if (rtx_equal_p (src_folded, dest)) | |
f1c1dfc3 | 4971 | src_folded_cost = src_folded_regcost = -1; |
7afe21cc | 4972 | else |
630c79be BS |
4973 | { |
4974 | src_folded_cost = COST (src_folded); | |
4975 | src_folded_regcost = approx_reg_cost (src_folded); | |
4976 | } | |
7afe21cc RK |
4977 | } |
4978 | ||
4979 | if (src_related) | |
4980 | { | |
4981 | if (rtx_equal_p (src_related, dest)) | |
f1c1dfc3 | 4982 | src_related_cost = src_related_regcost = -1; |
7afe21cc | 4983 | else |
630c79be BS |
4984 | { |
4985 | src_related_cost = COST (src_related); | |
4986 | src_related_regcost = approx_reg_cost (src_related); | |
2c5bfdf7 AN |
4987 | |
4988 | /* If a const-anchor is used to synthesize a constant that | |
4989 | normally requires multiple instructions then slightly prefer | |
4990 | it over the original sequence. These instructions are likely | |
4991 | to become redundant now. We can't compare against the cost | |
4992 | of src_eqv_here because, on MIPS for example, multi-insn | |
4993 | constants have zero cost; they are assumed to be hoisted from | |
4994 | loops. */ | |
4995 | if (src_related_is_const_anchor | |
4996 | && src_related_cost == src_cost | |
4997 | && src_eqv_here) | |
4998 | src_related_cost--; | |
630c79be | 4999 | } |
7afe21cc RK |
5000 | } |
5001 | ||
5002 | /* If this was an indirect jump insn, a known label will really be | |
5003 | cheaper even though it looks more expensive. */ | |
5004 | if (dest == pc_rtx && src_const && GET_CODE (src_const) == LABEL_REF) | |
99a9c946 | 5005 | src_folded = src_const, src_folded_cost = src_folded_regcost = -1; |
278a83b2 | 5006 | |
7afe21cc RK |
5007 | /* Terminate loop when replacement made. This must terminate since |
5008 | the current contents will be tested and will always be valid. */ | |
5009 | while (1) | |
278a83b2 KH |
5010 | { |
5011 | rtx trial; | |
7afe21cc | 5012 | |
278a83b2 | 5013 | /* Skip invalid entries. */ |
f8cfc6aa | 5014 | while (elt && !REG_P (elt->exp) |
0516f6fe | 5015 | && ! exp_equiv_p (elt->exp, elt->exp, 1, false)) |
278a83b2 | 5016 | elt = elt->next_same_value; |
5a03c8c4 RK |
5017 | |
5018 | /* A paradoxical subreg would be bad here: it'll be the right | |
5019 | size, but later may be adjusted so that the upper bits aren't | |
5020 | what we want. So reject it. */ | |
5021 | if (elt != 0 | |
6a4bdc79 | 5022 | && paradoxical_subreg_p (elt->exp) |
5a03c8c4 RK |
5023 | /* It is okay, though, if the rtx we're trying to match |
5024 | will ignore any of the bits we can't predict. */ | |
5025 | && ! (src != 0 | |
5026 | && GET_CODE (src) == SUBREG | |
5027 | && GET_MODE (src) == GET_MODE (elt->exp) | |
5028 | && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src))) | |
5029 | < GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp)))))) | |
5030 | { | |
5031 | elt = elt->next_same_value; | |
5032 | continue; | |
5033 | } | |
278a83b2 | 5034 | |
68252e27 | 5035 | if (elt) |
630c79be BS |
5036 | { |
5037 | src_elt_cost = elt->cost; | |
5038 | src_elt_regcost = elt->regcost; | |
5039 | } | |
7afe21cc | 5040 | |
68252e27 | 5041 | /* Find cheapest and skip it for the next time. For items |
7afe21cc RK |
5042 | of equal cost, use this order: |
5043 | src_folded, src, src_eqv, src_related and hash table entry. */ | |
99a9c946 | 5044 | if (src_folded |
56ae04af KH |
5045 | && preferable (src_folded_cost, src_folded_regcost, |
5046 | src_cost, src_regcost) <= 0 | |
5047 | && preferable (src_folded_cost, src_folded_regcost, | |
5048 | src_eqv_cost, src_eqv_regcost) <= 0 | |
5049 | && preferable (src_folded_cost, src_folded_regcost, | |
5050 | src_related_cost, src_related_regcost) <= 0 | |
5051 | && preferable (src_folded_cost, src_folded_regcost, | |
5052 | src_elt_cost, src_elt_regcost) <= 0) | |
7afe21cc | 5053 | { |
f1c1dfc3 | 5054 | trial = src_folded, src_folded_cost = MAX_COST; |
7afe21cc | 5055 | if (src_folded_force_flag) |
9d8de1de EB |
5056 | { |
5057 | rtx forced = force_const_mem (mode, trial); | |
5058 | if (forced) | |
5059 | trial = forced; | |
5060 | } | |
7afe21cc | 5061 | } |
99a9c946 | 5062 | else if (src |
56ae04af KH |
5063 | && preferable (src_cost, src_regcost, |
5064 | src_eqv_cost, src_eqv_regcost) <= 0 | |
5065 | && preferable (src_cost, src_regcost, | |
5066 | src_related_cost, src_related_regcost) <= 0 | |
5067 | && preferable (src_cost, src_regcost, | |
5068 | src_elt_cost, src_elt_regcost) <= 0) | |
f1c1dfc3 | 5069 | trial = src, src_cost = MAX_COST; |
99a9c946 | 5070 | else if (src_eqv_here |
56ae04af KH |
5071 | && preferable (src_eqv_cost, src_eqv_regcost, |
5072 | src_related_cost, src_related_regcost) <= 0 | |
5073 | && preferable (src_eqv_cost, src_eqv_regcost, | |
5074 | src_elt_cost, src_elt_regcost) <= 0) | |
a36b8a1e | 5075 | trial = src_eqv_here, src_eqv_cost = MAX_COST; |
99a9c946 | 5076 | else if (src_related |
56ae04af KH |
5077 | && preferable (src_related_cost, src_related_regcost, |
5078 | src_elt_cost, src_elt_regcost) <= 0) | |
a36b8a1e | 5079 | trial = src_related, src_related_cost = MAX_COST; |
278a83b2 | 5080 | else |
7afe21cc | 5081 | { |
a36b8a1e | 5082 | trial = elt->exp; |
7afe21cc | 5083 | elt = elt->next_same_value; |
f1c1dfc3 | 5084 | src_elt_cost = MAX_COST; |
7afe21cc RK |
5085 | } |
5086 | ||
2e4e39f6 AK |
5087 | /* Avoid creation of overlapping memory moves. */ |
5088 | if (MEM_P (trial) && MEM_P (SET_DEST (sets[i].rtl))) | |
5089 | { | |
5090 | rtx src, dest; | |
5091 | ||
5092 | /* BLKmode moves are not handled by cse anyway. */ | |
5093 | if (GET_MODE (trial) == BLKmode) | |
5094 | break; | |
5095 | ||
5096 | src = canon_rtx (trial); | |
5097 | dest = canon_rtx (SET_DEST (sets[i].rtl)); | |
5098 | ||
5099 | if (!MEM_P (src) || !MEM_P (dest) | |
c6ea834c | 5100 | || !nonoverlapping_memrefs_p (src, dest, false)) |
2e4e39f6 AK |
5101 | break; |
5102 | } | |
5103 | ||
b4ab701f JJ |
5104 | /* Try to optimize |
5105 | (set (reg:M N) (const_int A)) | |
5106 | (set (reg:M2 O) (const_int B)) | |
5107 | (set (zero_extract:M2 (reg:M N) (const_int C) (const_int D)) | |
5108 | (reg:M2 O)). */ | |
5109 | if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT | |
5110 | && CONST_INT_P (trial) | |
5111 | && CONST_INT_P (XEXP (SET_DEST (sets[i].rtl), 1)) | |
5112 | && CONST_INT_P (XEXP (SET_DEST (sets[i].rtl), 2)) | |
5113 | && REG_P (XEXP (SET_DEST (sets[i].rtl), 0)) | |
5511bc5a | 5114 | && (GET_MODE_PRECISION (GET_MODE (SET_DEST (sets[i].rtl))) |
b4ab701f JJ |
5115 | >= INTVAL (XEXP (SET_DEST (sets[i].rtl), 1))) |
5116 | && ((unsigned) INTVAL (XEXP (SET_DEST (sets[i].rtl), 1)) | |
5117 | + (unsigned) INTVAL (XEXP (SET_DEST (sets[i].rtl), 2)) | |
5118 | <= HOST_BITS_PER_WIDE_INT)) | |
5119 | { | |
5120 | rtx dest_reg = XEXP (SET_DEST (sets[i].rtl), 0); | |
5121 | rtx width = XEXP (SET_DEST (sets[i].rtl), 1); | |
5122 | rtx pos = XEXP (SET_DEST (sets[i].rtl), 2); | |
5123 | unsigned int dest_hash = HASH (dest_reg, GET_MODE (dest_reg)); | |
5124 | struct table_elt *dest_elt | |
5125 | = lookup (dest_reg, dest_hash, GET_MODE (dest_reg)); | |
5126 | rtx dest_cst = NULL; | |
5127 | ||
5128 | if (dest_elt) | |
5129 | for (p = dest_elt->first_same_value; p; p = p->next_same_value) | |
5130 | if (p->is_const && CONST_INT_P (p->exp)) | |
5131 | { | |
5132 | dest_cst = p->exp; | |
5133 | break; | |
5134 | } | |
5135 | if (dest_cst) | |
5136 | { | |
5137 | HOST_WIDE_INT val = INTVAL (dest_cst); | |
5138 | HOST_WIDE_INT mask; | |
5139 | unsigned int shift; | |
5140 | if (BITS_BIG_ENDIAN) | |
5511bc5a | 5141 | shift = GET_MODE_PRECISION (GET_MODE (dest_reg)) |
b4ab701f JJ |
5142 | - INTVAL (pos) - INTVAL (width); |
5143 | else | |
5144 | shift = INTVAL (pos); | |
5145 | if (INTVAL (width) == HOST_BITS_PER_WIDE_INT) | |
5146 | mask = ~(HOST_WIDE_INT) 0; | |
5147 | else | |
5148 | mask = ((HOST_WIDE_INT) 1 << INTVAL (width)) - 1; | |
5149 | val &= ~(mask << shift); | |
5150 | val |= (INTVAL (trial) & mask) << shift; | |
5151 | val = trunc_int_for_mode (val, GET_MODE (dest_reg)); | |
5152 | validate_unshare_change (insn, &SET_DEST (sets[i].rtl), | |
5153 | dest_reg, 1); | |
5154 | validate_unshare_change (insn, &SET_SRC (sets[i].rtl), | |
5155 | GEN_INT (val), 1); | |
5156 | if (apply_change_group ()) | |
5157 | { | |
5158 | rtx note = find_reg_note (insn, REG_EQUAL, NULL_RTX); | |
5159 | if (note) | |
5160 | { | |
5161 | remove_note (insn, note); | |
5162 | df_notes_rescan (insn); | |
5163 | } | |
5164 | src_eqv = NULL_RTX; | |
5165 | src_eqv_elt = NULL; | |
5166 | src_eqv_volatile = 0; | |
5167 | src_eqv_in_memory = 0; | |
5168 | src_eqv_hash = 0; | |
5169 | repeat = true; | |
5170 | break; | |
5171 | } | |
5172 | } | |
5173 | } | |
5174 | ||
7afe21cc RK |
5175 | /* We don't normally have an insn matching (set (pc) (pc)), so |
5176 | check for this separately here. We will delete such an | |
5177 | insn below. | |
5178 | ||
d466c016 JL |
5179 | For other cases such as a table jump or conditional jump |
5180 | where we know the ultimate target, go ahead and replace the | |
5181 | operand. While that may not make a valid insn, we will | |
5182 | reemit the jump below (and also insert any necessary | |
5183 | barriers). */ | |
7afe21cc RK |
5184 | if (n_sets == 1 && dest == pc_rtx |
5185 | && (trial == pc_rtx | |
5186 | || (GET_CODE (trial) == LABEL_REF | |
5187 | && ! condjump_p (insn)))) | |
5188 | { | |
2f39b6ca UW |
5189 | /* Don't substitute non-local labels, this confuses CFG. */ |
5190 | if (GET_CODE (trial) == LABEL_REF | |
5191 | && LABEL_REF_NONLOCAL_P (trial)) | |
5192 | continue; | |
5193 | ||
d466c016 | 5194 | SET_SRC (sets[i].rtl) = trial; |
2aac3a01 | 5195 | cse_jumps_altered = true; |
7afe21cc RK |
5196 | break; |
5197 | } | |
278a83b2 | 5198 | |
1ef6855c KH |
5199 | /* Reject certain invalid forms of CONST that we create. */ |
5200 | else if (CONSTANT_P (trial) | |
5201 | && GET_CODE (trial) == CONST | |
5202 | /* Reject cases that will cause decode_rtx_const to | |
5203 | die. On the alpha when simplifying a switch, we | |
5204 | get (const (truncate (minus (label_ref) | |
5205 | (label_ref)))). */ | |
5206 | && (GET_CODE (XEXP (trial, 0)) == TRUNCATE | |
5207 | /* Likewise on IA-64, except without the | |
5208 | truncate. */ | |
5209 | || (GET_CODE (XEXP (trial, 0)) == MINUS | |
5210 | && GET_CODE (XEXP (XEXP (trial, 0), 0)) == LABEL_REF | |
5211 | && GET_CODE (XEXP (XEXP (trial, 0), 1)) == LABEL_REF))) | |
5212 | /* Do nothing for this case. */ | |
5213 | ; | |
5214 | ||
7afe21cc | 5215 | /* Look for a substitution that makes a valid insn. */ |
d241cd48 JH |
5216 | else if (validate_unshare_change |
5217 | (insn, &SET_SRC (sets[i].rtl), trial, 0)) | |
05c33dd8 | 5218 | { |
32e9fa48 | 5219 | rtx new_rtx = canon_reg (SET_SRC (sets[i].rtl), insn); |
dbaff908 | 5220 | |
7722328e RK |
5221 | /* The result of apply_change_group can be ignored; see |
5222 | canon_reg. */ | |
5223 | ||
32e9fa48 | 5224 | validate_change (insn, &SET_SRC (sets[i].rtl), new_rtx, 1); |
6702af89 | 5225 | apply_change_group (); |
932ad4d9 | 5226 | |
05c33dd8 RK |
5227 | break; |
5228 | } | |
7afe21cc | 5229 | |
278a83b2 | 5230 | /* If we previously found constant pool entries for |
7afe21cc RK |
5231 | constants and this is a constant, try making a |
5232 | pool entry. Put it in src_folded unless we already have done | |
5233 | this since that is where it likely came from. */ | |
5234 | ||
5235 | else if (constant_pool_entries_cost | |
5236 | && CONSTANT_P (trial) | |
1bbd065b | 5237 | && (src_folded == 0 |
3c0cb5de | 5238 | || (!MEM_P (src_folded) |
1bbd065b | 5239 | && ! src_folded_force_flag)) |
9ae8ffe7 JL |
5240 | && GET_MODE_CLASS (mode) != MODE_CC |
5241 | && mode != VOIDmode) | |
7afe21cc RK |
5242 | { |
5243 | src_folded_force_flag = 1; | |
5244 | src_folded = trial; | |
5245 | src_folded_cost = constant_pool_entries_cost; | |
dd0ba281 | 5246 | src_folded_regcost = constant_pool_entries_regcost; |
7afe21cc | 5247 | } |
278a83b2 | 5248 | } |
7afe21cc | 5249 | |
b4ab701f JJ |
5250 | /* If we changed the insn too much, handle this set from scratch. */ |
5251 | if (repeat) | |
5252 | { | |
5253 | i--; | |
5254 | continue; | |
5255 | } | |
5256 | ||
7afe21cc RK |
5257 | src = SET_SRC (sets[i].rtl); |
5258 | ||
5259 | /* In general, it is good to have a SET with SET_SRC == SET_DEST. | |
5260 | However, there is an important exception: If both are registers | |
5261 | that are not the head of their equivalence class, replace SET_SRC | |
5262 | with the head of the class. If we do not do this, we will have | |
5263 | both registers live over a portion of the basic block. This way, | |
5264 | their lifetimes will likely abut instead of overlapping. */ | |
f8cfc6aa | 5265 | if (REG_P (dest) |
1bb98cec | 5266 | && REGNO_QTY_VALID_P (REGNO (dest))) |
7afe21cc | 5267 | { |
1bb98cec DM |
5268 | int dest_q = REG_QTY (REGNO (dest)); |
5269 | struct qty_table_elem *dest_ent = &qty_table[dest_q]; | |
5270 | ||
5271 | if (dest_ent->mode == GET_MODE (dest) | |
5272 | && dest_ent->first_reg != REGNO (dest) | |
f8cfc6aa | 5273 | && REG_P (src) && REGNO (src) == REGNO (dest) |
1bb98cec DM |
5274 | /* Don't do this if the original insn had a hard reg as |
5275 | SET_SRC or SET_DEST. */ | |
f8cfc6aa | 5276 | && (!REG_P (sets[i].src) |
1bb98cec | 5277 | || REGNO (sets[i].src) >= FIRST_PSEUDO_REGISTER) |
f8cfc6aa | 5278 | && (!REG_P (dest) || REGNO (dest) >= FIRST_PSEUDO_REGISTER)) |
1bb98cec DM |
5279 | /* We can't call canon_reg here because it won't do anything if |
5280 | SRC is a hard register. */ | |
759bd8b7 | 5281 | { |
1bb98cec DM |
5282 | int src_q = REG_QTY (REGNO (src)); |
5283 | struct qty_table_elem *src_ent = &qty_table[src_q]; | |
5284 | int first = src_ent->first_reg; | |
5285 | rtx new_src | |
5286 | = (first >= FIRST_PSEUDO_REGISTER | |
5287 | ? regno_reg_rtx[first] : gen_rtx_REG (GET_MODE (src), first)); | |
5288 | ||
5289 | /* We must use validate-change even for this, because this | |
5290 | might be a special no-op instruction, suitable only to | |
5291 | tag notes onto. */ | |
5292 | if (validate_change (insn, &SET_SRC (sets[i].rtl), new_src, 0)) | |
5293 | { | |
5294 | src = new_src; | |
5295 | /* If we had a constant that is cheaper than what we are now | |
5296 | setting SRC to, use that constant. We ignored it when we | |
5297 | thought we could make this into a no-op. */ | |
5298 | if (src_const && COST (src_const) < COST (src) | |
278a83b2 KH |
5299 | && validate_change (insn, &SET_SRC (sets[i].rtl), |
5300 | src_const, 0)) | |
1bb98cec DM |
5301 | src = src_const; |
5302 | } | |
759bd8b7 | 5303 | } |
7afe21cc RK |
5304 | } |
5305 | ||
5306 | /* If we made a change, recompute SRC values. */ | |
5307 | if (src != sets[i].src) | |
278a83b2 | 5308 | { |
278a83b2 KH |
5309 | do_not_record = 0; |
5310 | hash_arg_in_memory = 0; | |
7afe21cc | 5311 | sets[i].src = src; |
278a83b2 KH |
5312 | sets[i].src_hash = HASH (src, mode); |
5313 | sets[i].src_volatile = do_not_record; | |
5314 | sets[i].src_in_memory = hash_arg_in_memory; | |
5315 | sets[i].src_elt = lookup (src, sets[i].src_hash, mode); | |
5316 | } | |
7afe21cc RK |
5317 | |
5318 | /* If this is a single SET, we are setting a register, and we have an | |
73dd3123 EB |
5319 | equivalent constant, we want to add a REG_EQUAL note if the constant |
5320 | is different from the source. We don't want to do it for a constant | |
5321 | pseudo since verifying that this pseudo hasn't been eliminated is a | |
5322 | pain; moreover such a note won't help anything. | |
ac7ef8d5 FS |
5323 | |
5324 | Avoid a REG_EQUAL note for (CONST (MINUS (LABEL_REF) (LABEL_REF))) | |
5325 | which can be created for a reference to a compile time computable | |
5326 | entry in a jump table. */ | |
73dd3123 EB |
5327 | if (n_sets == 1 |
5328 | && REG_P (dest) | |
5329 | && src_const | |
f8cfc6aa | 5330 | && !REG_P (src_const) |
73dd3123 EB |
5331 | && !(GET_CODE (src_const) == SUBREG |
5332 | && REG_P (SUBREG_REG (src_const))) | |
5333 | && !(GET_CODE (src_const) == CONST | |
5334 | && GET_CODE (XEXP (src_const, 0)) == MINUS | |
5335 | && GET_CODE (XEXP (XEXP (src_const, 0), 0)) == LABEL_REF | |
5336 | && GET_CODE (XEXP (XEXP (src_const, 0), 1)) == LABEL_REF) | |
5337 | && !rtx_equal_p (src, src_const)) | |
7afe21cc | 5338 | { |
73dd3123 EB |
5339 | /* Make sure that the rtx is not shared. */ |
5340 | src_const = copy_rtx (src_const); | |
51e2a951 | 5341 | |
73dd3123 EB |
5342 | /* Record the actual constant value in a REG_EQUAL note, |
5343 | making a new one if one does not already exist. */ | |
5344 | set_unique_reg_note (insn, REG_EQUAL, src_const); | |
5345 | df_notes_rescan (insn); | |
7afe21cc RK |
5346 | } |
5347 | ||
5348 | /* Now deal with the destination. */ | |
5349 | do_not_record = 0; | |
7afe21cc | 5350 | |
46d096a3 SB |
5351 | /* Look within any ZERO_EXTRACT to the MEM or REG within it. */ |
5352 | while (GET_CODE (dest) == SUBREG | |
7afe21cc | 5353 | || GET_CODE (dest) == ZERO_EXTRACT |
7afe21cc | 5354 | || GET_CODE (dest) == STRICT_LOW_PART) |
0339ce7e | 5355 | dest = XEXP (dest, 0); |
7afe21cc RK |
5356 | |
5357 | sets[i].inner_dest = dest; | |
5358 | ||
3c0cb5de | 5359 | if (MEM_P (dest)) |
7afe21cc | 5360 | { |
9ae8ffe7 JL |
5361 | #ifdef PUSH_ROUNDING |
5362 | /* Stack pushes invalidate the stack pointer. */ | |
5363 | rtx addr = XEXP (dest, 0); | |
ec8e098d | 5364 | if (GET_RTX_CLASS (GET_CODE (addr)) == RTX_AUTOINC |
9ae8ffe7 | 5365 | && XEXP (addr, 0) == stack_pointer_rtx) |
524e3576 | 5366 | invalidate (stack_pointer_rtx, VOIDmode); |
9ae8ffe7 | 5367 | #endif |
7afe21cc | 5368 | dest = fold_rtx (dest, insn); |
7afe21cc RK |
5369 | } |
5370 | ||
5371 | /* Compute the hash code of the destination now, | |
5372 | before the effects of this instruction are recorded, | |
5373 | since the register values used in the address computation | |
5374 | are those before this instruction. */ | |
2197a88a | 5375 | sets[i].dest_hash = HASH (dest, mode); |
7afe21cc RK |
5376 | |
5377 | /* Don't enter a bit-field in the hash table | |
5378 | because the value in it after the store | |
5379 | may not equal what was stored, due to truncation. */ | |
5380 | ||
46d096a3 | 5381 | if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT) |
7afe21cc RK |
5382 | { |
5383 | rtx width = XEXP (SET_DEST (sets[i].rtl), 1); | |
5384 | ||
481683e1 SZ |
5385 | if (src_const != 0 && CONST_INT_P (src_const) |
5386 | && CONST_INT_P (width) | |
906c4e36 RK |
5387 | && INTVAL (width) < HOST_BITS_PER_WIDE_INT |
5388 | && ! (INTVAL (src_const) | |
0cadbfaa | 5389 | & (HOST_WIDE_INT_M1U << INTVAL (width)))) |
7afe21cc RK |
5390 | /* Exception: if the value is constant, |
5391 | and it won't be truncated, record it. */ | |
5392 | ; | |
5393 | else | |
5394 | { | |
5395 | /* This is chosen so that the destination will be invalidated | |
5396 | but no new value will be recorded. | |
5397 | We must invalidate because sometimes constant | |
5398 | values can be recorded for bitfields. */ | |
5399 | sets[i].src_elt = 0; | |
5400 | sets[i].src_volatile = 1; | |
5401 | src_eqv = 0; | |
5402 | src_eqv_elt = 0; | |
5403 | } | |
5404 | } | |
5405 | ||
5406 | /* If only one set in a JUMP_INSN and it is now a no-op, we can delete | |
5407 | the insn. */ | |
5408 | else if (n_sets == 1 && dest == pc_rtx && src == pc_rtx) | |
5409 | { | |
ef178af3 | 5410 | /* One less use of the label this insn used to jump to. */ |
0129d079 | 5411 | delete_insn_and_edges (insn); |
2aac3a01 | 5412 | cse_jumps_altered = true; |
7afe21cc RK |
5413 | /* No more processing for this set. */ |
5414 | sets[i].rtl = 0; | |
5415 | } | |
5416 | ||
5417 | /* If this SET is now setting PC to a label, we know it used to | |
d466c016 | 5418 | be a conditional or computed branch. */ |
8f235343 JH |
5419 | else if (dest == pc_rtx && GET_CODE (src) == LABEL_REF |
5420 | && !LABEL_REF_NONLOCAL_P (src)) | |
7afe21cc | 5421 | { |
d466c016 JL |
5422 | /* We reemit the jump in as many cases as possible just in |
5423 | case the form of an unconditional jump is significantly | |
5424 | different than a computed jump or conditional jump. | |
5425 | ||
5426 | If this insn has multiple sets, then reemitting the | |
5427 | jump is nontrivial. So instead we just force rerecognition | |
5428 | and hope for the best. */ | |
5429 | if (n_sets == 1) | |
7afe21cc | 5430 | { |
32e9fa48 | 5431 | rtx new_rtx, note; |
8fb1e50e | 5432 | |
32e9fa48 KG |
5433 | new_rtx = emit_jump_insn_before (gen_jump (XEXP (src, 0)), insn); |
5434 | JUMP_LABEL (new_rtx) = XEXP (src, 0); | |
7afe21cc | 5435 | LABEL_NUSES (XEXP (src, 0))++; |
9dcb4381 RH |
5436 | |
5437 | /* Make sure to copy over REG_NON_LOCAL_GOTO. */ | |
5438 | note = find_reg_note (insn, REG_NON_LOCAL_GOTO, 0); | |
5439 | if (note) | |
5440 | { | |
5441 | XEXP (note, 1) = NULL_RTX; | |
32e9fa48 | 5442 | REG_NOTES (new_rtx) = note; |
9dcb4381 RH |
5443 | } |
5444 | ||
0129d079 | 5445 | delete_insn_and_edges (insn); |
32e9fa48 | 5446 | insn = new_rtx; |
7afe21cc | 5447 | } |
31dcf83f | 5448 | else |
31dcf83f | 5449 | INSN_CODE (insn) = -1; |
7afe21cc | 5450 | |
2aac3a01 EB |
5451 | /* Do not bother deleting any unreachable code, let jump do it. */ |
5452 | cse_jumps_altered = true; | |
7afe21cc RK |
5453 | sets[i].rtl = 0; |
5454 | } | |
5455 | ||
c2a47e48 RK |
5456 | /* If destination is volatile, invalidate it and then do no further |
5457 | processing for this assignment. */ | |
7afe21cc RK |
5458 | |
5459 | else if (do_not_record) | |
c2a47e48 | 5460 | { |
f8cfc6aa | 5461 | if (REG_P (dest) || GET_CODE (dest) == SUBREG) |
bb4034b3 | 5462 | invalidate (dest, VOIDmode); |
3c0cb5de | 5463 | else if (MEM_P (dest)) |
32fab725 | 5464 | invalidate (dest, VOIDmode); |
2708da92 RS |
5465 | else if (GET_CODE (dest) == STRICT_LOW_PART |
5466 | || GET_CODE (dest) == ZERO_EXTRACT) | |
bb4034b3 | 5467 | invalidate (XEXP (dest, 0), GET_MODE (dest)); |
c2a47e48 RK |
5468 | sets[i].rtl = 0; |
5469 | } | |
7afe21cc RK |
5470 | |
5471 | if (sets[i].rtl != 0 && dest != SET_DEST (sets[i].rtl)) | |
2197a88a | 5472 | sets[i].dest_hash = HASH (SET_DEST (sets[i].rtl), mode); |
7afe21cc RK |
5473 | |
5474 | #ifdef HAVE_cc0 | |
5475 | /* If setting CC0, record what it was set to, or a constant, if it | |
5476 | is equivalent to a constant. If it is being set to a floating-point | |
5477 | value, make a COMPARE with the appropriate constant of 0. If we | |
5478 | don't do this, later code can interpret this as a test against | |
5479 | const0_rtx, which can cause problems if we try to put it into an | |
5480 | insn as a floating-point operand. */ | |
5481 | if (dest == cc0_rtx) | |
5482 | { | |
5483 | this_insn_cc0 = src_const && mode != VOIDmode ? src_const : src; | |
5484 | this_insn_cc0_mode = mode; | |
cbf6a543 | 5485 | if (FLOAT_MODE_P (mode)) |
38a448ca RH |
5486 | this_insn_cc0 = gen_rtx_COMPARE (VOIDmode, this_insn_cc0, |
5487 | CONST0_RTX (mode)); | |
7afe21cc RK |
5488 | } |
5489 | #endif | |
5490 | } | |
5491 | ||
5492 | /* Now enter all non-volatile source expressions in the hash table | |
5493 | if they are not already present. | |
5494 | Record their equivalence classes in src_elt. | |
5495 | This way we can insert the corresponding destinations into | |
5496 | the same classes even if the actual sources are no longer in them | |
5497 | (having been invalidated). */ | |
5498 | ||
5499 | if (src_eqv && src_eqv_elt == 0 && sets[0].rtl != 0 && ! src_eqv_volatile | |
5500 | && ! rtx_equal_p (src_eqv, SET_DEST (sets[0].rtl))) | |
5501 | { | |
b3694847 SS |
5502 | struct table_elt *elt; |
5503 | struct table_elt *classp = sets[0].src_elt; | |
7afe21cc RK |
5504 | rtx dest = SET_DEST (sets[0].rtl); |
5505 | enum machine_mode eqvmode = GET_MODE (dest); | |
5506 | ||
5507 | if (GET_CODE (dest) == STRICT_LOW_PART) | |
5508 | { | |
5509 | eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0))); | |
5510 | classp = 0; | |
5511 | } | |
5512 | if (insert_regs (src_eqv, classp, 0)) | |
8ae2b8f6 JW |
5513 | { |
5514 | rehash_using_reg (src_eqv); | |
5515 | src_eqv_hash = HASH (src_eqv, eqvmode); | |
5516 | } | |
2197a88a | 5517 | elt = insert (src_eqv, classp, src_eqv_hash, eqvmode); |
7afe21cc | 5518 | elt->in_memory = src_eqv_in_memory; |
7afe21cc | 5519 | src_eqv_elt = elt; |
f7911249 JW |
5520 | |
5521 | /* Check to see if src_eqv_elt is the same as a set source which | |
5522 | does not yet have an elt, and if so set the elt of the set source | |
5523 | to src_eqv_elt. */ | |
5524 | for (i = 0; i < n_sets; i++) | |
26132f71 JW |
5525 | if (sets[i].rtl && sets[i].src_elt == 0 |
5526 | && rtx_equal_p (SET_SRC (sets[i].rtl), src_eqv)) | |
f7911249 | 5527 | sets[i].src_elt = src_eqv_elt; |
7afe21cc RK |
5528 | } |
5529 | ||
5530 | for (i = 0; i < n_sets; i++) | |
5531 | if (sets[i].rtl && ! sets[i].src_volatile | |
5532 | && ! rtx_equal_p (SET_SRC (sets[i].rtl), SET_DEST (sets[i].rtl))) | |
5533 | { | |
5534 | if (GET_CODE (SET_DEST (sets[i].rtl)) == STRICT_LOW_PART) | |
5535 | { | |
5536 | /* REG_EQUAL in setting a STRICT_LOW_PART | |
5537 | gives an equivalent for the entire destination register, | |
5538 | not just for the subreg being stored in now. | |
5539 | This is a more interesting equivalence, so we arrange later | |
5540 | to treat the entire reg as the destination. */ | |
5541 | sets[i].src_elt = src_eqv_elt; | |
2197a88a | 5542 | sets[i].src_hash = src_eqv_hash; |
7afe21cc RK |
5543 | } |
5544 | else | |
5545 | { | |
5546 | /* Insert source and constant equivalent into hash table, if not | |
5547 | already present. */ | |
b3694847 SS |
5548 | struct table_elt *classp = src_eqv_elt; |
5549 | rtx src = sets[i].src; | |
5550 | rtx dest = SET_DEST (sets[i].rtl); | |
7afe21cc RK |
5551 | enum machine_mode mode |
5552 | = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src); | |
5553 | ||
1fcc57f1 AM |
5554 | /* It's possible that we have a source value known to be |
5555 | constant but don't have a REG_EQUAL note on the insn. | |
5556 | Lack of a note will mean src_eqv_elt will be NULL. This | |
5557 | can happen where we've generated a SUBREG to access a | |
5558 | CONST_INT that is already in a register in a wider mode. | |
5559 | Ensure that the source expression is put in the proper | |
5560 | constant class. */ | |
5561 | if (!classp) | |
5562 | classp = sets[i].src_const_elt; | |
5563 | ||
26132f71 | 5564 | if (sets[i].src_elt == 0) |
7afe21cc | 5565 | { |
4a8cae83 | 5566 | struct table_elt *elt; |
26132f71 | 5567 | |
4a8cae83 SB |
5568 | /* Note that these insert_regs calls cannot remove |
5569 | any of the src_elt's, because they would have failed to | |
5570 | match if not still valid. */ | |
5571 | if (insert_regs (src, classp, 0)) | |
5572 | { | |
5573 | rehash_using_reg (src); | |
5574 | sets[i].src_hash = HASH (src, mode); | |
8ae2b8f6 | 5575 | } |
4a8cae83 SB |
5576 | elt = insert (src, classp, sets[i].src_hash, mode); |
5577 | elt->in_memory = sets[i].src_in_memory; | |
5578 | sets[i].src_elt = classp = elt; | |
7afe21cc | 5579 | } |
7afe21cc RK |
5580 | if (sets[i].src_const && sets[i].src_const_elt == 0 |
5581 | && src != sets[i].src_const | |
5582 | && ! rtx_equal_p (sets[i].src_const, src)) | |
5583 | sets[i].src_elt = insert (sets[i].src_const, classp, | |
2197a88a | 5584 | sets[i].src_const_hash, mode); |
7afe21cc RK |
5585 | } |
5586 | } | |
5587 | else if (sets[i].src_elt == 0) | |
5588 | /* If we did not insert the source into the hash table (e.g., it was | |
5589 | volatile), note the equivalence class for the REG_EQUAL value, if any, | |
5590 | so that the destination goes into that class. */ | |
5591 | sets[i].src_elt = src_eqv_elt; | |
5592 | ||
05c433f3 PB |
5593 | /* Record destination addresses in the hash table. This allows us to |
5594 | check if they are invalidated by other sets. */ | |
5595 | for (i = 0; i < n_sets; i++) | |
5596 | { | |
5597 | if (sets[i].rtl) | |
5598 | { | |
5599 | rtx x = sets[i].inner_dest; | |
5600 | struct table_elt *elt; | |
5601 | enum machine_mode mode; | |
5602 | unsigned hash; | |
5603 | ||
5604 | if (MEM_P (x)) | |
5605 | { | |
5606 | x = XEXP (x, 0); | |
5607 | mode = GET_MODE (x); | |
5608 | hash = HASH (x, mode); | |
5609 | elt = lookup (x, hash, mode); | |
5610 | if (!elt) | |
5611 | { | |
5612 | if (insert_regs (x, NULL, 0)) | |
5613 | { | |
7e7e28c7 AO |
5614 | rtx dest = SET_DEST (sets[i].rtl); |
5615 | ||
05c433f3 PB |
5616 | rehash_using_reg (x); |
5617 | hash = HASH (x, mode); | |
7e7e28c7 | 5618 | sets[i].dest_hash = HASH (dest, GET_MODE (dest)); |
05c433f3 PB |
5619 | } |
5620 | elt = insert (x, NULL, hash, mode); | |
5621 | } | |
5622 | ||
5623 | sets[i].dest_addr_elt = elt; | |
5624 | } | |
5625 | else | |
5626 | sets[i].dest_addr_elt = NULL; | |
5627 | } | |
5628 | } | |
5629 | ||
7b02f4e0 | 5630 | invalidate_from_clobbers (insn); |
77fa0940 | 5631 | |
278a83b2 | 5632 | /* Some registers are invalidated by subroutine calls. Memory is |
77fa0940 RK |
5633 | invalidated by non-constant calls. */ |
5634 | ||
4b4bf941 | 5635 | if (CALL_P (insn)) |
7afe21cc | 5636 | { |
becfd6e5 | 5637 | if (!(RTL_CONST_OR_PURE_CALL_P (insn))) |
9ae8ffe7 | 5638 | invalidate_memory (); |
7afe21cc RK |
5639 | invalidate_for_call (); |
5640 | } | |
5641 | ||
5642 | /* Now invalidate everything set by this instruction. | |
5643 | If a SUBREG or other funny destination is being set, | |
5644 | sets[i].rtl is still nonzero, so here we invalidate the reg | |
5645 | a part of which is being set. */ | |
5646 | ||
5647 | for (i = 0; i < n_sets; i++) | |
5648 | if (sets[i].rtl) | |
5649 | { | |
bb4034b3 JW |
5650 | /* We can't use the inner dest, because the mode associated with |
5651 | a ZERO_EXTRACT is significant. */ | |
b3694847 | 5652 | rtx dest = SET_DEST (sets[i].rtl); |
7afe21cc RK |
5653 | |
5654 | /* Needed for registers to remove the register from its | |
5655 | previous quantity's chain. | |
5656 | Needed for memory if this is a nonvarying address, unless | |
5657 | we have just done an invalidate_memory that covers even those. */ | |
f8cfc6aa | 5658 | if (REG_P (dest) || GET_CODE (dest) == SUBREG) |
bb4034b3 | 5659 | invalidate (dest, VOIDmode); |
3c0cb5de | 5660 | else if (MEM_P (dest)) |
32fab725 | 5661 | invalidate (dest, VOIDmode); |
2708da92 RS |
5662 | else if (GET_CODE (dest) == STRICT_LOW_PART |
5663 | || GET_CODE (dest) == ZERO_EXTRACT) | |
bb4034b3 | 5664 | invalidate (XEXP (dest, 0), GET_MODE (dest)); |
7afe21cc RK |
5665 | } |
5666 | ||
adddc347 | 5667 | /* A volatile ASM or an UNSPEC_VOLATILE invalidates everything. */ |
4b4bf941 | 5668 | if (NONJUMP_INSN_P (insn) |
adddc347 | 5669 | && volatile_insn_p (PATTERN (insn))) |
01e752d3 JL |
5670 | flush_hash_table (); |
5671 | ||
932ad4d9 SB |
5672 | /* Don't cse over a call to setjmp; on some machines (eg VAX) |
5673 | the regs restored by the longjmp come from a later time | |
5674 | than the setjmp. */ | |
5675 | if (CALL_P (insn) && find_reg_note (insn, REG_SETJMP, NULL)) | |
5676 | { | |
5677 | flush_hash_table (); | |
5678 | goto done; | |
5679 | } | |
5680 | ||
7afe21cc RK |
5681 | /* Make sure registers mentioned in destinations |
5682 | are safe for use in an expression to be inserted. | |
5683 | This removes from the hash table | |
5684 | any invalid entry that refers to one of these registers. | |
5685 | ||
5686 | We don't care about the return value from mention_regs because | |
5687 | we are going to hash the SET_DEST values unconditionally. */ | |
5688 | ||
5689 | for (i = 0; i < n_sets; i++) | |
34c73909 R |
5690 | { |
5691 | if (sets[i].rtl) | |
5692 | { | |
5693 | rtx x = SET_DEST (sets[i].rtl); | |
5694 | ||
f8cfc6aa | 5695 | if (!REG_P (x)) |
34c73909 R |
5696 | mention_regs (x); |
5697 | else | |
5698 | { | |
5699 | /* We used to rely on all references to a register becoming | |
5700 | inaccessible when a register changes to a new quantity, | |
5701 | since that changes the hash code. However, that is not | |
9b1549b8 | 5702 | safe, since after HASH_SIZE new quantities we get a |
34c73909 R |
5703 | hash 'collision' of a register with its own invalid |
5704 | entries. And since SUBREGs have been changed not to | |
5705 | change their hash code with the hash code of the register, | |
5706 | it wouldn't work any longer at all. So we have to check | |
5707 | for any invalid references lying around now. | |
5708 | This code is similar to the REG case in mention_regs, | |
5709 | but it knows that reg_tick has been incremented, and | |
5710 | it leaves reg_in_table as -1 . */ | |
770ae6cc | 5711 | unsigned int regno = REGNO (x); |
09e18274 | 5712 | unsigned int endregno = END_REGNO (x); |
770ae6cc | 5713 | unsigned int i; |
34c73909 R |
5714 | |
5715 | for (i = regno; i < endregno; i++) | |
5716 | { | |
30f72379 | 5717 | if (REG_IN_TABLE (i) >= 0) |
34c73909 R |
5718 | { |
5719 | remove_invalid_refs (i); | |
30f72379 | 5720 | REG_IN_TABLE (i) = -1; |
34c73909 R |
5721 | } |
5722 | } | |
5723 | } | |
5724 | } | |
5725 | } | |
7afe21cc RK |
5726 | |
5727 | /* We may have just removed some of the src_elt's from the hash table. | |
05c433f3 PB |
5728 | So replace each one with the current head of the same class. |
5729 | Also check if destination addresses have been removed. */ | |
7afe21cc RK |
5730 | |
5731 | for (i = 0; i < n_sets; i++) | |
5732 | if (sets[i].rtl) | |
5733 | { | |
05c433f3 PB |
5734 | if (sets[i].dest_addr_elt |
5735 | && sets[i].dest_addr_elt->first_same_value == 0) | |
5736 | { | |
e67b81d1 | 5737 | /* The elt was removed, which means this destination is not |
05c433f3 PB |
5738 | valid after this instruction. */ |
5739 | sets[i].rtl = NULL_RTX; | |
5740 | } | |
5741 | else if (sets[i].src_elt && sets[i].src_elt->first_same_value == 0) | |
7afe21cc RK |
5742 | /* If elt was removed, find current head of same class, |
5743 | or 0 if nothing remains of that class. */ | |
5744 | { | |
b3694847 | 5745 | struct table_elt *elt = sets[i].src_elt; |
7afe21cc RK |
5746 | |
5747 | while (elt && elt->prev_same_value) | |
5748 | elt = elt->prev_same_value; | |
5749 | ||
5750 | while (elt && elt->first_same_value == 0) | |
5751 | elt = elt->next_same_value; | |
5752 | sets[i].src_elt = elt ? elt->first_same_value : 0; | |
5753 | } | |
5754 | } | |
5755 | ||
5756 | /* Now insert the destinations into their equivalence classes. */ | |
5757 | ||
5758 | for (i = 0; i < n_sets; i++) | |
5759 | if (sets[i].rtl) | |
5760 | { | |
b3694847 | 5761 | rtx dest = SET_DEST (sets[i].rtl); |
b3694847 | 5762 | struct table_elt *elt; |
7afe21cc RK |
5763 | |
5764 | /* Don't record value if we are not supposed to risk allocating | |
5765 | floating-point values in registers that might be wider than | |
5766 | memory. */ | |
5767 | if ((flag_float_store | |
3c0cb5de | 5768 | && MEM_P (dest) |
cbf6a543 | 5769 | && FLOAT_MODE_P (GET_MODE (dest))) |
bc4ddc77 JW |
5770 | /* Don't record BLKmode values, because we don't know the |
5771 | size of it, and can't be sure that other BLKmode values | |
5772 | have the same or smaller size. */ | |
5773 | || GET_MODE (dest) == BLKmode | |
7afe21cc RK |
5774 | /* If we didn't put a REG_EQUAL value or a source into the hash |
5775 | table, there is no point is recording DEST. */ | |
1a8e9a8e RK |
5776 | || sets[i].src_elt == 0 |
5777 | /* If DEST is a paradoxical SUBREG and SRC is a ZERO_EXTEND | |
5778 | or SIGN_EXTEND, don't record DEST since it can cause | |
5779 | some tracking to be wrong. | |
5780 | ||
5781 | ??? Think about this more later. */ | |
6a4bdc79 | 5782 | || (paradoxical_subreg_p (dest) |
1a8e9a8e RK |
5783 | && (GET_CODE (sets[i].src) == SIGN_EXTEND |
5784 | || GET_CODE (sets[i].src) == ZERO_EXTEND))) | |
7afe21cc RK |
5785 | continue; |
5786 | ||
5787 | /* STRICT_LOW_PART isn't part of the value BEING set, | |
5788 | and neither is the SUBREG inside it. | |
5789 | Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */ | |
5790 | if (GET_CODE (dest) == STRICT_LOW_PART) | |
5791 | dest = SUBREG_REG (XEXP (dest, 0)); | |
5792 | ||
f8cfc6aa | 5793 | if (REG_P (dest) || GET_CODE (dest) == SUBREG) |
7afe21cc RK |
5794 | /* Registers must also be inserted into chains for quantities. */ |
5795 | if (insert_regs (dest, sets[i].src_elt, 1)) | |
8ae2b8f6 JW |
5796 | { |
5797 | /* If `insert_regs' changes something, the hash code must be | |
5798 | recalculated. */ | |
5799 | rehash_using_reg (dest); | |
5800 | sets[i].dest_hash = HASH (dest, GET_MODE (dest)); | |
5801 | } | |
7afe21cc | 5802 | |
8fff4fc1 RH |
5803 | elt = insert (dest, sets[i].src_elt, |
5804 | sets[i].dest_hash, GET_MODE (dest)); | |
9de2c71a | 5805 | |
2c5bfdf7 AN |
5806 | /* If this is a constant, insert the constant anchors with the |
5807 | equivalent register-offset expressions using register DEST. */ | |
5808 | if (targetm.const_anchor | |
5809 | && REG_P (dest) | |
5810 | && SCALAR_INT_MODE_P (GET_MODE (dest)) | |
5811 | && GET_CODE (sets[i].src_elt->exp) == CONST_INT) | |
5812 | insert_const_anchors (dest, sets[i].src_elt->exp, GET_MODE (dest)); | |
5813 | ||
3c0cb5de | 5814 | elt->in_memory = (MEM_P (sets[i].inner_dest) |
389fdba0 | 5815 | && !MEM_READONLY_P (sets[i].inner_dest)); |
c256df0b | 5816 | |
fc3ffe83 RK |
5817 | /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no |
5818 | narrower than M2, and both M1 and M2 are the same number of words, | |
5819 | we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so | |
5820 | make that equivalence as well. | |
7afe21cc | 5821 | |
4de249d9 PB |
5822 | However, BAR may have equivalences for which gen_lowpart |
5823 | will produce a simpler value than gen_lowpart applied to | |
7afe21cc | 5824 | BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all |
278a83b2 | 5825 | BAR's equivalences. If we don't get a simplified form, make |
7afe21cc RK |
5826 | the SUBREG. It will not be used in an equivalence, but will |
5827 | cause two similar assignments to be detected. | |
5828 | ||
5829 | Note the loop below will find SUBREG_REG (DEST) since we have | |
5830 | already entered SRC and DEST of the SET in the table. */ | |
5831 | ||
5832 | if (GET_CODE (dest) == SUBREG | |
6cdbaec4 RK |
5833 | && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) - 1) |
5834 | / UNITS_PER_WORD) | |
278a83b2 | 5835 | == (GET_MODE_SIZE (GET_MODE (dest)) - 1) / UNITS_PER_WORD) |
7afe21cc RK |
5836 | && (GET_MODE_SIZE (GET_MODE (dest)) |
5837 | >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest)))) | |
5838 | && sets[i].src_elt != 0) | |
5839 | { | |
5840 | enum machine_mode new_mode = GET_MODE (SUBREG_REG (dest)); | |
5841 | struct table_elt *elt, *classp = 0; | |
5842 | ||
5843 | for (elt = sets[i].src_elt->first_same_value; elt; | |
5844 | elt = elt->next_same_value) | |
5845 | { | |
5846 | rtx new_src = 0; | |
2197a88a | 5847 | unsigned src_hash; |
7afe21cc | 5848 | struct table_elt *src_elt; |
ff27a429 | 5849 | int byte = 0; |
7afe21cc RK |
5850 | |
5851 | /* Ignore invalid entries. */ | |
f8cfc6aa | 5852 | if (!REG_P (elt->exp) |
0516f6fe | 5853 | && ! exp_equiv_p (elt->exp, elt->exp, 1, false)) |
7afe21cc RK |
5854 | continue; |
5855 | ||
9beb7d20 RH |
5856 | /* We may have already been playing subreg games. If the |
5857 | mode is already correct for the destination, use it. */ | |
5858 | if (GET_MODE (elt->exp) == new_mode) | |
5859 | new_src = elt->exp; | |
5860 | else | |
5861 | { | |
5862 | /* Calculate big endian correction for the SUBREG_BYTE. | |
5863 | We have already checked that M1 (GET_MODE (dest)) | |
5864 | is not narrower than M2 (new_mode). */ | |
5865 | if (BYTES_BIG_ENDIAN) | |
5866 | byte = (GET_MODE_SIZE (GET_MODE (dest)) | |
5867 | - GET_MODE_SIZE (new_mode)); | |
5868 | ||
5869 | new_src = simplify_gen_subreg (new_mode, elt->exp, | |
5870 | GET_MODE (dest), byte); | |
5871 | } | |
5872 | ||
ff27a429 R |
5873 | /* The call to simplify_gen_subreg fails if the value |
5874 | is VOIDmode, yet we can't do any simplification, e.g. | |
5875 | for EXPR_LISTs denoting function call results. | |
5876 | It is invalid to construct a SUBREG with a VOIDmode | |
5877 | SUBREG_REG, hence a zero new_src means we can't do | |
5878 | this substitution. */ | |
5879 | if (! new_src) | |
5880 | continue; | |
7afe21cc RK |
5881 | |
5882 | src_hash = HASH (new_src, new_mode); | |
5883 | src_elt = lookup (new_src, src_hash, new_mode); | |
5884 | ||
5885 | /* Put the new source in the hash table is if isn't | |
5886 | already. */ | |
5887 | if (src_elt == 0) | |
5888 | { | |
5889 | if (insert_regs (new_src, classp, 0)) | |
8ae2b8f6 JW |
5890 | { |
5891 | rehash_using_reg (new_src); | |
5892 | src_hash = HASH (new_src, new_mode); | |
5893 | } | |
7afe21cc RK |
5894 | src_elt = insert (new_src, classp, src_hash, new_mode); |
5895 | src_elt->in_memory = elt->in_memory; | |
7afe21cc RK |
5896 | } |
5897 | else if (classp && classp != src_elt->first_same_value) | |
278a83b2 | 5898 | /* Show that two things that we've seen before are |
7afe21cc RK |
5899 | actually the same. */ |
5900 | merge_equiv_classes (src_elt, classp); | |
5901 | ||
5902 | classp = src_elt->first_same_value; | |
da932f04 JL |
5903 | /* Ignore invalid entries. */ |
5904 | while (classp | |
f8cfc6aa | 5905 | && !REG_P (classp->exp) |
0516f6fe | 5906 | && ! exp_equiv_p (classp->exp, classp->exp, 1, false)) |
da932f04 | 5907 | classp = classp->next_same_value; |
7afe21cc RK |
5908 | } |
5909 | } | |
5910 | } | |
5911 | ||
403e25d0 RK |
5912 | /* Special handling for (set REG0 REG1) where REG0 is the |
5913 | "cheapest", cheaper than REG1. After cse, REG1 will probably not | |
5914 | be used in the sequel, so (if easily done) change this insn to | |
5915 | (set REG1 REG0) and replace REG1 with REG0 in the previous insn | |
5916 | that computed their value. Then REG1 will become a dead store | |
5917 | and won't cloud the situation for later optimizations. | |
7afe21cc RK |
5918 | |
5919 | Do not make this change if REG1 is a hard register, because it will | |
5920 | then be used in the sequel and we may be changing a two-operand insn | |
5921 | into a three-operand insn. | |
5922 | ||
4a8cae83 | 5923 | Also do not do this if we are operating on a copy of INSN. */ |
7afe21cc | 5924 | |
7b02f4e0 SB |
5925 | if (n_sets == 1 && sets[0].rtl) |
5926 | try_back_substitute_reg (sets[0].rtl, insn); | |
7afe21cc | 5927 | |
932ad4d9 | 5928 | done:; |
7afe21cc RK |
5929 | } |
5930 | \f | |
a4c6502a | 5931 | /* Remove from the hash table all expressions that reference memory. */ |
14a774a9 | 5932 | |
7afe21cc | 5933 | static void |
7080f735 | 5934 | invalidate_memory (void) |
7afe21cc | 5935 | { |
b3694847 SS |
5936 | int i; |
5937 | struct table_elt *p, *next; | |
7afe21cc | 5938 | |
9b1549b8 | 5939 | for (i = 0; i < HASH_SIZE; i++) |
9ae8ffe7 JL |
5940 | for (p = table[i]; p; p = next) |
5941 | { | |
5942 | next = p->next_same_hash; | |
5943 | if (p->in_memory) | |
5944 | remove_from_table (p, i); | |
5945 | } | |
5946 | } | |
5947 | ||
7b02f4e0 | 5948 | /* Perform invalidation on the basis of everything about INSN, |
7afe21cc RK |
5949 | except for invalidating the actual places that are SET in it. |
5950 | This includes the places CLOBBERed, and anything that might | |
7b02f4e0 | 5951 | alias with something that is SET or CLOBBERed. */ |
7afe21cc RK |
5952 | |
5953 | static void | |
7b02f4e0 | 5954 | invalidate_from_clobbers (rtx insn) |
7afe21cc | 5955 | { |
7b02f4e0 SB |
5956 | rtx x = PATTERN (insn); |
5957 | ||
7afe21cc RK |
5958 | if (GET_CODE (x) == CLOBBER) |
5959 | { | |
5960 | rtx ref = XEXP (x, 0); | |
9ae8ffe7 JL |
5961 | if (ref) |
5962 | { | |
f8cfc6aa | 5963 | if (REG_P (ref) || GET_CODE (ref) == SUBREG |
3c0cb5de | 5964 | || MEM_P (ref)) |
9ae8ffe7 JL |
5965 | invalidate (ref, VOIDmode); |
5966 | else if (GET_CODE (ref) == STRICT_LOW_PART | |
5967 | || GET_CODE (ref) == ZERO_EXTRACT) | |
5968 | invalidate (XEXP (ref, 0), GET_MODE (ref)); | |
5969 | } | |
7afe21cc RK |
5970 | } |
5971 | else if (GET_CODE (x) == PARALLEL) | |
5972 | { | |
b3694847 | 5973 | int i; |
7afe21cc RK |
5974 | for (i = XVECLEN (x, 0) - 1; i >= 0; i--) |
5975 | { | |
b3694847 | 5976 | rtx y = XVECEXP (x, 0, i); |
7afe21cc RK |
5977 | if (GET_CODE (y) == CLOBBER) |
5978 | { | |
5979 | rtx ref = XEXP (y, 0); | |
f8cfc6aa | 5980 | if (REG_P (ref) || GET_CODE (ref) == SUBREG |
3c0cb5de | 5981 | || MEM_P (ref)) |
9ae8ffe7 JL |
5982 | invalidate (ref, VOIDmode); |
5983 | else if (GET_CODE (ref) == STRICT_LOW_PART | |
5984 | || GET_CODE (ref) == ZERO_EXTRACT) | |
5985 | invalidate (XEXP (ref, 0), GET_MODE (ref)); | |
7afe21cc RK |
5986 | } |
5987 | } | |
5988 | } | |
5989 | } | |
5990 | \f | |
7b02f4e0 SB |
5991 | /* Perform invalidation on the basis of everything about INSN. |
5992 | This includes the places CLOBBERed, and anything that might | |
5993 | alias with something that is SET or CLOBBERed. */ | |
5994 | ||
5995 | static void | |
5996 | invalidate_from_sets_and_clobbers (rtx insn) | |
5997 | { | |
5998 | rtx tem; | |
5999 | rtx x = PATTERN (insn); | |
6000 | ||
6001 | if (CALL_P (insn)) | |
6002 | { | |
6003 | for (tem = CALL_INSN_FUNCTION_USAGE (insn); tem; tem = XEXP (tem, 1)) | |
6004 | if (GET_CODE (XEXP (tem, 0)) == CLOBBER) | |
6005 | invalidate (SET_DEST (XEXP (tem, 0)), VOIDmode); | |
6006 | } | |
6007 | ||
6008 | /* Ensure we invalidate the destination register of a CALL insn. | |
6009 | This is necessary for machines where this register is a fixed_reg, | |
6010 | because no other code would invalidate it. */ | |
6011 | if (GET_CODE (x) == SET && GET_CODE (SET_SRC (x)) == CALL) | |
6012 | invalidate (SET_DEST (x), VOIDmode); | |
6013 | ||
6014 | else if (GET_CODE (x) == PARALLEL) | |
6015 | { | |
6016 | int i; | |
6017 | ||
6018 | for (i = XVECLEN (x, 0) - 1; i >= 0; i--) | |
6019 | { | |
6020 | rtx y = XVECEXP (x, 0, i); | |
6021 | if (GET_CODE (y) == CLOBBER) | |
6022 | { | |
6023 | rtx clobbered = XEXP (y, 0); | |
6024 | ||
6025 | if (REG_P (clobbered) | |
6026 | || GET_CODE (clobbered) == SUBREG) | |
6027 | invalidate (clobbered, VOIDmode); | |
6028 | else if (GET_CODE (clobbered) == STRICT_LOW_PART | |
6029 | || GET_CODE (clobbered) == ZERO_EXTRACT) | |
6030 | invalidate (XEXP (clobbered, 0), GET_MODE (clobbered)); | |
6031 | } | |
6032 | else if (GET_CODE (y) == SET && GET_CODE (SET_SRC (y)) == CALL) | |
6033 | invalidate (SET_DEST (y), VOIDmode); | |
6034 | } | |
6035 | } | |
6036 | } | |
6037 | \f | |
7afe21cc RK |
6038 | /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes |
6039 | and replace any registers in them with either an equivalent constant | |
6040 | or the canonical form of the register. If we are inside an address, | |
6041 | only do this if the address remains valid. | |
6042 | ||
6043 | OBJECT is 0 except when within a MEM in which case it is the MEM. | |
6044 | ||
6045 | Return the replacement for X. */ | |
6046 | ||
6047 | static rtx | |
6fb5fa3c | 6048 | cse_process_notes_1 (rtx x, rtx object, bool *changed) |
7afe21cc RK |
6049 | { |
6050 | enum rtx_code code = GET_CODE (x); | |
6f7d635c | 6051 | const char *fmt = GET_RTX_FORMAT (code); |
7afe21cc RK |
6052 | int i; |
6053 | ||
6054 | switch (code) | |
6055 | { | |
7afe21cc RK |
6056 | case CONST: |
6057 | case SYMBOL_REF: | |
6058 | case LABEL_REF: | |
d8116890 | 6059 | CASE_CONST_ANY: |
7afe21cc RK |
6060 | case PC: |
6061 | case CC0: | |
6062 | case LO_SUM: | |
6063 | return x; | |
6064 | ||
6065 | case MEM: | |
c96208fa | 6066 | validate_change (x, &XEXP (x, 0), |
6fb5fa3c | 6067 | cse_process_notes (XEXP (x, 0), x, changed), 0); |
7afe21cc RK |
6068 | return x; |
6069 | ||
6070 | case EXPR_LIST: | |
7afe21cc | 6071 | if (REG_NOTE_KIND (x) == REG_EQUAL) |
6fb5fa3c | 6072 | XEXP (x, 0) = cse_process_notes (XEXP (x, 0), NULL_RTX, changed); |
e5af9ddd RS |
6073 | /* Fall through. */ |
6074 | ||
6075 | case INSN_LIST: | |
6076 | case INT_LIST: | |
7afe21cc | 6077 | if (XEXP (x, 1)) |
6fb5fa3c | 6078 | XEXP (x, 1) = cse_process_notes (XEXP (x, 1), NULL_RTX, changed); |
7afe21cc RK |
6079 | return x; |
6080 | ||
e4890d45 RS |
6081 | case SIGN_EXTEND: |
6082 | case ZERO_EXTEND: | |
0b0ee36c | 6083 | case SUBREG: |
e4890d45 | 6084 | { |
32e9fa48 | 6085 | rtx new_rtx = cse_process_notes (XEXP (x, 0), object, changed); |
e4890d45 RS |
6086 | /* We don't substitute VOIDmode constants into these rtx, |
6087 | since they would impede folding. */ | |
32e9fa48 KG |
6088 | if (GET_MODE (new_rtx) != VOIDmode) |
6089 | validate_change (object, &XEXP (x, 0), new_rtx, 0); | |
e4890d45 RS |
6090 | return x; |
6091 | } | |
6092 | ||
7afe21cc | 6093 | case REG: |
30f72379 | 6094 | i = REG_QTY (REGNO (x)); |
7afe21cc RK |
6095 | |
6096 | /* Return a constant or a constant register. */ | |
1bb98cec | 6097 | if (REGNO_QTY_VALID_P (REGNO (x))) |
7afe21cc | 6098 | { |
1bb98cec DM |
6099 | struct qty_table_elem *ent = &qty_table[i]; |
6100 | ||
6101 | if (ent->const_rtx != NULL_RTX | |
6102 | && (CONSTANT_P (ent->const_rtx) | |
f8cfc6aa | 6103 | || REG_P (ent->const_rtx))) |
1bb98cec | 6104 | { |
32e9fa48 KG |
6105 | rtx new_rtx = gen_lowpart (GET_MODE (x), ent->const_rtx); |
6106 | if (new_rtx) | |
6107 | return copy_rtx (new_rtx); | |
1bb98cec | 6108 | } |
7afe21cc RK |
6109 | } |
6110 | ||
6111 | /* Otherwise, canonicalize this register. */ | |
906c4e36 | 6112 | return canon_reg (x, NULL_RTX); |
278a83b2 | 6113 | |
e9a25f70 JL |
6114 | default: |
6115 | break; | |
7afe21cc RK |
6116 | } |
6117 | ||
6118 | for (i = 0; i < GET_RTX_LENGTH (code); i++) | |
6119 | if (fmt[i] == 'e') | |
6120 | validate_change (object, &XEXP (x, i), | |
6fb5fa3c | 6121 | cse_process_notes (XEXP (x, i), object, changed), 0); |
7afe21cc RK |
6122 | |
6123 | return x; | |
6124 | } | |
6fb5fa3c DB |
6125 | |
6126 | static rtx | |
6127 | cse_process_notes (rtx x, rtx object, bool *changed) | |
6128 | { | |
32e9fa48 KG |
6129 | rtx new_rtx = cse_process_notes_1 (x, object, changed); |
6130 | if (new_rtx != x) | |
6fb5fa3c | 6131 | *changed = true; |
32e9fa48 | 6132 | return new_rtx; |
6fb5fa3c DB |
6133 | } |
6134 | ||
7afe21cc | 6135 | \f |
932ad4d9 | 6136 | /* Find a path in the CFG, starting with FIRST_BB to perform CSE on. |
7afe21cc | 6137 | |
932ad4d9 SB |
6138 | DATA is a pointer to a struct cse_basic_block_data, that is used to |
6139 | describe the path. | |
6140 | It is filled with a queue of basic blocks, starting with FIRST_BB | |
6141 | and following a trace through the CFG. | |
b8698a0f | 6142 | |
932ad4d9 SB |
6143 | If all paths starting at FIRST_BB have been followed, or no new path |
6144 | starting at FIRST_BB can be constructed, this function returns FALSE. | |
6145 | Otherwise, DATA->path is filled and the function returns TRUE indicating | |
6146 | that a path to follow was found. | |
7afe21cc | 6147 | |
2e226e66 | 6148 | If FOLLOW_JUMPS is false, the maximum path length is 1 and the only |
932ad4d9 | 6149 | block in the path will be FIRST_BB. */ |
7afe21cc | 6150 | |
932ad4d9 SB |
6151 | static bool |
6152 | cse_find_path (basic_block first_bb, struct cse_basic_block_data *data, | |
6153 | int follow_jumps) | |
7afe21cc | 6154 | { |
932ad4d9 SB |
6155 | basic_block bb; |
6156 | edge e; | |
6157 | int path_size; | |
b8698a0f | 6158 | |
d7c028c0 | 6159 | bitmap_set_bit (cse_visited_basic_blocks, first_bb->index); |
7afe21cc | 6160 | |
932ad4d9 SB |
6161 | /* See if there is a previous path. */ |
6162 | path_size = data->path_size; | |
6163 | ||
6164 | /* There is a previous path. Make sure it started with FIRST_BB. */ | |
6165 | if (path_size) | |
6166 | gcc_assert (data->path[0].bb == first_bb); | |
6167 | ||
6168 | /* There was only one basic block in the last path. Clear the path and | |
6169 | return, so that paths starting at another basic block can be tried. */ | |
6170 | if (path_size == 1) | |
6171 | { | |
6172 | path_size = 0; | |
6173 | goto done; | |
6174 | } | |
6175 | ||
6176 | /* If the path was empty from the beginning, construct a new path. */ | |
6177 | if (path_size == 0) | |
6178 | data->path[path_size++].bb = first_bb; | |
6179 | else | |
7afe21cc | 6180 | { |
932ad4d9 SB |
6181 | /* Otherwise, path_size must be equal to or greater than 2, because |
6182 | a previous path exists that is at least two basic blocks long. | |
6183 | ||
6184 | Update the previous branch path, if any. If the last branch was | |
6185 | previously along the branch edge, take the fallthrough edge now. */ | |
6186 | while (path_size >= 2) | |
7afe21cc | 6187 | { |
932ad4d9 SB |
6188 | basic_block last_bb_in_path, previous_bb_in_path; |
6189 | edge e; | |
6190 | ||
6191 | --path_size; | |
6192 | last_bb_in_path = data->path[path_size].bb; | |
6193 | previous_bb_in_path = data->path[path_size - 1].bb; | |
6194 | ||
6195 | /* If we previously followed a path along the branch edge, try | |
6196 | the fallthru edge now. */ | |
6197 | if (EDGE_COUNT (previous_bb_in_path->succs) == 2 | |
6198 | && any_condjump_p (BB_END (previous_bb_in_path)) | |
6199 | && (e = find_edge (previous_bb_in_path, last_bb_in_path)) | |
6200 | && e == BRANCH_EDGE (previous_bb_in_path)) | |
6201 | { | |
6202 | bb = FALLTHRU_EDGE (previous_bb_in_path)->dest; | |
fefa31b5 | 6203 | if (bb != EXIT_BLOCK_PTR_FOR_FN (cfun) |
481e0a49 AO |
6204 | && single_pred_p (bb) |
6205 | /* We used to assert here that we would only see blocks | |
6206 | that we have not visited yet. But we may end up | |
6207 | visiting basic blocks twice if the CFG has changed | |
6208 | in this run of cse_main, because when the CFG changes | |
6209 | the topological sort of the CFG also changes. A basic | |
6210 | blocks that previously had more than two predecessors | |
6211 | may now have a single predecessor, and become part of | |
6212 | a path that starts at another basic block. | |
6213 | ||
6214 | We still want to visit each basic block only once, so | |
6215 | halt the path here if we have already visited BB. */ | |
d7c028c0 | 6216 | && !bitmap_bit_p (cse_visited_basic_blocks, bb->index)) |
932ad4d9 | 6217 | { |
d7c028c0 | 6218 | bitmap_set_bit (cse_visited_basic_blocks, bb->index); |
932ad4d9 SB |
6219 | data->path[path_size++].bb = bb; |
6220 | break; | |
6221 | } | |
6222 | } | |
6223 | ||
6224 | data->path[path_size].bb = NULL; | |
6225 | } | |
6226 | ||
6227 | /* If only one block remains in the path, bail. */ | |
6228 | if (path_size == 1) | |
6229 | { | |
6230 | path_size = 0; | |
6231 | goto done; | |
7afe21cc | 6232 | } |
7afe21cc RK |
6233 | } |
6234 | ||
932ad4d9 SB |
6235 | /* Extend the path if possible. */ |
6236 | if (follow_jumps) | |
7afe21cc | 6237 | { |
932ad4d9 SB |
6238 | bb = data->path[path_size - 1].bb; |
6239 | while (bb && path_size < PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH)) | |
6240 | { | |
6241 | if (single_succ_p (bb)) | |
6242 | e = single_succ_edge (bb); | |
6243 | else if (EDGE_COUNT (bb->succs) == 2 | |
6244 | && any_condjump_p (BB_END (bb))) | |
6245 | { | |
6246 | /* First try to follow the branch. If that doesn't lead | |
6247 | to a useful path, follow the fallthru edge. */ | |
6248 | e = BRANCH_EDGE (bb); | |
6249 | if (!single_pred_p (e->dest)) | |
6250 | e = FALLTHRU_EDGE (bb); | |
6251 | } | |
6252 | else | |
6253 | e = NULL; | |
7afe21cc | 6254 | |
bc6d3f91 | 6255 | if (e |
76015c34 | 6256 | && !((e->flags & EDGE_ABNORMAL_CALL) && cfun->has_nonlocal_label) |
fefa31b5 | 6257 | && e->dest != EXIT_BLOCK_PTR_FOR_FN (cfun) |
481e0a49 AO |
6258 | && single_pred_p (e->dest) |
6259 | /* Avoid visiting basic blocks twice. The large comment | |
6260 | above explains why this can happen. */ | |
d7c028c0 | 6261 | && !bitmap_bit_p (cse_visited_basic_blocks, e->dest->index)) |
932ad4d9 SB |
6262 | { |
6263 | basic_block bb2 = e->dest; | |
d7c028c0 | 6264 | bitmap_set_bit (cse_visited_basic_blocks, bb2->index); |
932ad4d9 SB |
6265 | data->path[path_size++].bb = bb2; |
6266 | bb = bb2; | |
6267 | } | |
6268 | else | |
6269 | bb = NULL; | |
6270 | } | |
6271 | } | |
6272 | ||
6273 | done: | |
6274 | data->path_size = path_size; | |
6275 | return path_size != 0; | |
6276 | } | |
6277 | \f | |
6278 | /* Dump the path in DATA to file F. NSETS is the number of sets | |
6279 | in the path. */ | |
6280 | ||
6281 | static void | |
6282 | cse_dump_path (struct cse_basic_block_data *data, int nsets, FILE *f) | |
6283 | { | |
6284 | int path_entry; | |
6285 | ||
6286 | fprintf (f, ";; Following path with %d sets: ", nsets); | |
6287 | for (path_entry = 0; path_entry < data->path_size; path_entry++) | |
6288 | fprintf (f, "%d ", (data->path[path_entry].bb)->index); | |
6289 | fputc ('\n', dump_file); | |
6290 | fflush (f); | |
6291 | } | |
6292 | ||
a7582f7c SB |
6293 | \f |
6294 | /* Return true if BB has exception handling successor edges. */ | |
6295 | ||
6296 | static bool | |
6297 | have_eh_succ_edges (basic_block bb) | |
6298 | { | |
6299 | edge e; | |
6300 | edge_iterator ei; | |
6301 | ||
6302 | FOR_EACH_EDGE (e, ei, bb->succs) | |
6303 | if (e->flags & EDGE_EH) | |
6304 | return true; | |
6305 | ||
6306 | return false; | |
6307 | } | |
6308 | ||
932ad4d9 SB |
6309 | \f |
6310 | /* Scan to the end of the path described by DATA. Return an estimate of | |
6fb5fa3c | 6311 | the total number of SETs of all insns in the path. */ |
932ad4d9 SB |
6312 | |
6313 | static void | |
6314 | cse_prescan_path (struct cse_basic_block_data *data) | |
6315 | { | |
6316 | int nsets = 0; | |
932ad4d9 SB |
6317 | int path_size = data->path_size; |
6318 | int path_entry; | |
6319 | ||
6320 | /* Scan to end of each basic block in the path. */ | |
b8698a0f | 6321 | for (path_entry = 0; path_entry < path_size; path_entry++) |
932ad4d9 SB |
6322 | { |
6323 | basic_block bb; | |
6324 | rtx insn; | |
164c8956 | 6325 | |
932ad4d9 | 6326 | bb = data->path[path_entry].bb; |
7afe21cc | 6327 | |
932ad4d9 | 6328 | FOR_BB_INSNS (bb, insn) |
7afe21cc | 6329 | { |
932ad4d9 SB |
6330 | if (!INSN_P (insn)) |
6331 | continue; | |
278a83b2 | 6332 | |
932ad4d9 SB |
6333 | /* A PARALLEL can have lots of SETs in it, |
6334 | especially if it is really an ASM_OPERANDS. */ | |
6335 | if (GET_CODE (PATTERN (insn)) == PARALLEL) | |
6336 | nsets += XVECLEN (PATTERN (insn), 0); | |
6337 | else | |
6338 | nsets += 1; | |
7afe21cc | 6339 | } |
932ad4d9 SB |
6340 | } |
6341 | ||
932ad4d9 SB |
6342 | data->nsets = nsets; |
6343 | } | |
6344 | \f | |
6345 | /* Process a single extended basic block described by EBB_DATA. */ | |
7afe21cc | 6346 | |
932ad4d9 SB |
6347 | static void |
6348 | cse_extended_basic_block (struct cse_basic_block_data *ebb_data) | |
6349 | { | |
6350 | int path_size = ebb_data->path_size; | |
6351 | int path_entry; | |
6352 | int num_insns = 0; | |
6353 | ||
6354 | /* Allocate the space needed by qty_table. */ | |
6355 | qty_table = XNEWVEC (struct qty_table_elem, max_qty); | |
6356 | ||
6357 | new_basic_block (); | |
89a95777 KZ |
6358 | cse_ebb_live_in = df_get_live_in (ebb_data->path[0].bb); |
6359 | cse_ebb_live_out = df_get_live_out (ebb_data->path[path_size - 1].bb); | |
932ad4d9 SB |
6360 | for (path_entry = 0; path_entry < path_size; path_entry++) |
6361 | { | |
6362 | basic_block bb; | |
ba4807a0 | 6363 | rtx insn; |
932ad4d9 SB |
6364 | |
6365 | bb = ebb_data->path[path_entry].bb; | |
e186ff69 AK |
6366 | |
6367 | /* Invalidate recorded information for eh regs if there is an EH | |
6368 | edge pointing to that bb. */ | |
6369 | if (bb_has_eh_pred (bb)) | |
6370 | { | |
57512f53 | 6371 | df_ref *def_rec; |
e186ff69 AK |
6372 | |
6373 | for (def_rec = df_get_artificial_defs (bb->index); *def_rec; def_rec++) | |
6374 | { | |
57512f53 | 6375 | df_ref def = *def_rec; |
e186ff69 AK |
6376 | if (DF_REF_FLAGS (def) & DF_REF_AT_TOP) |
6377 | invalidate (DF_REF_REG (def), GET_MODE (DF_REF_REG (def))); | |
6378 | } | |
6379 | } | |
6380 | ||
9fcb01de | 6381 | optimize_this_for_speed_p = optimize_bb_for_speed_p (bb); |
ba4807a0 | 6382 | FOR_BB_INSNS (bb, insn) |
7afe21cc | 6383 | { |
932ad4d9 SB |
6384 | /* If we have processed 1,000 insns, flush the hash table to |
6385 | avoid extreme quadratic behavior. We must not include NOTEs | |
6386 | in the count since there may be more of them when generating | |
6387 | debugging information. If we clear the table at different | |
6388 | times, code generated with -g -O might be different than code | |
6389 | generated with -O but not -g. | |
6390 | ||
6391 | FIXME: This is a real kludge and needs to be done some other | |
6392 | way. */ | |
b5b8b0ac | 6393 | if (NONDEBUG_INSN_P (insn) |
932ad4d9 SB |
6394 | && num_insns++ > PARAM_VALUE (PARAM_MAX_CSE_INSNS)) |
6395 | { | |
6396 | flush_hash_table (); | |
6397 | num_insns = 0; | |
6398 | } | |
7afe21cc | 6399 | |
932ad4d9 | 6400 | if (INSN_P (insn)) |
7afe21cc | 6401 | { |
932ad4d9 SB |
6402 | /* Process notes first so we have all notes in canonical forms |
6403 | when looking for duplicate operations. */ | |
6404 | if (REG_NOTES (insn)) | |
6fb5fa3c DB |
6405 | { |
6406 | bool changed = false; | |
6407 | REG_NOTES (insn) = cse_process_notes (REG_NOTES (insn), | |
6408 | NULL_RTX, &changed); | |
6409 | if (changed) | |
6410 | df_notes_rescan (insn); | |
6411 | } | |
932ad4d9 | 6412 | |
4a8cae83 | 6413 | cse_insn (insn); |
932ad4d9 | 6414 | |
932ad4d9 SB |
6415 | /* If we haven't already found an insn where we added a LABEL_REF, |
6416 | check this one. */ | |
2aac3a01 | 6417 | if (INSN_P (insn) && !recorded_label_ref |
932ad4d9 SB |
6418 | && for_each_rtx (&PATTERN (insn), check_for_label_ref, |
6419 | (void *) insn)) | |
2aac3a01 | 6420 | recorded_label_ref = true; |
96fb470d SB |
6421 | |
6422 | #ifdef HAVE_cc0 | |
5f262d13 | 6423 | if (NONDEBUG_INSN_P (insn)) |
96fb470d | 6424 | { |
5f262d13 AO |
6425 | /* If the previous insn sets CC0 and this insn no |
6426 | longer references CC0, delete the previous insn. | |
6427 | Here we use fact that nothing expects CC0 to be | |
6428 | valid over an insn, which is true until the final | |
6429 | pass. */ | |
6430 | rtx prev_insn, tem; | |
6431 | ||
6432 | prev_insn = prev_nonnote_nondebug_insn (insn); | |
6433 | if (prev_insn && NONJUMP_INSN_P (prev_insn) | |
6434 | && (tem = single_set (prev_insn)) != NULL_RTX | |
6435 | && SET_DEST (tem) == cc0_rtx | |
6436 | && ! reg_mentioned_p (cc0_rtx, PATTERN (insn))) | |
6437 | delete_insn (prev_insn); | |
6438 | ||
6439 | /* If this insn is not the last insn in the basic | |
6440 | block, it will be PREV_INSN(insn) in the next | |
6441 | iteration. If we recorded any CC0-related | |
6442 | information for this insn, remember it. */ | |
6443 | if (insn != BB_END (bb)) | |
6444 | { | |
6445 | prev_insn_cc0 = this_insn_cc0; | |
6446 | prev_insn_cc0_mode = this_insn_cc0_mode; | |
6447 | } | |
96fb470d SB |
6448 | } |
6449 | #endif | |
932ad4d9 SB |
6450 | } |
6451 | } | |
7afe21cc | 6452 | |
a7582f7c SB |
6453 | /* With non-call exceptions, we are not always able to update |
6454 | the CFG properly inside cse_insn. So clean up possibly | |
6455 | redundant EH edges here. */ | |
8f4f502f | 6456 | if (cfun->can_throw_non_call_exceptions && have_eh_succ_edges (bb)) |
2aac3a01 | 6457 | cse_cfg_altered |= purge_dead_edges (bb); |
a7582f7c | 6458 | |
932ad4d9 SB |
6459 | /* If we changed a conditional jump, we may have terminated |
6460 | the path we are following. Check that by verifying that | |
6461 | the edge we would take still exists. If the edge does | |
6462 | not exist anymore, purge the remainder of the path. | |
6463 | Note that this will cause us to return to the caller. */ | |
6464 | if (path_entry < path_size - 1) | |
6465 | { | |
6466 | basic_block next_bb = ebb_data->path[path_entry + 1].bb; | |
6467 | if (!find_edge (bb, next_bb)) | |
27511c65 SB |
6468 | { |
6469 | do | |
6470 | { | |
6471 | path_size--; | |
6472 | ||
6473 | /* If we truncate the path, we must also reset the | |
6474 | visited bit on the remaining blocks in the path, | |
6475 | or we will never visit them at all. */ | |
d7c028c0 | 6476 | bitmap_clear_bit (cse_visited_basic_blocks, |
27511c65 SB |
6477 | ebb_data->path[path_size].bb->index); |
6478 | ebb_data->path[path_size].bb = NULL; | |
6479 | } | |
6480 | while (path_size - 1 != path_entry); | |
6481 | ebb_data->path_size = path_size; | |
6482 | } | |
7afe21cc | 6483 | } |
7afe21cc | 6484 | |
932ad4d9 SB |
6485 | /* If this is a conditional jump insn, record any known |
6486 | equivalences due to the condition being tested. */ | |
6487 | insn = BB_END (bb); | |
6488 | if (path_entry < path_size - 1 | |
6489 | && JUMP_P (insn) | |
6490 | && single_set (insn) | |
6491 | && any_condjump_p (insn)) | |
6492 | { | |
6493 | basic_block next_bb = ebb_data->path[path_entry + 1].bb; | |
6494 | bool taken = (next_bb == BRANCH_EDGE (bb)->dest); | |
6495 | record_jump_equiv (insn, taken); | |
6496 | } | |
96fb470d SB |
6497 | |
6498 | #ifdef HAVE_cc0 | |
6499 | /* Clear the CC0-tracking related insns, they can't provide | |
6500 | useful information across basic block boundaries. */ | |
6501 | prev_insn_cc0 = 0; | |
6502 | #endif | |
932ad4d9 | 6503 | } |
7afe21cc | 6504 | |
932ad4d9 | 6505 | gcc_assert (next_qty <= max_qty); |
7afe21cc | 6506 | |
932ad4d9 | 6507 | free (qty_table); |
7afe21cc | 6508 | } |
6fb5fa3c | 6509 | |
7afe21cc | 6510 | \f |
7afe21cc RK |
6511 | /* Perform cse on the instructions of a function. |
6512 | F is the first instruction. | |
6513 | NREGS is one plus the highest pseudo-reg number used in the instruction. | |
6514 | ||
2aac3a01 EB |
6515 | Return 2 if jump optimizations should be redone due to simplifications |
6516 | in conditional jump instructions. | |
6517 | Return 1 if the CFG should be cleaned up because it has been modified. | |
6518 | Return 0 otherwise. */ | |
7afe21cc | 6519 | |
711417cd | 6520 | static int |
932ad4d9 | 6521 | cse_main (rtx f ATTRIBUTE_UNUSED, int nregs) |
7afe21cc | 6522 | { |
932ad4d9 SB |
6523 | struct cse_basic_block_data ebb_data; |
6524 | basic_block bb; | |
8b1c6fd7 | 6525 | int *rc_order = XNEWVEC (int, last_basic_block_for_fn (cfun)); |
932ad4d9 | 6526 | int i, n_blocks; |
7afe21cc | 6527 | |
6fb5fa3c | 6528 | df_set_flags (DF_LR_RUN_DCE); |
dca3da7a | 6529 | df_note_add_problem (); |
6fb5fa3c DB |
6530 | df_analyze (); |
6531 | df_set_flags (DF_DEFER_INSN_RESCAN); | |
6532 | ||
6533 | reg_scan (get_insns (), max_reg_num ()); | |
bc5e3b54 KH |
6534 | init_cse_reg_info (nregs); |
6535 | ||
932ad4d9 SB |
6536 | ebb_data.path = XNEWVEC (struct branch_path, |
6537 | PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH)); | |
9bf8cfbf | 6538 | |
2aac3a01 EB |
6539 | cse_cfg_altered = false; |
6540 | cse_jumps_altered = false; | |
6541 | recorded_label_ref = false; | |
7afe21cc | 6542 | constant_pool_entries_cost = 0; |
dd0ba281 | 6543 | constant_pool_entries_regcost = 0; |
932ad4d9 SB |
6544 | ebb_data.path_size = 0; |
6545 | ebb_data.nsets = 0; | |
2f93eea8 | 6546 | rtl_hooks = cse_rtl_hooks; |
7afe21cc RK |
6547 | |
6548 | init_recog (); | |
9ae8ffe7 | 6549 | init_alias_analysis (); |
7afe21cc | 6550 | |
5ed6ace5 | 6551 | reg_eqv_table = XNEWVEC (struct reg_eqv_elem, nregs); |
7afe21cc | 6552 | |
932ad4d9 | 6553 | /* Set up the table of already visited basic blocks. */ |
8b1c6fd7 | 6554 | cse_visited_basic_blocks = sbitmap_alloc (last_basic_block_for_fn (cfun)); |
f61e445a | 6555 | bitmap_clear (cse_visited_basic_blocks); |
7afe21cc | 6556 | |
a7582f7c | 6557 | /* Loop over basic blocks in reverse completion order (RPO), |
932ad4d9 | 6558 | excluding the ENTRY and EXIT blocks. */ |
27511c65 | 6559 | n_blocks = pre_and_rev_post_order_compute (NULL, rc_order, false); |
932ad4d9 SB |
6560 | i = 0; |
6561 | while (i < n_blocks) | |
7afe21cc | 6562 | { |
a7582f7c | 6563 | /* Find the first block in the RPO queue that we have not yet |
932ad4d9 SB |
6564 | processed before. */ |
6565 | do | |
e9a25f70 | 6566 | { |
06e28de2 | 6567 | bb = BASIC_BLOCK_FOR_FN (cfun, rc_order[i++]); |
e9a25f70 | 6568 | } |
d7c028c0 | 6569 | while (bitmap_bit_p (cse_visited_basic_blocks, bb->index) |
932ad4d9 | 6570 | && i < n_blocks); |
7afe21cc | 6571 | |
932ad4d9 SB |
6572 | /* Find all paths starting with BB, and process them. */ |
6573 | while (cse_find_path (bb, &ebb_data, flag_cse_follow_jumps)) | |
7afe21cc | 6574 | { |
932ad4d9 SB |
6575 | /* Pre-scan the path. */ |
6576 | cse_prescan_path (&ebb_data); | |
7afe21cc | 6577 | |
932ad4d9 SB |
6578 | /* If this basic block has no sets, skip it. */ |
6579 | if (ebb_data.nsets == 0) | |
6580 | continue; | |
7afe21cc | 6581 | |
2e226e66 | 6582 | /* Get a reasonable estimate for the maximum number of qty's |
932ad4d9 SB |
6583 | needed for this path. For this, we take the number of sets |
6584 | and multiply that by MAX_RECOG_OPERANDS. */ | |
6585 | max_qty = ebb_data.nsets * MAX_RECOG_OPERANDS; | |
7afe21cc | 6586 | |
932ad4d9 SB |
6587 | /* Dump the path we're about to process. */ |
6588 | if (dump_file) | |
6589 | cse_dump_path (&ebb_data, ebb_data.nsets, dump_file); | |
6a5293dc | 6590 | |
932ad4d9 | 6591 | cse_extended_basic_block (&ebb_data); |
7afe21cc | 6592 | } |
7afe21cc RK |
6593 | } |
6594 | ||
932ad4d9 SB |
6595 | /* Clean up. */ |
6596 | end_alias_analysis (); | |
932ad4d9 SB |
6597 | free (reg_eqv_table); |
6598 | free (ebb_data.path); | |
6599 | sbitmap_free (cse_visited_basic_blocks); | |
27511c65 | 6600 | free (rc_order); |
932ad4d9 | 6601 | rtl_hooks = general_rtl_hooks; |
75c6bd46 | 6602 | |
2aac3a01 EB |
6603 | if (cse_jumps_altered || recorded_label_ref) |
6604 | return 2; | |
6605 | else if (cse_cfg_altered) | |
6606 | return 1; | |
6607 | else | |
6608 | return 0; | |
7afe21cc RK |
6609 | } |
6610 | \f | |
cf7c4aa6 HPN |
6611 | /* Called via for_each_rtx to see if an insn is using a LABEL_REF for |
6612 | which there isn't a REG_LABEL_OPERAND note. | |
6613 | Return one if so. DATA is the insn. */ | |
be8ac49a RK |
6614 | |
6615 | static int | |
7080f735 | 6616 | check_for_label_ref (rtx *rtl, void *data) |
be8ac49a RK |
6617 | { |
6618 | rtx insn = (rtx) data; | |
6619 | ||
cf7c4aa6 HPN |
6620 | /* If this insn uses a LABEL_REF and there isn't a REG_LABEL_OPERAND |
6621 | note for it, we must rerun jump since it needs to place the note. If | |
6622 | this is a LABEL_REF for a CODE_LABEL that isn't in the insn chain, | |
6623 | don't do this since no REG_LABEL_OPERAND will be added. */ | |
be8ac49a | 6624 | return (GET_CODE (*rtl) == LABEL_REF |
45c23566 | 6625 | && ! LABEL_REF_NONLOCAL_P (*rtl) |
cf7c4aa6 HPN |
6626 | && (!JUMP_P (insn) |
6627 | || !label_is_jump_target_p (XEXP (*rtl, 0), insn)) | |
4838c5ee | 6628 | && LABEL_P (XEXP (*rtl, 0)) |
be8ac49a | 6629 | && INSN_UID (XEXP (*rtl, 0)) != 0 |
cf7c4aa6 | 6630 | && ! find_reg_note (insn, REG_LABEL_OPERAND, XEXP (*rtl, 0))); |
be8ac49a RK |
6631 | } |
6632 | \f | |
7afe21cc RK |
6633 | /* Count the number of times registers are used (not set) in X. |
6634 | COUNTS is an array in which we accumulate the count, INCR is how much | |
b92ba6ff R |
6635 | we count each register usage. |
6636 | ||
6637 | Don't count a usage of DEST, which is the SET_DEST of a SET which | |
6638 | contains X in its SET_SRC. This is because such a SET does not | |
6639 | modify the liveness of DEST. | |
34161e98 RS |
6640 | DEST is set to pc_rtx for a trapping insn, or for an insn with side effects. |
6641 | We must then count uses of a SET_DEST regardless, because the insn can't be | |
6642 | deleted here. */ | |
7afe21cc RK |
6643 | |
6644 | static void | |
b92ba6ff | 6645 | count_reg_usage (rtx x, int *counts, rtx dest, int incr) |
7afe21cc | 6646 | { |
f1e7c95f | 6647 | enum rtx_code code; |
b17d5d7c | 6648 | rtx note; |
6f7d635c | 6649 | const char *fmt; |
7afe21cc RK |
6650 | int i, j; |
6651 | ||
f1e7c95f RK |
6652 | if (x == 0) |
6653 | return; | |
6654 | ||
6655 | switch (code = GET_CODE (x)) | |
7afe21cc RK |
6656 | { |
6657 | case REG: | |
b92ba6ff R |
6658 | if (x != dest) |
6659 | counts[REGNO (x)] += incr; | |
7afe21cc RK |
6660 | return; |
6661 | ||
6662 | case PC: | |
6663 | case CC0: | |
6664 | case CONST: | |
d8116890 | 6665 | CASE_CONST_ANY: |
7afe21cc RK |
6666 | case SYMBOL_REF: |
6667 | case LABEL_REF: | |
02e39abc JL |
6668 | return; |
6669 | ||
278a83b2 | 6670 | case CLOBBER: |
02e39abc JL |
6671 | /* If we are clobbering a MEM, mark any registers inside the address |
6672 | as being used. */ | |
3c0cb5de | 6673 | if (MEM_P (XEXP (x, 0))) |
b92ba6ff | 6674 | count_reg_usage (XEXP (XEXP (x, 0), 0), counts, NULL_RTX, incr); |
7afe21cc RK |
6675 | return; |
6676 | ||
6677 | case SET: | |
6678 | /* Unless we are setting a REG, count everything in SET_DEST. */ | |
f8cfc6aa | 6679 | if (!REG_P (SET_DEST (x))) |
b92ba6ff R |
6680 | count_reg_usage (SET_DEST (x), counts, NULL_RTX, incr); |
6681 | count_reg_usage (SET_SRC (x), counts, | |
6682 | dest ? dest : SET_DEST (x), | |
6683 | incr); | |
7afe21cc RK |
6684 | return; |
6685 | ||
b5b8b0ac AO |
6686 | case DEBUG_INSN: |
6687 | return; | |
6688 | ||
f1e7c95f | 6689 | case CALL_INSN: |
7afe21cc RK |
6690 | case INSN: |
6691 | case JUMP_INSN: | |
2da02156 | 6692 | /* We expect dest to be NULL_RTX here. If the insn may throw, |
34161e98 RS |
6693 | or if it cannot be deleted due to side-effects, mark this fact |
6694 | by setting DEST to pc_rtx. */ | |
2da02156 EB |
6695 | if ((!cfun->can_delete_dead_exceptions && !insn_nothrow_p (x)) |
6696 | || side_effects_p (PATTERN (x))) | |
b92ba6ff R |
6697 | dest = pc_rtx; |
6698 | if (code == CALL_INSN) | |
6699 | count_reg_usage (CALL_INSN_FUNCTION_USAGE (x), counts, dest, incr); | |
6700 | count_reg_usage (PATTERN (x), counts, dest, incr); | |
7afe21cc RK |
6701 | |
6702 | /* Things used in a REG_EQUAL note aren't dead since loop may try to | |
6703 | use them. */ | |
6704 | ||
b17d5d7c ZD |
6705 | note = find_reg_equal_equiv_note (x); |
6706 | if (note) | |
839844be R |
6707 | { |
6708 | rtx eqv = XEXP (note, 0); | |
6709 | ||
6710 | if (GET_CODE (eqv) == EXPR_LIST) | |
6711 | /* This REG_EQUAL note describes the result of a function call. | |
6712 | Process all the arguments. */ | |
6713 | do | |
6714 | { | |
b92ba6ff | 6715 | count_reg_usage (XEXP (eqv, 0), counts, dest, incr); |
839844be R |
6716 | eqv = XEXP (eqv, 1); |
6717 | } | |
6718 | while (eqv && GET_CODE (eqv) == EXPR_LIST); | |
6719 | else | |
b92ba6ff | 6720 | count_reg_usage (eqv, counts, dest, incr); |
839844be | 6721 | } |
7afe21cc RK |
6722 | return; |
6723 | ||
ee960939 OH |
6724 | case EXPR_LIST: |
6725 | if (REG_NOTE_KIND (x) == REG_EQUAL | |
6726 | || (REG_NOTE_KIND (x) != REG_NONNEG && GET_CODE (XEXP (x,0)) == USE) | |
6727 | /* FUNCTION_USAGE expression lists may include (CLOBBER (mem /u)), | |
6728 | involving registers in the address. */ | |
6729 | || GET_CODE (XEXP (x, 0)) == CLOBBER) | |
b92ba6ff | 6730 | count_reg_usage (XEXP (x, 0), counts, NULL_RTX, incr); |
ee960939 | 6731 | |
b92ba6ff | 6732 | count_reg_usage (XEXP (x, 1), counts, NULL_RTX, incr); |
ee960939 OH |
6733 | return; |
6734 | ||
a6c14a64 | 6735 | case ASM_OPERANDS: |
a6c14a64 RH |
6736 | /* Iterate over just the inputs, not the constraints as well. */ |
6737 | for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--) | |
b92ba6ff | 6738 | count_reg_usage (ASM_OPERANDS_INPUT (x, i), counts, dest, incr); |
a6c14a64 RH |
6739 | return; |
6740 | ||
7afe21cc | 6741 | case INSN_LIST: |
f91aec98 | 6742 | case INT_LIST: |
341c100f | 6743 | gcc_unreachable (); |
278a83b2 | 6744 | |
e9a25f70 JL |
6745 | default: |
6746 | break; | |
7afe21cc RK |
6747 | } |
6748 | ||
6749 | fmt = GET_RTX_FORMAT (code); | |
6750 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
6751 | { | |
6752 | if (fmt[i] == 'e') | |
b92ba6ff | 6753 | count_reg_usage (XEXP (x, i), counts, dest, incr); |
7afe21cc RK |
6754 | else if (fmt[i] == 'E') |
6755 | for (j = XVECLEN (x, i) - 1; j >= 0; j--) | |
b92ba6ff | 6756 | count_reg_usage (XVECEXP (x, i, j), counts, dest, incr); |
7afe21cc RK |
6757 | } |
6758 | } | |
6759 | \f | |
6699b754 | 6760 | /* Return true if X is a dead register. */ |
b5b8b0ac | 6761 | |
6699b754 JJ |
6762 | static inline int |
6763 | is_dead_reg (rtx x, int *counts) | |
b5b8b0ac | 6764 | { |
b5b8b0ac AO |
6765 | return (REG_P (x) |
6766 | && REGNO (x) >= FIRST_PSEUDO_REGISTER | |
6767 | && counts[REGNO (x)] == 0); | |
6768 | } | |
6769 | ||
4793dca1 JH |
6770 | /* Return true if set is live. */ |
6771 | static bool | |
7080f735 AJ |
6772 | set_live_p (rtx set, rtx insn ATTRIBUTE_UNUSED, /* Only used with HAVE_cc0. */ |
6773 | int *counts) | |
4793dca1 JH |
6774 | { |
6775 | #ifdef HAVE_cc0 | |
6776 | rtx tem; | |
6777 | #endif | |
6778 | ||
6779 | if (set_noop_p (set)) | |
6780 | ; | |
6781 | ||
6782 | #ifdef HAVE_cc0 | |
6783 | else if (GET_CODE (SET_DEST (set)) == CC0 | |
6784 | && !side_effects_p (SET_SRC (set)) | |
5f262d13 | 6785 | && ((tem = next_nonnote_nondebug_insn (insn)) == NULL_RTX |
4793dca1 JH |
6786 | || !INSN_P (tem) |
6787 | || !reg_referenced_p (cc0_rtx, PATTERN (tem)))) | |
6788 | return false; | |
6789 | #endif | |
6699b754 | 6790 | else if (!is_dead_reg (SET_DEST (set), counts) |
8fff4fc1 | 6791 | || side_effects_p (SET_SRC (set))) |
4793dca1 JH |
6792 | return true; |
6793 | return false; | |
6794 | } | |
6795 | ||
6796 | /* Return true if insn is live. */ | |
6797 | ||
6798 | static bool | |
7080f735 | 6799 | insn_live_p (rtx insn, int *counts) |
4793dca1 JH |
6800 | { |
6801 | int i; | |
2da02156 | 6802 | if (!cfun->can_delete_dead_exceptions && !insn_nothrow_p (insn)) |
a646f6cc AH |
6803 | return true; |
6804 | else if (GET_CODE (PATTERN (insn)) == SET) | |
0021de69 | 6805 | return set_live_p (PATTERN (insn), insn, counts); |
4793dca1 | 6806 | else if (GET_CODE (PATTERN (insn)) == PARALLEL) |
0021de69 DB |
6807 | { |
6808 | for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--) | |
6809 | { | |
6810 | rtx elt = XVECEXP (PATTERN (insn), 0, i); | |
4793dca1 | 6811 | |
0021de69 DB |
6812 | if (GET_CODE (elt) == SET) |
6813 | { | |
6814 | if (set_live_p (elt, insn, counts)) | |
6815 | return true; | |
6816 | } | |
6817 | else if (GET_CODE (elt) != CLOBBER && GET_CODE (elt) != USE) | |
6818 | return true; | |
6819 | } | |
6820 | return false; | |
6821 | } | |
b5b8b0ac AO |
6822 | else if (DEBUG_INSN_P (insn)) |
6823 | { | |
6824 | rtx next; | |
6825 | ||
6826 | for (next = NEXT_INSN (insn); next; next = NEXT_INSN (next)) | |
6827 | if (NOTE_P (next)) | |
6828 | continue; | |
6829 | else if (!DEBUG_INSN_P (next)) | |
6830 | return true; | |
6831 | else if (INSN_VAR_LOCATION_DECL (insn) == INSN_VAR_LOCATION_DECL (next)) | |
6832 | return false; | |
6833 | ||
b5b8b0ac AO |
6834 | return true; |
6835 | } | |
4793dca1 JH |
6836 | else |
6837 | return true; | |
6838 | } | |
6839 | ||
6699b754 JJ |
6840 | /* Count the number of stores into pseudo. Callback for note_stores. */ |
6841 | ||
6842 | static void | |
6843 | count_stores (rtx x, const_rtx set ATTRIBUTE_UNUSED, void *data) | |
6844 | { | |
6845 | int *counts = (int *) data; | |
6846 | if (REG_P (x) && REGNO (x) >= FIRST_PSEUDO_REGISTER) | |
6847 | counts[REGNO (x)]++; | |
6848 | } | |
6849 | ||
6850 | struct dead_debug_insn_data | |
6851 | { | |
6852 | int *counts; | |
6853 | rtx *replacements; | |
6854 | bool seen_repl; | |
6855 | }; | |
6856 | ||
6857 | /* Return if a DEBUG_INSN needs to be reset because some dead | |
6858 | pseudo doesn't have a replacement. Callback for for_each_rtx. */ | |
6859 | ||
6860 | static int | |
6861 | is_dead_debug_insn (rtx *loc, void *data) | |
6862 | { | |
6863 | rtx x = *loc; | |
6864 | struct dead_debug_insn_data *ddid = (struct dead_debug_insn_data *) data; | |
6865 | ||
6866 | if (is_dead_reg (x, ddid->counts)) | |
6867 | { | |
6868 | if (ddid->replacements && ddid->replacements[REGNO (x)] != NULL_RTX) | |
6869 | ddid->seen_repl = true; | |
6870 | else | |
6871 | return 1; | |
6872 | } | |
6873 | return 0; | |
6874 | } | |
6875 | ||
6876 | /* Replace a dead pseudo in a DEBUG_INSN with replacement DEBUG_EXPR. | |
6877 | Callback for simplify_replace_fn_rtx. */ | |
6878 | ||
6879 | static rtx | |
6880 | replace_dead_reg (rtx x, const_rtx old_rtx ATTRIBUTE_UNUSED, void *data) | |
6881 | { | |
6882 | rtx *replacements = (rtx *) data; | |
6883 | ||
6884 | if (REG_P (x) | |
6885 | && REGNO (x) >= FIRST_PSEUDO_REGISTER | |
6886 | && replacements[REGNO (x)] != NULL_RTX) | |
6887 | { | |
6888 | if (GET_MODE (x) == GET_MODE (replacements[REGNO (x)])) | |
6889 | return replacements[REGNO (x)]; | |
6890 | return lowpart_subreg (GET_MODE (x), replacements[REGNO (x)], | |
6891 | GET_MODE (replacements[REGNO (x)])); | |
6892 | } | |
6893 | return NULL_RTX; | |
6894 | } | |
6895 | ||
7afe21cc RK |
6896 | /* Scan all the insns and delete any that are dead; i.e., they store a register |
6897 | that is never used or they copy a register to itself. | |
6898 | ||
c6a26dc4 JL |
6899 | This is used to remove insns made obviously dead by cse, loop or other |
6900 | optimizations. It improves the heuristics in loop since it won't try to | |
6901 | move dead invariants out of loops or make givs for dead quantities. The | |
6902 | remaining passes of the compilation are also sped up. */ | |
7afe21cc | 6903 | |
3dec4024 | 6904 | int |
7080f735 | 6905 | delete_trivially_dead_insns (rtx insns, int nreg) |
7afe21cc | 6906 | { |
4da896b2 | 6907 | int *counts; |
77fa0940 | 6908 | rtx insn, prev; |
6699b754 | 6909 | rtx *replacements = NULL; |
65e9fa10 | 6910 | int ndead = 0; |
7afe21cc | 6911 | |
3dec4024 | 6912 | timevar_push (TV_DELETE_TRIVIALLY_DEAD); |
7afe21cc | 6913 | /* First count the number of times each register is used. */ |
6699b754 JJ |
6914 | if (MAY_HAVE_DEBUG_INSNS) |
6915 | { | |
6916 | counts = XCNEWVEC (int, nreg * 3); | |
6917 | for (insn = insns; insn; insn = NEXT_INSN (insn)) | |
6918 | if (DEBUG_INSN_P (insn)) | |
6919 | count_reg_usage (INSN_VAR_LOCATION_LOC (insn), counts + nreg, | |
6920 | NULL_RTX, 1); | |
6921 | else if (INSN_P (insn)) | |
6922 | { | |
6923 | count_reg_usage (insn, counts, NULL_RTX, 1); | |
6924 | note_stores (PATTERN (insn), count_stores, counts + nreg * 2); | |
6925 | } | |
6926 | /* If there can be debug insns, COUNTS are 3 consecutive arrays. | |
6927 | First one counts how many times each pseudo is used outside | |
6928 | of debug insns, second counts how many times each pseudo is | |
6929 | used in debug insns and third counts how many times a pseudo | |
6930 | is stored. */ | |
6931 | } | |
6932 | else | |
6933 | { | |
6934 | counts = XCNEWVEC (int, nreg); | |
6935 | for (insn = insns; insn; insn = NEXT_INSN (insn)) | |
6936 | if (INSN_P (insn)) | |
6937 | count_reg_usage (insn, counts, NULL_RTX, 1); | |
6938 | /* If no debug insns can be present, COUNTS is just an array | |
6939 | which counts how many times each pseudo is used. */ | |
6940 | } | |
65e9fa10 KH |
6941 | /* Go from the last insn to the first and delete insns that only set unused |
6942 | registers or copy a register to itself. As we delete an insn, remove | |
6943 | usage counts for registers it uses. | |
0cedb36c | 6944 | |
65e9fa10 KH |
6945 | The first jump optimization pass may leave a real insn as the last |
6946 | insn in the function. We must not skip that insn or we may end | |
6699b754 JJ |
6947 | up deleting code that is not really dead. |
6948 | ||
6949 | If some otherwise unused register is only used in DEBUG_INSNs, | |
6950 | try to create a DEBUG_EXPR temporary and emit a DEBUG_INSN before | |
6951 | the setter. Then go through DEBUG_INSNs and if a DEBUG_EXPR | |
6952 | has been created for the unused register, replace it with | |
6953 | the DEBUG_EXPR, otherwise reset the DEBUG_INSN. */ | |
03ce14db | 6954 | for (insn = get_last_insn (); insn; insn = prev) |
65e9fa10 KH |
6955 | { |
6956 | int live_insn = 0; | |
7afe21cc | 6957 | |
03ce14db KH |
6958 | prev = PREV_INSN (insn); |
6959 | if (!INSN_P (insn)) | |
6960 | continue; | |
7afe21cc | 6961 | |
4a8cae83 | 6962 | live_insn = insn_live_p (insn, counts); |
7afe21cc | 6963 | |
65e9fa10 KH |
6964 | /* If this is a dead insn, delete it and show registers in it aren't |
6965 | being used. */ | |
7afe21cc | 6966 | |
6fb5fa3c | 6967 | if (! live_insn && dbg_cnt (delete_trivial_dead)) |
65e9fa10 | 6968 | { |
6699b754 JJ |
6969 | if (DEBUG_INSN_P (insn)) |
6970 | count_reg_usage (INSN_VAR_LOCATION_LOC (insn), counts + nreg, | |
6971 | NULL_RTX, -1); | |
6972 | else | |
6973 | { | |
6974 | rtx set; | |
6975 | if (MAY_HAVE_DEBUG_INSNS | |
6976 | && (set = single_set (insn)) != NULL_RTX | |
6977 | && is_dead_reg (SET_DEST (set), counts) | |
6978 | /* Used at least once in some DEBUG_INSN. */ | |
6979 | && counts[REGNO (SET_DEST (set)) + nreg] > 0 | |
6980 | /* And set exactly once. */ | |
6981 | && counts[REGNO (SET_DEST (set)) + nreg * 2] == 1 | |
6982 | && !side_effects_p (SET_SRC (set)) | |
6983 | && asm_noperands (PATTERN (insn)) < 0) | |
6984 | { | |
6985 | rtx dval, bind; | |
6986 | ||
6987 | /* Create DEBUG_EXPR (and DEBUG_EXPR_DECL). */ | |
6988 | dval = make_debug_expr_from_rtl (SET_DEST (set)); | |
6989 | ||
6990 | /* Emit a debug bind insn before the insn in which | |
6991 | reg dies. */ | |
6992 | bind = gen_rtx_VAR_LOCATION (GET_MODE (SET_DEST (set)), | |
6993 | DEBUG_EXPR_TREE_DECL (dval), | |
6994 | SET_SRC (set), | |
6995 | VAR_INIT_STATUS_INITIALIZED); | |
6996 | count_reg_usage (bind, counts + nreg, NULL_RTX, 1); | |
6997 | ||
6998 | bind = emit_debug_insn_before (bind, insn); | |
6999 | df_insn_rescan (bind); | |
7000 | ||
7001 | if (replacements == NULL) | |
7002 | replacements = XCNEWVEC (rtx, nreg); | |
7003 | replacements[REGNO (SET_DEST (set))] = dval; | |
7004 | } | |
7005 | ||
7006 | count_reg_usage (insn, counts, NULL_RTX, -1); | |
7007 | ndead++; | |
7008 | } | |
65e9fa10 | 7009 | delete_insn_and_edges (insn); |
65e9fa10 | 7010 | } |
68252e27 | 7011 | } |
4da896b2 | 7012 | |
6699b754 JJ |
7013 | if (MAY_HAVE_DEBUG_INSNS) |
7014 | { | |
7015 | struct dead_debug_insn_data ddid; | |
7016 | ddid.counts = counts; | |
7017 | ddid.replacements = replacements; | |
7018 | for (insn = get_last_insn (); insn; insn = PREV_INSN (insn)) | |
7019 | if (DEBUG_INSN_P (insn)) | |
7020 | { | |
7021 | /* If this debug insn references a dead register that wasn't replaced | |
7022 | with an DEBUG_EXPR, reset the DEBUG_INSN. */ | |
7023 | ddid.seen_repl = false; | |
7024 | if (for_each_rtx (&INSN_VAR_LOCATION_LOC (insn), | |
7025 | is_dead_debug_insn, &ddid)) | |
7026 | { | |
7027 | INSN_VAR_LOCATION_LOC (insn) = gen_rtx_UNKNOWN_VAR_LOC (); | |
7028 | df_insn_rescan (insn); | |
7029 | } | |
7030 | else if (ddid.seen_repl) | |
7031 | { | |
7032 | INSN_VAR_LOCATION_LOC (insn) | |
7033 | = simplify_replace_fn_rtx (INSN_VAR_LOCATION_LOC (insn), | |
7034 | NULL_RTX, replace_dead_reg, | |
7035 | replacements); | |
7036 | df_insn_rescan (insn); | |
7037 | } | |
7038 | } | |
04695783 | 7039 | free (replacements); |
6699b754 JJ |
7040 | } |
7041 | ||
c263766c | 7042 | if (dump_file && ndead) |
65e9fa10 KH |
7043 | fprintf (dump_file, "Deleted %i trivially dead insns\n", |
7044 | ndead); | |
4da896b2 MM |
7045 | /* Clean up. */ |
7046 | free (counts); | |
3dec4024 JH |
7047 | timevar_pop (TV_DELETE_TRIVIALLY_DEAD); |
7048 | return ndead; | |
7afe21cc | 7049 | } |
e129d93a ILT |
7050 | |
7051 | /* This function is called via for_each_rtx. The argument, NEWREG, is | |
7052 | a condition code register with the desired mode. If we are looking | |
7053 | at the same register in a different mode, replace it with | |
7054 | NEWREG. */ | |
7055 | ||
7056 | static int | |
7057 | cse_change_cc_mode (rtx *loc, void *data) | |
7058 | { | |
fc188d37 | 7059 | struct change_cc_mode_args* args = (struct change_cc_mode_args*)data; |
e129d93a ILT |
7060 | |
7061 | if (*loc | |
f8cfc6aa | 7062 | && REG_P (*loc) |
fc188d37 AK |
7063 | && REGNO (*loc) == REGNO (args->newreg) |
7064 | && GET_MODE (*loc) != GET_MODE (args->newreg)) | |
e129d93a | 7065 | { |
fc188d37 | 7066 | validate_change (args->insn, loc, args->newreg, 1); |
b8698a0f | 7067 | |
e129d93a ILT |
7068 | return -1; |
7069 | } | |
7070 | return 0; | |
7071 | } | |
7072 | ||
fc188d37 AK |
7073 | /* Change the mode of any reference to the register REGNO (NEWREG) to |
7074 | GET_MODE (NEWREG) in INSN. */ | |
7075 | ||
7076 | static void | |
7077 | cse_change_cc_mode_insn (rtx insn, rtx newreg) | |
7078 | { | |
7079 | struct change_cc_mode_args args; | |
7080 | int success; | |
7081 | ||
7082 | if (!INSN_P (insn)) | |
7083 | return; | |
7084 | ||
7085 | args.insn = insn; | |
7086 | args.newreg = newreg; | |
b8698a0f | 7087 | |
fc188d37 AK |
7088 | for_each_rtx (&PATTERN (insn), cse_change_cc_mode, &args); |
7089 | for_each_rtx (®_NOTES (insn), cse_change_cc_mode, &args); | |
b8698a0f | 7090 | |
fc188d37 AK |
7091 | /* If the following assertion was triggered, there is most probably |
7092 | something wrong with the cc_modes_compatible back end function. | |
7093 | CC modes only can be considered compatible if the insn - with the mode | |
7094 | replaced by any of the compatible modes - can still be recognized. */ | |
7095 | success = apply_change_group (); | |
7096 | gcc_assert (success); | |
7097 | } | |
7098 | ||
e129d93a ILT |
7099 | /* Change the mode of any reference to the register REGNO (NEWREG) to |
7100 | GET_MODE (NEWREG), starting at START. Stop before END. Stop at | |
2e802a6f | 7101 | any instruction which modifies NEWREG. */ |
e129d93a ILT |
7102 | |
7103 | static void | |
7104 | cse_change_cc_mode_insns (rtx start, rtx end, rtx newreg) | |
7105 | { | |
7106 | rtx insn; | |
7107 | ||
7108 | for (insn = start; insn != end; insn = NEXT_INSN (insn)) | |
7109 | { | |
7110 | if (! INSN_P (insn)) | |
7111 | continue; | |
7112 | ||
2e802a6f | 7113 | if (reg_set_p (newreg, insn)) |
e129d93a ILT |
7114 | return; |
7115 | ||
fc188d37 | 7116 | cse_change_cc_mode_insn (insn, newreg); |
e129d93a ILT |
7117 | } |
7118 | } | |
7119 | ||
7120 | /* BB is a basic block which finishes with CC_REG as a condition code | |
7121 | register which is set to CC_SRC. Look through the successors of BB | |
7122 | to find blocks which have a single predecessor (i.e., this one), | |
7123 | and look through those blocks for an assignment to CC_REG which is | |
7124 | equivalent to CC_SRC. CAN_CHANGE_MODE indicates whether we are | |
7125 | permitted to change the mode of CC_SRC to a compatible mode. This | |
7126 | returns VOIDmode if no equivalent assignments were found. | |
7127 | Otherwise it returns the mode which CC_SRC should wind up with. | |
31e9ebaf JJ |
7128 | ORIG_BB should be the same as BB in the outermost cse_cc_succs call, |
7129 | but is passed unmodified down to recursive calls in order to prevent | |
7130 | endless recursion. | |
e129d93a ILT |
7131 | |
7132 | The main complexity in this function is handling the mode issues. | |
7133 | We may have more than one duplicate which we can eliminate, and we | |
7134 | try to find a mode which will work for multiple duplicates. */ | |
7135 | ||
7136 | static enum machine_mode | |
31e9ebaf JJ |
7137 | cse_cc_succs (basic_block bb, basic_block orig_bb, rtx cc_reg, rtx cc_src, |
7138 | bool can_change_mode) | |
e129d93a ILT |
7139 | { |
7140 | bool found_equiv; | |
7141 | enum machine_mode mode; | |
7142 | unsigned int insn_count; | |
7143 | edge e; | |
7144 | rtx insns[2]; | |
7145 | enum machine_mode modes[2]; | |
7146 | rtx last_insns[2]; | |
7147 | unsigned int i; | |
7148 | rtx newreg; | |
628f6a4e | 7149 | edge_iterator ei; |
e129d93a ILT |
7150 | |
7151 | /* We expect to have two successors. Look at both before picking | |
7152 | the final mode for the comparison. If we have more successors | |
7153 | (i.e., some sort of table jump, although that seems unlikely), | |
7154 | then we require all beyond the first two to use the same | |
7155 | mode. */ | |
7156 | ||
7157 | found_equiv = false; | |
7158 | mode = GET_MODE (cc_src); | |
7159 | insn_count = 0; | |
628f6a4e | 7160 | FOR_EACH_EDGE (e, ei, bb->succs) |
e129d93a ILT |
7161 | { |
7162 | rtx insn; | |
7163 | rtx end; | |
7164 | ||
7165 | if (e->flags & EDGE_COMPLEX) | |
7166 | continue; | |
7167 | ||
628f6a4e | 7168 | if (EDGE_COUNT (e->dest->preds) != 1 |
fefa31b5 | 7169 | || e->dest == EXIT_BLOCK_PTR_FOR_FN (cfun) |
31e9ebaf JJ |
7170 | /* Avoid endless recursion on unreachable blocks. */ |
7171 | || e->dest == orig_bb) | |
e129d93a ILT |
7172 | continue; |
7173 | ||
7174 | end = NEXT_INSN (BB_END (e->dest)); | |
7175 | for (insn = BB_HEAD (e->dest); insn != end; insn = NEXT_INSN (insn)) | |
7176 | { | |
7177 | rtx set; | |
7178 | ||
7179 | if (! INSN_P (insn)) | |
7180 | continue; | |
7181 | ||
7182 | /* If CC_SRC is modified, we have to stop looking for | |
7183 | something which uses it. */ | |
7184 | if (modified_in_p (cc_src, insn)) | |
7185 | break; | |
7186 | ||
7187 | /* Check whether INSN sets CC_REG to CC_SRC. */ | |
7188 | set = single_set (insn); | |
7189 | if (set | |
f8cfc6aa | 7190 | && REG_P (SET_DEST (set)) |
e129d93a ILT |
7191 | && REGNO (SET_DEST (set)) == REGNO (cc_reg)) |
7192 | { | |
7193 | bool found; | |
7194 | enum machine_mode set_mode; | |
7195 | enum machine_mode comp_mode; | |
7196 | ||
7197 | found = false; | |
7198 | set_mode = GET_MODE (SET_SRC (set)); | |
7199 | comp_mode = set_mode; | |
7200 | if (rtx_equal_p (cc_src, SET_SRC (set))) | |
7201 | found = true; | |
7202 | else if (GET_CODE (cc_src) == COMPARE | |
7203 | && GET_CODE (SET_SRC (set)) == COMPARE | |
1f44254c | 7204 | && mode != set_mode |
e129d93a ILT |
7205 | && rtx_equal_p (XEXP (cc_src, 0), |
7206 | XEXP (SET_SRC (set), 0)) | |
7207 | && rtx_equal_p (XEXP (cc_src, 1), | |
7208 | XEXP (SET_SRC (set), 1))) | |
b8698a0f | 7209 | |
e129d93a | 7210 | { |
5fd9b178 | 7211 | comp_mode = targetm.cc_modes_compatible (mode, set_mode); |
e129d93a ILT |
7212 | if (comp_mode != VOIDmode |
7213 | && (can_change_mode || comp_mode == mode)) | |
7214 | found = true; | |
7215 | } | |
7216 | ||
7217 | if (found) | |
7218 | { | |
7219 | found_equiv = true; | |
1f44254c | 7220 | if (insn_count < ARRAY_SIZE (insns)) |
e129d93a ILT |
7221 | { |
7222 | insns[insn_count] = insn; | |
7223 | modes[insn_count] = set_mode; | |
7224 | last_insns[insn_count] = end; | |
7225 | ++insn_count; | |
7226 | ||
1f44254c ILT |
7227 | if (mode != comp_mode) |
7228 | { | |
341c100f | 7229 | gcc_assert (can_change_mode); |
1f44254c | 7230 | mode = comp_mode; |
fc188d37 AK |
7231 | |
7232 | /* The modified insn will be re-recognized later. */ | |
1f44254c ILT |
7233 | PUT_MODE (cc_src, mode); |
7234 | } | |
e129d93a ILT |
7235 | } |
7236 | else | |
7237 | { | |
7238 | if (set_mode != mode) | |
1f44254c ILT |
7239 | { |
7240 | /* We found a matching expression in the | |
7241 | wrong mode, but we don't have room to | |
7242 | store it in the array. Punt. This case | |
7243 | should be rare. */ | |
7244 | break; | |
7245 | } | |
e129d93a ILT |
7246 | /* INSN sets CC_REG to a value equal to CC_SRC |
7247 | with the right mode. We can simply delete | |
7248 | it. */ | |
7249 | delete_insn (insn); | |
7250 | } | |
7251 | ||
7252 | /* We found an instruction to delete. Keep looking, | |
7253 | in the hopes of finding a three-way jump. */ | |
7254 | continue; | |
7255 | } | |
7256 | ||
7257 | /* We found an instruction which sets the condition | |
7258 | code, so don't look any farther. */ | |
7259 | break; | |
7260 | } | |
7261 | ||
7262 | /* If INSN sets CC_REG in some other way, don't look any | |
7263 | farther. */ | |
7264 | if (reg_set_p (cc_reg, insn)) | |
7265 | break; | |
7266 | } | |
7267 | ||
7268 | /* If we fell off the bottom of the block, we can keep looking | |
7269 | through successors. We pass CAN_CHANGE_MODE as false because | |
7270 | we aren't prepared to handle compatibility between the | |
7271 | further blocks and this block. */ | |
7272 | if (insn == end) | |
7273 | { | |
1f44254c ILT |
7274 | enum machine_mode submode; |
7275 | ||
31e9ebaf | 7276 | submode = cse_cc_succs (e->dest, orig_bb, cc_reg, cc_src, false); |
1f44254c ILT |
7277 | if (submode != VOIDmode) |
7278 | { | |
341c100f | 7279 | gcc_assert (submode == mode); |
1f44254c ILT |
7280 | found_equiv = true; |
7281 | can_change_mode = false; | |
7282 | } | |
e129d93a ILT |
7283 | } |
7284 | } | |
7285 | ||
7286 | if (! found_equiv) | |
7287 | return VOIDmode; | |
7288 | ||
7289 | /* Now INSN_COUNT is the number of instructions we found which set | |
7290 | CC_REG to a value equivalent to CC_SRC. The instructions are in | |
7291 | INSNS. The modes used by those instructions are in MODES. */ | |
7292 | ||
7293 | newreg = NULL_RTX; | |
7294 | for (i = 0; i < insn_count; ++i) | |
7295 | { | |
7296 | if (modes[i] != mode) | |
7297 | { | |
7298 | /* We need to change the mode of CC_REG in INSNS[i] and | |
7299 | subsequent instructions. */ | |
7300 | if (! newreg) | |
7301 | { | |
7302 | if (GET_MODE (cc_reg) == mode) | |
7303 | newreg = cc_reg; | |
7304 | else | |
7305 | newreg = gen_rtx_REG (mode, REGNO (cc_reg)); | |
7306 | } | |
7307 | cse_change_cc_mode_insns (NEXT_INSN (insns[i]), last_insns[i], | |
7308 | newreg); | |
7309 | } | |
7310 | ||
0beb3d66 | 7311 | delete_insn_and_edges (insns[i]); |
e129d93a ILT |
7312 | } |
7313 | ||
7314 | return mode; | |
7315 | } | |
7316 | ||
7317 | /* If we have a fixed condition code register (or two), walk through | |
7318 | the instructions and try to eliminate duplicate assignments. */ | |
7319 | ||
cab2264d | 7320 | static void |
e129d93a ILT |
7321 | cse_condition_code_reg (void) |
7322 | { | |
7323 | unsigned int cc_regno_1; | |
7324 | unsigned int cc_regno_2; | |
7325 | rtx cc_reg_1; | |
7326 | rtx cc_reg_2; | |
7327 | basic_block bb; | |
7328 | ||
5fd9b178 | 7329 | if (! targetm.fixed_condition_code_regs (&cc_regno_1, &cc_regno_2)) |
e129d93a ILT |
7330 | return; |
7331 | ||
7332 | cc_reg_1 = gen_rtx_REG (CCmode, cc_regno_1); | |
7333 | if (cc_regno_2 != INVALID_REGNUM) | |
7334 | cc_reg_2 = gen_rtx_REG (CCmode, cc_regno_2); | |
7335 | else | |
7336 | cc_reg_2 = NULL_RTX; | |
7337 | ||
7338 | FOR_EACH_BB (bb) | |
7339 | { | |
7340 | rtx last_insn; | |
7341 | rtx cc_reg; | |
7342 | rtx insn; | |
7343 | rtx cc_src_insn; | |
7344 | rtx cc_src; | |
7345 | enum machine_mode mode; | |
1f44254c | 7346 | enum machine_mode orig_mode; |
e129d93a ILT |
7347 | |
7348 | /* Look for blocks which end with a conditional jump based on a | |
7349 | condition code register. Then look for the instruction which | |
7350 | sets the condition code register. Then look through the | |
7351 | successor blocks for instructions which set the condition | |
7352 | code register to the same value. There are other possible | |
7353 | uses of the condition code register, but these are by far the | |
7354 | most common and the ones which we are most likely to be able | |
7355 | to optimize. */ | |
7356 | ||
7357 | last_insn = BB_END (bb); | |
4b4bf941 | 7358 | if (!JUMP_P (last_insn)) |
e129d93a ILT |
7359 | continue; |
7360 | ||
7361 | if (reg_referenced_p (cc_reg_1, PATTERN (last_insn))) | |
7362 | cc_reg = cc_reg_1; | |
7363 | else if (cc_reg_2 && reg_referenced_p (cc_reg_2, PATTERN (last_insn))) | |
7364 | cc_reg = cc_reg_2; | |
7365 | else | |
7366 | continue; | |
7367 | ||
7368 | cc_src_insn = NULL_RTX; | |
7369 | cc_src = NULL_RTX; | |
7370 | for (insn = PREV_INSN (last_insn); | |
7371 | insn && insn != PREV_INSN (BB_HEAD (bb)); | |
7372 | insn = PREV_INSN (insn)) | |
7373 | { | |
7374 | rtx set; | |
7375 | ||
7376 | if (! INSN_P (insn)) | |
7377 | continue; | |
7378 | set = single_set (insn); | |
7379 | if (set | |
f8cfc6aa | 7380 | && REG_P (SET_DEST (set)) |
e129d93a ILT |
7381 | && REGNO (SET_DEST (set)) == REGNO (cc_reg)) |
7382 | { | |
7383 | cc_src_insn = insn; | |
7384 | cc_src = SET_SRC (set); | |
7385 | break; | |
7386 | } | |
7387 | else if (reg_set_p (cc_reg, insn)) | |
7388 | break; | |
7389 | } | |
7390 | ||
7391 | if (! cc_src_insn) | |
7392 | continue; | |
7393 | ||
7394 | if (modified_between_p (cc_src, cc_src_insn, NEXT_INSN (last_insn))) | |
7395 | continue; | |
7396 | ||
7397 | /* Now CC_REG is a condition code register used for a | |
7398 | conditional jump at the end of the block, and CC_SRC, in | |
7399 | CC_SRC_INSN, is the value to which that condition code | |
7400 | register is set, and CC_SRC is still meaningful at the end of | |
7401 | the basic block. */ | |
7402 | ||
1f44254c | 7403 | orig_mode = GET_MODE (cc_src); |
31e9ebaf | 7404 | mode = cse_cc_succs (bb, bb, cc_reg, cc_src, true); |
1f44254c | 7405 | if (mode != VOIDmode) |
e129d93a | 7406 | { |
341c100f | 7407 | gcc_assert (mode == GET_MODE (cc_src)); |
1f44254c | 7408 | if (mode != orig_mode) |
2e802a6f KH |
7409 | { |
7410 | rtx newreg = gen_rtx_REG (mode, REGNO (cc_reg)); | |
7411 | ||
fc188d37 | 7412 | cse_change_cc_mode_insn (cc_src_insn, newreg); |
2e802a6f KH |
7413 | |
7414 | /* Do the same in the following insns that use the | |
7415 | current value of CC_REG within BB. */ | |
7416 | cse_change_cc_mode_insns (NEXT_INSN (cc_src_insn), | |
7417 | NEXT_INSN (last_insn), | |
7418 | newreg); | |
7419 | } | |
e129d93a ILT |
7420 | } |
7421 | } | |
7422 | } | |
ef330312 PB |
7423 | \f |
7424 | ||
7425 | /* Perform common subexpression elimination. Nonzero value from | |
7426 | `cse_main' means that jumps were simplified and some code may now | |
7427 | be unreachable, so do jump optimization again. */ | |
7428 | static bool | |
7429 | gate_handle_cse (void) | |
7430 | { | |
7431 | return optimize > 0; | |
7432 | } | |
7433 | ||
c2924966 | 7434 | static unsigned int |
ef330312 PB |
7435 | rest_of_handle_cse (void) |
7436 | { | |
7437 | int tem; | |
6fb5fa3c | 7438 | |
ef330312 | 7439 | if (dump_file) |
5b4fdb20 | 7440 | dump_flow_info (dump_file, dump_flags); |
ef330312 | 7441 | |
10d22567 | 7442 | tem = cse_main (get_insns (), max_reg_num ()); |
ef330312 PB |
7443 | |
7444 | /* If we are not running more CSE passes, then we are no longer | |
7445 | expecting CSE to be run. But always rerun it in a cheap mode. */ | |
7446 | cse_not_expected = !flag_rerun_cse_after_loop && !flag_gcse; | |
7447 | ||
2aac3a01 EB |
7448 | if (tem == 2) |
7449 | { | |
7450 | timevar_push (TV_JUMP); | |
7451 | rebuild_jump_labels (get_insns ()); | |
7d776ee2 | 7452 | cleanup_cfg (CLEANUP_CFG_CHANGED); |
2aac3a01 EB |
7453 | timevar_pop (TV_JUMP); |
7454 | } | |
7455 | else if (tem == 1 || optimize > 1) | |
6fb5fa3c | 7456 | cleanup_cfg (0); |
932ad4d9 | 7457 | |
c2924966 | 7458 | return 0; |
ef330312 PB |
7459 | } |
7460 | ||
27a4cd48 DM |
7461 | namespace { |
7462 | ||
7463 | const pass_data pass_data_cse = | |
ef330312 | 7464 | { |
27a4cd48 DM |
7465 | RTL_PASS, /* type */ |
7466 | "cse1", /* name */ | |
7467 | OPTGROUP_NONE, /* optinfo_flags */ | |
7468 | true, /* has_gate */ | |
7469 | true, /* has_execute */ | |
7470 | TV_CSE, /* tv_id */ | |
7471 | 0, /* properties_required */ | |
7472 | 0, /* properties_provided */ | |
7473 | 0, /* properties_destroyed */ | |
7474 | 0, /* todo_flags_start */ | |
7475 | ( TODO_df_finish | TODO_verify_rtl_sharing | |
7476 | | TODO_verify_flow ), /* todo_flags_finish */ | |
ef330312 PB |
7477 | }; |
7478 | ||
27a4cd48 DM |
7479 | class pass_cse : public rtl_opt_pass |
7480 | { | |
7481 | public: | |
c3284718 RS |
7482 | pass_cse (gcc::context *ctxt) |
7483 | : rtl_opt_pass (pass_data_cse, ctxt) | |
27a4cd48 DM |
7484 | {} |
7485 | ||
7486 | /* opt_pass methods: */ | |
7487 | bool gate () { return gate_handle_cse (); } | |
7488 | unsigned int execute () { return rest_of_handle_cse (); } | |
7489 | ||
7490 | }; // class pass_cse | |
7491 | ||
7492 | } // anon namespace | |
7493 | ||
7494 | rtl_opt_pass * | |
7495 | make_pass_cse (gcc::context *ctxt) | |
7496 | { | |
7497 | return new pass_cse (ctxt); | |
7498 | } | |
7499 | ||
ef330312 PB |
7500 | |
7501 | static bool | |
7502 | gate_handle_cse2 (void) | |
7503 | { | |
7504 | return optimize > 0 && flag_rerun_cse_after_loop; | |
7505 | } | |
7506 | ||
7507 | /* Run second CSE pass after loop optimizations. */ | |
c2924966 | 7508 | static unsigned int |
ef330312 PB |
7509 | rest_of_handle_cse2 (void) |
7510 | { | |
7511 | int tem; | |
7512 | ||
7513 | if (dump_file) | |
5b4fdb20 | 7514 | dump_flow_info (dump_file, dump_flags); |
ef330312 | 7515 | |
10d22567 | 7516 | tem = cse_main (get_insns (), max_reg_num ()); |
ef330312 PB |
7517 | |
7518 | /* Run a pass to eliminate duplicated assignments to condition code | |
7519 | registers. We have to run this after bypass_jumps, because it | |
7520 | makes it harder for that pass to determine whether a jump can be | |
7521 | bypassed safely. */ | |
7522 | cse_condition_code_reg (); | |
7523 | ||
ef330312 PB |
7524 | delete_trivially_dead_insns (get_insns (), max_reg_num ()); |
7525 | ||
2aac3a01 | 7526 | if (tem == 2) |
ef330312 PB |
7527 | { |
7528 | timevar_push (TV_JUMP); | |
7529 | rebuild_jump_labels (get_insns ()); | |
7d776ee2 | 7530 | cleanup_cfg (CLEANUP_CFG_CHANGED); |
ef330312 PB |
7531 | timevar_pop (TV_JUMP); |
7532 | } | |
2aac3a01 EB |
7533 | else if (tem == 1) |
7534 | cleanup_cfg (0); | |
7535 | ||
ef330312 | 7536 | cse_not_expected = 1; |
c2924966 | 7537 | return 0; |
ef330312 PB |
7538 | } |
7539 | ||
7540 | ||
27a4cd48 DM |
7541 | namespace { |
7542 | ||
7543 | const pass_data pass_data_cse2 = | |
ef330312 | 7544 | { |
27a4cd48 DM |
7545 | RTL_PASS, /* type */ |
7546 | "cse2", /* name */ | |
7547 | OPTGROUP_NONE, /* optinfo_flags */ | |
7548 | true, /* has_gate */ | |
7549 | true, /* has_execute */ | |
7550 | TV_CSE2, /* tv_id */ | |
7551 | 0, /* properties_required */ | |
7552 | 0, /* properties_provided */ | |
7553 | 0, /* properties_destroyed */ | |
7554 | 0, /* todo_flags_start */ | |
7555 | ( TODO_df_finish | TODO_verify_rtl_sharing | |
7556 | | TODO_verify_flow ), /* todo_flags_finish */ | |
ef330312 | 7557 | }; |
5f39ad47 | 7558 | |
27a4cd48 DM |
7559 | class pass_cse2 : public rtl_opt_pass |
7560 | { | |
7561 | public: | |
c3284718 RS |
7562 | pass_cse2 (gcc::context *ctxt) |
7563 | : rtl_opt_pass (pass_data_cse2, ctxt) | |
27a4cd48 DM |
7564 | {} |
7565 | ||
7566 | /* opt_pass methods: */ | |
7567 | bool gate () { return gate_handle_cse2 (); } | |
7568 | unsigned int execute () { return rest_of_handle_cse2 (); } | |
7569 | ||
7570 | }; // class pass_cse2 | |
7571 | ||
7572 | } // anon namespace | |
7573 | ||
7574 | rtl_opt_pass * | |
7575 | make_pass_cse2 (gcc::context *ctxt) | |
7576 | { | |
7577 | return new pass_cse2 (ctxt); | |
7578 | } | |
7579 | ||
5f39ad47 SB |
7580 | static bool |
7581 | gate_handle_cse_after_global_opts (void) | |
7582 | { | |
7583 | return optimize > 0 && flag_rerun_cse_after_global_opts; | |
7584 | } | |
7585 | ||
7586 | /* Run second CSE pass after loop optimizations. */ | |
7587 | static unsigned int | |
7588 | rest_of_handle_cse_after_global_opts (void) | |
7589 | { | |
7590 | int save_cfj; | |
7591 | int tem; | |
7592 | ||
7593 | /* We only want to do local CSE, so don't follow jumps. */ | |
7594 | save_cfj = flag_cse_follow_jumps; | |
7595 | flag_cse_follow_jumps = 0; | |
7596 | ||
7597 | rebuild_jump_labels (get_insns ()); | |
7598 | tem = cse_main (get_insns (), max_reg_num ()); | |
7599 | purge_all_dead_edges (); | |
7600 | delete_trivially_dead_insns (get_insns (), max_reg_num ()); | |
7601 | ||
7602 | cse_not_expected = !flag_rerun_cse_after_loop; | |
7603 | ||
7604 | /* If cse altered any jumps, rerun jump opts to clean things up. */ | |
7605 | if (tem == 2) | |
7606 | { | |
7607 | timevar_push (TV_JUMP); | |
7608 | rebuild_jump_labels (get_insns ()); | |
7d776ee2 | 7609 | cleanup_cfg (CLEANUP_CFG_CHANGED); |
5f39ad47 SB |
7610 | timevar_pop (TV_JUMP); |
7611 | } | |
7612 | else if (tem == 1) | |
7613 | cleanup_cfg (0); | |
7614 | ||
7615 | flag_cse_follow_jumps = save_cfj; | |
7616 | return 0; | |
7617 | } | |
7618 | ||
27a4cd48 DM |
7619 | namespace { |
7620 | ||
7621 | const pass_data pass_data_cse_after_global_opts = | |
5f39ad47 | 7622 | { |
27a4cd48 DM |
7623 | RTL_PASS, /* type */ |
7624 | "cse_local", /* name */ | |
7625 | OPTGROUP_NONE, /* optinfo_flags */ | |
7626 | true, /* has_gate */ | |
7627 | true, /* has_execute */ | |
7628 | TV_CSE, /* tv_id */ | |
7629 | 0, /* properties_required */ | |
7630 | 0, /* properties_provided */ | |
7631 | 0, /* properties_destroyed */ | |
7632 | 0, /* todo_flags_start */ | |
7633 | ( TODO_df_finish | TODO_verify_rtl_sharing | |
7634 | | TODO_verify_flow ), /* todo_flags_finish */ | |
5f39ad47 | 7635 | }; |
27a4cd48 DM |
7636 | |
7637 | class pass_cse_after_global_opts : public rtl_opt_pass | |
7638 | { | |
7639 | public: | |
c3284718 RS |
7640 | pass_cse_after_global_opts (gcc::context *ctxt) |
7641 | : rtl_opt_pass (pass_data_cse_after_global_opts, ctxt) | |
27a4cd48 DM |
7642 | {} |
7643 | ||
7644 | /* opt_pass methods: */ | |
7645 | bool gate () { return gate_handle_cse_after_global_opts (); } | |
7646 | unsigned int execute () { | |
7647 | return rest_of_handle_cse_after_global_opts (); | |
7648 | } | |
7649 | ||
7650 | }; // class pass_cse_after_global_opts | |
7651 | ||
7652 | } // anon namespace | |
7653 | ||
7654 | rtl_opt_pass * | |
7655 | make_pass_cse_after_global_opts (gcc::context *ctxt) | |
7656 | { | |
7657 | return new pass_cse_after_global_opts (ctxt); | |
7658 | } |