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7afe21cc | 1 | /* Common subexpression elimination for GNU compiler. |
5e7b4e25 JL |
2 | Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998 |
3 | 1999, 2000 Free Software Foundation, Inc. | |
7afe21cc RK |
4 | |
5 | This file is part of GNU CC. | |
6 | ||
7 | GNU CC is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2, or (at your option) | |
10 | any later version. | |
11 | ||
12 | GNU CC is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with GNU CC; see the file COPYING. If not, write to | |
940d9d63 RK |
19 | the Free Software Foundation, 59 Temple Place - Suite 330, |
20 | Boston, MA 02111-1307, USA. */ | |
7afe21cc | 21 | |
7afe21cc | 22 | #include "config.h" |
670ee920 KG |
23 | /* stdio.h must precede rtl.h for FFS. */ |
24 | #include "system.h" | |
50b2596f | 25 | #include <setjmp.h> |
9c3b4c8b | 26 | |
7afe21cc | 27 | #include "rtl.h" |
6baf1cc8 | 28 | #include "tm_p.h" |
7afe21cc RK |
29 | #include "regs.h" |
30 | #include "hard-reg-set.h" | |
630c79be | 31 | #include "basic-block.h" |
7afe21cc RK |
32 | #include "flags.h" |
33 | #include "real.h" | |
34 | #include "insn-config.h" | |
35 | #include "recog.h" | |
49ad7cfa | 36 | #include "function.h" |
956d6950 | 37 | #include "expr.h" |
50b2596f KG |
38 | #include "toplev.h" |
39 | #include "output.h" | |
1497faf6 | 40 | #include "ggc.h" |
7afe21cc RK |
41 | |
42 | /* The basic idea of common subexpression elimination is to go | |
43 | through the code, keeping a record of expressions that would | |
44 | have the same value at the current scan point, and replacing | |
45 | expressions encountered with the cheapest equivalent expression. | |
46 | ||
47 | It is too complicated to keep track of the different possibilities | |
e48a7fbe JL |
48 | when control paths merge in this code; so, at each label, we forget all |
49 | that is known and start fresh. This can be described as processing each | |
50 | extended basic block separately. We have a separate pass to perform | |
51 | global CSE. | |
52 | ||
53 | Note CSE can turn a conditional or computed jump into a nop or | |
54 | an unconditional jump. When this occurs we arrange to run the jump | |
55 | optimizer after CSE to delete the unreachable code. | |
7afe21cc RK |
56 | |
57 | We use two data structures to record the equivalent expressions: | |
1bb98cec DM |
58 | a hash table for most expressions, and a vector of "quantity |
59 | numbers" to record equivalent (pseudo) registers. | |
7afe21cc RK |
60 | |
61 | The use of the special data structure for registers is desirable | |
62 | because it is faster. It is possible because registers references | |
63 | contain a fairly small number, the register number, taken from | |
64 | a contiguously allocated series, and two register references are | |
65 | identical if they have the same number. General expressions | |
66 | do not have any such thing, so the only way to retrieve the | |
67 | information recorded on an expression other than a register | |
68 | is to keep it in a hash table. | |
69 | ||
70 | Registers and "quantity numbers": | |
278a83b2 | 71 | |
7afe21cc RK |
72 | At the start of each basic block, all of the (hardware and pseudo) |
73 | registers used in the function are given distinct quantity | |
74 | numbers to indicate their contents. During scan, when the code | |
75 | copies one register into another, we copy the quantity number. | |
76 | When a register is loaded in any other way, we allocate a new | |
77 | quantity number to describe the value generated by this operation. | |
78 | `reg_qty' records what quantity a register is currently thought | |
79 | of as containing. | |
80 | ||
81 | All real quantity numbers are greater than or equal to `max_reg'. | |
82 | If register N has not been assigned a quantity, reg_qty[N] will equal N. | |
83 | ||
1bb98cec DM |
84 | Quantity numbers below `max_reg' do not exist and none of the `qty_table' |
85 | entries should be referenced with an index below `max_reg'. | |
7afe21cc RK |
86 | |
87 | We also maintain a bidirectional chain of registers for each | |
1bb98cec DM |
88 | quantity number. The `qty_table` members `first_reg' and `last_reg', |
89 | and `reg_eqv_table' members `next' and `prev' hold these chains. | |
7afe21cc RK |
90 | |
91 | The first register in a chain is the one whose lifespan is least local. | |
92 | Among equals, it is the one that was seen first. | |
93 | We replace any equivalent register with that one. | |
94 | ||
95 | If two registers have the same quantity number, it must be true that | |
1bb98cec | 96 | REG expressions with qty_table `mode' must be in the hash table for both |
7afe21cc RK |
97 | registers and must be in the same class. |
98 | ||
99 | The converse is not true. Since hard registers may be referenced in | |
100 | any mode, two REG expressions might be equivalent in the hash table | |
101 | but not have the same quantity number if the quantity number of one | |
102 | of the registers is not the same mode as those expressions. | |
278a83b2 | 103 | |
7afe21cc RK |
104 | Constants and quantity numbers |
105 | ||
106 | When a quantity has a known constant value, that value is stored | |
1bb98cec | 107 | in the appropriate qty_table `const_rtx'. This is in addition to |
7afe21cc RK |
108 | putting the constant in the hash table as is usual for non-regs. |
109 | ||
d45cf215 | 110 | Whether a reg or a constant is preferred is determined by the configuration |
7afe21cc RK |
111 | macro CONST_COSTS and will often depend on the constant value. In any |
112 | event, expressions containing constants can be simplified, by fold_rtx. | |
113 | ||
114 | When a quantity has a known nearly constant value (such as an address | |
1bb98cec DM |
115 | of a stack slot), that value is stored in the appropriate qty_table |
116 | `const_rtx'. | |
7afe21cc RK |
117 | |
118 | Integer constants don't have a machine mode. However, cse | |
119 | determines the intended machine mode from the destination | |
120 | of the instruction that moves the constant. The machine mode | |
121 | is recorded in the hash table along with the actual RTL | |
122 | constant expression so that different modes are kept separate. | |
123 | ||
124 | Other expressions: | |
125 | ||
126 | To record known equivalences among expressions in general | |
127 | we use a hash table called `table'. It has a fixed number of buckets | |
128 | that contain chains of `struct table_elt' elements for expressions. | |
129 | These chains connect the elements whose expressions have the same | |
130 | hash codes. | |
131 | ||
132 | Other chains through the same elements connect the elements which | |
133 | currently have equivalent values. | |
134 | ||
135 | Register references in an expression are canonicalized before hashing | |
1bb98cec | 136 | the expression. This is done using `reg_qty' and qty_table `first_reg'. |
7afe21cc RK |
137 | The hash code of a register reference is computed using the quantity |
138 | number, not the register number. | |
139 | ||
140 | When the value of an expression changes, it is necessary to remove from the | |
141 | hash table not just that expression but all expressions whose values | |
142 | could be different as a result. | |
143 | ||
144 | 1. If the value changing is in memory, except in special cases | |
145 | ANYTHING referring to memory could be changed. That is because | |
146 | nobody knows where a pointer does not point. | |
147 | The function `invalidate_memory' removes what is necessary. | |
148 | ||
149 | The special cases are when the address is constant or is | |
150 | a constant plus a fixed register such as the frame pointer | |
151 | or a static chain pointer. When such addresses are stored in, | |
152 | we can tell exactly which other such addresses must be invalidated | |
153 | due to overlap. `invalidate' does this. | |
154 | All expressions that refer to non-constant | |
155 | memory addresses are also invalidated. `invalidate_memory' does this. | |
156 | ||
157 | 2. If the value changing is a register, all expressions | |
158 | containing references to that register, and only those, | |
159 | must be removed. | |
160 | ||
161 | Because searching the entire hash table for expressions that contain | |
162 | a register is very slow, we try to figure out when it isn't necessary. | |
163 | Precisely, this is necessary only when expressions have been | |
164 | entered in the hash table using this register, and then the value has | |
165 | changed, and then another expression wants to be added to refer to | |
166 | the register's new value. This sequence of circumstances is rare | |
167 | within any one basic block. | |
168 | ||
169 | The vectors `reg_tick' and `reg_in_table' are used to detect this case. | |
170 | reg_tick[i] is incremented whenever a value is stored in register i. | |
171 | reg_in_table[i] holds -1 if no references to register i have been | |
172 | entered in the table; otherwise, it contains the value reg_tick[i] had | |
173 | when the references were entered. If we want to enter a reference | |
174 | and reg_in_table[i] != reg_tick[i], we must scan and remove old references. | |
175 | Until we want to enter a new entry, the mere fact that the two vectors | |
176 | don't match makes the entries be ignored if anyone tries to match them. | |
177 | ||
178 | Registers themselves are entered in the hash table as well as in | |
179 | the equivalent-register chains. However, the vectors `reg_tick' | |
180 | and `reg_in_table' do not apply to expressions which are simple | |
181 | register references. These expressions are removed from the table | |
182 | immediately when they become invalid, and this can be done even if | |
183 | we do not immediately search for all the expressions that refer to | |
184 | the register. | |
185 | ||
186 | A CLOBBER rtx in an instruction invalidates its operand for further | |
187 | reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK | |
188 | invalidates everything that resides in memory. | |
189 | ||
190 | Related expressions: | |
191 | ||
192 | Constant expressions that differ only by an additive integer | |
193 | are called related. When a constant expression is put in | |
194 | the table, the related expression with no constant term | |
195 | is also entered. These are made to point at each other | |
196 | so that it is possible to find out if there exists any | |
197 | register equivalent to an expression related to a given expression. */ | |
278a83b2 | 198 | |
7afe21cc RK |
199 | /* One plus largest register number used in this function. */ |
200 | ||
201 | static int max_reg; | |
202 | ||
556c714b JW |
203 | /* One plus largest instruction UID used in this function at time of |
204 | cse_main call. */ | |
205 | ||
206 | static int max_insn_uid; | |
207 | ||
1bb98cec DM |
208 | /* Length of qty_table vector. We know in advance we will not need |
209 | a quantity number this big. */ | |
7afe21cc RK |
210 | |
211 | static int max_qty; | |
212 | ||
213 | /* Next quantity number to be allocated. | |
214 | This is 1 + the largest number needed so far. */ | |
215 | ||
216 | static int next_qty; | |
217 | ||
1bb98cec | 218 | /* Per-qty information tracking. |
7afe21cc | 219 | |
1bb98cec DM |
220 | `first_reg' and `last_reg' track the head and tail of the |
221 | chain of registers which currently contain this quantity. | |
7afe21cc | 222 | |
1bb98cec | 223 | `mode' contains the machine mode of this quantity. |
7afe21cc | 224 | |
1bb98cec DM |
225 | `const_rtx' holds the rtx of the constant value of this |
226 | quantity, if known. A summations of the frame/arg pointer | |
227 | and a constant can also be entered here. When this holds | |
228 | a known value, `const_insn' is the insn which stored the | |
229 | constant value. | |
7afe21cc | 230 | |
1bb98cec DM |
231 | `comparison_{code,const,qty}' are used to track when a |
232 | comparison between a quantity and some constant or register has | |
233 | been passed. In such a case, we know the results of the comparison | |
234 | in case we see it again. These members record a comparison that | |
235 | is known to be true. `comparison_code' holds the rtx code of such | |
236 | a comparison, else it is set to UNKNOWN and the other two | |
237 | comparison members are undefined. `comparison_const' holds | |
238 | the constant being compared against, or zero if the comparison | |
239 | is not against a constant. `comparison_qty' holds the quantity | |
240 | being compared against when the result is known. If the comparison | |
241 | is not with a register, `comparison_qty' is -1. */ | |
7afe21cc | 242 | |
1bb98cec DM |
243 | struct qty_table_elem |
244 | { | |
245 | rtx const_rtx; | |
246 | rtx const_insn; | |
247 | rtx comparison_const; | |
248 | int comparison_qty; | |
770ae6cc | 249 | unsigned int first_reg, last_reg; |
1bb98cec DM |
250 | enum machine_mode mode; |
251 | enum rtx_code comparison_code; | |
252 | }; | |
7afe21cc | 253 | |
1bb98cec DM |
254 | /* The table of all qtys, indexed by qty number. */ |
255 | static struct qty_table_elem *qty_table; | |
7afe21cc RK |
256 | |
257 | #ifdef HAVE_cc0 | |
258 | /* For machines that have a CC0, we do not record its value in the hash | |
259 | table since its use is guaranteed to be the insn immediately following | |
260 | its definition and any other insn is presumed to invalidate it. | |
261 | ||
262 | Instead, we store below the value last assigned to CC0. If it should | |
263 | happen to be a constant, it is stored in preference to the actual | |
264 | assigned value. In case it is a constant, we store the mode in which | |
265 | the constant should be interpreted. */ | |
266 | ||
267 | static rtx prev_insn_cc0; | |
268 | static enum machine_mode prev_insn_cc0_mode; | |
269 | #endif | |
270 | ||
271 | /* Previous actual insn. 0 if at first insn of basic block. */ | |
272 | ||
273 | static rtx prev_insn; | |
274 | ||
275 | /* Insn being scanned. */ | |
276 | ||
277 | static rtx this_insn; | |
278 | ||
71d306d1 DE |
279 | /* Index by register number, gives the number of the next (or |
280 | previous) register in the chain of registers sharing the same | |
7afe21cc RK |
281 | value. |
282 | ||
283 | Or -1 if this register is at the end of the chain. | |
284 | ||
1bb98cec DM |
285 | If reg_qty[N] == N, reg_eqv_table[N].next is undefined. */ |
286 | ||
287 | /* Per-register equivalence chain. */ | |
288 | struct reg_eqv_elem | |
289 | { | |
290 | int next, prev; | |
291 | }; | |
7afe21cc | 292 | |
1bb98cec DM |
293 | /* The table of all register equivalence chains. */ |
294 | static struct reg_eqv_elem *reg_eqv_table; | |
7afe21cc | 295 | |
14a774a9 RK |
296 | struct cse_reg_info |
297 | { | |
9b1549b8 DM |
298 | /* Next in hash chain. */ |
299 | struct cse_reg_info *hash_next; | |
c1edba58 VM |
300 | |
301 | /* The next cse_reg_info structure in the free or used list. */ | |
14a774a9 | 302 | struct cse_reg_info *next; |
30f72379 | 303 | |
9b1549b8 | 304 | /* Search key */ |
770ae6cc | 305 | unsigned int regno; |
9b1549b8 DM |
306 | |
307 | /* The quantity number of the register's current contents. */ | |
308 | int reg_qty; | |
309 | ||
310 | /* The number of times the register has been altered in the current | |
311 | basic block. */ | |
312 | int reg_tick; | |
313 | ||
30f72379 MM |
314 | /* The REG_TICK value at which rtx's containing this register are |
315 | valid in the hash table. If this does not equal the current | |
316 | reg_tick value, such expressions existing in the hash table are | |
317 | invalid. */ | |
318 | int reg_in_table; | |
30f72379 | 319 | }; |
7afe21cc | 320 | |
30f72379 MM |
321 | /* A free list of cse_reg_info entries. */ |
322 | static struct cse_reg_info *cse_reg_info_free_list; | |
7afe21cc | 323 | |
c1edba58 VM |
324 | /* A used list of cse_reg_info entries. */ |
325 | static struct cse_reg_info *cse_reg_info_used_list; | |
326 | static struct cse_reg_info *cse_reg_info_used_list_end; | |
327 | ||
30f72379 | 328 | /* A mapping from registers to cse_reg_info data structures. */ |
9b1549b8 DM |
329 | #define REGHASH_SHIFT 7 |
330 | #define REGHASH_SIZE (1 << REGHASH_SHIFT) | |
331 | #define REGHASH_MASK (REGHASH_SIZE - 1) | |
332 | static struct cse_reg_info *reg_hash[REGHASH_SIZE]; | |
333 | ||
334 | #define REGHASH_FN(REGNO) \ | |
335 | (((REGNO) ^ ((REGNO) >> REGHASH_SHIFT)) & REGHASH_MASK) | |
7afe21cc | 336 | |
30f72379 MM |
337 | /* The last lookup we did into the cse_reg_info_tree. This allows us |
338 | to cache repeated lookups. */ | |
770ae6cc | 339 | static unsigned int cached_regno; |
30f72379 | 340 | static struct cse_reg_info *cached_cse_reg_info; |
7afe21cc | 341 | |
278a83b2 | 342 | /* A HARD_REG_SET containing all the hard registers for which there is |
7afe21cc RK |
343 | currently a REG expression in the hash table. Note the difference |
344 | from the above variables, which indicate if the REG is mentioned in some | |
345 | expression in the table. */ | |
346 | ||
347 | static HARD_REG_SET hard_regs_in_table; | |
348 | ||
349 | /* A HARD_REG_SET containing all the hard registers that are invalidated | |
350 | by a CALL_INSN. */ | |
351 | ||
352 | static HARD_REG_SET regs_invalidated_by_call; | |
353 | ||
7afe21cc RK |
354 | /* CUID of insn that starts the basic block currently being cse-processed. */ |
355 | ||
356 | static int cse_basic_block_start; | |
357 | ||
358 | /* CUID of insn that ends the basic block currently being cse-processed. */ | |
359 | ||
360 | static int cse_basic_block_end; | |
361 | ||
362 | /* Vector mapping INSN_UIDs to cuids. | |
d45cf215 | 363 | The cuids are like uids but increase monotonically always. |
7afe21cc RK |
364 | We use them to see whether a reg is used outside a given basic block. */ |
365 | ||
906c4e36 | 366 | static int *uid_cuid; |
7afe21cc | 367 | |
164c8956 RK |
368 | /* Highest UID in UID_CUID. */ |
369 | static int max_uid; | |
370 | ||
7afe21cc RK |
371 | /* Get the cuid of an insn. */ |
372 | ||
373 | #define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)]) | |
374 | ||
4eadede7 ZW |
375 | /* Nonzero if this pass has made changes, and therefore it's |
376 | worthwhile to run the garbage collector. */ | |
377 | ||
378 | static int cse_altered; | |
379 | ||
7afe21cc RK |
380 | /* Nonzero if cse has altered conditional jump insns |
381 | in such a way that jump optimization should be redone. */ | |
382 | ||
383 | static int cse_jumps_altered; | |
384 | ||
a5dfb4ee RK |
385 | /* Nonzero if we put a LABEL_REF into the hash table. Since we may have put |
386 | it into an INSN without a REG_LABEL, we have to rerun jump after CSE | |
387 | to put in the note. */ | |
388 | static int recorded_label_ref; | |
389 | ||
7afe21cc RK |
390 | /* canon_hash stores 1 in do_not_record |
391 | if it notices a reference to CC0, PC, or some other volatile | |
392 | subexpression. */ | |
393 | ||
394 | static int do_not_record; | |
395 | ||
7bac1be0 RK |
396 | #ifdef LOAD_EXTEND_OP |
397 | ||
398 | /* Scratch rtl used when looking for load-extended copy of a MEM. */ | |
399 | static rtx memory_extend_rtx; | |
400 | #endif | |
401 | ||
7afe21cc RK |
402 | /* canon_hash stores 1 in hash_arg_in_memory |
403 | if it notices a reference to memory within the expression being hashed. */ | |
404 | ||
405 | static int hash_arg_in_memory; | |
406 | ||
7afe21cc RK |
407 | /* The hash table contains buckets which are chains of `struct table_elt's, |
408 | each recording one expression's information. | |
409 | That expression is in the `exp' field. | |
410 | ||
db048faf MM |
411 | The canon_exp field contains a canonical (from the point of view of |
412 | alias analysis) version of the `exp' field. | |
413 | ||
7afe21cc RK |
414 | Those elements with the same hash code are chained in both directions |
415 | through the `next_same_hash' and `prev_same_hash' fields. | |
416 | ||
417 | Each set of expressions with equivalent values | |
418 | are on a two-way chain through the `next_same_value' | |
419 | and `prev_same_value' fields, and all point with | |
420 | the `first_same_value' field at the first element in | |
421 | that chain. The chain is in order of increasing cost. | |
422 | Each element's cost value is in its `cost' field. | |
423 | ||
424 | The `in_memory' field is nonzero for elements that | |
425 | involve any reference to memory. These elements are removed | |
426 | whenever a write is done to an unidentified location in memory. | |
427 | To be safe, we assume that a memory address is unidentified unless | |
428 | the address is either a symbol constant or a constant plus | |
429 | the frame pointer or argument pointer. | |
430 | ||
7afe21cc RK |
431 | The `related_value' field is used to connect related expressions |
432 | (that differ by adding an integer). | |
433 | The related expressions are chained in a circular fashion. | |
434 | `related_value' is zero for expressions for which this | |
435 | chain is not useful. | |
436 | ||
437 | The `cost' field stores the cost of this element's expression. | |
630c79be BS |
438 | The `regcost' field stores the value returned by approx_reg_cost for |
439 | this element's expression. | |
7afe21cc RK |
440 | |
441 | The `is_const' flag is set if the element is a constant (including | |
442 | a fixed address). | |
443 | ||
444 | The `flag' field is used as a temporary during some search routines. | |
445 | ||
446 | The `mode' field is usually the same as GET_MODE (`exp'), but | |
447 | if `exp' is a CONST_INT and has no machine mode then the `mode' | |
448 | field is the mode it was being used as. Each constant is | |
449 | recorded separately for each mode it is used with. */ | |
450 | ||
7afe21cc RK |
451 | struct table_elt |
452 | { | |
453 | rtx exp; | |
db048faf | 454 | rtx canon_exp; |
7afe21cc RK |
455 | struct table_elt *next_same_hash; |
456 | struct table_elt *prev_same_hash; | |
457 | struct table_elt *next_same_value; | |
458 | struct table_elt *prev_same_value; | |
459 | struct table_elt *first_same_value; | |
460 | struct table_elt *related_value; | |
461 | int cost; | |
630c79be | 462 | int regcost; |
7afe21cc RK |
463 | enum machine_mode mode; |
464 | char in_memory; | |
7afe21cc RK |
465 | char is_const; |
466 | char flag; | |
467 | }; | |
468 | ||
7afe21cc RK |
469 | /* We don't want a lot of buckets, because we rarely have very many |
470 | things stored in the hash table, and a lot of buckets slows | |
471 | down a lot of loops that happen frequently. */ | |
9b1549b8 DM |
472 | #define HASH_SHIFT 5 |
473 | #define HASH_SIZE (1 << HASH_SHIFT) | |
474 | #define HASH_MASK (HASH_SIZE - 1) | |
7afe21cc RK |
475 | |
476 | /* Compute hash code of X in mode M. Special-case case where X is a pseudo | |
477 | register (hard registers may require `do_not_record' to be set). */ | |
478 | ||
479 | #define HASH(X, M) \ | |
9b1549b8 DM |
480 | ((GET_CODE (X) == REG && REGNO (X) >= FIRST_PSEUDO_REGISTER \ |
481 | ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \ | |
482 | : canon_hash (X, M)) & HASH_MASK) | |
7afe21cc | 483 | |
630c79be BS |
484 | /* Determine whether register number N is considered a fixed register for the |
485 | purpose of approximating register costs. | |
7afe21cc RK |
486 | It is desirable to replace other regs with fixed regs, to reduce need for |
487 | non-fixed hard regs. | |
553687c9 | 488 | A reg wins if it is either the frame pointer or designated as fixed. */ |
7afe21cc | 489 | #define FIXED_REGNO_P(N) \ |
8bc169f2 | 490 | ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \ |
6ab832bc | 491 | || fixed_regs[N] || global_regs[N]) |
7afe21cc RK |
492 | |
493 | /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed | |
ac07e066 RK |
494 | hard registers and pointers into the frame are the cheapest with a cost |
495 | of 0. Next come pseudos with a cost of one and other hard registers with | |
496 | a cost of 2. Aside from these special cases, call `rtx_cost'. */ | |
497 | ||
6ab832bc | 498 | #define CHEAP_REGNO(N) \ |
8bc169f2 DE |
499 | ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \ |
500 | || (N) == STACK_POINTER_REGNUM || (N) == ARG_POINTER_REGNUM \ | |
501 | || ((N) >= FIRST_VIRTUAL_REGISTER && (N) <= LAST_VIRTUAL_REGISTER) \ | |
502 | || ((N) < FIRST_PSEUDO_REGISTER \ | |
e7bb59fa | 503 | && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS)) |
7afe21cc | 504 | |
630c79be | 505 | #define COST(X) (GET_CODE (X) == REG ? 0 : notreg_cost (X)) |
7afe21cc | 506 | |
30f72379 MM |
507 | /* Get the info associated with register N. */ |
508 | ||
509 | #define GET_CSE_REG_INFO(N) \ | |
510 | (((N) == cached_regno && cached_cse_reg_info) \ | |
511 | ? cached_cse_reg_info : get_cse_reg_info ((N))) | |
512 | ||
513 | /* Get the number of times this register has been updated in this | |
514 | basic block. */ | |
515 | ||
c1edba58 | 516 | #define REG_TICK(N) ((GET_CSE_REG_INFO (N))->reg_tick) |
30f72379 MM |
517 | |
518 | /* Get the point at which REG was recorded in the table. */ | |
519 | ||
520 | #define REG_IN_TABLE(N) ((GET_CSE_REG_INFO (N))->reg_in_table) | |
521 | ||
522 | /* Get the quantity number for REG. */ | |
523 | ||
524 | #define REG_QTY(N) ((GET_CSE_REG_INFO (N))->reg_qty) | |
525 | ||
7afe21cc | 526 | /* Determine if the quantity number for register X represents a valid index |
1bb98cec | 527 | into the qty_table. */ |
7afe21cc | 528 | |
770ae6cc | 529 | #define REGNO_QTY_VALID_P(N) (REG_QTY (N) != (int) (N)) |
7afe21cc | 530 | |
9b1549b8 | 531 | static struct table_elt *table[HASH_SIZE]; |
7afe21cc RK |
532 | |
533 | /* Chain of `struct table_elt's made so far for this function | |
534 | but currently removed from the table. */ | |
535 | ||
536 | static struct table_elt *free_element_chain; | |
537 | ||
538 | /* Number of `struct table_elt' structures made so far for this function. */ | |
539 | ||
540 | static int n_elements_made; | |
541 | ||
542 | /* Maximum value `n_elements_made' has had so far in this compilation | |
543 | for functions previously processed. */ | |
544 | ||
545 | static int max_elements_made; | |
546 | ||
278a83b2 | 547 | /* Surviving equivalence class when two equivalence classes are merged |
7afe21cc RK |
548 | by recording the effects of a jump in the last insn. Zero if the |
549 | last insn was not a conditional jump. */ | |
550 | ||
551 | static struct table_elt *last_jump_equiv_class; | |
552 | ||
553 | /* Set to the cost of a constant pool reference if one was found for a | |
554 | symbolic constant. If this was found, it means we should try to | |
555 | convert constants into constant pool entries if they don't fit in | |
556 | the insn. */ | |
557 | ||
558 | static int constant_pool_entries_cost; | |
559 | ||
6cd4575e RK |
560 | /* Define maximum length of a branch path. */ |
561 | ||
562 | #define PATHLENGTH 10 | |
563 | ||
564 | /* This data describes a block that will be processed by cse_basic_block. */ | |
565 | ||
14a774a9 RK |
566 | struct cse_basic_block_data |
567 | { | |
6cd4575e RK |
568 | /* Lowest CUID value of insns in block. */ |
569 | int low_cuid; | |
570 | /* Highest CUID value of insns in block. */ | |
571 | int high_cuid; | |
572 | /* Total number of SETs in block. */ | |
573 | int nsets; | |
574 | /* Last insn in the block. */ | |
575 | rtx last; | |
576 | /* Size of current branch path, if any. */ | |
577 | int path_size; | |
578 | /* Current branch path, indicating which branches will be taken. */ | |
14a774a9 RK |
579 | struct branch_path |
580 | { | |
581 | /* The branch insn. */ | |
582 | rtx branch; | |
583 | /* Whether it should be taken or not. AROUND is the same as taken | |
584 | except that it is used when the destination label is not preceded | |
6cd4575e | 585 | by a BARRIER. */ |
14a774a9 RK |
586 | enum taken {TAKEN, NOT_TAKEN, AROUND} status; |
587 | } path[PATHLENGTH]; | |
6cd4575e RK |
588 | }; |
589 | ||
7afe21cc RK |
590 | /* Nonzero if X has the form (PLUS frame-pointer integer). We check for |
591 | virtual regs here because the simplify_*_operation routines are called | |
278a83b2 | 592 | by integrate.c, which is called before virtual register instantiation. |
0cedb36c JL |
593 | |
594 | ?!? FIXED_BASE_PLUS_P and NONZERO_BASE_PLUS_P need to move into | |
595 | a header file so that their definitions can be shared with the | |
596 | simplification routines in simplify-rtx.c. Until then, do not | |
597 | change these macros without also changing the copy in simplify-rtx.c. */ | |
7afe21cc RK |
598 | |
599 | #define FIXED_BASE_PLUS_P(X) \ | |
8bc169f2 | 600 | ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \ |
41babf2e | 601 | || ((X) == arg_pointer_rtx && fixed_regs[ARG_POINTER_REGNUM])\ |
7afe21cc RK |
602 | || (X) == virtual_stack_vars_rtx \ |
603 | || (X) == virtual_incoming_args_rtx \ | |
604 | || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \ | |
605 | && (XEXP (X, 0) == frame_pointer_rtx \ | |
8bc169f2 | 606 | || XEXP (X, 0) == hard_frame_pointer_rtx \ |
41babf2e JL |
607 | || ((X) == arg_pointer_rtx \ |
608 | && fixed_regs[ARG_POINTER_REGNUM]) \ | |
7afe21cc | 609 | || XEXP (X, 0) == virtual_stack_vars_rtx \ |
e9a25f70 JL |
610 | || XEXP (X, 0) == virtual_incoming_args_rtx)) \ |
611 | || GET_CODE (X) == ADDRESSOF) | |
7afe21cc | 612 | |
6f90e075 JW |
613 | /* Similar, but also allows reference to the stack pointer. |
614 | ||
615 | This used to include FIXED_BASE_PLUS_P, however, we can't assume that | |
616 | arg_pointer_rtx by itself is nonzero, because on at least one machine, | |
617 | the i960, the arg pointer is zero when it is unused. */ | |
7afe21cc RK |
618 | |
619 | #define NONZERO_BASE_PLUS_P(X) \ | |
8bc169f2 | 620 | ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \ |
6f90e075 JW |
621 | || (X) == virtual_stack_vars_rtx \ |
622 | || (X) == virtual_incoming_args_rtx \ | |
623 | || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \ | |
624 | && (XEXP (X, 0) == frame_pointer_rtx \ | |
8bc169f2 | 625 | || XEXP (X, 0) == hard_frame_pointer_rtx \ |
41babf2e JL |
626 | || ((X) == arg_pointer_rtx \ |
627 | && fixed_regs[ARG_POINTER_REGNUM]) \ | |
6f90e075 JW |
628 | || XEXP (X, 0) == virtual_stack_vars_rtx \ |
629 | || XEXP (X, 0) == virtual_incoming_args_rtx)) \ | |
7afe21cc RK |
630 | || (X) == stack_pointer_rtx \ |
631 | || (X) == virtual_stack_dynamic_rtx \ | |
632 | || (X) == virtual_outgoing_args_rtx \ | |
633 | || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \ | |
634 | && (XEXP (X, 0) == stack_pointer_rtx \ | |
635 | || XEXP (X, 0) == virtual_stack_dynamic_rtx \ | |
e9a25f70 JL |
636 | || XEXP (X, 0) == virtual_outgoing_args_rtx)) \ |
637 | || GET_CODE (X) == ADDRESSOF) | |
7afe21cc | 638 | |
83d2b3b9 | 639 | static int notreg_cost PARAMS ((rtx)); |
630c79be BS |
640 | static int approx_reg_cost_1 PARAMS ((rtx *, void *)); |
641 | static int approx_reg_cost PARAMS ((rtx)); | |
642 | static int preferrable PARAMS ((int, int, int, int)); | |
83d2b3b9 | 643 | static void new_basic_block PARAMS ((void)); |
770ae6cc RK |
644 | static void make_new_qty PARAMS ((unsigned int, enum machine_mode)); |
645 | static void make_regs_eqv PARAMS ((unsigned int, unsigned int)); | |
646 | static void delete_reg_equiv PARAMS ((unsigned int)); | |
83d2b3b9 KG |
647 | static int mention_regs PARAMS ((rtx)); |
648 | static int insert_regs PARAMS ((rtx, struct table_elt *, int)); | |
649 | static void remove_from_table PARAMS ((struct table_elt *, unsigned)); | |
650 | static struct table_elt *lookup PARAMS ((rtx, unsigned, enum machine_mode)), | |
651 | *lookup_for_remove PARAMS ((rtx, unsigned, enum machine_mode)); | |
652 | static rtx lookup_as_function PARAMS ((rtx, enum rtx_code)); | |
653 | static struct table_elt *insert PARAMS ((rtx, struct table_elt *, unsigned, | |
654 | enum machine_mode)); | |
655 | static void merge_equiv_classes PARAMS ((struct table_elt *, | |
656 | struct table_elt *)); | |
657 | static void invalidate PARAMS ((rtx, enum machine_mode)); | |
658 | static int cse_rtx_varies_p PARAMS ((rtx)); | |
770ae6cc RK |
659 | static void remove_invalid_refs PARAMS ((unsigned int)); |
660 | static void remove_invalid_subreg_refs PARAMS ((unsigned int, unsigned int, | |
661 | enum machine_mode)); | |
83d2b3b9 KG |
662 | static void rehash_using_reg PARAMS ((rtx)); |
663 | static void invalidate_memory PARAMS ((void)); | |
664 | static void invalidate_for_call PARAMS ((void)); | |
665 | static rtx use_related_value PARAMS ((rtx, struct table_elt *)); | |
666 | static unsigned canon_hash PARAMS ((rtx, enum machine_mode)); | |
c0712acb | 667 | static unsigned canon_hash_string PARAMS ((const char *)); |
83d2b3b9 KG |
668 | static unsigned safe_hash PARAMS ((rtx, enum machine_mode)); |
669 | static int exp_equiv_p PARAMS ((rtx, rtx, int, int)); | |
670 | static rtx canon_reg PARAMS ((rtx, rtx)); | |
01329426 | 671 | static void find_best_addr PARAMS ((rtx, rtx *, enum machine_mode)); |
83d2b3b9 KG |
672 | static enum rtx_code find_comparison_args PARAMS ((enum rtx_code, rtx *, rtx *, |
673 | enum machine_mode *, | |
674 | enum machine_mode *)); | |
675 | static rtx fold_rtx PARAMS ((rtx, rtx)); | |
676 | static rtx equiv_constant PARAMS ((rtx)); | |
677 | static void record_jump_equiv PARAMS ((rtx, int)); | |
678 | static void record_jump_cond PARAMS ((enum rtx_code, enum machine_mode, | |
679 | rtx, rtx, int)); | |
680 | static void cse_insn PARAMS ((rtx, rtx)); | |
681 | static int addr_affects_sp_p PARAMS ((rtx)); | |
682 | static void invalidate_from_clobbers PARAMS ((rtx)); | |
683 | static rtx cse_process_notes PARAMS ((rtx, rtx)); | |
684 | static void cse_around_loop PARAMS ((rtx)); | |
685 | static void invalidate_skipped_set PARAMS ((rtx, rtx, void *)); | |
686 | static void invalidate_skipped_block PARAMS ((rtx)); | |
687 | static void cse_check_loop_start PARAMS ((rtx, rtx, void *)); | |
688 | static void cse_set_around_loop PARAMS ((rtx, rtx, rtx)); | |
689 | static rtx cse_basic_block PARAMS ((rtx, rtx, struct branch_path *, int)); | |
690 | static void count_reg_usage PARAMS ((rtx, int *, rtx, int)); | |
691 | extern void dump_class PARAMS ((struct table_elt*)); | |
770ae6cc | 692 | static struct cse_reg_info * get_cse_reg_info PARAMS ((unsigned int)); |
2ce6dc2f | 693 | static int check_dependence PARAMS ((rtx *, void *)); |
83d2b3b9 KG |
694 | |
695 | static void flush_hash_table PARAMS ((void)); | |
7afe21cc | 696 | \f |
a4c6502a MM |
697 | /* Dump the expressions in the equivalence class indicated by CLASSP. |
698 | This function is used only for debugging. */ | |
a0153051 | 699 | void |
a4c6502a MM |
700 | dump_class (classp) |
701 | struct table_elt *classp; | |
702 | { | |
703 | struct table_elt *elt; | |
704 | ||
705 | fprintf (stderr, "Equivalence chain for "); | |
706 | print_rtl (stderr, classp->exp); | |
707 | fprintf (stderr, ": \n"); | |
278a83b2 | 708 | |
a4c6502a MM |
709 | for (elt = classp->first_same_value; elt; elt = elt->next_same_value) |
710 | { | |
711 | print_rtl (stderr, elt->exp); | |
712 | fprintf (stderr, "\n"); | |
713 | } | |
714 | } | |
715 | ||
630c79be BS |
716 | /* Subroutine of approx_reg_cost; called through for_each_rtx. */ |
717 | static int | |
718 | approx_reg_cost_1 (xp, data) | |
719 | rtx *xp; | |
720 | void *data; | |
721 | { | |
722 | rtx x = *xp; | |
723 | regset set = (regset) data; | |
724 | ||
725 | if (x && GET_CODE (x) == REG) | |
726 | SET_REGNO_REG_SET (set, REGNO (x)); | |
727 | return 0; | |
728 | } | |
729 | ||
730 | /* Return an estimate of the cost of the registers used in an rtx. | |
731 | This is mostly the number of different REG expressions in the rtx; | |
732 | however for some excecptions like fixed registers we use a cost of | |
f1c1dfc3 | 733 | 0. If any other hard register reference occurs, return MAX_COST. */ |
630c79be BS |
734 | |
735 | static int | |
736 | approx_reg_cost (x) | |
737 | rtx x; | |
738 | { | |
739 | regset_head set; | |
740 | int i; | |
741 | int cost = 0; | |
f1c1dfc3 | 742 | int hardregs = 0; |
630c79be BS |
743 | |
744 | INIT_REG_SET (&set); | |
745 | for_each_rtx (&x, approx_reg_cost_1, (void *)&set); | |
746 | ||
747 | EXECUTE_IF_SET_IN_REG_SET | |
748 | (&set, 0, i, | |
749 | { | |
750 | if (! CHEAP_REGNO (i)) | |
f1c1dfc3 BS |
751 | { |
752 | if (i < FIRST_PSEUDO_REGISTER) | |
753 | hardregs++; | |
754 | ||
755 | cost += i < FIRST_PSEUDO_REGISTER ? 2 : 1; | |
756 | } | |
630c79be BS |
757 | }); |
758 | ||
759 | CLEAR_REG_SET (&set); | |
f1c1dfc3 | 760 | return hardregs && SMALL_REGISTER_CLASSES ? MAX_COST : cost; |
630c79be BS |
761 | } |
762 | ||
763 | /* Return a negative value if an rtx A, whose costs are given by COST_A | |
764 | and REGCOST_A, is more desirable than an rtx B. | |
765 | Return a positive value if A is less desirable, or 0 if the two are | |
766 | equally good. */ | |
767 | static int | |
768 | preferrable (cost_a, regcost_a, cost_b, regcost_b) | |
769 | int cost_a, regcost_a, cost_b, regcost_b; | |
770 | { | |
f1c1dfc3 BS |
771 | /* First, get rid of a cases involving expressions that are entirely |
772 | unwanted. */ | |
773 | if (cost_a != cost_b) | |
774 | { | |
775 | if (cost_a == MAX_COST) | |
776 | return 1; | |
777 | if (cost_b == MAX_COST) | |
778 | return -1; | |
779 | } | |
780 | ||
781 | /* Avoid extending lifetimes of hardregs. */ | |
782 | if (regcost_a != regcost_b) | |
783 | { | |
784 | if (regcost_a == MAX_COST) | |
785 | return 1; | |
786 | if (regcost_b == MAX_COST) | |
787 | return -1; | |
788 | } | |
789 | ||
790 | /* Normal operation costs take precedence. */ | |
630c79be BS |
791 | if (cost_a != cost_b) |
792 | return cost_a - cost_b; | |
f1c1dfc3 | 793 | /* Only if these are identical consider effects on register pressure. */ |
630c79be BS |
794 | if (regcost_a != regcost_b) |
795 | return regcost_a - regcost_b; | |
796 | return 0; | |
797 | } | |
798 | ||
954a5693 RK |
799 | /* Internal function, to compute cost when X is not a register; called |
800 | from COST macro to keep it simple. */ | |
801 | ||
802 | static int | |
803 | notreg_cost (x) | |
804 | rtx x; | |
805 | { | |
806 | return ((GET_CODE (x) == SUBREG | |
807 | && GET_CODE (SUBREG_REG (x)) == REG | |
808 | && GET_MODE_CLASS (GET_MODE (x)) == MODE_INT | |
809 | && GET_MODE_CLASS (GET_MODE (SUBREG_REG (x))) == MODE_INT | |
810 | && (GET_MODE_SIZE (GET_MODE (x)) | |
811 | < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))) | |
812 | && subreg_lowpart_p (x) | |
813 | && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE (x)), | |
814 | GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x))))) | |
630c79be | 815 | ? 0 |
954a5693 RK |
816 | : rtx_cost (x, SET) * 2); |
817 | } | |
818 | ||
d4b60170 RK |
819 | /* Return an estimate of the cost of computing rtx X. |
820 | One use is in cse, to decide which expression to keep in the hash table. | |
821 | Another is in rtl generation, to pick the cheapest way to multiply. | |
822 | Other uses like the latter are expected in the future. */ | |
823 | ||
7afe21cc | 824 | int |
e5f6a288 | 825 | rtx_cost (x, outer_code) |
7afe21cc | 826 | rtx x; |
79c9824e | 827 | enum rtx_code outer_code ATTRIBUTE_UNUSED; |
7afe21cc RK |
828 | { |
829 | register int i, j; | |
830 | register enum rtx_code code; | |
6f7d635c | 831 | register const char *fmt; |
7afe21cc RK |
832 | register int total; |
833 | ||
834 | if (x == 0) | |
835 | return 0; | |
836 | ||
837 | /* Compute the default costs of certain things. | |
838 | Note that RTX_COSTS can override the defaults. */ | |
839 | ||
840 | code = GET_CODE (x); | |
841 | switch (code) | |
842 | { | |
843 | case MULT: | |
844 | /* Count multiplication by 2**n as a shift, | |
845 | because if we are considering it, we would output it as a shift. */ | |
846 | if (GET_CODE (XEXP (x, 1)) == CONST_INT | |
847 | && exact_log2 (INTVAL (XEXP (x, 1))) >= 0) | |
848 | total = 2; | |
849 | else | |
850 | total = COSTS_N_INSNS (5); | |
851 | break; | |
852 | case DIV: | |
853 | case UDIV: | |
854 | case MOD: | |
855 | case UMOD: | |
856 | total = COSTS_N_INSNS (7); | |
857 | break; | |
858 | case USE: | |
859 | /* Used in loop.c and combine.c as a marker. */ | |
860 | total = 0; | |
861 | break; | |
862 | default: | |
b437f1a7 | 863 | total = COSTS_N_INSNS (1); |
7afe21cc RK |
864 | } |
865 | ||
866 | switch (code) | |
867 | { | |
868 | case REG: | |
630c79be | 869 | return 0; |
ac07e066 | 870 | |
7afe21cc | 871 | case SUBREG: |
fc3ffe83 RK |
872 | /* If we can't tie these modes, make this expensive. The larger |
873 | the mode, the more expensive it is. */ | |
874 | if (! MODES_TIEABLE_P (GET_MODE (x), GET_MODE (SUBREG_REG (x)))) | |
875 | return COSTS_N_INSNS (2 | |
876 | + GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD); | |
630c79be BS |
877 | break; |
878 | ||
7afe21cc | 879 | #ifdef RTX_COSTS |
e5f6a288 | 880 | RTX_COSTS (x, code, outer_code); |
278a83b2 | 881 | #endif |
47a0b68f | 882 | #ifdef CONST_COSTS |
e5f6a288 | 883 | CONST_COSTS (x, code, outer_code); |
47a0b68f | 884 | #endif |
8625fab5 KG |
885 | |
886 | default: | |
887 | #ifdef DEFAULT_RTX_COSTS | |
278a83b2 | 888 | DEFAULT_RTX_COSTS (x, code, outer_code); |
8625fab5 KG |
889 | #endif |
890 | break; | |
7afe21cc RK |
891 | } |
892 | ||
893 | /* Sum the costs of the sub-rtx's, plus cost of this operation, | |
894 | which is already in total. */ | |
895 | ||
896 | fmt = GET_RTX_FORMAT (code); | |
897 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
898 | if (fmt[i] == 'e') | |
e5f6a288 | 899 | total += rtx_cost (XEXP (x, i), code); |
7afe21cc RK |
900 | else if (fmt[i] == 'E') |
901 | for (j = 0; j < XVECLEN (x, i); j++) | |
e5f6a288 | 902 | total += rtx_cost (XVECEXP (x, i, j), code); |
7afe21cc RK |
903 | |
904 | return total; | |
905 | } | |
906 | \f | |
278a83b2 KH |
907 | /* Return cost of address expression X. |
908 | Expect that X is propertly formed address reference. */ | |
909 | ||
01329426 JH |
910 | int |
911 | address_cost (x, mode) | |
912 | rtx x; | |
913 | enum machine_mode mode; | |
914 | { | |
915 | /* The ADDRESS_COST macro does not deal with ADDRESSOF nodes. But, | |
916 | during CSE, such nodes are present. Using an ADDRESSOF node which | |
917 | refers to the address of a REG is a good thing because we can then | |
918 | turn (MEM (ADDRESSSOF (REG))) into just plain REG. */ | |
919 | ||
920 | if (GET_CODE (x) == ADDRESSOF && REG_P (XEXP ((x), 0))) | |
921 | return -1; | |
922 | ||
923 | /* We may be asked for cost of various unusual addresses, such as operands | |
278a83b2 | 924 | of push instruction. It is not worthwhile to complicate writing |
01329426 JH |
925 | of ADDRESS_COST macro by such cases. */ |
926 | ||
927 | if (!memory_address_p (mode, x)) | |
928 | return 1000; | |
929 | #ifdef ADDRESS_COST | |
930 | return ADDRESS_COST (x); | |
931 | #else | |
932 | return rtx_cost (x, MEM); | |
933 | #endif | |
934 | } | |
630c79be | 935 | |
01329426 | 936 | \f |
30f72379 MM |
937 | static struct cse_reg_info * |
938 | get_cse_reg_info (regno) | |
770ae6cc | 939 | unsigned int regno; |
30f72379 | 940 | { |
9b1549b8 DM |
941 | struct cse_reg_info **hash_head = ®_hash[REGHASH_FN (regno)]; |
942 | struct cse_reg_info *p; | |
943 | ||
278a83b2 | 944 | for (p = *hash_head; p != NULL; p = p->hash_next) |
9b1549b8 DM |
945 | if (p->regno == regno) |
946 | break; | |
947 | ||
948 | if (p == NULL) | |
30f72379 MM |
949 | { |
950 | /* Get a new cse_reg_info structure. */ | |
9b1549b8 | 951 | if (cse_reg_info_free_list) |
30f72379 | 952 | { |
9b1549b8 DM |
953 | p = cse_reg_info_free_list; |
954 | cse_reg_info_free_list = p->next; | |
30f72379 MM |
955 | } |
956 | else | |
9b1549b8 DM |
957 | p = (struct cse_reg_info *) xmalloc (sizeof (struct cse_reg_info)); |
958 | ||
959 | /* Insert into hash table. */ | |
960 | p->hash_next = *hash_head; | |
961 | *hash_head = p; | |
30f72379 MM |
962 | |
963 | /* Initialize it. */ | |
9b1549b8 DM |
964 | p->reg_tick = 1; |
965 | p->reg_in_table = -1; | |
966 | p->reg_qty = regno; | |
967 | p->regno = regno; | |
968 | p->next = cse_reg_info_used_list; | |
969 | cse_reg_info_used_list = p; | |
c1edba58 | 970 | if (!cse_reg_info_used_list_end) |
9b1549b8 | 971 | cse_reg_info_used_list_end = p; |
30f72379 MM |
972 | } |
973 | ||
974 | /* Cache this lookup; we tend to be looking up information about the | |
975 | same register several times in a row. */ | |
976 | cached_regno = regno; | |
9b1549b8 | 977 | cached_cse_reg_info = p; |
30f72379 | 978 | |
9b1549b8 | 979 | return p; |
30f72379 MM |
980 | } |
981 | ||
7afe21cc RK |
982 | /* Clear the hash table and initialize each register with its own quantity, |
983 | for a new basic block. */ | |
984 | ||
985 | static void | |
986 | new_basic_block () | |
987 | { | |
988 | register int i; | |
989 | ||
990 | next_qty = max_reg; | |
991 | ||
9b1549b8 DM |
992 | /* Clear out hash table state for this pass. */ |
993 | ||
994 | bzero ((char *) reg_hash, sizeof reg_hash); | |
995 | ||
996 | if (cse_reg_info_used_list) | |
30f72379 | 997 | { |
9b1549b8 DM |
998 | cse_reg_info_used_list_end->next = cse_reg_info_free_list; |
999 | cse_reg_info_free_list = cse_reg_info_used_list; | |
1000 | cse_reg_info_used_list = cse_reg_info_used_list_end = 0; | |
30f72379 | 1001 | } |
9b1549b8 | 1002 | cached_cse_reg_info = 0; |
7afe21cc | 1003 | |
7afe21cc RK |
1004 | CLEAR_HARD_REG_SET (hard_regs_in_table); |
1005 | ||
1006 | /* The per-quantity values used to be initialized here, but it is | |
1007 | much faster to initialize each as it is made in `make_new_qty'. */ | |
1008 | ||
9b1549b8 | 1009 | for (i = 0; i < HASH_SIZE; i++) |
7afe21cc | 1010 | { |
9b1549b8 DM |
1011 | struct table_elt *first; |
1012 | ||
1013 | first = table[i]; | |
1014 | if (first != NULL) | |
7afe21cc | 1015 | { |
9b1549b8 DM |
1016 | struct table_elt *last = first; |
1017 | ||
1018 | table[i] = NULL; | |
1019 | ||
1020 | while (last->next_same_hash != NULL) | |
1021 | last = last->next_same_hash; | |
1022 | ||
1023 | /* Now relink this hash entire chain into | |
1024 | the free element list. */ | |
1025 | ||
1026 | last->next_same_hash = free_element_chain; | |
1027 | free_element_chain = first; | |
7afe21cc RK |
1028 | } |
1029 | } | |
1030 | ||
7afe21cc RK |
1031 | prev_insn = 0; |
1032 | ||
1033 | #ifdef HAVE_cc0 | |
1034 | prev_insn_cc0 = 0; | |
1035 | #endif | |
1036 | } | |
1037 | ||
1bb98cec DM |
1038 | /* Say that register REG contains a quantity in mode MODE not in any |
1039 | register before and initialize that quantity. */ | |
7afe21cc RK |
1040 | |
1041 | static void | |
1bb98cec | 1042 | make_new_qty (reg, mode) |
770ae6cc RK |
1043 | unsigned int reg; |
1044 | enum machine_mode mode; | |
7afe21cc RK |
1045 | { |
1046 | register int q; | |
1bb98cec DM |
1047 | register struct qty_table_elem *ent; |
1048 | register struct reg_eqv_elem *eqv; | |
7afe21cc RK |
1049 | |
1050 | if (next_qty >= max_qty) | |
1051 | abort (); | |
1052 | ||
30f72379 | 1053 | q = REG_QTY (reg) = next_qty++; |
1bb98cec DM |
1054 | ent = &qty_table[q]; |
1055 | ent->first_reg = reg; | |
1056 | ent->last_reg = reg; | |
1057 | ent->mode = mode; | |
1058 | ent->const_rtx = ent->const_insn = NULL_RTX; | |
1059 | ent->comparison_code = UNKNOWN; | |
1060 | ||
1061 | eqv = ®_eqv_table[reg]; | |
1062 | eqv->next = eqv->prev = -1; | |
7afe21cc RK |
1063 | } |
1064 | ||
1065 | /* Make reg NEW equivalent to reg OLD. | |
1066 | OLD is not changing; NEW is. */ | |
1067 | ||
1068 | static void | |
1069 | make_regs_eqv (new, old) | |
770ae6cc | 1070 | unsigned int new, old; |
7afe21cc | 1071 | { |
770ae6cc RK |
1072 | unsigned int lastr, firstr; |
1073 | int q = REG_QTY (old); | |
1074 | struct qty_table_elem *ent; | |
1bb98cec DM |
1075 | |
1076 | ent = &qty_table[q]; | |
7afe21cc RK |
1077 | |
1078 | /* Nothing should become eqv until it has a "non-invalid" qty number. */ | |
1079 | if (! REGNO_QTY_VALID_P (old)) | |
1080 | abort (); | |
1081 | ||
30f72379 | 1082 | REG_QTY (new) = q; |
1bb98cec DM |
1083 | firstr = ent->first_reg; |
1084 | lastr = ent->last_reg; | |
7afe21cc RK |
1085 | |
1086 | /* Prefer fixed hard registers to anything. Prefer pseudo regs to other | |
1087 | hard regs. Among pseudos, if NEW will live longer than any other reg | |
1088 | of the same qty, and that is beyond the current basic block, | |
1089 | make it the new canonical replacement for this qty. */ | |
1090 | if (! (firstr < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (firstr)) | |
1091 | /* Certain fixed registers might be of the class NO_REGS. This means | |
1092 | that not only can they not be allocated by the compiler, but | |
830a38ee | 1093 | they cannot be used in substitutions or canonicalizations |
7afe21cc RK |
1094 | either. */ |
1095 | && (new >= FIRST_PSEUDO_REGISTER || REGNO_REG_CLASS (new) != NO_REGS) | |
1096 | && ((new < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (new)) | |
1097 | || (new >= FIRST_PSEUDO_REGISTER | |
1098 | && (firstr < FIRST_PSEUDO_REGISTER | |
b1f21e0a MM |
1099 | || ((uid_cuid[REGNO_LAST_UID (new)] > cse_basic_block_end |
1100 | || (uid_cuid[REGNO_FIRST_UID (new)] | |
7afe21cc | 1101 | < cse_basic_block_start)) |
b1f21e0a MM |
1102 | && (uid_cuid[REGNO_LAST_UID (new)] |
1103 | > uid_cuid[REGNO_LAST_UID (firstr)])))))) | |
7afe21cc | 1104 | { |
1bb98cec DM |
1105 | reg_eqv_table[firstr].prev = new; |
1106 | reg_eqv_table[new].next = firstr; | |
1107 | reg_eqv_table[new].prev = -1; | |
1108 | ent->first_reg = new; | |
7afe21cc RK |
1109 | } |
1110 | else | |
1111 | { | |
1112 | /* If NEW is a hard reg (known to be non-fixed), insert at end. | |
1113 | Otherwise, insert before any non-fixed hard regs that are at the | |
1114 | end. Registers of class NO_REGS cannot be used as an | |
1115 | equivalent for anything. */ | |
1bb98cec | 1116 | while (lastr < FIRST_PSEUDO_REGISTER && reg_eqv_table[lastr].prev >= 0 |
7afe21cc RK |
1117 | && (REGNO_REG_CLASS (lastr) == NO_REGS || ! FIXED_REGNO_P (lastr)) |
1118 | && new >= FIRST_PSEUDO_REGISTER) | |
1bb98cec DM |
1119 | lastr = reg_eqv_table[lastr].prev; |
1120 | reg_eqv_table[new].next = reg_eqv_table[lastr].next; | |
1121 | if (reg_eqv_table[lastr].next >= 0) | |
1122 | reg_eqv_table[reg_eqv_table[lastr].next].prev = new; | |
7afe21cc | 1123 | else |
1bb98cec DM |
1124 | qty_table[q].last_reg = new; |
1125 | reg_eqv_table[lastr].next = new; | |
1126 | reg_eqv_table[new].prev = lastr; | |
7afe21cc RK |
1127 | } |
1128 | } | |
1129 | ||
1130 | /* Remove REG from its equivalence class. */ | |
1131 | ||
1132 | static void | |
1133 | delete_reg_equiv (reg) | |
770ae6cc | 1134 | unsigned int reg; |
7afe21cc | 1135 | { |
1bb98cec | 1136 | register struct qty_table_elem *ent; |
30f72379 | 1137 | register int q = REG_QTY (reg); |
a4e262bc | 1138 | register int p, n; |
7afe21cc | 1139 | |
a4e262bc | 1140 | /* If invalid, do nothing. */ |
770ae6cc | 1141 | if (q == (int) reg) |
7afe21cc RK |
1142 | return; |
1143 | ||
1bb98cec DM |
1144 | ent = &qty_table[q]; |
1145 | ||
1146 | p = reg_eqv_table[reg].prev; | |
1147 | n = reg_eqv_table[reg].next; | |
a4e262bc | 1148 | |
7afe21cc | 1149 | if (n != -1) |
1bb98cec | 1150 | reg_eqv_table[n].prev = p; |
7afe21cc | 1151 | else |
1bb98cec | 1152 | ent->last_reg = p; |
7afe21cc | 1153 | if (p != -1) |
1bb98cec | 1154 | reg_eqv_table[p].next = n; |
7afe21cc | 1155 | else |
1bb98cec | 1156 | ent->first_reg = n; |
7afe21cc | 1157 | |
30f72379 | 1158 | REG_QTY (reg) = reg; |
7afe21cc RK |
1159 | } |
1160 | ||
1161 | /* Remove any invalid expressions from the hash table | |
1162 | that refer to any of the registers contained in expression X. | |
1163 | ||
1164 | Make sure that newly inserted references to those registers | |
1165 | as subexpressions will be considered valid. | |
1166 | ||
1167 | mention_regs is not called when a register itself | |
1168 | is being stored in the table. | |
1169 | ||
1170 | Return 1 if we have done something that may have changed the hash code | |
1171 | of X. */ | |
1172 | ||
1173 | static int | |
1174 | mention_regs (x) | |
1175 | rtx x; | |
1176 | { | |
1177 | register enum rtx_code code; | |
1178 | register int i, j; | |
6f7d635c | 1179 | register const char *fmt; |
7afe21cc RK |
1180 | register int changed = 0; |
1181 | ||
1182 | if (x == 0) | |
e5f6a288 | 1183 | return 0; |
7afe21cc RK |
1184 | |
1185 | code = GET_CODE (x); | |
1186 | if (code == REG) | |
1187 | { | |
770ae6cc RK |
1188 | unsigned int regno = REGNO (x); |
1189 | unsigned int endregno | |
7afe21cc RK |
1190 | = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1 |
1191 | : HARD_REGNO_NREGS (regno, GET_MODE (x))); | |
770ae6cc | 1192 | unsigned int i; |
7afe21cc RK |
1193 | |
1194 | for (i = regno; i < endregno; i++) | |
1195 | { | |
30f72379 | 1196 | if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i)) |
7afe21cc RK |
1197 | remove_invalid_refs (i); |
1198 | ||
30f72379 | 1199 | REG_IN_TABLE (i) = REG_TICK (i); |
7afe21cc RK |
1200 | } |
1201 | ||
1202 | return 0; | |
1203 | } | |
1204 | ||
34c73909 R |
1205 | /* If this is a SUBREG, we don't want to discard other SUBREGs of the same |
1206 | pseudo if they don't use overlapping words. We handle only pseudos | |
1207 | here for simplicity. */ | |
1208 | if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG | |
1209 | && REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER) | |
1210 | { | |
770ae6cc | 1211 | unsigned int i = REGNO (SUBREG_REG (x)); |
34c73909 | 1212 | |
30f72379 | 1213 | if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i)) |
34c73909 R |
1214 | { |
1215 | /* If reg_tick has been incremented more than once since | |
1216 | reg_in_table was last set, that means that the entire | |
1217 | register has been set before, so discard anything memorized | |
1218 | for the entrire register, including all SUBREG expressions. */ | |
30f72379 | 1219 | if (REG_IN_TABLE (i) != REG_TICK (i) - 1) |
34c73909 R |
1220 | remove_invalid_refs (i); |
1221 | else | |
1222 | remove_invalid_subreg_refs (i, SUBREG_WORD (x), GET_MODE (x)); | |
1223 | } | |
1224 | ||
30f72379 | 1225 | REG_IN_TABLE (i) = REG_TICK (i); |
34c73909 R |
1226 | return 0; |
1227 | } | |
1228 | ||
7afe21cc RK |
1229 | /* If X is a comparison or a COMPARE and either operand is a register |
1230 | that does not have a quantity, give it one. This is so that a later | |
1231 | call to record_jump_equiv won't cause X to be assigned a different | |
1232 | hash code and not found in the table after that call. | |
1233 | ||
1234 | It is not necessary to do this here, since rehash_using_reg can | |
1235 | fix up the table later, but doing this here eliminates the need to | |
1236 | call that expensive function in the most common case where the only | |
1237 | use of the register is in the comparison. */ | |
1238 | ||
1239 | if (code == COMPARE || GET_RTX_CLASS (code) == '<') | |
1240 | { | |
1241 | if (GET_CODE (XEXP (x, 0)) == REG | |
1242 | && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 0)))) | |
906c4e36 | 1243 | if (insert_regs (XEXP (x, 0), NULL_PTR, 0)) |
7afe21cc RK |
1244 | { |
1245 | rehash_using_reg (XEXP (x, 0)); | |
1246 | changed = 1; | |
1247 | } | |
1248 | ||
1249 | if (GET_CODE (XEXP (x, 1)) == REG | |
1250 | && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 1)))) | |
906c4e36 | 1251 | if (insert_regs (XEXP (x, 1), NULL_PTR, 0)) |
7afe21cc RK |
1252 | { |
1253 | rehash_using_reg (XEXP (x, 1)); | |
1254 | changed = 1; | |
1255 | } | |
1256 | } | |
1257 | ||
1258 | fmt = GET_RTX_FORMAT (code); | |
1259 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
1260 | if (fmt[i] == 'e') | |
1261 | changed |= mention_regs (XEXP (x, i)); | |
1262 | else if (fmt[i] == 'E') | |
1263 | for (j = 0; j < XVECLEN (x, i); j++) | |
1264 | changed |= mention_regs (XVECEXP (x, i, j)); | |
1265 | ||
1266 | return changed; | |
1267 | } | |
1268 | ||
1269 | /* Update the register quantities for inserting X into the hash table | |
1270 | with a value equivalent to CLASSP. | |
1271 | (If the class does not contain a REG, it is irrelevant.) | |
1272 | If MODIFIED is nonzero, X is a destination; it is being modified. | |
1273 | Note that delete_reg_equiv should be called on a register | |
1274 | before insert_regs is done on that register with MODIFIED != 0. | |
1275 | ||
1276 | Nonzero value means that elements of reg_qty have changed | |
1277 | so X's hash code may be different. */ | |
1278 | ||
1279 | static int | |
1280 | insert_regs (x, classp, modified) | |
1281 | rtx x; | |
1282 | struct table_elt *classp; | |
1283 | int modified; | |
1284 | { | |
1285 | if (GET_CODE (x) == REG) | |
1286 | { | |
770ae6cc RK |
1287 | unsigned int regno = REGNO (x); |
1288 | int qty_valid; | |
7afe21cc | 1289 | |
1ff0c00d RK |
1290 | /* If REGNO is in the equivalence table already but is of the |
1291 | wrong mode for that equivalence, don't do anything here. */ | |
1292 | ||
1bb98cec DM |
1293 | qty_valid = REGNO_QTY_VALID_P (regno); |
1294 | if (qty_valid) | |
1295 | { | |
1296 | struct qty_table_elem *ent = &qty_table[REG_QTY (regno)]; | |
1ff0c00d | 1297 | |
1bb98cec DM |
1298 | if (ent->mode != GET_MODE (x)) |
1299 | return 0; | |
1300 | } | |
1301 | ||
1302 | if (modified || ! qty_valid) | |
7afe21cc RK |
1303 | { |
1304 | if (classp) | |
1305 | for (classp = classp->first_same_value; | |
1306 | classp != 0; | |
1307 | classp = classp->next_same_value) | |
1308 | if (GET_CODE (classp->exp) == REG | |
1309 | && GET_MODE (classp->exp) == GET_MODE (x)) | |
1310 | { | |
1311 | make_regs_eqv (regno, REGNO (classp->exp)); | |
1312 | return 1; | |
1313 | } | |
1314 | ||
d9f20424 R |
1315 | /* Mention_regs for a SUBREG checks if REG_TICK is exactly one larger |
1316 | than REG_IN_TABLE to find out if there was only a single preceding | |
1317 | invalidation - for the SUBREG - or another one, which would be | |
1318 | for the full register. However, if we find here that REG_TICK | |
1319 | indicates that the register is invalid, it means that it has | |
1320 | been invalidated in a separate operation. The SUBREG might be used | |
1321 | now (then this is a recursive call), or we might use the full REG | |
1322 | now and a SUBREG of it later. So bump up REG_TICK so that | |
1323 | mention_regs will do the right thing. */ | |
1324 | if (! modified | |
1325 | && REG_IN_TABLE (regno) >= 0 | |
1326 | && REG_TICK (regno) == REG_IN_TABLE (regno) + 1) | |
1327 | REG_TICK (regno)++; | |
1bb98cec | 1328 | make_new_qty (regno, GET_MODE (x)); |
7afe21cc RK |
1329 | return 1; |
1330 | } | |
cdf4112f TG |
1331 | |
1332 | return 0; | |
7afe21cc | 1333 | } |
c610adec RK |
1334 | |
1335 | /* If X is a SUBREG, we will likely be inserting the inner register in the | |
1336 | table. If that register doesn't have an assigned quantity number at | |
1337 | this point but does later, the insertion that we will be doing now will | |
1338 | not be accessible because its hash code will have changed. So assign | |
1339 | a quantity number now. */ | |
1340 | ||
1341 | else if (GET_CODE (x) == SUBREG && GET_CODE (SUBREG_REG (x)) == REG | |
1342 | && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x)))) | |
1343 | { | |
906c4e36 | 1344 | insert_regs (SUBREG_REG (x), NULL_PTR, 0); |
34c73909 | 1345 | mention_regs (x); |
c610adec RK |
1346 | return 1; |
1347 | } | |
7afe21cc RK |
1348 | else |
1349 | return mention_regs (x); | |
1350 | } | |
1351 | \f | |
1352 | /* Look in or update the hash table. */ | |
1353 | ||
7afe21cc RK |
1354 | /* Remove table element ELT from use in the table. |
1355 | HASH is its hash code, made using the HASH macro. | |
1356 | It's an argument because often that is known in advance | |
1357 | and we save much time not recomputing it. */ | |
1358 | ||
1359 | static void | |
1360 | remove_from_table (elt, hash) | |
1361 | register struct table_elt *elt; | |
2197a88a | 1362 | unsigned hash; |
7afe21cc RK |
1363 | { |
1364 | if (elt == 0) | |
1365 | return; | |
1366 | ||
1367 | /* Mark this element as removed. See cse_insn. */ | |
1368 | elt->first_same_value = 0; | |
1369 | ||
1370 | /* Remove the table element from its equivalence class. */ | |
278a83b2 | 1371 | |
7afe21cc RK |
1372 | { |
1373 | register struct table_elt *prev = elt->prev_same_value; | |
1374 | register struct table_elt *next = elt->next_same_value; | |
1375 | ||
278a83b2 KH |
1376 | if (next) |
1377 | next->prev_same_value = prev; | |
7afe21cc RK |
1378 | |
1379 | if (prev) | |
1380 | prev->next_same_value = next; | |
1381 | else | |
1382 | { | |
1383 | register struct table_elt *newfirst = next; | |
1384 | while (next) | |
1385 | { | |
1386 | next->first_same_value = newfirst; | |
1387 | next = next->next_same_value; | |
1388 | } | |
1389 | } | |
1390 | } | |
1391 | ||
1392 | /* Remove the table element from its hash bucket. */ | |
1393 | ||
1394 | { | |
1395 | register struct table_elt *prev = elt->prev_same_hash; | |
1396 | register struct table_elt *next = elt->next_same_hash; | |
1397 | ||
278a83b2 KH |
1398 | if (next) |
1399 | next->prev_same_hash = prev; | |
7afe21cc RK |
1400 | |
1401 | if (prev) | |
1402 | prev->next_same_hash = next; | |
1403 | else if (table[hash] == elt) | |
1404 | table[hash] = next; | |
1405 | else | |
1406 | { | |
1407 | /* This entry is not in the proper hash bucket. This can happen | |
1408 | when two classes were merged by `merge_equiv_classes'. Search | |
1409 | for the hash bucket that it heads. This happens only very | |
1410 | rarely, so the cost is acceptable. */ | |
9b1549b8 | 1411 | for (hash = 0; hash < HASH_SIZE; hash++) |
7afe21cc RK |
1412 | if (table[hash] == elt) |
1413 | table[hash] = next; | |
1414 | } | |
1415 | } | |
1416 | ||
1417 | /* Remove the table element from its related-value circular chain. */ | |
1418 | ||
1419 | if (elt->related_value != 0 && elt->related_value != elt) | |
1420 | { | |
1421 | register struct table_elt *p = elt->related_value; | |
770ae6cc | 1422 | |
7afe21cc RK |
1423 | while (p->related_value != elt) |
1424 | p = p->related_value; | |
1425 | p->related_value = elt->related_value; | |
1426 | if (p->related_value == p) | |
1427 | p->related_value = 0; | |
1428 | } | |
1429 | ||
9b1549b8 DM |
1430 | /* Now add it to the free element chain. */ |
1431 | elt->next_same_hash = free_element_chain; | |
1432 | free_element_chain = elt; | |
7afe21cc RK |
1433 | } |
1434 | ||
1435 | /* Look up X in the hash table and return its table element, | |
1436 | or 0 if X is not in the table. | |
1437 | ||
1438 | MODE is the machine-mode of X, or if X is an integer constant | |
1439 | with VOIDmode then MODE is the mode with which X will be used. | |
1440 | ||
1441 | Here we are satisfied to find an expression whose tree structure | |
1442 | looks like X. */ | |
1443 | ||
1444 | static struct table_elt * | |
1445 | lookup (x, hash, mode) | |
1446 | rtx x; | |
2197a88a | 1447 | unsigned hash; |
7afe21cc RK |
1448 | enum machine_mode mode; |
1449 | { | |
1450 | register struct table_elt *p; | |
1451 | ||
1452 | for (p = table[hash]; p; p = p->next_same_hash) | |
1453 | if (mode == p->mode && ((x == p->exp && GET_CODE (x) == REG) | |
1454 | || exp_equiv_p (x, p->exp, GET_CODE (x) != REG, 0))) | |
1455 | return p; | |
1456 | ||
1457 | return 0; | |
1458 | } | |
1459 | ||
1460 | /* Like `lookup' but don't care whether the table element uses invalid regs. | |
1461 | Also ignore discrepancies in the machine mode of a register. */ | |
1462 | ||
1463 | static struct table_elt * | |
1464 | lookup_for_remove (x, hash, mode) | |
1465 | rtx x; | |
2197a88a | 1466 | unsigned hash; |
7afe21cc RK |
1467 | enum machine_mode mode; |
1468 | { | |
1469 | register struct table_elt *p; | |
1470 | ||
1471 | if (GET_CODE (x) == REG) | |
1472 | { | |
770ae6cc RK |
1473 | unsigned int regno = REGNO (x); |
1474 | ||
7afe21cc RK |
1475 | /* Don't check the machine mode when comparing registers; |
1476 | invalidating (REG:SI 0) also invalidates (REG:DF 0). */ | |
1477 | for (p = table[hash]; p; p = p->next_same_hash) | |
1478 | if (GET_CODE (p->exp) == REG | |
1479 | && REGNO (p->exp) == regno) | |
1480 | return p; | |
1481 | } | |
1482 | else | |
1483 | { | |
1484 | for (p = table[hash]; p; p = p->next_same_hash) | |
1485 | if (mode == p->mode && (x == p->exp || exp_equiv_p (x, p->exp, 0, 0))) | |
1486 | return p; | |
1487 | } | |
1488 | ||
1489 | return 0; | |
1490 | } | |
1491 | ||
1492 | /* Look for an expression equivalent to X and with code CODE. | |
1493 | If one is found, return that expression. */ | |
1494 | ||
1495 | static rtx | |
1496 | lookup_as_function (x, code) | |
1497 | rtx x; | |
1498 | enum rtx_code code; | |
1499 | { | |
770ae6cc RK |
1500 | register struct table_elt *p |
1501 | = lookup (x, safe_hash (x, VOIDmode) & HASH_MASK, GET_MODE (x)); | |
1502 | ||
34c73909 R |
1503 | /* If we are looking for a CONST_INT, the mode doesn't really matter, as |
1504 | long as we are narrowing. So if we looked in vain for a mode narrower | |
1505 | than word_mode before, look for word_mode now. */ | |
1506 | if (p == 0 && code == CONST_INT | |
1507 | && GET_MODE_SIZE (GET_MODE (x)) < GET_MODE_SIZE (word_mode)) | |
1508 | { | |
1509 | x = copy_rtx (x); | |
1510 | PUT_MODE (x, word_mode); | |
9b1549b8 | 1511 | p = lookup (x, safe_hash (x, VOIDmode) & HASH_MASK, word_mode); |
34c73909 R |
1512 | } |
1513 | ||
7afe21cc RK |
1514 | if (p == 0) |
1515 | return 0; | |
1516 | ||
1517 | for (p = p->first_same_value; p; p = p->next_same_value) | |
770ae6cc RK |
1518 | if (GET_CODE (p->exp) == code |
1519 | /* Make sure this is a valid entry in the table. */ | |
1520 | && exp_equiv_p (p->exp, p->exp, 1, 0)) | |
1521 | return p->exp; | |
278a83b2 | 1522 | |
7afe21cc RK |
1523 | return 0; |
1524 | } | |
1525 | ||
1526 | /* Insert X in the hash table, assuming HASH is its hash code | |
1527 | and CLASSP is an element of the class it should go in | |
1528 | (or 0 if a new class should be made). | |
1529 | It is inserted at the proper position to keep the class in | |
1530 | the order cheapest first. | |
1531 | ||
1532 | MODE is the machine-mode of X, or if X is an integer constant | |
1533 | with VOIDmode then MODE is the mode with which X will be used. | |
1534 | ||
1535 | For elements of equal cheapness, the most recent one | |
1536 | goes in front, except that the first element in the list | |
1537 | remains first unless a cheaper element is added. The order of | |
1538 | pseudo-registers does not matter, as canon_reg will be called to | |
830a38ee | 1539 | find the cheapest when a register is retrieved from the table. |
7afe21cc RK |
1540 | |
1541 | The in_memory field in the hash table element is set to 0. | |
1542 | The caller must set it nonzero if appropriate. | |
1543 | ||
1544 | You should call insert_regs (X, CLASSP, MODIFY) before calling here, | |
1545 | and if insert_regs returns a nonzero value | |
1546 | you must then recompute its hash code before calling here. | |
1547 | ||
1548 | If necessary, update table showing constant values of quantities. */ | |
1549 | ||
630c79be BS |
1550 | #define CHEAPER(X, Y) \ |
1551 | (preferrable ((X)->cost, (X)->regcost, (Y)->cost, (Y)->regcost) < 0) | |
7afe21cc RK |
1552 | |
1553 | static struct table_elt * | |
1554 | insert (x, classp, hash, mode) | |
1555 | register rtx x; | |
1556 | register struct table_elt *classp; | |
2197a88a | 1557 | unsigned hash; |
7afe21cc RK |
1558 | enum machine_mode mode; |
1559 | { | |
1560 | register struct table_elt *elt; | |
1561 | ||
1562 | /* If X is a register and we haven't made a quantity for it, | |
1563 | something is wrong. */ | |
1564 | if (GET_CODE (x) == REG && ! REGNO_QTY_VALID_P (REGNO (x))) | |
1565 | abort (); | |
1566 | ||
1567 | /* If X is a hard register, show it is being put in the table. */ | |
1568 | if (GET_CODE (x) == REG && REGNO (x) < FIRST_PSEUDO_REGISTER) | |
1569 | { | |
770ae6cc RK |
1570 | unsigned int regno = REGNO (x); |
1571 | unsigned int endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (x)); | |
1572 | unsigned int i; | |
7afe21cc RK |
1573 | |
1574 | for (i = regno; i < endregno; i++) | |
770ae6cc | 1575 | SET_HARD_REG_BIT (hard_regs_in_table, i); |
7afe21cc RK |
1576 | } |
1577 | ||
a5dfb4ee | 1578 | /* If X is a label, show we recorded it. */ |
970c9ace RK |
1579 | if (GET_CODE (x) == LABEL_REF |
1580 | || (GET_CODE (x) == CONST && GET_CODE (XEXP (x, 0)) == PLUS | |
1581 | && GET_CODE (XEXP (XEXP (x, 0), 0)) == LABEL_REF)) | |
a5dfb4ee | 1582 | recorded_label_ref = 1; |
7afe21cc RK |
1583 | |
1584 | /* Put an element for X into the right hash bucket. */ | |
1585 | ||
9b1549b8 DM |
1586 | elt = free_element_chain; |
1587 | if (elt) | |
770ae6cc | 1588 | free_element_chain = elt->next_same_hash; |
9b1549b8 DM |
1589 | else |
1590 | { | |
1591 | n_elements_made++; | |
1592 | elt = (struct table_elt *) oballoc (sizeof (struct table_elt)); | |
1593 | } | |
1594 | ||
7afe21cc | 1595 | elt->exp = x; |
db048faf | 1596 | elt->canon_exp = NULL_RTX; |
7afe21cc | 1597 | elt->cost = COST (x); |
630c79be | 1598 | elt->regcost = approx_reg_cost (x); |
7afe21cc RK |
1599 | elt->next_same_value = 0; |
1600 | elt->prev_same_value = 0; | |
1601 | elt->next_same_hash = table[hash]; | |
1602 | elt->prev_same_hash = 0; | |
1603 | elt->related_value = 0; | |
1604 | elt->in_memory = 0; | |
1605 | elt->mode = mode; | |
1606 | elt->is_const = (CONSTANT_P (x) | |
1607 | /* GNU C++ takes advantage of this for `this' | |
1608 | (and other const values). */ | |
1609 | || (RTX_UNCHANGING_P (x) | |
1610 | && GET_CODE (x) == REG | |
1611 | && REGNO (x) >= FIRST_PSEUDO_REGISTER) | |
1612 | || FIXED_BASE_PLUS_P (x)); | |
1613 | ||
1614 | if (table[hash]) | |
1615 | table[hash]->prev_same_hash = elt; | |
1616 | table[hash] = elt; | |
1617 | ||
1618 | /* Put it into the proper value-class. */ | |
1619 | if (classp) | |
1620 | { | |
1621 | classp = classp->first_same_value; | |
1622 | if (CHEAPER (elt, classp)) | |
1623 | /* Insert at the head of the class */ | |
1624 | { | |
1625 | register struct table_elt *p; | |
1626 | elt->next_same_value = classp; | |
1627 | classp->prev_same_value = elt; | |
1628 | elt->first_same_value = elt; | |
1629 | ||
1630 | for (p = classp; p; p = p->next_same_value) | |
1631 | p->first_same_value = elt; | |
1632 | } | |
1633 | else | |
1634 | { | |
1635 | /* Insert not at head of the class. */ | |
1636 | /* Put it after the last element cheaper than X. */ | |
1637 | register struct table_elt *p, *next; | |
770ae6cc | 1638 | |
7afe21cc RK |
1639 | for (p = classp; (next = p->next_same_value) && CHEAPER (next, elt); |
1640 | p = next); | |
770ae6cc | 1641 | |
7afe21cc RK |
1642 | /* Put it after P and before NEXT. */ |
1643 | elt->next_same_value = next; | |
1644 | if (next) | |
1645 | next->prev_same_value = elt; | |
770ae6cc | 1646 | |
7afe21cc RK |
1647 | elt->prev_same_value = p; |
1648 | p->next_same_value = elt; | |
1649 | elt->first_same_value = classp; | |
1650 | } | |
1651 | } | |
1652 | else | |
1653 | elt->first_same_value = elt; | |
1654 | ||
1655 | /* If this is a constant being set equivalent to a register or a register | |
1656 | being set equivalent to a constant, note the constant equivalence. | |
1657 | ||
1658 | If this is a constant, it cannot be equivalent to a different constant, | |
1659 | and a constant is the only thing that can be cheaper than a register. So | |
1660 | we know the register is the head of the class (before the constant was | |
1661 | inserted). | |
1662 | ||
1663 | If this is a register that is not already known equivalent to a | |
1664 | constant, we must check the entire class. | |
1665 | ||
1666 | If this is a register that is already known equivalent to an insn, | |
1bb98cec | 1667 | update the qtys `const_insn' to show that `this_insn' is the latest |
7afe21cc RK |
1668 | insn making that quantity equivalent to the constant. */ |
1669 | ||
f353588a RK |
1670 | if (elt->is_const && classp && GET_CODE (classp->exp) == REG |
1671 | && GET_CODE (x) != REG) | |
7afe21cc | 1672 | { |
1bb98cec DM |
1673 | int exp_q = REG_QTY (REGNO (classp->exp)); |
1674 | struct qty_table_elem *exp_ent = &qty_table[exp_q]; | |
1675 | ||
1676 | exp_ent->const_rtx = gen_lowpart_if_possible (exp_ent->mode, x); | |
1677 | exp_ent->const_insn = this_insn; | |
7afe21cc RK |
1678 | } |
1679 | ||
1bb98cec DM |
1680 | else if (GET_CODE (x) == REG |
1681 | && classp | |
1682 | && ! qty_table[REG_QTY (REGNO (x))].const_rtx | |
f353588a | 1683 | && ! elt->is_const) |
7afe21cc RK |
1684 | { |
1685 | register struct table_elt *p; | |
1686 | ||
1687 | for (p = classp; p != 0; p = p->next_same_value) | |
1688 | { | |
f353588a | 1689 | if (p->is_const && GET_CODE (p->exp) != REG) |
7afe21cc | 1690 | { |
1bb98cec DM |
1691 | int x_q = REG_QTY (REGNO (x)); |
1692 | struct qty_table_elem *x_ent = &qty_table[x_q]; | |
1693 | ||
770ae6cc RK |
1694 | x_ent->const_rtx |
1695 | = gen_lowpart_if_possible (GET_MODE (x), p->exp); | |
1bb98cec | 1696 | x_ent->const_insn = this_insn; |
7afe21cc RK |
1697 | break; |
1698 | } | |
1699 | } | |
1700 | } | |
1701 | ||
1bb98cec DM |
1702 | else if (GET_CODE (x) == REG |
1703 | && qty_table[REG_QTY (REGNO (x))].const_rtx | |
1704 | && GET_MODE (x) == qty_table[REG_QTY (REGNO (x))].mode) | |
1705 | qty_table[REG_QTY (REGNO (x))].const_insn = this_insn; | |
7afe21cc RK |
1706 | |
1707 | /* If this is a constant with symbolic value, | |
1708 | and it has a term with an explicit integer value, | |
1709 | link it up with related expressions. */ | |
1710 | if (GET_CODE (x) == CONST) | |
1711 | { | |
1712 | rtx subexp = get_related_value (x); | |
2197a88a | 1713 | unsigned subhash; |
7afe21cc RK |
1714 | struct table_elt *subelt, *subelt_prev; |
1715 | ||
1716 | if (subexp != 0) | |
1717 | { | |
1718 | /* Get the integer-free subexpression in the hash table. */ | |
9b1549b8 | 1719 | subhash = safe_hash (subexp, mode) & HASH_MASK; |
7afe21cc RK |
1720 | subelt = lookup (subexp, subhash, mode); |
1721 | if (subelt == 0) | |
906c4e36 | 1722 | subelt = insert (subexp, NULL_PTR, subhash, mode); |
7afe21cc RK |
1723 | /* Initialize SUBELT's circular chain if it has none. */ |
1724 | if (subelt->related_value == 0) | |
1725 | subelt->related_value = subelt; | |
1726 | /* Find the element in the circular chain that precedes SUBELT. */ | |
1727 | subelt_prev = subelt; | |
1728 | while (subelt_prev->related_value != subelt) | |
1729 | subelt_prev = subelt_prev->related_value; | |
1730 | /* Put new ELT into SUBELT's circular chain just before SUBELT. | |
1731 | This way the element that follows SUBELT is the oldest one. */ | |
1732 | elt->related_value = subelt_prev->related_value; | |
1733 | subelt_prev->related_value = elt; | |
1734 | } | |
1735 | } | |
1736 | ||
1737 | return elt; | |
1738 | } | |
1739 | \f | |
1740 | /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from | |
1741 | CLASS2 into CLASS1. This is done when we have reached an insn which makes | |
1742 | the two classes equivalent. | |
1743 | ||
1744 | CLASS1 will be the surviving class; CLASS2 should not be used after this | |
1745 | call. | |
1746 | ||
1747 | Any invalid entries in CLASS2 will not be copied. */ | |
1748 | ||
1749 | static void | |
1750 | merge_equiv_classes (class1, class2) | |
1751 | struct table_elt *class1, *class2; | |
1752 | { | |
1753 | struct table_elt *elt, *next, *new; | |
1754 | ||
1755 | /* Ensure we start with the head of the classes. */ | |
1756 | class1 = class1->first_same_value; | |
1757 | class2 = class2->first_same_value; | |
1758 | ||
1759 | /* If they were already equal, forget it. */ | |
1760 | if (class1 == class2) | |
1761 | return; | |
1762 | ||
1763 | for (elt = class2; elt; elt = next) | |
1764 | { | |
770ae6cc | 1765 | unsigned int hash; |
7afe21cc RK |
1766 | rtx exp = elt->exp; |
1767 | enum machine_mode mode = elt->mode; | |
1768 | ||
1769 | next = elt->next_same_value; | |
1770 | ||
1771 | /* Remove old entry, make a new one in CLASS1's class. | |
1772 | Don't do this for invalid entries as we cannot find their | |
0f41302f | 1773 | hash code (it also isn't necessary). */ |
7afe21cc RK |
1774 | if (GET_CODE (exp) == REG || exp_equiv_p (exp, exp, 1, 0)) |
1775 | { | |
1776 | hash_arg_in_memory = 0; | |
7afe21cc | 1777 | hash = HASH (exp, mode); |
278a83b2 | 1778 | |
7afe21cc RK |
1779 | if (GET_CODE (exp) == REG) |
1780 | delete_reg_equiv (REGNO (exp)); | |
278a83b2 | 1781 | |
7afe21cc RK |
1782 | remove_from_table (elt, hash); |
1783 | ||
1784 | if (insert_regs (exp, class1, 0)) | |
8ae2b8f6 JW |
1785 | { |
1786 | rehash_using_reg (exp); | |
1787 | hash = HASH (exp, mode); | |
1788 | } | |
7afe21cc RK |
1789 | new = insert (exp, class1, hash, mode); |
1790 | new->in_memory = hash_arg_in_memory; | |
7afe21cc RK |
1791 | } |
1792 | } | |
1793 | } | |
1794 | \f | |
01e752d3 JL |
1795 | /* Flush the entire hash table. */ |
1796 | ||
1797 | static void | |
1798 | flush_hash_table () | |
1799 | { | |
1800 | int i; | |
1801 | struct table_elt *p; | |
1802 | ||
9b1549b8 | 1803 | for (i = 0; i < HASH_SIZE; i++) |
01e752d3 JL |
1804 | for (p = table[i]; p; p = table[i]) |
1805 | { | |
1806 | /* Note that invalidate can remove elements | |
1807 | after P in the current hash chain. */ | |
1808 | if (GET_CODE (p->exp) == REG) | |
1809 | invalidate (p->exp, p->mode); | |
1810 | else | |
1811 | remove_from_table (p, i); | |
1812 | } | |
1813 | } | |
14a774a9 | 1814 | \f |
2ce6dc2f JH |
1815 | /* Function called for each rtx to check whether true dependence exist. */ |
1816 | struct check_dependence_data | |
1817 | { | |
1818 | enum machine_mode mode; | |
1819 | rtx exp; | |
1820 | }; | |
1821 | static int | |
1822 | check_dependence (x, data) | |
1823 | rtx *x; | |
1824 | void *data; | |
1825 | { | |
1826 | struct check_dependence_data *d = (struct check_dependence_data *) data; | |
1827 | if (*x && GET_CODE (*x) == MEM) | |
1828 | return true_dependence (d->exp, d->mode, *x, cse_rtx_varies_p); | |
1829 | else | |
1830 | return 0; | |
1831 | } | |
1832 | \f | |
14a774a9 RK |
1833 | /* Remove from the hash table, or mark as invalid, all expressions whose |
1834 | values could be altered by storing in X. X is a register, a subreg, or | |
1835 | a memory reference with nonvarying address (because, when a memory | |
1836 | reference with a varying address is stored in, all memory references are | |
1837 | removed by invalidate_memory so specific invalidation is superfluous). | |
1838 | FULL_MODE, if not VOIDmode, indicates that this much should be | |
1839 | invalidated instead of just the amount indicated by the mode of X. This | |
1840 | is only used for bitfield stores into memory. | |
1841 | ||
1842 | A nonvarying address may be just a register or just a symbol reference, | |
1843 | or it may be either of those plus a numeric offset. */ | |
7afe21cc RK |
1844 | |
1845 | static void | |
bb4034b3 | 1846 | invalidate (x, full_mode) |
7afe21cc | 1847 | rtx x; |
bb4034b3 | 1848 | enum machine_mode full_mode; |
7afe21cc RK |
1849 | { |
1850 | register int i; | |
1851 | register struct table_elt *p; | |
7afe21cc | 1852 | |
14a774a9 | 1853 | switch (GET_CODE (x)) |
7afe21cc | 1854 | { |
14a774a9 RK |
1855 | case REG: |
1856 | { | |
1857 | /* If X is a register, dependencies on its contents are recorded | |
1858 | through the qty number mechanism. Just change the qty number of | |
1859 | the register, mark it as invalid for expressions that refer to it, | |
1860 | and remove it itself. */ | |
770ae6cc RK |
1861 | unsigned int regno = REGNO (x); |
1862 | unsigned int hash = HASH (x, GET_MODE (x)); | |
7afe21cc | 1863 | |
14a774a9 RK |
1864 | /* Remove REGNO from any quantity list it might be on and indicate |
1865 | that its value might have changed. If it is a pseudo, remove its | |
1866 | entry from the hash table. | |
7afe21cc | 1867 | |
14a774a9 RK |
1868 | For a hard register, we do the first two actions above for any |
1869 | additional hard registers corresponding to X. Then, if any of these | |
1870 | registers are in the table, we must remove any REG entries that | |
1871 | overlap these registers. */ | |
7afe21cc | 1872 | |
14a774a9 RK |
1873 | delete_reg_equiv (regno); |
1874 | REG_TICK (regno)++; | |
85e4d983 | 1875 | |
14a774a9 RK |
1876 | if (regno >= FIRST_PSEUDO_REGISTER) |
1877 | { | |
1878 | /* Because a register can be referenced in more than one mode, | |
1879 | we might have to remove more than one table entry. */ | |
1880 | struct table_elt *elt; | |
85e4d983 | 1881 | |
14a774a9 RK |
1882 | while ((elt = lookup_for_remove (x, hash, GET_MODE (x)))) |
1883 | remove_from_table (elt, hash); | |
1884 | } | |
1885 | else | |
1886 | { | |
1887 | HOST_WIDE_INT in_table | |
1888 | = TEST_HARD_REG_BIT (hard_regs_in_table, regno); | |
770ae6cc RK |
1889 | unsigned int endregno |
1890 | = regno + HARD_REGNO_NREGS (regno, GET_MODE (x)); | |
1891 | unsigned int tregno, tendregno, rn; | |
14a774a9 | 1892 | register struct table_elt *p, *next; |
7afe21cc | 1893 | |
14a774a9 | 1894 | CLEAR_HARD_REG_BIT (hard_regs_in_table, regno); |
7afe21cc | 1895 | |
770ae6cc | 1896 | for (rn = regno + 1; rn < endregno; rn++) |
14a774a9 | 1897 | { |
770ae6cc RK |
1898 | in_table |= TEST_HARD_REG_BIT (hard_regs_in_table, rn); |
1899 | CLEAR_HARD_REG_BIT (hard_regs_in_table, rn); | |
1900 | delete_reg_equiv (rn); | |
1901 | REG_TICK (rn)++; | |
14a774a9 | 1902 | } |
7afe21cc | 1903 | |
14a774a9 | 1904 | if (in_table) |
9b1549b8 | 1905 | for (hash = 0; hash < HASH_SIZE; hash++) |
14a774a9 RK |
1906 | for (p = table[hash]; p; p = next) |
1907 | { | |
1908 | next = p->next_same_hash; | |
7afe21cc | 1909 | |
278a83b2 KH |
1910 | if (GET_CODE (p->exp) != REG |
1911 | || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER) | |
1912 | continue; | |
1913 | ||
14a774a9 RK |
1914 | tregno = REGNO (p->exp); |
1915 | tendregno | |
1916 | = tregno + HARD_REGNO_NREGS (tregno, GET_MODE (p->exp)); | |
1917 | if (tendregno > regno && tregno < endregno) | |
1918 | remove_from_table (p, hash); | |
1919 | } | |
1920 | } | |
1921 | } | |
7afe21cc | 1922 | return; |
7afe21cc | 1923 | |
14a774a9 | 1924 | case SUBREG: |
bb4034b3 | 1925 | invalidate (SUBREG_REG (x), VOIDmode); |
7afe21cc | 1926 | return; |
aac5cc16 | 1927 | |
14a774a9 | 1928 | case PARALLEL: |
278a83b2 | 1929 | for (i = XVECLEN (x, 0) - 1; i >= 0; --i) |
aac5cc16 RH |
1930 | invalidate (XVECEXP (x, 0, i), VOIDmode); |
1931 | return; | |
aac5cc16 | 1932 | |
14a774a9 RK |
1933 | case EXPR_LIST: |
1934 | /* This is part of a disjoint return value; extract the location in | |
1935 | question ignoring the offset. */ | |
aac5cc16 RH |
1936 | invalidate (XEXP (x, 0), VOIDmode); |
1937 | return; | |
7afe21cc | 1938 | |
14a774a9 | 1939 | case MEM: |
db048faf MM |
1940 | /* Calculate the canonical version of X here so that |
1941 | true_dependence doesn't generate new RTL for X on each call. */ | |
1942 | x = canon_rtx (x); | |
1943 | ||
14a774a9 RK |
1944 | /* Remove all hash table elements that refer to overlapping pieces of |
1945 | memory. */ | |
1946 | if (full_mode == VOIDmode) | |
1947 | full_mode = GET_MODE (x); | |
bb4034b3 | 1948 | |
9b1549b8 | 1949 | for (i = 0; i < HASH_SIZE; i++) |
7afe21cc | 1950 | { |
14a774a9 RK |
1951 | register struct table_elt *next; |
1952 | ||
1953 | for (p = table[i]; p; p = next) | |
1954 | { | |
1955 | next = p->next_same_hash; | |
db048faf MM |
1956 | if (p->in_memory) |
1957 | { | |
2ce6dc2f JH |
1958 | struct check_dependence_data d; |
1959 | ||
1960 | /* Just canonicalize the expression once; | |
1961 | otherwise each time we call invalidate | |
1962 | true_dependence will canonicalize the | |
1963 | expression again. */ | |
1964 | if (!p->canon_exp) | |
1965 | p->canon_exp = canon_rtx (p->exp); | |
1966 | d.exp = x; | |
1967 | d.mode = full_mode; | |
1968 | if (for_each_rtx (&p->canon_exp, check_dependence, &d)) | |
db048faf | 1969 | remove_from_table (p, i); |
db048faf | 1970 | } |
14a774a9 | 1971 | } |
7afe21cc | 1972 | } |
14a774a9 RK |
1973 | return; |
1974 | ||
1975 | default: | |
1976 | abort (); | |
7afe21cc RK |
1977 | } |
1978 | } | |
14a774a9 | 1979 | \f |
7afe21cc RK |
1980 | /* Remove all expressions that refer to register REGNO, |
1981 | since they are already invalid, and we are about to | |
1982 | mark that register valid again and don't want the old | |
1983 | expressions to reappear as valid. */ | |
1984 | ||
1985 | static void | |
1986 | remove_invalid_refs (regno) | |
770ae6cc | 1987 | unsigned int regno; |
7afe21cc | 1988 | { |
770ae6cc RK |
1989 | unsigned int i; |
1990 | struct table_elt *p, *next; | |
7afe21cc | 1991 | |
9b1549b8 | 1992 | for (i = 0; i < HASH_SIZE; i++) |
7afe21cc RK |
1993 | for (p = table[i]; p; p = next) |
1994 | { | |
1995 | next = p->next_same_hash; | |
1996 | if (GET_CODE (p->exp) != REG | |
906c4e36 | 1997 | && refers_to_regno_p (regno, regno + 1, p->exp, NULL_PTR)) |
7afe21cc RK |
1998 | remove_from_table (p, i); |
1999 | } | |
2000 | } | |
34c73909 R |
2001 | |
2002 | /* Likewise for a subreg with subreg_reg WORD and mode MODE. */ | |
2003 | static void | |
2004 | remove_invalid_subreg_refs (regno, word, mode) | |
770ae6cc RK |
2005 | unsigned int regno; |
2006 | unsigned int word; | |
34c73909 R |
2007 | enum machine_mode mode; |
2008 | { | |
770ae6cc RK |
2009 | unsigned int i; |
2010 | struct table_elt *p, *next; | |
2011 | unsigned int end = word + (GET_MODE_SIZE (mode) - 1) / UNITS_PER_WORD; | |
34c73909 | 2012 | |
9b1549b8 | 2013 | for (i = 0; i < HASH_SIZE; i++) |
34c73909 R |
2014 | for (p = table[i]; p; p = next) |
2015 | { | |
2016 | rtx exp; | |
2017 | next = p->next_same_hash; | |
278a83b2 | 2018 | |
34c73909 R |
2019 | exp = p->exp; |
2020 | if (GET_CODE (p->exp) != REG | |
2021 | && (GET_CODE (exp) != SUBREG | |
2022 | || GET_CODE (SUBREG_REG (exp)) != REG | |
2023 | || REGNO (SUBREG_REG (exp)) != regno | |
2024 | || (((SUBREG_WORD (exp) | |
2025 | + (GET_MODE_SIZE (GET_MODE (exp)) - 1) / UNITS_PER_WORD) | |
2026 | >= word) | |
ddc356e8 | 2027 | && SUBREG_WORD (exp) <= end)) |
34c73909 R |
2028 | && refers_to_regno_p (regno, regno + 1, p->exp, NULL_PTR)) |
2029 | remove_from_table (p, i); | |
2030 | } | |
2031 | } | |
7afe21cc RK |
2032 | \f |
2033 | /* Recompute the hash codes of any valid entries in the hash table that | |
2034 | reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG. | |
2035 | ||
2036 | This is called when we make a jump equivalence. */ | |
2037 | ||
2038 | static void | |
2039 | rehash_using_reg (x) | |
2040 | rtx x; | |
2041 | { | |
973838fd | 2042 | unsigned int i; |
7afe21cc | 2043 | struct table_elt *p, *next; |
2197a88a | 2044 | unsigned hash; |
7afe21cc RK |
2045 | |
2046 | if (GET_CODE (x) == SUBREG) | |
2047 | x = SUBREG_REG (x); | |
2048 | ||
2049 | /* If X is not a register or if the register is known not to be in any | |
2050 | valid entries in the table, we have no work to do. */ | |
2051 | ||
2052 | if (GET_CODE (x) != REG | |
30f72379 MM |
2053 | || REG_IN_TABLE (REGNO (x)) < 0 |
2054 | || REG_IN_TABLE (REGNO (x)) != REG_TICK (REGNO (x))) | |
7afe21cc RK |
2055 | return; |
2056 | ||
2057 | /* Scan all hash chains looking for valid entries that mention X. | |
2058 | If we find one and it is in the wrong hash chain, move it. We can skip | |
2059 | objects that are registers, since they are handled specially. */ | |
2060 | ||
9b1549b8 | 2061 | for (i = 0; i < HASH_SIZE; i++) |
7afe21cc RK |
2062 | for (p = table[i]; p; p = next) |
2063 | { | |
2064 | next = p->next_same_hash; | |
2065 | if (GET_CODE (p->exp) != REG && reg_mentioned_p (x, p->exp) | |
538b78e7 | 2066 | && exp_equiv_p (p->exp, p->exp, 1, 0) |
9b1549b8 | 2067 | && i != (hash = safe_hash (p->exp, p->mode) & HASH_MASK)) |
7afe21cc RK |
2068 | { |
2069 | if (p->next_same_hash) | |
2070 | p->next_same_hash->prev_same_hash = p->prev_same_hash; | |
2071 | ||
2072 | if (p->prev_same_hash) | |
2073 | p->prev_same_hash->next_same_hash = p->next_same_hash; | |
2074 | else | |
2075 | table[i] = p->next_same_hash; | |
2076 | ||
2077 | p->next_same_hash = table[hash]; | |
2078 | p->prev_same_hash = 0; | |
2079 | if (table[hash]) | |
2080 | table[hash]->prev_same_hash = p; | |
2081 | table[hash] = p; | |
2082 | } | |
2083 | } | |
2084 | } | |
2085 | \f | |
7afe21cc RK |
2086 | /* Remove from the hash table any expression that is a call-clobbered |
2087 | register. Also update their TICK values. */ | |
2088 | ||
2089 | static void | |
2090 | invalidate_for_call () | |
2091 | { | |
770ae6cc RK |
2092 | unsigned int regno, endregno; |
2093 | unsigned int i; | |
2197a88a | 2094 | unsigned hash; |
7afe21cc RK |
2095 | struct table_elt *p, *next; |
2096 | int in_table = 0; | |
2097 | ||
2098 | /* Go through all the hard registers. For each that is clobbered in | |
2099 | a CALL_INSN, remove the register from quantity chains and update | |
2100 | reg_tick if defined. Also see if any of these registers is currently | |
2101 | in the table. */ | |
2102 | ||
2103 | for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) | |
2104 | if (TEST_HARD_REG_BIT (regs_invalidated_by_call, regno)) | |
2105 | { | |
2106 | delete_reg_equiv (regno); | |
30f72379 MM |
2107 | if (REG_TICK (regno) >= 0) |
2108 | REG_TICK (regno)++; | |
7afe21cc | 2109 | |
0e227018 | 2110 | in_table |= (TEST_HARD_REG_BIT (hard_regs_in_table, regno) != 0); |
7afe21cc RK |
2111 | } |
2112 | ||
2113 | /* In the case where we have no call-clobbered hard registers in the | |
2114 | table, we are done. Otherwise, scan the table and remove any | |
2115 | entry that overlaps a call-clobbered register. */ | |
2116 | ||
2117 | if (in_table) | |
9b1549b8 | 2118 | for (hash = 0; hash < HASH_SIZE; hash++) |
7afe21cc RK |
2119 | for (p = table[hash]; p; p = next) |
2120 | { | |
2121 | next = p->next_same_hash; | |
2122 | ||
2123 | if (GET_CODE (p->exp) != REG | |
2124 | || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER) | |
2125 | continue; | |
2126 | ||
2127 | regno = REGNO (p->exp); | |
2128 | endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (p->exp)); | |
2129 | ||
2130 | for (i = regno; i < endregno; i++) | |
2131 | if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i)) | |
2132 | { | |
2133 | remove_from_table (p, hash); | |
2134 | break; | |
2135 | } | |
2136 | } | |
2137 | } | |
2138 | \f | |
2139 | /* Given an expression X of type CONST, | |
2140 | and ELT which is its table entry (or 0 if it | |
2141 | is not in the hash table), | |
2142 | return an alternate expression for X as a register plus integer. | |
2143 | If none can be found, return 0. */ | |
2144 | ||
2145 | static rtx | |
2146 | use_related_value (x, elt) | |
2147 | rtx x; | |
2148 | struct table_elt *elt; | |
2149 | { | |
2150 | register struct table_elt *relt = 0; | |
2151 | register struct table_elt *p, *q; | |
906c4e36 | 2152 | HOST_WIDE_INT offset; |
7afe21cc RK |
2153 | |
2154 | /* First, is there anything related known? | |
2155 | If we have a table element, we can tell from that. | |
2156 | Otherwise, must look it up. */ | |
2157 | ||
2158 | if (elt != 0 && elt->related_value != 0) | |
2159 | relt = elt; | |
2160 | else if (elt == 0 && GET_CODE (x) == CONST) | |
2161 | { | |
2162 | rtx subexp = get_related_value (x); | |
2163 | if (subexp != 0) | |
2164 | relt = lookup (subexp, | |
9b1549b8 | 2165 | safe_hash (subexp, GET_MODE (subexp)) & HASH_MASK, |
7afe21cc RK |
2166 | GET_MODE (subexp)); |
2167 | } | |
2168 | ||
2169 | if (relt == 0) | |
2170 | return 0; | |
2171 | ||
2172 | /* Search all related table entries for one that has an | |
2173 | equivalent register. */ | |
2174 | ||
2175 | p = relt; | |
2176 | while (1) | |
2177 | { | |
2178 | /* This loop is strange in that it is executed in two different cases. | |
2179 | The first is when X is already in the table. Then it is searching | |
2180 | the RELATED_VALUE list of X's class (RELT). The second case is when | |
2181 | X is not in the table. Then RELT points to a class for the related | |
2182 | value. | |
2183 | ||
2184 | Ensure that, whatever case we are in, that we ignore classes that have | |
2185 | the same value as X. */ | |
2186 | ||
2187 | if (rtx_equal_p (x, p->exp)) | |
2188 | q = 0; | |
2189 | else | |
2190 | for (q = p->first_same_value; q; q = q->next_same_value) | |
2191 | if (GET_CODE (q->exp) == REG) | |
2192 | break; | |
2193 | ||
2194 | if (q) | |
2195 | break; | |
2196 | ||
2197 | p = p->related_value; | |
2198 | ||
2199 | /* We went all the way around, so there is nothing to be found. | |
2200 | Alternatively, perhaps RELT was in the table for some other reason | |
2201 | and it has no related values recorded. */ | |
2202 | if (p == relt || p == 0) | |
2203 | break; | |
2204 | } | |
2205 | ||
2206 | if (q == 0) | |
2207 | return 0; | |
2208 | ||
2209 | offset = (get_integer_term (x) - get_integer_term (p->exp)); | |
2210 | /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */ | |
2211 | return plus_constant (q->exp, offset); | |
2212 | } | |
2213 | \f | |
6462bb43 AO |
2214 | /* Hash a string. Just add its bytes up. */ |
2215 | static inline unsigned | |
2216 | canon_hash_string (ps) | |
2217 | const char *ps; | |
2218 | { | |
2219 | unsigned hash = 0; | |
2220 | const unsigned char *p = (const unsigned char *)ps; | |
2221 | ||
2222 | if (p) | |
2223 | while (*p) | |
2224 | hash += *p++; | |
2225 | ||
2226 | return hash; | |
2227 | } | |
2228 | ||
7afe21cc RK |
2229 | /* Hash an rtx. We are careful to make sure the value is never negative. |
2230 | Equivalent registers hash identically. | |
2231 | MODE is used in hashing for CONST_INTs only; | |
2232 | otherwise the mode of X is used. | |
2233 | ||
2234 | Store 1 in do_not_record if any subexpression is volatile. | |
2235 | ||
2236 | Store 1 in hash_arg_in_memory if X contains a MEM rtx | |
2237 | which does not have the RTX_UNCHANGING_P bit set. | |
7afe21cc RK |
2238 | |
2239 | Note that cse_insn knows that the hash code of a MEM expression | |
2240 | is just (int) MEM plus the hash code of the address. */ | |
2241 | ||
2197a88a | 2242 | static unsigned |
7afe21cc RK |
2243 | canon_hash (x, mode) |
2244 | rtx x; | |
2245 | enum machine_mode mode; | |
2246 | { | |
2247 | register int i, j; | |
2197a88a | 2248 | register unsigned hash = 0; |
7afe21cc | 2249 | register enum rtx_code code; |
6f7d635c | 2250 | register const char *fmt; |
7afe21cc RK |
2251 | |
2252 | /* repeat is used to turn tail-recursion into iteration. */ | |
2253 | repeat: | |
2254 | if (x == 0) | |
2255 | return hash; | |
2256 | ||
2257 | code = GET_CODE (x); | |
2258 | switch (code) | |
2259 | { | |
2260 | case REG: | |
2261 | { | |
770ae6cc | 2262 | unsigned int regno = REGNO (x); |
7afe21cc RK |
2263 | |
2264 | /* On some machines, we can't record any non-fixed hard register, | |
2265 | because extending its life will cause reload problems. We | |
278a83b2 | 2266 | consider ap, fp, and sp to be fixed for this purpose. |
9a794e50 RH |
2267 | |
2268 | We also consider CCmode registers to be fixed for this purpose; | |
2269 | failure to do so leads to failure to simplify 0<100 type of | |
2270 | conditionals. | |
2271 | ||
0f41302f | 2272 | On all machines, we can't record any global registers. */ |
7afe21cc RK |
2273 | |
2274 | if (regno < FIRST_PSEUDO_REGISTER | |
2275 | && (global_regs[regno] | |
f95182a4 ILT |
2276 | || (SMALL_REGISTER_CLASSES |
2277 | && ! fixed_regs[regno] | |
7afe21cc | 2278 | && regno != FRAME_POINTER_REGNUM |
8bc169f2 | 2279 | && regno != HARD_FRAME_POINTER_REGNUM |
7afe21cc | 2280 | && regno != ARG_POINTER_REGNUM |
9a794e50 RH |
2281 | && regno != STACK_POINTER_REGNUM |
2282 | && GET_MODE_CLASS (GET_MODE (x)) != MODE_CC))) | |
7afe21cc RK |
2283 | { |
2284 | do_not_record = 1; | |
2285 | return 0; | |
2286 | } | |
770ae6cc | 2287 | |
30f72379 | 2288 | hash += ((unsigned) REG << 7) + (unsigned) REG_QTY (regno); |
2197a88a | 2289 | return hash; |
7afe21cc RK |
2290 | } |
2291 | ||
34c73909 R |
2292 | /* We handle SUBREG of a REG specially because the underlying |
2293 | reg changes its hash value with every value change; we don't | |
2294 | want to have to forget unrelated subregs when one subreg changes. */ | |
2295 | case SUBREG: | |
2296 | { | |
2297 | if (GET_CODE (SUBREG_REG (x)) == REG) | |
2298 | { | |
2299 | hash += (((unsigned) SUBREG << 7) | |
2300 | + REGNO (SUBREG_REG (x)) + SUBREG_WORD (x)); | |
2301 | return hash; | |
2302 | } | |
2303 | break; | |
2304 | } | |
2305 | ||
7afe21cc | 2306 | case CONST_INT: |
2197a88a RK |
2307 | { |
2308 | unsigned HOST_WIDE_INT tem = INTVAL (x); | |
2309 | hash += ((unsigned) CONST_INT << 7) + (unsigned) mode + tem; | |
2310 | return hash; | |
2311 | } | |
7afe21cc RK |
2312 | |
2313 | case CONST_DOUBLE: | |
2314 | /* This is like the general case, except that it only counts | |
2315 | the integers representing the constant. */ | |
2197a88a | 2316 | hash += (unsigned) code + (unsigned) GET_MODE (x); |
969c8517 RK |
2317 | if (GET_MODE (x) != VOIDmode) |
2318 | for (i = 2; i < GET_RTX_LENGTH (CONST_DOUBLE); i++) | |
2319 | { | |
ef178af3 | 2320 | unsigned HOST_WIDE_INT tem = XWINT (x, i); |
969c8517 RK |
2321 | hash += tem; |
2322 | } | |
2323 | else | |
2324 | hash += ((unsigned) CONST_DOUBLE_LOW (x) | |
2325 | + (unsigned) CONST_DOUBLE_HIGH (x)); | |
7afe21cc RK |
2326 | return hash; |
2327 | ||
2328 | /* Assume there is only one rtx object for any given label. */ | |
2329 | case LABEL_REF: | |
ddc356e8 | 2330 | hash += ((unsigned) LABEL_REF << 7) + (unsigned long) XEXP (x, 0); |
2197a88a | 2331 | return hash; |
7afe21cc RK |
2332 | |
2333 | case SYMBOL_REF: | |
ddc356e8 | 2334 | hash += ((unsigned) SYMBOL_REF << 7) + (unsigned long) XSTR (x, 0); |
2197a88a | 2335 | return hash; |
7afe21cc RK |
2336 | |
2337 | case MEM: | |
14a774a9 RK |
2338 | /* We don't record if marked volatile or if BLKmode since we don't |
2339 | know the size of the move. */ | |
2340 | if (MEM_VOLATILE_P (x) || GET_MODE (x) == BLKmode) | |
7afe21cc RK |
2341 | { |
2342 | do_not_record = 1; | |
2343 | return 0; | |
2344 | } | |
9ad91d71 | 2345 | if (! RTX_UNCHANGING_P (x) || FIXED_BASE_PLUS_P (XEXP (x, 0))) |
7afe21cc RK |
2346 | { |
2347 | hash_arg_in_memory = 1; | |
7afe21cc RK |
2348 | } |
2349 | /* Now that we have already found this special case, | |
2350 | might as well speed it up as much as possible. */ | |
2197a88a | 2351 | hash += (unsigned) MEM; |
7afe21cc RK |
2352 | x = XEXP (x, 0); |
2353 | goto repeat; | |
2354 | ||
bb07060a JW |
2355 | case USE: |
2356 | /* A USE that mentions non-volatile memory needs special | |
2357 | handling since the MEM may be BLKmode which normally | |
2358 | prevents an entry from being made. Pure calls are | |
2359 | marked by a USE which mentions BLKmode memory. */ | |
2360 | if (GET_CODE (XEXP (x, 0)) == MEM | |
2361 | && ! MEM_VOLATILE_P (XEXP (x, 0))) | |
2362 | { | |
2363 | hash += (unsigned)USE; | |
2364 | x = XEXP (x, 0); | |
2365 | ||
2366 | if (! RTX_UNCHANGING_P (x) || FIXED_BASE_PLUS_P (XEXP (x, 0))) | |
2367 | hash_arg_in_memory = 1; | |
2368 | ||
2369 | /* Now that we have already found this special case, | |
2370 | might as well speed it up as much as possible. */ | |
2371 | hash += (unsigned) MEM; | |
2372 | x = XEXP (x, 0); | |
2373 | goto repeat; | |
2374 | } | |
2375 | break; | |
2376 | ||
7afe21cc RK |
2377 | case PRE_DEC: |
2378 | case PRE_INC: | |
2379 | case POST_DEC: | |
2380 | case POST_INC: | |
4b983fdc RH |
2381 | case PRE_MODIFY: |
2382 | case POST_MODIFY: | |
7afe21cc RK |
2383 | case PC: |
2384 | case CC0: | |
2385 | case CALL: | |
2386 | case UNSPEC_VOLATILE: | |
2387 | do_not_record = 1; | |
2388 | return 0; | |
2389 | ||
2390 | case ASM_OPERANDS: | |
2391 | if (MEM_VOLATILE_P (x)) | |
2392 | { | |
2393 | do_not_record = 1; | |
2394 | return 0; | |
2395 | } | |
6462bb43 AO |
2396 | else |
2397 | { | |
2398 | /* We don't want to take the filename and line into account. */ | |
2399 | hash += (unsigned) code + (unsigned) GET_MODE (x) | |
2400 | + canon_hash_string (ASM_OPERANDS_TEMPLATE (x)) | |
2401 | + canon_hash_string (ASM_OPERANDS_OUTPUT_CONSTRAINT (x)) | |
2402 | + (unsigned) ASM_OPERANDS_OUTPUT_IDX (x); | |
2403 | ||
2404 | if (ASM_OPERANDS_INPUT_LENGTH (x)) | |
2405 | { | |
2406 | for (i = 1; i < ASM_OPERANDS_INPUT_LENGTH (x); i++) | |
2407 | { | |
2408 | hash += (canon_hash (ASM_OPERANDS_INPUT (x, i), | |
2409 | GET_MODE (ASM_OPERANDS_INPUT (x, i))) | |
2410 | + canon_hash_string (ASM_OPERANDS_INPUT_CONSTRAINT | |
2411 | (x, i))); | |
2412 | } | |
2413 | ||
2414 | hash += canon_hash_string (ASM_OPERANDS_INPUT_CONSTRAINT (x, 0)); | |
2415 | x = ASM_OPERANDS_INPUT (x, 0); | |
2416 | mode = GET_MODE (x); | |
2417 | goto repeat; | |
2418 | } | |
2419 | ||
2420 | return hash; | |
2421 | } | |
e9a25f70 | 2422 | break; |
278a83b2 | 2423 | |
e9a25f70 JL |
2424 | default: |
2425 | break; | |
7afe21cc RK |
2426 | } |
2427 | ||
2428 | i = GET_RTX_LENGTH (code) - 1; | |
2197a88a | 2429 | hash += (unsigned) code + (unsigned) GET_MODE (x); |
7afe21cc RK |
2430 | fmt = GET_RTX_FORMAT (code); |
2431 | for (; i >= 0; i--) | |
2432 | { | |
2433 | if (fmt[i] == 'e') | |
2434 | { | |
2435 | rtx tem = XEXP (x, i); | |
7afe21cc RK |
2436 | |
2437 | /* If we are about to do the last recursive call | |
2438 | needed at this level, change it into iteration. | |
2439 | This function is called enough to be worth it. */ | |
2440 | if (i == 0) | |
2441 | { | |
2442 | x = tem; | |
2443 | goto repeat; | |
2444 | } | |
2445 | hash += canon_hash (tem, 0); | |
2446 | } | |
2447 | else if (fmt[i] == 'E') | |
2448 | for (j = 0; j < XVECLEN (x, i); j++) | |
2449 | hash += canon_hash (XVECEXP (x, i, j), 0); | |
2450 | else if (fmt[i] == 's') | |
6462bb43 | 2451 | hash += canon_hash_string (XSTR (x, i)); |
7afe21cc RK |
2452 | else if (fmt[i] == 'i') |
2453 | { | |
2197a88a RK |
2454 | register unsigned tem = XINT (x, i); |
2455 | hash += tem; | |
7afe21cc | 2456 | } |
8f985ec4 | 2457 | else if (fmt[i] == '0' || fmt[i] == 't') |
ddc356e8 KH |
2458 | /* Unused. */ |
2459 | ; | |
7afe21cc RK |
2460 | else |
2461 | abort (); | |
2462 | } | |
2463 | return hash; | |
2464 | } | |
2465 | ||
2466 | /* Like canon_hash but with no side effects. */ | |
2467 | ||
2197a88a | 2468 | static unsigned |
7afe21cc RK |
2469 | safe_hash (x, mode) |
2470 | rtx x; | |
2471 | enum machine_mode mode; | |
2472 | { | |
2473 | int save_do_not_record = do_not_record; | |
2474 | int save_hash_arg_in_memory = hash_arg_in_memory; | |
2197a88a | 2475 | unsigned hash = canon_hash (x, mode); |
7afe21cc | 2476 | hash_arg_in_memory = save_hash_arg_in_memory; |
7afe21cc RK |
2477 | do_not_record = save_do_not_record; |
2478 | return hash; | |
2479 | } | |
2480 | \f | |
2481 | /* Return 1 iff X and Y would canonicalize into the same thing, | |
2482 | without actually constructing the canonicalization of either one. | |
2483 | If VALIDATE is nonzero, | |
2484 | we assume X is an expression being processed from the rtl | |
2485 | and Y was found in the hash table. We check register refs | |
2486 | in Y for being marked as valid. | |
2487 | ||
2488 | If EQUAL_VALUES is nonzero, we allow a register to match a constant value | |
2489 | that is known to be in the register. Ordinarily, we don't allow them | |
2490 | to match, because letting them match would cause unpredictable results | |
2491 | in all the places that search a hash table chain for an equivalent | |
2492 | for a given value. A possible equivalent that has different structure | |
2493 | has its hash code computed from different data. Whether the hash code | |
38e01259 | 2494 | is the same as that of the given value is pure luck. */ |
7afe21cc RK |
2495 | |
2496 | static int | |
2497 | exp_equiv_p (x, y, validate, equal_values) | |
2498 | rtx x, y; | |
2499 | int validate; | |
2500 | int equal_values; | |
2501 | { | |
906c4e36 | 2502 | register int i, j; |
7afe21cc | 2503 | register enum rtx_code code; |
6f7d635c | 2504 | register const char *fmt; |
7afe21cc RK |
2505 | |
2506 | /* Note: it is incorrect to assume an expression is equivalent to itself | |
2507 | if VALIDATE is nonzero. */ | |
2508 | if (x == y && !validate) | |
2509 | return 1; | |
2510 | if (x == 0 || y == 0) | |
2511 | return x == y; | |
2512 | ||
2513 | code = GET_CODE (x); | |
2514 | if (code != GET_CODE (y)) | |
2515 | { | |
2516 | if (!equal_values) | |
2517 | return 0; | |
2518 | ||
2519 | /* If X is a constant and Y is a register or vice versa, they may be | |
2520 | equivalent. We only have to validate if Y is a register. */ | |
2521 | if (CONSTANT_P (x) && GET_CODE (y) == REG | |
1bb98cec DM |
2522 | && REGNO_QTY_VALID_P (REGNO (y))) |
2523 | { | |
2524 | int y_q = REG_QTY (REGNO (y)); | |
2525 | struct qty_table_elem *y_ent = &qty_table[y_q]; | |
2526 | ||
2527 | if (GET_MODE (y) == y_ent->mode | |
2528 | && rtx_equal_p (x, y_ent->const_rtx) | |
2529 | && (! validate || REG_IN_TABLE (REGNO (y)) == REG_TICK (REGNO (y)))) | |
2530 | return 1; | |
2531 | } | |
7afe21cc RK |
2532 | |
2533 | if (CONSTANT_P (y) && code == REG | |
1bb98cec DM |
2534 | && REGNO_QTY_VALID_P (REGNO (x))) |
2535 | { | |
2536 | int x_q = REG_QTY (REGNO (x)); | |
2537 | struct qty_table_elem *x_ent = &qty_table[x_q]; | |
2538 | ||
2539 | if (GET_MODE (x) == x_ent->mode | |
2540 | && rtx_equal_p (y, x_ent->const_rtx)) | |
2541 | return 1; | |
2542 | } | |
7afe21cc RK |
2543 | |
2544 | return 0; | |
2545 | } | |
2546 | ||
2547 | /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */ | |
2548 | if (GET_MODE (x) != GET_MODE (y)) | |
2549 | return 0; | |
2550 | ||
2551 | switch (code) | |
2552 | { | |
2553 | case PC: | |
2554 | case CC0: | |
7afe21cc | 2555 | case CONST_INT: |
c13e8210 | 2556 | return x == y; |
7afe21cc RK |
2557 | |
2558 | case LABEL_REF: | |
7afe21cc RK |
2559 | return XEXP (x, 0) == XEXP (y, 0); |
2560 | ||
f54d4924 RK |
2561 | case SYMBOL_REF: |
2562 | return XSTR (x, 0) == XSTR (y, 0); | |
2563 | ||
7afe21cc RK |
2564 | case REG: |
2565 | { | |
770ae6cc RK |
2566 | unsigned int regno = REGNO (y); |
2567 | unsigned int endregno | |
7afe21cc RK |
2568 | = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1 |
2569 | : HARD_REGNO_NREGS (regno, GET_MODE (y))); | |
770ae6cc | 2570 | unsigned int i; |
7afe21cc RK |
2571 | |
2572 | /* If the quantities are not the same, the expressions are not | |
2573 | equivalent. If there are and we are not to validate, they | |
2574 | are equivalent. Otherwise, ensure all regs are up-to-date. */ | |
2575 | ||
30f72379 | 2576 | if (REG_QTY (REGNO (x)) != REG_QTY (regno)) |
7afe21cc RK |
2577 | return 0; |
2578 | ||
2579 | if (! validate) | |
2580 | return 1; | |
2581 | ||
2582 | for (i = regno; i < endregno; i++) | |
30f72379 | 2583 | if (REG_IN_TABLE (i) != REG_TICK (i)) |
7afe21cc RK |
2584 | return 0; |
2585 | ||
2586 | return 1; | |
2587 | } | |
2588 | ||
2589 | /* For commutative operations, check both orders. */ | |
2590 | case PLUS: | |
2591 | case MULT: | |
2592 | case AND: | |
2593 | case IOR: | |
2594 | case XOR: | |
2595 | case NE: | |
2596 | case EQ: | |
2597 | return ((exp_equiv_p (XEXP (x, 0), XEXP (y, 0), validate, equal_values) | |
2598 | && exp_equiv_p (XEXP (x, 1), XEXP (y, 1), | |
2599 | validate, equal_values)) | |
2600 | || (exp_equiv_p (XEXP (x, 0), XEXP (y, 1), | |
2601 | validate, equal_values) | |
2602 | && exp_equiv_p (XEXP (x, 1), XEXP (y, 0), | |
2603 | validate, equal_values))); | |
278a83b2 | 2604 | |
6462bb43 AO |
2605 | case ASM_OPERANDS: |
2606 | /* We don't use the generic code below because we want to | |
2607 | disregard filename and line numbers. */ | |
2608 | ||
2609 | /* A volatile asm isn't equivalent to any other. */ | |
2610 | if (MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y)) | |
2611 | return 0; | |
2612 | ||
2613 | if (GET_MODE (x) != GET_MODE (y) | |
2614 | || strcmp (ASM_OPERANDS_TEMPLATE (x), ASM_OPERANDS_TEMPLATE (y)) | |
2615 | || strcmp (ASM_OPERANDS_OUTPUT_CONSTRAINT (x), | |
2616 | ASM_OPERANDS_OUTPUT_CONSTRAINT (y)) | |
2617 | || ASM_OPERANDS_OUTPUT_IDX (x) != ASM_OPERANDS_OUTPUT_IDX (y) | |
2618 | || ASM_OPERANDS_INPUT_LENGTH (x) != ASM_OPERANDS_INPUT_LENGTH (y)) | |
2619 | return 0; | |
2620 | ||
2621 | if (ASM_OPERANDS_INPUT_LENGTH (x)) | |
2622 | { | |
2623 | for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--) | |
2624 | if (! exp_equiv_p (ASM_OPERANDS_INPUT (x, i), | |
2625 | ASM_OPERANDS_INPUT (y, i), | |
2626 | validate, equal_values) | |
2627 | || strcmp (ASM_OPERANDS_INPUT_CONSTRAINT (x, i), | |
2628 | ASM_OPERANDS_INPUT_CONSTRAINT (y, i))) | |
2629 | return 0; | |
2630 | } | |
2631 | ||
2632 | return 1; | |
2633 | ||
e9a25f70 JL |
2634 | default: |
2635 | break; | |
7afe21cc RK |
2636 | } |
2637 | ||
2638 | /* Compare the elements. If any pair of corresponding elements | |
2639 | fail to match, return 0 for the whole things. */ | |
2640 | ||
2641 | fmt = GET_RTX_FORMAT (code); | |
2642 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
2643 | { | |
906c4e36 | 2644 | switch (fmt[i]) |
7afe21cc | 2645 | { |
906c4e36 | 2646 | case 'e': |
7afe21cc RK |
2647 | if (! exp_equiv_p (XEXP (x, i), XEXP (y, i), validate, equal_values)) |
2648 | return 0; | |
906c4e36 RK |
2649 | break; |
2650 | ||
2651 | case 'E': | |
7afe21cc RK |
2652 | if (XVECLEN (x, i) != XVECLEN (y, i)) |
2653 | return 0; | |
2654 | for (j = 0; j < XVECLEN (x, i); j++) | |
2655 | if (! exp_equiv_p (XVECEXP (x, i, j), XVECEXP (y, i, j), | |
2656 | validate, equal_values)) | |
2657 | return 0; | |
906c4e36 RK |
2658 | break; |
2659 | ||
2660 | case 's': | |
7afe21cc RK |
2661 | if (strcmp (XSTR (x, i), XSTR (y, i))) |
2662 | return 0; | |
906c4e36 RK |
2663 | break; |
2664 | ||
2665 | case 'i': | |
7afe21cc RK |
2666 | if (XINT (x, i) != XINT (y, i)) |
2667 | return 0; | |
906c4e36 RK |
2668 | break; |
2669 | ||
2670 | case 'w': | |
2671 | if (XWINT (x, i) != XWINT (y, i)) | |
2672 | return 0; | |
278a83b2 | 2673 | break; |
906c4e36 RK |
2674 | |
2675 | case '0': | |
8f985ec4 | 2676 | case 't': |
906c4e36 RK |
2677 | break; |
2678 | ||
2679 | default: | |
2680 | abort (); | |
7afe21cc | 2681 | } |
278a83b2 | 2682 | } |
906c4e36 | 2683 | |
7afe21cc RK |
2684 | return 1; |
2685 | } | |
2686 | \f | |
9ae8ffe7 JL |
2687 | /* Return 1 if X has a value that can vary even between two |
2688 | executions of the program. 0 means X can be compared reliably | |
2689 | against certain constants or near-constants. */ | |
7afe21cc RK |
2690 | |
2691 | static int | |
9ae8ffe7 JL |
2692 | cse_rtx_varies_p (x) |
2693 | register rtx x; | |
7afe21cc RK |
2694 | { |
2695 | /* We need not check for X and the equivalence class being of the same | |
2696 | mode because if X is equivalent to a constant in some mode, it | |
2697 | doesn't vary in any mode. */ | |
2698 | ||
9ae8ffe7 | 2699 | if (GET_CODE (x) == REG |
1bb98cec DM |
2700 | && REGNO_QTY_VALID_P (REGNO (x))) |
2701 | { | |
2702 | int x_q = REG_QTY (REGNO (x)); | |
2703 | struct qty_table_elem *x_ent = &qty_table[x_q]; | |
2704 | ||
2705 | if (GET_MODE (x) == x_ent->mode | |
2706 | && x_ent->const_rtx != NULL_RTX) | |
2707 | return 0; | |
2708 | } | |
7afe21cc | 2709 | |
9ae8ffe7 JL |
2710 | if (GET_CODE (x) == PLUS |
2711 | && GET_CODE (XEXP (x, 1)) == CONST_INT | |
2712 | && GET_CODE (XEXP (x, 0)) == REG | |
1bb98cec DM |
2713 | && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0)))) |
2714 | { | |
2715 | int x0_q = REG_QTY (REGNO (XEXP (x, 0))); | |
2716 | struct qty_table_elem *x0_ent = &qty_table[x0_q]; | |
2717 | ||
2718 | if ((GET_MODE (XEXP (x, 0)) == x0_ent->mode) | |
2719 | && x0_ent->const_rtx != NULL_RTX) | |
2720 | return 0; | |
2721 | } | |
7afe21cc | 2722 | |
9c6b0bae RK |
2723 | /* This can happen as the result of virtual register instantiation, if |
2724 | the initial constant is too large to be a valid address. This gives | |
2725 | us a three instruction sequence, load large offset into a register, | |
2726 | load fp minus a constant into a register, then a MEM which is the | |
2727 | sum of the two `constant' registers. */ | |
9ae8ffe7 JL |
2728 | if (GET_CODE (x) == PLUS |
2729 | && GET_CODE (XEXP (x, 0)) == REG | |
2730 | && GET_CODE (XEXP (x, 1)) == REG | |
2731 | && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))) | |
1bb98cec DM |
2732 | && REGNO_QTY_VALID_P (REGNO (XEXP (x, 1)))) |
2733 | { | |
2734 | int x0_q = REG_QTY (REGNO (XEXP (x, 0))); | |
2735 | int x1_q = REG_QTY (REGNO (XEXP (x, 1))); | |
2736 | struct qty_table_elem *x0_ent = &qty_table[x0_q]; | |
2737 | struct qty_table_elem *x1_ent = &qty_table[x1_q]; | |
2738 | ||
2739 | if ((GET_MODE (XEXP (x, 0)) == x0_ent->mode) | |
2740 | && x0_ent->const_rtx != NULL_RTX | |
2741 | && (GET_MODE (XEXP (x, 1)) == x1_ent->mode) | |
2742 | && x1_ent->const_rtx != NULL_RTX) | |
2743 | return 0; | |
2744 | } | |
9c6b0bae | 2745 | |
9ae8ffe7 | 2746 | return rtx_varies_p (x); |
7afe21cc RK |
2747 | } |
2748 | \f | |
2749 | /* Canonicalize an expression: | |
2750 | replace each register reference inside it | |
2751 | with the "oldest" equivalent register. | |
2752 | ||
2753 | If INSN is non-zero and we are replacing a pseudo with a hard register | |
7722328e RK |
2754 | or vice versa, validate_change is used to ensure that INSN remains valid |
2755 | after we make our substitution. The calls are made with IN_GROUP non-zero | |
2756 | so apply_change_group must be called upon the outermost return from this | |
2757 | function (unless INSN is zero). The result of apply_change_group can | |
2758 | generally be discarded since the changes we are making are optional. */ | |
7afe21cc RK |
2759 | |
2760 | static rtx | |
2761 | canon_reg (x, insn) | |
2762 | rtx x; | |
2763 | rtx insn; | |
2764 | { | |
2765 | register int i; | |
2766 | register enum rtx_code code; | |
6f7d635c | 2767 | register const char *fmt; |
7afe21cc RK |
2768 | |
2769 | if (x == 0) | |
2770 | return x; | |
2771 | ||
2772 | code = GET_CODE (x); | |
2773 | switch (code) | |
2774 | { | |
2775 | case PC: | |
2776 | case CC0: | |
2777 | case CONST: | |
2778 | case CONST_INT: | |
2779 | case CONST_DOUBLE: | |
2780 | case SYMBOL_REF: | |
2781 | case LABEL_REF: | |
2782 | case ADDR_VEC: | |
2783 | case ADDR_DIFF_VEC: | |
2784 | return x; | |
2785 | ||
2786 | case REG: | |
2787 | { | |
2788 | register int first; | |
1bb98cec DM |
2789 | register int q; |
2790 | register struct qty_table_elem *ent; | |
7afe21cc RK |
2791 | |
2792 | /* Never replace a hard reg, because hard regs can appear | |
2793 | in more than one machine mode, and we must preserve the mode | |
2794 | of each occurrence. Also, some hard regs appear in | |
2795 | MEMs that are shared and mustn't be altered. Don't try to | |
2796 | replace any reg that maps to a reg of class NO_REGS. */ | |
2797 | if (REGNO (x) < FIRST_PSEUDO_REGISTER | |
2798 | || ! REGNO_QTY_VALID_P (REGNO (x))) | |
2799 | return x; | |
2800 | ||
278a83b2 | 2801 | q = REG_QTY (REGNO (x)); |
1bb98cec DM |
2802 | ent = &qty_table[q]; |
2803 | first = ent->first_reg; | |
7afe21cc RK |
2804 | return (first >= FIRST_PSEUDO_REGISTER ? regno_reg_rtx[first] |
2805 | : REGNO_REG_CLASS (first) == NO_REGS ? x | |
1bb98cec | 2806 | : gen_rtx_REG (ent->mode, first)); |
7afe21cc | 2807 | } |
278a83b2 | 2808 | |
e9a25f70 JL |
2809 | default: |
2810 | break; | |
7afe21cc RK |
2811 | } |
2812 | ||
2813 | fmt = GET_RTX_FORMAT (code); | |
2814 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
2815 | { | |
2816 | register int j; | |
2817 | ||
2818 | if (fmt[i] == 'e') | |
2819 | { | |
2820 | rtx new = canon_reg (XEXP (x, i), insn); | |
58873255 | 2821 | int insn_code; |
7afe21cc RK |
2822 | |
2823 | /* If replacing pseudo with hard reg or vice versa, ensure the | |
178c39f6 | 2824 | insn remains valid. Likewise if the insn has MATCH_DUPs. */ |
aee9dc31 RS |
2825 | if (insn != 0 && new != 0 |
2826 | && GET_CODE (new) == REG && GET_CODE (XEXP (x, i)) == REG | |
178c39f6 RK |
2827 | && (((REGNO (new) < FIRST_PSEUDO_REGISTER) |
2828 | != (REGNO (XEXP (x, i)) < FIRST_PSEUDO_REGISTER)) | |
58873255 | 2829 | || (insn_code = recog_memoized (insn)) < 0 |
a995e389 | 2830 | || insn_data[insn_code].n_dups > 0)) |
77fa0940 | 2831 | validate_change (insn, &XEXP (x, i), new, 1); |
7afe21cc RK |
2832 | else |
2833 | XEXP (x, i) = new; | |
2834 | } | |
2835 | else if (fmt[i] == 'E') | |
2836 | for (j = 0; j < XVECLEN (x, i); j++) | |
2837 | XVECEXP (x, i, j) = canon_reg (XVECEXP (x, i, j), insn); | |
2838 | } | |
2839 | ||
2840 | return x; | |
2841 | } | |
2842 | \f | |
a2cabb29 | 2843 | /* LOC is a location within INSN that is an operand address (the contents of |
7afe21cc RK |
2844 | a MEM). Find the best equivalent address to use that is valid for this |
2845 | insn. | |
2846 | ||
2847 | On most CISC machines, complicated address modes are costly, and rtx_cost | |
2848 | is a good approximation for that cost. However, most RISC machines have | |
2849 | only a few (usually only one) memory reference formats. If an address is | |
2850 | valid at all, it is often just as cheap as any other address. Hence, for | |
2851 | RISC machines, we use the configuration macro `ADDRESS_COST' to compare the | |
2852 | costs of various addresses. For two addresses of equal cost, choose the one | |
2853 | with the highest `rtx_cost' value as that has the potential of eliminating | |
2854 | the most insns. For equal costs, we choose the first in the equivalence | |
2855 | class. Note that we ignore the fact that pseudo registers are cheaper | |
2856 | than hard registers here because we would also prefer the pseudo registers. | |
2857 | */ | |
2858 | ||
6cd4575e | 2859 | static void |
01329426 | 2860 | find_best_addr (insn, loc, mode) |
7afe21cc RK |
2861 | rtx insn; |
2862 | rtx *loc; | |
01329426 | 2863 | enum machine_mode mode; |
7afe21cc | 2864 | { |
7a87758d | 2865 | struct table_elt *elt; |
7afe21cc | 2866 | rtx addr = *loc; |
7a87758d AS |
2867 | #ifdef ADDRESS_COST |
2868 | struct table_elt *p; | |
7afe21cc | 2869 | int found_better = 1; |
7a87758d | 2870 | #endif |
7afe21cc RK |
2871 | int save_do_not_record = do_not_record; |
2872 | int save_hash_arg_in_memory = hash_arg_in_memory; | |
7afe21cc RK |
2873 | int addr_volatile; |
2874 | int regno; | |
2197a88a | 2875 | unsigned hash; |
7afe21cc RK |
2876 | |
2877 | /* Do not try to replace constant addresses or addresses of local and | |
2878 | argument slots. These MEM expressions are made only once and inserted | |
2879 | in many instructions, as well as being used to control symbol table | |
2880 | output. It is not safe to clobber them. | |
2881 | ||
2882 | There are some uncommon cases where the address is already in a register | |
2883 | for some reason, but we cannot take advantage of that because we have | |
2884 | no easy way to unshare the MEM. In addition, looking up all stack | |
2885 | addresses is costly. */ | |
2886 | if ((GET_CODE (addr) == PLUS | |
2887 | && GET_CODE (XEXP (addr, 0)) == REG | |
2888 | && GET_CODE (XEXP (addr, 1)) == CONST_INT | |
2889 | && (regno = REGNO (XEXP (addr, 0)), | |
8bc169f2 DE |
2890 | regno == FRAME_POINTER_REGNUM || regno == HARD_FRAME_POINTER_REGNUM |
2891 | || regno == ARG_POINTER_REGNUM)) | |
7afe21cc | 2892 | || (GET_CODE (addr) == REG |
8bc169f2 DE |
2893 | && (regno = REGNO (addr), regno == FRAME_POINTER_REGNUM |
2894 | || regno == HARD_FRAME_POINTER_REGNUM | |
2895 | || regno == ARG_POINTER_REGNUM)) | |
e9a25f70 | 2896 | || GET_CODE (addr) == ADDRESSOF |
7afe21cc RK |
2897 | || CONSTANT_ADDRESS_P (addr)) |
2898 | return; | |
2899 | ||
2900 | /* If this address is not simply a register, try to fold it. This will | |
2901 | sometimes simplify the expression. Many simplifications | |
2902 | will not be valid, but some, usually applying the associative rule, will | |
2903 | be valid and produce better code. */ | |
8c87f107 RK |
2904 | if (GET_CODE (addr) != REG) |
2905 | { | |
2906 | rtx folded = fold_rtx (copy_rtx (addr), NULL_RTX); | |
630c79be BS |
2907 | int addr_folded_cost = address_cost (folded, mode); |
2908 | int addr_cost = address_cost (addr, mode); | |
2909 | ||
2910 | if ((addr_folded_cost < addr_cost | |
2911 | || (addr_folded_cost == addr_cost | |
2912 | /* ??? The rtx_cost comparison is left over from an older | |
2913 | version of this code. It is probably no longer helpful. */ | |
2914 | && (rtx_cost (folded, MEM) > rtx_cost (addr, MEM) | |
2915 | || approx_reg_cost (folded) < approx_reg_cost (addr)))) | |
8c87f107 RK |
2916 | && validate_change (insn, loc, folded, 0)) |
2917 | addr = folded; | |
2918 | } | |
278a83b2 | 2919 | |
42495ca0 RK |
2920 | /* If this address is not in the hash table, we can't look for equivalences |
2921 | of the whole address. Also, ignore if volatile. */ | |
2922 | ||
7afe21cc | 2923 | do_not_record = 0; |
2197a88a | 2924 | hash = HASH (addr, Pmode); |
7afe21cc RK |
2925 | addr_volatile = do_not_record; |
2926 | do_not_record = save_do_not_record; | |
2927 | hash_arg_in_memory = save_hash_arg_in_memory; | |
7afe21cc RK |
2928 | |
2929 | if (addr_volatile) | |
2930 | return; | |
2931 | ||
2197a88a | 2932 | elt = lookup (addr, hash, Pmode); |
7afe21cc | 2933 | |
7afe21cc | 2934 | #ifndef ADDRESS_COST |
42495ca0 RK |
2935 | if (elt) |
2936 | { | |
2d8b0f3a | 2937 | int our_cost = elt->cost; |
42495ca0 RK |
2938 | |
2939 | /* Find the lowest cost below ours that works. */ | |
2940 | for (elt = elt->first_same_value; elt; elt = elt->next_same_value) | |
2941 | if (elt->cost < our_cost | |
2942 | && (GET_CODE (elt->exp) == REG | |
2943 | || exp_equiv_p (elt->exp, elt->exp, 1, 0)) | |
2944 | && validate_change (insn, loc, | |
906c4e36 | 2945 | canon_reg (copy_rtx (elt->exp), NULL_RTX), 0)) |
42495ca0 RK |
2946 | return; |
2947 | } | |
2948 | #else | |
7afe21cc | 2949 | |
42495ca0 RK |
2950 | if (elt) |
2951 | { | |
2952 | /* We need to find the best (under the criteria documented above) entry | |
2953 | in the class that is valid. We use the `flag' field to indicate | |
2954 | choices that were invalid and iterate until we can't find a better | |
2955 | one that hasn't already been tried. */ | |
7afe21cc | 2956 | |
42495ca0 RK |
2957 | for (p = elt->first_same_value; p; p = p->next_same_value) |
2958 | p->flag = 0; | |
7afe21cc | 2959 | |
42495ca0 RK |
2960 | while (found_better) |
2961 | { | |
01329426 | 2962 | int best_addr_cost = address_cost (*loc, mode); |
42495ca0 | 2963 | int best_rtx_cost = (elt->cost + 1) >> 1; |
01329426 | 2964 | int exp_cost; |
278a83b2 | 2965 | struct table_elt *best_elt = elt; |
42495ca0 RK |
2966 | |
2967 | found_better = 0; | |
2968 | for (p = elt->first_same_value; p; p = p->next_same_value) | |
2f541799 | 2969 | if (! p->flag) |
42495ca0 | 2970 | { |
2f541799 MM |
2971 | if ((GET_CODE (p->exp) == REG |
2972 | || exp_equiv_p (p->exp, p->exp, 1, 0)) | |
01329426 JH |
2973 | && ((exp_cost = address_cost (p->exp, mode)) < best_addr_cost |
2974 | || (exp_cost == best_addr_cost | |
2975 | && (p->cost + 1) >> 1 < best_rtx_cost))) | |
2f541799 MM |
2976 | { |
2977 | found_better = 1; | |
01329426 | 2978 | best_addr_cost = exp_cost; |
2f541799 MM |
2979 | best_rtx_cost = (p->cost + 1) >> 1; |
2980 | best_elt = p; | |
2981 | } | |
42495ca0 | 2982 | } |
7afe21cc | 2983 | |
42495ca0 RK |
2984 | if (found_better) |
2985 | { | |
2986 | if (validate_change (insn, loc, | |
906c4e36 RK |
2987 | canon_reg (copy_rtx (best_elt->exp), |
2988 | NULL_RTX), 0)) | |
42495ca0 RK |
2989 | return; |
2990 | else | |
2991 | best_elt->flag = 1; | |
2992 | } | |
2993 | } | |
2994 | } | |
7afe21cc | 2995 | |
42495ca0 RK |
2996 | /* If the address is a binary operation with the first operand a register |
2997 | and the second a constant, do the same as above, but looking for | |
2998 | equivalences of the register. Then try to simplify before checking for | |
2999 | the best address to use. This catches a few cases: First is when we | |
3000 | have REG+const and the register is another REG+const. We can often merge | |
3001 | the constants and eliminate one insn and one register. It may also be | |
3002 | that a machine has a cheap REG+REG+const. Finally, this improves the | |
3003 | code on the Alpha for unaligned byte stores. */ | |
3004 | ||
3005 | if (flag_expensive_optimizations | |
3006 | && (GET_RTX_CLASS (GET_CODE (*loc)) == '2' | |
3007 | || GET_RTX_CLASS (GET_CODE (*loc)) == 'c') | |
3008 | && GET_CODE (XEXP (*loc, 0)) == REG | |
3009 | && GET_CODE (XEXP (*loc, 1)) == CONST_INT) | |
7afe21cc | 3010 | { |
42495ca0 RK |
3011 | rtx c = XEXP (*loc, 1); |
3012 | ||
3013 | do_not_record = 0; | |
2197a88a | 3014 | hash = HASH (XEXP (*loc, 0), Pmode); |
42495ca0 RK |
3015 | do_not_record = save_do_not_record; |
3016 | hash_arg_in_memory = save_hash_arg_in_memory; | |
42495ca0 | 3017 | |
2197a88a | 3018 | elt = lookup (XEXP (*loc, 0), hash, Pmode); |
42495ca0 RK |
3019 | if (elt == 0) |
3020 | return; | |
3021 | ||
3022 | /* We need to find the best (under the criteria documented above) entry | |
3023 | in the class that is valid. We use the `flag' field to indicate | |
3024 | choices that were invalid and iterate until we can't find a better | |
3025 | one that hasn't already been tried. */ | |
7afe21cc | 3026 | |
7afe21cc | 3027 | for (p = elt->first_same_value; p; p = p->next_same_value) |
42495ca0 | 3028 | p->flag = 0; |
7afe21cc | 3029 | |
42495ca0 | 3030 | while (found_better) |
7afe21cc | 3031 | { |
01329426 | 3032 | int best_addr_cost = address_cost (*loc, mode); |
42495ca0 | 3033 | int best_rtx_cost = (COST (*loc) + 1) >> 1; |
278a83b2 | 3034 | struct table_elt *best_elt = elt; |
42495ca0 | 3035 | rtx best_rtx = *loc; |
f6516aee JW |
3036 | int count; |
3037 | ||
3038 | /* This is at worst case an O(n^2) algorithm, so limit our search | |
3039 | to the first 32 elements on the list. This avoids trouble | |
3040 | compiling code with very long basic blocks that can easily | |
0cedb36c JL |
3041 | call simplify_gen_binary so many times that we run out of |
3042 | memory. */ | |
96b0e481 | 3043 | |
0cedb36c JL |
3044 | found_better = 0; |
3045 | for (p = elt->first_same_value, count = 0; | |
3046 | p && count < 32; | |
3047 | p = p->next_same_value, count++) | |
3048 | if (! p->flag | |
3049 | && (GET_CODE (p->exp) == REG | |
3050 | || exp_equiv_p (p->exp, p->exp, 1, 0))) | |
3051 | { | |
3052 | rtx new = simplify_gen_binary (GET_CODE (*loc), Pmode, | |
3053 | p->exp, c); | |
01329426 JH |
3054 | int new_cost; |
3055 | new_cost = address_cost (new, mode); | |
96b0e481 | 3056 | |
01329426 JH |
3057 | if (new_cost < best_addr_cost |
3058 | || (new_cost == best_addr_cost | |
3059 | && (COST (new) + 1) >> 1 > best_rtx_cost)) | |
0cedb36c JL |
3060 | { |
3061 | found_better = 1; | |
01329426 | 3062 | best_addr_cost = new_cost; |
0cedb36c JL |
3063 | best_rtx_cost = (COST (new) + 1) >> 1; |
3064 | best_elt = p; | |
3065 | best_rtx = new; | |
3066 | } | |
3067 | } | |
96b0e481 | 3068 | |
0cedb36c JL |
3069 | if (found_better) |
3070 | { | |
3071 | if (validate_change (insn, loc, | |
3072 | canon_reg (copy_rtx (best_rtx), | |
3073 | NULL_RTX), 0)) | |
3074 | return; | |
3075 | else | |
3076 | best_elt->flag = 1; | |
3077 | } | |
3078 | } | |
3079 | } | |
3080 | #endif | |
96b0e481 RK |
3081 | } |
3082 | \f | |
0cedb36c JL |
3083 | /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison |
3084 | operation (EQ, NE, GT, etc.), follow it back through the hash table and | |
3085 | what values are being compared. | |
1a87eea2 | 3086 | |
0cedb36c JL |
3087 | *PARG1 and *PARG2 are updated to contain the rtx representing the values |
3088 | actually being compared. For example, if *PARG1 was (cc0) and *PARG2 | |
3089 | was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were | |
3090 | compared to produce cc0. | |
a432f20d | 3091 | |
0cedb36c JL |
3092 | The return value is the comparison operator and is either the code of |
3093 | A or the code corresponding to the inverse of the comparison. */ | |
7afe21cc | 3094 | |
0cedb36c JL |
3095 | static enum rtx_code |
3096 | find_comparison_args (code, parg1, parg2, pmode1, pmode2) | |
7afe21cc | 3097 | enum rtx_code code; |
0cedb36c JL |
3098 | rtx *parg1, *parg2; |
3099 | enum machine_mode *pmode1, *pmode2; | |
7afe21cc | 3100 | { |
0cedb36c | 3101 | rtx arg1, arg2; |
1a87eea2 | 3102 | |
0cedb36c | 3103 | arg1 = *parg1, arg2 = *parg2; |
7afe21cc | 3104 | |
0cedb36c | 3105 | /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */ |
7afe21cc | 3106 | |
0cedb36c | 3107 | while (arg2 == CONST0_RTX (GET_MODE (arg1))) |
a432f20d | 3108 | { |
0cedb36c JL |
3109 | /* Set non-zero when we find something of interest. */ |
3110 | rtx x = 0; | |
3111 | int reverse_code = 0; | |
3112 | struct table_elt *p = 0; | |
6076248a | 3113 | |
0cedb36c JL |
3114 | /* If arg1 is a COMPARE, extract the comparison arguments from it. |
3115 | On machines with CC0, this is the only case that can occur, since | |
3116 | fold_rtx will return the COMPARE or item being compared with zero | |
3117 | when given CC0. */ | |
6076248a | 3118 | |
0cedb36c JL |
3119 | if (GET_CODE (arg1) == COMPARE && arg2 == const0_rtx) |
3120 | x = arg1; | |
6076248a | 3121 | |
0cedb36c JL |
3122 | /* If ARG1 is a comparison operator and CODE is testing for |
3123 | STORE_FLAG_VALUE, get the inner arguments. */ | |
a432f20d | 3124 | |
0cedb36c | 3125 | else if (GET_RTX_CLASS (GET_CODE (arg1)) == '<') |
7afe21cc | 3126 | { |
0cedb36c JL |
3127 | if (code == NE |
3128 | || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT | |
3129 | && code == LT && STORE_FLAG_VALUE == -1) | |
3130 | #ifdef FLOAT_STORE_FLAG_VALUE | |
3131 | || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT | |
12530dbe RH |
3132 | && (REAL_VALUE_NEGATIVE |
3133 | (FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1))))) | |
7afe21cc | 3134 | #endif |
a432f20d | 3135 | ) |
0cedb36c JL |
3136 | x = arg1; |
3137 | else if (code == EQ | |
3138 | || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT | |
3139 | && code == GE && STORE_FLAG_VALUE == -1) | |
3140 | #ifdef FLOAT_STORE_FLAG_VALUE | |
3141 | || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT | |
12530dbe RH |
3142 | && (REAL_VALUE_NEGATIVE |
3143 | (FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1))))) | |
0cedb36c JL |
3144 | #endif |
3145 | ) | |
3146 | x = arg1, reverse_code = 1; | |
7afe21cc RK |
3147 | } |
3148 | ||
0cedb36c | 3149 | /* ??? We could also check for |
7afe21cc | 3150 | |
0cedb36c | 3151 | (ne (and (eq (...) (const_int 1))) (const_int 0)) |
7afe21cc | 3152 | |
0cedb36c | 3153 | and related forms, but let's wait until we see them occurring. */ |
7afe21cc | 3154 | |
0cedb36c JL |
3155 | if (x == 0) |
3156 | /* Look up ARG1 in the hash table and see if it has an equivalence | |
3157 | that lets us see what is being compared. */ | |
9b1549b8 | 3158 | p = lookup (arg1, safe_hash (arg1, GET_MODE (arg1)) & HASH_MASK, |
0cedb36c | 3159 | GET_MODE (arg1)); |
278a83b2 KH |
3160 | if (p) |
3161 | p = p->first_same_value; | |
7afe21cc | 3162 | |
0cedb36c | 3163 | for (; p; p = p->next_same_value) |
7afe21cc | 3164 | { |
0cedb36c | 3165 | enum machine_mode inner_mode = GET_MODE (p->exp); |
7afe21cc | 3166 | |
0cedb36c JL |
3167 | /* If the entry isn't valid, skip it. */ |
3168 | if (! exp_equiv_p (p->exp, p->exp, 1, 0)) | |
3169 | continue; | |
f76b9db2 | 3170 | |
0cedb36c JL |
3171 | if (GET_CODE (p->exp) == COMPARE |
3172 | /* Another possibility is that this machine has a compare insn | |
3173 | that includes the comparison code. In that case, ARG1 would | |
3174 | be equivalent to a comparison operation that would set ARG1 to | |
3175 | either STORE_FLAG_VALUE or zero. If this is an NE operation, | |
3176 | ORIG_CODE is the actual comparison being done; if it is an EQ, | |
3177 | we must reverse ORIG_CODE. On machine with a negative value | |
3178 | for STORE_FLAG_VALUE, also look at LT and GE operations. */ | |
3179 | || ((code == NE | |
3180 | || (code == LT | |
3181 | && GET_MODE_CLASS (inner_mode) == MODE_INT | |
3182 | && (GET_MODE_BITSIZE (inner_mode) | |
3183 | <= HOST_BITS_PER_WIDE_INT) | |
3184 | && (STORE_FLAG_VALUE | |
3185 | & ((HOST_WIDE_INT) 1 | |
3186 | << (GET_MODE_BITSIZE (inner_mode) - 1)))) | |
3187 | #ifdef FLOAT_STORE_FLAG_VALUE | |
3188 | || (code == LT | |
3189 | && GET_MODE_CLASS (inner_mode) == MODE_FLOAT | |
12530dbe RH |
3190 | && (REAL_VALUE_NEGATIVE |
3191 | (FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1))))) | |
0cedb36c JL |
3192 | #endif |
3193 | ) | |
3194 | && GET_RTX_CLASS (GET_CODE (p->exp)) == '<')) | |
7afe21cc | 3195 | { |
0cedb36c JL |
3196 | x = p->exp; |
3197 | break; | |
3198 | } | |
3199 | else if ((code == EQ | |
3200 | || (code == GE | |
3201 | && GET_MODE_CLASS (inner_mode) == MODE_INT | |
3202 | && (GET_MODE_BITSIZE (inner_mode) | |
3203 | <= HOST_BITS_PER_WIDE_INT) | |
3204 | && (STORE_FLAG_VALUE | |
3205 | & ((HOST_WIDE_INT) 1 | |
3206 | << (GET_MODE_BITSIZE (inner_mode) - 1)))) | |
3207 | #ifdef FLOAT_STORE_FLAG_VALUE | |
3208 | || (code == GE | |
3209 | && GET_MODE_CLASS (inner_mode) == MODE_FLOAT | |
12530dbe RH |
3210 | && (REAL_VALUE_NEGATIVE |
3211 | (FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1))))) | |
0cedb36c JL |
3212 | #endif |
3213 | ) | |
3214 | && GET_RTX_CLASS (GET_CODE (p->exp)) == '<') | |
3215 | { | |
3216 | reverse_code = 1; | |
3217 | x = p->exp; | |
3218 | break; | |
7afe21cc RK |
3219 | } |
3220 | ||
0cedb36c JL |
3221 | /* If this is fp + constant, the equivalent is a better operand since |
3222 | it may let us predict the value of the comparison. */ | |
3223 | else if (NONZERO_BASE_PLUS_P (p->exp)) | |
3224 | { | |
3225 | arg1 = p->exp; | |
3226 | continue; | |
3227 | } | |
7afe21cc | 3228 | } |
7afe21cc | 3229 | |
0cedb36c JL |
3230 | /* If we didn't find a useful equivalence for ARG1, we are done. |
3231 | Otherwise, set up for the next iteration. */ | |
3232 | if (x == 0) | |
3233 | break; | |
7afe21cc | 3234 | |
278a83b2 | 3235 | arg1 = XEXP (x, 0), arg2 = XEXP (x, 1); |
0cedb36c JL |
3236 | if (GET_RTX_CLASS (GET_CODE (x)) == '<') |
3237 | code = GET_CODE (x); | |
3238 | ||
3239 | if (reverse_code) | |
3240 | code = reverse_condition (code); | |
7afe21cc RK |
3241 | } |
3242 | ||
0cedb36c JL |
3243 | /* Return our results. Return the modes from before fold_rtx |
3244 | because fold_rtx might produce const_int, and then it's too late. */ | |
3245 | *pmode1 = GET_MODE (arg1), *pmode2 = GET_MODE (arg2); | |
3246 | *parg1 = fold_rtx (arg1, 0), *parg2 = fold_rtx (arg2, 0); | |
3247 | ||
3248 | return code; | |
7afe21cc RK |
3249 | } |
3250 | \f | |
3251 | /* If X is a nontrivial arithmetic operation on an argument | |
3252 | for which a constant value can be determined, return | |
3253 | the result of operating on that value, as a constant. | |
3254 | Otherwise, return X, possibly with one or more operands | |
3255 | modified by recursive calls to this function. | |
3256 | ||
e7bb59fa RK |
3257 | If X is a register whose contents are known, we do NOT |
3258 | return those contents here. equiv_constant is called to | |
3259 | perform that task. | |
7afe21cc RK |
3260 | |
3261 | INSN is the insn that we may be modifying. If it is 0, make a copy | |
3262 | of X before modifying it. */ | |
3263 | ||
3264 | static rtx | |
3265 | fold_rtx (x, insn) | |
3266 | rtx x; | |
278a83b2 | 3267 | rtx insn; |
7afe21cc RK |
3268 | { |
3269 | register enum rtx_code code; | |
3270 | register enum machine_mode mode; | |
6f7d635c | 3271 | register const char *fmt; |
906c4e36 | 3272 | register int i; |
7afe21cc RK |
3273 | rtx new = 0; |
3274 | int copied = 0; | |
3275 | int must_swap = 0; | |
3276 | ||
3277 | /* Folded equivalents of first two operands of X. */ | |
3278 | rtx folded_arg0; | |
3279 | rtx folded_arg1; | |
3280 | ||
3281 | /* Constant equivalents of first three operands of X; | |
3282 | 0 when no such equivalent is known. */ | |
3283 | rtx const_arg0; | |
3284 | rtx const_arg1; | |
3285 | rtx const_arg2; | |
3286 | ||
3287 | /* The mode of the first operand of X. We need this for sign and zero | |
3288 | extends. */ | |
3289 | enum machine_mode mode_arg0; | |
3290 | ||
3291 | if (x == 0) | |
3292 | return x; | |
3293 | ||
3294 | mode = GET_MODE (x); | |
3295 | code = GET_CODE (x); | |
3296 | switch (code) | |
3297 | { | |
3298 | case CONST: | |
3299 | case CONST_INT: | |
3300 | case CONST_DOUBLE: | |
3301 | case SYMBOL_REF: | |
3302 | case LABEL_REF: | |
3303 | case REG: | |
3304 | /* No use simplifying an EXPR_LIST | |
3305 | since they are used only for lists of args | |
3306 | in a function call's REG_EQUAL note. */ | |
3307 | case EXPR_LIST: | |
956d6950 JL |
3308 | /* Changing anything inside an ADDRESSOF is incorrect; we don't |
3309 | want to (e.g.,) make (addressof (const_int 0)) just because | |
3310 | the location is known to be zero. */ | |
3311 | case ADDRESSOF: | |
7afe21cc RK |
3312 | return x; |
3313 | ||
3314 | #ifdef HAVE_cc0 | |
3315 | case CC0: | |
3316 | return prev_insn_cc0; | |
3317 | #endif | |
3318 | ||
3319 | case PC: | |
3320 | /* If the next insn is a CODE_LABEL followed by a jump table, | |
3321 | PC's value is a LABEL_REF pointing to that label. That | |
3322 | lets us fold switch statements on the Vax. */ | |
3323 | if (insn && GET_CODE (insn) == JUMP_INSN) | |
3324 | { | |
3325 | rtx next = next_nonnote_insn (insn); | |
3326 | ||
3327 | if (next && GET_CODE (next) == CODE_LABEL | |
3328 | && NEXT_INSN (next) != 0 | |
3329 | && GET_CODE (NEXT_INSN (next)) == JUMP_INSN | |
3330 | && (GET_CODE (PATTERN (NEXT_INSN (next))) == ADDR_VEC | |
3331 | || GET_CODE (PATTERN (NEXT_INSN (next))) == ADDR_DIFF_VEC)) | |
38a448ca | 3332 | return gen_rtx_LABEL_REF (Pmode, next); |
7afe21cc RK |
3333 | } |
3334 | break; | |
3335 | ||
3336 | case SUBREG: | |
c610adec RK |
3337 | /* See if we previously assigned a constant value to this SUBREG. */ |
3338 | if ((new = lookup_as_function (x, CONST_INT)) != 0 | |
3339 | || (new = lookup_as_function (x, CONST_DOUBLE)) != 0) | |
7afe21cc RK |
3340 | return new; |
3341 | ||
4b980e20 RK |
3342 | /* If this is a paradoxical SUBREG, we have no idea what value the |
3343 | extra bits would have. However, if the operand is equivalent | |
3344 | to a SUBREG whose operand is the same as our mode, and all the | |
3345 | modes are within a word, we can just use the inner operand | |
31c85c78 RK |
3346 | because these SUBREGs just say how to treat the register. |
3347 | ||
3348 | Similarly if we find an integer constant. */ | |
4b980e20 | 3349 | |
e5f6a288 | 3350 | if (GET_MODE_SIZE (mode) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))) |
4b980e20 RK |
3351 | { |
3352 | enum machine_mode imode = GET_MODE (SUBREG_REG (x)); | |
3353 | struct table_elt *elt; | |
3354 | ||
3355 | if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD | |
3356 | && GET_MODE_SIZE (imode) <= UNITS_PER_WORD | |
3357 | && (elt = lookup (SUBREG_REG (x), HASH (SUBREG_REG (x), imode), | |
3358 | imode)) != 0) | |
ddc356e8 | 3359 | for (elt = elt->first_same_value; elt; elt = elt->next_same_value) |
31c85c78 RK |
3360 | { |
3361 | if (CONSTANT_P (elt->exp) | |
3362 | && GET_MODE (elt->exp) == VOIDmode) | |
3363 | return elt->exp; | |
3364 | ||
4b980e20 RK |
3365 | if (GET_CODE (elt->exp) == SUBREG |
3366 | && GET_MODE (SUBREG_REG (elt->exp)) == mode | |
906c4e36 | 3367 | && exp_equiv_p (elt->exp, elt->exp, 1, 0)) |
4b980e20 | 3368 | return copy_rtx (SUBREG_REG (elt->exp)); |
1bb98cec | 3369 | } |
4b980e20 RK |
3370 | |
3371 | return x; | |
3372 | } | |
e5f6a288 | 3373 | |
7afe21cc RK |
3374 | /* Fold SUBREG_REG. If it changed, see if we can simplify the SUBREG. |
3375 | We might be able to if the SUBREG is extracting a single word in an | |
3376 | integral mode or extracting the low part. */ | |
3377 | ||
3378 | folded_arg0 = fold_rtx (SUBREG_REG (x), insn); | |
3379 | const_arg0 = equiv_constant (folded_arg0); | |
3380 | if (const_arg0) | |
3381 | folded_arg0 = const_arg0; | |
3382 | ||
3383 | if (folded_arg0 != SUBREG_REG (x)) | |
3384 | { | |
3385 | new = 0; | |
3386 | ||
3387 | if (GET_MODE_CLASS (mode) == MODE_INT | |
3388 | && GET_MODE_SIZE (mode) == UNITS_PER_WORD | |
3389 | && GET_MODE (SUBREG_REG (x)) != VOIDmode) | |
3390 | new = operand_subword (folded_arg0, SUBREG_WORD (x), 0, | |
3391 | GET_MODE (SUBREG_REG (x))); | |
3392 | if (new == 0 && subreg_lowpart_p (x)) | |
3393 | new = gen_lowpart_if_possible (mode, folded_arg0); | |
3394 | if (new) | |
3395 | return new; | |
3396 | } | |
e5f6a288 RK |
3397 | |
3398 | /* If this is a narrowing SUBREG and our operand is a REG, see if | |
858a47b1 | 3399 | we can find an equivalence for REG that is an arithmetic operation |
e5f6a288 RK |
3400 | in a wider mode where both operands are paradoxical SUBREGs |
3401 | from objects of our result mode. In that case, we couldn't report | |
3402 | an equivalent value for that operation, since we don't know what the | |
3403 | extra bits will be. But we can find an equivalence for this SUBREG | |
3404 | by folding that operation is the narrow mode. This allows us to | |
3405 | fold arithmetic in narrow modes when the machine only supports | |
278a83b2 | 3406 | word-sized arithmetic. |
4b980e20 RK |
3407 | |
3408 | Also look for a case where we have a SUBREG whose operand is the | |
3409 | same as our result. If both modes are smaller than a word, we | |
3410 | are simply interpreting a register in different modes and we | |
3411 | can use the inner value. */ | |
e5f6a288 RK |
3412 | |
3413 | if (GET_CODE (folded_arg0) == REG | |
e8d76a39 RS |
3414 | && GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (folded_arg0)) |
3415 | && subreg_lowpart_p (x)) | |
e5f6a288 RK |
3416 | { |
3417 | struct table_elt *elt; | |
3418 | ||
3419 | /* We can use HASH here since we know that canon_hash won't be | |
3420 | called. */ | |
3421 | elt = lookup (folded_arg0, | |
3422 | HASH (folded_arg0, GET_MODE (folded_arg0)), | |
3423 | GET_MODE (folded_arg0)); | |
3424 | ||
3425 | if (elt) | |
3426 | elt = elt->first_same_value; | |
3427 | ||
3428 | for (; elt; elt = elt->next_same_value) | |
3429 | { | |
e8d76a39 RS |
3430 | enum rtx_code eltcode = GET_CODE (elt->exp); |
3431 | ||
e5f6a288 RK |
3432 | /* Just check for unary and binary operations. */ |
3433 | if (GET_RTX_CLASS (GET_CODE (elt->exp)) == '1' | |
3434 | && GET_CODE (elt->exp) != SIGN_EXTEND | |
3435 | && GET_CODE (elt->exp) != ZERO_EXTEND | |
3436 | && GET_CODE (XEXP (elt->exp, 0)) == SUBREG | |
3437 | && GET_MODE (SUBREG_REG (XEXP (elt->exp, 0))) == mode) | |
3438 | { | |
3439 | rtx op0 = SUBREG_REG (XEXP (elt->exp, 0)); | |
3440 | ||
3441 | if (GET_CODE (op0) != REG && ! CONSTANT_P (op0)) | |
906c4e36 | 3442 | op0 = fold_rtx (op0, NULL_RTX); |
e5f6a288 RK |
3443 | |
3444 | op0 = equiv_constant (op0); | |
3445 | if (op0) | |
3446 | new = simplify_unary_operation (GET_CODE (elt->exp), mode, | |
3447 | op0, mode); | |
3448 | } | |
3449 | else if ((GET_RTX_CLASS (GET_CODE (elt->exp)) == '2' | |
3450 | || GET_RTX_CLASS (GET_CODE (elt->exp)) == 'c') | |
e8d76a39 RS |
3451 | && eltcode != DIV && eltcode != MOD |
3452 | && eltcode != UDIV && eltcode != UMOD | |
3453 | && eltcode != ASHIFTRT && eltcode != LSHIFTRT | |
3454 | && eltcode != ROTATE && eltcode != ROTATERT | |
e5f6a288 RK |
3455 | && ((GET_CODE (XEXP (elt->exp, 0)) == SUBREG |
3456 | && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 0))) | |
3457 | == mode)) | |
3458 | || CONSTANT_P (XEXP (elt->exp, 0))) | |
3459 | && ((GET_CODE (XEXP (elt->exp, 1)) == SUBREG | |
3460 | && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 1))) | |
3461 | == mode)) | |
3462 | || CONSTANT_P (XEXP (elt->exp, 1)))) | |
3463 | { | |
3464 | rtx op0 = gen_lowpart_common (mode, XEXP (elt->exp, 0)); | |
3465 | rtx op1 = gen_lowpart_common (mode, XEXP (elt->exp, 1)); | |
3466 | ||
3467 | if (op0 && GET_CODE (op0) != REG && ! CONSTANT_P (op0)) | |
906c4e36 | 3468 | op0 = fold_rtx (op0, NULL_RTX); |
e5f6a288 RK |
3469 | |
3470 | if (op0) | |
3471 | op0 = equiv_constant (op0); | |
3472 | ||
3473 | if (op1 && GET_CODE (op1) != REG && ! CONSTANT_P (op1)) | |
906c4e36 | 3474 | op1 = fold_rtx (op1, NULL_RTX); |
e5f6a288 RK |
3475 | |
3476 | if (op1) | |
3477 | op1 = equiv_constant (op1); | |
3478 | ||
278a83b2 | 3479 | /* If we are looking for the low SImode part of |
76fb0b60 RS |
3480 | (ashift:DI c (const_int 32)), it doesn't work |
3481 | to compute that in SImode, because a 32-bit shift | |
3482 | in SImode is unpredictable. We know the value is 0. */ | |
3483 | if (op0 && op1 | |
45620ed4 | 3484 | && GET_CODE (elt->exp) == ASHIFT |
76fb0b60 RS |
3485 | && GET_CODE (op1) == CONST_INT |
3486 | && INTVAL (op1) >= GET_MODE_BITSIZE (mode)) | |
3487 | { | |
3488 | if (INTVAL (op1) < GET_MODE_BITSIZE (GET_MODE (elt->exp))) | |
278a83b2 | 3489 | |
76fb0b60 RS |
3490 | /* If the count fits in the inner mode's width, |
3491 | but exceeds the outer mode's width, | |
3492 | the value will get truncated to 0 | |
3493 | by the subreg. */ | |
3494 | new = const0_rtx; | |
3495 | else | |
3496 | /* If the count exceeds even the inner mode's width, | |
3497 | don't fold this expression. */ | |
3498 | new = 0; | |
3499 | } | |
3500 | else if (op0 && op1) | |
e5f6a288 RK |
3501 | new = simplify_binary_operation (GET_CODE (elt->exp), mode, |
3502 | op0, op1); | |
3503 | } | |
3504 | ||
4b980e20 RK |
3505 | else if (GET_CODE (elt->exp) == SUBREG |
3506 | && GET_MODE (SUBREG_REG (elt->exp)) == mode | |
3507 | && (GET_MODE_SIZE (GET_MODE (folded_arg0)) | |
3508 | <= UNITS_PER_WORD) | |
906c4e36 | 3509 | && exp_equiv_p (elt->exp, elt->exp, 1, 0)) |
4b980e20 RK |
3510 | new = copy_rtx (SUBREG_REG (elt->exp)); |
3511 | ||
e5f6a288 RK |
3512 | if (new) |
3513 | return new; | |
3514 | } | |
3515 | } | |
3516 | ||
7afe21cc RK |
3517 | return x; |
3518 | ||
3519 | case NOT: | |
3520 | case NEG: | |
3521 | /* If we have (NOT Y), see if Y is known to be (NOT Z). | |
3522 | If so, (NOT Y) simplifies to Z. Similarly for NEG. */ | |
3523 | new = lookup_as_function (XEXP (x, 0), code); | |
3524 | if (new) | |
3525 | return fold_rtx (copy_rtx (XEXP (new, 0)), insn); | |
3526 | break; | |
13c9910f | 3527 | |
7afe21cc RK |
3528 | case MEM: |
3529 | /* If we are not actually processing an insn, don't try to find the | |
3530 | best address. Not only don't we care, but we could modify the | |
3531 | MEM in an invalid way since we have no insn to validate against. */ | |
3532 | if (insn != 0) | |
01329426 | 3533 | find_best_addr (insn, &XEXP (x, 0), GET_MODE (x)); |
7afe21cc RK |
3534 | |
3535 | { | |
3536 | /* Even if we don't fold in the insn itself, | |
3537 | we can safely do so here, in hopes of getting a constant. */ | |
906c4e36 | 3538 | rtx addr = fold_rtx (XEXP (x, 0), NULL_RTX); |
7afe21cc | 3539 | rtx base = 0; |
906c4e36 | 3540 | HOST_WIDE_INT offset = 0; |
7afe21cc RK |
3541 | |
3542 | if (GET_CODE (addr) == REG | |
1bb98cec DM |
3543 | && REGNO_QTY_VALID_P (REGNO (addr))) |
3544 | { | |
3545 | int addr_q = REG_QTY (REGNO (addr)); | |
3546 | struct qty_table_elem *addr_ent = &qty_table[addr_q]; | |
3547 | ||
3548 | if (GET_MODE (addr) == addr_ent->mode | |
3549 | && addr_ent->const_rtx != NULL_RTX) | |
3550 | addr = addr_ent->const_rtx; | |
3551 | } | |
7afe21cc RK |
3552 | |
3553 | /* If address is constant, split it into a base and integer offset. */ | |
3554 | if (GET_CODE (addr) == SYMBOL_REF || GET_CODE (addr) == LABEL_REF) | |
3555 | base = addr; | |
3556 | else if (GET_CODE (addr) == CONST && GET_CODE (XEXP (addr, 0)) == PLUS | |
3557 | && GET_CODE (XEXP (XEXP (addr, 0), 1)) == CONST_INT) | |
3558 | { | |
3559 | base = XEXP (XEXP (addr, 0), 0); | |
3560 | offset = INTVAL (XEXP (XEXP (addr, 0), 1)); | |
3561 | } | |
3562 | else if (GET_CODE (addr) == LO_SUM | |
3563 | && GET_CODE (XEXP (addr, 1)) == SYMBOL_REF) | |
3564 | base = XEXP (addr, 1); | |
e9a25f70 | 3565 | else if (GET_CODE (addr) == ADDRESSOF) |
956d6950 | 3566 | return change_address (x, VOIDmode, addr); |
7afe21cc RK |
3567 | |
3568 | /* If this is a constant pool reference, we can fold it into its | |
3569 | constant to allow better value tracking. */ | |
3570 | if (base && GET_CODE (base) == SYMBOL_REF | |
3571 | && CONSTANT_POOL_ADDRESS_P (base)) | |
3572 | { | |
3573 | rtx constant = get_pool_constant (base); | |
3574 | enum machine_mode const_mode = get_pool_mode (base); | |
3575 | rtx new; | |
3576 | ||
3577 | if (CONSTANT_P (constant) && GET_CODE (constant) != CONST_INT) | |
3578 | constant_pool_entries_cost = COST (constant); | |
3579 | ||
3580 | /* If we are loading the full constant, we have an equivalence. */ | |
3581 | if (offset == 0 && mode == const_mode) | |
3582 | return constant; | |
3583 | ||
9faa82d8 | 3584 | /* If this actually isn't a constant (weird!), we can't do |
7afe21cc RK |
3585 | anything. Otherwise, handle the two most common cases: |
3586 | extracting a word from a multi-word constant, and extracting | |
3587 | the low-order bits. Other cases don't seem common enough to | |
3588 | worry about. */ | |
3589 | if (! CONSTANT_P (constant)) | |
3590 | return x; | |
3591 | ||
3592 | if (GET_MODE_CLASS (mode) == MODE_INT | |
3593 | && GET_MODE_SIZE (mode) == UNITS_PER_WORD | |
3594 | && offset % UNITS_PER_WORD == 0 | |
3595 | && (new = operand_subword (constant, | |
3596 | offset / UNITS_PER_WORD, | |
3597 | 0, const_mode)) != 0) | |
3598 | return new; | |
3599 | ||
3600 | if (((BYTES_BIG_ENDIAN | |
3601 | && offset == GET_MODE_SIZE (GET_MODE (constant)) - 1) | |
3602 | || (! BYTES_BIG_ENDIAN && offset == 0)) | |
3603 | && (new = gen_lowpart_if_possible (mode, constant)) != 0) | |
3604 | return new; | |
3605 | } | |
3606 | ||
3607 | /* If this is a reference to a label at a known position in a jump | |
3608 | table, we also know its value. */ | |
3609 | if (base && GET_CODE (base) == LABEL_REF) | |
3610 | { | |
3611 | rtx label = XEXP (base, 0); | |
3612 | rtx table_insn = NEXT_INSN (label); | |
278a83b2 | 3613 | |
7afe21cc RK |
3614 | if (table_insn && GET_CODE (table_insn) == JUMP_INSN |
3615 | && GET_CODE (PATTERN (table_insn)) == ADDR_VEC) | |
3616 | { | |
3617 | rtx table = PATTERN (table_insn); | |
3618 | ||
3619 | if (offset >= 0 | |
3620 | && (offset / GET_MODE_SIZE (GET_MODE (table)) | |
3621 | < XVECLEN (table, 0))) | |
3622 | return XVECEXP (table, 0, | |
3623 | offset / GET_MODE_SIZE (GET_MODE (table))); | |
3624 | } | |
3625 | if (table_insn && GET_CODE (table_insn) == JUMP_INSN | |
3626 | && GET_CODE (PATTERN (table_insn)) == ADDR_DIFF_VEC) | |
3627 | { | |
3628 | rtx table = PATTERN (table_insn); | |
3629 | ||
3630 | if (offset >= 0 | |
3631 | && (offset / GET_MODE_SIZE (GET_MODE (table)) | |
3632 | < XVECLEN (table, 1))) | |
3633 | { | |
3634 | offset /= GET_MODE_SIZE (GET_MODE (table)); | |
38a448ca RH |
3635 | new = gen_rtx_MINUS (Pmode, XVECEXP (table, 1, offset), |
3636 | XEXP (table, 0)); | |
7afe21cc RK |
3637 | |
3638 | if (GET_MODE (table) != Pmode) | |
38a448ca | 3639 | new = gen_rtx_TRUNCATE (GET_MODE (table), new); |
7afe21cc | 3640 | |
278a83b2 | 3641 | /* Indicate this is a constant. This isn't a |
67a37737 RK |
3642 | valid form of CONST, but it will only be used |
3643 | to fold the next insns and then discarded, so | |
ac7ef8d5 FS |
3644 | it should be safe. |
3645 | ||
3646 | Note this expression must be explicitly discarded, | |
3647 | by cse_insn, else it may end up in a REG_EQUAL note | |
3648 | and "escape" to cause problems elsewhere. */ | |
38a448ca | 3649 | return gen_rtx_CONST (GET_MODE (new), new); |
7afe21cc RK |
3650 | } |
3651 | } | |
3652 | } | |
3653 | ||
3654 | return x; | |
3655 | } | |
9255709c | 3656 | |
a5e5cf67 RH |
3657 | #ifdef NO_FUNCTION_CSE |
3658 | case CALL: | |
3659 | if (CONSTANT_P (XEXP (XEXP (x, 0), 0))) | |
3660 | return x; | |
3661 | break; | |
3662 | #endif | |
3663 | ||
9255709c | 3664 | case ASM_OPERANDS: |
6462bb43 AO |
3665 | for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--) |
3666 | validate_change (insn, &ASM_OPERANDS_INPUT (x, i), | |
3667 | fold_rtx (ASM_OPERANDS_INPUT (x, i), insn), 0); | |
9255709c | 3668 | break; |
278a83b2 | 3669 | |
e9a25f70 JL |
3670 | default: |
3671 | break; | |
7afe21cc RK |
3672 | } |
3673 | ||
3674 | const_arg0 = 0; | |
3675 | const_arg1 = 0; | |
3676 | const_arg2 = 0; | |
3677 | mode_arg0 = VOIDmode; | |
3678 | ||
3679 | /* Try folding our operands. | |
3680 | Then see which ones have constant values known. */ | |
3681 | ||
3682 | fmt = GET_RTX_FORMAT (code); | |
3683 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
3684 | if (fmt[i] == 'e') | |
3685 | { | |
3686 | rtx arg = XEXP (x, i); | |
3687 | rtx folded_arg = arg, const_arg = 0; | |
3688 | enum machine_mode mode_arg = GET_MODE (arg); | |
3689 | rtx cheap_arg, expensive_arg; | |
3690 | rtx replacements[2]; | |
3691 | int j; | |
3692 | ||
3693 | /* Most arguments are cheap, so handle them specially. */ | |
3694 | switch (GET_CODE (arg)) | |
3695 | { | |
3696 | case REG: | |
3697 | /* This is the same as calling equiv_constant; it is duplicated | |
3698 | here for speed. */ | |
1bb98cec DM |
3699 | if (REGNO_QTY_VALID_P (REGNO (arg))) |
3700 | { | |
3701 | int arg_q = REG_QTY (REGNO (arg)); | |
3702 | struct qty_table_elem *arg_ent = &qty_table[arg_q]; | |
3703 | ||
3704 | if (arg_ent->const_rtx != NULL_RTX | |
3705 | && GET_CODE (arg_ent->const_rtx) != REG | |
3706 | && GET_CODE (arg_ent->const_rtx) != PLUS) | |
3707 | const_arg | |
3708 | = gen_lowpart_if_possible (GET_MODE (arg), | |
3709 | arg_ent->const_rtx); | |
3710 | } | |
7afe21cc RK |
3711 | break; |
3712 | ||
3713 | case CONST: | |
3714 | case CONST_INT: | |
3715 | case SYMBOL_REF: | |
3716 | case LABEL_REF: | |
3717 | case CONST_DOUBLE: | |
3718 | const_arg = arg; | |
3719 | break; | |
3720 | ||
3721 | #ifdef HAVE_cc0 | |
3722 | case CC0: | |
3723 | folded_arg = prev_insn_cc0; | |
3724 | mode_arg = prev_insn_cc0_mode; | |
3725 | const_arg = equiv_constant (folded_arg); | |
3726 | break; | |
3727 | #endif | |
3728 | ||
3729 | default: | |
3730 | folded_arg = fold_rtx (arg, insn); | |
3731 | const_arg = equiv_constant (folded_arg); | |
3732 | } | |
3733 | ||
3734 | /* For the first three operands, see if the operand | |
3735 | is constant or equivalent to a constant. */ | |
3736 | switch (i) | |
3737 | { | |
3738 | case 0: | |
3739 | folded_arg0 = folded_arg; | |
3740 | const_arg0 = const_arg; | |
3741 | mode_arg0 = mode_arg; | |
3742 | break; | |
3743 | case 1: | |
3744 | folded_arg1 = folded_arg; | |
3745 | const_arg1 = const_arg; | |
3746 | break; | |
3747 | case 2: | |
3748 | const_arg2 = const_arg; | |
3749 | break; | |
3750 | } | |
3751 | ||
3752 | /* Pick the least expensive of the folded argument and an | |
3753 | equivalent constant argument. */ | |
3754 | if (const_arg == 0 || const_arg == folded_arg | |
3755 | || COST (const_arg) > COST (folded_arg)) | |
3756 | cheap_arg = folded_arg, expensive_arg = const_arg; | |
3757 | else | |
3758 | cheap_arg = const_arg, expensive_arg = folded_arg; | |
3759 | ||
3760 | /* Try to replace the operand with the cheapest of the two | |
3761 | possibilities. If it doesn't work and this is either of the first | |
3762 | two operands of a commutative operation, try swapping them. | |
3763 | If THAT fails, try the more expensive, provided it is cheaper | |
3764 | than what is already there. */ | |
3765 | ||
3766 | if (cheap_arg == XEXP (x, i)) | |
3767 | continue; | |
3768 | ||
3769 | if (insn == 0 && ! copied) | |
3770 | { | |
3771 | x = copy_rtx (x); | |
3772 | copied = 1; | |
3773 | } | |
3774 | ||
3775 | replacements[0] = cheap_arg, replacements[1] = expensive_arg; | |
3776 | for (j = 0; | |
3777 | j < 2 && replacements[j] | |
3778 | && COST (replacements[j]) < COST (XEXP (x, i)); | |
3779 | j++) | |
3780 | { | |
3781 | if (validate_change (insn, &XEXP (x, i), replacements[j], 0)) | |
3782 | break; | |
3783 | ||
3784 | if (code == NE || code == EQ || GET_RTX_CLASS (code) == 'c') | |
3785 | { | |
3786 | validate_change (insn, &XEXP (x, i), XEXP (x, 1 - i), 1); | |
3787 | validate_change (insn, &XEXP (x, 1 - i), replacements[j], 1); | |
3788 | ||
3789 | if (apply_change_group ()) | |
3790 | { | |
3791 | /* Swap them back to be invalid so that this loop can | |
3792 | continue and flag them to be swapped back later. */ | |
3793 | rtx tem; | |
3794 | ||
3795 | tem = XEXP (x, 0); XEXP (x, 0) = XEXP (x, 1); | |
3796 | XEXP (x, 1) = tem; | |
3797 | must_swap = 1; | |
3798 | break; | |
3799 | } | |
3800 | } | |
3801 | } | |
3802 | } | |
3803 | ||
2d8b0f3a JL |
3804 | else |
3805 | { | |
3806 | if (fmt[i] == 'E') | |
3807 | /* Don't try to fold inside of a vector of expressions. | |
3808 | Doing nothing is harmless. */ | |
e49a1d2e | 3809 | {;} |
2d8b0f3a | 3810 | } |
7afe21cc RK |
3811 | |
3812 | /* If a commutative operation, place a constant integer as the second | |
3813 | operand unless the first operand is also a constant integer. Otherwise, | |
3814 | place any constant second unless the first operand is also a constant. */ | |
3815 | ||
3816 | if (code == EQ || code == NE || GET_RTX_CLASS (code) == 'c') | |
3817 | { | |
3818 | if (must_swap || (const_arg0 | |
3819 | && (const_arg1 == 0 | |
3820 | || (GET_CODE (const_arg0) == CONST_INT | |
3821 | && GET_CODE (const_arg1) != CONST_INT)))) | |
3822 | { | |
3823 | register rtx tem = XEXP (x, 0); | |
3824 | ||
3825 | if (insn == 0 && ! copied) | |
3826 | { | |
3827 | x = copy_rtx (x); | |
3828 | copied = 1; | |
3829 | } | |
3830 | ||
3831 | validate_change (insn, &XEXP (x, 0), XEXP (x, 1), 1); | |
3832 | validate_change (insn, &XEXP (x, 1), tem, 1); | |
3833 | if (apply_change_group ()) | |
3834 | { | |
3835 | tem = const_arg0, const_arg0 = const_arg1, const_arg1 = tem; | |
3836 | tem = folded_arg0, folded_arg0 = folded_arg1, folded_arg1 = tem; | |
3837 | } | |
3838 | } | |
3839 | } | |
3840 | ||
3841 | /* If X is an arithmetic operation, see if we can simplify it. */ | |
3842 | ||
3843 | switch (GET_RTX_CLASS (code)) | |
3844 | { | |
3845 | case '1': | |
67a37737 RK |
3846 | { |
3847 | int is_const = 0; | |
3848 | ||
3849 | /* We can't simplify extension ops unless we know the | |
3850 | original mode. */ | |
3851 | if ((code == ZERO_EXTEND || code == SIGN_EXTEND) | |
3852 | && mode_arg0 == VOIDmode) | |
3853 | break; | |
3854 | ||
3855 | /* If we had a CONST, strip it off and put it back later if we | |
3856 | fold. */ | |
3857 | if (const_arg0 != 0 && GET_CODE (const_arg0) == CONST) | |
3858 | is_const = 1, const_arg0 = XEXP (const_arg0, 0); | |
3859 | ||
3860 | new = simplify_unary_operation (code, mode, | |
3861 | const_arg0 ? const_arg0 : folded_arg0, | |
3862 | mode_arg0); | |
3863 | if (new != 0 && is_const) | |
38a448ca | 3864 | new = gen_rtx_CONST (mode, new); |
67a37737 | 3865 | } |
7afe21cc | 3866 | break; |
278a83b2 | 3867 | |
7afe21cc RK |
3868 | case '<': |
3869 | /* See what items are actually being compared and set FOLDED_ARG[01] | |
3870 | to those values and CODE to the actual comparison code. If any are | |
3871 | constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't | |
3872 | do anything if both operands are already known to be constant. */ | |
3873 | ||
3874 | if (const_arg0 == 0 || const_arg1 == 0) | |
3875 | { | |
3876 | struct table_elt *p0, *p1; | |
c610adec | 3877 | rtx true = const_true_rtx, false = const0_rtx; |
13c9910f | 3878 | enum machine_mode mode_arg1; |
c610adec RK |
3879 | |
3880 | #ifdef FLOAT_STORE_FLAG_VALUE | |
c7c955ee | 3881 | if (GET_MODE_CLASS (mode) == MODE_FLOAT) |
c610adec | 3882 | { |
12530dbe RH |
3883 | true = (CONST_DOUBLE_FROM_REAL_VALUE |
3884 | (FLOAT_STORE_FLAG_VALUE (mode), mode)); | |
c610adec RK |
3885 | false = CONST0_RTX (mode); |
3886 | } | |
3887 | #endif | |
7afe21cc | 3888 | |
13c9910f RS |
3889 | code = find_comparison_args (code, &folded_arg0, &folded_arg1, |
3890 | &mode_arg0, &mode_arg1); | |
7afe21cc RK |
3891 | const_arg0 = equiv_constant (folded_arg0); |
3892 | const_arg1 = equiv_constant (folded_arg1); | |
3893 | ||
13c9910f RS |
3894 | /* If the mode is VOIDmode or a MODE_CC mode, we don't know |
3895 | what kinds of things are being compared, so we can't do | |
3896 | anything with this comparison. */ | |
7afe21cc RK |
3897 | |
3898 | if (mode_arg0 == VOIDmode || GET_MODE_CLASS (mode_arg0) == MODE_CC) | |
3899 | break; | |
3900 | ||
0f41302f MS |
3901 | /* If we do not now have two constants being compared, see |
3902 | if we can nevertheless deduce some things about the | |
3903 | comparison. */ | |
7afe21cc RK |
3904 | if (const_arg0 == 0 || const_arg1 == 0) |
3905 | { | |
0f41302f MS |
3906 | /* Is FOLDED_ARG0 frame-pointer plus a constant? Or |
3907 | non-explicit constant? These aren't zero, but we | |
3908 | don't know their sign. */ | |
7afe21cc RK |
3909 | if (const_arg1 == const0_rtx |
3910 | && (NONZERO_BASE_PLUS_P (folded_arg0) | |
3911 | #if 0 /* Sad to say, on sysvr4, #pragma weak can make a symbol address | |
3912 | come out as 0. */ | |
3913 | || GET_CODE (folded_arg0) == SYMBOL_REF | |
3914 | #endif | |
3915 | || GET_CODE (folded_arg0) == LABEL_REF | |
3916 | || GET_CODE (folded_arg0) == CONST)) | |
3917 | { | |
3918 | if (code == EQ) | |
c610adec | 3919 | return false; |
7afe21cc | 3920 | else if (code == NE) |
c610adec | 3921 | return true; |
7afe21cc RK |
3922 | } |
3923 | ||
3924 | /* See if the two operands are the same. We don't do this | |
3925 | for IEEE floating-point since we can't assume x == x | |
3926 | since x might be a NaN. */ | |
3927 | ||
3928 | if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT | |
a83afb65 | 3929 | || ! FLOAT_MODE_P (mode_arg0) || flag_fast_math) |
7afe21cc RK |
3930 | && (folded_arg0 == folded_arg1 |
3931 | || (GET_CODE (folded_arg0) == REG | |
3932 | && GET_CODE (folded_arg1) == REG | |
30f72379 MM |
3933 | && (REG_QTY (REGNO (folded_arg0)) |
3934 | == REG_QTY (REGNO (folded_arg1)))) | |
7afe21cc RK |
3935 | || ((p0 = lookup (folded_arg0, |
3936 | (safe_hash (folded_arg0, mode_arg0) | |
9b1549b8 | 3937 | & HASH_MASK), mode_arg0)) |
7afe21cc RK |
3938 | && (p1 = lookup (folded_arg1, |
3939 | (safe_hash (folded_arg1, mode_arg0) | |
9b1549b8 | 3940 | & HASH_MASK), mode_arg0)) |
7afe21cc RK |
3941 | && p0->first_same_value == p1->first_same_value))) |
3942 | return ((code == EQ || code == LE || code == GE | |
3943 | || code == LEU || code == GEU) | |
c610adec | 3944 | ? true : false); |
7afe21cc RK |
3945 | |
3946 | /* If FOLDED_ARG0 is a register, see if the comparison we are | |
3947 | doing now is either the same as we did before or the reverse | |
3948 | (we only check the reverse if not floating-point). */ | |
3949 | else if (GET_CODE (folded_arg0) == REG) | |
3950 | { | |
30f72379 | 3951 | int qty = REG_QTY (REGNO (folded_arg0)); |
7afe21cc | 3952 | |
1bb98cec DM |
3953 | if (REGNO_QTY_VALID_P (REGNO (folded_arg0))) |
3954 | { | |
3955 | struct qty_table_elem *ent = &qty_table[qty]; | |
3956 | ||
3957 | if ((comparison_dominates_p (ent->comparison_code, code) | |
1eb8759b RH |
3958 | || (! FLOAT_MODE_P (mode_arg0) |
3959 | && comparison_dominates_p (ent->comparison_code, | |
3960 | reverse_condition (code)))) | |
1bb98cec DM |
3961 | && (rtx_equal_p (ent->comparison_const, folded_arg1) |
3962 | || (const_arg1 | |
3963 | && rtx_equal_p (ent->comparison_const, | |
3964 | const_arg1)) | |
3965 | || (GET_CODE (folded_arg1) == REG | |
3966 | && (REG_QTY (REGNO (folded_arg1)) == ent->comparison_qty)))) | |
3967 | return (comparison_dominates_p (ent->comparison_code, code) | |
3968 | ? true : false); | |
3969 | } | |
7afe21cc RK |
3970 | } |
3971 | } | |
3972 | } | |
3973 | ||
3974 | /* If we are comparing against zero, see if the first operand is | |
3975 | equivalent to an IOR with a constant. If so, we may be able to | |
3976 | determine the result of this comparison. */ | |
3977 | ||
3978 | if (const_arg1 == const0_rtx) | |
3979 | { | |
3980 | rtx y = lookup_as_function (folded_arg0, IOR); | |
3981 | rtx inner_const; | |
3982 | ||
3983 | if (y != 0 | |
3984 | && (inner_const = equiv_constant (XEXP (y, 1))) != 0 | |
3985 | && GET_CODE (inner_const) == CONST_INT | |
3986 | && INTVAL (inner_const) != 0) | |
3987 | { | |
3988 | int sign_bitnum = GET_MODE_BITSIZE (mode_arg0) - 1; | |
906c4e36 RK |
3989 | int has_sign = (HOST_BITS_PER_WIDE_INT >= sign_bitnum |
3990 | && (INTVAL (inner_const) | |
3991 | & ((HOST_WIDE_INT) 1 << sign_bitnum))); | |
c610adec RK |
3992 | rtx true = const_true_rtx, false = const0_rtx; |
3993 | ||
3994 | #ifdef FLOAT_STORE_FLAG_VALUE | |
c7c955ee | 3995 | if (GET_MODE_CLASS (mode) == MODE_FLOAT) |
c610adec | 3996 | { |
12530dbe RH |
3997 | true = (CONST_DOUBLE_FROM_REAL_VALUE |
3998 | (FLOAT_STORE_FLAG_VALUE (mode), mode)); | |
c610adec RK |
3999 | false = CONST0_RTX (mode); |
4000 | } | |
4001 | #endif | |
7afe21cc RK |
4002 | |
4003 | switch (code) | |
4004 | { | |
4005 | case EQ: | |
c610adec | 4006 | return false; |
7afe21cc | 4007 | case NE: |
c610adec | 4008 | return true; |
7afe21cc RK |
4009 | case LT: case LE: |
4010 | if (has_sign) | |
c610adec | 4011 | return true; |
7afe21cc RK |
4012 | break; |
4013 | case GT: case GE: | |
4014 | if (has_sign) | |
c610adec | 4015 | return false; |
7afe21cc | 4016 | break; |
e9a25f70 JL |
4017 | default: |
4018 | break; | |
7afe21cc RK |
4019 | } |
4020 | } | |
4021 | } | |
4022 | ||
95d0e5f1 AO |
4023 | new = simplify_relational_operation (code, |
4024 | (mode_arg0 != VOIDmode | |
4025 | ? mode_arg0 | |
4026 | : (GET_MODE (const_arg0 | |
4027 | ? const_arg0 | |
4028 | : folded_arg0) | |
4029 | != VOIDmode) | |
4030 | ? GET_MODE (const_arg0 | |
4031 | ? const_arg0 | |
4032 | : folded_arg0) | |
4033 | : GET_MODE (const_arg1 | |
4034 | ? const_arg1 | |
4035 | : folded_arg1)), | |
7afe21cc RK |
4036 | const_arg0 ? const_arg0 : folded_arg0, |
4037 | const_arg1 ? const_arg1 : folded_arg1); | |
c610adec RK |
4038 | #ifdef FLOAT_STORE_FLAG_VALUE |
4039 | if (new != 0 && GET_MODE_CLASS (mode) == MODE_FLOAT) | |
12530dbe RH |
4040 | { |
4041 | if (new == const0_rtx) | |
4042 | new = CONST0_RTX (mode); | |
4043 | else | |
4044 | new = (CONST_DOUBLE_FROM_REAL_VALUE | |
4045 | (FLOAT_STORE_FLAG_VALUE (mode), mode)); | |
4046 | } | |
c610adec | 4047 | #endif |
7afe21cc RK |
4048 | break; |
4049 | ||
4050 | case '2': | |
4051 | case 'c': | |
4052 | switch (code) | |
4053 | { | |
4054 | case PLUS: | |
4055 | /* If the second operand is a LABEL_REF, see if the first is a MINUS | |
4056 | with that LABEL_REF as its second operand. If so, the result is | |
4057 | the first operand of that MINUS. This handles switches with an | |
4058 | ADDR_DIFF_VEC table. */ | |
4059 | if (const_arg1 && GET_CODE (const_arg1) == LABEL_REF) | |
4060 | { | |
e650cbda RK |
4061 | rtx y |
4062 | = GET_CODE (folded_arg0) == MINUS ? folded_arg0 | |
ddc356e8 | 4063 | : lookup_as_function (folded_arg0, MINUS); |
7afe21cc RK |
4064 | |
4065 | if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF | |
4066 | && XEXP (XEXP (y, 1), 0) == XEXP (const_arg1, 0)) | |
4067 | return XEXP (y, 0); | |
67a37737 RK |
4068 | |
4069 | /* Now try for a CONST of a MINUS like the above. */ | |
e650cbda RK |
4070 | if ((y = (GET_CODE (folded_arg0) == CONST ? folded_arg0 |
4071 | : lookup_as_function (folded_arg0, CONST))) != 0 | |
67a37737 RK |
4072 | && GET_CODE (XEXP (y, 0)) == MINUS |
4073 | && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF | |
ddc356e8 | 4074 | && XEXP (XEXP (XEXP (y, 0), 1), 0) == XEXP (const_arg1, 0)) |
67a37737 | 4075 | return XEXP (XEXP (y, 0), 0); |
7afe21cc | 4076 | } |
c2cc0778 | 4077 | |
e650cbda RK |
4078 | /* Likewise if the operands are in the other order. */ |
4079 | if (const_arg0 && GET_CODE (const_arg0) == LABEL_REF) | |
4080 | { | |
4081 | rtx y | |
4082 | = GET_CODE (folded_arg1) == MINUS ? folded_arg1 | |
ddc356e8 | 4083 | : lookup_as_function (folded_arg1, MINUS); |
e650cbda RK |
4084 | |
4085 | if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF | |
4086 | && XEXP (XEXP (y, 1), 0) == XEXP (const_arg0, 0)) | |
4087 | return XEXP (y, 0); | |
4088 | ||
4089 | /* Now try for a CONST of a MINUS like the above. */ | |
4090 | if ((y = (GET_CODE (folded_arg1) == CONST ? folded_arg1 | |
4091 | : lookup_as_function (folded_arg1, CONST))) != 0 | |
4092 | && GET_CODE (XEXP (y, 0)) == MINUS | |
4093 | && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF | |
ddc356e8 | 4094 | && XEXP (XEXP (XEXP (y, 0), 1), 0) == XEXP (const_arg0, 0)) |
e650cbda RK |
4095 | return XEXP (XEXP (y, 0), 0); |
4096 | } | |
4097 | ||
c2cc0778 RK |
4098 | /* If second operand is a register equivalent to a negative |
4099 | CONST_INT, see if we can find a register equivalent to the | |
4100 | positive constant. Make a MINUS if so. Don't do this for | |
5d595063 | 4101 | a non-negative constant since we might then alternate between |
c2cc0778 | 4102 | chosing positive and negative constants. Having the positive |
5d595063 RK |
4103 | constant previously-used is the more common case. Be sure |
4104 | the resulting constant is non-negative; if const_arg1 were | |
4105 | the smallest negative number this would overflow: depending | |
4106 | on the mode, this would either just be the same value (and | |
4107 | hence not save anything) or be incorrect. */ | |
4108 | if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT | |
4109 | && INTVAL (const_arg1) < 0 | |
4741f6ad JL |
4110 | /* This used to test |
4111 | ||
ddc356e8 | 4112 | -INTVAL (const_arg1) >= 0 |
4741f6ad JL |
4113 | |
4114 | But The Sun V5.0 compilers mis-compiled that test. So | |
4115 | instead we test for the problematic value in a more direct | |
4116 | manner and hope the Sun compilers get it correct. */ | |
5c45a8ac KG |
4117 | && INTVAL (const_arg1) != |
4118 | ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT - 1)) | |
5d595063 | 4119 | && GET_CODE (folded_arg1) == REG) |
c2cc0778 | 4120 | { |
ddc356e8 | 4121 | rtx new_const = GEN_INT (-INTVAL (const_arg1)); |
c2cc0778 | 4122 | struct table_elt *p |
9b1549b8 | 4123 | = lookup (new_const, safe_hash (new_const, mode) & HASH_MASK, |
c2cc0778 RK |
4124 | mode); |
4125 | ||
4126 | if (p) | |
4127 | for (p = p->first_same_value; p; p = p->next_same_value) | |
4128 | if (GET_CODE (p->exp) == REG) | |
0cedb36c JL |
4129 | return simplify_gen_binary (MINUS, mode, folded_arg0, |
4130 | canon_reg (p->exp, NULL_RTX)); | |
c2cc0778 | 4131 | } |
13c9910f RS |
4132 | goto from_plus; |
4133 | ||
4134 | case MINUS: | |
4135 | /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2). | |
4136 | If so, produce (PLUS Z C2-C). */ | |
4137 | if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT) | |
4138 | { | |
4139 | rtx y = lookup_as_function (XEXP (x, 0), PLUS); | |
4140 | if (y && GET_CODE (XEXP (y, 1)) == CONST_INT) | |
f3becefd RK |
4141 | return fold_rtx (plus_constant (copy_rtx (y), |
4142 | -INTVAL (const_arg1)), | |
a3b5c94a | 4143 | NULL_RTX); |
13c9910f | 4144 | } |
7afe21cc | 4145 | |
ddc356e8 | 4146 | /* Fall through. */ |
7afe21cc | 4147 | |
13c9910f | 4148 | from_plus: |
7afe21cc RK |
4149 | case SMIN: case SMAX: case UMIN: case UMAX: |
4150 | case IOR: case AND: case XOR: | |
4151 | case MULT: case DIV: case UDIV: | |
4152 | case ASHIFT: case LSHIFTRT: case ASHIFTRT: | |
4153 | /* If we have (<op> <reg> <const_int>) for an associative OP and REG | |
4154 | is known to be of similar form, we may be able to replace the | |
4155 | operation with a combined operation. This may eliminate the | |
4156 | intermediate operation if every use is simplified in this way. | |
4157 | Note that the similar optimization done by combine.c only works | |
4158 | if the intermediate operation's result has only one reference. */ | |
4159 | ||
4160 | if (GET_CODE (folded_arg0) == REG | |
4161 | && const_arg1 && GET_CODE (const_arg1) == CONST_INT) | |
4162 | { | |
4163 | int is_shift | |
4164 | = (code == ASHIFT || code == ASHIFTRT || code == LSHIFTRT); | |
4165 | rtx y = lookup_as_function (folded_arg0, code); | |
4166 | rtx inner_const; | |
4167 | enum rtx_code associate_code; | |
4168 | rtx new_const; | |
4169 | ||
4170 | if (y == 0 | |
4171 | || 0 == (inner_const | |
4172 | = equiv_constant (fold_rtx (XEXP (y, 1), 0))) | |
4173 | || GET_CODE (inner_const) != CONST_INT | |
4174 | /* If we have compiled a statement like | |
4175 | "if (x == (x & mask1))", and now are looking at | |
4176 | "x & mask2", we will have a case where the first operand | |
4177 | of Y is the same as our first operand. Unless we detect | |
4178 | this case, an infinite loop will result. */ | |
4179 | || XEXP (y, 0) == folded_arg0) | |
4180 | break; | |
4181 | ||
4182 | /* Don't associate these operations if they are a PLUS with the | |
4183 | same constant and it is a power of two. These might be doable | |
4184 | with a pre- or post-increment. Similarly for two subtracts of | |
4185 | identical powers of two with post decrement. */ | |
4186 | ||
4187 | if (code == PLUS && INTVAL (const_arg1) == INTVAL (inner_const) | |
940da324 JL |
4188 | && ((HAVE_PRE_INCREMENT |
4189 | && exact_log2 (INTVAL (const_arg1)) >= 0) | |
4190 | || (HAVE_POST_INCREMENT | |
4191 | && exact_log2 (INTVAL (const_arg1)) >= 0) | |
4192 | || (HAVE_PRE_DECREMENT | |
4193 | && exact_log2 (- INTVAL (const_arg1)) >= 0) | |
4194 | || (HAVE_POST_DECREMENT | |
4195 | && exact_log2 (- INTVAL (const_arg1)) >= 0))) | |
7afe21cc RK |
4196 | break; |
4197 | ||
4198 | /* Compute the code used to compose the constants. For example, | |
4199 | A/C1/C2 is A/(C1 * C2), so if CODE == DIV, we want MULT. */ | |
4200 | ||
4201 | associate_code | |
4202 | = (code == MULT || code == DIV || code == UDIV ? MULT | |
4203 | : is_shift || code == PLUS || code == MINUS ? PLUS : code); | |
4204 | ||
4205 | new_const = simplify_binary_operation (associate_code, mode, | |
4206 | const_arg1, inner_const); | |
4207 | ||
4208 | if (new_const == 0) | |
4209 | break; | |
4210 | ||
4211 | /* If we are associating shift operations, don't let this | |
4908e508 RS |
4212 | produce a shift of the size of the object or larger. |
4213 | This could occur when we follow a sign-extend by a right | |
4214 | shift on a machine that does a sign-extend as a pair | |
4215 | of shifts. */ | |
7afe21cc RK |
4216 | |
4217 | if (is_shift && GET_CODE (new_const) == CONST_INT | |
4908e508 RS |
4218 | && INTVAL (new_const) >= GET_MODE_BITSIZE (mode)) |
4219 | { | |
4220 | /* As an exception, we can turn an ASHIFTRT of this | |
4221 | form into a shift of the number of bits - 1. */ | |
4222 | if (code == ASHIFTRT) | |
4223 | new_const = GEN_INT (GET_MODE_BITSIZE (mode) - 1); | |
4224 | else | |
4225 | break; | |
4226 | } | |
7afe21cc RK |
4227 | |
4228 | y = copy_rtx (XEXP (y, 0)); | |
4229 | ||
4230 | /* If Y contains our first operand (the most common way this | |
4231 | can happen is if Y is a MEM), we would do into an infinite | |
4232 | loop if we tried to fold it. So don't in that case. */ | |
4233 | ||
4234 | if (! reg_mentioned_p (folded_arg0, y)) | |
4235 | y = fold_rtx (y, insn); | |
4236 | ||
0cedb36c | 4237 | return simplify_gen_binary (code, mode, y, new_const); |
7afe21cc | 4238 | } |
e9a25f70 JL |
4239 | break; |
4240 | ||
4241 | default: | |
4242 | break; | |
7afe21cc RK |
4243 | } |
4244 | ||
4245 | new = simplify_binary_operation (code, mode, | |
4246 | const_arg0 ? const_arg0 : folded_arg0, | |
4247 | const_arg1 ? const_arg1 : folded_arg1); | |
4248 | break; | |
4249 | ||
4250 | case 'o': | |
4251 | /* (lo_sum (high X) X) is simply X. */ | |
4252 | if (code == LO_SUM && const_arg0 != 0 | |
4253 | && GET_CODE (const_arg0) == HIGH | |
4254 | && rtx_equal_p (XEXP (const_arg0, 0), const_arg1)) | |
4255 | return const_arg1; | |
4256 | break; | |
4257 | ||
4258 | case '3': | |
4259 | case 'b': | |
4260 | new = simplify_ternary_operation (code, mode, mode_arg0, | |
4261 | const_arg0 ? const_arg0 : folded_arg0, | |
4262 | const_arg1 ? const_arg1 : folded_arg1, | |
4263 | const_arg2 ? const_arg2 : XEXP (x, 2)); | |
4264 | break; | |
ee5332b8 RH |
4265 | |
4266 | case 'x': | |
ddc356e8 | 4267 | /* Always eliminate CONSTANT_P_RTX at this stage. */ |
ee5332b8 RH |
4268 | if (code == CONSTANT_P_RTX) |
4269 | return (const_arg0 ? const1_rtx : const0_rtx); | |
4270 | break; | |
7afe21cc RK |
4271 | } |
4272 | ||
4273 | return new ? new : x; | |
4274 | } | |
4275 | \f | |
4276 | /* Return a constant value currently equivalent to X. | |
4277 | Return 0 if we don't know one. */ | |
4278 | ||
4279 | static rtx | |
4280 | equiv_constant (x) | |
4281 | rtx x; | |
4282 | { | |
4283 | if (GET_CODE (x) == REG | |
1bb98cec DM |
4284 | && REGNO_QTY_VALID_P (REGNO (x))) |
4285 | { | |
4286 | int x_q = REG_QTY (REGNO (x)); | |
4287 | struct qty_table_elem *x_ent = &qty_table[x_q]; | |
4288 | ||
4289 | if (x_ent->const_rtx) | |
4290 | x = gen_lowpart_if_possible (GET_MODE (x), x_ent->const_rtx); | |
4291 | } | |
7afe21cc | 4292 | |
2ce5e1b4 | 4293 | if (x == 0 || CONSTANT_P (x)) |
7afe21cc RK |
4294 | return x; |
4295 | ||
fc3ffe83 RK |
4296 | /* If X is a MEM, try to fold it outside the context of any insn to see if |
4297 | it might be equivalent to a constant. That handles the case where it | |
4298 | is a constant-pool reference. Then try to look it up in the hash table | |
4299 | in case it is something whose value we have seen before. */ | |
4300 | ||
4301 | if (GET_CODE (x) == MEM) | |
4302 | { | |
4303 | struct table_elt *elt; | |
4304 | ||
906c4e36 | 4305 | x = fold_rtx (x, NULL_RTX); |
fc3ffe83 RK |
4306 | if (CONSTANT_P (x)) |
4307 | return x; | |
4308 | ||
9b1549b8 | 4309 | elt = lookup (x, safe_hash (x, GET_MODE (x)) & HASH_MASK, GET_MODE (x)); |
fc3ffe83 RK |
4310 | if (elt == 0) |
4311 | return 0; | |
4312 | ||
4313 | for (elt = elt->first_same_value; elt; elt = elt->next_same_value) | |
4314 | if (elt->is_const && CONSTANT_P (elt->exp)) | |
4315 | return elt->exp; | |
4316 | } | |
4317 | ||
7afe21cc RK |
4318 | return 0; |
4319 | } | |
4320 | \f | |
4321 | /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a fixed-point | |
4322 | number, return an rtx (MEM, SUBREG, or CONST_INT) that refers to the | |
4323 | least-significant part of X. | |
278a83b2 | 4324 | MODE specifies how big a part of X to return. |
7afe21cc RK |
4325 | |
4326 | If the requested operation cannot be done, 0 is returned. | |
4327 | ||
4328 | This is similar to gen_lowpart in emit-rtl.c. */ | |
4329 | ||
4330 | rtx | |
4331 | gen_lowpart_if_possible (mode, x) | |
4332 | enum machine_mode mode; | |
4333 | register rtx x; | |
4334 | { | |
4335 | rtx result = gen_lowpart_common (mode, x); | |
4336 | ||
4337 | if (result) | |
4338 | return result; | |
4339 | else if (GET_CODE (x) == MEM) | |
4340 | { | |
4341 | /* This is the only other case we handle. */ | |
4342 | register int offset = 0; | |
4343 | rtx new; | |
4344 | ||
f76b9db2 ILT |
4345 | if (WORDS_BIG_ENDIAN) |
4346 | offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD) | |
4347 | - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD)); | |
4348 | if (BYTES_BIG_ENDIAN) | |
4349 | /* Adjust the address so that the address-after-the-data is | |
4350 | unchanged. */ | |
4351 | offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode)) | |
4352 | - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x)))); | |
38a448ca | 4353 | new = gen_rtx_MEM (mode, plus_constant (XEXP (x, 0), offset)); |
7afe21cc RK |
4354 | if (! memory_address_p (mode, XEXP (new, 0))) |
4355 | return 0; | |
c6df88cb | 4356 | MEM_COPY_ATTRIBUTES (new, x); |
7afe21cc RK |
4357 | return new; |
4358 | } | |
4359 | else | |
4360 | return 0; | |
4361 | } | |
4362 | \f | |
4363 | /* Given INSN, a jump insn, TAKEN indicates if we are following the "taken" | |
4364 | branch. It will be zero if not. | |
4365 | ||
4366 | In certain cases, this can cause us to add an equivalence. For example, | |
278a83b2 | 4367 | if we are following the taken case of |
7afe21cc RK |
4368 | if (i == 2) |
4369 | we can add the fact that `i' and '2' are now equivalent. | |
4370 | ||
4371 | In any case, we can record that this comparison was passed. If the same | |
4372 | comparison is seen later, we will know its value. */ | |
4373 | ||
4374 | static void | |
4375 | record_jump_equiv (insn, taken) | |
4376 | rtx insn; | |
4377 | int taken; | |
4378 | { | |
4379 | int cond_known_true; | |
4380 | rtx op0, op1; | |
7f1c097d | 4381 | rtx set; |
13c9910f | 4382 | enum machine_mode mode, mode0, mode1; |
7afe21cc RK |
4383 | int reversed_nonequality = 0; |
4384 | enum rtx_code code; | |
4385 | ||
4386 | /* Ensure this is the right kind of insn. */ | |
7f1c097d | 4387 | if (! any_condjump_p (insn)) |
7afe21cc | 4388 | return; |
7f1c097d | 4389 | set = pc_set (insn); |
7afe21cc RK |
4390 | |
4391 | /* See if this jump condition is known true or false. */ | |
4392 | if (taken) | |
7f1c097d | 4393 | cond_known_true = (XEXP (SET_SRC (set), 2) == pc_rtx); |
7afe21cc | 4394 | else |
7f1c097d | 4395 | cond_known_true = (XEXP (SET_SRC (set), 1) == pc_rtx); |
7afe21cc RK |
4396 | |
4397 | /* Get the type of comparison being done and the operands being compared. | |
4398 | If we had to reverse a non-equality condition, record that fact so we | |
4399 | know that it isn't valid for floating-point. */ | |
7f1c097d JH |
4400 | code = GET_CODE (XEXP (SET_SRC (set), 0)); |
4401 | op0 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 0), insn); | |
4402 | op1 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 1), insn); | |
7afe21cc | 4403 | |
13c9910f | 4404 | code = find_comparison_args (code, &op0, &op1, &mode0, &mode1); |
7afe21cc RK |
4405 | if (! cond_known_true) |
4406 | { | |
4407 | reversed_nonequality = (code != EQ && code != NE); | |
4408 | code = reverse_condition (code); | |
1eb8759b RH |
4409 | |
4410 | /* Don't remember if we can't find the inverse. */ | |
4411 | if (code == UNKNOWN) | |
4412 | return; | |
7afe21cc RK |
4413 | } |
4414 | ||
4415 | /* The mode is the mode of the non-constant. */ | |
13c9910f RS |
4416 | mode = mode0; |
4417 | if (mode1 != VOIDmode) | |
4418 | mode = mode1; | |
7afe21cc RK |
4419 | |
4420 | record_jump_cond (code, mode, op0, op1, reversed_nonequality); | |
4421 | } | |
4422 | ||
4423 | /* We know that comparison CODE applied to OP0 and OP1 in MODE is true. | |
4424 | REVERSED_NONEQUALITY is nonzero if CODE had to be swapped. | |
4425 | Make any useful entries we can with that information. Called from | |
4426 | above function and called recursively. */ | |
4427 | ||
4428 | static void | |
4429 | record_jump_cond (code, mode, op0, op1, reversed_nonequality) | |
4430 | enum rtx_code code; | |
4431 | enum machine_mode mode; | |
4432 | rtx op0, op1; | |
4433 | int reversed_nonequality; | |
4434 | { | |
2197a88a | 4435 | unsigned op0_hash, op1_hash; |
e428d738 | 4436 | int op0_in_memory, op1_in_memory; |
7afe21cc RK |
4437 | struct table_elt *op0_elt, *op1_elt; |
4438 | ||
4439 | /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG, | |
4440 | we know that they are also equal in the smaller mode (this is also | |
4441 | true for all smaller modes whether or not there is a SUBREG, but | |
ac7ef8d5 | 4442 | is not worth testing for with no SUBREG). */ |
7afe21cc | 4443 | |
2e794ee8 | 4444 | /* Note that GET_MODE (op0) may not equal MODE. */ |
7afe21cc | 4445 | if (code == EQ && GET_CODE (op0) == SUBREG |
2e794ee8 RS |
4446 | && (GET_MODE_SIZE (GET_MODE (op0)) |
4447 | > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0))))) | |
7afe21cc RK |
4448 | { |
4449 | enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0)); | |
4450 | rtx tem = gen_lowpart_if_possible (inner_mode, op1); | |
4451 | ||
4452 | record_jump_cond (code, mode, SUBREG_REG (op0), | |
38a448ca | 4453 | tem ? tem : gen_rtx_SUBREG (inner_mode, op1, 0), |
7afe21cc RK |
4454 | reversed_nonequality); |
4455 | } | |
4456 | ||
4457 | if (code == EQ && GET_CODE (op1) == SUBREG | |
2e794ee8 RS |
4458 | && (GET_MODE_SIZE (GET_MODE (op1)) |
4459 | > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1))))) | |
7afe21cc RK |
4460 | { |
4461 | enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1)); | |
4462 | rtx tem = gen_lowpart_if_possible (inner_mode, op0); | |
4463 | ||
4464 | record_jump_cond (code, mode, SUBREG_REG (op1), | |
38a448ca | 4465 | tem ? tem : gen_rtx_SUBREG (inner_mode, op0, 0), |
7afe21cc RK |
4466 | reversed_nonequality); |
4467 | } | |
4468 | ||
278a83b2 | 4469 | /* Similarly, if this is an NE comparison, and either is a SUBREG |
7afe21cc RK |
4470 | making a smaller mode, we know the whole thing is also NE. */ |
4471 | ||
2e794ee8 RS |
4472 | /* Note that GET_MODE (op0) may not equal MODE; |
4473 | if we test MODE instead, we can get an infinite recursion | |
4474 | alternating between two modes each wider than MODE. */ | |
4475 | ||
7afe21cc RK |
4476 | if (code == NE && GET_CODE (op0) == SUBREG |
4477 | && subreg_lowpart_p (op0) | |
2e794ee8 RS |
4478 | && (GET_MODE_SIZE (GET_MODE (op0)) |
4479 | < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0))))) | |
7afe21cc RK |
4480 | { |
4481 | enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0)); | |
4482 | rtx tem = gen_lowpart_if_possible (inner_mode, op1); | |
4483 | ||
4484 | record_jump_cond (code, mode, SUBREG_REG (op0), | |
38a448ca | 4485 | tem ? tem : gen_rtx_SUBREG (inner_mode, op1, 0), |
7afe21cc RK |
4486 | reversed_nonequality); |
4487 | } | |
4488 | ||
4489 | if (code == NE && GET_CODE (op1) == SUBREG | |
4490 | && subreg_lowpart_p (op1) | |
2e794ee8 RS |
4491 | && (GET_MODE_SIZE (GET_MODE (op1)) |
4492 | < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1))))) | |
7afe21cc RK |
4493 | { |
4494 | enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1)); | |
4495 | rtx tem = gen_lowpart_if_possible (inner_mode, op0); | |
4496 | ||
4497 | record_jump_cond (code, mode, SUBREG_REG (op1), | |
38a448ca | 4498 | tem ? tem : gen_rtx_SUBREG (inner_mode, op0, 0), |
7afe21cc RK |
4499 | reversed_nonequality); |
4500 | } | |
4501 | ||
4502 | /* Hash both operands. */ | |
4503 | ||
4504 | do_not_record = 0; | |
4505 | hash_arg_in_memory = 0; | |
2197a88a | 4506 | op0_hash = HASH (op0, mode); |
7afe21cc | 4507 | op0_in_memory = hash_arg_in_memory; |
7afe21cc RK |
4508 | |
4509 | if (do_not_record) | |
4510 | return; | |
4511 | ||
4512 | do_not_record = 0; | |
4513 | hash_arg_in_memory = 0; | |
2197a88a | 4514 | op1_hash = HASH (op1, mode); |
7afe21cc | 4515 | op1_in_memory = hash_arg_in_memory; |
278a83b2 | 4516 | |
7afe21cc RK |
4517 | if (do_not_record) |
4518 | return; | |
4519 | ||
4520 | /* Look up both operands. */ | |
2197a88a RK |
4521 | op0_elt = lookup (op0, op0_hash, mode); |
4522 | op1_elt = lookup (op1, op1_hash, mode); | |
7afe21cc | 4523 | |
af3869c1 RK |
4524 | /* If both operands are already equivalent or if they are not in the |
4525 | table but are identical, do nothing. */ | |
4526 | if ((op0_elt != 0 && op1_elt != 0 | |
4527 | && op0_elt->first_same_value == op1_elt->first_same_value) | |
4528 | || op0 == op1 || rtx_equal_p (op0, op1)) | |
4529 | return; | |
4530 | ||
7afe21cc | 4531 | /* If we aren't setting two things equal all we can do is save this |
b2796a4b RK |
4532 | comparison. Similarly if this is floating-point. In the latter |
4533 | case, OP1 might be zero and both -0.0 and 0.0 are equal to it. | |
4534 | If we record the equality, we might inadvertently delete code | |
4535 | whose intent was to change -0 to +0. */ | |
4536 | ||
cbf6a543 | 4537 | if (code != EQ || FLOAT_MODE_P (GET_MODE (op0))) |
7afe21cc | 4538 | { |
1bb98cec DM |
4539 | struct qty_table_elem *ent; |
4540 | int qty; | |
4541 | ||
7afe21cc RK |
4542 | /* If we reversed a floating-point comparison, if OP0 is not a |
4543 | register, or if OP1 is neither a register or constant, we can't | |
4544 | do anything. */ | |
4545 | ||
4546 | if (GET_CODE (op1) != REG) | |
4547 | op1 = equiv_constant (op1); | |
4548 | ||
cbf6a543 | 4549 | if ((reversed_nonequality && FLOAT_MODE_P (mode)) |
7afe21cc RK |
4550 | || GET_CODE (op0) != REG || op1 == 0) |
4551 | return; | |
4552 | ||
4553 | /* Put OP0 in the hash table if it isn't already. This gives it a | |
4554 | new quantity number. */ | |
4555 | if (op0_elt == 0) | |
4556 | { | |
906c4e36 | 4557 | if (insert_regs (op0, NULL_PTR, 0)) |
7afe21cc RK |
4558 | { |
4559 | rehash_using_reg (op0); | |
2197a88a | 4560 | op0_hash = HASH (op0, mode); |
2bb81c86 RK |
4561 | |
4562 | /* If OP0 is contained in OP1, this changes its hash code | |
4563 | as well. Faster to rehash than to check, except | |
4564 | for the simple case of a constant. */ | |
4565 | if (! CONSTANT_P (op1)) | |
2197a88a | 4566 | op1_hash = HASH (op1,mode); |
7afe21cc RK |
4567 | } |
4568 | ||
2197a88a | 4569 | op0_elt = insert (op0, NULL_PTR, op0_hash, mode); |
7afe21cc | 4570 | op0_elt->in_memory = op0_in_memory; |
7afe21cc RK |
4571 | } |
4572 | ||
1bb98cec DM |
4573 | qty = REG_QTY (REGNO (op0)); |
4574 | ent = &qty_table[qty]; | |
4575 | ||
4576 | ent->comparison_code = code; | |
7afe21cc RK |
4577 | if (GET_CODE (op1) == REG) |
4578 | { | |
5d5ea909 | 4579 | /* Look it up again--in case op0 and op1 are the same. */ |
2197a88a | 4580 | op1_elt = lookup (op1, op1_hash, mode); |
5d5ea909 | 4581 | |
7afe21cc RK |
4582 | /* Put OP1 in the hash table so it gets a new quantity number. */ |
4583 | if (op1_elt == 0) | |
4584 | { | |
906c4e36 | 4585 | if (insert_regs (op1, NULL_PTR, 0)) |
7afe21cc RK |
4586 | { |
4587 | rehash_using_reg (op1); | |
2197a88a | 4588 | op1_hash = HASH (op1, mode); |
7afe21cc RK |
4589 | } |
4590 | ||
2197a88a | 4591 | op1_elt = insert (op1, NULL_PTR, op1_hash, mode); |
7afe21cc | 4592 | op1_elt->in_memory = op1_in_memory; |
7afe21cc RK |
4593 | } |
4594 | ||
1bb98cec DM |
4595 | ent->comparison_const = NULL_RTX; |
4596 | ent->comparison_qty = REG_QTY (REGNO (op1)); | |
7afe21cc RK |
4597 | } |
4598 | else | |
4599 | { | |
1bb98cec DM |
4600 | ent->comparison_const = op1; |
4601 | ent->comparison_qty = -1; | |
7afe21cc RK |
4602 | } |
4603 | ||
4604 | return; | |
4605 | } | |
4606 | ||
eb5ad42a RS |
4607 | /* If either side is still missing an equivalence, make it now, |
4608 | then merge the equivalences. */ | |
7afe21cc | 4609 | |
7afe21cc RK |
4610 | if (op0_elt == 0) |
4611 | { | |
eb5ad42a | 4612 | if (insert_regs (op0, NULL_PTR, 0)) |
7afe21cc RK |
4613 | { |
4614 | rehash_using_reg (op0); | |
2197a88a | 4615 | op0_hash = HASH (op0, mode); |
7afe21cc RK |
4616 | } |
4617 | ||
2197a88a | 4618 | op0_elt = insert (op0, NULL_PTR, op0_hash, mode); |
7afe21cc | 4619 | op0_elt->in_memory = op0_in_memory; |
7afe21cc RK |
4620 | } |
4621 | ||
4622 | if (op1_elt == 0) | |
4623 | { | |
eb5ad42a | 4624 | if (insert_regs (op1, NULL_PTR, 0)) |
7afe21cc RK |
4625 | { |
4626 | rehash_using_reg (op1); | |
2197a88a | 4627 | op1_hash = HASH (op1, mode); |
7afe21cc RK |
4628 | } |
4629 | ||
2197a88a | 4630 | op1_elt = insert (op1, NULL_PTR, op1_hash, mode); |
7afe21cc | 4631 | op1_elt->in_memory = op1_in_memory; |
7afe21cc | 4632 | } |
eb5ad42a RS |
4633 | |
4634 | merge_equiv_classes (op0_elt, op1_elt); | |
4635 | last_jump_equiv_class = op0_elt; | |
7afe21cc RK |
4636 | } |
4637 | \f | |
4638 | /* CSE processing for one instruction. | |
4639 | First simplify sources and addresses of all assignments | |
4640 | in the instruction, using previously-computed equivalents values. | |
4641 | Then install the new sources and destinations in the table | |
278a83b2 | 4642 | of available values. |
7afe21cc | 4643 | |
1ed0205e VM |
4644 | If LIBCALL_INSN is nonzero, don't record any equivalence made in |
4645 | the insn. It means that INSN is inside libcall block. In this | |
ddc356e8 | 4646 | case LIBCALL_INSN is the corresponding insn with REG_LIBCALL. */ |
7afe21cc RK |
4647 | |
4648 | /* Data on one SET contained in the instruction. */ | |
4649 | ||
4650 | struct set | |
4651 | { | |
4652 | /* The SET rtx itself. */ | |
4653 | rtx rtl; | |
4654 | /* The SET_SRC of the rtx (the original value, if it is changing). */ | |
4655 | rtx src; | |
4656 | /* The hash-table element for the SET_SRC of the SET. */ | |
4657 | struct table_elt *src_elt; | |
2197a88a RK |
4658 | /* Hash value for the SET_SRC. */ |
4659 | unsigned src_hash; | |
4660 | /* Hash value for the SET_DEST. */ | |
4661 | unsigned dest_hash; | |
7afe21cc RK |
4662 | /* The SET_DEST, with SUBREG, etc., stripped. */ |
4663 | rtx inner_dest; | |
278a83b2 | 4664 | /* Nonzero if the SET_SRC is in memory. */ |
7afe21cc | 4665 | char src_in_memory; |
7afe21cc RK |
4666 | /* Nonzero if the SET_SRC contains something |
4667 | whose value cannot be predicted and understood. */ | |
4668 | char src_volatile; | |
4669 | /* Original machine mode, in case it becomes a CONST_INT. */ | |
4670 | enum machine_mode mode; | |
4671 | /* A constant equivalent for SET_SRC, if any. */ | |
4672 | rtx src_const; | |
47841d1b JJ |
4673 | /* Original SET_SRC value used for libcall notes. */ |
4674 | rtx orig_src; | |
2197a88a RK |
4675 | /* Hash value of constant equivalent for SET_SRC. */ |
4676 | unsigned src_const_hash; | |
7afe21cc RK |
4677 | /* Table entry for constant equivalent for SET_SRC, if any. */ |
4678 | struct table_elt *src_const_elt; | |
4679 | }; | |
4680 | ||
4681 | static void | |
7bd8b2a8 | 4682 | cse_insn (insn, libcall_insn) |
7afe21cc | 4683 | rtx insn; |
7bd8b2a8 | 4684 | rtx libcall_insn; |
7afe21cc RK |
4685 | { |
4686 | register rtx x = PATTERN (insn); | |
7afe21cc | 4687 | register int i; |
92f9aa51 | 4688 | rtx tem; |
7afe21cc RK |
4689 | register int n_sets = 0; |
4690 | ||
2d8b0f3a | 4691 | #ifdef HAVE_cc0 |
7afe21cc RK |
4692 | /* Records what this insn does to set CC0. */ |
4693 | rtx this_insn_cc0 = 0; | |
135d84b8 | 4694 | enum machine_mode this_insn_cc0_mode = VOIDmode; |
2d8b0f3a | 4695 | #endif |
7afe21cc RK |
4696 | |
4697 | rtx src_eqv = 0; | |
4698 | struct table_elt *src_eqv_elt = 0; | |
6a651371 KG |
4699 | int src_eqv_volatile = 0; |
4700 | int src_eqv_in_memory = 0; | |
6a651371 | 4701 | unsigned src_eqv_hash = 0; |
7afe21cc | 4702 | |
dd1bd863 | 4703 | struct set *sets = (struct set *) NULL_PTR; |
7afe21cc RK |
4704 | |
4705 | this_insn = insn; | |
7afe21cc RK |
4706 | |
4707 | /* Find all the SETs and CLOBBERs in this instruction. | |
4708 | Record all the SETs in the array `set' and count them. | |
4709 | Also determine whether there is a CLOBBER that invalidates | |
4710 | all memory references, or all references at varying addresses. */ | |
4711 | ||
f1e7c95f RK |
4712 | if (GET_CODE (insn) == CALL_INSN) |
4713 | { | |
4714 | for (tem = CALL_INSN_FUNCTION_USAGE (insn); tem; tem = XEXP (tem, 1)) | |
4715 | if (GET_CODE (XEXP (tem, 0)) == CLOBBER) | |
278a83b2 | 4716 | invalidate (SET_DEST (XEXP (tem, 0)), VOIDmode); |
f1e7c95f RK |
4717 | } |
4718 | ||
7afe21cc RK |
4719 | if (GET_CODE (x) == SET) |
4720 | { | |
4721 | sets = (struct set *) alloca (sizeof (struct set)); | |
4722 | sets[0].rtl = x; | |
4723 | ||
4724 | /* Ignore SETs that are unconditional jumps. | |
4725 | They never need cse processing, so this does not hurt. | |
4726 | The reason is not efficiency but rather | |
4727 | so that we can test at the end for instructions | |
4728 | that have been simplified to unconditional jumps | |
4729 | and not be misled by unchanged instructions | |
4730 | that were unconditional jumps to begin with. */ | |
4731 | if (SET_DEST (x) == pc_rtx | |
4732 | && GET_CODE (SET_SRC (x)) == LABEL_REF) | |
4733 | ; | |
4734 | ||
4735 | /* Don't count call-insns, (set (reg 0) (call ...)), as a set. | |
4736 | The hard function value register is used only once, to copy to | |
4737 | someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)! | |
4738 | Ensure we invalidate the destination register. On the 80386 no | |
7722328e | 4739 | other code would invalidate it since it is a fixed_reg. |
0f41302f | 4740 | We need not check the return of apply_change_group; see canon_reg. */ |
7afe21cc RK |
4741 | |
4742 | else if (GET_CODE (SET_SRC (x)) == CALL) | |
4743 | { | |
4744 | canon_reg (SET_SRC (x), insn); | |
77fa0940 | 4745 | apply_change_group (); |
7afe21cc | 4746 | fold_rtx (SET_SRC (x), insn); |
bb4034b3 | 4747 | invalidate (SET_DEST (x), VOIDmode); |
7afe21cc RK |
4748 | } |
4749 | else | |
4750 | n_sets = 1; | |
4751 | } | |
4752 | else if (GET_CODE (x) == PARALLEL) | |
4753 | { | |
4754 | register int lim = XVECLEN (x, 0); | |
4755 | ||
4756 | sets = (struct set *) alloca (lim * sizeof (struct set)); | |
4757 | ||
4758 | /* Find all regs explicitly clobbered in this insn, | |
4759 | and ensure they are not replaced with any other regs | |
4760 | elsewhere in this insn. | |
4761 | When a reg that is clobbered is also used for input, | |
4762 | we should presume that that is for a reason, | |
4763 | and we should not substitute some other register | |
4764 | which is not supposed to be clobbered. | |
4765 | Therefore, this loop cannot be merged into the one below | |
830a38ee | 4766 | because a CALL may precede a CLOBBER and refer to the |
7afe21cc RK |
4767 | value clobbered. We must not let a canonicalization do |
4768 | anything in that case. */ | |
4769 | for (i = 0; i < lim; i++) | |
4770 | { | |
4771 | register rtx y = XVECEXP (x, 0, i); | |
2708da92 RS |
4772 | if (GET_CODE (y) == CLOBBER) |
4773 | { | |
4774 | rtx clobbered = XEXP (y, 0); | |
4775 | ||
4776 | if (GET_CODE (clobbered) == REG | |
4777 | || GET_CODE (clobbered) == SUBREG) | |
bb4034b3 | 4778 | invalidate (clobbered, VOIDmode); |
2708da92 RS |
4779 | else if (GET_CODE (clobbered) == STRICT_LOW_PART |
4780 | || GET_CODE (clobbered) == ZERO_EXTRACT) | |
bb4034b3 | 4781 | invalidate (XEXP (clobbered, 0), GET_MODE (clobbered)); |
2708da92 | 4782 | } |
7afe21cc | 4783 | } |
278a83b2 | 4784 | |
7afe21cc RK |
4785 | for (i = 0; i < lim; i++) |
4786 | { | |
4787 | register rtx y = XVECEXP (x, 0, i); | |
4788 | if (GET_CODE (y) == SET) | |
4789 | { | |
7722328e RK |
4790 | /* As above, we ignore unconditional jumps and call-insns and |
4791 | ignore the result of apply_change_group. */ | |
7afe21cc RK |
4792 | if (GET_CODE (SET_SRC (y)) == CALL) |
4793 | { | |
4794 | canon_reg (SET_SRC (y), insn); | |
77fa0940 | 4795 | apply_change_group (); |
7afe21cc | 4796 | fold_rtx (SET_SRC (y), insn); |
bb4034b3 | 4797 | invalidate (SET_DEST (y), VOIDmode); |
7afe21cc RK |
4798 | } |
4799 | else if (SET_DEST (y) == pc_rtx | |
4800 | && GET_CODE (SET_SRC (y)) == LABEL_REF) | |
4801 | ; | |
4802 | else | |
4803 | sets[n_sets++].rtl = y; | |
4804 | } | |
4805 | else if (GET_CODE (y) == CLOBBER) | |
4806 | { | |
9ae8ffe7 | 4807 | /* If we clobber memory, canon the address. |
7afe21cc RK |
4808 | This does nothing when a register is clobbered |
4809 | because we have already invalidated the reg. */ | |
4810 | if (GET_CODE (XEXP (y, 0)) == MEM) | |
9ae8ffe7 | 4811 | canon_reg (XEXP (y, 0), NULL_RTX); |
7afe21cc RK |
4812 | } |
4813 | else if (GET_CODE (y) == USE | |
4814 | && ! (GET_CODE (XEXP (y, 0)) == REG | |
4815 | && REGNO (XEXP (y, 0)) < FIRST_PSEUDO_REGISTER)) | |
906c4e36 | 4816 | canon_reg (y, NULL_RTX); |
7afe21cc RK |
4817 | else if (GET_CODE (y) == CALL) |
4818 | { | |
7722328e RK |
4819 | /* The result of apply_change_group can be ignored; see |
4820 | canon_reg. */ | |
7afe21cc | 4821 | canon_reg (y, insn); |
77fa0940 | 4822 | apply_change_group (); |
7afe21cc RK |
4823 | fold_rtx (y, insn); |
4824 | } | |
4825 | } | |
4826 | } | |
4827 | else if (GET_CODE (x) == CLOBBER) | |
4828 | { | |
4829 | if (GET_CODE (XEXP (x, 0)) == MEM) | |
9ae8ffe7 | 4830 | canon_reg (XEXP (x, 0), NULL_RTX); |
7afe21cc RK |
4831 | } |
4832 | ||
4833 | /* Canonicalize a USE of a pseudo register or memory location. */ | |
4834 | else if (GET_CODE (x) == USE | |
4835 | && ! (GET_CODE (XEXP (x, 0)) == REG | |
4836 | && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)) | |
906c4e36 | 4837 | canon_reg (XEXP (x, 0), NULL_RTX); |
7afe21cc RK |
4838 | else if (GET_CODE (x) == CALL) |
4839 | { | |
7722328e | 4840 | /* The result of apply_change_group can be ignored; see canon_reg. */ |
7afe21cc | 4841 | canon_reg (x, insn); |
77fa0940 | 4842 | apply_change_group (); |
7afe21cc RK |
4843 | fold_rtx (x, insn); |
4844 | } | |
4845 | ||
7b3ab05e JW |
4846 | /* Store the equivalent value in SRC_EQV, if different, or if the DEST |
4847 | is a STRICT_LOW_PART. The latter condition is necessary because SRC_EQV | |
4848 | is handled specially for this case, and if it isn't set, then there will | |
9faa82d8 | 4849 | be no equivalence for the destination. */ |
92f9aa51 RK |
4850 | if (n_sets == 1 && REG_NOTES (insn) != 0 |
4851 | && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0 | |
7b3ab05e JW |
4852 | && (! rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl)) |
4853 | || GET_CODE (SET_DEST (sets[0].rtl)) == STRICT_LOW_PART)) | |
92f9aa51 | 4854 | src_eqv = canon_reg (XEXP (tem, 0), NULL_RTX); |
7afe21cc RK |
4855 | |
4856 | /* Canonicalize sources and addresses of destinations. | |
4857 | We do this in a separate pass to avoid problems when a MATCH_DUP is | |
4858 | present in the insn pattern. In that case, we want to ensure that | |
4859 | we don't break the duplicate nature of the pattern. So we will replace | |
4860 | both operands at the same time. Otherwise, we would fail to find an | |
4861 | equivalent substitution in the loop calling validate_change below. | |
7afe21cc RK |
4862 | |
4863 | We used to suppress canonicalization of DEST if it appears in SRC, | |
77fa0940 | 4864 | but we don't do this any more. */ |
7afe21cc RK |
4865 | |
4866 | for (i = 0; i < n_sets; i++) | |
4867 | { | |
4868 | rtx dest = SET_DEST (sets[i].rtl); | |
4869 | rtx src = SET_SRC (sets[i].rtl); | |
4870 | rtx new = canon_reg (src, insn); | |
58873255 | 4871 | int insn_code; |
7afe21cc | 4872 | |
47841d1b | 4873 | sets[i].orig_src = src; |
77fa0940 RK |
4874 | if ((GET_CODE (new) == REG && GET_CODE (src) == REG |
4875 | && ((REGNO (new) < FIRST_PSEUDO_REGISTER) | |
4876 | != (REGNO (src) < FIRST_PSEUDO_REGISTER))) | |
58873255 | 4877 | || (insn_code = recog_memoized (insn)) < 0 |
a995e389 | 4878 | || insn_data[insn_code].n_dups > 0) |
77fa0940 | 4879 | validate_change (insn, &SET_SRC (sets[i].rtl), new, 1); |
7afe21cc RK |
4880 | else |
4881 | SET_SRC (sets[i].rtl) = new; | |
4882 | ||
4883 | if (GET_CODE (dest) == ZERO_EXTRACT || GET_CODE (dest) == SIGN_EXTRACT) | |
4884 | { | |
4885 | validate_change (insn, &XEXP (dest, 1), | |
77fa0940 | 4886 | canon_reg (XEXP (dest, 1), insn), 1); |
7afe21cc | 4887 | validate_change (insn, &XEXP (dest, 2), |
77fa0940 | 4888 | canon_reg (XEXP (dest, 2), insn), 1); |
7afe21cc RK |
4889 | } |
4890 | ||
4891 | while (GET_CODE (dest) == SUBREG || GET_CODE (dest) == STRICT_LOW_PART | |
4892 | || GET_CODE (dest) == ZERO_EXTRACT | |
4893 | || GET_CODE (dest) == SIGN_EXTRACT) | |
4894 | dest = XEXP (dest, 0); | |
4895 | ||
4896 | if (GET_CODE (dest) == MEM) | |
4897 | canon_reg (dest, insn); | |
4898 | } | |
4899 | ||
77fa0940 RK |
4900 | /* Now that we have done all the replacements, we can apply the change |
4901 | group and see if they all work. Note that this will cause some | |
4902 | canonicalizations that would have worked individually not to be applied | |
4903 | because some other canonicalization didn't work, but this should not | |
278a83b2 | 4904 | occur often. |
7722328e RK |
4905 | |
4906 | The result of apply_change_group can be ignored; see canon_reg. */ | |
77fa0940 RK |
4907 | |
4908 | apply_change_group (); | |
4909 | ||
7afe21cc RK |
4910 | /* Set sets[i].src_elt to the class each source belongs to. |
4911 | Detect assignments from or to volatile things | |
4912 | and set set[i] to zero so they will be ignored | |
4913 | in the rest of this function. | |
4914 | ||
4915 | Nothing in this loop changes the hash table or the register chains. */ | |
4916 | ||
4917 | for (i = 0; i < n_sets; i++) | |
4918 | { | |
4919 | register rtx src, dest; | |
4920 | register rtx src_folded; | |
4921 | register struct table_elt *elt = 0, *p; | |
4922 | enum machine_mode mode; | |
4923 | rtx src_eqv_here; | |
4924 | rtx src_const = 0; | |
4925 | rtx src_related = 0; | |
4926 | struct table_elt *src_const_elt = 0; | |
f1c1dfc3 BS |
4927 | int src_cost = MAX_COST, src_eqv_cost = MAX_COST, src_folded_cost = MAX_COST; |
4928 | int src_related_cost = MAX_COST, src_elt_cost = MAX_COST; | |
630c79be BS |
4929 | int src_regcost, src_eqv_regcost, src_folded_regcost; |
4930 | int src_related_regcost, src_elt_regcost; | |
7afe21cc RK |
4931 | /* Set non-zero if we need to call force_const_mem on with the |
4932 | contents of src_folded before using it. */ | |
4933 | int src_folded_force_flag = 0; | |
4934 | ||
4935 | dest = SET_DEST (sets[i].rtl); | |
4936 | src = SET_SRC (sets[i].rtl); | |
4937 | ||
4938 | /* If SRC is a constant that has no machine mode, | |
4939 | hash it with the destination's machine mode. | |
4940 | This way we can keep different modes separate. */ | |
4941 | ||
4942 | mode = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src); | |
4943 | sets[i].mode = mode; | |
4944 | ||
4945 | if (src_eqv) | |
4946 | { | |
4947 | enum machine_mode eqvmode = mode; | |
4948 | if (GET_CODE (dest) == STRICT_LOW_PART) | |
4949 | eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0))); | |
4950 | do_not_record = 0; | |
4951 | hash_arg_in_memory = 0; | |
7afe21cc | 4952 | src_eqv = fold_rtx (src_eqv, insn); |
2197a88a | 4953 | src_eqv_hash = HASH (src_eqv, eqvmode); |
7afe21cc RK |
4954 | |
4955 | /* Find the equivalence class for the equivalent expression. */ | |
4956 | ||
4957 | if (!do_not_record) | |
2197a88a | 4958 | src_eqv_elt = lookup (src_eqv, src_eqv_hash, eqvmode); |
7afe21cc RK |
4959 | |
4960 | src_eqv_volatile = do_not_record; | |
4961 | src_eqv_in_memory = hash_arg_in_memory; | |
7afe21cc RK |
4962 | } |
4963 | ||
4964 | /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the | |
4965 | value of the INNER register, not the destination. So it is not | |
3826a3da | 4966 | a valid substitution for the source. But save it for later. */ |
7afe21cc RK |
4967 | if (GET_CODE (dest) == STRICT_LOW_PART) |
4968 | src_eqv_here = 0; | |
4969 | else | |
4970 | src_eqv_here = src_eqv; | |
4971 | ||
4972 | /* Simplify and foldable subexpressions in SRC. Then get the fully- | |
4973 | simplified result, which may not necessarily be valid. */ | |
4974 | src_folded = fold_rtx (src, insn); | |
4975 | ||
e6a125a0 RK |
4976 | #if 0 |
4977 | /* ??? This caused bad code to be generated for the m68k port with -O2. | |
4978 | Suppose src is (CONST_INT -1), and that after truncation src_folded | |
4979 | is (CONST_INT 3). Suppose src_folded is then used for src_const. | |
4980 | At the end we will add src and src_const to the same equivalence | |
4981 | class. We now have 3 and -1 on the same equivalence class. This | |
4982 | causes later instructions to be mis-optimized. */ | |
7afe21cc RK |
4983 | /* If storing a constant in a bitfield, pre-truncate the constant |
4984 | so we will be able to record it later. */ | |
4985 | if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT | |
4986 | || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT) | |
4987 | { | |
4988 | rtx width = XEXP (SET_DEST (sets[i].rtl), 1); | |
4989 | ||
4990 | if (GET_CODE (src) == CONST_INT | |
4991 | && GET_CODE (width) == CONST_INT | |
906c4e36 RK |
4992 | && INTVAL (width) < HOST_BITS_PER_WIDE_INT |
4993 | && (INTVAL (src) & ((HOST_WIDE_INT) (-1) << INTVAL (width)))) | |
4994 | src_folded | |
4995 | = GEN_INT (INTVAL (src) & (((HOST_WIDE_INT) 1 | |
4996 | << INTVAL (width)) - 1)); | |
7afe21cc | 4997 | } |
e6a125a0 | 4998 | #endif |
7afe21cc RK |
4999 | |
5000 | /* Compute SRC's hash code, and also notice if it | |
5001 | should not be recorded at all. In that case, | |
5002 | prevent any further processing of this assignment. */ | |
5003 | do_not_record = 0; | |
5004 | hash_arg_in_memory = 0; | |
7afe21cc RK |
5005 | |
5006 | sets[i].src = src; | |
2197a88a | 5007 | sets[i].src_hash = HASH (src, mode); |
7afe21cc RK |
5008 | sets[i].src_volatile = do_not_record; |
5009 | sets[i].src_in_memory = hash_arg_in_memory; | |
7afe21cc | 5010 | |
50196afa RK |
5011 | /* If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is |
5012 | a pseudo that is set more than once, do not record SRC. Using | |
5013 | SRC as a replacement for anything else will be incorrect in that | |
5014 | situation. Note that this usually occurs only for stack slots, | |
956d6950 | 5015 | in which case all the RTL would be referring to SRC, so we don't |
50196afa RK |
5016 | lose any optimization opportunities by not having SRC in the |
5017 | hash table. */ | |
5018 | ||
5019 | if (GET_CODE (src) == MEM | |
5020 | && find_reg_note (insn, REG_EQUIV, src) != 0 | |
5021 | && GET_CODE (dest) == REG | |
5022 | && REGNO (dest) >= FIRST_PSEUDO_REGISTER | |
b1f21e0a | 5023 | && REG_N_SETS (REGNO (dest)) != 1) |
50196afa RK |
5024 | sets[i].src_volatile = 1; |
5025 | ||
0dadecf6 RK |
5026 | #if 0 |
5027 | /* It is no longer clear why we used to do this, but it doesn't | |
5028 | appear to still be needed. So let's try without it since this | |
5029 | code hurts cse'ing widened ops. */ | |
7afe21cc RK |
5030 | /* If source is a perverse subreg (such as QI treated as an SI), |
5031 | treat it as volatile. It may do the work of an SI in one context | |
5032 | where the extra bits are not being used, but cannot replace an SI | |
5033 | in general. */ | |
5034 | if (GET_CODE (src) == SUBREG | |
5035 | && (GET_MODE_SIZE (GET_MODE (src)) | |
5036 | > GET_MODE_SIZE (GET_MODE (SUBREG_REG (src))))) | |
5037 | sets[i].src_volatile = 1; | |
0dadecf6 | 5038 | #endif |
7afe21cc RK |
5039 | |
5040 | /* Locate all possible equivalent forms for SRC. Try to replace | |
5041 | SRC in the insn with each cheaper equivalent. | |
5042 | ||
5043 | We have the following types of equivalents: SRC itself, a folded | |
5044 | version, a value given in a REG_EQUAL note, or a value related | |
5045 | to a constant. | |
5046 | ||
5047 | Each of these equivalents may be part of an additional class | |
5048 | of equivalents (if more than one is in the table, they must be in | |
5049 | the same class; we check for this). | |
5050 | ||
5051 | If the source is volatile, we don't do any table lookups. | |
5052 | ||
5053 | We note any constant equivalent for possible later use in a | |
5054 | REG_NOTE. */ | |
5055 | ||
5056 | if (!sets[i].src_volatile) | |
2197a88a | 5057 | elt = lookup (src, sets[i].src_hash, mode); |
7afe21cc RK |
5058 | |
5059 | sets[i].src_elt = elt; | |
5060 | ||
5061 | if (elt && src_eqv_here && src_eqv_elt) | |
278a83b2 KH |
5062 | { |
5063 | if (elt->first_same_value != src_eqv_elt->first_same_value) | |
7afe21cc RK |
5064 | { |
5065 | /* The REG_EQUAL is indicating that two formerly distinct | |
5066 | classes are now equivalent. So merge them. */ | |
5067 | merge_equiv_classes (elt, src_eqv_elt); | |
2197a88a RK |
5068 | src_eqv_hash = HASH (src_eqv, elt->mode); |
5069 | src_eqv_elt = lookup (src_eqv, src_eqv_hash, elt->mode); | |
7afe21cc RK |
5070 | } |
5071 | ||
278a83b2 KH |
5072 | src_eqv_here = 0; |
5073 | } | |
7afe21cc RK |
5074 | |
5075 | else if (src_eqv_elt) | |
278a83b2 | 5076 | elt = src_eqv_elt; |
7afe21cc RK |
5077 | |
5078 | /* Try to find a constant somewhere and record it in `src_const'. | |
5079 | Record its table element, if any, in `src_const_elt'. Look in | |
5080 | any known equivalences first. (If the constant is not in the | |
2197a88a | 5081 | table, also set `sets[i].src_const_hash'). */ |
7afe21cc | 5082 | if (elt) |
278a83b2 | 5083 | for (p = elt->first_same_value; p; p = p->next_same_value) |
7afe21cc RK |
5084 | if (p->is_const) |
5085 | { | |
5086 | src_const = p->exp; | |
5087 | src_const_elt = elt; | |
5088 | break; | |
5089 | } | |
5090 | ||
5091 | if (src_const == 0 | |
5092 | && (CONSTANT_P (src_folded) | |
278a83b2 | 5093 | /* Consider (minus (label_ref L1) (label_ref L2)) as |
7afe21cc RK |
5094 | "constant" here so we will record it. This allows us |
5095 | to fold switch statements when an ADDR_DIFF_VEC is used. */ | |
5096 | || (GET_CODE (src_folded) == MINUS | |
5097 | && GET_CODE (XEXP (src_folded, 0)) == LABEL_REF | |
5098 | && GET_CODE (XEXP (src_folded, 1)) == LABEL_REF))) | |
5099 | src_const = src_folded, src_const_elt = elt; | |
5100 | else if (src_const == 0 && src_eqv_here && CONSTANT_P (src_eqv_here)) | |
5101 | src_const = src_eqv_here, src_const_elt = src_eqv_elt; | |
5102 | ||
5103 | /* If we don't know if the constant is in the table, get its | |
5104 | hash code and look it up. */ | |
5105 | if (src_const && src_const_elt == 0) | |
5106 | { | |
2197a88a RK |
5107 | sets[i].src_const_hash = HASH (src_const, mode); |
5108 | src_const_elt = lookup (src_const, sets[i].src_const_hash, mode); | |
7afe21cc RK |
5109 | } |
5110 | ||
5111 | sets[i].src_const = src_const; | |
5112 | sets[i].src_const_elt = src_const_elt; | |
5113 | ||
5114 | /* If the constant and our source are both in the table, mark them as | |
5115 | equivalent. Otherwise, if a constant is in the table but the source | |
5116 | isn't, set ELT to it. */ | |
5117 | if (src_const_elt && elt | |
5118 | && src_const_elt->first_same_value != elt->first_same_value) | |
5119 | merge_equiv_classes (elt, src_const_elt); | |
5120 | else if (src_const_elt && elt == 0) | |
5121 | elt = src_const_elt; | |
5122 | ||
5123 | /* See if there is a register linearly related to a constant | |
5124 | equivalent of SRC. */ | |
5125 | if (src_const | |
5126 | && (GET_CODE (src_const) == CONST | |
5127 | || (src_const_elt && src_const_elt->related_value != 0))) | |
278a83b2 KH |
5128 | { |
5129 | src_related = use_related_value (src_const, src_const_elt); | |
5130 | if (src_related) | |
5131 | { | |
7afe21cc | 5132 | struct table_elt *src_related_elt |
278a83b2 | 5133 | = lookup (src_related, HASH (src_related, mode), mode); |
7afe21cc | 5134 | if (src_related_elt && elt) |
278a83b2 | 5135 | { |
7afe21cc RK |
5136 | if (elt->first_same_value |
5137 | != src_related_elt->first_same_value) | |
278a83b2 | 5138 | /* This can occur when we previously saw a CONST |
7afe21cc RK |
5139 | involving a SYMBOL_REF and then see the SYMBOL_REF |
5140 | twice. Merge the involved classes. */ | |
5141 | merge_equiv_classes (elt, src_related_elt); | |
5142 | ||
278a83b2 | 5143 | src_related = 0; |
7afe21cc | 5144 | src_related_elt = 0; |
278a83b2 KH |
5145 | } |
5146 | else if (src_related_elt && elt == 0) | |
5147 | elt = src_related_elt; | |
7afe21cc | 5148 | } |
278a83b2 | 5149 | } |
7afe21cc | 5150 | |
e4600702 RK |
5151 | /* See if we have a CONST_INT that is already in a register in a |
5152 | wider mode. */ | |
5153 | ||
5154 | if (src_const && src_related == 0 && GET_CODE (src_const) == CONST_INT | |
5155 | && GET_MODE_CLASS (mode) == MODE_INT | |
5156 | && GET_MODE_BITSIZE (mode) < BITS_PER_WORD) | |
5157 | { | |
5158 | enum machine_mode wider_mode; | |
5159 | ||
5160 | for (wider_mode = GET_MODE_WIDER_MODE (mode); | |
5161 | GET_MODE_BITSIZE (wider_mode) <= BITS_PER_WORD | |
5162 | && src_related == 0; | |
5163 | wider_mode = GET_MODE_WIDER_MODE (wider_mode)) | |
5164 | { | |
5165 | struct table_elt *const_elt | |
5166 | = lookup (src_const, HASH (src_const, wider_mode), wider_mode); | |
5167 | ||
5168 | if (const_elt == 0) | |
5169 | continue; | |
5170 | ||
5171 | for (const_elt = const_elt->first_same_value; | |
5172 | const_elt; const_elt = const_elt->next_same_value) | |
5173 | if (GET_CODE (const_elt->exp) == REG) | |
5174 | { | |
5175 | src_related = gen_lowpart_if_possible (mode, | |
5176 | const_elt->exp); | |
5177 | break; | |
5178 | } | |
5179 | } | |
5180 | } | |
5181 | ||
d45cf215 RS |
5182 | /* Another possibility is that we have an AND with a constant in |
5183 | a mode narrower than a word. If so, it might have been generated | |
5184 | as part of an "if" which would narrow the AND. If we already | |
5185 | have done the AND in a wider mode, we can use a SUBREG of that | |
5186 | value. */ | |
5187 | ||
5188 | if (flag_expensive_optimizations && ! src_related | |
5189 | && GET_CODE (src) == AND && GET_CODE (XEXP (src, 1)) == CONST_INT | |
5190 | && GET_MODE_SIZE (mode) < UNITS_PER_WORD) | |
5191 | { | |
5192 | enum machine_mode tmode; | |
38a448ca | 5193 | rtx new_and = gen_rtx_AND (VOIDmode, NULL_RTX, XEXP (src, 1)); |
d45cf215 RS |
5194 | |
5195 | for (tmode = GET_MODE_WIDER_MODE (mode); | |
5196 | GET_MODE_SIZE (tmode) <= UNITS_PER_WORD; | |
5197 | tmode = GET_MODE_WIDER_MODE (tmode)) | |
5198 | { | |
5199 | rtx inner = gen_lowpart_if_possible (tmode, XEXP (src, 0)); | |
5200 | struct table_elt *larger_elt; | |
5201 | ||
5202 | if (inner) | |
5203 | { | |
5204 | PUT_MODE (new_and, tmode); | |
5205 | XEXP (new_and, 0) = inner; | |
5206 | larger_elt = lookup (new_and, HASH (new_and, tmode), tmode); | |
5207 | if (larger_elt == 0) | |
5208 | continue; | |
5209 | ||
5210 | for (larger_elt = larger_elt->first_same_value; | |
5211 | larger_elt; larger_elt = larger_elt->next_same_value) | |
5212 | if (GET_CODE (larger_elt->exp) == REG) | |
5213 | { | |
5214 | src_related | |
5215 | = gen_lowpart_if_possible (mode, larger_elt->exp); | |
5216 | break; | |
5217 | } | |
5218 | ||
5219 | if (src_related) | |
5220 | break; | |
5221 | } | |
5222 | } | |
5223 | } | |
7bac1be0 RK |
5224 | |
5225 | #ifdef LOAD_EXTEND_OP | |
5226 | /* See if a MEM has already been loaded with a widening operation; | |
5227 | if it has, we can use a subreg of that. Many CISC machines | |
5228 | also have such operations, but this is only likely to be | |
5229 | beneficial these machines. */ | |
278a83b2 | 5230 | |
ddc356e8 | 5231 | if (flag_expensive_optimizations && src_related == 0 |
7bac1be0 RK |
5232 | && (GET_MODE_SIZE (mode) < UNITS_PER_WORD) |
5233 | && GET_MODE_CLASS (mode) == MODE_INT | |
5234 | && GET_CODE (src) == MEM && ! do_not_record | |
5235 | && LOAD_EXTEND_OP (mode) != NIL) | |
5236 | { | |
5237 | enum machine_mode tmode; | |
278a83b2 | 5238 | |
7bac1be0 RK |
5239 | /* Set what we are trying to extend and the operation it might |
5240 | have been extended with. */ | |
5241 | PUT_CODE (memory_extend_rtx, LOAD_EXTEND_OP (mode)); | |
5242 | XEXP (memory_extend_rtx, 0) = src; | |
278a83b2 | 5243 | |
7bac1be0 RK |
5244 | for (tmode = GET_MODE_WIDER_MODE (mode); |
5245 | GET_MODE_SIZE (tmode) <= UNITS_PER_WORD; | |
5246 | tmode = GET_MODE_WIDER_MODE (tmode)) | |
5247 | { | |
5248 | struct table_elt *larger_elt; | |
278a83b2 | 5249 | |
7bac1be0 | 5250 | PUT_MODE (memory_extend_rtx, tmode); |
278a83b2 | 5251 | larger_elt = lookup (memory_extend_rtx, |
7bac1be0 RK |
5252 | HASH (memory_extend_rtx, tmode), tmode); |
5253 | if (larger_elt == 0) | |
5254 | continue; | |
278a83b2 | 5255 | |
7bac1be0 RK |
5256 | for (larger_elt = larger_elt->first_same_value; |
5257 | larger_elt; larger_elt = larger_elt->next_same_value) | |
5258 | if (GET_CODE (larger_elt->exp) == REG) | |
5259 | { | |
278a83b2 | 5260 | src_related = gen_lowpart_if_possible (mode, |
7bac1be0 RK |
5261 | larger_elt->exp); |
5262 | break; | |
5263 | } | |
278a83b2 | 5264 | |
7bac1be0 RK |
5265 | if (src_related) |
5266 | break; | |
5267 | } | |
5268 | } | |
5269 | #endif /* LOAD_EXTEND_OP */ | |
278a83b2 | 5270 | |
7afe21cc | 5271 | if (src == src_folded) |
278a83b2 | 5272 | src_folded = 0; |
7afe21cc RK |
5273 | |
5274 | /* At this point, ELT, if non-zero, points to a class of expressions | |
5275 | equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED, | |
5276 | and SRC_RELATED, if non-zero, each contain additional equivalent | |
5277 | expressions. Prune these latter expressions by deleting expressions | |
5278 | already in the equivalence class. | |
5279 | ||
5280 | Check for an equivalent identical to the destination. If found, | |
5281 | this is the preferred equivalent since it will likely lead to | |
5282 | elimination of the insn. Indicate this by placing it in | |
5283 | `src_related'. */ | |
5284 | ||
278a83b2 KH |
5285 | if (elt) |
5286 | elt = elt->first_same_value; | |
7afe21cc | 5287 | for (p = elt; p; p = p->next_same_value) |
278a83b2 | 5288 | { |
7afe21cc RK |
5289 | enum rtx_code code = GET_CODE (p->exp); |
5290 | ||
5291 | /* If the expression is not valid, ignore it. Then we do not | |
5292 | have to check for validity below. In most cases, we can use | |
5293 | `rtx_equal_p', since canonicalization has already been done. */ | |
5294 | if (code != REG && ! exp_equiv_p (p->exp, p->exp, 1, 0)) | |
5295 | continue; | |
5296 | ||
5a03c8c4 RK |
5297 | /* Also skip paradoxical subregs, unless that's what we're |
5298 | looking for. */ | |
5299 | if (code == SUBREG | |
5300 | && (GET_MODE_SIZE (GET_MODE (p->exp)) | |
5301 | > GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp)))) | |
5302 | && ! (src != 0 | |
5303 | && GET_CODE (src) == SUBREG | |
5304 | && GET_MODE (src) == GET_MODE (p->exp) | |
5305 | && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src))) | |
5306 | < GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp)))))) | |
5307 | continue; | |
5308 | ||
278a83b2 | 5309 | if (src && GET_CODE (src) == code && rtx_equal_p (src, p->exp)) |
7afe21cc | 5310 | src = 0; |
278a83b2 | 5311 | else if (src_folded && GET_CODE (src_folded) == code |
7afe21cc RK |
5312 | && rtx_equal_p (src_folded, p->exp)) |
5313 | src_folded = 0; | |
278a83b2 | 5314 | else if (src_eqv_here && GET_CODE (src_eqv_here) == code |
7afe21cc RK |
5315 | && rtx_equal_p (src_eqv_here, p->exp)) |
5316 | src_eqv_here = 0; | |
278a83b2 | 5317 | else if (src_related && GET_CODE (src_related) == code |
7afe21cc RK |
5318 | && rtx_equal_p (src_related, p->exp)) |
5319 | src_related = 0; | |
5320 | ||
5321 | /* This is the same as the destination of the insns, we want | |
5322 | to prefer it. Copy it to src_related. The code below will | |
5323 | then give it a negative cost. */ | |
5324 | if (GET_CODE (dest) == code && rtx_equal_p (p->exp, dest)) | |
5325 | src_related = dest; | |
278a83b2 | 5326 | } |
7afe21cc RK |
5327 | |
5328 | /* Find the cheapest valid equivalent, trying all the available | |
5329 | possibilities. Prefer items not in the hash table to ones | |
5330 | that are when they are equal cost. Note that we can never | |
5331 | worsen an insn as the current contents will also succeed. | |
05c33dd8 | 5332 | If we find an equivalent identical to the destination, use it as best, |
0f41302f | 5333 | since this insn will probably be eliminated in that case. */ |
7afe21cc RK |
5334 | if (src) |
5335 | { | |
5336 | if (rtx_equal_p (src, dest)) | |
f1c1dfc3 | 5337 | src_cost = src_regcost = -1; |
7afe21cc | 5338 | else |
630c79be BS |
5339 | { |
5340 | src_cost = COST (src); | |
5341 | src_regcost = approx_reg_cost (src); | |
5342 | } | |
7afe21cc RK |
5343 | } |
5344 | ||
5345 | if (src_eqv_here) | |
5346 | { | |
5347 | if (rtx_equal_p (src_eqv_here, dest)) | |
f1c1dfc3 | 5348 | src_eqv_cost = src_eqv_regcost = -1; |
7afe21cc | 5349 | else |
630c79be BS |
5350 | { |
5351 | src_eqv_cost = COST (src_eqv_here); | |
5352 | src_eqv_regcost = approx_reg_cost (src_eqv_here); | |
5353 | } | |
7afe21cc RK |
5354 | } |
5355 | ||
5356 | if (src_folded) | |
5357 | { | |
5358 | if (rtx_equal_p (src_folded, dest)) | |
f1c1dfc3 | 5359 | src_folded_cost = src_folded_regcost = -1; |
7afe21cc | 5360 | else |
630c79be BS |
5361 | { |
5362 | src_folded_cost = COST (src_folded); | |
5363 | src_folded_regcost = approx_reg_cost (src_folded); | |
5364 | } | |
7afe21cc RK |
5365 | } |
5366 | ||
5367 | if (src_related) | |
5368 | { | |
5369 | if (rtx_equal_p (src_related, dest)) | |
f1c1dfc3 | 5370 | src_related_cost = src_related_regcost = -1; |
7afe21cc | 5371 | else |
630c79be BS |
5372 | { |
5373 | src_related_cost = COST (src_related); | |
5374 | src_related_regcost = approx_reg_cost (src_related); | |
5375 | } | |
7afe21cc RK |
5376 | } |
5377 | ||
5378 | /* If this was an indirect jump insn, a known label will really be | |
5379 | cheaper even though it looks more expensive. */ | |
5380 | if (dest == pc_rtx && src_const && GET_CODE (src_const) == LABEL_REF) | |
f1c1dfc3 | 5381 | src_folded = src_const, src_folded_cost = src_folded_regcost -1; |
278a83b2 | 5382 | |
7afe21cc RK |
5383 | /* Terminate loop when replacement made. This must terminate since |
5384 | the current contents will be tested and will always be valid. */ | |
5385 | while (1) | |
278a83b2 KH |
5386 | { |
5387 | rtx trial; | |
7afe21cc | 5388 | |
278a83b2 KH |
5389 | /* Skip invalid entries. */ |
5390 | while (elt && GET_CODE (elt->exp) != REG | |
5391 | && ! exp_equiv_p (elt->exp, elt->exp, 1, 0)) | |
5392 | elt = elt->next_same_value; | |
5a03c8c4 RK |
5393 | |
5394 | /* A paradoxical subreg would be bad here: it'll be the right | |
5395 | size, but later may be adjusted so that the upper bits aren't | |
5396 | what we want. So reject it. */ | |
5397 | if (elt != 0 | |
5398 | && GET_CODE (elt->exp) == SUBREG | |
5399 | && (GET_MODE_SIZE (GET_MODE (elt->exp)) | |
5400 | > GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp)))) | |
5401 | /* It is okay, though, if the rtx we're trying to match | |
5402 | will ignore any of the bits we can't predict. */ | |
5403 | && ! (src != 0 | |
5404 | && GET_CODE (src) == SUBREG | |
5405 | && GET_MODE (src) == GET_MODE (elt->exp) | |
5406 | && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src))) | |
5407 | < GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp)))))) | |
5408 | { | |
5409 | elt = elt->next_same_value; | |
5410 | continue; | |
5411 | } | |
278a83b2 | 5412 | |
630c79be BS |
5413 | if (elt) |
5414 | { | |
5415 | src_elt_cost = elt->cost; | |
5416 | src_elt_regcost = elt->regcost; | |
5417 | } | |
7afe21cc | 5418 | |
630c79be | 5419 | /* Find cheapest and skip it for the next time. For items |
7afe21cc RK |
5420 | of equal cost, use this order: |
5421 | src_folded, src, src_eqv, src_related and hash table entry. */ | |
630c79be BS |
5422 | if (preferrable (src_folded_cost, src_folded_regcost, |
5423 | src_cost, src_regcost) <= 0 | |
5424 | && preferrable (src_folded_cost, src_folded_regcost, | |
5425 | src_eqv_cost, src_eqv_regcost) <= 0 | |
5426 | && preferrable (src_folded_cost, src_folded_regcost, | |
5427 | src_related_cost, src_related_regcost) <= 0 | |
5428 | && preferrable (src_folded_cost, src_folded_regcost, | |
5429 | src_elt_cost, src_elt_regcost) <= 0) | |
7afe21cc | 5430 | { |
f1c1dfc3 | 5431 | trial = src_folded, src_folded_cost = MAX_COST; |
7afe21cc RK |
5432 | if (src_folded_force_flag) |
5433 | trial = force_const_mem (mode, trial); | |
5434 | } | |
630c79be BS |
5435 | else if (preferrable (src_cost, src_regcost, |
5436 | src_eqv_cost, src_eqv_regcost) <= 0 | |
5437 | && preferrable (src_cost, src_regcost, | |
5438 | src_related_cost, src_related_regcost) <= 0 | |
5439 | && preferrable (src_cost, src_regcost, | |
5440 | src_elt_cost, src_elt_regcost) <= 0) | |
f1c1dfc3 | 5441 | trial = src, src_cost = MAX_COST; |
630c79be BS |
5442 | else if (preferrable (src_eqv_cost, src_eqv_regcost, |
5443 | src_related_cost, src_related_regcost) <= 0 | |
5444 | && preferrable (src_eqv_cost, src_eqv_regcost, | |
5445 | src_elt_cost, src_elt_regcost) <= 0) | |
f1c1dfc3 | 5446 | trial = copy_rtx (src_eqv_here), src_eqv_cost = MAX_COST; |
630c79be BS |
5447 | else if (preferrable (src_related_cost, src_related_regcost, |
5448 | src_elt_cost, src_elt_regcost) <= 0) | |
f1c1dfc3 | 5449 | trial = copy_rtx (src_related), src_related_cost = MAX_COST; |
278a83b2 | 5450 | else |
7afe21cc | 5451 | { |
05c33dd8 | 5452 | trial = copy_rtx (elt->exp); |
7afe21cc | 5453 | elt = elt->next_same_value; |
f1c1dfc3 | 5454 | src_elt_cost = MAX_COST; |
7afe21cc RK |
5455 | } |
5456 | ||
5457 | /* We don't normally have an insn matching (set (pc) (pc)), so | |
5458 | check for this separately here. We will delete such an | |
5459 | insn below. | |
5460 | ||
5461 | Tablejump insns contain a USE of the table, so simply replacing | |
5462 | the operand with the constant won't match. This is simply an | |
5463 | unconditional branch, however, and is therefore valid. Just | |
5464 | insert the substitution here and we will delete and re-emit | |
5465 | the insn later. */ | |
5466 | ||
5467 | if (n_sets == 1 && dest == pc_rtx | |
5468 | && (trial == pc_rtx | |
5469 | || (GET_CODE (trial) == LABEL_REF | |
5470 | && ! condjump_p (insn)))) | |
5471 | { | |
516ff948 JL |
5472 | if (trial == pc_rtx) |
5473 | { | |
5474 | SET_SRC (sets[i].rtl) = trial; | |
5475 | cse_jumps_altered = 1; | |
5476 | break; | |
5477 | } | |
5478 | ||
4e37e57d RK |
5479 | PATTERN (insn) = gen_jump (XEXP (trial, 0)); |
5480 | INSN_CODE (insn) = -1; | |
369edff1 RH |
5481 | |
5482 | if (NEXT_INSN (insn) != 0 | |
5483 | && GET_CODE (NEXT_INSN (insn)) != BARRIER) | |
5484 | emit_barrier_after (insn); | |
5485 | ||
602c4c0d | 5486 | cse_jumps_altered = 1; |
7afe21cc RK |
5487 | break; |
5488 | } | |
278a83b2 | 5489 | |
7afe21cc | 5490 | /* Look for a substitution that makes a valid insn. */ |
ddc356e8 | 5491 | else if (validate_change (insn, &SET_SRC (sets[i].rtl), trial, 0)) |
05c33dd8 | 5492 | { |
7bd8b2a8 JL |
5493 | /* If we just made a substitution inside a libcall, then we |
5494 | need to make the same substitution in any notes attached | |
5495 | to the RETVAL insn. */ | |
1ed0205e | 5496 | if (libcall_insn |
47841d1b JJ |
5497 | && (GET_CODE (sets[i].orig_src) == REG |
5498 | || GET_CODE (sets[i].orig_src) == SUBREG | |
278a83b2 KH |
5499 | || GET_CODE (sets[i].orig_src) == MEM)) |
5500 | replace_rtx (REG_NOTES (libcall_insn), sets[i].orig_src, | |
7bd8b2a8 JL |
5501 | canon_reg (SET_SRC (sets[i].rtl), insn)); |
5502 | ||
7722328e RK |
5503 | /* The result of apply_change_group can be ignored; see |
5504 | canon_reg. */ | |
5505 | ||
5506 | validate_change (insn, &SET_SRC (sets[i].rtl), | |
5507 | canon_reg (SET_SRC (sets[i].rtl), insn), | |
5508 | 1); | |
6702af89 | 5509 | apply_change_group (); |
05c33dd8 RK |
5510 | break; |
5511 | } | |
7afe21cc | 5512 | |
278a83b2 | 5513 | /* If we previously found constant pool entries for |
7afe21cc RK |
5514 | constants and this is a constant, try making a |
5515 | pool entry. Put it in src_folded unless we already have done | |
5516 | this since that is where it likely came from. */ | |
5517 | ||
5518 | else if (constant_pool_entries_cost | |
5519 | && CONSTANT_P (trial) | |
d51ff7cb JW |
5520 | /* Reject cases that will abort in decode_rtx_const. |
5521 | On the alpha when simplifying a switch, we get | |
5522 | (const (truncate (minus (label_ref) (label_ref)))). */ | |
1bbd065b RK |
5523 | && ! (GET_CODE (trial) == CONST |
5524 | && GET_CODE (XEXP (trial, 0)) == TRUNCATE) | |
d51ff7cb JW |
5525 | /* Likewise on IA-64, except without the truncate. */ |
5526 | && ! (GET_CODE (trial) == CONST | |
5527 | && GET_CODE (XEXP (trial, 0)) == MINUS | |
5528 | && GET_CODE (XEXP (XEXP (trial, 0), 0)) == LABEL_REF | |
5529 | && GET_CODE (XEXP (XEXP (trial, 0), 1)) == LABEL_REF) | |
1bbd065b RK |
5530 | && (src_folded == 0 |
5531 | || (GET_CODE (src_folded) != MEM | |
5532 | && ! src_folded_force_flag)) | |
9ae8ffe7 JL |
5533 | && GET_MODE_CLASS (mode) != MODE_CC |
5534 | && mode != VOIDmode) | |
7afe21cc RK |
5535 | { |
5536 | src_folded_force_flag = 1; | |
5537 | src_folded = trial; | |
5538 | src_folded_cost = constant_pool_entries_cost; | |
5539 | } | |
278a83b2 | 5540 | } |
7afe21cc RK |
5541 | |
5542 | src = SET_SRC (sets[i].rtl); | |
5543 | ||
5544 | /* In general, it is good to have a SET with SET_SRC == SET_DEST. | |
5545 | However, there is an important exception: If both are registers | |
5546 | that are not the head of their equivalence class, replace SET_SRC | |
5547 | with the head of the class. If we do not do this, we will have | |
5548 | both registers live over a portion of the basic block. This way, | |
5549 | their lifetimes will likely abut instead of overlapping. */ | |
5550 | if (GET_CODE (dest) == REG | |
1bb98cec | 5551 | && REGNO_QTY_VALID_P (REGNO (dest))) |
7afe21cc | 5552 | { |
1bb98cec DM |
5553 | int dest_q = REG_QTY (REGNO (dest)); |
5554 | struct qty_table_elem *dest_ent = &qty_table[dest_q]; | |
5555 | ||
5556 | if (dest_ent->mode == GET_MODE (dest) | |
5557 | && dest_ent->first_reg != REGNO (dest) | |
5558 | && GET_CODE (src) == REG && REGNO (src) == REGNO (dest) | |
5559 | /* Don't do this if the original insn had a hard reg as | |
5560 | SET_SRC or SET_DEST. */ | |
5561 | && (GET_CODE (sets[i].src) != REG | |
5562 | || REGNO (sets[i].src) >= FIRST_PSEUDO_REGISTER) | |
5563 | && (GET_CODE (dest) != REG || REGNO (dest) >= FIRST_PSEUDO_REGISTER)) | |
5564 | /* We can't call canon_reg here because it won't do anything if | |
5565 | SRC is a hard register. */ | |
759bd8b7 | 5566 | { |
1bb98cec DM |
5567 | int src_q = REG_QTY (REGNO (src)); |
5568 | struct qty_table_elem *src_ent = &qty_table[src_q]; | |
5569 | int first = src_ent->first_reg; | |
5570 | rtx new_src | |
5571 | = (first >= FIRST_PSEUDO_REGISTER | |
5572 | ? regno_reg_rtx[first] : gen_rtx_REG (GET_MODE (src), first)); | |
5573 | ||
5574 | /* We must use validate-change even for this, because this | |
5575 | might be a special no-op instruction, suitable only to | |
5576 | tag notes onto. */ | |
5577 | if (validate_change (insn, &SET_SRC (sets[i].rtl), new_src, 0)) | |
5578 | { | |
5579 | src = new_src; | |
5580 | /* If we had a constant that is cheaper than what we are now | |
5581 | setting SRC to, use that constant. We ignored it when we | |
5582 | thought we could make this into a no-op. */ | |
5583 | if (src_const && COST (src_const) < COST (src) | |
278a83b2 KH |
5584 | && validate_change (insn, &SET_SRC (sets[i].rtl), |
5585 | src_const, 0)) | |
1bb98cec DM |
5586 | src = src_const; |
5587 | } | |
759bd8b7 | 5588 | } |
7afe21cc RK |
5589 | } |
5590 | ||
5591 | /* If we made a change, recompute SRC values. */ | |
5592 | if (src != sets[i].src) | |
278a83b2 | 5593 | { |
4eadede7 | 5594 | cse_altered = 1; |
278a83b2 KH |
5595 | do_not_record = 0; |
5596 | hash_arg_in_memory = 0; | |
7afe21cc | 5597 | sets[i].src = src; |
278a83b2 KH |
5598 | sets[i].src_hash = HASH (src, mode); |
5599 | sets[i].src_volatile = do_not_record; | |
5600 | sets[i].src_in_memory = hash_arg_in_memory; | |
5601 | sets[i].src_elt = lookup (src, sets[i].src_hash, mode); | |
5602 | } | |
7afe21cc RK |
5603 | |
5604 | /* If this is a single SET, we are setting a register, and we have an | |
5605 | equivalent constant, we want to add a REG_NOTE. We don't want | |
5606 | to write a REG_EQUAL note for a constant pseudo since verifying that | |
d45cf215 | 5607 | that pseudo hasn't been eliminated is a pain. Such a note also |
278a83b2 | 5608 | won't help anything. |
ac7ef8d5 FS |
5609 | |
5610 | Avoid a REG_EQUAL note for (CONST (MINUS (LABEL_REF) (LABEL_REF))) | |
5611 | which can be created for a reference to a compile time computable | |
5612 | entry in a jump table. */ | |
5613 | ||
7afe21cc | 5614 | if (n_sets == 1 && src_const && GET_CODE (dest) == REG |
ac7ef8d5 FS |
5615 | && GET_CODE (src_const) != REG |
5616 | && ! (GET_CODE (src_const) == CONST | |
5617 | && GET_CODE (XEXP (src_const, 0)) == MINUS | |
5618 | && GET_CODE (XEXP (XEXP (src_const, 0), 0)) == LABEL_REF | |
5619 | && GET_CODE (XEXP (XEXP (src_const, 0), 1)) == LABEL_REF)) | |
7afe21cc | 5620 | { |
92f9aa51 | 5621 | tem = find_reg_note (insn, REG_EQUAL, NULL_RTX); |
278a83b2 | 5622 | |
51e2a951 AS |
5623 | /* Make sure that the rtx is not shared with any other insn. */ |
5624 | src_const = copy_rtx (src_const); | |
5625 | ||
7afe21cc RK |
5626 | /* Record the actual constant value in a REG_EQUAL note, making |
5627 | a new one if one does not already exist. */ | |
5628 | if (tem) | |
5629 | XEXP (tem, 0) = src_const; | |
5630 | else | |
38a448ca RH |
5631 | REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_EQUAL, |
5632 | src_const, REG_NOTES (insn)); | |
7afe21cc RK |
5633 | |
5634 | /* If storing a constant value in a register that | |
5635 | previously held the constant value 0, | |
5636 | record this fact with a REG_WAS_0 note on this insn. | |
5637 | ||
5638 | Note that the *register* is required to have previously held 0, | |
5639 | not just any register in the quantity and we must point to the | |
5640 | insn that set that register to zero. | |
5641 | ||
5642 | Rather than track each register individually, we just see if | |
5643 | the last set for this quantity was for this register. */ | |
5644 | ||
1bb98cec | 5645 | if (REGNO_QTY_VALID_P (REGNO (dest))) |
7afe21cc | 5646 | { |
1bb98cec DM |
5647 | int dest_q = REG_QTY (REGNO (dest)); |
5648 | struct qty_table_elem *dest_ent = &qty_table[dest_q]; | |
7afe21cc | 5649 | |
1bb98cec | 5650 | if (dest_ent->const_rtx == const0_rtx) |
7afe21cc | 5651 | { |
1bb98cec DM |
5652 | /* See if we previously had a REG_WAS_0 note. */ |
5653 | rtx note = find_reg_note (insn, REG_WAS_0, NULL_RTX); | |
5654 | rtx const_insn = dest_ent->const_insn; | |
5655 | ||
5656 | if ((tem = single_set (const_insn)) != 0 | |
5657 | && rtx_equal_p (SET_DEST (tem), dest)) | |
5658 | { | |
5659 | if (note) | |
5660 | XEXP (note, 0) = const_insn; | |
5661 | else | |
5662 | REG_NOTES (insn) | |
5663 | = gen_rtx_INSN_LIST (REG_WAS_0, const_insn, | |
5664 | REG_NOTES (insn)); | |
5665 | } | |
7afe21cc RK |
5666 | } |
5667 | } | |
5668 | } | |
5669 | ||
5670 | /* Now deal with the destination. */ | |
5671 | do_not_record = 0; | |
7afe21cc RK |
5672 | |
5673 | /* Look within any SIGN_EXTRACT or ZERO_EXTRACT | |
5674 | to the MEM or REG within it. */ | |
5675 | while (GET_CODE (dest) == SIGN_EXTRACT | |
5676 | || GET_CODE (dest) == ZERO_EXTRACT | |
5677 | || GET_CODE (dest) == SUBREG | |
5678 | || GET_CODE (dest) == STRICT_LOW_PART) | |
0339ce7e | 5679 | dest = XEXP (dest, 0); |
7afe21cc RK |
5680 | |
5681 | sets[i].inner_dest = dest; | |
5682 | ||
5683 | if (GET_CODE (dest) == MEM) | |
5684 | { | |
9ae8ffe7 JL |
5685 | #ifdef PUSH_ROUNDING |
5686 | /* Stack pushes invalidate the stack pointer. */ | |
5687 | rtx addr = XEXP (dest, 0); | |
4b983fdc | 5688 | if (GET_RTX_CLASS (GET_CODE (addr)) == 'a' |
9ae8ffe7 JL |
5689 | && XEXP (addr, 0) == stack_pointer_rtx) |
5690 | invalidate (stack_pointer_rtx, Pmode); | |
5691 | #endif | |
7afe21cc | 5692 | dest = fold_rtx (dest, insn); |
7afe21cc RK |
5693 | } |
5694 | ||
5695 | /* Compute the hash code of the destination now, | |
5696 | before the effects of this instruction are recorded, | |
5697 | since the register values used in the address computation | |
5698 | are those before this instruction. */ | |
2197a88a | 5699 | sets[i].dest_hash = HASH (dest, mode); |
7afe21cc RK |
5700 | |
5701 | /* Don't enter a bit-field in the hash table | |
5702 | because the value in it after the store | |
5703 | may not equal what was stored, due to truncation. */ | |
5704 | ||
5705 | if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT | |
5706 | || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT) | |
5707 | { | |
5708 | rtx width = XEXP (SET_DEST (sets[i].rtl), 1); | |
5709 | ||
5710 | if (src_const != 0 && GET_CODE (src_const) == CONST_INT | |
5711 | && GET_CODE (width) == CONST_INT | |
906c4e36 RK |
5712 | && INTVAL (width) < HOST_BITS_PER_WIDE_INT |
5713 | && ! (INTVAL (src_const) | |
5714 | & ((HOST_WIDE_INT) (-1) << INTVAL (width)))) | |
7afe21cc RK |
5715 | /* Exception: if the value is constant, |
5716 | and it won't be truncated, record it. */ | |
5717 | ; | |
5718 | else | |
5719 | { | |
5720 | /* This is chosen so that the destination will be invalidated | |
5721 | but no new value will be recorded. | |
5722 | We must invalidate because sometimes constant | |
5723 | values can be recorded for bitfields. */ | |
5724 | sets[i].src_elt = 0; | |
5725 | sets[i].src_volatile = 1; | |
5726 | src_eqv = 0; | |
5727 | src_eqv_elt = 0; | |
5728 | } | |
5729 | } | |
5730 | ||
5731 | /* If only one set in a JUMP_INSN and it is now a no-op, we can delete | |
5732 | the insn. */ | |
5733 | else if (n_sets == 1 && dest == pc_rtx && src == pc_rtx) | |
5734 | { | |
ef178af3 ZW |
5735 | /* One less use of the label this insn used to jump to. */ |
5736 | if (JUMP_LABEL (insn) != 0) | |
5737 | --LABEL_NUSES (JUMP_LABEL (insn)); | |
7afe21cc RK |
5738 | PUT_CODE (insn, NOTE); |
5739 | NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED; | |
5740 | NOTE_SOURCE_FILE (insn) = 0; | |
5741 | cse_jumps_altered = 1; | |
7afe21cc RK |
5742 | /* No more processing for this set. */ |
5743 | sets[i].rtl = 0; | |
5744 | } | |
5745 | ||
5746 | /* If this SET is now setting PC to a label, we know it used to | |
5747 | be a conditional or computed branch. So we see if we can follow | |
5748 | it. If it was a computed branch, delete it and re-emit. */ | |
5749 | else if (dest == pc_rtx && GET_CODE (src) == LABEL_REF) | |
5750 | { | |
7afe21cc RK |
5751 | /* If this is not in the format for a simple branch and |
5752 | we are the only SET in it, re-emit it. */ | |
5753 | if (! simplejump_p (insn) && n_sets == 1) | |
5754 | { | |
5755 | rtx new = emit_jump_insn_before (gen_jump (XEXP (src, 0)), insn); | |
5756 | JUMP_LABEL (new) = XEXP (src, 0); | |
5757 | LABEL_NUSES (XEXP (src, 0))++; | |
7afe21cc RK |
5758 | insn = new; |
5759 | } | |
31dcf83f RS |
5760 | else |
5761 | /* Otherwise, force rerecognition, since it probably had | |
5762 | a different pattern before. | |
5763 | This shouldn't really be necessary, since whatever | |
5764 | changed the source value above should have done this. | |
5765 | Until the right place is found, might as well do this here. */ | |
5766 | INSN_CODE (insn) = -1; | |
7afe21cc | 5767 | |
312f6255 GK |
5768 | never_reached_warning (insn); |
5769 | ||
e48a7fbe JL |
5770 | /* Now emit a BARRIER after the unconditional jump. Do not bother |
5771 | deleting any unreachable code, let jump/flow do that. */ | |
5772 | if (NEXT_INSN (insn) != 0 | |
5773 | && GET_CODE (NEXT_INSN (insn)) != BARRIER) | |
5774 | emit_barrier_after (insn); | |
7afe21cc RK |
5775 | |
5776 | cse_jumps_altered = 1; | |
5777 | sets[i].rtl = 0; | |
5778 | } | |
5779 | ||
c2a47e48 RK |
5780 | /* If destination is volatile, invalidate it and then do no further |
5781 | processing for this assignment. */ | |
7afe21cc RK |
5782 | |
5783 | else if (do_not_record) | |
c2a47e48 | 5784 | { |
bb07060a | 5785 | if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG) |
bb4034b3 | 5786 | invalidate (dest, VOIDmode); |
bb07060a JW |
5787 | else if (GET_CODE (dest) == MEM) |
5788 | { | |
5789 | /* Outgoing arguments for a libcall don't | |
5790 | affect any recorded expressions. */ | |
5791 | if (! libcall_insn || insn == libcall_insn) | |
5792 | invalidate (dest, VOIDmode); | |
5793 | } | |
2708da92 RS |
5794 | else if (GET_CODE (dest) == STRICT_LOW_PART |
5795 | || GET_CODE (dest) == ZERO_EXTRACT) | |
bb4034b3 | 5796 | invalidate (XEXP (dest, 0), GET_MODE (dest)); |
c2a47e48 RK |
5797 | sets[i].rtl = 0; |
5798 | } | |
7afe21cc RK |
5799 | |
5800 | if (sets[i].rtl != 0 && dest != SET_DEST (sets[i].rtl)) | |
2197a88a | 5801 | sets[i].dest_hash = HASH (SET_DEST (sets[i].rtl), mode); |
7afe21cc RK |
5802 | |
5803 | #ifdef HAVE_cc0 | |
5804 | /* If setting CC0, record what it was set to, or a constant, if it | |
5805 | is equivalent to a constant. If it is being set to a floating-point | |
5806 | value, make a COMPARE with the appropriate constant of 0. If we | |
5807 | don't do this, later code can interpret this as a test against | |
5808 | const0_rtx, which can cause problems if we try to put it into an | |
5809 | insn as a floating-point operand. */ | |
5810 | if (dest == cc0_rtx) | |
5811 | { | |
5812 | this_insn_cc0 = src_const && mode != VOIDmode ? src_const : src; | |
5813 | this_insn_cc0_mode = mode; | |
cbf6a543 | 5814 | if (FLOAT_MODE_P (mode)) |
38a448ca RH |
5815 | this_insn_cc0 = gen_rtx_COMPARE (VOIDmode, this_insn_cc0, |
5816 | CONST0_RTX (mode)); | |
7afe21cc RK |
5817 | } |
5818 | #endif | |
5819 | } | |
5820 | ||
5821 | /* Now enter all non-volatile source expressions in the hash table | |
5822 | if they are not already present. | |
5823 | Record their equivalence classes in src_elt. | |
5824 | This way we can insert the corresponding destinations into | |
5825 | the same classes even if the actual sources are no longer in them | |
5826 | (having been invalidated). */ | |
5827 | ||
5828 | if (src_eqv && src_eqv_elt == 0 && sets[0].rtl != 0 && ! src_eqv_volatile | |
5829 | && ! rtx_equal_p (src_eqv, SET_DEST (sets[0].rtl))) | |
5830 | { | |
5831 | register struct table_elt *elt; | |
5832 | register struct table_elt *classp = sets[0].src_elt; | |
5833 | rtx dest = SET_DEST (sets[0].rtl); | |
5834 | enum machine_mode eqvmode = GET_MODE (dest); | |
5835 | ||
5836 | if (GET_CODE (dest) == STRICT_LOW_PART) | |
5837 | { | |
5838 | eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0))); | |
5839 | classp = 0; | |
5840 | } | |
5841 | if (insert_regs (src_eqv, classp, 0)) | |
8ae2b8f6 JW |
5842 | { |
5843 | rehash_using_reg (src_eqv); | |
5844 | src_eqv_hash = HASH (src_eqv, eqvmode); | |
5845 | } | |
2197a88a | 5846 | elt = insert (src_eqv, classp, src_eqv_hash, eqvmode); |
7afe21cc | 5847 | elt->in_memory = src_eqv_in_memory; |
7afe21cc | 5848 | src_eqv_elt = elt; |
f7911249 JW |
5849 | |
5850 | /* Check to see if src_eqv_elt is the same as a set source which | |
5851 | does not yet have an elt, and if so set the elt of the set source | |
5852 | to src_eqv_elt. */ | |
5853 | for (i = 0; i < n_sets; i++) | |
26132f71 JW |
5854 | if (sets[i].rtl && sets[i].src_elt == 0 |
5855 | && rtx_equal_p (SET_SRC (sets[i].rtl), src_eqv)) | |
f7911249 | 5856 | sets[i].src_elt = src_eqv_elt; |
7afe21cc RK |
5857 | } |
5858 | ||
5859 | for (i = 0; i < n_sets; i++) | |
5860 | if (sets[i].rtl && ! sets[i].src_volatile | |
5861 | && ! rtx_equal_p (SET_SRC (sets[i].rtl), SET_DEST (sets[i].rtl))) | |
5862 | { | |
5863 | if (GET_CODE (SET_DEST (sets[i].rtl)) == STRICT_LOW_PART) | |
5864 | { | |
5865 | /* REG_EQUAL in setting a STRICT_LOW_PART | |
5866 | gives an equivalent for the entire destination register, | |
5867 | not just for the subreg being stored in now. | |
5868 | This is a more interesting equivalence, so we arrange later | |
5869 | to treat the entire reg as the destination. */ | |
5870 | sets[i].src_elt = src_eqv_elt; | |
2197a88a | 5871 | sets[i].src_hash = src_eqv_hash; |
7afe21cc RK |
5872 | } |
5873 | else | |
5874 | { | |
5875 | /* Insert source and constant equivalent into hash table, if not | |
5876 | already present. */ | |
5877 | register struct table_elt *classp = src_eqv_elt; | |
5878 | register rtx src = sets[i].src; | |
5879 | register rtx dest = SET_DEST (sets[i].rtl); | |
5880 | enum machine_mode mode | |
5881 | = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src); | |
5882 | ||
26132f71 | 5883 | if (sets[i].src_elt == 0) |
7afe21cc | 5884 | { |
26132f71 JW |
5885 | /* Don't put a hard register source into the table if this is |
5886 | the last insn of a libcall. In this case, we only need | |
5887 | to put src_eqv_elt in src_elt. */ | |
5888 | if (GET_CODE (src) != REG | |
5889 | || REGNO (src) >= FIRST_PSEUDO_REGISTER | |
5890 | || ! find_reg_note (insn, REG_RETVAL, NULL_RTX)) | |
8ae2b8f6 | 5891 | { |
26132f71 JW |
5892 | register struct table_elt *elt; |
5893 | ||
5894 | /* Note that these insert_regs calls cannot remove | |
5895 | any of the src_elt's, because they would have failed to | |
5896 | match if not still valid. */ | |
5897 | if (insert_regs (src, classp, 0)) | |
5898 | { | |
5899 | rehash_using_reg (src); | |
5900 | sets[i].src_hash = HASH (src, mode); | |
5901 | } | |
5902 | elt = insert (src, classp, sets[i].src_hash, mode); | |
5903 | elt->in_memory = sets[i].src_in_memory; | |
26132f71 | 5904 | sets[i].src_elt = classp = elt; |
8ae2b8f6 | 5905 | } |
26132f71 JW |
5906 | else |
5907 | sets[i].src_elt = classp; | |
7afe21cc | 5908 | } |
7afe21cc RK |
5909 | if (sets[i].src_const && sets[i].src_const_elt == 0 |
5910 | && src != sets[i].src_const | |
5911 | && ! rtx_equal_p (sets[i].src_const, src)) | |
5912 | sets[i].src_elt = insert (sets[i].src_const, classp, | |
2197a88a | 5913 | sets[i].src_const_hash, mode); |
7afe21cc RK |
5914 | } |
5915 | } | |
5916 | else if (sets[i].src_elt == 0) | |
5917 | /* If we did not insert the source into the hash table (e.g., it was | |
5918 | volatile), note the equivalence class for the REG_EQUAL value, if any, | |
5919 | so that the destination goes into that class. */ | |
5920 | sets[i].src_elt = src_eqv_elt; | |
5921 | ||
9ae8ffe7 | 5922 | invalidate_from_clobbers (x); |
77fa0940 | 5923 | |
278a83b2 | 5924 | /* Some registers are invalidated by subroutine calls. Memory is |
77fa0940 RK |
5925 | invalidated by non-constant calls. */ |
5926 | ||
7afe21cc RK |
5927 | if (GET_CODE (insn) == CALL_INSN) |
5928 | { | |
77fa0940 | 5929 | if (! CONST_CALL_P (insn)) |
9ae8ffe7 | 5930 | invalidate_memory (); |
7afe21cc RK |
5931 | invalidate_for_call (); |
5932 | } | |
5933 | ||
5934 | /* Now invalidate everything set by this instruction. | |
5935 | If a SUBREG or other funny destination is being set, | |
5936 | sets[i].rtl is still nonzero, so here we invalidate the reg | |
5937 | a part of which is being set. */ | |
5938 | ||
5939 | for (i = 0; i < n_sets; i++) | |
5940 | if (sets[i].rtl) | |
5941 | { | |
bb4034b3 JW |
5942 | /* We can't use the inner dest, because the mode associated with |
5943 | a ZERO_EXTRACT is significant. */ | |
5944 | register rtx dest = SET_DEST (sets[i].rtl); | |
7afe21cc RK |
5945 | |
5946 | /* Needed for registers to remove the register from its | |
5947 | previous quantity's chain. | |
5948 | Needed for memory if this is a nonvarying address, unless | |
5949 | we have just done an invalidate_memory that covers even those. */ | |
bb07060a | 5950 | if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG) |
bb4034b3 | 5951 | invalidate (dest, VOIDmode); |
bb07060a JW |
5952 | else if (GET_CODE (dest) == MEM) |
5953 | { | |
5954 | /* Outgoing arguments for a libcall don't | |
5955 | affect any recorded expressions. */ | |
5956 | if (! libcall_insn || insn == libcall_insn) | |
5957 | invalidate (dest, VOIDmode); | |
5958 | } | |
2708da92 RS |
5959 | else if (GET_CODE (dest) == STRICT_LOW_PART |
5960 | || GET_CODE (dest) == ZERO_EXTRACT) | |
bb4034b3 | 5961 | invalidate (XEXP (dest, 0), GET_MODE (dest)); |
7afe21cc RK |
5962 | } |
5963 | ||
01e752d3 JL |
5964 | /* A volatile ASM invalidates everything. */ |
5965 | if (GET_CODE (insn) == INSN | |
5966 | && GET_CODE (PATTERN (insn)) == ASM_OPERANDS | |
5967 | && MEM_VOLATILE_P (PATTERN (insn))) | |
5968 | flush_hash_table (); | |
5969 | ||
7afe21cc RK |
5970 | /* Make sure registers mentioned in destinations |
5971 | are safe for use in an expression to be inserted. | |
5972 | This removes from the hash table | |
5973 | any invalid entry that refers to one of these registers. | |
5974 | ||
5975 | We don't care about the return value from mention_regs because | |
5976 | we are going to hash the SET_DEST values unconditionally. */ | |
5977 | ||
5978 | for (i = 0; i < n_sets; i++) | |
34c73909 R |
5979 | { |
5980 | if (sets[i].rtl) | |
5981 | { | |
5982 | rtx x = SET_DEST (sets[i].rtl); | |
5983 | ||
5984 | if (GET_CODE (x) != REG) | |
5985 | mention_regs (x); | |
5986 | else | |
5987 | { | |
5988 | /* We used to rely on all references to a register becoming | |
5989 | inaccessible when a register changes to a new quantity, | |
5990 | since that changes the hash code. However, that is not | |
9b1549b8 | 5991 | safe, since after HASH_SIZE new quantities we get a |
34c73909 R |
5992 | hash 'collision' of a register with its own invalid |
5993 | entries. And since SUBREGs have been changed not to | |
5994 | change their hash code with the hash code of the register, | |
5995 | it wouldn't work any longer at all. So we have to check | |
5996 | for any invalid references lying around now. | |
5997 | This code is similar to the REG case in mention_regs, | |
5998 | but it knows that reg_tick has been incremented, and | |
5999 | it leaves reg_in_table as -1 . */ | |
770ae6cc RK |
6000 | unsigned int regno = REGNO (x); |
6001 | unsigned int endregno | |
34c73909 R |
6002 | = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1 |
6003 | : HARD_REGNO_NREGS (regno, GET_MODE (x))); | |
770ae6cc | 6004 | unsigned int i; |
34c73909 R |
6005 | |
6006 | for (i = regno; i < endregno; i++) | |
6007 | { | |
30f72379 | 6008 | if (REG_IN_TABLE (i) >= 0) |
34c73909 R |
6009 | { |
6010 | remove_invalid_refs (i); | |
30f72379 | 6011 | REG_IN_TABLE (i) = -1; |
34c73909 R |
6012 | } |
6013 | } | |
6014 | } | |
6015 | } | |
6016 | } | |
7afe21cc RK |
6017 | |
6018 | /* We may have just removed some of the src_elt's from the hash table. | |
6019 | So replace each one with the current head of the same class. */ | |
6020 | ||
6021 | for (i = 0; i < n_sets; i++) | |
6022 | if (sets[i].rtl) | |
6023 | { | |
6024 | if (sets[i].src_elt && sets[i].src_elt->first_same_value == 0) | |
6025 | /* If elt was removed, find current head of same class, | |
6026 | or 0 if nothing remains of that class. */ | |
6027 | { | |
6028 | register struct table_elt *elt = sets[i].src_elt; | |
6029 | ||
6030 | while (elt && elt->prev_same_value) | |
6031 | elt = elt->prev_same_value; | |
6032 | ||
6033 | while (elt && elt->first_same_value == 0) | |
6034 | elt = elt->next_same_value; | |
6035 | sets[i].src_elt = elt ? elt->first_same_value : 0; | |
6036 | } | |
6037 | } | |
6038 | ||
6039 | /* Now insert the destinations into their equivalence classes. */ | |
6040 | ||
6041 | for (i = 0; i < n_sets; i++) | |
6042 | if (sets[i].rtl) | |
6043 | { | |
6044 | register rtx dest = SET_DEST (sets[i].rtl); | |
9de2c71a | 6045 | rtx inner_dest = sets[i].inner_dest; |
7afe21cc RK |
6046 | register struct table_elt *elt; |
6047 | ||
6048 | /* Don't record value if we are not supposed to risk allocating | |
6049 | floating-point values in registers that might be wider than | |
6050 | memory. */ | |
6051 | if ((flag_float_store | |
6052 | && GET_CODE (dest) == MEM | |
cbf6a543 | 6053 | && FLOAT_MODE_P (GET_MODE (dest))) |
bc4ddc77 JW |
6054 | /* Don't record BLKmode values, because we don't know the |
6055 | size of it, and can't be sure that other BLKmode values | |
6056 | have the same or smaller size. */ | |
6057 | || GET_MODE (dest) == BLKmode | |
7afe21cc RK |
6058 | /* Don't record values of destinations set inside a libcall block |
6059 | since we might delete the libcall. Things should have been set | |
6060 | up so we won't want to reuse such a value, but we play it safe | |
6061 | here. */ | |
7bd8b2a8 | 6062 | || libcall_insn |
7afe21cc RK |
6063 | /* If we didn't put a REG_EQUAL value or a source into the hash |
6064 | table, there is no point is recording DEST. */ | |
1a8e9a8e RK |
6065 | || sets[i].src_elt == 0 |
6066 | /* If DEST is a paradoxical SUBREG and SRC is a ZERO_EXTEND | |
6067 | or SIGN_EXTEND, don't record DEST since it can cause | |
6068 | some tracking to be wrong. | |
6069 | ||
6070 | ??? Think about this more later. */ | |
6071 | || (GET_CODE (dest) == SUBREG | |
6072 | && (GET_MODE_SIZE (GET_MODE (dest)) | |
6073 | > GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest)))) | |
6074 | && (GET_CODE (sets[i].src) == SIGN_EXTEND | |
6075 | || GET_CODE (sets[i].src) == ZERO_EXTEND))) | |
7afe21cc RK |
6076 | continue; |
6077 | ||
6078 | /* STRICT_LOW_PART isn't part of the value BEING set, | |
6079 | and neither is the SUBREG inside it. | |
6080 | Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */ | |
6081 | if (GET_CODE (dest) == STRICT_LOW_PART) | |
6082 | dest = SUBREG_REG (XEXP (dest, 0)); | |
6083 | ||
c610adec | 6084 | if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG) |
7afe21cc RK |
6085 | /* Registers must also be inserted into chains for quantities. */ |
6086 | if (insert_regs (dest, sets[i].src_elt, 1)) | |
8ae2b8f6 JW |
6087 | { |
6088 | /* If `insert_regs' changes something, the hash code must be | |
6089 | recalculated. */ | |
6090 | rehash_using_reg (dest); | |
6091 | sets[i].dest_hash = HASH (dest, GET_MODE (dest)); | |
6092 | } | |
7afe21cc | 6093 | |
9de2c71a MM |
6094 | if (GET_CODE (inner_dest) == MEM |
6095 | && GET_CODE (XEXP (inner_dest, 0)) == ADDRESSOF) | |
6096 | /* Given (SET (MEM (ADDRESSOF (X))) Y) we don't want to say | |
278a83b2 | 6097 | that (MEM (ADDRESSOF (X))) is equivalent to Y. |
9de2c71a MM |
6098 | Consider the case in which the address of the MEM is |
6099 | passed to a function, which alters the MEM. Then, if we | |
6100 | later use Y instead of the MEM we'll miss the update. */ | |
6101 | elt = insert (dest, 0, sets[i].dest_hash, GET_MODE (dest)); | |
6102 | else | |
6103 | elt = insert (dest, sets[i].src_elt, | |
6104 | sets[i].dest_hash, GET_MODE (dest)); | |
6105 | ||
c256df0b | 6106 | elt->in_memory = (GET_CODE (sets[i].inner_dest) == MEM |
9ad91d71 RK |
6107 | && (! RTX_UNCHANGING_P (sets[i].inner_dest) |
6108 | || FIXED_BASE_PLUS_P (XEXP (sets[i].inner_dest, | |
6109 | 0)))); | |
c256df0b | 6110 | |
fc3ffe83 RK |
6111 | /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no |
6112 | narrower than M2, and both M1 and M2 are the same number of words, | |
6113 | we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so | |
6114 | make that equivalence as well. | |
7afe21cc RK |
6115 | |
6116 | However, BAR may have equivalences for which gen_lowpart_if_possible | |
6117 | will produce a simpler value than gen_lowpart_if_possible applied to | |
6118 | BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all | |
278a83b2 | 6119 | BAR's equivalences. If we don't get a simplified form, make |
7afe21cc RK |
6120 | the SUBREG. It will not be used in an equivalence, but will |
6121 | cause two similar assignments to be detected. | |
6122 | ||
6123 | Note the loop below will find SUBREG_REG (DEST) since we have | |
6124 | already entered SRC and DEST of the SET in the table. */ | |
6125 | ||
6126 | if (GET_CODE (dest) == SUBREG | |
6cdbaec4 RK |
6127 | && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) - 1) |
6128 | / UNITS_PER_WORD) | |
278a83b2 | 6129 | == (GET_MODE_SIZE (GET_MODE (dest)) - 1) / UNITS_PER_WORD) |
7afe21cc RK |
6130 | && (GET_MODE_SIZE (GET_MODE (dest)) |
6131 | >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest)))) | |
6132 | && sets[i].src_elt != 0) | |
6133 | { | |
6134 | enum machine_mode new_mode = GET_MODE (SUBREG_REG (dest)); | |
6135 | struct table_elt *elt, *classp = 0; | |
6136 | ||
6137 | for (elt = sets[i].src_elt->first_same_value; elt; | |
6138 | elt = elt->next_same_value) | |
6139 | { | |
6140 | rtx new_src = 0; | |
2197a88a | 6141 | unsigned src_hash; |
7afe21cc RK |
6142 | struct table_elt *src_elt; |
6143 | ||
6144 | /* Ignore invalid entries. */ | |
6145 | if (GET_CODE (elt->exp) != REG | |
6146 | && ! exp_equiv_p (elt->exp, elt->exp, 1, 0)) | |
6147 | continue; | |
6148 | ||
6149 | new_src = gen_lowpart_if_possible (new_mode, elt->exp); | |
6150 | if (new_src == 0) | |
38a448ca | 6151 | new_src = gen_rtx_SUBREG (new_mode, elt->exp, 0); |
7afe21cc RK |
6152 | |
6153 | src_hash = HASH (new_src, new_mode); | |
6154 | src_elt = lookup (new_src, src_hash, new_mode); | |
6155 | ||
6156 | /* Put the new source in the hash table is if isn't | |
6157 | already. */ | |
6158 | if (src_elt == 0) | |
6159 | { | |
6160 | if (insert_regs (new_src, classp, 0)) | |
8ae2b8f6 JW |
6161 | { |
6162 | rehash_using_reg (new_src); | |
6163 | src_hash = HASH (new_src, new_mode); | |
6164 | } | |
7afe21cc RK |
6165 | src_elt = insert (new_src, classp, src_hash, new_mode); |
6166 | src_elt->in_memory = elt->in_memory; | |
7afe21cc RK |
6167 | } |
6168 | else if (classp && classp != src_elt->first_same_value) | |
278a83b2 | 6169 | /* Show that two things that we've seen before are |
7afe21cc RK |
6170 | actually the same. */ |
6171 | merge_equiv_classes (src_elt, classp); | |
6172 | ||
6173 | classp = src_elt->first_same_value; | |
da932f04 JL |
6174 | /* Ignore invalid entries. */ |
6175 | while (classp | |
6176 | && GET_CODE (classp->exp) != REG | |
6177 | && ! exp_equiv_p (classp->exp, classp->exp, 1, 0)) | |
6178 | classp = classp->next_same_value; | |
7afe21cc RK |
6179 | } |
6180 | } | |
6181 | } | |
6182 | ||
403e25d0 RK |
6183 | /* Special handling for (set REG0 REG1) where REG0 is the |
6184 | "cheapest", cheaper than REG1. After cse, REG1 will probably not | |
6185 | be used in the sequel, so (if easily done) change this insn to | |
6186 | (set REG1 REG0) and replace REG1 with REG0 in the previous insn | |
6187 | that computed their value. Then REG1 will become a dead store | |
6188 | and won't cloud the situation for later optimizations. | |
7afe21cc RK |
6189 | |
6190 | Do not make this change if REG1 is a hard register, because it will | |
6191 | then be used in the sequel and we may be changing a two-operand insn | |
6192 | into a three-operand insn. | |
6193 | ||
50270076 R |
6194 | Also do not do this if we are operating on a copy of INSN. |
6195 | ||
6196 | Also don't do this if INSN ends a libcall; this would cause an unrelated | |
6197 | register to be set in the middle of a libcall, and we then get bad code | |
6198 | if the libcall is deleted. */ | |
7afe21cc RK |
6199 | |
6200 | if (n_sets == 1 && sets[0].rtl && GET_CODE (SET_DEST (sets[0].rtl)) == REG | |
6201 | && NEXT_INSN (PREV_INSN (insn)) == insn | |
6202 | && GET_CODE (SET_SRC (sets[0].rtl)) == REG | |
6203 | && REGNO (SET_SRC (sets[0].rtl)) >= FIRST_PSEUDO_REGISTER | |
1bb98cec | 6204 | && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets[0].rtl)))) |
7afe21cc | 6205 | { |
1bb98cec DM |
6206 | int src_q = REG_QTY (REGNO (SET_SRC (sets[0].rtl))); |
6207 | struct qty_table_elem *src_ent = &qty_table[src_q]; | |
7afe21cc | 6208 | |
1bb98cec DM |
6209 | if ((src_ent->first_reg == REGNO (SET_DEST (sets[0].rtl))) |
6210 | && ! find_reg_note (insn, REG_RETVAL, NULL_RTX)) | |
7afe21cc | 6211 | { |
403e25d0 | 6212 | rtx prev = prev_nonnote_insn (insn); |
7afe21cc | 6213 | |
403e25d0 RK |
6214 | if (prev != 0 && GET_CODE (prev) == INSN |
6215 | && GET_CODE (PATTERN (prev)) == SET | |
1bb98cec DM |
6216 | && SET_DEST (PATTERN (prev)) == SET_SRC (sets[0].rtl)) |
6217 | { | |
6218 | rtx dest = SET_DEST (sets[0].rtl); | |
403e25d0 | 6219 | rtx src = SET_SRC (sets[0].rtl); |
1bb98cec | 6220 | rtx note = find_reg_note (prev, REG_EQUIV, NULL_RTX); |
7afe21cc | 6221 | |
278a83b2 KH |
6222 | validate_change (prev, &SET_DEST (PATTERN (prev)), dest, 1); |
6223 | validate_change (insn, &SET_DEST (sets[0].rtl), src, 1); | |
6224 | validate_change (insn, &SET_SRC (sets[0].rtl), dest, 1); | |
1bb98cec | 6225 | apply_change_group (); |
7afe21cc | 6226 | |
1bb98cec DM |
6227 | /* If REG1 was equivalent to a constant, REG0 is not. */ |
6228 | if (note) | |
6229 | PUT_REG_NOTE_KIND (note, REG_EQUAL); | |
7afe21cc | 6230 | |
1bb98cec DM |
6231 | /* If there was a REG_WAS_0 note on PREV, remove it. Move |
6232 | any REG_WAS_0 note on INSN to PREV. */ | |
6233 | note = find_reg_note (prev, REG_WAS_0, NULL_RTX); | |
6234 | if (note) | |
6235 | remove_note (prev, note); | |
6236 | ||
6237 | note = find_reg_note (insn, REG_WAS_0, NULL_RTX); | |
6238 | if (note) | |
6239 | { | |
6240 | remove_note (insn, note); | |
6241 | XEXP (note, 1) = REG_NOTES (prev); | |
6242 | REG_NOTES (prev) = note; | |
6243 | } | |
98369a0f | 6244 | |
403e25d0 RK |
6245 | /* If INSN has a REG_EQUAL note, and this note mentions |
6246 | REG0, then we must delete it, because the value in | |
6247 | REG0 has changed. If the note's value is REG1, we must | |
6248 | also delete it because that is now this insn's dest. */ | |
1bb98cec | 6249 | note = find_reg_note (insn, REG_EQUAL, NULL_RTX); |
403e25d0 RK |
6250 | if (note != 0 |
6251 | && (reg_mentioned_p (dest, XEXP (note, 0)) | |
6252 | || rtx_equal_p (src, XEXP (note, 0)))) | |
1bb98cec DM |
6253 | remove_note (insn, note); |
6254 | } | |
7afe21cc RK |
6255 | } |
6256 | } | |
6257 | ||
6258 | /* If this is a conditional jump insn, record any known equivalences due to | |
6259 | the condition being tested. */ | |
6260 | ||
6261 | last_jump_equiv_class = 0; | |
6262 | if (GET_CODE (insn) == JUMP_INSN | |
6263 | && n_sets == 1 && GET_CODE (x) == SET | |
6264 | && GET_CODE (SET_SRC (x)) == IF_THEN_ELSE) | |
6265 | record_jump_equiv (insn, 0); | |
6266 | ||
6267 | #ifdef HAVE_cc0 | |
6268 | /* If the previous insn set CC0 and this insn no longer references CC0, | |
6269 | delete the previous insn. Here we use the fact that nothing expects CC0 | |
6270 | to be valid over an insn, which is true until the final pass. */ | |
6271 | if (prev_insn && GET_CODE (prev_insn) == INSN | |
6272 | && (tem = single_set (prev_insn)) != 0 | |
6273 | && SET_DEST (tem) == cc0_rtx | |
6274 | && ! reg_mentioned_p (cc0_rtx, x)) | |
6275 | { | |
6276 | PUT_CODE (prev_insn, NOTE); | |
6277 | NOTE_LINE_NUMBER (prev_insn) = NOTE_INSN_DELETED; | |
6278 | NOTE_SOURCE_FILE (prev_insn) = 0; | |
6279 | } | |
6280 | ||
6281 | prev_insn_cc0 = this_insn_cc0; | |
6282 | prev_insn_cc0_mode = this_insn_cc0_mode; | |
6283 | #endif | |
6284 | ||
6285 | prev_insn = insn; | |
6286 | } | |
6287 | \f | |
a4c6502a | 6288 | /* Remove from the hash table all expressions that reference memory. */ |
14a774a9 | 6289 | |
7afe21cc | 6290 | static void |
9ae8ffe7 | 6291 | invalidate_memory () |
7afe21cc | 6292 | { |
9ae8ffe7 JL |
6293 | register int i; |
6294 | register struct table_elt *p, *next; | |
7afe21cc | 6295 | |
9b1549b8 | 6296 | for (i = 0; i < HASH_SIZE; i++) |
9ae8ffe7 JL |
6297 | for (p = table[i]; p; p = next) |
6298 | { | |
6299 | next = p->next_same_hash; | |
6300 | if (p->in_memory) | |
6301 | remove_from_table (p, i); | |
6302 | } | |
6303 | } | |
6304 | ||
14a774a9 RK |
6305 | /* If ADDR is an address that implicitly affects the stack pointer, return |
6306 | 1 and update the register tables to show the effect. Else, return 0. */ | |
6307 | ||
9ae8ffe7 | 6308 | static int |
14a774a9 | 6309 | addr_affects_sp_p (addr) |
9ae8ffe7 JL |
6310 | register rtx addr; |
6311 | { | |
4b983fdc | 6312 | if (GET_RTX_CLASS (GET_CODE (addr)) == 'a' |
9ae8ffe7 JL |
6313 | && GET_CODE (XEXP (addr, 0)) == REG |
6314 | && REGNO (XEXP (addr, 0)) == STACK_POINTER_REGNUM) | |
7afe21cc | 6315 | { |
30f72379 MM |
6316 | if (REG_TICK (STACK_POINTER_REGNUM) >= 0) |
6317 | REG_TICK (STACK_POINTER_REGNUM)++; | |
9ae8ffe7 JL |
6318 | |
6319 | /* This should be *very* rare. */ | |
6320 | if (TEST_HARD_REG_BIT (hard_regs_in_table, STACK_POINTER_REGNUM)) | |
6321 | invalidate (stack_pointer_rtx, VOIDmode); | |
14a774a9 | 6322 | |
9ae8ffe7 | 6323 | return 1; |
7afe21cc | 6324 | } |
14a774a9 | 6325 | |
9ae8ffe7 | 6326 | return 0; |
7afe21cc RK |
6327 | } |
6328 | ||
6329 | /* Perform invalidation on the basis of everything about an insn | |
6330 | except for invalidating the actual places that are SET in it. | |
6331 | This includes the places CLOBBERed, and anything that might | |
6332 | alias with something that is SET or CLOBBERed. | |
6333 | ||
7afe21cc RK |
6334 | X is the pattern of the insn. */ |
6335 | ||
6336 | static void | |
9ae8ffe7 | 6337 | invalidate_from_clobbers (x) |
7afe21cc RK |
6338 | rtx x; |
6339 | { | |
7afe21cc RK |
6340 | if (GET_CODE (x) == CLOBBER) |
6341 | { | |
6342 | rtx ref = XEXP (x, 0); | |
9ae8ffe7 JL |
6343 | if (ref) |
6344 | { | |
6345 | if (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG | |
6346 | || GET_CODE (ref) == MEM) | |
6347 | invalidate (ref, VOIDmode); | |
6348 | else if (GET_CODE (ref) == STRICT_LOW_PART | |
6349 | || GET_CODE (ref) == ZERO_EXTRACT) | |
6350 | invalidate (XEXP (ref, 0), GET_MODE (ref)); | |
6351 | } | |
7afe21cc RK |
6352 | } |
6353 | else if (GET_CODE (x) == PARALLEL) | |
6354 | { | |
6355 | register int i; | |
6356 | for (i = XVECLEN (x, 0) - 1; i >= 0; i--) | |
6357 | { | |
6358 | register rtx y = XVECEXP (x, 0, i); | |
6359 | if (GET_CODE (y) == CLOBBER) | |
6360 | { | |
6361 | rtx ref = XEXP (y, 0); | |
9ae8ffe7 JL |
6362 | if (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG |
6363 | || GET_CODE (ref) == MEM) | |
6364 | invalidate (ref, VOIDmode); | |
6365 | else if (GET_CODE (ref) == STRICT_LOW_PART | |
6366 | || GET_CODE (ref) == ZERO_EXTRACT) | |
6367 | invalidate (XEXP (ref, 0), GET_MODE (ref)); | |
7afe21cc RK |
6368 | } |
6369 | } | |
6370 | } | |
6371 | } | |
6372 | \f | |
6373 | /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes | |
6374 | and replace any registers in them with either an equivalent constant | |
6375 | or the canonical form of the register. If we are inside an address, | |
6376 | only do this if the address remains valid. | |
6377 | ||
6378 | OBJECT is 0 except when within a MEM in which case it is the MEM. | |
6379 | ||
6380 | Return the replacement for X. */ | |
6381 | ||
6382 | static rtx | |
6383 | cse_process_notes (x, object) | |
6384 | rtx x; | |
6385 | rtx object; | |
6386 | { | |
6387 | enum rtx_code code = GET_CODE (x); | |
6f7d635c | 6388 | const char *fmt = GET_RTX_FORMAT (code); |
7afe21cc RK |
6389 | int i; |
6390 | ||
6391 | switch (code) | |
6392 | { | |
6393 | case CONST_INT: | |
6394 | case CONST: | |
6395 | case SYMBOL_REF: | |
6396 | case LABEL_REF: | |
6397 | case CONST_DOUBLE: | |
6398 | case PC: | |
6399 | case CC0: | |
6400 | case LO_SUM: | |
6401 | return x; | |
6402 | ||
6403 | case MEM: | |
6404 | XEXP (x, 0) = cse_process_notes (XEXP (x, 0), x); | |
6405 | return x; | |
6406 | ||
6407 | case EXPR_LIST: | |
6408 | case INSN_LIST: | |
6409 | if (REG_NOTE_KIND (x) == REG_EQUAL) | |
906c4e36 | 6410 | XEXP (x, 0) = cse_process_notes (XEXP (x, 0), NULL_RTX); |
7afe21cc | 6411 | if (XEXP (x, 1)) |
906c4e36 | 6412 | XEXP (x, 1) = cse_process_notes (XEXP (x, 1), NULL_RTX); |
7afe21cc RK |
6413 | return x; |
6414 | ||
e4890d45 RS |
6415 | case SIGN_EXTEND: |
6416 | case ZERO_EXTEND: | |
0b0ee36c | 6417 | case SUBREG: |
e4890d45 RS |
6418 | { |
6419 | rtx new = cse_process_notes (XEXP (x, 0), object); | |
6420 | /* We don't substitute VOIDmode constants into these rtx, | |
6421 | since they would impede folding. */ | |
6422 | if (GET_MODE (new) != VOIDmode) | |
6423 | validate_change (object, &XEXP (x, 0), new, 0); | |
6424 | return x; | |
6425 | } | |
6426 | ||
7afe21cc | 6427 | case REG: |
30f72379 | 6428 | i = REG_QTY (REGNO (x)); |
7afe21cc RK |
6429 | |
6430 | /* Return a constant or a constant register. */ | |
1bb98cec | 6431 | if (REGNO_QTY_VALID_P (REGNO (x))) |
7afe21cc | 6432 | { |
1bb98cec DM |
6433 | struct qty_table_elem *ent = &qty_table[i]; |
6434 | ||
6435 | if (ent->const_rtx != NULL_RTX | |
6436 | && (CONSTANT_P (ent->const_rtx) | |
6437 | || GET_CODE (ent->const_rtx) == REG)) | |
6438 | { | |
6439 | rtx new = gen_lowpart_if_possible (GET_MODE (x), ent->const_rtx); | |
6440 | if (new) | |
6441 | return new; | |
6442 | } | |
7afe21cc RK |
6443 | } |
6444 | ||
6445 | /* Otherwise, canonicalize this register. */ | |
906c4e36 | 6446 | return canon_reg (x, NULL_RTX); |
278a83b2 | 6447 | |
e9a25f70 JL |
6448 | default: |
6449 | break; | |
7afe21cc RK |
6450 | } |
6451 | ||
6452 | for (i = 0; i < GET_RTX_LENGTH (code); i++) | |
6453 | if (fmt[i] == 'e') | |
6454 | validate_change (object, &XEXP (x, i), | |
7fe34fdf | 6455 | cse_process_notes (XEXP (x, i), object), 0); |
7afe21cc RK |
6456 | |
6457 | return x; | |
6458 | } | |
6459 | \f | |
6460 | /* Find common subexpressions between the end test of a loop and the beginning | |
6461 | of the loop. LOOP_START is the CODE_LABEL at the start of a loop. | |
6462 | ||
6463 | Often we have a loop where an expression in the exit test is used | |
6464 | in the body of the loop. For example "while (*p) *q++ = *p++;". | |
6465 | Because of the way we duplicate the loop exit test in front of the loop, | |
6466 | however, we don't detect that common subexpression. This will be caught | |
6467 | when global cse is implemented, but this is a quite common case. | |
6468 | ||
6469 | This function handles the most common cases of these common expressions. | |
6470 | It is called after we have processed the basic block ending with the | |
6471 | NOTE_INSN_LOOP_END note that ends a loop and the previous JUMP_INSN | |
6472 | jumps to a label used only once. */ | |
6473 | ||
6474 | static void | |
6475 | cse_around_loop (loop_start) | |
6476 | rtx loop_start; | |
6477 | { | |
6478 | rtx insn; | |
6479 | int i; | |
6480 | struct table_elt *p; | |
6481 | ||
6482 | /* If the jump at the end of the loop doesn't go to the start, we don't | |
6483 | do anything. */ | |
6484 | for (insn = PREV_INSN (loop_start); | |
6485 | insn && (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) >= 0); | |
6486 | insn = PREV_INSN (insn)) | |
6487 | ; | |
6488 | ||
6489 | if (insn == 0 | |
6490 | || GET_CODE (insn) != NOTE | |
6491 | || NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG) | |
6492 | return; | |
6493 | ||
6494 | /* If the last insn of the loop (the end test) was an NE comparison, | |
6495 | we will interpret it as an EQ comparison, since we fell through | |
f72aed24 | 6496 | the loop. Any equivalences resulting from that comparison are |
7afe21cc RK |
6497 | therefore not valid and must be invalidated. */ |
6498 | if (last_jump_equiv_class) | |
6499 | for (p = last_jump_equiv_class->first_same_value; p; | |
6500 | p = p->next_same_value) | |
51723711 | 6501 | { |
278a83b2 | 6502 | if (GET_CODE (p->exp) == MEM || GET_CODE (p->exp) == REG |
51723711 | 6503 | || (GET_CODE (p->exp) == SUBREG |
278a83b2 | 6504 | && GET_CODE (SUBREG_REG (p->exp)) == REG)) |
51723711 | 6505 | invalidate (p->exp, VOIDmode); |
278a83b2 KH |
6506 | else if (GET_CODE (p->exp) == STRICT_LOW_PART |
6507 | || GET_CODE (p->exp) == ZERO_EXTRACT) | |
51723711 KG |
6508 | invalidate (XEXP (p->exp, 0), GET_MODE (p->exp)); |
6509 | } | |
7afe21cc RK |
6510 | |
6511 | /* Process insns starting after LOOP_START until we hit a CALL_INSN or | |
6512 | a CODE_LABEL (we could handle a CALL_INSN, but it isn't worth it). | |
6513 | ||
6514 | The only thing we do with SET_DEST is invalidate entries, so we | |
6515 | can safely process each SET in order. It is slightly less efficient | |
556c714b JW |
6516 | to do so, but we only want to handle the most common cases. |
6517 | ||
6518 | The gen_move_insn call in cse_set_around_loop may create new pseudos. | |
6519 | These pseudos won't have valid entries in any of the tables indexed | |
6520 | by register number, such as reg_qty. We avoid out-of-range array | |
6521 | accesses by not processing any instructions created after cse started. */ | |
7afe21cc RK |
6522 | |
6523 | for (insn = NEXT_INSN (loop_start); | |
6524 | GET_CODE (insn) != CALL_INSN && GET_CODE (insn) != CODE_LABEL | |
556c714b | 6525 | && INSN_UID (insn) < max_insn_uid |
7afe21cc RK |
6526 | && ! (GET_CODE (insn) == NOTE |
6527 | && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END); | |
6528 | insn = NEXT_INSN (insn)) | |
6529 | { | |
2c3c49de | 6530 | if (INSN_P (insn) |
7afe21cc RK |
6531 | && (GET_CODE (PATTERN (insn)) == SET |
6532 | || GET_CODE (PATTERN (insn)) == CLOBBER)) | |
6533 | cse_set_around_loop (PATTERN (insn), insn, loop_start); | |
2c3c49de | 6534 | else if (INSN_P (insn) && GET_CODE (PATTERN (insn)) == PARALLEL) |
7afe21cc RK |
6535 | for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--) |
6536 | if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == SET | |
6537 | || GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == CLOBBER) | |
6538 | cse_set_around_loop (XVECEXP (PATTERN (insn), 0, i), insn, | |
6539 | loop_start); | |
6540 | } | |
6541 | } | |
6542 | \f | |
8b3686ed RK |
6543 | /* Process one SET of an insn that was skipped. We ignore CLOBBERs |
6544 | since they are done elsewhere. This function is called via note_stores. */ | |
6545 | ||
6546 | static void | |
84832317 | 6547 | invalidate_skipped_set (dest, set, data) |
8b3686ed RK |
6548 | rtx set; |
6549 | rtx dest; | |
84832317 | 6550 | void *data ATTRIBUTE_UNUSED; |
8b3686ed | 6551 | { |
9ae8ffe7 JL |
6552 | enum rtx_code code = GET_CODE (dest); |
6553 | ||
6554 | if (code == MEM | |
ddc356e8 | 6555 | && ! addr_affects_sp_p (dest) /* If this is not a stack push ... */ |
9ae8ffe7 JL |
6556 | /* There are times when an address can appear varying and be a PLUS |
6557 | during this scan when it would be a fixed address were we to know | |
6558 | the proper equivalences. So invalidate all memory if there is | |
6559 | a BLKmode or nonscalar memory reference or a reference to a | |
6560 | variable address. */ | |
6561 | && (MEM_IN_STRUCT_P (dest) || GET_MODE (dest) == BLKmode | |
6562 | || cse_rtx_varies_p (XEXP (dest, 0)))) | |
6563 | { | |
6564 | invalidate_memory (); | |
6565 | return; | |
6566 | } | |
ffcf6393 | 6567 | |
f47c02fa RK |
6568 | if (GET_CODE (set) == CLOBBER |
6569 | #ifdef HAVE_cc0 | |
6570 | || dest == cc0_rtx | |
6571 | #endif | |
6572 | || dest == pc_rtx) | |
6573 | return; | |
6574 | ||
9ae8ffe7 | 6575 | if (code == STRICT_LOW_PART || code == ZERO_EXTRACT) |
bb4034b3 | 6576 | invalidate (XEXP (dest, 0), GET_MODE (dest)); |
9ae8ffe7 JL |
6577 | else if (code == REG || code == SUBREG || code == MEM) |
6578 | invalidate (dest, VOIDmode); | |
8b3686ed RK |
6579 | } |
6580 | ||
6581 | /* Invalidate all insns from START up to the end of the function or the | |
6582 | next label. This called when we wish to CSE around a block that is | |
6583 | conditionally executed. */ | |
6584 | ||
6585 | static void | |
6586 | invalidate_skipped_block (start) | |
6587 | rtx start; | |
6588 | { | |
6589 | rtx insn; | |
8b3686ed RK |
6590 | |
6591 | for (insn = start; insn && GET_CODE (insn) != CODE_LABEL; | |
6592 | insn = NEXT_INSN (insn)) | |
6593 | { | |
2c3c49de | 6594 | if (! INSN_P (insn)) |
8b3686ed RK |
6595 | continue; |
6596 | ||
8b3686ed RK |
6597 | if (GET_CODE (insn) == CALL_INSN) |
6598 | { | |
9ae8ffe7 JL |
6599 | if (! CONST_CALL_P (insn)) |
6600 | invalidate_memory (); | |
8b3686ed | 6601 | invalidate_for_call (); |
8b3686ed RK |
6602 | } |
6603 | ||
97577254 | 6604 | invalidate_from_clobbers (PATTERN (insn)); |
84832317 | 6605 | note_stores (PATTERN (insn), invalidate_skipped_set, NULL); |
8b3686ed RK |
6606 | } |
6607 | } | |
6608 | \f | |
84832317 MM |
6609 | /* If modifying X will modify the value in *DATA (which is really an |
6610 | `rtx *'), indicate that fact by setting the pointed to value to | |
6611 | NULL_RTX. */ | |
7afe21cc RK |
6612 | |
6613 | static void | |
84832317 | 6614 | cse_check_loop_start (x, set, data) |
7afe21cc | 6615 | rtx x; |
d6f4ec51 | 6616 | rtx set ATTRIBUTE_UNUSED; |
84832317 | 6617 | void *data; |
7afe21cc | 6618 | { |
84832317 MM |
6619 | rtx *cse_check_loop_start_value = (rtx *) data; |
6620 | ||
6621 | if (*cse_check_loop_start_value == NULL_RTX | |
7afe21cc RK |
6622 | || GET_CODE (x) == CC0 || GET_CODE (x) == PC) |
6623 | return; | |
6624 | ||
84832317 MM |
6625 | if ((GET_CODE (x) == MEM && GET_CODE (*cse_check_loop_start_value) == MEM) |
6626 | || reg_overlap_mentioned_p (x, *cse_check_loop_start_value)) | |
6627 | *cse_check_loop_start_value = NULL_RTX; | |
7afe21cc RK |
6628 | } |
6629 | ||
6630 | /* X is a SET or CLOBBER contained in INSN that was found near the start of | |
6631 | a loop that starts with the label at LOOP_START. | |
6632 | ||
6633 | If X is a SET, we see if its SET_SRC is currently in our hash table. | |
6634 | If so, we see if it has a value equal to some register used only in the | |
6635 | loop exit code (as marked by jump.c). | |
6636 | ||
6637 | If those two conditions are true, we search backwards from the start of | |
6638 | the loop to see if that same value was loaded into a register that still | |
6639 | retains its value at the start of the loop. | |
6640 | ||
6641 | If so, we insert an insn after the load to copy the destination of that | |
6642 | load into the equivalent register and (try to) replace our SET_SRC with that | |
6643 | register. | |
6644 | ||
6645 | In any event, we invalidate whatever this SET or CLOBBER modifies. */ | |
6646 | ||
6647 | static void | |
6648 | cse_set_around_loop (x, insn, loop_start) | |
6649 | rtx x; | |
6650 | rtx insn; | |
6651 | rtx loop_start; | |
6652 | { | |
7afe21cc | 6653 | struct table_elt *src_elt; |
7afe21cc RK |
6654 | |
6655 | /* If this is a SET, see if we can replace SET_SRC, but ignore SETs that | |
6656 | are setting PC or CC0 or whose SET_SRC is already a register. */ | |
6657 | if (GET_CODE (x) == SET | |
6658 | && GET_CODE (SET_DEST (x)) != PC && GET_CODE (SET_DEST (x)) != CC0 | |
6659 | && GET_CODE (SET_SRC (x)) != REG) | |
6660 | { | |
6661 | src_elt = lookup (SET_SRC (x), | |
6662 | HASH (SET_SRC (x), GET_MODE (SET_DEST (x))), | |
6663 | GET_MODE (SET_DEST (x))); | |
6664 | ||
6665 | if (src_elt) | |
6666 | for (src_elt = src_elt->first_same_value; src_elt; | |
6667 | src_elt = src_elt->next_same_value) | |
6668 | if (GET_CODE (src_elt->exp) == REG && REG_LOOP_TEST_P (src_elt->exp) | |
6669 | && COST (src_elt->exp) < COST (SET_SRC (x))) | |
6670 | { | |
6671 | rtx p, set; | |
6672 | ||
6673 | /* Look for an insn in front of LOOP_START that sets | |
6674 | something in the desired mode to SET_SRC (x) before we hit | |
6675 | a label or CALL_INSN. */ | |
6676 | ||
6677 | for (p = prev_nonnote_insn (loop_start); | |
6678 | p && GET_CODE (p) != CALL_INSN | |
6679 | && GET_CODE (p) != CODE_LABEL; | |
6680 | p = prev_nonnote_insn (p)) | |
6681 | if ((set = single_set (p)) != 0 | |
6682 | && GET_CODE (SET_DEST (set)) == REG | |
6683 | && GET_MODE (SET_DEST (set)) == src_elt->mode | |
6684 | && rtx_equal_p (SET_SRC (set), SET_SRC (x))) | |
6685 | { | |
6686 | /* We now have to ensure that nothing between P | |
6687 | and LOOP_START modified anything referenced in | |
6688 | SET_SRC (x). We know that nothing within the loop | |
6689 | can modify it, or we would have invalidated it in | |
6690 | the hash table. */ | |
6691 | rtx q; | |
84832317 | 6692 | rtx cse_check_loop_start_value = SET_SRC (x); |
7afe21cc | 6693 | for (q = p; q != loop_start; q = NEXT_INSN (q)) |
2c3c49de | 6694 | if (INSN_P (q)) |
84832317 MM |
6695 | note_stores (PATTERN (q), |
6696 | cse_check_loop_start, | |
6697 | &cse_check_loop_start_value); | |
7afe21cc RK |
6698 | |
6699 | /* If nothing was changed and we can replace our | |
6700 | SET_SRC, add an insn after P to copy its destination | |
6701 | to what we will be replacing SET_SRC with. */ | |
6702 | if (cse_check_loop_start_value | |
6703 | && validate_change (insn, &SET_SRC (x), | |
6704 | src_elt->exp, 0)) | |
e89d3e6f R |
6705 | { |
6706 | /* If this creates new pseudos, this is unsafe, | |
6707 | because the regno of new pseudo is unsuitable | |
6708 | to index into reg_qty when cse_insn processes | |
6709 | the new insn. Therefore, if a new pseudo was | |
6710 | created, discard this optimization. */ | |
6711 | int nregs = max_reg_num (); | |
6712 | rtx move | |
6713 | = gen_move_insn (src_elt->exp, SET_DEST (set)); | |
6714 | if (nregs != max_reg_num ()) | |
6715 | { | |
6716 | if (! validate_change (insn, &SET_SRC (x), | |
6717 | SET_SRC (set), 0)) | |
6718 | abort (); | |
6719 | } | |
6720 | else | |
6721 | emit_insn_after (move, p); | |
6722 | } | |
7afe21cc RK |
6723 | break; |
6724 | } | |
6725 | } | |
6726 | } | |
6727 | ||
14a774a9 RK |
6728 | /* Deal with the destination of X affecting the stack pointer. */ |
6729 | addr_affects_sp_p (SET_DEST (x)); | |
7afe21cc | 6730 | |
14a774a9 RK |
6731 | /* See comment on similar code in cse_insn for explanation of these |
6732 | tests. */ | |
7afe21cc | 6733 | if (GET_CODE (SET_DEST (x)) == REG || GET_CODE (SET_DEST (x)) == SUBREG |
9ae8ffe7 | 6734 | || GET_CODE (SET_DEST (x)) == MEM) |
bb4034b3 | 6735 | invalidate (SET_DEST (x), VOIDmode); |
2708da92 RS |
6736 | else if (GET_CODE (SET_DEST (x)) == STRICT_LOW_PART |
6737 | || GET_CODE (SET_DEST (x)) == ZERO_EXTRACT) | |
bb4034b3 | 6738 | invalidate (XEXP (SET_DEST (x), 0), GET_MODE (SET_DEST (x))); |
7afe21cc RK |
6739 | } |
6740 | \f | |
6741 | /* Find the end of INSN's basic block and return its range, | |
6742 | the total number of SETs in all the insns of the block, the last insn of the | |
6743 | block, and the branch path. | |
6744 | ||
6745 | The branch path indicates which branches should be followed. If a non-zero | |
6746 | path size is specified, the block should be rescanned and a different set | |
6747 | of branches will be taken. The branch path is only used if | |
8b3686ed | 6748 | FLAG_CSE_FOLLOW_JUMPS or FLAG_CSE_SKIP_BLOCKS is non-zero. |
7afe21cc RK |
6749 | |
6750 | DATA is a pointer to a struct cse_basic_block_data, defined below, that is | |
6751 | used to describe the block. It is filled in with the information about | |
6752 | the current block. The incoming structure's branch path, if any, is used | |
6753 | to construct the output branch path. */ | |
6754 | ||
7afe21cc | 6755 | void |
8b3686ed | 6756 | cse_end_of_basic_block (insn, data, follow_jumps, after_loop, skip_blocks) |
7afe21cc RK |
6757 | rtx insn; |
6758 | struct cse_basic_block_data *data; | |
6759 | int follow_jumps; | |
6760 | int after_loop; | |
8b3686ed | 6761 | int skip_blocks; |
7afe21cc RK |
6762 | { |
6763 | rtx p = insn, q; | |
6764 | int nsets = 0; | |
6765 | int low_cuid = INSN_CUID (insn), high_cuid = INSN_CUID (insn); | |
2c3c49de | 6766 | rtx next = INSN_P (insn) ? insn : next_real_insn (insn); |
7afe21cc RK |
6767 | int path_size = data->path_size; |
6768 | int path_entry = 0; | |
6769 | int i; | |
6770 | ||
6771 | /* Update the previous branch path, if any. If the last branch was | |
6772 | previously TAKEN, mark it NOT_TAKEN. If it was previously NOT_TAKEN, | |
6773 | shorten the path by one and look at the previous branch. We know that | |
6774 | at least one branch must have been taken if PATH_SIZE is non-zero. */ | |
6775 | while (path_size > 0) | |
6776 | { | |
8b3686ed | 6777 | if (data->path[path_size - 1].status != NOT_TAKEN) |
7afe21cc RK |
6778 | { |
6779 | data->path[path_size - 1].status = NOT_TAKEN; | |
6780 | break; | |
6781 | } | |
6782 | else | |
6783 | path_size--; | |
6784 | } | |
6785 | ||
16b702cd MM |
6786 | /* If the first instruction is marked with QImode, that means we've |
6787 | already processed this block. Our caller will look at DATA->LAST | |
6788 | to figure out where to go next. We want to return the next block | |
6789 | in the instruction stream, not some branched-to block somewhere | |
6790 | else. We accomplish this by pretending our called forbid us to | |
6791 | follow jumps, or skip blocks. */ | |
6792 | if (GET_MODE (insn) == QImode) | |
6793 | follow_jumps = skip_blocks = 0; | |
6794 | ||
7afe21cc RK |
6795 | /* Scan to end of this basic block. */ |
6796 | while (p && GET_CODE (p) != CODE_LABEL) | |
6797 | { | |
6798 | /* Don't cse out the end of a loop. This makes a difference | |
6799 | only for the unusual loops that always execute at least once; | |
6800 | all other loops have labels there so we will stop in any case. | |
6801 | Cse'ing out the end of the loop is dangerous because it | |
6802 | might cause an invariant expression inside the loop | |
6803 | to be reused after the end of the loop. This would make it | |
6804 | hard to move the expression out of the loop in loop.c, | |
6805 | especially if it is one of several equivalent expressions | |
6806 | and loop.c would like to eliminate it. | |
6807 | ||
6808 | If we are running after loop.c has finished, we can ignore | |
6809 | the NOTE_INSN_LOOP_END. */ | |
6810 | ||
6811 | if (! after_loop && GET_CODE (p) == NOTE | |
6812 | && NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END) | |
6813 | break; | |
6814 | ||
6815 | /* Don't cse over a call to setjmp; on some machines (eg vax) | |
6816 | the regs restored by the longjmp come from | |
6817 | a later time than the setjmp. */ | |
6818 | if (GET_CODE (p) == NOTE | |
6819 | && NOTE_LINE_NUMBER (p) == NOTE_INSN_SETJMP) | |
6820 | break; | |
6821 | ||
6822 | /* A PARALLEL can have lots of SETs in it, | |
6823 | especially if it is really an ASM_OPERANDS. */ | |
2c3c49de | 6824 | if (INSN_P (p) && GET_CODE (PATTERN (p)) == PARALLEL) |
7afe21cc RK |
6825 | nsets += XVECLEN (PATTERN (p), 0); |
6826 | else if (GET_CODE (p) != NOTE) | |
6827 | nsets += 1; | |
278a83b2 | 6828 | |
164c8956 RK |
6829 | /* Ignore insns made by CSE; they cannot affect the boundaries of |
6830 | the basic block. */ | |
6831 | ||
6832 | if (INSN_UID (p) <= max_uid && INSN_CUID (p) > high_cuid) | |
8b3686ed | 6833 | high_cuid = INSN_CUID (p); |
164c8956 RK |
6834 | if (INSN_UID (p) <= max_uid && INSN_CUID (p) < low_cuid) |
6835 | low_cuid = INSN_CUID (p); | |
7afe21cc RK |
6836 | |
6837 | /* See if this insn is in our branch path. If it is and we are to | |
6838 | take it, do so. */ | |
6839 | if (path_entry < path_size && data->path[path_entry].branch == p) | |
6840 | { | |
8b3686ed | 6841 | if (data->path[path_entry].status != NOT_TAKEN) |
7afe21cc | 6842 | p = JUMP_LABEL (p); |
278a83b2 | 6843 | |
7afe21cc RK |
6844 | /* Point to next entry in path, if any. */ |
6845 | path_entry++; | |
6846 | } | |
6847 | ||
6848 | /* If this is a conditional jump, we can follow it if -fcse-follow-jumps | |
6849 | was specified, we haven't reached our maximum path length, there are | |
6850 | insns following the target of the jump, this is the only use of the | |
8b3686ed RK |
6851 | jump label, and the target label is preceded by a BARRIER. |
6852 | ||
6853 | Alternatively, we can follow the jump if it branches around a | |
6854 | block of code and there are no other branches into the block. | |
6855 | In this case invalidate_skipped_block will be called to invalidate any | |
6856 | registers set in the block when following the jump. */ | |
6857 | ||
6858 | else if ((follow_jumps || skip_blocks) && path_size < PATHLENGTH - 1 | |
7afe21cc | 6859 | && GET_CODE (p) == JUMP_INSN |
278a83b2 | 6860 | && GET_CODE (PATTERN (p)) == SET |
7afe21cc | 6861 | && GET_CODE (SET_SRC (PATTERN (p))) == IF_THEN_ELSE |
85c3ba60 | 6862 | && JUMP_LABEL (p) != 0 |
7afe21cc RK |
6863 | && LABEL_NUSES (JUMP_LABEL (p)) == 1 |
6864 | && NEXT_INSN (JUMP_LABEL (p)) != 0) | |
6865 | { | |
6866 | for (q = PREV_INSN (JUMP_LABEL (p)); q; q = PREV_INSN (q)) | |
6867 | if ((GET_CODE (q) != NOTE | |
278a83b2 KH |
6868 | || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END |
6869 | || NOTE_LINE_NUMBER (q) == NOTE_INSN_SETJMP) | |
6870 | && (GET_CODE (q) != CODE_LABEL || LABEL_NUSES (q) != 0)) | |
7afe21cc RK |
6871 | break; |
6872 | ||
6873 | /* If we ran into a BARRIER, this code is an extension of the | |
6874 | basic block when the branch is taken. */ | |
8b3686ed | 6875 | if (follow_jumps && q != 0 && GET_CODE (q) == BARRIER) |
7afe21cc RK |
6876 | { |
6877 | /* Don't allow ourself to keep walking around an | |
6878 | always-executed loop. */ | |
fc3ffe83 RK |
6879 | if (next_real_insn (q) == next) |
6880 | { | |
6881 | p = NEXT_INSN (p); | |
6882 | continue; | |
6883 | } | |
7afe21cc RK |
6884 | |
6885 | /* Similarly, don't put a branch in our path more than once. */ | |
6886 | for (i = 0; i < path_entry; i++) | |
6887 | if (data->path[i].branch == p) | |
6888 | break; | |
6889 | ||
6890 | if (i != path_entry) | |
6891 | break; | |
6892 | ||
6893 | data->path[path_entry].branch = p; | |
6894 | data->path[path_entry++].status = TAKEN; | |
6895 | ||
6896 | /* This branch now ends our path. It was possible that we | |
6897 | didn't see this branch the last time around (when the | |
6898 | insn in front of the target was a JUMP_INSN that was | |
6899 | turned into a no-op). */ | |
6900 | path_size = path_entry; | |
6901 | ||
6902 | p = JUMP_LABEL (p); | |
6903 | /* Mark block so we won't scan it again later. */ | |
6904 | PUT_MODE (NEXT_INSN (p), QImode); | |
6905 | } | |
8b3686ed RK |
6906 | /* Detect a branch around a block of code. */ |
6907 | else if (skip_blocks && q != 0 && GET_CODE (q) != CODE_LABEL) | |
6908 | { | |
6909 | register rtx tmp; | |
6910 | ||
fc3ffe83 RK |
6911 | if (next_real_insn (q) == next) |
6912 | { | |
6913 | p = NEXT_INSN (p); | |
6914 | continue; | |
6915 | } | |
8b3686ed RK |
6916 | |
6917 | for (i = 0; i < path_entry; i++) | |
6918 | if (data->path[i].branch == p) | |
6919 | break; | |
6920 | ||
6921 | if (i != path_entry) | |
6922 | break; | |
6923 | ||
6924 | /* This is no_labels_between_p (p, q) with an added check for | |
6925 | reaching the end of a function (in case Q precedes P). */ | |
6926 | for (tmp = NEXT_INSN (p); tmp && tmp != q; tmp = NEXT_INSN (tmp)) | |
6927 | if (GET_CODE (tmp) == CODE_LABEL) | |
6928 | break; | |
278a83b2 | 6929 | |
8b3686ed RK |
6930 | if (tmp == q) |
6931 | { | |
6932 | data->path[path_entry].branch = p; | |
6933 | data->path[path_entry++].status = AROUND; | |
6934 | ||
6935 | path_size = path_entry; | |
6936 | ||
6937 | p = JUMP_LABEL (p); | |
6938 | /* Mark block so we won't scan it again later. */ | |
6939 | PUT_MODE (NEXT_INSN (p), QImode); | |
6940 | } | |
6941 | } | |
7afe21cc | 6942 | } |
7afe21cc RK |
6943 | p = NEXT_INSN (p); |
6944 | } | |
6945 | ||
6946 | data->low_cuid = low_cuid; | |
6947 | data->high_cuid = high_cuid; | |
6948 | data->nsets = nsets; | |
6949 | data->last = p; | |
6950 | ||
6951 | /* If all jumps in the path are not taken, set our path length to zero | |
6952 | so a rescan won't be done. */ | |
6953 | for (i = path_size - 1; i >= 0; i--) | |
8b3686ed | 6954 | if (data->path[i].status != NOT_TAKEN) |
7afe21cc RK |
6955 | break; |
6956 | ||
6957 | if (i == -1) | |
6958 | data->path_size = 0; | |
6959 | else | |
6960 | data->path_size = path_size; | |
6961 | ||
6962 | /* End the current branch path. */ | |
6963 | data->path[path_size].branch = 0; | |
6964 | } | |
6965 | \f | |
7afe21cc RK |
6966 | /* Perform cse on the instructions of a function. |
6967 | F is the first instruction. | |
6968 | NREGS is one plus the highest pseudo-reg number used in the instruction. | |
6969 | ||
6970 | AFTER_LOOP is 1 if this is the cse call done after loop optimization | |
6971 | (only if -frerun-cse-after-loop). | |
6972 | ||
6973 | Returns 1 if jump_optimize should be redone due to simplifications | |
6974 | in conditional jump instructions. */ | |
6975 | ||
6976 | int | |
6977 | cse_main (f, nregs, after_loop, file) | |
6978 | rtx f; | |
6979 | int nregs; | |
6980 | int after_loop; | |
6981 | FILE *file; | |
6982 | { | |
6983 | struct cse_basic_block_data val; | |
6984 | register rtx insn = f; | |
6985 | register int i; | |
6986 | ||
6987 | cse_jumps_altered = 0; | |
a5dfb4ee | 6988 | recorded_label_ref = 0; |
7afe21cc RK |
6989 | constant_pool_entries_cost = 0; |
6990 | val.path_size = 0; | |
6991 | ||
6992 | init_recog (); | |
9ae8ffe7 | 6993 | init_alias_analysis (); |
7afe21cc RK |
6994 | |
6995 | max_reg = nregs; | |
6996 | ||
556c714b JW |
6997 | max_insn_uid = get_max_uid (); |
6998 | ||
1bb98cec | 6999 | reg_eqv_table = (struct reg_eqv_elem *) |
eb33f744 | 7000 | xmalloc (nregs * sizeof (struct reg_eqv_elem)); |
7afe21cc | 7001 | |
7bac1be0 RK |
7002 | #ifdef LOAD_EXTEND_OP |
7003 | ||
7004 | /* Allocate scratch rtl here. cse_insn will fill in the memory reference | |
7005 | and change the code and mode as appropriate. */ | |
38a448ca | 7006 | memory_extend_rtx = gen_rtx_ZERO_EXTEND (VOIDmode, NULL_RTX); |
7bac1be0 RK |
7007 | #endif |
7008 | ||
7afe21cc RK |
7009 | /* Discard all the free elements of the previous function |
7010 | since they are allocated in the temporarily obstack. */ | |
4c9a05bc | 7011 | bzero ((char *) table, sizeof table); |
7afe21cc RK |
7012 | free_element_chain = 0; |
7013 | n_elements_made = 0; | |
7014 | ||
7015 | /* Find the largest uid. */ | |
7016 | ||
164c8956 | 7017 | max_uid = get_max_uid (); |
75c6bd46 | 7018 | uid_cuid = (int *) xcalloc (max_uid + 1, sizeof (int)); |
7afe21cc RK |
7019 | |
7020 | /* Compute the mapping from uids to cuids. | |
7021 | CUIDs are numbers assigned to insns, like uids, | |
7022 | except that cuids increase monotonically through the code. | |
7023 | Don't assign cuids to line-number NOTEs, so that the distance in cuids | |
7024 | between two insns is not affected by -g. */ | |
7025 | ||
7026 | for (insn = f, i = 0; insn; insn = NEXT_INSN (insn)) | |
7027 | { | |
7028 | if (GET_CODE (insn) != NOTE | |
7029 | || NOTE_LINE_NUMBER (insn) < 0) | |
7030 | INSN_CUID (insn) = ++i; | |
7031 | else | |
7032 | /* Give a line number note the same cuid as preceding insn. */ | |
7033 | INSN_CUID (insn) = i; | |
7034 | } | |
7035 | ||
7036 | /* Initialize which registers are clobbered by calls. */ | |
7037 | ||
7038 | CLEAR_HARD_REG_SET (regs_invalidated_by_call); | |
7039 | ||
7040 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
7041 | if ((call_used_regs[i] | |
7042 | /* Used to check !fixed_regs[i] here, but that isn't safe; | |
7043 | fixed regs are still call-clobbered, and sched can get | |
7044 | confused if they can "live across calls". | |
7045 | ||
7046 | The frame pointer is always preserved across calls. The arg | |
7047 | pointer is if it is fixed. The stack pointer usually is, unless | |
7048 | RETURN_POPS_ARGS, in which case an explicit CLOBBER | |
7049 | will be present. If we are generating PIC code, the PIC offset | |
7050 | table register is preserved across calls. */ | |
7051 | ||
7052 | && i != STACK_POINTER_REGNUM | |
7053 | && i != FRAME_POINTER_REGNUM | |
8bc169f2 DE |
7054 | #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM |
7055 | && i != HARD_FRAME_POINTER_REGNUM | |
7056 | #endif | |
7afe21cc RK |
7057 | #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM |
7058 | && ! (i == ARG_POINTER_REGNUM && fixed_regs[i]) | |
7059 | #endif | |
be8fe470 | 7060 | #if defined (PIC_OFFSET_TABLE_REGNUM) && !defined (PIC_OFFSET_TABLE_REG_CALL_CLOBBERED) |
7afe21cc RK |
7061 | && ! (i == PIC_OFFSET_TABLE_REGNUM && flag_pic) |
7062 | #endif | |
7063 | ) | |
7064 | || global_regs[i]) | |
7065 | SET_HARD_REG_BIT (regs_invalidated_by_call, i); | |
7066 | ||
1497faf6 RH |
7067 | if (ggc_p) |
7068 | ggc_push_context (); | |
7069 | ||
7afe21cc RK |
7070 | /* Loop over basic blocks. |
7071 | Compute the maximum number of qty's needed for each basic block | |
7072 | (which is 2 for each SET). */ | |
7073 | insn = f; | |
7074 | while (insn) | |
7075 | { | |
4eadede7 | 7076 | cse_altered = 0; |
8b3686ed RK |
7077 | cse_end_of_basic_block (insn, &val, flag_cse_follow_jumps, after_loop, |
7078 | flag_cse_skip_blocks); | |
7afe21cc RK |
7079 | |
7080 | /* If this basic block was already processed or has no sets, skip it. */ | |
7081 | if (val.nsets == 0 || GET_MODE (insn) == QImode) | |
7082 | { | |
7083 | PUT_MODE (insn, VOIDmode); | |
7084 | insn = (val.last ? NEXT_INSN (val.last) : 0); | |
7085 | val.path_size = 0; | |
7086 | continue; | |
7087 | } | |
7088 | ||
7089 | cse_basic_block_start = val.low_cuid; | |
7090 | cse_basic_block_end = val.high_cuid; | |
7091 | max_qty = val.nsets * 2; | |
278a83b2 | 7092 | |
7afe21cc | 7093 | if (file) |
ab87f8c8 | 7094 | fnotice (file, ";; Processing block from %d to %d, %d sets.\n", |
7afe21cc RK |
7095 | INSN_UID (insn), val.last ? INSN_UID (val.last) : 0, |
7096 | val.nsets); | |
7097 | ||
7098 | /* Make MAX_QTY bigger to give us room to optimize | |
7099 | past the end of this basic block, if that should prove useful. */ | |
7100 | if (max_qty < 500) | |
7101 | max_qty = 500; | |
7102 | ||
7103 | max_qty += max_reg; | |
7104 | ||
7105 | /* If this basic block is being extended by following certain jumps, | |
7106 | (see `cse_end_of_basic_block'), we reprocess the code from the start. | |
7107 | Otherwise, we start after this basic block. */ | |
7108 | if (val.path_size > 0) | |
278a83b2 | 7109 | cse_basic_block (insn, val.last, val.path, 0); |
7afe21cc RK |
7110 | else |
7111 | { | |
7112 | int old_cse_jumps_altered = cse_jumps_altered; | |
7113 | rtx temp; | |
7114 | ||
7115 | /* When cse changes a conditional jump to an unconditional | |
7116 | jump, we want to reprocess the block, since it will give | |
7117 | us a new branch path to investigate. */ | |
7118 | cse_jumps_altered = 0; | |
7119 | temp = cse_basic_block (insn, val.last, val.path, ! after_loop); | |
8b3686ed RK |
7120 | if (cse_jumps_altered == 0 |
7121 | || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0)) | |
7afe21cc RK |
7122 | insn = temp; |
7123 | ||
7124 | cse_jumps_altered |= old_cse_jumps_altered; | |
7125 | } | |
7126 | ||
4eadede7 | 7127 | if (ggc_p && cse_altered) |
1497faf6 RH |
7128 | ggc_collect (); |
7129 | ||
7afe21cc RK |
7130 | #ifdef USE_C_ALLOCA |
7131 | alloca (0); | |
7132 | #endif | |
7133 | } | |
7134 | ||
1497faf6 RH |
7135 | if (ggc_p) |
7136 | ggc_pop_context (); | |
7137 | ||
7afe21cc RK |
7138 | if (max_elements_made < n_elements_made) |
7139 | max_elements_made = n_elements_made; | |
7140 | ||
e05e2395 MM |
7141 | /* Clean up. */ |
7142 | end_alias_analysis (); | |
75c6bd46 | 7143 | free (uid_cuid); |
1bb98cec | 7144 | free (reg_eqv_table); |
e05e2395 | 7145 | |
a5dfb4ee | 7146 | return cse_jumps_altered || recorded_label_ref; |
7afe21cc RK |
7147 | } |
7148 | ||
7149 | /* Process a single basic block. FROM and TO and the limits of the basic | |
7150 | block. NEXT_BRANCH points to the branch path when following jumps or | |
7151 | a null path when not following jumps. | |
7152 | ||
7153 | AROUND_LOOP is non-zero if we are to try to cse around to the start of a | |
7154 | loop. This is true when we are being called for the last time on a | |
7155 | block and this CSE pass is before loop.c. */ | |
7156 | ||
7157 | static rtx | |
7158 | cse_basic_block (from, to, next_branch, around_loop) | |
7159 | register rtx from, to; | |
7160 | struct branch_path *next_branch; | |
7161 | int around_loop; | |
7162 | { | |
7163 | register rtx insn; | |
7164 | int to_usage = 0; | |
7bd8b2a8 | 7165 | rtx libcall_insn = NULL_RTX; |
e9a25f70 | 7166 | int num_insns = 0; |
7afe21cc | 7167 | |
1bb98cec DM |
7168 | /* This array is undefined before max_reg, so only allocate |
7169 | the space actually needed and adjust the start. */ | |
7170 | ||
eb33f744 JL |
7171 | qty_table |
7172 | = (struct qty_table_elem *) xmalloc ((max_qty - max_reg) | |
278a83b2 | 7173 | * sizeof (struct qty_table_elem)); |
1bb98cec | 7174 | qty_table -= max_reg; |
7afe21cc RK |
7175 | |
7176 | new_basic_block (); | |
7177 | ||
7178 | /* TO might be a label. If so, protect it from being deleted. */ | |
7179 | if (to != 0 && GET_CODE (to) == CODE_LABEL) | |
7180 | ++LABEL_NUSES (to); | |
7181 | ||
7182 | for (insn = from; insn != to; insn = NEXT_INSN (insn)) | |
7183 | { | |
1d22a2c1 | 7184 | register enum rtx_code code = GET_CODE (insn); |
e9a25f70 | 7185 | |
1d22a2c1 MM |
7186 | /* If we have processed 1,000 insns, flush the hash table to |
7187 | avoid extreme quadratic behavior. We must not include NOTEs | |
c13e8210 | 7188 | in the count since there may be more of them when generating |
1d22a2c1 MM |
7189 | debugging information. If we clear the table at different |
7190 | times, code generated with -g -O might be different than code | |
7191 | generated with -O but not -g. | |
e9a25f70 JL |
7192 | |
7193 | ??? This is a real kludge and needs to be done some other way. | |
7194 | Perhaps for 2.9. */ | |
1d22a2c1 | 7195 | if (code != NOTE && num_insns++ > 1000) |
e9a25f70 | 7196 | { |
01e752d3 | 7197 | flush_hash_table (); |
e9a25f70 JL |
7198 | num_insns = 0; |
7199 | } | |
7afe21cc RK |
7200 | |
7201 | /* See if this is a branch that is part of the path. If so, and it is | |
7202 | to be taken, do so. */ | |
7203 | if (next_branch->branch == insn) | |
7204 | { | |
8b3686ed RK |
7205 | enum taken status = next_branch++->status; |
7206 | if (status != NOT_TAKEN) | |
7afe21cc | 7207 | { |
8b3686ed RK |
7208 | if (status == TAKEN) |
7209 | record_jump_equiv (insn, 1); | |
7210 | else | |
7211 | invalidate_skipped_block (NEXT_INSN (insn)); | |
7212 | ||
7afe21cc RK |
7213 | /* Set the last insn as the jump insn; it doesn't affect cc0. |
7214 | Then follow this branch. */ | |
7215 | #ifdef HAVE_cc0 | |
7216 | prev_insn_cc0 = 0; | |
7217 | #endif | |
7218 | prev_insn = insn; | |
7219 | insn = JUMP_LABEL (insn); | |
7220 | continue; | |
7221 | } | |
7222 | } | |
278a83b2 | 7223 | |
7afe21cc RK |
7224 | if (GET_MODE (insn) == QImode) |
7225 | PUT_MODE (insn, VOIDmode); | |
7226 | ||
7227 | if (GET_RTX_CLASS (code) == 'i') | |
7228 | { | |
7bd8b2a8 JL |
7229 | rtx p; |
7230 | ||
7afe21cc RK |
7231 | /* Process notes first so we have all notes in canonical forms when |
7232 | looking for duplicate operations. */ | |
7233 | ||
7234 | if (REG_NOTES (insn)) | |
906c4e36 | 7235 | REG_NOTES (insn) = cse_process_notes (REG_NOTES (insn), NULL_RTX); |
7afe21cc RK |
7236 | |
7237 | /* Track when we are inside in LIBCALL block. Inside such a block, | |
7238 | we do not want to record destinations. The last insn of a | |
7239 | LIBCALL block is not considered to be part of the block, since | |
830a38ee | 7240 | its destination is the result of the block and hence should be |
7afe21cc RK |
7241 | recorded. */ |
7242 | ||
efc9bd41 RK |
7243 | if (REG_NOTES (insn) != 0) |
7244 | { | |
7245 | if ((p = find_reg_note (insn, REG_LIBCALL, NULL_RTX))) | |
7246 | libcall_insn = XEXP (p, 0); | |
7247 | else if (find_reg_note (insn, REG_RETVAL, NULL_RTX)) | |
7248 | libcall_insn = 0; | |
7249 | } | |
7afe21cc | 7250 | |
7bd8b2a8 | 7251 | cse_insn (insn, libcall_insn); |
7afe21cc RK |
7252 | } |
7253 | ||
7254 | /* If INSN is now an unconditional jump, skip to the end of our | |
7255 | basic block by pretending that we just did the last insn in the | |
7256 | basic block. If we are jumping to the end of our block, show | |
7257 | that we can have one usage of TO. */ | |
7258 | ||
7f1c097d | 7259 | if (any_uncondjump_p (insn)) |
7afe21cc RK |
7260 | { |
7261 | if (to == 0) | |
fa0933ba JL |
7262 | { |
7263 | free (qty_table + max_reg); | |
7264 | return 0; | |
7265 | } | |
7afe21cc RK |
7266 | |
7267 | if (JUMP_LABEL (insn) == to) | |
7268 | to_usage = 1; | |
7269 | ||
6a5293dc RS |
7270 | /* Maybe TO was deleted because the jump is unconditional. |
7271 | If so, there is nothing left in this basic block. */ | |
7272 | /* ??? Perhaps it would be smarter to set TO | |
278a83b2 | 7273 | to whatever follows this insn, |
6a5293dc RS |
7274 | and pretend the basic block had always ended here. */ |
7275 | if (INSN_DELETED_P (to)) | |
7276 | break; | |
7277 | ||
7afe21cc RK |
7278 | insn = PREV_INSN (to); |
7279 | } | |
7280 | ||
7281 | /* See if it is ok to keep on going past the label | |
7282 | which used to end our basic block. Remember that we incremented | |
d45cf215 | 7283 | the count of that label, so we decrement it here. If we made |
7afe21cc RK |
7284 | a jump unconditional, TO_USAGE will be one; in that case, we don't |
7285 | want to count the use in that jump. */ | |
7286 | ||
7287 | if (to != 0 && NEXT_INSN (insn) == to | |
7288 | && GET_CODE (to) == CODE_LABEL && --LABEL_NUSES (to) == to_usage) | |
7289 | { | |
7290 | struct cse_basic_block_data val; | |
146135d6 | 7291 | rtx prev; |
7afe21cc RK |
7292 | |
7293 | insn = NEXT_INSN (to); | |
7294 | ||
146135d6 RK |
7295 | /* If TO was the last insn in the function, we are done. */ |
7296 | if (insn == 0) | |
fa0933ba JL |
7297 | { |
7298 | free (qty_table + max_reg); | |
7299 | return 0; | |
7300 | } | |
7afe21cc | 7301 | |
146135d6 RK |
7302 | /* If TO was preceded by a BARRIER we are done with this block |
7303 | because it has no continuation. */ | |
7304 | prev = prev_nonnote_insn (to); | |
7305 | if (prev && GET_CODE (prev) == BARRIER) | |
fa0933ba JL |
7306 | { |
7307 | free (qty_table + max_reg); | |
7308 | return insn; | |
7309 | } | |
146135d6 RK |
7310 | |
7311 | /* Find the end of the following block. Note that we won't be | |
7312 | following branches in this case. */ | |
7afe21cc RK |
7313 | to_usage = 0; |
7314 | val.path_size = 0; | |
8b3686ed | 7315 | cse_end_of_basic_block (insn, &val, 0, 0, 0); |
7afe21cc RK |
7316 | |
7317 | /* If the tables we allocated have enough space left | |
7318 | to handle all the SETs in the next basic block, | |
7319 | continue through it. Otherwise, return, | |
7320 | and that block will be scanned individually. */ | |
7321 | if (val.nsets * 2 + next_qty > max_qty) | |
7322 | break; | |
7323 | ||
7324 | cse_basic_block_start = val.low_cuid; | |
7325 | cse_basic_block_end = val.high_cuid; | |
7326 | to = val.last; | |
7327 | ||
7328 | /* Prevent TO from being deleted if it is a label. */ | |
7329 | if (to != 0 && GET_CODE (to) == CODE_LABEL) | |
7330 | ++LABEL_NUSES (to); | |
7331 | ||
7332 | /* Back up so we process the first insn in the extension. */ | |
7333 | insn = PREV_INSN (insn); | |
7334 | } | |
7335 | } | |
7336 | ||
7337 | if (next_qty > max_qty) | |
7338 | abort (); | |
7339 | ||
7340 | /* If we are running before loop.c, we stopped on a NOTE_INSN_LOOP_END, and | |
7341 | the previous insn is the only insn that branches to the head of a loop, | |
7342 | we can cse into the loop. Don't do this if we changed the jump | |
7343 | structure of a loop unless we aren't going to be following jumps. */ | |
7344 | ||
8b3686ed RK |
7345 | if ((cse_jumps_altered == 0 |
7346 | || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0)) | |
7afe21cc RK |
7347 | && around_loop && to != 0 |
7348 | && GET_CODE (to) == NOTE && NOTE_LINE_NUMBER (to) == NOTE_INSN_LOOP_END | |
7349 | && GET_CODE (PREV_INSN (to)) == JUMP_INSN | |
7350 | && JUMP_LABEL (PREV_INSN (to)) != 0 | |
7351 | && LABEL_NUSES (JUMP_LABEL (PREV_INSN (to))) == 1) | |
7352 | cse_around_loop (JUMP_LABEL (PREV_INSN (to))); | |
7353 | ||
1bb98cec | 7354 | free (qty_table + max_reg); |
75c6bd46 | 7355 | |
7afe21cc RK |
7356 | return to ? NEXT_INSN (to) : 0; |
7357 | } | |
7358 | \f | |
7359 | /* Count the number of times registers are used (not set) in X. | |
7360 | COUNTS is an array in which we accumulate the count, INCR is how much | |
278a83b2 | 7361 | we count each register usage. |
79644f06 | 7362 | |
278a83b2 | 7363 | Don't count a usage of DEST, which is the SET_DEST of a SET which |
79644f06 RK |
7364 | contains X in its SET_SRC. This is because such a SET does not |
7365 | modify the liveness of DEST. */ | |
7afe21cc RK |
7366 | |
7367 | static void | |
79644f06 | 7368 | count_reg_usage (x, counts, dest, incr) |
7afe21cc RK |
7369 | rtx x; |
7370 | int *counts; | |
79644f06 | 7371 | rtx dest; |
7afe21cc RK |
7372 | int incr; |
7373 | { | |
f1e7c95f | 7374 | enum rtx_code code; |
6f7d635c | 7375 | const char *fmt; |
7afe21cc RK |
7376 | int i, j; |
7377 | ||
f1e7c95f RK |
7378 | if (x == 0) |
7379 | return; | |
7380 | ||
7381 | switch (code = GET_CODE (x)) | |
7afe21cc RK |
7382 | { |
7383 | case REG: | |
79644f06 RK |
7384 | if (x != dest) |
7385 | counts[REGNO (x)] += incr; | |
7afe21cc RK |
7386 | return; |
7387 | ||
7388 | case PC: | |
7389 | case CC0: | |
7390 | case CONST: | |
7391 | case CONST_INT: | |
7392 | case CONST_DOUBLE: | |
7393 | case SYMBOL_REF: | |
7394 | case LABEL_REF: | |
02e39abc JL |
7395 | return; |
7396 | ||
278a83b2 | 7397 | case CLOBBER: |
02e39abc JL |
7398 | /* If we are clobbering a MEM, mark any registers inside the address |
7399 | as being used. */ | |
7400 | if (GET_CODE (XEXP (x, 0)) == MEM) | |
7401 | count_reg_usage (XEXP (XEXP (x, 0), 0), counts, NULL_RTX, incr); | |
7afe21cc RK |
7402 | return; |
7403 | ||
7404 | case SET: | |
7405 | /* Unless we are setting a REG, count everything in SET_DEST. */ | |
7406 | if (GET_CODE (SET_DEST (x)) != REG) | |
79644f06 | 7407 | count_reg_usage (SET_DEST (x), counts, NULL_RTX, incr); |
9ff08f70 RK |
7408 | |
7409 | /* If SRC has side-effects, then we can't delete this insn, so the | |
7410 | usage of SET_DEST inside SRC counts. | |
7411 | ||
7412 | ??? Strictly-speaking, we might be preserving this insn | |
7413 | because some other SET has side-effects, but that's hard | |
7414 | to do and can't happen now. */ | |
7415 | count_reg_usage (SET_SRC (x), counts, | |
7416 | side_effects_p (SET_SRC (x)) ? NULL_RTX : SET_DEST (x), | |
7417 | incr); | |
7afe21cc RK |
7418 | return; |
7419 | ||
f1e7c95f RK |
7420 | case CALL_INSN: |
7421 | count_reg_usage (CALL_INSN_FUNCTION_USAGE (x), counts, NULL_RTX, incr); | |
ddc356e8 | 7422 | /* Fall through. */ |
f1e7c95f | 7423 | |
7afe21cc RK |
7424 | case INSN: |
7425 | case JUMP_INSN: | |
79644f06 | 7426 | count_reg_usage (PATTERN (x), counts, NULL_RTX, incr); |
7afe21cc RK |
7427 | |
7428 | /* Things used in a REG_EQUAL note aren't dead since loop may try to | |
7429 | use them. */ | |
7430 | ||
f1e7c95f | 7431 | count_reg_usage (REG_NOTES (x), counts, NULL_RTX, incr); |
7afe21cc RK |
7432 | return; |
7433 | ||
7434 | case EXPR_LIST: | |
7435 | case INSN_LIST: | |
f1e7c95f | 7436 | if (REG_NOTE_KIND (x) == REG_EQUAL |
c6a26dc4 | 7437 | || (REG_NOTE_KIND (x) != REG_NONNEG && GET_CODE (XEXP (x,0)) == USE)) |
79644f06 | 7438 | count_reg_usage (XEXP (x, 0), counts, NULL_RTX, incr); |
f1e7c95f | 7439 | count_reg_usage (XEXP (x, 1), counts, NULL_RTX, incr); |
7afe21cc | 7440 | return; |
278a83b2 | 7441 | |
e9a25f70 JL |
7442 | default: |
7443 | break; | |
7afe21cc RK |
7444 | } |
7445 | ||
7446 | fmt = GET_RTX_FORMAT (code); | |
7447 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
7448 | { | |
7449 | if (fmt[i] == 'e') | |
79644f06 | 7450 | count_reg_usage (XEXP (x, i), counts, dest, incr); |
7afe21cc RK |
7451 | else if (fmt[i] == 'E') |
7452 | for (j = XVECLEN (x, i) - 1; j >= 0; j--) | |
79644f06 | 7453 | count_reg_usage (XVECEXP (x, i, j), counts, dest, incr); |
7afe21cc RK |
7454 | } |
7455 | } | |
7456 | \f | |
7457 | /* Scan all the insns and delete any that are dead; i.e., they store a register | |
7458 | that is never used or they copy a register to itself. | |
7459 | ||
c6a26dc4 JL |
7460 | This is used to remove insns made obviously dead by cse, loop or other |
7461 | optimizations. It improves the heuristics in loop since it won't try to | |
7462 | move dead invariants out of loops or make givs for dead quantities. The | |
7463 | remaining passes of the compilation are also sped up. */ | |
7afe21cc RK |
7464 | |
7465 | void | |
c6a26dc4 | 7466 | delete_trivially_dead_insns (insns, nreg) |
7afe21cc RK |
7467 | rtx insns; |
7468 | int nreg; | |
7469 | { | |
4da896b2 | 7470 | int *counts; |
77fa0940 | 7471 | rtx insn, prev; |
51723711 | 7472 | #ifdef HAVE_cc0 |
d45cf215 | 7473 | rtx tem; |
51723711 | 7474 | #endif |
7afe21cc | 7475 | int i; |
614bb5d4 | 7476 | int in_libcall = 0, dead_libcall = 0; |
7afe21cc RK |
7477 | |
7478 | /* First count the number of times each register is used. */ | |
4da896b2 | 7479 | counts = (int *) xcalloc (nreg, sizeof (int)); |
7afe21cc | 7480 | for (insn = next_real_insn (insns); insn; insn = next_real_insn (insn)) |
79644f06 | 7481 | count_reg_usage (insn, counts, NULL_RTX, 1); |
7afe21cc RK |
7482 | |
7483 | /* Go from the last insn to the first and delete insns that only set unused | |
7484 | registers or copy a register to itself. As we delete an insn, remove | |
278a83b2 | 7485 | usage counts for registers it uses. |
8d71a510 JL |
7486 | |
7487 | The first jump optimization pass may leave a real insn as the last | |
7488 | insn in the function. We must not skip that insn or we may end | |
7489 | up deleting code that is not really dead. */ | |
7490 | insn = get_last_insn (); | |
2c3c49de | 7491 | if (! INSN_P (insn)) |
8d71a510 JL |
7492 | insn = prev_real_insn (insn); |
7493 | ||
278a83b2 | 7494 | for (; insn; insn = prev) |
7afe21cc RK |
7495 | { |
7496 | int live_insn = 0; | |
614bb5d4 | 7497 | rtx note; |
7afe21cc | 7498 | |
77fa0940 RK |
7499 | prev = prev_real_insn (insn); |
7500 | ||
614bb5d4 JL |
7501 | /* Don't delete any insns that are part of a libcall block unless |
7502 | we can delete the whole libcall block. | |
7503 | ||
77fa0940 RK |
7504 | Flow or loop might get confused if we did that. Remember |
7505 | that we are scanning backwards. */ | |
906c4e36 | 7506 | if (find_reg_note (insn, REG_RETVAL, NULL_RTX)) |
614bb5d4 JL |
7507 | { |
7508 | in_libcall = 1; | |
7509 | live_insn = 1; | |
7510 | dead_libcall = 0; | |
e4890d45 | 7511 | |
614bb5d4 JL |
7512 | /* See if there's a REG_EQUAL note on this insn and try to |
7513 | replace the source with the REG_EQUAL expression. | |
278a83b2 | 7514 | |
614bb5d4 JL |
7515 | We assume that insns with REG_RETVALs can only be reg->reg |
7516 | copies at this point. */ | |
7517 | note = find_reg_note (insn, REG_EQUAL, NULL_RTX); | |
7518 | if (note) | |
7519 | { | |
7520 | rtx set = single_set (insn); | |
0cedb36c JL |
7521 | rtx new = simplify_rtx (XEXP (note, 0)); |
7522 | ||
7523 | if (!new) | |
7524 | new = XEXP (note, 0); | |
7525 | ||
7526 | if (set && validate_change (insn, &SET_SRC (set), new, 0)) | |
614bb5d4 JL |
7527 | { |
7528 | remove_note (insn, | |
7529 | find_reg_note (insn, REG_RETVAL, NULL_RTX)); | |
7530 | dead_libcall = 1; | |
7531 | } | |
7532 | } | |
7533 | } | |
7534 | else if (in_libcall) | |
7535 | live_insn = ! dead_libcall; | |
e4890d45 | 7536 | else if (GET_CODE (PATTERN (insn)) == SET) |
7afe21cc | 7537 | { |
e7a59e04 RH |
7538 | if ((GET_CODE (SET_DEST (PATTERN (insn))) == REG |
7539 | || GET_CODE (SET_DEST (PATTERN (insn))) == SUBREG) | |
7540 | && rtx_equal_p (SET_DEST (PATTERN (insn)), | |
7541 | SET_SRC (PATTERN (insn)))) | |
7afe21cc | 7542 | ; |
e8019e47 JW |
7543 | else if (GET_CODE (SET_DEST (PATTERN (insn))) == STRICT_LOW_PART |
7544 | && rtx_equal_p (XEXP (SET_DEST (PATTERN (insn)), 0), | |
7545 | SET_SRC (PATTERN (insn)))) | |
7546 | ; | |
7afe21cc | 7547 | |
d45cf215 RS |
7548 | #ifdef HAVE_cc0 |
7549 | else if (GET_CODE (SET_DEST (PATTERN (insn))) == CC0 | |
7550 | && ! side_effects_p (SET_SRC (PATTERN (insn))) | |
7551 | && ((tem = next_nonnote_insn (insn)) == 0 | |
2c3c49de | 7552 | || ! INSN_P (tem) |
d45cf215 RS |
7553 | || ! reg_referenced_p (cc0_rtx, PATTERN (tem)))) |
7554 | ; | |
7555 | #endif | |
7afe21cc RK |
7556 | else if (GET_CODE (SET_DEST (PATTERN (insn))) != REG |
7557 | || REGNO (SET_DEST (PATTERN (insn))) < FIRST_PSEUDO_REGISTER | |
7558 | || counts[REGNO (SET_DEST (PATTERN (insn)))] != 0 | |
61c48fbf JL |
7559 | || side_effects_p (SET_SRC (PATTERN (insn))) |
7560 | /* An ADDRESSOF expression can turn into a use of the | |
7561 | internal arg pointer, so always consider the | |
7562 | internal arg pointer live. If it is truly dead, | |
7563 | flow will delete the initializing insn. */ | |
7564 | || (SET_DEST (PATTERN (insn)) | |
7565 | == current_function_internal_arg_pointer)) | |
7afe21cc RK |
7566 | live_insn = 1; |
7567 | } | |
7568 | else if (GET_CODE (PATTERN (insn)) == PARALLEL) | |
7569 | for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--) | |
7570 | { | |
7571 | rtx elt = XVECEXP (PATTERN (insn), 0, i); | |
7572 | ||
7573 | if (GET_CODE (elt) == SET) | |
7574 | { | |
e7a59e04 RH |
7575 | if ((GET_CODE (SET_DEST (elt)) == REG |
7576 | || GET_CODE (SET_DEST (elt)) == SUBREG) | |
7577 | && rtx_equal_p (SET_DEST (elt), SET_SRC (elt))) | |
7afe21cc RK |
7578 | ; |
7579 | ||
d45cf215 RS |
7580 | #ifdef HAVE_cc0 |
7581 | else if (GET_CODE (SET_DEST (elt)) == CC0 | |
7582 | && ! side_effects_p (SET_SRC (elt)) | |
7583 | && ((tem = next_nonnote_insn (insn)) == 0 | |
2c3c49de | 7584 | || ! INSN_P (tem) |
d45cf215 RS |
7585 | || ! reg_referenced_p (cc0_rtx, PATTERN (tem)))) |
7586 | ; | |
7587 | #endif | |
7afe21cc RK |
7588 | else if (GET_CODE (SET_DEST (elt)) != REG |
7589 | || REGNO (SET_DEST (elt)) < FIRST_PSEUDO_REGISTER | |
7590 | || counts[REGNO (SET_DEST (elt))] != 0 | |
af37f0dd JL |
7591 | || side_effects_p (SET_SRC (elt)) |
7592 | /* An ADDRESSOF expression can turn into a use of the | |
7593 | internal arg pointer, so always consider the | |
7594 | internal arg pointer live. If it is truly dead, | |
7595 | flow will delete the initializing insn. */ | |
7596 | || (SET_DEST (elt) | |
7597 | == current_function_internal_arg_pointer)) | |
7afe21cc RK |
7598 | live_insn = 1; |
7599 | } | |
7600 | else if (GET_CODE (elt) != CLOBBER && GET_CODE (elt) != USE) | |
7601 | live_insn = 1; | |
7602 | } | |
7603 | else | |
7604 | live_insn = 1; | |
7605 | ||
7606 | /* If this is a dead insn, delete it and show registers in it aren't | |
e4890d45 | 7607 | being used. */ |
7afe21cc | 7608 | |
e4890d45 | 7609 | if (! live_insn) |
7afe21cc | 7610 | { |
79644f06 | 7611 | count_reg_usage (insn, counts, NULL_RTX, -1); |
77fa0940 | 7612 | delete_insn (insn); |
7afe21cc | 7613 | } |
e4890d45 | 7614 | |
906c4e36 | 7615 | if (find_reg_note (insn, REG_LIBCALL, NULL_RTX)) |
614bb5d4 JL |
7616 | { |
7617 | in_libcall = 0; | |
7618 | dead_libcall = 0; | |
7619 | } | |
7afe21cc | 7620 | } |
4da896b2 MM |
7621 | |
7622 | /* Clean up. */ | |
7623 | free (counts); | |
7afe21cc | 7624 | } |