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7afe21cc | 1 | /* Common subexpression elimination for GNU compiler. |
38734e55 | 2 | Copyright (C) 1987, 88, 89, 92-6, 1997 Free Software Foundation, Inc. |
7afe21cc RK |
3 | |
4 | This file is part of GNU CC. | |
5 | ||
6 | GNU CC is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 2, or (at your option) | |
9 | any later version. | |
10 | ||
11 | GNU CC is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with GNU CC; see the file COPYING. If not, write to | |
940d9d63 RK |
18 | the Free Software Foundation, 59 Temple Place - Suite 330, |
19 | Boston, MA 02111-1307, USA. */ | |
7afe21cc RK |
20 | |
21 | ||
22 | #include "config.h" | |
9c3b4c8b RS |
23 | /* Must precede rtl.h for FFS. */ |
24 | #include <stdio.h> | |
25 | ||
7afe21cc RK |
26 | #include "rtl.h" |
27 | #include "regs.h" | |
28 | #include "hard-reg-set.h" | |
29 | #include "flags.h" | |
30 | #include "real.h" | |
31 | #include "insn-config.h" | |
32 | #include "recog.h" | |
33 | ||
7afe21cc RK |
34 | #include <setjmp.h> |
35 | ||
36 | /* The basic idea of common subexpression elimination is to go | |
37 | through the code, keeping a record of expressions that would | |
38 | have the same value at the current scan point, and replacing | |
39 | expressions encountered with the cheapest equivalent expression. | |
40 | ||
41 | It is too complicated to keep track of the different possibilities | |
42 | when control paths merge; so, at each label, we forget all that is | |
43 | known and start fresh. This can be described as processing each | |
44 | basic block separately. Note, however, that these are not quite | |
45 | the same as the basic blocks found by a later pass and used for | |
46 | data flow analysis and register packing. We do not need to start fresh | |
47 | after a conditional jump instruction if there is no label there. | |
48 | ||
49 | We use two data structures to record the equivalent expressions: | |
50 | a hash table for most expressions, and several vectors together | |
51 | with "quantity numbers" to record equivalent (pseudo) registers. | |
52 | ||
53 | The use of the special data structure for registers is desirable | |
54 | because it is faster. It is possible because registers references | |
55 | contain a fairly small number, the register number, taken from | |
56 | a contiguously allocated series, and two register references are | |
57 | identical if they have the same number. General expressions | |
58 | do not have any such thing, so the only way to retrieve the | |
59 | information recorded on an expression other than a register | |
60 | is to keep it in a hash table. | |
61 | ||
62 | Registers and "quantity numbers": | |
63 | ||
64 | At the start of each basic block, all of the (hardware and pseudo) | |
65 | registers used in the function are given distinct quantity | |
66 | numbers to indicate their contents. During scan, when the code | |
67 | copies one register into another, we copy the quantity number. | |
68 | When a register is loaded in any other way, we allocate a new | |
69 | quantity number to describe the value generated by this operation. | |
70 | `reg_qty' records what quantity a register is currently thought | |
71 | of as containing. | |
72 | ||
73 | All real quantity numbers are greater than or equal to `max_reg'. | |
74 | If register N has not been assigned a quantity, reg_qty[N] will equal N. | |
75 | ||
76 | Quantity numbers below `max_reg' do not exist and none of the `qty_...' | |
77 | variables should be referenced with an index below `max_reg'. | |
78 | ||
79 | We also maintain a bidirectional chain of registers for each | |
80 | quantity number. `qty_first_reg', `qty_last_reg', | |
81 | `reg_next_eqv' and `reg_prev_eqv' hold these chains. | |
82 | ||
83 | The first register in a chain is the one whose lifespan is least local. | |
84 | Among equals, it is the one that was seen first. | |
85 | We replace any equivalent register with that one. | |
86 | ||
87 | If two registers have the same quantity number, it must be true that | |
88 | REG expressions with `qty_mode' must be in the hash table for both | |
89 | registers and must be in the same class. | |
90 | ||
91 | The converse is not true. Since hard registers may be referenced in | |
92 | any mode, two REG expressions might be equivalent in the hash table | |
93 | but not have the same quantity number if the quantity number of one | |
94 | of the registers is not the same mode as those expressions. | |
95 | ||
96 | Constants and quantity numbers | |
97 | ||
98 | When a quantity has a known constant value, that value is stored | |
99 | in the appropriate element of qty_const. This is in addition to | |
100 | putting the constant in the hash table as is usual for non-regs. | |
101 | ||
d45cf215 | 102 | Whether a reg or a constant is preferred is determined by the configuration |
7afe21cc RK |
103 | macro CONST_COSTS and will often depend on the constant value. In any |
104 | event, expressions containing constants can be simplified, by fold_rtx. | |
105 | ||
106 | When a quantity has a known nearly constant value (such as an address | |
107 | of a stack slot), that value is stored in the appropriate element | |
108 | of qty_const. | |
109 | ||
110 | Integer constants don't have a machine mode. However, cse | |
111 | determines the intended machine mode from the destination | |
112 | of the instruction that moves the constant. The machine mode | |
113 | is recorded in the hash table along with the actual RTL | |
114 | constant expression so that different modes are kept separate. | |
115 | ||
116 | Other expressions: | |
117 | ||
118 | To record known equivalences among expressions in general | |
119 | we use a hash table called `table'. It has a fixed number of buckets | |
120 | that contain chains of `struct table_elt' elements for expressions. | |
121 | These chains connect the elements whose expressions have the same | |
122 | hash codes. | |
123 | ||
124 | Other chains through the same elements connect the elements which | |
125 | currently have equivalent values. | |
126 | ||
127 | Register references in an expression are canonicalized before hashing | |
128 | the expression. This is done using `reg_qty' and `qty_first_reg'. | |
129 | The hash code of a register reference is computed using the quantity | |
130 | number, not the register number. | |
131 | ||
132 | When the value of an expression changes, it is necessary to remove from the | |
133 | hash table not just that expression but all expressions whose values | |
134 | could be different as a result. | |
135 | ||
136 | 1. If the value changing is in memory, except in special cases | |
137 | ANYTHING referring to memory could be changed. That is because | |
138 | nobody knows where a pointer does not point. | |
139 | The function `invalidate_memory' removes what is necessary. | |
140 | ||
141 | The special cases are when the address is constant or is | |
142 | a constant plus a fixed register such as the frame pointer | |
143 | or a static chain pointer. When such addresses are stored in, | |
144 | we can tell exactly which other such addresses must be invalidated | |
145 | due to overlap. `invalidate' does this. | |
146 | All expressions that refer to non-constant | |
147 | memory addresses are also invalidated. `invalidate_memory' does this. | |
148 | ||
149 | 2. If the value changing is a register, all expressions | |
150 | containing references to that register, and only those, | |
151 | must be removed. | |
152 | ||
153 | Because searching the entire hash table for expressions that contain | |
154 | a register is very slow, we try to figure out when it isn't necessary. | |
155 | Precisely, this is necessary only when expressions have been | |
156 | entered in the hash table using this register, and then the value has | |
157 | changed, and then another expression wants to be added to refer to | |
158 | the register's new value. This sequence of circumstances is rare | |
159 | within any one basic block. | |
160 | ||
161 | The vectors `reg_tick' and `reg_in_table' are used to detect this case. | |
162 | reg_tick[i] is incremented whenever a value is stored in register i. | |
163 | reg_in_table[i] holds -1 if no references to register i have been | |
164 | entered in the table; otherwise, it contains the value reg_tick[i] had | |
165 | when the references were entered. If we want to enter a reference | |
166 | and reg_in_table[i] != reg_tick[i], we must scan and remove old references. | |
167 | Until we want to enter a new entry, the mere fact that the two vectors | |
168 | don't match makes the entries be ignored if anyone tries to match them. | |
169 | ||
170 | Registers themselves are entered in the hash table as well as in | |
171 | the equivalent-register chains. However, the vectors `reg_tick' | |
172 | and `reg_in_table' do not apply to expressions which are simple | |
173 | register references. These expressions are removed from the table | |
174 | immediately when they become invalid, and this can be done even if | |
175 | we do not immediately search for all the expressions that refer to | |
176 | the register. | |
177 | ||
178 | A CLOBBER rtx in an instruction invalidates its operand for further | |
179 | reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK | |
180 | invalidates everything that resides in memory. | |
181 | ||
182 | Related expressions: | |
183 | ||
184 | Constant expressions that differ only by an additive integer | |
185 | are called related. When a constant expression is put in | |
186 | the table, the related expression with no constant term | |
187 | is also entered. These are made to point at each other | |
188 | so that it is possible to find out if there exists any | |
189 | register equivalent to an expression related to a given expression. */ | |
190 | ||
191 | /* One plus largest register number used in this function. */ | |
192 | ||
193 | static int max_reg; | |
194 | ||
195 | /* Length of vectors indexed by quantity number. | |
196 | We know in advance we will not need a quantity number this big. */ | |
197 | ||
198 | static int max_qty; | |
199 | ||
200 | /* Next quantity number to be allocated. | |
201 | This is 1 + the largest number needed so far. */ | |
202 | ||
203 | static int next_qty; | |
204 | ||
205 | /* Indexed by quantity number, gives the first (or last) (pseudo) register | |
206 | in the chain of registers that currently contain this quantity. */ | |
207 | ||
208 | static int *qty_first_reg; | |
209 | static int *qty_last_reg; | |
210 | ||
211 | /* Index by quantity number, gives the mode of the quantity. */ | |
212 | ||
213 | static enum machine_mode *qty_mode; | |
214 | ||
215 | /* Indexed by quantity number, gives the rtx of the constant value of the | |
216 | quantity, or zero if it does not have a known value. | |
217 | A sum of the frame pointer (or arg pointer) plus a constant | |
218 | can also be entered here. */ | |
219 | ||
220 | static rtx *qty_const; | |
221 | ||
222 | /* Indexed by qty number, gives the insn that stored the constant value | |
223 | recorded in `qty_const'. */ | |
224 | ||
225 | static rtx *qty_const_insn; | |
226 | ||
227 | /* The next three variables are used to track when a comparison between a | |
228 | quantity and some constant or register has been passed. In that case, we | |
229 | know the results of the comparison in case we see it again. These variables | |
230 | record a comparison that is known to be true. */ | |
231 | ||
232 | /* Indexed by qty number, gives the rtx code of a comparison with a known | |
233 | result involving this quantity. If none, it is UNKNOWN. */ | |
234 | static enum rtx_code *qty_comparison_code; | |
235 | ||
236 | /* Indexed by qty number, gives the constant being compared against in a | |
237 | comparison of known result. If no such comparison, it is undefined. | |
238 | If the comparison is not with a constant, it is zero. */ | |
239 | ||
240 | static rtx *qty_comparison_const; | |
241 | ||
242 | /* Indexed by qty number, gives the quantity being compared against in a | |
243 | comparison of known result. If no such comparison, if it undefined. | |
244 | If the comparison is not with a register, it is -1. */ | |
245 | ||
246 | static int *qty_comparison_qty; | |
247 | ||
248 | #ifdef HAVE_cc0 | |
249 | /* For machines that have a CC0, we do not record its value in the hash | |
250 | table since its use is guaranteed to be the insn immediately following | |
251 | its definition and any other insn is presumed to invalidate it. | |
252 | ||
253 | Instead, we store below the value last assigned to CC0. If it should | |
254 | happen to be a constant, it is stored in preference to the actual | |
255 | assigned value. In case it is a constant, we store the mode in which | |
256 | the constant should be interpreted. */ | |
257 | ||
258 | static rtx prev_insn_cc0; | |
259 | static enum machine_mode prev_insn_cc0_mode; | |
260 | #endif | |
261 | ||
262 | /* Previous actual insn. 0 if at first insn of basic block. */ | |
263 | ||
264 | static rtx prev_insn; | |
265 | ||
266 | /* Insn being scanned. */ | |
267 | ||
268 | static rtx this_insn; | |
269 | ||
270 | /* Index by (pseudo) register number, gives the quantity number | |
271 | of the register's current contents. */ | |
272 | ||
273 | static int *reg_qty; | |
274 | ||
275 | /* Index by (pseudo) register number, gives the number of the next (or | |
276 | previous) (pseudo) register in the chain of registers sharing the same | |
277 | value. | |
278 | ||
279 | Or -1 if this register is at the end of the chain. | |
280 | ||
281 | If reg_qty[N] == N, reg_next_eqv[N] is undefined. */ | |
282 | ||
283 | static int *reg_next_eqv; | |
284 | static int *reg_prev_eqv; | |
285 | ||
286 | /* Index by (pseudo) register number, gives the number of times | |
287 | that register has been altered in the current basic block. */ | |
288 | ||
289 | static int *reg_tick; | |
290 | ||
291 | /* Index by (pseudo) register number, gives the reg_tick value at which | |
292 | rtx's containing this register are valid in the hash table. | |
293 | If this does not equal the current reg_tick value, such expressions | |
294 | existing in the hash table are invalid. | |
295 | If this is -1, no expressions containing this register have been | |
296 | entered in the table. */ | |
297 | ||
298 | static int *reg_in_table; | |
299 | ||
300 | /* A HARD_REG_SET containing all the hard registers for which there is | |
301 | currently a REG expression in the hash table. Note the difference | |
302 | from the above variables, which indicate if the REG is mentioned in some | |
303 | expression in the table. */ | |
304 | ||
305 | static HARD_REG_SET hard_regs_in_table; | |
306 | ||
307 | /* A HARD_REG_SET containing all the hard registers that are invalidated | |
308 | by a CALL_INSN. */ | |
309 | ||
310 | static HARD_REG_SET regs_invalidated_by_call; | |
311 | ||
312 | /* Two vectors of ints: | |
313 | one containing max_reg -1's; the other max_reg + 500 (an approximation | |
314 | for max_qty) elements where element i contains i. | |
315 | These are used to initialize various other vectors fast. */ | |
316 | ||
317 | static int *all_minus_one; | |
318 | static int *consec_ints; | |
319 | ||
320 | /* CUID of insn that starts the basic block currently being cse-processed. */ | |
321 | ||
322 | static int cse_basic_block_start; | |
323 | ||
324 | /* CUID of insn that ends the basic block currently being cse-processed. */ | |
325 | ||
326 | static int cse_basic_block_end; | |
327 | ||
328 | /* Vector mapping INSN_UIDs to cuids. | |
d45cf215 | 329 | The cuids are like uids but increase monotonically always. |
7afe21cc RK |
330 | We use them to see whether a reg is used outside a given basic block. */ |
331 | ||
906c4e36 | 332 | static int *uid_cuid; |
7afe21cc | 333 | |
164c8956 RK |
334 | /* Highest UID in UID_CUID. */ |
335 | static int max_uid; | |
336 | ||
7afe21cc RK |
337 | /* Get the cuid of an insn. */ |
338 | ||
339 | #define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)]) | |
340 | ||
341 | /* Nonzero if cse has altered conditional jump insns | |
342 | in such a way that jump optimization should be redone. */ | |
343 | ||
344 | static int cse_jumps_altered; | |
345 | ||
a5dfb4ee RK |
346 | /* Nonzero if we put a LABEL_REF into the hash table. Since we may have put |
347 | it into an INSN without a REG_LABEL, we have to rerun jump after CSE | |
348 | to put in the note. */ | |
349 | static int recorded_label_ref; | |
350 | ||
7afe21cc RK |
351 | /* canon_hash stores 1 in do_not_record |
352 | if it notices a reference to CC0, PC, or some other volatile | |
353 | subexpression. */ | |
354 | ||
355 | static int do_not_record; | |
356 | ||
7bac1be0 RK |
357 | #ifdef LOAD_EXTEND_OP |
358 | ||
359 | /* Scratch rtl used when looking for load-extended copy of a MEM. */ | |
360 | static rtx memory_extend_rtx; | |
361 | #endif | |
362 | ||
7afe21cc RK |
363 | /* canon_hash stores 1 in hash_arg_in_memory |
364 | if it notices a reference to memory within the expression being hashed. */ | |
365 | ||
366 | static int hash_arg_in_memory; | |
367 | ||
368 | /* canon_hash stores 1 in hash_arg_in_struct | |
369 | if it notices a reference to memory that's part of a structure. */ | |
370 | ||
371 | static int hash_arg_in_struct; | |
372 | ||
373 | /* The hash table contains buckets which are chains of `struct table_elt's, | |
374 | each recording one expression's information. | |
375 | That expression is in the `exp' field. | |
376 | ||
377 | Those elements with the same hash code are chained in both directions | |
378 | through the `next_same_hash' and `prev_same_hash' fields. | |
379 | ||
380 | Each set of expressions with equivalent values | |
381 | are on a two-way chain through the `next_same_value' | |
382 | and `prev_same_value' fields, and all point with | |
383 | the `first_same_value' field at the first element in | |
384 | that chain. The chain is in order of increasing cost. | |
385 | Each element's cost value is in its `cost' field. | |
386 | ||
387 | The `in_memory' field is nonzero for elements that | |
388 | involve any reference to memory. These elements are removed | |
389 | whenever a write is done to an unidentified location in memory. | |
390 | To be safe, we assume that a memory address is unidentified unless | |
391 | the address is either a symbol constant or a constant plus | |
392 | the frame pointer or argument pointer. | |
393 | ||
394 | The `in_struct' field is nonzero for elements that | |
395 | involve any reference to memory inside a structure or array. | |
396 | ||
397 | The `related_value' field is used to connect related expressions | |
398 | (that differ by adding an integer). | |
399 | The related expressions are chained in a circular fashion. | |
400 | `related_value' is zero for expressions for which this | |
401 | chain is not useful. | |
402 | ||
403 | The `cost' field stores the cost of this element's expression. | |
404 | ||
405 | The `is_const' flag is set if the element is a constant (including | |
406 | a fixed address). | |
407 | ||
408 | The `flag' field is used as a temporary during some search routines. | |
409 | ||
410 | The `mode' field is usually the same as GET_MODE (`exp'), but | |
411 | if `exp' is a CONST_INT and has no machine mode then the `mode' | |
412 | field is the mode it was being used as. Each constant is | |
413 | recorded separately for each mode it is used with. */ | |
414 | ||
415 | ||
416 | struct table_elt | |
417 | { | |
418 | rtx exp; | |
419 | struct table_elt *next_same_hash; | |
420 | struct table_elt *prev_same_hash; | |
421 | struct table_elt *next_same_value; | |
422 | struct table_elt *prev_same_value; | |
423 | struct table_elt *first_same_value; | |
424 | struct table_elt *related_value; | |
425 | int cost; | |
426 | enum machine_mode mode; | |
427 | char in_memory; | |
428 | char in_struct; | |
429 | char is_const; | |
430 | char flag; | |
431 | }; | |
432 | ||
7afe21cc RK |
433 | /* We don't want a lot of buckets, because we rarely have very many |
434 | things stored in the hash table, and a lot of buckets slows | |
435 | down a lot of loops that happen frequently. */ | |
436 | #define NBUCKETS 31 | |
437 | ||
438 | /* Compute hash code of X in mode M. Special-case case where X is a pseudo | |
439 | register (hard registers may require `do_not_record' to be set). */ | |
440 | ||
441 | #define HASH(X, M) \ | |
442 | (GET_CODE (X) == REG && REGNO (X) >= FIRST_PSEUDO_REGISTER \ | |
2197a88a | 443 | ? (((unsigned) REG << 7) + (unsigned) reg_qty[REGNO (X)]) % NBUCKETS \ |
7afe21cc RK |
444 | : canon_hash (X, M) % NBUCKETS) |
445 | ||
446 | /* Determine whether register number N is considered a fixed register for CSE. | |
447 | It is desirable to replace other regs with fixed regs, to reduce need for | |
448 | non-fixed hard regs. | |
449 | A reg wins if it is either the frame pointer or designated as fixed, | |
450 | but not if it is an overlapping register. */ | |
451 | #ifdef OVERLAPPING_REGNO_P | |
452 | #define FIXED_REGNO_P(N) \ | |
8bc169f2 | 453 | (((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \ |
6ab832bc | 454 | || fixed_regs[N] || global_regs[N]) \ |
7afe21cc RK |
455 | && ! OVERLAPPING_REGNO_P ((N))) |
456 | #else | |
457 | #define FIXED_REGNO_P(N) \ | |
8bc169f2 | 458 | ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \ |
6ab832bc | 459 | || fixed_regs[N] || global_regs[N]) |
7afe21cc RK |
460 | #endif |
461 | ||
462 | /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed | |
ac07e066 RK |
463 | hard registers and pointers into the frame are the cheapest with a cost |
464 | of 0. Next come pseudos with a cost of one and other hard registers with | |
465 | a cost of 2. Aside from these special cases, call `rtx_cost'. */ | |
466 | ||
6ab832bc | 467 | #define CHEAP_REGNO(N) \ |
8bc169f2 DE |
468 | ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \ |
469 | || (N) == STACK_POINTER_REGNUM || (N) == ARG_POINTER_REGNUM \ | |
470 | || ((N) >= FIRST_VIRTUAL_REGISTER && (N) <= LAST_VIRTUAL_REGISTER) \ | |
471 | || ((N) < FIRST_PSEUDO_REGISTER \ | |
e7bb59fa | 472 | && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS)) |
7afe21cc | 473 | |
6ab832bc RK |
474 | /* A register is cheap if it is a user variable assigned to the register |
475 | or if its register number always corresponds to a cheap register. */ | |
476 | ||
477 | #define CHEAP_REG(N) \ | |
478 | ((REG_USERVAR_P (N) && REGNO (N) < FIRST_PSEUDO_REGISTER) \ | |
479 | || CHEAP_REGNO (REGNO (N))) | |
480 | ||
38734e55 ILT |
481 | #define COST(X) \ |
482 | (GET_CODE (X) == REG \ | |
483 | ? (CHEAP_REG (X) ? 0 \ | |
484 | : REGNO (X) >= FIRST_PSEUDO_REGISTER ? 1 \ | |
485 | : 2) \ | |
486 | : ((GET_CODE (X) == SUBREG \ | |
487 | && GET_CODE (SUBREG_REG (X)) == REG \ | |
488 | && GET_MODE_CLASS (GET_MODE (X)) == MODE_INT \ | |
489 | && GET_MODE_CLASS (GET_MODE (SUBREG_REG (X))) == MODE_INT \ | |
490 | && (GET_MODE_SIZE (GET_MODE (X)) \ | |
491 | < GET_MODE_SIZE (GET_MODE (SUBREG_REG (X)))) \ | |
492 | && subreg_lowpart_p (X) \ | |
493 | && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE (X)), \ | |
494 | GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (X))))) \ | |
495 | ? (CHEAP_REG (SUBREG_REG (X)) ? 0 \ | |
496 | : REGNO (SUBREG_REG (X)) >= FIRST_PSEUDO_REGISTER ? 1 \ | |
497 | : 2) \ | |
498 | : rtx_cost (X, SET) * 2)) | |
7afe21cc RK |
499 | |
500 | /* Determine if the quantity number for register X represents a valid index | |
501 | into the `qty_...' variables. */ | |
502 | ||
503 | #define REGNO_QTY_VALID_P(N) (reg_qty[N] != (N)) | |
504 | ||
505 | static struct table_elt *table[NBUCKETS]; | |
506 | ||
507 | /* Chain of `struct table_elt's made so far for this function | |
508 | but currently removed from the table. */ | |
509 | ||
510 | static struct table_elt *free_element_chain; | |
511 | ||
512 | /* Number of `struct table_elt' structures made so far for this function. */ | |
513 | ||
514 | static int n_elements_made; | |
515 | ||
516 | /* Maximum value `n_elements_made' has had so far in this compilation | |
517 | for functions previously processed. */ | |
518 | ||
519 | static int max_elements_made; | |
520 | ||
521 | /* Surviving equivalence class when two equivalence classes are merged | |
522 | by recording the effects of a jump in the last insn. Zero if the | |
523 | last insn was not a conditional jump. */ | |
524 | ||
525 | static struct table_elt *last_jump_equiv_class; | |
526 | ||
527 | /* Set to the cost of a constant pool reference if one was found for a | |
528 | symbolic constant. If this was found, it means we should try to | |
529 | convert constants into constant pool entries if they don't fit in | |
530 | the insn. */ | |
531 | ||
532 | static int constant_pool_entries_cost; | |
533 | ||
534 | /* Bits describing what kind of values in memory must be invalidated | |
535 | for a particular instruction. If all three bits are zero, | |
536 | no memory refs need to be invalidated. Each bit is more powerful | |
537 | than the preceding ones, and if a bit is set then the preceding | |
538 | bits are also set. | |
539 | ||
540 | Here is how the bits are set: | |
541 | Pushing onto the stack invalidates only the stack pointer, | |
542 | writing at a fixed address invalidates only variable addresses, | |
543 | writing in a structure element at variable address | |
544 | invalidates all but scalar variables, | |
545 | and writing in anything else at variable address invalidates everything. */ | |
546 | ||
547 | struct write_data | |
548 | { | |
0f41302f | 549 | int sp : 1; /* Invalidate stack pointer. */ |
7afe21cc RK |
550 | int var : 1; /* Invalidate variable addresses. */ |
551 | int nonscalar : 1; /* Invalidate all but scalar variables. */ | |
552 | int all : 1; /* Invalidate all memory refs. */ | |
553 | }; | |
554 | ||
6cd4575e RK |
555 | /* Define maximum length of a branch path. */ |
556 | ||
557 | #define PATHLENGTH 10 | |
558 | ||
559 | /* This data describes a block that will be processed by cse_basic_block. */ | |
560 | ||
561 | struct cse_basic_block_data { | |
562 | /* Lowest CUID value of insns in block. */ | |
563 | int low_cuid; | |
564 | /* Highest CUID value of insns in block. */ | |
565 | int high_cuid; | |
566 | /* Total number of SETs in block. */ | |
567 | int nsets; | |
568 | /* Last insn in the block. */ | |
569 | rtx last; | |
570 | /* Size of current branch path, if any. */ | |
571 | int path_size; | |
572 | /* Current branch path, indicating which branches will be taken. */ | |
573 | struct branch_path { | |
0f41302f | 574 | /* The branch insn. */ |
6cd4575e RK |
575 | rtx branch; |
576 | /* Whether it should be taken or not. AROUND is the same as taken | |
577 | except that it is used when the destination label is not preceded | |
578 | by a BARRIER. */ | |
579 | enum taken {TAKEN, NOT_TAKEN, AROUND} status; | |
580 | } path[PATHLENGTH]; | |
581 | }; | |
582 | ||
7afe21cc RK |
583 | /* Nonzero if X has the form (PLUS frame-pointer integer). We check for |
584 | virtual regs here because the simplify_*_operation routines are called | |
585 | by integrate.c, which is called before virtual register instantiation. */ | |
586 | ||
587 | #define FIXED_BASE_PLUS_P(X) \ | |
8bc169f2 DE |
588 | ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \ |
589 | || (X) == arg_pointer_rtx \ | |
7afe21cc RK |
590 | || (X) == virtual_stack_vars_rtx \ |
591 | || (X) == virtual_incoming_args_rtx \ | |
592 | || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \ | |
593 | && (XEXP (X, 0) == frame_pointer_rtx \ | |
8bc169f2 | 594 | || XEXP (X, 0) == hard_frame_pointer_rtx \ |
7afe21cc RK |
595 | || XEXP (X, 0) == arg_pointer_rtx \ |
596 | || XEXP (X, 0) == virtual_stack_vars_rtx \ | |
597 | || XEXP (X, 0) == virtual_incoming_args_rtx))) | |
598 | ||
6f90e075 JW |
599 | /* Similar, but also allows reference to the stack pointer. |
600 | ||
601 | This used to include FIXED_BASE_PLUS_P, however, we can't assume that | |
602 | arg_pointer_rtx by itself is nonzero, because on at least one machine, | |
603 | the i960, the arg pointer is zero when it is unused. */ | |
7afe21cc RK |
604 | |
605 | #define NONZERO_BASE_PLUS_P(X) \ | |
8bc169f2 | 606 | ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \ |
6f90e075 JW |
607 | || (X) == virtual_stack_vars_rtx \ |
608 | || (X) == virtual_incoming_args_rtx \ | |
609 | || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \ | |
610 | && (XEXP (X, 0) == frame_pointer_rtx \ | |
8bc169f2 | 611 | || XEXP (X, 0) == hard_frame_pointer_rtx \ |
6f90e075 JW |
612 | || XEXP (X, 0) == arg_pointer_rtx \ |
613 | || XEXP (X, 0) == virtual_stack_vars_rtx \ | |
614 | || XEXP (X, 0) == virtual_incoming_args_rtx)) \ | |
7afe21cc RK |
615 | || (X) == stack_pointer_rtx \ |
616 | || (X) == virtual_stack_dynamic_rtx \ | |
617 | || (X) == virtual_outgoing_args_rtx \ | |
618 | || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \ | |
619 | && (XEXP (X, 0) == stack_pointer_rtx \ | |
620 | || XEXP (X, 0) == virtual_stack_dynamic_rtx \ | |
621 | || XEXP (X, 0) == virtual_outgoing_args_rtx))) | |
622 | ||
6cd4575e RK |
623 | static void new_basic_block PROTO((void)); |
624 | static void make_new_qty PROTO((int)); | |
625 | static void make_regs_eqv PROTO((int, int)); | |
626 | static void delete_reg_equiv PROTO((int)); | |
627 | static int mention_regs PROTO((rtx)); | |
628 | static int insert_regs PROTO((rtx, struct table_elt *, int)); | |
629 | static void free_element PROTO((struct table_elt *)); | |
2197a88a | 630 | static void remove_from_table PROTO((struct table_elt *, unsigned)); |
6cd4575e | 631 | static struct table_elt *get_element PROTO((void)); |
2197a88a RK |
632 | static struct table_elt *lookup PROTO((rtx, unsigned, enum machine_mode)), |
633 | *lookup_for_remove PROTO((rtx, unsigned, enum machine_mode)); | |
6cd4575e | 634 | static rtx lookup_as_function PROTO((rtx, enum rtx_code)); |
2197a88a | 635 | static struct table_elt *insert PROTO((rtx, struct table_elt *, unsigned, |
6cd4575e RK |
636 | enum machine_mode)); |
637 | static void merge_equiv_classes PROTO((struct table_elt *, | |
638 | struct table_elt *)); | |
68c1e173 | 639 | static void invalidate PROTO((rtx, enum machine_mode)); |
6cd4575e RK |
640 | static void remove_invalid_refs PROTO((int)); |
641 | static void rehash_using_reg PROTO((rtx)); | |
642 | static void invalidate_memory PROTO((struct write_data *)); | |
643 | static void invalidate_for_call PROTO((void)); | |
644 | static rtx use_related_value PROTO((rtx, struct table_elt *)); | |
2197a88a RK |
645 | static unsigned canon_hash PROTO((rtx, enum machine_mode)); |
646 | static unsigned safe_hash PROTO((rtx, enum machine_mode)); | |
6cd4575e | 647 | static int exp_equiv_p PROTO((rtx, rtx, int, int)); |
f451db89 | 648 | static void set_nonvarying_address_components PROTO((rtx, int, rtx *, |
6500fb43 RK |
649 | HOST_WIDE_INT *, |
650 | HOST_WIDE_INT *)); | |
6cd4575e | 651 | static int refers_to_p PROTO((rtx, rtx)); |
f451db89 | 652 | static int refers_to_mem_p PROTO((rtx, rtx, HOST_WIDE_INT, |
6cd4575e RK |
653 | HOST_WIDE_INT)); |
654 | static int cse_rtx_addr_varies_p PROTO((rtx)); | |
655 | static rtx canon_reg PROTO((rtx, rtx)); | |
656 | static void find_best_addr PROTO((rtx, rtx *)); | |
657 | static enum rtx_code find_comparison_args PROTO((enum rtx_code, rtx *, rtx *, | |
658 | enum machine_mode *, | |
659 | enum machine_mode *)); | |
96b0e481 RK |
660 | static rtx cse_gen_binary PROTO((enum rtx_code, enum machine_mode, |
661 | rtx, rtx)); | |
662 | static rtx simplify_plus_minus PROTO((enum rtx_code, enum machine_mode, | |
663 | rtx, rtx)); | |
6cd4575e RK |
664 | static rtx fold_rtx PROTO((rtx, rtx)); |
665 | static rtx equiv_constant PROTO((rtx)); | |
666 | static void record_jump_equiv PROTO((rtx, int)); | |
667 | static void record_jump_cond PROTO((enum rtx_code, enum machine_mode, | |
668 | rtx, rtx, int)); | |
669 | static void cse_insn PROTO((rtx, int)); | |
670 | static void note_mem_written PROTO((rtx, struct write_data *)); | |
671 | static void invalidate_from_clobbers PROTO((struct write_data *, rtx)); | |
672 | static rtx cse_process_notes PROTO((rtx, rtx)); | |
673 | static void cse_around_loop PROTO((rtx)); | |
674 | static void invalidate_skipped_set PROTO((rtx, rtx)); | |
675 | static void invalidate_skipped_block PROTO((rtx)); | |
676 | static void cse_check_loop_start PROTO((rtx, rtx)); | |
677 | static void cse_set_around_loop PROTO((rtx, rtx, rtx)); | |
678 | static rtx cse_basic_block PROTO((rtx, rtx, struct branch_path *, int)); | |
79644f06 | 679 | static void count_reg_usage PROTO((rtx, int *, rtx, int)); |
c407b802 RK |
680 | |
681 | extern int rtx_equal_function_value_matters; | |
7afe21cc RK |
682 | \f |
683 | /* Return an estimate of the cost of computing rtx X. | |
684 | One use is in cse, to decide which expression to keep in the hash table. | |
685 | Another is in rtl generation, to pick the cheapest way to multiply. | |
686 | Other uses like the latter are expected in the future. */ | |
687 | ||
688 | /* Return the right cost to give to an operation | |
689 | to make the cost of the corresponding register-to-register instruction | |
690 | N times that of a fast register-to-register instruction. */ | |
691 | ||
692 | #define COSTS_N_INSNS(N) ((N) * 4 - 2) | |
693 | ||
694 | int | |
e5f6a288 | 695 | rtx_cost (x, outer_code) |
7afe21cc | 696 | rtx x; |
e5f6a288 | 697 | enum rtx_code outer_code; |
7afe21cc RK |
698 | { |
699 | register int i, j; | |
700 | register enum rtx_code code; | |
701 | register char *fmt; | |
702 | register int total; | |
703 | ||
704 | if (x == 0) | |
705 | return 0; | |
706 | ||
707 | /* Compute the default costs of certain things. | |
708 | Note that RTX_COSTS can override the defaults. */ | |
709 | ||
710 | code = GET_CODE (x); | |
711 | switch (code) | |
712 | { | |
713 | case MULT: | |
714 | /* Count multiplication by 2**n as a shift, | |
715 | because if we are considering it, we would output it as a shift. */ | |
716 | if (GET_CODE (XEXP (x, 1)) == CONST_INT | |
717 | && exact_log2 (INTVAL (XEXP (x, 1))) >= 0) | |
718 | total = 2; | |
719 | else | |
720 | total = COSTS_N_INSNS (5); | |
721 | break; | |
722 | case DIV: | |
723 | case UDIV: | |
724 | case MOD: | |
725 | case UMOD: | |
726 | total = COSTS_N_INSNS (7); | |
727 | break; | |
728 | case USE: | |
729 | /* Used in loop.c and combine.c as a marker. */ | |
730 | total = 0; | |
731 | break; | |
538b78e7 RS |
732 | case ASM_OPERANDS: |
733 | /* We don't want these to be used in substitutions because | |
734 | we have no way of validating the resulting insn. So assign | |
735 | anything containing an ASM_OPERANDS a very high cost. */ | |
736 | total = 1000; | |
737 | break; | |
7afe21cc RK |
738 | default: |
739 | total = 2; | |
740 | } | |
741 | ||
742 | switch (code) | |
743 | { | |
744 | case REG: | |
6ab832bc | 745 | return ! CHEAP_REG (x); |
ac07e066 | 746 | |
7afe21cc | 747 | case SUBREG: |
fc3ffe83 RK |
748 | /* If we can't tie these modes, make this expensive. The larger |
749 | the mode, the more expensive it is. */ | |
750 | if (! MODES_TIEABLE_P (GET_MODE (x), GET_MODE (SUBREG_REG (x)))) | |
751 | return COSTS_N_INSNS (2 | |
752 | + GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD); | |
7afe21cc RK |
753 | return 2; |
754 | #ifdef RTX_COSTS | |
e5f6a288 | 755 | RTX_COSTS (x, code, outer_code); |
7afe21cc | 756 | #endif |
e5f6a288 | 757 | CONST_COSTS (x, code, outer_code); |
7afe21cc RK |
758 | } |
759 | ||
760 | /* Sum the costs of the sub-rtx's, plus cost of this operation, | |
761 | which is already in total. */ | |
762 | ||
763 | fmt = GET_RTX_FORMAT (code); | |
764 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
765 | if (fmt[i] == 'e') | |
e5f6a288 | 766 | total += rtx_cost (XEXP (x, i), code); |
7afe21cc RK |
767 | else if (fmt[i] == 'E') |
768 | for (j = 0; j < XVECLEN (x, i); j++) | |
e5f6a288 | 769 | total += rtx_cost (XVECEXP (x, i, j), code); |
7afe21cc RK |
770 | |
771 | return total; | |
772 | } | |
773 | \f | |
774 | /* Clear the hash table and initialize each register with its own quantity, | |
775 | for a new basic block. */ | |
776 | ||
777 | static void | |
778 | new_basic_block () | |
779 | { | |
780 | register int i; | |
781 | ||
782 | next_qty = max_reg; | |
783 | ||
4c9a05bc | 784 | bzero ((char *) reg_tick, max_reg * sizeof (int)); |
7afe21cc | 785 | |
4c9a05bc RK |
786 | bcopy ((char *) all_minus_one, (char *) reg_in_table, |
787 | max_reg * sizeof (int)); | |
788 | bcopy ((char *) consec_ints, (char *) reg_qty, max_reg * sizeof (int)); | |
7afe21cc RK |
789 | CLEAR_HARD_REG_SET (hard_regs_in_table); |
790 | ||
791 | /* The per-quantity values used to be initialized here, but it is | |
792 | much faster to initialize each as it is made in `make_new_qty'. */ | |
793 | ||
794 | for (i = 0; i < NBUCKETS; i++) | |
795 | { | |
796 | register struct table_elt *this, *next; | |
797 | for (this = table[i]; this; this = next) | |
798 | { | |
799 | next = this->next_same_hash; | |
800 | free_element (this); | |
801 | } | |
802 | } | |
803 | ||
4c9a05bc | 804 | bzero ((char *) table, sizeof table); |
7afe21cc RK |
805 | |
806 | prev_insn = 0; | |
807 | ||
808 | #ifdef HAVE_cc0 | |
809 | prev_insn_cc0 = 0; | |
810 | #endif | |
811 | } | |
812 | ||
813 | /* Say that register REG contains a quantity not in any register before | |
814 | and initialize that quantity. */ | |
815 | ||
816 | static void | |
817 | make_new_qty (reg) | |
818 | register int reg; | |
819 | { | |
820 | register int q; | |
821 | ||
822 | if (next_qty >= max_qty) | |
823 | abort (); | |
824 | ||
825 | q = reg_qty[reg] = next_qty++; | |
826 | qty_first_reg[q] = reg; | |
827 | qty_last_reg[q] = reg; | |
828 | qty_const[q] = qty_const_insn[q] = 0; | |
829 | qty_comparison_code[q] = UNKNOWN; | |
830 | ||
831 | reg_next_eqv[reg] = reg_prev_eqv[reg] = -1; | |
832 | } | |
833 | ||
834 | /* Make reg NEW equivalent to reg OLD. | |
835 | OLD is not changing; NEW is. */ | |
836 | ||
837 | static void | |
838 | make_regs_eqv (new, old) | |
839 | register int new, old; | |
840 | { | |
841 | register int lastr, firstr; | |
842 | register int q = reg_qty[old]; | |
843 | ||
844 | /* Nothing should become eqv until it has a "non-invalid" qty number. */ | |
845 | if (! REGNO_QTY_VALID_P (old)) | |
846 | abort (); | |
847 | ||
848 | reg_qty[new] = q; | |
849 | firstr = qty_first_reg[q]; | |
850 | lastr = qty_last_reg[q]; | |
851 | ||
852 | /* Prefer fixed hard registers to anything. Prefer pseudo regs to other | |
853 | hard regs. Among pseudos, if NEW will live longer than any other reg | |
854 | of the same qty, and that is beyond the current basic block, | |
855 | make it the new canonical replacement for this qty. */ | |
856 | if (! (firstr < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (firstr)) | |
857 | /* Certain fixed registers might be of the class NO_REGS. This means | |
858 | that not only can they not be allocated by the compiler, but | |
830a38ee | 859 | they cannot be used in substitutions or canonicalizations |
7afe21cc RK |
860 | either. */ |
861 | && (new >= FIRST_PSEUDO_REGISTER || REGNO_REG_CLASS (new) != NO_REGS) | |
862 | && ((new < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (new)) | |
863 | || (new >= FIRST_PSEUDO_REGISTER | |
864 | && (firstr < FIRST_PSEUDO_REGISTER | |
865 | || ((uid_cuid[regno_last_uid[new]] > cse_basic_block_end | |
866 | || (uid_cuid[regno_first_uid[new]] | |
867 | < cse_basic_block_start)) | |
868 | && (uid_cuid[regno_last_uid[new]] | |
869 | > uid_cuid[regno_last_uid[firstr]])))))) | |
870 | { | |
871 | reg_prev_eqv[firstr] = new; | |
872 | reg_next_eqv[new] = firstr; | |
873 | reg_prev_eqv[new] = -1; | |
874 | qty_first_reg[q] = new; | |
875 | } | |
876 | else | |
877 | { | |
878 | /* If NEW is a hard reg (known to be non-fixed), insert at end. | |
879 | Otherwise, insert before any non-fixed hard regs that are at the | |
880 | end. Registers of class NO_REGS cannot be used as an | |
881 | equivalent for anything. */ | |
882 | while (lastr < FIRST_PSEUDO_REGISTER && reg_prev_eqv[lastr] >= 0 | |
883 | && (REGNO_REG_CLASS (lastr) == NO_REGS || ! FIXED_REGNO_P (lastr)) | |
884 | && new >= FIRST_PSEUDO_REGISTER) | |
885 | lastr = reg_prev_eqv[lastr]; | |
886 | reg_next_eqv[new] = reg_next_eqv[lastr]; | |
887 | if (reg_next_eqv[lastr] >= 0) | |
888 | reg_prev_eqv[reg_next_eqv[lastr]] = new; | |
889 | else | |
890 | qty_last_reg[q] = new; | |
891 | reg_next_eqv[lastr] = new; | |
892 | reg_prev_eqv[new] = lastr; | |
893 | } | |
894 | } | |
895 | ||
896 | /* Remove REG from its equivalence class. */ | |
897 | ||
898 | static void | |
899 | delete_reg_equiv (reg) | |
900 | register int reg; | |
901 | { | |
7afe21cc | 902 | register int q = reg_qty[reg]; |
a4e262bc | 903 | register int p, n; |
7afe21cc | 904 | |
a4e262bc | 905 | /* If invalid, do nothing. */ |
7afe21cc RK |
906 | if (q == reg) |
907 | return; | |
908 | ||
a4e262bc RK |
909 | p = reg_prev_eqv[reg]; |
910 | n = reg_next_eqv[reg]; | |
911 | ||
7afe21cc RK |
912 | if (n != -1) |
913 | reg_prev_eqv[n] = p; | |
914 | else | |
915 | qty_last_reg[q] = p; | |
916 | if (p != -1) | |
917 | reg_next_eqv[p] = n; | |
918 | else | |
919 | qty_first_reg[q] = n; | |
920 | ||
921 | reg_qty[reg] = reg; | |
922 | } | |
923 | ||
924 | /* Remove any invalid expressions from the hash table | |
925 | that refer to any of the registers contained in expression X. | |
926 | ||
927 | Make sure that newly inserted references to those registers | |
928 | as subexpressions will be considered valid. | |
929 | ||
930 | mention_regs is not called when a register itself | |
931 | is being stored in the table. | |
932 | ||
933 | Return 1 if we have done something that may have changed the hash code | |
934 | of X. */ | |
935 | ||
936 | static int | |
937 | mention_regs (x) | |
938 | rtx x; | |
939 | { | |
940 | register enum rtx_code code; | |
941 | register int i, j; | |
942 | register char *fmt; | |
943 | register int changed = 0; | |
944 | ||
945 | if (x == 0) | |
e5f6a288 | 946 | return 0; |
7afe21cc RK |
947 | |
948 | code = GET_CODE (x); | |
949 | if (code == REG) | |
950 | { | |
951 | register int regno = REGNO (x); | |
952 | register int endregno | |
953 | = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1 | |
954 | : HARD_REGNO_NREGS (regno, GET_MODE (x))); | |
955 | int i; | |
956 | ||
957 | for (i = regno; i < endregno; i++) | |
958 | { | |
959 | if (reg_in_table[i] >= 0 && reg_in_table[i] != reg_tick[i]) | |
960 | remove_invalid_refs (i); | |
961 | ||
962 | reg_in_table[i] = reg_tick[i]; | |
963 | } | |
964 | ||
965 | return 0; | |
966 | } | |
967 | ||
968 | /* If X is a comparison or a COMPARE and either operand is a register | |
969 | that does not have a quantity, give it one. This is so that a later | |
970 | call to record_jump_equiv won't cause X to be assigned a different | |
971 | hash code and not found in the table after that call. | |
972 | ||
973 | It is not necessary to do this here, since rehash_using_reg can | |
974 | fix up the table later, but doing this here eliminates the need to | |
975 | call that expensive function in the most common case where the only | |
976 | use of the register is in the comparison. */ | |
977 | ||
978 | if (code == COMPARE || GET_RTX_CLASS (code) == '<') | |
979 | { | |
980 | if (GET_CODE (XEXP (x, 0)) == REG | |
981 | && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 0)))) | |
906c4e36 | 982 | if (insert_regs (XEXP (x, 0), NULL_PTR, 0)) |
7afe21cc RK |
983 | { |
984 | rehash_using_reg (XEXP (x, 0)); | |
985 | changed = 1; | |
986 | } | |
987 | ||
988 | if (GET_CODE (XEXP (x, 1)) == REG | |
989 | && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 1)))) | |
906c4e36 | 990 | if (insert_regs (XEXP (x, 1), NULL_PTR, 0)) |
7afe21cc RK |
991 | { |
992 | rehash_using_reg (XEXP (x, 1)); | |
993 | changed = 1; | |
994 | } | |
995 | } | |
996 | ||
997 | fmt = GET_RTX_FORMAT (code); | |
998 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
999 | if (fmt[i] == 'e') | |
1000 | changed |= mention_regs (XEXP (x, i)); | |
1001 | else if (fmt[i] == 'E') | |
1002 | for (j = 0; j < XVECLEN (x, i); j++) | |
1003 | changed |= mention_regs (XVECEXP (x, i, j)); | |
1004 | ||
1005 | return changed; | |
1006 | } | |
1007 | ||
1008 | /* Update the register quantities for inserting X into the hash table | |
1009 | with a value equivalent to CLASSP. | |
1010 | (If the class does not contain a REG, it is irrelevant.) | |
1011 | If MODIFIED is nonzero, X is a destination; it is being modified. | |
1012 | Note that delete_reg_equiv should be called on a register | |
1013 | before insert_regs is done on that register with MODIFIED != 0. | |
1014 | ||
1015 | Nonzero value means that elements of reg_qty have changed | |
1016 | so X's hash code may be different. */ | |
1017 | ||
1018 | static int | |
1019 | insert_regs (x, classp, modified) | |
1020 | rtx x; | |
1021 | struct table_elt *classp; | |
1022 | int modified; | |
1023 | { | |
1024 | if (GET_CODE (x) == REG) | |
1025 | { | |
1026 | register int regno = REGNO (x); | |
1027 | ||
1ff0c00d RK |
1028 | /* If REGNO is in the equivalence table already but is of the |
1029 | wrong mode for that equivalence, don't do anything here. */ | |
1030 | ||
1031 | if (REGNO_QTY_VALID_P (regno) | |
1032 | && qty_mode[reg_qty[regno]] != GET_MODE (x)) | |
1033 | return 0; | |
1034 | ||
1035 | if (modified || ! REGNO_QTY_VALID_P (regno)) | |
7afe21cc RK |
1036 | { |
1037 | if (classp) | |
1038 | for (classp = classp->first_same_value; | |
1039 | classp != 0; | |
1040 | classp = classp->next_same_value) | |
1041 | if (GET_CODE (classp->exp) == REG | |
1042 | && GET_MODE (classp->exp) == GET_MODE (x)) | |
1043 | { | |
1044 | make_regs_eqv (regno, REGNO (classp->exp)); | |
1045 | return 1; | |
1046 | } | |
1047 | ||
1048 | make_new_qty (regno); | |
1049 | qty_mode[reg_qty[regno]] = GET_MODE (x); | |
1050 | return 1; | |
1051 | } | |
cdf4112f TG |
1052 | |
1053 | return 0; | |
7afe21cc | 1054 | } |
c610adec RK |
1055 | |
1056 | /* If X is a SUBREG, we will likely be inserting the inner register in the | |
1057 | table. If that register doesn't have an assigned quantity number at | |
1058 | this point but does later, the insertion that we will be doing now will | |
1059 | not be accessible because its hash code will have changed. So assign | |
1060 | a quantity number now. */ | |
1061 | ||
1062 | else if (GET_CODE (x) == SUBREG && GET_CODE (SUBREG_REG (x)) == REG | |
1063 | && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x)))) | |
1064 | { | |
906c4e36 | 1065 | insert_regs (SUBREG_REG (x), NULL_PTR, 0); |
c610adec RK |
1066 | mention_regs (SUBREG_REG (x)); |
1067 | return 1; | |
1068 | } | |
7afe21cc RK |
1069 | else |
1070 | return mention_regs (x); | |
1071 | } | |
1072 | \f | |
1073 | /* Look in or update the hash table. */ | |
1074 | ||
1075 | /* Put the element ELT on the list of free elements. */ | |
1076 | ||
1077 | static void | |
1078 | free_element (elt) | |
1079 | struct table_elt *elt; | |
1080 | { | |
1081 | elt->next_same_hash = free_element_chain; | |
1082 | free_element_chain = elt; | |
1083 | } | |
1084 | ||
1085 | /* Return an element that is free for use. */ | |
1086 | ||
1087 | static struct table_elt * | |
1088 | get_element () | |
1089 | { | |
1090 | struct table_elt *elt = free_element_chain; | |
1091 | if (elt) | |
1092 | { | |
1093 | free_element_chain = elt->next_same_hash; | |
1094 | return elt; | |
1095 | } | |
1096 | n_elements_made++; | |
1097 | return (struct table_elt *) oballoc (sizeof (struct table_elt)); | |
1098 | } | |
1099 | ||
1100 | /* Remove table element ELT from use in the table. | |
1101 | HASH is its hash code, made using the HASH macro. | |
1102 | It's an argument because often that is known in advance | |
1103 | and we save much time not recomputing it. */ | |
1104 | ||
1105 | static void | |
1106 | remove_from_table (elt, hash) | |
1107 | register struct table_elt *elt; | |
2197a88a | 1108 | unsigned hash; |
7afe21cc RK |
1109 | { |
1110 | if (elt == 0) | |
1111 | return; | |
1112 | ||
1113 | /* Mark this element as removed. See cse_insn. */ | |
1114 | elt->first_same_value = 0; | |
1115 | ||
1116 | /* Remove the table element from its equivalence class. */ | |
1117 | ||
1118 | { | |
1119 | register struct table_elt *prev = elt->prev_same_value; | |
1120 | register struct table_elt *next = elt->next_same_value; | |
1121 | ||
1122 | if (next) next->prev_same_value = prev; | |
1123 | ||
1124 | if (prev) | |
1125 | prev->next_same_value = next; | |
1126 | else | |
1127 | { | |
1128 | register struct table_elt *newfirst = next; | |
1129 | while (next) | |
1130 | { | |
1131 | next->first_same_value = newfirst; | |
1132 | next = next->next_same_value; | |
1133 | } | |
1134 | } | |
1135 | } | |
1136 | ||
1137 | /* Remove the table element from its hash bucket. */ | |
1138 | ||
1139 | { | |
1140 | register struct table_elt *prev = elt->prev_same_hash; | |
1141 | register struct table_elt *next = elt->next_same_hash; | |
1142 | ||
1143 | if (next) next->prev_same_hash = prev; | |
1144 | ||
1145 | if (prev) | |
1146 | prev->next_same_hash = next; | |
1147 | else if (table[hash] == elt) | |
1148 | table[hash] = next; | |
1149 | else | |
1150 | { | |
1151 | /* This entry is not in the proper hash bucket. This can happen | |
1152 | when two classes were merged by `merge_equiv_classes'. Search | |
1153 | for the hash bucket that it heads. This happens only very | |
1154 | rarely, so the cost is acceptable. */ | |
1155 | for (hash = 0; hash < NBUCKETS; hash++) | |
1156 | if (table[hash] == elt) | |
1157 | table[hash] = next; | |
1158 | } | |
1159 | } | |
1160 | ||
1161 | /* Remove the table element from its related-value circular chain. */ | |
1162 | ||
1163 | if (elt->related_value != 0 && elt->related_value != elt) | |
1164 | { | |
1165 | register struct table_elt *p = elt->related_value; | |
1166 | while (p->related_value != elt) | |
1167 | p = p->related_value; | |
1168 | p->related_value = elt->related_value; | |
1169 | if (p->related_value == p) | |
1170 | p->related_value = 0; | |
1171 | } | |
1172 | ||
1173 | free_element (elt); | |
1174 | } | |
1175 | ||
1176 | /* Look up X in the hash table and return its table element, | |
1177 | or 0 if X is not in the table. | |
1178 | ||
1179 | MODE is the machine-mode of X, or if X is an integer constant | |
1180 | with VOIDmode then MODE is the mode with which X will be used. | |
1181 | ||
1182 | Here we are satisfied to find an expression whose tree structure | |
1183 | looks like X. */ | |
1184 | ||
1185 | static struct table_elt * | |
1186 | lookup (x, hash, mode) | |
1187 | rtx x; | |
2197a88a | 1188 | unsigned hash; |
7afe21cc RK |
1189 | enum machine_mode mode; |
1190 | { | |
1191 | register struct table_elt *p; | |
1192 | ||
1193 | for (p = table[hash]; p; p = p->next_same_hash) | |
1194 | if (mode == p->mode && ((x == p->exp && GET_CODE (x) == REG) | |
1195 | || exp_equiv_p (x, p->exp, GET_CODE (x) != REG, 0))) | |
1196 | return p; | |
1197 | ||
1198 | return 0; | |
1199 | } | |
1200 | ||
1201 | /* Like `lookup' but don't care whether the table element uses invalid regs. | |
1202 | Also ignore discrepancies in the machine mode of a register. */ | |
1203 | ||
1204 | static struct table_elt * | |
1205 | lookup_for_remove (x, hash, mode) | |
1206 | rtx x; | |
2197a88a | 1207 | unsigned hash; |
7afe21cc RK |
1208 | enum machine_mode mode; |
1209 | { | |
1210 | register struct table_elt *p; | |
1211 | ||
1212 | if (GET_CODE (x) == REG) | |
1213 | { | |
1214 | int regno = REGNO (x); | |
1215 | /* Don't check the machine mode when comparing registers; | |
1216 | invalidating (REG:SI 0) also invalidates (REG:DF 0). */ | |
1217 | for (p = table[hash]; p; p = p->next_same_hash) | |
1218 | if (GET_CODE (p->exp) == REG | |
1219 | && REGNO (p->exp) == regno) | |
1220 | return p; | |
1221 | } | |
1222 | else | |
1223 | { | |
1224 | for (p = table[hash]; p; p = p->next_same_hash) | |
1225 | if (mode == p->mode && (x == p->exp || exp_equiv_p (x, p->exp, 0, 0))) | |
1226 | return p; | |
1227 | } | |
1228 | ||
1229 | return 0; | |
1230 | } | |
1231 | ||
1232 | /* Look for an expression equivalent to X and with code CODE. | |
1233 | If one is found, return that expression. */ | |
1234 | ||
1235 | static rtx | |
1236 | lookup_as_function (x, code) | |
1237 | rtx x; | |
1238 | enum rtx_code code; | |
1239 | { | |
1240 | register struct table_elt *p = lookup (x, safe_hash (x, VOIDmode) % NBUCKETS, | |
1241 | GET_MODE (x)); | |
1242 | if (p == 0) | |
1243 | return 0; | |
1244 | ||
1245 | for (p = p->first_same_value; p; p = p->next_same_value) | |
1246 | { | |
1247 | if (GET_CODE (p->exp) == code | |
1248 | /* Make sure this is a valid entry in the table. */ | |
1249 | && exp_equiv_p (p->exp, p->exp, 1, 0)) | |
1250 | return p->exp; | |
1251 | } | |
1252 | ||
1253 | return 0; | |
1254 | } | |
1255 | ||
1256 | /* Insert X in the hash table, assuming HASH is its hash code | |
1257 | and CLASSP is an element of the class it should go in | |
1258 | (or 0 if a new class should be made). | |
1259 | It is inserted at the proper position to keep the class in | |
1260 | the order cheapest first. | |
1261 | ||
1262 | MODE is the machine-mode of X, or if X is an integer constant | |
1263 | with VOIDmode then MODE is the mode with which X will be used. | |
1264 | ||
1265 | For elements of equal cheapness, the most recent one | |
1266 | goes in front, except that the first element in the list | |
1267 | remains first unless a cheaper element is added. The order of | |
1268 | pseudo-registers does not matter, as canon_reg will be called to | |
830a38ee | 1269 | find the cheapest when a register is retrieved from the table. |
7afe21cc RK |
1270 | |
1271 | The in_memory field in the hash table element is set to 0. | |
1272 | The caller must set it nonzero if appropriate. | |
1273 | ||
1274 | You should call insert_regs (X, CLASSP, MODIFY) before calling here, | |
1275 | and if insert_regs returns a nonzero value | |
1276 | you must then recompute its hash code before calling here. | |
1277 | ||
1278 | If necessary, update table showing constant values of quantities. */ | |
1279 | ||
1280 | #define CHEAPER(X,Y) ((X)->cost < (Y)->cost) | |
1281 | ||
1282 | static struct table_elt * | |
1283 | insert (x, classp, hash, mode) | |
1284 | register rtx x; | |
1285 | register struct table_elt *classp; | |
2197a88a | 1286 | unsigned hash; |
7afe21cc RK |
1287 | enum machine_mode mode; |
1288 | { | |
1289 | register struct table_elt *elt; | |
1290 | ||
1291 | /* If X is a register and we haven't made a quantity for it, | |
1292 | something is wrong. */ | |
1293 | if (GET_CODE (x) == REG && ! REGNO_QTY_VALID_P (REGNO (x))) | |
1294 | abort (); | |
1295 | ||
1296 | /* If X is a hard register, show it is being put in the table. */ | |
1297 | if (GET_CODE (x) == REG && REGNO (x) < FIRST_PSEUDO_REGISTER) | |
1298 | { | |
1299 | int regno = REGNO (x); | |
1300 | int endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (x)); | |
1301 | int i; | |
1302 | ||
1303 | for (i = regno; i < endregno; i++) | |
1304 | SET_HARD_REG_BIT (hard_regs_in_table, i); | |
1305 | } | |
1306 | ||
a5dfb4ee | 1307 | /* If X is a label, show we recorded it. */ |
970c9ace RK |
1308 | if (GET_CODE (x) == LABEL_REF |
1309 | || (GET_CODE (x) == CONST && GET_CODE (XEXP (x, 0)) == PLUS | |
1310 | && GET_CODE (XEXP (XEXP (x, 0), 0)) == LABEL_REF)) | |
a5dfb4ee | 1311 | recorded_label_ref = 1; |
7afe21cc RK |
1312 | |
1313 | /* Put an element for X into the right hash bucket. */ | |
1314 | ||
1315 | elt = get_element (); | |
1316 | elt->exp = x; | |
1317 | elt->cost = COST (x); | |
1318 | elt->next_same_value = 0; | |
1319 | elt->prev_same_value = 0; | |
1320 | elt->next_same_hash = table[hash]; | |
1321 | elt->prev_same_hash = 0; | |
1322 | elt->related_value = 0; | |
1323 | elt->in_memory = 0; | |
1324 | elt->mode = mode; | |
1325 | elt->is_const = (CONSTANT_P (x) | |
1326 | /* GNU C++ takes advantage of this for `this' | |
1327 | (and other const values). */ | |
1328 | || (RTX_UNCHANGING_P (x) | |
1329 | && GET_CODE (x) == REG | |
1330 | && REGNO (x) >= FIRST_PSEUDO_REGISTER) | |
1331 | || FIXED_BASE_PLUS_P (x)); | |
1332 | ||
1333 | if (table[hash]) | |
1334 | table[hash]->prev_same_hash = elt; | |
1335 | table[hash] = elt; | |
1336 | ||
1337 | /* Put it into the proper value-class. */ | |
1338 | if (classp) | |
1339 | { | |
1340 | classp = classp->first_same_value; | |
1341 | if (CHEAPER (elt, classp)) | |
1342 | /* Insert at the head of the class */ | |
1343 | { | |
1344 | register struct table_elt *p; | |
1345 | elt->next_same_value = classp; | |
1346 | classp->prev_same_value = elt; | |
1347 | elt->first_same_value = elt; | |
1348 | ||
1349 | for (p = classp; p; p = p->next_same_value) | |
1350 | p->first_same_value = elt; | |
1351 | } | |
1352 | else | |
1353 | { | |
1354 | /* Insert not at head of the class. */ | |
1355 | /* Put it after the last element cheaper than X. */ | |
1356 | register struct table_elt *p, *next; | |
1357 | for (p = classp; (next = p->next_same_value) && CHEAPER (next, elt); | |
1358 | p = next); | |
1359 | /* Put it after P and before NEXT. */ | |
1360 | elt->next_same_value = next; | |
1361 | if (next) | |
1362 | next->prev_same_value = elt; | |
1363 | elt->prev_same_value = p; | |
1364 | p->next_same_value = elt; | |
1365 | elt->first_same_value = classp; | |
1366 | } | |
1367 | } | |
1368 | else | |
1369 | elt->first_same_value = elt; | |
1370 | ||
1371 | /* If this is a constant being set equivalent to a register or a register | |
1372 | being set equivalent to a constant, note the constant equivalence. | |
1373 | ||
1374 | If this is a constant, it cannot be equivalent to a different constant, | |
1375 | and a constant is the only thing that can be cheaper than a register. So | |
1376 | we know the register is the head of the class (before the constant was | |
1377 | inserted). | |
1378 | ||
1379 | If this is a register that is not already known equivalent to a | |
1380 | constant, we must check the entire class. | |
1381 | ||
1382 | If this is a register that is already known equivalent to an insn, | |
1383 | update `qty_const_insn' to show that `this_insn' is the latest | |
1384 | insn making that quantity equivalent to the constant. */ | |
1385 | ||
f353588a RK |
1386 | if (elt->is_const && classp && GET_CODE (classp->exp) == REG |
1387 | && GET_CODE (x) != REG) | |
7afe21cc RK |
1388 | { |
1389 | qty_const[reg_qty[REGNO (classp->exp)]] | |
1390 | = gen_lowpart_if_possible (qty_mode[reg_qty[REGNO (classp->exp)]], x); | |
1391 | qty_const_insn[reg_qty[REGNO (classp->exp)]] = this_insn; | |
1392 | } | |
1393 | ||
f353588a RK |
1394 | else if (GET_CODE (x) == REG && classp && ! qty_const[reg_qty[REGNO (x)]] |
1395 | && ! elt->is_const) | |
7afe21cc RK |
1396 | { |
1397 | register struct table_elt *p; | |
1398 | ||
1399 | for (p = classp; p != 0; p = p->next_same_value) | |
1400 | { | |
f353588a | 1401 | if (p->is_const && GET_CODE (p->exp) != REG) |
7afe21cc RK |
1402 | { |
1403 | qty_const[reg_qty[REGNO (x)]] | |
1404 | = gen_lowpart_if_possible (GET_MODE (x), p->exp); | |
1405 | qty_const_insn[reg_qty[REGNO (x)]] = this_insn; | |
1406 | break; | |
1407 | } | |
1408 | } | |
1409 | } | |
1410 | ||
1411 | else if (GET_CODE (x) == REG && qty_const[reg_qty[REGNO (x)]] | |
1412 | && GET_MODE (x) == qty_mode[reg_qty[REGNO (x)]]) | |
1413 | qty_const_insn[reg_qty[REGNO (x)]] = this_insn; | |
1414 | ||
1415 | /* If this is a constant with symbolic value, | |
1416 | and it has a term with an explicit integer value, | |
1417 | link it up with related expressions. */ | |
1418 | if (GET_CODE (x) == CONST) | |
1419 | { | |
1420 | rtx subexp = get_related_value (x); | |
2197a88a | 1421 | unsigned subhash; |
7afe21cc RK |
1422 | struct table_elt *subelt, *subelt_prev; |
1423 | ||
1424 | if (subexp != 0) | |
1425 | { | |
1426 | /* Get the integer-free subexpression in the hash table. */ | |
1427 | subhash = safe_hash (subexp, mode) % NBUCKETS; | |
1428 | subelt = lookup (subexp, subhash, mode); | |
1429 | if (subelt == 0) | |
906c4e36 | 1430 | subelt = insert (subexp, NULL_PTR, subhash, mode); |
7afe21cc RK |
1431 | /* Initialize SUBELT's circular chain if it has none. */ |
1432 | if (subelt->related_value == 0) | |
1433 | subelt->related_value = subelt; | |
1434 | /* Find the element in the circular chain that precedes SUBELT. */ | |
1435 | subelt_prev = subelt; | |
1436 | while (subelt_prev->related_value != subelt) | |
1437 | subelt_prev = subelt_prev->related_value; | |
1438 | /* Put new ELT into SUBELT's circular chain just before SUBELT. | |
1439 | This way the element that follows SUBELT is the oldest one. */ | |
1440 | elt->related_value = subelt_prev->related_value; | |
1441 | subelt_prev->related_value = elt; | |
1442 | } | |
1443 | } | |
1444 | ||
1445 | return elt; | |
1446 | } | |
1447 | \f | |
1448 | /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from | |
1449 | CLASS2 into CLASS1. This is done when we have reached an insn which makes | |
1450 | the two classes equivalent. | |
1451 | ||
1452 | CLASS1 will be the surviving class; CLASS2 should not be used after this | |
1453 | call. | |
1454 | ||
1455 | Any invalid entries in CLASS2 will not be copied. */ | |
1456 | ||
1457 | static void | |
1458 | merge_equiv_classes (class1, class2) | |
1459 | struct table_elt *class1, *class2; | |
1460 | { | |
1461 | struct table_elt *elt, *next, *new; | |
1462 | ||
1463 | /* Ensure we start with the head of the classes. */ | |
1464 | class1 = class1->first_same_value; | |
1465 | class2 = class2->first_same_value; | |
1466 | ||
1467 | /* If they were already equal, forget it. */ | |
1468 | if (class1 == class2) | |
1469 | return; | |
1470 | ||
1471 | for (elt = class2; elt; elt = next) | |
1472 | { | |
2197a88a | 1473 | unsigned hash; |
7afe21cc RK |
1474 | rtx exp = elt->exp; |
1475 | enum machine_mode mode = elt->mode; | |
1476 | ||
1477 | next = elt->next_same_value; | |
1478 | ||
1479 | /* Remove old entry, make a new one in CLASS1's class. | |
1480 | Don't do this for invalid entries as we cannot find their | |
0f41302f | 1481 | hash code (it also isn't necessary). */ |
7afe21cc RK |
1482 | if (GET_CODE (exp) == REG || exp_equiv_p (exp, exp, 1, 0)) |
1483 | { | |
1484 | hash_arg_in_memory = 0; | |
1485 | hash_arg_in_struct = 0; | |
1486 | hash = HASH (exp, mode); | |
1487 | ||
1488 | if (GET_CODE (exp) == REG) | |
1489 | delete_reg_equiv (REGNO (exp)); | |
1490 | ||
1491 | remove_from_table (elt, hash); | |
1492 | ||
1493 | if (insert_regs (exp, class1, 0)) | |
8ae2b8f6 JW |
1494 | { |
1495 | rehash_using_reg (exp); | |
1496 | hash = HASH (exp, mode); | |
1497 | } | |
7afe21cc RK |
1498 | new = insert (exp, class1, hash, mode); |
1499 | new->in_memory = hash_arg_in_memory; | |
1500 | new->in_struct = hash_arg_in_struct; | |
1501 | } | |
1502 | } | |
1503 | } | |
1504 | \f | |
1505 | /* Remove from the hash table, or mark as invalid, | |
1506 | all expressions whose values could be altered by storing in X. | |
1507 | X is a register, a subreg, or a memory reference with nonvarying address | |
1508 | (because, when a memory reference with a varying address is stored in, | |
1509 | all memory references are removed by invalidate_memory | |
1510 | so specific invalidation is superfluous). | |
bb4034b3 JW |
1511 | FULL_MODE, if not VOIDmode, indicates that this much should be invalidated |
1512 | instead of just the amount indicated by the mode of X. This is only used | |
1513 | for bitfield stores into memory. | |
7afe21cc RK |
1514 | |
1515 | A nonvarying address may be just a register or just | |
1516 | a symbol reference, or it may be either of those plus | |
1517 | a numeric offset. */ | |
1518 | ||
1519 | static void | |
bb4034b3 | 1520 | invalidate (x, full_mode) |
7afe21cc | 1521 | rtx x; |
bb4034b3 | 1522 | enum machine_mode full_mode; |
7afe21cc RK |
1523 | { |
1524 | register int i; | |
1525 | register struct table_elt *p; | |
f451db89 JL |
1526 | rtx base; |
1527 | HOST_WIDE_INT start, end; | |
7afe21cc RK |
1528 | |
1529 | /* If X is a register, dependencies on its contents | |
1530 | are recorded through the qty number mechanism. | |
1531 | Just change the qty number of the register, | |
1532 | mark it as invalid for expressions that refer to it, | |
1533 | and remove it itself. */ | |
1534 | ||
1535 | if (GET_CODE (x) == REG) | |
1536 | { | |
1537 | register int regno = REGNO (x); | |
2197a88a | 1538 | register unsigned hash = HASH (x, GET_MODE (x)); |
7afe21cc RK |
1539 | |
1540 | /* Remove REGNO from any quantity list it might be on and indicate | |
1541 | that it's value might have changed. If it is a pseudo, remove its | |
1542 | entry from the hash table. | |
1543 | ||
1544 | For a hard register, we do the first two actions above for any | |
1545 | additional hard registers corresponding to X. Then, if any of these | |
1546 | registers are in the table, we must remove any REG entries that | |
1547 | overlap these registers. */ | |
1548 | ||
1549 | delete_reg_equiv (regno); | |
1550 | reg_tick[regno]++; | |
1551 | ||
1552 | if (regno >= FIRST_PSEUDO_REGISTER) | |
85e4d983 RK |
1553 | { |
1554 | /* Because a register can be referenced in more than one mode, | |
1555 | we might have to remove more than one table entry. */ | |
1556 | ||
1557 | struct table_elt *elt; | |
1558 | ||
1559 | while (elt = lookup_for_remove (x, hash, GET_MODE (x))) | |
1560 | remove_from_table (elt, hash); | |
1561 | } | |
7afe21cc RK |
1562 | else |
1563 | { | |
54b1de55 RK |
1564 | HOST_WIDE_INT in_table |
1565 | = TEST_HARD_REG_BIT (hard_regs_in_table, regno); | |
7afe21cc RK |
1566 | int endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (x)); |
1567 | int tregno, tendregno; | |
1568 | register struct table_elt *p, *next; | |
1569 | ||
1570 | CLEAR_HARD_REG_BIT (hard_regs_in_table, regno); | |
1571 | ||
1572 | for (i = regno + 1; i < endregno; i++) | |
1573 | { | |
1574 | in_table |= TEST_HARD_REG_BIT (hard_regs_in_table, i); | |
1575 | CLEAR_HARD_REG_BIT (hard_regs_in_table, i); | |
1576 | delete_reg_equiv (i); | |
1577 | reg_tick[i]++; | |
1578 | } | |
1579 | ||
1580 | if (in_table) | |
1581 | for (hash = 0; hash < NBUCKETS; hash++) | |
1582 | for (p = table[hash]; p; p = next) | |
1583 | { | |
1584 | next = p->next_same_hash; | |
1585 | ||
1586 | if (GET_CODE (p->exp) != REG | |
1587 | || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER) | |
1588 | continue; | |
1589 | ||
1590 | tregno = REGNO (p->exp); | |
1591 | tendregno | |
1592 | = tregno + HARD_REGNO_NREGS (tregno, GET_MODE (p->exp)); | |
1593 | if (tendregno > regno && tregno < endregno) | |
1594 | remove_from_table (p, hash); | |
1595 | } | |
1596 | } | |
1597 | ||
1598 | return; | |
1599 | } | |
1600 | ||
1601 | if (GET_CODE (x) == SUBREG) | |
1602 | { | |
1603 | if (GET_CODE (SUBREG_REG (x)) != REG) | |
1604 | abort (); | |
bb4034b3 | 1605 | invalidate (SUBREG_REG (x), VOIDmode); |
7afe21cc RK |
1606 | return; |
1607 | } | |
1608 | ||
1609 | /* X is not a register; it must be a memory reference with | |
1610 | a nonvarying address. Remove all hash table elements | |
1611 | that refer to overlapping pieces of memory. */ | |
1612 | ||
1613 | if (GET_CODE (x) != MEM) | |
1614 | abort (); | |
7afe21cc | 1615 | |
bb4034b3 JW |
1616 | if (full_mode == VOIDmode) |
1617 | full_mode = GET_MODE (x); | |
1618 | ||
1619 | set_nonvarying_address_components (XEXP (x, 0), GET_MODE_SIZE (full_mode), | |
f451db89 | 1620 | &base, &start, &end); |
7afe21cc | 1621 | |
7afe21cc RK |
1622 | for (i = 0; i < NBUCKETS; i++) |
1623 | { | |
1624 | register struct table_elt *next; | |
1625 | for (p = table[i]; p; p = next) | |
1626 | { | |
1627 | next = p->next_same_hash; | |
1628 | if (refers_to_mem_p (p->exp, base, start, end)) | |
1629 | remove_from_table (p, i); | |
1630 | } | |
1631 | } | |
1632 | } | |
1633 | ||
1634 | /* Remove all expressions that refer to register REGNO, | |
1635 | since they are already invalid, and we are about to | |
1636 | mark that register valid again and don't want the old | |
1637 | expressions to reappear as valid. */ | |
1638 | ||
1639 | static void | |
1640 | remove_invalid_refs (regno) | |
1641 | int regno; | |
1642 | { | |
1643 | register int i; | |
1644 | register struct table_elt *p, *next; | |
1645 | ||
1646 | for (i = 0; i < NBUCKETS; i++) | |
1647 | for (p = table[i]; p; p = next) | |
1648 | { | |
1649 | next = p->next_same_hash; | |
1650 | if (GET_CODE (p->exp) != REG | |
906c4e36 | 1651 | && refers_to_regno_p (regno, regno + 1, p->exp, NULL_PTR)) |
7afe21cc RK |
1652 | remove_from_table (p, i); |
1653 | } | |
1654 | } | |
1655 | \f | |
1656 | /* Recompute the hash codes of any valid entries in the hash table that | |
1657 | reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG. | |
1658 | ||
1659 | This is called when we make a jump equivalence. */ | |
1660 | ||
1661 | static void | |
1662 | rehash_using_reg (x) | |
1663 | rtx x; | |
1664 | { | |
1665 | int i; | |
1666 | struct table_elt *p, *next; | |
2197a88a | 1667 | unsigned hash; |
7afe21cc RK |
1668 | |
1669 | if (GET_CODE (x) == SUBREG) | |
1670 | x = SUBREG_REG (x); | |
1671 | ||
1672 | /* If X is not a register or if the register is known not to be in any | |
1673 | valid entries in the table, we have no work to do. */ | |
1674 | ||
1675 | if (GET_CODE (x) != REG | |
1676 | || reg_in_table[REGNO (x)] < 0 | |
1677 | || reg_in_table[REGNO (x)] != reg_tick[REGNO (x)]) | |
1678 | return; | |
1679 | ||
1680 | /* Scan all hash chains looking for valid entries that mention X. | |
1681 | If we find one and it is in the wrong hash chain, move it. We can skip | |
1682 | objects that are registers, since they are handled specially. */ | |
1683 | ||
1684 | for (i = 0; i < NBUCKETS; i++) | |
1685 | for (p = table[i]; p; p = next) | |
1686 | { | |
1687 | next = p->next_same_hash; | |
1688 | if (GET_CODE (p->exp) != REG && reg_mentioned_p (x, p->exp) | |
538b78e7 | 1689 | && exp_equiv_p (p->exp, p->exp, 1, 0) |
7afe21cc RK |
1690 | && i != (hash = safe_hash (p->exp, p->mode) % NBUCKETS)) |
1691 | { | |
1692 | if (p->next_same_hash) | |
1693 | p->next_same_hash->prev_same_hash = p->prev_same_hash; | |
1694 | ||
1695 | if (p->prev_same_hash) | |
1696 | p->prev_same_hash->next_same_hash = p->next_same_hash; | |
1697 | else | |
1698 | table[i] = p->next_same_hash; | |
1699 | ||
1700 | p->next_same_hash = table[hash]; | |
1701 | p->prev_same_hash = 0; | |
1702 | if (table[hash]) | |
1703 | table[hash]->prev_same_hash = p; | |
1704 | table[hash] = p; | |
1705 | } | |
1706 | } | |
1707 | } | |
1708 | \f | |
1709 | /* Remove from the hash table all expressions that reference memory, | |
1710 | or some of them as specified by *WRITES. */ | |
1711 | ||
1712 | static void | |
1713 | invalidate_memory (writes) | |
1714 | struct write_data *writes; | |
1715 | { | |
1716 | register int i; | |
1717 | register struct table_elt *p, *next; | |
1718 | int all = writes->all; | |
1719 | int nonscalar = writes->nonscalar; | |
1720 | ||
1721 | for (i = 0; i < NBUCKETS; i++) | |
1722 | for (p = table[i]; p; p = next) | |
1723 | { | |
1724 | next = p->next_same_hash; | |
1725 | if (p->in_memory | |
1726 | && (all | |
1727 | || (nonscalar && p->in_struct) | |
1728 | || cse_rtx_addr_varies_p (p->exp))) | |
1729 | remove_from_table (p, i); | |
1730 | } | |
1731 | } | |
1732 | \f | |
1733 | /* Remove from the hash table any expression that is a call-clobbered | |
1734 | register. Also update their TICK values. */ | |
1735 | ||
1736 | static void | |
1737 | invalidate_for_call () | |
1738 | { | |
1739 | int regno, endregno; | |
1740 | int i; | |
2197a88a | 1741 | unsigned hash; |
7afe21cc RK |
1742 | struct table_elt *p, *next; |
1743 | int in_table = 0; | |
1744 | ||
1745 | /* Go through all the hard registers. For each that is clobbered in | |
1746 | a CALL_INSN, remove the register from quantity chains and update | |
1747 | reg_tick if defined. Also see if any of these registers is currently | |
1748 | in the table. */ | |
1749 | ||
1750 | for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) | |
1751 | if (TEST_HARD_REG_BIT (regs_invalidated_by_call, regno)) | |
1752 | { | |
1753 | delete_reg_equiv (regno); | |
1754 | if (reg_tick[regno] >= 0) | |
1755 | reg_tick[regno]++; | |
1756 | ||
0e227018 | 1757 | in_table |= (TEST_HARD_REG_BIT (hard_regs_in_table, regno) != 0); |
7afe21cc RK |
1758 | } |
1759 | ||
1760 | /* In the case where we have no call-clobbered hard registers in the | |
1761 | table, we are done. Otherwise, scan the table and remove any | |
1762 | entry that overlaps a call-clobbered register. */ | |
1763 | ||
1764 | if (in_table) | |
1765 | for (hash = 0; hash < NBUCKETS; hash++) | |
1766 | for (p = table[hash]; p; p = next) | |
1767 | { | |
1768 | next = p->next_same_hash; | |
1769 | ||
1770 | if (GET_CODE (p->exp) != REG | |
1771 | || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER) | |
1772 | continue; | |
1773 | ||
1774 | regno = REGNO (p->exp); | |
1775 | endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (p->exp)); | |
1776 | ||
1777 | for (i = regno; i < endregno; i++) | |
1778 | if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i)) | |
1779 | { | |
1780 | remove_from_table (p, hash); | |
1781 | break; | |
1782 | } | |
1783 | } | |
1784 | } | |
1785 | \f | |
1786 | /* Given an expression X of type CONST, | |
1787 | and ELT which is its table entry (or 0 if it | |
1788 | is not in the hash table), | |
1789 | return an alternate expression for X as a register plus integer. | |
1790 | If none can be found, return 0. */ | |
1791 | ||
1792 | static rtx | |
1793 | use_related_value (x, elt) | |
1794 | rtx x; | |
1795 | struct table_elt *elt; | |
1796 | { | |
1797 | register struct table_elt *relt = 0; | |
1798 | register struct table_elt *p, *q; | |
906c4e36 | 1799 | HOST_WIDE_INT offset; |
7afe21cc RK |
1800 | |
1801 | /* First, is there anything related known? | |
1802 | If we have a table element, we can tell from that. | |
1803 | Otherwise, must look it up. */ | |
1804 | ||
1805 | if (elt != 0 && elt->related_value != 0) | |
1806 | relt = elt; | |
1807 | else if (elt == 0 && GET_CODE (x) == CONST) | |
1808 | { | |
1809 | rtx subexp = get_related_value (x); | |
1810 | if (subexp != 0) | |
1811 | relt = lookup (subexp, | |
1812 | safe_hash (subexp, GET_MODE (subexp)) % NBUCKETS, | |
1813 | GET_MODE (subexp)); | |
1814 | } | |
1815 | ||
1816 | if (relt == 0) | |
1817 | return 0; | |
1818 | ||
1819 | /* Search all related table entries for one that has an | |
1820 | equivalent register. */ | |
1821 | ||
1822 | p = relt; | |
1823 | while (1) | |
1824 | { | |
1825 | /* This loop is strange in that it is executed in two different cases. | |
1826 | The first is when X is already in the table. Then it is searching | |
1827 | the RELATED_VALUE list of X's class (RELT). The second case is when | |
1828 | X is not in the table. Then RELT points to a class for the related | |
1829 | value. | |
1830 | ||
1831 | Ensure that, whatever case we are in, that we ignore classes that have | |
1832 | the same value as X. */ | |
1833 | ||
1834 | if (rtx_equal_p (x, p->exp)) | |
1835 | q = 0; | |
1836 | else | |
1837 | for (q = p->first_same_value; q; q = q->next_same_value) | |
1838 | if (GET_CODE (q->exp) == REG) | |
1839 | break; | |
1840 | ||
1841 | if (q) | |
1842 | break; | |
1843 | ||
1844 | p = p->related_value; | |
1845 | ||
1846 | /* We went all the way around, so there is nothing to be found. | |
1847 | Alternatively, perhaps RELT was in the table for some other reason | |
1848 | and it has no related values recorded. */ | |
1849 | if (p == relt || p == 0) | |
1850 | break; | |
1851 | } | |
1852 | ||
1853 | if (q == 0) | |
1854 | return 0; | |
1855 | ||
1856 | offset = (get_integer_term (x) - get_integer_term (p->exp)); | |
1857 | /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */ | |
1858 | return plus_constant (q->exp, offset); | |
1859 | } | |
1860 | \f | |
1861 | /* Hash an rtx. We are careful to make sure the value is never negative. | |
1862 | Equivalent registers hash identically. | |
1863 | MODE is used in hashing for CONST_INTs only; | |
1864 | otherwise the mode of X is used. | |
1865 | ||
1866 | Store 1 in do_not_record if any subexpression is volatile. | |
1867 | ||
1868 | Store 1 in hash_arg_in_memory if X contains a MEM rtx | |
1869 | which does not have the RTX_UNCHANGING_P bit set. | |
1870 | In this case, also store 1 in hash_arg_in_struct | |
1871 | if there is a MEM rtx which has the MEM_IN_STRUCT_P bit set. | |
1872 | ||
1873 | Note that cse_insn knows that the hash code of a MEM expression | |
1874 | is just (int) MEM plus the hash code of the address. */ | |
1875 | ||
2197a88a | 1876 | static unsigned |
7afe21cc RK |
1877 | canon_hash (x, mode) |
1878 | rtx x; | |
1879 | enum machine_mode mode; | |
1880 | { | |
1881 | register int i, j; | |
2197a88a | 1882 | register unsigned hash = 0; |
7afe21cc RK |
1883 | register enum rtx_code code; |
1884 | register char *fmt; | |
1885 | ||
1886 | /* repeat is used to turn tail-recursion into iteration. */ | |
1887 | repeat: | |
1888 | if (x == 0) | |
1889 | return hash; | |
1890 | ||
1891 | code = GET_CODE (x); | |
1892 | switch (code) | |
1893 | { | |
1894 | case REG: | |
1895 | { | |
1896 | register int regno = REGNO (x); | |
1897 | ||
1898 | /* On some machines, we can't record any non-fixed hard register, | |
1899 | because extending its life will cause reload problems. We | |
1900 | consider ap, fp, and sp to be fixed for this purpose. | |
0f41302f | 1901 | On all machines, we can't record any global registers. */ |
7afe21cc RK |
1902 | |
1903 | if (regno < FIRST_PSEUDO_REGISTER | |
1904 | && (global_regs[regno] | |
1905 | #ifdef SMALL_REGISTER_CLASSES | |
f95182a4 ILT |
1906 | || (SMALL_REGISTER_CLASSES |
1907 | && ! fixed_regs[regno] | |
7afe21cc | 1908 | && regno != FRAME_POINTER_REGNUM |
8bc169f2 | 1909 | && regno != HARD_FRAME_POINTER_REGNUM |
7afe21cc RK |
1910 | && regno != ARG_POINTER_REGNUM |
1911 | && regno != STACK_POINTER_REGNUM) | |
1912 | #endif | |
1913 | )) | |
1914 | { | |
1915 | do_not_record = 1; | |
1916 | return 0; | |
1917 | } | |
2197a88a RK |
1918 | hash += ((unsigned) REG << 7) + (unsigned) reg_qty[regno]; |
1919 | return hash; | |
7afe21cc RK |
1920 | } |
1921 | ||
1922 | case CONST_INT: | |
2197a88a RK |
1923 | { |
1924 | unsigned HOST_WIDE_INT tem = INTVAL (x); | |
1925 | hash += ((unsigned) CONST_INT << 7) + (unsigned) mode + tem; | |
1926 | return hash; | |
1927 | } | |
7afe21cc RK |
1928 | |
1929 | case CONST_DOUBLE: | |
1930 | /* This is like the general case, except that it only counts | |
1931 | the integers representing the constant. */ | |
2197a88a | 1932 | hash += (unsigned) code + (unsigned) GET_MODE (x); |
969c8517 RK |
1933 | if (GET_MODE (x) != VOIDmode) |
1934 | for (i = 2; i < GET_RTX_LENGTH (CONST_DOUBLE); i++) | |
1935 | { | |
1936 | unsigned tem = XINT (x, i); | |
1937 | hash += tem; | |
1938 | } | |
1939 | else | |
1940 | hash += ((unsigned) CONST_DOUBLE_LOW (x) | |
1941 | + (unsigned) CONST_DOUBLE_HIGH (x)); | |
7afe21cc RK |
1942 | return hash; |
1943 | ||
1944 | /* Assume there is only one rtx object for any given label. */ | |
1945 | case LABEL_REF: | |
3c543775 RK |
1946 | hash |
1947 | += ((unsigned) LABEL_REF << 7) + (unsigned HOST_WIDE_INT) XEXP (x, 0); | |
2197a88a | 1948 | return hash; |
7afe21cc RK |
1949 | |
1950 | case SYMBOL_REF: | |
3c543775 | 1951 | hash |
f54d4924 | 1952 | += ((unsigned) SYMBOL_REF << 7) + (unsigned HOST_WIDE_INT) XSTR (x, 0); |
2197a88a | 1953 | return hash; |
7afe21cc RK |
1954 | |
1955 | case MEM: | |
1956 | if (MEM_VOLATILE_P (x)) | |
1957 | { | |
1958 | do_not_record = 1; | |
1959 | return 0; | |
1960 | } | |
9ad91d71 | 1961 | if (! RTX_UNCHANGING_P (x) || FIXED_BASE_PLUS_P (XEXP (x, 0))) |
7afe21cc RK |
1962 | { |
1963 | hash_arg_in_memory = 1; | |
1964 | if (MEM_IN_STRUCT_P (x)) hash_arg_in_struct = 1; | |
1965 | } | |
1966 | /* Now that we have already found this special case, | |
1967 | might as well speed it up as much as possible. */ | |
2197a88a | 1968 | hash += (unsigned) MEM; |
7afe21cc RK |
1969 | x = XEXP (x, 0); |
1970 | goto repeat; | |
1971 | ||
1972 | case PRE_DEC: | |
1973 | case PRE_INC: | |
1974 | case POST_DEC: | |
1975 | case POST_INC: | |
1976 | case PC: | |
1977 | case CC0: | |
1978 | case CALL: | |
1979 | case UNSPEC_VOLATILE: | |
1980 | do_not_record = 1; | |
1981 | return 0; | |
1982 | ||
1983 | case ASM_OPERANDS: | |
1984 | if (MEM_VOLATILE_P (x)) | |
1985 | { | |
1986 | do_not_record = 1; | |
1987 | return 0; | |
1988 | } | |
1989 | } | |
1990 | ||
1991 | i = GET_RTX_LENGTH (code) - 1; | |
2197a88a | 1992 | hash += (unsigned) code + (unsigned) GET_MODE (x); |
7afe21cc RK |
1993 | fmt = GET_RTX_FORMAT (code); |
1994 | for (; i >= 0; i--) | |
1995 | { | |
1996 | if (fmt[i] == 'e') | |
1997 | { | |
1998 | rtx tem = XEXP (x, i); | |
7afe21cc RK |
1999 | |
2000 | /* If we are about to do the last recursive call | |
2001 | needed at this level, change it into iteration. | |
2002 | This function is called enough to be worth it. */ | |
2003 | if (i == 0) | |
2004 | { | |
2005 | x = tem; | |
2006 | goto repeat; | |
2007 | } | |
2008 | hash += canon_hash (tem, 0); | |
2009 | } | |
2010 | else if (fmt[i] == 'E') | |
2011 | for (j = 0; j < XVECLEN (x, i); j++) | |
2012 | hash += canon_hash (XVECEXP (x, i, j), 0); | |
2013 | else if (fmt[i] == 's') | |
2014 | { | |
2197a88a | 2015 | register unsigned char *p = (unsigned char *) XSTR (x, i); |
7afe21cc RK |
2016 | if (p) |
2017 | while (*p) | |
2197a88a | 2018 | hash += *p++; |
7afe21cc RK |
2019 | } |
2020 | else if (fmt[i] == 'i') | |
2021 | { | |
2197a88a RK |
2022 | register unsigned tem = XINT (x, i); |
2023 | hash += tem; | |
7afe21cc RK |
2024 | } |
2025 | else | |
2026 | abort (); | |
2027 | } | |
2028 | return hash; | |
2029 | } | |
2030 | ||
2031 | /* Like canon_hash but with no side effects. */ | |
2032 | ||
2197a88a | 2033 | static unsigned |
7afe21cc RK |
2034 | safe_hash (x, mode) |
2035 | rtx x; | |
2036 | enum machine_mode mode; | |
2037 | { | |
2038 | int save_do_not_record = do_not_record; | |
2039 | int save_hash_arg_in_memory = hash_arg_in_memory; | |
2040 | int save_hash_arg_in_struct = hash_arg_in_struct; | |
2197a88a | 2041 | unsigned hash = canon_hash (x, mode); |
7afe21cc RK |
2042 | hash_arg_in_memory = save_hash_arg_in_memory; |
2043 | hash_arg_in_struct = save_hash_arg_in_struct; | |
2044 | do_not_record = save_do_not_record; | |
2045 | return hash; | |
2046 | } | |
2047 | \f | |
2048 | /* Return 1 iff X and Y would canonicalize into the same thing, | |
2049 | without actually constructing the canonicalization of either one. | |
2050 | If VALIDATE is nonzero, | |
2051 | we assume X is an expression being processed from the rtl | |
2052 | and Y was found in the hash table. We check register refs | |
2053 | in Y for being marked as valid. | |
2054 | ||
2055 | If EQUAL_VALUES is nonzero, we allow a register to match a constant value | |
2056 | that is known to be in the register. Ordinarily, we don't allow them | |
2057 | to match, because letting them match would cause unpredictable results | |
2058 | in all the places that search a hash table chain for an equivalent | |
2059 | for a given value. A possible equivalent that has different structure | |
2060 | has its hash code computed from different data. Whether the hash code | |
2061 | is the same as that of the the given value is pure luck. */ | |
2062 | ||
2063 | static int | |
2064 | exp_equiv_p (x, y, validate, equal_values) | |
2065 | rtx x, y; | |
2066 | int validate; | |
2067 | int equal_values; | |
2068 | { | |
906c4e36 | 2069 | register int i, j; |
7afe21cc RK |
2070 | register enum rtx_code code; |
2071 | register char *fmt; | |
2072 | ||
2073 | /* Note: it is incorrect to assume an expression is equivalent to itself | |
2074 | if VALIDATE is nonzero. */ | |
2075 | if (x == y && !validate) | |
2076 | return 1; | |
2077 | if (x == 0 || y == 0) | |
2078 | return x == y; | |
2079 | ||
2080 | code = GET_CODE (x); | |
2081 | if (code != GET_CODE (y)) | |
2082 | { | |
2083 | if (!equal_values) | |
2084 | return 0; | |
2085 | ||
2086 | /* If X is a constant and Y is a register or vice versa, they may be | |
2087 | equivalent. We only have to validate if Y is a register. */ | |
2088 | if (CONSTANT_P (x) && GET_CODE (y) == REG | |
2089 | && REGNO_QTY_VALID_P (REGNO (y)) | |
2090 | && GET_MODE (y) == qty_mode[reg_qty[REGNO (y)]] | |
2091 | && rtx_equal_p (x, qty_const[reg_qty[REGNO (y)]]) | |
2092 | && (! validate || reg_in_table[REGNO (y)] == reg_tick[REGNO (y)])) | |
2093 | return 1; | |
2094 | ||
2095 | if (CONSTANT_P (y) && code == REG | |
2096 | && REGNO_QTY_VALID_P (REGNO (x)) | |
2097 | && GET_MODE (x) == qty_mode[reg_qty[REGNO (x)]] | |
2098 | && rtx_equal_p (y, qty_const[reg_qty[REGNO (x)]])) | |
2099 | return 1; | |
2100 | ||
2101 | return 0; | |
2102 | } | |
2103 | ||
2104 | /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */ | |
2105 | if (GET_MODE (x) != GET_MODE (y)) | |
2106 | return 0; | |
2107 | ||
2108 | switch (code) | |
2109 | { | |
2110 | case PC: | |
2111 | case CC0: | |
2112 | return x == y; | |
2113 | ||
2114 | case CONST_INT: | |
58c8c593 | 2115 | return INTVAL (x) == INTVAL (y); |
7afe21cc RK |
2116 | |
2117 | case LABEL_REF: | |
7afe21cc RK |
2118 | return XEXP (x, 0) == XEXP (y, 0); |
2119 | ||
f54d4924 RK |
2120 | case SYMBOL_REF: |
2121 | return XSTR (x, 0) == XSTR (y, 0); | |
2122 | ||
7afe21cc RK |
2123 | case REG: |
2124 | { | |
2125 | int regno = REGNO (y); | |
2126 | int endregno | |
2127 | = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1 | |
2128 | : HARD_REGNO_NREGS (regno, GET_MODE (y))); | |
2129 | int i; | |
2130 | ||
2131 | /* If the quantities are not the same, the expressions are not | |
2132 | equivalent. If there are and we are not to validate, they | |
2133 | are equivalent. Otherwise, ensure all regs are up-to-date. */ | |
2134 | ||
2135 | if (reg_qty[REGNO (x)] != reg_qty[regno]) | |
2136 | return 0; | |
2137 | ||
2138 | if (! validate) | |
2139 | return 1; | |
2140 | ||
2141 | for (i = regno; i < endregno; i++) | |
2142 | if (reg_in_table[i] != reg_tick[i]) | |
2143 | return 0; | |
2144 | ||
2145 | return 1; | |
2146 | } | |
2147 | ||
2148 | /* For commutative operations, check both orders. */ | |
2149 | case PLUS: | |
2150 | case MULT: | |
2151 | case AND: | |
2152 | case IOR: | |
2153 | case XOR: | |
2154 | case NE: | |
2155 | case EQ: | |
2156 | return ((exp_equiv_p (XEXP (x, 0), XEXP (y, 0), validate, equal_values) | |
2157 | && exp_equiv_p (XEXP (x, 1), XEXP (y, 1), | |
2158 | validate, equal_values)) | |
2159 | || (exp_equiv_p (XEXP (x, 0), XEXP (y, 1), | |
2160 | validate, equal_values) | |
2161 | && exp_equiv_p (XEXP (x, 1), XEXP (y, 0), | |
2162 | validate, equal_values))); | |
2163 | } | |
2164 | ||
2165 | /* Compare the elements. If any pair of corresponding elements | |
2166 | fail to match, return 0 for the whole things. */ | |
2167 | ||
2168 | fmt = GET_RTX_FORMAT (code); | |
2169 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
2170 | { | |
906c4e36 | 2171 | switch (fmt[i]) |
7afe21cc | 2172 | { |
906c4e36 | 2173 | case 'e': |
7afe21cc RK |
2174 | if (! exp_equiv_p (XEXP (x, i), XEXP (y, i), validate, equal_values)) |
2175 | return 0; | |
906c4e36 RK |
2176 | break; |
2177 | ||
2178 | case 'E': | |
7afe21cc RK |
2179 | if (XVECLEN (x, i) != XVECLEN (y, i)) |
2180 | return 0; | |
2181 | for (j = 0; j < XVECLEN (x, i); j++) | |
2182 | if (! exp_equiv_p (XVECEXP (x, i, j), XVECEXP (y, i, j), | |
2183 | validate, equal_values)) | |
2184 | return 0; | |
906c4e36 RK |
2185 | break; |
2186 | ||
2187 | case 's': | |
7afe21cc RK |
2188 | if (strcmp (XSTR (x, i), XSTR (y, i))) |
2189 | return 0; | |
906c4e36 RK |
2190 | break; |
2191 | ||
2192 | case 'i': | |
7afe21cc RK |
2193 | if (XINT (x, i) != XINT (y, i)) |
2194 | return 0; | |
906c4e36 RK |
2195 | break; |
2196 | ||
2197 | case 'w': | |
2198 | if (XWINT (x, i) != XWINT (y, i)) | |
2199 | return 0; | |
2200 | break; | |
2201 | ||
2202 | case '0': | |
2203 | break; | |
2204 | ||
2205 | default: | |
2206 | abort (); | |
7afe21cc | 2207 | } |
906c4e36 RK |
2208 | } |
2209 | ||
7afe21cc RK |
2210 | return 1; |
2211 | } | |
2212 | \f | |
2213 | /* Return 1 iff any subexpression of X matches Y. | |
2214 | Here we do not require that X or Y be valid (for registers referred to) | |
2215 | for being in the hash table. */ | |
2216 | ||
6cd4575e | 2217 | static int |
7afe21cc RK |
2218 | refers_to_p (x, y) |
2219 | rtx x, y; | |
2220 | { | |
2221 | register int i; | |
2222 | register enum rtx_code code; | |
2223 | register char *fmt; | |
2224 | ||
2225 | repeat: | |
2226 | if (x == y) | |
2227 | return 1; | |
2228 | if (x == 0 || y == 0) | |
2229 | return 0; | |
2230 | ||
2231 | code = GET_CODE (x); | |
2232 | /* If X as a whole has the same code as Y, they may match. | |
2233 | If so, return 1. */ | |
2234 | if (code == GET_CODE (y)) | |
2235 | { | |
2236 | if (exp_equiv_p (x, y, 0, 1)) | |
2237 | return 1; | |
2238 | } | |
2239 | ||
2240 | /* X does not match, so try its subexpressions. */ | |
2241 | ||
2242 | fmt = GET_RTX_FORMAT (code); | |
2243 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
2244 | if (fmt[i] == 'e') | |
2245 | { | |
2246 | if (i == 0) | |
2247 | { | |
2248 | x = XEXP (x, 0); | |
2249 | goto repeat; | |
2250 | } | |
2251 | else | |
2252 | if (refers_to_p (XEXP (x, i), y)) | |
2253 | return 1; | |
2254 | } | |
2255 | else if (fmt[i] == 'E') | |
2256 | { | |
2257 | int j; | |
2258 | for (j = 0; j < XVECLEN (x, i); j++) | |
2259 | if (refers_to_p (XVECEXP (x, i, j), y)) | |
2260 | return 1; | |
2261 | } | |
2262 | ||
2263 | return 0; | |
2264 | } | |
2265 | \f | |
f451db89 JL |
2266 | /* Given ADDR and SIZE (a memory address, and the size of the memory reference), |
2267 | set PBASE, PSTART, and PEND which correspond to the base of the address, | |
2268 | the starting offset, and ending offset respectively. | |
2269 | ||
bb4034b3 | 2270 | ADDR is known to be a nonvarying address. */ |
f451db89 | 2271 | |
bb4034b3 JW |
2272 | /* ??? Despite what the comments say, this function is in fact frequently |
2273 | passed varying addresses. This does not appear to cause any problems. */ | |
f451db89 JL |
2274 | |
2275 | static void | |
2276 | set_nonvarying_address_components (addr, size, pbase, pstart, pend) | |
2277 | rtx addr; | |
2278 | int size; | |
2279 | rtx *pbase; | |
6500fb43 | 2280 | HOST_WIDE_INT *pstart, *pend; |
f451db89 JL |
2281 | { |
2282 | rtx base; | |
c85663b1 | 2283 | HOST_WIDE_INT start, end; |
f451db89 JL |
2284 | |
2285 | base = addr; | |
2286 | start = 0; | |
2287 | end = 0; | |
2288 | ||
2289 | /* Registers with nonvarying addresses usually have constant equivalents; | |
2290 | but the frame pointer register is also possible. */ | |
2291 | if (GET_CODE (base) == REG | |
2292 | && qty_const != 0 | |
2293 | && REGNO_QTY_VALID_P (REGNO (base)) | |
2294 | && qty_mode[reg_qty[REGNO (base)]] == GET_MODE (base) | |
2295 | && qty_const[reg_qty[REGNO (base)]] != 0) | |
2296 | base = qty_const[reg_qty[REGNO (base)]]; | |
2297 | else if (GET_CODE (base) == PLUS | |
2298 | && GET_CODE (XEXP (base, 1)) == CONST_INT | |
2299 | && GET_CODE (XEXP (base, 0)) == REG | |
2300 | && qty_const != 0 | |
2301 | && REGNO_QTY_VALID_P (REGNO (XEXP (base, 0))) | |
2302 | && (qty_mode[reg_qty[REGNO (XEXP (base, 0))]] | |
2303 | == GET_MODE (XEXP (base, 0))) | |
2304 | && qty_const[reg_qty[REGNO (XEXP (base, 0))]]) | |
2305 | { | |
2306 | start = INTVAL (XEXP (base, 1)); | |
2307 | base = qty_const[reg_qty[REGNO (XEXP (base, 0))]]; | |
2308 | } | |
9c6b0bae | 2309 | /* This can happen as the result of virtual register instantiation, |
abc95ed3 | 2310 | if the initial offset is too large to be a valid address. */ |
9c6b0bae RK |
2311 | else if (GET_CODE (base) == PLUS |
2312 | && GET_CODE (XEXP (base, 0)) == REG | |
2313 | && GET_CODE (XEXP (base, 1)) == REG | |
2314 | && qty_const != 0 | |
2315 | && REGNO_QTY_VALID_P (REGNO (XEXP (base, 0))) | |
2316 | && (qty_mode[reg_qty[REGNO (XEXP (base, 0))]] | |
2317 | == GET_MODE (XEXP (base, 0))) | |
2318 | && qty_const[reg_qty[REGNO (XEXP (base, 0))]] | |
2319 | && REGNO_QTY_VALID_P (REGNO (XEXP (base, 1))) | |
2320 | && (qty_mode[reg_qty[REGNO (XEXP (base, 1))]] | |
2321 | == GET_MODE (XEXP (base, 1))) | |
2322 | && qty_const[reg_qty[REGNO (XEXP (base, 1))]]) | |
2323 | { | |
2324 | rtx tem = qty_const[reg_qty[REGNO (XEXP (base, 1))]]; | |
2325 | base = qty_const[reg_qty[REGNO (XEXP (base, 0))]]; | |
2326 | ||
2327 | /* One of the two values must be a constant. */ | |
2328 | if (GET_CODE (base) != CONST_INT) | |
2329 | { | |
2330 | if (GET_CODE (tem) != CONST_INT) | |
2331 | abort (); | |
2332 | start = INTVAL (tem); | |
2333 | } | |
2334 | else | |
2335 | { | |
2336 | start = INTVAL (base); | |
2337 | base = tem; | |
2338 | } | |
2339 | } | |
f451db89 | 2340 | |
c85663b1 RK |
2341 | /* Handle everything that we can find inside an address that has been |
2342 | viewed as constant. */ | |
f451db89 | 2343 | |
c85663b1 | 2344 | while (1) |
f451db89 | 2345 | { |
c85663b1 RK |
2346 | /* If no part of this switch does a "continue", the code outside |
2347 | will exit this loop. */ | |
2348 | ||
2349 | switch (GET_CODE (base)) | |
2350 | { | |
2351 | case LO_SUM: | |
2352 | /* By definition, operand1 of a LO_SUM is the associated constant | |
2353 | address. Use the associated constant address as the base | |
2354 | instead. */ | |
2355 | base = XEXP (base, 1); | |
2356 | continue; | |
2357 | ||
2358 | case CONST: | |
2359 | /* Strip off CONST. */ | |
2360 | base = XEXP (base, 0); | |
2361 | continue; | |
2362 | ||
2363 | case PLUS: | |
2364 | if (GET_CODE (XEXP (base, 1)) == CONST_INT) | |
2365 | { | |
2366 | start += INTVAL (XEXP (base, 1)); | |
2367 | base = XEXP (base, 0); | |
2368 | continue; | |
2369 | } | |
2370 | break; | |
2371 | ||
2372 | case AND: | |
2373 | /* Handle the case of an AND which is the negative of a power of | |
2374 | two. This is used to represent unaligned memory operations. */ | |
2375 | if (GET_CODE (XEXP (base, 1)) == CONST_INT | |
2376 | && exact_log2 (- INTVAL (XEXP (base, 1))) > 0) | |
2377 | { | |
2378 | set_nonvarying_address_components (XEXP (base, 0), size, | |
2379 | pbase, pstart, pend); | |
2380 | ||
2381 | /* Assume the worst misalignment. START is affected, but not | |
2382 | END, so compensate but adjusting SIZE. Don't lose any | |
2383 | constant we already had. */ | |
2384 | ||
2385 | size = *pend - *pstart - INTVAL (XEXP (base, 1)) - 1; | |
89046535 RK |
2386 | start += *pstart + INTVAL (XEXP (base, 1)) + 1; |
2387 | end += *pend; | |
c85663b1 RK |
2388 | base = *pbase; |
2389 | } | |
2390 | break; | |
2391 | } | |
2392 | ||
2393 | break; | |
f451db89 JL |
2394 | } |
2395 | ||
336d6f0a RK |
2396 | if (GET_CODE (base) == CONST_INT) |
2397 | { | |
2398 | start += INTVAL (base); | |
2399 | base = const0_rtx; | |
2400 | } | |
2401 | ||
f451db89 JL |
2402 | end = start + size; |
2403 | ||
2404 | /* Set the return values. */ | |
2405 | *pbase = base; | |
2406 | *pstart = start; | |
2407 | *pend = end; | |
2408 | } | |
2409 | ||
7afe21cc RK |
2410 | /* Return 1 iff any subexpression of X refers to memory |
2411 | at an address of BASE plus some offset | |
2412 | such that any of the bytes' offsets fall between START (inclusive) | |
2413 | and END (exclusive). | |
2414 | ||
f451db89 JL |
2415 | The value is undefined if X is a varying address (as determined by |
2416 | cse_rtx_addr_varies_p). This function is not used in such cases. | |
7afe21cc RK |
2417 | |
2418 | When used in the cse pass, `qty_const' is nonzero, and it is used | |
2419 | to treat an address that is a register with a known constant value | |
2420 | as if it were that constant value. | |
2421 | In the loop pass, `qty_const' is zero, so this is not done. */ | |
2422 | ||
f451db89 | 2423 | static int |
7afe21cc RK |
2424 | refers_to_mem_p (x, base, start, end) |
2425 | rtx x, base; | |
906c4e36 | 2426 | HOST_WIDE_INT start, end; |
7afe21cc | 2427 | { |
906c4e36 | 2428 | register HOST_WIDE_INT i; |
7afe21cc RK |
2429 | register enum rtx_code code; |
2430 | register char *fmt; | |
2431 | ||
7afe21cc RK |
2432 | repeat: |
2433 | if (x == 0) | |
2434 | return 0; | |
2435 | ||
2436 | code = GET_CODE (x); | |
2437 | if (code == MEM) | |
2438 | { | |
2439 | register rtx addr = XEXP (x, 0); /* Get the address. */ | |
f451db89 | 2440 | rtx mybase; |
6500fb43 | 2441 | HOST_WIDE_INT mystart, myend; |
7afe21cc | 2442 | |
f451db89 JL |
2443 | set_nonvarying_address_components (addr, GET_MODE_SIZE (GET_MODE (x)), |
2444 | &mybase, &mystart, &myend); | |
2445 | ||
2446 | ||
2447 | /* refers_to_mem_p is never called with varying addresses. | |
2448 | If the base addresses are not equal, there is no chance | |
2449 | of the memory addresses conflicting. */ | |
7b0d7bd0 | 2450 | if (! rtx_equal_p (mybase, base)) |
7afe21cc RK |
2451 | return 0; |
2452 | ||
f451db89 | 2453 | return myend > start && mystart < end; |
7afe21cc RK |
2454 | } |
2455 | ||
2456 | /* X does not match, so try its subexpressions. */ | |
2457 | ||
2458 | fmt = GET_RTX_FORMAT (code); | |
2459 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
2460 | if (fmt[i] == 'e') | |
2461 | { | |
2462 | if (i == 0) | |
2463 | { | |
2464 | x = XEXP (x, 0); | |
2465 | goto repeat; | |
2466 | } | |
2467 | else | |
2468 | if (refers_to_mem_p (XEXP (x, i), base, start, end)) | |
2469 | return 1; | |
2470 | } | |
2471 | else if (fmt[i] == 'E') | |
2472 | { | |
2473 | int j; | |
2474 | for (j = 0; j < XVECLEN (x, i); j++) | |
2475 | if (refers_to_mem_p (XVECEXP (x, i, j), base, start, end)) | |
2476 | return 1; | |
2477 | } | |
2478 | ||
2479 | return 0; | |
2480 | } | |
2481 | ||
2482 | /* Nonzero if X refers to memory at a varying address; | |
2483 | except that a register which has at the moment a known constant value | |
2484 | isn't considered variable. */ | |
2485 | ||
2486 | static int | |
2487 | cse_rtx_addr_varies_p (x) | |
2488 | rtx x; | |
2489 | { | |
2490 | /* We need not check for X and the equivalence class being of the same | |
2491 | mode because if X is equivalent to a constant in some mode, it | |
2492 | doesn't vary in any mode. */ | |
2493 | ||
2494 | if (GET_CODE (x) == MEM | |
2495 | && GET_CODE (XEXP (x, 0)) == REG | |
2496 | && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))) | |
2497 | && GET_MODE (XEXP (x, 0)) == qty_mode[reg_qty[REGNO (XEXP (x, 0))]] | |
2498 | && qty_const[reg_qty[REGNO (XEXP (x, 0))]] != 0) | |
2499 | return 0; | |
2500 | ||
2501 | if (GET_CODE (x) == MEM | |
2502 | && GET_CODE (XEXP (x, 0)) == PLUS | |
2503 | && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT | |
2504 | && GET_CODE (XEXP (XEXP (x, 0), 0)) == REG | |
2505 | && REGNO_QTY_VALID_P (REGNO (XEXP (XEXP (x, 0), 0))) | |
2506 | && (GET_MODE (XEXP (XEXP (x, 0), 0)) | |
2507 | == qty_mode[reg_qty[REGNO (XEXP (XEXP (x, 0), 0))]]) | |
2508 | && qty_const[reg_qty[REGNO (XEXP (XEXP (x, 0), 0))]]) | |
2509 | return 0; | |
2510 | ||
9c6b0bae RK |
2511 | /* This can happen as the result of virtual register instantiation, if |
2512 | the initial constant is too large to be a valid address. This gives | |
2513 | us a three instruction sequence, load large offset into a register, | |
2514 | load fp minus a constant into a register, then a MEM which is the | |
2515 | sum of the two `constant' registers. */ | |
2516 | if (GET_CODE (x) == MEM | |
2517 | && GET_CODE (XEXP (x, 0)) == PLUS | |
2518 | && GET_CODE (XEXP (XEXP (x, 0), 0)) == REG | |
2519 | && GET_CODE (XEXP (XEXP (x, 0), 1)) == REG | |
2520 | && REGNO_QTY_VALID_P (REGNO (XEXP (XEXP (x, 0), 0))) | |
2521 | && (GET_MODE (XEXP (XEXP (x, 0), 0)) | |
2522 | == qty_mode[reg_qty[REGNO (XEXP (XEXP (x, 0), 0))]]) | |
2523 | && qty_const[reg_qty[REGNO (XEXP (XEXP (x, 0), 0))]] | |
2524 | && REGNO_QTY_VALID_P (REGNO (XEXP (XEXP (x, 0), 1))) | |
2525 | && (GET_MODE (XEXP (XEXP (x, 0), 1)) | |
2526 | == qty_mode[reg_qty[REGNO (XEXP (XEXP (x, 0), 1))]]) | |
2527 | && qty_const[reg_qty[REGNO (XEXP (XEXP (x, 0), 1))]]) | |
2528 | return 0; | |
2529 | ||
7afe21cc RK |
2530 | return rtx_addr_varies_p (x); |
2531 | } | |
2532 | \f | |
2533 | /* Canonicalize an expression: | |
2534 | replace each register reference inside it | |
2535 | with the "oldest" equivalent register. | |
2536 | ||
2537 | If INSN is non-zero and we are replacing a pseudo with a hard register | |
7722328e RK |
2538 | or vice versa, validate_change is used to ensure that INSN remains valid |
2539 | after we make our substitution. The calls are made with IN_GROUP non-zero | |
2540 | so apply_change_group must be called upon the outermost return from this | |
2541 | function (unless INSN is zero). The result of apply_change_group can | |
2542 | generally be discarded since the changes we are making are optional. */ | |
7afe21cc RK |
2543 | |
2544 | static rtx | |
2545 | canon_reg (x, insn) | |
2546 | rtx x; | |
2547 | rtx insn; | |
2548 | { | |
2549 | register int i; | |
2550 | register enum rtx_code code; | |
2551 | register char *fmt; | |
2552 | ||
2553 | if (x == 0) | |
2554 | return x; | |
2555 | ||
2556 | code = GET_CODE (x); | |
2557 | switch (code) | |
2558 | { | |
2559 | case PC: | |
2560 | case CC0: | |
2561 | case CONST: | |
2562 | case CONST_INT: | |
2563 | case CONST_DOUBLE: | |
2564 | case SYMBOL_REF: | |
2565 | case LABEL_REF: | |
2566 | case ADDR_VEC: | |
2567 | case ADDR_DIFF_VEC: | |
2568 | return x; | |
2569 | ||
2570 | case REG: | |
2571 | { | |
2572 | register int first; | |
2573 | ||
2574 | /* Never replace a hard reg, because hard regs can appear | |
2575 | in more than one machine mode, and we must preserve the mode | |
2576 | of each occurrence. Also, some hard regs appear in | |
2577 | MEMs that are shared and mustn't be altered. Don't try to | |
2578 | replace any reg that maps to a reg of class NO_REGS. */ | |
2579 | if (REGNO (x) < FIRST_PSEUDO_REGISTER | |
2580 | || ! REGNO_QTY_VALID_P (REGNO (x))) | |
2581 | return x; | |
2582 | ||
2583 | first = qty_first_reg[reg_qty[REGNO (x)]]; | |
2584 | return (first >= FIRST_PSEUDO_REGISTER ? regno_reg_rtx[first] | |
2585 | : REGNO_REG_CLASS (first) == NO_REGS ? x | |
2586 | : gen_rtx (REG, qty_mode[reg_qty[REGNO (x)]], first)); | |
2587 | } | |
2588 | } | |
2589 | ||
2590 | fmt = GET_RTX_FORMAT (code); | |
2591 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
2592 | { | |
2593 | register int j; | |
2594 | ||
2595 | if (fmt[i] == 'e') | |
2596 | { | |
2597 | rtx new = canon_reg (XEXP (x, i), insn); | |
58873255 | 2598 | int insn_code; |
7afe21cc RK |
2599 | |
2600 | /* If replacing pseudo with hard reg or vice versa, ensure the | |
178c39f6 | 2601 | insn remains valid. Likewise if the insn has MATCH_DUPs. */ |
aee9dc31 RS |
2602 | if (insn != 0 && new != 0 |
2603 | && GET_CODE (new) == REG && GET_CODE (XEXP (x, i)) == REG | |
178c39f6 RK |
2604 | && (((REGNO (new) < FIRST_PSEUDO_REGISTER) |
2605 | != (REGNO (XEXP (x, i)) < FIRST_PSEUDO_REGISTER)) | |
58873255 RK |
2606 | || (insn_code = recog_memoized (insn)) < 0 |
2607 | || insn_n_dups[insn_code] > 0)) | |
77fa0940 | 2608 | validate_change (insn, &XEXP (x, i), new, 1); |
7afe21cc RK |
2609 | else |
2610 | XEXP (x, i) = new; | |
2611 | } | |
2612 | else if (fmt[i] == 'E') | |
2613 | for (j = 0; j < XVECLEN (x, i); j++) | |
2614 | XVECEXP (x, i, j) = canon_reg (XVECEXP (x, i, j), insn); | |
2615 | } | |
2616 | ||
2617 | return x; | |
2618 | } | |
2619 | \f | |
a2cabb29 | 2620 | /* LOC is a location within INSN that is an operand address (the contents of |
7afe21cc RK |
2621 | a MEM). Find the best equivalent address to use that is valid for this |
2622 | insn. | |
2623 | ||
2624 | On most CISC machines, complicated address modes are costly, and rtx_cost | |
2625 | is a good approximation for that cost. However, most RISC machines have | |
2626 | only a few (usually only one) memory reference formats. If an address is | |
2627 | valid at all, it is often just as cheap as any other address. Hence, for | |
2628 | RISC machines, we use the configuration macro `ADDRESS_COST' to compare the | |
2629 | costs of various addresses. For two addresses of equal cost, choose the one | |
2630 | with the highest `rtx_cost' value as that has the potential of eliminating | |
2631 | the most insns. For equal costs, we choose the first in the equivalence | |
2632 | class. Note that we ignore the fact that pseudo registers are cheaper | |
2633 | than hard registers here because we would also prefer the pseudo registers. | |
2634 | */ | |
2635 | ||
6cd4575e | 2636 | static void |
7afe21cc RK |
2637 | find_best_addr (insn, loc) |
2638 | rtx insn; | |
2639 | rtx *loc; | |
2640 | { | |
2641 | struct table_elt *elt, *p; | |
2642 | rtx addr = *loc; | |
2643 | int our_cost; | |
2644 | int found_better = 1; | |
2645 | int save_do_not_record = do_not_record; | |
2646 | int save_hash_arg_in_memory = hash_arg_in_memory; | |
2647 | int save_hash_arg_in_struct = hash_arg_in_struct; | |
7afe21cc RK |
2648 | int addr_volatile; |
2649 | int regno; | |
2197a88a | 2650 | unsigned hash; |
7afe21cc RK |
2651 | |
2652 | /* Do not try to replace constant addresses or addresses of local and | |
2653 | argument slots. These MEM expressions are made only once and inserted | |
2654 | in many instructions, as well as being used to control symbol table | |
2655 | output. It is not safe to clobber them. | |
2656 | ||
2657 | There are some uncommon cases where the address is already in a register | |
2658 | for some reason, but we cannot take advantage of that because we have | |
2659 | no easy way to unshare the MEM. In addition, looking up all stack | |
2660 | addresses is costly. */ | |
2661 | if ((GET_CODE (addr) == PLUS | |
2662 | && GET_CODE (XEXP (addr, 0)) == REG | |
2663 | && GET_CODE (XEXP (addr, 1)) == CONST_INT | |
2664 | && (regno = REGNO (XEXP (addr, 0)), | |
8bc169f2 DE |
2665 | regno == FRAME_POINTER_REGNUM || regno == HARD_FRAME_POINTER_REGNUM |
2666 | || regno == ARG_POINTER_REGNUM)) | |
7afe21cc | 2667 | || (GET_CODE (addr) == REG |
8bc169f2 DE |
2668 | && (regno = REGNO (addr), regno == FRAME_POINTER_REGNUM |
2669 | || regno == HARD_FRAME_POINTER_REGNUM | |
2670 | || regno == ARG_POINTER_REGNUM)) | |
7afe21cc RK |
2671 | || CONSTANT_ADDRESS_P (addr)) |
2672 | return; | |
2673 | ||
2674 | /* If this address is not simply a register, try to fold it. This will | |
2675 | sometimes simplify the expression. Many simplifications | |
2676 | will not be valid, but some, usually applying the associative rule, will | |
2677 | be valid and produce better code. */ | |
8c87f107 RK |
2678 | if (GET_CODE (addr) != REG) |
2679 | { | |
2680 | rtx folded = fold_rtx (copy_rtx (addr), NULL_RTX); | |
2681 | ||
2682 | if (1 | |
2683 | #ifdef ADDRESS_COST | |
2684 | && (ADDRESS_COST (folded) < ADDRESS_COST (addr) | |
2685 | || (ADDRESS_COST (folded) == ADDRESS_COST (addr) | |
2686 | && rtx_cost (folded) > rtx_cost (addr))) | |
2687 | #else | |
2688 | && rtx_cost (folded) < rtx_cost (addr) | |
2689 | #endif | |
2690 | && validate_change (insn, loc, folded, 0)) | |
2691 | addr = folded; | |
2692 | } | |
7afe21cc | 2693 | |
42495ca0 RK |
2694 | /* If this address is not in the hash table, we can't look for equivalences |
2695 | of the whole address. Also, ignore if volatile. */ | |
2696 | ||
7afe21cc | 2697 | do_not_record = 0; |
2197a88a | 2698 | hash = HASH (addr, Pmode); |
7afe21cc RK |
2699 | addr_volatile = do_not_record; |
2700 | do_not_record = save_do_not_record; | |
2701 | hash_arg_in_memory = save_hash_arg_in_memory; | |
2702 | hash_arg_in_struct = save_hash_arg_in_struct; | |
2703 | ||
2704 | if (addr_volatile) | |
2705 | return; | |
2706 | ||
2197a88a | 2707 | elt = lookup (addr, hash, Pmode); |
7afe21cc | 2708 | |
7afe21cc | 2709 | #ifndef ADDRESS_COST |
42495ca0 RK |
2710 | if (elt) |
2711 | { | |
2712 | our_cost = elt->cost; | |
2713 | ||
2714 | /* Find the lowest cost below ours that works. */ | |
2715 | for (elt = elt->first_same_value; elt; elt = elt->next_same_value) | |
2716 | if (elt->cost < our_cost | |
2717 | && (GET_CODE (elt->exp) == REG | |
2718 | || exp_equiv_p (elt->exp, elt->exp, 1, 0)) | |
2719 | && validate_change (insn, loc, | |
906c4e36 | 2720 | canon_reg (copy_rtx (elt->exp), NULL_RTX), 0)) |
42495ca0 RK |
2721 | return; |
2722 | } | |
2723 | #else | |
7afe21cc | 2724 | |
42495ca0 RK |
2725 | if (elt) |
2726 | { | |
2727 | /* We need to find the best (under the criteria documented above) entry | |
2728 | in the class that is valid. We use the `flag' field to indicate | |
2729 | choices that were invalid and iterate until we can't find a better | |
2730 | one that hasn't already been tried. */ | |
7afe21cc | 2731 | |
42495ca0 RK |
2732 | for (p = elt->first_same_value; p; p = p->next_same_value) |
2733 | p->flag = 0; | |
7afe21cc | 2734 | |
42495ca0 RK |
2735 | while (found_better) |
2736 | { | |
2737 | int best_addr_cost = ADDRESS_COST (*loc); | |
2738 | int best_rtx_cost = (elt->cost + 1) >> 1; | |
2739 | struct table_elt *best_elt = elt; | |
2740 | ||
2741 | found_better = 0; | |
2742 | for (p = elt->first_same_value; p; p = p->next_same_value) | |
2743 | if (! p->flag | |
2744 | && (GET_CODE (p->exp) == REG | |
2745 | || exp_equiv_p (p->exp, p->exp, 1, 0)) | |
2746 | && (ADDRESS_COST (p->exp) < best_addr_cost | |
2747 | || (ADDRESS_COST (p->exp) == best_addr_cost | |
2748 | && (p->cost + 1) >> 1 > best_rtx_cost))) | |
2749 | { | |
2750 | found_better = 1; | |
2751 | best_addr_cost = ADDRESS_COST (p->exp); | |
2752 | best_rtx_cost = (p->cost + 1) >> 1; | |
2753 | best_elt = p; | |
2754 | } | |
7afe21cc | 2755 | |
42495ca0 RK |
2756 | if (found_better) |
2757 | { | |
2758 | if (validate_change (insn, loc, | |
906c4e36 RK |
2759 | canon_reg (copy_rtx (best_elt->exp), |
2760 | NULL_RTX), 0)) | |
42495ca0 RK |
2761 | return; |
2762 | else | |
2763 | best_elt->flag = 1; | |
2764 | } | |
2765 | } | |
2766 | } | |
7afe21cc | 2767 | |
42495ca0 RK |
2768 | /* If the address is a binary operation with the first operand a register |
2769 | and the second a constant, do the same as above, but looking for | |
2770 | equivalences of the register. Then try to simplify before checking for | |
2771 | the best address to use. This catches a few cases: First is when we | |
2772 | have REG+const and the register is another REG+const. We can often merge | |
2773 | the constants and eliminate one insn and one register. It may also be | |
2774 | that a machine has a cheap REG+REG+const. Finally, this improves the | |
2775 | code on the Alpha for unaligned byte stores. */ | |
2776 | ||
2777 | if (flag_expensive_optimizations | |
2778 | && (GET_RTX_CLASS (GET_CODE (*loc)) == '2' | |
2779 | || GET_RTX_CLASS (GET_CODE (*loc)) == 'c') | |
2780 | && GET_CODE (XEXP (*loc, 0)) == REG | |
2781 | && GET_CODE (XEXP (*loc, 1)) == CONST_INT) | |
7afe21cc | 2782 | { |
42495ca0 RK |
2783 | rtx c = XEXP (*loc, 1); |
2784 | ||
2785 | do_not_record = 0; | |
2197a88a | 2786 | hash = HASH (XEXP (*loc, 0), Pmode); |
42495ca0 RK |
2787 | do_not_record = save_do_not_record; |
2788 | hash_arg_in_memory = save_hash_arg_in_memory; | |
2789 | hash_arg_in_struct = save_hash_arg_in_struct; | |
2790 | ||
2197a88a | 2791 | elt = lookup (XEXP (*loc, 0), hash, Pmode); |
42495ca0 RK |
2792 | if (elt == 0) |
2793 | return; | |
2794 | ||
2795 | /* We need to find the best (under the criteria documented above) entry | |
2796 | in the class that is valid. We use the `flag' field to indicate | |
2797 | choices that were invalid and iterate until we can't find a better | |
2798 | one that hasn't already been tried. */ | |
7afe21cc | 2799 | |
7afe21cc | 2800 | for (p = elt->first_same_value; p; p = p->next_same_value) |
42495ca0 | 2801 | p->flag = 0; |
7afe21cc | 2802 | |
42495ca0 | 2803 | while (found_better) |
7afe21cc | 2804 | { |
42495ca0 RK |
2805 | int best_addr_cost = ADDRESS_COST (*loc); |
2806 | int best_rtx_cost = (COST (*loc) + 1) >> 1; | |
2807 | struct table_elt *best_elt = elt; | |
2808 | rtx best_rtx = *loc; | |
f6516aee JW |
2809 | int count; |
2810 | ||
2811 | /* This is at worst case an O(n^2) algorithm, so limit our search | |
2812 | to the first 32 elements on the list. This avoids trouble | |
2813 | compiling code with very long basic blocks that can easily | |
2814 | call cse_gen_binary so many times that we run out of memory. */ | |
42495ca0 RK |
2815 | |
2816 | found_better = 0; | |
f6516aee JW |
2817 | for (p = elt->first_same_value, count = 0; |
2818 | p && count < 32; | |
2819 | p = p->next_same_value, count++) | |
42495ca0 RK |
2820 | if (! p->flag |
2821 | && (GET_CODE (p->exp) == REG | |
2822 | || exp_equiv_p (p->exp, p->exp, 1, 0))) | |
2823 | { | |
96b0e481 | 2824 | rtx new = cse_gen_binary (GET_CODE (*loc), Pmode, p->exp, c); |
42495ca0 RK |
2825 | |
2826 | if ((ADDRESS_COST (new) < best_addr_cost | |
2827 | || (ADDRESS_COST (new) == best_addr_cost | |
2828 | && (COST (new) + 1) >> 1 > best_rtx_cost))) | |
2829 | { | |
2830 | found_better = 1; | |
2831 | best_addr_cost = ADDRESS_COST (new); | |
2832 | best_rtx_cost = (COST (new) + 1) >> 1; | |
2833 | best_elt = p; | |
2834 | best_rtx = new; | |
2835 | } | |
2836 | } | |
2837 | ||
2838 | if (found_better) | |
2839 | { | |
2840 | if (validate_change (insn, loc, | |
906c4e36 RK |
2841 | canon_reg (copy_rtx (best_rtx), |
2842 | NULL_RTX), 0)) | |
42495ca0 RK |
2843 | return; |
2844 | else | |
2845 | best_elt->flag = 1; | |
2846 | } | |
7afe21cc RK |
2847 | } |
2848 | } | |
2849 | #endif | |
2850 | } | |
2851 | \f | |
2852 | /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison | |
2853 | operation (EQ, NE, GT, etc.), follow it back through the hash table and | |
2854 | what values are being compared. | |
2855 | ||
2856 | *PARG1 and *PARG2 are updated to contain the rtx representing the values | |
2857 | actually being compared. For example, if *PARG1 was (cc0) and *PARG2 | |
2858 | was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were | |
2859 | compared to produce cc0. | |
2860 | ||
2861 | The return value is the comparison operator and is either the code of | |
2862 | A or the code corresponding to the inverse of the comparison. */ | |
2863 | ||
2864 | static enum rtx_code | |
13c9910f | 2865 | find_comparison_args (code, parg1, parg2, pmode1, pmode2) |
7afe21cc RK |
2866 | enum rtx_code code; |
2867 | rtx *parg1, *parg2; | |
13c9910f | 2868 | enum machine_mode *pmode1, *pmode2; |
7afe21cc RK |
2869 | { |
2870 | rtx arg1, arg2; | |
2871 | ||
2872 | arg1 = *parg1, arg2 = *parg2; | |
2873 | ||
2874 | /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */ | |
2875 | ||
b2796a4b | 2876 | while (arg2 == CONST0_RTX (GET_MODE (arg1))) |
7afe21cc RK |
2877 | { |
2878 | /* Set non-zero when we find something of interest. */ | |
2879 | rtx x = 0; | |
2880 | int reverse_code = 0; | |
2881 | struct table_elt *p = 0; | |
2882 | ||
2883 | /* If arg1 is a COMPARE, extract the comparison arguments from it. | |
2884 | On machines with CC0, this is the only case that can occur, since | |
2885 | fold_rtx will return the COMPARE or item being compared with zero | |
2886 | when given CC0. */ | |
2887 | ||
2888 | if (GET_CODE (arg1) == COMPARE && arg2 == const0_rtx) | |
2889 | x = arg1; | |
2890 | ||
2891 | /* If ARG1 is a comparison operator and CODE is testing for | |
2892 | STORE_FLAG_VALUE, get the inner arguments. */ | |
2893 | ||
2894 | else if (GET_RTX_CLASS (GET_CODE (arg1)) == '<') | |
2895 | { | |
c610adec RK |
2896 | if (code == NE |
2897 | || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT | |
2898 | && code == LT && STORE_FLAG_VALUE == -1) | |
2899 | #ifdef FLOAT_STORE_FLAG_VALUE | |
2900 | || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT | |
2901 | && FLOAT_STORE_FLAG_VALUE < 0) | |
2902 | #endif | |
2903 | ) | |
7afe21cc | 2904 | x = arg1; |
c610adec RK |
2905 | else if (code == EQ |
2906 | || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT | |
2907 | && code == GE && STORE_FLAG_VALUE == -1) | |
2908 | #ifdef FLOAT_STORE_FLAG_VALUE | |
2909 | || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT | |
2910 | && FLOAT_STORE_FLAG_VALUE < 0) | |
2911 | #endif | |
2912 | ) | |
7afe21cc RK |
2913 | x = arg1, reverse_code = 1; |
2914 | } | |
2915 | ||
2916 | /* ??? We could also check for | |
2917 | ||
2918 | (ne (and (eq (...) (const_int 1))) (const_int 0)) | |
2919 | ||
2920 | and related forms, but let's wait until we see them occurring. */ | |
2921 | ||
2922 | if (x == 0) | |
2923 | /* Look up ARG1 in the hash table and see if it has an equivalence | |
2924 | that lets us see what is being compared. */ | |
2925 | p = lookup (arg1, safe_hash (arg1, GET_MODE (arg1)) % NBUCKETS, | |
2926 | GET_MODE (arg1)); | |
2927 | if (p) p = p->first_same_value; | |
2928 | ||
2929 | for (; p; p = p->next_same_value) | |
2930 | { | |
2931 | enum machine_mode inner_mode = GET_MODE (p->exp); | |
2932 | ||
2933 | /* If the entry isn't valid, skip it. */ | |
2934 | if (! exp_equiv_p (p->exp, p->exp, 1, 0)) | |
2935 | continue; | |
2936 | ||
2937 | if (GET_CODE (p->exp) == COMPARE | |
2938 | /* Another possibility is that this machine has a compare insn | |
2939 | that includes the comparison code. In that case, ARG1 would | |
2940 | be equivalent to a comparison operation that would set ARG1 to | |
2941 | either STORE_FLAG_VALUE or zero. If this is an NE operation, | |
2942 | ORIG_CODE is the actual comparison being done; if it is an EQ, | |
2943 | we must reverse ORIG_CODE. On machine with a negative value | |
2944 | for STORE_FLAG_VALUE, also look at LT and GE operations. */ | |
2945 | || ((code == NE | |
2946 | || (code == LT | |
c610adec | 2947 | && GET_MODE_CLASS (inner_mode) == MODE_INT |
906c4e36 RK |
2948 | && (GET_MODE_BITSIZE (inner_mode) |
2949 | <= HOST_BITS_PER_WIDE_INT) | |
7afe21cc | 2950 | && (STORE_FLAG_VALUE |
906c4e36 RK |
2951 | & ((HOST_WIDE_INT) 1 |
2952 | << (GET_MODE_BITSIZE (inner_mode) - 1)))) | |
c610adec RK |
2953 | #ifdef FLOAT_STORE_FLAG_VALUE |
2954 | || (code == LT | |
2955 | && GET_MODE_CLASS (inner_mode) == MODE_FLOAT | |
2956 | && FLOAT_STORE_FLAG_VALUE < 0) | |
2957 | #endif | |
2958 | ) | |
7afe21cc RK |
2959 | && GET_RTX_CLASS (GET_CODE (p->exp)) == '<')) |
2960 | { | |
2961 | x = p->exp; | |
2962 | break; | |
2963 | } | |
2964 | else if ((code == EQ | |
2965 | || (code == GE | |
c610adec | 2966 | && GET_MODE_CLASS (inner_mode) == MODE_INT |
906c4e36 RK |
2967 | && (GET_MODE_BITSIZE (inner_mode) |
2968 | <= HOST_BITS_PER_WIDE_INT) | |
7afe21cc | 2969 | && (STORE_FLAG_VALUE |
906c4e36 RK |
2970 | & ((HOST_WIDE_INT) 1 |
2971 | << (GET_MODE_BITSIZE (inner_mode) - 1)))) | |
c610adec RK |
2972 | #ifdef FLOAT_STORE_FLAG_VALUE |
2973 | || (code == GE | |
2974 | && GET_MODE_CLASS (inner_mode) == MODE_FLOAT | |
2975 | && FLOAT_STORE_FLAG_VALUE < 0) | |
2976 | #endif | |
2977 | ) | |
7afe21cc RK |
2978 | && GET_RTX_CLASS (GET_CODE (p->exp)) == '<') |
2979 | { | |
2980 | reverse_code = 1; | |
2981 | x = p->exp; | |
2982 | break; | |
2983 | } | |
2984 | ||
2985 | /* If this is fp + constant, the equivalent is a better operand since | |
2986 | it may let us predict the value of the comparison. */ | |
2987 | else if (NONZERO_BASE_PLUS_P (p->exp)) | |
2988 | { | |
2989 | arg1 = p->exp; | |
2990 | continue; | |
2991 | } | |
2992 | } | |
2993 | ||
2994 | /* If we didn't find a useful equivalence for ARG1, we are done. | |
2995 | Otherwise, set up for the next iteration. */ | |
2996 | if (x == 0) | |
2997 | break; | |
2998 | ||
2999 | arg1 = XEXP (x, 0), arg2 = XEXP (x, 1); | |
3000 | if (GET_RTX_CLASS (GET_CODE (x)) == '<') | |
3001 | code = GET_CODE (x); | |
3002 | ||
3003 | if (reverse_code) | |
3004 | code = reverse_condition (code); | |
3005 | } | |
3006 | ||
13c9910f RS |
3007 | /* Return our results. Return the modes from before fold_rtx |
3008 | because fold_rtx might produce const_int, and then it's too late. */ | |
3009 | *pmode1 = GET_MODE (arg1), *pmode2 = GET_MODE (arg2); | |
7afe21cc RK |
3010 | *parg1 = fold_rtx (arg1, 0), *parg2 = fold_rtx (arg2, 0); |
3011 | ||
3012 | return code; | |
3013 | } | |
3014 | \f | |
3015 | /* Try to simplify a unary operation CODE whose output mode is to be | |
3016 | MODE with input operand OP whose mode was originally OP_MODE. | |
3017 | Return zero if no simplification can be made. */ | |
3018 | ||
3019 | rtx | |
3020 | simplify_unary_operation (code, mode, op, op_mode) | |
3021 | enum rtx_code code; | |
3022 | enum machine_mode mode; | |
3023 | rtx op; | |
3024 | enum machine_mode op_mode; | |
3025 | { | |
3026 | register int width = GET_MODE_BITSIZE (mode); | |
3027 | ||
3028 | /* The order of these tests is critical so that, for example, we don't | |
3029 | check the wrong mode (input vs. output) for a conversion operation, | |
3030 | such as FIX. At some point, this should be simplified. */ | |
3031 | ||
62c0ea12 | 3032 | #if !defined(REAL_IS_NOT_DOUBLE) || defined(REAL_ARITHMETIC) |
7afe21cc | 3033 | |
62c0ea12 RK |
3034 | if (code == FLOAT && GET_MODE (op) == VOIDmode |
3035 | && (GET_CODE (op) == CONST_DOUBLE || GET_CODE (op) == CONST_INT)) | |
7afe21cc | 3036 | { |
62c0ea12 | 3037 | HOST_WIDE_INT hv, lv; |
7afe21cc RK |
3038 | REAL_VALUE_TYPE d; |
3039 | ||
62c0ea12 RK |
3040 | if (GET_CODE (op) == CONST_INT) |
3041 | lv = INTVAL (op), hv = INTVAL (op) < 0 ? -1 : 0; | |
3042 | else | |
7ac4a266 | 3043 | lv = CONST_DOUBLE_LOW (op), hv = CONST_DOUBLE_HIGH (op); |
7afe21cc RK |
3044 | |
3045 | #ifdef REAL_ARITHMETIC | |
2ebcccf3 | 3046 | REAL_VALUE_FROM_INT (d, lv, hv, mode); |
7afe21cc | 3047 | #else |
62c0ea12 | 3048 | if (hv < 0) |
7afe21cc | 3049 | { |
62c0ea12 | 3050 | d = (double) (~ hv); |
906c4e36 RK |
3051 | d *= ((double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2)) |
3052 | * (double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2))); | |
62c0ea12 | 3053 | d += (double) (unsigned HOST_WIDE_INT) (~ lv); |
7afe21cc RK |
3054 | d = (- d - 1.0); |
3055 | } | |
3056 | else | |
3057 | { | |
62c0ea12 | 3058 | d = (double) hv; |
906c4e36 RK |
3059 | d *= ((double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2)) |
3060 | * (double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2))); | |
62c0ea12 | 3061 | d += (double) (unsigned HOST_WIDE_INT) lv; |
7afe21cc RK |
3062 | } |
3063 | #endif /* REAL_ARITHMETIC */ | |
940fd0b5 | 3064 | d = real_value_truncate (mode, d); |
7afe21cc RK |
3065 | return CONST_DOUBLE_FROM_REAL_VALUE (d, mode); |
3066 | } | |
62c0ea12 RK |
3067 | else if (code == UNSIGNED_FLOAT && GET_MODE (op) == VOIDmode |
3068 | && (GET_CODE (op) == CONST_DOUBLE || GET_CODE (op) == CONST_INT)) | |
7afe21cc | 3069 | { |
62c0ea12 | 3070 | HOST_WIDE_INT hv, lv; |
7afe21cc RK |
3071 | REAL_VALUE_TYPE d; |
3072 | ||
62c0ea12 RK |
3073 | if (GET_CODE (op) == CONST_INT) |
3074 | lv = INTVAL (op), hv = INTVAL (op) < 0 ? -1 : 0; | |
3075 | else | |
7ac4a266 | 3076 | lv = CONST_DOUBLE_LOW (op), hv = CONST_DOUBLE_HIGH (op); |
62c0ea12 | 3077 | |
a9c6464d RK |
3078 | if (op_mode == VOIDmode) |
3079 | { | |
3080 | /* We don't know how to interpret negative-looking numbers in | |
3081 | this case, so don't try to fold those. */ | |
3082 | if (hv < 0) | |
3083 | return 0; | |
3084 | } | |
3085 | else if (GET_MODE_BITSIZE (op_mode) >= HOST_BITS_PER_WIDE_INT * 2) | |
62c0ea12 RK |
3086 | ; |
3087 | else | |
3088 | hv = 0, lv &= GET_MODE_MASK (op_mode); | |
3089 | ||
7afe21cc | 3090 | #ifdef REAL_ARITHMETIC |
2ebcccf3 | 3091 | REAL_VALUE_FROM_UNSIGNED_INT (d, lv, hv, mode); |
7afe21cc | 3092 | #else |
62c0ea12 | 3093 | |
138cec59 | 3094 | d = (double) (unsigned HOST_WIDE_INT) hv; |
906c4e36 RK |
3095 | d *= ((double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2)) |
3096 | * (double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2))); | |
62c0ea12 | 3097 | d += (double) (unsigned HOST_WIDE_INT) lv; |
7afe21cc | 3098 | #endif /* REAL_ARITHMETIC */ |
940fd0b5 | 3099 | d = real_value_truncate (mode, d); |
7afe21cc RK |
3100 | return CONST_DOUBLE_FROM_REAL_VALUE (d, mode); |
3101 | } | |
3102 | #endif | |
3103 | ||
f89e32e9 RK |
3104 | if (GET_CODE (op) == CONST_INT |
3105 | && width <= HOST_BITS_PER_WIDE_INT && width > 0) | |
7afe21cc | 3106 | { |
906c4e36 RK |
3107 | register HOST_WIDE_INT arg0 = INTVAL (op); |
3108 | register HOST_WIDE_INT val; | |
7afe21cc RK |
3109 | |
3110 | switch (code) | |
3111 | { | |
3112 | case NOT: | |
3113 | val = ~ arg0; | |
3114 | break; | |
3115 | ||
3116 | case NEG: | |
3117 | val = - arg0; | |
3118 | break; | |
3119 | ||
3120 | case ABS: | |
3121 | val = (arg0 >= 0 ? arg0 : - arg0); | |
3122 | break; | |
3123 | ||
3124 | case FFS: | |
3125 | /* Don't use ffs here. Instead, get low order bit and then its | |
3126 | number. If arg0 is zero, this will return 0, as desired. */ | |
3127 | arg0 &= GET_MODE_MASK (mode); | |
3128 | val = exact_log2 (arg0 & (- arg0)) + 1; | |
3129 | break; | |
3130 | ||
3131 | case TRUNCATE: | |
3132 | val = arg0; | |
3133 | break; | |
3134 | ||
3135 | case ZERO_EXTEND: | |
3136 | if (op_mode == VOIDmode) | |
3137 | op_mode = mode; | |
82a5e898 | 3138 | if (GET_MODE_BITSIZE (op_mode) == HOST_BITS_PER_WIDE_INT) |
d80e9fd7 RS |
3139 | { |
3140 | /* If we were really extending the mode, | |
3141 | we would have to distinguish between zero-extension | |
3142 | and sign-extension. */ | |
3143 | if (width != GET_MODE_BITSIZE (op_mode)) | |
3144 | abort (); | |
3145 | val = arg0; | |
3146 | } | |
82a5e898 CH |
3147 | else if (GET_MODE_BITSIZE (op_mode) < HOST_BITS_PER_WIDE_INT) |
3148 | val = arg0 & ~((HOST_WIDE_INT) (-1) << GET_MODE_BITSIZE (op_mode)); | |
7afe21cc RK |
3149 | else |
3150 | return 0; | |
3151 | break; | |
3152 | ||
3153 | case SIGN_EXTEND: | |
3154 | if (op_mode == VOIDmode) | |
3155 | op_mode = mode; | |
82a5e898 | 3156 | if (GET_MODE_BITSIZE (op_mode) == HOST_BITS_PER_WIDE_INT) |
d80e9fd7 RS |
3157 | { |
3158 | /* If we were really extending the mode, | |
3159 | we would have to distinguish between zero-extension | |
3160 | and sign-extension. */ | |
3161 | if (width != GET_MODE_BITSIZE (op_mode)) | |
3162 | abort (); | |
3163 | val = arg0; | |
3164 | } | |
f12564b4 | 3165 | else if (GET_MODE_BITSIZE (op_mode) < HOST_BITS_PER_WIDE_INT) |
7afe21cc | 3166 | { |
82a5e898 CH |
3167 | val |
3168 | = arg0 & ~((HOST_WIDE_INT) (-1) << GET_MODE_BITSIZE (op_mode)); | |
3169 | if (val | |
3170 | & ((HOST_WIDE_INT) 1 << (GET_MODE_BITSIZE (op_mode) - 1))) | |
3171 | val -= (HOST_WIDE_INT) 1 << GET_MODE_BITSIZE (op_mode); | |
7afe21cc RK |
3172 | } |
3173 | else | |
3174 | return 0; | |
3175 | break; | |
3176 | ||
d45cf215 RS |
3177 | case SQRT: |
3178 | return 0; | |
3179 | ||
7afe21cc RK |
3180 | default: |
3181 | abort (); | |
3182 | } | |
3183 | ||
3184 | /* Clear the bits that don't belong in our mode, | |
3185 | unless they and our sign bit are all one. | |
3186 | So we get either a reasonable negative value or a reasonable | |
3187 | unsigned value for this mode. */ | |
906c4e36 RK |
3188 | if (width < HOST_BITS_PER_WIDE_INT |
3189 | && ((val & ((HOST_WIDE_INT) (-1) << (width - 1))) | |
3190 | != ((HOST_WIDE_INT) (-1) << (width - 1)))) | |
4879acf6 | 3191 | val &= ((HOST_WIDE_INT) 1 << width) - 1; |
7afe21cc | 3192 | |
906c4e36 | 3193 | return GEN_INT (val); |
7afe21cc RK |
3194 | } |
3195 | ||
3196 | /* We can do some operations on integer CONST_DOUBLEs. Also allow | |
0f41302f | 3197 | for a DImode operation on a CONST_INT. */ |
8e0ac43b | 3198 | else if (GET_MODE (op) == VOIDmode && width <= HOST_BITS_PER_INT * 2 |
7afe21cc RK |
3199 | && (GET_CODE (op) == CONST_DOUBLE || GET_CODE (op) == CONST_INT)) |
3200 | { | |
906c4e36 | 3201 | HOST_WIDE_INT l1, h1, lv, hv; |
7afe21cc RK |
3202 | |
3203 | if (GET_CODE (op) == CONST_DOUBLE) | |
3204 | l1 = CONST_DOUBLE_LOW (op), h1 = CONST_DOUBLE_HIGH (op); | |
3205 | else | |
3206 | l1 = INTVAL (op), h1 = l1 < 0 ? -1 : 0; | |
3207 | ||
3208 | switch (code) | |
3209 | { | |
3210 | case NOT: | |
3211 | lv = ~ l1; | |
3212 | hv = ~ h1; | |
3213 | break; | |
3214 | ||
3215 | case NEG: | |
3216 | neg_double (l1, h1, &lv, &hv); | |
3217 | break; | |
3218 | ||
3219 | case ABS: | |
3220 | if (h1 < 0) | |
3221 | neg_double (l1, h1, &lv, &hv); | |
3222 | else | |
3223 | lv = l1, hv = h1; | |
3224 | break; | |
3225 | ||
3226 | case FFS: | |
3227 | hv = 0; | |
3228 | if (l1 == 0) | |
906c4e36 | 3229 | lv = HOST_BITS_PER_WIDE_INT + exact_log2 (h1 & (-h1)) + 1; |
7afe21cc RK |
3230 | else |
3231 | lv = exact_log2 (l1 & (-l1)) + 1; | |
3232 | break; | |
3233 | ||
3234 | case TRUNCATE: | |
8e0ac43b | 3235 | /* This is just a change-of-mode, so do nothing. */ |
d50d63c0 | 3236 | lv = l1, hv = h1; |
7afe21cc RK |
3237 | break; |
3238 | ||
f72aed24 RS |
3239 | case ZERO_EXTEND: |
3240 | if (op_mode == VOIDmode | |
906c4e36 | 3241 | || GET_MODE_BITSIZE (op_mode) > HOST_BITS_PER_WIDE_INT) |
f72aed24 RS |
3242 | return 0; |
3243 | ||
3244 | hv = 0; | |
3245 | lv = l1 & GET_MODE_MASK (op_mode); | |
3246 | break; | |
3247 | ||
3248 | case SIGN_EXTEND: | |
3249 | if (op_mode == VOIDmode | |
906c4e36 | 3250 | || GET_MODE_BITSIZE (op_mode) > HOST_BITS_PER_WIDE_INT) |
f72aed24 RS |
3251 | return 0; |
3252 | else | |
3253 | { | |
3254 | lv = l1 & GET_MODE_MASK (op_mode); | |
906c4e36 RK |
3255 | if (GET_MODE_BITSIZE (op_mode) < HOST_BITS_PER_WIDE_INT |
3256 | && (lv & ((HOST_WIDE_INT) 1 | |
3257 | << (GET_MODE_BITSIZE (op_mode) - 1))) != 0) | |
3258 | lv -= (HOST_WIDE_INT) 1 << GET_MODE_BITSIZE (op_mode); | |
f72aed24 | 3259 | |
906c4e36 | 3260 | hv = (lv < 0) ? ~ (HOST_WIDE_INT) 0 : 0; |
f72aed24 RS |
3261 | } |
3262 | break; | |
3263 | ||
d45cf215 RS |
3264 | case SQRT: |
3265 | return 0; | |
3266 | ||
7afe21cc RK |
3267 | default: |
3268 | return 0; | |
3269 | } | |
3270 | ||
3271 | return immed_double_const (lv, hv, mode); | |
3272 | } | |
3273 | ||
3274 | #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC) | |
3275 | else if (GET_CODE (op) == CONST_DOUBLE | |
3276 | && GET_MODE_CLASS (mode) == MODE_FLOAT) | |
3277 | { | |
3278 | REAL_VALUE_TYPE d; | |
3279 | jmp_buf handler; | |
3280 | rtx x; | |
3281 | ||
3282 | if (setjmp (handler)) | |
3283 | /* There used to be a warning here, but that is inadvisable. | |
3284 | People may want to cause traps, and the natural way | |
3285 | to do it should not get a warning. */ | |
3286 | return 0; | |
3287 | ||
3288 | set_float_handler (handler); | |
3289 | ||
3290 | REAL_VALUE_FROM_CONST_DOUBLE (d, op); | |
3291 | ||
3292 | switch (code) | |
3293 | { | |
3294 | case NEG: | |
3295 | d = REAL_VALUE_NEGATE (d); | |
3296 | break; | |
3297 | ||
3298 | case ABS: | |
8b3686ed | 3299 | if (REAL_VALUE_NEGATIVE (d)) |
7afe21cc RK |
3300 | d = REAL_VALUE_NEGATE (d); |
3301 | break; | |
3302 | ||
3303 | case FLOAT_TRUNCATE: | |
d3159aee | 3304 | d = real_value_truncate (mode, d); |
7afe21cc RK |
3305 | break; |
3306 | ||
3307 | case FLOAT_EXTEND: | |
3308 | /* All this does is change the mode. */ | |
3309 | break; | |
3310 | ||
3311 | case FIX: | |
d3159aee | 3312 | d = REAL_VALUE_RNDZINT (d); |
7afe21cc RK |
3313 | break; |
3314 | ||
3315 | case UNSIGNED_FIX: | |
d3159aee | 3316 | d = REAL_VALUE_UNSIGNED_RNDZINT (d); |
7afe21cc RK |
3317 | break; |
3318 | ||
d45cf215 RS |
3319 | case SQRT: |
3320 | return 0; | |
3321 | ||
7afe21cc RK |
3322 | default: |
3323 | abort (); | |
3324 | } | |
3325 | ||
560c94a2 | 3326 | x = CONST_DOUBLE_FROM_REAL_VALUE (d, mode); |
906c4e36 | 3327 | set_float_handler (NULL_PTR); |
7afe21cc RK |
3328 | return x; |
3329 | } | |
8e0ac43b RK |
3330 | |
3331 | else if (GET_CODE (op) == CONST_DOUBLE | |
3332 | && GET_MODE_CLASS (GET_MODE (op)) == MODE_FLOAT | |
3333 | && GET_MODE_CLASS (mode) == MODE_INT | |
906c4e36 | 3334 | && width <= HOST_BITS_PER_WIDE_INT && width > 0) |
7afe21cc RK |
3335 | { |
3336 | REAL_VALUE_TYPE d; | |
3337 | jmp_buf handler; | |
906c4e36 | 3338 | HOST_WIDE_INT val; |
7afe21cc RK |
3339 | |
3340 | if (setjmp (handler)) | |
3341 | return 0; | |
3342 | ||
3343 | set_float_handler (handler); | |
3344 | ||
3345 | REAL_VALUE_FROM_CONST_DOUBLE (d, op); | |
3346 | ||
3347 | switch (code) | |
3348 | { | |
3349 | case FIX: | |
3350 | val = REAL_VALUE_FIX (d); | |
3351 | break; | |
3352 | ||
3353 | case UNSIGNED_FIX: | |
3354 | val = REAL_VALUE_UNSIGNED_FIX (d); | |
3355 | break; | |
3356 | ||
3357 | default: | |
3358 | abort (); | |
3359 | } | |
3360 | ||
906c4e36 | 3361 | set_float_handler (NULL_PTR); |
7afe21cc RK |
3362 | |
3363 | /* Clear the bits that don't belong in our mode, | |
3364 | unless they and our sign bit are all one. | |
3365 | So we get either a reasonable negative value or a reasonable | |
3366 | unsigned value for this mode. */ | |
906c4e36 RK |
3367 | if (width < HOST_BITS_PER_WIDE_INT |
3368 | && ((val & ((HOST_WIDE_INT) (-1) << (width - 1))) | |
3369 | != ((HOST_WIDE_INT) (-1) << (width - 1)))) | |
3370 | val &= ((HOST_WIDE_INT) 1 << width) - 1; | |
7afe21cc | 3371 | |
ad89d6f6 TG |
3372 | /* If this would be an entire word for the target, but is not for |
3373 | the host, then sign-extend on the host so that the number will look | |
3374 | the same way on the host that it would on the target. | |
3375 | ||
3376 | For example, when building a 64 bit alpha hosted 32 bit sparc | |
3377 | targeted compiler, then we want the 32 bit unsigned value -1 to be | |
3378 | represented as a 64 bit value -1, and not as 0x00000000ffffffff. | |
3379 | The later confuses the sparc backend. */ | |
3380 | ||
3381 | if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT && BITS_PER_WORD == width | |
3382 | && (val & ((HOST_WIDE_INT) 1 << (width - 1)))) | |
3383 | val |= ((HOST_WIDE_INT) (-1) << width); | |
3384 | ||
906c4e36 | 3385 | return GEN_INT (val); |
7afe21cc RK |
3386 | } |
3387 | #endif | |
a6acbe15 RS |
3388 | /* This was formerly used only for non-IEEE float. |
3389 | eggert@twinsun.com says it is safe for IEEE also. */ | |
3390 | else | |
7afe21cc RK |
3391 | { |
3392 | /* There are some simplifications we can do even if the operands | |
a6acbe15 | 3393 | aren't constant. */ |
7afe21cc RK |
3394 | switch (code) |
3395 | { | |
3396 | case NEG: | |
3397 | case NOT: | |
3398 | /* (not (not X)) == X, similarly for NEG. */ | |
3399 | if (GET_CODE (op) == code) | |
3400 | return XEXP (op, 0); | |
3401 | break; | |
3402 | ||
3403 | case SIGN_EXTEND: | |
3404 | /* (sign_extend (truncate (minus (label_ref L1) (label_ref L2)))) | |
3405 | becomes just the MINUS if its mode is MODE. This allows | |
3406 | folding switch statements on machines using casesi (such as | |
3407 | the Vax). */ | |
3408 | if (GET_CODE (op) == TRUNCATE | |
3409 | && GET_MODE (XEXP (op, 0)) == mode | |
3410 | && GET_CODE (XEXP (op, 0)) == MINUS | |
3411 | && GET_CODE (XEXP (XEXP (op, 0), 0)) == LABEL_REF | |
3412 | && GET_CODE (XEXP (XEXP (op, 0), 1)) == LABEL_REF) | |
3413 | return XEXP (op, 0); | |
cceb347c RK |
3414 | |
3415 | #ifdef POINTERS_EXTEND_UNSIGNED | |
3416 | if (! POINTERS_EXTEND_UNSIGNED | |
3417 | && mode == Pmode && GET_MODE (op) == ptr_mode | |
3418 | && CONSTANT_P (op)) | |
3419 | return convert_memory_address (Pmode, op); | |
3420 | #endif | |
3421 | break; | |
3422 | ||
3423 | #ifdef POINTERS_EXTEND_UNSIGNED | |
3424 | case ZERO_EXTEND: | |
3425 | if (POINTERS_EXTEND_UNSIGNED | |
3426 | && mode == Pmode && GET_MODE (op) == ptr_mode | |
3427 | && CONSTANT_P (op)) | |
3428 | return convert_memory_address (Pmode, op); | |
7afe21cc | 3429 | break; |
cceb347c | 3430 | #endif |
7afe21cc RK |
3431 | } |
3432 | ||
3433 | return 0; | |
3434 | } | |
7afe21cc RK |
3435 | } |
3436 | \f | |
3437 | /* Simplify a binary operation CODE with result mode MODE, operating on OP0 | |
3438 | and OP1. Return 0 if no simplification is possible. | |
3439 | ||
3440 | Don't use this for relational operations such as EQ or LT. | |
3441 | Use simplify_relational_operation instead. */ | |
3442 | ||
3443 | rtx | |
3444 | simplify_binary_operation (code, mode, op0, op1) | |
3445 | enum rtx_code code; | |
3446 | enum machine_mode mode; | |
3447 | rtx op0, op1; | |
3448 | { | |
906c4e36 RK |
3449 | register HOST_WIDE_INT arg0, arg1, arg0s, arg1s; |
3450 | HOST_WIDE_INT val; | |
7afe21cc | 3451 | int width = GET_MODE_BITSIZE (mode); |
96b0e481 | 3452 | rtx tem; |
7afe21cc RK |
3453 | |
3454 | /* Relational operations don't work here. We must know the mode | |
3455 | of the operands in order to do the comparison correctly. | |
3456 | Assuming a full word can give incorrect results. | |
3457 | Consider comparing 128 with -128 in QImode. */ | |
3458 | ||
3459 | if (GET_RTX_CLASS (code) == '<') | |
3460 | abort (); | |
3461 | ||
3462 | #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC) | |
3463 | if (GET_MODE_CLASS (mode) == MODE_FLOAT | |
3464 | && GET_CODE (op0) == CONST_DOUBLE && GET_CODE (op1) == CONST_DOUBLE | |
3465 | && mode == GET_MODE (op0) && mode == GET_MODE (op1)) | |
3466 | { | |
3467 | REAL_VALUE_TYPE f0, f1, value; | |
3468 | jmp_buf handler; | |
3469 | ||
3470 | if (setjmp (handler)) | |
3471 | return 0; | |
3472 | ||
3473 | set_float_handler (handler); | |
3474 | ||
3475 | REAL_VALUE_FROM_CONST_DOUBLE (f0, op0); | |
3476 | REAL_VALUE_FROM_CONST_DOUBLE (f1, op1); | |
5352b11a RS |
3477 | f0 = real_value_truncate (mode, f0); |
3478 | f1 = real_value_truncate (mode, f1); | |
7afe21cc RK |
3479 | |
3480 | #ifdef REAL_ARITHMETIC | |
d3159aee | 3481 | REAL_ARITHMETIC (value, rtx_to_tree_code (code), f0, f1); |
7afe21cc RK |
3482 | #else |
3483 | switch (code) | |
3484 | { | |
3485 | case PLUS: | |
3486 | value = f0 + f1; | |
3487 | break; | |
3488 | case MINUS: | |
3489 | value = f0 - f1; | |
3490 | break; | |
3491 | case MULT: | |
3492 | value = f0 * f1; | |
3493 | break; | |
3494 | case DIV: | |
3495 | #ifndef REAL_INFINITY | |
3496 | if (f1 == 0) | |
21d12b80 | 3497 | return 0; |
7afe21cc RK |
3498 | #endif |
3499 | value = f0 / f1; | |
3500 | break; | |
3501 | case SMIN: | |
3502 | value = MIN (f0, f1); | |
3503 | break; | |
3504 | case SMAX: | |
3505 | value = MAX (f0, f1); | |
3506 | break; | |
3507 | default: | |
3508 | abort (); | |
3509 | } | |
3510 | #endif | |
3511 | ||
5352b11a | 3512 | value = real_value_truncate (mode, value); |
831522a4 | 3513 | set_float_handler (NULL_PTR); |
560c94a2 | 3514 | return CONST_DOUBLE_FROM_REAL_VALUE (value, mode); |
7afe21cc | 3515 | } |
6076248a | 3516 | #endif /* not REAL_IS_NOT_DOUBLE, or REAL_ARITHMETIC */ |
7afe21cc RK |
3517 | |
3518 | /* We can fold some multi-word operations. */ | |
6076248a | 3519 | if (GET_MODE_CLASS (mode) == MODE_INT |
33085906 | 3520 | && width == HOST_BITS_PER_WIDE_INT * 2 |
fe873240 | 3521 | && (GET_CODE (op0) == CONST_DOUBLE || GET_CODE (op0) == CONST_INT) |
6076248a | 3522 | && (GET_CODE (op1) == CONST_DOUBLE || GET_CODE (op1) == CONST_INT)) |
7afe21cc | 3523 | { |
906c4e36 | 3524 | HOST_WIDE_INT l1, l2, h1, h2, lv, hv; |
7afe21cc | 3525 | |
fe873240 RK |
3526 | if (GET_CODE (op0) == CONST_DOUBLE) |
3527 | l1 = CONST_DOUBLE_LOW (op0), h1 = CONST_DOUBLE_HIGH (op0); | |
3528 | else | |
3529 | l1 = INTVAL (op0), h1 = l1 < 0 ? -1 : 0; | |
7afe21cc RK |
3530 | |
3531 | if (GET_CODE (op1) == CONST_DOUBLE) | |
3532 | l2 = CONST_DOUBLE_LOW (op1), h2 = CONST_DOUBLE_HIGH (op1); | |
3533 | else | |
3534 | l2 = INTVAL (op1), h2 = l2 < 0 ? -1 : 0; | |
3535 | ||
3536 | switch (code) | |
3537 | { | |
3538 | case MINUS: | |
3539 | /* A - B == A + (-B). */ | |
3540 | neg_double (l2, h2, &lv, &hv); | |
3541 | l2 = lv, h2 = hv; | |
3542 | ||
0f41302f | 3543 | /* .. fall through ... */ |
7afe21cc RK |
3544 | |
3545 | case PLUS: | |
3546 | add_double (l1, h1, l2, h2, &lv, &hv); | |
3547 | break; | |
3548 | ||
3549 | case MULT: | |
3550 | mul_double (l1, h1, l2, h2, &lv, &hv); | |
3551 | break; | |
3552 | ||
3553 | case DIV: case MOD: case UDIV: case UMOD: | |
3554 | /* We'd need to include tree.h to do this and it doesn't seem worth | |
3555 | it. */ | |
3556 | return 0; | |
3557 | ||
3558 | case AND: | |
3559 | lv = l1 & l2, hv = h1 & h2; | |
3560 | break; | |
3561 | ||
3562 | case IOR: | |
3563 | lv = l1 | l2, hv = h1 | h2; | |
3564 | break; | |
3565 | ||
3566 | case XOR: | |
3567 | lv = l1 ^ l2, hv = h1 ^ h2; | |
3568 | break; | |
3569 | ||
3570 | case SMIN: | |
906c4e36 RK |
3571 | if (h1 < h2 |
3572 | || (h1 == h2 | |
3573 | && ((unsigned HOST_WIDE_INT) l1 | |
3574 | < (unsigned HOST_WIDE_INT) l2))) | |
7afe21cc RK |
3575 | lv = l1, hv = h1; |
3576 | else | |
3577 | lv = l2, hv = h2; | |
3578 | break; | |
3579 | ||
3580 | case SMAX: | |
906c4e36 RK |
3581 | if (h1 > h2 |
3582 | || (h1 == h2 | |
3583 | && ((unsigned HOST_WIDE_INT) l1 | |
3584 | > (unsigned HOST_WIDE_INT) l2))) | |
7afe21cc RK |
3585 | lv = l1, hv = h1; |
3586 | else | |
3587 | lv = l2, hv = h2; | |
3588 | break; | |
3589 | ||
3590 | case UMIN: | |
906c4e36 RK |
3591 | if ((unsigned HOST_WIDE_INT) h1 < (unsigned HOST_WIDE_INT) h2 |
3592 | || (h1 == h2 | |
3593 | && ((unsigned HOST_WIDE_INT) l1 | |
3594 | < (unsigned HOST_WIDE_INT) l2))) | |
7afe21cc RK |
3595 | lv = l1, hv = h1; |
3596 | else | |
3597 | lv = l2, hv = h2; | |
3598 | break; | |
3599 | ||
3600 | case UMAX: | |
906c4e36 RK |
3601 | if ((unsigned HOST_WIDE_INT) h1 > (unsigned HOST_WIDE_INT) h2 |
3602 | || (h1 == h2 | |
3603 | && ((unsigned HOST_WIDE_INT) l1 | |
3604 | > (unsigned HOST_WIDE_INT) l2))) | |
7afe21cc RK |
3605 | lv = l1, hv = h1; |
3606 | else | |
3607 | lv = l2, hv = h2; | |
3608 | break; | |
3609 | ||
3610 | case LSHIFTRT: case ASHIFTRT: | |
45620ed4 | 3611 | case ASHIFT: |
7afe21cc RK |
3612 | case ROTATE: case ROTATERT: |
3613 | #ifdef SHIFT_COUNT_TRUNCATED | |
85c0a556 RK |
3614 | if (SHIFT_COUNT_TRUNCATED) |
3615 | l2 &= (GET_MODE_BITSIZE (mode) - 1), h2 = 0; | |
7afe21cc RK |
3616 | #endif |
3617 | ||
3618 | if (h2 != 0 || l2 < 0 || l2 >= GET_MODE_BITSIZE (mode)) | |
3619 | return 0; | |
3620 | ||
3621 | if (code == LSHIFTRT || code == ASHIFTRT) | |
3622 | rshift_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv, | |
3623 | code == ASHIFTRT); | |
45620ed4 RK |
3624 | else if (code == ASHIFT) |
3625 | lshift_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv, 1); | |
7afe21cc RK |
3626 | else if (code == ROTATE) |
3627 | lrotate_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv); | |
3628 | else /* code == ROTATERT */ | |
3629 | rrotate_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv); | |
3630 | break; | |
3631 | ||
3632 | default: | |
3633 | return 0; | |
3634 | } | |
3635 | ||
3636 | return immed_double_const (lv, hv, mode); | |
3637 | } | |
7afe21cc RK |
3638 | |
3639 | if (GET_CODE (op0) != CONST_INT || GET_CODE (op1) != CONST_INT | |
906c4e36 | 3640 | || width > HOST_BITS_PER_WIDE_INT || width == 0) |
7afe21cc RK |
3641 | { |
3642 | /* Even if we can't compute a constant result, | |
3643 | there are some cases worth simplifying. */ | |
3644 | ||
3645 | switch (code) | |
3646 | { | |
3647 | case PLUS: | |
3648 | /* In IEEE floating point, x+0 is not the same as x. Similarly | |
3649 | for the other optimizations below. */ | |
3650 | if (TARGET_FLOAT_FORMAT == IEEE_FLOAT_FORMAT | |
a83afb65 | 3651 | && FLOAT_MODE_P (mode) && ! flag_fast_math) |
7afe21cc RK |
3652 | break; |
3653 | ||
3654 | if (op1 == CONST0_RTX (mode)) | |
3655 | return op0; | |
3656 | ||
7afe21cc RK |
3657 | /* ((-a) + b) -> (b - a) and similarly for (a + (-b)) */ |
3658 | if (GET_CODE (op0) == NEG) | |
96b0e481 | 3659 | return cse_gen_binary (MINUS, mode, op1, XEXP (op0, 0)); |
7afe21cc | 3660 | else if (GET_CODE (op1) == NEG) |
96b0e481 | 3661 | return cse_gen_binary (MINUS, mode, op0, XEXP (op1, 0)); |
7afe21cc | 3662 | |
96b0e481 RK |
3663 | /* Handle both-operands-constant cases. We can only add |
3664 | CONST_INTs to constants since the sum of relocatable symbols | |
fe873240 RK |
3665 | can't be handled by most assemblers. Don't add CONST_INT |
3666 | to CONST_INT since overflow won't be computed properly if wider | |
3667 | than HOST_BITS_PER_WIDE_INT. */ | |
7afe21cc | 3668 | |
fe873240 RK |
3669 | if (CONSTANT_P (op0) && GET_MODE (op0) != VOIDmode |
3670 | && GET_CODE (op1) == CONST_INT) | |
96b0e481 | 3671 | return plus_constant (op0, INTVAL (op1)); |
fe873240 RK |
3672 | else if (CONSTANT_P (op1) && GET_MODE (op1) != VOIDmode |
3673 | && GET_CODE (op0) == CONST_INT) | |
96b0e481 | 3674 | return plus_constant (op1, INTVAL (op0)); |
7afe21cc | 3675 | |
30d69925 RK |
3676 | /* See if this is something like X * C - X or vice versa or |
3677 | if the multiplication is written as a shift. If so, we can | |
3678 | distribute and make a new multiply, shift, or maybe just | |
3679 | have X (if C is 2 in the example above). But don't make | |
3680 | real multiply if we didn't have one before. */ | |
3681 | ||
3682 | if (! FLOAT_MODE_P (mode)) | |
3683 | { | |
3684 | HOST_WIDE_INT coeff0 = 1, coeff1 = 1; | |
3685 | rtx lhs = op0, rhs = op1; | |
3686 | int had_mult = 0; | |
3687 | ||
3688 | if (GET_CODE (lhs) == NEG) | |
3689 | coeff0 = -1, lhs = XEXP (lhs, 0); | |
3690 | else if (GET_CODE (lhs) == MULT | |
3691 | && GET_CODE (XEXP (lhs, 1)) == CONST_INT) | |
3692 | { | |
3693 | coeff0 = INTVAL (XEXP (lhs, 1)), lhs = XEXP (lhs, 0); | |
3694 | had_mult = 1; | |
3695 | } | |
3696 | else if (GET_CODE (lhs) == ASHIFT | |
3697 | && GET_CODE (XEXP (lhs, 1)) == CONST_INT | |
3698 | && INTVAL (XEXP (lhs, 1)) >= 0 | |
3699 | && INTVAL (XEXP (lhs, 1)) < HOST_BITS_PER_WIDE_INT) | |
3700 | { | |
3701 | coeff0 = ((HOST_WIDE_INT) 1) << INTVAL (XEXP (lhs, 1)); | |
3702 | lhs = XEXP (lhs, 0); | |
3703 | } | |
3704 | ||
3705 | if (GET_CODE (rhs) == NEG) | |
3706 | coeff1 = -1, rhs = XEXP (rhs, 0); | |
3707 | else if (GET_CODE (rhs) == MULT | |
3708 | && GET_CODE (XEXP (rhs, 1)) == CONST_INT) | |
3709 | { | |
3710 | coeff1 = INTVAL (XEXP (rhs, 1)), rhs = XEXP (rhs, 0); | |
3711 | had_mult = 1; | |
3712 | } | |
3713 | else if (GET_CODE (rhs) == ASHIFT | |
3714 | && GET_CODE (XEXP (rhs, 1)) == CONST_INT | |
3715 | && INTVAL (XEXP (rhs, 1)) >= 0 | |
3716 | && INTVAL (XEXP (rhs, 1)) < HOST_BITS_PER_WIDE_INT) | |
3717 | { | |
3718 | coeff1 = ((HOST_WIDE_INT) 1) << INTVAL (XEXP (rhs, 1)); | |
3719 | rhs = XEXP (rhs, 0); | |
3720 | } | |
3721 | ||
3722 | if (rtx_equal_p (lhs, rhs)) | |
3723 | { | |
3724 | tem = cse_gen_binary (MULT, mode, lhs, | |
3725 | GEN_INT (coeff0 + coeff1)); | |
3726 | return (GET_CODE (tem) == MULT && ! had_mult) ? 0 : tem; | |
3727 | } | |
3728 | } | |
3729 | ||
96b0e481 RK |
3730 | /* If one of the operands is a PLUS or a MINUS, see if we can |
3731 | simplify this by the associative law. | |
3732 | Don't use the associative law for floating point. | |
3733 | The inaccuracy makes it nonassociative, | |
3734 | and subtle programs can break if operations are associated. */ | |
7afe21cc | 3735 | |
cbf6a543 | 3736 | if (INTEGRAL_MODE_P (mode) |
96b0e481 RK |
3737 | && (GET_CODE (op0) == PLUS || GET_CODE (op0) == MINUS |
3738 | || GET_CODE (op1) == PLUS || GET_CODE (op1) == MINUS) | |
3739 | && (tem = simplify_plus_minus (code, mode, op0, op1)) != 0) | |
3740 | return tem; | |
7afe21cc RK |
3741 | break; |
3742 | ||
3743 | case COMPARE: | |
3744 | #ifdef HAVE_cc0 | |
3745 | /* Convert (compare FOO (const_int 0)) to FOO unless we aren't | |
3746 | using cc0, in which case we want to leave it as a COMPARE | |
3747 | so we can distinguish it from a register-register-copy. | |
3748 | ||
3749 | In IEEE floating point, x-0 is not the same as x. */ | |
3750 | ||
3751 | if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT | |
a83afb65 | 3752 | || ! FLOAT_MODE_P (mode) || flag_fast_math) |
7afe21cc RK |
3753 | && op1 == CONST0_RTX (mode)) |
3754 | return op0; | |
3755 | #else | |
3756 | /* Do nothing here. */ | |
3757 | #endif | |
3758 | break; | |
3759 | ||
3760 | case MINUS: | |
21648b45 RK |
3761 | /* None of these optimizations can be done for IEEE |
3762 | floating point. */ | |
3763 | if (TARGET_FLOAT_FORMAT == IEEE_FLOAT_FORMAT | |
a83afb65 | 3764 | && FLOAT_MODE_P (mode) && ! flag_fast_math) |
21648b45 RK |
3765 | break; |
3766 | ||
a83afb65 RK |
3767 | /* We can't assume x-x is 0 even with non-IEEE floating point, |
3768 | but since it is zero except in very strange circumstances, we | |
3769 | will treat it as zero with -ffast-math. */ | |
7afe21cc RK |
3770 | if (rtx_equal_p (op0, op1) |
3771 | && ! side_effects_p (op0) | |
a83afb65 RK |
3772 | && (! FLOAT_MODE_P (mode) || flag_fast_math)) |
3773 | return CONST0_RTX (mode); | |
7afe21cc RK |
3774 | |
3775 | /* Change subtraction from zero into negation. */ | |
3776 | if (op0 == CONST0_RTX (mode)) | |
3777 | return gen_rtx (NEG, mode, op1); | |
3778 | ||
96b0e481 RK |
3779 | /* (-1 - a) is ~a. */ |
3780 | if (op0 == constm1_rtx) | |
3781 | return gen_rtx (NOT, mode, op1); | |
3782 | ||
7afe21cc RK |
3783 | /* Subtracting 0 has no effect. */ |
3784 | if (op1 == CONST0_RTX (mode)) | |
3785 | return op0; | |
3786 | ||
30d69925 RK |
3787 | /* See if this is something like X * C - X or vice versa or |
3788 | if the multiplication is written as a shift. If so, we can | |
3789 | distribute and make a new multiply, shift, or maybe just | |
3790 | have X (if C is 2 in the example above). But don't make | |
3791 | real multiply if we didn't have one before. */ | |
3792 | ||
3793 | if (! FLOAT_MODE_P (mode)) | |
3794 | { | |
3795 | HOST_WIDE_INT coeff0 = 1, coeff1 = 1; | |
3796 | rtx lhs = op0, rhs = op1; | |
3797 | int had_mult = 0; | |
3798 | ||
3799 | if (GET_CODE (lhs) == NEG) | |
3800 | coeff0 = -1, lhs = XEXP (lhs, 0); | |
3801 | else if (GET_CODE (lhs) == MULT | |
3802 | && GET_CODE (XEXP (lhs, 1)) == CONST_INT) | |
3803 | { | |
3804 | coeff0 = INTVAL (XEXP (lhs, 1)), lhs = XEXP (lhs, 0); | |
3805 | had_mult = 1; | |
3806 | } | |
3807 | else if (GET_CODE (lhs) == ASHIFT | |
3808 | && GET_CODE (XEXP (lhs, 1)) == CONST_INT | |
3809 | && INTVAL (XEXP (lhs, 1)) >= 0 | |
3810 | && INTVAL (XEXP (lhs, 1)) < HOST_BITS_PER_WIDE_INT) | |
3811 | { | |
3812 | coeff0 = ((HOST_WIDE_INT) 1) << INTVAL (XEXP (lhs, 1)); | |
3813 | lhs = XEXP (lhs, 0); | |
3814 | } | |
3815 | ||
3816 | if (GET_CODE (rhs) == NEG) | |
3817 | coeff1 = - 1, rhs = XEXP (rhs, 0); | |
3818 | else if (GET_CODE (rhs) == MULT | |
3819 | && GET_CODE (XEXP (rhs, 1)) == CONST_INT) | |
3820 | { | |
3821 | coeff1 = INTVAL (XEXP (rhs, 1)), rhs = XEXP (rhs, 0); | |
3822 | had_mult = 1; | |
3823 | } | |
3824 | else if (GET_CODE (rhs) == ASHIFT | |
3825 | && GET_CODE (XEXP (rhs, 1)) == CONST_INT | |
3826 | && INTVAL (XEXP (rhs, 1)) >= 0 | |
3827 | && INTVAL (XEXP (rhs, 1)) < HOST_BITS_PER_WIDE_INT) | |
3828 | { | |
3829 | coeff1 = ((HOST_WIDE_INT) 1) << INTVAL (XEXP (rhs, 1)); | |
3830 | rhs = XEXP (rhs, 0); | |
3831 | } | |
3832 | ||
3833 | if (rtx_equal_p (lhs, rhs)) | |
3834 | { | |
3835 | tem = cse_gen_binary (MULT, mode, lhs, | |
3836 | GEN_INT (coeff0 - coeff1)); | |
3837 | return (GET_CODE (tem) == MULT && ! had_mult) ? 0 : tem; | |
3838 | } | |
3839 | } | |
3840 | ||
7afe21cc RK |
3841 | /* (a - (-b)) -> (a + b). */ |
3842 | if (GET_CODE (op1) == NEG) | |
96b0e481 | 3843 | return cse_gen_binary (PLUS, mode, op0, XEXP (op1, 0)); |
7afe21cc | 3844 | |
96b0e481 RK |
3845 | /* If one of the operands is a PLUS or a MINUS, see if we can |
3846 | simplify this by the associative law. | |
3847 | Don't use the associative law for floating point. | |
7afe21cc RK |
3848 | The inaccuracy makes it nonassociative, |
3849 | and subtle programs can break if operations are associated. */ | |
7afe21cc | 3850 | |
cbf6a543 | 3851 | if (INTEGRAL_MODE_P (mode) |
96b0e481 RK |
3852 | && (GET_CODE (op0) == PLUS || GET_CODE (op0) == MINUS |
3853 | || GET_CODE (op1) == PLUS || GET_CODE (op1) == MINUS) | |
3854 | && (tem = simplify_plus_minus (code, mode, op0, op1)) != 0) | |
3855 | return tem; | |
7afe21cc RK |
3856 | |
3857 | /* Don't let a relocatable value get a negative coeff. */ | |
b5a09c41 | 3858 | if (GET_CODE (op1) == CONST_INT && GET_MODE (op0) != VOIDmode) |
7afe21cc | 3859 | return plus_constant (op0, - INTVAL (op1)); |
29d72c4b TG |
3860 | |
3861 | /* (x - (x & y)) -> (x & ~y) */ | |
3862 | if (GET_CODE (op1) == AND) | |
3863 | { | |
3864 | if (rtx_equal_p (op0, XEXP (op1, 0))) | |
3865 | return cse_gen_binary (AND, mode, op0, gen_rtx (NOT, mode, XEXP (op1, 1))); | |
3866 | if (rtx_equal_p (op0, XEXP (op1, 1))) | |
3867 | return cse_gen_binary (AND, mode, op0, gen_rtx (NOT, mode, XEXP (op1, 0))); | |
3868 | } | |
7afe21cc RK |
3869 | break; |
3870 | ||
3871 | case MULT: | |
3872 | if (op1 == constm1_rtx) | |
3873 | { | |
96b0e481 | 3874 | tem = simplify_unary_operation (NEG, mode, op0, mode); |
7afe21cc RK |
3875 | |
3876 | return tem ? tem : gen_rtx (NEG, mode, op0); | |
3877 | } | |
3878 | ||
3879 | /* In IEEE floating point, x*0 is not always 0. */ | |
3880 | if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT | |
a83afb65 | 3881 | || ! FLOAT_MODE_P (mode) || flag_fast_math) |
7afe21cc RK |
3882 | && op1 == CONST0_RTX (mode) |
3883 | && ! side_effects_p (op0)) | |
3884 | return op1; | |
3885 | ||
3886 | /* In IEEE floating point, x*1 is not equivalent to x for nans. | |
3887 | However, ANSI says we can drop signals, | |
3888 | so we can do this anyway. */ | |
3889 | if (op1 == CONST1_RTX (mode)) | |
3890 | return op0; | |
3891 | ||
c407b802 RK |
3892 | /* Convert multiply by constant power of two into shift unless |
3893 | we are still generating RTL. This test is a kludge. */ | |
7afe21cc | 3894 | if (GET_CODE (op1) == CONST_INT |
c407b802 | 3895 | && (val = exact_log2 (INTVAL (op1))) >= 0 |
2d917903 JW |
3896 | /* If the mode is larger than the host word size, and the |
3897 | uppermost bit is set, then this isn't a power of two due | |
3898 | to implicit sign extension. */ | |
3899 | && (width <= HOST_BITS_PER_WIDE_INT | |
3900 | || val != HOST_BITS_PER_WIDE_INT - 1) | |
c407b802 | 3901 | && ! rtx_equal_function_value_matters) |
906c4e36 | 3902 | return gen_rtx (ASHIFT, mode, op0, GEN_INT (val)); |
7afe21cc RK |
3903 | |
3904 | if (GET_CODE (op1) == CONST_DOUBLE | |
3905 | && GET_MODE_CLASS (GET_MODE (op1)) == MODE_FLOAT) | |
3906 | { | |
3907 | REAL_VALUE_TYPE d; | |
5a3d4bef RK |
3908 | jmp_buf handler; |
3909 | int op1is2, op1ism1; | |
3910 | ||
3911 | if (setjmp (handler)) | |
3912 | return 0; | |
3913 | ||
3914 | set_float_handler (handler); | |
7afe21cc | 3915 | REAL_VALUE_FROM_CONST_DOUBLE (d, op1); |
5a3d4bef RK |
3916 | op1is2 = REAL_VALUES_EQUAL (d, dconst2); |
3917 | op1ism1 = REAL_VALUES_EQUAL (d, dconstm1); | |
3918 | set_float_handler (NULL_PTR); | |
7afe21cc RK |
3919 | |
3920 | /* x*2 is x+x and x*(-1) is -x */ | |
5a3d4bef | 3921 | if (op1is2 && GET_MODE (op0) == mode) |
7afe21cc RK |
3922 | return gen_rtx (PLUS, mode, op0, copy_rtx (op0)); |
3923 | ||
5a3d4bef | 3924 | else if (op1ism1 && GET_MODE (op0) == mode) |
7afe21cc RK |
3925 | return gen_rtx (NEG, mode, op0); |
3926 | } | |
3927 | break; | |
3928 | ||
3929 | case IOR: | |
3930 | if (op1 == const0_rtx) | |
3931 | return op0; | |
3932 | if (GET_CODE (op1) == CONST_INT | |
3933 | && (INTVAL (op1) & GET_MODE_MASK (mode)) == GET_MODE_MASK (mode)) | |
3934 | return op1; | |
3935 | if (rtx_equal_p (op0, op1) && ! side_effects_p (op0)) | |
3936 | return op0; | |
3937 | /* A | (~A) -> -1 */ | |
3938 | if (((GET_CODE (op0) == NOT && rtx_equal_p (XEXP (op0, 0), op1)) | |
3939 | || (GET_CODE (op1) == NOT && rtx_equal_p (XEXP (op1, 0), op0))) | |
31dcf83f | 3940 | && ! side_effects_p (op0) |
8e7e5365 | 3941 | && GET_MODE_CLASS (mode) != MODE_CC) |
7afe21cc RK |
3942 | return constm1_rtx; |
3943 | break; | |
3944 | ||
3945 | case XOR: | |
3946 | if (op1 == const0_rtx) | |
3947 | return op0; | |
3948 | if (GET_CODE (op1) == CONST_INT | |
3949 | && (INTVAL (op1) & GET_MODE_MASK (mode)) == GET_MODE_MASK (mode)) | |
3950 | return gen_rtx (NOT, mode, op0); | |
31dcf83f | 3951 | if (op0 == op1 && ! side_effects_p (op0) |
8e7e5365 | 3952 | && GET_MODE_CLASS (mode) != MODE_CC) |
7afe21cc RK |
3953 | return const0_rtx; |
3954 | break; | |
3955 | ||
3956 | case AND: | |
3957 | if (op1 == const0_rtx && ! side_effects_p (op0)) | |
3958 | return const0_rtx; | |
3959 | if (GET_CODE (op1) == CONST_INT | |
3960 | && (INTVAL (op1) & GET_MODE_MASK (mode)) == GET_MODE_MASK (mode)) | |
3961 | return op0; | |
31dcf83f | 3962 | if (op0 == op1 && ! side_effects_p (op0) |
8e7e5365 | 3963 | && GET_MODE_CLASS (mode) != MODE_CC) |
7afe21cc RK |
3964 | return op0; |
3965 | /* A & (~A) -> 0 */ | |
3966 | if (((GET_CODE (op0) == NOT && rtx_equal_p (XEXP (op0, 0), op1)) | |
3967 | || (GET_CODE (op1) == NOT && rtx_equal_p (XEXP (op1, 0), op0))) | |
709ab4fc | 3968 | && ! side_effects_p (op0) |
8e7e5365 | 3969 | && GET_MODE_CLASS (mode) != MODE_CC) |
7afe21cc RK |
3970 | return const0_rtx; |
3971 | break; | |
3972 | ||
3973 | case UDIV: | |
3974 | /* Convert divide by power of two into shift (divide by 1 handled | |
3975 | below). */ | |
3976 | if (GET_CODE (op1) == CONST_INT | |
3977 | && (arg1 = exact_log2 (INTVAL (op1))) > 0) | |
906c4e36 | 3978 | return gen_rtx (LSHIFTRT, mode, op0, GEN_INT (arg1)); |
7afe21cc | 3979 | |
0f41302f | 3980 | /* ... fall through ... */ |
7afe21cc RK |
3981 | |
3982 | case DIV: | |
3983 | if (op1 == CONST1_RTX (mode)) | |
3984 | return op0; | |
e7a522ba RS |
3985 | |
3986 | /* In IEEE floating point, 0/x is not always 0. */ | |
3987 | if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT | |
a83afb65 | 3988 | || ! FLOAT_MODE_P (mode) || flag_fast_math) |
e7a522ba RS |
3989 | && op0 == CONST0_RTX (mode) |
3990 | && ! side_effects_p (op1)) | |
7afe21cc | 3991 | return op0; |
e7a522ba | 3992 | |
7afe21cc | 3993 | #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC) |
a83afb65 RK |
3994 | /* Change division by a constant into multiplication. Only do |
3995 | this with -ffast-math until an expert says it is safe in | |
3996 | general. */ | |
7afe21cc RK |
3997 | else if (GET_CODE (op1) == CONST_DOUBLE |
3998 | && GET_MODE_CLASS (GET_MODE (op1)) == MODE_FLOAT | |
a83afb65 RK |
3999 | && op1 != CONST0_RTX (mode) |
4000 | && flag_fast_math) | |
7afe21cc RK |
4001 | { |
4002 | REAL_VALUE_TYPE d; | |
4003 | REAL_VALUE_FROM_CONST_DOUBLE (d, op1); | |
a83afb65 RK |
4004 | |
4005 | if (! REAL_VALUES_EQUAL (d, dconst0)) | |
4006 | { | |
7afe21cc | 4007 | #if defined (REAL_ARITHMETIC) |
a83afb65 RK |
4008 | REAL_ARITHMETIC (d, rtx_to_tree_code (DIV), dconst1, d); |
4009 | return gen_rtx (MULT, mode, op0, | |
4010 | CONST_DOUBLE_FROM_REAL_VALUE (d, mode)); | |
7afe21cc | 4011 | #else |
a83afb65 RK |
4012 | return gen_rtx (MULT, mode, op0, |
4013 | CONST_DOUBLE_FROM_REAL_VALUE (1./d, mode)); | |
7afe21cc | 4014 | #endif |
a83afb65 RK |
4015 | } |
4016 | } | |
7afe21cc RK |
4017 | #endif |
4018 | break; | |
4019 | ||
4020 | case UMOD: | |
4021 | /* Handle modulus by power of two (mod with 1 handled below). */ | |
4022 | if (GET_CODE (op1) == CONST_INT | |
4023 | && exact_log2 (INTVAL (op1)) > 0) | |
906c4e36 | 4024 | return gen_rtx (AND, mode, op0, GEN_INT (INTVAL (op1) - 1)); |
7afe21cc | 4025 | |
0f41302f | 4026 | /* ... fall through ... */ |
7afe21cc RK |
4027 | |
4028 | case MOD: | |
4029 | if ((op0 == const0_rtx || op1 == const1_rtx) | |
4030 | && ! side_effects_p (op0) && ! side_effects_p (op1)) | |
4031 | return const0_rtx; | |
4032 | break; | |
4033 | ||
4034 | case ROTATERT: | |
4035 | case ROTATE: | |
4036 | /* Rotating ~0 always results in ~0. */ | |
906c4e36 | 4037 | if (GET_CODE (op0) == CONST_INT && width <= HOST_BITS_PER_WIDE_INT |
7afe21cc RK |
4038 | && INTVAL (op0) == GET_MODE_MASK (mode) |
4039 | && ! side_effects_p (op1)) | |
4040 | return op0; | |
4041 | ||
0f41302f | 4042 | /* ... fall through ... */ |
7afe21cc | 4043 | |
7afe21cc RK |
4044 | case ASHIFT: |
4045 | case ASHIFTRT: | |
4046 | case LSHIFTRT: | |
4047 | if (op1 == const0_rtx) | |
4048 | return op0; | |
4049 | if (op0 == const0_rtx && ! side_effects_p (op1)) | |
4050 | return op0; | |
4051 | break; | |
4052 | ||
4053 | case SMIN: | |
906c4e36 RK |
4054 | if (width <= HOST_BITS_PER_WIDE_INT && GET_CODE (op1) == CONST_INT |
4055 | && INTVAL (op1) == (HOST_WIDE_INT) 1 << (width -1) | |
7afe21cc RK |
4056 | && ! side_effects_p (op0)) |
4057 | return op1; | |
4058 | else if (rtx_equal_p (op0, op1) && ! side_effects_p (op0)) | |
4059 | return op0; | |
4060 | break; | |
4061 | ||
4062 | case SMAX: | |
906c4e36 | 4063 | if (width <= HOST_BITS_PER_WIDE_INT && GET_CODE (op1) == CONST_INT |
dbbe6445 RK |
4064 | && (INTVAL (op1) |
4065 | == (unsigned HOST_WIDE_INT) GET_MODE_MASK (mode) >> 1) | |
7afe21cc RK |
4066 | && ! side_effects_p (op0)) |
4067 | return op1; | |
4068 | else if (rtx_equal_p (op0, op1) && ! side_effects_p (op0)) | |
4069 | return op0; | |
4070 | break; | |
4071 | ||
4072 | case UMIN: | |
4073 | if (op1 == const0_rtx && ! side_effects_p (op0)) | |
4074 | return op1; | |
4075 | else if (rtx_equal_p (op0, op1) && ! side_effects_p (op0)) | |
4076 | return op0; | |
4077 | break; | |
4078 | ||
4079 | case UMAX: | |
4080 | if (op1 == constm1_rtx && ! side_effects_p (op0)) | |
4081 | return op1; | |
4082 | else if (rtx_equal_p (op0, op1) && ! side_effects_p (op0)) | |
4083 | return op0; | |
4084 | break; | |
4085 | ||
4086 | default: | |
4087 | abort (); | |
4088 | } | |
4089 | ||
4090 | return 0; | |
4091 | } | |
4092 | ||
4093 | /* Get the integer argument values in two forms: | |
4094 | zero-extended in ARG0, ARG1 and sign-extended in ARG0S, ARG1S. */ | |
4095 | ||
4096 | arg0 = INTVAL (op0); | |
4097 | arg1 = INTVAL (op1); | |
4098 | ||
906c4e36 | 4099 | if (width < HOST_BITS_PER_WIDE_INT) |
7afe21cc | 4100 | { |
906c4e36 RK |
4101 | arg0 &= ((HOST_WIDE_INT) 1 << width) - 1; |
4102 | arg1 &= ((HOST_WIDE_INT) 1 << width) - 1; | |
7afe21cc RK |
4103 | |
4104 | arg0s = arg0; | |
906c4e36 RK |
4105 | if (arg0s & ((HOST_WIDE_INT) 1 << (width - 1))) |
4106 | arg0s |= ((HOST_WIDE_INT) (-1) << width); | |
7afe21cc RK |
4107 | |
4108 | arg1s = arg1; | |
906c4e36 RK |
4109 | if (arg1s & ((HOST_WIDE_INT) 1 << (width - 1))) |
4110 | arg1s |= ((HOST_WIDE_INT) (-1) << width); | |
7afe21cc RK |
4111 | } |
4112 | else | |
4113 | { | |
4114 | arg0s = arg0; | |
4115 | arg1s = arg1; | |
4116 | } | |
4117 | ||
4118 | /* Compute the value of the arithmetic. */ | |
4119 | ||
4120 | switch (code) | |
4121 | { | |
4122 | case PLUS: | |
538b78e7 | 4123 | val = arg0s + arg1s; |
7afe21cc RK |
4124 | break; |
4125 | ||
4126 | case MINUS: | |
538b78e7 | 4127 | val = arg0s - arg1s; |
7afe21cc RK |
4128 | break; |
4129 | ||
4130 | case MULT: | |
4131 | val = arg0s * arg1s; | |
4132 | break; | |
4133 | ||
4134 | case DIV: | |
4135 | if (arg1s == 0) | |
4136 | return 0; | |
4137 | val = arg0s / arg1s; | |
4138 | break; | |
4139 | ||
4140 | case MOD: | |
4141 | if (arg1s == 0) | |
4142 | return 0; | |
4143 | val = arg0s % arg1s; | |
4144 | break; | |
4145 | ||
4146 | case UDIV: | |
4147 | if (arg1 == 0) | |
4148 | return 0; | |
906c4e36 | 4149 | val = (unsigned HOST_WIDE_INT) arg0 / arg1; |
7afe21cc RK |
4150 | break; |
4151 | ||
4152 | case UMOD: | |
4153 | if (arg1 == 0) | |
4154 | return 0; | |
906c4e36 | 4155 | val = (unsigned HOST_WIDE_INT) arg0 % arg1; |
7afe21cc RK |
4156 | break; |
4157 | ||
4158 | case AND: | |
4159 | val = arg0 & arg1; | |
4160 | break; | |
4161 | ||
4162 | case IOR: | |
4163 | val = arg0 | arg1; | |
4164 | break; | |
4165 | ||
4166 | case XOR: | |
4167 | val = arg0 ^ arg1; | |
4168 | break; | |
4169 | ||
4170 | case LSHIFTRT: | |
4171 | /* If shift count is undefined, don't fold it; let the machine do | |
4172 | what it wants. But truncate it if the machine will do that. */ | |
4173 | if (arg1 < 0) | |
4174 | return 0; | |
4175 | ||
4176 | #ifdef SHIFT_COUNT_TRUNCATED | |
85c0a556 | 4177 | if (SHIFT_COUNT_TRUNCATED) |
4d61f8c5 | 4178 | arg1 %= width; |
7afe21cc RK |
4179 | #endif |
4180 | ||
906c4e36 | 4181 | val = ((unsigned HOST_WIDE_INT) arg0) >> arg1; |
7afe21cc RK |
4182 | break; |
4183 | ||
4184 | case ASHIFT: | |
7afe21cc RK |
4185 | if (arg1 < 0) |
4186 | return 0; | |
4187 | ||
4188 | #ifdef SHIFT_COUNT_TRUNCATED | |
85c0a556 | 4189 | if (SHIFT_COUNT_TRUNCATED) |
4d61f8c5 | 4190 | arg1 %= width; |
7afe21cc RK |
4191 | #endif |
4192 | ||
906c4e36 | 4193 | val = ((unsigned HOST_WIDE_INT) arg0) << arg1; |
7afe21cc RK |
4194 | break; |
4195 | ||
4196 | case ASHIFTRT: | |
4197 | if (arg1 < 0) | |
4198 | return 0; | |
4199 | ||
4200 | #ifdef SHIFT_COUNT_TRUNCATED | |
85c0a556 | 4201 | if (SHIFT_COUNT_TRUNCATED) |
4d61f8c5 | 4202 | arg1 %= width; |
7afe21cc RK |
4203 | #endif |
4204 | ||
7afe21cc | 4205 | val = arg0s >> arg1; |
2166571b RS |
4206 | |
4207 | /* Bootstrap compiler may not have sign extended the right shift. | |
4208 | Manually extend the sign to insure bootstrap cc matches gcc. */ | |
4209 | if (arg0s < 0 && arg1 > 0) | |
4210 | val |= ((HOST_WIDE_INT) -1) << (HOST_BITS_PER_WIDE_INT - arg1); | |
4211 | ||
7afe21cc RK |
4212 | break; |
4213 | ||
4214 | case ROTATERT: | |
4215 | if (arg1 < 0) | |
4216 | return 0; | |
4217 | ||
4218 | arg1 %= width; | |
906c4e36 RK |
4219 | val = ((((unsigned HOST_WIDE_INT) arg0) << (width - arg1)) |
4220 | | (((unsigned HOST_WIDE_INT) arg0) >> arg1)); | |
7afe21cc RK |
4221 | break; |
4222 | ||
4223 | case ROTATE: | |
4224 | if (arg1 < 0) | |
4225 | return 0; | |
4226 | ||
4227 | arg1 %= width; | |
906c4e36 RK |
4228 | val = ((((unsigned HOST_WIDE_INT) arg0) << arg1) |
4229 | | (((unsigned HOST_WIDE_INT) arg0) >> (width - arg1))); | |
7afe21cc RK |
4230 | break; |
4231 | ||
4232 | case COMPARE: | |
4233 | /* Do nothing here. */ | |
4234 | return 0; | |
4235 | ||
830a38ee RS |
4236 | case SMIN: |
4237 | val = arg0s <= arg1s ? arg0s : arg1s; | |
4238 | break; | |
4239 | ||
4240 | case UMIN: | |
906c4e36 RK |
4241 | val = ((unsigned HOST_WIDE_INT) arg0 |
4242 | <= (unsigned HOST_WIDE_INT) arg1 ? arg0 : arg1); | |
830a38ee RS |
4243 | break; |
4244 | ||
4245 | case SMAX: | |
4246 | val = arg0s > arg1s ? arg0s : arg1s; | |
4247 | break; | |
4248 | ||
4249 | case UMAX: | |
906c4e36 RK |
4250 | val = ((unsigned HOST_WIDE_INT) arg0 |
4251 | > (unsigned HOST_WIDE_INT) arg1 ? arg0 : arg1); | |
830a38ee RS |
4252 | break; |
4253 | ||
7afe21cc RK |
4254 | default: |
4255 | abort (); | |
4256 | } | |
4257 | ||
4258 | /* Clear the bits that don't belong in our mode, unless they and our sign | |
4259 | bit are all one. So we get either a reasonable negative value or a | |
4260 | reasonable unsigned value for this mode. */ | |
906c4e36 RK |
4261 | if (width < HOST_BITS_PER_WIDE_INT |
4262 | && ((val & ((HOST_WIDE_INT) (-1) << (width - 1))) | |
4263 | != ((HOST_WIDE_INT) (-1) << (width - 1)))) | |
4264 | val &= ((HOST_WIDE_INT) 1 << width) - 1; | |
4265 | ||
ad89d6f6 TG |
4266 | /* If this would be an entire word for the target, but is not for |
4267 | the host, then sign-extend on the host so that the number will look | |
4268 | the same way on the host that it would on the target. | |
4269 | ||
4270 | For example, when building a 64 bit alpha hosted 32 bit sparc | |
4271 | targeted compiler, then we want the 32 bit unsigned value -1 to be | |
4272 | represented as a 64 bit value -1, and not as 0x00000000ffffffff. | |
4273 | The later confuses the sparc backend. */ | |
4274 | ||
4275 | if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT && BITS_PER_WORD == width | |
4276 | && (val & ((HOST_WIDE_INT) 1 << (width - 1)))) | |
4277 | val |= ((HOST_WIDE_INT) (-1) << width); | |
4278 | ||
906c4e36 | 4279 | return GEN_INT (val); |
7afe21cc RK |
4280 | } |
4281 | \f | |
96b0e481 RK |
4282 | /* Simplify a PLUS or MINUS, at least one of whose operands may be another |
4283 | PLUS or MINUS. | |
4284 | ||
4285 | Rather than test for specific case, we do this by a brute-force method | |
4286 | and do all possible simplifications until no more changes occur. Then | |
4287 | we rebuild the operation. */ | |
4288 | ||
4289 | static rtx | |
4290 | simplify_plus_minus (code, mode, op0, op1) | |
4291 | enum rtx_code code; | |
4292 | enum machine_mode mode; | |
4293 | rtx op0, op1; | |
4294 | { | |
4295 | rtx ops[8]; | |
4296 | int negs[8]; | |
4297 | rtx result, tem; | |
fb5c8ce6 | 4298 | int n_ops = 2, input_ops = 2, input_consts = 0, n_consts = 0; |
96b0e481 | 4299 | int first = 1, negate = 0, changed; |
fb5c8ce6 | 4300 | int i, j; |
96b0e481 | 4301 | |
4c9a05bc | 4302 | bzero ((char *) ops, sizeof ops); |
96b0e481 RK |
4303 | |
4304 | /* Set up the two operands and then expand them until nothing has been | |
4305 | changed. If we run out of room in our array, give up; this should | |
4306 | almost never happen. */ | |
4307 | ||
4308 | ops[0] = op0, ops[1] = op1, negs[0] = 0, negs[1] = (code == MINUS); | |
4309 | ||
4310 | changed = 1; | |
4311 | while (changed) | |
4312 | { | |
4313 | changed = 0; | |
4314 | ||
4315 | for (i = 0; i < n_ops; i++) | |
4316 | switch (GET_CODE (ops[i])) | |
4317 | { | |
4318 | case PLUS: | |
4319 | case MINUS: | |
4320 | if (n_ops == 7) | |
4321 | return 0; | |
4322 | ||
4323 | ops[n_ops] = XEXP (ops[i], 1); | |
4324 | negs[n_ops++] = GET_CODE (ops[i]) == MINUS ? !negs[i] : negs[i]; | |
4325 | ops[i] = XEXP (ops[i], 0); | |
b7d9299b | 4326 | input_ops++; |
96b0e481 RK |
4327 | changed = 1; |
4328 | break; | |
4329 | ||
4330 | case NEG: | |
4331 | ops[i] = XEXP (ops[i], 0); | |
4332 | negs[i] = ! negs[i]; | |
4333 | changed = 1; | |
4334 | break; | |
4335 | ||
4336 | case CONST: | |
4337 | ops[i] = XEXP (ops[i], 0); | |
fb5c8ce6 | 4338 | input_consts++; |
96b0e481 RK |
4339 | changed = 1; |
4340 | break; | |
4341 | ||
4342 | case NOT: | |
4343 | /* ~a -> (-a - 1) */ | |
4344 | if (n_ops != 7) | |
4345 | { | |
4346 | ops[n_ops] = constm1_rtx; | |
5931019b | 4347 | negs[n_ops++] = negs[i]; |
96b0e481 RK |
4348 | ops[i] = XEXP (ops[i], 0); |
4349 | negs[i] = ! negs[i]; | |
4350 | changed = 1; | |
4351 | } | |
4352 | break; | |
4353 | ||
4354 | case CONST_INT: | |
4355 | if (negs[i]) | |
4356 | ops[i] = GEN_INT (- INTVAL (ops[i])), negs[i] = 0, changed = 1; | |
4357 | break; | |
4358 | } | |
4359 | } | |
4360 | ||
4361 | /* If we only have two operands, we can't do anything. */ | |
4362 | if (n_ops <= 2) | |
4363 | return 0; | |
4364 | ||
4365 | /* Now simplify each pair of operands until nothing changes. The first | |
4366 | time through just simplify constants against each other. */ | |
4367 | ||
4368 | changed = 1; | |
4369 | while (changed) | |
4370 | { | |
4371 | changed = first; | |
4372 | ||
4373 | for (i = 0; i < n_ops - 1; i++) | |
4374 | for (j = i + 1; j < n_ops; j++) | |
4375 | if (ops[i] != 0 && ops[j] != 0 | |
4376 | && (! first || (CONSTANT_P (ops[i]) && CONSTANT_P (ops[j])))) | |
4377 | { | |
4378 | rtx lhs = ops[i], rhs = ops[j]; | |
4379 | enum rtx_code ncode = PLUS; | |
4380 | ||
4381 | if (negs[i] && ! negs[j]) | |
4382 | lhs = ops[j], rhs = ops[i], ncode = MINUS; | |
4383 | else if (! negs[i] && negs[j]) | |
4384 | ncode = MINUS; | |
4385 | ||
4386 | tem = simplify_binary_operation (ncode, mode, lhs, rhs); | |
b7d9299b | 4387 | if (tem) |
96b0e481 RK |
4388 | { |
4389 | ops[i] = tem, ops[j] = 0; | |
4390 | negs[i] = negs[i] && negs[j]; | |
4391 | if (GET_CODE (tem) == NEG) | |
4392 | ops[i] = XEXP (tem, 0), negs[i] = ! negs[i]; | |
4393 | ||
4394 | if (GET_CODE (ops[i]) == CONST_INT && negs[i]) | |
4395 | ops[i] = GEN_INT (- INTVAL (ops[i])), negs[i] = 0; | |
4396 | changed = 1; | |
4397 | } | |
4398 | } | |
4399 | ||
4400 | first = 0; | |
4401 | } | |
4402 | ||
4403 | /* Pack all the operands to the lower-numbered entries and give up if | |
91a60f37 | 4404 | we didn't reduce the number of operands we had. Make sure we |
fb5c8ce6 RK |
4405 | count a CONST as two operands. If we have the same number of |
4406 | operands, but have made more CONSTs than we had, this is also | |
4407 | an improvement, so accept it. */ | |
91a60f37 | 4408 | |
fb5c8ce6 | 4409 | for (i = 0, j = 0; j < n_ops; j++) |
96b0e481 | 4410 | if (ops[j] != 0) |
91a60f37 RK |
4411 | { |
4412 | ops[i] = ops[j], negs[i++] = negs[j]; | |
4413 | if (GET_CODE (ops[j]) == CONST) | |
fb5c8ce6 | 4414 | n_consts++; |
91a60f37 | 4415 | } |
96b0e481 | 4416 | |
fb5c8ce6 RK |
4417 | if (i + n_consts > input_ops |
4418 | || (i + n_consts == input_ops && n_consts <= input_consts)) | |
96b0e481 RK |
4419 | return 0; |
4420 | ||
4421 | n_ops = i; | |
4422 | ||
4423 | /* If we have a CONST_INT, put it last. */ | |
4424 | for (i = 0; i < n_ops - 1; i++) | |
4425 | if (GET_CODE (ops[i]) == CONST_INT) | |
4426 | { | |
4427 | tem = ops[n_ops - 1], ops[n_ops - 1] = ops[i] , ops[i] = tem; | |
4428 | j = negs[n_ops - 1], negs[n_ops - 1] = negs[i], negs[i] = j; | |
4429 | } | |
4430 | ||
4431 | /* Put a non-negated operand first. If there aren't any, make all | |
4432 | operands positive and negate the whole thing later. */ | |
4433 | for (i = 0; i < n_ops && negs[i]; i++) | |
4434 | ; | |
4435 | ||
4436 | if (i == n_ops) | |
4437 | { | |
4438 | for (i = 0; i < n_ops; i++) | |
4439 | negs[i] = 0; | |
4440 | negate = 1; | |
4441 | } | |
4442 | else if (i != 0) | |
4443 | { | |
4444 | tem = ops[0], ops[0] = ops[i], ops[i] = tem; | |
4445 | j = negs[0], negs[0] = negs[i], negs[i] = j; | |
4446 | } | |
4447 | ||
4448 | /* Now make the result by performing the requested operations. */ | |
4449 | result = ops[0]; | |
4450 | for (i = 1; i < n_ops; i++) | |
4451 | result = cse_gen_binary (negs[i] ? MINUS : PLUS, mode, result, ops[i]); | |
4452 | ||
4453 | return negate ? gen_rtx (NEG, mode, result) : result; | |
4454 | } | |
4455 | \f | |
4456 | /* Make a binary operation by properly ordering the operands and | |
4457 | seeing if the expression folds. */ | |
4458 | ||
4459 | static rtx | |
4460 | cse_gen_binary (code, mode, op0, op1) | |
4461 | enum rtx_code code; | |
4462 | enum machine_mode mode; | |
4463 | rtx op0, op1; | |
4464 | { | |
4465 | rtx tem; | |
4466 | ||
4467 | /* Put complex operands first and constants second if commutative. */ | |
4468 | if (GET_RTX_CLASS (code) == 'c' | |
4469 | && ((CONSTANT_P (op0) && GET_CODE (op1) != CONST_INT) | |
4470 | || (GET_RTX_CLASS (GET_CODE (op0)) == 'o' | |
4471 | && GET_RTX_CLASS (GET_CODE (op1)) != 'o') | |
4472 | || (GET_CODE (op0) == SUBREG | |
4473 | && GET_RTX_CLASS (GET_CODE (SUBREG_REG (op0))) == 'o' | |
4474 | && GET_RTX_CLASS (GET_CODE (op1)) != 'o'))) | |
4475 | tem = op0, op0 = op1, op1 = tem; | |
4476 | ||
4477 | /* If this simplifies, do it. */ | |
4478 | tem = simplify_binary_operation (code, mode, op0, op1); | |
4479 | ||
4480 | if (tem) | |
4481 | return tem; | |
4482 | ||
4483 | /* Handle addition and subtraction of CONST_INT specially. Otherwise, | |
4484 | just form the operation. */ | |
4485 | ||
4486 | if (code == PLUS && GET_CODE (op1) == CONST_INT | |
4487 | && GET_MODE (op0) != VOIDmode) | |
4488 | return plus_constant (op0, INTVAL (op1)); | |
4489 | else if (code == MINUS && GET_CODE (op1) == CONST_INT | |
4490 | && GET_MODE (op0) != VOIDmode) | |
4491 | return plus_constant (op0, - INTVAL (op1)); | |
4492 | else | |
4493 | return gen_rtx (code, mode, op0, op1); | |
4494 | } | |
4495 | \f | |
7afe21cc | 4496 | /* Like simplify_binary_operation except used for relational operators. |
a432f20d RK |
4497 | MODE is the mode of the operands, not that of the result. If MODE |
4498 | is VOIDmode, both operands must also be VOIDmode and we compare the | |
4499 | operands in "infinite precision". | |
4500 | ||
4501 | If no simplification is possible, this function returns zero. Otherwise, | |
4502 | it returns either const_true_rtx or const0_rtx. */ | |
7afe21cc RK |
4503 | |
4504 | rtx | |
4505 | simplify_relational_operation (code, mode, op0, op1) | |
4506 | enum rtx_code code; | |
4507 | enum machine_mode mode; | |
4508 | rtx op0, op1; | |
4509 | { | |
a432f20d RK |
4510 | int equal, op0lt, op0ltu, op1lt, op1ltu; |
4511 | rtx tem; | |
7afe21cc RK |
4512 | |
4513 | /* If op0 is a compare, extract the comparison arguments from it. */ | |
4514 | if (GET_CODE (op0) == COMPARE && op1 == const0_rtx) | |
4515 | op1 = XEXP (op0, 1), op0 = XEXP (op0, 0); | |
4516 | ||
28bad1cb RK |
4517 | /* We can't simplify MODE_CC values since we don't know what the |
4518 | actual comparison is. */ | |
4519 | if (GET_MODE_CLASS (GET_MODE (op0)) == MODE_CC | |
4520 | #ifdef HAVE_cc0 | |
4521 | || op0 == cc0_rtx | |
4522 | #endif | |
4523 | ) | |
31dcf83f RS |
4524 | return 0; |
4525 | ||
a432f20d RK |
4526 | /* For integer comparisons of A and B maybe we can simplify A - B and can |
4527 | then simplify a comparison of that with zero. If A and B are both either | |
4528 | a register or a CONST_INT, this can't help; testing for these cases will | |
4529 | prevent infinite recursion here and speed things up. | |
4530 | ||
c27b5c62 JW |
4531 | If CODE is an unsigned comparison, then we can never do this optimization, |
4532 | because it gives an incorrect result if the subtraction wraps around zero. | |
4533 | ANSI C defines unsigned operations such that they never overflow, and | |
4534 | thus such cases can not be ignored. */ | |
a432f20d RK |
4535 | |
4536 | if (INTEGRAL_MODE_P (mode) && op1 != const0_rtx | |
4537 | && ! ((GET_CODE (op0) == REG || GET_CODE (op0) == CONST_INT) | |
4538 | && (GET_CODE (op1) == REG || GET_CODE (op1) == CONST_INT)) | |
4539 | && 0 != (tem = simplify_binary_operation (MINUS, mode, op0, op1)) | |
c27b5c62 | 4540 | && code != GTU && code != GEU && code != LTU && code != LEU) |
a432f20d RK |
4541 | return simplify_relational_operation (signed_condition (code), |
4542 | mode, tem, const0_rtx); | |
4543 | ||
4544 | /* For non-IEEE floating-point, if the two operands are equal, we know the | |
4545 | result. */ | |
4546 | if (rtx_equal_p (op0, op1) | |
4547 | && (TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT | |
4548 | || ! FLOAT_MODE_P (GET_MODE (op0)) || flag_fast_math)) | |
4549 | equal = 1, op0lt = 0, op0ltu = 0, op1lt = 0, op1ltu = 0; | |
4550 | ||
4551 | /* If the operands are floating-point constants, see if we can fold | |
4552 | the result. */ | |
6076248a | 4553 | #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC) |
a432f20d RK |
4554 | else if (GET_CODE (op0) == CONST_DOUBLE && GET_CODE (op1) == CONST_DOUBLE |
4555 | && GET_MODE_CLASS (GET_MODE (op0)) == MODE_FLOAT) | |
4556 | { | |
4557 | REAL_VALUE_TYPE d0, d1; | |
4558 | jmp_buf handler; | |
4559 | ||
4560 | if (setjmp (handler)) | |
4561 | return 0; | |
7afe21cc | 4562 | |
a432f20d RK |
4563 | set_float_handler (handler); |
4564 | REAL_VALUE_FROM_CONST_DOUBLE (d0, op0); | |
4565 | REAL_VALUE_FROM_CONST_DOUBLE (d1, op1); | |
4566 | equal = REAL_VALUES_EQUAL (d0, d1); | |
4567 | op0lt = op0ltu = REAL_VALUES_LESS (d0, d1); | |
4568 | op1lt = op1ltu = REAL_VALUES_LESS (d1, d0); | |
4569 | set_float_handler (NULL_PTR); | |
4570 | } | |
4571 | #endif /* not REAL_IS_NOT_DOUBLE, or REAL_ARITHMETIC */ | |
7afe21cc | 4572 | |
a432f20d RK |
4573 | /* Otherwise, see if the operands are both integers. */ |
4574 | else if ((GET_MODE_CLASS (mode) == MODE_INT || mode == VOIDmode) | |
4575 | && (GET_CODE (op0) == CONST_DOUBLE || GET_CODE (op0) == CONST_INT) | |
4576 | && (GET_CODE (op1) == CONST_DOUBLE || GET_CODE (op1) == CONST_INT)) | |
4577 | { | |
4578 | int width = GET_MODE_BITSIZE (mode); | |
64812ded RK |
4579 | HOST_WIDE_INT l0s, h0s, l1s, h1s; |
4580 | unsigned HOST_WIDE_INT l0u, h0u, l1u, h1u; | |
7afe21cc | 4581 | |
a432f20d RK |
4582 | /* Get the two words comprising each integer constant. */ |
4583 | if (GET_CODE (op0) == CONST_DOUBLE) | |
4584 | { | |
4585 | l0u = l0s = CONST_DOUBLE_LOW (op0); | |
4586 | h0u = h0s = CONST_DOUBLE_HIGH (op0); | |
7afe21cc | 4587 | } |
a432f20d | 4588 | else |
6076248a | 4589 | { |
a432f20d RK |
4590 | l0u = l0s = INTVAL (op0); |
4591 | h0u = 0, h0s = l0s < 0 ? -1 : 0; | |
4592 | } | |
6076248a | 4593 | |
a432f20d RK |
4594 | if (GET_CODE (op1) == CONST_DOUBLE) |
4595 | { | |
4596 | l1u = l1s = CONST_DOUBLE_LOW (op1); | |
4597 | h1u = h1s = CONST_DOUBLE_HIGH (op1); | |
4598 | } | |
4599 | else | |
4600 | { | |
4601 | l1u = l1s = INTVAL (op1); | |
4602 | h1u = 0, h1s = l1s < 0 ? -1 : 0; | |
4603 | } | |
4604 | ||
4605 | /* If WIDTH is nonzero and smaller than HOST_BITS_PER_WIDE_INT, | |
4606 | we have to sign or zero-extend the values. */ | |
4607 | if (width != 0 && width <= HOST_BITS_PER_WIDE_INT) | |
4608 | h0u = h1u = 0, h0s = l0s < 0 ? -1 : 0, h1s = l1s < 0 ? -1 : 0; | |
6076248a | 4609 | |
a432f20d RK |
4610 | if (width != 0 && width < HOST_BITS_PER_WIDE_INT) |
4611 | { | |
4612 | l0u &= ((HOST_WIDE_INT) 1 << width) - 1; | |
4613 | l1u &= ((HOST_WIDE_INT) 1 << width) - 1; | |
6076248a | 4614 | |
a432f20d RK |
4615 | if (l0s & ((HOST_WIDE_INT) 1 << (width - 1))) |
4616 | l0s |= ((HOST_WIDE_INT) (-1) << width); | |
6076248a | 4617 | |
a432f20d RK |
4618 | if (l1s & ((HOST_WIDE_INT) 1 << (width - 1))) |
4619 | l1s |= ((HOST_WIDE_INT) (-1) << width); | |
6076248a RK |
4620 | } |
4621 | ||
a432f20d RK |
4622 | equal = (h0u == h1u && l0u == l1u); |
4623 | op0lt = (h0s < h1s || (h0s == h1s && l0s < l1s)); | |
4624 | op1lt = (h1s < h0s || (h1s == h0s && l1s < l0s)); | |
4625 | op0ltu = (h0u < h1u || (h0u == h1u && l0u < l1u)); | |
4626 | op1ltu = (h1u < h0u || (h1u == h0u && l1u < l0u)); | |
4627 | } | |
4628 | ||
4629 | /* Otherwise, there are some code-specific tests we can make. */ | |
4630 | else | |
4631 | { | |
7afe21cc RK |
4632 | switch (code) |
4633 | { | |
4634 | case EQ: | |
a432f20d RK |
4635 | /* References to the frame plus a constant or labels cannot |
4636 | be zero, but a SYMBOL_REF can due to #pragma weak. */ | |
4637 | if (((NONZERO_BASE_PLUS_P (op0) && op1 == const0_rtx) | |
4638 | || GET_CODE (op0) == LABEL_REF) | |
1a7c818b | 4639 | #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM |
a432f20d RK |
4640 | /* On some machines, the ap reg can be 0 sometimes. */ |
4641 | && op0 != arg_pointer_rtx | |
7afe21cc | 4642 | #endif |
a432f20d RK |
4643 | ) |
4644 | return const0_rtx; | |
4645 | break; | |
7afe21cc RK |
4646 | |
4647 | case NE: | |
a432f20d RK |
4648 | if (((NONZERO_BASE_PLUS_P (op0) && op1 == const0_rtx) |
4649 | || GET_CODE (op0) == LABEL_REF) | |
1a7c818b | 4650 | #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM |
a432f20d | 4651 | && op0 != arg_pointer_rtx |
7afe21cc | 4652 | #endif |
a432f20d | 4653 | ) |
7afe21cc RK |
4654 | return const_true_rtx; |
4655 | break; | |
4656 | ||
4657 | case GEU: | |
a432f20d RK |
4658 | /* Unsigned values are never negative. */ |
4659 | if (op1 == const0_rtx) | |
7afe21cc RK |
4660 | return const_true_rtx; |
4661 | break; | |
4662 | ||
4663 | case LTU: | |
a432f20d | 4664 | if (op1 == const0_rtx) |
7afe21cc RK |
4665 | return const0_rtx; |
4666 | break; | |
4667 | ||
4668 | case LEU: | |
4669 | /* Unsigned values are never greater than the largest | |
4670 | unsigned value. */ | |
4671 | if (GET_CODE (op1) == CONST_INT | |
4672 | && INTVAL (op1) == GET_MODE_MASK (mode) | |
a432f20d RK |
4673 | && INTEGRAL_MODE_P (mode)) |
4674 | return const_true_rtx; | |
7afe21cc RK |
4675 | break; |
4676 | ||
4677 | case GTU: | |
4678 | if (GET_CODE (op1) == CONST_INT | |
4679 | && INTVAL (op1) == GET_MODE_MASK (mode) | |
cbf6a543 | 4680 | && INTEGRAL_MODE_P (mode)) |
7afe21cc RK |
4681 | return const0_rtx; |
4682 | break; | |
4683 | } | |
4684 | ||
4685 | return 0; | |
4686 | } | |
4687 | ||
a432f20d RK |
4688 | /* If we reach here, EQUAL, OP0LT, OP0LTU, OP1LT, and OP1LTU are set |
4689 | as appropriate. */ | |
7afe21cc RK |
4690 | switch (code) |
4691 | { | |
7afe21cc | 4692 | case EQ: |
a432f20d RK |
4693 | return equal ? const_true_rtx : const0_rtx; |
4694 | case NE: | |
4695 | return ! equal ? const_true_rtx : const0_rtx; | |
7afe21cc | 4696 | case LT: |
a432f20d | 4697 | return op0lt ? const_true_rtx : const0_rtx; |
7afe21cc | 4698 | case GT: |
a432f20d | 4699 | return op1lt ? const_true_rtx : const0_rtx; |
7afe21cc | 4700 | case LTU: |
a432f20d | 4701 | return op0ltu ? const_true_rtx : const0_rtx; |
7afe21cc | 4702 | case GTU: |
a432f20d RK |
4703 | return op1ltu ? const_true_rtx : const0_rtx; |
4704 | case LE: | |
4705 | return equal || op0lt ? const_true_rtx : const0_rtx; | |
4706 | case GE: | |
4707 | return equal || op1lt ? const_true_rtx : const0_rtx; | |
4708 | case LEU: | |
4709 | return equal || op0ltu ? const_true_rtx : const0_rtx; | |
4710 | case GEU: | |
4711 | return equal || op1ltu ? const_true_rtx : const0_rtx; | |
7afe21cc RK |
4712 | } |
4713 | ||
a432f20d | 4714 | abort (); |
7afe21cc RK |
4715 | } |
4716 | \f | |
4717 | /* Simplify CODE, an operation with result mode MODE and three operands, | |
4718 | OP0, OP1, and OP2. OP0_MODE was the mode of OP0 before it became | |
4719 | a constant. Return 0 if no simplifications is possible. */ | |
4720 | ||
4721 | rtx | |
4722 | simplify_ternary_operation (code, mode, op0_mode, op0, op1, op2) | |
4723 | enum rtx_code code; | |
4724 | enum machine_mode mode, op0_mode; | |
4725 | rtx op0, op1, op2; | |
4726 | { | |
4727 | int width = GET_MODE_BITSIZE (mode); | |
4728 | ||
4729 | /* VOIDmode means "infinite" precision. */ | |
4730 | if (width == 0) | |
906c4e36 | 4731 | width = HOST_BITS_PER_WIDE_INT; |
7afe21cc RK |
4732 | |
4733 | switch (code) | |
4734 | { | |
4735 | case SIGN_EXTRACT: | |
4736 | case ZERO_EXTRACT: | |
4737 | if (GET_CODE (op0) == CONST_INT | |
4738 | && GET_CODE (op1) == CONST_INT | |
4739 | && GET_CODE (op2) == CONST_INT | |
4740 | && INTVAL (op1) + INTVAL (op2) <= GET_MODE_BITSIZE (op0_mode) | |
906c4e36 | 4741 | && width <= HOST_BITS_PER_WIDE_INT) |
7afe21cc RK |
4742 | { |
4743 | /* Extracting a bit-field from a constant */ | |
906c4e36 | 4744 | HOST_WIDE_INT val = INTVAL (op0); |
7afe21cc | 4745 | |
f76b9db2 ILT |
4746 | if (BITS_BIG_ENDIAN) |
4747 | val >>= (GET_MODE_BITSIZE (op0_mode) | |
4748 | - INTVAL (op2) - INTVAL (op1)); | |
4749 | else | |
4750 | val >>= INTVAL (op2); | |
4751 | ||
906c4e36 | 4752 | if (HOST_BITS_PER_WIDE_INT != INTVAL (op1)) |
7afe21cc RK |
4753 | { |
4754 | /* First zero-extend. */ | |
906c4e36 | 4755 | val &= ((HOST_WIDE_INT) 1 << INTVAL (op1)) - 1; |
7afe21cc | 4756 | /* If desired, propagate sign bit. */ |
906c4e36 RK |
4757 | if (code == SIGN_EXTRACT |
4758 | && (val & ((HOST_WIDE_INT) 1 << (INTVAL (op1) - 1)))) | |
4759 | val |= ~ (((HOST_WIDE_INT) 1 << INTVAL (op1)) - 1); | |
7afe21cc RK |
4760 | } |
4761 | ||
4762 | /* Clear the bits that don't belong in our mode, | |
4763 | unless they and our sign bit are all one. | |
4764 | So we get either a reasonable negative value or a reasonable | |
4765 | unsigned value for this mode. */ | |
906c4e36 RK |
4766 | if (width < HOST_BITS_PER_WIDE_INT |
4767 | && ((val & ((HOST_WIDE_INT) (-1) << (width - 1))) | |
4768 | != ((HOST_WIDE_INT) (-1) << (width - 1)))) | |
4769 | val &= ((HOST_WIDE_INT) 1 << width) - 1; | |
7afe21cc | 4770 | |
906c4e36 | 4771 | return GEN_INT (val); |
7afe21cc RK |
4772 | } |
4773 | break; | |
4774 | ||
4775 | case IF_THEN_ELSE: | |
4776 | if (GET_CODE (op0) == CONST_INT) | |
4777 | return op0 != const0_rtx ? op1 : op2; | |
4778 | break; | |
4779 | ||
4780 | default: | |
4781 | abort (); | |
4782 | } | |
4783 | ||
4784 | return 0; | |
4785 | } | |
4786 | \f | |
4787 | /* If X is a nontrivial arithmetic operation on an argument | |
4788 | for which a constant value can be determined, return | |
4789 | the result of operating on that value, as a constant. | |
4790 | Otherwise, return X, possibly with one or more operands | |
4791 | modified by recursive calls to this function. | |
4792 | ||
e7bb59fa RK |
4793 | If X is a register whose contents are known, we do NOT |
4794 | return those contents here. equiv_constant is called to | |
4795 | perform that task. | |
7afe21cc RK |
4796 | |
4797 | INSN is the insn that we may be modifying. If it is 0, make a copy | |
4798 | of X before modifying it. */ | |
4799 | ||
4800 | static rtx | |
4801 | fold_rtx (x, insn) | |
4802 | rtx x; | |
4803 | rtx insn; | |
4804 | { | |
4805 | register enum rtx_code code; | |
4806 | register enum machine_mode mode; | |
4807 | register char *fmt; | |
906c4e36 | 4808 | register int i; |
7afe21cc RK |
4809 | rtx new = 0; |
4810 | int copied = 0; | |
4811 | int must_swap = 0; | |
4812 | ||
4813 | /* Folded equivalents of first two operands of X. */ | |
4814 | rtx folded_arg0; | |
4815 | rtx folded_arg1; | |
4816 | ||
4817 | /* Constant equivalents of first three operands of X; | |
4818 | 0 when no such equivalent is known. */ | |
4819 | rtx const_arg0; | |
4820 | rtx const_arg1; | |
4821 | rtx const_arg2; | |
4822 | ||
4823 | /* The mode of the first operand of X. We need this for sign and zero | |
4824 | extends. */ | |
4825 | enum machine_mode mode_arg0; | |
4826 | ||
4827 | if (x == 0) | |
4828 | return x; | |
4829 | ||
4830 | mode = GET_MODE (x); | |
4831 | code = GET_CODE (x); | |
4832 | switch (code) | |
4833 | { | |
4834 | case CONST: | |
4835 | case CONST_INT: | |
4836 | case CONST_DOUBLE: | |
4837 | case SYMBOL_REF: | |
4838 | case LABEL_REF: | |
4839 | case REG: | |
4840 | /* No use simplifying an EXPR_LIST | |
4841 | since they are used only for lists of args | |
4842 | in a function call's REG_EQUAL note. */ | |
4843 | case EXPR_LIST: | |
4844 | return x; | |
4845 | ||
4846 | #ifdef HAVE_cc0 | |
4847 | case CC0: | |
4848 | return prev_insn_cc0; | |
4849 | #endif | |
4850 | ||
4851 | case PC: | |
4852 | /* If the next insn is a CODE_LABEL followed by a jump table, | |
4853 | PC's value is a LABEL_REF pointing to that label. That | |
4854 | lets us fold switch statements on the Vax. */ | |
4855 | if (insn && GET_CODE (insn) == JUMP_INSN) | |
4856 | { | |
4857 | rtx next = next_nonnote_insn (insn); | |
4858 | ||
4859 | if (next && GET_CODE (next) == CODE_LABEL | |
4860 | && NEXT_INSN (next) != 0 | |
4861 | && GET_CODE (NEXT_INSN (next)) == JUMP_INSN | |
4862 | && (GET_CODE (PATTERN (NEXT_INSN (next))) == ADDR_VEC | |
4863 | || GET_CODE (PATTERN (NEXT_INSN (next))) == ADDR_DIFF_VEC)) | |
4864 | return gen_rtx (LABEL_REF, Pmode, next); | |
4865 | } | |
4866 | break; | |
4867 | ||
4868 | case SUBREG: | |
c610adec RK |
4869 | /* See if we previously assigned a constant value to this SUBREG. */ |
4870 | if ((new = lookup_as_function (x, CONST_INT)) != 0 | |
4871 | || (new = lookup_as_function (x, CONST_DOUBLE)) != 0) | |
7afe21cc RK |
4872 | return new; |
4873 | ||
4b980e20 RK |
4874 | /* If this is a paradoxical SUBREG, we have no idea what value the |
4875 | extra bits would have. However, if the operand is equivalent | |
4876 | to a SUBREG whose operand is the same as our mode, and all the | |
4877 | modes are within a word, we can just use the inner operand | |
31c85c78 RK |
4878 | because these SUBREGs just say how to treat the register. |
4879 | ||
4880 | Similarly if we find an integer constant. */ | |
4b980e20 | 4881 | |
e5f6a288 | 4882 | if (GET_MODE_SIZE (mode) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))) |
4b980e20 RK |
4883 | { |
4884 | enum machine_mode imode = GET_MODE (SUBREG_REG (x)); | |
4885 | struct table_elt *elt; | |
4886 | ||
4887 | if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD | |
4888 | && GET_MODE_SIZE (imode) <= UNITS_PER_WORD | |
4889 | && (elt = lookup (SUBREG_REG (x), HASH (SUBREG_REG (x), imode), | |
4890 | imode)) != 0) | |
31c85c78 RK |
4891 | for (elt = elt->first_same_value; |
4892 | elt; elt = elt->next_same_value) | |
4893 | { | |
4894 | if (CONSTANT_P (elt->exp) | |
4895 | && GET_MODE (elt->exp) == VOIDmode) | |
4896 | return elt->exp; | |
4897 | ||
4b980e20 RK |
4898 | if (GET_CODE (elt->exp) == SUBREG |
4899 | && GET_MODE (SUBREG_REG (elt->exp)) == mode | |
906c4e36 | 4900 | && exp_equiv_p (elt->exp, elt->exp, 1, 0)) |
4b980e20 RK |
4901 | return copy_rtx (SUBREG_REG (elt->exp)); |
4902 | } | |
4903 | ||
4904 | return x; | |
4905 | } | |
e5f6a288 | 4906 | |
7afe21cc RK |
4907 | /* Fold SUBREG_REG. If it changed, see if we can simplify the SUBREG. |
4908 | We might be able to if the SUBREG is extracting a single word in an | |
4909 | integral mode or extracting the low part. */ | |
4910 | ||
4911 | folded_arg0 = fold_rtx (SUBREG_REG (x), insn); | |
4912 | const_arg0 = equiv_constant (folded_arg0); | |
4913 | if (const_arg0) | |
4914 | folded_arg0 = const_arg0; | |
4915 | ||
4916 | if (folded_arg0 != SUBREG_REG (x)) | |
4917 | { | |
4918 | new = 0; | |
4919 | ||
4920 | if (GET_MODE_CLASS (mode) == MODE_INT | |
4921 | && GET_MODE_SIZE (mode) == UNITS_PER_WORD | |
4922 | && GET_MODE (SUBREG_REG (x)) != VOIDmode) | |
4923 | new = operand_subword (folded_arg0, SUBREG_WORD (x), 0, | |
4924 | GET_MODE (SUBREG_REG (x))); | |
4925 | if (new == 0 && subreg_lowpart_p (x)) | |
4926 | new = gen_lowpart_if_possible (mode, folded_arg0); | |
4927 | if (new) | |
4928 | return new; | |
4929 | } | |
e5f6a288 RK |
4930 | |
4931 | /* If this is a narrowing SUBREG and our operand is a REG, see if | |
858a47b1 | 4932 | we can find an equivalence for REG that is an arithmetic operation |
e5f6a288 RK |
4933 | in a wider mode where both operands are paradoxical SUBREGs |
4934 | from objects of our result mode. In that case, we couldn't report | |
4935 | an equivalent value for that operation, since we don't know what the | |
4936 | extra bits will be. But we can find an equivalence for this SUBREG | |
4937 | by folding that operation is the narrow mode. This allows us to | |
4938 | fold arithmetic in narrow modes when the machine only supports | |
4b980e20 RK |
4939 | word-sized arithmetic. |
4940 | ||
4941 | Also look for a case where we have a SUBREG whose operand is the | |
4942 | same as our result. If both modes are smaller than a word, we | |
4943 | are simply interpreting a register in different modes and we | |
4944 | can use the inner value. */ | |
e5f6a288 RK |
4945 | |
4946 | if (GET_CODE (folded_arg0) == REG | |
e8d76a39 RS |
4947 | && GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (folded_arg0)) |
4948 | && subreg_lowpart_p (x)) | |
e5f6a288 RK |
4949 | { |
4950 | struct table_elt *elt; | |
4951 | ||
4952 | /* We can use HASH here since we know that canon_hash won't be | |
4953 | called. */ | |
4954 | elt = lookup (folded_arg0, | |
4955 | HASH (folded_arg0, GET_MODE (folded_arg0)), | |
4956 | GET_MODE (folded_arg0)); | |
4957 | ||
4958 | if (elt) | |
4959 | elt = elt->first_same_value; | |
4960 | ||
4961 | for (; elt; elt = elt->next_same_value) | |
4962 | { | |
e8d76a39 RS |
4963 | enum rtx_code eltcode = GET_CODE (elt->exp); |
4964 | ||
e5f6a288 RK |
4965 | /* Just check for unary and binary operations. */ |
4966 | if (GET_RTX_CLASS (GET_CODE (elt->exp)) == '1' | |
4967 | && GET_CODE (elt->exp) != SIGN_EXTEND | |
4968 | && GET_CODE (elt->exp) != ZERO_EXTEND | |
4969 | && GET_CODE (XEXP (elt->exp, 0)) == SUBREG | |
4970 | && GET_MODE (SUBREG_REG (XEXP (elt->exp, 0))) == mode) | |
4971 | { | |
4972 | rtx op0 = SUBREG_REG (XEXP (elt->exp, 0)); | |
4973 | ||
4974 | if (GET_CODE (op0) != REG && ! CONSTANT_P (op0)) | |
906c4e36 | 4975 | op0 = fold_rtx (op0, NULL_RTX); |
e5f6a288 RK |
4976 | |
4977 | op0 = equiv_constant (op0); | |
4978 | if (op0) | |
4979 | new = simplify_unary_operation (GET_CODE (elt->exp), mode, | |
4980 | op0, mode); | |
4981 | } | |
4982 | else if ((GET_RTX_CLASS (GET_CODE (elt->exp)) == '2' | |
4983 | || GET_RTX_CLASS (GET_CODE (elt->exp)) == 'c') | |
e8d76a39 RS |
4984 | && eltcode != DIV && eltcode != MOD |
4985 | && eltcode != UDIV && eltcode != UMOD | |
4986 | && eltcode != ASHIFTRT && eltcode != LSHIFTRT | |
4987 | && eltcode != ROTATE && eltcode != ROTATERT | |
e5f6a288 RK |
4988 | && ((GET_CODE (XEXP (elt->exp, 0)) == SUBREG |
4989 | && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 0))) | |
4990 | == mode)) | |
4991 | || CONSTANT_P (XEXP (elt->exp, 0))) | |
4992 | && ((GET_CODE (XEXP (elt->exp, 1)) == SUBREG | |
4993 | && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 1))) | |
4994 | == mode)) | |
4995 | || CONSTANT_P (XEXP (elt->exp, 1)))) | |
4996 | { | |
4997 | rtx op0 = gen_lowpart_common (mode, XEXP (elt->exp, 0)); | |
4998 | rtx op1 = gen_lowpart_common (mode, XEXP (elt->exp, 1)); | |
4999 | ||
5000 | if (op0 && GET_CODE (op0) != REG && ! CONSTANT_P (op0)) | |
906c4e36 | 5001 | op0 = fold_rtx (op0, NULL_RTX); |
e5f6a288 RK |
5002 | |
5003 | if (op0) | |
5004 | op0 = equiv_constant (op0); | |
5005 | ||
5006 | if (op1 && GET_CODE (op1) != REG && ! CONSTANT_P (op1)) | |
906c4e36 | 5007 | op1 = fold_rtx (op1, NULL_RTX); |
e5f6a288 RK |
5008 | |
5009 | if (op1) | |
5010 | op1 = equiv_constant (op1); | |
5011 | ||
76fb0b60 RS |
5012 | /* If we are looking for the low SImode part of |
5013 | (ashift:DI c (const_int 32)), it doesn't work | |
5014 | to compute that in SImode, because a 32-bit shift | |
5015 | in SImode is unpredictable. We know the value is 0. */ | |
5016 | if (op0 && op1 | |
45620ed4 | 5017 | && GET_CODE (elt->exp) == ASHIFT |
76fb0b60 RS |
5018 | && GET_CODE (op1) == CONST_INT |
5019 | && INTVAL (op1) >= GET_MODE_BITSIZE (mode)) | |
5020 | { | |
5021 | if (INTVAL (op1) < GET_MODE_BITSIZE (GET_MODE (elt->exp))) | |
5022 | ||
5023 | /* If the count fits in the inner mode's width, | |
5024 | but exceeds the outer mode's width, | |
5025 | the value will get truncated to 0 | |
5026 | by the subreg. */ | |
5027 | new = const0_rtx; | |
5028 | else | |
5029 | /* If the count exceeds even the inner mode's width, | |
5030 | don't fold this expression. */ | |
5031 | new = 0; | |
5032 | } | |
5033 | else if (op0 && op1) | |
e5f6a288 RK |
5034 | new = simplify_binary_operation (GET_CODE (elt->exp), mode, |
5035 | op0, op1); | |
5036 | } | |
5037 | ||
4b980e20 RK |
5038 | else if (GET_CODE (elt->exp) == SUBREG |
5039 | && GET_MODE (SUBREG_REG (elt->exp)) == mode | |
5040 | && (GET_MODE_SIZE (GET_MODE (folded_arg0)) | |
5041 | <= UNITS_PER_WORD) | |
906c4e36 | 5042 | && exp_equiv_p (elt->exp, elt->exp, 1, 0)) |
4b980e20 RK |
5043 | new = copy_rtx (SUBREG_REG (elt->exp)); |
5044 | ||
e5f6a288 RK |
5045 | if (new) |
5046 | return new; | |
5047 | } | |
5048 | } | |
5049 | ||
7afe21cc RK |
5050 | return x; |
5051 | ||
5052 | case NOT: | |
5053 | case NEG: | |
5054 | /* If we have (NOT Y), see if Y is known to be (NOT Z). | |
5055 | If so, (NOT Y) simplifies to Z. Similarly for NEG. */ | |
5056 | new = lookup_as_function (XEXP (x, 0), code); | |
5057 | if (new) | |
5058 | return fold_rtx (copy_rtx (XEXP (new, 0)), insn); | |
5059 | break; | |
13c9910f | 5060 | |
7afe21cc RK |
5061 | case MEM: |
5062 | /* If we are not actually processing an insn, don't try to find the | |
5063 | best address. Not only don't we care, but we could modify the | |
5064 | MEM in an invalid way since we have no insn to validate against. */ | |
5065 | if (insn != 0) | |
5066 | find_best_addr (insn, &XEXP (x, 0)); | |
5067 | ||
5068 | { | |
5069 | /* Even if we don't fold in the insn itself, | |
5070 | we can safely do so here, in hopes of getting a constant. */ | |
906c4e36 | 5071 | rtx addr = fold_rtx (XEXP (x, 0), NULL_RTX); |
7afe21cc | 5072 | rtx base = 0; |
906c4e36 | 5073 | HOST_WIDE_INT offset = 0; |
7afe21cc RK |
5074 | |
5075 | if (GET_CODE (addr) == REG | |
5076 | && REGNO_QTY_VALID_P (REGNO (addr)) | |
5077 | && GET_MODE (addr) == qty_mode[reg_qty[REGNO (addr)]] | |
5078 | && qty_const[reg_qty[REGNO (addr)]] != 0) | |
5079 | addr = qty_const[reg_qty[REGNO (addr)]]; | |
5080 | ||
5081 | /* If address is constant, split it into a base and integer offset. */ | |
5082 | if (GET_CODE (addr) == SYMBOL_REF || GET_CODE (addr) == LABEL_REF) | |
5083 | base = addr; | |
5084 | else if (GET_CODE (addr) == CONST && GET_CODE (XEXP (addr, 0)) == PLUS | |
5085 | && GET_CODE (XEXP (XEXP (addr, 0), 1)) == CONST_INT) | |
5086 | { | |
5087 | base = XEXP (XEXP (addr, 0), 0); | |
5088 | offset = INTVAL (XEXP (XEXP (addr, 0), 1)); | |
5089 | } | |
5090 | else if (GET_CODE (addr) == LO_SUM | |
5091 | && GET_CODE (XEXP (addr, 1)) == SYMBOL_REF) | |
5092 | base = XEXP (addr, 1); | |
5093 | ||
5094 | /* If this is a constant pool reference, we can fold it into its | |
5095 | constant to allow better value tracking. */ | |
5096 | if (base && GET_CODE (base) == SYMBOL_REF | |
5097 | && CONSTANT_POOL_ADDRESS_P (base)) | |
5098 | { | |
5099 | rtx constant = get_pool_constant (base); | |
5100 | enum machine_mode const_mode = get_pool_mode (base); | |
5101 | rtx new; | |
5102 | ||
5103 | if (CONSTANT_P (constant) && GET_CODE (constant) != CONST_INT) | |
5104 | constant_pool_entries_cost = COST (constant); | |
5105 | ||
5106 | /* If we are loading the full constant, we have an equivalence. */ | |
5107 | if (offset == 0 && mode == const_mode) | |
5108 | return constant; | |
5109 | ||
9faa82d8 | 5110 | /* If this actually isn't a constant (weird!), we can't do |
7afe21cc RK |
5111 | anything. Otherwise, handle the two most common cases: |
5112 | extracting a word from a multi-word constant, and extracting | |
5113 | the low-order bits. Other cases don't seem common enough to | |
5114 | worry about. */ | |
5115 | if (! CONSTANT_P (constant)) | |
5116 | return x; | |
5117 | ||
5118 | if (GET_MODE_CLASS (mode) == MODE_INT | |
5119 | && GET_MODE_SIZE (mode) == UNITS_PER_WORD | |
5120 | && offset % UNITS_PER_WORD == 0 | |
5121 | && (new = operand_subword (constant, | |
5122 | offset / UNITS_PER_WORD, | |
5123 | 0, const_mode)) != 0) | |
5124 | return new; | |
5125 | ||
5126 | if (((BYTES_BIG_ENDIAN | |
5127 | && offset == GET_MODE_SIZE (GET_MODE (constant)) - 1) | |
5128 | || (! BYTES_BIG_ENDIAN && offset == 0)) | |
5129 | && (new = gen_lowpart_if_possible (mode, constant)) != 0) | |
5130 | return new; | |
5131 | } | |
5132 | ||
5133 | /* If this is a reference to a label at a known position in a jump | |
5134 | table, we also know its value. */ | |
5135 | if (base && GET_CODE (base) == LABEL_REF) | |
5136 | { | |
5137 | rtx label = XEXP (base, 0); | |
5138 | rtx table_insn = NEXT_INSN (label); | |
5139 | ||
5140 | if (table_insn && GET_CODE (table_insn) == JUMP_INSN | |
5141 | && GET_CODE (PATTERN (table_insn)) == ADDR_VEC) | |
5142 | { | |
5143 | rtx table = PATTERN (table_insn); | |
5144 | ||
5145 | if (offset >= 0 | |
5146 | && (offset / GET_MODE_SIZE (GET_MODE (table)) | |
5147 | < XVECLEN (table, 0))) | |
5148 | return XVECEXP (table, 0, | |
5149 | offset / GET_MODE_SIZE (GET_MODE (table))); | |
5150 | } | |
5151 | if (table_insn && GET_CODE (table_insn) == JUMP_INSN | |
5152 | && GET_CODE (PATTERN (table_insn)) == ADDR_DIFF_VEC) | |
5153 | { | |
5154 | rtx table = PATTERN (table_insn); | |
5155 | ||
5156 | if (offset >= 0 | |
5157 | && (offset / GET_MODE_SIZE (GET_MODE (table)) | |
5158 | < XVECLEN (table, 1))) | |
5159 | { | |
5160 | offset /= GET_MODE_SIZE (GET_MODE (table)); | |
5161 | new = gen_rtx (MINUS, Pmode, XVECEXP (table, 1, offset), | |
5162 | XEXP (table, 0)); | |
5163 | ||
5164 | if (GET_MODE (table) != Pmode) | |
5165 | new = gen_rtx (TRUNCATE, GET_MODE (table), new); | |
5166 | ||
67a37737 RK |
5167 | /* Indicate this is a constant. This isn't a |
5168 | valid form of CONST, but it will only be used | |
5169 | to fold the next insns and then discarded, so | |
5170 | it should be safe. */ | |
5171 | return gen_rtx (CONST, GET_MODE (new), new); | |
7afe21cc RK |
5172 | } |
5173 | } | |
5174 | } | |
5175 | ||
5176 | return x; | |
5177 | } | |
9255709c RK |
5178 | |
5179 | case ASM_OPERANDS: | |
5180 | for (i = XVECLEN (x, 3) - 1; i >= 0; i--) | |
5181 | validate_change (insn, &XVECEXP (x, 3, i), | |
5182 | fold_rtx (XVECEXP (x, 3, i), insn), 0); | |
5183 | break; | |
7afe21cc RK |
5184 | } |
5185 | ||
5186 | const_arg0 = 0; | |
5187 | const_arg1 = 0; | |
5188 | const_arg2 = 0; | |
5189 | mode_arg0 = VOIDmode; | |
5190 | ||
5191 | /* Try folding our operands. | |
5192 | Then see which ones have constant values known. */ | |
5193 | ||
5194 | fmt = GET_RTX_FORMAT (code); | |
5195 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
5196 | if (fmt[i] == 'e') | |
5197 | { | |
5198 | rtx arg = XEXP (x, i); | |
5199 | rtx folded_arg = arg, const_arg = 0; | |
5200 | enum machine_mode mode_arg = GET_MODE (arg); | |
5201 | rtx cheap_arg, expensive_arg; | |
5202 | rtx replacements[2]; | |
5203 | int j; | |
5204 | ||
5205 | /* Most arguments are cheap, so handle them specially. */ | |
5206 | switch (GET_CODE (arg)) | |
5207 | { | |
5208 | case REG: | |
5209 | /* This is the same as calling equiv_constant; it is duplicated | |
5210 | here for speed. */ | |
5211 | if (REGNO_QTY_VALID_P (REGNO (arg)) | |
5212 | && qty_const[reg_qty[REGNO (arg)]] != 0 | |
5213 | && GET_CODE (qty_const[reg_qty[REGNO (arg)]]) != REG | |
5214 | && GET_CODE (qty_const[reg_qty[REGNO (arg)]]) != PLUS) | |
5215 | const_arg | |
5216 | = gen_lowpart_if_possible (GET_MODE (arg), | |
5217 | qty_const[reg_qty[REGNO (arg)]]); | |
5218 | break; | |
5219 | ||
5220 | case CONST: | |
5221 | case CONST_INT: | |
5222 | case SYMBOL_REF: | |
5223 | case LABEL_REF: | |
5224 | case CONST_DOUBLE: | |
5225 | const_arg = arg; | |
5226 | break; | |
5227 | ||
5228 | #ifdef HAVE_cc0 | |
5229 | case CC0: | |
5230 | folded_arg = prev_insn_cc0; | |
5231 | mode_arg = prev_insn_cc0_mode; | |
5232 | const_arg = equiv_constant (folded_arg); | |
5233 | break; | |
5234 | #endif | |
5235 | ||
5236 | default: | |
5237 | folded_arg = fold_rtx (arg, insn); | |
5238 | const_arg = equiv_constant (folded_arg); | |
5239 | } | |
5240 | ||
5241 | /* For the first three operands, see if the operand | |
5242 | is constant or equivalent to a constant. */ | |
5243 | switch (i) | |
5244 | { | |
5245 | case 0: | |
5246 | folded_arg0 = folded_arg; | |
5247 | const_arg0 = const_arg; | |
5248 | mode_arg0 = mode_arg; | |
5249 | break; | |
5250 | case 1: | |
5251 | folded_arg1 = folded_arg; | |
5252 | const_arg1 = const_arg; | |
5253 | break; | |
5254 | case 2: | |
5255 | const_arg2 = const_arg; | |
5256 | break; | |
5257 | } | |
5258 | ||
5259 | /* Pick the least expensive of the folded argument and an | |
5260 | equivalent constant argument. */ | |
5261 | if (const_arg == 0 || const_arg == folded_arg | |
5262 | || COST (const_arg) > COST (folded_arg)) | |
5263 | cheap_arg = folded_arg, expensive_arg = const_arg; | |
5264 | else | |
5265 | cheap_arg = const_arg, expensive_arg = folded_arg; | |
5266 | ||
5267 | /* Try to replace the operand with the cheapest of the two | |
5268 | possibilities. If it doesn't work and this is either of the first | |
5269 | two operands of a commutative operation, try swapping them. | |
5270 | If THAT fails, try the more expensive, provided it is cheaper | |
5271 | than what is already there. */ | |
5272 | ||
5273 | if (cheap_arg == XEXP (x, i)) | |
5274 | continue; | |
5275 | ||
5276 | if (insn == 0 && ! copied) | |
5277 | { | |
5278 | x = copy_rtx (x); | |
5279 | copied = 1; | |
5280 | } | |
5281 | ||
5282 | replacements[0] = cheap_arg, replacements[1] = expensive_arg; | |
5283 | for (j = 0; | |
5284 | j < 2 && replacements[j] | |
5285 | && COST (replacements[j]) < COST (XEXP (x, i)); | |
5286 | j++) | |
5287 | { | |
5288 | if (validate_change (insn, &XEXP (x, i), replacements[j], 0)) | |
5289 | break; | |
5290 | ||
5291 | if (code == NE || code == EQ || GET_RTX_CLASS (code) == 'c') | |
5292 | { | |
5293 | validate_change (insn, &XEXP (x, i), XEXP (x, 1 - i), 1); | |
5294 | validate_change (insn, &XEXP (x, 1 - i), replacements[j], 1); | |
5295 | ||
5296 | if (apply_change_group ()) | |
5297 | { | |
5298 | /* Swap them back to be invalid so that this loop can | |
5299 | continue and flag them to be swapped back later. */ | |
5300 | rtx tem; | |
5301 | ||
5302 | tem = XEXP (x, 0); XEXP (x, 0) = XEXP (x, 1); | |
5303 | XEXP (x, 1) = tem; | |
5304 | must_swap = 1; | |
5305 | break; | |
5306 | } | |
5307 | } | |
5308 | } | |
5309 | } | |
5310 | ||
5311 | else if (fmt[i] == 'E') | |
5312 | /* Don't try to fold inside of a vector of expressions. | |
5313 | Doing nothing is harmless. */ | |
5314 | ; | |
5315 | ||
5316 | /* If a commutative operation, place a constant integer as the second | |
5317 | operand unless the first operand is also a constant integer. Otherwise, | |
5318 | place any constant second unless the first operand is also a constant. */ | |
5319 | ||
5320 | if (code == EQ || code == NE || GET_RTX_CLASS (code) == 'c') | |
5321 | { | |
5322 | if (must_swap || (const_arg0 | |
5323 | && (const_arg1 == 0 | |
5324 | || (GET_CODE (const_arg0) == CONST_INT | |
5325 | && GET_CODE (const_arg1) != CONST_INT)))) | |
5326 | { | |
5327 | register rtx tem = XEXP (x, 0); | |
5328 | ||
5329 | if (insn == 0 && ! copied) | |
5330 | { | |
5331 | x = copy_rtx (x); | |
5332 | copied = 1; | |
5333 | } | |
5334 | ||
5335 | validate_change (insn, &XEXP (x, 0), XEXP (x, 1), 1); | |
5336 | validate_change (insn, &XEXP (x, 1), tem, 1); | |
5337 | if (apply_change_group ()) | |
5338 | { | |
5339 | tem = const_arg0, const_arg0 = const_arg1, const_arg1 = tem; | |
5340 | tem = folded_arg0, folded_arg0 = folded_arg1, folded_arg1 = tem; | |
5341 | } | |
5342 | } | |
5343 | } | |
5344 | ||
5345 | /* If X is an arithmetic operation, see if we can simplify it. */ | |
5346 | ||
5347 | switch (GET_RTX_CLASS (code)) | |
5348 | { | |
5349 | case '1': | |
67a37737 RK |
5350 | { |
5351 | int is_const = 0; | |
5352 | ||
5353 | /* We can't simplify extension ops unless we know the | |
5354 | original mode. */ | |
5355 | if ((code == ZERO_EXTEND || code == SIGN_EXTEND) | |
5356 | && mode_arg0 == VOIDmode) | |
5357 | break; | |
5358 | ||
5359 | /* If we had a CONST, strip it off and put it back later if we | |
5360 | fold. */ | |
5361 | if (const_arg0 != 0 && GET_CODE (const_arg0) == CONST) | |
5362 | is_const = 1, const_arg0 = XEXP (const_arg0, 0); | |
5363 | ||
5364 | new = simplify_unary_operation (code, mode, | |
5365 | const_arg0 ? const_arg0 : folded_arg0, | |
5366 | mode_arg0); | |
5367 | if (new != 0 && is_const) | |
5368 | new = gen_rtx (CONST, mode, new); | |
5369 | } | |
7afe21cc RK |
5370 | break; |
5371 | ||
5372 | case '<': | |
5373 | /* See what items are actually being compared and set FOLDED_ARG[01] | |
5374 | to those values and CODE to the actual comparison code. If any are | |
5375 | constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't | |
5376 | do anything if both operands are already known to be constant. */ | |
5377 | ||
5378 | if (const_arg0 == 0 || const_arg1 == 0) | |
5379 | { | |
5380 | struct table_elt *p0, *p1; | |
c610adec | 5381 | rtx true = const_true_rtx, false = const0_rtx; |
13c9910f | 5382 | enum machine_mode mode_arg1; |
c610adec RK |
5383 | |
5384 | #ifdef FLOAT_STORE_FLAG_VALUE | |
c7c955ee | 5385 | if (GET_MODE_CLASS (mode) == MODE_FLOAT) |
c610adec | 5386 | { |
560c94a2 RK |
5387 | true = CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE, |
5388 | mode); | |
c610adec RK |
5389 | false = CONST0_RTX (mode); |
5390 | } | |
5391 | #endif | |
7afe21cc | 5392 | |
13c9910f RS |
5393 | code = find_comparison_args (code, &folded_arg0, &folded_arg1, |
5394 | &mode_arg0, &mode_arg1); | |
7afe21cc RK |
5395 | const_arg0 = equiv_constant (folded_arg0); |
5396 | const_arg1 = equiv_constant (folded_arg1); | |
5397 | ||
13c9910f RS |
5398 | /* If the mode is VOIDmode or a MODE_CC mode, we don't know |
5399 | what kinds of things are being compared, so we can't do | |
5400 | anything with this comparison. */ | |
7afe21cc RK |
5401 | |
5402 | if (mode_arg0 == VOIDmode || GET_MODE_CLASS (mode_arg0) == MODE_CC) | |
5403 | break; | |
5404 | ||
0f41302f MS |
5405 | /* If we do not now have two constants being compared, see |
5406 | if we can nevertheless deduce some things about the | |
5407 | comparison. */ | |
7afe21cc RK |
5408 | if (const_arg0 == 0 || const_arg1 == 0) |
5409 | { | |
0f41302f MS |
5410 | /* Is FOLDED_ARG0 frame-pointer plus a constant? Or |
5411 | non-explicit constant? These aren't zero, but we | |
5412 | don't know their sign. */ | |
7afe21cc RK |
5413 | if (const_arg1 == const0_rtx |
5414 | && (NONZERO_BASE_PLUS_P (folded_arg0) | |
5415 | #if 0 /* Sad to say, on sysvr4, #pragma weak can make a symbol address | |
5416 | come out as 0. */ | |
5417 | || GET_CODE (folded_arg0) == SYMBOL_REF | |
5418 | #endif | |
5419 | || GET_CODE (folded_arg0) == LABEL_REF | |
5420 | || GET_CODE (folded_arg0) == CONST)) | |
5421 | { | |
5422 | if (code == EQ) | |
c610adec | 5423 | return false; |
7afe21cc | 5424 | else if (code == NE) |
c610adec | 5425 | return true; |
7afe21cc RK |
5426 | } |
5427 | ||
5428 | /* See if the two operands are the same. We don't do this | |
5429 | for IEEE floating-point since we can't assume x == x | |
5430 | since x might be a NaN. */ | |
5431 | ||
5432 | if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT | |
a83afb65 | 5433 | || ! FLOAT_MODE_P (mode_arg0) || flag_fast_math) |
7afe21cc RK |
5434 | && (folded_arg0 == folded_arg1 |
5435 | || (GET_CODE (folded_arg0) == REG | |
5436 | && GET_CODE (folded_arg1) == REG | |
5437 | && (reg_qty[REGNO (folded_arg0)] | |
5438 | == reg_qty[REGNO (folded_arg1)])) | |
5439 | || ((p0 = lookup (folded_arg0, | |
5440 | (safe_hash (folded_arg0, mode_arg0) | |
5441 | % NBUCKETS), mode_arg0)) | |
5442 | && (p1 = lookup (folded_arg1, | |
5443 | (safe_hash (folded_arg1, mode_arg0) | |
5444 | % NBUCKETS), mode_arg0)) | |
5445 | && p0->first_same_value == p1->first_same_value))) | |
5446 | return ((code == EQ || code == LE || code == GE | |
5447 | || code == LEU || code == GEU) | |
c610adec | 5448 | ? true : false); |
7afe21cc RK |
5449 | |
5450 | /* If FOLDED_ARG0 is a register, see if the comparison we are | |
5451 | doing now is either the same as we did before or the reverse | |
5452 | (we only check the reverse if not floating-point). */ | |
5453 | else if (GET_CODE (folded_arg0) == REG) | |
5454 | { | |
5455 | int qty = reg_qty[REGNO (folded_arg0)]; | |
5456 | ||
5457 | if (REGNO_QTY_VALID_P (REGNO (folded_arg0)) | |
5458 | && (comparison_dominates_p (qty_comparison_code[qty], code) | |
5459 | || (comparison_dominates_p (qty_comparison_code[qty], | |
5460 | reverse_condition (code)) | |
cbf6a543 | 5461 | && ! FLOAT_MODE_P (mode_arg0))) |
7afe21cc RK |
5462 | && (rtx_equal_p (qty_comparison_const[qty], folded_arg1) |
5463 | || (const_arg1 | |
5464 | && rtx_equal_p (qty_comparison_const[qty], | |
5465 | const_arg1)) | |
5466 | || (GET_CODE (folded_arg1) == REG | |
5467 | && (reg_qty[REGNO (folded_arg1)] | |
5468 | == qty_comparison_qty[qty])))) | |
5469 | return (comparison_dominates_p (qty_comparison_code[qty], | |
5470 | code) | |
c610adec | 5471 | ? true : false); |
7afe21cc RK |
5472 | } |
5473 | } | |
5474 | } | |
5475 | ||
5476 | /* If we are comparing against zero, see if the first operand is | |
5477 | equivalent to an IOR with a constant. If so, we may be able to | |
5478 | determine the result of this comparison. */ | |
5479 | ||
5480 | if (const_arg1 == const0_rtx) | |
5481 | { | |
5482 | rtx y = lookup_as_function (folded_arg0, IOR); | |
5483 | rtx inner_const; | |
5484 | ||
5485 | if (y != 0 | |
5486 | && (inner_const = equiv_constant (XEXP (y, 1))) != 0 | |
5487 | && GET_CODE (inner_const) == CONST_INT | |
5488 | && INTVAL (inner_const) != 0) | |
5489 | { | |
5490 | int sign_bitnum = GET_MODE_BITSIZE (mode_arg0) - 1; | |
906c4e36 RK |
5491 | int has_sign = (HOST_BITS_PER_WIDE_INT >= sign_bitnum |
5492 | && (INTVAL (inner_const) | |
5493 | & ((HOST_WIDE_INT) 1 << sign_bitnum))); | |
c610adec RK |
5494 | rtx true = const_true_rtx, false = const0_rtx; |
5495 | ||
5496 | #ifdef FLOAT_STORE_FLAG_VALUE | |
c7c955ee | 5497 | if (GET_MODE_CLASS (mode) == MODE_FLOAT) |
c610adec | 5498 | { |
560c94a2 RK |
5499 | true = CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE, |
5500 | mode); | |
c610adec RK |
5501 | false = CONST0_RTX (mode); |
5502 | } | |
5503 | #endif | |
7afe21cc RK |
5504 | |
5505 | switch (code) | |
5506 | { | |
5507 | case EQ: | |
c610adec | 5508 | return false; |
7afe21cc | 5509 | case NE: |
c610adec | 5510 | return true; |
7afe21cc RK |
5511 | case LT: case LE: |
5512 | if (has_sign) | |
c610adec | 5513 | return true; |
7afe21cc RK |
5514 | break; |
5515 | case GT: case GE: | |
5516 | if (has_sign) | |
c610adec | 5517 | return false; |
7afe21cc RK |
5518 | break; |
5519 | } | |
5520 | } | |
5521 | } | |
5522 | ||
5523 | new = simplify_relational_operation (code, mode_arg0, | |
5524 | const_arg0 ? const_arg0 : folded_arg0, | |
5525 | const_arg1 ? const_arg1 : folded_arg1); | |
c610adec RK |
5526 | #ifdef FLOAT_STORE_FLAG_VALUE |
5527 | if (new != 0 && GET_MODE_CLASS (mode) == MODE_FLOAT) | |
5528 | new = ((new == const0_rtx) ? CONST0_RTX (mode) | |
560c94a2 | 5529 | : CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE, mode)); |
c610adec | 5530 | #endif |
7afe21cc RK |
5531 | break; |
5532 | ||
5533 | case '2': | |
5534 | case 'c': | |
5535 | switch (code) | |
5536 | { | |
5537 | case PLUS: | |
5538 | /* If the second operand is a LABEL_REF, see if the first is a MINUS | |
5539 | with that LABEL_REF as its second operand. If so, the result is | |
5540 | the first operand of that MINUS. This handles switches with an | |
5541 | ADDR_DIFF_VEC table. */ | |
5542 | if (const_arg1 && GET_CODE (const_arg1) == LABEL_REF) | |
5543 | { | |
e650cbda RK |
5544 | rtx y |
5545 | = GET_CODE (folded_arg0) == MINUS ? folded_arg0 | |
5546 | : lookup_as_function (folded_arg0, MINUS); | |
7afe21cc RK |
5547 | |
5548 | if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF | |
5549 | && XEXP (XEXP (y, 1), 0) == XEXP (const_arg1, 0)) | |
5550 | return XEXP (y, 0); | |
67a37737 RK |
5551 | |
5552 | /* Now try for a CONST of a MINUS like the above. */ | |
e650cbda RK |
5553 | if ((y = (GET_CODE (folded_arg0) == CONST ? folded_arg0 |
5554 | : lookup_as_function (folded_arg0, CONST))) != 0 | |
67a37737 RK |
5555 | && GET_CODE (XEXP (y, 0)) == MINUS |
5556 | && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF | |
5557 | && XEXP (XEXP (XEXP (y, 0),1), 0) == XEXP (const_arg1, 0)) | |
5558 | return XEXP (XEXP (y, 0), 0); | |
7afe21cc | 5559 | } |
c2cc0778 | 5560 | |
e650cbda RK |
5561 | /* Likewise if the operands are in the other order. */ |
5562 | if (const_arg0 && GET_CODE (const_arg0) == LABEL_REF) | |
5563 | { | |
5564 | rtx y | |
5565 | = GET_CODE (folded_arg1) == MINUS ? folded_arg1 | |
5566 | : lookup_as_function (folded_arg1, MINUS); | |
5567 | ||
5568 | if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF | |
5569 | && XEXP (XEXP (y, 1), 0) == XEXP (const_arg0, 0)) | |
5570 | return XEXP (y, 0); | |
5571 | ||
5572 | /* Now try for a CONST of a MINUS like the above. */ | |
5573 | if ((y = (GET_CODE (folded_arg1) == CONST ? folded_arg1 | |
5574 | : lookup_as_function (folded_arg1, CONST))) != 0 | |
5575 | && GET_CODE (XEXP (y, 0)) == MINUS | |
5576 | && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF | |
5577 | && XEXP (XEXP (XEXP (y, 0),1), 0) == XEXP (const_arg0, 0)) | |
5578 | return XEXP (XEXP (y, 0), 0); | |
5579 | } | |
5580 | ||
c2cc0778 RK |
5581 | /* If second operand is a register equivalent to a negative |
5582 | CONST_INT, see if we can find a register equivalent to the | |
5583 | positive constant. Make a MINUS if so. Don't do this for | |
5584 | a negative constant since we might then alternate between | |
5585 | chosing positive and negative constants. Having the positive | |
5586 | constant previously-used is the more common case. */ | |
5587 | if (const_arg1 && GET_CODE (const_arg1) == CONST_INT | |
5588 | && INTVAL (const_arg1) < 0 && GET_CODE (folded_arg1) == REG) | |
5589 | { | |
5590 | rtx new_const = GEN_INT (- INTVAL (const_arg1)); | |
5591 | struct table_elt *p | |
5592 | = lookup (new_const, safe_hash (new_const, mode) % NBUCKETS, | |
5593 | mode); | |
5594 | ||
5595 | if (p) | |
5596 | for (p = p->first_same_value; p; p = p->next_same_value) | |
5597 | if (GET_CODE (p->exp) == REG) | |
5598 | return cse_gen_binary (MINUS, mode, folded_arg0, | |
5599 | canon_reg (p->exp, NULL_RTX)); | |
5600 | } | |
13c9910f RS |
5601 | goto from_plus; |
5602 | ||
5603 | case MINUS: | |
5604 | /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2). | |
5605 | If so, produce (PLUS Z C2-C). */ | |
5606 | if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT) | |
5607 | { | |
5608 | rtx y = lookup_as_function (XEXP (x, 0), PLUS); | |
5609 | if (y && GET_CODE (XEXP (y, 1)) == CONST_INT) | |
f3becefd RK |
5610 | return fold_rtx (plus_constant (copy_rtx (y), |
5611 | -INTVAL (const_arg1)), | |
a3b5c94a | 5612 | NULL_RTX); |
13c9910f | 5613 | } |
7afe21cc | 5614 | |
0f41302f | 5615 | /* ... fall through ... */ |
7afe21cc | 5616 | |
13c9910f | 5617 | from_plus: |
7afe21cc RK |
5618 | case SMIN: case SMAX: case UMIN: case UMAX: |
5619 | case IOR: case AND: case XOR: | |
5620 | case MULT: case DIV: case UDIV: | |
5621 | case ASHIFT: case LSHIFTRT: case ASHIFTRT: | |
5622 | /* If we have (<op> <reg> <const_int>) for an associative OP and REG | |
5623 | is known to be of similar form, we may be able to replace the | |
5624 | operation with a combined operation. This may eliminate the | |
5625 | intermediate operation if every use is simplified in this way. | |
5626 | Note that the similar optimization done by combine.c only works | |
5627 | if the intermediate operation's result has only one reference. */ | |
5628 | ||
5629 | if (GET_CODE (folded_arg0) == REG | |
5630 | && const_arg1 && GET_CODE (const_arg1) == CONST_INT) | |
5631 | { | |
5632 | int is_shift | |
5633 | = (code == ASHIFT || code == ASHIFTRT || code == LSHIFTRT); | |
5634 | rtx y = lookup_as_function (folded_arg0, code); | |
5635 | rtx inner_const; | |
5636 | enum rtx_code associate_code; | |
5637 | rtx new_const; | |
5638 | ||
5639 | if (y == 0 | |
5640 | || 0 == (inner_const | |
5641 | = equiv_constant (fold_rtx (XEXP (y, 1), 0))) | |
5642 | || GET_CODE (inner_const) != CONST_INT | |
5643 | /* If we have compiled a statement like | |
5644 | "if (x == (x & mask1))", and now are looking at | |
5645 | "x & mask2", we will have a case where the first operand | |
5646 | of Y is the same as our first operand. Unless we detect | |
5647 | this case, an infinite loop will result. */ | |
5648 | || XEXP (y, 0) == folded_arg0) | |
5649 | break; | |
5650 | ||
5651 | /* Don't associate these operations if they are a PLUS with the | |
5652 | same constant and it is a power of two. These might be doable | |
5653 | with a pre- or post-increment. Similarly for two subtracts of | |
5654 | identical powers of two with post decrement. */ | |
5655 | ||
5656 | if (code == PLUS && INTVAL (const_arg1) == INTVAL (inner_const) | |
5657 | && (0 | |
5658 | #if defined(HAVE_PRE_INCREMENT) || defined(HAVE_POST_INCREMENT) | |
5659 | || exact_log2 (INTVAL (const_arg1)) >= 0 | |
5660 | #endif | |
5661 | #if defined(HAVE_PRE_DECREMENT) || defined(HAVE_POST_DECREMENT) | |
5662 | || exact_log2 (- INTVAL (const_arg1)) >= 0 | |
5663 | #endif | |
5664 | )) | |
5665 | break; | |
5666 | ||
5667 | /* Compute the code used to compose the constants. For example, | |
5668 | A/C1/C2 is A/(C1 * C2), so if CODE == DIV, we want MULT. */ | |
5669 | ||
5670 | associate_code | |
5671 | = (code == MULT || code == DIV || code == UDIV ? MULT | |
5672 | : is_shift || code == PLUS || code == MINUS ? PLUS : code); | |
5673 | ||
5674 | new_const = simplify_binary_operation (associate_code, mode, | |
5675 | const_arg1, inner_const); | |
5676 | ||
5677 | if (new_const == 0) | |
5678 | break; | |
5679 | ||
5680 | /* If we are associating shift operations, don't let this | |
4908e508 RS |
5681 | produce a shift of the size of the object or larger. |
5682 | This could occur when we follow a sign-extend by a right | |
5683 | shift on a machine that does a sign-extend as a pair | |
5684 | of shifts. */ | |
7afe21cc RK |
5685 | |
5686 | if (is_shift && GET_CODE (new_const) == CONST_INT | |
4908e508 RS |
5687 | && INTVAL (new_const) >= GET_MODE_BITSIZE (mode)) |
5688 | { | |
5689 | /* As an exception, we can turn an ASHIFTRT of this | |
5690 | form into a shift of the number of bits - 1. */ | |
5691 | if (code == ASHIFTRT) | |
5692 | new_const = GEN_INT (GET_MODE_BITSIZE (mode) - 1); | |
5693 | else | |
5694 | break; | |
5695 | } | |
7afe21cc RK |
5696 | |
5697 | y = copy_rtx (XEXP (y, 0)); | |
5698 | ||
5699 | /* If Y contains our first operand (the most common way this | |
5700 | can happen is if Y is a MEM), we would do into an infinite | |
5701 | loop if we tried to fold it. So don't in that case. */ | |
5702 | ||
5703 | if (! reg_mentioned_p (folded_arg0, y)) | |
5704 | y = fold_rtx (y, insn); | |
5705 | ||
96b0e481 | 5706 | return cse_gen_binary (code, mode, y, new_const); |
7afe21cc RK |
5707 | } |
5708 | } | |
5709 | ||
5710 | new = simplify_binary_operation (code, mode, | |
5711 | const_arg0 ? const_arg0 : folded_arg0, | |
5712 | const_arg1 ? const_arg1 : folded_arg1); | |
5713 | break; | |
5714 | ||
5715 | case 'o': | |
5716 | /* (lo_sum (high X) X) is simply X. */ | |
5717 | if (code == LO_SUM && const_arg0 != 0 | |
5718 | && GET_CODE (const_arg0) == HIGH | |
5719 | && rtx_equal_p (XEXP (const_arg0, 0), const_arg1)) | |
5720 | return const_arg1; | |
5721 | break; | |
5722 | ||
5723 | case '3': | |
5724 | case 'b': | |
5725 | new = simplify_ternary_operation (code, mode, mode_arg0, | |
5726 | const_arg0 ? const_arg0 : folded_arg0, | |
5727 | const_arg1 ? const_arg1 : folded_arg1, | |
5728 | const_arg2 ? const_arg2 : XEXP (x, 2)); | |
5729 | break; | |
5730 | } | |
5731 | ||
5732 | return new ? new : x; | |
5733 | } | |
5734 | \f | |
5735 | /* Return a constant value currently equivalent to X. | |
5736 | Return 0 if we don't know one. */ | |
5737 | ||
5738 | static rtx | |
5739 | equiv_constant (x) | |
5740 | rtx x; | |
5741 | { | |
5742 | if (GET_CODE (x) == REG | |
5743 | && REGNO_QTY_VALID_P (REGNO (x)) | |
5744 | && qty_const[reg_qty[REGNO (x)]]) | |
5745 | x = gen_lowpart_if_possible (GET_MODE (x), qty_const[reg_qty[REGNO (x)]]); | |
5746 | ||
5747 | if (x != 0 && CONSTANT_P (x)) | |
5748 | return x; | |
5749 | ||
fc3ffe83 RK |
5750 | /* If X is a MEM, try to fold it outside the context of any insn to see if |
5751 | it might be equivalent to a constant. That handles the case where it | |
5752 | is a constant-pool reference. Then try to look it up in the hash table | |
5753 | in case it is something whose value we have seen before. */ | |
5754 | ||
5755 | if (GET_CODE (x) == MEM) | |
5756 | { | |
5757 | struct table_elt *elt; | |
5758 | ||
906c4e36 | 5759 | x = fold_rtx (x, NULL_RTX); |
fc3ffe83 RK |
5760 | if (CONSTANT_P (x)) |
5761 | return x; | |
5762 | ||
5763 | elt = lookup (x, safe_hash (x, GET_MODE (x)) % NBUCKETS, GET_MODE (x)); | |
5764 | if (elt == 0) | |
5765 | return 0; | |
5766 | ||
5767 | for (elt = elt->first_same_value; elt; elt = elt->next_same_value) | |
5768 | if (elt->is_const && CONSTANT_P (elt->exp)) | |
5769 | return elt->exp; | |
5770 | } | |
5771 | ||
7afe21cc RK |
5772 | return 0; |
5773 | } | |
5774 | \f | |
5775 | /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a fixed-point | |
5776 | number, return an rtx (MEM, SUBREG, or CONST_INT) that refers to the | |
5777 | least-significant part of X. | |
5778 | MODE specifies how big a part of X to return. | |
5779 | ||
5780 | If the requested operation cannot be done, 0 is returned. | |
5781 | ||
5782 | This is similar to gen_lowpart in emit-rtl.c. */ | |
5783 | ||
5784 | rtx | |
5785 | gen_lowpart_if_possible (mode, x) | |
5786 | enum machine_mode mode; | |
5787 | register rtx x; | |
5788 | { | |
5789 | rtx result = gen_lowpart_common (mode, x); | |
5790 | ||
5791 | if (result) | |
5792 | return result; | |
5793 | else if (GET_CODE (x) == MEM) | |
5794 | { | |
5795 | /* This is the only other case we handle. */ | |
5796 | register int offset = 0; | |
5797 | rtx new; | |
5798 | ||
f76b9db2 ILT |
5799 | if (WORDS_BIG_ENDIAN) |
5800 | offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD) | |
5801 | - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD)); | |
5802 | if (BYTES_BIG_ENDIAN) | |
5803 | /* Adjust the address so that the address-after-the-data is | |
5804 | unchanged. */ | |
5805 | offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode)) | |
5806 | - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x)))); | |
7afe21cc RK |
5807 | new = gen_rtx (MEM, mode, plus_constant (XEXP (x, 0), offset)); |
5808 | if (! memory_address_p (mode, XEXP (new, 0))) | |
5809 | return 0; | |
5810 | MEM_VOLATILE_P (new) = MEM_VOLATILE_P (x); | |
5811 | RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (x); | |
5812 | MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (x); | |
5813 | return new; | |
5814 | } | |
5815 | else | |
5816 | return 0; | |
5817 | } | |
5818 | \f | |
5819 | /* Given INSN, a jump insn, TAKEN indicates if we are following the "taken" | |
5820 | branch. It will be zero if not. | |
5821 | ||
5822 | In certain cases, this can cause us to add an equivalence. For example, | |
5823 | if we are following the taken case of | |
5824 | if (i == 2) | |
5825 | we can add the fact that `i' and '2' are now equivalent. | |
5826 | ||
5827 | In any case, we can record that this comparison was passed. If the same | |
5828 | comparison is seen later, we will know its value. */ | |
5829 | ||
5830 | static void | |
5831 | record_jump_equiv (insn, taken) | |
5832 | rtx insn; | |
5833 | int taken; | |
5834 | { | |
5835 | int cond_known_true; | |
5836 | rtx op0, op1; | |
13c9910f | 5837 | enum machine_mode mode, mode0, mode1; |
7afe21cc RK |
5838 | int reversed_nonequality = 0; |
5839 | enum rtx_code code; | |
5840 | ||
5841 | /* Ensure this is the right kind of insn. */ | |
5842 | if (! condjump_p (insn) || simplejump_p (insn)) | |
5843 | return; | |
5844 | ||
5845 | /* See if this jump condition is known true or false. */ | |
5846 | if (taken) | |
5847 | cond_known_true = (XEXP (SET_SRC (PATTERN (insn)), 2) == pc_rtx); | |
5848 | else | |
5849 | cond_known_true = (XEXP (SET_SRC (PATTERN (insn)), 1) == pc_rtx); | |
5850 | ||
5851 | /* Get the type of comparison being done and the operands being compared. | |
5852 | If we had to reverse a non-equality condition, record that fact so we | |
5853 | know that it isn't valid for floating-point. */ | |
5854 | code = GET_CODE (XEXP (SET_SRC (PATTERN (insn)), 0)); | |
5855 | op0 = fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn)), 0), 0), insn); | |
5856 | op1 = fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn)), 0), 1), insn); | |
5857 | ||
13c9910f | 5858 | code = find_comparison_args (code, &op0, &op1, &mode0, &mode1); |
7afe21cc RK |
5859 | if (! cond_known_true) |
5860 | { | |
5861 | reversed_nonequality = (code != EQ && code != NE); | |
5862 | code = reverse_condition (code); | |
5863 | } | |
5864 | ||
5865 | /* The mode is the mode of the non-constant. */ | |
13c9910f RS |
5866 | mode = mode0; |
5867 | if (mode1 != VOIDmode) | |
5868 | mode = mode1; | |
7afe21cc RK |
5869 | |
5870 | record_jump_cond (code, mode, op0, op1, reversed_nonequality); | |
5871 | } | |
5872 | ||
5873 | /* We know that comparison CODE applied to OP0 and OP1 in MODE is true. | |
5874 | REVERSED_NONEQUALITY is nonzero if CODE had to be swapped. | |
5875 | Make any useful entries we can with that information. Called from | |
5876 | above function and called recursively. */ | |
5877 | ||
5878 | static void | |
5879 | record_jump_cond (code, mode, op0, op1, reversed_nonequality) | |
5880 | enum rtx_code code; | |
5881 | enum machine_mode mode; | |
5882 | rtx op0, op1; | |
5883 | int reversed_nonequality; | |
5884 | { | |
2197a88a | 5885 | unsigned op0_hash, op1_hash; |
7afe21cc RK |
5886 | int op0_in_memory, op0_in_struct, op1_in_memory, op1_in_struct; |
5887 | struct table_elt *op0_elt, *op1_elt; | |
5888 | ||
5889 | /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG, | |
5890 | we know that they are also equal in the smaller mode (this is also | |
5891 | true for all smaller modes whether or not there is a SUBREG, but | |
5892 | is not worth testing for with no SUBREG. */ | |
5893 | ||
2e794ee8 | 5894 | /* Note that GET_MODE (op0) may not equal MODE. */ |
7afe21cc | 5895 | if (code == EQ && GET_CODE (op0) == SUBREG |
2e794ee8 RS |
5896 | && (GET_MODE_SIZE (GET_MODE (op0)) |
5897 | > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0))))) | |
7afe21cc RK |
5898 | { |
5899 | enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0)); | |
5900 | rtx tem = gen_lowpart_if_possible (inner_mode, op1); | |
5901 | ||
5902 | record_jump_cond (code, mode, SUBREG_REG (op0), | |
5903 | tem ? tem : gen_rtx (SUBREG, inner_mode, op1, 0), | |
5904 | reversed_nonequality); | |
5905 | } | |
5906 | ||
5907 | if (code == EQ && GET_CODE (op1) == SUBREG | |
2e794ee8 RS |
5908 | && (GET_MODE_SIZE (GET_MODE (op1)) |
5909 | > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1))))) | |
7afe21cc RK |
5910 | { |
5911 | enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1)); | |
5912 | rtx tem = gen_lowpart_if_possible (inner_mode, op0); | |
5913 | ||
5914 | record_jump_cond (code, mode, SUBREG_REG (op1), | |
5915 | tem ? tem : gen_rtx (SUBREG, inner_mode, op0, 0), | |
5916 | reversed_nonequality); | |
5917 | } | |
5918 | ||
5919 | /* Similarly, if this is an NE comparison, and either is a SUBREG | |
5920 | making a smaller mode, we know the whole thing is also NE. */ | |
5921 | ||
2e794ee8 RS |
5922 | /* Note that GET_MODE (op0) may not equal MODE; |
5923 | if we test MODE instead, we can get an infinite recursion | |
5924 | alternating between two modes each wider than MODE. */ | |
5925 | ||
7afe21cc RK |
5926 | if (code == NE && GET_CODE (op0) == SUBREG |
5927 | && subreg_lowpart_p (op0) | |
2e794ee8 RS |
5928 | && (GET_MODE_SIZE (GET_MODE (op0)) |
5929 | < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0))))) | |
7afe21cc RK |
5930 | { |
5931 | enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0)); | |
5932 | rtx tem = gen_lowpart_if_possible (inner_mode, op1); | |
5933 | ||
5934 | record_jump_cond (code, mode, SUBREG_REG (op0), | |
5935 | tem ? tem : gen_rtx (SUBREG, inner_mode, op1, 0), | |
5936 | reversed_nonequality); | |
5937 | } | |
5938 | ||
5939 | if (code == NE && GET_CODE (op1) == SUBREG | |
5940 | && subreg_lowpart_p (op1) | |
2e794ee8 RS |
5941 | && (GET_MODE_SIZE (GET_MODE (op1)) |
5942 | < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1))))) | |
7afe21cc RK |
5943 | { |
5944 | enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1)); | |
5945 | rtx tem = gen_lowpart_if_possible (inner_mode, op0); | |
5946 | ||
5947 | record_jump_cond (code, mode, SUBREG_REG (op1), | |
5948 | tem ? tem : gen_rtx (SUBREG, inner_mode, op0, 0), | |
5949 | reversed_nonequality); | |
5950 | } | |
5951 | ||
5952 | /* Hash both operands. */ | |
5953 | ||
5954 | do_not_record = 0; | |
5955 | hash_arg_in_memory = 0; | |
5956 | hash_arg_in_struct = 0; | |
2197a88a | 5957 | op0_hash = HASH (op0, mode); |
7afe21cc RK |
5958 | op0_in_memory = hash_arg_in_memory; |
5959 | op0_in_struct = hash_arg_in_struct; | |
5960 | ||
5961 | if (do_not_record) | |
5962 | return; | |
5963 | ||
5964 | do_not_record = 0; | |
5965 | hash_arg_in_memory = 0; | |
5966 | hash_arg_in_struct = 0; | |
2197a88a | 5967 | op1_hash = HASH (op1, mode); |
7afe21cc RK |
5968 | op1_in_memory = hash_arg_in_memory; |
5969 | op1_in_struct = hash_arg_in_struct; | |
5970 | ||
5971 | if (do_not_record) | |
5972 | return; | |
5973 | ||
5974 | /* Look up both operands. */ | |
2197a88a RK |
5975 | op0_elt = lookup (op0, op0_hash, mode); |
5976 | op1_elt = lookup (op1, op1_hash, mode); | |
7afe21cc | 5977 | |
af3869c1 RK |
5978 | /* If both operands are already equivalent or if they are not in the |
5979 | table but are identical, do nothing. */ | |
5980 | if ((op0_elt != 0 && op1_elt != 0 | |
5981 | && op0_elt->first_same_value == op1_elt->first_same_value) | |
5982 | || op0 == op1 || rtx_equal_p (op0, op1)) | |
5983 | return; | |
5984 | ||
7afe21cc | 5985 | /* If we aren't setting two things equal all we can do is save this |
b2796a4b RK |
5986 | comparison. Similarly if this is floating-point. In the latter |
5987 | case, OP1 might be zero and both -0.0 and 0.0 are equal to it. | |
5988 | If we record the equality, we might inadvertently delete code | |
5989 | whose intent was to change -0 to +0. */ | |
5990 | ||
cbf6a543 | 5991 | if (code != EQ || FLOAT_MODE_P (GET_MODE (op0))) |
7afe21cc RK |
5992 | { |
5993 | /* If we reversed a floating-point comparison, if OP0 is not a | |
5994 | register, or if OP1 is neither a register or constant, we can't | |
5995 | do anything. */ | |
5996 | ||
5997 | if (GET_CODE (op1) != REG) | |
5998 | op1 = equiv_constant (op1); | |
5999 | ||
cbf6a543 | 6000 | if ((reversed_nonequality && FLOAT_MODE_P (mode)) |
7afe21cc RK |
6001 | || GET_CODE (op0) != REG || op1 == 0) |
6002 | return; | |
6003 | ||
6004 | /* Put OP0 in the hash table if it isn't already. This gives it a | |
6005 | new quantity number. */ | |
6006 | if (op0_elt == 0) | |
6007 | { | |
906c4e36 | 6008 | if (insert_regs (op0, NULL_PTR, 0)) |
7afe21cc RK |
6009 | { |
6010 | rehash_using_reg (op0); | |
2197a88a | 6011 | op0_hash = HASH (op0, mode); |
2bb81c86 RK |
6012 | |
6013 | /* If OP0 is contained in OP1, this changes its hash code | |
6014 | as well. Faster to rehash than to check, except | |
6015 | for the simple case of a constant. */ | |
6016 | if (! CONSTANT_P (op1)) | |
2197a88a | 6017 | op1_hash = HASH (op1,mode); |
7afe21cc RK |
6018 | } |
6019 | ||
2197a88a | 6020 | op0_elt = insert (op0, NULL_PTR, op0_hash, mode); |
7afe21cc RK |
6021 | op0_elt->in_memory = op0_in_memory; |
6022 | op0_elt->in_struct = op0_in_struct; | |
6023 | } | |
6024 | ||
6025 | qty_comparison_code[reg_qty[REGNO (op0)]] = code; | |
6026 | if (GET_CODE (op1) == REG) | |
6027 | { | |
5d5ea909 | 6028 | /* Look it up again--in case op0 and op1 are the same. */ |
2197a88a | 6029 | op1_elt = lookup (op1, op1_hash, mode); |
5d5ea909 | 6030 | |
7afe21cc RK |
6031 | /* Put OP1 in the hash table so it gets a new quantity number. */ |
6032 | if (op1_elt == 0) | |
6033 | { | |
906c4e36 | 6034 | if (insert_regs (op1, NULL_PTR, 0)) |
7afe21cc RK |
6035 | { |
6036 | rehash_using_reg (op1); | |
2197a88a | 6037 | op1_hash = HASH (op1, mode); |
7afe21cc RK |
6038 | } |
6039 | ||
2197a88a | 6040 | op1_elt = insert (op1, NULL_PTR, op1_hash, mode); |
7afe21cc RK |
6041 | op1_elt->in_memory = op1_in_memory; |
6042 | op1_elt->in_struct = op1_in_struct; | |
6043 | } | |
6044 | ||
6045 | qty_comparison_qty[reg_qty[REGNO (op0)]] = reg_qty[REGNO (op1)]; | |
6046 | qty_comparison_const[reg_qty[REGNO (op0)]] = 0; | |
6047 | } | |
6048 | else | |
6049 | { | |
6050 | qty_comparison_qty[reg_qty[REGNO (op0)]] = -1; | |
6051 | qty_comparison_const[reg_qty[REGNO (op0)]] = op1; | |
6052 | } | |
6053 | ||
6054 | return; | |
6055 | } | |
6056 | ||
eb5ad42a RS |
6057 | /* If either side is still missing an equivalence, make it now, |
6058 | then merge the equivalences. */ | |
7afe21cc | 6059 | |
7afe21cc RK |
6060 | if (op0_elt == 0) |
6061 | { | |
eb5ad42a | 6062 | if (insert_regs (op0, NULL_PTR, 0)) |
7afe21cc RK |
6063 | { |
6064 | rehash_using_reg (op0); | |
2197a88a | 6065 | op0_hash = HASH (op0, mode); |
7afe21cc RK |
6066 | } |
6067 | ||
2197a88a | 6068 | op0_elt = insert (op0, NULL_PTR, op0_hash, mode); |
7afe21cc RK |
6069 | op0_elt->in_memory = op0_in_memory; |
6070 | op0_elt->in_struct = op0_in_struct; | |
7afe21cc RK |
6071 | } |
6072 | ||
6073 | if (op1_elt == 0) | |
6074 | { | |
eb5ad42a | 6075 | if (insert_regs (op1, NULL_PTR, 0)) |
7afe21cc RK |
6076 | { |
6077 | rehash_using_reg (op1); | |
2197a88a | 6078 | op1_hash = HASH (op1, mode); |
7afe21cc RK |
6079 | } |
6080 | ||
2197a88a | 6081 | op1_elt = insert (op1, NULL_PTR, op1_hash, mode); |
7afe21cc RK |
6082 | op1_elt->in_memory = op1_in_memory; |
6083 | op1_elt->in_struct = op1_in_struct; | |
7afe21cc | 6084 | } |
eb5ad42a RS |
6085 | |
6086 | merge_equiv_classes (op0_elt, op1_elt); | |
6087 | last_jump_equiv_class = op0_elt; | |
7afe21cc RK |
6088 | } |
6089 | \f | |
6090 | /* CSE processing for one instruction. | |
6091 | First simplify sources and addresses of all assignments | |
6092 | in the instruction, using previously-computed equivalents values. | |
6093 | Then install the new sources and destinations in the table | |
6094 | of available values. | |
6095 | ||
6096 | If IN_LIBCALL_BLOCK is nonzero, don't record any equivalence made in | |
6097 | the insn. */ | |
6098 | ||
6099 | /* Data on one SET contained in the instruction. */ | |
6100 | ||
6101 | struct set | |
6102 | { | |
6103 | /* The SET rtx itself. */ | |
6104 | rtx rtl; | |
6105 | /* The SET_SRC of the rtx (the original value, if it is changing). */ | |
6106 | rtx src; | |
6107 | /* The hash-table element for the SET_SRC of the SET. */ | |
6108 | struct table_elt *src_elt; | |
2197a88a RK |
6109 | /* Hash value for the SET_SRC. */ |
6110 | unsigned src_hash; | |
6111 | /* Hash value for the SET_DEST. */ | |
6112 | unsigned dest_hash; | |
7afe21cc RK |
6113 | /* The SET_DEST, with SUBREG, etc., stripped. */ |
6114 | rtx inner_dest; | |
6115 | /* Place where the pointer to the INNER_DEST was found. */ | |
6116 | rtx *inner_dest_loc; | |
6117 | /* Nonzero if the SET_SRC is in memory. */ | |
6118 | char src_in_memory; | |
6119 | /* Nonzero if the SET_SRC is in a structure. */ | |
6120 | char src_in_struct; | |
6121 | /* Nonzero if the SET_SRC contains something | |
6122 | whose value cannot be predicted and understood. */ | |
6123 | char src_volatile; | |
6124 | /* Original machine mode, in case it becomes a CONST_INT. */ | |
6125 | enum machine_mode mode; | |
6126 | /* A constant equivalent for SET_SRC, if any. */ | |
6127 | rtx src_const; | |
2197a88a RK |
6128 | /* Hash value of constant equivalent for SET_SRC. */ |
6129 | unsigned src_const_hash; | |
7afe21cc RK |
6130 | /* Table entry for constant equivalent for SET_SRC, if any. */ |
6131 | struct table_elt *src_const_elt; | |
6132 | }; | |
6133 | ||
6134 | static void | |
6135 | cse_insn (insn, in_libcall_block) | |
6136 | rtx insn; | |
6137 | int in_libcall_block; | |
6138 | { | |
6139 | register rtx x = PATTERN (insn); | |
7afe21cc | 6140 | register int i; |
92f9aa51 | 6141 | rtx tem; |
7afe21cc RK |
6142 | register int n_sets = 0; |
6143 | ||
6144 | /* Records what this insn does to set CC0. */ | |
6145 | rtx this_insn_cc0 = 0; | |
6146 | enum machine_mode this_insn_cc0_mode; | |
6147 | struct write_data writes_memory; | |
6148 | static struct write_data init = {0, 0, 0, 0}; | |
6149 | ||
6150 | rtx src_eqv = 0; | |
6151 | struct table_elt *src_eqv_elt = 0; | |
6152 | int src_eqv_volatile; | |
6153 | int src_eqv_in_memory; | |
6154 | int src_eqv_in_struct; | |
2197a88a | 6155 | unsigned src_eqv_hash; |
7afe21cc RK |
6156 | |
6157 | struct set *sets; | |
6158 | ||
6159 | this_insn = insn; | |
6160 | writes_memory = init; | |
6161 | ||
6162 | /* Find all the SETs and CLOBBERs in this instruction. | |
6163 | Record all the SETs in the array `set' and count them. | |
6164 | Also determine whether there is a CLOBBER that invalidates | |
6165 | all memory references, or all references at varying addresses. */ | |
6166 | ||
f1e7c95f RK |
6167 | if (GET_CODE (insn) == CALL_INSN) |
6168 | { | |
6169 | for (tem = CALL_INSN_FUNCTION_USAGE (insn); tem; tem = XEXP (tem, 1)) | |
6170 | if (GET_CODE (XEXP (tem, 0)) == CLOBBER) | |
bb4034b3 | 6171 | invalidate (SET_DEST (XEXP (tem, 0)), VOIDmode); |
f1e7c95f RK |
6172 | } |
6173 | ||
7afe21cc RK |
6174 | if (GET_CODE (x) == SET) |
6175 | { | |
6176 | sets = (struct set *) alloca (sizeof (struct set)); | |
6177 | sets[0].rtl = x; | |
6178 | ||
6179 | /* Ignore SETs that are unconditional jumps. | |
6180 | They never need cse processing, so this does not hurt. | |
6181 | The reason is not efficiency but rather | |
6182 | so that we can test at the end for instructions | |
6183 | that have been simplified to unconditional jumps | |
6184 | and not be misled by unchanged instructions | |
6185 | that were unconditional jumps to begin with. */ | |
6186 | if (SET_DEST (x) == pc_rtx | |
6187 | && GET_CODE (SET_SRC (x)) == LABEL_REF) | |
6188 | ; | |
6189 | ||
6190 | /* Don't count call-insns, (set (reg 0) (call ...)), as a set. | |
6191 | The hard function value register is used only once, to copy to | |
6192 | someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)! | |
6193 | Ensure we invalidate the destination register. On the 80386 no | |
7722328e | 6194 | other code would invalidate it since it is a fixed_reg. |
0f41302f | 6195 | We need not check the return of apply_change_group; see canon_reg. */ |
7afe21cc RK |
6196 | |
6197 | else if (GET_CODE (SET_SRC (x)) == CALL) | |
6198 | { | |
6199 | canon_reg (SET_SRC (x), insn); | |
77fa0940 | 6200 | apply_change_group (); |
7afe21cc | 6201 | fold_rtx (SET_SRC (x), insn); |
bb4034b3 | 6202 | invalidate (SET_DEST (x), VOIDmode); |
7afe21cc RK |
6203 | } |
6204 | else | |
6205 | n_sets = 1; | |
6206 | } | |
6207 | else if (GET_CODE (x) == PARALLEL) | |
6208 | { | |
6209 | register int lim = XVECLEN (x, 0); | |
6210 | ||
6211 | sets = (struct set *) alloca (lim * sizeof (struct set)); | |
6212 | ||
6213 | /* Find all regs explicitly clobbered in this insn, | |
6214 | and ensure they are not replaced with any other regs | |
6215 | elsewhere in this insn. | |
6216 | When a reg that is clobbered is also used for input, | |
6217 | we should presume that that is for a reason, | |
6218 | and we should not substitute some other register | |
6219 | which is not supposed to be clobbered. | |
6220 | Therefore, this loop cannot be merged into the one below | |
830a38ee | 6221 | because a CALL may precede a CLOBBER and refer to the |
7afe21cc RK |
6222 | value clobbered. We must not let a canonicalization do |
6223 | anything in that case. */ | |
6224 | for (i = 0; i < lim; i++) | |
6225 | { | |
6226 | register rtx y = XVECEXP (x, 0, i); | |
2708da92 RS |
6227 | if (GET_CODE (y) == CLOBBER) |
6228 | { | |
6229 | rtx clobbered = XEXP (y, 0); | |
6230 | ||
6231 | if (GET_CODE (clobbered) == REG | |
6232 | || GET_CODE (clobbered) == SUBREG) | |
bb4034b3 | 6233 | invalidate (clobbered, VOIDmode); |
2708da92 RS |
6234 | else if (GET_CODE (clobbered) == STRICT_LOW_PART |
6235 | || GET_CODE (clobbered) == ZERO_EXTRACT) | |
bb4034b3 | 6236 | invalidate (XEXP (clobbered, 0), GET_MODE (clobbered)); |
2708da92 | 6237 | } |
7afe21cc RK |
6238 | } |
6239 | ||
6240 | for (i = 0; i < lim; i++) | |
6241 | { | |
6242 | register rtx y = XVECEXP (x, 0, i); | |
6243 | if (GET_CODE (y) == SET) | |
6244 | { | |
7722328e RK |
6245 | /* As above, we ignore unconditional jumps and call-insns and |
6246 | ignore the result of apply_change_group. */ | |
7afe21cc RK |
6247 | if (GET_CODE (SET_SRC (y)) == CALL) |
6248 | { | |
6249 | canon_reg (SET_SRC (y), insn); | |
77fa0940 | 6250 | apply_change_group (); |
7afe21cc | 6251 | fold_rtx (SET_SRC (y), insn); |
bb4034b3 | 6252 | invalidate (SET_DEST (y), VOIDmode); |
7afe21cc RK |
6253 | } |
6254 | else if (SET_DEST (y) == pc_rtx | |
6255 | && GET_CODE (SET_SRC (y)) == LABEL_REF) | |
6256 | ; | |
6257 | else | |
6258 | sets[n_sets++].rtl = y; | |
6259 | } | |
6260 | else if (GET_CODE (y) == CLOBBER) | |
6261 | { | |
6262 | /* If we clobber memory, take note of that, | |
6263 | and canon the address. | |
6264 | This does nothing when a register is clobbered | |
6265 | because we have already invalidated the reg. */ | |
6266 | if (GET_CODE (XEXP (y, 0)) == MEM) | |
6267 | { | |
906c4e36 | 6268 | canon_reg (XEXP (y, 0), NULL_RTX); |
7afe21cc RK |
6269 | note_mem_written (XEXP (y, 0), &writes_memory); |
6270 | } | |
6271 | } | |
6272 | else if (GET_CODE (y) == USE | |
6273 | && ! (GET_CODE (XEXP (y, 0)) == REG | |
6274 | && REGNO (XEXP (y, 0)) < FIRST_PSEUDO_REGISTER)) | |
906c4e36 | 6275 | canon_reg (y, NULL_RTX); |
7afe21cc RK |
6276 | else if (GET_CODE (y) == CALL) |
6277 | { | |
7722328e RK |
6278 | /* The result of apply_change_group can be ignored; see |
6279 | canon_reg. */ | |
7afe21cc | 6280 | canon_reg (y, insn); |
77fa0940 | 6281 | apply_change_group (); |
7afe21cc RK |
6282 | fold_rtx (y, insn); |
6283 | } | |
6284 | } | |
6285 | } | |
6286 | else if (GET_CODE (x) == CLOBBER) | |
6287 | { | |
6288 | if (GET_CODE (XEXP (x, 0)) == MEM) | |
6289 | { | |
906c4e36 | 6290 | canon_reg (XEXP (x, 0), NULL_RTX); |
7afe21cc RK |
6291 | note_mem_written (XEXP (x, 0), &writes_memory); |
6292 | } | |
6293 | } | |
6294 | ||
6295 | /* Canonicalize a USE of a pseudo register or memory location. */ | |
6296 | else if (GET_CODE (x) == USE | |
6297 | && ! (GET_CODE (XEXP (x, 0)) == REG | |
6298 | && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)) | |
906c4e36 | 6299 | canon_reg (XEXP (x, 0), NULL_RTX); |
7afe21cc RK |
6300 | else if (GET_CODE (x) == CALL) |
6301 | { | |
7722328e | 6302 | /* The result of apply_change_group can be ignored; see canon_reg. */ |
7afe21cc | 6303 | canon_reg (x, insn); |
77fa0940 | 6304 | apply_change_group (); |
7afe21cc RK |
6305 | fold_rtx (x, insn); |
6306 | } | |
6307 | ||
7b3ab05e JW |
6308 | /* Store the equivalent value in SRC_EQV, if different, or if the DEST |
6309 | is a STRICT_LOW_PART. The latter condition is necessary because SRC_EQV | |
6310 | is handled specially for this case, and if it isn't set, then there will | |
9faa82d8 | 6311 | be no equivalence for the destination. */ |
92f9aa51 RK |
6312 | if (n_sets == 1 && REG_NOTES (insn) != 0 |
6313 | && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0 | |
7b3ab05e JW |
6314 | && (! rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl)) |
6315 | || GET_CODE (SET_DEST (sets[0].rtl)) == STRICT_LOW_PART)) | |
92f9aa51 | 6316 | src_eqv = canon_reg (XEXP (tem, 0), NULL_RTX); |
7afe21cc RK |
6317 | |
6318 | /* Canonicalize sources and addresses of destinations. | |
6319 | We do this in a separate pass to avoid problems when a MATCH_DUP is | |
6320 | present in the insn pattern. In that case, we want to ensure that | |
6321 | we don't break the duplicate nature of the pattern. So we will replace | |
6322 | both operands at the same time. Otherwise, we would fail to find an | |
6323 | equivalent substitution in the loop calling validate_change below. | |
7afe21cc RK |
6324 | |
6325 | We used to suppress canonicalization of DEST if it appears in SRC, | |
77fa0940 | 6326 | but we don't do this any more. */ |
7afe21cc RK |
6327 | |
6328 | for (i = 0; i < n_sets; i++) | |
6329 | { | |
6330 | rtx dest = SET_DEST (sets[i].rtl); | |
6331 | rtx src = SET_SRC (sets[i].rtl); | |
6332 | rtx new = canon_reg (src, insn); | |
58873255 | 6333 | int insn_code; |
7afe21cc | 6334 | |
77fa0940 RK |
6335 | if ((GET_CODE (new) == REG && GET_CODE (src) == REG |
6336 | && ((REGNO (new) < FIRST_PSEUDO_REGISTER) | |
6337 | != (REGNO (src) < FIRST_PSEUDO_REGISTER))) | |
58873255 RK |
6338 | || (insn_code = recog_memoized (insn)) < 0 |
6339 | || insn_n_dups[insn_code] > 0) | |
77fa0940 | 6340 | validate_change (insn, &SET_SRC (sets[i].rtl), new, 1); |
7afe21cc RK |
6341 | else |
6342 | SET_SRC (sets[i].rtl) = new; | |
6343 | ||
6344 | if (GET_CODE (dest) == ZERO_EXTRACT || GET_CODE (dest) == SIGN_EXTRACT) | |
6345 | { | |
6346 | validate_change (insn, &XEXP (dest, 1), | |
77fa0940 | 6347 | canon_reg (XEXP (dest, 1), insn), 1); |
7afe21cc | 6348 | validate_change (insn, &XEXP (dest, 2), |
77fa0940 | 6349 | canon_reg (XEXP (dest, 2), insn), 1); |
7afe21cc RK |
6350 | } |
6351 | ||
6352 | while (GET_CODE (dest) == SUBREG || GET_CODE (dest) == STRICT_LOW_PART | |
6353 | || GET_CODE (dest) == ZERO_EXTRACT | |
6354 | || GET_CODE (dest) == SIGN_EXTRACT) | |
6355 | dest = XEXP (dest, 0); | |
6356 | ||
6357 | if (GET_CODE (dest) == MEM) | |
6358 | canon_reg (dest, insn); | |
6359 | } | |
6360 | ||
77fa0940 RK |
6361 | /* Now that we have done all the replacements, we can apply the change |
6362 | group and see if they all work. Note that this will cause some | |
6363 | canonicalizations that would have worked individually not to be applied | |
6364 | because some other canonicalization didn't work, but this should not | |
7722328e RK |
6365 | occur often. |
6366 | ||
6367 | The result of apply_change_group can be ignored; see canon_reg. */ | |
77fa0940 RK |
6368 | |
6369 | apply_change_group (); | |
6370 | ||
7afe21cc RK |
6371 | /* Set sets[i].src_elt to the class each source belongs to. |
6372 | Detect assignments from or to volatile things | |
6373 | and set set[i] to zero so they will be ignored | |
6374 | in the rest of this function. | |
6375 | ||
6376 | Nothing in this loop changes the hash table or the register chains. */ | |
6377 | ||
6378 | for (i = 0; i < n_sets; i++) | |
6379 | { | |
6380 | register rtx src, dest; | |
6381 | register rtx src_folded; | |
6382 | register struct table_elt *elt = 0, *p; | |
6383 | enum machine_mode mode; | |
6384 | rtx src_eqv_here; | |
6385 | rtx src_const = 0; | |
6386 | rtx src_related = 0; | |
6387 | struct table_elt *src_const_elt = 0; | |
6388 | int src_cost = 10000, src_eqv_cost = 10000, src_folded_cost = 10000; | |
6389 | int src_related_cost = 10000, src_elt_cost = 10000; | |
6390 | /* Set non-zero if we need to call force_const_mem on with the | |
6391 | contents of src_folded before using it. */ | |
6392 | int src_folded_force_flag = 0; | |
6393 | ||
6394 | dest = SET_DEST (sets[i].rtl); | |
6395 | src = SET_SRC (sets[i].rtl); | |
6396 | ||
6397 | /* If SRC is a constant that has no machine mode, | |
6398 | hash it with the destination's machine mode. | |
6399 | This way we can keep different modes separate. */ | |
6400 | ||
6401 | mode = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src); | |
6402 | sets[i].mode = mode; | |
6403 | ||
6404 | if (src_eqv) | |
6405 | { | |
6406 | enum machine_mode eqvmode = mode; | |
6407 | if (GET_CODE (dest) == STRICT_LOW_PART) | |
6408 | eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0))); | |
6409 | do_not_record = 0; | |
6410 | hash_arg_in_memory = 0; | |
6411 | hash_arg_in_struct = 0; | |
6412 | src_eqv = fold_rtx (src_eqv, insn); | |
2197a88a | 6413 | src_eqv_hash = HASH (src_eqv, eqvmode); |
7afe21cc RK |
6414 | |
6415 | /* Find the equivalence class for the equivalent expression. */ | |
6416 | ||
6417 | if (!do_not_record) | |
2197a88a | 6418 | src_eqv_elt = lookup (src_eqv, src_eqv_hash, eqvmode); |
7afe21cc RK |
6419 | |
6420 | src_eqv_volatile = do_not_record; | |
6421 | src_eqv_in_memory = hash_arg_in_memory; | |
6422 | src_eqv_in_struct = hash_arg_in_struct; | |
6423 | } | |
6424 | ||
6425 | /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the | |
6426 | value of the INNER register, not the destination. So it is not | |
3826a3da | 6427 | a valid substitution for the source. But save it for later. */ |
7afe21cc RK |
6428 | if (GET_CODE (dest) == STRICT_LOW_PART) |
6429 | src_eqv_here = 0; | |
6430 | else | |
6431 | src_eqv_here = src_eqv; | |
6432 | ||
6433 | /* Simplify and foldable subexpressions in SRC. Then get the fully- | |
6434 | simplified result, which may not necessarily be valid. */ | |
6435 | src_folded = fold_rtx (src, insn); | |
6436 | ||
e6a125a0 RK |
6437 | #if 0 |
6438 | /* ??? This caused bad code to be generated for the m68k port with -O2. | |
6439 | Suppose src is (CONST_INT -1), and that after truncation src_folded | |
6440 | is (CONST_INT 3). Suppose src_folded is then used for src_const. | |
6441 | At the end we will add src and src_const to the same equivalence | |
6442 | class. We now have 3 and -1 on the same equivalence class. This | |
6443 | causes later instructions to be mis-optimized. */ | |
7afe21cc RK |
6444 | /* If storing a constant in a bitfield, pre-truncate the constant |
6445 | so we will be able to record it later. */ | |
6446 | if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT | |
6447 | || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT) | |
6448 | { | |
6449 | rtx width = XEXP (SET_DEST (sets[i].rtl), 1); | |
6450 | ||
6451 | if (GET_CODE (src) == CONST_INT | |
6452 | && GET_CODE (width) == CONST_INT | |
906c4e36 RK |
6453 | && INTVAL (width) < HOST_BITS_PER_WIDE_INT |
6454 | && (INTVAL (src) & ((HOST_WIDE_INT) (-1) << INTVAL (width)))) | |
6455 | src_folded | |
6456 | = GEN_INT (INTVAL (src) & (((HOST_WIDE_INT) 1 | |
6457 | << INTVAL (width)) - 1)); | |
7afe21cc | 6458 | } |
e6a125a0 | 6459 | #endif |
7afe21cc RK |
6460 | |
6461 | /* Compute SRC's hash code, and also notice if it | |
6462 | should not be recorded at all. In that case, | |
6463 | prevent any further processing of this assignment. */ | |
6464 | do_not_record = 0; | |
6465 | hash_arg_in_memory = 0; | |
6466 | hash_arg_in_struct = 0; | |
6467 | ||
6468 | sets[i].src = src; | |
2197a88a | 6469 | sets[i].src_hash = HASH (src, mode); |
7afe21cc RK |
6470 | sets[i].src_volatile = do_not_record; |
6471 | sets[i].src_in_memory = hash_arg_in_memory; | |
6472 | sets[i].src_in_struct = hash_arg_in_struct; | |
6473 | ||
0dadecf6 RK |
6474 | #if 0 |
6475 | /* It is no longer clear why we used to do this, but it doesn't | |
6476 | appear to still be needed. So let's try without it since this | |
6477 | code hurts cse'ing widened ops. */ | |
7afe21cc RK |
6478 | /* If source is a perverse subreg (such as QI treated as an SI), |
6479 | treat it as volatile. It may do the work of an SI in one context | |
6480 | where the extra bits are not being used, but cannot replace an SI | |
6481 | in general. */ | |
6482 | if (GET_CODE (src) == SUBREG | |
6483 | && (GET_MODE_SIZE (GET_MODE (src)) | |
6484 | > GET_MODE_SIZE (GET_MODE (SUBREG_REG (src))))) | |
6485 | sets[i].src_volatile = 1; | |
0dadecf6 | 6486 | #endif |
7afe21cc RK |
6487 | |
6488 | /* Locate all possible equivalent forms for SRC. Try to replace | |
6489 | SRC in the insn with each cheaper equivalent. | |
6490 | ||
6491 | We have the following types of equivalents: SRC itself, a folded | |
6492 | version, a value given in a REG_EQUAL note, or a value related | |
6493 | to a constant. | |
6494 | ||
6495 | Each of these equivalents may be part of an additional class | |
6496 | of equivalents (if more than one is in the table, they must be in | |
6497 | the same class; we check for this). | |
6498 | ||
6499 | If the source is volatile, we don't do any table lookups. | |
6500 | ||
6501 | We note any constant equivalent for possible later use in a | |
6502 | REG_NOTE. */ | |
6503 | ||
6504 | if (!sets[i].src_volatile) | |
2197a88a | 6505 | elt = lookup (src, sets[i].src_hash, mode); |
7afe21cc RK |
6506 | |
6507 | sets[i].src_elt = elt; | |
6508 | ||
6509 | if (elt && src_eqv_here && src_eqv_elt) | |
6510 | { | |
6511 | if (elt->first_same_value != src_eqv_elt->first_same_value) | |
6512 | { | |
6513 | /* The REG_EQUAL is indicating that two formerly distinct | |
6514 | classes are now equivalent. So merge them. */ | |
6515 | merge_equiv_classes (elt, src_eqv_elt); | |
2197a88a RK |
6516 | src_eqv_hash = HASH (src_eqv, elt->mode); |
6517 | src_eqv_elt = lookup (src_eqv, src_eqv_hash, elt->mode); | |
7afe21cc RK |
6518 | } |
6519 | ||
6520 | src_eqv_here = 0; | |
6521 | } | |
6522 | ||
6523 | else if (src_eqv_elt) | |
6524 | elt = src_eqv_elt; | |
6525 | ||
6526 | /* Try to find a constant somewhere and record it in `src_const'. | |
6527 | Record its table element, if any, in `src_const_elt'. Look in | |
6528 | any known equivalences first. (If the constant is not in the | |
2197a88a | 6529 | table, also set `sets[i].src_const_hash'). */ |
7afe21cc RK |
6530 | if (elt) |
6531 | for (p = elt->first_same_value; p; p = p->next_same_value) | |
6532 | if (p->is_const) | |
6533 | { | |
6534 | src_const = p->exp; | |
6535 | src_const_elt = elt; | |
6536 | break; | |
6537 | } | |
6538 | ||
6539 | if (src_const == 0 | |
6540 | && (CONSTANT_P (src_folded) | |
6541 | /* Consider (minus (label_ref L1) (label_ref L2)) as | |
6542 | "constant" here so we will record it. This allows us | |
6543 | to fold switch statements when an ADDR_DIFF_VEC is used. */ | |
6544 | || (GET_CODE (src_folded) == MINUS | |
6545 | && GET_CODE (XEXP (src_folded, 0)) == LABEL_REF | |
6546 | && GET_CODE (XEXP (src_folded, 1)) == LABEL_REF))) | |
6547 | src_const = src_folded, src_const_elt = elt; | |
6548 | else if (src_const == 0 && src_eqv_here && CONSTANT_P (src_eqv_here)) | |
6549 | src_const = src_eqv_here, src_const_elt = src_eqv_elt; | |
6550 | ||
6551 | /* If we don't know if the constant is in the table, get its | |
6552 | hash code and look it up. */ | |
6553 | if (src_const && src_const_elt == 0) | |
6554 | { | |
2197a88a RK |
6555 | sets[i].src_const_hash = HASH (src_const, mode); |
6556 | src_const_elt = lookup (src_const, sets[i].src_const_hash, mode); | |
7afe21cc RK |
6557 | } |
6558 | ||
6559 | sets[i].src_const = src_const; | |
6560 | sets[i].src_const_elt = src_const_elt; | |
6561 | ||
6562 | /* If the constant and our source are both in the table, mark them as | |
6563 | equivalent. Otherwise, if a constant is in the table but the source | |
6564 | isn't, set ELT to it. */ | |
6565 | if (src_const_elt && elt | |
6566 | && src_const_elt->first_same_value != elt->first_same_value) | |
6567 | merge_equiv_classes (elt, src_const_elt); | |
6568 | else if (src_const_elt && elt == 0) | |
6569 | elt = src_const_elt; | |
6570 | ||
6571 | /* See if there is a register linearly related to a constant | |
6572 | equivalent of SRC. */ | |
6573 | if (src_const | |
6574 | && (GET_CODE (src_const) == CONST | |
6575 | || (src_const_elt && src_const_elt->related_value != 0))) | |
6576 | { | |
6577 | src_related = use_related_value (src_const, src_const_elt); | |
6578 | if (src_related) | |
6579 | { | |
6580 | struct table_elt *src_related_elt | |
6581 | = lookup (src_related, HASH (src_related, mode), mode); | |
6582 | if (src_related_elt && elt) | |
6583 | { | |
6584 | if (elt->first_same_value | |
6585 | != src_related_elt->first_same_value) | |
6586 | /* This can occur when we previously saw a CONST | |
6587 | involving a SYMBOL_REF and then see the SYMBOL_REF | |
6588 | twice. Merge the involved classes. */ | |
6589 | merge_equiv_classes (elt, src_related_elt); | |
6590 | ||
6591 | src_related = 0; | |
6592 | src_related_elt = 0; | |
6593 | } | |
6594 | else if (src_related_elt && elt == 0) | |
6595 | elt = src_related_elt; | |
6596 | } | |
6597 | } | |
6598 | ||
e4600702 RK |
6599 | /* See if we have a CONST_INT that is already in a register in a |
6600 | wider mode. */ | |
6601 | ||
6602 | if (src_const && src_related == 0 && GET_CODE (src_const) == CONST_INT | |
6603 | && GET_MODE_CLASS (mode) == MODE_INT | |
6604 | && GET_MODE_BITSIZE (mode) < BITS_PER_WORD) | |
6605 | { | |
6606 | enum machine_mode wider_mode; | |
6607 | ||
6608 | for (wider_mode = GET_MODE_WIDER_MODE (mode); | |
6609 | GET_MODE_BITSIZE (wider_mode) <= BITS_PER_WORD | |
6610 | && src_related == 0; | |
6611 | wider_mode = GET_MODE_WIDER_MODE (wider_mode)) | |
6612 | { | |
6613 | struct table_elt *const_elt | |
6614 | = lookup (src_const, HASH (src_const, wider_mode), wider_mode); | |
6615 | ||
6616 | if (const_elt == 0) | |
6617 | continue; | |
6618 | ||
6619 | for (const_elt = const_elt->first_same_value; | |
6620 | const_elt; const_elt = const_elt->next_same_value) | |
6621 | if (GET_CODE (const_elt->exp) == REG) | |
6622 | { | |
6623 | src_related = gen_lowpart_if_possible (mode, | |
6624 | const_elt->exp); | |
6625 | break; | |
6626 | } | |
6627 | } | |
6628 | } | |
6629 | ||
d45cf215 RS |
6630 | /* Another possibility is that we have an AND with a constant in |
6631 | a mode narrower than a word. If so, it might have been generated | |
6632 | as part of an "if" which would narrow the AND. If we already | |
6633 | have done the AND in a wider mode, we can use a SUBREG of that | |
6634 | value. */ | |
6635 | ||
6636 | if (flag_expensive_optimizations && ! src_related | |
6637 | && GET_CODE (src) == AND && GET_CODE (XEXP (src, 1)) == CONST_INT | |
6638 | && GET_MODE_SIZE (mode) < UNITS_PER_WORD) | |
6639 | { | |
6640 | enum machine_mode tmode; | |
906c4e36 | 6641 | rtx new_and = gen_rtx (AND, VOIDmode, NULL_RTX, XEXP (src, 1)); |
d45cf215 RS |
6642 | |
6643 | for (tmode = GET_MODE_WIDER_MODE (mode); | |
6644 | GET_MODE_SIZE (tmode) <= UNITS_PER_WORD; | |
6645 | tmode = GET_MODE_WIDER_MODE (tmode)) | |
6646 | { | |
6647 | rtx inner = gen_lowpart_if_possible (tmode, XEXP (src, 0)); | |
6648 | struct table_elt *larger_elt; | |
6649 | ||
6650 | if (inner) | |
6651 | { | |
6652 | PUT_MODE (new_and, tmode); | |
6653 | XEXP (new_and, 0) = inner; | |
6654 | larger_elt = lookup (new_and, HASH (new_and, tmode), tmode); | |
6655 | if (larger_elt == 0) | |
6656 | continue; | |
6657 | ||
6658 | for (larger_elt = larger_elt->first_same_value; | |
6659 | larger_elt; larger_elt = larger_elt->next_same_value) | |
6660 | if (GET_CODE (larger_elt->exp) == REG) | |
6661 | { | |
6662 | src_related | |
6663 | = gen_lowpart_if_possible (mode, larger_elt->exp); | |
6664 | break; | |
6665 | } | |
6666 | ||
6667 | if (src_related) | |
6668 | break; | |
6669 | } | |
6670 | } | |
6671 | } | |
7bac1be0 RK |
6672 | |
6673 | #ifdef LOAD_EXTEND_OP | |
6674 | /* See if a MEM has already been loaded with a widening operation; | |
6675 | if it has, we can use a subreg of that. Many CISC machines | |
6676 | also have such operations, but this is only likely to be | |
6677 | beneficial these machines. */ | |
6678 | ||
6679 | if (flag_expensive_optimizations && src_related == 0 | |
6680 | && (GET_MODE_SIZE (mode) < UNITS_PER_WORD) | |
6681 | && GET_MODE_CLASS (mode) == MODE_INT | |
6682 | && GET_CODE (src) == MEM && ! do_not_record | |
6683 | && LOAD_EXTEND_OP (mode) != NIL) | |
6684 | { | |
6685 | enum machine_mode tmode; | |
6686 | ||
6687 | /* Set what we are trying to extend and the operation it might | |
6688 | have been extended with. */ | |
6689 | PUT_CODE (memory_extend_rtx, LOAD_EXTEND_OP (mode)); | |
6690 | XEXP (memory_extend_rtx, 0) = src; | |
6691 | ||
6692 | for (tmode = GET_MODE_WIDER_MODE (mode); | |
6693 | GET_MODE_SIZE (tmode) <= UNITS_PER_WORD; | |
6694 | tmode = GET_MODE_WIDER_MODE (tmode)) | |
6695 | { | |
6696 | struct table_elt *larger_elt; | |
6697 | ||
6698 | PUT_MODE (memory_extend_rtx, tmode); | |
6699 | larger_elt = lookup (memory_extend_rtx, | |
6700 | HASH (memory_extend_rtx, tmode), tmode); | |
6701 | if (larger_elt == 0) | |
6702 | continue; | |
6703 | ||
6704 | for (larger_elt = larger_elt->first_same_value; | |
6705 | larger_elt; larger_elt = larger_elt->next_same_value) | |
6706 | if (GET_CODE (larger_elt->exp) == REG) | |
6707 | { | |
6708 | src_related = gen_lowpart_if_possible (mode, | |
6709 | larger_elt->exp); | |
6710 | break; | |
6711 | } | |
6712 | ||
6713 | if (src_related) | |
6714 | break; | |
6715 | } | |
6716 | } | |
6717 | #endif /* LOAD_EXTEND_OP */ | |
6718 | ||
7afe21cc RK |
6719 | if (src == src_folded) |
6720 | src_folded = 0; | |
6721 | ||
6722 | /* At this point, ELT, if non-zero, points to a class of expressions | |
6723 | equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED, | |
6724 | and SRC_RELATED, if non-zero, each contain additional equivalent | |
6725 | expressions. Prune these latter expressions by deleting expressions | |
6726 | already in the equivalence class. | |
6727 | ||
6728 | Check for an equivalent identical to the destination. If found, | |
6729 | this is the preferred equivalent since it will likely lead to | |
6730 | elimination of the insn. Indicate this by placing it in | |
6731 | `src_related'. */ | |
6732 | ||
6733 | if (elt) elt = elt->first_same_value; | |
6734 | for (p = elt; p; p = p->next_same_value) | |
6735 | { | |
6736 | enum rtx_code code = GET_CODE (p->exp); | |
6737 | ||
6738 | /* If the expression is not valid, ignore it. Then we do not | |
6739 | have to check for validity below. In most cases, we can use | |
6740 | `rtx_equal_p', since canonicalization has already been done. */ | |
6741 | if (code != REG && ! exp_equiv_p (p->exp, p->exp, 1, 0)) | |
6742 | continue; | |
6743 | ||
6744 | if (src && GET_CODE (src) == code && rtx_equal_p (src, p->exp)) | |
6745 | src = 0; | |
6746 | else if (src_folded && GET_CODE (src_folded) == code | |
6747 | && rtx_equal_p (src_folded, p->exp)) | |
6748 | src_folded = 0; | |
6749 | else if (src_eqv_here && GET_CODE (src_eqv_here) == code | |
6750 | && rtx_equal_p (src_eqv_here, p->exp)) | |
6751 | src_eqv_here = 0; | |
6752 | else if (src_related && GET_CODE (src_related) == code | |
6753 | && rtx_equal_p (src_related, p->exp)) | |
6754 | src_related = 0; | |
6755 | ||
6756 | /* This is the same as the destination of the insns, we want | |
6757 | to prefer it. Copy it to src_related. The code below will | |
6758 | then give it a negative cost. */ | |
6759 | if (GET_CODE (dest) == code && rtx_equal_p (p->exp, dest)) | |
6760 | src_related = dest; | |
6761 | ||
6762 | } | |
6763 | ||
6764 | /* Find the cheapest valid equivalent, trying all the available | |
6765 | possibilities. Prefer items not in the hash table to ones | |
6766 | that are when they are equal cost. Note that we can never | |
6767 | worsen an insn as the current contents will also succeed. | |
05c33dd8 | 6768 | If we find an equivalent identical to the destination, use it as best, |
0f41302f | 6769 | since this insn will probably be eliminated in that case. */ |
7afe21cc RK |
6770 | if (src) |
6771 | { | |
6772 | if (rtx_equal_p (src, dest)) | |
6773 | src_cost = -1; | |
6774 | else | |
6775 | src_cost = COST (src); | |
6776 | } | |
6777 | ||
6778 | if (src_eqv_here) | |
6779 | { | |
6780 | if (rtx_equal_p (src_eqv_here, dest)) | |
6781 | src_eqv_cost = -1; | |
6782 | else | |
6783 | src_eqv_cost = COST (src_eqv_here); | |
6784 | } | |
6785 | ||
6786 | if (src_folded) | |
6787 | { | |
6788 | if (rtx_equal_p (src_folded, dest)) | |
6789 | src_folded_cost = -1; | |
6790 | else | |
6791 | src_folded_cost = COST (src_folded); | |
6792 | } | |
6793 | ||
6794 | if (src_related) | |
6795 | { | |
6796 | if (rtx_equal_p (src_related, dest)) | |
6797 | src_related_cost = -1; | |
6798 | else | |
6799 | src_related_cost = COST (src_related); | |
6800 | } | |
6801 | ||
6802 | /* If this was an indirect jump insn, a known label will really be | |
6803 | cheaper even though it looks more expensive. */ | |
6804 | if (dest == pc_rtx && src_const && GET_CODE (src_const) == LABEL_REF) | |
6805 | src_folded = src_const, src_folded_cost = -1; | |
6806 | ||
6807 | /* Terminate loop when replacement made. This must terminate since | |
6808 | the current contents will be tested and will always be valid. */ | |
6809 | while (1) | |
6810 | { | |
6811 | rtx trial; | |
6812 | ||
6813 | /* Skip invalid entries. */ | |
6814 | while (elt && GET_CODE (elt->exp) != REG | |
6815 | && ! exp_equiv_p (elt->exp, elt->exp, 1, 0)) | |
6816 | elt = elt->next_same_value; | |
6817 | ||
6818 | if (elt) src_elt_cost = elt->cost; | |
6819 | ||
6820 | /* Find cheapest and skip it for the next time. For items | |
6821 | of equal cost, use this order: | |
6822 | src_folded, src, src_eqv, src_related and hash table entry. */ | |
6823 | if (src_folded_cost <= src_cost | |
6824 | && src_folded_cost <= src_eqv_cost | |
6825 | && src_folded_cost <= src_related_cost | |
6826 | && src_folded_cost <= src_elt_cost) | |
6827 | { | |
6828 | trial = src_folded, src_folded_cost = 10000; | |
6829 | if (src_folded_force_flag) | |
6830 | trial = force_const_mem (mode, trial); | |
6831 | } | |
6832 | else if (src_cost <= src_eqv_cost | |
6833 | && src_cost <= src_related_cost | |
6834 | && src_cost <= src_elt_cost) | |
6835 | trial = src, src_cost = 10000; | |
6836 | else if (src_eqv_cost <= src_related_cost | |
6837 | && src_eqv_cost <= src_elt_cost) | |
0af62b41 | 6838 | trial = copy_rtx (src_eqv_here), src_eqv_cost = 10000; |
7afe21cc | 6839 | else if (src_related_cost <= src_elt_cost) |
0af62b41 | 6840 | trial = copy_rtx (src_related), src_related_cost = 10000; |
7afe21cc RK |
6841 | else |
6842 | { | |
05c33dd8 | 6843 | trial = copy_rtx (elt->exp); |
7afe21cc RK |
6844 | elt = elt->next_same_value; |
6845 | src_elt_cost = 10000; | |
6846 | } | |
6847 | ||
6848 | /* We don't normally have an insn matching (set (pc) (pc)), so | |
6849 | check for this separately here. We will delete such an | |
6850 | insn below. | |
6851 | ||
6852 | Tablejump insns contain a USE of the table, so simply replacing | |
6853 | the operand with the constant won't match. This is simply an | |
6854 | unconditional branch, however, and is therefore valid. Just | |
6855 | insert the substitution here and we will delete and re-emit | |
6856 | the insn later. */ | |
6857 | ||
6858 | if (n_sets == 1 && dest == pc_rtx | |
6859 | && (trial == pc_rtx | |
6860 | || (GET_CODE (trial) == LABEL_REF | |
6861 | && ! condjump_p (insn)))) | |
6862 | { | |
6863 | /* If TRIAL is a label in front of a jump table, we are | |
6864 | really falling through the switch (this is how casesi | |
6865 | insns work), so we must branch around the table. */ | |
6866 | if (GET_CODE (trial) == CODE_LABEL | |
6867 | && NEXT_INSN (trial) != 0 | |
6868 | && GET_CODE (NEXT_INSN (trial)) == JUMP_INSN | |
6869 | && (GET_CODE (PATTERN (NEXT_INSN (trial))) == ADDR_DIFF_VEC | |
6870 | || GET_CODE (PATTERN (NEXT_INSN (trial))) == ADDR_VEC)) | |
6871 | ||
6872 | trial = gen_rtx (LABEL_REF, Pmode, get_label_after (trial)); | |
6873 | ||
6874 | SET_SRC (sets[i].rtl) = trial; | |
44333223 | 6875 | cse_jumps_altered = 1; |
7afe21cc RK |
6876 | break; |
6877 | } | |
6878 | ||
6879 | /* Look for a substitution that makes a valid insn. */ | |
6880 | else if (validate_change (insn, &SET_SRC (sets[i].rtl), trial, 0)) | |
05c33dd8 | 6881 | { |
7722328e RK |
6882 | /* The result of apply_change_group can be ignored; see |
6883 | canon_reg. */ | |
6884 | ||
6885 | validate_change (insn, &SET_SRC (sets[i].rtl), | |
6886 | canon_reg (SET_SRC (sets[i].rtl), insn), | |
6887 | 1); | |
6702af89 | 6888 | apply_change_group (); |
05c33dd8 RK |
6889 | break; |
6890 | } | |
7afe21cc RK |
6891 | |
6892 | /* If we previously found constant pool entries for | |
6893 | constants and this is a constant, try making a | |
6894 | pool entry. Put it in src_folded unless we already have done | |
6895 | this since that is where it likely came from. */ | |
6896 | ||
6897 | else if (constant_pool_entries_cost | |
6898 | && CONSTANT_P (trial) | |
1bbd065b RK |
6899 | && ! (GET_CODE (trial) == CONST |
6900 | && GET_CODE (XEXP (trial, 0)) == TRUNCATE) | |
6901 | && (src_folded == 0 | |
6902 | || (GET_CODE (src_folded) != MEM | |
6903 | && ! src_folded_force_flag)) | |
7afe21cc RK |
6904 | && GET_MODE_CLASS (mode) != MODE_CC) |
6905 | { | |
6906 | src_folded_force_flag = 1; | |
6907 | src_folded = trial; | |
6908 | src_folded_cost = constant_pool_entries_cost; | |
6909 | } | |
6910 | } | |
6911 | ||
6912 | src = SET_SRC (sets[i].rtl); | |
6913 | ||
6914 | /* In general, it is good to have a SET with SET_SRC == SET_DEST. | |
6915 | However, there is an important exception: If both are registers | |
6916 | that are not the head of their equivalence class, replace SET_SRC | |
6917 | with the head of the class. If we do not do this, we will have | |
6918 | both registers live over a portion of the basic block. This way, | |
6919 | their lifetimes will likely abut instead of overlapping. */ | |
6920 | if (GET_CODE (dest) == REG | |
6921 | && REGNO_QTY_VALID_P (REGNO (dest)) | |
6922 | && qty_mode[reg_qty[REGNO (dest)]] == GET_MODE (dest) | |
6923 | && qty_first_reg[reg_qty[REGNO (dest)]] != REGNO (dest) | |
6924 | && GET_CODE (src) == REG && REGNO (src) == REGNO (dest) | |
6925 | /* Don't do this if the original insn had a hard reg as | |
6926 | SET_SRC. */ | |
6927 | && (GET_CODE (sets[i].src) != REG | |
6928 | || REGNO (sets[i].src) >= FIRST_PSEUDO_REGISTER)) | |
6929 | /* We can't call canon_reg here because it won't do anything if | |
6930 | SRC is a hard register. */ | |
6931 | { | |
6932 | int first = qty_first_reg[reg_qty[REGNO (src)]]; | |
6933 | ||
6934 | src = SET_SRC (sets[i].rtl) | |
6935 | = first >= FIRST_PSEUDO_REGISTER ? regno_reg_rtx[first] | |
6936 | : gen_rtx (REG, GET_MODE (src), first); | |
6937 | ||
6938 | /* If we had a constant that is cheaper than what we are now | |
6939 | setting SRC to, use that constant. We ignored it when we | |
6940 | thought we could make this into a no-op. */ | |
6941 | if (src_const && COST (src_const) < COST (src) | |
6942 | && validate_change (insn, &SET_SRC (sets[i].rtl), src_const, 0)) | |
6943 | src = src_const; | |
6944 | } | |
6945 | ||
6946 | /* If we made a change, recompute SRC values. */ | |
6947 | if (src != sets[i].src) | |
6948 | { | |
6949 | do_not_record = 0; | |
6950 | hash_arg_in_memory = 0; | |
6951 | hash_arg_in_struct = 0; | |
6952 | sets[i].src = src; | |
2197a88a | 6953 | sets[i].src_hash = HASH (src, mode); |
7afe21cc RK |
6954 | sets[i].src_volatile = do_not_record; |
6955 | sets[i].src_in_memory = hash_arg_in_memory; | |
6956 | sets[i].src_in_struct = hash_arg_in_struct; | |
2197a88a | 6957 | sets[i].src_elt = lookup (src, sets[i].src_hash, mode); |
7afe21cc RK |
6958 | } |
6959 | ||
6960 | /* If this is a single SET, we are setting a register, and we have an | |
6961 | equivalent constant, we want to add a REG_NOTE. We don't want | |
6962 | to write a REG_EQUAL note for a constant pseudo since verifying that | |
d45cf215 | 6963 | that pseudo hasn't been eliminated is a pain. Such a note also |
7afe21cc RK |
6964 | won't help anything. */ |
6965 | if (n_sets == 1 && src_const && GET_CODE (dest) == REG | |
6966 | && GET_CODE (src_const) != REG) | |
6967 | { | |
92f9aa51 | 6968 | tem = find_reg_note (insn, REG_EQUAL, NULL_RTX); |
7afe21cc RK |
6969 | |
6970 | /* Record the actual constant value in a REG_EQUAL note, making | |
6971 | a new one if one does not already exist. */ | |
6972 | if (tem) | |
6973 | XEXP (tem, 0) = src_const; | |
6974 | else | |
6975 | REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_EQUAL, | |
6976 | src_const, REG_NOTES (insn)); | |
6977 | ||
6978 | /* If storing a constant value in a register that | |
6979 | previously held the constant value 0, | |
6980 | record this fact with a REG_WAS_0 note on this insn. | |
6981 | ||
6982 | Note that the *register* is required to have previously held 0, | |
6983 | not just any register in the quantity and we must point to the | |
6984 | insn that set that register to zero. | |
6985 | ||
6986 | Rather than track each register individually, we just see if | |
6987 | the last set for this quantity was for this register. */ | |
6988 | ||
6989 | if (REGNO_QTY_VALID_P (REGNO (dest)) | |
6990 | && qty_const[reg_qty[REGNO (dest)]] == const0_rtx) | |
6991 | { | |
6992 | /* See if we previously had a REG_WAS_0 note. */ | |
906c4e36 | 6993 | rtx note = find_reg_note (insn, REG_WAS_0, NULL_RTX); |
7afe21cc RK |
6994 | rtx const_insn = qty_const_insn[reg_qty[REGNO (dest)]]; |
6995 | ||
6996 | if ((tem = single_set (const_insn)) != 0 | |
6997 | && rtx_equal_p (SET_DEST (tem), dest)) | |
6998 | { | |
6999 | if (note) | |
7000 | XEXP (note, 0) = const_insn; | |
7001 | else | |
7002 | REG_NOTES (insn) = gen_rtx (INSN_LIST, REG_WAS_0, | |
7003 | const_insn, REG_NOTES (insn)); | |
7004 | } | |
7005 | } | |
7006 | } | |
7007 | ||
7008 | /* Now deal with the destination. */ | |
7009 | do_not_record = 0; | |
7010 | sets[i].inner_dest_loc = &SET_DEST (sets[0].rtl); | |
7011 | ||
7012 | /* Look within any SIGN_EXTRACT or ZERO_EXTRACT | |
7013 | to the MEM or REG within it. */ | |
7014 | while (GET_CODE (dest) == SIGN_EXTRACT | |
7015 | || GET_CODE (dest) == ZERO_EXTRACT | |
7016 | || GET_CODE (dest) == SUBREG | |
7017 | || GET_CODE (dest) == STRICT_LOW_PART) | |
7018 | { | |
7019 | sets[i].inner_dest_loc = &XEXP (dest, 0); | |
7020 | dest = XEXP (dest, 0); | |
7021 | } | |
7022 | ||
7023 | sets[i].inner_dest = dest; | |
7024 | ||
7025 | if (GET_CODE (dest) == MEM) | |
7026 | { | |
7027 | dest = fold_rtx (dest, insn); | |
7028 | ||
7029 | /* Decide whether we invalidate everything in memory, | |
7030 | or just things at non-fixed places. | |
7031 | Writing a large aggregate must invalidate everything | |
7032 | because we don't know how long it is. */ | |
7033 | note_mem_written (dest, &writes_memory); | |
7034 | } | |
7035 | ||
7036 | /* Compute the hash code of the destination now, | |
7037 | before the effects of this instruction are recorded, | |
7038 | since the register values used in the address computation | |
7039 | are those before this instruction. */ | |
2197a88a | 7040 | sets[i].dest_hash = HASH (dest, mode); |
7afe21cc RK |
7041 | |
7042 | /* Don't enter a bit-field in the hash table | |
7043 | because the value in it after the store | |
7044 | may not equal what was stored, due to truncation. */ | |
7045 | ||
7046 | if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT | |
7047 | || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT) | |
7048 | { | |
7049 | rtx width = XEXP (SET_DEST (sets[i].rtl), 1); | |
7050 | ||
7051 | if (src_const != 0 && GET_CODE (src_const) == CONST_INT | |
7052 | && GET_CODE (width) == CONST_INT | |
906c4e36 RK |
7053 | && INTVAL (width) < HOST_BITS_PER_WIDE_INT |
7054 | && ! (INTVAL (src_const) | |
7055 | & ((HOST_WIDE_INT) (-1) << INTVAL (width)))) | |
7afe21cc RK |
7056 | /* Exception: if the value is constant, |
7057 | and it won't be truncated, record it. */ | |
7058 | ; | |
7059 | else | |
7060 | { | |
7061 | /* This is chosen so that the destination will be invalidated | |
7062 | but no new value will be recorded. | |
7063 | We must invalidate because sometimes constant | |
7064 | values can be recorded for bitfields. */ | |
7065 | sets[i].src_elt = 0; | |
7066 | sets[i].src_volatile = 1; | |
7067 | src_eqv = 0; | |
7068 | src_eqv_elt = 0; | |
7069 | } | |
7070 | } | |
7071 | ||
7072 | /* If only one set in a JUMP_INSN and it is now a no-op, we can delete | |
7073 | the insn. */ | |
7074 | else if (n_sets == 1 && dest == pc_rtx && src == pc_rtx) | |
7075 | { | |
7076 | PUT_CODE (insn, NOTE); | |
7077 | NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED; | |
7078 | NOTE_SOURCE_FILE (insn) = 0; | |
7079 | cse_jumps_altered = 1; | |
7080 | /* One less use of the label this insn used to jump to. */ | |
7081 | --LABEL_NUSES (JUMP_LABEL (insn)); | |
7082 | /* No more processing for this set. */ | |
7083 | sets[i].rtl = 0; | |
7084 | } | |
7085 | ||
7086 | /* If this SET is now setting PC to a label, we know it used to | |
7087 | be a conditional or computed branch. So we see if we can follow | |
7088 | it. If it was a computed branch, delete it and re-emit. */ | |
7089 | else if (dest == pc_rtx && GET_CODE (src) == LABEL_REF) | |
7090 | { | |
7091 | rtx p; | |
7092 | ||
7093 | /* If this is not in the format for a simple branch and | |
7094 | we are the only SET in it, re-emit it. */ | |
7095 | if (! simplejump_p (insn) && n_sets == 1) | |
7096 | { | |
7097 | rtx new = emit_jump_insn_before (gen_jump (XEXP (src, 0)), insn); | |
7098 | JUMP_LABEL (new) = XEXP (src, 0); | |
7099 | LABEL_NUSES (XEXP (src, 0))++; | |
7100 | delete_insn (insn); | |
7101 | insn = new; | |
7102 | } | |
31dcf83f RS |
7103 | else |
7104 | /* Otherwise, force rerecognition, since it probably had | |
7105 | a different pattern before. | |
7106 | This shouldn't really be necessary, since whatever | |
7107 | changed the source value above should have done this. | |
7108 | Until the right place is found, might as well do this here. */ | |
7109 | INSN_CODE (insn) = -1; | |
7afe21cc RK |
7110 | |
7111 | /* Now that we've converted this jump to an unconditional jump, | |
7112 | there is dead code after it. Delete the dead code until we | |
7113 | reach a BARRIER, the end of the function, or a label. Do | |
7114 | not delete NOTEs except for NOTE_INSN_DELETED since later | |
7115 | phases assume these notes are retained. */ | |
7116 | ||
7117 | p = insn; | |
7118 | ||
7119 | while (NEXT_INSN (p) != 0 | |
7120 | && GET_CODE (NEXT_INSN (p)) != BARRIER | |
7121 | && GET_CODE (NEXT_INSN (p)) != CODE_LABEL) | |
7122 | { | |
7123 | if (GET_CODE (NEXT_INSN (p)) != NOTE | |
7124 | || NOTE_LINE_NUMBER (NEXT_INSN (p)) == NOTE_INSN_DELETED) | |
7125 | delete_insn (NEXT_INSN (p)); | |
7126 | else | |
7127 | p = NEXT_INSN (p); | |
7128 | } | |
7129 | ||
7130 | /* If we don't have a BARRIER immediately after INSN, put one there. | |
7131 | Much code assumes that there are no NOTEs between a JUMP_INSN and | |
7132 | BARRIER. */ | |
7133 | ||
7134 | if (NEXT_INSN (insn) == 0 | |
7135 | || GET_CODE (NEXT_INSN (insn)) != BARRIER) | |
783e5bca | 7136 | emit_barrier_before (NEXT_INSN (insn)); |
7afe21cc RK |
7137 | |
7138 | /* We might have two BARRIERs separated by notes. Delete the second | |
7139 | one if so. */ | |
7140 | ||
538b78e7 RS |
7141 | if (p != insn && NEXT_INSN (p) != 0 |
7142 | && GET_CODE (NEXT_INSN (p)) == BARRIER) | |
7afe21cc RK |
7143 | delete_insn (NEXT_INSN (p)); |
7144 | ||
7145 | cse_jumps_altered = 1; | |
7146 | sets[i].rtl = 0; | |
7147 | } | |
7148 | ||
c2a47e48 RK |
7149 | /* If destination is volatile, invalidate it and then do no further |
7150 | processing for this assignment. */ | |
7afe21cc RK |
7151 | |
7152 | else if (do_not_record) | |
c2a47e48 RK |
7153 | { |
7154 | if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG | |
7155 | || GET_CODE (dest) == MEM) | |
bb4034b3 | 7156 | invalidate (dest, VOIDmode); |
2708da92 RS |
7157 | else if (GET_CODE (dest) == STRICT_LOW_PART |
7158 | || GET_CODE (dest) == ZERO_EXTRACT) | |
bb4034b3 | 7159 | invalidate (XEXP (dest, 0), GET_MODE (dest)); |
c2a47e48 RK |
7160 | sets[i].rtl = 0; |
7161 | } | |
7afe21cc RK |
7162 | |
7163 | if (sets[i].rtl != 0 && dest != SET_DEST (sets[i].rtl)) | |
2197a88a | 7164 | sets[i].dest_hash = HASH (SET_DEST (sets[i].rtl), mode); |
7afe21cc RK |
7165 | |
7166 | #ifdef HAVE_cc0 | |
7167 | /* If setting CC0, record what it was set to, or a constant, if it | |
7168 | is equivalent to a constant. If it is being set to a floating-point | |
7169 | value, make a COMPARE with the appropriate constant of 0. If we | |
7170 | don't do this, later code can interpret this as a test against | |
7171 | const0_rtx, which can cause problems if we try to put it into an | |
7172 | insn as a floating-point operand. */ | |
7173 | if (dest == cc0_rtx) | |
7174 | { | |
7175 | this_insn_cc0 = src_const && mode != VOIDmode ? src_const : src; | |
7176 | this_insn_cc0_mode = mode; | |
cbf6a543 | 7177 | if (FLOAT_MODE_P (mode)) |
7afe21cc RK |
7178 | this_insn_cc0 = gen_rtx (COMPARE, VOIDmode, this_insn_cc0, |
7179 | CONST0_RTX (mode)); | |
7180 | } | |
7181 | #endif | |
7182 | } | |
7183 | ||
7184 | /* Now enter all non-volatile source expressions in the hash table | |
7185 | if they are not already present. | |
7186 | Record their equivalence classes in src_elt. | |
7187 | This way we can insert the corresponding destinations into | |
7188 | the same classes even if the actual sources are no longer in them | |
7189 | (having been invalidated). */ | |
7190 | ||
7191 | if (src_eqv && src_eqv_elt == 0 && sets[0].rtl != 0 && ! src_eqv_volatile | |
7192 | && ! rtx_equal_p (src_eqv, SET_DEST (sets[0].rtl))) | |
7193 | { | |
7194 | register struct table_elt *elt; | |
7195 | register struct table_elt *classp = sets[0].src_elt; | |
7196 | rtx dest = SET_DEST (sets[0].rtl); | |
7197 | enum machine_mode eqvmode = GET_MODE (dest); | |
7198 | ||
7199 | if (GET_CODE (dest) == STRICT_LOW_PART) | |
7200 | { | |
7201 | eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0))); | |
7202 | classp = 0; | |
7203 | } | |
7204 | if (insert_regs (src_eqv, classp, 0)) | |
8ae2b8f6 JW |
7205 | { |
7206 | rehash_using_reg (src_eqv); | |
7207 | src_eqv_hash = HASH (src_eqv, eqvmode); | |
7208 | } | |
2197a88a | 7209 | elt = insert (src_eqv, classp, src_eqv_hash, eqvmode); |
7afe21cc RK |
7210 | elt->in_memory = src_eqv_in_memory; |
7211 | elt->in_struct = src_eqv_in_struct; | |
7212 | src_eqv_elt = elt; | |
f7911249 JW |
7213 | |
7214 | /* Check to see if src_eqv_elt is the same as a set source which | |
7215 | does not yet have an elt, and if so set the elt of the set source | |
7216 | to src_eqv_elt. */ | |
7217 | for (i = 0; i < n_sets; i++) | |
7218 | if (sets[i].rtl && sets[i].src_elt == 0 | |
7219 | && rtx_equal_p (SET_SRC (sets[i].rtl), src_eqv)) | |
7220 | sets[i].src_elt = src_eqv_elt; | |
7afe21cc RK |
7221 | } |
7222 | ||
7223 | for (i = 0; i < n_sets; i++) | |
7224 | if (sets[i].rtl && ! sets[i].src_volatile | |
7225 | && ! rtx_equal_p (SET_SRC (sets[i].rtl), SET_DEST (sets[i].rtl))) | |
7226 | { | |
7227 | if (GET_CODE (SET_DEST (sets[i].rtl)) == STRICT_LOW_PART) | |
7228 | { | |
7229 | /* REG_EQUAL in setting a STRICT_LOW_PART | |
7230 | gives an equivalent for the entire destination register, | |
7231 | not just for the subreg being stored in now. | |
7232 | This is a more interesting equivalence, so we arrange later | |
7233 | to treat the entire reg as the destination. */ | |
7234 | sets[i].src_elt = src_eqv_elt; | |
2197a88a | 7235 | sets[i].src_hash = src_eqv_hash; |
7afe21cc RK |
7236 | } |
7237 | else | |
7238 | { | |
7239 | /* Insert source and constant equivalent into hash table, if not | |
7240 | already present. */ | |
7241 | register struct table_elt *classp = src_eqv_elt; | |
7242 | register rtx src = sets[i].src; | |
7243 | register rtx dest = SET_DEST (sets[i].rtl); | |
7244 | enum machine_mode mode | |
7245 | = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src); | |
7246 | ||
7247 | if (sets[i].src_elt == 0) | |
7248 | { | |
7249 | register struct table_elt *elt; | |
7250 | ||
7251 | /* Note that these insert_regs calls cannot remove | |
7252 | any of the src_elt's, because they would have failed to | |
7253 | match if not still valid. */ | |
7254 | if (insert_regs (src, classp, 0)) | |
8ae2b8f6 JW |
7255 | { |
7256 | rehash_using_reg (src); | |
7257 | sets[i].src_hash = HASH (src, mode); | |
7258 | } | |
2197a88a | 7259 | elt = insert (src, classp, sets[i].src_hash, mode); |
7afe21cc RK |
7260 | elt->in_memory = sets[i].src_in_memory; |
7261 | elt->in_struct = sets[i].src_in_struct; | |
7262 | sets[i].src_elt = classp = elt; | |
7263 | } | |
7264 | ||
7265 | if (sets[i].src_const && sets[i].src_const_elt == 0 | |
7266 | && src != sets[i].src_const | |
7267 | && ! rtx_equal_p (sets[i].src_const, src)) | |
7268 | sets[i].src_elt = insert (sets[i].src_const, classp, | |
2197a88a | 7269 | sets[i].src_const_hash, mode); |
7afe21cc RK |
7270 | } |
7271 | } | |
7272 | else if (sets[i].src_elt == 0) | |
7273 | /* If we did not insert the source into the hash table (e.g., it was | |
7274 | volatile), note the equivalence class for the REG_EQUAL value, if any, | |
7275 | so that the destination goes into that class. */ | |
7276 | sets[i].src_elt = src_eqv_elt; | |
7277 | ||
7278 | invalidate_from_clobbers (&writes_memory, x); | |
77fa0940 RK |
7279 | |
7280 | /* Some registers are invalidated by subroutine calls. Memory is | |
7281 | invalidated by non-constant calls. */ | |
7282 | ||
7afe21cc RK |
7283 | if (GET_CODE (insn) == CALL_INSN) |
7284 | { | |
7285 | static struct write_data everything = {0, 1, 1, 1}; | |
77fa0940 RK |
7286 | |
7287 | if (! CONST_CALL_P (insn)) | |
7288 | invalidate_memory (&everything); | |
7afe21cc RK |
7289 | invalidate_for_call (); |
7290 | } | |
7291 | ||
7292 | /* Now invalidate everything set by this instruction. | |
7293 | If a SUBREG or other funny destination is being set, | |
7294 | sets[i].rtl is still nonzero, so here we invalidate the reg | |
7295 | a part of which is being set. */ | |
7296 | ||
7297 | for (i = 0; i < n_sets; i++) | |
7298 | if (sets[i].rtl) | |
7299 | { | |
bb4034b3 JW |
7300 | /* We can't use the inner dest, because the mode associated with |
7301 | a ZERO_EXTRACT is significant. */ | |
7302 | register rtx dest = SET_DEST (sets[i].rtl); | |
7afe21cc RK |
7303 | |
7304 | /* Needed for registers to remove the register from its | |
7305 | previous quantity's chain. | |
7306 | Needed for memory if this is a nonvarying address, unless | |
7307 | we have just done an invalidate_memory that covers even those. */ | |
7308 | if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG | |
bb4034b3 JW |
7309 | || (GET_CODE (dest) == MEM && ! writes_memory.all |
7310 | && ! cse_rtx_addr_varies_p (dest))) | |
7311 | invalidate (dest, VOIDmode); | |
2708da92 RS |
7312 | else if (GET_CODE (dest) == STRICT_LOW_PART |
7313 | || GET_CODE (dest) == ZERO_EXTRACT) | |
bb4034b3 | 7314 | invalidate (XEXP (dest, 0), GET_MODE (dest)); |
7afe21cc RK |
7315 | } |
7316 | ||
7317 | /* Make sure registers mentioned in destinations | |
7318 | are safe for use in an expression to be inserted. | |
7319 | This removes from the hash table | |
7320 | any invalid entry that refers to one of these registers. | |
7321 | ||
7322 | We don't care about the return value from mention_regs because | |
7323 | we are going to hash the SET_DEST values unconditionally. */ | |
7324 | ||
7325 | for (i = 0; i < n_sets; i++) | |
7326 | if (sets[i].rtl && GET_CODE (SET_DEST (sets[i].rtl)) != REG) | |
7327 | mention_regs (SET_DEST (sets[i].rtl)); | |
7328 | ||
7329 | /* We may have just removed some of the src_elt's from the hash table. | |
7330 | So replace each one with the current head of the same class. */ | |
7331 | ||
7332 | for (i = 0; i < n_sets; i++) | |
7333 | if (sets[i].rtl) | |
7334 | { | |
7335 | if (sets[i].src_elt && sets[i].src_elt->first_same_value == 0) | |
7336 | /* If elt was removed, find current head of same class, | |
7337 | or 0 if nothing remains of that class. */ | |
7338 | { | |
7339 | register struct table_elt *elt = sets[i].src_elt; | |
7340 | ||
7341 | while (elt && elt->prev_same_value) | |
7342 | elt = elt->prev_same_value; | |
7343 | ||
7344 | while (elt && elt->first_same_value == 0) | |
7345 | elt = elt->next_same_value; | |
7346 | sets[i].src_elt = elt ? elt->first_same_value : 0; | |
7347 | } | |
7348 | } | |
7349 | ||
7350 | /* Now insert the destinations into their equivalence classes. */ | |
7351 | ||
7352 | for (i = 0; i < n_sets; i++) | |
7353 | if (sets[i].rtl) | |
7354 | { | |
7355 | register rtx dest = SET_DEST (sets[i].rtl); | |
7356 | register struct table_elt *elt; | |
7357 | ||
7358 | /* Don't record value if we are not supposed to risk allocating | |
7359 | floating-point values in registers that might be wider than | |
7360 | memory. */ | |
7361 | if ((flag_float_store | |
7362 | && GET_CODE (dest) == MEM | |
cbf6a543 | 7363 | && FLOAT_MODE_P (GET_MODE (dest))) |
7afe21cc RK |
7364 | /* Don't record values of destinations set inside a libcall block |
7365 | since we might delete the libcall. Things should have been set | |
7366 | up so we won't want to reuse such a value, but we play it safe | |
7367 | here. */ | |
7368 | || in_libcall_block | |
7369 | /* If we didn't put a REG_EQUAL value or a source into the hash | |
7370 | table, there is no point is recording DEST. */ | |
1a8e9a8e RK |
7371 | || sets[i].src_elt == 0 |
7372 | /* If DEST is a paradoxical SUBREG and SRC is a ZERO_EXTEND | |
7373 | or SIGN_EXTEND, don't record DEST since it can cause | |
7374 | some tracking to be wrong. | |
7375 | ||
7376 | ??? Think about this more later. */ | |
7377 | || (GET_CODE (dest) == SUBREG | |
7378 | && (GET_MODE_SIZE (GET_MODE (dest)) | |
7379 | > GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest)))) | |
7380 | && (GET_CODE (sets[i].src) == SIGN_EXTEND | |
7381 | || GET_CODE (sets[i].src) == ZERO_EXTEND))) | |
7afe21cc RK |
7382 | continue; |
7383 | ||
7384 | /* STRICT_LOW_PART isn't part of the value BEING set, | |
7385 | and neither is the SUBREG inside it. | |
7386 | Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */ | |
7387 | if (GET_CODE (dest) == STRICT_LOW_PART) | |
7388 | dest = SUBREG_REG (XEXP (dest, 0)); | |
7389 | ||
c610adec | 7390 | if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG) |
7afe21cc RK |
7391 | /* Registers must also be inserted into chains for quantities. */ |
7392 | if (insert_regs (dest, sets[i].src_elt, 1)) | |
8ae2b8f6 JW |
7393 | { |
7394 | /* If `insert_regs' changes something, the hash code must be | |
7395 | recalculated. */ | |
7396 | rehash_using_reg (dest); | |
7397 | sets[i].dest_hash = HASH (dest, GET_MODE (dest)); | |
7398 | } | |
7afe21cc RK |
7399 | |
7400 | elt = insert (dest, sets[i].src_elt, | |
2197a88a | 7401 | sets[i].dest_hash, GET_MODE (dest)); |
c256df0b | 7402 | elt->in_memory = (GET_CODE (sets[i].inner_dest) == MEM |
9ad91d71 RK |
7403 | && (! RTX_UNCHANGING_P (sets[i].inner_dest) |
7404 | || FIXED_BASE_PLUS_P (XEXP (sets[i].inner_dest, | |
7405 | 0)))); | |
c256df0b | 7406 | |
7afe21cc RK |
7407 | if (elt->in_memory) |
7408 | { | |
7409 | /* This implicitly assumes a whole struct | |
7410 | need not have MEM_IN_STRUCT_P. | |
7411 | But a whole struct is *supposed* to have MEM_IN_STRUCT_P. */ | |
7412 | elt->in_struct = (MEM_IN_STRUCT_P (sets[i].inner_dest) | |
7413 | || sets[i].inner_dest != SET_DEST (sets[i].rtl)); | |
7414 | } | |
7415 | ||
fc3ffe83 RK |
7416 | /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no |
7417 | narrower than M2, and both M1 and M2 are the same number of words, | |
7418 | we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so | |
7419 | make that equivalence as well. | |
7afe21cc RK |
7420 | |
7421 | However, BAR may have equivalences for which gen_lowpart_if_possible | |
7422 | will produce a simpler value than gen_lowpart_if_possible applied to | |
7423 | BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all | |
7424 | BAR's equivalences. If we don't get a simplified form, make | |
7425 | the SUBREG. It will not be used in an equivalence, but will | |
7426 | cause two similar assignments to be detected. | |
7427 | ||
7428 | Note the loop below will find SUBREG_REG (DEST) since we have | |
7429 | already entered SRC and DEST of the SET in the table. */ | |
7430 | ||
7431 | if (GET_CODE (dest) == SUBREG | |
6cdbaec4 RK |
7432 | && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) - 1) |
7433 | / UNITS_PER_WORD) | |
7434 | == (GET_MODE_SIZE (GET_MODE (dest)) - 1)/ UNITS_PER_WORD) | |
7afe21cc RK |
7435 | && (GET_MODE_SIZE (GET_MODE (dest)) |
7436 | >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest)))) | |
7437 | && sets[i].src_elt != 0) | |
7438 | { | |
7439 | enum machine_mode new_mode = GET_MODE (SUBREG_REG (dest)); | |
7440 | struct table_elt *elt, *classp = 0; | |
7441 | ||
7442 | for (elt = sets[i].src_elt->first_same_value; elt; | |
7443 | elt = elt->next_same_value) | |
7444 | { | |
7445 | rtx new_src = 0; | |
2197a88a | 7446 | unsigned src_hash; |
7afe21cc RK |
7447 | struct table_elt *src_elt; |
7448 | ||
7449 | /* Ignore invalid entries. */ | |
7450 | if (GET_CODE (elt->exp) != REG | |
7451 | && ! exp_equiv_p (elt->exp, elt->exp, 1, 0)) | |
7452 | continue; | |
7453 | ||
7454 | new_src = gen_lowpart_if_possible (new_mode, elt->exp); | |
7455 | if (new_src == 0) | |
7456 | new_src = gen_rtx (SUBREG, new_mode, elt->exp, 0); | |
7457 | ||
7458 | src_hash = HASH (new_src, new_mode); | |
7459 | src_elt = lookup (new_src, src_hash, new_mode); | |
7460 | ||
7461 | /* Put the new source in the hash table is if isn't | |
7462 | already. */ | |
7463 | if (src_elt == 0) | |
7464 | { | |
7465 | if (insert_regs (new_src, classp, 0)) | |
8ae2b8f6 JW |
7466 | { |
7467 | rehash_using_reg (new_src); | |
7468 | src_hash = HASH (new_src, new_mode); | |
7469 | } | |
7afe21cc RK |
7470 | src_elt = insert (new_src, classp, src_hash, new_mode); |
7471 | src_elt->in_memory = elt->in_memory; | |
7472 | src_elt->in_struct = elt->in_struct; | |
7473 | } | |
7474 | else if (classp && classp != src_elt->first_same_value) | |
7475 | /* Show that two things that we've seen before are | |
7476 | actually the same. */ | |
7477 | merge_equiv_classes (src_elt, classp); | |
7478 | ||
7479 | classp = src_elt->first_same_value; | |
7480 | } | |
7481 | } | |
7482 | } | |
7483 | ||
7484 | /* Special handling for (set REG0 REG1) | |
7485 | where REG0 is the "cheapest", cheaper than REG1. | |
7486 | After cse, REG1 will probably not be used in the sequel, | |
7487 | so (if easily done) change this insn to (set REG1 REG0) and | |
7488 | replace REG1 with REG0 in the previous insn that computed their value. | |
7489 | Then REG1 will become a dead store and won't cloud the situation | |
7490 | for later optimizations. | |
7491 | ||
7492 | Do not make this change if REG1 is a hard register, because it will | |
7493 | then be used in the sequel and we may be changing a two-operand insn | |
7494 | into a three-operand insn. | |
7495 | ||
7496 | Also do not do this if we are operating on a copy of INSN. */ | |
7497 | ||
7498 | if (n_sets == 1 && sets[0].rtl && GET_CODE (SET_DEST (sets[0].rtl)) == REG | |
7499 | && NEXT_INSN (PREV_INSN (insn)) == insn | |
7500 | && GET_CODE (SET_SRC (sets[0].rtl)) == REG | |
7501 | && REGNO (SET_SRC (sets[0].rtl)) >= FIRST_PSEUDO_REGISTER | |
7502 | && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets[0].rtl))) | |
7503 | && (qty_first_reg[reg_qty[REGNO (SET_SRC (sets[0].rtl))]] | |
7504 | == REGNO (SET_DEST (sets[0].rtl)))) | |
7505 | { | |
7506 | rtx prev = PREV_INSN (insn); | |
7507 | while (prev && GET_CODE (prev) == NOTE) | |
7508 | prev = PREV_INSN (prev); | |
7509 | ||
7510 | if (prev && GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SET | |
7511 | && SET_DEST (PATTERN (prev)) == SET_SRC (sets[0].rtl)) | |
7512 | { | |
7513 | rtx dest = SET_DEST (sets[0].rtl); | |
906c4e36 | 7514 | rtx note = find_reg_note (prev, REG_EQUIV, NULL_RTX); |
7afe21cc RK |
7515 | |
7516 | validate_change (prev, & SET_DEST (PATTERN (prev)), dest, 1); | |
7517 | validate_change (insn, & SET_DEST (sets[0].rtl), | |
7518 | SET_SRC (sets[0].rtl), 1); | |
7519 | validate_change (insn, & SET_SRC (sets[0].rtl), dest, 1); | |
7520 | apply_change_group (); | |
7521 | ||
7522 | /* If REG1 was equivalent to a constant, REG0 is not. */ | |
7523 | if (note) | |
7524 | PUT_REG_NOTE_KIND (note, REG_EQUAL); | |
7525 | ||
7526 | /* If there was a REG_WAS_0 note on PREV, remove it. Move | |
7527 | any REG_WAS_0 note on INSN to PREV. */ | |
906c4e36 | 7528 | note = find_reg_note (prev, REG_WAS_0, NULL_RTX); |
7afe21cc RK |
7529 | if (note) |
7530 | remove_note (prev, note); | |
7531 | ||
906c4e36 | 7532 | note = find_reg_note (insn, REG_WAS_0, NULL_RTX); |
7afe21cc RK |
7533 | if (note) |
7534 | { | |
7535 | remove_note (insn, note); | |
7536 | XEXP (note, 1) = REG_NOTES (prev); | |
7537 | REG_NOTES (prev) = note; | |
7538 | } | |
98369a0f RK |
7539 | |
7540 | /* If INSN has a REG_EQUAL note, and this note mentions REG0, | |
7541 | then we must delete it, because the value in REG0 has changed. */ | |
7542 | note = find_reg_note (insn, REG_EQUAL, NULL_RTX); | |
7543 | if (note && reg_mentioned_p (dest, XEXP (note, 0))) | |
7544 | remove_note (insn, note); | |
7afe21cc RK |
7545 | } |
7546 | } | |
7547 | ||
7548 | /* If this is a conditional jump insn, record any known equivalences due to | |
7549 | the condition being tested. */ | |
7550 | ||
7551 | last_jump_equiv_class = 0; | |
7552 | if (GET_CODE (insn) == JUMP_INSN | |
7553 | && n_sets == 1 && GET_CODE (x) == SET | |
7554 | && GET_CODE (SET_SRC (x)) == IF_THEN_ELSE) | |
7555 | record_jump_equiv (insn, 0); | |
7556 | ||
7557 | #ifdef HAVE_cc0 | |
7558 | /* If the previous insn set CC0 and this insn no longer references CC0, | |
7559 | delete the previous insn. Here we use the fact that nothing expects CC0 | |
7560 | to be valid over an insn, which is true until the final pass. */ | |
7561 | if (prev_insn && GET_CODE (prev_insn) == INSN | |
7562 | && (tem = single_set (prev_insn)) != 0 | |
7563 | && SET_DEST (tem) == cc0_rtx | |
7564 | && ! reg_mentioned_p (cc0_rtx, x)) | |
7565 | { | |
7566 | PUT_CODE (prev_insn, NOTE); | |
7567 | NOTE_LINE_NUMBER (prev_insn) = NOTE_INSN_DELETED; | |
7568 | NOTE_SOURCE_FILE (prev_insn) = 0; | |
7569 | } | |
7570 | ||
7571 | prev_insn_cc0 = this_insn_cc0; | |
7572 | prev_insn_cc0_mode = this_insn_cc0_mode; | |
7573 | #endif | |
7574 | ||
7575 | prev_insn = insn; | |
7576 | } | |
7577 | \f | |
7578 | /* Store 1 in *WRITES_PTR for those categories of memory ref | |
7579 | that must be invalidated when the expression WRITTEN is stored in. | |
7580 | If WRITTEN is null, say everything must be invalidated. */ | |
7581 | ||
7582 | static void | |
7583 | note_mem_written (written, writes_ptr) | |
7584 | rtx written; | |
7585 | struct write_data *writes_ptr; | |
7586 | { | |
7587 | static struct write_data everything = {0, 1, 1, 1}; | |
7588 | ||
7589 | if (written == 0) | |
7590 | *writes_ptr = everything; | |
7591 | else if (GET_CODE (written) == MEM) | |
7592 | { | |
0f41302f | 7593 | /* Pushing or popping the stack invalidates just the stack pointer. */ |
7afe21cc RK |
7594 | rtx addr = XEXP (written, 0); |
7595 | if ((GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC | |
7596 | || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC) | |
7597 | && GET_CODE (XEXP (addr, 0)) == REG | |
7598 | && REGNO (XEXP (addr, 0)) == STACK_POINTER_REGNUM) | |
7599 | { | |
7600 | writes_ptr->sp = 1; | |
7601 | return; | |
7602 | } | |
7603 | else if (GET_MODE (written) == BLKmode) | |
7604 | *writes_ptr = everything; | |
7605 | else if (cse_rtx_addr_varies_p (written)) | |
7606 | { | |
7607 | /* A varying address that is a sum indicates an array element, | |
7608 | and that's just as good as a structure element | |
2d08d5b6 JW |
7609 | in implying that we need not invalidate scalar variables. |
7610 | However, we must allow QImode aliasing of scalars, because the | |
5dbc8499 JW |
7611 | ANSI C standard allows character pointers to alias anything. |
7612 | We must also allow AND addresses, because they may generate | |
7613 | accesses outside the object being referenced. This is used to | |
7614 | generate aligned addresses from unaligned addresses, for instance, | |
7615 | the alpha storeqi_unaligned pattern. */ | |
2d08d5b6 JW |
7616 | if (! ((MEM_IN_STRUCT_P (written) |
7617 | || GET_CODE (XEXP (written, 0)) == PLUS) | |
5dbc8499 JW |
7618 | && GET_MODE (written) != QImode |
7619 | && GET_CODE (XEXP (written, 0)) != AND)) | |
7afe21cc RK |
7620 | writes_ptr->all = 1; |
7621 | writes_ptr->nonscalar = 1; | |
7622 | } | |
7623 | writes_ptr->var = 1; | |
7624 | } | |
7625 | } | |
7626 | ||
7627 | /* Perform invalidation on the basis of everything about an insn | |
7628 | except for invalidating the actual places that are SET in it. | |
7629 | This includes the places CLOBBERed, and anything that might | |
7630 | alias with something that is SET or CLOBBERed. | |
7631 | ||
7632 | W points to the writes_memory for this insn, a struct write_data | |
7633 | saying which kinds of memory references must be invalidated. | |
7634 | X is the pattern of the insn. */ | |
7635 | ||
7636 | static void | |
7637 | invalidate_from_clobbers (w, x) | |
7638 | struct write_data *w; | |
7639 | rtx x; | |
7640 | { | |
7641 | /* If W->var is not set, W specifies no action. | |
7642 | If W->all is set, this step gets all memory refs | |
7643 | so they can be ignored in the rest of this function. */ | |
7644 | if (w->var) | |
7645 | invalidate_memory (w); | |
7646 | ||
7647 | if (w->sp) | |
7648 | { | |
7649 | if (reg_tick[STACK_POINTER_REGNUM] >= 0) | |
7650 | reg_tick[STACK_POINTER_REGNUM]++; | |
7651 | ||
7652 | /* This should be *very* rare. */ | |
7653 | if (TEST_HARD_REG_BIT (hard_regs_in_table, STACK_POINTER_REGNUM)) | |
bb4034b3 | 7654 | invalidate (stack_pointer_rtx, VOIDmode); |
7afe21cc RK |
7655 | } |
7656 | ||
7657 | if (GET_CODE (x) == CLOBBER) | |
7658 | { | |
7659 | rtx ref = XEXP (x, 0); | |
899bf2bf DE |
7660 | |
7661 | if (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG | |
7662 | || (GET_CODE (ref) == MEM && ! w->all)) | |
7663 | invalidate (ref, VOIDmode); | |
7664 | else if (GET_CODE (ref) == STRICT_LOW_PART | |
7665 | || GET_CODE (ref) == ZERO_EXTRACT) | |
7666 | invalidate (XEXP (ref, 0), GET_MODE (ref)); | |
7afe21cc RK |
7667 | } |
7668 | else if (GET_CODE (x) == PARALLEL) | |
7669 | { | |
7670 | register int i; | |
7671 | for (i = XVECLEN (x, 0) - 1; i >= 0; i--) | |
7672 | { | |
7673 | register rtx y = XVECEXP (x, 0, i); | |
7674 | if (GET_CODE (y) == CLOBBER) | |
7675 | { | |
7676 | rtx ref = XEXP (y, 0); | |
2708da92 RS |
7677 | if (ref) |
7678 | { | |
7679 | if (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG | |
7680 | || (GET_CODE (ref) == MEM && !w->all)) | |
bb4034b3 | 7681 | invalidate (ref, VOIDmode); |
2708da92 RS |
7682 | else if (GET_CODE (ref) == STRICT_LOW_PART |
7683 | || GET_CODE (ref) == ZERO_EXTRACT) | |
bb4034b3 | 7684 | invalidate (XEXP (ref, 0), GET_MODE (ref)); |
2708da92 | 7685 | } |
7afe21cc RK |
7686 | } |
7687 | } | |
7688 | } | |
7689 | } | |
7690 | \f | |
7691 | /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes | |
7692 | and replace any registers in them with either an equivalent constant | |
7693 | or the canonical form of the register. If we are inside an address, | |
7694 | only do this if the address remains valid. | |
7695 | ||
7696 | OBJECT is 0 except when within a MEM in which case it is the MEM. | |
7697 | ||
7698 | Return the replacement for X. */ | |
7699 | ||
7700 | static rtx | |
7701 | cse_process_notes (x, object) | |
7702 | rtx x; | |
7703 | rtx object; | |
7704 | { | |
7705 | enum rtx_code code = GET_CODE (x); | |
7706 | char *fmt = GET_RTX_FORMAT (code); | |
7afe21cc RK |
7707 | int i; |
7708 | ||
7709 | switch (code) | |
7710 | { | |
7711 | case CONST_INT: | |
7712 | case CONST: | |
7713 | case SYMBOL_REF: | |
7714 | case LABEL_REF: | |
7715 | case CONST_DOUBLE: | |
7716 | case PC: | |
7717 | case CC0: | |
7718 | case LO_SUM: | |
7719 | return x; | |
7720 | ||
7721 | case MEM: | |
7722 | XEXP (x, 0) = cse_process_notes (XEXP (x, 0), x); | |
7723 | return x; | |
7724 | ||
7725 | case EXPR_LIST: | |
7726 | case INSN_LIST: | |
7727 | if (REG_NOTE_KIND (x) == REG_EQUAL) | |
906c4e36 | 7728 | XEXP (x, 0) = cse_process_notes (XEXP (x, 0), NULL_RTX); |
7afe21cc | 7729 | if (XEXP (x, 1)) |
906c4e36 | 7730 | XEXP (x, 1) = cse_process_notes (XEXP (x, 1), NULL_RTX); |
7afe21cc RK |
7731 | return x; |
7732 | ||
e4890d45 RS |
7733 | case SIGN_EXTEND: |
7734 | case ZERO_EXTEND: | |
0b0ee36c | 7735 | case SUBREG: |
e4890d45 RS |
7736 | { |
7737 | rtx new = cse_process_notes (XEXP (x, 0), object); | |
7738 | /* We don't substitute VOIDmode constants into these rtx, | |
7739 | since they would impede folding. */ | |
7740 | if (GET_MODE (new) != VOIDmode) | |
7741 | validate_change (object, &XEXP (x, 0), new, 0); | |
7742 | return x; | |
7743 | } | |
7744 | ||
7afe21cc RK |
7745 | case REG: |
7746 | i = reg_qty[REGNO (x)]; | |
7747 | ||
7748 | /* Return a constant or a constant register. */ | |
7749 | if (REGNO_QTY_VALID_P (REGNO (x)) | |
7750 | && qty_const[i] != 0 | |
7751 | && (CONSTANT_P (qty_const[i]) | |
7752 | || GET_CODE (qty_const[i]) == REG)) | |
7753 | { | |
7754 | rtx new = gen_lowpart_if_possible (GET_MODE (x), qty_const[i]); | |
7755 | if (new) | |
7756 | return new; | |
7757 | } | |
7758 | ||
7759 | /* Otherwise, canonicalize this register. */ | |
906c4e36 | 7760 | return canon_reg (x, NULL_RTX); |
7afe21cc RK |
7761 | } |
7762 | ||
7763 | for (i = 0; i < GET_RTX_LENGTH (code); i++) | |
7764 | if (fmt[i] == 'e') | |
7765 | validate_change (object, &XEXP (x, i), | |
7fe34fdf | 7766 | cse_process_notes (XEXP (x, i), object), 0); |
7afe21cc RK |
7767 | |
7768 | return x; | |
7769 | } | |
7770 | \f | |
7771 | /* Find common subexpressions between the end test of a loop and the beginning | |
7772 | of the loop. LOOP_START is the CODE_LABEL at the start of a loop. | |
7773 | ||
7774 | Often we have a loop where an expression in the exit test is used | |
7775 | in the body of the loop. For example "while (*p) *q++ = *p++;". | |
7776 | Because of the way we duplicate the loop exit test in front of the loop, | |
7777 | however, we don't detect that common subexpression. This will be caught | |
7778 | when global cse is implemented, but this is a quite common case. | |
7779 | ||
7780 | This function handles the most common cases of these common expressions. | |
7781 | It is called after we have processed the basic block ending with the | |
7782 | NOTE_INSN_LOOP_END note that ends a loop and the previous JUMP_INSN | |
7783 | jumps to a label used only once. */ | |
7784 | ||
7785 | static void | |
7786 | cse_around_loop (loop_start) | |
7787 | rtx loop_start; | |
7788 | { | |
7789 | rtx insn; | |
7790 | int i; | |
7791 | struct table_elt *p; | |
7792 | ||
7793 | /* If the jump at the end of the loop doesn't go to the start, we don't | |
7794 | do anything. */ | |
7795 | for (insn = PREV_INSN (loop_start); | |
7796 | insn && (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) >= 0); | |
7797 | insn = PREV_INSN (insn)) | |
7798 | ; | |
7799 | ||
7800 | if (insn == 0 | |
7801 | || GET_CODE (insn) != NOTE | |
7802 | || NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG) | |
7803 | return; | |
7804 | ||
7805 | /* If the last insn of the loop (the end test) was an NE comparison, | |
7806 | we will interpret it as an EQ comparison, since we fell through | |
f72aed24 | 7807 | the loop. Any equivalences resulting from that comparison are |
7afe21cc RK |
7808 | therefore not valid and must be invalidated. */ |
7809 | if (last_jump_equiv_class) | |
7810 | for (p = last_jump_equiv_class->first_same_value; p; | |
7811 | p = p->next_same_value) | |
7812 | if (GET_CODE (p->exp) == MEM || GET_CODE (p->exp) == REG | |
f1636e8a RK |
7813 | || (GET_CODE (p->exp) == SUBREG |
7814 | && GET_CODE (SUBREG_REG (p->exp)) == REG)) | |
bb4034b3 | 7815 | invalidate (p->exp, VOIDmode); |
2708da92 RS |
7816 | else if (GET_CODE (p->exp) == STRICT_LOW_PART |
7817 | || GET_CODE (p->exp) == ZERO_EXTRACT) | |
bb4034b3 | 7818 | invalidate (XEXP (p->exp, 0), GET_MODE (p->exp)); |
7afe21cc RK |
7819 | |
7820 | /* Process insns starting after LOOP_START until we hit a CALL_INSN or | |
7821 | a CODE_LABEL (we could handle a CALL_INSN, but it isn't worth it). | |
7822 | ||
7823 | The only thing we do with SET_DEST is invalidate entries, so we | |
7824 | can safely process each SET in order. It is slightly less efficient | |
7825 | to do so, but we only want to handle the most common cases. */ | |
7826 | ||
7827 | for (insn = NEXT_INSN (loop_start); | |
7828 | GET_CODE (insn) != CALL_INSN && GET_CODE (insn) != CODE_LABEL | |
7829 | && ! (GET_CODE (insn) == NOTE | |
7830 | && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END); | |
7831 | insn = NEXT_INSN (insn)) | |
7832 | { | |
7833 | if (GET_RTX_CLASS (GET_CODE (insn)) == 'i' | |
7834 | && (GET_CODE (PATTERN (insn)) == SET | |
7835 | || GET_CODE (PATTERN (insn)) == CLOBBER)) | |
7836 | cse_set_around_loop (PATTERN (insn), insn, loop_start); | |
7837 | else if (GET_RTX_CLASS (GET_CODE (insn)) == 'i' | |
7838 | && GET_CODE (PATTERN (insn)) == PARALLEL) | |
7839 | for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--) | |
7840 | if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == SET | |
7841 | || GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == CLOBBER) | |
7842 | cse_set_around_loop (XVECEXP (PATTERN (insn), 0, i), insn, | |
7843 | loop_start); | |
7844 | } | |
7845 | } | |
7846 | \f | |
8b3686ed RK |
7847 | /* Variable used for communications between the next two routines. */ |
7848 | ||
7849 | static struct write_data skipped_writes_memory; | |
7850 | ||
7851 | /* Process one SET of an insn that was skipped. We ignore CLOBBERs | |
7852 | since they are done elsewhere. This function is called via note_stores. */ | |
7853 | ||
7854 | static void | |
7855 | invalidate_skipped_set (dest, set) | |
7856 | rtx set; | |
7857 | rtx dest; | |
7858 | { | |
8b3686ed RK |
7859 | if (GET_CODE (dest) == MEM) |
7860 | note_mem_written (dest, &skipped_writes_memory); | |
7861 | ||
ffcf6393 RS |
7862 | /* There are times when an address can appear varying and be a PLUS |
7863 | during this scan when it would be a fixed address were we to know | |
7864 | the proper equivalences. So promote "nonscalar" to be "all". */ | |
7865 | if (skipped_writes_memory.nonscalar) | |
7866 | skipped_writes_memory.all = 1; | |
7867 | ||
f47c02fa RK |
7868 | if (GET_CODE (set) == CLOBBER |
7869 | #ifdef HAVE_cc0 | |
7870 | || dest == cc0_rtx | |
7871 | #endif | |
7872 | || dest == pc_rtx) | |
7873 | return; | |
7874 | ||
8b3686ed RK |
7875 | if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG |
7876 | || (! skipped_writes_memory.all && ! cse_rtx_addr_varies_p (dest))) | |
bb4034b3 | 7877 | invalidate (dest, VOIDmode); |
2708da92 RS |
7878 | else if (GET_CODE (dest) == STRICT_LOW_PART |
7879 | || GET_CODE (dest) == ZERO_EXTRACT) | |
bb4034b3 | 7880 | invalidate (XEXP (dest, 0), GET_MODE (dest)); |
8b3686ed RK |
7881 | } |
7882 | ||
7883 | /* Invalidate all insns from START up to the end of the function or the | |
7884 | next label. This called when we wish to CSE around a block that is | |
7885 | conditionally executed. */ | |
7886 | ||
7887 | static void | |
7888 | invalidate_skipped_block (start) | |
7889 | rtx start; | |
7890 | { | |
7891 | rtx insn; | |
8b3686ed RK |
7892 | static struct write_data init = {0, 0, 0, 0}; |
7893 | static struct write_data everything = {0, 1, 1, 1}; | |
7894 | ||
7895 | for (insn = start; insn && GET_CODE (insn) != CODE_LABEL; | |
7896 | insn = NEXT_INSN (insn)) | |
7897 | { | |
7898 | if (GET_RTX_CLASS (GET_CODE (insn)) != 'i') | |
7899 | continue; | |
7900 | ||
7901 | skipped_writes_memory = init; | |
7902 | ||
7903 | if (GET_CODE (insn) == CALL_INSN) | |
7904 | { | |
7905 | invalidate_for_call (); | |
7906 | skipped_writes_memory = everything; | |
7907 | } | |
7908 | ||
7909 | note_stores (PATTERN (insn), invalidate_skipped_set); | |
7910 | invalidate_from_clobbers (&skipped_writes_memory, PATTERN (insn)); | |
7911 | } | |
7912 | } | |
7913 | \f | |
7afe21cc RK |
7914 | /* Used for communication between the following two routines; contains a |
7915 | value to be checked for modification. */ | |
7916 | ||
7917 | static rtx cse_check_loop_start_value; | |
7918 | ||
7919 | /* If modifying X will modify the value in CSE_CHECK_LOOP_START_VALUE, | |
7920 | indicate that fact by setting CSE_CHECK_LOOP_START_VALUE to 0. */ | |
7921 | ||
7922 | static void | |
7923 | cse_check_loop_start (x, set) | |
7924 | rtx x; | |
7925 | rtx set; | |
7926 | { | |
7927 | if (cse_check_loop_start_value == 0 | |
7928 | || GET_CODE (x) == CC0 || GET_CODE (x) == PC) | |
7929 | return; | |
7930 | ||
7931 | if ((GET_CODE (x) == MEM && GET_CODE (cse_check_loop_start_value) == MEM) | |
7932 | || reg_overlap_mentioned_p (x, cse_check_loop_start_value)) | |
7933 | cse_check_loop_start_value = 0; | |
7934 | } | |
7935 | ||
7936 | /* X is a SET or CLOBBER contained in INSN that was found near the start of | |
7937 | a loop that starts with the label at LOOP_START. | |
7938 | ||
7939 | If X is a SET, we see if its SET_SRC is currently in our hash table. | |
7940 | If so, we see if it has a value equal to some register used only in the | |
7941 | loop exit code (as marked by jump.c). | |
7942 | ||
7943 | If those two conditions are true, we search backwards from the start of | |
7944 | the loop to see if that same value was loaded into a register that still | |
7945 | retains its value at the start of the loop. | |
7946 | ||
7947 | If so, we insert an insn after the load to copy the destination of that | |
7948 | load into the equivalent register and (try to) replace our SET_SRC with that | |
7949 | register. | |
7950 | ||
7951 | In any event, we invalidate whatever this SET or CLOBBER modifies. */ | |
7952 | ||
7953 | static void | |
7954 | cse_set_around_loop (x, insn, loop_start) | |
7955 | rtx x; | |
7956 | rtx insn; | |
7957 | rtx loop_start; | |
7958 | { | |
7afe21cc RK |
7959 | struct table_elt *src_elt; |
7960 | static struct write_data init = {0, 0, 0, 0}; | |
7961 | struct write_data writes_memory; | |
7962 | ||
7963 | writes_memory = init; | |
7964 | ||
7965 | /* If this is a SET, see if we can replace SET_SRC, but ignore SETs that | |
7966 | are setting PC or CC0 or whose SET_SRC is already a register. */ | |
7967 | if (GET_CODE (x) == SET | |
7968 | && GET_CODE (SET_DEST (x)) != PC && GET_CODE (SET_DEST (x)) != CC0 | |
7969 | && GET_CODE (SET_SRC (x)) != REG) | |
7970 | { | |
7971 | src_elt = lookup (SET_SRC (x), | |
7972 | HASH (SET_SRC (x), GET_MODE (SET_DEST (x))), | |
7973 | GET_MODE (SET_DEST (x))); | |
7974 | ||
7975 | if (src_elt) | |
7976 | for (src_elt = src_elt->first_same_value; src_elt; | |
7977 | src_elt = src_elt->next_same_value) | |
7978 | if (GET_CODE (src_elt->exp) == REG && REG_LOOP_TEST_P (src_elt->exp) | |
7979 | && COST (src_elt->exp) < COST (SET_SRC (x))) | |
7980 | { | |
7981 | rtx p, set; | |
7982 | ||
7983 | /* Look for an insn in front of LOOP_START that sets | |
7984 | something in the desired mode to SET_SRC (x) before we hit | |
7985 | a label or CALL_INSN. */ | |
7986 | ||
7987 | for (p = prev_nonnote_insn (loop_start); | |
7988 | p && GET_CODE (p) != CALL_INSN | |
7989 | && GET_CODE (p) != CODE_LABEL; | |
7990 | p = prev_nonnote_insn (p)) | |
7991 | if ((set = single_set (p)) != 0 | |
7992 | && GET_CODE (SET_DEST (set)) == REG | |
7993 | && GET_MODE (SET_DEST (set)) == src_elt->mode | |
7994 | && rtx_equal_p (SET_SRC (set), SET_SRC (x))) | |
7995 | { | |
7996 | /* We now have to ensure that nothing between P | |
7997 | and LOOP_START modified anything referenced in | |
7998 | SET_SRC (x). We know that nothing within the loop | |
7999 | can modify it, or we would have invalidated it in | |
8000 | the hash table. */ | |
8001 | rtx q; | |
8002 | ||
8003 | cse_check_loop_start_value = SET_SRC (x); | |
8004 | for (q = p; q != loop_start; q = NEXT_INSN (q)) | |
8005 | if (GET_RTX_CLASS (GET_CODE (q)) == 'i') | |
8006 | note_stores (PATTERN (q), cse_check_loop_start); | |
8007 | ||
8008 | /* If nothing was changed and we can replace our | |
8009 | SET_SRC, add an insn after P to copy its destination | |
8010 | to what we will be replacing SET_SRC with. */ | |
8011 | if (cse_check_loop_start_value | |
8012 | && validate_change (insn, &SET_SRC (x), | |
8013 | src_elt->exp, 0)) | |
8014 | emit_insn_after (gen_move_insn (src_elt->exp, | |
8015 | SET_DEST (set)), | |
8016 | p); | |
8017 | break; | |
8018 | } | |
8019 | } | |
8020 | } | |
8021 | ||
8022 | /* Now invalidate anything modified by X. */ | |
8023 | note_mem_written (SET_DEST (x), &writes_memory); | |
8024 | ||
8025 | if (writes_memory.var) | |
8026 | invalidate_memory (&writes_memory); | |
8027 | ||
0f41302f MS |
8028 | /* See comment on similar code in cse_insn for explanation of these |
8029 | tests. */ | |
7afe21cc RK |
8030 | if (GET_CODE (SET_DEST (x)) == REG || GET_CODE (SET_DEST (x)) == SUBREG |
8031 | || (GET_CODE (SET_DEST (x)) == MEM && ! writes_memory.all | |
8032 | && ! cse_rtx_addr_varies_p (SET_DEST (x)))) | |
bb4034b3 | 8033 | invalidate (SET_DEST (x), VOIDmode); |
2708da92 RS |
8034 | else if (GET_CODE (SET_DEST (x)) == STRICT_LOW_PART |
8035 | || GET_CODE (SET_DEST (x)) == ZERO_EXTRACT) | |
bb4034b3 | 8036 | invalidate (XEXP (SET_DEST (x), 0), GET_MODE (SET_DEST (x))); |
7afe21cc RK |
8037 | } |
8038 | \f | |
8039 | /* Find the end of INSN's basic block and return its range, | |
8040 | the total number of SETs in all the insns of the block, the last insn of the | |
8041 | block, and the branch path. | |
8042 | ||
8043 | The branch path indicates which branches should be followed. If a non-zero | |
8044 | path size is specified, the block should be rescanned and a different set | |
8045 | of branches will be taken. The branch path is only used if | |
8b3686ed | 8046 | FLAG_CSE_FOLLOW_JUMPS or FLAG_CSE_SKIP_BLOCKS is non-zero. |
7afe21cc RK |
8047 | |
8048 | DATA is a pointer to a struct cse_basic_block_data, defined below, that is | |
8049 | used to describe the block. It is filled in with the information about | |
8050 | the current block. The incoming structure's branch path, if any, is used | |
8051 | to construct the output branch path. */ | |
8052 | ||
7afe21cc | 8053 | void |
8b3686ed | 8054 | cse_end_of_basic_block (insn, data, follow_jumps, after_loop, skip_blocks) |
7afe21cc RK |
8055 | rtx insn; |
8056 | struct cse_basic_block_data *data; | |
8057 | int follow_jumps; | |
8058 | int after_loop; | |
8b3686ed | 8059 | int skip_blocks; |
7afe21cc RK |
8060 | { |
8061 | rtx p = insn, q; | |
8062 | int nsets = 0; | |
8063 | int low_cuid = INSN_CUID (insn), high_cuid = INSN_CUID (insn); | |
fc3ffe83 | 8064 | rtx next = GET_RTX_CLASS (GET_CODE (insn)) == 'i' ? insn : next_real_insn (insn); |
7afe21cc RK |
8065 | int path_size = data->path_size; |
8066 | int path_entry = 0; | |
8067 | int i; | |
8068 | ||
8069 | /* Update the previous branch path, if any. If the last branch was | |
8070 | previously TAKEN, mark it NOT_TAKEN. If it was previously NOT_TAKEN, | |
8071 | shorten the path by one and look at the previous branch. We know that | |
8072 | at least one branch must have been taken if PATH_SIZE is non-zero. */ | |
8073 | while (path_size > 0) | |
8074 | { | |
8b3686ed | 8075 | if (data->path[path_size - 1].status != NOT_TAKEN) |
7afe21cc RK |
8076 | { |
8077 | data->path[path_size - 1].status = NOT_TAKEN; | |
8078 | break; | |
8079 | } | |
8080 | else | |
8081 | path_size--; | |
8082 | } | |
8083 | ||
8084 | /* Scan to end of this basic block. */ | |
8085 | while (p && GET_CODE (p) != CODE_LABEL) | |
8086 | { | |
8087 | /* Don't cse out the end of a loop. This makes a difference | |
8088 | only for the unusual loops that always execute at least once; | |
8089 | all other loops have labels there so we will stop in any case. | |
8090 | Cse'ing out the end of the loop is dangerous because it | |
8091 | might cause an invariant expression inside the loop | |
8092 | to be reused after the end of the loop. This would make it | |
8093 | hard to move the expression out of the loop in loop.c, | |
8094 | especially if it is one of several equivalent expressions | |
8095 | and loop.c would like to eliminate it. | |
8096 | ||
8097 | If we are running after loop.c has finished, we can ignore | |
8098 | the NOTE_INSN_LOOP_END. */ | |
8099 | ||
8100 | if (! after_loop && GET_CODE (p) == NOTE | |
8101 | && NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END) | |
8102 | break; | |
8103 | ||
8104 | /* Don't cse over a call to setjmp; on some machines (eg vax) | |
8105 | the regs restored by the longjmp come from | |
8106 | a later time than the setjmp. */ | |
8107 | if (GET_CODE (p) == NOTE | |
8108 | && NOTE_LINE_NUMBER (p) == NOTE_INSN_SETJMP) | |
8109 | break; | |
8110 | ||
8111 | /* A PARALLEL can have lots of SETs in it, | |
8112 | especially if it is really an ASM_OPERANDS. */ | |
8113 | if (GET_RTX_CLASS (GET_CODE (p)) == 'i' | |
8114 | && GET_CODE (PATTERN (p)) == PARALLEL) | |
8115 | nsets += XVECLEN (PATTERN (p), 0); | |
8116 | else if (GET_CODE (p) != NOTE) | |
8117 | nsets += 1; | |
8118 | ||
164c8956 RK |
8119 | /* Ignore insns made by CSE; they cannot affect the boundaries of |
8120 | the basic block. */ | |
8121 | ||
8122 | if (INSN_UID (p) <= max_uid && INSN_CUID (p) > high_cuid) | |
8b3686ed | 8123 | high_cuid = INSN_CUID (p); |
164c8956 RK |
8124 | if (INSN_UID (p) <= max_uid && INSN_CUID (p) < low_cuid) |
8125 | low_cuid = INSN_CUID (p); | |
7afe21cc RK |
8126 | |
8127 | /* See if this insn is in our branch path. If it is and we are to | |
8128 | take it, do so. */ | |
8129 | if (path_entry < path_size && data->path[path_entry].branch == p) | |
8130 | { | |
8b3686ed | 8131 | if (data->path[path_entry].status != NOT_TAKEN) |
7afe21cc RK |
8132 | p = JUMP_LABEL (p); |
8133 | ||
8134 | /* Point to next entry in path, if any. */ | |
8135 | path_entry++; | |
8136 | } | |
8137 | ||
8138 | /* If this is a conditional jump, we can follow it if -fcse-follow-jumps | |
8139 | was specified, we haven't reached our maximum path length, there are | |
8140 | insns following the target of the jump, this is the only use of the | |
8b3686ed RK |
8141 | jump label, and the target label is preceded by a BARRIER. |
8142 | ||
8143 | Alternatively, we can follow the jump if it branches around a | |
8144 | block of code and there are no other branches into the block. | |
8145 | In this case invalidate_skipped_block will be called to invalidate any | |
8146 | registers set in the block when following the jump. */ | |
8147 | ||
8148 | else if ((follow_jumps || skip_blocks) && path_size < PATHLENGTH - 1 | |
7afe21cc RK |
8149 | && GET_CODE (p) == JUMP_INSN |
8150 | && GET_CODE (PATTERN (p)) == SET | |
8151 | && GET_CODE (SET_SRC (PATTERN (p))) == IF_THEN_ELSE | |
8152 | && LABEL_NUSES (JUMP_LABEL (p)) == 1 | |
8153 | && NEXT_INSN (JUMP_LABEL (p)) != 0) | |
8154 | { | |
8155 | for (q = PREV_INSN (JUMP_LABEL (p)); q; q = PREV_INSN (q)) | |
8156 | if ((GET_CODE (q) != NOTE | |
8157 | || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END | |
8158 | || NOTE_LINE_NUMBER (q) == NOTE_INSN_SETJMP) | |
8159 | && (GET_CODE (q) != CODE_LABEL || LABEL_NUSES (q) != 0)) | |
8160 | break; | |
8161 | ||
8162 | /* If we ran into a BARRIER, this code is an extension of the | |
8163 | basic block when the branch is taken. */ | |
8b3686ed | 8164 | if (follow_jumps && q != 0 && GET_CODE (q) == BARRIER) |
7afe21cc RK |
8165 | { |
8166 | /* Don't allow ourself to keep walking around an | |
8167 | always-executed loop. */ | |
fc3ffe83 RK |
8168 | if (next_real_insn (q) == next) |
8169 | { | |
8170 | p = NEXT_INSN (p); | |
8171 | continue; | |
8172 | } | |
7afe21cc RK |
8173 | |
8174 | /* Similarly, don't put a branch in our path more than once. */ | |
8175 | for (i = 0; i < path_entry; i++) | |
8176 | if (data->path[i].branch == p) | |
8177 | break; | |
8178 | ||
8179 | if (i != path_entry) | |
8180 | break; | |
8181 | ||
8182 | data->path[path_entry].branch = p; | |
8183 | data->path[path_entry++].status = TAKEN; | |
8184 | ||
8185 | /* This branch now ends our path. It was possible that we | |
8186 | didn't see this branch the last time around (when the | |
8187 | insn in front of the target was a JUMP_INSN that was | |
8188 | turned into a no-op). */ | |
8189 | path_size = path_entry; | |
8190 | ||
8191 | p = JUMP_LABEL (p); | |
8192 | /* Mark block so we won't scan it again later. */ | |
8193 | PUT_MODE (NEXT_INSN (p), QImode); | |
8194 | } | |
8b3686ed RK |
8195 | /* Detect a branch around a block of code. */ |
8196 | else if (skip_blocks && q != 0 && GET_CODE (q) != CODE_LABEL) | |
8197 | { | |
8198 | register rtx tmp; | |
8199 | ||
fc3ffe83 RK |
8200 | if (next_real_insn (q) == next) |
8201 | { | |
8202 | p = NEXT_INSN (p); | |
8203 | continue; | |
8204 | } | |
8b3686ed RK |
8205 | |
8206 | for (i = 0; i < path_entry; i++) | |
8207 | if (data->path[i].branch == p) | |
8208 | break; | |
8209 | ||
8210 | if (i != path_entry) | |
8211 | break; | |
8212 | ||
8213 | /* This is no_labels_between_p (p, q) with an added check for | |
8214 | reaching the end of a function (in case Q precedes P). */ | |
8215 | for (tmp = NEXT_INSN (p); tmp && tmp != q; tmp = NEXT_INSN (tmp)) | |
8216 | if (GET_CODE (tmp) == CODE_LABEL) | |
8217 | break; | |
8218 | ||
8219 | if (tmp == q) | |
8220 | { | |
8221 | data->path[path_entry].branch = p; | |
8222 | data->path[path_entry++].status = AROUND; | |
8223 | ||
8224 | path_size = path_entry; | |
8225 | ||
8226 | p = JUMP_LABEL (p); | |
8227 | /* Mark block so we won't scan it again later. */ | |
8228 | PUT_MODE (NEXT_INSN (p), QImode); | |
8229 | } | |
8230 | } | |
7afe21cc | 8231 | } |
7afe21cc RK |
8232 | p = NEXT_INSN (p); |
8233 | } | |
8234 | ||
8235 | data->low_cuid = low_cuid; | |
8236 | data->high_cuid = high_cuid; | |
8237 | data->nsets = nsets; | |
8238 | data->last = p; | |
8239 | ||
8240 | /* If all jumps in the path are not taken, set our path length to zero | |
8241 | so a rescan won't be done. */ | |
8242 | for (i = path_size - 1; i >= 0; i--) | |
8b3686ed | 8243 | if (data->path[i].status != NOT_TAKEN) |
7afe21cc RK |
8244 | break; |
8245 | ||
8246 | if (i == -1) | |
8247 | data->path_size = 0; | |
8248 | else | |
8249 | data->path_size = path_size; | |
8250 | ||
8251 | /* End the current branch path. */ | |
8252 | data->path[path_size].branch = 0; | |
8253 | } | |
8254 | \f | |
7afe21cc RK |
8255 | /* Perform cse on the instructions of a function. |
8256 | F is the first instruction. | |
8257 | NREGS is one plus the highest pseudo-reg number used in the instruction. | |
8258 | ||
8259 | AFTER_LOOP is 1 if this is the cse call done after loop optimization | |
8260 | (only if -frerun-cse-after-loop). | |
8261 | ||
8262 | Returns 1 if jump_optimize should be redone due to simplifications | |
8263 | in conditional jump instructions. */ | |
8264 | ||
8265 | int | |
8266 | cse_main (f, nregs, after_loop, file) | |
8267 | rtx f; | |
8268 | int nregs; | |
8269 | int after_loop; | |
8270 | FILE *file; | |
8271 | { | |
8272 | struct cse_basic_block_data val; | |
8273 | register rtx insn = f; | |
8274 | register int i; | |
8275 | ||
8276 | cse_jumps_altered = 0; | |
a5dfb4ee | 8277 | recorded_label_ref = 0; |
7afe21cc RK |
8278 | constant_pool_entries_cost = 0; |
8279 | val.path_size = 0; | |
8280 | ||
8281 | init_recog (); | |
8282 | ||
8283 | max_reg = nregs; | |
8284 | ||
8285 | all_minus_one = (int *) alloca (nregs * sizeof (int)); | |
8286 | consec_ints = (int *) alloca (nregs * sizeof (int)); | |
8287 | ||
8288 | for (i = 0; i < nregs; i++) | |
8289 | { | |
8290 | all_minus_one[i] = -1; | |
8291 | consec_ints[i] = i; | |
8292 | } | |
8293 | ||
8294 | reg_next_eqv = (int *) alloca (nregs * sizeof (int)); | |
8295 | reg_prev_eqv = (int *) alloca (nregs * sizeof (int)); | |
8296 | reg_qty = (int *) alloca (nregs * sizeof (int)); | |
8297 | reg_in_table = (int *) alloca (nregs * sizeof (int)); | |
8298 | reg_tick = (int *) alloca (nregs * sizeof (int)); | |
8299 | ||
7bac1be0 RK |
8300 | #ifdef LOAD_EXTEND_OP |
8301 | ||
8302 | /* Allocate scratch rtl here. cse_insn will fill in the memory reference | |
8303 | and change the code and mode as appropriate. */ | |
8304 | memory_extend_rtx = gen_rtx (ZERO_EXTEND, VOIDmode, 0); | |
8305 | #endif | |
8306 | ||
7afe21cc RK |
8307 | /* Discard all the free elements of the previous function |
8308 | since they are allocated in the temporarily obstack. */ | |
4c9a05bc | 8309 | bzero ((char *) table, sizeof table); |
7afe21cc RK |
8310 | free_element_chain = 0; |
8311 | n_elements_made = 0; | |
8312 | ||
8313 | /* Find the largest uid. */ | |
8314 | ||
164c8956 RK |
8315 | max_uid = get_max_uid (); |
8316 | uid_cuid = (int *) alloca ((max_uid + 1) * sizeof (int)); | |
4c9a05bc | 8317 | bzero ((char *) uid_cuid, (max_uid + 1) * sizeof (int)); |
7afe21cc RK |
8318 | |
8319 | /* Compute the mapping from uids to cuids. | |
8320 | CUIDs are numbers assigned to insns, like uids, | |
8321 | except that cuids increase monotonically through the code. | |
8322 | Don't assign cuids to line-number NOTEs, so that the distance in cuids | |
8323 | between two insns is not affected by -g. */ | |
8324 | ||
8325 | for (insn = f, i = 0; insn; insn = NEXT_INSN (insn)) | |
8326 | { | |
8327 | if (GET_CODE (insn) != NOTE | |
8328 | || NOTE_LINE_NUMBER (insn) < 0) | |
8329 | INSN_CUID (insn) = ++i; | |
8330 | else | |
8331 | /* Give a line number note the same cuid as preceding insn. */ | |
8332 | INSN_CUID (insn) = i; | |
8333 | } | |
8334 | ||
8335 | /* Initialize which registers are clobbered by calls. */ | |
8336 | ||
8337 | CLEAR_HARD_REG_SET (regs_invalidated_by_call); | |
8338 | ||
8339 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
8340 | if ((call_used_regs[i] | |
8341 | /* Used to check !fixed_regs[i] here, but that isn't safe; | |
8342 | fixed regs are still call-clobbered, and sched can get | |
8343 | confused if they can "live across calls". | |
8344 | ||
8345 | The frame pointer is always preserved across calls. The arg | |
8346 | pointer is if it is fixed. The stack pointer usually is, unless | |
8347 | RETURN_POPS_ARGS, in which case an explicit CLOBBER | |
8348 | will be present. If we are generating PIC code, the PIC offset | |
8349 | table register is preserved across calls. */ | |
8350 | ||
8351 | && i != STACK_POINTER_REGNUM | |
8352 | && i != FRAME_POINTER_REGNUM | |
8bc169f2 DE |
8353 | #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM |
8354 | && i != HARD_FRAME_POINTER_REGNUM | |
8355 | #endif | |
7afe21cc RK |
8356 | #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM |
8357 | && ! (i == ARG_POINTER_REGNUM && fixed_regs[i]) | |
8358 | #endif | |
be8fe470 | 8359 | #if defined (PIC_OFFSET_TABLE_REGNUM) && !defined (PIC_OFFSET_TABLE_REG_CALL_CLOBBERED) |
7afe21cc RK |
8360 | && ! (i == PIC_OFFSET_TABLE_REGNUM && flag_pic) |
8361 | #endif | |
8362 | ) | |
8363 | || global_regs[i]) | |
8364 | SET_HARD_REG_BIT (regs_invalidated_by_call, i); | |
8365 | ||
8366 | /* Loop over basic blocks. | |
8367 | Compute the maximum number of qty's needed for each basic block | |
8368 | (which is 2 for each SET). */ | |
8369 | insn = f; | |
8370 | while (insn) | |
8371 | { | |
8b3686ed RK |
8372 | cse_end_of_basic_block (insn, &val, flag_cse_follow_jumps, after_loop, |
8373 | flag_cse_skip_blocks); | |
7afe21cc RK |
8374 | |
8375 | /* If this basic block was already processed or has no sets, skip it. */ | |
8376 | if (val.nsets == 0 || GET_MODE (insn) == QImode) | |
8377 | { | |
8378 | PUT_MODE (insn, VOIDmode); | |
8379 | insn = (val.last ? NEXT_INSN (val.last) : 0); | |
8380 | val.path_size = 0; | |
8381 | continue; | |
8382 | } | |
8383 | ||
8384 | cse_basic_block_start = val.low_cuid; | |
8385 | cse_basic_block_end = val.high_cuid; | |
8386 | max_qty = val.nsets * 2; | |
8387 | ||
8388 | if (file) | |
8389 | fprintf (file, ";; Processing block from %d to %d, %d sets.\n", | |
8390 | INSN_UID (insn), val.last ? INSN_UID (val.last) : 0, | |
8391 | val.nsets); | |
8392 | ||
8393 | /* Make MAX_QTY bigger to give us room to optimize | |
8394 | past the end of this basic block, if that should prove useful. */ | |
8395 | if (max_qty < 500) | |
8396 | max_qty = 500; | |
8397 | ||
8398 | max_qty += max_reg; | |
8399 | ||
8400 | /* If this basic block is being extended by following certain jumps, | |
8401 | (see `cse_end_of_basic_block'), we reprocess the code from the start. | |
8402 | Otherwise, we start after this basic block. */ | |
8403 | if (val.path_size > 0) | |
8404 | cse_basic_block (insn, val.last, val.path, 0); | |
8405 | else | |
8406 | { | |
8407 | int old_cse_jumps_altered = cse_jumps_altered; | |
8408 | rtx temp; | |
8409 | ||
8410 | /* When cse changes a conditional jump to an unconditional | |
8411 | jump, we want to reprocess the block, since it will give | |
8412 | us a new branch path to investigate. */ | |
8413 | cse_jumps_altered = 0; | |
8414 | temp = cse_basic_block (insn, val.last, val.path, ! after_loop); | |
8b3686ed RK |
8415 | if (cse_jumps_altered == 0 |
8416 | || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0)) | |
7afe21cc RK |
8417 | insn = temp; |
8418 | ||
8419 | cse_jumps_altered |= old_cse_jumps_altered; | |
8420 | } | |
8421 | ||
8422 | #ifdef USE_C_ALLOCA | |
8423 | alloca (0); | |
8424 | #endif | |
8425 | } | |
8426 | ||
8427 | /* Tell refers_to_mem_p that qty_const info is not available. */ | |
8428 | qty_const = 0; | |
8429 | ||
8430 | if (max_elements_made < n_elements_made) | |
8431 | max_elements_made = n_elements_made; | |
8432 | ||
a5dfb4ee | 8433 | return cse_jumps_altered || recorded_label_ref; |
7afe21cc RK |
8434 | } |
8435 | ||
8436 | /* Process a single basic block. FROM and TO and the limits of the basic | |
8437 | block. NEXT_BRANCH points to the branch path when following jumps or | |
8438 | a null path when not following jumps. | |
8439 | ||
8440 | AROUND_LOOP is non-zero if we are to try to cse around to the start of a | |
8441 | loop. This is true when we are being called for the last time on a | |
8442 | block and this CSE pass is before loop.c. */ | |
8443 | ||
8444 | static rtx | |
8445 | cse_basic_block (from, to, next_branch, around_loop) | |
8446 | register rtx from, to; | |
8447 | struct branch_path *next_branch; | |
8448 | int around_loop; | |
8449 | { | |
8450 | register rtx insn; | |
8451 | int to_usage = 0; | |
8452 | int in_libcall_block = 0; | |
8453 | ||
8454 | /* Each of these arrays is undefined before max_reg, so only allocate | |
8455 | the space actually needed and adjust the start below. */ | |
8456 | ||
8457 | qty_first_reg = (int *) alloca ((max_qty - max_reg) * sizeof (int)); | |
8458 | qty_last_reg = (int *) alloca ((max_qty - max_reg) * sizeof (int)); | |
8459 | qty_mode= (enum machine_mode *) alloca ((max_qty - max_reg) * sizeof (enum machine_mode)); | |
8460 | qty_const = (rtx *) alloca ((max_qty - max_reg) * sizeof (rtx)); | |
8461 | qty_const_insn = (rtx *) alloca ((max_qty - max_reg) * sizeof (rtx)); | |
8462 | qty_comparison_code | |
8463 | = (enum rtx_code *) alloca ((max_qty - max_reg) * sizeof (enum rtx_code)); | |
8464 | qty_comparison_qty = (int *) alloca ((max_qty - max_reg) * sizeof (int)); | |
8465 | qty_comparison_const = (rtx *) alloca ((max_qty - max_reg) * sizeof (rtx)); | |
8466 | ||
8467 | qty_first_reg -= max_reg; | |
8468 | qty_last_reg -= max_reg; | |
8469 | qty_mode -= max_reg; | |
8470 | qty_const -= max_reg; | |
8471 | qty_const_insn -= max_reg; | |
8472 | qty_comparison_code -= max_reg; | |
8473 | qty_comparison_qty -= max_reg; | |
8474 | qty_comparison_const -= max_reg; | |
8475 | ||
8476 | new_basic_block (); | |
8477 | ||
8478 | /* TO might be a label. If so, protect it from being deleted. */ | |
8479 | if (to != 0 && GET_CODE (to) == CODE_LABEL) | |
8480 | ++LABEL_NUSES (to); | |
8481 | ||
8482 | for (insn = from; insn != to; insn = NEXT_INSN (insn)) | |
8483 | { | |
8484 | register enum rtx_code code; | |
8485 | ||
8486 | /* See if this is a branch that is part of the path. If so, and it is | |
8487 | to be taken, do so. */ | |
8488 | if (next_branch->branch == insn) | |
8489 | { | |
8b3686ed RK |
8490 | enum taken status = next_branch++->status; |
8491 | if (status != NOT_TAKEN) | |
7afe21cc | 8492 | { |
8b3686ed RK |
8493 | if (status == TAKEN) |
8494 | record_jump_equiv (insn, 1); | |
8495 | else | |
8496 | invalidate_skipped_block (NEXT_INSN (insn)); | |
8497 | ||
7afe21cc RK |
8498 | /* Set the last insn as the jump insn; it doesn't affect cc0. |
8499 | Then follow this branch. */ | |
8500 | #ifdef HAVE_cc0 | |
8501 | prev_insn_cc0 = 0; | |
8502 | #endif | |
8503 | prev_insn = insn; | |
8504 | insn = JUMP_LABEL (insn); | |
8505 | continue; | |
8506 | } | |
8507 | } | |
8508 | ||
8509 | code = GET_CODE (insn); | |
8510 | if (GET_MODE (insn) == QImode) | |
8511 | PUT_MODE (insn, VOIDmode); | |
8512 | ||
8513 | if (GET_RTX_CLASS (code) == 'i') | |
8514 | { | |
8515 | /* Process notes first so we have all notes in canonical forms when | |
8516 | looking for duplicate operations. */ | |
8517 | ||
8518 | if (REG_NOTES (insn)) | |
906c4e36 | 8519 | REG_NOTES (insn) = cse_process_notes (REG_NOTES (insn), NULL_RTX); |
7afe21cc RK |
8520 | |
8521 | /* Track when we are inside in LIBCALL block. Inside such a block, | |
8522 | we do not want to record destinations. The last insn of a | |
8523 | LIBCALL block is not considered to be part of the block, since | |
830a38ee | 8524 | its destination is the result of the block and hence should be |
7afe21cc RK |
8525 | recorded. */ |
8526 | ||
906c4e36 | 8527 | if (find_reg_note (insn, REG_LIBCALL, NULL_RTX)) |
7afe21cc | 8528 | in_libcall_block = 1; |
906c4e36 | 8529 | else if (find_reg_note (insn, REG_RETVAL, NULL_RTX)) |
7afe21cc RK |
8530 | in_libcall_block = 0; |
8531 | ||
8532 | cse_insn (insn, in_libcall_block); | |
8533 | } | |
8534 | ||
8535 | /* If INSN is now an unconditional jump, skip to the end of our | |
8536 | basic block by pretending that we just did the last insn in the | |
8537 | basic block. If we are jumping to the end of our block, show | |
8538 | that we can have one usage of TO. */ | |
8539 | ||
8540 | if (simplejump_p (insn)) | |
8541 | { | |
8542 | if (to == 0) | |
8543 | return 0; | |
8544 | ||
8545 | if (JUMP_LABEL (insn) == to) | |
8546 | to_usage = 1; | |
8547 | ||
6a5293dc RS |
8548 | /* Maybe TO was deleted because the jump is unconditional. |
8549 | If so, there is nothing left in this basic block. */ | |
8550 | /* ??? Perhaps it would be smarter to set TO | |
8551 | to whatever follows this insn, | |
8552 | and pretend the basic block had always ended here. */ | |
8553 | if (INSN_DELETED_P (to)) | |
8554 | break; | |
8555 | ||
7afe21cc RK |
8556 | insn = PREV_INSN (to); |
8557 | } | |
8558 | ||
8559 | /* See if it is ok to keep on going past the label | |
8560 | which used to end our basic block. Remember that we incremented | |
d45cf215 | 8561 | the count of that label, so we decrement it here. If we made |
7afe21cc RK |
8562 | a jump unconditional, TO_USAGE will be one; in that case, we don't |
8563 | want to count the use in that jump. */ | |
8564 | ||
8565 | if (to != 0 && NEXT_INSN (insn) == to | |
8566 | && GET_CODE (to) == CODE_LABEL && --LABEL_NUSES (to) == to_usage) | |
8567 | { | |
8568 | struct cse_basic_block_data val; | |
146135d6 | 8569 | rtx prev; |
7afe21cc RK |
8570 | |
8571 | insn = NEXT_INSN (to); | |
8572 | ||
8573 | if (LABEL_NUSES (to) == 0) | |
146135d6 | 8574 | insn = delete_insn (to); |
7afe21cc | 8575 | |
146135d6 RK |
8576 | /* If TO was the last insn in the function, we are done. */ |
8577 | if (insn == 0) | |
7afe21cc RK |
8578 | return 0; |
8579 | ||
146135d6 RK |
8580 | /* If TO was preceded by a BARRIER we are done with this block |
8581 | because it has no continuation. */ | |
8582 | prev = prev_nonnote_insn (to); | |
8583 | if (prev && GET_CODE (prev) == BARRIER) | |
8584 | return insn; | |
8585 | ||
8586 | /* Find the end of the following block. Note that we won't be | |
8587 | following branches in this case. */ | |
7afe21cc RK |
8588 | to_usage = 0; |
8589 | val.path_size = 0; | |
8b3686ed | 8590 | cse_end_of_basic_block (insn, &val, 0, 0, 0); |
7afe21cc RK |
8591 | |
8592 | /* If the tables we allocated have enough space left | |
8593 | to handle all the SETs in the next basic block, | |
8594 | continue through it. Otherwise, return, | |
8595 | and that block will be scanned individually. */ | |
8596 | if (val.nsets * 2 + next_qty > max_qty) | |
8597 | break; | |
8598 | ||
8599 | cse_basic_block_start = val.low_cuid; | |
8600 | cse_basic_block_end = val.high_cuid; | |
8601 | to = val.last; | |
8602 | ||
8603 | /* Prevent TO from being deleted if it is a label. */ | |
8604 | if (to != 0 && GET_CODE (to) == CODE_LABEL) | |
8605 | ++LABEL_NUSES (to); | |
8606 | ||
8607 | /* Back up so we process the first insn in the extension. */ | |
8608 | insn = PREV_INSN (insn); | |
8609 | } | |
8610 | } | |
8611 | ||
8612 | if (next_qty > max_qty) | |
8613 | abort (); | |
8614 | ||
8615 | /* If we are running before loop.c, we stopped on a NOTE_INSN_LOOP_END, and | |
8616 | the previous insn is the only insn that branches to the head of a loop, | |
8617 | we can cse into the loop. Don't do this if we changed the jump | |
8618 | structure of a loop unless we aren't going to be following jumps. */ | |
8619 | ||
8b3686ed RK |
8620 | if ((cse_jumps_altered == 0 |
8621 | || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0)) | |
7afe21cc RK |
8622 | && around_loop && to != 0 |
8623 | && GET_CODE (to) == NOTE && NOTE_LINE_NUMBER (to) == NOTE_INSN_LOOP_END | |
8624 | && GET_CODE (PREV_INSN (to)) == JUMP_INSN | |
8625 | && JUMP_LABEL (PREV_INSN (to)) != 0 | |
8626 | && LABEL_NUSES (JUMP_LABEL (PREV_INSN (to))) == 1) | |
8627 | cse_around_loop (JUMP_LABEL (PREV_INSN (to))); | |
8628 | ||
8629 | return to ? NEXT_INSN (to) : 0; | |
8630 | } | |
8631 | \f | |
8632 | /* Count the number of times registers are used (not set) in X. | |
8633 | COUNTS is an array in which we accumulate the count, INCR is how much | |
79644f06 RK |
8634 | we count each register usage. |
8635 | ||
8636 | Don't count a usage of DEST, which is the SET_DEST of a SET which | |
8637 | contains X in its SET_SRC. This is because such a SET does not | |
8638 | modify the liveness of DEST. */ | |
7afe21cc RK |
8639 | |
8640 | static void | |
79644f06 | 8641 | count_reg_usage (x, counts, dest, incr) |
7afe21cc RK |
8642 | rtx x; |
8643 | int *counts; | |
79644f06 | 8644 | rtx dest; |
7afe21cc RK |
8645 | int incr; |
8646 | { | |
f1e7c95f | 8647 | enum rtx_code code; |
7afe21cc RK |
8648 | char *fmt; |
8649 | int i, j; | |
8650 | ||
f1e7c95f RK |
8651 | if (x == 0) |
8652 | return; | |
8653 | ||
8654 | switch (code = GET_CODE (x)) | |
7afe21cc RK |
8655 | { |
8656 | case REG: | |
79644f06 RK |
8657 | if (x != dest) |
8658 | counts[REGNO (x)] += incr; | |
7afe21cc RK |
8659 | return; |
8660 | ||
8661 | case PC: | |
8662 | case CC0: | |
8663 | case CONST: | |
8664 | case CONST_INT: | |
8665 | case CONST_DOUBLE: | |
8666 | case SYMBOL_REF: | |
8667 | case LABEL_REF: | |
8668 | case CLOBBER: | |
8669 | return; | |
8670 | ||
8671 | case SET: | |
8672 | /* Unless we are setting a REG, count everything in SET_DEST. */ | |
8673 | if (GET_CODE (SET_DEST (x)) != REG) | |
79644f06 | 8674 | count_reg_usage (SET_DEST (x), counts, NULL_RTX, incr); |
9ff08f70 RK |
8675 | |
8676 | /* If SRC has side-effects, then we can't delete this insn, so the | |
8677 | usage of SET_DEST inside SRC counts. | |
8678 | ||
8679 | ??? Strictly-speaking, we might be preserving this insn | |
8680 | because some other SET has side-effects, but that's hard | |
8681 | to do and can't happen now. */ | |
8682 | count_reg_usage (SET_SRC (x), counts, | |
8683 | side_effects_p (SET_SRC (x)) ? NULL_RTX : SET_DEST (x), | |
8684 | incr); | |
7afe21cc RK |
8685 | return; |
8686 | ||
f1e7c95f RK |
8687 | case CALL_INSN: |
8688 | count_reg_usage (CALL_INSN_FUNCTION_USAGE (x), counts, NULL_RTX, incr); | |
8689 | ||
8690 | /* ... falls through ... */ | |
7afe21cc RK |
8691 | case INSN: |
8692 | case JUMP_INSN: | |
79644f06 | 8693 | count_reg_usage (PATTERN (x), counts, NULL_RTX, incr); |
7afe21cc RK |
8694 | |
8695 | /* Things used in a REG_EQUAL note aren't dead since loop may try to | |
8696 | use them. */ | |
8697 | ||
f1e7c95f | 8698 | count_reg_usage (REG_NOTES (x), counts, NULL_RTX, incr); |
7afe21cc RK |
8699 | return; |
8700 | ||
8701 | case EXPR_LIST: | |
8702 | case INSN_LIST: | |
f1e7c95f RK |
8703 | if (REG_NOTE_KIND (x) == REG_EQUAL |
8704 | || GET_CODE (XEXP (x,0)) == USE) | |
79644f06 | 8705 | count_reg_usage (XEXP (x, 0), counts, NULL_RTX, incr); |
f1e7c95f | 8706 | count_reg_usage (XEXP (x, 1), counts, NULL_RTX, incr); |
7afe21cc RK |
8707 | return; |
8708 | } | |
8709 | ||
8710 | fmt = GET_RTX_FORMAT (code); | |
8711 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
8712 | { | |
8713 | if (fmt[i] == 'e') | |
79644f06 | 8714 | count_reg_usage (XEXP (x, i), counts, dest, incr); |
7afe21cc RK |
8715 | else if (fmt[i] == 'E') |
8716 | for (j = XVECLEN (x, i) - 1; j >= 0; j--) | |
79644f06 | 8717 | count_reg_usage (XVECEXP (x, i, j), counts, dest, incr); |
7afe21cc RK |
8718 | } |
8719 | } | |
8720 | \f | |
8721 | /* Scan all the insns and delete any that are dead; i.e., they store a register | |
8722 | that is never used or they copy a register to itself. | |
8723 | ||
8724 | This is used to remove insns made obviously dead by cse. It improves the | |
8725 | heuristics in loop since it won't try to move dead invariants out of loops | |
8726 | or make givs for dead quantities. The remaining passes of the compilation | |
8727 | are also sped up. */ | |
8728 | ||
8729 | void | |
8730 | delete_dead_from_cse (insns, nreg) | |
8731 | rtx insns; | |
8732 | int nreg; | |
8733 | { | |
8734 | int *counts = (int *) alloca (nreg * sizeof (int)); | |
77fa0940 | 8735 | rtx insn, prev; |
d45cf215 | 8736 | rtx tem; |
7afe21cc | 8737 | int i; |
e4890d45 | 8738 | int in_libcall = 0; |
7afe21cc RK |
8739 | |
8740 | /* First count the number of times each register is used. */ | |
4c9a05bc | 8741 | bzero ((char *) counts, sizeof (int) * nreg); |
7afe21cc | 8742 | for (insn = next_real_insn (insns); insn; insn = next_real_insn (insn)) |
79644f06 | 8743 | count_reg_usage (insn, counts, NULL_RTX, 1); |
7afe21cc RK |
8744 | |
8745 | /* Go from the last insn to the first and delete insns that only set unused | |
8746 | registers or copy a register to itself. As we delete an insn, remove | |
8747 | usage counts for registers it uses. */ | |
77fa0940 | 8748 | for (insn = prev_real_insn (get_last_insn ()); insn; insn = prev) |
7afe21cc RK |
8749 | { |
8750 | int live_insn = 0; | |
8751 | ||
77fa0940 RK |
8752 | prev = prev_real_insn (insn); |
8753 | ||
e4890d45 | 8754 | /* Don't delete any insns that are part of a libcall block. |
77fa0940 RK |
8755 | Flow or loop might get confused if we did that. Remember |
8756 | that we are scanning backwards. */ | |
906c4e36 | 8757 | if (find_reg_note (insn, REG_RETVAL, NULL_RTX)) |
e4890d45 RS |
8758 | in_libcall = 1; |
8759 | ||
8760 | if (in_libcall) | |
8761 | live_insn = 1; | |
8762 | else if (GET_CODE (PATTERN (insn)) == SET) | |
7afe21cc RK |
8763 | { |
8764 | if (GET_CODE (SET_DEST (PATTERN (insn))) == REG | |
8765 | && SET_DEST (PATTERN (insn)) == SET_SRC (PATTERN (insn))) | |
8766 | ; | |
8767 | ||
d45cf215 RS |
8768 | #ifdef HAVE_cc0 |
8769 | else if (GET_CODE (SET_DEST (PATTERN (insn))) == CC0 | |
8770 | && ! side_effects_p (SET_SRC (PATTERN (insn))) | |
8771 | && ((tem = next_nonnote_insn (insn)) == 0 | |
8772 | || GET_RTX_CLASS (GET_CODE (tem)) != 'i' | |
8773 | || ! reg_referenced_p (cc0_rtx, PATTERN (tem)))) | |
8774 | ; | |
8775 | #endif | |
7afe21cc RK |
8776 | else if (GET_CODE (SET_DEST (PATTERN (insn))) != REG |
8777 | || REGNO (SET_DEST (PATTERN (insn))) < FIRST_PSEUDO_REGISTER | |
8778 | || counts[REGNO (SET_DEST (PATTERN (insn)))] != 0 | |
8779 | || side_effects_p (SET_SRC (PATTERN (insn)))) | |
8780 | live_insn = 1; | |
8781 | } | |
8782 | else if (GET_CODE (PATTERN (insn)) == PARALLEL) | |
8783 | for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--) | |
8784 | { | |
8785 | rtx elt = XVECEXP (PATTERN (insn), 0, i); | |
8786 | ||
8787 | if (GET_CODE (elt) == SET) | |
8788 | { | |
8789 | if (GET_CODE (SET_DEST (elt)) == REG | |
8790 | && SET_DEST (elt) == SET_SRC (elt)) | |
8791 | ; | |
8792 | ||
d45cf215 RS |
8793 | #ifdef HAVE_cc0 |
8794 | else if (GET_CODE (SET_DEST (elt)) == CC0 | |
8795 | && ! side_effects_p (SET_SRC (elt)) | |
8796 | && ((tem = next_nonnote_insn (insn)) == 0 | |
8797 | || GET_RTX_CLASS (GET_CODE (tem)) != 'i' | |
8798 | || ! reg_referenced_p (cc0_rtx, PATTERN (tem)))) | |
8799 | ; | |
8800 | #endif | |
7afe21cc RK |
8801 | else if (GET_CODE (SET_DEST (elt)) != REG |
8802 | || REGNO (SET_DEST (elt)) < FIRST_PSEUDO_REGISTER | |
8803 | || counts[REGNO (SET_DEST (elt))] != 0 | |
8804 | || side_effects_p (SET_SRC (elt))) | |
8805 | live_insn = 1; | |
8806 | } | |
8807 | else if (GET_CODE (elt) != CLOBBER && GET_CODE (elt) != USE) | |
8808 | live_insn = 1; | |
8809 | } | |
8810 | else | |
8811 | live_insn = 1; | |
8812 | ||
8813 | /* If this is a dead insn, delete it and show registers in it aren't | |
e4890d45 | 8814 | being used. */ |
7afe21cc | 8815 | |
e4890d45 | 8816 | if (! live_insn) |
7afe21cc | 8817 | { |
79644f06 | 8818 | count_reg_usage (insn, counts, NULL_RTX, -1); |
77fa0940 | 8819 | delete_insn (insn); |
7afe21cc | 8820 | } |
e4890d45 | 8821 | |
906c4e36 | 8822 | if (find_reg_note (insn, REG_LIBCALL, NULL_RTX)) |
e4890d45 | 8823 | in_libcall = 0; |
7afe21cc RK |
8824 | } |
8825 | } |