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7afe21cc | 1 | /* Common subexpression elimination for GNU compiler. |
5e7b4e25 | 2 | Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998 |
ad616de1 | 3 | 1999, 2000, 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc. |
7afe21cc | 4 | |
1322177d | 5 | This file is part of GCC. |
7afe21cc | 6 | |
1322177d LB |
7 | GCC is free software; you can redistribute it and/or modify it under |
8 | the terms of the GNU General Public License as published by the Free | |
9 | Software Foundation; either version 2, or (at your option) any later | |
10 | version. | |
7afe21cc | 11 | |
1322177d LB |
12 | GCC is distributed in the hope that it will be useful, but WITHOUT ANY |
13 | WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
14 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
15 | for more details. | |
7afe21cc RK |
16 | |
17 | You should have received a copy of the GNU General Public License | |
1322177d | 18 | along with GCC; see the file COPYING. If not, write to the Free |
366ccddb KC |
19 | Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA |
20 | 02110-1301, USA. */ | |
7afe21cc | 21 | |
7afe21cc | 22 | #include "config.h" |
670ee920 KG |
23 | /* stdio.h must precede rtl.h for FFS. */ |
24 | #include "system.h" | |
4977bab6 ZW |
25 | #include "coretypes.h" |
26 | #include "tm.h" | |
7afe21cc | 27 | #include "rtl.h" |
6baf1cc8 | 28 | #include "tm_p.h" |
7afe21cc | 29 | #include "hard-reg-set.h" |
7932a3db | 30 | #include "regs.h" |
630c79be | 31 | #include "basic-block.h" |
7afe21cc RK |
32 | #include "flags.h" |
33 | #include "real.h" | |
34 | #include "insn-config.h" | |
35 | #include "recog.h" | |
49ad7cfa | 36 | #include "function.h" |
956d6950 | 37 | #include "expr.h" |
50b2596f KG |
38 | #include "toplev.h" |
39 | #include "output.h" | |
1497faf6 | 40 | #include "ggc.h" |
3dec4024 | 41 | #include "timevar.h" |
26771da7 | 42 | #include "except.h" |
3c50106f | 43 | #include "target.h" |
9bf8cfbf | 44 | #include "params.h" |
2f93eea8 | 45 | #include "rtlhooks-def.h" |
ef330312 | 46 | #include "tree-pass.h" |
7afe21cc RK |
47 | |
48 | /* The basic idea of common subexpression elimination is to go | |
49 | through the code, keeping a record of expressions that would | |
50 | have the same value at the current scan point, and replacing | |
51 | expressions encountered with the cheapest equivalent expression. | |
52 | ||
53 | It is too complicated to keep track of the different possibilities | |
e48a7fbe JL |
54 | when control paths merge in this code; so, at each label, we forget all |
55 | that is known and start fresh. This can be described as processing each | |
56 | extended basic block separately. We have a separate pass to perform | |
57 | global CSE. | |
58 | ||
59 | Note CSE can turn a conditional or computed jump into a nop or | |
60 | an unconditional jump. When this occurs we arrange to run the jump | |
61 | optimizer after CSE to delete the unreachable code. | |
7afe21cc RK |
62 | |
63 | We use two data structures to record the equivalent expressions: | |
1bb98cec DM |
64 | a hash table for most expressions, and a vector of "quantity |
65 | numbers" to record equivalent (pseudo) registers. | |
7afe21cc RK |
66 | |
67 | The use of the special data structure for registers is desirable | |
68 | because it is faster. It is possible because registers references | |
69 | contain a fairly small number, the register number, taken from | |
70 | a contiguously allocated series, and two register references are | |
71 | identical if they have the same number. General expressions | |
72 | do not have any such thing, so the only way to retrieve the | |
73 | information recorded on an expression other than a register | |
74 | is to keep it in a hash table. | |
75 | ||
76 | Registers and "quantity numbers": | |
278a83b2 | 77 | |
7afe21cc RK |
78 | At the start of each basic block, all of the (hardware and pseudo) |
79 | registers used in the function are given distinct quantity | |
80 | numbers to indicate their contents. During scan, when the code | |
81 | copies one register into another, we copy the quantity number. | |
82 | When a register is loaded in any other way, we allocate a new | |
83 | quantity number to describe the value generated by this operation. | |
459281be | 84 | `REG_QTY (N)' records what quantity register N is currently thought |
7afe21cc RK |
85 | of as containing. |
86 | ||
08a69267 | 87 | All real quantity numbers are greater than or equal to zero. |
459281be | 88 | If register N has not been assigned a quantity, `REG_QTY (N)' will |
08a69267 | 89 | equal -N - 1, which is always negative. |
7afe21cc | 90 | |
08a69267 RS |
91 | Quantity numbers below zero do not exist and none of the `qty_table' |
92 | entries should be referenced with a negative index. | |
7afe21cc RK |
93 | |
94 | We also maintain a bidirectional chain of registers for each | |
1bb98cec DM |
95 | quantity number. The `qty_table` members `first_reg' and `last_reg', |
96 | and `reg_eqv_table' members `next' and `prev' hold these chains. | |
7afe21cc RK |
97 | |
98 | The first register in a chain is the one whose lifespan is least local. | |
99 | Among equals, it is the one that was seen first. | |
100 | We replace any equivalent register with that one. | |
101 | ||
102 | If two registers have the same quantity number, it must be true that | |
1bb98cec | 103 | REG expressions with qty_table `mode' must be in the hash table for both |
7afe21cc RK |
104 | registers and must be in the same class. |
105 | ||
106 | The converse is not true. Since hard registers may be referenced in | |
107 | any mode, two REG expressions might be equivalent in the hash table | |
108 | but not have the same quantity number if the quantity number of one | |
109 | of the registers is not the same mode as those expressions. | |
278a83b2 | 110 | |
7afe21cc RK |
111 | Constants and quantity numbers |
112 | ||
113 | When a quantity has a known constant value, that value is stored | |
1bb98cec | 114 | in the appropriate qty_table `const_rtx'. This is in addition to |
7afe21cc RK |
115 | putting the constant in the hash table as is usual for non-regs. |
116 | ||
d45cf215 | 117 | Whether a reg or a constant is preferred is determined by the configuration |
7afe21cc RK |
118 | macro CONST_COSTS and will often depend on the constant value. In any |
119 | event, expressions containing constants can be simplified, by fold_rtx. | |
120 | ||
121 | When a quantity has a known nearly constant value (such as an address | |
1bb98cec DM |
122 | of a stack slot), that value is stored in the appropriate qty_table |
123 | `const_rtx'. | |
7afe21cc RK |
124 | |
125 | Integer constants don't have a machine mode. However, cse | |
126 | determines the intended machine mode from the destination | |
127 | of the instruction that moves the constant. The machine mode | |
128 | is recorded in the hash table along with the actual RTL | |
129 | constant expression so that different modes are kept separate. | |
130 | ||
131 | Other expressions: | |
132 | ||
133 | To record known equivalences among expressions in general | |
134 | we use a hash table called `table'. It has a fixed number of buckets | |
135 | that contain chains of `struct table_elt' elements for expressions. | |
136 | These chains connect the elements whose expressions have the same | |
137 | hash codes. | |
138 | ||
139 | Other chains through the same elements connect the elements which | |
140 | currently have equivalent values. | |
141 | ||
142 | Register references in an expression are canonicalized before hashing | |
1bb98cec | 143 | the expression. This is done using `reg_qty' and qty_table `first_reg'. |
7afe21cc RK |
144 | The hash code of a register reference is computed using the quantity |
145 | number, not the register number. | |
146 | ||
147 | When the value of an expression changes, it is necessary to remove from the | |
148 | hash table not just that expression but all expressions whose values | |
149 | could be different as a result. | |
150 | ||
151 | 1. If the value changing is in memory, except in special cases | |
152 | ANYTHING referring to memory could be changed. That is because | |
153 | nobody knows where a pointer does not point. | |
154 | The function `invalidate_memory' removes what is necessary. | |
155 | ||
156 | The special cases are when the address is constant or is | |
157 | a constant plus a fixed register such as the frame pointer | |
158 | or a static chain pointer. When such addresses are stored in, | |
159 | we can tell exactly which other such addresses must be invalidated | |
160 | due to overlap. `invalidate' does this. | |
161 | All expressions that refer to non-constant | |
162 | memory addresses are also invalidated. `invalidate_memory' does this. | |
163 | ||
164 | 2. If the value changing is a register, all expressions | |
165 | containing references to that register, and only those, | |
166 | must be removed. | |
167 | ||
168 | Because searching the entire hash table for expressions that contain | |
169 | a register is very slow, we try to figure out when it isn't necessary. | |
170 | Precisely, this is necessary only when expressions have been | |
171 | entered in the hash table using this register, and then the value has | |
172 | changed, and then another expression wants to be added to refer to | |
173 | the register's new value. This sequence of circumstances is rare | |
174 | within any one basic block. | |
175 | ||
459281be KH |
176 | `REG_TICK' and `REG_IN_TABLE', accessors for members of |
177 | cse_reg_info, are used to detect this case. REG_TICK (i) is | |
178 | incremented whenever a value is stored in register i. | |
179 | REG_IN_TABLE (i) holds -1 if no references to register i have been | |
180 | entered in the table; otherwise, it contains the value REG_TICK (i) | |
181 | had when the references were entered. If we want to enter a | |
182 | reference and REG_IN_TABLE (i) != REG_TICK (i), we must scan and | |
183 | remove old references. Until we want to enter a new entry, the | |
184 | mere fact that the two vectors don't match makes the entries be | |
185 | ignored if anyone tries to match them. | |
7afe21cc RK |
186 | |
187 | Registers themselves are entered in the hash table as well as in | |
459281be KH |
188 | the equivalent-register chains. However, `REG_TICK' and |
189 | `REG_IN_TABLE' do not apply to expressions which are simple | |
7afe21cc RK |
190 | register references. These expressions are removed from the table |
191 | immediately when they become invalid, and this can be done even if | |
192 | we do not immediately search for all the expressions that refer to | |
193 | the register. | |
194 | ||
195 | A CLOBBER rtx in an instruction invalidates its operand for further | |
196 | reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK | |
197 | invalidates everything that resides in memory. | |
198 | ||
199 | Related expressions: | |
200 | ||
201 | Constant expressions that differ only by an additive integer | |
202 | are called related. When a constant expression is put in | |
203 | the table, the related expression with no constant term | |
204 | is also entered. These are made to point at each other | |
205 | so that it is possible to find out if there exists any | |
206 | register equivalent to an expression related to a given expression. */ | |
278a83b2 | 207 | |
1bb98cec DM |
208 | /* Length of qty_table vector. We know in advance we will not need |
209 | a quantity number this big. */ | |
7afe21cc RK |
210 | |
211 | static int max_qty; | |
212 | ||
213 | /* Next quantity number to be allocated. | |
214 | This is 1 + the largest number needed so far. */ | |
215 | ||
216 | static int next_qty; | |
217 | ||
1bb98cec | 218 | /* Per-qty information tracking. |
7afe21cc | 219 | |
1bb98cec DM |
220 | `first_reg' and `last_reg' track the head and tail of the |
221 | chain of registers which currently contain this quantity. | |
7afe21cc | 222 | |
1bb98cec | 223 | `mode' contains the machine mode of this quantity. |
7afe21cc | 224 | |
1bb98cec DM |
225 | `const_rtx' holds the rtx of the constant value of this |
226 | quantity, if known. A summations of the frame/arg pointer | |
227 | and a constant can also be entered here. When this holds | |
228 | a known value, `const_insn' is the insn which stored the | |
229 | constant value. | |
7afe21cc | 230 | |
1bb98cec DM |
231 | `comparison_{code,const,qty}' are used to track when a |
232 | comparison between a quantity and some constant or register has | |
233 | been passed. In such a case, we know the results of the comparison | |
234 | in case we see it again. These members record a comparison that | |
235 | is known to be true. `comparison_code' holds the rtx code of such | |
236 | a comparison, else it is set to UNKNOWN and the other two | |
237 | comparison members are undefined. `comparison_const' holds | |
238 | the constant being compared against, or zero if the comparison | |
239 | is not against a constant. `comparison_qty' holds the quantity | |
240 | being compared against when the result is known. If the comparison | |
241 | is not with a register, `comparison_qty' is -1. */ | |
7afe21cc | 242 | |
1bb98cec DM |
243 | struct qty_table_elem |
244 | { | |
245 | rtx const_rtx; | |
246 | rtx const_insn; | |
247 | rtx comparison_const; | |
248 | int comparison_qty; | |
770ae6cc | 249 | unsigned int first_reg, last_reg; |
496324d0 DN |
250 | /* The sizes of these fields should match the sizes of the |
251 | code and mode fields of struct rtx_def (see rtl.h). */ | |
252 | ENUM_BITFIELD(rtx_code) comparison_code : 16; | |
253 | ENUM_BITFIELD(machine_mode) mode : 8; | |
1bb98cec | 254 | }; |
7afe21cc | 255 | |
1bb98cec DM |
256 | /* The table of all qtys, indexed by qty number. */ |
257 | static struct qty_table_elem *qty_table; | |
7afe21cc | 258 | |
fc188d37 AK |
259 | /* Structure used to pass arguments via for_each_rtx to function |
260 | cse_change_cc_mode. */ | |
261 | struct change_cc_mode_args | |
262 | { | |
263 | rtx insn; | |
264 | rtx newreg; | |
265 | }; | |
266 | ||
7afe21cc RK |
267 | #ifdef HAVE_cc0 |
268 | /* For machines that have a CC0, we do not record its value in the hash | |
269 | table since its use is guaranteed to be the insn immediately following | |
270 | its definition and any other insn is presumed to invalidate it. | |
271 | ||
96fb470d SB |
272 | Instead, we store below the current and last value assigned to CC0. |
273 | If it should happen to be a constant, it is stored in preference | |
274 | to the actual assigned value. In case it is a constant, we store | |
275 | the mode in which the constant should be interpreted. */ | |
7afe21cc | 276 | |
96fb470d SB |
277 | static rtx this_insn_cc0, prev_insn_cc0; |
278 | static enum machine_mode this_insn_cc0_mode, prev_insn_cc0_mode; | |
4977bab6 | 279 | #endif |
7afe21cc RK |
280 | |
281 | /* Insn being scanned. */ | |
282 | ||
283 | static rtx this_insn; | |
284 | ||
71d306d1 DE |
285 | /* Index by register number, gives the number of the next (or |
286 | previous) register in the chain of registers sharing the same | |
7afe21cc RK |
287 | value. |
288 | ||
289 | Or -1 if this register is at the end of the chain. | |
290 | ||
459281be | 291 | If REG_QTY (N) == -N - 1, reg_eqv_table[N].next is undefined. */ |
1bb98cec DM |
292 | |
293 | /* Per-register equivalence chain. */ | |
294 | struct reg_eqv_elem | |
295 | { | |
296 | int next, prev; | |
297 | }; | |
7afe21cc | 298 | |
1bb98cec DM |
299 | /* The table of all register equivalence chains. */ |
300 | static struct reg_eqv_elem *reg_eqv_table; | |
7afe21cc | 301 | |
14a774a9 RK |
302 | struct cse_reg_info |
303 | { | |
bc5e3b54 KH |
304 | /* The timestamp at which this register is initialized. */ |
305 | unsigned int timestamp; | |
9b1549b8 DM |
306 | |
307 | /* The quantity number of the register's current contents. */ | |
308 | int reg_qty; | |
309 | ||
310 | /* The number of times the register has been altered in the current | |
311 | basic block. */ | |
312 | int reg_tick; | |
313 | ||
30f72379 MM |
314 | /* The REG_TICK value at which rtx's containing this register are |
315 | valid in the hash table. If this does not equal the current | |
316 | reg_tick value, such expressions existing in the hash table are | |
317 | invalid. */ | |
318 | int reg_in_table; | |
46081bb3 SH |
319 | |
320 | /* The SUBREG that was set when REG_TICK was last incremented. Set | |
321 | to -1 if the last store was to the whole register, not a subreg. */ | |
5dd78e9a | 322 | unsigned int subreg_ticked; |
30f72379 | 323 | }; |
7afe21cc | 324 | |
bc5e3b54 | 325 | /* A table of cse_reg_info indexed by register numbers. */ |
f00822b2 | 326 | static struct cse_reg_info *cse_reg_info_table; |
c1edba58 | 327 | |
bc5e3b54 KH |
328 | /* The size of the above table. */ |
329 | static unsigned int cse_reg_info_table_size; | |
9b1549b8 | 330 | |
bc5e3b54 KH |
331 | /* The index of the first entry that has not been initialized. */ |
332 | static unsigned int cse_reg_info_table_first_uninitialized; | |
7afe21cc | 333 | |
bc5e3b54 | 334 | /* The timestamp at the beginning of the current run of |
932ad4d9 SB |
335 | cse_extended_basic_block. We increment this variable at the beginning of |
336 | the current run of cse_extended_basic_block. The timestamp field of a | |
bc5e3b54 KH |
337 | cse_reg_info entry matches the value of this variable if and only |
338 | if the entry has been initialized during the current run of | |
932ad4d9 | 339 | cse_extended_basic_block. */ |
bc5e3b54 | 340 | static unsigned int cse_reg_info_timestamp; |
7afe21cc | 341 | |
278a83b2 | 342 | /* A HARD_REG_SET containing all the hard registers for which there is |
7afe21cc RK |
343 | currently a REG expression in the hash table. Note the difference |
344 | from the above variables, which indicate if the REG is mentioned in some | |
345 | expression in the table. */ | |
346 | ||
347 | static HARD_REG_SET hard_regs_in_table; | |
348 | ||
7afe21cc RK |
349 | /* CUID of insn that starts the basic block currently being cse-processed. */ |
350 | ||
351 | static int cse_basic_block_start; | |
352 | ||
353 | /* CUID of insn that ends the basic block currently being cse-processed. */ | |
354 | ||
355 | static int cse_basic_block_end; | |
356 | ||
357 | /* Vector mapping INSN_UIDs to cuids. | |
d45cf215 | 358 | The cuids are like uids but increase monotonically always. |
7afe21cc RK |
359 | We use them to see whether a reg is used outside a given basic block. */ |
360 | ||
906c4e36 | 361 | static int *uid_cuid; |
7afe21cc | 362 | |
164c8956 RK |
363 | /* Highest UID in UID_CUID. */ |
364 | static int max_uid; | |
365 | ||
7afe21cc RK |
366 | /* Get the cuid of an insn. */ |
367 | ||
368 | #define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)]) | |
369 | ||
370 | /* Nonzero if cse has altered conditional jump insns | |
371 | in such a way that jump optimization should be redone. */ | |
372 | ||
373 | static int cse_jumps_altered; | |
374 | ||
f85cc4cb RK |
375 | /* Nonzero if we put a LABEL_REF into the hash table for an INSN without a |
376 | REG_LABEL, we have to rerun jump after CSE to put in the note. */ | |
a5dfb4ee RK |
377 | static int recorded_label_ref; |
378 | ||
7afe21cc RK |
379 | /* canon_hash stores 1 in do_not_record |
380 | if it notices a reference to CC0, PC, or some other volatile | |
381 | subexpression. */ | |
382 | ||
383 | static int do_not_record; | |
384 | ||
385 | /* canon_hash stores 1 in hash_arg_in_memory | |
386 | if it notices a reference to memory within the expression being hashed. */ | |
387 | ||
388 | static int hash_arg_in_memory; | |
389 | ||
7afe21cc RK |
390 | /* The hash table contains buckets which are chains of `struct table_elt's, |
391 | each recording one expression's information. | |
392 | That expression is in the `exp' field. | |
393 | ||
db048faf MM |
394 | The canon_exp field contains a canonical (from the point of view of |
395 | alias analysis) version of the `exp' field. | |
396 | ||
7afe21cc RK |
397 | Those elements with the same hash code are chained in both directions |
398 | through the `next_same_hash' and `prev_same_hash' fields. | |
399 | ||
400 | Each set of expressions with equivalent values | |
401 | are on a two-way chain through the `next_same_value' | |
402 | and `prev_same_value' fields, and all point with | |
403 | the `first_same_value' field at the first element in | |
404 | that chain. The chain is in order of increasing cost. | |
405 | Each element's cost value is in its `cost' field. | |
406 | ||
407 | The `in_memory' field is nonzero for elements that | |
408 | involve any reference to memory. These elements are removed | |
409 | whenever a write is done to an unidentified location in memory. | |
410 | To be safe, we assume that a memory address is unidentified unless | |
411 | the address is either a symbol constant or a constant plus | |
412 | the frame pointer or argument pointer. | |
413 | ||
7afe21cc RK |
414 | The `related_value' field is used to connect related expressions |
415 | (that differ by adding an integer). | |
416 | The related expressions are chained in a circular fashion. | |
417 | `related_value' is zero for expressions for which this | |
418 | chain is not useful. | |
419 | ||
420 | The `cost' field stores the cost of this element's expression. | |
630c79be BS |
421 | The `regcost' field stores the value returned by approx_reg_cost for |
422 | this element's expression. | |
7afe21cc RK |
423 | |
424 | The `is_const' flag is set if the element is a constant (including | |
425 | a fixed address). | |
426 | ||
427 | The `flag' field is used as a temporary during some search routines. | |
428 | ||
429 | The `mode' field is usually the same as GET_MODE (`exp'), but | |
430 | if `exp' is a CONST_INT and has no machine mode then the `mode' | |
431 | field is the mode it was being used as. Each constant is | |
432 | recorded separately for each mode it is used with. */ | |
433 | ||
7afe21cc RK |
434 | struct table_elt |
435 | { | |
436 | rtx exp; | |
db048faf | 437 | rtx canon_exp; |
7afe21cc RK |
438 | struct table_elt *next_same_hash; |
439 | struct table_elt *prev_same_hash; | |
440 | struct table_elt *next_same_value; | |
441 | struct table_elt *prev_same_value; | |
442 | struct table_elt *first_same_value; | |
443 | struct table_elt *related_value; | |
444 | int cost; | |
630c79be | 445 | int regcost; |
496324d0 DN |
446 | /* The size of this field should match the size |
447 | of the mode field of struct rtx_def (see rtl.h). */ | |
448 | ENUM_BITFIELD(machine_mode) mode : 8; | |
7afe21cc | 449 | char in_memory; |
7afe21cc RK |
450 | char is_const; |
451 | char flag; | |
452 | }; | |
453 | ||
7afe21cc RK |
454 | /* We don't want a lot of buckets, because we rarely have very many |
455 | things stored in the hash table, and a lot of buckets slows | |
456 | down a lot of loops that happen frequently. */ | |
9b1549b8 DM |
457 | #define HASH_SHIFT 5 |
458 | #define HASH_SIZE (1 << HASH_SHIFT) | |
459 | #define HASH_MASK (HASH_SIZE - 1) | |
7afe21cc RK |
460 | |
461 | /* Compute hash code of X in mode M. Special-case case where X is a pseudo | |
462 | register (hard registers may require `do_not_record' to be set). */ | |
463 | ||
464 | #define HASH(X, M) \ | |
f8cfc6aa | 465 | ((REG_P (X) && REGNO (X) >= FIRST_PSEUDO_REGISTER \ |
9b1549b8 DM |
466 | ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \ |
467 | : canon_hash (X, M)) & HASH_MASK) | |
7afe21cc | 468 | |
0516f6fe SB |
469 | /* Like HASH, but without side-effects. */ |
470 | #define SAFE_HASH(X, M) \ | |
471 | ((REG_P (X) && REGNO (X) >= FIRST_PSEUDO_REGISTER \ | |
472 | ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \ | |
473 | : safe_hash (X, M)) & HASH_MASK) | |
474 | ||
630c79be BS |
475 | /* Determine whether register number N is considered a fixed register for the |
476 | purpose of approximating register costs. | |
7afe21cc RK |
477 | It is desirable to replace other regs with fixed regs, to reduce need for |
478 | non-fixed hard regs. | |
553687c9 | 479 | A reg wins if it is either the frame pointer or designated as fixed. */ |
7afe21cc | 480 | #define FIXED_REGNO_P(N) \ |
8bc169f2 | 481 | ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \ |
6ab832bc | 482 | || fixed_regs[N] || global_regs[N]) |
7afe21cc RK |
483 | |
484 | /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed | |
ac07e066 RK |
485 | hard registers and pointers into the frame are the cheapest with a cost |
486 | of 0. Next come pseudos with a cost of one and other hard registers with | |
487 | a cost of 2. Aside from these special cases, call `rtx_cost'. */ | |
488 | ||
d67fb775 SB |
489 | #define CHEAP_REGNO(N) \ |
490 | (REGNO_PTR_FRAME_P(N) \ | |
491 | || (HARD_REGISTER_NUM_P (N) \ | |
e7bb59fa | 492 | && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS)) |
7afe21cc | 493 | |
f8cfc6aa JQ |
494 | #define COST(X) (REG_P (X) ? 0 : notreg_cost (X, SET)) |
495 | #define COST_IN(X,OUTER) (REG_P (X) ? 0 : notreg_cost (X, OUTER)) | |
7afe21cc | 496 | |
30f72379 MM |
497 | /* Get the number of times this register has been updated in this |
498 | basic block. */ | |
499 | ||
bc5e3b54 | 500 | #define REG_TICK(N) (get_cse_reg_info (N)->reg_tick) |
30f72379 MM |
501 | |
502 | /* Get the point at which REG was recorded in the table. */ | |
503 | ||
bc5e3b54 | 504 | #define REG_IN_TABLE(N) (get_cse_reg_info (N)->reg_in_table) |
30f72379 | 505 | |
46081bb3 SH |
506 | /* Get the SUBREG set at the last increment to REG_TICK (-1 if not a |
507 | SUBREG). */ | |
508 | ||
bc5e3b54 | 509 | #define SUBREG_TICKED(N) (get_cse_reg_info (N)->subreg_ticked) |
46081bb3 | 510 | |
30f72379 MM |
511 | /* Get the quantity number for REG. */ |
512 | ||
bc5e3b54 | 513 | #define REG_QTY(N) (get_cse_reg_info (N)->reg_qty) |
30f72379 | 514 | |
7afe21cc | 515 | /* Determine if the quantity number for register X represents a valid index |
1bb98cec | 516 | into the qty_table. */ |
7afe21cc | 517 | |
08a69267 | 518 | #define REGNO_QTY_VALID_P(N) (REG_QTY (N) >= 0) |
7afe21cc | 519 | |
9b1549b8 | 520 | static struct table_elt *table[HASH_SIZE]; |
7afe21cc RK |
521 | |
522 | /* Chain of `struct table_elt's made so far for this function | |
523 | but currently removed from the table. */ | |
524 | ||
525 | static struct table_elt *free_element_chain; | |
526 | ||
7afe21cc RK |
527 | /* Set to the cost of a constant pool reference if one was found for a |
528 | symbolic constant. If this was found, it means we should try to | |
529 | convert constants into constant pool entries if they don't fit in | |
530 | the insn. */ | |
531 | ||
532 | static int constant_pool_entries_cost; | |
dd0ba281 | 533 | static int constant_pool_entries_regcost; |
7afe21cc | 534 | |
932ad4d9 SB |
535 | /* This data describes a block that will be processed by |
536 | cse_extended_basic_block. */ | |
6cd4575e | 537 | |
14a774a9 RK |
538 | struct cse_basic_block_data |
539 | { | |
6cd4575e RK |
540 | /* Lowest CUID value of insns in block. */ |
541 | int low_cuid; | |
542 | /* Highest CUID value of insns in block. */ | |
543 | int high_cuid; | |
544 | /* Total number of SETs in block. */ | |
545 | int nsets; | |
6cd4575e RK |
546 | /* Size of current branch path, if any. */ |
547 | int path_size; | |
932ad4d9 | 548 | /* Current path, indicating which basic_blocks will be processed. */ |
14a774a9 RK |
549 | struct branch_path |
550 | { | |
932ad4d9 SB |
551 | /* The basic block for this path entry. */ |
552 | basic_block bb; | |
9bf8cfbf | 553 | } *path; |
6cd4575e RK |
554 | }; |
555 | ||
932ad4d9 SB |
556 | /* A simple bitmap to track which basic blocks have been visited |
557 | already as part of an already processed extended basic block. */ | |
558 | static sbitmap cse_visited_basic_blocks; | |
559 | ||
7080f735 AJ |
560 | static bool fixed_base_plus_p (rtx x); |
561 | static int notreg_cost (rtx, enum rtx_code); | |
562 | static int approx_reg_cost_1 (rtx *, void *); | |
563 | static int approx_reg_cost (rtx); | |
56ae04af | 564 | static int preferable (int, int, int, int); |
7080f735 AJ |
565 | static void new_basic_block (void); |
566 | static void make_new_qty (unsigned int, enum machine_mode); | |
567 | static void make_regs_eqv (unsigned int, unsigned int); | |
568 | static void delete_reg_equiv (unsigned int); | |
569 | static int mention_regs (rtx); | |
570 | static int insert_regs (rtx, struct table_elt *, int); | |
571 | static void remove_from_table (struct table_elt *, unsigned); | |
572 | static struct table_elt *lookup (rtx, unsigned, enum machine_mode); | |
573 | static struct table_elt *lookup_for_remove (rtx, unsigned, enum machine_mode); | |
574 | static rtx lookup_as_function (rtx, enum rtx_code); | |
575 | static struct table_elt *insert (rtx, struct table_elt *, unsigned, | |
576 | enum machine_mode); | |
577 | static void merge_equiv_classes (struct table_elt *, struct table_elt *); | |
578 | static void invalidate (rtx, enum machine_mode); | |
579 | static int cse_rtx_varies_p (rtx, int); | |
580 | static void remove_invalid_refs (unsigned int); | |
581 | static void remove_invalid_subreg_refs (unsigned int, unsigned int, | |
582 | enum machine_mode); | |
583 | static void rehash_using_reg (rtx); | |
584 | static void invalidate_memory (void); | |
585 | static void invalidate_for_call (void); | |
586 | static rtx use_related_value (rtx, struct table_elt *); | |
0516f6fe SB |
587 | |
588 | static inline unsigned canon_hash (rtx, enum machine_mode); | |
589 | static inline unsigned safe_hash (rtx, enum machine_mode); | |
590 | static unsigned hash_rtx_string (const char *); | |
591 | ||
7080f735 | 592 | static rtx canon_reg (rtx, rtx); |
7080f735 AJ |
593 | static enum rtx_code find_comparison_args (enum rtx_code, rtx *, rtx *, |
594 | enum machine_mode *, | |
595 | enum machine_mode *); | |
596 | static rtx fold_rtx (rtx, rtx); | |
597 | static rtx equiv_constant (rtx); | |
0129d079 | 598 | static void record_jump_equiv (rtx, bool); |
7080f735 AJ |
599 | static void record_jump_cond (enum rtx_code, enum machine_mode, rtx, rtx, |
600 | int); | |
601 | static void cse_insn (rtx, rtx); | |
932ad4d9 | 602 | static void cse_prescan_path (struct cse_basic_block_data *); |
7080f735 AJ |
603 | static void invalidate_from_clobbers (rtx); |
604 | static rtx cse_process_notes (rtx, rtx); | |
932ad4d9 | 605 | static void cse_extended_basic_block (struct cse_basic_block_data *); |
b92ba6ff | 606 | static void count_reg_usage (rtx, int *, rtx, int); |
7080f735 AJ |
607 | static int check_for_label_ref (rtx *, void *); |
608 | extern void dump_class (struct table_elt*); | |
bc5e3b54 KH |
609 | static void get_cse_reg_info_1 (unsigned int regno); |
610 | static struct cse_reg_info * get_cse_reg_info (unsigned int regno); | |
7080f735 AJ |
611 | static int check_dependence (rtx *, void *); |
612 | ||
613 | static void flush_hash_table (void); | |
614 | static bool insn_live_p (rtx, int *); | |
615 | static bool set_live_p (rtx, rtx, int *); | |
616 | static bool dead_libcall_p (rtx, int *); | |
e129d93a | 617 | static int cse_change_cc_mode (rtx *, void *); |
fc188d37 | 618 | static void cse_change_cc_mode_insn (rtx, rtx); |
e129d93a ILT |
619 | static void cse_change_cc_mode_insns (rtx, rtx, rtx); |
620 | static enum machine_mode cse_cc_succs (basic_block, rtx, rtx, bool); | |
7afe21cc | 621 | \f |
2f93eea8 PB |
622 | |
623 | #undef RTL_HOOKS_GEN_LOWPART | |
624 | #define RTL_HOOKS_GEN_LOWPART gen_lowpart_if_possible | |
625 | ||
626 | static const struct rtl_hooks cse_rtl_hooks = RTL_HOOKS_INITIALIZER; | |
627 | \f | |
4977bab6 ZW |
628 | /* Nonzero if X has the form (PLUS frame-pointer integer). We check for |
629 | virtual regs here because the simplify_*_operation routines are called | |
630 | by integrate.c, which is called before virtual register instantiation. */ | |
631 | ||
632 | static bool | |
7080f735 | 633 | fixed_base_plus_p (rtx x) |
4977bab6 ZW |
634 | { |
635 | switch (GET_CODE (x)) | |
636 | { | |
637 | case REG: | |
638 | if (x == frame_pointer_rtx || x == hard_frame_pointer_rtx) | |
639 | return true; | |
640 | if (x == arg_pointer_rtx && fixed_regs[ARG_POINTER_REGNUM]) | |
641 | return true; | |
642 | if (REGNO (x) >= FIRST_VIRTUAL_REGISTER | |
643 | && REGNO (x) <= LAST_VIRTUAL_REGISTER) | |
644 | return true; | |
645 | return false; | |
646 | ||
647 | case PLUS: | |
648 | if (GET_CODE (XEXP (x, 1)) != CONST_INT) | |
649 | return false; | |
650 | return fixed_base_plus_p (XEXP (x, 0)); | |
651 | ||
4977bab6 ZW |
652 | default: |
653 | return false; | |
654 | } | |
655 | } | |
656 | ||
a4c6502a MM |
657 | /* Dump the expressions in the equivalence class indicated by CLASSP. |
658 | This function is used only for debugging. */ | |
a0153051 | 659 | void |
7080f735 | 660 | dump_class (struct table_elt *classp) |
a4c6502a MM |
661 | { |
662 | struct table_elt *elt; | |
663 | ||
664 | fprintf (stderr, "Equivalence chain for "); | |
665 | print_rtl (stderr, classp->exp); | |
666 | fprintf (stderr, ": \n"); | |
278a83b2 | 667 | |
a4c6502a MM |
668 | for (elt = classp->first_same_value; elt; elt = elt->next_same_value) |
669 | { | |
670 | print_rtl (stderr, elt->exp); | |
671 | fprintf (stderr, "\n"); | |
672 | } | |
673 | } | |
674 | ||
630c79be | 675 | /* Subroutine of approx_reg_cost; called through for_each_rtx. */ |
be8ac49a | 676 | |
630c79be | 677 | static int |
7080f735 | 678 | approx_reg_cost_1 (rtx *xp, void *data) |
630c79be BS |
679 | { |
680 | rtx x = *xp; | |
c863f8c2 | 681 | int *cost_p = data; |
630c79be | 682 | |
f8cfc6aa | 683 | if (x && REG_P (x)) |
c863f8c2 DM |
684 | { |
685 | unsigned int regno = REGNO (x); | |
686 | ||
687 | if (! CHEAP_REGNO (regno)) | |
688 | { | |
689 | if (regno < FIRST_PSEUDO_REGISTER) | |
690 | { | |
691 | if (SMALL_REGISTER_CLASSES) | |
692 | return 1; | |
693 | *cost_p += 2; | |
694 | } | |
695 | else | |
696 | *cost_p += 1; | |
697 | } | |
698 | } | |
699 | ||
630c79be BS |
700 | return 0; |
701 | } | |
702 | ||
703 | /* Return an estimate of the cost of the registers used in an rtx. | |
704 | This is mostly the number of different REG expressions in the rtx; | |
a1f300c0 | 705 | however for some exceptions like fixed registers we use a cost of |
f1c1dfc3 | 706 | 0. If any other hard register reference occurs, return MAX_COST. */ |
630c79be BS |
707 | |
708 | static int | |
7080f735 | 709 | approx_reg_cost (rtx x) |
630c79be | 710 | { |
630c79be | 711 | int cost = 0; |
f1c1dfc3 | 712 | |
c863f8c2 DM |
713 | if (for_each_rtx (&x, approx_reg_cost_1, (void *) &cost)) |
714 | return MAX_COST; | |
630c79be | 715 | |
c863f8c2 | 716 | return cost; |
630c79be BS |
717 | } |
718 | ||
719 | /* Return a negative value if an rtx A, whose costs are given by COST_A | |
720 | and REGCOST_A, is more desirable than an rtx B. | |
721 | Return a positive value if A is less desirable, or 0 if the two are | |
722 | equally good. */ | |
723 | static int | |
56ae04af | 724 | preferable (int cost_a, int regcost_a, int cost_b, int regcost_b) |
630c79be | 725 | { |
423adbb9 | 726 | /* First, get rid of cases involving expressions that are entirely |
f1c1dfc3 BS |
727 | unwanted. */ |
728 | if (cost_a != cost_b) | |
729 | { | |
730 | if (cost_a == MAX_COST) | |
731 | return 1; | |
732 | if (cost_b == MAX_COST) | |
733 | return -1; | |
734 | } | |
735 | ||
736 | /* Avoid extending lifetimes of hardregs. */ | |
737 | if (regcost_a != regcost_b) | |
738 | { | |
739 | if (regcost_a == MAX_COST) | |
740 | return 1; | |
741 | if (regcost_b == MAX_COST) | |
742 | return -1; | |
743 | } | |
744 | ||
745 | /* Normal operation costs take precedence. */ | |
630c79be BS |
746 | if (cost_a != cost_b) |
747 | return cost_a - cost_b; | |
f1c1dfc3 | 748 | /* Only if these are identical consider effects on register pressure. */ |
630c79be BS |
749 | if (regcost_a != regcost_b) |
750 | return regcost_a - regcost_b; | |
751 | return 0; | |
752 | } | |
753 | ||
954a5693 RK |
754 | /* Internal function, to compute cost when X is not a register; called |
755 | from COST macro to keep it simple. */ | |
756 | ||
757 | static int | |
7080f735 | 758 | notreg_cost (rtx x, enum rtx_code outer) |
954a5693 RK |
759 | { |
760 | return ((GET_CODE (x) == SUBREG | |
f8cfc6aa | 761 | && REG_P (SUBREG_REG (x)) |
954a5693 RK |
762 | && GET_MODE_CLASS (GET_MODE (x)) == MODE_INT |
763 | && GET_MODE_CLASS (GET_MODE (SUBREG_REG (x))) == MODE_INT | |
764 | && (GET_MODE_SIZE (GET_MODE (x)) | |
765 | < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))) | |
766 | && subreg_lowpart_p (x) | |
767 | && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE (x)), | |
768 | GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x))))) | |
630c79be | 769 | ? 0 |
f2fa288f | 770 | : rtx_cost (x, outer) * 2); |
954a5693 RK |
771 | } |
772 | ||
01329426 | 773 | \f |
bc5e3b54 | 774 | /* Initialize CSE_REG_INFO_TABLE. */ |
9b1549b8 | 775 | |
bc5e3b54 KH |
776 | static void |
777 | init_cse_reg_info (unsigned int nregs) | |
778 | { | |
779 | /* Do we need to grow the table? */ | |
780 | if (nregs > cse_reg_info_table_size) | |
30f72379 | 781 | { |
bc5e3b54 KH |
782 | unsigned int new_size; |
783 | ||
784 | if (cse_reg_info_table_size < 2048) | |
30f72379 | 785 | { |
bc5e3b54 KH |
786 | /* Compute a new size that is a power of 2 and no smaller |
787 | than the large of NREGS and 64. */ | |
788 | new_size = (cse_reg_info_table_size | |
789 | ? cse_reg_info_table_size : 64); | |
790 | ||
791 | while (new_size < nregs) | |
792 | new_size *= 2; | |
30f72379 MM |
793 | } |
794 | else | |
1590d0d4 | 795 | { |
bc5e3b54 KH |
796 | /* If we need a big table, allocate just enough to hold |
797 | NREGS registers. */ | |
798 | new_size = nregs; | |
1590d0d4 | 799 | } |
9b1549b8 | 800 | |
bc5e3b54 | 801 | /* Reallocate the table with NEW_SIZE entries. */ |
a811c672 KH |
802 | if (cse_reg_info_table) |
803 | free (cse_reg_info_table); | |
5ed6ace5 | 804 | cse_reg_info_table = XNEWVEC (struct cse_reg_info, new_size); |
bc5e3b54 | 805 | cse_reg_info_table_size = new_size; |
a811c672 | 806 | cse_reg_info_table_first_uninitialized = 0; |
bc5e3b54 KH |
807 | } |
808 | ||
809 | /* Do we have all of the first NREGS entries initialized? */ | |
810 | if (cse_reg_info_table_first_uninitialized < nregs) | |
811 | { | |
812 | unsigned int old_timestamp = cse_reg_info_timestamp - 1; | |
813 | unsigned int i; | |
814 | ||
815 | /* Put the old timestamp on newly allocated entries so that they | |
816 | will all be considered out of date. We do not touch those | |
817 | entries beyond the first NREGS entries to be nice to the | |
818 | virtual memory. */ | |
819 | for (i = cse_reg_info_table_first_uninitialized; i < nregs; i++) | |
820 | cse_reg_info_table[i].timestamp = old_timestamp; | |
30f72379 | 821 | |
bc5e3b54 | 822 | cse_reg_info_table_first_uninitialized = nregs; |
30f72379 | 823 | } |
bc5e3b54 KH |
824 | } |
825 | ||
a52aff23 | 826 | /* Given REGNO, initialize the cse_reg_info entry for REGNO. */ |
bc5e3b54 KH |
827 | |
828 | static void | |
829 | get_cse_reg_info_1 (unsigned int regno) | |
830 | { | |
831 | /* Set TIMESTAMP field to CSE_REG_INFO_TIMESTAMP so that this | |
832 | entry will be considered to have been initialized. */ | |
833 | cse_reg_info_table[regno].timestamp = cse_reg_info_timestamp; | |
834 | ||
835 | /* Initialize the rest of the entry. */ | |
836 | cse_reg_info_table[regno].reg_tick = 1; | |
837 | cse_reg_info_table[regno].reg_in_table = -1; | |
838 | cse_reg_info_table[regno].subreg_ticked = -1; | |
839 | cse_reg_info_table[regno].reg_qty = -regno - 1; | |
840 | } | |
841 | ||
842 | /* Find a cse_reg_info entry for REGNO. */ | |
30f72379 | 843 | |
bc5e3b54 KH |
844 | static inline struct cse_reg_info * |
845 | get_cse_reg_info (unsigned int regno) | |
846 | { | |
847 | struct cse_reg_info *p = &cse_reg_info_table[regno]; | |
848 | ||
782c0a3e KH |
849 | /* If this entry has not been initialized, go ahead and initialize |
850 | it. */ | |
bc5e3b54 KH |
851 | if (p->timestamp != cse_reg_info_timestamp) |
852 | get_cse_reg_info_1 (regno); | |
30f72379 | 853 | |
9b1549b8 | 854 | return p; |
30f72379 MM |
855 | } |
856 | ||
7afe21cc RK |
857 | /* Clear the hash table and initialize each register with its own quantity, |
858 | for a new basic block. */ | |
859 | ||
860 | static void | |
7080f735 | 861 | new_basic_block (void) |
7afe21cc | 862 | { |
b3694847 | 863 | int i; |
7afe21cc | 864 | |
08a69267 | 865 | next_qty = 0; |
7afe21cc | 866 | |
a52aff23 | 867 | /* Invalidate cse_reg_info_table. */ |
bc5e3b54 | 868 | cse_reg_info_timestamp++; |
7afe21cc | 869 | |
bc5e3b54 | 870 | /* Clear out hash table state for this pass. */ |
7afe21cc RK |
871 | CLEAR_HARD_REG_SET (hard_regs_in_table); |
872 | ||
873 | /* The per-quantity values used to be initialized here, but it is | |
874 | much faster to initialize each as it is made in `make_new_qty'. */ | |
875 | ||
9b1549b8 | 876 | for (i = 0; i < HASH_SIZE; i++) |
7afe21cc | 877 | { |
9b1549b8 DM |
878 | struct table_elt *first; |
879 | ||
880 | first = table[i]; | |
881 | if (first != NULL) | |
7afe21cc | 882 | { |
9b1549b8 DM |
883 | struct table_elt *last = first; |
884 | ||
885 | table[i] = NULL; | |
886 | ||
887 | while (last->next_same_hash != NULL) | |
888 | last = last->next_same_hash; | |
889 | ||
890 | /* Now relink this hash entire chain into | |
891 | the free element list. */ | |
892 | ||
893 | last->next_same_hash = free_element_chain; | |
894 | free_element_chain = first; | |
7afe21cc RK |
895 | } |
896 | } | |
897 | ||
7afe21cc RK |
898 | #ifdef HAVE_cc0 |
899 | prev_insn_cc0 = 0; | |
900 | #endif | |
901 | } | |
902 | ||
1bb98cec DM |
903 | /* Say that register REG contains a quantity in mode MODE not in any |
904 | register before and initialize that quantity. */ | |
7afe21cc RK |
905 | |
906 | static void | |
7080f735 | 907 | make_new_qty (unsigned int reg, enum machine_mode mode) |
7afe21cc | 908 | { |
b3694847 SS |
909 | int q; |
910 | struct qty_table_elem *ent; | |
911 | struct reg_eqv_elem *eqv; | |
7afe21cc | 912 | |
341c100f | 913 | gcc_assert (next_qty < max_qty); |
7afe21cc | 914 | |
30f72379 | 915 | q = REG_QTY (reg) = next_qty++; |
1bb98cec DM |
916 | ent = &qty_table[q]; |
917 | ent->first_reg = reg; | |
918 | ent->last_reg = reg; | |
919 | ent->mode = mode; | |
920 | ent->const_rtx = ent->const_insn = NULL_RTX; | |
921 | ent->comparison_code = UNKNOWN; | |
922 | ||
923 | eqv = ®_eqv_table[reg]; | |
924 | eqv->next = eqv->prev = -1; | |
7afe21cc RK |
925 | } |
926 | ||
927 | /* Make reg NEW equivalent to reg OLD. | |
928 | OLD is not changing; NEW is. */ | |
929 | ||
930 | static void | |
7080f735 | 931 | make_regs_eqv (unsigned int new, unsigned int old) |
7afe21cc | 932 | { |
770ae6cc RK |
933 | unsigned int lastr, firstr; |
934 | int q = REG_QTY (old); | |
935 | struct qty_table_elem *ent; | |
1bb98cec DM |
936 | |
937 | ent = &qty_table[q]; | |
7afe21cc RK |
938 | |
939 | /* Nothing should become eqv until it has a "non-invalid" qty number. */ | |
341c100f | 940 | gcc_assert (REGNO_QTY_VALID_P (old)); |
7afe21cc | 941 | |
30f72379 | 942 | REG_QTY (new) = q; |
1bb98cec DM |
943 | firstr = ent->first_reg; |
944 | lastr = ent->last_reg; | |
7afe21cc RK |
945 | |
946 | /* Prefer fixed hard registers to anything. Prefer pseudo regs to other | |
947 | hard regs. Among pseudos, if NEW will live longer than any other reg | |
948 | of the same qty, and that is beyond the current basic block, | |
949 | make it the new canonical replacement for this qty. */ | |
950 | if (! (firstr < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (firstr)) | |
951 | /* Certain fixed registers might be of the class NO_REGS. This means | |
952 | that not only can they not be allocated by the compiler, but | |
830a38ee | 953 | they cannot be used in substitutions or canonicalizations |
7afe21cc RK |
954 | either. */ |
955 | && (new >= FIRST_PSEUDO_REGISTER || REGNO_REG_CLASS (new) != NO_REGS) | |
956 | && ((new < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (new)) | |
957 | || (new >= FIRST_PSEUDO_REGISTER | |
958 | && (firstr < FIRST_PSEUDO_REGISTER | |
b1f21e0a MM |
959 | || ((uid_cuid[REGNO_LAST_UID (new)] > cse_basic_block_end |
960 | || (uid_cuid[REGNO_FIRST_UID (new)] | |
7afe21cc | 961 | < cse_basic_block_start)) |
b1f21e0a MM |
962 | && (uid_cuid[REGNO_LAST_UID (new)] |
963 | > uid_cuid[REGNO_LAST_UID (firstr)])))))) | |
7afe21cc | 964 | { |
1bb98cec DM |
965 | reg_eqv_table[firstr].prev = new; |
966 | reg_eqv_table[new].next = firstr; | |
967 | reg_eqv_table[new].prev = -1; | |
968 | ent->first_reg = new; | |
7afe21cc RK |
969 | } |
970 | else | |
971 | { | |
972 | /* If NEW is a hard reg (known to be non-fixed), insert at end. | |
973 | Otherwise, insert before any non-fixed hard regs that are at the | |
974 | end. Registers of class NO_REGS cannot be used as an | |
975 | equivalent for anything. */ | |
1bb98cec | 976 | while (lastr < FIRST_PSEUDO_REGISTER && reg_eqv_table[lastr].prev >= 0 |
7afe21cc RK |
977 | && (REGNO_REG_CLASS (lastr) == NO_REGS || ! FIXED_REGNO_P (lastr)) |
978 | && new >= FIRST_PSEUDO_REGISTER) | |
1bb98cec DM |
979 | lastr = reg_eqv_table[lastr].prev; |
980 | reg_eqv_table[new].next = reg_eqv_table[lastr].next; | |
981 | if (reg_eqv_table[lastr].next >= 0) | |
982 | reg_eqv_table[reg_eqv_table[lastr].next].prev = new; | |
7afe21cc | 983 | else |
1bb98cec DM |
984 | qty_table[q].last_reg = new; |
985 | reg_eqv_table[lastr].next = new; | |
986 | reg_eqv_table[new].prev = lastr; | |
7afe21cc RK |
987 | } |
988 | } | |
989 | ||
990 | /* Remove REG from its equivalence class. */ | |
991 | ||
992 | static void | |
7080f735 | 993 | delete_reg_equiv (unsigned int reg) |
7afe21cc | 994 | { |
b3694847 SS |
995 | struct qty_table_elem *ent; |
996 | int q = REG_QTY (reg); | |
997 | int p, n; | |
7afe21cc | 998 | |
a4e262bc | 999 | /* If invalid, do nothing. */ |
08a69267 | 1000 | if (! REGNO_QTY_VALID_P (reg)) |
7afe21cc RK |
1001 | return; |
1002 | ||
1bb98cec DM |
1003 | ent = &qty_table[q]; |
1004 | ||
1005 | p = reg_eqv_table[reg].prev; | |
1006 | n = reg_eqv_table[reg].next; | |
a4e262bc | 1007 | |
7afe21cc | 1008 | if (n != -1) |
1bb98cec | 1009 | reg_eqv_table[n].prev = p; |
7afe21cc | 1010 | else |
1bb98cec | 1011 | ent->last_reg = p; |
7afe21cc | 1012 | if (p != -1) |
1bb98cec | 1013 | reg_eqv_table[p].next = n; |
7afe21cc | 1014 | else |
1bb98cec | 1015 | ent->first_reg = n; |
7afe21cc | 1016 | |
08a69267 | 1017 | REG_QTY (reg) = -reg - 1; |
7afe21cc RK |
1018 | } |
1019 | ||
1020 | /* Remove any invalid expressions from the hash table | |
1021 | that refer to any of the registers contained in expression X. | |
1022 | ||
1023 | Make sure that newly inserted references to those registers | |
1024 | as subexpressions will be considered valid. | |
1025 | ||
1026 | mention_regs is not called when a register itself | |
1027 | is being stored in the table. | |
1028 | ||
1029 | Return 1 if we have done something that may have changed the hash code | |
1030 | of X. */ | |
1031 | ||
1032 | static int | |
7080f735 | 1033 | mention_regs (rtx x) |
7afe21cc | 1034 | { |
b3694847 SS |
1035 | enum rtx_code code; |
1036 | int i, j; | |
1037 | const char *fmt; | |
1038 | int changed = 0; | |
7afe21cc RK |
1039 | |
1040 | if (x == 0) | |
e5f6a288 | 1041 | return 0; |
7afe21cc RK |
1042 | |
1043 | code = GET_CODE (x); | |
1044 | if (code == REG) | |
1045 | { | |
770ae6cc RK |
1046 | unsigned int regno = REGNO (x); |
1047 | unsigned int endregno | |
7afe21cc | 1048 | = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1 |
66fd46b6 | 1049 | : hard_regno_nregs[regno][GET_MODE (x)]); |
770ae6cc | 1050 | unsigned int i; |
7afe21cc RK |
1051 | |
1052 | for (i = regno; i < endregno; i++) | |
1053 | { | |
30f72379 | 1054 | if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i)) |
7afe21cc RK |
1055 | remove_invalid_refs (i); |
1056 | ||
30f72379 | 1057 | REG_IN_TABLE (i) = REG_TICK (i); |
46081bb3 | 1058 | SUBREG_TICKED (i) = -1; |
7afe21cc RK |
1059 | } |
1060 | ||
1061 | return 0; | |
1062 | } | |
1063 | ||
34c73909 R |
1064 | /* If this is a SUBREG, we don't want to discard other SUBREGs of the same |
1065 | pseudo if they don't use overlapping words. We handle only pseudos | |
1066 | here for simplicity. */ | |
f8cfc6aa | 1067 | if (code == SUBREG && REG_P (SUBREG_REG (x)) |
34c73909 R |
1068 | && REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER) |
1069 | { | |
770ae6cc | 1070 | unsigned int i = REGNO (SUBREG_REG (x)); |
34c73909 | 1071 | |
30f72379 | 1072 | if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i)) |
34c73909 | 1073 | { |
46081bb3 SH |
1074 | /* If REG_IN_TABLE (i) differs from REG_TICK (i) by one, and |
1075 | the last store to this register really stored into this | |
1076 | subreg, then remove the memory of this subreg. | |
1077 | Otherwise, remove any memory of the entire register and | |
1078 | all its subregs from the table. */ | |
1079 | if (REG_TICK (i) - REG_IN_TABLE (i) > 1 | |
5dd78e9a | 1080 | || SUBREG_TICKED (i) != REGNO (SUBREG_REG (x))) |
34c73909 R |
1081 | remove_invalid_refs (i); |
1082 | else | |
ddef6bc7 | 1083 | remove_invalid_subreg_refs (i, SUBREG_BYTE (x), GET_MODE (x)); |
34c73909 R |
1084 | } |
1085 | ||
30f72379 | 1086 | REG_IN_TABLE (i) = REG_TICK (i); |
5dd78e9a | 1087 | SUBREG_TICKED (i) = REGNO (SUBREG_REG (x)); |
34c73909 R |
1088 | return 0; |
1089 | } | |
1090 | ||
7afe21cc RK |
1091 | /* If X is a comparison or a COMPARE and either operand is a register |
1092 | that does not have a quantity, give it one. This is so that a later | |
1093 | call to record_jump_equiv won't cause X to be assigned a different | |
1094 | hash code and not found in the table after that call. | |
1095 | ||
1096 | It is not necessary to do this here, since rehash_using_reg can | |
1097 | fix up the table later, but doing this here eliminates the need to | |
1098 | call that expensive function in the most common case where the only | |
1099 | use of the register is in the comparison. */ | |
1100 | ||
ec8e098d | 1101 | if (code == COMPARE || COMPARISON_P (x)) |
7afe21cc | 1102 | { |
f8cfc6aa | 1103 | if (REG_P (XEXP (x, 0)) |
7afe21cc | 1104 | && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 0)))) |
9714cf43 | 1105 | if (insert_regs (XEXP (x, 0), NULL, 0)) |
7afe21cc RK |
1106 | { |
1107 | rehash_using_reg (XEXP (x, 0)); | |
1108 | changed = 1; | |
1109 | } | |
1110 | ||
f8cfc6aa | 1111 | if (REG_P (XEXP (x, 1)) |
7afe21cc | 1112 | && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 1)))) |
9714cf43 | 1113 | if (insert_regs (XEXP (x, 1), NULL, 0)) |
7afe21cc RK |
1114 | { |
1115 | rehash_using_reg (XEXP (x, 1)); | |
1116 | changed = 1; | |
1117 | } | |
1118 | } | |
1119 | ||
1120 | fmt = GET_RTX_FORMAT (code); | |
1121 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
1122 | if (fmt[i] == 'e') | |
1123 | changed |= mention_regs (XEXP (x, i)); | |
1124 | else if (fmt[i] == 'E') | |
1125 | for (j = 0; j < XVECLEN (x, i); j++) | |
1126 | changed |= mention_regs (XVECEXP (x, i, j)); | |
1127 | ||
1128 | return changed; | |
1129 | } | |
1130 | ||
1131 | /* Update the register quantities for inserting X into the hash table | |
1132 | with a value equivalent to CLASSP. | |
1133 | (If the class does not contain a REG, it is irrelevant.) | |
1134 | If MODIFIED is nonzero, X is a destination; it is being modified. | |
1135 | Note that delete_reg_equiv should be called on a register | |
1136 | before insert_regs is done on that register with MODIFIED != 0. | |
1137 | ||
1138 | Nonzero value means that elements of reg_qty have changed | |
1139 | so X's hash code may be different. */ | |
1140 | ||
1141 | static int | |
7080f735 | 1142 | insert_regs (rtx x, struct table_elt *classp, int modified) |
7afe21cc | 1143 | { |
f8cfc6aa | 1144 | if (REG_P (x)) |
7afe21cc | 1145 | { |
770ae6cc RK |
1146 | unsigned int regno = REGNO (x); |
1147 | int qty_valid; | |
7afe21cc | 1148 | |
1ff0c00d RK |
1149 | /* If REGNO is in the equivalence table already but is of the |
1150 | wrong mode for that equivalence, don't do anything here. */ | |
1151 | ||
1bb98cec DM |
1152 | qty_valid = REGNO_QTY_VALID_P (regno); |
1153 | if (qty_valid) | |
1154 | { | |
1155 | struct qty_table_elem *ent = &qty_table[REG_QTY (regno)]; | |
1ff0c00d | 1156 | |
1bb98cec DM |
1157 | if (ent->mode != GET_MODE (x)) |
1158 | return 0; | |
1159 | } | |
1160 | ||
1161 | if (modified || ! qty_valid) | |
7afe21cc RK |
1162 | { |
1163 | if (classp) | |
1164 | for (classp = classp->first_same_value; | |
1165 | classp != 0; | |
1166 | classp = classp->next_same_value) | |
f8cfc6aa | 1167 | if (REG_P (classp->exp) |
7afe21cc RK |
1168 | && GET_MODE (classp->exp) == GET_MODE (x)) |
1169 | { | |
cd928652 ZD |
1170 | unsigned c_regno = REGNO (classp->exp); |
1171 | ||
1172 | gcc_assert (REGNO_QTY_VALID_P (c_regno)); | |
1173 | ||
1174 | /* Suppose that 5 is hard reg and 100 and 101 are | |
1175 | pseudos. Consider | |
1176 | ||
1177 | (set (reg:si 100) (reg:si 5)) | |
1178 | (set (reg:si 5) (reg:si 100)) | |
1179 | (set (reg:di 101) (reg:di 5)) | |
1180 | ||
1181 | We would now set REG_QTY (101) = REG_QTY (5), but the | |
1182 | entry for 5 is in SImode. When we use this later in | |
1183 | copy propagation, we get the register in wrong mode. */ | |
1184 | if (qty_table[REG_QTY (c_regno)].mode != GET_MODE (x)) | |
1185 | continue; | |
1186 | ||
1187 | make_regs_eqv (regno, c_regno); | |
7afe21cc RK |
1188 | return 1; |
1189 | } | |
1190 | ||
d9f20424 R |
1191 | /* Mention_regs for a SUBREG checks if REG_TICK is exactly one larger |
1192 | than REG_IN_TABLE to find out if there was only a single preceding | |
1193 | invalidation - for the SUBREG - or another one, which would be | |
1194 | for the full register. However, if we find here that REG_TICK | |
1195 | indicates that the register is invalid, it means that it has | |
1196 | been invalidated in a separate operation. The SUBREG might be used | |
1197 | now (then this is a recursive call), or we might use the full REG | |
1198 | now and a SUBREG of it later. So bump up REG_TICK so that | |
1199 | mention_regs will do the right thing. */ | |
1200 | if (! modified | |
1201 | && REG_IN_TABLE (regno) >= 0 | |
1202 | && REG_TICK (regno) == REG_IN_TABLE (regno) + 1) | |
1203 | REG_TICK (regno)++; | |
1bb98cec | 1204 | make_new_qty (regno, GET_MODE (x)); |
7afe21cc RK |
1205 | return 1; |
1206 | } | |
cdf4112f TG |
1207 | |
1208 | return 0; | |
7afe21cc | 1209 | } |
c610adec RK |
1210 | |
1211 | /* If X is a SUBREG, we will likely be inserting the inner register in the | |
1212 | table. If that register doesn't have an assigned quantity number at | |
1213 | this point but does later, the insertion that we will be doing now will | |
1214 | not be accessible because its hash code will have changed. So assign | |
1215 | a quantity number now. */ | |
1216 | ||
f8cfc6aa | 1217 | else if (GET_CODE (x) == SUBREG && REG_P (SUBREG_REG (x)) |
c610adec RK |
1218 | && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x)))) |
1219 | { | |
9714cf43 | 1220 | insert_regs (SUBREG_REG (x), NULL, 0); |
34c73909 | 1221 | mention_regs (x); |
c610adec RK |
1222 | return 1; |
1223 | } | |
7afe21cc RK |
1224 | else |
1225 | return mention_regs (x); | |
1226 | } | |
1227 | \f | |
1228 | /* Look in or update the hash table. */ | |
1229 | ||
7afe21cc RK |
1230 | /* Remove table element ELT from use in the table. |
1231 | HASH is its hash code, made using the HASH macro. | |
1232 | It's an argument because often that is known in advance | |
1233 | and we save much time not recomputing it. */ | |
1234 | ||
1235 | static void | |
7080f735 | 1236 | remove_from_table (struct table_elt *elt, unsigned int hash) |
7afe21cc RK |
1237 | { |
1238 | if (elt == 0) | |
1239 | return; | |
1240 | ||
1241 | /* Mark this element as removed. See cse_insn. */ | |
1242 | elt->first_same_value = 0; | |
1243 | ||
1244 | /* Remove the table element from its equivalence class. */ | |
278a83b2 | 1245 | |
7afe21cc | 1246 | { |
b3694847 SS |
1247 | struct table_elt *prev = elt->prev_same_value; |
1248 | struct table_elt *next = elt->next_same_value; | |
7afe21cc | 1249 | |
278a83b2 KH |
1250 | if (next) |
1251 | next->prev_same_value = prev; | |
7afe21cc RK |
1252 | |
1253 | if (prev) | |
1254 | prev->next_same_value = next; | |
1255 | else | |
1256 | { | |
b3694847 | 1257 | struct table_elt *newfirst = next; |
7afe21cc RK |
1258 | while (next) |
1259 | { | |
1260 | next->first_same_value = newfirst; | |
1261 | next = next->next_same_value; | |
1262 | } | |
1263 | } | |
1264 | } | |
1265 | ||
1266 | /* Remove the table element from its hash bucket. */ | |
1267 | ||
1268 | { | |
b3694847 SS |
1269 | struct table_elt *prev = elt->prev_same_hash; |
1270 | struct table_elt *next = elt->next_same_hash; | |
7afe21cc | 1271 | |
278a83b2 KH |
1272 | if (next) |
1273 | next->prev_same_hash = prev; | |
7afe21cc RK |
1274 | |
1275 | if (prev) | |
1276 | prev->next_same_hash = next; | |
1277 | else if (table[hash] == elt) | |
1278 | table[hash] = next; | |
1279 | else | |
1280 | { | |
1281 | /* This entry is not in the proper hash bucket. This can happen | |
1282 | when two classes were merged by `merge_equiv_classes'. Search | |
1283 | for the hash bucket that it heads. This happens only very | |
1284 | rarely, so the cost is acceptable. */ | |
9b1549b8 | 1285 | for (hash = 0; hash < HASH_SIZE; hash++) |
7afe21cc RK |
1286 | if (table[hash] == elt) |
1287 | table[hash] = next; | |
1288 | } | |
1289 | } | |
1290 | ||
1291 | /* Remove the table element from its related-value circular chain. */ | |
1292 | ||
1293 | if (elt->related_value != 0 && elt->related_value != elt) | |
1294 | { | |
b3694847 | 1295 | struct table_elt *p = elt->related_value; |
770ae6cc | 1296 | |
7afe21cc RK |
1297 | while (p->related_value != elt) |
1298 | p = p->related_value; | |
1299 | p->related_value = elt->related_value; | |
1300 | if (p->related_value == p) | |
1301 | p->related_value = 0; | |
1302 | } | |
1303 | ||
9b1549b8 DM |
1304 | /* Now add it to the free element chain. */ |
1305 | elt->next_same_hash = free_element_chain; | |
1306 | free_element_chain = elt; | |
7afe21cc RK |
1307 | } |
1308 | ||
1309 | /* Look up X in the hash table and return its table element, | |
1310 | or 0 if X is not in the table. | |
1311 | ||
1312 | MODE is the machine-mode of X, or if X is an integer constant | |
1313 | with VOIDmode then MODE is the mode with which X will be used. | |
1314 | ||
1315 | Here we are satisfied to find an expression whose tree structure | |
1316 | looks like X. */ | |
1317 | ||
1318 | static struct table_elt * | |
7080f735 | 1319 | lookup (rtx x, unsigned int hash, enum machine_mode mode) |
7afe21cc | 1320 | { |
b3694847 | 1321 | struct table_elt *p; |
7afe21cc RK |
1322 | |
1323 | for (p = table[hash]; p; p = p->next_same_hash) | |
f8cfc6aa | 1324 | if (mode == p->mode && ((x == p->exp && REG_P (x)) |
0516f6fe | 1325 | || exp_equiv_p (x, p->exp, !REG_P (x), false))) |
7afe21cc RK |
1326 | return p; |
1327 | ||
1328 | return 0; | |
1329 | } | |
1330 | ||
1331 | /* Like `lookup' but don't care whether the table element uses invalid regs. | |
1332 | Also ignore discrepancies in the machine mode of a register. */ | |
1333 | ||
1334 | static struct table_elt * | |
7080f735 | 1335 | lookup_for_remove (rtx x, unsigned int hash, enum machine_mode mode) |
7afe21cc | 1336 | { |
b3694847 | 1337 | struct table_elt *p; |
7afe21cc | 1338 | |
f8cfc6aa | 1339 | if (REG_P (x)) |
7afe21cc | 1340 | { |
770ae6cc RK |
1341 | unsigned int regno = REGNO (x); |
1342 | ||
7afe21cc RK |
1343 | /* Don't check the machine mode when comparing registers; |
1344 | invalidating (REG:SI 0) also invalidates (REG:DF 0). */ | |
1345 | for (p = table[hash]; p; p = p->next_same_hash) | |
f8cfc6aa | 1346 | if (REG_P (p->exp) |
7afe21cc RK |
1347 | && REGNO (p->exp) == regno) |
1348 | return p; | |
1349 | } | |
1350 | else | |
1351 | { | |
1352 | for (p = table[hash]; p; p = p->next_same_hash) | |
0516f6fe SB |
1353 | if (mode == p->mode |
1354 | && (x == p->exp || exp_equiv_p (x, p->exp, 0, false))) | |
7afe21cc RK |
1355 | return p; |
1356 | } | |
1357 | ||
1358 | return 0; | |
1359 | } | |
1360 | ||
1361 | /* Look for an expression equivalent to X and with code CODE. | |
1362 | If one is found, return that expression. */ | |
1363 | ||
1364 | static rtx | |
7080f735 | 1365 | lookup_as_function (rtx x, enum rtx_code code) |
7afe21cc | 1366 | { |
b3694847 | 1367 | struct table_elt *p |
0516f6fe | 1368 | = lookup (x, SAFE_HASH (x, VOIDmode), GET_MODE (x)); |
770ae6cc | 1369 | |
34c73909 R |
1370 | /* If we are looking for a CONST_INT, the mode doesn't really matter, as |
1371 | long as we are narrowing. So if we looked in vain for a mode narrower | |
1372 | than word_mode before, look for word_mode now. */ | |
1373 | if (p == 0 && code == CONST_INT | |
1374 | && GET_MODE_SIZE (GET_MODE (x)) < GET_MODE_SIZE (word_mode)) | |
1375 | { | |
1376 | x = copy_rtx (x); | |
1377 | PUT_MODE (x, word_mode); | |
0516f6fe | 1378 | p = lookup (x, SAFE_HASH (x, VOIDmode), word_mode); |
34c73909 R |
1379 | } |
1380 | ||
7afe21cc RK |
1381 | if (p == 0) |
1382 | return 0; | |
1383 | ||
1384 | for (p = p->first_same_value; p; p = p->next_same_value) | |
770ae6cc RK |
1385 | if (GET_CODE (p->exp) == code |
1386 | /* Make sure this is a valid entry in the table. */ | |
0516f6fe | 1387 | && exp_equiv_p (p->exp, p->exp, 1, false)) |
770ae6cc | 1388 | return p->exp; |
278a83b2 | 1389 | |
7afe21cc RK |
1390 | return 0; |
1391 | } | |
1392 | ||
1393 | /* Insert X in the hash table, assuming HASH is its hash code | |
1394 | and CLASSP is an element of the class it should go in | |
1395 | (or 0 if a new class should be made). | |
1396 | It is inserted at the proper position to keep the class in | |
1397 | the order cheapest first. | |
1398 | ||
1399 | MODE is the machine-mode of X, or if X is an integer constant | |
1400 | with VOIDmode then MODE is the mode with which X will be used. | |
1401 | ||
1402 | For elements of equal cheapness, the most recent one | |
1403 | goes in front, except that the first element in the list | |
1404 | remains first unless a cheaper element is added. The order of | |
1405 | pseudo-registers does not matter, as canon_reg will be called to | |
830a38ee | 1406 | find the cheapest when a register is retrieved from the table. |
7afe21cc RK |
1407 | |
1408 | The in_memory field in the hash table element is set to 0. | |
1409 | The caller must set it nonzero if appropriate. | |
1410 | ||
1411 | You should call insert_regs (X, CLASSP, MODIFY) before calling here, | |
1412 | and if insert_regs returns a nonzero value | |
1413 | you must then recompute its hash code before calling here. | |
1414 | ||
1415 | If necessary, update table showing constant values of quantities. */ | |
1416 | ||
630c79be | 1417 | #define CHEAPER(X, Y) \ |
56ae04af | 1418 | (preferable ((X)->cost, (X)->regcost, (Y)->cost, (Y)->regcost) < 0) |
7afe21cc RK |
1419 | |
1420 | static struct table_elt * | |
7080f735 | 1421 | insert (rtx x, struct table_elt *classp, unsigned int hash, enum machine_mode mode) |
7afe21cc | 1422 | { |
b3694847 | 1423 | struct table_elt *elt; |
7afe21cc RK |
1424 | |
1425 | /* If X is a register and we haven't made a quantity for it, | |
1426 | something is wrong. */ | |
341c100f | 1427 | gcc_assert (!REG_P (x) || REGNO_QTY_VALID_P (REGNO (x))); |
7afe21cc RK |
1428 | |
1429 | /* If X is a hard register, show it is being put in the table. */ | |
f8cfc6aa | 1430 | if (REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER) |
7afe21cc | 1431 | { |
770ae6cc | 1432 | unsigned int regno = REGNO (x); |
66fd46b6 | 1433 | unsigned int endregno = regno + hard_regno_nregs[regno][GET_MODE (x)]; |
770ae6cc | 1434 | unsigned int i; |
7afe21cc RK |
1435 | |
1436 | for (i = regno; i < endregno; i++) | |
770ae6cc | 1437 | SET_HARD_REG_BIT (hard_regs_in_table, i); |
7afe21cc RK |
1438 | } |
1439 | ||
7afe21cc RK |
1440 | /* Put an element for X into the right hash bucket. */ |
1441 | ||
9b1549b8 DM |
1442 | elt = free_element_chain; |
1443 | if (elt) | |
770ae6cc | 1444 | free_element_chain = elt->next_same_hash; |
9b1549b8 | 1445 | else |
5ed6ace5 | 1446 | elt = XNEW (struct table_elt); |
9b1549b8 | 1447 | |
7afe21cc | 1448 | elt->exp = x; |
db048faf | 1449 | elt->canon_exp = NULL_RTX; |
7afe21cc | 1450 | elt->cost = COST (x); |
630c79be | 1451 | elt->regcost = approx_reg_cost (x); |
7afe21cc RK |
1452 | elt->next_same_value = 0; |
1453 | elt->prev_same_value = 0; | |
1454 | elt->next_same_hash = table[hash]; | |
1455 | elt->prev_same_hash = 0; | |
1456 | elt->related_value = 0; | |
1457 | elt->in_memory = 0; | |
1458 | elt->mode = mode; | |
389fdba0 | 1459 | elt->is_const = (CONSTANT_P (x) || fixed_base_plus_p (x)); |
7afe21cc RK |
1460 | |
1461 | if (table[hash]) | |
1462 | table[hash]->prev_same_hash = elt; | |
1463 | table[hash] = elt; | |
1464 | ||
1465 | /* Put it into the proper value-class. */ | |
1466 | if (classp) | |
1467 | { | |
1468 | classp = classp->first_same_value; | |
1469 | if (CHEAPER (elt, classp)) | |
f9da5064 | 1470 | /* Insert at the head of the class. */ |
7afe21cc | 1471 | { |
b3694847 | 1472 | struct table_elt *p; |
7afe21cc RK |
1473 | elt->next_same_value = classp; |
1474 | classp->prev_same_value = elt; | |
1475 | elt->first_same_value = elt; | |
1476 | ||
1477 | for (p = classp; p; p = p->next_same_value) | |
1478 | p->first_same_value = elt; | |
1479 | } | |
1480 | else | |
1481 | { | |
1482 | /* Insert not at head of the class. */ | |
1483 | /* Put it after the last element cheaper than X. */ | |
b3694847 | 1484 | struct table_elt *p, *next; |
770ae6cc | 1485 | |
7afe21cc RK |
1486 | for (p = classp; (next = p->next_same_value) && CHEAPER (next, elt); |
1487 | p = next); | |
770ae6cc | 1488 | |
7afe21cc RK |
1489 | /* Put it after P and before NEXT. */ |
1490 | elt->next_same_value = next; | |
1491 | if (next) | |
1492 | next->prev_same_value = elt; | |
770ae6cc | 1493 | |
7afe21cc RK |
1494 | elt->prev_same_value = p; |
1495 | p->next_same_value = elt; | |
1496 | elt->first_same_value = classp; | |
1497 | } | |
1498 | } | |
1499 | else | |
1500 | elt->first_same_value = elt; | |
1501 | ||
1502 | /* If this is a constant being set equivalent to a register or a register | |
1503 | being set equivalent to a constant, note the constant equivalence. | |
1504 | ||
1505 | If this is a constant, it cannot be equivalent to a different constant, | |
1506 | and a constant is the only thing that can be cheaper than a register. So | |
1507 | we know the register is the head of the class (before the constant was | |
1508 | inserted). | |
1509 | ||
1510 | If this is a register that is not already known equivalent to a | |
1511 | constant, we must check the entire class. | |
1512 | ||
1513 | If this is a register that is already known equivalent to an insn, | |
1bb98cec | 1514 | update the qtys `const_insn' to show that `this_insn' is the latest |
7afe21cc RK |
1515 | insn making that quantity equivalent to the constant. */ |
1516 | ||
f8cfc6aa JQ |
1517 | if (elt->is_const && classp && REG_P (classp->exp) |
1518 | && !REG_P (x)) | |
7afe21cc | 1519 | { |
1bb98cec DM |
1520 | int exp_q = REG_QTY (REGNO (classp->exp)); |
1521 | struct qty_table_elem *exp_ent = &qty_table[exp_q]; | |
1522 | ||
4de249d9 | 1523 | exp_ent->const_rtx = gen_lowpart (exp_ent->mode, x); |
1bb98cec | 1524 | exp_ent->const_insn = this_insn; |
7afe21cc RK |
1525 | } |
1526 | ||
f8cfc6aa | 1527 | else if (REG_P (x) |
1bb98cec DM |
1528 | && classp |
1529 | && ! qty_table[REG_QTY (REGNO (x))].const_rtx | |
f353588a | 1530 | && ! elt->is_const) |
7afe21cc | 1531 | { |
b3694847 | 1532 | struct table_elt *p; |
7afe21cc RK |
1533 | |
1534 | for (p = classp; p != 0; p = p->next_same_value) | |
1535 | { | |
f8cfc6aa | 1536 | if (p->is_const && !REG_P (p->exp)) |
7afe21cc | 1537 | { |
1bb98cec DM |
1538 | int x_q = REG_QTY (REGNO (x)); |
1539 | struct qty_table_elem *x_ent = &qty_table[x_q]; | |
1540 | ||
770ae6cc | 1541 | x_ent->const_rtx |
4de249d9 | 1542 | = gen_lowpart (GET_MODE (x), p->exp); |
1bb98cec | 1543 | x_ent->const_insn = this_insn; |
7afe21cc RK |
1544 | break; |
1545 | } | |
1546 | } | |
1547 | } | |
1548 | ||
f8cfc6aa | 1549 | else if (REG_P (x) |
1bb98cec DM |
1550 | && qty_table[REG_QTY (REGNO (x))].const_rtx |
1551 | && GET_MODE (x) == qty_table[REG_QTY (REGNO (x))].mode) | |
1552 | qty_table[REG_QTY (REGNO (x))].const_insn = this_insn; | |
7afe21cc RK |
1553 | |
1554 | /* If this is a constant with symbolic value, | |
1555 | and it has a term with an explicit integer value, | |
1556 | link it up with related expressions. */ | |
1557 | if (GET_CODE (x) == CONST) | |
1558 | { | |
1559 | rtx subexp = get_related_value (x); | |
2197a88a | 1560 | unsigned subhash; |
7afe21cc RK |
1561 | struct table_elt *subelt, *subelt_prev; |
1562 | ||
1563 | if (subexp != 0) | |
1564 | { | |
1565 | /* Get the integer-free subexpression in the hash table. */ | |
0516f6fe | 1566 | subhash = SAFE_HASH (subexp, mode); |
7afe21cc RK |
1567 | subelt = lookup (subexp, subhash, mode); |
1568 | if (subelt == 0) | |
9714cf43 | 1569 | subelt = insert (subexp, NULL, subhash, mode); |
7afe21cc RK |
1570 | /* Initialize SUBELT's circular chain if it has none. */ |
1571 | if (subelt->related_value == 0) | |
1572 | subelt->related_value = subelt; | |
1573 | /* Find the element in the circular chain that precedes SUBELT. */ | |
1574 | subelt_prev = subelt; | |
1575 | while (subelt_prev->related_value != subelt) | |
1576 | subelt_prev = subelt_prev->related_value; | |
1577 | /* Put new ELT into SUBELT's circular chain just before SUBELT. | |
1578 | This way the element that follows SUBELT is the oldest one. */ | |
1579 | elt->related_value = subelt_prev->related_value; | |
1580 | subelt_prev->related_value = elt; | |
1581 | } | |
1582 | } | |
1583 | ||
1584 | return elt; | |
1585 | } | |
1586 | \f | |
1587 | /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from | |
1588 | CLASS2 into CLASS1. This is done when we have reached an insn which makes | |
1589 | the two classes equivalent. | |
1590 | ||
1591 | CLASS1 will be the surviving class; CLASS2 should not be used after this | |
1592 | call. | |
1593 | ||
1594 | Any invalid entries in CLASS2 will not be copied. */ | |
1595 | ||
1596 | static void | |
7080f735 | 1597 | merge_equiv_classes (struct table_elt *class1, struct table_elt *class2) |
7afe21cc RK |
1598 | { |
1599 | struct table_elt *elt, *next, *new; | |
1600 | ||
1601 | /* Ensure we start with the head of the classes. */ | |
1602 | class1 = class1->first_same_value; | |
1603 | class2 = class2->first_same_value; | |
1604 | ||
1605 | /* If they were already equal, forget it. */ | |
1606 | if (class1 == class2) | |
1607 | return; | |
1608 | ||
1609 | for (elt = class2; elt; elt = next) | |
1610 | { | |
770ae6cc | 1611 | unsigned int hash; |
7afe21cc RK |
1612 | rtx exp = elt->exp; |
1613 | enum machine_mode mode = elt->mode; | |
1614 | ||
1615 | next = elt->next_same_value; | |
1616 | ||
1617 | /* Remove old entry, make a new one in CLASS1's class. | |
1618 | Don't do this for invalid entries as we cannot find their | |
0f41302f | 1619 | hash code (it also isn't necessary). */ |
0516f6fe | 1620 | if (REG_P (exp) || exp_equiv_p (exp, exp, 1, false)) |
7afe21cc | 1621 | { |
a90fc8e0 RH |
1622 | bool need_rehash = false; |
1623 | ||
7afe21cc | 1624 | hash_arg_in_memory = 0; |
7afe21cc | 1625 | hash = HASH (exp, mode); |
278a83b2 | 1626 | |
f8cfc6aa | 1627 | if (REG_P (exp)) |
a90fc8e0 | 1628 | { |
08a69267 | 1629 | need_rehash = REGNO_QTY_VALID_P (REGNO (exp)); |
a90fc8e0 RH |
1630 | delete_reg_equiv (REGNO (exp)); |
1631 | } | |
278a83b2 | 1632 | |
7afe21cc RK |
1633 | remove_from_table (elt, hash); |
1634 | ||
a90fc8e0 | 1635 | if (insert_regs (exp, class1, 0) || need_rehash) |
8ae2b8f6 JW |
1636 | { |
1637 | rehash_using_reg (exp); | |
1638 | hash = HASH (exp, mode); | |
1639 | } | |
7afe21cc RK |
1640 | new = insert (exp, class1, hash, mode); |
1641 | new->in_memory = hash_arg_in_memory; | |
7afe21cc RK |
1642 | } |
1643 | } | |
1644 | } | |
1645 | \f | |
01e752d3 JL |
1646 | /* Flush the entire hash table. */ |
1647 | ||
1648 | static void | |
7080f735 | 1649 | flush_hash_table (void) |
01e752d3 JL |
1650 | { |
1651 | int i; | |
1652 | struct table_elt *p; | |
1653 | ||
9b1549b8 | 1654 | for (i = 0; i < HASH_SIZE; i++) |
01e752d3 JL |
1655 | for (p = table[i]; p; p = table[i]) |
1656 | { | |
1657 | /* Note that invalidate can remove elements | |
1658 | after P in the current hash chain. */ | |
f8cfc6aa | 1659 | if (REG_P (p->exp)) |
524e3576 | 1660 | invalidate (p->exp, VOIDmode); |
01e752d3 JL |
1661 | else |
1662 | remove_from_table (p, i); | |
1663 | } | |
1664 | } | |
14a774a9 | 1665 | \f |
2ce6dc2f JH |
1666 | /* Function called for each rtx to check whether true dependence exist. */ |
1667 | struct check_dependence_data | |
1668 | { | |
1669 | enum machine_mode mode; | |
1670 | rtx exp; | |
9ddb66ca | 1671 | rtx addr; |
2ce6dc2f | 1672 | }; |
be8ac49a | 1673 | |
2ce6dc2f | 1674 | static int |
7080f735 | 1675 | check_dependence (rtx *x, void *data) |
2ce6dc2f JH |
1676 | { |
1677 | struct check_dependence_data *d = (struct check_dependence_data *) data; | |
3c0cb5de | 1678 | if (*x && MEM_P (*x)) |
9ddb66ca JH |
1679 | return canon_true_dependence (d->exp, d->mode, d->addr, *x, |
1680 | cse_rtx_varies_p); | |
2ce6dc2f JH |
1681 | else |
1682 | return 0; | |
1683 | } | |
1684 | \f | |
14a774a9 RK |
1685 | /* Remove from the hash table, or mark as invalid, all expressions whose |
1686 | values could be altered by storing in X. X is a register, a subreg, or | |
1687 | a memory reference with nonvarying address (because, when a memory | |
1688 | reference with a varying address is stored in, all memory references are | |
1689 | removed by invalidate_memory so specific invalidation is superfluous). | |
1690 | FULL_MODE, if not VOIDmode, indicates that this much should be | |
1691 | invalidated instead of just the amount indicated by the mode of X. This | |
1692 | is only used for bitfield stores into memory. | |
1693 | ||
1694 | A nonvarying address may be just a register or just a symbol reference, | |
1695 | or it may be either of those plus a numeric offset. */ | |
7afe21cc RK |
1696 | |
1697 | static void | |
7080f735 | 1698 | invalidate (rtx x, enum machine_mode full_mode) |
7afe21cc | 1699 | { |
b3694847 SS |
1700 | int i; |
1701 | struct table_elt *p; | |
9ddb66ca | 1702 | rtx addr; |
7afe21cc | 1703 | |
14a774a9 | 1704 | switch (GET_CODE (x)) |
7afe21cc | 1705 | { |
14a774a9 RK |
1706 | case REG: |
1707 | { | |
1708 | /* If X is a register, dependencies on its contents are recorded | |
1709 | through the qty number mechanism. Just change the qty number of | |
1710 | the register, mark it as invalid for expressions that refer to it, | |
1711 | and remove it itself. */ | |
770ae6cc RK |
1712 | unsigned int regno = REGNO (x); |
1713 | unsigned int hash = HASH (x, GET_MODE (x)); | |
7afe21cc | 1714 | |
14a774a9 RK |
1715 | /* Remove REGNO from any quantity list it might be on and indicate |
1716 | that its value might have changed. If it is a pseudo, remove its | |
1717 | entry from the hash table. | |
7afe21cc | 1718 | |
14a774a9 RK |
1719 | For a hard register, we do the first two actions above for any |
1720 | additional hard registers corresponding to X. Then, if any of these | |
1721 | registers are in the table, we must remove any REG entries that | |
1722 | overlap these registers. */ | |
7afe21cc | 1723 | |
14a774a9 RK |
1724 | delete_reg_equiv (regno); |
1725 | REG_TICK (regno)++; | |
46081bb3 | 1726 | SUBREG_TICKED (regno) = -1; |
85e4d983 | 1727 | |
14a774a9 RK |
1728 | if (regno >= FIRST_PSEUDO_REGISTER) |
1729 | { | |
1730 | /* Because a register can be referenced in more than one mode, | |
1731 | we might have to remove more than one table entry. */ | |
1732 | struct table_elt *elt; | |
85e4d983 | 1733 | |
14a774a9 RK |
1734 | while ((elt = lookup_for_remove (x, hash, GET_MODE (x)))) |
1735 | remove_from_table (elt, hash); | |
1736 | } | |
1737 | else | |
1738 | { | |
1739 | HOST_WIDE_INT in_table | |
1740 | = TEST_HARD_REG_BIT (hard_regs_in_table, regno); | |
770ae6cc | 1741 | unsigned int endregno |
66fd46b6 | 1742 | = regno + hard_regno_nregs[regno][GET_MODE (x)]; |
770ae6cc | 1743 | unsigned int tregno, tendregno, rn; |
b3694847 | 1744 | struct table_elt *p, *next; |
7afe21cc | 1745 | |
14a774a9 | 1746 | CLEAR_HARD_REG_BIT (hard_regs_in_table, regno); |
7afe21cc | 1747 | |
770ae6cc | 1748 | for (rn = regno + 1; rn < endregno; rn++) |
14a774a9 | 1749 | { |
770ae6cc RK |
1750 | in_table |= TEST_HARD_REG_BIT (hard_regs_in_table, rn); |
1751 | CLEAR_HARD_REG_BIT (hard_regs_in_table, rn); | |
1752 | delete_reg_equiv (rn); | |
1753 | REG_TICK (rn)++; | |
46081bb3 | 1754 | SUBREG_TICKED (rn) = -1; |
14a774a9 | 1755 | } |
7afe21cc | 1756 | |
14a774a9 | 1757 | if (in_table) |
9b1549b8 | 1758 | for (hash = 0; hash < HASH_SIZE; hash++) |
14a774a9 RK |
1759 | for (p = table[hash]; p; p = next) |
1760 | { | |
1761 | next = p->next_same_hash; | |
7afe21cc | 1762 | |
f8cfc6aa | 1763 | if (!REG_P (p->exp) |
278a83b2 KH |
1764 | || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER) |
1765 | continue; | |
1766 | ||
14a774a9 RK |
1767 | tregno = REGNO (p->exp); |
1768 | tendregno | |
66fd46b6 | 1769 | = tregno + hard_regno_nregs[tregno][GET_MODE (p->exp)]; |
14a774a9 RK |
1770 | if (tendregno > regno && tregno < endregno) |
1771 | remove_from_table (p, hash); | |
1772 | } | |
1773 | } | |
1774 | } | |
7afe21cc | 1775 | return; |
7afe21cc | 1776 | |
14a774a9 | 1777 | case SUBREG: |
bb4034b3 | 1778 | invalidate (SUBREG_REG (x), VOIDmode); |
7afe21cc | 1779 | return; |
aac5cc16 | 1780 | |
14a774a9 | 1781 | case PARALLEL: |
278a83b2 | 1782 | for (i = XVECLEN (x, 0) - 1; i >= 0; --i) |
aac5cc16 RH |
1783 | invalidate (XVECEXP (x, 0, i), VOIDmode); |
1784 | return; | |
aac5cc16 | 1785 | |
14a774a9 RK |
1786 | case EXPR_LIST: |
1787 | /* This is part of a disjoint return value; extract the location in | |
1788 | question ignoring the offset. */ | |
aac5cc16 RH |
1789 | invalidate (XEXP (x, 0), VOIDmode); |
1790 | return; | |
7afe21cc | 1791 | |
14a774a9 | 1792 | case MEM: |
9ddb66ca | 1793 | addr = canon_rtx (get_addr (XEXP (x, 0))); |
db048faf MM |
1794 | /* Calculate the canonical version of X here so that |
1795 | true_dependence doesn't generate new RTL for X on each call. */ | |
1796 | x = canon_rtx (x); | |
1797 | ||
14a774a9 RK |
1798 | /* Remove all hash table elements that refer to overlapping pieces of |
1799 | memory. */ | |
1800 | if (full_mode == VOIDmode) | |
1801 | full_mode = GET_MODE (x); | |
bb4034b3 | 1802 | |
9b1549b8 | 1803 | for (i = 0; i < HASH_SIZE; i++) |
7afe21cc | 1804 | { |
b3694847 | 1805 | struct table_elt *next; |
14a774a9 RK |
1806 | |
1807 | for (p = table[i]; p; p = next) | |
1808 | { | |
1809 | next = p->next_same_hash; | |
db048faf MM |
1810 | if (p->in_memory) |
1811 | { | |
2ce6dc2f JH |
1812 | struct check_dependence_data d; |
1813 | ||
1814 | /* Just canonicalize the expression once; | |
1815 | otherwise each time we call invalidate | |
1816 | true_dependence will canonicalize the | |
1817 | expression again. */ | |
1818 | if (!p->canon_exp) | |
1819 | p->canon_exp = canon_rtx (p->exp); | |
1820 | d.exp = x; | |
9ddb66ca | 1821 | d.addr = addr; |
2ce6dc2f JH |
1822 | d.mode = full_mode; |
1823 | if (for_each_rtx (&p->canon_exp, check_dependence, &d)) | |
db048faf | 1824 | remove_from_table (p, i); |
db048faf | 1825 | } |
14a774a9 | 1826 | } |
7afe21cc | 1827 | } |
14a774a9 RK |
1828 | return; |
1829 | ||
1830 | default: | |
341c100f | 1831 | gcc_unreachable (); |
7afe21cc RK |
1832 | } |
1833 | } | |
14a774a9 | 1834 | \f |
7afe21cc RK |
1835 | /* Remove all expressions that refer to register REGNO, |
1836 | since they are already invalid, and we are about to | |
1837 | mark that register valid again and don't want the old | |
1838 | expressions to reappear as valid. */ | |
1839 | ||
1840 | static void | |
7080f735 | 1841 | remove_invalid_refs (unsigned int regno) |
7afe21cc | 1842 | { |
770ae6cc RK |
1843 | unsigned int i; |
1844 | struct table_elt *p, *next; | |
7afe21cc | 1845 | |
9b1549b8 | 1846 | for (i = 0; i < HASH_SIZE; i++) |
7afe21cc RK |
1847 | for (p = table[i]; p; p = next) |
1848 | { | |
1849 | next = p->next_same_hash; | |
f8cfc6aa | 1850 | if (!REG_P (p->exp) |
68252e27 | 1851 | && refers_to_regno_p (regno, regno + 1, p->exp, (rtx *) 0)) |
7afe21cc RK |
1852 | remove_from_table (p, i); |
1853 | } | |
1854 | } | |
34c73909 | 1855 | |
ddef6bc7 JJ |
1856 | /* Likewise for a subreg with subreg_reg REGNO, subreg_byte OFFSET, |
1857 | and mode MODE. */ | |
34c73909 | 1858 | static void |
7080f735 AJ |
1859 | remove_invalid_subreg_refs (unsigned int regno, unsigned int offset, |
1860 | enum machine_mode mode) | |
34c73909 | 1861 | { |
770ae6cc RK |
1862 | unsigned int i; |
1863 | struct table_elt *p, *next; | |
ddef6bc7 | 1864 | unsigned int end = offset + (GET_MODE_SIZE (mode) - 1); |
34c73909 | 1865 | |
9b1549b8 | 1866 | for (i = 0; i < HASH_SIZE; i++) |
34c73909 R |
1867 | for (p = table[i]; p; p = next) |
1868 | { | |
ddef6bc7 | 1869 | rtx exp = p->exp; |
34c73909 | 1870 | next = p->next_same_hash; |
278a83b2 | 1871 | |
f8cfc6aa | 1872 | if (!REG_P (exp) |
34c73909 | 1873 | && (GET_CODE (exp) != SUBREG |
f8cfc6aa | 1874 | || !REG_P (SUBREG_REG (exp)) |
34c73909 | 1875 | || REGNO (SUBREG_REG (exp)) != regno |
ddef6bc7 JJ |
1876 | || (((SUBREG_BYTE (exp) |
1877 | + (GET_MODE_SIZE (GET_MODE (exp)) - 1)) >= offset) | |
1878 | && SUBREG_BYTE (exp) <= end)) | |
68252e27 | 1879 | && refers_to_regno_p (regno, regno + 1, p->exp, (rtx *) 0)) |
34c73909 R |
1880 | remove_from_table (p, i); |
1881 | } | |
1882 | } | |
7afe21cc RK |
1883 | \f |
1884 | /* Recompute the hash codes of any valid entries in the hash table that | |
1885 | reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG. | |
1886 | ||
1887 | This is called when we make a jump equivalence. */ | |
1888 | ||
1889 | static void | |
7080f735 | 1890 | rehash_using_reg (rtx x) |
7afe21cc | 1891 | { |
973838fd | 1892 | unsigned int i; |
7afe21cc | 1893 | struct table_elt *p, *next; |
2197a88a | 1894 | unsigned hash; |
7afe21cc RK |
1895 | |
1896 | if (GET_CODE (x) == SUBREG) | |
1897 | x = SUBREG_REG (x); | |
1898 | ||
1899 | /* If X is not a register or if the register is known not to be in any | |
1900 | valid entries in the table, we have no work to do. */ | |
1901 | ||
f8cfc6aa | 1902 | if (!REG_P (x) |
30f72379 MM |
1903 | || REG_IN_TABLE (REGNO (x)) < 0 |
1904 | || REG_IN_TABLE (REGNO (x)) != REG_TICK (REGNO (x))) | |
7afe21cc RK |
1905 | return; |
1906 | ||
1907 | /* Scan all hash chains looking for valid entries that mention X. | |
a90fc8e0 | 1908 | If we find one and it is in the wrong hash chain, move it. */ |
7afe21cc | 1909 | |
9b1549b8 | 1910 | for (i = 0; i < HASH_SIZE; i++) |
7afe21cc RK |
1911 | for (p = table[i]; p; p = next) |
1912 | { | |
1913 | next = p->next_same_hash; | |
a90fc8e0 | 1914 | if (reg_mentioned_p (x, p->exp) |
0516f6fe SB |
1915 | && exp_equiv_p (p->exp, p->exp, 1, false) |
1916 | && i != (hash = SAFE_HASH (p->exp, p->mode))) | |
7afe21cc RK |
1917 | { |
1918 | if (p->next_same_hash) | |
1919 | p->next_same_hash->prev_same_hash = p->prev_same_hash; | |
1920 | ||
1921 | if (p->prev_same_hash) | |
1922 | p->prev_same_hash->next_same_hash = p->next_same_hash; | |
1923 | else | |
1924 | table[i] = p->next_same_hash; | |
1925 | ||
1926 | p->next_same_hash = table[hash]; | |
1927 | p->prev_same_hash = 0; | |
1928 | if (table[hash]) | |
1929 | table[hash]->prev_same_hash = p; | |
1930 | table[hash] = p; | |
1931 | } | |
1932 | } | |
1933 | } | |
1934 | \f | |
7afe21cc RK |
1935 | /* Remove from the hash table any expression that is a call-clobbered |
1936 | register. Also update their TICK values. */ | |
1937 | ||
1938 | static void | |
7080f735 | 1939 | invalidate_for_call (void) |
7afe21cc | 1940 | { |
770ae6cc RK |
1941 | unsigned int regno, endregno; |
1942 | unsigned int i; | |
2197a88a | 1943 | unsigned hash; |
7afe21cc RK |
1944 | struct table_elt *p, *next; |
1945 | int in_table = 0; | |
1946 | ||
1947 | /* Go through all the hard registers. For each that is clobbered in | |
1948 | a CALL_INSN, remove the register from quantity chains and update | |
1949 | reg_tick if defined. Also see if any of these registers is currently | |
1950 | in the table. */ | |
1951 | ||
1952 | for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) | |
1953 | if (TEST_HARD_REG_BIT (regs_invalidated_by_call, regno)) | |
1954 | { | |
1955 | delete_reg_equiv (regno); | |
30f72379 | 1956 | if (REG_TICK (regno) >= 0) |
46081bb3 SH |
1957 | { |
1958 | REG_TICK (regno)++; | |
1959 | SUBREG_TICKED (regno) = -1; | |
1960 | } | |
7afe21cc | 1961 | |
0e227018 | 1962 | in_table |= (TEST_HARD_REG_BIT (hard_regs_in_table, regno) != 0); |
7afe21cc RK |
1963 | } |
1964 | ||
1965 | /* In the case where we have no call-clobbered hard registers in the | |
1966 | table, we are done. Otherwise, scan the table and remove any | |
1967 | entry that overlaps a call-clobbered register. */ | |
1968 | ||
1969 | if (in_table) | |
9b1549b8 | 1970 | for (hash = 0; hash < HASH_SIZE; hash++) |
7afe21cc RK |
1971 | for (p = table[hash]; p; p = next) |
1972 | { | |
1973 | next = p->next_same_hash; | |
1974 | ||
f8cfc6aa | 1975 | if (!REG_P (p->exp) |
7afe21cc RK |
1976 | || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER) |
1977 | continue; | |
1978 | ||
1979 | regno = REGNO (p->exp); | |
66fd46b6 | 1980 | endregno = regno + hard_regno_nregs[regno][GET_MODE (p->exp)]; |
7afe21cc RK |
1981 | |
1982 | for (i = regno; i < endregno; i++) | |
1983 | if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i)) | |
1984 | { | |
1985 | remove_from_table (p, hash); | |
1986 | break; | |
1987 | } | |
1988 | } | |
1989 | } | |
1990 | \f | |
1991 | /* Given an expression X of type CONST, | |
1992 | and ELT which is its table entry (or 0 if it | |
1993 | is not in the hash table), | |
1994 | return an alternate expression for X as a register plus integer. | |
1995 | If none can be found, return 0. */ | |
1996 | ||
1997 | static rtx | |
7080f735 | 1998 | use_related_value (rtx x, struct table_elt *elt) |
7afe21cc | 1999 | { |
b3694847 SS |
2000 | struct table_elt *relt = 0; |
2001 | struct table_elt *p, *q; | |
906c4e36 | 2002 | HOST_WIDE_INT offset; |
7afe21cc RK |
2003 | |
2004 | /* First, is there anything related known? | |
2005 | If we have a table element, we can tell from that. | |
2006 | Otherwise, must look it up. */ | |
2007 | ||
2008 | if (elt != 0 && elt->related_value != 0) | |
2009 | relt = elt; | |
2010 | else if (elt == 0 && GET_CODE (x) == CONST) | |
2011 | { | |
2012 | rtx subexp = get_related_value (x); | |
2013 | if (subexp != 0) | |
2014 | relt = lookup (subexp, | |
0516f6fe | 2015 | SAFE_HASH (subexp, GET_MODE (subexp)), |
7afe21cc RK |
2016 | GET_MODE (subexp)); |
2017 | } | |
2018 | ||
2019 | if (relt == 0) | |
2020 | return 0; | |
2021 | ||
2022 | /* Search all related table entries for one that has an | |
2023 | equivalent register. */ | |
2024 | ||
2025 | p = relt; | |
2026 | while (1) | |
2027 | { | |
2028 | /* This loop is strange in that it is executed in two different cases. | |
2029 | The first is when X is already in the table. Then it is searching | |
2030 | the RELATED_VALUE list of X's class (RELT). The second case is when | |
2031 | X is not in the table. Then RELT points to a class for the related | |
2032 | value. | |
2033 | ||
2034 | Ensure that, whatever case we are in, that we ignore classes that have | |
2035 | the same value as X. */ | |
2036 | ||
2037 | if (rtx_equal_p (x, p->exp)) | |
2038 | q = 0; | |
2039 | else | |
2040 | for (q = p->first_same_value; q; q = q->next_same_value) | |
f8cfc6aa | 2041 | if (REG_P (q->exp)) |
7afe21cc RK |
2042 | break; |
2043 | ||
2044 | if (q) | |
2045 | break; | |
2046 | ||
2047 | p = p->related_value; | |
2048 | ||
2049 | /* We went all the way around, so there is nothing to be found. | |
2050 | Alternatively, perhaps RELT was in the table for some other reason | |
2051 | and it has no related values recorded. */ | |
2052 | if (p == relt || p == 0) | |
2053 | break; | |
2054 | } | |
2055 | ||
2056 | if (q == 0) | |
2057 | return 0; | |
2058 | ||
2059 | offset = (get_integer_term (x) - get_integer_term (p->exp)); | |
2060 | /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */ | |
2061 | return plus_constant (q->exp, offset); | |
2062 | } | |
2063 | \f | |
6462bb43 AO |
2064 | /* Hash a string. Just add its bytes up. */ |
2065 | static inline unsigned | |
0516f6fe | 2066 | hash_rtx_string (const char *ps) |
6462bb43 AO |
2067 | { |
2068 | unsigned hash = 0; | |
68252e27 KH |
2069 | const unsigned char *p = (const unsigned char *) ps; |
2070 | ||
6462bb43 AO |
2071 | if (p) |
2072 | while (*p) | |
2073 | hash += *p++; | |
2074 | ||
2075 | return hash; | |
2076 | } | |
2077 | ||
7afe21cc RK |
2078 | /* Hash an rtx. We are careful to make sure the value is never negative. |
2079 | Equivalent registers hash identically. | |
2080 | MODE is used in hashing for CONST_INTs only; | |
2081 | otherwise the mode of X is used. | |
2082 | ||
0516f6fe | 2083 | Store 1 in DO_NOT_RECORD_P if any subexpression is volatile. |
7afe21cc | 2084 | |
0516f6fe SB |
2085 | If HASH_ARG_IN_MEMORY_P is not NULL, store 1 in it if X contains |
2086 | a MEM rtx which does not have the RTX_UNCHANGING_P bit set. | |
7afe21cc RK |
2087 | |
2088 | Note that cse_insn knows that the hash code of a MEM expression | |
2089 | is just (int) MEM plus the hash code of the address. */ | |
2090 | ||
0516f6fe SB |
2091 | unsigned |
2092 | hash_rtx (rtx x, enum machine_mode mode, int *do_not_record_p, | |
2093 | int *hash_arg_in_memory_p, bool have_reg_qty) | |
7afe21cc | 2094 | { |
b3694847 SS |
2095 | int i, j; |
2096 | unsigned hash = 0; | |
2097 | enum rtx_code code; | |
2098 | const char *fmt; | |
7afe21cc | 2099 | |
0516f6fe SB |
2100 | /* Used to turn recursion into iteration. We can't rely on GCC's |
2101 | tail-recursion elimination since we need to keep accumulating values | |
2102 | in HASH. */ | |
7afe21cc RK |
2103 | repeat: |
2104 | if (x == 0) | |
2105 | return hash; | |
2106 | ||
2107 | code = GET_CODE (x); | |
2108 | switch (code) | |
2109 | { | |
2110 | case REG: | |
2111 | { | |
770ae6cc | 2112 | unsigned int regno = REGNO (x); |
7afe21cc | 2113 | |
0516f6fe | 2114 | if (!reload_completed) |
7afe21cc | 2115 | { |
0516f6fe SB |
2116 | /* On some machines, we can't record any non-fixed hard register, |
2117 | because extending its life will cause reload problems. We | |
2118 | consider ap, fp, sp, gp to be fixed for this purpose. | |
2119 | ||
2120 | We also consider CCmode registers to be fixed for this purpose; | |
2121 | failure to do so leads to failure to simplify 0<100 type of | |
2122 | conditionals. | |
2123 | ||
2124 | On all machines, we can't record any global registers. | |
2125 | Nor should we record any register that is in a small | |
2126 | class, as defined by CLASS_LIKELY_SPILLED_P. */ | |
2127 | bool record; | |
2128 | ||
2129 | if (regno >= FIRST_PSEUDO_REGISTER) | |
2130 | record = true; | |
2131 | else if (x == frame_pointer_rtx | |
2132 | || x == hard_frame_pointer_rtx | |
2133 | || x == arg_pointer_rtx | |
2134 | || x == stack_pointer_rtx | |
2135 | || x == pic_offset_table_rtx) | |
2136 | record = true; | |
2137 | else if (global_regs[regno]) | |
2138 | record = false; | |
2139 | else if (fixed_regs[regno]) | |
2140 | record = true; | |
2141 | else if (GET_MODE_CLASS (GET_MODE (x)) == MODE_CC) | |
2142 | record = true; | |
2143 | else if (SMALL_REGISTER_CLASSES) | |
2144 | record = false; | |
2145 | else if (CLASS_LIKELY_SPILLED_P (REGNO_REG_CLASS (regno))) | |
2146 | record = false; | |
2147 | else | |
2148 | record = true; | |
2149 | ||
2150 | if (!record) | |
2151 | { | |
2152 | *do_not_record_p = 1; | |
2153 | return 0; | |
2154 | } | |
7afe21cc | 2155 | } |
770ae6cc | 2156 | |
0516f6fe SB |
2157 | hash += ((unsigned int) REG << 7); |
2158 | hash += (have_reg_qty ? (unsigned) REG_QTY (regno) : regno); | |
2197a88a | 2159 | return hash; |
7afe21cc RK |
2160 | } |
2161 | ||
34c73909 R |
2162 | /* We handle SUBREG of a REG specially because the underlying |
2163 | reg changes its hash value with every value change; we don't | |
2164 | want to have to forget unrelated subregs when one subreg changes. */ | |
2165 | case SUBREG: | |
2166 | { | |
f8cfc6aa | 2167 | if (REG_P (SUBREG_REG (x))) |
34c73909 | 2168 | { |
0516f6fe | 2169 | hash += (((unsigned int) SUBREG << 7) |
ddef6bc7 JJ |
2170 | + REGNO (SUBREG_REG (x)) |
2171 | + (SUBREG_BYTE (x) / UNITS_PER_WORD)); | |
34c73909 R |
2172 | return hash; |
2173 | } | |
2174 | break; | |
2175 | } | |
2176 | ||
7afe21cc | 2177 | case CONST_INT: |
0516f6fe SB |
2178 | hash += (((unsigned int) CONST_INT << 7) + (unsigned int) mode |
2179 | + (unsigned int) INTVAL (x)); | |
2180 | return hash; | |
7afe21cc RK |
2181 | |
2182 | case CONST_DOUBLE: | |
2183 | /* This is like the general case, except that it only counts | |
2184 | the integers representing the constant. */ | |
0516f6fe | 2185 | hash += (unsigned int) code + (unsigned int) GET_MODE (x); |
969c8517 | 2186 | if (GET_MODE (x) != VOIDmode) |
46b33600 | 2187 | hash += real_hash (CONST_DOUBLE_REAL_VALUE (x)); |
969c8517 | 2188 | else |
0516f6fe SB |
2189 | hash += ((unsigned int) CONST_DOUBLE_LOW (x) |
2190 | + (unsigned int) CONST_DOUBLE_HIGH (x)); | |
7afe21cc RK |
2191 | return hash; |
2192 | ||
69ef87e2 AH |
2193 | case CONST_VECTOR: |
2194 | { | |
2195 | int units; | |
2196 | rtx elt; | |
2197 | ||
2198 | units = CONST_VECTOR_NUNITS (x); | |
2199 | ||
2200 | for (i = 0; i < units; ++i) | |
2201 | { | |
2202 | elt = CONST_VECTOR_ELT (x, i); | |
0516f6fe SB |
2203 | hash += hash_rtx (elt, GET_MODE (elt), do_not_record_p, |
2204 | hash_arg_in_memory_p, have_reg_qty); | |
69ef87e2 AH |
2205 | } |
2206 | ||
2207 | return hash; | |
2208 | } | |
2209 | ||
7afe21cc RK |
2210 | /* Assume there is only one rtx object for any given label. */ |
2211 | case LABEL_REF: | |
0516f6fe SB |
2212 | /* We don't hash on the address of the CODE_LABEL to avoid bootstrap |
2213 | differences and differences between each stage's debugging dumps. */ | |
2214 | hash += (((unsigned int) LABEL_REF << 7) | |
2215 | + CODE_LABEL_NUMBER (XEXP (x, 0))); | |
2197a88a | 2216 | return hash; |
7afe21cc RK |
2217 | |
2218 | case SYMBOL_REF: | |
0516f6fe SB |
2219 | { |
2220 | /* Don't hash on the symbol's address to avoid bootstrap differences. | |
2221 | Different hash values may cause expressions to be recorded in | |
2222 | different orders and thus different registers to be used in the | |
2223 | final assembler. This also avoids differences in the dump files | |
2224 | between various stages. */ | |
2225 | unsigned int h = 0; | |
2226 | const unsigned char *p = (const unsigned char *) XSTR (x, 0); | |
2227 | ||
2228 | while (*p) | |
2229 | h += (h << 7) + *p++; /* ??? revisit */ | |
2230 | ||
2231 | hash += ((unsigned int) SYMBOL_REF << 7) + h; | |
2232 | return hash; | |
2233 | } | |
7afe21cc RK |
2234 | |
2235 | case MEM: | |
14a774a9 RK |
2236 | /* We don't record if marked volatile or if BLKmode since we don't |
2237 | know the size of the move. */ | |
2238 | if (MEM_VOLATILE_P (x) || GET_MODE (x) == BLKmode) | |
7afe21cc | 2239 | { |
0516f6fe | 2240 | *do_not_record_p = 1; |
7afe21cc RK |
2241 | return 0; |
2242 | } | |
0516f6fe SB |
2243 | if (hash_arg_in_memory_p && !MEM_READONLY_P (x)) |
2244 | *hash_arg_in_memory_p = 1; | |
4977bab6 | 2245 | |
7afe21cc RK |
2246 | /* Now that we have already found this special case, |
2247 | might as well speed it up as much as possible. */ | |
2197a88a | 2248 | hash += (unsigned) MEM; |
7afe21cc RK |
2249 | x = XEXP (x, 0); |
2250 | goto repeat; | |
2251 | ||
bb07060a JW |
2252 | case USE: |
2253 | /* A USE that mentions non-volatile memory needs special | |
2254 | handling since the MEM may be BLKmode which normally | |
2255 | prevents an entry from being made. Pure calls are | |
0516f6fe SB |
2256 | marked by a USE which mentions BLKmode memory. |
2257 | See calls.c:emit_call_1. */ | |
3c0cb5de | 2258 | if (MEM_P (XEXP (x, 0)) |
bb07060a JW |
2259 | && ! MEM_VOLATILE_P (XEXP (x, 0))) |
2260 | { | |
68252e27 | 2261 | hash += (unsigned) USE; |
bb07060a JW |
2262 | x = XEXP (x, 0); |
2263 | ||
0516f6fe SB |
2264 | if (hash_arg_in_memory_p && !MEM_READONLY_P (x)) |
2265 | *hash_arg_in_memory_p = 1; | |
bb07060a JW |
2266 | |
2267 | /* Now that we have already found this special case, | |
2268 | might as well speed it up as much as possible. */ | |
2269 | hash += (unsigned) MEM; | |
2270 | x = XEXP (x, 0); | |
2271 | goto repeat; | |
2272 | } | |
2273 | break; | |
2274 | ||
7afe21cc RK |
2275 | case PRE_DEC: |
2276 | case PRE_INC: | |
2277 | case POST_DEC: | |
2278 | case POST_INC: | |
4b983fdc RH |
2279 | case PRE_MODIFY: |
2280 | case POST_MODIFY: | |
7afe21cc RK |
2281 | case PC: |
2282 | case CC0: | |
2283 | case CALL: | |
2284 | case UNSPEC_VOLATILE: | |
0516f6fe | 2285 | *do_not_record_p = 1; |
7afe21cc RK |
2286 | return 0; |
2287 | ||
2288 | case ASM_OPERANDS: | |
2289 | if (MEM_VOLATILE_P (x)) | |
2290 | { | |
0516f6fe | 2291 | *do_not_record_p = 1; |
7afe21cc RK |
2292 | return 0; |
2293 | } | |
6462bb43 AO |
2294 | else |
2295 | { | |
2296 | /* We don't want to take the filename and line into account. */ | |
2297 | hash += (unsigned) code + (unsigned) GET_MODE (x) | |
0516f6fe SB |
2298 | + hash_rtx_string (ASM_OPERANDS_TEMPLATE (x)) |
2299 | + hash_rtx_string (ASM_OPERANDS_OUTPUT_CONSTRAINT (x)) | |
6462bb43 AO |
2300 | + (unsigned) ASM_OPERANDS_OUTPUT_IDX (x); |
2301 | ||
2302 | if (ASM_OPERANDS_INPUT_LENGTH (x)) | |
2303 | { | |
2304 | for (i = 1; i < ASM_OPERANDS_INPUT_LENGTH (x); i++) | |
2305 | { | |
0516f6fe SB |
2306 | hash += (hash_rtx (ASM_OPERANDS_INPUT (x, i), |
2307 | GET_MODE (ASM_OPERANDS_INPUT (x, i)), | |
2308 | do_not_record_p, hash_arg_in_memory_p, | |
2309 | have_reg_qty) | |
2310 | + hash_rtx_string | |
2311 | (ASM_OPERANDS_INPUT_CONSTRAINT (x, i))); | |
6462bb43 AO |
2312 | } |
2313 | ||
0516f6fe | 2314 | hash += hash_rtx_string (ASM_OPERANDS_INPUT_CONSTRAINT (x, 0)); |
6462bb43 AO |
2315 | x = ASM_OPERANDS_INPUT (x, 0); |
2316 | mode = GET_MODE (x); | |
2317 | goto repeat; | |
2318 | } | |
2319 | ||
2320 | return hash; | |
2321 | } | |
e9a25f70 | 2322 | break; |
278a83b2 | 2323 | |
e9a25f70 JL |
2324 | default: |
2325 | break; | |
7afe21cc RK |
2326 | } |
2327 | ||
2328 | i = GET_RTX_LENGTH (code) - 1; | |
2197a88a | 2329 | hash += (unsigned) code + (unsigned) GET_MODE (x); |
7afe21cc RK |
2330 | fmt = GET_RTX_FORMAT (code); |
2331 | for (; i >= 0; i--) | |
2332 | { | |
341c100f | 2333 | switch (fmt[i]) |
7afe21cc | 2334 | { |
341c100f | 2335 | case 'e': |
7afe21cc RK |
2336 | /* If we are about to do the last recursive call |
2337 | needed at this level, change it into iteration. | |
2338 | This function is called enough to be worth it. */ | |
2339 | if (i == 0) | |
2340 | { | |
0516f6fe | 2341 | x = XEXP (x, i); |
7afe21cc RK |
2342 | goto repeat; |
2343 | } | |
0516f6fe SB |
2344 | |
2345 | hash += hash_rtx (XEXP (x, i), 0, do_not_record_p, | |
2346 | hash_arg_in_memory_p, have_reg_qty); | |
341c100f | 2347 | break; |
0516f6fe | 2348 | |
341c100f NS |
2349 | case 'E': |
2350 | for (j = 0; j < XVECLEN (x, i); j++) | |
0516f6fe SB |
2351 | hash += hash_rtx (XVECEXP (x, i, j), 0, do_not_record_p, |
2352 | hash_arg_in_memory_p, have_reg_qty); | |
341c100f | 2353 | break; |
0516f6fe | 2354 | |
341c100f NS |
2355 | case 's': |
2356 | hash += hash_rtx_string (XSTR (x, i)); | |
2357 | break; | |
2358 | ||
2359 | case 'i': | |
2360 | hash += (unsigned int) XINT (x, i); | |
2361 | break; | |
2362 | ||
2363 | case '0': case 't': | |
2364 | /* Unused. */ | |
2365 | break; | |
2366 | ||
2367 | default: | |
2368 | gcc_unreachable (); | |
2369 | } | |
7afe21cc | 2370 | } |
0516f6fe | 2371 | |
7afe21cc RK |
2372 | return hash; |
2373 | } | |
2374 | ||
0516f6fe SB |
2375 | /* Hash an rtx X for cse via hash_rtx. |
2376 | Stores 1 in do_not_record if any subexpression is volatile. | |
2377 | Stores 1 in hash_arg_in_memory if X contains a mem rtx which | |
2378 | does not have the RTX_UNCHANGING_P bit set. */ | |
2379 | ||
2380 | static inline unsigned | |
2381 | canon_hash (rtx x, enum machine_mode mode) | |
2382 | { | |
2383 | return hash_rtx (x, mode, &do_not_record, &hash_arg_in_memory, true); | |
2384 | } | |
2385 | ||
2386 | /* Like canon_hash but with no side effects, i.e. do_not_record | |
2387 | and hash_arg_in_memory are not changed. */ | |
7afe21cc | 2388 | |
0516f6fe | 2389 | static inline unsigned |
7080f735 | 2390 | safe_hash (rtx x, enum machine_mode mode) |
7afe21cc | 2391 | { |
0516f6fe SB |
2392 | int dummy_do_not_record; |
2393 | return hash_rtx (x, mode, &dummy_do_not_record, NULL, true); | |
7afe21cc RK |
2394 | } |
2395 | \f | |
2396 | /* Return 1 iff X and Y would canonicalize into the same thing, | |
2397 | without actually constructing the canonicalization of either one. | |
2398 | If VALIDATE is nonzero, | |
2399 | we assume X is an expression being processed from the rtl | |
2400 | and Y was found in the hash table. We check register refs | |
2401 | in Y for being marked as valid. | |
2402 | ||
0516f6fe | 2403 | If FOR_GCSE is true, we compare X and Y for equivalence for GCSE. */ |
7afe21cc | 2404 | |
0516f6fe SB |
2405 | int |
2406 | exp_equiv_p (rtx x, rtx y, int validate, bool for_gcse) | |
7afe21cc | 2407 | { |
b3694847 SS |
2408 | int i, j; |
2409 | enum rtx_code code; | |
2410 | const char *fmt; | |
7afe21cc RK |
2411 | |
2412 | /* Note: it is incorrect to assume an expression is equivalent to itself | |
2413 | if VALIDATE is nonzero. */ | |
2414 | if (x == y && !validate) | |
2415 | return 1; | |
0516f6fe | 2416 | |
7afe21cc RK |
2417 | if (x == 0 || y == 0) |
2418 | return x == y; | |
2419 | ||
2420 | code = GET_CODE (x); | |
2421 | if (code != GET_CODE (y)) | |
0516f6fe | 2422 | return 0; |
7afe21cc RK |
2423 | |
2424 | /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */ | |
2425 | if (GET_MODE (x) != GET_MODE (y)) | |
2426 | return 0; | |
2427 | ||
2428 | switch (code) | |
2429 | { | |
2430 | case PC: | |
2431 | case CC0: | |
7afe21cc | 2432 | case CONST_INT: |
37cf6116 | 2433 | case CONST_DOUBLE: |
c13e8210 | 2434 | return x == y; |
7afe21cc RK |
2435 | |
2436 | case LABEL_REF: | |
7afe21cc RK |
2437 | return XEXP (x, 0) == XEXP (y, 0); |
2438 | ||
f54d4924 RK |
2439 | case SYMBOL_REF: |
2440 | return XSTR (x, 0) == XSTR (y, 0); | |
2441 | ||
7afe21cc | 2442 | case REG: |
0516f6fe SB |
2443 | if (for_gcse) |
2444 | return REGNO (x) == REGNO (y); | |
2445 | else | |
2446 | { | |
2447 | unsigned int regno = REGNO (y); | |
2448 | unsigned int i; | |
2449 | unsigned int endregno | |
2450 | = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1 | |
2451 | : hard_regno_nregs[regno][GET_MODE (y)]); | |
7afe21cc | 2452 | |
0516f6fe SB |
2453 | /* If the quantities are not the same, the expressions are not |
2454 | equivalent. If there are and we are not to validate, they | |
2455 | are equivalent. Otherwise, ensure all regs are up-to-date. */ | |
7afe21cc | 2456 | |
0516f6fe SB |
2457 | if (REG_QTY (REGNO (x)) != REG_QTY (regno)) |
2458 | return 0; | |
2459 | ||
2460 | if (! validate) | |
2461 | return 1; | |
2462 | ||
2463 | for (i = regno; i < endregno; i++) | |
2464 | if (REG_IN_TABLE (i) != REG_TICK (i)) | |
2465 | return 0; | |
7afe21cc | 2466 | |
7afe21cc | 2467 | return 1; |
0516f6fe | 2468 | } |
7afe21cc | 2469 | |
0516f6fe SB |
2470 | case MEM: |
2471 | if (for_gcse) | |
2472 | { | |
0516f6fe SB |
2473 | /* A volatile mem should not be considered equivalent to any |
2474 | other. */ | |
2475 | if (MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y)) | |
2476 | return 0; | |
78b76d08 SB |
2477 | |
2478 | /* Can't merge two expressions in different alias sets, since we | |
2479 | can decide that the expression is transparent in a block when | |
2480 | it isn't, due to it being set with the different alias set. | |
2481 | ||
2482 | Also, can't merge two expressions with different MEM_ATTRS. | |
2483 | They could e.g. be two different entities allocated into the | |
2484 | same space on the stack (see e.g. PR25130). In that case, the | |
2485 | MEM addresses can be the same, even though the two MEMs are | |
2486 | absolutely not equivalent. | |
2487 | ||
2488 | But because really all MEM attributes should be the same for | |
2489 | equivalent MEMs, we just use the invariant that MEMs that have | |
2490 | the same attributes share the same mem_attrs data structure. */ | |
2491 | if (MEM_ATTRS (x) != MEM_ATTRS (y)) | |
2492 | return 0; | |
0516f6fe SB |
2493 | } |
2494 | break; | |
7afe21cc RK |
2495 | |
2496 | /* For commutative operations, check both orders. */ | |
2497 | case PLUS: | |
2498 | case MULT: | |
2499 | case AND: | |
2500 | case IOR: | |
2501 | case XOR: | |
2502 | case NE: | |
2503 | case EQ: | |
0516f6fe SB |
2504 | return ((exp_equiv_p (XEXP (x, 0), XEXP (y, 0), |
2505 | validate, for_gcse) | |
7afe21cc | 2506 | && exp_equiv_p (XEXP (x, 1), XEXP (y, 1), |
0516f6fe | 2507 | validate, for_gcse)) |
7afe21cc | 2508 | || (exp_equiv_p (XEXP (x, 0), XEXP (y, 1), |
0516f6fe | 2509 | validate, for_gcse) |
7afe21cc | 2510 | && exp_equiv_p (XEXP (x, 1), XEXP (y, 0), |
0516f6fe | 2511 | validate, for_gcse))); |
278a83b2 | 2512 | |
6462bb43 AO |
2513 | case ASM_OPERANDS: |
2514 | /* We don't use the generic code below because we want to | |
2515 | disregard filename and line numbers. */ | |
2516 | ||
2517 | /* A volatile asm isn't equivalent to any other. */ | |
2518 | if (MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y)) | |
2519 | return 0; | |
2520 | ||
2521 | if (GET_MODE (x) != GET_MODE (y) | |
2522 | || strcmp (ASM_OPERANDS_TEMPLATE (x), ASM_OPERANDS_TEMPLATE (y)) | |
2523 | || strcmp (ASM_OPERANDS_OUTPUT_CONSTRAINT (x), | |
2524 | ASM_OPERANDS_OUTPUT_CONSTRAINT (y)) | |
2525 | || ASM_OPERANDS_OUTPUT_IDX (x) != ASM_OPERANDS_OUTPUT_IDX (y) | |
2526 | || ASM_OPERANDS_INPUT_LENGTH (x) != ASM_OPERANDS_INPUT_LENGTH (y)) | |
2527 | return 0; | |
2528 | ||
2529 | if (ASM_OPERANDS_INPUT_LENGTH (x)) | |
2530 | { | |
2531 | for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--) | |
2532 | if (! exp_equiv_p (ASM_OPERANDS_INPUT (x, i), | |
2533 | ASM_OPERANDS_INPUT (y, i), | |
0516f6fe | 2534 | validate, for_gcse) |
6462bb43 AO |
2535 | || strcmp (ASM_OPERANDS_INPUT_CONSTRAINT (x, i), |
2536 | ASM_OPERANDS_INPUT_CONSTRAINT (y, i))) | |
2537 | return 0; | |
2538 | } | |
2539 | ||
2540 | return 1; | |
2541 | ||
e9a25f70 JL |
2542 | default: |
2543 | break; | |
7afe21cc RK |
2544 | } |
2545 | ||
2546 | /* Compare the elements. If any pair of corresponding elements | |
0516f6fe | 2547 | fail to match, return 0 for the whole thing. */ |
7afe21cc RK |
2548 | |
2549 | fmt = GET_RTX_FORMAT (code); | |
2550 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
2551 | { | |
906c4e36 | 2552 | switch (fmt[i]) |
7afe21cc | 2553 | { |
906c4e36 | 2554 | case 'e': |
0516f6fe SB |
2555 | if (! exp_equiv_p (XEXP (x, i), XEXP (y, i), |
2556 | validate, for_gcse)) | |
7afe21cc | 2557 | return 0; |
906c4e36 RK |
2558 | break; |
2559 | ||
2560 | case 'E': | |
7afe21cc RK |
2561 | if (XVECLEN (x, i) != XVECLEN (y, i)) |
2562 | return 0; | |
2563 | for (j = 0; j < XVECLEN (x, i); j++) | |
2564 | if (! exp_equiv_p (XVECEXP (x, i, j), XVECEXP (y, i, j), | |
0516f6fe | 2565 | validate, for_gcse)) |
7afe21cc | 2566 | return 0; |
906c4e36 RK |
2567 | break; |
2568 | ||
2569 | case 's': | |
7afe21cc RK |
2570 | if (strcmp (XSTR (x, i), XSTR (y, i))) |
2571 | return 0; | |
906c4e36 RK |
2572 | break; |
2573 | ||
2574 | case 'i': | |
7afe21cc RK |
2575 | if (XINT (x, i) != XINT (y, i)) |
2576 | return 0; | |
906c4e36 RK |
2577 | break; |
2578 | ||
2579 | case 'w': | |
2580 | if (XWINT (x, i) != XWINT (y, i)) | |
2581 | return 0; | |
278a83b2 | 2582 | break; |
906c4e36 RK |
2583 | |
2584 | case '0': | |
8f985ec4 | 2585 | case 't': |
906c4e36 RK |
2586 | break; |
2587 | ||
2588 | default: | |
341c100f | 2589 | gcc_unreachable (); |
7afe21cc | 2590 | } |
278a83b2 | 2591 | } |
906c4e36 | 2592 | |
7afe21cc RK |
2593 | return 1; |
2594 | } | |
2595 | \f | |
9ae8ffe7 JL |
2596 | /* Return 1 if X has a value that can vary even between two |
2597 | executions of the program. 0 means X can be compared reliably | |
2598 | against certain constants or near-constants. */ | |
7afe21cc RK |
2599 | |
2600 | static int | |
7080f735 | 2601 | cse_rtx_varies_p (rtx x, int from_alias) |
7afe21cc RK |
2602 | { |
2603 | /* We need not check for X and the equivalence class being of the same | |
2604 | mode because if X is equivalent to a constant in some mode, it | |
2605 | doesn't vary in any mode. */ | |
2606 | ||
f8cfc6aa | 2607 | if (REG_P (x) |
1bb98cec DM |
2608 | && REGNO_QTY_VALID_P (REGNO (x))) |
2609 | { | |
2610 | int x_q = REG_QTY (REGNO (x)); | |
2611 | struct qty_table_elem *x_ent = &qty_table[x_q]; | |
2612 | ||
2613 | if (GET_MODE (x) == x_ent->mode | |
2614 | && x_ent->const_rtx != NULL_RTX) | |
2615 | return 0; | |
2616 | } | |
7afe21cc | 2617 | |
9ae8ffe7 JL |
2618 | if (GET_CODE (x) == PLUS |
2619 | && GET_CODE (XEXP (x, 1)) == CONST_INT | |
f8cfc6aa | 2620 | && REG_P (XEXP (x, 0)) |
1bb98cec DM |
2621 | && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0)))) |
2622 | { | |
2623 | int x0_q = REG_QTY (REGNO (XEXP (x, 0))); | |
2624 | struct qty_table_elem *x0_ent = &qty_table[x0_q]; | |
2625 | ||
2626 | if ((GET_MODE (XEXP (x, 0)) == x0_ent->mode) | |
2627 | && x0_ent->const_rtx != NULL_RTX) | |
2628 | return 0; | |
2629 | } | |
7afe21cc | 2630 | |
9c6b0bae RK |
2631 | /* This can happen as the result of virtual register instantiation, if |
2632 | the initial constant is too large to be a valid address. This gives | |
2633 | us a three instruction sequence, load large offset into a register, | |
2634 | load fp minus a constant into a register, then a MEM which is the | |
2635 | sum of the two `constant' registers. */ | |
9ae8ffe7 | 2636 | if (GET_CODE (x) == PLUS |
f8cfc6aa JQ |
2637 | && REG_P (XEXP (x, 0)) |
2638 | && REG_P (XEXP (x, 1)) | |
9ae8ffe7 | 2639 | && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))) |
1bb98cec DM |
2640 | && REGNO_QTY_VALID_P (REGNO (XEXP (x, 1)))) |
2641 | { | |
2642 | int x0_q = REG_QTY (REGNO (XEXP (x, 0))); | |
2643 | int x1_q = REG_QTY (REGNO (XEXP (x, 1))); | |
2644 | struct qty_table_elem *x0_ent = &qty_table[x0_q]; | |
2645 | struct qty_table_elem *x1_ent = &qty_table[x1_q]; | |
2646 | ||
2647 | if ((GET_MODE (XEXP (x, 0)) == x0_ent->mode) | |
2648 | && x0_ent->const_rtx != NULL_RTX | |
2649 | && (GET_MODE (XEXP (x, 1)) == x1_ent->mode) | |
2650 | && x1_ent->const_rtx != NULL_RTX) | |
2651 | return 0; | |
2652 | } | |
9c6b0bae | 2653 | |
2be28ee2 | 2654 | return rtx_varies_p (x, from_alias); |
7afe21cc RK |
2655 | } |
2656 | \f | |
eef3c949 RS |
2657 | /* Subroutine of canon_reg. Pass *XLOC through canon_reg, and validate |
2658 | the result if necessary. INSN is as for canon_reg. */ | |
2659 | ||
2660 | static void | |
2661 | validate_canon_reg (rtx *xloc, rtx insn) | |
2662 | { | |
2663 | rtx new = canon_reg (*xloc, insn); | |
eef3c949 RS |
2664 | |
2665 | /* If replacing pseudo with hard reg or vice versa, ensure the | |
2666 | insn remains valid. Likewise if the insn has MATCH_DUPs. */ | |
67e0a632 | 2667 | if (insn != 0 && new != 0) |
eef3c949 RS |
2668 | validate_change (insn, xloc, new, 1); |
2669 | else | |
2670 | *xloc = new; | |
2671 | } | |
2672 | ||
7afe21cc RK |
2673 | /* Canonicalize an expression: |
2674 | replace each register reference inside it | |
2675 | with the "oldest" equivalent register. | |
2676 | ||
67e0a632 | 2677 | If INSN is nonzero validate_change is used to ensure that INSN remains valid |
da7d8304 | 2678 | after we make our substitution. The calls are made with IN_GROUP nonzero |
7722328e RK |
2679 | so apply_change_group must be called upon the outermost return from this |
2680 | function (unless INSN is zero). The result of apply_change_group can | |
2681 | generally be discarded since the changes we are making are optional. */ | |
7afe21cc RK |
2682 | |
2683 | static rtx | |
7080f735 | 2684 | canon_reg (rtx x, rtx insn) |
7afe21cc | 2685 | { |
b3694847 SS |
2686 | int i; |
2687 | enum rtx_code code; | |
2688 | const char *fmt; | |
7afe21cc RK |
2689 | |
2690 | if (x == 0) | |
2691 | return x; | |
2692 | ||
2693 | code = GET_CODE (x); | |
2694 | switch (code) | |
2695 | { | |
2696 | case PC: | |
2697 | case CC0: | |
2698 | case CONST: | |
2699 | case CONST_INT: | |
2700 | case CONST_DOUBLE: | |
69ef87e2 | 2701 | case CONST_VECTOR: |
7afe21cc RK |
2702 | case SYMBOL_REF: |
2703 | case LABEL_REF: | |
2704 | case ADDR_VEC: | |
2705 | case ADDR_DIFF_VEC: | |
2706 | return x; | |
2707 | ||
2708 | case REG: | |
2709 | { | |
b3694847 SS |
2710 | int first; |
2711 | int q; | |
2712 | struct qty_table_elem *ent; | |
7afe21cc RK |
2713 | |
2714 | /* Never replace a hard reg, because hard regs can appear | |
2715 | in more than one machine mode, and we must preserve the mode | |
2716 | of each occurrence. Also, some hard regs appear in | |
2717 | MEMs that are shared and mustn't be altered. Don't try to | |
2718 | replace any reg that maps to a reg of class NO_REGS. */ | |
2719 | if (REGNO (x) < FIRST_PSEUDO_REGISTER | |
2720 | || ! REGNO_QTY_VALID_P (REGNO (x))) | |
2721 | return x; | |
2722 | ||
278a83b2 | 2723 | q = REG_QTY (REGNO (x)); |
1bb98cec DM |
2724 | ent = &qty_table[q]; |
2725 | first = ent->first_reg; | |
7afe21cc RK |
2726 | return (first >= FIRST_PSEUDO_REGISTER ? regno_reg_rtx[first] |
2727 | : REGNO_REG_CLASS (first) == NO_REGS ? x | |
1bb98cec | 2728 | : gen_rtx_REG (ent->mode, first)); |
7afe21cc | 2729 | } |
278a83b2 | 2730 | |
e9a25f70 JL |
2731 | default: |
2732 | break; | |
7afe21cc RK |
2733 | } |
2734 | ||
2735 | fmt = GET_RTX_FORMAT (code); | |
2736 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
2737 | { | |
b3694847 | 2738 | int j; |
7afe21cc RK |
2739 | |
2740 | if (fmt[i] == 'e') | |
eef3c949 | 2741 | validate_canon_reg (&XEXP (x, i), insn); |
7afe21cc RK |
2742 | else if (fmt[i] == 'E') |
2743 | for (j = 0; j < XVECLEN (x, i); j++) | |
eef3c949 | 2744 | validate_canon_reg (&XVECEXP (x, i, j), insn); |
7afe21cc RK |
2745 | } |
2746 | ||
2747 | return x; | |
2748 | } | |
2749 | \f | |
bca05d20 RK |
2750 | /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison |
2751 | operation (EQ, NE, GT, etc.), follow it back through the hash table and | |
2752 | what values are being compared. | |
1a87eea2 | 2753 | |
bca05d20 RK |
2754 | *PARG1 and *PARG2 are updated to contain the rtx representing the values |
2755 | actually being compared. For example, if *PARG1 was (cc0) and *PARG2 | |
2756 | was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were | |
2757 | compared to produce cc0. | |
a432f20d | 2758 | |
bca05d20 RK |
2759 | The return value is the comparison operator and is either the code of |
2760 | A or the code corresponding to the inverse of the comparison. */ | |
7afe21cc | 2761 | |
0cedb36c | 2762 | static enum rtx_code |
7080f735 AJ |
2763 | find_comparison_args (enum rtx_code code, rtx *parg1, rtx *parg2, |
2764 | enum machine_mode *pmode1, enum machine_mode *pmode2) | |
7afe21cc | 2765 | { |
0cedb36c | 2766 | rtx arg1, arg2; |
1a87eea2 | 2767 | |
0cedb36c | 2768 | arg1 = *parg1, arg2 = *parg2; |
7afe21cc | 2769 | |
0cedb36c | 2770 | /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */ |
7afe21cc | 2771 | |
0cedb36c | 2772 | while (arg2 == CONST0_RTX (GET_MODE (arg1))) |
a432f20d | 2773 | { |
da7d8304 | 2774 | /* Set nonzero when we find something of interest. */ |
0cedb36c JL |
2775 | rtx x = 0; |
2776 | int reverse_code = 0; | |
2777 | struct table_elt *p = 0; | |
6076248a | 2778 | |
0cedb36c JL |
2779 | /* If arg1 is a COMPARE, extract the comparison arguments from it. |
2780 | On machines with CC0, this is the only case that can occur, since | |
2781 | fold_rtx will return the COMPARE or item being compared with zero | |
2782 | when given CC0. */ | |
6076248a | 2783 | |
0cedb36c JL |
2784 | if (GET_CODE (arg1) == COMPARE && arg2 == const0_rtx) |
2785 | x = arg1; | |
6076248a | 2786 | |
0cedb36c JL |
2787 | /* If ARG1 is a comparison operator and CODE is testing for |
2788 | STORE_FLAG_VALUE, get the inner arguments. */ | |
a432f20d | 2789 | |
ec8e098d | 2790 | else if (COMPARISON_P (arg1)) |
7afe21cc | 2791 | { |
efdc7e19 RH |
2792 | #ifdef FLOAT_STORE_FLAG_VALUE |
2793 | REAL_VALUE_TYPE fsfv; | |
2794 | #endif | |
2795 | ||
0cedb36c JL |
2796 | if (code == NE |
2797 | || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT | |
2798 | && code == LT && STORE_FLAG_VALUE == -1) | |
2799 | #ifdef FLOAT_STORE_FLAG_VALUE | |
9b92bf04 | 2800 | || (SCALAR_FLOAT_MODE_P (GET_MODE (arg1)) |
efdc7e19 RH |
2801 | && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)), |
2802 | REAL_VALUE_NEGATIVE (fsfv))) | |
7afe21cc | 2803 | #endif |
a432f20d | 2804 | ) |
0cedb36c JL |
2805 | x = arg1; |
2806 | else if (code == EQ | |
2807 | || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT | |
2808 | && code == GE && STORE_FLAG_VALUE == -1) | |
2809 | #ifdef FLOAT_STORE_FLAG_VALUE | |
9b92bf04 | 2810 | || (SCALAR_FLOAT_MODE_P (GET_MODE (arg1)) |
efdc7e19 RH |
2811 | && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)), |
2812 | REAL_VALUE_NEGATIVE (fsfv))) | |
0cedb36c JL |
2813 | #endif |
2814 | ) | |
2815 | x = arg1, reverse_code = 1; | |
7afe21cc RK |
2816 | } |
2817 | ||
0cedb36c | 2818 | /* ??? We could also check for |
7afe21cc | 2819 | |
0cedb36c | 2820 | (ne (and (eq (...) (const_int 1))) (const_int 0)) |
7afe21cc | 2821 | |
0cedb36c | 2822 | and related forms, but let's wait until we see them occurring. */ |
7afe21cc | 2823 | |
0cedb36c JL |
2824 | if (x == 0) |
2825 | /* Look up ARG1 in the hash table and see if it has an equivalence | |
2826 | that lets us see what is being compared. */ | |
0516f6fe | 2827 | p = lookup (arg1, SAFE_HASH (arg1, GET_MODE (arg1)), GET_MODE (arg1)); |
278a83b2 | 2828 | if (p) |
8b03b984 R |
2829 | { |
2830 | p = p->first_same_value; | |
2831 | ||
2832 | /* If what we compare is already known to be constant, that is as | |
2833 | good as it gets. | |
2834 | We need to break the loop in this case, because otherwise we | |
2835 | can have an infinite loop when looking at a reg that is known | |
2836 | to be a constant which is the same as a comparison of a reg | |
2837 | against zero which appears later in the insn stream, which in | |
2838 | turn is constant and the same as the comparison of the first reg | |
2839 | against zero... */ | |
2840 | if (p->is_const) | |
2841 | break; | |
2842 | } | |
7afe21cc | 2843 | |
0cedb36c | 2844 | for (; p; p = p->next_same_value) |
7afe21cc | 2845 | { |
0cedb36c | 2846 | enum machine_mode inner_mode = GET_MODE (p->exp); |
efdc7e19 RH |
2847 | #ifdef FLOAT_STORE_FLAG_VALUE |
2848 | REAL_VALUE_TYPE fsfv; | |
2849 | #endif | |
7afe21cc | 2850 | |
0cedb36c | 2851 | /* If the entry isn't valid, skip it. */ |
0516f6fe | 2852 | if (! exp_equiv_p (p->exp, p->exp, 1, false)) |
0cedb36c | 2853 | continue; |
f76b9db2 | 2854 | |
bca05d20 RK |
2855 | if (GET_CODE (p->exp) == COMPARE |
2856 | /* Another possibility is that this machine has a compare insn | |
2857 | that includes the comparison code. In that case, ARG1 would | |
2858 | be equivalent to a comparison operation that would set ARG1 to | |
2859 | either STORE_FLAG_VALUE or zero. If this is an NE operation, | |
2860 | ORIG_CODE is the actual comparison being done; if it is an EQ, | |
2861 | we must reverse ORIG_CODE. On machine with a negative value | |
2862 | for STORE_FLAG_VALUE, also look at LT and GE operations. */ | |
2863 | || ((code == NE | |
2864 | || (code == LT | |
2865 | && GET_MODE_CLASS (inner_mode) == MODE_INT | |
2866 | && (GET_MODE_BITSIZE (inner_mode) | |
2867 | <= HOST_BITS_PER_WIDE_INT) | |
2868 | && (STORE_FLAG_VALUE | |
2869 | & ((HOST_WIDE_INT) 1 | |
2870 | << (GET_MODE_BITSIZE (inner_mode) - 1)))) | |
0cedb36c | 2871 | #ifdef FLOAT_STORE_FLAG_VALUE |
bca05d20 | 2872 | || (code == LT |
3d8bf70f | 2873 | && SCALAR_FLOAT_MODE_P (inner_mode) |
efdc7e19 RH |
2874 | && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)), |
2875 | REAL_VALUE_NEGATIVE (fsfv))) | |
0cedb36c | 2876 | #endif |
bca05d20 | 2877 | ) |
ec8e098d | 2878 | && COMPARISON_P (p->exp))) |
7afe21cc | 2879 | { |
0cedb36c JL |
2880 | x = p->exp; |
2881 | break; | |
2882 | } | |
2883 | else if ((code == EQ | |
2884 | || (code == GE | |
2885 | && GET_MODE_CLASS (inner_mode) == MODE_INT | |
2886 | && (GET_MODE_BITSIZE (inner_mode) | |
2887 | <= HOST_BITS_PER_WIDE_INT) | |
2888 | && (STORE_FLAG_VALUE | |
2889 | & ((HOST_WIDE_INT) 1 | |
2890 | << (GET_MODE_BITSIZE (inner_mode) - 1)))) | |
2891 | #ifdef FLOAT_STORE_FLAG_VALUE | |
2892 | || (code == GE | |
3d8bf70f | 2893 | && SCALAR_FLOAT_MODE_P (inner_mode) |
efdc7e19 RH |
2894 | && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)), |
2895 | REAL_VALUE_NEGATIVE (fsfv))) | |
0cedb36c JL |
2896 | #endif |
2897 | ) | |
ec8e098d | 2898 | && COMPARISON_P (p->exp)) |
0cedb36c JL |
2899 | { |
2900 | reverse_code = 1; | |
2901 | x = p->exp; | |
2902 | break; | |
7afe21cc RK |
2903 | } |
2904 | ||
4977bab6 ZW |
2905 | /* If this non-trapping address, e.g. fp + constant, the |
2906 | equivalent is a better operand since it may let us predict | |
2907 | the value of the comparison. */ | |
2908 | else if (!rtx_addr_can_trap_p (p->exp)) | |
0cedb36c JL |
2909 | { |
2910 | arg1 = p->exp; | |
2911 | continue; | |
2912 | } | |
7afe21cc | 2913 | } |
7afe21cc | 2914 | |
0cedb36c JL |
2915 | /* If we didn't find a useful equivalence for ARG1, we are done. |
2916 | Otherwise, set up for the next iteration. */ | |
2917 | if (x == 0) | |
2918 | break; | |
7afe21cc | 2919 | |
78192b09 RH |
2920 | /* If we need to reverse the comparison, make sure that that is |
2921 | possible -- we can't necessarily infer the value of GE from LT | |
2922 | with floating-point operands. */ | |
0cedb36c | 2923 | if (reverse_code) |
261efdef JH |
2924 | { |
2925 | enum rtx_code reversed = reversed_comparison_code (x, NULL_RTX); | |
2926 | if (reversed == UNKNOWN) | |
2927 | break; | |
68252e27 KH |
2928 | else |
2929 | code = reversed; | |
261efdef | 2930 | } |
ec8e098d | 2931 | else if (COMPARISON_P (x)) |
261efdef JH |
2932 | code = GET_CODE (x); |
2933 | arg1 = XEXP (x, 0), arg2 = XEXP (x, 1); | |
7afe21cc RK |
2934 | } |
2935 | ||
0cedb36c JL |
2936 | /* Return our results. Return the modes from before fold_rtx |
2937 | because fold_rtx might produce const_int, and then it's too late. */ | |
2938 | *pmode1 = GET_MODE (arg1), *pmode2 = GET_MODE (arg2); | |
2939 | *parg1 = fold_rtx (arg1, 0), *parg2 = fold_rtx (arg2, 0); | |
2940 | ||
2941 | return code; | |
7afe21cc RK |
2942 | } |
2943 | \f | |
a52b023a PB |
2944 | /* If X is a nontrivial arithmetic operation on an argument for which |
2945 | a constant value can be determined, return the result of operating | |
2946 | on that value, as a constant. Otherwise, return X, possibly with | |
2947 | one or more operands changed to a forward-propagated constant. | |
25910ca4 | 2948 | |
a52b023a PB |
2949 | If X is a register whose contents are known, we do NOT return |
2950 | those contents here; equiv_constant is called to perform that task. | |
2951 | For SUBREGs and MEMs, we do that both here and in equiv_constant. | |
7afe21cc RK |
2952 | |
2953 | INSN is the insn that we may be modifying. If it is 0, make a copy | |
2954 | of X before modifying it. */ | |
2955 | ||
2956 | static rtx | |
7080f735 | 2957 | fold_rtx (rtx x, rtx insn) |
7afe21cc | 2958 | { |
b3694847 SS |
2959 | enum rtx_code code; |
2960 | enum machine_mode mode; | |
2961 | const char *fmt; | |
2962 | int i; | |
7afe21cc | 2963 | rtx new = 0; |
a52b023a | 2964 | int changed = 0; |
7afe21cc | 2965 | |
a52b023a | 2966 | /* Operands of X. */ |
7afe21cc RK |
2967 | rtx folded_arg0; |
2968 | rtx folded_arg1; | |
2969 | ||
2970 | /* Constant equivalents of first three operands of X; | |
2971 | 0 when no such equivalent is known. */ | |
2972 | rtx const_arg0; | |
2973 | rtx const_arg1; | |
2974 | rtx const_arg2; | |
2975 | ||
2976 | /* The mode of the first operand of X. We need this for sign and zero | |
2977 | extends. */ | |
2978 | enum machine_mode mode_arg0; | |
2979 | ||
2980 | if (x == 0) | |
2981 | return x; | |
2982 | ||
a52b023a | 2983 | /* Try to perform some initial simplifications on X. */ |
7afe21cc RK |
2984 | code = GET_CODE (x); |
2985 | switch (code) | |
2986 | { | |
a52b023a PB |
2987 | case MEM: |
2988 | case SUBREG: | |
2989 | if ((new = equiv_constant (x)) != NULL_RTX) | |
2990 | return new; | |
2991 | return x; | |
2992 | ||
7afe21cc RK |
2993 | case CONST: |
2994 | case CONST_INT: | |
2995 | case CONST_DOUBLE: | |
69ef87e2 | 2996 | case CONST_VECTOR: |
7afe21cc RK |
2997 | case SYMBOL_REF: |
2998 | case LABEL_REF: | |
2999 | case REG: | |
01aa1d43 | 3000 | case PC: |
7afe21cc RK |
3001 | /* No use simplifying an EXPR_LIST |
3002 | since they are used only for lists of args | |
3003 | in a function call's REG_EQUAL note. */ | |
3004 | case EXPR_LIST: | |
3005 | return x; | |
3006 | ||
3007 | #ifdef HAVE_cc0 | |
3008 | case CC0: | |
3009 | return prev_insn_cc0; | |
3010 | #endif | |
3011 | ||
9255709c | 3012 | case ASM_OPERANDS: |
6c667859 AB |
3013 | if (insn) |
3014 | { | |
3015 | for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--) | |
3016 | validate_change (insn, &ASM_OPERANDS_INPUT (x, i), | |
3017 | fold_rtx (ASM_OPERANDS_INPUT (x, i), insn), 0); | |
3018 | } | |
a52b023a PB |
3019 | return x; |
3020 | ||
3021 | #ifdef NO_FUNCTION_CSE | |
3022 | case CALL: | |
3023 | if (CONSTANT_P (XEXP (XEXP (x, 0), 0))) | |
3024 | return x; | |
9255709c | 3025 | break; |
a52b023a | 3026 | #endif |
278a83b2 | 3027 | |
a52b023a | 3028 | /* Anything else goes through the loop below. */ |
e9a25f70 JL |
3029 | default: |
3030 | break; | |
7afe21cc RK |
3031 | } |
3032 | ||
a52b023a | 3033 | mode = GET_MODE (x); |
7afe21cc RK |
3034 | const_arg0 = 0; |
3035 | const_arg1 = 0; | |
3036 | const_arg2 = 0; | |
3037 | mode_arg0 = VOIDmode; | |
3038 | ||
3039 | /* Try folding our operands. | |
3040 | Then see which ones have constant values known. */ | |
3041 | ||
3042 | fmt = GET_RTX_FORMAT (code); | |
3043 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
3044 | if (fmt[i] == 'e') | |
3045 | { | |
a52b023a PB |
3046 | rtx folded_arg = XEXP (x, i), const_arg; |
3047 | enum machine_mode mode_arg = GET_MODE (folded_arg); | |
7afe21cc | 3048 | #ifdef HAVE_cc0 |
a52b023a PB |
3049 | if (CC0_P (folded_arg)) |
3050 | folded_arg = prev_insn_cc0, mode_arg = prev_insn_cc0_mode; | |
7afe21cc | 3051 | #endif |
a52b023a | 3052 | const_arg = equiv_constant (folded_arg); |
7afe21cc RK |
3053 | |
3054 | /* For the first three operands, see if the operand | |
3055 | is constant or equivalent to a constant. */ | |
3056 | switch (i) | |
3057 | { | |
3058 | case 0: | |
3059 | folded_arg0 = folded_arg; | |
3060 | const_arg0 = const_arg; | |
3061 | mode_arg0 = mode_arg; | |
3062 | break; | |
3063 | case 1: | |
3064 | folded_arg1 = folded_arg; | |
3065 | const_arg1 = const_arg; | |
3066 | break; | |
3067 | case 2: | |
3068 | const_arg2 = const_arg; | |
3069 | break; | |
3070 | } | |
3071 | ||
a52b023a PB |
3072 | /* Pick the least expensive of the argument and an equivalent constant |
3073 | argument. */ | |
3074 | if (const_arg != 0 | |
3075 | && const_arg != folded_arg | |
3076 | && COST_IN (const_arg, code) <= COST_IN (folded_arg, code) | |
f2fa288f | 3077 | |
8cce3d04 RS |
3078 | /* It's not safe to substitute the operand of a conversion |
3079 | operator with a constant, as the conversion's identity | |
f652d14b | 3080 | depends upon the mode of its operand. This optimization |
8cce3d04 | 3081 | is handled by the call to simplify_unary_operation. */ |
a52b023a PB |
3082 | && (GET_RTX_CLASS (code) != RTX_UNARY |
3083 | || GET_MODE (const_arg) == mode_arg0 | |
3084 | || (code != ZERO_EXTEND | |
3085 | && code != SIGN_EXTEND | |
3086 | && code != TRUNCATE | |
3087 | && code != FLOAT_TRUNCATE | |
3088 | && code != FLOAT_EXTEND | |
3089 | && code != FLOAT | |
3090 | && code != FIX | |
3091 | && code != UNSIGNED_FLOAT | |
3092 | && code != UNSIGNED_FIX))) | |
3093 | folded_arg = const_arg; | |
3094 | ||
3095 | if (folded_arg == XEXP (x, i)) | |
3096 | continue; | |
7afe21cc | 3097 | |
a52b023a PB |
3098 | if (insn == NULL_RTX && !changed) |
3099 | x = copy_rtx (x); | |
3100 | changed = 1; | |
3101 | validate_change (insn, &XEXP (x, i), folded_arg, 1); | |
2d8b0f3a | 3102 | } |
7afe21cc | 3103 | |
a52b023a | 3104 | if (changed) |
7afe21cc | 3105 | { |
a52b023a PB |
3106 | /* Canonicalize X if necessary, and keep const_argN and folded_argN |
3107 | consistent with the order in X. */ | |
3108 | if (canonicalize_change_group (insn, x)) | |
7afe21cc | 3109 | { |
a52b023a PB |
3110 | rtx tem; |
3111 | tem = const_arg0, const_arg0 = const_arg1, const_arg1 = tem; | |
3112 | tem = folded_arg0, folded_arg0 = folded_arg1, folded_arg1 = tem; | |
7afe21cc | 3113 | } |
a52b023a PB |
3114 | |
3115 | apply_change_group (); | |
7afe21cc RK |
3116 | } |
3117 | ||
3118 | /* If X is an arithmetic operation, see if we can simplify it. */ | |
3119 | ||
3120 | switch (GET_RTX_CLASS (code)) | |
3121 | { | |
ec8e098d | 3122 | case RTX_UNARY: |
67a37737 RK |
3123 | { |
3124 | int is_const = 0; | |
3125 | ||
3126 | /* We can't simplify extension ops unless we know the | |
3127 | original mode. */ | |
3128 | if ((code == ZERO_EXTEND || code == SIGN_EXTEND) | |
3129 | && mode_arg0 == VOIDmode) | |
3130 | break; | |
3131 | ||
3132 | /* If we had a CONST, strip it off and put it back later if we | |
3133 | fold. */ | |
3134 | if (const_arg0 != 0 && GET_CODE (const_arg0) == CONST) | |
3135 | is_const = 1, const_arg0 = XEXP (const_arg0, 0); | |
3136 | ||
3137 | new = simplify_unary_operation (code, mode, | |
3138 | const_arg0 ? const_arg0 : folded_arg0, | |
3139 | mode_arg0); | |
ec666d23 JH |
3140 | /* NEG of PLUS could be converted into MINUS, but that causes |
3141 | expressions of the form | |
3142 | (CONST (MINUS (CONST_INT) (SYMBOL_REF))) | |
3143 | which many ports mistakenly treat as LEGITIMATE_CONSTANT_P. | |
3144 | FIXME: those ports should be fixed. */ | |
3145 | if (new != 0 && is_const | |
3146 | && GET_CODE (new) == PLUS | |
3147 | && (GET_CODE (XEXP (new, 0)) == SYMBOL_REF | |
3148 | || GET_CODE (XEXP (new, 0)) == LABEL_REF) | |
3149 | && GET_CODE (XEXP (new, 1)) == CONST_INT) | |
38a448ca | 3150 | new = gen_rtx_CONST (mode, new); |
67a37737 | 3151 | } |
7afe21cc | 3152 | break; |
278a83b2 | 3153 | |
ec8e098d PB |
3154 | case RTX_COMPARE: |
3155 | case RTX_COMM_COMPARE: | |
7afe21cc RK |
3156 | /* See what items are actually being compared and set FOLDED_ARG[01] |
3157 | to those values and CODE to the actual comparison code. If any are | |
3158 | constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't | |
3159 | do anything if both operands are already known to be constant. */ | |
3160 | ||
21e5076a UB |
3161 | /* ??? Vector mode comparisons are not supported yet. */ |
3162 | if (VECTOR_MODE_P (mode)) | |
3163 | break; | |
3164 | ||
7afe21cc RK |
3165 | if (const_arg0 == 0 || const_arg1 == 0) |
3166 | { | |
3167 | struct table_elt *p0, *p1; | |
d6edb99e | 3168 | rtx true_rtx = const_true_rtx, false_rtx = const0_rtx; |
13c9910f | 3169 | enum machine_mode mode_arg1; |
c610adec RK |
3170 | |
3171 | #ifdef FLOAT_STORE_FLAG_VALUE | |
9b92bf04 | 3172 | if (SCALAR_FLOAT_MODE_P (mode)) |
c610adec | 3173 | { |
d6edb99e | 3174 | true_rtx = (CONST_DOUBLE_FROM_REAL_VALUE |
68252e27 | 3175 | (FLOAT_STORE_FLAG_VALUE (mode), mode)); |
d6edb99e | 3176 | false_rtx = CONST0_RTX (mode); |
c610adec RK |
3177 | } |
3178 | #endif | |
7afe21cc | 3179 | |
13c9910f RS |
3180 | code = find_comparison_args (code, &folded_arg0, &folded_arg1, |
3181 | &mode_arg0, &mode_arg1); | |
7afe21cc | 3182 | |
13c9910f RS |
3183 | /* If the mode is VOIDmode or a MODE_CC mode, we don't know |
3184 | what kinds of things are being compared, so we can't do | |
3185 | anything with this comparison. */ | |
7afe21cc RK |
3186 | |
3187 | if (mode_arg0 == VOIDmode || GET_MODE_CLASS (mode_arg0) == MODE_CC) | |
3188 | break; | |
3189 | ||
75335440 KH |
3190 | const_arg0 = equiv_constant (folded_arg0); |
3191 | const_arg1 = equiv_constant (folded_arg1); | |
3192 | ||
0f41302f MS |
3193 | /* If we do not now have two constants being compared, see |
3194 | if we can nevertheless deduce some things about the | |
3195 | comparison. */ | |
7afe21cc RK |
3196 | if (const_arg0 == 0 || const_arg1 == 0) |
3197 | { | |
08678f51 HPN |
3198 | if (const_arg1 != NULL) |
3199 | { | |
3200 | rtx cheapest_simplification; | |
3201 | int cheapest_cost; | |
3202 | rtx simp_result; | |
3203 | struct table_elt *p; | |
3204 | ||
3205 | /* See if we can find an equivalent of folded_arg0 | |
3206 | that gets us a cheaper expression, possibly a | |
3207 | constant through simplifications. */ | |
3208 | p = lookup (folded_arg0, SAFE_HASH (folded_arg0, mode_arg0), | |
3209 | mode_arg0); | |
3210 | ||
3211 | if (p != NULL) | |
3212 | { | |
3213 | cheapest_simplification = x; | |
3214 | cheapest_cost = COST (x); | |
3215 | ||
3216 | for (p = p->first_same_value; p != NULL; p = p->next_same_value) | |
3217 | { | |
3218 | int cost; | |
3219 | ||
3220 | /* If the entry isn't valid, skip it. */ | |
3221 | if (! exp_equiv_p (p->exp, p->exp, 1, false)) | |
3222 | continue; | |
3223 | ||
3224 | /* Try to simplify using this equivalence. */ | |
3225 | simp_result | |
3226 | = simplify_relational_operation (code, mode, | |
3227 | mode_arg0, | |
3228 | p->exp, | |
3229 | const_arg1); | |
3230 | ||
3231 | if (simp_result == NULL) | |
3232 | continue; | |
3233 | ||
3234 | cost = COST (simp_result); | |
3235 | if (cost < cheapest_cost) | |
3236 | { | |
3237 | cheapest_cost = cost; | |
3238 | cheapest_simplification = simp_result; | |
3239 | } | |
3240 | } | |
3241 | ||
3242 | /* If we have a cheaper expression now, use that | |
3243 | and try folding it further, from the top. */ | |
3244 | if (cheapest_simplification != x) | |
3245 | return fold_rtx (cheapest_simplification, insn); | |
3246 | } | |
3247 | } | |
3248 | ||
4977bab6 ZW |
3249 | /* Some addresses are known to be nonzero. We don't know |
3250 | their sign, but equality comparisons are known. */ | |
7afe21cc | 3251 | if (const_arg1 == const0_rtx |
4977bab6 | 3252 | && nonzero_address_p (folded_arg0)) |
7afe21cc RK |
3253 | { |
3254 | if (code == EQ) | |
d6edb99e | 3255 | return false_rtx; |
7afe21cc | 3256 | else if (code == NE) |
d6edb99e | 3257 | return true_rtx; |
7afe21cc RK |
3258 | } |
3259 | ||
fd13313f JH |
3260 | /* See if the two operands are the same. */ |
3261 | ||
3262 | if (folded_arg0 == folded_arg1 | |
f8cfc6aa JQ |
3263 | || (REG_P (folded_arg0) |
3264 | && REG_P (folded_arg1) | |
fd13313f JH |
3265 | && (REG_QTY (REGNO (folded_arg0)) |
3266 | == REG_QTY (REGNO (folded_arg1)))) | |
3267 | || ((p0 = lookup (folded_arg0, | |
0516f6fe SB |
3268 | SAFE_HASH (folded_arg0, mode_arg0), |
3269 | mode_arg0)) | |
fd13313f | 3270 | && (p1 = lookup (folded_arg1, |
0516f6fe SB |
3271 | SAFE_HASH (folded_arg1, mode_arg0), |
3272 | mode_arg0)) | |
fd13313f JH |
3273 | && p0->first_same_value == p1->first_same_value)) |
3274 | { | |
71925bc0 RS |
3275 | /* Sadly two equal NaNs are not equivalent. */ |
3276 | if (!HONOR_NANS (mode_arg0)) | |
3277 | return ((code == EQ || code == LE || code == GE | |
3278 | || code == LEU || code == GEU || code == UNEQ | |
3279 | || code == UNLE || code == UNGE | |
3280 | || code == ORDERED) | |
3281 | ? true_rtx : false_rtx); | |
3282 | /* Take care for the FP compares we can resolve. */ | |
3283 | if (code == UNEQ || code == UNLE || code == UNGE) | |
3284 | return true_rtx; | |
3285 | if (code == LTGT || code == LT || code == GT) | |
3286 | return false_rtx; | |
fd13313f | 3287 | } |
7afe21cc RK |
3288 | |
3289 | /* If FOLDED_ARG0 is a register, see if the comparison we are | |
3290 | doing now is either the same as we did before or the reverse | |
3291 | (we only check the reverse if not floating-point). */ | |
f8cfc6aa | 3292 | else if (REG_P (folded_arg0)) |
7afe21cc | 3293 | { |
30f72379 | 3294 | int qty = REG_QTY (REGNO (folded_arg0)); |
7afe21cc | 3295 | |
1bb98cec DM |
3296 | if (REGNO_QTY_VALID_P (REGNO (folded_arg0))) |
3297 | { | |
3298 | struct qty_table_elem *ent = &qty_table[qty]; | |
3299 | ||
3300 | if ((comparison_dominates_p (ent->comparison_code, code) | |
1eb8759b RH |
3301 | || (! FLOAT_MODE_P (mode_arg0) |
3302 | && comparison_dominates_p (ent->comparison_code, | |
3303 | reverse_condition (code)))) | |
1bb98cec DM |
3304 | && (rtx_equal_p (ent->comparison_const, folded_arg1) |
3305 | || (const_arg1 | |
3306 | && rtx_equal_p (ent->comparison_const, | |
3307 | const_arg1)) | |
f8cfc6aa | 3308 | || (REG_P (folded_arg1) |
1bb98cec DM |
3309 | && (REG_QTY (REGNO (folded_arg1)) == ent->comparison_qty)))) |
3310 | return (comparison_dominates_p (ent->comparison_code, code) | |
d6edb99e | 3311 | ? true_rtx : false_rtx); |
1bb98cec | 3312 | } |
7afe21cc RK |
3313 | } |
3314 | } | |
3315 | } | |
3316 | ||
3317 | /* If we are comparing against zero, see if the first operand is | |
3318 | equivalent to an IOR with a constant. If so, we may be able to | |
3319 | determine the result of this comparison. */ | |
3320 | ||
3321 | if (const_arg1 == const0_rtx) | |
3322 | { | |
3323 | rtx y = lookup_as_function (folded_arg0, IOR); | |
3324 | rtx inner_const; | |
3325 | ||
3326 | if (y != 0 | |
3327 | && (inner_const = equiv_constant (XEXP (y, 1))) != 0 | |
3328 | && GET_CODE (inner_const) == CONST_INT | |
3329 | && INTVAL (inner_const) != 0) | |
3330 | { | |
3331 | int sign_bitnum = GET_MODE_BITSIZE (mode_arg0) - 1; | |
906c4e36 RK |
3332 | int has_sign = (HOST_BITS_PER_WIDE_INT >= sign_bitnum |
3333 | && (INTVAL (inner_const) | |
3334 | & ((HOST_WIDE_INT) 1 << sign_bitnum))); | |
d6edb99e | 3335 | rtx true_rtx = const_true_rtx, false_rtx = const0_rtx; |
c610adec RK |
3336 | |
3337 | #ifdef FLOAT_STORE_FLAG_VALUE | |
3d8bf70f | 3338 | if (SCALAR_FLOAT_MODE_P (mode)) |
c610adec | 3339 | { |
d6edb99e | 3340 | true_rtx = (CONST_DOUBLE_FROM_REAL_VALUE |
12530dbe | 3341 | (FLOAT_STORE_FLAG_VALUE (mode), mode)); |
d6edb99e | 3342 | false_rtx = CONST0_RTX (mode); |
c610adec RK |
3343 | } |
3344 | #endif | |
7afe21cc RK |
3345 | |
3346 | switch (code) | |
3347 | { | |
3348 | case EQ: | |
d6edb99e | 3349 | return false_rtx; |
7afe21cc | 3350 | case NE: |
d6edb99e | 3351 | return true_rtx; |
7afe21cc RK |
3352 | case LT: case LE: |
3353 | if (has_sign) | |
d6edb99e | 3354 | return true_rtx; |
7afe21cc RK |
3355 | break; |
3356 | case GT: case GE: | |
3357 | if (has_sign) | |
d6edb99e | 3358 | return false_rtx; |
7afe21cc | 3359 | break; |
e9a25f70 JL |
3360 | default: |
3361 | break; | |
7afe21cc RK |
3362 | } |
3363 | } | |
3364 | } | |
3365 | ||
c6fb08ad PB |
3366 | { |
3367 | rtx op0 = const_arg0 ? const_arg0 : folded_arg0; | |
3368 | rtx op1 = const_arg1 ? const_arg1 : folded_arg1; | |
3369 | new = simplify_relational_operation (code, mode, mode_arg0, op0, op1); | |
3370 | } | |
7afe21cc RK |
3371 | break; |
3372 | ||
ec8e098d PB |
3373 | case RTX_BIN_ARITH: |
3374 | case RTX_COMM_ARITH: | |
7afe21cc RK |
3375 | switch (code) |
3376 | { | |
3377 | case PLUS: | |
3378 | /* If the second operand is a LABEL_REF, see if the first is a MINUS | |
3379 | with that LABEL_REF as its second operand. If so, the result is | |
3380 | the first operand of that MINUS. This handles switches with an | |
3381 | ADDR_DIFF_VEC table. */ | |
3382 | if (const_arg1 && GET_CODE (const_arg1) == LABEL_REF) | |
3383 | { | |
e650cbda RK |
3384 | rtx y |
3385 | = GET_CODE (folded_arg0) == MINUS ? folded_arg0 | |
ddc356e8 | 3386 | : lookup_as_function (folded_arg0, MINUS); |
7afe21cc RK |
3387 | |
3388 | if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF | |
3389 | && XEXP (XEXP (y, 1), 0) == XEXP (const_arg1, 0)) | |
3390 | return XEXP (y, 0); | |
67a37737 RK |
3391 | |
3392 | /* Now try for a CONST of a MINUS like the above. */ | |
e650cbda RK |
3393 | if ((y = (GET_CODE (folded_arg0) == CONST ? folded_arg0 |
3394 | : lookup_as_function (folded_arg0, CONST))) != 0 | |
67a37737 RK |
3395 | && GET_CODE (XEXP (y, 0)) == MINUS |
3396 | && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF | |
ddc356e8 | 3397 | && XEXP (XEXP (XEXP (y, 0), 1), 0) == XEXP (const_arg1, 0)) |
67a37737 | 3398 | return XEXP (XEXP (y, 0), 0); |
7afe21cc | 3399 | } |
c2cc0778 | 3400 | |
e650cbda RK |
3401 | /* Likewise if the operands are in the other order. */ |
3402 | if (const_arg0 && GET_CODE (const_arg0) == LABEL_REF) | |
3403 | { | |
3404 | rtx y | |
3405 | = GET_CODE (folded_arg1) == MINUS ? folded_arg1 | |
ddc356e8 | 3406 | : lookup_as_function (folded_arg1, MINUS); |
e650cbda RK |
3407 | |
3408 | if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF | |
3409 | && XEXP (XEXP (y, 1), 0) == XEXP (const_arg0, 0)) | |
3410 | return XEXP (y, 0); | |
3411 | ||
3412 | /* Now try for a CONST of a MINUS like the above. */ | |
3413 | if ((y = (GET_CODE (folded_arg1) == CONST ? folded_arg1 | |
3414 | : lookup_as_function (folded_arg1, CONST))) != 0 | |
3415 | && GET_CODE (XEXP (y, 0)) == MINUS | |
3416 | && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF | |
ddc356e8 | 3417 | && XEXP (XEXP (XEXP (y, 0), 1), 0) == XEXP (const_arg0, 0)) |
e650cbda RK |
3418 | return XEXP (XEXP (y, 0), 0); |
3419 | } | |
3420 | ||
c2cc0778 RK |
3421 | /* If second operand is a register equivalent to a negative |
3422 | CONST_INT, see if we can find a register equivalent to the | |
3423 | positive constant. Make a MINUS if so. Don't do this for | |
5d595063 | 3424 | a non-negative constant since we might then alternate between |
a1f300c0 | 3425 | choosing positive and negative constants. Having the positive |
5d595063 RK |
3426 | constant previously-used is the more common case. Be sure |
3427 | the resulting constant is non-negative; if const_arg1 were | |
3428 | the smallest negative number this would overflow: depending | |
3429 | on the mode, this would either just be the same value (and | |
3430 | hence not save anything) or be incorrect. */ | |
3431 | if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT | |
3432 | && INTVAL (const_arg1) < 0 | |
4741f6ad JL |
3433 | /* This used to test |
3434 | ||
ddc356e8 | 3435 | -INTVAL (const_arg1) >= 0 |
4741f6ad JL |
3436 | |
3437 | But The Sun V5.0 compilers mis-compiled that test. So | |
3438 | instead we test for the problematic value in a more direct | |
3439 | manner and hope the Sun compilers get it correct. */ | |
5c45a8ac KG |
3440 | && INTVAL (const_arg1) != |
3441 | ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT - 1)) | |
f8cfc6aa | 3442 | && REG_P (folded_arg1)) |
c2cc0778 | 3443 | { |
ddc356e8 | 3444 | rtx new_const = GEN_INT (-INTVAL (const_arg1)); |
c2cc0778 | 3445 | struct table_elt *p |
0516f6fe | 3446 | = lookup (new_const, SAFE_HASH (new_const, mode), mode); |
c2cc0778 RK |
3447 | |
3448 | if (p) | |
3449 | for (p = p->first_same_value; p; p = p->next_same_value) | |
f8cfc6aa | 3450 | if (REG_P (p->exp)) |
0cedb36c JL |
3451 | return simplify_gen_binary (MINUS, mode, folded_arg0, |
3452 | canon_reg (p->exp, NULL_RTX)); | |
c2cc0778 | 3453 | } |
13c9910f RS |
3454 | goto from_plus; |
3455 | ||
3456 | case MINUS: | |
3457 | /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2). | |
3458 | If so, produce (PLUS Z C2-C). */ | |
3459 | if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT) | |
3460 | { | |
3461 | rtx y = lookup_as_function (XEXP (x, 0), PLUS); | |
3462 | if (y && GET_CODE (XEXP (y, 1)) == CONST_INT) | |
f3becefd RK |
3463 | return fold_rtx (plus_constant (copy_rtx (y), |
3464 | -INTVAL (const_arg1)), | |
a3b5c94a | 3465 | NULL_RTX); |
13c9910f | 3466 | } |
7afe21cc | 3467 | |
ddc356e8 | 3468 | /* Fall through. */ |
7afe21cc | 3469 | |
13c9910f | 3470 | from_plus: |
7afe21cc RK |
3471 | case SMIN: case SMAX: case UMIN: case UMAX: |
3472 | case IOR: case AND: case XOR: | |
f930bfd0 | 3473 | case MULT: |
7afe21cc RK |
3474 | case ASHIFT: case LSHIFTRT: case ASHIFTRT: |
3475 | /* If we have (<op> <reg> <const_int>) for an associative OP and REG | |
3476 | is known to be of similar form, we may be able to replace the | |
3477 | operation with a combined operation. This may eliminate the | |
3478 | intermediate operation if every use is simplified in this way. | |
3479 | Note that the similar optimization done by combine.c only works | |
3480 | if the intermediate operation's result has only one reference. */ | |
3481 | ||
f8cfc6aa | 3482 | if (REG_P (folded_arg0) |
7afe21cc RK |
3483 | && const_arg1 && GET_CODE (const_arg1) == CONST_INT) |
3484 | { | |
3485 | int is_shift | |
3486 | = (code == ASHIFT || code == ASHIFTRT || code == LSHIFTRT); | |
5bb51e1d | 3487 | rtx y, inner_const, new_const; |
7afe21cc | 3488 | enum rtx_code associate_code; |
7afe21cc | 3489 | |
824a4527 JDA |
3490 | if (is_shift |
3491 | && (INTVAL (const_arg1) >= GET_MODE_BITSIZE (mode) | |
3492 | || INTVAL (const_arg1) < 0)) | |
3493 | { | |
3494 | if (SHIFT_COUNT_TRUNCATED) | |
3495 | const_arg1 = GEN_INT (INTVAL (const_arg1) | |
3496 | & (GET_MODE_BITSIZE (mode) - 1)); | |
3497 | else | |
3498 | break; | |
3499 | } | |
3500 | ||
5bb51e1d | 3501 | y = lookup_as_function (folded_arg0, code); |
824a4527 JDA |
3502 | if (y == 0) |
3503 | break; | |
824a4527 JDA |
3504 | |
3505 | /* If we have compiled a statement like | |
3506 | "if (x == (x & mask1))", and now are looking at | |
3507 | "x & mask2", we will have a case where the first operand | |
3508 | of Y is the same as our first operand. Unless we detect | |
3509 | this case, an infinite loop will result. */ | |
3510 | if (XEXP (y, 0) == folded_arg0) | |
7afe21cc RK |
3511 | break; |
3512 | ||
5bb51e1d EB |
3513 | inner_const = equiv_constant (fold_rtx (XEXP (y, 1), 0)); |
3514 | if (!inner_const || GET_CODE (inner_const) != CONST_INT) | |
3515 | break; | |
3516 | ||
7afe21cc RK |
3517 | /* Don't associate these operations if they are a PLUS with the |
3518 | same constant and it is a power of two. These might be doable | |
3519 | with a pre- or post-increment. Similarly for two subtracts of | |
3520 | identical powers of two with post decrement. */ | |
3521 | ||
213d5fbc | 3522 | if (code == PLUS && const_arg1 == inner_const |
940da324 JL |
3523 | && ((HAVE_PRE_INCREMENT |
3524 | && exact_log2 (INTVAL (const_arg1)) >= 0) | |
3525 | || (HAVE_POST_INCREMENT | |
3526 | && exact_log2 (INTVAL (const_arg1)) >= 0) | |
3527 | || (HAVE_PRE_DECREMENT | |
3528 | && exact_log2 (- INTVAL (const_arg1)) >= 0) | |
3529 | || (HAVE_POST_DECREMENT | |
3530 | && exact_log2 (- INTVAL (const_arg1)) >= 0))) | |
7afe21cc RK |
3531 | break; |
3532 | ||
824a4527 JDA |
3533 | if (is_shift |
3534 | && (INTVAL (inner_const) >= GET_MODE_BITSIZE (mode) | |
3535 | || INTVAL (inner_const) < 0)) | |
3536 | { | |
3537 | if (SHIFT_COUNT_TRUNCATED) | |
3538 | inner_const = GEN_INT (INTVAL (inner_const) | |
3539 | & (GET_MODE_BITSIZE (mode) - 1)); | |
3540 | else | |
3541 | break; | |
3542 | } | |
3543 | ||
7afe21cc | 3544 | /* Compute the code used to compose the constants. For example, |
f930bfd0 | 3545 | A-C1-C2 is A-(C1 + C2), so if CODE == MINUS, we want PLUS. */ |
7afe21cc | 3546 | |
f930bfd0 | 3547 | associate_code = (is_shift || code == MINUS ? PLUS : code); |
7afe21cc RK |
3548 | |
3549 | new_const = simplify_binary_operation (associate_code, mode, | |
3550 | const_arg1, inner_const); | |
3551 | ||
3552 | if (new_const == 0) | |
3553 | break; | |
3554 | ||
3555 | /* If we are associating shift operations, don't let this | |
4908e508 RS |
3556 | produce a shift of the size of the object or larger. |
3557 | This could occur when we follow a sign-extend by a right | |
3558 | shift on a machine that does a sign-extend as a pair | |
3559 | of shifts. */ | |
7afe21cc | 3560 | |
824a4527 JDA |
3561 | if (is_shift |
3562 | && GET_CODE (new_const) == CONST_INT | |
4908e508 RS |
3563 | && INTVAL (new_const) >= GET_MODE_BITSIZE (mode)) |
3564 | { | |
3565 | /* As an exception, we can turn an ASHIFTRT of this | |
3566 | form into a shift of the number of bits - 1. */ | |
3567 | if (code == ASHIFTRT) | |
3568 | new_const = GEN_INT (GET_MODE_BITSIZE (mode) - 1); | |
824a4527 JDA |
3569 | else if (!side_effects_p (XEXP (y, 0))) |
3570 | return CONST0_RTX (mode); | |
4908e508 RS |
3571 | else |
3572 | break; | |
3573 | } | |
7afe21cc RK |
3574 | |
3575 | y = copy_rtx (XEXP (y, 0)); | |
3576 | ||
3577 | /* If Y contains our first operand (the most common way this | |
3578 | can happen is if Y is a MEM), we would do into an infinite | |
3579 | loop if we tried to fold it. So don't in that case. */ | |
3580 | ||
3581 | if (! reg_mentioned_p (folded_arg0, y)) | |
3582 | y = fold_rtx (y, insn); | |
3583 | ||
0cedb36c | 3584 | return simplify_gen_binary (code, mode, y, new_const); |
7afe21cc | 3585 | } |
e9a25f70 JL |
3586 | break; |
3587 | ||
f930bfd0 JW |
3588 | case DIV: case UDIV: |
3589 | /* ??? The associative optimization performed immediately above is | |
3590 | also possible for DIV and UDIV using associate_code of MULT. | |
3591 | However, we would need extra code to verify that the | |
3592 | multiplication does not overflow, that is, there is no overflow | |
3593 | in the calculation of new_const. */ | |
3594 | break; | |
3595 | ||
e9a25f70 JL |
3596 | default: |
3597 | break; | |
7afe21cc RK |
3598 | } |
3599 | ||
3600 | new = simplify_binary_operation (code, mode, | |
3601 | const_arg0 ? const_arg0 : folded_arg0, | |
3602 | const_arg1 ? const_arg1 : folded_arg1); | |
3603 | break; | |
3604 | ||
ec8e098d | 3605 | case RTX_OBJ: |
7afe21cc RK |
3606 | /* (lo_sum (high X) X) is simply X. */ |
3607 | if (code == LO_SUM && const_arg0 != 0 | |
3608 | && GET_CODE (const_arg0) == HIGH | |
3609 | && rtx_equal_p (XEXP (const_arg0, 0), const_arg1)) | |
3610 | return const_arg1; | |
3611 | break; | |
3612 | ||
ec8e098d PB |
3613 | case RTX_TERNARY: |
3614 | case RTX_BITFIELD_OPS: | |
7afe21cc RK |
3615 | new = simplify_ternary_operation (code, mode, mode_arg0, |
3616 | const_arg0 ? const_arg0 : folded_arg0, | |
3617 | const_arg1 ? const_arg1 : folded_arg1, | |
3618 | const_arg2 ? const_arg2 : XEXP (x, 2)); | |
3619 | break; | |
ee5332b8 | 3620 | |
ec8e098d PB |
3621 | default: |
3622 | break; | |
7afe21cc RK |
3623 | } |
3624 | ||
3625 | return new ? new : x; | |
3626 | } | |
3627 | \f | |
3628 | /* Return a constant value currently equivalent to X. | |
3629 | Return 0 if we don't know one. */ | |
3630 | ||
3631 | static rtx | |
7080f735 | 3632 | equiv_constant (rtx x) |
7afe21cc | 3633 | { |
f8cfc6aa | 3634 | if (REG_P (x) |
1bb98cec DM |
3635 | && REGNO_QTY_VALID_P (REGNO (x))) |
3636 | { | |
3637 | int x_q = REG_QTY (REGNO (x)); | |
3638 | struct qty_table_elem *x_ent = &qty_table[x_q]; | |
3639 | ||
3640 | if (x_ent->const_rtx) | |
4de249d9 | 3641 | x = gen_lowpart (GET_MODE (x), x_ent->const_rtx); |
1bb98cec | 3642 | } |
7afe21cc | 3643 | |
2ce5e1b4 | 3644 | if (x == 0 || CONSTANT_P (x)) |
7afe21cc RK |
3645 | return x; |
3646 | ||
a52b023a PB |
3647 | if (GET_CODE (x) == SUBREG) |
3648 | { | |
3649 | rtx new; | |
3650 | ||
3651 | /* See if we previously assigned a constant value to this SUBREG. */ | |
3652 | if ((new = lookup_as_function (x, CONST_INT)) != 0 | |
3653 | || (new = lookup_as_function (x, CONST_DOUBLE)) != 0) | |
3654 | return new; | |
3655 | ||
3656 | if (REG_P (SUBREG_REG (x)) | |
3657 | && (new = equiv_constant (SUBREG_REG (x))) != 0) | |
3658 | return simplify_subreg (GET_MODE (x), SUBREG_REG (x), | |
3659 | GET_MODE (SUBREG_REG (x)), SUBREG_BYTE (x)); | |
3660 | ||
3661 | return 0; | |
3662 | } | |
3663 | ||
3664 | /* If X is a MEM, see if it is a constant-pool reference, or look it up in | |
3665 | the hash table in case its value was seen before. */ | |
fc3ffe83 | 3666 | |
3c0cb5de | 3667 | if (MEM_P (x)) |
fc3ffe83 RK |
3668 | { |
3669 | struct table_elt *elt; | |
3670 | ||
a52b023a | 3671 | x = avoid_constant_pool_reference (x); |
fc3ffe83 RK |
3672 | if (CONSTANT_P (x)) |
3673 | return x; | |
3674 | ||
0516f6fe | 3675 | elt = lookup (x, SAFE_HASH (x, GET_MODE (x)), GET_MODE (x)); |
fc3ffe83 RK |
3676 | if (elt == 0) |
3677 | return 0; | |
3678 | ||
3679 | for (elt = elt->first_same_value; elt; elt = elt->next_same_value) | |
3680 | if (elt->is_const && CONSTANT_P (elt->exp)) | |
3681 | return elt->exp; | |
3682 | } | |
3683 | ||
7afe21cc RK |
3684 | return 0; |
3685 | } | |
3686 | \f | |
0129d079 SB |
3687 | /* Given INSN, a jump insn, TAKEN indicates if we are following the |
3688 | "taken" branch. | |
7afe21cc RK |
3689 | |
3690 | In certain cases, this can cause us to add an equivalence. For example, | |
278a83b2 | 3691 | if we are following the taken case of |
7080f735 | 3692 | if (i == 2) |
7afe21cc RK |
3693 | we can add the fact that `i' and '2' are now equivalent. |
3694 | ||
3695 | In any case, we can record that this comparison was passed. If the same | |
3696 | comparison is seen later, we will know its value. */ | |
3697 | ||
3698 | static void | |
0129d079 | 3699 | record_jump_equiv (rtx insn, bool taken) |
7afe21cc RK |
3700 | { |
3701 | int cond_known_true; | |
3702 | rtx op0, op1; | |
7f1c097d | 3703 | rtx set; |
13c9910f | 3704 | enum machine_mode mode, mode0, mode1; |
7afe21cc RK |
3705 | int reversed_nonequality = 0; |
3706 | enum rtx_code code; | |
3707 | ||
3708 | /* Ensure this is the right kind of insn. */ | |
0129d079 SB |
3709 | gcc_assert (any_condjump_p (insn)); |
3710 | ||
7f1c097d | 3711 | set = pc_set (insn); |
7afe21cc RK |
3712 | |
3713 | /* See if this jump condition is known true or false. */ | |
3714 | if (taken) | |
7f1c097d | 3715 | cond_known_true = (XEXP (SET_SRC (set), 2) == pc_rtx); |
7afe21cc | 3716 | else |
7f1c097d | 3717 | cond_known_true = (XEXP (SET_SRC (set), 1) == pc_rtx); |
7afe21cc RK |
3718 | |
3719 | /* Get the type of comparison being done and the operands being compared. | |
3720 | If we had to reverse a non-equality condition, record that fact so we | |
3721 | know that it isn't valid for floating-point. */ | |
7f1c097d JH |
3722 | code = GET_CODE (XEXP (SET_SRC (set), 0)); |
3723 | op0 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 0), insn); | |
3724 | op1 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 1), insn); | |
7afe21cc | 3725 | |
13c9910f | 3726 | code = find_comparison_args (code, &op0, &op1, &mode0, &mode1); |
7afe21cc RK |
3727 | if (! cond_known_true) |
3728 | { | |
261efdef | 3729 | code = reversed_comparison_code_parts (code, op0, op1, insn); |
1eb8759b RH |
3730 | |
3731 | /* Don't remember if we can't find the inverse. */ | |
3732 | if (code == UNKNOWN) | |
3733 | return; | |
7afe21cc RK |
3734 | } |
3735 | ||
3736 | /* The mode is the mode of the non-constant. */ | |
13c9910f RS |
3737 | mode = mode0; |
3738 | if (mode1 != VOIDmode) | |
3739 | mode = mode1; | |
7afe21cc RK |
3740 | |
3741 | record_jump_cond (code, mode, op0, op1, reversed_nonequality); | |
3742 | } | |
3743 | ||
794693c0 RH |
3744 | /* Yet another form of subreg creation. In this case, we want something in |
3745 | MODE, and we should assume OP has MODE iff it is naturally modeless. */ | |
3746 | ||
3747 | static rtx | |
3748 | record_jump_cond_subreg (enum machine_mode mode, rtx op) | |
3749 | { | |
3750 | enum machine_mode op_mode = GET_MODE (op); | |
3751 | if (op_mode == mode || op_mode == VOIDmode) | |
3752 | return op; | |
3753 | return lowpart_subreg (mode, op, op_mode); | |
3754 | } | |
3755 | ||
7afe21cc RK |
3756 | /* We know that comparison CODE applied to OP0 and OP1 in MODE is true. |
3757 | REVERSED_NONEQUALITY is nonzero if CODE had to be swapped. | |
3758 | Make any useful entries we can with that information. Called from | |
3759 | above function and called recursively. */ | |
3760 | ||
3761 | static void | |
7080f735 AJ |
3762 | record_jump_cond (enum rtx_code code, enum machine_mode mode, rtx op0, |
3763 | rtx op1, int reversed_nonequality) | |
7afe21cc | 3764 | { |
2197a88a | 3765 | unsigned op0_hash, op1_hash; |
e428d738 | 3766 | int op0_in_memory, op1_in_memory; |
7afe21cc RK |
3767 | struct table_elt *op0_elt, *op1_elt; |
3768 | ||
3769 | /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG, | |
3770 | we know that they are also equal in the smaller mode (this is also | |
3771 | true for all smaller modes whether or not there is a SUBREG, but | |
ac7ef8d5 | 3772 | is not worth testing for with no SUBREG). */ |
7afe21cc | 3773 | |
2e794ee8 | 3774 | /* Note that GET_MODE (op0) may not equal MODE. */ |
7afe21cc | 3775 | if (code == EQ && GET_CODE (op0) == SUBREG |
2e794ee8 RS |
3776 | && (GET_MODE_SIZE (GET_MODE (op0)) |
3777 | > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0))))) | |
7afe21cc RK |
3778 | { |
3779 | enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0)); | |
794693c0 RH |
3780 | rtx tem = record_jump_cond_subreg (inner_mode, op1); |
3781 | if (tem) | |
3782 | record_jump_cond (code, mode, SUBREG_REG (op0), tem, | |
3783 | reversed_nonequality); | |
7afe21cc RK |
3784 | } |
3785 | ||
3786 | if (code == EQ && GET_CODE (op1) == SUBREG | |
2e794ee8 RS |
3787 | && (GET_MODE_SIZE (GET_MODE (op1)) |
3788 | > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1))))) | |
7afe21cc RK |
3789 | { |
3790 | enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1)); | |
794693c0 RH |
3791 | rtx tem = record_jump_cond_subreg (inner_mode, op0); |
3792 | if (tem) | |
3793 | record_jump_cond (code, mode, SUBREG_REG (op1), tem, | |
3794 | reversed_nonequality); | |
7afe21cc RK |
3795 | } |
3796 | ||
278a83b2 | 3797 | /* Similarly, if this is an NE comparison, and either is a SUBREG |
7afe21cc RK |
3798 | making a smaller mode, we know the whole thing is also NE. */ |
3799 | ||
2e794ee8 RS |
3800 | /* Note that GET_MODE (op0) may not equal MODE; |
3801 | if we test MODE instead, we can get an infinite recursion | |
3802 | alternating between two modes each wider than MODE. */ | |
3803 | ||
7afe21cc RK |
3804 | if (code == NE && GET_CODE (op0) == SUBREG |
3805 | && subreg_lowpart_p (op0) | |
2e794ee8 RS |
3806 | && (GET_MODE_SIZE (GET_MODE (op0)) |
3807 | < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0))))) | |
7afe21cc RK |
3808 | { |
3809 | enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0)); | |
794693c0 RH |
3810 | rtx tem = record_jump_cond_subreg (inner_mode, op1); |
3811 | if (tem) | |
3812 | record_jump_cond (code, mode, SUBREG_REG (op0), tem, | |
3813 | reversed_nonequality); | |
7afe21cc RK |
3814 | } |
3815 | ||
3816 | if (code == NE && GET_CODE (op1) == SUBREG | |
3817 | && subreg_lowpart_p (op1) | |
2e794ee8 RS |
3818 | && (GET_MODE_SIZE (GET_MODE (op1)) |
3819 | < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1))))) | |
7afe21cc RK |
3820 | { |
3821 | enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1)); | |
794693c0 RH |
3822 | rtx tem = record_jump_cond_subreg (inner_mode, op0); |
3823 | if (tem) | |
3824 | record_jump_cond (code, mode, SUBREG_REG (op1), tem, | |
3825 | reversed_nonequality); | |
7afe21cc RK |
3826 | } |
3827 | ||
3828 | /* Hash both operands. */ | |
3829 | ||
3830 | do_not_record = 0; | |
3831 | hash_arg_in_memory = 0; | |
2197a88a | 3832 | op0_hash = HASH (op0, mode); |
7afe21cc | 3833 | op0_in_memory = hash_arg_in_memory; |
7afe21cc RK |
3834 | |
3835 | if (do_not_record) | |
3836 | return; | |
3837 | ||
3838 | do_not_record = 0; | |
3839 | hash_arg_in_memory = 0; | |
2197a88a | 3840 | op1_hash = HASH (op1, mode); |
7afe21cc | 3841 | op1_in_memory = hash_arg_in_memory; |
278a83b2 | 3842 | |
7afe21cc RK |
3843 | if (do_not_record) |
3844 | return; | |
3845 | ||
3846 | /* Look up both operands. */ | |
2197a88a RK |
3847 | op0_elt = lookup (op0, op0_hash, mode); |
3848 | op1_elt = lookup (op1, op1_hash, mode); | |
7afe21cc | 3849 | |
af3869c1 RK |
3850 | /* If both operands are already equivalent or if they are not in the |
3851 | table but are identical, do nothing. */ | |
3852 | if ((op0_elt != 0 && op1_elt != 0 | |
3853 | && op0_elt->first_same_value == op1_elt->first_same_value) | |
3854 | || op0 == op1 || rtx_equal_p (op0, op1)) | |
3855 | return; | |
3856 | ||
7afe21cc | 3857 | /* If we aren't setting two things equal all we can do is save this |
b2796a4b RK |
3858 | comparison. Similarly if this is floating-point. In the latter |
3859 | case, OP1 might be zero and both -0.0 and 0.0 are equal to it. | |
3860 | If we record the equality, we might inadvertently delete code | |
3861 | whose intent was to change -0 to +0. */ | |
3862 | ||
cbf6a543 | 3863 | if (code != EQ || FLOAT_MODE_P (GET_MODE (op0))) |
7afe21cc | 3864 | { |
1bb98cec DM |
3865 | struct qty_table_elem *ent; |
3866 | int qty; | |
3867 | ||
7afe21cc RK |
3868 | /* If we reversed a floating-point comparison, if OP0 is not a |
3869 | register, or if OP1 is neither a register or constant, we can't | |
3870 | do anything. */ | |
3871 | ||
f8cfc6aa | 3872 | if (!REG_P (op1)) |
7afe21cc RK |
3873 | op1 = equiv_constant (op1); |
3874 | ||
cbf6a543 | 3875 | if ((reversed_nonequality && FLOAT_MODE_P (mode)) |
f8cfc6aa | 3876 | || !REG_P (op0) || op1 == 0) |
7afe21cc RK |
3877 | return; |
3878 | ||
3879 | /* Put OP0 in the hash table if it isn't already. This gives it a | |
3880 | new quantity number. */ | |
3881 | if (op0_elt == 0) | |
3882 | { | |
9714cf43 | 3883 | if (insert_regs (op0, NULL, 0)) |
7afe21cc RK |
3884 | { |
3885 | rehash_using_reg (op0); | |
2197a88a | 3886 | op0_hash = HASH (op0, mode); |
2bb81c86 RK |
3887 | |
3888 | /* If OP0 is contained in OP1, this changes its hash code | |
3889 | as well. Faster to rehash than to check, except | |
3890 | for the simple case of a constant. */ | |
3891 | if (! CONSTANT_P (op1)) | |
2197a88a | 3892 | op1_hash = HASH (op1,mode); |
7afe21cc RK |
3893 | } |
3894 | ||
9714cf43 | 3895 | op0_elt = insert (op0, NULL, op0_hash, mode); |
7afe21cc | 3896 | op0_elt->in_memory = op0_in_memory; |
7afe21cc RK |
3897 | } |
3898 | ||
1bb98cec DM |
3899 | qty = REG_QTY (REGNO (op0)); |
3900 | ent = &qty_table[qty]; | |
3901 | ||
3902 | ent->comparison_code = code; | |
f8cfc6aa | 3903 | if (REG_P (op1)) |
7afe21cc | 3904 | { |
5d5ea909 | 3905 | /* Look it up again--in case op0 and op1 are the same. */ |
2197a88a | 3906 | op1_elt = lookup (op1, op1_hash, mode); |
5d5ea909 | 3907 | |
7afe21cc RK |
3908 | /* Put OP1 in the hash table so it gets a new quantity number. */ |
3909 | if (op1_elt == 0) | |
3910 | { | |
9714cf43 | 3911 | if (insert_regs (op1, NULL, 0)) |
7afe21cc RK |
3912 | { |
3913 | rehash_using_reg (op1); | |
2197a88a | 3914 | op1_hash = HASH (op1, mode); |
7afe21cc RK |
3915 | } |
3916 | ||
9714cf43 | 3917 | op1_elt = insert (op1, NULL, op1_hash, mode); |
7afe21cc | 3918 | op1_elt->in_memory = op1_in_memory; |
7afe21cc RK |
3919 | } |
3920 | ||
1bb98cec DM |
3921 | ent->comparison_const = NULL_RTX; |
3922 | ent->comparison_qty = REG_QTY (REGNO (op1)); | |
7afe21cc RK |
3923 | } |
3924 | else | |
3925 | { | |
1bb98cec DM |
3926 | ent->comparison_const = op1; |
3927 | ent->comparison_qty = -1; | |
7afe21cc RK |
3928 | } |
3929 | ||
3930 | return; | |
3931 | } | |
3932 | ||
eb5ad42a RS |
3933 | /* If either side is still missing an equivalence, make it now, |
3934 | then merge the equivalences. */ | |
7afe21cc | 3935 | |
7afe21cc RK |
3936 | if (op0_elt == 0) |
3937 | { | |
9714cf43 | 3938 | if (insert_regs (op0, NULL, 0)) |
7afe21cc RK |
3939 | { |
3940 | rehash_using_reg (op0); | |
2197a88a | 3941 | op0_hash = HASH (op0, mode); |
7afe21cc RK |
3942 | } |
3943 | ||
9714cf43 | 3944 | op0_elt = insert (op0, NULL, op0_hash, mode); |
7afe21cc | 3945 | op0_elt->in_memory = op0_in_memory; |
7afe21cc RK |
3946 | } |
3947 | ||
3948 | if (op1_elt == 0) | |
3949 | { | |
9714cf43 | 3950 | if (insert_regs (op1, NULL, 0)) |
7afe21cc RK |
3951 | { |
3952 | rehash_using_reg (op1); | |
2197a88a | 3953 | op1_hash = HASH (op1, mode); |
7afe21cc RK |
3954 | } |
3955 | ||
9714cf43 | 3956 | op1_elt = insert (op1, NULL, op1_hash, mode); |
7afe21cc | 3957 | op1_elt->in_memory = op1_in_memory; |
7afe21cc | 3958 | } |
eb5ad42a RS |
3959 | |
3960 | merge_equiv_classes (op0_elt, op1_elt); | |
7afe21cc RK |
3961 | } |
3962 | \f | |
3963 | /* CSE processing for one instruction. | |
3964 | First simplify sources and addresses of all assignments | |
3965 | in the instruction, using previously-computed equivalents values. | |
3966 | Then install the new sources and destinations in the table | |
278a83b2 | 3967 | of available values. |
7afe21cc | 3968 | |
1ed0205e VM |
3969 | If LIBCALL_INSN is nonzero, don't record any equivalence made in |
3970 | the insn. It means that INSN is inside libcall block. In this | |
ddc356e8 | 3971 | case LIBCALL_INSN is the corresponding insn with REG_LIBCALL. */ |
7afe21cc RK |
3972 | |
3973 | /* Data on one SET contained in the instruction. */ | |
3974 | ||
3975 | struct set | |
3976 | { | |
3977 | /* The SET rtx itself. */ | |
3978 | rtx rtl; | |
3979 | /* The SET_SRC of the rtx (the original value, if it is changing). */ | |
3980 | rtx src; | |
3981 | /* The hash-table element for the SET_SRC of the SET. */ | |
3982 | struct table_elt *src_elt; | |
2197a88a RK |
3983 | /* Hash value for the SET_SRC. */ |
3984 | unsigned src_hash; | |
3985 | /* Hash value for the SET_DEST. */ | |
3986 | unsigned dest_hash; | |
7afe21cc RK |
3987 | /* The SET_DEST, with SUBREG, etc., stripped. */ |
3988 | rtx inner_dest; | |
278a83b2 | 3989 | /* Nonzero if the SET_SRC is in memory. */ |
7afe21cc | 3990 | char src_in_memory; |
7afe21cc RK |
3991 | /* Nonzero if the SET_SRC contains something |
3992 | whose value cannot be predicted and understood. */ | |
3993 | char src_volatile; | |
496324d0 DN |
3994 | /* Original machine mode, in case it becomes a CONST_INT. |
3995 | The size of this field should match the size of the mode | |
3996 | field of struct rtx_def (see rtl.h). */ | |
3997 | ENUM_BITFIELD(machine_mode) mode : 8; | |
7afe21cc RK |
3998 | /* A constant equivalent for SET_SRC, if any. */ |
3999 | rtx src_const; | |
47841d1b JJ |
4000 | /* Original SET_SRC value used for libcall notes. */ |
4001 | rtx orig_src; | |
2197a88a RK |
4002 | /* Hash value of constant equivalent for SET_SRC. */ |
4003 | unsigned src_const_hash; | |
7afe21cc RK |
4004 | /* Table entry for constant equivalent for SET_SRC, if any. */ |
4005 | struct table_elt *src_const_elt; | |
05c433f3 PB |
4006 | /* Table entry for the destination address. */ |
4007 | struct table_elt *dest_addr_elt; | |
7afe21cc RK |
4008 | }; |
4009 | ||
4010 | static void | |
7080f735 | 4011 | cse_insn (rtx insn, rtx libcall_insn) |
7afe21cc | 4012 | { |
b3694847 SS |
4013 | rtx x = PATTERN (insn); |
4014 | int i; | |
92f9aa51 | 4015 | rtx tem; |
b3694847 | 4016 | int n_sets = 0; |
7afe21cc | 4017 | |
7afe21cc RK |
4018 | rtx src_eqv = 0; |
4019 | struct table_elt *src_eqv_elt = 0; | |
6a651371 KG |
4020 | int src_eqv_volatile = 0; |
4021 | int src_eqv_in_memory = 0; | |
6a651371 | 4022 | unsigned src_eqv_hash = 0; |
7afe21cc | 4023 | |
9714cf43 | 4024 | struct set *sets = (struct set *) 0; |
7afe21cc RK |
4025 | |
4026 | this_insn = insn; | |
192232e2 RS |
4027 | #ifdef HAVE_cc0 |
4028 | /* Records what this insn does to set CC0. */ | |
4029 | this_insn_cc0 = 0; | |
4030 | this_insn_cc0_mode = VOIDmode; | |
4031 | #endif | |
7afe21cc RK |
4032 | |
4033 | /* Find all the SETs and CLOBBERs in this instruction. | |
4034 | Record all the SETs in the array `set' and count them. | |
4035 | Also determine whether there is a CLOBBER that invalidates | |
4036 | all memory references, or all references at varying addresses. */ | |
4037 | ||
4b4bf941 | 4038 | if (CALL_P (insn)) |
f1e7c95f RK |
4039 | { |
4040 | for (tem = CALL_INSN_FUNCTION_USAGE (insn); tem; tem = XEXP (tem, 1)) | |
f474c6f8 AO |
4041 | { |
4042 | if (GET_CODE (XEXP (tem, 0)) == CLOBBER) | |
4043 | invalidate (SET_DEST (XEXP (tem, 0)), VOIDmode); | |
4044 | XEXP (tem, 0) = canon_reg (XEXP (tem, 0), insn); | |
4045 | } | |
f1e7c95f RK |
4046 | } |
4047 | ||
7afe21cc RK |
4048 | if (GET_CODE (x) == SET) |
4049 | { | |
703ad42b | 4050 | sets = alloca (sizeof (struct set)); |
7afe21cc RK |
4051 | sets[0].rtl = x; |
4052 | ||
4053 | /* Ignore SETs that are unconditional jumps. | |
4054 | They never need cse processing, so this does not hurt. | |
4055 | The reason is not efficiency but rather | |
4056 | so that we can test at the end for instructions | |
4057 | that have been simplified to unconditional jumps | |
4058 | and not be misled by unchanged instructions | |
4059 | that were unconditional jumps to begin with. */ | |
4060 | if (SET_DEST (x) == pc_rtx | |
4061 | && GET_CODE (SET_SRC (x)) == LABEL_REF) | |
4062 | ; | |
4063 | ||
4064 | /* Don't count call-insns, (set (reg 0) (call ...)), as a set. | |
4065 | The hard function value register is used only once, to copy to | |
4066 | someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)! | |
4067 | Ensure we invalidate the destination register. On the 80386 no | |
7722328e | 4068 | other code would invalidate it since it is a fixed_reg. |
0f41302f | 4069 | We need not check the return of apply_change_group; see canon_reg. */ |
7afe21cc RK |
4070 | |
4071 | else if (GET_CODE (SET_SRC (x)) == CALL) | |
4072 | { | |
4073 | canon_reg (SET_SRC (x), insn); | |
77fa0940 | 4074 | apply_change_group (); |
7afe21cc | 4075 | fold_rtx (SET_SRC (x), insn); |
bb4034b3 | 4076 | invalidate (SET_DEST (x), VOIDmode); |
7afe21cc RK |
4077 | } |
4078 | else | |
4079 | n_sets = 1; | |
4080 | } | |
4081 | else if (GET_CODE (x) == PARALLEL) | |
4082 | { | |
b3694847 | 4083 | int lim = XVECLEN (x, 0); |
7afe21cc | 4084 | |
703ad42b | 4085 | sets = alloca (lim * sizeof (struct set)); |
7afe21cc RK |
4086 | |
4087 | /* Find all regs explicitly clobbered in this insn, | |
4088 | and ensure they are not replaced with any other regs | |
4089 | elsewhere in this insn. | |
4090 | When a reg that is clobbered is also used for input, | |
4091 | we should presume that that is for a reason, | |
4092 | and we should not substitute some other register | |
4093 | which is not supposed to be clobbered. | |
4094 | Therefore, this loop cannot be merged into the one below | |
830a38ee | 4095 | because a CALL may precede a CLOBBER and refer to the |
7afe21cc RK |
4096 | value clobbered. We must not let a canonicalization do |
4097 | anything in that case. */ | |
4098 | for (i = 0; i < lim; i++) | |
4099 | { | |
b3694847 | 4100 | rtx y = XVECEXP (x, 0, i); |
2708da92 RS |
4101 | if (GET_CODE (y) == CLOBBER) |
4102 | { | |
4103 | rtx clobbered = XEXP (y, 0); | |
4104 | ||
f8cfc6aa | 4105 | if (REG_P (clobbered) |
2708da92 | 4106 | || GET_CODE (clobbered) == SUBREG) |
bb4034b3 | 4107 | invalidate (clobbered, VOIDmode); |
2708da92 RS |
4108 | else if (GET_CODE (clobbered) == STRICT_LOW_PART |
4109 | || GET_CODE (clobbered) == ZERO_EXTRACT) | |
bb4034b3 | 4110 | invalidate (XEXP (clobbered, 0), GET_MODE (clobbered)); |
2708da92 | 4111 | } |
7afe21cc | 4112 | } |
278a83b2 | 4113 | |
7afe21cc RK |
4114 | for (i = 0; i < lim; i++) |
4115 | { | |
b3694847 | 4116 | rtx y = XVECEXP (x, 0, i); |
7afe21cc RK |
4117 | if (GET_CODE (y) == SET) |
4118 | { | |
7722328e RK |
4119 | /* As above, we ignore unconditional jumps and call-insns and |
4120 | ignore the result of apply_change_group. */ | |
7afe21cc RK |
4121 | if (GET_CODE (SET_SRC (y)) == CALL) |
4122 | { | |
4123 | canon_reg (SET_SRC (y), insn); | |
77fa0940 | 4124 | apply_change_group (); |
7afe21cc | 4125 | fold_rtx (SET_SRC (y), insn); |
bb4034b3 | 4126 | invalidate (SET_DEST (y), VOIDmode); |
7afe21cc RK |
4127 | } |
4128 | else if (SET_DEST (y) == pc_rtx | |
4129 | && GET_CODE (SET_SRC (y)) == LABEL_REF) | |
4130 | ; | |
4131 | else | |
4132 | sets[n_sets++].rtl = y; | |
4133 | } | |
4134 | else if (GET_CODE (y) == CLOBBER) | |
4135 | { | |
9ae8ffe7 | 4136 | /* If we clobber memory, canon the address. |
7afe21cc RK |
4137 | This does nothing when a register is clobbered |
4138 | because we have already invalidated the reg. */ | |
3c0cb5de | 4139 | if (MEM_P (XEXP (y, 0))) |
9ae8ffe7 | 4140 | canon_reg (XEXP (y, 0), NULL_RTX); |
7afe21cc RK |
4141 | } |
4142 | else if (GET_CODE (y) == USE | |
f8cfc6aa | 4143 | && ! (REG_P (XEXP (y, 0)) |
7afe21cc | 4144 | && REGNO (XEXP (y, 0)) < FIRST_PSEUDO_REGISTER)) |
906c4e36 | 4145 | canon_reg (y, NULL_RTX); |
7afe21cc RK |
4146 | else if (GET_CODE (y) == CALL) |
4147 | { | |
7722328e RK |
4148 | /* The result of apply_change_group can be ignored; see |
4149 | canon_reg. */ | |
7afe21cc | 4150 | canon_reg (y, insn); |
77fa0940 | 4151 | apply_change_group (); |
7afe21cc RK |
4152 | fold_rtx (y, insn); |
4153 | } | |
4154 | } | |
4155 | } | |
4156 | else if (GET_CODE (x) == CLOBBER) | |
4157 | { | |
3c0cb5de | 4158 | if (MEM_P (XEXP (x, 0))) |
9ae8ffe7 | 4159 | canon_reg (XEXP (x, 0), NULL_RTX); |
7afe21cc RK |
4160 | } |
4161 | ||
4162 | /* Canonicalize a USE of a pseudo register or memory location. */ | |
4163 | else if (GET_CODE (x) == USE | |
f8cfc6aa | 4164 | && ! (REG_P (XEXP (x, 0)) |
7afe21cc | 4165 | && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)) |
906c4e36 | 4166 | canon_reg (XEXP (x, 0), NULL_RTX); |
7afe21cc RK |
4167 | else if (GET_CODE (x) == CALL) |
4168 | { | |
7722328e | 4169 | /* The result of apply_change_group can be ignored; see canon_reg. */ |
7afe21cc | 4170 | canon_reg (x, insn); |
77fa0940 | 4171 | apply_change_group (); |
7afe21cc RK |
4172 | fold_rtx (x, insn); |
4173 | } | |
4174 | ||
7b3ab05e JW |
4175 | /* Store the equivalent value in SRC_EQV, if different, or if the DEST |
4176 | is a STRICT_LOW_PART. The latter condition is necessary because SRC_EQV | |
4177 | is handled specially for this case, and if it isn't set, then there will | |
9faa82d8 | 4178 | be no equivalence for the destination. */ |
92f9aa51 RK |
4179 | if (n_sets == 1 && REG_NOTES (insn) != 0 |
4180 | && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0 | |
7b3ab05e JW |
4181 | && (! rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl)) |
4182 | || GET_CODE (SET_DEST (sets[0].rtl)) == STRICT_LOW_PART)) | |
7b668f9e JJ |
4183 | { |
4184 | src_eqv = fold_rtx (canon_reg (XEXP (tem, 0), NULL_RTX), insn); | |
4185 | XEXP (tem, 0) = src_eqv; | |
4186 | } | |
7afe21cc RK |
4187 | |
4188 | /* Canonicalize sources and addresses of destinations. | |
4189 | We do this in a separate pass to avoid problems when a MATCH_DUP is | |
4190 | present in the insn pattern. In that case, we want to ensure that | |
4191 | we don't break the duplicate nature of the pattern. So we will replace | |
4192 | both operands at the same time. Otherwise, we would fail to find an | |
4193 | equivalent substitution in the loop calling validate_change below. | |
7afe21cc RK |
4194 | |
4195 | We used to suppress canonicalization of DEST if it appears in SRC, | |
77fa0940 | 4196 | but we don't do this any more. */ |
7afe21cc RK |
4197 | |
4198 | for (i = 0; i < n_sets; i++) | |
4199 | { | |
4200 | rtx dest = SET_DEST (sets[i].rtl); | |
4201 | rtx src = SET_SRC (sets[i].rtl); | |
4202 | rtx new = canon_reg (src, insn); | |
4203 | ||
47841d1b | 4204 | sets[i].orig_src = src; |
67e0a632 | 4205 | validate_change (insn, &SET_SRC (sets[i].rtl), new, 1); |
7afe21cc | 4206 | |
46d096a3 | 4207 | if (GET_CODE (dest) == ZERO_EXTRACT) |
7afe21cc RK |
4208 | { |
4209 | validate_change (insn, &XEXP (dest, 1), | |
77fa0940 | 4210 | canon_reg (XEXP (dest, 1), insn), 1); |
7afe21cc | 4211 | validate_change (insn, &XEXP (dest, 2), |
77fa0940 | 4212 | canon_reg (XEXP (dest, 2), insn), 1); |
7afe21cc RK |
4213 | } |
4214 | ||
46d096a3 | 4215 | while (GET_CODE (dest) == SUBREG |
7afe21cc | 4216 | || GET_CODE (dest) == ZERO_EXTRACT |
46d096a3 | 4217 | || GET_CODE (dest) == STRICT_LOW_PART) |
7afe21cc RK |
4218 | dest = XEXP (dest, 0); |
4219 | ||
3c0cb5de | 4220 | if (MEM_P (dest)) |
7afe21cc RK |
4221 | canon_reg (dest, insn); |
4222 | } | |
4223 | ||
77fa0940 RK |
4224 | /* Now that we have done all the replacements, we can apply the change |
4225 | group and see if they all work. Note that this will cause some | |
4226 | canonicalizations that would have worked individually not to be applied | |
4227 | because some other canonicalization didn't work, but this should not | |
278a83b2 | 4228 | occur often. |
7722328e RK |
4229 | |
4230 | The result of apply_change_group can be ignored; see canon_reg. */ | |
77fa0940 RK |
4231 | |
4232 | apply_change_group (); | |
4233 | ||
7afe21cc RK |
4234 | /* Set sets[i].src_elt to the class each source belongs to. |
4235 | Detect assignments from or to volatile things | |
4236 | and set set[i] to zero so they will be ignored | |
4237 | in the rest of this function. | |
4238 | ||
4239 | Nothing in this loop changes the hash table or the register chains. */ | |
4240 | ||
4241 | for (i = 0; i < n_sets; i++) | |
4242 | { | |
b3694847 SS |
4243 | rtx src, dest; |
4244 | rtx src_folded; | |
4245 | struct table_elt *elt = 0, *p; | |
7afe21cc RK |
4246 | enum machine_mode mode; |
4247 | rtx src_eqv_here; | |
4248 | rtx src_const = 0; | |
4249 | rtx src_related = 0; | |
4250 | struct table_elt *src_const_elt = 0; | |
99a9c946 GS |
4251 | int src_cost = MAX_COST; |
4252 | int src_eqv_cost = MAX_COST; | |
4253 | int src_folded_cost = MAX_COST; | |
4254 | int src_related_cost = MAX_COST; | |
4255 | int src_elt_cost = MAX_COST; | |
4256 | int src_regcost = MAX_COST; | |
4257 | int src_eqv_regcost = MAX_COST; | |
4258 | int src_folded_regcost = MAX_COST; | |
4259 | int src_related_regcost = MAX_COST; | |
4260 | int src_elt_regcost = MAX_COST; | |
da7d8304 | 4261 | /* Set nonzero if we need to call force_const_mem on with the |
7afe21cc RK |
4262 | contents of src_folded before using it. */ |
4263 | int src_folded_force_flag = 0; | |
4264 | ||
4265 | dest = SET_DEST (sets[i].rtl); | |
4266 | src = SET_SRC (sets[i].rtl); | |
4267 | ||
4268 | /* If SRC is a constant that has no machine mode, | |
4269 | hash it with the destination's machine mode. | |
4270 | This way we can keep different modes separate. */ | |
4271 | ||
4272 | mode = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src); | |
4273 | sets[i].mode = mode; | |
4274 | ||
4275 | if (src_eqv) | |
4276 | { | |
4277 | enum machine_mode eqvmode = mode; | |
4278 | if (GET_CODE (dest) == STRICT_LOW_PART) | |
4279 | eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0))); | |
4280 | do_not_record = 0; | |
4281 | hash_arg_in_memory = 0; | |
2197a88a | 4282 | src_eqv_hash = HASH (src_eqv, eqvmode); |
7afe21cc RK |
4283 | |
4284 | /* Find the equivalence class for the equivalent expression. */ | |
4285 | ||
4286 | if (!do_not_record) | |
2197a88a | 4287 | src_eqv_elt = lookup (src_eqv, src_eqv_hash, eqvmode); |
7afe21cc RK |
4288 | |
4289 | src_eqv_volatile = do_not_record; | |
4290 | src_eqv_in_memory = hash_arg_in_memory; | |
7afe21cc RK |
4291 | } |
4292 | ||
4293 | /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the | |
4294 | value of the INNER register, not the destination. So it is not | |
3826a3da | 4295 | a valid substitution for the source. But save it for later. */ |
7afe21cc RK |
4296 | if (GET_CODE (dest) == STRICT_LOW_PART) |
4297 | src_eqv_here = 0; | |
4298 | else | |
4299 | src_eqv_here = src_eqv; | |
4300 | ||
4301 | /* Simplify and foldable subexpressions in SRC. Then get the fully- | |
4302 | simplified result, which may not necessarily be valid. */ | |
4303 | src_folded = fold_rtx (src, insn); | |
4304 | ||
e6a125a0 RK |
4305 | #if 0 |
4306 | /* ??? This caused bad code to be generated for the m68k port with -O2. | |
4307 | Suppose src is (CONST_INT -1), and that after truncation src_folded | |
4308 | is (CONST_INT 3). Suppose src_folded is then used for src_const. | |
4309 | At the end we will add src and src_const to the same equivalence | |
4310 | class. We now have 3 and -1 on the same equivalence class. This | |
4311 | causes later instructions to be mis-optimized. */ | |
7afe21cc RK |
4312 | /* If storing a constant in a bitfield, pre-truncate the constant |
4313 | so we will be able to record it later. */ | |
46d096a3 | 4314 | if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT) |
7afe21cc RK |
4315 | { |
4316 | rtx width = XEXP (SET_DEST (sets[i].rtl), 1); | |
4317 | ||
4318 | if (GET_CODE (src) == CONST_INT | |
4319 | && GET_CODE (width) == CONST_INT | |
906c4e36 RK |
4320 | && INTVAL (width) < HOST_BITS_PER_WIDE_INT |
4321 | && (INTVAL (src) & ((HOST_WIDE_INT) (-1) << INTVAL (width)))) | |
4322 | src_folded | |
4323 | = GEN_INT (INTVAL (src) & (((HOST_WIDE_INT) 1 | |
4324 | << INTVAL (width)) - 1)); | |
7afe21cc | 4325 | } |
e6a125a0 | 4326 | #endif |
7afe21cc RK |
4327 | |
4328 | /* Compute SRC's hash code, and also notice if it | |
4329 | should not be recorded at all. In that case, | |
4330 | prevent any further processing of this assignment. */ | |
4331 | do_not_record = 0; | |
4332 | hash_arg_in_memory = 0; | |
7afe21cc RK |
4333 | |
4334 | sets[i].src = src; | |
2197a88a | 4335 | sets[i].src_hash = HASH (src, mode); |
7afe21cc RK |
4336 | sets[i].src_volatile = do_not_record; |
4337 | sets[i].src_in_memory = hash_arg_in_memory; | |
7afe21cc | 4338 | |
50196afa | 4339 | /* If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is |
43e72072 JJ |
4340 | a pseudo, do not record SRC. Using SRC as a replacement for |
4341 | anything else will be incorrect in that situation. Note that | |
4342 | this usually occurs only for stack slots, in which case all the | |
4343 | RTL would be referring to SRC, so we don't lose any optimization | |
4344 | opportunities by not having SRC in the hash table. */ | |
50196afa | 4345 | |
3c0cb5de | 4346 | if (MEM_P (src) |
43e72072 | 4347 | && find_reg_note (insn, REG_EQUIV, NULL_RTX) != 0 |
f8cfc6aa | 4348 | && REG_P (dest) |
43e72072 | 4349 | && REGNO (dest) >= FIRST_PSEUDO_REGISTER) |
50196afa RK |
4350 | sets[i].src_volatile = 1; |
4351 | ||
0dadecf6 RK |
4352 | #if 0 |
4353 | /* It is no longer clear why we used to do this, but it doesn't | |
4354 | appear to still be needed. So let's try without it since this | |
4355 | code hurts cse'ing widened ops. */ | |
9a5a17f3 | 4356 | /* If source is a paradoxical subreg (such as QI treated as an SI), |
7afe21cc RK |
4357 | treat it as volatile. It may do the work of an SI in one context |
4358 | where the extra bits are not being used, but cannot replace an SI | |
4359 | in general. */ | |
4360 | if (GET_CODE (src) == SUBREG | |
4361 | && (GET_MODE_SIZE (GET_MODE (src)) | |
4362 | > GET_MODE_SIZE (GET_MODE (SUBREG_REG (src))))) | |
4363 | sets[i].src_volatile = 1; | |
0dadecf6 | 4364 | #endif |
7afe21cc RK |
4365 | |
4366 | /* Locate all possible equivalent forms for SRC. Try to replace | |
4367 | SRC in the insn with each cheaper equivalent. | |
4368 | ||
4369 | We have the following types of equivalents: SRC itself, a folded | |
4370 | version, a value given in a REG_EQUAL note, or a value related | |
4371 | to a constant. | |
4372 | ||
4373 | Each of these equivalents may be part of an additional class | |
4374 | of equivalents (if more than one is in the table, they must be in | |
4375 | the same class; we check for this). | |
4376 | ||
4377 | If the source is volatile, we don't do any table lookups. | |
4378 | ||
4379 | We note any constant equivalent for possible later use in a | |
4380 | REG_NOTE. */ | |
4381 | ||
4382 | if (!sets[i].src_volatile) | |
2197a88a | 4383 | elt = lookup (src, sets[i].src_hash, mode); |
7afe21cc RK |
4384 | |
4385 | sets[i].src_elt = elt; | |
4386 | ||
4387 | if (elt && src_eqv_here && src_eqv_elt) | |
278a83b2 KH |
4388 | { |
4389 | if (elt->first_same_value != src_eqv_elt->first_same_value) | |
7afe21cc RK |
4390 | { |
4391 | /* The REG_EQUAL is indicating that two formerly distinct | |
4392 | classes are now equivalent. So merge them. */ | |
4393 | merge_equiv_classes (elt, src_eqv_elt); | |
2197a88a RK |
4394 | src_eqv_hash = HASH (src_eqv, elt->mode); |
4395 | src_eqv_elt = lookup (src_eqv, src_eqv_hash, elt->mode); | |
7afe21cc RK |
4396 | } |
4397 | ||
278a83b2 KH |
4398 | src_eqv_here = 0; |
4399 | } | |
7afe21cc RK |
4400 | |
4401 | else if (src_eqv_elt) | |
278a83b2 | 4402 | elt = src_eqv_elt; |
7afe21cc RK |
4403 | |
4404 | /* Try to find a constant somewhere and record it in `src_const'. | |
4405 | Record its table element, if any, in `src_const_elt'. Look in | |
4406 | any known equivalences first. (If the constant is not in the | |
2197a88a | 4407 | table, also set `sets[i].src_const_hash'). */ |
7afe21cc | 4408 | if (elt) |
278a83b2 | 4409 | for (p = elt->first_same_value; p; p = p->next_same_value) |
7afe21cc RK |
4410 | if (p->is_const) |
4411 | { | |
4412 | src_const = p->exp; | |
4413 | src_const_elt = elt; | |
4414 | break; | |
4415 | } | |
4416 | ||
4417 | if (src_const == 0 | |
4418 | && (CONSTANT_P (src_folded) | |
278a83b2 | 4419 | /* Consider (minus (label_ref L1) (label_ref L2)) as |
7afe21cc RK |
4420 | "constant" here so we will record it. This allows us |
4421 | to fold switch statements when an ADDR_DIFF_VEC is used. */ | |
4422 | || (GET_CODE (src_folded) == MINUS | |
4423 | && GET_CODE (XEXP (src_folded, 0)) == LABEL_REF | |
4424 | && GET_CODE (XEXP (src_folded, 1)) == LABEL_REF))) | |
4425 | src_const = src_folded, src_const_elt = elt; | |
4426 | else if (src_const == 0 && src_eqv_here && CONSTANT_P (src_eqv_here)) | |
4427 | src_const = src_eqv_here, src_const_elt = src_eqv_elt; | |
4428 | ||
4429 | /* If we don't know if the constant is in the table, get its | |
4430 | hash code and look it up. */ | |
4431 | if (src_const && src_const_elt == 0) | |
4432 | { | |
2197a88a RK |
4433 | sets[i].src_const_hash = HASH (src_const, mode); |
4434 | src_const_elt = lookup (src_const, sets[i].src_const_hash, mode); | |
7afe21cc RK |
4435 | } |
4436 | ||
4437 | sets[i].src_const = src_const; | |
4438 | sets[i].src_const_elt = src_const_elt; | |
4439 | ||
4440 | /* If the constant and our source are both in the table, mark them as | |
4441 | equivalent. Otherwise, if a constant is in the table but the source | |
4442 | isn't, set ELT to it. */ | |
4443 | if (src_const_elt && elt | |
4444 | && src_const_elt->first_same_value != elt->first_same_value) | |
4445 | merge_equiv_classes (elt, src_const_elt); | |
4446 | else if (src_const_elt && elt == 0) | |
4447 | elt = src_const_elt; | |
4448 | ||
4449 | /* See if there is a register linearly related to a constant | |
4450 | equivalent of SRC. */ | |
4451 | if (src_const | |
4452 | && (GET_CODE (src_const) == CONST | |
4453 | || (src_const_elt && src_const_elt->related_value != 0))) | |
278a83b2 KH |
4454 | { |
4455 | src_related = use_related_value (src_const, src_const_elt); | |
4456 | if (src_related) | |
4457 | { | |
7afe21cc | 4458 | struct table_elt *src_related_elt |
278a83b2 | 4459 | = lookup (src_related, HASH (src_related, mode), mode); |
7afe21cc | 4460 | if (src_related_elt && elt) |
278a83b2 | 4461 | { |
7afe21cc RK |
4462 | if (elt->first_same_value |
4463 | != src_related_elt->first_same_value) | |
278a83b2 | 4464 | /* This can occur when we previously saw a CONST |
7afe21cc RK |
4465 | involving a SYMBOL_REF and then see the SYMBOL_REF |
4466 | twice. Merge the involved classes. */ | |
4467 | merge_equiv_classes (elt, src_related_elt); | |
4468 | ||
278a83b2 | 4469 | src_related = 0; |
7afe21cc | 4470 | src_related_elt = 0; |
278a83b2 KH |
4471 | } |
4472 | else if (src_related_elt && elt == 0) | |
4473 | elt = src_related_elt; | |
7afe21cc | 4474 | } |
278a83b2 | 4475 | } |
7afe21cc | 4476 | |
e4600702 RK |
4477 | /* See if we have a CONST_INT that is already in a register in a |
4478 | wider mode. */ | |
4479 | ||
4480 | if (src_const && src_related == 0 && GET_CODE (src_const) == CONST_INT | |
4481 | && GET_MODE_CLASS (mode) == MODE_INT | |
4482 | && GET_MODE_BITSIZE (mode) < BITS_PER_WORD) | |
4483 | { | |
4484 | enum machine_mode wider_mode; | |
4485 | ||
4486 | for (wider_mode = GET_MODE_WIDER_MODE (mode); | |
4487 | GET_MODE_BITSIZE (wider_mode) <= BITS_PER_WORD | |
4488 | && src_related == 0; | |
4489 | wider_mode = GET_MODE_WIDER_MODE (wider_mode)) | |
4490 | { | |
4491 | struct table_elt *const_elt | |
4492 | = lookup (src_const, HASH (src_const, wider_mode), wider_mode); | |
4493 | ||
4494 | if (const_elt == 0) | |
4495 | continue; | |
4496 | ||
4497 | for (const_elt = const_elt->first_same_value; | |
4498 | const_elt; const_elt = const_elt->next_same_value) | |
f8cfc6aa | 4499 | if (REG_P (const_elt->exp)) |
e4600702 | 4500 | { |
73ca11ed | 4501 | src_related = gen_lowpart (mode, const_elt->exp); |
e4600702 RK |
4502 | break; |
4503 | } | |
4504 | } | |
4505 | } | |
4506 | ||
d45cf215 RS |
4507 | /* Another possibility is that we have an AND with a constant in |
4508 | a mode narrower than a word. If so, it might have been generated | |
4509 | as part of an "if" which would narrow the AND. If we already | |
4510 | have done the AND in a wider mode, we can use a SUBREG of that | |
4511 | value. */ | |
4512 | ||
4513 | if (flag_expensive_optimizations && ! src_related | |
4514 | && GET_CODE (src) == AND && GET_CODE (XEXP (src, 1)) == CONST_INT | |
4515 | && GET_MODE_SIZE (mode) < UNITS_PER_WORD) | |
4516 | { | |
4517 | enum machine_mode tmode; | |
38a448ca | 4518 | rtx new_and = gen_rtx_AND (VOIDmode, NULL_RTX, XEXP (src, 1)); |
d45cf215 RS |
4519 | |
4520 | for (tmode = GET_MODE_WIDER_MODE (mode); | |
4521 | GET_MODE_SIZE (tmode) <= UNITS_PER_WORD; | |
4522 | tmode = GET_MODE_WIDER_MODE (tmode)) | |
4523 | { | |
4de249d9 | 4524 | rtx inner = gen_lowpart (tmode, XEXP (src, 0)); |
d45cf215 RS |
4525 | struct table_elt *larger_elt; |
4526 | ||
4527 | if (inner) | |
4528 | { | |
4529 | PUT_MODE (new_and, tmode); | |
4530 | XEXP (new_and, 0) = inner; | |
4531 | larger_elt = lookup (new_and, HASH (new_and, tmode), tmode); | |
4532 | if (larger_elt == 0) | |
4533 | continue; | |
4534 | ||
4535 | for (larger_elt = larger_elt->first_same_value; | |
4536 | larger_elt; larger_elt = larger_elt->next_same_value) | |
f8cfc6aa | 4537 | if (REG_P (larger_elt->exp)) |
d45cf215 RS |
4538 | { |
4539 | src_related | |
4de249d9 | 4540 | = gen_lowpart (mode, larger_elt->exp); |
d45cf215 RS |
4541 | break; |
4542 | } | |
4543 | ||
4544 | if (src_related) | |
4545 | break; | |
4546 | } | |
4547 | } | |
4548 | } | |
7bac1be0 RK |
4549 | |
4550 | #ifdef LOAD_EXTEND_OP | |
4551 | /* See if a MEM has already been loaded with a widening operation; | |
4552 | if it has, we can use a subreg of that. Many CISC machines | |
4553 | also have such operations, but this is only likely to be | |
71cc389b | 4554 | beneficial on these machines. */ |
278a83b2 | 4555 | |
ddc356e8 | 4556 | if (flag_expensive_optimizations && src_related == 0 |
7bac1be0 RK |
4557 | && (GET_MODE_SIZE (mode) < UNITS_PER_WORD) |
4558 | && GET_MODE_CLASS (mode) == MODE_INT | |
3c0cb5de | 4559 | && MEM_P (src) && ! do_not_record |
f822d252 | 4560 | && LOAD_EXTEND_OP (mode) != UNKNOWN) |
7bac1be0 | 4561 | { |
9d80ef7c RH |
4562 | struct rtx_def memory_extend_buf; |
4563 | rtx memory_extend_rtx = &memory_extend_buf; | |
7bac1be0 | 4564 | enum machine_mode tmode; |
278a83b2 | 4565 | |
7bac1be0 RK |
4566 | /* Set what we are trying to extend and the operation it might |
4567 | have been extended with. */ | |
9d80ef7c | 4568 | memset (memory_extend_rtx, 0, sizeof(*memory_extend_rtx)); |
7bac1be0 RK |
4569 | PUT_CODE (memory_extend_rtx, LOAD_EXTEND_OP (mode)); |
4570 | XEXP (memory_extend_rtx, 0) = src; | |
278a83b2 | 4571 | |
7bac1be0 RK |
4572 | for (tmode = GET_MODE_WIDER_MODE (mode); |
4573 | GET_MODE_SIZE (tmode) <= UNITS_PER_WORD; | |
4574 | tmode = GET_MODE_WIDER_MODE (tmode)) | |
4575 | { | |
4576 | struct table_elt *larger_elt; | |
278a83b2 | 4577 | |
7bac1be0 | 4578 | PUT_MODE (memory_extend_rtx, tmode); |
278a83b2 | 4579 | larger_elt = lookup (memory_extend_rtx, |
7bac1be0 RK |
4580 | HASH (memory_extend_rtx, tmode), tmode); |
4581 | if (larger_elt == 0) | |
4582 | continue; | |
278a83b2 | 4583 | |
7bac1be0 RK |
4584 | for (larger_elt = larger_elt->first_same_value; |
4585 | larger_elt; larger_elt = larger_elt->next_same_value) | |
f8cfc6aa | 4586 | if (REG_P (larger_elt->exp)) |
7bac1be0 | 4587 | { |
73ca11ed | 4588 | src_related = gen_lowpart (mode, larger_elt->exp); |
7bac1be0 RK |
4589 | break; |
4590 | } | |
278a83b2 | 4591 | |
7bac1be0 RK |
4592 | if (src_related) |
4593 | break; | |
4594 | } | |
4595 | } | |
4596 | #endif /* LOAD_EXTEND_OP */ | |
278a83b2 | 4597 | |
7afe21cc | 4598 | if (src == src_folded) |
278a83b2 | 4599 | src_folded = 0; |
7afe21cc | 4600 | |
da7d8304 | 4601 | /* At this point, ELT, if nonzero, points to a class of expressions |
7afe21cc | 4602 | equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED, |
da7d8304 | 4603 | and SRC_RELATED, if nonzero, each contain additional equivalent |
7afe21cc RK |
4604 | expressions. Prune these latter expressions by deleting expressions |
4605 | already in the equivalence class. | |
4606 | ||
4607 | Check for an equivalent identical to the destination. If found, | |
4608 | this is the preferred equivalent since it will likely lead to | |
4609 | elimination of the insn. Indicate this by placing it in | |
4610 | `src_related'. */ | |
4611 | ||
278a83b2 KH |
4612 | if (elt) |
4613 | elt = elt->first_same_value; | |
7afe21cc | 4614 | for (p = elt; p; p = p->next_same_value) |
278a83b2 | 4615 | { |
7afe21cc RK |
4616 | enum rtx_code code = GET_CODE (p->exp); |
4617 | ||
4618 | /* If the expression is not valid, ignore it. Then we do not | |
4619 | have to check for validity below. In most cases, we can use | |
4620 | `rtx_equal_p', since canonicalization has already been done. */ | |
0516f6fe | 4621 | if (code != REG && ! exp_equiv_p (p->exp, p->exp, 1, false)) |
7afe21cc RK |
4622 | continue; |
4623 | ||
5a03c8c4 RK |
4624 | /* Also skip paradoxical subregs, unless that's what we're |
4625 | looking for. */ | |
4626 | if (code == SUBREG | |
4627 | && (GET_MODE_SIZE (GET_MODE (p->exp)) | |
4628 | > GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp)))) | |
4629 | && ! (src != 0 | |
4630 | && GET_CODE (src) == SUBREG | |
4631 | && GET_MODE (src) == GET_MODE (p->exp) | |
4632 | && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src))) | |
4633 | < GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp)))))) | |
4634 | continue; | |
4635 | ||
278a83b2 | 4636 | if (src && GET_CODE (src) == code && rtx_equal_p (src, p->exp)) |
7afe21cc | 4637 | src = 0; |
278a83b2 | 4638 | else if (src_folded && GET_CODE (src_folded) == code |
7afe21cc RK |
4639 | && rtx_equal_p (src_folded, p->exp)) |
4640 | src_folded = 0; | |
278a83b2 | 4641 | else if (src_eqv_here && GET_CODE (src_eqv_here) == code |
7afe21cc RK |
4642 | && rtx_equal_p (src_eqv_here, p->exp)) |
4643 | src_eqv_here = 0; | |
278a83b2 | 4644 | else if (src_related && GET_CODE (src_related) == code |
7afe21cc RK |
4645 | && rtx_equal_p (src_related, p->exp)) |
4646 | src_related = 0; | |
4647 | ||
4648 | /* This is the same as the destination of the insns, we want | |
4649 | to prefer it. Copy it to src_related. The code below will | |
4650 | then give it a negative cost. */ | |
4651 | if (GET_CODE (dest) == code && rtx_equal_p (p->exp, dest)) | |
4652 | src_related = dest; | |
278a83b2 | 4653 | } |
7afe21cc RK |
4654 | |
4655 | /* Find the cheapest valid equivalent, trying all the available | |
4656 | possibilities. Prefer items not in the hash table to ones | |
4657 | that are when they are equal cost. Note that we can never | |
4658 | worsen an insn as the current contents will also succeed. | |
05c33dd8 | 4659 | If we find an equivalent identical to the destination, use it as best, |
0f41302f | 4660 | since this insn will probably be eliminated in that case. */ |
7afe21cc RK |
4661 | if (src) |
4662 | { | |
4663 | if (rtx_equal_p (src, dest)) | |
f1c1dfc3 | 4664 | src_cost = src_regcost = -1; |
7afe21cc | 4665 | else |
630c79be BS |
4666 | { |
4667 | src_cost = COST (src); | |
4668 | src_regcost = approx_reg_cost (src); | |
4669 | } | |
7afe21cc RK |
4670 | } |
4671 | ||
4672 | if (src_eqv_here) | |
4673 | { | |
4674 | if (rtx_equal_p (src_eqv_here, dest)) | |
f1c1dfc3 | 4675 | src_eqv_cost = src_eqv_regcost = -1; |
7afe21cc | 4676 | else |
630c79be BS |
4677 | { |
4678 | src_eqv_cost = COST (src_eqv_here); | |
4679 | src_eqv_regcost = approx_reg_cost (src_eqv_here); | |
4680 | } | |
7afe21cc RK |
4681 | } |
4682 | ||
4683 | if (src_folded) | |
4684 | { | |
4685 | if (rtx_equal_p (src_folded, dest)) | |
f1c1dfc3 | 4686 | src_folded_cost = src_folded_regcost = -1; |
7afe21cc | 4687 | else |
630c79be BS |
4688 | { |
4689 | src_folded_cost = COST (src_folded); | |
4690 | src_folded_regcost = approx_reg_cost (src_folded); | |
4691 | } | |
7afe21cc RK |
4692 | } |
4693 | ||
4694 | if (src_related) | |
4695 | { | |
4696 | if (rtx_equal_p (src_related, dest)) | |
f1c1dfc3 | 4697 | src_related_cost = src_related_regcost = -1; |
7afe21cc | 4698 | else |
630c79be BS |
4699 | { |
4700 | src_related_cost = COST (src_related); | |
4701 | src_related_regcost = approx_reg_cost (src_related); | |
4702 | } | |
7afe21cc RK |
4703 | } |
4704 | ||
4705 | /* If this was an indirect jump insn, a known label will really be | |
4706 | cheaper even though it looks more expensive. */ | |
4707 | if (dest == pc_rtx && src_const && GET_CODE (src_const) == LABEL_REF) | |
99a9c946 | 4708 | src_folded = src_const, src_folded_cost = src_folded_regcost = -1; |
278a83b2 | 4709 | |
7afe21cc RK |
4710 | /* Terminate loop when replacement made. This must terminate since |
4711 | the current contents will be tested and will always be valid. */ | |
4712 | while (1) | |
278a83b2 KH |
4713 | { |
4714 | rtx trial; | |
7afe21cc | 4715 | |
278a83b2 | 4716 | /* Skip invalid entries. */ |
f8cfc6aa | 4717 | while (elt && !REG_P (elt->exp) |
0516f6fe | 4718 | && ! exp_equiv_p (elt->exp, elt->exp, 1, false)) |
278a83b2 | 4719 | elt = elt->next_same_value; |
5a03c8c4 RK |
4720 | |
4721 | /* A paradoxical subreg would be bad here: it'll be the right | |
4722 | size, but later may be adjusted so that the upper bits aren't | |
4723 | what we want. So reject it. */ | |
4724 | if (elt != 0 | |
4725 | && GET_CODE (elt->exp) == SUBREG | |
4726 | && (GET_MODE_SIZE (GET_MODE (elt->exp)) | |
4727 | > GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp)))) | |
4728 | /* It is okay, though, if the rtx we're trying to match | |
4729 | will ignore any of the bits we can't predict. */ | |
4730 | && ! (src != 0 | |
4731 | && GET_CODE (src) == SUBREG | |
4732 | && GET_MODE (src) == GET_MODE (elt->exp) | |
4733 | && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src))) | |
4734 | < GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp)))))) | |
4735 | { | |
4736 | elt = elt->next_same_value; | |
4737 | continue; | |
4738 | } | |
278a83b2 | 4739 | |
68252e27 | 4740 | if (elt) |
630c79be BS |
4741 | { |
4742 | src_elt_cost = elt->cost; | |
4743 | src_elt_regcost = elt->regcost; | |
4744 | } | |
7afe21cc | 4745 | |
68252e27 | 4746 | /* Find cheapest and skip it for the next time. For items |
7afe21cc RK |
4747 | of equal cost, use this order: |
4748 | src_folded, src, src_eqv, src_related and hash table entry. */ | |
99a9c946 | 4749 | if (src_folded |
56ae04af KH |
4750 | && preferable (src_folded_cost, src_folded_regcost, |
4751 | src_cost, src_regcost) <= 0 | |
4752 | && preferable (src_folded_cost, src_folded_regcost, | |
4753 | src_eqv_cost, src_eqv_regcost) <= 0 | |
4754 | && preferable (src_folded_cost, src_folded_regcost, | |
4755 | src_related_cost, src_related_regcost) <= 0 | |
4756 | && preferable (src_folded_cost, src_folded_regcost, | |
4757 | src_elt_cost, src_elt_regcost) <= 0) | |
7afe21cc | 4758 | { |
f1c1dfc3 | 4759 | trial = src_folded, src_folded_cost = MAX_COST; |
7afe21cc | 4760 | if (src_folded_force_flag) |
9d8de1de EB |
4761 | { |
4762 | rtx forced = force_const_mem (mode, trial); | |
4763 | if (forced) | |
4764 | trial = forced; | |
4765 | } | |
7afe21cc | 4766 | } |
99a9c946 | 4767 | else if (src |
56ae04af KH |
4768 | && preferable (src_cost, src_regcost, |
4769 | src_eqv_cost, src_eqv_regcost) <= 0 | |
4770 | && preferable (src_cost, src_regcost, | |
4771 | src_related_cost, src_related_regcost) <= 0 | |
4772 | && preferable (src_cost, src_regcost, | |
4773 | src_elt_cost, src_elt_regcost) <= 0) | |
f1c1dfc3 | 4774 | trial = src, src_cost = MAX_COST; |
99a9c946 | 4775 | else if (src_eqv_here |
56ae04af KH |
4776 | && preferable (src_eqv_cost, src_eqv_regcost, |
4777 | src_related_cost, src_related_regcost) <= 0 | |
4778 | && preferable (src_eqv_cost, src_eqv_regcost, | |
4779 | src_elt_cost, src_elt_regcost) <= 0) | |
f1c1dfc3 | 4780 | trial = copy_rtx (src_eqv_here), src_eqv_cost = MAX_COST; |
99a9c946 | 4781 | else if (src_related |
56ae04af KH |
4782 | && preferable (src_related_cost, src_related_regcost, |
4783 | src_elt_cost, src_elt_regcost) <= 0) | |
68252e27 | 4784 | trial = copy_rtx (src_related), src_related_cost = MAX_COST; |
278a83b2 | 4785 | else |
7afe21cc | 4786 | { |
05c33dd8 | 4787 | trial = copy_rtx (elt->exp); |
7afe21cc | 4788 | elt = elt->next_same_value; |
f1c1dfc3 | 4789 | src_elt_cost = MAX_COST; |
7afe21cc RK |
4790 | } |
4791 | ||
4792 | /* We don't normally have an insn matching (set (pc) (pc)), so | |
4793 | check for this separately here. We will delete such an | |
4794 | insn below. | |
4795 | ||
d466c016 JL |
4796 | For other cases such as a table jump or conditional jump |
4797 | where we know the ultimate target, go ahead and replace the | |
4798 | operand. While that may not make a valid insn, we will | |
4799 | reemit the jump below (and also insert any necessary | |
4800 | barriers). */ | |
7afe21cc RK |
4801 | if (n_sets == 1 && dest == pc_rtx |
4802 | && (trial == pc_rtx | |
4803 | || (GET_CODE (trial) == LABEL_REF | |
4804 | && ! condjump_p (insn)))) | |
4805 | { | |
2f39b6ca UW |
4806 | /* Don't substitute non-local labels, this confuses CFG. */ |
4807 | if (GET_CODE (trial) == LABEL_REF | |
4808 | && LABEL_REF_NONLOCAL_P (trial)) | |
4809 | continue; | |
4810 | ||
d466c016 | 4811 | SET_SRC (sets[i].rtl) = trial; |
602c4c0d | 4812 | cse_jumps_altered = 1; |
7afe21cc RK |
4813 | break; |
4814 | } | |
278a83b2 | 4815 | |
1ef6855c KH |
4816 | /* Reject certain invalid forms of CONST that we create. */ |
4817 | else if (CONSTANT_P (trial) | |
4818 | && GET_CODE (trial) == CONST | |
4819 | /* Reject cases that will cause decode_rtx_const to | |
4820 | die. On the alpha when simplifying a switch, we | |
4821 | get (const (truncate (minus (label_ref) | |
4822 | (label_ref)))). */ | |
4823 | && (GET_CODE (XEXP (trial, 0)) == TRUNCATE | |
4824 | /* Likewise on IA-64, except without the | |
4825 | truncate. */ | |
4826 | || (GET_CODE (XEXP (trial, 0)) == MINUS | |
4827 | && GET_CODE (XEXP (XEXP (trial, 0), 0)) == LABEL_REF | |
4828 | && GET_CODE (XEXP (XEXP (trial, 0), 1)) == LABEL_REF))) | |
4829 | /* Do nothing for this case. */ | |
4830 | ; | |
4831 | ||
7afe21cc | 4832 | /* Look for a substitution that makes a valid insn. */ |
ddc356e8 | 4833 | else if (validate_change (insn, &SET_SRC (sets[i].rtl), trial, 0)) |
05c33dd8 | 4834 | { |
dbaff908 RS |
4835 | rtx new = canon_reg (SET_SRC (sets[i].rtl), insn); |
4836 | ||
7bd8b2a8 JL |
4837 | /* If we just made a substitution inside a libcall, then we |
4838 | need to make the same substitution in any notes attached | |
4839 | to the RETVAL insn. */ | |
1ed0205e | 4840 | if (libcall_insn |
f8cfc6aa | 4841 | && (REG_P (sets[i].orig_src) |
47841d1b | 4842 | || GET_CODE (sets[i].orig_src) == SUBREG |
3c0cb5de | 4843 | || MEM_P (sets[i].orig_src))) |
d8b7ec41 RS |
4844 | { |
4845 | rtx note = find_reg_equal_equiv_note (libcall_insn); | |
4846 | if (note != 0) | |
4847 | XEXP (note, 0) = simplify_replace_rtx (XEXP (note, 0), | |
4848 | sets[i].orig_src, | |
4849 | copy_rtx (new)); | |
4850 | } | |
7bd8b2a8 | 4851 | |
7722328e RK |
4852 | /* The result of apply_change_group can be ignored; see |
4853 | canon_reg. */ | |
4854 | ||
dbaff908 | 4855 | validate_change (insn, &SET_SRC (sets[i].rtl), new, 1); |
6702af89 | 4856 | apply_change_group (); |
932ad4d9 | 4857 | |
05c33dd8 RK |
4858 | break; |
4859 | } | |
7afe21cc | 4860 | |
278a83b2 | 4861 | /* If we previously found constant pool entries for |
7afe21cc RK |
4862 | constants and this is a constant, try making a |
4863 | pool entry. Put it in src_folded unless we already have done | |
4864 | this since that is where it likely came from. */ | |
4865 | ||
4866 | else if (constant_pool_entries_cost | |
4867 | && CONSTANT_P (trial) | |
1bbd065b | 4868 | && (src_folded == 0 |
3c0cb5de | 4869 | || (!MEM_P (src_folded) |
1bbd065b | 4870 | && ! src_folded_force_flag)) |
9ae8ffe7 JL |
4871 | && GET_MODE_CLASS (mode) != MODE_CC |
4872 | && mode != VOIDmode) | |
7afe21cc RK |
4873 | { |
4874 | src_folded_force_flag = 1; | |
4875 | src_folded = trial; | |
4876 | src_folded_cost = constant_pool_entries_cost; | |
dd0ba281 | 4877 | src_folded_regcost = constant_pool_entries_regcost; |
7afe21cc | 4878 | } |
278a83b2 | 4879 | } |
7afe21cc RK |
4880 | |
4881 | src = SET_SRC (sets[i].rtl); | |
4882 | ||
4883 | /* In general, it is good to have a SET with SET_SRC == SET_DEST. | |
4884 | However, there is an important exception: If both are registers | |
4885 | that are not the head of their equivalence class, replace SET_SRC | |
4886 | with the head of the class. If we do not do this, we will have | |
4887 | both registers live over a portion of the basic block. This way, | |
4888 | their lifetimes will likely abut instead of overlapping. */ | |
f8cfc6aa | 4889 | if (REG_P (dest) |
1bb98cec | 4890 | && REGNO_QTY_VALID_P (REGNO (dest))) |
7afe21cc | 4891 | { |
1bb98cec DM |
4892 | int dest_q = REG_QTY (REGNO (dest)); |
4893 | struct qty_table_elem *dest_ent = &qty_table[dest_q]; | |
4894 | ||
4895 | if (dest_ent->mode == GET_MODE (dest) | |
4896 | && dest_ent->first_reg != REGNO (dest) | |
f8cfc6aa | 4897 | && REG_P (src) && REGNO (src) == REGNO (dest) |
1bb98cec DM |
4898 | /* Don't do this if the original insn had a hard reg as |
4899 | SET_SRC or SET_DEST. */ | |
f8cfc6aa | 4900 | && (!REG_P (sets[i].src) |
1bb98cec | 4901 | || REGNO (sets[i].src) >= FIRST_PSEUDO_REGISTER) |
f8cfc6aa | 4902 | && (!REG_P (dest) || REGNO (dest) >= FIRST_PSEUDO_REGISTER)) |
1bb98cec DM |
4903 | /* We can't call canon_reg here because it won't do anything if |
4904 | SRC is a hard register. */ | |
759bd8b7 | 4905 | { |
1bb98cec DM |
4906 | int src_q = REG_QTY (REGNO (src)); |
4907 | struct qty_table_elem *src_ent = &qty_table[src_q]; | |
4908 | int first = src_ent->first_reg; | |
4909 | rtx new_src | |
4910 | = (first >= FIRST_PSEUDO_REGISTER | |
4911 | ? regno_reg_rtx[first] : gen_rtx_REG (GET_MODE (src), first)); | |
4912 | ||
4913 | /* We must use validate-change even for this, because this | |
4914 | might be a special no-op instruction, suitable only to | |
4915 | tag notes onto. */ | |
4916 | if (validate_change (insn, &SET_SRC (sets[i].rtl), new_src, 0)) | |
4917 | { | |
4918 | src = new_src; | |
4919 | /* If we had a constant that is cheaper than what we are now | |
4920 | setting SRC to, use that constant. We ignored it when we | |
4921 | thought we could make this into a no-op. */ | |
4922 | if (src_const && COST (src_const) < COST (src) | |
278a83b2 KH |
4923 | && validate_change (insn, &SET_SRC (sets[i].rtl), |
4924 | src_const, 0)) | |
1bb98cec DM |
4925 | src = src_const; |
4926 | } | |
759bd8b7 | 4927 | } |
7afe21cc RK |
4928 | } |
4929 | ||
4930 | /* If we made a change, recompute SRC values. */ | |
4931 | if (src != sets[i].src) | |
278a83b2 | 4932 | { |
278a83b2 KH |
4933 | do_not_record = 0; |
4934 | hash_arg_in_memory = 0; | |
7afe21cc | 4935 | sets[i].src = src; |
278a83b2 KH |
4936 | sets[i].src_hash = HASH (src, mode); |
4937 | sets[i].src_volatile = do_not_record; | |
4938 | sets[i].src_in_memory = hash_arg_in_memory; | |
4939 | sets[i].src_elt = lookup (src, sets[i].src_hash, mode); | |
4940 | } | |
7afe21cc RK |
4941 | |
4942 | /* If this is a single SET, we are setting a register, and we have an | |
4943 | equivalent constant, we want to add a REG_NOTE. We don't want | |
4944 | to write a REG_EQUAL note for a constant pseudo since verifying that | |
d45cf215 | 4945 | that pseudo hasn't been eliminated is a pain. Such a note also |
278a83b2 | 4946 | won't help anything. |
ac7ef8d5 FS |
4947 | |
4948 | Avoid a REG_EQUAL note for (CONST (MINUS (LABEL_REF) (LABEL_REF))) | |
4949 | which can be created for a reference to a compile time computable | |
4950 | entry in a jump table. */ | |
4951 | ||
f8cfc6aa JQ |
4952 | if (n_sets == 1 && src_const && REG_P (dest) |
4953 | && !REG_P (src_const) | |
ac7ef8d5 FS |
4954 | && ! (GET_CODE (src_const) == CONST |
4955 | && GET_CODE (XEXP (src_const, 0)) == MINUS | |
4956 | && GET_CODE (XEXP (XEXP (src_const, 0), 0)) == LABEL_REF | |
4957 | && GET_CODE (XEXP (XEXP (src_const, 0), 1)) == LABEL_REF)) | |
7afe21cc | 4958 | { |
a77b7e32 RS |
4959 | /* We only want a REG_EQUAL note if src_const != src. */ |
4960 | if (! rtx_equal_p (src, src_const)) | |
4961 | { | |
4962 | /* Make sure that the rtx is not shared. */ | |
4963 | src_const = copy_rtx (src_const); | |
51e2a951 | 4964 | |
a77b7e32 RS |
4965 | /* Record the actual constant value in a REG_EQUAL note, |
4966 | making a new one if one does not already exist. */ | |
4967 | set_unique_reg_note (insn, REG_EQUAL, src_const); | |
4968 | } | |
7afe21cc RK |
4969 | } |
4970 | ||
4971 | /* Now deal with the destination. */ | |
4972 | do_not_record = 0; | |
7afe21cc | 4973 | |
46d096a3 SB |
4974 | /* Look within any ZERO_EXTRACT to the MEM or REG within it. */ |
4975 | while (GET_CODE (dest) == SUBREG | |
7afe21cc | 4976 | || GET_CODE (dest) == ZERO_EXTRACT |
7afe21cc | 4977 | || GET_CODE (dest) == STRICT_LOW_PART) |
0339ce7e | 4978 | dest = XEXP (dest, 0); |
7afe21cc RK |
4979 | |
4980 | sets[i].inner_dest = dest; | |
4981 | ||
3c0cb5de | 4982 | if (MEM_P (dest)) |
7afe21cc | 4983 | { |
9ae8ffe7 JL |
4984 | #ifdef PUSH_ROUNDING |
4985 | /* Stack pushes invalidate the stack pointer. */ | |
4986 | rtx addr = XEXP (dest, 0); | |
ec8e098d | 4987 | if (GET_RTX_CLASS (GET_CODE (addr)) == RTX_AUTOINC |
9ae8ffe7 | 4988 | && XEXP (addr, 0) == stack_pointer_rtx) |
524e3576 | 4989 | invalidate (stack_pointer_rtx, VOIDmode); |
9ae8ffe7 | 4990 | #endif |
7afe21cc | 4991 | dest = fold_rtx (dest, insn); |
7afe21cc RK |
4992 | } |
4993 | ||
4994 | /* Compute the hash code of the destination now, | |
4995 | before the effects of this instruction are recorded, | |
4996 | since the register values used in the address computation | |
4997 | are those before this instruction. */ | |
2197a88a | 4998 | sets[i].dest_hash = HASH (dest, mode); |
7afe21cc RK |
4999 | |
5000 | /* Don't enter a bit-field in the hash table | |
5001 | because the value in it after the store | |
5002 | may not equal what was stored, due to truncation. */ | |
5003 | ||
46d096a3 | 5004 | if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT) |
7afe21cc RK |
5005 | { |
5006 | rtx width = XEXP (SET_DEST (sets[i].rtl), 1); | |
5007 | ||
5008 | if (src_const != 0 && GET_CODE (src_const) == CONST_INT | |
5009 | && GET_CODE (width) == CONST_INT | |
906c4e36 RK |
5010 | && INTVAL (width) < HOST_BITS_PER_WIDE_INT |
5011 | && ! (INTVAL (src_const) | |
5012 | & ((HOST_WIDE_INT) (-1) << INTVAL (width)))) | |
7afe21cc RK |
5013 | /* Exception: if the value is constant, |
5014 | and it won't be truncated, record it. */ | |
5015 | ; | |
5016 | else | |
5017 | { | |
5018 | /* This is chosen so that the destination will be invalidated | |
5019 | but no new value will be recorded. | |
5020 | We must invalidate because sometimes constant | |
5021 | values can be recorded for bitfields. */ | |
5022 | sets[i].src_elt = 0; | |
5023 | sets[i].src_volatile = 1; | |
5024 | src_eqv = 0; | |
5025 | src_eqv_elt = 0; | |
5026 | } | |
5027 | } | |
5028 | ||
5029 | /* If only one set in a JUMP_INSN and it is now a no-op, we can delete | |
5030 | the insn. */ | |
5031 | else if (n_sets == 1 && dest == pc_rtx && src == pc_rtx) | |
5032 | { | |
ef178af3 | 5033 | /* One less use of the label this insn used to jump to. */ |
0129d079 | 5034 | delete_insn_and_edges (insn); |
7afe21cc | 5035 | cse_jumps_altered = 1; |
7afe21cc RK |
5036 | /* No more processing for this set. */ |
5037 | sets[i].rtl = 0; | |
5038 | } | |
5039 | ||
5040 | /* If this SET is now setting PC to a label, we know it used to | |
d466c016 | 5041 | be a conditional or computed branch. */ |
8f235343 JH |
5042 | else if (dest == pc_rtx && GET_CODE (src) == LABEL_REF |
5043 | && !LABEL_REF_NONLOCAL_P (src)) | |
7afe21cc | 5044 | { |
8fb1e50e GS |
5045 | /* Now emit a BARRIER after the unconditional jump. */ |
5046 | if (NEXT_INSN (insn) == 0 | |
4b4bf941 | 5047 | || !BARRIER_P (NEXT_INSN (insn))) |
8fb1e50e GS |
5048 | emit_barrier_after (insn); |
5049 | ||
d466c016 JL |
5050 | /* We reemit the jump in as many cases as possible just in |
5051 | case the form of an unconditional jump is significantly | |
5052 | different than a computed jump or conditional jump. | |
5053 | ||
5054 | If this insn has multiple sets, then reemitting the | |
5055 | jump is nontrivial. So instead we just force rerecognition | |
5056 | and hope for the best. */ | |
5057 | if (n_sets == 1) | |
7afe21cc | 5058 | { |
9dcb4381 | 5059 | rtx new, note; |
8fb1e50e | 5060 | |
0129d079 | 5061 | new = emit_jump_insn_before (gen_jump (XEXP (src, 0)), insn); |
7afe21cc RK |
5062 | JUMP_LABEL (new) = XEXP (src, 0); |
5063 | LABEL_NUSES (XEXP (src, 0))++; | |
9dcb4381 RH |
5064 | |
5065 | /* Make sure to copy over REG_NON_LOCAL_GOTO. */ | |
5066 | note = find_reg_note (insn, REG_NON_LOCAL_GOTO, 0); | |
5067 | if (note) | |
5068 | { | |
5069 | XEXP (note, 1) = NULL_RTX; | |
5070 | REG_NOTES (new) = note; | |
5071 | } | |
5072 | ||
0129d079 | 5073 | delete_insn_and_edges (insn); |
7afe21cc | 5074 | insn = new; |
8fb1e50e GS |
5075 | |
5076 | /* Now emit a BARRIER after the unconditional jump. */ | |
5077 | if (NEXT_INSN (insn) == 0 | |
4b4bf941 | 5078 | || !BARRIER_P (NEXT_INSN (insn))) |
8fb1e50e | 5079 | emit_barrier_after (insn); |
7afe21cc | 5080 | } |
31dcf83f | 5081 | else |
31dcf83f | 5082 | INSN_CODE (insn) = -1; |
7afe21cc | 5083 | |
8fb1e50e GS |
5084 | /* Do not bother deleting any unreachable code, |
5085 | let jump/flow do that. */ | |
7afe21cc RK |
5086 | |
5087 | cse_jumps_altered = 1; | |
5088 | sets[i].rtl = 0; | |
5089 | } | |
5090 | ||
c2a47e48 RK |
5091 | /* If destination is volatile, invalidate it and then do no further |
5092 | processing for this assignment. */ | |
7afe21cc RK |
5093 | |
5094 | else if (do_not_record) | |
c2a47e48 | 5095 | { |
f8cfc6aa | 5096 | if (REG_P (dest) || GET_CODE (dest) == SUBREG) |
bb4034b3 | 5097 | invalidate (dest, VOIDmode); |
3c0cb5de | 5098 | else if (MEM_P (dest)) |
32fab725 | 5099 | invalidate (dest, VOIDmode); |
2708da92 RS |
5100 | else if (GET_CODE (dest) == STRICT_LOW_PART |
5101 | || GET_CODE (dest) == ZERO_EXTRACT) | |
bb4034b3 | 5102 | invalidate (XEXP (dest, 0), GET_MODE (dest)); |
c2a47e48 RK |
5103 | sets[i].rtl = 0; |
5104 | } | |
7afe21cc RK |
5105 | |
5106 | if (sets[i].rtl != 0 && dest != SET_DEST (sets[i].rtl)) | |
2197a88a | 5107 | sets[i].dest_hash = HASH (SET_DEST (sets[i].rtl), mode); |
7afe21cc RK |
5108 | |
5109 | #ifdef HAVE_cc0 | |
5110 | /* If setting CC0, record what it was set to, or a constant, if it | |
5111 | is equivalent to a constant. If it is being set to a floating-point | |
5112 | value, make a COMPARE with the appropriate constant of 0. If we | |
5113 | don't do this, later code can interpret this as a test against | |
5114 | const0_rtx, which can cause problems if we try to put it into an | |
5115 | insn as a floating-point operand. */ | |
5116 | if (dest == cc0_rtx) | |
5117 | { | |
5118 | this_insn_cc0 = src_const && mode != VOIDmode ? src_const : src; | |
5119 | this_insn_cc0_mode = mode; | |
cbf6a543 | 5120 | if (FLOAT_MODE_P (mode)) |
38a448ca RH |
5121 | this_insn_cc0 = gen_rtx_COMPARE (VOIDmode, this_insn_cc0, |
5122 | CONST0_RTX (mode)); | |
7afe21cc RK |
5123 | } |
5124 | #endif | |
5125 | } | |
5126 | ||
5127 | /* Now enter all non-volatile source expressions in the hash table | |
5128 | if they are not already present. | |
5129 | Record their equivalence classes in src_elt. | |
5130 | This way we can insert the corresponding destinations into | |
5131 | the same classes even if the actual sources are no longer in them | |
5132 | (having been invalidated). */ | |
5133 | ||
5134 | if (src_eqv && src_eqv_elt == 0 && sets[0].rtl != 0 && ! src_eqv_volatile | |
5135 | && ! rtx_equal_p (src_eqv, SET_DEST (sets[0].rtl))) | |
5136 | { | |
b3694847 SS |
5137 | struct table_elt *elt; |
5138 | struct table_elt *classp = sets[0].src_elt; | |
7afe21cc RK |
5139 | rtx dest = SET_DEST (sets[0].rtl); |
5140 | enum machine_mode eqvmode = GET_MODE (dest); | |
5141 | ||
5142 | if (GET_CODE (dest) == STRICT_LOW_PART) | |
5143 | { | |
5144 | eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0))); | |
5145 | classp = 0; | |
5146 | } | |
5147 | if (insert_regs (src_eqv, classp, 0)) | |
8ae2b8f6 JW |
5148 | { |
5149 | rehash_using_reg (src_eqv); | |
5150 | src_eqv_hash = HASH (src_eqv, eqvmode); | |
5151 | } | |
2197a88a | 5152 | elt = insert (src_eqv, classp, src_eqv_hash, eqvmode); |
7afe21cc | 5153 | elt->in_memory = src_eqv_in_memory; |
7afe21cc | 5154 | src_eqv_elt = elt; |
f7911249 JW |
5155 | |
5156 | /* Check to see if src_eqv_elt is the same as a set source which | |
5157 | does not yet have an elt, and if so set the elt of the set source | |
5158 | to src_eqv_elt. */ | |
5159 | for (i = 0; i < n_sets; i++) | |
26132f71 JW |
5160 | if (sets[i].rtl && sets[i].src_elt == 0 |
5161 | && rtx_equal_p (SET_SRC (sets[i].rtl), src_eqv)) | |
f7911249 | 5162 | sets[i].src_elt = src_eqv_elt; |
7afe21cc RK |
5163 | } |
5164 | ||
5165 | for (i = 0; i < n_sets; i++) | |
5166 | if (sets[i].rtl && ! sets[i].src_volatile | |
5167 | && ! rtx_equal_p (SET_SRC (sets[i].rtl), SET_DEST (sets[i].rtl))) | |
5168 | { | |
5169 | if (GET_CODE (SET_DEST (sets[i].rtl)) == STRICT_LOW_PART) | |
5170 | { | |
5171 | /* REG_EQUAL in setting a STRICT_LOW_PART | |
5172 | gives an equivalent for the entire destination register, | |
5173 | not just for the subreg being stored in now. | |
5174 | This is a more interesting equivalence, so we arrange later | |
5175 | to treat the entire reg as the destination. */ | |
5176 | sets[i].src_elt = src_eqv_elt; | |
2197a88a | 5177 | sets[i].src_hash = src_eqv_hash; |
7afe21cc RK |
5178 | } |
5179 | else | |
5180 | { | |
5181 | /* Insert source and constant equivalent into hash table, if not | |
5182 | already present. */ | |
b3694847 SS |
5183 | struct table_elt *classp = src_eqv_elt; |
5184 | rtx src = sets[i].src; | |
5185 | rtx dest = SET_DEST (sets[i].rtl); | |
7afe21cc RK |
5186 | enum machine_mode mode |
5187 | = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src); | |
5188 | ||
1fcc57f1 AM |
5189 | /* It's possible that we have a source value known to be |
5190 | constant but don't have a REG_EQUAL note on the insn. | |
5191 | Lack of a note will mean src_eqv_elt will be NULL. This | |
5192 | can happen where we've generated a SUBREG to access a | |
5193 | CONST_INT that is already in a register in a wider mode. | |
5194 | Ensure that the source expression is put in the proper | |
5195 | constant class. */ | |
5196 | if (!classp) | |
5197 | classp = sets[i].src_const_elt; | |
5198 | ||
26132f71 | 5199 | if (sets[i].src_elt == 0) |
7afe21cc | 5200 | { |
26132f71 JW |
5201 | /* Don't put a hard register source into the table if this is |
5202 | the last insn of a libcall. In this case, we only need | |
5203 | to put src_eqv_elt in src_elt. */ | |
db4a8254 | 5204 | if (! find_reg_note (insn, REG_RETVAL, NULL_RTX)) |
8ae2b8f6 | 5205 | { |
b3694847 | 5206 | struct table_elt *elt; |
26132f71 JW |
5207 | |
5208 | /* Note that these insert_regs calls cannot remove | |
5209 | any of the src_elt's, because they would have failed to | |
5210 | match if not still valid. */ | |
5211 | if (insert_regs (src, classp, 0)) | |
5212 | { | |
5213 | rehash_using_reg (src); | |
5214 | sets[i].src_hash = HASH (src, mode); | |
5215 | } | |
5216 | elt = insert (src, classp, sets[i].src_hash, mode); | |
5217 | elt->in_memory = sets[i].src_in_memory; | |
26132f71 | 5218 | sets[i].src_elt = classp = elt; |
8ae2b8f6 | 5219 | } |
26132f71 JW |
5220 | else |
5221 | sets[i].src_elt = classp; | |
7afe21cc | 5222 | } |
7afe21cc RK |
5223 | if (sets[i].src_const && sets[i].src_const_elt == 0 |
5224 | && src != sets[i].src_const | |
5225 | && ! rtx_equal_p (sets[i].src_const, src)) | |
5226 | sets[i].src_elt = insert (sets[i].src_const, classp, | |
2197a88a | 5227 | sets[i].src_const_hash, mode); |
7afe21cc RK |
5228 | } |
5229 | } | |
5230 | else if (sets[i].src_elt == 0) | |
5231 | /* If we did not insert the source into the hash table (e.g., it was | |
5232 | volatile), note the equivalence class for the REG_EQUAL value, if any, | |
5233 | so that the destination goes into that class. */ | |
5234 | sets[i].src_elt = src_eqv_elt; | |
5235 | ||
05c433f3 PB |
5236 | /* Record destination addresses in the hash table. This allows us to |
5237 | check if they are invalidated by other sets. */ | |
5238 | for (i = 0; i < n_sets; i++) | |
5239 | { | |
5240 | if (sets[i].rtl) | |
5241 | { | |
5242 | rtx x = sets[i].inner_dest; | |
5243 | struct table_elt *elt; | |
5244 | enum machine_mode mode; | |
5245 | unsigned hash; | |
5246 | ||
5247 | if (MEM_P (x)) | |
5248 | { | |
5249 | x = XEXP (x, 0); | |
5250 | mode = GET_MODE (x); | |
5251 | hash = HASH (x, mode); | |
5252 | elt = lookup (x, hash, mode); | |
5253 | if (!elt) | |
5254 | { | |
5255 | if (insert_regs (x, NULL, 0)) | |
5256 | { | |
5257 | rehash_using_reg (x); | |
5258 | hash = HASH (x, mode); | |
5259 | } | |
5260 | elt = insert (x, NULL, hash, mode); | |
5261 | } | |
5262 | ||
5263 | sets[i].dest_addr_elt = elt; | |
5264 | } | |
5265 | else | |
5266 | sets[i].dest_addr_elt = NULL; | |
5267 | } | |
5268 | } | |
5269 | ||
9ae8ffe7 | 5270 | invalidate_from_clobbers (x); |
77fa0940 | 5271 | |
278a83b2 | 5272 | /* Some registers are invalidated by subroutine calls. Memory is |
77fa0940 RK |
5273 | invalidated by non-constant calls. */ |
5274 | ||
4b4bf941 | 5275 | if (CALL_P (insn)) |
7afe21cc | 5276 | { |
24a28584 | 5277 | if (! CONST_OR_PURE_CALL_P (insn)) |
9ae8ffe7 | 5278 | invalidate_memory (); |
7afe21cc RK |
5279 | invalidate_for_call (); |
5280 | } | |
5281 | ||
5282 | /* Now invalidate everything set by this instruction. | |
5283 | If a SUBREG or other funny destination is being set, | |
5284 | sets[i].rtl is still nonzero, so here we invalidate the reg | |
5285 | a part of which is being set. */ | |
5286 | ||
5287 | for (i = 0; i < n_sets; i++) | |
5288 | if (sets[i].rtl) | |
5289 | { | |
bb4034b3 JW |
5290 | /* We can't use the inner dest, because the mode associated with |
5291 | a ZERO_EXTRACT is significant. */ | |
b3694847 | 5292 | rtx dest = SET_DEST (sets[i].rtl); |
7afe21cc RK |
5293 | |
5294 | /* Needed for registers to remove the register from its | |
5295 | previous quantity's chain. | |
5296 | Needed for memory if this is a nonvarying address, unless | |
5297 | we have just done an invalidate_memory that covers even those. */ | |
f8cfc6aa | 5298 | if (REG_P (dest) || GET_CODE (dest) == SUBREG) |
bb4034b3 | 5299 | invalidate (dest, VOIDmode); |
3c0cb5de | 5300 | else if (MEM_P (dest)) |
32fab725 | 5301 | invalidate (dest, VOIDmode); |
2708da92 RS |
5302 | else if (GET_CODE (dest) == STRICT_LOW_PART |
5303 | || GET_CODE (dest) == ZERO_EXTRACT) | |
bb4034b3 | 5304 | invalidate (XEXP (dest, 0), GET_MODE (dest)); |
7afe21cc RK |
5305 | } |
5306 | ||
01e752d3 | 5307 | /* A volatile ASM invalidates everything. */ |
4b4bf941 | 5308 | if (NONJUMP_INSN_P (insn) |
01e752d3 JL |
5309 | && GET_CODE (PATTERN (insn)) == ASM_OPERANDS |
5310 | && MEM_VOLATILE_P (PATTERN (insn))) | |
5311 | flush_hash_table (); | |
5312 | ||
932ad4d9 SB |
5313 | /* Don't cse over a call to setjmp; on some machines (eg VAX) |
5314 | the regs restored by the longjmp come from a later time | |
5315 | than the setjmp. */ | |
5316 | if (CALL_P (insn) && find_reg_note (insn, REG_SETJMP, NULL)) | |
5317 | { | |
5318 | flush_hash_table (); | |
5319 | goto done; | |
5320 | } | |
5321 | ||
7afe21cc RK |
5322 | /* Make sure registers mentioned in destinations |
5323 | are safe for use in an expression to be inserted. | |
5324 | This removes from the hash table | |
5325 | any invalid entry that refers to one of these registers. | |
5326 | ||
5327 | We don't care about the return value from mention_regs because | |
5328 | we are going to hash the SET_DEST values unconditionally. */ | |
5329 | ||
5330 | for (i = 0; i < n_sets; i++) | |
34c73909 R |
5331 | { |
5332 | if (sets[i].rtl) | |
5333 | { | |
5334 | rtx x = SET_DEST (sets[i].rtl); | |
5335 | ||
f8cfc6aa | 5336 | if (!REG_P (x)) |
34c73909 R |
5337 | mention_regs (x); |
5338 | else | |
5339 | { | |
5340 | /* We used to rely on all references to a register becoming | |
5341 | inaccessible when a register changes to a new quantity, | |
5342 | since that changes the hash code. However, that is not | |
9b1549b8 | 5343 | safe, since after HASH_SIZE new quantities we get a |
34c73909 R |
5344 | hash 'collision' of a register with its own invalid |
5345 | entries. And since SUBREGs have been changed not to | |
5346 | change their hash code with the hash code of the register, | |
5347 | it wouldn't work any longer at all. So we have to check | |
5348 | for any invalid references lying around now. | |
5349 | This code is similar to the REG case in mention_regs, | |
5350 | but it knows that reg_tick has been incremented, and | |
5351 | it leaves reg_in_table as -1 . */ | |
770ae6cc RK |
5352 | unsigned int regno = REGNO (x); |
5353 | unsigned int endregno | |
34c73909 | 5354 | = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1 |
66fd46b6 | 5355 | : hard_regno_nregs[regno][GET_MODE (x)]); |
770ae6cc | 5356 | unsigned int i; |
34c73909 R |
5357 | |
5358 | for (i = regno; i < endregno; i++) | |
5359 | { | |
30f72379 | 5360 | if (REG_IN_TABLE (i) >= 0) |
34c73909 R |
5361 | { |
5362 | remove_invalid_refs (i); | |
30f72379 | 5363 | REG_IN_TABLE (i) = -1; |
34c73909 R |
5364 | } |
5365 | } | |
5366 | } | |
5367 | } | |
5368 | } | |
7afe21cc RK |
5369 | |
5370 | /* We may have just removed some of the src_elt's from the hash table. | |
05c433f3 PB |
5371 | So replace each one with the current head of the same class. |
5372 | Also check if destination addresses have been removed. */ | |
7afe21cc RK |
5373 | |
5374 | for (i = 0; i < n_sets; i++) | |
5375 | if (sets[i].rtl) | |
5376 | { | |
05c433f3 PB |
5377 | if (sets[i].dest_addr_elt |
5378 | && sets[i].dest_addr_elt->first_same_value == 0) | |
5379 | { | |
e67b81d1 | 5380 | /* The elt was removed, which means this destination is not |
05c433f3 PB |
5381 | valid after this instruction. */ |
5382 | sets[i].rtl = NULL_RTX; | |
5383 | } | |
5384 | else if (sets[i].src_elt && sets[i].src_elt->first_same_value == 0) | |
7afe21cc RK |
5385 | /* If elt was removed, find current head of same class, |
5386 | or 0 if nothing remains of that class. */ | |
5387 | { | |
b3694847 | 5388 | struct table_elt *elt = sets[i].src_elt; |
7afe21cc RK |
5389 | |
5390 | while (elt && elt->prev_same_value) | |
5391 | elt = elt->prev_same_value; | |
5392 | ||
5393 | while (elt && elt->first_same_value == 0) | |
5394 | elt = elt->next_same_value; | |
5395 | sets[i].src_elt = elt ? elt->first_same_value : 0; | |
5396 | } | |
5397 | } | |
5398 | ||
5399 | /* Now insert the destinations into their equivalence classes. */ | |
5400 | ||
5401 | for (i = 0; i < n_sets; i++) | |
5402 | if (sets[i].rtl) | |
5403 | { | |
b3694847 | 5404 | rtx dest = SET_DEST (sets[i].rtl); |
b3694847 | 5405 | struct table_elt *elt; |
7afe21cc RK |
5406 | |
5407 | /* Don't record value if we are not supposed to risk allocating | |
5408 | floating-point values in registers that might be wider than | |
5409 | memory. */ | |
5410 | if ((flag_float_store | |
3c0cb5de | 5411 | && MEM_P (dest) |
cbf6a543 | 5412 | && FLOAT_MODE_P (GET_MODE (dest))) |
bc4ddc77 JW |
5413 | /* Don't record BLKmode values, because we don't know the |
5414 | size of it, and can't be sure that other BLKmode values | |
5415 | have the same or smaller size. */ | |
5416 | || GET_MODE (dest) == BLKmode | |
7afe21cc RK |
5417 | /* Don't record values of destinations set inside a libcall block |
5418 | since we might delete the libcall. Things should have been set | |
5419 | up so we won't want to reuse such a value, but we play it safe | |
5420 | here. */ | |
7bd8b2a8 | 5421 | || libcall_insn |
7afe21cc RK |
5422 | /* If we didn't put a REG_EQUAL value or a source into the hash |
5423 | table, there is no point is recording DEST. */ | |
1a8e9a8e RK |
5424 | || sets[i].src_elt == 0 |
5425 | /* If DEST is a paradoxical SUBREG and SRC is a ZERO_EXTEND | |
5426 | or SIGN_EXTEND, don't record DEST since it can cause | |
5427 | some tracking to be wrong. | |
5428 | ||
5429 | ??? Think about this more later. */ | |
5430 | || (GET_CODE (dest) == SUBREG | |
5431 | && (GET_MODE_SIZE (GET_MODE (dest)) | |
5432 | > GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest)))) | |
5433 | && (GET_CODE (sets[i].src) == SIGN_EXTEND | |
5434 | || GET_CODE (sets[i].src) == ZERO_EXTEND))) | |
7afe21cc RK |
5435 | continue; |
5436 | ||
5437 | /* STRICT_LOW_PART isn't part of the value BEING set, | |
5438 | and neither is the SUBREG inside it. | |
5439 | Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */ | |
5440 | if (GET_CODE (dest) == STRICT_LOW_PART) | |
5441 | dest = SUBREG_REG (XEXP (dest, 0)); | |
5442 | ||
f8cfc6aa | 5443 | if (REG_P (dest) || GET_CODE (dest) == SUBREG) |
7afe21cc RK |
5444 | /* Registers must also be inserted into chains for quantities. */ |
5445 | if (insert_regs (dest, sets[i].src_elt, 1)) | |
8ae2b8f6 JW |
5446 | { |
5447 | /* If `insert_regs' changes something, the hash code must be | |
5448 | recalculated. */ | |
5449 | rehash_using_reg (dest); | |
5450 | sets[i].dest_hash = HASH (dest, GET_MODE (dest)); | |
5451 | } | |
7afe21cc | 5452 | |
8fff4fc1 RH |
5453 | elt = insert (dest, sets[i].src_elt, |
5454 | sets[i].dest_hash, GET_MODE (dest)); | |
9de2c71a | 5455 | |
3c0cb5de | 5456 | elt->in_memory = (MEM_P (sets[i].inner_dest) |
389fdba0 | 5457 | && !MEM_READONLY_P (sets[i].inner_dest)); |
c256df0b | 5458 | |
fc3ffe83 RK |
5459 | /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no |
5460 | narrower than M2, and both M1 and M2 are the same number of words, | |
5461 | we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so | |
5462 | make that equivalence as well. | |
7afe21cc | 5463 | |
4de249d9 PB |
5464 | However, BAR may have equivalences for which gen_lowpart |
5465 | will produce a simpler value than gen_lowpart applied to | |
7afe21cc | 5466 | BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all |
278a83b2 | 5467 | BAR's equivalences. If we don't get a simplified form, make |
7afe21cc RK |
5468 | the SUBREG. It will not be used in an equivalence, but will |
5469 | cause two similar assignments to be detected. | |
5470 | ||
5471 | Note the loop below will find SUBREG_REG (DEST) since we have | |
5472 | already entered SRC and DEST of the SET in the table. */ | |
5473 | ||
5474 | if (GET_CODE (dest) == SUBREG | |
6cdbaec4 RK |
5475 | && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) - 1) |
5476 | / UNITS_PER_WORD) | |
278a83b2 | 5477 | == (GET_MODE_SIZE (GET_MODE (dest)) - 1) / UNITS_PER_WORD) |
7afe21cc RK |
5478 | && (GET_MODE_SIZE (GET_MODE (dest)) |
5479 | >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest)))) | |
5480 | && sets[i].src_elt != 0) | |
5481 | { | |
5482 | enum machine_mode new_mode = GET_MODE (SUBREG_REG (dest)); | |
5483 | struct table_elt *elt, *classp = 0; | |
5484 | ||
5485 | for (elt = sets[i].src_elt->first_same_value; elt; | |
5486 | elt = elt->next_same_value) | |
5487 | { | |
5488 | rtx new_src = 0; | |
2197a88a | 5489 | unsigned src_hash; |
7afe21cc | 5490 | struct table_elt *src_elt; |
ff27a429 | 5491 | int byte = 0; |
7afe21cc RK |
5492 | |
5493 | /* Ignore invalid entries. */ | |
f8cfc6aa | 5494 | if (!REG_P (elt->exp) |
0516f6fe | 5495 | && ! exp_equiv_p (elt->exp, elt->exp, 1, false)) |
7afe21cc RK |
5496 | continue; |
5497 | ||
9beb7d20 RH |
5498 | /* We may have already been playing subreg games. If the |
5499 | mode is already correct for the destination, use it. */ | |
5500 | if (GET_MODE (elt->exp) == new_mode) | |
5501 | new_src = elt->exp; | |
5502 | else | |
5503 | { | |
5504 | /* Calculate big endian correction for the SUBREG_BYTE. | |
5505 | We have already checked that M1 (GET_MODE (dest)) | |
5506 | is not narrower than M2 (new_mode). */ | |
5507 | if (BYTES_BIG_ENDIAN) | |
5508 | byte = (GET_MODE_SIZE (GET_MODE (dest)) | |
5509 | - GET_MODE_SIZE (new_mode)); | |
5510 | ||
5511 | new_src = simplify_gen_subreg (new_mode, elt->exp, | |
5512 | GET_MODE (dest), byte); | |
5513 | } | |
5514 | ||
ff27a429 R |
5515 | /* The call to simplify_gen_subreg fails if the value |
5516 | is VOIDmode, yet we can't do any simplification, e.g. | |
5517 | for EXPR_LISTs denoting function call results. | |
5518 | It is invalid to construct a SUBREG with a VOIDmode | |
5519 | SUBREG_REG, hence a zero new_src means we can't do | |
5520 | this substitution. */ | |
5521 | if (! new_src) | |
5522 | continue; | |
7afe21cc RK |
5523 | |
5524 | src_hash = HASH (new_src, new_mode); | |
5525 | src_elt = lookup (new_src, src_hash, new_mode); | |
5526 | ||
5527 | /* Put the new source in the hash table is if isn't | |
5528 | already. */ | |
5529 | if (src_elt == 0) | |
5530 | { | |
5531 | if (insert_regs (new_src, classp, 0)) | |
8ae2b8f6 JW |
5532 | { |
5533 | rehash_using_reg (new_src); | |
5534 | src_hash = HASH (new_src, new_mode); | |
5535 | } | |
7afe21cc RK |
5536 | src_elt = insert (new_src, classp, src_hash, new_mode); |
5537 | src_elt->in_memory = elt->in_memory; | |
7afe21cc RK |
5538 | } |
5539 | else if (classp && classp != src_elt->first_same_value) | |
278a83b2 | 5540 | /* Show that two things that we've seen before are |
7afe21cc RK |
5541 | actually the same. */ |
5542 | merge_equiv_classes (src_elt, classp); | |
5543 | ||
5544 | classp = src_elt->first_same_value; | |
da932f04 JL |
5545 | /* Ignore invalid entries. */ |
5546 | while (classp | |
f8cfc6aa | 5547 | && !REG_P (classp->exp) |
0516f6fe | 5548 | && ! exp_equiv_p (classp->exp, classp->exp, 1, false)) |
da932f04 | 5549 | classp = classp->next_same_value; |
7afe21cc RK |
5550 | } |
5551 | } | |
5552 | } | |
5553 | ||
403e25d0 RK |
5554 | /* Special handling for (set REG0 REG1) where REG0 is the |
5555 | "cheapest", cheaper than REG1. After cse, REG1 will probably not | |
5556 | be used in the sequel, so (if easily done) change this insn to | |
5557 | (set REG1 REG0) and replace REG1 with REG0 in the previous insn | |
5558 | that computed their value. Then REG1 will become a dead store | |
5559 | and won't cloud the situation for later optimizations. | |
7afe21cc RK |
5560 | |
5561 | Do not make this change if REG1 is a hard register, because it will | |
5562 | then be used in the sequel and we may be changing a two-operand insn | |
5563 | into a three-operand insn. | |
5564 | ||
50270076 R |
5565 | Also do not do this if we are operating on a copy of INSN. |
5566 | ||
5567 | Also don't do this if INSN ends a libcall; this would cause an unrelated | |
5568 | register to be set in the middle of a libcall, and we then get bad code | |
5569 | if the libcall is deleted. */ | |
7afe21cc | 5570 | |
f8cfc6aa | 5571 | if (n_sets == 1 && sets[0].rtl && REG_P (SET_DEST (sets[0].rtl)) |
7afe21cc | 5572 | && NEXT_INSN (PREV_INSN (insn)) == insn |
f8cfc6aa | 5573 | && REG_P (SET_SRC (sets[0].rtl)) |
7afe21cc | 5574 | && REGNO (SET_SRC (sets[0].rtl)) >= FIRST_PSEUDO_REGISTER |
1bb98cec | 5575 | && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets[0].rtl)))) |
7afe21cc | 5576 | { |
1bb98cec DM |
5577 | int src_q = REG_QTY (REGNO (SET_SRC (sets[0].rtl))); |
5578 | struct qty_table_elem *src_ent = &qty_table[src_q]; | |
7afe21cc | 5579 | |
1bb98cec DM |
5580 | if ((src_ent->first_reg == REGNO (SET_DEST (sets[0].rtl))) |
5581 | && ! find_reg_note (insn, REG_RETVAL, NULL_RTX)) | |
7afe21cc | 5582 | { |
3e25353e AH |
5583 | /* Scan for the previous nonnote insn, but stop at a basic |
5584 | block boundary. */ | |
932ad4d9 SB |
5585 | rtx prev = insn; |
5586 | rtx bb_head = BB_HEAD (BLOCK_FOR_INSN (insn)); | |
3e25353e AH |
5587 | do |
5588 | { | |
5589 | prev = PREV_INSN (prev); | |
5590 | } | |
932ad4d9 | 5591 | while (prev != bb_head && NOTE_P (prev)); |
7080f735 | 5592 | |
58ecb5e2 RS |
5593 | /* Do not swap the registers around if the previous instruction |
5594 | attaches a REG_EQUIV note to REG1. | |
5595 | ||
5596 | ??? It's not entirely clear whether we can transfer a REG_EQUIV | |
5597 | from the pseudo that originally shadowed an incoming argument | |
5598 | to another register. Some uses of REG_EQUIV might rely on it | |
5599 | being attached to REG1 rather than REG2. | |
5600 | ||
5601 | This section previously turned the REG_EQUIV into a REG_EQUAL | |
5602 | note. We cannot do that because REG_EQUIV may provide an | |
4912a07c | 5603 | uninitialized stack slot when REG_PARM_STACK_SPACE is used. */ |
932ad4d9 | 5604 | if (NONJUMP_INSN_P (prev) |
403e25d0 | 5605 | && GET_CODE (PATTERN (prev)) == SET |
58ecb5e2 RS |
5606 | && SET_DEST (PATTERN (prev)) == SET_SRC (sets[0].rtl) |
5607 | && ! find_reg_note (prev, REG_EQUIV, NULL_RTX)) | |
1bb98cec DM |
5608 | { |
5609 | rtx dest = SET_DEST (sets[0].rtl); | |
403e25d0 | 5610 | rtx src = SET_SRC (sets[0].rtl); |
58ecb5e2 | 5611 | rtx note; |
7afe21cc | 5612 | |
278a83b2 KH |
5613 | validate_change (prev, &SET_DEST (PATTERN (prev)), dest, 1); |
5614 | validate_change (insn, &SET_DEST (sets[0].rtl), src, 1); | |
5615 | validate_change (insn, &SET_SRC (sets[0].rtl), dest, 1); | |
1bb98cec | 5616 | apply_change_group (); |
7afe21cc | 5617 | |
403e25d0 RK |
5618 | /* If INSN has a REG_EQUAL note, and this note mentions |
5619 | REG0, then we must delete it, because the value in | |
5620 | REG0 has changed. If the note's value is REG1, we must | |
5621 | also delete it because that is now this insn's dest. */ | |
1bb98cec | 5622 | note = find_reg_note (insn, REG_EQUAL, NULL_RTX); |
403e25d0 RK |
5623 | if (note != 0 |
5624 | && (reg_mentioned_p (dest, XEXP (note, 0)) | |
5625 | || rtx_equal_p (src, XEXP (note, 0)))) | |
1bb98cec DM |
5626 | remove_note (insn, note); |
5627 | } | |
7afe21cc RK |
5628 | } |
5629 | } | |
5630 | ||
932ad4d9 | 5631 | done:; |
7afe21cc RK |
5632 | } |
5633 | \f | |
a4c6502a | 5634 | /* Remove from the hash table all expressions that reference memory. */ |
14a774a9 | 5635 | |
7afe21cc | 5636 | static void |
7080f735 | 5637 | invalidate_memory (void) |
7afe21cc | 5638 | { |
b3694847 SS |
5639 | int i; |
5640 | struct table_elt *p, *next; | |
7afe21cc | 5641 | |
9b1549b8 | 5642 | for (i = 0; i < HASH_SIZE; i++) |
9ae8ffe7 JL |
5643 | for (p = table[i]; p; p = next) |
5644 | { | |
5645 | next = p->next_same_hash; | |
5646 | if (p->in_memory) | |
5647 | remove_from_table (p, i); | |
5648 | } | |
5649 | } | |
5650 | ||
7afe21cc RK |
5651 | /* Perform invalidation on the basis of everything about an insn |
5652 | except for invalidating the actual places that are SET in it. | |
5653 | This includes the places CLOBBERed, and anything that might | |
5654 | alias with something that is SET or CLOBBERed. | |
5655 | ||
7afe21cc RK |
5656 | X is the pattern of the insn. */ |
5657 | ||
5658 | static void | |
7080f735 | 5659 | invalidate_from_clobbers (rtx x) |
7afe21cc | 5660 | { |
7afe21cc RK |
5661 | if (GET_CODE (x) == CLOBBER) |
5662 | { | |
5663 | rtx ref = XEXP (x, 0); | |
9ae8ffe7 JL |
5664 | if (ref) |
5665 | { | |
f8cfc6aa | 5666 | if (REG_P (ref) || GET_CODE (ref) == SUBREG |
3c0cb5de | 5667 | || MEM_P (ref)) |
9ae8ffe7 JL |
5668 | invalidate (ref, VOIDmode); |
5669 | else if (GET_CODE (ref) == STRICT_LOW_PART | |
5670 | || GET_CODE (ref) == ZERO_EXTRACT) | |
5671 | invalidate (XEXP (ref, 0), GET_MODE (ref)); | |
5672 | } | |
7afe21cc RK |
5673 | } |
5674 | else if (GET_CODE (x) == PARALLEL) | |
5675 | { | |
b3694847 | 5676 | int i; |
7afe21cc RK |
5677 | for (i = XVECLEN (x, 0) - 1; i >= 0; i--) |
5678 | { | |
b3694847 | 5679 | rtx y = XVECEXP (x, 0, i); |
7afe21cc RK |
5680 | if (GET_CODE (y) == CLOBBER) |
5681 | { | |
5682 | rtx ref = XEXP (y, 0); | |
f8cfc6aa | 5683 | if (REG_P (ref) || GET_CODE (ref) == SUBREG |
3c0cb5de | 5684 | || MEM_P (ref)) |
9ae8ffe7 JL |
5685 | invalidate (ref, VOIDmode); |
5686 | else if (GET_CODE (ref) == STRICT_LOW_PART | |
5687 | || GET_CODE (ref) == ZERO_EXTRACT) | |
5688 | invalidate (XEXP (ref, 0), GET_MODE (ref)); | |
7afe21cc RK |
5689 | } |
5690 | } | |
5691 | } | |
5692 | } | |
5693 | \f | |
5694 | /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes | |
5695 | and replace any registers in them with either an equivalent constant | |
5696 | or the canonical form of the register. If we are inside an address, | |
5697 | only do this if the address remains valid. | |
5698 | ||
5699 | OBJECT is 0 except when within a MEM in which case it is the MEM. | |
5700 | ||
5701 | Return the replacement for X. */ | |
5702 | ||
5703 | static rtx | |
7080f735 | 5704 | cse_process_notes (rtx x, rtx object) |
7afe21cc RK |
5705 | { |
5706 | enum rtx_code code = GET_CODE (x); | |
6f7d635c | 5707 | const char *fmt = GET_RTX_FORMAT (code); |
7afe21cc RK |
5708 | int i; |
5709 | ||
5710 | switch (code) | |
5711 | { | |
5712 | case CONST_INT: | |
5713 | case CONST: | |
5714 | case SYMBOL_REF: | |
5715 | case LABEL_REF: | |
5716 | case CONST_DOUBLE: | |
69ef87e2 | 5717 | case CONST_VECTOR: |
7afe21cc RK |
5718 | case PC: |
5719 | case CC0: | |
5720 | case LO_SUM: | |
5721 | return x; | |
5722 | ||
5723 | case MEM: | |
c96208fa DC |
5724 | validate_change (x, &XEXP (x, 0), |
5725 | cse_process_notes (XEXP (x, 0), x), 0); | |
7afe21cc RK |
5726 | return x; |
5727 | ||
5728 | case EXPR_LIST: | |
5729 | case INSN_LIST: | |
5730 | if (REG_NOTE_KIND (x) == REG_EQUAL) | |
906c4e36 | 5731 | XEXP (x, 0) = cse_process_notes (XEXP (x, 0), NULL_RTX); |
7afe21cc | 5732 | if (XEXP (x, 1)) |
906c4e36 | 5733 | XEXP (x, 1) = cse_process_notes (XEXP (x, 1), NULL_RTX); |
7afe21cc RK |
5734 | return x; |
5735 | ||
e4890d45 RS |
5736 | case SIGN_EXTEND: |
5737 | case ZERO_EXTEND: | |
0b0ee36c | 5738 | case SUBREG: |
e4890d45 RS |
5739 | { |
5740 | rtx new = cse_process_notes (XEXP (x, 0), object); | |
5741 | /* We don't substitute VOIDmode constants into these rtx, | |
5742 | since they would impede folding. */ | |
5743 | if (GET_MODE (new) != VOIDmode) | |
5744 | validate_change (object, &XEXP (x, 0), new, 0); | |
5745 | return x; | |
5746 | } | |
5747 | ||
7afe21cc | 5748 | case REG: |
30f72379 | 5749 | i = REG_QTY (REGNO (x)); |
7afe21cc RK |
5750 | |
5751 | /* Return a constant or a constant register. */ | |
1bb98cec | 5752 | if (REGNO_QTY_VALID_P (REGNO (x))) |
7afe21cc | 5753 | { |
1bb98cec DM |
5754 | struct qty_table_elem *ent = &qty_table[i]; |
5755 | ||
5756 | if (ent->const_rtx != NULL_RTX | |
5757 | && (CONSTANT_P (ent->const_rtx) | |
f8cfc6aa | 5758 | || REG_P (ent->const_rtx))) |
1bb98cec | 5759 | { |
4de249d9 | 5760 | rtx new = gen_lowpart (GET_MODE (x), ent->const_rtx); |
1bb98cec | 5761 | if (new) |
3e916873 | 5762 | return copy_rtx (new); |
1bb98cec | 5763 | } |
7afe21cc RK |
5764 | } |
5765 | ||
5766 | /* Otherwise, canonicalize this register. */ | |
906c4e36 | 5767 | return canon_reg (x, NULL_RTX); |
278a83b2 | 5768 | |
e9a25f70 JL |
5769 | default: |
5770 | break; | |
7afe21cc RK |
5771 | } |
5772 | ||
5773 | for (i = 0; i < GET_RTX_LENGTH (code); i++) | |
5774 | if (fmt[i] == 'e') | |
5775 | validate_change (object, &XEXP (x, i), | |
7fe34fdf | 5776 | cse_process_notes (XEXP (x, i), object), 0); |
7afe21cc RK |
5777 | |
5778 | return x; | |
5779 | } | |
5780 | \f | |
932ad4d9 | 5781 | /* Find a path in the CFG, starting with FIRST_BB to perform CSE on. |
7afe21cc | 5782 | |
932ad4d9 SB |
5783 | DATA is a pointer to a struct cse_basic_block_data, that is used to |
5784 | describe the path. | |
5785 | It is filled with a queue of basic blocks, starting with FIRST_BB | |
5786 | and following a trace through the CFG. | |
5787 | ||
5788 | If all paths starting at FIRST_BB have been followed, or no new path | |
5789 | starting at FIRST_BB can be constructed, this function returns FALSE. | |
5790 | Otherwise, DATA->path is filled and the function returns TRUE indicating | |
5791 | that a path to follow was found. | |
7afe21cc | 5792 | |
2e226e66 | 5793 | If FOLLOW_JUMPS is false, the maximum path length is 1 and the only |
932ad4d9 | 5794 | block in the path will be FIRST_BB. */ |
7afe21cc | 5795 | |
932ad4d9 SB |
5796 | static bool |
5797 | cse_find_path (basic_block first_bb, struct cse_basic_block_data *data, | |
5798 | int follow_jumps) | |
7afe21cc | 5799 | { |
932ad4d9 SB |
5800 | basic_block bb; |
5801 | edge e; | |
5802 | int path_size; | |
5803 | ||
5804 | SET_BIT (cse_visited_basic_blocks, first_bb->index); | |
7afe21cc | 5805 | |
932ad4d9 SB |
5806 | /* See if there is a previous path. */ |
5807 | path_size = data->path_size; | |
5808 | ||
5809 | /* There is a previous path. Make sure it started with FIRST_BB. */ | |
5810 | if (path_size) | |
5811 | gcc_assert (data->path[0].bb == first_bb); | |
5812 | ||
5813 | /* There was only one basic block in the last path. Clear the path and | |
5814 | return, so that paths starting at another basic block can be tried. */ | |
5815 | if (path_size == 1) | |
5816 | { | |
5817 | path_size = 0; | |
5818 | goto done; | |
5819 | } | |
5820 | ||
5821 | /* If the path was empty from the beginning, construct a new path. */ | |
5822 | if (path_size == 0) | |
5823 | data->path[path_size++].bb = first_bb; | |
5824 | else | |
7afe21cc | 5825 | { |
932ad4d9 SB |
5826 | /* Otherwise, path_size must be equal to or greater than 2, because |
5827 | a previous path exists that is at least two basic blocks long. | |
5828 | ||
5829 | Update the previous branch path, if any. If the last branch was | |
5830 | previously along the branch edge, take the fallthrough edge now. */ | |
5831 | while (path_size >= 2) | |
7afe21cc | 5832 | { |
932ad4d9 SB |
5833 | basic_block last_bb_in_path, previous_bb_in_path; |
5834 | edge e; | |
5835 | ||
5836 | --path_size; | |
5837 | last_bb_in_path = data->path[path_size].bb; | |
5838 | previous_bb_in_path = data->path[path_size - 1].bb; | |
5839 | ||
5840 | /* If we previously followed a path along the branch edge, try | |
5841 | the fallthru edge now. */ | |
5842 | if (EDGE_COUNT (previous_bb_in_path->succs) == 2 | |
5843 | && any_condjump_p (BB_END (previous_bb_in_path)) | |
5844 | && (e = find_edge (previous_bb_in_path, last_bb_in_path)) | |
5845 | && e == BRANCH_EDGE (previous_bb_in_path)) | |
5846 | { | |
5847 | bb = FALLTHRU_EDGE (previous_bb_in_path)->dest; | |
5848 | if (bb != EXIT_BLOCK_PTR | |
5849 | && single_pred_p (bb)) | |
5850 | { | |
5851 | #if ENABLE_CHECKING | |
5852 | /* We should only see blocks here that we have not | |
5853 | visited yet. */ | |
5854 | gcc_assert (!TEST_BIT (cse_visited_basic_blocks, bb->index)); | |
5855 | #endif | |
5856 | SET_BIT (cse_visited_basic_blocks, bb->index); | |
5857 | data->path[path_size++].bb = bb; | |
5858 | break; | |
5859 | } | |
5860 | } | |
5861 | ||
5862 | data->path[path_size].bb = NULL; | |
5863 | } | |
5864 | ||
5865 | /* If only one block remains in the path, bail. */ | |
5866 | if (path_size == 1) | |
5867 | { | |
5868 | path_size = 0; | |
5869 | goto done; | |
7afe21cc | 5870 | } |
7afe21cc RK |
5871 | } |
5872 | ||
932ad4d9 SB |
5873 | /* Extend the path if possible. */ |
5874 | if (follow_jumps) | |
7afe21cc | 5875 | { |
932ad4d9 SB |
5876 | bb = data->path[path_size - 1].bb; |
5877 | while (bb && path_size < PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH)) | |
5878 | { | |
5879 | if (single_succ_p (bb)) | |
5880 | e = single_succ_edge (bb); | |
5881 | else if (EDGE_COUNT (bb->succs) == 2 | |
5882 | && any_condjump_p (BB_END (bb))) | |
5883 | { | |
5884 | /* First try to follow the branch. If that doesn't lead | |
5885 | to a useful path, follow the fallthru edge. */ | |
5886 | e = BRANCH_EDGE (bb); | |
5887 | if (!single_pred_p (e->dest)) | |
5888 | e = FALLTHRU_EDGE (bb); | |
5889 | } | |
5890 | else | |
5891 | e = NULL; | |
7afe21cc | 5892 | |
932ad4d9 SB |
5893 | if (e && e->dest != EXIT_BLOCK_PTR |
5894 | && single_pred_p (e->dest)) | |
5895 | { | |
5896 | basic_block bb2 = e->dest; | |
278a83b2 | 5897 | |
932ad4d9 SB |
5898 | /* We should only see blocks here that we have not |
5899 | visited yet. */ | |
5900 | gcc_assert (!TEST_BIT (cse_visited_basic_blocks, bb2->index)); | |
27511c65 | 5901 | |
932ad4d9 SB |
5902 | SET_BIT (cse_visited_basic_blocks, bb2->index); |
5903 | data->path[path_size++].bb = bb2; | |
5904 | bb = bb2; | |
5905 | } | |
5906 | else | |
5907 | bb = NULL; | |
5908 | } | |
5909 | } | |
5910 | ||
5911 | done: | |
5912 | data->path_size = path_size; | |
5913 | return path_size != 0; | |
5914 | } | |
5915 | \f | |
5916 | /* Dump the path in DATA to file F. NSETS is the number of sets | |
5917 | in the path. */ | |
5918 | ||
5919 | static void | |
5920 | cse_dump_path (struct cse_basic_block_data *data, int nsets, FILE *f) | |
5921 | { | |
5922 | int path_entry; | |
5923 | ||
5924 | fprintf (f, ";; Following path with %d sets: ", nsets); | |
5925 | for (path_entry = 0; path_entry < data->path_size; path_entry++) | |
5926 | fprintf (f, "%d ", (data->path[path_entry].bb)->index); | |
5927 | fputc ('\n', dump_file); | |
5928 | fflush (f); | |
5929 | } | |
5930 | ||
a7582f7c SB |
5931 | \f |
5932 | /* Return true if BB has exception handling successor edges. */ | |
5933 | ||
5934 | static bool | |
5935 | have_eh_succ_edges (basic_block bb) | |
5936 | { | |
5937 | edge e; | |
5938 | edge_iterator ei; | |
5939 | ||
5940 | FOR_EACH_EDGE (e, ei, bb->succs) | |
5941 | if (e->flags & EDGE_EH) | |
5942 | return true; | |
5943 | ||
5944 | return false; | |
5945 | } | |
5946 | ||
932ad4d9 SB |
5947 | \f |
5948 | /* Scan to the end of the path described by DATA. Return an estimate of | |
5949 | the total number of SETs, and the lowest and highest insn CUID, of all | |
5950 | insns in the path. */ | |
5951 | ||
5952 | static void | |
5953 | cse_prescan_path (struct cse_basic_block_data *data) | |
5954 | { | |
5955 | int nsets = 0; | |
5956 | int low_cuid = -1, high_cuid = -1; /* FIXME low_cuid not computed correctly */ | |
5957 | int path_size = data->path_size; | |
5958 | int path_entry; | |
5959 | ||
5960 | /* Scan to end of each basic block in the path. */ | |
5961 | for (path_entry = 0; path_entry < path_size; path_entry++) | |
5962 | { | |
5963 | basic_block bb; | |
5964 | rtx insn; | |
164c8956 | 5965 | |
932ad4d9 | 5966 | bb = data->path[path_entry].bb; |
7afe21cc | 5967 | |
932ad4d9 | 5968 | FOR_BB_INSNS (bb, insn) |
7afe21cc | 5969 | { |
932ad4d9 SB |
5970 | if (!INSN_P (insn)) |
5971 | continue; | |
278a83b2 | 5972 | |
932ad4d9 SB |
5973 | /* A PARALLEL can have lots of SETs in it, |
5974 | especially if it is really an ASM_OPERANDS. */ | |
5975 | if (GET_CODE (PATTERN (insn)) == PARALLEL) | |
5976 | nsets += XVECLEN (PATTERN (insn), 0); | |
5977 | else | |
5978 | nsets += 1; | |
5979 | ||
5980 | /* Ignore insns made by CSE in a previous traversal of this | |
5981 | basic block. They cannot affect the boundaries of the | |
5982 | basic block. | |
5983 | FIXME: When we only visit each basic block at most once, | |
5984 | this can go away. */ | |
5985 | if (INSN_UID (insn) <= max_uid && INSN_CUID (insn) > high_cuid) | |
5986 | high_cuid = INSN_CUID (insn); | |
5987 | if (INSN_UID (insn) <= max_uid && INSN_CUID (insn) < low_cuid) | |
5988 | low_cuid = INSN_CUID (insn); | |
7afe21cc | 5989 | } |
932ad4d9 SB |
5990 | } |
5991 | ||
5992 | data->low_cuid = low_cuid; | |
5993 | data->high_cuid = high_cuid; | |
5994 | data->nsets = nsets; | |
5995 | } | |
5996 | \f | |
5997 | /* Process a single extended basic block described by EBB_DATA. */ | |
7afe21cc | 5998 | |
932ad4d9 SB |
5999 | static void |
6000 | cse_extended_basic_block (struct cse_basic_block_data *ebb_data) | |
6001 | { | |
6002 | int path_size = ebb_data->path_size; | |
6003 | int path_entry; | |
6004 | int num_insns = 0; | |
6005 | ||
6006 | /* Allocate the space needed by qty_table. */ | |
6007 | qty_table = XNEWVEC (struct qty_table_elem, max_qty); | |
6008 | ||
6009 | new_basic_block (); | |
6010 | for (path_entry = 0; path_entry < path_size; path_entry++) | |
6011 | { | |
6012 | basic_block bb; | |
6013 | rtx insn; | |
6014 | rtx libcall_insn = NULL_RTX; | |
6015 | int no_conflict = 0; | |
6016 | ||
6017 | bb = ebb_data->path[path_entry].bb; | |
6018 | FOR_BB_INSNS (bb, insn) | |
7afe21cc | 6019 | { |
932ad4d9 SB |
6020 | /* If we have processed 1,000 insns, flush the hash table to |
6021 | avoid extreme quadratic behavior. We must not include NOTEs | |
6022 | in the count since there may be more of them when generating | |
6023 | debugging information. If we clear the table at different | |
6024 | times, code generated with -g -O might be different than code | |
6025 | generated with -O but not -g. | |
6026 | ||
6027 | FIXME: This is a real kludge and needs to be done some other | |
6028 | way. */ | |
6029 | if (INSN_P (insn) | |
6030 | && num_insns++ > PARAM_VALUE (PARAM_MAX_CSE_INSNS)) | |
6031 | { | |
6032 | flush_hash_table (); | |
6033 | num_insns = 0; | |
6034 | } | |
7afe21cc | 6035 | |
932ad4d9 | 6036 | if (INSN_P (insn)) |
7afe21cc | 6037 | { |
932ad4d9 SB |
6038 | /* Process notes first so we have all notes in canonical forms |
6039 | when looking for duplicate operations. */ | |
6040 | if (REG_NOTES (insn)) | |
6041 | REG_NOTES (insn) = cse_process_notes (REG_NOTES (insn), | |
6042 | NULL_RTX); | |
6043 | ||
6044 | /* Track when we are inside in LIBCALL block. Inside such | |
6045 | a block we do not want to record destinations. The last | |
6046 | insn of a LIBCALL block is not considered to be part of | |
6047 | the block, since its destination is the result of the | |
6048 | block and hence should be recorded. */ | |
6049 | if (REG_NOTES (insn) != 0) | |
fc3ffe83 | 6050 | { |
932ad4d9 SB |
6051 | rtx p; |
6052 | ||
6053 | if ((p = find_reg_note (insn, REG_LIBCALL, NULL_RTX))) | |
6054 | libcall_insn = XEXP (p, 0); | |
6055 | else if (find_reg_note (insn, REG_RETVAL, NULL_RTX)) | |
6056 | { | |
6057 | /* Keep libcall_insn for the last SET insn of | |
6058 | a no-conflict block to prevent changing the | |
6059 | destination. */ | |
6060 | if (!no_conflict) | |
6061 | libcall_insn = NULL_RTX; | |
6062 | else | |
6063 | no_conflict = -1; | |
6064 | } | |
6065 | else if (find_reg_note (insn, REG_NO_CONFLICT, NULL_RTX)) | |
6066 | no_conflict = 1; | |
fc3ffe83 | 6067 | } |
7afe21cc | 6068 | |
932ad4d9 | 6069 | cse_insn (insn, libcall_insn); |
7afe21cc | 6070 | |
932ad4d9 SB |
6071 | /* If we kept libcall_insn for a no-conflict bock, |
6072 | clear it here. */ | |
6073 | if (no_conflict == -1) | |
6074 | { | |
6075 | libcall_insn = NULL_RTX; | |
6076 | no_conflict = 0; | |
6077 | } | |
6078 | ||
6079 | /* If we haven't already found an insn where we added a LABEL_REF, | |
6080 | check this one. */ | |
6081 | if (NONJUMP_INSN_P (insn) && ! recorded_label_ref | |
6082 | && for_each_rtx (&PATTERN (insn), check_for_label_ref, | |
6083 | (void *) insn)) | |
6084 | recorded_label_ref = 1; | |
96fb470d SB |
6085 | |
6086 | #ifdef HAVE_cc0 | |
6087 | /* If the previous insn set CC0 and this insn no longer | |
6088 | references CC0, delete the previous insn. Here we use | |
6089 | fact that nothing expects CC0 to be valid over an insn, | |
6090 | which is true until the final pass. */ | |
6091 | { | |
6092 | rtx prev_insn, tem; | |
6093 | ||
6094 | prev_insn = PREV_INSN (insn); | |
6095 | if (prev_insn && NONJUMP_INSN_P (prev_insn) | |
6096 | && (tem = single_set (prev_insn)) != 0 | |
6097 | && SET_DEST (tem) == cc0_rtx | |
6098 | && ! reg_mentioned_p (cc0_rtx, PATTERN (insn))) | |
6099 | delete_insn (prev_insn); | |
6100 | } | |
6101 | ||
6102 | /* If this insn is not the last insn in the basic block, | |
6103 | it will be PREV_INSN(insn) in the next iteration. If | |
6104 | we recorded any CC0-related information for this insn, | |
6105 | remember it. */ | |
6106 | if (insn != BB_END (bb)) | |
6107 | { | |
6108 | prev_insn_cc0 = this_insn_cc0; | |
6109 | prev_insn_cc0_mode = this_insn_cc0_mode; | |
6110 | } | |
6111 | #endif | |
932ad4d9 SB |
6112 | } |
6113 | } | |
7afe21cc | 6114 | |
932ad4d9 SB |
6115 | /* Make sure that libcalls don't span multiple basic blocks. */ |
6116 | gcc_assert (libcall_insn == NULL_RTX); | |
7afe21cc | 6117 | |
a7582f7c SB |
6118 | /* With non-call exceptions, we are not always able to update |
6119 | the CFG properly inside cse_insn. So clean up possibly | |
6120 | redundant EH edges here. */ | |
6121 | if (flag_non_call_exceptions && have_eh_succ_edges (bb)) | |
6122 | purge_dead_edges (bb); | |
6123 | ||
932ad4d9 SB |
6124 | /* If we changed a conditional jump, we may have terminated |
6125 | the path we are following. Check that by verifying that | |
6126 | the edge we would take still exists. If the edge does | |
6127 | not exist anymore, purge the remainder of the path. | |
6128 | Note that this will cause us to return to the caller. */ | |
6129 | if (path_entry < path_size - 1) | |
6130 | { | |
6131 | basic_block next_bb = ebb_data->path[path_entry + 1].bb; | |
6132 | if (!find_edge (bb, next_bb)) | |
27511c65 SB |
6133 | { |
6134 | do | |
6135 | { | |
6136 | path_size--; | |
6137 | ||
6138 | /* If we truncate the path, we must also reset the | |
6139 | visited bit on the remaining blocks in the path, | |
6140 | or we will never visit them at all. */ | |
6141 | RESET_BIT (cse_visited_basic_blocks, | |
6142 | ebb_data->path[path_size].bb->index); | |
6143 | ebb_data->path[path_size].bb = NULL; | |
6144 | } | |
6145 | while (path_size - 1 != path_entry); | |
6146 | ebb_data->path_size = path_size; | |
6147 | } | |
7afe21cc | 6148 | } |
7afe21cc | 6149 | |
932ad4d9 SB |
6150 | /* If this is a conditional jump insn, record any known |
6151 | equivalences due to the condition being tested. */ | |
6152 | insn = BB_END (bb); | |
6153 | if (path_entry < path_size - 1 | |
6154 | && JUMP_P (insn) | |
6155 | && single_set (insn) | |
6156 | && any_condjump_p (insn)) | |
6157 | { | |
6158 | basic_block next_bb = ebb_data->path[path_entry + 1].bb; | |
6159 | bool taken = (next_bb == BRANCH_EDGE (bb)->dest); | |
6160 | record_jump_equiv (insn, taken); | |
6161 | } | |
96fb470d SB |
6162 | |
6163 | #ifdef HAVE_cc0 | |
6164 | /* Clear the CC0-tracking related insns, they can't provide | |
6165 | useful information across basic block boundaries. */ | |
6166 | prev_insn_cc0 = 0; | |
6167 | #endif | |
932ad4d9 | 6168 | } |
7afe21cc | 6169 | |
932ad4d9 | 6170 | gcc_assert (next_qty <= max_qty); |
7afe21cc | 6171 | |
932ad4d9 | 6172 | free (qty_table); |
7afe21cc RK |
6173 | } |
6174 | \f | |
7afe21cc RK |
6175 | /* Perform cse on the instructions of a function. |
6176 | F is the first instruction. | |
6177 | NREGS is one plus the highest pseudo-reg number used in the instruction. | |
6178 | ||
7afe21cc RK |
6179 | Returns 1 if jump_optimize should be redone due to simplifications |
6180 | in conditional jump instructions. */ | |
6181 | ||
6182 | int | |
932ad4d9 | 6183 | cse_main (rtx f ATTRIBUTE_UNUSED, int nregs) |
7afe21cc | 6184 | { |
932ad4d9 SB |
6185 | struct cse_basic_block_data ebb_data; |
6186 | basic_block bb; | |
27511c65 | 6187 | int *rc_order = XNEWVEC (int, last_basic_block); |
932ad4d9 | 6188 | int i, n_blocks; |
7afe21cc | 6189 | |
bc5e3b54 KH |
6190 | init_cse_reg_info (nregs); |
6191 | ||
932ad4d9 SB |
6192 | ebb_data.path = XNEWVEC (struct branch_path, |
6193 | PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH)); | |
9bf8cfbf | 6194 | |
7afe21cc | 6195 | cse_jumps_altered = 0; |
a5dfb4ee | 6196 | recorded_label_ref = 0; |
7afe21cc | 6197 | constant_pool_entries_cost = 0; |
dd0ba281 | 6198 | constant_pool_entries_regcost = 0; |
932ad4d9 SB |
6199 | ebb_data.path_size = 0; |
6200 | ebb_data.nsets = 0; | |
2f93eea8 | 6201 | rtl_hooks = cse_rtl_hooks; |
7afe21cc RK |
6202 | |
6203 | init_recog (); | |
9ae8ffe7 | 6204 | init_alias_analysis (); |
7afe21cc | 6205 | |
5ed6ace5 | 6206 | reg_eqv_table = XNEWVEC (struct reg_eqv_elem, nregs); |
7afe21cc | 6207 | |
932ad4d9 SB |
6208 | /* Set up the table of already visited basic blocks. */ |
6209 | cse_visited_basic_blocks = sbitmap_alloc (last_basic_block); | |
6210 | sbitmap_zero (cse_visited_basic_blocks); | |
7afe21cc | 6211 | |
932ad4d9 SB |
6212 | /* Compute the mapping from uids to cuids. |
6213 | CUIDs are numbers assigned to insns, like uids, except that | |
6214 | that cuids increase monotonically through the code. */ | |
164c8956 | 6215 | max_uid = get_max_uid (); |
5ed6ace5 | 6216 | uid_cuid = XCNEWVEC (int, max_uid + 1); |
932ad4d9 SB |
6217 | i = 0; |
6218 | FOR_EACH_BB (bb) | |
7afe21cc | 6219 | { |
932ad4d9 SB |
6220 | rtx insn; |
6221 | FOR_BB_INSNS (bb, insn) | |
6222 | INSN_CUID (insn) = ++i; | |
7afe21cc RK |
6223 | } |
6224 | ||
a7582f7c | 6225 | /* Loop over basic blocks in reverse completion order (RPO), |
932ad4d9 | 6226 | excluding the ENTRY and EXIT blocks. */ |
27511c65 | 6227 | n_blocks = pre_and_rev_post_order_compute (NULL, rc_order, false); |
932ad4d9 SB |
6228 | i = 0; |
6229 | while (i < n_blocks) | |
7afe21cc | 6230 | { |
a7582f7c | 6231 | /* Find the first block in the RPO queue that we have not yet |
932ad4d9 SB |
6232 | processed before. */ |
6233 | do | |
e9a25f70 | 6234 | { |
27511c65 | 6235 | bb = BASIC_BLOCK (rc_order[i++]); |
e9a25f70 | 6236 | } |
932ad4d9 SB |
6237 | while (TEST_BIT (cse_visited_basic_blocks, bb->index) |
6238 | && i < n_blocks); | |
7afe21cc | 6239 | |
932ad4d9 SB |
6240 | /* Find all paths starting with BB, and process them. */ |
6241 | while (cse_find_path (bb, &ebb_data, flag_cse_follow_jumps)) | |
7afe21cc | 6242 | { |
932ad4d9 SB |
6243 | /* Pre-scan the path. */ |
6244 | cse_prescan_path (&ebb_data); | |
7afe21cc | 6245 | |
932ad4d9 SB |
6246 | /* If this basic block has no sets, skip it. */ |
6247 | if (ebb_data.nsets == 0) | |
6248 | continue; | |
7afe21cc | 6249 | |
2e226e66 | 6250 | /* Get a reasonable estimate for the maximum number of qty's |
932ad4d9 SB |
6251 | needed for this path. For this, we take the number of sets |
6252 | and multiply that by MAX_RECOG_OPERANDS. */ | |
6253 | max_qty = ebb_data.nsets * MAX_RECOG_OPERANDS; | |
6254 | cse_basic_block_start = ebb_data.low_cuid; | |
6255 | cse_basic_block_end = ebb_data.high_cuid; | |
7afe21cc | 6256 | |
932ad4d9 SB |
6257 | /* Dump the path we're about to process. */ |
6258 | if (dump_file) | |
6259 | cse_dump_path (&ebb_data, ebb_data.nsets, dump_file); | |
6a5293dc | 6260 | |
932ad4d9 | 6261 | cse_extended_basic_block (&ebb_data); |
7afe21cc | 6262 | } |
7afe21cc RK |
6263 | } |
6264 | ||
932ad4d9 SB |
6265 | /* Clean up. */ |
6266 | end_alias_analysis (); | |
6267 | free (uid_cuid); | |
6268 | free (reg_eqv_table); | |
6269 | free (ebb_data.path); | |
6270 | sbitmap_free (cse_visited_basic_blocks); | |
27511c65 | 6271 | free (rc_order); |
932ad4d9 | 6272 | rtl_hooks = general_rtl_hooks; |
75c6bd46 | 6273 | |
932ad4d9 | 6274 | return cse_jumps_altered || recorded_label_ref; |
7afe21cc RK |
6275 | } |
6276 | \f | |
be8ac49a | 6277 | /* Called via for_each_rtx to see if an insn is using a LABEL_REF for which |
45c23566 | 6278 | there isn't a REG_LABEL note. Return one if so. DATA is the insn. */ |
be8ac49a RK |
6279 | |
6280 | static int | |
7080f735 | 6281 | check_for_label_ref (rtx *rtl, void *data) |
be8ac49a RK |
6282 | { |
6283 | rtx insn = (rtx) data; | |
6284 | ||
6285 | /* If this insn uses a LABEL_REF and there isn't a REG_LABEL note for it, | |
6286 | we must rerun jump since it needs to place the note. If this is a | |
6287 | LABEL_REF for a CODE_LABEL that isn't in the insn chain, don't do this | |
ec5c56db | 6288 | since no REG_LABEL will be added. */ |
be8ac49a | 6289 | return (GET_CODE (*rtl) == LABEL_REF |
45c23566 | 6290 | && ! LABEL_REF_NONLOCAL_P (*rtl) |
4838c5ee | 6291 | && LABEL_P (XEXP (*rtl, 0)) |
be8ac49a RK |
6292 | && INSN_UID (XEXP (*rtl, 0)) != 0 |
6293 | && ! find_reg_note (insn, REG_LABEL, XEXP (*rtl, 0))); | |
6294 | } | |
6295 | \f | |
7afe21cc RK |
6296 | /* Count the number of times registers are used (not set) in X. |
6297 | COUNTS is an array in which we accumulate the count, INCR is how much | |
b92ba6ff R |
6298 | we count each register usage. |
6299 | ||
6300 | Don't count a usage of DEST, which is the SET_DEST of a SET which | |
6301 | contains X in its SET_SRC. This is because such a SET does not | |
6302 | modify the liveness of DEST. | |
6303 | DEST is set to pc_rtx for a trapping insn, which means that we must count | |
6304 | uses of a SET_DEST regardless because the insn can't be deleted here. */ | |
7afe21cc RK |
6305 | |
6306 | static void | |
b92ba6ff | 6307 | count_reg_usage (rtx x, int *counts, rtx dest, int incr) |
7afe21cc | 6308 | { |
f1e7c95f | 6309 | enum rtx_code code; |
b17d5d7c | 6310 | rtx note; |
6f7d635c | 6311 | const char *fmt; |
7afe21cc RK |
6312 | int i, j; |
6313 | ||
f1e7c95f RK |
6314 | if (x == 0) |
6315 | return; | |
6316 | ||
6317 | switch (code = GET_CODE (x)) | |
7afe21cc RK |
6318 | { |
6319 | case REG: | |
b92ba6ff R |
6320 | if (x != dest) |
6321 | counts[REGNO (x)] += incr; | |
7afe21cc RK |
6322 | return; |
6323 | ||
6324 | case PC: | |
6325 | case CC0: | |
6326 | case CONST: | |
6327 | case CONST_INT: | |
6328 | case CONST_DOUBLE: | |
69ef87e2 | 6329 | case CONST_VECTOR: |
7afe21cc RK |
6330 | case SYMBOL_REF: |
6331 | case LABEL_REF: | |
02e39abc JL |
6332 | return; |
6333 | ||
278a83b2 | 6334 | case CLOBBER: |
02e39abc JL |
6335 | /* If we are clobbering a MEM, mark any registers inside the address |
6336 | as being used. */ | |
3c0cb5de | 6337 | if (MEM_P (XEXP (x, 0))) |
b92ba6ff | 6338 | count_reg_usage (XEXP (XEXP (x, 0), 0), counts, NULL_RTX, incr); |
7afe21cc RK |
6339 | return; |
6340 | ||
6341 | case SET: | |
6342 | /* Unless we are setting a REG, count everything in SET_DEST. */ | |
f8cfc6aa | 6343 | if (!REG_P (SET_DEST (x))) |
b92ba6ff R |
6344 | count_reg_usage (SET_DEST (x), counts, NULL_RTX, incr); |
6345 | count_reg_usage (SET_SRC (x), counts, | |
6346 | dest ? dest : SET_DEST (x), | |
6347 | incr); | |
7afe21cc RK |
6348 | return; |
6349 | ||
f1e7c95f | 6350 | case CALL_INSN: |
7afe21cc RK |
6351 | case INSN: |
6352 | case JUMP_INSN: | |
b92ba6ff R |
6353 | /* We expect dest to be NULL_RTX here. If the insn may trap, mark |
6354 | this fact by setting DEST to pc_rtx. */ | |
6355 | if (flag_non_call_exceptions && may_trap_p (PATTERN (x))) | |
6356 | dest = pc_rtx; | |
6357 | if (code == CALL_INSN) | |
6358 | count_reg_usage (CALL_INSN_FUNCTION_USAGE (x), counts, dest, incr); | |
6359 | count_reg_usage (PATTERN (x), counts, dest, incr); | |
7afe21cc RK |
6360 | |
6361 | /* Things used in a REG_EQUAL note aren't dead since loop may try to | |
6362 | use them. */ | |
6363 | ||
b17d5d7c ZD |
6364 | note = find_reg_equal_equiv_note (x); |
6365 | if (note) | |
839844be R |
6366 | { |
6367 | rtx eqv = XEXP (note, 0); | |
6368 | ||
6369 | if (GET_CODE (eqv) == EXPR_LIST) | |
6370 | /* This REG_EQUAL note describes the result of a function call. | |
6371 | Process all the arguments. */ | |
6372 | do | |
6373 | { | |
b92ba6ff | 6374 | count_reg_usage (XEXP (eqv, 0), counts, dest, incr); |
839844be R |
6375 | eqv = XEXP (eqv, 1); |
6376 | } | |
6377 | while (eqv && GET_CODE (eqv) == EXPR_LIST); | |
6378 | else | |
b92ba6ff | 6379 | count_reg_usage (eqv, counts, dest, incr); |
839844be | 6380 | } |
7afe21cc RK |
6381 | return; |
6382 | ||
ee960939 OH |
6383 | case EXPR_LIST: |
6384 | if (REG_NOTE_KIND (x) == REG_EQUAL | |
6385 | || (REG_NOTE_KIND (x) != REG_NONNEG && GET_CODE (XEXP (x,0)) == USE) | |
6386 | /* FUNCTION_USAGE expression lists may include (CLOBBER (mem /u)), | |
6387 | involving registers in the address. */ | |
6388 | || GET_CODE (XEXP (x, 0)) == CLOBBER) | |
b92ba6ff | 6389 | count_reg_usage (XEXP (x, 0), counts, NULL_RTX, incr); |
ee960939 | 6390 | |
b92ba6ff | 6391 | count_reg_usage (XEXP (x, 1), counts, NULL_RTX, incr); |
ee960939 OH |
6392 | return; |
6393 | ||
a6c14a64 | 6394 | case ASM_OPERANDS: |
b92ba6ff R |
6395 | /* If the asm is volatile, then this insn cannot be deleted, |
6396 | and so the inputs *must* be live. */ | |
6397 | if (MEM_VOLATILE_P (x)) | |
6398 | dest = NULL_RTX; | |
a6c14a64 RH |
6399 | /* Iterate over just the inputs, not the constraints as well. */ |
6400 | for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--) | |
b92ba6ff | 6401 | count_reg_usage (ASM_OPERANDS_INPUT (x, i), counts, dest, incr); |
a6c14a64 RH |
6402 | return; |
6403 | ||
7afe21cc | 6404 | case INSN_LIST: |
341c100f | 6405 | gcc_unreachable (); |
278a83b2 | 6406 | |
e9a25f70 JL |
6407 | default: |
6408 | break; | |
7afe21cc RK |
6409 | } |
6410 | ||
6411 | fmt = GET_RTX_FORMAT (code); | |
6412 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
6413 | { | |
6414 | if (fmt[i] == 'e') | |
b92ba6ff | 6415 | count_reg_usage (XEXP (x, i), counts, dest, incr); |
7afe21cc RK |
6416 | else if (fmt[i] == 'E') |
6417 | for (j = XVECLEN (x, i) - 1; j >= 0; j--) | |
b92ba6ff | 6418 | count_reg_usage (XVECEXP (x, i, j), counts, dest, incr); |
7afe21cc RK |
6419 | } |
6420 | } | |
6421 | \f | |
4793dca1 JH |
6422 | /* Return true if set is live. */ |
6423 | static bool | |
7080f735 AJ |
6424 | set_live_p (rtx set, rtx insn ATTRIBUTE_UNUSED, /* Only used with HAVE_cc0. */ |
6425 | int *counts) | |
4793dca1 JH |
6426 | { |
6427 | #ifdef HAVE_cc0 | |
6428 | rtx tem; | |
6429 | #endif | |
6430 | ||
6431 | if (set_noop_p (set)) | |
6432 | ; | |
6433 | ||
6434 | #ifdef HAVE_cc0 | |
6435 | else if (GET_CODE (SET_DEST (set)) == CC0 | |
6436 | && !side_effects_p (SET_SRC (set)) | |
6437 | && ((tem = next_nonnote_insn (insn)) == 0 | |
6438 | || !INSN_P (tem) | |
6439 | || !reg_referenced_p (cc0_rtx, PATTERN (tem)))) | |
6440 | return false; | |
6441 | #endif | |
f8cfc6aa | 6442 | else if (!REG_P (SET_DEST (set)) |
4793dca1 JH |
6443 | || REGNO (SET_DEST (set)) < FIRST_PSEUDO_REGISTER |
6444 | || counts[REGNO (SET_DEST (set))] != 0 | |
8fff4fc1 | 6445 | || side_effects_p (SET_SRC (set))) |
4793dca1 JH |
6446 | return true; |
6447 | return false; | |
6448 | } | |
6449 | ||
6450 | /* Return true if insn is live. */ | |
6451 | ||
6452 | static bool | |
7080f735 | 6453 | insn_live_p (rtx insn, int *counts) |
4793dca1 JH |
6454 | { |
6455 | int i; | |
a3745024 | 6456 | if (flag_non_call_exceptions && may_trap_p (PATTERN (insn))) |
a646f6cc AH |
6457 | return true; |
6458 | else if (GET_CODE (PATTERN (insn)) == SET) | |
0021de69 | 6459 | return set_live_p (PATTERN (insn), insn, counts); |
4793dca1 | 6460 | else if (GET_CODE (PATTERN (insn)) == PARALLEL) |
0021de69 DB |
6461 | { |
6462 | for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--) | |
6463 | { | |
6464 | rtx elt = XVECEXP (PATTERN (insn), 0, i); | |
4793dca1 | 6465 | |
0021de69 DB |
6466 | if (GET_CODE (elt) == SET) |
6467 | { | |
6468 | if (set_live_p (elt, insn, counts)) | |
6469 | return true; | |
6470 | } | |
6471 | else if (GET_CODE (elt) != CLOBBER && GET_CODE (elt) != USE) | |
6472 | return true; | |
6473 | } | |
6474 | return false; | |
6475 | } | |
4793dca1 JH |
6476 | else |
6477 | return true; | |
6478 | } | |
6479 | ||
6480 | /* Return true if libcall is dead as a whole. */ | |
6481 | ||
6482 | static bool | |
7080f735 | 6483 | dead_libcall_p (rtx insn, int *counts) |
4793dca1 | 6484 | { |
0c19a26f RS |
6485 | rtx note, set, new; |
6486 | ||
4793dca1 JH |
6487 | /* See if there's a REG_EQUAL note on this insn and try to |
6488 | replace the source with the REG_EQUAL expression. | |
6489 | ||
6490 | We assume that insns with REG_RETVALs can only be reg->reg | |
6491 | copies at this point. */ | |
6492 | note = find_reg_note (insn, REG_EQUAL, NULL_RTX); | |
0c19a26f RS |
6493 | if (!note) |
6494 | return false; | |
6495 | ||
6496 | set = single_set (insn); | |
6497 | if (!set) | |
6498 | return false; | |
4793dca1 | 6499 | |
0c19a26f RS |
6500 | new = simplify_rtx (XEXP (note, 0)); |
6501 | if (!new) | |
6502 | new = XEXP (note, 0); | |
4793dca1 | 6503 | |
0c19a26f | 6504 | /* While changing insn, we must update the counts accordingly. */ |
b92ba6ff | 6505 | count_reg_usage (insn, counts, NULL_RTX, -1); |
1e150f2c | 6506 | |
0c19a26f RS |
6507 | if (validate_change (insn, &SET_SRC (set), new, 0)) |
6508 | { | |
b92ba6ff | 6509 | count_reg_usage (insn, counts, NULL_RTX, 1); |
0c19a26f RS |
6510 | remove_note (insn, find_reg_note (insn, REG_RETVAL, NULL_RTX)); |
6511 | remove_note (insn, note); | |
6512 | return true; | |
6513 | } | |
6514 | ||
6515 | if (CONSTANT_P (new)) | |
6516 | { | |
6517 | new = force_const_mem (GET_MODE (SET_DEST (set)), new); | |
6518 | if (new && validate_change (insn, &SET_SRC (set), new, 0)) | |
4793dca1 | 6519 | { |
b92ba6ff | 6520 | count_reg_usage (insn, counts, NULL_RTX, 1); |
4793dca1 | 6521 | remove_note (insn, find_reg_note (insn, REG_RETVAL, NULL_RTX)); |
1e150f2c | 6522 | remove_note (insn, note); |
4793dca1 JH |
6523 | return true; |
6524 | } | |
6525 | } | |
7080f735 | 6526 | |
b92ba6ff | 6527 | count_reg_usage (insn, counts, NULL_RTX, 1); |
4793dca1 JH |
6528 | return false; |
6529 | } | |
6530 | ||
7afe21cc RK |
6531 | /* Scan all the insns and delete any that are dead; i.e., they store a register |
6532 | that is never used or they copy a register to itself. | |
6533 | ||
c6a26dc4 JL |
6534 | This is used to remove insns made obviously dead by cse, loop or other |
6535 | optimizations. It improves the heuristics in loop since it won't try to | |
6536 | move dead invariants out of loops or make givs for dead quantities. The | |
6537 | remaining passes of the compilation are also sped up. */ | |
7afe21cc | 6538 | |
3dec4024 | 6539 | int |
7080f735 | 6540 | delete_trivially_dead_insns (rtx insns, int nreg) |
7afe21cc | 6541 | { |
4da896b2 | 6542 | int *counts; |
77fa0940 | 6543 | rtx insn, prev; |
614bb5d4 | 6544 | int in_libcall = 0, dead_libcall = 0; |
65e9fa10 | 6545 | int ndead = 0; |
7afe21cc | 6546 | |
3dec4024 | 6547 | timevar_push (TV_DELETE_TRIVIALLY_DEAD); |
7afe21cc | 6548 | /* First count the number of times each register is used. */ |
5ed6ace5 | 6549 | counts = XCNEWVEC (int, nreg); |
03ce14db KH |
6550 | for (insn = insns; insn; insn = NEXT_INSN (insn)) |
6551 | if (INSN_P (insn)) | |
b92ba6ff | 6552 | count_reg_usage (insn, counts, NULL_RTX, 1); |
7afe21cc | 6553 | |
65e9fa10 KH |
6554 | /* Go from the last insn to the first and delete insns that only set unused |
6555 | registers or copy a register to itself. As we delete an insn, remove | |
6556 | usage counts for registers it uses. | |
0cedb36c | 6557 | |
65e9fa10 KH |
6558 | The first jump optimization pass may leave a real insn as the last |
6559 | insn in the function. We must not skip that insn or we may end | |
6560 | up deleting code that is not really dead. */ | |
03ce14db | 6561 | for (insn = get_last_insn (); insn; insn = prev) |
65e9fa10 KH |
6562 | { |
6563 | int live_insn = 0; | |
7afe21cc | 6564 | |
03ce14db KH |
6565 | prev = PREV_INSN (insn); |
6566 | if (!INSN_P (insn)) | |
6567 | continue; | |
7afe21cc | 6568 | |
65e9fa10 KH |
6569 | /* Don't delete any insns that are part of a libcall block unless |
6570 | we can delete the whole libcall block. | |
6571 | ||
6572 | Flow or loop might get confused if we did that. Remember | |
6573 | that we are scanning backwards. */ | |
6574 | if (find_reg_note (insn, REG_RETVAL, NULL_RTX)) | |
6575 | { | |
6576 | in_libcall = 1; | |
6577 | live_insn = 1; | |
6578 | dead_libcall = dead_libcall_p (insn, counts); | |
6579 | } | |
6580 | else if (in_libcall) | |
6581 | live_insn = ! dead_libcall; | |
6582 | else | |
6583 | live_insn = insn_live_p (insn, counts); | |
7afe21cc | 6584 | |
65e9fa10 KH |
6585 | /* If this is a dead insn, delete it and show registers in it aren't |
6586 | being used. */ | |
7afe21cc | 6587 | |
65e9fa10 KH |
6588 | if (! live_insn) |
6589 | { | |
b92ba6ff | 6590 | count_reg_usage (insn, counts, NULL_RTX, -1); |
65e9fa10 KH |
6591 | delete_insn_and_edges (insn); |
6592 | ndead++; | |
6593 | } | |
e4890d45 | 6594 | |
2b5936fd | 6595 | if (in_libcall && find_reg_note (insn, REG_LIBCALL, NULL_RTX)) |
65e9fa10 KH |
6596 | { |
6597 | in_libcall = 0; | |
6598 | dead_libcall = 0; | |
614bb5d4 | 6599 | } |
68252e27 | 6600 | } |
4da896b2 | 6601 | |
c263766c | 6602 | if (dump_file && ndead) |
65e9fa10 KH |
6603 | fprintf (dump_file, "Deleted %i trivially dead insns\n", |
6604 | ndead); | |
4da896b2 MM |
6605 | /* Clean up. */ |
6606 | free (counts); | |
3dec4024 JH |
6607 | timevar_pop (TV_DELETE_TRIVIALLY_DEAD); |
6608 | return ndead; | |
7afe21cc | 6609 | } |
e129d93a ILT |
6610 | |
6611 | /* This function is called via for_each_rtx. The argument, NEWREG, is | |
6612 | a condition code register with the desired mode. If we are looking | |
6613 | at the same register in a different mode, replace it with | |
6614 | NEWREG. */ | |
6615 | ||
6616 | static int | |
6617 | cse_change_cc_mode (rtx *loc, void *data) | |
6618 | { | |
fc188d37 | 6619 | struct change_cc_mode_args* args = (struct change_cc_mode_args*)data; |
e129d93a ILT |
6620 | |
6621 | if (*loc | |
f8cfc6aa | 6622 | && REG_P (*loc) |
fc188d37 AK |
6623 | && REGNO (*loc) == REGNO (args->newreg) |
6624 | && GET_MODE (*loc) != GET_MODE (args->newreg)) | |
e129d93a | 6625 | { |
fc188d37 AK |
6626 | validate_change (args->insn, loc, args->newreg, 1); |
6627 | ||
e129d93a ILT |
6628 | return -1; |
6629 | } | |
6630 | return 0; | |
6631 | } | |
6632 | ||
fc188d37 AK |
6633 | /* Change the mode of any reference to the register REGNO (NEWREG) to |
6634 | GET_MODE (NEWREG) in INSN. */ | |
6635 | ||
6636 | static void | |
6637 | cse_change_cc_mode_insn (rtx insn, rtx newreg) | |
6638 | { | |
6639 | struct change_cc_mode_args args; | |
6640 | int success; | |
6641 | ||
6642 | if (!INSN_P (insn)) | |
6643 | return; | |
6644 | ||
6645 | args.insn = insn; | |
6646 | args.newreg = newreg; | |
6647 | ||
6648 | for_each_rtx (&PATTERN (insn), cse_change_cc_mode, &args); | |
6649 | for_each_rtx (®_NOTES (insn), cse_change_cc_mode, &args); | |
6650 | ||
6651 | /* If the following assertion was triggered, there is most probably | |
6652 | something wrong with the cc_modes_compatible back end function. | |
6653 | CC modes only can be considered compatible if the insn - with the mode | |
6654 | replaced by any of the compatible modes - can still be recognized. */ | |
6655 | success = apply_change_group (); | |
6656 | gcc_assert (success); | |
6657 | } | |
6658 | ||
e129d93a ILT |
6659 | /* Change the mode of any reference to the register REGNO (NEWREG) to |
6660 | GET_MODE (NEWREG), starting at START. Stop before END. Stop at | |
2e802a6f | 6661 | any instruction which modifies NEWREG. */ |
e129d93a ILT |
6662 | |
6663 | static void | |
6664 | cse_change_cc_mode_insns (rtx start, rtx end, rtx newreg) | |
6665 | { | |
6666 | rtx insn; | |
6667 | ||
6668 | for (insn = start; insn != end; insn = NEXT_INSN (insn)) | |
6669 | { | |
6670 | if (! INSN_P (insn)) | |
6671 | continue; | |
6672 | ||
2e802a6f | 6673 | if (reg_set_p (newreg, insn)) |
e129d93a ILT |
6674 | return; |
6675 | ||
fc188d37 | 6676 | cse_change_cc_mode_insn (insn, newreg); |
e129d93a ILT |
6677 | } |
6678 | } | |
6679 | ||
6680 | /* BB is a basic block which finishes with CC_REG as a condition code | |
6681 | register which is set to CC_SRC. Look through the successors of BB | |
6682 | to find blocks which have a single predecessor (i.e., this one), | |
6683 | and look through those blocks for an assignment to CC_REG which is | |
6684 | equivalent to CC_SRC. CAN_CHANGE_MODE indicates whether we are | |
6685 | permitted to change the mode of CC_SRC to a compatible mode. This | |
6686 | returns VOIDmode if no equivalent assignments were found. | |
6687 | Otherwise it returns the mode which CC_SRC should wind up with. | |
6688 | ||
6689 | The main complexity in this function is handling the mode issues. | |
6690 | We may have more than one duplicate which we can eliminate, and we | |
6691 | try to find a mode which will work for multiple duplicates. */ | |
6692 | ||
6693 | static enum machine_mode | |
6694 | cse_cc_succs (basic_block bb, rtx cc_reg, rtx cc_src, bool can_change_mode) | |
6695 | { | |
6696 | bool found_equiv; | |
6697 | enum machine_mode mode; | |
6698 | unsigned int insn_count; | |
6699 | edge e; | |
6700 | rtx insns[2]; | |
6701 | enum machine_mode modes[2]; | |
6702 | rtx last_insns[2]; | |
6703 | unsigned int i; | |
6704 | rtx newreg; | |
628f6a4e | 6705 | edge_iterator ei; |
e129d93a ILT |
6706 | |
6707 | /* We expect to have two successors. Look at both before picking | |
6708 | the final mode for the comparison. If we have more successors | |
6709 | (i.e., some sort of table jump, although that seems unlikely), | |
6710 | then we require all beyond the first two to use the same | |
6711 | mode. */ | |
6712 | ||
6713 | found_equiv = false; | |
6714 | mode = GET_MODE (cc_src); | |
6715 | insn_count = 0; | |
628f6a4e | 6716 | FOR_EACH_EDGE (e, ei, bb->succs) |
e129d93a ILT |
6717 | { |
6718 | rtx insn; | |
6719 | rtx end; | |
6720 | ||
6721 | if (e->flags & EDGE_COMPLEX) | |
6722 | continue; | |
6723 | ||
628f6a4e | 6724 | if (EDGE_COUNT (e->dest->preds) != 1 |
e129d93a ILT |
6725 | || e->dest == EXIT_BLOCK_PTR) |
6726 | continue; | |
6727 | ||
6728 | end = NEXT_INSN (BB_END (e->dest)); | |
6729 | for (insn = BB_HEAD (e->dest); insn != end; insn = NEXT_INSN (insn)) | |
6730 | { | |
6731 | rtx set; | |
6732 | ||
6733 | if (! INSN_P (insn)) | |
6734 | continue; | |
6735 | ||
6736 | /* If CC_SRC is modified, we have to stop looking for | |
6737 | something which uses it. */ | |
6738 | if (modified_in_p (cc_src, insn)) | |
6739 | break; | |
6740 | ||
6741 | /* Check whether INSN sets CC_REG to CC_SRC. */ | |
6742 | set = single_set (insn); | |
6743 | if (set | |
f8cfc6aa | 6744 | && REG_P (SET_DEST (set)) |
e129d93a ILT |
6745 | && REGNO (SET_DEST (set)) == REGNO (cc_reg)) |
6746 | { | |
6747 | bool found; | |
6748 | enum machine_mode set_mode; | |
6749 | enum machine_mode comp_mode; | |
6750 | ||
6751 | found = false; | |
6752 | set_mode = GET_MODE (SET_SRC (set)); | |
6753 | comp_mode = set_mode; | |
6754 | if (rtx_equal_p (cc_src, SET_SRC (set))) | |
6755 | found = true; | |
6756 | else if (GET_CODE (cc_src) == COMPARE | |
6757 | && GET_CODE (SET_SRC (set)) == COMPARE | |
1f44254c | 6758 | && mode != set_mode |
e129d93a ILT |
6759 | && rtx_equal_p (XEXP (cc_src, 0), |
6760 | XEXP (SET_SRC (set), 0)) | |
6761 | && rtx_equal_p (XEXP (cc_src, 1), | |
6762 | XEXP (SET_SRC (set), 1))) | |
6763 | ||
6764 | { | |
5fd9b178 | 6765 | comp_mode = targetm.cc_modes_compatible (mode, set_mode); |
e129d93a ILT |
6766 | if (comp_mode != VOIDmode |
6767 | && (can_change_mode || comp_mode == mode)) | |
6768 | found = true; | |
6769 | } | |
6770 | ||
6771 | if (found) | |
6772 | { | |
6773 | found_equiv = true; | |
1f44254c | 6774 | if (insn_count < ARRAY_SIZE (insns)) |
e129d93a ILT |
6775 | { |
6776 | insns[insn_count] = insn; | |
6777 | modes[insn_count] = set_mode; | |
6778 | last_insns[insn_count] = end; | |
6779 | ++insn_count; | |
6780 | ||
1f44254c ILT |
6781 | if (mode != comp_mode) |
6782 | { | |
341c100f | 6783 | gcc_assert (can_change_mode); |
1f44254c | 6784 | mode = comp_mode; |
fc188d37 AK |
6785 | |
6786 | /* The modified insn will be re-recognized later. */ | |
1f44254c ILT |
6787 | PUT_MODE (cc_src, mode); |
6788 | } | |
e129d93a ILT |
6789 | } |
6790 | else | |
6791 | { | |
6792 | if (set_mode != mode) | |
1f44254c ILT |
6793 | { |
6794 | /* We found a matching expression in the | |
6795 | wrong mode, but we don't have room to | |
6796 | store it in the array. Punt. This case | |
6797 | should be rare. */ | |
6798 | break; | |
6799 | } | |
e129d93a ILT |
6800 | /* INSN sets CC_REG to a value equal to CC_SRC |
6801 | with the right mode. We can simply delete | |
6802 | it. */ | |
6803 | delete_insn (insn); | |
6804 | } | |
6805 | ||
6806 | /* We found an instruction to delete. Keep looking, | |
6807 | in the hopes of finding a three-way jump. */ | |
6808 | continue; | |
6809 | } | |
6810 | ||
6811 | /* We found an instruction which sets the condition | |
6812 | code, so don't look any farther. */ | |
6813 | break; | |
6814 | } | |
6815 | ||
6816 | /* If INSN sets CC_REG in some other way, don't look any | |
6817 | farther. */ | |
6818 | if (reg_set_p (cc_reg, insn)) | |
6819 | break; | |
6820 | } | |
6821 | ||
6822 | /* If we fell off the bottom of the block, we can keep looking | |
6823 | through successors. We pass CAN_CHANGE_MODE as false because | |
6824 | we aren't prepared to handle compatibility between the | |
6825 | further blocks and this block. */ | |
6826 | if (insn == end) | |
6827 | { | |
1f44254c ILT |
6828 | enum machine_mode submode; |
6829 | ||
6830 | submode = cse_cc_succs (e->dest, cc_reg, cc_src, false); | |
6831 | if (submode != VOIDmode) | |
6832 | { | |
341c100f | 6833 | gcc_assert (submode == mode); |
1f44254c ILT |
6834 | found_equiv = true; |
6835 | can_change_mode = false; | |
6836 | } | |
e129d93a ILT |
6837 | } |
6838 | } | |
6839 | ||
6840 | if (! found_equiv) | |
6841 | return VOIDmode; | |
6842 | ||
6843 | /* Now INSN_COUNT is the number of instructions we found which set | |
6844 | CC_REG to a value equivalent to CC_SRC. The instructions are in | |
6845 | INSNS. The modes used by those instructions are in MODES. */ | |
6846 | ||
6847 | newreg = NULL_RTX; | |
6848 | for (i = 0; i < insn_count; ++i) | |
6849 | { | |
6850 | if (modes[i] != mode) | |
6851 | { | |
6852 | /* We need to change the mode of CC_REG in INSNS[i] and | |
6853 | subsequent instructions. */ | |
6854 | if (! newreg) | |
6855 | { | |
6856 | if (GET_MODE (cc_reg) == mode) | |
6857 | newreg = cc_reg; | |
6858 | else | |
6859 | newreg = gen_rtx_REG (mode, REGNO (cc_reg)); | |
6860 | } | |
6861 | cse_change_cc_mode_insns (NEXT_INSN (insns[i]), last_insns[i], | |
6862 | newreg); | |
6863 | } | |
6864 | ||
6865 | delete_insn (insns[i]); | |
6866 | } | |
6867 | ||
6868 | return mode; | |
6869 | } | |
6870 | ||
6871 | /* If we have a fixed condition code register (or two), walk through | |
6872 | the instructions and try to eliminate duplicate assignments. */ | |
6873 | ||
cab2264d | 6874 | static void |
e129d93a ILT |
6875 | cse_condition_code_reg (void) |
6876 | { | |
6877 | unsigned int cc_regno_1; | |
6878 | unsigned int cc_regno_2; | |
6879 | rtx cc_reg_1; | |
6880 | rtx cc_reg_2; | |
6881 | basic_block bb; | |
6882 | ||
5fd9b178 | 6883 | if (! targetm.fixed_condition_code_regs (&cc_regno_1, &cc_regno_2)) |
e129d93a ILT |
6884 | return; |
6885 | ||
6886 | cc_reg_1 = gen_rtx_REG (CCmode, cc_regno_1); | |
6887 | if (cc_regno_2 != INVALID_REGNUM) | |
6888 | cc_reg_2 = gen_rtx_REG (CCmode, cc_regno_2); | |
6889 | else | |
6890 | cc_reg_2 = NULL_RTX; | |
6891 | ||
6892 | FOR_EACH_BB (bb) | |
6893 | { | |
6894 | rtx last_insn; | |
6895 | rtx cc_reg; | |
6896 | rtx insn; | |
6897 | rtx cc_src_insn; | |
6898 | rtx cc_src; | |
6899 | enum machine_mode mode; | |
1f44254c | 6900 | enum machine_mode orig_mode; |
e129d93a ILT |
6901 | |
6902 | /* Look for blocks which end with a conditional jump based on a | |
6903 | condition code register. Then look for the instruction which | |
6904 | sets the condition code register. Then look through the | |
6905 | successor blocks for instructions which set the condition | |
6906 | code register to the same value. There are other possible | |
6907 | uses of the condition code register, but these are by far the | |
6908 | most common and the ones which we are most likely to be able | |
6909 | to optimize. */ | |
6910 | ||
6911 | last_insn = BB_END (bb); | |
4b4bf941 | 6912 | if (!JUMP_P (last_insn)) |
e129d93a ILT |
6913 | continue; |
6914 | ||
6915 | if (reg_referenced_p (cc_reg_1, PATTERN (last_insn))) | |
6916 | cc_reg = cc_reg_1; | |
6917 | else if (cc_reg_2 && reg_referenced_p (cc_reg_2, PATTERN (last_insn))) | |
6918 | cc_reg = cc_reg_2; | |
6919 | else | |
6920 | continue; | |
6921 | ||
6922 | cc_src_insn = NULL_RTX; | |
6923 | cc_src = NULL_RTX; | |
6924 | for (insn = PREV_INSN (last_insn); | |
6925 | insn && insn != PREV_INSN (BB_HEAD (bb)); | |
6926 | insn = PREV_INSN (insn)) | |
6927 | { | |
6928 | rtx set; | |
6929 | ||
6930 | if (! INSN_P (insn)) | |
6931 | continue; | |
6932 | set = single_set (insn); | |
6933 | if (set | |
f8cfc6aa | 6934 | && REG_P (SET_DEST (set)) |
e129d93a ILT |
6935 | && REGNO (SET_DEST (set)) == REGNO (cc_reg)) |
6936 | { | |
6937 | cc_src_insn = insn; | |
6938 | cc_src = SET_SRC (set); | |
6939 | break; | |
6940 | } | |
6941 | else if (reg_set_p (cc_reg, insn)) | |
6942 | break; | |
6943 | } | |
6944 | ||
6945 | if (! cc_src_insn) | |
6946 | continue; | |
6947 | ||
6948 | if (modified_between_p (cc_src, cc_src_insn, NEXT_INSN (last_insn))) | |
6949 | continue; | |
6950 | ||
6951 | /* Now CC_REG is a condition code register used for a | |
6952 | conditional jump at the end of the block, and CC_SRC, in | |
6953 | CC_SRC_INSN, is the value to which that condition code | |
6954 | register is set, and CC_SRC is still meaningful at the end of | |
6955 | the basic block. */ | |
6956 | ||
1f44254c | 6957 | orig_mode = GET_MODE (cc_src); |
e129d93a | 6958 | mode = cse_cc_succs (bb, cc_reg, cc_src, true); |
1f44254c | 6959 | if (mode != VOIDmode) |
e129d93a | 6960 | { |
341c100f | 6961 | gcc_assert (mode == GET_MODE (cc_src)); |
1f44254c | 6962 | if (mode != orig_mode) |
2e802a6f KH |
6963 | { |
6964 | rtx newreg = gen_rtx_REG (mode, REGNO (cc_reg)); | |
6965 | ||
fc188d37 | 6966 | cse_change_cc_mode_insn (cc_src_insn, newreg); |
2e802a6f KH |
6967 | |
6968 | /* Do the same in the following insns that use the | |
6969 | current value of CC_REG within BB. */ | |
6970 | cse_change_cc_mode_insns (NEXT_INSN (cc_src_insn), | |
6971 | NEXT_INSN (last_insn), | |
6972 | newreg); | |
6973 | } | |
e129d93a ILT |
6974 | } |
6975 | } | |
6976 | } | |
ef330312 PB |
6977 | \f |
6978 | ||
6979 | /* Perform common subexpression elimination. Nonzero value from | |
6980 | `cse_main' means that jumps were simplified and some code may now | |
6981 | be unreachable, so do jump optimization again. */ | |
6982 | static bool | |
6983 | gate_handle_cse (void) | |
6984 | { | |
6985 | return optimize > 0; | |
6986 | } | |
6987 | ||
c2924966 | 6988 | static unsigned int |
ef330312 PB |
6989 | rest_of_handle_cse (void) |
6990 | { | |
6991 | int tem; | |
ef330312 | 6992 | if (dump_file) |
5b4fdb20 | 6993 | dump_flow_info (dump_file, dump_flags); |
ef330312 PB |
6994 | |
6995 | reg_scan (get_insns (), max_reg_num ()); | |
6996 | ||
10d22567 | 6997 | tem = cse_main (get_insns (), max_reg_num ()); |
ef330312 PB |
6998 | |
6999 | /* If we are not running more CSE passes, then we are no longer | |
7000 | expecting CSE to be run. But always rerun it in a cheap mode. */ | |
7001 | cse_not_expected = !flag_rerun_cse_after_loop && !flag_gcse; | |
7002 | ||
7003 | if (tem) | |
932ad4d9 | 7004 | rebuild_jump_labels (get_insns ()); |
ef330312 PB |
7005 | |
7006 | if (tem || optimize > 1) | |
59994160 | 7007 | cleanup_cfg (CLEANUP_EXPENSIVE); |
932ad4d9 | 7008 | |
c2924966 | 7009 | return 0; |
ef330312 PB |
7010 | } |
7011 | ||
7012 | struct tree_opt_pass pass_cse = | |
7013 | { | |
7014 | "cse1", /* name */ | |
7015 | gate_handle_cse, /* gate */ | |
7016 | rest_of_handle_cse, /* execute */ | |
7017 | NULL, /* sub */ | |
7018 | NULL, /* next */ | |
7019 | 0, /* static_pass_number */ | |
7020 | TV_CSE, /* tv_id */ | |
7021 | 0, /* properties_required */ | |
7022 | 0, /* properties_provided */ | |
7023 | 0, /* properties_destroyed */ | |
7024 | 0, /* todo_flags_start */ | |
7025 | TODO_dump_func | | |
932ad4d9 SB |
7026 | TODO_ggc_collect | |
7027 | TODO_verify_flow, /* todo_flags_finish */ | |
ef330312 PB |
7028 | 's' /* letter */ |
7029 | }; | |
7030 | ||
7031 | ||
7032 | static bool | |
7033 | gate_handle_cse2 (void) | |
7034 | { | |
7035 | return optimize > 0 && flag_rerun_cse_after_loop; | |
7036 | } | |
7037 | ||
7038 | /* Run second CSE pass after loop optimizations. */ | |
c2924966 | 7039 | static unsigned int |
ef330312 PB |
7040 | rest_of_handle_cse2 (void) |
7041 | { | |
7042 | int tem; | |
7043 | ||
7044 | if (dump_file) | |
5b4fdb20 | 7045 | dump_flow_info (dump_file, dump_flags); |
ef330312 | 7046 | |
10d22567 | 7047 | tem = cse_main (get_insns (), max_reg_num ()); |
ef330312 PB |
7048 | |
7049 | /* Run a pass to eliminate duplicated assignments to condition code | |
7050 | registers. We have to run this after bypass_jumps, because it | |
7051 | makes it harder for that pass to determine whether a jump can be | |
7052 | bypassed safely. */ | |
7053 | cse_condition_code_reg (); | |
7054 | ||
ef330312 PB |
7055 | delete_trivially_dead_insns (get_insns (), max_reg_num ()); |
7056 | ||
7057 | if (tem) | |
7058 | { | |
7059 | timevar_push (TV_JUMP); | |
7060 | rebuild_jump_labels (get_insns ()); | |
7061 | delete_dead_jumptables (); | |
7062 | cleanup_cfg (CLEANUP_EXPENSIVE); | |
7063 | timevar_pop (TV_JUMP); | |
7064 | } | |
7065 | reg_scan (get_insns (), max_reg_num ()); | |
7066 | cse_not_expected = 1; | |
c2924966 | 7067 | return 0; |
ef330312 PB |
7068 | } |
7069 | ||
7070 | ||
7071 | struct tree_opt_pass pass_cse2 = | |
7072 | { | |
7073 | "cse2", /* name */ | |
7074 | gate_handle_cse2, /* gate */ | |
7075 | rest_of_handle_cse2, /* execute */ | |
7076 | NULL, /* sub */ | |
7077 | NULL, /* next */ | |
7078 | 0, /* static_pass_number */ | |
7079 | TV_CSE2, /* tv_id */ | |
7080 | 0, /* properties_required */ | |
7081 | 0, /* properties_provided */ | |
7082 | 0, /* properties_destroyed */ | |
7083 | 0, /* todo_flags_start */ | |
7084 | TODO_dump_func | | |
932ad4d9 SB |
7085 | TODO_ggc_collect | |
7086 | TODO_verify_flow, /* todo_flags_finish */ | |
ef330312 PB |
7087 | 't' /* letter */ |
7088 | }; | |
7089 |