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7afe21cc | 1 | /* Common subexpression elimination for GNU compiler. |
5e7b4e25 | 2 | Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998 |
ad616de1 | 3 | 1999, 2000, 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc. |
7afe21cc | 4 | |
1322177d | 5 | This file is part of GCC. |
7afe21cc | 6 | |
1322177d LB |
7 | GCC is free software; you can redistribute it and/or modify it under |
8 | the terms of the GNU General Public License as published by the Free | |
9 | Software Foundation; either version 2, or (at your option) any later | |
10 | version. | |
7afe21cc | 11 | |
1322177d LB |
12 | GCC is distributed in the hope that it will be useful, but WITHOUT ANY |
13 | WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
14 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
15 | for more details. | |
7afe21cc RK |
16 | |
17 | You should have received a copy of the GNU General Public License | |
1322177d LB |
18 | along with GCC; see the file COPYING. If not, write to the Free |
19 | Software Foundation, 59 Temple Place - Suite 330, Boston, MA | |
20 | 02111-1307, USA. */ | |
7afe21cc | 21 | |
7afe21cc | 22 | #include "config.h" |
670ee920 KG |
23 | /* stdio.h must precede rtl.h for FFS. */ |
24 | #include "system.h" | |
4977bab6 ZW |
25 | #include "coretypes.h" |
26 | #include "tm.h" | |
7afe21cc | 27 | #include "rtl.h" |
6baf1cc8 | 28 | #include "tm_p.h" |
7afe21cc | 29 | #include "hard-reg-set.h" |
7932a3db | 30 | #include "regs.h" |
630c79be | 31 | #include "basic-block.h" |
7afe21cc RK |
32 | #include "flags.h" |
33 | #include "real.h" | |
34 | #include "insn-config.h" | |
35 | #include "recog.h" | |
49ad7cfa | 36 | #include "function.h" |
956d6950 | 37 | #include "expr.h" |
50b2596f KG |
38 | #include "toplev.h" |
39 | #include "output.h" | |
1497faf6 | 40 | #include "ggc.h" |
3dec4024 | 41 | #include "timevar.h" |
26771da7 | 42 | #include "except.h" |
3c50106f | 43 | #include "target.h" |
9bf8cfbf | 44 | #include "params.h" |
2f93eea8 | 45 | #include "rtlhooks-def.h" |
7afe21cc RK |
46 | |
47 | /* The basic idea of common subexpression elimination is to go | |
48 | through the code, keeping a record of expressions that would | |
49 | have the same value at the current scan point, and replacing | |
50 | expressions encountered with the cheapest equivalent expression. | |
51 | ||
52 | It is too complicated to keep track of the different possibilities | |
e48a7fbe JL |
53 | when control paths merge in this code; so, at each label, we forget all |
54 | that is known and start fresh. This can be described as processing each | |
55 | extended basic block separately. We have a separate pass to perform | |
56 | global CSE. | |
57 | ||
58 | Note CSE can turn a conditional or computed jump into a nop or | |
59 | an unconditional jump. When this occurs we arrange to run the jump | |
60 | optimizer after CSE to delete the unreachable code. | |
7afe21cc RK |
61 | |
62 | We use two data structures to record the equivalent expressions: | |
1bb98cec DM |
63 | a hash table for most expressions, and a vector of "quantity |
64 | numbers" to record equivalent (pseudo) registers. | |
7afe21cc RK |
65 | |
66 | The use of the special data structure for registers is desirable | |
67 | because it is faster. It is possible because registers references | |
68 | contain a fairly small number, the register number, taken from | |
69 | a contiguously allocated series, and two register references are | |
70 | identical if they have the same number. General expressions | |
71 | do not have any such thing, so the only way to retrieve the | |
72 | information recorded on an expression other than a register | |
73 | is to keep it in a hash table. | |
74 | ||
75 | Registers and "quantity numbers": | |
278a83b2 | 76 | |
7afe21cc RK |
77 | At the start of each basic block, all of the (hardware and pseudo) |
78 | registers used in the function are given distinct quantity | |
79 | numbers to indicate their contents. During scan, when the code | |
80 | copies one register into another, we copy the quantity number. | |
81 | When a register is loaded in any other way, we allocate a new | |
82 | quantity number to describe the value generated by this operation. | |
459281be | 83 | `REG_QTY (N)' records what quantity register N is currently thought |
7afe21cc RK |
84 | of as containing. |
85 | ||
08a69267 | 86 | All real quantity numbers are greater than or equal to zero. |
459281be | 87 | If register N has not been assigned a quantity, `REG_QTY (N)' will |
08a69267 | 88 | equal -N - 1, which is always negative. |
7afe21cc | 89 | |
08a69267 RS |
90 | Quantity numbers below zero do not exist and none of the `qty_table' |
91 | entries should be referenced with a negative index. | |
7afe21cc RK |
92 | |
93 | We also maintain a bidirectional chain of registers for each | |
1bb98cec DM |
94 | quantity number. The `qty_table` members `first_reg' and `last_reg', |
95 | and `reg_eqv_table' members `next' and `prev' hold these chains. | |
7afe21cc RK |
96 | |
97 | The first register in a chain is the one whose lifespan is least local. | |
98 | Among equals, it is the one that was seen first. | |
99 | We replace any equivalent register with that one. | |
100 | ||
101 | If two registers have the same quantity number, it must be true that | |
1bb98cec | 102 | REG expressions with qty_table `mode' must be in the hash table for both |
7afe21cc RK |
103 | registers and must be in the same class. |
104 | ||
105 | The converse is not true. Since hard registers may be referenced in | |
106 | any mode, two REG expressions might be equivalent in the hash table | |
107 | but not have the same quantity number if the quantity number of one | |
108 | of the registers is not the same mode as those expressions. | |
278a83b2 | 109 | |
7afe21cc RK |
110 | Constants and quantity numbers |
111 | ||
112 | When a quantity has a known constant value, that value is stored | |
1bb98cec | 113 | in the appropriate qty_table `const_rtx'. This is in addition to |
7afe21cc RK |
114 | putting the constant in the hash table as is usual for non-regs. |
115 | ||
d45cf215 | 116 | Whether a reg or a constant is preferred is determined by the configuration |
7afe21cc RK |
117 | macro CONST_COSTS and will often depend on the constant value. In any |
118 | event, expressions containing constants can be simplified, by fold_rtx. | |
119 | ||
120 | When a quantity has a known nearly constant value (such as an address | |
1bb98cec DM |
121 | of a stack slot), that value is stored in the appropriate qty_table |
122 | `const_rtx'. | |
7afe21cc RK |
123 | |
124 | Integer constants don't have a machine mode. However, cse | |
125 | determines the intended machine mode from the destination | |
126 | of the instruction that moves the constant. The machine mode | |
127 | is recorded in the hash table along with the actual RTL | |
128 | constant expression so that different modes are kept separate. | |
129 | ||
130 | Other expressions: | |
131 | ||
132 | To record known equivalences among expressions in general | |
133 | we use a hash table called `table'. It has a fixed number of buckets | |
134 | that contain chains of `struct table_elt' elements for expressions. | |
135 | These chains connect the elements whose expressions have the same | |
136 | hash codes. | |
137 | ||
138 | Other chains through the same elements connect the elements which | |
139 | currently have equivalent values. | |
140 | ||
141 | Register references in an expression are canonicalized before hashing | |
1bb98cec | 142 | the expression. This is done using `reg_qty' and qty_table `first_reg'. |
7afe21cc RK |
143 | The hash code of a register reference is computed using the quantity |
144 | number, not the register number. | |
145 | ||
146 | When the value of an expression changes, it is necessary to remove from the | |
147 | hash table not just that expression but all expressions whose values | |
148 | could be different as a result. | |
149 | ||
150 | 1. If the value changing is in memory, except in special cases | |
151 | ANYTHING referring to memory could be changed. That is because | |
152 | nobody knows where a pointer does not point. | |
153 | The function `invalidate_memory' removes what is necessary. | |
154 | ||
155 | The special cases are when the address is constant or is | |
156 | a constant plus a fixed register such as the frame pointer | |
157 | or a static chain pointer. When such addresses are stored in, | |
158 | we can tell exactly which other such addresses must be invalidated | |
159 | due to overlap. `invalidate' does this. | |
160 | All expressions that refer to non-constant | |
161 | memory addresses are also invalidated. `invalidate_memory' does this. | |
162 | ||
163 | 2. If the value changing is a register, all expressions | |
164 | containing references to that register, and only those, | |
165 | must be removed. | |
166 | ||
167 | Because searching the entire hash table for expressions that contain | |
168 | a register is very slow, we try to figure out when it isn't necessary. | |
169 | Precisely, this is necessary only when expressions have been | |
170 | entered in the hash table using this register, and then the value has | |
171 | changed, and then another expression wants to be added to refer to | |
172 | the register's new value. This sequence of circumstances is rare | |
173 | within any one basic block. | |
174 | ||
459281be KH |
175 | `REG_TICK' and `REG_IN_TABLE', accessors for members of |
176 | cse_reg_info, are used to detect this case. REG_TICK (i) is | |
177 | incremented whenever a value is stored in register i. | |
178 | REG_IN_TABLE (i) holds -1 if no references to register i have been | |
179 | entered in the table; otherwise, it contains the value REG_TICK (i) | |
180 | had when the references were entered. If we want to enter a | |
181 | reference and REG_IN_TABLE (i) != REG_TICK (i), we must scan and | |
182 | remove old references. Until we want to enter a new entry, the | |
183 | mere fact that the two vectors don't match makes the entries be | |
184 | ignored if anyone tries to match them. | |
7afe21cc RK |
185 | |
186 | Registers themselves are entered in the hash table as well as in | |
459281be KH |
187 | the equivalent-register chains. However, `REG_TICK' and |
188 | `REG_IN_TABLE' do not apply to expressions which are simple | |
7afe21cc RK |
189 | register references. These expressions are removed from the table |
190 | immediately when they become invalid, and this can be done even if | |
191 | we do not immediately search for all the expressions that refer to | |
192 | the register. | |
193 | ||
194 | A CLOBBER rtx in an instruction invalidates its operand for further | |
195 | reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK | |
196 | invalidates everything that resides in memory. | |
197 | ||
198 | Related expressions: | |
199 | ||
200 | Constant expressions that differ only by an additive integer | |
201 | are called related. When a constant expression is put in | |
202 | the table, the related expression with no constant term | |
203 | is also entered. These are made to point at each other | |
204 | so that it is possible to find out if there exists any | |
205 | register equivalent to an expression related to a given expression. */ | |
278a83b2 | 206 | |
1bb98cec DM |
207 | /* Length of qty_table vector. We know in advance we will not need |
208 | a quantity number this big. */ | |
7afe21cc RK |
209 | |
210 | static int max_qty; | |
211 | ||
212 | /* Next quantity number to be allocated. | |
213 | This is 1 + the largest number needed so far. */ | |
214 | ||
215 | static int next_qty; | |
216 | ||
1bb98cec | 217 | /* Per-qty information tracking. |
7afe21cc | 218 | |
1bb98cec DM |
219 | `first_reg' and `last_reg' track the head and tail of the |
220 | chain of registers which currently contain this quantity. | |
7afe21cc | 221 | |
1bb98cec | 222 | `mode' contains the machine mode of this quantity. |
7afe21cc | 223 | |
1bb98cec DM |
224 | `const_rtx' holds the rtx of the constant value of this |
225 | quantity, if known. A summations of the frame/arg pointer | |
226 | and a constant can also be entered here. When this holds | |
227 | a known value, `const_insn' is the insn which stored the | |
228 | constant value. | |
7afe21cc | 229 | |
1bb98cec DM |
230 | `comparison_{code,const,qty}' are used to track when a |
231 | comparison between a quantity and some constant or register has | |
232 | been passed. In such a case, we know the results of the comparison | |
233 | in case we see it again. These members record a comparison that | |
234 | is known to be true. `comparison_code' holds the rtx code of such | |
235 | a comparison, else it is set to UNKNOWN and the other two | |
236 | comparison members are undefined. `comparison_const' holds | |
237 | the constant being compared against, or zero if the comparison | |
238 | is not against a constant. `comparison_qty' holds the quantity | |
239 | being compared against when the result is known. If the comparison | |
240 | is not with a register, `comparison_qty' is -1. */ | |
7afe21cc | 241 | |
1bb98cec DM |
242 | struct qty_table_elem |
243 | { | |
244 | rtx const_rtx; | |
245 | rtx const_insn; | |
246 | rtx comparison_const; | |
247 | int comparison_qty; | |
770ae6cc | 248 | unsigned int first_reg, last_reg; |
496324d0 DN |
249 | /* The sizes of these fields should match the sizes of the |
250 | code and mode fields of struct rtx_def (see rtl.h). */ | |
251 | ENUM_BITFIELD(rtx_code) comparison_code : 16; | |
252 | ENUM_BITFIELD(machine_mode) mode : 8; | |
1bb98cec | 253 | }; |
7afe21cc | 254 | |
1bb98cec DM |
255 | /* The table of all qtys, indexed by qty number. */ |
256 | static struct qty_table_elem *qty_table; | |
7afe21cc | 257 | |
fc188d37 AK |
258 | /* Structure used to pass arguments via for_each_rtx to function |
259 | cse_change_cc_mode. */ | |
260 | struct change_cc_mode_args | |
261 | { | |
262 | rtx insn; | |
263 | rtx newreg; | |
264 | }; | |
265 | ||
7afe21cc RK |
266 | #ifdef HAVE_cc0 |
267 | /* For machines that have a CC0, we do not record its value in the hash | |
268 | table since its use is guaranteed to be the insn immediately following | |
269 | its definition and any other insn is presumed to invalidate it. | |
270 | ||
271 | Instead, we store below the value last assigned to CC0. If it should | |
272 | happen to be a constant, it is stored in preference to the actual | |
273 | assigned value. In case it is a constant, we store the mode in which | |
274 | the constant should be interpreted. */ | |
275 | ||
276 | static rtx prev_insn_cc0; | |
277 | static enum machine_mode prev_insn_cc0_mode; | |
7afe21cc RK |
278 | |
279 | /* Previous actual insn. 0 if at first insn of basic block. */ | |
280 | ||
281 | static rtx prev_insn; | |
4977bab6 | 282 | #endif |
7afe21cc RK |
283 | |
284 | /* Insn being scanned. */ | |
285 | ||
286 | static rtx this_insn; | |
287 | ||
71d306d1 DE |
288 | /* Index by register number, gives the number of the next (or |
289 | previous) register in the chain of registers sharing the same | |
7afe21cc RK |
290 | value. |
291 | ||
292 | Or -1 if this register is at the end of the chain. | |
293 | ||
459281be | 294 | If REG_QTY (N) == -N - 1, reg_eqv_table[N].next is undefined. */ |
1bb98cec DM |
295 | |
296 | /* Per-register equivalence chain. */ | |
297 | struct reg_eqv_elem | |
298 | { | |
299 | int next, prev; | |
300 | }; | |
7afe21cc | 301 | |
1bb98cec DM |
302 | /* The table of all register equivalence chains. */ |
303 | static struct reg_eqv_elem *reg_eqv_table; | |
7afe21cc | 304 | |
14a774a9 RK |
305 | struct cse_reg_info |
306 | { | |
bc5e3b54 KH |
307 | /* The timestamp at which this register is initialized. */ |
308 | unsigned int timestamp; | |
9b1549b8 DM |
309 | |
310 | /* The quantity number of the register's current contents. */ | |
311 | int reg_qty; | |
312 | ||
313 | /* The number of times the register has been altered in the current | |
314 | basic block. */ | |
315 | int reg_tick; | |
316 | ||
30f72379 MM |
317 | /* The REG_TICK value at which rtx's containing this register are |
318 | valid in the hash table. If this does not equal the current | |
319 | reg_tick value, such expressions existing in the hash table are | |
320 | invalid. */ | |
321 | int reg_in_table; | |
46081bb3 SH |
322 | |
323 | /* The SUBREG that was set when REG_TICK was last incremented. Set | |
324 | to -1 if the last store was to the whole register, not a subreg. */ | |
5dd78e9a | 325 | unsigned int subreg_ticked; |
30f72379 | 326 | }; |
7afe21cc | 327 | |
bc5e3b54 KH |
328 | /* A table of cse_reg_info indexed by register numbers. */ |
329 | struct cse_reg_info *cse_reg_info_table; | |
c1edba58 | 330 | |
bc5e3b54 KH |
331 | /* The size of the above table. */ |
332 | static unsigned int cse_reg_info_table_size; | |
9b1549b8 | 333 | |
bc5e3b54 KH |
334 | /* The index of the first entry that has not been initialized. */ |
335 | static unsigned int cse_reg_info_table_first_uninitialized; | |
7afe21cc | 336 | |
bc5e3b54 | 337 | /* The timestamp at the beginning of the current run of |
0388d40a | 338 | cse_basic_block. We increment this variable at the beginning of |
bc5e3b54 KH |
339 | the current run of cse_basic_block. The timestamp field of a |
340 | cse_reg_info entry matches the value of this variable if and only | |
341 | if the entry has been initialized during the current run of | |
342 | cse_basic_block. */ | |
343 | static unsigned int cse_reg_info_timestamp; | |
7afe21cc | 344 | |
278a83b2 | 345 | /* A HARD_REG_SET containing all the hard registers for which there is |
7afe21cc RK |
346 | currently a REG expression in the hash table. Note the difference |
347 | from the above variables, which indicate if the REG is mentioned in some | |
348 | expression in the table. */ | |
349 | ||
350 | static HARD_REG_SET hard_regs_in_table; | |
351 | ||
7afe21cc RK |
352 | /* CUID of insn that starts the basic block currently being cse-processed. */ |
353 | ||
354 | static int cse_basic_block_start; | |
355 | ||
356 | /* CUID of insn that ends the basic block currently being cse-processed. */ | |
357 | ||
358 | static int cse_basic_block_end; | |
359 | ||
360 | /* Vector mapping INSN_UIDs to cuids. | |
d45cf215 | 361 | The cuids are like uids but increase monotonically always. |
7afe21cc RK |
362 | We use them to see whether a reg is used outside a given basic block. */ |
363 | ||
906c4e36 | 364 | static int *uid_cuid; |
7afe21cc | 365 | |
164c8956 RK |
366 | /* Highest UID in UID_CUID. */ |
367 | static int max_uid; | |
368 | ||
7afe21cc RK |
369 | /* Get the cuid of an insn. */ |
370 | ||
371 | #define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)]) | |
372 | ||
4eadede7 ZW |
373 | /* Nonzero if this pass has made changes, and therefore it's |
374 | worthwhile to run the garbage collector. */ | |
375 | ||
376 | static int cse_altered; | |
377 | ||
7afe21cc RK |
378 | /* Nonzero if cse has altered conditional jump insns |
379 | in such a way that jump optimization should be redone. */ | |
380 | ||
381 | static int cse_jumps_altered; | |
382 | ||
f85cc4cb RK |
383 | /* Nonzero if we put a LABEL_REF into the hash table for an INSN without a |
384 | REG_LABEL, we have to rerun jump after CSE to put in the note. */ | |
a5dfb4ee RK |
385 | static int recorded_label_ref; |
386 | ||
7afe21cc RK |
387 | /* canon_hash stores 1 in do_not_record |
388 | if it notices a reference to CC0, PC, or some other volatile | |
389 | subexpression. */ | |
390 | ||
391 | static int do_not_record; | |
392 | ||
393 | /* canon_hash stores 1 in hash_arg_in_memory | |
394 | if it notices a reference to memory within the expression being hashed. */ | |
395 | ||
396 | static int hash_arg_in_memory; | |
397 | ||
7afe21cc RK |
398 | /* The hash table contains buckets which are chains of `struct table_elt's, |
399 | each recording one expression's information. | |
400 | That expression is in the `exp' field. | |
401 | ||
db048faf MM |
402 | The canon_exp field contains a canonical (from the point of view of |
403 | alias analysis) version of the `exp' field. | |
404 | ||
7afe21cc RK |
405 | Those elements with the same hash code are chained in both directions |
406 | through the `next_same_hash' and `prev_same_hash' fields. | |
407 | ||
408 | Each set of expressions with equivalent values | |
409 | are on a two-way chain through the `next_same_value' | |
410 | and `prev_same_value' fields, and all point with | |
411 | the `first_same_value' field at the first element in | |
412 | that chain. The chain is in order of increasing cost. | |
413 | Each element's cost value is in its `cost' field. | |
414 | ||
415 | The `in_memory' field is nonzero for elements that | |
416 | involve any reference to memory. These elements are removed | |
417 | whenever a write is done to an unidentified location in memory. | |
418 | To be safe, we assume that a memory address is unidentified unless | |
419 | the address is either a symbol constant or a constant plus | |
420 | the frame pointer or argument pointer. | |
421 | ||
7afe21cc RK |
422 | The `related_value' field is used to connect related expressions |
423 | (that differ by adding an integer). | |
424 | The related expressions are chained in a circular fashion. | |
425 | `related_value' is zero for expressions for which this | |
426 | chain is not useful. | |
427 | ||
428 | The `cost' field stores the cost of this element's expression. | |
630c79be BS |
429 | The `regcost' field stores the value returned by approx_reg_cost for |
430 | this element's expression. | |
7afe21cc RK |
431 | |
432 | The `is_const' flag is set if the element is a constant (including | |
433 | a fixed address). | |
434 | ||
435 | The `flag' field is used as a temporary during some search routines. | |
436 | ||
437 | The `mode' field is usually the same as GET_MODE (`exp'), but | |
438 | if `exp' is a CONST_INT and has no machine mode then the `mode' | |
439 | field is the mode it was being used as. Each constant is | |
440 | recorded separately for each mode it is used with. */ | |
441 | ||
7afe21cc RK |
442 | struct table_elt |
443 | { | |
444 | rtx exp; | |
db048faf | 445 | rtx canon_exp; |
7afe21cc RK |
446 | struct table_elt *next_same_hash; |
447 | struct table_elt *prev_same_hash; | |
448 | struct table_elt *next_same_value; | |
449 | struct table_elt *prev_same_value; | |
450 | struct table_elt *first_same_value; | |
451 | struct table_elt *related_value; | |
452 | int cost; | |
630c79be | 453 | int regcost; |
496324d0 DN |
454 | /* The size of this field should match the size |
455 | of the mode field of struct rtx_def (see rtl.h). */ | |
456 | ENUM_BITFIELD(machine_mode) mode : 8; | |
7afe21cc | 457 | char in_memory; |
7afe21cc RK |
458 | char is_const; |
459 | char flag; | |
460 | }; | |
461 | ||
7afe21cc RK |
462 | /* We don't want a lot of buckets, because we rarely have very many |
463 | things stored in the hash table, and a lot of buckets slows | |
464 | down a lot of loops that happen frequently. */ | |
9b1549b8 DM |
465 | #define HASH_SHIFT 5 |
466 | #define HASH_SIZE (1 << HASH_SHIFT) | |
467 | #define HASH_MASK (HASH_SIZE - 1) | |
7afe21cc RK |
468 | |
469 | /* Compute hash code of X in mode M. Special-case case where X is a pseudo | |
470 | register (hard registers may require `do_not_record' to be set). */ | |
471 | ||
472 | #define HASH(X, M) \ | |
f8cfc6aa | 473 | ((REG_P (X) && REGNO (X) >= FIRST_PSEUDO_REGISTER \ |
9b1549b8 DM |
474 | ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \ |
475 | : canon_hash (X, M)) & HASH_MASK) | |
7afe21cc | 476 | |
0516f6fe SB |
477 | /* Like HASH, but without side-effects. */ |
478 | #define SAFE_HASH(X, M) \ | |
479 | ((REG_P (X) && REGNO (X) >= FIRST_PSEUDO_REGISTER \ | |
480 | ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \ | |
481 | : safe_hash (X, M)) & HASH_MASK) | |
482 | ||
630c79be BS |
483 | /* Determine whether register number N is considered a fixed register for the |
484 | purpose of approximating register costs. | |
7afe21cc RK |
485 | It is desirable to replace other regs with fixed regs, to reduce need for |
486 | non-fixed hard regs. | |
553687c9 | 487 | A reg wins if it is either the frame pointer or designated as fixed. */ |
7afe21cc | 488 | #define FIXED_REGNO_P(N) \ |
8bc169f2 | 489 | ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \ |
6ab832bc | 490 | || fixed_regs[N] || global_regs[N]) |
7afe21cc RK |
491 | |
492 | /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed | |
ac07e066 RK |
493 | hard registers and pointers into the frame are the cheapest with a cost |
494 | of 0. Next come pseudos with a cost of one and other hard registers with | |
495 | a cost of 2. Aside from these special cases, call `rtx_cost'. */ | |
496 | ||
d67fb775 SB |
497 | #define CHEAP_REGNO(N) \ |
498 | (REGNO_PTR_FRAME_P(N) \ | |
499 | || (HARD_REGISTER_NUM_P (N) \ | |
e7bb59fa | 500 | && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS)) |
7afe21cc | 501 | |
f8cfc6aa JQ |
502 | #define COST(X) (REG_P (X) ? 0 : notreg_cost (X, SET)) |
503 | #define COST_IN(X,OUTER) (REG_P (X) ? 0 : notreg_cost (X, OUTER)) | |
7afe21cc | 504 | |
30f72379 MM |
505 | /* Get the number of times this register has been updated in this |
506 | basic block. */ | |
507 | ||
bc5e3b54 | 508 | #define REG_TICK(N) (get_cse_reg_info (N)->reg_tick) |
30f72379 MM |
509 | |
510 | /* Get the point at which REG was recorded in the table. */ | |
511 | ||
bc5e3b54 | 512 | #define REG_IN_TABLE(N) (get_cse_reg_info (N)->reg_in_table) |
30f72379 | 513 | |
46081bb3 SH |
514 | /* Get the SUBREG set at the last increment to REG_TICK (-1 if not a |
515 | SUBREG). */ | |
516 | ||
bc5e3b54 | 517 | #define SUBREG_TICKED(N) (get_cse_reg_info (N)->subreg_ticked) |
46081bb3 | 518 | |
30f72379 MM |
519 | /* Get the quantity number for REG. */ |
520 | ||
bc5e3b54 | 521 | #define REG_QTY(N) (get_cse_reg_info (N)->reg_qty) |
30f72379 | 522 | |
7afe21cc | 523 | /* Determine if the quantity number for register X represents a valid index |
1bb98cec | 524 | into the qty_table. */ |
7afe21cc | 525 | |
08a69267 | 526 | #define REGNO_QTY_VALID_P(N) (REG_QTY (N) >= 0) |
7afe21cc | 527 | |
9b1549b8 | 528 | static struct table_elt *table[HASH_SIZE]; |
7afe21cc RK |
529 | |
530 | /* Chain of `struct table_elt's made so far for this function | |
531 | but currently removed from the table. */ | |
532 | ||
533 | static struct table_elt *free_element_chain; | |
534 | ||
7afe21cc RK |
535 | /* Set to the cost of a constant pool reference if one was found for a |
536 | symbolic constant. If this was found, it means we should try to | |
537 | convert constants into constant pool entries if they don't fit in | |
538 | the insn. */ | |
539 | ||
540 | static int constant_pool_entries_cost; | |
dd0ba281 | 541 | static int constant_pool_entries_regcost; |
7afe21cc | 542 | |
6cd4575e RK |
543 | /* This data describes a block that will be processed by cse_basic_block. */ |
544 | ||
14a774a9 RK |
545 | struct cse_basic_block_data |
546 | { | |
6cd4575e RK |
547 | /* Lowest CUID value of insns in block. */ |
548 | int low_cuid; | |
549 | /* Highest CUID value of insns in block. */ | |
550 | int high_cuid; | |
551 | /* Total number of SETs in block. */ | |
552 | int nsets; | |
553 | /* Last insn in the block. */ | |
554 | rtx last; | |
555 | /* Size of current branch path, if any. */ | |
556 | int path_size; | |
557 | /* Current branch path, indicating which branches will be taken. */ | |
14a774a9 RK |
558 | struct branch_path |
559 | { | |
560 | /* The branch insn. */ | |
561 | rtx branch; | |
562 | /* Whether it should be taken or not. AROUND is the same as taken | |
563 | except that it is used when the destination label is not preceded | |
6cd4575e | 564 | by a BARRIER. */ |
6de9cd9a | 565 | enum taken {PATH_TAKEN, PATH_NOT_TAKEN, PATH_AROUND} status; |
9bf8cfbf | 566 | } *path; |
6cd4575e RK |
567 | }; |
568 | ||
7080f735 AJ |
569 | static bool fixed_base_plus_p (rtx x); |
570 | static int notreg_cost (rtx, enum rtx_code); | |
571 | static int approx_reg_cost_1 (rtx *, void *); | |
572 | static int approx_reg_cost (rtx); | |
56ae04af | 573 | static int preferable (int, int, int, int); |
7080f735 AJ |
574 | static void new_basic_block (void); |
575 | static void make_new_qty (unsigned int, enum machine_mode); | |
576 | static void make_regs_eqv (unsigned int, unsigned int); | |
577 | static void delete_reg_equiv (unsigned int); | |
578 | static int mention_regs (rtx); | |
579 | static int insert_regs (rtx, struct table_elt *, int); | |
580 | static void remove_from_table (struct table_elt *, unsigned); | |
581 | static struct table_elt *lookup (rtx, unsigned, enum machine_mode); | |
582 | static struct table_elt *lookup_for_remove (rtx, unsigned, enum machine_mode); | |
583 | static rtx lookup_as_function (rtx, enum rtx_code); | |
584 | static struct table_elt *insert (rtx, struct table_elt *, unsigned, | |
585 | enum machine_mode); | |
586 | static void merge_equiv_classes (struct table_elt *, struct table_elt *); | |
587 | static void invalidate (rtx, enum machine_mode); | |
588 | static int cse_rtx_varies_p (rtx, int); | |
589 | static void remove_invalid_refs (unsigned int); | |
590 | static void remove_invalid_subreg_refs (unsigned int, unsigned int, | |
591 | enum machine_mode); | |
592 | static void rehash_using_reg (rtx); | |
593 | static void invalidate_memory (void); | |
594 | static void invalidate_for_call (void); | |
595 | static rtx use_related_value (rtx, struct table_elt *); | |
0516f6fe SB |
596 | |
597 | static inline unsigned canon_hash (rtx, enum machine_mode); | |
598 | static inline unsigned safe_hash (rtx, enum machine_mode); | |
599 | static unsigned hash_rtx_string (const char *); | |
600 | ||
7080f735 AJ |
601 | static rtx canon_reg (rtx, rtx); |
602 | static void find_best_addr (rtx, rtx *, enum machine_mode); | |
603 | static enum rtx_code find_comparison_args (enum rtx_code, rtx *, rtx *, | |
604 | enum machine_mode *, | |
605 | enum machine_mode *); | |
606 | static rtx fold_rtx (rtx, rtx); | |
607 | static rtx equiv_constant (rtx); | |
608 | static void record_jump_equiv (rtx, int); | |
609 | static void record_jump_cond (enum rtx_code, enum machine_mode, rtx, rtx, | |
610 | int); | |
611 | static void cse_insn (rtx, rtx); | |
86caf04d | 612 | static void cse_end_of_basic_block (rtx, struct cse_basic_block_data *, |
5affca01 | 613 | int, int); |
7080f735 AJ |
614 | static int addr_affects_sp_p (rtx); |
615 | static void invalidate_from_clobbers (rtx); | |
616 | static rtx cse_process_notes (rtx, rtx); | |
7080f735 AJ |
617 | static void invalidate_skipped_set (rtx, rtx, void *); |
618 | static void invalidate_skipped_block (rtx); | |
5affca01 | 619 | static rtx cse_basic_block (rtx, rtx, struct branch_path *); |
9ab81df2 | 620 | static void count_reg_usage (rtx, int *, int); |
7080f735 AJ |
621 | static int check_for_label_ref (rtx *, void *); |
622 | extern void dump_class (struct table_elt*); | |
bc5e3b54 KH |
623 | static void get_cse_reg_info_1 (unsigned int regno); |
624 | static struct cse_reg_info * get_cse_reg_info (unsigned int regno); | |
7080f735 AJ |
625 | static int check_dependence (rtx *, void *); |
626 | ||
627 | static void flush_hash_table (void); | |
628 | static bool insn_live_p (rtx, int *); | |
629 | static bool set_live_p (rtx, rtx, int *); | |
630 | static bool dead_libcall_p (rtx, int *); | |
e129d93a | 631 | static int cse_change_cc_mode (rtx *, void *); |
fc188d37 | 632 | static void cse_change_cc_mode_insn (rtx, rtx); |
e129d93a ILT |
633 | static void cse_change_cc_mode_insns (rtx, rtx, rtx); |
634 | static enum machine_mode cse_cc_succs (basic_block, rtx, rtx, bool); | |
7afe21cc | 635 | \f |
2f93eea8 PB |
636 | |
637 | #undef RTL_HOOKS_GEN_LOWPART | |
638 | #define RTL_HOOKS_GEN_LOWPART gen_lowpart_if_possible | |
639 | ||
640 | static const struct rtl_hooks cse_rtl_hooks = RTL_HOOKS_INITIALIZER; | |
641 | \f | |
4977bab6 ZW |
642 | /* Nonzero if X has the form (PLUS frame-pointer integer). We check for |
643 | virtual regs here because the simplify_*_operation routines are called | |
644 | by integrate.c, which is called before virtual register instantiation. */ | |
645 | ||
646 | static bool | |
7080f735 | 647 | fixed_base_plus_p (rtx x) |
4977bab6 ZW |
648 | { |
649 | switch (GET_CODE (x)) | |
650 | { | |
651 | case REG: | |
652 | if (x == frame_pointer_rtx || x == hard_frame_pointer_rtx) | |
653 | return true; | |
654 | if (x == arg_pointer_rtx && fixed_regs[ARG_POINTER_REGNUM]) | |
655 | return true; | |
656 | if (REGNO (x) >= FIRST_VIRTUAL_REGISTER | |
657 | && REGNO (x) <= LAST_VIRTUAL_REGISTER) | |
658 | return true; | |
659 | return false; | |
660 | ||
661 | case PLUS: | |
662 | if (GET_CODE (XEXP (x, 1)) != CONST_INT) | |
663 | return false; | |
664 | return fixed_base_plus_p (XEXP (x, 0)); | |
665 | ||
4977bab6 ZW |
666 | default: |
667 | return false; | |
668 | } | |
669 | } | |
670 | ||
a4c6502a MM |
671 | /* Dump the expressions in the equivalence class indicated by CLASSP. |
672 | This function is used only for debugging. */ | |
a0153051 | 673 | void |
7080f735 | 674 | dump_class (struct table_elt *classp) |
a4c6502a MM |
675 | { |
676 | struct table_elt *elt; | |
677 | ||
678 | fprintf (stderr, "Equivalence chain for "); | |
679 | print_rtl (stderr, classp->exp); | |
680 | fprintf (stderr, ": \n"); | |
278a83b2 | 681 | |
a4c6502a MM |
682 | for (elt = classp->first_same_value; elt; elt = elt->next_same_value) |
683 | { | |
684 | print_rtl (stderr, elt->exp); | |
685 | fprintf (stderr, "\n"); | |
686 | } | |
687 | } | |
688 | ||
630c79be | 689 | /* Subroutine of approx_reg_cost; called through for_each_rtx. */ |
be8ac49a | 690 | |
630c79be | 691 | static int |
7080f735 | 692 | approx_reg_cost_1 (rtx *xp, void *data) |
630c79be BS |
693 | { |
694 | rtx x = *xp; | |
c863f8c2 | 695 | int *cost_p = data; |
630c79be | 696 | |
f8cfc6aa | 697 | if (x && REG_P (x)) |
c863f8c2 DM |
698 | { |
699 | unsigned int regno = REGNO (x); | |
700 | ||
701 | if (! CHEAP_REGNO (regno)) | |
702 | { | |
703 | if (regno < FIRST_PSEUDO_REGISTER) | |
704 | { | |
705 | if (SMALL_REGISTER_CLASSES) | |
706 | return 1; | |
707 | *cost_p += 2; | |
708 | } | |
709 | else | |
710 | *cost_p += 1; | |
711 | } | |
712 | } | |
713 | ||
630c79be BS |
714 | return 0; |
715 | } | |
716 | ||
717 | /* Return an estimate of the cost of the registers used in an rtx. | |
718 | This is mostly the number of different REG expressions in the rtx; | |
a1f300c0 | 719 | however for some exceptions like fixed registers we use a cost of |
f1c1dfc3 | 720 | 0. If any other hard register reference occurs, return MAX_COST. */ |
630c79be BS |
721 | |
722 | static int | |
7080f735 | 723 | approx_reg_cost (rtx x) |
630c79be | 724 | { |
630c79be | 725 | int cost = 0; |
f1c1dfc3 | 726 | |
c863f8c2 DM |
727 | if (for_each_rtx (&x, approx_reg_cost_1, (void *) &cost)) |
728 | return MAX_COST; | |
630c79be | 729 | |
c863f8c2 | 730 | return cost; |
630c79be BS |
731 | } |
732 | ||
b7ca416f | 733 | /* Returns a canonical version of X for the address, from the point of view, |
6668f6a7 KH |
734 | that all multiplications are represented as MULT instead of the multiply |
735 | by a power of 2 being represented as ASHIFT. */ | |
b7ca416f AP |
736 | |
737 | static rtx | |
738 | canon_for_address (rtx x) | |
739 | { | |
740 | enum rtx_code code; | |
741 | enum machine_mode mode; | |
742 | rtx new = 0; | |
743 | int i; | |
744 | const char *fmt; | |
745 | ||
746 | if (!x) | |
747 | return x; | |
748 | ||
749 | code = GET_CODE (x); | |
750 | mode = GET_MODE (x); | |
751 | ||
752 | switch (code) | |
753 | { | |
754 | case ASHIFT: | |
755 | if (GET_CODE (XEXP (x, 1)) == CONST_INT | |
756 | && INTVAL (XEXP (x, 1)) < GET_MODE_BITSIZE (mode) | |
757 | && INTVAL (XEXP (x, 1)) >= 0) | |
758 | { | |
759 | new = canon_for_address (XEXP (x, 0)); | |
760 | new = gen_rtx_MULT (mode, new, | |
761 | gen_int_mode ((HOST_WIDE_INT) 1 | |
762 | << INTVAL (XEXP (x, 1)), | |
763 | mode)); | |
764 | } | |
765 | break; | |
766 | default: | |
767 | break; | |
768 | ||
769 | } | |
770 | if (new) | |
771 | return new; | |
772 | ||
773 | /* Now recursively process each operand of this operation. */ | |
774 | fmt = GET_RTX_FORMAT (code); | |
775 | for (i = 0; i < GET_RTX_LENGTH (code); i++) | |
776 | if (fmt[i] == 'e') | |
777 | { | |
778 | new = canon_for_address (XEXP (x, i)); | |
779 | XEXP (x, i) = new; | |
780 | } | |
781 | return x; | |
782 | } | |
783 | ||
630c79be BS |
784 | /* Return a negative value if an rtx A, whose costs are given by COST_A |
785 | and REGCOST_A, is more desirable than an rtx B. | |
786 | Return a positive value if A is less desirable, or 0 if the two are | |
787 | equally good. */ | |
788 | static int | |
56ae04af | 789 | preferable (int cost_a, int regcost_a, int cost_b, int regcost_b) |
630c79be | 790 | { |
423adbb9 | 791 | /* First, get rid of cases involving expressions that are entirely |
f1c1dfc3 BS |
792 | unwanted. */ |
793 | if (cost_a != cost_b) | |
794 | { | |
795 | if (cost_a == MAX_COST) | |
796 | return 1; | |
797 | if (cost_b == MAX_COST) | |
798 | return -1; | |
799 | } | |
800 | ||
801 | /* Avoid extending lifetimes of hardregs. */ | |
802 | if (regcost_a != regcost_b) | |
803 | { | |
804 | if (regcost_a == MAX_COST) | |
805 | return 1; | |
806 | if (regcost_b == MAX_COST) | |
807 | return -1; | |
808 | } | |
809 | ||
810 | /* Normal operation costs take precedence. */ | |
630c79be BS |
811 | if (cost_a != cost_b) |
812 | return cost_a - cost_b; | |
f1c1dfc3 | 813 | /* Only if these are identical consider effects on register pressure. */ |
630c79be BS |
814 | if (regcost_a != regcost_b) |
815 | return regcost_a - regcost_b; | |
816 | return 0; | |
817 | } | |
818 | ||
954a5693 RK |
819 | /* Internal function, to compute cost when X is not a register; called |
820 | from COST macro to keep it simple. */ | |
821 | ||
822 | static int | |
7080f735 | 823 | notreg_cost (rtx x, enum rtx_code outer) |
954a5693 RK |
824 | { |
825 | return ((GET_CODE (x) == SUBREG | |
f8cfc6aa | 826 | && REG_P (SUBREG_REG (x)) |
954a5693 RK |
827 | && GET_MODE_CLASS (GET_MODE (x)) == MODE_INT |
828 | && GET_MODE_CLASS (GET_MODE (SUBREG_REG (x))) == MODE_INT | |
829 | && (GET_MODE_SIZE (GET_MODE (x)) | |
830 | < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))) | |
831 | && subreg_lowpart_p (x) | |
832 | && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE (x)), | |
833 | GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x))))) | |
630c79be | 834 | ? 0 |
f2fa288f | 835 | : rtx_cost (x, outer) * 2); |
954a5693 RK |
836 | } |
837 | ||
01329426 | 838 | \f |
bc5e3b54 | 839 | /* Initialize CSE_REG_INFO_TABLE. */ |
9b1549b8 | 840 | |
bc5e3b54 KH |
841 | static void |
842 | init_cse_reg_info (unsigned int nregs) | |
843 | { | |
844 | /* Do we need to grow the table? */ | |
845 | if (nregs > cse_reg_info_table_size) | |
30f72379 | 846 | { |
bc5e3b54 KH |
847 | unsigned int new_size; |
848 | ||
849 | if (cse_reg_info_table_size < 2048) | |
30f72379 | 850 | { |
bc5e3b54 KH |
851 | /* Compute a new size that is a power of 2 and no smaller |
852 | than the large of NREGS and 64. */ | |
853 | new_size = (cse_reg_info_table_size | |
854 | ? cse_reg_info_table_size : 64); | |
855 | ||
856 | while (new_size < nregs) | |
857 | new_size *= 2; | |
30f72379 MM |
858 | } |
859 | else | |
1590d0d4 | 860 | { |
bc5e3b54 KH |
861 | /* If we need a big table, allocate just enough to hold |
862 | NREGS registers. */ | |
863 | new_size = nregs; | |
1590d0d4 | 864 | } |
9b1549b8 | 865 | |
bc5e3b54 KH |
866 | /* Reallocate the table with NEW_SIZE entries. */ |
867 | cse_reg_info_table = xrealloc (cse_reg_info_table, | |
868 | (sizeof (struct cse_reg_info) | |
869 | * new_size)); | |
870 | cse_reg_info_table_size = new_size; | |
871 | } | |
872 | ||
873 | /* Do we have all of the first NREGS entries initialized? */ | |
874 | if (cse_reg_info_table_first_uninitialized < nregs) | |
875 | { | |
876 | unsigned int old_timestamp = cse_reg_info_timestamp - 1; | |
877 | unsigned int i; | |
878 | ||
879 | /* Put the old timestamp on newly allocated entries so that they | |
880 | will all be considered out of date. We do not touch those | |
881 | entries beyond the first NREGS entries to be nice to the | |
882 | virtual memory. */ | |
883 | for (i = cse_reg_info_table_first_uninitialized; i < nregs; i++) | |
884 | cse_reg_info_table[i].timestamp = old_timestamp; | |
30f72379 | 885 | |
bc5e3b54 | 886 | cse_reg_info_table_first_uninitialized = nregs; |
30f72379 | 887 | } |
bc5e3b54 KH |
888 | } |
889 | ||
a52aff23 | 890 | /* Given REGNO, initialize the cse_reg_info entry for REGNO. */ |
bc5e3b54 KH |
891 | |
892 | static void | |
893 | get_cse_reg_info_1 (unsigned int regno) | |
894 | { | |
895 | /* Set TIMESTAMP field to CSE_REG_INFO_TIMESTAMP so that this | |
896 | entry will be considered to have been initialized. */ | |
897 | cse_reg_info_table[regno].timestamp = cse_reg_info_timestamp; | |
898 | ||
899 | /* Initialize the rest of the entry. */ | |
900 | cse_reg_info_table[regno].reg_tick = 1; | |
901 | cse_reg_info_table[regno].reg_in_table = -1; | |
902 | cse_reg_info_table[regno].subreg_ticked = -1; | |
903 | cse_reg_info_table[regno].reg_qty = -regno - 1; | |
904 | } | |
905 | ||
906 | /* Find a cse_reg_info entry for REGNO. */ | |
30f72379 | 907 | |
bc5e3b54 KH |
908 | static inline struct cse_reg_info * |
909 | get_cse_reg_info (unsigned int regno) | |
910 | { | |
911 | struct cse_reg_info *p = &cse_reg_info_table[regno]; | |
912 | ||
782c0a3e KH |
913 | /* If this entry has not been initialized, go ahead and initialize |
914 | it. */ | |
bc5e3b54 KH |
915 | if (p->timestamp != cse_reg_info_timestamp) |
916 | get_cse_reg_info_1 (regno); | |
30f72379 | 917 | |
9b1549b8 | 918 | return p; |
30f72379 MM |
919 | } |
920 | ||
7afe21cc RK |
921 | /* Clear the hash table and initialize each register with its own quantity, |
922 | for a new basic block. */ | |
923 | ||
924 | static void | |
7080f735 | 925 | new_basic_block (void) |
7afe21cc | 926 | { |
b3694847 | 927 | int i; |
7afe21cc | 928 | |
08a69267 | 929 | next_qty = 0; |
7afe21cc | 930 | |
a52aff23 | 931 | /* Invalidate cse_reg_info_table. */ |
bc5e3b54 | 932 | cse_reg_info_timestamp++; |
7afe21cc | 933 | |
bc5e3b54 | 934 | /* Clear out hash table state for this pass. */ |
7afe21cc RK |
935 | CLEAR_HARD_REG_SET (hard_regs_in_table); |
936 | ||
937 | /* The per-quantity values used to be initialized here, but it is | |
938 | much faster to initialize each as it is made in `make_new_qty'. */ | |
939 | ||
9b1549b8 | 940 | for (i = 0; i < HASH_SIZE; i++) |
7afe21cc | 941 | { |
9b1549b8 DM |
942 | struct table_elt *first; |
943 | ||
944 | first = table[i]; | |
945 | if (first != NULL) | |
7afe21cc | 946 | { |
9b1549b8 DM |
947 | struct table_elt *last = first; |
948 | ||
949 | table[i] = NULL; | |
950 | ||
951 | while (last->next_same_hash != NULL) | |
952 | last = last->next_same_hash; | |
953 | ||
954 | /* Now relink this hash entire chain into | |
955 | the free element list. */ | |
956 | ||
957 | last->next_same_hash = free_element_chain; | |
958 | free_element_chain = first; | |
7afe21cc RK |
959 | } |
960 | } | |
961 | ||
7afe21cc | 962 | #ifdef HAVE_cc0 |
4977bab6 | 963 | prev_insn = 0; |
7afe21cc RK |
964 | prev_insn_cc0 = 0; |
965 | #endif | |
966 | } | |
967 | ||
1bb98cec DM |
968 | /* Say that register REG contains a quantity in mode MODE not in any |
969 | register before and initialize that quantity. */ | |
7afe21cc RK |
970 | |
971 | static void | |
7080f735 | 972 | make_new_qty (unsigned int reg, enum machine_mode mode) |
7afe21cc | 973 | { |
b3694847 SS |
974 | int q; |
975 | struct qty_table_elem *ent; | |
976 | struct reg_eqv_elem *eqv; | |
7afe21cc | 977 | |
341c100f | 978 | gcc_assert (next_qty < max_qty); |
7afe21cc | 979 | |
30f72379 | 980 | q = REG_QTY (reg) = next_qty++; |
1bb98cec DM |
981 | ent = &qty_table[q]; |
982 | ent->first_reg = reg; | |
983 | ent->last_reg = reg; | |
984 | ent->mode = mode; | |
985 | ent->const_rtx = ent->const_insn = NULL_RTX; | |
986 | ent->comparison_code = UNKNOWN; | |
987 | ||
988 | eqv = ®_eqv_table[reg]; | |
989 | eqv->next = eqv->prev = -1; | |
7afe21cc RK |
990 | } |
991 | ||
992 | /* Make reg NEW equivalent to reg OLD. | |
993 | OLD is not changing; NEW is. */ | |
994 | ||
995 | static void | |
7080f735 | 996 | make_regs_eqv (unsigned int new, unsigned int old) |
7afe21cc | 997 | { |
770ae6cc RK |
998 | unsigned int lastr, firstr; |
999 | int q = REG_QTY (old); | |
1000 | struct qty_table_elem *ent; | |
1bb98cec DM |
1001 | |
1002 | ent = &qty_table[q]; | |
7afe21cc RK |
1003 | |
1004 | /* Nothing should become eqv until it has a "non-invalid" qty number. */ | |
341c100f | 1005 | gcc_assert (REGNO_QTY_VALID_P (old)); |
7afe21cc | 1006 | |
30f72379 | 1007 | REG_QTY (new) = q; |
1bb98cec DM |
1008 | firstr = ent->first_reg; |
1009 | lastr = ent->last_reg; | |
7afe21cc RK |
1010 | |
1011 | /* Prefer fixed hard registers to anything. Prefer pseudo regs to other | |
1012 | hard regs. Among pseudos, if NEW will live longer than any other reg | |
1013 | of the same qty, and that is beyond the current basic block, | |
1014 | make it the new canonical replacement for this qty. */ | |
1015 | if (! (firstr < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (firstr)) | |
1016 | /* Certain fixed registers might be of the class NO_REGS. This means | |
1017 | that not only can they not be allocated by the compiler, but | |
830a38ee | 1018 | they cannot be used in substitutions or canonicalizations |
7afe21cc RK |
1019 | either. */ |
1020 | && (new >= FIRST_PSEUDO_REGISTER || REGNO_REG_CLASS (new) != NO_REGS) | |
1021 | && ((new < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (new)) | |
1022 | || (new >= FIRST_PSEUDO_REGISTER | |
1023 | && (firstr < FIRST_PSEUDO_REGISTER | |
b1f21e0a MM |
1024 | || ((uid_cuid[REGNO_LAST_UID (new)] > cse_basic_block_end |
1025 | || (uid_cuid[REGNO_FIRST_UID (new)] | |
7afe21cc | 1026 | < cse_basic_block_start)) |
b1f21e0a MM |
1027 | && (uid_cuid[REGNO_LAST_UID (new)] |
1028 | > uid_cuid[REGNO_LAST_UID (firstr)])))))) | |
7afe21cc | 1029 | { |
1bb98cec DM |
1030 | reg_eqv_table[firstr].prev = new; |
1031 | reg_eqv_table[new].next = firstr; | |
1032 | reg_eqv_table[new].prev = -1; | |
1033 | ent->first_reg = new; | |
7afe21cc RK |
1034 | } |
1035 | else | |
1036 | { | |
1037 | /* If NEW is a hard reg (known to be non-fixed), insert at end. | |
1038 | Otherwise, insert before any non-fixed hard regs that are at the | |
1039 | end. Registers of class NO_REGS cannot be used as an | |
1040 | equivalent for anything. */ | |
1bb98cec | 1041 | while (lastr < FIRST_PSEUDO_REGISTER && reg_eqv_table[lastr].prev >= 0 |
7afe21cc RK |
1042 | && (REGNO_REG_CLASS (lastr) == NO_REGS || ! FIXED_REGNO_P (lastr)) |
1043 | && new >= FIRST_PSEUDO_REGISTER) | |
1bb98cec DM |
1044 | lastr = reg_eqv_table[lastr].prev; |
1045 | reg_eqv_table[new].next = reg_eqv_table[lastr].next; | |
1046 | if (reg_eqv_table[lastr].next >= 0) | |
1047 | reg_eqv_table[reg_eqv_table[lastr].next].prev = new; | |
7afe21cc | 1048 | else |
1bb98cec DM |
1049 | qty_table[q].last_reg = new; |
1050 | reg_eqv_table[lastr].next = new; | |
1051 | reg_eqv_table[new].prev = lastr; | |
7afe21cc RK |
1052 | } |
1053 | } | |
1054 | ||
1055 | /* Remove REG from its equivalence class. */ | |
1056 | ||
1057 | static void | |
7080f735 | 1058 | delete_reg_equiv (unsigned int reg) |
7afe21cc | 1059 | { |
b3694847 SS |
1060 | struct qty_table_elem *ent; |
1061 | int q = REG_QTY (reg); | |
1062 | int p, n; | |
7afe21cc | 1063 | |
a4e262bc | 1064 | /* If invalid, do nothing. */ |
08a69267 | 1065 | if (! REGNO_QTY_VALID_P (reg)) |
7afe21cc RK |
1066 | return; |
1067 | ||
1bb98cec DM |
1068 | ent = &qty_table[q]; |
1069 | ||
1070 | p = reg_eqv_table[reg].prev; | |
1071 | n = reg_eqv_table[reg].next; | |
a4e262bc | 1072 | |
7afe21cc | 1073 | if (n != -1) |
1bb98cec | 1074 | reg_eqv_table[n].prev = p; |
7afe21cc | 1075 | else |
1bb98cec | 1076 | ent->last_reg = p; |
7afe21cc | 1077 | if (p != -1) |
1bb98cec | 1078 | reg_eqv_table[p].next = n; |
7afe21cc | 1079 | else |
1bb98cec | 1080 | ent->first_reg = n; |
7afe21cc | 1081 | |
08a69267 | 1082 | REG_QTY (reg) = -reg - 1; |
7afe21cc RK |
1083 | } |
1084 | ||
1085 | /* Remove any invalid expressions from the hash table | |
1086 | that refer to any of the registers contained in expression X. | |
1087 | ||
1088 | Make sure that newly inserted references to those registers | |
1089 | as subexpressions will be considered valid. | |
1090 | ||
1091 | mention_regs is not called when a register itself | |
1092 | is being stored in the table. | |
1093 | ||
1094 | Return 1 if we have done something that may have changed the hash code | |
1095 | of X. */ | |
1096 | ||
1097 | static int | |
7080f735 | 1098 | mention_regs (rtx x) |
7afe21cc | 1099 | { |
b3694847 SS |
1100 | enum rtx_code code; |
1101 | int i, j; | |
1102 | const char *fmt; | |
1103 | int changed = 0; | |
7afe21cc RK |
1104 | |
1105 | if (x == 0) | |
e5f6a288 | 1106 | return 0; |
7afe21cc RK |
1107 | |
1108 | code = GET_CODE (x); | |
1109 | if (code == REG) | |
1110 | { | |
770ae6cc RK |
1111 | unsigned int regno = REGNO (x); |
1112 | unsigned int endregno | |
7afe21cc | 1113 | = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1 |
66fd46b6 | 1114 | : hard_regno_nregs[regno][GET_MODE (x)]); |
770ae6cc | 1115 | unsigned int i; |
7afe21cc RK |
1116 | |
1117 | for (i = regno; i < endregno; i++) | |
1118 | { | |
30f72379 | 1119 | if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i)) |
7afe21cc RK |
1120 | remove_invalid_refs (i); |
1121 | ||
30f72379 | 1122 | REG_IN_TABLE (i) = REG_TICK (i); |
46081bb3 | 1123 | SUBREG_TICKED (i) = -1; |
7afe21cc RK |
1124 | } |
1125 | ||
1126 | return 0; | |
1127 | } | |
1128 | ||
34c73909 R |
1129 | /* If this is a SUBREG, we don't want to discard other SUBREGs of the same |
1130 | pseudo if they don't use overlapping words. We handle only pseudos | |
1131 | here for simplicity. */ | |
f8cfc6aa | 1132 | if (code == SUBREG && REG_P (SUBREG_REG (x)) |
34c73909 R |
1133 | && REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER) |
1134 | { | |
770ae6cc | 1135 | unsigned int i = REGNO (SUBREG_REG (x)); |
34c73909 | 1136 | |
30f72379 | 1137 | if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i)) |
34c73909 | 1138 | { |
46081bb3 SH |
1139 | /* If REG_IN_TABLE (i) differs from REG_TICK (i) by one, and |
1140 | the last store to this register really stored into this | |
1141 | subreg, then remove the memory of this subreg. | |
1142 | Otherwise, remove any memory of the entire register and | |
1143 | all its subregs from the table. */ | |
1144 | if (REG_TICK (i) - REG_IN_TABLE (i) > 1 | |
5dd78e9a | 1145 | || SUBREG_TICKED (i) != REGNO (SUBREG_REG (x))) |
34c73909 R |
1146 | remove_invalid_refs (i); |
1147 | else | |
ddef6bc7 | 1148 | remove_invalid_subreg_refs (i, SUBREG_BYTE (x), GET_MODE (x)); |
34c73909 R |
1149 | } |
1150 | ||
30f72379 | 1151 | REG_IN_TABLE (i) = REG_TICK (i); |
5dd78e9a | 1152 | SUBREG_TICKED (i) = REGNO (SUBREG_REG (x)); |
34c73909 R |
1153 | return 0; |
1154 | } | |
1155 | ||
7afe21cc RK |
1156 | /* If X is a comparison or a COMPARE and either operand is a register |
1157 | that does not have a quantity, give it one. This is so that a later | |
1158 | call to record_jump_equiv won't cause X to be assigned a different | |
1159 | hash code and not found in the table after that call. | |
1160 | ||
1161 | It is not necessary to do this here, since rehash_using_reg can | |
1162 | fix up the table later, but doing this here eliminates the need to | |
1163 | call that expensive function in the most common case where the only | |
1164 | use of the register is in the comparison. */ | |
1165 | ||
ec8e098d | 1166 | if (code == COMPARE || COMPARISON_P (x)) |
7afe21cc | 1167 | { |
f8cfc6aa | 1168 | if (REG_P (XEXP (x, 0)) |
7afe21cc | 1169 | && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 0)))) |
9714cf43 | 1170 | if (insert_regs (XEXP (x, 0), NULL, 0)) |
7afe21cc RK |
1171 | { |
1172 | rehash_using_reg (XEXP (x, 0)); | |
1173 | changed = 1; | |
1174 | } | |
1175 | ||
f8cfc6aa | 1176 | if (REG_P (XEXP (x, 1)) |
7afe21cc | 1177 | && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 1)))) |
9714cf43 | 1178 | if (insert_regs (XEXP (x, 1), NULL, 0)) |
7afe21cc RK |
1179 | { |
1180 | rehash_using_reg (XEXP (x, 1)); | |
1181 | changed = 1; | |
1182 | } | |
1183 | } | |
1184 | ||
1185 | fmt = GET_RTX_FORMAT (code); | |
1186 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
1187 | if (fmt[i] == 'e') | |
1188 | changed |= mention_regs (XEXP (x, i)); | |
1189 | else if (fmt[i] == 'E') | |
1190 | for (j = 0; j < XVECLEN (x, i); j++) | |
1191 | changed |= mention_regs (XVECEXP (x, i, j)); | |
1192 | ||
1193 | return changed; | |
1194 | } | |
1195 | ||
1196 | /* Update the register quantities for inserting X into the hash table | |
1197 | with a value equivalent to CLASSP. | |
1198 | (If the class does not contain a REG, it is irrelevant.) | |
1199 | If MODIFIED is nonzero, X is a destination; it is being modified. | |
1200 | Note that delete_reg_equiv should be called on a register | |
1201 | before insert_regs is done on that register with MODIFIED != 0. | |
1202 | ||
1203 | Nonzero value means that elements of reg_qty have changed | |
1204 | so X's hash code may be different. */ | |
1205 | ||
1206 | static int | |
7080f735 | 1207 | insert_regs (rtx x, struct table_elt *classp, int modified) |
7afe21cc | 1208 | { |
f8cfc6aa | 1209 | if (REG_P (x)) |
7afe21cc | 1210 | { |
770ae6cc RK |
1211 | unsigned int regno = REGNO (x); |
1212 | int qty_valid; | |
7afe21cc | 1213 | |
1ff0c00d RK |
1214 | /* If REGNO is in the equivalence table already but is of the |
1215 | wrong mode for that equivalence, don't do anything here. */ | |
1216 | ||
1bb98cec DM |
1217 | qty_valid = REGNO_QTY_VALID_P (regno); |
1218 | if (qty_valid) | |
1219 | { | |
1220 | struct qty_table_elem *ent = &qty_table[REG_QTY (regno)]; | |
1ff0c00d | 1221 | |
1bb98cec DM |
1222 | if (ent->mode != GET_MODE (x)) |
1223 | return 0; | |
1224 | } | |
1225 | ||
1226 | if (modified || ! qty_valid) | |
7afe21cc RK |
1227 | { |
1228 | if (classp) | |
1229 | for (classp = classp->first_same_value; | |
1230 | classp != 0; | |
1231 | classp = classp->next_same_value) | |
f8cfc6aa | 1232 | if (REG_P (classp->exp) |
7afe21cc RK |
1233 | && GET_MODE (classp->exp) == GET_MODE (x)) |
1234 | { | |
1235 | make_regs_eqv (regno, REGNO (classp->exp)); | |
1236 | return 1; | |
1237 | } | |
1238 | ||
d9f20424 R |
1239 | /* Mention_regs for a SUBREG checks if REG_TICK is exactly one larger |
1240 | than REG_IN_TABLE to find out if there was only a single preceding | |
1241 | invalidation - for the SUBREG - or another one, which would be | |
1242 | for the full register. However, if we find here that REG_TICK | |
1243 | indicates that the register is invalid, it means that it has | |
1244 | been invalidated in a separate operation. The SUBREG might be used | |
1245 | now (then this is a recursive call), or we might use the full REG | |
1246 | now and a SUBREG of it later. So bump up REG_TICK so that | |
1247 | mention_regs will do the right thing. */ | |
1248 | if (! modified | |
1249 | && REG_IN_TABLE (regno) >= 0 | |
1250 | && REG_TICK (regno) == REG_IN_TABLE (regno) + 1) | |
1251 | REG_TICK (regno)++; | |
1bb98cec | 1252 | make_new_qty (regno, GET_MODE (x)); |
7afe21cc RK |
1253 | return 1; |
1254 | } | |
cdf4112f TG |
1255 | |
1256 | return 0; | |
7afe21cc | 1257 | } |
c610adec RK |
1258 | |
1259 | /* If X is a SUBREG, we will likely be inserting the inner register in the | |
1260 | table. If that register doesn't have an assigned quantity number at | |
1261 | this point but does later, the insertion that we will be doing now will | |
1262 | not be accessible because its hash code will have changed. So assign | |
1263 | a quantity number now. */ | |
1264 | ||
f8cfc6aa | 1265 | else if (GET_CODE (x) == SUBREG && REG_P (SUBREG_REG (x)) |
c610adec RK |
1266 | && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x)))) |
1267 | { | |
9714cf43 | 1268 | insert_regs (SUBREG_REG (x), NULL, 0); |
34c73909 | 1269 | mention_regs (x); |
c610adec RK |
1270 | return 1; |
1271 | } | |
7afe21cc RK |
1272 | else |
1273 | return mention_regs (x); | |
1274 | } | |
1275 | \f | |
1276 | /* Look in or update the hash table. */ | |
1277 | ||
7afe21cc RK |
1278 | /* Remove table element ELT from use in the table. |
1279 | HASH is its hash code, made using the HASH macro. | |
1280 | It's an argument because often that is known in advance | |
1281 | and we save much time not recomputing it. */ | |
1282 | ||
1283 | static void | |
7080f735 | 1284 | remove_from_table (struct table_elt *elt, unsigned int hash) |
7afe21cc RK |
1285 | { |
1286 | if (elt == 0) | |
1287 | return; | |
1288 | ||
1289 | /* Mark this element as removed. See cse_insn. */ | |
1290 | elt->first_same_value = 0; | |
1291 | ||
1292 | /* Remove the table element from its equivalence class. */ | |
278a83b2 | 1293 | |
7afe21cc | 1294 | { |
b3694847 SS |
1295 | struct table_elt *prev = elt->prev_same_value; |
1296 | struct table_elt *next = elt->next_same_value; | |
7afe21cc | 1297 | |
278a83b2 KH |
1298 | if (next) |
1299 | next->prev_same_value = prev; | |
7afe21cc RK |
1300 | |
1301 | if (prev) | |
1302 | prev->next_same_value = next; | |
1303 | else | |
1304 | { | |
b3694847 | 1305 | struct table_elt *newfirst = next; |
7afe21cc RK |
1306 | while (next) |
1307 | { | |
1308 | next->first_same_value = newfirst; | |
1309 | next = next->next_same_value; | |
1310 | } | |
1311 | } | |
1312 | } | |
1313 | ||
1314 | /* Remove the table element from its hash bucket. */ | |
1315 | ||
1316 | { | |
b3694847 SS |
1317 | struct table_elt *prev = elt->prev_same_hash; |
1318 | struct table_elt *next = elt->next_same_hash; | |
7afe21cc | 1319 | |
278a83b2 KH |
1320 | if (next) |
1321 | next->prev_same_hash = prev; | |
7afe21cc RK |
1322 | |
1323 | if (prev) | |
1324 | prev->next_same_hash = next; | |
1325 | else if (table[hash] == elt) | |
1326 | table[hash] = next; | |
1327 | else | |
1328 | { | |
1329 | /* This entry is not in the proper hash bucket. This can happen | |
1330 | when two classes were merged by `merge_equiv_classes'. Search | |
1331 | for the hash bucket that it heads. This happens only very | |
1332 | rarely, so the cost is acceptable. */ | |
9b1549b8 | 1333 | for (hash = 0; hash < HASH_SIZE; hash++) |
7afe21cc RK |
1334 | if (table[hash] == elt) |
1335 | table[hash] = next; | |
1336 | } | |
1337 | } | |
1338 | ||
1339 | /* Remove the table element from its related-value circular chain. */ | |
1340 | ||
1341 | if (elt->related_value != 0 && elt->related_value != elt) | |
1342 | { | |
b3694847 | 1343 | struct table_elt *p = elt->related_value; |
770ae6cc | 1344 | |
7afe21cc RK |
1345 | while (p->related_value != elt) |
1346 | p = p->related_value; | |
1347 | p->related_value = elt->related_value; | |
1348 | if (p->related_value == p) | |
1349 | p->related_value = 0; | |
1350 | } | |
1351 | ||
9b1549b8 DM |
1352 | /* Now add it to the free element chain. */ |
1353 | elt->next_same_hash = free_element_chain; | |
1354 | free_element_chain = elt; | |
7afe21cc RK |
1355 | } |
1356 | ||
1357 | /* Look up X in the hash table and return its table element, | |
1358 | or 0 if X is not in the table. | |
1359 | ||
1360 | MODE is the machine-mode of X, or if X is an integer constant | |
1361 | with VOIDmode then MODE is the mode with which X will be used. | |
1362 | ||
1363 | Here we are satisfied to find an expression whose tree structure | |
1364 | looks like X. */ | |
1365 | ||
1366 | static struct table_elt * | |
7080f735 | 1367 | lookup (rtx x, unsigned int hash, enum machine_mode mode) |
7afe21cc | 1368 | { |
b3694847 | 1369 | struct table_elt *p; |
7afe21cc RK |
1370 | |
1371 | for (p = table[hash]; p; p = p->next_same_hash) | |
f8cfc6aa | 1372 | if (mode == p->mode && ((x == p->exp && REG_P (x)) |
0516f6fe | 1373 | || exp_equiv_p (x, p->exp, !REG_P (x), false))) |
7afe21cc RK |
1374 | return p; |
1375 | ||
1376 | return 0; | |
1377 | } | |
1378 | ||
1379 | /* Like `lookup' but don't care whether the table element uses invalid regs. | |
1380 | Also ignore discrepancies in the machine mode of a register. */ | |
1381 | ||
1382 | static struct table_elt * | |
7080f735 | 1383 | lookup_for_remove (rtx x, unsigned int hash, enum machine_mode mode) |
7afe21cc | 1384 | { |
b3694847 | 1385 | struct table_elt *p; |
7afe21cc | 1386 | |
f8cfc6aa | 1387 | if (REG_P (x)) |
7afe21cc | 1388 | { |
770ae6cc RK |
1389 | unsigned int regno = REGNO (x); |
1390 | ||
7afe21cc RK |
1391 | /* Don't check the machine mode when comparing registers; |
1392 | invalidating (REG:SI 0) also invalidates (REG:DF 0). */ | |
1393 | for (p = table[hash]; p; p = p->next_same_hash) | |
f8cfc6aa | 1394 | if (REG_P (p->exp) |
7afe21cc RK |
1395 | && REGNO (p->exp) == regno) |
1396 | return p; | |
1397 | } | |
1398 | else | |
1399 | { | |
1400 | for (p = table[hash]; p; p = p->next_same_hash) | |
0516f6fe SB |
1401 | if (mode == p->mode |
1402 | && (x == p->exp || exp_equiv_p (x, p->exp, 0, false))) | |
7afe21cc RK |
1403 | return p; |
1404 | } | |
1405 | ||
1406 | return 0; | |
1407 | } | |
1408 | ||
1409 | /* Look for an expression equivalent to X and with code CODE. | |
1410 | If one is found, return that expression. */ | |
1411 | ||
1412 | static rtx | |
7080f735 | 1413 | lookup_as_function (rtx x, enum rtx_code code) |
7afe21cc | 1414 | { |
b3694847 | 1415 | struct table_elt *p |
0516f6fe | 1416 | = lookup (x, SAFE_HASH (x, VOIDmode), GET_MODE (x)); |
770ae6cc | 1417 | |
34c73909 R |
1418 | /* If we are looking for a CONST_INT, the mode doesn't really matter, as |
1419 | long as we are narrowing. So if we looked in vain for a mode narrower | |
1420 | than word_mode before, look for word_mode now. */ | |
1421 | if (p == 0 && code == CONST_INT | |
1422 | && GET_MODE_SIZE (GET_MODE (x)) < GET_MODE_SIZE (word_mode)) | |
1423 | { | |
1424 | x = copy_rtx (x); | |
1425 | PUT_MODE (x, word_mode); | |
0516f6fe | 1426 | p = lookup (x, SAFE_HASH (x, VOIDmode), word_mode); |
34c73909 R |
1427 | } |
1428 | ||
7afe21cc RK |
1429 | if (p == 0) |
1430 | return 0; | |
1431 | ||
1432 | for (p = p->first_same_value; p; p = p->next_same_value) | |
770ae6cc RK |
1433 | if (GET_CODE (p->exp) == code |
1434 | /* Make sure this is a valid entry in the table. */ | |
0516f6fe | 1435 | && exp_equiv_p (p->exp, p->exp, 1, false)) |
770ae6cc | 1436 | return p->exp; |
278a83b2 | 1437 | |
7afe21cc RK |
1438 | return 0; |
1439 | } | |
1440 | ||
1441 | /* Insert X in the hash table, assuming HASH is its hash code | |
1442 | and CLASSP is an element of the class it should go in | |
1443 | (or 0 if a new class should be made). | |
1444 | It is inserted at the proper position to keep the class in | |
1445 | the order cheapest first. | |
1446 | ||
1447 | MODE is the machine-mode of X, or if X is an integer constant | |
1448 | with VOIDmode then MODE is the mode with which X will be used. | |
1449 | ||
1450 | For elements of equal cheapness, the most recent one | |
1451 | goes in front, except that the first element in the list | |
1452 | remains first unless a cheaper element is added. The order of | |
1453 | pseudo-registers does not matter, as canon_reg will be called to | |
830a38ee | 1454 | find the cheapest when a register is retrieved from the table. |
7afe21cc RK |
1455 | |
1456 | The in_memory field in the hash table element is set to 0. | |
1457 | The caller must set it nonzero if appropriate. | |
1458 | ||
1459 | You should call insert_regs (X, CLASSP, MODIFY) before calling here, | |
1460 | and if insert_regs returns a nonzero value | |
1461 | you must then recompute its hash code before calling here. | |
1462 | ||
1463 | If necessary, update table showing constant values of quantities. */ | |
1464 | ||
630c79be | 1465 | #define CHEAPER(X, Y) \ |
56ae04af | 1466 | (preferable ((X)->cost, (X)->regcost, (Y)->cost, (Y)->regcost) < 0) |
7afe21cc RK |
1467 | |
1468 | static struct table_elt * | |
7080f735 | 1469 | insert (rtx x, struct table_elt *classp, unsigned int hash, enum machine_mode mode) |
7afe21cc | 1470 | { |
b3694847 | 1471 | struct table_elt *elt; |
7afe21cc RK |
1472 | |
1473 | /* If X is a register and we haven't made a quantity for it, | |
1474 | something is wrong. */ | |
341c100f | 1475 | gcc_assert (!REG_P (x) || REGNO_QTY_VALID_P (REGNO (x))); |
7afe21cc RK |
1476 | |
1477 | /* If X is a hard register, show it is being put in the table. */ | |
f8cfc6aa | 1478 | if (REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER) |
7afe21cc | 1479 | { |
770ae6cc | 1480 | unsigned int regno = REGNO (x); |
66fd46b6 | 1481 | unsigned int endregno = regno + hard_regno_nregs[regno][GET_MODE (x)]; |
770ae6cc | 1482 | unsigned int i; |
7afe21cc RK |
1483 | |
1484 | for (i = regno; i < endregno; i++) | |
770ae6cc | 1485 | SET_HARD_REG_BIT (hard_regs_in_table, i); |
7afe21cc RK |
1486 | } |
1487 | ||
7afe21cc RK |
1488 | /* Put an element for X into the right hash bucket. */ |
1489 | ||
9b1549b8 DM |
1490 | elt = free_element_chain; |
1491 | if (elt) | |
770ae6cc | 1492 | free_element_chain = elt->next_same_hash; |
9b1549b8 | 1493 | else |
26af0046 | 1494 | elt = xmalloc (sizeof (struct table_elt)); |
9b1549b8 | 1495 | |
7afe21cc | 1496 | elt->exp = x; |
db048faf | 1497 | elt->canon_exp = NULL_RTX; |
7afe21cc | 1498 | elt->cost = COST (x); |
630c79be | 1499 | elt->regcost = approx_reg_cost (x); |
7afe21cc RK |
1500 | elt->next_same_value = 0; |
1501 | elt->prev_same_value = 0; | |
1502 | elt->next_same_hash = table[hash]; | |
1503 | elt->prev_same_hash = 0; | |
1504 | elt->related_value = 0; | |
1505 | elt->in_memory = 0; | |
1506 | elt->mode = mode; | |
389fdba0 | 1507 | elt->is_const = (CONSTANT_P (x) || fixed_base_plus_p (x)); |
7afe21cc RK |
1508 | |
1509 | if (table[hash]) | |
1510 | table[hash]->prev_same_hash = elt; | |
1511 | table[hash] = elt; | |
1512 | ||
1513 | /* Put it into the proper value-class. */ | |
1514 | if (classp) | |
1515 | { | |
1516 | classp = classp->first_same_value; | |
1517 | if (CHEAPER (elt, classp)) | |
f9da5064 | 1518 | /* Insert at the head of the class. */ |
7afe21cc | 1519 | { |
b3694847 | 1520 | struct table_elt *p; |
7afe21cc RK |
1521 | elt->next_same_value = classp; |
1522 | classp->prev_same_value = elt; | |
1523 | elt->first_same_value = elt; | |
1524 | ||
1525 | for (p = classp; p; p = p->next_same_value) | |
1526 | p->first_same_value = elt; | |
1527 | } | |
1528 | else | |
1529 | { | |
1530 | /* Insert not at head of the class. */ | |
1531 | /* Put it after the last element cheaper than X. */ | |
b3694847 | 1532 | struct table_elt *p, *next; |
770ae6cc | 1533 | |
7afe21cc RK |
1534 | for (p = classp; (next = p->next_same_value) && CHEAPER (next, elt); |
1535 | p = next); | |
770ae6cc | 1536 | |
7afe21cc RK |
1537 | /* Put it after P and before NEXT. */ |
1538 | elt->next_same_value = next; | |
1539 | if (next) | |
1540 | next->prev_same_value = elt; | |
770ae6cc | 1541 | |
7afe21cc RK |
1542 | elt->prev_same_value = p; |
1543 | p->next_same_value = elt; | |
1544 | elt->first_same_value = classp; | |
1545 | } | |
1546 | } | |
1547 | else | |
1548 | elt->first_same_value = elt; | |
1549 | ||
1550 | /* If this is a constant being set equivalent to a register or a register | |
1551 | being set equivalent to a constant, note the constant equivalence. | |
1552 | ||
1553 | If this is a constant, it cannot be equivalent to a different constant, | |
1554 | and a constant is the only thing that can be cheaper than a register. So | |
1555 | we know the register is the head of the class (before the constant was | |
1556 | inserted). | |
1557 | ||
1558 | If this is a register that is not already known equivalent to a | |
1559 | constant, we must check the entire class. | |
1560 | ||
1561 | If this is a register that is already known equivalent to an insn, | |
1bb98cec | 1562 | update the qtys `const_insn' to show that `this_insn' is the latest |
7afe21cc RK |
1563 | insn making that quantity equivalent to the constant. */ |
1564 | ||
f8cfc6aa JQ |
1565 | if (elt->is_const && classp && REG_P (classp->exp) |
1566 | && !REG_P (x)) | |
7afe21cc | 1567 | { |
1bb98cec DM |
1568 | int exp_q = REG_QTY (REGNO (classp->exp)); |
1569 | struct qty_table_elem *exp_ent = &qty_table[exp_q]; | |
1570 | ||
4de249d9 | 1571 | exp_ent->const_rtx = gen_lowpart (exp_ent->mode, x); |
1bb98cec | 1572 | exp_ent->const_insn = this_insn; |
7afe21cc RK |
1573 | } |
1574 | ||
f8cfc6aa | 1575 | else if (REG_P (x) |
1bb98cec DM |
1576 | && classp |
1577 | && ! qty_table[REG_QTY (REGNO (x))].const_rtx | |
f353588a | 1578 | && ! elt->is_const) |
7afe21cc | 1579 | { |
b3694847 | 1580 | struct table_elt *p; |
7afe21cc RK |
1581 | |
1582 | for (p = classp; p != 0; p = p->next_same_value) | |
1583 | { | |
f8cfc6aa | 1584 | if (p->is_const && !REG_P (p->exp)) |
7afe21cc | 1585 | { |
1bb98cec DM |
1586 | int x_q = REG_QTY (REGNO (x)); |
1587 | struct qty_table_elem *x_ent = &qty_table[x_q]; | |
1588 | ||
770ae6cc | 1589 | x_ent->const_rtx |
4de249d9 | 1590 | = gen_lowpart (GET_MODE (x), p->exp); |
1bb98cec | 1591 | x_ent->const_insn = this_insn; |
7afe21cc RK |
1592 | break; |
1593 | } | |
1594 | } | |
1595 | } | |
1596 | ||
f8cfc6aa | 1597 | else if (REG_P (x) |
1bb98cec DM |
1598 | && qty_table[REG_QTY (REGNO (x))].const_rtx |
1599 | && GET_MODE (x) == qty_table[REG_QTY (REGNO (x))].mode) | |
1600 | qty_table[REG_QTY (REGNO (x))].const_insn = this_insn; | |
7afe21cc RK |
1601 | |
1602 | /* If this is a constant with symbolic value, | |
1603 | and it has a term with an explicit integer value, | |
1604 | link it up with related expressions. */ | |
1605 | if (GET_CODE (x) == CONST) | |
1606 | { | |
1607 | rtx subexp = get_related_value (x); | |
2197a88a | 1608 | unsigned subhash; |
7afe21cc RK |
1609 | struct table_elt *subelt, *subelt_prev; |
1610 | ||
1611 | if (subexp != 0) | |
1612 | { | |
1613 | /* Get the integer-free subexpression in the hash table. */ | |
0516f6fe | 1614 | subhash = SAFE_HASH (subexp, mode); |
7afe21cc RK |
1615 | subelt = lookup (subexp, subhash, mode); |
1616 | if (subelt == 0) | |
9714cf43 | 1617 | subelt = insert (subexp, NULL, subhash, mode); |
7afe21cc RK |
1618 | /* Initialize SUBELT's circular chain if it has none. */ |
1619 | if (subelt->related_value == 0) | |
1620 | subelt->related_value = subelt; | |
1621 | /* Find the element in the circular chain that precedes SUBELT. */ | |
1622 | subelt_prev = subelt; | |
1623 | while (subelt_prev->related_value != subelt) | |
1624 | subelt_prev = subelt_prev->related_value; | |
1625 | /* Put new ELT into SUBELT's circular chain just before SUBELT. | |
1626 | This way the element that follows SUBELT is the oldest one. */ | |
1627 | elt->related_value = subelt_prev->related_value; | |
1628 | subelt_prev->related_value = elt; | |
1629 | } | |
1630 | } | |
1631 | ||
1632 | return elt; | |
1633 | } | |
1634 | \f | |
1635 | /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from | |
1636 | CLASS2 into CLASS1. This is done when we have reached an insn which makes | |
1637 | the two classes equivalent. | |
1638 | ||
1639 | CLASS1 will be the surviving class; CLASS2 should not be used after this | |
1640 | call. | |
1641 | ||
1642 | Any invalid entries in CLASS2 will not be copied. */ | |
1643 | ||
1644 | static void | |
7080f735 | 1645 | merge_equiv_classes (struct table_elt *class1, struct table_elt *class2) |
7afe21cc RK |
1646 | { |
1647 | struct table_elt *elt, *next, *new; | |
1648 | ||
1649 | /* Ensure we start with the head of the classes. */ | |
1650 | class1 = class1->first_same_value; | |
1651 | class2 = class2->first_same_value; | |
1652 | ||
1653 | /* If they were already equal, forget it. */ | |
1654 | if (class1 == class2) | |
1655 | return; | |
1656 | ||
1657 | for (elt = class2; elt; elt = next) | |
1658 | { | |
770ae6cc | 1659 | unsigned int hash; |
7afe21cc RK |
1660 | rtx exp = elt->exp; |
1661 | enum machine_mode mode = elt->mode; | |
1662 | ||
1663 | next = elt->next_same_value; | |
1664 | ||
1665 | /* Remove old entry, make a new one in CLASS1's class. | |
1666 | Don't do this for invalid entries as we cannot find their | |
0f41302f | 1667 | hash code (it also isn't necessary). */ |
0516f6fe | 1668 | if (REG_P (exp) || exp_equiv_p (exp, exp, 1, false)) |
7afe21cc | 1669 | { |
a90fc8e0 RH |
1670 | bool need_rehash = false; |
1671 | ||
7afe21cc | 1672 | hash_arg_in_memory = 0; |
7afe21cc | 1673 | hash = HASH (exp, mode); |
278a83b2 | 1674 | |
f8cfc6aa | 1675 | if (REG_P (exp)) |
a90fc8e0 | 1676 | { |
08a69267 | 1677 | need_rehash = REGNO_QTY_VALID_P (REGNO (exp)); |
a90fc8e0 RH |
1678 | delete_reg_equiv (REGNO (exp)); |
1679 | } | |
278a83b2 | 1680 | |
7afe21cc RK |
1681 | remove_from_table (elt, hash); |
1682 | ||
a90fc8e0 | 1683 | if (insert_regs (exp, class1, 0) || need_rehash) |
8ae2b8f6 JW |
1684 | { |
1685 | rehash_using_reg (exp); | |
1686 | hash = HASH (exp, mode); | |
1687 | } | |
7afe21cc RK |
1688 | new = insert (exp, class1, hash, mode); |
1689 | new->in_memory = hash_arg_in_memory; | |
7afe21cc RK |
1690 | } |
1691 | } | |
1692 | } | |
1693 | \f | |
01e752d3 JL |
1694 | /* Flush the entire hash table. */ |
1695 | ||
1696 | static void | |
7080f735 | 1697 | flush_hash_table (void) |
01e752d3 JL |
1698 | { |
1699 | int i; | |
1700 | struct table_elt *p; | |
1701 | ||
9b1549b8 | 1702 | for (i = 0; i < HASH_SIZE; i++) |
01e752d3 JL |
1703 | for (p = table[i]; p; p = table[i]) |
1704 | { | |
1705 | /* Note that invalidate can remove elements | |
1706 | after P in the current hash chain. */ | |
f8cfc6aa | 1707 | if (REG_P (p->exp)) |
01e752d3 JL |
1708 | invalidate (p->exp, p->mode); |
1709 | else | |
1710 | remove_from_table (p, i); | |
1711 | } | |
1712 | } | |
14a774a9 | 1713 | \f |
2ce6dc2f JH |
1714 | /* Function called for each rtx to check whether true dependence exist. */ |
1715 | struct check_dependence_data | |
1716 | { | |
1717 | enum machine_mode mode; | |
1718 | rtx exp; | |
9ddb66ca | 1719 | rtx addr; |
2ce6dc2f | 1720 | }; |
be8ac49a | 1721 | |
2ce6dc2f | 1722 | static int |
7080f735 | 1723 | check_dependence (rtx *x, void *data) |
2ce6dc2f JH |
1724 | { |
1725 | struct check_dependence_data *d = (struct check_dependence_data *) data; | |
3c0cb5de | 1726 | if (*x && MEM_P (*x)) |
9ddb66ca JH |
1727 | return canon_true_dependence (d->exp, d->mode, d->addr, *x, |
1728 | cse_rtx_varies_p); | |
2ce6dc2f JH |
1729 | else |
1730 | return 0; | |
1731 | } | |
1732 | \f | |
14a774a9 RK |
1733 | /* Remove from the hash table, or mark as invalid, all expressions whose |
1734 | values could be altered by storing in X. X is a register, a subreg, or | |
1735 | a memory reference with nonvarying address (because, when a memory | |
1736 | reference with a varying address is stored in, all memory references are | |
1737 | removed by invalidate_memory so specific invalidation is superfluous). | |
1738 | FULL_MODE, if not VOIDmode, indicates that this much should be | |
1739 | invalidated instead of just the amount indicated by the mode of X. This | |
1740 | is only used for bitfield stores into memory. | |
1741 | ||
1742 | A nonvarying address may be just a register or just a symbol reference, | |
1743 | or it may be either of those plus a numeric offset. */ | |
7afe21cc RK |
1744 | |
1745 | static void | |
7080f735 | 1746 | invalidate (rtx x, enum machine_mode full_mode) |
7afe21cc | 1747 | { |
b3694847 SS |
1748 | int i; |
1749 | struct table_elt *p; | |
9ddb66ca | 1750 | rtx addr; |
7afe21cc | 1751 | |
14a774a9 | 1752 | switch (GET_CODE (x)) |
7afe21cc | 1753 | { |
14a774a9 RK |
1754 | case REG: |
1755 | { | |
1756 | /* If X is a register, dependencies on its contents are recorded | |
1757 | through the qty number mechanism. Just change the qty number of | |
1758 | the register, mark it as invalid for expressions that refer to it, | |
1759 | and remove it itself. */ | |
770ae6cc RK |
1760 | unsigned int regno = REGNO (x); |
1761 | unsigned int hash = HASH (x, GET_MODE (x)); | |
7afe21cc | 1762 | |
14a774a9 RK |
1763 | /* Remove REGNO from any quantity list it might be on and indicate |
1764 | that its value might have changed. If it is a pseudo, remove its | |
1765 | entry from the hash table. | |
7afe21cc | 1766 | |
14a774a9 RK |
1767 | For a hard register, we do the first two actions above for any |
1768 | additional hard registers corresponding to X. Then, if any of these | |
1769 | registers are in the table, we must remove any REG entries that | |
1770 | overlap these registers. */ | |
7afe21cc | 1771 | |
14a774a9 RK |
1772 | delete_reg_equiv (regno); |
1773 | REG_TICK (regno)++; | |
46081bb3 | 1774 | SUBREG_TICKED (regno) = -1; |
85e4d983 | 1775 | |
14a774a9 RK |
1776 | if (regno >= FIRST_PSEUDO_REGISTER) |
1777 | { | |
1778 | /* Because a register can be referenced in more than one mode, | |
1779 | we might have to remove more than one table entry. */ | |
1780 | struct table_elt *elt; | |
85e4d983 | 1781 | |
14a774a9 RK |
1782 | while ((elt = lookup_for_remove (x, hash, GET_MODE (x)))) |
1783 | remove_from_table (elt, hash); | |
1784 | } | |
1785 | else | |
1786 | { | |
1787 | HOST_WIDE_INT in_table | |
1788 | = TEST_HARD_REG_BIT (hard_regs_in_table, regno); | |
770ae6cc | 1789 | unsigned int endregno |
66fd46b6 | 1790 | = regno + hard_regno_nregs[regno][GET_MODE (x)]; |
770ae6cc | 1791 | unsigned int tregno, tendregno, rn; |
b3694847 | 1792 | struct table_elt *p, *next; |
7afe21cc | 1793 | |
14a774a9 | 1794 | CLEAR_HARD_REG_BIT (hard_regs_in_table, regno); |
7afe21cc | 1795 | |
770ae6cc | 1796 | for (rn = regno + 1; rn < endregno; rn++) |
14a774a9 | 1797 | { |
770ae6cc RK |
1798 | in_table |= TEST_HARD_REG_BIT (hard_regs_in_table, rn); |
1799 | CLEAR_HARD_REG_BIT (hard_regs_in_table, rn); | |
1800 | delete_reg_equiv (rn); | |
1801 | REG_TICK (rn)++; | |
46081bb3 | 1802 | SUBREG_TICKED (rn) = -1; |
14a774a9 | 1803 | } |
7afe21cc | 1804 | |
14a774a9 | 1805 | if (in_table) |
9b1549b8 | 1806 | for (hash = 0; hash < HASH_SIZE; hash++) |
14a774a9 RK |
1807 | for (p = table[hash]; p; p = next) |
1808 | { | |
1809 | next = p->next_same_hash; | |
7afe21cc | 1810 | |
f8cfc6aa | 1811 | if (!REG_P (p->exp) |
278a83b2 KH |
1812 | || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER) |
1813 | continue; | |
1814 | ||
14a774a9 RK |
1815 | tregno = REGNO (p->exp); |
1816 | tendregno | |
66fd46b6 | 1817 | = tregno + hard_regno_nregs[tregno][GET_MODE (p->exp)]; |
14a774a9 RK |
1818 | if (tendregno > regno && tregno < endregno) |
1819 | remove_from_table (p, hash); | |
1820 | } | |
1821 | } | |
1822 | } | |
7afe21cc | 1823 | return; |
7afe21cc | 1824 | |
14a774a9 | 1825 | case SUBREG: |
bb4034b3 | 1826 | invalidate (SUBREG_REG (x), VOIDmode); |
7afe21cc | 1827 | return; |
aac5cc16 | 1828 | |
14a774a9 | 1829 | case PARALLEL: |
278a83b2 | 1830 | for (i = XVECLEN (x, 0) - 1; i >= 0; --i) |
aac5cc16 RH |
1831 | invalidate (XVECEXP (x, 0, i), VOIDmode); |
1832 | return; | |
aac5cc16 | 1833 | |
14a774a9 RK |
1834 | case EXPR_LIST: |
1835 | /* This is part of a disjoint return value; extract the location in | |
1836 | question ignoring the offset. */ | |
aac5cc16 RH |
1837 | invalidate (XEXP (x, 0), VOIDmode); |
1838 | return; | |
7afe21cc | 1839 | |
14a774a9 | 1840 | case MEM: |
9ddb66ca | 1841 | addr = canon_rtx (get_addr (XEXP (x, 0))); |
db048faf MM |
1842 | /* Calculate the canonical version of X here so that |
1843 | true_dependence doesn't generate new RTL for X on each call. */ | |
1844 | x = canon_rtx (x); | |
1845 | ||
14a774a9 RK |
1846 | /* Remove all hash table elements that refer to overlapping pieces of |
1847 | memory. */ | |
1848 | if (full_mode == VOIDmode) | |
1849 | full_mode = GET_MODE (x); | |
bb4034b3 | 1850 | |
9b1549b8 | 1851 | for (i = 0; i < HASH_SIZE; i++) |
7afe21cc | 1852 | { |
b3694847 | 1853 | struct table_elt *next; |
14a774a9 RK |
1854 | |
1855 | for (p = table[i]; p; p = next) | |
1856 | { | |
1857 | next = p->next_same_hash; | |
db048faf MM |
1858 | if (p->in_memory) |
1859 | { | |
2ce6dc2f JH |
1860 | struct check_dependence_data d; |
1861 | ||
1862 | /* Just canonicalize the expression once; | |
1863 | otherwise each time we call invalidate | |
1864 | true_dependence will canonicalize the | |
1865 | expression again. */ | |
1866 | if (!p->canon_exp) | |
1867 | p->canon_exp = canon_rtx (p->exp); | |
1868 | d.exp = x; | |
9ddb66ca | 1869 | d.addr = addr; |
2ce6dc2f JH |
1870 | d.mode = full_mode; |
1871 | if (for_each_rtx (&p->canon_exp, check_dependence, &d)) | |
db048faf | 1872 | remove_from_table (p, i); |
db048faf | 1873 | } |
14a774a9 | 1874 | } |
7afe21cc | 1875 | } |
14a774a9 RK |
1876 | return; |
1877 | ||
1878 | default: | |
341c100f | 1879 | gcc_unreachable (); |
7afe21cc RK |
1880 | } |
1881 | } | |
14a774a9 | 1882 | \f |
7afe21cc RK |
1883 | /* Remove all expressions that refer to register REGNO, |
1884 | since they are already invalid, and we are about to | |
1885 | mark that register valid again and don't want the old | |
1886 | expressions to reappear as valid. */ | |
1887 | ||
1888 | static void | |
7080f735 | 1889 | remove_invalid_refs (unsigned int regno) |
7afe21cc | 1890 | { |
770ae6cc RK |
1891 | unsigned int i; |
1892 | struct table_elt *p, *next; | |
7afe21cc | 1893 | |
9b1549b8 | 1894 | for (i = 0; i < HASH_SIZE; i++) |
7afe21cc RK |
1895 | for (p = table[i]; p; p = next) |
1896 | { | |
1897 | next = p->next_same_hash; | |
f8cfc6aa | 1898 | if (!REG_P (p->exp) |
68252e27 | 1899 | && refers_to_regno_p (regno, regno + 1, p->exp, (rtx *) 0)) |
7afe21cc RK |
1900 | remove_from_table (p, i); |
1901 | } | |
1902 | } | |
34c73909 | 1903 | |
ddef6bc7 JJ |
1904 | /* Likewise for a subreg with subreg_reg REGNO, subreg_byte OFFSET, |
1905 | and mode MODE. */ | |
34c73909 | 1906 | static void |
7080f735 AJ |
1907 | remove_invalid_subreg_refs (unsigned int regno, unsigned int offset, |
1908 | enum machine_mode mode) | |
34c73909 | 1909 | { |
770ae6cc RK |
1910 | unsigned int i; |
1911 | struct table_elt *p, *next; | |
ddef6bc7 | 1912 | unsigned int end = offset + (GET_MODE_SIZE (mode) - 1); |
34c73909 | 1913 | |
9b1549b8 | 1914 | for (i = 0; i < HASH_SIZE; i++) |
34c73909 R |
1915 | for (p = table[i]; p; p = next) |
1916 | { | |
ddef6bc7 | 1917 | rtx exp = p->exp; |
34c73909 | 1918 | next = p->next_same_hash; |
278a83b2 | 1919 | |
f8cfc6aa | 1920 | if (!REG_P (exp) |
34c73909 | 1921 | && (GET_CODE (exp) != SUBREG |
f8cfc6aa | 1922 | || !REG_P (SUBREG_REG (exp)) |
34c73909 | 1923 | || REGNO (SUBREG_REG (exp)) != regno |
ddef6bc7 JJ |
1924 | || (((SUBREG_BYTE (exp) |
1925 | + (GET_MODE_SIZE (GET_MODE (exp)) - 1)) >= offset) | |
1926 | && SUBREG_BYTE (exp) <= end)) | |
68252e27 | 1927 | && refers_to_regno_p (regno, regno + 1, p->exp, (rtx *) 0)) |
34c73909 R |
1928 | remove_from_table (p, i); |
1929 | } | |
1930 | } | |
7afe21cc RK |
1931 | \f |
1932 | /* Recompute the hash codes of any valid entries in the hash table that | |
1933 | reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG. | |
1934 | ||
1935 | This is called when we make a jump equivalence. */ | |
1936 | ||
1937 | static void | |
7080f735 | 1938 | rehash_using_reg (rtx x) |
7afe21cc | 1939 | { |
973838fd | 1940 | unsigned int i; |
7afe21cc | 1941 | struct table_elt *p, *next; |
2197a88a | 1942 | unsigned hash; |
7afe21cc RK |
1943 | |
1944 | if (GET_CODE (x) == SUBREG) | |
1945 | x = SUBREG_REG (x); | |
1946 | ||
1947 | /* If X is not a register or if the register is known not to be in any | |
1948 | valid entries in the table, we have no work to do. */ | |
1949 | ||
f8cfc6aa | 1950 | if (!REG_P (x) |
30f72379 MM |
1951 | || REG_IN_TABLE (REGNO (x)) < 0 |
1952 | || REG_IN_TABLE (REGNO (x)) != REG_TICK (REGNO (x))) | |
7afe21cc RK |
1953 | return; |
1954 | ||
1955 | /* Scan all hash chains looking for valid entries that mention X. | |
a90fc8e0 | 1956 | If we find one and it is in the wrong hash chain, move it. */ |
7afe21cc | 1957 | |
9b1549b8 | 1958 | for (i = 0; i < HASH_SIZE; i++) |
7afe21cc RK |
1959 | for (p = table[i]; p; p = next) |
1960 | { | |
1961 | next = p->next_same_hash; | |
a90fc8e0 | 1962 | if (reg_mentioned_p (x, p->exp) |
0516f6fe SB |
1963 | && exp_equiv_p (p->exp, p->exp, 1, false) |
1964 | && i != (hash = SAFE_HASH (p->exp, p->mode))) | |
7afe21cc RK |
1965 | { |
1966 | if (p->next_same_hash) | |
1967 | p->next_same_hash->prev_same_hash = p->prev_same_hash; | |
1968 | ||
1969 | if (p->prev_same_hash) | |
1970 | p->prev_same_hash->next_same_hash = p->next_same_hash; | |
1971 | else | |
1972 | table[i] = p->next_same_hash; | |
1973 | ||
1974 | p->next_same_hash = table[hash]; | |
1975 | p->prev_same_hash = 0; | |
1976 | if (table[hash]) | |
1977 | table[hash]->prev_same_hash = p; | |
1978 | table[hash] = p; | |
1979 | } | |
1980 | } | |
1981 | } | |
1982 | \f | |
7afe21cc RK |
1983 | /* Remove from the hash table any expression that is a call-clobbered |
1984 | register. Also update their TICK values. */ | |
1985 | ||
1986 | static void | |
7080f735 | 1987 | invalidate_for_call (void) |
7afe21cc | 1988 | { |
770ae6cc RK |
1989 | unsigned int regno, endregno; |
1990 | unsigned int i; | |
2197a88a | 1991 | unsigned hash; |
7afe21cc RK |
1992 | struct table_elt *p, *next; |
1993 | int in_table = 0; | |
1994 | ||
1995 | /* Go through all the hard registers. For each that is clobbered in | |
1996 | a CALL_INSN, remove the register from quantity chains and update | |
1997 | reg_tick if defined. Also see if any of these registers is currently | |
1998 | in the table. */ | |
1999 | ||
2000 | for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) | |
2001 | if (TEST_HARD_REG_BIT (regs_invalidated_by_call, regno)) | |
2002 | { | |
2003 | delete_reg_equiv (regno); | |
30f72379 | 2004 | if (REG_TICK (regno) >= 0) |
46081bb3 SH |
2005 | { |
2006 | REG_TICK (regno)++; | |
2007 | SUBREG_TICKED (regno) = -1; | |
2008 | } | |
7afe21cc | 2009 | |
0e227018 | 2010 | in_table |= (TEST_HARD_REG_BIT (hard_regs_in_table, regno) != 0); |
7afe21cc RK |
2011 | } |
2012 | ||
2013 | /* In the case where we have no call-clobbered hard registers in the | |
2014 | table, we are done. Otherwise, scan the table and remove any | |
2015 | entry that overlaps a call-clobbered register. */ | |
2016 | ||
2017 | if (in_table) | |
9b1549b8 | 2018 | for (hash = 0; hash < HASH_SIZE; hash++) |
7afe21cc RK |
2019 | for (p = table[hash]; p; p = next) |
2020 | { | |
2021 | next = p->next_same_hash; | |
2022 | ||
f8cfc6aa | 2023 | if (!REG_P (p->exp) |
7afe21cc RK |
2024 | || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER) |
2025 | continue; | |
2026 | ||
2027 | regno = REGNO (p->exp); | |
66fd46b6 | 2028 | endregno = regno + hard_regno_nregs[regno][GET_MODE (p->exp)]; |
7afe21cc RK |
2029 | |
2030 | for (i = regno; i < endregno; i++) | |
2031 | if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i)) | |
2032 | { | |
2033 | remove_from_table (p, hash); | |
2034 | break; | |
2035 | } | |
2036 | } | |
2037 | } | |
2038 | \f | |
2039 | /* Given an expression X of type CONST, | |
2040 | and ELT which is its table entry (or 0 if it | |
2041 | is not in the hash table), | |
2042 | return an alternate expression for X as a register plus integer. | |
2043 | If none can be found, return 0. */ | |
2044 | ||
2045 | static rtx | |
7080f735 | 2046 | use_related_value (rtx x, struct table_elt *elt) |
7afe21cc | 2047 | { |
b3694847 SS |
2048 | struct table_elt *relt = 0; |
2049 | struct table_elt *p, *q; | |
906c4e36 | 2050 | HOST_WIDE_INT offset; |
7afe21cc RK |
2051 | |
2052 | /* First, is there anything related known? | |
2053 | If we have a table element, we can tell from that. | |
2054 | Otherwise, must look it up. */ | |
2055 | ||
2056 | if (elt != 0 && elt->related_value != 0) | |
2057 | relt = elt; | |
2058 | else if (elt == 0 && GET_CODE (x) == CONST) | |
2059 | { | |
2060 | rtx subexp = get_related_value (x); | |
2061 | if (subexp != 0) | |
2062 | relt = lookup (subexp, | |
0516f6fe | 2063 | SAFE_HASH (subexp, GET_MODE (subexp)), |
7afe21cc RK |
2064 | GET_MODE (subexp)); |
2065 | } | |
2066 | ||
2067 | if (relt == 0) | |
2068 | return 0; | |
2069 | ||
2070 | /* Search all related table entries for one that has an | |
2071 | equivalent register. */ | |
2072 | ||
2073 | p = relt; | |
2074 | while (1) | |
2075 | { | |
2076 | /* This loop is strange in that it is executed in two different cases. | |
2077 | The first is when X is already in the table. Then it is searching | |
2078 | the RELATED_VALUE list of X's class (RELT). The second case is when | |
2079 | X is not in the table. Then RELT points to a class for the related | |
2080 | value. | |
2081 | ||
2082 | Ensure that, whatever case we are in, that we ignore classes that have | |
2083 | the same value as X. */ | |
2084 | ||
2085 | if (rtx_equal_p (x, p->exp)) | |
2086 | q = 0; | |
2087 | else | |
2088 | for (q = p->first_same_value; q; q = q->next_same_value) | |
f8cfc6aa | 2089 | if (REG_P (q->exp)) |
7afe21cc RK |
2090 | break; |
2091 | ||
2092 | if (q) | |
2093 | break; | |
2094 | ||
2095 | p = p->related_value; | |
2096 | ||
2097 | /* We went all the way around, so there is nothing to be found. | |
2098 | Alternatively, perhaps RELT was in the table for some other reason | |
2099 | and it has no related values recorded. */ | |
2100 | if (p == relt || p == 0) | |
2101 | break; | |
2102 | } | |
2103 | ||
2104 | if (q == 0) | |
2105 | return 0; | |
2106 | ||
2107 | offset = (get_integer_term (x) - get_integer_term (p->exp)); | |
2108 | /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */ | |
2109 | return plus_constant (q->exp, offset); | |
2110 | } | |
2111 | \f | |
6462bb43 AO |
2112 | /* Hash a string. Just add its bytes up. */ |
2113 | static inline unsigned | |
0516f6fe | 2114 | hash_rtx_string (const char *ps) |
6462bb43 AO |
2115 | { |
2116 | unsigned hash = 0; | |
68252e27 KH |
2117 | const unsigned char *p = (const unsigned char *) ps; |
2118 | ||
6462bb43 AO |
2119 | if (p) |
2120 | while (*p) | |
2121 | hash += *p++; | |
2122 | ||
2123 | return hash; | |
2124 | } | |
2125 | ||
7afe21cc RK |
2126 | /* Hash an rtx. We are careful to make sure the value is never negative. |
2127 | Equivalent registers hash identically. | |
2128 | MODE is used in hashing for CONST_INTs only; | |
2129 | otherwise the mode of X is used. | |
2130 | ||
0516f6fe | 2131 | Store 1 in DO_NOT_RECORD_P if any subexpression is volatile. |
7afe21cc | 2132 | |
0516f6fe SB |
2133 | If HASH_ARG_IN_MEMORY_P is not NULL, store 1 in it if X contains |
2134 | a MEM rtx which does not have the RTX_UNCHANGING_P bit set. | |
7afe21cc RK |
2135 | |
2136 | Note that cse_insn knows that the hash code of a MEM expression | |
2137 | is just (int) MEM plus the hash code of the address. */ | |
2138 | ||
0516f6fe SB |
2139 | unsigned |
2140 | hash_rtx (rtx x, enum machine_mode mode, int *do_not_record_p, | |
2141 | int *hash_arg_in_memory_p, bool have_reg_qty) | |
7afe21cc | 2142 | { |
b3694847 SS |
2143 | int i, j; |
2144 | unsigned hash = 0; | |
2145 | enum rtx_code code; | |
2146 | const char *fmt; | |
7afe21cc | 2147 | |
0516f6fe SB |
2148 | /* Used to turn recursion into iteration. We can't rely on GCC's |
2149 | tail-recursion elimination since we need to keep accumulating values | |
2150 | in HASH. */ | |
7afe21cc RK |
2151 | repeat: |
2152 | if (x == 0) | |
2153 | return hash; | |
2154 | ||
2155 | code = GET_CODE (x); | |
2156 | switch (code) | |
2157 | { | |
2158 | case REG: | |
2159 | { | |
770ae6cc | 2160 | unsigned int regno = REGNO (x); |
7afe21cc | 2161 | |
0516f6fe | 2162 | if (!reload_completed) |
7afe21cc | 2163 | { |
0516f6fe SB |
2164 | /* On some machines, we can't record any non-fixed hard register, |
2165 | because extending its life will cause reload problems. We | |
2166 | consider ap, fp, sp, gp to be fixed for this purpose. | |
2167 | ||
2168 | We also consider CCmode registers to be fixed for this purpose; | |
2169 | failure to do so leads to failure to simplify 0<100 type of | |
2170 | conditionals. | |
2171 | ||
2172 | On all machines, we can't record any global registers. | |
2173 | Nor should we record any register that is in a small | |
2174 | class, as defined by CLASS_LIKELY_SPILLED_P. */ | |
2175 | bool record; | |
2176 | ||
2177 | if (regno >= FIRST_PSEUDO_REGISTER) | |
2178 | record = true; | |
2179 | else if (x == frame_pointer_rtx | |
2180 | || x == hard_frame_pointer_rtx | |
2181 | || x == arg_pointer_rtx | |
2182 | || x == stack_pointer_rtx | |
2183 | || x == pic_offset_table_rtx) | |
2184 | record = true; | |
2185 | else if (global_regs[regno]) | |
2186 | record = false; | |
2187 | else if (fixed_regs[regno]) | |
2188 | record = true; | |
2189 | else if (GET_MODE_CLASS (GET_MODE (x)) == MODE_CC) | |
2190 | record = true; | |
2191 | else if (SMALL_REGISTER_CLASSES) | |
2192 | record = false; | |
2193 | else if (CLASS_LIKELY_SPILLED_P (REGNO_REG_CLASS (regno))) | |
2194 | record = false; | |
2195 | else | |
2196 | record = true; | |
2197 | ||
2198 | if (!record) | |
2199 | { | |
2200 | *do_not_record_p = 1; | |
2201 | return 0; | |
2202 | } | |
7afe21cc | 2203 | } |
770ae6cc | 2204 | |
0516f6fe SB |
2205 | hash += ((unsigned int) REG << 7); |
2206 | hash += (have_reg_qty ? (unsigned) REG_QTY (regno) : regno); | |
2197a88a | 2207 | return hash; |
7afe21cc RK |
2208 | } |
2209 | ||
34c73909 R |
2210 | /* We handle SUBREG of a REG specially because the underlying |
2211 | reg changes its hash value with every value change; we don't | |
2212 | want to have to forget unrelated subregs when one subreg changes. */ | |
2213 | case SUBREG: | |
2214 | { | |
f8cfc6aa | 2215 | if (REG_P (SUBREG_REG (x))) |
34c73909 | 2216 | { |
0516f6fe | 2217 | hash += (((unsigned int) SUBREG << 7) |
ddef6bc7 JJ |
2218 | + REGNO (SUBREG_REG (x)) |
2219 | + (SUBREG_BYTE (x) / UNITS_PER_WORD)); | |
34c73909 R |
2220 | return hash; |
2221 | } | |
2222 | break; | |
2223 | } | |
2224 | ||
7afe21cc | 2225 | case CONST_INT: |
0516f6fe SB |
2226 | hash += (((unsigned int) CONST_INT << 7) + (unsigned int) mode |
2227 | + (unsigned int) INTVAL (x)); | |
2228 | return hash; | |
7afe21cc RK |
2229 | |
2230 | case CONST_DOUBLE: | |
2231 | /* This is like the general case, except that it only counts | |
2232 | the integers representing the constant. */ | |
0516f6fe | 2233 | hash += (unsigned int) code + (unsigned int) GET_MODE (x); |
969c8517 | 2234 | if (GET_MODE (x) != VOIDmode) |
46b33600 | 2235 | hash += real_hash (CONST_DOUBLE_REAL_VALUE (x)); |
969c8517 | 2236 | else |
0516f6fe SB |
2237 | hash += ((unsigned int) CONST_DOUBLE_LOW (x) |
2238 | + (unsigned int) CONST_DOUBLE_HIGH (x)); | |
7afe21cc RK |
2239 | return hash; |
2240 | ||
69ef87e2 AH |
2241 | case CONST_VECTOR: |
2242 | { | |
2243 | int units; | |
2244 | rtx elt; | |
2245 | ||
2246 | units = CONST_VECTOR_NUNITS (x); | |
2247 | ||
2248 | for (i = 0; i < units; ++i) | |
2249 | { | |
2250 | elt = CONST_VECTOR_ELT (x, i); | |
0516f6fe SB |
2251 | hash += hash_rtx (elt, GET_MODE (elt), do_not_record_p, |
2252 | hash_arg_in_memory_p, have_reg_qty); | |
69ef87e2 AH |
2253 | } |
2254 | ||
2255 | return hash; | |
2256 | } | |
2257 | ||
7afe21cc RK |
2258 | /* Assume there is only one rtx object for any given label. */ |
2259 | case LABEL_REF: | |
0516f6fe SB |
2260 | /* We don't hash on the address of the CODE_LABEL to avoid bootstrap |
2261 | differences and differences between each stage's debugging dumps. */ | |
2262 | hash += (((unsigned int) LABEL_REF << 7) | |
2263 | + CODE_LABEL_NUMBER (XEXP (x, 0))); | |
2197a88a | 2264 | return hash; |
7afe21cc RK |
2265 | |
2266 | case SYMBOL_REF: | |
0516f6fe SB |
2267 | { |
2268 | /* Don't hash on the symbol's address to avoid bootstrap differences. | |
2269 | Different hash values may cause expressions to be recorded in | |
2270 | different orders and thus different registers to be used in the | |
2271 | final assembler. This also avoids differences in the dump files | |
2272 | between various stages. */ | |
2273 | unsigned int h = 0; | |
2274 | const unsigned char *p = (const unsigned char *) XSTR (x, 0); | |
2275 | ||
2276 | while (*p) | |
2277 | h += (h << 7) + *p++; /* ??? revisit */ | |
2278 | ||
2279 | hash += ((unsigned int) SYMBOL_REF << 7) + h; | |
2280 | return hash; | |
2281 | } | |
7afe21cc RK |
2282 | |
2283 | case MEM: | |
14a774a9 RK |
2284 | /* We don't record if marked volatile or if BLKmode since we don't |
2285 | know the size of the move. */ | |
2286 | if (MEM_VOLATILE_P (x) || GET_MODE (x) == BLKmode) | |
7afe21cc | 2287 | { |
0516f6fe | 2288 | *do_not_record_p = 1; |
7afe21cc RK |
2289 | return 0; |
2290 | } | |
0516f6fe SB |
2291 | if (hash_arg_in_memory_p && !MEM_READONLY_P (x)) |
2292 | *hash_arg_in_memory_p = 1; | |
4977bab6 | 2293 | |
7afe21cc RK |
2294 | /* Now that we have already found this special case, |
2295 | might as well speed it up as much as possible. */ | |
2197a88a | 2296 | hash += (unsigned) MEM; |
7afe21cc RK |
2297 | x = XEXP (x, 0); |
2298 | goto repeat; | |
2299 | ||
bb07060a JW |
2300 | case USE: |
2301 | /* A USE that mentions non-volatile memory needs special | |
2302 | handling since the MEM may be BLKmode which normally | |
2303 | prevents an entry from being made. Pure calls are | |
0516f6fe SB |
2304 | marked by a USE which mentions BLKmode memory. |
2305 | See calls.c:emit_call_1. */ | |
3c0cb5de | 2306 | if (MEM_P (XEXP (x, 0)) |
bb07060a JW |
2307 | && ! MEM_VOLATILE_P (XEXP (x, 0))) |
2308 | { | |
68252e27 | 2309 | hash += (unsigned) USE; |
bb07060a JW |
2310 | x = XEXP (x, 0); |
2311 | ||
0516f6fe SB |
2312 | if (hash_arg_in_memory_p && !MEM_READONLY_P (x)) |
2313 | *hash_arg_in_memory_p = 1; | |
bb07060a JW |
2314 | |
2315 | /* Now that we have already found this special case, | |
2316 | might as well speed it up as much as possible. */ | |
2317 | hash += (unsigned) MEM; | |
2318 | x = XEXP (x, 0); | |
2319 | goto repeat; | |
2320 | } | |
2321 | break; | |
2322 | ||
7afe21cc RK |
2323 | case PRE_DEC: |
2324 | case PRE_INC: | |
2325 | case POST_DEC: | |
2326 | case POST_INC: | |
4b983fdc RH |
2327 | case PRE_MODIFY: |
2328 | case POST_MODIFY: | |
7afe21cc RK |
2329 | case PC: |
2330 | case CC0: | |
2331 | case CALL: | |
2332 | case UNSPEC_VOLATILE: | |
0516f6fe | 2333 | *do_not_record_p = 1; |
7afe21cc RK |
2334 | return 0; |
2335 | ||
2336 | case ASM_OPERANDS: | |
2337 | if (MEM_VOLATILE_P (x)) | |
2338 | { | |
0516f6fe | 2339 | *do_not_record_p = 1; |
7afe21cc RK |
2340 | return 0; |
2341 | } | |
6462bb43 AO |
2342 | else |
2343 | { | |
2344 | /* We don't want to take the filename and line into account. */ | |
2345 | hash += (unsigned) code + (unsigned) GET_MODE (x) | |
0516f6fe SB |
2346 | + hash_rtx_string (ASM_OPERANDS_TEMPLATE (x)) |
2347 | + hash_rtx_string (ASM_OPERANDS_OUTPUT_CONSTRAINT (x)) | |
6462bb43 AO |
2348 | + (unsigned) ASM_OPERANDS_OUTPUT_IDX (x); |
2349 | ||
2350 | if (ASM_OPERANDS_INPUT_LENGTH (x)) | |
2351 | { | |
2352 | for (i = 1; i < ASM_OPERANDS_INPUT_LENGTH (x); i++) | |
2353 | { | |
0516f6fe SB |
2354 | hash += (hash_rtx (ASM_OPERANDS_INPUT (x, i), |
2355 | GET_MODE (ASM_OPERANDS_INPUT (x, i)), | |
2356 | do_not_record_p, hash_arg_in_memory_p, | |
2357 | have_reg_qty) | |
2358 | + hash_rtx_string | |
2359 | (ASM_OPERANDS_INPUT_CONSTRAINT (x, i))); | |
6462bb43 AO |
2360 | } |
2361 | ||
0516f6fe | 2362 | hash += hash_rtx_string (ASM_OPERANDS_INPUT_CONSTRAINT (x, 0)); |
6462bb43 AO |
2363 | x = ASM_OPERANDS_INPUT (x, 0); |
2364 | mode = GET_MODE (x); | |
2365 | goto repeat; | |
2366 | } | |
2367 | ||
2368 | return hash; | |
2369 | } | |
e9a25f70 | 2370 | break; |
278a83b2 | 2371 | |
e9a25f70 JL |
2372 | default: |
2373 | break; | |
7afe21cc RK |
2374 | } |
2375 | ||
2376 | i = GET_RTX_LENGTH (code) - 1; | |
2197a88a | 2377 | hash += (unsigned) code + (unsigned) GET_MODE (x); |
7afe21cc RK |
2378 | fmt = GET_RTX_FORMAT (code); |
2379 | for (; i >= 0; i--) | |
2380 | { | |
341c100f | 2381 | switch (fmt[i]) |
7afe21cc | 2382 | { |
341c100f | 2383 | case 'e': |
7afe21cc RK |
2384 | /* If we are about to do the last recursive call |
2385 | needed at this level, change it into iteration. | |
2386 | This function is called enough to be worth it. */ | |
2387 | if (i == 0) | |
2388 | { | |
0516f6fe | 2389 | x = XEXP (x, i); |
7afe21cc RK |
2390 | goto repeat; |
2391 | } | |
0516f6fe SB |
2392 | |
2393 | hash += hash_rtx (XEXP (x, i), 0, do_not_record_p, | |
2394 | hash_arg_in_memory_p, have_reg_qty); | |
341c100f | 2395 | break; |
0516f6fe | 2396 | |
341c100f NS |
2397 | case 'E': |
2398 | for (j = 0; j < XVECLEN (x, i); j++) | |
0516f6fe SB |
2399 | hash += hash_rtx (XVECEXP (x, i, j), 0, do_not_record_p, |
2400 | hash_arg_in_memory_p, have_reg_qty); | |
341c100f | 2401 | break; |
0516f6fe | 2402 | |
341c100f NS |
2403 | case 's': |
2404 | hash += hash_rtx_string (XSTR (x, i)); | |
2405 | break; | |
2406 | ||
2407 | case 'i': | |
2408 | hash += (unsigned int) XINT (x, i); | |
2409 | break; | |
2410 | ||
2411 | case '0': case 't': | |
2412 | /* Unused. */ | |
2413 | break; | |
2414 | ||
2415 | default: | |
2416 | gcc_unreachable (); | |
2417 | } | |
7afe21cc | 2418 | } |
0516f6fe | 2419 | |
7afe21cc RK |
2420 | return hash; |
2421 | } | |
2422 | ||
0516f6fe SB |
2423 | /* Hash an rtx X for cse via hash_rtx. |
2424 | Stores 1 in do_not_record if any subexpression is volatile. | |
2425 | Stores 1 in hash_arg_in_memory if X contains a mem rtx which | |
2426 | does not have the RTX_UNCHANGING_P bit set. */ | |
2427 | ||
2428 | static inline unsigned | |
2429 | canon_hash (rtx x, enum machine_mode mode) | |
2430 | { | |
2431 | return hash_rtx (x, mode, &do_not_record, &hash_arg_in_memory, true); | |
2432 | } | |
2433 | ||
2434 | /* Like canon_hash but with no side effects, i.e. do_not_record | |
2435 | and hash_arg_in_memory are not changed. */ | |
7afe21cc | 2436 | |
0516f6fe | 2437 | static inline unsigned |
7080f735 | 2438 | safe_hash (rtx x, enum machine_mode mode) |
7afe21cc | 2439 | { |
0516f6fe SB |
2440 | int dummy_do_not_record; |
2441 | return hash_rtx (x, mode, &dummy_do_not_record, NULL, true); | |
7afe21cc RK |
2442 | } |
2443 | \f | |
2444 | /* Return 1 iff X and Y would canonicalize into the same thing, | |
2445 | without actually constructing the canonicalization of either one. | |
2446 | If VALIDATE is nonzero, | |
2447 | we assume X is an expression being processed from the rtl | |
2448 | and Y was found in the hash table. We check register refs | |
2449 | in Y for being marked as valid. | |
2450 | ||
0516f6fe | 2451 | If FOR_GCSE is true, we compare X and Y for equivalence for GCSE. */ |
7afe21cc | 2452 | |
0516f6fe SB |
2453 | int |
2454 | exp_equiv_p (rtx x, rtx y, int validate, bool for_gcse) | |
7afe21cc | 2455 | { |
b3694847 SS |
2456 | int i, j; |
2457 | enum rtx_code code; | |
2458 | const char *fmt; | |
7afe21cc RK |
2459 | |
2460 | /* Note: it is incorrect to assume an expression is equivalent to itself | |
2461 | if VALIDATE is nonzero. */ | |
2462 | if (x == y && !validate) | |
2463 | return 1; | |
0516f6fe | 2464 | |
7afe21cc RK |
2465 | if (x == 0 || y == 0) |
2466 | return x == y; | |
2467 | ||
2468 | code = GET_CODE (x); | |
2469 | if (code != GET_CODE (y)) | |
0516f6fe | 2470 | return 0; |
7afe21cc RK |
2471 | |
2472 | /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */ | |
2473 | if (GET_MODE (x) != GET_MODE (y)) | |
2474 | return 0; | |
2475 | ||
2476 | switch (code) | |
2477 | { | |
2478 | case PC: | |
2479 | case CC0: | |
7afe21cc | 2480 | case CONST_INT: |
c13e8210 | 2481 | return x == y; |
7afe21cc RK |
2482 | |
2483 | case LABEL_REF: | |
7afe21cc RK |
2484 | return XEXP (x, 0) == XEXP (y, 0); |
2485 | ||
f54d4924 RK |
2486 | case SYMBOL_REF: |
2487 | return XSTR (x, 0) == XSTR (y, 0); | |
2488 | ||
7afe21cc | 2489 | case REG: |
0516f6fe SB |
2490 | if (for_gcse) |
2491 | return REGNO (x) == REGNO (y); | |
2492 | else | |
2493 | { | |
2494 | unsigned int regno = REGNO (y); | |
2495 | unsigned int i; | |
2496 | unsigned int endregno | |
2497 | = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1 | |
2498 | : hard_regno_nregs[regno][GET_MODE (y)]); | |
7afe21cc | 2499 | |
0516f6fe SB |
2500 | /* If the quantities are not the same, the expressions are not |
2501 | equivalent. If there are and we are not to validate, they | |
2502 | are equivalent. Otherwise, ensure all regs are up-to-date. */ | |
7afe21cc | 2503 | |
0516f6fe SB |
2504 | if (REG_QTY (REGNO (x)) != REG_QTY (regno)) |
2505 | return 0; | |
2506 | ||
2507 | if (! validate) | |
2508 | return 1; | |
2509 | ||
2510 | for (i = regno; i < endregno; i++) | |
2511 | if (REG_IN_TABLE (i) != REG_TICK (i)) | |
2512 | return 0; | |
7afe21cc | 2513 | |
7afe21cc | 2514 | return 1; |
0516f6fe | 2515 | } |
7afe21cc | 2516 | |
0516f6fe SB |
2517 | case MEM: |
2518 | if (for_gcse) | |
2519 | { | |
2520 | /* Can't merge two expressions in different alias sets, since we | |
2521 | can decide that the expression is transparent in a block when | |
2522 | it isn't, due to it being set with the different alias set. */ | |
2523 | if (MEM_ALIAS_SET (x) != MEM_ALIAS_SET (y)) | |
7afe21cc RK |
2524 | return 0; |
2525 | ||
0516f6fe SB |
2526 | /* A volatile mem should not be considered equivalent to any |
2527 | other. */ | |
2528 | if (MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y)) | |
2529 | return 0; | |
2530 | } | |
2531 | break; | |
7afe21cc RK |
2532 | |
2533 | /* For commutative operations, check both orders. */ | |
2534 | case PLUS: | |
2535 | case MULT: | |
2536 | case AND: | |
2537 | case IOR: | |
2538 | case XOR: | |
2539 | case NE: | |
2540 | case EQ: | |
0516f6fe SB |
2541 | return ((exp_equiv_p (XEXP (x, 0), XEXP (y, 0), |
2542 | validate, for_gcse) | |
7afe21cc | 2543 | && exp_equiv_p (XEXP (x, 1), XEXP (y, 1), |
0516f6fe | 2544 | validate, for_gcse)) |
7afe21cc | 2545 | || (exp_equiv_p (XEXP (x, 0), XEXP (y, 1), |
0516f6fe | 2546 | validate, for_gcse) |
7afe21cc | 2547 | && exp_equiv_p (XEXP (x, 1), XEXP (y, 0), |
0516f6fe | 2548 | validate, for_gcse))); |
278a83b2 | 2549 | |
6462bb43 AO |
2550 | case ASM_OPERANDS: |
2551 | /* We don't use the generic code below because we want to | |
2552 | disregard filename and line numbers. */ | |
2553 | ||
2554 | /* A volatile asm isn't equivalent to any other. */ | |
2555 | if (MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y)) | |
2556 | return 0; | |
2557 | ||
2558 | if (GET_MODE (x) != GET_MODE (y) | |
2559 | || strcmp (ASM_OPERANDS_TEMPLATE (x), ASM_OPERANDS_TEMPLATE (y)) | |
2560 | || strcmp (ASM_OPERANDS_OUTPUT_CONSTRAINT (x), | |
2561 | ASM_OPERANDS_OUTPUT_CONSTRAINT (y)) | |
2562 | || ASM_OPERANDS_OUTPUT_IDX (x) != ASM_OPERANDS_OUTPUT_IDX (y) | |
2563 | || ASM_OPERANDS_INPUT_LENGTH (x) != ASM_OPERANDS_INPUT_LENGTH (y)) | |
2564 | return 0; | |
2565 | ||
2566 | if (ASM_OPERANDS_INPUT_LENGTH (x)) | |
2567 | { | |
2568 | for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--) | |
2569 | if (! exp_equiv_p (ASM_OPERANDS_INPUT (x, i), | |
2570 | ASM_OPERANDS_INPUT (y, i), | |
0516f6fe | 2571 | validate, for_gcse) |
6462bb43 AO |
2572 | || strcmp (ASM_OPERANDS_INPUT_CONSTRAINT (x, i), |
2573 | ASM_OPERANDS_INPUT_CONSTRAINT (y, i))) | |
2574 | return 0; | |
2575 | } | |
2576 | ||
2577 | return 1; | |
2578 | ||
e9a25f70 JL |
2579 | default: |
2580 | break; | |
7afe21cc RK |
2581 | } |
2582 | ||
2583 | /* Compare the elements. If any pair of corresponding elements | |
0516f6fe | 2584 | fail to match, return 0 for the whole thing. */ |
7afe21cc RK |
2585 | |
2586 | fmt = GET_RTX_FORMAT (code); | |
2587 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
2588 | { | |
906c4e36 | 2589 | switch (fmt[i]) |
7afe21cc | 2590 | { |
906c4e36 | 2591 | case 'e': |
0516f6fe SB |
2592 | if (! exp_equiv_p (XEXP (x, i), XEXP (y, i), |
2593 | validate, for_gcse)) | |
7afe21cc | 2594 | return 0; |
906c4e36 RK |
2595 | break; |
2596 | ||
2597 | case 'E': | |
7afe21cc RK |
2598 | if (XVECLEN (x, i) != XVECLEN (y, i)) |
2599 | return 0; | |
2600 | for (j = 0; j < XVECLEN (x, i); j++) | |
2601 | if (! exp_equiv_p (XVECEXP (x, i, j), XVECEXP (y, i, j), | |
0516f6fe | 2602 | validate, for_gcse)) |
7afe21cc | 2603 | return 0; |
906c4e36 RK |
2604 | break; |
2605 | ||
2606 | case 's': | |
7afe21cc RK |
2607 | if (strcmp (XSTR (x, i), XSTR (y, i))) |
2608 | return 0; | |
906c4e36 RK |
2609 | break; |
2610 | ||
2611 | case 'i': | |
7afe21cc RK |
2612 | if (XINT (x, i) != XINT (y, i)) |
2613 | return 0; | |
906c4e36 RK |
2614 | break; |
2615 | ||
2616 | case 'w': | |
2617 | if (XWINT (x, i) != XWINT (y, i)) | |
2618 | return 0; | |
278a83b2 | 2619 | break; |
906c4e36 RK |
2620 | |
2621 | case '0': | |
8f985ec4 | 2622 | case 't': |
906c4e36 RK |
2623 | break; |
2624 | ||
2625 | default: | |
341c100f | 2626 | gcc_unreachable (); |
7afe21cc | 2627 | } |
278a83b2 | 2628 | } |
906c4e36 | 2629 | |
7afe21cc RK |
2630 | return 1; |
2631 | } | |
2632 | \f | |
9ae8ffe7 JL |
2633 | /* Return 1 if X has a value that can vary even between two |
2634 | executions of the program. 0 means X can be compared reliably | |
2635 | against certain constants or near-constants. */ | |
7afe21cc RK |
2636 | |
2637 | static int | |
7080f735 | 2638 | cse_rtx_varies_p (rtx x, int from_alias) |
7afe21cc RK |
2639 | { |
2640 | /* We need not check for X and the equivalence class being of the same | |
2641 | mode because if X is equivalent to a constant in some mode, it | |
2642 | doesn't vary in any mode. */ | |
2643 | ||
f8cfc6aa | 2644 | if (REG_P (x) |
1bb98cec DM |
2645 | && REGNO_QTY_VALID_P (REGNO (x))) |
2646 | { | |
2647 | int x_q = REG_QTY (REGNO (x)); | |
2648 | struct qty_table_elem *x_ent = &qty_table[x_q]; | |
2649 | ||
2650 | if (GET_MODE (x) == x_ent->mode | |
2651 | && x_ent->const_rtx != NULL_RTX) | |
2652 | return 0; | |
2653 | } | |
7afe21cc | 2654 | |
9ae8ffe7 JL |
2655 | if (GET_CODE (x) == PLUS |
2656 | && GET_CODE (XEXP (x, 1)) == CONST_INT | |
f8cfc6aa | 2657 | && REG_P (XEXP (x, 0)) |
1bb98cec DM |
2658 | && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0)))) |
2659 | { | |
2660 | int x0_q = REG_QTY (REGNO (XEXP (x, 0))); | |
2661 | struct qty_table_elem *x0_ent = &qty_table[x0_q]; | |
2662 | ||
2663 | if ((GET_MODE (XEXP (x, 0)) == x0_ent->mode) | |
2664 | && x0_ent->const_rtx != NULL_RTX) | |
2665 | return 0; | |
2666 | } | |
7afe21cc | 2667 | |
9c6b0bae RK |
2668 | /* This can happen as the result of virtual register instantiation, if |
2669 | the initial constant is too large to be a valid address. This gives | |
2670 | us a three instruction sequence, load large offset into a register, | |
2671 | load fp minus a constant into a register, then a MEM which is the | |
2672 | sum of the two `constant' registers. */ | |
9ae8ffe7 | 2673 | if (GET_CODE (x) == PLUS |
f8cfc6aa JQ |
2674 | && REG_P (XEXP (x, 0)) |
2675 | && REG_P (XEXP (x, 1)) | |
9ae8ffe7 | 2676 | && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))) |
1bb98cec DM |
2677 | && REGNO_QTY_VALID_P (REGNO (XEXP (x, 1)))) |
2678 | { | |
2679 | int x0_q = REG_QTY (REGNO (XEXP (x, 0))); | |
2680 | int x1_q = REG_QTY (REGNO (XEXP (x, 1))); | |
2681 | struct qty_table_elem *x0_ent = &qty_table[x0_q]; | |
2682 | struct qty_table_elem *x1_ent = &qty_table[x1_q]; | |
2683 | ||
2684 | if ((GET_MODE (XEXP (x, 0)) == x0_ent->mode) | |
2685 | && x0_ent->const_rtx != NULL_RTX | |
2686 | && (GET_MODE (XEXP (x, 1)) == x1_ent->mode) | |
2687 | && x1_ent->const_rtx != NULL_RTX) | |
2688 | return 0; | |
2689 | } | |
9c6b0bae | 2690 | |
2be28ee2 | 2691 | return rtx_varies_p (x, from_alias); |
7afe21cc RK |
2692 | } |
2693 | \f | |
eef3c949 RS |
2694 | /* Subroutine of canon_reg. Pass *XLOC through canon_reg, and validate |
2695 | the result if necessary. INSN is as for canon_reg. */ | |
2696 | ||
2697 | static void | |
2698 | validate_canon_reg (rtx *xloc, rtx insn) | |
2699 | { | |
2700 | rtx new = canon_reg (*xloc, insn); | |
2701 | int insn_code; | |
2702 | ||
2703 | /* If replacing pseudo with hard reg or vice versa, ensure the | |
2704 | insn remains valid. Likewise if the insn has MATCH_DUPs. */ | |
2705 | if (insn != 0 && new != 0 | |
2706 | && REG_P (new) && REG_P (*xloc) | |
2707 | && (((REGNO (new) < FIRST_PSEUDO_REGISTER) | |
2708 | != (REGNO (*xloc) < FIRST_PSEUDO_REGISTER)) | |
2709 | || GET_MODE (new) != GET_MODE (*xloc) | |
2710 | || (insn_code = recog_memoized (insn)) < 0 | |
2711 | || insn_data[insn_code].n_dups > 0)) | |
2712 | validate_change (insn, xloc, new, 1); | |
2713 | else | |
2714 | *xloc = new; | |
2715 | } | |
2716 | ||
7afe21cc RK |
2717 | /* Canonicalize an expression: |
2718 | replace each register reference inside it | |
2719 | with the "oldest" equivalent register. | |
2720 | ||
da7d8304 | 2721 | If INSN is nonzero and we are replacing a pseudo with a hard register |
7722328e | 2722 | or vice versa, validate_change is used to ensure that INSN remains valid |
da7d8304 | 2723 | after we make our substitution. The calls are made with IN_GROUP nonzero |
7722328e RK |
2724 | so apply_change_group must be called upon the outermost return from this |
2725 | function (unless INSN is zero). The result of apply_change_group can | |
2726 | generally be discarded since the changes we are making are optional. */ | |
7afe21cc RK |
2727 | |
2728 | static rtx | |
7080f735 | 2729 | canon_reg (rtx x, rtx insn) |
7afe21cc | 2730 | { |
b3694847 SS |
2731 | int i; |
2732 | enum rtx_code code; | |
2733 | const char *fmt; | |
7afe21cc RK |
2734 | |
2735 | if (x == 0) | |
2736 | return x; | |
2737 | ||
2738 | code = GET_CODE (x); | |
2739 | switch (code) | |
2740 | { | |
2741 | case PC: | |
2742 | case CC0: | |
2743 | case CONST: | |
2744 | case CONST_INT: | |
2745 | case CONST_DOUBLE: | |
69ef87e2 | 2746 | case CONST_VECTOR: |
7afe21cc RK |
2747 | case SYMBOL_REF: |
2748 | case LABEL_REF: | |
2749 | case ADDR_VEC: | |
2750 | case ADDR_DIFF_VEC: | |
2751 | return x; | |
2752 | ||
2753 | case REG: | |
2754 | { | |
b3694847 SS |
2755 | int first; |
2756 | int q; | |
2757 | struct qty_table_elem *ent; | |
7afe21cc RK |
2758 | |
2759 | /* Never replace a hard reg, because hard regs can appear | |
2760 | in more than one machine mode, and we must preserve the mode | |
2761 | of each occurrence. Also, some hard regs appear in | |
2762 | MEMs that are shared and mustn't be altered. Don't try to | |
2763 | replace any reg that maps to a reg of class NO_REGS. */ | |
2764 | if (REGNO (x) < FIRST_PSEUDO_REGISTER | |
2765 | || ! REGNO_QTY_VALID_P (REGNO (x))) | |
2766 | return x; | |
2767 | ||
278a83b2 | 2768 | q = REG_QTY (REGNO (x)); |
1bb98cec DM |
2769 | ent = &qty_table[q]; |
2770 | first = ent->first_reg; | |
7afe21cc RK |
2771 | return (first >= FIRST_PSEUDO_REGISTER ? regno_reg_rtx[first] |
2772 | : REGNO_REG_CLASS (first) == NO_REGS ? x | |
1bb98cec | 2773 | : gen_rtx_REG (ent->mode, first)); |
7afe21cc | 2774 | } |
278a83b2 | 2775 | |
e9a25f70 JL |
2776 | default: |
2777 | break; | |
7afe21cc RK |
2778 | } |
2779 | ||
2780 | fmt = GET_RTX_FORMAT (code); | |
2781 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
2782 | { | |
b3694847 | 2783 | int j; |
7afe21cc RK |
2784 | |
2785 | if (fmt[i] == 'e') | |
eef3c949 | 2786 | validate_canon_reg (&XEXP (x, i), insn); |
7afe21cc RK |
2787 | else if (fmt[i] == 'E') |
2788 | for (j = 0; j < XVECLEN (x, i); j++) | |
eef3c949 | 2789 | validate_canon_reg (&XVECEXP (x, i, j), insn); |
7afe21cc RK |
2790 | } |
2791 | ||
2792 | return x; | |
2793 | } | |
2794 | \f | |
a2cabb29 | 2795 | /* LOC is a location within INSN that is an operand address (the contents of |
7afe21cc RK |
2796 | a MEM). Find the best equivalent address to use that is valid for this |
2797 | insn. | |
2798 | ||
2799 | On most CISC machines, complicated address modes are costly, and rtx_cost | |
2800 | is a good approximation for that cost. However, most RISC machines have | |
2801 | only a few (usually only one) memory reference formats. If an address is | |
2802 | valid at all, it is often just as cheap as any other address. Hence, for | |
e37135f7 RH |
2803 | RISC machines, we use `address_cost' to compare the costs of various |
2804 | addresses. For two addresses of equal cost, choose the one with the | |
2805 | highest `rtx_cost' value as that has the potential of eliminating the | |
2806 | most insns. For equal costs, we choose the first in the equivalence | |
2807 | class. Note that we ignore the fact that pseudo registers are cheaper than | |
2808 | hard registers here because we would also prefer the pseudo registers. */ | |
7afe21cc | 2809 | |
6cd4575e | 2810 | static void |
7080f735 | 2811 | find_best_addr (rtx insn, rtx *loc, enum machine_mode mode) |
7afe21cc | 2812 | { |
7a87758d | 2813 | struct table_elt *elt; |
7afe21cc | 2814 | rtx addr = *loc; |
7a87758d | 2815 | struct table_elt *p; |
7afe21cc RK |
2816 | int found_better = 1; |
2817 | int save_do_not_record = do_not_record; | |
2818 | int save_hash_arg_in_memory = hash_arg_in_memory; | |
7afe21cc RK |
2819 | int addr_volatile; |
2820 | int regno; | |
2197a88a | 2821 | unsigned hash; |
7afe21cc RK |
2822 | |
2823 | /* Do not try to replace constant addresses or addresses of local and | |
2824 | argument slots. These MEM expressions are made only once and inserted | |
2825 | in many instructions, as well as being used to control symbol table | |
2826 | output. It is not safe to clobber them. | |
2827 | ||
2828 | There are some uncommon cases where the address is already in a register | |
2829 | for some reason, but we cannot take advantage of that because we have | |
2830 | no easy way to unshare the MEM. In addition, looking up all stack | |
2831 | addresses is costly. */ | |
2832 | if ((GET_CODE (addr) == PLUS | |
f8cfc6aa | 2833 | && REG_P (XEXP (addr, 0)) |
7afe21cc RK |
2834 | && GET_CODE (XEXP (addr, 1)) == CONST_INT |
2835 | && (regno = REGNO (XEXP (addr, 0)), | |
8bc169f2 DE |
2836 | regno == FRAME_POINTER_REGNUM || regno == HARD_FRAME_POINTER_REGNUM |
2837 | || regno == ARG_POINTER_REGNUM)) | |
f8cfc6aa | 2838 | || (REG_P (addr) |
8bc169f2 DE |
2839 | && (regno = REGNO (addr), regno == FRAME_POINTER_REGNUM |
2840 | || regno == HARD_FRAME_POINTER_REGNUM | |
2841 | || regno == ARG_POINTER_REGNUM)) | |
7afe21cc RK |
2842 | || CONSTANT_ADDRESS_P (addr)) |
2843 | return; | |
2844 | ||
2845 | /* If this address is not simply a register, try to fold it. This will | |
2846 | sometimes simplify the expression. Many simplifications | |
2847 | will not be valid, but some, usually applying the associative rule, will | |
2848 | be valid and produce better code. */ | |
f8cfc6aa | 2849 | if (!REG_P (addr)) |
8c87f107 | 2850 | { |
6c667859 AB |
2851 | rtx folded = fold_rtx (addr, NULL_RTX); |
2852 | if (folded != addr) | |
2853 | { | |
2854 | int addr_folded_cost = address_cost (folded, mode); | |
2855 | int addr_cost = address_cost (addr, mode); | |
2856 | ||
2857 | if ((addr_folded_cost < addr_cost | |
2858 | || (addr_folded_cost == addr_cost | |
2859 | /* ??? The rtx_cost comparison is left over from an older | |
2860 | version of this code. It is probably no longer helpful.*/ | |
2861 | && (rtx_cost (folded, MEM) > rtx_cost (addr, MEM) | |
2862 | || approx_reg_cost (folded) < approx_reg_cost (addr)))) | |
2863 | && validate_change (insn, loc, folded, 0)) | |
2864 | addr = folded; | |
2865 | } | |
8c87f107 | 2866 | } |
278a83b2 | 2867 | |
42495ca0 RK |
2868 | /* If this address is not in the hash table, we can't look for equivalences |
2869 | of the whole address. Also, ignore if volatile. */ | |
2870 | ||
7afe21cc | 2871 | do_not_record = 0; |
2197a88a | 2872 | hash = HASH (addr, Pmode); |
7afe21cc RK |
2873 | addr_volatile = do_not_record; |
2874 | do_not_record = save_do_not_record; | |
2875 | hash_arg_in_memory = save_hash_arg_in_memory; | |
7afe21cc RK |
2876 | |
2877 | if (addr_volatile) | |
2878 | return; | |
2879 | ||
2197a88a | 2880 | elt = lookup (addr, hash, Pmode); |
7afe21cc | 2881 | |
42495ca0 RK |
2882 | if (elt) |
2883 | { | |
2884 | /* We need to find the best (under the criteria documented above) entry | |
2885 | in the class that is valid. We use the `flag' field to indicate | |
2886 | choices that were invalid and iterate until we can't find a better | |
2887 | one that hasn't already been tried. */ | |
7afe21cc | 2888 | |
42495ca0 RK |
2889 | for (p = elt->first_same_value; p; p = p->next_same_value) |
2890 | p->flag = 0; | |
7afe21cc | 2891 | |
42495ca0 RK |
2892 | while (found_better) |
2893 | { | |
01329426 | 2894 | int best_addr_cost = address_cost (*loc, mode); |
42495ca0 | 2895 | int best_rtx_cost = (elt->cost + 1) >> 1; |
01329426 | 2896 | int exp_cost; |
278a83b2 | 2897 | struct table_elt *best_elt = elt; |
42495ca0 RK |
2898 | |
2899 | found_better = 0; | |
2900 | for (p = elt->first_same_value; p; p = p->next_same_value) | |
2f541799 | 2901 | if (! p->flag) |
42495ca0 | 2902 | { |
f8cfc6aa | 2903 | if ((REG_P (p->exp) |
0516f6fe | 2904 | || exp_equiv_p (p->exp, p->exp, 1, false)) |
01329426 JH |
2905 | && ((exp_cost = address_cost (p->exp, mode)) < best_addr_cost |
2906 | || (exp_cost == best_addr_cost | |
05bd3d41 | 2907 | && ((p->cost + 1) >> 1) > best_rtx_cost))) |
2f541799 MM |
2908 | { |
2909 | found_better = 1; | |
01329426 | 2910 | best_addr_cost = exp_cost; |
2f541799 MM |
2911 | best_rtx_cost = (p->cost + 1) >> 1; |
2912 | best_elt = p; | |
2913 | } | |
42495ca0 | 2914 | } |
7afe21cc | 2915 | |
42495ca0 RK |
2916 | if (found_better) |
2917 | { | |
2918 | if (validate_change (insn, loc, | |
906c4e36 RK |
2919 | canon_reg (copy_rtx (best_elt->exp), |
2920 | NULL_RTX), 0)) | |
42495ca0 RK |
2921 | return; |
2922 | else | |
2923 | best_elt->flag = 1; | |
2924 | } | |
2925 | } | |
2926 | } | |
7afe21cc | 2927 | |
42495ca0 RK |
2928 | /* If the address is a binary operation with the first operand a register |
2929 | and the second a constant, do the same as above, but looking for | |
2930 | equivalences of the register. Then try to simplify before checking for | |
2931 | the best address to use. This catches a few cases: First is when we | |
2932 | have REG+const and the register is another REG+const. We can often merge | |
2933 | the constants and eliminate one insn and one register. It may also be | |
2934 | that a machine has a cheap REG+REG+const. Finally, this improves the | |
2935 | code on the Alpha for unaligned byte stores. */ | |
2936 | ||
2937 | if (flag_expensive_optimizations | |
ec8e098d | 2938 | && ARITHMETIC_P (*loc) |
f8cfc6aa | 2939 | && REG_P (XEXP (*loc, 0))) |
7afe21cc | 2940 | { |
7b9c108f | 2941 | rtx op1 = XEXP (*loc, 1); |
42495ca0 RK |
2942 | |
2943 | do_not_record = 0; | |
2197a88a | 2944 | hash = HASH (XEXP (*loc, 0), Pmode); |
42495ca0 RK |
2945 | do_not_record = save_do_not_record; |
2946 | hash_arg_in_memory = save_hash_arg_in_memory; | |
42495ca0 | 2947 | |
2197a88a | 2948 | elt = lookup (XEXP (*loc, 0), hash, Pmode); |
42495ca0 RK |
2949 | if (elt == 0) |
2950 | return; | |
2951 | ||
2952 | /* We need to find the best (under the criteria documented above) entry | |
2953 | in the class that is valid. We use the `flag' field to indicate | |
2954 | choices that were invalid and iterate until we can't find a better | |
2955 | one that hasn't already been tried. */ | |
7afe21cc | 2956 | |
7afe21cc | 2957 | for (p = elt->first_same_value; p; p = p->next_same_value) |
42495ca0 | 2958 | p->flag = 0; |
7afe21cc | 2959 | |
42495ca0 | 2960 | while (found_better) |
7afe21cc | 2961 | { |
01329426 | 2962 | int best_addr_cost = address_cost (*loc, mode); |
42495ca0 | 2963 | int best_rtx_cost = (COST (*loc) + 1) >> 1; |
278a83b2 | 2964 | struct table_elt *best_elt = elt; |
42495ca0 | 2965 | rtx best_rtx = *loc; |
f6516aee JW |
2966 | int count; |
2967 | ||
2968 | /* This is at worst case an O(n^2) algorithm, so limit our search | |
2969 | to the first 32 elements on the list. This avoids trouble | |
2970 | compiling code with very long basic blocks that can easily | |
0cedb36c JL |
2971 | call simplify_gen_binary so many times that we run out of |
2972 | memory. */ | |
96b0e481 | 2973 | |
0cedb36c JL |
2974 | found_better = 0; |
2975 | for (p = elt->first_same_value, count = 0; | |
2976 | p && count < 32; | |
2977 | p = p->next_same_value, count++) | |
2978 | if (! p->flag | |
f8cfc6aa | 2979 | && (REG_P (p->exp) |
0516f6fe | 2980 | || exp_equiv_p (p->exp, p->exp, 1, false))) |
0cedb36c JL |
2981 | { |
2982 | rtx new = simplify_gen_binary (GET_CODE (*loc), Pmode, | |
7b9c108f | 2983 | p->exp, op1); |
01329426 | 2984 | int new_cost; |
b7ca416f AP |
2985 | |
2986 | /* Get the canonical version of the address so we can accept | |
2987 | more. */ | |
2988 | new = canon_for_address (new); | |
2989 | ||
01329426 | 2990 | new_cost = address_cost (new, mode); |
96b0e481 | 2991 | |
01329426 JH |
2992 | if (new_cost < best_addr_cost |
2993 | || (new_cost == best_addr_cost | |
2994 | && (COST (new) + 1) >> 1 > best_rtx_cost)) | |
0cedb36c JL |
2995 | { |
2996 | found_better = 1; | |
01329426 | 2997 | best_addr_cost = new_cost; |
0cedb36c JL |
2998 | best_rtx_cost = (COST (new) + 1) >> 1; |
2999 | best_elt = p; | |
3000 | best_rtx = new; | |
3001 | } | |
3002 | } | |
96b0e481 | 3003 | |
0cedb36c JL |
3004 | if (found_better) |
3005 | { | |
3006 | if (validate_change (insn, loc, | |
3007 | canon_reg (copy_rtx (best_rtx), | |
3008 | NULL_RTX), 0)) | |
3009 | return; | |
3010 | else | |
3011 | best_elt->flag = 1; | |
3012 | } | |
3013 | } | |
3014 | } | |
96b0e481 RK |
3015 | } |
3016 | \f | |
bca05d20 RK |
3017 | /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison |
3018 | operation (EQ, NE, GT, etc.), follow it back through the hash table and | |
3019 | what values are being compared. | |
1a87eea2 | 3020 | |
bca05d20 RK |
3021 | *PARG1 and *PARG2 are updated to contain the rtx representing the values |
3022 | actually being compared. For example, if *PARG1 was (cc0) and *PARG2 | |
3023 | was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were | |
3024 | compared to produce cc0. | |
a432f20d | 3025 | |
bca05d20 RK |
3026 | The return value is the comparison operator and is either the code of |
3027 | A or the code corresponding to the inverse of the comparison. */ | |
7afe21cc | 3028 | |
0cedb36c | 3029 | static enum rtx_code |
7080f735 AJ |
3030 | find_comparison_args (enum rtx_code code, rtx *parg1, rtx *parg2, |
3031 | enum machine_mode *pmode1, enum machine_mode *pmode2) | |
7afe21cc | 3032 | { |
0cedb36c | 3033 | rtx arg1, arg2; |
1a87eea2 | 3034 | |
0cedb36c | 3035 | arg1 = *parg1, arg2 = *parg2; |
7afe21cc | 3036 | |
0cedb36c | 3037 | /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */ |
7afe21cc | 3038 | |
0cedb36c | 3039 | while (arg2 == CONST0_RTX (GET_MODE (arg1))) |
a432f20d | 3040 | { |
da7d8304 | 3041 | /* Set nonzero when we find something of interest. */ |
0cedb36c JL |
3042 | rtx x = 0; |
3043 | int reverse_code = 0; | |
3044 | struct table_elt *p = 0; | |
6076248a | 3045 | |
0cedb36c JL |
3046 | /* If arg1 is a COMPARE, extract the comparison arguments from it. |
3047 | On machines with CC0, this is the only case that can occur, since | |
3048 | fold_rtx will return the COMPARE or item being compared with zero | |
3049 | when given CC0. */ | |
6076248a | 3050 | |
0cedb36c JL |
3051 | if (GET_CODE (arg1) == COMPARE && arg2 == const0_rtx) |
3052 | x = arg1; | |
6076248a | 3053 | |
0cedb36c JL |
3054 | /* If ARG1 is a comparison operator and CODE is testing for |
3055 | STORE_FLAG_VALUE, get the inner arguments. */ | |
a432f20d | 3056 | |
ec8e098d | 3057 | else if (COMPARISON_P (arg1)) |
7afe21cc | 3058 | { |
efdc7e19 RH |
3059 | #ifdef FLOAT_STORE_FLAG_VALUE |
3060 | REAL_VALUE_TYPE fsfv; | |
3061 | #endif | |
3062 | ||
0cedb36c JL |
3063 | if (code == NE |
3064 | || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT | |
3065 | && code == LT && STORE_FLAG_VALUE == -1) | |
3066 | #ifdef FLOAT_STORE_FLAG_VALUE | |
3067 | || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT | |
efdc7e19 RH |
3068 | && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)), |
3069 | REAL_VALUE_NEGATIVE (fsfv))) | |
7afe21cc | 3070 | #endif |
a432f20d | 3071 | ) |
0cedb36c JL |
3072 | x = arg1; |
3073 | else if (code == EQ | |
3074 | || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT | |
3075 | && code == GE && STORE_FLAG_VALUE == -1) | |
3076 | #ifdef FLOAT_STORE_FLAG_VALUE | |
3077 | || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT | |
efdc7e19 RH |
3078 | && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)), |
3079 | REAL_VALUE_NEGATIVE (fsfv))) | |
0cedb36c JL |
3080 | #endif |
3081 | ) | |
3082 | x = arg1, reverse_code = 1; | |
7afe21cc RK |
3083 | } |
3084 | ||
0cedb36c | 3085 | /* ??? We could also check for |
7afe21cc | 3086 | |
0cedb36c | 3087 | (ne (and (eq (...) (const_int 1))) (const_int 0)) |
7afe21cc | 3088 | |
0cedb36c | 3089 | and related forms, but let's wait until we see them occurring. */ |
7afe21cc | 3090 | |
0cedb36c JL |
3091 | if (x == 0) |
3092 | /* Look up ARG1 in the hash table and see if it has an equivalence | |
3093 | that lets us see what is being compared. */ | |
0516f6fe | 3094 | p = lookup (arg1, SAFE_HASH (arg1, GET_MODE (arg1)), GET_MODE (arg1)); |
278a83b2 | 3095 | if (p) |
8b03b984 R |
3096 | { |
3097 | p = p->first_same_value; | |
3098 | ||
3099 | /* If what we compare is already known to be constant, that is as | |
3100 | good as it gets. | |
3101 | We need to break the loop in this case, because otherwise we | |
3102 | can have an infinite loop when looking at a reg that is known | |
3103 | to be a constant which is the same as a comparison of a reg | |
3104 | against zero which appears later in the insn stream, which in | |
3105 | turn is constant and the same as the comparison of the first reg | |
3106 | against zero... */ | |
3107 | if (p->is_const) | |
3108 | break; | |
3109 | } | |
7afe21cc | 3110 | |
0cedb36c | 3111 | for (; p; p = p->next_same_value) |
7afe21cc | 3112 | { |
0cedb36c | 3113 | enum machine_mode inner_mode = GET_MODE (p->exp); |
efdc7e19 RH |
3114 | #ifdef FLOAT_STORE_FLAG_VALUE |
3115 | REAL_VALUE_TYPE fsfv; | |
3116 | #endif | |
7afe21cc | 3117 | |
0cedb36c | 3118 | /* If the entry isn't valid, skip it. */ |
0516f6fe | 3119 | if (! exp_equiv_p (p->exp, p->exp, 1, false)) |
0cedb36c | 3120 | continue; |
f76b9db2 | 3121 | |
bca05d20 RK |
3122 | if (GET_CODE (p->exp) == COMPARE |
3123 | /* Another possibility is that this machine has a compare insn | |
3124 | that includes the comparison code. In that case, ARG1 would | |
3125 | be equivalent to a comparison operation that would set ARG1 to | |
3126 | either STORE_FLAG_VALUE or zero. If this is an NE operation, | |
3127 | ORIG_CODE is the actual comparison being done; if it is an EQ, | |
3128 | we must reverse ORIG_CODE. On machine with a negative value | |
3129 | for STORE_FLAG_VALUE, also look at LT and GE operations. */ | |
3130 | || ((code == NE | |
3131 | || (code == LT | |
3132 | && GET_MODE_CLASS (inner_mode) == MODE_INT | |
3133 | && (GET_MODE_BITSIZE (inner_mode) | |
3134 | <= HOST_BITS_PER_WIDE_INT) | |
3135 | && (STORE_FLAG_VALUE | |
3136 | & ((HOST_WIDE_INT) 1 | |
3137 | << (GET_MODE_BITSIZE (inner_mode) - 1)))) | |
0cedb36c | 3138 | #ifdef FLOAT_STORE_FLAG_VALUE |
bca05d20 RK |
3139 | || (code == LT |
3140 | && GET_MODE_CLASS (inner_mode) == MODE_FLOAT | |
efdc7e19 RH |
3141 | && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)), |
3142 | REAL_VALUE_NEGATIVE (fsfv))) | |
0cedb36c | 3143 | #endif |
bca05d20 | 3144 | ) |
ec8e098d | 3145 | && COMPARISON_P (p->exp))) |
7afe21cc | 3146 | { |
0cedb36c JL |
3147 | x = p->exp; |
3148 | break; | |
3149 | } | |
3150 | else if ((code == EQ | |
3151 | || (code == GE | |
3152 | && GET_MODE_CLASS (inner_mode) == MODE_INT | |
3153 | && (GET_MODE_BITSIZE (inner_mode) | |
3154 | <= HOST_BITS_PER_WIDE_INT) | |
3155 | && (STORE_FLAG_VALUE | |
3156 | & ((HOST_WIDE_INT) 1 | |
3157 | << (GET_MODE_BITSIZE (inner_mode) - 1)))) | |
3158 | #ifdef FLOAT_STORE_FLAG_VALUE | |
3159 | || (code == GE | |
3160 | && GET_MODE_CLASS (inner_mode) == MODE_FLOAT | |
efdc7e19 RH |
3161 | && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)), |
3162 | REAL_VALUE_NEGATIVE (fsfv))) | |
0cedb36c JL |
3163 | #endif |
3164 | ) | |
ec8e098d | 3165 | && COMPARISON_P (p->exp)) |
0cedb36c JL |
3166 | { |
3167 | reverse_code = 1; | |
3168 | x = p->exp; | |
3169 | break; | |
7afe21cc RK |
3170 | } |
3171 | ||
4977bab6 ZW |
3172 | /* If this non-trapping address, e.g. fp + constant, the |
3173 | equivalent is a better operand since it may let us predict | |
3174 | the value of the comparison. */ | |
3175 | else if (!rtx_addr_can_trap_p (p->exp)) | |
0cedb36c JL |
3176 | { |
3177 | arg1 = p->exp; | |
3178 | continue; | |
3179 | } | |
7afe21cc | 3180 | } |
7afe21cc | 3181 | |
0cedb36c JL |
3182 | /* If we didn't find a useful equivalence for ARG1, we are done. |
3183 | Otherwise, set up for the next iteration. */ | |
3184 | if (x == 0) | |
3185 | break; | |
7afe21cc | 3186 | |
78192b09 RH |
3187 | /* If we need to reverse the comparison, make sure that that is |
3188 | possible -- we can't necessarily infer the value of GE from LT | |
3189 | with floating-point operands. */ | |
0cedb36c | 3190 | if (reverse_code) |
261efdef JH |
3191 | { |
3192 | enum rtx_code reversed = reversed_comparison_code (x, NULL_RTX); | |
3193 | if (reversed == UNKNOWN) | |
3194 | break; | |
68252e27 KH |
3195 | else |
3196 | code = reversed; | |
261efdef | 3197 | } |
ec8e098d | 3198 | else if (COMPARISON_P (x)) |
261efdef JH |
3199 | code = GET_CODE (x); |
3200 | arg1 = XEXP (x, 0), arg2 = XEXP (x, 1); | |
7afe21cc RK |
3201 | } |
3202 | ||
0cedb36c JL |
3203 | /* Return our results. Return the modes from before fold_rtx |
3204 | because fold_rtx might produce const_int, and then it's too late. */ | |
3205 | *pmode1 = GET_MODE (arg1), *pmode2 = GET_MODE (arg2); | |
3206 | *parg1 = fold_rtx (arg1, 0), *parg2 = fold_rtx (arg2, 0); | |
3207 | ||
3208 | return code; | |
7afe21cc RK |
3209 | } |
3210 | \f | |
3211 | /* If X is a nontrivial arithmetic operation on an argument | |
3212 | for which a constant value can be determined, return | |
3213 | the result of operating on that value, as a constant. | |
3214 | Otherwise, return X, possibly with one or more operands | |
3215 | modified by recursive calls to this function. | |
3216 | ||
e7bb59fa RK |
3217 | If X is a register whose contents are known, we do NOT |
3218 | return those contents here. equiv_constant is called to | |
3219 | perform that task. | |
7afe21cc RK |
3220 | |
3221 | INSN is the insn that we may be modifying. If it is 0, make a copy | |
3222 | of X before modifying it. */ | |
3223 | ||
3224 | static rtx | |
7080f735 | 3225 | fold_rtx (rtx x, rtx insn) |
7afe21cc | 3226 | { |
b3694847 SS |
3227 | enum rtx_code code; |
3228 | enum machine_mode mode; | |
3229 | const char *fmt; | |
3230 | int i; | |
7afe21cc RK |
3231 | rtx new = 0; |
3232 | int copied = 0; | |
3233 | int must_swap = 0; | |
3234 | ||
3235 | /* Folded equivalents of first two operands of X. */ | |
3236 | rtx folded_arg0; | |
3237 | rtx folded_arg1; | |
3238 | ||
3239 | /* Constant equivalents of first three operands of X; | |
3240 | 0 when no such equivalent is known. */ | |
3241 | rtx const_arg0; | |
3242 | rtx const_arg1; | |
3243 | rtx const_arg2; | |
3244 | ||
3245 | /* The mode of the first operand of X. We need this for sign and zero | |
3246 | extends. */ | |
3247 | enum machine_mode mode_arg0; | |
3248 | ||
3249 | if (x == 0) | |
3250 | return x; | |
3251 | ||
3252 | mode = GET_MODE (x); | |
3253 | code = GET_CODE (x); | |
3254 | switch (code) | |
3255 | { | |
3256 | case CONST: | |
3257 | case CONST_INT: | |
3258 | case CONST_DOUBLE: | |
69ef87e2 | 3259 | case CONST_VECTOR: |
7afe21cc RK |
3260 | case SYMBOL_REF: |
3261 | case LABEL_REF: | |
3262 | case REG: | |
01aa1d43 | 3263 | case PC: |
7afe21cc RK |
3264 | /* No use simplifying an EXPR_LIST |
3265 | since they are used only for lists of args | |
3266 | in a function call's REG_EQUAL note. */ | |
3267 | case EXPR_LIST: | |
3268 | return x; | |
3269 | ||
3270 | #ifdef HAVE_cc0 | |
3271 | case CC0: | |
3272 | return prev_insn_cc0; | |
3273 | #endif | |
3274 | ||
7afe21cc | 3275 | case SUBREG: |
c610adec RK |
3276 | /* See if we previously assigned a constant value to this SUBREG. */ |
3277 | if ((new = lookup_as_function (x, CONST_INT)) != 0 | |
3278 | || (new = lookup_as_function (x, CONST_DOUBLE)) != 0) | |
7afe21cc RK |
3279 | return new; |
3280 | ||
4b980e20 RK |
3281 | /* If this is a paradoxical SUBREG, we have no idea what value the |
3282 | extra bits would have. However, if the operand is equivalent | |
3283 | to a SUBREG whose operand is the same as our mode, and all the | |
3284 | modes are within a word, we can just use the inner operand | |
31c85c78 RK |
3285 | because these SUBREGs just say how to treat the register. |
3286 | ||
3287 | Similarly if we find an integer constant. */ | |
4b980e20 | 3288 | |
e5f6a288 | 3289 | if (GET_MODE_SIZE (mode) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))) |
4b980e20 RK |
3290 | { |
3291 | enum machine_mode imode = GET_MODE (SUBREG_REG (x)); | |
3292 | struct table_elt *elt; | |
3293 | ||
3294 | if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD | |
3295 | && GET_MODE_SIZE (imode) <= UNITS_PER_WORD | |
3296 | && (elt = lookup (SUBREG_REG (x), HASH (SUBREG_REG (x), imode), | |
3297 | imode)) != 0) | |
ddc356e8 | 3298 | for (elt = elt->first_same_value; elt; elt = elt->next_same_value) |
31c85c78 RK |
3299 | { |
3300 | if (CONSTANT_P (elt->exp) | |
3301 | && GET_MODE (elt->exp) == VOIDmode) | |
3302 | return elt->exp; | |
3303 | ||
4b980e20 RK |
3304 | if (GET_CODE (elt->exp) == SUBREG |
3305 | && GET_MODE (SUBREG_REG (elt->exp)) == mode | |
0516f6fe | 3306 | && exp_equiv_p (elt->exp, elt->exp, 1, false)) |
4b980e20 | 3307 | return copy_rtx (SUBREG_REG (elt->exp)); |
1bb98cec | 3308 | } |
4b980e20 RK |
3309 | |
3310 | return x; | |
3311 | } | |
e5f6a288 | 3312 | |
7afe21cc RK |
3313 | /* Fold SUBREG_REG. If it changed, see if we can simplify the SUBREG. |
3314 | We might be able to if the SUBREG is extracting a single word in an | |
3315 | integral mode or extracting the low part. */ | |
3316 | ||
3317 | folded_arg0 = fold_rtx (SUBREG_REG (x), insn); | |
3318 | const_arg0 = equiv_constant (folded_arg0); | |
3319 | if (const_arg0) | |
3320 | folded_arg0 = const_arg0; | |
3321 | ||
3322 | if (folded_arg0 != SUBREG_REG (x)) | |
3323 | { | |
949c5d62 JH |
3324 | new = simplify_subreg (mode, folded_arg0, |
3325 | GET_MODE (SUBREG_REG (x)), SUBREG_BYTE (x)); | |
7afe21cc RK |
3326 | if (new) |
3327 | return new; | |
3328 | } | |
e5f6a288 | 3329 | |
f8cfc6aa | 3330 | if (REG_P (folded_arg0) |
4c442790 | 3331 | && GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (folded_arg0))) |
e5f6a288 RK |
3332 | { |
3333 | struct table_elt *elt; | |
3334 | ||
e5f6a288 RK |
3335 | elt = lookup (folded_arg0, |
3336 | HASH (folded_arg0, GET_MODE (folded_arg0)), | |
3337 | GET_MODE (folded_arg0)); | |
3338 | ||
3339 | if (elt) | |
3340 | elt = elt->first_same_value; | |
3341 | ||
4c442790 PB |
3342 | if (subreg_lowpart_p (x)) |
3343 | /* If this is a narrowing SUBREG and our operand is a REG, see | |
3344 | if we can find an equivalence for REG that is an arithmetic | |
3345 | operation in a wider mode where both operands are paradoxical | |
3346 | SUBREGs from objects of our result mode. In that case, we | |
3347 | couldn-t report an equivalent value for that operation, since we | |
3348 | don't know what the extra bits will be. But we can find an | |
3349 | equivalence for this SUBREG by folding that operation in the | |
3350 | narrow mode. This allows us to fold arithmetic in narrow modes | |
3351 | when the machine only supports word-sized arithmetic. | |
3352 | ||
3353 | Also look for a case where we have a SUBREG whose operand | |
3354 | is the same as our result. If both modes are smaller | |
3355 | than a word, we are simply interpreting a register in | |
3356 | different modes and we can use the inner value. */ | |
3357 | ||
3358 | for (; elt; elt = elt->next_same_value) | |
3359 | { | |
3360 | enum rtx_code eltcode = GET_CODE (elt->exp); | |
3361 | ||
3362 | /* Just check for unary and binary operations. */ | |
ec8e098d PB |
3363 | if (UNARY_P (elt->exp) |
3364 | && eltcode != SIGN_EXTEND | |
3365 | && eltcode != ZERO_EXTEND | |
4c442790 PB |
3366 | && GET_CODE (XEXP (elt->exp, 0)) == SUBREG |
3367 | && GET_MODE (SUBREG_REG (XEXP (elt->exp, 0))) == mode | |
3368 | && (GET_MODE_CLASS (mode) | |
3369 | == GET_MODE_CLASS (GET_MODE (XEXP (elt->exp, 0))))) | |
3370 | { | |
3371 | rtx op0 = SUBREG_REG (XEXP (elt->exp, 0)); | |
e5f6a288 | 3372 | |
f8cfc6aa | 3373 | if (!REG_P (op0) && ! CONSTANT_P (op0)) |
4c442790 | 3374 | op0 = fold_rtx (op0, NULL_RTX); |
e5f6a288 | 3375 | |
e5f6a288 | 3376 | op0 = equiv_constant (op0); |
4c442790 PB |
3377 | if (op0) |
3378 | new = simplify_unary_operation (GET_CODE (elt->exp), mode, | |
3379 | op0, mode); | |
3380 | } | |
ec8e098d | 3381 | else if (ARITHMETIC_P (elt->exp) |
4c442790 PB |
3382 | && eltcode != DIV && eltcode != MOD |
3383 | && eltcode != UDIV && eltcode != UMOD | |
3384 | && eltcode != ASHIFTRT && eltcode != LSHIFTRT | |
3385 | && eltcode != ROTATE && eltcode != ROTATERT | |
3386 | && ((GET_CODE (XEXP (elt->exp, 0)) == SUBREG | |
3387 | && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 0))) | |
3388 | == mode)) | |
3389 | || CONSTANT_P (XEXP (elt->exp, 0))) | |
3390 | && ((GET_CODE (XEXP (elt->exp, 1)) == SUBREG | |
3391 | && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 1))) | |
3392 | == mode)) | |
3393 | || CONSTANT_P (XEXP (elt->exp, 1)))) | |
3394 | { | |
3395 | rtx op0 = gen_lowpart_common (mode, XEXP (elt->exp, 0)); | |
3396 | rtx op1 = gen_lowpart_common (mode, XEXP (elt->exp, 1)); | |
3397 | ||
f8cfc6aa | 3398 | if (op0 && !REG_P (op0) && ! CONSTANT_P (op0)) |
4c442790 PB |
3399 | op0 = fold_rtx (op0, NULL_RTX); |
3400 | ||
3401 | if (op0) | |
3402 | op0 = equiv_constant (op0); | |
3403 | ||
f8cfc6aa | 3404 | if (op1 && !REG_P (op1) && ! CONSTANT_P (op1)) |
4c442790 PB |
3405 | op1 = fold_rtx (op1, NULL_RTX); |
3406 | ||
3407 | if (op1) | |
3408 | op1 = equiv_constant (op1); | |
3409 | ||
3410 | /* If we are looking for the low SImode part of | |
3411 | (ashift:DI c (const_int 32)), it doesn't work | |
3412 | to compute that in SImode, because a 32-bit shift | |
3413 | in SImode is unpredictable. We know the value is 0. */ | |
3414 | if (op0 && op1 | |
3415 | && GET_CODE (elt->exp) == ASHIFT | |
3416 | && GET_CODE (op1) == CONST_INT | |
3417 | && INTVAL (op1) >= GET_MODE_BITSIZE (mode)) | |
3418 | { | |
3419 | if (INTVAL (op1) | |
3420 | < GET_MODE_BITSIZE (GET_MODE (elt->exp))) | |
3421 | /* If the count fits in the inner mode's width, | |
3422 | but exceeds the outer mode's width, | |
3423 | the value will get truncated to 0 | |
3424 | by the subreg. */ | |
3425 | new = CONST0_RTX (mode); | |
3426 | else | |
3427 | /* If the count exceeds even the inner mode's width, | |
76fb0b60 | 3428 | don't fold this expression. */ |
4c442790 PB |
3429 | new = 0; |
3430 | } | |
3431 | else if (op0 && op1) | |
3432 | new = simplify_binary_operation (GET_CODE (elt->exp), mode, op0, op1); | |
3433 | } | |
e5f6a288 | 3434 | |
4c442790 PB |
3435 | else if (GET_CODE (elt->exp) == SUBREG |
3436 | && GET_MODE (SUBREG_REG (elt->exp)) == mode | |
3437 | && (GET_MODE_SIZE (GET_MODE (folded_arg0)) | |
3438 | <= UNITS_PER_WORD) | |
0516f6fe | 3439 | && exp_equiv_p (elt->exp, elt->exp, 1, false)) |
4c442790 | 3440 | new = copy_rtx (SUBREG_REG (elt->exp)); |
4b980e20 | 3441 | |
4c442790 PB |
3442 | if (new) |
3443 | return new; | |
3444 | } | |
3445 | else | |
3446 | /* A SUBREG resulting from a zero extension may fold to zero if | |
3447 | it extracts higher bits than the ZERO_EXTEND's source bits. | |
3448 | FIXME: if combine tried to, er, combine these instructions, | |
3449 | this transformation may be moved to simplify_subreg. */ | |
3450 | for (; elt; elt = elt->next_same_value) | |
3451 | { | |
3452 | if (GET_CODE (elt->exp) == ZERO_EXTEND | |
3453 | && subreg_lsb (x) | |
3454 | >= GET_MODE_BITSIZE (GET_MODE (XEXP (elt->exp, 0)))) | |
3455 | return CONST0_RTX (mode); | |
3456 | } | |
e5f6a288 RK |
3457 | } |
3458 | ||
7afe21cc RK |
3459 | return x; |
3460 | ||
3461 | case NOT: | |
3462 | case NEG: | |
3463 | /* If we have (NOT Y), see if Y is known to be (NOT Z). | |
3464 | If so, (NOT Y) simplifies to Z. Similarly for NEG. */ | |
3465 | new = lookup_as_function (XEXP (x, 0), code); | |
3466 | if (new) | |
3467 | return fold_rtx (copy_rtx (XEXP (new, 0)), insn); | |
3468 | break; | |
13c9910f | 3469 | |
7afe21cc RK |
3470 | case MEM: |
3471 | /* If we are not actually processing an insn, don't try to find the | |
3472 | best address. Not only don't we care, but we could modify the | |
3473 | MEM in an invalid way since we have no insn to validate against. */ | |
3474 | if (insn != 0) | |
01329426 | 3475 | find_best_addr (insn, &XEXP (x, 0), GET_MODE (x)); |
7afe21cc RK |
3476 | |
3477 | { | |
3478 | /* Even if we don't fold in the insn itself, | |
3479 | we can safely do so here, in hopes of getting a constant. */ | |
906c4e36 | 3480 | rtx addr = fold_rtx (XEXP (x, 0), NULL_RTX); |
7afe21cc | 3481 | rtx base = 0; |
906c4e36 | 3482 | HOST_WIDE_INT offset = 0; |
7afe21cc | 3483 | |
f8cfc6aa | 3484 | if (REG_P (addr) |
1bb98cec DM |
3485 | && REGNO_QTY_VALID_P (REGNO (addr))) |
3486 | { | |
3487 | int addr_q = REG_QTY (REGNO (addr)); | |
3488 | struct qty_table_elem *addr_ent = &qty_table[addr_q]; | |
3489 | ||
3490 | if (GET_MODE (addr) == addr_ent->mode | |
3491 | && addr_ent->const_rtx != NULL_RTX) | |
3492 | addr = addr_ent->const_rtx; | |
3493 | } | |
7afe21cc RK |
3494 | |
3495 | /* If address is constant, split it into a base and integer offset. */ | |
3496 | if (GET_CODE (addr) == SYMBOL_REF || GET_CODE (addr) == LABEL_REF) | |
3497 | base = addr; | |
3498 | else if (GET_CODE (addr) == CONST && GET_CODE (XEXP (addr, 0)) == PLUS | |
3499 | && GET_CODE (XEXP (XEXP (addr, 0), 1)) == CONST_INT) | |
3500 | { | |
3501 | base = XEXP (XEXP (addr, 0), 0); | |
3502 | offset = INTVAL (XEXP (XEXP (addr, 0), 1)); | |
3503 | } | |
3504 | else if (GET_CODE (addr) == LO_SUM | |
3505 | && GET_CODE (XEXP (addr, 1)) == SYMBOL_REF) | |
3506 | base = XEXP (addr, 1); | |
3507 | ||
3508 | /* If this is a constant pool reference, we can fold it into its | |
3509 | constant to allow better value tracking. */ | |
3510 | if (base && GET_CODE (base) == SYMBOL_REF | |
3511 | && CONSTANT_POOL_ADDRESS_P (base)) | |
3512 | { | |
3513 | rtx constant = get_pool_constant (base); | |
3514 | enum machine_mode const_mode = get_pool_mode (base); | |
3515 | rtx new; | |
3516 | ||
3517 | if (CONSTANT_P (constant) && GET_CODE (constant) != CONST_INT) | |
dd0ba281 RS |
3518 | { |
3519 | constant_pool_entries_cost = COST (constant); | |
3520 | constant_pool_entries_regcost = approx_reg_cost (constant); | |
3521 | } | |
7afe21cc RK |
3522 | |
3523 | /* If we are loading the full constant, we have an equivalence. */ | |
3524 | if (offset == 0 && mode == const_mode) | |
3525 | return constant; | |
3526 | ||
9faa82d8 | 3527 | /* If this actually isn't a constant (weird!), we can't do |
7afe21cc RK |
3528 | anything. Otherwise, handle the two most common cases: |
3529 | extracting a word from a multi-word constant, and extracting | |
3530 | the low-order bits. Other cases don't seem common enough to | |
3531 | worry about. */ | |
3532 | if (! CONSTANT_P (constant)) | |
3533 | return x; | |
3534 | ||
3535 | if (GET_MODE_CLASS (mode) == MODE_INT | |
3536 | && GET_MODE_SIZE (mode) == UNITS_PER_WORD | |
3537 | && offset % UNITS_PER_WORD == 0 | |
3538 | && (new = operand_subword (constant, | |
3539 | offset / UNITS_PER_WORD, | |
3540 | 0, const_mode)) != 0) | |
3541 | return new; | |
3542 | ||
3543 | if (((BYTES_BIG_ENDIAN | |
3544 | && offset == GET_MODE_SIZE (GET_MODE (constant)) - 1) | |
3545 | || (! BYTES_BIG_ENDIAN && offset == 0)) | |
4de249d9 | 3546 | && (new = gen_lowpart (mode, constant)) != 0) |
7afe21cc RK |
3547 | return new; |
3548 | } | |
3549 | ||
3550 | /* If this is a reference to a label at a known position in a jump | |
3551 | table, we also know its value. */ | |
3552 | if (base && GET_CODE (base) == LABEL_REF) | |
3553 | { | |
3554 | rtx label = XEXP (base, 0); | |
3555 | rtx table_insn = NEXT_INSN (label); | |
278a83b2 | 3556 | |
4b4bf941 | 3557 | if (table_insn && JUMP_P (table_insn) |
7afe21cc RK |
3558 | && GET_CODE (PATTERN (table_insn)) == ADDR_VEC) |
3559 | { | |
3560 | rtx table = PATTERN (table_insn); | |
3561 | ||
3562 | if (offset >= 0 | |
3563 | && (offset / GET_MODE_SIZE (GET_MODE (table)) | |
3564 | < XVECLEN (table, 0))) | |
3565 | return XVECEXP (table, 0, | |
3566 | offset / GET_MODE_SIZE (GET_MODE (table))); | |
3567 | } | |
4b4bf941 | 3568 | if (table_insn && JUMP_P (table_insn) |
7afe21cc RK |
3569 | && GET_CODE (PATTERN (table_insn)) == ADDR_DIFF_VEC) |
3570 | { | |
3571 | rtx table = PATTERN (table_insn); | |
3572 | ||
3573 | if (offset >= 0 | |
3574 | && (offset / GET_MODE_SIZE (GET_MODE (table)) | |
3575 | < XVECLEN (table, 1))) | |
3576 | { | |
3577 | offset /= GET_MODE_SIZE (GET_MODE (table)); | |
38a448ca RH |
3578 | new = gen_rtx_MINUS (Pmode, XVECEXP (table, 1, offset), |
3579 | XEXP (table, 0)); | |
7afe21cc RK |
3580 | |
3581 | if (GET_MODE (table) != Pmode) | |
38a448ca | 3582 | new = gen_rtx_TRUNCATE (GET_MODE (table), new); |
7afe21cc | 3583 | |
278a83b2 | 3584 | /* Indicate this is a constant. This isn't a |
67a37737 RK |
3585 | valid form of CONST, but it will only be used |
3586 | to fold the next insns and then discarded, so | |
ac7ef8d5 FS |
3587 | it should be safe. |
3588 | ||
3589 | Note this expression must be explicitly discarded, | |
3590 | by cse_insn, else it may end up in a REG_EQUAL note | |
3591 | and "escape" to cause problems elsewhere. */ | |
38a448ca | 3592 | return gen_rtx_CONST (GET_MODE (new), new); |
7afe21cc RK |
3593 | } |
3594 | } | |
3595 | } | |
3596 | ||
3597 | return x; | |
3598 | } | |
9255709c | 3599 | |
a5e5cf67 RH |
3600 | #ifdef NO_FUNCTION_CSE |
3601 | case CALL: | |
3602 | if (CONSTANT_P (XEXP (XEXP (x, 0), 0))) | |
3603 | return x; | |
3604 | break; | |
3605 | #endif | |
3606 | ||
9255709c | 3607 | case ASM_OPERANDS: |
6c667859 AB |
3608 | if (insn) |
3609 | { | |
3610 | for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--) | |
3611 | validate_change (insn, &ASM_OPERANDS_INPUT (x, i), | |
3612 | fold_rtx (ASM_OPERANDS_INPUT (x, i), insn), 0); | |
3613 | } | |
9255709c | 3614 | break; |
278a83b2 | 3615 | |
e9a25f70 JL |
3616 | default: |
3617 | break; | |
7afe21cc RK |
3618 | } |
3619 | ||
3620 | const_arg0 = 0; | |
3621 | const_arg1 = 0; | |
3622 | const_arg2 = 0; | |
3623 | mode_arg0 = VOIDmode; | |
3624 | ||
3625 | /* Try folding our operands. | |
3626 | Then see which ones have constant values known. */ | |
3627 | ||
3628 | fmt = GET_RTX_FORMAT (code); | |
3629 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
3630 | if (fmt[i] == 'e') | |
3631 | { | |
3632 | rtx arg = XEXP (x, i); | |
3633 | rtx folded_arg = arg, const_arg = 0; | |
3634 | enum machine_mode mode_arg = GET_MODE (arg); | |
3635 | rtx cheap_arg, expensive_arg; | |
3636 | rtx replacements[2]; | |
3637 | int j; | |
5b437e0f | 3638 | int old_cost = COST_IN (XEXP (x, i), code); |
7afe21cc RK |
3639 | |
3640 | /* Most arguments are cheap, so handle them specially. */ | |
3641 | switch (GET_CODE (arg)) | |
3642 | { | |
3643 | case REG: | |
3644 | /* This is the same as calling equiv_constant; it is duplicated | |
3645 | here for speed. */ | |
1bb98cec DM |
3646 | if (REGNO_QTY_VALID_P (REGNO (arg))) |
3647 | { | |
3648 | int arg_q = REG_QTY (REGNO (arg)); | |
3649 | struct qty_table_elem *arg_ent = &qty_table[arg_q]; | |
3650 | ||
3651 | if (arg_ent->const_rtx != NULL_RTX | |
f8cfc6aa | 3652 | && !REG_P (arg_ent->const_rtx) |
1bb98cec DM |
3653 | && GET_CODE (arg_ent->const_rtx) != PLUS) |
3654 | const_arg | |
4de249d9 | 3655 | = gen_lowpart (GET_MODE (arg), |
1bb98cec DM |
3656 | arg_ent->const_rtx); |
3657 | } | |
7afe21cc RK |
3658 | break; |
3659 | ||
3660 | case CONST: | |
3661 | case CONST_INT: | |
3662 | case SYMBOL_REF: | |
3663 | case LABEL_REF: | |
3664 | case CONST_DOUBLE: | |
69ef87e2 | 3665 | case CONST_VECTOR: |
7afe21cc RK |
3666 | const_arg = arg; |
3667 | break; | |
3668 | ||
3669 | #ifdef HAVE_cc0 | |
3670 | case CC0: | |
3671 | folded_arg = prev_insn_cc0; | |
3672 | mode_arg = prev_insn_cc0_mode; | |
3673 | const_arg = equiv_constant (folded_arg); | |
3674 | break; | |
3675 | #endif | |
3676 | ||
3677 | default: | |
3678 | folded_arg = fold_rtx (arg, insn); | |
3679 | const_arg = equiv_constant (folded_arg); | |
3680 | } | |
3681 | ||
3682 | /* For the first three operands, see if the operand | |
3683 | is constant or equivalent to a constant. */ | |
3684 | switch (i) | |
3685 | { | |
3686 | case 0: | |
3687 | folded_arg0 = folded_arg; | |
3688 | const_arg0 = const_arg; | |
3689 | mode_arg0 = mode_arg; | |
3690 | break; | |
3691 | case 1: | |
3692 | folded_arg1 = folded_arg; | |
3693 | const_arg1 = const_arg; | |
3694 | break; | |
3695 | case 2: | |
3696 | const_arg2 = const_arg; | |
3697 | break; | |
3698 | } | |
3699 | ||
3700 | /* Pick the least expensive of the folded argument and an | |
3701 | equivalent constant argument. */ | |
3702 | if (const_arg == 0 || const_arg == folded_arg | |
f2fa288f | 3703 | || COST_IN (const_arg, code) > COST_IN (folded_arg, code)) |
7afe21cc RK |
3704 | cheap_arg = folded_arg, expensive_arg = const_arg; |
3705 | else | |
3706 | cheap_arg = const_arg, expensive_arg = folded_arg; | |
3707 | ||
3708 | /* Try to replace the operand with the cheapest of the two | |
3709 | possibilities. If it doesn't work and this is either of the first | |
3710 | two operands of a commutative operation, try swapping them. | |
3711 | If THAT fails, try the more expensive, provided it is cheaper | |
3712 | than what is already there. */ | |
3713 | ||
3714 | if (cheap_arg == XEXP (x, i)) | |
3715 | continue; | |
3716 | ||
3717 | if (insn == 0 && ! copied) | |
3718 | { | |
3719 | x = copy_rtx (x); | |
3720 | copied = 1; | |
3721 | } | |
3722 | ||
f2fa288f RH |
3723 | /* Order the replacements from cheapest to most expensive. */ |
3724 | replacements[0] = cheap_arg; | |
3725 | replacements[1] = expensive_arg; | |
3726 | ||
68252e27 | 3727 | for (j = 0; j < 2 && replacements[j]; j++) |
7afe21cc | 3728 | { |
f2fa288f RH |
3729 | int new_cost = COST_IN (replacements[j], code); |
3730 | ||
3731 | /* Stop if what existed before was cheaper. Prefer constants | |
3732 | in the case of a tie. */ | |
3733 | if (new_cost > old_cost | |
3734 | || (new_cost == old_cost && CONSTANT_P (XEXP (x, i)))) | |
3735 | break; | |
3736 | ||
8cce3d04 RS |
3737 | /* It's not safe to substitute the operand of a conversion |
3738 | operator with a constant, as the conversion's identity | |
3739 | depends upon the mode of it's operand. This optimization | |
3740 | is handled by the call to simplify_unary_operation. */ | |
3741 | if (GET_RTX_CLASS (code) == RTX_UNARY | |
3742 | && GET_MODE (replacements[j]) != mode_arg0 | |
3743 | && (code == ZERO_EXTEND | |
3744 | || code == SIGN_EXTEND | |
3745 | || code == TRUNCATE | |
3746 | || code == FLOAT_TRUNCATE | |
3747 | || code == FLOAT_EXTEND | |
3748 | || code == FLOAT | |
3749 | || code == FIX | |
3750 | || code == UNSIGNED_FLOAT | |
3751 | || code == UNSIGNED_FIX)) | |
3752 | continue; | |
3753 | ||
7afe21cc RK |
3754 | if (validate_change (insn, &XEXP (x, i), replacements[j], 0)) |
3755 | break; | |
3756 | ||
ec8e098d PB |
3757 | if (GET_RTX_CLASS (code) == RTX_COMM_COMPARE |
3758 | || GET_RTX_CLASS (code) == RTX_COMM_ARITH) | |
7afe21cc RK |
3759 | { |
3760 | validate_change (insn, &XEXP (x, i), XEXP (x, 1 - i), 1); | |
3761 | validate_change (insn, &XEXP (x, 1 - i), replacements[j], 1); | |
3762 | ||
3763 | if (apply_change_group ()) | |
3764 | { | |
3765 | /* Swap them back to be invalid so that this loop can | |
3766 | continue and flag them to be swapped back later. */ | |
3767 | rtx tem; | |
3768 | ||
3769 | tem = XEXP (x, 0); XEXP (x, 0) = XEXP (x, 1); | |
3770 | XEXP (x, 1) = tem; | |
3771 | must_swap = 1; | |
3772 | break; | |
3773 | } | |
3774 | } | |
3775 | } | |
3776 | } | |
3777 | ||
2d8b0f3a JL |
3778 | else |
3779 | { | |
3780 | if (fmt[i] == 'E') | |
3781 | /* Don't try to fold inside of a vector of expressions. | |
3782 | Doing nothing is harmless. */ | |
e49a1d2e | 3783 | {;} |
2d8b0f3a | 3784 | } |
7afe21cc RK |
3785 | |
3786 | /* If a commutative operation, place a constant integer as the second | |
3787 | operand unless the first operand is also a constant integer. Otherwise, | |
3788 | place any constant second unless the first operand is also a constant. */ | |
3789 | ||
ec8e098d | 3790 | if (COMMUTATIVE_P (x)) |
7afe21cc | 3791 | { |
c715abdd RS |
3792 | if (must_swap |
3793 | || swap_commutative_operands_p (const_arg0 ? const_arg0 | |
3794 | : XEXP (x, 0), | |
3795 | const_arg1 ? const_arg1 | |
3796 | : XEXP (x, 1))) | |
7afe21cc | 3797 | { |
b3694847 | 3798 | rtx tem = XEXP (x, 0); |
7afe21cc RK |
3799 | |
3800 | if (insn == 0 && ! copied) | |
3801 | { | |
3802 | x = copy_rtx (x); | |
3803 | copied = 1; | |
3804 | } | |
3805 | ||
3806 | validate_change (insn, &XEXP (x, 0), XEXP (x, 1), 1); | |
3807 | validate_change (insn, &XEXP (x, 1), tem, 1); | |
3808 | if (apply_change_group ()) | |
3809 | { | |
3810 | tem = const_arg0, const_arg0 = const_arg1, const_arg1 = tem; | |
3811 | tem = folded_arg0, folded_arg0 = folded_arg1, folded_arg1 = tem; | |
3812 | } | |
3813 | } | |
3814 | } | |
3815 | ||
3816 | /* If X is an arithmetic operation, see if we can simplify it. */ | |
3817 | ||
3818 | switch (GET_RTX_CLASS (code)) | |
3819 | { | |
ec8e098d | 3820 | case RTX_UNARY: |
67a37737 RK |
3821 | { |
3822 | int is_const = 0; | |
3823 | ||
3824 | /* We can't simplify extension ops unless we know the | |
3825 | original mode. */ | |
3826 | if ((code == ZERO_EXTEND || code == SIGN_EXTEND) | |
3827 | && mode_arg0 == VOIDmode) | |
3828 | break; | |
3829 | ||
3830 | /* If we had a CONST, strip it off and put it back later if we | |
3831 | fold. */ | |
3832 | if (const_arg0 != 0 && GET_CODE (const_arg0) == CONST) | |
3833 | is_const = 1, const_arg0 = XEXP (const_arg0, 0); | |
3834 | ||
3835 | new = simplify_unary_operation (code, mode, | |
3836 | const_arg0 ? const_arg0 : folded_arg0, | |
3837 | mode_arg0); | |
ec666d23 JH |
3838 | /* NEG of PLUS could be converted into MINUS, but that causes |
3839 | expressions of the form | |
3840 | (CONST (MINUS (CONST_INT) (SYMBOL_REF))) | |
3841 | which many ports mistakenly treat as LEGITIMATE_CONSTANT_P. | |
3842 | FIXME: those ports should be fixed. */ | |
3843 | if (new != 0 && is_const | |
3844 | && GET_CODE (new) == PLUS | |
3845 | && (GET_CODE (XEXP (new, 0)) == SYMBOL_REF | |
3846 | || GET_CODE (XEXP (new, 0)) == LABEL_REF) | |
3847 | && GET_CODE (XEXP (new, 1)) == CONST_INT) | |
38a448ca | 3848 | new = gen_rtx_CONST (mode, new); |
67a37737 | 3849 | } |
7afe21cc | 3850 | break; |
278a83b2 | 3851 | |
ec8e098d PB |
3852 | case RTX_COMPARE: |
3853 | case RTX_COMM_COMPARE: | |
7afe21cc RK |
3854 | /* See what items are actually being compared and set FOLDED_ARG[01] |
3855 | to those values and CODE to the actual comparison code. If any are | |
3856 | constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't | |
3857 | do anything if both operands are already known to be constant. */ | |
3858 | ||
21e5076a UB |
3859 | /* ??? Vector mode comparisons are not supported yet. */ |
3860 | if (VECTOR_MODE_P (mode)) | |
3861 | break; | |
3862 | ||
7afe21cc RK |
3863 | if (const_arg0 == 0 || const_arg1 == 0) |
3864 | { | |
3865 | struct table_elt *p0, *p1; | |
d6edb99e | 3866 | rtx true_rtx = const_true_rtx, false_rtx = const0_rtx; |
13c9910f | 3867 | enum machine_mode mode_arg1; |
c610adec RK |
3868 | |
3869 | #ifdef FLOAT_STORE_FLAG_VALUE | |
c7c955ee | 3870 | if (GET_MODE_CLASS (mode) == MODE_FLOAT) |
c610adec | 3871 | { |
d6edb99e | 3872 | true_rtx = (CONST_DOUBLE_FROM_REAL_VALUE |
68252e27 | 3873 | (FLOAT_STORE_FLAG_VALUE (mode), mode)); |
d6edb99e | 3874 | false_rtx = CONST0_RTX (mode); |
c610adec RK |
3875 | } |
3876 | #endif | |
7afe21cc | 3877 | |
13c9910f RS |
3878 | code = find_comparison_args (code, &folded_arg0, &folded_arg1, |
3879 | &mode_arg0, &mode_arg1); | |
7afe21cc | 3880 | |
13c9910f RS |
3881 | /* If the mode is VOIDmode or a MODE_CC mode, we don't know |
3882 | what kinds of things are being compared, so we can't do | |
3883 | anything with this comparison. */ | |
7afe21cc RK |
3884 | |
3885 | if (mode_arg0 == VOIDmode || GET_MODE_CLASS (mode_arg0) == MODE_CC) | |
3886 | break; | |
3887 | ||
75335440 KH |
3888 | const_arg0 = equiv_constant (folded_arg0); |
3889 | const_arg1 = equiv_constant (folded_arg1); | |
3890 | ||
0f41302f MS |
3891 | /* If we do not now have two constants being compared, see |
3892 | if we can nevertheless deduce some things about the | |
3893 | comparison. */ | |
7afe21cc RK |
3894 | if (const_arg0 == 0 || const_arg1 == 0) |
3895 | { | |
4977bab6 ZW |
3896 | /* Some addresses are known to be nonzero. We don't know |
3897 | their sign, but equality comparisons are known. */ | |
7afe21cc | 3898 | if (const_arg1 == const0_rtx |
4977bab6 | 3899 | && nonzero_address_p (folded_arg0)) |
7afe21cc RK |
3900 | { |
3901 | if (code == EQ) | |
d6edb99e | 3902 | return false_rtx; |
7afe21cc | 3903 | else if (code == NE) |
d6edb99e | 3904 | return true_rtx; |
7afe21cc RK |
3905 | } |
3906 | ||
fd13313f JH |
3907 | /* See if the two operands are the same. */ |
3908 | ||
3909 | if (folded_arg0 == folded_arg1 | |
f8cfc6aa JQ |
3910 | || (REG_P (folded_arg0) |
3911 | && REG_P (folded_arg1) | |
fd13313f JH |
3912 | && (REG_QTY (REGNO (folded_arg0)) |
3913 | == REG_QTY (REGNO (folded_arg1)))) | |
3914 | || ((p0 = lookup (folded_arg0, | |
0516f6fe SB |
3915 | SAFE_HASH (folded_arg0, mode_arg0), |
3916 | mode_arg0)) | |
fd13313f | 3917 | && (p1 = lookup (folded_arg1, |
0516f6fe SB |
3918 | SAFE_HASH (folded_arg1, mode_arg0), |
3919 | mode_arg0)) | |
fd13313f JH |
3920 | && p0->first_same_value == p1->first_same_value)) |
3921 | { | |
71925bc0 RS |
3922 | /* Sadly two equal NaNs are not equivalent. */ |
3923 | if (!HONOR_NANS (mode_arg0)) | |
3924 | return ((code == EQ || code == LE || code == GE | |
3925 | || code == LEU || code == GEU || code == UNEQ | |
3926 | || code == UNLE || code == UNGE | |
3927 | || code == ORDERED) | |
3928 | ? true_rtx : false_rtx); | |
3929 | /* Take care for the FP compares we can resolve. */ | |
3930 | if (code == UNEQ || code == UNLE || code == UNGE) | |
3931 | return true_rtx; | |
3932 | if (code == LTGT || code == LT || code == GT) | |
3933 | return false_rtx; | |
fd13313f | 3934 | } |
7afe21cc RK |
3935 | |
3936 | /* If FOLDED_ARG0 is a register, see if the comparison we are | |
3937 | doing now is either the same as we did before or the reverse | |
3938 | (we only check the reverse if not floating-point). */ | |
f8cfc6aa | 3939 | else if (REG_P (folded_arg0)) |
7afe21cc | 3940 | { |
30f72379 | 3941 | int qty = REG_QTY (REGNO (folded_arg0)); |
7afe21cc | 3942 | |
1bb98cec DM |
3943 | if (REGNO_QTY_VALID_P (REGNO (folded_arg0))) |
3944 | { | |
3945 | struct qty_table_elem *ent = &qty_table[qty]; | |
3946 | ||
3947 | if ((comparison_dominates_p (ent->comparison_code, code) | |
1eb8759b RH |
3948 | || (! FLOAT_MODE_P (mode_arg0) |
3949 | && comparison_dominates_p (ent->comparison_code, | |
3950 | reverse_condition (code)))) | |
1bb98cec DM |
3951 | && (rtx_equal_p (ent->comparison_const, folded_arg1) |
3952 | || (const_arg1 | |
3953 | && rtx_equal_p (ent->comparison_const, | |
3954 | const_arg1)) | |
f8cfc6aa | 3955 | || (REG_P (folded_arg1) |
1bb98cec DM |
3956 | && (REG_QTY (REGNO (folded_arg1)) == ent->comparison_qty)))) |
3957 | return (comparison_dominates_p (ent->comparison_code, code) | |
d6edb99e | 3958 | ? true_rtx : false_rtx); |
1bb98cec | 3959 | } |
7afe21cc RK |
3960 | } |
3961 | } | |
3962 | } | |
3963 | ||
3964 | /* If we are comparing against zero, see if the first operand is | |
3965 | equivalent to an IOR with a constant. If so, we may be able to | |
3966 | determine the result of this comparison. */ | |
3967 | ||
3968 | if (const_arg1 == const0_rtx) | |
3969 | { | |
3970 | rtx y = lookup_as_function (folded_arg0, IOR); | |
3971 | rtx inner_const; | |
3972 | ||
3973 | if (y != 0 | |
3974 | && (inner_const = equiv_constant (XEXP (y, 1))) != 0 | |
3975 | && GET_CODE (inner_const) == CONST_INT | |
3976 | && INTVAL (inner_const) != 0) | |
3977 | { | |
3978 | int sign_bitnum = GET_MODE_BITSIZE (mode_arg0) - 1; | |
906c4e36 RK |
3979 | int has_sign = (HOST_BITS_PER_WIDE_INT >= sign_bitnum |
3980 | && (INTVAL (inner_const) | |
3981 | & ((HOST_WIDE_INT) 1 << sign_bitnum))); | |
d6edb99e | 3982 | rtx true_rtx = const_true_rtx, false_rtx = const0_rtx; |
c610adec RK |
3983 | |
3984 | #ifdef FLOAT_STORE_FLAG_VALUE | |
c7c955ee | 3985 | if (GET_MODE_CLASS (mode) == MODE_FLOAT) |
c610adec | 3986 | { |
d6edb99e | 3987 | true_rtx = (CONST_DOUBLE_FROM_REAL_VALUE |
12530dbe | 3988 | (FLOAT_STORE_FLAG_VALUE (mode), mode)); |
d6edb99e | 3989 | false_rtx = CONST0_RTX (mode); |
c610adec RK |
3990 | } |
3991 | #endif | |
7afe21cc RK |
3992 | |
3993 | switch (code) | |
3994 | { | |
3995 | case EQ: | |
d6edb99e | 3996 | return false_rtx; |
7afe21cc | 3997 | case NE: |
d6edb99e | 3998 | return true_rtx; |
7afe21cc RK |
3999 | case LT: case LE: |
4000 | if (has_sign) | |
d6edb99e | 4001 | return true_rtx; |
7afe21cc RK |
4002 | break; |
4003 | case GT: case GE: | |
4004 | if (has_sign) | |
d6edb99e | 4005 | return false_rtx; |
7afe21cc | 4006 | break; |
e9a25f70 JL |
4007 | default: |
4008 | break; | |
7afe21cc RK |
4009 | } |
4010 | } | |
4011 | } | |
4012 | ||
c6fb08ad PB |
4013 | { |
4014 | rtx op0 = const_arg0 ? const_arg0 : folded_arg0; | |
4015 | rtx op1 = const_arg1 ? const_arg1 : folded_arg1; | |
4016 | new = simplify_relational_operation (code, mode, mode_arg0, op0, op1); | |
4017 | } | |
7afe21cc RK |
4018 | break; |
4019 | ||
ec8e098d PB |
4020 | case RTX_BIN_ARITH: |
4021 | case RTX_COMM_ARITH: | |
7afe21cc RK |
4022 | switch (code) |
4023 | { | |
4024 | case PLUS: | |
4025 | /* If the second operand is a LABEL_REF, see if the first is a MINUS | |
4026 | with that LABEL_REF as its second operand. If so, the result is | |
4027 | the first operand of that MINUS. This handles switches with an | |
4028 | ADDR_DIFF_VEC table. */ | |
4029 | if (const_arg1 && GET_CODE (const_arg1) == LABEL_REF) | |
4030 | { | |
e650cbda RK |
4031 | rtx y |
4032 | = GET_CODE (folded_arg0) == MINUS ? folded_arg0 | |
ddc356e8 | 4033 | : lookup_as_function (folded_arg0, MINUS); |
7afe21cc RK |
4034 | |
4035 | if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF | |
4036 | && XEXP (XEXP (y, 1), 0) == XEXP (const_arg1, 0)) | |
4037 | return XEXP (y, 0); | |
67a37737 RK |
4038 | |
4039 | /* Now try for a CONST of a MINUS like the above. */ | |
e650cbda RK |
4040 | if ((y = (GET_CODE (folded_arg0) == CONST ? folded_arg0 |
4041 | : lookup_as_function (folded_arg0, CONST))) != 0 | |
67a37737 RK |
4042 | && GET_CODE (XEXP (y, 0)) == MINUS |
4043 | && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF | |
ddc356e8 | 4044 | && XEXP (XEXP (XEXP (y, 0), 1), 0) == XEXP (const_arg1, 0)) |
67a37737 | 4045 | return XEXP (XEXP (y, 0), 0); |
7afe21cc | 4046 | } |
c2cc0778 | 4047 | |
e650cbda RK |
4048 | /* Likewise if the operands are in the other order. */ |
4049 | if (const_arg0 && GET_CODE (const_arg0) == LABEL_REF) | |
4050 | { | |
4051 | rtx y | |
4052 | = GET_CODE (folded_arg1) == MINUS ? folded_arg1 | |
ddc356e8 | 4053 | : lookup_as_function (folded_arg1, MINUS); |
e650cbda RK |
4054 | |
4055 | if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF | |
4056 | && XEXP (XEXP (y, 1), 0) == XEXP (const_arg0, 0)) | |
4057 | return XEXP (y, 0); | |
4058 | ||
4059 | /* Now try for a CONST of a MINUS like the above. */ | |
4060 | if ((y = (GET_CODE (folded_arg1) == CONST ? folded_arg1 | |
4061 | : lookup_as_function (folded_arg1, CONST))) != 0 | |
4062 | && GET_CODE (XEXP (y, 0)) == MINUS | |
4063 | && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF | |
ddc356e8 | 4064 | && XEXP (XEXP (XEXP (y, 0), 1), 0) == XEXP (const_arg0, 0)) |
e650cbda RK |
4065 | return XEXP (XEXP (y, 0), 0); |
4066 | } | |
4067 | ||
c2cc0778 RK |
4068 | /* If second operand is a register equivalent to a negative |
4069 | CONST_INT, see if we can find a register equivalent to the | |
4070 | positive constant. Make a MINUS if so. Don't do this for | |
5d595063 | 4071 | a non-negative constant since we might then alternate between |
a1f300c0 | 4072 | choosing positive and negative constants. Having the positive |
5d595063 RK |
4073 | constant previously-used is the more common case. Be sure |
4074 | the resulting constant is non-negative; if const_arg1 were | |
4075 | the smallest negative number this would overflow: depending | |
4076 | on the mode, this would either just be the same value (and | |
4077 | hence not save anything) or be incorrect. */ | |
4078 | if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT | |
4079 | && INTVAL (const_arg1) < 0 | |
4741f6ad JL |
4080 | /* This used to test |
4081 | ||
ddc356e8 | 4082 | -INTVAL (const_arg1) >= 0 |
4741f6ad JL |
4083 | |
4084 | But The Sun V5.0 compilers mis-compiled that test. So | |
4085 | instead we test for the problematic value in a more direct | |
4086 | manner and hope the Sun compilers get it correct. */ | |
5c45a8ac KG |
4087 | && INTVAL (const_arg1) != |
4088 | ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT - 1)) | |
f8cfc6aa | 4089 | && REG_P (folded_arg1)) |
c2cc0778 | 4090 | { |
ddc356e8 | 4091 | rtx new_const = GEN_INT (-INTVAL (const_arg1)); |
c2cc0778 | 4092 | struct table_elt *p |
0516f6fe | 4093 | = lookup (new_const, SAFE_HASH (new_const, mode), mode); |
c2cc0778 RK |
4094 | |
4095 | if (p) | |
4096 | for (p = p->first_same_value; p; p = p->next_same_value) | |
f8cfc6aa | 4097 | if (REG_P (p->exp)) |
0cedb36c JL |
4098 | return simplify_gen_binary (MINUS, mode, folded_arg0, |
4099 | canon_reg (p->exp, NULL_RTX)); | |
c2cc0778 | 4100 | } |
13c9910f RS |
4101 | goto from_plus; |
4102 | ||
4103 | case MINUS: | |
4104 | /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2). | |
4105 | If so, produce (PLUS Z C2-C). */ | |
4106 | if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT) | |
4107 | { | |
4108 | rtx y = lookup_as_function (XEXP (x, 0), PLUS); | |
4109 | if (y && GET_CODE (XEXP (y, 1)) == CONST_INT) | |
f3becefd RK |
4110 | return fold_rtx (plus_constant (copy_rtx (y), |
4111 | -INTVAL (const_arg1)), | |
a3b5c94a | 4112 | NULL_RTX); |
13c9910f | 4113 | } |
7afe21cc | 4114 | |
ddc356e8 | 4115 | /* Fall through. */ |
7afe21cc | 4116 | |
13c9910f | 4117 | from_plus: |
7afe21cc RK |
4118 | case SMIN: case SMAX: case UMIN: case UMAX: |
4119 | case IOR: case AND: case XOR: | |
f930bfd0 | 4120 | case MULT: |
7afe21cc RK |
4121 | case ASHIFT: case LSHIFTRT: case ASHIFTRT: |
4122 | /* If we have (<op> <reg> <const_int>) for an associative OP and REG | |
4123 | is known to be of similar form, we may be able to replace the | |
4124 | operation with a combined operation. This may eliminate the | |
4125 | intermediate operation if every use is simplified in this way. | |
4126 | Note that the similar optimization done by combine.c only works | |
4127 | if the intermediate operation's result has only one reference. */ | |
4128 | ||
f8cfc6aa | 4129 | if (REG_P (folded_arg0) |
7afe21cc RK |
4130 | && const_arg1 && GET_CODE (const_arg1) == CONST_INT) |
4131 | { | |
4132 | int is_shift | |
4133 | = (code == ASHIFT || code == ASHIFTRT || code == LSHIFTRT); | |
4134 | rtx y = lookup_as_function (folded_arg0, code); | |
4135 | rtx inner_const; | |
4136 | enum rtx_code associate_code; | |
4137 | rtx new_const; | |
4138 | ||
4139 | if (y == 0 | |
4140 | || 0 == (inner_const | |
4141 | = equiv_constant (fold_rtx (XEXP (y, 1), 0))) | |
4142 | || GET_CODE (inner_const) != CONST_INT | |
4143 | /* If we have compiled a statement like | |
4144 | "if (x == (x & mask1))", and now are looking at | |
4145 | "x & mask2", we will have a case where the first operand | |
4146 | of Y is the same as our first operand. Unless we detect | |
4147 | this case, an infinite loop will result. */ | |
4148 | || XEXP (y, 0) == folded_arg0) | |
4149 | break; | |
4150 | ||
4151 | /* Don't associate these operations if they are a PLUS with the | |
4152 | same constant and it is a power of two. These might be doable | |
4153 | with a pre- or post-increment. Similarly for two subtracts of | |
4154 | identical powers of two with post decrement. */ | |
4155 | ||
213d5fbc | 4156 | if (code == PLUS && const_arg1 == inner_const |
940da324 JL |
4157 | && ((HAVE_PRE_INCREMENT |
4158 | && exact_log2 (INTVAL (const_arg1)) >= 0) | |
4159 | || (HAVE_POST_INCREMENT | |
4160 | && exact_log2 (INTVAL (const_arg1)) >= 0) | |
4161 | || (HAVE_PRE_DECREMENT | |
4162 | && exact_log2 (- INTVAL (const_arg1)) >= 0) | |
4163 | || (HAVE_POST_DECREMENT | |
4164 | && exact_log2 (- INTVAL (const_arg1)) >= 0))) | |
7afe21cc RK |
4165 | break; |
4166 | ||
4167 | /* Compute the code used to compose the constants. For example, | |
f930bfd0 | 4168 | A-C1-C2 is A-(C1 + C2), so if CODE == MINUS, we want PLUS. */ |
7afe21cc | 4169 | |
f930bfd0 | 4170 | associate_code = (is_shift || code == MINUS ? PLUS : code); |
7afe21cc RK |
4171 | |
4172 | new_const = simplify_binary_operation (associate_code, mode, | |
4173 | const_arg1, inner_const); | |
4174 | ||
4175 | if (new_const == 0) | |
4176 | break; | |
4177 | ||
4178 | /* If we are associating shift operations, don't let this | |
4908e508 RS |
4179 | produce a shift of the size of the object or larger. |
4180 | This could occur when we follow a sign-extend by a right | |
4181 | shift on a machine that does a sign-extend as a pair | |
4182 | of shifts. */ | |
7afe21cc RK |
4183 | |
4184 | if (is_shift && GET_CODE (new_const) == CONST_INT | |
4908e508 RS |
4185 | && INTVAL (new_const) >= GET_MODE_BITSIZE (mode)) |
4186 | { | |
4187 | /* As an exception, we can turn an ASHIFTRT of this | |
4188 | form into a shift of the number of bits - 1. */ | |
4189 | if (code == ASHIFTRT) | |
4190 | new_const = GEN_INT (GET_MODE_BITSIZE (mode) - 1); | |
4191 | else | |
4192 | break; | |
4193 | } | |
7afe21cc RK |
4194 | |
4195 | y = copy_rtx (XEXP (y, 0)); | |
4196 | ||
4197 | /* If Y contains our first operand (the most common way this | |
4198 | can happen is if Y is a MEM), we would do into an infinite | |
4199 | loop if we tried to fold it. So don't in that case. */ | |
4200 | ||
4201 | if (! reg_mentioned_p (folded_arg0, y)) | |
4202 | y = fold_rtx (y, insn); | |
4203 | ||
0cedb36c | 4204 | return simplify_gen_binary (code, mode, y, new_const); |
7afe21cc | 4205 | } |
e9a25f70 JL |
4206 | break; |
4207 | ||
f930bfd0 JW |
4208 | case DIV: case UDIV: |
4209 | /* ??? The associative optimization performed immediately above is | |
4210 | also possible for DIV and UDIV using associate_code of MULT. | |
4211 | However, we would need extra code to verify that the | |
4212 | multiplication does not overflow, that is, there is no overflow | |
4213 | in the calculation of new_const. */ | |
4214 | break; | |
4215 | ||
e9a25f70 JL |
4216 | default: |
4217 | break; | |
7afe21cc RK |
4218 | } |
4219 | ||
4220 | new = simplify_binary_operation (code, mode, | |
4221 | const_arg0 ? const_arg0 : folded_arg0, | |
4222 | const_arg1 ? const_arg1 : folded_arg1); | |
4223 | break; | |
4224 | ||
ec8e098d | 4225 | case RTX_OBJ: |
7afe21cc RK |
4226 | /* (lo_sum (high X) X) is simply X. */ |
4227 | if (code == LO_SUM && const_arg0 != 0 | |
4228 | && GET_CODE (const_arg0) == HIGH | |
4229 | && rtx_equal_p (XEXP (const_arg0, 0), const_arg1)) | |
4230 | return const_arg1; | |
4231 | break; | |
4232 | ||
ec8e098d PB |
4233 | case RTX_TERNARY: |
4234 | case RTX_BITFIELD_OPS: | |
7afe21cc RK |
4235 | new = simplify_ternary_operation (code, mode, mode_arg0, |
4236 | const_arg0 ? const_arg0 : folded_arg0, | |
4237 | const_arg1 ? const_arg1 : folded_arg1, | |
4238 | const_arg2 ? const_arg2 : XEXP (x, 2)); | |
4239 | break; | |
ee5332b8 | 4240 | |
ec8e098d PB |
4241 | default: |
4242 | break; | |
7afe21cc RK |
4243 | } |
4244 | ||
4245 | return new ? new : x; | |
4246 | } | |
4247 | \f | |
4248 | /* Return a constant value currently equivalent to X. | |
4249 | Return 0 if we don't know one. */ | |
4250 | ||
4251 | static rtx | |
7080f735 | 4252 | equiv_constant (rtx x) |
7afe21cc | 4253 | { |
f8cfc6aa | 4254 | if (REG_P (x) |
1bb98cec DM |
4255 | && REGNO_QTY_VALID_P (REGNO (x))) |
4256 | { | |
4257 | int x_q = REG_QTY (REGNO (x)); | |
4258 | struct qty_table_elem *x_ent = &qty_table[x_q]; | |
4259 | ||
4260 | if (x_ent->const_rtx) | |
4de249d9 | 4261 | x = gen_lowpart (GET_MODE (x), x_ent->const_rtx); |
1bb98cec | 4262 | } |
7afe21cc | 4263 | |
2ce5e1b4 | 4264 | if (x == 0 || CONSTANT_P (x)) |
7afe21cc RK |
4265 | return x; |
4266 | ||
fc3ffe83 RK |
4267 | /* If X is a MEM, try to fold it outside the context of any insn to see if |
4268 | it might be equivalent to a constant. That handles the case where it | |
4269 | is a constant-pool reference. Then try to look it up in the hash table | |
4270 | in case it is something whose value we have seen before. */ | |
4271 | ||
3c0cb5de | 4272 | if (MEM_P (x)) |
fc3ffe83 RK |
4273 | { |
4274 | struct table_elt *elt; | |
4275 | ||
906c4e36 | 4276 | x = fold_rtx (x, NULL_RTX); |
fc3ffe83 RK |
4277 | if (CONSTANT_P (x)) |
4278 | return x; | |
4279 | ||
0516f6fe | 4280 | elt = lookup (x, SAFE_HASH (x, GET_MODE (x)), GET_MODE (x)); |
fc3ffe83 RK |
4281 | if (elt == 0) |
4282 | return 0; | |
4283 | ||
4284 | for (elt = elt->first_same_value; elt; elt = elt->next_same_value) | |
4285 | if (elt->is_const && CONSTANT_P (elt->exp)) | |
4286 | return elt->exp; | |
4287 | } | |
4288 | ||
7afe21cc RK |
4289 | return 0; |
4290 | } | |
4291 | \f | |
4292 | /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a fixed-point | |
4293 | number, return an rtx (MEM, SUBREG, or CONST_INT) that refers to the | |
4294 | least-significant part of X. | |
278a83b2 | 4295 | MODE specifies how big a part of X to return. |
7afe21cc RK |
4296 | |
4297 | If the requested operation cannot be done, 0 is returned. | |
4298 | ||
4de249d9 | 4299 | This is similar to gen_lowpart_general in emit-rtl.c. */ |
7afe21cc RK |
4300 | |
4301 | rtx | |
7080f735 | 4302 | gen_lowpart_if_possible (enum machine_mode mode, rtx x) |
7afe21cc RK |
4303 | { |
4304 | rtx result = gen_lowpart_common (mode, x); | |
4305 | ||
4306 | if (result) | |
4307 | return result; | |
3c0cb5de | 4308 | else if (MEM_P (x)) |
7afe21cc RK |
4309 | { |
4310 | /* This is the only other case we handle. */ | |
b3694847 | 4311 | int offset = 0; |
7afe21cc RK |
4312 | rtx new; |
4313 | ||
f76b9db2 ILT |
4314 | if (WORDS_BIG_ENDIAN) |
4315 | offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD) | |
4316 | - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD)); | |
4317 | if (BYTES_BIG_ENDIAN) | |
f1ec5147 RK |
4318 | /* Adjust the address so that the address-after-the-data is |
4319 | unchanged. */ | |
4320 | offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode)) | |
4321 | - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x)))); | |
4322 | ||
4323 | new = adjust_address_nv (x, mode, offset); | |
7afe21cc RK |
4324 | if (! memory_address_p (mode, XEXP (new, 0))) |
4325 | return 0; | |
f1ec5147 | 4326 | |
7afe21cc RK |
4327 | return new; |
4328 | } | |
4329 | else | |
4330 | return 0; | |
4331 | } | |
4332 | \f | |
6de9cd9a | 4333 | /* Given INSN, a jump insn, PATH_TAKEN indicates if we are following the "taken" |
7afe21cc RK |
4334 | branch. It will be zero if not. |
4335 | ||
4336 | In certain cases, this can cause us to add an equivalence. For example, | |
278a83b2 | 4337 | if we are following the taken case of |
7080f735 | 4338 | if (i == 2) |
7afe21cc RK |
4339 | we can add the fact that `i' and '2' are now equivalent. |
4340 | ||
4341 | In any case, we can record that this comparison was passed. If the same | |
4342 | comparison is seen later, we will know its value. */ | |
4343 | ||
4344 | static void | |
7080f735 | 4345 | record_jump_equiv (rtx insn, int taken) |
7afe21cc RK |
4346 | { |
4347 | int cond_known_true; | |
4348 | rtx op0, op1; | |
7f1c097d | 4349 | rtx set; |
13c9910f | 4350 | enum machine_mode mode, mode0, mode1; |
7afe21cc RK |
4351 | int reversed_nonequality = 0; |
4352 | enum rtx_code code; | |
4353 | ||
4354 | /* Ensure this is the right kind of insn. */ | |
7f1c097d | 4355 | if (! any_condjump_p (insn)) |
7afe21cc | 4356 | return; |
7f1c097d | 4357 | set = pc_set (insn); |
7afe21cc RK |
4358 | |
4359 | /* See if this jump condition is known true or false. */ | |
4360 | if (taken) | |
7f1c097d | 4361 | cond_known_true = (XEXP (SET_SRC (set), 2) == pc_rtx); |
7afe21cc | 4362 | else |
7f1c097d | 4363 | cond_known_true = (XEXP (SET_SRC (set), 1) == pc_rtx); |
7afe21cc RK |
4364 | |
4365 | /* Get the type of comparison being done and the operands being compared. | |
4366 | If we had to reverse a non-equality condition, record that fact so we | |
4367 | know that it isn't valid for floating-point. */ | |
7f1c097d JH |
4368 | code = GET_CODE (XEXP (SET_SRC (set), 0)); |
4369 | op0 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 0), insn); | |
4370 | op1 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 1), insn); | |
7afe21cc | 4371 | |
13c9910f | 4372 | code = find_comparison_args (code, &op0, &op1, &mode0, &mode1); |
7afe21cc RK |
4373 | if (! cond_known_true) |
4374 | { | |
261efdef | 4375 | code = reversed_comparison_code_parts (code, op0, op1, insn); |
1eb8759b RH |
4376 | |
4377 | /* Don't remember if we can't find the inverse. */ | |
4378 | if (code == UNKNOWN) | |
4379 | return; | |
7afe21cc RK |
4380 | } |
4381 | ||
4382 | /* The mode is the mode of the non-constant. */ | |
13c9910f RS |
4383 | mode = mode0; |
4384 | if (mode1 != VOIDmode) | |
4385 | mode = mode1; | |
7afe21cc RK |
4386 | |
4387 | record_jump_cond (code, mode, op0, op1, reversed_nonequality); | |
4388 | } | |
4389 | ||
794693c0 RH |
4390 | /* Yet another form of subreg creation. In this case, we want something in |
4391 | MODE, and we should assume OP has MODE iff it is naturally modeless. */ | |
4392 | ||
4393 | static rtx | |
4394 | record_jump_cond_subreg (enum machine_mode mode, rtx op) | |
4395 | { | |
4396 | enum machine_mode op_mode = GET_MODE (op); | |
4397 | if (op_mode == mode || op_mode == VOIDmode) | |
4398 | return op; | |
4399 | return lowpart_subreg (mode, op, op_mode); | |
4400 | } | |
4401 | ||
7afe21cc RK |
4402 | /* We know that comparison CODE applied to OP0 and OP1 in MODE is true. |
4403 | REVERSED_NONEQUALITY is nonzero if CODE had to be swapped. | |
4404 | Make any useful entries we can with that information. Called from | |
4405 | above function and called recursively. */ | |
4406 | ||
4407 | static void | |
7080f735 AJ |
4408 | record_jump_cond (enum rtx_code code, enum machine_mode mode, rtx op0, |
4409 | rtx op1, int reversed_nonequality) | |
7afe21cc | 4410 | { |
2197a88a | 4411 | unsigned op0_hash, op1_hash; |
e428d738 | 4412 | int op0_in_memory, op1_in_memory; |
7afe21cc RK |
4413 | struct table_elt *op0_elt, *op1_elt; |
4414 | ||
4415 | /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG, | |
4416 | we know that they are also equal in the smaller mode (this is also | |
4417 | true for all smaller modes whether or not there is a SUBREG, but | |
ac7ef8d5 | 4418 | is not worth testing for with no SUBREG). */ |
7afe21cc | 4419 | |
2e794ee8 | 4420 | /* Note that GET_MODE (op0) may not equal MODE. */ |
7afe21cc | 4421 | if (code == EQ && GET_CODE (op0) == SUBREG |
2e794ee8 RS |
4422 | && (GET_MODE_SIZE (GET_MODE (op0)) |
4423 | > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0))))) | |
7afe21cc RK |
4424 | { |
4425 | enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0)); | |
794693c0 RH |
4426 | rtx tem = record_jump_cond_subreg (inner_mode, op1); |
4427 | if (tem) | |
4428 | record_jump_cond (code, mode, SUBREG_REG (op0), tem, | |
4429 | reversed_nonequality); | |
7afe21cc RK |
4430 | } |
4431 | ||
4432 | if (code == EQ && GET_CODE (op1) == SUBREG | |
2e794ee8 RS |
4433 | && (GET_MODE_SIZE (GET_MODE (op1)) |
4434 | > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1))))) | |
7afe21cc RK |
4435 | { |
4436 | enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1)); | |
794693c0 RH |
4437 | rtx tem = record_jump_cond_subreg (inner_mode, op0); |
4438 | if (tem) | |
4439 | record_jump_cond (code, mode, SUBREG_REG (op1), tem, | |
4440 | reversed_nonequality); | |
7afe21cc RK |
4441 | } |
4442 | ||
278a83b2 | 4443 | /* Similarly, if this is an NE comparison, and either is a SUBREG |
7afe21cc RK |
4444 | making a smaller mode, we know the whole thing is also NE. */ |
4445 | ||
2e794ee8 RS |
4446 | /* Note that GET_MODE (op0) may not equal MODE; |
4447 | if we test MODE instead, we can get an infinite recursion | |
4448 | alternating between two modes each wider than MODE. */ | |
4449 | ||
7afe21cc RK |
4450 | if (code == NE && GET_CODE (op0) == SUBREG |
4451 | && subreg_lowpart_p (op0) | |
2e794ee8 RS |
4452 | && (GET_MODE_SIZE (GET_MODE (op0)) |
4453 | < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0))))) | |
7afe21cc RK |
4454 | { |
4455 | enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0)); | |
794693c0 RH |
4456 | rtx tem = record_jump_cond_subreg (inner_mode, op1); |
4457 | if (tem) | |
4458 | record_jump_cond (code, mode, SUBREG_REG (op0), tem, | |
4459 | reversed_nonequality); | |
7afe21cc RK |
4460 | } |
4461 | ||
4462 | if (code == NE && GET_CODE (op1) == SUBREG | |
4463 | && subreg_lowpart_p (op1) | |
2e794ee8 RS |
4464 | && (GET_MODE_SIZE (GET_MODE (op1)) |
4465 | < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1))))) | |
7afe21cc RK |
4466 | { |
4467 | enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1)); | |
794693c0 RH |
4468 | rtx tem = record_jump_cond_subreg (inner_mode, op0); |
4469 | if (tem) | |
4470 | record_jump_cond (code, mode, SUBREG_REG (op1), tem, | |
4471 | reversed_nonequality); | |
7afe21cc RK |
4472 | } |
4473 | ||
4474 | /* Hash both operands. */ | |
4475 | ||
4476 | do_not_record = 0; | |
4477 | hash_arg_in_memory = 0; | |
2197a88a | 4478 | op0_hash = HASH (op0, mode); |
7afe21cc | 4479 | op0_in_memory = hash_arg_in_memory; |
7afe21cc RK |
4480 | |
4481 | if (do_not_record) | |
4482 | return; | |
4483 | ||
4484 | do_not_record = 0; | |
4485 | hash_arg_in_memory = 0; | |
2197a88a | 4486 | op1_hash = HASH (op1, mode); |
7afe21cc | 4487 | op1_in_memory = hash_arg_in_memory; |
278a83b2 | 4488 | |
7afe21cc RK |
4489 | if (do_not_record) |
4490 | return; | |
4491 | ||
4492 | /* Look up both operands. */ | |
2197a88a RK |
4493 | op0_elt = lookup (op0, op0_hash, mode); |
4494 | op1_elt = lookup (op1, op1_hash, mode); | |
7afe21cc | 4495 | |
af3869c1 RK |
4496 | /* If both operands are already equivalent or if they are not in the |
4497 | table but are identical, do nothing. */ | |
4498 | if ((op0_elt != 0 && op1_elt != 0 | |
4499 | && op0_elt->first_same_value == op1_elt->first_same_value) | |
4500 | || op0 == op1 || rtx_equal_p (op0, op1)) | |
4501 | return; | |
4502 | ||
7afe21cc | 4503 | /* If we aren't setting two things equal all we can do is save this |
b2796a4b RK |
4504 | comparison. Similarly if this is floating-point. In the latter |
4505 | case, OP1 might be zero and both -0.0 and 0.0 are equal to it. | |
4506 | If we record the equality, we might inadvertently delete code | |
4507 | whose intent was to change -0 to +0. */ | |
4508 | ||
cbf6a543 | 4509 | if (code != EQ || FLOAT_MODE_P (GET_MODE (op0))) |
7afe21cc | 4510 | { |
1bb98cec DM |
4511 | struct qty_table_elem *ent; |
4512 | int qty; | |
4513 | ||
7afe21cc RK |
4514 | /* If we reversed a floating-point comparison, if OP0 is not a |
4515 | register, or if OP1 is neither a register or constant, we can't | |
4516 | do anything. */ | |
4517 | ||
f8cfc6aa | 4518 | if (!REG_P (op1)) |
7afe21cc RK |
4519 | op1 = equiv_constant (op1); |
4520 | ||
cbf6a543 | 4521 | if ((reversed_nonequality && FLOAT_MODE_P (mode)) |
f8cfc6aa | 4522 | || !REG_P (op0) || op1 == 0) |
7afe21cc RK |
4523 | return; |
4524 | ||
4525 | /* Put OP0 in the hash table if it isn't already. This gives it a | |
4526 | new quantity number. */ | |
4527 | if (op0_elt == 0) | |
4528 | { | |
9714cf43 | 4529 | if (insert_regs (op0, NULL, 0)) |
7afe21cc RK |
4530 | { |
4531 | rehash_using_reg (op0); | |
2197a88a | 4532 | op0_hash = HASH (op0, mode); |
2bb81c86 RK |
4533 | |
4534 | /* If OP0 is contained in OP1, this changes its hash code | |
4535 | as well. Faster to rehash than to check, except | |
4536 | for the simple case of a constant. */ | |
4537 | if (! CONSTANT_P (op1)) | |
2197a88a | 4538 | op1_hash = HASH (op1,mode); |
7afe21cc RK |
4539 | } |
4540 | ||
9714cf43 | 4541 | op0_elt = insert (op0, NULL, op0_hash, mode); |
7afe21cc | 4542 | op0_elt->in_memory = op0_in_memory; |
7afe21cc RK |
4543 | } |
4544 | ||
1bb98cec DM |
4545 | qty = REG_QTY (REGNO (op0)); |
4546 | ent = &qty_table[qty]; | |
4547 | ||
4548 | ent->comparison_code = code; | |
f8cfc6aa | 4549 | if (REG_P (op1)) |
7afe21cc | 4550 | { |
5d5ea909 | 4551 | /* Look it up again--in case op0 and op1 are the same. */ |
2197a88a | 4552 | op1_elt = lookup (op1, op1_hash, mode); |
5d5ea909 | 4553 | |
7afe21cc RK |
4554 | /* Put OP1 in the hash table so it gets a new quantity number. */ |
4555 | if (op1_elt == 0) | |
4556 | { | |
9714cf43 | 4557 | if (insert_regs (op1, NULL, 0)) |
7afe21cc RK |
4558 | { |
4559 | rehash_using_reg (op1); | |
2197a88a | 4560 | op1_hash = HASH (op1, mode); |
7afe21cc RK |
4561 | } |
4562 | ||
9714cf43 | 4563 | op1_elt = insert (op1, NULL, op1_hash, mode); |
7afe21cc | 4564 | op1_elt->in_memory = op1_in_memory; |
7afe21cc RK |
4565 | } |
4566 | ||
1bb98cec DM |
4567 | ent->comparison_const = NULL_RTX; |
4568 | ent->comparison_qty = REG_QTY (REGNO (op1)); | |
7afe21cc RK |
4569 | } |
4570 | else | |
4571 | { | |
1bb98cec DM |
4572 | ent->comparison_const = op1; |
4573 | ent->comparison_qty = -1; | |
7afe21cc RK |
4574 | } |
4575 | ||
4576 | return; | |
4577 | } | |
4578 | ||
eb5ad42a RS |
4579 | /* If either side is still missing an equivalence, make it now, |
4580 | then merge the equivalences. */ | |
7afe21cc | 4581 | |
7afe21cc RK |
4582 | if (op0_elt == 0) |
4583 | { | |
9714cf43 | 4584 | if (insert_regs (op0, NULL, 0)) |
7afe21cc RK |
4585 | { |
4586 | rehash_using_reg (op0); | |
2197a88a | 4587 | op0_hash = HASH (op0, mode); |
7afe21cc RK |
4588 | } |
4589 | ||
9714cf43 | 4590 | op0_elt = insert (op0, NULL, op0_hash, mode); |
7afe21cc | 4591 | op0_elt->in_memory = op0_in_memory; |
7afe21cc RK |
4592 | } |
4593 | ||
4594 | if (op1_elt == 0) | |
4595 | { | |
9714cf43 | 4596 | if (insert_regs (op1, NULL, 0)) |
7afe21cc RK |
4597 | { |
4598 | rehash_using_reg (op1); | |
2197a88a | 4599 | op1_hash = HASH (op1, mode); |
7afe21cc RK |
4600 | } |
4601 | ||
9714cf43 | 4602 | op1_elt = insert (op1, NULL, op1_hash, mode); |
7afe21cc | 4603 | op1_elt->in_memory = op1_in_memory; |
7afe21cc | 4604 | } |
eb5ad42a RS |
4605 | |
4606 | merge_equiv_classes (op0_elt, op1_elt); | |
7afe21cc RK |
4607 | } |
4608 | \f | |
4609 | /* CSE processing for one instruction. | |
4610 | First simplify sources and addresses of all assignments | |
4611 | in the instruction, using previously-computed equivalents values. | |
4612 | Then install the new sources and destinations in the table | |
278a83b2 | 4613 | of available values. |
7afe21cc | 4614 | |
1ed0205e VM |
4615 | If LIBCALL_INSN is nonzero, don't record any equivalence made in |
4616 | the insn. It means that INSN is inside libcall block. In this | |
ddc356e8 | 4617 | case LIBCALL_INSN is the corresponding insn with REG_LIBCALL. */ |
7afe21cc RK |
4618 | |
4619 | /* Data on one SET contained in the instruction. */ | |
4620 | ||
4621 | struct set | |
4622 | { | |
4623 | /* The SET rtx itself. */ | |
4624 | rtx rtl; | |
4625 | /* The SET_SRC of the rtx (the original value, if it is changing). */ | |
4626 | rtx src; | |
4627 | /* The hash-table element for the SET_SRC of the SET. */ | |
4628 | struct table_elt *src_elt; | |
2197a88a RK |
4629 | /* Hash value for the SET_SRC. */ |
4630 | unsigned src_hash; | |
4631 | /* Hash value for the SET_DEST. */ | |
4632 | unsigned dest_hash; | |
7afe21cc RK |
4633 | /* The SET_DEST, with SUBREG, etc., stripped. */ |
4634 | rtx inner_dest; | |
278a83b2 | 4635 | /* Nonzero if the SET_SRC is in memory. */ |
7afe21cc | 4636 | char src_in_memory; |
7afe21cc RK |
4637 | /* Nonzero if the SET_SRC contains something |
4638 | whose value cannot be predicted and understood. */ | |
4639 | char src_volatile; | |
496324d0 DN |
4640 | /* Original machine mode, in case it becomes a CONST_INT. |
4641 | The size of this field should match the size of the mode | |
4642 | field of struct rtx_def (see rtl.h). */ | |
4643 | ENUM_BITFIELD(machine_mode) mode : 8; | |
7afe21cc RK |
4644 | /* A constant equivalent for SET_SRC, if any. */ |
4645 | rtx src_const; | |
47841d1b JJ |
4646 | /* Original SET_SRC value used for libcall notes. */ |
4647 | rtx orig_src; | |
2197a88a RK |
4648 | /* Hash value of constant equivalent for SET_SRC. */ |
4649 | unsigned src_const_hash; | |
7afe21cc RK |
4650 | /* Table entry for constant equivalent for SET_SRC, if any. */ |
4651 | struct table_elt *src_const_elt; | |
4652 | }; | |
4653 | ||
4654 | static void | |
7080f735 | 4655 | cse_insn (rtx insn, rtx libcall_insn) |
7afe21cc | 4656 | { |
b3694847 SS |
4657 | rtx x = PATTERN (insn); |
4658 | int i; | |
92f9aa51 | 4659 | rtx tem; |
b3694847 | 4660 | int n_sets = 0; |
7afe21cc | 4661 | |
2d8b0f3a | 4662 | #ifdef HAVE_cc0 |
7afe21cc RK |
4663 | /* Records what this insn does to set CC0. */ |
4664 | rtx this_insn_cc0 = 0; | |
135d84b8 | 4665 | enum machine_mode this_insn_cc0_mode = VOIDmode; |
2d8b0f3a | 4666 | #endif |
7afe21cc RK |
4667 | |
4668 | rtx src_eqv = 0; | |
4669 | struct table_elt *src_eqv_elt = 0; | |
6a651371 KG |
4670 | int src_eqv_volatile = 0; |
4671 | int src_eqv_in_memory = 0; | |
6a651371 | 4672 | unsigned src_eqv_hash = 0; |
7afe21cc | 4673 | |
9714cf43 | 4674 | struct set *sets = (struct set *) 0; |
7afe21cc RK |
4675 | |
4676 | this_insn = insn; | |
7afe21cc RK |
4677 | |
4678 | /* Find all the SETs and CLOBBERs in this instruction. | |
4679 | Record all the SETs in the array `set' and count them. | |
4680 | Also determine whether there is a CLOBBER that invalidates | |
4681 | all memory references, or all references at varying addresses. */ | |
4682 | ||
4b4bf941 | 4683 | if (CALL_P (insn)) |
f1e7c95f RK |
4684 | { |
4685 | for (tem = CALL_INSN_FUNCTION_USAGE (insn); tem; tem = XEXP (tem, 1)) | |
f474c6f8 AO |
4686 | { |
4687 | if (GET_CODE (XEXP (tem, 0)) == CLOBBER) | |
4688 | invalidate (SET_DEST (XEXP (tem, 0)), VOIDmode); | |
4689 | XEXP (tem, 0) = canon_reg (XEXP (tem, 0), insn); | |
4690 | } | |
f1e7c95f RK |
4691 | } |
4692 | ||
7afe21cc RK |
4693 | if (GET_CODE (x) == SET) |
4694 | { | |
703ad42b | 4695 | sets = alloca (sizeof (struct set)); |
7afe21cc RK |
4696 | sets[0].rtl = x; |
4697 | ||
4698 | /* Ignore SETs that are unconditional jumps. | |
4699 | They never need cse processing, so this does not hurt. | |
4700 | The reason is not efficiency but rather | |
4701 | so that we can test at the end for instructions | |
4702 | that have been simplified to unconditional jumps | |
4703 | and not be misled by unchanged instructions | |
4704 | that were unconditional jumps to begin with. */ | |
4705 | if (SET_DEST (x) == pc_rtx | |
4706 | && GET_CODE (SET_SRC (x)) == LABEL_REF) | |
4707 | ; | |
4708 | ||
4709 | /* Don't count call-insns, (set (reg 0) (call ...)), as a set. | |
4710 | The hard function value register is used only once, to copy to | |
4711 | someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)! | |
4712 | Ensure we invalidate the destination register. On the 80386 no | |
7722328e | 4713 | other code would invalidate it since it is a fixed_reg. |
0f41302f | 4714 | We need not check the return of apply_change_group; see canon_reg. */ |
7afe21cc RK |
4715 | |
4716 | else if (GET_CODE (SET_SRC (x)) == CALL) | |
4717 | { | |
4718 | canon_reg (SET_SRC (x), insn); | |
77fa0940 | 4719 | apply_change_group (); |
7afe21cc | 4720 | fold_rtx (SET_SRC (x), insn); |
bb4034b3 | 4721 | invalidate (SET_DEST (x), VOIDmode); |
7afe21cc RK |
4722 | } |
4723 | else | |
4724 | n_sets = 1; | |
4725 | } | |
4726 | else if (GET_CODE (x) == PARALLEL) | |
4727 | { | |
b3694847 | 4728 | int lim = XVECLEN (x, 0); |
7afe21cc | 4729 | |
703ad42b | 4730 | sets = alloca (lim * sizeof (struct set)); |
7afe21cc RK |
4731 | |
4732 | /* Find all regs explicitly clobbered in this insn, | |
4733 | and ensure they are not replaced with any other regs | |
4734 | elsewhere in this insn. | |
4735 | When a reg that is clobbered is also used for input, | |
4736 | we should presume that that is for a reason, | |
4737 | and we should not substitute some other register | |
4738 | which is not supposed to be clobbered. | |
4739 | Therefore, this loop cannot be merged into the one below | |
830a38ee | 4740 | because a CALL may precede a CLOBBER and refer to the |
7afe21cc RK |
4741 | value clobbered. We must not let a canonicalization do |
4742 | anything in that case. */ | |
4743 | for (i = 0; i < lim; i++) | |
4744 | { | |
b3694847 | 4745 | rtx y = XVECEXP (x, 0, i); |
2708da92 RS |
4746 | if (GET_CODE (y) == CLOBBER) |
4747 | { | |
4748 | rtx clobbered = XEXP (y, 0); | |
4749 | ||
f8cfc6aa | 4750 | if (REG_P (clobbered) |
2708da92 | 4751 | || GET_CODE (clobbered) == SUBREG) |
bb4034b3 | 4752 | invalidate (clobbered, VOIDmode); |
2708da92 RS |
4753 | else if (GET_CODE (clobbered) == STRICT_LOW_PART |
4754 | || GET_CODE (clobbered) == ZERO_EXTRACT) | |
bb4034b3 | 4755 | invalidate (XEXP (clobbered, 0), GET_MODE (clobbered)); |
2708da92 | 4756 | } |
7afe21cc | 4757 | } |
278a83b2 | 4758 | |
7afe21cc RK |
4759 | for (i = 0; i < lim; i++) |
4760 | { | |
b3694847 | 4761 | rtx y = XVECEXP (x, 0, i); |
7afe21cc RK |
4762 | if (GET_CODE (y) == SET) |
4763 | { | |
7722328e RK |
4764 | /* As above, we ignore unconditional jumps and call-insns and |
4765 | ignore the result of apply_change_group. */ | |
7afe21cc RK |
4766 | if (GET_CODE (SET_SRC (y)) == CALL) |
4767 | { | |
4768 | canon_reg (SET_SRC (y), insn); | |
77fa0940 | 4769 | apply_change_group (); |
7afe21cc | 4770 | fold_rtx (SET_SRC (y), insn); |
bb4034b3 | 4771 | invalidate (SET_DEST (y), VOIDmode); |
7afe21cc RK |
4772 | } |
4773 | else if (SET_DEST (y) == pc_rtx | |
4774 | && GET_CODE (SET_SRC (y)) == LABEL_REF) | |
4775 | ; | |
4776 | else | |
4777 | sets[n_sets++].rtl = y; | |
4778 | } | |
4779 | else if (GET_CODE (y) == CLOBBER) | |
4780 | { | |
9ae8ffe7 | 4781 | /* If we clobber memory, canon the address. |
7afe21cc RK |
4782 | This does nothing when a register is clobbered |
4783 | because we have already invalidated the reg. */ | |
3c0cb5de | 4784 | if (MEM_P (XEXP (y, 0))) |
9ae8ffe7 | 4785 | canon_reg (XEXP (y, 0), NULL_RTX); |
7afe21cc RK |
4786 | } |
4787 | else if (GET_CODE (y) == USE | |
f8cfc6aa | 4788 | && ! (REG_P (XEXP (y, 0)) |
7afe21cc | 4789 | && REGNO (XEXP (y, 0)) < FIRST_PSEUDO_REGISTER)) |
906c4e36 | 4790 | canon_reg (y, NULL_RTX); |
7afe21cc RK |
4791 | else if (GET_CODE (y) == CALL) |
4792 | { | |
7722328e RK |
4793 | /* The result of apply_change_group can be ignored; see |
4794 | canon_reg. */ | |
7afe21cc | 4795 | canon_reg (y, insn); |
77fa0940 | 4796 | apply_change_group (); |
7afe21cc RK |
4797 | fold_rtx (y, insn); |
4798 | } | |
4799 | } | |
4800 | } | |
4801 | else if (GET_CODE (x) == CLOBBER) | |
4802 | { | |
3c0cb5de | 4803 | if (MEM_P (XEXP (x, 0))) |
9ae8ffe7 | 4804 | canon_reg (XEXP (x, 0), NULL_RTX); |
7afe21cc RK |
4805 | } |
4806 | ||
4807 | /* Canonicalize a USE of a pseudo register or memory location. */ | |
4808 | else if (GET_CODE (x) == USE | |
f8cfc6aa | 4809 | && ! (REG_P (XEXP (x, 0)) |
7afe21cc | 4810 | && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)) |
906c4e36 | 4811 | canon_reg (XEXP (x, 0), NULL_RTX); |
7afe21cc RK |
4812 | else if (GET_CODE (x) == CALL) |
4813 | { | |
7722328e | 4814 | /* The result of apply_change_group can be ignored; see canon_reg. */ |
7afe21cc | 4815 | canon_reg (x, insn); |
77fa0940 | 4816 | apply_change_group (); |
7afe21cc RK |
4817 | fold_rtx (x, insn); |
4818 | } | |
4819 | ||
7b3ab05e JW |
4820 | /* Store the equivalent value in SRC_EQV, if different, or if the DEST |
4821 | is a STRICT_LOW_PART. The latter condition is necessary because SRC_EQV | |
4822 | is handled specially for this case, and if it isn't set, then there will | |
9faa82d8 | 4823 | be no equivalence for the destination. */ |
92f9aa51 RK |
4824 | if (n_sets == 1 && REG_NOTES (insn) != 0 |
4825 | && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0 | |
7b3ab05e JW |
4826 | && (! rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl)) |
4827 | || GET_CODE (SET_DEST (sets[0].rtl)) == STRICT_LOW_PART)) | |
7b668f9e JJ |
4828 | { |
4829 | src_eqv = fold_rtx (canon_reg (XEXP (tem, 0), NULL_RTX), insn); | |
4830 | XEXP (tem, 0) = src_eqv; | |
4831 | } | |
7afe21cc RK |
4832 | |
4833 | /* Canonicalize sources and addresses of destinations. | |
4834 | We do this in a separate pass to avoid problems when a MATCH_DUP is | |
4835 | present in the insn pattern. In that case, we want to ensure that | |
4836 | we don't break the duplicate nature of the pattern. So we will replace | |
4837 | both operands at the same time. Otherwise, we would fail to find an | |
4838 | equivalent substitution in the loop calling validate_change below. | |
7afe21cc RK |
4839 | |
4840 | We used to suppress canonicalization of DEST if it appears in SRC, | |
77fa0940 | 4841 | but we don't do this any more. */ |
7afe21cc RK |
4842 | |
4843 | for (i = 0; i < n_sets; i++) | |
4844 | { | |
4845 | rtx dest = SET_DEST (sets[i].rtl); | |
4846 | rtx src = SET_SRC (sets[i].rtl); | |
4847 | rtx new = canon_reg (src, insn); | |
58873255 | 4848 | int insn_code; |
7afe21cc | 4849 | |
47841d1b | 4850 | sets[i].orig_src = src; |
f8cfc6aa | 4851 | if ((REG_P (new) && REG_P (src) |
77fa0940 RK |
4852 | && ((REGNO (new) < FIRST_PSEUDO_REGISTER) |
4853 | != (REGNO (src) < FIRST_PSEUDO_REGISTER))) | |
58873255 | 4854 | || (insn_code = recog_memoized (insn)) < 0 |
a995e389 | 4855 | || insn_data[insn_code].n_dups > 0) |
77fa0940 | 4856 | validate_change (insn, &SET_SRC (sets[i].rtl), new, 1); |
7afe21cc RK |
4857 | else |
4858 | SET_SRC (sets[i].rtl) = new; | |
4859 | ||
46d096a3 | 4860 | if (GET_CODE (dest) == ZERO_EXTRACT) |
7afe21cc RK |
4861 | { |
4862 | validate_change (insn, &XEXP (dest, 1), | |
77fa0940 | 4863 | canon_reg (XEXP (dest, 1), insn), 1); |
7afe21cc | 4864 | validate_change (insn, &XEXP (dest, 2), |
77fa0940 | 4865 | canon_reg (XEXP (dest, 2), insn), 1); |
7afe21cc RK |
4866 | } |
4867 | ||
46d096a3 | 4868 | while (GET_CODE (dest) == SUBREG |
7afe21cc | 4869 | || GET_CODE (dest) == ZERO_EXTRACT |
46d096a3 | 4870 | || GET_CODE (dest) == STRICT_LOW_PART) |
7afe21cc RK |
4871 | dest = XEXP (dest, 0); |
4872 | ||
3c0cb5de | 4873 | if (MEM_P (dest)) |
7afe21cc RK |
4874 | canon_reg (dest, insn); |
4875 | } | |
4876 | ||
77fa0940 RK |
4877 | /* Now that we have done all the replacements, we can apply the change |
4878 | group and see if they all work. Note that this will cause some | |
4879 | canonicalizations that would have worked individually not to be applied | |
4880 | because some other canonicalization didn't work, but this should not | |
278a83b2 | 4881 | occur often. |
7722328e RK |
4882 | |
4883 | The result of apply_change_group can be ignored; see canon_reg. */ | |
77fa0940 RK |
4884 | |
4885 | apply_change_group (); | |
4886 | ||
7afe21cc RK |
4887 | /* Set sets[i].src_elt to the class each source belongs to. |
4888 | Detect assignments from or to volatile things | |
4889 | and set set[i] to zero so they will be ignored | |
4890 | in the rest of this function. | |
4891 | ||
4892 | Nothing in this loop changes the hash table or the register chains. */ | |
4893 | ||
4894 | for (i = 0; i < n_sets; i++) | |
4895 | { | |
b3694847 SS |
4896 | rtx src, dest; |
4897 | rtx src_folded; | |
4898 | struct table_elt *elt = 0, *p; | |
7afe21cc RK |
4899 | enum machine_mode mode; |
4900 | rtx src_eqv_here; | |
4901 | rtx src_const = 0; | |
4902 | rtx src_related = 0; | |
4903 | struct table_elt *src_const_elt = 0; | |
99a9c946 GS |
4904 | int src_cost = MAX_COST; |
4905 | int src_eqv_cost = MAX_COST; | |
4906 | int src_folded_cost = MAX_COST; | |
4907 | int src_related_cost = MAX_COST; | |
4908 | int src_elt_cost = MAX_COST; | |
4909 | int src_regcost = MAX_COST; | |
4910 | int src_eqv_regcost = MAX_COST; | |
4911 | int src_folded_regcost = MAX_COST; | |
4912 | int src_related_regcost = MAX_COST; | |
4913 | int src_elt_regcost = MAX_COST; | |
da7d8304 | 4914 | /* Set nonzero if we need to call force_const_mem on with the |
7afe21cc RK |
4915 | contents of src_folded before using it. */ |
4916 | int src_folded_force_flag = 0; | |
4917 | ||
4918 | dest = SET_DEST (sets[i].rtl); | |
4919 | src = SET_SRC (sets[i].rtl); | |
4920 | ||
4921 | /* If SRC is a constant that has no machine mode, | |
4922 | hash it with the destination's machine mode. | |
4923 | This way we can keep different modes separate. */ | |
4924 | ||
4925 | mode = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src); | |
4926 | sets[i].mode = mode; | |
4927 | ||
4928 | if (src_eqv) | |
4929 | { | |
4930 | enum machine_mode eqvmode = mode; | |
4931 | if (GET_CODE (dest) == STRICT_LOW_PART) | |
4932 | eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0))); | |
4933 | do_not_record = 0; | |
4934 | hash_arg_in_memory = 0; | |
2197a88a | 4935 | src_eqv_hash = HASH (src_eqv, eqvmode); |
7afe21cc RK |
4936 | |
4937 | /* Find the equivalence class for the equivalent expression. */ | |
4938 | ||
4939 | if (!do_not_record) | |
2197a88a | 4940 | src_eqv_elt = lookup (src_eqv, src_eqv_hash, eqvmode); |
7afe21cc RK |
4941 | |
4942 | src_eqv_volatile = do_not_record; | |
4943 | src_eqv_in_memory = hash_arg_in_memory; | |
7afe21cc RK |
4944 | } |
4945 | ||
4946 | /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the | |
4947 | value of the INNER register, not the destination. So it is not | |
3826a3da | 4948 | a valid substitution for the source. But save it for later. */ |
7afe21cc RK |
4949 | if (GET_CODE (dest) == STRICT_LOW_PART) |
4950 | src_eqv_here = 0; | |
4951 | else | |
4952 | src_eqv_here = src_eqv; | |
4953 | ||
4954 | /* Simplify and foldable subexpressions in SRC. Then get the fully- | |
4955 | simplified result, which may not necessarily be valid. */ | |
4956 | src_folded = fold_rtx (src, insn); | |
4957 | ||
e6a125a0 RK |
4958 | #if 0 |
4959 | /* ??? This caused bad code to be generated for the m68k port with -O2. | |
4960 | Suppose src is (CONST_INT -1), and that after truncation src_folded | |
4961 | is (CONST_INT 3). Suppose src_folded is then used for src_const. | |
4962 | At the end we will add src and src_const to the same equivalence | |
4963 | class. We now have 3 and -1 on the same equivalence class. This | |
4964 | causes later instructions to be mis-optimized. */ | |
7afe21cc RK |
4965 | /* If storing a constant in a bitfield, pre-truncate the constant |
4966 | so we will be able to record it later. */ | |
46d096a3 | 4967 | if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT) |
7afe21cc RK |
4968 | { |
4969 | rtx width = XEXP (SET_DEST (sets[i].rtl), 1); | |
4970 | ||
4971 | if (GET_CODE (src) == CONST_INT | |
4972 | && GET_CODE (width) == CONST_INT | |
906c4e36 RK |
4973 | && INTVAL (width) < HOST_BITS_PER_WIDE_INT |
4974 | && (INTVAL (src) & ((HOST_WIDE_INT) (-1) << INTVAL (width)))) | |
4975 | src_folded | |
4976 | = GEN_INT (INTVAL (src) & (((HOST_WIDE_INT) 1 | |
4977 | << INTVAL (width)) - 1)); | |
7afe21cc | 4978 | } |
e6a125a0 | 4979 | #endif |
7afe21cc RK |
4980 | |
4981 | /* Compute SRC's hash code, and also notice if it | |
4982 | should not be recorded at all. In that case, | |
4983 | prevent any further processing of this assignment. */ | |
4984 | do_not_record = 0; | |
4985 | hash_arg_in_memory = 0; | |
7afe21cc RK |
4986 | |
4987 | sets[i].src = src; | |
2197a88a | 4988 | sets[i].src_hash = HASH (src, mode); |
7afe21cc RK |
4989 | sets[i].src_volatile = do_not_record; |
4990 | sets[i].src_in_memory = hash_arg_in_memory; | |
7afe21cc | 4991 | |
50196afa | 4992 | /* If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is |
43e72072 JJ |
4993 | a pseudo, do not record SRC. Using SRC as a replacement for |
4994 | anything else will be incorrect in that situation. Note that | |
4995 | this usually occurs only for stack slots, in which case all the | |
4996 | RTL would be referring to SRC, so we don't lose any optimization | |
4997 | opportunities by not having SRC in the hash table. */ | |
50196afa | 4998 | |
3c0cb5de | 4999 | if (MEM_P (src) |
43e72072 | 5000 | && find_reg_note (insn, REG_EQUIV, NULL_RTX) != 0 |
f8cfc6aa | 5001 | && REG_P (dest) |
43e72072 | 5002 | && REGNO (dest) >= FIRST_PSEUDO_REGISTER) |
50196afa RK |
5003 | sets[i].src_volatile = 1; |
5004 | ||
0dadecf6 RK |
5005 | #if 0 |
5006 | /* It is no longer clear why we used to do this, but it doesn't | |
5007 | appear to still be needed. So let's try without it since this | |
5008 | code hurts cse'ing widened ops. */ | |
9a5a17f3 | 5009 | /* If source is a paradoxical subreg (such as QI treated as an SI), |
7afe21cc RK |
5010 | treat it as volatile. It may do the work of an SI in one context |
5011 | where the extra bits are not being used, but cannot replace an SI | |
5012 | in general. */ | |
5013 | if (GET_CODE (src) == SUBREG | |
5014 | && (GET_MODE_SIZE (GET_MODE (src)) | |
5015 | > GET_MODE_SIZE (GET_MODE (SUBREG_REG (src))))) | |
5016 | sets[i].src_volatile = 1; | |
0dadecf6 | 5017 | #endif |
7afe21cc RK |
5018 | |
5019 | /* Locate all possible equivalent forms for SRC. Try to replace | |
5020 | SRC in the insn with each cheaper equivalent. | |
5021 | ||
5022 | We have the following types of equivalents: SRC itself, a folded | |
5023 | version, a value given in a REG_EQUAL note, or a value related | |
5024 | to a constant. | |
5025 | ||
5026 | Each of these equivalents may be part of an additional class | |
5027 | of equivalents (if more than one is in the table, they must be in | |
5028 | the same class; we check for this). | |
5029 | ||
5030 | If the source is volatile, we don't do any table lookups. | |
5031 | ||
5032 | We note any constant equivalent for possible later use in a | |
5033 | REG_NOTE. */ | |
5034 | ||
5035 | if (!sets[i].src_volatile) | |
2197a88a | 5036 | elt = lookup (src, sets[i].src_hash, mode); |
7afe21cc RK |
5037 | |
5038 | sets[i].src_elt = elt; | |
5039 | ||
5040 | if (elt && src_eqv_here && src_eqv_elt) | |
278a83b2 KH |
5041 | { |
5042 | if (elt->first_same_value != src_eqv_elt->first_same_value) | |
7afe21cc RK |
5043 | { |
5044 | /* The REG_EQUAL is indicating that two formerly distinct | |
5045 | classes are now equivalent. So merge them. */ | |
5046 | merge_equiv_classes (elt, src_eqv_elt); | |
2197a88a RK |
5047 | src_eqv_hash = HASH (src_eqv, elt->mode); |
5048 | src_eqv_elt = lookup (src_eqv, src_eqv_hash, elt->mode); | |
7afe21cc RK |
5049 | } |
5050 | ||
278a83b2 KH |
5051 | src_eqv_here = 0; |
5052 | } | |
7afe21cc RK |
5053 | |
5054 | else if (src_eqv_elt) | |
278a83b2 | 5055 | elt = src_eqv_elt; |
7afe21cc RK |
5056 | |
5057 | /* Try to find a constant somewhere and record it in `src_const'. | |
5058 | Record its table element, if any, in `src_const_elt'. Look in | |
5059 | any known equivalences first. (If the constant is not in the | |
2197a88a | 5060 | table, also set `sets[i].src_const_hash'). */ |
7afe21cc | 5061 | if (elt) |
278a83b2 | 5062 | for (p = elt->first_same_value; p; p = p->next_same_value) |
7afe21cc RK |
5063 | if (p->is_const) |
5064 | { | |
5065 | src_const = p->exp; | |
5066 | src_const_elt = elt; | |
5067 | break; | |
5068 | } | |
5069 | ||
5070 | if (src_const == 0 | |
5071 | && (CONSTANT_P (src_folded) | |
278a83b2 | 5072 | /* Consider (minus (label_ref L1) (label_ref L2)) as |
7afe21cc RK |
5073 | "constant" here so we will record it. This allows us |
5074 | to fold switch statements when an ADDR_DIFF_VEC is used. */ | |
5075 | || (GET_CODE (src_folded) == MINUS | |
5076 | && GET_CODE (XEXP (src_folded, 0)) == LABEL_REF | |
5077 | && GET_CODE (XEXP (src_folded, 1)) == LABEL_REF))) | |
5078 | src_const = src_folded, src_const_elt = elt; | |
5079 | else if (src_const == 0 && src_eqv_here && CONSTANT_P (src_eqv_here)) | |
5080 | src_const = src_eqv_here, src_const_elt = src_eqv_elt; | |
5081 | ||
5082 | /* If we don't know if the constant is in the table, get its | |
5083 | hash code and look it up. */ | |
5084 | if (src_const && src_const_elt == 0) | |
5085 | { | |
2197a88a RK |
5086 | sets[i].src_const_hash = HASH (src_const, mode); |
5087 | src_const_elt = lookup (src_const, sets[i].src_const_hash, mode); | |
7afe21cc RK |
5088 | } |
5089 | ||
5090 | sets[i].src_const = src_const; | |
5091 | sets[i].src_const_elt = src_const_elt; | |
5092 | ||
5093 | /* If the constant and our source are both in the table, mark them as | |
5094 | equivalent. Otherwise, if a constant is in the table but the source | |
5095 | isn't, set ELT to it. */ | |
5096 | if (src_const_elt && elt | |
5097 | && src_const_elt->first_same_value != elt->first_same_value) | |
5098 | merge_equiv_classes (elt, src_const_elt); | |
5099 | else if (src_const_elt && elt == 0) | |
5100 | elt = src_const_elt; | |
5101 | ||
5102 | /* See if there is a register linearly related to a constant | |
5103 | equivalent of SRC. */ | |
5104 | if (src_const | |
5105 | && (GET_CODE (src_const) == CONST | |
5106 | || (src_const_elt && src_const_elt->related_value != 0))) | |
278a83b2 KH |
5107 | { |
5108 | src_related = use_related_value (src_const, src_const_elt); | |
5109 | if (src_related) | |
5110 | { | |
7afe21cc | 5111 | struct table_elt *src_related_elt |
278a83b2 | 5112 | = lookup (src_related, HASH (src_related, mode), mode); |
7afe21cc | 5113 | if (src_related_elt && elt) |
278a83b2 | 5114 | { |
7afe21cc RK |
5115 | if (elt->first_same_value |
5116 | != src_related_elt->first_same_value) | |
278a83b2 | 5117 | /* This can occur when we previously saw a CONST |
7afe21cc RK |
5118 | involving a SYMBOL_REF and then see the SYMBOL_REF |
5119 | twice. Merge the involved classes. */ | |
5120 | merge_equiv_classes (elt, src_related_elt); | |
5121 | ||
278a83b2 | 5122 | src_related = 0; |
7afe21cc | 5123 | src_related_elt = 0; |
278a83b2 KH |
5124 | } |
5125 | else if (src_related_elt && elt == 0) | |
5126 | elt = src_related_elt; | |
7afe21cc | 5127 | } |
278a83b2 | 5128 | } |
7afe21cc | 5129 | |
e4600702 RK |
5130 | /* See if we have a CONST_INT that is already in a register in a |
5131 | wider mode. */ | |
5132 | ||
5133 | if (src_const && src_related == 0 && GET_CODE (src_const) == CONST_INT | |
5134 | && GET_MODE_CLASS (mode) == MODE_INT | |
5135 | && GET_MODE_BITSIZE (mode) < BITS_PER_WORD) | |
5136 | { | |
5137 | enum machine_mode wider_mode; | |
5138 | ||
5139 | for (wider_mode = GET_MODE_WIDER_MODE (mode); | |
5140 | GET_MODE_BITSIZE (wider_mode) <= BITS_PER_WORD | |
5141 | && src_related == 0; | |
5142 | wider_mode = GET_MODE_WIDER_MODE (wider_mode)) | |
5143 | { | |
5144 | struct table_elt *const_elt | |
5145 | = lookup (src_const, HASH (src_const, wider_mode), wider_mode); | |
5146 | ||
5147 | if (const_elt == 0) | |
5148 | continue; | |
5149 | ||
5150 | for (const_elt = const_elt->first_same_value; | |
5151 | const_elt; const_elt = const_elt->next_same_value) | |
f8cfc6aa | 5152 | if (REG_P (const_elt->exp)) |
e4600702 | 5153 | { |
4de249d9 | 5154 | src_related = gen_lowpart (mode, |
e4600702 RK |
5155 | const_elt->exp); |
5156 | break; | |
5157 | } | |
5158 | } | |
5159 | } | |
5160 | ||
d45cf215 RS |
5161 | /* Another possibility is that we have an AND with a constant in |
5162 | a mode narrower than a word. If so, it might have been generated | |
5163 | as part of an "if" which would narrow the AND. If we already | |
5164 | have done the AND in a wider mode, we can use a SUBREG of that | |
5165 | value. */ | |
5166 | ||
5167 | if (flag_expensive_optimizations && ! src_related | |
5168 | && GET_CODE (src) == AND && GET_CODE (XEXP (src, 1)) == CONST_INT | |
5169 | && GET_MODE_SIZE (mode) < UNITS_PER_WORD) | |
5170 | { | |
5171 | enum machine_mode tmode; | |
38a448ca | 5172 | rtx new_and = gen_rtx_AND (VOIDmode, NULL_RTX, XEXP (src, 1)); |
d45cf215 RS |
5173 | |
5174 | for (tmode = GET_MODE_WIDER_MODE (mode); | |
5175 | GET_MODE_SIZE (tmode) <= UNITS_PER_WORD; | |
5176 | tmode = GET_MODE_WIDER_MODE (tmode)) | |
5177 | { | |
4de249d9 | 5178 | rtx inner = gen_lowpart (tmode, XEXP (src, 0)); |
d45cf215 RS |
5179 | struct table_elt *larger_elt; |
5180 | ||
5181 | if (inner) | |
5182 | { | |
5183 | PUT_MODE (new_and, tmode); | |
5184 | XEXP (new_and, 0) = inner; | |
5185 | larger_elt = lookup (new_and, HASH (new_and, tmode), tmode); | |
5186 | if (larger_elt == 0) | |
5187 | continue; | |
5188 | ||
5189 | for (larger_elt = larger_elt->first_same_value; | |
5190 | larger_elt; larger_elt = larger_elt->next_same_value) | |
f8cfc6aa | 5191 | if (REG_P (larger_elt->exp)) |
d45cf215 RS |
5192 | { |
5193 | src_related | |
4de249d9 | 5194 | = gen_lowpart (mode, larger_elt->exp); |
d45cf215 RS |
5195 | break; |
5196 | } | |
5197 | ||
5198 | if (src_related) | |
5199 | break; | |
5200 | } | |
5201 | } | |
5202 | } | |
7bac1be0 RK |
5203 | |
5204 | #ifdef LOAD_EXTEND_OP | |
5205 | /* See if a MEM has already been loaded with a widening operation; | |
5206 | if it has, we can use a subreg of that. Many CISC machines | |
5207 | also have such operations, but this is only likely to be | |
71cc389b | 5208 | beneficial on these machines. */ |
278a83b2 | 5209 | |
ddc356e8 | 5210 | if (flag_expensive_optimizations && src_related == 0 |
7bac1be0 RK |
5211 | && (GET_MODE_SIZE (mode) < UNITS_PER_WORD) |
5212 | && GET_MODE_CLASS (mode) == MODE_INT | |
3c0cb5de | 5213 | && MEM_P (src) && ! do_not_record |
f822d252 | 5214 | && LOAD_EXTEND_OP (mode) != UNKNOWN) |
7bac1be0 | 5215 | { |
9d80ef7c RH |
5216 | struct rtx_def memory_extend_buf; |
5217 | rtx memory_extend_rtx = &memory_extend_buf; | |
7bac1be0 | 5218 | enum machine_mode tmode; |
278a83b2 | 5219 | |
7bac1be0 RK |
5220 | /* Set what we are trying to extend and the operation it might |
5221 | have been extended with. */ | |
9d80ef7c | 5222 | memset (memory_extend_rtx, 0, sizeof(*memory_extend_rtx)); |
7bac1be0 RK |
5223 | PUT_CODE (memory_extend_rtx, LOAD_EXTEND_OP (mode)); |
5224 | XEXP (memory_extend_rtx, 0) = src; | |
278a83b2 | 5225 | |
7bac1be0 RK |
5226 | for (tmode = GET_MODE_WIDER_MODE (mode); |
5227 | GET_MODE_SIZE (tmode) <= UNITS_PER_WORD; | |
5228 | tmode = GET_MODE_WIDER_MODE (tmode)) | |
5229 | { | |
5230 | struct table_elt *larger_elt; | |
278a83b2 | 5231 | |
7bac1be0 | 5232 | PUT_MODE (memory_extend_rtx, tmode); |
278a83b2 | 5233 | larger_elt = lookup (memory_extend_rtx, |
7bac1be0 RK |
5234 | HASH (memory_extend_rtx, tmode), tmode); |
5235 | if (larger_elt == 0) | |
5236 | continue; | |
278a83b2 | 5237 | |
7bac1be0 RK |
5238 | for (larger_elt = larger_elt->first_same_value; |
5239 | larger_elt; larger_elt = larger_elt->next_same_value) | |
f8cfc6aa | 5240 | if (REG_P (larger_elt->exp)) |
7bac1be0 | 5241 | { |
4de249d9 | 5242 | src_related = gen_lowpart (mode, |
7bac1be0 RK |
5243 | larger_elt->exp); |
5244 | break; | |
5245 | } | |
278a83b2 | 5246 | |
7bac1be0 RK |
5247 | if (src_related) |
5248 | break; | |
5249 | } | |
5250 | } | |
5251 | #endif /* LOAD_EXTEND_OP */ | |
278a83b2 | 5252 | |
7afe21cc | 5253 | if (src == src_folded) |
278a83b2 | 5254 | src_folded = 0; |
7afe21cc | 5255 | |
da7d8304 | 5256 | /* At this point, ELT, if nonzero, points to a class of expressions |
7afe21cc | 5257 | equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED, |
da7d8304 | 5258 | and SRC_RELATED, if nonzero, each contain additional equivalent |
7afe21cc RK |
5259 | expressions. Prune these latter expressions by deleting expressions |
5260 | already in the equivalence class. | |
5261 | ||
5262 | Check for an equivalent identical to the destination. If found, | |
5263 | this is the preferred equivalent since it will likely lead to | |
5264 | elimination of the insn. Indicate this by placing it in | |
5265 | `src_related'. */ | |
5266 | ||
278a83b2 KH |
5267 | if (elt) |
5268 | elt = elt->first_same_value; | |
7afe21cc | 5269 | for (p = elt; p; p = p->next_same_value) |
278a83b2 | 5270 | { |
7afe21cc RK |
5271 | enum rtx_code code = GET_CODE (p->exp); |
5272 | ||
5273 | /* If the expression is not valid, ignore it. Then we do not | |
5274 | have to check for validity below. In most cases, we can use | |
5275 | `rtx_equal_p', since canonicalization has already been done. */ | |
0516f6fe | 5276 | if (code != REG && ! exp_equiv_p (p->exp, p->exp, 1, false)) |
7afe21cc RK |
5277 | continue; |
5278 | ||
5a03c8c4 RK |
5279 | /* Also skip paradoxical subregs, unless that's what we're |
5280 | looking for. */ | |
5281 | if (code == SUBREG | |
5282 | && (GET_MODE_SIZE (GET_MODE (p->exp)) | |
5283 | > GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp)))) | |
5284 | && ! (src != 0 | |
5285 | && GET_CODE (src) == SUBREG | |
5286 | && GET_MODE (src) == GET_MODE (p->exp) | |
5287 | && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src))) | |
5288 | < GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp)))))) | |
5289 | continue; | |
5290 | ||
278a83b2 | 5291 | if (src && GET_CODE (src) == code && rtx_equal_p (src, p->exp)) |
7afe21cc | 5292 | src = 0; |
278a83b2 | 5293 | else if (src_folded && GET_CODE (src_folded) == code |
7afe21cc RK |
5294 | && rtx_equal_p (src_folded, p->exp)) |
5295 | src_folded = 0; | |
278a83b2 | 5296 | else if (src_eqv_here && GET_CODE (src_eqv_here) == code |
7afe21cc RK |
5297 | && rtx_equal_p (src_eqv_here, p->exp)) |
5298 | src_eqv_here = 0; | |
278a83b2 | 5299 | else if (src_related && GET_CODE (src_related) == code |
7afe21cc RK |
5300 | && rtx_equal_p (src_related, p->exp)) |
5301 | src_related = 0; | |
5302 | ||
5303 | /* This is the same as the destination of the insns, we want | |
5304 | to prefer it. Copy it to src_related. The code below will | |
5305 | then give it a negative cost. */ | |
5306 | if (GET_CODE (dest) == code && rtx_equal_p (p->exp, dest)) | |
5307 | src_related = dest; | |
278a83b2 | 5308 | } |
7afe21cc RK |
5309 | |
5310 | /* Find the cheapest valid equivalent, trying all the available | |
5311 | possibilities. Prefer items not in the hash table to ones | |
5312 | that are when they are equal cost. Note that we can never | |
5313 | worsen an insn as the current contents will also succeed. | |
05c33dd8 | 5314 | If we find an equivalent identical to the destination, use it as best, |
0f41302f | 5315 | since this insn will probably be eliminated in that case. */ |
7afe21cc RK |
5316 | if (src) |
5317 | { | |
5318 | if (rtx_equal_p (src, dest)) | |
f1c1dfc3 | 5319 | src_cost = src_regcost = -1; |
7afe21cc | 5320 | else |
630c79be BS |
5321 | { |
5322 | src_cost = COST (src); | |
5323 | src_regcost = approx_reg_cost (src); | |
5324 | } | |
7afe21cc RK |
5325 | } |
5326 | ||
5327 | if (src_eqv_here) | |
5328 | { | |
5329 | if (rtx_equal_p (src_eqv_here, dest)) | |
f1c1dfc3 | 5330 | src_eqv_cost = src_eqv_regcost = -1; |
7afe21cc | 5331 | else |
630c79be BS |
5332 | { |
5333 | src_eqv_cost = COST (src_eqv_here); | |
5334 | src_eqv_regcost = approx_reg_cost (src_eqv_here); | |
5335 | } | |
7afe21cc RK |
5336 | } |
5337 | ||
5338 | if (src_folded) | |
5339 | { | |
5340 | if (rtx_equal_p (src_folded, dest)) | |
f1c1dfc3 | 5341 | src_folded_cost = src_folded_regcost = -1; |
7afe21cc | 5342 | else |
630c79be BS |
5343 | { |
5344 | src_folded_cost = COST (src_folded); | |
5345 | src_folded_regcost = approx_reg_cost (src_folded); | |
5346 | } | |
7afe21cc RK |
5347 | } |
5348 | ||
5349 | if (src_related) | |
5350 | { | |
5351 | if (rtx_equal_p (src_related, dest)) | |
f1c1dfc3 | 5352 | src_related_cost = src_related_regcost = -1; |
7afe21cc | 5353 | else |
630c79be BS |
5354 | { |
5355 | src_related_cost = COST (src_related); | |
5356 | src_related_regcost = approx_reg_cost (src_related); | |
5357 | } | |
7afe21cc RK |
5358 | } |
5359 | ||
5360 | /* If this was an indirect jump insn, a known label will really be | |
5361 | cheaper even though it looks more expensive. */ | |
5362 | if (dest == pc_rtx && src_const && GET_CODE (src_const) == LABEL_REF) | |
99a9c946 | 5363 | src_folded = src_const, src_folded_cost = src_folded_regcost = -1; |
278a83b2 | 5364 | |
7afe21cc RK |
5365 | /* Terminate loop when replacement made. This must terminate since |
5366 | the current contents will be tested and will always be valid. */ | |
5367 | while (1) | |
278a83b2 KH |
5368 | { |
5369 | rtx trial; | |
7afe21cc | 5370 | |
278a83b2 | 5371 | /* Skip invalid entries. */ |
f8cfc6aa | 5372 | while (elt && !REG_P (elt->exp) |
0516f6fe | 5373 | && ! exp_equiv_p (elt->exp, elt->exp, 1, false)) |
278a83b2 | 5374 | elt = elt->next_same_value; |
5a03c8c4 RK |
5375 | |
5376 | /* A paradoxical subreg would be bad here: it'll be the right | |
5377 | size, but later may be adjusted so that the upper bits aren't | |
5378 | what we want. So reject it. */ | |
5379 | if (elt != 0 | |
5380 | && GET_CODE (elt->exp) == SUBREG | |
5381 | && (GET_MODE_SIZE (GET_MODE (elt->exp)) | |
5382 | > GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp)))) | |
5383 | /* It is okay, though, if the rtx we're trying to match | |
5384 | will ignore any of the bits we can't predict. */ | |
5385 | && ! (src != 0 | |
5386 | && GET_CODE (src) == SUBREG | |
5387 | && GET_MODE (src) == GET_MODE (elt->exp) | |
5388 | && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src))) | |
5389 | < GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp)))))) | |
5390 | { | |
5391 | elt = elt->next_same_value; | |
5392 | continue; | |
5393 | } | |
278a83b2 | 5394 | |
68252e27 | 5395 | if (elt) |
630c79be BS |
5396 | { |
5397 | src_elt_cost = elt->cost; | |
5398 | src_elt_regcost = elt->regcost; | |
5399 | } | |
7afe21cc | 5400 | |
68252e27 | 5401 | /* Find cheapest and skip it for the next time. For items |
7afe21cc RK |
5402 | of equal cost, use this order: |
5403 | src_folded, src, src_eqv, src_related and hash table entry. */ | |
99a9c946 | 5404 | if (src_folded |
56ae04af KH |
5405 | && preferable (src_folded_cost, src_folded_regcost, |
5406 | src_cost, src_regcost) <= 0 | |
5407 | && preferable (src_folded_cost, src_folded_regcost, | |
5408 | src_eqv_cost, src_eqv_regcost) <= 0 | |
5409 | && preferable (src_folded_cost, src_folded_regcost, | |
5410 | src_related_cost, src_related_regcost) <= 0 | |
5411 | && preferable (src_folded_cost, src_folded_regcost, | |
5412 | src_elt_cost, src_elt_regcost) <= 0) | |
7afe21cc | 5413 | { |
f1c1dfc3 | 5414 | trial = src_folded, src_folded_cost = MAX_COST; |
7afe21cc | 5415 | if (src_folded_force_flag) |
9d8de1de EB |
5416 | { |
5417 | rtx forced = force_const_mem (mode, trial); | |
5418 | if (forced) | |
5419 | trial = forced; | |
5420 | } | |
7afe21cc | 5421 | } |
99a9c946 | 5422 | else if (src |
56ae04af KH |
5423 | && preferable (src_cost, src_regcost, |
5424 | src_eqv_cost, src_eqv_regcost) <= 0 | |
5425 | && preferable (src_cost, src_regcost, | |
5426 | src_related_cost, src_related_regcost) <= 0 | |
5427 | && preferable (src_cost, src_regcost, | |
5428 | src_elt_cost, src_elt_regcost) <= 0) | |
f1c1dfc3 | 5429 | trial = src, src_cost = MAX_COST; |
99a9c946 | 5430 | else if (src_eqv_here |
56ae04af KH |
5431 | && preferable (src_eqv_cost, src_eqv_regcost, |
5432 | src_related_cost, src_related_regcost) <= 0 | |
5433 | && preferable (src_eqv_cost, src_eqv_regcost, | |
5434 | src_elt_cost, src_elt_regcost) <= 0) | |
f1c1dfc3 | 5435 | trial = copy_rtx (src_eqv_here), src_eqv_cost = MAX_COST; |
99a9c946 | 5436 | else if (src_related |
56ae04af KH |
5437 | && preferable (src_related_cost, src_related_regcost, |
5438 | src_elt_cost, src_elt_regcost) <= 0) | |
68252e27 | 5439 | trial = copy_rtx (src_related), src_related_cost = MAX_COST; |
278a83b2 | 5440 | else |
7afe21cc | 5441 | { |
05c33dd8 | 5442 | trial = copy_rtx (elt->exp); |
7afe21cc | 5443 | elt = elt->next_same_value; |
f1c1dfc3 | 5444 | src_elt_cost = MAX_COST; |
7afe21cc RK |
5445 | } |
5446 | ||
5447 | /* We don't normally have an insn matching (set (pc) (pc)), so | |
5448 | check for this separately here. We will delete such an | |
5449 | insn below. | |
5450 | ||
d466c016 JL |
5451 | For other cases such as a table jump or conditional jump |
5452 | where we know the ultimate target, go ahead and replace the | |
5453 | operand. While that may not make a valid insn, we will | |
5454 | reemit the jump below (and also insert any necessary | |
5455 | barriers). */ | |
7afe21cc RK |
5456 | if (n_sets == 1 && dest == pc_rtx |
5457 | && (trial == pc_rtx | |
5458 | || (GET_CODE (trial) == LABEL_REF | |
5459 | && ! condjump_p (insn)))) | |
5460 | { | |
2f39b6ca UW |
5461 | /* Don't substitute non-local labels, this confuses CFG. */ |
5462 | if (GET_CODE (trial) == LABEL_REF | |
5463 | && LABEL_REF_NONLOCAL_P (trial)) | |
5464 | continue; | |
5465 | ||
d466c016 | 5466 | SET_SRC (sets[i].rtl) = trial; |
602c4c0d | 5467 | cse_jumps_altered = 1; |
7afe21cc RK |
5468 | break; |
5469 | } | |
278a83b2 | 5470 | |
7afe21cc | 5471 | /* Look for a substitution that makes a valid insn. */ |
ddc356e8 | 5472 | else if (validate_change (insn, &SET_SRC (sets[i].rtl), trial, 0)) |
05c33dd8 | 5473 | { |
dbaff908 RS |
5474 | rtx new = canon_reg (SET_SRC (sets[i].rtl), insn); |
5475 | ||
7bd8b2a8 JL |
5476 | /* If we just made a substitution inside a libcall, then we |
5477 | need to make the same substitution in any notes attached | |
5478 | to the RETVAL insn. */ | |
1ed0205e | 5479 | if (libcall_insn |
f8cfc6aa | 5480 | && (REG_P (sets[i].orig_src) |
47841d1b | 5481 | || GET_CODE (sets[i].orig_src) == SUBREG |
3c0cb5de | 5482 | || MEM_P (sets[i].orig_src))) |
d8b7ec41 RS |
5483 | { |
5484 | rtx note = find_reg_equal_equiv_note (libcall_insn); | |
5485 | if (note != 0) | |
5486 | XEXP (note, 0) = simplify_replace_rtx (XEXP (note, 0), | |
5487 | sets[i].orig_src, | |
5488 | copy_rtx (new)); | |
5489 | } | |
7bd8b2a8 | 5490 | |
7722328e RK |
5491 | /* The result of apply_change_group can be ignored; see |
5492 | canon_reg. */ | |
5493 | ||
dbaff908 | 5494 | validate_change (insn, &SET_SRC (sets[i].rtl), new, 1); |
6702af89 | 5495 | apply_change_group (); |
05c33dd8 RK |
5496 | break; |
5497 | } | |
7afe21cc | 5498 | |
278a83b2 | 5499 | /* If we previously found constant pool entries for |
7afe21cc RK |
5500 | constants and this is a constant, try making a |
5501 | pool entry. Put it in src_folded unless we already have done | |
5502 | this since that is where it likely came from. */ | |
5503 | ||
5504 | else if (constant_pool_entries_cost | |
5505 | && CONSTANT_P (trial) | |
d51ff7cb JW |
5506 | /* Reject cases that will abort in decode_rtx_const. |
5507 | On the alpha when simplifying a switch, we get | |
5508 | (const (truncate (minus (label_ref) (label_ref)))). */ | |
1bbd065b RK |
5509 | && ! (GET_CODE (trial) == CONST |
5510 | && GET_CODE (XEXP (trial, 0)) == TRUNCATE) | |
d51ff7cb JW |
5511 | /* Likewise on IA-64, except without the truncate. */ |
5512 | && ! (GET_CODE (trial) == CONST | |
5513 | && GET_CODE (XEXP (trial, 0)) == MINUS | |
5514 | && GET_CODE (XEXP (XEXP (trial, 0), 0)) == LABEL_REF | |
5515 | && GET_CODE (XEXP (XEXP (trial, 0), 1)) == LABEL_REF) | |
1bbd065b | 5516 | && (src_folded == 0 |
3c0cb5de | 5517 | || (!MEM_P (src_folded) |
1bbd065b | 5518 | && ! src_folded_force_flag)) |
9ae8ffe7 JL |
5519 | && GET_MODE_CLASS (mode) != MODE_CC |
5520 | && mode != VOIDmode) | |
7afe21cc RK |
5521 | { |
5522 | src_folded_force_flag = 1; | |
5523 | src_folded = trial; | |
5524 | src_folded_cost = constant_pool_entries_cost; | |
dd0ba281 | 5525 | src_folded_regcost = constant_pool_entries_regcost; |
7afe21cc | 5526 | } |
278a83b2 | 5527 | } |
7afe21cc RK |
5528 | |
5529 | src = SET_SRC (sets[i].rtl); | |
5530 | ||
5531 | /* In general, it is good to have a SET with SET_SRC == SET_DEST. | |
5532 | However, there is an important exception: If both are registers | |
5533 | that are not the head of their equivalence class, replace SET_SRC | |
5534 | with the head of the class. If we do not do this, we will have | |
5535 | both registers live over a portion of the basic block. This way, | |
5536 | their lifetimes will likely abut instead of overlapping. */ | |
f8cfc6aa | 5537 | if (REG_P (dest) |
1bb98cec | 5538 | && REGNO_QTY_VALID_P (REGNO (dest))) |
7afe21cc | 5539 | { |
1bb98cec DM |
5540 | int dest_q = REG_QTY (REGNO (dest)); |
5541 | struct qty_table_elem *dest_ent = &qty_table[dest_q]; | |
5542 | ||
5543 | if (dest_ent->mode == GET_MODE (dest) | |
5544 | && dest_ent->first_reg != REGNO (dest) | |
f8cfc6aa | 5545 | && REG_P (src) && REGNO (src) == REGNO (dest) |
1bb98cec DM |
5546 | /* Don't do this if the original insn had a hard reg as |
5547 | SET_SRC or SET_DEST. */ | |
f8cfc6aa | 5548 | && (!REG_P (sets[i].src) |
1bb98cec | 5549 | || REGNO (sets[i].src) >= FIRST_PSEUDO_REGISTER) |
f8cfc6aa | 5550 | && (!REG_P (dest) || REGNO (dest) >= FIRST_PSEUDO_REGISTER)) |
1bb98cec DM |
5551 | /* We can't call canon_reg here because it won't do anything if |
5552 | SRC is a hard register. */ | |
759bd8b7 | 5553 | { |
1bb98cec DM |
5554 | int src_q = REG_QTY (REGNO (src)); |
5555 | struct qty_table_elem *src_ent = &qty_table[src_q]; | |
5556 | int first = src_ent->first_reg; | |
5557 | rtx new_src | |
5558 | = (first >= FIRST_PSEUDO_REGISTER | |
5559 | ? regno_reg_rtx[first] : gen_rtx_REG (GET_MODE (src), first)); | |
5560 | ||
5561 | /* We must use validate-change even for this, because this | |
5562 | might be a special no-op instruction, suitable only to | |
5563 | tag notes onto. */ | |
5564 | if (validate_change (insn, &SET_SRC (sets[i].rtl), new_src, 0)) | |
5565 | { | |
5566 | src = new_src; | |
5567 | /* If we had a constant that is cheaper than what we are now | |
5568 | setting SRC to, use that constant. We ignored it when we | |
5569 | thought we could make this into a no-op. */ | |
5570 | if (src_const && COST (src_const) < COST (src) | |
278a83b2 KH |
5571 | && validate_change (insn, &SET_SRC (sets[i].rtl), |
5572 | src_const, 0)) | |
1bb98cec DM |
5573 | src = src_const; |
5574 | } | |
759bd8b7 | 5575 | } |
7afe21cc RK |
5576 | } |
5577 | ||
5578 | /* If we made a change, recompute SRC values. */ | |
5579 | if (src != sets[i].src) | |
278a83b2 | 5580 | { |
4eadede7 | 5581 | cse_altered = 1; |
278a83b2 KH |
5582 | do_not_record = 0; |
5583 | hash_arg_in_memory = 0; | |
7afe21cc | 5584 | sets[i].src = src; |
278a83b2 KH |
5585 | sets[i].src_hash = HASH (src, mode); |
5586 | sets[i].src_volatile = do_not_record; | |
5587 | sets[i].src_in_memory = hash_arg_in_memory; | |
5588 | sets[i].src_elt = lookup (src, sets[i].src_hash, mode); | |
5589 | } | |
7afe21cc RK |
5590 | |
5591 | /* If this is a single SET, we are setting a register, and we have an | |
5592 | equivalent constant, we want to add a REG_NOTE. We don't want | |
5593 | to write a REG_EQUAL note for a constant pseudo since verifying that | |
d45cf215 | 5594 | that pseudo hasn't been eliminated is a pain. Such a note also |
278a83b2 | 5595 | won't help anything. |
ac7ef8d5 FS |
5596 | |
5597 | Avoid a REG_EQUAL note for (CONST (MINUS (LABEL_REF) (LABEL_REF))) | |
5598 | which can be created for a reference to a compile time computable | |
5599 | entry in a jump table. */ | |
5600 | ||
f8cfc6aa JQ |
5601 | if (n_sets == 1 && src_const && REG_P (dest) |
5602 | && !REG_P (src_const) | |
ac7ef8d5 FS |
5603 | && ! (GET_CODE (src_const) == CONST |
5604 | && GET_CODE (XEXP (src_const, 0)) == MINUS | |
5605 | && GET_CODE (XEXP (XEXP (src_const, 0), 0)) == LABEL_REF | |
5606 | && GET_CODE (XEXP (XEXP (src_const, 0), 1)) == LABEL_REF)) | |
7afe21cc | 5607 | { |
a77b7e32 RS |
5608 | /* We only want a REG_EQUAL note if src_const != src. */ |
5609 | if (! rtx_equal_p (src, src_const)) | |
5610 | { | |
5611 | /* Make sure that the rtx is not shared. */ | |
5612 | src_const = copy_rtx (src_const); | |
51e2a951 | 5613 | |
a77b7e32 RS |
5614 | /* Record the actual constant value in a REG_EQUAL note, |
5615 | making a new one if one does not already exist. */ | |
5616 | set_unique_reg_note (insn, REG_EQUAL, src_const); | |
5617 | } | |
7afe21cc RK |
5618 | } |
5619 | ||
5620 | /* Now deal with the destination. */ | |
5621 | do_not_record = 0; | |
7afe21cc | 5622 | |
46d096a3 SB |
5623 | /* Look within any ZERO_EXTRACT to the MEM or REG within it. */ |
5624 | while (GET_CODE (dest) == SUBREG | |
7afe21cc | 5625 | || GET_CODE (dest) == ZERO_EXTRACT |
7afe21cc | 5626 | || GET_CODE (dest) == STRICT_LOW_PART) |
0339ce7e | 5627 | dest = XEXP (dest, 0); |
7afe21cc RK |
5628 | |
5629 | sets[i].inner_dest = dest; | |
5630 | ||
3c0cb5de | 5631 | if (MEM_P (dest)) |
7afe21cc | 5632 | { |
9ae8ffe7 JL |
5633 | #ifdef PUSH_ROUNDING |
5634 | /* Stack pushes invalidate the stack pointer. */ | |
5635 | rtx addr = XEXP (dest, 0); | |
ec8e098d | 5636 | if (GET_RTX_CLASS (GET_CODE (addr)) == RTX_AUTOINC |
9ae8ffe7 JL |
5637 | && XEXP (addr, 0) == stack_pointer_rtx) |
5638 | invalidate (stack_pointer_rtx, Pmode); | |
5639 | #endif | |
7afe21cc | 5640 | dest = fold_rtx (dest, insn); |
7afe21cc RK |
5641 | } |
5642 | ||
5643 | /* Compute the hash code of the destination now, | |
5644 | before the effects of this instruction are recorded, | |
5645 | since the register values used in the address computation | |
5646 | are those before this instruction. */ | |
2197a88a | 5647 | sets[i].dest_hash = HASH (dest, mode); |
7afe21cc RK |
5648 | |
5649 | /* Don't enter a bit-field in the hash table | |
5650 | because the value in it after the store | |
5651 | may not equal what was stored, due to truncation. */ | |
5652 | ||
46d096a3 | 5653 | if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT) |
7afe21cc RK |
5654 | { |
5655 | rtx width = XEXP (SET_DEST (sets[i].rtl), 1); | |
5656 | ||
5657 | if (src_const != 0 && GET_CODE (src_const) == CONST_INT | |
5658 | && GET_CODE (width) == CONST_INT | |
906c4e36 RK |
5659 | && INTVAL (width) < HOST_BITS_PER_WIDE_INT |
5660 | && ! (INTVAL (src_const) | |
5661 | & ((HOST_WIDE_INT) (-1) << INTVAL (width)))) | |
7afe21cc RK |
5662 | /* Exception: if the value is constant, |
5663 | and it won't be truncated, record it. */ | |
5664 | ; | |
5665 | else | |
5666 | { | |
5667 | /* This is chosen so that the destination will be invalidated | |
5668 | but no new value will be recorded. | |
5669 | We must invalidate because sometimes constant | |
5670 | values can be recorded for bitfields. */ | |
5671 | sets[i].src_elt = 0; | |
5672 | sets[i].src_volatile = 1; | |
5673 | src_eqv = 0; | |
5674 | src_eqv_elt = 0; | |
5675 | } | |
5676 | } | |
5677 | ||
5678 | /* If only one set in a JUMP_INSN and it is now a no-op, we can delete | |
5679 | the insn. */ | |
5680 | else if (n_sets == 1 && dest == pc_rtx && src == pc_rtx) | |
5681 | { | |
ef178af3 | 5682 | /* One less use of the label this insn used to jump to. */ |
49ce134f | 5683 | delete_insn (insn); |
7afe21cc | 5684 | cse_jumps_altered = 1; |
7afe21cc RK |
5685 | /* No more processing for this set. */ |
5686 | sets[i].rtl = 0; | |
5687 | } | |
5688 | ||
5689 | /* If this SET is now setting PC to a label, we know it used to | |
d466c016 | 5690 | be a conditional or computed branch. */ |
8f235343 JH |
5691 | else if (dest == pc_rtx && GET_CODE (src) == LABEL_REF |
5692 | && !LABEL_REF_NONLOCAL_P (src)) | |
7afe21cc | 5693 | { |
8fb1e50e GS |
5694 | /* Now emit a BARRIER after the unconditional jump. */ |
5695 | if (NEXT_INSN (insn) == 0 | |
4b4bf941 | 5696 | || !BARRIER_P (NEXT_INSN (insn))) |
8fb1e50e GS |
5697 | emit_barrier_after (insn); |
5698 | ||
d466c016 JL |
5699 | /* We reemit the jump in as many cases as possible just in |
5700 | case the form of an unconditional jump is significantly | |
5701 | different than a computed jump or conditional jump. | |
5702 | ||
5703 | If this insn has multiple sets, then reemitting the | |
5704 | jump is nontrivial. So instead we just force rerecognition | |
5705 | and hope for the best. */ | |
5706 | if (n_sets == 1) | |
7afe21cc | 5707 | { |
9dcb4381 | 5708 | rtx new, note; |
8fb1e50e | 5709 | |
9dcb4381 | 5710 | new = emit_jump_insn_after (gen_jump (XEXP (src, 0)), insn); |
7afe21cc RK |
5711 | JUMP_LABEL (new) = XEXP (src, 0); |
5712 | LABEL_NUSES (XEXP (src, 0))++; | |
9dcb4381 RH |
5713 | |
5714 | /* Make sure to copy over REG_NON_LOCAL_GOTO. */ | |
5715 | note = find_reg_note (insn, REG_NON_LOCAL_GOTO, 0); | |
5716 | if (note) | |
5717 | { | |
5718 | XEXP (note, 1) = NULL_RTX; | |
5719 | REG_NOTES (new) = note; | |
5720 | } | |
5721 | ||
38c1593d | 5722 | delete_insn (insn); |
7afe21cc | 5723 | insn = new; |
8fb1e50e GS |
5724 | |
5725 | /* Now emit a BARRIER after the unconditional jump. */ | |
5726 | if (NEXT_INSN (insn) == 0 | |
4b4bf941 | 5727 | || !BARRIER_P (NEXT_INSN (insn))) |
8fb1e50e | 5728 | emit_barrier_after (insn); |
7afe21cc | 5729 | } |
31dcf83f | 5730 | else |
31dcf83f | 5731 | INSN_CODE (insn) = -1; |
7afe21cc | 5732 | |
8fb1e50e GS |
5733 | /* Do not bother deleting any unreachable code, |
5734 | let jump/flow do that. */ | |
7afe21cc RK |
5735 | |
5736 | cse_jumps_altered = 1; | |
5737 | sets[i].rtl = 0; | |
5738 | } | |
5739 | ||
c2a47e48 RK |
5740 | /* If destination is volatile, invalidate it and then do no further |
5741 | processing for this assignment. */ | |
7afe21cc RK |
5742 | |
5743 | else if (do_not_record) | |
c2a47e48 | 5744 | { |
f8cfc6aa | 5745 | if (REG_P (dest) || GET_CODE (dest) == SUBREG) |
bb4034b3 | 5746 | invalidate (dest, VOIDmode); |
3c0cb5de | 5747 | else if (MEM_P (dest)) |
32fab725 | 5748 | invalidate (dest, VOIDmode); |
2708da92 RS |
5749 | else if (GET_CODE (dest) == STRICT_LOW_PART |
5750 | || GET_CODE (dest) == ZERO_EXTRACT) | |
bb4034b3 | 5751 | invalidate (XEXP (dest, 0), GET_MODE (dest)); |
c2a47e48 RK |
5752 | sets[i].rtl = 0; |
5753 | } | |
7afe21cc RK |
5754 | |
5755 | if (sets[i].rtl != 0 && dest != SET_DEST (sets[i].rtl)) | |
2197a88a | 5756 | sets[i].dest_hash = HASH (SET_DEST (sets[i].rtl), mode); |
7afe21cc RK |
5757 | |
5758 | #ifdef HAVE_cc0 | |
5759 | /* If setting CC0, record what it was set to, or a constant, if it | |
5760 | is equivalent to a constant. If it is being set to a floating-point | |
5761 | value, make a COMPARE with the appropriate constant of 0. If we | |
5762 | don't do this, later code can interpret this as a test against | |
5763 | const0_rtx, which can cause problems if we try to put it into an | |
5764 | insn as a floating-point operand. */ | |
5765 | if (dest == cc0_rtx) | |
5766 | { | |
5767 | this_insn_cc0 = src_const && mode != VOIDmode ? src_const : src; | |
5768 | this_insn_cc0_mode = mode; | |
cbf6a543 | 5769 | if (FLOAT_MODE_P (mode)) |
38a448ca RH |
5770 | this_insn_cc0 = gen_rtx_COMPARE (VOIDmode, this_insn_cc0, |
5771 | CONST0_RTX (mode)); | |
7afe21cc RK |
5772 | } |
5773 | #endif | |
5774 | } | |
5775 | ||
5776 | /* Now enter all non-volatile source expressions in the hash table | |
5777 | if they are not already present. | |
5778 | Record their equivalence classes in src_elt. | |
5779 | This way we can insert the corresponding destinations into | |
5780 | the same classes even if the actual sources are no longer in them | |
5781 | (having been invalidated). */ | |
5782 | ||
5783 | if (src_eqv && src_eqv_elt == 0 && sets[0].rtl != 0 && ! src_eqv_volatile | |
5784 | && ! rtx_equal_p (src_eqv, SET_DEST (sets[0].rtl))) | |
5785 | { | |
b3694847 SS |
5786 | struct table_elt *elt; |
5787 | struct table_elt *classp = sets[0].src_elt; | |
7afe21cc RK |
5788 | rtx dest = SET_DEST (sets[0].rtl); |
5789 | enum machine_mode eqvmode = GET_MODE (dest); | |
5790 | ||
5791 | if (GET_CODE (dest) == STRICT_LOW_PART) | |
5792 | { | |
5793 | eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0))); | |
5794 | classp = 0; | |
5795 | } | |
5796 | if (insert_regs (src_eqv, classp, 0)) | |
8ae2b8f6 JW |
5797 | { |
5798 | rehash_using_reg (src_eqv); | |
5799 | src_eqv_hash = HASH (src_eqv, eqvmode); | |
5800 | } | |
2197a88a | 5801 | elt = insert (src_eqv, classp, src_eqv_hash, eqvmode); |
7afe21cc | 5802 | elt->in_memory = src_eqv_in_memory; |
7afe21cc | 5803 | src_eqv_elt = elt; |
f7911249 JW |
5804 | |
5805 | /* Check to see if src_eqv_elt is the same as a set source which | |
5806 | does not yet have an elt, and if so set the elt of the set source | |
5807 | to src_eqv_elt. */ | |
5808 | for (i = 0; i < n_sets; i++) | |
26132f71 JW |
5809 | if (sets[i].rtl && sets[i].src_elt == 0 |
5810 | && rtx_equal_p (SET_SRC (sets[i].rtl), src_eqv)) | |
f7911249 | 5811 | sets[i].src_elt = src_eqv_elt; |
7afe21cc RK |
5812 | } |
5813 | ||
5814 | for (i = 0; i < n_sets; i++) | |
5815 | if (sets[i].rtl && ! sets[i].src_volatile | |
5816 | && ! rtx_equal_p (SET_SRC (sets[i].rtl), SET_DEST (sets[i].rtl))) | |
5817 | { | |
5818 | if (GET_CODE (SET_DEST (sets[i].rtl)) == STRICT_LOW_PART) | |
5819 | { | |
5820 | /* REG_EQUAL in setting a STRICT_LOW_PART | |
5821 | gives an equivalent for the entire destination register, | |
5822 | not just for the subreg being stored in now. | |
5823 | This is a more interesting equivalence, so we arrange later | |
5824 | to treat the entire reg as the destination. */ | |
5825 | sets[i].src_elt = src_eqv_elt; | |
2197a88a | 5826 | sets[i].src_hash = src_eqv_hash; |
7afe21cc RK |
5827 | } |
5828 | else | |
5829 | { | |
5830 | /* Insert source and constant equivalent into hash table, if not | |
5831 | already present. */ | |
b3694847 SS |
5832 | struct table_elt *classp = src_eqv_elt; |
5833 | rtx src = sets[i].src; | |
5834 | rtx dest = SET_DEST (sets[i].rtl); | |
7afe21cc RK |
5835 | enum machine_mode mode |
5836 | = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src); | |
5837 | ||
1fcc57f1 AM |
5838 | /* It's possible that we have a source value known to be |
5839 | constant but don't have a REG_EQUAL note on the insn. | |
5840 | Lack of a note will mean src_eqv_elt will be NULL. This | |
5841 | can happen where we've generated a SUBREG to access a | |
5842 | CONST_INT that is already in a register in a wider mode. | |
5843 | Ensure that the source expression is put in the proper | |
5844 | constant class. */ | |
5845 | if (!classp) | |
5846 | classp = sets[i].src_const_elt; | |
5847 | ||
26132f71 | 5848 | if (sets[i].src_elt == 0) |
7afe21cc | 5849 | { |
26132f71 JW |
5850 | /* Don't put a hard register source into the table if this is |
5851 | the last insn of a libcall. In this case, we only need | |
5852 | to put src_eqv_elt in src_elt. */ | |
db4a8254 | 5853 | if (! find_reg_note (insn, REG_RETVAL, NULL_RTX)) |
8ae2b8f6 | 5854 | { |
b3694847 | 5855 | struct table_elt *elt; |
26132f71 JW |
5856 | |
5857 | /* Note that these insert_regs calls cannot remove | |
5858 | any of the src_elt's, because they would have failed to | |
5859 | match if not still valid. */ | |
5860 | if (insert_regs (src, classp, 0)) | |
5861 | { | |
5862 | rehash_using_reg (src); | |
5863 | sets[i].src_hash = HASH (src, mode); | |
5864 | } | |
5865 | elt = insert (src, classp, sets[i].src_hash, mode); | |
5866 | elt->in_memory = sets[i].src_in_memory; | |
26132f71 | 5867 | sets[i].src_elt = classp = elt; |
8ae2b8f6 | 5868 | } |
26132f71 JW |
5869 | else |
5870 | sets[i].src_elt = classp; | |
7afe21cc | 5871 | } |
7afe21cc RK |
5872 | if (sets[i].src_const && sets[i].src_const_elt == 0 |
5873 | && src != sets[i].src_const | |
5874 | && ! rtx_equal_p (sets[i].src_const, src)) | |
5875 | sets[i].src_elt = insert (sets[i].src_const, classp, | |
2197a88a | 5876 | sets[i].src_const_hash, mode); |
7afe21cc RK |
5877 | } |
5878 | } | |
5879 | else if (sets[i].src_elt == 0) | |
5880 | /* If we did not insert the source into the hash table (e.g., it was | |
5881 | volatile), note the equivalence class for the REG_EQUAL value, if any, | |
5882 | so that the destination goes into that class. */ | |
5883 | sets[i].src_elt = src_eqv_elt; | |
5884 | ||
9ae8ffe7 | 5885 | invalidate_from_clobbers (x); |
77fa0940 | 5886 | |
278a83b2 | 5887 | /* Some registers are invalidated by subroutine calls. Memory is |
77fa0940 RK |
5888 | invalidated by non-constant calls. */ |
5889 | ||
4b4bf941 | 5890 | if (CALL_P (insn)) |
7afe21cc | 5891 | { |
24a28584 | 5892 | if (! CONST_OR_PURE_CALL_P (insn)) |
9ae8ffe7 | 5893 | invalidate_memory (); |
7afe21cc RK |
5894 | invalidate_for_call (); |
5895 | } | |
5896 | ||
5897 | /* Now invalidate everything set by this instruction. | |
5898 | If a SUBREG or other funny destination is being set, | |
5899 | sets[i].rtl is still nonzero, so here we invalidate the reg | |
5900 | a part of which is being set. */ | |
5901 | ||
5902 | for (i = 0; i < n_sets; i++) | |
5903 | if (sets[i].rtl) | |
5904 | { | |
bb4034b3 JW |
5905 | /* We can't use the inner dest, because the mode associated with |
5906 | a ZERO_EXTRACT is significant. */ | |
b3694847 | 5907 | rtx dest = SET_DEST (sets[i].rtl); |
7afe21cc RK |
5908 | |
5909 | /* Needed for registers to remove the register from its | |
5910 | previous quantity's chain. | |
5911 | Needed for memory if this is a nonvarying address, unless | |
5912 | we have just done an invalidate_memory that covers even those. */ | |
f8cfc6aa | 5913 | if (REG_P (dest) || GET_CODE (dest) == SUBREG) |
bb4034b3 | 5914 | invalidate (dest, VOIDmode); |
3c0cb5de | 5915 | else if (MEM_P (dest)) |
32fab725 | 5916 | invalidate (dest, VOIDmode); |
2708da92 RS |
5917 | else if (GET_CODE (dest) == STRICT_LOW_PART |
5918 | || GET_CODE (dest) == ZERO_EXTRACT) | |
bb4034b3 | 5919 | invalidate (XEXP (dest, 0), GET_MODE (dest)); |
7afe21cc RK |
5920 | } |
5921 | ||
01e752d3 | 5922 | /* A volatile ASM invalidates everything. */ |
4b4bf941 | 5923 | if (NONJUMP_INSN_P (insn) |
01e752d3 JL |
5924 | && GET_CODE (PATTERN (insn)) == ASM_OPERANDS |
5925 | && MEM_VOLATILE_P (PATTERN (insn))) | |
5926 | flush_hash_table (); | |
5927 | ||
7afe21cc RK |
5928 | /* Make sure registers mentioned in destinations |
5929 | are safe for use in an expression to be inserted. | |
5930 | This removes from the hash table | |
5931 | any invalid entry that refers to one of these registers. | |
5932 | ||
5933 | We don't care about the return value from mention_regs because | |
5934 | we are going to hash the SET_DEST values unconditionally. */ | |
5935 | ||
5936 | for (i = 0; i < n_sets; i++) | |
34c73909 R |
5937 | { |
5938 | if (sets[i].rtl) | |
5939 | { | |
5940 | rtx x = SET_DEST (sets[i].rtl); | |
5941 | ||
f8cfc6aa | 5942 | if (!REG_P (x)) |
34c73909 R |
5943 | mention_regs (x); |
5944 | else | |
5945 | { | |
5946 | /* We used to rely on all references to a register becoming | |
5947 | inaccessible when a register changes to a new quantity, | |
5948 | since that changes the hash code. However, that is not | |
9b1549b8 | 5949 | safe, since after HASH_SIZE new quantities we get a |
34c73909 R |
5950 | hash 'collision' of a register with its own invalid |
5951 | entries. And since SUBREGs have been changed not to | |
5952 | change their hash code with the hash code of the register, | |
5953 | it wouldn't work any longer at all. So we have to check | |
5954 | for any invalid references lying around now. | |
5955 | This code is similar to the REG case in mention_regs, | |
5956 | but it knows that reg_tick has been incremented, and | |
5957 | it leaves reg_in_table as -1 . */ | |
770ae6cc RK |
5958 | unsigned int regno = REGNO (x); |
5959 | unsigned int endregno | |
34c73909 | 5960 | = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1 |
66fd46b6 | 5961 | : hard_regno_nregs[regno][GET_MODE (x)]); |
770ae6cc | 5962 | unsigned int i; |
34c73909 R |
5963 | |
5964 | for (i = regno; i < endregno; i++) | |
5965 | { | |
30f72379 | 5966 | if (REG_IN_TABLE (i) >= 0) |
34c73909 R |
5967 | { |
5968 | remove_invalid_refs (i); | |
30f72379 | 5969 | REG_IN_TABLE (i) = -1; |
34c73909 R |
5970 | } |
5971 | } | |
5972 | } | |
5973 | } | |
5974 | } | |
7afe21cc RK |
5975 | |
5976 | /* We may have just removed some of the src_elt's from the hash table. | |
5977 | So replace each one with the current head of the same class. */ | |
5978 | ||
5979 | for (i = 0; i < n_sets; i++) | |
5980 | if (sets[i].rtl) | |
5981 | { | |
5982 | if (sets[i].src_elt && sets[i].src_elt->first_same_value == 0) | |
5983 | /* If elt was removed, find current head of same class, | |
5984 | or 0 if nothing remains of that class. */ | |
5985 | { | |
b3694847 | 5986 | struct table_elt *elt = sets[i].src_elt; |
7afe21cc RK |
5987 | |
5988 | while (elt && elt->prev_same_value) | |
5989 | elt = elt->prev_same_value; | |
5990 | ||
5991 | while (elt && elt->first_same_value == 0) | |
5992 | elt = elt->next_same_value; | |
5993 | sets[i].src_elt = elt ? elt->first_same_value : 0; | |
5994 | } | |
5995 | } | |
5996 | ||
5997 | /* Now insert the destinations into their equivalence classes. */ | |
5998 | ||
5999 | for (i = 0; i < n_sets; i++) | |
6000 | if (sets[i].rtl) | |
6001 | { | |
b3694847 | 6002 | rtx dest = SET_DEST (sets[i].rtl); |
b3694847 | 6003 | struct table_elt *elt; |
7afe21cc RK |
6004 | |
6005 | /* Don't record value if we are not supposed to risk allocating | |
6006 | floating-point values in registers that might be wider than | |
6007 | memory. */ | |
6008 | if ((flag_float_store | |
3c0cb5de | 6009 | && MEM_P (dest) |
cbf6a543 | 6010 | && FLOAT_MODE_P (GET_MODE (dest))) |
bc4ddc77 JW |
6011 | /* Don't record BLKmode values, because we don't know the |
6012 | size of it, and can't be sure that other BLKmode values | |
6013 | have the same or smaller size. */ | |
6014 | || GET_MODE (dest) == BLKmode | |
7afe21cc RK |
6015 | /* Don't record values of destinations set inside a libcall block |
6016 | since we might delete the libcall. Things should have been set | |
6017 | up so we won't want to reuse such a value, but we play it safe | |
6018 | here. */ | |
7bd8b2a8 | 6019 | || libcall_insn |
7afe21cc RK |
6020 | /* If we didn't put a REG_EQUAL value or a source into the hash |
6021 | table, there is no point is recording DEST. */ | |
1a8e9a8e RK |
6022 | || sets[i].src_elt == 0 |
6023 | /* If DEST is a paradoxical SUBREG and SRC is a ZERO_EXTEND | |
6024 | or SIGN_EXTEND, don't record DEST since it can cause | |
6025 | some tracking to be wrong. | |
6026 | ||
6027 | ??? Think about this more later. */ | |
6028 | || (GET_CODE (dest) == SUBREG | |
6029 | && (GET_MODE_SIZE (GET_MODE (dest)) | |
6030 | > GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest)))) | |
6031 | && (GET_CODE (sets[i].src) == SIGN_EXTEND | |
6032 | || GET_CODE (sets[i].src) == ZERO_EXTEND))) | |
7afe21cc RK |
6033 | continue; |
6034 | ||
6035 | /* STRICT_LOW_PART isn't part of the value BEING set, | |
6036 | and neither is the SUBREG inside it. | |
6037 | Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */ | |
6038 | if (GET_CODE (dest) == STRICT_LOW_PART) | |
6039 | dest = SUBREG_REG (XEXP (dest, 0)); | |
6040 | ||
f8cfc6aa | 6041 | if (REG_P (dest) || GET_CODE (dest) == SUBREG) |
7afe21cc RK |
6042 | /* Registers must also be inserted into chains for quantities. */ |
6043 | if (insert_regs (dest, sets[i].src_elt, 1)) | |
8ae2b8f6 JW |
6044 | { |
6045 | /* If `insert_regs' changes something, the hash code must be | |
6046 | recalculated. */ | |
6047 | rehash_using_reg (dest); | |
6048 | sets[i].dest_hash = HASH (dest, GET_MODE (dest)); | |
6049 | } | |
7afe21cc | 6050 | |
8fff4fc1 RH |
6051 | elt = insert (dest, sets[i].src_elt, |
6052 | sets[i].dest_hash, GET_MODE (dest)); | |
9de2c71a | 6053 | |
3c0cb5de | 6054 | elt->in_memory = (MEM_P (sets[i].inner_dest) |
389fdba0 | 6055 | && !MEM_READONLY_P (sets[i].inner_dest)); |
c256df0b | 6056 | |
fc3ffe83 RK |
6057 | /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no |
6058 | narrower than M2, and both M1 and M2 are the same number of words, | |
6059 | we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so | |
6060 | make that equivalence as well. | |
7afe21cc | 6061 | |
4de249d9 PB |
6062 | However, BAR may have equivalences for which gen_lowpart |
6063 | will produce a simpler value than gen_lowpart applied to | |
7afe21cc | 6064 | BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all |
278a83b2 | 6065 | BAR's equivalences. If we don't get a simplified form, make |
7afe21cc RK |
6066 | the SUBREG. It will not be used in an equivalence, but will |
6067 | cause two similar assignments to be detected. | |
6068 | ||
6069 | Note the loop below will find SUBREG_REG (DEST) since we have | |
6070 | already entered SRC and DEST of the SET in the table. */ | |
6071 | ||
6072 | if (GET_CODE (dest) == SUBREG | |
6cdbaec4 RK |
6073 | && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) - 1) |
6074 | / UNITS_PER_WORD) | |
278a83b2 | 6075 | == (GET_MODE_SIZE (GET_MODE (dest)) - 1) / UNITS_PER_WORD) |
7afe21cc RK |
6076 | && (GET_MODE_SIZE (GET_MODE (dest)) |
6077 | >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest)))) | |
6078 | && sets[i].src_elt != 0) | |
6079 | { | |
6080 | enum machine_mode new_mode = GET_MODE (SUBREG_REG (dest)); | |
6081 | struct table_elt *elt, *classp = 0; | |
6082 | ||
6083 | for (elt = sets[i].src_elt->first_same_value; elt; | |
6084 | elt = elt->next_same_value) | |
6085 | { | |
6086 | rtx new_src = 0; | |
2197a88a | 6087 | unsigned src_hash; |
7afe21cc | 6088 | struct table_elt *src_elt; |
ff27a429 | 6089 | int byte = 0; |
7afe21cc RK |
6090 | |
6091 | /* Ignore invalid entries. */ | |
f8cfc6aa | 6092 | if (!REG_P (elt->exp) |
0516f6fe | 6093 | && ! exp_equiv_p (elt->exp, elt->exp, 1, false)) |
7afe21cc RK |
6094 | continue; |
6095 | ||
9beb7d20 RH |
6096 | /* We may have already been playing subreg games. If the |
6097 | mode is already correct for the destination, use it. */ | |
6098 | if (GET_MODE (elt->exp) == new_mode) | |
6099 | new_src = elt->exp; | |
6100 | else | |
6101 | { | |
6102 | /* Calculate big endian correction for the SUBREG_BYTE. | |
6103 | We have already checked that M1 (GET_MODE (dest)) | |
6104 | is not narrower than M2 (new_mode). */ | |
6105 | if (BYTES_BIG_ENDIAN) | |
6106 | byte = (GET_MODE_SIZE (GET_MODE (dest)) | |
6107 | - GET_MODE_SIZE (new_mode)); | |
6108 | ||
6109 | new_src = simplify_gen_subreg (new_mode, elt->exp, | |
6110 | GET_MODE (dest), byte); | |
6111 | } | |
6112 | ||
ff27a429 R |
6113 | /* The call to simplify_gen_subreg fails if the value |
6114 | is VOIDmode, yet we can't do any simplification, e.g. | |
6115 | for EXPR_LISTs denoting function call results. | |
6116 | It is invalid to construct a SUBREG with a VOIDmode | |
6117 | SUBREG_REG, hence a zero new_src means we can't do | |
6118 | this substitution. */ | |
6119 | if (! new_src) | |
6120 | continue; | |
7afe21cc RK |
6121 | |
6122 | src_hash = HASH (new_src, new_mode); | |
6123 | src_elt = lookup (new_src, src_hash, new_mode); | |
6124 | ||
6125 | /* Put the new source in the hash table is if isn't | |
6126 | already. */ | |
6127 | if (src_elt == 0) | |
6128 | { | |
6129 | if (insert_regs (new_src, classp, 0)) | |
8ae2b8f6 JW |
6130 | { |
6131 | rehash_using_reg (new_src); | |
6132 | src_hash = HASH (new_src, new_mode); | |
6133 | } | |
7afe21cc RK |
6134 | src_elt = insert (new_src, classp, src_hash, new_mode); |
6135 | src_elt->in_memory = elt->in_memory; | |
7afe21cc RK |
6136 | } |
6137 | else if (classp && classp != src_elt->first_same_value) | |
278a83b2 | 6138 | /* Show that two things that we've seen before are |
7afe21cc RK |
6139 | actually the same. */ |
6140 | merge_equiv_classes (src_elt, classp); | |
6141 | ||
6142 | classp = src_elt->first_same_value; | |
da932f04 JL |
6143 | /* Ignore invalid entries. */ |
6144 | while (classp | |
f8cfc6aa | 6145 | && !REG_P (classp->exp) |
0516f6fe | 6146 | && ! exp_equiv_p (classp->exp, classp->exp, 1, false)) |
da932f04 | 6147 | classp = classp->next_same_value; |
7afe21cc RK |
6148 | } |
6149 | } | |
6150 | } | |
6151 | ||
403e25d0 RK |
6152 | /* Special handling for (set REG0 REG1) where REG0 is the |
6153 | "cheapest", cheaper than REG1. After cse, REG1 will probably not | |
6154 | be used in the sequel, so (if easily done) change this insn to | |
6155 | (set REG1 REG0) and replace REG1 with REG0 in the previous insn | |
6156 | that computed their value. Then REG1 will become a dead store | |
6157 | and won't cloud the situation for later optimizations. | |
7afe21cc RK |
6158 | |
6159 | Do not make this change if REG1 is a hard register, because it will | |
6160 | then be used in the sequel and we may be changing a two-operand insn | |
6161 | into a three-operand insn. | |
6162 | ||
50270076 R |
6163 | Also do not do this if we are operating on a copy of INSN. |
6164 | ||
6165 | Also don't do this if INSN ends a libcall; this would cause an unrelated | |
6166 | register to be set in the middle of a libcall, and we then get bad code | |
6167 | if the libcall is deleted. */ | |
7afe21cc | 6168 | |
f8cfc6aa | 6169 | if (n_sets == 1 && sets[0].rtl && REG_P (SET_DEST (sets[0].rtl)) |
7afe21cc | 6170 | && NEXT_INSN (PREV_INSN (insn)) == insn |
f8cfc6aa | 6171 | && REG_P (SET_SRC (sets[0].rtl)) |
7afe21cc | 6172 | && REGNO (SET_SRC (sets[0].rtl)) >= FIRST_PSEUDO_REGISTER |
1bb98cec | 6173 | && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets[0].rtl)))) |
7afe21cc | 6174 | { |
1bb98cec DM |
6175 | int src_q = REG_QTY (REGNO (SET_SRC (sets[0].rtl))); |
6176 | struct qty_table_elem *src_ent = &qty_table[src_q]; | |
7afe21cc | 6177 | |
1bb98cec DM |
6178 | if ((src_ent->first_reg == REGNO (SET_DEST (sets[0].rtl))) |
6179 | && ! find_reg_note (insn, REG_RETVAL, NULL_RTX)) | |
7afe21cc | 6180 | { |
3e25353e AH |
6181 | rtx prev = insn; |
6182 | /* Scan for the previous nonnote insn, but stop at a basic | |
6183 | block boundary. */ | |
6184 | do | |
6185 | { | |
6186 | prev = PREV_INSN (prev); | |
6187 | } | |
4b4bf941 | 6188 | while (prev && NOTE_P (prev) |
3e25353e | 6189 | && NOTE_LINE_NUMBER (prev) != NOTE_INSN_BASIC_BLOCK); |
7080f735 | 6190 | |
58ecb5e2 RS |
6191 | /* Do not swap the registers around if the previous instruction |
6192 | attaches a REG_EQUIV note to REG1. | |
6193 | ||
6194 | ??? It's not entirely clear whether we can transfer a REG_EQUIV | |
6195 | from the pseudo that originally shadowed an incoming argument | |
6196 | to another register. Some uses of REG_EQUIV might rely on it | |
6197 | being attached to REG1 rather than REG2. | |
6198 | ||
6199 | This section previously turned the REG_EQUIV into a REG_EQUAL | |
6200 | note. We cannot do that because REG_EQUIV may provide an | |
4912a07c | 6201 | uninitialized stack slot when REG_PARM_STACK_SPACE is used. */ |
58ecb5e2 | 6202 | |
4b4bf941 | 6203 | if (prev != 0 && NONJUMP_INSN_P (prev) |
403e25d0 | 6204 | && GET_CODE (PATTERN (prev)) == SET |
58ecb5e2 RS |
6205 | && SET_DEST (PATTERN (prev)) == SET_SRC (sets[0].rtl) |
6206 | && ! find_reg_note (prev, REG_EQUIV, NULL_RTX)) | |
1bb98cec DM |
6207 | { |
6208 | rtx dest = SET_DEST (sets[0].rtl); | |
403e25d0 | 6209 | rtx src = SET_SRC (sets[0].rtl); |
58ecb5e2 | 6210 | rtx note; |
7afe21cc | 6211 | |
278a83b2 KH |
6212 | validate_change (prev, &SET_DEST (PATTERN (prev)), dest, 1); |
6213 | validate_change (insn, &SET_DEST (sets[0].rtl), src, 1); | |
6214 | validate_change (insn, &SET_SRC (sets[0].rtl), dest, 1); | |
1bb98cec | 6215 | apply_change_group (); |
7afe21cc | 6216 | |
403e25d0 RK |
6217 | /* If INSN has a REG_EQUAL note, and this note mentions |
6218 | REG0, then we must delete it, because the value in | |
6219 | REG0 has changed. If the note's value is REG1, we must | |
6220 | also delete it because that is now this insn's dest. */ | |
1bb98cec | 6221 | note = find_reg_note (insn, REG_EQUAL, NULL_RTX); |
403e25d0 RK |
6222 | if (note != 0 |
6223 | && (reg_mentioned_p (dest, XEXP (note, 0)) | |
6224 | || rtx_equal_p (src, XEXP (note, 0)))) | |
1bb98cec DM |
6225 | remove_note (insn, note); |
6226 | } | |
7afe21cc RK |
6227 | } |
6228 | } | |
6229 | ||
6230 | /* If this is a conditional jump insn, record any known equivalences due to | |
6231 | the condition being tested. */ | |
6232 | ||
4b4bf941 | 6233 | if (JUMP_P (insn) |
7afe21cc RK |
6234 | && n_sets == 1 && GET_CODE (x) == SET |
6235 | && GET_CODE (SET_SRC (x)) == IF_THEN_ELSE) | |
6236 | record_jump_equiv (insn, 0); | |
6237 | ||
6238 | #ifdef HAVE_cc0 | |
6239 | /* If the previous insn set CC0 and this insn no longer references CC0, | |
6240 | delete the previous insn. Here we use the fact that nothing expects CC0 | |
6241 | to be valid over an insn, which is true until the final pass. */ | |
4b4bf941 | 6242 | if (prev_insn && NONJUMP_INSN_P (prev_insn) |
7afe21cc RK |
6243 | && (tem = single_set (prev_insn)) != 0 |
6244 | && SET_DEST (tem) == cc0_rtx | |
6245 | && ! reg_mentioned_p (cc0_rtx, x)) | |
6dee7384 | 6246 | delete_insn (prev_insn); |
7afe21cc RK |
6247 | |
6248 | prev_insn_cc0 = this_insn_cc0; | |
6249 | prev_insn_cc0_mode = this_insn_cc0_mode; | |
7afe21cc | 6250 | prev_insn = insn; |
4977bab6 | 6251 | #endif |
7afe21cc RK |
6252 | } |
6253 | \f | |
a4c6502a | 6254 | /* Remove from the hash table all expressions that reference memory. */ |
14a774a9 | 6255 | |
7afe21cc | 6256 | static void |
7080f735 | 6257 | invalidate_memory (void) |
7afe21cc | 6258 | { |
b3694847 SS |
6259 | int i; |
6260 | struct table_elt *p, *next; | |
7afe21cc | 6261 | |
9b1549b8 | 6262 | for (i = 0; i < HASH_SIZE; i++) |
9ae8ffe7 JL |
6263 | for (p = table[i]; p; p = next) |
6264 | { | |
6265 | next = p->next_same_hash; | |
6266 | if (p->in_memory) | |
6267 | remove_from_table (p, i); | |
6268 | } | |
6269 | } | |
6270 | ||
14a774a9 RK |
6271 | /* If ADDR is an address that implicitly affects the stack pointer, return |
6272 | 1 and update the register tables to show the effect. Else, return 0. */ | |
6273 | ||
9ae8ffe7 | 6274 | static int |
7080f735 | 6275 | addr_affects_sp_p (rtx addr) |
9ae8ffe7 | 6276 | { |
ec8e098d | 6277 | if (GET_RTX_CLASS (GET_CODE (addr)) == RTX_AUTOINC |
f8cfc6aa | 6278 | && REG_P (XEXP (addr, 0)) |
9ae8ffe7 | 6279 | && REGNO (XEXP (addr, 0)) == STACK_POINTER_REGNUM) |
7afe21cc | 6280 | { |
30f72379 | 6281 | if (REG_TICK (STACK_POINTER_REGNUM) >= 0) |
46081bb3 SH |
6282 | { |
6283 | REG_TICK (STACK_POINTER_REGNUM)++; | |
6284 | /* Is it possible to use a subreg of SP? */ | |
6285 | SUBREG_TICKED (STACK_POINTER_REGNUM) = -1; | |
6286 | } | |
9ae8ffe7 JL |
6287 | |
6288 | /* This should be *very* rare. */ | |
6289 | if (TEST_HARD_REG_BIT (hard_regs_in_table, STACK_POINTER_REGNUM)) | |
6290 | invalidate (stack_pointer_rtx, VOIDmode); | |
14a774a9 | 6291 | |
9ae8ffe7 | 6292 | return 1; |
7afe21cc | 6293 | } |
14a774a9 | 6294 | |
9ae8ffe7 | 6295 | return 0; |
7afe21cc RK |
6296 | } |
6297 | ||
6298 | /* Perform invalidation on the basis of everything about an insn | |
6299 | except for invalidating the actual places that are SET in it. | |
6300 | This includes the places CLOBBERed, and anything that might | |
6301 | alias with something that is SET or CLOBBERed. | |
6302 | ||
7afe21cc RK |
6303 | X is the pattern of the insn. */ |
6304 | ||
6305 | static void | |
7080f735 | 6306 | invalidate_from_clobbers (rtx x) |
7afe21cc | 6307 | { |
7afe21cc RK |
6308 | if (GET_CODE (x) == CLOBBER) |
6309 | { | |
6310 | rtx ref = XEXP (x, 0); | |
9ae8ffe7 JL |
6311 | if (ref) |
6312 | { | |
f8cfc6aa | 6313 | if (REG_P (ref) || GET_CODE (ref) == SUBREG |
3c0cb5de | 6314 | || MEM_P (ref)) |
9ae8ffe7 JL |
6315 | invalidate (ref, VOIDmode); |
6316 | else if (GET_CODE (ref) == STRICT_LOW_PART | |
6317 | || GET_CODE (ref) == ZERO_EXTRACT) | |
6318 | invalidate (XEXP (ref, 0), GET_MODE (ref)); | |
6319 | } | |
7afe21cc RK |
6320 | } |
6321 | else if (GET_CODE (x) == PARALLEL) | |
6322 | { | |
b3694847 | 6323 | int i; |
7afe21cc RK |
6324 | for (i = XVECLEN (x, 0) - 1; i >= 0; i--) |
6325 | { | |
b3694847 | 6326 | rtx y = XVECEXP (x, 0, i); |
7afe21cc RK |
6327 | if (GET_CODE (y) == CLOBBER) |
6328 | { | |
6329 | rtx ref = XEXP (y, 0); | |
f8cfc6aa | 6330 | if (REG_P (ref) || GET_CODE (ref) == SUBREG |
3c0cb5de | 6331 | || MEM_P (ref)) |
9ae8ffe7 JL |
6332 | invalidate (ref, VOIDmode); |
6333 | else if (GET_CODE (ref) == STRICT_LOW_PART | |
6334 | || GET_CODE (ref) == ZERO_EXTRACT) | |
6335 | invalidate (XEXP (ref, 0), GET_MODE (ref)); | |
7afe21cc RK |
6336 | } |
6337 | } | |
6338 | } | |
6339 | } | |
6340 | \f | |
6341 | /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes | |
6342 | and replace any registers in them with either an equivalent constant | |
6343 | or the canonical form of the register. If we are inside an address, | |
6344 | only do this if the address remains valid. | |
6345 | ||
6346 | OBJECT is 0 except when within a MEM in which case it is the MEM. | |
6347 | ||
6348 | Return the replacement for X. */ | |
6349 | ||
6350 | static rtx | |
7080f735 | 6351 | cse_process_notes (rtx x, rtx object) |
7afe21cc RK |
6352 | { |
6353 | enum rtx_code code = GET_CODE (x); | |
6f7d635c | 6354 | const char *fmt = GET_RTX_FORMAT (code); |
7afe21cc RK |
6355 | int i; |
6356 | ||
6357 | switch (code) | |
6358 | { | |
6359 | case CONST_INT: | |
6360 | case CONST: | |
6361 | case SYMBOL_REF: | |
6362 | case LABEL_REF: | |
6363 | case CONST_DOUBLE: | |
69ef87e2 | 6364 | case CONST_VECTOR: |
7afe21cc RK |
6365 | case PC: |
6366 | case CC0: | |
6367 | case LO_SUM: | |
6368 | return x; | |
6369 | ||
6370 | case MEM: | |
c96208fa DC |
6371 | validate_change (x, &XEXP (x, 0), |
6372 | cse_process_notes (XEXP (x, 0), x), 0); | |
7afe21cc RK |
6373 | return x; |
6374 | ||
6375 | case EXPR_LIST: | |
6376 | case INSN_LIST: | |
6377 | if (REG_NOTE_KIND (x) == REG_EQUAL) | |
906c4e36 | 6378 | XEXP (x, 0) = cse_process_notes (XEXP (x, 0), NULL_RTX); |
7afe21cc | 6379 | if (XEXP (x, 1)) |
906c4e36 | 6380 | XEXP (x, 1) = cse_process_notes (XEXP (x, 1), NULL_RTX); |
7afe21cc RK |
6381 | return x; |
6382 | ||
e4890d45 RS |
6383 | case SIGN_EXTEND: |
6384 | case ZERO_EXTEND: | |
0b0ee36c | 6385 | case SUBREG: |
e4890d45 RS |
6386 | { |
6387 | rtx new = cse_process_notes (XEXP (x, 0), object); | |
6388 | /* We don't substitute VOIDmode constants into these rtx, | |
6389 | since they would impede folding. */ | |
6390 | if (GET_MODE (new) != VOIDmode) | |
6391 | validate_change (object, &XEXP (x, 0), new, 0); | |
6392 | return x; | |
6393 | } | |
6394 | ||
7afe21cc | 6395 | case REG: |
30f72379 | 6396 | i = REG_QTY (REGNO (x)); |
7afe21cc RK |
6397 | |
6398 | /* Return a constant or a constant register. */ | |
1bb98cec | 6399 | if (REGNO_QTY_VALID_P (REGNO (x))) |
7afe21cc | 6400 | { |
1bb98cec DM |
6401 | struct qty_table_elem *ent = &qty_table[i]; |
6402 | ||
6403 | if (ent->const_rtx != NULL_RTX | |
6404 | && (CONSTANT_P (ent->const_rtx) | |
f8cfc6aa | 6405 | || REG_P (ent->const_rtx))) |
1bb98cec | 6406 | { |
4de249d9 | 6407 | rtx new = gen_lowpart (GET_MODE (x), ent->const_rtx); |
1bb98cec DM |
6408 | if (new) |
6409 | return new; | |
6410 | } | |
7afe21cc RK |
6411 | } |
6412 | ||
6413 | /* Otherwise, canonicalize this register. */ | |
906c4e36 | 6414 | return canon_reg (x, NULL_RTX); |
278a83b2 | 6415 | |
e9a25f70 JL |
6416 | default: |
6417 | break; | |
7afe21cc RK |
6418 | } |
6419 | ||
6420 | for (i = 0; i < GET_RTX_LENGTH (code); i++) | |
6421 | if (fmt[i] == 'e') | |
6422 | validate_change (object, &XEXP (x, i), | |
7fe34fdf | 6423 | cse_process_notes (XEXP (x, i), object), 0); |
7afe21cc RK |
6424 | |
6425 | return x; | |
6426 | } | |
6427 | \f | |
8b3686ed RK |
6428 | /* Process one SET of an insn that was skipped. We ignore CLOBBERs |
6429 | since they are done elsewhere. This function is called via note_stores. */ | |
6430 | ||
6431 | static void | |
7080f735 | 6432 | invalidate_skipped_set (rtx dest, rtx set, void *data ATTRIBUTE_UNUSED) |
8b3686ed | 6433 | { |
9ae8ffe7 JL |
6434 | enum rtx_code code = GET_CODE (dest); |
6435 | ||
6436 | if (code == MEM | |
ddc356e8 | 6437 | && ! addr_affects_sp_p (dest) /* If this is not a stack push ... */ |
9ae8ffe7 JL |
6438 | /* There are times when an address can appear varying and be a PLUS |
6439 | during this scan when it would be a fixed address were we to know | |
6440 | the proper equivalences. So invalidate all memory if there is | |
6441 | a BLKmode or nonscalar memory reference or a reference to a | |
6442 | variable address. */ | |
6443 | && (MEM_IN_STRUCT_P (dest) || GET_MODE (dest) == BLKmode | |
2be28ee2 | 6444 | || cse_rtx_varies_p (XEXP (dest, 0), 0))) |
9ae8ffe7 JL |
6445 | { |
6446 | invalidate_memory (); | |
6447 | return; | |
6448 | } | |
ffcf6393 | 6449 | |
f47c02fa | 6450 | if (GET_CODE (set) == CLOBBER |
8beccec8 | 6451 | || CC0_P (dest) |
f47c02fa RK |
6452 | || dest == pc_rtx) |
6453 | return; | |
6454 | ||
9ae8ffe7 | 6455 | if (code == STRICT_LOW_PART || code == ZERO_EXTRACT) |
bb4034b3 | 6456 | invalidate (XEXP (dest, 0), GET_MODE (dest)); |
9ae8ffe7 JL |
6457 | else if (code == REG || code == SUBREG || code == MEM) |
6458 | invalidate (dest, VOIDmode); | |
8b3686ed RK |
6459 | } |
6460 | ||
6461 | /* Invalidate all insns from START up to the end of the function or the | |
6462 | next label. This called when we wish to CSE around a block that is | |
6463 | conditionally executed. */ | |
6464 | ||
6465 | static void | |
7080f735 | 6466 | invalidate_skipped_block (rtx start) |
8b3686ed RK |
6467 | { |
6468 | rtx insn; | |
8b3686ed | 6469 | |
4b4bf941 | 6470 | for (insn = start; insn && !LABEL_P (insn); |
8b3686ed RK |
6471 | insn = NEXT_INSN (insn)) |
6472 | { | |
2c3c49de | 6473 | if (! INSN_P (insn)) |
8b3686ed RK |
6474 | continue; |
6475 | ||
4b4bf941 | 6476 | if (CALL_P (insn)) |
8b3686ed | 6477 | { |
24a28584 | 6478 | if (! CONST_OR_PURE_CALL_P (insn)) |
9ae8ffe7 | 6479 | invalidate_memory (); |
8b3686ed | 6480 | invalidate_for_call (); |
8b3686ed RK |
6481 | } |
6482 | ||
97577254 | 6483 | invalidate_from_clobbers (PATTERN (insn)); |
84832317 | 6484 | note_stores (PATTERN (insn), invalidate_skipped_set, NULL); |
8b3686ed RK |
6485 | } |
6486 | } | |
6487 | \f | |
7afe21cc RK |
6488 | /* Find the end of INSN's basic block and return its range, |
6489 | the total number of SETs in all the insns of the block, the last insn of the | |
6490 | block, and the branch path. | |
6491 | ||
da7d8304 | 6492 | The branch path indicates which branches should be followed. If a nonzero |
7afe21cc RK |
6493 | path size is specified, the block should be rescanned and a different set |
6494 | of branches will be taken. The branch path is only used if | |
da7d8304 | 6495 | FLAG_CSE_FOLLOW_JUMPS or FLAG_CSE_SKIP_BLOCKS is nonzero. |
7afe21cc RK |
6496 | |
6497 | DATA is a pointer to a struct cse_basic_block_data, defined below, that is | |
6498 | used to describe the block. It is filled in with the information about | |
6499 | the current block. The incoming structure's branch path, if any, is used | |
6500 | to construct the output branch path. */ | |
6501 | ||
86caf04d | 6502 | static void |
7080f735 | 6503 | cse_end_of_basic_block (rtx insn, struct cse_basic_block_data *data, |
5affca01 | 6504 | int follow_jumps, int skip_blocks) |
7afe21cc RK |
6505 | { |
6506 | rtx p = insn, q; | |
6507 | int nsets = 0; | |
6508 | int low_cuid = INSN_CUID (insn), high_cuid = INSN_CUID (insn); | |
2c3c49de | 6509 | rtx next = INSN_P (insn) ? insn : next_real_insn (insn); |
7afe21cc RK |
6510 | int path_size = data->path_size; |
6511 | int path_entry = 0; | |
6512 | int i; | |
6513 | ||
6514 | /* Update the previous branch path, if any. If the last branch was | |
6de9cd9a DN |
6515 | previously PATH_TAKEN, mark it PATH_NOT_TAKEN. |
6516 | If it was previously PATH_NOT_TAKEN, | |
7afe21cc | 6517 | shorten the path by one and look at the previous branch. We know that |
da7d8304 | 6518 | at least one branch must have been taken if PATH_SIZE is nonzero. */ |
7afe21cc RK |
6519 | while (path_size > 0) |
6520 | { | |
6de9cd9a | 6521 | if (data->path[path_size - 1].status != PATH_NOT_TAKEN) |
7afe21cc | 6522 | { |
6de9cd9a | 6523 | data->path[path_size - 1].status = PATH_NOT_TAKEN; |
7afe21cc RK |
6524 | break; |
6525 | } | |
6526 | else | |
6527 | path_size--; | |
6528 | } | |
6529 | ||
16b702cd MM |
6530 | /* If the first instruction is marked with QImode, that means we've |
6531 | already processed this block. Our caller will look at DATA->LAST | |
6532 | to figure out where to go next. We want to return the next block | |
6533 | in the instruction stream, not some branched-to block somewhere | |
6534 | else. We accomplish this by pretending our called forbid us to | |
6535 | follow jumps, or skip blocks. */ | |
6536 | if (GET_MODE (insn) == QImode) | |
6537 | follow_jumps = skip_blocks = 0; | |
6538 | ||
7afe21cc | 6539 | /* Scan to end of this basic block. */ |
4b4bf941 | 6540 | while (p && !LABEL_P (p)) |
7afe21cc | 6541 | { |
8aeea6e6 | 6542 | /* Don't cse over a call to setjmp; on some machines (eg VAX) |
7afe21cc RK |
6543 | the regs restored by the longjmp come from |
6544 | a later time than the setjmp. */ | |
4b4bf941 | 6545 | if (PREV_INSN (p) && CALL_P (PREV_INSN (p)) |
570a98eb | 6546 | && find_reg_note (PREV_INSN (p), REG_SETJMP, NULL)) |
7afe21cc RK |
6547 | break; |
6548 | ||
6549 | /* A PARALLEL can have lots of SETs in it, | |
6550 | especially if it is really an ASM_OPERANDS. */ | |
2c3c49de | 6551 | if (INSN_P (p) && GET_CODE (PATTERN (p)) == PARALLEL) |
7afe21cc | 6552 | nsets += XVECLEN (PATTERN (p), 0); |
4b4bf941 | 6553 | else if (!NOTE_P (p)) |
7afe21cc | 6554 | nsets += 1; |
278a83b2 | 6555 | |
164c8956 RK |
6556 | /* Ignore insns made by CSE; they cannot affect the boundaries of |
6557 | the basic block. */ | |
6558 | ||
6559 | if (INSN_UID (p) <= max_uid && INSN_CUID (p) > high_cuid) | |
8b3686ed | 6560 | high_cuid = INSN_CUID (p); |
164c8956 RK |
6561 | if (INSN_UID (p) <= max_uid && INSN_CUID (p) < low_cuid) |
6562 | low_cuid = INSN_CUID (p); | |
7afe21cc RK |
6563 | |
6564 | /* See if this insn is in our branch path. If it is and we are to | |
6565 | take it, do so. */ | |
6566 | if (path_entry < path_size && data->path[path_entry].branch == p) | |
6567 | { | |
6de9cd9a | 6568 | if (data->path[path_entry].status != PATH_NOT_TAKEN) |
7afe21cc | 6569 | p = JUMP_LABEL (p); |
278a83b2 | 6570 | |
7afe21cc RK |
6571 | /* Point to next entry in path, if any. */ |
6572 | path_entry++; | |
6573 | } | |
6574 | ||
6575 | /* If this is a conditional jump, we can follow it if -fcse-follow-jumps | |
6576 | was specified, we haven't reached our maximum path length, there are | |
6577 | insns following the target of the jump, this is the only use of the | |
8b3686ed RK |
6578 | jump label, and the target label is preceded by a BARRIER. |
6579 | ||
6580 | Alternatively, we can follow the jump if it branches around a | |
6581 | block of code and there are no other branches into the block. | |
6582 | In this case invalidate_skipped_block will be called to invalidate any | |
6583 | registers set in the block when following the jump. */ | |
6584 | ||
9bf8cfbf | 6585 | else if ((follow_jumps || skip_blocks) && path_size < PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH) - 1 |
4b4bf941 | 6586 | && JUMP_P (p) |
278a83b2 | 6587 | && GET_CODE (PATTERN (p)) == SET |
7afe21cc | 6588 | && GET_CODE (SET_SRC (PATTERN (p))) == IF_THEN_ELSE |
85c3ba60 | 6589 | && JUMP_LABEL (p) != 0 |
7afe21cc RK |
6590 | && LABEL_NUSES (JUMP_LABEL (p)) == 1 |
6591 | && NEXT_INSN (JUMP_LABEL (p)) != 0) | |
6592 | { | |
6593 | for (q = PREV_INSN (JUMP_LABEL (p)); q; q = PREV_INSN (q)) | |
4b4bf941 | 6594 | if ((!NOTE_P (q) |
278a83b2 | 6595 | || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END |
4b4bf941 | 6596 | || (PREV_INSN (q) && CALL_P (PREV_INSN (q)) |
570a98eb | 6597 | && find_reg_note (PREV_INSN (q), REG_SETJMP, NULL))) |
4b4bf941 | 6598 | && (!LABEL_P (q) || LABEL_NUSES (q) != 0)) |
7afe21cc RK |
6599 | break; |
6600 | ||
6601 | /* If we ran into a BARRIER, this code is an extension of the | |
6602 | basic block when the branch is taken. */ | |
4b4bf941 | 6603 | if (follow_jumps && q != 0 && BARRIER_P (q)) |
7afe21cc RK |
6604 | { |
6605 | /* Don't allow ourself to keep walking around an | |
6606 | always-executed loop. */ | |
fc3ffe83 RK |
6607 | if (next_real_insn (q) == next) |
6608 | { | |
6609 | p = NEXT_INSN (p); | |
6610 | continue; | |
6611 | } | |
7afe21cc RK |
6612 | |
6613 | /* Similarly, don't put a branch in our path more than once. */ | |
6614 | for (i = 0; i < path_entry; i++) | |
6615 | if (data->path[i].branch == p) | |
6616 | break; | |
6617 | ||
6618 | if (i != path_entry) | |
6619 | break; | |
6620 | ||
6621 | data->path[path_entry].branch = p; | |
6de9cd9a | 6622 | data->path[path_entry++].status = PATH_TAKEN; |
7afe21cc RK |
6623 | |
6624 | /* This branch now ends our path. It was possible that we | |
6625 | didn't see this branch the last time around (when the | |
6626 | insn in front of the target was a JUMP_INSN that was | |
6627 | turned into a no-op). */ | |
6628 | path_size = path_entry; | |
6629 | ||
6630 | p = JUMP_LABEL (p); | |
6631 | /* Mark block so we won't scan it again later. */ | |
6632 | PUT_MODE (NEXT_INSN (p), QImode); | |
6633 | } | |
8b3686ed | 6634 | /* Detect a branch around a block of code. */ |
4b4bf941 | 6635 | else if (skip_blocks && q != 0 && !LABEL_P (q)) |
8b3686ed | 6636 | { |
b3694847 | 6637 | rtx tmp; |
8b3686ed | 6638 | |
fc3ffe83 RK |
6639 | if (next_real_insn (q) == next) |
6640 | { | |
6641 | p = NEXT_INSN (p); | |
6642 | continue; | |
6643 | } | |
8b3686ed RK |
6644 | |
6645 | for (i = 0; i < path_entry; i++) | |
6646 | if (data->path[i].branch == p) | |
6647 | break; | |
6648 | ||
6649 | if (i != path_entry) | |
6650 | break; | |
6651 | ||
6652 | /* This is no_labels_between_p (p, q) with an added check for | |
6653 | reaching the end of a function (in case Q precedes P). */ | |
6654 | for (tmp = NEXT_INSN (p); tmp && tmp != q; tmp = NEXT_INSN (tmp)) | |
4b4bf941 | 6655 | if (LABEL_P (tmp)) |
8b3686ed | 6656 | break; |
278a83b2 | 6657 | |
8b3686ed RK |
6658 | if (tmp == q) |
6659 | { | |
6660 | data->path[path_entry].branch = p; | |
6de9cd9a | 6661 | data->path[path_entry++].status = PATH_AROUND; |
8b3686ed RK |
6662 | |
6663 | path_size = path_entry; | |
6664 | ||
6665 | p = JUMP_LABEL (p); | |
6666 | /* Mark block so we won't scan it again later. */ | |
6667 | PUT_MODE (NEXT_INSN (p), QImode); | |
6668 | } | |
6669 | } | |
7afe21cc | 6670 | } |
7afe21cc RK |
6671 | p = NEXT_INSN (p); |
6672 | } | |
6673 | ||
6674 | data->low_cuid = low_cuid; | |
6675 | data->high_cuid = high_cuid; | |
6676 | data->nsets = nsets; | |
6677 | data->last = p; | |
6678 | ||
6679 | /* If all jumps in the path are not taken, set our path length to zero | |
6680 | so a rescan won't be done. */ | |
6681 | for (i = path_size - 1; i >= 0; i--) | |
6de9cd9a | 6682 | if (data->path[i].status != PATH_NOT_TAKEN) |
7afe21cc RK |
6683 | break; |
6684 | ||
6685 | if (i == -1) | |
6686 | data->path_size = 0; | |
6687 | else | |
6688 | data->path_size = path_size; | |
6689 | ||
6690 | /* End the current branch path. */ | |
6691 | data->path[path_size].branch = 0; | |
6692 | } | |
6693 | \f | |
7afe21cc RK |
6694 | /* Perform cse on the instructions of a function. |
6695 | F is the first instruction. | |
6696 | NREGS is one plus the highest pseudo-reg number used in the instruction. | |
6697 | ||
7afe21cc RK |
6698 | Returns 1 if jump_optimize should be redone due to simplifications |
6699 | in conditional jump instructions. */ | |
6700 | ||
6701 | int | |
5affca01 | 6702 | cse_main (rtx f, int nregs, FILE *file) |
7afe21cc RK |
6703 | { |
6704 | struct cse_basic_block_data val; | |
b3694847 SS |
6705 | rtx insn = f; |
6706 | int i; | |
7afe21cc | 6707 | |
bc5e3b54 KH |
6708 | init_cse_reg_info (nregs); |
6709 | ||
9bf8cfbf ZD |
6710 | val.path = xmalloc (sizeof (struct branch_path) |
6711 | * PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH)); | |
6712 | ||
7afe21cc | 6713 | cse_jumps_altered = 0; |
a5dfb4ee | 6714 | recorded_label_ref = 0; |
7afe21cc | 6715 | constant_pool_entries_cost = 0; |
dd0ba281 | 6716 | constant_pool_entries_regcost = 0; |
7afe21cc | 6717 | val.path_size = 0; |
2f93eea8 | 6718 | rtl_hooks = cse_rtl_hooks; |
7afe21cc RK |
6719 | |
6720 | init_recog (); | |
9ae8ffe7 | 6721 | init_alias_analysis (); |
7afe21cc | 6722 | |
703ad42b | 6723 | reg_eqv_table = xmalloc (nregs * sizeof (struct reg_eqv_elem)); |
7afe21cc | 6724 | |
7afe21cc RK |
6725 | /* Find the largest uid. */ |
6726 | ||
164c8956 | 6727 | max_uid = get_max_uid (); |
703ad42b | 6728 | uid_cuid = xcalloc (max_uid + 1, sizeof (int)); |
7afe21cc RK |
6729 | |
6730 | /* Compute the mapping from uids to cuids. | |
6731 | CUIDs are numbers assigned to insns, like uids, | |
6732 | except that cuids increase monotonically through the code. | |
6733 | Don't assign cuids to line-number NOTEs, so that the distance in cuids | |
6734 | between two insns is not affected by -g. */ | |
6735 | ||
6736 | for (insn = f, i = 0; insn; insn = NEXT_INSN (insn)) | |
6737 | { | |
4b4bf941 | 6738 | if (!NOTE_P (insn) |
7afe21cc RK |
6739 | || NOTE_LINE_NUMBER (insn) < 0) |
6740 | INSN_CUID (insn) = ++i; | |
6741 | else | |
6742 | /* Give a line number note the same cuid as preceding insn. */ | |
6743 | INSN_CUID (insn) = i; | |
6744 | } | |
6745 | ||
7afe21cc RK |
6746 | /* Loop over basic blocks. |
6747 | Compute the maximum number of qty's needed for each basic block | |
6748 | (which is 2 for each SET). */ | |
6749 | insn = f; | |
6750 | while (insn) | |
6751 | { | |
4eadede7 | 6752 | cse_altered = 0; |
5affca01 | 6753 | cse_end_of_basic_block (insn, &val, flag_cse_follow_jumps, |
8b3686ed | 6754 | flag_cse_skip_blocks); |
7afe21cc RK |
6755 | |
6756 | /* If this basic block was already processed or has no sets, skip it. */ | |
6757 | if (val.nsets == 0 || GET_MODE (insn) == QImode) | |
6758 | { | |
6759 | PUT_MODE (insn, VOIDmode); | |
6760 | insn = (val.last ? NEXT_INSN (val.last) : 0); | |
6761 | val.path_size = 0; | |
6762 | continue; | |
6763 | } | |
6764 | ||
6765 | cse_basic_block_start = val.low_cuid; | |
6766 | cse_basic_block_end = val.high_cuid; | |
6767 | max_qty = val.nsets * 2; | |
278a83b2 | 6768 | |
7afe21cc | 6769 | if (file) |
ab87f8c8 | 6770 | fnotice (file, ";; Processing block from %d to %d, %d sets.\n", |
7afe21cc RK |
6771 | INSN_UID (insn), val.last ? INSN_UID (val.last) : 0, |
6772 | val.nsets); | |
6773 | ||
6774 | /* Make MAX_QTY bigger to give us room to optimize | |
6775 | past the end of this basic block, if that should prove useful. */ | |
6776 | if (max_qty < 500) | |
6777 | max_qty = 500; | |
6778 | ||
7afe21cc RK |
6779 | /* If this basic block is being extended by following certain jumps, |
6780 | (see `cse_end_of_basic_block'), we reprocess the code from the start. | |
6781 | Otherwise, we start after this basic block. */ | |
6782 | if (val.path_size > 0) | |
5affca01 | 6783 | cse_basic_block (insn, val.last, val.path); |
7afe21cc RK |
6784 | else |
6785 | { | |
6786 | int old_cse_jumps_altered = cse_jumps_altered; | |
6787 | rtx temp; | |
6788 | ||
6789 | /* When cse changes a conditional jump to an unconditional | |
6790 | jump, we want to reprocess the block, since it will give | |
6791 | us a new branch path to investigate. */ | |
6792 | cse_jumps_altered = 0; | |
5affca01 | 6793 | temp = cse_basic_block (insn, val.last, val.path); |
8b3686ed RK |
6794 | if (cse_jumps_altered == 0 |
6795 | || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0)) | |
7afe21cc RK |
6796 | insn = temp; |
6797 | ||
6798 | cse_jumps_altered |= old_cse_jumps_altered; | |
6799 | } | |
6800 | ||
1f8f4a0b | 6801 | if (cse_altered) |
1497faf6 RH |
6802 | ggc_collect (); |
6803 | ||
7afe21cc RK |
6804 | #ifdef USE_C_ALLOCA |
6805 | alloca (0); | |
6806 | #endif | |
6807 | } | |
6808 | ||
e05e2395 MM |
6809 | /* Clean up. */ |
6810 | end_alias_analysis (); | |
75c6bd46 | 6811 | free (uid_cuid); |
1bb98cec | 6812 | free (reg_eqv_table); |
9bf8cfbf | 6813 | free (val.path); |
2f93eea8 | 6814 | rtl_hooks = general_rtl_hooks; |
e05e2395 | 6815 | |
a5dfb4ee | 6816 | return cse_jumps_altered || recorded_label_ref; |
7afe21cc RK |
6817 | } |
6818 | ||
6819 | /* Process a single basic block. FROM and TO and the limits of the basic | |
6820 | block. NEXT_BRANCH points to the branch path when following jumps or | |
75473b02 | 6821 | a null path when not following jumps. */ |
7afe21cc RK |
6822 | |
6823 | static rtx | |
5affca01 | 6824 | cse_basic_block (rtx from, rtx to, struct branch_path *next_branch) |
7afe21cc | 6825 | { |
b3694847 | 6826 | rtx insn; |
7afe21cc | 6827 | int to_usage = 0; |
7bd8b2a8 | 6828 | rtx libcall_insn = NULL_RTX; |
e9a25f70 | 6829 | int num_insns = 0; |
26d107db | 6830 | int no_conflict = 0; |
7afe21cc | 6831 | |
08a69267 RS |
6832 | /* Allocate the space needed by qty_table. */ |
6833 | qty_table = xmalloc (max_qty * sizeof (struct qty_table_elem)); | |
7afe21cc RK |
6834 | |
6835 | new_basic_block (); | |
6836 | ||
6837 | /* TO might be a label. If so, protect it from being deleted. */ | |
4b4bf941 | 6838 | if (to != 0 && LABEL_P (to)) |
7afe21cc RK |
6839 | ++LABEL_NUSES (to); |
6840 | ||
6841 | for (insn = from; insn != to; insn = NEXT_INSN (insn)) | |
6842 | { | |
b3694847 | 6843 | enum rtx_code code = GET_CODE (insn); |
e9a25f70 | 6844 | |
1d22a2c1 MM |
6845 | /* If we have processed 1,000 insns, flush the hash table to |
6846 | avoid extreme quadratic behavior. We must not include NOTEs | |
c13e8210 | 6847 | in the count since there may be more of them when generating |
1d22a2c1 MM |
6848 | debugging information. If we clear the table at different |
6849 | times, code generated with -g -O might be different than code | |
6850 | generated with -O but not -g. | |
e9a25f70 JL |
6851 | |
6852 | ??? This is a real kludge and needs to be done some other way. | |
6853 | Perhaps for 2.9. */ | |
1d22a2c1 | 6854 | if (code != NOTE && num_insns++ > 1000) |
e9a25f70 | 6855 | { |
01e752d3 | 6856 | flush_hash_table (); |
e9a25f70 JL |
6857 | num_insns = 0; |
6858 | } | |
7afe21cc RK |
6859 | |
6860 | /* See if this is a branch that is part of the path. If so, and it is | |
6861 | to be taken, do so. */ | |
6862 | if (next_branch->branch == insn) | |
6863 | { | |
8b3686ed | 6864 | enum taken status = next_branch++->status; |
6de9cd9a | 6865 | if (status != PATH_NOT_TAKEN) |
7afe21cc | 6866 | { |
6de9cd9a | 6867 | if (status == PATH_TAKEN) |
8b3686ed RK |
6868 | record_jump_equiv (insn, 1); |
6869 | else | |
6870 | invalidate_skipped_block (NEXT_INSN (insn)); | |
6871 | ||
7afe21cc RK |
6872 | /* Set the last insn as the jump insn; it doesn't affect cc0. |
6873 | Then follow this branch. */ | |
6874 | #ifdef HAVE_cc0 | |
6875 | prev_insn_cc0 = 0; | |
7afe21cc | 6876 | prev_insn = insn; |
4977bab6 | 6877 | #endif |
7afe21cc RK |
6878 | insn = JUMP_LABEL (insn); |
6879 | continue; | |
6880 | } | |
6881 | } | |
278a83b2 | 6882 | |
7afe21cc RK |
6883 | if (GET_MODE (insn) == QImode) |
6884 | PUT_MODE (insn, VOIDmode); | |
6885 | ||
ec8e098d | 6886 | if (GET_RTX_CLASS (code) == RTX_INSN) |
7afe21cc | 6887 | { |
7bd8b2a8 JL |
6888 | rtx p; |
6889 | ||
7afe21cc RK |
6890 | /* Process notes first so we have all notes in canonical forms when |
6891 | looking for duplicate operations. */ | |
6892 | ||
6893 | if (REG_NOTES (insn)) | |
906c4e36 | 6894 | REG_NOTES (insn) = cse_process_notes (REG_NOTES (insn), NULL_RTX); |
7afe21cc RK |
6895 | |
6896 | /* Track when we are inside in LIBCALL block. Inside such a block, | |
6897 | we do not want to record destinations. The last insn of a | |
6898 | LIBCALL block is not considered to be part of the block, since | |
830a38ee | 6899 | its destination is the result of the block and hence should be |
7afe21cc RK |
6900 | recorded. */ |
6901 | ||
efc9bd41 RK |
6902 | if (REG_NOTES (insn) != 0) |
6903 | { | |
6904 | if ((p = find_reg_note (insn, REG_LIBCALL, NULL_RTX))) | |
6905 | libcall_insn = XEXP (p, 0); | |
6906 | else if (find_reg_note (insn, REG_RETVAL, NULL_RTX)) | |
26d107db KK |
6907 | { |
6908 | /* Keep libcall_insn for the last SET insn of a no-conflict | |
6909 | block to prevent changing the destination. */ | |
6910 | if (! no_conflict) | |
6911 | libcall_insn = 0; | |
6912 | else | |
6913 | no_conflict = -1; | |
6914 | } | |
6915 | else if (find_reg_note (insn, REG_NO_CONFLICT, NULL_RTX)) | |
6916 | no_conflict = 1; | |
efc9bd41 | 6917 | } |
7afe21cc | 6918 | |
7bd8b2a8 | 6919 | cse_insn (insn, libcall_insn); |
f85cc4cb | 6920 | |
26d107db KK |
6921 | if (no_conflict == -1) |
6922 | { | |
6923 | libcall_insn = 0; | |
6924 | no_conflict = 0; | |
6925 | } | |
6926 | ||
be8ac49a RK |
6927 | /* If we haven't already found an insn where we added a LABEL_REF, |
6928 | check this one. */ | |
4b4bf941 | 6929 | if (NONJUMP_INSN_P (insn) && ! recorded_label_ref |
be8ac49a RK |
6930 | && for_each_rtx (&PATTERN (insn), check_for_label_ref, |
6931 | (void *) insn)) | |
f85cc4cb | 6932 | recorded_label_ref = 1; |
7afe21cc RK |
6933 | } |
6934 | ||
6935 | /* If INSN is now an unconditional jump, skip to the end of our | |
6936 | basic block by pretending that we just did the last insn in the | |
6937 | basic block. If we are jumping to the end of our block, show | |
6938 | that we can have one usage of TO. */ | |
6939 | ||
7f1c097d | 6940 | if (any_uncondjump_p (insn)) |
7afe21cc RK |
6941 | { |
6942 | if (to == 0) | |
fa0933ba | 6943 | { |
08a69267 | 6944 | free (qty_table); |
fa0933ba JL |
6945 | return 0; |
6946 | } | |
7afe21cc RK |
6947 | |
6948 | if (JUMP_LABEL (insn) == to) | |
6949 | to_usage = 1; | |
6950 | ||
6a5293dc RS |
6951 | /* Maybe TO was deleted because the jump is unconditional. |
6952 | If so, there is nothing left in this basic block. */ | |
6953 | /* ??? Perhaps it would be smarter to set TO | |
278a83b2 | 6954 | to whatever follows this insn, |
6a5293dc RS |
6955 | and pretend the basic block had always ended here. */ |
6956 | if (INSN_DELETED_P (to)) | |
6957 | break; | |
6958 | ||
7afe21cc RK |
6959 | insn = PREV_INSN (to); |
6960 | } | |
6961 | ||
6962 | /* See if it is ok to keep on going past the label | |
6963 | which used to end our basic block. Remember that we incremented | |
d45cf215 | 6964 | the count of that label, so we decrement it here. If we made |
7afe21cc RK |
6965 | a jump unconditional, TO_USAGE will be one; in that case, we don't |
6966 | want to count the use in that jump. */ | |
6967 | ||
6968 | if (to != 0 && NEXT_INSN (insn) == to | |
4b4bf941 | 6969 | && LABEL_P (to) && --LABEL_NUSES (to) == to_usage) |
7afe21cc RK |
6970 | { |
6971 | struct cse_basic_block_data val; | |
146135d6 | 6972 | rtx prev; |
7afe21cc RK |
6973 | |
6974 | insn = NEXT_INSN (to); | |
6975 | ||
146135d6 RK |
6976 | /* If TO was the last insn in the function, we are done. */ |
6977 | if (insn == 0) | |
fa0933ba | 6978 | { |
08a69267 | 6979 | free (qty_table); |
fa0933ba JL |
6980 | return 0; |
6981 | } | |
7afe21cc | 6982 | |
146135d6 RK |
6983 | /* If TO was preceded by a BARRIER we are done with this block |
6984 | because it has no continuation. */ | |
6985 | prev = prev_nonnote_insn (to); | |
4b4bf941 | 6986 | if (prev && BARRIER_P (prev)) |
fa0933ba | 6987 | { |
08a69267 | 6988 | free (qty_table); |
fa0933ba JL |
6989 | return insn; |
6990 | } | |
146135d6 RK |
6991 | |
6992 | /* Find the end of the following block. Note that we won't be | |
6993 | following branches in this case. */ | |
7afe21cc RK |
6994 | to_usage = 0; |
6995 | val.path_size = 0; | |
9bf8cfbf ZD |
6996 | val.path = xmalloc (sizeof (struct branch_path) |
6997 | * PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH)); | |
5affca01 | 6998 | cse_end_of_basic_block (insn, &val, 0, 0); |
9bf8cfbf | 6999 | free (val.path); |
7afe21cc RK |
7000 | |
7001 | /* If the tables we allocated have enough space left | |
7002 | to handle all the SETs in the next basic block, | |
7003 | continue through it. Otherwise, return, | |
7004 | and that block will be scanned individually. */ | |
7005 | if (val.nsets * 2 + next_qty > max_qty) | |
7006 | break; | |
7007 | ||
7008 | cse_basic_block_start = val.low_cuid; | |
7009 | cse_basic_block_end = val.high_cuid; | |
7010 | to = val.last; | |
7011 | ||
7012 | /* Prevent TO from being deleted if it is a label. */ | |
4b4bf941 | 7013 | if (to != 0 && LABEL_P (to)) |
7afe21cc RK |
7014 | ++LABEL_NUSES (to); |
7015 | ||
7016 | /* Back up so we process the first insn in the extension. */ | |
7017 | insn = PREV_INSN (insn); | |
7018 | } | |
7019 | } | |
7020 | ||
341c100f | 7021 | gcc_assert (next_qty <= max_qty); |
7afe21cc | 7022 | |
08a69267 | 7023 | free (qty_table); |
75c6bd46 | 7024 | |
7afe21cc RK |
7025 | return to ? NEXT_INSN (to) : 0; |
7026 | } | |
7027 | \f | |
be8ac49a | 7028 | /* Called via for_each_rtx to see if an insn is using a LABEL_REF for which |
45c23566 | 7029 | there isn't a REG_LABEL note. Return one if so. DATA is the insn. */ |
be8ac49a RK |
7030 | |
7031 | static int | |
7080f735 | 7032 | check_for_label_ref (rtx *rtl, void *data) |
be8ac49a RK |
7033 | { |
7034 | rtx insn = (rtx) data; | |
7035 | ||
7036 | /* If this insn uses a LABEL_REF and there isn't a REG_LABEL note for it, | |
7037 | we must rerun jump since it needs to place the note. If this is a | |
7038 | LABEL_REF for a CODE_LABEL that isn't in the insn chain, don't do this | |
ec5c56db | 7039 | since no REG_LABEL will be added. */ |
be8ac49a | 7040 | return (GET_CODE (*rtl) == LABEL_REF |
45c23566 | 7041 | && ! LABEL_REF_NONLOCAL_P (*rtl) |
4838c5ee | 7042 | && LABEL_P (XEXP (*rtl, 0)) |
be8ac49a RK |
7043 | && INSN_UID (XEXP (*rtl, 0)) != 0 |
7044 | && ! find_reg_note (insn, REG_LABEL, XEXP (*rtl, 0))); | |
7045 | } | |
7046 | \f | |
7afe21cc RK |
7047 | /* Count the number of times registers are used (not set) in X. |
7048 | COUNTS is an array in which we accumulate the count, INCR is how much | |
9ab81df2 | 7049 | we count each register usage. */ |
7afe21cc RK |
7050 | |
7051 | static void | |
9ab81df2 | 7052 | count_reg_usage (rtx x, int *counts, int incr) |
7afe21cc | 7053 | { |
f1e7c95f | 7054 | enum rtx_code code; |
b17d5d7c | 7055 | rtx note; |
6f7d635c | 7056 | const char *fmt; |
7afe21cc RK |
7057 | int i, j; |
7058 | ||
f1e7c95f RK |
7059 | if (x == 0) |
7060 | return; | |
7061 | ||
7062 | switch (code = GET_CODE (x)) | |
7afe21cc RK |
7063 | { |
7064 | case REG: | |
9ab81df2 | 7065 | counts[REGNO (x)] += incr; |
7afe21cc RK |
7066 | return; |
7067 | ||
7068 | case PC: | |
7069 | case CC0: | |
7070 | case CONST: | |
7071 | case CONST_INT: | |
7072 | case CONST_DOUBLE: | |
69ef87e2 | 7073 | case CONST_VECTOR: |
7afe21cc RK |
7074 | case SYMBOL_REF: |
7075 | case LABEL_REF: | |
02e39abc JL |
7076 | return; |
7077 | ||
278a83b2 | 7078 | case CLOBBER: |
02e39abc JL |
7079 | /* If we are clobbering a MEM, mark any registers inside the address |
7080 | as being used. */ | |
3c0cb5de | 7081 | if (MEM_P (XEXP (x, 0))) |
9ab81df2 | 7082 | count_reg_usage (XEXP (XEXP (x, 0), 0), counts, incr); |
7afe21cc RK |
7083 | return; |
7084 | ||
7085 | case SET: | |
7086 | /* Unless we are setting a REG, count everything in SET_DEST. */ | |
f8cfc6aa | 7087 | if (!REG_P (SET_DEST (x))) |
9ab81df2 JDA |
7088 | count_reg_usage (SET_DEST (x), counts, incr); |
7089 | count_reg_usage (SET_SRC (x), counts, incr); | |
7afe21cc RK |
7090 | return; |
7091 | ||
f1e7c95f | 7092 | case CALL_INSN: |
9ab81df2 | 7093 | count_reg_usage (CALL_INSN_FUNCTION_USAGE (x), counts, incr); |
ddc356e8 | 7094 | /* Fall through. */ |
f1e7c95f | 7095 | |
7afe21cc RK |
7096 | case INSN: |
7097 | case JUMP_INSN: | |
9ab81df2 | 7098 | count_reg_usage (PATTERN (x), counts, incr); |
7afe21cc RK |
7099 | |
7100 | /* Things used in a REG_EQUAL note aren't dead since loop may try to | |
7101 | use them. */ | |
7102 | ||
b17d5d7c ZD |
7103 | note = find_reg_equal_equiv_note (x); |
7104 | if (note) | |
839844be R |
7105 | { |
7106 | rtx eqv = XEXP (note, 0); | |
7107 | ||
7108 | if (GET_CODE (eqv) == EXPR_LIST) | |
7109 | /* This REG_EQUAL note describes the result of a function call. | |
7110 | Process all the arguments. */ | |
7111 | do | |
7112 | { | |
9ab81df2 | 7113 | count_reg_usage (XEXP (eqv, 0), counts, incr); |
839844be R |
7114 | eqv = XEXP (eqv, 1); |
7115 | } | |
7116 | while (eqv && GET_CODE (eqv) == EXPR_LIST); | |
7117 | else | |
9ab81df2 | 7118 | count_reg_usage (eqv, counts, incr); |
839844be | 7119 | } |
7afe21cc RK |
7120 | return; |
7121 | ||
ee960939 OH |
7122 | case EXPR_LIST: |
7123 | if (REG_NOTE_KIND (x) == REG_EQUAL | |
7124 | || (REG_NOTE_KIND (x) != REG_NONNEG && GET_CODE (XEXP (x,0)) == USE) | |
7125 | /* FUNCTION_USAGE expression lists may include (CLOBBER (mem /u)), | |
7126 | involving registers in the address. */ | |
7127 | || GET_CODE (XEXP (x, 0)) == CLOBBER) | |
9ab81df2 | 7128 | count_reg_usage (XEXP (x, 0), counts, incr); |
ee960939 | 7129 | |
9ab81df2 | 7130 | count_reg_usage (XEXP (x, 1), counts, incr); |
ee960939 OH |
7131 | return; |
7132 | ||
a6c14a64 | 7133 | case ASM_OPERANDS: |
a6c14a64 RH |
7134 | /* Iterate over just the inputs, not the constraints as well. */ |
7135 | for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--) | |
9ab81df2 | 7136 | count_reg_usage (ASM_OPERANDS_INPUT (x, i), counts, incr); |
a6c14a64 RH |
7137 | return; |
7138 | ||
7afe21cc | 7139 | case INSN_LIST: |
341c100f | 7140 | gcc_unreachable (); |
278a83b2 | 7141 | |
e9a25f70 JL |
7142 | default: |
7143 | break; | |
7afe21cc RK |
7144 | } |
7145 | ||
7146 | fmt = GET_RTX_FORMAT (code); | |
7147 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
7148 | { | |
7149 | if (fmt[i] == 'e') | |
9ab81df2 | 7150 | count_reg_usage (XEXP (x, i), counts, incr); |
7afe21cc RK |
7151 | else if (fmt[i] == 'E') |
7152 | for (j = XVECLEN (x, i) - 1; j >= 0; j--) | |
9ab81df2 | 7153 | count_reg_usage (XVECEXP (x, i, j), counts, incr); |
7afe21cc RK |
7154 | } |
7155 | } | |
7156 | \f | |
4793dca1 JH |
7157 | /* Return true if set is live. */ |
7158 | static bool | |
7080f735 AJ |
7159 | set_live_p (rtx set, rtx insn ATTRIBUTE_UNUSED, /* Only used with HAVE_cc0. */ |
7160 | int *counts) | |
4793dca1 JH |
7161 | { |
7162 | #ifdef HAVE_cc0 | |
7163 | rtx tem; | |
7164 | #endif | |
7165 | ||
7166 | if (set_noop_p (set)) | |
7167 | ; | |
7168 | ||
7169 | #ifdef HAVE_cc0 | |
7170 | else if (GET_CODE (SET_DEST (set)) == CC0 | |
7171 | && !side_effects_p (SET_SRC (set)) | |
7172 | && ((tem = next_nonnote_insn (insn)) == 0 | |
7173 | || !INSN_P (tem) | |
7174 | || !reg_referenced_p (cc0_rtx, PATTERN (tem)))) | |
7175 | return false; | |
7176 | #endif | |
f8cfc6aa | 7177 | else if (!REG_P (SET_DEST (set)) |
4793dca1 JH |
7178 | || REGNO (SET_DEST (set)) < FIRST_PSEUDO_REGISTER |
7179 | || counts[REGNO (SET_DEST (set))] != 0 | |
8fff4fc1 | 7180 | || side_effects_p (SET_SRC (set))) |
4793dca1 JH |
7181 | return true; |
7182 | return false; | |
7183 | } | |
7184 | ||
7185 | /* Return true if insn is live. */ | |
7186 | ||
7187 | static bool | |
7080f735 | 7188 | insn_live_p (rtx insn, int *counts) |
4793dca1 JH |
7189 | { |
7190 | int i; | |
a3745024 | 7191 | if (flag_non_call_exceptions && may_trap_p (PATTERN (insn))) |
a646f6cc AH |
7192 | return true; |
7193 | else if (GET_CODE (PATTERN (insn)) == SET) | |
0021de69 | 7194 | return set_live_p (PATTERN (insn), insn, counts); |
4793dca1 | 7195 | else if (GET_CODE (PATTERN (insn)) == PARALLEL) |
0021de69 DB |
7196 | { |
7197 | for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--) | |
7198 | { | |
7199 | rtx elt = XVECEXP (PATTERN (insn), 0, i); | |
4793dca1 | 7200 | |
0021de69 DB |
7201 | if (GET_CODE (elt) == SET) |
7202 | { | |
7203 | if (set_live_p (elt, insn, counts)) | |
7204 | return true; | |
7205 | } | |
7206 | else if (GET_CODE (elt) != CLOBBER && GET_CODE (elt) != USE) | |
7207 | return true; | |
7208 | } | |
7209 | return false; | |
7210 | } | |
4793dca1 JH |
7211 | else |
7212 | return true; | |
7213 | } | |
7214 | ||
7215 | /* Return true if libcall is dead as a whole. */ | |
7216 | ||
7217 | static bool | |
7080f735 | 7218 | dead_libcall_p (rtx insn, int *counts) |
4793dca1 | 7219 | { |
0c19a26f RS |
7220 | rtx note, set, new; |
7221 | ||
4793dca1 JH |
7222 | /* See if there's a REG_EQUAL note on this insn and try to |
7223 | replace the source with the REG_EQUAL expression. | |
7224 | ||
7225 | We assume that insns with REG_RETVALs can only be reg->reg | |
7226 | copies at this point. */ | |
7227 | note = find_reg_note (insn, REG_EQUAL, NULL_RTX); | |
0c19a26f RS |
7228 | if (!note) |
7229 | return false; | |
7230 | ||
7231 | set = single_set (insn); | |
7232 | if (!set) | |
7233 | return false; | |
4793dca1 | 7234 | |
0c19a26f RS |
7235 | new = simplify_rtx (XEXP (note, 0)); |
7236 | if (!new) | |
7237 | new = XEXP (note, 0); | |
4793dca1 | 7238 | |
0c19a26f | 7239 | /* While changing insn, we must update the counts accordingly. */ |
9ab81df2 | 7240 | count_reg_usage (insn, counts, -1); |
1e150f2c | 7241 | |
0c19a26f RS |
7242 | if (validate_change (insn, &SET_SRC (set), new, 0)) |
7243 | { | |
9ab81df2 | 7244 | count_reg_usage (insn, counts, 1); |
0c19a26f RS |
7245 | remove_note (insn, find_reg_note (insn, REG_RETVAL, NULL_RTX)); |
7246 | remove_note (insn, note); | |
7247 | return true; | |
7248 | } | |
7249 | ||
7250 | if (CONSTANT_P (new)) | |
7251 | { | |
7252 | new = force_const_mem (GET_MODE (SET_DEST (set)), new); | |
7253 | if (new && validate_change (insn, &SET_SRC (set), new, 0)) | |
4793dca1 | 7254 | { |
9ab81df2 | 7255 | count_reg_usage (insn, counts, 1); |
4793dca1 | 7256 | remove_note (insn, find_reg_note (insn, REG_RETVAL, NULL_RTX)); |
1e150f2c | 7257 | remove_note (insn, note); |
4793dca1 JH |
7258 | return true; |
7259 | } | |
7260 | } | |
7080f735 | 7261 | |
9ab81df2 | 7262 | count_reg_usage (insn, counts, 1); |
4793dca1 JH |
7263 | return false; |
7264 | } | |
7265 | ||
7afe21cc RK |
7266 | /* Scan all the insns and delete any that are dead; i.e., they store a register |
7267 | that is never used or they copy a register to itself. | |
7268 | ||
c6a26dc4 JL |
7269 | This is used to remove insns made obviously dead by cse, loop or other |
7270 | optimizations. It improves the heuristics in loop since it won't try to | |
7271 | move dead invariants out of loops or make givs for dead quantities. The | |
7272 | remaining passes of the compilation are also sped up. */ | |
7afe21cc | 7273 | |
3dec4024 | 7274 | int |
7080f735 | 7275 | delete_trivially_dead_insns (rtx insns, int nreg) |
7afe21cc | 7276 | { |
4da896b2 | 7277 | int *counts; |
77fa0940 | 7278 | rtx insn, prev; |
614bb5d4 | 7279 | int in_libcall = 0, dead_libcall = 0; |
65e9fa10 | 7280 | int ndead = 0; |
7afe21cc | 7281 | |
3dec4024 | 7282 | timevar_push (TV_DELETE_TRIVIALLY_DEAD); |
7afe21cc | 7283 | /* First count the number of times each register is used. */ |
703ad42b | 7284 | counts = xcalloc (nreg, sizeof (int)); |
7afe21cc | 7285 | for (insn = next_real_insn (insns); insn; insn = next_real_insn (insn)) |
9ab81df2 | 7286 | count_reg_usage (insn, counts, 1); |
7afe21cc | 7287 | |
65e9fa10 KH |
7288 | /* Go from the last insn to the first and delete insns that only set unused |
7289 | registers or copy a register to itself. As we delete an insn, remove | |
7290 | usage counts for registers it uses. | |
0cedb36c | 7291 | |
65e9fa10 KH |
7292 | The first jump optimization pass may leave a real insn as the last |
7293 | insn in the function. We must not skip that insn or we may end | |
7294 | up deleting code that is not really dead. */ | |
7295 | insn = get_last_insn (); | |
7296 | if (! INSN_P (insn)) | |
7297 | insn = prev_real_insn (insn); | |
7afe21cc | 7298 | |
65e9fa10 KH |
7299 | for (; insn; insn = prev) |
7300 | { | |
7301 | int live_insn = 0; | |
7afe21cc | 7302 | |
65e9fa10 | 7303 | prev = prev_real_insn (insn); |
7afe21cc | 7304 | |
65e9fa10 KH |
7305 | /* Don't delete any insns that are part of a libcall block unless |
7306 | we can delete the whole libcall block. | |
7307 | ||
7308 | Flow or loop might get confused if we did that. Remember | |
7309 | that we are scanning backwards. */ | |
7310 | if (find_reg_note (insn, REG_RETVAL, NULL_RTX)) | |
7311 | { | |
7312 | in_libcall = 1; | |
7313 | live_insn = 1; | |
7314 | dead_libcall = dead_libcall_p (insn, counts); | |
7315 | } | |
7316 | else if (in_libcall) | |
7317 | live_insn = ! dead_libcall; | |
7318 | else | |
7319 | live_insn = insn_live_p (insn, counts); | |
7afe21cc | 7320 | |
65e9fa10 KH |
7321 | /* If this is a dead insn, delete it and show registers in it aren't |
7322 | being used. */ | |
7afe21cc | 7323 | |
65e9fa10 KH |
7324 | if (! live_insn) |
7325 | { | |
7326 | count_reg_usage (insn, counts, -1); | |
7327 | delete_insn_and_edges (insn); | |
7328 | ndead++; | |
7329 | } | |
e4890d45 | 7330 | |
65e9fa10 KH |
7331 | if (find_reg_note (insn, REG_LIBCALL, NULL_RTX)) |
7332 | { | |
7333 | in_libcall = 0; | |
7334 | dead_libcall = 0; | |
614bb5d4 | 7335 | } |
68252e27 | 7336 | } |
4da896b2 | 7337 | |
c263766c | 7338 | if (dump_file && ndead) |
65e9fa10 KH |
7339 | fprintf (dump_file, "Deleted %i trivially dead insns\n", |
7340 | ndead); | |
4da896b2 MM |
7341 | /* Clean up. */ |
7342 | free (counts); | |
3dec4024 JH |
7343 | timevar_pop (TV_DELETE_TRIVIALLY_DEAD); |
7344 | return ndead; | |
7afe21cc | 7345 | } |
e129d93a ILT |
7346 | |
7347 | /* This function is called via for_each_rtx. The argument, NEWREG, is | |
7348 | a condition code register with the desired mode. If we are looking | |
7349 | at the same register in a different mode, replace it with | |
7350 | NEWREG. */ | |
7351 | ||
7352 | static int | |
7353 | cse_change_cc_mode (rtx *loc, void *data) | |
7354 | { | |
fc188d37 | 7355 | struct change_cc_mode_args* args = (struct change_cc_mode_args*)data; |
e129d93a ILT |
7356 | |
7357 | if (*loc | |
f8cfc6aa | 7358 | && REG_P (*loc) |
fc188d37 AK |
7359 | && REGNO (*loc) == REGNO (args->newreg) |
7360 | && GET_MODE (*loc) != GET_MODE (args->newreg)) | |
e129d93a | 7361 | { |
fc188d37 AK |
7362 | validate_change (args->insn, loc, args->newreg, 1); |
7363 | ||
e129d93a ILT |
7364 | return -1; |
7365 | } | |
7366 | return 0; | |
7367 | } | |
7368 | ||
fc188d37 AK |
7369 | /* Change the mode of any reference to the register REGNO (NEWREG) to |
7370 | GET_MODE (NEWREG) in INSN. */ | |
7371 | ||
7372 | static void | |
7373 | cse_change_cc_mode_insn (rtx insn, rtx newreg) | |
7374 | { | |
7375 | struct change_cc_mode_args args; | |
7376 | int success; | |
7377 | ||
7378 | if (!INSN_P (insn)) | |
7379 | return; | |
7380 | ||
7381 | args.insn = insn; | |
7382 | args.newreg = newreg; | |
7383 | ||
7384 | for_each_rtx (&PATTERN (insn), cse_change_cc_mode, &args); | |
7385 | for_each_rtx (®_NOTES (insn), cse_change_cc_mode, &args); | |
7386 | ||
7387 | /* If the following assertion was triggered, there is most probably | |
7388 | something wrong with the cc_modes_compatible back end function. | |
7389 | CC modes only can be considered compatible if the insn - with the mode | |
7390 | replaced by any of the compatible modes - can still be recognized. */ | |
7391 | success = apply_change_group (); | |
7392 | gcc_assert (success); | |
7393 | } | |
7394 | ||
e129d93a ILT |
7395 | /* Change the mode of any reference to the register REGNO (NEWREG) to |
7396 | GET_MODE (NEWREG), starting at START. Stop before END. Stop at | |
2e802a6f | 7397 | any instruction which modifies NEWREG. */ |
e129d93a ILT |
7398 | |
7399 | static void | |
7400 | cse_change_cc_mode_insns (rtx start, rtx end, rtx newreg) | |
7401 | { | |
7402 | rtx insn; | |
7403 | ||
7404 | for (insn = start; insn != end; insn = NEXT_INSN (insn)) | |
7405 | { | |
7406 | if (! INSN_P (insn)) | |
7407 | continue; | |
7408 | ||
2e802a6f | 7409 | if (reg_set_p (newreg, insn)) |
e129d93a ILT |
7410 | return; |
7411 | ||
fc188d37 | 7412 | cse_change_cc_mode_insn (insn, newreg); |
e129d93a ILT |
7413 | } |
7414 | } | |
7415 | ||
7416 | /* BB is a basic block which finishes with CC_REG as a condition code | |
7417 | register which is set to CC_SRC. Look through the successors of BB | |
7418 | to find blocks which have a single predecessor (i.e., this one), | |
7419 | and look through those blocks for an assignment to CC_REG which is | |
7420 | equivalent to CC_SRC. CAN_CHANGE_MODE indicates whether we are | |
7421 | permitted to change the mode of CC_SRC to a compatible mode. This | |
7422 | returns VOIDmode if no equivalent assignments were found. | |
7423 | Otherwise it returns the mode which CC_SRC should wind up with. | |
7424 | ||
7425 | The main complexity in this function is handling the mode issues. | |
7426 | We may have more than one duplicate which we can eliminate, and we | |
7427 | try to find a mode which will work for multiple duplicates. */ | |
7428 | ||
7429 | static enum machine_mode | |
7430 | cse_cc_succs (basic_block bb, rtx cc_reg, rtx cc_src, bool can_change_mode) | |
7431 | { | |
7432 | bool found_equiv; | |
7433 | enum machine_mode mode; | |
7434 | unsigned int insn_count; | |
7435 | edge e; | |
7436 | rtx insns[2]; | |
7437 | enum machine_mode modes[2]; | |
7438 | rtx last_insns[2]; | |
7439 | unsigned int i; | |
7440 | rtx newreg; | |
628f6a4e | 7441 | edge_iterator ei; |
e129d93a ILT |
7442 | |
7443 | /* We expect to have two successors. Look at both before picking | |
7444 | the final mode for the comparison. If we have more successors | |
7445 | (i.e., some sort of table jump, although that seems unlikely), | |
7446 | then we require all beyond the first two to use the same | |
7447 | mode. */ | |
7448 | ||
7449 | found_equiv = false; | |
7450 | mode = GET_MODE (cc_src); | |
7451 | insn_count = 0; | |
628f6a4e | 7452 | FOR_EACH_EDGE (e, ei, bb->succs) |
e129d93a ILT |
7453 | { |
7454 | rtx insn; | |
7455 | rtx end; | |
7456 | ||
7457 | if (e->flags & EDGE_COMPLEX) | |
7458 | continue; | |
7459 | ||
628f6a4e | 7460 | if (EDGE_COUNT (e->dest->preds) != 1 |
e129d93a ILT |
7461 | || e->dest == EXIT_BLOCK_PTR) |
7462 | continue; | |
7463 | ||
7464 | end = NEXT_INSN (BB_END (e->dest)); | |
7465 | for (insn = BB_HEAD (e->dest); insn != end; insn = NEXT_INSN (insn)) | |
7466 | { | |
7467 | rtx set; | |
7468 | ||
7469 | if (! INSN_P (insn)) | |
7470 | continue; | |
7471 | ||
7472 | /* If CC_SRC is modified, we have to stop looking for | |
7473 | something which uses it. */ | |
7474 | if (modified_in_p (cc_src, insn)) | |
7475 | break; | |
7476 | ||
7477 | /* Check whether INSN sets CC_REG to CC_SRC. */ | |
7478 | set = single_set (insn); | |
7479 | if (set | |
f8cfc6aa | 7480 | && REG_P (SET_DEST (set)) |
e129d93a ILT |
7481 | && REGNO (SET_DEST (set)) == REGNO (cc_reg)) |
7482 | { | |
7483 | bool found; | |
7484 | enum machine_mode set_mode; | |
7485 | enum machine_mode comp_mode; | |
7486 | ||
7487 | found = false; | |
7488 | set_mode = GET_MODE (SET_SRC (set)); | |
7489 | comp_mode = set_mode; | |
7490 | if (rtx_equal_p (cc_src, SET_SRC (set))) | |
7491 | found = true; | |
7492 | else if (GET_CODE (cc_src) == COMPARE | |
7493 | && GET_CODE (SET_SRC (set)) == COMPARE | |
1f44254c | 7494 | && mode != set_mode |
e129d93a ILT |
7495 | && rtx_equal_p (XEXP (cc_src, 0), |
7496 | XEXP (SET_SRC (set), 0)) | |
7497 | && rtx_equal_p (XEXP (cc_src, 1), | |
7498 | XEXP (SET_SRC (set), 1))) | |
7499 | ||
7500 | { | |
5fd9b178 | 7501 | comp_mode = targetm.cc_modes_compatible (mode, set_mode); |
e129d93a ILT |
7502 | if (comp_mode != VOIDmode |
7503 | && (can_change_mode || comp_mode == mode)) | |
7504 | found = true; | |
7505 | } | |
7506 | ||
7507 | if (found) | |
7508 | { | |
7509 | found_equiv = true; | |
1f44254c | 7510 | if (insn_count < ARRAY_SIZE (insns)) |
e129d93a ILT |
7511 | { |
7512 | insns[insn_count] = insn; | |
7513 | modes[insn_count] = set_mode; | |
7514 | last_insns[insn_count] = end; | |
7515 | ++insn_count; | |
7516 | ||
1f44254c ILT |
7517 | if (mode != comp_mode) |
7518 | { | |
341c100f | 7519 | gcc_assert (can_change_mode); |
1f44254c | 7520 | mode = comp_mode; |
fc188d37 AK |
7521 | |
7522 | /* The modified insn will be re-recognized later. */ | |
1f44254c ILT |
7523 | PUT_MODE (cc_src, mode); |
7524 | } | |
e129d93a ILT |
7525 | } |
7526 | else | |
7527 | { | |
7528 | if (set_mode != mode) | |
1f44254c ILT |
7529 | { |
7530 | /* We found a matching expression in the | |
7531 | wrong mode, but we don't have room to | |
7532 | store it in the array. Punt. This case | |
7533 | should be rare. */ | |
7534 | break; | |
7535 | } | |
e129d93a ILT |
7536 | /* INSN sets CC_REG to a value equal to CC_SRC |
7537 | with the right mode. We can simply delete | |
7538 | it. */ | |
7539 | delete_insn (insn); | |
7540 | } | |
7541 | ||
7542 | /* We found an instruction to delete. Keep looking, | |
7543 | in the hopes of finding a three-way jump. */ | |
7544 | continue; | |
7545 | } | |
7546 | ||
7547 | /* We found an instruction which sets the condition | |
7548 | code, so don't look any farther. */ | |
7549 | break; | |
7550 | } | |
7551 | ||
7552 | /* If INSN sets CC_REG in some other way, don't look any | |
7553 | farther. */ | |
7554 | if (reg_set_p (cc_reg, insn)) | |
7555 | break; | |
7556 | } | |
7557 | ||
7558 | /* If we fell off the bottom of the block, we can keep looking | |
7559 | through successors. We pass CAN_CHANGE_MODE as false because | |
7560 | we aren't prepared to handle compatibility between the | |
7561 | further blocks and this block. */ | |
7562 | if (insn == end) | |
7563 | { | |
1f44254c ILT |
7564 | enum machine_mode submode; |
7565 | ||
7566 | submode = cse_cc_succs (e->dest, cc_reg, cc_src, false); | |
7567 | if (submode != VOIDmode) | |
7568 | { | |
341c100f | 7569 | gcc_assert (submode == mode); |
1f44254c ILT |
7570 | found_equiv = true; |
7571 | can_change_mode = false; | |
7572 | } | |
e129d93a ILT |
7573 | } |
7574 | } | |
7575 | ||
7576 | if (! found_equiv) | |
7577 | return VOIDmode; | |
7578 | ||
7579 | /* Now INSN_COUNT is the number of instructions we found which set | |
7580 | CC_REG to a value equivalent to CC_SRC. The instructions are in | |
7581 | INSNS. The modes used by those instructions are in MODES. */ | |
7582 | ||
7583 | newreg = NULL_RTX; | |
7584 | for (i = 0; i < insn_count; ++i) | |
7585 | { | |
7586 | if (modes[i] != mode) | |
7587 | { | |
7588 | /* We need to change the mode of CC_REG in INSNS[i] and | |
7589 | subsequent instructions. */ | |
7590 | if (! newreg) | |
7591 | { | |
7592 | if (GET_MODE (cc_reg) == mode) | |
7593 | newreg = cc_reg; | |
7594 | else | |
7595 | newreg = gen_rtx_REG (mode, REGNO (cc_reg)); | |
7596 | } | |
7597 | cse_change_cc_mode_insns (NEXT_INSN (insns[i]), last_insns[i], | |
7598 | newreg); | |
7599 | } | |
7600 | ||
7601 | delete_insn (insns[i]); | |
7602 | } | |
7603 | ||
7604 | return mode; | |
7605 | } | |
7606 | ||
7607 | /* If we have a fixed condition code register (or two), walk through | |
7608 | the instructions and try to eliminate duplicate assignments. */ | |
7609 | ||
7610 | void | |
7611 | cse_condition_code_reg (void) | |
7612 | { | |
7613 | unsigned int cc_regno_1; | |
7614 | unsigned int cc_regno_2; | |
7615 | rtx cc_reg_1; | |
7616 | rtx cc_reg_2; | |
7617 | basic_block bb; | |
7618 | ||
5fd9b178 | 7619 | if (! targetm.fixed_condition_code_regs (&cc_regno_1, &cc_regno_2)) |
e129d93a ILT |
7620 | return; |
7621 | ||
7622 | cc_reg_1 = gen_rtx_REG (CCmode, cc_regno_1); | |
7623 | if (cc_regno_2 != INVALID_REGNUM) | |
7624 | cc_reg_2 = gen_rtx_REG (CCmode, cc_regno_2); | |
7625 | else | |
7626 | cc_reg_2 = NULL_RTX; | |
7627 | ||
7628 | FOR_EACH_BB (bb) | |
7629 | { | |
7630 | rtx last_insn; | |
7631 | rtx cc_reg; | |
7632 | rtx insn; | |
7633 | rtx cc_src_insn; | |
7634 | rtx cc_src; | |
7635 | enum machine_mode mode; | |
1f44254c | 7636 | enum machine_mode orig_mode; |
e129d93a ILT |
7637 | |
7638 | /* Look for blocks which end with a conditional jump based on a | |
7639 | condition code register. Then look for the instruction which | |
7640 | sets the condition code register. Then look through the | |
7641 | successor blocks for instructions which set the condition | |
7642 | code register to the same value. There are other possible | |
7643 | uses of the condition code register, but these are by far the | |
7644 | most common and the ones which we are most likely to be able | |
7645 | to optimize. */ | |
7646 | ||
7647 | last_insn = BB_END (bb); | |
4b4bf941 | 7648 | if (!JUMP_P (last_insn)) |
e129d93a ILT |
7649 | continue; |
7650 | ||
7651 | if (reg_referenced_p (cc_reg_1, PATTERN (last_insn))) | |
7652 | cc_reg = cc_reg_1; | |
7653 | else if (cc_reg_2 && reg_referenced_p (cc_reg_2, PATTERN (last_insn))) | |
7654 | cc_reg = cc_reg_2; | |
7655 | else | |
7656 | continue; | |
7657 | ||
7658 | cc_src_insn = NULL_RTX; | |
7659 | cc_src = NULL_RTX; | |
7660 | for (insn = PREV_INSN (last_insn); | |
7661 | insn && insn != PREV_INSN (BB_HEAD (bb)); | |
7662 | insn = PREV_INSN (insn)) | |
7663 | { | |
7664 | rtx set; | |
7665 | ||
7666 | if (! INSN_P (insn)) | |
7667 | continue; | |
7668 | set = single_set (insn); | |
7669 | if (set | |
f8cfc6aa | 7670 | && REG_P (SET_DEST (set)) |
e129d93a ILT |
7671 | && REGNO (SET_DEST (set)) == REGNO (cc_reg)) |
7672 | { | |
7673 | cc_src_insn = insn; | |
7674 | cc_src = SET_SRC (set); | |
7675 | break; | |
7676 | } | |
7677 | else if (reg_set_p (cc_reg, insn)) | |
7678 | break; | |
7679 | } | |
7680 | ||
7681 | if (! cc_src_insn) | |
7682 | continue; | |
7683 | ||
7684 | if (modified_between_p (cc_src, cc_src_insn, NEXT_INSN (last_insn))) | |
7685 | continue; | |
7686 | ||
7687 | /* Now CC_REG is a condition code register used for a | |
7688 | conditional jump at the end of the block, and CC_SRC, in | |
7689 | CC_SRC_INSN, is the value to which that condition code | |
7690 | register is set, and CC_SRC is still meaningful at the end of | |
7691 | the basic block. */ | |
7692 | ||
1f44254c | 7693 | orig_mode = GET_MODE (cc_src); |
e129d93a | 7694 | mode = cse_cc_succs (bb, cc_reg, cc_src, true); |
1f44254c | 7695 | if (mode != VOIDmode) |
e129d93a | 7696 | { |
341c100f | 7697 | gcc_assert (mode == GET_MODE (cc_src)); |
1f44254c | 7698 | if (mode != orig_mode) |
2e802a6f KH |
7699 | { |
7700 | rtx newreg = gen_rtx_REG (mode, REGNO (cc_reg)); | |
7701 | ||
fc188d37 | 7702 | cse_change_cc_mode_insn (cc_src_insn, newreg); |
2e802a6f KH |
7703 | |
7704 | /* Do the same in the following insns that use the | |
7705 | current value of CC_REG within BB. */ | |
7706 | cse_change_cc_mode_insns (NEXT_INSN (cc_src_insn), | |
7707 | NEXT_INSN (last_insn), | |
7708 | newreg); | |
7709 | } | |
e129d93a ILT |
7710 | } |
7711 | } | |
7712 | } |