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7afe21cc | 1 | /* Common subexpression elimination for GNU compiler. |
747215f1 | 2 | Copyright (C) 1987, 88, 89, 92-7, 1998, 1999 Free Software Foundation, Inc. |
7afe21cc RK |
3 | |
4 | This file is part of GNU CC. | |
5 | ||
6 | GNU CC is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 2, or (at your option) | |
9 | any later version. | |
10 | ||
11 | GNU CC is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with GNU CC; see the file COPYING. If not, write to | |
940d9d63 RK |
18 | the Free Software Foundation, 59 Temple Place - Suite 330, |
19 | Boston, MA 02111-1307, USA. */ | |
7afe21cc RK |
20 | |
21 | ||
22 | #include "config.h" | |
670ee920 KG |
23 | /* stdio.h must precede rtl.h for FFS. */ |
24 | #include "system.h" | |
50b2596f | 25 | #include <setjmp.h> |
9c3b4c8b | 26 | |
7afe21cc | 27 | #include "rtl.h" |
6baf1cc8 | 28 | #include "tm_p.h" |
7afe21cc RK |
29 | #include "regs.h" |
30 | #include "hard-reg-set.h" | |
31 | #include "flags.h" | |
32 | #include "real.h" | |
33 | #include "insn-config.h" | |
34 | #include "recog.h" | |
49ad7cfa | 35 | #include "function.h" |
956d6950 | 36 | #include "expr.h" |
50b2596f KG |
37 | #include "toplev.h" |
38 | #include "output.h" | |
c1edba58 | 39 | #include "hashtab.h" |
1497faf6 | 40 | #include "ggc.h" |
7afe21cc RK |
41 | |
42 | /* The basic idea of common subexpression elimination is to go | |
43 | through the code, keeping a record of expressions that would | |
44 | have the same value at the current scan point, and replacing | |
45 | expressions encountered with the cheapest equivalent expression. | |
46 | ||
47 | It is too complicated to keep track of the different possibilities | |
e48a7fbe JL |
48 | when control paths merge in this code; so, at each label, we forget all |
49 | that is known and start fresh. This can be described as processing each | |
50 | extended basic block separately. We have a separate pass to perform | |
51 | global CSE. | |
52 | ||
53 | Note CSE can turn a conditional or computed jump into a nop or | |
54 | an unconditional jump. When this occurs we arrange to run the jump | |
55 | optimizer after CSE to delete the unreachable code. | |
7afe21cc RK |
56 | |
57 | We use two data structures to record the equivalent expressions: | |
58 | a hash table for most expressions, and several vectors together | |
59 | with "quantity numbers" to record equivalent (pseudo) registers. | |
60 | ||
61 | The use of the special data structure for registers is desirable | |
62 | because it is faster. It is possible because registers references | |
63 | contain a fairly small number, the register number, taken from | |
64 | a contiguously allocated series, and two register references are | |
65 | identical if they have the same number. General expressions | |
66 | do not have any such thing, so the only way to retrieve the | |
67 | information recorded on an expression other than a register | |
68 | is to keep it in a hash table. | |
69 | ||
70 | Registers and "quantity numbers": | |
71 | ||
72 | At the start of each basic block, all of the (hardware and pseudo) | |
73 | registers used in the function are given distinct quantity | |
74 | numbers to indicate their contents. During scan, when the code | |
75 | copies one register into another, we copy the quantity number. | |
76 | When a register is loaded in any other way, we allocate a new | |
77 | quantity number to describe the value generated by this operation. | |
78 | `reg_qty' records what quantity a register is currently thought | |
79 | of as containing. | |
80 | ||
81 | All real quantity numbers are greater than or equal to `max_reg'. | |
82 | If register N has not been assigned a quantity, reg_qty[N] will equal N. | |
83 | ||
84 | Quantity numbers below `max_reg' do not exist and none of the `qty_...' | |
85 | variables should be referenced with an index below `max_reg'. | |
86 | ||
87 | We also maintain a bidirectional chain of registers for each | |
88 | quantity number. `qty_first_reg', `qty_last_reg', | |
89 | `reg_next_eqv' and `reg_prev_eqv' hold these chains. | |
90 | ||
91 | The first register in a chain is the one whose lifespan is least local. | |
92 | Among equals, it is the one that was seen first. | |
93 | We replace any equivalent register with that one. | |
94 | ||
95 | If two registers have the same quantity number, it must be true that | |
96 | REG expressions with `qty_mode' must be in the hash table for both | |
97 | registers and must be in the same class. | |
98 | ||
99 | The converse is not true. Since hard registers may be referenced in | |
100 | any mode, two REG expressions might be equivalent in the hash table | |
101 | but not have the same quantity number if the quantity number of one | |
102 | of the registers is not the same mode as those expressions. | |
103 | ||
104 | Constants and quantity numbers | |
105 | ||
106 | When a quantity has a known constant value, that value is stored | |
107 | in the appropriate element of qty_const. This is in addition to | |
108 | putting the constant in the hash table as is usual for non-regs. | |
109 | ||
d45cf215 | 110 | Whether a reg or a constant is preferred is determined by the configuration |
7afe21cc RK |
111 | macro CONST_COSTS and will often depend on the constant value. In any |
112 | event, expressions containing constants can be simplified, by fold_rtx. | |
113 | ||
114 | When a quantity has a known nearly constant value (such as an address | |
115 | of a stack slot), that value is stored in the appropriate element | |
116 | of qty_const. | |
117 | ||
118 | Integer constants don't have a machine mode. However, cse | |
119 | determines the intended machine mode from the destination | |
120 | of the instruction that moves the constant. The machine mode | |
121 | is recorded in the hash table along with the actual RTL | |
122 | constant expression so that different modes are kept separate. | |
123 | ||
124 | Other expressions: | |
125 | ||
126 | To record known equivalences among expressions in general | |
127 | we use a hash table called `table'. It has a fixed number of buckets | |
128 | that contain chains of `struct table_elt' elements for expressions. | |
129 | These chains connect the elements whose expressions have the same | |
130 | hash codes. | |
131 | ||
132 | Other chains through the same elements connect the elements which | |
133 | currently have equivalent values. | |
134 | ||
135 | Register references in an expression are canonicalized before hashing | |
136 | the expression. This is done using `reg_qty' and `qty_first_reg'. | |
137 | The hash code of a register reference is computed using the quantity | |
138 | number, not the register number. | |
139 | ||
140 | When the value of an expression changes, it is necessary to remove from the | |
141 | hash table not just that expression but all expressions whose values | |
142 | could be different as a result. | |
143 | ||
144 | 1. If the value changing is in memory, except in special cases | |
145 | ANYTHING referring to memory could be changed. That is because | |
146 | nobody knows where a pointer does not point. | |
147 | The function `invalidate_memory' removes what is necessary. | |
148 | ||
149 | The special cases are when the address is constant or is | |
150 | a constant plus a fixed register such as the frame pointer | |
151 | or a static chain pointer. When such addresses are stored in, | |
152 | we can tell exactly which other such addresses must be invalidated | |
153 | due to overlap. `invalidate' does this. | |
154 | All expressions that refer to non-constant | |
155 | memory addresses are also invalidated. `invalidate_memory' does this. | |
156 | ||
157 | 2. If the value changing is a register, all expressions | |
158 | containing references to that register, and only those, | |
159 | must be removed. | |
160 | ||
161 | Because searching the entire hash table for expressions that contain | |
162 | a register is very slow, we try to figure out when it isn't necessary. | |
163 | Precisely, this is necessary only when expressions have been | |
164 | entered in the hash table using this register, and then the value has | |
165 | changed, and then another expression wants to be added to refer to | |
166 | the register's new value. This sequence of circumstances is rare | |
167 | within any one basic block. | |
168 | ||
169 | The vectors `reg_tick' and `reg_in_table' are used to detect this case. | |
170 | reg_tick[i] is incremented whenever a value is stored in register i. | |
171 | reg_in_table[i] holds -1 if no references to register i have been | |
172 | entered in the table; otherwise, it contains the value reg_tick[i] had | |
173 | when the references were entered. If we want to enter a reference | |
174 | and reg_in_table[i] != reg_tick[i], we must scan and remove old references. | |
175 | Until we want to enter a new entry, the mere fact that the two vectors | |
176 | don't match makes the entries be ignored if anyone tries to match them. | |
177 | ||
178 | Registers themselves are entered in the hash table as well as in | |
179 | the equivalent-register chains. However, the vectors `reg_tick' | |
180 | and `reg_in_table' do not apply to expressions which are simple | |
181 | register references. These expressions are removed from the table | |
182 | immediately when they become invalid, and this can be done even if | |
183 | we do not immediately search for all the expressions that refer to | |
184 | the register. | |
185 | ||
186 | A CLOBBER rtx in an instruction invalidates its operand for further | |
187 | reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK | |
188 | invalidates everything that resides in memory. | |
189 | ||
190 | Related expressions: | |
191 | ||
192 | Constant expressions that differ only by an additive integer | |
193 | are called related. When a constant expression is put in | |
194 | the table, the related expression with no constant term | |
195 | is also entered. These are made to point at each other | |
196 | so that it is possible to find out if there exists any | |
197 | register equivalent to an expression related to a given expression. */ | |
198 | ||
199 | /* One plus largest register number used in this function. */ | |
200 | ||
201 | static int max_reg; | |
202 | ||
556c714b JW |
203 | /* One plus largest instruction UID used in this function at time of |
204 | cse_main call. */ | |
205 | ||
206 | static int max_insn_uid; | |
207 | ||
7afe21cc RK |
208 | /* Length of vectors indexed by quantity number. |
209 | We know in advance we will not need a quantity number this big. */ | |
210 | ||
211 | static int max_qty; | |
212 | ||
213 | /* Next quantity number to be allocated. | |
214 | This is 1 + the largest number needed so far. */ | |
215 | ||
216 | static int next_qty; | |
217 | ||
71d306d1 | 218 | /* Indexed by quantity number, gives the first (or last) register |
7afe21cc RK |
219 | in the chain of registers that currently contain this quantity. */ |
220 | ||
221 | static int *qty_first_reg; | |
222 | static int *qty_last_reg; | |
223 | ||
224 | /* Index by quantity number, gives the mode of the quantity. */ | |
225 | ||
226 | static enum machine_mode *qty_mode; | |
227 | ||
228 | /* Indexed by quantity number, gives the rtx of the constant value of the | |
229 | quantity, or zero if it does not have a known value. | |
230 | A sum of the frame pointer (or arg pointer) plus a constant | |
231 | can also be entered here. */ | |
232 | ||
233 | static rtx *qty_const; | |
234 | ||
235 | /* Indexed by qty number, gives the insn that stored the constant value | |
236 | recorded in `qty_const'. */ | |
237 | ||
238 | static rtx *qty_const_insn; | |
239 | ||
240 | /* The next three variables are used to track when a comparison between a | |
241 | quantity and some constant or register has been passed. In that case, we | |
242 | know the results of the comparison in case we see it again. These variables | |
243 | record a comparison that is known to be true. */ | |
244 | ||
245 | /* Indexed by qty number, gives the rtx code of a comparison with a known | |
246 | result involving this quantity. If none, it is UNKNOWN. */ | |
247 | static enum rtx_code *qty_comparison_code; | |
248 | ||
249 | /* Indexed by qty number, gives the constant being compared against in a | |
250 | comparison of known result. If no such comparison, it is undefined. | |
251 | If the comparison is not with a constant, it is zero. */ | |
252 | ||
253 | static rtx *qty_comparison_const; | |
254 | ||
255 | /* Indexed by qty number, gives the quantity being compared against in a | |
256 | comparison of known result. If no such comparison, if it undefined. | |
257 | If the comparison is not with a register, it is -1. */ | |
258 | ||
259 | static int *qty_comparison_qty; | |
260 | ||
261 | #ifdef HAVE_cc0 | |
262 | /* For machines that have a CC0, we do not record its value in the hash | |
263 | table since its use is guaranteed to be the insn immediately following | |
264 | its definition and any other insn is presumed to invalidate it. | |
265 | ||
266 | Instead, we store below the value last assigned to CC0. If it should | |
267 | happen to be a constant, it is stored in preference to the actual | |
268 | assigned value. In case it is a constant, we store the mode in which | |
269 | the constant should be interpreted. */ | |
270 | ||
271 | static rtx prev_insn_cc0; | |
272 | static enum machine_mode prev_insn_cc0_mode; | |
273 | #endif | |
274 | ||
275 | /* Previous actual insn. 0 if at first insn of basic block. */ | |
276 | ||
277 | static rtx prev_insn; | |
278 | ||
279 | /* Insn being scanned. */ | |
280 | ||
281 | static rtx this_insn; | |
282 | ||
71d306d1 DE |
283 | /* Index by register number, gives the number of the next (or |
284 | previous) register in the chain of registers sharing the same | |
7afe21cc RK |
285 | value. |
286 | ||
287 | Or -1 if this register is at the end of the chain. | |
288 | ||
289 | If reg_qty[N] == N, reg_next_eqv[N] is undefined. */ | |
290 | ||
291 | static int *reg_next_eqv; | |
292 | static int *reg_prev_eqv; | |
293 | ||
14a774a9 RK |
294 | struct cse_reg_info |
295 | { | |
c1edba58 VM |
296 | /* The number of times the register has been altered in the current |
297 | basic block. */ | |
298 | int reg_tick; | |
299 | ||
300 | /* The next cse_reg_info structure in the free or used list. */ | |
14a774a9 | 301 | struct cse_reg_info *next; |
30f72379 MM |
302 | |
303 | /* The REG_TICK value at which rtx's containing this register are | |
304 | valid in the hash table. If this does not equal the current | |
305 | reg_tick value, such expressions existing in the hash table are | |
306 | invalid. */ | |
307 | int reg_in_table; | |
308 | ||
309 | /* The quantity number of the register's current contents. */ | |
310 | int reg_qty; | |
c1edba58 VM |
311 | |
312 | /* Search key */ | |
313 | int regno; | |
30f72379 | 314 | }; |
7afe21cc | 315 | |
30f72379 MM |
316 | /* A free list of cse_reg_info entries. */ |
317 | static struct cse_reg_info *cse_reg_info_free_list; | |
7afe21cc | 318 | |
c1edba58 VM |
319 | /* A used list of cse_reg_info entries. */ |
320 | static struct cse_reg_info *cse_reg_info_used_list; | |
321 | static struct cse_reg_info *cse_reg_info_used_list_end; | |
322 | ||
30f72379 | 323 | /* A mapping from registers to cse_reg_info data structures. */ |
c1edba58 | 324 | static hash_table_t cse_reg_info_tree; |
7afe21cc | 325 | |
30f72379 MM |
326 | /* The last lookup we did into the cse_reg_info_tree. This allows us |
327 | to cache repeated lookups. */ | |
328 | static int cached_regno; | |
329 | static struct cse_reg_info *cached_cse_reg_info; | |
7afe21cc RK |
330 | |
331 | /* A HARD_REG_SET containing all the hard registers for which there is | |
332 | currently a REG expression in the hash table. Note the difference | |
333 | from the above variables, which indicate if the REG is mentioned in some | |
334 | expression in the table. */ | |
335 | ||
336 | static HARD_REG_SET hard_regs_in_table; | |
337 | ||
338 | /* A HARD_REG_SET containing all the hard registers that are invalidated | |
339 | by a CALL_INSN. */ | |
340 | ||
341 | static HARD_REG_SET regs_invalidated_by_call; | |
342 | ||
7afe21cc RK |
343 | /* CUID of insn that starts the basic block currently being cse-processed. */ |
344 | ||
345 | static int cse_basic_block_start; | |
346 | ||
347 | /* CUID of insn that ends the basic block currently being cse-processed. */ | |
348 | ||
349 | static int cse_basic_block_end; | |
350 | ||
351 | /* Vector mapping INSN_UIDs to cuids. | |
d45cf215 | 352 | The cuids are like uids but increase monotonically always. |
7afe21cc RK |
353 | We use them to see whether a reg is used outside a given basic block. */ |
354 | ||
906c4e36 | 355 | static int *uid_cuid; |
7afe21cc | 356 | |
164c8956 RK |
357 | /* Highest UID in UID_CUID. */ |
358 | static int max_uid; | |
359 | ||
7afe21cc RK |
360 | /* Get the cuid of an insn. */ |
361 | ||
362 | #define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)]) | |
363 | ||
364 | /* Nonzero if cse has altered conditional jump insns | |
365 | in such a way that jump optimization should be redone. */ | |
366 | ||
367 | static int cse_jumps_altered; | |
368 | ||
a5dfb4ee RK |
369 | /* Nonzero if we put a LABEL_REF into the hash table. Since we may have put |
370 | it into an INSN without a REG_LABEL, we have to rerun jump after CSE | |
371 | to put in the note. */ | |
372 | static int recorded_label_ref; | |
373 | ||
7afe21cc RK |
374 | /* canon_hash stores 1 in do_not_record |
375 | if it notices a reference to CC0, PC, or some other volatile | |
376 | subexpression. */ | |
377 | ||
378 | static int do_not_record; | |
379 | ||
7bac1be0 RK |
380 | #ifdef LOAD_EXTEND_OP |
381 | ||
382 | /* Scratch rtl used when looking for load-extended copy of a MEM. */ | |
383 | static rtx memory_extend_rtx; | |
384 | #endif | |
385 | ||
7afe21cc RK |
386 | /* canon_hash stores 1 in hash_arg_in_memory |
387 | if it notices a reference to memory within the expression being hashed. */ | |
388 | ||
389 | static int hash_arg_in_memory; | |
390 | ||
7afe21cc RK |
391 | /* The hash table contains buckets which are chains of `struct table_elt's, |
392 | each recording one expression's information. | |
393 | That expression is in the `exp' field. | |
394 | ||
395 | Those elements with the same hash code are chained in both directions | |
396 | through the `next_same_hash' and `prev_same_hash' fields. | |
397 | ||
398 | Each set of expressions with equivalent values | |
399 | are on a two-way chain through the `next_same_value' | |
400 | and `prev_same_value' fields, and all point with | |
401 | the `first_same_value' field at the first element in | |
402 | that chain. The chain is in order of increasing cost. | |
403 | Each element's cost value is in its `cost' field. | |
404 | ||
405 | The `in_memory' field is nonzero for elements that | |
406 | involve any reference to memory. These elements are removed | |
407 | whenever a write is done to an unidentified location in memory. | |
408 | To be safe, we assume that a memory address is unidentified unless | |
409 | the address is either a symbol constant or a constant plus | |
410 | the frame pointer or argument pointer. | |
411 | ||
7afe21cc RK |
412 | The `related_value' field is used to connect related expressions |
413 | (that differ by adding an integer). | |
414 | The related expressions are chained in a circular fashion. | |
415 | `related_value' is zero for expressions for which this | |
416 | chain is not useful. | |
417 | ||
418 | The `cost' field stores the cost of this element's expression. | |
419 | ||
420 | The `is_const' flag is set if the element is a constant (including | |
421 | a fixed address). | |
422 | ||
423 | The `flag' field is used as a temporary during some search routines. | |
424 | ||
425 | The `mode' field is usually the same as GET_MODE (`exp'), but | |
426 | if `exp' is a CONST_INT and has no machine mode then the `mode' | |
427 | field is the mode it was being used as. Each constant is | |
428 | recorded separately for each mode it is used with. */ | |
429 | ||
430 | ||
431 | struct table_elt | |
432 | { | |
433 | rtx exp; | |
434 | struct table_elt *next_same_hash; | |
435 | struct table_elt *prev_same_hash; | |
436 | struct table_elt *next_same_value; | |
437 | struct table_elt *prev_same_value; | |
438 | struct table_elt *first_same_value; | |
439 | struct table_elt *related_value; | |
440 | int cost; | |
441 | enum machine_mode mode; | |
442 | char in_memory; | |
7afe21cc RK |
443 | char is_const; |
444 | char flag; | |
445 | }; | |
446 | ||
7afe21cc RK |
447 | /* We don't want a lot of buckets, because we rarely have very many |
448 | things stored in the hash table, and a lot of buckets slows | |
449 | down a lot of loops that happen frequently. */ | |
450 | #define NBUCKETS 31 | |
451 | ||
452 | /* Compute hash code of X in mode M. Special-case case where X is a pseudo | |
453 | register (hard registers may require `do_not_record' to be set). */ | |
454 | ||
455 | #define HASH(X, M) \ | |
456 | (GET_CODE (X) == REG && REGNO (X) >= FIRST_PSEUDO_REGISTER \ | |
30f72379 | 457 | ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) % NBUCKETS \ |
7afe21cc RK |
458 | : canon_hash (X, M) % NBUCKETS) |
459 | ||
460 | /* Determine whether register number N is considered a fixed register for CSE. | |
461 | It is desirable to replace other regs with fixed regs, to reduce need for | |
462 | non-fixed hard regs. | |
463 | A reg wins if it is either the frame pointer or designated as fixed, | |
464 | but not if it is an overlapping register. */ | |
465 | #ifdef OVERLAPPING_REGNO_P | |
466 | #define FIXED_REGNO_P(N) \ | |
8bc169f2 | 467 | (((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \ |
6ab832bc | 468 | || fixed_regs[N] || global_regs[N]) \ |
7afe21cc RK |
469 | && ! OVERLAPPING_REGNO_P ((N))) |
470 | #else | |
471 | #define FIXED_REGNO_P(N) \ | |
8bc169f2 | 472 | ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \ |
6ab832bc | 473 | || fixed_regs[N] || global_regs[N]) |
7afe21cc RK |
474 | #endif |
475 | ||
476 | /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed | |
ac07e066 RK |
477 | hard registers and pointers into the frame are the cheapest with a cost |
478 | of 0. Next come pseudos with a cost of one and other hard registers with | |
479 | a cost of 2. Aside from these special cases, call `rtx_cost'. */ | |
480 | ||
6ab832bc | 481 | #define CHEAP_REGNO(N) \ |
8bc169f2 DE |
482 | ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \ |
483 | || (N) == STACK_POINTER_REGNUM || (N) == ARG_POINTER_REGNUM \ | |
484 | || ((N) >= FIRST_VIRTUAL_REGISTER && (N) <= LAST_VIRTUAL_REGISTER) \ | |
485 | || ((N) < FIRST_PSEUDO_REGISTER \ | |
e7bb59fa | 486 | && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS)) |
7afe21cc | 487 | |
6ab832bc RK |
488 | /* A register is cheap if it is a user variable assigned to the register |
489 | or if its register number always corresponds to a cheap register. */ | |
490 | ||
491 | #define CHEAP_REG(N) \ | |
492 | ((REG_USERVAR_P (N) && REGNO (N) < FIRST_PSEUDO_REGISTER) \ | |
493 | || CHEAP_REGNO (REGNO (N))) | |
494 | ||
38734e55 ILT |
495 | #define COST(X) \ |
496 | (GET_CODE (X) == REG \ | |
497 | ? (CHEAP_REG (X) ? 0 \ | |
498 | : REGNO (X) >= FIRST_PSEUDO_REGISTER ? 1 \ | |
499 | : 2) \ | |
954a5693 | 500 | : notreg_cost(X)) |
7afe21cc | 501 | |
30f72379 MM |
502 | /* Get the info associated with register N. */ |
503 | ||
504 | #define GET_CSE_REG_INFO(N) \ | |
505 | (((N) == cached_regno && cached_cse_reg_info) \ | |
506 | ? cached_cse_reg_info : get_cse_reg_info ((N))) | |
507 | ||
508 | /* Get the number of times this register has been updated in this | |
509 | basic block. */ | |
510 | ||
c1edba58 | 511 | #define REG_TICK(N) ((GET_CSE_REG_INFO (N))->reg_tick) |
30f72379 MM |
512 | |
513 | /* Get the point at which REG was recorded in the table. */ | |
514 | ||
515 | #define REG_IN_TABLE(N) ((GET_CSE_REG_INFO (N))->reg_in_table) | |
516 | ||
517 | /* Get the quantity number for REG. */ | |
518 | ||
519 | #define REG_QTY(N) ((GET_CSE_REG_INFO (N))->reg_qty) | |
520 | ||
7afe21cc RK |
521 | /* Determine if the quantity number for register X represents a valid index |
522 | into the `qty_...' variables. */ | |
523 | ||
30f72379 | 524 | #define REGNO_QTY_VALID_P(N) (REG_QTY (N) != (N)) |
7afe21cc | 525 | |
2f541799 MM |
526 | #ifdef ADDRESS_COST |
527 | /* The ADDRESS_COST macro does not deal with ADDRESSOF nodes. But, | |
528 | during CSE, such nodes are present. Using an ADDRESSOF node which | |
529 | refers to the address of a REG is a good thing because we can then | |
530 | turn (MEM (ADDRESSSOF (REG))) into just plain REG. */ | |
531 | #define CSE_ADDRESS_COST(RTX) \ | |
532 | ((GET_CODE (RTX) == ADDRESSOF && REG_P (XEXP ((RTX), 0))) \ | |
533 | ? -1 : ADDRESS_COST(RTX)) | |
534 | #endif | |
535 | ||
7afe21cc RK |
536 | static struct table_elt *table[NBUCKETS]; |
537 | ||
538 | /* Chain of `struct table_elt's made so far for this function | |
539 | but currently removed from the table. */ | |
540 | ||
541 | static struct table_elt *free_element_chain; | |
542 | ||
543 | /* Number of `struct table_elt' structures made so far for this function. */ | |
544 | ||
545 | static int n_elements_made; | |
546 | ||
547 | /* Maximum value `n_elements_made' has had so far in this compilation | |
548 | for functions previously processed. */ | |
549 | ||
550 | static int max_elements_made; | |
551 | ||
552 | /* Surviving equivalence class when two equivalence classes are merged | |
553 | by recording the effects of a jump in the last insn. Zero if the | |
554 | last insn was not a conditional jump. */ | |
555 | ||
556 | static struct table_elt *last_jump_equiv_class; | |
557 | ||
558 | /* Set to the cost of a constant pool reference if one was found for a | |
559 | symbolic constant. If this was found, it means we should try to | |
560 | convert constants into constant pool entries if they don't fit in | |
561 | the insn. */ | |
562 | ||
563 | static int constant_pool_entries_cost; | |
564 | ||
6cd4575e RK |
565 | /* Define maximum length of a branch path. */ |
566 | ||
567 | #define PATHLENGTH 10 | |
568 | ||
569 | /* This data describes a block that will be processed by cse_basic_block. */ | |
570 | ||
14a774a9 RK |
571 | struct cse_basic_block_data |
572 | { | |
6cd4575e RK |
573 | /* Lowest CUID value of insns in block. */ |
574 | int low_cuid; | |
575 | /* Highest CUID value of insns in block. */ | |
576 | int high_cuid; | |
577 | /* Total number of SETs in block. */ | |
578 | int nsets; | |
579 | /* Last insn in the block. */ | |
580 | rtx last; | |
581 | /* Size of current branch path, if any. */ | |
582 | int path_size; | |
583 | /* Current branch path, indicating which branches will be taken. */ | |
14a774a9 RK |
584 | struct branch_path |
585 | { | |
586 | /* The branch insn. */ | |
587 | rtx branch; | |
588 | /* Whether it should be taken or not. AROUND is the same as taken | |
589 | except that it is used when the destination label is not preceded | |
6cd4575e | 590 | by a BARRIER. */ |
14a774a9 RK |
591 | enum taken {TAKEN, NOT_TAKEN, AROUND} status; |
592 | } path[PATHLENGTH]; | |
6cd4575e RK |
593 | }; |
594 | ||
7afe21cc RK |
595 | /* Nonzero if X has the form (PLUS frame-pointer integer). We check for |
596 | virtual regs here because the simplify_*_operation routines are called | |
0cedb36c JL |
597 | by integrate.c, which is called before virtual register instantiation. |
598 | ||
599 | ?!? FIXED_BASE_PLUS_P and NONZERO_BASE_PLUS_P need to move into | |
600 | a header file so that their definitions can be shared with the | |
601 | simplification routines in simplify-rtx.c. Until then, do not | |
602 | change these macros without also changing the copy in simplify-rtx.c. */ | |
7afe21cc RK |
603 | |
604 | #define FIXED_BASE_PLUS_P(X) \ | |
8bc169f2 | 605 | ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \ |
41babf2e | 606 | || ((X) == arg_pointer_rtx && fixed_regs[ARG_POINTER_REGNUM])\ |
7afe21cc RK |
607 | || (X) == virtual_stack_vars_rtx \ |
608 | || (X) == virtual_incoming_args_rtx \ | |
609 | || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \ | |
610 | && (XEXP (X, 0) == frame_pointer_rtx \ | |
8bc169f2 | 611 | || XEXP (X, 0) == hard_frame_pointer_rtx \ |
41babf2e JL |
612 | || ((X) == arg_pointer_rtx \ |
613 | && fixed_regs[ARG_POINTER_REGNUM]) \ | |
7afe21cc | 614 | || XEXP (X, 0) == virtual_stack_vars_rtx \ |
e9a25f70 JL |
615 | || XEXP (X, 0) == virtual_incoming_args_rtx)) \ |
616 | || GET_CODE (X) == ADDRESSOF) | |
7afe21cc | 617 | |
6f90e075 JW |
618 | /* Similar, but also allows reference to the stack pointer. |
619 | ||
620 | This used to include FIXED_BASE_PLUS_P, however, we can't assume that | |
621 | arg_pointer_rtx by itself is nonzero, because on at least one machine, | |
622 | the i960, the arg pointer is zero when it is unused. */ | |
7afe21cc RK |
623 | |
624 | #define NONZERO_BASE_PLUS_P(X) \ | |
8bc169f2 | 625 | ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \ |
6f90e075 JW |
626 | || (X) == virtual_stack_vars_rtx \ |
627 | || (X) == virtual_incoming_args_rtx \ | |
628 | || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \ | |
629 | && (XEXP (X, 0) == frame_pointer_rtx \ | |
8bc169f2 | 630 | || XEXP (X, 0) == hard_frame_pointer_rtx \ |
41babf2e JL |
631 | || ((X) == arg_pointer_rtx \ |
632 | && fixed_regs[ARG_POINTER_REGNUM]) \ | |
6f90e075 JW |
633 | || XEXP (X, 0) == virtual_stack_vars_rtx \ |
634 | || XEXP (X, 0) == virtual_incoming_args_rtx)) \ | |
7afe21cc RK |
635 | || (X) == stack_pointer_rtx \ |
636 | || (X) == virtual_stack_dynamic_rtx \ | |
637 | || (X) == virtual_outgoing_args_rtx \ | |
638 | || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \ | |
639 | && (XEXP (X, 0) == stack_pointer_rtx \ | |
640 | || XEXP (X, 0) == virtual_stack_dynamic_rtx \ | |
e9a25f70 JL |
641 | || XEXP (X, 0) == virtual_outgoing_args_rtx)) \ |
642 | || GET_CODE (X) == ADDRESSOF) | |
7afe21cc | 643 | |
954a5693 | 644 | static int notreg_cost PROTO((rtx)); |
6cd4575e RK |
645 | static void new_basic_block PROTO((void)); |
646 | static void make_new_qty PROTO((int)); | |
647 | static void make_regs_eqv PROTO((int, int)); | |
648 | static void delete_reg_equiv PROTO((int)); | |
649 | static int mention_regs PROTO((rtx)); | |
650 | static int insert_regs PROTO((rtx, struct table_elt *, int)); | |
651 | static void free_element PROTO((struct table_elt *)); | |
2197a88a | 652 | static void remove_from_table PROTO((struct table_elt *, unsigned)); |
6cd4575e | 653 | static struct table_elt *get_element PROTO((void)); |
2197a88a RK |
654 | static struct table_elt *lookup PROTO((rtx, unsigned, enum machine_mode)), |
655 | *lookup_for_remove PROTO((rtx, unsigned, enum machine_mode)); | |
6cd4575e | 656 | static rtx lookup_as_function PROTO((rtx, enum rtx_code)); |
2197a88a | 657 | static struct table_elt *insert PROTO((rtx, struct table_elt *, unsigned, |
6cd4575e RK |
658 | enum machine_mode)); |
659 | static void merge_equiv_classes PROTO((struct table_elt *, | |
660 | struct table_elt *)); | |
68c1e173 | 661 | static void invalidate PROTO((rtx, enum machine_mode)); |
9ae8ffe7 | 662 | static int cse_rtx_varies_p PROTO((rtx)); |
6cd4575e | 663 | static void remove_invalid_refs PROTO((int)); |
34c73909 | 664 | static void remove_invalid_subreg_refs PROTO((int, int, enum machine_mode)); |
6cd4575e | 665 | static void rehash_using_reg PROTO((rtx)); |
9ae8ffe7 | 666 | static void invalidate_memory PROTO((void)); |
6cd4575e RK |
667 | static void invalidate_for_call PROTO((void)); |
668 | static rtx use_related_value PROTO((rtx, struct table_elt *)); | |
2197a88a RK |
669 | static unsigned canon_hash PROTO((rtx, enum machine_mode)); |
670 | static unsigned safe_hash PROTO((rtx, enum machine_mode)); | |
6cd4575e | 671 | static int exp_equiv_p PROTO((rtx, rtx, int, int)); |
6cd4575e RK |
672 | static rtx canon_reg PROTO((rtx, rtx)); |
673 | static void find_best_addr PROTO((rtx, rtx *)); | |
674 | static enum rtx_code find_comparison_args PROTO((enum rtx_code, rtx *, rtx *, | |
675 | enum machine_mode *, | |
676 | enum machine_mode *)); | |
677 | static rtx fold_rtx PROTO((rtx, rtx)); | |
678 | static rtx equiv_constant PROTO((rtx)); | |
679 | static void record_jump_equiv PROTO((rtx, int)); | |
680 | static void record_jump_cond PROTO((enum rtx_code, enum machine_mode, | |
681 | rtx, rtx, int)); | |
7bd8b2a8 | 682 | static void cse_insn PROTO((rtx, rtx)); |
14a774a9 | 683 | static int addr_affects_sp_p PROTO((rtx)); |
9ae8ffe7 | 684 | static void invalidate_from_clobbers PROTO((rtx)); |
6cd4575e RK |
685 | static rtx cse_process_notes PROTO((rtx, rtx)); |
686 | static void cse_around_loop PROTO((rtx)); | |
84832317 | 687 | static void invalidate_skipped_set PROTO((rtx, rtx, void *)); |
6cd4575e | 688 | static void invalidate_skipped_block PROTO((rtx)); |
84832317 | 689 | static void cse_check_loop_start PROTO((rtx, rtx, void *)); |
6cd4575e RK |
690 | static void cse_set_around_loop PROTO((rtx, rtx, rtx)); |
691 | static rtx cse_basic_block PROTO((rtx, rtx, struct branch_path *, int)); | |
79644f06 | 692 | static void count_reg_usage PROTO((rtx, int *, rtx, int)); |
a0153051 | 693 | extern void dump_class PROTO((struct table_elt*)); |
30f72379 | 694 | static struct cse_reg_info* get_cse_reg_info PROTO((int)); |
c1edba58 VM |
695 | static unsigned int hash_cse_reg_info PROTO((hash_table_entry_t)); |
696 | static int cse_reg_info_equal_p PROTO((hash_table_entry_t, | |
697 | hash_table_entry_t)); | |
698 | ||
01e752d3 | 699 | static void flush_hash_table PROTO((void)); |
7afe21cc | 700 | \f |
a4c6502a MM |
701 | /* Dump the expressions in the equivalence class indicated by CLASSP. |
702 | This function is used only for debugging. */ | |
a0153051 | 703 | void |
a4c6502a MM |
704 | dump_class (classp) |
705 | struct table_elt *classp; | |
706 | { | |
707 | struct table_elt *elt; | |
708 | ||
709 | fprintf (stderr, "Equivalence chain for "); | |
710 | print_rtl (stderr, classp->exp); | |
711 | fprintf (stderr, ": \n"); | |
712 | ||
713 | for (elt = classp->first_same_value; elt; elt = elt->next_same_value) | |
714 | { | |
715 | print_rtl (stderr, elt->exp); | |
716 | fprintf (stderr, "\n"); | |
717 | } | |
718 | } | |
719 | ||
7afe21cc RK |
720 | /* Return an estimate of the cost of computing rtx X. |
721 | One use is in cse, to decide which expression to keep in the hash table. | |
722 | Another is in rtl generation, to pick the cheapest way to multiply. | |
723 | Other uses like the latter are expected in the future. */ | |
724 | ||
954a5693 RK |
725 | /* Internal function, to compute cost when X is not a register; called |
726 | from COST macro to keep it simple. */ | |
727 | ||
728 | static int | |
729 | notreg_cost (x) | |
730 | rtx x; | |
731 | { | |
732 | return ((GET_CODE (x) == SUBREG | |
733 | && GET_CODE (SUBREG_REG (x)) == REG | |
734 | && GET_MODE_CLASS (GET_MODE (x)) == MODE_INT | |
735 | && GET_MODE_CLASS (GET_MODE (SUBREG_REG (x))) == MODE_INT | |
736 | && (GET_MODE_SIZE (GET_MODE (x)) | |
737 | < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))) | |
738 | && subreg_lowpart_p (x) | |
739 | && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE (x)), | |
740 | GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x))))) | |
741 | ? (CHEAP_REG (SUBREG_REG (x)) ? 0 | |
742 | : (REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER ? 1 | |
743 | : 2)) | |
744 | : rtx_cost (x, SET) * 2); | |
745 | } | |
746 | ||
7afe21cc RK |
747 | /* Return the right cost to give to an operation |
748 | to make the cost of the corresponding register-to-register instruction | |
749 | N times that of a fast register-to-register instruction. */ | |
750 | ||
751 | #define COSTS_N_INSNS(N) ((N) * 4 - 2) | |
752 | ||
753 | int | |
e5f6a288 | 754 | rtx_cost (x, outer_code) |
7afe21cc | 755 | rtx x; |
79c9824e | 756 | enum rtx_code outer_code ATTRIBUTE_UNUSED; |
7afe21cc RK |
757 | { |
758 | register int i, j; | |
759 | register enum rtx_code code; | |
6f7d635c | 760 | register const char *fmt; |
7afe21cc RK |
761 | register int total; |
762 | ||
763 | if (x == 0) | |
764 | return 0; | |
765 | ||
766 | /* Compute the default costs of certain things. | |
767 | Note that RTX_COSTS can override the defaults. */ | |
768 | ||
769 | code = GET_CODE (x); | |
770 | switch (code) | |
771 | { | |
772 | case MULT: | |
773 | /* Count multiplication by 2**n as a shift, | |
774 | because if we are considering it, we would output it as a shift. */ | |
775 | if (GET_CODE (XEXP (x, 1)) == CONST_INT | |
776 | && exact_log2 (INTVAL (XEXP (x, 1))) >= 0) | |
777 | total = 2; | |
778 | else | |
779 | total = COSTS_N_INSNS (5); | |
780 | break; | |
781 | case DIV: | |
782 | case UDIV: | |
783 | case MOD: | |
784 | case UMOD: | |
785 | total = COSTS_N_INSNS (7); | |
786 | break; | |
787 | case USE: | |
788 | /* Used in loop.c and combine.c as a marker. */ | |
789 | total = 0; | |
790 | break; | |
538b78e7 RS |
791 | case ASM_OPERANDS: |
792 | /* We don't want these to be used in substitutions because | |
793 | we have no way of validating the resulting insn. So assign | |
794 | anything containing an ASM_OPERANDS a very high cost. */ | |
795 | total = 1000; | |
796 | break; | |
7afe21cc RK |
797 | default: |
798 | total = 2; | |
799 | } | |
800 | ||
801 | switch (code) | |
802 | { | |
803 | case REG: | |
6ab832bc | 804 | return ! CHEAP_REG (x); |
ac07e066 | 805 | |
7afe21cc | 806 | case SUBREG: |
fc3ffe83 RK |
807 | /* If we can't tie these modes, make this expensive. The larger |
808 | the mode, the more expensive it is. */ | |
809 | if (! MODES_TIEABLE_P (GET_MODE (x), GET_MODE (SUBREG_REG (x)))) | |
810 | return COSTS_N_INSNS (2 | |
811 | + GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD); | |
7afe21cc RK |
812 | return 2; |
813 | #ifdef RTX_COSTS | |
e5f6a288 | 814 | RTX_COSTS (x, code, outer_code); |
7afe21cc | 815 | #endif |
47a0b68f | 816 | #ifdef CONST_COSTS |
e5f6a288 | 817 | CONST_COSTS (x, code, outer_code); |
47a0b68f | 818 | #endif |
8625fab5 KG |
819 | |
820 | default: | |
821 | #ifdef DEFAULT_RTX_COSTS | |
822 | DEFAULT_RTX_COSTS(x, code, outer_code); | |
823 | #endif | |
824 | break; | |
7afe21cc RK |
825 | } |
826 | ||
827 | /* Sum the costs of the sub-rtx's, plus cost of this operation, | |
828 | which is already in total. */ | |
829 | ||
830 | fmt = GET_RTX_FORMAT (code); | |
831 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
832 | if (fmt[i] == 'e') | |
e5f6a288 | 833 | total += rtx_cost (XEXP (x, i), code); |
7afe21cc RK |
834 | else if (fmt[i] == 'E') |
835 | for (j = 0; j < XVECLEN (x, i); j++) | |
e5f6a288 | 836 | total += rtx_cost (XVECEXP (x, i, j), code); |
7afe21cc RK |
837 | |
838 | return total; | |
839 | } | |
840 | \f | |
30f72379 MM |
841 | static struct cse_reg_info * |
842 | get_cse_reg_info (regno) | |
843 | int regno; | |
844 | { | |
845 | struct cse_reg_info *cri; | |
c1edba58 VM |
846 | struct cse_reg_info **entry; |
847 | struct cse_reg_info temp; | |
30f72379 MM |
848 | |
849 | /* See if we already have this entry. */ | |
c1edba58 VM |
850 | temp.regno = regno; |
851 | entry = (struct cse_reg_info **) find_hash_table_entry (cse_reg_info_tree, | |
852 | &temp, TRUE); | |
853 | ||
854 | if (*entry) | |
855 | cri = *entry; | |
30f72379 MM |
856 | else |
857 | { | |
858 | /* Get a new cse_reg_info structure. */ | |
859 | if (cse_reg_info_free_list) | |
860 | { | |
861 | cri = cse_reg_info_free_list; | |
c1edba58 | 862 | cse_reg_info_free_list = cri->next; |
30f72379 MM |
863 | } |
864 | else | |
865 | cri = (struct cse_reg_info *) xmalloc (sizeof (struct cse_reg_info)); | |
866 | ||
867 | /* Initialize it. */ | |
c1edba58 | 868 | cri->reg_tick = 0; |
30f72379 MM |
869 | cri->reg_in_table = -1; |
870 | cri->reg_qty = regno; | |
c1edba58 VM |
871 | cri->regno = regno; |
872 | cri->next = cse_reg_info_used_list; | |
873 | cse_reg_info_used_list = cri; | |
874 | if (!cse_reg_info_used_list_end) | |
875 | cse_reg_info_used_list_end = cri; | |
876 | ||
877 | *entry = cri; | |
30f72379 MM |
878 | } |
879 | ||
880 | /* Cache this lookup; we tend to be looking up information about the | |
881 | same register several times in a row. */ | |
882 | cached_regno = regno; | |
883 | cached_cse_reg_info = cri; | |
884 | ||
885 | return cri; | |
886 | } | |
887 | ||
c1edba58 VM |
888 | static unsigned int |
889 | hash_cse_reg_info (el_ptr) | |
890 | hash_table_entry_t el_ptr; | |
30f72379 | 891 | { |
ec0ce6e2 | 892 | return ((const struct cse_reg_info *) el_ptr)->regno; |
c1edba58 VM |
893 | } |
894 | ||
895 | static int | |
896 | cse_reg_info_equal_p (el_ptr1, el_ptr2) | |
897 | hash_table_entry_t el_ptr1; | |
898 | hash_table_entry_t el_ptr2; | |
899 | { | |
ec0ce6e2 KG |
900 | return (((const struct cse_reg_info *) el_ptr1)->regno |
901 | == ((const struct cse_reg_info *) el_ptr2)->regno); | |
30f72379 MM |
902 | } |
903 | ||
7afe21cc RK |
904 | /* Clear the hash table and initialize each register with its own quantity, |
905 | for a new basic block. */ | |
906 | ||
907 | static void | |
908 | new_basic_block () | |
909 | { | |
910 | register int i; | |
911 | ||
912 | next_qty = max_reg; | |
913 | ||
30f72379 MM |
914 | if (cse_reg_info_tree) |
915 | { | |
c1edba58 VM |
916 | delete_hash_table (cse_reg_info_tree); |
917 | if (cse_reg_info_used_list) | |
918 | { | |
919 | cse_reg_info_used_list_end->next = cse_reg_info_free_list; | |
920 | cse_reg_info_free_list = cse_reg_info_used_list; | |
921 | cse_reg_info_used_list = cse_reg_info_used_list_end = 0; | |
922 | } | |
30f72379 MM |
923 | cached_cse_reg_info = 0; |
924 | } | |
925 | ||
c1edba58 VM |
926 | cse_reg_info_tree = create_hash_table (0, hash_cse_reg_info, |
927 | cse_reg_info_equal_p); | |
7afe21cc | 928 | |
7afe21cc RK |
929 | CLEAR_HARD_REG_SET (hard_regs_in_table); |
930 | ||
931 | /* The per-quantity values used to be initialized here, but it is | |
932 | much faster to initialize each as it is made in `make_new_qty'. */ | |
933 | ||
934 | for (i = 0; i < NBUCKETS; i++) | |
935 | { | |
936 | register struct table_elt *this, *next; | |
937 | for (this = table[i]; this; this = next) | |
938 | { | |
939 | next = this->next_same_hash; | |
940 | free_element (this); | |
941 | } | |
942 | } | |
943 | ||
4c9a05bc | 944 | bzero ((char *) table, sizeof table); |
7afe21cc RK |
945 | |
946 | prev_insn = 0; | |
947 | ||
948 | #ifdef HAVE_cc0 | |
949 | prev_insn_cc0 = 0; | |
950 | #endif | |
951 | } | |
952 | ||
953 | /* Say that register REG contains a quantity not in any register before | |
954 | and initialize that quantity. */ | |
955 | ||
956 | static void | |
957 | make_new_qty (reg) | |
958 | register int reg; | |
959 | { | |
960 | register int q; | |
961 | ||
962 | if (next_qty >= max_qty) | |
963 | abort (); | |
964 | ||
30f72379 | 965 | q = REG_QTY (reg) = next_qty++; |
7afe21cc RK |
966 | qty_first_reg[q] = reg; |
967 | qty_last_reg[q] = reg; | |
968 | qty_const[q] = qty_const_insn[q] = 0; | |
969 | qty_comparison_code[q] = UNKNOWN; | |
970 | ||
971 | reg_next_eqv[reg] = reg_prev_eqv[reg] = -1; | |
972 | } | |
973 | ||
974 | /* Make reg NEW equivalent to reg OLD. | |
975 | OLD is not changing; NEW is. */ | |
976 | ||
977 | static void | |
978 | make_regs_eqv (new, old) | |
979 | register int new, old; | |
980 | { | |
981 | register int lastr, firstr; | |
30f72379 | 982 | register int q = REG_QTY (old); |
7afe21cc RK |
983 | |
984 | /* Nothing should become eqv until it has a "non-invalid" qty number. */ | |
985 | if (! REGNO_QTY_VALID_P (old)) | |
986 | abort (); | |
987 | ||
30f72379 | 988 | REG_QTY (new) = q; |
7afe21cc RK |
989 | firstr = qty_first_reg[q]; |
990 | lastr = qty_last_reg[q]; | |
991 | ||
992 | /* Prefer fixed hard registers to anything. Prefer pseudo regs to other | |
993 | hard regs. Among pseudos, if NEW will live longer than any other reg | |
994 | of the same qty, and that is beyond the current basic block, | |
995 | make it the new canonical replacement for this qty. */ | |
996 | if (! (firstr < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (firstr)) | |
997 | /* Certain fixed registers might be of the class NO_REGS. This means | |
998 | that not only can they not be allocated by the compiler, but | |
830a38ee | 999 | they cannot be used in substitutions or canonicalizations |
7afe21cc RK |
1000 | either. */ |
1001 | && (new >= FIRST_PSEUDO_REGISTER || REGNO_REG_CLASS (new) != NO_REGS) | |
1002 | && ((new < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (new)) | |
1003 | || (new >= FIRST_PSEUDO_REGISTER | |
1004 | && (firstr < FIRST_PSEUDO_REGISTER | |
b1f21e0a MM |
1005 | || ((uid_cuid[REGNO_LAST_UID (new)] > cse_basic_block_end |
1006 | || (uid_cuid[REGNO_FIRST_UID (new)] | |
7afe21cc | 1007 | < cse_basic_block_start)) |
b1f21e0a MM |
1008 | && (uid_cuid[REGNO_LAST_UID (new)] |
1009 | > uid_cuid[REGNO_LAST_UID (firstr)])))))) | |
7afe21cc RK |
1010 | { |
1011 | reg_prev_eqv[firstr] = new; | |
1012 | reg_next_eqv[new] = firstr; | |
1013 | reg_prev_eqv[new] = -1; | |
1014 | qty_first_reg[q] = new; | |
1015 | } | |
1016 | else | |
1017 | { | |
1018 | /* If NEW is a hard reg (known to be non-fixed), insert at end. | |
1019 | Otherwise, insert before any non-fixed hard regs that are at the | |
1020 | end. Registers of class NO_REGS cannot be used as an | |
1021 | equivalent for anything. */ | |
1022 | while (lastr < FIRST_PSEUDO_REGISTER && reg_prev_eqv[lastr] >= 0 | |
1023 | && (REGNO_REG_CLASS (lastr) == NO_REGS || ! FIXED_REGNO_P (lastr)) | |
1024 | && new >= FIRST_PSEUDO_REGISTER) | |
1025 | lastr = reg_prev_eqv[lastr]; | |
1026 | reg_next_eqv[new] = reg_next_eqv[lastr]; | |
1027 | if (reg_next_eqv[lastr] >= 0) | |
1028 | reg_prev_eqv[reg_next_eqv[lastr]] = new; | |
1029 | else | |
1030 | qty_last_reg[q] = new; | |
1031 | reg_next_eqv[lastr] = new; | |
1032 | reg_prev_eqv[new] = lastr; | |
1033 | } | |
1034 | } | |
1035 | ||
1036 | /* Remove REG from its equivalence class. */ | |
1037 | ||
1038 | static void | |
1039 | delete_reg_equiv (reg) | |
1040 | register int reg; | |
1041 | { | |
30f72379 | 1042 | register int q = REG_QTY (reg); |
a4e262bc | 1043 | register int p, n; |
7afe21cc | 1044 | |
a4e262bc | 1045 | /* If invalid, do nothing. */ |
7afe21cc RK |
1046 | if (q == reg) |
1047 | return; | |
1048 | ||
a4e262bc RK |
1049 | p = reg_prev_eqv[reg]; |
1050 | n = reg_next_eqv[reg]; | |
1051 | ||
7afe21cc RK |
1052 | if (n != -1) |
1053 | reg_prev_eqv[n] = p; | |
1054 | else | |
1055 | qty_last_reg[q] = p; | |
1056 | if (p != -1) | |
1057 | reg_next_eqv[p] = n; | |
1058 | else | |
1059 | qty_first_reg[q] = n; | |
1060 | ||
30f72379 | 1061 | REG_QTY (reg) = reg; |
7afe21cc RK |
1062 | } |
1063 | ||
1064 | /* Remove any invalid expressions from the hash table | |
1065 | that refer to any of the registers contained in expression X. | |
1066 | ||
1067 | Make sure that newly inserted references to those registers | |
1068 | as subexpressions will be considered valid. | |
1069 | ||
1070 | mention_regs is not called when a register itself | |
1071 | is being stored in the table. | |
1072 | ||
1073 | Return 1 if we have done something that may have changed the hash code | |
1074 | of X. */ | |
1075 | ||
1076 | static int | |
1077 | mention_regs (x) | |
1078 | rtx x; | |
1079 | { | |
1080 | register enum rtx_code code; | |
1081 | register int i, j; | |
6f7d635c | 1082 | register const char *fmt; |
7afe21cc RK |
1083 | register int changed = 0; |
1084 | ||
1085 | if (x == 0) | |
e5f6a288 | 1086 | return 0; |
7afe21cc RK |
1087 | |
1088 | code = GET_CODE (x); | |
1089 | if (code == REG) | |
1090 | { | |
1091 | register int regno = REGNO (x); | |
1092 | register int endregno | |
1093 | = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1 | |
1094 | : HARD_REGNO_NREGS (regno, GET_MODE (x))); | |
1095 | int i; | |
1096 | ||
1097 | for (i = regno; i < endregno; i++) | |
1098 | { | |
30f72379 | 1099 | if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i)) |
7afe21cc RK |
1100 | remove_invalid_refs (i); |
1101 | ||
30f72379 | 1102 | REG_IN_TABLE (i) = REG_TICK (i); |
7afe21cc RK |
1103 | } |
1104 | ||
1105 | return 0; | |
1106 | } | |
1107 | ||
34c73909 R |
1108 | /* If this is a SUBREG, we don't want to discard other SUBREGs of the same |
1109 | pseudo if they don't use overlapping words. We handle only pseudos | |
1110 | here for simplicity. */ | |
1111 | if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG | |
1112 | && REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER) | |
1113 | { | |
1114 | int i = REGNO (SUBREG_REG (x)); | |
1115 | ||
30f72379 | 1116 | if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i)) |
34c73909 R |
1117 | { |
1118 | /* If reg_tick has been incremented more than once since | |
1119 | reg_in_table was last set, that means that the entire | |
1120 | register has been set before, so discard anything memorized | |
1121 | for the entrire register, including all SUBREG expressions. */ | |
30f72379 | 1122 | if (REG_IN_TABLE (i) != REG_TICK (i) - 1) |
34c73909 R |
1123 | remove_invalid_refs (i); |
1124 | else | |
1125 | remove_invalid_subreg_refs (i, SUBREG_WORD (x), GET_MODE (x)); | |
1126 | } | |
1127 | ||
30f72379 | 1128 | REG_IN_TABLE (i) = REG_TICK (i); |
34c73909 R |
1129 | return 0; |
1130 | } | |
1131 | ||
7afe21cc RK |
1132 | /* If X is a comparison or a COMPARE and either operand is a register |
1133 | that does not have a quantity, give it one. This is so that a later | |
1134 | call to record_jump_equiv won't cause X to be assigned a different | |
1135 | hash code and not found in the table after that call. | |
1136 | ||
1137 | It is not necessary to do this here, since rehash_using_reg can | |
1138 | fix up the table later, but doing this here eliminates the need to | |
1139 | call that expensive function in the most common case where the only | |
1140 | use of the register is in the comparison. */ | |
1141 | ||
1142 | if (code == COMPARE || GET_RTX_CLASS (code) == '<') | |
1143 | { | |
1144 | if (GET_CODE (XEXP (x, 0)) == REG | |
1145 | && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 0)))) | |
906c4e36 | 1146 | if (insert_regs (XEXP (x, 0), NULL_PTR, 0)) |
7afe21cc RK |
1147 | { |
1148 | rehash_using_reg (XEXP (x, 0)); | |
1149 | changed = 1; | |
1150 | } | |
1151 | ||
1152 | if (GET_CODE (XEXP (x, 1)) == REG | |
1153 | && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 1)))) | |
906c4e36 | 1154 | if (insert_regs (XEXP (x, 1), NULL_PTR, 0)) |
7afe21cc RK |
1155 | { |
1156 | rehash_using_reg (XEXP (x, 1)); | |
1157 | changed = 1; | |
1158 | } | |
1159 | } | |
1160 | ||
1161 | fmt = GET_RTX_FORMAT (code); | |
1162 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
1163 | if (fmt[i] == 'e') | |
1164 | changed |= mention_regs (XEXP (x, i)); | |
1165 | else if (fmt[i] == 'E') | |
1166 | for (j = 0; j < XVECLEN (x, i); j++) | |
1167 | changed |= mention_regs (XVECEXP (x, i, j)); | |
1168 | ||
1169 | return changed; | |
1170 | } | |
1171 | ||
1172 | /* Update the register quantities for inserting X into the hash table | |
1173 | with a value equivalent to CLASSP. | |
1174 | (If the class does not contain a REG, it is irrelevant.) | |
1175 | If MODIFIED is nonzero, X is a destination; it is being modified. | |
1176 | Note that delete_reg_equiv should be called on a register | |
1177 | before insert_regs is done on that register with MODIFIED != 0. | |
1178 | ||
1179 | Nonzero value means that elements of reg_qty have changed | |
1180 | so X's hash code may be different. */ | |
1181 | ||
1182 | static int | |
1183 | insert_regs (x, classp, modified) | |
1184 | rtx x; | |
1185 | struct table_elt *classp; | |
1186 | int modified; | |
1187 | { | |
1188 | if (GET_CODE (x) == REG) | |
1189 | { | |
1190 | register int regno = REGNO (x); | |
1191 | ||
1ff0c00d RK |
1192 | /* If REGNO is in the equivalence table already but is of the |
1193 | wrong mode for that equivalence, don't do anything here. */ | |
1194 | ||
1195 | if (REGNO_QTY_VALID_P (regno) | |
30f72379 | 1196 | && qty_mode[REG_QTY (regno)] != GET_MODE (x)) |
1ff0c00d RK |
1197 | return 0; |
1198 | ||
1199 | if (modified || ! REGNO_QTY_VALID_P (regno)) | |
7afe21cc RK |
1200 | { |
1201 | if (classp) | |
1202 | for (classp = classp->first_same_value; | |
1203 | classp != 0; | |
1204 | classp = classp->next_same_value) | |
1205 | if (GET_CODE (classp->exp) == REG | |
1206 | && GET_MODE (classp->exp) == GET_MODE (x)) | |
1207 | { | |
1208 | make_regs_eqv (regno, REGNO (classp->exp)); | |
1209 | return 1; | |
1210 | } | |
1211 | ||
1212 | make_new_qty (regno); | |
30f72379 | 1213 | qty_mode[REG_QTY (regno)] = GET_MODE (x); |
7afe21cc RK |
1214 | return 1; |
1215 | } | |
cdf4112f TG |
1216 | |
1217 | return 0; | |
7afe21cc | 1218 | } |
c610adec RK |
1219 | |
1220 | /* If X is a SUBREG, we will likely be inserting the inner register in the | |
1221 | table. If that register doesn't have an assigned quantity number at | |
1222 | this point but does later, the insertion that we will be doing now will | |
1223 | not be accessible because its hash code will have changed. So assign | |
1224 | a quantity number now. */ | |
1225 | ||
1226 | else if (GET_CODE (x) == SUBREG && GET_CODE (SUBREG_REG (x)) == REG | |
1227 | && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x)))) | |
1228 | { | |
34c73909 R |
1229 | int regno = REGNO (SUBREG_REG (x)); |
1230 | ||
906c4e36 | 1231 | insert_regs (SUBREG_REG (x), NULL_PTR, 0); |
34c73909 R |
1232 | /* Mention_regs checks if REG_TICK is exactly one larger than |
1233 | REG_IN_TABLE to find out if there was only a single preceding | |
1234 | invalidation - for the SUBREG - or another one, which would be | |
1235 | for the full register. Since we don't invalidate the SUBREG | |
1236 | here first, we might have to bump up REG_TICK so that mention_regs | |
1237 | will do the right thing. */ | |
30f72379 MM |
1238 | if (REG_IN_TABLE (regno) >= 0 |
1239 | && REG_TICK (regno) == REG_IN_TABLE (regno) + 1) | |
1240 | REG_TICK (regno)++; | |
34c73909 | 1241 | mention_regs (x); |
c610adec RK |
1242 | return 1; |
1243 | } | |
7afe21cc RK |
1244 | else |
1245 | return mention_regs (x); | |
1246 | } | |
1247 | \f | |
1248 | /* Look in or update the hash table. */ | |
1249 | ||
1250 | /* Put the element ELT on the list of free elements. */ | |
1251 | ||
1252 | static void | |
1253 | free_element (elt) | |
1254 | struct table_elt *elt; | |
1255 | { | |
1256 | elt->next_same_hash = free_element_chain; | |
1257 | free_element_chain = elt; | |
1258 | } | |
1259 | ||
1260 | /* Return an element that is free for use. */ | |
1261 | ||
1262 | static struct table_elt * | |
1263 | get_element () | |
1264 | { | |
1265 | struct table_elt *elt = free_element_chain; | |
1266 | if (elt) | |
1267 | { | |
1268 | free_element_chain = elt->next_same_hash; | |
1269 | return elt; | |
1270 | } | |
1271 | n_elements_made++; | |
1272 | return (struct table_elt *) oballoc (sizeof (struct table_elt)); | |
1273 | } | |
1274 | ||
1275 | /* Remove table element ELT from use in the table. | |
1276 | HASH is its hash code, made using the HASH macro. | |
1277 | It's an argument because often that is known in advance | |
1278 | and we save much time not recomputing it. */ | |
1279 | ||
1280 | static void | |
1281 | remove_from_table (elt, hash) | |
1282 | register struct table_elt *elt; | |
2197a88a | 1283 | unsigned hash; |
7afe21cc RK |
1284 | { |
1285 | if (elt == 0) | |
1286 | return; | |
1287 | ||
1288 | /* Mark this element as removed. See cse_insn. */ | |
1289 | elt->first_same_value = 0; | |
1290 | ||
1291 | /* Remove the table element from its equivalence class. */ | |
1292 | ||
1293 | { | |
1294 | register struct table_elt *prev = elt->prev_same_value; | |
1295 | register struct table_elt *next = elt->next_same_value; | |
1296 | ||
1297 | if (next) next->prev_same_value = prev; | |
1298 | ||
1299 | if (prev) | |
1300 | prev->next_same_value = next; | |
1301 | else | |
1302 | { | |
1303 | register struct table_elt *newfirst = next; | |
1304 | while (next) | |
1305 | { | |
1306 | next->first_same_value = newfirst; | |
1307 | next = next->next_same_value; | |
1308 | } | |
1309 | } | |
1310 | } | |
1311 | ||
1312 | /* Remove the table element from its hash bucket. */ | |
1313 | ||
1314 | { | |
1315 | register struct table_elt *prev = elt->prev_same_hash; | |
1316 | register struct table_elt *next = elt->next_same_hash; | |
1317 | ||
1318 | if (next) next->prev_same_hash = prev; | |
1319 | ||
1320 | if (prev) | |
1321 | prev->next_same_hash = next; | |
1322 | else if (table[hash] == elt) | |
1323 | table[hash] = next; | |
1324 | else | |
1325 | { | |
1326 | /* This entry is not in the proper hash bucket. This can happen | |
1327 | when two classes were merged by `merge_equiv_classes'. Search | |
1328 | for the hash bucket that it heads. This happens only very | |
1329 | rarely, so the cost is acceptable. */ | |
1330 | for (hash = 0; hash < NBUCKETS; hash++) | |
1331 | if (table[hash] == elt) | |
1332 | table[hash] = next; | |
1333 | } | |
1334 | } | |
1335 | ||
1336 | /* Remove the table element from its related-value circular chain. */ | |
1337 | ||
1338 | if (elt->related_value != 0 && elt->related_value != elt) | |
1339 | { | |
1340 | register struct table_elt *p = elt->related_value; | |
1341 | while (p->related_value != elt) | |
1342 | p = p->related_value; | |
1343 | p->related_value = elt->related_value; | |
1344 | if (p->related_value == p) | |
1345 | p->related_value = 0; | |
1346 | } | |
1347 | ||
1348 | free_element (elt); | |
1349 | } | |
1350 | ||
1351 | /* Look up X in the hash table and return its table element, | |
1352 | or 0 if X is not in the table. | |
1353 | ||
1354 | MODE is the machine-mode of X, or if X is an integer constant | |
1355 | with VOIDmode then MODE is the mode with which X will be used. | |
1356 | ||
1357 | Here we are satisfied to find an expression whose tree structure | |
1358 | looks like X. */ | |
1359 | ||
1360 | static struct table_elt * | |
1361 | lookup (x, hash, mode) | |
1362 | rtx x; | |
2197a88a | 1363 | unsigned hash; |
7afe21cc RK |
1364 | enum machine_mode mode; |
1365 | { | |
1366 | register struct table_elt *p; | |
1367 | ||
1368 | for (p = table[hash]; p; p = p->next_same_hash) | |
1369 | if (mode == p->mode && ((x == p->exp && GET_CODE (x) == REG) | |
1370 | || exp_equiv_p (x, p->exp, GET_CODE (x) != REG, 0))) | |
1371 | return p; | |
1372 | ||
1373 | return 0; | |
1374 | } | |
1375 | ||
1376 | /* Like `lookup' but don't care whether the table element uses invalid regs. | |
1377 | Also ignore discrepancies in the machine mode of a register. */ | |
1378 | ||
1379 | static struct table_elt * | |
1380 | lookup_for_remove (x, hash, mode) | |
1381 | rtx x; | |
2197a88a | 1382 | unsigned hash; |
7afe21cc RK |
1383 | enum machine_mode mode; |
1384 | { | |
1385 | register struct table_elt *p; | |
1386 | ||
1387 | if (GET_CODE (x) == REG) | |
1388 | { | |
1389 | int regno = REGNO (x); | |
1390 | /* Don't check the machine mode when comparing registers; | |
1391 | invalidating (REG:SI 0) also invalidates (REG:DF 0). */ | |
1392 | for (p = table[hash]; p; p = p->next_same_hash) | |
1393 | if (GET_CODE (p->exp) == REG | |
1394 | && REGNO (p->exp) == regno) | |
1395 | return p; | |
1396 | } | |
1397 | else | |
1398 | { | |
1399 | for (p = table[hash]; p; p = p->next_same_hash) | |
1400 | if (mode == p->mode && (x == p->exp || exp_equiv_p (x, p->exp, 0, 0))) | |
1401 | return p; | |
1402 | } | |
1403 | ||
1404 | return 0; | |
1405 | } | |
1406 | ||
1407 | /* Look for an expression equivalent to X and with code CODE. | |
1408 | If one is found, return that expression. */ | |
1409 | ||
1410 | static rtx | |
1411 | lookup_as_function (x, code) | |
1412 | rtx x; | |
1413 | enum rtx_code code; | |
1414 | { | |
1415 | register struct table_elt *p = lookup (x, safe_hash (x, VOIDmode) % NBUCKETS, | |
1416 | GET_MODE (x)); | |
34c73909 R |
1417 | /* If we are looking for a CONST_INT, the mode doesn't really matter, as |
1418 | long as we are narrowing. So if we looked in vain for a mode narrower | |
1419 | than word_mode before, look for word_mode now. */ | |
1420 | if (p == 0 && code == CONST_INT | |
1421 | && GET_MODE_SIZE (GET_MODE (x)) < GET_MODE_SIZE (word_mode)) | |
1422 | { | |
1423 | x = copy_rtx (x); | |
1424 | PUT_MODE (x, word_mode); | |
1425 | p = lookup (x, safe_hash (x, VOIDmode) % NBUCKETS, word_mode); | |
1426 | } | |
1427 | ||
7afe21cc RK |
1428 | if (p == 0) |
1429 | return 0; | |
1430 | ||
1431 | for (p = p->first_same_value; p; p = p->next_same_value) | |
1432 | { | |
1433 | if (GET_CODE (p->exp) == code | |
1434 | /* Make sure this is a valid entry in the table. */ | |
1435 | && exp_equiv_p (p->exp, p->exp, 1, 0)) | |
1436 | return p->exp; | |
1437 | } | |
1438 | ||
1439 | return 0; | |
1440 | } | |
1441 | ||
1442 | /* Insert X in the hash table, assuming HASH is its hash code | |
1443 | and CLASSP is an element of the class it should go in | |
1444 | (or 0 if a new class should be made). | |
1445 | It is inserted at the proper position to keep the class in | |
1446 | the order cheapest first. | |
1447 | ||
1448 | MODE is the machine-mode of X, or if X is an integer constant | |
1449 | with VOIDmode then MODE is the mode with which X will be used. | |
1450 | ||
1451 | For elements of equal cheapness, the most recent one | |
1452 | goes in front, except that the first element in the list | |
1453 | remains first unless a cheaper element is added. The order of | |
1454 | pseudo-registers does not matter, as canon_reg will be called to | |
830a38ee | 1455 | find the cheapest when a register is retrieved from the table. |
7afe21cc RK |
1456 | |
1457 | The in_memory field in the hash table element is set to 0. | |
1458 | The caller must set it nonzero if appropriate. | |
1459 | ||
1460 | You should call insert_regs (X, CLASSP, MODIFY) before calling here, | |
1461 | and if insert_regs returns a nonzero value | |
1462 | you must then recompute its hash code before calling here. | |
1463 | ||
1464 | If necessary, update table showing constant values of quantities. */ | |
1465 | ||
1466 | #define CHEAPER(X,Y) ((X)->cost < (Y)->cost) | |
1467 | ||
1468 | static struct table_elt * | |
1469 | insert (x, classp, hash, mode) | |
1470 | register rtx x; | |
1471 | register struct table_elt *classp; | |
2197a88a | 1472 | unsigned hash; |
7afe21cc RK |
1473 | enum machine_mode mode; |
1474 | { | |
1475 | register struct table_elt *elt; | |
1476 | ||
1477 | /* If X is a register and we haven't made a quantity for it, | |
1478 | something is wrong. */ | |
1479 | if (GET_CODE (x) == REG && ! REGNO_QTY_VALID_P (REGNO (x))) | |
1480 | abort (); | |
1481 | ||
1482 | /* If X is a hard register, show it is being put in the table. */ | |
1483 | if (GET_CODE (x) == REG && REGNO (x) < FIRST_PSEUDO_REGISTER) | |
1484 | { | |
1485 | int regno = REGNO (x); | |
1486 | int endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (x)); | |
1487 | int i; | |
1488 | ||
1489 | for (i = regno; i < endregno; i++) | |
1490 | SET_HARD_REG_BIT (hard_regs_in_table, i); | |
1491 | } | |
1492 | ||
a5dfb4ee | 1493 | /* If X is a label, show we recorded it. */ |
970c9ace RK |
1494 | if (GET_CODE (x) == LABEL_REF |
1495 | || (GET_CODE (x) == CONST && GET_CODE (XEXP (x, 0)) == PLUS | |
1496 | && GET_CODE (XEXP (XEXP (x, 0), 0)) == LABEL_REF)) | |
a5dfb4ee | 1497 | recorded_label_ref = 1; |
7afe21cc RK |
1498 | |
1499 | /* Put an element for X into the right hash bucket. */ | |
1500 | ||
1501 | elt = get_element (); | |
1502 | elt->exp = x; | |
1503 | elt->cost = COST (x); | |
1504 | elt->next_same_value = 0; | |
1505 | elt->prev_same_value = 0; | |
1506 | elt->next_same_hash = table[hash]; | |
1507 | elt->prev_same_hash = 0; | |
1508 | elt->related_value = 0; | |
1509 | elt->in_memory = 0; | |
1510 | elt->mode = mode; | |
1511 | elt->is_const = (CONSTANT_P (x) | |
1512 | /* GNU C++ takes advantage of this for `this' | |
1513 | (and other const values). */ | |
1514 | || (RTX_UNCHANGING_P (x) | |
1515 | && GET_CODE (x) == REG | |
1516 | && REGNO (x) >= FIRST_PSEUDO_REGISTER) | |
1517 | || FIXED_BASE_PLUS_P (x)); | |
1518 | ||
1519 | if (table[hash]) | |
1520 | table[hash]->prev_same_hash = elt; | |
1521 | table[hash] = elt; | |
1522 | ||
1523 | /* Put it into the proper value-class. */ | |
1524 | if (classp) | |
1525 | { | |
1526 | classp = classp->first_same_value; | |
1527 | if (CHEAPER (elt, classp)) | |
1528 | /* Insert at the head of the class */ | |
1529 | { | |
1530 | register struct table_elt *p; | |
1531 | elt->next_same_value = classp; | |
1532 | classp->prev_same_value = elt; | |
1533 | elt->first_same_value = elt; | |
1534 | ||
1535 | for (p = classp; p; p = p->next_same_value) | |
1536 | p->first_same_value = elt; | |
1537 | } | |
1538 | else | |
1539 | { | |
1540 | /* Insert not at head of the class. */ | |
1541 | /* Put it after the last element cheaper than X. */ | |
1542 | register struct table_elt *p, *next; | |
1543 | for (p = classp; (next = p->next_same_value) && CHEAPER (next, elt); | |
1544 | p = next); | |
1545 | /* Put it after P and before NEXT. */ | |
1546 | elt->next_same_value = next; | |
1547 | if (next) | |
1548 | next->prev_same_value = elt; | |
1549 | elt->prev_same_value = p; | |
1550 | p->next_same_value = elt; | |
1551 | elt->first_same_value = classp; | |
1552 | } | |
1553 | } | |
1554 | else | |
1555 | elt->first_same_value = elt; | |
1556 | ||
1557 | /* If this is a constant being set equivalent to a register or a register | |
1558 | being set equivalent to a constant, note the constant equivalence. | |
1559 | ||
1560 | If this is a constant, it cannot be equivalent to a different constant, | |
1561 | and a constant is the only thing that can be cheaper than a register. So | |
1562 | we know the register is the head of the class (before the constant was | |
1563 | inserted). | |
1564 | ||
1565 | If this is a register that is not already known equivalent to a | |
1566 | constant, we must check the entire class. | |
1567 | ||
1568 | If this is a register that is already known equivalent to an insn, | |
1569 | update `qty_const_insn' to show that `this_insn' is the latest | |
1570 | insn making that quantity equivalent to the constant. */ | |
1571 | ||
f353588a RK |
1572 | if (elt->is_const && classp && GET_CODE (classp->exp) == REG |
1573 | && GET_CODE (x) != REG) | |
7afe21cc | 1574 | { |
30f72379 MM |
1575 | qty_const[REG_QTY (REGNO (classp->exp))] |
1576 | = gen_lowpart_if_possible (qty_mode[REG_QTY (REGNO (classp->exp))], x); | |
1577 | qty_const_insn[REG_QTY (REGNO (classp->exp))] = this_insn; | |
7afe21cc RK |
1578 | } |
1579 | ||
30f72379 | 1580 | else if (GET_CODE (x) == REG && classp && ! qty_const[REG_QTY (REGNO (x))] |
f353588a | 1581 | && ! elt->is_const) |
7afe21cc RK |
1582 | { |
1583 | register struct table_elt *p; | |
1584 | ||
1585 | for (p = classp; p != 0; p = p->next_same_value) | |
1586 | { | |
f353588a | 1587 | if (p->is_const && GET_CODE (p->exp) != REG) |
7afe21cc | 1588 | { |
30f72379 | 1589 | qty_const[REG_QTY (REGNO (x))] |
7afe21cc | 1590 | = gen_lowpart_if_possible (GET_MODE (x), p->exp); |
30f72379 | 1591 | qty_const_insn[REG_QTY (REGNO (x))] = this_insn; |
7afe21cc RK |
1592 | break; |
1593 | } | |
1594 | } | |
1595 | } | |
1596 | ||
30f72379 MM |
1597 | else if (GET_CODE (x) == REG && qty_const[REG_QTY (REGNO (x))] |
1598 | && GET_MODE (x) == qty_mode[REG_QTY (REGNO (x))]) | |
1599 | qty_const_insn[REG_QTY (REGNO (x))] = this_insn; | |
7afe21cc RK |
1600 | |
1601 | /* If this is a constant with symbolic value, | |
1602 | and it has a term with an explicit integer value, | |
1603 | link it up with related expressions. */ | |
1604 | if (GET_CODE (x) == CONST) | |
1605 | { | |
1606 | rtx subexp = get_related_value (x); | |
2197a88a | 1607 | unsigned subhash; |
7afe21cc RK |
1608 | struct table_elt *subelt, *subelt_prev; |
1609 | ||
1610 | if (subexp != 0) | |
1611 | { | |
1612 | /* Get the integer-free subexpression in the hash table. */ | |
1613 | subhash = safe_hash (subexp, mode) % NBUCKETS; | |
1614 | subelt = lookup (subexp, subhash, mode); | |
1615 | if (subelt == 0) | |
906c4e36 | 1616 | subelt = insert (subexp, NULL_PTR, subhash, mode); |
7afe21cc RK |
1617 | /* Initialize SUBELT's circular chain if it has none. */ |
1618 | if (subelt->related_value == 0) | |
1619 | subelt->related_value = subelt; | |
1620 | /* Find the element in the circular chain that precedes SUBELT. */ | |
1621 | subelt_prev = subelt; | |
1622 | while (subelt_prev->related_value != subelt) | |
1623 | subelt_prev = subelt_prev->related_value; | |
1624 | /* Put new ELT into SUBELT's circular chain just before SUBELT. | |
1625 | This way the element that follows SUBELT is the oldest one. */ | |
1626 | elt->related_value = subelt_prev->related_value; | |
1627 | subelt_prev->related_value = elt; | |
1628 | } | |
1629 | } | |
1630 | ||
1631 | return elt; | |
1632 | } | |
1633 | \f | |
1634 | /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from | |
1635 | CLASS2 into CLASS1. This is done when we have reached an insn which makes | |
1636 | the two classes equivalent. | |
1637 | ||
1638 | CLASS1 will be the surviving class; CLASS2 should not be used after this | |
1639 | call. | |
1640 | ||
1641 | Any invalid entries in CLASS2 will not be copied. */ | |
1642 | ||
1643 | static void | |
1644 | merge_equiv_classes (class1, class2) | |
1645 | struct table_elt *class1, *class2; | |
1646 | { | |
1647 | struct table_elt *elt, *next, *new; | |
1648 | ||
1649 | /* Ensure we start with the head of the classes. */ | |
1650 | class1 = class1->first_same_value; | |
1651 | class2 = class2->first_same_value; | |
1652 | ||
1653 | /* If they were already equal, forget it. */ | |
1654 | if (class1 == class2) | |
1655 | return; | |
1656 | ||
1657 | for (elt = class2; elt; elt = next) | |
1658 | { | |
2197a88a | 1659 | unsigned hash; |
7afe21cc RK |
1660 | rtx exp = elt->exp; |
1661 | enum machine_mode mode = elt->mode; | |
1662 | ||
1663 | next = elt->next_same_value; | |
1664 | ||
1665 | /* Remove old entry, make a new one in CLASS1's class. | |
1666 | Don't do this for invalid entries as we cannot find their | |
0f41302f | 1667 | hash code (it also isn't necessary). */ |
7afe21cc RK |
1668 | if (GET_CODE (exp) == REG || exp_equiv_p (exp, exp, 1, 0)) |
1669 | { | |
1670 | hash_arg_in_memory = 0; | |
7afe21cc RK |
1671 | hash = HASH (exp, mode); |
1672 | ||
1673 | if (GET_CODE (exp) == REG) | |
1674 | delete_reg_equiv (REGNO (exp)); | |
1675 | ||
1676 | remove_from_table (elt, hash); | |
1677 | ||
1678 | if (insert_regs (exp, class1, 0)) | |
8ae2b8f6 JW |
1679 | { |
1680 | rehash_using_reg (exp); | |
1681 | hash = HASH (exp, mode); | |
1682 | } | |
7afe21cc RK |
1683 | new = insert (exp, class1, hash, mode); |
1684 | new->in_memory = hash_arg_in_memory; | |
7afe21cc RK |
1685 | } |
1686 | } | |
1687 | } | |
1688 | \f | |
01e752d3 JL |
1689 | |
1690 | /* Flush the entire hash table. */ | |
1691 | ||
1692 | static void | |
1693 | flush_hash_table () | |
1694 | { | |
1695 | int i; | |
1696 | struct table_elt *p; | |
1697 | ||
1698 | for (i = 0; i < NBUCKETS; i++) | |
1699 | for (p = table[i]; p; p = table[i]) | |
1700 | { | |
1701 | /* Note that invalidate can remove elements | |
1702 | after P in the current hash chain. */ | |
1703 | if (GET_CODE (p->exp) == REG) | |
1704 | invalidate (p->exp, p->mode); | |
1705 | else | |
1706 | remove_from_table (p, i); | |
1707 | } | |
1708 | } | |
14a774a9 RK |
1709 | \f |
1710 | /* Remove from the hash table, or mark as invalid, all expressions whose | |
1711 | values could be altered by storing in X. X is a register, a subreg, or | |
1712 | a memory reference with nonvarying address (because, when a memory | |
1713 | reference with a varying address is stored in, all memory references are | |
1714 | removed by invalidate_memory so specific invalidation is superfluous). | |
1715 | FULL_MODE, if not VOIDmode, indicates that this much should be | |
1716 | invalidated instead of just the amount indicated by the mode of X. This | |
1717 | is only used for bitfield stores into memory. | |
1718 | ||
1719 | A nonvarying address may be just a register or just a symbol reference, | |
1720 | or it may be either of those plus a numeric offset. */ | |
7afe21cc RK |
1721 | |
1722 | static void | |
bb4034b3 | 1723 | invalidate (x, full_mode) |
7afe21cc | 1724 | rtx x; |
bb4034b3 | 1725 | enum machine_mode full_mode; |
7afe21cc RK |
1726 | { |
1727 | register int i; | |
1728 | register struct table_elt *p; | |
7afe21cc | 1729 | |
14a774a9 | 1730 | switch (GET_CODE (x)) |
7afe21cc | 1731 | { |
14a774a9 RK |
1732 | case REG: |
1733 | { | |
1734 | /* If X is a register, dependencies on its contents are recorded | |
1735 | through the qty number mechanism. Just change the qty number of | |
1736 | the register, mark it as invalid for expressions that refer to it, | |
1737 | and remove it itself. */ | |
1738 | register int regno = REGNO (x); | |
1739 | register unsigned hash = HASH (x, GET_MODE (x)); | |
7afe21cc | 1740 | |
14a774a9 RK |
1741 | /* Remove REGNO from any quantity list it might be on and indicate |
1742 | that its value might have changed. If it is a pseudo, remove its | |
1743 | entry from the hash table. | |
7afe21cc | 1744 | |
14a774a9 RK |
1745 | For a hard register, we do the first two actions above for any |
1746 | additional hard registers corresponding to X. Then, if any of these | |
1747 | registers are in the table, we must remove any REG entries that | |
1748 | overlap these registers. */ | |
7afe21cc | 1749 | |
14a774a9 RK |
1750 | delete_reg_equiv (regno); |
1751 | REG_TICK (regno)++; | |
85e4d983 | 1752 | |
14a774a9 RK |
1753 | if (regno >= FIRST_PSEUDO_REGISTER) |
1754 | { | |
1755 | /* Because a register can be referenced in more than one mode, | |
1756 | we might have to remove more than one table entry. */ | |
1757 | struct table_elt *elt; | |
85e4d983 | 1758 | |
14a774a9 RK |
1759 | while ((elt = lookup_for_remove (x, hash, GET_MODE (x)))) |
1760 | remove_from_table (elt, hash); | |
1761 | } | |
1762 | else | |
1763 | { | |
1764 | HOST_WIDE_INT in_table | |
1765 | = TEST_HARD_REG_BIT (hard_regs_in_table, regno); | |
1766 | int endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (x)); | |
1767 | int tregno, tendregno; | |
1768 | register struct table_elt *p, *next; | |
7afe21cc | 1769 | |
14a774a9 | 1770 | CLEAR_HARD_REG_BIT (hard_regs_in_table, regno); |
7afe21cc | 1771 | |
14a774a9 RK |
1772 | for (i = regno + 1; i < endregno; i++) |
1773 | { | |
1774 | in_table |= TEST_HARD_REG_BIT (hard_regs_in_table, i); | |
1775 | CLEAR_HARD_REG_BIT (hard_regs_in_table, i); | |
1776 | delete_reg_equiv (i); | |
1777 | REG_TICK (i)++; | |
1778 | } | |
7afe21cc | 1779 | |
14a774a9 RK |
1780 | if (in_table) |
1781 | for (hash = 0; hash < NBUCKETS; hash++) | |
1782 | for (p = table[hash]; p; p = next) | |
1783 | { | |
1784 | next = p->next_same_hash; | |
7afe21cc RK |
1785 | |
1786 | if (GET_CODE (p->exp) != REG | |
1787 | || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER) | |
1788 | continue; | |
14a774a9 RK |
1789 | |
1790 | tregno = REGNO (p->exp); | |
1791 | tendregno | |
1792 | = tregno + HARD_REGNO_NREGS (tregno, GET_MODE (p->exp)); | |
1793 | if (tendregno > regno && tregno < endregno) | |
1794 | remove_from_table (p, hash); | |
1795 | } | |
1796 | } | |
1797 | } | |
7afe21cc | 1798 | return; |
7afe21cc | 1799 | |
14a774a9 | 1800 | case SUBREG: |
bb4034b3 | 1801 | invalidate (SUBREG_REG (x), VOIDmode); |
7afe21cc | 1802 | return; |
aac5cc16 | 1803 | |
14a774a9 | 1804 | case PARALLEL: |
aac5cc16 RH |
1805 | for (i = XVECLEN (x, 0) - 1; i >= 0 ; --i) |
1806 | invalidate (XVECEXP (x, 0, i), VOIDmode); | |
1807 | return; | |
aac5cc16 | 1808 | |
14a774a9 RK |
1809 | case EXPR_LIST: |
1810 | /* This is part of a disjoint return value; extract the location in | |
1811 | question ignoring the offset. */ | |
aac5cc16 RH |
1812 | invalidate (XEXP (x, 0), VOIDmode); |
1813 | return; | |
7afe21cc | 1814 | |
14a774a9 RK |
1815 | case MEM: |
1816 | /* Remove all hash table elements that refer to overlapping pieces of | |
1817 | memory. */ | |
1818 | if (full_mode == VOIDmode) | |
1819 | full_mode = GET_MODE (x); | |
bb4034b3 | 1820 | |
14a774a9 | 1821 | for (i = 0; i < NBUCKETS; i++) |
7afe21cc | 1822 | { |
14a774a9 RK |
1823 | register struct table_elt *next; |
1824 | ||
1825 | for (p = table[i]; p; p = next) | |
1826 | { | |
1827 | next = p->next_same_hash; | |
1828 | if (p->in_memory | |
1829 | && (GET_CODE (p->exp) != MEM | |
1830 | || true_dependence (x, full_mode, p->exp, | |
1831 | cse_rtx_varies_p))) | |
1832 | remove_from_table (p, i); | |
1833 | } | |
7afe21cc | 1834 | } |
14a774a9 RK |
1835 | return; |
1836 | ||
1837 | default: | |
1838 | abort (); | |
7afe21cc RK |
1839 | } |
1840 | } | |
14a774a9 | 1841 | \f |
7afe21cc RK |
1842 | /* Remove all expressions that refer to register REGNO, |
1843 | since they are already invalid, and we are about to | |
1844 | mark that register valid again and don't want the old | |
1845 | expressions to reappear as valid. */ | |
1846 | ||
1847 | static void | |
1848 | remove_invalid_refs (regno) | |
1849 | int regno; | |
1850 | { | |
1851 | register int i; | |
1852 | register struct table_elt *p, *next; | |
1853 | ||
1854 | for (i = 0; i < NBUCKETS; i++) | |
1855 | for (p = table[i]; p; p = next) | |
1856 | { | |
1857 | next = p->next_same_hash; | |
1858 | if (GET_CODE (p->exp) != REG | |
906c4e36 | 1859 | && refers_to_regno_p (regno, regno + 1, p->exp, NULL_PTR)) |
7afe21cc RK |
1860 | remove_from_table (p, i); |
1861 | } | |
1862 | } | |
34c73909 R |
1863 | |
1864 | /* Likewise for a subreg with subreg_reg WORD and mode MODE. */ | |
1865 | static void | |
1866 | remove_invalid_subreg_refs (regno, word, mode) | |
1867 | int regno; | |
1868 | int word; | |
1869 | enum machine_mode mode; | |
1870 | { | |
1871 | register int i; | |
1872 | register struct table_elt *p, *next; | |
1873 | int end = word + (GET_MODE_SIZE (mode) - 1) / UNITS_PER_WORD; | |
1874 | ||
1875 | for (i = 0; i < NBUCKETS; i++) | |
1876 | for (p = table[i]; p; p = next) | |
1877 | { | |
1878 | rtx exp; | |
1879 | next = p->next_same_hash; | |
1880 | ||
1881 | exp = p->exp; | |
1882 | if (GET_CODE (p->exp) != REG | |
1883 | && (GET_CODE (exp) != SUBREG | |
1884 | || GET_CODE (SUBREG_REG (exp)) != REG | |
1885 | || REGNO (SUBREG_REG (exp)) != regno | |
1886 | || (((SUBREG_WORD (exp) | |
1887 | + (GET_MODE_SIZE (GET_MODE (exp)) - 1) / UNITS_PER_WORD) | |
1888 | >= word) | |
1889 | && SUBREG_WORD (exp) <= end)) | |
1890 | && refers_to_regno_p (regno, regno + 1, p->exp, NULL_PTR)) | |
1891 | remove_from_table (p, i); | |
1892 | } | |
1893 | } | |
7afe21cc RK |
1894 | \f |
1895 | /* Recompute the hash codes of any valid entries in the hash table that | |
1896 | reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG. | |
1897 | ||
1898 | This is called when we make a jump equivalence. */ | |
1899 | ||
1900 | static void | |
1901 | rehash_using_reg (x) | |
1902 | rtx x; | |
1903 | { | |
973838fd | 1904 | unsigned int i; |
7afe21cc | 1905 | struct table_elt *p, *next; |
2197a88a | 1906 | unsigned hash; |
7afe21cc RK |
1907 | |
1908 | if (GET_CODE (x) == SUBREG) | |
1909 | x = SUBREG_REG (x); | |
1910 | ||
1911 | /* If X is not a register or if the register is known not to be in any | |
1912 | valid entries in the table, we have no work to do. */ | |
1913 | ||
1914 | if (GET_CODE (x) != REG | |
30f72379 MM |
1915 | || REG_IN_TABLE (REGNO (x)) < 0 |
1916 | || REG_IN_TABLE (REGNO (x)) != REG_TICK (REGNO (x))) | |
7afe21cc RK |
1917 | return; |
1918 | ||
1919 | /* Scan all hash chains looking for valid entries that mention X. | |
1920 | If we find one and it is in the wrong hash chain, move it. We can skip | |
1921 | objects that are registers, since they are handled specially. */ | |
1922 | ||
1923 | for (i = 0; i < NBUCKETS; i++) | |
1924 | for (p = table[i]; p; p = next) | |
1925 | { | |
1926 | next = p->next_same_hash; | |
1927 | if (GET_CODE (p->exp) != REG && reg_mentioned_p (x, p->exp) | |
538b78e7 | 1928 | && exp_equiv_p (p->exp, p->exp, 1, 0) |
7afe21cc RK |
1929 | && i != (hash = safe_hash (p->exp, p->mode) % NBUCKETS)) |
1930 | { | |
1931 | if (p->next_same_hash) | |
1932 | p->next_same_hash->prev_same_hash = p->prev_same_hash; | |
1933 | ||
1934 | if (p->prev_same_hash) | |
1935 | p->prev_same_hash->next_same_hash = p->next_same_hash; | |
1936 | else | |
1937 | table[i] = p->next_same_hash; | |
1938 | ||
1939 | p->next_same_hash = table[hash]; | |
1940 | p->prev_same_hash = 0; | |
1941 | if (table[hash]) | |
1942 | table[hash]->prev_same_hash = p; | |
1943 | table[hash] = p; | |
1944 | } | |
1945 | } | |
1946 | } | |
1947 | \f | |
7afe21cc RK |
1948 | /* Remove from the hash table any expression that is a call-clobbered |
1949 | register. Also update their TICK values. */ | |
1950 | ||
1951 | static void | |
1952 | invalidate_for_call () | |
1953 | { | |
1954 | int regno, endregno; | |
1955 | int i; | |
2197a88a | 1956 | unsigned hash; |
7afe21cc RK |
1957 | struct table_elt *p, *next; |
1958 | int in_table = 0; | |
1959 | ||
1960 | /* Go through all the hard registers. For each that is clobbered in | |
1961 | a CALL_INSN, remove the register from quantity chains and update | |
1962 | reg_tick if defined. Also see if any of these registers is currently | |
1963 | in the table. */ | |
1964 | ||
1965 | for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) | |
1966 | if (TEST_HARD_REG_BIT (regs_invalidated_by_call, regno)) | |
1967 | { | |
1968 | delete_reg_equiv (regno); | |
30f72379 MM |
1969 | if (REG_TICK (regno) >= 0) |
1970 | REG_TICK (regno)++; | |
7afe21cc | 1971 | |
0e227018 | 1972 | in_table |= (TEST_HARD_REG_BIT (hard_regs_in_table, regno) != 0); |
7afe21cc RK |
1973 | } |
1974 | ||
1975 | /* In the case where we have no call-clobbered hard registers in the | |
1976 | table, we are done. Otherwise, scan the table and remove any | |
1977 | entry that overlaps a call-clobbered register. */ | |
1978 | ||
1979 | if (in_table) | |
1980 | for (hash = 0; hash < NBUCKETS; hash++) | |
1981 | for (p = table[hash]; p; p = next) | |
1982 | { | |
1983 | next = p->next_same_hash; | |
1984 | ||
1985 | if (GET_CODE (p->exp) != REG | |
1986 | || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER) | |
1987 | continue; | |
1988 | ||
1989 | regno = REGNO (p->exp); | |
1990 | endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (p->exp)); | |
1991 | ||
1992 | for (i = regno; i < endregno; i++) | |
1993 | if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i)) | |
1994 | { | |
1995 | remove_from_table (p, hash); | |
1996 | break; | |
1997 | } | |
1998 | } | |
1999 | } | |
2000 | \f | |
2001 | /* Given an expression X of type CONST, | |
2002 | and ELT which is its table entry (or 0 if it | |
2003 | is not in the hash table), | |
2004 | return an alternate expression for X as a register plus integer. | |
2005 | If none can be found, return 0. */ | |
2006 | ||
2007 | static rtx | |
2008 | use_related_value (x, elt) | |
2009 | rtx x; | |
2010 | struct table_elt *elt; | |
2011 | { | |
2012 | register struct table_elt *relt = 0; | |
2013 | register struct table_elt *p, *q; | |
906c4e36 | 2014 | HOST_WIDE_INT offset; |
7afe21cc RK |
2015 | |
2016 | /* First, is there anything related known? | |
2017 | If we have a table element, we can tell from that. | |
2018 | Otherwise, must look it up. */ | |
2019 | ||
2020 | if (elt != 0 && elt->related_value != 0) | |
2021 | relt = elt; | |
2022 | else if (elt == 0 && GET_CODE (x) == CONST) | |
2023 | { | |
2024 | rtx subexp = get_related_value (x); | |
2025 | if (subexp != 0) | |
2026 | relt = lookup (subexp, | |
2027 | safe_hash (subexp, GET_MODE (subexp)) % NBUCKETS, | |
2028 | GET_MODE (subexp)); | |
2029 | } | |
2030 | ||
2031 | if (relt == 0) | |
2032 | return 0; | |
2033 | ||
2034 | /* Search all related table entries for one that has an | |
2035 | equivalent register. */ | |
2036 | ||
2037 | p = relt; | |
2038 | while (1) | |
2039 | { | |
2040 | /* This loop is strange in that it is executed in two different cases. | |
2041 | The first is when X is already in the table. Then it is searching | |
2042 | the RELATED_VALUE list of X's class (RELT). The second case is when | |
2043 | X is not in the table. Then RELT points to a class for the related | |
2044 | value. | |
2045 | ||
2046 | Ensure that, whatever case we are in, that we ignore classes that have | |
2047 | the same value as X. */ | |
2048 | ||
2049 | if (rtx_equal_p (x, p->exp)) | |
2050 | q = 0; | |
2051 | else | |
2052 | for (q = p->first_same_value; q; q = q->next_same_value) | |
2053 | if (GET_CODE (q->exp) == REG) | |
2054 | break; | |
2055 | ||
2056 | if (q) | |
2057 | break; | |
2058 | ||
2059 | p = p->related_value; | |
2060 | ||
2061 | /* We went all the way around, so there is nothing to be found. | |
2062 | Alternatively, perhaps RELT was in the table for some other reason | |
2063 | and it has no related values recorded. */ | |
2064 | if (p == relt || p == 0) | |
2065 | break; | |
2066 | } | |
2067 | ||
2068 | if (q == 0) | |
2069 | return 0; | |
2070 | ||
2071 | offset = (get_integer_term (x) - get_integer_term (p->exp)); | |
2072 | /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */ | |
2073 | return plus_constant (q->exp, offset); | |
2074 | } | |
2075 | \f | |
2076 | /* Hash an rtx. We are careful to make sure the value is never negative. | |
2077 | Equivalent registers hash identically. | |
2078 | MODE is used in hashing for CONST_INTs only; | |
2079 | otherwise the mode of X is used. | |
2080 | ||
2081 | Store 1 in do_not_record if any subexpression is volatile. | |
2082 | ||
2083 | Store 1 in hash_arg_in_memory if X contains a MEM rtx | |
2084 | which does not have the RTX_UNCHANGING_P bit set. | |
7afe21cc RK |
2085 | |
2086 | Note that cse_insn knows that the hash code of a MEM expression | |
2087 | is just (int) MEM plus the hash code of the address. */ | |
2088 | ||
2197a88a | 2089 | static unsigned |
7afe21cc RK |
2090 | canon_hash (x, mode) |
2091 | rtx x; | |
2092 | enum machine_mode mode; | |
2093 | { | |
2094 | register int i, j; | |
2197a88a | 2095 | register unsigned hash = 0; |
7afe21cc | 2096 | register enum rtx_code code; |
6f7d635c | 2097 | register const char *fmt; |
7afe21cc RK |
2098 | |
2099 | /* repeat is used to turn tail-recursion into iteration. */ | |
2100 | repeat: | |
2101 | if (x == 0) | |
2102 | return hash; | |
2103 | ||
2104 | code = GET_CODE (x); | |
2105 | switch (code) | |
2106 | { | |
2107 | case REG: | |
2108 | { | |
2109 | register int regno = REGNO (x); | |
2110 | ||
2111 | /* On some machines, we can't record any non-fixed hard register, | |
2112 | because extending its life will cause reload problems. We | |
9a794e50 RH |
2113 | consider ap, fp, and sp to be fixed for this purpose. |
2114 | ||
2115 | We also consider CCmode registers to be fixed for this purpose; | |
2116 | failure to do so leads to failure to simplify 0<100 type of | |
2117 | conditionals. | |
2118 | ||
0f41302f | 2119 | On all machines, we can't record any global registers. */ |
7afe21cc RK |
2120 | |
2121 | if (regno < FIRST_PSEUDO_REGISTER | |
2122 | && (global_regs[regno] | |
f95182a4 ILT |
2123 | || (SMALL_REGISTER_CLASSES |
2124 | && ! fixed_regs[regno] | |
7afe21cc | 2125 | && regno != FRAME_POINTER_REGNUM |
8bc169f2 | 2126 | && regno != HARD_FRAME_POINTER_REGNUM |
7afe21cc | 2127 | && regno != ARG_POINTER_REGNUM |
9a794e50 RH |
2128 | && regno != STACK_POINTER_REGNUM |
2129 | && GET_MODE_CLASS (GET_MODE (x)) != MODE_CC))) | |
7afe21cc RK |
2130 | { |
2131 | do_not_record = 1; | |
2132 | return 0; | |
2133 | } | |
30f72379 | 2134 | hash += ((unsigned) REG << 7) + (unsigned) REG_QTY (regno); |
2197a88a | 2135 | return hash; |
7afe21cc RK |
2136 | } |
2137 | ||
34c73909 R |
2138 | /* We handle SUBREG of a REG specially because the underlying |
2139 | reg changes its hash value with every value change; we don't | |
2140 | want to have to forget unrelated subregs when one subreg changes. */ | |
2141 | case SUBREG: | |
2142 | { | |
2143 | if (GET_CODE (SUBREG_REG (x)) == REG) | |
2144 | { | |
2145 | hash += (((unsigned) SUBREG << 7) | |
2146 | + REGNO (SUBREG_REG (x)) + SUBREG_WORD (x)); | |
2147 | return hash; | |
2148 | } | |
2149 | break; | |
2150 | } | |
2151 | ||
7afe21cc | 2152 | case CONST_INT: |
2197a88a RK |
2153 | { |
2154 | unsigned HOST_WIDE_INT tem = INTVAL (x); | |
2155 | hash += ((unsigned) CONST_INT << 7) + (unsigned) mode + tem; | |
2156 | return hash; | |
2157 | } | |
7afe21cc RK |
2158 | |
2159 | case CONST_DOUBLE: | |
2160 | /* This is like the general case, except that it only counts | |
2161 | the integers representing the constant. */ | |
2197a88a | 2162 | hash += (unsigned) code + (unsigned) GET_MODE (x); |
969c8517 RK |
2163 | if (GET_MODE (x) != VOIDmode) |
2164 | for (i = 2; i < GET_RTX_LENGTH (CONST_DOUBLE); i++) | |
2165 | { | |
ef178af3 | 2166 | unsigned HOST_WIDE_INT tem = XWINT (x, i); |
969c8517 RK |
2167 | hash += tem; |
2168 | } | |
2169 | else | |
2170 | hash += ((unsigned) CONST_DOUBLE_LOW (x) | |
2171 | + (unsigned) CONST_DOUBLE_HIGH (x)); | |
7afe21cc RK |
2172 | return hash; |
2173 | ||
2174 | /* Assume there is only one rtx object for any given label. */ | |
2175 | case LABEL_REF: | |
3c543775 | 2176 | hash |
7bcac048 | 2177 | += ((unsigned) LABEL_REF << 7) + (unsigned long) XEXP (x, 0); |
2197a88a | 2178 | return hash; |
7afe21cc RK |
2179 | |
2180 | case SYMBOL_REF: | |
3c543775 | 2181 | hash |
7bcac048 | 2182 | += ((unsigned) SYMBOL_REF << 7) + (unsigned long) XSTR (x, 0); |
2197a88a | 2183 | return hash; |
7afe21cc RK |
2184 | |
2185 | case MEM: | |
14a774a9 RK |
2186 | /* We don't record if marked volatile or if BLKmode since we don't |
2187 | know the size of the move. */ | |
2188 | if (MEM_VOLATILE_P (x) || GET_MODE (x) == BLKmode) | |
7afe21cc RK |
2189 | { |
2190 | do_not_record = 1; | |
2191 | return 0; | |
2192 | } | |
9ad91d71 | 2193 | if (! RTX_UNCHANGING_P (x) || FIXED_BASE_PLUS_P (XEXP (x, 0))) |
7afe21cc RK |
2194 | { |
2195 | hash_arg_in_memory = 1; | |
7afe21cc RK |
2196 | } |
2197 | /* Now that we have already found this special case, | |
2198 | might as well speed it up as much as possible. */ | |
2197a88a | 2199 | hash += (unsigned) MEM; |
7afe21cc RK |
2200 | x = XEXP (x, 0); |
2201 | goto repeat; | |
2202 | ||
2203 | case PRE_DEC: | |
2204 | case PRE_INC: | |
2205 | case POST_DEC: | |
2206 | case POST_INC: | |
2207 | case PC: | |
2208 | case CC0: | |
2209 | case CALL: | |
2210 | case UNSPEC_VOLATILE: | |
2211 | do_not_record = 1; | |
2212 | return 0; | |
2213 | ||
2214 | case ASM_OPERANDS: | |
2215 | if (MEM_VOLATILE_P (x)) | |
2216 | { | |
2217 | do_not_record = 1; | |
2218 | return 0; | |
2219 | } | |
e9a25f70 JL |
2220 | break; |
2221 | ||
2222 | default: | |
2223 | break; | |
7afe21cc RK |
2224 | } |
2225 | ||
2226 | i = GET_RTX_LENGTH (code) - 1; | |
2197a88a | 2227 | hash += (unsigned) code + (unsigned) GET_MODE (x); |
7afe21cc RK |
2228 | fmt = GET_RTX_FORMAT (code); |
2229 | for (; i >= 0; i--) | |
2230 | { | |
2231 | if (fmt[i] == 'e') | |
2232 | { | |
2233 | rtx tem = XEXP (x, i); | |
7afe21cc RK |
2234 | |
2235 | /* If we are about to do the last recursive call | |
2236 | needed at this level, change it into iteration. | |
2237 | This function is called enough to be worth it. */ | |
2238 | if (i == 0) | |
2239 | { | |
2240 | x = tem; | |
2241 | goto repeat; | |
2242 | } | |
2243 | hash += canon_hash (tem, 0); | |
2244 | } | |
2245 | else if (fmt[i] == 'E') | |
2246 | for (j = 0; j < XVECLEN (x, i); j++) | |
2247 | hash += canon_hash (XVECEXP (x, i, j), 0); | |
2248 | else if (fmt[i] == 's') | |
2249 | { | |
2197a88a | 2250 | register unsigned char *p = (unsigned char *) XSTR (x, i); |
7afe21cc RK |
2251 | if (p) |
2252 | while (*p) | |
2197a88a | 2253 | hash += *p++; |
7afe21cc RK |
2254 | } |
2255 | else if (fmt[i] == 'i') | |
2256 | { | |
2197a88a RK |
2257 | register unsigned tem = XINT (x, i); |
2258 | hash += tem; | |
7afe21cc | 2259 | } |
8f985ec4 | 2260 | else if (fmt[i] == '0' || fmt[i] == 't') |
e9a25f70 | 2261 | /* unused */; |
7afe21cc RK |
2262 | else |
2263 | abort (); | |
2264 | } | |
2265 | return hash; | |
2266 | } | |
2267 | ||
2268 | /* Like canon_hash but with no side effects. */ | |
2269 | ||
2197a88a | 2270 | static unsigned |
7afe21cc RK |
2271 | safe_hash (x, mode) |
2272 | rtx x; | |
2273 | enum machine_mode mode; | |
2274 | { | |
2275 | int save_do_not_record = do_not_record; | |
2276 | int save_hash_arg_in_memory = hash_arg_in_memory; | |
2197a88a | 2277 | unsigned hash = canon_hash (x, mode); |
7afe21cc | 2278 | hash_arg_in_memory = save_hash_arg_in_memory; |
7afe21cc RK |
2279 | do_not_record = save_do_not_record; |
2280 | return hash; | |
2281 | } | |
2282 | \f | |
2283 | /* Return 1 iff X and Y would canonicalize into the same thing, | |
2284 | without actually constructing the canonicalization of either one. | |
2285 | If VALIDATE is nonzero, | |
2286 | we assume X is an expression being processed from the rtl | |
2287 | and Y was found in the hash table. We check register refs | |
2288 | in Y for being marked as valid. | |
2289 | ||
2290 | If EQUAL_VALUES is nonzero, we allow a register to match a constant value | |
2291 | that is known to be in the register. Ordinarily, we don't allow them | |
2292 | to match, because letting them match would cause unpredictable results | |
2293 | in all the places that search a hash table chain for an equivalent | |
2294 | for a given value. A possible equivalent that has different structure | |
2295 | has its hash code computed from different data. Whether the hash code | |
38e01259 | 2296 | is the same as that of the given value is pure luck. */ |
7afe21cc RK |
2297 | |
2298 | static int | |
2299 | exp_equiv_p (x, y, validate, equal_values) | |
2300 | rtx x, y; | |
2301 | int validate; | |
2302 | int equal_values; | |
2303 | { | |
906c4e36 | 2304 | register int i, j; |
7afe21cc | 2305 | register enum rtx_code code; |
6f7d635c | 2306 | register const char *fmt; |
7afe21cc RK |
2307 | |
2308 | /* Note: it is incorrect to assume an expression is equivalent to itself | |
2309 | if VALIDATE is nonzero. */ | |
2310 | if (x == y && !validate) | |
2311 | return 1; | |
2312 | if (x == 0 || y == 0) | |
2313 | return x == y; | |
2314 | ||
2315 | code = GET_CODE (x); | |
2316 | if (code != GET_CODE (y)) | |
2317 | { | |
2318 | if (!equal_values) | |
2319 | return 0; | |
2320 | ||
2321 | /* If X is a constant and Y is a register or vice versa, they may be | |
2322 | equivalent. We only have to validate if Y is a register. */ | |
2323 | if (CONSTANT_P (x) && GET_CODE (y) == REG | |
2324 | && REGNO_QTY_VALID_P (REGNO (y)) | |
30f72379 MM |
2325 | && GET_MODE (y) == qty_mode[REG_QTY (REGNO (y))] |
2326 | && rtx_equal_p (x, qty_const[REG_QTY (REGNO (y))]) | |
2327 | && (! validate || REG_IN_TABLE (REGNO (y)) == REG_TICK (REGNO (y)))) | |
7afe21cc RK |
2328 | return 1; |
2329 | ||
2330 | if (CONSTANT_P (y) && code == REG | |
2331 | && REGNO_QTY_VALID_P (REGNO (x)) | |
30f72379 MM |
2332 | && GET_MODE (x) == qty_mode[REG_QTY (REGNO (x))] |
2333 | && rtx_equal_p (y, qty_const[REG_QTY (REGNO (x))])) | |
7afe21cc RK |
2334 | return 1; |
2335 | ||
2336 | return 0; | |
2337 | } | |
2338 | ||
2339 | /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */ | |
2340 | if (GET_MODE (x) != GET_MODE (y)) | |
2341 | return 0; | |
2342 | ||
2343 | switch (code) | |
2344 | { | |
2345 | case PC: | |
2346 | case CC0: | |
2347 | return x == y; | |
2348 | ||
2349 | case CONST_INT: | |
58c8c593 | 2350 | return INTVAL (x) == INTVAL (y); |
7afe21cc RK |
2351 | |
2352 | case LABEL_REF: | |
7afe21cc RK |
2353 | return XEXP (x, 0) == XEXP (y, 0); |
2354 | ||
f54d4924 RK |
2355 | case SYMBOL_REF: |
2356 | return XSTR (x, 0) == XSTR (y, 0); | |
2357 | ||
7afe21cc RK |
2358 | case REG: |
2359 | { | |
2360 | int regno = REGNO (y); | |
2361 | int endregno | |
2362 | = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1 | |
2363 | : HARD_REGNO_NREGS (regno, GET_MODE (y))); | |
2364 | int i; | |
2365 | ||
2366 | /* If the quantities are not the same, the expressions are not | |
2367 | equivalent. If there are and we are not to validate, they | |
2368 | are equivalent. Otherwise, ensure all regs are up-to-date. */ | |
2369 | ||
30f72379 | 2370 | if (REG_QTY (REGNO (x)) != REG_QTY (regno)) |
7afe21cc RK |
2371 | return 0; |
2372 | ||
2373 | if (! validate) | |
2374 | return 1; | |
2375 | ||
2376 | for (i = regno; i < endregno; i++) | |
30f72379 | 2377 | if (REG_IN_TABLE (i) != REG_TICK (i)) |
7afe21cc RK |
2378 | return 0; |
2379 | ||
2380 | return 1; | |
2381 | } | |
2382 | ||
2383 | /* For commutative operations, check both orders. */ | |
2384 | case PLUS: | |
2385 | case MULT: | |
2386 | case AND: | |
2387 | case IOR: | |
2388 | case XOR: | |
2389 | case NE: | |
2390 | case EQ: | |
2391 | return ((exp_equiv_p (XEXP (x, 0), XEXP (y, 0), validate, equal_values) | |
2392 | && exp_equiv_p (XEXP (x, 1), XEXP (y, 1), | |
2393 | validate, equal_values)) | |
2394 | || (exp_equiv_p (XEXP (x, 0), XEXP (y, 1), | |
2395 | validate, equal_values) | |
2396 | && exp_equiv_p (XEXP (x, 1), XEXP (y, 0), | |
2397 | validate, equal_values))); | |
e9a25f70 JL |
2398 | |
2399 | default: | |
2400 | break; | |
7afe21cc RK |
2401 | } |
2402 | ||
2403 | /* Compare the elements. If any pair of corresponding elements | |
2404 | fail to match, return 0 for the whole things. */ | |
2405 | ||
2406 | fmt = GET_RTX_FORMAT (code); | |
2407 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
2408 | { | |
906c4e36 | 2409 | switch (fmt[i]) |
7afe21cc | 2410 | { |
906c4e36 | 2411 | case 'e': |
7afe21cc RK |
2412 | if (! exp_equiv_p (XEXP (x, i), XEXP (y, i), validate, equal_values)) |
2413 | return 0; | |
906c4e36 RK |
2414 | break; |
2415 | ||
2416 | case 'E': | |
7afe21cc RK |
2417 | if (XVECLEN (x, i) != XVECLEN (y, i)) |
2418 | return 0; | |
2419 | for (j = 0; j < XVECLEN (x, i); j++) | |
2420 | if (! exp_equiv_p (XVECEXP (x, i, j), XVECEXP (y, i, j), | |
2421 | validate, equal_values)) | |
2422 | return 0; | |
906c4e36 RK |
2423 | break; |
2424 | ||
2425 | case 's': | |
7afe21cc RK |
2426 | if (strcmp (XSTR (x, i), XSTR (y, i))) |
2427 | return 0; | |
906c4e36 RK |
2428 | break; |
2429 | ||
2430 | case 'i': | |
7afe21cc RK |
2431 | if (XINT (x, i) != XINT (y, i)) |
2432 | return 0; | |
906c4e36 RK |
2433 | break; |
2434 | ||
2435 | case 'w': | |
2436 | if (XWINT (x, i) != XWINT (y, i)) | |
2437 | return 0; | |
2438 | break; | |
2439 | ||
2440 | case '0': | |
8f985ec4 | 2441 | case 't': |
906c4e36 RK |
2442 | break; |
2443 | ||
2444 | default: | |
2445 | abort (); | |
7afe21cc | 2446 | } |
906c4e36 RK |
2447 | } |
2448 | ||
7afe21cc RK |
2449 | return 1; |
2450 | } | |
2451 | \f | |
9ae8ffe7 JL |
2452 | /* Return 1 if X has a value that can vary even between two |
2453 | executions of the program. 0 means X can be compared reliably | |
2454 | against certain constants or near-constants. */ | |
7afe21cc RK |
2455 | |
2456 | static int | |
9ae8ffe7 JL |
2457 | cse_rtx_varies_p (x) |
2458 | register rtx x; | |
7afe21cc RK |
2459 | { |
2460 | /* We need not check for X and the equivalence class being of the same | |
2461 | mode because if X is equivalent to a constant in some mode, it | |
2462 | doesn't vary in any mode. */ | |
2463 | ||
9ae8ffe7 JL |
2464 | if (GET_CODE (x) == REG |
2465 | && REGNO_QTY_VALID_P (REGNO (x)) | |
30f72379 MM |
2466 | && GET_MODE (x) == qty_mode[REG_QTY (REGNO (x))] |
2467 | && qty_const[REG_QTY (REGNO (x))] != 0) | |
7afe21cc RK |
2468 | return 0; |
2469 | ||
9ae8ffe7 JL |
2470 | if (GET_CODE (x) == PLUS |
2471 | && GET_CODE (XEXP (x, 1)) == CONST_INT | |
2472 | && GET_CODE (XEXP (x, 0)) == REG | |
2473 | && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))) | |
2474 | && (GET_MODE (XEXP (x, 0)) | |
30f72379 MM |
2475 | == qty_mode[REG_QTY (REGNO (XEXP (x, 0)))]) |
2476 | && qty_const[REG_QTY (REGNO (XEXP (x, 0)))]) | |
7afe21cc RK |
2477 | return 0; |
2478 | ||
9c6b0bae RK |
2479 | /* This can happen as the result of virtual register instantiation, if |
2480 | the initial constant is too large to be a valid address. This gives | |
2481 | us a three instruction sequence, load large offset into a register, | |
2482 | load fp minus a constant into a register, then a MEM which is the | |
2483 | sum of the two `constant' registers. */ | |
9ae8ffe7 JL |
2484 | if (GET_CODE (x) == PLUS |
2485 | && GET_CODE (XEXP (x, 0)) == REG | |
2486 | && GET_CODE (XEXP (x, 1)) == REG | |
2487 | && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))) | |
2488 | && (GET_MODE (XEXP (x, 0)) | |
30f72379 MM |
2489 | == qty_mode[REG_QTY (REGNO (XEXP (x, 0)))]) |
2490 | && qty_const[REG_QTY (REGNO (XEXP (x, 0)))] | |
9ae8ffe7 JL |
2491 | && REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))) |
2492 | && (GET_MODE (XEXP (x, 1)) | |
30f72379 MM |
2493 | == qty_mode[REG_QTY (REGNO (XEXP (x, 1)))]) |
2494 | && qty_const[REG_QTY (REGNO (XEXP (x, 1)))]) | |
9c6b0bae RK |
2495 | return 0; |
2496 | ||
9ae8ffe7 | 2497 | return rtx_varies_p (x); |
7afe21cc RK |
2498 | } |
2499 | \f | |
2500 | /* Canonicalize an expression: | |
2501 | replace each register reference inside it | |
2502 | with the "oldest" equivalent register. | |
2503 | ||
2504 | If INSN is non-zero and we are replacing a pseudo with a hard register | |
7722328e RK |
2505 | or vice versa, validate_change is used to ensure that INSN remains valid |
2506 | after we make our substitution. The calls are made with IN_GROUP non-zero | |
2507 | so apply_change_group must be called upon the outermost return from this | |
2508 | function (unless INSN is zero). The result of apply_change_group can | |
2509 | generally be discarded since the changes we are making are optional. */ | |
7afe21cc RK |
2510 | |
2511 | static rtx | |
2512 | canon_reg (x, insn) | |
2513 | rtx x; | |
2514 | rtx insn; | |
2515 | { | |
2516 | register int i; | |
2517 | register enum rtx_code code; | |
6f7d635c | 2518 | register const char *fmt; |
7afe21cc RK |
2519 | |
2520 | if (x == 0) | |
2521 | return x; | |
2522 | ||
2523 | code = GET_CODE (x); | |
2524 | switch (code) | |
2525 | { | |
2526 | case PC: | |
2527 | case CC0: | |
2528 | case CONST: | |
2529 | case CONST_INT: | |
2530 | case CONST_DOUBLE: | |
2531 | case SYMBOL_REF: | |
2532 | case LABEL_REF: | |
2533 | case ADDR_VEC: | |
2534 | case ADDR_DIFF_VEC: | |
2535 | return x; | |
2536 | ||
2537 | case REG: | |
2538 | { | |
2539 | register int first; | |
2540 | ||
2541 | /* Never replace a hard reg, because hard regs can appear | |
2542 | in more than one machine mode, and we must preserve the mode | |
2543 | of each occurrence. Also, some hard regs appear in | |
2544 | MEMs that are shared and mustn't be altered. Don't try to | |
2545 | replace any reg that maps to a reg of class NO_REGS. */ | |
2546 | if (REGNO (x) < FIRST_PSEUDO_REGISTER | |
2547 | || ! REGNO_QTY_VALID_P (REGNO (x))) | |
2548 | return x; | |
2549 | ||
30f72379 | 2550 | first = qty_first_reg[REG_QTY (REGNO (x))]; |
7afe21cc RK |
2551 | return (first >= FIRST_PSEUDO_REGISTER ? regno_reg_rtx[first] |
2552 | : REGNO_REG_CLASS (first) == NO_REGS ? x | |
30f72379 | 2553 | : gen_rtx_REG (qty_mode[REG_QTY (REGNO (x))], first)); |
7afe21cc | 2554 | } |
e9a25f70 JL |
2555 | |
2556 | default: | |
2557 | break; | |
7afe21cc RK |
2558 | } |
2559 | ||
2560 | fmt = GET_RTX_FORMAT (code); | |
2561 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
2562 | { | |
2563 | register int j; | |
2564 | ||
2565 | if (fmt[i] == 'e') | |
2566 | { | |
2567 | rtx new = canon_reg (XEXP (x, i), insn); | |
58873255 | 2568 | int insn_code; |
7afe21cc RK |
2569 | |
2570 | /* If replacing pseudo with hard reg or vice versa, ensure the | |
178c39f6 | 2571 | insn remains valid. Likewise if the insn has MATCH_DUPs. */ |
aee9dc31 RS |
2572 | if (insn != 0 && new != 0 |
2573 | && GET_CODE (new) == REG && GET_CODE (XEXP (x, i)) == REG | |
178c39f6 RK |
2574 | && (((REGNO (new) < FIRST_PSEUDO_REGISTER) |
2575 | != (REGNO (XEXP (x, i)) < FIRST_PSEUDO_REGISTER)) | |
58873255 | 2576 | || (insn_code = recog_memoized (insn)) < 0 |
a995e389 | 2577 | || insn_data[insn_code].n_dups > 0)) |
77fa0940 | 2578 | validate_change (insn, &XEXP (x, i), new, 1); |
7afe21cc RK |
2579 | else |
2580 | XEXP (x, i) = new; | |
2581 | } | |
2582 | else if (fmt[i] == 'E') | |
2583 | for (j = 0; j < XVECLEN (x, i); j++) | |
2584 | XVECEXP (x, i, j) = canon_reg (XVECEXP (x, i, j), insn); | |
2585 | } | |
2586 | ||
2587 | return x; | |
2588 | } | |
2589 | \f | |
a2cabb29 | 2590 | /* LOC is a location within INSN that is an operand address (the contents of |
7afe21cc RK |
2591 | a MEM). Find the best equivalent address to use that is valid for this |
2592 | insn. | |
2593 | ||
2594 | On most CISC machines, complicated address modes are costly, and rtx_cost | |
2595 | is a good approximation for that cost. However, most RISC machines have | |
2596 | only a few (usually only one) memory reference formats. If an address is | |
2597 | valid at all, it is often just as cheap as any other address. Hence, for | |
2598 | RISC machines, we use the configuration macro `ADDRESS_COST' to compare the | |
2599 | costs of various addresses. For two addresses of equal cost, choose the one | |
2600 | with the highest `rtx_cost' value as that has the potential of eliminating | |
2601 | the most insns. For equal costs, we choose the first in the equivalence | |
2602 | class. Note that we ignore the fact that pseudo registers are cheaper | |
2603 | than hard registers here because we would also prefer the pseudo registers. | |
2604 | */ | |
2605 | ||
6cd4575e | 2606 | static void |
7afe21cc RK |
2607 | find_best_addr (insn, loc) |
2608 | rtx insn; | |
2609 | rtx *loc; | |
2610 | { | |
7a87758d | 2611 | struct table_elt *elt; |
7afe21cc | 2612 | rtx addr = *loc; |
7a87758d AS |
2613 | #ifdef ADDRESS_COST |
2614 | struct table_elt *p; | |
7afe21cc | 2615 | int found_better = 1; |
7a87758d | 2616 | #endif |
7afe21cc RK |
2617 | int save_do_not_record = do_not_record; |
2618 | int save_hash_arg_in_memory = hash_arg_in_memory; | |
7afe21cc RK |
2619 | int addr_volatile; |
2620 | int regno; | |
2197a88a | 2621 | unsigned hash; |
7afe21cc RK |
2622 | |
2623 | /* Do not try to replace constant addresses or addresses of local and | |
2624 | argument slots. These MEM expressions are made only once and inserted | |
2625 | in many instructions, as well as being used to control symbol table | |
2626 | output. It is not safe to clobber them. | |
2627 | ||
2628 | There are some uncommon cases where the address is already in a register | |
2629 | for some reason, but we cannot take advantage of that because we have | |
2630 | no easy way to unshare the MEM. In addition, looking up all stack | |
2631 | addresses is costly. */ | |
2632 | if ((GET_CODE (addr) == PLUS | |
2633 | && GET_CODE (XEXP (addr, 0)) == REG | |
2634 | && GET_CODE (XEXP (addr, 1)) == CONST_INT | |
2635 | && (regno = REGNO (XEXP (addr, 0)), | |
8bc169f2 DE |
2636 | regno == FRAME_POINTER_REGNUM || regno == HARD_FRAME_POINTER_REGNUM |
2637 | || regno == ARG_POINTER_REGNUM)) | |
7afe21cc | 2638 | || (GET_CODE (addr) == REG |
8bc169f2 DE |
2639 | && (regno = REGNO (addr), regno == FRAME_POINTER_REGNUM |
2640 | || regno == HARD_FRAME_POINTER_REGNUM | |
2641 | || regno == ARG_POINTER_REGNUM)) | |
e9a25f70 | 2642 | || GET_CODE (addr) == ADDRESSOF |
7afe21cc RK |
2643 | || CONSTANT_ADDRESS_P (addr)) |
2644 | return; | |
2645 | ||
2646 | /* If this address is not simply a register, try to fold it. This will | |
2647 | sometimes simplify the expression. Many simplifications | |
2648 | will not be valid, but some, usually applying the associative rule, will | |
2649 | be valid and produce better code. */ | |
8c87f107 RK |
2650 | if (GET_CODE (addr) != REG) |
2651 | { | |
2652 | rtx folded = fold_rtx (copy_rtx (addr), NULL_RTX); | |
2653 | ||
2654 | if (1 | |
2655 | #ifdef ADDRESS_COST | |
2f541799 MM |
2656 | && (CSE_ADDRESS_COST (folded) < CSE_ADDRESS_COST (addr) |
2657 | || (CSE_ADDRESS_COST (folded) == CSE_ADDRESS_COST (addr) | |
9a252d29 | 2658 | && rtx_cost (folded, MEM) > rtx_cost (addr, MEM))) |
8c87f107 | 2659 | #else |
9a252d29 | 2660 | && rtx_cost (folded, MEM) < rtx_cost (addr, MEM) |
8c87f107 RK |
2661 | #endif |
2662 | && validate_change (insn, loc, folded, 0)) | |
2663 | addr = folded; | |
2664 | } | |
7afe21cc | 2665 | |
42495ca0 RK |
2666 | /* If this address is not in the hash table, we can't look for equivalences |
2667 | of the whole address. Also, ignore if volatile. */ | |
2668 | ||
7afe21cc | 2669 | do_not_record = 0; |
2197a88a | 2670 | hash = HASH (addr, Pmode); |
7afe21cc RK |
2671 | addr_volatile = do_not_record; |
2672 | do_not_record = save_do_not_record; | |
2673 | hash_arg_in_memory = save_hash_arg_in_memory; | |
7afe21cc RK |
2674 | |
2675 | if (addr_volatile) | |
2676 | return; | |
2677 | ||
2197a88a | 2678 | elt = lookup (addr, hash, Pmode); |
7afe21cc | 2679 | |
7afe21cc | 2680 | #ifndef ADDRESS_COST |
42495ca0 RK |
2681 | if (elt) |
2682 | { | |
2d8b0f3a | 2683 | int our_cost = elt->cost; |
42495ca0 RK |
2684 | |
2685 | /* Find the lowest cost below ours that works. */ | |
2686 | for (elt = elt->first_same_value; elt; elt = elt->next_same_value) | |
2687 | if (elt->cost < our_cost | |
2688 | && (GET_CODE (elt->exp) == REG | |
2689 | || exp_equiv_p (elt->exp, elt->exp, 1, 0)) | |
2690 | && validate_change (insn, loc, | |
906c4e36 | 2691 | canon_reg (copy_rtx (elt->exp), NULL_RTX), 0)) |
42495ca0 RK |
2692 | return; |
2693 | } | |
2694 | #else | |
7afe21cc | 2695 | |
42495ca0 RK |
2696 | if (elt) |
2697 | { | |
2698 | /* We need to find the best (under the criteria documented above) entry | |
2699 | in the class that is valid. We use the `flag' field to indicate | |
2700 | choices that were invalid and iterate until we can't find a better | |
2701 | one that hasn't already been tried. */ | |
7afe21cc | 2702 | |
42495ca0 RK |
2703 | for (p = elt->first_same_value; p; p = p->next_same_value) |
2704 | p->flag = 0; | |
7afe21cc | 2705 | |
42495ca0 RK |
2706 | while (found_better) |
2707 | { | |
2f541799 | 2708 | int best_addr_cost = CSE_ADDRESS_COST (*loc); |
42495ca0 RK |
2709 | int best_rtx_cost = (elt->cost + 1) >> 1; |
2710 | struct table_elt *best_elt = elt; | |
2711 | ||
2712 | found_better = 0; | |
2713 | for (p = elt->first_same_value; p; p = p->next_same_value) | |
2f541799 | 2714 | if (! p->flag) |
42495ca0 | 2715 | { |
2f541799 MM |
2716 | if ((GET_CODE (p->exp) == REG |
2717 | || exp_equiv_p (p->exp, p->exp, 1, 0)) | |
2718 | && (CSE_ADDRESS_COST (p->exp) < best_addr_cost | |
2719 | || (CSE_ADDRESS_COST (p->exp) == best_addr_cost | |
2720 | && (p->cost + 1) >> 1 > best_rtx_cost))) | |
2721 | { | |
2722 | found_better = 1; | |
2723 | best_addr_cost = CSE_ADDRESS_COST (p->exp); | |
2724 | best_rtx_cost = (p->cost + 1) >> 1; | |
2725 | best_elt = p; | |
2726 | } | |
42495ca0 | 2727 | } |
7afe21cc | 2728 | |
42495ca0 RK |
2729 | if (found_better) |
2730 | { | |
2731 | if (validate_change (insn, loc, | |
906c4e36 RK |
2732 | canon_reg (copy_rtx (best_elt->exp), |
2733 | NULL_RTX), 0)) | |
42495ca0 RK |
2734 | return; |
2735 | else | |
2736 | best_elt->flag = 1; | |
2737 | } | |
2738 | } | |
2739 | } | |
7afe21cc | 2740 | |
42495ca0 RK |
2741 | /* If the address is a binary operation with the first operand a register |
2742 | and the second a constant, do the same as above, but looking for | |
2743 | equivalences of the register. Then try to simplify before checking for | |
2744 | the best address to use. This catches a few cases: First is when we | |
2745 | have REG+const and the register is another REG+const. We can often merge | |
2746 | the constants and eliminate one insn and one register. It may also be | |
2747 | that a machine has a cheap REG+REG+const. Finally, this improves the | |
2748 | code on the Alpha for unaligned byte stores. */ | |
2749 | ||
2750 | if (flag_expensive_optimizations | |
2751 | && (GET_RTX_CLASS (GET_CODE (*loc)) == '2' | |
2752 | || GET_RTX_CLASS (GET_CODE (*loc)) == 'c') | |
2753 | && GET_CODE (XEXP (*loc, 0)) == REG | |
2754 | && GET_CODE (XEXP (*loc, 1)) == CONST_INT) | |
7afe21cc | 2755 | { |
42495ca0 RK |
2756 | rtx c = XEXP (*loc, 1); |
2757 | ||
2758 | do_not_record = 0; | |
2197a88a | 2759 | hash = HASH (XEXP (*loc, 0), Pmode); |
42495ca0 RK |
2760 | do_not_record = save_do_not_record; |
2761 | hash_arg_in_memory = save_hash_arg_in_memory; | |
42495ca0 | 2762 | |
2197a88a | 2763 | elt = lookup (XEXP (*loc, 0), hash, Pmode); |
42495ca0 RK |
2764 | if (elt == 0) |
2765 | return; | |
2766 | ||
2767 | /* We need to find the best (under the criteria documented above) entry | |
2768 | in the class that is valid. We use the `flag' field to indicate | |
2769 | choices that were invalid and iterate until we can't find a better | |
2770 | one that hasn't already been tried. */ | |
7afe21cc | 2771 | |
7afe21cc | 2772 | for (p = elt->first_same_value; p; p = p->next_same_value) |
42495ca0 | 2773 | p->flag = 0; |
7afe21cc | 2774 | |
42495ca0 | 2775 | while (found_better) |
7afe21cc | 2776 | { |
2f541799 | 2777 | int best_addr_cost = CSE_ADDRESS_COST (*loc); |
42495ca0 RK |
2778 | int best_rtx_cost = (COST (*loc) + 1) >> 1; |
2779 | struct table_elt *best_elt = elt; | |
2780 | rtx best_rtx = *loc; | |
f6516aee JW |
2781 | int count; |
2782 | ||
2783 | /* This is at worst case an O(n^2) algorithm, so limit our search | |
2784 | to the first 32 elements on the list. This avoids trouble | |
2785 | compiling code with very long basic blocks that can easily | |
0cedb36c JL |
2786 | call simplify_gen_binary so many times that we run out of |
2787 | memory. */ | |
96b0e481 | 2788 | |
0cedb36c JL |
2789 | found_better = 0; |
2790 | for (p = elt->first_same_value, count = 0; | |
2791 | p && count < 32; | |
2792 | p = p->next_same_value, count++) | |
2793 | if (! p->flag | |
2794 | && (GET_CODE (p->exp) == REG | |
2795 | || exp_equiv_p (p->exp, p->exp, 1, 0))) | |
2796 | { | |
2797 | rtx new = simplify_gen_binary (GET_CODE (*loc), Pmode, | |
2798 | p->exp, c); | |
96b0e481 | 2799 | |
0cedb36c JL |
2800 | if ((CSE_ADDRESS_COST (new) < best_addr_cost |
2801 | || (CSE_ADDRESS_COST (new) == best_addr_cost | |
2802 | && (COST (new) + 1) >> 1 > best_rtx_cost))) | |
2803 | { | |
2804 | found_better = 1; | |
2805 | best_addr_cost = CSE_ADDRESS_COST (new); | |
2806 | best_rtx_cost = (COST (new) + 1) >> 1; | |
2807 | best_elt = p; | |
2808 | best_rtx = new; | |
2809 | } | |
2810 | } | |
96b0e481 | 2811 | |
0cedb36c JL |
2812 | if (found_better) |
2813 | { | |
2814 | if (validate_change (insn, loc, | |
2815 | canon_reg (copy_rtx (best_rtx), | |
2816 | NULL_RTX), 0)) | |
2817 | return; | |
2818 | else | |
2819 | best_elt->flag = 1; | |
2820 | } | |
2821 | } | |
2822 | } | |
2823 | #endif | |
96b0e481 RK |
2824 | } |
2825 | \f | |
0cedb36c JL |
2826 | /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison |
2827 | operation (EQ, NE, GT, etc.), follow it back through the hash table and | |
2828 | what values are being compared. | |
1a87eea2 | 2829 | |
0cedb36c JL |
2830 | *PARG1 and *PARG2 are updated to contain the rtx representing the values |
2831 | actually being compared. For example, if *PARG1 was (cc0) and *PARG2 | |
2832 | was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were | |
2833 | compared to produce cc0. | |
a432f20d | 2834 | |
0cedb36c JL |
2835 | The return value is the comparison operator and is either the code of |
2836 | A or the code corresponding to the inverse of the comparison. */ | |
7afe21cc | 2837 | |
0cedb36c JL |
2838 | static enum rtx_code |
2839 | find_comparison_args (code, parg1, parg2, pmode1, pmode2) | |
7afe21cc | 2840 | enum rtx_code code; |
0cedb36c JL |
2841 | rtx *parg1, *parg2; |
2842 | enum machine_mode *pmode1, *pmode2; | |
7afe21cc | 2843 | { |
0cedb36c | 2844 | rtx arg1, arg2; |
1a87eea2 | 2845 | |
0cedb36c | 2846 | arg1 = *parg1, arg2 = *parg2; |
7afe21cc | 2847 | |
0cedb36c | 2848 | /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */ |
7afe21cc | 2849 | |
0cedb36c | 2850 | while (arg2 == CONST0_RTX (GET_MODE (arg1))) |
a432f20d | 2851 | { |
0cedb36c JL |
2852 | /* Set non-zero when we find something of interest. */ |
2853 | rtx x = 0; | |
2854 | int reverse_code = 0; | |
2855 | struct table_elt *p = 0; | |
6076248a | 2856 | |
0cedb36c JL |
2857 | /* If arg1 is a COMPARE, extract the comparison arguments from it. |
2858 | On machines with CC0, this is the only case that can occur, since | |
2859 | fold_rtx will return the COMPARE or item being compared with zero | |
2860 | when given CC0. */ | |
6076248a | 2861 | |
0cedb36c JL |
2862 | if (GET_CODE (arg1) == COMPARE && arg2 == const0_rtx) |
2863 | x = arg1; | |
6076248a | 2864 | |
0cedb36c JL |
2865 | /* If ARG1 is a comparison operator and CODE is testing for |
2866 | STORE_FLAG_VALUE, get the inner arguments. */ | |
a432f20d | 2867 | |
0cedb36c | 2868 | else if (GET_RTX_CLASS (GET_CODE (arg1)) == '<') |
7afe21cc | 2869 | { |
0cedb36c JL |
2870 | if (code == NE |
2871 | || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT | |
2872 | && code == LT && STORE_FLAG_VALUE == -1) | |
2873 | #ifdef FLOAT_STORE_FLAG_VALUE | |
2874 | || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT | |
2875 | && FLOAT_STORE_FLAG_VALUE < 0) | |
7afe21cc | 2876 | #endif |
a432f20d | 2877 | ) |
0cedb36c JL |
2878 | x = arg1; |
2879 | else if (code == EQ | |
2880 | || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT | |
2881 | && code == GE && STORE_FLAG_VALUE == -1) | |
2882 | #ifdef FLOAT_STORE_FLAG_VALUE | |
2883 | || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT | |
2884 | && FLOAT_STORE_FLAG_VALUE < 0) | |
2885 | #endif | |
2886 | ) | |
2887 | x = arg1, reverse_code = 1; | |
7afe21cc RK |
2888 | } |
2889 | ||
0cedb36c | 2890 | /* ??? We could also check for |
7afe21cc | 2891 | |
0cedb36c | 2892 | (ne (and (eq (...) (const_int 1))) (const_int 0)) |
7afe21cc | 2893 | |
0cedb36c | 2894 | and related forms, but let's wait until we see them occurring. */ |
7afe21cc | 2895 | |
0cedb36c JL |
2896 | if (x == 0) |
2897 | /* Look up ARG1 in the hash table and see if it has an equivalence | |
2898 | that lets us see what is being compared. */ | |
2899 | p = lookup (arg1, safe_hash (arg1, GET_MODE (arg1)) % NBUCKETS, | |
2900 | GET_MODE (arg1)); | |
2901 | if (p) p = p->first_same_value; | |
7afe21cc | 2902 | |
0cedb36c | 2903 | for (; p; p = p->next_same_value) |
7afe21cc | 2904 | { |
0cedb36c | 2905 | enum machine_mode inner_mode = GET_MODE (p->exp); |
7afe21cc | 2906 | |
0cedb36c JL |
2907 | /* If the entry isn't valid, skip it. */ |
2908 | if (! exp_equiv_p (p->exp, p->exp, 1, 0)) | |
2909 | continue; | |
f76b9db2 | 2910 | |
0cedb36c JL |
2911 | if (GET_CODE (p->exp) == COMPARE |
2912 | /* Another possibility is that this machine has a compare insn | |
2913 | that includes the comparison code. In that case, ARG1 would | |
2914 | be equivalent to a comparison operation that would set ARG1 to | |
2915 | either STORE_FLAG_VALUE or zero. If this is an NE operation, | |
2916 | ORIG_CODE is the actual comparison being done; if it is an EQ, | |
2917 | we must reverse ORIG_CODE. On machine with a negative value | |
2918 | for STORE_FLAG_VALUE, also look at LT and GE operations. */ | |
2919 | || ((code == NE | |
2920 | || (code == LT | |
2921 | && GET_MODE_CLASS (inner_mode) == MODE_INT | |
2922 | && (GET_MODE_BITSIZE (inner_mode) | |
2923 | <= HOST_BITS_PER_WIDE_INT) | |
2924 | && (STORE_FLAG_VALUE | |
2925 | & ((HOST_WIDE_INT) 1 | |
2926 | << (GET_MODE_BITSIZE (inner_mode) - 1)))) | |
2927 | #ifdef FLOAT_STORE_FLAG_VALUE | |
2928 | || (code == LT | |
2929 | && GET_MODE_CLASS (inner_mode) == MODE_FLOAT | |
2930 | && FLOAT_STORE_FLAG_VALUE < 0) | |
2931 | #endif | |
2932 | ) | |
2933 | && GET_RTX_CLASS (GET_CODE (p->exp)) == '<')) | |
7afe21cc | 2934 | { |
0cedb36c JL |
2935 | x = p->exp; |
2936 | break; | |
2937 | } | |
2938 | else if ((code == EQ | |
2939 | || (code == GE | |
2940 | && GET_MODE_CLASS (inner_mode) == MODE_INT | |
2941 | && (GET_MODE_BITSIZE (inner_mode) | |
2942 | <= HOST_BITS_PER_WIDE_INT) | |
2943 | && (STORE_FLAG_VALUE | |
2944 | & ((HOST_WIDE_INT) 1 | |
2945 | << (GET_MODE_BITSIZE (inner_mode) - 1)))) | |
2946 | #ifdef FLOAT_STORE_FLAG_VALUE | |
2947 | || (code == GE | |
2948 | && GET_MODE_CLASS (inner_mode) == MODE_FLOAT | |
2949 | && FLOAT_STORE_FLAG_VALUE < 0) | |
2950 | #endif | |
2951 | ) | |
2952 | && GET_RTX_CLASS (GET_CODE (p->exp)) == '<') | |
2953 | { | |
2954 | reverse_code = 1; | |
2955 | x = p->exp; | |
2956 | break; | |
7afe21cc RK |
2957 | } |
2958 | ||
0cedb36c JL |
2959 | /* If this is fp + constant, the equivalent is a better operand since |
2960 | it may let us predict the value of the comparison. */ | |
2961 | else if (NONZERO_BASE_PLUS_P (p->exp)) | |
2962 | { | |
2963 | arg1 = p->exp; | |
2964 | continue; | |
2965 | } | |
7afe21cc | 2966 | } |
7afe21cc | 2967 | |
0cedb36c JL |
2968 | /* If we didn't find a useful equivalence for ARG1, we are done. |
2969 | Otherwise, set up for the next iteration. */ | |
2970 | if (x == 0) | |
2971 | break; | |
7afe21cc | 2972 | |
0cedb36c JL |
2973 | arg1 = XEXP (x, 0), arg2 = XEXP (x, 1); |
2974 | if (GET_RTX_CLASS (GET_CODE (x)) == '<') | |
2975 | code = GET_CODE (x); | |
2976 | ||
2977 | if (reverse_code) | |
2978 | code = reverse_condition (code); | |
7afe21cc RK |
2979 | } |
2980 | ||
0cedb36c JL |
2981 | /* Return our results. Return the modes from before fold_rtx |
2982 | because fold_rtx might produce const_int, and then it's too late. */ | |
2983 | *pmode1 = GET_MODE (arg1), *pmode2 = GET_MODE (arg2); | |
2984 | *parg1 = fold_rtx (arg1, 0), *parg2 = fold_rtx (arg2, 0); | |
2985 | ||
2986 | return code; | |
7afe21cc RK |
2987 | } |
2988 | \f | |
2989 | /* If X is a nontrivial arithmetic operation on an argument | |
2990 | for which a constant value can be determined, return | |
2991 | the result of operating on that value, as a constant. | |
2992 | Otherwise, return X, possibly with one or more operands | |
2993 | modified by recursive calls to this function. | |
2994 | ||
e7bb59fa RK |
2995 | If X is a register whose contents are known, we do NOT |
2996 | return those contents here. equiv_constant is called to | |
2997 | perform that task. | |
7afe21cc RK |
2998 | |
2999 | INSN is the insn that we may be modifying. If it is 0, make a copy | |
3000 | of X before modifying it. */ | |
3001 | ||
3002 | static rtx | |
3003 | fold_rtx (x, insn) | |
3004 | rtx x; | |
3005 | rtx insn; | |
3006 | { | |
3007 | register enum rtx_code code; | |
3008 | register enum machine_mode mode; | |
6f7d635c | 3009 | register const char *fmt; |
906c4e36 | 3010 | register int i; |
7afe21cc RK |
3011 | rtx new = 0; |
3012 | int copied = 0; | |
3013 | int must_swap = 0; | |
3014 | ||
3015 | /* Folded equivalents of first two operands of X. */ | |
3016 | rtx folded_arg0; | |
3017 | rtx folded_arg1; | |
3018 | ||
3019 | /* Constant equivalents of first three operands of X; | |
3020 | 0 when no such equivalent is known. */ | |
3021 | rtx const_arg0; | |
3022 | rtx const_arg1; | |
3023 | rtx const_arg2; | |
3024 | ||
3025 | /* The mode of the first operand of X. We need this for sign and zero | |
3026 | extends. */ | |
3027 | enum machine_mode mode_arg0; | |
3028 | ||
3029 | if (x == 0) | |
3030 | return x; | |
3031 | ||
3032 | mode = GET_MODE (x); | |
3033 | code = GET_CODE (x); | |
3034 | switch (code) | |
3035 | { | |
3036 | case CONST: | |
3037 | case CONST_INT: | |
3038 | case CONST_DOUBLE: | |
3039 | case SYMBOL_REF: | |
3040 | case LABEL_REF: | |
3041 | case REG: | |
3042 | /* No use simplifying an EXPR_LIST | |
3043 | since they are used only for lists of args | |
3044 | in a function call's REG_EQUAL note. */ | |
3045 | case EXPR_LIST: | |
956d6950 JL |
3046 | /* Changing anything inside an ADDRESSOF is incorrect; we don't |
3047 | want to (e.g.,) make (addressof (const_int 0)) just because | |
3048 | the location is known to be zero. */ | |
3049 | case ADDRESSOF: | |
7afe21cc RK |
3050 | return x; |
3051 | ||
3052 | #ifdef HAVE_cc0 | |
3053 | case CC0: | |
3054 | return prev_insn_cc0; | |
3055 | #endif | |
3056 | ||
3057 | case PC: | |
3058 | /* If the next insn is a CODE_LABEL followed by a jump table, | |
3059 | PC's value is a LABEL_REF pointing to that label. That | |
3060 | lets us fold switch statements on the Vax. */ | |
3061 | if (insn && GET_CODE (insn) == JUMP_INSN) | |
3062 | { | |
3063 | rtx next = next_nonnote_insn (insn); | |
3064 | ||
3065 | if (next && GET_CODE (next) == CODE_LABEL | |
3066 | && NEXT_INSN (next) != 0 | |
3067 | && GET_CODE (NEXT_INSN (next)) == JUMP_INSN | |
3068 | && (GET_CODE (PATTERN (NEXT_INSN (next))) == ADDR_VEC | |
3069 | || GET_CODE (PATTERN (NEXT_INSN (next))) == ADDR_DIFF_VEC)) | |
38a448ca | 3070 | return gen_rtx_LABEL_REF (Pmode, next); |
7afe21cc RK |
3071 | } |
3072 | break; | |
3073 | ||
3074 | case SUBREG: | |
c610adec RK |
3075 | /* See if we previously assigned a constant value to this SUBREG. */ |
3076 | if ((new = lookup_as_function (x, CONST_INT)) != 0 | |
3077 | || (new = lookup_as_function (x, CONST_DOUBLE)) != 0) | |
7afe21cc RK |
3078 | return new; |
3079 | ||
4b980e20 RK |
3080 | /* If this is a paradoxical SUBREG, we have no idea what value the |
3081 | extra bits would have. However, if the operand is equivalent | |
3082 | to a SUBREG whose operand is the same as our mode, and all the | |
3083 | modes are within a word, we can just use the inner operand | |
31c85c78 RK |
3084 | because these SUBREGs just say how to treat the register. |
3085 | ||
3086 | Similarly if we find an integer constant. */ | |
4b980e20 | 3087 | |
e5f6a288 | 3088 | if (GET_MODE_SIZE (mode) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))) |
4b980e20 RK |
3089 | { |
3090 | enum machine_mode imode = GET_MODE (SUBREG_REG (x)); | |
3091 | struct table_elt *elt; | |
3092 | ||
3093 | if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD | |
3094 | && GET_MODE_SIZE (imode) <= UNITS_PER_WORD | |
3095 | && (elt = lookup (SUBREG_REG (x), HASH (SUBREG_REG (x), imode), | |
3096 | imode)) != 0) | |
31c85c78 RK |
3097 | for (elt = elt->first_same_value; |
3098 | elt; elt = elt->next_same_value) | |
3099 | { | |
3100 | if (CONSTANT_P (elt->exp) | |
3101 | && GET_MODE (elt->exp) == VOIDmode) | |
3102 | return elt->exp; | |
3103 | ||
4b980e20 RK |
3104 | if (GET_CODE (elt->exp) == SUBREG |
3105 | && GET_MODE (SUBREG_REG (elt->exp)) == mode | |
906c4e36 | 3106 | && exp_equiv_p (elt->exp, elt->exp, 1, 0)) |
4b980e20 RK |
3107 | return copy_rtx (SUBREG_REG (elt->exp)); |
3108 | } | |
3109 | ||
3110 | return x; | |
3111 | } | |
e5f6a288 | 3112 | |
7afe21cc RK |
3113 | /* Fold SUBREG_REG. If it changed, see if we can simplify the SUBREG. |
3114 | We might be able to if the SUBREG is extracting a single word in an | |
3115 | integral mode or extracting the low part. */ | |
3116 | ||
3117 | folded_arg0 = fold_rtx (SUBREG_REG (x), insn); | |
3118 | const_arg0 = equiv_constant (folded_arg0); | |
3119 | if (const_arg0) | |
3120 | folded_arg0 = const_arg0; | |
3121 | ||
3122 | if (folded_arg0 != SUBREG_REG (x)) | |
3123 | { | |
3124 | new = 0; | |
3125 | ||
3126 | if (GET_MODE_CLASS (mode) == MODE_INT | |
3127 | && GET_MODE_SIZE (mode) == UNITS_PER_WORD | |
3128 | && GET_MODE (SUBREG_REG (x)) != VOIDmode) | |
3129 | new = operand_subword (folded_arg0, SUBREG_WORD (x), 0, | |
3130 | GET_MODE (SUBREG_REG (x))); | |
3131 | if (new == 0 && subreg_lowpart_p (x)) | |
3132 | new = gen_lowpart_if_possible (mode, folded_arg0); | |
3133 | if (new) | |
3134 | return new; | |
3135 | } | |
e5f6a288 RK |
3136 | |
3137 | /* If this is a narrowing SUBREG and our operand is a REG, see if | |
858a47b1 | 3138 | we can find an equivalence for REG that is an arithmetic operation |
e5f6a288 RK |
3139 | in a wider mode where both operands are paradoxical SUBREGs |
3140 | from objects of our result mode. In that case, we couldn't report | |
3141 | an equivalent value for that operation, since we don't know what the | |
3142 | extra bits will be. But we can find an equivalence for this SUBREG | |
3143 | by folding that operation is the narrow mode. This allows us to | |
3144 | fold arithmetic in narrow modes when the machine only supports | |
4b980e20 RK |
3145 | word-sized arithmetic. |
3146 | ||
3147 | Also look for a case where we have a SUBREG whose operand is the | |
3148 | same as our result. If both modes are smaller than a word, we | |
3149 | are simply interpreting a register in different modes and we | |
3150 | can use the inner value. */ | |
e5f6a288 RK |
3151 | |
3152 | if (GET_CODE (folded_arg0) == REG | |
e8d76a39 RS |
3153 | && GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (folded_arg0)) |
3154 | && subreg_lowpart_p (x)) | |
e5f6a288 RK |
3155 | { |
3156 | struct table_elt *elt; | |
3157 | ||
3158 | /* We can use HASH here since we know that canon_hash won't be | |
3159 | called. */ | |
3160 | elt = lookup (folded_arg0, | |
3161 | HASH (folded_arg0, GET_MODE (folded_arg0)), | |
3162 | GET_MODE (folded_arg0)); | |
3163 | ||
3164 | if (elt) | |
3165 | elt = elt->first_same_value; | |
3166 | ||
3167 | for (; elt; elt = elt->next_same_value) | |
3168 | { | |
e8d76a39 RS |
3169 | enum rtx_code eltcode = GET_CODE (elt->exp); |
3170 | ||
e5f6a288 RK |
3171 | /* Just check for unary and binary operations. */ |
3172 | if (GET_RTX_CLASS (GET_CODE (elt->exp)) == '1' | |
3173 | && GET_CODE (elt->exp) != SIGN_EXTEND | |
3174 | && GET_CODE (elt->exp) != ZERO_EXTEND | |
3175 | && GET_CODE (XEXP (elt->exp, 0)) == SUBREG | |
3176 | && GET_MODE (SUBREG_REG (XEXP (elt->exp, 0))) == mode) | |
3177 | { | |
3178 | rtx op0 = SUBREG_REG (XEXP (elt->exp, 0)); | |
3179 | ||
3180 | if (GET_CODE (op0) != REG && ! CONSTANT_P (op0)) | |
906c4e36 | 3181 | op0 = fold_rtx (op0, NULL_RTX); |
e5f6a288 RK |
3182 | |
3183 | op0 = equiv_constant (op0); | |
3184 | if (op0) | |
3185 | new = simplify_unary_operation (GET_CODE (elt->exp), mode, | |
3186 | op0, mode); | |
3187 | } | |
3188 | else if ((GET_RTX_CLASS (GET_CODE (elt->exp)) == '2' | |
3189 | || GET_RTX_CLASS (GET_CODE (elt->exp)) == 'c') | |
e8d76a39 RS |
3190 | && eltcode != DIV && eltcode != MOD |
3191 | && eltcode != UDIV && eltcode != UMOD | |
3192 | && eltcode != ASHIFTRT && eltcode != LSHIFTRT | |
3193 | && eltcode != ROTATE && eltcode != ROTATERT | |
e5f6a288 RK |
3194 | && ((GET_CODE (XEXP (elt->exp, 0)) == SUBREG |
3195 | && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 0))) | |
3196 | == mode)) | |
3197 | || CONSTANT_P (XEXP (elt->exp, 0))) | |
3198 | && ((GET_CODE (XEXP (elt->exp, 1)) == SUBREG | |
3199 | && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 1))) | |
3200 | == mode)) | |
3201 | || CONSTANT_P (XEXP (elt->exp, 1)))) | |
3202 | { | |
3203 | rtx op0 = gen_lowpart_common (mode, XEXP (elt->exp, 0)); | |
3204 | rtx op1 = gen_lowpart_common (mode, XEXP (elt->exp, 1)); | |
3205 | ||
3206 | if (op0 && GET_CODE (op0) != REG && ! CONSTANT_P (op0)) | |
906c4e36 | 3207 | op0 = fold_rtx (op0, NULL_RTX); |
e5f6a288 RK |
3208 | |
3209 | if (op0) | |
3210 | op0 = equiv_constant (op0); | |
3211 | ||
3212 | if (op1 && GET_CODE (op1) != REG && ! CONSTANT_P (op1)) | |
906c4e36 | 3213 | op1 = fold_rtx (op1, NULL_RTX); |
e5f6a288 RK |
3214 | |
3215 | if (op1) | |
3216 | op1 = equiv_constant (op1); | |
3217 | ||
76fb0b60 RS |
3218 | /* If we are looking for the low SImode part of |
3219 | (ashift:DI c (const_int 32)), it doesn't work | |
3220 | to compute that in SImode, because a 32-bit shift | |
3221 | in SImode is unpredictable. We know the value is 0. */ | |
3222 | if (op0 && op1 | |
45620ed4 | 3223 | && GET_CODE (elt->exp) == ASHIFT |
76fb0b60 RS |
3224 | && GET_CODE (op1) == CONST_INT |
3225 | && INTVAL (op1) >= GET_MODE_BITSIZE (mode)) | |
3226 | { | |
3227 | if (INTVAL (op1) < GET_MODE_BITSIZE (GET_MODE (elt->exp))) | |
3228 | ||
3229 | /* If the count fits in the inner mode's width, | |
3230 | but exceeds the outer mode's width, | |
3231 | the value will get truncated to 0 | |
3232 | by the subreg. */ | |
3233 | new = const0_rtx; | |
3234 | else | |
3235 | /* If the count exceeds even the inner mode's width, | |
3236 | don't fold this expression. */ | |
3237 | new = 0; | |
3238 | } | |
3239 | else if (op0 && op1) | |
e5f6a288 RK |
3240 | new = simplify_binary_operation (GET_CODE (elt->exp), mode, |
3241 | op0, op1); | |
3242 | } | |
3243 | ||
4b980e20 RK |
3244 | else if (GET_CODE (elt->exp) == SUBREG |
3245 | && GET_MODE (SUBREG_REG (elt->exp)) == mode | |
3246 | && (GET_MODE_SIZE (GET_MODE (folded_arg0)) | |
3247 | <= UNITS_PER_WORD) | |
906c4e36 | 3248 | && exp_equiv_p (elt->exp, elt->exp, 1, 0)) |
4b980e20 RK |
3249 | new = copy_rtx (SUBREG_REG (elt->exp)); |
3250 | ||
e5f6a288 RK |
3251 | if (new) |
3252 | return new; | |
3253 | } | |
3254 | } | |
3255 | ||
7afe21cc RK |
3256 | return x; |
3257 | ||
3258 | case NOT: | |
3259 | case NEG: | |
3260 | /* If we have (NOT Y), see if Y is known to be (NOT Z). | |
3261 | If so, (NOT Y) simplifies to Z. Similarly for NEG. */ | |
3262 | new = lookup_as_function (XEXP (x, 0), code); | |
3263 | if (new) | |
3264 | return fold_rtx (copy_rtx (XEXP (new, 0)), insn); | |
3265 | break; | |
13c9910f | 3266 | |
7afe21cc RK |
3267 | case MEM: |
3268 | /* If we are not actually processing an insn, don't try to find the | |
3269 | best address. Not only don't we care, but we could modify the | |
3270 | MEM in an invalid way since we have no insn to validate against. */ | |
3271 | if (insn != 0) | |
3272 | find_best_addr (insn, &XEXP (x, 0)); | |
3273 | ||
3274 | { | |
3275 | /* Even if we don't fold in the insn itself, | |
3276 | we can safely do so here, in hopes of getting a constant. */ | |
906c4e36 | 3277 | rtx addr = fold_rtx (XEXP (x, 0), NULL_RTX); |
7afe21cc | 3278 | rtx base = 0; |
906c4e36 | 3279 | HOST_WIDE_INT offset = 0; |
7afe21cc RK |
3280 | |
3281 | if (GET_CODE (addr) == REG | |
3282 | && REGNO_QTY_VALID_P (REGNO (addr)) | |
30f72379 MM |
3283 | && GET_MODE (addr) == qty_mode[REG_QTY (REGNO (addr))] |
3284 | && qty_const[REG_QTY (REGNO (addr))] != 0) | |
3285 | addr = qty_const[REG_QTY (REGNO (addr))]; | |
7afe21cc RK |
3286 | |
3287 | /* If address is constant, split it into a base and integer offset. */ | |
3288 | if (GET_CODE (addr) == SYMBOL_REF || GET_CODE (addr) == LABEL_REF) | |
3289 | base = addr; | |
3290 | else if (GET_CODE (addr) == CONST && GET_CODE (XEXP (addr, 0)) == PLUS | |
3291 | && GET_CODE (XEXP (XEXP (addr, 0), 1)) == CONST_INT) | |
3292 | { | |
3293 | base = XEXP (XEXP (addr, 0), 0); | |
3294 | offset = INTVAL (XEXP (XEXP (addr, 0), 1)); | |
3295 | } | |
3296 | else if (GET_CODE (addr) == LO_SUM | |
3297 | && GET_CODE (XEXP (addr, 1)) == SYMBOL_REF) | |
3298 | base = XEXP (addr, 1); | |
e9a25f70 | 3299 | else if (GET_CODE (addr) == ADDRESSOF) |
956d6950 | 3300 | return change_address (x, VOIDmode, addr); |
7afe21cc RK |
3301 | |
3302 | /* If this is a constant pool reference, we can fold it into its | |
3303 | constant to allow better value tracking. */ | |
3304 | if (base && GET_CODE (base) == SYMBOL_REF | |
3305 | && CONSTANT_POOL_ADDRESS_P (base)) | |
3306 | { | |
3307 | rtx constant = get_pool_constant (base); | |
3308 | enum machine_mode const_mode = get_pool_mode (base); | |
3309 | rtx new; | |
3310 | ||
3311 | if (CONSTANT_P (constant) && GET_CODE (constant) != CONST_INT) | |
3312 | constant_pool_entries_cost = COST (constant); | |
3313 | ||
3314 | /* If we are loading the full constant, we have an equivalence. */ | |
3315 | if (offset == 0 && mode == const_mode) | |
3316 | return constant; | |
3317 | ||
9faa82d8 | 3318 | /* If this actually isn't a constant (weird!), we can't do |
7afe21cc RK |
3319 | anything. Otherwise, handle the two most common cases: |
3320 | extracting a word from a multi-word constant, and extracting | |
3321 | the low-order bits. Other cases don't seem common enough to | |
3322 | worry about. */ | |
3323 | if (! CONSTANT_P (constant)) | |
3324 | return x; | |
3325 | ||
3326 | if (GET_MODE_CLASS (mode) == MODE_INT | |
3327 | && GET_MODE_SIZE (mode) == UNITS_PER_WORD | |
3328 | && offset % UNITS_PER_WORD == 0 | |
3329 | && (new = operand_subword (constant, | |
3330 | offset / UNITS_PER_WORD, | |
3331 | 0, const_mode)) != 0) | |
3332 | return new; | |
3333 | ||
3334 | if (((BYTES_BIG_ENDIAN | |
3335 | && offset == GET_MODE_SIZE (GET_MODE (constant)) - 1) | |
3336 | || (! BYTES_BIG_ENDIAN && offset == 0)) | |
3337 | && (new = gen_lowpart_if_possible (mode, constant)) != 0) | |
3338 | return new; | |
3339 | } | |
3340 | ||
3341 | /* If this is a reference to a label at a known position in a jump | |
3342 | table, we also know its value. */ | |
3343 | if (base && GET_CODE (base) == LABEL_REF) | |
3344 | { | |
3345 | rtx label = XEXP (base, 0); | |
3346 | rtx table_insn = NEXT_INSN (label); | |
3347 | ||
3348 | if (table_insn && GET_CODE (table_insn) == JUMP_INSN | |
3349 | && GET_CODE (PATTERN (table_insn)) == ADDR_VEC) | |
3350 | { | |
3351 | rtx table = PATTERN (table_insn); | |
3352 | ||
3353 | if (offset >= 0 | |
3354 | && (offset / GET_MODE_SIZE (GET_MODE (table)) | |
3355 | < XVECLEN (table, 0))) | |
3356 | return XVECEXP (table, 0, | |
3357 | offset / GET_MODE_SIZE (GET_MODE (table))); | |
3358 | } | |
3359 | if (table_insn && GET_CODE (table_insn) == JUMP_INSN | |
3360 | && GET_CODE (PATTERN (table_insn)) == ADDR_DIFF_VEC) | |
3361 | { | |
3362 | rtx table = PATTERN (table_insn); | |
3363 | ||
3364 | if (offset >= 0 | |
3365 | && (offset / GET_MODE_SIZE (GET_MODE (table)) | |
3366 | < XVECLEN (table, 1))) | |
3367 | { | |
3368 | offset /= GET_MODE_SIZE (GET_MODE (table)); | |
38a448ca RH |
3369 | new = gen_rtx_MINUS (Pmode, XVECEXP (table, 1, offset), |
3370 | XEXP (table, 0)); | |
7afe21cc RK |
3371 | |
3372 | if (GET_MODE (table) != Pmode) | |
38a448ca | 3373 | new = gen_rtx_TRUNCATE (GET_MODE (table), new); |
7afe21cc | 3374 | |
67a37737 RK |
3375 | /* Indicate this is a constant. This isn't a |
3376 | valid form of CONST, but it will only be used | |
3377 | to fold the next insns and then discarded, so | |
ac7ef8d5 FS |
3378 | it should be safe. |
3379 | ||
3380 | Note this expression must be explicitly discarded, | |
3381 | by cse_insn, else it may end up in a REG_EQUAL note | |
3382 | and "escape" to cause problems elsewhere. */ | |
38a448ca | 3383 | return gen_rtx_CONST (GET_MODE (new), new); |
7afe21cc RK |
3384 | } |
3385 | } | |
3386 | } | |
3387 | ||
3388 | return x; | |
3389 | } | |
9255709c RK |
3390 | |
3391 | case ASM_OPERANDS: | |
3392 | for (i = XVECLEN (x, 3) - 1; i >= 0; i--) | |
3393 | validate_change (insn, &XVECEXP (x, 3, i), | |
3394 | fold_rtx (XVECEXP (x, 3, i), insn), 0); | |
3395 | break; | |
e9a25f70 JL |
3396 | |
3397 | default: | |
3398 | break; | |
7afe21cc RK |
3399 | } |
3400 | ||
3401 | const_arg0 = 0; | |
3402 | const_arg1 = 0; | |
3403 | const_arg2 = 0; | |
3404 | mode_arg0 = VOIDmode; | |
3405 | ||
3406 | /* Try folding our operands. | |
3407 | Then see which ones have constant values known. */ | |
3408 | ||
3409 | fmt = GET_RTX_FORMAT (code); | |
3410 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
3411 | if (fmt[i] == 'e') | |
3412 | { | |
3413 | rtx arg = XEXP (x, i); | |
3414 | rtx folded_arg = arg, const_arg = 0; | |
3415 | enum machine_mode mode_arg = GET_MODE (arg); | |
3416 | rtx cheap_arg, expensive_arg; | |
3417 | rtx replacements[2]; | |
3418 | int j; | |
3419 | ||
3420 | /* Most arguments are cheap, so handle them specially. */ | |
3421 | switch (GET_CODE (arg)) | |
3422 | { | |
3423 | case REG: | |
3424 | /* This is the same as calling equiv_constant; it is duplicated | |
3425 | here for speed. */ | |
3426 | if (REGNO_QTY_VALID_P (REGNO (arg)) | |
30f72379 MM |
3427 | && qty_const[REG_QTY (REGNO (arg))] != 0 |
3428 | && GET_CODE (qty_const[REG_QTY (REGNO (arg))]) != REG | |
3429 | && GET_CODE (qty_const[REG_QTY (REGNO (arg))]) != PLUS) | |
7afe21cc RK |
3430 | const_arg |
3431 | = gen_lowpart_if_possible (GET_MODE (arg), | |
30f72379 | 3432 | qty_const[REG_QTY (REGNO (arg))]); |
7afe21cc RK |
3433 | break; |
3434 | ||
3435 | case CONST: | |
3436 | case CONST_INT: | |
3437 | case SYMBOL_REF: | |
3438 | case LABEL_REF: | |
3439 | case CONST_DOUBLE: | |
3440 | const_arg = arg; | |
3441 | break; | |
3442 | ||
3443 | #ifdef HAVE_cc0 | |
3444 | case CC0: | |
3445 | folded_arg = prev_insn_cc0; | |
3446 | mode_arg = prev_insn_cc0_mode; | |
3447 | const_arg = equiv_constant (folded_arg); | |
3448 | break; | |
3449 | #endif | |
3450 | ||
3451 | default: | |
3452 | folded_arg = fold_rtx (arg, insn); | |
3453 | const_arg = equiv_constant (folded_arg); | |
3454 | } | |
3455 | ||
3456 | /* For the first three operands, see if the operand | |
3457 | is constant or equivalent to a constant. */ | |
3458 | switch (i) | |
3459 | { | |
3460 | case 0: | |
3461 | folded_arg0 = folded_arg; | |
3462 | const_arg0 = const_arg; | |
3463 | mode_arg0 = mode_arg; | |
3464 | break; | |
3465 | case 1: | |
3466 | folded_arg1 = folded_arg; | |
3467 | const_arg1 = const_arg; | |
3468 | break; | |
3469 | case 2: | |
3470 | const_arg2 = const_arg; | |
3471 | break; | |
3472 | } | |
3473 | ||
3474 | /* Pick the least expensive of the folded argument and an | |
3475 | equivalent constant argument. */ | |
3476 | if (const_arg == 0 || const_arg == folded_arg | |
3477 | || COST (const_arg) > COST (folded_arg)) | |
3478 | cheap_arg = folded_arg, expensive_arg = const_arg; | |
3479 | else | |
3480 | cheap_arg = const_arg, expensive_arg = folded_arg; | |
3481 | ||
3482 | /* Try to replace the operand with the cheapest of the two | |
3483 | possibilities. If it doesn't work and this is either of the first | |
3484 | two operands of a commutative operation, try swapping them. | |
3485 | If THAT fails, try the more expensive, provided it is cheaper | |
3486 | than what is already there. */ | |
3487 | ||
3488 | if (cheap_arg == XEXP (x, i)) | |
3489 | continue; | |
3490 | ||
3491 | if (insn == 0 && ! copied) | |
3492 | { | |
3493 | x = copy_rtx (x); | |
3494 | copied = 1; | |
3495 | } | |
3496 | ||
3497 | replacements[0] = cheap_arg, replacements[1] = expensive_arg; | |
3498 | for (j = 0; | |
3499 | j < 2 && replacements[j] | |
3500 | && COST (replacements[j]) < COST (XEXP (x, i)); | |
3501 | j++) | |
3502 | { | |
3503 | if (validate_change (insn, &XEXP (x, i), replacements[j], 0)) | |
3504 | break; | |
3505 | ||
3506 | if (code == NE || code == EQ || GET_RTX_CLASS (code) == 'c') | |
3507 | { | |
3508 | validate_change (insn, &XEXP (x, i), XEXP (x, 1 - i), 1); | |
3509 | validate_change (insn, &XEXP (x, 1 - i), replacements[j], 1); | |
3510 | ||
3511 | if (apply_change_group ()) | |
3512 | { | |
3513 | /* Swap them back to be invalid so that this loop can | |
3514 | continue and flag them to be swapped back later. */ | |
3515 | rtx tem; | |
3516 | ||
3517 | tem = XEXP (x, 0); XEXP (x, 0) = XEXP (x, 1); | |
3518 | XEXP (x, 1) = tem; | |
3519 | must_swap = 1; | |
3520 | break; | |
3521 | } | |
3522 | } | |
3523 | } | |
3524 | } | |
3525 | ||
2d8b0f3a JL |
3526 | else |
3527 | { | |
3528 | if (fmt[i] == 'E') | |
3529 | /* Don't try to fold inside of a vector of expressions. | |
3530 | Doing nothing is harmless. */ | |
3531 | {;} | |
3532 | } | |
7afe21cc RK |
3533 | |
3534 | /* If a commutative operation, place a constant integer as the second | |
3535 | operand unless the first operand is also a constant integer. Otherwise, | |
3536 | place any constant second unless the first operand is also a constant. */ | |
3537 | ||
3538 | if (code == EQ || code == NE || GET_RTX_CLASS (code) == 'c') | |
3539 | { | |
3540 | if (must_swap || (const_arg0 | |
3541 | && (const_arg1 == 0 | |
3542 | || (GET_CODE (const_arg0) == CONST_INT | |
3543 | && GET_CODE (const_arg1) != CONST_INT)))) | |
3544 | { | |
3545 | register rtx tem = XEXP (x, 0); | |
3546 | ||
3547 | if (insn == 0 && ! copied) | |
3548 | { | |
3549 | x = copy_rtx (x); | |
3550 | copied = 1; | |
3551 | } | |
3552 | ||
3553 | validate_change (insn, &XEXP (x, 0), XEXP (x, 1), 1); | |
3554 | validate_change (insn, &XEXP (x, 1), tem, 1); | |
3555 | if (apply_change_group ()) | |
3556 | { | |
3557 | tem = const_arg0, const_arg0 = const_arg1, const_arg1 = tem; | |
3558 | tem = folded_arg0, folded_arg0 = folded_arg1, folded_arg1 = tem; | |
3559 | } | |
3560 | } | |
3561 | } | |
3562 | ||
3563 | /* If X is an arithmetic operation, see if we can simplify it. */ | |
3564 | ||
3565 | switch (GET_RTX_CLASS (code)) | |
3566 | { | |
3567 | case '1': | |
67a37737 RK |
3568 | { |
3569 | int is_const = 0; | |
3570 | ||
3571 | /* We can't simplify extension ops unless we know the | |
3572 | original mode. */ | |
3573 | if ((code == ZERO_EXTEND || code == SIGN_EXTEND) | |
3574 | && mode_arg0 == VOIDmode) | |
3575 | break; | |
3576 | ||
3577 | /* If we had a CONST, strip it off and put it back later if we | |
3578 | fold. */ | |
3579 | if (const_arg0 != 0 && GET_CODE (const_arg0) == CONST) | |
3580 | is_const = 1, const_arg0 = XEXP (const_arg0, 0); | |
3581 | ||
3582 | new = simplify_unary_operation (code, mode, | |
3583 | const_arg0 ? const_arg0 : folded_arg0, | |
3584 | mode_arg0); | |
3585 | if (new != 0 && is_const) | |
38a448ca | 3586 | new = gen_rtx_CONST (mode, new); |
67a37737 | 3587 | } |
7afe21cc RK |
3588 | break; |
3589 | ||
3590 | case '<': | |
3591 | /* See what items are actually being compared and set FOLDED_ARG[01] | |
3592 | to those values and CODE to the actual comparison code. If any are | |
3593 | constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't | |
3594 | do anything if both operands are already known to be constant. */ | |
3595 | ||
3596 | if (const_arg0 == 0 || const_arg1 == 0) | |
3597 | { | |
3598 | struct table_elt *p0, *p1; | |
c610adec | 3599 | rtx true = const_true_rtx, false = const0_rtx; |
13c9910f | 3600 | enum machine_mode mode_arg1; |
c610adec RK |
3601 | |
3602 | #ifdef FLOAT_STORE_FLAG_VALUE | |
c7c955ee | 3603 | if (GET_MODE_CLASS (mode) == MODE_FLOAT) |
c610adec | 3604 | { |
560c94a2 RK |
3605 | true = CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE, |
3606 | mode); | |
c610adec RK |
3607 | false = CONST0_RTX (mode); |
3608 | } | |
3609 | #endif | |
7afe21cc | 3610 | |
13c9910f RS |
3611 | code = find_comparison_args (code, &folded_arg0, &folded_arg1, |
3612 | &mode_arg0, &mode_arg1); | |
7afe21cc RK |
3613 | const_arg0 = equiv_constant (folded_arg0); |
3614 | const_arg1 = equiv_constant (folded_arg1); | |
3615 | ||
13c9910f RS |
3616 | /* If the mode is VOIDmode or a MODE_CC mode, we don't know |
3617 | what kinds of things are being compared, so we can't do | |
3618 | anything with this comparison. */ | |
7afe21cc RK |
3619 | |
3620 | if (mode_arg0 == VOIDmode || GET_MODE_CLASS (mode_arg0) == MODE_CC) | |
3621 | break; | |
3622 | ||
0f41302f MS |
3623 | /* If we do not now have two constants being compared, see |
3624 | if we can nevertheless deduce some things about the | |
3625 | comparison. */ | |
7afe21cc RK |
3626 | if (const_arg0 == 0 || const_arg1 == 0) |
3627 | { | |
0f41302f MS |
3628 | /* Is FOLDED_ARG0 frame-pointer plus a constant? Or |
3629 | non-explicit constant? These aren't zero, but we | |
3630 | don't know their sign. */ | |
7afe21cc RK |
3631 | if (const_arg1 == const0_rtx |
3632 | && (NONZERO_BASE_PLUS_P (folded_arg0) | |
3633 | #if 0 /* Sad to say, on sysvr4, #pragma weak can make a symbol address | |
3634 | come out as 0. */ | |
3635 | || GET_CODE (folded_arg0) == SYMBOL_REF | |
3636 | #endif | |
3637 | || GET_CODE (folded_arg0) == LABEL_REF | |
3638 | || GET_CODE (folded_arg0) == CONST)) | |
3639 | { | |
3640 | if (code == EQ) | |
c610adec | 3641 | return false; |
7afe21cc | 3642 | else if (code == NE) |
c610adec | 3643 | return true; |
7afe21cc RK |
3644 | } |
3645 | ||
3646 | /* See if the two operands are the same. We don't do this | |
3647 | for IEEE floating-point since we can't assume x == x | |
3648 | since x might be a NaN. */ | |
3649 | ||
3650 | if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT | |
a83afb65 | 3651 | || ! FLOAT_MODE_P (mode_arg0) || flag_fast_math) |
7afe21cc RK |
3652 | && (folded_arg0 == folded_arg1 |
3653 | || (GET_CODE (folded_arg0) == REG | |
3654 | && GET_CODE (folded_arg1) == REG | |
30f72379 MM |
3655 | && (REG_QTY (REGNO (folded_arg0)) |
3656 | == REG_QTY (REGNO (folded_arg1)))) | |
7afe21cc RK |
3657 | || ((p0 = lookup (folded_arg0, |
3658 | (safe_hash (folded_arg0, mode_arg0) | |
3659 | % NBUCKETS), mode_arg0)) | |
3660 | && (p1 = lookup (folded_arg1, | |
3661 | (safe_hash (folded_arg1, mode_arg0) | |
3662 | % NBUCKETS), mode_arg0)) | |
3663 | && p0->first_same_value == p1->first_same_value))) | |
3664 | return ((code == EQ || code == LE || code == GE | |
3665 | || code == LEU || code == GEU) | |
c610adec | 3666 | ? true : false); |
7afe21cc RK |
3667 | |
3668 | /* If FOLDED_ARG0 is a register, see if the comparison we are | |
3669 | doing now is either the same as we did before or the reverse | |
3670 | (we only check the reverse if not floating-point). */ | |
3671 | else if (GET_CODE (folded_arg0) == REG) | |
3672 | { | |
30f72379 | 3673 | int qty = REG_QTY (REGNO (folded_arg0)); |
7afe21cc RK |
3674 | |
3675 | if (REGNO_QTY_VALID_P (REGNO (folded_arg0)) | |
3676 | && (comparison_dominates_p (qty_comparison_code[qty], code) | |
3677 | || (comparison_dominates_p (qty_comparison_code[qty], | |
3678 | reverse_condition (code)) | |
cbf6a543 | 3679 | && ! FLOAT_MODE_P (mode_arg0))) |
7afe21cc RK |
3680 | && (rtx_equal_p (qty_comparison_const[qty], folded_arg1) |
3681 | || (const_arg1 | |
3682 | && rtx_equal_p (qty_comparison_const[qty], | |
3683 | const_arg1)) | |
3684 | || (GET_CODE (folded_arg1) == REG | |
30f72379 | 3685 | && (REG_QTY (REGNO (folded_arg1)) |
7afe21cc RK |
3686 | == qty_comparison_qty[qty])))) |
3687 | return (comparison_dominates_p (qty_comparison_code[qty], | |
3688 | code) | |
c610adec | 3689 | ? true : false); |
7afe21cc RK |
3690 | } |
3691 | } | |
3692 | } | |
3693 | ||
3694 | /* If we are comparing against zero, see if the first operand is | |
3695 | equivalent to an IOR with a constant. If so, we may be able to | |
3696 | determine the result of this comparison. */ | |
3697 | ||
3698 | if (const_arg1 == const0_rtx) | |
3699 | { | |
3700 | rtx y = lookup_as_function (folded_arg0, IOR); | |
3701 | rtx inner_const; | |
3702 | ||
3703 | if (y != 0 | |
3704 | && (inner_const = equiv_constant (XEXP (y, 1))) != 0 | |
3705 | && GET_CODE (inner_const) == CONST_INT | |
3706 | && INTVAL (inner_const) != 0) | |
3707 | { | |
3708 | int sign_bitnum = GET_MODE_BITSIZE (mode_arg0) - 1; | |
906c4e36 RK |
3709 | int has_sign = (HOST_BITS_PER_WIDE_INT >= sign_bitnum |
3710 | && (INTVAL (inner_const) | |
3711 | & ((HOST_WIDE_INT) 1 << sign_bitnum))); | |
c610adec RK |
3712 | rtx true = const_true_rtx, false = const0_rtx; |
3713 | ||
3714 | #ifdef FLOAT_STORE_FLAG_VALUE | |
c7c955ee | 3715 | if (GET_MODE_CLASS (mode) == MODE_FLOAT) |
c610adec | 3716 | { |
560c94a2 RK |
3717 | true = CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE, |
3718 | mode); | |
c610adec RK |
3719 | false = CONST0_RTX (mode); |
3720 | } | |
3721 | #endif | |
7afe21cc RK |
3722 | |
3723 | switch (code) | |
3724 | { | |
3725 | case EQ: | |
c610adec | 3726 | return false; |
7afe21cc | 3727 | case NE: |
c610adec | 3728 | return true; |
7afe21cc RK |
3729 | case LT: case LE: |
3730 | if (has_sign) | |
c610adec | 3731 | return true; |
7afe21cc RK |
3732 | break; |
3733 | case GT: case GE: | |
3734 | if (has_sign) | |
c610adec | 3735 | return false; |
7afe21cc | 3736 | break; |
e9a25f70 JL |
3737 | default: |
3738 | break; | |
7afe21cc RK |
3739 | } |
3740 | } | |
3741 | } | |
3742 | ||
3743 | new = simplify_relational_operation (code, mode_arg0, | |
3744 | const_arg0 ? const_arg0 : folded_arg0, | |
3745 | const_arg1 ? const_arg1 : folded_arg1); | |
c610adec RK |
3746 | #ifdef FLOAT_STORE_FLAG_VALUE |
3747 | if (new != 0 && GET_MODE_CLASS (mode) == MODE_FLOAT) | |
3748 | new = ((new == const0_rtx) ? CONST0_RTX (mode) | |
560c94a2 | 3749 | : CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE, mode)); |
c610adec | 3750 | #endif |
7afe21cc RK |
3751 | break; |
3752 | ||
3753 | case '2': | |
3754 | case 'c': | |
3755 | switch (code) | |
3756 | { | |
3757 | case PLUS: | |
3758 | /* If the second operand is a LABEL_REF, see if the first is a MINUS | |
3759 | with that LABEL_REF as its second operand. If so, the result is | |
3760 | the first operand of that MINUS. This handles switches with an | |
3761 | ADDR_DIFF_VEC table. */ | |
3762 | if (const_arg1 && GET_CODE (const_arg1) == LABEL_REF) | |
3763 | { | |
e650cbda RK |
3764 | rtx y |
3765 | = GET_CODE (folded_arg0) == MINUS ? folded_arg0 | |
3766 | : lookup_as_function (folded_arg0, MINUS); | |
7afe21cc RK |
3767 | |
3768 | if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF | |
3769 | && XEXP (XEXP (y, 1), 0) == XEXP (const_arg1, 0)) | |
3770 | return XEXP (y, 0); | |
67a37737 RK |
3771 | |
3772 | /* Now try for a CONST of a MINUS like the above. */ | |
e650cbda RK |
3773 | if ((y = (GET_CODE (folded_arg0) == CONST ? folded_arg0 |
3774 | : lookup_as_function (folded_arg0, CONST))) != 0 | |
67a37737 RK |
3775 | && GET_CODE (XEXP (y, 0)) == MINUS |
3776 | && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF | |
3777 | && XEXP (XEXP (XEXP (y, 0),1), 0) == XEXP (const_arg1, 0)) | |
3778 | return XEXP (XEXP (y, 0), 0); | |
7afe21cc | 3779 | } |
c2cc0778 | 3780 | |
e650cbda RK |
3781 | /* Likewise if the operands are in the other order. */ |
3782 | if (const_arg0 && GET_CODE (const_arg0) == LABEL_REF) | |
3783 | { | |
3784 | rtx y | |
3785 | = GET_CODE (folded_arg1) == MINUS ? folded_arg1 | |
3786 | : lookup_as_function (folded_arg1, MINUS); | |
3787 | ||
3788 | if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF | |
3789 | && XEXP (XEXP (y, 1), 0) == XEXP (const_arg0, 0)) | |
3790 | return XEXP (y, 0); | |
3791 | ||
3792 | /* Now try for a CONST of a MINUS like the above. */ | |
3793 | if ((y = (GET_CODE (folded_arg1) == CONST ? folded_arg1 | |
3794 | : lookup_as_function (folded_arg1, CONST))) != 0 | |
3795 | && GET_CODE (XEXP (y, 0)) == MINUS | |
3796 | && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF | |
3797 | && XEXP (XEXP (XEXP (y, 0),1), 0) == XEXP (const_arg0, 0)) | |
3798 | return XEXP (XEXP (y, 0), 0); | |
3799 | } | |
3800 | ||
c2cc0778 RK |
3801 | /* If second operand is a register equivalent to a negative |
3802 | CONST_INT, see if we can find a register equivalent to the | |
3803 | positive constant. Make a MINUS if so. Don't do this for | |
5d595063 | 3804 | a non-negative constant since we might then alternate between |
c2cc0778 | 3805 | chosing positive and negative constants. Having the positive |
5d595063 RK |
3806 | constant previously-used is the more common case. Be sure |
3807 | the resulting constant is non-negative; if const_arg1 were | |
3808 | the smallest negative number this would overflow: depending | |
3809 | on the mode, this would either just be the same value (and | |
3810 | hence not save anything) or be incorrect. */ | |
3811 | if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT | |
3812 | && INTVAL (const_arg1) < 0 | |
4741f6ad JL |
3813 | /* This used to test |
3814 | ||
3815 | - INTVAL (const_arg1) >= 0 | |
3816 | ||
3817 | But The Sun V5.0 compilers mis-compiled that test. So | |
3818 | instead we test for the problematic value in a more direct | |
3819 | manner and hope the Sun compilers get it correct. */ | |
5c45a8ac KG |
3820 | && INTVAL (const_arg1) != |
3821 | ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT - 1)) | |
5d595063 | 3822 | && GET_CODE (folded_arg1) == REG) |
c2cc0778 RK |
3823 | { |
3824 | rtx new_const = GEN_INT (- INTVAL (const_arg1)); | |
3825 | struct table_elt *p | |
3826 | = lookup (new_const, safe_hash (new_const, mode) % NBUCKETS, | |
3827 | mode); | |
3828 | ||
3829 | if (p) | |
3830 | for (p = p->first_same_value; p; p = p->next_same_value) | |
3831 | if (GET_CODE (p->exp) == REG) | |
0cedb36c JL |
3832 | return simplify_gen_binary (MINUS, mode, folded_arg0, |
3833 | canon_reg (p->exp, NULL_RTX)); | |
c2cc0778 | 3834 | } |
13c9910f RS |
3835 | goto from_plus; |
3836 | ||
3837 | case MINUS: | |
3838 | /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2). | |
3839 | If so, produce (PLUS Z C2-C). */ | |
3840 | if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT) | |
3841 | { | |
3842 | rtx y = lookup_as_function (XEXP (x, 0), PLUS); | |
3843 | if (y && GET_CODE (XEXP (y, 1)) == CONST_INT) | |
f3becefd RK |
3844 | return fold_rtx (plus_constant (copy_rtx (y), |
3845 | -INTVAL (const_arg1)), | |
a3b5c94a | 3846 | NULL_RTX); |
13c9910f | 3847 | } |
7afe21cc | 3848 | |
0f41302f | 3849 | /* ... fall through ... */ |
7afe21cc | 3850 | |
13c9910f | 3851 | from_plus: |
7afe21cc RK |
3852 | case SMIN: case SMAX: case UMIN: case UMAX: |
3853 | case IOR: case AND: case XOR: | |
3854 | case MULT: case DIV: case UDIV: | |
3855 | case ASHIFT: case LSHIFTRT: case ASHIFTRT: | |
3856 | /* If we have (<op> <reg> <const_int>) for an associative OP and REG | |
3857 | is known to be of similar form, we may be able to replace the | |
3858 | operation with a combined operation. This may eliminate the | |
3859 | intermediate operation if every use is simplified in this way. | |
3860 | Note that the similar optimization done by combine.c only works | |
3861 | if the intermediate operation's result has only one reference. */ | |
3862 | ||
3863 | if (GET_CODE (folded_arg0) == REG | |
3864 | && const_arg1 && GET_CODE (const_arg1) == CONST_INT) | |
3865 | { | |
3866 | int is_shift | |
3867 | = (code == ASHIFT || code == ASHIFTRT || code == LSHIFTRT); | |
3868 | rtx y = lookup_as_function (folded_arg0, code); | |
3869 | rtx inner_const; | |
3870 | enum rtx_code associate_code; | |
3871 | rtx new_const; | |
3872 | ||
3873 | if (y == 0 | |
3874 | || 0 == (inner_const | |
3875 | = equiv_constant (fold_rtx (XEXP (y, 1), 0))) | |
3876 | || GET_CODE (inner_const) != CONST_INT | |
3877 | /* If we have compiled a statement like | |
3878 | "if (x == (x & mask1))", and now are looking at | |
3879 | "x & mask2", we will have a case where the first operand | |
3880 | of Y is the same as our first operand. Unless we detect | |
3881 | this case, an infinite loop will result. */ | |
3882 | || XEXP (y, 0) == folded_arg0) | |
3883 | break; | |
3884 | ||
3885 | /* Don't associate these operations if they are a PLUS with the | |
3886 | same constant and it is a power of two. These might be doable | |
3887 | with a pre- or post-increment. Similarly for two subtracts of | |
3888 | identical powers of two with post decrement. */ | |
3889 | ||
3890 | if (code == PLUS && INTVAL (const_arg1) == INTVAL (inner_const) | |
940da324 JL |
3891 | && ((HAVE_PRE_INCREMENT |
3892 | && exact_log2 (INTVAL (const_arg1)) >= 0) | |
3893 | || (HAVE_POST_INCREMENT | |
3894 | && exact_log2 (INTVAL (const_arg1)) >= 0) | |
3895 | || (HAVE_PRE_DECREMENT | |
3896 | && exact_log2 (- INTVAL (const_arg1)) >= 0) | |
3897 | || (HAVE_POST_DECREMENT | |
3898 | && exact_log2 (- INTVAL (const_arg1)) >= 0))) | |
7afe21cc RK |
3899 | break; |
3900 | ||
3901 | /* Compute the code used to compose the constants. For example, | |
3902 | A/C1/C2 is A/(C1 * C2), so if CODE == DIV, we want MULT. */ | |
3903 | ||
3904 | associate_code | |
3905 | = (code == MULT || code == DIV || code == UDIV ? MULT | |
3906 | : is_shift || code == PLUS || code == MINUS ? PLUS : code); | |
3907 | ||
3908 | new_const = simplify_binary_operation (associate_code, mode, | |
3909 | const_arg1, inner_const); | |
3910 | ||
3911 | if (new_const == 0) | |
3912 | break; | |
3913 | ||
3914 | /* If we are associating shift operations, don't let this | |
4908e508 RS |
3915 | produce a shift of the size of the object or larger. |
3916 | This could occur when we follow a sign-extend by a right | |
3917 | shift on a machine that does a sign-extend as a pair | |
3918 | of shifts. */ | |
7afe21cc RK |
3919 | |
3920 | if (is_shift && GET_CODE (new_const) == CONST_INT | |
4908e508 RS |
3921 | && INTVAL (new_const) >= GET_MODE_BITSIZE (mode)) |
3922 | { | |
3923 | /* As an exception, we can turn an ASHIFTRT of this | |
3924 | form into a shift of the number of bits - 1. */ | |
3925 | if (code == ASHIFTRT) | |
3926 | new_const = GEN_INT (GET_MODE_BITSIZE (mode) - 1); | |
3927 | else | |
3928 | break; | |
3929 | } | |
7afe21cc RK |
3930 | |
3931 | y = copy_rtx (XEXP (y, 0)); | |
3932 | ||
3933 | /* If Y contains our first operand (the most common way this | |
3934 | can happen is if Y is a MEM), we would do into an infinite | |
3935 | loop if we tried to fold it. So don't in that case. */ | |
3936 | ||
3937 | if (! reg_mentioned_p (folded_arg0, y)) | |
3938 | y = fold_rtx (y, insn); | |
3939 | ||
0cedb36c | 3940 | return simplify_gen_binary (code, mode, y, new_const); |
7afe21cc | 3941 | } |
e9a25f70 JL |
3942 | break; |
3943 | ||
3944 | default: | |
3945 | break; | |
7afe21cc RK |
3946 | } |
3947 | ||
3948 | new = simplify_binary_operation (code, mode, | |
3949 | const_arg0 ? const_arg0 : folded_arg0, | |
3950 | const_arg1 ? const_arg1 : folded_arg1); | |
3951 | break; | |
3952 | ||
3953 | case 'o': | |
3954 | /* (lo_sum (high X) X) is simply X. */ | |
3955 | if (code == LO_SUM && const_arg0 != 0 | |
3956 | && GET_CODE (const_arg0) == HIGH | |
3957 | && rtx_equal_p (XEXP (const_arg0, 0), const_arg1)) | |
3958 | return const_arg1; | |
3959 | break; | |
3960 | ||
3961 | case '3': | |
3962 | case 'b': | |
3963 | new = simplify_ternary_operation (code, mode, mode_arg0, | |
3964 | const_arg0 ? const_arg0 : folded_arg0, | |
3965 | const_arg1 ? const_arg1 : folded_arg1, | |
3966 | const_arg2 ? const_arg2 : XEXP (x, 2)); | |
3967 | break; | |
ee5332b8 RH |
3968 | |
3969 | case 'x': | |
3970 | /* Always eliminate CONSTANT_P_RTX at this stage. */ | |
3971 | if (code == CONSTANT_P_RTX) | |
3972 | return (const_arg0 ? const1_rtx : const0_rtx); | |
3973 | break; | |
7afe21cc RK |
3974 | } |
3975 | ||
3976 | return new ? new : x; | |
3977 | } | |
3978 | \f | |
3979 | /* Return a constant value currently equivalent to X. | |
3980 | Return 0 if we don't know one. */ | |
3981 | ||
3982 | static rtx | |
3983 | equiv_constant (x) | |
3984 | rtx x; | |
3985 | { | |
3986 | if (GET_CODE (x) == REG | |
3987 | && REGNO_QTY_VALID_P (REGNO (x)) | |
30f72379 MM |
3988 | && qty_const[REG_QTY (REGNO (x))]) |
3989 | x = gen_lowpart_if_possible (GET_MODE (x), qty_const[REG_QTY (REGNO (x))]); | |
7afe21cc | 3990 | |
2ce5e1b4 | 3991 | if (x == 0 || CONSTANT_P (x)) |
7afe21cc RK |
3992 | return x; |
3993 | ||
fc3ffe83 RK |
3994 | /* If X is a MEM, try to fold it outside the context of any insn to see if |
3995 | it might be equivalent to a constant. That handles the case where it | |
3996 | is a constant-pool reference. Then try to look it up in the hash table | |
3997 | in case it is something whose value we have seen before. */ | |
3998 | ||
3999 | if (GET_CODE (x) == MEM) | |
4000 | { | |
4001 | struct table_elt *elt; | |
4002 | ||
906c4e36 | 4003 | x = fold_rtx (x, NULL_RTX); |
fc3ffe83 RK |
4004 | if (CONSTANT_P (x)) |
4005 | return x; | |
4006 | ||
4007 | elt = lookup (x, safe_hash (x, GET_MODE (x)) % NBUCKETS, GET_MODE (x)); | |
4008 | if (elt == 0) | |
4009 | return 0; | |
4010 | ||
4011 | for (elt = elt->first_same_value; elt; elt = elt->next_same_value) | |
4012 | if (elt->is_const && CONSTANT_P (elt->exp)) | |
4013 | return elt->exp; | |
4014 | } | |
4015 | ||
7afe21cc RK |
4016 | return 0; |
4017 | } | |
4018 | \f | |
4019 | /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a fixed-point | |
4020 | number, return an rtx (MEM, SUBREG, or CONST_INT) that refers to the | |
4021 | least-significant part of X. | |
4022 | MODE specifies how big a part of X to return. | |
4023 | ||
4024 | If the requested operation cannot be done, 0 is returned. | |
4025 | ||
4026 | This is similar to gen_lowpart in emit-rtl.c. */ | |
4027 | ||
4028 | rtx | |
4029 | gen_lowpart_if_possible (mode, x) | |
4030 | enum machine_mode mode; | |
4031 | register rtx x; | |
4032 | { | |
4033 | rtx result = gen_lowpart_common (mode, x); | |
4034 | ||
4035 | if (result) | |
4036 | return result; | |
4037 | else if (GET_CODE (x) == MEM) | |
4038 | { | |
4039 | /* This is the only other case we handle. */ | |
4040 | register int offset = 0; | |
4041 | rtx new; | |
4042 | ||
f76b9db2 ILT |
4043 | if (WORDS_BIG_ENDIAN) |
4044 | offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD) | |
4045 | - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD)); | |
4046 | if (BYTES_BIG_ENDIAN) | |
4047 | /* Adjust the address so that the address-after-the-data is | |
4048 | unchanged. */ | |
4049 | offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode)) | |
4050 | - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x)))); | |
38a448ca | 4051 | new = gen_rtx_MEM (mode, plus_constant (XEXP (x, 0), offset)); |
7afe21cc RK |
4052 | if (! memory_address_p (mode, XEXP (new, 0))) |
4053 | return 0; | |
7afe21cc | 4054 | RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (x); |
c6df88cb | 4055 | MEM_COPY_ATTRIBUTES (new, x); |
7afe21cc RK |
4056 | return new; |
4057 | } | |
4058 | else | |
4059 | return 0; | |
4060 | } | |
4061 | \f | |
4062 | /* Given INSN, a jump insn, TAKEN indicates if we are following the "taken" | |
4063 | branch. It will be zero if not. | |
4064 | ||
4065 | In certain cases, this can cause us to add an equivalence. For example, | |
4066 | if we are following the taken case of | |
4067 | if (i == 2) | |
4068 | we can add the fact that `i' and '2' are now equivalent. | |
4069 | ||
4070 | In any case, we can record that this comparison was passed. If the same | |
4071 | comparison is seen later, we will know its value. */ | |
4072 | ||
4073 | static void | |
4074 | record_jump_equiv (insn, taken) | |
4075 | rtx insn; | |
4076 | int taken; | |
4077 | { | |
4078 | int cond_known_true; | |
4079 | rtx op0, op1; | |
13c9910f | 4080 | enum machine_mode mode, mode0, mode1; |
7afe21cc RK |
4081 | int reversed_nonequality = 0; |
4082 | enum rtx_code code; | |
4083 | ||
4084 | /* Ensure this is the right kind of insn. */ | |
4085 | if (! condjump_p (insn) || simplejump_p (insn)) | |
4086 | return; | |
4087 | ||
4088 | /* See if this jump condition is known true or false. */ | |
4089 | if (taken) | |
4090 | cond_known_true = (XEXP (SET_SRC (PATTERN (insn)), 2) == pc_rtx); | |
4091 | else | |
4092 | cond_known_true = (XEXP (SET_SRC (PATTERN (insn)), 1) == pc_rtx); | |
4093 | ||
4094 | /* Get the type of comparison being done and the operands being compared. | |
4095 | If we had to reverse a non-equality condition, record that fact so we | |
4096 | know that it isn't valid for floating-point. */ | |
4097 | code = GET_CODE (XEXP (SET_SRC (PATTERN (insn)), 0)); | |
4098 | op0 = fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn)), 0), 0), insn); | |
4099 | op1 = fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn)), 0), 1), insn); | |
4100 | ||
13c9910f | 4101 | code = find_comparison_args (code, &op0, &op1, &mode0, &mode1); |
7afe21cc RK |
4102 | if (! cond_known_true) |
4103 | { | |
4104 | reversed_nonequality = (code != EQ && code != NE); | |
4105 | code = reverse_condition (code); | |
4106 | } | |
4107 | ||
4108 | /* The mode is the mode of the non-constant. */ | |
13c9910f RS |
4109 | mode = mode0; |
4110 | if (mode1 != VOIDmode) | |
4111 | mode = mode1; | |
7afe21cc RK |
4112 | |
4113 | record_jump_cond (code, mode, op0, op1, reversed_nonequality); | |
4114 | } | |
4115 | ||
4116 | /* We know that comparison CODE applied to OP0 and OP1 in MODE is true. | |
4117 | REVERSED_NONEQUALITY is nonzero if CODE had to be swapped. | |
4118 | Make any useful entries we can with that information. Called from | |
4119 | above function and called recursively. */ | |
4120 | ||
4121 | static void | |
4122 | record_jump_cond (code, mode, op0, op1, reversed_nonequality) | |
4123 | enum rtx_code code; | |
4124 | enum machine_mode mode; | |
4125 | rtx op0, op1; | |
4126 | int reversed_nonequality; | |
4127 | { | |
2197a88a | 4128 | unsigned op0_hash, op1_hash; |
e428d738 | 4129 | int op0_in_memory, op1_in_memory; |
7afe21cc RK |
4130 | struct table_elt *op0_elt, *op1_elt; |
4131 | ||
4132 | /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG, | |
4133 | we know that they are also equal in the smaller mode (this is also | |
4134 | true for all smaller modes whether or not there is a SUBREG, but | |
ac7ef8d5 | 4135 | is not worth testing for with no SUBREG). */ |
7afe21cc | 4136 | |
2e794ee8 | 4137 | /* Note that GET_MODE (op0) may not equal MODE. */ |
7afe21cc | 4138 | if (code == EQ && GET_CODE (op0) == SUBREG |
2e794ee8 RS |
4139 | && (GET_MODE_SIZE (GET_MODE (op0)) |
4140 | > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0))))) | |
7afe21cc RK |
4141 | { |
4142 | enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0)); | |
4143 | rtx tem = gen_lowpart_if_possible (inner_mode, op1); | |
4144 | ||
4145 | record_jump_cond (code, mode, SUBREG_REG (op0), | |
38a448ca | 4146 | tem ? tem : gen_rtx_SUBREG (inner_mode, op1, 0), |
7afe21cc RK |
4147 | reversed_nonequality); |
4148 | } | |
4149 | ||
4150 | if (code == EQ && GET_CODE (op1) == SUBREG | |
2e794ee8 RS |
4151 | && (GET_MODE_SIZE (GET_MODE (op1)) |
4152 | > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1))))) | |
7afe21cc RK |
4153 | { |
4154 | enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1)); | |
4155 | rtx tem = gen_lowpart_if_possible (inner_mode, op0); | |
4156 | ||
4157 | record_jump_cond (code, mode, SUBREG_REG (op1), | |
38a448ca | 4158 | tem ? tem : gen_rtx_SUBREG (inner_mode, op0, 0), |
7afe21cc RK |
4159 | reversed_nonequality); |
4160 | } | |
4161 | ||
4162 | /* Similarly, if this is an NE comparison, and either is a SUBREG | |
4163 | making a smaller mode, we know the whole thing is also NE. */ | |
4164 | ||
2e794ee8 RS |
4165 | /* Note that GET_MODE (op0) may not equal MODE; |
4166 | if we test MODE instead, we can get an infinite recursion | |
4167 | alternating between two modes each wider than MODE. */ | |
4168 | ||
7afe21cc RK |
4169 | if (code == NE && GET_CODE (op0) == SUBREG |
4170 | && subreg_lowpart_p (op0) | |
2e794ee8 RS |
4171 | && (GET_MODE_SIZE (GET_MODE (op0)) |
4172 | < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0))))) | |
7afe21cc RK |
4173 | { |
4174 | enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0)); | |
4175 | rtx tem = gen_lowpart_if_possible (inner_mode, op1); | |
4176 | ||
4177 | record_jump_cond (code, mode, SUBREG_REG (op0), | |
38a448ca | 4178 | tem ? tem : gen_rtx_SUBREG (inner_mode, op1, 0), |
7afe21cc RK |
4179 | reversed_nonequality); |
4180 | } | |
4181 | ||
4182 | if (code == NE && GET_CODE (op1) == SUBREG | |
4183 | && subreg_lowpart_p (op1) | |
2e794ee8 RS |
4184 | && (GET_MODE_SIZE (GET_MODE (op1)) |
4185 | < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1))))) | |
7afe21cc RK |
4186 | { |
4187 | enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1)); | |
4188 | rtx tem = gen_lowpart_if_possible (inner_mode, op0); | |
4189 | ||
4190 | record_jump_cond (code, mode, SUBREG_REG (op1), | |
38a448ca | 4191 | tem ? tem : gen_rtx_SUBREG (inner_mode, op0, 0), |
7afe21cc RK |
4192 | reversed_nonequality); |
4193 | } | |
4194 | ||
4195 | /* Hash both operands. */ | |
4196 | ||
4197 | do_not_record = 0; | |
4198 | hash_arg_in_memory = 0; | |
2197a88a | 4199 | op0_hash = HASH (op0, mode); |
7afe21cc | 4200 | op0_in_memory = hash_arg_in_memory; |
7afe21cc RK |
4201 | |
4202 | if (do_not_record) | |
4203 | return; | |
4204 | ||
4205 | do_not_record = 0; | |
4206 | hash_arg_in_memory = 0; | |
2197a88a | 4207 | op1_hash = HASH (op1, mode); |
7afe21cc | 4208 | op1_in_memory = hash_arg_in_memory; |
7afe21cc RK |
4209 | |
4210 | if (do_not_record) | |
4211 | return; | |
4212 | ||
4213 | /* Look up both operands. */ | |
2197a88a RK |
4214 | op0_elt = lookup (op0, op0_hash, mode); |
4215 | op1_elt = lookup (op1, op1_hash, mode); | |
7afe21cc | 4216 | |
af3869c1 RK |
4217 | /* If both operands are already equivalent or if they are not in the |
4218 | table but are identical, do nothing. */ | |
4219 | if ((op0_elt != 0 && op1_elt != 0 | |
4220 | && op0_elt->first_same_value == op1_elt->first_same_value) | |
4221 | || op0 == op1 || rtx_equal_p (op0, op1)) | |
4222 | return; | |
4223 | ||
7afe21cc | 4224 | /* If we aren't setting two things equal all we can do is save this |
b2796a4b RK |
4225 | comparison. Similarly if this is floating-point. In the latter |
4226 | case, OP1 might be zero and both -0.0 and 0.0 are equal to it. | |
4227 | If we record the equality, we might inadvertently delete code | |
4228 | whose intent was to change -0 to +0. */ | |
4229 | ||
cbf6a543 | 4230 | if (code != EQ || FLOAT_MODE_P (GET_MODE (op0))) |
7afe21cc RK |
4231 | { |
4232 | /* If we reversed a floating-point comparison, if OP0 is not a | |
4233 | register, or if OP1 is neither a register or constant, we can't | |
4234 | do anything. */ | |
4235 | ||
4236 | if (GET_CODE (op1) != REG) | |
4237 | op1 = equiv_constant (op1); | |
4238 | ||
cbf6a543 | 4239 | if ((reversed_nonequality && FLOAT_MODE_P (mode)) |
7afe21cc RK |
4240 | || GET_CODE (op0) != REG || op1 == 0) |
4241 | return; | |
4242 | ||
4243 | /* Put OP0 in the hash table if it isn't already. This gives it a | |
4244 | new quantity number. */ | |
4245 | if (op0_elt == 0) | |
4246 | { | |
906c4e36 | 4247 | if (insert_regs (op0, NULL_PTR, 0)) |
7afe21cc RK |
4248 | { |
4249 | rehash_using_reg (op0); | |
2197a88a | 4250 | op0_hash = HASH (op0, mode); |
2bb81c86 RK |
4251 | |
4252 | /* If OP0 is contained in OP1, this changes its hash code | |
4253 | as well. Faster to rehash than to check, except | |
4254 | for the simple case of a constant. */ | |
4255 | if (! CONSTANT_P (op1)) | |
2197a88a | 4256 | op1_hash = HASH (op1,mode); |
7afe21cc RK |
4257 | } |
4258 | ||
2197a88a | 4259 | op0_elt = insert (op0, NULL_PTR, op0_hash, mode); |
7afe21cc | 4260 | op0_elt->in_memory = op0_in_memory; |
7afe21cc RK |
4261 | } |
4262 | ||
30f72379 | 4263 | qty_comparison_code[REG_QTY (REGNO (op0))] = code; |
7afe21cc RK |
4264 | if (GET_CODE (op1) == REG) |
4265 | { | |
5d5ea909 | 4266 | /* Look it up again--in case op0 and op1 are the same. */ |
2197a88a | 4267 | op1_elt = lookup (op1, op1_hash, mode); |
5d5ea909 | 4268 | |
7afe21cc RK |
4269 | /* Put OP1 in the hash table so it gets a new quantity number. */ |
4270 | if (op1_elt == 0) | |
4271 | { | |
906c4e36 | 4272 | if (insert_regs (op1, NULL_PTR, 0)) |
7afe21cc RK |
4273 | { |
4274 | rehash_using_reg (op1); | |
2197a88a | 4275 | op1_hash = HASH (op1, mode); |
7afe21cc RK |
4276 | } |
4277 | ||
2197a88a | 4278 | op1_elt = insert (op1, NULL_PTR, op1_hash, mode); |
7afe21cc | 4279 | op1_elt->in_memory = op1_in_memory; |
7afe21cc RK |
4280 | } |
4281 | ||
30f72379 MM |
4282 | qty_comparison_qty[REG_QTY (REGNO (op0))] = REG_QTY (REGNO (op1)); |
4283 | qty_comparison_const[REG_QTY (REGNO (op0))] = 0; | |
7afe21cc RK |
4284 | } |
4285 | else | |
4286 | { | |
30f72379 MM |
4287 | qty_comparison_qty[REG_QTY (REGNO (op0))] = -1; |
4288 | qty_comparison_const[REG_QTY (REGNO (op0))] = op1; | |
7afe21cc RK |
4289 | } |
4290 | ||
4291 | return; | |
4292 | } | |
4293 | ||
eb5ad42a RS |
4294 | /* If either side is still missing an equivalence, make it now, |
4295 | then merge the equivalences. */ | |
7afe21cc | 4296 | |
7afe21cc RK |
4297 | if (op0_elt == 0) |
4298 | { | |
eb5ad42a | 4299 | if (insert_regs (op0, NULL_PTR, 0)) |
7afe21cc RK |
4300 | { |
4301 | rehash_using_reg (op0); | |
2197a88a | 4302 | op0_hash = HASH (op0, mode); |
7afe21cc RK |
4303 | } |
4304 | ||
2197a88a | 4305 | op0_elt = insert (op0, NULL_PTR, op0_hash, mode); |
7afe21cc | 4306 | op0_elt->in_memory = op0_in_memory; |
7afe21cc RK |
4307 | } |
4308 | ||
4309 | if (op1_elt == 0) | |
4310 | { | |
eb5ad42a | 4311 | if (insert_regs (op1, NULL_PTR, 0)) |
7afe21cc RK |
4312 | { |
4313 | rehash_using_reg (op1); | |
2197a88a | 4314 | op1_hash = HASH (op1, mode); |
7afe21cc RK |
4315 | } |
4316 | ||
2197a88a | 4317 | op1_elt = insert (op1, NULL_PTR, op1_hash, mode); |
7afe21cc | 4318 | op1_elt->in_memory = op1_in_memory; |
7afe21cc | 4319 | } |
eb5ad42a RS |
4320 | |
4321 | merge_equiv_classes (op0_elt, op1_elt); | |
4322 | last_jump_equiv_class = op0_elt; | |
7afe21cc RK |
4323 | } |
4324 | \f | |
4325 | /* CSE processing for one instruction. | |
4326 | First simplify sources and addresses of all assignments | |
4327 | in the instruction, using previously-computed equivalents values. | |
4328 | Then install the new sources and destinations in the table | |
4329 | of available values. | |
4330 | ||
1ed0205e VM |
4331 | If LIBCALL_INSN is nonzero, don't record any equivalence made in |
4332 | the insn. It means that INSN is inside libcall block. In this | |
4333 | case LIBCALL_INSN is the corresponding insn with REG_LIBCALL. */ | |
7afe21cc RK |
4334 | |
4335 | /* Data on one SET contained in the instruction. */ | |
4336 | ||
4337 | struct set | |
4338 | { | |
4339 | /* The SET rtx itself. */ | |
4340 | rtx rtl; | |
4341 | /* The SET_SRC of the rtx (the original value, if it is changing). */ | |
4342 | rtx src; | |
4343 | /* The hash-table element for the SET_SRC of the SET. */ | |
4344 | struct table_elt *src_elt; | |
2197a88a RK |
4345 | /* Hash value for the SET_SRC. */ |
4346 | unsigned src_hash; | |
4347 | /* Hash value for the SET_DEST. */ | |
4348 | unsigned dest_hash; | |
7afe21cc RK |
4349 | /* The SET_DEST, with SUBREG, etc., stripped. */ |
4350 | rtx inner_dest; | |
7afe21cc RK |
4351 | /* Nonzero if the SET_SRC is in memory. */ |
4352 | char src_in_memory; | |
7afe21cc RK |
4353 | /* Nonzero if the SET_SRC contains something |
4354 | whose value cannot be predicted and understood. */ | |
4355 | char src_volatile; | |
4356 | /* Original machine mode, in case it becomes a CONST_INT. */ | |
4357 | enum machine_mode mode; | |
4358 | /* A constant equivalent for SET_SRC, if any. */ | |
4359 | rtx src_const; | |
2197a88a RK |
4360 | /* Hash value of constant equivalent for SET_SRC. */ |
4361 | unsigned src_const_hash; | |
7afe21cc RK |
4362 | /* Table entry for constant equivalent for SET_SRC, if any. */ |
4363 | struct table_elt *src_const_elt; | |
4364 | }; | |
4365 | ||
4366 | static void | |
7bd8b2a8 | 4367 | cse_insn (insn, libcall_insn) |
7afe21cc | 4368 | rtx insn; |
7bd8b2a8 | 4369 | rtx libcall_insn; |
7afe21cc RK |
4370 | { |
4371 | register rtx x = PATTERN (insn); | |
7afe21cc | 4372 | register int i; |
92f9aa51 | 4373 | rtx tem; |
7afe21cc RK |
4374 | register int n_sets = 0; |
4375 | ||
2d8b0f3a | 4376 | #ifdef HAVE_cc0 |
7afe21cc RK |
4377 | /* Records what this insn does to set CC0. */ |
4378 | rtx this_insn_cc0 = 0; | |
135d84b8 | 4379 | enum machine_mode this_insn_cc0_mode = VOIDmode; |
2d8b0f3a | 4380 | #endif |
7afe21cc RK |
4381 | |
4382 | rtx src_eqv = 0; | |
4383 | struct table_elt *src_eqv_elt = 0; | |
6a651371 KG |
4384 | int src_eqv_volatile = 0; |
4385 | int src_eqv_in_memory = 0; | |
6a651371 | 4386 | unsigned src_eqv_hash = 0; |
7afe21cc | 4387 | |
6a651371 | 4388 | struct set *sets = NULL_PTR; |
7afe21cc RK |
4389 | |
4390 | this_insn = insn; | |
7afe21cc RK |
4391 | |
4392 | /* Find all the SETs and CLOBBERs in this instruction. | |
4393 | Record all the SETs in the array `set' and count them. | |
4394 | Also determine whether there is a CLOBBER that invalidates | |
4395 | all memory references, or all references at varying addresses. */ | |
4396 | ||
f1e7c95f RK |
4397 | if (GET_CODE (insn) == CALL_INSN) |
4398 | { | |
4399 | for (tem = CALL_INSN_FUNCTION_USAGE (insn); tem; tem = XEXP (tem, 1)) | |
4400 | if (GET_CODE (XEXP (tem, 0)) == CLOBBER) | |
bb4034b3 | 4401 | invalidate (SET_DEST (XEXP (tem, 0)), VOIDmode); |
f1e7c95f RK |
4402 | } |
4403 | ||
7afe21cc RK |
4404 | if (GET_CODE (x) == SET) |
4405 | { | |
4406 | sets = (struct set *) alloca (sizeof (struct set)); | |
4407 | sets[0].rtl = x; | |
4408 | ||
4409 | /* Ignore SETs that are unconditional jumps. | |
4410 | They never need cse processing, so this does not hurt. | |
4411 | The reason is not efficiency but rather | |
4412 | so that we can test at the end for instructions | |
4413 | that have been simplified to unconditional jumps | |
4414 | and not be misled by unchanged instructions | |
4415 | that were unconditional jumps to begin with. */ | |
4416 | if (SET_DEST (x) == pc_rtx | |
4417 | && GET_CODE (SET_SRC (x)) == LABEL_REF) | |
4418 | ; | |
4419 | ||
4420 | /* Don't count call-insns, (set (reg 0) (call ...)), as a set. | |
4421 | The hard function value register is used only once, to copy to | |
4422 | someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)! | |
4423 | Ensure we invalidate the destination register. On the 80386 no | |
7722328e | 4424 | other code would invalidate it since it is a fixed_reg. |
0f41302f | 4425 | We need not check the return of apply_change_group; see canon_reg. */ |
7afe21cc RK |
4426 | |
4427 | else if (GET_CODE (SET_SRC (x)) == CALL) | |
4428 | { | |
4429 | canon_reg (SET_SRC (x), insn); | |
77fa0940 | 4430 | apply_change_group (); |
7afe21cc | 4431 | fold_rtx (SET_SRC (x), insn); |
bb4034b3 | 4432 | invalidate (SET_DEST (x), VOIDmode); |
7afe21cc RK |
4433 | } |
4434 | else | |
4435 | n_sets = 1; | |
4436 | } | |
4437 | else if (GET_CODE (x) == PARALLEL) | |
4438 | { | |
4439 | register int lim = XVECLEN (x, 0); | |
4440 | ||
4441 | sets = (struct set *) alloca (lim * sizeof (struct set)); | |
4442 | ||
4443 | /* Find all regs explicitly clobbered in this insn, | |
4444 | and ensure they are not replaced with any other regs | |
4445 | elsewhere in this insn. | |
4446 | When a reg that is clobbered is also used for input, | |
4447 | we should presume that that is for a reason, | |
4448 | and we should not substitute some other register | |
4449 | which is not supposed to be clobbered. | |
4450 | Therefore, this loop cannot be merged into the one below | |
830a38ee | 4451 | because a CALL may precede a CLOBBER and refer to the |
7afe21cc RK |
4452 | value clobbered. We must not let a canonicalization do |
4453 | anything in that case. */ | |
4454 | for (i = 0; i < lim; i++) | |
4455 | { | |
4456 | register rtx y = XVECEXP (x, 0, i); | |
2708da92 RS |
4457 | if (GET_CODE (y) == CLOBBER) |
4458 | { | |
4459 | rtx clobbered = XEXP (y, 0); | |
4460 | ||
4461 | if (GET_CODE (clobbered) == REG | |
4462 | || GET_CODE (clobbered) == SUBREG) | |
bb4034b3 | 4463 | invalidate (clobbered, VOIDmode); |
2708da92 RS |
4464 | else if (GET_CODE (clobbered) == STRICT_LOW_PART |
4465 | || GET_CODE (clobbered) == ZERO_EXTRACT) | |
bb4034b3 | 4466 | invalidate (XEXP (clobbered, 0), GET_MODE (clobbered)); |
2708da92 | 4467 | } |
7afe21cc RK |
4468 | } |
4469 | ||
4470 | for (i = 0; i < lim; i++) | |
4471 | { | |
4472 | register rtx y = XVECEXP (x, 0, i); | |
4473 | if (GET_CODE (y) == SET) | |
4474 | { | |
7722328e RK |
4475 | /* As above, we ignore unconditional jumps and call-insns and |
4476 | ignore the result of apply_change_group. */ | |
7afe21cc RK |
4477 | if (GET_CODE (SET_SRC (y)) == CALL) |
4478 | { | |
4479 | canon_reg (SET_SRC (y), insn); | |
77fa0940 | 4480 | apply_change_group (); |
7afe21cc | 4481 | fold_rtx (SET_SRC (y), insn); |
bb4034b3 | 4482 | invalidate (SET_DEST (y), VOIDmode); |
7afe21cc RK |
4483 | } |
4484 | else if (SET_DEST (y) == pc_rtx | |
4485 | && GET_CODE (SET_SRC (y)) == LABEL_REF) | |
4486 | ; | |
4487 | else | |
4488 | sets[n_sets++].rtl = y; | |
4489 | } | |
4490 | else if (GET_CODE (y) == CLOBBER) | |
4491 | { | |
9ae8ffe7 | 4492 | /* If we clobber memory, canon the address. |
7afe21cc RK |
4493 | This does nothing when a register is clobbered |
4494 | because we have already invalidated the reg. */ | |
4495 | if (GET_CODE (XEXP (y, 0)) == MEM) | |
9ae8ffe7 | 4496 | canon_reg (XEXP (y, 0), NULL_RTX); |
7afe21cc RK |
4497 | } |
4498 | else if (GET_CODE (y) == USE | |
4499 | && ! (GET_CODE (XEXP (y, 0)) == REG | |
4500 | && REGNO (XEXP (y, 0)) < FIRST_PSEUDO_REGISTER)) | |
906c4e36 | 4501 | canon_reg (y, NULL_RTX); |
7afe21cc RK |
4502 | else if (GET_CODE (y) == CALL) |
4503 | { | |
7722328e RK |
4504 | /* The result of apply_change_group can be ignored; see |
4505 | canon_reg. */ | |
7afe21cc | 4506 | canon_reg (y, insn); |
77fa0940 | 4507 | apply_change_group (); |
7afe21cc RK |
4508 | fold_rtx (y, insn); |
4509 | } | |
4510 | } | |
4511 | } | |
4512 | else if (GET_CODE (x) == CLOBBER) | |
4513 | { | |
4514 | if (GET_CODE (XEXP (x, 0)) == MEM) | |
9ae8ffe7 | 4515 | canon_reg (XEXP (x, 0), NULL_RTX); |
7afe21cc RK |
4516 | } |
4517 | ||
4518 | /* Canonicalize a USE of a pseudo register or memory location. */ | |
4519 | else if (GET_CODE (x) == USE | |
4520 | && ! (GET_CODE (XEXP (x, 0)) == REG | |
4521 | && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)) | |
906c4e36 | 4522 | canon_reg (XEXP (x, 0), NULL_RTX); |
7afe21cc RK |
4523 | else if (GET_CODE (x) == CALL) |
4524 | { | |
7722328e | 4525 | /* The result of apply_change_group can be ignored; see canon_reg. */ |
7afe21cc | 4526 | canon_reg (x, insn); |
77fa0940 | 4527 | apply_change_group (); |
7afe21cc RK |
4528 | fold_rtx (x, insn); |
4529 | } | |
4530 | ||
7b3ab05e JW |
4531 | /* Store the equivalent value in SRC_EQV, if different, or if the DEST |
4532 | is a STRICT_LOW_PART. The latter condition is necessary because SRC_EQV | |
4533 | is handled specially for this case, and if it isn't set, then there will | |
9faa82d8 | 4534 | be no equivalence for the destination. */ |
92f9aa51 RK |
4535 | if (n_sets == 1 && REG_NOTES (insn) != 0 |
4536 | && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0 | |
7b3ab05e JW |
4537 | && (! rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl)) |
4538 | || GET_CODE (SET_DEST (sets[0].rtl)) == STRICT_LOW_PART)) | |
92f9aa51 | 4539 | src_eqv = canon_reg (XEXP (tem, 0), NULL_RTX); |
7afe21cc RK |
4540 | |
4541 | /* Canonicalize sources and addresses of destinations. | |
4542 | We do this in a separate pass to avoid problems when a MATCH_DUP is | |
4543 | present in the insn pattern. In that case, we want to ensure that | |
4544 | we don't break the duplicate nature of the pattern. So we will replace | |
4545 | both operands at the same time. Otherwise, we would fail to find an | |
4546 | equivalent substitution in the loop calling validate_change below. | |
7afe21cc RK |
4547 | |
4548 | We used to suppress canonicalization of DEST if it appears in SRC, | |
77fa0940 | 4549 | but we don't do this any more. */ |
7afe21cc RK |
4550 | |
4551 | for (i = 0; i < n_sets; i++) | |
4552 | { | |
4553 | rtx dest = SET_DEST (sets[i].rtl); | |
4554 | rtx src = SET_SRC (sets[i].rtl); | |
4555 | rtx new = canon_reg (src, insn); | |
58873255 | 4556 | int insn_code; |
7afe21cc | 4557 | |
77fa0940 RK |
4558 | if ((GET_CODE (new) == REG && GET_CODE (src) == REG |
4559 | && ((REGNO (new) < FIRST_PSEUDO_REGISTER) | |
4560 | != (REGNO (src) < FIRST_PSEUDO_REGISTER))) | |
58873255 | 4561 | || (insn_code = recog_memoized (insn)) < 0 |
a995e389 | 4562 | || insn_data[insn_code].n_dups > 0) |
77fa0940 | 4563 | validate_change (insn, &SET_SRC (sets[i].rtl), new, 1); |
7afe21cc RK |
4564 | else |
4565 | SET_SRC (sets[i].rtl) = new; | |
4566 | ||
4567 | if (GET_CODE (dest) == ZERO_EXTRACT || GET_CODE (dest) == SIGN_EXTRACT) | |
4568 | { | |
4569 | validate_change (insn, &XEXP (dest, 1), | |
77fa0940 | 4570 | canon_reg (XEXP (dest, 1), insn), 1); |
7afe21cc | 4571 | validate_change (insn, &XEXP (dest, 2), |
77fa0940 | 4572 | canon_reg (XEXP (dest, 2), insn), 1); |
7afe21cc RK |
4573 | } |
4574 | ||
4575 | while (GET_CODE (dest) == SUBREG || GET_CODE (dest) == STRICT_LOW_PART | |
4576 | || GET_CODE (dest) == ZERO_EXTRACT | |
4577 | || GET_CODE (dest) == SIGN_EXTRACT) | |
4578 | dest = XEXP (dest, 0); | |
4579 | ||
4580 | if (GET_CODE (dest) == MEM) | |
4581 | canon_reg (dest, insn); | |
4582 | } | |
4583 | ||
77fa0940 RK |
4584 | /* Now that we have done all the replacements, we can apply the change |
4585 | group and see if they all work. Note that this will cause some | |
4586 | canonicalizations that would have worked individually not to be applied | |
4587 | because some other canonicalization didn't work, but this should not | |
7722328e RK |
4588 | occur often. |
4589 | ||
4590 | The result of apply_change_group can be ignored; see canon_reg. */ | |
77fa0940 RK |
4591 | |
4592 | apply_change_group (); | |
4593 | ||
7afe21cc RK |
4594 | /* Set sets[i].src_elt to the class each source belongs to. |
4595 | Detect assignments from or to volatile things | |
4596 | and set set[i] to zero so they will be ignored | |
4597 | in the rest of this function. | |
4598 | ||
4599 | Nothing in this loop changes the hash table or the register chains. */ | |
4600 | ||
4601 | for (i = 0; i < n_sets; i++) | |
4602 | { | |
4603 | register rtx src, dest; | |
4604 | register rtx src_folded; | |
4605 | register struct table_elt *elt = 0, *p; | |
4606 | enum machine_mode mode; | |
4607 | rtx src_eqv_here; | |
4608 | rtx src_const = 0; | |
4609 | rtx src_related = 0; | |
4610 | struct table_elt *src_const_elt = 0; | |
4611 | int src_cost = 10000, src_eqv_cost = 10000, src_folded_cost = 10000; | |
4612 | int src_related_cost = 10000, src_elt_cost = 10000; | |
4613 | /* Set non-zero if we need to call force_const_mem on with the | |
4614 | contents of src_folded before using it. */ | |
4615 | int src_folded_force_flag = 0; | |
4616 | ||
4617 | dest = SET_DEST (sets[i].rtl); | |
4618 | src = SET_SRC (sets[i].rtl); | |
4619 | ||
4620 | /* If SRC is a constant that has no machine mode, | |
4621 | hash it with the destination's machine mode. | |
4622 | This way we can keep different modes separate. */ | |
4623 | ||
4624 | mode = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src); | |
4625 | sets[i].mode = mode; | |
4626 | ||
4627 | if (src_eqv) | |
4628 | { | |
4629 | enum machine_mode eqvmode = mode; | |
4630 | if (GET_CODE (dest) == STRICT_LOW_PART) | |
4631 | eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0))); | |
4632 | do_not_record = 0; | |
4633 | hash_arg_in_memory = 0; | |
7afe21cc | 4634 | src_eqv = fold_rtx (src_eqv, insn); |
2197a88a | 4635 | src_eqv_hash = HASH (src_eqv, eqvmode); |
7afe21cc RK |
4636 | |
4637 | /* Find the equivalence class for the equivalent expression. */ | |
4638 | ||
4639 | if (!do_not_record) | |
2197a88a | 4640 | src_eqv_elt = lookup (src_eqv, src_eqv_hash, eqvmode); |
7afe21cc RK |
4641 | |
4642 | src_eqv_volatile = do_not_record; | |
4643 | src_eqv_in_memory = hash_arg_in_memory; | |
7afe21cc RK |
4644 | } |
4645 | ||
4646 | /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the | |
4647 | value of the INNER register, not the destination. So it is not | |
3826a3da | 4648 | a valid substitution for the source. But save it for later. */ |
7afe21cc RK |
4649 | if (GET_CODE (dest) == STRICT_LOW_PART) |
4650 | src_eqv_here = 0; | |
4651 | else | |
4652 | src_eqv_here = src_eqv; | |
4653 | ||
4654 | /* Simplify and foldable subexpressions in SRC. Then get the fully- | |
4655 | simplified result, which may not necessarily be valid. */ | |
4656 | src_folded = fold_rtx (src, insn); | |
4657 | ||
e6a125a0 RK |
4658 | #if 0 |
4659 | /* ??? This caused bad code to be generated for the m68k port with -O2. | |
4660 | Suppose src is (CONST_INT -1), and that after truncation src_folded | |
4661 | is (CONST_INT 3). Suppose src_folded is then used for src_const. | |
4662 | At the end we will add src and src_const to the same equivalence | |
4663 | class. We now have 3 and -1 on the same equivalence class. This | |
4664 | causes later instructions to be mis-optimized. */ | |
7afe21cc RK |
4665 | /* If storing a constant in a bitfield, pre-truncate the constant |
4666 | so we will be able to record it later. */ | |
4667 | if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT | |
4668 | || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT) | |
4669 | { | |
4670 | rtx width = XEXP (SET_DEST (sets[i].rtl), 1); | |
4671 | ||
4672 | if (GET_CODE (src) == CONST_INT | |
4673 | && GET_CODE (width) == CONST_INT | |
906c4e36 RK |
4674 | && INTVAL (width) < HOST_BITS_PER_WIDE_INT |
4675 | && (INTVAL (src) & ((HOST_WIDE_INT) (-1) << INTVAL (width)))) | |
4676 | src_folded | |
4677 | = GEN_INT (INTVAL (src) & (((HOST_WIDE_INT) 1 | |
4678 | << INTVAL (width)) - 1)); | |
7afe21cc | 4679 | } |
e6a125a0 | 4680 | #endif |
7afe21cc RK |
4681 | |
4682 | /* Compute SRC's hash code, and also notice if it | |
4683 | should not be recorded at all. In that case, | |
4684 | prevent any further processing of this assignment. */ | |
4685 | do_not_record = 0; | |
4686 | hash_arg_in_memory = 0; | |
7afe21cc RK |
4687 | |
4688 | sets[i].src = src; | |
2197a88a | 4689 | sets[i].src_hash = HASH (src, mode); |
7afe21cc RK |
4690 | sets[i].src_volatile = do_not_record; |
4691 | sets[i].src_in_memory = hash_arg_in_memory; | |
7afe21cc | 4692 | |
50196afa RK |
4693 | /* If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is |
4694 | a pseudo that is set more than once, do not record SRC. Using | |
4695 | SRC as a replacement for anything else will be incorrect in that | |
4696 | situation. Note that this usually occurs only for stack slots, | |
956d6950 | 4697 | in which case all the RTL would be referring to SRC, so we don't |
50196afa RK |
4698 | lose any optimization opportunities by not having SRC in the |
4699 | hash table. */ | |
4700 | ||
4701 | if (GET_CODE (src) == MEM | |
4702 | && find_reg_note (insn, REG_EQUIV, src) != 0 | |
4703 | && GET_CODE (dest) == REG | |
4704 | && REGNO (dest) >= FIRST_PSEUDO_REGISTER | |
b1f21e0a | 4705 | && REG_N_SETS (REGNO (dest)) != 1) |
50196afa RK |
4706 | sets[i].src_volatile = 1; |
4707 | ||
0dadecf6 RK |
4708 | #if 0 |
4709 | /* It is no longer clear why we used to do this, but it doesn't | |
4710 | appear to still be needed. So let's try without it since this | |
4711 | code hurts cse'ing widened ops. */ | |
7afe21cc RK |
4712 | /* If source is a perverse subreg (such as QI treated as an SI), |
4713 | treat it as volatile. It may do the work of an SI in one context | |
4714 | where the extra bits are not being used, but cannot replace an SI | |
4715 | in general. */ | |
4716 | if (GET_CODE (src) == SUBREG | |
4717 | && (GET_MODE_SIZE (GET_MODE (src)) | |
4718 | > GET_MODE_SIZE (GET_MODE (SUBREG_REG (src))))) | |
4719 | sets[i].src_volatile = 1; | |
0dadecf6 | 4720 | #endif |
7afe21cc RK |
4721 | |
4722 | /* Locate all possible equivalent forms for SRC. Try to replace | |
4723 | SRC in the insn with each cheaper equivalent. | |
4724 | ||
4725 | We have the following types of equivalents: SRC itself, a folded | |
4726 | version, a value given in a REG_EQUAL note, or a value related | |
4727 | to a constant. | |
4728 | ||
4729 | Each of these equivalents may be part of an additional class | |
4730 | of equivalents (if more than one is in the table, they must be in | |
4731 | the same class; we check for this). | |
4732 | ||
4733 | If the source is volatile, we don't do any table lookups. | |
4734 | ||
4735 | We note any constant equivalent for possible later use in a | |
4736 | REG_NOTE. */ | |
4737 | ||
4738 | if (!sets[i].src_volatile) | |
2197a88a | 4739 | elt = lookup (src, sets[i].src_hash, mode); |
7afe21cc RK |
4740 | |
4741 | sets[i].src_elt = elt; | |
4742 | ||
4743 | if (elt && src_eqv_here && src_eqv_elt) | |
4744 | { | |
4745 | if (elt->first_same_value != src_eqv_elt->first_same_value) | |
4746 | { | |
4747 | /* The REG_EQUAL is indicating that two formerly distinct | |
4748 | classes are now equivalent. So merge them. */ | |
4749 | merge_equiv_classes (elt, src_eqv_elt); | |
2197a88a RK |
4750 | src_eqv_hash = HASH (src_eqv, elt->mode); |
4751 | src_eqv_elt = lookup (src_eqv, src_eqv_hash, elt->mode); | |
7afe21cc RK |
4752 | } |
4753 | ||
4754 | src_eqv_here = 0; | |
4755 | } | |
4756 | ||
4757 | else if (src_eqv_elt) | |
4758 | elt = src_eqv_elt; | |
4759 | ||
4760 | /* Try to find a constant somewhere and record it in `src_const'. | |
4761 | Record its table element, if any, in `src_const_elt'. Look in | |
4762 | any known equivalences first. (If the constant is not in the | |
2197a88a | 4763 | table, also set `sets[i].src_const_hash'). */ |
7afe21cc RK |
4764 | if (elt) |
4765 | for (p = elt->first_same_value; p; p = p->next_same_value) | |
4766 | if (p->is_const) | |
4767 | { | |
4768 | src_const = p->exp; | |
4769 | src_const_elt = elt; | |
4770 | break; | |
4771 | } | |
4772 | ||
4773 | if (src_const == 0 | |
4774 | && (CONSTANT_P (src_folded) | |
4775 | /* Consider (minus (label_ref L1) (label_ref L2)) as | |
4776 | "constant" here so we will record it. This allows us | |
4777 | to fold switch statements when an ADDR_DIFF_VEC is used. */ | |
4778 | || (GET_CODE (src_folded) == MINUS | |
4779 | && GET_CODE (XEXP (src_folded, 0)) == LABEL_REF | |
4780 | && GET_CODE (XEXP (src_folded, 1)) == LABEL_REF))) | |
4781 | src_const = src_folded, src_const_elt = elt; | |
4782 | else if (src_const == 0 && src_eqv_here && CONSTANT_P (src_eqv_here)) | |
4783 | src_const = src_eqv_here, src_const_elt = src_eqv_elt; | |
4784 | ||
4785 | /* If we don't know if the constant is in the table, get its | |
4786 | hash code and look it up. */ | |
4787 | if (src_const && src_const_elt == 0) | |
4788 | { | |
2197a88a RK |
4789 | sets[i].src_const_hash = HASH (src_const, mode); |
4790 | src_const_elt = lookup (src_const, sets[i].src_const_hash, mode); | |
7afe21cc RK |
4791 | } |
4792 | ||
4793 | sets[i].src_const = src_const; | |
4794 | sets[i].src_const_elt = src_const_elt; | |
4795 | ||
4796 | /* If the constant and our source are both in the table, mark them as | |
4797 | equivalent. Otherwise, if a constant is in the table but the source | |
4798 | isn't, set ELT to it. */ | |
4799 | if (src_const_elt && elt | |
4800 | && src_const_elt->first_same_value != elt->first_same_value) | |
4801 | merge_equiv_classes (elt, src_const_elt); | |
4802 | else if (src_const_elt && elt == 0) | |
4803 | elt = src_const_elt; | |
4804 | ||
4805 | /* See if there is a register linearly related to a constant | |
4806 | equivalent of SRC. */ | |
4807 | if (src_const | |
4808 | && (GET_CODE (src_const) == CONST | |
4809 | || (src_const_elt && src_const_elt->related_value != 0))) | |
4810 | { | |
4811 | src_related = use_related_value (src_const, src_const_elt); | |
4812 | if (src_related) | |
4813 | { | |
4814 | struct table_elt *src_related_elt | |
4815 | = lookup (src_related, HASH (src_related, mode), mode); | |
4816 | if (src_related_elt && elt) | |
4817 | { | |
4818 | if (elt->first_same_value | |
4819 | != src_related_elt->first_same_value) | |
4820 | /* This can occur when we previously saw a CONST | |
4821 | involving a SYMBOL_REF and then see the SYMBOL_REF | |
4822 | twice. Merge the involved classes. */ | |
4823 | merge_equiv_classes (elt, src_related_elt); | |
4824 | ||
4825 | src_related = 0; | |
4826 | src_related_elt = 0; | |
4827 | } | |
4828 | else if (src_related_elt && elt == 0) | |
4829 | elt = src_related_elt; | |
4830 | } | |
4831 | } | |
4832 | ||
e4600702 RK |
4833 | /* See if we have a CONST_INT that is already in a register in a |
4834 | wider mode. */ | |
4835 | ||
4836 | if (src_const && src_related == 0 && GET_CODE (src_const) == CONST_INT | |
4837 | && GET_MODE_CLASS (mode) == MODE_INT | |
4838 | && GET_MODE_BITSIZE (mode) < BITS_PER_WORD) | |
4839 | { | |
4840 | enum machine_mode wider_mode; | |
4841 | ||
4842 | for (wider_mode = GET_MODE_WIDER_MODE (mode); | |
4843 | GET_MODE_BITSIZE (wider_mode) <= BITS_PER_WORD | |
4844 | && src_related == 0; | |
4845 | wider_mode = GET_MODE_WIDER_MODE (wider_mode)) | |
4846 | { | |
4847 | struct table_elt *const_elt | |
4848 | = lookup (src_const, HASH (src_const, wider_mode), wider_mode); | |
4849 | ||
4850 | if (const_elt == 0) | |
4851 | continue; | |
4852 | ||
4853 | for (const_elt = const_elt->first_same_value; | |
4854 | const_elt; const_elt = const_elt->next_same_value) | |
4855 | if (GET_CODE (const_elt->exp) == REG) | |
4856 | { | |
4857 | src_related = gen_lowpart_if_possible (mode, | |
4858 | const_elt->exp); | |
4859 | break; | |
4860 | } | |
4861 | } | |
4862 | } | |
4863 | ||
d45cf215 RS |
4864 | /* Another possibility is that we have an AND with a constant in |
4865 | a mode narrower than a word. If so, it might have been generated | |
4866 | as part of an "if" which would narrow the AND. If we already | |
4867 | have done the AND in a wider mode, we can use a SUBREG of that | |
4868 | value. */ | |
4869 | ||
4870 | if (flag_expensive_optimizations && ! src_related | |
4871 | && GET_CODE (src) == AND && GET_CODE (XEXP (src, 1)) == CONST_INT | |
4872 | && GET_MODE_SIZE (mode) < UNITS_PER_WORD) | |
4873 | { | |
4874 | enum machine_mode tmode; | |
38a448ca | 4875 | rtx new_and = gen_rtx_AND (VOIDmode, NULL_RTX, XEXP (src, 1)); |
d45cf215 RS |
4876 | |
4877 | for (tmode = GET_MODE_WIDER_MODE (mode); | |
4878 | GET_MODE_SIZE (tmode) <= UNITS_PER_WORD; | |
4879 | tmode = GET_MODE_WIDER_MODE (tmode)) | |
4880 | { | |
4881 | rtx inner = gen_lowpart_if_possible (tmode, XEXP (src, 0)); | |
4882 | struct table_elt *larger_elt; | |
4883 | ||
4884 | if (inner) | |
4885 | { | |
4886 | PUT_MODE (new_and, tmode); | |
4887 | XEXP (new_and, 0) = inner; | |
4888 | larger_elt = lookup (new_and, HASH (new_and, tmode), tmode); | |
4889 | if (larger_elt == 0) | |
4890 | continue; | |
4891 | ||
4892 | for (larger_elt = larger_elt->first_same_value; | |
4893 | larger_elt; larger_elt = larger_elt->next_same_value) | |
4894 | if (GET_CODE (larger_elt->exp) == REG) | |
4895 | { | |
4896 | src_related | |
4897 | = gen_lowpart_if_possible (mode, larger_elt->exp); | |
4898 | break; | |
4899 | } | |
4900 | ||
4901 | if (src_related) | |
4902 | break; | |
4903 | } | |
4904 | } | |
4905 | } | |
7bac1be0 RK |
4906 | |
4907 | #ifdef LOAD_EXTEND_OP | |
4908 | /* See if a MEM has already been loaded with a widening operation; | |
4909 | if it has, we can use a subreg of that. Many CISC machines | |
4910 | also have such operations, but this is only likely to be | |
4911 | beneficial these machines. */ | |
4912 | ||
4913 | if (flag_expensive_optimizations && src_related == 0 | |
4914 | && (GET_MODE_SIZE (mode) < UNITS_PER_WORD) | |
4915 | && GET_MODE_CLASS (mode) == MODE_INT | |
4916 | && GET_CODE (src) == MEM && ! do_not_record | |
4917 | && LOAD_EXTEND_OP (mode) != NIL) | |
4918 | { | |
4919 | enum machine_mode tmode; | |
4920 | ||
4921 | /* Set what we are trying to extend and the operation it might | |
4922 | have been extended with. */ | |
4923 | PUT_CODE (memory_extend_rtx, LOAD_EXTEND_OP (mode)); | |
4924 | XEXP (memory_extend_rtx, 0) = src; | |
4925 | ||
4926 | for (tmode = GET_MODE_WIDER_MODE (mode); | |
4927 | GET_MODE_SIZE (tmode) <= UNITS_PER_WORD; | |
4928 | tmode = GET_MODE_WIDER_MODE (tmode)) | |
4929 | { | |
4930 | struct table_elt *larger_elt; | |
4931 | ||
4932 | PUT_MODE (memory_extend_rtx, tmode); | |
4933 | larger_elt = lookup (memory_extend_rtx, | |
4934 | HASH (memory_extend_rtx, tmode), tmode); | |
4935 | if (larger_elt == 0) | |
4936 | continue; | |
4937 | ||
4938 | for (larger_elt = larger_elt->first_same_value; | |
4939 | larger_elt; larger_elt = larger_elt->next_same_value) | |
4940 | if (GET_CODE (larger_elt->exp) == REG) | |
4941 | { | |
4942 | src_related = gen_lowpart_if_possible (mode, | |
4943 | larger_elt->exp); | |
4944 | break; | |
4945 | } | |
4946 | ||
4947 | if (src_related) | |
4948 | break; | |
4949 | } | |
4950 | } | |
4951 | #endif /* LOAD_EXTEND_OP */ | |
4952 | ||
7afe21cc RK |
4953 | if (src == src_folded) |
4954 | src_folded = 0; | |
4955 | ||
4956 | /* At this point, ELT, if non-zero, points to a class of expressions | |
4957 | equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED, | |
4958 | and SRC_RELATED, if non-zero, each contain additional equivalent | |
4959 | expressions. Prune these latter expressions by deleting expressions | |
4960 | already in the equivalence class. | |
4961 | ||
4962 | Check for an equivalent identical to the destination. If found, | |
4963 | this is the preferred equivalent since it will likely lead to | |
4964 | elimination of the insn. Indicate this by placing it in | |
4965 | `src_related'. */ | |
4966 | ||
4967 | if (elt) elt = elt->first_same_value; | |
4968 | for (p = elt; p; p = p->next_same_value) | |
4969 | { | |
4970 | enum rtx_code code = GET_CODE (p->exp); | |
4971 | ||
4972 | /* If the expression is not valid, ignore it. Then we do not | |
4973 | have to check for validity below. In most cases, we can use | |
4974 | `rtx_equal_p', since canonicalization has already been done. */ | |
4975 | if (code != REG && ! exp_equiv_p (p->exp, p->exp, 1, 0)) | |
4976 | continue; | |
4977 | ||
5a03c8c4 RK |
4978 | /* Also skip paradoxical subregs, unless that's what we're |
4979 | looking for. */ | |
4980 | if (code == SUBREG | |
4981 | && (GET_MODE_SIZE (GET_MODE (p->exp)) | |
4982 | > GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp)))) | |
4983 | && ! (src != 0 | |
4984 | && GET_CODE (src) == SUBREG | |
4985 | && GET_MODE (src) == GET_MODE (p->exp) | |
4986 | && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src))) | |
4987 | < GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp)))))) | |
4988 | continue; | |
4989 | ||
7afe21cc RK |
4990 | if (src && GET_CODE (src) == code && rtx_equal_p (src, p->exp)) |
4991 | src = 0; | |
4992 | else if (src_folded && GET_CODE (src_folded) == code | |
4993 | && rtx_equal_p (src_folded, p->exp)) | |
4994 | src_folded = 0; | |
4995 | else if (src_eqv_here && GET_CODE (src_eqv_here) == code | |
4996 | && rtx_equal_p (src_eqv_here, p->exp)) | |
4997 | src_eqv_here = 0; | |
4998 | else if (src_related && GET_CODE (src_related) == code | |
4999 | && rtx_equal_p (src_related, p->exp)) | |
5000 | src_related = 0; | |
5001 | ||
5002 | /* This is the same as the destination of the insns, we want | |
5003 | to prefer it. Copy it to src_related. The code below will | |
5004 | then give it a negative cost. */ | |
5005 | if (GET_CODE (dest) == code && rtx_equal_p (p->exp, dest)) | |
5006 | src_related = dest; | |
5007 | ||
5008 | } | |
5009 | ||
5010 | /* Find the cheapest valid equivalent, trying all the available | |
5011 | possibilities. Prefer items not in the hash table to ones | |
5012 | that are when they are equal cost. Note that we can never | |
5013 | worsen an insn as the current contents will also succeed. | |
05c33dd8 | 5014 | If we find an equivalent identical to the destination, use it as best, |
0f41302f | 5015 | since this insn will probably be eliminated in that case. */ |
7afe21cc RK |
5016 | if (src) |
5017 | { | |
5018 | if (rtx_equal_p (src, dest)) | |
5019 | src_cost = -1; | |
5020 | else | |
5021 | src_cost = COST (src); | |
5022 | } | |
5023 | ||
5024 | if (src_eqv_here) | |
5025 | { | |
5026 | if (rtx_equal_p (src_eqv_here, dest)) | |
5027 | src_eqv_cost = -1; | |
5028 | else | |
5029 | src_eqv_cost = COST (src_eqv_here); | |
5030 | } | |
5031 | ||
5032 | if (src_folded) | |
5033 | { | |
5034 | if (rtx_equal_p (src_folded, dest)) | |
5035 | src_folded_cost = -1; | |
5036 | else | |
5037 | src_folded_cost = COST (src_folded); | |
5038 | } | |
5039 | ||
5040 | if (src_related) | |
5041 | { | |
5042 | if (rtx_equal_p (src_related, dest)) | |
5043 | src_related_cost = -1; | |
5044 | else | |
5045 | src_related_cost = COST (src_related); | |
5046 | } | |
5047 | ||
5048 | /* If this was an indirect jump insn, a known label will really be | |
5049 | cheaper even though it looks more expensive. */ | |
5050 | if (dest == pc_rtx && src_const && GET_CODE (src_const) == LABEL_REF) | |
5051 | src_folded = src_const, src_folded_cost = -1; | |
5052 | ||
5053 | /* Terminate loop when replacement made. This must terminate since | |
5054 | the current contents will be tested and will always be valid. */ | |
5055 | while (1) | |
5056 | { | |
7bd8b2a8 | 5057 | rtx trial, old_src; |
7afe21cc RK |
5058 | |
5059 | /* Skip invalid entries. */ | |
5060 | while (elt && GET_CODE (elt->exp) != REG | |
5061 | && ! exp_equiv_p (elt->exp, elt->exp, 1, 0)) | |
5062 | elt = elt->next_same_value; | |
5a03c8c4 RK |
5063 | |
5064 | /* A paradoxical subreg would be bad here: it'll be the right | |
5065 | size, but later may be adjusted so that the upper bits aren't | |
5066 | what we want. So reject it. */ | |
5067 | if (elt != 0 | |
5068 | && GET_CODE (elt->exp) == SUBREG | |
5069 | && (GET_MODE_SIZE (GET_MODE (elt->exp)) | |
5070 | > GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp)))) | |
5071 | /* It is okay, though, if the rtx we're trying to match | |
5072 | will ignore any of the bits we can't predict. */ | |
5073 | && ! (src != 0 | |
5074 | && GET_CODE (src) == SUBREG | |
5075 | && GET_MODE (src) == GET_MODE (elt->exp) | |
5076 | && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src))) | |
5077 | < GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp)))))) | |
5078 | { | |
5079 | elt = elt->next_same_value; | |
5080 | continue; | |
5081 | } | |
7afe21cc RK |
5082 | |
5083 | if (elt) src_elt_cost = elt->cost; | |
5084 | ||
5085 | /* Find cheapest and skip it for the next time. For items | |
5086 | of equal cost, use this order: | |
5087 | src_folded, src, src_eqv, src_related and hash table entry. */ | |
5088 | if (src_folded_cost <= src_cost | |
5089 | && src_folded_cost <= src_eqv_cost | |
5090 | && src_folded_cost <= src_related_cost | |
5091 | && src_folded_cost <= src_elt_cost) | |
5092 | { | |
5093 | trial = src_folded, src_folded_cost = 10000; | |
5094 | if (src_folded_force_flag) | |
5095 | trial = force_const_mem (mode, trial); | |
5096 | } | |
5097 | else if (src_cost <= src_eqv_cost | |
5098 | && src_cost <= src_related_cost | |
5099 | && src_cost <= src_elt_cost) | |
5100 | trial = src, src_cost = 10000; | |
5101 | else if (src_eqv_cost <= src_related_cost | |
5102 | && src_eqv_cost <= src_elt_cost) | |
0af62b41 | 5103 | trial = copy_rtx (src_eqv_here), src_eqv_cost = 10000; |
7afe21cc | 5104 | else if (src_related_cost <= src_elt_cost) |
0af62b41 | 5105 | trial = copy_rtx (src_related), src_related_cost = 10000; |
7afe21cc RK |
5106 | else |
5107 | { | |
05c33dd8 | 5108 | trial = copy_rtx (elt->exp); |
7afe21cc RK |
5109 | elt = elt->next_same_value; |
5110 | src_elt_cost = 10000; | |
5111 | } | |
5112 | ||
5113 | /* We don't normally have an insn matching (set (pc) (pc)), so | |
5114 | check for this separately here. We will delete such an | |
5115 | insn below. | |
5116 | ||
5117 | Tablejump insns contain a USE of the table, so simply replacing | |
5118 | the operand with the constant won't match. This is simply an | |
5119 | unconditional branch, however, and is therefore valid. Just | |
5120 | insert the substitution here and we will delete and re-emit | |
5121 | the insn later. */ | |
5122 | ||
7bd8b2a8 JL |
5123 | /* Keep track of the original SET_SRC so that we can fix notes |
5124 | on libcall instructions. */ | |
5125 | old_src = SET_SRC (sets[i].rtl); | |
5126 | ||
7afe21cc RK |
5127 | if (n_sets == 1 && dest == pc_rtx |
5128 | && (trial == pc_rtx | |
5129 | || (GET_CODE (trial) == LABEL_REF | |
5130 | && ! condjump_p (insn)))) | |
5131 | { | |
5132 | /* If TRIAL is a label in front of a jump table, we are | |
5133 | really falling through the switch (this is how casesi | |
5134 | insns work), so we must branch around the table. */ | |
5135 | if (GET_CODE (trial) == CODE_LABEL | |
5136 | && NEXT_INSN (trial) != 0 | |
5137 | && GET_CODE (NEXT_INSN (trial)) == JUMP_INSN | |
5138 | && (GET_CODE (PATTERN (NEXT_INSN (trial))) == ADDR_DIFF_VEC | |
5139 | || GET_CODE (PATTERN (NEXT_INSN (trial))) == ADDR_VEC)) | |
5140 | ||
38a448ca | 5141 | trial = gen_rtx_LABEL_REF (Pmode, get_label_after (trial)); |
7afe21cc RK |
5142 | |
5143 | SET_SRC (sets[i].rtl) = trial; | |
44333223 | 5144 | cse_jumps_altered = 1; |
7afe21cc RK |
5145 | break; |
5146 | } | |
5147 | ||
5148 | /* Look for a substitution that makes a valid insn. */ | |
5149 | else if (validate_change (insn, &SET_SRC (sets[i].rtl), trial, 0)) | |
05c33dd8 | 5150 | { |
7bd8b2a8 JL |
5151 | /* If we just made a substitution inside a libcall, then we |
5152 | need to make the same substitution in any notes attached | |
5153 | to the RETVAL insn. */ | |
1ed0205e VM |
5154 | if (libcall_insn |
5155 | && (GET_CODE (old_src) == REG | |
5156 | || GET_CODE (old_src) == SUBREG | |
5157 | || GET_CODE (old_src) == MEM)) | |
7bd8b2a8 JL |
5158 | replace_rtx (REG_NOTES (libcall_insn), old_src, |
5159 | canon_reg (SET_SRC (sets[i].rtl), insn)); | |
5160 | ||
7722328e RK |
5161 | /* The result of apply_change_group can be ignored; see |
5162 | canon_reg. */ | |
5163 | ||
5164 | validate_change (insn, &SET_SRC (sets[i].rtl), | |
5165 | canon_reg (SET_SRC (sets[i].rtl), insn), | |
5166 | 1); | |
6702af89 | 5167 | apply_change_group (); |
05c33dd8 RK |
5168 | break; |
5169 | } | |
7afe21cc RK |
5170 | |
5171 | /* If we previously found constant pool entries for | |
5172 | constants and this is a constant, try making a | |
5173 | pool entry. Put it in src_folded unless we already have done | |
5174 | this since that is where it likely came from. */ | |
5175 | ||
5176 | else if (constant_pool_entries_cost | |
5177 | && CONSTANT_P (trial) | |
1bbd065b RK |
5178 | && ! (GET_CODE (trial) == CONST |
5179 | && GET_CODE (XEXP (trial, 0)) == TRUNCATE) | |
5180 | && (src_folded == 0 | |
5181 | || (GET_CODE (src_folded) != MEM | |
5182 | && ! src_folded_force_flag)) | |
9ae8ffe7 JL |
5183 | && GET_MODE_CLASS (mode) != MODE_CC |
5184 | && mode != VOIDmode) | |
7afe21cc RK |
5185 | { |
5186 | src_folded_force_flag = 1; | |
5187 | src_folded = trial; | |
5188 | src_folded_cost = constant_pool_entries_cost; | |
5189 | } | |
5190 | } | |
5191 | ||
5192 | src = SET_SRC (sets[i].rtl); | |
5193 | ||
5194 | /* In general, it is good to have a SET with SET_SRC == SET_DEST. | |
5195 | However, there is an important exception: If both are registers | |
5196 | that are not the head of their equivalence class, replace SET_SRC | |
5197 | with the head of the class. If we do not do this, we will have | |
5198 | both registers live over a portion of the basic block. This way, | |
5199 | their lifetimes will likely abut instead of overlapping. */ | |
5200 | if (GET_CODE (dest) == REG | |
5201 | && REGNO_QTY_VALID_P (REGNO (dest)) | |
30f72379 MM |
5202 | && qty_mode[REG_QTY (REGNO (dest))] == GET_MODE (dest) |
5203 | && qty_first_reg[REG_QTY (REGNO (dest))] != REGNO (dest) | |
7afe21cc RK |
5204 | && GET_CODE (src) == REG && REGNO (src) == REGNO (dest) |
5205 | /* Don't do this if the original insn had a hard reg as | |
c5c76735 | 5206 | SET_SRC or SET_DEST. */ |
7afe21cc | 5207 | && (GET_CODE (sets[i].src) != REG |
c5c76735 JL |
5208 | || REGNO (sets[i].src) >= FIRST_PSEUDO_REGISTER) |
5209 | && (GET_CODE (dest) != REG || REGNO (dest) >= FIRST_PSEUDO_REGISTER)) | |
7afe21cc RK |
5210 | /* We can't call canon_reg here because it won't do anything if |
5211 | SRC is a hard register. */ | |
5212 | { | |
30f72379 | 5213 | int first = qty_first_reg[REG_QTY (REGNO (src))]; |
759bd8b7 R |
5214 | rtx new_src |
5215 | = (first >= FIRST_PSEUDO_REGISTER | |
5216 | ? regno_reg_rtx[first] : gen_rtx_REG (GET_MODE (src), first)); | |
5217 | ||
5218 | /* We must use validate-change even for this, because this | |
5219 | might be a special no-op instruction, suitable only to | |
5220 | tag notes onto. */ | |
5221 | if (validate_change (insn, &SET_SRC (sets[i].rtl), new_src, 0)) | |
5222 | { | |
5223 | src = new_src; | |
5224 | /* If we had a constant that is cheaper than what we are now | |
5225 | setting SRC to, use that constant. We ignored it when we | |
5226 | thought we could make this into a no-op. */ | |
5227 | if (src_const && COST (src_const) < COST (src) | |
5228 | && validate_change (insn, &SET_SRC (sets[i].rtl), src_const, | |
5229 | 0)) | |
5230 | src = src_const; | |
5231 | } | |
7afe21cc RK |
5232 | } |
5233 | ||
5234 | /* If we made a change, recompute SRC values. */ | |
5235 | if (src != sets[i].src) | |
5236 | { | |
5237 | do_not_record = 0; | |
5238 | hash_arg_in_memory = 0; | |
7afe21cc | 5239 | sets[i].src = src; |
2197a88a | 5240 | sets[i].src_hash = HASH (src, mode); |
7afe21cc RK |
5241 | sets[i].src_volatile = do_not_record; |
5242 | sets[i].src_in_memory = hash_arg_in_memory; | |
2197a88a | 5243 | sets[i].src_elt = lookup (src, sets[i].src_hash, mode); |
7afe21cc RK |
5244 | } |
5245 | ||
5246 | /* If this is a single SET, we are setting a register, and we have an | |
5247 | equivalent constant, we want to add a REG_NOTE. We don't want | |
5248 | to write a REG_EQUAL note for a constant pseudo since verifying that | |
d45cf215 | 5249 | that pseudo hasn't been eliminated is a pain. Such a note also |
ac7ef8d5 FS |
5250 | won't help anything. |
5251 | ||
5252 | Avoid a REG_EQUAL note for (CONST (MINUS (LABEL_REF) (LABEL_REF))) | |
5253 | which can be created for a reference to a compile time computable | |
5254 | entry in a jump table. */ | |
5255 | ||
7afe21cc | 5256 | if (n_sets == 1 && src_const && GET_CODE (dest) == REG |
ac7ef8d5 FS |
5257 | && GET_CODE (src_const) != REG |
5258 | && ! (GET_CODE (src_const) == CONST | |
5259 | && GET_CODE (XEXP (src_const, 0)) == MINUS | |
5260 | && GET_CODE (XEXP (XEXP (src_const, 0), 0)) == LABEL_REF | |
5261 | && GET_CODE (XEXP (XEXP (src_const, 0), 1)) == LABEL_REF)) | |
7afe21cc | 5262 | { |
92f9aa51 | 5263 | tem = find_reg_note (insn, REG_EQUAL, NULL_RTX); |
7afe21cc | 5264 | |
51e2a951 AS |
5265 | /* Make sure that the rtx is not shared with any other insn. */ |
5266 | src_const = copy_rtx (src_const); | |
5267 | ||
7afe21cc RK |
5268 | /* Record the actual constant value in a REG_EQUAL note, making |
5269 | a new one if one does not already exist. */ | |
5270 | if (tem) | |
5271 | XEXP (tem, 0) = src_const; | |
5272 | else | |
38a448ca RH |
5273 | REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_EQUAL, |
5274 | src_const, REG_NOTES (insn)); | |
7afe21cc RK |
5275 | |
5276 | /* If storing a constant value in a register that | |
5277 | previously held the constant value 0, | |
5278 | record this fact with a REG_WAS_0 note on this insn. | |
5279 | ||
5280 | Note that the *register* is required to have previously held 0, | |
5281 | not just any register in the quantity and we must point to the | |
5282 | insn that set that register to zero. | |
5283 | ||
5284 | Rather than track each register individually, we just see if | |
5285 | the last set for this quantity was for this register. */ | |
5286 | ||
5287 | if (REGNO_QTY_VALID_P (REGNO (dest)) | |
30f72379 | 5288 | && qty_const[REG_QTY (REGNO (dest))] == const0_rtx) |
7afe21cc RK |
5289 | { |
5290 | /* See if we previously had a REG_WAS_0 note. */ | |
906c4e36 | 5291 | rtx note = find_reg_note (insn, REG_WAS_0, NULL_RTX); |
30f72379 | 5292 | rtx const_insn = qty_const_insn[REG_QTY (REGNO (dest))]; |
7afe21cc RK |
5293 | |
5294 | if ((tem = single_set (const_insn)) != 0 | |
5295 | && rtx_equal_p (SET_DEST (tem), dest)) | |
5296 | { | |
5297 | if (note) | |
5298 | XEXP (note, 0) = const_insn; | |
5299 | else | |
c5c76735 JL |
5300 | REG_NOTES (insn) |
5301 | = gen_rtx_INSN_LIST (REG_WAS_0, const_insn, | |
5302 | REG_NOTES (insn)); | |
7afe21cc RK |
5303 | } |
5304 | } | |
5305 | } | |
5306 | ||
5307 | /* Now deal with the destination. */ | |
5308 | do_not_record = 0; | |
7afe21cc RK |
5309 | |
5310 | /* Look within any SIGN_EXTRACT or ZERO_EXTRACT | |
5311 | to the MEM or REG within it. */ | |
5312 | while (GET_CODE (dest) == SIGN_EXTRACT | |
5313 | || GET_CODE (dest) == ZERO_EXTRACT | |
5314 | || GET_CODE (dest) == SUBREG | |
5315 | || GET_CODE (dest) == STRICT_LOW_PART) | |
0339ce7e | 5316 | dest = XEXP (dest, 0); |
7afe21cc RK |
5317 | |
5318 | sets[i].inner_dest = dest; | |
5319 | ||
5320 | if (GET_CODE (dest) == MEM) | |
5321 | { | |
9ae8ffe7 JL |
5322 | #ifdef PUSH_ROUNDING |
5323 | /* Stack pushes invalidate the stack pointer. */ | |
5324 | rtx addr = XEXP (dest, 0); | |
5325 | if ((GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC | |
5326 | || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC) | |
5327 | && XEXP (addr, 0) == stack_pointer_rtx) | |
5328 | invalidate (stack_pointer_rtx, Pmode); | |
5329 | #endif | |
7afe21cc | 5330 | dest = fold_rtx (dest, insn); |
7afe21cc RK |
5331 | } |
5332 | ||
5333 | /* Compute the hash code of the destination now, | |
5334 | before the effects of this instruction are recorded, | |
5335 | since the register values used in the address computation | |
5336 | are those before this instruction. */ | |
2197a88a | 5337 | sets[i].dest_hash = HASH (dest, mode); |
7afe21cc RK |
5338 | |
5339 | /* Don't enter a bit-field in the hash table | |
5340 | because the value in it after the store | |
5341 | may not equal what was stored, due to truncation. */ | |
5342 | ||
5343 | if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT | |
5344 | || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT) | |
5345 | { | |
5346 | rtx width = XEXP (SET_DEST (sets[i].rtl), 1); | |
5347 | ||
5348 | if (src_const != 0 && GET_CODE (src_const) == CONST_INT | |
5349 | && GET_CODE (width) == CONST_INT | |
906c4e36 RK |
5350 | && INTVAL (width) < HOST_BITS_PER_WIDE_INT |
5351 | && ! (INTVAL (src_const) | |
5352 | & ((HOST_WIDE_INT) (-1) << INTVAL (width)))) | |
7afe21cc RK |
5353 | /* Exception: if the value is constant, |
5354 | and it won't be truncated, record it. */ | |
5355 | ; | |
5356 | else | |
5357 | { | |
5358 | /* This is chosen so that the destination will be invalidated | |
5359 | but no new value will be recorded. | |
5360 | We must invalidate because sometimes constant | |
5361 | values can be recorded for bitfields. */ | |
5362 | sets[i].src_elt = 0; | |
5363 | sets[i].src_volatile = 1; | |
5364 | src_eqv = 0; | |
5365 | src_eqv_elt = 0; | |
5366 | } | |
5367 | } | |
5368 | ||
5369 | /* If only one set in a JUMP_INSN and it is now a no-op, we can delete | |
5370 | the insn. */ | |
5371 | else if (n_sets == 1 && dest == pc_rtx && src == pc_rtx) | |
5372 | { | |
ef178af3 ZW |
5373 | /* One less use of the label this insn used to jump to. */ |
5374 | if (JUMP_LABEL (insn) != 0) | |
5375 | --LABEL_NUSES (JUMP_LABEL (insn)); | |
7afe21cc RK |
5376 | PUT_CODE (insn, NOTE); |
5377 | NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED; | |
5378 | NOTE_SOURCE_FILE (insn) = 0; | |
5379 | cse_jumps_altered = 1; | |
7afe21cc RK |
5380 | /* No more processing for this set. */ |
5381 | sets[i].rtl = 0; | |
5382 | } | |
5383 | ||
5384 | /* If this SET is now setting PC to a label, we know it used to | |
5385 | be a conditional or computed branch. So we see if we can follow | |
5386 | it. If it was a computed branch, delete it and re-emit. */ | |
5387 | else if (dest == pc_rtx && GET_CODE (src) == LABEL_REF) | |
5388 | { | |
7afe21cc RK |
5389 | /* If this is not in the format for a simple branch and |
5390 | we are the only SET in it, re-emit it. */ | |
5391 | if (! simplejump_p (insn) && n_sets == 1) | |
5392 | { | |
5393 | rtx new = emit_jump_insn_before (gen_jump (XEXP (src, 0)), insn); | |
5394 | JUMP_LABEL (new) = XEXP (src, 0); | |
5395 | LABEL_NUSES (XEXP (src, 0))++; | |
7afe21cc RK |
5396 | insn = new; |
5397 | } | |
31dcf83f RS |
5398 | else |
5399 | /* Otherwise, force rerecognition, since it probably had | |
5400 | a different pattern before. | |
5401 | This shouldn't really be necessary, since whatever | |
5402 | changed the source value above should have done this. | |
5403 | Until the right place is found, might as well do this here. */ | |
5404 | INSN_CODE (insn) = -1; | |
7afe21cc | 5405 | |
312f6255 GK |
5406 | never_reached_warning (insn); |
5407 | ||
e48a7fbe JL |
5408 | /* Now emit a BARRIER after the unconditional jump. Do not bother |
5409 | deleting any unreachable code, let jump/flow do that. */ | |
5410 | if (NEXT_INSN (insn) != 0 | |
5411 | && GET_CODE (NEXT_INSN (insn)) != BARRIER) | |
5412 | emit_barrier_after (insn); | |
7afe21cc RK |
5413 | |
5414 | cse_jumps_altered = 1; | |
5415 | sets[i].rtl = 0; | |
5416 | } | |
5417 | ||
c2a47e48 RK |
5418 | /* If destination is volatile, invalidate it and then do no further |
5419 | processing for this assignment. */ | |
7afe21cc RK |
5420 | |
5421 | else if (do_not_record) | |
c2a47e48 RK |
5422 | { |
5423 | if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG | |
5424 | || GET_CODE (dest) == MEM) | |
bb4034b3 | 5425 | invalidate (dest, VOIDmode); |
2708da92 RS |
5426 | else if (GET_CODE (dest) == STRICT_LOW_PART |
5427 | || GET_CODE (dest) == ZERO_EXTRACT) | |
bb4034b3 | 5428 | invalidate (XEXP (dest, 0), GET_MODE (dest)); |
c2a47e48 RK |
5429 | sets[i].rtl = 0; |
5430 | } | |
7afe21cc RK |
5431 | |
5432 | if (sets[i].rtl != 0 && dest != SET_DEST (sets[i].rtl)) | |
2197a88a | 5433 | sets[i].dest_hash = HASH (SET_DEST (sets[i].rtl), mode); |
7afe21cc RK |
5434 | |
5435 | #ifdef HAVE_cc0 | |
5436 | /* If setting CC0, record what it was set to, or a constant, if it | |
5437 | is equivalent to a constant. If it is being set to a floating-point | |
5438 | value, make a COMPARE with the appropriate constant of 0. If we | |
5439 | don't do this, later code can interpret this as a test against | |
5440 | const0_rtx, which can cause problems if we try to put it into an | |
5441 | insn as a floating-point operand. */ | |
5442 | if (dest == cc0_rtx) | |
5443 | { | |
5444 | this_insn_cc0 = src_const && mode != VOIDmode ? src_const : src; | |
5445 | this_insn_cc0_mode = mode; | |
cbf6a543 | 5446 | if (FLOAT_MODE_P (mode)) |
38a448ca RH |
5447 | this_insn_cc0 = gen_rtx_COMPARE (VOIDmode, this_insn_cc0, |
5448 | CONST0_RTX (mode)); | |
7afe21cc RK |
5449 | } |
5450 | #endif | |
5451 | } | |
5452 | ||
5453 | /* Now enter all non-volatile source expressions in the hash table | |
5454 | if they are not already present. | |
5455 | Record their equivalence classes in src_elt. | |
5456 | This way we can insert the corresponding destinations into | |
5457 | the same classes even if the actual sources are no longer in them | |
5458 | (having been invalidated). */ | |
5459 | ||
5460 | if (src_eqv && src_eqv_elt == 0 && sets[0].rtl != 0 && ! src_eqv_volatile | |
5461 | && ! rtx_equal_p (src_eqv, SET_DEST (sets[0].rtl))) | |
5462 | { | |
5463 | register struct table_elt *elt; | |
5464 | register struct table_elt *classp = sets[0].src_elt; | |
5465 | rtx dest = SET_DEST (sets[0].rtl); | |
5466 | enum machine_mode eqvmode = GET_MODE (dest); | |
5467 | ||
5468 | if (GET_CODE (dest) == STRICT_LOW_PART) | |
5469 | { | |
5470 | eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0))); | |
5471 | classp = 0; | |
5472 | } | |
5473 | if (insert_regs (src_eqv, classp, 0)) | |
8ae2b8f6 JW |
5474 | { |
5475 | rehash_using_reg (src_eqv); | |
5476 | src_eqv_hash = HASH (src_eqv, eqvmode); | |
5477 | } | |
2197a88a | 5478 | elt = insert (src_eqv, classp, src_eqv_hash, eqvmode); |
7afe21cc | 5479 | elt->in_memory = src_eqv_in_memory; |
7afe21cc | 5480 | src_eqv_elt = elt; |
f7911249 JW |
5481 | |
5482 | /* Check to see if src_eqv_elt is the same as a set source which | |
5483 | does not yet have an elt, and if so set the elt of the set source | |
5484 | to src_eqv_elt. */ | |
5485 | for (i = 0; i < n_sets; i++) | |
26132f71 JW |
5486 | if (sets[i].rtl && sets[i].src_elt == 0 |
5487 | && rtx_equal_p (SET_SRC (sets[i].rtl), src_eqv)) | |
f7911249 | 5488 | sets[i].src_elt = src_eqv_elt; |
7afe21cc RK |
5489 | } |
5490 | ||
5491 | for (i = 0; i < n_sets; i++) | |
5492 | if (sets[i].rtl && ! sets[i].src_volatile | |
5493 | && ! rtx_equal_p (SET_SRC (sets[i].rtl), SET_DEST (sets[i].rtl))) | |
5494 | { | |
5495 | if (GET_CODE (SET_DEST (sets[i].rtl)) == STRICT_LOW_PART) | |
5496 | { | |
5497 | /* REG_EQUAL in setting a STRICT_LOW_PART | |
5498 | gives an equivalent for the entire destination register, | |
5499 | not just for the subreg being stored in now. | |
5500 | This is a more interesting equivalence, so we arrange later | |
5501 | to treat the entire reg as the destination. */ | |
5502 | sets[i].src_elt = src_eqv_elt; | |
2197a88a | 5503 | sets[i].src_hash = src_eqv_hash; |
7afe21cc RK |
5504 | } |
5505 | else | |
5506 | { | |
5507 | /* Insert source and constant equivalent into hash table, if not | |
5508 | already present. */ | |
5509 | register struct table_elt *classp = src_eqv_elt; | |
5510 | register rtx src = sets[i].src; | |
5511 | register rtx dest = SET_DEST (sets[i].rtl); | |
5512 | enum machine_mode mode | |
5513 | = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src); | |
5514 | ||
26132f71 | 5515 | if (sets[i].src_elt == 0) |
7afe21cc | 5516 | { |
26132f71 JW |
5517 | /* Don't put a hard register source into the table if this is |
5518 | the last insn of a libcall. In this case, we only need | |
5519 | to put src_eqv_elt in src_elt. */ | |
5520 | if (GET_CODE (src) != REG | |
5521 | || REGNO (src) >= FIRST_PSEUDO_REGISTER | |
5522 | || ! find_reg_note (insn, REG_RETVAL, NULL_RTX)) | |
8ae2b8f6 | 5523 | { |
26132f71 JW |
5524 | register struct table_elt *elt; |
5525 | ||
5526 | /* Note that these insert_regs calls cannot remove | |
5527 | any of the src_elt's, because they would have failed to | |
5528 | match if not still valid. */ | |
5529 | if (insert_regs (src, classp, 0)) | |
5530 | { | |
5531 | rehash_using_reg (src); | |
5532 | sets[i].src_hash = HASH (src, mode); | |
5533 | } | |
5534 | elt = insert (src, classp, sets[i].src_hash, mode); | |
5535 | elt->in_memory = sets[i].src_in_memory; | |
26132f71 | 5536 | sets[i].src_elt = classp = elt; |
8ae2b8f6 | 5537 | } |
26132f71 JW |
5538 | else |
5539 | sets[i].src_elt = classp; | |
7afe21cc | 5540 | } |
7afe21cc RK |
5541 | if (sets[i].src_const && sets[i].src_const_elt == 0 |
5542 | && src != sets[i].src_const | |
5543 | && ! rtx_equal_p (sets[i].src_const, src)) | |
5544 | sets[i].src_elt = insert (sets[i].src_const, classp, | |
2197a88a | 5545 | sets[i].src_const_hash, mode); |
7afe21cc RK |
5546 | } |
5547 | } | |
5548 | else if (sets[i].src_elt == 0) | |
5549 | /* If we did not insert the source into the hash table (e.g., it was | |
5550 | volatile), note the equivalence class for the REG_EQUAL value, if any, | |
5551 | so that the destination goes into that class. */ | |
5552 | sets[i].src_elt = src_eqv_elt; | |
5553 | ||
9ae8ffe7 | 5554 | invalidate_from_clobbers (x); |
77fa0940 RK |
5555 | |
5556 | /* Some registers are invalidated by subroutine calls. Memory is | |
5557 | invalidated by non-constant calls. */ | |
5558 | ||
7afe21cc RK |
5559 | if (GET_CODE (insn) == CALL_INSN) |
5560 | { | |
77fa0940 | 5561 | if (! CONST_CALL_P (insn)) |
9ae8ffe7 | 5562 | invalidate_memory (); |
7afe21cc RK |
5563 | invalidate_for_call (); |
5564 | } | |
5565 | ||
5566 | /* Now invalidate everything set by this instruction. | |
5567 | If a SUBREG or other funny destination is being set, | |
5568 | sets[i].rtl is still nonzero, so here we invalidate the reg | |
5569 | a part of which is being set. */ | |
5570 | ||
5571 | for (i = 0; i < n_sets; i++) | |
5572 | if (sets[i].rtl) | |
5573 | { | |
bb4034b3 JW |
5574 | /* We can't use the inner dest, because the mode associated with |
5575 | a ZERO_EXTRACT is significant. */ | |
5576 | register rtx dest = SET_DEST (sets[i].rtl); | |
7afe21cc RK |
5577 | |
5578 | /* Needed for registers to remove the register from its | |
5579 | previous quantity's chain. | |
5580 | Needed for memory if this is a nonvarying address, unless | |
5581 | we have just done an invalidate_memory that covers even those. */ | |
5582 | if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG | |
9ae8ffe7 | 5583 | || GET_CODE (dest) == MEM) |
bb4034b3 | 5584 | invalidate (dest, VOIDmode); |
2708da92 RS |
5585 | else if (GET_CODE (dest) == STRICT_LOW_PART |
5586 | || GET_CODE (dest) == ZERO_EXTRACT) | |
bb4034b3 | 5587 | invalidate (XEXP (dest, 0), GET_MODE (dest)); |
7afe21cc RK |
5588 | } |
5589 | ||
01e752d3 JL |
5590 | /* A volatile ASM invalidates everything. */ |
5591 | if (GET_CODE (insn) == INSN | |
5592 | && GET_CODE (PATTERN (insn)) == ASM_OPERANDS | |
5593 | && MEM_VOLATILE_P (PATTERN (insn))) | |
5594 | flush_hash_table (); | |
5595 | ||
7afe21cc RK |
5596 | /* Make sure registers mentioned in destinations |
5597 | are safe for use in an expression to be inserted. | |
5598 | This removes from the hash table | |
5599 | any invalid entry that refers to one of these registers. | |
5600 | ||
5601 | We don't care about the return value from mention_regs because | |
5602 | we are going to hash the SET_DEST values unconditionally. */ | |
5603 | ||
5604 | for (i = 0; i < n_sets; i++) | |
34c73909 R |
5605 | { |
5606 | if (sets[i].rtl) | |
5607 | { | |
5608 | rtx x = SET_DEST (sets[i].rtl); | |
5609 | ||
5610 | if (GET_CODE (x) != REG) | |
5611 | mention_regs (x); | |
5612 | else | |
5613 | { | |
5614 | /* We used to rely on all references to a register becoming | |
5615 | inaccessible when a register changes to a new quantity, | |
5616 | since that changes the hash code. However, that is not | |
5617 | safe, since after NBUCKETS new quantities we get a | |
5618 | hash 'collision' of a register with its own invalid | |
5619 | entries. And since SUBREGs have been changed not to | |
5620 | change their hash code with the hash code of the register, | |
5621 | it wouldn't work any longer at all. So we have to check | |
5622 | for any invalid references lying around now. | |
5623 | This code is similar to the REG case in mention_regs, | |
5624 | but it knows that reg_tick has been incremented, and | |
5625 | it leaves reg_in_table as -1 . */ | |
5626 | register int regno = REGNO (x); | |
5627 | register int endregno | |
5628 | = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1 | |
5629 | : HARD_REGNO_NREGS (regno, GET_MODE (x))); | |
5630 | int i; | |
5631 | ||
5632 | for (i = regno; i < endregno; i++) | |
5633 | { | |
30f72379 | 5634 | if (REG_IN_TABLE (i) >= 0) |
34c73909 R |
5635 | { |
5636 | remove_invalid_refs (i); | |
30f72379 | 5637 | REG_IN_TABLE (i) = -1; |
34c73909 R |
5638 | } |
5639 | } | |
5640 | } | |
5641 | } | |
5642 | } | |
7afe21cc RK |
5643 | |
5644 | /* We may have just removed some of the src_elt's from the hash table. | |
5645 | So replace each one with the current head of the same class. */ | |
5646 | ||
5647 | for (i = 0; i < n_sets; i++) | |
5648 | if (sets[i].rtl) | |
5649 | { | |
5650 | if (sets[i].src_elt && sets[i].src_elt->first_same_value == 0) | |
5651 | /* If elt was removed, find current head of same class, | |
5652 | or 0 if nothing remains of that class. */ | |
5653 | { | |
5654 | register struct table_elt *elt = sets[i].src_elt; | |
5655 | ||
5656 | while (elt && elt->prev_same_value) | |
5657 | elt = elt->prev_same_value; | |
5658 | ||
5659 | while (elt && elt->first_same_value == 0) | |
5660 | elt = elt->next_same_value; | |
5661 | sets[i].src_elt = elt ? elt->first_same_value : 0; | |
5662 | } | |
5663 | } | |
5664 | ||
5665 | /* Now insert the destinations into their equivalence classes. */ | |
5666 | ||
5667 | for (i = 0; i < n_sets; i++) | |
5668 | if (sets[i].rtl) | |
5669 | { | |
5670 | register rtx dest = SET_DEST (sets[i].rtl); | |
9de2c71a | 5671 | rtx inner_dest = sets[i].inner_dest; |
7afe21cc RK |
5672 | register struct table_elt *elt; |
5673 | ||
5674 | /* Don't record value if we are not supposed to risk allocating | |
5675 | floating-point values in registers that might be wider than | |
5676 | memory. */ | |
5677 | if ((flag_float_store | |
5678 | && GET_CODE (dest) == MEM | |
cbf6a543 | 5679 | && FLOAT_MODE_P (GET_MODE (dest))) |
bc4ddc77 JW |
5680 | /* Don't record BLKmode values, because we don't know the |
5681 | size of it, and can't be sure that other BLKmode values | |
5682 | have the same or smaller size. */ | |
5683 | || GET_MODE (dest) == BLKmode | |
7afe21cc RK |
5684 | /* Don't record values of destinations set inside a libcall block |
5685 | since we might delete the libcall. Things should have been set | |
5686 | up so we won't want to reuse such a value, but we play it safe | |
5687 | here. */ | |
7bd8b2a8 | 5688 | || libcall_insn |
7afe21cc RK |
5689 | /* If we didn't put a REG_EQUAL value or a source into the hash |
5690 | table, there is no point is recording DEST. */ | |
1a8e9a8e RK |
5691 | || sets[i].src_elt == 0 |
5692 | /* If DEST is a paradoxical SUBREG and SRC is a ZERO_EXTEND | |
5693 | or SIGN_EXTEND, don't record DEST since it can cause | |
5694 | some tracking to be wrong. | |
5695 | ||
5696 | ??? Think about this more later. */ | |
5697 | || (GET_CODE (dest) == SUBREG | |
5698 | && (GET_MODE_SIZE (GET_MODE (dest)) | |
5699 | > GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest)))) | |
5700 | && (GET_CODE (sets[i].src) == SIGN_EXTEND | |
5701 | || GET_CODE (sets[i].src) == ZERO_EXTEND))) | |
7afe21cc RK |
5702 | continue; |
5703 | ||
5704 | /* STRICT_LOW_PART isn't part of the value BEING set, | |
5705 | and neither is the SUBREG inside it. | |
5706 | Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */ | |
5707 | if (GET_CODE (dest) == STRICT_LOW_PART) | |
5708 | dest = SUBREG_REG (XEXP (dest, 0)); | |
5709 | ||
c610adec | 5710 | if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG) |
7afe21cc RK |
5711 | /* Registers must also be inserted into chains for quantities. */ |
5712 | if (insert_regs (dest, sets[i].src_elt, 1)) | |
8ae2b8f6 JW |
5713 | { |
5714 | /* If `insert_regs' changes something, the hash code must be | |
5715 | recalculated. */ | |
5716 | rehash_using_reg (dest); | |
5717 | sets[i].dest_hash = HASH (dest, GET_MODE (dest)); | |
5718 | } | |
7afe21cc | 5719 | |
9de2c71a MM |
5720 | if (GET_CODE (inner_dest) == MEM |
5721 | && GET_CODE (XEXP (inner_dest, 0)) == ADDRESSOF) | |
5722 | /* Given (SET (MEM (ADDRESSOF (X))) Y) we don't want to say | |
5723 | that (MEM (ADDRESSOF (X))) is equivalent to Y. | |
5724 | Consider the case in which the address of the MEM is | |
5725 | passed to a function, which alters the MEM. Then, if we | |
5726 | later use Y instead of the MEM we'll miss the update. */ | |
5727 | elt = insert (dest, 0, sets[i].dest_hash, GET_MODE (dest)); | |
5728 | else | |
5729 | elt = insert (dest, sets[i].src_elt, | |
5730 | sets[i].dest_hash, GET_MODE (dest)); | |
5731 | ||
c256df0b | 5732 | elt->in_memory = (GET_CODE (sets[i].inner_dest) == MEM |
9ad91d71 RK |
5733 | && (! RTX_UNCHANGING_P (sets[i].inner_dest) |
5734 | || FIXED_BASE_PLUS_P (XEXP (sets[i].inner_dest, | |
5735 | 0)))); | |
c256df0b | 5736 | |
fc3ffe83 RK |
5737 | /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no |
5738 | narrower than M2, and both M1 and M2 are the same number of words, | |
5739 | we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so | |
5740 | make that equivalence as well. | |
7afe21cc RK |
5741 | |
5742 | However, BAR may have equivalences for which gen_lowpart_if_possible | |
5743 | will produce a simpler value than gen_lowpart_if_possible applied to | |
5744 | BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all | |
5745 | BAR's equivalences. If we don't get a simplified form, make | |
5746 | the SUBREG. It will not be used in an equivalence, but will | |
5747 | cause two similar assignments to be detected. | |
5748 | ||
5749 | Note the loop below will find SUBREG_REG (DEST) since we have | |
5750 | already entered SRC and DEST of the SET in the table. */ | |
5751 | ||
5752 | if (GET_CODE (dest) == SUBREG | |
6cdbaec4 RK |
5753 | && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) - 1) |
5754 | / UNITS_PER_WORD) | |
5755 | == (GET_MODE_SIZE (GET_MODE (dest)) - 1)/ UNITS_PER_WORD) | |
7afe21cc RK |
5756 | && (GET_MODE_SIZE (GET_MODE (dest)) |
5757 | >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest)))) | |
5758 | && sets[i].src_elt != 0) | |
5759 | { | |
5760 | enum machine_mode new_mode = GET_MODE (SUBREG_REG (dest)); | |
5761 | struct table_elt *elt, *classp = 0; | |
5762 | ||
5763 | for (elt = sets[i].src_elt->first_same_value; elt; | |
5764 | elt = elt->next_same_value) | |
5765 | { | |
5766 | rtx new_src = 0; | |
2197a88a | 5767 | unsigned src_hash; |
7afe21cc RK |
5768 | struct table_elt *src_elt; |
5769 | ||
5770 | /* Ignore invalid entries. */ | |
5771 | if (GET_CODE (elt->exp) != REG | |
5772 | && ! exp_equiv_p (elt->exp, elt->exp, 1, 0)) | |
5773 | continue; | |
5774 | ||
5775 | new_src = gen_lowpart_if_possible (new_mode, elt->exp); | |
5776 | if (new_src == 0) | |
38a448ca | 5777 | new_src = gen_rtx_SUBREG (new_mode, elt->exp, 0); |
7afe21cc RK |
5778 | |
5779 | src_hash = HASH (new_src, new_mode); | |
5780 | src_elt = lookup (new_src, src_hash, new_mode); | |
5781 | ||
5782 | /* Put the new source in the hash table is if isn't | |
5783 | already. */ | |
5784 | if (src_elt == 0) | |
5785 | { | |
5786 | if (insert_regs (new_src, classp, 0)) | |
8ae2b8f6 JW |
5787 | { |
5788 | rehash_using_reg (new_src); | |
5789 | src_hash = HASH (new_src, new_mode); | |
5790 | } | |
7afe21cc RK |
5791 | src_elt = insert (new_src, classp, src_hash, new_mode); |
5792 | src_elt->in_memory = elt->in_memory; | |
7afe21cc RK |
5793 | } |
5794 | else if (classp && classp != src_elt->first_same_value) | |
5795 | /* Show that two things that we've seen before are | |
5796 | actually the same. */ | |
5797 | merge_equiv_classes (src_elt, classp); | |
5798 | ||
5799 | classp = src_elt->first_same_value; | |
da932f04 JL |
5800 | /* Ignore invalid entries. */ |
5801 | while (classp | |
5802 | && GET_CODE (classp->exp) != REG | |
5803 | && ! exp_equiv_p (classp->exp, classp->exp, 1, 0)) | |
5804 | classp = classp->next_same_value; | |
7afe21cc RK |
5805 | } |
5806 | } | |
5807 | } | |
5808 | ||
5809 | /* Special handling for (set REG0 REG1) | |
5810 | where REG0 is the "cheapest", cheaper than REG1. | |
5811 | After cse, REG1 will probably not be used in the sequel, | |
5812 | so (if easily done) change this insn to (set REG1 REG0) and | |
5813 | replace REG1 with REG0 in the previous insn that computed their value. | |
5814 | Then REG1 will become a dead store and won't cloud the situation | |
5815 | for later optimizations. | |
5816 | ||
5817 | Do not make this change if REG1 is a hard register, because it will | |
5818 | then be used in the sequel and we may be changing a two-operand insn | |
5819 | into a three-operand insn. | |
5820 | ||
50270076 R |
5821 | Also do not do this if we are operating on a copy of INSN. |
5822 | ||
5823 | Also don't do this if INSN ends a libcall; this would cause an unrelated | |
5824 | register to be set in the middle of a libcall, and we then get bad code | |
5825 | if the libcall is deleted. */ | |
7afe21cc RK |
5826 | |
5827 | if (n_sets == 1 && sets[0].rtl && GET_CODE (SET_DEST (sets[0].rtl)) == REG | |
5828 | && NEXT_INSN (PREV_INSN (insn)) == insn | |
5829 | && GET_CODE (SET_SRC (sets[0].rtl)) == REG | |
5830 | && REGNO (SET_SRC (sets[0].rtl)) >= FIRST_PSEUDO_REGISTER | |
5831 | && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets[0].rtl))) | |
30f72379 | 5832 | && (qty_first_reg[REG_QTY (REGNO (SET_SRC (sets[0].rtl)))] |
50270076 R |
5833 | == REGNO (SET_DEST (sets[0].rtl))) |
5834 | && ! find_reg_note (insn, REG_RETVAL, NULL_RTX)) | |
7afe21cc RK |
5835 | { |
5836 | rtx prev = PREV_INSN (insn); | |
5837 | while (prev && GET_CODE (prev) == NOTE) | |
5838 | prev = PREV_INSN (prev); | |
5839 | ||
5840 | if (prev && GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SET | |
5841 | && SET_DEST (PATTERN (prev)) == SET_SRC (sets[0].rtl)) | |
5842 | { | |
5843 | rtx dest = SET_DEST (sets[0].rtl); | |
906c4e36 | 5844 | rtx note = find_reg_note (prev, REG_EQUIV, NULL_RTX); |
7afe21cc RK |
5845 | |
5846 | validate_change (prev, & SET_DEST (PATTERN (prev)), dest, 1); | |
5847 | validate_change (insn, & SET_DEST (sets[0].rtl), | |
5848 | SET_SRC (sets[0].rtl), 1); | |
5849 | validate_change (insn, & SET_SRC (sets[0].rtl), dest, 1); | |
5850 | apply_change_group (); | |
5851 | ||
5852 | /* If REG1 was equivalent to a constant, REG0 is not. */ | |
5853 | if (note) | |
5854 | PUT_REG_NOTE_KIND (note, REG_EQUAL); | |
5855 | ||
5856 | /* If there was a REG_WAS_0 note on PREV, remove it. Move | |
5857 | any REG_WAS_0 note on INSN to PREV. */ | |
906c4e36 | 5858 | note = find_reg_note (prev, REG_WAS_0, NULL_RTX); |
7afe21cc RK |
5859 | if (note) |
5860 | remove_note (prev, note); | |
5861 | ||
906c4e36 | 5862 | note = find_reg_note (insn, REG_WAS_0, NULL_RTX); |
7afe21cc RK |
5863 | if (note) |
5864 | { | |
5865 | remove_note (insn, note); | |
5866 | XEXP (note, 1) = REG_NOTES (prev); | |
5867 | REG_NOTES (prev) = note; | |
5868 | } | |
98369a0f RK |
5869 | |
5870 | /* If INSN has a REG_EQUAL note, and this note mentions REG0, | |
5871 | then we must delete it, because the value in REG0 has changed. */ | |
5872 | note = find_reg_note (insn, REG_EQUAL, NULL_RTX); | |
5873 | if (note && reg_mentioned_p (dest, XEXP (note, 0))) | |
5874 | remove_note (insn, note); | |
7afe21cc RK |
5875 | } |
5876 | } | |
5877 | ||
5878 | /* If this is a conditional jump insn, record any known equivalences due to | |
5879 | the condition being tested. */ | |
5880 | ||
5881 | last_jump_equiv_class = 0; | |
5882 | if (GET_CODE (insn) == JUMP_INSN | |
5883 | && n_sets == 1 && GET_CODE (x) == SET | |
5884 | && GET_CODE (SET_SRC (x)) == IF_THEN_ELSE) | |
5885 | record_jump_equiv (insn, 0); | |
5886 | ||
5887 | #ifdef HAVE_cc0 | |
5888 | /* If the previous insn set CC0 and this insn no longer references CC0, | |
5889 | delete the previous insn. Here we use the fact that nothing expects CC0 | |
5890 | to be valid over an insn, which is true until the final pass. */ | |
5891 | if (prev_insn && GET_CODE (prev_insn) == INSN | |
5892 | && (tem = single_set (prev_insn)) != 0 | |
5893 | && SET_DEST (tem) == cc0_rtx | |
5894 | && ! reg_mentioned_p (cc0_rtx, x)) | |
5895 | { | |
5896 | PUT_CODE (prev_insn, NOTE); | |
5897 | NOTE_LINE_NUMBER (prev_insn) = NOTE_INSN_DELETED; | |
5898 | NOTE_SOURCE_FILE (prev_insn) = 0; | |
5899 | } | |
5900 | ||
5901 | prev_insn_cc0 = this_insn_cc0; | |
5902 | prev_insn_cc0_mode = this_insn_cc0_mode; | |
5903 | #endif | |
5904 | ||
5905 | prev_insn = insn; | |
5906 | } | |
5907 | \f | |
a4c6502a | 5908 | /* Remove from the hash table all expressions that reference memory. */ |
14a774a9 | 5909 | |
7afe21cc | 5910 | static void |
9ae8ffe7 | 5911 | invalidate_memory () |
7afe21cc | 5912 | { |
9ae8ffe7 JL |
5913 | register int i; |
5914 | register struct table_elt *p, *next; | |
7afe21cc | 5915 | |
9ae8ffe7 JL |
5916 | for (i = 0; i < NBUCKETS; i++) |
5917 | for (p = table[i]; p; p = next) | |
5918 | { | |
5919 | next = p->next_same_hash; | |
5920 | if (p->in_memory) | |
5921 | remove_from_table (p, i); | |
5922 | } | |
5923 | } | |
5924 | ||
14a774a9 RK |
5925 | /* If ADDR is an address that implicitly affects the stack pointer, return |
5926 | 1 and update the register tables to show the effect. Else, return 0. */ | |
5927 | ||
9ae8ffe7 | 5928 | static int |
14a774a9 | 5929 | addr_affects_sp_p (addr) |
9ae8ffe7 JL |
5930 | register rtx addr; |
5931 | { | |
9ae8ffe7 JL |
5932 | if ((GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC |
5933 | || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC) | |
5934 | && GET_CODE (XEXP (addr, 0)) == REG | |
5935 | && REGNO (XEXP (addr, 0)) == STACK_POINTER_REGNUM) | |
7afe21cc | 5936 | { |
30f72379 MM |
5937 | if (REG_TICK (STACK_POINTER_REGNUM) >= 0) |
5938 | REG_TICK (STACK_POINTER_REGNUM)++; | |
9ae8ffe7 JL |
5939 | |
5940 | /* This should be *very* rare. */ | |
5941 | if (TEST_HARD_REG_BIT (hard_regs_in_table, STACK_POINTER_REGNUM)) | |
5942 | invalidate (stack_pointer_rtx, VOIDmode); | |
14a774a9 | 5943 | |
9ae8ffe7 | 5944 | return 1; |
7afe21cc | 5945 | } |
14a774a9 | 5946 | |
9ae8ffe7 | 5947 | return 0; |
7afe21cc RK |
5948 | } |
5949 | ||
5950 | /* Perform invalidation on the basis of everything about an insn | |
5951 | except for invalidating the actual places that are SET in it. | |
5952 | This includes the places CLOBBERed, and anything that might | |
5953 | alias with something that is SET or CLOBBERed. | |
5954 | ||
7afe21cc RK |
5955 | X is the pattern of the insn. */ |
5956 | ||
5957 | static void | |
9ae8ffe7 | 5958 | invalidate_from_clobbers (x) |
7afe21cc RK |
5959 | rtx x; |
5960 | { | |
7afe21cc RK |
5961 | if (GET_CODE (x) == CLOBBER) |
5962 | { | |
5963 | rtx ref = XEXP (x, 0); | |
9ae8ffe7 JL |
5964 | if (ref) |
5965 | { | |
5966 | if (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG | |
5967 | || GET_CODE (ref) == MEM) | |
5968 | invalidate (ref, VOIDmode); | |
5969 | else if (GET_CODE (ref) == STRICT_LOW_PART | |
5970 | || GET_CODE (ref) == ZERO_EXTRACT) | |
5971 | invalidate (XEXP (ref, 0), GET_MODE (ref)); | |
5972 | } | |
7afe21cc RK |
5973 | } |
5974 | else if (GET_CODE (x) == PARALLEL) | |
5975 | { | |
5976 | register int i; | |
5977 | for (i = XVECLEN (x, 0) - 1; i >= 0; i--) | |
5978 | { | |
5979 | register rtx y = XVECEXP (x, 0, i); | |
5980 | if (GET_CODE (y) == CLOBBER) | |
5981 | { | |
5982 | rtx ref = XEXP (y, 0); | |
9ae8ffe7 JL |
5983 | if (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG |
5984 | || GET_CODE (ref) == MEM) | |
5985 | invalidate (ref, VOIDmode); | |
5986 | else if (GET_CODE (ref) == STRICT_LOW_PART | |
5987 | || GET_CODE (ref) == ZERO_EXTRACT) | |
5988 | invalidate (XEXP (ref, 0), GET_MODE (ref)); | |
7afe21cc RK |
5989 | } |
5990 | } | |
5991 | } | |
5992 | } | |
5993 | \f | |
5994 | /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes | |
5995 | and replace any registers in them with either an equivalent constant | |
5996 | or the canonical form of the register. If we are inside an address, | |
5997 | only do this if the address remains valid. | |
5998 | ||
5999 | OBJECT is 0 except when within a MEM in which case it is the MEM. | |
6000 | ||
6001 | Return the replacement for X. */ | |
6002 | ||
6003 | static rtx | |
6004 | cse_process_notes (x, object) | |
6005 | rtx x; | |
6006 | rtx object; | |
6007 | { | |
6008 | enum rtx_code code = GET_CODE (x); | |
6f7d635c | 6009 | const char *fmt = GET_RTX_FORMAT (code); |
7afe21cc RK |
6010 | int i; |
6011 | ||
6012 | switch (code) | |
6013 | { | |
6014 | case CONST_INT: | |
6015 | case CONST: | |
6016 | case SYMBOL_REF: | |
6017 | case LABEL_REF: | |
6018 | case CONST_DOUBLE: | |
6019 | case PC: | |
6020 | case CC0: | |
6021 | case LO_SUM: | |
6022 | return x; | |
6023 | ||
6024 | case MEM: | |
6025 | XEXP (x, 0) = cse_process_notes (XEXP (x, 0), x); | |
6026 | return x; | |
6027 | ||
6028 | case EXPR_LIST: | |
6029 | case INSN_LIST: | |
6030 | if (REG_NOTE_KIND (x) == REG_EQUAL) | |
906c4e36 | 6031 | XEXP (x, 0) = cse_process_notes (XEXP (x, 0), NULL_RTX); |
7afe21cc | 6032 | if (XEXP (x, 1)) |
906c4e36 | 6033 | XEXP (x, 1) = cse_process_notes (XEXP (x, 1), NULL_RTX); |
7afe21cc RK |
6034 | return x; |
6035 | ||
e4890d45 RS |
6036 | case SIGN_EXTEND: |
6037 | case ZERO_EXTEND: | |
0b0ee36c | 6038 | case SUBREG: |
e4890d45 RS |
6039 | { |
6040 | rtx new = cse_process_notes (XEXP (x, 0), object); | |
6041 | /* We don't substitute VOIDmode constants into these rtx, | |
6042 | since they would impede folding. */ | |
6043 | if (GET_MODE (new) != VOIDmode) | |
6044 | validate_change (object, &XEXP (x, 0), new, 0); | |
6045 | return x; | |
6046 | } | |
6047 | ||
7afe21cc | 6048 | case REG: |
30f72379 | 6049 | i = REG_QTY (REGNO (x)); |
7afe21cc RK |
6050 | |
6051 | /* Return a constant or a constant register. */ | |
6052 | if (REGNO_QTY_VALID_P (REGNO (x)) | |
6053 | && qty_const[i] != 0 | |
6054 | && (CONSTANT_P (qty_const[i]) | |
6055 | || GET_CODE (qty_const[i]) == REG)) | |
6056 | { | |
6057 | rtx new = gen_lowpart_if_possible (GET_MODE (x), qty_const[i]); | |
6058 | if (new) | |
6059 | return new; | |
6060 | } | |
6061 | ||
6062 | /* Otherwise, canonicalize this register. */ | |
906c4e36 | 6063 | return canon_reg (x, NULL_RTX); |
e9a25f70 JL |
6064 | |
6065 | default: | |
6066 | break; | |
7afe21cc RK |
6067 | } |
6068 | ||
6069 | for (i = 0; i < GET_RTX_LENGTH (code); i++) | |
6070 | if (fmt[i] == 'e') | |
6071 | validate_change (object, &XEXP (x, i), | |
7fe34fdf | 6072 | cse_process_notes (XEXP (x, i), object), 0); |
7afe21cc RK |
6073 | |
6074 | return x; | |
6075 | } | |
6076 | \f | |
6077 | /* Find common subexpressions between the end test of a loop and the beginning | |
6078 | of the loop. LOOP_START is the CODE_LABEL at the start of a loop. | |
6079 | ||
6080 | Often we have a loop where an expression in the exit test is used | |
6081 | in the body of the loop. For example "while (*p) *q++ = *p++;". | |
6082 | Because of the way we duplicate the loop exit test in front of the loop, | |
6083 | however, we don't detect that common subexpression. This will be caught | |
6084 | when global cse is implemented, but this is a quite common case. | |
6085 | ||
6086 | This function handles the most common cases of these common expressions. | |
6087 | It is called after we have processed the basic block ending with the | |
6088 | NOTE_INSN_LOOP_END note that ends a loop and the previous JUMP_INSN | |
6089 | jumps to a label used only once. */ | |
6090 | ||
6091 | static void | |
6092 | cse_around_loop (loop_start) | |
6093 | rtx loop_start; | |
6094 | { | |
6095 | rtx insn; | |
6096 | int i; | |
6097 | struct table_elt *p; | |
6098 | ||
6099 | /* If the jump at the end of the loop doesn't go to the start, we don't | |
6100 | do anything. */ | |
6101 | for (insn = PREV_INSN (loop_start); | |
6102 | insn && (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) >= 0); | |
6103 | insn = PREV_INSN (insn)) | |
6104 | ; | |
6105 | ||
6106 | if (insn == 0 | |
6107 | || GET_CODE (insn) != NOTE | |
6108 | || NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG) | |
6109 | return; | |
6110 | ||
6111 | /* If the last insn of the loop (the end test) was an NE comparison, | |
6112 | we will interpret it as an EQ comparison, since we fell through | |
f72aed24 | 6113 | the loop. Any equivalences resulting from that comparison are |
7afe21cc RK |
6114 | therefore not valid and must be invalidated. */ |
6115 | if (last_jump_equiv_class) | |
6116 | for (p = last_jump_equiv_class->first_same_value; p; | |
6117 | p = p->next_same_value) | |
51723711 KG |
6118 | { |
6119 | if (GET_CODE (p->exp) == MEM || GET_CODE (p->exp) == REG | |
6120 | || (GET_CODE (p->exp) == SUBREG | |
6121 | && GET_CODE (SUBREG_REG (p->exp)) == REG)) | |
6122 | invalidate (p->exp, VOIDmode); | |
6123 | else if (GET_CODE (p->exp) == STRICT_LOW_PART | |
6124 | || GET_CODE (p->exp) == ZERO_EXTRACT) | |
6125 | invalidate (XEXP (p->exp, 0), GET_MODE (p->exp)); | |
6126 | } | |
7afe21cc RK |
6127 | |
6128 | /* Process insns starting after LOOP_START until we hit a CALL_INSN or | |
6129 | a CODE_LABEL (we could handle a CALL_INSN, but it isn't worth it). | |
6130 | ||
6131 | The only thing we do with SET_DEST is invalidate entries, so we | |
6132 | can safely process each SET in order. It is slightly less efficient | |
556c714b JW |
6133 | to do so, but we only want to handle the most common cases. |
6134 | ||
6135 | The gen_move_insn call in cse_set_around_loop may create new pseudos. | |
6136 | These pseudos won't have valid entries in any of the tables indexed | |
6137 | by register number, such as reg_qty. We avoid out-of-range array | |
6138 | accesses by not processing any instructions created after cse started. */ | |
7afe21cc RK |
6139 | |
6140 | for (insn = NEXT_INSN (loop_start); | |
6141 | GET_CODE (insn) != CALL_INSN && GET_CODE (insn) != CODE_LABEL | |
556c714b | 6142 | && INSN_UID (insn) < max_insn_uid |
7afe21cc RK |
6143 | && ! (GET_CODE (insn) == NOTE |
6144 | && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END); | |
6145 | insn = NEXT_INSN (insn)) | |
6146 | { | |
6147 | if (GET_RTX_CLASS (GET_CODE (insn)) == 'i' | |
6148 | && (GET_CODE (PATTERN (insn)) == SET | |
6149 | || GET_CODE (PATTERN (insn)) == CLOBBER)) | |
6150 | cse_set_around_loop (PATTERN (insn), insn, loop_start); | |
6151 | else if (GET_RTX_CLASS (GET_CODE (insn)) == 'i' | |
6152 | && GET_CODE (PATTERN (insn)) == PARALLEL) | |
6153 | for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--) | |
6154 | if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == SET | |
6155 | || GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == CLOBBER) | |
6156 | cse_set_around_loop (XVECEXP (PATTERN (insn), 0, i), insn, | |
6157 | loop_start); | |
6158 | } | |
6159 | } | |
6160 | \f | |
8b3686ed RK |
6161 | /* Process one SET of an insn that was skipped. We ignore CLOBBERs |
6162 | since they are done elsewhere. This function is called via note_stores. */ | |
6163 | ||
6164 | static void | |
84832317 | 6165 | invalidate_skipped_set (dest, set, data) |
8b3686ed RK |
6166 | rtx set; |
6167 | rtx dest; | |
84832317 | 6168 | void *data ATTRIBUTE_UNUSED; |
8b3686ed | 6169 | { |
9ae8ffe7 JL |
6170 | enum rtx_code code = GET_CODE (dest); |
6171 | ||
6172 | if (code == MEM | |
14a774a9 | 6173 | && ! addr_affects_sp_p (dest) /* If this is not a stack push ... */ |
9ae8ffe7 JL |
6174 | /* There are times when an address can appear varying and be a PLUS |
6175 | during this scan when it would be a fixed address were we to know | |
6176 | the proper equivalences. So invalidate all memory if there is | |
6177 | a BLKmode or nonscalar memory reference or a reference to a | |
6178 | variable address. */ | |
6179 | && (MEM_IN_STRUCT_P (dest) || GET_MODE (dest) == BLKmode | |
6180 | || cse_rtx_varies_p (XEXP (dest, 0)))) | |
6181 | { | |
6182 | invalidate_memory (); | |
6183 | return; | |
6184 | } | |
ffcf6393 | 6185 | |
f47c02fa RK |
6186 | if (GET_CODE (set) == CLOBBER |
6187 | #ifdef HAVE_cc0 | |
6188 | || dest == cc0_rtx | |
6189 | #endif | |
6190 | || dest == pc_rtx) | |
6191 | return; | |
6192 | ||
9ae8ffe7 | 6193 | if (code == STRICT_LOW_PART || code == ZERO_EXTRACT) |
bb4034b3 | 6194 | invalidate (XEXP (dest, 0), GET_MODE (dest)); |
9ae8ffe7 JL |
6195 | else if (code == REG || code == SUBREG || code == MEM) |
6196 | invalidate (dest, VOIDmode); | |
8b3686ed RK |
6197 | } |
6198 | ||
6199 | /* Invalidate all insns from START up to the end of the function or the | |
6200 | next label. This called when we wish to CSE around a block that is | |
6201 | conditionally executed. */ | |
6202 | ||
6203 | static void | |
6204 | invalidate_skipped_block (start) | |
6205 | rtx start; | |
6206 | { | |
6207 | rtx insn; | |
8b3686ed RK |
6208 | |
6209 | for (insn = start; insn && GET_CODE (insn) != CODE_LABEL; | |
6210 | insn = NEXT_INSN (insn)) | |
6211 | { | |
6212 | if (GET_RTX_CLASS (GET_CODE (insn)) != 'i') | |
6213 | continue; | |
6214 | ||
8b3686ed RK |
6215 | if (GET_CODE (insn) == CALL_INSN) |
6216 | { | |
9ae8ffe7 JL |
6217 | if (! CONST_CALL_P (insn)) |
6218 | invalidate_memory (); | |
8b3686ed | 6219 | invalidate_for_call (); |
8b3686ed RK |
6220 | } |
6221 | ||
97577254 | 6222 | invalidate_from_clobbers (PATTERN (insn)); |
84832317 | 6223 | note_stores (PATTERN (insn), invalidate_skipped_set, NULL); |
8b3686ed RK |
6224 | } |
6225 | } | |
6226 | \f | |
84832317 MM |
6227 | /* If modifying X will modify the value in *DATA (which is really an |
6228 | `rtx *'), indicate that fact by setting the pointed to value to | |
6229 | NULL_RTX. */ | |
7afe21cc RK |
6230 | |
6231 | static void | |
84832317 | 6232 | cse_check_loop_start (x, set, data) |
7afe21cc | 6233 | rtx x; |
d6f4ec51 | 6234 | rtx set ATTRIBUTE_UNUSED; |
84832317 | 6235 | void *data; |
7afe21cc | 6236 | { |
84832317 MM |
6237 | rtx *cse_check_loop_start_value = (rtx *) data; |
6238 | ||
6239 | if (*cse_check_loop_start_value == NULL_RTX | |
7afe21cc RK |
6240 | || GET_CODE (x) == CC0 || GET_CODE (x) == PC) |
6241 | return; | |
6242 | ||
84832317 MM |
6243 | if ((GET_CODE (x) == MEM && GET_CODE (*cse_check_loop_start_value) == MEM) |
6244 | || reg_overlap_mentioned_p (x, *cse_check_loop_start_value)) | |
6245 | *cse_check_loop_start_value = NULL_RTX; | |
7afe21cc RK |
6246 | } |
6247 | ||
6248 | /* X is a SET or CLOBBER contained in INSN that was found near the start of | |
6249 | a loop that starts with the label at LOOP_START. | |
6250 | ||
6251 | If X is a SET, we see if its SET_SRC is currently in our hash table. | |
6252 | If so, we see if it has a value equal to some register used only in the | |
6253 | loop exit code (as marked by jump.c). | |
6254 | ||
6255 | If those two conditions are true, we search backwards from the start of | |
6256 | the loop to see if that same value was loaded into a register that still | |
6257 | retains its value at the start of the loop. | |
6258 | ||
6259 | If so, we insert an insn after the load to copy the destination of that | |
6260 | load into the equivalent register and (try to) replace our SET_SRC with that | |
6261 | register. | |
6262 | ||
6263 | In any event, we invalidate whatever this SET or CLOBBER modifies. */ | |
6264 | ||
6265 | static void | |
6266 | cse_set_around_loop (x, insn, loop_start) | |
6267 | rtx x; | |
6268 | rtx insn; | |
6269 | rtx loop_start; | |
6270 | { | |
7afe21cc | 6271 | struct table_elt *src_elt; |
7afe21cc RK |
6272 | |
6273 | /* If this is a SET, see if we can replace SET_SRC, but ignore SETs that | |
6274 | are setting PC or CC0 or whose SET_SRC is already a register. */ | |
6275 | if (GET_CODE (x) == SET | |
6276 | && GET_CODE (SET_DEST (x)) != PC && GET_CODE (SET_DEST (x)) != CC0 | |
6277 | && GET_CODE (SET_SRC (x)) != REG) | |
6278 | { | |
6279 | src_elt = lookup (SET_SRC (x), | |
6280 | HASH (SET_SRC (x), GET_MODE (SET_DEST (x))), | |
6281 | GET_MODE (SET_DEST (x))); | |
6282 | ||
6283 | if (src_elt) | |
6284 | for (src_elt = src_elt->first_same_value; src_elt; | |
6285 | src_elt = src_elt->next_same_value) | |
6286 | if (GET_CODE (src_elt->exp) == REG && REG_LOOP_TEST_P (src_elt->exp) | |
6287 | && COST (src_elt->exp) < COST (SET_SRC (x))) | |
6288 | { | |
6289 | rtx p, set; | |
6290 | ||
6291 | /* Look for an insn in front of LOOP_START that sets | |
6292 | something in the desired mode to SET_SRC (x) before we hit | |
6293 | a label or CALL_INSN. */ | |
6294 | ||
6295 | for (p = prev_nonnote_insn (loop_start); | |
6296 | p && GET_CODE (p) != CALL_INSN | |
6297 | && GET_CODE (p) != CODE_LABEL; | |
6298 | p = prev_nonnote_insn (p)) | |
6299 | if ((set = single_set (p)) != 0 | |
6300 | && GET_CODE (SET_DEST (set)) == REG | |
6301 | && GET_MODE (SET_DEST (set)) == src_elt->mode | |
6302 | && rtx_equal_p (SET_SRC (set), SET_SRC (x))) | |
6303 | { | |
6304 | /* We now have to ensure that nothing between P | |
6305 | and LOOP_START modified anything referenced in | |
6306 | SET_SRC (x). We know that nothing within the loop | |
6307 | can modify it, or we would have invalidated it in | |
6308 | the hash table. */ | |
6309 | rtx q; | |
84832317 | 6310 | rtx cse_check_loop_start_value = SET_SRC (x); |
7afe21cc RK |
6311 | for (q = p; q != loop_start; q = NEXT_INSN (q)) |
6312 | if (GET_RTX_CLASS (GET_CODE (q)) == 'i') | |
84832317 MM |
6313 | note_stores (PATTERN (q), |
6314 | cse_check_loop_start, | |
6315 | &cse_check_loop_start_value); | |
7afe21cc RK |
6316 | |
6317 | /* If nothing was changed and we can replace our | |
6318 | SET_SRC, add an insn after P to copy its destination | |
6319 | to what we will be replacing SET_SRC with. */ | |
6320 | if (cse_check_loop_start_value | |
6321 | && validate_change (insn, &SET_SRC (x), | |
6322 | src_elt->exp, 0)) | |
e89d3e6f R |
6323 | { |
6324 | /* If this creates new pseudos, this is unsafe, | |
6325 | because the regno of new pseudo is unsuitable | |
6326 | to index into reg_qty when cse_insn processes | |
6327 | the new insn. Therefore, if a new pseudo was | |
6328 | created, discard this optimization. */ | |
6329 | int nregs = max_reg_num (); | |
6330 | rtx move | |
6331 | = gen_move_insn (src_elt->exp, SET_DEST (set)); | |
6332 | if (nregs != max_reg_num ()) | |
6333 | { | |
6334 | if (! validate_change (insn, &SET_SRC (x), | |
6335 | SET_SRC (set), 0)) | |
6336 | abort (); | |
6337 | } | |
6338 | else | |
6339 | emit_insn_after (move, p); | |
6340 | } | |
7afe21cc RK |
6341 | break; |
6342 | } | |
6343 | } | |
6344 | } | |
6345 | ||
14a774a9 RK |
6346 | /* Deal with the destination of X affecting the stack pointer. */ |
6347 | addr_affects_sp_p (SET_DEST (x)); | |
7afe21cc | 6348 | |
14a774a9 RK |
6349 | /* See comment on similar code in cse_insn for explanation of these |
6350 | tests. */ | |
7afe21cc | 6351 | if (GET_CODE (SET_DEST (x)) == REG || GET_CODE (SET_DEST (x)) == SUBREG |
9ae8ffe7 | 6352 | || GET_CODE (SET_DEST (x)) == MEM) |
bb4034b3 | 6353 | invalidate (SET_DEST (x), VOIDmode); |
2708da92 RS |
6354 | else if (GET_CODE (SET_DEST (x)) == STRICT_LOW_PART |
6355 | || GET_CODE (SET_DEST (x)) == ZERO_EXTRACT) | |
bb4034b3 | 6356 | invalidate (XEXP (SET_DEST (x), 0), GET_MODE (SET_DEST (x))); |
7afe21cc RK |
6357 | } |
6358 | \f | |
6359 | /* Find the end of INSN's basic block and return its range, | |
6360 | the total number of SETs in all the insns of the block, the last insn of the | |
6361 | block, and the branch path. | |
6362 | ||
6363 | The branch path indicates which branches should be followed. If a non-zero | |
6364 | path size is specified, the block should be rescanned and a different set | |
6365 | of branches will be taken. The branch path is only used if | |
8b3686ed | 6366 | FLAG_CSE_FOLLOW_JUMPS or FLAG_CSE_SKIP_BLOCKS is non-zero. |
7afe21cc RK |
6367 | |
6368 | DATA is a pointer to a struct cse_basic_block_data, defined below, that is | |
6369 | used to describe the block. It is filled in with the information about | |
6370 | the current block. The incoming structure's branch path, if any, is used | |
6371 | to construct the output branch path. */ | |
6372 | ||
7afe21cc | 6373 | void |
8b3686ed | 6374 | cse_end_of_basic_block (insn, data, follow_jumps, after_loop, skip_blocks) |
7afe21cc RK |
6375 | rtx insn; |
6376 | struct cse_basic_block_data *data; | |
6377 | int follow_jumps; | |
6378 | int after_loop; | |
8b3686ed | 6379 | int skip_blocks; |
7afe21cc RK |
6380 | { |
6381 | rtx p = insn, q; | |
6382 | int nsets = 0; | |
6383 | int low_cuid = INSN_CUID (insn), high_cuid = INSN_CUID (insn); | |
fc3ffe83 | 6384 | rtx next = GET_RTX_CLASS (GET_CODE (insn)) == 'i' ? insn : next_real_insn (insn); |
7afe21cc RK |
6385 | int path_size = data->path_size; |
6386 | int path_entry = 0; | |
6387 | int i; | |
6388 | ||
6389 | /* Update the previous branch path, if any. If the last branch was | |
6390 | previously TAKEN, mark it NOT_TAKEN. If it was previously NOT_TAKEN, | |
6391 | shorten the path by one and look at the previous branch. We know that | |
6392 | at least one branch must have been taken if PATH_SIZE is non-zero. */ | |
6393 | while (path_size > 0) | |
6394 | { | |
8b3686ed | 6395 | if (data->path[path_size - 1].status != NOT_TAKEN) |
7afe21cc RK |
6396 | { |
6397 | data->path[path_size - 1].status = NOT_TAKEN; | |
6398 | break; | |
6399 | } | |
6400 | else | |
6401 | path_size--; | |
6402 | } | |
6403 | ||
16b702cd MM |
6404 | /* If the first instruction is marked with QImode, that means we've |
6405 | already processed this block. Our caller will look at DATA->LAST | |
6406 | to figure out where to go next. We want to return the next block | |
6407 | in the instruction stream, not some branched-to block somewhere | |
6408 | else. We accomplish this by pretending our called forbid us to | |
6409 | follow jumps, or skip blocks. */ | |
6410 | if (GET_MODE (insn) == QImode) | |
6411 | follow_jumps = skip_blocks = 0; | |
6412 | ||
7afe21cc RK |
6413 | /* Scan to end of this basic block. */ |
6414 | while (p && GET_CODE (p) != CODE_LABEL) | |
6415 | { | |
6416 | /* Don't cse out the end of a loop. This makes a difference | |
6417 | only for the unusual loops that always execute at least once; | |
6418 | all other loops have labels there so we will stop in any case. | |
6419 | Cse'ing out the end of the loop is dangerous because it | |
6420 | might cause an invariant expression inside the loop | |
6421 | to be reused after the end of the loop. This would make it | |
6422 | hard to move the expression out of the loop in loop.c, | |
6423 | especially if it is one of several equivalent expressions | |
6424 | and loop.c would like to eliminate it. | |
6425 | ||
6426 | If we are running after loop.c has finished, we can ignore | |
6427 | the NOTE_INSN_LOOP_END. */ | |
6428 | ||
6429 | if (! after_loop && GET_CODE (p) == NOTE | |
6430 | && NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END) | |
6431 | break; | |
6432 | ||
6433 | /* Don't cse over a call to setjmp; on some machines (eg vax) | |
6434 | the regs restored by the longjmp come from | |
6435 | a later time than the setjmp. */ | |
6436 | if (GET_CODE (p) == NOTE | |
6437 | && NOTE_LINE_NUMBER (p) == NOTE_INSN_SETJMP) | |
6438 | break; | |
6439 | ||
6440 | /* A PARALLEL can have lots of SETs in it, | |
6441 | especially if it is really an ASM_OPERANDS. */ | |
6442 | if (GET_RTX_CLASS (GET_CODE (p)) == 'i' | |
6443 | && GET_CODE (PATTERN (p)) == PARALLEL) | |
6444 | nsets += XVECLEN (PATTERN (p), 0); | |
6445 | else if (GET_CODE (p) != NOTE) | |
6446 | nsets += 1; | |
6447 | ||
164c8956 RK |
6448 | /* Ignore insns made by CSE; they cannot affect the boundaries of |
6449 | the basic block. */ | |
6450 | ||
6451 | if (INSN_UID (p) <= max_uid && INSN_CUID (p) > high_cuid) | |
8b3686ed | 6452 | high_cuid = INSN_CUID (p); |
164c8956 RK |
6453 | if (INSN_UID (p) <= max_uid && INSN_CUID (p) < low_cuid) |
6454 | low_cuid = INSN_CUID (p); | |
7afe21cc RK |
6455 | |
6456 | /* See if this insn is in our branch path. If it is and we are to | |
6457 | take it, do so. */ | |
6458 | if (path_entry < path_size && data->path[path_entry].branch == p) | |
6459 | { | |
8b3686ed | 6460 | if (data->path[path_entry].status != NOT_TAKEN) |
7afe21cc RK |
6461 | p = JUMP_LABEL (p); |
6462 | ||
6463 | /* Point to next entry in path, if any. */ | |
6464 | path_entry++; | |
6465 | } | |
6466 | ||
6467 | /* If this is a conditional jump, we can follow it if -fcse-follow-jumps | |
6468 | was specified, we haven't reached our maximum path length, there are | |
6469 | insns following the target of the jump, this is the only use of the | |
8b3686ed RK |
6470 | jump label, and the target label is preceded by a BARRIER. |
6471 | ||
6472 | Alternatively, we can follow the jump if it branches around a | |
6473 | block of code and there are no other branches into the block. | |
6474 | In this case invalidate_skipped_block will be called to invalidate any | |
6475 | registers set in the block when following the jump. */ | |
6476 | ||
6477 | else if ((follow_jumps || skip_blocks) && path_size < PATHLENGTH - 1 | |
7afe21cc RK |
6478 | && GET_CODE (p) == JUMP_INSN |
6479 | && GET_CODE (PATTERN (p)) == SET | |
6480 | && GET_CODE (SET_SRC (PATTERN (p))) == IF_THEN_ELSE | |
85c3ba60 | 6481 | && JUMP_LABEL (p) != 0 |
7afe21cc RK |
6482 | && LABEL_NUSES (JUMP_LABEL (p)) == 1 |
6483 | && NEXT_INSN (JUMP_LABEL (p)) != 0) | |
6484 | { | |
6485 | for (q = PREV_INSN (JUMP_LABEL (p)); q; q = PREV_INSN (q)) | |
6486 | if ((GET_CODE (q) != NOTE | |
6487 | || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END | |
6488 | || NOTE_LINE_NUMBER (q) == NOTE_INSN_SETJMP) | |
6489 | && (GET_CODE (q) != CODE_LABEL || LABEL_NUSES (q) != 0)) | |
6490 | break; | |
6491 | ||
6492 | /* If we ran into a BARRIER, this code is an extension of the | |
6493 | basic block when the branch is taken. */ | |
8b3686ed | 6494 | if (follow_jumps && q != 0 && GET_CODE (q) == BARRIER) |
7afe21cc RK |
6495 | { |
6496 | /* Don't allow ourself to keep walking around an | |
6497 | always-executed loop. */ | |
fc3ffe83 RK |
6498 | if (next_real_insn (q) == next) |
6499 | { | |
6500 | p = NEXT_INSN (p); | |
6501 | continue; | |
6502 | } | |
7afe21cc RK |
6503 | |
6504 | /* Similarly, don't put a branch in our path more than once. */ | |
6505 | for (i = 0; i < path_entry; i++) | |
6506 | if (data->path[i].branch == p) | |
6507 | break; | |
6508 | ||
6509 | if (i != path_entry) | |
6510 | break; | |
6511 | ||
6512 | data->path[path_entry].branch = p; | |
6513 | data->path[path_entry++].status = TAKEN; | |
6514 | ||
6515 | /* This branch now ends our path. It was possible that we | |
6516 | didn't see this branch the last time around (when the | |
6517 | insn in front of the target was a JUMP_INSN that was | |
6518 | turned into a no-op). */ | |
6519 | path_size = path_entry; | |
6520 | ||
6521 | p = JUMP_LABEL (p); | |
6522 | /* Mark block so we won't scan it again later. */ | |
6523 | PUT_MODE (NEXT_INSN (p), QImode); | |
6524 | } | |
8b3686ed RK |
6525 | /* Detect a branch around a block of code. */ |
6526 | else if (skip_blocks && q != 0 && GET_CODE (q) != CODE_LABEL) | |
6527 | { | |
6528 | register rtx tmp; | |
6529 | ||
fc3ffe83 RK |
6530 | if (next_real_insn (q) == next) |
6531 | { | |
6532 | p = NEXT_INSN (p); | |
6533 | continue; | |
6534 | } | |
8b3686ed RK |
6535 | |
6536 | for (i = 0; i < path_entry; i++) | |
6537 | if (data->path[i].branch == p) | |
6538 | break; | |
6539 | ||
6540 | if (i != path_entry) | |
6541 | break; | |
6542 | ||
6543 | /* This is no_labels_between_p (p, q) with an added check for | |
6544 | reaching the end of a function (in case Q precedes P). */ | |
6545 | for (tmp = NEXT_INSN (p); tmp && tmp != q; tmp = NEXT_INSN (tmp)) | |
6546 | if (GET_CODE (tmp) == CODE_LABEL) | |
6547 | break; | |
6548 | ||
6549 | if (tmp == q) | |
6550 | { | |
6551 | data->path[path_entry].branch = p; | |
6552 | data->path[path_entry++].status = AROUND; | |
6553 | ||
6554 | path_size = path_entry; | |
6555 | ||
6556 | p = JUMP_LABEL (p); | |
6557 | /* Mark block so we won't scan it again later. */ | |
6558 | PUT_MODE (NEXT_INSN (p), QImode); | |
6559 | } | |
6560 | } | |
7afe21cc | 6561 | } |
7afe21cc RK |
6562 | p = NEXT_INSN (p); |
6563 | } | |
6564 | ||
6565 | data->low_cuid = low_cuid; | |
6566 | data->high_cuid = high_cuid; | |
6567 | data->nsets = nsets; | |
6568 | data->last = p; | |
6569 | ||
6570 | /* If all jumps in the path are not taken, set our path length to zero | |
6571 | so a rescan won't be done. */ | |
6572 | for (i = path_size - 1; i >= 0; i--) | |
8b3686ed | 6573 | if (data->path[i].status != NOT_TAKEN) |
7afe21cc RK |
6574 | break; |
6575 | ||
6576 | if (i == -1) | |
6577 | data->path_size = 0; | |
6578 | else | |
6579 | data->path_size = path_size; | |
6580 | ||
6581 | /* End the current branch path. */ | |
6582 | data->path[path_size].branch = 0; | |
6583 | } | |
6584 | \f | |
7afe21cc RK |
6585 | /* Perform cse on the instructions of a function. |
6586 | F is the first instruction. | |
6587 | NREGS is one plus the highest pseudo-reg number used in the instruction. | |
6588 | ||
6589 | AFTER_LOOP is 1 if this is the cse call done after loop optimization | |
6590 | (only if -frerun-cse-after-loop). | |
6591 | ||
6592 | Returns 1 if jump_optimize should be redone due to simplifications | |
6593 | in conditional jump instructions. */ | |
6594 | ||
6595 | int | |
6596 | cse_main (f, nregs, after_loop, file) | |
6597 | rtx f; | |
6598 | int nregs; | |
6599 | int after_loop; | |
6600 | FILE *file; | |
6601 | { | |
6602 | struct cse_basic_block_data val; | |
6603 | register rtx insn = f; | |
6604 | register int i; | |
6605 | ||
6606 | cse_jumps_altered = 0; | |
a5dfb4ee | 6607 | recorded_label_ref = 0; |
7afe21cc RK |
6608 | constant_pool_entries_cost = 0; |
6609 | val.path_size = 0; | |
6610 | ||
6611 | init_recog (); | |
9ae8ffe7 | 6612 | init_alias_analysis (); |
7afe21cc RK |
6613 | |
6614 | max_reg = nregs; | |
6615 | ||
556c714b JW |
6616 | max_insn_uid = get_max_uid (); |
6617 | ||
75c6bd46 RH |
6618 | reg_next_eqv = (int *) xmalloc (nregs * sizeof (int)); |
6619 | reg_prev_eqv = (int *) xmalloc (nregs * sizeof (int)); | |
7afe21cc | 6620 | |
7bac1be0 RK |
6621 | #ifdef LOAD_EXTEND_OP |
6622 | ||
6623 | /* Allocate scratch rtl here. cse_insn will fill in the memory reference | |
6624 | and change the code and mode as appropriate. */ | |
38a448ca | 6625 | memory_extend_rtx = gen_rtx_ZERO_EXTEND (VOIDmode, NULL_RTX); |
7bac1be0 RK |
6626 | #endif |
6627 | ||
7afe21cc RK |
6628 | /* Discard all the free elements of the previous function |
6629 | since they are allocated in the temporarily obstack. */ | |
4c9a05bc | 6630 | bzero ((char *) table, sizeof table); |
7afe21cc RK |
6631 | free_element_chain = 0; |
6632 | n_elements_made = 0; | |
6633 | ||
6634 | /* Find the largest uid. */ | |
6635 | ||
164c8956 | 6636 | max_uid = get_max_uid (); |
75c6bd46 | 6637 | uid_cuid = (int *) xcalloc (max_uid + 1, sizeof (int)); |
7afe21cc RK |
6638 | |
6639 | /* Compute the mapping from uids to cuids. | |
6640 | CUIDs are numbers assigned to insns, like uids, | |
6641 | except that cuids increase monotonically through the code. | |
6642 | Don't assign cuids to line-number NOTEs, so that the distance in cuids | |
6643 | between two insns is not affected by -g. */ | |
6644 | ||
6645 | for (insn = f, i = 0; insn; insn = NEXT_INSN (insn)) | |
6646 | { | |
6647 | if (GET_CODE (insn) != NOTE | |
6648 | || NOTE_LINE_NUMBER (insn) < 0) | |
6649 | INSN_CUID (insn) = ++i; | |
6650 | else | |
6651 | /* Give a line number note the same cuid as preceding insn. */ | |
6652 | INSN_CUID (insn) = i; | |
6653 | } | |
6654 | ||
6655 | /* Initialize which registers are clobbered by calls. */ | |
6656 | ||
6657 | CLEAR_HARD_REG_SET (regs_invalidated_by_call); | |
6658 | ||
6659 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
6660 | if ((call_used_regs[i] | |
6661 | /* Used to check !fixed_regs[i] here, but that isn't safe; | |
6662 | fixed regs are still call-clobbered, and sched can get | |
6663 | confused if they can "live across calls". | |
6664 | ||
6665 | The frame pointer is always preserved across calls. The arg | |
6666 | pointer is if it is fixed. The stack pointer usually is, unless | |
6667 | RETURN_POPS_ARGS, in which case an explicit CLOBBER | |
6668 | will be present. If we are generating PIC code, the PIC offset | |
6669 | table register is preserved across calls. */ | |
6670 | ||
6671 | && i != STACK_POINTER_REGNUM | |
6672 | && i != FRAME_POINTER_REGNUM | |
8bc169f2 DE |
6673 | #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM |
6674 | && i != HARD_FRAME_POINTER_REGNUM | |
6675 | #endif | |
7afe21cc RK |
6676 | #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM |
6677 | && ! (i == ARG_POINTER_REGNUM && fixed_regs[i]) | |
6678 | #endif | |
be8fe470 | 6679 | #if defined (PIC_OFFSET_TABLE_REGNUM) && !defined (PIC_OFFSET_TABLE_REG_CALL_CLOBBERED) |
7afe21cc RK |
6680 | && ! (i == PIC_OFFSET_TABLE_REGNUM && flag_pic) |
6681 | #endif | |
6682 | ) | |
6683 | || global_regs[i]) | |
6684 | SET_HARD_REG_BIT (regs_invalidated_by_call, i); | |
6685 | ||
1497faf6 RH |
6686 | if (ggc_p) |
6687 | ggc_push_context (); | |
6688 | ||
7afe21cc RK |
6689 | /* Loop over basic blocks. |
6690 | Compute the maximum number of qty's needed for each basic block | |
6691 | (which is 2 for each SET). */ | |
6692 | insn = f; | |
6693 | while (insn) | |
6694 | { | |
8b3686ed RK |
6695 | cse_end_of_basic_block (insn, &val, flag_cse_follow_jumps, after_loop, |
6696 | flag_cse_skip_blocks); | |
7afe21cc RK |
6697 | |
6698 | /* If this basic block was already processed or has no sets, skip it. */ | |
6699 | if (val.nsets == 0 || GET_MODE (insn) == QImode) | |
6700 | { | |
6701 | PUT_MODE (insn, VOIDmode); | |
6702 | insn = (val.last ? NEXT_INSN (val.last) : 0); | |
6703 | val.path_size = 0; | |
6704 | continue; | |
6705 | } | |
6706 | ||
6707 | cse_basic_block_start = val.low_cuid; | |
6708 | cse_basic_block_end = val.high_cuid; | |
6709 | max_qty = val.nsets * 2; | |
6710 | ||
6711 | if (file) | |
ab87f8c8 | 6712 | fnotice (file, ";; Processing block from %d to %d, %d sets.\n", |
7afe21cc RK |
6713 | INSN_UID (insn), val.last ? INSN_UID (val.last) : 0, |
6714 | val.nsets); | |
6715 | ||
6716 | /* Make MAX_QTY bigger to give us room to optimize | |
6717 | past the end of this basic block, if that should prove useful. */ | |
6718 | if (max_qty < 500) | |
6719 | max_qty = 500; | |
6720 | ||
6721 | max_qty += max_reg; | |
6722 | ||
6723 | /* If this basic block is being extended by following certain jumps, | |
6724 | (see `cse_end_of_basic_block'), we reprocess the code from the start. | |
6725 | Otherwise, we start after this basic block. */ | |
6726 | if (val.path_size > 0) | |
6727 | cse_basic_block (insn, val.last, val.path, 0); | |
6728 | else | |
6729 | { | |
6730 | int old_cse_jumps_altered = cse_jumps_altered; | |
6731 | rtx temp; | |
6732 | ||
6733 | /* When cse changes a conditional jump to an unconditional | |
6734 | jump, we want to reprocess the block, since it will give | |
6735 | us a new branch path to investigate. */ | |
6736 | cse_jumps_altered = 0; | |
6737 | temp = cse_basic_block (insn, val.last, val.path, ! after_loop); | |
8b3686ed RK |
6738 | if (cse_jumps_altered == 0 |
6739 | || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0)) | |
7afe21cc RK |
6740 | insn = temp; |
6741 | ||
6742 | cse_jumps_altered |= old_cse_jumps_altered; | |
6743 | } | |
6744 | ||
1497faf6 RH |
6745 | if (ggc_p) |
6746 | ggc_collect (); | |
6747 | ||
7afe21cc RK |
6748 | #ifdef USE_C_ALLOCA |
6749 | alloca (0); | |
6750 | #endif | |
6751 | } | |
6752 | ||
1497faf6 RH |
6753 | if (ggc_p) |
6754 | ggc_pop_context (); | |
6755 | ||
7afe21cc RK |
6756 | /* Tell refers_to_mem_p that qty_const info is not available. */ |
6757 | qty_const = 0; | |
6758 | ||
6759 | if (max_elements_made < n_elements_made) | |
6760 | max_elements_made = n_elements_made; | |
6761 | ||
e05e2395 MM |
6762 | /* Clean up. */ |
6763 | end_alias_analysis (); | |
75c6bd46 RH |
6764 | free (uid_cuid); |
6765 | free (reg_next_eqv); | |
6766 | free (reg_prev_eqv); | |
e05e2395 | 6767 | |
a5dfb4ee | 6768 | return cse_jumps_altered || recorded_label_ref; |
7afe21cc RK |
6769 | } |
6770 | ||
6771 | /* Process a single basic block. FROM and TO and the limits of the basic | |
6772 | block. NEXT_BRANCH points to the branch path when following jumps or | |
6773 | a null path when not following jumps. | |
6774 | ||
6775 | AROUND_LOOP is non-zero if we are to try to cse around to the start of a | |
6776 | loop. This is true when we are being called for the last time on a | |
6777 | block and this CSE pass is before loop.c. */ | |
6778 | ||
6779 | static rtx | |
6780 | cse_basic_block (from, to, next_branch, around_loop) | |
6781 | register rtx from, to; | |
6782 | struct branch_path *next_branch; | |
6783 | int around_loop; | |
6784 | { | |
6785 | register rtx insn; | |
6786 | int to_usage = 0; | |
7bd8b2a8 | 6787 | rtx libcall_insn = NULL_RTX; |
e9a25f70 | 6788 | int num_insns = 0; |
7afe21cc RK |
6789 | |
6790 | /* Each of these arrays is undefined before max_reg, so only allocate | |
6791 | the space actually needed and adjust the start below. */ | |
6792 | ||
75c6bd46 RH |
6793 | qty_first_reg = (int *) xmalloc ((max_qty - max_reg) * sizeof (int)); |
6794 | qty_last_reg = (int *) xmalloc ((max_qty - max_reg) * sizeof (int)); | |
6795 | qty_mode = (enum machine_mode *) xmalloc ((max_qty - max_reg) | |
c5c76735 | 6796 | * sizeof (enum machine_mode)); |
75c6bd46 RH |
6797 | qty_const = (rtx *) xmalloc ((max_qty - max_reg) * sizeof (rtx)); |
6798 | qty_const_insn = (rtx *) xmalloc ((max_qty - max_reg) * sizeof (rtx)); | |
7afe21cc | 6799 | qty_comparison_code |
75c6bd46 RH |
6800 | = (enum rtx_code *) xmalloc ((max_qty - max_reg) * sizeof (enum rtx_code)); |
6801 | qty_comparison_qty = (int *) xmalloc ((max_qty - max_reg) * sizeof (int)); | |
6802 | qty_comparison_const = (rtx *) xmalloc ((max_qty - max_reg) * sizeof (rtx)); | |
7afe21cc RK |
6803 | |
6804 | qty_first_reg -= max_reg; | |
6805 | qty_last_reg -= max_reg; | |
6806 | qty_mode -= max_reg; | |
6807 | qty_const -= max_reg; | |
6808 | qty_const_insn -= max_reg; | |
6809 | qty_comparison_code -= max_reg; | |
6810 | qty_comparison_qty -= max_reg; | |
6811 | qty_comparison_const -= max_reg; | |
6812 | ||
6813 | new_basic_block (); | |
6814 | ||
6815 | /* TO might be a label. If so, protect it from being deleted. */ | |
6816 | if (to != 0 && GET_CODE (to) == CODE_LABEL) | |
6817 | ++LABEL_NUSES (to); | |
6818 | ||
6819 | for (insn = from; insn != to; insn = NEXT_INSN (insn)) | |
6820 | { | |
1d22a2c1 | 6821 | register enum rtx_code code = GET_CODE (insn); |
e9a25f70 | 6822 | |
1d22a2c1 MM |
6823 | /* If we have processed 1,000 insns, flush the hash table to |
6824 | avoid extreme quadratic behavior. We must not include NOTEs | |
6825 | in the count since there may be more or them when generating | |
6826 | debugging information. If we clear the table at different | |
6827 | times, code generated with -g -O might be different than code | |
6828 | generated with -O but not -g. | |
e9a25f70 JL |
6829 | |
6830 | ??? This is a real kludge and needs to be done some other way. | |
6831 | Perhaps for 2.9. */ | |
1d22a2c1 | 6832 | if (code != NOTE && num_insns++ > 1000) |
e9a25f70 | 6833 | { |
01e752d3 | 6834 | flush_hash_table (); |
e9a25f70 JL |
6835 | num_insns = 0; |
6836 | } | |
7afe21cc RK |
6837 | |
6838 | /* See if this is a branch that is part of the path. If so, and it is | |
6839 | to be taken, do so. */ | |
6840 | if (next_branch->branch == insn) | |
6841 | { | |
8b3686ed RK |
6842 | enum taken status = next_branch++->status; |
6843 | if (status != NOT_TAKEN) | |
7afe21cc | 6844 | { |
8b3686ed RK |
6845 | if (status == TAKEN) |
6846 | record_jump_equiv (insn, 1); | |
6847 | else | |
6848 | invalidate_skipped_block (NEXT_INSN (insn)); | |
6849 | ||
7afe21cc RK |
6850 | /* Set the last insn as the jump insn; it doesn't affect cc0. |
6851 | Then follow this branch. */ | |
6852 | #ifdef HAVE_cc0 | |
6853 | prev_insn_cc0 = 0; | |
6854 | #endif | |
6855 | prev_insn = insn; | |
6856 | insn = JUMP_LABEL (insn); | |
6857 | continue; | |
6858 | } | |
6859 | } | |
6860 | ||
7afe21cc RK |
6861 | if (GET_MODE (insn) == QImode) |
6862 | PUT_MODE (insn, VOIDmode); | |
6863 | ||
6864 | if (GET_RTX_CLASS (code) == 'i') | |
6865 | { | |
7bd8b2a8 JL |
6866 | rtx p; |
6867 | ||
7afe21cc RK |
6868 | /* Process notes first so we have all notes in canonical forms when |
6869 | looking for duplicate operations. */ | |
6870 | ||
6871 | if (REG_NOTES (insn)) | |
906c4e36 | 6872 | REG_NOTES (insn) = cse_process_notes (REG_NOTES (insn), NULL_RTX); |
7afe21cc RK |
6873 | |
6874 | /* Track when we are inside in LIBCALL block. Inside such a block, | |
6875 | we do not want to record destinations. The last insn of a | |
6876 | LIBCALL block is not considered to be part of the block, since | |
830a38ee | 6877 | its destination is the result of the block and hence should be |
7afe21cc RK |
6878 | recorded. */ |
6879 | ||
63be02db | 6880 | if ((p = find_reg_note (insn, REG_LIBCALL, NULL_RTX))) |
7bd8b2a8 | 6881 | libcall_insn = XEXP (p, 0); |
906c4e36 | 6882 | else if (find_reg_note (insn, REG_RETVAL, NULL_RTX)) |
7bd8b2a8 | 6883 | libcall_insn = NULL_RTX; |
7afe21cc | 6884 | |
7bd8b2a8 | 6885 | cse_insn (insn, libcall_insn); |
7afe21cc RK |
6886 | } |
6887 | ||
6888 | /* If INSN is now an unconditional jump, skip to the end of our | |
6889 | basic block by pretending that we just did the last insn in the | |
6890 | basic block. If we are jumping to the end of our block, show | |
6891 | that we can have one usage of TO. */ | |
6892 | ||
6893 | if (simplejump_p (insn)) | |
6894 | { | |
6895 | if (to == 0) | |
6896 | return 0; | |
6897 | ||
6898 | if (JUMP_LABEL (insn) == to) | |
6899 | to_usage = 1; | |
6900 | ||
6a5293dc RS |
6901 | /* Maybe TO was deleted because the jump is unconditional. |
6902 | If so, there is nothing left in this basic block. */ | |
6903 | /* ??? Perhaps it would be smarter to set TO | |
6904 | to whatever follows this insn, | |
6905 | and pretend the basic block had always ended here. */ | |
6906 | if (INSN_DELETED_P (to)) | |
6907 | break; | |
6908 | ||
7afe21cc RK |
6909 | insn = PREV_INSN (to); |
6910 | } | |
6911 | ||
6912 | /* See if it is ok to keep on going past the label | |
6913 | which used to end our basic block. Remember that we incremented | |
d45cf215 | 6914 | the count of that label, so we decrement it here. If we made |
7afe21cc RK |
6915 | a jump unconditional, TO_USAGE will be one; in that case, we don't |
6916 | want to count the use in that jump. */ | |
6917 | ||
6918 | if (to != 0 && NEXT_INSN (insn) == to | |
6919 | && GET_CODE (to) == CODE_LABEL && --LABEL_NUSES (to) == to_usage) | |
6920 | { | |
6921 | struct cse_basic_block_data val; | |
146135d6 | 6922 | rtx prev; |
7afe21cc RK |
6923 | |
6924 | insn = NEXT_INSN (to); | |
6925 | ||
146135d6 RK |
6926 | /* If TO was the last insn in the function, we are done. */ |
6927 | if (insn == 0) | |
7afe21cc RK |
6928 | return 0; |
6929 | ||
146135d6 RK |
6930 | /* If TO was preceded by a BARRIER we are done with this block |
6931 | because it has no continuation. */ | |
6932 | prev = prev_nonnote_insn (to); | |
6933 | if (prev && GET_CODE (prev) == BARRIER) | |
6934 | return insn; | |
6935 | ||
6936 | /* Find the end of the following block. Note that we won't be | |
6937 | following branches in this case. */ | |
7afe21cc RK |
6938 | to_usage = 0; |
6939 | val.path_size = 0; | |
8b3686ed | 6940 | cse_end_of_basic_block (insn, &val, 0, 0, 0); |
7afe21cc RK |
6941 | |
6942 | /* If the tables we allocated have enough space left | |
6943 | to handle all the SETs in the next basic block, | |
6944 | continue through it. Otherwise, return, | |
6945 | and that block will be scanned individually. */ | |
6946 | if (val.nsets * 2 + next_qty > max_qty) | |
6947 | break; | |
6948 | ||
6949 | cse_basic_block_start = val.low_cuid; | |
6950 | cse_basic_block_end = val.high_cuid; | |
6951 | to = val.last; | |
6952 | ||
6953 | /* Prevent TO from being deleted if it is a label. */ | |
6954 | if (to != 0 && GET_CODE (to) == CODE_LABEL) | |
6955 | ++LABEL_NUSES (to); | |
6956 | ||
6957 | /* Back up so we process the first insn in the extension. */ | |
6958 | insn = PREV_INSN (insn); | |
6959 | } | |
6960 | } | |
6961 | ||
6962 | if (next_qty > max_qty) | |
6963 | abort (); | |
6964 | ||
6965 | /* If we are running before loop.c, we stopped on a NOTE_INSN_LOOP_END, and | |
6966 | the previous insn is the only insn that branches to the head of a loop, | |
6967 | we can cse into the loop. Don't do this if we changed the jump | |
6968 | structure of a loop unless we aren't going to be following jumps. */ | |
6969 | ||
8b3686ed RK |
6970 | if ((cse_jumps_altered == 0 |
6971 | || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0)) | |
7afe21cc RK |
6972 | && around_loop && to != 0 |
6973 | && GET_CODE (to) == NOTE && NOTE_LINE_NUMBER (to) == NOTE_INSN_LOOP_END | |
6974 | && GET_CODE (PREV_INSN (to)) == JUMP_INSN | |
6975 | && JUMP_LABEL (PREV_INSN (to)) != 0 | |
6976 | && LABEL_NUSES (JUMP_LABEL (PREV_INSN (to))) == 1) | |
6977 | cse_around_loop (JUMP_LABEL (PREV_INSN (to))); | |
6978 | ||
75c6bd46 RH |
6979 | free (qty_first_reg + max_reg); |
6980 | free (qty_last_reg + max_reg); | |
6981 | free (qty_mode + max_reg); | |
6982 | free (qty_const + max_reg); | |
6983 | free (qty_const_insn + max_reg); | |
6984 | free (qty_comparison_code + max_reg); | |
6985 | free (qty_comparison_qty + max_reg); | |
6986 | free (qty_comparison_const + max_reg); | |
6987 | ||
7afe21cc RK |
6988 | return to ? NEXT_INSN (to) : 0; |
6989 | } | |
6990 | \f | |
6991 | /* Count the number of times registers are used (not set) in X. | |
6992 | COUNTS is an array in which we accumulate the count, INCR is how much | |
79644f06 RK |
6993 | we count each register usage. |
6994 | ||
6995 | Don't count a usage of DEST, which is the SET_DEST of a SET which | |
6996 | contains X in its SET_SRC. This is because such a SET does not | |
6997 | modify the liveness of DEST. */ | |
7afe21cc RK |
6998 | |
6999 | static void | |
79644f06 | 7000 | count_reg_usage (x, counts, dest, incr) |
7afe21cc RK |
7001 | rtx x; |
7002 | int *counts; | |
79644f06 | 7003 | rtx dest; |
7afe21cc RK |
7004 | int incr; |
7005 | { | |
f1e7c95f | 7006 | enum rtx_code code; |
6f7d635c | 7007 | const char *fmt; |
7afe21cc RK |
7008 | int i, j; |
7009 | ||
f1e7c95f RK |
7010 | if (x == 0) |
7011 | return; | |
7012 | ||
7013 | switch (code = GET_CODE (x)) | |
7afe21cc RK |
7014 | { |
7015 | case REG: | |
79644f06 RK |
7016 | if (x != dest) |
7017 | counts[REGNO (x)] += incr; | |
7afe21cc RK |
7018 | return; |
7019 | ||
7020 | case PC: | |
7021 | case CC0: | |
7022 | case CONST: | |
7023 | case CONST_INT: | |
7024 | case CONST_DOUBLE: | |
7025 | case SYMBOL_REF: | |
7026 | case LABEL_REF: | |
02e39abc JL |
7027 | return; |
7028 | ||
7029 | case CLOBBER: | |
7030 | /* If we are clobbering a MEM, mark any registers inside the address | |
7031 | as being used. */ | |
7032 | if (GET_CODE (XEXP (x, 0)) == MEM) | |
7033 | count_reg_usage (XEXP (XEXP (x, 0), 0), counts, NULL_RTX, incr); | |
7afe21cc RK |
7034 | return; |
7035 | ||
7036 | case SET: | |
7037 | /* Unless we are setting a REG, count everything in SET_DEST. */ | |
7038 | if (GET_CODE (SET_DEST (x)) != REG) | |
79644f06 | 7039 | count_reg_usage (SET_DEST (x), counts, NULL_RTX, incr); |
9ff08f70 RK |
7040 | |
7041 | /* If SRC has side-effects, then we can't delete this insn, so the | |
7042 | usage of SET_DEST inside SRC counts. | |
7043 | ||
7044 | ??? Strictly-speaking, we might be preserving this insn | |
7045 | because some other SET has side-effects, but that's hard | |
7046 | to do and can't happen now. */ | |
7047 | count_reg_usage (SET_SRC (x), counts, | |
7048 | side_effects_p (SET_SRC (x)) ? NULL_RTX : SET_DEST (x), | |
7049 | incr); | |
7afe21cc RK |
7050 | return; |
7051 | ||
f1e7c95f RK |
7052 | case CALL_INSN: |
7053 | count_reg_usage (CALL_INSN_FUNCTION_USAGE (x), counts, NULL_RTX, incr); | |
7054 | ||
7055 | /* ... falls through ... */ | |
7afe21cc RK |
7056 | case INSN: |
7057 | case JUMP_INSN: | |
79644f06 | 7058 | count_reg_usage (PATTERN (x), counts, NULL_RTX, incr); |
7afe21cc RK |
7059 | |
7060 | /* Things used in a REG_EQUAL note aren't dead since loop may try to | |
7061 | use them. */ | |
7062 | ||
f1e7c95f | 7063 | count_reg_usage (REG_NOTES (x), counts, NULL_RTX, incr); |
7afe21cc RK |
7064 | return; |
7065 | ||
7066 | case EXPR_LIST: | |
7067 | case INSN_LIST: | |
f1e7c95f | 7068 | if (REG_NOTE_KIND (x) == REG_EQUAL |
c6a26dc4 | 7069 | || (REG_NOTE_KIND (x) != REG_NONNEG && GET_CODE (XEXP (x,0)) == USE)) |
79644f06 | 7070 | count_reg_usage (XEXP (x, 0), counts, NULL_RTX, incr); |
f1e7c95f | 7071 | count_reg_usage (XEXP (x, 1), counts, NULL_RTX, incr); |
7afe21cc | 7072 | return; |
e9a25f70 JL |
7073 | |
7074 | default: | |
7075 | break; | |
7afe21cc RK |
7076 | } |
7077 | ||
7078 | fmt = GET_RTX_FORMAT (code); | |
7079 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
7080 | { | |
7081 | if (fmt[i] == 'e') | |
79644f06 | 7082 | count_reg_usage (XEXP (x, i), counts, dest, incr); |
7afe21cc RK |
7083 | else if (fmt[i] == 'E') |
7084 | for (j = XVECLEN (x, i) - 1; j >= 0; j--) | |
79644f06 | 7085 | count_reg_usage (XVECEXP (x, i, j), counts, dest, incr); |
7afe21cc RK |
7086 | } |
7087 | } | |
7088 | \f | |
7089 | /* Scan all the insns and delete any that are dead; i.e., they store a register | |
7090 | that is never used or they copy a register to itself. | |
7091 | ||
c6a26dc4 JL |
7092 | This is used to remove insns made obviously dead by cse, loop or other |
7093 | optimizations. It improves the heuristics in loop since it won't try to | |
7094 | move dead invariants out of loops or make givs for dead quantities. The | |
7095 | remaining passes of the compilation are also sped up. */ | |
7afe21cc RK |
7096 | |
7097 | void | |
c6a26dc4 | 7098 | delete_trivially_dead_insns (insns, nreg) |
7afe21cc RK |
7099 | rtx insns; |
7100 | int nreg; | |
7101 | { | |
4da896b2 | 7102 | int *counts; |
77fa0940 | 7103 | rtx insn, prev; |
51723711 | 7104 | #ifdef HAVE_cc0 |
d45cf215 | 7105 | rtx tem; |
51723711 | 7106 | #endif |
7afe21cc | 7107 | int i; |
614bb5d4 | 7108 | int in_libcall = 0, dead_libcall = 0; |
7afe21cc RK |
7109 | |
7110 | /* First count the number of times each register is used. */ | |
4da896b2 | 7111 | counts = (int *) xcalloc (nreg, sizeof (int)); |
7afe21cc | 7112 | for (insn = next_real_insn (insns); insn; insn = next_real_insn (insn)) |
79644f06 | 7113 | count_reg_usage (insn, counts, NULL_RTX, 1); |
7afe21cc RK |
7114 | |
7115 | /* Go from the last insn to the first and delete insns that only set unused | |
7116 | registers or copy a register to itself. As we delete an insn, remove | |
8d71a510 JL |
7117 | usage counts for registers it uses. |
7118 | ||
7119 | The first jump optimization pass may leave a real insn as the last | |
7120 | insn in the function. We must not skip that insn or we may end | |
7121 | up deleting code that is not really dead. */ | |
7122 | insn = get_last_insn (); | |
7123 | if (GET_RTX_CLASS (GET_CODE (insn)) != 'i') | |
7124 | insn = prev_real_insn (insn); | |
7125 | ||
7126 | for ( ; insn; insn = prev) | |
7afe21cc RK |
7127 | { |
7128 | int live_insn = 0; | |
614bb5d4 | 7129 | rtx note; |
7afe21cc | 7130 | |
77fa0940 RK |
7131 | prev = prev_real_insn (insn); |
7132 | ||
614bb5d4 JL |
7133 | /* Don't delete any insns that are part of a libcall block unless |
7134 | we can delete the whole libcall block. | |
7135 | ||
77fa0940 RK |
7136 | Flow or loop might get confused if we did that. Remember |
7137 | that we are scanning backwards. */ | |
906c4e36 | 7138 | if (find_reg_note (insn, REG_RETVAL, NULL_RTX)) |
614bb5d4 JL |
7139 | { |
7140 | in_libcall = 1; | |
7141 | live_insn = 1; | |
7142 | dead_libcall = 0; | |
e4890d45 | 7143 | |
614bb5d4 JL |
7144 | /* See if there's a REG_EQUAL note on this insn and try to |
7145 | replace the source with the REG_EQUAL expression. | |
7146 | ||
7147 | We assume that insns with REG_RETVALs can only be reg->reg | |
7148 | copies at this point. */ | |
7149 | note = find_reg_note (insn, REG_EQUAL, NULL_RTX); | |
7150 | if (note) | |
7151 | { | |
7152 | rtx set = single_set (insn); | |
0cedb36c JL |
7153 | rtx new = simplify_rtx (XEXP (note, 0)); |
7154 | ||
7155 | if (!new) | |
7156 | new = XEXP (note, 0); | |
7157 | ||
7158 | if (set && validate_change (insn, &SET_SRC (set), new, 0)) | |
614bb5d4 JL |
7159 | { |
7160 | remove_note (insn, | |
7161 | find_reg_note (insn, REG_RETVAL, NULL_RTX)); | |
7162 | dead_libcall = 1; | |
7163 | } | |
7164 | } | |
7165 | } | |
7166 | else if (in_libcall) | |
7167 | live_insn = ! dead_libcall; | |
e4890d45 | 7168 | else if (GET_CODE (PATTERN (insn)) == SET) |
7afe21cc | 7169 | { |
e7a59e04 RH |
7170 | if ((GET_CODE (SET_DEST (PATTERN (insn))) == REG |
7171 | || GET_CODE (SET_DEST (PATTERN (insn))) == SUBREG) | |
7172 | && rtx_equal_p (SET_DEST (PATTERN (insn)), | |
7173 | SET_SRC (PATTERN (insn)))) | |
7afe21cc RK |
7174 | ; |
7175 | ||
d45cf215 RS |
7176 | #ifdef HAVE_cc0 |
7177 | else if (GET_CODE (SET_DEST (PATTERN (insn))) == CC0 | |
7178 | && ! side_effects_p (SET_SRC (PATTERN (insn))) | |
7179 | && ((tem = next_nonnote_insn (insn)) == 0 | |
7180 | || GET_RTX_CLASS (GET_CODE (tem)) != 'i' | |
7181 | || ! reg_referenced_p (cc0_rtx, PATTERN (tem)))) | |
7182 | ; | |
7183 | #endif | |
7afe21cc RK |
7184 | else if (GET_CODE (SET_DEST (PATTERN (insn))) != REG |
7185 | || REGNO (SET_DEST (PATTERN (insn))) < FIRST_PSEUDO_REGISTER | |
7186 | || counts[REGNO (SET_DEST (PATTERN (insn)))] != 0 | |
61c48fbf JL |
7187 | || side_effects_p (SET_SRC (PATTERN (insn))) |
7188 | /* An ADDRESSOF expression can turn into a use of the | |
7189 | internal arg pointer, so always consider the | |
7190 | internal arg pointer live. If it is truly dead, | |
7191 | flow will delete the initializing insn. */ | |
7192 | || (SET_DEST (PATTERN (insn)) | |
7193 | == current_function_internal_arg_pointer)) | |
7afe21cc RK |
7194 | live_insn = 1; |
7195 | } | |
7196 | else if (GET_CODE (PATTERN (insn)) == PARALLEL) | |
7197 | for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--) | |
7198 | { | |
7199 | rtx elt = XVECEXP (PATTERN (insn), 0, i); | |
7200 | ||
7201 | if (GET_CODE (elt) == SET) | |
7202 | { | |
e7a59e04 RH |
7203 | if ((GET_CODE (SET_DEST (elt)) == REG |
7204 | || GET_CODE (SET_DEST (elt)) == SUBREG) | |
7205 | && rtx_equal_p (SET_DEST (elt), SET_SRC (elt))) | |
7afe21cc RK |
7206 | ; |
7207 | ||
d45cf215 RS |
7208 | #ifdef HAVE_cc0 |
7209 | else if (GET_CODE (SET_DEST (elt)) == CC0 | |
7210 | && ! side_effects_p (SET_SRC (elt)) | |
7211 | && ((tem = next_nonnote_insn (insn)) == 0 | |
7212 | || GET_RTX_CLASS (GET_CODE (tem)) != 'i' | |
7213 | || ! reg_referenced_p (cc0_rtx, PATTERN (tem)))) | |
7214 | ; | |
7215 | #endif | |
7afe21cc RK |
7216 | else if (GET_CODE (SET_DEST (elt)) != REG |
7217 | || REGNO (SET_DEST (elt)) < FIRST_PSEUDO_REGISTER | |
7218 | || counts[REGNO (SET_DEST (elt))] != 0 | |
af37f0dd JL |
7219 | || side_effects_p (SET_SRC (elt)) |
7220 | /* An ADDRESSOF expression can turn into a use of the | |
7221 | internal arg pointer, so always consider the | |
7222 | internal arg pointer live. If it is truly dead, | |
7223 | flow will delete the initializing insn. */ | |
7224 | || (SET_DEST (elt) | |
7225 | == current_function_internal_arg_pointer)) | |
7afe21cc RK |
7226 | live_insn = 1; |
7227 | } | |
7228 | else if (GET_CODE (elt) != CLOBBER && GET_CODE (elt) != USE) | |
7229 | live_insn = 1; | |
7230 | } | |
7231 | else | |
7232 | live_insn = 1; | |
7233 | ||
7234 | /* If this is a dead insn, delete it and show registers in it aren't | |
e4890d45 | 7235 | being used. */ |
7afe21cc | 7236 | |
e4890d45 | 7237 | if (! live_insn) |
7afe21cc | 7238 | { |
79644f06 | 7239 | count_reg_usage (insn, counts, NULL_RTX, -1); |
77fa0940 | 7240 | delete_insn (insn); |
7afe21cc | 7241 | } |
e4890d45 | 7242 | |
906c4e36 | 7243 | if (find_reg_note (insn, REG_LIBCALL, NULL_RTX)) |
614bb5d4 JL |
7244 | { |
7245 | in_libcall = 0; | |
7246 | dead_libcall = 0; | |
7247 | } | |
7afe21cc | 7248 | } |
4da896b2 MM |
7249 | |
7250 | /* Clean up. */ | |
7251 | free (counts); | |
7afe21cc | 7252 | } |