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752df20e | 1 | /* Common subexpression elimination for GNU compiler. |
d353bf18 | 2 | Copyright (C) 1987-2015 Free Software Foundation, Inc. |
752df20e | 3 | |
f12b58b3 | 4 | This file is part of GCC. |
752df20e | 5 | |
f12b58b3 | 6 | GCC is free software; you can redistribute it and/or modify it under |
7 | the terms of the GNU General Public License as published by the Free | |
8c4c00c1 | 8 | Software Foundation; either version 3, or (at your option) any later |
f12b58b3 | 9 | version. |
752df20e | 10 | |
f12b58b3 | 11 | GCC is distributed in the hope that it will be useful, but WITHOUT ANY |
12 | WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
13 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
14 | for more details. | |
752df20e | 15 | |
16 | You should have received a copy of the GNU General Public License | |
8c4c00c1 | 17 | along with GCC; see the file COPYING3. If not see |
18 | <http://www.gnu.org/licenses/>. */ | |
752df20e | 19 | |
752df20e | 20 | #include "config.h" |
405711de | 21 | #include "system.h" |
805e22b2 | 22 | #include "coretypes.h" |
23 | #include "tm.h" | |
752df20e | 24 | #include "rtl.h" |
7953c610 | 25 | #include "tm_p.h" |
752df20e | 26 | #include "hard-reg-set.h" |
42fe97ed | 27 | #include "regs.h" |
94ea8568 | 28 | #include "predict.h" |
0a893c29 | 29 | #include "function.h" |
94ea8568 | 30 | #include "dominance.h" |
31 | #include "cfg.h" | |
32 | #include "cfgrtl.h" | |
33 | #include "cfganal.h" | |
34 | #include "cfgcleanup.h" | |
35 | #include "basic-block.h" | |
36 | #include "flags.h" | |
37 | #include "insn-config.h" | |
38 | #include "recog.h" | |
b20a8bb4 | 39 | #include "symtab.h" |
d53441c8 | 40 | #include "alias.h" |
d53441c8 | 41 | #include "tree.h" |
42 | #include "expmed.h" | |
43 | #include "dojump.h" | |
44 | #include "explow.h" | |
45 | #include "calls.h" | |
46 | #include "emit-rtl.h" | |
47 | #include "varasm.h" | |
48 | #include "stmt.h" | |
ad87de1e | 49 | #include "expr.h" |
0b205f4c | 50 | #include "diagnostic-core.h" |
ebd9163c | 51 | #include "toplev.h" |
65e8d683 | 52 | #include "except.h" |
fab7adbf | 53 | #include "target.h" |
38ccff25 | 54 | #include "params.h" |
d263732c | 55 | #include "rtlhooks-def.h" |
77fce4cd | 56 | #include "tree-pass.h" |
3072d30e | 57 | #include "df.h" |
58 | #include "dbgcnt.h" | |
ff17e9ce | 59 | #include "rtl-iter.h" |
752df20e | 60 | |
61 | /* The basic idea of common subexpression elimination is to go | |
62 | through the code, keeping a record of expressions that would | |
63 | have the same value at the current scan point, and replacing | |
64 | expressions encountered with the cheapest equivalent expression. | |
65 | ||
66 | It is too complicated to keep track of the different possibilities | |
c863f0f6 | 67 | when control paths merge in this code; so, at each label, we forget all |
68 | that is known and start fresh. This can be described as processing each | |
69 | extended basic block separately. We have a separate pass to perform | |
70 | global CSE. | |
71 | ||
72 | Note CSE can turn a conditional or computed jump into a nop or | |
73 | an unconditional jump. When this occurs we arrange to run the jump | |
74 | optimizer after CSE to delete the unreachable code. | |
752df20e | 75 | |
76 | We use two data structures to record the equivalent expressions: | |
a7f3b1c7 | 77 | a hash table for most expressions, and a vector of "quantity |
78 | numbers" to record equivalent (pseudo) registers. | |
752df20e | 79 | |
80 | The use of the special data structure for registers is desirable | |
81 | because it is faster. It is possible because registers references | |
82 | contain a fairly small number, the register number, taken from | |
83 | a contiguously allocated series, and two register references are | |
84 | identical if they have the same number. General expressions | |
85 | do not have any such thing, so the only way to retrieve the | |
86 | information recorded on an expression other than a register | |
87 | is to keep it in a hash table. | |
88 | ||
89 | Registers and "quantity numbers": | |
cb10db9d | 90 | |
752df20e | 91 | At the start of each basic block, all of the (hardware and pseudo) |
92 | registers used in the function are given distinct quantity | |
93 | numbers to indicate their contents. During scan, when the code | |
94 | copies one register into another, we copy the quantity number. | |
95 | When a register is loaded in any other way, we allocate a new | |
96 | quantity number to describe the value generated by this operation. | |
96d808c2 | 97 | `REG_QTY (N)' records what quantity register N is currently thought |
752df20e | 98 | of as containing. |
99 | ||
1a5bccce | 100 | All real quantity numbers are greater than or equal to zero. |
96d808c2 | 101 | If register N has not been assigned a quantity, `REG_QTY (N)' will |
1a5bccce | 102 | equal -N - 1, which is always negative. |
752df20e | 103 | |
1a5bccce | 104 | Quantity numbers below zero do not exist and none of the `qty_table' |
105 | entries should be referenced with a negative index. | |
752df20e | 106 | |
107 | We also maintain a bidirectional chain of registers for each | |
a7f3b1c7 | 108 | quantity number. The `qty_table` members `first_reg' and `last_reg', |
109 | and `reg_eqv_table' members `next' and `prev' hold these chains. | |
752df20e | 110 | |
111 | The first register in a chain is the one whose lifespan is least local. | |
112 | Among equals, it is the one that was seen first. | |
113 | We replace any equivalent register with that one. | |
114 | ||
115 | If two registers have the same quantity number, it must be true that | |
a7f3b1c7 | 116 | REG expressions with qty_table `mode' must be in the hash table for both |
752df20e | 117 | registers and must be in the same class. |
118 | ||
119 | The converse is not true. Since hard registers may be referenced in | |
120 | any mode, two REG expressions might be equivalent in the hash table | |
121 | but not have the same quantity number if the quantity number of one | |
122 | of the registers is not the same mode as those expressions. | |
cb10db9d | 123 | |
752df20e | 124 | Constants and quantity numbers |
125 | ||
126 | When a quantity has a known constant value, that value is stored | |
a7f3b1c7 | 127 | in the appropriate qty_table `const_rtx'. This is in addition to |
752df20e | 128 | putting the constant in the hash table as is usual for non-regs. |
129 | ||
f9e15121 | 130 | Whether a reg or a constant is preferred is determined by the configuration |
752df20e | 131 | macro CONST_COSTS and will often depend on the constant value. In any |
132 | event, expressions containing constants can be simplified, by fold_rtx. | |
133 | ||
134 | When a quantity has a known nearly constant value (such as an address | |
a7f3b1c7 | 135 | of a stack slot), that value is stored in the appropriate qty_table |
136 | `const_rtx'. | |
752df20e | 137 | |
138 | Integer constants don't have a machine mode. However, cse | |
139 | determines the intended machine mode from the destination | |
140 | of the instruction that moves the constant. The machine mode | |
141 | is recorded in the hash table along with the actual RTL | |
142 | constant expression so that different modes are kept separate. | |
143 | ||
144 | Other expressions: | |
145 | ||
146 | To record known equivalences among expressions in general | |
147 | we use a hash table called `table'. It has a fixed number of buckets | |
148 | that contain chains of `struct table_elt' elements for expressions. | |
149 | These chains connect the elements whose expressions have the same | |
150 | hash codes. | |
151 | ||
152 | Other chains through the same elements connect the elements which | |
153 | currently have equivalent values. | |
154 | ||
155 | Register references in an expression are canonicalized before hashing | |
a7f3b1c7 | 156 | the expression. This is done using `reg_qty' and qty_table `first_reg'. |
752df20e | 157 | The hash code of a register reference is computed using the quantity |
158 | number, not the register number. | |
159 | ||
160 | When the value of an expression changes, it is necessary to remove from the | |
161 | hash table not just that expression but all expressions whose values | |
162 | could be different as a result. | |
163 | ||
164 | 1. If the value changing is in memory, except in special cases | |
165 | ANYTHING referring to memory could be changed. That is because | |
166 | nobody knows where a pointer does not point. | |
167 | The function `invalidate_memory' removes what is necessary. | |
168 | ||
169 | The special cases are when the address is constant or is | |
170 | a constant plus a fixed register such as the frame pointer | |
171 | or a static chain pointer. When such addresses are stored in, | |
172 | we can tell exactly which other such addresses must be invalidated | |
173 | due to overlap. `invalidate' does this. | |
174 | All expressions that refer to non-constant | |
175 | memory addresses are also invalidated. `invalidate_memory' does this. | |
176 | ||
177 | 2. If the value changing is a register, all expressions | |
178 | containing references to that register, and only those, | |
179 | must be removed. | |
180 | ||
181 | Because searching the entire hash table for expressions that contain | |
182 | a register is very slow, we try to figure out when it isn't necessary. | |
183 | Precisely, this is necessary only when expressions have been | |
184 | entered in the hash table using this register, and then the value has | |
185 | changed, and then another expression wants to be added to refer to | |
186 | the register's new value. This sequence of circumstances is rare | |
187 | within any one basic block. | |
188 | ||
96d808c2 | 189 | `REG_TICK' and `REG_IN_TABLE', accessors for members of |
190 | cse_reg_info, are used to detect this case. REG_TICK (i) is | |
191 | incremented whenever a value is stored in register i. | |
192 | REG_IN_TABLE (i) holds -1 if no references to register i have been | |
193 | entered in the table; otherwise, it contains the value REG_TICK (i) | |
194 | had when the references were entered. If we want to enter a | |
195 | reference and REG_IN_TABLE (i) != REG_TICK (i), we must scan and | |
196 | remove old references. Until we want to enter a new entry, the | |
197 | mere fact that the two vectors don't match makes the entries be | |
198 | ignored if anyone tries to match them. | |
752df20e | 199 | |
200 | Registers themselves are entered in the hash table as well as in | |
96d808c2 | 201 | the equivalent-register chains. However, `REG_TICK' and |
202 | `REG_IN_TABLE' do not apply to expressions which are simple | |
752df20e | 203 | register references. These expressions are removed from the table |
204 | immediately when they become invalid, and this can be done even if | |
205 | we do not immediately search for all the expressions that refer to | |
206 | the register. | |
207 | ||
208 | A CLOBBER rtx in an instruction invalidates its operand for further | |
209 | reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK | |
210 | invalidates everything that resides in memory. | |
211 | ||
212 | Related expressions: | |
213 | ||
214 | Constant expressions that differ only by an additive integer | |
215 | are called related. When a constant expression is put in | |
216 | the table, the related expression with no constant term | |
217 | is also entered. These are made to point at each other | |
218 | so that it is possible to find out if there exists any | |
219 | register equivalent to an expression related to a given expression. */ | |
cb10db9d | 220 | |
a7f3b1c7 | 221 | /* Length of qty_table vector. We know in advance we will not need |
222 | a quantity number this big. */ | |
752df20e | 223 | |
224 | static int max_qty; | |
225 | ||
226 | /* Next quantity number to be allocated. | |
227 | This is 1 + the largest number needed so far. */ | |
228 | ||
229 | static int next_qty; | |
230 | ||
a7f3b1c7 | 231 | /* Per-qty information tracking. |
752df20e | 232 | |
a7f3b1c7 | 233 | `first_reg' and `last_reg' track the head and tail of the |
234 | chain of registers which currently contain this quantity. | |
752df20e | 235 | |
a7f3b1c7 | 236 | `mode' contains the machine mode of this quantity. |
752df20e | 237 | |
a7f3b1c7 | 238 | `const_rtx' holds the rtx of the constant value of this |
239 | quantity, if known. A summations of the frame/arg pointer | |
240 | and a constant can also be entered here. When this holds | |
241 | a known value, `const_insn' is the insn which stored the | |
242 | constant value. | |
752df20e | 243 | |
a7f3b1c7 | 244 | `comparison_{code,const,qty}' are used to track when a |
245 | comparison between a quantity and some constant or register has | |
246 | been passed. In such a case, we know the results of the comparison | |
247 | in case we see it again. These members record a comparison that | |
248 | is known to be true. `comparison_code' holds the rtx code of such | |
249 | a comparison, else it is set to UNKNOWN and the other two | |
250 | comparison members are undefined. `comparison_const' holds | |
251 | the constant being compared against, or zero if the comparison | |
252 | is not against a constant. `comparison_qty' holds the quantity | |
253 | being compared against when the result is known. If the comparison | |
254 | is not with a register, `comparison_qty' is -1. */ | |
752df20e | 255 | |
a7f3b1c7 | 256 | struct qty_table_elem |
257 | { | |
258 | rtx const_rtx; | |
47f1d198 | 259 | rtx_insn *const_insn; |
a7f3b1c7 | 260 | rtx comparison_const; |
261 | int comparison_qty; | |
02e7a332 | 262 | unsigned int first_reg, last_reg; |
d8b9732d | 263 | /* The sizes of these fields should match the sizes of the |
264 | code and mode fields of struct rtx_def (see rtl.h). */ | |
265 | ENUM_BITFIELD(rtx_code) comparison_code : 16; | |
266 | ENUM_BITFIELD(machine_mode) mode : 8; | |
a7f3b1c7 | 267 | }; |
752df20e | 268 | |
a7f3b1c7 | 269 | /* The table of all qtys, indexed by qty number. */ |
270 | static struct qty_table_elem *qty_table; | |
752df20e | 271 | |
752df20e | 272 | /* For machines that have a CC0, we do not record its value in the hash |
273 | table since its use is guaranteed to be the insn immediately following | |
274 | its definition and any other insn is presumed to invalidate it. | |
275 | ||
c6ddfc69 | 276 | Instead, we store below the current and last value assigned to CC0. |
277 | If it should happen to be a constant, it is stored in preference | |
278 | to the actual assigned value. In case it is a constant, we store | |
279 | the mode in which the constant should be interpreted. */ | |
752df20e | 280 | |
c6ddfc69 | 281 | static rtx this_insn_cc0, prev_insn_cc0; |
3754d046 | 282 | static machine_mode this_insn_cc0_mode, prev_insn_cc0_mode; |
752df20e | 283 | |
284 | /* Insn being scanned. */ | |
285 | ||
47f1d198 | 286 | static rtx_insn *this_insn; |
f529eb25 | 287 | static bool optimize_this_for_speed_p; |
752df20e | 288 | |
2a384a22 | 289 | /* Index by register number, gives the number of the next (or |
290 | previous) register in the chain of registers sharing the same | |
752df20e | 291 | value. |
292 | ||
293 | Or -1 if this register is at the end of the chain. | |
294 | ||
96d808c2 | 295 | If REG_QTY (N) == -N - 1, reg_eqv_table[N].next is undefined. */ |
a7f3b1c7 | 296 | |
297 | /* Per-register equivalence chain. */ | |
298 | struct reg_eqv_elem | |
299 | { | |
300 | int next, prev; | |
301 | }; | |
752df20e | 302 | |
a7f3b1c7 | 303 | /* The table of all register equivalence chains. */ |
304 | static struct reg_eqv_elem *reg_eqv_table; | |
752df20e | 305 | |
155b05dc | 306 | struct cse_reg_info |
307 | { | |
3bd20490 | 308 | /* The timestamp at which this register is initialized. */ |
309 | unsigned int timestamp; | |
9c4f3716 | 310 | |
311 | /* The quantity number of the register's current contents. */ | |
312 | int reg_qty; | |
313 | ||
314 | /* The number of times the register has been altered in the current | |
315 | basic block. */ | |
316 | int reg_tick; | |
317 | ||
d1264606 | 318 | /* The REG_TICK value at which rtx's containing this register are |
319 | valid in the hash table. If this does not equal the current | |
320 | reg_tick value, such expressions existing in the hash table are | |
321 | invalid. */ | |
322 | int reg_in_table; | |
126fb012 | 323 | |
324 | /* The SUBREG that was set when REG_TICK was last incremented. Set | |
325 | to -1 if the last store was to the whole register, not a subreg. */ | |
70e488ba | 326 | unsigned int subreg_ticked; |
d1264606 | 327 | }; |
752df20e | 328 | |
3bd20490 | 329 | /* A table of cse_reg_info indexed by register numbers. */ |
f9413025 | 330 | static struct cse_reg_info *cse_reg_info_table; |
ac613367 | 331 | |
3bd20490 | 332 | /* The size of the above table. */ |
333 | static unsigned int cse_reg_info_table_size; | |
9c4f3716 | 334 | |
3bd20490 | 335 | /* The index of the first entry that has not been initialized. */ |
336 | static unsigned int cse_reg_info_table_first_uninitialized; | |
752df20e | 337 | |
3bd20490 | 338 | /* The timestamp at the beginning of the current run of |
be22716f | 339 | cse_extended_basic_block. We increment this variable at the beginning of |
340 | the current run of cse_extended_basic_block. The timestamp field of a | |
3bd20490 | 341 | cse_reg_info entry matches the value of this variable if and only |
342 | if the entry has been initialized during the current run of | |
be22716f | 343 | cse_extended_basic_block. */ |
3bd20490 | 344 | static unsigned int cse_reg_info_timestamp; |
752df20e | 345 | |
cb10db9d | 346 | /* A HARD_REG_SET containing all the hard registers for which there is |
752df20e | 347 | currently a REG expression in the hash table. Note the difference |
348 | from the above variables, which indicate if the REG is mentioned in some | |
349 | expression in the table. */ | |
350 | ||
351 | static HARD_REG_SET hard_regs_in_table; | |
352 | ||
283a6b26 | 353 | /* True if CSE has altered the CFG. */ |
354 | static bool cse_cfg_altered; | |
752df20e | 355 | |
283a6b26 | 356 | /* True if CSE has altered conditional jump insns in such a way |
357 | that jump optimization should be redone. */ | |
358 | static bool cse_jumps_altered; | |
752df20e | 359 | |
283a6b26 | 360 | /* True if we put a LABEL_REF into the hash table for an INSN |
361 | without a REG_LABEL_OPERAND, we have to rerun jump after CSE | |
362 | to put in the note. */ | |
363 | static bool recorded_label_ref; | |
26db0da8 | 364 | |
752df20e | 365 | /* canon_hash stores 1 in do_not_record |
366 | if it notices a reference to CC0, PC, or some other volatile | |
367 | subexpression. */ | |
368 | ||
369 | static int do_not_record; | |
370 | ||
371 | /* canon_hash stores 1 in hash_arg_in_memory | |
372 | if it notices a reference to memory within the expression being hashed. */ | |
373 | ||
374 | static int hash_arg_in_memory; | |
375 | ||
752df20e | 376 | /* The hash table contains buckets which are chains of `struct table_elt's, |
377 | each recording one expression's information. | |
378 | That expression is in the `exp' field. | |
379 | ||
7cfb9bcf | 380 | The canon_exp field contains a canonical (from the point of view of |
381 | alias analysis) version of the `exp' field. | |
382 | ||
752df20e | 383 | Those elements with the same hash code are chained in both directions |
384 | through the `next_same_hash' and `prev_same_hash' fields. | |
385 | ||
386 | Each set of expressions with equivalent values | |
387 | are on a two-way chain through the `next_same_value' | |
388 | and `prev_same_value' fields, and all point with | |
389 | the `first_same_value' field at the first element in | |
390 | that chain. The chain is in order of increasing cost. | |
391 | Each element's cost value is in its `cost' field. | |
392 | ||
393 | The `in_memory' field is nonzero for elements that | |
394 | involve any reference to memory. These elements are removed | |
395 | whenever a write is done to an unidentified location in memory. | |
396 | To be safe, we assume that a memory address is unidentified unless | |
397 | the address is either a symbol constant or a constant plus | |
398 | the frame pointer or argument pointer. | |
399 | ||
752df20e | 400 | The `related_value' field is used to connect related expressions |
401 | (that differ by adding an integer). | |
402 | The related expressions are chained in a circular fashion. | |
403 | `related_value' is zero for expressions for which this | |
404 | chain is not useful. | |
405 | ||
406 | The `cost' field stores the cost of this element's expression. | |
d27eb4b1 | 407 | The `regcost' field stores the value returned by approx_reg_cost for |
408 | this element's expression. | |
752df20e | 409 | |
410 | The `is_const' flag is set if the element is a constant (including | |
411 | a fixed address). | |
412 | ||
413 | The `flag' field is used as a temporary during some search routines. | |
414 | ||
415 | The `mode' field is usually the same as GET_MODE (`exp'), but | |
416 | if `exp' is a CONST_INT and has no machine mode then the `mode' | |
417 | field is the mode it was being used as. Each constant is | |
418 | recorded separately for each mode it is used with. */ | |
419 | ||
752df20e | 420 | struct table_elt |
421 | { | |
422 | rtx exp; | |
7cfb9bcf | 423 | rtx canon_exp; |
752df20e | 424 | struct table_elt *next_same_hash; |
425 | struct table_elt *prev_same_hash; | |
426 | struct table_elt *next_same_value; | |
427 | struct table_elt *prev_same_value; | |
428 | struct table_elt *first_same_value; | |
429 | struct table_elt *related_value; | |
430 | int cost; | |
d27eb4b1 | 431 | int regcost; |
d8b9732d | 432 | /* The size of this field should match the size |
433 | of the mode field of struct rtx_def (see rtl.h). */ | |
434 | ENUM_BITFIELD(machine_mode) mode : 8; | |
752df20e | 435 | char in_memory; |
752df20e | 436 | char is_const; |
437 | char flag; | |
438 | }; | |
439 | ||
752df20e | 440 | /* We don't want a lot of buckets, because we rarely have very many |
441 | things stored in the hash table, and a lot of buckets slows | |
442 | down a lot of loops that happen frequently. */ | |
9c4f3716 | 443 | #define HASH_SHIFT 5 |
444 | #define HASH_SIZE (1 << HASH_SHIFT) | |
445 | #define HASH_MASK (HASH_SIZE - 1) | |
752df20e | 446 | |
447 | /* Compute hash code of X in mode M. Special-case case where X is a pseudo | |
448 | register (hard registers may require `do_not_record' to be set). */ | |
449 | ||
450 | #define HASH(X, M) \ | |
8ad4c111 | 451 | ((REG_P (X) && REGNO (X) >= FIRST_PSEUDO_REGISTER \ |
9c4f3716 | 452 | ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \ |
453 | : canon_hash (X, M)) & HASH_MASK) | |
752df20e | 454 | |
78d140c9 | 455 | /* Like HASH, but without side-effects. */ |
456 | #define SAFE_HASH(X, M) \ | |
457 | ((REG_P (X) && REGNO (X) >= FIRST_PSEUDO_REGISTER \ | |
458 | ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \ | |
459 | : safe_hash (X, M)) & HASH_MASK) | |
460 | ||
d27eb4b1 | 461 | /* Determine whether register number N is considered a fixed register for the |
462 | purpose of approximating register costs. | |
752df20e | 463 | It is desirable to replace other regs with fixed regs, to reduce need for |
464 | non-fixed hard regs. | |
349858d4 | 465 | A reg wins if it is either the frame pointer or designated as fixed. */ |
752df20e | 466 | #define FIXED_REGNO_P(N) \ |
b69007e1 | 467 | ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \ |
4313a67c | 468 | || fixed_regs[N] || global_regs[N]) |
752df20e | 469 | |
470 | /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed | |
2e16c7bd | 471 | hard registers and pointers into the frame are the cheapest with a cost |
472 | of 0. Next come pseudos with a cost of one and other hard registers with | |
473 | a cost of 2. Aside from these special cases, call `rtx_cost'. */ | |
474 | ||
5bbaf5ca | 475 | #define CHEAP_REGNO(N) \ |
9af5ce0c | 476 | (REGNO_PTR_FRAME_P (N) \ |
5bbaf5ca | 477 | || (HARD_REGISTER_NUM_P (N) \ |
c0191571 | 478 | && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS)) |
752df20e | 479 | |
20d892d1 | 480 | #define COST(X) (REG_P (X) ? 0 : notreg_cost (X, SET, 1)) |
481 | #define COST_IN(X, OUTER, OPNO) (REG_P (X) ? 0 : notreg_cost (X, OUTER, OPNO)) | |
752df20e | 482 | |
d1264606 | 483 | /* Get the number of times this register has been updated in this |
484 | basic block. */ | |
485 | ||
3bd20490 | 486 | #define REG_TICK(N) (get_cse_reg_info (N)->reg_tick) |
d1264606 | 487 | |
488 | /* Get the point at which REG was recorded in the table. */ | |
489 | ||
3bd20490 | 490 | #define REG_IN_TABLE(N) (get_cse_reg_info (N)->reg_in_table) |
d1264606 | 491 | |
126fb012 | 492 | /* Get the SUBREG set at the last increment to REG_TICK (-1 if not a |
493 | SUBREG). */ | |
494 | ||
3bd20490 | 495 | #define SUBREG_TICKED(N) (get_cse_reg_info (N)->subreg_ticked) |
126fb012 | 496 | |
d1264606 | 497 | /* Get the quantity number for REG. */ |
498 | ||
3bd20490 | 499 | #define REG_QTY(N) (get_cse_reg_info (N)->reg_qty) |
d1264606 | 500 | |
752df20e | 501 | /* Determine if the quantity number for register X represents a valid index |
a7f3b1c7 | 502 | into the qty_table. */ |
752df20e | 503 | |
1a5bccce | 504 | #define REGNO_QTY_VALID_P(N) (REG_QTY (N) >= 0) |
752df20e | 505 | |
01c8e4c9 | 506 | /* Compare table_elt X and Y and return true iff X is cheaper than Y. */ |
507 | ||
508 | #define CHEAPER(X, Y) \ | |
509 | (preferable ((X)->cost, (X)->regcost, (Y)->cost, (Y)->regcost) < 0) | |
510 | ||
9c4f3716 | 511 | static struct table_elt *table[HASH_SIZE]; |
752df20e | 512 | |
513 | /* Chain of `struct table_elt's made so far for this function | |
514 | but currently removed from the table. */ | |
515 | ||
516 | static struct table_elt *free_element_chain; | |
517 | ||
752df20e | 518 | /* Set to the cost of a constant pool reference if one was found for a |
519 | symbolic constant. If this was found, it means we should try to | |
520 | convert constants into constant pool entries if they don't fit in | |
521 | the insn. */ | |
522 | ||
523 | static int constant_pool_entries_cost; | |
634d45d7 | 524 | static int constant_pool_entries_regcost; |
752df20e | 525 | |
0b09525f | 526 | /* Trace a patch through the CFG. */ |
527 | ||
528 | struct branch_path | |
529 | { | |
530 | /* The basic block for this path entry. */ | |
531 | basic_block bb; | |
532 | }; | |
533 | ||
be22716f | 534 | /* This data describes a block that will be processed by |
535 | cse_extended_basic_block. */ | |
9def8c3e | 536 | |
155b05dc | 537 | struct cse_basic_block_data |
538 | { | |
9def8c3e | 539 | /* Total number of SETs in block. */ |
540 | int nsets; | |
9def8c3e | 541 | /* Size of current branch path, if any. */ |
542 | int path_size; | |
be22716f | 543 | /* Current path, indicating which basic_blocks will be processed. */ |
0b09525f | 544 | struct branch_path *path; |
9def8c3e | 545 | }; |
546 | ||
3072d30e | 547 | |
548 | /* Pointers to the live in/live out bitmaps for the boundaries of the | |
549 | current EBB. */ | |
550 | static bitmap cse_ebb_live_in, cse_ebb_live_out; | |
551 | ||
be22716f | 552 | /* A simple bitmap to track which basic blocks have been visited |
553 | already as part of an already processed extended basic block. */ | |
554 | static sbitmap cse_visited_basic_blocks; | |
555 | ||
8ec3a57b | 556 | static bool fixed_base_plus_p (rtx x); |
20d892d1 | 557 | static int notreg_cost (rtx, enum rtx_code, int); |
069eea26 | 558 | static int preferable (int, int, int, int); |
8ec3a57b | 559 | static void new_basic_block (void); |
3754d046 | 560 | static void make_new_qty (unsigned int, machine_mode); |
8ec3a57b | 561 | static void make_regs_eqv (unsigned int, unsigned int); |
562 | static void delete_reg_equiv (unsigned int); | |
563 | static int mention_regs (rtx); | |
564 | static int insert_regs (rtx, struct table_elt *, int); | |
565 | static void remove_from_table (struct table_elt *, unsigned); | |
d2c970fe | 566 | static void remove_pseudo_from_table (rtx, unsigned); |
3754d046 | 567 | static struct table_elt *lookup (rtx, unsigned, machine_mode); |
568 | static struct table_elt *lookup_for_remove (rtx, unsigned, machine_mode); | |
8ec3a57b | 569 | static rtx lookup_as_function (rtx, enum rtx_code); |
01c8e4c9 | 570 | static struct table_elt *insert_with_costs (rtx, struct table_elt *, unsigned, |
3754d046 | 571 | machine_mode, int, int); |
8ec3a57b | 572 | static struct table_elt *insert (rtx, struct table_elt *, unsigned, |
3754d046 | 573 | machine_mode); |
8ec3a57b | 574 | static void merge_equiv_classes (struct table_elt *, struct table_elt *); |
3754d046 | 575 | static void invalidate (rtx, machine_mode); |
8ec3a57b | 576 | static void remove_invalid_refs (unsigned int); |
577 | static void remove_invalid_subreg_refs (unsigned int, unsigned int, | |
3754d046 | 578 | machine_mode); |
8ec3a57b | 579 | static void rehash_using_reg (rtx); |
580 | static void invalidate_memory (void); | |
581 | static void invalidate_for_call (void); | |
582 | static rtx use_related_value (rtx, struct table_elt *); | |
78d140c9 | 583 | |
3754d046 | 584 | static inline unsigned canon_hash (rtx, machine_mode); |
585 | static inline unsigned safe_hash (rtx, machine_mode); | |
e1ab7874 | 586 | static inline unsigned hash_rtx_string (const char *); |
78d140c9 | 587 | |
47f1d198 | 588 | static rtx canon_reg (rtx, rtx_insn *); |
8ec3a57b | 589 | static enum rtx_code find_comparison_args (enum rtx_code, rtx *, rtx *, |
3754d046 | 590 | machine_mode *, |
591 | machine_mode *); | |
47f1d198 | 592 | static rtx fold_rtx (rtx, rtx_insn *); |
8ec3a57b | 593 | static rtx equiv_constant (rtx); |
47f1d198 | 594 | static void record_jump_equiv (rtx_insn *, bool); |
3754d046 | 595 | static void record_jump_cond (enum rtx_code, machine_mode, rtx, rtx, |
8ec3a57b | 596 | int); |
47f1d198 | 597 | static void cse_insn (rtx_insn *); |
be22716f | 598 | static void cse_prescan_path (struct cse_basic_block_data *); |
47f1d198 | 599 | static void invalidate_from_clobbers (rtx_insn *); |
600 | static void invalidate_from_sets_and_clobbers (rtx_insn *); | |
3072d30e | 601 | static rtx cse_process_notes (rtx, rtx, bool *); |
be22716f | 602 | static void cse_extended_basic_block (struct cse_basic_block_data *); |
8ec3a57b | 603 | extern void dump_class (struct table_elt*); |
3bd20490 | 604 | static void get_cse_reg_info_1 (unsigned int regno); |
605 | static struct cse_reg_info * get_cse_reg_info (unsigned int regno); | |
8ec3a57b | 606 | |
607 | static void flush_hash_table (void); | |
47f1d198 | 608 | static bool insn_live_p (rtx_insn *, int *); |
609 | static bool set_live_p (rtx, rtx_insn *, int *); | |
47f1d198 | 610 | static void cse_change_cc_mode_insn (rtx_insn *, rtx); |
611 | static void cse_change_cc_mode_insns (rtx_insn *, rtx_insn *, rtx); | |
3754d046 | 612 | static machine_mode cse_cc_succs (basic_block, basic_block, rtx, rtx, |
650d2134 | 613 | bool); |
752df20e | 614 | \f |
d263732c | 615 | |
616 | #undef RTL_HOOKS_GEN_LOWPART | |
617 | #define RTL_HOOKS_GEN_LOWPART gen_lowpart_if_possible | |
618 | ||
619 | static const struct rtl_hooks cse_rtl_hooks = RTL_HOOKS_INITIALIZER; | |
620 | \f | |
ea1760a3 | 621 | /* Nonzero if X has the form (PLUS frame-pointer integer). */ |
805e22b2 | 622 | |
623 | static bool | |
8ec3a57b | 624 | fixed_base_plus_p (rtx x) |
805e22b2 | 625 | { |
626 | switch (GET_CODE (x)) | |
627 | { | |
628 | case REG: | |
629 | if (x == frame_pointer_rtx || x == hard_frame_pointer_rtx) | |
630 | return true; | |
631 | if (x == arg_pointer_rtx && fixed_regs[ARG_POINTER_REGNUM]) | |
632 | return true; | |
805e22b2 | 633 | return false; |
634 | ||
635 | case PLUS: | |
971ba038 | 636 | if (!CONST_INT_P (XEXP (x, 1))) |
805e22b2 | 637 | return false; |
638 | return fixed_base_plus_p (XEXP (x, 0)); | |
639 | ||
805e22b2 | 640 | default: |
641 | return false; | |
642 | } | |
643 | } | |
644 | ||
59241190 | 645 | /* Dump the expressions in the equivalence class indicated by CLASSP. |
646 | This function is used only for debugging. */ | |
d2bb3f9d | 647 | DEBUG_FUNCTION void |
8ec3a57b | 648 | dump_class (struct table_elt *classp) |
59241190 | 649 | { |
650 | struct table_elt *elt; | |
651 | ||
652 | fprintf (stderr, "Equivalence chain for "); | |
653 | print_rtl (stderr, classp->exp); | |
654 | fprintf (stderr, ": \n"); | |
cb10db9d | 655 | |
59241190 | 656 | for (elt = classp->first_same_value; elt; elt = elt->next_same_value) |
657 | { | |
658 | print_rtl (stderr, elt->exp); | |
659 | fprintf (stderr, "\n"); | |
660 | } | |
661 | } | |
662 | ||
ff17e9ce | 663 | /* Return an estimate of the cost of the registers used in an rtx. |
664 | This is mostly the number of different REG expressions in the rtx; | |
665 | however for some exceptions like fixed registers we use a cost of | |
666 | 0. If any other hard register reference occurs, return MAX_COST. */ | |
37b8a8d6 | 667 | |
d27eb4b1 | 668 | static int |
ff17e9ce | 669 | approx_reg_cost (const_rtx x) |
d27eb4b1 | 670 | { |
ff17e9ce | 671 | int cost = 0; |
672 | subrtx_iterator::array_type array; | |
673 | FOR_EACH_SUBRTX (iter, array, x, NONCONST) | |
88bc3f54 | 674 | { |
ff17e9ce | 675 | const_rtx x = *iter; |
676 | if (REG_P (x)) | |
88bc3f54 | 677 | { |
ff17e9ce | 678 | unsigned int regno = REGNO (x); |
679 | if (!CHEAP_REGNO (regno)) | |
88bc3f54 | 680 | { |
ff17e9ce | 681 | if (regno < FIRST_PSEUDO_REGISTER) |
682 | { | |
683 | if (targetm.small_register_classes_for_mode_p (GET_MODE (x))) | |
684 | return MAX_COST; | |
685 | cost += 2; | |
686 | } | |
687 | else | |
688 | cost += 1; | |
88bc3f54 | 689 | } |
88bc3f54 | 690 | } |
691 | } | |
88bc3f54 | 692 | return cost; |
d27eb4b1 | 693 | } |
694 | ||
695 | /* Return a negative value if an rtx A, whose costs are given by COST_A | |
696 | and REGCOST_A, is more desirable than an rtx B. | |
697 | Return a positive value if A is less desirable, or 0 if the two are | |
698 | equally good. */ | |
699 | static int | |
069eea26 | 700 | preferable (int cost_a, int regcost_a, int cost_b, int regcost_b) |
d27eb4b1 | 701 | { |
e61c498c | 702 | /* First, get rid of cases involving expressions that are entirely |
589ff9e7 | 703 | unwanted. */ |
704 | if (cost_a != cost_b) | |
705 | { | |
706 | if (cost_a == MAX_COST) | |
707 | return 1; | |
708 | if (cost_b == MAX_COST) | |
709 | return -1; | |
710 | } | |
711 | ||
712 | /* Avoid extending lifetimes of hardregs. */ | |
713 | if (regcost_a != regcost_b) | |
714 | { | |
715 | if (regcost_a == MAX_COST) | |
716 | return 1; | |
717 | if (regcost_b == MAX_COST) | |
718 | return -1; | |
719 | } | |
720 | ||
721 | /* Normal operation costs take precedence. */ | |
d27eb4b1 | 722 | if (cost_a != cost_b) |
723 | return cost_a - cost_b; | |
589ff9e7 | 724 | /* Only if these are identical consider effects on register pressure. */ |
d27eb4b1 | 725 | if (regcost_a != regcost_b) |
726 | return regcost_a - regcost_b; | |
727 | return 0; | |
728 | } | |
729 | ||
de164820 | 730 | /* Internal function, to compute cost when X is not a register; called |
731 | from COST macro to keep it simple. */ | |
732 | ||
733 | static int | |
20d892d1 | 734 | notreg_cost (rtx x, enum rtx_code outer, int opno) |
de164820 | 735 | { |
736 | return ((GET_CODE (x) == SUBREG | |
8ad4c111 | 737 | && REG_P (SUBREG_REG (x)) |
de164820 | 738 | && GET_MODE_CLASS (GET_MODE (x)) == MODE_INT |
739 | && GET_MODE_CLASS (GET_MODE (SUBREG_REG (x))) == MODE_INT | |
740 | && (GET_MODE_SIZE (GET_MODE (x)) | |
741 | < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))) | |
742 | && subreg_lowpart_p (x) | |
396f2130 | 743 | && TRULY_NOOP_TRUNCATION_MODES_P (GET_MODE (x), |
744 | GET_MODE (SUBREG_REG (x)))) | |
d27eb4b1 | 745 | ? 0 |
20d892d1 | 746 | : rtx_cost (x, outer, opno, optimize_this_for_speed_p) * 2); |
de164820 | 747 | } |
748 | ||
cf495191 | 749 | \f |
3bd20490 | 750 | /* Initialize CSE_REG_INFO_TABLE. */ |
9c4f3716 | 751 | |
3bd20490 | 752 | static void |
753 | init_cse_reg_info (unsigned int nregs) | |
754 | { | |
755 | /* Do we need to grow the table? */ | |
756 | if (nregs > cse_reg_info_table_size) | |
d1264606 | 757 | { |
3bd20490 | 758 | unsigned int new_size; |
759 | ||
760 | if (cse_reg_info_table_size < 2048) | |
d1264606 | 761 | { |
3bd20490 | 762 | /* Compute a new size that is a power of 2 and no smaller |
763 | than the large of NREGS and 64. */ | |
764 | new_size = (cse_reg_info_table_size | |
765 | ? cse_reg_info_table_size : 64); | |
766 | ||
767 | while (new_size < nregs) | |
768 | new_size *= 2; | |
d1264606 | 769 | } |
770 | else | |
926f1f1f | 771 | { |
3bd20490 | 772 | /* If we need a big table, allocate just enough to hold |
773 | NREGS registers. */ | |
774 | new_size = nregs; | |
926f1f1f | 775 | } |
9c4f3716 | 776 | |
3bd20490 | 777 | /* Reallocate the table with NEW_SIZE entries. */ |
dd045aee | 778 | free (cse_reg_info_table); |
4c36ffe6 | 779 | cse_reg_info_table = XNEWVEC (struct cse_reg_info, new_size); |
3bd20490 | 780 | cse_reg_info_table_size = new_size; |
bee2651c | 781 | cse_reg_info_table_first_uninitialized = 0; |
3bd20490 | 782 | } |
783 | ||
784 | /* Do we have all of the first NREGS entries initialized? */ | |
785 | if (cse_reg_info_table_first_uninitialized < nregs) | |
786 | { | |
787 | unsigned int old_timestamp = cse_reg_info_timestamp - 1; | |
788 | unsigned int i; | |
789 | ||
790 | /* Put the old timestamp on newly allocated entries so that they | |
791 | will all be considered out of date. We do not touch those | |
792 | entries beyond the first NREGS entries to be nice to the | |
793 | virtual memory. */ | |
794 | for (i = cse_reg_info_table_first_uninitialized; i < nregs; i++) | |
795 | cse_reg_info_table[i].timestamp = old_timestamp; | |
d1264606 | 796 | |
3bd20490 | 797 | cse_reg_info_table_first_uninitialized = nregs; |
d1264606 | 798 | } |
3bd20490 | 799 | } |
800 | ||
b5ee2efd | 801 | /* Given REGNO, initialize the cse_reg_info entry for REGNO. */ |
3bd20490 | 802 | |
803 | static void | |
804 | get_cse_reg_info_1 (unsigned int regno) | |
805 | { | |
806 | /* Set TIMESTAMP field to CSE_REG_INFO_TIMESTAMP so that this | |
807 | entry will be considered to have been initialized. */ | |
808 | cse_reg_info_table[regno].timestamp = cse_reg_info_timestamp; | |
809 | ||
810 | /* Initialize the rest of the entry. */ | |
811 | cse_reg_info_table[regno].reg_tick = 1; | |
812 | cse_reg_info_table[regno].reg_in_table = -1; | |
813 | cse_reg_info_table[regno].subreg_ticked = -1; | |
814 | cse_reg_info_table[regno].reg_qty = -regno - 1; | |
815 | } | |
816 | ||
817 | /* Find a cse_reg_info entry for REGNO. */ | |
d1264606 | 818 | |
3bd20490 | 819 | static inline struct cse_reg_info * |
820 | get_cse_reg_info (unsigned int regno) | |
821 | { | |
822 | struct cse_reg_info *p = &cse_reg_info_table[regno]; | |
823 | ||
e02a4f0d | 824 | /* If this entry has not been initialized, go ahead and initialize |
825 | it. */ | |
3bd20490 | 826 | if (p->timestamp != cse_reg_info_timestamp) |
827 | get_cse_reg_info_1 (regno); | |
d1264606 | 828 | |
9c4f3716 | 829 | return p; |
d1264606 | 830 | } |
831 | ||
752df20e | 832 | /* Clear the hash table and initialize each register with its own quantity, |
833 | for a new basic block. */ | |
834 | ||
835 | static void | |
8ec3a57b | 836 | new_basic_block (void) |
752df20e | 837 | { |
19cb6b50 | 838 | int i; |
752df20e | 839 | |
1a5bccce | 840 | next_qty = 0; |
752df20e | 841 | |
b5ee2efd | 842 | /* Invalidate cse_reg_info_table. */ |
3bd20490 | 843 | cse_reg_info_timestamp++; |
752df20e | 844 | |
3bd20490 | 845 | /* Clear out hash table state for this pass. */ |
752df20e | 846 | CLEAR_HARD_REG_SET (hard_regs_in_table); |
847 | ||
848 | /* The per-quantity values used to be initialized here, but it is | |
849 | much faster to initialize each as it is made in `make_new_qty'. */ | |
850 | ||
9c4f3716 | 851 | for (i = 0; i < HASH_SIZE; i++) |
752df20e | 852 | { |
9c4f3716 | 853 | struct table_elt *first; |
854 | ||
855 | first = table[i]; | |
856 | if (first != NULL) | |
752df20e | 857 | { |
9c4f3716 | 858 | struct table_elt *last = first; |
859 | ||
860 | table[i] = NULL; | |
861 | ||
862 | while (last->next_same_hash != NULL) | |
863 | last = last->next_same_hash; | |
864 | ||
865 | /* Now relink this hash entire chain into | |
866 | the free element list. */ | |
867 | ||
868 | last->next_same_hash = free_element_chain; | |
869 | free_element_chain = first; | |
752df20e | 870 | } |
871 | } | |
872 | ||
752df20e | 873 | prev_insn_cc0 = 0; |
752df20e | 874 | } |
875 | ||
a7f3b1c7 | 876 | /* Say that register REG contains a quantity in mode MODE not in any |
877 | register before and initialize that quantity. */ | |
752df20e | 878 | |
879 | static void | |
3754d046 | 880 | make_new_qty (unsigned int reg, machine_mode mode) |
752df20e | 881 | { |
19cb6b50 | 882 | int q; |
883 | struct qty_table_elem *ent; | |
884 | struct reg_eqv_elem *eqv; | |
752df20e | 885 | |
cc636d56 | 886 | gcc_assert (next_qty < max_qty); |
752df20e | 887 | |
d1264606 | 888 | q = REG_QTY (reg) = next_qty++; |
a7f3b1c7 | 889 | ent = &qty_table[q]; |
890 | ent->first_reg = reg; | |
891 | ent->last_reg = reg; | |
892 | ent->mode = mode; | |
47f1d198 | 893 | ent->const_rtx = ent->const_insn = NULL; |
a7f3b1c7 | 894 | ent->comparison_code = UNKNOWN; |
895 | ||
896 | eqv = ®_eqv_table[reg]; | |
897 | eqv->next = eqv->prev = -1; | |
752df20e | 898 | } |
899 | ||
900 | /* Make reg NEW equivalent to reg OLD. | |
901 | OLD is not changing; NEW is. */ | |
902 | ||
903 | static void | |
d328ebdf | 904 | make_regs_eqv (unsigned int new_reg, unsigned int old_reg) |
752df20e | 905 | { |
02e7a332 | 906 | unsigned int lastr, firstr; |
d328ebdf | 907 | int q = REG_QTY (old_reg); |
02e7a332 | 908 | struct qty_table_elem *ent; |
a7f3b1c7 | 909 | |
910 | ent = &qty_table[q]; | |
752df20e | 911 | |
912 | /* Nothing should become eqv until it has a "non-invalid" qty number. */ | |
d328ebdf | 913 | gcc_assert (REGNO_QTY_VALID_P (old_reg)); |
752df20e | 914 | |
d328ebdf | 915 | REG_QTY (new_reg) = q; |
a7f3b1c7 | 916 | firstr = ent->first_reg; |
917 | lastr = ent->last_reg; | |
752df20e | 918 | |
919 | /* Prefer fixed hard registers to anything. Prefer pseudo regs to other | |
920 | hard regs. Among pseudos, if NEW will live longer than any other reg | |
921 | of the same qty, and that is beyond the current basic block, | |
922 | make it the new canonical replacement for this qty. */ | |
923 | if (! (firstr < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (firstr)) | |
924 | /* Certain fixed registers might be of the class NO_REGS. This means | |
925 | that not only can they not be allocated by the compiler, but | |
5202ecf2 | 926 | they cannot be used in substitutions or canonicalizations |
752df20e | 927 | either. */ |
d328ebdf | 928 | && (new_reg >= FIRST_PSEUDO_REGISTER || REGNO_REG_CLASS (new_reg) != NO_REGS) |
929 | && ((new_reg < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (new_reg)) | |
930 | || (new_reg >= FIRST_PSEUDO_REGISTER | |
752df20e | 931 | && (firstr < FIRST_PSEUDO_REGISTER |
d328ebdf | 932 | || (bitmap_bit_p (cse_ebb_live_out, new_reg) |
3072d30e | 933 | && !bitmap_bit_p (cse_ebb_live_out, firstr)) |
d328ebdf | 934 | || (bitmap_bit_p (cse_ebb_live_in, new_reg) |
3072d30e | 935 | && !bitmap_bit_p (cse_ebb_live_in, firstr)))))) |
752df20e | 936 | { |
d328ebdf | 937 | reg_eqv_table[firstr].prev = new_reg; |
938 | reg_eqv_table[new_reg].next = firstr; | |
939 | reg_eqv_table[new_reg].prev = -1; | |
940 | ent->first_reg = new_reg; | |
752df20e | 941 | } |
942 | else | |
943 | { | |
944 | /* If NEW is a hard reg (known to be non-fixed), insert at end. | |
945 | Otherwise, insert before any non-fixed hard regs that are at the | |
946 | end. Registers of class NO_REGS cannot be used as an | |
947 | equivalent for anything. */ | |
a7f3b1c7 | 948 | while (lastr < FIRST_PSEUDO_REGISTER && reg_eqv_table[lastr].prev >= 0 |
752df20e | 949 | && (REGNO_REG_CLASS (lastr) == NO_REGS || ! FIXED_REGNO_P (lastr)) |
d328ebdf | 950 | && new_reg >= FIRST_PSEUDO_REGISTER) |
a7f3b1c7 | 951 | lastr = reg_eqv_table[lastr].prev; |
d328ebdf | 952 | reg_eqv_table[new_reg].next = reg_eqv_table[lastr].next; |
a7f3b1c7 | 953 | if (reg_eqv_table[lastr].next >= 0) |
d328ebdf | 954 | reg_eqv_table[reg_eqv_table[lastr].next].prev = new_reg; |
752df20e | 955 | else |
d328ebdf | 956 | qty_table[q].last_reg = new_reg; |
957 | reg_eqv_table[lastr].next = new_reg; | |
958 | reg_eqv_table[new_reg].prev = lastr; | |
752df20e | 959 | } |
960 | } | |
961 | ||
962 | /* Remove REG from its equivalence class. */ | |
963 | ||
964 | static void | |
8ec3a57b | 965 | delete_reg_equiv (unsigned int reg) |
752df20e | 966 | { |
19cb6b50 | 967 | struct qty_table_elem *ent; |
968 | int q = REG_QTY (reg); | |
969 | int p, n; | |
752df20e | 970 | |
7046c09e | 971 | /* If invalid, do nothing. */ |
1a5bccce | 972 | if (! REGNO_QTY_VALID_P (reg)) |
752df20e | 973 | return; |
974 | ||
a7f3b1c7 | 975 | ent = &qty_table[q]; |
976 | ||
977 | p = reg_eqv_table[reg].prev; | |
978 | n = reg_eqv_table[reg].next; | |
7046c09e | 979 | |
752df20e | 980 | if (n != -1) |
a7f3b1c7 | 981 | reg_eqv_table[n].prev = p; |
752df20e | 982 | else |
a7f3b1c7 | 983 | ent->last_reg = p; |
752df20e | 984 | if (p != -1) |
a7f3b1c7 | 985 | reg_eqv_table[p].next = n; |
752df20e | 986 | else |
a7f3b1c7 | 987 | ent->first_reg = n; |
752df20e | 988 | |
1a5bccce | 989 | REG_QTY (reg) = -reg - 1; |
752df20e | 990 | } |
991 | ||
992 | /* Remove any invalid expressions from the hash table | |
993 | that refer to any of the registers contained in expression X. | |
994 | ||
995 | Make sure that newly inserted references to those registers | |
996 | as subexpressions will be considered valid. | |
997 | ||
998 | mention_regs is not called when a register itself | |
999 | is being stored in the table. | |
1000 | ||
1001 | Return 1 if we have done something that may have changed the hash code | |
1002 | of X. */ | |
1003 | ||
1004 | static int | |
8ec3a57b | 1005 | mention_regs (rtx x) |
752df20e | 1006 | { |
19cb6b50 | 1007 | enum rtx_code code; |
1008 | int i, j; | |
1009 | const char *fmt; | |
1010 | int changed = 0; | |
752df20e | 1011 | |
1012 | if (x == 0) | |
c39100fe | 1013 | return 0; |
752df20e | 1014 | |
1015 | code = GET_CODE (x); | |
1016 | if (code == REG) | |
1017 | { | |
02e7a332 | 1018 | unsigned int regno = REGNO (x); |
a2c6f0b7 | 1019 | unsigned int endregno = END_REGNO (x); |
02e7a332 | 1020 | unsigned int i; |
752df20e | 1021 | |
1022 | for (i = regno; i < endregno; i++) | |
1023 | { | |
d1264606 | 1024 | if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i)) |
752df20e | 1025 | remove_invalid_refs (i); |
1026 | ||
d1264606 | 1027 | REG_IN_TABLE (i) = REG_TICK (i); |
126fb012 | 1028 | SUBREG_TICKED (i) = -1; |
752df20e | 1029 | } |
1030 | ||
1031 | return 0; | |
1032 | } | |
1033 | ||
e6860d27 | 1034 | /* If this is a SUBREG, we don't want to discard other SUBREGs of the same |
1035 | pseudo if they don't use overlapping words. We handle only pseudos | |
1036 | here for simplicity. */ | |
8ad4c111 | 1037 | if (code == SUBREG && REG_P (SUBREG_REG (x)) |
e6860d27 | 1038 | && REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER) |
1039 | { | |
02e7a332 | 1040 | unsigned int i = REGNO (SUBREG_REG (x)); |
e6860d27 | 1041 | |
d1264606 | 1042 | if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i)) |
e6860d27 | 1043 | { |
126fb012 | 1044 | /* If REG_IN_TABLE (i) differs from REG_TICK (i) by one, and |
1045 | the last store to this register really stored into this | |
1046 | subreg, then remove the memory of this subreg. | |
1047 | Otherwise, remove any memory of the entire register and | |
1048 | all its subregs from the table. */ | |
1049 | if (REG_TICK (i) - REG_IN_TABLE (i) > 1 | |
70e488ba | 1050 | || SUBREG_TICKED (i) != REGNO (SUBREG_REG (x))) |
e6860d27 | 1051 | remove_invalid_refs (i); |
1052 | else | |
701e46d0 | 1053 | remove_invalid_subreg_refs (i, SUBREG_BYTE (x), GET_MODE (x)); |
e6860d27 | 1054 | } |
1055 | ||
d1264606 | 1056 | REG_IN_TABLE (i) = REG_TICK (i); |
70e488ba | 1057 | SUBREG_TICKED (i) = REGNO (SUBREG_REG (x)); |
e6860d27 | 1058 | return 0; |
1059 | } | |
1060 | ||
752df20e | 1061 | /* If X is a comparison or a COMPARE and either operand is a register |
1062 | that does not have a quantity, give it one. This is so that a later | |
1063 | call to record_jump_equiv won't cause X to be assigned a different | |
1064 | hash code and not found in the table after that call. | |
1065 | ||
1066 | It is not necessary to do this here, since rehash_using_reg can | |
1067 | fix up the table later, but doing this here eliminates the need to | |
1068 | call that expensive function in the most common case where the only | |
1069 | use of the register is in the comparison. */ | |
1070 | ||
6720e96c | 1071 | if (code == COMPARE || COMPARISON_P (x)) |
752df20e | 1072 | { |
8ad4c111 | 1073 | if (REG_P (XEXP (x, 0)) |
752df20e | 1074 | && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 0)))) |
4679ade3 | 1075 | if (insert_regs (XEXP (x, 0), NULL, 0)) |
752df20e | 1076 | { |
1077 | rehash_using_reg (XEXP (x, 0)); | |
1078 | changed = 1; | |
1079 | } | |
1080 | ||
8ad4c111 | 1081 | if (REG_P (XEXP (x, 1)) |
752df20e | 1082 | && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 1)))) |
4679ade3 | 1083 | if (insert_regs (XEXP (x, 1), NULL, 0)) |
752df20e | 1084 | { |
1085 | rehash_using_reg (XEXP (x, 1)); | |
1086 | changed = 1; | |
1087 | } | |
1088 | } | |
1089 | ||
1090 | fmt = GET_RTX_FORMAT (code); | |
1091 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
1092 | if (fmt[i] == 'e') | |
1093 | changed |= mention_regs (XEXP (x, i)); | |
1094 | else if (fmt[i] == 'E') | |
1095 | for (j = 0; j < XVECLEN (x, i); j++) | |
1096 | changed |= mention_regs (XVECEXP (x, i, j)); | |
1097 | ||
1098 | return changed; | |
1099 | } | |
1100 | ||
1101 | /* Update the register quantities for inserting X into the hash table | |
1102 | with a value equivalent to CLASSP. | |
1103 | (If the class does not contain a REG, it is irrelevant.) | |
1104 | If MODIFIED is nonzero, X is a destination; it is being modified. | |
1105 | Note that delete_reg_equiv should be called on a register | |
1106 | before insert_regs is done on that register with MODIFIED != 0. | |
1107 | ||
1108 | Nonzero value means that elements of reg_qty have changed | |
1109 | so X's hash code may be different. */ | |
1110 | ||
1111 | static int | |
8ec3a57b | 1112 | insert_regs (rtx x, struct table_elt *classp, int modified) |
752df20e | 1113 | { |
8ad4c111 | 1114 | if (REG_P (x)) |
752df20e | 1115 | { |
02e7a332 | 1116 | unsigned int regno = REGNO (x); |
1117 | int qty_valid; | |
752df20e | 1118 | |
0aee3bb1 | 1119 | /* If REGNO is in the equivalence table already but is of the |
1120 | wrong mode for that equivalence, don't do anything here. */ | |
1121 | ||
a7f3b1c7 | 1122 | qty_valid = REGNO_QTY_VALID_P (regno); |
1123 | if (qty_valid) | |
1124 | { | |
1125 | struct qty_table_elem *ent = &qty_table[REG_QTY (regno)]; | |
0aee3bb1 | 1126 | |
a7f3b1c7 | 1127 | if (ent->mode != GET_MODE (x)) |
1128 | return 0; | |
1129 | } | |
1130 | ||
1131 | if (modified || ! qty_valid) | |
752df20e | 1132 | { |
1133 | if (classp) | |
1134 | for (classp = classp->first_same_value; | |
1135 | classp != 0; | |
1136 | classp = classp->next_same_value) | |
8ad4c111 | 1137 | if (REG_P (classp->exp) |
752df20e | 1138 | && GET_MODE (classp->exp) == GET_MODE (x)) |
1139 | { | |
412c63b0 | 1140 | unsigned c_regno = REGNO (classp->exp); |
1141 | ||
1142 | gcc_assert (REGNO_QTY_VALID_P (c_regno)); | |
1143 | ||
1144 | /* Suppose that 5 is hard reg and 100 and 101 are | |
1145 | pseudos. Consider | |
1146 | ||
1147 | (set (reg:si 100) (reg:si 5)) | |
1148 | (set (reg:si 5) (reg:si 100)) | |
1149 | (set (reg:di 101) (reg:di 5)) | |
1150 | ||
1151 | We would now set REG_QTY (101) = REG_QTY (5), but the | |
1152 | entry for 5 is in SImode. When we use this later in | |
1153 | copy propagation, we get the register in wrong mode. */ | |
1154 | if (qty_table[REG_QTY (c_regno)].mode != GET_MODE (x)) | |
1155 | continue; | |
1156 | ||
1157 | make_regs_eqv (regno, c_regno); | |
752df20e | 1158 | return 1; |
1159 | } | |
1160 | ||
6c1128fe | 1161 | /* Mention_regs for a SUBREG checks if REG_TICK is exactly one larger |
1162 | than REG_IN_TABLE to find out if there was only a single preceding | |
1163 | invalidation - for the SUBREG - or another one, which would be | |
1164 | for the full register. However, if we find here that REG_TICK | |
1165 | indicates that the register is invalid, it means that it has | |
1166 | been invalidated in a separate operation. The SUBREG might be used | |
1167 | now (then this is a recursive call), or we might use the full REG | |
1168 | now and a SUBREG of it later. So bump up REG_TICK so that | |
1169 | mention_regs will do the right thing. */ | |
1170 | if (! modified | |
1171 | && REG_IN_TABLE (regno) >= 0 | |
1172 | && REG_TICK (regno) == REG_IN_TABLE (regno) + 1) | |
1173 | REG_TICK (regno)++; | |
a7f3b1c7 | 1174 | make_new_qty (regno, GET_MODE (x)); |
752df20e | 1175 | return 1; |
1176 | } | |
89bbb48f | 1177 | |
1178 | return 0; | |
752df20e | 1179 | } |
50cf1c21 | 1180 | |
1181 | /* If X is a SUBREG, we will likely be inserting the inner register in the | |
1182 | table. If that register doesn't have an assigned quantity number at | |
1183 | this point but does later, the insertion that we will be doing now will | |
1184 | not be accessible because its hash code will have changed. So assign | |
1185 | a quantity number now. */ | |
1186 | ||
8ad4c111 | 1187 | else if (GET_CODE (x) == SUBREG && REG_P (SUBREG_REG (x)) |
50cf1c21 | 1188 | && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x)))) |
1189 | { | |
4679ade3 | 1190 | insert_regs (SUBREG_REG (x), NULL, 0); |
e6860d27 | 1191 | mention_regs (x); |
50cf1c21 | 1192 | return 1; |
1193 | } | |
752df20e | 1194 | else |
1195 | return mention_regs (x); | |
1196 | } | |
1197 | \f | |
01c8e4c9 | 1198 | |
1199 | /* Compute upper and lower anchors for CST. Also compute the offset of CST | |
1200 | from these anchors/bases such that *_BASE + *_OFFS = CST. Return false iff | |
1201 | CST is equal to an anchor. */ | |
1202 | ||
1203 | static bool | |
1204 | compute_const_anchors (rtx cst, | |
1205 | HOST_WIDE_INT *lower_base, HOST_WIDE_INT *lower_offs, | |
1206 | HOST_WIDE_INT *upper_base, HOST_WIDE_INT *upper_offs) | |
1207 | { | |
1208 | HOST_WIDE_INT n = INTVAL (cst); | |
1209 | ||
1210 | *lower_base = n & ~(targetm.const_anchor - 1); | |
1211 | if (*lower_base == n) | |
1212 | return false; | |
1213 | ||
1214 | *upper_base = | |
1215 | (n + (targetm.const_anchor - 1)) & ~(targetm.const_anchor - 1); | |
1216 | *upper_offs = n - *upper_base; | |
1217 | *lower_offs = n - *lower_base; | |
1218 | return true; | |
1219 | } | |
1220 | ||
1221 | /* Insert the equivalence between ANCHOR and (REG + OFF) in mode MODE. */ | |
1222 | ||
1223 | static void | |
1224 | insert_const_anchor (HOST_WIDE_INT anchor, rtx reg, HOST_WIDE_INT offs, | |
3754d046 | 1225 | machine_mode mode) |
01c8e4c9 | 1226 | { |
1227 | struct table_elt *elt; | |
1228 | unsigned hash; | |
1229 | rtx anchor_exp; | |
1230 | rtx exp; | |
1231 | ||
1232 | anchor_exp = GEN_INT (anchor); | |
1233 | hash = HASH (anchor_exp, mode); | |
1234 | elt = lookup (anchor_exp, hash, mode); | |
1235 | if (!elt) | |
1236 | elt = insert (anchor_exp, NULL, hash, mode); | |
1237 | ||
29c05e22 | 1238 | exp = plus_constant (mode, reg, offs); |
01c8e4c9 | 1239 | /* REG has just been inserted and the hash codes recomputed. */ |
1240 | mention_regs (exp); | |
1241 | hash = HASH (exp, mode); | |
1242 | ||
1243 | /* Use the cost of the register rather than the whole expression. When | |
1244 | looking up constant anchors we will further offset the corresponding | |
1245 | expression therefore it does not make sense to prefer REGs over | |
1246 | reg-immediate additions. Prefer instead the oldest expression. Also | |
1247 | don't prefer pseudos over hard regs so that we derive constants in | |
1248 | argument registers from other argument registers rather than from the | |
1249 | original pseudo that was used to synthesize the constant. */ | |
1250 | insert_with_costs (exp, elt, hash, mode, COST (reg), 1); | |
1251 | } | |
1252 | ||
1253 | /* The constant CST is equivalent to the register REG. Create | |
1254 | equivalences between the two anchors of CST and the corresponding | |
1255 | register-offset expressions using REG. */ | |
1256 | ||
1257 | static void | |
3754d046 | 1258 | insert_const_anchors (rtx reg, rtx cst, machine_mode mode) |
01c8e4c9 | 1259 | { |
1260 | HOST_WIDE_INT lower_base, lower_offs, upper_base, upper_offs; | |
1261 | ||
1262 | if (!compute_const_anchors (cst, &lower_base, &lower_offs, | |
1263 | &upper_base, &upper_offs)) | |
1264 | return; | |
1265 | ||
1266 | /* Ignore anchors of value 0. Constants accessible from zero are | |
1267 | simple. */ | |
1268 | if (lower_base != 0) | |
1269 | insert_const_anchor (lower_base, reg, -lower_offs, mode); | |
1270 | ||
1271 | if (upper_base != 0) | |
1272 | insert_const_anchor (upper_base, reg, -upper_offs, mode); | |
1273 | } | |
1274 | ||
1275 | /* We need to express ANCHOR_ELT->exp + OFFS. Walk the equivalence list of | |
1276 | ANCHOR_ELT and see if offsetting any of the entries by OFFS would create a | |
1277 | valid expression. Return the cheapest and oldest of such expressions. In | |
1278 | *OLD, return how old the resulting expression is compared to the other | |
1279 | equivalent expressions. */ | |
1280 | ||
1281 | static rtx | |
1282 | find_reg_offset_for_const (struct table_elt *anchor_elt, HOST_WIDE_INT offs, | |
1283 | unsigned *old) | |
1284 | { | |
1285 | struct table_elt *elt; | |
1286 | unsigned idx; | |
1287 | struct table_elt *match_elt; | |
1288 | rtx match; | |
1289 | ||
1290 | /* Find the cheapest and *oldest* expression to maximize the chance of | |
1291 | reusing the same pseudo. */ | |
1292 | ||
1293 | match_elt = NULL; | |
1294 | match = NULL_RTX; | |
1295 | for (elt = anchor_elt->first_same_value, idx = 0; | |
1296 | elt; | |
1297 | elt = elt->next_same_value, idx++) | |
1298 | { | |
1299 | if (match_elt && CHEAPER (match_elt, elt)) | |
1300 | return match; | |
1301 | ||
1302 | if (REG_P (elt->exp) | |
1303 | || (GET_CODE (elt->exp) == PLUS | |
1304 | && REG_P (XEXP (elt->exp, 0)) | |
1305 | && GET_CODE (XEXP (elt->exp, 1)) == CONST_INT)) | |
1306 | { | |
1307 | rtx x; | |
1308 | ||
1309 | /* Ignore expressions that are no longer valid. */ | |
1310 | if (!REG_P (elt->exp) && !exp_equiv_p (elt->exp, elt->exp, 1, false)) | |
1311 | continue; | |
1312 | ||
29c05e22 | 1313 | x = plus_constant (GET_MODE (elt->exp), elt->exp, offs); |
01c8e4c9 | 1314 | if (REG_P (x) |
1315 | || (GET_CODE (x) == PLUS | |
1316 | && IN_RANGE (INTVAL (XEXP (x, 1)), | |
1317 | -targetm.const_anchor, | |
1318 | targetm.const_anchor - 1))) | |
1319 | { | |
1320 | match = x; | |
1321 | match_elt = elt; | |
1322 | *old = idx; | |
1323 | } | |
1324 | } | |
1325 | } | |
1326 | ||
1327 | return match; | |
1328 | } | |
1329 | ||
1330 | /* Try to express the constant SRC_CONST using a register+offset expression | |
1331 | derived from a constant anchor. Return it if successful or NULL_RTX, | |
1332 | otherwise. */ | |
1333 | ||
1334 | static rtx | |
3754d046 | 1335 | try_const_anchors (rtx src_const, machine_mode mode) |
01c8e4c9 | 1336 | { |
1337 | struct table_elt *lower_elt, *upper_elt; | |
1338 | HOST_WIDE_INT lower_base, lower_offs, upper_base, upper_offs; | |
1339 | rtx lower_anchor_rtx, upper_anchor_rtx; | |
1340 | rtx lower_exp = NULL_RTX, upper_exp = NULL_RTX; | |
1341 | unsigned lower_old, upper_old; | |
1342 | ||
211e63b0 | 1343 | /* CONST_INT is used for CC modes, but we should leave those alone. */ |
1344 | if (GET_MODE_CLASS (mode) == MODE_CC) | |
1345 | return NULL_RTX; | |
1346 | ||
1347 | gcc_assert (SCALAR_INT_MODE_P (mode)); | |
01c8e4c9 | 1348 | if (!compute_const_anchors (src_const, &lower_base, &lower_offs, |
1349 | &upper_base, &upper_offs)) | |
1350 | return NULL_RTX; | |
1351 | ||
1352 | lower_anchor_rtx = GEN_INT (lower_base); | |
1353 | upper_anchor_rtx = GEN_INT (upper_base); | |
1354 | lower_elt = lookup (lower_anchor_rtx, HASH (lower_anchor_rtx, mode), mode); | |
1355 | upper_elt = lookup (upper_anchor_rtx, HASH (upper_anchor_rtx, mode), mode); | |
1356 | ||
1357 | if (lower_elt) | |
1358 | lower_exp = find_reg_offset_for_const (lower_elt, lower_offs, &lower_old); | |
1359 | if (upper_elt) | |
1360 | upper_exp = find_reg_offset_for_const (upper_elt, upper_offs, &upper_old); | |
1361 | ||
1362 | if (!lower_exp) | |
1363 | return upper_exp; | |
1364 | if (!upper_exp) | |
1365 | return lower_exp; | |
1366 | ||
1367 | /* Return the older expression. */ | |
1368 | return (upper_old > lower_old ? upper_exp : lower_exp); | |
1369 | } | |
1370 | \f | |
752df20e | 1371 | /* Look in or update the hash table. */ |
1372 | ||
752df20e | 1373 | /* Remove table element ELT from use in the table. |
1374 | HASH is its hash code, made using the HASH macro. | |
1375 | It's an argument because often that is known in advance | |
1376 | and we save much time not recomputing it. */ | |
1377 | ||
1378 | static void | |
8ec3a57b | 1379 | remove_from_table (struct table_elt *elt, unsigned int hash) |
752df20e | 1380 | { |
1381 | if (elt == 0) | |
1382 | return; | |
1383 | ||
1384 | /* Mark this element as removed. See cse_insn. */ | |
1385 | elt->first_same_value = 0; | |
1386 | ||
1387 | /* Remove the table element from its equivalence class. */ | |
cb10db9d | 1388 | |
752df20e | 1389 | { |
19cb6b50 | 1390 | struct table_elt *prev = elt->prev_same_value; |
1391 | struct table_elt *next = elt->next_same_value; | |
752df20e | 1392 | |
cb10db9d | 1393 | if (next) |
1394 | next->prev_same_value = prev; | |
752df20e | 1395 | |
1396 | if (prev) | |
1397 | prev->next_same_value = next; | |
1398 | else | |
1399 | { | |
19cb6b50 | 1400 | struct table_elt *newfirst = next; |
752df20e | 1401 | while (next) |
1402 | { | |
1403 | next->first_same_value = newfirst; | |
1404 | next = next->next_same_value; | |
1405 | } | |
1406 | } | |
1407 | } | |
1408 | ||
1409 | /* Remove the table element from its hash bucket. */ | |
1410 | ||
1411 | { | |
19cb6b50 | 1412 | struct table_elt *prev = elt->prev_same_hash; |
1413 | struct table_elt *next = elt->next_same_hash; | |
752df20e | 1414 | |
cb10db9d | 1415 | if (next) |
1416 | next->prev_same_hash = prev; | |
752df20e | 1417 | |
1418 | if (prev) | |
1419 | prev->next_same_hash = next; | |
1420 | else if (table[hash] == elt) | |
1421 | table[hash] = next; | |
1422 | else | |
1423 | { | |
1424 | /* This entry is not in the proper hash bucket. This can happen | |
1425 | when two classes were merged by `merge_equiv_classes'. Search | |
1426 | for the hash bucket that it heads. This happens only very | |
1427 | rarely, so the cost is acceptable. */ | |
9c4f3716 | 1428 | for (hash = 0; hash < HASH_SIZE; hash++) |
752df20e | 1429 | if (table[hash] == elt) |
1430 | table[hash] = next; | |
1431 | } | |
1432 | } | |
1433 | ||
1434 | /* Remove the table element from its related-value circular chain. */ | |
1435 | ||
1436 | if (elt->related_value != 0 && elt->related_value != elt) | |
1437 | { | |
19cb6b50 | 1438 | struct table_elt *p = elt->related_value; |
02e7a332 | 1439 | |
752df20e | 1440 | while (p->related_value != elt) |
1441 | p = p->related_value; | |
1442 | p->related_value = elt->related_value; | |
1443 | if (p->related_value == p) | |
1444 | p->related_value = 0; | |
1445 | } | |
1446 | ||
9c4f3716 | 1447 | /* Now add it to the free element chain. */ |
1448 | elt->next_same_hash = free_element_chain; | |
1449 | free_element_chain = elt; | |
752df20e | 1450 | } |
1451 | ||
d2c970fe | 1452 | /* Same as above, but X is a pseudo-register. */ |
1453 | ||
1454 | static void | |
1455 | remove_pseudo_from_table (rtx x, unsigned int hash) | |
1456 | { | |
1457 | struct table_elt *elt; | |
1458 | ||
1459 | /* Because a pseudo-register can be referenced in more than one | |
1460 | mode, we might have to remove more than one table entry. */ | |
1461 | while ((elt = lookup_for_remove (x, hash, VOIDmode))) | |
1462 | remove_from_table (elt, hash); | |
1463 | } | |
1464 | ||
752df20e | 1465 | /* Look up X in the hash table and return its table element, |
1466 | or 0 if X is not in the table. | |
1467 | ||
1468 | MODE is the machine-mode of X, or if X is an integer constant | |
1469 | with VOIDmode then MODE is the mode with which X will be used. | |
1470 | ||
1471 | Here we are satisfied to find an expression whose tree structure | |
1472 | looks like X. */ | |
1473 | ||
1474 | static struct table_elt * | |
3754d046 | 1475 | lookup (rtx x, unsigned int hash, machine_mode mode) |
752df20e | 1476 | { |
19cb6b50 | 1477 | struct table_elt *p; |
752df20e | 1478 | |
1479 | for (p = table[hash]; p; p = p->next_same_hash) | |
8ad4c111 | 1480 | if (mode == p->mode && ((x == p->exp && REG_P (x)) |
78d140c9 | 1481 | || exp_equiv_p (x, p->exp, !REG_P (x), false))) |
752df20e | 1482 | return p; |
1483 | ||
1484 | return 0; | |
1485 | } | |
1486 | ||
1487 | /* Like `lookup' but don't care whether the table element uses invalid regs. | |
1488 | Also ignore discrepancies in the machine mode of a register. */ | |
1489 | ||
1490 | static struct table_elt * | |
3754d046 | 1491 | lookup_for_remove (rtx x, unsigned int hash, machine_mode mode) |
752df20e | 1492 | { |
19cb6b50 | 1493 | struct table_elt *p; |
752df20e | 1494 | |
8ad4c111 | 1495 | if (REG_P (x)) |
752df20e | 1496 | { |
02e7a332 | 1497 | unsigned int regno = REGNO (x); |
1498 | ||
752df20e | 1499 | /* Don't check the machine mode when comparing registers; |
1500 | invalidating (REG:SI 0) also invalidates (REG:DF 0). */ | |
1501 | for (p = table[hash]; p; p = p->next_same_hash) | |
8ad4c111 | 1502 | if (REG_P (p->exp) |
752df20e | 1503 | && REGNO (p->exp) == regno) |
1504 | return p; | |
1505 | } | |
1506 | else | |
1507 | { | |
1508 | for (p = table[hash]; p; p = p->next_same_hash) | |
78d140c9 | 1509 | if (mode == p->mode |
1510 | && (x == p->exp || exp_equiv_p (x, p->exp, 0, false))) | |
752df20e | 1511 | return p; |
1512 | } | |
1513 | ||
1514 | return 0; | |
1515 | } | |
1516 | ||
1517 | /* Look for an expression equivalent to X and with code CODE. | |
1518 | If one is found, return that expression. */ | |
1519 | ||
1520 | static rtx | |
8ec3a57b | 1521 | lookup_as_function (rtx x, enum rtx_code code) |
752df20e | 1522 | { |
19cb6b50 | 1523 | struct table_elt *p |
78d140c9 | 1524 | = lookup (x, SAFE_HASH (x, VOIDmode), GET_MODE (x)); |
02e7a332 | 1525 | |
752df20e | 1526 | if (p == 0) |
1527 | return 0; | |
1528 | ||
1529 | for (p = p->first_same_value; p; p = p->next_same_value) | |
02e7a332 | 1530 | if (GET_CODE (p->exp) == code |
1531 | /* Make sure this is a valid entry in the table. */ | |
78d140c9 | 1532 | && exp_equiv_p (p->exp, p->exp, 1, false)) |
02e7a332 | 1533 | return p->exp; |
cb10db9d | 1534 | |
752df20e | 1535 | return 0; |
1536 | } | |
1537 | ||
01c8e4c9 | 1538 | /* Insert X in the hash table, assuming HASH is its hash code and |
1539 | CLASSP is an element of the class it should go in (or 0 if a new | |
1540 | class should be made). COST is the code of X and reg_cost is the | |
1541 | cost of registers in X. It is inserted at the proper position to | |
1542 | keep the class in the order cheapest first. | |
752df20e | 1543 | |
1544 | MODE is the machine-mode of X, or if X is an integer constant | |
1545 | with VOIDmode then MODE is the mode with which X will be used. | |
1546 | ||
1547 | For elements of equal cheapness, the most recent one | |
1548 | goes in front, except that the first element in the list | |
1549 | remains first unless a cheaper element is added. The order of | |
1550 | pseudo-registers does not matter, as canon_reg will be called to | |
5202ecf2 | 1551 | find the cheapest when a register is retrieved from the table. |
752df20e | 1552 | |
1553 | The in_memory field in the hash table element is set to 0. | |
1554 | The caller must set it nonzero if appropriate. | |
1555 | ||
1556 | You should call insert_regs (X, CLASSP, MODIFY) before calling here, | |
1557 | and if insert_regs returns a nonzero value | |
1558 | you must then recompute its hash code before calling here. | |
1559 | ||
1560 | If necessary, update table showing constant values of quantities. */ | |
1561 | ||
752df20e | 1562 | static struct table_elt * |
01c8e4c9 | 1563 | insert_with_costs (rtx x, struct table_elt *classp, unsigned int hash, |
3754d046 | 1564 | machine_mode mode, int cost, int reg_cost) |
752df20e | 1565 | { |
19cb6b50 | 1566 | struct table_elt *elt; |
752df20e | 1567 | |
1568 | /* If X is a register and we haven't made a quantity for it, | |
1569 | something is wrong. */ | |
cc636d56 | 1570 | gcc_assert (!REG_P (x) || REGNO_QTY_VALID_P (REGNO (x))); |
752df20e | 1571 | |
1572 | /* If X is a hard register, show it is being put in the table. */ | |
8ad4c111 | 1573 | if (REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER) |
a2c6f0b7 | 1574 | add_to_hard_reg_set (&hard_regs_in_table, GET_MODE (x), REGNO (x)); |
752df20e | 1575 | |
752df20e | 1576 | /* Put an element for X into the right hash bucket. */ |
1577 | ||
9c4f3716 | 1578 | elt = free_element_chain; |
1579 | if (elt) | |
02e7a332 | 1580 | free_element_chain = elt->next_same_hash; |
9c4f3716 | 1581 | else |
4c36ffe6 | 1582 | elt = XNEW (struct table_elt); |
9c4f3716 | 1583 | |
752df20e | 1584 | elt->exp = x; |
7cfb9bcf | 1585 | elt->canon_exp = NULL_RTX; |
01c8e4c9 | 1586 | elt->cost = cost; |
1587 | elt->regcost = reg_cost; | |
752df20e | 1588 | elt->next_same_value = 0; |
1589 | elt->prev_same_value = 0; | |
1590 | elt->next_same_hash = table[hash]; | |
1591 | elt->prev_same_hash = 0; | |
1592 | elt->related_value = 0; | |
1593 | elt->in_memory = 0; | |
1594 | elt->mode = mode; | |
b04fab2a | 1595 | elt->is_const = (CONSTANT_P (x) || fixed_base_plus_p (x)); |
752df20e | 1596 | |
1597 | if (table[hash]) | |
1598 | table[hash]->prev_same_hash = elt; | |
1599 | table[hash] = elt; | |
1600 | ||
1601 | /* Put it into the proper value-class. */ | |
1602 | if (classp) | |
1603 | { | |
1604 | classp = classp->first_same_value; | |
1605 | if (CHEAPER (elt, classp)) | |
2358393e | 1606 | /* Insert at the head of the class. */ |
752df20e | 1607 | { |
19cb6b50 | 1608 | struct table_elt *p; |
752df20e | 1609 | elt->next_same_value = classp; |
1610 | classp->prev_same_value = elt; | |
1611 | elt->first_same_value = elt; | |
1612 | ||
1613 | for (p = classp; p; p = p->next_same_value) | |
1614 | p->first_same_value = elt; | |
1615 | } | |
1616 | else | |
1617 | { | |
1618 | /* Insert not at head of the class. */ | |
1619 | /* Put it after the last element cheaper than X. */ | |
19cb6b50 | 1620 | struct table_elt *p, *next; |
02e7a332 | 1621 | |
3c802a1e | 1622 | for (p = classp; |
1623 | (next = p->next_same_value) && CHEAPER (next, elt); | |
1624 | p = next) | |
1625 | ; | |
02e7a332 | 1626 | |
752df20e | 1627 | /* Put it after P and before NEXT. */ |
1628 | elt->next_same_value = next; | |
1629 | if (next) | |
1630 | next->prev_same_value = elt; | |
02e7a332 | 1631 | |
752df20e | 1632 | elt->prev_same_value = p; |
1633 | p->next_same_value = elt; | |
1634 | elt->first_same_value = classp; | |
1635 | } | |
1636 | } | |
1637 | else | |
1638 | elt->first_same_value = elt; | |
1639 | ||
1640 | /* If this is a constant being set equivalent to a register or a register | |
1641 | being set equivalent to a constant, note the constant equivalence. | |
1642 | ||
1643 | If this is a constant, it cannot be equivalent to a different constant, | |
1644 | and a constant is the only thing that can be cheaper than a register. So | |
1645 | we know the register is the head of the class (before the constant was | |
1646 | inserted). | |
1647 | ||
1648 | If this is a register that is not already known equivalent to a | |
1649 | constant, we must check the entire class. | |
1650 | ||
1651 | If this is a register that is already known equivalent to an insn, | |
a7f3b1c7 | 1652 | update the qtys `const_insn' to show that `this_insn' is the latest |
752df20e | 1653 | insn making that quantity equivalent to the constant. */ |
1654 | ||
8ad4c111 | 1655 | if (elt->is_const && classp && REG_P (classp->exp) |
1656 | && !REG_P (x)) | |
752df20e | 1657 | { |
a7f3b1c7 | 1658 | int exp_q = REG_QTY (REGNO (classp->exp)); |
1659 | struct qty_table_elem *exp_ent = &qty_table[exp_q]; | |
1660 | ||
316f48ea | 1661 | exp_ent->const_rtx = gen_lowpart (exp_ent->mode, x); |
a7f3b1c7 | 1662 | exp_ent->const_insn = this_insn; |
752df20e | 1663 | } |
1664 | ||
8ad4c111 | 1665 | else if (REG_P (x) |
a7f3b1c7 | 1666 | && classp |
1667 | && ! qty_table[REG_QTY (REGNO (x))].const_rtx | |
67123c3e | 1668 | && ! elt->is_const) |
752df20e | 1669 | { |
19cb6b50 | 1670 | struct table_elt *p; |
752df20e | 1671 | |
1672 | for (p = classp; p != 0; p = p->next_same_value) | |
1673 | { | |
8ad4c111 | 1674 | if (p->is_const && !REG_P (p->exp)) |
752df20e | 1675 | { |
a7f3b1c7 | 1676 | int x_q = REG_QTY (REGNO (x)); |
1677 | struct qty_table_elem *x_ent = &qty_table[x_q]; | |
1678 | ||
02e7a332 | 1679 | x_ent->const_rtx |
316f48ea | 1680 | = gen_lowpart (GET_MODE (x), p->exp); |
a7f3b1c7 | 1681 | x_ent->const_insn = this_insn; |
752df20e | 1682 | break; |
1683 | } | |
1684 | } | |
1685 | } | |
1686 | ||
8ad4c111 | 1687 | else if (REG_P (x) |
a7f3b1c7 | 1688 | && qty_table[REG_QTY (REGNO (x))].const_rtx |
1689 | && GET_MODE (x) == qty_table[REG_QTY (REGNO (x))].mode) | |
1690 | qty_table[REG_QTY (REGNO (x))].const_insn = this_insn; | |
752df20e | 1691 | |
1692 | /* If this is a constant with symbolic value, | |
1693 | and it has a term with an explicit integer value, | |
1694 | link it up with related expressions. */ | |
1695 | if (GET_CODE (x) == CONST) | |
1696 | { | |
1697 | rtx subexp = get_related_value (x); | |
952bc06d | 1698 | unsigned subhash; |
752df20e | 1699 | struct table_elt *subelt, *subelt_prev; |
1700 | ||
1701 | if (subexp != 0) | |
1702 | { | |
1703 | /* Get the integer-free subexpression in the hash table. */ | |
78d140c9 | 1704 | subhash = SAFE_HASH (subexp, mode); |
752df20e | 1705 | subelt = lookup (subexp, subhash, mode); |
1706 | if (subelt == 0) | |
4679ade3 | 1707 | subelt = insert (subexp, NULL, subhash, mode); |
752df20e | 1708 | /* Initialize SUBELT's circular chain if it has none. */ |
1709 | if (subelt->related_value == 0) | |
1710 | subelt->related_value = subelt; | |
1711 | /* Find the element in the circular chain that precedes SUBELT. */ | |
1712 | subelt_prev = subelt; | |
1713 | while (subelt_prev->related_value != subelt) | |
1714 | subelt_prev = subelt_prev->related_value; | |
1715 | /* Put new ELT into SUBELT's circular chain just before SUBELT. | |
1716 | This way the element that follows SUBELT is the oldest one. */ | |
1717 | elt->related_value = subelt_prev->related_value; | |
1718 | subelt_prev->related_value = elt; | |
1719 | } | |
1720 | } | |
1721 | ||
1722 | return elt; | |
1723 | } | |
01c8e4c9 | 1724 | |
1725 | /* Wrap insert_with_costs by passing the default costs. */ | |
1726 | ||
1727 | static struct table_elt * | |
1728 | insert (rtx x, struct table_elt *classp, unsigned int hash, | |
3754d046 | 1729 | machine_mode mode) |
01c8e4c9 | 1730 | { |
1731 | return | |
1732 | insert_with_costs (x, classp, hash, mode, COST (x), approx_reg_cost (x)); | |
1733 | } | |
1734 | ||
752df20e | 1735 | \f |
1736 | /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from | |
1737 | CLASS2 into CLASS1. This is done when we have reached an insn which makes | |
1738 | the two classes equivalent. | |
1739 | ||
1740 | CLASS1 will be the surviving class; CLASS2 should not be used after this | |
1741 | call. | |
1742 | ||
1743 | Any invalid entries in CLASS2 will not be copied. */ | |
1744 | ||
1745 | static void | |
8ec3a57b | 1746 | merge_equiv_classes (struct table_elt *class1, struct table_elt *class2) |
752df20e | 1747 | { |
d328ebdf | 1748 | struct table_elt *elt, *next, *new_elt; |
752df20e | 1749 | |
1750 | /* Ensure we start with the head of the classes. */ | |
1751 | class1 = class1->first_same_value; | |
1752 | class2 = class2->first_same_value; | |
1753 | ||
1754 | /* If they were already equal, forget it. */ | |
1755 | if (class1 == class2) | |
1756 | return; | |
1757 | ||
1758 | for (elt = class2; elt; elt = next) | |
1759 | { | |
02e7a332 | 1760 | unsigned int hash; |
752df20e | 1761 | rtx exp = elt->exp; |
3754d046 | 1762 | machine_mode mode = elt->mode; |
752df20e | 1763 | |
1764 | next = elt->next_same_value; | |
1765 | ||
1766 | /* Remove old entry, make a new one in CLASS1's class. | |
1767 | Don't do this for invalid entries as we cannot find their | |
a92771b8 | 1768 | hash code (it also isn't necessary). */ |
78d140c9 | 1769 | if (REG_P (exp) || exp_equiv_p (exp, exp, 1, false)) |
752df20e | 1770 | { |
b57e33a4 | 1771 | bool need_rehash = false; |
1772 | ||
752df20e | 1773 | hash_arg_in_memory = 0; |
752df20e | 1774 | hash = HASH (exp, mode); |
cb10db9d | 1775 | |
8ad4c111 | 1776 | if (REG_P (exp)) |
b57e33a4 | 1777 | { |
1a5bccce | 1778 | need_rehash = REGNO_QTY_VALID_P (REGNO (exp)); |
b57e33a4 | 1779 | delete_reg_equiv (REGNO (exp)); |
1780 | } | |
cb10db9d | 1781 | |
d2c970fe | 1782 | if (REG_P (exp) && REGNO (exp) >= FIRST_PSEUDO_REGISTER) |
1783 | remove_pseudo_from_table (exp, hash); | |
1784 | else | |
1785 | remove_from_table (elt, hash); | |
752df20e | 1786 | |
b57e33a4 | 1787 | if (insert_regs (exp, class1, 0) || need_rehash) |
1b033cc3 | 1788 | { |
1789 | rehash_using_reg (exp); | |
1790 | hash = HASH (exp, mode); | |
1791 | } | |
d328ebdf | 1792 | new_elt = insert (exp, class1, hash, mode); |
1793 | new_elt->in_memory = hash_arg_in_memory; | |
20d3ff08 | 1794 | if (GET_CODE (exp) == ASM_OPERANDS && elt->cost == MAX_COST) |
1795 | new_elt->cost = MAX_COST; | |
752df20e | 1796 | } |
1797 | } | |
1798 | } | |
1799 | \f | |
53d90e4e | 1800 | /* Flush the entire hash table. */ |
1801 | ||
1802 | static void | |
8ec3a57b | 1803 | flush_hash_table (void) |
53d90e4e | 1804 | { |
1805 | int i; | |
1806 | struct table_elt *p; | |
1807 | ||
9c4f3716 | 1808 | for (i = 0; i < HASH_SIZE; i++) |
53d90e4e | 1809 | for (p = table[i]; p; p = table[i]) |
1810 | { | |
1811 | /* Note that invalidate can remove elements | |
1812 | after P in the current hash chain. */ | |
8ad4c111 | 1813 | if (REG_P (p->exp)) |
4c958a22 | 1814 | invalidate (p->exp, VOIDmode); |
53d90e4e | 1815 | else |
1816 | remove_from_table (p, i); | |
1817 | } | |
1818 | } | |
155b05dc | 1819 | \f |
e4a58c60 | 1820 | /* Check whether an anti dependence exists between X and EXP. MODE and |
1821 | ADDR are as for canon_anti_dependence. */ | |
37b8a8d6 | 1822 | |
e4a58c60 | 1823 | static bool |
3754d046 | 1824 | check_dependence (const_rtx x, rtx exp, machine_mode mode, rtx addr) |
02b0feeb | 1825 | { |
e4a58c60 | 1826 | subrtx_iterator::array_type array; |
1827 | FOR_EACH_SUBRTX (iter, array, x, NONCONST) | |
1828 | { | |
1829 | const_rtx x = *iter; | |
1830 | if (MEM_P (x) && canon_anti_dependence (x, true, exp, mode, addr)) | |
1831 | return true; | |
1832 | } | |
1833 | return false; | |
02b0feeb | 1834 | } |
1835 | \f | |
155b05dc | 1836 | /* Remove from the hash table, or mark as invalid, all expressions whose |
1837 | values could be altered by storing in X. X is a register, a subreg, or | |
1838 | a memory reference with nonvarying address (because, when a memory | |
1839 | reference with a varying address is stored in, all memory references are | |
1840 | removed by invalidate_memory so specific invalidation is superfluous). | |
1841 | FULL_MODE, if not VOIDmode, indicates that this much should be | |
1842 | invalidated instead of just the amount indicated by the mode of X. This | |
1843 | is only used for bitfield stores into memory. | |
1844 | ||
1845 | A nonvarying address may be just a register or just a symbol reference, | |
1846 | or it may be either of those plus a numeric offset. */ | |
752df20e | 1847 | |
1848 | static void | |
3754d046 | 1849 | invalidate (rtx x, machine_mode full_mode) |
752df20e | 1850 | { |
19cb6b50 | 1851 | int i; |
1852 | struct table_elt *p; | |
56bbdce4 | 1853 | rtx addr; |
752df20e | 1854 | |
155b05dc | 1855 | switch (GET_CODE (x)) |
752df20e | 1856 | { |
155b05dc | 1857 | case REG: |
1858 | { | |
1859 | /* If X is a register, dependencies on its contents are recorded | |
1860 | through the qty number mechanism. Just change the qty number of | |
1861 | the register, mark it as invalid for expressions that refer to it, | |
1862 | and remove it itself. */ | |
02e7a332 | 1863 | unsigned int regno = REGNO (x); |
1864 | unsigned int hash = HASH (x, GET_MODE (x)); | |
752df20e | 1865 | |
155b05dc | 1866 | /* Remove REGNO from any quantity list it might be on and indicate |
1867 | that its value might have changed. If it is a pseudo, remove its | |
1868 | entry from the hash table. | |
752df20e | 1869 | |
155b05dc | 1870 | For a hard register, we do the first two actions above for any |
1871 | additional hard registers corresponding to X. Then, if any of these | |
1872 | registers are in the table, we must remove any REG entries that | |
1873 | overlap these registers. */ | |
752df20e | 1874 | |
155b05dc | 1875 | delete_reg_equiv (regno); |
1876 | REG_TICK (regno)++; | |
126fb012 | 1877 | SUBREG_TICKED (regno) = -1; |
f356ea3f | 1878 | |
155b05dc | 1879 | if (regno >= FIRST_PSEUDO_REGISTER) |
d2c970fe | 1880 | remove_pseudo_from_table (x, hash); |
155b05dc | 1881 | else |
1882 | { | |
1883 | HOST_WIDE_INT in_table | |
1884 | = TEST_HARD_REG_BIT (hard_regs_in_table, regno); | |
788bed51 | 1885 | unsigned int endregno = END_REGNO (x); |
02e7a332 | 1886 | unsigned int tregno, tendregno, rn; |
19cb6b50 | 1887 | struct table_elt *p, *next; |
752df20e | 1888 | |
155b05dc | 1889 | CLEAR_HARD_REG_BIT (hard_regs_in_table, regno); |
752df20e | 1890 | |
02e7a332 | 1891 | for (rn = regno + 1; rn < endregno; rn++) |
155b05dc | 1892 | { |
02e7a332 | 1893 | in_table |= TEST_HARD_REG_BIT (hard_regs_in_table, rn); |
1894 | CLEAR_HARD_REG_BIT (hard_regs_in_table, rn); | |
1895 | delete_reg_equiv (rn); | |
1896 | REG_TICK (rn)++; | |
126fb012 | 1897 | SUBREG_TICKED (rn) = -1; |
155b05dc | 1898 | } |
752df20e | 1899 | |
155b05dc | 1900 | if (in_table) |
9c4f3716 | 1901 | for (hash = 0; hash < HASH_SIZE; hash++) |
155b05dc | 1902 | for (p = table[hash]; p; p = next) |
1903 | { | |
1904 | next = p->next_same_hash; | |
752df20e | 1905 | |
8ad4c111 | 1906 | if (!REG_P (p->exp) |
cb10db9d | 1907 | || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER) |
1908 | continue; | |
1909 | ||
155b05dc | 1910 | tregno = REGNO (p->exp); |
788bed51 | 1911 | tendregno = END_REGNO (p->exp); |
155b05dc | 1912 | if (tendregno > regno && tregno < endregno) |
1913 | remove_from_table (p, hash); | |
1914 | } | |
1915 | } | |
1916 | } | |
752df20e | 1917 | return; |
752df20e | 1918 | |
155b05dc | 1919 | case SUBREG: |
fdb25961 | 1920 | invalidate (SUBREG_REG (x), VOIDmode); |
752df20e | 1921 | return; |
6ede8018 | 1922 | |
155b05dc | 1923 | case PARALLEL: |
cb10db9d | 1924 | for (i = XVECLEN (x, 0) - 1; i >= 0; --i) |
6ede8018 | 1925 | invalidate (XVECEXP (x, 0, i), VOIDmode); |
1926 | return; | |
6ede8018 | 1927 | |
155b05dc | 1928 | case EXPR_LIST: |
1929 | /* This is part of a disjoint return value; extract the location in | |
1930 | question ignoring the offset. */ | |
6ede8018 | 1931 | invalidate (XEXP (x, 0), VOIDmode); |
1932 | return; | |
752df20e | 1933 | |
155b05dc | 1934 | case MEM: |
56bbdce4 | 1935 | addr = canon_rtx (get_addr (XEXP (x, 0))); |
7cfb9bcf | 1936 | /* Calculate the canonical version of X here so that |
1937 | true_dependence doesn't generate new RTL for X on each call. */ | |
1938 | x = canon_rtx (x); | |
1939 | ||
155b05dc | 1940 | /* Remove all hash table elements that refer to overlapping pieces of |
1941 | memory. */ | |
1942 | if (full_mode == VOIDmode) | |
1943 | full_mode = GET_MODE (x); | |
fdb25961 | 1944 | |
9c4f3716 | 1945 | for (i = 0; i < HASH_SIZE; i++) |
752df20e | 1946 | { |
19cb6b50 | 1947 | struct table_elt *next; |
155b05dc | 1948 | |
1949 | for (p = table[i]; p; p = next) | |
1950 | { | |
1951 | next = p->next_same_hash; | |
7cfb9bcf | 1952 | if (p->in_memory) |
1953 | { | |
02b0feeb | 1954 | /* Just canonicalize the expression once; |
1955 | otherwise each time we call invalidate | |
1956 | true_dependence will canonicalize the | |
1957 | expression again. */ | |
1958 | if (!p->canon_exp) | |
1959 | p->canon_exp = canon_rtx (p->exp); | |
e4a58c60 | 1960 | if (check_dependence (p->canon_exp, x, full_mode, addr)) |
7cfb9bcf | 1961 | remove_from_table (p, i); |
7cfb9bcf | 1962 | } |
155b05dc | 1963 | } |
752df20e | 1964 | } |
155b05dc | 1965 | return; |
1966 | ||
1967 | default: | |
cc636d56 | 1968 | gcc_unreachable (); |
752df20e | 1969 | } |
1970 | } | |
7a49a822 | 1971 | |
1972 | /* Invalidate DEST. Used when DEST is not going to be added | |
1973 | into the hash table for some reason, e.g. do_not_record | |
1974 | flagged on it. */ | |
1975 | ||
1976 | static void | |
1977 | invalidate_dest (rtx dest) | |
1978 | { | |
1979 | if (REG_P (dest) | |
1980 | || GET_CODE (dest) == SUBREG | |
1981 | || MEM_P (dest)) | |
1982 | invalidate (dest, VOIDmode); | |
1983 | else if (GET_CODE (dest) == STRICT_LOW_PART | |
1984 | || GET_CODE (dest) == ZERO_EXTRACT) | |
1985 | invalidate (XEXP (dest, 0), GET_MODE (dest)); | |
1986 | } | |
155b05dc | 1987 | \f |
752df20e | 1988 | /* Remove all expressions that refer to register REGNO, |
1989 | since they are already invalid, and we are about to | |
1990 | mark that register valid again and don't want the old | |
1991 | expressions to reappear as valid. */ | |
1992 | ||
1993 | static void | |
8ec3a57b | 1994 | remove_invalid_refs (unsigned int regno) |
752df20e | 1995 | { |
02e7a332 | 1996 | unsigned int i; |
1997 | struct table_elt *p, *next; | |
752df20e | 1998 | |
9c4f3716 | 1999 | for (i = 0; i < HASH_SIZE; i++) |
752df20e | 2000 | for (p = table[i]; p; p = next) |
2001 | { | |
2002 | next = p->next_same_hash; | |
2ec77a7c | 2003 | if (!REG_P (p->exp) && refers_to_regno_p (regno, p->exp)) |
752df20e | 2004 | remove_from_table (p, i); |
2005 | } | |
2006 | } | |
e6860d27 | 2007 | |
701e46d0 | 2008 | /* Likewise for a subreg with subreg_reg REGNO, subreg_byte OFFSET, |
2009 | and mode MODE. */ | |
e6860d27 | 2010 | static void |
8ec3a57b | 2011 | remove_invalid_subreg_refs (unsigned int regno, unsigned int offset, |
3754d046 | 2012 | machine_mode mode) |
e6860d27 | 2013 | { |
02e7a332 | 2014 | unsigned int i; |
2015 | struct table_elt *p, *next; | |
701e46d0 | 2016 | unsigned int end = offset + (GET_MODE_SIZE (mode) - 1); |
e6860d27 | 2017 | |
9c4f3716 | 2018 | for (i = 0; i < HASH_SIZE; i++) |
e6860d27 | 2019 | for (p = table[i]; p; p = next) |
2020 | { | |
701e46d0 | 2021 | rtx exp = p->exp; |
e6860d27 | 2022 | next = p->next_same_hash; |
cb10db9d | 2023 | |
8ad4c111 | 2024 | if (!REG_P (exp) |
e6860d27 | 2025 | && (GET_CODE (exp) != SUBREG |
8ad4c111 | 2026 | || !REG_P (SUBREG_REG (exp)) |
e6860d27 | 2027 | || REGNO (SUBREG_REG (exp)) != regno |
701e46d0 | 2028 | || (((SUBREG_BYTE (exp) |
2029 | + (GET_MODE_SIZE (GET_MODE (exp)) - 1)) >= offset) | |
2030 | && SUBREG_BYTE (exp) <= end)) | |
2ec77a7c | 2031 | && refers_to_regno_p (regno, p->exp)) |
e6860d27 | 2032 | remove_from_table (p, i); |
2033 | } | |
2034 | } | |
752df20e | 2035 | \f |
2036 | /* Recompute the hash codes of any valid entries in the hash table that | |
2037 | reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG. | |
2038 | ||
2039 | This is called when we make a jump equivalence. */ | |
2040 | ||
2041 | static void | |
8ec3a57b | 2042 | rehash_using_reg (rtx x) |
752df20e | 2043 | { |
3c1d7436 | 2044 | unsigned int i; |
752df20e | 2045 | struct table_elt *p, *next; |
952bc06d | 2046 | unsigned hash; |
752df20e | 2047 | |
2048 | if (GET_CODE (x) == SUBREG) | |
2049 | x = SUBREG_REG (x); | |
2050 | ||
2051 | /* If X is not a register or if the register is known not to be in any | |
2052 | valid entries in the table, we have no work to do. */ | |
2053 | ||
8ad4c111 | 2054 | if (!REG_P (x) |
d1264606 | 2055 | || REG_IN_TABLE (REGNO (x)) < 0 |
2056 | || REG_IN_TABLE (REGNO (x)) != REG_TICK (REGNO (x))) | |
752df20e | 2057 | return; |
2058 | ||
2059 | /* Scan all hash chains looking for valid entries that mention X. | |
b57e33a4 | 2060 | If we find one and it is in the wrong hash chain, move it. */ |
752df20e | 2061 | |
9c4f3716 | 2062 | for (i = 0; i < HASH_SIZE; i++) |
752df20e | 2063 | for (p = table[i]; p; p = next) |
2064 | { | |
2065 | next = p->next_same_hash; | |
b57e33a4 | 2066 | if (reg_mentioned_p (x, p->exp) |
78d140c9 | 2067 | && exp_equiv_p (p->exp, p->exp, 1, false) |
2068 | && i != (hash = SAFE_HASH (p->exp, p->mode))) | |
752df20e | 2069 | { |
2070 | if (p->next_same_hash) | |
2071 | p->next_same_hash->prev_same_hash = p->prev_same_hash; | |
2072 | ||
2073 | if (p->prev_same_hash) | |
2074 | p->prev_same_hash->next_same_hash = p->next_same_hash; | |
2075 | else | |
2076 | table[i] = p->next_same_hash; | |
2077 | ||
2078 | p->next_same_hash = table[hash]; | |
2079 | p->prev_same_hash = 0; | |
2080 | if (table[hash]) | |
2081 | table[hash]->prev_same_hash = p; | |
2082 | table[hash] = p; | |
2083 | } | |
2084 | } | |
2085 | } | |
2086 | \f | |
752df20e | 2087 | /* Remove from the hash table any expression that is a call-clobbered |
2088 | register. Also update their TICK values. */ | |
2089 | ||
2090 | static void | |
8ec3a57b | 2091 | invalidate_for_call (void) |
752df20e | 2092 | { |
02e7a332 | 2093 | unsigned int regno, endregno; |
2094 | unsigned int i; | |
952bc06d | 2095 | unsigned hash; |
752df20e | 2096 | struct table_elt *p, *next; |
2097 | int in_table = 0; | |
24ec6636 | 2098 | hard_reg_set_iterator hrsi; |
752df20e | 2099 | |
2100 | /* Go through all the hard registers. For each that is clobbered in | |
2101 | a CALL_INSN, remove the register from quantity chains and update | |
2102 | reg_tick if defined. Also see if any of these registers is currently | |
2103 | in the table. */ | |
24ec6636 | 2104 | EXECUTE_IF_SET_IN_HARD_REG_SET (regs_invalidated_by_call, 0, regno, hrsi) |
2105 | { | |
2106 | delete_reg_equiv (regno); | |
2107 | if (REG_TICK (regno) >= 0) | |
2108 | { | |
2109 | REG_TICK (regno)++; | |
2110 | SUBREG_TICKED (regno) = -1; | |
2111 | } | |
2112 | in_table |= (TEST_HARD_REG_BIT (hard_regs_in_table, regno) != 0); | |
2113 | } | |
752df20e | 2114 | |
2115 | /* In the case where we have no call-clobbered hard registers in the | |
2116 | table, we are done. Otherwise, scan the table and remove any | |
2117 | entry that overlaps a call-clobbered register. */ | |
2118 | ||
2119 | if (in_table) | |
9c4f3716 | 2120 | for (hash = 0; hash < HASH_SIZE; hash++) |
752df20e | 2121 | for (p = table[hash]; p; p = next) |
2122 | { | |
2123 | next = p->next_same_hash; | |
2124 | ||
8ad4c111 | 2125 | if (!REG_P (p->exp) |
752df20e | 2126 | || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER) |
2127 | continue; | |
2128 | ||
2129 | regno = REGNO (p->exp); | |
788bed51 | 2130 | endregno = END_REGNO (p->exp); |
752df20e | 2131 | |
2132 | for (i = regno; i < endregno; i++) | |
2133 | if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i)) | |
2134 | { | |
2135 | remove_from_table (p, hash); | |
2136 | break; | |
2137 | } | |
2138 | } | |
2139 | } | |
2140 | \f | |
2141 | /* Given an expression X of type CONST, | |
2142 | and ELT which is its table entry (or 0 if it | |
2143 | is not in the hash table), | |
2144 | return an alternate expression for X as a register plus integer. | |
2145 | If none can be found, return 0. */ | |
2146 | ||
2147 | static rtx | |
8ec3a57b | 2148 | use_related_value (rtx x, struct table_elt *elt) |
752df20e | 2149 | { |
19cb6b50 | 2150 | struct table_elt *relt = 0; |
2151 | struct table_elt *p, *q; | |
b572011e | 2152 | HOST_WIDE_INT offset; |
752df20e | 2153 | |
2154 | /* First, is there anything related known? | |
2155 | If we have a table element, we can tell from that. | |
2156 | Otherwise, must look it up. */ | |
2157 | ||
2158 | if (elt != 0 && elt->related_value != 0) | |
2159 | relt = elt; | |
2160 | else if (elt == 0 && GET_CODE (x) == CONST) | |
2161 | { | |
2162 | rtx subexp = get_related_value (x); | |
2163 | if (subexp != 0) | |
2164 | relt = lookup (subexp, | |
78d140c9 | 2165 | SAFE_HASH (subexp, GET_MODE (subexp)), |
752df20e | 2166 | GET_MODE (subexp)); |
2167 | } | |
2168 | ||
2169 | if (relt == 0) | |
2170 | return 0; | |
2171 | ||
2172 | /* Search all related table entries for one that has an | |
2173 | equivalent register. */ | |
2174 | ||
2175 | p = relt; | |
2176 | while (1) | |
2177 | { | |
2178 | /* This loop is strange in that it is executed in two different cases. | |
2179 | The first is when X is already in the table. Then it is searching | |
2180 | the RELATED_VALUE list of X's class (RELT). The second case is when | |
2181 | X is not in the table. Then RELT points to a class for the related | |
2182 | value. | |
2183 | ||
2184 | Ensure that, whatever case we are in, that we ignore classes that have | |
2185 | the same value as X. */ | |
2186 | ||
2187 | if (rtx_equal_p (x, p->exp)) | |
2188 | q = 0; | |
2189 | else | |
2190 | for (q = p->first_same_value; q; q = q->next_same_value) | |
8ad4c111 | 2191 | if (REG_P (q->exp)) |
752df20e | 2192 | break; |
2193 | ||
2194 | if (q) | |
2195 | break; | |
2196 | ||
2197 | p = p->related_value; | |
2198 | ||
2199 | /* We went all the way around, so there is nothing to be found. | |
2200 | Alternatively, perhaps RELT was in the table for some other reason | |
2201 | and it has no related values recorded. */ | |
2202 | if (p == relt || p == 0) | |
2203 | break; | |
2204 | } | |
2205 | ||
2206 | if (q == 0) | |
2207 | return 0; | |
2208 | ||
2209 | offset = (get_integer_term (x) - get_integer_term (p->exp)); | |
2210 | /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */ | |
29c05e22 | 2211 | return plus_constant (q->mode, q->exp, offset); |
752df20e | 2212 | } |
2213 | \f | |
e1ab7874 | 2214 | |
d91f2122 | 2215 | /* Hash a string. Just add its bytes up. */ |
2216 | static inline unsigned | |
78d140c9 | 2217 | hash_rtx_string (const char *ps) |
d91f2122 | 2218 | { |
2219 | unsigned hash = 0; | |
d4c5e26d | 2220 | const unsigned char *p = (const unsigned char *) ps; |
2221 | ||
d91f2122 | 2222 | if (p) |
2223 | while (*p) | |
2224 | hash += *p++; | |
2225 | ||
2226 | return hash; | |
2227 | } | |
2228 | ||
48e1416a | 2229 | /* Same as hash_rtx, but call CB on each rtx if it is not NULL. |
e1ab7874 | 2230 | When the callback returns true, we continue with the new rtx. */ |
752df20e | 2231 | |
78d140c9 | 2232 | unsigned |
3754d046 | 2233 | hash_rtx_cb (const_rtx x, machine_mode mode, |
e1ab7874 | 2234 | int *do_not_record_p, int *hash_arg_in_memory_p, |
2235 | bool have_reg_qty, hash_rtx_callback_function cb) | |
752df20e | 2236 | { |
19cb6b50 | 2237 | int i, j; |
2238 | unsigned hash = 0; | |
2239 | enum rtx_code code; | |
2240 | const char *fmt; | |
3754d046 | 2241 | machine_mode newmode; |
e1ab7874 | 2242 | rtx newx; |
752df20e | 2243 | |
78d140c9 | 2244 | /* Used to turn recursion into iteration. We can't rely on GCC's |
2245 | tail-recursion elimination since we need to keep accumulating values | |
2246 | in HASH. */ | |
752df20e | 2247 | repeat: |
2248 | if (x == 0) | |
2249 | return hash; | |
2250 | ||
e1ab7874 | 2251 | /* Invoke the callback first. */ |
48e1416a | 2252 | if (cb != NULL |
e1ab7874 | 2253 | && ((*cb) (x, mode, &newx, &newmode))) |
2254 | { | |
2255 | hash += hash_rtx_cb (newx, newmode, do_not_record_p, | |
2256 | hash_arg_in_memory_p, have_reg_qty, cb); | |
2257 | return hash; | |
2258 | } | |
2259 | ||
752df20e | 2260 | code = GET_CODE (x); |
2261 | switch (code) | |
2262 | { | |
2263 | case REG: | |
2264 | { | |
02e7a332 | 2265 | unsigned int regno = REGNO (x); |
752df20e | 2266 | |
e1ab7874 | 2267 | if (do_not_record_p && !reload_completed) |
752df20e | 2268 | { |
78d140c9 | 2269 | /* On some machines, we can't record any non-fixed hard register, |
2270 | because extending its life will cause reload problems. We | |
2271 | consider ap, fp, sp, gp to be fixed for this purpose. | |
2272 | ||
2273 | We also consider CCmode registers to be fixed for this purpose; | |
2274 | failure to do so leads to failure to simplify 0<100 type of | |
2275 | conditionals. | |
2276 | ||
2277 | On all machines, we can't record any global registers. | |
2278 | Nor should we record any register that is in a small | |
24dd0668 | 2279 | class, as defined by TARGET_CLASS_LIKELY_SPILLED_P. */ |
78d140c9 | 2280 | bool record; |
2281 | ||
2282 | if (regno >= FIRST_PSEUDO_REGISTER) | |
2283 | record = true; | |
2284 | else if (x == frame_pointer_rtx | |
2285 | || x == hard_frame_pointer_rtx | |
2286 | || x == arg_pointer_rtx | |
2287 | || x == stack_pointer_rtx | |
2288 | || x == pic_offset_table_rtx) | |
2289 | record = true; | |
2290 | else if (global_regs[regno]) | |
2291 | record = false; | |
2292 | else if (fixed_regs[regno]) | |
2293 | record = true; | |
2294 | else if (GET_MODE_CLASS (GET_MODE (x)) == MODE_CC) | |
2295 | record = true; | |
ed5527ca | 2296 | else if (targetm.small_register_classes_for_mode_p (GET_MODE (x))) |
78d140c9 | 2297 | record = false; |
24dd0668 | 2298 | else if (targetm.class_likely_spilled_p (REGNO_REG_CLASS (regno))) |
78d140c9 | 2299 | record = false; |
2300 | else | |
2301 | record = true; | |
2302 | ||
2303 | if (!record) | |
2304 | { | |
2305 | *do_not_record_p = 1; | |
2306 | return 0; | |
2307 | } | |
752df20e | 2308 | } |
02e7a332 | 2309 | |
78d140c9 | 2310 | hash += ((unsigned int) REG << 7); |
2311 | hash += (have_reg_qty ? (unsigned) REG_QTY (regno) : regno); | |
952bc06d | 2312 | return hash; |
752df20e | 2313 | } |
2314 | ||
e6860d27 | 2315 | /* We handle SUBREG of a REG specially because the underlying |
2316 | reg changes its hash value with every value change; we don't | |
2317 | want to have to forget unrelated subregs when one subreg changes. */ | |
2318 | case SUBREG: | |
2319 | { | |
8ad4c111 | 2320 | if (REG_P (SUBREG_REG (x))) |
e6860d27 | 2321 | { |
78d140c9 | 2322 | hash += (((unsigned int) SUBREG << 7) |
701e46d0 | 2323 | + REGNO (SUBREG_REG (x)) |
2324 | + (SUBREG_BYTE (x) / UNITS_PER_WORD)); | |
e6860d27 | 2325 | return hash; |
2326 | } | |
2327 | break; | |
2328 | } | |
2329 | ||
752df20e | 2330 | case CONST_INT: |
78d140c9 | 2331 | hash += (((unsigned int) CONST_INT << 7) + (unsigned int) mode |
2332 | + (unsigned int) INTVAL (x)); | |
2333 | return hash; | |
752df20e | 2334 | |
e913b5cd | 2335 | case CONST_WIDE_INT: |
c4050ce7 | 2336 | for (i = 0; i < CONST_WIDE_INT_NUNITS (x); i++) |
2337 | hash += CONST_WIDE_INT_ELT (x, i); | |
e913b5cd | 2338 | return hash; |
2339 | ||
752df20e | 2340 | case CONST_DOUBLE: |
2341 | /* This is like the general case, except that it only counts | |
2342 | the integers representing the constant. */ | |
78d140c9 | 2343 | hash += (unsigned int) code + (unsigned int) GET_MODE (x); |
e913b5cd | 2344 | if (TARGET_SUPPORTS_WIDE_INT == 0 && GET_MODE (x) == VOIDmode) |
78d140c9 | 2345 | hash += ((unsigned int) CONST_DOUBLE_LOW (x) |
2346 | + (unsigned int) CONST_DOUBLE_HIGH (x)); | |
e913b5cd | 2347 | else |
2348 | hash += real_hash (CONST_DOUBLE_REAL_VALUE (x)); | |
752df20e | 2349 | return hash; |
2350 | ||
e397ad8e | 2351 | case CONST_FIXED: |
2352 | hash += (unsigned int) code + (unsigned int) GET_MODE (x); | |
2353 | hash += fixed_hash (CONST_FIXED_VALUE (x)); | |
2354 | return hash; | |
2355 | ||
886cfd4f | 2356 | case CONST_VECTOR: |
2357 | { | |
2358 | int units; | |
2359 | rtx elt; | |
2360 | ||
2361 | units = CONST_VECTOR_NUNITS (x); | |
2362 | ||
2363 | for (i = 0; i < units; ++i) | |
2364 | { | |
2365 | elt = CONST_VECTOR_ELT (x, i); | |
e1ab7874 | 2366 | hash += hash_rtx_cb (elt, GET_MODE (elt), |
48e1416a | 2367 | do_not_record_p, hash_arg_in_memory_p, |
e1ab7874 | 2368 | have_reg_qty, cb); |
886cfd4f | 2369 | } |
2370 | ||
2371 | return hash; | |
2372 | } | |
2373 | ||
752df20e | 2374 | /* Assume there is only one rtx object for any given label. */ |
2375 | case LABEL_REF: | |
78d140c9 | 2376 | /* We don't hash on the address of the CODE_LABEL to avoid bootstrap |
2377 | differences and differences between each stage's debugging dumps. */ | |
2378 | hash += (((unsigned int) LABEL_REF << 7) | |
b49f2e4b | 2379 | + CODE_LABEL_NUMBER (LABEL_REF_LABEL (x))); |
952bc06d | 2380 | return hash; |
752df20e | 2381 | |
2382 | case SYMBOL_REF: | |
78d140c9 | 2383 | { |
2384 | /* Don't hash on the symbol's address to avoid bootstrap differences. | |
2385 | Different hash values may cause expressions to be recorded in | |
2386 | different orders and thus different registers to be used in the | |
2387 | final assembler. This also avoids differences in the dump files | |
2388 | between various stages. */ | |
2389 | unsigned int h = 0; | |
2390 | const unsigned char *p = (const unsigned char *) XSTR (x, 0); | |
2391 | ||
2392 | while (*p) | |
2393 | h += (h << 7) + *p++; /* ??? revisit */ | |
2394 | ||
2395 | hash += ((unsigned int) SYMBOL_REF << 7) + h; | |
2396 | return hash; | |
2397 | } | |
752df20e | 2398 | |
2399 | case MEM: | |
155b05dc | 2400 | /* We don't record if marked volatile or if BLKmode since we don't |
2401 | know the size of the move. */ | |
e1ab7874 | 2402 | if (do_not_record_p && (MEM_VOLATILE_P (x) || GET_MODE (x) == BLKmode)) |
752df20e | 2403 | { |
78d140c9 | 2404 | *do_not_record_p = 1; |
752df20e | 2405 | return 0; |
2406 | } | |
78d140c9 | 2407 | if (hash_arg_in_memory_p && !MEM_READONLY_P (x)) |
2408 | *hash_arg_in_memory_p = 1; | |
805e22b2 | 2409 | |
752df20e | 2410 | /* Now that we have already found this special case, |
2411 | might as well speed it up as much as possible. */ | |
952bc06d | 2412 | hash += (unsigned) MEM; |
752df20e | 2413 | x = XEXP (x, 0); |
2414 | goto repeat; | |
2415 | ||
7002e559 | 2416 | case USE: |
2417 | /* A USE that mentions non-volatile memory needs special | |
2418 | handling since the MEM may be BLKmode which normally | |
2419 | prevents an entry from being made. Pure calls are | |
78d140c9 | 2420 | marked by a USE which mentions BLKmode memory. |
2421 | See calls.c:emit_call_1. */ | |
e16ceb8e | 2422 | if (MEM_P (XEXP (x, 0)) |
7002e559 | 2423 | && ! MEM_VOLATILE_P (XEXP (x, 0))) |
2424 | { | |
d4c5e26d | 2425 | hash += (unsigned) USE; |
7002e559 | 2426 | x = XEXP (x, 0); |
2427 | ||
78d140c9 | 2428 | if (hash_arg_in_memory_p && !MEM_READONLY_P (x)) |
2429 | *hash_arg_in_memory_p = 1; | |
7002e559 | 2430 | |
2431 | /* Now that we have already found this special case, | |
2432 | might as well speed it up as much as possible. */ | |
2433 | hash += (unsigned) MEM; | |
2434 | x = XEXP (x, 0); | |
2435 | goto repeat; | |
2436 | } | |
2437 | break; | |
2438 | ||
752df20e | 2439 | case PRE_DEC: |
2440 | case PRE_INC: | |
2441 | case POST_DEC: | |
2442 | case POST_INC: | |
40988080 | 2443 | case PRE_MODIFY: |
2444 | case POST_MODIFY: | |
752df20e | 2445 | case PC: |
2446 | case CC0: | |
2447 | case CALL: | |
2448 | case UNSPEC_VOLATILE: | |
e1ab7874 | 2449 | if (do_not_record_p) { |
2450 | *do_not_record_p = 1; | |
2451 | return 0; | |
2452 | } | |
2453 | else | |
2454 | return hash; | |
2455 | break; | |
752df20e | 2456 | |
2457 | case ASM_OPERANDS: | |
e1ab7874 | 2458 | if (do_not_record_p && MEM_VOLATILE_P (x)) |
752df20e | 2459 | { |
78d140c9 | 2460 | *do_not_record_p = 1; |
752df20e | 2461 | return 0; |
2462 | } | |
d91f2122 | 2463 | else |
2464 | { | |
2465 | /* We don't want to take the filename and line into account. */ | |
2466 | hash += (unsigned) code + (unsigned) GET_MODE (x) | |
78d140c9 | 2467 | + hash_rtx_string (ASM_OPERANDS_TEMPLATE (x)) |
2468 | + hash_rtx_string (ASM_OPERANDS_OUTPUT_CONSTRAINT (x)) | |
d91f2122 | 2469 | + (unsigned) ASM_OPERANDS_OUTPUT_IDX (x); |
2470 | ||
2471 | if (ASM_OPERANDS_INPUT_LENGTH (x)) | |
2472 | { | |
2473 | for (i = 1; i < ASM_OPERANDS_INPUT_LENGTH (x); i++) | |
2474 | { | |
e1ab7874 | 2475 | hash += (hash_rtx_cb (ASM_OPERANDS_INPUT (x, i), |
2476 | GET_MODE (ASM_OPERANDS_INPUT (x, i)), | |
2477 | do_not_record_p, hash_arg_in_memory_p, | |
2478 | have_reg_qty, cb) | |
78d140c9 | 2479 | + hash_rtx_string |
e1ab7874 | 2480 | (ASM_OPERANDS_INPUT_CONSTRAINT (x, i))); |
d91f2122 | 2481 | } |
2482 | ||
78d140c9 | 2483 | hash += hash_rtx_string (ASM_OPERANDS_INPUT_CONSTRAINT (x, 0)); |
d91f2122 | 2484 | x = ASM_OPERANDS_INPUT (x, 0); |
2485 | mode = GET_MODE (x); | |
2486 | goto repeat; | |
2487 | } | |
2488 | ||
2489 | return hash; | |
2490 | } | |
0dbd1c74 | 2491 | break; |
cb10db9d | 2492 | |
0dbd1c74 | 2493 | default: |
2494 | break; | |
752df20e | 2495 | } |
2496 | ||
2497 | i = GET_RTX_LENGTH (code) - 1; | |
952bc06d | 2498 | hash += (unsigned) code + (unsigned) GET_MODE (x); |
752df20e | 2499 | fmt = GET_RTX_FORMAT (code); |
2500 | for (; i >= 0; i--) | |
2501 | { | |
cc636d56 | 2502 | switch (fmt[i]) |
752df20e | 2503 | { |
cc636d56 | 2504 | case 'e': |
752df20e | 2505 | /* If we are about to do the last recursive call |
2506 | needed at this level, change it into iteration. | |
2507 | This function is called enough to be worth it. */ | |
2508 | if (i == 0) | |
2509 | { | |
78d140c9 | 2510 | x = XEXP (x, i); |
752df20e | 2511 | goto repeat; |
2512 | } | |
48e1416a | 2513 | |
b9c74b4d | 2514 | hash += hash_rtx_cb (XEXP (x, i), VOIDmode, do_not_record_p, |
e1ab7874 | 2515 | hash_arg_in_memory_p, |
2516 | have_reg_qty, cb); | |
cc636d56 | 2517 | break; |
78d140c9 | 2518 | |
cc636d56 | 2519 | case 'E': |
2520 | for (j = 0; j < XVECLEN (x, i); j++) | |
b9c74b4d | 2521 | hash += hash_rtx_cb (XVECEXP (x, i, j), VOIDmode, do_not_record_p, |
e1ab7874 | 2522 | hash_arg_in_memory_p, |
2523 | have_reg_qty, cb); | |
cc636d56 | 2524 | break; |
78d140c9 | 2525 | |
cc636d56 | 2526 | case 's': |
2527 | hash += hash_rtx_string (XSTR (x, i)); | |
2528 | break; | |
2529 | ||
2530 | case 'i': | |
2531 | hash += (unsigned int) XINT (x, i); | |
2532 | break; | |
2533 | ||
2534 | case '0': case 't': | |
2535 | /* Unused. */ | |
2536 | break; | |
2537 | ||
2538 | default: | |
2539 | gcc_unreachable (); | |
2540 | } | |
752df20e | 2541 | } |
78d140c9 | 2542 | |
752df20e | 2543 | return hash; |
2544 | } | |
2545 | ||
e1ab7874 | 2546 | /* Hash an rtx. We are careful to make sure the value is never negative. |
2547 | Equivalent registers hash identically. | |
2548 | MODE is used in hashing for CONST_INTs only; | |
2549 | otherwise the mode of X is used. | |
2550 | ||
2551 | Store 1 in DO_NOT_RECORD_P if any subexpression is volatile. | |
2552 | ||
2553 | If HASH_ARG_IN_MEMORY_P is not NULL, store 1 in it if X contains | |
2e444733 | 2554 | a MEM rtx which does not have the MEM_READONLY_P flag set. |
e1ab7874 | 2555 | |
2556 | Note that cse_insn knows that the hash code of a MEM expression | |
2557 | is just (int) MEM plus the hash code of the address. */ | |
2558 | ||
2559 | unsigned | |
3754d046 | 2560 | hash_rtx (const_rtx x, machine_mode mode, int *do_not_record_p, |
e1ab7874 | 2561 | int *hash_arg_in_memory_p, bool have_reg_qty) |
2562 | { | |
2563 | return hash_rtx_cb (x, mode, do_not_record_p, | |
2564 | hash_arg_in_memory_p, have_reg_qty, NULL); | |
2565 | } | |
2566 | ||
78d140c9 | 2567 | /* Hash an rtx X for cse via hash_rtx. |
2568 | Stores 1 in do_not_record if any subexpression is volatile. | |
2569 | Stores 1 in hash_arg_in_memory if X contains a mem rtx which | |
2e444733 | 2570 | does not have the MEM_READONLY_P flag set. */ |
78d140c9 | 2571 | |
2572 | static inline unsigned | |
3754d046 | 2573 | canon_hash (rtx x, machine_mode mode) |
78d140c9 | 2574 | { |
2575 | return hash_rtx (x, mode, &do_not_record, &hash_arg_in_memory, true); | |
2576 | } | |
2577 | ||
2578 | /* Like canon_hash but with no side effects, i.e. do_not_record | |
2579 | and hash_arg_in_memory are not changed. */ | |
752df20e | 2580 | |
78d140c9 | 2581 | static inline unsigned |
3754d046 | 2582 | safe_hash (rtx x, machine_mode mode) |
752df20e | 2583 | { |
78d140c9 | 2584 | int dummy_do_not_record; |
2585 | return hash_rtx (x, mode, &dummy_do_not_record, NULL, true); | |
752df20e | 2586 | } |
2587 | \f | |
2588 | /* Return 1 iff X and Y would canonicalize into the same thing, | |
2589 | without actually constructing the canonicalization of either one. | |
2590 | If VALIDATE is nonzero, | |
2591 | we assume X is an expression being processed from the rtl | |
2592 | and Y was found in the hash table. We check register refs | |
2593 | in Y for being marked as valid. | |
2594 | ||
78d140c9 | 2595 | If FOR_GCSE is true, we compare X and Y for equivalence for GCSE. */ |
752df20e | 2596 | |
78d140c9 | 2597 | int |
52d07779 | 2598 | exp_equiv_p (const_rtx x, const_rtx y, int validate, bool for_gcse) |
752df20e | 2599 | { |
19cb6b50 | 2600 | int i, j; |
2601 | enum rtx_code code; | |
2602 | const char *fmt; | |
752df20e | 2603 | |
2604 | /* Note: it is incorrect to assume an expression is equivalent to itself | |
2605 | if VALIDATE is nonzero. */ | |
2606 | if (x == y && !validate) | |
2607 | return 1; | |
78d140c9 | 2608 | |
752df20e | 2609 | if (x == 0 || y == 0) |
2610 | return x == y; | |
2611 | ||
2612 | code = GET_CODE (x); | |
2613 | if (code != GET_CODE (y)) | |
78d140c9 | 2614 | return 0; |
752df20e | 2615 | |
2616 | /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */ | |
2617 | if (GET_MODE (x) != GET_MODE (y)) | |
2618 | return 0; | |
2619 | ||
04ec15fa | 2620 | /* MEMs referring to different address space are not equivalent. */ |
bd1a81f7 | 2621 | if (code == MEM && MEM_ADDR_SPACE (x) != MEM_ADDR_SPACE (y)) |
2622 | return 0; | |
2623 | ||
752df20e | 2624 | switch (code) |
2625 | { | |
2626 | case PC: | |
2627 | case CC0: | |
0349edce | 2628 | CASE_CONST_UNIQUE: |
73f5c1e3 | 2629 | return x == y; |
752df20e | 2630 | |
2631 | case LABEL_REF: | |
b49f2e4b | 2632 | return LABEL_REF_LABEL (x) == LABEL_REF_LABEL (y); |
752df20e | 2633 | |
d1a40e76 | 2634 | case SYMBOL_REF: |
2635 | return XSTR (x, 0) == XSTR (y, 0); | |
2636 | ||
752df20e | 2637 | case REG: |
78d140c9 | 2638 | if (for_gcse) |
2639 | return REGNO (x) == REGNO (y); | |
2640 | else | |
2641 | { | |
2642 | unsigned int regno = REGNO (y); | |
2643 | unsigned int i; | |
a2c6f0b7 | 2644 | unsigned int endregno = END_REGNO (y); |
752df20e | 2645 | |
78d140c9 | 2646 | /* If the quantities are not the same, the expressions are not |
2647 | equivalent. If there are and we are not to validate, they | |
2648 | are equivalent. Otherwise, ensure all regs are up-to-date. */ | |
752df20e | 2649 | |
78d140c9 | 2650 | if (REG_QTY (REGNO (x)) != REG_QTY (regno)) |
2651 | return 0; | |
2652 | ||
2653 | if (! validate) | |
2654 | return 1; | |
2655 | ||
2656 | for (i = regno; i < endregno; i++) | |
2657 | if (REG_IN_TABLE (i) != REG_TICK (i)) | |
2658 | return 0; | |
752df20e | 2659 | |
752df20e | 2660 | return 1; |
78d140c9 | 2661 | } |
752df20e | 2662 | |
78d140c9 | 2663 | case MEM: |
2664 | if (for_gcse) | |
2665 | { | |
78d140c9 | 2666 | /* A volatile mem should not be considered equivalent to any |
2667 | other. */ | |
2668 | if (MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y)) | |
2669 | return 0; | |
a79761ff | 2670 | |
2671 | /* Can't merge two expressions in different alias sets, since we | |
2672 | can decide that the expression is transparent in a block when | |
2673 | it isn't, due to it being set with the different alias set. | |
2674 | ||
2675 | Also, can't merge two expressions with different MEM_ATTRS. | |
2676 | They could e.g. be two different entities allocated into the | |
2677 | same space on the stack (see e.g. PR25130). In that case, the | |
2678 | MEM addresses can be the same, even though the two MEMs are | |
2679 | absolutely not equivalent. | |
2680 | ||
2681 | But because really all MEM attributes should be the same for | |
2682 | equivalent MEMs, we just use the invariant that MEMs that have | |
2683 | the same attributes share the same mem_attrs data structure. */ | |
7e304b71 | 2684 | if (!mem_attrs_eq_p (MEM_ATTRS (x), MEM_ATTRS (y))) |
a79761ff | 2685 | return 0; |
4ee783fc | 2686 | |
2687 | /* If we are handling exceptions, we cannot consider two expressions | |
2688 | with different trapping status as equivalent, because simple_mem | |
2689 | might accept one and reject the other. */ | |
2690 | if (cfun->can_throw_non_call_exceptions | |
2691 | && (MEM_NOTRAP_P (x) != MEM_NOTRAP_P (y))) | |
2692 | return 0; | |
78d140c9 | 2693 | } |
2694 | break; | |
752df20e | 2695 | |
2696 | /* For commutative operations, check both orders. */ | |
2697 | case PLUS: | |
2698 | case MULT: | |
2699 | case AND: | |
2700 | case IOR: | |
2701 | case XOR: | |
2702 | case NE: | |
2703 | case EQ: | |
78d140c9 | 2704 | return ((exp_equiv_p (XEXP (x, 0), XEXP (y, 0), |
2705 | validate, for_gcse) | |
752df20e | 2706 | && exp_equiv_p (XEXP (x, 1), XEXP (y, 1), |
78d140c9 | 2707 | validate, for_gcse)) |
752df20e | 2708 | || (exp_equiv_p (XEXP (x, 0), XEXP (y, 1), |
78d140c9 | 2709 | validate, for_gcse) |
752df20e | 2710 | && exp_equiv_p (XEXP (x, 1), XEXP (y, 0), |
78d140c9 | 2711 | validate, for_gcse))); |
cb10db9d | 2712 | |
d91f2122 | 2713 | case ASM_OPERANDS: |
2714 | /* We don't use the generic code below because we want to | |
2715 | disregard filename and line numbers. */ | |
2716 | ||
2717 | /* A volatile asm isn't equivalent to any other. */ | |
2718 | if (MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y)) | |
2719 | return 0; | |
2720 | ||
2721 | if (GET_MODE (x) != GET_MODE (y) | |
2722 | || strcmp (ASM_OPERANDS_TEMPLATE (x), ASM_OPERANDS_TEMPLATE (y)) | |
2723 | || strcmp (ASM_OPERANDS_OUTPUT_CONSTRAINT (x), | |
2724 | ASM_OPERANDS_OUTPUT_CONSTRAINT (y)) | |
2725 | || ASM_OPERANDS_OUTPUT_IDX (x) != ASM_OPERANDS_OUTPUT_IDX (y) | |
2726 | || ASM_OPERANDS_INPUT_LENGTH (x) != ASM_OPERANDS_INPUT_LENGTH (y)) | |
2727 | return 0; | |
2728 | ||
2729 | if (ASM_OPERANDS_INPUT_LENGTH (x)) | |
2730 | { | |
2731 | for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--) | |
2732 | if (! exp_equiv_p (ASM_OPERANDS_INPUT (x, i), | |
2733 | ASM_OPERANDS_INPUT (y, i), | |
78d140c9 | 2734 | validate, for_gcse) |
d91f2122 | 2735 | || strcmp (ASM_OPERANDS_INPUT_CONSTRAINT (x, i), |
2736 | ASM_OPERANDS_INPUT_CONSTRAINT (y, i))) | |
2737 | return 0; | |
2738 | } | |
2739 | ||
2740 | return 1; | |
2741 | ||
0dbd1c74 | 2742 | default: |
2743 | break; | |
752df20e | 2744 | } |
2745 | ||
2746 | /* Compare the elements. If any pair of corresponding elements | |
78d140c9 | 2747 | fail to match, return 0 for the whole thing. */ |
752df20e | 2748 | |
2749 | fmt = GET_RTX_FORMAT (code); | |
2750 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
2751 | { | |
b572011e | 2752 | switch (fmt[i]) |
752df20e | 2753 | { |
b572011e | 2754 | case 'e': |
78d140c9 | 2755 | if (! exp_equiv_p (XEXP (x, i), XEXP (y, i), |
2756 | validate, for_gcse)) | |
752df20e | 2757 | return 0; |
b572011e | 2758 | break; |
2759 | ||
2760 | case 'E': | |
752df20e | 2761 | if (XVECLEN (x, i) != XVECLEN (y, i)) |
2762 | return 0; | |
2763 | for (j = 0; j < XVECLEN (x, i); j++) | |
2764 | if (! exp_equiv_p (XVECEXP (x, i, j), XVECEXP (y, i, j), | |
78d140c9 | 2765 | validate, for_gcse)) |
752df20e | 2766 | return 0; |
b572011e | 2767 | break; |
2768 | ||
2769 | case 's': | |
752df20e | 2770 | if (strcmp (XSTR (x, i), XSTR (y, i))) |
2771 | return 0; | |
b572011e | 2772 | break; |
2773 | ||
2774 | case 'i': | |
752df20e | 2775 | if (XINT (x, i) != XINT (y, i)) |
2776 | return 0; | |
b572011e | 2777 | break; |
2778 | ||
2779 | case 'w': | |
2780 | if (XWINT (x, i) != XWINT (y, i)) | |
2781 | return 0; | |
cb10db9d | 2782 | break; |
b572011e | 2783 | |
2784 | case '0': | |
a4070a91 | 2785 | case 't': |
b572011e | 2786 | break; |
2787 | ||
2788 | default: | |
cc636d56 | 2789 | gcc_unreachable (); |
752df20e | 2790 | } |
cb10db9d | 2791 | } |
b572011e | 2792 | |
752df20e | 2793 | return 1; |
2794 | } | |
2795 | \f | |
1cc37766 | 2796 | /* Subroutine of canon_reg. Pass *XLOC through canon_reg, and validate |
2797 | the result if necessary. INSN is as for canon_reg. */ | |
2798 | ||
2799 | static void | |
47f1d198 | 2800 | validate_canon_reg (rtx *xloc, rtx_insn *insn) |
1cc37766 | 2801 | { |
3072d30e | 2802 | if (*xloc) |
2803 | { | |
d328ebdf | 2804 | rtx new_rtx = canon_reg (*xloc, insn); |
1cc37766 | 2805 | |
3072d30e | 2806 | /* If replacing pseudo with hard reg or vice versa, ensure the |
2807 | insn remains valid. Likewise if the insn has MATCH_DUPs. */ | |
d328ebdf | 2808 | gcc_assert (insn && new_rtx); |
2809 | validate_change (insn, xloc, new_rtx, 1); | |
3072d30e | 2810 | } |
1cc37766 | 2811 | } |
2812 | ||
752df20e | 2813 | /* Canonicalize an expression: |
2814 | replace each register reference inside it | |
2815 | with the "oldest" equivalent register. | |
2816 | ||
0c0acbaa | 2817 | If INSN is nonzero validate_change is used to ensure that INSN remains valid |
d10cfa8d | 2818 | after we make our substitution. The calls are made with IN_GROUP nonzero |
8d5dd220 | 2819 | so apply_change_group must be called upon the outermost return from this |
2820 | function (unless INSN is zero). The result of apply_change_group can | |
2821 | generally be discarded since the changes we are making are optional. */ | |
752df20e | 2822 | |
2823 | static rtx | |
47f1d198 | 2824 | canon_reg (rtx x, rtx_insn *insn) |
752df20e | 2825 | { |
19cb6b50 | 2826 | int i; |
2827 | enum rtx_code code; | |
2828 | const char *fmt; | |
752df20e | 2829 | |
2830 | if (x == 0) | |
2831 | return x; | |
2832 | ||
2833 | code = GET_CODE (x); | |
2834 | switch (code) | |
2835 | { | |
2836 | case PC: | |
2837 | case CC0: | |
2838 | case CONST: | |
0349edce | 2839 | CASE_CONST_ANY: |
752df20e | 2840 | case SYMBOL_REF: |
2841 | case LABEL_REF: | |
2842 | case ADDR_VEC: | |
2843 | case ADDR_DIFF_VEC: | |
2844 | return x; | |
2845 | ||
2846 | case REG: | |
2847 | { | |
19cb6b50 | 2848 | int first; |
2849 | int q; | |
2850 | struct qty_table_elem *ent; | |
752df20e | 2851 | |
2852 | /* Never replace a hard reg, because hard regs can appear | |
2853 | in more than one machine mode, and we must preserve the mode | |
2854 | of each occurrence. Also, some hard regs appear in | |
2855 | MEMs that are shared and mustn't be altered. Don't try to | |
2856 | replace any reg that maps to a reg of class NO_REGS. */ | |
2857 | if (REGNO (x) < FIRST_PSEUDO_REGISTER | |
2858 | || ! REGNO_QTY_VALID_P (REGNO (x))) | |
2859 | return x; | |
2860 | ||
cb10db9d | 2861 | q = REG_QTY (REGNO (x)); |
a7f3b1c7 | 2862 | ent = &qty_table[q]; |
2863 | first = ent->first_reg; | |
752df20e | 2864 | return (first >= FIRST_PSEUDO_REGISTER ? regno_reg_rtx[first] |
2865 | : REGNO_REG_CLASS (first) == NO_REGS ? x | |
a7f3b1c7 | 2866 | : gen_rtx_REG (ent->mode, first)); |
752df20e | 2867 | } |
cb10db9d | 2868 | |
0dbd1c74 | 2869 | default: |
2870 | break; | |
752df20e | 2871 | } |
2872 | ||
2873 | fmt = GET_RTX_FORMAT (code); | |
2874 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
2875 | { | |
19cb6b50 | 2876 | int j; |
752df20e | 2877 | |
2878 | if (fmt[i] == 'e') | |
1cc37766 | 2879 | validate_canon_reg (&XEXP (x, i), insn); |
752df20e | 2880 | else if (fmt[i] == 'E') |
2881 | for (j = 0; j < XVECLEN (x, i); j++) | |
1cc37766 | 2882 | validate_canon_reg (&XVECEXP (x, i, j), insn); |
752df20e | 2883 | } |
2884 | ||
2885 | return x; | |
2886 | } | |
2887 | \f | |
6a8939cc | 2888 | /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison |
2889 | operation (EQ, NE, GT, etc.), follow it back through the hash table and | |
2890 | what values are being compared. | |
9ce37dcf | 2891 | |
6a8939cc | 2892 | *PARG1 and *PARG2 are updated to contain the rtx representing the values |
2893 | actually being compared. For example, if *PARG1 was (cc0) and *PARG2 | |
2894 | was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were | |
2895 | compared to produce cc0. | |
61b1f5a7 | 2896 | |
6a8939cc | 2897 | The return value is the comparison operator and is either the code of |
2898 | A or the code corresponding to the inverse of the comparison. */ | |
752df20e | 2899 | |
af21a202 | 2900 | static enum rtx_code |
8ec3a57b | 2901 | find_comparison_args (enum rtx_code code, rtx *parg1, rtx *parg2, |
3754d046 | 2902 | machine_mode *pmode1, machine_mode *pmode2) |
752df20e | 2903 | { |
af21a202 | 2904 | rtx arg1, arg2; |
431205b7 | 2905 | hash_set<rtx> *visited = NULL; |
7d8df2ae | 2906 | /* Set nonzero when we find something of interest. */ |
2907 | rtx x = NULL; | |
9ce37dcf | 2908 | |
af21a202 | 2909 | arg1 = *parg1, arg2 = *parg2; |
752df20e | 2910 | |
af21a202 | 2911 | /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */ |
752df20e | 2912 | |
af21a202 | 2913 | while (arg2 == CONST0_RTX (GET_MODE (arg1))) |
61b1f5a7 | 2914 | { |
af21a202 | 2915 | int reverse_code = 0; |
2916 | struct table_elt *p = 0; | |
308a5ff6 | 2917 | |
7d8df2ae | 2918 | /* Remember state from previous iteration. */ |
2919 | if (x) | |
2920 | { | |
2921 | if (!visited) | |
431205b7 | 2922 | visited = new hash_set<rtx>; |
2923 | visited->add (x); | |
7d8df2ae | 2924 | x = 0; |
2925 | } | |
2926 | ||
af21a202 | 2927 | /* If arg1 is a COMPARE, extract the comparison arguments from it. |
2928 | On machines with CC0, this is the only case that can occur, since | |
2929 | fold_rtx will return the COMPARE or item being compared with zero | |
2930 | when given CC0. */ | |
308a5ff6 | 2931 | |
af21a202 | 2932 | if (GET_CODE (arg1) == COMPARE && arg2 == const0_rtx) |
2933 | x = arg1; | |
308a5ff6 | 2934 | |
af21a202 | 2935 | /* If ARG1 is a comparison operator and CODE is testing for |
2936 | STORE_FLAG_VALUE, get the inner arguments. */ | |
61b1f5a7 | 2937 | |
6720e96c | 2938 | else if (COMPARISON_P (arg1)) |
752df20e | 2939 | { |
aa870c1b | 2940 | #ifdef FLOAT_STORE_FLAG_VALUE |
2941 | REAL_VALUE_TYPE fsfv; | |
2942 | #endif | |
2943 | ||
af21a202 | 2944 | if (code == NE |
2945 | || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT | |
2946 | && code == LT && STORE_FLAG_VALUE == -1) | |
2947 | #ifdef FLOAT_STORE_FLAG_VALUE | |
95204692 | 2948 | || (SCALAR_FLOAT_MODE_P (GET_MODE (arg1)) |
aa870c1b | 2949 | && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)), |
2950 | REAL_VALUE_NEGATIVE (fsfv))) | |
752df20e | 2951 | #endif |
61b1f5a7 | 2952 | ) |
af21a202 | 2953 | x = arg1; |
2954 | else if (code == EQ | |
2955 | || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT | |
2956 | && code == GE && STORE_FLAG_VALUE == -1) | |
2957 | #ifdef FLOAT_STORE_FLAG_VALUE | |
95204692 | 2958 | || (SCALAR_FLOAT_MODE_P (GET_MODE (arg1)) |
aa870c1b | 2959 | && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)), |
2960 | REAL_VALUE_NEGATIVE (fsfv))) | |
af21a202 | 2961 | #endif |
2962 | ) | |
2963 | x = arg1, reverse_code = 1; | |
752df20e | 2964 | } |
2965 | ||
af21a202 | 2966 | /* ??? We could also check for |
752df20e | 2967 | |
af21a202 | 2968 | (ne (and (eq (...) (const_int 1))) (const_int 0)) |
752df20e | 2969 | |
af21a202 | 2970 | and related forms, but let's wait until we see them occurring. */ |
752df20e | 2971 | |
af21a202 | 2972 | if (x == 0) |
2973 | /* Look up ARG1 in the hash table and see if it has an equivalence | |
2974 | that lets us see what is being compared. */ | |
78d140c9 | 2975 | p = lookup (arg1, SAFE_HASH (arg1, GET_MODE (arg1)), GET_MODE (arg1)); |
cb10db9d | 2976 | if (p) |
e9a91a9e | 2977 | { |
2978 | p = p->first_same_value; | |
2979 | ||
2980 | /* If what we compare is already known to be constant, that is as | |
2981 | good as it gets. | |
2982 | We need to break the loop in this case, because otherwise we | |
2983 | can have an infinite loop when looking at a reg that is known | |
2984 | to be a constant which is the same as a comparison of a reg | |
2985 | against zero which appears later in the insn stream, which in | |
2986 | turn is constant and the same as the comparison of the first reg | |
2987 | against zero... */ | |
2988 | if (p->is_const) | |
2989 | break; | |
2990 | } | |
752df20e | 2991 | |
af21a202 | 2992 | for (; p; p = p->next_same_value) |
752df20e | 2993 | { |
3754d046 | 2994 | machine_mode inner_mode = GET_MODE (p->exp); |
aa870c1b | 2995 | #ifdef FLOAT_STORE_FLAG_VALUE |
2996 | REAL_VALUE_TYPE fsfv; | |
2997 | #endif | |
752df20e | 2998 | |
af21a202 | 2999 | /* If the entry isn't valid, skip it. */ |
78d140c9 | 3000 | if (! exp_equiv_p (p->exp, p->exp, 1, false)) |
af21a202 | 3001 | continue; |
51356f86 | 3002 | |
7d8df2ae | 3003 | /* If it's a comparison we've used before, skip it. */ |
431205b7 | 3004 | if (visited && visited->contains (p->exp)) |
7a49726a | 3005 | continue; |
3006 | ||
6a8939cc | 3007 | if (GET_CODE (p->exp) == COMPARE |
3008 | /* Another possibility is that this machine has a compare insn | |
3009 | that includes the comparison code. In that case, ARG1 would | |
3010 | be equivalent to a comparison operation that would set ARG1 to | |
3011 | either STORE_FLAG_VALUE or zero. If this is an NE operation, | |
3012 | ORIG_CODE is the actual comparison being done; if it is an EQ, | |
3013 | we must reverse ORIG_CODE. On machine with a negative value | |
3014 | for STORE_FLAG_VALUE, also look at LT and GE operations. */ | |
3015 | || ((code == NE | |
3016 | || (code == LT | |
f92430e0 | 3017 | && val_signbit_known_set_p (inner_mode, |
3018 | STORE_FLAG_VALUE)) | |
af21a202 | 3019 | #ifdef FLOAT_STORE_FLAG_VALUE |
6a8939cc | 3020 | || (code == LT |
cee7491d | 3021 | && SCALAR_FLOAT_MODE_P (inner_mode) |
aa870c1b | 3022 | && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)), |
3023 | REAL_VALUE_NEGATIVE (fsfv))) | |
af21a202 | 3024 | #endif |
6a8939cc | 3025 | ) |
6720e96c | 3026 | && COMPARISON_P (p->exp))) |
752df20e | 3027 | { |
af21a202 | 3028 | x = p->exp; |
3029 | break; | |
3030 | } | |
3031 | else if ((code == EQ | |
3032 | || (code == GE | |
f92430e0 | 3033 | && val_signbit_known_set_p (inner_mode, |
3034 | STORE_FLAG_VALUE)) | |
af21a202 | 3035 | #ifdef FLOAT_STORE_FLAG_VALUE |
3036 | || (code == GE | |
cee7491d | 3037 | && SCALAR_FLOAT_MODE_P (inner_mode) |
aa870c1b | 3038 | && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)), |
3039 | REAL_VALUE_NEGATIVE (fsfv))) | |
af21a202 | 3040 | #endif |
3041 | ) | |
6720e96c | 3042 | && COMPARISON_P (p->exp)) |
af21a202 | 3043 | { |
3044 | reverse_code = 1; | |
3045 | x = p->exp; | |
3046 | break; | |
752df20e | 3047 | } |
3048 | ||
805e22b2 | 3049 | /* If this non-trapping address, e.g. fp + constant, the |
3050 | equivalent is a better operand since it may let us predict | |
3051 | the value of the comparison. */ | |
3052 | else if (!rtx_addr_can_trap_p (p->exp)) | |
af21a202 | 3053 | { |
3054 | arg1 = p->exp; | |
3055 | continue; | |
3056 | } | |
752df20e | 3057 | } |
752df20e | 3058 | |
af21a202 | 3059 | /* If we didn't find a useful equivalence for ARG1, we are done. |
3060 | Otherwise, set up for the next iteration. */ | |
3061 | if (x == 0) | |
3062 | break; | |
752df20e | 3063 | |
6d1304b6 | 3064 | /* If we need to reverse the comparison, make sure that that is |
3065 | possible -- we can't necessarily infer the value of GE from LT | |
3066 | with floating-point operands. */ | |
af21a202 | 3067 | if (reverse_code) |
7da6ea0c | 3068 | { |
3069 | enum rtx_code reversed = reversed_comparison_code (x, NULL_RTX); | |
3070 | if (reversed == UNKNOWN) | |
3071 | break; | |
d4c5e26d | 3072 | else |
3073 | code = reversed; | |
7da6ea0c | 3074 | } |
6720e96c | 3075 | else if (COMPARISON_P (x)) |
7da6ea0c | 3076 | code = GET_CODE (x); |
3077 | arg1 = XEXP (x, 0), arg2 = XEXP (x, 1); | |
752df20e | 3078 | } |
3079 | ||
af21a202 | 3080 | /* Return our results. Return the modes from before fold_rtx |
3081 | because fold_rtx might produce const_int, and then it's too late. */ | |
3082 | *pmode1 = GET_MODE (arg1), *pmode2 = GET_MODE (arg2); | |
3083 | *parg1 = fold_rtx (arg1, 0), *parg2 = fold_rtx (arg2, 0); | |
3084 | ||
7d8df2ae | 3085 | if (visited) |
431205b7 | 3086 | delete visited; |
af21a202 | 3087 | return code; |
752df20e | 3088 | } |
3089 | \f | |
42a3a38b | 3090 | /* If X is a nontrivial arithmetic operation on an argument for which |
3091 | a constant value can be determined, return the result of operating | |
3092 | on that value, as a constant. Otherwise, return X, possibly with | |
3093 | one or more operands changed to a forward-propagated constant. | |
18b14db6 | 3094 | |
42a3a38b | 3095 | If X is a register whose contents are known, we do NOT return |
3096 | those contents here; equiv_constant is called to perform that task. | |
3097 | For SUBREGs and MEMs, we do that both here and in equiv_constant. | |
752df20e | 3098 | |
3099 | INSN is the insn that we may be modifying. If it is 0, make a copy | |
3100 | of X before modifying it. */ | |
3101 | ||
3102 | static rtx | |
47f1d198 | 3103 | fold_rtx (rtx x, rtx_insn *insn) |
752df20e | 3104 | { |
19cb6b50 | 3105 | enum rtx_code code; |
3754d046 | 3106 | machine_mode mode; |
19cb6b50 | 3107 | const char *fmt; |
3108 | int i; | |
d328ebdf | 3109 | rtx new_rtx = 0; |
42a3a38b | 3110 | int changed = 0; |
752df20e | 3111 | |
42a3a38b | 3112 | /* Operands of X. */ |
a561ec10 | 3113 | /* Workaround -Wmaybe-uninitialized false positive during |
3114 | profiledbootstrap by initializing them. */ | |
3115 | rtx folded_arg0 = NULL_RTX; | |
3116 | rtx folded_arg1 = NULL_RTX; | |
752df20e | 3117 | |
3118 | /* Constant equivalents of first three operands of X; | |
3119 | 0 when no such equivalent is known. */ | |
3120 | rtx const_arg0; | |
3121 | rtx const_arg1; | |
3122 | rtx const_arg2; | |
3123 | ||
3124 | /* The mode of the first operand of X. We need this for sign and zero | |
3125 | extends. */ | |
3754d046 | 3126 | machine_mode mode_arg0; |
752df20e | 3127 | |
3128 | if (x == 0) | |
3129 | return x; | |
3130 | ||
42a3a38b | 3131 | /* Try to perform some initial simplifications on X. */ |
752df20e | 3132 | code = GET_CODE (x); |
3133 | switch (code) | |
3134 | { | |
42a3a38b | 3135 | case MEM: |
3136 | case SUBREG: | |
b803a3c1 | 3137 | /* The first operand of a SIGN/ZERO_EXTRACT has a different meaning |
3138 | than it would in other contexts. Basically its mode does not | |
3139 | signify the size of the object read. That information is carried | |
3140 | by size operand. If we happen to have a MEM of the appropriate | |
3141 | mode in our tables with a constant value we could simplify the | |
3142 | extraction incorrectly if we allowed substitution of that value | |
3143 | for the MEM. */ | |
3144 | case ZERO_EXTRACT: | |
3145 | case SIGN_EXTRACT: | |
d328ebdf | 3146 | if ((new_rtx = equiv_constant (x)) != NULL_RTX) |
3147 | return new_rtx; | |
42a3a38b | 3148 | return x; |
3149 | ||
752df20e | 3150 | case CONST: |
0349edce | 3151 | CASE_CONST_ANY: |
752df20e | 3152 | case SYMBOL_REF: |
3153 | case LABEL_REF: | |
3154 | case REG: | |
97108156 | 3155 | case PC: |
752df20e | 3156 | /* No use simplifying an EXPR_LIST |
3157 | since they are used only for lists of args | |
3158 | in a function call's REG_EQUAL note. */ | |
3159 | case EXPR_LIST: | |
3160 | return x; | |
3161 | ||
752df20e | 3162 | case CC0: |
3163 | return prev_insn_cc0; | |
752df20e | 3164 | |
c97a7837 | 3165 | case ASM_OPERANDS: |
d239a9ad | 3166 | if (insn) |
3167 | { | |
3168 | for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--) | |
3169 | validate_change (insn, &ASM_OPERANDS_INPUT (x, i), | |
3170 | fold_rtx (ASM_OPERANDS_INPUT (x, i), insn), 0); | |
3171 | } | |
42a3a38b | 3172 | return x; |
3173 | ||
42a3a38b | 3174 | case CALL: |
93516111 | 3175 | if (NO_FUNCTION_CSE && CONSTANT_P (XEXP (XEXP (x, 0), 0))) |
42a3a38b | 3176 | return x; |
c97a7837 | 3177 | break; |
cb10db9d | 3178 | |
42a3a38b | 3179 | /* Anything else goes through the loop below. */ |
0dbd1c74 | 3180 | default: |
3181 | break; | |
752df20e | 3182 | } |
3183 | ||
42a3a38b | 3184 | mode = GET_MODE (x); |
752df20e | 3185 | const_arg0 = 0; |
3186 | const_arg1 = 0; | |
3187 | const_arg2 = 0; | |
3188 | mode_arg0 = VOIDmode; | |
3189 | ||
3190 | /* Try folding our operands. | |
3191 | Then see which ones have constant values known. */ | |
3192 | ||
3193 | fmt = GET_RTX_FORMAT (code); | |
3194 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
3195 | if (fmt[i] == 'e') | |
3196 | { | |
42a3a38b | 3197 | rtx folded_arg = XEXP (x, i), const_arg; |
3754d046 | 3198 | machine_mode mode_arg = GET_MODE (folded_arg); |
06320855 | 3199 | |
3200 | switch (GET_CODE (folded_arg)) | |
3201 | { | |
3202 | case MEM: | |
3203 | case REG: | |
3204 | case SUBREG: | |
3205 | const_arg = equiv_constant (folded_arg); | |
3206 | break; | |
3207 | ||
3208 | case CONST: | |
0349edce | 3209 | CASE_CONST_ANY: |
06320855 | 3210 | case SYMBOL_REF: |
3211 | case LABEL_REF: | |
06320855 | 3212 | const_arg = folded_arg; |
3213 | break; | |
3214 | ||
06320855 | 3215 | case CC0: |
77cb85b2 | 3216 | /* The cc0-user and cc0-setter may be in different blocks if |
3217 | the cc0-setter potentially traps. In that case PREV_INSN_CC0 | |
3218 | will have been cleared as we exited the block with the | |
3219 | setter. | |
3220 | ||
3221 | While we could potentially track cc0 in this case, it just | |
3222 | doesn't seem to be worth it given that cc0 targets are not | |
3223 | terribly common or important these days and trapping math | |
3224 | is rarely used. The combination of those two conditions | |
3225 | necessary to trip this situation is exceedingly rare in the | |
3226 | real world. */ | |
3227 | if (!prev_insn_cc0) | |
3228 | { | |
3229 | const_arg = NULL_RTX; | |
3230 | } | |
3231 | else | |
3232 | { | |
3233 | folded_arg = prev_insn_cc0; | |
3234 | mode_arg = prev_insn_cc0_mode; | |
3235 | const_arg = equiv_constant (folded_arg); | |
3236 | } | |
06320855 | 3237 | break; |
06320855 | 3238 | |
3239 | default: | |
3240 | folded_arg = fold_rtx (folded_arg, insn); | |
3241 | const_arg = equiv_constant (folded_arg); | |
3242 | break; | |
3243 | } | |
752df20e | 3244 | |
3245 | /* For the first three operands, see if the operand | |
3246 | is constant or equivalent to a constant. */ | |
3247 | switch (i) | |
3248 | { | |
3249 | case 0: | |
3250 | folded_arg0 = folded_arg; | |
3251 | const_arg0 = const_arg; | |
3252 | mode_arg0 = mode_arg; | |
3253 | break; | |
3254 | case 1: | |
3255 | folded_arg1 = folded_arg; | |
3256 | const_arg1 = const_arg; | |
3257 | break; | |
3258 | case 2: | |
3259 | const_arg2 = const_arg; | |
3260 | break; | |
3261 | } | |
3262 | ||
42a3a38b | 3263 | /* Pick the least expensive of the argument and an equivalent constant |
3264 | argument. */ | |
3265 | if (const_arg != 0 | |
3266 | && const_arg != folded_arg | |
20d892d1 | 3267 | && COST_IN (const_arg, code, i) <= COST_IN (folded_arg, code, i) |
f35e401c | 3268 | |
8f1e01cb | 3269 | /* It's not safe to substitute the operand of a conversion |
3270 | operator with a constant, as the conversion's identity | |
fe24f256 | 3271 | depends upon the mode of its operand. This optimization |
8f1e01cb | 3272 | is handled by the call to simplify_unary_operation. */ |
42a3a38b | 3273 | && (GET_RTX_CLASS (code) != RTX_UNARY |
3274 | || GET_MODE (const_arg) == mode_arg0 | |
3275 | || (code != ZERO_EXTEND | |
3276 | && code != SIGN_EXTEND | |
3277 | && code != TRUNCATE | |
3278 | && code != FLOAT_TRUNCATE | |
3279 | && code != FLOAT_EXTEND | |
3280 | && code != FLOAT | |
3281 | && code != FIX | |
3282 | && code != UNSIGNED_FLOAT | |
3283 | && code != UNSIGNED_FIX))) | |
3284 | folded_arg = const_arg; | |
3285 | ||
3286 | if (folded_arg == XEXP (x, i)) | |
3287 | continue; | |
752df20e | 3288 | |
42a3a38b | 3289 | if (insn == NULL_RTX && !changed) |
3290 | x = copy_rtx (x); | |
3291 | changed = 1; | |
4f34fbd6 | 3292 | validate_unshare_change (insn, &XEXP (x, i), folded_arg, 1); |
c08e043f | 3293 | } |
752df20e | 3294 | |
42a3a38b | 3295 | if (changed) |
752df20e | 3296 | { |
42a3a38b | 3297 | /* Canonicalize X if necessary, and keep const_argN and folded_argN |
3298 | consistent with the order in X. */ | |
3299 | if (canonicalize_change_group (insn, x)) | |
752df20e | 3300 | { |
42a3a38b | 3301 | rtx tem; |
3302 | tem = const_arg0, const_arg0 = const_arg1, const_arg1 = tem; | |
3303 | tem = folded_arg0, folded_arg0 = folded_arg1, folded_arg1 = tem; | |
752df20e | 3304 | } |
42a3a38b | 3305 | |
3306 | apply_change_group (); | |
752df20e | 3307 | } |
3308 | ||
3309 | /* If X is an arithmetic operation, see if we can simplify it. */ | |
3310 | ||
3311 | switch (GET_RTX_CLASS (code)) | |
3312 | { | |
6720e96c | 3313 | case RTX_UNARY: |
528b0df8 | 3314 | { |
528b0df8 | 3315 | /* We can't simplify extension ops unless we know the |
3316 | original mode. */ | |
3317 | if ((code == ZERO_EXTEND || code == SIGN_EXTEND) | |
3318 | && mode_arg0 == VOIDmode) | |
3319 | break; | |
3320 | ||
d328ebdf | 3321 | new_rtx = simplify_unary_operation (code, mode, |
2bde5b8e | 3322 | const_arg0 ? const_arg0 : folded_arg0, |
3323 | mode_arg0); | |
528b0df8 | 3324 | } |
752df20e | 3325 | break; |
cb10db9d | 3326 | |
6720e96c | 3327 | case RTX_COMPARE: |
3328 | case RTX_COMM_COMPARE: | |
752df20e | 3329 | /* See what items are actually being compared and set FOLDED_ARG[01] |
3330 | to those values and CODE to the actual comparison code. If any are | |
3331 | constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't | |
3332 | do anything if both operands are already known to be constant. */ | |
3333 | ||
5b2d8298 | 3334 | /* ??? Vector mode comparisons are not supported yet. */ |
3335 | if (VECTOR_MODE_P (mode)) | |
3336 | break; | |
3337 | ||
752df20e | 3338 | if (const_arg0 == 0 || const_arg1 == 0) |
3339 | { | |
3340 | struct table_elt *p0, *p1; | |
ecb6ee6d | 3341 | rtx true_rtx, false_rtx; |
3754d046 | 3342 | machine_mode mode_arg1; |
50cf1c21 | 3343 | |
95204692 | 3344 | if (SCALAR_FLOAT_MODE_P (mode)) |
50cf1c21 | 3345 | { |
ecb6ee6d | 3346 | #ifdef FLOAT_STORE_FLAG_VALUE |
9c811526 | 3347 | true_rtx = (CONST_DOUBLE_FROM_REAL_VALUE |
d4c5e26d | 3348 | (FLOAT_STORE_FLAG_VALUE (mode), mode)); |
ecb6ee6d | 3349 | #else |
3350 | true_rtx = NULL_RTX; | |
3351 | #endif | |
9c811526 | 3352 | false_rtx = CONST0_RTX (mode); |
50cf1c21 | 3353 | } |
ecb6ee6d | 3354 | else |
3355 | { | |
3356 | true_rtx = const_true_rtx; | |
3357 | false_rtx = const0_rtx; | |
3358 | } | |
752df20e | 3359 | |
5c4c31e3 | 3360 | code = find_comparison_args (code, &folded_arg0, &folded_arg1, |
3361 | &mode_arg0, &mode_arg1); | |
752df20e | 3362 | |
5c4c31e3 | 3363 | /* If the mode is VOIDmode or a MODE_CC mode, we don't know |
3364 | what kinds of things are being compared, so we can't do | |
3365 | anything with this comparison. */ | |
752df20e | 3366 | |
3367 | if (mode_arg0 == VOIDmode || GET_MODE_CLASS (mode_arg0) == MODE_CC) | |
3368 | break; | |
3369 | ||
58a1adea | 3370 | const_arg0 = equiv_constant (folded_arg0); |
3371 | const_arg1 = equiv_constant (folded_arg1); | |
3372 | ||
a92771b8 | 3373 | /* If we do not now have two constants being compared, see |
3374 | if we can nevertheless deduce some things about the | |
3375 | comparison. */ | |
752df20e | 3376 | if (const_arg0 == 0 || const_arg1 == 0) |
3377 | { | |
9d3874a6 | 3378 | if (const_arg1 != NULL) |
3379 | { | |
3380 | rtx cheapest_simplification; | |
3381 | int cheapest_cost; | |
3382 | rtx simp_result; | |
3383 | struct table_elt *p; | |
3384 | ||
3385 | /* See if we can find an equivalent of folded_arg0 | |
3386 | that gets us a cheaper expression, possibly a | |
3387 | constant through simplifications. */ | |
3388 | p = lookup (folded_arg0, SAFE_HASH (folded_arg0, mode_arg0), | |
3389 | mode_arg0); | |
48e1416a | 3390 | |
9d3874a6 | 3391 | if (p != NULL) |
3392 | { | |
3393 | cheapest_simplification = x; | |
3394 | cheapest_cost = COST (x); | |
3395 | ||
3396 | for (p = p->first_same_value; p != NULL; p = p->next_same_value) | |
3397 | { | |
3398 | int cost; | |
3399 | ||
3400 | /* If the entry isn't valid, skip it. */ | |
3401 | if (! exp_equiv_p (p->exp, p->exp, 1, false)) | |
3402 | continue; | |
3403 | ||
3404 | /* Try to simplify using this equivalence. */ | |
3405 | simp_result | |
3406 | = simplify_relational_operation (code, mode, | |
3407 | mode_arg0, | |
3408 | p->exp, | |
3409 | const_arg1); | |
3410 | ||
3411 | if (simp_result == NULL) | |
3412 | continue; | |
3413 | ||
3414 | cost = COST (simp_result); | |
3415 | if (cost < cheapest_cost) | |
3416 | { | |
3417 | cheapest_cost = cost; | |
3418 | cheapest_simplification = simp_result; | |
3419 | } | |
3420 | } | |
3421 | ||
3422 | /* If we have a cheaper expression now, use that | |
3423 | and try folding it further, from the top. */ | |
3424 | if (cheapest_simplification != x) | |
045ed337 | 3425 | return fold_rtx (copy_rtx (cheapest_simplification), |
3426 | insn); | |
9d3874a6 | 3427 | } |
3428 | } | |
3429 | ||
03a563f6 | 3430 | /* See if the two operands are the same. */ |
3431 | ||
3bac3cce | 3432 | if ((REG_P (folded_arg0) |
3433 | && REG_P (folded_arg1) | |
3434 | && (REG_QTY (REGNO (folded_arg0)) | |
3435 | == REG_QTY (REGNO (folded_arg1)))) | |
03a563f6 | 3436 | || ((p0 = lookup (folded_arg0, |
78d140c9 | 3437 | SAFE_HASH (folded_arg0, mode_arg0), |
3438 | mode_arg0)) | |
03a563f6 | 3439 | && (p1 = lookup (folded_arg1, |
78d140c9 | 3440 | SAFE_HASH (folded_arg1, mode_arg0), |
3441 | mode_arg0)) | |
03a563f6 | 3442 | && p0->first_same_value == p1->first_same_value)) |
3bac3cce | 3443 | folded_arg1 = folded_arg0; |
752df20e | 3444 | |
3445 | /* If FOLDED_ARG0 is a register, see if the comparison we are | |
3446 | doing now is either the same as we did before or the reverse | |
3447 | (we only check the reverse if not floating-point). */ | |
8ad4c111 | 3448 | else if (REG_P (folded_arg0)) |
752df20e | 3449 | { |
d1264606 | 3450 | int qty = REG_QTY (REGNO (folded_arg0)); |
752df20e | 3451 | |
a7f3b1c7 | 3452 | if (REGNO_QTY_VALID_P (REGNO (folded_arg0))) |
3453 | { | |
3454 | struct qty_table_elem *ent = &qty_table[qty]; | |
3455 | ||
3456 | if ((comparison_dominates_p (ent->comparison_code, code) | |
a4110d9a | 3457 | || (! FLOAT_MODE_P (mode_arg0) |
3458 | && comparison_dominates_p (ent->comparison_code, | |
3459 | reverse_condition (code)))) | |
a7f3b1c7 | 3460 | && (rtx_equal_p (ent->comparison_const, folded_arg1) |
3461 | || (const_arg1 | |
3462 | && rtx_equal_p (ent->comparison_const, | |
3463 | const_arg1)) | |
8ad4c111 | 3464 | || (REG_P (folded_arg1) |
a7f3b1c7 | 3465 | && (REG_QTY (REGNO (folded_arg1)) == ent->comparison_qty)))) |
ecb6ee6d | 3466 | { |
3467 | if (comparison_dominates_p (ent->comparison_code, code)) | |
3468 | { | |
3469 | if (true_rtx) | |
3470 | return true_rtx; | |
3471 | else | |
3472 | break; | |
3473 | } | |
3474 | else | |
3475 | return false_rtx; | |
3476 | } | |
a7f3b1c7 | 3477 | } |
752df20e | 3478 | } |
3479 | } | |
3480 | } | |
3481 | ||
3482 | /* If we are comparing against zero, see if the first operand is | |
3483 | equivalent to an IOR with a constant. If so, we may be able to | |
3484 | determine the result of this comparison. */ | |
3bac3cce | 3485 | if (const_arg1 == const0_rtx && !const_arg0) |
752df20e | 3486 | { |
3487 | rtx y = lookup_as_function (folded_arg0, IOR); | |
3488 | rtx inner_const; | |
3489 | ||
3490 | if (y != 0 | |
3491 | && (inner_const = equiv_constant (XEXP (y, 1))) != 0 | |
971ba038 | 3492 | && CONST_INT_P (inner_const) |
752df20e | 3493 | && INTVAL (inner_const) != 0) |
3bac3cce | 3494 | folded_arg0 = gen_rtx_IOR (mode_arg0, XEXP (y, 0), inner_const); |
752df20e | 3495 | } |
3496 | ||
ac503e50 | 3497 | { |
b9b50b55 | 3498 | rtx op0 = const_arg0 ? const_arg0 : copy_rtx (folded_arg0); |
3499 | rtx op1 = const_arg1 ? const_arg1 : copy_rtx (folded_arg1); | |
3500 | new_rtx = simplify_relational_operation (code, mode, mode_arg0, | |
3501 | op0, op1); | |
ac503e50 | 3502 | } |
752df20e | 3503 | break; |
3504 | ||
6720e96c | 3505 | case RTX_BIN_ARITH: |
3506 | case RTX_COMM_ARITH: | |
752df20e | 3507 | switch (code) |
3508 | { | |
3509 | case PLUS: | |
3510 | /* If the second operand is a LABEL_REF, see if the first is a MINUS | |
3511 | with that LABEL_REF as its second operand. If so, the result is | |
3512 | the first operand of that MINUS. This handles switches with an | |
3513 | ADDR_DIFF_VEC table. */ | |
3514 | if (const_arg1 && GET_CODE (const_arg1) == LABEL_REF) | |
3515 | { | |
e6d1f05b | 3516 | rtx y |
3517 | = GET_CODE (folded_arg0) == MINUS ? folded_arg0 | |
b74befc5 | 3518 | : lookup_as_function (folded_arg0, MINUS); |
752df20e | 3519 | |
3520 | if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF | |
b49f2e4b | 3521 | && LABEL_REF_LABEL (XEXP (y, 1)) == LABEL_REF_LABEL (const_arg1)) |
752df20e | 3522 | return XEXP (y, 0); |
528b0df8 | 3523 | |
3524 | /* Now try for a CONST of a MINUS like the above. */ | |
e6d1f05b | 3525 | if ((y = (GET_CODE (folded_arg0) == CONST ? folded_arg0 |
3526 | : lookup_as_function (folded_arg0, CONST))) != 0 | |
528b0df8 | 3527 | && GET_CODE (XEXP (y, 0)) == MINUS |
3528 | && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF | |
b49f2e4b | 3529 | && LABEL_REF_LABEL (XEXP (XEXP (y, 0), 1)) == LABEL_REF_LABEL (const_arg1)) |
528b0df8 | 3530 | return XEXP (XEXP (y, 0), 0); |
752df20e | 3531 | } |
f7cf73ed | 3532 | |
e6d1f05b | 3533 | /* Likewise if the operands are in the other order. */ |
3534 | if (const_arg0 && GET_CODE (const_arg0) == LABEL_REF) | |
3535 | { | |
3536 | rtx y | |
3537 | = GET_CODE (folded_arg1) == MINUS ? folded_arg1 | |
b74befc5 | 3538 | : lookup_as_function (folded_arg1, MINUS); |
e6d1f05b | 3539 | |
3540 | if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF | |
b49f2e4b | 3541 | && LABEL_REF_LABEL (XEXP (y, 1)) == LABEL_REF_LABEL (const_arg0)) |
e6d1f05b | 3542 | return XEXP (y, 0); |
3543 | ||
3544 | /* Now try for a CONST of a MINUS like the above. */ | |
3545 | if ((y = (GET_CODE (folded_arg1) == CONST ? folded_arg1 | |
3546 | : lookup_as_function (folded_arg1, CONST))) != 0 | |
3547 | && GET_CODE (XEXP (y, 0)) == MINUS | |
3548 | && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF | |
b49f2e4b | 3549 | && LABEL_REF_LABEL (XEXP (XEXP (y, 0), 1)) == LABEL_REF_LABEL (const_arg0)) |
e6d1f05b | 3550 | return XEXP (XEXP (y, 0), 0); |
3551 | } | |
3552 | ||
f7cf73ed | 3553 | /* If second operand is a register equivalent to a negative |
3554 | CONST_INT, see if we can find a register equivalent to the | |
3555 | positive constant. Make a MINUS if so. Don't do this for | |
337bf63c | 3556 | a non-negative constant since we might then alternate between |
3fb1e43b | 3557 | choosing positive and negative constants. Having the positive |
337bf63c | 3558 | constant previously-used is the more common case. Be sure |
3559 | the resulting constant is non-negative; if const_arg1 were | |
3560 | the smallest negative number this would overflow: depending | |
3561 | on the mode, this would either just be the same value (and | |
3562 | hence not save anything) or be incorrect. */ | |
971ba038 | 3563 | if (const_arg1 != 0 && CONST_INT_P (const_arg1) |
337bf63c | 3564 | && INTVAL (const_arg1) < 0 |
aaa2446c | 3565 | /* This used to test |
3566 | ||
b74befc5 | 3567 | -INTVAL (const_arg1) >= 0 |
aaa2446c | 3568 | |
3569 | But The Sun V5.0 compilers mis-compiled that test. So | |
3570 | instead we test for the problematic value in a more direct | |
3571 | manner and hope the Sun compilers get it correct. */ | |
76d98649 | 3572 | && INTVAL (const_arg1) != |
3573 | ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT - 1)) | |
8ad4c111 | 3574 | && REG_P (folded_arg1)) |
f7cf73ed | 3575 | { |
b74befc5 | 3576 | rtx new_const = GEN_INT (-INTVAL (const_arg1)); |
f7cf73ed | 3577 | struct table_elt *p |
78d140c9 | 3578 | = lookup (new_const, SAFE_HASH (new_const, mode), mode); |
f7cf73ed | 3579 | |
3580 | if (p) | |
3581 | for (p = p->first_same_value; p; p = p->next_same_value) | |
8ad4c111 | 3582 | if (REG_P (p->exp)) |
af21a202 | 3583 | return simplify_gen_binary (MINUS, mode, folded_arg0, |
47f1d198 | 3584 | canon_reg (p->exp, NULL)); |
f7cf73ed | 3585 | } |
5c4c31e3 | 3586 | goto from_plus; |
3587 | ||
3588 | case MINUS: | |
3589 | /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2). | |
3590 | If so, produce (PLUS Z C2-C). */ | |
971ba038 | 3591 | if (const_arg1 != 0 && CONST_INT_P (const_arg1)) |
5c4c31e3 | 3592 | { |
3593 | rtx y = lookup_as_function (XEXP (x, 0), PLUS); | |
971ba038 | 3594 | if (y && CONST_INT_P (XEXP (y, 1))) |
29c05e22 | 3595 | return fold_rtx (plus_constant (mode, copy_rtx (y), |
a66a39f2 | 3596 | -INTVAL (const_arg1)), |
47f1d198 | 3597 | NULL); |
5c4c31e3 | 3598 | } |
752df20e | 3599 | |
b74befc5 | 3600 | /* Fall through. */ |
752df20e | 3601 | |
5c4c31e3 | 3602 | from_plus: |
752df20e | 3603 | case SMIN: case SMAX: case UMIN: case UMAX: |
3604 | case IOR: case AND: case XOR: | |
7a4fa2a1 | 3605 | case MULT: |
752df20e | 3606 | case ASHIFT: case LSHIFTRT: case ASHIFTRT: |
3607 | /* If we have (<op> <reg> <const_int>) for an associative OP and REG | |
3608 | is known to be of similar form, we may be able to replace the | |
3609 | operation with a combined operation. This may eliminate the | |
3610 | intermediate operation if every use is simplified in this way. | |
3611 | Note that the similar optimization done by combine.c only works | |
3612 | if the intermediate operation's result has only one reference. */ | |
3613 | ||
8ad4c111 | 3614 | if (REG_P (folded_arg0) |
971ba038 | 3615 | && const_arg1 && CONST_INT_P (const_arg1)) |
752df20e | 3616 | { |
3617 | int is_shift | |
3618 | = (code == ASHIFT || code == ASHIFTRT || code == LSHIFTRT); | |
8f353ea8 | 3619 | rtx y, inner_const, new_const; |
6026d749 | 3620 | rtx canon_const_arg1 = const_arg1; |
752df20e | 3621 | enum rtx_code associate_code; |
752df20e | 3622 | |
0518a465 | 3623 | if (is_shift |
ded805e6 | 3624 | && (INTVAL (const_arg1) >= GET_MODE_PRECISION (mode) |
0518a465 | 3625 | || INTVAL (const_arg1) < 0)) |
3626 | { | |
3627 | if (SHIFT_COUNT_TRUNCATED) | |
6026d749 | 3628 | canon_const_arg1 = GEN_INT (INTVAL (const_arg1) |
3629 | & (GET_MODE_BITSIZE (mode) | |
3630 | - 1)); | |
0518a465 | 3631 | else |
3632 | break; | |
3633 | } | |
3634 | ||
8f353ea8 | 3635 | y = lookup_as_function (folded_arg0, code); |
0518a465 | 3636 | if (y == 0) |
3637 | break; | |
0518a465 | 3638 | |
3639 | /* If we have compiled a statement like | |
3640 | "if (x == (x & mask1))", and now are looking at | |
3641 | "x & mask2", we will have a case where the first operand | |
3642 | of Y is the same as our first operand. Unless we detect | |
3643 | this case, an infinite loop will result. */ | |
3644 | if (XEXP (y, 0) == folded_arg0) | |
752df20e | 3645 | break; |
3646 | ||
8f353ea8 | 3647 | inner_const = equiv_constant (fold_rtx (XEXP (y, 1), 0)); |
971ba038 | 3648 | if (!inner_const || !CONST_INT_P (inner_const)) |
8f353ea8 | 3649 | break; |
3650 | ||
752df20e | 3651 | /* Don't associate these operations if they are a PLUS with the |
3652 | same constant and it is a power of two. These might be doable | |
3653 | with a pre- or post-increment. Similarly for two subtracts of | |
3654 | identical powers of two with post decrement. */ | |
3655 | ||
9cae6d48 | 3656 | if (code == PLUS && const_arg1 == inner_const |
e4e498cf | 3657 | && ((HAVE_PRE_INCREMENT |
3658 | && exact_log2 (INTVAL (const_arg1)) >= 0) | |
3659 | || (HAVE_POST_INCREMENT | |
3660 | && exact_log2 (INTVAL (const_arg1)) >= 0) | |
3661 | || (HAVE_PRE_DECREMENT | |
3662 | && exact_log2 (- INTVAL (const_arg1)) >= 0) | |
3663 | || (HAVE_POST_DECREMENT | |
3664 | && exact_log2 (- INTVAL (const_arg1)) >= 0))) | |
752df20e | 3665 | break; |
3666 | ||
e7323ddd | 3667 | /* ??? Vector mode shifts by scalar |
3668 | shift operand are not supported yet. */ | |
3669 | if (is_shift && VECTOR_MODE_P (mode)) | |
3670 | break; | |
3671 | ||
0518a465 | 3672 | if (is_shift |
ded805e6 | 3673 | && (INTVAL (inner_const) >= GET_MODE_PRECISION (mode) |
0518a465 | 3674 | || INTVAL (inner_const) < 0)) |
3675 | { | |
3676 | if (SHIFT_COUNT_TRUNCATED) | |
3677 | inner_const = GEN_INT (INTVAL (inner_const) | |
3678 | & (GET_MODE_BITSIZE (mode) - 1)); | |
3679 | else | |
3680 | break; | |
3681 | } | |
3682 | ||
752df20e | 3683 | /* Compute the code used to compose the constants. For example, |
7a4fa2a1 | 3684 | A-C1-C2 is A-(C1 + C2), so if CODE == MINUS, we want PLUS. */ |
752df20e | 3685 | |
7a4fa2a1 | 3686 | associate_code = (is_shift || code == MINUS ? PLUS : code); |
752df20e | 3687 | |
3688 | new_const = simplify_binary_operation (associate_code, mode, | |
6026d749 | 3689 | canon_const_arg1, |
3690 | inner_const); | |
752df20e | 3691 | |
3692 | if (new_const == 0) | |
3693 | break; | |
3694 | ||
3695 | /* If we are associating shift operations, don't let this | |
94ad8c53 | 3696 | produce a shift of the size of the object or larger. |
3697 | This could occur when we follow a sign-extend by a right | |
3698 | shift on a machine that does a sign-extend as a pair | |
3699 | of shifts. */ | |
752df20e | 3700 | |
0518a465 | 3701 | if (is_shift |
971ba038 | 3702 | && CONST_INT_P (new_const) |
ded805e6 | 3703 | && INTVAL (new_const) >= GET_MODE_PRECISION (mode)) |
94ad8c53 | 3704 | { |
3705 | /* As an exception, we can turn an ASHIFTRT of this | |
3706 | form into a shift of the number of bits - 1. */ | |
3707 | if (code == ASHIFTRT) | |
3708 | new_const = GEN_INT (GET_MODE_BITSIZE (mode) - 1); | |
0518a465 | 3709 | else if (!side_effects_p (XEXP (y, 0))) |
3710 | return CONST0_RTX (mode); | |
94ad8c53 | 3711 | else |
3712 | break; | |
3713 | } | |
752df20e | 3714 | |
3715 | y = copy_rtx (XEXP (y, 0)); | |
3716 | ||
3717 | /* If Y contains our first operand (the most common way this | |
3718 | can happen is if Y is a MEM), we would do into an infinite | |
3719 | loop if we tried to fold it. So don't in that case. */ | |
3720 | ||
3721 | if (! reg_mentioned_p (folded_arg0, y)) | |
3722 | y = fold_rtx (y, insn); | |
3723 | ||
af21a202 | 3724 | return simplify_gen_binary (code, mode, y, new_const); |
752df20e | 3725 | } |
0dbd1c74 | 3726 | break; |
3727 | ||
7a4fa2a1 | 3728 | case DIV: case UDIV: |
3729 | /* ??? The associative optimization performed immediately above is | |
3730 | also possible for DIV and UDIV using associate_code of MULT. | |
3731 | However, we would need extra code to verify that the | |
3732 | multiplication does not overflow, that is, there is no overflow | |
3733 | in the calculation of new_const. */ | |
3734 | break; | |
3735 | ||
0dbd1c74 | 3736 | default: |
3737 | break; | |
752df20e | 3738 | } |
3739 | ||
d328ebdf | 3740 | new_rtx = simplify_binary_operation (code, mode, |
752df20e | 3741 | const_arg0 ? const_arg0 : folded_arg0, |
3742 | const_arg1 ? const_arg1 : folded_arg1); | |
3743 | break; | |
3744 | ||
6720e96c | 3745 | case RTX_OBJ: |
752df20e | 3746 | /* (lo_sum (high X) X) is simply X. */ |
3747 | if (code == LO_SUM && const_arg0 != 0 | |
3748 | && GET_CODE (const_arg0) == HIGH | |
3749 | && rtx_equal_p (XEXP (const_arg0, 0), const_arg1)) | |
3750 | return const_arg1; | |
3751 | break; | |
3752 | ||
6720e96c | 3753 | case RTX_TERNARY: |
3754 | case RTX_BITFIELD_OPS: | |
d328ebdf | 3755 | new_rtx = simplify_ternary_operation (code, mode, mode_arg0, |
752df20e | 3756 | const_arg0 ? const_arg0 : folded_arg0, |
3757 | const_arg1 ? const_arg1 : folded_arg1, | |
3758 | const_arg2 ? const_arg2 : XEXP (x, 2)); | |
3759 | break; | |
dd5ff96d | 3760 | |
6720e96c | 3761 | default: |
3762 | break; | |
752df20e | 3763 | } |
3764 | ||
d328ebdf | 3765 | return new_rtx ? new_rtx : x; |
752df20e | 3766 | } |
3767 | \f | |
3768 | /* Return a constant value currently equivalent to X. | |
3769 | Return 0 if we don't know one. */ | |
3770 | ||
3771 | static rtx | |
8ec3a57b | 3772 | equiv_constant (rtx x) |
752df20e | 3773 | { |
8ad4c111 | 3774 | if (REG_P (x) |
a7f3b1c7 | 3775 | && REGNO_QTY_VALID_P (REGNO (x))) |
3776 | { | |
3777 | int x_q = REG_QTY (REGNO (x)); | |
3778 | struct qty_table_elem *x_ent = &qty_table[x_q]; | |
3779 | ||
3780 | if (x_ent->const_rtx) | |
316f48ea | 3781 | x = gen_lowpart (GET_MODE (x), x_ent->const_rtx); |
a7f3b1c7 | 3782 | } |
752df20e | 3783 | |
f2f6be45 | 3784 | if (x == 0 || CONSTANT_P (x)) |
752df20e | 3785 | return x; |
3786 | ||
42a3a38b | 3787 | if (GET_CODE (x) == SUBREG) |
3788 | { | |
3754d046 | 3789 | machine_mode mode = GET_MODE (x); |
3790 | machine_mode imode = GET_MODE (SUBREG_REG (x)); | |
d328ebdf | 3791 | rtx new_rtx; |
42a3a38b | 3792 | |
3793 | /* See if we previously assigned a constant value to this SUBREG. */ | |
d328ebdf | 3794 | if ((new_rtx = lookup_as_function (x, CONST_INT)) != 0 |
e913b5cd | 3795 | || (new_rtx = lookup_as_function (x, CONST_WIDE_INT)) != 0 |
d328ebdf | 3796 | || (new_rtx = lookup_as_function (x, CONST_DOUBLE)) != 0 |
3797 | || (new_rtx = lookup_as_function (x, CONST_FIXED)) != 0) | |
3798 | return new_rtx; | |
42a3a38b | 3799 | |
5216d9e8 | 3800 | /* If we didn't and if doing so makes sense, see if we previously |
3801 | assigned a constant value to the enclosing word mode SUBREG. */ | |
3802 | if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (word_mode) | |
3803 | && GET_MODE_SIZE (word_mode) < GET_MODE_SIZE (imode)) | |
3804 | { | |
3805 | int byte = SUBREG_BYTE (x) - subreg_lowpart_offset (mode, word_mode); | |
3806 | if (byte >= 0 && (byte % UNITS_PER_WORD) == 0) | |
3807 | { | |
3808 | rtx y = gen_rtx_SUBREG (word_mode, SUBREG_REG (x), byte); | |
3809 | new_rtx = lookup_as_function (y, CONST_INT); | |
3810 | if (new_rtx) | |
3811 | return gen_lowpart (mode, new_rtx); | |
3812 | } | |
3813 | } | |
3814 | ||
3a966565 | 3815 | /* Otherwise see if we already have a constant for the inner REG, |
3816 | and if that is enough to calculate an equivalent constant for | |
3817 | the subreg. Note that the upper bits of paradoxical subregs | |
3818 | are undefined, so they cannot be said to equal anything. */ | |
42a3a38b | 3819 | if (REG_P (SUBREG_REG (x)) |
3a966565 | 3820 | && GET_MODE_SIZE (mode) <= GET_MODE_SIZE (imode) |
d328ebdf | 3821 | && (new_rtx = equiv_constant (SUBREG_REG (x))) != 0) |
5216d9e8 | 3822 | return simplify_subreg (mode, new_rtx, imode, SUBREG_BYTE (x)); |
42a3a38b | 3823 | |
3824 | return 0; | |
3825 | } | |
3826 | ||
3827 | /* If X is a MEM, see if it is a constant-pool reference, or look it up in | |
3828 | the hash table in case its value was seen before. */ | |
e516eaa9 | 3829 | |
e16ceb8e | 3830 | if (MEM_P (x)) |
e516eaa9 | 3831 | { |
3832 | struct table_elt *elt; | |
3833 | ||
42a3a38b | 3834 | x = avoid_constant_pool_reference (x); |
e516eaa9 | 3835 | if (CONSTANT_P (x)) |
3836 | return x; | |
3837 | ||
78d140c9 | 3838 | elt = lookup (x, SAFE_HASH (x, GET_MODE (x)), GET_MODE (x)); |
e516eaa9 | 3839 | if (elt == 0) |
3840 | return 0; | |
3841 | ||
3842 | for (elt = elt->first_same_value; elt; elt = elt->next_same_value) | |
3843 | if (elt->is_const && CONSTANT_P (elt->exp)) | |
3844 | return elt->exp; | |
3845 | } | |
3846 | ||
752df20e | 3847 | return 0; |
3848 | } | |
3849 | \f | |
bbe0b6d7 | 3850 | /* Given INSN, a jump insn, TAKEN indicates if we are following the |
3851 | "taken" branch. | |
752df20e | 3852 | |
3853 | In certain cases, this can cause us to add an equivalence. For example, | |
cb10db9d | 3854 | if we are following the taken case of |
8ec3a57b | 3855 | if (i == 2) |
752df20e | 3856 | we can add the fact that `i' and '2' are now equivalent. |
3857 | ||
3858 | In any case, we can record that this comparison was passed. If the same | |
3859 | comparison is seen later, we will know its value. */ | |
3860 | ||
3861 | static void | |
47f1d198 | 3862 | record_jump_equiv (rtx_insn *insn, bool taken) |
752df20e | 3863 | { |
3864 | int cond_known_true; | |
3865 | rtx op0, op1; | |
b2816317 | 3866 | rtx set; |
3754d046 | 3867 | machine_mode mode, mode0, mode1; |
752df20e | 3868 | int reversed_nonequality = 0; |
3869 | enum rtx_code code; | |
3870 | ||
3871 | /* Ensure this is the right kind of insn. */ | |
bbe0b6d7 | 3872 | gcc_assert (any_condjump_p (insn)); |
3873 | ||
b2816317 | 3874 | set = pc_set (insn); |
752df20e | 3875 | |
3876 | /* See if this jump condition is known true or false. */ | |
3877 | if (taken) | |
b2816317 | 3878 | cond_known_true = (XEXP (SET_SRC (set), 2) == pc_rtx); |
752df20e | 3879 | else |
b2816317 | 3880 | cond_known_true = (XEXP (SET_SRC (set), 1) == pc_rtx); |
752df20e | 3881 | |
3882 | /* Get the type of comparison being done and the operands being compared. | |
3883 | If we had to reverse a non-equality condition, record that fact so we | |
3884 | know that it isn't valid for floating-point. */ | |
b2816317 | 3885 | code = GET_CODE (XEXP (SET_SRC (set), 0)); |
3886 | op0 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 0), insn); | |
3887 | op1 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 1), insn); | |
752df20e | 3888 | |
5c4c31e3 | 3889 | code = find_comparison_args (code, &op0, &op1, &mode0, &mode1); |
752df20e | 3890 | if (! cond_known_true) |
3891 | { | |
7da6ea0c | 3892 | code = reversed_comparison_code_parts (code, op0, op1, insn); |
a4110d9a | 3893 | |
3894 | /* Don't remember if we can't find the inverse. */ | |
3895 | if (code == UNKNOWN) | |
3896 | return; | |
752df20e | 3897 | } |
3898 | ||
3899 | /* The mode is the mode of the non-constant. */ | |
5c4c31e3 | 3900 | mode = mode0; |
3901 | if (mode1 != VOIDmode) | |
3902 | mode = mode1; | |
752df20e | 3903 | |
3904 | record_jump_cond (code, mode, op0, op1, reversed_nonequality); | |
3905 | } | |
3906 | ||
cfa1a80d | 3907 | /* Yet another form of subreg creation. In this case, we want something in |
3908 | MODE, and we should assume OP has MODE iff it is naturally modeless. */ | |
3909 | ||
3910 | static rtx | |
3754d046 | 3911 | record_jump_cond_subreg (machine_mode mode, rtx op) |
cfa1a80d | 3912 | { |
3754d046 | 3913 | machine_mode op_mode = GET_MODE (op); |
cfa1a80d | 3914 | if (op_mode == mode || op_mode == VOIDmode) |
3915 | return op; | |
3916 | return lowpart_subreg (mode, op, op_mode); | |
3917 | } | |
3918 | ||
752df20e | 3919 | /* We know that comparison CODE applied to OP0 and OP1 in MODE is true. |
3920 | REVERSED_NONEQUALITY is nonzero if CODE had to be swapped. | |
3921 | Make any useful entries we can with that information. Called from | |
3922 | above function and called recursively. */ | |
3923 | ||
3924 | static void | |
3754d046 | 3925 | record_jump_cond (enum rtx_code code, machine_mode mode, rtx op0, |
8ec3a57b | 3926 | rtx op1, int reversed_nonequality) |
752df20e | 3927 | { |
952bc06d | 3928 | unsigned op0_hash, op1_hash; |
0af17926 | 3929 | int op0_in_memory, op1_in_memory; |
752df20e | 3930 | struct table_elt *op0_elt, *op1_elt; |
3931 | ||
3932 | /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG, | |
3933 | we know that they are also equal in the smaller mode (this is also | |
3934 | true for all smaller modes whether or not there is a SUBREG, but | |
f5d1f9f9 | 3935 | is not worth testing for with no SUBREG). */ |
752df20e | 3936 | |
3c5cc27f | 3937 | /* Note that GET_MODE (op0) may not equal MODE. */ |
b537bfdb | 3938 | if (code == EQ && paradoxical_subreg_p (op0)) |
752df20e | 3939 | { |
3754d046 | 3940 | machine_mode inner_mode = GET_MODE (SUBREG_REG (op0)); |
cfa1a80d | 3941 | rtx tem = record_jump_cond_subreg (inner_mode, op1); |
3942 | if (tem) | |
3943 | record_jump_cond (code, mode, SUBREG_REG (op0), tem, | |
3944 | reversed_nonequality); | |
752df20e | 3945 | } |
3946 | ||
b537bfdb | 3947 | if (code == EQ && paradoxical_subreg_p (op1)) |
752df20e | 3948 | { |
3754d046 | 3949 | machine_mode inner_mode = GET_MODE (SUBREG_REG (op1)); |
cfa1a80d | 3950 | rtx tem = record_jump_cond_subreg (inner_mode, op0); |
3951 | if (tem) | |
3952 | record_jump_cond (code, mode, SUBREG_REG (op1), tem, | |
3953 | reversed_nonequality); | |
752df20e | 3954 | } |
3955 | ||
cb10db9d | 3956 | /* Similarly, if this is an NE comparison, and either is a SUBREG |
752df20e | 3957 | making a smaller mode, we know the whole thing is also NE. */ |
3958 | ||
3c5cc27f | 3959 | /* Note that GET_MODE (op0) may not equal MODE; |
3960 | if we test MODE instead, we can get an infinite recursion | |
3961 | alternating between two modes each wider than MODE. */ | |
3962 | ||
752df20e | 3963 | if (code == NE && GET_CODE (op0) == SUBREG |
3964 | && subreg_lowpart_p (op0) | |
3c5cc27f | 3965 | && (GET_MODE_SIZE (GET_MODE (op0)) |
3966 | < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0))))) | |
752df20e | 3967 | { |
3754d046 | 3968 | machine_mode inner_mode = GET_MODE (SUBREG_REG (op0)); |
cfa1a80d | 3969 | rtx tem = record_jump_cond_subreg (inner_mode, op1); |
3970 | if (tem) | |
3971 | record_jump_cond (code, mode, SUBREG_REG (op0), tem, | |
3972 | reversed_nonequality); | |
752df20e | 3973 | } |
3974 | ||
3975 | if (code == NE && GET_CODE (op1) == SUBREG | |
3976 | && subreg_lowpart_p (op1) | |
3c5cc27f | 3977 | && (GET_MODE_SIZE (GET_MODE (op1)) |
3978 | < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1))))) | |
752df20e | 3979 | { |
3754d046 | 3980 | machine_mode inner_mode = GET_MODE (SUBREG_REG (op1)); |
cfa1a80d | 3981 | rtx tem = record_jump_cond_subreg (inner_mode, op0); |
3982 | if (tem) | |
3983 | record_jump_cond (code, mode, SUBREG_REG (op1), tem, | |
3984 | reversed_nonequality); | |
752df20e | 3985 | } |
3986 | ||
3987 | /* Hash both operands. */ | |
3988 | ||
3989 | do_not_record = 0; | |
3990 | hash_arg_in_memory = 0; | |
952bc06d | 3991 | op0_hash = HASH (op0, mode); |
752df20e | 3992 | op0_in_memory = hash_arg_in_memory; |
752df20e | 3993 | |
3994 | if (do_not_record) | |
3995 | return; | |
3996 | ||
3997 | do_not_record = 0; | |
3998 | hash_arg_in_memory = 0; | |
952bc06d | 3999 | op1_hash = HASH (op1, mode); |
752df20e | 4000 | op1_in_memory = hash_arg_in_memory; |
cb10db9d | 4001 | |
752df20e | 4002 | if (do_not_record) |
4003 | return; | |
4004 | ||
4005 | /* Look up both operands. */ | |
952bc06d | 4006 | op0_elt = lookup (op0, op0_hash, mode); |
4007 | op1_elt = lookup (op1, op1_hash, mode); | |
752df20e | 4008 | |
9f8339f2 | 4009 | /* If both operands are already equivalent or if they are not in the |
4010 | table but are identical, do nothing. */ | |
4011 | if ((op0_elt != 0 && op1_elt != 0 | |
4012 | && op0_elt->first_same_value == op1_elt->first_same_value) | |
4013 | || op0 == op1 || rtx_equal_p (op0, op1)) | |
4014 | return; | |
4015 | ||
752df20e | 4016 | /* If we aren't setting two things equal all we can do is save this |
5b620701 | 4017 | comparison. Similarly if this is floating-point. In the latter |
4018 | case, OP1 might be zero and both -0.0 and 0.0 are equal to it. | |
4019 | If we record the equality, we might inadvertently delete code | |
4020 | whose intent was to change -0 to +0. */ | |
4021 | ||
c1712420 | 4022 | if (code != EQ || FLOAT_MODE_P (GET_MODE (op0))) |
752df20e | 4023 | { |
a7f3b1c7 | 4024 | struct qty_table_elem *ent; |
4025 | int qty; | |
4026 | ||
752df20e | 4027 | /* If we reversed a floating-point comparison, if OP0 is not a |
4028 | register, or if OP1 is neither a register or constant, we can't | |
4029 | do anything. */ | |
4030 | ||
8ad4c111 | 4031 | if (!REG_P (op1)) |
752df20e | 4032 | op1 = equiv_constant (op1); |
4033 | ||
c1712420 | 4034 | if ((reversed_nonequality && FLOAT_MODE_P (mode)) |
8ad4c111 | 4035 | || !REG_P (op0) || op1 == 0) |
752df20e | 4036 | return; |
4037 | ||
4038 | /* Put OP0 in the hash table if it isn't already. This gives it a | |
4039 | new quantity number. */ | |
4040 | if (op0_elt == 0) | |
4041 | { | |
4679ade3 | 4042 | if (insert_regs (op0, NULL, 0)) |
752df20e | 4043 | { |
4044 | rehash_using_reg (op0); | |
952bc06d | 4045 | op0_hash = HASH (op0, mode); |
a45f1da6 | 4046 | |
4047 | /* If OP0 is contained in OP1, this changes its hash code | |
4048 | as well. Faster to rehash than to check, except | |
4049 | for the simple case of a constant. */ | |
4050 | if (! CONSTANT_P (op1)) | |
952bc06d | 4051 | op1_hash = HASH (op1,mode); |
752df20e | 4052 | } |
4053 | ||
4679ade3 | 4054 | op0_elt = insert (op0, NULL, op0_hash, mode); |
752df20e | 4055 | op0_elt->in_memory = op0_in_memory; |
752df20e | 4056 | } |
4057 | ||
a7f3b1c7 | 4058 | qty = REG_QTY (REGNO (op0)); |
4059 | ent = &qty_table[qty]; | |
4060 | ||
4061 | ent->comparison_code = code; | |
8ad4c111 | 4062 | if (REG_P (op1)) |
752df20e | 4063 | { |
95f65c26 | 4064 | /* Look it up again--in case op0 and op1 are the same. */ |
952bc06d | 4065 | op1_elt = lookup (op1, op1_hash, mode); |
95f65c26 | 4066 | |
752df20e | 4067 | /* Put OP1 in the hash table so it gets a new quantity number. */ |
4068 | if (op1_elt == 0) | |
4069 | { | |
4679ade3 | 4070 | if (insert_regs (op1, NULL, 0)) |
752df20e | 4071 | { |
4072 | rehash_using_reg (op1); | |
952bc06d | 4073 | op1_hash = HASH (op1, mode); |
752df20e | 4074 | } |
4075 | ||
4679ade3 | 4076 | op1_elt = insert (op1, NULL, op1_hash, mode); |
752df20e | 4077 | op1_elt->in_memory = op1_in_memory; |
752df20e | 4078 | } |
4079 | ||
a7f3b1c7 | 4080 | ent->comparison_const = NULL_RTX; |
4081 | ent->comparison_qty = REG_QTY (REGNO (op1)); | |
752df20e | 4082 | } |
4083 | else | |
4084 | { | |
a7f3b1c7 | 4085 | ent->comparison_const = op1; |
4086 | ent->comparison_qty = -1; | |
752df20e | 4087 | } |
4088 | ||
4089 | return; | |
4090 | } | |
4091 | ||
56e155ea | 4092 | /* If either side is still missing an equivalence, make it now, |
4093 | then merge the equivalences. */ | |
752df20e | 4094 | |
752df20e | 4095 | if (op0_elt == 0) |
4096 | { | |
4679ade3 | 4097 | if (insert_regs (op0, NULL, 0)) |
752df20e | 4098 | { |
4099 | rehash_using_reg (op0); | |
952bc06d | 4100 | op0_hash = HASH (op0, mode); |
752df20e | 4101 | } |
4102 | ||
4679ade3 | 4103 | op0_elt = insert (op0, NULL, op0_hash, mode); |
752df20e | 4104 | op0_elt->in_memory = op0_in_memory; |
752df20e | 4105 | } |
4106 | ||
4107 | if (op1_elt == 0) | |
4108 | { | |
4679ade3 | 4109 | if (insert_regs (op1, NULL, 0)) |
752df20e | 4110 | { |
4111 | rehash_using_reg (op1); | |
952bc06d | 4112 | op1_hash = HASH (op1, mode); |
752df20e | 4113 | } |
4114 | ||
4679ade3 | 4115 | op1_elt = insert (op1, NULL, op1_hash, mode); |
752df20e | 4116 | op1_elt->in_memory = op1_in_memory; |
752df20e | 4117 | } |
56e155ea | 4118 | |
4119 | merge_equiv_classes (op0_elt, op1_elt); | |
752df20e | 4120 | } |
4121 | \f | |
4122 | /* CSE processing for one instruction. | |
2aca5650 | 4123 | |
4124 | Most "true" common subexpressions are mostly optimized away in GIMPLE, | |
4125 | but the few that "leak through" are cleaned up by cse_insn, and complex | |
4126 | addressing modes are often formed here. | |
4127 | ||
4128 | The main function is cse_insn, and between here and that function | |
4129 | a couple of helper functions is defined to keep the size of cse_insn | |
4130 | within reasonable proportions. | |
4131 | ||
4132 | Data is shared between the main and helper functions via STRUCT SET, | |
4133 | that contains all data related for every set in the instruction that | |
4134 | is being processed. | |
4135 | ||
4136 | Note that cse_main processes all sets in the instruction. Most | |
4137 | passes in GCC only process simple SET insns or single_set insns, but | |
4138 | CSE processes insns with multiple sets as well. */ | |
752df20e | 4139 | |
4140 | /* Data on one SET contained in the instruction. */ | |
4141 | ||
4142 | struct set | |
4143 | { | |
4144 | /* The SET rtx itself. */ | |
4145 | rtx rtl; | |
4146 | /* The SET_SRC of the rtx (the original value, if it is changing). */ | |
4147 | rtx src; | |
4148 | /* The hash-table element for the SET_SRC of the SET. */ | |
4149 | struct table_elt *src_elt; | |
952bc06d | 4150 | /* Hash value for the SET_SRC. */ |
4151 | unsigned src_hash; | |
4152 | /* Hash value for the SET_DEST. */ | |
4153 | unsigned dest_hash; | |
752df20e | 4154 | /* The SET_DEST, with SUBREG, etc., stripped. */ |
4155 | rtx inner_dest; | |
cb10db9d | 4156 | /* Nonzero if the SET_SRC is in memory. */ |
752df20e | 4157 | char src_in_memory; |
752df20e | 4158 | /* Nonzero if the SET_SRC contains something |
4159 | whose value cannot be predicted and understood. */ | |
4160 | char src_volatile; | |
d8b9732d | 4161 | /* Original machine mode, in case it becomes a CONST_INT. |
4162 | The size of this field should match the size of the mode | |
4163 | field of struct rtx_def (see rtl.h). */ | |
4164 | ENUM_BITFIELD(machine_mode) mode : 8; | |
752df20e | 4165 | /* A constant equivalent for SET_SRC, if any. */ |
4166 | rtx src_const; | |
952bc06d | 4167 | /* Hash value of constant equivalent for SET_SRC. */ |
4168 | unsigned src_const_hash; | |
752df20e | 4169 | /* Table entry for constant equivalent for SET_SRC, if any. */ |
4170 | struct table_elt *src_const_elt; | |
977ffed2 | 4171 | /* Table entry for the destination address. */ |
4172 | struct table_elt *dest_addr_elt; | |
752df20e | 4173 | }; |
2aca5650 | 4174 | \f |
4175 | /* Special handling for (set REG0 REG1) where REG0 is the | |
4176 | "cheapest", cheaper than REG1. After cse, REG1 will probably not | |
4177 | be used in the sequel, so (if easily done) change this insn to | |
4178 | (set REG1 REG0) and replace REG1 with REG0 in the previous insn | |
4179 | that computed their value. Then REG1 will become a dead store | |
4180 | and won't cloud the situation for later optimizations. | |
4181 | ||
4182 | Do not make this change if REG1 is a hard register, because it will | |
4183 | then be used in the sequel and we may be changing a two-operand insn | |
4184 | into a three-operand insn. | |
4185 | ||
4186 | This is the last transformation that cse_insn will try to do. */ | |
752df20e | 4187 | |
4188 | static void | |
47f1d198 | 4189 | try_back_substitute_reg (rtx set, rtx_insn *insn) |
752df20e | 4190 | { |
2aca5650 | 4191 | rtx dest = SET_DEST (set); |
4192 | rtx src = SET_SRC (set); | |
752df20e | 4193 | |
2aca5650 | 4194 | if (REG_P (dest) |
4195 | && REG_P (src) && ! HARD_REGISTER_P (src) | |
4196 | && REGNO_QTY_VALID_P (REGNO (src))) | |
4197 | { | |
4198 | int src_q = REG_QTY (REGNO (src)); | |
4199 | struct qty_table_elem *src_ent = &qty_table[src_q]; | |
752df20e | 4200 | |
2aca5650 | 4201 | if (src_ent->first_reg == REGNO (dest)) |
4202 | { | |
4203 | /* Scan for the previous nonnote insn, but stop at a basic | |
4204 | block boundary. */ | |
47f1d198 | 4205 | rtx_insn *prev = insn; |
4206 | rtx_insn *bb_head = BB_HEAD (BLOCK_FOR_INSN (insn)); | |
2aca5650 | 4207 | do |
4208 | { | |
4209 | prev = PREV_INSN (prev); | |
4210 | } | |
4211 | while (prev != bb_head && (NOTE_P (prev) || DEBUG_INSN_P (prev))); | |
752df20e | 4212 | |
2aca5650 | 4213 | /* Do not swap the registers around if the previous instruction |
4214 | attaches a REG_EQUIV note to REG1. | |
752df20e | 4215 | |
2aca5650 | 4216 | ??? It's not entirely clear whether we can transfer a REG_EQUIV |
4217 | from the pseudo that originally shadowed an incoming argument | |
4218 | to another register. Some uses of REG_EQUIV might rely on it | |
4219 | being attached to REG1 rather than REG2. | |
752df20e | 4220 | |
2aca5650 | 4221 | This section previously turned the REG_EQUIV into a REG_EQUAL |
4222 | note. We cannot do that because REG_EQUIV may provide an | |
4223 | uninitialized stack slot when REG_PARM_STACK_SPACE is used. */ | |
4224 | if (NONJUMP_INSN_P (prev) | |
4225 | && GET_CODE (PATTERN (prev)) == SET | |
4226 | && SET_DEST (PATTERN (prev)) == src | |
4227 | && ! find_reg_note (prev, REG_EQUIV, NULL_RTX)) | |
4228 | { | |
4229 | rtx note; | |
4230 | ||
4231 | validate_change (prev, &SET_DEST (PATTERN (prev)), dest, 1); | |
4232 | validate_change (insn, &SET_DEST (set), src, 1); | |
4233 | validate_change (insn, &SET_SRC (set), dest, 1); | |
4234 | apply_change_group (); | |
4235 | ||
4236 | /* If INSN has a REG_EQUAL note, and this note mentions | |
4237 | REG0, then we must delete it, because the value in | |
4238 | REG0 has changed. If the note's value is REG1, we must | |
4239 | also delete it because that is now this insn's dest. */ | |
4240 | note = find_reg_note (insn, REG_EQUAL, NULL_RTX); | |
4241 | if (note != 0 | |
4242 | && (reg_mentioned_p (dest, XEXP (note, 0)) | |
4243 | || rtx_equal_p (src, XEXP (note, 0)))) | |
4244 | remove_note (insn, note); | |
4245 | } | |
ddaf7ad3 | 4246 | } |
b84155cd | 4247 | } |
2aca5650 | 4248 | } |
4249 | \f | |
4250 | /* Record all the SETs in this instruction into SETS_PTR, | |
4251 | and return the number of recorded sets. */ | |
4252 | static int | |
47f1d198 | 4253 | find_sets_in_insn (rtx_insn *insn, struct set **psets) |
2aca5650 | 4254 | { |
4255 | struct set *sets = *psets; | |
4256 | int n_sets = 0; | |
4257 | rtx x = PATTERN (insn); | |
b84155cd | 4258 | |
752df20e | 4259 | if (GET_CODE (x) == SET) |
4260 | { | |
752df20e | 4261 | /* Ignore SETs that are unconditional jumps. |
4262 | They never need cse processing, so this does not hurt. | |
4263 | The reason is not efficiency but rather | |
4264 | so that we can test at the end for instructions | |
4265 | that have been simplified to unconditional jumps | |
4266 | and not be misled by unchanged instructions | |
4267 | that were unconditional jumps to begin with. */ | |
4268 | if (SET_DEST (x) == pc_rtx | |
4269 | && GET_CODE (SET_SRC (x)) == LABEL_REF) | |
4270 | ; | |
752df20e | 4271 | /* Don't count call-insns, (set (reg 0) (call ...)), as a set. |
4272 | The hard function value register is used only once, to copy to | |
2aca5650 | 4273 | someplace else, so it isn't worth cse'ing. */ |
752df20e | 4274 | else if (GET_CODE (SET_SRC (x)) == CALL) |
2aca5650 | 4275 | ; |
752df20e | 4276 | else |
2aca5650 | 4277 | sets[n_sets++].rtl = x; |
752df20e | 4278 | } |
4279 | else if (GET_CODE (x) == PARALLEL) | |
4280 | { | |
2aca5650 | 4281 | int i, lim = XVECLEN (x, 0); |
cb10db9d | 4282 | |
20d3ff08 | 4283 | /* Go over the expressions of the PARALLEL in forward order, to |
2aca5650 | 4284 | put them in the same order in the SETS array. */ |
752df20e | 4285 | for (i = 0; i < lim; i++) |
4286 | { | |
19cb6b50 | 4287 | rtx y = XVECEXP (x, 0, i); |
752df20e | 4288 | if (GET_CODE (y) == SET) |
4289 | { | |
8d5dd220 | 4290 | /* As above, we ignore unconditional jumps and call-insns and |
4291 | ignore the result of apply_change_group. */ | |
2aca5650 | 4292 | if (SET_DEST (y) == pc_rtx |
4293 | && GET_CODE (SET_SRC (y)) == LABEL_REF) | |
4294 | ; | |
4295 | else if (GET_CODE (SET_SRC (y)) == CALL) | |
752df20e | 4296 | ; |
4297 | else | |
4298 | sets[n_sets++].rtl = y; | |
4299 | } | |
752df20e | 4300 | } |
4301 | } | |
2aca5650 | 4302 | |
4303 | return n_sets; | |
4304 | } | |
4305 | \f | |
4306 | /* Where possible, substitute every register reference in the N_SETS | |
4307 | number of SETS in INSN with the the canonical register. | |
4308 | ||
4309 | Register canonicalization propagatest the earliest register (i.e. | |
4310 | one that is set before INSN) with the same value. This is a very | |
4311 | useful, simple form of CSE, to clean up warts from expanding GIMPLE | |
4312 | to RTL. For instance, a CONST for an address is usually expanded | |
4313 | multiple times to loads into different registers, thus creating many | |
4314 | subexpressions of the form: | |
4315 | ||
4316 | (set (reg1) (some_const)) | |
4317 | (set (mem (... reg1 ...) (thing))) | |
4318 | (set (reg2) (some_const)) | |
4319 | (set (mem (... reg2 ...) (thing))) | |
4320 | ||
4321 | After canonicalizing, the code takes the following form: | |
4322 | ||
4323 | (set (reg1) (some_const)) | |
4324 | (set (mem (... reg1 ...) (thing))) | |
4325 | (set (reg2) (some_const)) | |
4326 | (set (mem (... reg1 ...) (thing))) | |
4327 | ||
4328 | The set to reg2 is now trivially dead, and the memory reference (or | |
4329 | address, or whatever) may be a candidate for further CSEing. | |
4330 | ||
4331 | In this function, the result of apply_change_group can be ignored; | |
4332 | see canon_reg. */ | |
4333 | ||
4334 | static void | |
47f1d198 | 4335 | canonicalize_insn (rtx_insn *insn, struct set **psets, int n_sets) |
2aca5650 | 4336 | { |
4337 | struct set *sets = *psets; | |
4338 | rtx tem; | |
4339 | rtx x = PATTERN (insn); | |
4340 | int i; | |
4341 | ||
4342 | if (CALL_P (insn)) | |
4343 | { | |
4344 | for (tem = CALL_INSN_FUNCTION_USAGE (insn); tem; tem = XEXP (tem, 1)) | |
c8010b80 | 4345 | if (GET_CODE (XEXP (tem, 0)) != SET) |
4346 | XEXP (tem, 0) = canon_reg (XEXP (tem, 0), insn); | |
2aca5650 | 4347 | } |
4348 | ||
4349 | if (GET_CODE (x) == SET && GET_CODE (SET_SRC (x)) == CALL) | |
4350 | { | |
4351 | canon_reg (SET_SRC (x), insn); | |
4352 | apply_change_group (); | |
4353 | fold_rtx (SET_SRC (x), insn); | |
4354 | } | |
752df20e | 4355 | else if (GET_CODE (x) == CLOBBER) |
4356 | { | |
2aca5650 | 4357 | /* If we clobber memory, canon the address. |
4358 | This does nothing when a register is clobbered | |
4359 | because we have already invalidated the reg. */ | |
e16ceb8e | 4360 | if (MEM_P (XEXP (x, 0))) |
3072d30e | 4361 | canon_reg (XEXP (x, 0), insn); |
752df20e | 4362 | } |
752df20e | 4363 | else if (GET_CODE (x) == USE |
8ad4c111 | 4364 | && ! (REG_P (XEXP (x, 0)) |
752df20e | 4365 | && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)) |
2aca5650 | 4366 | /* Canonicalize a USE of a pseudo register or memory location. */ |
e126ac03 | 4367 | canon_reg (x, insn); |
4368 | else if (GET_CODE (x) == ASM_OPERANDS) | |
4369 | { | |
4370 | for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--) | |
4371 | { | |
4372 | rtx input = ASM_OPERANDS_INPUT (x, i); | |
4373 | if (!(REG_P (input) && REGNO (input) < FIRST_PSEUDO_REGISTER)) | |
4374 | { | |
4375 | input = canon_reg (input, insn); | |
4376 | validate_change (insn, &ASM_OPERANDS_INPUT (x, i), input, 1); | |
4377 | } | |
4378 | } | |
4379 | } | |
752df20e | 4380 | else if (GET_CODE (x) == CALL) |
4381 | { | |
4382 | canon_reg (x, insn); | |
8b82837b | 4383 | apply_change_group (); |
752df20e | 4384 | fold_rtx (x, insn); |
4385 | } | |
9845d120 | 4386 | else if (DEBUG_INSN_P (insn)) |
4387 | canon_reg (PATTERN (insn), insn); | |
2aca5650 | 4388 | else if (GET_CODE (x) == PARALLEL) |
4389 | { | |
4390 | for (i = XVECLEN (x, 0) - 1; i >= 0; i--) | |
4391 | { | |
4392 | rtx y = XVECEXP (x, 0, i); | |
4393 | if (GET_CODE (y) == SET && GET_CODE (SET_SRC (y)) == CALL) | |
4394 | { | |
4395 | canon_reg (SET_SRC (y), insn); | |
4396 | apply_change_group (); | |
4397 | fold_rtx (SET_SRC (y), insn); | |
4398 | } | |
4399 | else if (GET_CODE (y) == CLOBBER) | |
4400 | { | |
4401 | if (MEM_P (XEXP (y, 0))) | |
4402 | canon_reg (XEXP (y, 0), insn); | |
4403 | } | |
4404 | else if (GET_CODE (y) == USE | |
4405 | && ! (REG_P (XEXP (y, 0)) | |
4406 | && REGNO (XEXP (y, 0)) < FIRST_PSEUDO_REGISTER)) | |
4407 | canon_reg (y, insn); | |
4408 | else if (GET_CODE (y) == CALL) | |
4409 | { | |
4410 | canon_reg (y, insn); | |
4411 | apply_change_group (); | |
4412 | fold_rtx (y, insn); | |
4413 | } | |
4414 | } | |
4415 | } | |
752df20e | 4416 | |
384770d0 | 4417 | if (n_sets == 1 && REG_NOTES (insn) != 0 |
2aca5650 | 4418 | && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0) |
24d87432 | 4419 | { |
2aca5650 | 4420 | /* We potentially will process this insn many times. Therefore, |
4421 | drop the REG_EQUAL note if it is equal to the SET_SRC of the | |
4422 | unique set in INSN. | |
4423 | ||
4424 | Do not do so if the REG_EQUAL note is for a STRICT_LOW_PART, | |
4425 | because cse_insn handles those specially. */ | |
4426 | if (GET_CODE (SET_DEST (sets[0].rtl)) != STRICT_LOW_PART | |
4427 | && rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl))) | |
4428 | remove_note (insn, tem); | |
4429 | else | |
4430 | { | |
4431 | canon_reg (XEXP (tem, 0), insn); | |
4432 | apply_change_group (); | |
4433 | XEXP (tem, 0) = fold_rtx (XEXP (tem, 0), insn); | |
4434 | df_notes_rescan (insn); | |
4435 | } | |
24d87432 | 4436 | } |
752df20e | 4437 | |
4438 | /* Canonicalize sources and addresses of destinations. | |
4439 | We do this in a separate pass to avoid problems when a MATCH_DUP is | |
4440 | present in the insn pattern. In that case, we want to ensure that | |
4441 | we don't break the duplicate nature of the pattern. So we will replace | |
4442 | both operands at the same time. Otherwise, we would fail to find an | |
4443 | equivalent substitution in the loop calling validate_change below. | |
752df20e | 4444 | |
4445 | We used to suppress canonicalization of DEST if it appears in SRC, | |
8b82837b | 4446 | but we don't do this any more. */ |
752df20e | 4447 | |
4448 | for (i = 0; i < n_sets; i++) | |
4449 | { | |
4450 | rtx dest = SET_DEST (sets[i].rtl); | |
4451 | rtx src = SET_SRC (sets[i].rtl); | |
d328ebdf | 4452 | rtx new_rtx = canon_reg (src, insn); |
752df20e | 4453 | |
d328ebdf | 4454 | validate_change (insn, &SET_SRC (sets[i].rtl), new_rtx, 1); |
752df20e | 4455 | |
476d094d | 4456 | if (GET_CODE (dest) == ZERO_EXTRACT) |
752df20e | 4457 | { |
4458 | validate_change (insn, &XEXP (dest, 1), | |
8b82837b | 4459 | canon_reg (XEXP (dest, 1), insn), 1); |
752df20e | 4460 | validate_change (insn, &XEXP (dest, 2), |
8b82837b | 4461 | canon_reg (XEXP (dest, 2), insn), 1); |
752df20e | 4462 | } |
4463 | ||
476d094d | 4464 | while (GET_CODE (dest) == SUBREG |
752df20e | 4465 | || GET_CODE (dest) == ZERO_EXTRACT |
476d094d | 4466 | || GET_CODE (dest) == STRICT_LOW_PART) |
752df20e | 4467 | dest = XEXP (dest, 0); |
4468 | ||
e16ceb8e | 4469 | if (MEM_P (dest)) |
752df20e | 4470 | canon_reg (dest, insn); |
4471 | } | |
4472 | ||
8b82837b | 4473 | /* Now that we have done all the replacements, we can apply the change |
4474 | group and see if they all work. Note that this will cause some | |
4475 | canonicalizations that would have worked individually not to be applied | |
4476 | because some other canonicalization didn't work, but this should not | |
cb10db9d | 4477 | occur often. |
8d5dd220 | 4478 | |
4479 | The result of apply_change_group can be ignored; see canon_reg. */ | |
8b82837b | 4480 | |
4481 | apply_change_group (); | |
2aca5650 | 4482 | } |
4483 | \f | |
4484 | /* Main function of CSE. | |
4485 | First simplify sources and addresses of all assignments | |
4486 | in the instruction, using previously-computed equivalents values. | |
4487 | Then install the new sources and destinations in the table | |
4488 | of available values. */ | |
4489 | ||
4490 | static void | |
47f1d198 | 4491 | cse_insn (rtx_insn *insn) |
2aca5650 | 4492 | { |
4493 | rtx x = PATTERN (insn); | |
4494 | int i; | |
4495 | rtx tem; | |
4496 | int n_sets = 0; | |
4497 | ||
4498 | rtx src_eqv = 0; | |
4499 | struct table_elt *src_eqv_elt = 0; | |
4500 | int src_eqv_volatile = 0; | |
4501 | int src_eqv_in_memory = 0; | |
4502 | unsigned src_eqv_hash = 0; | |
4503 | ||
4504 | struct set *sets = (struct set *) 0; | |
4505 | ||
4506 | if (GET_CODE (x) == SET) | |
4507 | sets = XALLOCA (struct set); | |
4508 | else if (GET_CODE (x) == PARALLEL) | |
4509 | sets = XALLOCAVEC (struct set, XVECLEN (x, 0)); | |
4510 | ||
4511 | this_insn = insn; | |
2aca5650 | 4512 | /* Records what this insn does to set CC0. */ |
4513 | this_insn_cc0 = 0; | |
4514 | this_insn_cc0_mode = VOIDmode; | |
2aca5650 | 4515 | |
4516 | /* Find all regs explicitly clobbered in this insn, | |
4517 | to ensure they are not replaced with any other regs | |
4518 | elsewhere in this insn. */ | |
4519 | invalidate_from_sets_and_clobbers (insn); | |
4520 | ||
4521 | /* Record all the SETs in this instruction. */ | |
4522 | n_sets = find_sets_in_insn (insn, &sets); | |
4523 | ||
4524 | /* Substitute the canonical register where possible. */ | |
4525 | canonicalize_insn (insn, &sets, n_sets); | |
4526 | ||
4527 | /* If this insn has a REG_EQUAL note, store the equivalent value in SRC_EQV, | |
4528 | if different, or if the DEST is a STRICT_LOW_PART. The latter condition | |
4529 | is necessary because SRC_EQV is handled specially for this case, and if | |
4530 | it isn't set, then there will be no equivalence for the destination. */ | |
4531 | if (n_sets == 1 && REG_NOTES (insn) != 0 | |
4532 | && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0 | |
4533 | && (! rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl)) | |
4534 | || GET_CODE (SET_DEST (sets[0].rtl)) == STRICT_LOW_PART)) | |
4535 | src_eqv = copy_rtx (XEXP (tem, 0)); | |
8b82837b | 4536 | |
752df20e | 4537 | /* Set sets[i].src_elt to the class each source belongs to. |
4538 | Detect assignments from or to volatile things | |
4539 | and set set[i] to zero so they will be ignored | |
4540 | in the rest of this function. | |
4541 | ||
4542 | Nothing in this loop changes the hash table or the register chains. */ | |
4543 | ||
4544 | for (i = 0; i < n_sets; i++) | |
4545 | { | |
a49d9163 | 4546 | bool repeat = false; |
19cb6b50 | 4547 | rtx src, dest; |
4548 | rtx src_folded; | |
4549 | struct table_elt *elt = 0, *p; | |
3754d046 | 4550 | machine_mode mode; |
752df20e | 4551 | rtx src_eqv_here; |
4552 | rtx src_const = 0; | |
4553 | rtx src_related = 0; | |
01c8e4c9 | 4554 | bool src_related_is_const_anchor = false; |
752df20e | 4555 | struct table_elt *src_const_elt = 0; |
fb561825 | 4556 | int src_cost = MAX_COST; |
4557 | int src_eqv_cost = MAX_COST; | |
4558 | int src_folded_cost = MAX_COST; | |
4559 | int src_related_cost = MAX_COST; | |
4560 | int src_elt_cost = MAX_COST; | |
4561 | int src_regcost = MAX_COST; | |
4562 | int src_eqv_regcost = MAX_COST; | |
4563 | int src_folded_regcost = MAX_COST; | |
4564 | int src_related_regcost = MAX_COST; | |
4565 | int src_elt_regcost = MAX_COST; | |
d10cfa8d | 4566 | /* Set nonzero if we need to call force_const_mem on with the |
752df20e | 4567 | contents of src_folded before using it. */ |
4568 | int src_folded_force_flag = 0; | |
4569 | ||
4570 | dest = SET_DEST (sets[i].rtl); | |
4571 | src = SET_SRC (sets[i].rtl); | |
4572 | ||
4573 | /* If SRC is a constant that has no machine mode, | |
4574 | hash it with the destination's machine mode. | |
4575 | This way we can keep different modes separate. */ | |
4576 | ||
4577 | mode = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src); | |
4578 | sets[i].mode = mode; | |
4579 | ||
4580 | if (src_eqv) | |
4581 | { | |
3754d046 | 4582 | machine_mode eqvmode = mode; |
752df20e | 4583 | if (GET_CODE (dest) == STRICT_LOW_PART) |
4584 | eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0))); | |
4585 | do_not_record = 0; | |
4586 | hash_arg_in_memory = 0; | |
952bc06d | 4587 | src_eqv_hash = HASH (src_eqv, eqvmode); |
752df20e | 4588 | |
4589 | /* Find the equivalence class for the equivalent expression. */ | |
4590 | ||
4591 | if (!do_not_record) | |
952bc06d | 4592 | src_eqv_elt = lookup (src_eqv, src_eqv_hash, eqvmode); |
752df20e | 4593 | |
4594 | src_eqv_volatile = do_not_record; | |
4595 | src_eqv_in_memory = hash_arg_in_memory; | |
752df20e | 4596 | } |
4597 | ||
4598 | /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the | |
4599 | value of the INNER register, not the destination. So it is not | |
fd6efe25 | 4600 | a valid substitution for the source. But save it for later. */ |
752df20e | 4601 | if (GET_CODE (dest) == STRICT_LOW_PART) |
4602 | src_eqv_here = 0; | |
4603 | else | |
4604 | src_eqv_here = src_eqv; | |
4605 | ||
4606 | /* Simplify and foldable subexpressions in SRC. Then get the fully- | |
4607 | simplified result, which may not necessarily be valid. */ | |
4608 | src_folded = fold_rtx (src, insn); | |
4609 | ||
c93674f2 | 4610 | #if 0 |
4611 | /* ??? This caused bad code to be generated for the m68k port with -O2. | |
4612 | Suppose src is (CONST_INT -1), and that after truncation src_folded | |
4613 | is (CONST_INT 3). Suppose src_folded is then used for src_const. | |
4614 | At the end we will add src and src_const to the same equivalence | |
4615 | class. We now have 3 and -1 on the same equivalence class. This | |
4616 | causes later instructions to be mis-optimized. */ | |
752df20e | 4617 | /* If storing a constant in a bitfield, pre-truncate the constant |
4618 | so we will be able to record it later. */ | |
476d094d | 4619 | if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT) |
752df20e | 4620 | { |
4621 | rtx width = XEXP (SET_DEST (sets[i].rtl), 1); | |
4622 | ||
971ba038 | 4623 | if (CONST_INT_P (src) |
4624 | && CONST_INT_P (width) | |
b572011e | 4625 | && INTVAL (width) < HOST_BITS_PER_WIDE_INT |
4626 | && (INTVAL (src) & ((HOST_WIDE_INT) (-1) << INTVAL (width)))) | |
4627 | src_folded | |
4628 | = GEN_INT (INTVAL (src) & (((HOST_WIDE_INT) 1 | |
4629 | << INTVAL (width)) - 1)); | |
752df20e | 4630 | } |
c93674f2 | 4631 | #endif |
752df20e | 4632 | |
4633 | /* Compute SRC's hash code, and also notice if it | |
4634 | should not be recorded at all. In that case, | |
4635 | prevent any further processing of this assignment. */ | |
4636 | do_not_record = 0; | |
4637 | hash_arg_in_memory = 0; | |
752df20e | 4638 | |
4639 | sets[i].src = src; | |
952bc06d | 4640 | sets[i].src_hash = HASH (src, mode); |
752df20e | 4641 | sets[i].src_volatile = do_not_record; |
4642 | sets[i].src_in_memory = hash_arg_in_memory; | |
752df20e | 4643 | |
6ea5a450 | 4644 | /* If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is |
75f84104 | 4645 | a pseudo, do not record SRC. Using SRC as a replacement for |
4646 | anything else will be incorrect in that situation. Note that | |
4647 | this usually occurs only for stack slots, in which case all the | |
4648 | RTL would be referring to SRC, so we don't lose any optimization | |
4649 | opportunities by not having SRC in the hash table. */ | |
6ea5a450 | 4650 | |
e16ceb8e | 4651 | if (MEM_P (src) |
75f84104 | 4652 | && find_reg_note (insn, REG_EQUIV, NULL_RTX) != 0 |
8ad4c111 | 4653 | && REG_P (dest) |
75f84104 | 4654 | && REGNO (dest) >= FIRST_PSEUDO_REGISTER) |
6ea5a450 | 4655 | sets[i].src_volatile = 1; |
4656 | ||
f3f18244 | 4657 | else if (GET_CODE (src) == ASM_OPERANDS |
4658 | && GET_CODE (x) == PARALLEL) | |
20d3ff08 | 4659 | { |
4660 | /* Do not record result of a non-volatile inline asm with | |
4661 | more than one result. */ | |
4662 | if (n_sets > 1) | |
4663 | sets[i].src_volatile = 1; | |
4664 | ||
4665 | int j, lim = XVECLEN (x, 0); | |
4666 | for (j = 0; j < lim; j++) | |
4667 | { | |
4668 | rtx y = XVECEXP (x, 0, j); | |
4669 | /* And do not record result of a non-volatile inline asm | |
4670 | with "memory" clobber. */ | |
4671 | if (GET_CODE (y) == CLOBBER && MEM_P (XEXP (y, 0))) | |
4672 | { | |
4673 | sets[i].src_volatile = 1; | |
4674 | break; | |
4675 | } | |
4676 | } | |
4677 | } | |
f3f18244 | 4678 | |
c538053c | 4679 | #if 0 |
4680 | /* It is no longer clear why we used to do this, but it doesn't | |
4681 | appear to still be needed. So let's try without it since this | |
4682 | code hurts cse'ing widened ops. */ | |
5f3447b0 | 4683 | /* If source is a paradoxical subreg (such as QI treated as an SI), |
752df20e | 4684 | treat it as volatile. It may do the work of an SI in one context |
4685 | where the extra bits are not being used, but cannot replace an SI | |
4686 | in general. */ | |
b537bfdb | 4687 | if (paradoxical_subreg_p (src)) |
752df20e | 4688 | sets[i].src_volatile = 1; |
c538053c | 4689 | #endif |
752df20e | 4690 | |
4691 | /* Locate all possible equivalent forms for SRC. Try to replace | |
4692 | SRC in the insn with each cheaper equivalent. | |
4693 | ||
4694 | We have the following types of equivalents: SRC itself, a folded | |
4695 | version, a value given in a REG_EQUAL note, or a value related | |
4696 | to a constant. | |
4697 | ||
4698 | Each of these equivalents may be part of an additional class | |
4699 | of equivalents (if more than one is in the table, they must be in | |
4700 | the same class; we check for this). | |
4701 | ||
4702 | If the source is volatile, we don't do any table lookups. | |
4703 | ||
4704 | We note any constant equivalent for possible later use in a | |
4705 | REG_NOTE. */ | |
4706 | ||
4707 | if (!sets[i].src_volatile) | |
952bc06d | 4708 | elt = lookup (src, sets[i].src_hash, mode); |
752df20e | 4709 | |
4710 | sets[i].src_elt = elt; | |
4711 | ||
4712 | if (elt && src_eqv_here && src_eqv_elt) | |
cb10db9d | 4713 | { |
4714 | if (elt->first_same_value != src_eqv_elt->first_same_value) | |
752df20e | 4715 | { |
4716 | /* The REG_EQUAL is indicating that two formerly distinct | |
4717 | classes are now equivalent. So merge them. */ | |
4718 | merge_equiv_classes (elt, src_eqv_elt); | |
952bc06d | 4719 | src_eqv_hash = HASH (src_eqv, elt->mode); |
4720 | src_eqv_elt = lookup (src_eqv, src_eqv_hash, elt->mode); | |
752df20e | 4721 | } |
4722 | ||
cb10db9d | 4723 | src_eqv_here = 0; |
4724 | } | |
752df20e | 4725 | |
4726 | else if (src_eqv_elt) | |
cb10db9d | 4727 | elt = src_eqv_elt; |
752df20e | 4728 | |
4729 | /* Try to find a constant somewhere and record it in `src_const'. | |
4730 | Record its table element, if any, in `src_const_elt'. Look in | |
4731 | any known equivalences first. (If the constant is not in the | |
952bc06d | 4732 | table, also set `sets[i].src_const_hash'). */ |
752df20e | 4733 | if (elt) |
cb10db9d | 4734 | for (p = elt->first_same_value; p; p = p->next_same_value) |
752df20e | 4735 | if (p->is_const) |
4736 | { | |
4737 | src_const = p->exp; | |
4738 | src_const_elt = elt; | |
4739 | break; | |
4740 | } | |
4741 | ||
4742 | if (src_const == 0 | |
4743 | && (CONSTANT_P (src_folded) | |
cb10db9d | 4744 | /* Consider (minus (label_ref L1) (label_ref L2)) as |
752df20e | 4745 | "constant" here so we will record it. This allows us |
4746 | to fold switch statements when an ADDR_DIFF_VEC is used. */ | |
4747 | || (GET_CODE (src_folded) == MINUS | |
4748 | && GET_CODE (XEXP (src_folded, 0)) == LABEL_REF | |
4749 | && GET_CODE (XEXP (src_folded, 1)) == LABEL_REF))) | |
4750 | src_const = src_folded, src_const_elt = elt; | |
4751 | else if (src_const == 0 && src_eqv_here && CONSTANT_P (src_eqv_here)) | |
4752 | src_const = src_eqv_here, src_const_elt = src_eqv_elt; | |
4753 | ||
4754 | /* If we don't know if the constant is in the table, get its | |
4755 | hash code and look it up. */ | |
4756 | if (src_const && src_const_elt == 0) | |
4757 | { | |
952bc06d | 4758 | sets[i].src_const_hash = HASH (src_const, mode); |
4759 | src_const_elt = lookup (src_const, sets[i].src_const_hash, mode); | |
752df20e | 4760 | } |
4761 | ||
4762 | sets[i].src_const = src_const; | |
4763 | sets[i].src_const_elt = src_const_elt; | |
4764 | ||
4765 | /* If the constant and our source are both in the table, mark them as | |
4766 | equivalent. Otherwise, if a constant is in the table but the source | |
4767 | isn't, set ELT to it. */ | |
4768 | if (src_const_elt && elt | |
4769 | && src_const_elt->first_same_value != elt->first_same_value) | |
4770 | merge_equiv_classes (elt, src_const_elt); | |
4771 | else if (src_const_elt && elt == 0) | |
4772 | elt = src_const_elt; | |
4773 | ||
4774 | /* See if there is a register linearly related to a constant | |
4775 | equivalent of SRC. */ | |
4776 | if (src_const | |
4777 | && (GET_CODE (src_const) == CONST | |
4778 | || (src_const_elt && src_const_elt->related_value != 0))) | |
cb10db9d | 4779 | { |
4780 | src_related = use_related_value (src_const, src_const_elt); | |
4781 | if (src_related) | |
4782 | { | |
752df20e | 4783 | struct table_elt *src_related_elt |
cb10db9d | 4784 | = lookup (src_related, HASH (src_related, mode), mode); |
752df20e | 4785 | if (src_related_elt && elt) |
cb10db9d | 4786 | { |
752df20e | 4787 | if (elt->first_same_value |
4788 | != src_related_elt->first_same_value) | |
cb10db9d | 4789 | /* This can occur when we previously saw a CONST |
752df20e | 4790 | involving a SYMBOL_REF and then see the SYMBOL_REF |
4791 | twice. Merge the involved classes. */ | |
4792 | merge_equiv_classes (elt, src_related_elt); | |
4793 | ||
cb10db9d | 4794 | src_related = 0; |
752df20e | 4795 | src_related_elt = 0; |
cb10db9d | 4796 | } |
4797 | else if (src_related_elt && elt == 0) | |
4798 | elt = src_related_elt; | |
752df20e | 4799 | } |
cb10db9d | 4800 | } |
752df20e | 4801 | |
4023cea7 | 4802 | /* See if we have a CONST_INT that is already in a register in a |
4803 | wider mode. */ | |
4804 | ||
971ba038 | 4805 | if (src_const && src_related == 0 && CONST_INT_P (src_const) |
4023cea7 | 4806 | && GET_MODE_CLASS (mode) == MODE_INT |
ded805e6 | 4807 | && GET_MODE_PRECISION (mode) < BITS_PER_WORD) |
4023cea7 | 4808 | { |
3754d046 | 4809 | machine_mode wider_mode; |
4023cea7 | 4810 | |
4811 | for (wider_mode = GET_MODE_WIDER_MODE (mode); | |
1595fd95 | 4812 | wider_mode != VOIDmode |
ded805e6 | 4813 | && GET_MODE_PRECISION (wider_mode) <= BITS_PER_WORD |
4023cea7 | 4814 | && src_related == 0; |
4815 | wider_mode = GET_MODE_WIDER_MODE (wider_mode)) | |
4816 | { | |
4817 | struct table_elt *const_elt | |
4818 | = lookup (src_const, HASH (src_const, wider_mode), wider_mode); | |
4819 | ||
4820 | if (const_elt == 0) | |
4821 | continue; | |
4822 | ||
4823 | for (const_elt = const_elt->first_same_value; | |
4824 | const_elt; const_elt = const_elt->next_same_value) | |
8ad4c111 | 4825 | if (REG_P (const_elt->exp)) |
4023cea7 | 4826 | { |
8b172e0e | 4827 | src_related = gen_lowpart (mode, const_elt->exp); |
4023cea7 | 4828 | break; |
4829 | } | |
4830 | } | |
4831 | } | |
4832 | ||
f9e15121 | 4833 | /* Another possibility is that we have an AND with a constant in |
4834 | a mode narrower than a word. If so, it might have been generated | |
4835 | as part of an "if" which would narrow the AND. If we already | |
4836 | have done the AND in a wider mode, we can use a SUBREG of that | |
4837 | value. */ | |
4838 | ||
4839 | if (flag_expensive_optimizations && ! src_related | |
971ba038 | 4840 | && GET_CODE (src) == AND && CONST_INT_P (XEXP (src, 1)) |
f9e15121 | 4841 | && GET_MODE_SIZE (mode) < UNITS_PER_WORD) |
4842 | { | |
3754d046 | 4843 | machine_mode tmode; |
941522d6 | 4844 | rtx new_and = gen_rtx_AND (VOIDmode, NULL_RTX, XEXP (src, 1)); |
f9e15121 | 4845 | |
4846 | for (tmode = GET_MODE_WIDER_MODE (mode); | |
4847 | GET_MODE_SIZE (tmode) <= UNITS_PER_WORD; | |
4848 | tmode = GET_MODE_WIDER_MODE (tmode)) | |
4849 | { | |
316f48ea | 4850 | rtx inner = gen_lowpart (tmode, XEXP (src, 0)); |
f9e15121 | 4851 | struct table_elt *larger_elt; |
4852 | ||
4853 | if (inner) | |
4854 | { | |
4855 | PUT_MODE (new_and, tmode); | |
4856 | XEXP (new_and, 0) = inner; | |
4857 | larger_elt = lookup (new_and, HASH (new_and, tmode), tmode); | |
4858 | if (larger_elt == 0) | |
4859 | continue; | |
4860 | ||
4861 | for (larger_elt = larger_elt->first_same_value; | |
4862 | larger_elt; larger_elt = larger_elt->next_same_value) | |
8ad4c111 | 4863 | if (REG_P (larger_elt->exp)) |
f9e15121 | 4864 | { |
4865 | src_related | |
316f48ea | 4866 | = gen_lowpart (mode, larger_elt->exp); |
f9e15121 | 4867 | break; |
4868 | } | |
4869 | ||
4870 | if (src_related) | |
4871 | break; | |
4872 | } | |
4873 | } | |
4874 | } | |
c13941f4 | 4875 | |
4876 | #ifdef LOAD_EXTEND_OP | |
4877 | /* See if a MEM has already been loaded with a widening operation; | |
4878 | if it has, we can use a subreg of that. Many CISC machines | |
4879 | also have such operations, but this is only likely to be | |
5aedf60c | 4880 | beneficial on these machines. */ |
cb10db9d | 4881 | |
b74befc5 | 4882 | if (flag_expensive_optimizations && src_related == 0 |
c13941f4 | 4883 | && (GET_MODE_SIZE (mode) < UNITS_PER_WORD) |
4884 | && GET_MODE_CLASS (mode) == MODE_INT | |
e16ceb8e | 4885 | && MEM_P (src) && ! do_not_record |
21f1e711 | 4886 | && LOAD_EXTEND_OP (mode) != UNKNOWN) |
c13941f4 | 4887 | { |
89333dfe | 4888 | struct rtx_def memory_extend_buf; |
4889 | rtx memory_extend_rtx = &memory_extend_buf; | |
3754d046 | 4890 | machine_mode tmode; |
cb10db9d | 4891 | |
c13941f4 | 4892 | /* Set what we are trying to extend and the operation it might |
4893 | have been extended with. */ | |
9af5ce0c | 4894 | memset (memory_extend_rtx, 0, sizeof (*memory_extend_rtx)); |
c13941f4 | 4895 | PUT_CODE (memory_extend_rtx, LOAD_EXTEND_OP (mode)); |
4896 | XEXP (memory_extend_rtx, 0) = src; | |
cb10db9d | 4897 | |
c13941f4 | 4898 | for (tmode = GET_MODE_WIDER_MODE (mode); |
4899 | GET_MODE_SIZE (tmode) <= UNITS_PER_WORD; | |
4900 | tmode = GET_MODE_WIDER_MODE (tmode)) | |
4901 | { | |
4902 | struct table_elt *larger_elt; | |
cb10db9d | 4903 | |
c13941f4 | 4904 | PUT_MODE (memory_extend_rtx, tmode); |
cb10db9d | 4905 | larger_elt = lookup (memory_extend_rtx, |
c13941f4 | 4906 | HASH (memory_extend_rtx, tmode), tmode); |
4907 | if (larger_elt == 0) | |
4908 | continue; | |
cb10db9d | 4909 | |
c13941f4 | 4910 | for (larger_elt = larger_elt->first_same_value; |
4911 | larger_elt; larger_elt = larger_elt->next_same_value) | |
8ad4c111 | 4912 | if (REG_P (larger_elt->exp)) |
c13941f4 | 4913 | { |
8b172e0e | 4914 | src_related = gen_lowpart (mode, larger_elt->exp); |
c13941f4 | 4915 | break; |
4916 | } | |
cb10db9d | 4917 | |
c13941f4 | 4918 | if (src_related) |
4919 | break; | |
4920 | } | |
4921 | } | |
4922 | #endif /* LOAD_EXTEND_OP */ | |
cb10db9d | 4923 | |
01c8e4c9 | 4924 | /* Try to express the constant using a register+offset expression |
4925 | derived from a constant anchor. */ | |
4926 | ||
4927 | if (targetm.const_anchor | |
4928 | && !src_related | |
4929 | && src_const | |
4930 | && GET_CODE (src_const) == CONST_INT) | |
4931 | { | |
4932 | src_related = try_const_anchors (src_const, mode); | |
4933 | src_related_is_const_anchor = src_related != NULL_RTX; | |
4934 | } | |
4935 | ||
4936 | ||
752df20e | 4937 | if (src == src_folded) |
cb10db9d | 4938 | src_folded = 0; |
752df20e | 4939 | |
d10cfa8d | 4940 | /* At this point, ELT, if nonzero, points to a class of expressions |
752df20e | 4941 | equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED, |
d10cfa8d | 4942 | and SRC_RELATED, if nonzero, each contain additional equivalent |
752df20e | 4943 | expressions. Prune these latter expressions by deleting expressions |
4944 | already in the equivalence class. | |
4945 | ||
4946 | Check for an equivalent identical to the destination. If found, | |
4947 | this is the preferred equivalent since it will likely lead to | |
4948 | elimination of the insn. Indicate this by placing it in | |
4949 | `src_related'. */ | |
4950 | ||
cb10db9d | 4951 | if (elt) |
4952 | elt = elt->first_same_value; | |
752df20e | 4953 | for (p = elt; p; p = p->next_same_value) |
cb10db9d | 4954 | { |
752df20e | 4955 | enum rtx_code code = GET_CODE (p->exp); |
4956 | ||
4957 | /* If the expression is not valid, ignore it. Then we do not | |
4958 | have to check for validity below. In most cases, we can use | |
4959 | `rtx_equal_p', since canonicalization has already been done. */ | |
78d140c9 | 4960 | if (code != REG && ! exp_equiv_p (p->exp, p->exp, 1, false)) |
752df20e | 4961 | continue; |
4962 | ||
47ac60a3 | 4963 | /* Also skip paradoxical subregs, unless that's what we're |
4964 | looking for. */ | |
b537bfdb | 4965 | if (paradoxical_subreg_p (p->exp) |
47ac60a3 | 4966 | && ! (src != 0 |
4967 | && GET_CODE (src) == SUBREG | |
4968 | && GET_MODE (src) == GET_MODE (p->exp) | |
4969 | && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src))) | |
4970 | < GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp)))))) | |
4971 | continue; | |
4972 | ||
cb10db9d | 4973 | if (src && GET_CODE (src) == code && rtx_equal_p (src, p->exp)) |
752df20e | 4974 | src = 0; |
cb10db9d | 4975 | else if (src_folded && GET_CODE (src_folded) == code |
752df20e | 4976 | && rtx_equal_p (src_folded, p->exp)) |
4977 | src_folded = 0; | |
cb10db9d | 4978 | else if (src_eqv_here && GET_CODE (src_eqv_here) == code |
752df20e | 4979 | && rtx_equal_p (src_eqv_here, p->exp)) |
4980 | src_eqv_here = 0; | |
cb10db9d | 4981 | else if (src_related && GET_CODE (src_related) == code |
752df20e | 4982 | && rtx_equal_p (src_related, p->exp)) |
4983 | src_related = 0; | |
4984 | ||
4985 | /* This is the same as the destination of the insns, we want | |
4986 | to prefer it. Copy it to src_related. The code below will | |
4987 | then give it a negative cost. */ | |
4988 | if (GET_CODE (dest) == code && rtx_equal_p (p->exp, dest)) | |
4989 | src_related = dest; | |
cb10db9d | 4990 | } |
752df20e | 4991 | |
4992 | /* Find the cheapest valid equivalent, trying all the available | |
4993 | possibilities. Prefer items not in the hash table to ones | |
4994 | that are when they are equal cost. Note that we can never | |
4995 | worsen an insn as the current contents will also succeed. | |
e2ef73d2 | 4996 | If we find an equivalent identical to the destination, use it as best, |
a92771b8 | 4997 | since this insn will probably be eliminated in that case. */ |
752df20e | 4998 | if (src) |
4999 | { | |
5000 | if (rtx_equal_p (src, dest)) | |
589ff9e7 | 5001 | src_cost = src_regcost = -1; |
752df20e | 5002 | else |
d27eb4b1 | 5003 | { |
5004 | src_cost = COST (src); | |
5005 | src_regcost = approx_reg_cost (src); | |
5006 | } | |
752df20e | 5007 | } |
5008 | ||
5009 | if (src_eqv_here) | |
5010 | { | |
5011 | if (rtx_equal_p (src_eqv_here, dest)) | |
589ff9e7 | 5012 | src_eqv_cost = src_eqv_regcost = -1; |
752df20e | 5013 | else |
d27eb4b1 | 5014 | { |
5015 | src_eqv_cost = COST (src_eqv_here); | |
5016 | src_eqv_regcost = approx_reg_cost (src_eqv_here); | |
5017 | } | |
752df20e | 5018 | } |
5019 | ||
5020 | if (src_folded) | |
5021 | { | |
5022 | if (rtx_equal_p (src_folded, dest)) | |
589ff9e7 | 5023 | src_folded_cost = src_folded_regcost = -1; |
752df20e | 5024 | else |
d27eb4b1 | 5025 | { |
5026 | src_folded_cost = COST (src_folded); | |
5027 | src_folded_regcost = approx_reg_cost (src_folded); | |
5028 | } | |
752df20e | 5029 | } |
5030 | ||
5031 | if (src_related) | |
5032 | { | |
5033 | if (rtx_equal_p (src_related, dest)) | |
589ff9e7 | 5034 | src_related_cost = src_related_regcost = -1; |
752df20e | 5035 | else |
d27eb4b1 | 5036 | { |
5037 | src_related_cost = COST (src_related); | |
5038 | src_related_regcost = approx_reg_cost (src_related); | |
01c8e4c9 | 5039 | |
5040 | /* If a const-anchor is used to synthesize a constant that | |
5041 | normally requires multiple instructions then slightly prefer | |
5042 | it over the original sequence. These instructions are likely | |
5043 | to become redundant now. We can't compare against the cost | |
5044 | of src_eqv_here because, on MIPS for example, multi-insn | |
5045 | constants have zero cost; they are assumed to be hoisted from | |
5046 | loops. */ | |
5047 | if (src_related_is_const_anchor | |
5048 | && src_related_cost == src_cost | |
5049 | && src_eqv_here) | |
5050 | src_related_cost--; | |
d27eb4b1 | 5051 | } |
752df20e | 5052 | } |
5053 | ||
5054 | /* If this was an indirect jump insn, a known label will really be | |
5055 | cheaper even though it looks more expensive. */ | |
5056 | if (dest == pc_rtx && src_const && GET_CODE (src_const) == LABEL_REF) | |
fb561825 | 5057 | src_folded = src_const, src_folded_cost = src_folded_regcost = -1; |
cb10db9d | 5058 | |
752df20e | 5059 | /* Terminate loop when replacement made. This must terminate since |
5060 | the current contents will be tested and will always be valid. */ | |
5061 | while (1) | |
cb10db9d | 5062 | { |
5063 | rtx trial; | |
752df20e | 5064 | |
cb10db9d | 5065 | /* Skip invalid entries. */ |
8ad4c111 | 5066 | while (elt && !REG_P (elt->exp) |
78d140c9 | 5067 | && ! exp_equiv_p (elt->exp, elt->exp, 1, false)) |
cb10db9d | 5068 | elt = elt->next_same_value; |
47ac60a3 | 5069 | |
5070 | /* A paradoxical subreg would be bad here: it'll be the right | |
5071 | size, but later may be adjusted so that the upper bits aren't | |
5072 | what we want. So reject it. */ | |
5073 | if (elt != 0 | |
b537bfdb | 5074 | && paradoxical_subreg_p (elt->exp) |
47ac60a3 | 5075 | /* It is okay, though, if the rtx we're trying to match |
5076 | will ignore any of the bits we can't predict. */ | |
5077 | && ! (src != 0 | |
5078 | && GET_CODE (src) == SUBREG | |
5079 | && GET_MODE (src) == GET_MODE (elt->exp) | |
5080 | && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src))) | |
5081 | < GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp)))))) | |
5082 | { | |
5083 | elt = elt->next_same_value; | |
5084 | continue; | |
5085 | } | |
cb10db9d | 5086 | |
d4c5e26d | 5087 | if (elt) |
d27eb4b1 | 5088 | { |
5089 | src_elt_cost = elt->cost; | |
5090 | src_elt_regcost = elt->regcost; | |
5091 | } | |
752df20e | 5092 | |
d4c5e26d | 5093 | /* Find cheapest and skip it for the next time. For items |
752df20e | 5094 | of equal cost, use this order: |
5095 | src_folded, src, src_eqv, src_related and hash table entry. */ | |
fb561825 | 5096 | if (src_folded |
069eea26 | 5097 | && preferable (src_folded_cost, src_folded_regcost, |
5098 | src_cost, src_regcost) <= 0 | |
5099 | && preferable (src_folded_cost, src_folded_regcost, | |
5100 | src_eqv_cost, src_eqv_regcost) <= 0 | |
5101 | && preferable (src_folded_cost, src_folded_regcost, | |
5102 | src_related_cost, src_related_regcost) <= 0 | |
5103 | && preferable (src_folded_cost, src_folded_regcost, | |
5104 | src_elt_cost, src_elt_regcost) <= 0) | |
752df20e | 5105 | { |
589ff9e7 | 5106 | trial = src_folded, src_folded_cost = MAX_COST; |
752df20e | 5107 | if (src_folded_force_flag) |
d4a75790 | 5108 | { |
5109 | rtx forced = force_const_mem (mode, trial); | |
5110 | if (forced) | |
5111 | trial = forced; | |
5112 | } | |
752df20e | 5113 | } |
fb561825 | 5114 | else if (src |
069eea26 | 5115 | && preferable (src_cost, src_regcost, |
5116 | src_eqv_cost, src_eqv_regcost) <= 0 | |
5117 | && preferable (src_cost, src_regcost, | |
5118 | src_related_cost, src_related_regcost) <= 0 | |
5119 | && preferable (src_cost, src_regcost, | |
5120 | src_elt_cost, src_elt_regcost) <= 0) | |
589ff9e7 | 5121 | trial = src, src_cost = MAX_COST; |
fb561825 | 5122 | else if (src_eqv_here |
069eea26 | 5123 | && preferable (src_eqv_cost, src_eqv_regcost, |
5124 | src_related_cost, src_related_regcost) <= 0 | |
5125 | && preferable (src_eqv_cost, src_eqv_regcost, | |
5126 | src_elt_cost, src_elt_regcost) <= 0) | |
0806b508 | 5127 | trial = src_eqv_here, src_eqv_cost = MAX_COST; |
fb561825 | 5128 | else if (src_related |
069eea26 | 5129 | && preferable (src_related_cost, src_related_regcost, |
5130 | src_elt_cost, src_elt_regcost) <= 0) | |
0806b508 | 5131 | trial = src_related, src_related_cost = MAX_COST; |
cb10db9d | 5132 | else |
752df20e | 5133 | { |
0806b508 | 5134 | trial = elt->exp; |
752df20e | 5135 | elt = elt->next_same_value; |
589ff9e7 | 5136 | src_elt_cost = MAX_COST; |
752df20e | 5137 | } |
5138 | ||
5fe61d21 | 5139 | /* Avoid creation of overlapping memory moves. */ |
5140 | if (MEM_P (trial) && MEM_P (SET_DEST (sets[i].rtl))) | |
5141 | { | |
5142 | rtx src, dest; | |
5143 | ||
5144 | /* BLKmode moves are not handled by cse anyway. */ | |
5145 | if (GET_MODE (trial) == BLKmode) | |
5146 | break; | |
5147 | ||
5148 | src = canon_rtx (trial); | |
5149 | dest = canon_rtx (SET_DEST (sets[i].rtl)); | |
5150 | ||
5151 | if (!MEM_P (src) || !MEM_P (dest) | |
a84256aa | 5152 | || !nonoverlapping_memrefs_p (src, dest, false)) |
5fe61d21 | 5153 | break; |
5154 | } | |
5155 | ||
a49d9163 | 5156 | /* Try to optimize |
5157 | (set (reg:M N) (const_int A)) | |
5158 | (set (reg:M2 O) (const_int B)) | |
5159 | (set (zero_extract:M2 (reg:M N) (const_int C) (const_int D)) | |
5160 | (reg:M2 O)). */ | |
5161 | if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT | |
5162 | && CONST_INT_P (trial) | |
5163 | && CONST_INT_P (XEXP (SET_DEST (sets[i].rtl), 1)) | |
5164 | && CONST_INT_P (XEXP (SET_DEST (sets[i].rtl), 2)) | |
5165 | && REG_P (XEXP (SET_DEST (sets[i].rtl), 0)) | |
ded805e6 | 5166 | && (GET_MODE_PRECISION (GET_MODE (SET_DEST (sets[i].rtl))) |
a49d9163 | 5167 | >= INTVAL (XEXP (SET_DEST (sets[i].rtl), 1))) |
5168 | && ((unsigned) INTVAL (XEXP (SET_DEST (sets[i].rtl), 1)) | |
5169 | + (unsigned) INTVAL (XEXP (SET_DEST (sets[i].rtl), 2)) | |
5170 | <= HOST_BITS_PER_WIDE_INT)) | |
5171 | { | |
5172 | rtx dest_reg = XEXP (SET_DEST (sets[i].rtl), 0); | |
5173 | rtx width = XEXP (SET_DEST (sets[i].rtl), 1); | |
5174 | rtx pos = XEXP (SET_DEST (sets[i].rtl), 2); | |
5175 | unsigned int dest_hash = HASH (dest_reg, GET_MODE (dest_reg)); | |
5176 | struct table_elt *dest_elt | |
5177 | = lookup (dest_reg, dest_hash, GET_MODE (dest_reg)); | |
5178 | rtx dest_cst = NULL; | |
5179 | ||
5180 | if (dest_elt) | |
5181 | for (p = dest_elt->first_same_value; p; p = p->next_same_value) | |
5182 | if (p->is_const && CONST_INT_P (p->exp)) | |
5183 | { | |
5184 | dest_cst = p->exp; | |
5185 | break; | |
5186 | } | |
5187 | if (dest_cst) | |
5188 | { | |
5189 | HOST_WIDE_INT val = INTVAL (dest_cst); | |
5190 | HOST_WIDE_INT mask; | |
5191 | unsigned int shift; | |
5192 | if (BITS_BIG_ENDIAN) | |
ded805e6 | 5193 | shift = GET_MODE_PRECISION (GET_MODE (dest_reg)) |
a49d9163 | 5194 | - INTVAL (pos) - INTVAL (width); |
5195 | else | |
5196 | shift = INTVAL (pos); | |
5197 | if (INTVAL (width) == HOST_BITS_PER_WIDE_INT) | |
5198 | mask = ~(HOST_WIDE_INT) 0; | |
5199 | else | |
5200 | mask = ((HOST_WIDE_INT) 1 << INTVAL (width)) - 1; | |
5201 | val &= ~(mask << shift); | |
5202 | val |= (INTVAL (trial) & mask) << shift; | |
5203 | val = trunc_int_for_mode (val, GET_MODE (dest_reg)); | |
5204 | validate_unshare_change (insn, &SET_DEST (sets[i].rtl), | |
5205 | dest_reg, 1); | |
5206 | validate_unshare_change (insn, &SET_SRC (sets[i].rtl), | |
5207 | GEN_INT (val), 1); | |
5208 | if (apply_change_group ()) | |
5209 | { | |
5210 | rtx note = find_reg_note (insn, REG_EQUAL, NULL_RTX); | |
5211 | if (note) | |
5212 | { | |
5213 | remove_note (insn, note); | |
5214 | df_notes_rescan (insn); | |
5215 | } | |
5216 | src_eqv = NULL_RTX; | |
5217 | src_eqv_elt = NULL; | |
5218 | src_eqv_volatile = 0; | |
5219 | src_eqv_in_memory = 0; | |
5220 | src_eqv_hash = 0; | |
5221 | repeat = true; | |
5222 | break; | |
5223 | } | |
5224 | } | |
5225 | } | |
5226 | ||
752df20e | 5227 | /* We don't normally have an insn matching (set (pc) (pc)), so |
5228 | check for this separately here. We will delete such an | |
5229 | insn below. | |
5230 | ||
0f48207f | 5231 | For other cases such as a table jump or conditional jump |
5232 | where we know the ultimate target, go ahead and replace the | |
5233 | operand. While that may not make a valid insn, we will | |
5234 | reemit the jump below (and also insert any necessary | |
5235 | barriers). */ | |
752df20e | 5236 | if (n_sets == 1 && dest == pc_rtx |
5237 | && (trial == pc_rtx | |
5238 | || (GET_CODE (trial) == LABEL_REF | |
5239 | && ! condjump_p (insn)))) | |
5240 | { | |
806351c6 | 5241 | /* Don't substitute non-local labels, this confuses CFG. */ |
5242 | if (GET_CODE (trial) == LABEL_REF | |
5243 | && LABEL_REF_NONLOCAL_P (trial)) | |
5244 | continue; | |
5245 | ||
0f48207f | 5246 | SET_SRC (sets[i].rtl) = trial; |
283a6b26 | 5247 | cse_jumps_altered = true; |
752df20e | 5248 | break; |
5249 | } | |
cb10db9d | 5250 | |
0ab04fbf | 5251 | /* Reject certain invalid forms of CONST that we create. */ |
5252 | else if (CONSTANT_P (trial) | |
5253 | && GET_CODE (trial) == CONST | |
5254 | /* Reject cases that will cause decode_rtx_const to | |
5255 | die. On the alpha when simplifying a switch, we | |
5256 | get (const (truncate (minus (label_ref) | |
5257 | (label_ref)))). */ | |
5258 | && (GET_CODE (XEXP (trial, 0)) == TRUNCATE | |
5259 | /* Likewise on IA-64, except without the | |
5260 | truncate. */ | |
5261 | || (GET_CODE (XEXP (trial, 0)) == MINUS | |
5262 | && GET_CODE (XEXP (XEXP (trial, 0), 0)) == LABEL_REF | |
5263 | && GET_CODE (XEXP (XEXP (trial, 0), 1)) == LABEL_REF))) | |
5264 | /* Do nothing for this case. */ | |
5265 | ; | |
5266 | ||
752df20e | 5267 | /* Look for a substitution that makes a valid insn. */ |
20d3ff08 | 5268 | else if (validate_unshare_change (insn, &SET_SRC (sets[i].rtl), |
5269 | trial, 0)) | |
e2ef73d2 | 5270 | { |
d328ebdf | 5271 | rtx new_rtx = canon_reg (SET_SRC (sets[i].rtl), insn); |
e30d7fb3 | 5272 | |
8d5dd220 | 5273 | /* The result of apply_change_group can be ignored; see |
5274 | canon_reg. */ | |
5275 | ||
d328ebdf | 5276 | validate_change (insn, &SET_SRC (sets[i].rtl), new_rtx, 1); |
e443ebaf | 5277 | apply_change_group (); |
be22716f | 5278 | |
e2ef73d2 | 5279 | break; |
5280 | } | |
752df20e | 5281 | |
cb10db9d | 5282 | /* If we previously found constant pool entries for |
752df20e | 5283 | constants and this is a constant, try making a |
5284 | pool entry. Put it in src_folded unless we already have done | |
5285 | this since that is where it likely came from. */ | |
5286 | ||
5287 | else if (constant_pool_entries_cost | |
5288 | && CONSTANT_P (trial) | |
88f6e1a4 | 5289 | && (src_folded == 0 |
e16ceb8e | 5290 | || (!MEM_P (src_folded) |
88f6e1a4 | 5291 | && ! src_folded_force_flag)) |
ea0cb7ae | 5292 | && GET_MODE_CLASS (mode) != MODE_CC |
5293 | && mode != VOIDmode) | |
752df20e | 5294 | { |
5295 | src_folded_force_flag = 1; | |
5296 | src_folded = trial; | |
5297 | src_folded_cost = constant_pool_entries_cost; | |
634d45d7 | 5298 | src_folded_regcost = constant_pool_entries_regcost; |
752df20e | 5299 | } |
cb10db9d | 5300 | } |
752df20e | 5301 | |
a49d9163 | 5302 | /* If we changed the insn too much, handle this set from scratch. */ |
5303 | if (repeat) | |
5304 | { | |
5305 | i--; | |
5306 | continue; | |
5307 | } | |
5308 | ||
752df20e | 5309 | src = SET_SRC (sets[i].rtl); |
5310 | ||
5311 | /* In general, it is good to have a SET with SET_SRC == SET_DEST. | |
5312 | However, there is an important exception: If both are registers | |
5313 | that are not the head of their equivalence class, replace SET_SRC | |
5314 | with the head of the class. If we do not do this, we will have | |
5315 | both registers live over a portion of the basic block. This way, | |
5316 | their lifetimes will likely abut instead of overlapping. */ | |
8ad4c111 | 5317 | if (REG_P (dest) |
a7f3b1c7 | 5318 | && REGNO_QTY_VALID_P (REGNO (dest))) |
752df20e | 5319 | { |
a7f3b1c7 | 5320 | int dest_q = REG_QTY (REGNO (dest)); |
5321 | struct qty_table_elem *dest_ent = &qty_table[dest_q]; | |
5322 | ||
5323 | if (dest_ent->mode == GET_MODE (dest) | |
5324 | && dest_ent->first_reg != REGNO (dest) | |
8ad4c111 | 5325 | && REG_P (src) && REGNO (src) == REGNO (dest) |
a7f3b1c7 | 5326 | /* Don't do this if the original insn had a hard reg as |
5327 | SET_SRC or SET_DEST. */ | |
8ad4c111 | 5328 | && (!REG_P (sets[i].src) |
a7f3b1c7 | 5329 | || REGNO (sets[i].src) >= FIRST_PSEUDO_REGISTER) |
8ad4c111 | 5330 | && (!REG_P (dest) || REGNO (dest) >= FIRST_PSEUDO_REGISTER)) |
a7f3b1c7 | 5331 | /* We can't call canon_reg here because it won't do anything if |
5332 | SRC is a hard register. */ | |
05b1716f | 5333 | { |
a7f3b1c7 | 5334 | int src_q = REG_QTY (REGNO (src)); |
5335 | struct qty_table_elem *src_ent = &qty_table[src_q]; | |
5336 | int first = src_ent->first_reg; | |
5337 | rtx new_src | |
5338 | = (first >= FIRST_PSEUDO_REGISTER | |
5339 | ? regno_reg_rtx[first] : gen_rtx_REG (GET_MODE (src), first)); | |
5340 | ||
5341 | /* We must use validate-change even for this, because this | |
5342 | might be a special no-op instruction, suitable only to | |
5343 | tag notes onto. */ | |
5344 | if (validate_change (insn, &SET_SRC (sets[i].rtl), new_src, 0)) | |
5345 | { | |
5346 | src = new_src; | |
5347 | /* If we had a constant that is cheaper than what we are now | |
5348 | setting SRC to, use that constant. We ignored it when we | |
5349 | thought we could make this into a no-op. */ | |
5350 | if (src_const && COST (src_const) < COST (src) | |
cb10db9d | 5351 | && validate_change (insn, &SET_SRC (sets[i].rtl), |
5352 | src_const, 0)) | |
a7f3b1c7 | 5353 | src = src_const; |
5354 | } | |
05b1716f | 5355 | } |
752df20e | 5356 | } |
5357 | ||
5358 | /* If we made a change, recompute SRC values. */ | |
5359 | if (src != sets[i].src) | |
cb10db9d | 5360 | { |
cb10db9d | 5361 | do_not_record = 0; |
5362 | hash_arg_in_memory = 0; | |
752df20e | 5363 | sets[i].src = src; |
cb10db9d | 5364 | sets[i].src_hash = HASH (src, mode); |
5365 | sets[i].src_volatile = do_not_record; | |
5366 | sets[i].src_in_memory = hash_arg_in_memory; | |
5367 | sets[i].src_elt = lookup (src, sets[i].src_hash, mode); | |
5368 | } | |
752df20e | 5369 | |
5370 | /* If this is a single SET, we are setting a register, and we have an | |
a24ec999 | 5371 | equivalent constant, we want to add a REG_EQUAL note if the constant |
5372 | is different from the source. We don't want to do it for a constant | |
5373 | pseudo since verifying that this pseudo hasn't been eliminated is a | |
5374 | pain; moreover such a note won't help anything. | |
f5d1f9f9 | 5375 | |
5376 | Avoid a REG_EQUAL note for (CONST (MINUS (LABEL_REF) (LABEL_REF))) | |
5377 | which can be created for a reference to a compile time computable | |
5378 | entry in a jump table. */ | |
a24ec999 | 5379 | if (n_sets == 1 |
5380 | && REG_P (dest) | |
5381 | && src_const | |
8ad4c111 | 5382 | && !REG_P (src_const) |
a24ec999 | 5383 | && !(GET_CODE (src_const) == SUBREG |
5384 | && REG_P (SUBREG_REG (src_const))) | |
5385 | && !(GET_CODE (src_const) == CONST | |
5386 | && GET_CODE (XEXP (src_const, 0)) == MINUS | |
5387 | && GET_CODE (XEXP (XEXP (src_const, 0), 0)) == LABEL_REF | |
5388 | && GET_CODE (XEXP (XEXP (src_const, 0), 1)) == LABEL_REF) | |
5389 | && !rtx_equal_p (src, src_const)) | |
752df20e | 5390 | { |
a24ec999 | 5391 | /* Make sure that the rtx is not shared. */ |
5392 | src_const = copy_rtx (src_const); | |
c69ad724 | 5393 | |
a24ec999 | 5394 | /* Record the actual constant value in a REG_EQUAL note, |
5395 | making a new one if one does not already exist. */ | |
5396 | set_unique_reg_note (insn, REG_EQUAL, src_const); | |
5397 | df_notes_rescan (insn); | |
752df20e | 5398 | } |
5399 | ||
5400 | /* Now deal with the destination. */ | |
5401 | do_not_record = 0; | |
752df20e | 5402 | |
476d094d | 5403 | /* Look within any ZERO_EXTRACT to the MEM or REG within it. */ |
5404 | while (GET_CODE (dest) == SUBREG | |
752df20e | 5405 | || GET_CODE (dest) == ZERO_EXTRACT |
752df20e | 5406 | || GET_CODE (dest) == STRICT_LOW_PART) |
8f4cc641 | 5407 | dest = XEXP (dest, 0); |
752df20e | 5408 | |
5409 | sets[i].inner_dest = dest; | |
5410 | ||
e16ceb8e | 5411 | if (MEM_P (dest)) |
752df20e | 5412 | { |
ea0cb7ae | 5413 | #ifdef PUSH_ROUNDING |
5414 | /* Stack pushes invalidate the stack pointer. */ | |
5415 | rtx addr = XEXP (dest, 0); | |
6720e96c | 5416 | if (GET_RTX_CLASS (GET_CODE (addr)) == RTX_AUTOINC |
ea0cb7ae | 5417 | && XEXP (addr, 0) == stack_pointer_rtx) |
4c958a22 | 5418 | invalidate (stack_pointer_rtx, VOIDmode); |
ea0cb7ae | 5419 | #endif |
752df20e | 5420 | dest = fold_rtx (dest, insn); |
752df20e | 5421 | } |
5422 | ||
5423 | /* Compute the hash code of the destination now, | |
5424 | before the effects of this instruction are recorded, | |
5425 | since the register values used in the address computation | |
5426 | are those before this instruction. */ | |
952bc06d | 5427 | sets[i].dest_hash = HASH (dest, mode); |
752df20e | 5428 | |
5429 | /* Don't enter a bit-field in the hash table | |
5430 | because the value in it after the store | |
5431 | may not equal what was stored, due to truncation. */ | |
5432 | ||
476d094d | 5433 | if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT) |
752df20e | 5434 | { |
5435 | rtx width = XEXP (SET_DEST (sets[i].rtl), 1); | |
5436 | ||
971ba038 | 5437 | if (src_const != 0 && CONST_INT_P (src_const) |
5438 | && CONST_INT_P (width) | |
b572011e | 5439 | && INTVAL (width) < HOST_BITS_PER_WIDE_INT |
5440 | && ! (INTVAL (src_const) | |
561f0ec8 | 5441 | & (HOST_WIDE_INT_M1U << INTVAL (width)))) |
752df20e | 5442 | /* Exception: if the value is constant, |
5443 | and it won't be truncated, record it. */ | |
5444 | ; | |
5445 | else | |
5446 | { | |
5447 | /* This is chosen so that the destination will be invalidated | |
5448 | but no new value will be recorded. | |
5449 | We must invalidate because sometimes constant | |
5450 | values can be recorded for bitfields. */ | |
5451 | sets[i].src_elt = 0; | |
5452 | sets[i].src_volatile = 1; | |
5453 | src_eqv = 0; | |
5454 | src_eqv_elt = 0; | |
5455 | } | |
5456 | } | |
5457 | ||
5458 | /* If only one set in a JUMP_INSN and it is now a no-op, we can delete | |
5459 | the insn. */ | |
5460 | else if (n_sets == 1 && dest == pc_rtx && src == pc_rtx) | |
5461 | { | |
25999090 | 5462 | /* One less use of the label this insn used to jump to. */ |
bbe0b6d7 | 5463 | delete_insn_and_edges (insn); |
283a6b26 | 5464 | cse_jumps_altered = true; |
752df20e | 5465 | /* No more processing for this set. */ |
5466 | sets[i].rtl = 0; | |
5467 | } | |
5468 | ||
5469 | /* If this SET is now setting PC to a label, we know it used to | |
0f48207f | 5470 | be a conditional or computed branch. */ |
9d95b2b0 | 5471 | else if (dest == pc_rtx && GET_CODE (src) == LABEL_REF |
5472 | && !LABEL_REF_NONLOCAL_P (src)) | |
752df20e | 5473 | { |
0f48207f | 5474 | /* We reemit the jump in as many cases as possible just in |
5475 | case the form of an unconditional jump is significantly | |
5476 | different than a computed jump or conditional jump. | |
5477 | ||
5478 | If this insn has multiple sets, then reemitting the | |
5479 | jump is nontrivial. So instead we just force rerecognition | |
5480 | and hope for the best. */ | |
5481 | if (n_sets == 1) | |
752df20e | 5482 | { |
9ed997be | 5483 | rtx_jump_insn *new_rtx; |
32a6f3ca | 5484 | rtx note; |
743ce3f8 | 5485 | |
d328ebdf | 5486 | new_rtx = emit_jump_insn_before (gen_jump (XEXP (src, 0)), insn); |
5487 | JUMP_LABEL (new_rtx) = XEXP (src, 0); | |
752df20e | 5488 | LABEL_NUSES (XEXP (src, 0))++; |
9074c68b | 5489 | |
5490 | /* Make sure to copy over REG_NON_LOCAL_GOTO. */ | |
5491 | note = find_reg_note (insn, REG_NON_LOCAL_GOTO, 0); | |
5492 | if (note) | |
5493 | { | |
5494 | XEXP (note, 1) = NULL_RTX; | |
d328ebdf | 5495 | REG_NOTES (new_rtx) = note; |
9074c68b | 5496 | } |
5497 | ||
bbe0b6d7 | 5498 | delete_insn_and_edges (insn); |
32a6f3ca | 5499 | insn = new_rtx; |
752df20e | 5500 | } |
d578a436 | 5501 | else |
d578a436 | 5502 | INSN_CODE (insn) = -1; |
752df20e | 5503 | |
283a6b26 | 5504 | /* Do not bother deleting any unreachable code, let jump do it. */ |
5505 | cse_jumps_altered = true; | |
752df20e | 5506 | sets[i].rtl = 0; |
5507 | } | |
5508 | ||
8cdd0f84 | 5509 | /* If destination is volatile, invalidate it and then do no further |
5510 | processing for this assignment. */ | |
752df20e | 5511 | |
5512 | else if (do_not_record) | |
8cdd0f84 | 5513 | { |
7a49a822 | 5514 | invalidate_dest (dest); |
8cdd0f84 | 5515 | sets[i].rtl = 0; |
5516 | } | |
752df20e | 5517 | |
5518 | if (sets[i].rtl != 0 && dest != SET_DEST (sets[i].rtl)) | |
7a49a822 | 5519 | { |
5520 | do_not_record = 0; | |
5521 | sets[i].dest_hash = HASH (SET_DEST (sets[i].rtl), mode); | |
5522 | if (do_not_record) | |
5523 | { | |
5524 | invalidate_dest (SET_DEST (sets[i].rtl)); | |
5525 | sets[i].rtl = 0; | |
5526 | } | |
5527 | } | |
752df20e | 5528 | |
752df20e | 5529 | /* If setting CC0, record what it was set to, or a constant, if it |
5530 | is equivalent to a constant. If it is being set to a floating-point | |
5531 | value, make a COMPARE with the appropriate constant of 0. If we | |
5532 | don't do this, later code can interpret this as a test against | |
5533 | const0_rtx, which can cause problems if we try to put it into an | |
5534 | insn as a floating-point operand. */ | |
5535 | if (dest == cc0_rtx) | |
5536 | { | |
5537 | this_insn_cc0 = src_const && mode != VOIDmode ? src_const : src; | |
5538 | this_insn_cc0_mode = mode; | |
c1712420 | 5539 | if (FLOAT_MODE_P (mode)) |
941522d6 | 5540 | this_insn_cc0 = gen_rtx_COMPARE (VOIDmode, this_insn_cc0, |
5541 | CONST0_RTX (mode)); | |
752df20e | 5542 | } |
752df20e | 5543 | } |
5544 | ||
5545 | /* Now enter all non-volatile source expressions in the hash table | |
5546 | if they are not already present. | |
5547 | Record their equivalence classes in src_elt. | |
5548 | This way we can insert the corresponding destinations into | |
5549 | the same classes even if the actual sources are no longer in them | |
5550 | (having been invalidated). */ | |
5551 | ||
5552 | if (src_eqv && src_eqv_elt == 0 && sets[0].rtl != 0 && ! src_eqv_volatile | |
5553 | && ! rtx_equal_p (src_eqv, SET_DEST (sets[0].rtl))) | |
5554 | { | |
19cb6b50 | 5555 | struct table_elt *elt; |
5556 | struct table_elt *classp = sets[0].src_elt; | |
752df20e | 5557 | rtx dest = SET_DEST (sets[0].rtl); |
3754d046 | 5558 | machine_mode eqvmode = GET_MODE (dest); |
752df20e | 5559 | |
5560 | if (GET_CODE (dest) == STRICT_LOW_PART) | |
5561 | { | |
5562 | eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0))); | |
5563 | classp = 0; | |
5564 | } | |
5565 | if (insert_regs (src_eqv, classp, 0)) | |
1b033cc3 | 5566 | { |
5567 | rehash_using_reg (src_eqv); | |
5568 | src_eqv_hash = HASH (src_eqv, eqvmode); | |
5569 | } | |
952bc06d | 5570 | elt = insert (src_eqv, classp, src_eqv_hash, eqvmode); |
752df20e | 5571 | elt->in_memory = src_eqv_in_memory; |
752df20e | 5572 | src_eqv_elt = elt; |
c697ea36 | 5573 | |
5574 | /* Check to see if src_eqv_elt is the same as a set source which | |
5575 | does not yet have an elt, and if so set the elt of the set source | |
5576 | to src_eqv_elt. */ | |
5577 | for (i = 0; i < n_sets; i++) | |
cf541778 | 5578 | if (sets[i].rtl && sets[i].src_elt == 0 |
5579 | && rtx_equal_p (SET_SRC (sets[i].rtl), src_eqv)) | |
c697ea36 | 5580 | sets[i].src_elt = src_eqv_elt; |
752df20e | 5581 | } |
5582 | ||
5583 | for (i = 0; i < n_sets; i++) | |
5584 | if (sets[i].rtl && ! sets[i].src_volatile | |
5585 | && ! rtx_equal_p (SET_SRC (sets[i].rtl), SET_DEST (sets[i].rtl))) | |
5586 | { | |
5587 | if (GET_CODE (SET_DEST (sets[i].rtl)) == STRICT_LOW_PART) | |
5588 | { | |
5589 | /* REG_EQUAL in setting a STRICT_LOW_PART | |
5590 | gives an equivalent for the entire destination register, | |
5591 | not just for the subreg being stored in now. | |
5592 | This is a more interesting equivalence, so we arrange later | |
5593 | to treat the entire reg as the destination. */ | |
5594 | sets[i].src_elt = src_eqv_elt; | |
952bc06d | 5595 | sets[i].src_hash = src_eqv_hash; |
752df20e | 5596 | } |
5597 | else | |
5598 | { | |
5599 | /* Insert source and constant equivalent into hash table, if not | |
5600 | already present. */ | |
19cb6b50 | 5601 | struct table_elt *classp = src_eqv_elt; |
5602 | rtx src = sets[i].src; | |
5603 | rtx dest = SET_DEST (sets[i].rtl); | |
3754d046 | 5604 | machine_mode mode |
752df20e | 5605 | = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src); |
5606 | ||
3c512ee7 | 5607 | /* It's possible that we have a source value known to be |
5608 | constant but don't have a REG_EQUAL note on the insn. | |
5609 | Lack of a note will mean src_eqv_elt will be NULL. This | |
5610 | can happen where we've generated a SUBREG to access a | |
5611 | CONST_INT that is already in a register in a wider mode. | |
5612 | Ensure that the source expression is put in the proper | |
5613 | constant class. */ | |
5614 | if (!classp) | |
5615 | classp = sets[i].src_const_elt; | |
5616 | ||
cf541778 | 5617 | if (sets[i].src_elt == 0) |
752df20e | 5618 | { |
1e5b92fa | 5619 | struct table_elt *elt; |
cf541778 | 5620 | |
1e5b92fa | 5621 | /* Note that these insert_regs calls cannot remove |
5622 | any of the src_elt's, because they would have failed to | |
5623 | match if not still valid. */ | |
5624 | if (insert_regs (src, classp, 0)) | |
5625 | { | |
5626 | rehash_using_reg (src); | |
5627 | sets[i].src_hash = HASH (src, mode); | |
1b033cc3 | 5628 | } |
1e5b92fa | 5629 | elt = insert (src, classp, sets[i].src_hash, mode); |
5630 | elt->in_memory = sets[i].src_in_memory; | |
20d3ff08 | 5631 | /* If inline asm has any clobbers, ensure we only reuse |
5632 | existing inline asms and never try to put the ASM_OPERANDS | |
5633 | into an insn that isn't inline asm. */ | |
5634 | if (GET_CODE (src) == ASM_OPERANDS | |
5635 | && GET_CODE (x) == PARALLEL) | |
5636 | elt->cost = MAX_COST; | |
1e5b92fa | 5637 | sets[i].src_elt = classp = elt; |
752df20e | 5638 | } |
752df20e | 5639 | if (sets[i].src_const && sets[i].src_const_elt == 0 |
5640 | && src != sets[i].src_const | |
5641 | && ! rtx_equal_p (sets[i].src_const, src)) | |
5642 | sets[i].src_elt = insert (sets[i].src_const, classp, | |
952bc06d | 5643 | sets[i].src_const_hash, mode); |
752df20e | 5644 | } |
5645 | } | |
5646 | else if (sets[i].src_elt == 0) | |
5647 | /* If we did not insert the source into the hash table (e.g., it was | |
5648 | volatile), note the equivalence class for the REG_EQUAL value, if any, | |
5649 | so that the destination goes into that class. */ | |
5650 | sets[i].src_elt = src_eqv_elt; | |
5651 | ||
977ffed2 | 5652 | /* Record destination addresses in the hash table. This allows us to |
5653 | check if they are invalidated by other sets. */ | |
5654 | for (i = 0; i < n_sets; i++) | |
5655 | { | |
5656 | if (sets[i].rtl) | |
5657 | { | |
5658 | rtx x = sets[i].inner_dest; | |
5659 | struct table_elt *elt; | |
3754d046 | 5660 | machine_mode mode; |
977ffed2 | 5661 | unsigned hash; |
5662 | ||
5663 | if (MEM_P (x)) | |
5664 | { | |
5665 | x = XEXP (x, 0); | |
5666 | mode = GET_MODE (x); | |
5667 | hash = HASH (x, mode); | |
5668 | elt = lookup (x, hash, mode); | |
5669 | if (!elt) | |
5670 | { | |
5671 | if (insert_regs (x, NULL, 0)) | |
5672 | { | |
06320855 | 5673 | rtx dest = SET_DEST (sets[i].rtl); |
5674 | ||
977ffed2 | 5675 | rehash_using_reg (x); |
5676 | hash = HASH (x, mode); | |
06320855 | 5677 | sets[i].dest_hash = HASH (dest, GET_MODE (dest)); |
977ffed2 | 5678 | } |
5679 | elt = insert (x, NULL, hash, mode); | |
5680 | } | |
5681 | ||
5682 | sets[i].dest_addr_elt = elt; | |
5683 | } | |
5684 | else | |
5685 | sets[i].dest_addr_elt = NULL; | |
5686 | } | |
5687 | } | |
5688 | ||
2aca5650 | 5689 | invalidate_from_clobbers (insn); |
8b82837b | 5690 | |
cb10db9d | 5691 | /* Some registers are invalidated by subroutine calls. Memory is |
8b82837b | 5692 | invalidated by non-constant calls. */ |
5693 | ||
6d7dc5b9 | 5694 | if (CALL_P (insn)) |
752df20e | 5695 | { |
9c2a0c05 | 5696 | if (!(RTL_CONST_OR_PURE_CALL_P (insn))) |
ea0cb7ae | 5697 | invalidate_memory (); |
752df20e | 5698 | invalidate_for_call (); |
5699 | } | |
5700 | ||
5701 | /* Now invalidate everything set by this instruction. | |
5702 | If a SUBREG or other funny destination is being set, | |
5703 | sets[i].rtl is still nonzero, so here we invalidate the reg | |
5704 | a part of which is being set. */ | |
5705 | ||
5706 | for (i = 0; i < n_sets; i++) | |
5707 | if (sets[i].rtl) | |
5708 | { | |
fdb25961 | 5709 | /* We can't use the inner dest, because the mode associated with |
5710 | a ZERO_EXTRACT is significant. */ | |
19cb6b50 | 5711 | rtx dest = SET_DEST (sets[i].rtl); |
752df20e | 5712 | |
5713 | /* Needed for registers to remove the register from its | |
5714 | previous quantity's chain. | |
5715 | Needed for memory if this is a nonvarying address, unless | |
5716 | we have just done an invalidate_memory that covers even those. */ | |
8ad4c111 | 5717 | if (REG_P (dest) || GET_CODE (dest) == SUBREG) |
fdb25961 | 5718 | invalidate (dest, VOIDmode); |
e16ceb8e | 5719 | else if (MEM_P (dest)) |
2046d6d5 | 5720 | invalidate (dest, VOIDmode); |
319134e7 | 5721 | else if (GET_CODE (dest) == STRICT_LOW_PART |
5722 | || GET_CODE (dest) == ZERO_EXTRACT) | |
fdb25961 | 5723 | invalidate (XEXP (dest, 0), GET_MODE (dest)); |
752df20e | 5724 | } |
5725 | ||
be22716f | 5726 | /* Don't cse over a call to setjmp; on some machines (eg VAX) |
5727 | the regs restored by the longjmp come from a later time | |
5728 | than the setjmp. */ | |
5729 | if (CALL_P (insn) && find_reg_note (insn, REG_SETJMP, NULL)) | |
5730 | { | |
5731 | flush_hash_table (); | |
5732 | goto done; | |
5733 | } | |
5734 | ||
752df20e | 5735 | /* Make sure registers mentioned in destinations |
5736 | are safe for use in an expression to be inserted. | |
5737 | This removes from the hash table | |
5738 | any invalid entry that refers to one of these registers. | |
5739 | ||
5740 | We don't care about the return value from mention_regs because | |
5741 | we are going to hash the SET_DEST values unconditionally. */ | |
5742 | ||
5743 | for (i = 0; i < n_sets; i++) | |
e6860d27 | 5744 | { |
5745 | if (sets[i].rtl) | |
5746 | { | |
5747 | rtx x = SET_DEST (sets[i].rtl); | |
5748 | ||
8ad4c111 | 5749 | if (!REG_P (x)) |
e6860d27 | 5750 | mention_regs (x); |
5751 | else | |
5752 | { | |
5753 | /* We used to rely on all references to a register becoming | |
5754 | inaccessible when a register changes to a new quantity, | |
5755 | since that changes the hash code. However, that is not | |
9c4f3716 | 5756 | safe, since after HASH_SIZE new quantities we get a |
e6860d27 | 5757 | hash 'collision' of a register with its own invalid |
5758 | entries. And since SUBREGs have been changed not to | |
5759 | change their hash code with the hash code of the register, | |
5760 | it wouldn't work any longer at all. So we have to check | |
5761 | for any invalid references lying around now. | |
5762 | This code is similar to the REG case in mention_regs, | |
5763 | but it knows that reg_tick has been incremented, and | |
5764 | it leaves reg_in_table as -1 . */ | |
02e7a332 | 5765 | unsigned int regno = REGNO (x); |
a2c6f0b7 | 5766 | unsigned int endregno = END_REGNO (x); |
02e7a332 | 5767 | unsigned int i; |
e6860d27 | 5768 | |
5769 | for (i = regno; i < endregno; i++) | |
5770 | { | |
d1264606 | 5771 | if (REG_IN_TABLE (i) >= 0) |
e6860d27 | 5772 | { |
5773 | remove_invalid_refs (i); | |
d1264606 | 5774 | REG_IN_TABLE (i) = -1; |
e6860d27 | 5775 | } |
5776 | } | |
5777 | } | |
5778 | } | |
5779 | } | |
752df20e | 5780 | |
5781 | /* We may have just removed some of the src_elt's from the hash table. | |
977ffed2 | 5782 | So replace each one with the current head of the same class. |
5783 | Also check if destination addresses have been removed. */ | |
752df20e | 5784 | |
5785 | for (i = 0; i < n_sets; i++) | |
5786 | if (sets[i].rtl) | |
5787 | { | |
977ffed2 | 5788 | if (sets[i].dest_addr_elt |
5789 | && sets[i].dest_addr_elt->first_same_value == 0) | |
5790 | { | |
d249588e | 5791 | /* The elt was removed, which means this destination is not |
977ffed2 | 5792 | valid after this instruction. */ |
5793 | sets[i].rtl = NULL_RTX; | |
5794 | } | |
5795 | else if (sets[i].src_elt && sets[i].src_elt->first_same_value == 0) | |
752df20e | 5796 | /* If elt was removed, find current head of same class, |
5797 | or 0 if nothing remains of that class. */ | |
5798 | { | |
19cb6b50 | 5799 | struct table_elt *elt = sets[i].src_elt; |
752df20e | 5800 | |
5801 | while (elt && elt->prev_same_value) | |
5802 | elt = elt->prev_same_value; | |
5803 | ||
5804 | while (elt && elt->first_same_value == 0) | |
5805 | elt = elt->next_same_value; | |
5806 | sets[i].src_elt = elt ? elt->first_same_value : 0; | |
5807 | } | |
5808 | } | |
5809 | ||
5810 | /* Now insert the destinations into their equivalence classes. */ | |
5811 | ||
5812 | for (i = 0; i < n_sets; i++) | |
5813 | if (sets[i].rtl) | |
5814 | { | |
19cb6b50 | 5815 | rtx dest = SET_DEST (sets[i].rtl); |
19cb6b50 | 5816 | struct table_elt *elt; |
752df20e | 5817 | |
5818 | /* Don't record value if we are not supposed to risk allocating | |
5819 | floating-point values in registers that might be wider than | |
5820 | memory. */ | |
5821 | if ((flag_float_store | |
e16ceb8e | 5822 | && MEM_P (dest) |
c1712420 | 5823 | && FLOAT_MODE_P (GET_MODE (dest))) |
6510de05 | 5824 | /* Don't record BLKmode values, because we don't know the |
5825 | size of it, and can't be sure that other BLKmode values | |
5826 | have the same or smaller size. */ | |
5827 | || GET_MODE (dest) == BLKmode | |
752df20e | 5828 | /* If we didn't put a REG_EQUAL value or a source into the hash |
5829 | table, there is no point is recording DEST. */ | |
619142e5 | 5830 | || sets[i].src_elt == 0 |
5831 | /* If DEST is a paradoxical SUBREG and SRC is a ZERO_EXTEND | |
5832 | or SIGN_EXTEND, don't record DEST since it can cause | |
5833 | some tracking to be wrong. | |
5834 | ||
5835 | ??? Think about this more later. */ | |
b537bfdb | 5836 | || (paradoxical_subreg_p (dest) |
619142e5 | 5837 | && (GET_CODE (sets[i].src) == SIGN_EXTEND |
5838 | || GET_CODE (sets[i].src) == ZERO_EXTEND))) | |
752df20e | 5839 | continue; |
5840 | ||
5841 | /* STRICT_LOW_PART isn't part of the value BEING set, | |
5842 | and neither is the SUBREG inside it. | |
5843 | Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */ | |
5844 | if (GET_CODE (dest) == STRICT_LOW_PART) | |
5845 | dest = SUBREG_REG (XEXP (dest, 0)); | |
5846 | ||
8ad4c111 | 5847 | if (REG_P (dest) || GET_CODE (dest) == SUBREG) |
752df20e | 5848 | /* Registers must also be inserted into chains for quantities. */ |
5849 | if (insert_regs (dest, sets[i].src_elt, 1)) | |
1b033cc3 | 5850 | { |
5851 | /* If `insert_regs' changes something, the hash code must be | |
5852 | recalculated. */ | |
5853 | rehash_using_reg (dest); | |
5854 | sets[i].dest_hash = HASH (dest, GET_MODE (dest)); | |
5855 | } | |
752df20e | 5856 | |
e8825bb0 | 5857 | elt = insert (dest, sets[i].src_elt, |
5858 | sets[i].dest_hash, GET_MODE (dest)); | |
a97275a9 | 5859 | |
01c8e4c9 | 5860 | /* If this is a constant, insert the constant anchors with the |
5861 | equivalent register-offset expressions using register DEST. */ | |
5862 | if (targetm.const_anchor | |
5863 | && REG_P (dest) | |
5864 | && SCALAR_INT_MODE_P (GET_MODE (dest)) | |
5865 | && GET_CODE (sets[i].src_elt->exp) == CONST_INT) | |
5866 | insert_const_anchors (dest, sets[i].src_elt->exp, GET_MODE (dest)); | |
5867 | ||
e16ceb8e | 5868 | elt->in_memory = (MEM_P (sets[i].inner_dest) |
b04fab2a | 5869 | && !MEM_READONLY_P (sets[i].inner_dest)); |
26830081 | 5870 | |
e516eaa9 | 5871 | /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no |
5872 | narrower than M2, and both M1 and M2 are the same number of words, | |
5873 | we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so | |
5874 | make that equivalence as well. | |
752df20e | 5875 | |
316f48ea | 5876 | However, BAR may have equivalences for which gen_lowpart |
5877 | will produce a simpler value than gen_lowpart applied to | |
752df20e | 5878 | BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all |
cb10db9d | 5879 | BAR's equivalences. If we don't get a simplified form, make |
752df20e | 5880 | the SUBREG. It will not be used in an equivalence, but will |
5881 | cause two similar assignments to be detected. | |
5882 | ||
5883 | Note the loop below will find SUBREG_REG (DEST) since we have | |
5884 | already entered SRC and DEST of the SET in the table. */ | |
5885 | ||
5886 | if (GET_CODE (dest) == SUBREG | |
e82e6abc | 5887 | && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) - 1) |
5888 | / UNITS_PER_WORD) | |
cb10db9d | 5889 | == (GET_MODE_SIZE (GET_MODE (dest)) - 1) / UNITS_PER_WORD) |
752df20e | 5890 | && (GET_MODE_SIZE (GET_MODE (dest)) |
5891 | >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest)))) | |
5892 | && sets[i].src_elt != 0) | |
5893 | { | |
3754d046 | 5894 | machine_mode new_mode = GET_MODE (SUBREG_REG (dest)); |
752df20e | 5895 | struct table_elt *elt, *classp = 0; |
5896 | ||
5897 | for (elt = sets[i].src_elt->first_same_value; elt; | |
5898 | elt = elt->next_same_value) | |
5899 | { | |
5900 | rtx new_src = 0; | |
952bc06d | 5901 | unsigned src_hash; |
752df20e | 5902 | struct table_elt *src_elt; |
cdc84acd | 5903 | int byte = 0; |
752df20e | 5904 | |
5905 | /* Ignore invalid entries. */ | |
8ad4c111 | 5906 | if (!REG_P (elt->exp) |
78d140c9 | 5907 | && ! exp_equiv_p (elt->exp, elt->exp, 1, false)) |
752df20e | 5908 | continue; |
5909 | ||
38b13a9b | 5910 | /* We may have already been playing subreg games. If the |
5911 | mode is already correct for the destination, use it. */ | |
5912 | if (GET_MODE (elt->exp) == new_mode) | |
5913 | new_src = elt->exp; | |
5914 | else | |
5915 | { | |
5916 | /* Calculate big endian correction for the SUBREG_BYTE. | |
5917 | We have already checked that M1 (GET_MODE (dest)) | |
5918 | is not narrower than M2 (new_mode). */ | |
5919 | if (BYTES_BIG_ENDIAN) | |
5920 | byte = (GET_MODE_SIZE (GET_MODE (dest)) | |
5921 | - GET_MODE_SIZE (new_mode)); | |
5922 | ||
5923 | new_src = simplify_gen_subreg (new_mode, elt->exp, | |
5924 | GET_MODE (dest), byte); | |
5925 | } | |
5926 | ||
cdc84acd | 5927 | /* The call to simplify_gen_subreg fails if the value |
5928 | is VOIDmode, yet we can't do any simplification, e.g. | |
5929 | for EXPR_LISTs denoting function call results. | |
5930 | It is invalid to construct a SUBREG with a VOIDmode | |
5931 | SUBREG_REG, hence a zero new_src means we can't do | |
5932 | this substitution. */ | |
5933 | if (! new_src) | |
5934 | continue; | |
752df20e | 5935 | |
5936 | src_hash = HASH (new_src, new_mode); | |
5937 | src_elt = lookup (new_src, src_hash, new_mode); | |
5938 | ||
5939 | /* Put the new source in the hash table is if isn't | |
5940 | already. */ | |
5941 | if (src_elt == 0) | |
5942 | { | |
5943 | if (insert_regs (new_src, classp, 0)) | |
1b033cc3 | 5944 | { |
5945 | rehash_using_reg (new_src); | |
5946 | src_hash = HASH (new_src, new_mode); | |
5947 | } | |
752df20e | 5948 | src_elt = insert (new_src, classp, src_hash, new_mode); |
5949 | src_elt->in_memory = elt->in_memory; | |
20d3ff08 | 5950 | if (GET_CODE (new_src) == ASM_OPERANDS |
5951 | && elt->cost == MAX_COST) | |
5952 | src_elt->cost = MAX_COST; | |
752df20e | 5953 | } |
5954 | else if (classp && classp != src_elt->first_same_value) | |
cb10db9d | 5955 | /* Show that two things that we've seen before are |
752df20e | 5956 | actually the same. */ |
5957 | merge_equiv_classes (src_elt, classp); | |
5958 | ||
5959 | classp = src_elt->first_same_value; | |
7720c877 | 5960 | /* Ignore invalid entries. */ |
5961 | while (classp | |
8ad4c111 | 5962 | && !REG_P (classp->exp) |
78d140c9 | 5963 | && ! exp_equiv_p (classp->exp, classp->exp, 1, false)) |
7720c877 | 5964 | classp = classp->next_same_value; |
752df20e | 5965 | } |
5966 | } | |
5967 | } | |
5968 | ||
01a22203 | 5969 | /* Special handling for (set REG0 REG1) where REG0 is the |
5970 | "cheapest", cheaper than REG1. After cse, REG1 will probably not | |
5971 | be used in the sequel, so (if easily done) change this insn to | |
5972 | (set REG1 REG0) and replace REG1 with REG0 in the previous insn | |
5973 | that computed their value. Then REG1 will become a dead store | |
5974 | and won't cloud the situation for later optimizations. | |
752df20e | 5975 | |
5976 | Do not make this change if REG1 is a hard register, because it will | |
5977 | then be used in the sequel and we may be changing a two-operand insn | |
5978 | into a three-operand insn. | |
5979 | ||
1e5b92fa | 5980 | Also do not do this if we are operating on a copy of INSN. */ |
752df20e | 5981 | |
2aca5650 | 5982 | if (n_sets == 1 && sets[0].rtl) |
5983 | try_back_substitute_reg (sets[0].rtl, insn); | |
752df20e | 5984 | |
be22716f | 5985 | done:; |
752df20e | 5986 | } |
5987 | \f | |
59241190 | 5988 | /* Remove from the hash table all expressions that reference memory. */ |
155b05dc | 5989 | |
752df20e | 5990 | static void |
8ec3a57b | 5991 | invalidate_memory (void) |
752df20e | 5992 | { |
19cb6b50 | 5993 | int i; |
5994 | struct table_elt *p, *next; | |
752df20e | 5995 | |
9c4f3716 | 5996 | for (i = 0; i < HASH_SIZE; i++) |
ea0cb7ae | 5997 | for (p = table[i]; p; p = next) |
5998 | { | |
5999 | next = p->next_same_hash; | |
6000 | if (p->in_memory) | |
6001 | remove_from_table (p, i); | |
6002 | } | |
6003 | } | |
6004 | ||
2aca5650 | 6005 | /* Perform invalidation on the basis of everything about INSN, |
752df20e | 6006 | except for invalidating the actual places that are SET in it. |
6007 | This includes the places CLOBBERed, and anything that might | |
2aca5650 | 6008 | alias with something that is SET or CLOBBERed. */ |
752df20e | 6009 | |
6010 | static void | |
47f1d198 | 6011 | invalidate_from_clobbers (rtx_insn *insn) |
752df20e | 6012 | { |
2aca5650 | 6013 | rtx x = PATTERN (insn); |
6014 | ||
752df20e | 6015 | if (GET_CODE (x) == CLOBBER) |
6016 | { | |
6017 | rtx ref = XEXP (x, 0); | |
ea0cb7ae | 6018 | if (ref) |
6019 | { | |
8ad4c111 | 6020 | if (REG_P (ref) || GET_CODE (ref) == SUBREG |
e16ceb8e | 6021 | || MEM_P (ref)) |
ea0cb7ae | 6022 | invalidate (ref, VOIDmode); |
6023 | else if (GET_CODE (ref) == STRICT_LOW_PART | |
6024 | || GET_CODE (ref) == ZERO_EXTRACT) | |
6025 | invalidate (XEXP (ref, 0), GET_MODE (ref)); | |
6026 | } | |
752df20e | 6027 | } |
6028 | else if (GET_CODE (x) == PARALLEL) | |
6029 | { | |
19cb6b50 | 6030 | int i; |
752df20e | 6031 | for (i = XVECLEN (x, 0) - 1; i >= 0; i--) |
6032 | { | |
19cb6b50 | 6033 | rtx y = XVECEXP (x, 0, i); |
752df20e | 6034 | if (GET_CODE (y) == CLOBBER) |
6035 | { | |
6036 | rtx ref = XEXP (y, 0); | |
8ad4c111 | 6037 | if (REG_P (ref) || GET_CODE (ref) == SUBREG |
e16ceb8e | 6038 | || MEM_P (ref)) |
ea0cb7ae | 6039 | invalidate (ref, VOIDmode); |
6040 | else if (GET_CODE (ref) == STRICT_LOW_PART | |
6041 | || GET_CODE (ref) == ZERO_EXTRACT) | |
6042 | invalidate (XEXP (ref, 0), GET_MODE (ref)); | |
752df20e | 6043 | } |
6044 | } | |
6045 | } | |
6046 | } | |
6047 | \f | |
2aca5650 | 6048 | /* Perform invalidation on the basis of everything about INSN. |
6049 | This includes the places CLOBBERed, and anything that might | |
6050 | alias with something that is SET or CLOBBERed. */ | |
6051 | ||
6052 | static void | |
47f1d198 | 6053 | invalidate_from_sets_and_clobbers (rtx_insn *insn) |
2aca5650 | 6054 | { |
6055 | rtx tem; | |
6056 | rtx x = PATTERN (insn); | |
6057 | ||
6058 | if (CALL_P (insn)) | |
6059 | { | |
6060 | for (tem = CALL_INSN_FUNCTION_USAGE (insn); tem; tem = XEXP (tem, 1)) | |
6061 | if (GET_CODE (XEXP (tem, 0)) == CLOBBER) | |
6062 | invalidate (SET_DEST (XEXP (tem, 0)), VOIDmode); | |
6063 | } | |
6064 | ||
6065 | /* Ensure we invalidate the destination register of a CALL insn. | |
6066 | This is necessary for machines where this register is a fixed_reg, | |
6067 | because no other code would invalidate it. */ | |
6068 | if (GET_CODE (x) == SET && GET_CODE (SET_SRC (x)) == CALL) | |
6069 | invalidate (SET_DEST (x), VOIDmode); | |
6070 | ||
6071 | else if (GET_CODE (x) == PARALLEL) | |
6072 | { | |
6073 | int i; | |
6074 | ||
6075 | for (i = XVECLEN (x, 0) - 1; i >= 0; i--) | |
6076 | { | |
6077 | rtx y = XVECEXP (x, 0, i); | |
6078 | if (GET_CODE (y) == CLOBBER) | |
6079 | { | |
6080 | rtx clobbered = XEXP (y, 0); | |
6081 | ||
6082 | if (REG_P (clobbered) | |
6083 | || GET_CODE (clobbered) == SUBREG) | |
6084 | invalidate (clobbered, VOIDmode); | |
6085 | else if (GET_CODE (clobbered) == STRICT_LOW_PART | |
6086 | || GET_CODE (clobbered) == ZERO_EXTRACT) | |
6087 | invalidate (XEXP (clobbered, 0), GET_MODE (clobbered)); | |
6088 | } | |
6089 | else if (GET_CODE (y) == SET && GET_CODE (SET_SRC (y)) == CALL) | |
6090 | invalidate (SET_DEST (y), VOIDmode); | |
6091 | } | |
6092 | } | |
6093 | } | |
6094 | \f | |
752df20e | 6095 | /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes |
6096 | and replace any registers in them with either an equivalent constant | |
6097 | or the canonical form of the register. If we are inside an address, | |
6098 | only do this if the address remains valid. | |
6099 | ||
6100 | OBJECT is 0 except when within a MEM in which case it is the MEM. | |
6101 | ||
6102 | Return the replacement for X. */ | |
6103 | ||
6104 | static rtx | |
3072d30e | 6105 | cse_process_notes_1 (rtx x, rtx object, bool *changed) |
752df20e | 6106 | { |
6107 | enum rtx_code code = GET_CODE (x); | |
d2ca078f | 6108 | const char *fmt = GET_RTX_FORMAT (code); |
752df20e | 6109 | int i; |
6110 | ||
6111 | switch (code) | |
6112 | { | |
752df20e | 6113 | case CONST: |
6114 | case SYMBOL_REF: | |
6115 | case LABEL_REF: | |
0349edce | 6116 | CASE_CONST_ANY: |
752df20e | 6117 | case PC: |
6118 | case CC0: | |
6119 | case LO_SUM: | |
6120 | return x; | |
6121 | ||
6122 | case MEM: | |
a344307e | 6123 | validate_change (x, &XEXP (x, 0), |
3072d30e | 6124 | cse_process_notes (XEXP (x, 0), x, changed), 0); |
752df20e | 6125 | return x; |
6126 | ||
6127 | case EXPR_LIST: | |
752df20e | 6128 | if (REG_NOTE_KIND (x) == REG_EQUAL) |
3072d30e | 6129 | XEXP (x, 0) = cse_process_notes (XEXP (x, 0), NULL_RTX, changed); |
9eb946de | 6130 | /* Fall through. */ |
6131 | ||
6132 | case INSN_LIST: | |
6133 | case INT_LIST: | |
752df20e | 6134 | if (XEXP (x, 1)) |
3072d30e | 6135 | XEXP (x, 1) = cse_process_notes (XEXP (x, 1), NULL_RTX, changed); |
752df20e | 6136 | return x; |
6137 | ||
21c77c5d | 6138 | case SIGN_EXTEND: |
6139 | case ZERO_EXTEND: | |
5afa7a07 | 6140 | case SUBREG: |
21c77c5d | 6141 | { |
d328ebdf | 6142 | rtx new_rtx = cse_process_notes (XEXP (x, 0), object, changed); |
21c77c5d | 6143 | /* We don't substitute VOIDmode constants into these rtx, |
6144 | since they would impede folding. */ | |
d328ebdf | 6145 | if (GET_MODE (new_rtx) != VOIDmode) |
6146 | validate_change (object, &XEXP (x, 0), new_rtx, 0); | |
21c77c5d | 6147 | return x; |
6148 | } | |
6149 | ||
d733203b | 6150 | case UNSIGNED_FLOAT: |
6151 | { | |
6152 | rtx new_rtx = cse_process_notes (XEXP (x, 0), object, changed); | |
6153 | /* We don't substitute negative VOIDmode constants into these rtx, | |
6154 | since they would impede folding. */ | |
6155 | if (GET_MODE (new_rtx) != VOIDmode | |
6156 | || (CONST_INT_P (new_rtx) && INTVAL (new_rtx) >= 0) | |
6157 | || (CONST_DOUBLE_P (new_rtx) && CONST_DOUBLE_HIGH (new_rtx) >= 0)) | |
6158 | validate_change (object, &XEXP (x, 0), new_rtx, 0); | |
6159 | return x; | |
6160 | } | |
6161 | ||
752df20e | 6162 | case REG: |
d1264606 | 6163 | i = REG_QTY (REGNO (x)); |
752df20e | 6164 | |
6165 | /* Return a constant or a constant register. */ | |
a7f3b1c7 | 6166 | if (REGNO_QTY_VALID_P (REGNO (x))) |
752df20e | 6167 | { |
a7f3b1c7 | 6168 | struct qty_table_elem *ent = &qty_table[i]; |
6169 | ||
6170 | if (ent->const_rtx != NULL_RTX | |
6171 | && (CONSTANT_P (ent->const_rtx) | |
8ad4c111 | 6172 | || REG_P (ent->const_rtx))) |
a7f3b1c7 | 6173 | { |
d328ebdf | 6174 | rtx new_rtx = gen_lowpart (GET_MODE (x), ent->const_rtx); |
6175 | if (new_rtx) | |
6176 | return copy_rtx (new_rtx); | |
a7f3b1c7 | 6177 | } |
752df20e | 6178 | } |
6179 | ||
6180 | /* Otherwise, canonicalize this register. */ | |
47f1d198 | 6181 | return canon_reg (x, NULL); |
cb10db9d | 6182 | |
0dbd1c74 | 6183 | default: |
6184 | break; | |
752df20e | 6185 | } |
6186 | ||
6187 | for (i = 0; i < GET_RTX_LENGTH (code); i++) | |
6188 | if (fmt[i] == 'e') | |
6189 | validate_change (object, &XEXP (x, i), | |
3072d30e | 6190 | cse_process_notes (XEXP (x, i), object, changed), 0); |
752df20e | 6191 | |
6192 | return x; | |
6193 | } | |
3072d30e | 6194 | |
6195 | static rtx | |
6196 | cse_process_notes (rtx x, rtx object, bool *changed) | |
6197 | { | |
d328ebdf | 6198 | rtx new_rtx = cse_process_notes_1 (x, object, changed); |
6199 | if (new_rtx != x) | |
3072d30e | 6200 | *changed = true; |
d328ebdf | 6201 | return new_rtx; |
3072d30e | 6202 | } |
6203 | ||
752df20e | 6204 | \f |
be22716f | 6205 | /* Find a path in the CFG, starting with FIRST_BB to perform CSE on. |
752df20e | 6206 | |
be22716f | 6207 | DATA is a pointer to a struct cse_basic_block_data, that is used to |
6208 | describe the path. | |
6209 | It is filled with a queue of basic blocks, starting with FIRST_BB | |
6210 | and following a trace through the CFG. | |
48e1416a | 6211 | |
be22716f | 6212 | If all paths starting at FIRST_BB have been followed, or no new path |
6213 | starting at FIRST_BB can be constructed, this function returns FALSE. | |
6214 | Otherwise, DATA->path is filled and the function returns TRUE indicating | |
6215 | that a path to follow was found. | |
752df20e | 6216 | |
7920eed5 | 6217 | If FOLLOW_JUMPS is false, the maximum path length is 1 and the only |
be22716f | 6218 | block in the path will be FIRST_BB. */ |
752df20e | 6219 | |
be22716f | 6220 | static bool |
6221 | cse_find_path (basic_block first_bb, struct cse_basic_block_data *data, | |
6222 | int follow_jumps) | |
752df20e | 6223 | { |
be22716f | 6224 | basic_block bb; |
6225 | edge e; | |
6226 | int path_size; | |
48e1416a | 6227 | |
08b7917c | 6228 | bitmap_set_bit (cse_visited_basic_blocks, first_bb->index); |
752df20e | 6229 | |
be22716f | 6230 | /* See if there is a previous path. */ |
6231 | path_size = data->path_size; | |
6232 | ||
6233 | /* There is a previous path. Make sure it started with FIRST_BB. */ | |
6234 | if (path_size) | |
6235 | gcc_assert (data->path[0].bb == first_bb); | |
6236 | ||
6237 | /* There was only one basic block in the last path. Clear the path and | |
6238 | return, so that paths starting at another basic block can be tried. */ | |
6239 | if (path_size == 1) | |
6240 | { | |
6241 | path_size = 0; | |
6242 | goto done; | |
6243 | } | |
6244 | ||
6245 | /* If the path was empty from the beginning, construct a new path. */ | |
6246 | if (path_size == 0) | |
6247 | data->path[path_size++].bb = first_bb; | |
6248 | else | |
752df20e | 6249 | { |
be22716f | 6250 | /* Otherwise, path_size must be equal to or greater than 2, because |
6251 | a previous path exists that is at least two basic blocks long. | |
6252 | ||
6253 | Update the previous branch path, if any. If the last branch was | |
6254 | previously along the branch edge, take the fallthrough edge now. */ | |
6255 | while (path_size >= 2) | |
752df20e | 6256 | { |
be22716f | 6257 | basic_block last_bb_in_path, previous_bb_in_path; |
6258 | edge e; | |
6259 | ||
6260 | --path_size; | |
6261 | last_bb_in_path = data->path[path_size].bb; | |
6262 | previous_bb_in_path = data->path[path_size - 1].bb; | |
6263 | ||
6264 | /* If we previously followed a path along the branch edge, try | |
6265 | the fallthru edge now. */ | |
6266 | if (EDGE_COUNT (previous_bb_in_path->succs) == 2 | |
6267 | && any_condjump_p (BB_END (previous_bb_in_path)) | |
6268 | && (e = find_edge (previous_bb_in_path, last_bb_in_path)) | |
6269 | && e == BRANCH_EDGE (previous_bb_in_path)) | |
6270 | { | |
6271 | bb = FALLTHRU_EDGE (previous_bb_in_path)->dest; | |
34154e27 | 6272 | if (bb != EXIT_BLOCK_PTR_FOR_FN (cfun) |
3752d411 | 6273 | && single_pred_p (bb) |
6274 | /* We used to assert here that we would only see blocks | |
6275 | that we have not visited yet. But we may end up | |
6276 | visiting basic blocks twice if the CFG has changed | |
6277 | in this run of cse_main, because when the CFG changes | |
6278 | the topological sort of the CFG also changes. A basic | |
6279 | blocks that previously had more than two predecessors | |
6280 | may now have a single predecessor, and become part of | |
6281 | a path that starts at another basic block. | |
6282 | ||
6283 | We still want to visit each basic block only once, so | |
6284 | halt the path here if we have already visited BB. */ | |
08b7917c | 6285 | && !bitmap_bit_p (cse_visited_basic_blocks, bb->index)) |
be22716f | 6286 | { |
08b7917c | 6287 | bitmap_set_bit (cse_visited_basic_blocks, bb->index); |
be22716f | 6288 | data->path[path_size++].bb = bb; |
6289 | break; | |
6290 | } | |
6291 | } | |
6292 | ||
6293 | data->path[path_size].bb = NULL; | |
6294 | } | |
6295 | ||
6296 | /* If only one block remains in the path, bail. */ | |
6297 | if (path_size == 1) | |
6298 | { | |
6299 | path_size = 0; | |
6300 | goto done; | |
752df20e | 6301 | } |
752df20e | 6302 | } |
6303 | ||
be22716f | 6304 | /* Extend the path if possible. */ |
6305 | if (follow_jumps) | |
752df20e | 6306 | { |
be22716f | 6307 | bb = data->path[path_size - 1].bb; |
6308 | while (bb && path_size < PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH)) | |
6309 | { | |
6310 | if (single_succ_p (bb)) | |
6311 | e = single_succ_edge (bb); | |
6312 | else if (EDGE_COUNT (bb->succs) == 2 | |
6313 | && any_condjump_p (BB_END (bb))) | |
6314 | { | |
6315 | /* First try to follow the branch. If that doesn't lead | |
6316 | to a useful path, follow the fallthru edge. */ | |
6317 | e = BRANCH_EDGE (bb); | |
6318 | if (!single_pred_p (e->dest)) | |
6319 | e = FALLTHRU_EDGE (bb); | |
6320 | } | |
6321 | else | |
6322 | e = NULL; | |
752df20e | 6323 | |
d1ff492e | 6324 | if (e |
4c43a998 | 6325 | && !((e->flags & EDGE_ABNORMAL_CALL) && cfun->has_nonlocal_label) |
34154e27 | 6326 | && e->dest != EXIT_BLOCK_PTR_FOR_FN (cfun) |
3752d411 | 6327 | && single_pred_p (e->dest) |
6328 | /* Avoid visiting basic blocks twice. The large comment | |
6329 | above explains why this can happen. */ | |
08b7917c | 6330 | && !bitmap_bit_p (cse_visited_basic_blocks, e->dest->index)) |
be22716f | 6331 | { |
6332 | basic_block bb2 = e->dest; | |
08b7917c | 6333 | bitmap_set_bit (cse_visited_basic_blocks, bb2->index); |
be22716f | 6334 | data->path[path_size++].bb = bb2; |
6335 | bb = bb2; | |
6336 | } | |
6337 | else | |
6338 | bb = NULL; | |
6339 | } | |
6340 | } | |
6341 | ||
6342 | done: | |
6343 | data->path_size = path_size; | |
6344 | return path_size != 0; | |
6345 | } | |
6346 | \f | |
6347 | /* Dump the path in DATA to file F. NSETS is the number of sets | |
6348 | in the path. */ | |
6349 | ||
6350 | static void | |
6351 | cse_dump_path (struct cse_basic_block_data *data, int nsets, FILE *f) | |
6352 | { | |
6353 | int path_entry; | |
6354 | ||
6355 | fprintf (f, ";; Following path with %d sets: ", nsets); | |
6356 | for (path_entry = 0; path_entry < data->path_size; path_entry++) | |
6357 | fprintf (f, "%d ", (data->path[path_entry].bb)->index); | |
6358 | fputc ('\n', dump_file); | |
6359 | fflush (f); | |
6360 | } | |
6361 | ||
99013338 | 6362 | \f |
6363 | /* Return true if BB has exception handling successor edges. */ | |
6364 | ||
6365 | static bool | |
6366 | have_eh_succ_edges (basic_block bb) | |
6367 | { | |
6368 | edge e; | |
6369 | edge_iterator ei; | |
6370 | ||
6371 | FOR_EACH_EDGE (e, ei, bb->succs) | |
6372 | if (e->flags & EDGE_EH) | |
6373 | return true; | |
6374 | ||
6375 | return false; | |
6376 | } | |
6377 | ||
be22716f | 6378 | \f |
6379 | /* Scan to the end of the path described by DATA. Return an estimate of | |
3072d30e | 6380 | the total number of SETs of all insns in the path. */ |
be22716f | 6381 | |
6382 | static void | |
6383 | cse_prescan_path (struct cse_basic_block_data *data) | |
6384 | { | |
6385 | int nsets = 0; | |
be22716f | 6386 | int path_size = data->path_size; |
6387 | int path_entry; | |
6388 | ||
6389 | /* Scan to end of each basic block in the path. */ | |
48e1416a | 6390 | for (path_entry = 0; path_entry < path_size; path_entry++) |
be22716f | 6391 | { |
6392 | basic_block bb; | |
47f1d198 | 6393 | rtx_insn *insn; |
dfcbcd81 | 6394 | |
be22716f | 6395 | bb = data->path[path_entry].bb; |
752df20e | 6396 | |
be22716f | 6397 | FOR_BB_INSNS (bb, insn) |
752df20e | 6398 | { |
be22716f | 6399 | if (!INSN_P (insn)) |
6400 | continue; | |
cb10db9d | 6401 | |
be22716f | 6402 | /* A PARALLEL can have lots of SETs in it, |
6403 | especially if it is really an ASM_OPERANDS. */ | |
6404 | if (GET_CODE (PATTERN (insn)) == PARALLEL) | |
6405 | nsets += XVECLEN (PATTERN (insn), 0); | |
6406 | else | |
6407 | nsets += 1; | |
752df20e | 6408 | } |
be22716f | 6409 | } |
6410 | ||
be22716f | 6411 | data->nsets = nsets; |
6412 | } | |
6413 | \f | |
9206d997 | 6414 | /* Return true if the pattern of INSN uses a LABEL_REF for which |
6415 | there isn't a REG_LABEL_OPERAND note. */ | |
6416 | ||
6417 | static bool | |
6418 | check_for_label_ref (rtx_insn *insn) | |
6419 | { | |
6420 | /* If this insn uses a LABEL_REF and there isn't a REG_LABEL_OPERAND | |
6421 | note for it, we must rerun jump since it needs to place the note. If | |
6422 | this is a LABEL_REF for a CODE_LABEL that isn't in the insn chain, | |
6423 | don't do this since no REG_LABEL_OPERAND will be added. */ | |
6424 | subrtx_iterator::array_type array; | |
6425 | FOR_EACH_SUBRTX (iter, array, PATTERN (insn), ALL) | |
6426 | { | |
6427 | const_rtx x = *iter; | |
6428 | if (GET_CODE (x) == LABEL_REF | |
6429 | && !LABEL_REF_NONLOCAL_P (x) | |
6430 | && (!JUMP_P (insn) | |
b49f2e4b | 6431 | || !label_is_jump_target_p (LABEL_REF_LABEL (x), insn)) |
6432 | && LABEL_P (LABEL_REF_LABEL (x)) | |
6433 | && INSN_UID (LABEL_REF_LABEL (x)) != 0 | |
6434 | && !find_reg_note (insn, REG_LABEL_OPERAND, LABEL_REF_LABEL (x))) | |
9206d997 | 6435 | return true; |
6436 | } | |
6437 | return false; | |
6438 | } | |
6439 | ||
be22716f | 6440 | /* Process a single extended basic block described by EBB_DATA. */ |
752df20e | 6441 | |
be22716f | 6442 | static void |
6443 | cse_extended_basic_block (struct cse_basic_block_data *ebb_data) | |
6444 | { | |
6445 | int path_size = ebb_data->path_size; | |
6446 | int path_entry; | |
6447 | int num_insns = 0; | |
6448 | ||
6449 | /* Allocate the space needed by qty_table. */ | |
6450 | qty_table = XNEWVEC (struct qty_table_elem, max_qty); | |
6451 | ||
6452 | new_basic_block (); | |
deb2741b | 6453 | cse_ebb_live_in = df_get_live_in (ebb_data->path[0].bb); |
6454 | cse_ebb_live_out = df_get_live_out (ebb_data->path[path_size - 1].bb); | |
be22716f | 6455 | for (path_entry = 0; path_entry < path_size; path_entry++) |
6456 | { | |
6457 | basic_block bb; | |
47f1d198 | 6458 | rtx_insn *insn; |
be22716f | 6459 | |
6460 | bb = ebb_data->path[path_entry].bb; | |
b357aba8 | 6461 | |
6462 | /* Invalidate recorded information for eh regs if there is an EH | |
6463 | edge pointing to that bb. */ | |
6464 | if (bb_has_eh_pred (bb)) | |
6465 | { | |
f1c570a6 | 6466 | df_ref def; |
b357aba8 | 6467 | |
f1c570a6 | 6468 | FOR_EACH_ARTIFICIAL_DEF (def, bb->index) |
6469 | if (DF_REF_FLAGS (def) & DF_REF_AT_TOP) | |
6470 | invalidate (DF_REF_REG (def), GET_MODE (DF_REF_REG (def))); | |
b357aba8 | 6471 | } |
6472 | ||
396a4a1d | 6473 | optimize_this_for_speed_p = optimize_bb_for_speed_p (bb); |
201f6961 | 6474 | FOR_BB_INSNS (bb, insn) |
752df20e | 6475 | { |
be22716f | 6476 | /* If we have processed 1,000 insns, flush the hash table to |
6477 | avoid extreme quadratic behavior. We must not include NOTEs | |
6478 | in the count since there may be more of them when generating | |
6479 | debugging information. If we clear the table at different | |
6480 | times, code generated with -g -O might be different than code | |
6481 | generated with -O but not -g. | |
6482 | ||
6483 | FIXME: This is a real kludge and needs to be done some other | |
6484 | way. */ | |
9845d120 | 6485 | if (NONDEBUG_INSN_P (insn) |
be22716f | 6486 | && num_insns++ > PARAM_VALUE (PARAM_MAX_CSE_INSNS)) |
6487 | { | |
6488 | flush_hash_table (); | |
6489 | num_insns = 0; | |
6490 | } | |
752df20e | 6491 | |
be22716f | 6492 | if (INSN_P (insn)) |
752df20e | 6493 | { |
be22716f | 6494 | /* Process notes first so we have all notes in canonical forms |
6495 | when looking for duplicate operations. */ | |
6496 | if (REG_NOTES (insn)) | |
3072d30e | 6497 | { |
6498 | bool changed = false; | |
6499 | REG_NOTES (insn) = cse_process_notes (REG_NOTES (insn), | |
6500 | NULL_RTX, &changed); | |
6501 | if (changed) | |
6502 | df_notes_rescan (insn); | |
6503 | } | |
be22716f | 6504 | |
1e5b92fa | 6505 | cse_insn (insn); |
be22716f | 6506 | |
be22716f | 6507 | /* If we haven't already found an insn where we added a LABEL_REF, |
6508 | check this one. */ | |
283a6b26 | 6509 | if (INSN_P (insn) && !recorded_label_ref |
9206d997 | 6510 | && check_for_label_ref (insn)) |
283a6b26 | 6511 | recorded_label_ref = true; |
c6ddfc69 | 6512 | |
ff900b8e | 6513 | if (HAVE_cc0 && NONDEBUG_INSN_P (insn)) |
c6ddfc69 | 6514 | { |
5542b661 | 6515 | /* If the previous insn sets CC0 and this insn no |
6516 | longer references CC0, delete the previous insn. | |
6517 | Here we use fact that nothing expects CC0 to be | |
6518 | valid over an insn, which is true until the final | |
6519 | pass. */ | |
47f1d198 | 6520 | rtx_insn *prev_insn; |
6521 | rtx tem; | |
5542b661 | 6522 | |
6523 | prev_insn = prev_nonnote_nondebug_insn (insn); | |
6524 | if (prev_insn && NONJUMP_INSN_P (prev_insn) | |
6525 | && (tem = single_set (prev_insn)) != NULL_RTX | |
6526 | && SET_DEST (tem) == cc0_rtx | |
6527 | && ! reg_mentioned_p (cc0_rtx, PATTERN (insn))) | |
6528 | delete_insn (prev_insn); | |
6529 | ||
6530 | /* If this insn is not the last insn in the basic | |
6531 | block, it will be PREV_INSN(insn) in the next | |
6532 | iteration. If we recorded any CC0-related | |
6533 | information for this insn, remember it. */ | |
6534 | if (insn != BB_END (bb)) | |
6535 | { | |
6536 | prev_insn_cc0 = this_insn_cc0; | |
6537 | prev_insn_cc0_mode = this_insn_cc0_mode; | |
6538 | } | |
c6ddfc69 | 6539 | } |
be22716f | 6540 | } |
6541 | } | |
752df20e | 6542 | |
99013338 | 6543 | /* With non-call exceptions, we are not always able to update |
6544 | the CFG properly inside cse_insn. So clean up possibly | |
6545 | redundant EH edges here. */ | |
cbeb677e | 6546 | if (cfun->can_throw_non_call_exceptions && have_eh_succ_edges (bb)) |
283a6b26 | 6547 | cse_cfg_altered |= purge_dead_edges (bb); |
99013338 | 6548 | |
be22716f | 6549 | /* If we changed a conditional jump, we may have terminated |
6550 | the path we are following. Check that by verifying that | |
6551 | the edge we would take still exists. If the edge does | |
6552 | not exist anymore, purge the remainder of the path. | |
6553 | Note that this will cause us to return to the caller. */ | |
6554 | if (path_entry < path_size - 1) | |
6555 | { | |
6556 | basic_block next_bb = ebb_data->path[path_entry + 1].bb; | |
6557 | if (!find_edge (bb, next_bb)) | |
5b58e627 | 6558 | { |
6559 | do | |
6560 | { | |
6561 | path_size--; | |
6562 | ||
6563 | /* If we truncate the path, we must also reset the | |
6564 | visited bit on the remaining blocks in the path, | |
6565 | or we will never visit them at all. */ | |
08b7917c | 6566 | bitmap_clear_bit (cse_visited_basic_blocks, |
5b58e627 | 6567 | ebb_data->path[path_size].bb->index); |
6568 | ebb_data->path[path_size].bb = NULL; | |
6569 | } | |
6570 | while (path_size - 1 != path_entry); | |
6571 | ebb_data->path_size = path_size; | |
6572 | } | |
752df20e | 6573 | } |
752df20e | 6574 | |
be22716f | 6575 | /* If this is a conditional jump insn, record any known |
6576 | equivalences due to the condition being tested. */ | |
6577 | insn = BB_END (bb); | |
6578 | if (path_entry < path_size - 1 | |
6579 | && JUMP_P (insn) | |
6580 | && single_set (insn) | |
6581 | && any_condjump_p (insn)) | |
6582 | { | |
6583 | basic_block next_bb = ebb_data->path[path_entry + 1].bb; | |
6584 | bool taken = (next_bb == BRANCH_EDGE (bb)->dest); | |
6585 | record_jump_equiv (insn, taken); | |
6586 | } | |
c6ddfc69 | 6587 | |
c6ddfc69 | 6588 | /* Clear the CC0-tracking related insns, they can't provide |
6589 | useful information across basic block boundaries. */ | |
6590 | prev_insn_cc0 = 0; | |
be22716f | 6591 | } |
752df20e | 6592 | |
be22716f | 6593 | gcc_assert (next_qty <= max_qty); |
752df20e | 6594 | |
be22716f | 6595 | free (qty_table); |
752df20e | 6596 | } |
3072d30e | 6597 | |
752df20e | 6598 | \f |
752df20e | 6599 | /* Perform cse on the instructions of a function. |
6600 | F is the first instruction. | |
6601 | NREGS is one plus the highest pseudo-reg number used in the instruction. | |
6602 | ||
283a6b26 | 6603 | Return 2 if jump optimizations should be redone due to simplifications |
6604 | in conditional jump instructions. | |
6605 | Return 1 if the CFG should be cleaned up because it has been modified. | |
6606 | Return 0 otherwise. */ | |
752df20e | 6607 | |
d2bb3f9d | 6608 | static int |
47f1d198 | 6609 | cse_main (rtx_insn *f ATTRIBUTE_UNUSED, int nregs) |
752df20e | 6610 | { |
be22716f | 6611 | struct cse_basic_block_data ebb_data; |
6612 | basic_block bb; | |
fe672ac0 | 6613 | int *rc_order = XNEWVEC (int, last_basic_block_for_fn (cfun)); |
be22716f | 6614 | int i, n_blocks; |
752df20e | 6615 | |
3072d30e | 6616 | df_set_flags (DF_LR_RUN_DCE); |
264adf90 | 6617 | df_note_add_problem (); |
3072d30e | 6618 | df_analyze (); |
6619 | df_set_flags (DF_DEFER_INSN_RESCAN); | |
6620 | ||
6621 | reg_scan (get_insns (), max_reg_num ()); | |
3bd20490 | 6622 | init_cse_reg_info (nregs); |
6623 | ||
be22716f | 6624 | ebb_data.path = XNEWVEC (struct branch_path, |
6625 | PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH)); | |
38ccff25 | 6626 | |
283a6b26 | 6627 | cse_cfg_altered = false; |
6628 | cse_jumps_altered = false; | |
6629 | recorded_label_ref = false; | |
752df20e | 6630 | constant_pool_entries_cost = 0; |
634d45d7 | 6631 | constant_pool_entries_regcost = 0; |
be22716f | 6632 | ebb_data.path_size = 0; |
6633 | ebb_data.nsets = 0; | |
d263732c | 6634 | rtl_hooks = cse_rtl_hooks; |
752df20e | 6635 | |
6636 | init_recog (); | |
ea0cb7ae | 6637 | init_alias_analysis (); |
752df20e | 6638 | |
4c36ffe6 | 6639 | reg_eqv_table = XNEWVEC (struct reg_eqv_elem, nregs); |
752df20e | 6640 | |
be22716f | 6641 | /* Set up the table of already visited basic blocks. */ |
fe672ac0 | 6642 | cse_visited_basic_blocks = sbitmap_alloc (last_basic_block_for_fn (cfun)); |
53c5d9d4 | 6643 | bitmap_clear (cse_visited_basic_blocks); |
752df20e | 6644 | |
99013338 | 6645 | /* Loop over basic blocks in reverse completion order (RPO), |
be22716f | 6646 | excluding the ENTRY and EXIT blocks. */ |
5b58e627 | 6647 | n_blocks = pre_and_rev_post_order_compute (NULL, rc_order, false); |
be22716f | 6648 | i = 0; |
6649 | while (i < n_blocks) | |
752df20e | 6650 | { |
99013338 | 6651 | /* Find the first block in the RPO queue that we have not yet |
be22716f | 6652 | processed before. */ |
6653 | do | |
0dbd1c74 | 6654 | { |
f5a6b05f | 6655 | bb = BASIC_BLOCK_FOR_FN (cfun, rc_order[i++]); |
0dbd1c74 | 6656 | } |
08b7917c | 6657 | while (bitmap_bit_p (cse_visited_basic_blocks, bb->index) |
be22716f | 6658 | && i < n_blocks); |
752df20e | 6659 | |
be22716f | 6660 | /* Find all paths starting with BB, and process them. */ |
6661 | while (cse_find_path (bb, &ebb_data, flag_cse_follow_jumps)) | |
752df20e | 6662 | { |
be22716f | 6663 | /* Pre-scan the path. */ |
6664 | cse_prescan_path (&ebb_data); | |
752df20e | 6665 | |
be22716f | 6666 | /* If this basic block has no sets, skip it. */ |
6667 | if (ebb_data.nsets == 0) | |
6668 | continue; | |
752df20e | 6669 | |
7920eed5 | 6670 | /* Get a reasonable estimate for the maximum number of qty's |
be22716f | 6671 | needed for this path. For this, we take the number of sets |
6672 | and multiply that by MAX_RECOG_OPERANDS. */ | |
6673 | max_qty = ebb_data.nsets * MAX_RECOG_OPERANDS; | |
752df20e | 6674 | |
be22716f | 6675 | /* Dump the path we're about to process. */ |
6676 | if (dump_file) | |
6677 | cse_dump_path (&ebb_data, ebb_data.nsets, dump_file); | |
541a035f | 6678 | |
be22716f | 6679 | cse_extended_basic_block (&ebb_data); |
752df20e | 6680 | } |
752df20e | 6681 | } |
6682 | ||
be22716f | 6683 | /* Clean up. */ |
6684 | end_alias_analysis (); | |
be22716f | 6685 | free (reg_eqv_table); |
6686 | free (ebb_data.path); | |
6687 | sbitmap_free (cse_visited_basic_blocks); | |
5b58e627 | 6688 | free (rc_order); |
be22716f | 6689 | rtl_hooks = general_rtl_hooks; |
ef866782 | 6690 | |
283a6b26 | 6691 | if (cse_jumps_altered || recorded_label_ref) |
6692 | return 2; | |
6693 | else if (cse_cfg_altered) | |
6694 | return 1; | |
6695 | else | |
6696 | return 0; | |
752df20e | 6697 | } |
6698 | \f | |
6699 | /* Count the number of times registers are used (not set) in X. | |
6700 | COUNTS is an array in which we accumulate the count, INCR is how much | |
e6bf10d8 | 6701 | we count each register usage. |
6702 | ||
6703 | Don't count a usage of DEST, which is the SET_DEST of a SET which | |
6704 | contains X in its SET_SRC. This is because such a SET does not | |
6705 | modify the liveness of DEST. | |
46313beb | 6706 | DEST is set to pc_rtx for a trapping insn, or for an insn with side effects. |
6707 | We must then count uses of a SET_DEST regardless, because the insn can't be | |
6708 | deleted here. */ | |
752df20e | 6709 | |
6710 | static void | |
e6bf10d8 | 6711 | count_reg_usage (rtx x, int *counts, rtx dest, int incr) |
752df20e | 6712 | { |
b84155cd | 6713 | enum rtx_code code; |
ce32fe65 | 6714 | rtx note; |
d2ca078f | 6715 | const char *fmt; |
752df20e | 6716 | int i, j; |
6717 | ||
b84155cd | 6718 | if (x == 0) |
6719 | return; | |
6720 | ||
6721 | switch (code = GET_CODE (x)) | |
752df20e | 6722 | { |
6723 | case REG: | |
e6bf10d8 | 6724 | if (x != dest) |
6725 | counts[REGNO (x)] += incr; | |
752df20e | 6726 | return; |
6727 | ||
6728 | case PC: | |
6729 | case CC0: | |
6730 | case CONST: | |
0349edce | 6731 | CASE_CONST_ANY: |
752df20e | 6732 | case SYMBOL_REF: |
6733 | case LABEL_REF: | |
a51d039e | 6734 | return; |
6735 | ||
cb10db9d | 6736 | case CLOBBER: |
a51d039e | 6737 | /* If we are clobbering a MEM, mark any registers inside the address |
6738 | as being used. */ | |
e16ceb8e | 6739 | if (MEM_P (XEXP (x, 0))) |
e6bf10d8 | 6740 | count_reg_usage (XEXP (XEXP (x, 0), 0), counts, NULL_RTX, incr); |
752df20e | 6741 | return; |
6742 | ||
6743 | case SET: | |
6744 | /* Unless we are setting a REG, count everything in SET_DEST. */ | |
8ad4c111 | 6745 | if (!REG_P (SET_DEST (x))) |
e6bf10d8 | 6746 | count_reg_usage (SET_DEST (x), counts, NULL_RTX, incr); |
6747 | count_reg_usage (SET_SRC (x), counts, | |
6748 | dest ? dest : SET_DEST (x), | |
6749 | incr); | |
752df20e | 6750 | return; |
6751 | ||
9845d120 | 6752 | case DEBUG_INSN: |
6753 | return; | |
6754 | ||
b84155cd | 6755 | case CALL_INSN: |
752df20e | 6756 | case INSN: |
6757 | case JUMP_INSN: | |
bc0dfc8d | 6758 | /* We expect dest to be NULL_RTX here. If the insn may throw, |
46313beb | 6759 | or if it cannot be deleted due to side-effects, mark this fact |
6760 | by setting DEST to pc_rtx. */ | |
bc0dfc8d | 6761 | if ((!cfun->can_delete_dead_exceptions && !insn_nothrow_p (x)) |
6762 | || side_effects_p (PATTERN (x))) | |
e6bf10d8 | 6763 | dest = pc_rtx; |
6764 | if (code == CALL_INSN) | |
6765 | count_reg_usage (CALL_INSN_FUNCTION_USAGE (x), counts, dest, incr); | |
6766 | count_reg_usage (PATTERN (x), counts, dest, incr); | |
752df20e | 6767 | |
6768 | /* Things used in a REG_EQUAL note aren't dead since loop may try to | |
6769 | use them. */ | |
6770 | ||
ce32fe65 | 6771 | note = find_reg_equal_equiv_note (x); |
6772 | if (note) | |
86178c33 | 6773 | { |
6774 | rtx eqv = XEXP (note, 0); | |
6775 | ||
6776 | if (GET_CODE (eqv) == EXPR_LIST) | |
6777 | /* This REG_EQUAL note describes the result of a function call. | |
6778 | Process all the arguments. */ | |
6779 | do | |
6780 | { | |
e6bf10d8 | 6781 | count_reg_usage (XEXP (eqv, 0), counts, dest, incr); |
86178c33 | 6782 | eqv = XEXP (eqv, 1); |
6783 | } | |
6784 | while (eqv && GET_CODE (eqv) == EXPR_LIST); | |
6785 | else | |
e6bf10d8 | 6786 | count_reg_usage (eqv, counts, dest, incr); |
86178c33 | 6787 | } |
752df20e | 6788 | return; |
6789 | ||
d5f9786f | 6790 | case EXPR_LIST: |
6791 | if (REG_NOTE_KIND (x) == REG_EQUAL | |
6792 | || (REG_NOTE_KIND (x) != REG_NONNEG && GET_CODE (XEXP (x,0)) == USE) | |
6793 | /* FUNCTION_USAGE expression lists may include (CLOBBER (mem /u)), | |
6794 | involving registers in the address. */ | |
6795 | || GET_CODE (XEXP (x, 0)) == CLOBBER) | |
e6bf10d8 | 6796 | count_reg_usage (XEXP (x, 0), counts, NULL_RTX, incr); |
d5f9786f | 6797 | |
e6bf10d8 | 6798 | count_reg_usage (XEXP (x, 1), counts, NULL_RTX, incr); |
d5f9786f | 6799 | return; |
6800 | ||
16d4da86 | 6801 | case ASM_OPERANDS: |
16d4da86 | 6802 | /* Iterate over just the inputs, not the constraints as well. */ |
6803 | for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--) | |
e6bf10d8 | 6804 | count_reg_usage (ASM_OPERANDS_INPUT (x, i), counts, dest, incr); |
16d4da86 | 6805 | return; |
6806 | ||
752df20e | 6807 | case INSN_LIST: |
b3578ae7 | 6808 | case INT_LIST: |
cc636d56 | 6809 | gcc_unreachable (); |
cb10db9d | 6810 | |
0dbd1c74 | 6811 | default: |
6812 | break; | |
752df20e | 6813 | } |
6814 | ||
6815 | fmt = GET_RTX_FORMAT (code); | |
6816 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
6817 | { | |
6818 | if (fmt[i] == 'e') | |
e6bf10d8 | 6819 | count_reg_usage (XEXP (x, i), counts, dest, incr); |
752df20e | 6820 | else if (fmt[i] == 'E') |
6821 | for (j = XVECLEN (x, i) - 1; j >= 0; j--) | |
e6bf10d8 | 6822 | count_reg_usage (XVECEXP (x, i, j), counts, dest, incr); |
752df20e | 6823 | } |
6824 | } | |
6825 | \f | |
a52dfddb | 6826 | /* Return true if X is a dead register. */ |
9845d120 | 6827 | |
a52dfddb | 6828 | static inline int |
a51848dc | 6829 | is_dead_reg (const_rtx x, int *counts) |
9845d120 | 6830 | { |
9845d120 | 6831 | return (REG_P (x) |
6832 | && REGNO (x) >= FIRST_PSEUDO_REGISTER | |
6833 | && counts[REGNO (x)] == 0); | |
6834 | } | |
6835 | ||
6d866f03 | 6836 | /* Return true if set is live. */ |
6837 | static bool | |
47f1d198 | 6838 | set_live_p (rtx set, rtx_insn *insn ATTRIBUTE_UNUSED, /* Only used with HAVE_cc0. */ |
8ec3a57b | 6839 | int *counts) |
6d866f03 | 6840 | { |
9ed997be | 6841 | rtx_insn *tem; |
6d866f03 | 6842 | |
6843 | if (set_noop_p (set)) | |
6844 | ; | |
6845 | ||
6d866f03 | 6846 | else if (GET_CODE (SET_DEST (set)) == CC0 |
6847 | && !side_effects_p (SET_SRC (set)) | |
5542b661 | 6848 | && ((tem = next_nonnote_nondebug_insn (insn)) == NULL_RTX |
6d866f03 | 6849 | || !INSN_P (tem) |
6850 | || !reg_referenced_p (cc0_rtx, PATTERN (tem)))) | |
6851 | return false; | |
a52dfddb | 6852 | else if (!is_dead_reg (SET_DEST (set), counts) |
e8825bb0 | 6853 | || side_effects_p (SET_SRC (set))) |
6d866f03 | 6854 | return true; |
6855 | return false; | |
6856 | } | |
6857 | ||
6858 | /* Return true if insn is live. */ | |
6859 | ||
6860 | static bool | |
47f1d198 | 6861 | insn_live_p (rtx_insn *insn, int *counts) |
6d866f03 | 6862 | { |
6863 | int i; | |
bc0dfc8d | 6864 | if (!cfun->can_delete_dead_exceptions && !insn_nothrow_p (insn)) |
8ca56a3b | 6865 | return true; |
6866 | else if (GET_CODE (PATTERN (insn)) == SET) | |
6fc669ae | 6867 | return set_live_p (PATTERN (insn), insn, counts); |
6d866f03 | 6868 | else if (GET_CODE (PATTERN (insn)) == PARALLEL) |
6fc669ae | 6869 | { |
6870 | for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--) | |
6871 | { | |
6872 | rtx elt = XVECEXP (PATTERN (insn), 0, i); | |
6d866f03 | 6873 | |
6fc669ae | 6874 | if (GET_CODE (elt) == SET) |
6875 | { | |
6876 | if (set_live_p (elt, insn, counts)) | |
6877 | return true; | |
6878 | } | |
6879 | else if (GET_CODE (elt) != CLOBBER && GET_CODE (elt) != USE) | |
6880 | return true; | |
6881 | } | |
6882 | return false; | |
6883 | } | |
9845d120 | 6884 | else if (DEBUG_INSN_P (insn)) |
6885 | { | |
47f1d198 | 6886 | rtx_insn *next; |
9845d120 | 6887 | |
6888 | for (next = NEXT_INSN (insn); next; next = NEXT_INSN (next)) | |
6889 | if (NOTE_P (next)) | |
6890 | continue; | |
6891 | else if (!DEBUG_INSN_P (next)) | |
6892 | return true; | |
6893 | else if (INSN_VAR_LOCATION_DECL (insn) == INSN_VAR_LOCATION_DECL (next)) | |
6894 | return false; | |
6895 | ||
9845d120 | 6896 | return true; |
6897 | } | |
6d866f03 | 6898 | else |
6899 | return true; | |
6900 | } | |
6901 | ||
a52dfddb | 6902 | /* Count the number of stores into pseudo. Callback for note_stores. */ |
6903 | ||
6904 | static void | |
6905 | count_stores (rtx x, const_rtx set ATTRIBUTE_UNUSED, void *data) | |
6906 | { | |
6907 | int *counts = (int *) data; | |
6908 | if (REG_P (x) && REGNO (x) >= FIRST_PSEUDO_REGISTER) | |
6909 | counts[REGNO (x)]++; | |
6910 | } | |
6911 | ||
a51848dc | 6912 | /* Return if DEBUG_INSN pattern PAT needs to be reset because some dead |
6913 | pseudo doesn't have a replacement. COUNTS[X] is zero if register X | |
6914 | is dead and REPLACEMENTS[X] is null if it has no replacemenet. | |
6915 | Set *SEEN_REPL to true if we see a dead register that does have | |
6916 | a replacement. */ | |
a52dfddb | 6917 | |
a51848dc | 6918 | static bool |
6919 | is_dead_debug_insn (const_rtx pat, int *counts, rtx *replacements, | |
6920 | bool *seen_repl) | |
a52dfddb | 6921 | { |
a51848dc | 6922 | subrtx_iterator::array_type array; |
6923 | FOR_EACH_SUBRTX (iter, array, pat, NONCONST) | |
a52dfddb | 6924 | { |
a51848dc | 6925 | const_rtx x = *iter; |
6926 | if (is_dead_reg (x, counts)) | |
6927 | { | |
6928 | if (replacements && replacements[REGNO (x)] != NULL_RTX) | |
6929 | *seen_repl = true; | |
6930 | else | |
6931 | return true; | |
6932 | } | |
a52dfddb | 6933 | } |
a51848dc | 6934 | return false; |
a52dfddb | 6935 | } |
6936 | ||
6937 | /* Replace a dead pseudo in a DEBUG_INSN with replacement DEBUG_EXPR. | |
6938 | Callback for simplify_replace_fn_rtx. */ | |
6939 | ||
6940 | static rtx | |
6941 | replace_dead_reg (rtx x, const_rtx old_rtx ATTRIBUTE_UNUSED, void *data) | |
6942 | { | |
6943 | rtx *replacements = (rtx *) data; | |
6944 | ||
6945 | if (REG_P (x) | |
6946 | && REGNO (x) >= FIRST_PSEUDO_REGISTER | |
6947 | && replacements[REGNO (x)] != NULL_RTX) | |
6948 | { | |
6949 | if (GET_MODE (x) == GET_MODE (replacements[REGNO (x)])) | |
6950 | return replacements[REGNO (x)]; | |
6951 | return lowpart_subreg (GET_MODE (x), replacements[REGNO (x)], | |
6952 | GET_MODE (replacements[REGNO (x)])); | |
6953 | } | |
6954 | return NULL_RTX; | |
6955 | } | |
6956 | ||
752df20e | 6957 | /* Scan all the insns and delete any that are dead; i.e., they store a register |
6958 | that is never used or they copy a register to itself. | |
6959 | ||
33752533 | 6960 | This is used to remove insns made obviously dead by cse, loop or other |
6961 | optimizations. It improves the heuristics in loop since it won't try to | |
6962 | move dead invariants out of loops or make givs for dead quantities. The | |
6963 | remaining passes of the compilation are also sped up. */ | |
752df20e | 6964 | |
fb20d6fa | 6965 | int |
f2f648a3 | 6966 | delete_trivially_dead_insns (rtx_insn *insns, int nreg) |
752df20e | 6967 | { |
b9cf3f63 | 6968 | int *counts; |
f2f648a3 | 6969 | rtx_insn *insn, *prev; |
a52dfddb | 6970 | rtx *replacements = NULL; |
2aaf7099 | 6971 | int ndead = 0; |
752df20e | 6972 | |
fb20d6fa | 6973 | timevar_push (TV_DELETE_TRIVIALLY_DEAD); |
752df20e | 6974 | /* First count the number of times each register is used. */ |
a52dfddb | 6975 | if (MAY_HAVE_DEBUG_INSNS) |
6976 | { | |
6977 | counts = XCNEWVEC (int, nreg * 3); | |
6978 | for (insn = insns; insn; insn = NEXT_INSN (insn)) | |
6979 | if (DEBUG_INSN_P (insn)) | |
6980 | count_reg_usage (INSN_VAR_LOCATION_LOC (insn), counts + nreg, | |
6981 | NULL_RTX, 1); | |
6982 | else if (INSN_P (insn)) | |
6983 | { | |
6984 | count_reg_usage (insn, counts, NULL_RTX, 1); | |
6985 | note_stores (PATTERN (insn), count_stores, counts + nreg * 2); | |
6986 | } | |
6987 | /* If there can be debug insns, COUNTS are 3 consecutive arrays. | |
6988 | First one counts how many times each pseudo is used outside | |
6989 | of debug insns, second counts how many times each pseudo is | |
6990 | used in debug insns and third counts how many times a pseudo | |
6991 | is stored. */ | |
6992 | } | |
6993 | else | |
6994 | { | |
6995 | counts = XCNEWVEC (int, nreg); | |
6996 | for (insn = insns; insn; insn = NEXT_INSN (insn)) | |
6997 | if (INSN_P (insn)) | |
6998 | count_reg_usage (insn, counts, NULL_RTX, 1); | |
6999 | /* If no debug insns can be present, COUNTS is just an array | |
7000 | which counts how many times each pseudo is used. */ | |
7001 | } | |
0d1f9fde | 7002 | /* Pseudo PIC register should be considered as used due to possible |
7003 | new usages generated. */ | |
7004 | if (!reload_completed | |
7005 | && pic_offset_table_rtx | |
7006 | && REGNO (pic_offset_table_rtx) >= FIRST_PSEUDO_REGISTER) | |
7007 | counts[REGNO (pic_offset_table_rtx)]++; | |
2aaf7099 | 7008 | /* Go from the last insn to the first and delete insns that only set unused |
7009 | registers or copy a register to itself. As we delete an insn, remove | |
7010 | usage counts for registers it uses. | |
af21a202 | 7011 | |
2aaf7099 | 7012 | The first jump optimization pass may leave a real insn as the last |
7013 | insn in the function. We must not skip that insn or we may end | |
a52dfddb | 7014 | up deleting code that is not really dead. |
7015 | ||
7016 | If some otherwise unused register is only used in DEBUG_INSNs, | |
7017 | try to create a DEBUG_EXPR temporary and emit a DEBUG_INSN before | |
7018 | the setter. Then go through DEBUG_INSNs and if a DEBUG_EXPR | |
7019 | has been created for the unused register, replace it with | |
7020 | the DEBUG_EXPR, otherwise reset the DEBUG_INSN. */ | |
4ac6fa85 | 7021 | for (insn = get_last_insn (); insn; insn = prev) |
2aaf7099 | 7022 | { |
7023 | int live_insn = 0; | |
752df20e | 7024 | |
4ac6fa85 | 7025 | prev = PREV_INSN (insn); |
7026 | if (!INSN_P (insn)) | |
7027 | continue; | |
752df20e | 7028 | |
1e5b92fa | 7029 | live_insn = insn_live_p (insn, counts); |
752df20e | 7030 | |
2aaf7099 | 7031 | /* If this is a dead insn, delete it and show registers in it aren't |
7032 | being used. */ | |
752df20e | 7033 | |
3072d30e | 7034 | if (! live_insn && dbg_cnt (delete_trivial_dead)) |
2aaf7099 | 7035 | { |
a52dfddb | 7036 | if (DEBUG_INSN_P (insn)) |
7037 | count_reg_usage (INSN_VAR_LOCATION_LOC (insn), counts + nreg, | |
7038 | NULL_RTX, -1); | |
7039 | else | |
7040 | { | |
7041 | rtx set; | |
7042 | if (MAY_HAVE_DEBUG_INSNS | |
7043 | && (set = single_set (insn)) != NULL_RTX | |
7044 | && is_dead_reg (SET_DEST (set), counts) | |
7045 | /* Used at least once in some DEBUG_INSN. */ | |
7046 | && counts[REGNO (SET_DEST (set)) + nreg] > 0 | |
7047 | /* And set exactly once. */ | |
7048 | && counts[REGNO (SET_DEST (set)) + nreg * 2] == 1 | |
7049 | && !side_effects_p (SET_SRC (set)) | |
7050 | && asm_noperands (PATTERN (insn)) < 0) | |
7051 | { | |
e149ca56 | 7052 | rtx dval, bind_var_loc; |
7053 | rtx_insn *bind; | |
a52dfddb | 7054 | |
7055 | /* Create DEBUG_EXPR (and DEBUG_EXPR_DECL). */ | |
7056 | dval = make_debug_expr_from_rtl (SET_DEST (set)); | |
7057 | ||
7058 | /* Emit a debug bind insn before the insn in which | |
7059 | reg dies. */ | |
e149ca56 | 7060 | bind_var_loc = |
7061 | gen_rtx_VAR_LOCATION (GET_MODE (SET_DEST (set)), | |
7062 | DEBUG_EXPR_TREE_DECL (dval), | |
7063 | SET_SRC (set), | |
7064 | VAR_INIT_STATUS_INITIALIZED); | |
7065 | count_reg_usage (bind_var_loc, counts + nreg, NULL_RTX, 1); | |
7066 | ||
7067 | bind = emit_debug_insn_before (bind_var_loc, insn); | |
a52dfddb | 7068 | df_insn_rescan (bind); |
7069 | ||
7070 | if (replacements == NULL) | |
7071 | replacements = XCNEWVEC (rtx, nreg); | |
7072 | replacements[REGNO (SET_DEST (set))] = dval; | |
7073 | } | |
7074 | ||
7075 | count_reg_usage (insn, counts, NULL_RTX, -1); | |
7076 | ndead++; | |
7077 | } | |
2aaf7099 | 7078 | delete_insn_and_edges (insn); |
2aaf7099 | 7079 | } |
d4c5e26d | 7080 | } |
b9cf3f63 | 7081 | |
a52dfddb | 7082 | if (MAY_HAVE_DEBUG_INSNS) |
7083 | { | |
a52dfddb | 7084 | for (insn = get_last_insn (); insn; insn = PREV_INSN (insn)) |
7085 | if (DEBUG_INSN_P (insn)) | |
7086 | { | |
7087 | /* If this debug insn references a dead register that wasn't replaced | |
7088 | with an DEBUG_EXPR, reset the DEBUG_INSN. */ | |
a51848dc | 7089 | bool seen_repl = false; |
7090 | if (is_dead_debug_insn (INSN_VAR_LOCATION_LOC (insn), | |
7091 | counts, replacements, &seen_repl)) | |
a52dfddb | 7092 | { |
7093 | INSN_VAR_LOCATION_LOC (insn) = gen_rtx_UNKNOWN_VAR_LOC (); | |
7094 | df_insn_rescan (insn); | |
7095 | } | |
a51848dc | 7096 | else if (seen_repl) |
a52dfddb | 7097 | { |
7098 | INSN_VAR_LOCATION_LOC (insn) | |
7099 | = simplify_replace_fn_rtx (INSN_VAR_LOCATION_LOC (insn), | |
7100 | NULL_RTX, replace_dead_reg, | |
7101 | replacements); | |
7102 | df_insn_rescan (insn); | |
7103 | } | |
7104 | } | |
dd045aee | 7105 | free (replacements); |
a52dfddb | 7106 | } |
7107 | ||
450d042a | 7108 | if (dump_file && ndead) |
2aaf7099 | 7109 | fprintf (dump_file, "Deleted %i trivially dead insns\n", |
7110 | ndead); | |
b9cf3f63 | 7111 | /* Clean up. */ |
7112 | free (counts); | |
fb20d6fa | 7113 | timevar_pop (TV_DELETE_TRIVIALLY_DEAD); |
7114 | return ndead; | |
752df20e | 7115 | } |
124ac4e4 | 7116 | |
2342ac7b | 7117 | /* If LOC contains references to NEWREG in a different mode, change them |
7118 | to use NEWREG instead. */ | |
124ac4e4 | 7119 | |
2342ac7b | 7120 | static void |
7121 | cse_change_cc_mode (subrtx_ptr_iterator::array_type &array, | |
41805aed | 7122 | rtx *loc, rtx_insn *insn, rtx newreg) |
124ac4e4 | 7123 | { |
2342ac7b | 7124 | FOR_EACH_SUBRTX_PTR (iter, array, loc, NONCONST) |
124ac4e4 | 7125 | { |
2342ac7b | 7126 | rtx *loc = *iter; |
7127 | rtx x = *loc; | |
7128 | if (x | |
7129 | && REG_P (x) | |
7130 | && REGNO (x) == REGNO (newreg) | |
7131 | && GET_MODE (x) != GET_MODE (newreg)) | |
7132 | { | |
7133 | validate_change (insn, loc, newreg, 1); | |
7134 | iter.skip_subrtxes (); | |
7135 | } | |
124ac4e4 | 7136 | } |
124ac4e4 | 7137 | } |
7138 | ||
b866694e | 7139 | /* Change the mode of any reference to the register REGNO (NEWREG) to |
7140 | GET_MODE (NEWREG) in INSN. */ | |
7141 | ||
7142 | static void | |
47f1d198 | 7143 | cse_change_cc_mode_insn (rtx_insn *insn, rtx newreg) |
b866694e | 7144 | { |
b866694e | 7145 | int success; |
7146 | ||
7147 | if (!INSN_P (insn)) | |
7148 | return; | |
7149 | ||
2342ac7b | 7150 | subrtx_ptr_iterator::array_type array; |
7151 | cse_change_cc_mode (array, &PATTERN (insn), insn, newreg); | |
7152 | cse_change_cc_mode (array, ®_NOTES (insn), insn, newreg); | |
48e1416a | 7153 | |
b866694e | 7154 | /* If the following assertion was triggered, there is most probably |
7155 | something wrong with the cc_modes_compatible back end function. | |
7156 | CC modes only can be considered compatible if the insn - with the mode | |
7157 | replaced by any of the compatible modes - can still be recognized. */ | |
7158 | success = apply_change_group (); | |
7159 | gcc_assert (success); | |
7160 | } | |
7161 | ||
124ac4e4 | 7162 | /* Change the mode of any reference to the register REGNO (NEWREG) to |
7163 | GET_MODE (NEWREG), starting at START. Stop before END. Stop at | |
4362e8e0 | 7164 | any instruction which modifies NEWREG. */ |
124ac4e4 | 7165 | |
7166 | static void | |
47f1d198 | 7167 | cse_change_cc_mode_insns (rtx_insn *start, rtx_insn *end, rtx newreg) |
124ac4e4 | 7168 | { |
47f1d198 | 7169 | rtx_insn *insn; |
124ac4e4 | 7170 | |
7171 | for (insn = start; insn != end; insn = NEXT_INSN (insn)) | |
7172 | { | |
7173 | if (! INSN_P (insn)) | |
7174 | continue; | |
7175 | ||
4362e8e0 | 7176 | if (reg_set_p (newreg, insn)) |
124ac4e4 | 7177 | return; |
7178 | ||
b866694e | 7179 | cse_change_cc_mode_insn (insn, newreg); |
124ac4e4 | 7180 | } |
7181 | } | |
7182 | ||
7183 | /* BB is a basic block which finishes with CC_REG as a condition code | |
7184 | register which is set to CC_SRC. Look through the successors of BB | |
7185 | to find blocks which have a single predecessor (i.e., this one), | |
7186 | and look through those blocks for an assignment to CC_REG which is | |
7187 | equivalent to CC_SRC. CAN_CHANGE_MODE indicates whether we are | |
7188 | permitted to change the mode of CC_SRC to a compatible mode. This | |
7189 | returns VOIDmode if no equivalent assignments were found. | |
7190 | Otherwise it returns the mode which CC_SRC should wind up with. | |
650d2134 | 7191 | ORIG_BB should be the same as BB in the outermost cse_cc_succs call, |
7192 | but is passed unmodified down to recursive calls in order to prevent | |
7193 | endless recursion. | |
124ac4e4 | 7194 | |
7195 | The main complexity in this function is handling the mode issues. | |
7196 | We may have more than one duplicate which we can eliminate, and we | |
7197 | try to find a mode which will work for multiple duplicates. */ | |
7198 | ||
3754d046 | 7199 | static machine_mode |
650d2134 | 7200 | cse_cc_succs (basic_block bb, basic_block orig_bb, rtx cc_reg, rtx cc_src, |
7201 | bool can_change_mode) | |
124ac4e4 | 7202 | { |
7203 | bool found_equiv; | |
3754d046 | 7204 | machine_mode mode; |
124ac4e4 | 7205 | unsigned int insn_count; |
7206 | edge e; | |
47f1d198 | 7207 | rtx_insn *insns[2]; |
3754d046 | 7208 | machine_mode modes[2]; |
47f1d198 | 7209 | rtx_insn *last_insns[2]; |
124ac4e4 | 7210 | unsigned int i; |
7211 | rtx newreg; | |
cd665a06 | 7212 | edge_iterator ei; |
124ac4e4 | 7213 | |
7214 | /* We expect to have two successors. Look at both before picking | |
7215 | the final mode for the comparison. If we have more successors | |
7216 | (i.e., some sort of table jump, although that seems unlikely), | |
7217 | then we require all beyond the first two to use the same | |
7218 | mode. */ | |
7219 | ||
7220 | found_equiv = false; | |
7221 | mode = GET_MODE (cc_src); | |
7222 | insn_count = 0; | |
cd665a06 | 7223 | FOR_EACH_EDGE (e, ei, bb->succs) |
124ac4e4 | 7224 | { |
47f1d198 | 7225 | rtx_insn *insn; |
7226 | rtx_insn *end; | |
124ac4e4 | 7227 | |
7228 | if (e->flags & EDGE_COMPLEX) | |
7229 | continue; | |
7230 | ||
cd665a06 | 7231 | if (EDGE_COUNT (e->dest->preds) != 1 |
34154e27 | 7232 | || e->dest == EXIT_BLOCK_PTR_FOR_FN (cfun) |
650d2134 | 7233 | /* Avoid endless recursion on unreachable blocks. */ |
7234 | || e->dest == orig_bb) | |
124ac4e4 | 7235 | continue; |
7236 | ||
7237 | end = NEXT_INSN (BB_END (e->dest)); | |
7238 | for (insn = BB_HEAD (e->dest); insn != end; insn = NEXT_INSN (insn)) | |
7239 | { | |
7240 | rtx set; | |
7241 | ||
7242 | if (! INSN_P (insn)) | |
7243 | continue; | |
7244 | ||
7245 | /* If CC_SRC is modified, we have to stop looking for | |
7246 | something which uses it. */ | |
7247 | if (modified_in_p (cc_src, insn)) | |
7248 | break; | |
7249 | ||
7250 | /* Check whether INSN sets CC_REG to CC_SRC. */ | |
7251 | set = single_set (insn); | |
7252 | if (set | |
8ad4c111 | 7253 | && REG_P (SET_DEST (set)) |
124ac4e4 | 7254 | && REGNO (SET_DEST (set)) == REGNO (cc_reg)) |
7255 | { | |
7256 | bool found; | |
3754d046 | 7257 | machine_mode set_mode; |
7258 | machine_mode comp_mode; | |
124ac4e4 | 7259 | |
7260 | found = false; | |
7261 | set_mode = GET_MODE (SET_SRC (set)); | |
7262 | comp_mode = set_mode; | |
7263 | if (rtx_equal_p (cc_src, SET_SRC (set))) | |
7264 | found = true; | |
7265 | else if (GET_CODE (cc_src) == COMPARE | |
7266 | && GET_CODE (SET_SRC (set)) == COMPARE | |
960670fc | 7267 | && mode != set_mode |
124ac4e4 | 7268 | && rtx_equal_p (XEXP (cc_src, 0), |
7269 | XEXP (SET_SRC (set), 0)) | |
7270 | && rtx_equal_p (XEXP (cc_src, 1), | |
7271 | XEXP (SET_SRC (set), 1))) | |
48e1416a | 7272 | |
124ac4e4 | 7273 | { |
883b2e73 | 7274 | comp_mode = targetm.cc_modes_compatible (mode, set_mode); |
124ac4e4 | 7275 | if (comp_mode != VOIDmode |
7276 | && (can_change_mode || comp_mode == mode)) | |
7277 | found = true; | |
7278 | } | |
7279 | ||
7280 | if (found) | |
7281 | { | |
7282 | found_equiv = true; | |
960670fc | 7283 | if (insn_count < ARRAY_SIZE (insns)) |
124ac4e4 | 7284 | { |
7285 | insns[insn_count] = insn; | |
7286 | modes[insn_count] = set_mode; | |
7287 | last_insns[insn_count] = end; | |
7288 | ++insn_count; | |
7289 | ||
960670fc | 7290 | if (mode != comp_mode) |
7291 | { | |
cc636d56 | 7292 | gcc_assert (can_change_mode); |
960670fc | 7293 | mode = comp_mode; |
b866694e | 7294 | |
7295 | /* The modified insn will be re-recognized later. */ | |
960670fc | 7296 | PUT_MODE (cc_src, mode); |
7297 | } | |
124ac4e4 | 7298 | } |
7299 | else | |
7300 | { | |
7301 | if (set_mode != mode) | |
960670fc | 7302 | { |
7303 | /* We found a matching expression in the | |
7304 | wrong mode, but we don't have room to | |
7305 | store it in the array. Punt. This case | |
7306 | should be rare. */ | |
7307 | break; | |
7308 | } | |
124ac4e4 | 7309 | /* INSN sets CC_REG to a value equal to CC_SRC |
7310 | with the right mode. We can simply delete | |
7311 | it. */ | |
7312 | delete_insn (insn); | |
7313 | } | |
7314 | ||
7315 | /* We found an instruction to delete. Keep looking, | |
7316 | in the hopes of finding a three-way jump. */ | |
7317 | continue; | |
7318 | } | |
7319 | ||
7320 | /* We found an instruction which sets the condition | |
7321 | code, so don't look any farther. */ | |
7322 | break; | |
7323 | } | |
7324 | ||
7325 | /* If INSN sets CC_REG in some other way, don't look any | |
7326 | farther. */ | |
7327 | if (reg_set_p (cc_reg, insn)) | |
7328 | break; | |
7329 | } | |
7330 | ||
7331 | /* If we fell off the bottom of the block, we can keep looking | |
7332 | through successors. We pass CAN_CHANGE_MODE as false because | |
7333 | we aren't prepared to handle compatibility between the | |
7334 | further blocks and this block. */ | |
7335 | if (insn == end) | |
7336 | { | |
3754d046 | 7337 | machine_mode submode; |
960670fc | 7338 | |
650d2134 | 7339 | submode = cse_cc_succs (e->dest, orig_bb, cc_reg, cc_src, false); |
960670fc | 7340 | if (submode != VOIDmode) |
7341 | { | |
cc636d56 | 7342 | gcc_assert (submode == mode); |
960670fc | 7343 | found_equiv = true; |
7344 | can_change_mode = false; | |
7345 | } | |
124ac4e4 | 7346 | } |
7347 | } | |
7348 | ||
7349 | if (! found_equiv) | |
7350 | return VOIDmode; | |
7351 | ||
7352 | /* Now INSN_COUNT is the number of instructions we found which set | |
7353 | CC_REG to a value equivalent to CC_SRC. The instructions are in | |
7354 | INSNS. The modes used by those instructions are in MODES. */ | |
7355 | ||
7356 | newreg = NULL_RTX; | |
7357 | for (i = 0; i < insn_count; ++i) | |
7358 | { | |
7359 | if (modes[i] != mode) | |
7360 | { | |
7361 | /* We need to change the mode of CC_REG in INSNS[i] and | |
7362 | subsequent instructions. */ | |
7363 | if (! newreg) | |
7364 | { | |
7365 | if (GET_MODE (cc_reg) == mode) | |
7366 | newreg = cc_reg; | |
7367 | else | |
7368 | newreg = gen_rtx_REG (mode, REGNO (cc_reg)); | |
7369 | } | |
7370 | cse_change_cc_mode_insns (NEXT_INSN (insns[i]), last_insns[i], | |
7371 | newreg); | |
7372 | } | |
7373 | ||
8ecc497a | 7374 | delete_insn_and_edges (insns[i]); |
124ac4e4 | 7375 | } |
7376 | ||
7377 | return mode; | |
7378 | } | |
7379 | ||
7380 | /* If we have a fixed condition code register (or two), walk through | |
7381 | the instructions and try to eliminate duplicate assignments. */ | |
7382 | ||
66c2c707 | 7383 | static void |
124ac4e4 | 7384 | cse_condition_code_reg (void) |
7385 | { | |
7386 | unsigned int cc_regno_1; | |
7387 | unsigned int cc_regno_2; | |
7388 | rtx cc_reg_1; | |
7389 | rtx cc_reg_2; | |
7390 | basic_block bb; | |
7391 | ||
883b2e73 | 7392 | if (! targetm.fixed_condition_code_regs (&cc_regno_1, &cc_regno_2)) |
124ac4e4 | 7393 | return; |
7394 | ||
7395 | cc_reg_1 = gen_rtx_REG (CCmode, cc_regno_1); | |
7396 | if (cc_regno_2 != INVALID_REGNUM) | |
7397 | cc_reg_2 = gen_rtx_REG (CCmode, cc_regno_2); | |
7398 | else | |
7399 | cc_reg_2 = NULL_RTX; | |
7400 | ||
fc00614f | 7401 | FOR_EACH_BB_FN (bb, cfun) |
124ac4e4 | 7402 | { |
47f1d198 | 7403 | rtx_insn *last_insn; |
124ac4e4 | 7404 | rtx cc_reg; |
47f1d198 | 7405 | rtx_insn *insn; |
7406 | rtx_insn *cc_src_insn; | |
124ac4e4 | 7407 | rtx cc_src; |
3754d046 | 7408 | machine_mode mode; |
7409 | machine_mode orig_mode; | |
124ac4e4 | 7410 | |
7411 | /* Look for blocks which end with a conditional jump based on a | |
7412 | condition code register. Then look for the instruction which | |
7413 | sets the condition code register. Then look through the | |
7414 | successor blocks for instructions which set the condition | |
7415 | code register to the same value. There are other possible | |
7416 | uses of the condition code register, but these are by far the | |
7417 | most common and the ones which we are most likely to be able | |
7418 | to optimize. */ | |
7419 | ||
7420 | last_insn = BB_END (bb); | |
6d7dc5b9 | 7421 | if (!JUMP_P (last_insn)) |
124ac4e4 | 7422 | continue; |
7423 | ||
7424 | if (reg_referenced_p (cc_reg_1, PATTERN (last_insn))) | |
7425 | cc_reg = cc_reg_1; | |
7426 | else if (cc_reg_2 && reg_referenced_p (cc_reg_2, PATTERN (last_insn))) | |
7427 | cc_reg = cc_reg_2; | |
7428 | else | |
7429 | continue; | |
7430 | ||
47f1d198 | 7431 | cc_src_insn = NULL; |
124ac4e4 | 7432 | cc_src = NULL_RTX; |
7433 | for (insn = PREV_INSN (last_insn); | |
7434 | insn && insn != PREV_INSN (BB_HEAD (bb)); | |
7435 | insn = PREV_INSN (insn)) | |
7436 | { | |
7437 | rtx set; | |
7438 | ||
7439 | if (! INSN_P (insn)) | |
7440 | continue; | |
7441 | set = single_set (insn); | |
7442 | if (set | |
8ad4c111 | 7443 | && REG_P (SET_DEST (set)) |
124ac4e4 | 7444 | && REGNO (SET_DEST (set)) == REGNO (cc_reg)) |
7445 | { | |
7446 | cc_src_insn = insn; | |
7447 | cc_src = SET_SRC (set); | |
7448 | break; | |
7449 | } | |
7450 | else if (reg_set_p (cc_reg, insn)) | |
7451 | break; | |
7452 | } | |
7453 | ||
7454 | if (! cc_src_insn) | |
7455 | continue; | |
7456 | ||
7457 | if (modified_between_p (cc_src, cc_src_insn, NEXT_INSN (last_insn))) | |
7458 | continue; | |
7459 | ||
7460 | /* Now CC_REG is a condition code register used for a | |
7461 | conditional jump at the end of the block, and CC_SRC, in | |
7462 | CC_SRC_INSN, is the value to which that condition code | |
7463 | register is set, and CC_SRC is still meaningful at the end of | |
7464 | the basic block. */ | |
7465 | ||
960670fc | 7466 | orig_mode = GET_MODE (cc_src); |
650d2134 | 7467 | mode = cse_cc_succs (bb, bb, cc_reg, cc_src, true); |
960670fc | 7468 | if (mode != VOIDmode) |
124ac4e4 | 7469 | { |
cc636d56 | 7470 | gcc_assert (mode == GET_MODE (cc_src)); |
960670fc | 7471 | if (mode != orig_mode) |
4362e8e0 | 7472 | { |
7473 | rtx newreg = gen_rtx_REG (mode, REGNO (cc_reg)); | |
7474 | ||
b866694e | 7475 | cse_change_cc_mode_insn (cc_src_insn, newreg); |
4362e8e0 | 7476 | |
7477 | /* Do the same in the following insns that use the | |
7478 | current value of CC_REG within BB. */ | |
7479 | cse_change_cc_mode_insns (NEXT_INSN (cc_src_insn), | |
7480 | NEXT_INSN (last_insn), | |
7481 | newreg); | |
7482 | } | |
124ac4e4 | 7483 | } |
7484 | } | |
7485 | } | |
77fce4cd | 7486 | \f |
7487 | ||
7488 | /* Perform common subexpression elimination. Nonzero value from | |
7489 | `cse_main' means that jumps were simplified and some code may now | |
7490 | be unreachable, so do jump optimization again. */ | |
2a1990e9 | 7491 | static unsigned int |
77fce4cd | 7492 | rest_of_handle_cse (void) |
7493 | { | |
7494 | int tem; | |
3072d30e | 7495 | |
77fce4cd | 7496 | if (dump_file) |
562d71e8 | 7497 | dump_flow_info (dump_file, dump_flags); |
77fce4cd | 7498 | |
3f5be5f4 | 7499 | tem = cse_main (get_insns (), max_reg_num ()); |
77fce4cd | 7500 | |
7501 | /* If we are not running more CSE passes, then we are no longer | |
7502 | expecting CSE to be run. But always rerun it in a cheap mode. */ | |
7503 | cse_not_expected = !flag_rerun_cse_after_loop && !flag_gcse; | |
7504 | ||
283a6b26 | 7505 | if (tem == 2) |
7506 | { | |
7507 | timevar_push (TV_JUMP); | |
7508 | rebuild_jump_labels (get_insns ()); | |
79f958cb | 7509 | cleanup_cfg (CLEANUP_CFG_CHANGED); |
283a6b26 | 7510 | timevar_pop (TV_JUMP); |
7511 | } | |
7512 | else if (tem == 1 || optimize > 1) | |
3072d30e | 7513 | cleanup_cfg (0); |
be22716f | 7514 | |
2a1990e9 | 7515 | return 0; |
77fce4cd | 7516 | } |
7517 | ||
cbe8bda8 | 7518 | namespace { |
7519 | ||
7520 | const pass_data pass_data_cse = | |
77fce4cd | 7521 | { |
cbe8bda8 | 7522 | RTL_PASS, /* type */ |
7523 | "cse1", /* name */ | |
7524 | OPTGROUP_NONE, /* optinfo_flags */ | |
cbe8bda8 | 7525 | TV_CSE, /* tv_id */ |
7526 | 0, /* properties_required */ | |
7527 | 0, /* properties_provided */ | |
7528 | 0, /* properties_destroyed */ | |
7529 | 0, /* todo_flags_start */ | |
8b88439e | 7530 | TODO_df_finish, /* todo_flags_finish */ |
77fce4cd | 7531 | }; |
7532 | ||
cbe8bda8 | 7533 | class pass_cse : public rtl_opt_pass |
7534 | { | |
7535 | public: | |
9af5ce0c | 7536 | pass_cse (gcc::context *ctxt) |
7537 | : rtl_opt_pass (pass_data_cse, ctxt) | |
cbe8bda8 | 7538 | {} |
7539 | ||
7540 | /* opt_pass methods: */ | |
31315c24 | 7541 | virtual bool gate (function *) { return optimize > 0; } |
65b0537f | 7542 | virtual unsigned int execute (function *) { return rest_of_handle_cse (); } |
cbe8bda8 | 7543 | |
7544 | }; // class pass_cse | |
7545 | ||
7546 | } // anon namespace | |
7547 | ||
7548 | rtl_opt_pass * | |
7549 | make_pass_cse (gcc::context *ctxt) | |
7550 | { | |
7551 | return new pass_cse (ctxt); | |
7552 | } | |
7553 | ||
77fce4cd | 7554 | |
77fce4cd | 7555 | /* Run second CSE pass after loop optimizations. */ |
2a1990e9 | 7556 | static unsigned int |
77fce4cd | 7557 | rest_of_handle_cse2 (void) |
7558 | { | |
7559 | int tem; | |
7560 | ||
7561 | if (dump_file) | |
562d71e8 | 7562 | dump_flow_info (dump_file, dump_flags); |
77fce4cd | 7563 | |
3f5be5f4 | 7564 | tem = cse_main (get_insns (), max_reg_num ()); |
77fce4cd | 7565 | |
7566 | /* Run a pass to eliminate duplicated assignments to condition code | |
7567 | registers. We have to run this after bypass_jumps, because it | |
7568 | makes it harder for that pass to determine whether a jump can be | |
7569 | bypassed safely. */ | |
7570 | cse_condition_code_reg (); | |
7571 | ||
77fce4cd | 7572 | delete_trivially_dead_insns (get_insns (), max_reg_num ()); |
7573 | ||
283a6b26 | 7574 | if (tem == 2) |
77fce4cd | 7575 | { |
7576 | timevar_push (TV_JUMP); | |
7577 | rebuild_jump_labels (get_insns ()); | |
79f958cb | 7578 | cleanup_cfg (CLEANUP_CFG_CHANGED); |
77fce4cd | 7579 | timevar_pop (TV_JUMP); |
7580 | } | |
283a6b26 | 7581 | else if (tem == 1) |
7582 | cleanup_cfg (0); | |
7583 | ||
77fce4cd | 7584 | cse_not_expected = 1; |
2a1990e9 | 7585 | return 0; |
77fce4cd | 7586 | } |
7587 | ||
7588 | ||
cbe8bda8 | 7589 | namespace { |
7590 | ||
7591 | const pass_data pass_data_cse2 = | |
77fce4cd | 7592 | { |
cbe8bda8 | 7593 | RTL_PASS, /* type */ |
7594 | "cse2", /* name */ | |
7595 | OPTGROUP_NONE, /* optinfo_flags */ | |
cbe8bda8 | 7596 | TV_CSE2, /* tv_id */ |
7597 | 0, /* properties_required */ | |
7598 | 0, /* properties_provided */ | |
7599 | 0, /* properties_destroyed */ | |
7600 | 0, /* todo_flags_start */ | |
8b88439e | 7601 | TODO_df_finish, /* todo_flags_finish */ |
77fce4cd | 7602 | }; |
d743aba2 | 7603 | |
cbe8bda8 | 7604 | class pass_cse2 : public rtl_opt_pass |
7605 | { | |
7606 | public: | |
9af5ce0c | 7607 | pass_cse2 (gcc::context *ctxt) |
7608 | : rtl_opt_pass (pass_data_cse2, ctxt) | |
cbe8bda8 | 7609 | {} |
7610 | ||
7611 | /* opt_pass methods: */ | |
31315c24 | 7612 | virtual bool gate (function *) |
7613 | { | |
7614 | return optimize > 0 && flag_rerun_cse_after_loop; | |
7615 | } | |
7616 | ||
65b0537f | 7617 | virtual unsigned int execute (function *) { return rest_of_handle_cse2 (); } |
cbe8bda8 | 7618 | |
7619 | }; // class pass_cse2 | |
7620 | ||
7621 | } // anon namespace | |
7622 | ||
7623 | rtl_opt_pass * | |
7624 | make_pass_cse2 (gcc::context *ctxt) | |
7625 | { | |
7626 | return new pass_cse2 (ctxt); | |
7627 | } | |
7628 | ||
d743aba2 | 7629 | /* Run second CSE pass after loop optimizations. */ |
7630 | static unsigned int | |
7631 | rest_of_handle_cse_after_global_opts (void) | |
7632 | { | |
7633 | int save_cfj; | |
7634 | int tem; | |
7635 | ||
7636 | /* We only want to do local CSE, so don't follow jumps. */ | |
7637 | save_cfj = flag_cse_follow_jumps; | |
7638 | flag_cse_follow_jumps = 0; | |
7639 | ||
7640 | rebuild_jump_labels (get_insns ()); | |
7641 | tem = cse_main (get_insns (), max_reg_num ()); | |
7642 | purge_all_dead_edges (); | |
7643 | delete_trivially_dead_insns (get_insns (), max_reg_num ()); | |
7644 | ||
7645 | cse_not_expected = !flag_rerun_cse_after_loop; | |
7646 | ||
7647 | /* If cse altered any jumps, rerun jump opts to clean things up. */ | |
7648 | if (tem == 2) | |
7649 | { | |
7650 | timevar_push (TV_JUMP); | |
7651 | rebuild_jump_labels (get_insns ()); | |
79f958cb | 7652 | cleanup_cfg (CLEANUP_CFG_CHANGED); |
d743aba2 | 7653 | timevar_pop (TV_JUMP); |
7654 | } | |
7655 | else if (tem == 1) | |
7656 | cleanup_cfg (0); | |
7657 | ||
7658 | flag_cse_follow_jumps = save_cfj; | |
7659 | return 0; | |
7660 | } | |
7661 | ||
cbe8bda8 | 7662 | namespace { |
7663 | ||
7664 | const pass_data pass_data_cse_after_global_opts = | |
d743aba2 | 7665 | { |
cbe8bda8 | 7666 | RTL_PASS, /* type */ |
7667 | "cse_local", /* name */ | |
7668 | OPTGROUP_NONE, /* optinfo_flags */ | |
cbe8bda8 | 7669 | TV_CSE, /* tv_id */ |
7670 | 0, /* properties_required */ | |
7671 | 0, /* properties_provided */ | |
7672 | 0, /* properties_destroyed */ | |
7673 | 0, /* todo_flags_start */ | |
8b88439e | 7674 | TODO_df_finish, /* todo_flags_finish */ |
d743aba2 | 7675 | }; |
cbe8bda8 | 7676 | |
7677 | class pass_cse_after_global_opts : public rtl_opt_pass | |
7678 | { | |
7679 | public: | |
9af5ce0c | 7680 | pass_cse_after_global_opts (gcc::context *ctxt) |
7681 | : rtl_opt_pass (pass_data_cse_after_global_opts, ctxt) | |
cbe8bda8 | 7682 | {} |
7683 | ||
7684 | /* opt_pass methods: */ | |
31315c24 | 7685 | virtual bool gate (function *) |
7686 | { | |
7687 | return optimize > 0 && flag_rerun_cse_after_global_opts; | |
7688 | } | |
7689 | ||
65b0537f | 7690 | virtual unsigned int execute (function *) |
7691 | { | |
7692 | return rest_of_handle_cse_after_global_opts (); | |
7693 | } | |
cbe8bda8 | 7694 | |
7695 | }; // class pass_cse_after_global_opts | |
7696 | ||
7697 | } // anon namespace | |
7698 | ||
7699 | rtl_opt_pass * | |
7700 | make_pass_cse_after_global_opts (gcc::context *ctxt) | |
7701 | { | |
7702 | return new pass_cse_after_global_opts (ctxt); | |
7703 | } |