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7afe21cc | 1 | /* Common subexpression elimination for GNU compiler. |
64812ded | 2 | Copyright (C) 1987, 88, 89, 92, 93, 1994 Free Software Foundation, Inc. |
7afe21cc RK |
3 | |
4 | This file is part of GNU CC. | |
5 | ||
6 | GNU CC is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 2, or (at your option) | |
9 | any later version. | |
10 | ||
11 | GNU CC is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with GNU CC; see the file COPYING. If not, write to | |
18 | the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ | |
19 | ||
20 | ||
21 | #include "config.h" | |
9c3b4c8b RS |
22 | /* Must precede rtl.h for FFS. */ |
23 | #include <stdio.h> | |
24 | ||
7afe21cc RK |
25 | #include "rtl.h" |
26 | #include "regs.h" | |
27 | #include "hard-reg-set.h" | |
28 | #include "flags.h" | |
29 | #include "real.h" | |
30 | #include "insn-config.h" | |
31 | #include "recog.h" | |
32 | ||
7afe21cc RK |
33 | #include <setjmp.h> |
34 | ||
35 | /* The basic idea of common subexpression elimination is to go | |
36 | through the code, keeping a record of expressions that would | |
37 | have the same value at the current scan point, and replacing | |
38 | expressions encountered with the cheapest equivalent expression. | |
39 | ||
40 | It is too complicated to keep track of the different possibilities | |
41 | when control paths merge; so, at each label, we forget all that is | |
42 | known and start fresh. This can be described as processing each | |
43 | basic block separately. Note, however, that these are not quite | |
44 | the same as the basic blocks found by a later pass and used for | |
45 | data flow analysis and register packing. We do not need to start fresh | |
46 | after a conditional jump instruction if there is no label there. | |
47 | ||
48 | We use two data structures to record the equivalent expressions: | |
49 | a hash table for most expressions, and several vectors together | |
50 | with "quantity numbers" to record equivalent (pseudo) registers. | |
51 | ||
52 | The use of the special data structure for registers is desirable | |
53 | because it is faster. It is possible because registers references | |
54 | contain a fairly small number, the register number, taken from | |
55 | a contiguously allocated series, and two register references are | |
56 | identical if they have the same number. General expressions | |
57 | do not have any such thing, so the only way to retrieve the | |
58 | information recorded on an expression other than a register | |
59 | is to keep it in a hash table. | |
60 | ||
61 | Registers and "quantity numbers": | |
62 | ||
63 | At the start of each basic block, all of the (hardware and pseudo) | |
64 | registers used in the function are given distinct quantity | |
65 | numbers to indicate their contents. During scan, when the code | |
66 | copies one register into another, we copy the quantity number. | |
67 | When a register is loaded in any other way, we allocate a new | |
68 | quantity number to describe the value generated by this operation. | |
69 | `reg_qty' records what quantity a register is currently thought | |
70 | of as containing. | |
71 | ||
72 | All real quantity numbers are greater than or equal to `max_reg'. | |
73 | If register N has not been assigned a quantity, reg_qty[N] will equal N. | |
74 | ||
75 | Quantity numbers below `max_reg' do not exist and none of the `qty_...' | |
76 | variables should be referenced with an index below `max_reg'. | |
77 | ||
78 | We also maintain a bidirectional chain of registers for each | |
79 | quantity number. `qty_first_reg', `qty_last_reg', | |
80 | `reg_next_eqv' and `reg_prev_eqv' hold these chains. | |
81 | ||
82 | The first register in a chain is the one whose lifespan is least local. | |
83 | Among equals, it is the one that was seen first. | |
84 | We replace any equivalent register with that one. | |
85 | ||
86 | If two registers have the same quantity number, it must be true that | |
87 | REG expressions with `qty_mode' must be in the hash table for both | |
88 | registers and must be in the same class. | |
89 | ||
90 | The converse is not true. Since hard registers may be referenced in | |
91 | any mode, two REG expressions might be equivalent in the hash table | |
92 | but not have the same quantity number if the quantity number of one | |
93 | of the registers is not the same mode as those expressions. | |
94 | ||
95 | Constants and quantity numbers | |
96 | ||
97 | When a quantity has a known constant value, that value is stored | |
98 | in the appropriate element of qty_const. This is in addition to | |
99 | putting the constant in the hash table as is usual for non-regs. | |
100 | ||
d45cf215 | 101 | Whether a reg or a constant is preferred is determined by the configuration |
7afe21cc RK |
102 | macro CONST_COSTS and will often depend on the constant value. In any |
103 | event, expressions containing constants can be simplified, by fold_rtx. | |
104 | ||
105 | When a quantity has a known nearly constant value (such as an address | |
106 | of a stack slot), that value is stored in the appropriate element | |
107 | of qty_const. | |
108 | ||
109 | Integer constants don't have a machine mode. However, cse | |
110 | determines the intended machine mode from the destination | |
111 | of the instruction that moves the constant. The machine mode | |
112 | is recorded in the hash table along with the actual RTL | |
113 | constant expression so that different modes are kept separate. | |
114 | ||
115 | Other expressions: | |
116 | ||
117 | To record known equivalences among expressions in general | |
118 | we use a hash table called `table'. It has a fixed number of buckets | |
119 | that contain chains of `struct table_elt' elements for expressions. | |
120 | These chains connect the elements whose expressions have the same | |
121 | hash codes. | |
122 | ||
123 | Other chains through the same elements connect the elements which | |
124 | currently have equivalent values. | |
125 | ||
126 | Register references in an expression are canonicalized before hashing | |
127 | the expression. This is done using `reg_qty' and `qty_first_reg'. | |
128 | The hash code of a register reference is computed using the quantity | |
129 | number, not the register number. | |
130 | ||
131 | When the value of an expression changes, it is necessary to remove from the | |
132 | hash table not just that expression but all expressions whose values | |
133 | could be different as a result. | |
134 | ||
135 | 1. If the value changing is in memory, except in special cases | |
136 | ANYTHING referring to memory could be changed. That is because | |
137 | nobody knows where a pointer does not point. | |
138 | The function `invalidate_memory' removes what is necessary. | |
139 | ||
140 | The special cases are when the address is constant or is | |
141 | a constant plus a fixed register such as the frame pointer | |
142 | or a static chain pointer. When such addresses are stored in, | |
143 | we can tell exactly which other such addresses must be invalidated | |
144 | due to overlap. `invalidate' does this. | |
145 | All expressions that refer to non-constant | |
146 | memory addresses are also invalidated. `invalidate_memory' does this. | |
147 | ||
148 | 2. If the value changing is a register, all expressions | |
149 | containing references to that register, and only those, | |
150 | must be removed. | |
151 | ||
152 | Because searching the entire hash table for expressions that contain | |
153 | a register is very slow, we try to figure out when it isn't necessary. | |
154 | Precisely, this is necessary only when expressions have been | |
155 | entered in the hash table using this register, and then the value has | |
156 | changed, and then another expression wants to be added to refer to | |
157 | the register's new value. This sequence of circumstances is rare | |
158 | within any one basic block. | |
159 | ||
160 | The vectors `reg_tick' and `reg_in_table' are used to detect this case. | |
161 | reg_tick[i] is incremented whenever a value is stored in register i. | |
162 | reg_in_table[i] holds -1 if no references to register i have been | |
163 | entered in the table; otherwise, it contains the value reg_tick[i] had | |
164 | when the references were entered. If we want to enter a reference | |
165 | and reg_in_table[i] != reg_tick[i], we must scan and remove old references. | |
166 | Until we want to enter a new entry, the mere fact that the two vectors | |
167 | don't match makes the entries be ignored if anyone tries to match them. | |
168 | ||
169 | Registers themselves are entered in the hash table as well as in | |
170 | the equivalent-register chains. However, the vectors `reg_tick' | |
171 | and `reg_in_table' do not apply to expressions which are simple | |
172 | register references. These expressions are removed from the table | |
173 | immediately when they become invalid, and this can be done even if | |
174 | we do not immediately search for all the expressions that refer to | |
175 | the register. | |
176 | ||
177 | A CLOBBER rtx in an instruction invalidates its operand for further | |
178 | reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK | |
179 | invalidates everything that resides in memory. | |
180 | ||
181 | Related expressions: | |
182 | ||
183 | Constant expressions that differ only by an additive integer | |
184 | are called related. When a constant expression is put in | |
185 | the table, the related expression with no constant term | |
186 | is also entered. These are made to point at each other | |
187 | so that it is possible to find out if there exists any | |
188 | register equivalent to an expression related to a given expression. */ | |
189 | ||
190 | /* One plus largest register number used in this function. */ | |
191 | ||
192 | static int max_reg; | |
193 | ||
194 | /* Length of vectors indexed by quantity number. | |
195 | We know in advance we will not need a quantity number this big. */ | |
196 | ||
197 | static int max_qty; | |
198 | ||
199 | /* Next quantity number to be allocated. | |
200 | This is 1 + the largest number needed so far. */ | |
201 | ||
202 | static int next_qty; | |
203 | ||
204 | /* Indexed by quantity number, gives the first (or last) (pseudo) register | |
205 | in the chain of registers that currently contain this quantity. */ | |
206 | ||
207 | static int *qty_first_reg; | |
208 | static int *qty_last_reg; | |
209 | ||
210 | /* Index by quantity number, gives the mode of the quantity. */ | |
211 | ||
212 | static enum machine_mode *qty_mode; | |
213 | ||
214 | /* Indexed by quantity number, gives the rtx of the constant value of the | |
215 | quantity, or zero if it does not have a known value. | |
216 | A sum of the frame pointer (or arg pointer) plus a constant | |
217 | can also be entered here. */ | |
218 | ||
219 | static rtx *qty_const; | |
220 | ||
221 | /* Indexed by qty number, gives the insn that stored the constant value | |
222 | recorded in `qty_const'. */ | |
223 | ||
224 | static rtx *qty_const_insn; | |
225 | ||
226 | /* The next three variables are used to track when a comparison between a | |
227 | quantity and some constant or register has been passed. In that case, we | |
228 | know the results of the comparison in case we see it again. These variables | |
229 | record a comparison that is known to be true. */ | |
230 | ||
231 | /* Indexed by qty number, gives the rtx code of a comparison with a known | |
232 | result involving this quantity. If none, it is UNKNOWN. */ | |
233 | static enum rtx_code *qty_comparison_code; | |
234 | ||
235 | /* Indexed by qty number, gives the constant being compared against in a | |
236 | comparison of known result. If no such comparison, it is undefined. | |
237 | If the comparison is not with a constant, it is zero. */ | |
238 | ||
239 | static rtx *qty_comparison_const; | |
240 | ||
241 | /* Indexed by qty number, gives the quantity being compared against in a | |
242 | comparison of known result. If no such comparison, if it undefined. | |
243 | If the comparison is not with a register, it is -1. */ | |
244 | ||
245 | static int *qty_comparison_qty; | |
246 | ||
247 | #ifdef HAVE_cc0 | |
248 | /* For machines that have a CC0, we do not record its value in the hash | |
249 | table since its use is guaranteed to be the insn immediately following | |
250 | its definition and any other insn is presumed to invalidate it. | |
251 | ||
252 | Instead, we store below the value last assigned to CC0. If it should | |
253 | happen to be a constant, it is stored in preference to the actual | |
254 | assigned value. In case it is a constant, we store the mode in which | |
255 | the constant should be interpreted. */ | |
256 | ||
257 | static rtx prev_insn_cc0; | |
258 | static enum machine_mode prev_insn_cc0_mode; | |
259 | #endif | |
260 | ||
261 | /* Previous actual insn. 0 if at first insn of basic block. */ | |
262 | ||
263 | static rtx prev_insn; | |
264 | ||
265 | /* Insn being scanned. */ | |
266 | ||
267 | static rtx this_insn; | |
268 | ||
269 | /* Index by (pseudo) register number, gives the quantity number | |
270 | of the register's current contents. */ | |
271 | ||
272 | static int *reg_qty; | |
273 | ||
274 | /* Index by (pseudo) register number, gives the number of the next (or | |
275 | previous) (pseudo) register in the chain of registers sharing the same | |
276 | value. | |
277 | ||
278 | Or -1 if this register is at the end of the chain. | |
279 | ||
280 | If reg_qty[N] == N, reg_next_eqv[N] is undefined. */ | |
281 | ||
282 | static int *reg_next_eqv; | |
283 | static int *reg_prev_eqv; | |
284 | ||
285 | /* Index by (pseudo) register number, gives the number of times | |
286 | that register has been altered in the current basic block. */ | |
287 | ||
288 | static int *reg_tick; | |
289 | ||
290 | /* Index by (pseudo) register number, gives the reg_tick value at which | |
291 | rtx's containing this register are valid in the hash table. | |
292 | If this does not equal the current reg_tick value, such expressions | |
293 | existing in the hash table are invalid. | |
294 | If this is -1, no expressions containing this register have been | |
295 | entered in the table. */ | |
296 | ||
297 | static int *reg_in_table; | |
298 | ||
299 | /* A HARD_REG_SET containing all the hard registers for which there is | |
300 | currently a REG expression in the hash table. Note the difference | |
301 | from the above variables, which indicate if the REG is mentioned in some | |
302 | expression in the table. */ | |
303 | ||
304 | static HARD_REG_SET hard_regs_in_table; | |
305 | ||
306 | /* A HARD_REG_SET containing all the hard registers that are invalidated | |
307 | by a CALL_INSN. */ | |
308 | ||
309 | static HARD_REG_SET regs_invalidated_by_call; | |
310 | ||
311 | /* Two vectors of ints: | |
312 | one containing max_reg -1's; the other max_reg + 500 (an approximation | |
313 | for max_qty) elements where element i contains i. | |
314 | These are used to initialize various other vectors fast. */ | |
315 | ||
316 | static int *all_minus_one; | |
317 | static int *consec_ints; | |
318 | ||
319 | /* CUID of insn that starts the basic block currently being cse-processed. */ | |
320 | ||
321 | static int cse_basic_block_start; | |
322 | ||
323 | /* CUID of insn that ends the basic block currently being cse-processed. */ | |
324 | ||
325 | static int cse_basic_block_end; | |
326 | ||
327 | /* Vector mapping INSN_UIDs to cuids. | |
d45cf215 | 328 | The cuids are like uids but increase monotonically always. |
7afe21cc RK |
329 | We use them to see whether a reg is used outside a given basic block. */ |
330 | ||
906c4e36 | 331 | static int *uid_cuid; |
7afe21cc | 332 | |
164c8956 RK |
333 | /* Highest UID in UID_CUID. */ |
334 | static int max_uid; | |
335 | ||
7afe21cc RK |
336 | /* Get the cuid of an insn. */ |
337 | ||
338 | #define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)]) | |
339 | ||
340 | /* Nonzero if cse has altered conditional jump insns | |
341 | in such a way that jump optimization should be redone. */ | |
342 | ||
343 | static int cse_jumps_altered; | |
344 | ||
345 | /* canon_hash stores 1 in do_not_record | |
346 | if it notices a reference to CC0, PC, or some other volatile | |
347 | subexpression. */ | |
348 | ||
349 | static int do_not_record; | |
350 | ||
7bac1be0 RK |
351 | #ifdef LOAD_EXTEND_OP |
352 | ||
353 | /* Scratch rtl used when looking for load-extended copy of a MEM. */ | |
354 | static rtx memory_extend_rtx; | |
355 | #endif | |
356 | ||
7afe21cc RK |
357 | /* canon_hash stores 1 in hash_arg_in_memory |
358 | if it notices a reference to memory within the expression being hashed. */ | |
359 | ||
360 | static int hash_arg_in_memory; | |
361 | ||
362 | /* canon_hash stores 1 in hash_arg_in_struct | |
363 | if it notices a reference to memory that's part of a structure. */ | |
364 | ||
365 | static int hash_arg_in_struct; | |
366 | ||
367 | /* The hash table contains buckets which are chains of `struct table_elt's, | |
368 | each recording one expression's information. | |
369 | That expression is in the `exp' field. | |
370 | ||
371 | Those elements with the same hash code are chained in both directions | |
372 | through the `next_same_hash' and `prev_same_hash' fields. | |
373 | ||
374 | Each set of expressions with equivalent values | |
375 | are on a two-way chain through the `next_same_value' | |
376 | and `prev_same_value' fields, and all point with | |
377 | the `first_same_value' field at the first element in | |
378 | that chain. The chain is in order of increasing cost. | |
379 | Each element's cost value is in its `cost' field. | |
380 | ||
381 | The `in_memory' field is nonzero for elements that | |
382 | involve any reference to memory. These elements are removed | |
383 | whenever a write is done to an unidentified location in memory. | |
384 | To be safe, we assume that a memory address is unidentified unless | |
385 | the address is either a symbol constant or a constant plus | |
386 | the frame pointer or argument pointer. | |
387 | ||
388 | The `in_struct' field is nonzero for elements that | |
389 | involve any reference to memory inside a structure or array. | |
390 | ||
391 | The `related_value' field is used to connect related expressions | |
392 | (that differ by adding an integer). | |
393 | The related expressions are chained in a circular fashion. | |
394 | `related_value' is zero for expressions for which this | |
395 | chain is not useful. | |
396 | ||
397 | The `cost' field stores the cost of this element's expression. | |
398 | ||
399 | The `is_const' flag is set if the element is a constant (including | |
400 | a fixed address). | |
401 | ||
402 | The `flag' field is used as a temporary during some search routines. | |
403 | ||
404 | The `mode' field is usually the same as GET_MODE (`exp'), but | |
405 | if `exp' is a CONST_INT and has no machine mode then the `mode' | |
406 | field is the mode it was being used as. Each constant is | |
407 | recorded separately for each mode it is used with. */ | |
408 | ||
409 | ||
410 | struct table_elt | |
411 | { | |
412 | rtx exp; | |
413 | struct table_elt *next_same_hash; | |
414 | struct table_elt *prev_same_hash; | |
415 | struct table_elt *next_same_value; | |
416 | struct table_elt *prev_same_value; | |
417 | struct table_elt *first_same_value; | |
418 | struct table_elt *related_value; | |
419 | int cost; | |
420 | enum machine_mode mode; | |
421 | char in_memory; | |
422 | char in_struct; | |
423 | char is_const; | |
424 | char flag; | |
425 | }; | |
426 | ||
7afe21cc RK |
427 | /* We don't want a lot of buckets, because we rarely have very many |
428 | things stored in the hash table, and a lot of buckets slows | |
429 | down a lot of loops that happen frequently. */ | |
430 | #define NBUCKETS 31 | |
431 | ||
432 | /* Compute hash code of X in mode M. Special-case case where X is a pseudo | |
433 | register (hard registers may require `do_not_record' to be set). */ | |
434 | ||
435 | #define HASH(X, M) \ | |
436 | (GET_CODE (X) == REG && REGNO (X) >= FIRST_PSEUDO_REGISTER \ | |
2197a88a | 437 | ? (((unsigned) REG << 7) + (unsigned) reg_qty[REGNO (X)]) % NBUCKETS \ |
7afe21cc RK |
438 | : canon_hash (X, M) % NBUCKETS) |
439 | ||
440 | /* Determine whether register number N is considered a fixed register for CSE. | |
441 | It is desirable to replace other regs with fixed regs, to reduce need for | |
442 | non-fixed hard regs. | |
443 | A reg wins if it is either the frame pointer or designated as fixed, | |
444 | but not if it is an overlapping register. */ | |
445 | #ifdef OVERLAPPING_REGNO_P | |
446 | #define FIXED_REGNO_P(N) \ | |
8bc169f2 | 447 | (((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \ |
6ab832bc | 448 | || fixed_regs[N] || global_regs[N]) \ |
7afe21cc RK |
449 | && ! OVERLAPPING_REGNO_P ((N))) |
450 | #else | |
451 | #define FIXED_REGNO_P(N) \ | |
8bc169f2 | 452 | ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \ |
6ab832bc | 453 | || fixed_regs[N] || global_regs[N]) |
7afe21cc RK |
454 | #endif |
455 | ||
456 | /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed | |
ac07e066 RK |
457 | hard registers and pointers into the frame are the cheapest with a cost |
458 | of 0. Next come pseudos with a cost of one and other hard registers with | |
459 | a cost of 2. Aside from these special cases, call `rtx_cost'. */ | |
460 | ||
6ab832bc | 461 | #define CHEAP_REGNO(N) \ |
8bc169f2 DE |
462 | ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \ |
463 | || (N) == STACK_POINTER_REGNUM || (N) == ARG_POINTER_REGNUM \ | |
464 | || ((N) >= FIRST_VIRTUAL_REGISTER && (N) <= LAST_VIRTUAL_REGISTER) \ | |
465 | || ((N) < FIRST_PSEUDO_REGISTER \ | |
e7bb59fa | 466 | && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS)) |
7afe21cc | 467 | |
6ab832bc RK |
468 | /* A register is cheap if it is a user variable assigned to the register |
469 | or if its register number always corresponds to a cheap register. */ | |
470 | ||
471 | #define CHEAP_REG(N) \ | |
472 | ((REG_USERVAR_P (N) && REGNO (N) < FIRST_PSEUDO_REGISTER) \ | |
473 | || CHEAP_REGNO (REGNO (N))) | |
474 | ||
7afe21cc RK |
475 | #define COST(X) \ |
476 | (GET_CODE (X) == REG \ | |
6ab832bc | 477 | ? (CHEAP_REG (X) ? 0 \ |
ac07e066 | 478 | : REGNO (X) >= FIRST_PSEUDO_REGISTER ? 1 \ |
7afe21cc | 479 | : 2) \ |
e5f6a288 | 480 | : rtx_cost (X, SET) * 2) |
7afe21cc RK |
481 | |
482 | /* Determine if the quantity number for register X represents a valid index | |
483 | into the `qty_...' variables. */ | |
484 | ||
485 | #define REGNO_QTY_VALID_P(N) (reg_qty[N] != (N)) | |
486 | ||
487 | static struct table_elt *table[NBUCKETS]; | |
488 | ||
489 | /* Chain of `struct table_elt's made so far for this function | |
490 | but currently removed from the table. */ | |
491 | ||
492 | static struct table_elt *free_element_chain; | |
493 | ||
494 | /* Number of `struct table_elt' structures made so far for this function. */ | |
495 | ||
496 | static int n_elements_made; | |
497 | ||
498 | /* Maximum value `n_elements_made' has had so far in this compilation | |
499 | for functions previously processed. */ | |
500 | ||
501 | static int max_elements_made; | |
502 | ||
503 | /* Surviving equivalence class when two equivalence classes are merged | |
504 | by recording the effects of a jump in the last insn. Zero if the | |
505 | last insn was not a conditional jump. */ | |
506 | ||
507 | static struct table_elt *last_jump_equiv_class; | |
508 | ||
509 | /* Set to the cost of a constant pool reference if one was found for a | |
510 | symbolic constant. If this was found, it means we should try to | |
511 | convert constants into constant pool entries if they don't fit in | |
512 | the insn. */ | |
513 | ||
514 | static int constant_pool_entries_cost; | |
515 | ||
516 | /* Bits describing what kind of values in memory must be invalidated | |
517 | for a particular instruction. If all three bits are zero, | |
518 | no memory refs need to be invalidated. Each bit is more powerful | |
519 | than the preceding ones, and if a bit is set then the preceding | |
520 | bits are also set. | |
521 | ||
522 | Here is how the bits are set: | |
523 | Pushing onto the stack invalidates only the stack pointer, | |
524 | writing at a fixed address invalidates only variable addresses, | |
525 | writing in a structure element at variable address | |
526 | invalidates all but scalar variables, | |
527 | and writing in anything else at variable address invalidates everything. */ | |
528 | ||
529 | struct write_data | |
530 | { | |
531 | int sp : 1; /* Invalidate stack pointer. */ | |
532 | int var : 1; /* Invalidate variable addresses. */ | |
533 | int nonscalar : 1; /* Invalidate all but scalar variables. */ | |
534 | int all : 1; /* Invalidate all memory refs. */ | |
535 | }; | |
536 | ||
6cd4575e RK |
537 | /* Define maximum length of a branch path. */ |
538 | ||
539 | #define PATHLENGTH 10 | |
540 | ||
541 | /* This data describes a block that will be processed by cse_basic_block. */ | |
542 | ||
543 | struct cse_basic_block_data { | |
544 | /* Lowest CUID value of insns in block. */ | |
545 | int low_cuid; | |
546 | /* Highest CUID value of insns in block. */ | |
547 | int high_cuid; | |
548 | /* Total number of SETs in block. */ | |
549 | int nsets; | |
550 | /* Last insn in the block. */ | |
551 | rtx last; | |
552 | /* Size of current branch path, if any. */ | |
553 | int path_size; | |
554 | /* Current branch path, indicating which branches will be taken. */ | |
555 | struct branch_path { | |
556 | /* The branch insn. */ | |
557 | rtx branch; | |
558 | /* Whether it should be taken or not. AROUND is the same as taken | |
559 | except that it is used when the destination label is not preceded | |
560 | by a BARRIER. */ | |
561 | enum taken {TAKEN, NOT_TAKEN, AROUND} status; | |
562 | } path[PATHLENGTH]; | |
563 | }; | |
564 | ||
7afe21cc RK |
565 | /* Nonzero if X has the form (PLUS frame-pointer integer). We check for |
566 | virtual regs here because the simplify_*_operation routines are called | |
567 | by integrate.c, which is called before virtual register instantiation. */ | |
568 | ||
569 | #define FIXED_BASE_PLUS_P(X) \ | |
8bc169f2 DE |
570 | ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \ |
571 | || (X) == arg_pointer_rtx \ | |
7afe21cc RK |
572 | || (X) == virtual_stack_vars_rtx \ |
573 | || (X) == virtual_incoming_args_rtx \ | |
574 | || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \ | |
575 | && (XEXP (X, 0) == frame_pointer_rtx \ | |
8bc169f2 | 576 | || XEXP (X, 0) == hard_frame_pointer_rtx \ |
7afe21cc RK |
577 | || XEXP (X, 0) == arg_pointer_rtx \ |
578 | || XEXP (X, 0) == virtual_stack_vars_rtx \ | |
579 | || XEXP (X, 0) == virtual_incoming_args_rtx))) | |
580 | ||
6f90e075 JW |
581 | /* Similar, but also allows reference to the stack pointer. |
582 | ||
583 | This used to include FIXED_BASE_PLUS_P, however, we can't assume that | |
584 | arg_pointer_rtx by itself is nonzero, because on at least one machine, | |
585 | the i960, the arg pointer is zero when it is unused. */ | |
7afe21cc RK |
586 | |
587 | #define NONZERO_BASE_PLUS_P(X) \ | |
8bc169f2 | 588 | ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \ |
6f90e075 JW |
589 | || (X) == virtual_stack_vars_rtx \ |
590 | || (X) == virtual_incoming_args_rtx \ | |
591 | || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \ | |
592 | && (XEXP (X, 0) == frame_pointer_rtx \ | |
8bc169f2 | 593 | || XEXP (X, 0) == hard_frame_pointer_rtx \ |
6f90e075 JW |
594 | || XEXP (X, 0) == arg_pointer_rtx \ |
595 | || XEXP (X, 0) == virtual_stack_vars_rtx \ | |
596 | || XEXP (X, 0) == virtual_incoming_args_rtx)) \ | |
7afe21cc RK |
597 | || (X) == stack_pointer_rtx \ |
598 | || (X) == virtual_stack_dynamic_rtx \ | |
599 | || (X) == virtual_outgoing_args_rtx \ | |
600 | || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \ | |
601 | && (XEXP (X, 0) == stack_pointer_rtx \ | |
602 | || XEXP (X, 0) == virtual_stack_dynamic_rtx \ | |
603 | || XEXP (X, 0) == virtual_outgoing_args_rtx))) | |
604 | ||
6cd4575e RK |
605 | static void new_basic_block PROTO((void)); |
606 | static void make_new_qty PROTO((int)); | |
607 | static void make_regs_eqv PROTO((int, int)); | |
608 | static void delete_reg_equiv PROTO((int)); | |
609 | static int mention_regs PROTO((rtx)); | |
610 | static int insert_regs PROTO((rtx, struct table_elt *, int)); | |
611 | static void free_element PROTO((struct table_elt *)); | |
2197a88a | 612 | static void remove_from_table PROTO((struct table_elt *, unsigned)); |
6cd4575e | 613 | static struct table_elt *get_element PROTO((void)); |
2197a88a RK |
614 | static struct table_elt *lookup PROTO((rtx, unsigned, enum machine_mode)), |
615 | *lookup_for_remove PROTO((rtx, unsigned, enum machine_mode)); | |
6cd4575e | 616 | static rtx lookup_as_function PROTO((rtx, enum rtx_code)); |
2197a88a | 617 | static struct table_elt *insert PROTO((rtx, struct table_elt *, unsigned, |
6cd4575e RK |
618 | enum machine_mode)); |
619 | static void merge_equiv_classes PROTO((struct table_elt *, | |
620 | struct table_elt *)); | |
68c1e173 | 621 | static void invalidate PROTO((rtx, enum machine_mode)); |
6cd4575e RK |
622 | static void remove_invalid_refs PROTO((int)); |
623 | static void rehash_using_reg PROTO((rtx)); | |
624 | static void invalidate_memory PROTO((struct write_data *)); | |
625 | static void invalidate_for_call PROTO((void)); | |
626 | static rtx use_related_value PROTO((rtx, struct table_elt *)); | |
2197a88a RK |
627 | static unsigned canon_hash PROTO((rtx, enum machine_mode)); |
628 | static unsigned safe_hash PROTO((rtx, enum machine_mode)); | |
6cd4575e | 629 | static int exp_equiv_p PROTO((rtx, rtx, int, int)); |
f451db89 | 630 | static void set_nonvarying_address_components PROTO((rtx, int, rtx *, |
6500fb43 RK |
631 | HOST_WIDE_INT *, |
632 | HOST_WIDE_INT *)); | |
6cd4575e | 633 | static int refers_to_p PROTO((rtx, rtx)); |
f451db89 | 634 | static int refers_to_mem_p PROTO((rtx, rtx, HOST_WIDE_INT, |
6cd4575e RK |
635 | HOST_WIDE_INT)); |
636 | static int cse_rtx_addr_varies_p PROTO((rtx)); | |
637 | static rtx canon_reg PROTO((rtx, rtx)); | |
638 | static void find_best_addr PROTO((rtx, rtx *)); | |
639 | static enum rtx_code find_comparison_args PROTO((enum rtx_code, rtx *, rtx *, | |
640 | enum machine_mode *, | |
641 | enum machine_mode *)); | |
96b0e481 RK |
642 | static rtx cse_gen_binary PROTO((enum rtx_code, enum machine_mode, |
643 | rtx, rtx)); | |
644 | static rtx simplify_plus_minus PROTO((enum rtx_code, enum machine_mode, | |
645 | rtx, rtx)); | |
6cd4575e RK |
646 | static rtx fold_rtx PROTO((rtx, rtx)); |
647 | static rtx equiv_constant PROTO((rtx)); | |
648 | static void record_jump_equiv PROTO((rtx, int)); | |
649 | static void record_jump_cond PROTO((enum rtx_code, enum machine_mode, | |
650 | rtx, rtx, int)); | |
651 | static void cse_insn PROTO((rtx, int)); | |
652 | static void note_mem_written PROTO((rtx, struct write_data *)); | |
653 | static void invalidate_from_clobbers PROTO((struct write_data *, rtx)); | |
654 | static rtx cse_process_notes PROTO((rtx, rtx)); | |
655 | static void cse_around_loop PROTO((rtx)); | |
656 | static void invalidate_skipped_set PROTO((rtx, rtx)); | |
657 | static void invalidate_skipped_block PROTO((rtx)); | |
658 | static void cse_check_loop_start PROTO((rtx, rtx)); | |
659 | static void cse_set_around_loop PROTO((rtx, rtx, rtx)); | |
660 | static rtx cse_basic_block PROTO((rtx, rtx, struct branch_path *, int)); | |
79644f06 | 661 | static void count_reg_usage PROTO((rtx, int *, rtx, int)); |
c407b802 RK |
662 | |
663 | extern int rtx_equal_function_value_matters; | |
7afe21cc RK |
664 | \f |
665 | /* Return an estimate of the cost of computing rtx X. | |
666 | One use is in cse, to decide which expression to keep in the hash table. | |
667 | Another is in rtl generation, to pick the cheapest way to multiply. | |
668 | Other uses like the latter are expected in the future. */ | |
669 | ||
670 | /* Return the right cost to give to an operation | |
671 | to make the cost of the corresponding register-to-register instruction | |
672 | N times that of a fast register-to-register instruction. */ | |
673 | ||
674 | #define COSTS_N_INSNS(N) ((N) * 4 - 2) | |
675 | ||
676 | int | |
e5f6a288 | 677 | rtx_cost (x, outer_code) |
7afe21cc | 678 | rtx x; |
e5f6a288 | 679 | enum rtx_code outer_code; |
7afe21cc RK |
680 | { |
681 | register int i, j; | |
682 | register enum rtx_code code; | |
683 | register char *fmt; | |
684 | register int total; | |
685 | ||
686 | if (x == 0) | |
687 | return 0; | |
688 | ||
689 | /* Compute the default costs of certain things. | |
690 | Note that RTX_COSTS can override the defaults. */ | |
691 | ||
692 | code = GET_CODE (x); | |
693 | switch (code) | |
694 | { | |
695 | case MULT: | |
696 | /* Count multiplication by 2**n as a shift, | |
697 | because if we are considering it, we would output it as a shift. */ | |
698 | if (GET_CODE (XEXP (x, 1)) == CONST_INT | |
699 | && exact_log2 (INTVAL (XEXP (x, 1))) >= 0) | |
700 | total = 2; | |
701 | else | |
702 | total = COSTS_N_INSNS (5); | |
703 | break; | |
704 | case DIV: | |
705 | case UDIV: | |
706 | case MOD: | |
707 | case UMOD: | |
708 | total = COSTS_N_INSNS (7); | |
709 | break; | |
710 | case USE: | |
711 | /* Used in loop.c and combine.c as a marker. */ | |
712 | total = 0; | |
713 | break; | |
538b78e7 RS |
714 | case ASM_OPERANDS: |
715 | /* We don't want these to be used in substitutions because | |
716 | we have no way of validating the resulting insn. So assign | |
717 | anything containing an ASM_OPERANDS a very high cost. */ | |
718 | total = 1000; | |
719 | break; | |
7afe21cc RK |
720 | default: |
721 | total = 2; | |
722 | } | |
723 | ||
724 | switch (code) | |
725 | { | |
726 | case REG: | |
6ab832bc | 727 | return ! CHEAP_REG (x); |
ac07e066 | 728 | |
7afe21cc | 729 | case SUBREG: |
fc3ffe83 RK |
730 | /* If we can't tie these modes, make this expensive. The larger |
731 | the mode, the more expensive it is. */ | |
732 | if (! MODES_TIEABLE_P (GET_MODE (x), GET_MODE (SUBREG_REG (x)))) | |
733 | return COSTS_N_INSNS (2 | |
734 | + GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD); | |
7afe21cc RK |
735 | return 2; |
736 | #ifdef RTX_COSTS | |
e5f6a288 | 737 | RTX_COSTS (x, code, outer_code); |
7afe21cc | 738 | #endif |
e5f6a288 | 739 | CONST_COSTS (x, code, outer_code); |
7afe21cc RK |
740 | } |
741 | ||
742 | /* Sum the costs of the sub-rtx's, plus cost of this operation, | |
743 | which is already in total. */ | |
744 | ||
745 | fmt = GET_RTX_FORMAT (code); | |
746 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
747 | if (fmt[i] == 'e') | |
e5f6a288 | 748 | total += rtx_cost (XEXP (x, i), code); |
7afe21cc RK |
749 | else if (fmt[i] == 'E') |
750 | for (j = 0; j < XVECLEN (x, i); j++) | |
e5f6a288 | 751 | total += rtx_cost (XVECEXP (x, i, j), code); |
7afe21cc RK |
752 | |
753 | return total; | |
754 | } | |
755 | \f | |
756 | /* Clear the hash table and initialize each register with its own quantity, | |
757 | for a new basic block. */ | |
758 | ||
759 | static void | |
760 | new_basic_block () | |
761 | { | |
762 | register int i; | |
763 | ||
764 | next_qty = max_reg; | |
765 | ||
4c9a05bc | 766 | bzero ((char *) reg_tick, max_reg * sizeof (int)); |
7afe21cc | 767 | |
4c9a05bc RK |
768 | bcopy ((char *) all_minus_one, (char *) reg_in_table, |
769 | max_reg * sizeof (int)); | |
770 | bcopy ((char *) consec_ints, (char *) reg_qty, max_reg * sizeof (int)); | |
7afe21cc RK |
771 | CLEAR_HARD_REG_SET (hard_regs_in_table); |
772 | ||
773 | /* The per-quantity values used to be initialized here, but it is | |
774 | much faster to initialize each as it is made in `make_new_qty'. */ | |
775 | ||
776 | for (i = 0; i < NBUCKETS; i++) | |
777 | { | |
778 | register struct table_elt *this, *next; | |
779 | for (this = table[i]; this; this = next) | |
780 | { | |
781 | next = this->next_same_hash; | |
782 | free_element (this); | |
783 | } | |
784 | } | |
785 | ||
4c9a05bc | 786 | bzero ((char *) table, sizeof table); |
7afe21cc RK |
787 | |
788 | prev_insn = 0; | |
789 | ||
790 | #ifdef HAVE_cc0 | |
791 | prev_insn_cc0 = 0; | |
792 | #endif | |
793 | } | |
794 | ||
795 | /* Say that register REG contains a quantity not in any register before | |
796 | and initialize that quantity. */ | |
797 | ||
798 | static void | |
799 | make_new_qty (reg) | |
800 | register int reg; | |
801 | { | |
802 | register int q; | |
803 | ||
804 | if (next_qty >= max_qty) | |
805 | abort (); | |
806 | ||
807 | q = reg_qty[reg] = next_qty++; | |
808 | qty_first_reg[q] = reg; | |
809 | qty_last_reg[q] = reg; | |
810 | qty_const[q] = qty_const_insn[q] = 0; | |
811 | qty_comparison_code[q] = UNKNOWN; | |
812 | ||
813 | reg_next_eqv[reg] = reg_prev_eqv[reg] = -1; | |
814 | } | |
815 | ||
816 | /* Make reg NEW equivalent to reg OLD. | |
817 | OLD is not changing; NEW is. */ | |
818 | ||
819 | static void | |
820 | make_regs_eqv (new, old) | |
821 | register int new, old; | |
822 | { | |
823 | register int lastr, firstr; | |
824 | register int q = reg_qty[old]; | |
825 | ||
826 | /* Nothing should become eqv until it has a "non-invalid" qty number. */ | |
827 | if (! REGNO_QTY_VALID_P (old)) | |
828 | abort (); | |
829 | ||
830 | reg_qty[new] = q; | |
831 | firstr = qty_first_reg[q]; | |
832 | lastr = qty_last_reg[q]; | |
833 | ||
834 | /* Prefer fixed hard registers to anything. Prefer pseudo regs to other | |
835 | hard regs. Among pseudos, if NEW will live longer than any other reg | |
836 | of the same qty, and that is beyond the current basic block, | |
837 | make it the new canonical replacement for this qty. */ | |
838 | if (! (firstr < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (firstr)) | |
839 | /* Certain fixed registers might be of the class NO_REGS. This means | |
840 | that not only can they not be allocated by the compiler, but | |
830a38ee | 841 | they cannot be used in substitutions or canonicalizations |
7afe21cc RK |
842 | either. */ |
843 | && (new >= FIRST_PSEUDO_REGISTER || REGNO_REG_CLASS (new) != NO_REGS) | |
844 | && ((new < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (new)) | |
845 | || (new >= FIRST_PSEUDO_REGISTER | |
846 | && (firstr < FIRST_PSEUDO_REGISTER | |
847 | || ((uid_cuid[regno_last_uid[new]] > cse_basic_block_end | |
848 | || (uid_cuid[regno_first_uid[new]] | |
849 | < cse_basic_block_start)) | |
850 | && (uid_cuid[regno_last_uid[new]] | |
851 | > uid_cuid[regno_last_uid[firstr]])))))) | |
852 | { | |
853 | reg_prev_eqv[firstr] = new; | |
854 | reg_next_eqv[new] = firstr; | |
855 | reg_prev_eqv[new] = -1; | |
856 | qty_first_reg[q] = new; | |
857 | } | |
858 | else | |
859 | { | |
860 | /* If NEW is a hard reg (known to be non-fixed), insert at end. | |
861 | Otherwise, insert before any non-fixed hard regs that are at the | |
862 | end. Registers of class NO_REGS cannot be used as an | |
863 | equivalent for anything. */ | |
864 | while (lastr < FIRST_PSEUDO_REGISTER && reg_prev_eqv[lastr] >= 0 | |
865 | && (REGNO_REG_CLASS (lastr) == NO_REGS || ! FIXED_REGNO_P (lastr)) | |
866 | && new >= FIRST_PSEUDO_REGISTER) | |
867 | lastr = reg_prev_eqv[lastr]; | |
868 | reg_next_eqv[new] = reg_next_eqv[lastr]; | |
869 | if (reg_next_eqv[lastr] >= 0) | |
870 | reg_prev_eqv[reg_next_eqv[lastr]] = new; | |
871 | else | |
872 | qty_last_reg[q] = new; | |
873 | reg_next_eqv[lastr] = new; | |
874 | reg_prev_eqv[new] = lastr; | |
875 | } | |
876 | } | |
877 | ||
878 | /* Remove REG from its equivalence class. */ | |
879 | ||
880 | static void | |
881 | delete_reg_equiv (reg) | |
882 | register int reg; | |
883 | { | |
7afe21cc | 884 | register int q = reg_qty[reg]; |
a4e262bc | 885 | register int p, n; |
7afe21cc | 886 | |
a4e262bc | 887 | /* If invalid, do nothing. */ |
7afe21cc RK |
888 | if (q == reg) |
889 | return; | |
890 | ||
a4e262bc RK |
891 | p = reg_prev_eqv[reg]; |
892 | n = reg_next_eqv[reg]; | |
893 | ||
7afe21cc RK |
894 | if (n != -1) |
895 | reg_prev_eqv[n] = p; | |
896 | else | |
897 | qty_last_reg[q] = p; | |
898 | if (p != -1) | |
899 | reg_next_eqv[p] = n; | |
900 | else | |
901 | qty_first_reg[q] = n; | |
902 | ||
903 | reg_qty[reg] = reg; | |
904 | } | |
905 | ||
906 | /* Remove any invalid expressions from the hash table | |
907 | that refer to any of the registers contained in expression X. | |
908 | ||
909 | Make sure that newly inserted references to those registers | |
910 | as subexpressions will be considered valid. | |
911 | ||
912 | mention_regs is not called when a register itself | |
913 | is being stored in the table. | |
914 | ||
915 | Return 1 if we have done something that may have changed the hash code | |
916 | of X. */ | |
917 | ||
918 | static int | |
919 | mention_regs (x) | |
920 | rtx x; | |
921 | { | |
922 | register enum rtx_code code; | |
923 | register int i, j; | |
924 | register char *fmt; | |
925 | register int changed = 0; | |
926 | ||
927 | if (x == 0) | |
e5f6a288 | 928 | return 0; |
7afe21cc RK |
929 | |
930 | code = GET_CODE (x); | |
931 | if (code == REG) | |
932 | { | |
933 | register int regno = REGNO (x); | |
934 | register int endregno | |
935 | = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1 | |
936 | : HARD_REGNO_NREGS (regno, GET_MODE (x))); | |
937 | int i; | |
938 | ||
939 | for (i = regno; i < endregno; i++) | |
940 | { | |
941 | if (reg_in_table[i] >= 0 && reg_in_table[i] != reg_tick[i]) | |
942 | remove_invalid_refs (i); | |
943 | ||
944 | reg_in_table[i] = reg_tick[i]; | |
945 | } | |
946 | ||
947 | return 0; | |
948 | } | |
949 | ||
950 | /* If X is a comparison or a COMPARE and either operand is a register | |
951 | that does not have a quantity, give it one. This is so that a later | |
952 | call to record_jump_equiv won't cause X to be assigned a different | |
953 | hash code and not found in the table after that call. | |
954 | ||
955 | It is not necessary to do this here, since rehash_using_reg can | |
956 | fix up the table later, but doing this here eliminates the need to | |
957 | call that expensive function in the most common case where the only | |
958 | use of the register is in the comparison. */ | |
959 | ||
960 | if (code == COMPARE || GET_RTX_CLASS (code) == '<') | |
961 | { | |
962 | if (GET_CODE (XEXP (x, 0)) == REG | |
963 | && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 0)))) | |
906c4e36 | 964 | if (insert_regs (XEXP (x, 0), NULL_PTR, 0)) |
7afe21cc RK |
965 | { |
966 | rehash_using_reg (XEXP (x, 0)); | |
967 | changed = 1; | |
968 | } | |
969 | ||
970 | if (GET_CODE (XEXP (x, 1)) == REG | |
971 | && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 1)))) | |
906c4e36 | 972 | if (insert_regs (XEXP (x, 1), NULL_PTR, 0)) |
7afe21cc RK |
973 | { |
974 | rehash_using_reg (XEXP (x, 1)); | |
975 | changed = 1; | |
976 | } | |
977 | } | |
978 | ||
979 | fmt = GET_RTX_FORMAT (code); | |
980 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
981 | if (fmt[i] == 'e') | |
982 | changed |= mention_regs (XEXP (x, i)); | |
983 | else if (fmt[i] == 'E') | |
984 | for (j = 0; j < XVECLEN (x, i); j++) | |
985 | changed |= mention_regs (XVECEXP (x, i, j)); | |
986 | ||
987 | return changed; | |
988 | } | |
989 | ||
990 | /* Update the register quantities for inserting X into the hash table | |
991 | with a value equivalent to CLASSP. | |
992 | (If the class does not contain a REG, it is irrelevant.) | |
993 | If MODIFIED is nonzero, X is a destination; it is being modified. | |
994 | Note that delete_reg_equiv should be called on a register | |
995 | before insert_regs is done on that register with MODIFIED != 0. | |
996 | ||
997 | Nonzero value means that elements of reg_qty have changed | |
998 | so X's hash code may be different. */ | |
999 | ||
1000 | static int | |
1001 | insert_regs (x, classp, modified) | |
1002 | rtx x; | |
1003 | struct table_elt *classp; | |
1004 | int modified; | |
1005 | { | |
1006 | if (GET_CODE (x) == REG) | |
1007 | { | |
1008 | register int regno = REGNO (x); | |
1009 | ||
1ff0c00d RK |
1010 | /* If REGNO is in the equivalence table already but is of the |
1011 | wrong mode for that equivalence, don't do anything here. */ | |
1012 | ||
1013 | if (REGNO_QTY_VALID_P (regno) | |
1014 | && qty_mode[reg_qty[regno]] != GET_MODE (x)) | |
1015 | return 0; | |
1016 | ||
1017 | if (modified || ! REGNO_QTY_VALID_P (regno)) | |
7afe21cc RK |
1018 | { |
1019 | if (classp) | |
1020 | for (classp = classp->first_same_value; | |
1021 | classp != 0; | |
1022 | classp = classp->next_same_value) | |
1023 | if (GET_CODE (classp->exp) == REG | |
1024 | && GET_MODE (classp->exp) == GET_MODE (x)) | |
1025 | { | |
1026 | make_regs_eqv (regno, REGNO (classp->exp)); | |
1027 | return 1; | |
1028 | } | |
1029 | ||
1030 | make_new_qty (regno); | |
1031 | qty_mode[reg_qty[regno]] = GET_MODE (x); | |
1032 | return 1; | |
1033 | } | |
cdf4112f TG |
1034 | |
1035 | return 0; | |
7afe21cc | 1036 | } |
c610adec RK |
1037 | |
1038 | /* If X is a SUBREG, we will likely be inserting the inner register in the | |
1039 | table. If that register doesn't have an assigned quantity number at | |
1040 | this point but does later, the insertion that we will be doing now will | |
1041 | not be accessible because its hash code will have changed. So assign | |
1042 | a quantity number now. */ | |
1043 | ||
1044 | else if (GET_CODE (x) == SUBREG && GET_CODE (SUBREG_REG (x)) == REG | |
1045 | && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x)))) | |
1046 | { | |
906c4e36 | 1047 | insert_regs (SUBREG_REG (x), NULL_PTR, 0); |
c610adec RK |
1048 | mention_regs (SUBREG_REG (x)); |
1049 | return 1; | |
1050 | } | |
7afe21cc RK |
1051 | else |
1052 | return mention_regs (x); | |
1053 | } | |
1054 | \f | |
1055 | /* Look in or update the hash table. */ | |
1056 | ||
1057 | /* Put the element ELT on the list of free elements. */ | |
1058 | ||
1059 | static void | |
1060 | free_element (elt) | |
1061 | struct table_elt *elt; | |
1062 | { | |
1063 | elt->next_same_hash = free_element_chain; | |
1064 | free_element_chain = elt; | |
1065 | } | |
1066 | ||
1067 | /* Return an element that is free for use. */ | |
1068 | ||
1069 | static struct table_elt * | |
1070 | get_element () | |
1071 | { | |
1072 | struct table_elt *elt = free_element_chain; | |
1073 | if (elt) | |
1074 | { | |
1075 | free_element_chain = elt->next_same_hash; | |
1076 | return elt; | |
1077 | } | |
1078 | n_elements_made++; | |
1079 | return (struct table_elt *) oballoc (sizeof (struct table_elt)); | |
1080 | } | |
1081 | ||
1082 | /* Remove table element ELT from use in the table. | |
1083 | HASH is its hash code, made using the HASH macro. | |
1084 | It's an argument because often that is known in advance | |
1085 | and we save much time not recomputing it. */ | |
1086 | ||
1087 | static void | |
1088 | remove_from_table (elt, hash) | |
1089 | register struct table_elt *elt; | |
2197a88a | 1090 | unsigned hash; |
7afe21cc RK |
1091 | { |
1092 | if (elt == 0) | |
1093 | return; | |
1094 | ||
1095 | /* Mark this element as removed. See cse_insn. */ | |
1096 | elt->first_same_value = 0; | |
1097 | ||
1098 | /* Remove the table element from its equivalence class. */ | |
1099 | ||
1100 | { | |
1101 | register struct table_elt *prev = elt->prev_same_value; | |
1102 | register struct table_elt *next = elt->next_same_value; | |
1103 | ||
1104 | if (next) next->prev_same_value = prev; | |
1105 | ||
1106 | if (prev) | |
1107 | prev->next_same_value = next; | |
1108 | else | |
1109 | { | |
1110 | register struct table_elt *newfirst = next; | |
1111 | while (next) | |
1112 | { | |
1113 | next->first_same_value = newfirst; | |
1114 | next = next->next_same_value; | |
1115 | } | |
1116 | } | |
1117 | } | |
1118 | ||
1119 | /* Remove the table element from its hash bucket. */ | |
1120 | ||
1121 | { | |
1122 | register struct table_elt *prev = elt->prev_same_hash; | |
1123 | register struct table_elt *next = elt->next_same_hash; | |
1124 | ||
1125 | if (next) next->prev_same_hash = prev; | |
1126 | ||
1127 | if (prev) | |
1128 | prev->next_same_hash = next; | |
1129 | else if (table[hash] == elt) | |
1130 | table[hash] = next; | |
1131 | else | |
1132 | { | |
1133 | /* This entry is not in the proper hash bucket. This can happen | |
1134 | when two classes were merged by `merge_equiv_classes'. Search | |
1135 | for the hash bucket that it heads. This happens only very | |
1136 | rarely, so the cost is acceptable. */ | |
1137 | for (hash = 0; hash < NBUCKETS; hash++) | |
1138 | if (table[hash] == elt) | |
1139 | table[hash] = next; | |
1140 | } | |
1141 | } | |
1142 | ||
1143 | /* Remove the table element from its related-value circular chain. */ | |
1144 | ||
1145 | if (elt->related_value != 0 && elt->related_value != elt) | |
1146 | { | |
1147 | register struct table_elt *p = elt->related_value; | |
1148 | while (p->related_value != elt) | |
1149 | p = p->related_value; | |
1150 | p->related_value = elt->related_value; | |
1151 | if (p->related_value == p) | |
1152 | p->related_value = 0; | |
1153 | } | |
1154 | ||
1155 | free_element (elt); | |
1156 | } | |
1157 | ||
1158 | /* Look up X in the hash table and return its table element, | |
1159 | or 0 if X is not in the table. | |
1160 | ||
1161 | MODE is the machine-mode of X, or if X is an integer constant | |
1162 | with VOIDmode then MODE is the mode with which X will be used. | |
1163 | ||
1164 | Here we are satisfied to find an expression whose tree structure | |
1165 | looks like X. */ | |
1166 | ||
1167 | static struct table_elt * | |
1168 | lookup (x, hash, mode) | |
1169 | rtx x; | |
2197a88a | 1170 | unsigned hash; |
7afe21cc RK |
1171 | enum machine_mode mode; |
1172 | { | |
1173 | register struct table_elt *p; | |
1174 | ||
1175 | for (p = table[hash]; p; p = p->next_same_hash) | |
1176 | if (mode == p->mode && ((x == p->exp && GET_CODE (x) == REG) | |
1177 | || exp_equiv_p (x, p->exp, GET_CODE (x) != REG, 0))) | |
1178 | return p; | |
1179 | ||
1180 | return 0; | |
1181 | } | |
1182 | ||
1183 | /* Like `lookup' but don't care whether the table element uses invalid regs. | |
1184 | Also ignore discrepancies in the machine mode of a register. */ | |
1185 | ||
1186 | static struct table_elt * | |
1187 | lookup_for_remove (x, hash, mode) | |
1188 | rtx x; | |
2197a88a | 1189 | unsigned hash; |
7afe21cc RK |
1190 | enum machine_mode mode; |
1191 | { | |
1192 | register struct table_elt *p; | |
1193 | ||
1194 | if (GET_CODE (x) == REG) | |
1195 | { | |
1196 | int regno = REGNO (x); | |
1197 | /* Don't check the machine mode when comparing registers; | |
1198 | invalidating (REG:SI 0) also invalidates (REG:DF 0). */ | |
1199 | for (p = table[hash]; p; p = p->next_same_hash) | |
1200 | if (GET_CODE (p->exp) == REG | |
1201 | && REGNO (p->exp) == regno) | |
1202 | return p; | |
1203 | } | |
1204 | else | |
1205 | { | |
1206 | for (p = table[hash]; p; p = p->next_same_hash) | |
1207 | if (mode == p->mode && (x == p->exp || exp_equiv_p (x, p->exp, 0, 0))) | |
1208 | return p; | |
1209 | } | |
1210 | ||
1211 | return 0; | |
1212 | } | |
1213 | ||
1214 | /* Look for an expression equivalent to X and with code CODE. | |
1215 | If one is found, return that expression. */ | |
1216 | ||
1217 | static rtx | |
1218 | lookup_as_function (x, code) | |
1219 | rtx x; | |
1220 | enum rtx_code code; | |
1221 | { | |
1222 | register struct table_elt *p = lookup (x, safe_hash (x, VOIDmode) % NBUCKETS, | |
1223 | GET_MODE (x)); | |
1224 | if (p == 0) | |
1225 | return 0; | |
1226 | ||
1227 | for (p = p->first_same_value; p; p = p->next_same_value) | |
1228 | { | |
1229 | if (GET_CODE (p->exp) == code | |
1230 | /* Make sure this is a valid entry in the table. */ | |
1231 | && exp_equiv_p (p->exp, p->exp, 1, 0)) | |
1232 | return p->exp; | |
1233 | } | |
1234 | ||
1235 | return 0; | |
1236 | } | |
1237 | ||
1238 | /* Insert X in the hash table, assuming HASH is its hash code | |
1239 | and CLASSP is an element of the class it should go in | |
1240 | (or 0 if a new class should be made). | |
1241 | It is inserted at the proper position to keep the class in | |
1242 | the order cheapest first. | |
1243 | ||
1244 | MODE is the machine-mode of X, or if X is an integer constant | |
1245 | with VOIDmode then MODE is the mode with which X will be used. | |
1246 | ||
1247 | For elements of equal cheapness, the most recent one | |
1248 | goes in front, except that the first element in the list | |
1249 | remains first unless a cheaper element is added. The order of | |
1250 | pseudo-registers does not matter, as canon_reg will be called to | |
830a38ee | 1251 | find the cheapest when a register is retrieved from the table. |
7afe21cc RK |
1252 | |
1253 | The in_memory field in the hash table element is set to 0. | |
1254 | The caller must set it nonzero if appropriate. | |
1255 | ||
1256 | You should call insert_regs (X, CLASSP, MODIFY) before calling here, | |
1257 | and if insert_regs returns a nonzero value | |
1258 | you must then recompute its hash code before calling here. | |
1259 | ||
1260 | If necessary, update table showing constant values of quantities. */ | |
1261 | ||
1262 | #define CHEAPER(X,Y) ((X)->cost < (Y)->cost) | |
1263 | ||
1264 | static struct table_elt * | |
1265 | insert (x, classp, hash, mode) | |
1266 | register rtx x; | |
1267 | register struct table_elt *classp; | |
2197a88a | 1268 | unsigned hash; |
7afe21cc RK |
1269 | enum machine_mode mode; |
1270 | { | |
1271 | register struct table_elt *elt; | |
1272 | ||
1273 | /* If X is a register and we haven't made a quantity for it, | |
1274 | something is wrong. */ | |
1275 | if (GET_CODE (x) == REG && ! REGNO_QTY_VALID_P (REGNO (x))) | |
1276 | abort (); | |
1277 | ||
1278 | /* If X is a hard register, show it is being put in the table. */ | |
1279 | if (GET_CODE (x) == REG && REGNO (x) < FIRST_PSEUDO_REGISTER) | |
1280 | { | |
1281 | int regno = REGNO (x); | |
1282 | int endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (x)); | |
1283 | int i; | |
1284 | ||
1285 | for (i = regno; i < endregno; i++) | |
1286 | SET_HARD_REG_BIT (hard_regs_in_table, i); | |
1287 | } | |
1288 | ||
1289 | ||
1290 | /* Put an element for X into the right hash bucket. */ | |
1291 | ||
1292 | elt = get_element (); | |
1293 | elt->exp = x; | |
1294 | elt->cost = COST (x); | |
1295 | elt->next_same_value = 0; | |
1296 | elt->prev_same_value = 0; | |
1297 | elt->next_same_hash = table[hash]; | |
1298 | elt->prev_same_hash = 0; | |
1299 | elt->related_value = 0; | |
1300 | elt->in_memory = 0; | |
1301 | elt->mode = mode; | |
1302 | elt->is_const = (CONSTANT_P (x) | |
1303 | /* GNU C++ takes advantage of this for `this' | |
1304 | (and other const values). */ | |
1305 | || (RTX_UNCHANGING_P (x) | |
1306 | && GET_CODE (x) == REG | |
1307 | && REGNO (x) >= FIRST_PSEUDO_REGISTER) | |
1308 | || FIXED_BASE_PLUS_P (x)); | |
1309 | ||
1310 | if (table[hash]) | |
1311 | table[hash]->prev_same_hash = elt; | |
1312 | table[hash] = elt; | |
1313 | ||
1314 | /* Put it into the proper value-class. */ | |
1315 | if (classp) | |
1316 | { | |
1317 | classp = classp->first_same_value; | |
1318 | if (CHEAPER (elt, classp)) | |
1319 | /* Insert at the head of the class */ | |
1320 | { | |
1321 | register struct table_elt *p; | |
1322 | elt->next_same_value = classp; | |
1323 | classp->prev_same_value = elt; | |
1324 | elt->first_same_value = elt; | |
1325 | ||
1326 | for (p = classp; p; p = p->next_same_value) | |
1327 | p->first_same_value = elt; | |
1328 | } | |
1329 | else | |
1330 | { | |
1331 | /* Insert not at head of the class. */ | |
1332 | /* Put it after the last element cheaper than X. */ | |
1333 | register struct table_elt *p, *next; | |
1334 | for (p = classp; (next = p->next_same_value) && CHEAPER (next, elt); | |
1335 | p = next); | |
1336 | /* Put it after P and before NEXT. */ | |
1337 | elt->next_same_value = next; | |
1338 | if (next) | |
1339 | next->prev_same_value = elt; | |
1340 | elt->prev_same_value = p; | |
1341 | p->next_same_value = elt; | |
1342 | elt->first_same_value = classp; | |
1343 | } | |
1344 | } | |
1345 | else | |
1346 | elt->first_same_value = elt; | |
1347 | ||
1348 | /* If this is a constant being set equivalent to a register or a register | |
1349 | being set equivalent to a constant, note the constant equivalence. | |
1350 | ||
1351 | If this is a constant, it cannot be equivalent to a different constant, | |
1352 | and a constant is the only thing that can be cheaper than a register. So | |
1353 | we know the register is the head of the class (before the constant was | |
1354 | inserted). | |
1355 | ||
1356 | If this is a register that is not already known equivalent to a | |
1357 | constant, we must check the entire class. | |
1358 | ||
1359 | If this is a register that is already known equivalent to an insn, | |
1360 | update `qty_const_insn' to show that `this_insn' is the latest | |
1361 | insn making that quantity equivalent to the constant. */ | |
1362 | ||
1363 | if (elt->is_const && classp && GET_CODE (classp->exp) == REG) | |
1364 | { | |
1365 | qty_const[reg_qty[REGNO (classp->exp)]] | |
1366 | = gen_lowpart_if_possible (qty_mode[reg_qty[REGNO (classp->exp)]], x); | |
1367 | qty_const_insn[reg_qty[REGNO (classp->exp)]] = this_insn; | |
1368 | } | |
1369 | ||
1370 | else if (GET_CODE (x) == REG && classp && ! qty_const[reg_qty[REGNO (x)]]) | |
1371 | { | |
1372 | register struct table_elt *p; | |
1373 | ||
1374 | for (p = classp; p != 0; p = p->next_same_value) | |
1375 | { | |
1376 | if (p->is_const) | |
1377 | { | |
1378 | qty_const[reg_qty[REGNO (x)]] | |
1379 | = gen_lowpart_if_possible (GET_MODE (x), p->exp); | |
1380 | qty_const_insn[reg_qty[REGNO (x)]] = this_insn; | |
1381 | break; | |
1382 | } | |
1383 | } | |
1384 | } | |
1385 | ||
1386 | else if (GET_CODE (x) == REG && qty_const[reg_qty[REGNO (x)]] | |
1387 | && GET_MODE (x) == qty_mode[reg_qty[REGNO (x)]]) | |
1388 | qty_const_insn[reg_qty[REGNO (x)]] = this_insn; | |
1389 | ||
1390 | /* If this is a constant with symbolic value, | |
1391 | and it has a term with an explicit integer value, | |
1392 | link it up with related expressions. */ | |
1393 | if (GET_CODE (x) == CONST) | |
1394 | { | |
1395 | rtx subexp = get_related_value (x); | |
2197a88a | 1396 | unsigned subhash; |
7afe21cc RK |
1397 | struct table_elt *subelt, *subelt_prev; |
1398 | ||
1399 | if (subexp != 0) | |
1400 | { | |
1401 | /* Get the integer-free subexpression in the hash table. */ | |
1402 | subhash = safe_hash (subexp, mode) % NBUCKETS; | |
1403 | subelt = lookup (subexp, subhash, mode); | |
1404 | if (subelt == 0) | |
906c4e36 | 1405 | subelt = insert (subexp, NULL_PTR, subhash, mode); |
7afe21cc RK |
1406 | /* Initialize SUBELT's circular chain if it has none. */ |
1407 | if (subelt->related_value == 0) | |
1408 | subelt->related_value = subelt; | |
1409 | /* Find the element in the circular chain that precedes SUBELT. */ | |
1410 | subelt_prev = subelt; | |
1411 | while (subelt_prev->related_value != subelt) | |
1412 | subelt_prev = subelt_prev->related_value; | |
1413 | /* Put new ELT into SUBELT's circular chain just before SUBELT. | |
1414 | This way the element that follows SUBELT is the oldest one. */ | |
1415 | elt->related_value = subelt_prev->related_value; | |
1416 | subelt_prev->related_value = elt; | |
1417 | } | |
1418 | } | |
1419 | ||
1420 | return elt; | |
1421 | } | |
1422 | \f | |
1423 | /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from | |
1424 | CLASS2 into CLASS1. This is done when we have reached an insn which makes | |
1425 | the two classes equivalent. | |
1426 | ||
1427 | CLASS1 will be the surviving class; CLASS2 should not be used after this | |
1428 | call. | |
1429 | ||
1430 | Any invalid entries in CLASS2 will not be copied. */ | |
1431 | ||
1432 | static void | |
1433 | merge_equiv_classes (class1, class2) | |
1434 | struct table_elt *class1, *class2; | |
1435 | { | |
1436 | struct table_elt *elt, *next, *new; | |
1437 | ||
1438 | /* Ensure we start with the head of the classes. */ | |
1439 | class1 = class1->first_same_value; | |
1440 | class2 = class2->first_same_value; | |
1441 | ||
1442 | /* If they were already equal, forget it. */ | |
1443 | if (class1 == class2) | |
1444 | return; | |
1445 | ||
1446 | for (elt = class2; elt; elt = next) | |
1447 | { | |
2197a88a | 1448 | unsigned hash; |
7afe21cc RK |
1449 | rtx exp = elt->exp; |
1450 | enum machine_mode mode = elt->mode; | |
1451 | ||
1452 | next = elt->next_same_value; | |
1453 | ||
1454 | /* Remove old entry, make a new one in CLASS1's class. | |
1455 | Don't do this for invalid entries as we cannot find their | |
1456 | hash code (it also isn't necessary). */ | |
1457 | if (GET_CODE (exp) == REG || exp_equiv_p (exp, exp, 1, 0)) | |
1458 | { | |
1459 | hash_arg_in_memory = 0; | |
1460 | hash_arg_in_struct = 0; | |
1461 | hash = HASH (exp, mode); | |
1462 | ||
1463 | if (GET_CODE (exp) == REG) | |
1464 | delete_reg_equiv (REGNO (exp)); | |
1465 | ||
1466 | remove_from_table (elt, hash); | |
1467 | ||
1468 | if (insert_regs (exp, class1, 0)) | |
1469 | hash = HASH (exp, mode); | |
1470 | new = insert (exp, class1, hash, mode); | |
1471 | new->in_memory = hash_arg_in_memory; | |
1472 | new->in_struct = hash_arg_in_struct; | |
1473 | } | |
1474 | } | |
1475 | } | |
1476 | \f | |
1477 | /* Remove from the hash table, or mark as invalid, | |
1478 | all expressions whose values could be altered by storing in X. | |
1479 | X is a register, a subreg, or a memory reference with nonvarying address | |
1480 | (because, when a memory reference with a varying address is stored in, | |
1481 | all memory references are removed by invalidate_memory | |
1482 | so specific invalidation is superfluous). | |
bb4034b3 JW |
1483 | FULL_MODE, if not VOIDmode, indicates that this much should be invalidated |
1484 | instead of just the amount indicated by the mode of X. This is only used | |
1485 | for bitfield stores into memory. | |
7afe21cc RK |
1486 | |
1487 | A nonvarying address may be just a register or just | |
1488 | a symbol reference, or it may be either of those plus | |
1489 | a numeric offset. */ | |
1490 | ||
1491 | static void | |
bb4034b3 | 1492 | invalidate (x, full_mode) |
7afe21cc | 1493 | rtx x; |
bb4034b3 | 1494 | enum machine_mode full_mode; |
7afe21cc RK |
1495 | { |
1496 | register int i; | |
1497 | register struct table_elt *p; | |
f451db89 JL |
1498 | rtx base; |
1499 | HOST_WIDE_INT start, end; | |
7afe21cc RK |
1500 | |
1501 | /* If X is a register, dependencies on its contents | |
1502 | are recorded through the qty number mechanism. | |
1503 | Just change the qty number of the register, | |
1504 | mark it as invalid for expressions that refer to it, | |
1505 | and remove it itself. */ | |
1506 | ||
1507 | if (GET_CODE (x) == REG) | |
1508 | { | |
1509 | register int regno = REGNO (x); | |
2197a88a | 1510 | register unsigned hash = HASH (x, GET_MODE (x)); |
7afe21cc RK |
1511 | |
1512 | /* Remove REGNO from any quantity list it might be on and indicate | |
1513 | that it's value might have changed. If it is a pseudo, remove its | |
1514 | entry from the hash table. | |
1515 | ||
1516 | For a hard register, we do the first two actions above for any | |
1517 | additional hard registers corresponding to X. Then, if any of these | |
1518 | registers are in the table, we must remove any REG entries that | |
1519 | overlap these registers. */ | |
1520 | ||
1521 | delete_reg_equiv (regno); | |
1522 | reg_tick[regno]++; | |
1523 | ||
1524 | if (regno >= FIRST_PSEUDO_REGISTER) | |
1525 | remove_from_table (lookup_for_remove (x, hash, GET_MODE (x)), hash); | |
1526 | else | |
1527 | { | |
54b1de55 RK |
1528 | HOST_WIDE_INT in_table |
1529 | = TEST_HARD_REG_BIT (hard_regs_in_table, regno); | |
7afe21cc RK |
1530 | int endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (x)); |
1531 | int tregno, tendregno; | |
1532 | register struct table_elt *p, *next; | |
1533 | ||
1534 | CLEAR_HARD_REG_BIT (hard_regs_in_table, regno); | |
1535 | ||
1536 | for (i = regno + 1; i < endregno; i++) | |
1537 | { | |
1538 | in_table |= TEST_HARD_REG_BIT (hard_regs_in_table, i); | |
1539 | CLEAR_HARD_REG_BIT (hard_regs_in_table, i); | |
1540 | delete_reg_equiv (i); | |
1541 | reg_tick[i]++; | |
1542 | } | |
1543 | ||
1544 | if (in_table) | |
1545 | for (hash = 0; hash < NBUCKETS; hash++) | |
1546 | for (p = table[hash]; p; p = next) | |
1547 | { | |
1548 | next = p->next_same_hash; | |
1549 | ||
1550 | if (GET_CODE (p->exp) != REG | |
1551 | || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER) | |
1552 | continue; | |
1553 | ||
1554 | tregno = REGNO (p->exp); | |
1555 | tendregno | |
1556 | = tregno + HARD_REGNO_NREGS (tregno, GET_MODE (p->exp)); | |
1557 | if (tendregno > regno && tregno < endregno) | |
1558 | remove_from_table (p, hash); | |
1559 | } | |
1560 | } | |
1561 | ||
1562 | return; | |
1563 | } | |
1564 | ||
1565 | if (GET_CODE (x) == SUBREG) | |
1566 | { | |
1567 | if (GET_CODE (SUBREG_REG (x)) != REG) | |
1568 | abort (); | |
bb4034b3 | 1569 | invalidate (SUBREG_REG (x), VOIDmode); |
7afe21cc RK |
1570 | return; |
1571 | } | |
1572 | ||
1573 | /* X is not a register; it must be a memory reference with | |
1574 | a nonvarying address. Remove all hash table elements | |
1575 | that refer to overlapping pieces of memory. */ | |
1576 | ||
1577 | if (GET_CODE (x) != MEM) | |
1578 | abort (); | |
7afe21cc | 1579 | |
bb4034b3 JW |
1580 | if (full_mode == VOIDmode) |
1581 | full_mode = GET_MODE (x); | |
1582 | ||
1583 | set_nonvarying_address_components (XEXP (x, 0), GET_MODE_SIZE (full_mode), | |
f451db89 | 1584 | &base, &start, &end); |
7afe21cc | 1585 | |
7afe21cc RK |
1586 | for (i = 0; i < NBUCKETS; i++) |
1587 | { | |
1588 | register struct table_elt *next; | |
1589 | for (p = table[i]; p; p = next) | |
1590 | { | |
1591 | next = p->next_same_hash; | |
1592 | if (refers_to_mem_p (p->exp, base, start, end)) | |
1593 | remove_from_table (p, i); | |
1594 | } | |
1595 | } | |
1596 | } | |
1597 | ||
1598 | /* Remove all expressions that refer to register REGNO, | |
1599 | since they are already invalid, and we are about to | |
1600 | mark that register valid again and don't want the old | |
1601 | expressions to reappear as valid. */ | |
1602 | ||
1603 | static void | |
1604 | remove_invalid_refs (regno) | |
1605 | int regno; | |
1606 | { | |
1607 | register int i; | |
1608 | register struct table_elt *p, *next; | |
1609 | ||
1610 | for (i = 0; i < NBUCKETS; i++) | |
1611 | for (p = table[i]; p; p = next) | |
1612 | { | |
1613 | next = p->next_same_hash; | |
1614 | if (GET_CODE (p->exp) != REG | |
906c4e36 | 1615 | && refers_to_regno_p (regno, regno + 1, p->exp, NULL_PTR)) |
7afe21cc RK |
1616 | remove_from_table (p, i); |
1617 | } | |
1618 | } | |
1619 | \f | |
1620 | /* Recompute the hash codes of any valid entries in the hash table that | |
1621 | reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG. | |
1622 | ||
1623 | This is called when we make a jump equivalence. */ | |
1624 | ||
1625 | static void | |
1626 | rehash_using_reg (x) | |
1627 | rtx x; | |
1628 | { | |
1629 | int i; | |
1630 | struct table_elt *p, *next; | |
2197a88a | 1631 | unsigned hash; |
7afe21cc RK |
1632 | |
1633 | if (GET_CODE (x) == SUBREG) | |
1634 | x = SUBREG_REG (x); | |
1635 | ||
1636 | /* If X is not a register or if the register is known not to be in any | |
1637 | valid entries in the table, we have no work to do. */ | |
1638 | ||
1639 | if (GET_CODE (x) != REG | |
1640 | || reg_in_table[REGNO (x)] < 0 | |
1641 | || reg_in_table[REGNO (x)] != reg_tick[REGNO (x)]) | |
1642 | return; | |
1643 | ||
1644 | /* Scan all hash chains looking for valid entries that mention X. | |
1645 | If we find one and it is in the wrong hash chain, move it. We can skip | |
1646 | objects that are registers, since they are handled specially. */ | |
1647 | ||
1648 | for (i = 0; i < NBUCKETS; i++) | |
1649 | for (p = table[i]; p; p = next) | |
1650 | { | |
1651 | next = p->next_same_hash; | |
1652 | if (GET_CODE (p->exp) != REG && reg_mentioned_p (x, p->exp) | |
538b78e7 | 1653 | && exp_equiv_p (p->exp, p->exp, 1, 0) |
7afe21cc RK |
1654 | && i != (hash = safe_hash (p->exp, p->mode) % NBUCKETS)) |
1655 | { | |
1656 | if (p->next_same_hash) | |
1657 | p->next_same_hash->prev_same_hash = p->prev_same_hash; | |
1658 | ||
1659 | if (p->prev_same_hash) | |
1660 | p->prev_same_hash->next_same_hash = p->next_same_hash; | |
1661 | else | |
1662 | table[i] = p->next_same_hash; | |
1663 | ||
1664 | p->next_same_hash = table[hash]; | |
1665 | p->prev_same_hash = 0; | |
1666 | if (table[hash]) | |
1667 | table[hash]->prev_same_hash = p; | |
1668 | table[hash] = p; | |
1669 | } | |
1670 | } | |
1671 | } | |
1672 | \f | |
1673 | /* Remove from the hash table all expressions that reference memory, | |
1674 | or some of them as specified by *WRITES. */ | |
1675 | ||
1676 | static void | |
1677 | invalidate_memory (writes) | |
1678 | struct write_data *writes; | |
1679 | { | |
1680 | register int i; | |
1681 | register struct table_elt *p, *next; | |
1682 | int all = writes->all; | |
1683 | int nonscalar = writes->nonscalar; | |
1684 | ||
1685 | for (i = 0; i < NBUCKETS; i++) | |
1686 | for (p = table[i]; p; p = next) | |
1687 | { | |
1688 | next = p->next_same_hash; | |
1689 | if (p->in_memory | |
1690 | && (all | |
1691 | || (nonscalar && p->in_struct) | |
1692 | || cse_rtx_addr_varies_p (p->exp))) | |
1693 | remove_from_table (p, i); | |
1694 | } | |
1695 | } | |
1696 | \f | |
1697 | /* Remove from the hash table any expression that is a call-clobbered | |
1698 | register. Also update their TICK values. */ | |
1699 | ||
1700 | static void | |
1701 | invalidate_for_call () | |
1702 | { | |
1703 | int regno, endregno; | |
1704 | int i; | |
2197a88a | 1705 | unsigned hash; |
7afe21cc RK |
1706 | struct table_elt *p, *next; |
1707 | int in_table = 0; | |
1708 | ||
1709 | /* Go through all the hard registers. For each that is clobbered in | |
1710 | a CALL_INSN, remove the register from quantity chains and update | |
1711 | reg_tick if defined. Also see if any of these registers is currently | |
1712 | in the table. */ | |
1713 | ||
1714 | for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) | |
1715 | if (TEST_HARD_REG_BIT (regs_invalidated_by_call, regno)) | |
1716 | { | |
1717 | delete_reg_equiv (regno); | |
1718 | if (reg_tick[regno] >= 0) | |
1719 | reg_tick[regno]++; | |
1720 | ||
0e227018 | 1721 | in_table |= (TEST_HARD_REG_BIT (hard_regs_in_table, regno) != 0); |
7afe21cc RK |
1722 | } |
1723 | ||
1724 | /* In the case where we have no call-clobbered hard registers in the | |
1725 | table, we are done. Otherwise, scan the table and remove any | |
1726 | entry that overlaps a call-clobbered register. */ | |
1727 | ||
1728 | if (in_table) | |
1729 | for (hash = 0; hash < NBUCKETS; hash++) | |
1730 | for (p = table[hash]; p; p = next) | |
1731 | { | |
1732 | next = p->next_same_hash; | |
1733 | ||
1734 | if (GET_CODE (p->exp) != REG | |
1735 | || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER) | |
1736 | continue; | |
1737 | ||
1738 | regno = REGNO (p->exp); | |
1739 | endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (p->exp)); | |
1740 | ||
1741 | for (i = regno; i < endregno; i++) | |
1742 | if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i)) | |
1743 | { | |
1744 | remove_from_table (p, hash); | |
1745 | break; | |
1746 | } | |
1747 | } | |
1748 | } | |
1749 | \f | |
1750 | /* Given an expression X of type CONST, | |
1751 | and ELT which is its table entry (or 0 if it | |
1752 | is not in the hash table), | |
1753 | return an alternate expression for X as a register plus integer. | |
1754 | If none can be found, return 0. */ | |
1755 | ||
1756 | static rtx | |
1757 | use_related_value (x, elt) | |
1758 | rtx x; | |
1759 | struct table_elt *elt; | |
1760 | { | |
1761 | register struct table_elt *relt = 0; | |
1762 | register struct table_elt *p, *q; | |
906c4e36 | 1763 | HOST_WIDE_INT offset; |
7afe21cc RK |
1764 | |
1765 | /* First, is there anything related known? | |
1766 | If we have a table element, we can tell from that. | |
1767 | Otherwise, must look it up. */ | |
1768 | ||
1769 | if (elt != 0 && elt->related_value != 0) | |
1770 | relt = elt; | |
1771 | else if (elt == 0 && GET_CODE (x) == CONST) | |
1772 | { | |
1773 | rtx subexp = get_related_value (x); | |
1774 | if (subexp != 0) | |
1775 | relt = lookup (subexp, | |
1776 | safe_hash (subexp, GET_MODE (subexp)) % NBUCKETS, | |
1777 | GET_MODE (subexp)); | |
1778 | } | |
1779 | ||
1780 | if (relt == 0) | |
1781 | return 0; | |
1782 | ||
1783 | /* Search all related table entries for one that has an | |
1784 | equivalent register. */ | |
1785 | ||
1786 | p = relt; | |
1787 | while (1) | |
1788 | { | |
1789 | /* This loop is strange in that it is executed in two different cases. | |
1790 | The first is when X is already in the table. Then it is searching | |
1791 | the RELATED_VALUE list of X's class (RELT). The second case is when | |
1792 | X is not in the table. Then RELT points to a class for the related | |
1793 | value. | |
1794 | ||
1795 | Ensure that, whatever case we are in, that we ignore classes that have | |
1796 | the same value as X. */ | |
1797 | ||
1798 | if (rtx_equal_p (x, p->exp)) | |
1799 | q = 0; | |
1800 | else | |
1801 | for (q = p->first_same_value; q; q = q->next_same_value) | |
1802 | if (GET_CODE (q->exp) == REG) | |
1803 | break; | |
1804 | ||
1805 | if (q) | |
1806 | break; | |
1807 | ||
1808 | p = p->related_value; | |
1809 | ||
1810 | /* We went all the way around, so there is nothing to be found. | |
1811 | Alternatively, perhaps RELT was in the table for some other reason | |
1812 | and it has no related values recorded. */ | |
1813 | if (p == relt || p == 0) | |
1814 | break; | |
1815 | } | |
1816 | ||
1817 | if (q == 0) | |
1818 | return 0; | |
1819 | ||
1820 | offset = (get_integer_term (x) - get_integer_term (p->exp)); | |
1821 | /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */ | |
1822 | return plus_constant (q->exp, offset); | |
1823 | } | |
1824 | \f | |
1825 | /* Hash an rtx. We are careful to make sure the value is never negative. | |
1826 | Equivalent registers hash identically. | |
1827 | MODE is used in hashing for CONST_INTs only; | |
1828 | otherwise the mode of X is used. | |
1829 | ||
1830 | Store 1 in do_not_record if any subexpression is volatile. | |
1831 | ||
1832 | Store 1 in hash_arg_in_memory if X contains a MEM rtx | |
1833 | which does not have the RTX_UNCHANGING_P bit set. | |
1834 | In this case, also store 1 in hash_arg_in_struct | |
1835 | if there is a MEM rtx which has the MEM_IN_STRUCT_P bit set. | |
1836 | ||
1837 | Note that cse_insn knows that the hash code of a MEM expression | |
1838 | is just (int) MEM plus the hash code of the address. */ | |
1839 | ||
2197a88a | 1840 | static unsigned |
7afe21cc RK |
1841 | canon_hash (x, mode) |
1842 | rtx x; | |
1843 | enum machine_mode mode; | |
1844 | { | |
1845 | register int i, j; | |
2197a88a | 1846 | register unsigned hash = 0; |
7afe21cc RK |
1847 | register enum rtx_code code; |
1848 | register char *fmt; | |
1849 | ||
1850 | /* repeat is used to turn tail-recursion into iteration. */ | |
1851 | repeat: | |
1852 | if (x == 0) | |
1853 | return hash; | |
1854 | ||
1855 | code = GET_CODE (x); | |
1856 | switch (code) | |
1857 | { | |
1858 | case REG: | |
1859 | { | |
1860 | register int regno = REGNO (x); | |
1861 | ||
1862 | /* On some machines, we can't record any non-fixed hard register, | |
1863 | because extending its life will cause reload problems. We | |
1864 | consider ap, fp, and sp to be fixed for this purpose. | |
1865 | On all machines, we can't record any global registers. */ | |
1866 | ||
1867 | if (regno < FIRST_PSEUDO_REGISTER | |
1868 | && (global_regs[regno] | |
1869 | #ifdef SMALL_REGISTER_CLASSES | |
1870 | || (! fixed_regs[regno] | |
1871 | && regno != FRAME_POINTER_REGNUM | |
8bc169f2 | 1872 | && regno != HARD_FRAME_POINTER_REGNUM |
7afe21cc RK |
1873 | && regno != ARG_POINTER_REGNUM |
1874 | && regno != STACK_POINTER_REGNUM) | |
1875 | #endif | |
1876 | )) | |
1877 | { | |
1878 | do_not_record = 1; | |
1879 | return 0; | |
1880 | } | |
2197a88a RK |
1881 | hash += ((unsigned) REG << 7) + (unsigned) reg_qty[regno]; |
1882 | return hash; | |
7afe21cc RK |
1883 | } |
1884 | ||
1885 | case CONST_INT: | |
2197a88a RK |
1886 | { |
1887 | unsigned HOST_WIDE_INT tem = INTVAL (x); | |
1888 | hash += ((unsigned) CONST_INT << 7) + (unsigned) mode + tem; | |
1889 | return hash; | |
1890 | } | |
7afe21cc RK |
1891 | |
1892 | case CONST_DOUBLE: | |
1893 | /* This is like the general case, except that it only counts | |
1894 | the integers representing the constant. */ | |
2197a88a RK |
1895 | hash += (unsigned) code + (unsigned) GET_MODE (x); |
1896 | for (i = 2; i < GET_RTX_LENGTH (CONST_DOUBLE); i++) | |
1897 | { | |
1898 | unsigned tem = XINT (x, i); | |
1899 | hash += tem; | |
1900 | } | |
7afe21cc RK |
1901 | return hash; |
1902 | ||
1903 | /* Assume there is only one rtx object for any given label. */ | |
1904 | case LABEL_REF: | |
3c543775 RK |
1905 | hash |
1906 | += ((unsigned) LABEL_REF << 7) + (unsigned HOST_WIDE_INT) XEXP (x, 0); | |
2197a88a | 1907 | return hash; |
7afe21cc RK |
1908 | |
1909 | case SYMBOL_REF: | |
3c543775 | 1910 | hash |
f54d4924 | 1911 | += ((unsigned) SYMBOL_REF << 7) + (unsigned HOST_WIDE_INT) XSTR (x, 0); |
2197a88a | 1912 | return hash; |
7afe21cc RK |
1913 | |
1914 | case MEM: | |
1915 | if (MEM_VOLATILE_P (x)) | |
1916 | { | |
1917 | do_not_record = 1; | |
1918 | return 0; | |
1919 | } | |
1920 | if (! RTX_UNCHANGING_P (x)) | |
1921 | { | |
1922 | hash_arg_in_memory = 1; | |
1923 | if (MEM_IN_STRUCT_P (x)) hash_arg_in_struct = 1; | |
1924 | } | |
1925 | /* Now that we have already found this special case, | |
1926 | might as well speed it up as much as possible. */ | |
2197a88a | 1927 | hash += (unsigned) MEM; |
7afe21cc RK |
1928 | x = XEXP (x, 0); |
1929 | goto repeat; | |
1930 | ||
1931 | case PRE_DEC: | |
1932 | case PRE_INC: | |
1933 | case POST_DEC: | |
1934 | case POST_INC: | |
1935 | case PC: | |
1936 | case CC0: | |
1937 | case CALL: | |
1938 | case UNSPEC_VOLATILE: | |
1939 | do_not_record = 1; | |
1940 | return 0; | |
1941 | ||
1942 | case ASM_OPERANDS: | |
1943 | if (MEM_VOLATILE_P (x)) | |
1944 | { | |
1945 | do_not_record = 1; | |
1946 | return 0; | |
1947 | } | |
1948 | } | |
1949 | ||
1950 | i = GET_RTX_LENGTH (code) - 1; | |
2197a88a | 1951 | hash += (unsigned) code + (unsigned) GET_MODE (x); |
7afe21cc RK |
1952 | fmt = GET_RTX_FORMAT (code); |
1953 | for (; i >= 0; i--) | |
1954 | { | |
1955 | if (fmt[i] == 'e') | |
1956 | { | |
1957 | rtx tem = XEXP (x, i); | |
1958 | rtx tem1; | |
1959 | ||
1960 | /* If the operand is a REG that is equivalent to a constant, hash | |
1961 | as if we were hashing the constant, since we will be comparing | |
1962 | that way. */ | |
1963 | if (tem != 0 && GET_CODE (tem) == REG | |
1964 | && REGNO_QTY_VALID_P (REGNO (tem)) | |
1965 | && qty_mode[reg_qty[REGNO (tem)]] == GET_MODE (tem) | |
1966 | && (tem1 = qty_const[reg_qty[REGNO (tem)]]) != 0 | |
1967 | && CONSTANT_P (tem1)) | |
1968 | tem = tem1; | |
1969 | ||
1970 | /* If we are about to do the last recursive call | |
1971 | needed at this level, change it into iteration. | |
1972 | This function is called enough to be worth it. */ | |
1973 | if (i == 0) | |
1974 | { | |
1975 | x = tem; | |
1976 | goto repeat; | |
1977 | } | |
1978 | hash += canon_hash (tem, 0); | |
1979 | } | |
1980 | else if (fmt[i] == 'E') | |
1981 | for (j = 0; j < XVECLEN (x, i); j++) | |
1982 | hash += canon_hash (XVECEXP (x, i, j), 0); | |
1983 | else if (fmt[i] == 's') | |
1984 | { | |
2197a88a | 1985 | register unsigned char *p = (unsigned char *) XSTR (x, i); |
7afe21cc RK |
1986 | if (p) |
1987 | while (*p) | |
2197a88a | 1988 | hash += *p++; |
7afe21cc RK |
1989 | } |
1990 | else if (fmt[i] == 'i') | |
1991 | { | |
2197a88a RK |
1992 | register unsigned tem = XINT (x, i); |
1993 | hash += tem; | |
7afe21cc RK |
1994 | } |
1995 | else | |
1996 | abort (); | |
1997 | } | |
1998 | return hash; | |
1999 | } | |
2000 | ||
2001 | /* Like canon_hash but with no side effects. */ | |
2002 | ||
2197a88a | 2003 | static unsigned |
7afe21cc RK |
2004 | safe_hash (x, mode) |
2005 | rtx x; | |
2006 | enum machine_mode mode; | |
2007 | { | |
2008 | int save_do_not_record = do_not_record; | |
2009 | int save_hash_arg_in_memory = hash_arg_in_memory; | |
2010 | int save_hash_arg_in_struct = hash_arg_in_struct; | |
2197a88a | 2011 | unsigned hash = canon_hash (x, mode); |
7afe21cc RK |
2012 | hash_arg_in_memory = save_hash_arg_in_memory; |
2013 | hash_arg_in_struct = save_hash_arg_in_struct; | |
2014 | do_not_record = save_do_not_record; | |
2015 | return hash; | |
2016 | } | |
2017 | \f | |
2018 | /* Return 1 iff X and Y would canonicalize into the same thing, | |
2019 | without actually constructing the canonicalization of either one. | |
2020 | If VALIDATE is nonzero, | |
2021 | we assume X is an expression being processed from the rtl | |
2022 | and Y was found in the hash table. We check register refs | |
2023 | in Y for being marked as valid. | |
2024 | ||
2025 | If EQUAL_VALUES is nonzero, we allow a register to match a constant value | |
2026 | that is known to be in the register. Ordinarily, we don't allow them | |
2027 | to match, because letting them match would cause unpredictable results | |
2028 | in all the places that search a hash table chain for an equivalent | |
2029 | for a given value. A possible equivalent that has different structure | |
2030 | has its hash code computed from different data. Whether the hash code | |
2031 | is the same as that of the the given value is pure luck. */ | |
2032 | ||
2033 | static int | |
2034 | exp_equiv_p (x, y, validate, equal_values) | |
2035 | rtx x, y; | |
2036 | int validate; | |
2037 | int equal_values; | |
2038 | { | |
906c4e36 | 2039 | register int i, j; |
7afe21cc RK |
2040 | register enum rtx_code code; |
2041 | register char *fmt; | |
2042 | ||
2043 | /* Note: it is incorrect to assume an expression is equivalent to itself | |
2044 | if VALIDATE is nonzero. */ | |
2045 | if (x == y && !validate) | |
2046 | return 1; | |
2047 | if (x == 0 || y == 0) | |
2048 | return x == y; | |
2049 | ||
2050 | code = GET_CODE (x); | |
2051 | if (code != GET_CODE (y)) | |
2052 | { | |
2053 | if (!equal_values) | |
2054 | return 0; | |
2055 | ||
2056 | /* If X is a constant and Y is a register or vice versa, they may be | |
2057 | equivalent. We only have to validate if Y is a register. */ | |
2058 | if (CONSTANT_P (x) && GET_CODE (y) == REG | |
2059 | && REGNO_QTY_VALID_P (REGNO (y)) | |
2060 | && GET_MODE (y) == qty_mode[reg_qty[REGNO (y)]] | |
2061 | && rtx_equal_p (x, qty_const[reg_qty[REGNO (y)]]) | |
2062 | && (! validate || reg_in_table[REGNO (y)] == reg_tick[REGNO (y)])) | |
2063 | return 1; | |
2064 | ||
2065 | if (CONSTANT_P (y) && code == REG | |
2066 | && REGNO_QTY_VALID_P (REGNO (x)) | |
2067 | && GET_MODE (x) == qty_mode[reg_qty[REGNO (x)]] | |
2068 | && rtx_equal_p (y, qty_const[reg_qty[REGNO (x)]])) | |
2069 | return 1; | |
2070 | ||
2071 | return 0; | |
2072 | } | |
2073 | ||
2074 | /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */ | |
2075 | if (GET_MODE (x) != GET_MODE (y)) | |
2076 | return 0; | |
2077 | ||
2078 | switch (code) | |
2079 | { | |
2080 | case PC: | |
2081 | case CC0: | |
2082 | return x == y; | |
2083 | ||
2084 | case CONST_INT: | |
58c8c593 | 2085 | return INTVAL (x) == INTVAL (y); |
7afe21cc RK |
2086 | |
2087 | case LABEL_REF: | |
7afe21cc RK |
2088 | return XEXP (x, 0) == XEXP (y, 0); |
2089 | ||
f54d4924 RK |
2090 | case SYMBOL_REF: |
2091 | return XSTR (x, 0) == XSTR (y, 0); | |
2092 | ||
7afe21cc RK |
2093 | case REG: |
2094 | { | |
2095 | int regno = REGNO (y); | |
2096 | int endregno | |
2097 | = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1 | |
2098 | : HARD_REGNO_NREGS (regno, GET_MODE (y))); | |
2099 | int i; | |
2100 | ||
2101 | /* If the quantities are not the same, the expressions are not | |
2102 | equivalent. If there are and we are not to validate, they | |
2103 | are equivalent. Otherwise, ensure all regs are up-to-date. */ | |
2104 | ||
2105 | if (reg_qty[REGNO (x)] != reg_qty[regno]) | |
2106 | return 0; | |
2107 | ||
2108 | if (! validate) | |
2109 | return 1; | |
2110 | ||
2111 | for (i = regno; i < endregno; i++) | |
2112 | if (reg_in_table[i] != reg_tick[i]) | |
2113 | return 0; | |
2114 | ||
2115 | return 1; | |
2116 | } | |
2117 | ||
2118 | /* For commutative operations, check both orders. */ | |
2119 | case PLUS: | |
2120 | case MULT: | |
2121 | case AND: | |
2122 | case IOR: | |
2123 | case XOR: | |
2124 | case NE: | |
2125 | case EQ: | |
2126 | return ((exp_equiv_p (XEXP (x, 0), XEXP (y, 0), validate, equal_values) | |
2127 | && exp_equiv_p (XEXP (x, 1), XEXP (y, 1), | |
2128 | validate, equal_values)) | |
2129 | || (exp_equiv_p (XEXP (x, 0), XEXP (y, 1), | |
2130 | validate, equal_values) | |
2131 | && exp_equiv_p (XEXP (x, 1), XEXP (y, 0), | |
2132 | validate, equal_values))); | |
2133 | } | |
2134 | ||
2135 | /* Compare the elements. If any pair of corresponding elements | |
2136 | fail to match, return 0 for the whole things. */ | |
2137 | ||
2138 | fmt = GET_RTX_FORMAT (code); | |
2139 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
2140 | { | |
906c4e36 | 2141 | switch (fmt[i]) |
7afe21cc | 2142 | { |
906c4e36 | 2143 | case 'e': |
7afe21cc RK |
2144 | if (! exp_equiv_p (XEXP (x, i), XEXP (y, i), validate, equal_values)) |
2145 | return 0; | |
906c4e36 RK |
2146 | break; |
2147 | ||
2148 | case 'E': | |
7afe21cc RK |
2149 | if (XVECLEN (x, i) != XVECLEN (y, i)) |
2150 | return 0; | |
2151 | for (j = 0; j < XVECLEN (x, i); j++) | |
2152 | if (! exp_equiv_p (XVECEXP (x, i, j), XVECEXP (y, i, j), | |
2153 | validate, equal_values)) | |
2154 | return 0; | |
906c4e36 RK |
2155 | break; |
2156 | ||
2157 | case 's': | |
7afe21cc RK |
2158 | if (strcmp (XSTR (x, i), XSTR (y, i))) |
2159 | return 0; | |
906c4e36 RK |
2160 | break; |
2161 | ||
2162 | case 'i': | |
7afe21cc RK |
2163 | if (XINT (x, i) != XINT (y, i)) |
2164 | return 0; | |
906c4e36 RK |
2165 | break; |
2166 | ||
2167 | case 'w': | |
2168 | if (XWINT (x, i) != XWINT (y, i)) | |
2169 | return 0; | |
2170 | break; | |
2171 | ||
2172 | case '0': | |
2173 | break; | |
2174 | ||
2175 | default: | |
2176 | abort (); | |
7afe21cc | 2177 | } |
906c4e36 RK |
2178 | } |
2179 | ||
7afe21cc RK |
2180 | return 1; |
2181 | } | |
2182 | \f | |
2183 | /* Return 1 iff any subexpression of X matches Y. | |
2184 | Here we do not require that X or Y be valid (for registers referred to) | |
2185 | for being in the hash table. */ | |
2186 | ||
6cd4575e | 2187 | static int |
7afe21cc RK |
2188 | refers_to_p (x, y) |
2189 | rtx x, y; | |
2190 | { | |
2191 | register int i; | |
2192 | register enum rtx_code code; | |
2193 | register char *fmt; | |
2194 | ||
2195 | repeat: | |
2196 | if (x == y) | |
2197 | return 1; | |
2198 | if (x == 0 || y == 0) | |
2199 | return 0; | |
2200 | ||
2201 | code = GET_CODE (x); | |
2202 | /* If X as a whole has the same code as Y, they may match. | |
2203 | If so, return 1. */ | |
2204 | if (code == GET_CODE (y)) | |
2205 | { | |
2206 | if (exp_equiv_p (x, y, 0, 1)) | |
2207 | return 1; | |
2208 | } | |
2209 | ||
2210 | /* X does not match, so try its subexpressions. */ | |
2211 | ||
2212 | fmt = GET_RTX_FORMAT (code); | |
2213 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
2214 | if (fmt[i] == 'e') | |
2215 | { | |
2216 | if (i == 0) | |
2217 | { | |
2218 | x = XEXP (x, 0); | |
2219 | goto repeat; | |
2220 | } | |
2221 | else | |
2222 | if (refers_to_p (XEXP (x, i), y)) | |
2223 | return 1; | |
2224 | } | |
2225 | else if (fmt[i] == 'E') | |
2226 | { | |
2227 | int j; | |
2228 | for (j = 0; j < XVECLEN (x, i); j++) | |
2229 | if (refers_to_p (XVECEXP (x, i, j), y)) | |
2230 | return 1; | |
2231 | } | |
2232 | ||
2233 | return 0; | |
2234 | } | |
2235 | \f | |
f451db89 JL |
2236 | /* Given ADDR and SIZE (a memory address, and the size of the memory reference), |
2237 | set PBASE, PSTART, and PEND which correspond to the base of the address, | |
2238 | the starting offset, and ending offset respectively. | |
2239 | ||
bb4034b3 | 2240 | ADDR is known to be a nonvarying address. */ |
f451db89 | 2241 | |
bb4034b3 JW |
2242 | /* ??? Despite what the comments say, this function is in fact frequently |
2243 | passed varying addresses. This does not appear to cause any problems. */ | |
f451db89 JL |
2244 | |
2245 | static void | |
2246 | set_nonvarying_address_components (addr, size, pbase, pstart, pend) | |
2247 | rtx addr; | |
2248 | int size; | |
2249 | rtx *pbase; | |
6500fb43 | 2250 | HOST_WIDE_INT *pstart, *pend; |
f451db89 JL |
2251 | { |
2252 | rtx base; | |
c85663b1 | 2253 | HOST_WIDE_INT start, end; |
f451db89 JL |
2254 | |
2255 | base = addr; | |
2256 | start = 0; | |
2257 | end = 0; | |
2258 | ||
2259 | /* Registers with nonvarying addresses usually have constant equivalents; | |
2260 | but the frame pointer register is also possible. */ | |
2261 | if (GET_CODE (base) == REG | |
2262 | && qty_const != 0 | |
2263 | && REGNO_QTY_VALID_P (REGNO (base)) | |
2264 | && qty_mode[reg_qty[REGNO (base)]] == GET_MODE (base) | |
2265 | && qty_const[reg_qty[REGNO (base)]] != 0) | |
2266 | base = qty_const[reg_qty[REGNO (base)]]; | |
2267 | else if (GET_CODE (base) == PLUS | |
2268 | && GET_CODE (XEXP (base, 1)) == CONST_INT | |
2269 | && GET_CODE (XEXP (base, 0)) == REG | |
2270 | && qty_const != 0 | |
2271 | && REGNO_QTY_VALID_P (REGNO (XEXP (base, 0))) | |
2272 | && (qty_mode[reg_qty[REGNO (XEXP (base, 0))]] | |
2273 | == GET_MODE (XEXP (base, 0))) | |
2274 | && qty_const[reg_qty[REGNO (XEXP (base, 0))]]) | |
2275 | { | |
2276 | start = INTVAL (XEXP (base, 1)); | |
2277 | base = qty_const[reg_qty[REGNO (XEXP (base, 0))]]; | |
2278 | } | |
2279 | ||
c85663b1 RK |
2280 | /* Handle everything that we can find inside an address that has been |
2281 | viewed as constant. */ | |
f451db89 | 2282 | |
c85663b1 | 2283 | while (1) |
f451db89 | 2284 | { |
c85663b1 RK |
2285 | /* If no part of this switch does a "continue", the code outside |
2286 | will exit this loop. */ | |
2287 | ||
2288 | switch (GET_CODE (base)) | |
2289 | { | |
2290 | case LO_SUM: | |
2291 | /* By definition, operand1 of a LO_SUM is the associated constant | |
2292 | address. Use the associated constant address as the base | |
2293 | instead. */ | |
2294 | base = XEXP (base, 1); | |
2295 | continue; | |
2296 | ||
2297 | case CONST: | |
2298 | /* Strip off CONST. */ | |
2299 | base = XEXP (base, 0); | |
2300 | continue; | |
2301 | ||
2302 | case PLUS: | |
2303 | if (GET_CODE (XEXP (base, 1)) == CONST_INT) | |
2304 | { | |
2305 | start += INTVAL (XEXP (base, 1)); | |
2306 | base = XEXP (base, 0); | |
2307 | continue; | |
2308 | } | |
2309 | break; | |
2310 | ||
2311 | case AND: | |
2312 | /* Handle the case of an AND which is the negative of a power of | |
2313 | two. This is used to represent unaligned memory operations. */ | |
2314 | if (GET_CODE (XEXP (base, 1)) == CONST_INT | |
2315 | && exact_log2 (- INTVAL (XEXP (base, 1))) > 0) | |
2316 | { | |
2317 | set_nonvarying_address_components (XEXP (base, 0), size, | |
2318 | pbase, pstart, pend); | |
2319 | ||
2320 | /* Assume the worst misalignment. START is affected, but not | |
2321 | END, so compensate but adjusting SIZE. Don't lose any | |
2322 | constant we already had. */ | |
2323 | ||
2324 | size = *pend - *pstart - INTVAL (XEXP (base, 1)) - 1; | |
2325 | start += *pstart - INTVAL (XEXP (base, 1)) - 1; | |
2326 | base = *pbase; | |
2327 | } | |
2328 | break; | |
2329 | } | |
2330 | ||
2331 | break; | |
f451db89 JL |
2332 | } |
2333 | ||
336d6f0a RK |
2334 | if (GET_CODE (base) == CONST_INT) |
2335 | { | |
2336 | start += INTVAL (base); | |
2337 | base = const0_rtx; | |
2338 | } | |
2339 | ||
f451db89 JL |
2340 | end = start + size; |
2341 | ||
2342 | /* Set the return values. */ | |
2343 | *pbase = base; | |
2344 | *pstart = start; | |
2345 | *pend = end; | |
2346 | } | |
2347 | ||
7afe21cc RK |
2348 | /* Return 1 iff any subexpression of X refers to memory |
2349 | at an address of BASE plus some offset | |
2350 | such that any of the bytes' offsets fall between START (inclusive) | |
2351 | and END (exclusive). | |
2352 | ||
f451db89 JL |
2353 | The value is undefined if X is a varying address (as determined by |
2354 | cse_rtx_addr_varies_p). This function is not used in such cases. | |
7afe21cc RK |
2355 | |
2356 | When used in the cse pass, `qty_const' is nonzero, and it is used | |
2357 | to treat an address that is a register with a known constant value | |
2358 | as if it were that constant value. | |
2359 | In the loop pass, `qty_const' is zero, so this is not done. */ | |
2360 | ||
f451db89 | 2361 | static int |
7afe21cc RK |
2362 | refers_to_mem_p (x, base, start, end) |
2363 | rtx x, base; | |
906c4e36 | 2364 | HOST_WIDE_INT start, end; |
7afe21cc | 2365 | { |
906c4e36 | 2366 | register HOST_WIDE_INT i; |
7afe21cc RK |
2367 | register enum rtx_code code; |
2368 | register char *fmt; | |
2369 | ||
7afe21cc RK |
2370 | repeat: |
2371 | if (x == 0) | |
2372 | return 0; | |
2373 | ||
2374 | code = GET_CODE (x); | |
2375 | if (code == MEM) | |
2376 | { | |
2377 | register rtx addr = XEXP (x, 0); /* Get the address. */ | |
f451db89 | 2378 | rtx mybase; |
6500fb43 | 2379 | HOST_WIDE_INT mystart, myend; |
7afe21cc | 2380 | |
f451db89 JL |
2381 | set_nonvarying_address_components (addr, GET_MODE_SIZE (GET_MODE (x)), |
2382 | &mybase, &mystart, &myend); | |
2383 | ||
2384 | ||
2385 | /* refers_to_mem_p is never called with varying addresses. | |
2386 | If the base addresses are not equal, there is no chance | |
2387 | of the memory addresses conflicting. */ | |
7b0d7bd0 | 2388 | if (! rtx_equal_p (mybase, base)) |
7afe21cc RK |
2389 | return 0; |
2390 | ||
f451db89 | 2391 | return myend > start && mystart < end; |
7afe21cc RK |
2392 | } |
2393 | ||
2394 | /* X does not match, so try its subexpressions. */ | |
2395 | ||
2396 | fmt = GET_RTX_FORMAT (code); | |
2397 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
2398 | if (fmt[i] == 'e') | |
2399 | { | |
2400 | if (i == 0) | |
2401 | { | |
2402 | x = XEXP (x, 0); | |
2403 | goto repeat; | |
2404 | } | |
2405 | else | |
2406 | if (refers_to_mem_p (XEXP (x, i), base, start, end)) | |
2407 | return 1; | |
2408 | } | |
2409 | else if (fmt[i] == 'E') | |
2410 | { | |
2411 | int j; | |
2412 | for (j = 0; j < XVECLEN (x, i); j++) | |
2413 | if (refers_to_mem_p (XVECEXP (x, i, j), base, start, end)) | |
2414 | return 1; | |
2415 | } | |
2416 | ||
2417 | return 0; | |
2418 | } | |
2419 | ||
2420 | /* Nonzero if X refers to memory at a varying address; | |
2421 | except that a register which has at the moment a known constant value | |
2422 | isn't considered variable. */ | |
2423 | ||
2424 | static int | |
2425 | cse_rtx_addr_varies_p (x) | |
2426 | rtx x; | |
2427 | { | |
2428 | /* We need not check for X and the equivalence class being of the same | |
2429 | mode because if X is equivalent to a constant in some mode, it | |
2430 | doesn't vary in any mode. */ | |
2431 | ||
2432 | if (GET_CODE (x) == MEM | |
2433 | && GET_CODE (XEXP (x, 0)) == REG | |
2434 | && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))) | |
2435 | && GET_MODE (XEXP (x, 0)) == qty_mode[reg_qty[REGNO (XEXP (x, 0))]] | |
2436 | && qty_const[reg_qty[REGNO (XEXP (x, 0))]] != 0) | |
2437 | return 0; | |
2438 | ||
2439 | if (GET_CODE (x) == MEM | |
2440 | && GET_CODE (XEXP (x, 0)) == PLUS | |
2441 | && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT | |
2442 | && GET_CODE (XEXP (XEXP (x, 0), 0)) == REG | |
2443 | && REGNO_QTY_VALID_P (REGNO (XEXP (XEXP (x, 0), 0))) | |
2444 | && (GET_MODE (XEXP (XEXP (x, 0), 0)) | |
2445 | == qty_mode[reg_qty[REGNO (XEXP (XEXP (x, 0), 0))]]) | |
2446 | && qty_const[reg_qty[REGNO (XEXP (XEXP (x, 0), 0))]]) | |
2447 | return 0; | |
2448 | ||
2449 | return rtx_addr_varies_p (x); | |
2450 | } | |
2451 | \f | |
2452 | /* Canonicalize an expression: | |
2453 | replace each register reference inside it | |
2454 | with the "oldest" equivalent register. | |
2455 | ||
2456 | If INSN is non-zero and we are replacing a pseudo with a hard register | |
7722328e RK |
2457 | or vice versa, validate_change is used to ensure that INSN remains valid |
2458 | after we make our substitution. The calls are made with IN_GROUP non-zero | |
2459 | so apply_change_group must be called upon the outermost return from this | |
2460 | function (unless INSN is zero). The result of apply_change_group can | |
2461 | generally be discarded since the changes we are making are optional. */ | |
7afe21cc RK |
2462 | |
2463 | static rtx | |
2464 | canon_reg (x, insn) | |
2465 | rtx x; | |
2466 | rtx insn; | |
2467 | { | |
2468 | register int i; | |
2469 | register enum rtx_code code; | |
2470 | register char *fmt; | |
2471 | ||
2472 | if (x == 0) | |
2473 | return x; | |
2474 | ||
2475 | code = GET_CODE (x); | |
2476 | switch (code) | |
2477 | { | |
2478 | case PC: | |
2479 | case CC0: | |
2480 | case CONST: | |
2481 | case CONST_INT: | |
2482 | case CONST_DOUBLE: | |
2483 | case SYMBOL_REF: | |
2484 | case LABEL_REF: | |
2485 | case ADDR_VEC: | |
2486 | case ADDR_DIFF_VEC: | |
2487 | return x; | |
2488 | ||
2489 | case REG: | |
2490 | { | |
2491 | register int first; | |
2492 | ||
2493 | /* Never replace a hard reg, because hard regs can appear | |
2494 | in more than one machine mode, and we must preserve the mode | |
2495 | of each occurrence. Also, some hard regs appear in | |
2496 | MEMs that are shared and mustn't be altered. Don't try to | |
2497 | replace any reg that maps to a reg of class NO_REGS. */ | |
2498 | if (REGNO (x) < FIRST_PSEUDO_REGISTER | |
2499 | || ! REGNO_QTY_VALID_P (REGNO (x))) | |
2500 | return x; | |
2501 | ||
2502 | first = qty_first_reg[reg_qty[REGNO (x)]]; | |
2503 | return (first >= FIRST_PSEUDO_REGISTER ? regno_reg_rtx[first] | |
2504 | : REGNO_REG_CLASS (first) == NO_REGS ? x | |
2505 | : gen_rtx (REG, qty_mode[reg_qty[REGNO (x)]], first)); | |
2506 | } | |
2507 | } | |
2508 | ||
2509 | fmt = GET_RTX_FORMAT (code); | |
2510 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
2511 | { | |
2512 | register int j; | |
2513 | ||
2514 | if (fmt[i] == 'e') | |
2515 | { | |
2516 | rtx new = canon_reg (XEXP (x, i), insn); | |
2517 | ||
2518 | /* If replacing pseudo with hard reg or vice versa, ensure the | |
178c39f6 | 2519 | insn remains valid. Likewise if the insn has MATCH_DUPs. */ |
aee9dc31 RS |
2520 | if (insn != 0 && new != 0 |
2521 | && GET_CODE (new) == REG && GET_CODE (XEXP (x, i)) == REG | |
178c39f6 RK |
2522 | && (((REGNO (new) < FIRST_PSEUDO_REGISTER) |
2523 | != (REGNO (XEXP (x, i)) < FIRST_PSEUDO_REGISTER)) | |
aee9dc31 | 2524 | || insn_n_dups[recog_memoized (insn)] > 0)) |
77fa0940 | 2525 | validate_change (insn, &XEXP (x, i), new, 1); |
7afe21cc RK |
2526 | else |
2527 | XEXP (x, i) = new; | |
2528 | } | |
2529 | else if (fmt[i] == 'E') | |
2530 | for (j = 0; j < XVECLEN (x, i); j++) | |
2531 | XVECEXP (x, i, j) = canon_reg (XVECEXP (x, i, j), insn); | |
2532 | } | |
2533 | ||
2534 | return x; | |
2535 | } | |
2536 | \f | |
2537 | /* LOC is a location with INSN that is an operand address (the contents of | |
2538 | a MEM). Find the best equivalent address to use that is valid for this | |
2539 | insn. | |
2540 | ||
2541 | On most CISC machines, complicated address modes are costly, and rtx_cost | |
2542 | is a good approximation for that cost. However, most RISC machines have | |
2543 | only a few (usually only one) memory reference formats. If an address is | |
2544 | valid at all, it is often just as cheap as any other address. Hence, for | |
2545 | RISC machines, we use the configuration macro `ADDRESS_COST' to compare the | |
2546 | costs of various addresses. For two addresses of equal cost, choose the one | |
2547 | with the highest `rtx_cost' value as that has the potential of eliminating | |
2548 | the most insns. For equal costs, we choose the first in the equivalence | |
2549 | class. Note that we ignore the fact that pseudo registers are cheaper | |
2550 | than hard registers here because we would also prefer the pseudo registers. | |
2551 | */ | |
2552 | ||
6cd4575e | 2553 | static void |
7afe21cc RK |
2554 | find_best_addr (insn, loc) |
2555 | rtx insn; | |
2556 | rtx *loc; | |
2557 | { | |
2558 | struct table_elt *elt, *p; | |
2559 | rtx addr = *loc; | |
2560 | int our_cost; | |
2561 | int found_better = 1; | |
2562 | int save_do_not_record = do_not_record; | |
2563 | int save_hash_arg_in_memory = hash_arg_in_memory; | |
2564 | int save_hash_arg_in_struct = hash_arg_in_struct; | |
7afe21cc RK |
2565 | int addr_volatile; |
2566 | int regno; | |
2197a88a | 2567 | unsigned hash; |
7afe21cc RK |
2568 | |
2569 | /* Do not try to replace constant addresses or addresses of local and | |
2570 | argument slots. These MEM expressions are made only once and inserted | |
2571 | in many instructions, as well as being used to control symbol table | |
2572 | output. It is not safe to clobber them. | |
2573 | ||
2574 | There are some uncommon cases where the address is already in a register | |
2575 | for some reason, but we cannot take advantage of that because we have | |
2576 | no easy way to unshare the MEM. In addition, looking up all stack | |
2577 | addresses is costly. */ | |
2578 | if ((GET_CODE (addr) == PLUS | |
2579 | && GET_CODE (XEXP (addr, 0)) == REG | |
2580 | && GET_CODE (XEXP (addr, 1)) == CONST_INT | |
2581 | && (regno = REGNO (XEXP (addr, 0)), | |
8bc169f2 DE |
2582 | regno == FRAME_POINTER_REGNUM || regno == HARD_FRAME_POINTER_REGNUM |
2583 | || regno == ARG_POINTER_REGNUM)) | |
7afe21cc | 2584 | || (GET_CODE (addr) == REG |
8bc169f2 DE |
2585 | && (regno = REGNO (addr), regno == FRAME_POINTER_REGNUM |
2586 | || regno == HARD_FRAME_POINTER_REGNUM | |
2587 | || regno == ARG_POINTER_REGNUM)) | |
7afe21cc RK |
2588 | || CONSTANT_ADDRESS_P (addr)) |
2589 | return; | |
2590 | ||
2591 | /* If this address is not simply a register, try to fold it. This will | |
2592 | sometimes simplify the expression. Many simplifications | |
2593 | will not be valid, but some, usually applying the associative rule, will | |
2594 | be valid and produce better code. */ | |
2595 | if (GET_CODE (addr) != REG | |
2596 | && validate_change (insn, loc, fold_rtx (addr, insn), 0)) | |
2597 | addr = *loc; | |
2598 | ||
42495ca0 RK |
2599 | /* If this address is not in the hash table, we can't look for equivalences |
2600 | of the whole address. Also, ignore if volatile. */ | |
2601 | ||
7afe21cc | 2602 | do_not_record = 0; |
2197a88a | 2603 | hash = HASH (addr, Pmode); |
7afe21cc RK |
2604 | addr_volatile = do_not_record; |
2605 | do_not_record = save_do_not_record; | |
2606 | hash_arg_in_memory = save_hash_arg_in_memory; | |
2607 | hash_arg_in_struct = save_hash_arg_in_struct; | |
2608 | ||
2609 | if (addr_volatile) | |
2610 | return; | |
2611 | ||
2197a88a | 2612 | elt = lookup (addr, hash, Pmode); |
7afe21cc | 2613 | |
7afe21cc | 2614 | #ifndef ADDRESS_COST |
42495ca0 RK |
2615 | if (elt) |
2616 | { | |
2617 | our_cost = elt->cost; | |
2618 | ||
2619 | /* Find the lowest cost below ours that works. */ | |
2620 | for (elt = elt->first_same_value; elt; elt = elt->next_same_value) | |
2621 | if (elt->cost < our_cost | |
2622 | && (GET_CODE (elt->exp) == REG | |
2623 | || exp_equiv_p (elt->exp, elt->exp, 1, 0)) | |
2624 | && validate_change (insn, loc, | |
906c4e36 | 2625 | canon_reg (copy_rtx (elt->exp), NULL_RTX), 0)) |
42495ca0 RK |
2626 | return; |
2627 | } | |
2628 | #else | |
7afe21cc | 2629 | |
42495ca0 RK |
2630 | if (elt) |
2631 | { | |
2632 | /* We need to find the best (under the criteria documented above) entry | |
2633 | in the class that is valid. We use the `flag' field to indicate | |
2634 | choices that were invalid and iterate until we can't find a better | |
2635 | one that hasn't already been tried. */ | |
7afe21cc | 2636 | |
42495ca0 RK |
2637 | for (p = elt->first_same_value; p; p = p->next_same_value) |
2638 | p->flag = 0; | |
7afe21cc | 2639 | |
42495ca0 RK |
2640 | while (found_better) |
2641 | { | |
2642 | int best_addr_cost = ADDRESS_COST (*loc); | |
2643 | int best_rtx_cost = (elt->cost + 1) >> 1; | |
2644 | struct table_elt *best_elt = elt; | |
2645 | ||
2646 | found_better = 0; | |
2647 | for (p = elt->first_same_value; p; p = p->next_same_value) | |
2648 | if (! p->flag | |
2649 | && (GET_CODE (p->exp) == REG | |
2650 | || exp_equiv_p (p->exp, p->exp, 1, 0)) | |
2651 | && (ADDRESS_COST (p->exp) < best_addr_cost | |
2652 | || (ADDRESS_COST (p->exp) == best_addr_cost | |
2653 | && (p->cost + 1) >> 1 > best_rtx_cost))) | |
2654 | { | |
2655 | found_better = 1; | |
2656 | best_addr_cost = ADDRESS_COST (p->exp); | |
2657 | best_rtx_cost = (p->cost + 1) >> 1; | |
2658 | best_elt = p; | |
2659 | } | |
7afe21cc | 2660 | |
42495ca0 RK |
2661 | if (found_better) |
2662 | { | |
2663 | if (validate_change (insn, loc, | |
906c4e36 RK |
2664 | canon_reg (copy_rtx (best_elt->exp), |
2665 | NULL_RTX), 0)) | |
42495ca0 RK |
2666 | return; |
2667 | else | |
2668 | best_elt->flag = 1; | |
2669 | } | |
2670 | } | |
2671 | } | |
7afe21cc | 2672 | |
42495ca0 RK |
2673 | /* If the address is a binary operation with the first operand a register |
2674 | and the second a constant, do the same as above, but looking for | |
2675 | equivalences of the register. Then try to simplify before checking for | |
2676 | the best address to use. This catches a few cases: First is when we | |
2677 | have REG+const and the register is another REG+const. We can often merge | |
2678 | the constants and eliminate one insn and one register. It may also be | |
2679 | that a machine has a cheap REG+REG+const. Finally, this improves the | |
2680 | code on the Alpha for unaligned byte stores. */ | |
2681 | ||
2682 | if (flag_expensive_optimizations | |
2683 | && (GET_RTX_CLASS (GET_CODE (*loc)) == '2' | |
2684 | || GET_RTX_CLASS (GET_CODE (*loc)) == 'c') | |
2685 | && GET_CODE (XEXP (*loc, 0)) == REG | |
2686 | && GET_CODE (XEXP (*loc, 1)) == CONST_INT) | |
7afe21cc | 2687 | { |
42495ca0 RK |
2688 | rtx c = XEXP (*loc, 1); |
2689 | ||
2690 | do_not_record = 0; | |
2197a88a | 2691 | hash = HASH (XEXP (*loc, 0), Pmode); |
42495ca0 RK |
2692 | do_not_record = save_do_not_record; |
2693 | hash_arg_in_memory = save_hash_arg_in_memory; | |
2694 | hash_arg_in_struct = save_hash_arg_in_struct; | |
2695 | ||
2197a88a | 2696 | elt = lookup (XEXP (*loc, 0), hash, Pmode); |
42495ca0 RK |
2697 | if (elt == 0) |
2698 | return; | |
2699 | ||
2700 | /* We need to find the best (under the criteria documented above) entry | |
2701 | in the class that is valid. We use the `flag' field to indicate | |
2702 | choices that were invalid and iterate until we can't find a better | |
2703 | one that hasn't already been tried. */ | |
7afe21cc | 2704 | |
7afe21cc | 2705 | for (p = elt->first_same_value; p; p = p->next_same_value) |
42495ca0 | 2706 | p->flag = 0; |
7afe21cc | 2707 | |
42495ca0 | 2708 | while (found_better) |
7afe21cc | 2709 | { |
42495ca0 RK |
2710 | int best_addr_cost = ADDRESS_COST (*loc); |
2711 | int best_rtx_cost = (COST (*loc) + 1) >> 1; | |
2712 | struct table_elt *best_elt = elt; | |
2713 | rtx best_rtx = *loc; | |
f6516aee JW |
2714 | int count; |
2715 | ||
2716 | /* This is at worst case an O(n^2) algorithm, so limit our search | |
2717 | to the first 32 elements on the list. This avoids trouble | |
2718 | compiling code with very long basic blocks that can easily | |
2719 | call cse_gen_binary so many times that we run out of memory. */ | |
42495ca0 RK |
2720 | |
2721 | found_better = 0; | |
f6516aee JW |
2722 | for (p = elt->first_same_value, count = 0; |
2723 | p && count < 32; | |
2724 | p = p->next_same_value, count++) | |
42495ca0 RK |
2725 | if (! p->flag |
2726 | && (GET_CODE (p->exp) == REG | |
2727 | || exp_equiv_p (p->exp, p->exp, 1, 0))) | |
2728 | { | |
96b0e481 | 2729 | rtx new = cse_gen_binary (GET_CODE (*loc), Pmode, p->exp, c); |
42495ca0 RK |
2730 | |
2731 | if ((ADDRESS_COST (new) < best_addr_cost | |
2732 | || (ADDRESS_COST (new) == best_addr_cost | |
2733 | && (COST (new) + 1) >> 1 > best_rtx_cost))) | |
2734 | { | |
2735 | found_better = 1; | |
2736 | best_addr_cost = ADDRESS_COST (new); | |
2737 | best_rtx_cost = (COST (new) + 1) >> 1; | |
2738 | best_elt = p; | |
2739 | best_rtx = new; | |
2740 | } | |
2741 | } | |
2742 | ||
2743 | if (found_better) | |
2744 | { | |
2745 | if (validate_change (insn, loc, | |
906c4e36 RK |
2746 | canon_reg (copy_rtx (best_rtx), |
2747 | NULL_RTX), 0)) | |
42495ca0 RK |
2748 | return; |
2749 | else | |
2750 | best_elt->flag = 1; | |
2751 | } | |
7afe21cc RK |
2752 | } |
2753 | } | |
2754 | #endif | |
2755 | } | |
2756 | \f | |
2757 | /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison | |
2758 | operation (EQ, NE, GT, etc.), follow it back through the hash table and | |
2759 | what values are being compared. | |
2760 | ||
2761 | *PARG1 and *PARG2 are updated to contain the rtx representing the values | |
2762 | actually being compared. For example, if *PARG1 was (cc0) and *PARG2 | |
2763 | was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were | |
2764 | compared to produce cc0. | |
2765 | ||
2766 | The return value is the comparison operator and is either the code of | |
2767 | A or the code corresponding to the inverse of the comparison. */ | |
2768 | ||
2769 | static enum rtx_code | |
13c9910f | 2770 | find_comparison_args (code, parg1, parg2, pmode1, pmode2) |
7afe21cc RK |
2771 | enum rtx_code code; |
2772 | rtx *parg1, *parg2; | |
13c9910f | 2773 | enum machine_mode *pmode1, *pmode2; |
7afe21cc RK |
2774 | { |
2775 | rtx arg1, arg2; | |
2776 | ||
2777 | arg1 = *parg1, arg2 = *parg2; | |
2778 | ||
2779 | /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */ | |
2780 | ||
b2796a4b | 2781 | while (arg2 == CONST0_RTX (GET_MODE (arg1))) |
7afe21cc RK |
2782 | { |
2783 | /* Set non-zero when we find something of interest. */ | |
2784 | rtx x = 0; | |
2785 | int reverse_code = 0; | |
2786 | struct table_elt *p = 0; | |
2787 | ||
2788 | /* If arg1 is a COMPARE, extract the comparison arguments from it. | |
2789 | On machines with CC0, this is the only case that can occur, since | |
2790 | fold_rtx will return the COMPARE or item being compared with zero | |
2791 | when given CC0. */ | |
2792 | ||
2793 | if (GET_CODE (arg1) == COMPARE && arg2 == const0_rtx) | |
2794 | x = arg1; | |
2795 | ||
2796 | /* If ARG1 is a comparison operator and CODE is testing for | |
2797 | STORE_FLAG_VALUE, get the inner arguments. */ | |
2798 | ||
2799 | else if (GET_RTX_CLASS (GET_CODE (arg1)) == '<') | |
2800 | { | |
c610adec RK |
2801 | if (code == NE |
2802 | || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT | |
2803 | && code == LT && STORE_FLAG_VALUE == -1) | |
2804 | #ifdef FLOAT_STORE_FLAG_VALUE | |
2805 | || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT | |
2806 | && FLOAT_STORE_FLAG_VALUE < 0) | |
2807 | #endif | |
2808 | ) | |
7afe21cc | 2809 | x = arg1; |
c610adec RK |
2810 | else if (code == EQ |
2811 | || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT | |
2812 | && code == GE && STORE_FLAG_VALUE == -1) | |
2813 | #ifdef FLOAT_STORE_FLAG_VALUE | |
2814 | || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT | |
2815 | && FLOAT_STORE_FLAG_VALUE < 0) | |
2816 | #endif | |
2817 | ) | |
7afe21cc RK |
2818 | x = arg1, reverse_code = 1; |
2819 | } | |
2820 | ||
2821 | /* ??? We could also check for | |
2822 | ||
2823 | (ne (and (eq (...) (const_int 1))) (const_int 0)) | |
2824 | ||
2825 | and related forms, but let's wait until we see them occurring. */ | |
2826 | ||
2827 | if (x == 0) | |
2828 | /* Look up ARG1 in the hash table and see if it has an equivalence | |
2829 | that lets us see what is being compared. */ | |
2830 | p = lookup (arg1, safe_hash (arg1, GET_MODE (arg1)) % NBUCKETS, | |
2831 | GET_MODE (arg1)); | |
2832 | if (p) p = p->first_same_value; | |
2833 | ||
2834 | for (; p; p = p->next_same_value) | |
2835 | { | |
2836 | enum machine_mode inner_mode = GET_MODE (p->exp); | |
2837 | ||
2838 | /* If the entry isn't valid, skip it. */ | |
2839 | if (! exp_equiv_p (p->exp, p->exp, 1, 0)) | |
2840 | continue; | |
2841 | ||
2842 | if (GET_CODE (p->exp) == COMPARE | |
2843 | /* Another possibility is that this machine has a compare insn | |
2844 | that includes the comparison code. In that case, ARG1 would | |
2845 | be equivalent to a comparison operation that would set ARG1 to | |
2846 | either STORE_FLAG_VALUE or zero. If this is an NE operation, | |
2847 | ORIG_CODE is the actual comparison being done; if it is an EQ, | |
2848 | we must reverse ORIG_CODE. On machine with a negative value | |
2849 | for STORE_FLAG_VALUE, also look at LT and GE operations. */ | |
2850 | || ((code == NE | |
2851 | || (code == LT | |
c610adec | 2852 | && GET_MODE_CLASS (inner_mode) == MODE_INT |
906c4e36 RK |
2853 | && (GET_MODE_BITSIZE (inner_mode) |
2854 | <= HOST_BITS_PER_WIDE_INT) | |
7afe21cc | 2855 | && (STORE_FLAG_VALUE |
906c4e36 RK |
2856 | & ((HOST_WIDE_INT) 1 |
2857 | << (GET_MODE_BITSIZE (inner_mode) - 1)))) | |
c610adec RK |
2858 | #ifdef FLOAT_STORE_FLAG_VALUE |
2859 | || (code == LT | |
2860 | && GET_MODE_CLASS (inner_mode) == MODE_FLOAT | |
2861 | && FLOAT_STORE_FLAG_VALUE < 0) | |
2862 | #endif | |
2863 | ) | |
7afe21cc RK |
2864 | && GET_RTX_CLASS (GET_CODE (p->exp)) == '<')) |
2865 | { | |
2866 | x = p->exp; | |
2867 | break; | |
2868 | } | |
2869 | else if ((code == EQ | |
2870 | || (code == GE | |
c610adec | 2871 | && GET_MODE_CLASS (inner_mode) == MODE_INT |
906c4e36 RK |
2872 | && (GET_MODE_BITSIZE (inner_mode) |
2873 | <= HOST_BITS_PER_WIDE_INT) | |
7afe21cc | 2874 | && (STORE_FLAG_VALUE |
906c4e36 RK |
2875 | & ((HOST_WIDE_INT) 1 |
2876 | << (GET_MODE_BITSIZE (inner_mode) - 1)))) | |
c610adec RK |
2877 | #ifdef FLOAT_STORE_FLAG_VALUE |
2878 | || (code == GE | |
2879 | && GET_MODE_CLASS (inner_mode) == MODE_FLOAT | |
2880 | && FLOAT_STORE_FLAG_VALUE < 0) | |
2881 | #endif | |
2882 | ) | |
7afe21cc RK |
2883 | && GET_RTX_CLASS (GET_CODE (p->exp)) == '<') |
2884 | { | |
2885 | reverse_code = 1; | |
2886 | x = p->exp; | |
2887 | break; | |
2888 | } | |
2889 | ||
2890 | /* If this is fp + constant, the equivalent is a better operand since | |
2891 | it may let us predict the value of the comparison. */ | |
2892 | else if (NONZERO_BASE_PLUS_P (p->exp)) | |
2893 | { | |
2894 | arg1 = p->exp; | |
2895 | continue; | |
2896 | } | |
2897 | } | |
2898 | ||
2899 | /* If we didn't find a useful equivalence for ARG1, we are done. | |
2900 | Otherwise, set up for the next iteration. */ | |
2901 | if (x == 0) | |
2902 | break; | |
2903 | ||
2904 | arg1 = XEXP (x, 0), arg2 = XEXP (x, 1); | |
2905 | if (GET_RTX_CLASS (GET_CODE (x)) == '<') | |
2906 | code = GET_CODE (x); | |
2907 | ||
2908 | if (reverse_code) | |
2909 | code = reverse_condition (code); | |
2910 | } | |
2911 | ||
13c9910f RS |
2912 | /* Return our results. Return the modes from before fold_rtx |
2913 | because fold_rtx might produce const_int, and then it's too late. */ | |
2914 | *pmode1 = GET_MODE (arg1), *pmode2 = GET_MODE (arg2); | |
7afe21cc RK |
2915 | *parg1 = fold_rtx (arg1, 0), *parg2 = fold_rtx (arg2, 0); |
2916 | ||
2917 | return code; | |
2918 | } | |
2919 | \f | |
2920 | /* Try to simplify a unary operation CODE whose output mode is to be | |
2921 | MODE with input operand OP whose mode was originally OP_MODE. | |
2922 | Return zero if no simplification can be made. */ | |
2923 | ||
2924 | rtx | |
2925 | simplify_unary_operation (code, mode, op, op_mode) | |
2926 | enum rtx_code code; | |
2927 | enum machine_mode mode; | |
2928 | rtx op; | |
2929 | enum machine_mode op_mode; | |
2930 | { | |
2931 | register int width = GET_MODE_BITSIZE (mode); | |
2932 | ||
2933 | /* The order of these tests is critical so that, for example, we don't | |
2934 | check the wrong mode (input vs. output) for a conversion operation, | |
2935 | such as FIX. At some point, this should be simplified. */ | |
2936 | ||
62c0ea12 | 2937 | #if !defined(REAL_IS_NOT_DOUBLE) || defined(REAL_ARITHMETIC) |
7afe21cc | 2938 | |
62c0ea12 RK |
2939 | if (code == FLOAT && GET_MODE (op) == VOIDmode |
2940 | && (GET_CODE (op) == CONST_DOUBLE || GET_CODE (op) == CONST_INT)) | |
7afe21cc | 2941 | { |
62c0ea12 | 2942 | HOST_WIDE_INT hv, lv; |
7afe21cc RK |
2943 | REAL_VALUE_TYPE d; |
2944 | ||
62c0ea12 RK |
2945 | if (GET_CODE (op) == CONST_INT) |
2946 | lv = INTVAL (op), hv = INTVAL (op) < 0 ? -1 : 0; | |
2947 | else | |
7ac4a266 | 2948 | lv = CONST_DOUBLE_LOW (op), hv = CONST_DOUBLE_HIGH (op); |
7afe21cc RK |
2949 | |
2950 | #ifdef REAL_ARITHMETIC | |
62c0ea12 | 2951 | REAL_VALUE_FROM_INT (d, lv, hv); |
7afe21cc | 2952 | #else |
62c0ea12 | 2953 | if (hv < 0) |
7afe21cc | 2954 | { |
62c0ea12 | 2955 | d = (double) (~ hv); |
906c4e36 RK |
2956 | d *= ((double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2)) |
2957 | * (double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2))); | |
62c0ea12 | 2958 | d += (double) (unsigned HOST_WIDE_INT) (~ lv); |
7afe21cc RK |
2959 | d = (- d - 1.0); |
2960 | } | |
2961 | else | |
2962 | { | |
62c0ea12 | 2963 | d = (double) hv; |
906c4e36 RK |
2964 | d *= ((double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2)) |
2965 | * (double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2))); | |
62c0ea12 | 2966 | d += (double) (unsigned HOST_WIDE_INT) lv; |
7afe21cc RK |
2967 | } |
2968 | #endif /* REAL_ARITHMETIC */ | |
62c0ea12 | 2969 | |
7afe21cc RK |
2970 | return CONST_DOUBLE_FROM_REAL_VALUE (d, mode); |
2971 | } | |
62c0ea12 RK |
2972 | else if (code == UNSIGNED_FLOAT && GET_MODE (op) == VOIDmode |
2973 | && (GET_CODE (op) == CONST_DOUBLE || GET_CODE (op) == CONST_INT)) | |
7afe21cc | 2974 | { |
62c0ea12 | 2975 | HOST_WIDE_INT hv, lv; |
7afe21cc RK |
2976 | REAL_VALUE_TYPE d; |
2977 | ||
62c0ea12 RK |
2978 | if (GET_CODE (op) == CONST_INT) |
2979 | lv = INTVAL (op), hv = INTVAL (op) < 0 ? -1 : 0; | |
2980 | else | |
7ac4a266 | 2981 | lv = CONST_DOUBLE_LOW (op), hv = CONST_DOUBLE_HIGH (op); |
62c0ea12 RK |
2982 | |
2983 | if (GET_MODE_BITSIZE (op_mode) >= HOST_BITS_PER_WIDE_INT * 2) | |
2984 | ; | |
2985 | else | |
2986 | hv = 0, lv &= GET_MODE_MASK (op_mode); | |
2987 | ||
7afe21cc | 2988 | #ifdef REAL_ARITHMETIC |
62c0ea12 | 2989 | REAL_VALUE_FROM_UNSIGNED_INT (d, lv, hv); |
7afe21cc | 2990 | #else |
62c0ea12 | 2991 | |
138cec59 | 2992 | d = (double) (unsigned HOST_WIDE_INT) hv; |
906c4e36 RK |
2993 | d *= ((double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2)) |
2994 | * (double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2))); | |
62c0ea12 | 2995 | d += (double) (unsigned HOST_WIDE_INT) lv; |
7afe21cc | 2996 | #endif /* REAL_ARITHMETIC */ |
62c0ea12 | 2997 | |
7afe21cc RK |
2998 | return CONST_DOUBLE_FROM_REAL_VALUE (d, mode); |
2999 | } | |
3000 | #endif | |
3001 | ||
f89e32e9 RK |
3002 | if (GET_CODE (op) == CONST_INT |
3003 | && width <= HOST_BITS_PER_WIDE_INT && width > 0) | |
7afe21cc | 3004 | { |
906c4e36 RK |
3005 | register HOST_WIDE_INT arg0 = INTVAL (op); |
3006 | register HOST_WIDE_INT val; | |
7afe21cc RK |
3007 | |
3008 | switch (code) | |
3009 | { | |
3010 | case NOT: | |
3011 | val = ~ arg0; | |
3012 | break; | |
3013 | ||
3014 | case NEG: | |
3015 | val = - arg0; | |
3016 | break; | |
3017 | ||
3018 | case ABS: | |
3019 | val = (arg0 >= 0 ? arg0 : - arg0); | |
3020 | break; | |
3021 | ||
3022 | case FFS: | |
3023 | /* Don't use ffs here. Instead, get low order bit and then its | |
3024 | number. If arg0 is zero, this will return 0, as desired. */ | |
3025 | arg0 &= GET_MODE_MASK (mode); | |
3026 | val = exact_log2 (arg0 & (- arg0)) + 1; | |
3027 | break; | |
3028 | ||
3029 | case TRUNCATE: | |
3030 | val = arg0; | |
3031 | break; | |
3032 | ||
3033 | case ZERO_EXTEND: | |
3034 | if (op_mode == VOIDmode) | |
3035 | op_mode = mode; | |
82a5e898 | 3036 | if (GET_MODE_BITSIZE (op_mode) == HOST_BITS_PER_WIDE_INT) |
d80e9fd7 RS |
3037 | { |
3038 | /* If we were really extending the mode, | |
3039 | we would have to distinguish between zero-extension | |
3040 | and sign-extension. */ | |
3041 | if (width != GET_MODE_BITSIZE (op_mode)) | |
3042 | abort (); | |
3043 | val = arg0; | |
3044 | } | |
82a5e898 CH |
3045 | else if (GET_MODE_BITSIZE (op_mode) < HOST_BITS_PER_WIDE_INT) |
3046 | val = arg0 & ~((HOST_WIDE_INT) (-1) << GET_MODE_BITSIZE (op_mode)); | |
7afe21cc RK |
3047 | else |
3048 | return 0; | |
3049 | break; | |
3050 | ||
3051 | case SIGN_EXTEND: | |
3052 | if (op_mode == VOIDmode) | |
3053 | op_mode = mode; | |
82a5e898 | 3054 | if (GET_MODE_BITSIZE (op_mode) == HOST_BITS_PER_WIDE_INT) |
d80e9fd7 RS |
3055 | { |
3056 | /* If we were really extending the mode, | |
3057 | we would have to distinguish between zero-extension | |
3058 | and sign-extension. */ | |
3059 | if (width != GET_MODE_BITSIZE (op_mode)) | |
3060 | abort (); | |
3061 | val = arg0; | |
3062 | } | |
f12564b4 | 3063 | else if (GET_MODE_BITSIZE (op_mode) < HOST_BITS_PER_WIDE_INT) |
7afe21cc | 3064 | { |
82a5e898 CH |
3065 | val |
3066 | = arg0 & ~((HOST_WIDE_INT) (-1) << GET_MODE_BITSIZE (op_mode)); | |
3067 | if (val | |
3068 | & ((HOST_WIDE_INT) 1 << (GET_MODE_BITSIZE (op_mode) - 1))) | |
3069 | val -= (HOST_WIDE_INT) 1 << GET_MODE_BITSIZE (op_mode); | |
7afe21cc RK |
3070 | } |
3071 | else | |
3072 | return 0; | |
3073 | break; | |
3074 | ||
d45cf215 RS |
3075 | case SQRT: |
3076 | return 0; | |
3077 | ||
7afe21cc RK |
3078 | default: |
3079 | abort (); | |
3080 | } | |
3081 | ||
3082 | /* Clear the bits that don't belong in our mode, | |
3083 | unless they and our sign bit are all one. | |
3084 | So we get either a reasonable negative value or a reasonable | |
3085 | unsigned value for this mode. */ | |
906c4e36 RK |
3086 | if (width < HOST_BITS_PER_WIDE_INT |
3087 | && ((val & ((HOST_WIDE_INT) (-1) << (width - 1))) | |
3088 | != ((HOST_WIDE_INT) (-1) << (width - 1)))) | |
7afe21cc RK |
3089 | val &= (1 << width) - 1; |
3090 | ||
906c4e36 | 3091 | return GEN_INT (val); |
7afe21cc RK |
3092 | } |
3093 | ||
3094 | /* We can do some operations on integer CONST_DOUBLEs. Also allow | |
3095 | for a DImode operation on a CONST_INT. */ | |
8e0ac43b | 3096 | else if (GET_MODE (op) == VOIDmode && width <= HOST_BITS_PER_INT * 2 |
7afe21cc RK |
3097 | && (GET_CODE (op) == CONST_DOUBLE || GET_CODE (op) == CONST_INT)) |
3098 | { | |
906c4e36 | 3099 | HOST_WIDE_INT l1, h1, lv, hv; |
7afe21cc RK |
3100 | |
3101 | if (GET_CODE (op) == CONST_DOUBLE) | |
3102 | l1 = CONST_DOUBLE_LOW (op), h1 = CONST_DOUBLE_HIGH (op); | |
3103 | else | |
3104 | l1 = INTVAL (op), h1 = l1 < 0 ? -1 : 0; | |
3105 | ||
3106 | switch (code) | |
3107 | { | |
3108 | case NOT: | |
3109 | lv = ~ l1; | |
3110 | hv = ~ h1; | |
3111 | break; | |
3112 | ||
3113 | case NEG: | |
3114 | neg_double (l1, h1, &lv, &hv); | |
3115 | break; | |
3116 | ||
3117 | case ABS: | |
3118 | if (h1 < 0) | |
3119 | neg_double (l1, h1, &lv, &hv); | |
3120 | else | |
3121 | lv = l1, hv = h1; | |
3122 | break; | |
3123 | ||
3124 | case FFS: | |
3125 | hv = 0; | |
3126 | if (l1 == 0) | |
906c4e36 | 3127 | lv = HOST_BITS_PER_WIDE_INT + exact_log2 (h1 & (-h1)) + 1; |
7afe21cc RK |
3128 | else |
3129 | lv = exact_log2 (l1 & (-l1)) + 1; | |
3130 | break; | |
3131 | ||
3132 | case TRUNCATE: | |
8e0ac43b | 3133 | /* This is just a change-of-mode, so do nothing. */ |
7afe21cc RK |
3134 | break; |
3135 | ||
f72aed24 RS |
3136 | case ZERO_EXTEND: |
3137 | if (op_mode == VOIDmode | |
906c4e36 | 3138 | || GET_MODE_BITSIZE (op_mode) > HOST_BITS_PER_WIDE_INT) |
f72aed24 RS |
3139 | return 0; |
3140 | ||
3141 | hv = 0; | |
3142 | lv = l1 & GET_MODE_MASK (op_mode); | |
3143 | break; | |
3144 | ||
3145 | case SIGN_EXTEND: | |
3146 | if (op_mode == VOIDmode | |
906c4e36 | 3147 | || GET_MODE_BITSIZE (op_mode) > HOST_BITS_PER_WIDE_INT) |
f72aed24 RS |
3148 | return 0; |
3149 | else | |
3150 | { | |
3151 | lv = l1 & GET_MODE_MASK (op_mode); | |
906c4e36 RK |
3152 | if (GET_MODE_BITSIZE (op_mode) < HOST_BITS_PER_WIDE_INT |
3153 | && (lv & ((HOST_WIDE_INT) 1 | |
3154 | << (GET_MODE_BITSIZE (op_mode) - 1))) != 0) | |
3155 | lv -= (HOST_WIDE_INT) 1 << GET_MODE_BITSIZE (op_mode); | |
f72aed24 | 3156 | |
906c4e36 | 3157 | hv = (lv < 0) ? ~ (HOST_WIDE_INT) 0 : 0; |
f72aed24 RS |
3158 | } |
3159 | break; | |
3160 | ||
d45cf215 RS |
3161 | case SQRT: |
3162 | return 0; | |
3163 | ||
7afe21cc RK |
3164 | default: |
3165 | return 0; | |
3166 | } | |
3167 | ||
3168 | return immed_double_const (lv, hv, mode); | |
3169 | } | |
3170 | ||
3171 | #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC) | |
3172 | else if (GET_CODE (op) == CONST_DOUBLE | |
3173 | && GET_MODE_CLASS (mode) == MODE_FLOAT) | |
3174 | { | |
3175 | REAL_VALUE_TYPE d; | |
3176 | jmp_buf handler; | |
3177 | rtx x; | |
3178 | ||
3179 | if (setjmp (handler)) | |
3180 | /* There used to be a warning here, but that is inadvisable. | |
3181 | People may want to cause traps, and the natural way | |
3182 | to do it should not get a warning. */ | |
3183 | return 0; | |
3184 | ||
3185 | set_float_handler (handler); | |
3186 | ||
3187 | REAL_VALUE_FROM_CONST_DOUBLE (d, op); | |
3188 | ||
3189 | switch (code) | |
3190 | { | |
3191 | case NEG: | |
3192 | d = REAL_VALUE_NEGATE (d); | |
3193 | break; | |
3194 | ||
3195 | case ABS: | |
8b3686ed | 3196 | if (REAL_VALUE_NEGATIVE (d)) |
7afe21cc RK |
3197 | d = REAL_VALUE_NEGATE (d); |
3198 | break; | |
3199 | ||
3200 | case FLOAT_TRUNCATE: | |
d3159aee | 3201 | d = real_value_truncate (mode, d); |
7afe21cc RK |
3202 | break; |
3203 | ||
3204 | case FLOAT_EXTEND: | |
3205 | /* All this does is change the mode. */ | |
3206 | break; | |
3207 | ||
3208 | case FIX: | |
d3159aee | 3209 | d = REAL_VALUE_RNDZINT (d); |
7afe21cc RK |
3210 | break; |
3211 | ||
3212 | case UNSIGNED_FIX: | |
d3159aee | 3213 | d = REAL_VALUE_UNSIGNED_RNDZINT (d); |
7afe21cc RK |
3214 | break; |
3215 | ||
d45cf215 RS |
3216 | case SQRT: |
3217 | return 0; | |
3218 | ||
7afe21cc RK |
3219 | default: |
3220 | abort (); | |
3221 | } | |
3222 | ||
560c94a2 | 3223 | x = CONST_DOUBLE_FROM_REAL_VALUE (d, mode); |
906c4e36 | 3224 | set_float_handler (NULL_PTR); |
7afe21cc RK |
3225 | return x; |
3226 | } | |
8e0ac43b RK |
3227 | |
3228 | else if (GET_CODE (op) == CONST_DOUBLE | |
3229 | && GET_MODE_CLASS (GET_MODE (op)) == MODE_FLOAT | |
3230 | && GET_MODE_CLASS (mode) == MODE_INT | |
906c4e36 | 3231 | && width <= HOST_BITS_PER_WIDE_INT && width > 0) |
7afe21cc RK |
3232 | { |
3233 | REAL_VALUE_TYPE d; | |
3234 | jmp_buf handler; | |
906c4e36 | 3235 | HOST_WIDE_INT val; |
7afe21cc RK |
3236 | |
3237 | if (setjmp (handler)) | |
3238 | return 0; | |
3239 | ||
3240 | set_float_handler (handler); | |
3241 | ||
3242 | REAL_VALUE_FROM_CONST_DOUBLE (d, op); | |
3243 | ||
3244 | switch (code) | |
3245 | { | |
3246 | case FIX: | |
3247 | val = REAL_VALUE_FIX (d); | |
3248 | break; | |
3249 | ||
3250 | case UNSIGNED_FIX: | |
3251 | val = REAL_VALUE_UNSIGNED_FIX (d); | |
3252 | break; | |
3253 | ||
3254 | default: | |
3255 | abort (); | |
3256 | } | |
3257 | ||
906c4e36 | 3258 | set_float_handler (NULL_PTR); |
7afe21cc RK |
3259 | |
3260 | /* Clear the bits that don't belong in our mode, | |
3261 | unless they and our sign bit are all one. | |
3262 | So we get either a reasonable negative value or a reasonable | |
3263 | unsigned value for this mode. */ | |
906c4e36 RK |
3264 | if (width < HOST_BITS_PER_WIDE_INT |
3265 | && ((val & ((HOST_WIDE_INT) (-1) << (width - 1))) | |
3266 | != ((HOST_WIDE_INT) (-1) << (width - 1)))) | |
3267 | val &= ((HOST_WIDE_INT) 1 << width) - 1; | |
7afe21cc | 3268 | |
906c4e36 | 3269 | return GEN_INT (val); |
7afe21cc RK |
3270 | } |
3271 | #endif | |
a6acbe15 RS |
3272 | /* This was formerly used only for non-IEEE float. |
3273 | eggert@twinsun.com says it is safe for IEEE also. */ | |
3274 | else | |
7afe21cc RK |
3275 | { |
3276 | /* There are some simplifications we can do even if the operands | |
a6acbe15 | 3277 | aren't constant. */ |
7afe21cc RK |
3278 | switch (code) |
3279 | { | |
3280 | case NEG: | |
3281 | case NOT: | |
3282 | /* (not (not X)) == X, similarly for NEG. */ | |
3283 | if (GET_CODE (op) == code) | |
3284 | return XEXP (op, 0); | |
3285 | break; | |
3286 | ||
3287 | case SIGN_EXTEND: | |
3288 | /* (sign_extend (truncate (minus (label_ref L1) (label_ref L2)))) | |
3289 | becomes just the MINUS if its mode is MODE. This allows | |
3290 | folding switch statements on machines using casesi (such as | |
3291 | the Vax). */ | |
3292 | if (GET_CODE (op) == TRUNCATE | |
3293 | && GET_MODE (XEXP (op, 0)) == mode | |
3294 | && GET_CODE (XEXP (op, 0)) == MINUS | |
3295 | && GET_CODE (XEXP (XEXP (op, 0), 0)) == LABEL_REF | |
3296 | && GET_CODE (XEXP (XEXP (op, 0), 1)) == LABEL_REF) | |
3297 | return XEXP (op, 0); | |
3298 | break; | |
3299 | } | |
3300 | ||
3301 | return 0; | |
3302 | } | |
7afe21cc RK |
3303 | } |
3304 | \f | |
3305 | /* Simplify a binary operation CODE with result mode MODE, operating on OP0 | |
3306 | and OP1. Return 0 if no simplification is possible. | |
3307 | ||
3308 | Don't use this for relational operations such as EQ or LT. | |
3309 | Use simplify_relational_operation instead. */ | |
3310 | ||
3311 | rtx | |
3312 | simplify_binary_operation (code, mode, op0, op1) | |
3313 | enum rtx_code code; | |
3314 | enum machine_mode mode; | |
3315 | rtx op0, op1; | |
3316 | { | |
906c4e36 RK |
3317 | register HOST_WIDE_INT arg0, arg1, arg0s, arg1s; |
3318 | HOST_WIDE_INT val; | |
7afe21cc | 3319 | int width = GET_MODE_BITSIZE (mode); |
96b0e481 | 3320 | rtx tem; |
7afe21cc RK |
3321 | |
3322 | /* Relational operations don't work here. We must know the mode | |
3323 | of the operands in order to do the comparison correctly. | |
3324 | Assuming a full word can give incorrect results. | |
3325 | Consider comparing 128 with -128 in QImode. */ | |
3326 | ||
3327 | if (GET_RTX_CLASS (code) == '<') | |
3328 | abort (); | |
3329 | ||
3330 | #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC) | |
3331 | if (GET_MODE_CLASS (mode) == MODE_FLOAT | |
3332 | && GET_CODE (op0) == CONST_DOUBLE && GET_CODE (op1) == CONST_DOUBLE | |
3333 | && mode == GET_MODE (op0) && mode == GET_MODE (op1)) | |
3334 | { | |
3335 | REAL_VALUE_TYPE f0, f1, value; | |
3336 | jmp_buf handler; | |
3337 | ||
3338 | if (setjmp (handler)) | |
3339 | return 0; | |
3340 | ||
3341 | set_float_handler (handler); | |
3342 | ||
3343 | REAL_VALUE_FROM_CONST_DOUBLE (f0, op0); | |
3344 | REAL_VALUE_FROM_CONST_DOUBLE (f1, op1); | |
5352b11a RS |
3345 | f0 = real_value_truncate (mode, f0); |
3346 | f1 = real_value_truncate (mode, f1); | |
7afe21cc RK |
3347 | |
3348 | #ifdef REAL_ARITHMETIC | |
d3159aee | 3349 | REAL_ARITHMETIC (value, rtx_to_tree_code (code), f0, f1); |
7afe21cc RK |
3350 | #else |
3351 | switch (code) | |
3352 | { | |
3353 | case PLUS: | |
3354 | value = f0 + f1; | |
3355 | break; | |
3356 | case MINUS: | |
3357 | value = f0 - f1; | |
3358 | break; | |
3359 | case MULT: | |
3360 | value = f0 * f1; | |
3361 | break; | |
3362 | case DIV: | |
3363 | #ifndef REAL_INFINITY | |
3364 | if (f1 == 0) | |
21d12b80 | 3365 | return 0; |
7afe21cc RK |
3366 | #endif |
3367 | value = f0 / f1; | |
3368 | break; | |
3369 | case SMIN: | |
3370 | value = MIN (f0, f1); | |
3371 | break; | |
3372 | case SMAX: | |
3373 | value = MAX (f0, f1); | |
3374 | break; | |
3375 | default: | |
3376 | abort (); | |
3377 | } | |
3378 | #endif | |
3379 | ||
5352b11a | 3380 | value = real_value_truncate (mode, value); |
831522a4 | 3381 | set_float_handler (NULL_PTR); |
560c94a2 | 3382 | return CONST_DOUBLE_FROM_REAL_VALUE (value, mode); |
7afe21cc | 3383 | } |
6076248a | 3384 | #endif /* not REAL_IS_NOT_DOUBLE, or REAL_ARITHMETIC */ |
7afe21cc RK |
3385 | |
3386 | /* We can fold some multi-word operations. */ | |
6076248a | 3387 | if (GET_MODE_CLASS (mode) == MODE_INT |
33085906 | 3388 | && width == HOST_BITS_PER_WIDE_INT * 2 |
fe873240 | 3389 | && (GET_CODE (op0) == CONST_DOUBLE || GET_CODE (op0) == CONST_INT) |
6076248a | 3390 | && (GET_CODE (op1) == CONST_DOUBLE || GET_CODE (op1) == CONST_INT)) |
7afe21cc | 3391 | { |
906c4e36 | 3392 | HOST_WIDE_INT l1, l2, h1, h2, lv, hv; |
7afe21cc | 3393 | |
fe873240 RK |
3394 | if (GET_CODE (op0) == CONST_DOUBLE) |
3395 | l1 = CONST_DOUBLE_LOW (op0), h1 = CONST_DOUBLE_HIGH (op0); | |
3396 | else | |
3397 | l1 = INTVAL (op0), h1 = l1 < 0 ? -1 : 0; | |
7afe21cc RK |
3398 | |
3399 | if (GET_CODE (op1) == CONST_DOUBLE) | |
3400 | l2 = CONST_DOUBLE_LOW (op1), h2 = CONST_DOUBLE_HIGH (op1); | |
3401 | else | |
3402 | l2 = INTVAL (op1), h2 = l2 < 0 ? -1 : 0; | |
3403 | ||
3404 | switch (code) | |
3405 | { | |
3406 | case MINUS: | |
3407 | /* A - B == A + (-B). */ | |
3408 | neg_double (l2, h2, &lv, &hv); | |
3409 | l2 = lv, h2 = hv; | |
3410 | ||
3411 | /* .. fall through ... */ | |
3412 | ||
3413 | case PLUS: | |
3414 | add_double (l1, h1, l2, h2, &lv, &hv); | |
3415 | break; | |
3416 | ||
3417 | case MULT: | |
3418 | mul_double (l1, h1, l2, h2, &lv, &hv); | |
3419 | break; | |
3420 | ||
3421 | case DIV: case MOD: case UDIV: case UMOD: | |
3422 | /* We'd need to include tree.h to do this and it doesn't seem worth | |
3423 | it. */ | |
3424 | return 0; | |
3425 | ||
3426 | case AND: | |
3427 | lv = l1 & l2, hv = h1 & h2; | |
3428 | break; | |
3429 | ||
3430 | case IOR: | |
3431 | lv = l1 | l2, hv = h1 | h2; | |
3432 | break; | |
3433 | ||
3434 | case XOR: | |
3435 | lv = l1 ^ l2, hv = h1 ^ h2; | |
3436 | break; | |
3437 | ||
3438 | case SMIN: | |
906c4e36 RK |
3439 | if (h1 < h2 |
3440 | || (h1 == h2 | |
3441 | && ((unsigned HOST_WIDE_INT) l1 | |
3442 | < (unsigned HOST_WIDE_INT) l2))) | |
7afe21cc RK |
3443 | lv = l1, hv = h1; |
3444 | else | |
3445 | lv = l2, hv = h2; | |
3446 | break; | |
3447 | ||
3448 | case SMAX: | |
906c4e36 RK |
3449 | if (h1 > h2 |
3450 | || (h1 == h2 | |
3451 | && ((unsigned HOST_WIDE_INT) l1 | |
3452 | > (unsigned HOST_WIDE_INT) l2))) | |
7afe21cc RK |
3453 | lv = l1, hv = h1; |
3454 | else | |
3455 | lv = l2, hv = h2; | |
3456 | break; | |
3457 | ||
3458 | case UMIN: | |
906c4e36 RK |
3459 | if ((unsigned HOST_WIDE_INT) h1 < (unsigned HOST_WIDE_INT) h2 |
3460 | || (h1 == h2 | |
3461 | && ((unsigned HOST_WIDE_INT) l1 | |
3462 | < (unsigned HOST_WIDE_INT) l2))) | |
7afe21cc RK |
3463 | lv = l1, hv = h1; |
3464 | else | |
3465 | lv = l2, hv = h2; | |
3466 | break; | |
3467 | ||
3468 | case UMAX: | |
906c4e36 RK |
3469 | if ((unsigned HOST_WIDE_INT) h1 > (unsigned HOST_WIDE_INT) h2 |
3470 | || (h1 == h2 | |
3471 | && ((unsigned HOST_WIDE_INT) l1 | |
3472 | > (unsigned HOST_WIDE_INT) l2))) | |
7afe21cc RK |
3473 | lv = l1, hv = h1; |
3474 | else | |
3475 | lv = l2, hv = h2; | |
3476 | break; | |
3477 | ||
3478 | case LSHIFTRT: case ASHIFTRT: | |
45620ed4 | 3479 | case ASHIFT: |
7afe21cc RK |
3480 | case ROTATE: case ROTATERT: |
3481 | #ifdef SHIFT_COUNT_TRUNCATED | |
85c0a556 RK |
3482 | if (SHIFT_COUNT_TRUNCATED) |
3483 | l2 &= (GET_MODE_BITSIZE (mode) - 1), h2 = 0; | |
7afe21cc RK |
3484 | #endif |
3485 | ||
3486 | if (h2 != 0 || l2 < 0 || l2 >= GET_MODE_BITSIZE (mode)) | |
3487 | return 0; | |
3488 | ||
3489 | if (code == LSHIFTRT || code == ASHIFTRT) | |
3490 | rshift_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv, | |
3491 | code == ASHIFTRT); | |
45620ed4 RK |
3492 | else if (code == ASHIFT) |
3493 | lshift_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv, 1); | |
7afe21cc RK |
3494 | else if (code == ROTATE) |
3495 | lrotate_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv); | |
3496 | else /* code == ROTATERT */ | |
3497 | rrotate_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv); | |
3498 | break; | |
3499 | ||
3500 | default: | |
3501 | return 0; | |
3502 | } | |
3503 | ||
3504 | return immed_double_const (lv, hv, mode); | |
3505 | } | |
7afe21cc RK |
3506 | |
3507 | if (GET_CODE (op0) != CONST_INT || GET_CODE (op1) != CONST_INT | |
906c4e36 | 3508 | || width > HOST_BITS_PER_WIDE_INT || width == 0) |
7afe21cc RK |
3509 | { |
3510 | /* Even if we can't compute a constant result, | |
3511 | there are some cases worth simplifying. */ | |
3512 | ||
3513 | switch (code) | |
3514 | { | |
3515 | case PLUS: | |
3516 | /* In IEEE floating point, x+0 is not the same as x. Similarly | |
3517 | for the other optimizations below. */ | |
3518 | if (TARGET_FLOAT_FORMAT == IEEE_FLOAT_FORMAT | |
a83afb65 | 3519 | && FLOAT_MODE_P (mode) && ! flag_fast_math) |
7afe21cc RK |
3520 | break; |
3521 | ||
3522 | if (op1 == CONST0_RTX (mode)) | |
3523 | return op0; | |
3524 | ||
7afe21cc RK |
3525 | /* ((-a) + b) -> (b - a) and similarly for (a + (-b)) */ |
3526 | if (GET_CODE (op0) == NEG) | |
96b0e481 | 3527 | return cse_gen_binary (MINUS, mode, op1, XEXP (op0, 0)); |
7afe21cc | 3528 | else if (GET_CODE (op1) == NEG) |
96b0e481 | 3529 | return cse_gen_binary (MINUS, mode, op0, XEXP (op1, 0)); |
7afe21cc | 3530 | |
96b0e481 RK |
3531 | /* Handle both-operands-constant cases. We can only add |
3532 | CONST_INTs to constants since the sum of relocatable symbols | |
fe873240 RK |
3533 | can't be handled by most assemblers. Don't add CONST_INT |
3534 | to CONST_INT since overflow won't be computed properly if wider | |
3535 | than HOST_BITS_PER_WIDE_INT. */ | |
7afe21cc | 3536 | |
fe873240 RK |
3537 | if (CONSTANT_P (op0) && GET_MODE (op0) != VOIDmode |
3538 | && GET_CODE (op1) == CONST_INT) | |
96b0e481 | 3539 | return plus_constant (op0, INTVAL (op1)); |
fe873240 RK |
3540 | else if (CONSTANT_P (op1) && GET_MODE (op1) != VOIDmode |
3541 | && GET_CODE (op0) == CONST_INT) | |
96b0e481 | 3542 | return plus_constant (op1, INTVAL (op0)); |
7afe21cc | 3543 | |
30d69925 RK |
3544 | /* See if this is something like X * C - X or vice versa or |
3545 | if the multiplication is written as a shift. If so, we can | |
3546 | distribute and make a new multiply, shift, or maybe just | |
3547 | have X (if C is 2 in the example above). But don't make | |
3548 | real multiply if we didn't have one before. */ | |
3549 | ||
3550 | if (! FLOAT_MODE_P (mode)) | |
3551 | { | |
3552 | HOST_WIDE_INT coeff0 = 1, coeff1 = 1; | |
3553 | rtx lhs = op0, rhs = op1; | |
3554 | int had_mult = 0; | |
3555 | ||
3556 | if (GET_CODE (lhs) == NEG) | |
3557 | coeff0 = -1, lhs = XEXP (lhs, 0); | |
3558 | else if (GET_CODE (lhs) == MULT | |
3559 | && GET_CODE (XEXP (lhs, 1)) == CONST_INT) | |
3560 | { | |
3561 | coeff0 = INTVAL (XEXP (lhs, 1)), lhs = XEXP (lhs, 0); | |
3562 | had_mult = 1; | |
3563 | } | |
3564 | else if (GET_CODE (lhs) == ASHIFT | |
3565 | && GET_CODE (XEXP (lhs, 1)) == CONST_INT | |
3566 | && INTVAL (XEXP (lhs, 1)) >= 0 | |
3567 | && INTVAL (XEXP (lhs, 1)) < HOST_BITS_PER_WIDE_INT) | |
3568 | { | |
3569 | coeff0 = ((HOST_WIDE_INT) 1) << INTVAL (XEXP (lhs, 1)); | |
3570 | lhs = XEXP (lhs, 0); | |
3571 | } | |
3572 | ||
3573 | if (GET_CODE (rhs) == NEG) | |
3574 | coeff1 = -1, rhs = XEXP (rhs, 0); | |
3575 | else if (GET_CODE (rhs) == MULT | |
3576 | && GET_CODE (XEXP (rhs, 1)) == CONST_INT) | |
3577 | { | |
3578 | coeff1 = INTVAL (XEXP (rhs, 1)), rhs = XEXP (rhs, 0); | |
3579 | had_mult = 1; | |
3580 | } | |
3581 | else if (GET_CODE (rhs) == ASHIFT | |
3582 | && GET_CODE (XEXP (rhs, 1)) == CONST_INT | |
3583 | && INTVAL (XEXP (rhs, 1)) >= 0 | |
3584 | && INTVAL (XEXP (rhs, 1)) < HOST_BITS_PER_WIDE_INT) | |
3585 | { | |
3586 | coeff1 = ((HOST_WIDE_INT) 1) << INTVAL (XEXP (rhs, 1)); | |
3587 | rhs = XEXP (rhs, 0); | |
3588 | } | |
3589 | ||
3590 | if (rtx_equal_p (lhs, rhs)) | |
3591 | { | |
3592 | tem = cse_gen_binary (MULT, mode, lhs, | |
3593 | GEN_INT (coeff0 + coeff1)); | |
3594 | return (GET_CODE (tem) == MULT && ! had_mult) ? 0 : tem; | |
3595 | } | |
3596 | } | |
3597 | ||
96b0e481 RK |
3598 | /* If one of the operands is a PLUS or a MINUS, see if we can |
3599 | simplify this by the associative law. | |
3600 | Don't use the associative law for floating point. | |
3601 | The inaccuracy makes it nonassociative, | |
3602 | and subtle programs can break if operations are associated. */ | |
7afe21cc | 3603 | |
cbf6a543 | 3604 | if (INTEGRAL_MODE_P (mode) |
96b0e481 RK |
3605 | && (GET_CODE (op0) == PLUS || GET_CODE (op0) == MINUS |
3606 | || GET_CODE (op1) == PLUS || GET_CODE (op1) == MINUS) | |
3607 | && (tem = simplify_plus_minus (code, mode, op0, op1)) != 0) | |
3608 | return tem; | |
7afe21cc RK |
3609 | break; |
3610 | ||
3611 | case COMPARE: | |
3612 | #ifdef HAVE_cc0 | |
3613 | /* Convert (compare FOO (const_int 0)) to FOO unless we aren't | |
3614 | using cc0, in which case we want to leave it as a COMPARE | |
3615 | so we can distinguish it from a register-register-copy. | |
3616 | ||
3617 | In IEEE floating point, x-0 is not the same as x. */ | |
3618 | ||
3619 | if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT | |
a83afb65 | 3620 | || ! FLOAT_MODE_P (mode) || flag_fast_math) |
7afe21cc RK |
3621 | && op1 == CONST0_RTX (mode)) |
3622 | return op0; | |
3623 | #else | |
3624 | /* Do nothing here. */ | |
3625 | #endif | |
3626 | break; | |
3627 | ||
3628 | case MINUS: | |
21648b45 RK |
3629 | /* None of these optimizations can be done for IEEE |
3630 | floating point. */ | |
3631 | if (TARGET_FLOAT_FORMAT == IEEE_FLOAT_FORMAT | |
a83afb65 | 3632 | && FLOAT_MODE_P (mode) && ! flag_fast_math) |
21648b45 RK |
3633 | break; |
3634 | ||
a83afb65 RK |
3635 | /* We can't assume x-x is 0 even with non-IEEE floating point, |
3636 | but since it is zero except in very strange circumstances, we | |
3637 | will treat it as zero with -ffast-math. */ | |
7afe21cc RK |
3638 | if (rtx_equal_p (op0, op1) |
3639 | && ! side_effects_p (op0) | |
a83afb65 RK |
3640 | && (! FLOAT_MODE_P (mode) || flag_fast_math)) |
3641 | return CONST0_RTX (mode); | |
7afe21cc RK |
3642 | |
3643 | /* Change subtraction from zero into negation. */ | |
3644 | if (op0 == CONST0_RTX (mode)) | |
3645 | return gen_rtx (NEG, mode, op1); | |
3646 | ||
96b0e481 RK |
3647 | /* (-1 - a) is ~a. */ |
3648 | if (op0 == constm1_rtx) | |
3649 | return gen_rtx (NOT, mode, op1); | |
3650 | ||
7afe21cc RK |
3651 | /* Subtracting 0 has no effect. */ |
3652 | if (op1 == CONST0_RTX (mode)) | |
3653 | return op0; | |
3654 | ||
30d69925 RK |
3655 | /* See if this is something like X * C - X or vice versa or |
3656 | if the multiplication is written as a shift. If so, we can | |
3657 | distribute and make a new multiply, shift, or maybe just | |
3658 | have X (if C is 2 in the example above). But don't make | |
3659 | real multiply if we didn't have one before. */ | |
3660 | ||
3661 | if (! FLOAT_MODE_P (mode)) | |
3662 | { | |
3663 | HOST_WIDE_INT coeff0 = 1, coeff1 = 1; | |
3664 | rtx lhs = op0, rhs = op1; | |
3665 | int had_mult = 0; | |
3666 | ||
3667 | if (GET_CODE (lhs) == NEG) | |
3668 | coeff0 = -1, lhs = XEXP (lhs, 0); | |
3669 | else if (GET_CODE (lhs) == MULT | |
3670 | && GET_CODE (XEXP (lhs, 1)) == CONST_INT) | |
3671 | { | |
3672 | coeff0 = INTVAL (XEXP (lhs, 1)), lhs = XEXP (lhs, 0); | |
3673 | had_mult = 1; | |
3674 | } | |
3675 | else if (GET_CODE (lhs) == ASHIFT | |
3676 | && GET_CODE (XEXP (lhs, 1)) == CONST_INT | |
3677 | && INTVAL (XEXP (lhs, 1)) >= 0 | |
3678 | && INTVAL (XEXP (lhs, 1)) < HOST_BITS_PER_WIDE_INT) | |
3679 | { | |
3680 | coeff0 = ((HOST_WIDE_INT) 1) << INTVAL (XEXP (lhs, 1)); | |
3681 | lhs = XEXP (lhs, 0); | |
3682 | } | |
3683 | ||
3684 | if (GET_CODE (rhs) == NEG) | |
3685 | coeff1 = - 1, rhs = XEXP (rhs, 0); | |
3686 | else if (GET_CODE (rhs) == MULT | |
3687 | && GET_CODE (XEXP (rhs, 1)) == CONST_INT) | |
3688 | { | |
3689 | coeff1 = INTVAL (XEXP (rhs, 1)), rhs = XEXP (rhs, 0); | |
3690 | had_mult = 1; | |
3691 | } | |
3692 | else if (GET_CODE (rhs) == ASHIFT | |
3693 | && GET_CODE (XEXP (rhs, 1)) == CONST_INT | |
3694 | && INTVAL (XEXP (rhs, 1)) >= 0 | |
3695 | && INTVAL (XEXP (rhs, 1)) < HOST_BITS_PER_WIDE_INT) | |
3696 | { | |
3697 | coeff1 = ((HOST_WIDE_INT) 1) << INTVAL (XEXP (rhs, 1)); | |
3698 | rhs = XEXP (rhs, 0); | |
3699 | } | |
3700 | ||
3701 | if (rtx_equal_p (lhs, rhs)) | |
3702 | { | |
3703 | tem = cse_gen_binary (MULT, mode, lhs, | |
3704 | GEN_INT (coeff0 - coeff1)); | |
3705 | return (GET_CODE (tem) == MULT && ! had_mult) ? 0 : tem; | |
3706 | } | |
3707 | } | |
3708 | ||
7afe21cc RK |
3709 | /* (a - (-b)) -> (a + b). */ |
3710 | if (GET_CODE (op1) == NEG) | |
96b0e481 | 3711 | return cse_gen_binary (PLUS, mode, op0, XEXP (op1, 0)); |
7afe21cc | 3712 | |
96b0e481 RK |
3713 | /* If one of the operands is a PLUS or a MINUS, see if we can |
3714 | simplify this by the associative law. | |
3715 | Don't use the associative law for floating point. | |
7afe21cc RK |
3716 | The inaccuracy makes it nonassociative, |
3717 | and subtle programs can break if operations are associated. */ | |
7afe21cc | 3718 | |
cbf6a543 | 3719 | if (INTEGRAL_MODE_P (mode) |
96b0e481 RK |
3720 | && (GET_CODE (op0) == PLUS || GET_CODE (op0) == MINUS |
3721 | || GET_CODE (op1) == PLUS || GET_CODE (op1) == MINUS) | |
3722 | && (tem = simplify_plus_minus (code, mode, op0, op1)) != 0) | |
3723 | return tem; | |
7afe21cc RK |
3724 | |
3725 | /* Don't let a relocatable value get a negative coeff. */ | |
b5a09c41 | 3726 | if (GET_CODE (op1) == CONST_INT && GET_MODE (op0) != VOIDmode) |
7afe21cc RK |
3727 | return plus_constant (op0, - INTVAL (op1)); |
3728 | break; | |
3729 | ||
3730 | case MULT: | |
3731 | if (op1 == constm1_rtx) | |
3732 | { | |
96b0e481 | 3733 | tem = simplify_unary_operation (NEG, mode, op0, mode); |
7afe21cc RK |
3734 | |
3735 | return tem ? tem : gen_rtx (NEG, mode, op0); | |
3736 | } | |
3737 | ||
3738 | /* In IEEE floating point, x*0 is not always 0. */ | |
3739 | if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT | |
a83afb65 | 3740 | || ! FLOAT_MODE_P (mode) || flag_fast_math) |
7afe21cc RK |
3741 | && op1 == CONST0_RTX (mode) |
3742 | && ! side_effects_p (op0)) | |
3743 | return op1; | |
3744 | ||
3745 | /* In IEEE floating point, x*1 is not equivalent to x for nans. | |
3746 | However, ANSI says we can drop signals, | |
3747 | so we can do this anyway. */ | |
3748 | if (op1 == CONST1_RTX (mode)) | |
3749 | return op0; | |
3750 | ||
c407b802 RK |
3751 | /* Convert multiply by constant power of two into shift unless |
3752 | we are still generating RTL. This test is a kludge. */ | |
7afe21cc | 3753 | if (GET_CODE (op1) == CONST_INT |
c407b802 RK |
3754 | && (val = exact_log2 (INTVAL (op1))) >= 0 |
3755 | && ! rtx_equal_function_value_matters) | |
906c4e36 | 3756 | return gen_rtx (ASHIFT, mode, op0, GEN_INT (val)); |
7afe21cc RK |
3757 | |
3758 | if (GET_CODE (op1) == CONST_DOUBLE | |
3759 | && GET_MODE_CLASS (GET_MODE (op1)) == MODE_FLOAT) | |
3760 | { | |
3761 | REAL_VALUE_TYPE d; | |
5a3d4bef RK |
3762 | jmp_buf handler; |
3763 | int op1is2, op1ism1; | |
3764 | ||
3765 | if (setjmp (handler)) | |
3766 | return 0; | |
3767 | ||
3768 | set_float_handler (handler); | |
7afe21cc | 3769 | REAL_VALUE_FROM_CONST_DOUBLE (d, op1); |
5a3d4bef RK |
3770 | op1is2 = REAL_VALUES_EQUAL (d, dconst2); |
3771 | op1ism1 = REAL_VALUES_EQUAL (d, dconstm1); | |
3772 | set_float_handler (NULL_PTR); | |
7afe21cc RK |
3773 | |
3774 | /* x*2 is x+x and x*(-1) is -x */ | |
5a3d4bef | 3775 | if (op1is2 && GET_MODE (op0) == mode) |
7afe21cc RK |
3776 | return gen_rtx (PLUS, mode, op0, copy_rtx (op0)); |
3777 | ||
5a3d4bef | 3778 | else if (op1ism1 && GET_MODE (op0) == mode) |
7afe21cc RK |
3779 | return gen_rtx (NEG, mode, op0); |
3780 | } | |
3781 | break; | |
3782 | ||
3783 | case IOR: | |
3784 | if (op1 == const0_rtx) | |
3785 | return op0; | |
3786 | if (GET_CODE (op1) == CONST_INT | |
3787 | && (INTVAL (op1) & GET_MODE_MASK (mode)) == GET_MODE_MASK (mode)) | |
3788 | return op1; | |
3789 | if (rtx_equal_p (op0, op1) && ! side_effects_p (op0)) | |
3790 | return op0; | |
3791 | /* A | (~A) -> -1 */ | |
3792 | if (((GET_CODE (op0) == NOT && rtx_equal_p (XEXP (op0, 0), op1)) | |
3793 | || (GET_CODE (op1) == NOT && rtx_equal_p (XEXP (op1, 0), op0))) | |
31dcf83f | 3794 | && ! side_effects_p (op0) |
8e7e5365 | 3795 | && GET_MODE_CLASS (mode) != MODE_CC) |
7afe21cc RK |
3796 | return constm1_rtx; |
3797 | break; | |
3798 | ||
3799 | case XOR: | |
3800 | if (op1 == const0_rtx) | |
3801 | return op0; | |
3802 | if (GET_CODE (op1) == CONST_INT | |
3803 | && (INTVAL (op1) & GET_MODE_MASK (mode)) == GET_MODE_MASK (mode)) | |
3804 | return gen_rtx (NOT, mode, op0); | |
31dcf83f | 3805 | if (op0 == op1 && ! side_effects_p (op0) |
8e7e5365 | 3806 | && GET_MODE_CLASS (mode) != MODE_CC) |
7afe21cc RK |
3807 | return const0_rtx; |
3808 | break; | |
3809 | ||
3810 | case AND: | |
3811 | if (op1 == const0_rtx && ! side_effects_p (op0)) | |
3812 | return const0_rtx; | |
3813 | if (GET_CODE (op1) == CONST_INT | |
3814 | && (INTVAL (op1) & GET_MODE_MASK (mode)) == GET_MODE_MASK (mode)) | |
3815 | return op0; | |
31dcf83f | 3816 | if (op0 == op1 && ! side_effects_p (op0) |
8e7e5365 | 3817 | && GET_MODE_CLASS (mode) != MODE_CC) |
7afe21cc RK |
3818 | return op0; |
3819 | /* A & (~A) -> 0 */ | |
3820 | if (((GET_CODE (op0) == NOT && rtx_equal_p (XEXP (op0, 0), op1)) | |
3821 | || (GET_CODE (op1) == NOT && rtx_equal_p (XEXP (op1, 0), op0))) | |
709ab4fc | 3822 | && ! side_effects_p (op0) |
8e7e5365 | 3823 | && GET_MODE_CLASS (mode) != MODE_CC) |
7afe21cc RK |
3824 | return const0_rtx; |
3825 | break; | |
3826 | ||
3827 | case UDIV: | |
3828 | /* Convert divide by power of two into shift (divide by 1 handled | |
3829 | below). */ | |
3830 | if (GET_CODE (op1) == CONST_INT | |
3831 | && (arg1 = exact_log2 (INTVAL (op1))) > 0) | |
906c4e36 | 3832 | return gen_rtx (LSHIFTRT, mode, op0, GEN_INT (arg1)); |
7afe21cc RK |
3833 | |
3834 | /* ... fall through ... */ | |
3835 | ||
3836 | case DIV: | |
3837 | if (op1 == CONST1_RTX (mode)) | |
3838 | return op0; | |
e7a522ba RS |
3839 | |
3840 | /* In IEEE floating point, 0/x is not always 0. */ | |
3841 | if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT | |
a83afb65 | 3842 | || ! FLOAT_MODE_P (mode) || flag_fast_math) |
e7a522ba RS |
3843 | && op0 == CONST0_RTX (mode) |
3844 | && ! side_effects_p (op1)) | |
7afe21cc | 3845 | return op0; |
e7a522ba | 3846 | |
7afe21cc | 3847 | #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC) |
a83afb65 RK |
3848 | /* Change division by a constant into multiplication. Only do |
3849 | this with -ffast-math until an expert says it is safe in | |
3850 | general. */ | |
7afe21cc RK |
3851 | else if (GET_CODE (op1) == CONST_DOUBLE |
3852 | && GET_MODE_CLASS (GET_MODE (op1)) == MODE_FLOAT | |
a83afb65 RK |
3853 | && op1 != CONST0_RTX (mode) |
3854 | && flag_fast_math) | |
7afe21cc RK |
3855 | { |
3856 | REAL_VALUE_TYPE d; | |
3857 | REAL_VALUE_FROM_CONST_DOUBLE (d, op1); | |
a83afb65 RK |
3858 | |
3859 | if (! REAL_VALUES_EQUAL (d, dconst0)) | |
3860 | { | |
7afe21cc | 3861 | #if defined (REAL_ARITHMETIC) |
a83afb65 RK |
3862 | REAL_ARITHMETIC (d, rtx_to_tree_code (DIV), dconst1, d); |
3863 | return gen_rtx (MULT, mode, op0, | |
3864 | CONST_DOUBLE_FROM_REAL_VALUE (d, mode)); | |
7afe21cc | 3865 | #else |
a83afb65 RK |
3866 | return gen_rtx (MULT, mode, op0, |
3867 | CONST_DOUBLE_FROM_REAL_VALUE (1./d, mode)); | |
7afe21cc | 3868 | #endif |
a83afb65 RK |
3869 | } |
3870 | } | |
7afe21cc RK |
3871 | #endif |
3872 | break; | |
3873 | ||
3874 | case UMOD: | |
3875 | /* Handle modulus by power of two (mod with 1 handled below). */ | |
3876 | if (GET_CODE (op1) == CONST_INT | |
3877 | && exact_log2 (INTVAL (op1)) > 0) | |
906c4e36 | 3878 | return gen_rtx (AND, mode, op0, GEN_INT (INTVAL (op1) - 1)); |
7afe21cc RK |
3879 | |
3880 | /* ... fall through ... */ | |
3881 | ||
3882 | case MOD: | |
3883 | if ((op0 == const0_rtx || op1 == const1_rtx) | |
3884 | && ! side_effects_p (op0) && ! side_effects_p (op1)) | |
3885 | return const0_rtx; | |
3886 | break; | |
3887 | ||
3888 | case ROTATERT: | |
3889 | case ROTATE: | |
3890 | /* Rotating ~0 always results in ~0. */ | |
906c4e36 | 3891 | if (GET_CODE (op0) == CONST_INT && width <= HOST_BITS_PER_WIDE_INT |
7afe21cc RK |
3892 | && INTVAL (op0) == GET_MODE_MASK (mode) |
3893 | && ! side_effects_p (op1)) | |
3894 | return op0; | |
3895 | ||
3896 | /* ... fall through ... */ | |
3897 | ||
7afe21cc RK |
3898 | case ASHIFT: |
3899 | case ASHIFTRT: | |
3900 | case LSHIFTRT: | |
3901 | if (op1 == const0_rtx) | |
3902 | return op0; | |
3903 | if (op0 == const0_rtx && ! side_effects_p (op1)) | |
3904 | return op0; | |
3905 | break; | |
3906 | ||
3907 | case SMIN: | |
906c4e36 RK |
3908 | if (width <= HOST_BITS_PER_WIDE_INT && GET_CODE (op1) == CONST_INT |
3909 | && INTVAL (op1) == (HOST_WIDE_INT) 1 << (width -1) | |
7afe21cc RK |
3910 | && ! side_effects_p (op0)) |
3911 | return op1; | |
3912 | else if (rtx_equal_p (op0, op1) && ! side_effects_p (op0)) | |
3913 | return op0; | |
3914 | break; | |
3915 | ||
3916 | case SMAX: | |
906c4e36 | 3917 | if (width <= HOST_BITS_PER_WIDE_INT && GET_CODE (op1) == CONST_INT |
dbbe6445 RK |
3918 | && (INTVAL (op1) |
3919 | == (unsigned HOST_WIDE_INT) GET_MODE_MASK (mode) >> 1) | |
7afe21cc RK |
3920 | && ! side_effects_p (op0)) |
3921 | return op1; | |
3922 | else if (rtx_equal_p (op0, op1) && ! side_effects_p (op0)) | |
3923 | return op0; | |
3924 | break; | |
3925 | ||
3926 | case UMIN: | |
3927 | if (op1 == const0_rtx && ! side_effects_p (op0)) | |
3928 | return op1; | |
3929 | else if (rtx_equal_p (op0, op1) && ! side_effects_p (op0)) | |
3930 | return op0; | |
3931 | break; | |
3932 | ||
3933 | case UMAX: | |
3934 | if (op1 == constm1_rtx && ! side_effects_p (op0)) | |
3935 | return op1; | |
3936 | else if (rtx_equal_p (op0, op1) && ! side_effects_p (op0)) | |
3937 | return op0; | |
3938 | break; | |
3939 | ||
3940 | default: | |
3941 | abort (); | |
3942 | } | |
3943 | ||
3944 | return 0; | |
3945 | } | |
3946 | ||
3947 | /* Get the integer argument values in two forms: | |
3948 | zero-extended in ARG0, ARG1 and sign-extended in ARG0S, ARG1S. */ | |
3949 | ||
3950 | arg0 = INTVAL (op0); | |
3951 | arg1 = INTVAL (op1); | |
3952 | ||
906c4e36 | 3953 | if (width < HOST_BITS_PER_WIDE_INT) |
7afe21cc | 3954 | { |
906c4e36 RK |
3955 | arg0 &= ((HOST_WIDE_INT) 1 << width) - 1; |
3956 | arg1 &= ((HOST_WIDE_INT) 1 << width) - 1; | |
7afe21cc RK |
3957 | |
3958 | arg0s = arg0; | |
906c4e36 RK |
3959 | if (arg0s & ((HOST_WIDE_INT) 1 << (width - 1))) |
3960 | arg0s |= ((HOST_WIDE_INT) (-1) << width); | |
7afe21cc RK |
3961 | |
3962 | arg1s = arg1; | |
906c4e36 RK |
3963 | if (arg1s & ((HOST_WIDE_INT) 1 << (width - 1))) |
3964 | arg1s |= ((HOST_WIDE_INT) (-1) << width); | |
7afe21cc RK |
3965 | } |
3966 | else | |
3967 | { | |
3968 | arg0s = arg0; | |
3969 | arg1s = arg1; | |
3970 | } | |
3971 | ||
3972 | /* Compute the value of the arithmetic. */ | |
3973 | ||
3974 | switch (code) | |
3975 | { | |
3976 | case PLUS: | |
538b78e7 | 3977 | val = arg0s + arg1s; |
7afe21cc RK |
3978 | break; |
3979 | ||
3980 | case MINUS: | |
538b78e7 | 3981 | val = arg0s - arg1s; |
7afe21cc RK |
3982 | break; |
3983 | ||
3984 | case MULT: | |
3985 | val = arg0s * arg1s; | |
3986 | break; | |
3987 | ||
3988 | case DIV: | |
3989 | if (arg1s == 0) | |
3990 | return 0; | |
3991 | val = arg0s / arg1s; | |
3992 | break; | |
3993 | ||
3994 | case MOD: | |
3995 | if (arg1s == 0) | |
3996 | return 0; | |
3997 | val = arg0s % arg1s; | |
3998 | break; | |
3999 | ||
4000 | case UDIV: | |
4001 | if (arg1 == 0) | |
4002 | return 0; | |
906c4e36 | 4003 | val = (unsigned HOST_WIDE_INT) arg0 / arg1; |
7afe21cc RK |
4004 | break; |
4005 | ||
4006 | case UMOD: | |
4007 | if (arg1 == 0) | |
4008 | return 0; | |
906c4e36 | 4009 | val = (unsigned HOST_WIDE_INT) arg0 % arg1; |
7afe21cc RK |
4010 | break; |
4011 | ||
4012 | case AND: | |
4013 | val = arg0 & arg1; | |
4014 | break; | |
4015 | ||
4016 | case IOR: | |
4017 | val = arg0 | arg1; | |
4018 | break; | |
4019 | ||
4020 | case XOR: | |
4021 | val = arg0 ^ arg1; | |
4022 | break; | |
4023 | ||
4024 | case LSHIFTRT: | |
4025 | /* If shift count is undefined, don't fold it; let the machine do | |
4026 | what it wants. But truncate it if the machine will do that. */ | |
4027 | if (arg1 < 0) | |
4028 | return 0; | |
4029 | ||
4030 | #ifdef SHIFT_COUNT_TRUNCATED | |
85c0a556 | 4031 | if (SHIFT_COUNT_TRUNCATED) |
4d61f8c5 | 4032 | arg1 %= width; |
7afe21cc RK |
4033 | #endif |
4034 | ||
906c4e36 | 4035 | val = ((unsigned HOST_WIDE_INT) arg0) >> arg1; |
7afe21cc RK |
4036 | break; |
4037 | ||
4038 | case ASHIFT: | |
7afe21cc RK |
4039 | if (arg1 < 0) |
4040 | return 0; | |
4041 | ||
4042 | #ifdef SHIFT_COUNT_TRUNCATED | |
85c0a556 | 4043 | if (SHIFT_COUNT_TRUNCATED) |
4d61f8c5 | 4044 | arg1 %= width; |
7afe21cc RK |
4045 | #endif |
4046 | ||
906c4e36 | 4047 | val = ((unsigned HOST_WIDE_INT) arg0) << arg1; |
7afe21cc RK |
4048 | break; |
4049 | ||
4050 | case ASHIFTRT: | |
4051 | if (arg1 < 0) | |
4052 | return 0; | |
4053 | ||
4054 | #ifdef SHIFT_COUNT_TRUNCATED | |
85c0a556 | 4055 | if (SHIFT_COUNT_TRUNCATED) |
4d61f8c5 | 4056 | arg1 %= width; |
7afe21cc RK |
4057 | #endif |
4058 | ||
7afe21cc | 4059 | val = arg0s >> arg1; |
2166571b RS |
4060 | |
4061 | /* Bootstrap compiler may not have sign extended the right shift. | |
4062 | Manually extend the sign to insure bootstrap cc matches gcc. */ | |
4063 | if (arg0s < 0 && arg1 > 0) | |
4064 | val |= ((HOST_WIDE_INT) -1) << (HOST_BITS_PER_WIDE_INT - arg1); | |
4065 | ||
7afe21cc RK |
4066 | break; |
4067 | ||
4068 | case ROTATERT: | |
4069 | if (arg1 < 0) | |
4070 | return 0; | |
4071 | ||
4072 | arg1 %= width; | |
906c4e36 RK |
4073 | val = ((((unsigned HOST_WIDE_INT) arg0) << (width - arg1)) |
4074 | | (((unsigned HOST_WIDE_INT) arg0) >> arg1)); | |
7afe21cc RK |
4075 | break; |
4076 | ||
4077 | case ROTATE: | |
4078 | if (arg1 < 0) | |
4079 | return 0; | |
4080 | ||
4081 | arg1 %= width; | |
906c4e36 RK |
4082 | val = ((((unsigned HOST_WIDE_INT) arg0) << arg1) |
4083 | | (((unsigned HOST_WIDE_INT) arg0) >> (width - arg1))); | |
7afe21cc RK |
4084 | break; |
4085 | ||
4086 | case COMPARE: | |
4087 | /* Do nothing here. */ | |
4088 | return 0; | |
4089 | ||
830a38ee RS |
4090 | case SMIN: |
4091 | val = arg0s <= arg1s ? arg0s : arg1s; | |
4092 | break; | |
4093 | ||
4094 | case UMIN: | |
906c4e36 RK |
4095 | val = ((unsigned HOST_WIDE_INT) arg0 |
4096 | <= (unsigned HOST_WIDE_INT) arg1 ? arg0 : arg1); | |
830a38ee RS |
4097 | break; |
4098 | ||
4099 | case SMAX: | |
4100 | val = arg0s > arg1s ? arg0s : arg1s; | |
4101 | break; | |
4102 | ||
4103 | case UMAX: | |
906c4e36 RK |
4104 | val = ((unsigned HOST_WIDE_INT) arg0 |
4105 | > (unsigned HOST_WIDE_INT) arg1 ? arg0 : arg1); | |
830a38ee RS |
4106 | break; |
4107 | ||
7afe21cc RK |
4108 | default: |
4109 | abort (); | |
4110 | } | |
4111 | ||
4112 | /* Clear the bits that don't belong in our mode, unless they and our sign | |
4113 | bit are all one. So we get either a reasonable negative value or a | |
4114 | reasonable unsigned value for this mode. */ | |
906c4e36 RK |
4115 | if (width < HOST_BITS_PER_WIDE_INT |
4116 | && ((val & ((HOST_WIDE_INT) (-1) << (width - 1))) | |
4117 | != ((HOST_WIDE_INT) (-1) << (width - 1)))) | |
4118 | val &= ((HOST_WIDE_INT) 1 << width) - 1; | |
4119 | ||
4120 | return GEN_INT (val); | |
7afe21cc RK |
4121 | } |
4122 | \f | |
96b0e481 RK |
4123 | /* Simplify a PLUS or MINUS, at least one of whose operands may be another |
4124 | PLUS or MINUS. | |
4125 | ||
4126 | Rather than test for specific case, we do this by a brute-force method | |
4127 | and do all possible simplifications until no more changes occur. Then | |
4128 | we rebuild the operation. */ | |
4129 | ||
4130 | static rtx | |
4131 | simplify_plus_minus (code, mode, op0, op1) | |
4132 | enum rtx_code code; | |
4133 | enum machine_mode mode; | |
4134 | rtx op0, op1; | |
4135 | { | |
4136 | rtx ops[8]; | |
4137 | int negs[8]; | |
4138 | rtx result, tem; | |
fb5c8ce6 | 4139 | int n_ops = 2, input_ops = 2, input_consts = 0, n_consts = 0; |
96b0e481 | 4140 | int first = 1, negate = 0, changed; |
fb5c8ce6 | 4141 | int i, j; |
96b0e481 | 4142 | |
4c9a05bc | 4143 | bzero ((char *) ops, sizeof ops); |
96b0e481 RK |
4144 | |
4145 | /* Set up the two operands and then expand them until nothing has been | |
4146 | changed. If we run out of room in our array, give up; this should | |
4147 | almost never happen. */ | |
4148 | ||
4149 | ops[0] = op0, ops[1] = op1, negs[0] = 0, negs[1] = (code == MINUS); | |
4150 | ||
4151 | changed = 1; | |
4152 | while (changed) | |
4153 | { | |
4154 | changed = 0; | |
4155 | ||
4156 | for (i = 0; i < n_ops; i++) | |
4157 | switch (GET_CODE (ops[i])) | |
4158 | { | |
4159 | case PLUS: | |
4160 | case MINUS: | |
4161 | if (n_ops == 7) | |
4162 | return 0; | |
4163 | ||
4164 | ops[n_ops] = XEXP (ops[i], 1); | |
4165 | negs[n_ops++] = GET_CODE (ops[i]) == MINUS ? !negs[i] : negs[i]; | |
4166 | ops[i] = XEXP (ops[i], 0); | |
b7d9299b | 4167 | input_ops++; |
96b0e481 RK |
4168 | changed = 1; |
4169 | break; | |
4170 | ||
4171 | case NEG: | |
4172 | ops[i] = XEXP (ops[i], 0); | |
4173 | negs[i] = ! negs[i]; | |
4174 | changed = 1; | |
4175 | break; | |
4176 | ||
4177 | case CONST: | |
4178 | ops[i] = XEXP (ops[i], 0); | |
fb5c8ce6 | 4179 | input_consts++; |
96b0e481 RK |
4180 | changed = 1; |
4181 | break; | |
4182 | ||
4183 | case NOT: | |
4184 | /* ~a -> (-a - 1) */ | |
4185 | if (n_ops != 7) | |
4186 | { | |
4187 | ops[n_ops] = constm1_rtx; | |
5931019b | 4188 | negs[n_ops++] = negs[i]; |
96b0e481 RK |
4189 | ops[i] = XEXP (ops[i], 0); |
4190 | negs[i] = ! negs[i]; | |
4191 | changed = 1; | |
4192 | } | |
4193 | break; | |
4194 | ||
4195 | case CONST_INT: | |
4196 | if (negs[i]) | |
4197 | ops[i] = GEN_INT (- INTVAL (ops[i])), negs[i] = 0, changed = 1; | |
4198 | break; | |
4199 | } | |
4200 | } | |
4201 | ||
4202 | /* If we only have two operands, we can't do anything. */ | |
4203 | if (n_ops <= 2) | |
4204 | return 0; | |
4205 | ||
4206 | /* Now simplify each pair of operands until nothing changes. The first | |
4207 | time through just simplify constants against each other. */ | |
4208 | ||
4209 | changed = 1; | |
4210 | while (changed) | |
4211 | { | |
4212 | changed = first; | |
4213 | ||
4214 | for (i = 0; i < n_ops - 1; i++) | |
4215 | for (j = i + 1; j < n_ops; j++) | |
4216 | if (ops[i] != 0 && ops[j] != 0 | |
4217 | && (! first || (CONSTANT_P (ops[i]) && CONSTANT_P (ops[j])))) | |
4218 | { | |
4219 | rtx lhs = ops[i], rhs = ops[j]; | |
4220 | enum rtx_code ncode = PLUS; | |
4221 | ||
4222 | if (negs[i] && ! negs[j]) | |
4223 | lhs = ops[j], rhs = ops[i], ncode = MINUS; | |
4224 | else if (! negs[i] && negs[j]) | |
4225 | ncode = MINUS; | |
4226 | ||
4227 | tem = simplify_binary_operation (ncode, mode, lhs, rhs); | |
b7d9299b | 4228 | if (tem) |
96b0e481 RK |
4229 | { |
4230 | ops[i] = tem, ops[j] = 0; | |
4231 | negs[i] = negs[i] && negs[j]; | |
4232 | if (GET_CODE (tem) == NEG) | |
4233 | ops[i] = XEXP (tem, 0), negs[i] = ! negs[i]; | |
4234 | ||
4235 | if (GET_CODE (ops[i]) == CONST_INT && negs[i]) | |
4236 | ops[i] = GEN_INT (- INTVAL (ops[i])), negs[i] = 0; | |
4237 | changed = 1; | |
4238 | } | |
4239 | } | |
4240 | ||
4241 | first = 0; | |
4242 | } | |
4243 | ||
4244 | /* Pack all the operands to the lower-numbered entries and give up if | |
91a60f37 | 4245 | we didn't reduce the number of operands we had. Make sure we |
fb5c8ce6 RK |
4246 | count a CONST as two operands. If we have the same number of |
4247 | operands, but have made more CONSTs than we had, this is also | |
4248 | an improvement, so accept it. */ | |
91a60f37 | 4249 | |
fb5c8ce6 | 4250 | for (i = 0, j = 0; j < n_ops; j++) |
96b0e481 | 4251 | if (ops[j] != 0) |
91a60f37 RK |
4252 | { |
4253 | ops[i] = ops[j], negs[i++] = negs[j]; | |
4254 | if (GET_CODE (ops[j]) == CONST) | |
fb5c8ce6 | 4255 | n_consts++; |
91a60f37 | 4256 | } |
96b0e481 | 4257 | |
fb5c8ce6 RK |
4258 | if (i + n_consts > input_ops |
4259 | || (i + n_consts == input_ops && n_consts <= input_consts)) | |
96b0e481 RK |
4260 | return 0; |
4261 | ||
4262 | n_ops = i; | |
4263 | ||
4264 | /* If we have a CONST_INT, put it last. */ | |
4265 | for (i = 0; i < n_ops - 1; i++) | |
4266 | if (GET_CODE (ops[i]) == CONST_INT) | |
4267 | { | |
4268 | tem = ops[n_ops - 1], ops[n_ops - 1] = ops[i] , ops[i] = tem; | |
4269 | j = negs[n_ops - 1], negs[n_ops - 1] = negs[i], negs[i] = j; | |
4270 | } | |
4271 | ||
4272 | /* Put a non-negated operand first. If there aren't any, make all | |
4273 | operands positive and negate the whole thing later. */ | |
4274 | for (i = 0; i < n_ops && negs[i]; i++) | |
4275 | ; | |
4276 | ||
4277 | if (i == n_ops) | |
4278 | { | |
4279 | for (i = 0; i < n_ops; i++) | |
4280 | negs[i] = 0; | |
4281 | negate = 1; | |
4282 | } | |
4283 | else if (i != 0) | |
4284 | { | |
4285 | tem = ops[0], ops[0] = ops[i], ops[i] = tem; | |
4286 | j = negs[0], negs[0] = negs[i], negs[i] = j; | |
4287 | } | |
4288 | ||
4289 | /* Now make the result by performing the requested operations. */ | |
4290 | result = ops[0]; | |
4291 | for (i = 1; i < n_ops; i++) | |
4292 | result = cse_gen_binary (negs[i] ? MINUS : PLUS, mode, result, ops[i]); | |
4293 | ||
4294 | return negate ? gen_rtx (NEG, mode, result) : result; | |
4295 | } | |
4296 | \f | |
4297 | /* Make a binary operation by properly ordering the operands and | |
4298 | seeing if the expression folds. */ | |
4299 | ||
4300 | static rtx | |
4301 | cse_gen_binary (code, mode, op0, op1) | |
4302 | enum rtx_code code; | |
4303 | enum machine_mode mode; | |
4304 | rtx op0, op1; | |
4305 | { | |
4306 | rtx tem; | |
4307 | ||
4308 | /* Put complex operands first and constants second if commutative. */ | |
4309 | if (GET_RTX_CLASS (code) == 'c' | |
4310 | && ((CONSTANT_P (op0) && GET_CODE (op1) != CONST_INT) | |
4311 | || (GET_RTX_CLASS (GET_CODE (op0)) == 'o' | |
4312 | && GET_RTX_CLASS (GET_CODE (op1)) != 'o') | |
4313 | || (GET_CODE (op0) == SUBREG | |
4314 | && GET_RTX_CLASS (GET_CODE (SUBREG_REG (op0))) == 'o' | |
4315 | && GET_RTX_CLASS (GET_CODE (op1)) != 'o'))) | |
4316 | tem = op0, op0 = op1, op1 = tem; | |
4317 | ||
4318 | /* If this simplifies, do it. */ | |
4319 | tem = simplify_binary_operation (code, mode, op0, op1); | |
4320 | ||
4321 | if (tem) | |
4322 | return tem; | |
4323 | ||
4324 | /* Handle addition and subtraction of CONST_INT specially. Otherwise, | |
4325 | just form the operation. */ | |
4326 | ||
4327 | if (code == PLUS && GET_CODE (op1) == CONST_INT | |
4328 | && GET_MODE (op0) != VOIDmode) | |
4329 | return plus_constant (op0, INTVAL (op1)); | |
4330 | else if (code == MINUS && GET_CODE (op1) == CONST_INT | |
4331 | && GET_MODE (op0) != VOIDmode) | |
4332 | return plus_constant (op0, - INTVAL (op1)); | |
4333 | else | |
4334 | return gen_rtx (code, mode, op0, op1); | |
4335 | } | |
4336 | \f | |
7afe21cc | 4337 | /* Like simplify_binary_operation except used for relational operators. |
a432f20d RK |
4338 | MODE is the mode of the operands, not that of the result. If MODE |
4339 | is VOIDmode, both operands must also be VOIDmode and we compare the | |
4340 | operands in "infinite precision". | |
4341 | ||
4342 | If no simplification is possible, this function returns zero. Otherwise, | |
4343 | it returns either const_true_rtx or const0_rtx. */ | |
7afe21cc RK |
4344 | |
4345 | rtx | |
4346 | simplify_relational_operation (code, mode, op0, op1) | |
4347 | enum rtx_code code; | |
4348 | enum machine_mode mode; | |
4349 | rtx op0, op1; | |
4350 | { | |
a432f20d RK |
4351 | int equal, op0lt, op0ltu, op1lt, op1ltu; |
4352 | rtx tem; | |
7afe21cc RK |
4353 | |
4354 | /* If op0 is a compare, extract the comparison arguments from it. */ | |
4355 | if (GET_CODE (op0) == COMPARE && op1 == const0_rtx) | |
4356 | op1 = XEXP (op0, 1), op0 = XEXP (op0, 0); | |
4357 | ||
28bad1cb RK |
4358 | /* We can't simplify MODE_CC values since we don't know what the |
4359 | actual comparison is. */ | |
4360 | if (GET_MODE_CLASS (GET_MODE (op0)) == MODE_CC | |
4361 | #ifdef HAVE_cc0 | |
4362 | || op0 == cc0_rtx | |
4363 | #endif | |
4364 | ) | |
31dcf83f RS |
4365 | return 0; |
4366 | ||
a432f20d RK |
4367 | /* For integer comparisons of A and B maybe we can simplify A - B and can |
4368 | then simplify a comparison of that with zero. If A and B are both either | |
4369 | a register or a CONST_INT, this can't help; testing for these cases will | |
4370 | prevent infinite recursion here and speed things up. | |
4371 | ||
4372 | If CODE is an unsigned comparison, we can only do this if A - B is a | |
4373 | constant integer, and then we have to compare that integer with zero as a | |
4374 | signed comparison. Note that this will give the incorrect result from | |
4375 | comparisons that overflow. Since these are undefined, this is probably | |
4376 | OK. If it causes a problem, we can check for A or B being an address | |
4377 | (fp + const or SYMBOL_REF) and only do it in that case. */ | |
4378 | ||
4379 | if (INTEGRAL_MODE_P (mode) && op1 != const0_rtx | |
4380 | && ! ((GET_CODE (op0) == REG || GET_CODE (op0) == CONST_INT) | |
4381 | && (GET_CODE (op1) == REG || GET_CODE (op1) == CONST_INT)) | |
4382 | && 0 != (tem = simplify_binary_operation (MINUS, mode, op0, op1)) | |
4383 | && (GET_CODE (tem) == CONST_INT | |
4384 | || (code != GTU && code != GEU && | |
4385 | code != LTU && code != LEU))) | |
4386 | return simplify_relational_operation (signed_condition (code), | |
4387 | mode, tem, const0_rtx); | |
4388 | ||
4389 | /* For non-IEEE floating-point, if the two operands are equal, we know the | |
4390 | result. */ | |
4391 | if (rtx_equal_p (op0, op1) | |
4392 | && (TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT | |
4393 | || ! FLOAT_MODE_P (GET_MODE (op0)) || flag_fast_math)) | |
4394 | equal = 1, op0lt = 0, op0ltu = 0, op1lt = 0, op1ltu = 0; | |
4395 | ||
4396 | /* If the operands are floating-point constants, see if we can fold | |
4397 | the result. */ | |
6076248a | 4398 | #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC) |
a432f20d RK |
4399 | else if (GET_CODE (op0) == CONST_DOUBLE && GET_CODE (op1) == CONST_DOUBLE |
4400 | && GET_MODE_CLASS (GET_MODE (op0)) == MODE_FLOAT) | |
4401 | { | |
4402 | REAL_VALUE_TYPE d0, d1; | |
4403 | jmp_buf handler; | |
4404 | ||
4405 | if (setjmp (handler)) | |
4406 | return 0; | |
7afe21cc | 4407 | |
a432f20d RK |
4408 | set_float_handler (handler); |
4409 | REAL_VALUE_FROM_CONST_DOUBLE (d0, op0); | |
4410 | REAL_VALUE_FROM_CONST_DOUBLE (d1, op1); | |
4411 | equal = REAL_VALUES_EQUAL (d0, d1); | |
4412 | op0lt = op0ltu = REAL_VALUES_LESS (d0, d1); | |
4413 | op1lt = op1ltu = REAL_VALUES_LESS (d1, d0); | |
4414 | set_float_handler (NULL_PTR); | |
4415 | } | |
4416 | #endif /* not REAL_IS_NOT_DOUBLE, or REAL_ARITHMETIC */ | |
7afe21cc | 4417 | |
a432f20d RK |
4418 | /* Otherwise, see if the operands are both integers. */ |
4419 | else if ((GET_MODE_CLASS (mode) == MODE_INT || mode == VOIDmode) | |
4420 | && (GET_CODE (op0) == CONST_DOUBLE || GET_CODE (op0) == CONST_INT) | |
4421 | && (GET_CODE (op1) == CONST_DOUBLE || GET_CODE (op1) == CONST_INT)) | |
4422 | { | |
4423 | int width = GET_MODE_BITSIZE (mode); | |
64812ded RK |
4424 | HOST_WIDE_INT l0s, h0s, l1s, h1s; |
4425 | unsigned HOST_WIDE_INT l0u, h0u, l1u, h1u; | |
7afe21cc | 4426 | |
a432f20d RK |
4427 | /* Get the two words comprising each integer constant. */ |
4428 | if (GET_CODE (op0) == CONST_DOUBLE) | |
4429 | { | |
4430 | l0u = l0s = CONST_DOUBLE_LOW (op0); | |
4431 | h0u = h0s = CONST_DOUBLE_HIGH (op0); | |
7afe21cc | 4432 | } |
a432f20d | 4433 | else |
6076248a | 4434 | { |
a432f20d RK |
4435 | l0u = l0s = INTVAL (op0); |
4436 | h0u = 0, h0s = l0s < 0 ? -1 : 0; | |
4437 | } | |
6076248a | 4438 | |
a432f20d RK |
4439 | if (GET_CODE (op1) == CONST_DOUBLE) |
4440 | { | |
4441 | l1u = l1s = CONST_DOUBLE_LOW (op1); | |
4442 | h1u = h1s = CONST_DOUBLE_HIGH (op1); | |
4443 | } | |
4444 | else | |
4445 | { | |
4446 | l1u = l1s = INTVAL (op1); | |
4447 | h1u = 0, h1s = l1s < 0 ? -1 : 0; | |
4448 | } | |
4449 | ||
4450 | /* If WIDTH is nonzero and smaller than HOST_BITS_PER_WIDE_INT, | |
4451 | we have to sign or zero-extend the values. */ | |
4452 | if (width != 0 && width <= HOST_BITS_PER_WIDE_INT) | |
4453 | h0u = h1u = 0, h0s = l0s < 0 ? -1 : 0, h1s = l1s < 0 ? -1 : 0; | |
6076248a | 4454 | |
a432f20d RK |
4455 | if (width != 0 && width < HOST_BITS_PER_WIDE_INT) |
4456 | { | |
4457 | l0u &= ((HOST_WIDE_INT) 1 << width) - 1; | |
4458 | l1u &= ((HOST_WIDE_INT) 1 << width) - 1; | |
6076248a | 4459 | |
a432f20d RK |
4460 | if (l0s & ((HOST_WIDE_INT) 1 << (width - 1))) |
4461 | l0s |= ((HOST_WIDE_INT) (-1) << width); | |
6076248a | 4462 | |
a432f20d RK |
4463 | if (l1s & ((HOST_WIDE_INT) 1 << (width - 1))) |
4464 | l1s |= ((HOST_WIDE_INT) (-1) << width); | |
6076248a RK |
4465 | } |
4466 | ||
a432f20d RK |
4467 | equal = (h0u == h1u && l0u == l1u); |
4468 | op0lt = (h0s < h1s || (h0s == h1s && l0s < l1s)); | |
4469 | op1lt = (h1s < h0s || (h1s == h0s && l1s < l0s)); | |
4470 | op0ltu = (h0u < h1u || (h0u == h1u && l0u < l1u)); | |
4471 | op1ltu = (h1u < h0u || (h1u == h0u && l1u < l0u)); | |
4472 | } | |
4473 | ||
4474 | /* Otherwise, there are some code-specific tests we can make. */ | |
4475 | else | |
4476 | { | |
7afe21cc RK |
4477 | switch (code) |
4478 | { | |
4479 | case EQ: | |
a432f20d RK |
4480 | /* References to the frame plus a constant or labels cannot |
4481 | be zero, but a SYMBOL_REF can due to #pragma weak. */ | |
4482 | if (((NONZERO_BASE_PLUS_P (op0) && op1 == const0_rtx) | |
4483 | || GET_CODE (op0) == LABEL_REF) | |
1a7c818b | 4484 | #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM |
a432f20d RK |
4485 | /* On some machines, the ap reg can be 0 sometimes. */ |
4486 | && op0 != arg_pointer_rtx | |
7afe21cc | 4487 | #endif |
a432f20d RK |
4488 | ) |
4489 | return const0_rtx; | |
4490 | break; | |
7afe21cc RK |
4491 | |
4492 | case NE: | |
a432f20d RK |
4493 | if (((NONZERO_BASE_PLUS_P (op0) && op1 == const0_rtx) |
4494 | || GET_CODE (op0) == LABEL_REF) | |
1a7c818b | 4495 | #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM |
a432f20d | 4496 | && op0 != arg_pointer_rtx |
7afe21cc | 4497 | #endif |
a432f20d | 4498 | ) |
7afe21cc RK |
4499 | return const_true_rtx; |
4500 | break; | |
4501 | ||
4502 | case GEU: | |
a432f20d RK |
4503 | /* Unsigned values are never negative. */ |
4504 | if (op1 == const0_rtx) | |
7afe21cc RK |
4505 | return const_true_rtx; |
4506 | break; | |
4507 | ||
4508 | case LTU: | |
a432f20d | 4509 | if (op1 == const0_rtx) |
7afe21cc RK |
4510 | return const0_rtx; |
4511 | break; | |
4512 | ||
4513 | case LEU: | |
4514 | /* Unsigned values are never greater than the largest | |
4515 | unsigned value. */ | |
4516 | if (GET_CODE (op1) == CONST_INT | |
4517 | && INTVAL (op1) == GET_MODE_MASK (mode) | |
a432f20d RK |
4518 | && INTEGRAL_MODE_P (mode)) |
4519 | return const_true_rtx; | |
7afe21cc RK |
4520 | break; |
4521 | ||
4522 | case GTU: | |
4523 | if (GET_CODE (op1) == CONST_INT | |
4524 | && INTVAL (op1) == GET_MODE_MASK (mode) | |
cbf6a543 | 4525 | && INTEGRAL_MODE_P (mode)) |
7afe21cc RK |
4526 | return const0_rtx; |
4527 | break; | |
4528 | } | |
4529 | ||
4530 | return 0; | |
4531 | } | |
4532 | ||
a432f20d RK |
4533 | /* If we reach here, EQUAL, OP0LT, OP0LTU, OP1LT, and OP1LTU are set |
4534 | as appropriate. */ | |
7afe21cc RK |
4535 | switch (code) |
4536 | { | |
7afe21cc | 4537 | case EQ: |
a432f20d RK |
4538 | return equal ? const_true_rtx : const0_rtx; |
4539 | case NE: | |
4540 | return ! equal ? const_true_rtx : const0_rtx; | |
7afe21cc | 4541 | case LT: |
a432f20d | 4542 | return op0lt ? const_true_rtx : const0_rtx; |
7afe21cc | 4543 | case GT: |
a432f20d | 4544 | return op1lt ? const_true_rtx : const0_rtx; |
7afe21cc | 4545 | case LTU: |
a432f20d | 4546 | return op0ltu ? const_true_rtx : const0_rtx; |
7afe21cc | 4547 | case GTU: |
a432f20d RK |
4548 | return op1ltu ? const_true_rtx : const0_rtx; |
4549 | case LE: | |
4550 | return equal || op0lt ? const_true_rtx : const0_rtx; | |
4551 | case GE: | |
4552 | return equal || op1lt ? const_true_rtx : const0_rtx; | |
4553 | case LEU: | |
4554 | return equal || op0ltu ? const_true_rtx : const0_rtx; | |
4555 | case GEU: | |
4556 | return equal || op1ltu ? const_true_rtx : const0_rtx; | |
7afe21cc RK |
4557 | } |
4558 | ||
a432f20d | 4559 | abort (); |
7afe21cc RK |
4560 | } |
4561 | \f | |
4562 | /* Simplify CODE, an operation with result mode MODE and three operands, | |
4563 | OP0, OP1, and OP2. OP0_MODE was the mode of OP0 before it became | |
4564 | a constant. Return 0 if no simplifications is possible. */ | |
4565 | ||
4566 | rtx | |
4567 | simplify_ternary_operation (code, mode, op0_mode, op0, op1, op2) | |
4568 | enum rtx_code code; | |
4569 | enum machine_mode mode, op0_mode; | |
4570 | rtx op0, op1, op2; | |
4571 | { | |
4572 | int width = GET_MODE_BITSIZE (mode); | |
4573 | ||
4574 | /* VOIDmode means "infinite" precision. */ | |
4575 | if (width == 0) | |
906c4e36 | 4576 | width = HOST_BITS_PER_WIDE_INT; |
7afe21cc RK |
4577 | |
4578 | switch (code) | |
4579 | { | |
4580 | case SIGN_EXTRACT: | |
4581 | case ZERO_EXTRACT: | |
4582 | if (GET_CODE (op0) == CONST_INT | |
4583 | && GET_CODE (op1) == CONST_INT | |
4584 | && GET_CODE (op2) == CONST_INT | |
4585 | && INTVAL (op1) + INTVAL (op2) <= GET_MODE_BITSIZE (op0_mode) | |
906c4e36 | 4586 | && width <= HOST_BITS_PER_WIDE_INT) |
7afe21cc RK |
4587 | { |
4588 | /* Extracting a bit-field from a constant */ | |
906c4e36 | 4589 | HOST_WIDE_INT val = INTVAL (op0); |
7afe21cc RK |
4590 | |
4591 | #if BITS_BIG_ENDIAN | |
4592 | val >>= (GET_MODE_BITSIZE (op0_mode) - INTVAL (op2) - INTVAL (op1)); | |
4593 | #else | |
4594 | val >>= INTVAL (op2); | |
4595 | #endif | |
906c4e36 | 4596 | if (HOST_BITS_PER_WIDE_INT != INTVAL (op1)) |
7afe21cc RK |
4597 | { |
4598 | /* First zero-extend. */ | |
906c4e36 | 4599 | val &= ((HOST_WIDE_INT) 1 << INTVAL (op1)) - 1; |
7afe21cc | 4600 | /* If desired, propagate sign bit. */ |
906c4e36 RK |
4601 | if (code == SIGN_EXTRACT |
4602 | && (val & ((HOST_WIDE_INT) 1 << (INTVAL (op1) - 1)))) | |
4603 | val |= ~ (((HOST_WIDE_INT) 1 << INTVAL (op1)) - 1); | |
7afe21cc RK |
4604 | } |
4605 | ||
4606 | /* Clear the bits that don't belong in our mode, | |
4607 | unless they and our sign bit are all one. | |
4608 | So we get either a reasonable negative value or a reasonable | |
4609 | unsigned value for this mode. */ | |
906c4e36 RK |
4610 | if (width < HOST_BITS_PER_WIDE_INT |
4611 | && ((val & ((HOST_WIDE_INT) (-1) << (width - 1))) | |
4612 | != ((HOST_WIDE_INT) (-1) << (width - 1)))) | |
4613 | val &= ((HOST_WIDE_INT) 1 << width) - 1; | |
7afe21cc | 4614 | |
906c4e36 | 4615 | return GEN_INT (val); |
7afe21cc RK |
4616 | } |
4617 | break; | |
4618 | ||
4619 | case IF_THEN_ELSE: | |
4620 | if (GET_CODE (op0) == CONST_INT) | |
4621 | return op0 != const0_rtx ? op1 : op2; | |
4622 | break; | |
4623 | ||
4624 | default: | |
4625 | abort (); | |
4626 | } | |
4627 | ||
4628 | return 0; | |
4629 | } | |
4630 | \f | |
4631 | /* If X is a nontrivial arithmetic operation on an argument | |
4632 | for which a constant value can be determined, return | |
4633 | the result of operating on that value, as a constant. | |
4634 | Otherwise, return X, possibly with one or more operands | |
4635 | modified by recursive calls to this function. | |
4636 | ||
e7bb59fa RK |
4637 | If X is a register whose contents are known, we do NOT |
4638 | return those contents here. equiv_constant is called to | |
4639 | perform that task. | |
7afe21cc RK |
4640 | |
4641 | INSN is the insn that we may be modifying. If it is 0, make a copy | |
4642 | of X before modifying it. */ | |
4643 | ||
4644 | static rtx | |
4645 | fold_rtx (x, insn) | |
4646 | rtx x; | |
4647 | rtx insn; | |
4648 | { | |
4649 | register enum rtx_code code; | |
4650 | register enum machine_mode mode; | |
4651 | register char *fmt; | |
906c4e36 | 4652 | register int i; |
7afe21cc RK |
4653 | rtx new = 0; |
4654 | int copied = 0; | |
4655 | int must_swap = 0; | |
4656 | ||
4657 | /* Folded equivalents of first two operands of X. */ | |
4658 | rtx folded_arg0; | |
4659 | rtx folded_arg1; | |
4660 | ||
4661 | /* Constant equivalents of first three operands of X; | |
4662 | 0 when no such equivalent is known. */ | |
4663 | rtx const_arg0; | |
4664 | rtx const_arg1; | |
4665 | rtx const_arg2; | |
4666 | ||
4667 | /* The mode of the first operand of X. We need this for sign and zero | |
4668 | extends. */ | |
4669 | enum machine_mode mode_arg0; | |
4670 | ||
4671 | if (x == 0) | |
4672 | return x; | |
4673 | ||
4674 | mode = GET_MODE (x); | |
4675 | code = GET_CODE (x); | |
4676 | switch (code) | |
4677 | { | |
4678 | case CONST: | |
4679 | case CONST_INT: | |
4680 | case CONST_DOUBLE: | |
4681 | case SYMBOL_REF: | |
4682 | case LABEL_REF: | |
4683 | case REG: | |
4684 | /* No use simplifying an EXPR_LIST | |
4685 | since they are used only for lists of args | |
4686 | in a function call's REG_EQUAL note. */ | |
4687 | case EXPR_LIST: | |
4688 | return x; | |
4689 | ||
4690 | #ifdef HAVE_cc0 | |
4691 | case CC0: | |
4692 | return prev_insn_cc0; | |
4693 | #endif | |
4694 | ||
4695 | case PC: | |
4696 | /* If the next insn is a CODE_LABEL followed by a jump table, | |
4697 | PC's value is a LABEL_REF pointing to that label. That | |
4698 | lets us fold switch statements on the Vax. */ | |
4699 | if (insn && GET_CODE (insn) == JUMP_INSN) | |
4700 | { | |
4701 | rtx next = next_nonnote_insn (insn); | |
4702 | ||
4703 | if (next && GET_CODE (next) == CODE_LABEL | |
4704 | && NEXT_INSN (next) != 0 | |
4705 | && GET_CODE (NEXT_INSN (next)) == JUMP_INSN | |
4706 | && (GET_CODE (PATTERN (NEXT_INSN (next))) == ADDR_VEC | |
4707 | || GET_CODE (PATTERN (NEXT_INSN (next))) == ADDR_DIFF_VEC)) | |
4708 | return gen_rtx (LABEL_REF, Pmode, next); | |
4709 | } | |
4710 | break; | |
4711 | ||
4712 | case SUBREG: | |
c610adec RK |
4713 | /* See if we previously assigned a constant value to this SUBREG. */ |
4714 | if ((new = lookup_as_function (x, CONST_INT)) != 0 | |
4715 | || (new = lookup_as_function (x, CONST_DOUBLE)) != 0) | |
7afe21cc RK |
4716 | return new; |
4717 | ||
4b980e20 RK |
4718 | /* If this is a paradoxical SUBREG, we have no idea what value the |
4719 | extra bits would have. However, if the operand is equivalent | |
4720 | to a SUBREG whose operand is the same as our mode, and all the | |
4721 | modes are within a word, we can just use the inner operand | |
31c85c78 RK |
4722 | because these SUBREGs just say how to treat the register. |
4723 | ||
4724 | Similarly if we find an integer constant. */ | |
4b980e20 | 4725 | |
e5f6a288 | 4726 | if (GET_MODE_SIZE (mode) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))) |
4b980e20 RK |
4727 | { |
4728 | enum machine_mode imode = GET_MODE (SUBREG_REG (x)); | |
4729 | struct table_elt *elt; | |
4730 | ||
4731 | if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD | |
4732 | && GET_MODE_SIZE (imode) <= UNITS_PER_WORD | |
4733 | && (elt = lookup (SUBREG_REG (x), HASH (SUBREG_REG (x), imode), | |
4734 | imode)) != 0) | |
31c85c78 RK |
4735 | for (elt = elt->first_same_value; |
4736 | elt; elt = elt->next_same_value) | |
4737 | { | |
4738 | if (CONSTANT_P (elt->exp) | |
4739 | && GET_MODE (elt->exp) == VOIDmode) | |
4740 | return elt->exp; | |
4741 | ||
4b980e20 RK |
4742 | if (GET_CODE (elt->exp) == SUBREG |
4743 | && GET_MODE (SUBREG_REG (elt->exp)) == mode | |
906c4e36 | 4744 | && exp_equiv_p (elt->exp, elt->exp, 1, 0)) |
4b980e20 RK |
4745 | return copy_rtx (SUBREG_REG (elt->exp)); |
4746 | } | |
4747 | ||
4748 | return x; | |
4749 | } | |
e5f6a288 | 4750 | |
7afe21cc RK |
4751 | /* Fold SUBREG_REG. If it changed, see if we can simplify the SUBREG. |
4752 | We might be able to if the SUBREG is extracting a single word in an | |
4753 | integral mode or extracting the low part. */ | |
4754 | ||
4755 | folded_arg0 = fold_rtx (SUBREG_REG (x), insn); | |
4756 | const_arg0 = equiv_constant (folded_arg0); | |
4757 | if (const_arg0) | |
4758 | folded_arg0 = const_arg0; | |
4759 | ||
4760 | if (folded_arg0 != SUBREG_REG (x)) | |
4761 | { | |
4762 | new = 0; | |
4763 | ||
4764 | if (GET_MODE_CLASS (mode) == MODE_INT | |
4765 | && GET_MODE_SIZE (mode) == UNITS_PER_WORD | |
4766 | && GET_MODE (SUBREG_REG (x)) != VOIDmode) | |
4767 | new = operand_subword (folded_arg0, SUBREG_WORD (x), 0, | |
4768 | GET_MODE (SUBREG_REG (x))); | |
4769 | if (new == 0 && subreg_lowpart_p (x)) | |
4770 | new = gen_lowpart_if_possible (mode, folded_arg0); | |
4771 | if (new) | |
4772 | return new; | |
4773 | } | |
e5f6a288 RK |
4774 | |
4775 | /* If this is a narrowing SUBREG and our operand is a REG, see if | |
858a47b1 | 4776 | we can find an equivalence for REG that is an arithmetic operation |
e5f6a288 RK |
4777 | in a wider mode where both operands are paradoxical SUBREGs |
4778 | from objects of our result mode. In that case, we couldn't report | |
4779 | an equivalent value for that operation, since we don't know what the | |
4780 | extra bits will be. But we can find an equivalence for this SUBREG | |
4781 | by folding that operation is the narrow mode. This allows us to | |
4782 | fold arithmetic in narrow modes when the machine only supports | |
4b980e20 RK |
4783 | word-sized arithmetic. |
4784 | ||
4785 | Also look for a case where we have a SUBREG whose operand is the | |
4786 | same as our result. If both modes are smaller than a word, we | |
4787 | are simply interpreting a register in different modes and we | |
4788 | can use the inner value. */ | |
e5f6a288 RK |
4789 | |
4790 | if (GET_CODE (folded_arg0) == REG | |
e8d76a39 RS |
4791 | && GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (folded_arg0)) |
4792 | && subreg_lowpart_p (x)) | |
e5f6a288 RK |
4793 | { |
4794 | struct table_elt *elt; | |
4795 | ||
4796 | /* We can use HASH here since we know that canon_hash won't be | |
4797 | called. */ | |
4798 | elt = lookup (folded_arg0, | |
4799 | HASH (folded_arg0, GET_MODE (folded_arg0)), | |
4800 | GET_MODE (folded_arg0)); | |
4801 | ||
4802 | if (elt) | |
4803 | elt = elt->first_same_value; | |
4804 | ||
4805 | for (; elt; elt = elt->next_same_value) | |
4806 | { | |
e8d76a39 RS |
4807 | enum rtx_code eltcode = GET_CODE (elt->exp); |
4808 | ||
e5f6a288 RK |
4809 | /* Just check for unary and binary operations. */ |
4810 | if (GET_RTX_CLASS (GET_CODE (elt->exp)) == '1' | |
4811 | && GET_CODE (elt->exp) != SIGN_EXTEND | |
4812 | && GET_CODE (elt->exp) != ZERO_EXTEND | |
4813 | && GET_CODE (XEXP (elt->exp, 0)) == SUBREG | |
4814 | && GET_MODE (SUBREG_REG (XEXP (elt->exp, 0))) == mode) | |
4815 | { | |
4816 | rtx op0 = SUBREG_REG (XEXP (elt->exp, 0)); | |
4817 | ||
4818 | if (GET_CODE (op0) != REG && ! CONSTANT_P (op0)) | |
906c4e36 | 4819 | op0 = fold_rtx (op0, NULL_RTX); |
e5f6a288 RK |
4820 | |
4821 | op0 = equiv_constant (op0); | |
4822 | if (op0) | |
4823 | new = simplify_unary_operation (GET_CODE (elt->exp), mode, | |
4824 | op0, mode); | |
4825 | } | |
4826 | else if ((GET_RTX_CLASS (GET_CODE (elt->exp)) == '2' | |
4827 | || GET_RTX_CLASS (GET_CODE (elt->exp)) == 'c') | |
e8d76a39 RS |
4828 | && eltcode != DIV && eltcode != MOD |
4829 | && eltcode != UDIV && eltcode != UMOD | |
4830 | && eltcode != ASHIFTRT && eltcode != LSHIFTRT | |
4831 | && eltcode != ROTATE && eltcode != ROTATERT | |
e5f6a288 RK |
4832 | && ((GET_CODE (XEXP (elt->exp, 0)) == SUBREG |
4833 | && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 0))) | |
4834 | == mode)) | |
4835 | || CONSTANT_P (XEXP (elt->exp, 0))) | |
4836 | && ((GET_CODE (XEXP (elt->exp, 1)) == SUBREG | |
4837 | && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 1))) | |
4838 | == mode)) | |
4839 | || CONSTANT_P (XEXP (elt->exp, 1)))) | |
4840 | { | |
4841 | rtx op0 = gen_lowpart_common (mode, XEXP (elt->exp, 0)); | |
4842 | rtx op1 = gen_lowpart_common (mode, XEXP (elt->exp, 1)); | |
4843 | ||
4844 | if (op0 && GET_CODE (op0) != REG && ! CONSTANT_P (op0)) | |
906c4e36 | 4845 | op0 = fold_rtx (op0, NULL_RTX); |
e5f6a288 RK |
4846 | |
4847 | if (op0) | |
4848 | op0 = equiv_constant (op0); | |
4849 | ||
4850 | if (op1 && GET_CODE (op1) != REG && ! CONSTANT_P (op1)) | |
906c4e36 | 4851 | op1 = fold_rtx (op1, NULL_RTX); |
e5f6a288 RK |
4852 | |
4853 | if (op1) | |
4854 | op1 = equiv_constant (op1); | |
4855 | ||
76fb0b60 RS |
4856 | /* If we are looking for the low SImode part of |
4857 | (ashift:DI c (const_int 32)), it doesn't work | |
4858 | to compute that in SImode, because a 32-bit shift | |
4859 | in SImode is unpredictable. We know the value is 0. */ | |
4860 | if (op0 && op1 | |
45620ed4 | 4861 | && GET_CODE (elt->exp) == ASHIFT |
76fb0b60 RS |
4862 | && GET_CODE (op1) == CONST_INT |
4863 | && INTVAL (op1) >= GET_MODE_BITSIZE (mode)) | |
4864 | { | |
4865 | if (INTVAL (op1) < GET_MODE_BITSIZE (GET_MODE (elt->exp))) | |
4866 | ||
4867 | /* If the count fits in the inner mode's width, | |
4868 | but exceeds the outer mode's width, | |
4869 | the value will get truncated to 0 | |
4870 | by the subreg. */ | |
4871 | new = const0_rtx; | |
4872 | else | |
4873 | /* If the count exceeds even the inner mode's width, | |
4874 | don't fold this expression. */ | |
4875 | new = 0; | |
4876 | } | |
4877 | else if (op0 && op1) | |
e5f6a288 RK |
4878 | new = simplify_binary_operation (GET_CODE (elt->exp), mode, |
4879 | op0, op1); | |
4880 | } | |
4881 | ||
4b980e20 RK |
4882 | else if (GET_CODE (elt->exp) == SUBREG |
4883 | && GET_MODE (SUBREG_REG (elt->exp)) == mode | |
4884 | && (GET_MODE_SIZE (GET_MODE (folded_arg0)) | |
4885 | <= UNITS_PER_WORD) | |
906c4e36 | 4886 | && exp_equiv_p (elt->exp, elt->exp, 1, 0)) |
4b980e20 RK |
4887 | new = copy_rtx (SUBREG_REG (elt->exp)); |
4888 | ||
e5f6a288 RK |
4889 | if (new) |
4890 | return new; | |
4891 | } | |
4892 | } | |
4893 | ||
7afe21cc RK |
4894 | return x; |
4895 | ||
4896 | case NOT: | |
4897 | case NEG: | |
4898 | /* If we have (NOT Y), see if Y is known to be (NOT Z). | |
4899 | If so, (NOT Y) simplifies to Z. Similarly for NEG. */ | |
4900 | new = lookup_as_function (XEXP (x, 0), code); | |
4901 | if (new) | |
4902 | return fold_rtx (copy_rtx (XEXP (new, 0)), insn); | |
4903 | break; | |
13c9910f | 4904 | |
7afe21cc RK |
4905 | case MEM: |
4906 | /* If we are not actually processing an insn, don't try to find the | |
4907 | best address. Not only don't we care, but we could modify the | |
4908 | MEM in an invalid way since we have no insn to validate against. */ | |
4909 | if (insn != 0) | |
4910 | find_best_addr (insn, &XEXP (x, 0)); | |
4911 | ||
4912 | { | |
4913 | /* Even if we don't fold in the insn itself, | |
4914 | we can safely do so here, in hopes of getting a constant. */ | |
906c4e36 | 4915 | rtx addr = fold_rtx (XEXP (x, 0), NULL_RTX); |
7afe21cc | 4916 | rtx base = 0; |
906c4e36 | 4917 | HOST_WIDE_INT offset = 0; |
7afe21cc RK |
4918 | |
4919 | if (GET_CODE (addr) == REG | |
4920 | && REGNO_QTY_VALID_P (REGNO (addr)) | |
4921 | && GET_MODE (addr) == qty_mode[reg_qty[REGNO (addr)]] | |
4922 | && qty_const[reg_qty[REGNO (addr)]] != 0) | |
4923 | addr = qty_const[reg_qty[REGNO (addr)]]; | |
4924 | ||
4925 | /* If address is constant, split it into a base and integer offset. */ | |
4926 | if (GET_CODE (addr) == SYMBOL_REF || GET_CODE (addr) == LABEL_REF) | |
4927 | base = addr; | |
4928 | else if (GET_CODE (addr) == CONST && GET_CODE (XEXP (addr, 0)) == PLUS | |
4929 | && GET_CODE (XEXP (XEXP (addr, 0), 1)) == CONST_INT) | |
4930 | { | |
4931 | base = XEXP (XEXP (addr, 0), 0); | |
4932 | offset = INTVAL (XEXP (XEXP (addr, 0), 1)); | |
4933 | } | |
4934 | else if (GET_CODE (addr) == LO_SUM | |
4935 | && GET_CODE (XEXP (addr, 1)) == SYMBOL_REF) | |
4936 | base = XEXP (addr, 1); | |
4937 | ||
4938 | /* If this is a constant pool reference, we can fold it into its | |
4939 | constant to allow better value tracking. */ | |
4940 | if (base && GET_CODE (base) == SYMBOL_REF | |
4941 | && CONSTANT_POOL_ADDRESS_P (base)) | |
4942 | { | |
4943 | rtx constant = get_pool_constant (base); | |
4944 | enum machine_mode const_mode = get_pool_mode (base); | |
4945 | rtx new; | |
4946 | ||
4947 | if (CONSTANT_P (constant) && GET_CODE (constant) != CONST_INT) | |
4948 | constant_pool_entries_cost = COST (constant); | |
4949 | ||
4950 | /* If we are loading the full constant, we have an equivalence. */ | |
4951 | if (offset == 0 && mode == const_mode) | |
4952 | return constant; | |
4953 | ||
4954 | /* If this actually isn't a constant (wierd!), we can't do | |
4955 | anything. Otherwise, handle the two most common cases: | |
4956 | extracting a word from a multi-word constant, and extracting | |
4957 | the low-order bits. Other cases don't seem common enough to | |
4958 | worry about. */ | |
4959 | if (! CONSTANT_P (constant)) | |
4960 | return x; | |
4961 | ||
4962 | if (GET_MODE_CLASS (mode) == MODE_INT | |
4963 | && GET_MODE_SIZE (mode) == UNITS_PER_WORD | |
4964 | && offset % UNITS_PER_WORD == 0 | |
4965 | && (new = operand_subword (constant, | |
4966 | offset / UNITS_PER_WORD, | |
4967 | 0, const_mode)) != 0) | |
4968 | return new; | |
4969 | ||
4970 | if (((BYTES_BIG_ENDIAN | |
4971 | && offset == GET_MODE_SIZE (GET_MODE (constant)) - 1) | |
4972 | || (! BYTES_BIG_ENDIAN && offset == 0)) | |
4973 | && (new = gen_lowpart_if_possible (mode, constant)) != 0) | |
4974 | return new; | |
4975 | } | |
4976 | ||
4977 | /* If this is a reference to a label at a known position in a jump | |
4978 | table, we also know its value. */ | |
4979 | if (base && GET_CODE (base) == LABEL_REF) | |
4980 | { | |
4981 | rtx label = XEXP (base, 0); | |
4982 | rtx table_insn = NEXT_INSN (label); | |
4983 | ||
4984 | if (table_insn && GET_CODE (table_insn) == JUMP_INSN | |
4985 | && GET_CODE (PATTERN (table_insn)) == ADDR_VEC) | |
4986 | { | |
4987 | rtx table = PATTERN (table_insn); | |
4988 | ||
4989 | if (offset >= 0 | |
4990 | && (offset / GET_MODE_SIZE (GET_MODE (table)) | |
4991 | < XVECLEN (table, 0))) | |
4992 | return XVECEXP (table, 0, | |
4993 | offset / GET_MODE_SIZE (GET_MODE (table))); | |
4994 | } | |
4995 | if (table_insn && GET_CODE (table_insn) == JUMP_INSN | |
4996 | && GET_CODE (PATTERN (table_insn)) == ADDR_DIFF_VEC) | |
4997 | { | |
4998 | rtx table = PATTERN (table_insn); | |
4999 | ||
5000 | if (offset >= 0 | |
5001 | && (offset / GET_MODE_SIZE (GET_MODE (table)) | |
5002 | < XVECLEN (table, 1))) | |
5003 | { | |
5004 | offset /= GET_MODE_SIZE (GET_MODE (table)); | |
5005 | new = gen_rtx (MINUS, Pmode, XVECEXP (table, 1, offset), | |
5006 | XEXP (table, 0)); | |
5007 | ||
5008 | if (GET_MODE (table) != Pmode) | |
5009 | new = gen_rtx (TRUNCATE, GET_MODE (table), new); | |
5010 | ||
67a37737 RK |
5011 | /* Indicate this is a constant. This isn't a |
5012 | valid form of CONST, but it will only be used | |
5013 | to fold the next insns and then discarded, so | |
5014 | it should be safe. */ | |
5015 | return gen_rtx (CONST, GET_MODE (new), new); | |
7afe21cc RK |
5016 | } |
5017 | } | |
5018 | } | |
5019 | ||
5020 | return x; | |
5021 | } | |
5022 | } | |
5023 | ||
5024 | const_arg0 = 0; | |
5025 | const_arg1 = 0; | |
5026 | const_arg2 = 0; | |
5027 | mode_arg0 = VOIDmode; | |
5028 | ||
5029 | /* Try folding our operands. | |
5030 | Then see which ones have constant values known. */ | |
5031 | ||
5032 | fmt = GET_RTX_FORMAT (code); | |
5033 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
5034 | if (fmt[i] == 'e') | |
5035 | { | |
5036 | rtx arg = XEXP (x, i); | |
5037 | rtx folded_arg = arg, const_arg = 0; | |
5038 | enum machine_mode mode_arg = GET_MODE (arg); | |
5039 | rtx cheap_arg, expensive_arg; | |
5040 | rtx replacements[2]; | |
5041 | int j; | |
5042 | ||
5043 | /* Most arguments are cheap, so handle them specially. */ | |
5044 | switch (GET_CODE (arg)) | |
5045 | { | |
5046 | case REG: | |
5047 | /* This is the same as calling equiv_constant; it is duplicated | |
5048 | here for speed. */ | |
5049 | if (REGNO_QTY_VALID_P (REGNO (arg)) | |
5050 | && qty_const[reg_qty[REGNO (arg)]] != 0 | |
5051 | && GET_CODE (qty_const[reg_qty[REGNO (arg)]]) != REG | |
5052 | && GET_CODE (qty_const[reg_qty[REGNO (arg)]]) != PLUS) | |
5053 | const_arg | |
5054 | = gen_lowpart_if_possible (GET_MODE (arg), | |
5055 | qty_const[reg_qty[REGNO (arg)]]); | |
5056 | break; | |
5057 | ||
5058 | case CONST: | |
5059 | case CONST_INT: | |
5060 | case SYMBOL_REF: | |
5061 | case LABEL_REF: | |
5062 | case CONST_DOUBLE: | |
5063 | const_arg = arg; | |
5064 | break; | |
5065 | ||
5066 | #ifdef HAVE_cc0 | |
5067 | case CC0: | |
5068 | folded_arg = prev_insn_cc0; | |
5069 | mode_arg = prev_insn_cc0_mode; | |
5070 | const_arg = equiv_constant (folded_arg); | |
5071 | break; | |
5072 | #endif | |
5073 | ||
5074 | default: | |
5075 | folded_arg = fold_rtx (arg, insn); | |
5076 | const_arg = equiv_constant (folded_arg); | |
5077 | } | |
5078 | ||
5079 | /* For the first three operands, see if the operand | |
5080 | is constant or equivalent to a constant. */ | |
5081 | switch (i) | |
5082 | { | |
5083 | case 0: | |
5084 | folded_arg0 = folded_arg; | |
5085 | const_arg0 = const_arg; | |
5086 | mode_arg0 = mode_arg; | |
5087 | break; | |
5088 | case 1: | |
5089 | folded_arg1 = folded_arg; | |
5090 | const_arg1 = const_arg; | |
5091 | break; | |
5092 | case 2: | |
5093 | const_arg2 = const_arg; | |
5094 | break; | |
5095 | } | |
5096 | ||
5097 | /* Pick the least expensive of the folded argument and an | |
5098 | equivalent constant argument. */ | |
5099 | if (const_arg == 0 || const_arg == folded_arg | |
5100 | || COST (const_arg) > COST (folded_arg)) | |
5101 | cheap_arg = folded_arg, expensive_arg = const_arg; | |
5102 | else | |
5103 | cheap_arg = const_arg, expensive_arg = folded_arg; | |
5104 | ||
5105 | /* Try to replace the operand with the cheapest of the two | |
5106 | possibilities. If it doesn't work and this is either of the first | |
5107 | two operands of a commutative operation, try swapping them. | |
5108 | If THAT fails, try the more expensive, provided it is cheaper | |
5109 | than what is already there. */ | |
5110 | ||
5111 | if (cheap_arg == XEXP (x, i)) | |
5112 | continue; | |
5113 | ||
5114 | if (insn == 0 && ! copied) | |
5115 | { | |
5116 | x = copy_rtx (x); | |
5117 | copied = 1; | |
5118 | } | |
5119 | ||
5120 | replacements[0] = cheap_arg, replacements[1] = expensive_arg; | |
5121 | for (j = 0; | |
5122 | j < 2 && replacements[j] | |
5123 | && COST (replacements[j]) < COST (XEXP (x, i)); | |
5124 | j++) | |
5125 | { | |
5126 | if (validate_change (insn, &XEXP (x, i), replacements[j], 0)) | |
5127 | break; | |
5128 | ||
5129 | if (code == NE || code == EQ || GET_RTX_CLASS (code) == 'c') | |
5130 | { | |
5131 | validate_change (insn, &XEXP (x, i), XEXP (x, 1 - i), 1); | |
5132 | validate_change (insn, &XEXP (x, 1 - i), replacements[j], 1); | |
5133 | ||
5134 | if (apply_change_group ()) | |
5135 | { | |
5136 | /* Swap them back to be invalid so that this loop can | |
5137 | continue and flag them to be swapped back later. */ | |
5138 | rtx tem; | |
5139 | ||
5140 | tem = XEXP (x, 0); XEXP (x, 0) = XEXP (x, 1); | |
5141 | XEXP (x, 1) = tem; | |
5142 | must_swap = 1; | |
5143 | break; | |
5144 | } | |
5145 | } | |
5146 | } | |
5147 | } | |
5148 | ||
5149 | else if (fmt[i] == 'E') | |
5150 | /* Don't try to fold inside of a vector of expressions. | |
5151 | Doing nothing is harmless. */ | |
5152 | ; | |
5153 | ||
5154 | /* If a commutative operation, place a constant integer as the second | |
5155 | operand unless the first operand is also a constant integer. Otherwise, | |
5156 | place any constant second unless the first operand is also a constant. */ | |
5157 | ||
5158 | if (code == EQ || code == NE || GET_RTX_CLASS (code) == 'c') | |
5159 | { | |
5160 | if (must_swap || (const_arg0 | |
5161 | && (const_arg1 == 0 | |
5162 | || (GET_CODE (const_arg0) == CONST_INT | |
5163 | && GET_CODE (const_arg1) != CONST_INT)))) | |
5164 | { | |
5165 | register rtx tem = XEXP (x, 0); | |
5166 | ||
5167 | if (insn == 0 && ! copied) | |
5168 | { | |
5169 | x = copy_rtx (x); | |
5170 | copied = 1; | |
5171 | } | |
5172 | ||
5173 | validate_change (insn, &XEXP (x, 0), XEXP (x, 1), 1); | |
5174 | validate_change (insn, &XEXP (x, 1), tem, 1); | |
5175 | if (apply_change_group ()) | |
5176 | { | |
5177 | tem = const_arg0, const_arg0 = const_arg1, const_arg1 = tem; | |
5178 | tem = folded_arg0, folded_arg0 = folded_arg1, folded_arg1 = tem; | |
5179 | } | |
5180 | } | |
5181 | } | |
5182 | ||
5183 | /* If X is an arithmetic operation, see if we can simplify it. */ | |
5184 | ||
5185 | switch (GET_RTX_CLASS (code)) | |
5186 | { | |
5187 | case '1': | |
67a37737 RK |
5188 | { |
5189 | int is_const = 0; | |
5190 | ||
5191 | /* We can't simplify extension ops unless we know the | |
5192 | original mode. */ | |
5193 | if ((code == ZERO_EXTEND || code == SIGN_EXTEND) | |
5194 | && mode_arg0 == VOIDmode) | |
5195 | break; | |
5196 | ||
5197 | /* If we had a CONST, strip it off and put it back later if we | |
5198 | fold. */ | |
5199 | if (const_arg0 != 0 && GET_CODE (const_arg0) == CONST) | |
5200 | is_const = 1, const_arg0 = XEXP (const_arg0, 0); | |
5201 | ||
5202 | new = simplify_unary_operation (code, mode, | |
5203 | const_arg0 ? const_arg0 : folded_arg0, | |
5204 | mode_arg0); | |
5205 | if (new != 0 && is_const) | |
5206 | new = gen_rtx (CONST, mode, new); | |
5207 | } | |
7afe21cc RK |
5208 | break; |
5209 | ||
5210 | case '<': | |
5211 | /* See what items are actually being compared and set FOLDED_ARG[01] | |
5212 | to those values and CODE to the actual comparison code. If any are | |
5213 | constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't | |
5214 | do anything if both operands are already known to be constant. */ | |
5215 | ||
5216 | if (const_arg0 == 0 || const_arg1 == 0) | |
5217 | { | |
5218 | struct table_elt *p0, *p1; | |
c610adec | 5219 | rtx true = const_true_rtx, false = const0_rtx; |
13c9910f | 5220 | enum machine_mode mode_arg1; |
c610adec RK |
5221 | |
5222 | #ifdef FLOAT_STORE_FLAG_VALUE | |
c7c955ee | 5223 | if (GET_MODE_CLASS (mode) == MODE_FLOAT) |
c610adec | 5224 | { |
560c94a2 RK |
5225 | true = CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE, |
5226 | mode); | |
c610adec RK |
5227 | false = CONST0_RTX (mode); |
5228 | } | |
5229 | #endif | |
7afe21cc | 5230 | |
13c9910f RS |
5231 | code = find_comparison_args (code, &folded_arg0, &folded_arg1, |
5232 | &mode_arg0, &mode_arg1); | |
7afe21cc RK |
5233 | const_arg0 = equiv_constant (folded_arg0); |
5234 | const_arg1 = equiv_constant (folded_arg1); | |
5235 | ||
13c9910f RS |
5236 | /* If the mode is VOIDmode or a MODE_CC mode, we don't know |
5237 | what kinds of things are being compared, so we can't do | |
5238 | anything with this comparison. */ | |
7afe21cc RK |
5239 | |
5240 | if (mode_arg0 == VOIDmode || GET_MODE_CLASS (mode_arg0) == MODE_CC) | |
5241 | break; | |
5242 | ||
5243 | /* If we do not now have two constants being compared, see if we | |
5244 | can nevertheless deduce some things about the comparison. */ | |
5245 | if (const_arg0 == 0 || const_arg1 == 0) | |
5246 | { | |
5247 | /* Is FOLDED_ARG0 frame-pointer plus a constant? Or non-explicit | |
5248 | constant? These aren't zero, but we don't know their sign. */ | |
5249 | if (const_arg1 == const0_rtx | |
5250 | && (NONZERO_BASE_PLUS_P (folded_arg0) | |
5251 | #if 0 /* Sad to say, on sysvr4, #pragma weak can make a symbol address | |
5252 | come out as 0. */ | |
5253 | || GET_CODE (folded_arg0) == SYMBOL_REF | |
5254 | #endif | |
5255 | || GET_CODE (folded_arg0) == LABEL_REF | |
5256 | || GET_CODE (folded_arg0) == CONST)) | |
5257 | { | |
5258 | if (code == EQ) | |
c610adec | 5259 | return false; |
7afe21cc | 5260 | else if (code == NE) |
c610adec | 5261 | return true; |
7afe21cc RK |
5262 | } |
5263 | ||
5264 | /* See if the two operands are the same. We don't do this | |
5265 | for IEEE floating-point since we can't assume x == x | |
5266 | since x might be a NaN. */ | |
5267 | ||
5268 | if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT | |
a83afb65 | 5269 | || ! FLOAT_MODE_P (mode_arg0) || flag_fast_math) |
7afe21cc RK |
5270 | && (folded_arg0 == folded_arg1 |
5271 | || (GET_CODE (folded_arg0) == REG | |
5272 | && GET_CODE (folded_arg1) == REG | |
5273 | && (reg_qty[REGNO (folded_arg0)] | |
5274 | == reg_qty[REGNO (folded_arg1)])) | |
5275 | || ((p0 = lookup (folded_arg0, | |
5276 | (safe_hash (folded_arg0, mode_arg0) | |
5277 | % NBUCKETS), mode_arg0)) | |
5278 | && (p1 = lookup (folded_arg1, | |
5279 | (safe_hash (folded_arg1, mode_arg0) | |
5280 | % NBUCKETS), mode_arg0)) | |
5281 | && p0->first_same_value == p1->first_same_value))) | |
5282 | return ((code == EQ || code == LE || code == GE | |
5283 | || code == LEU || code == GEU) | |
c610adec | 5284 | ? true : false); |
7afe21cc RK |
5285 | |
5286 | /* If FOLDED_ARG0 is a register, see if the comparison we are | |
5287 | doing now is either the same as we did before or the reverse | |
5288 | (we only check the reverse if not floating-point). */ | |
5289 | else if (GET_CODE (folded_arg0) == REG) | |
5290 | { | |
5291 | int qty = reg_qty[REGNO (folded_arg0)]; | |
5292 | ||
5293 | if (REGNO_QTY_VALID_P (REGNO (folded_arg0)) | |
5294 | && (comparison_dominates_p (qty_comparison_code[qty], code) | |
5295 | || (comparison_dominates_p (qty_comparison_code[qty], | |
5296 | reverse_condition (code)) | |
cbf6a543 | 5297 | && ! FLOAT_MODE_P (mode_arg0))) |
7afe21cc RK |
5298 | && (rtx_equal_p (qty_comparison_const[qty], folded_arg1) |
5299 | || (const_arg1 | |
5300 | && rtx_equal_p (qty_comparison_const[qty], | |
5301 | const_arg1)) | |
5302 | || (GET_CODE (folded_arg1) == REG | |
5303 | && (reg_qty[REGNO (folded_arg1)] | |
5304 | == qty_comparison_qty[qty])))) | |
5305 | return (comparison_dominates_p (qty_comparison_code[qty], | |
5306 | code) | |
c610adec | 5307 | ? true : false); |
7afe21cc RK |
5308 | } |
5309 | } | |
5310 | } | |
5311 | ||
5312 | /* If we are comparing against zero, see if the first operand is | |
5313 | equivalent to an IOR with a constant. If so, we may be able to | |
5314 | determine the result of this comparison. */ | |
5315 | ||
5316 | if (const_arg1 == const0_rtx) | |
5317 | { | |
5318 | rtx y = lookup_as_function (folded_arg0, IOR); | |
5319 | rtx inner_const; | |
5320 | ||
5321 | if (y != 0 | |
5322 | && (inner_const = equiv_constant (XEXP (y, 1))) != 0 | |
5323 | && GET_CODE (inner_const) == CONST_INT | |
5324 | && INTVAL (inner_const) != 0) | |
5325 | { | |
5326 | int sign_bitnum = GET_MODE_BITSIZE (mode_arg0) - 1; | |
906c4e36 RK |
5327 | int has_sign = (HOST_BITS_PER_WIDE_INT >= sign_bitnum |
5328 | && (INTVAL (inner_const) | |
5329 | & ((HOST_WIDE_INT) 1 << sign_bitnum))); | |
c610adec RK |
5330 | rtx true = const_true_rtx, false = const0_rtx; |
5331 | ||
5332 | #ifdef FLOAT_STORE_FLAG_VALUE | |
c7c955ee | 5333 | if (GET_MODE_CLASS (mode) == MODE_FLOAT) |
c610adec | 5334 | { |
560c94a2 RK |
5335 | true = CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE, |
5336 | mode); | |
c610adec RK |
5337 | false = CONST0_RTX (mode); |
5338 | } | |
5339 | #endif | |
7afe21cc RK |
5340 | |
5341 | switch (code) | |
5342 | { | |
5343 | case EQ: | |
c610adec | 5344 | return false; |
7afe21cc | 5345 | case NE: |
c610adec | 5346 | return true; |
7afe21cc RK |
5347 | case LT: case LE: |
5348 | if (has_sign) | |
c610adec | 5349 | return true; |
7afe21cc RK |
5350 | break; |
5351 | case GT: case GE: | |
5352 | if (has_sign) | |
c610adec | 5353 | return false; |
7afe21cc RK |
5354 | break; |
5355 | } | |
5356 | } | |
5357 | } | |
5358 | ||
5359 | new = simplify_relational_operation (code, mode_arg0, | |
5360 | const_arg0 ? const_arg0 : folded_arg0, | |
5361 | const_arg1 ? const_arg1 : folded_arg1); | |
c610adec RK |
5362 | #ifdef FLOAT_STORE_FLAG_VALUE |
5363 | if (new != 0 && GET_MODE_CLASS (mode) == MODE_FLOAT) | |
5364 | new = ((new == const0_rtx) ? CONST0_RTX (mode) | |
560c94a2 | 5365 | : CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE, mode)); |
c610adec | 5366 | #endif |
7afe21cc RK |
5367 | break; |
5368 | ||
5369 | case '2': | |
5370 | case 'c': | |
5371 | switch (code) | |
5372 | { | |
5373 | case PLUS: | |
5374 | /* If the second operand is a LABEL_REF, see if the first is a MINUS | |
5375 | with that LABEL_REF as its second operand. If so, the result is | |
5376 | the first operand of that MINUS. This handles switches with an | |
5377 | ADDR_DIFF_VEC table. */ | |
5378 | if (const_arg1 && GET_CODE (const_arg1) == LABEL_REF) | |
5379 | { | |
e650cbda RK |
5380 | rtx y |
5381 | = GET_CODE (folded_arg0) == MINUS ? folded_arg0 | |
5382 | : lookup_as_function (folded_arg0, MINUS); | |
7afe21cc RK |
5383 | |
5384 | if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF | |
5385 | && XEXP (XEXP (y, 1), 0) == XEXP (const_arg1, 0)) | |
5386 | return XEXP (y, 0); | |
67a37737 RK |
5387 | |
5388 | /* Now try for a CONST of a MINUS like the above. */ | |
e650cbda RK |
5389 | if ((y = (GET_CODE (folded_arg0) == CONST ? folded_arg0 |
5390 | : lookup_as_function (folded_arg0, CONST))) != 0 | |
67a37737 RK |
5391 | && GET_CODE (XEXP (y, 0)) == MINUS |
5392 | && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF | |
5393 | && XEXP (XEXP (XEXP (y, 0),1), 0) == XEXP (const_arg1, 0)) | |
5394 | return XEXP (XEXP (y, 0), 0); | |
7afe21cc | 5395 | } |
c2cc0778 | 5396 | |
e650cbda RK |
5397 | /* Likewise if the operands are in the other order. */ |
5398 | if (const_arg0 && GET_CODE (const_arg0) == LABEL_REF) | |
5399 | { | |
5400 | rtx y | |
5401 | = GET_CODE (folded_arg1) == MINUS ? folded_arg1 | |
5402 | : lookup_as_function (folded_arg1, MINUS); | |
5403 | ||
5404 | if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF | |
5405 | && XEXP (XEXP (y, 1), 0) == XEXP (const_arg0, 0)) | |
5406 | return XEXP (y, 0); | |
5407 | ||
5408 | /* Now try for a CONST of a MINUS like the above. */ | |
5409 | if ((y = (GET_CODE (folded_arg1) == CONST ? folded_arg1 | |
5410 | : lookup_as_function (folded_arg1, CONST))) != 0 | |
5411 | && GET_CODE (XEXP (y, 0)) == MINUS | |
5412 | && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF | |
5413 | && XEXP (XEXP (XEXP (y, 0),1), 0) == XEXP (const_arg0, 0)) | |
5414 | return XEXP (XEXP (y, 0), 0); | |
5415 | } | |
5416 | ||
c2cc0778 RK |
5417 | /* If second operand is a register equivalent to a negative |
5418 | CONST_INT, see if we can find a register equivalent to the | |
5419 | positive constant. Make a MINUS if so. Don't do this for | |
5420 | a negative constant since we might then alternate between | |
5421 | chosing positive and negative constants. Having the positive | |
5422 | constant previously-used is the more common case. */ | |
5423 | if (const_arg1 && GET_CODE (const_arg1) == CONST_INT | |
5424 | && INTVAL (const_arg1) < 0 && GET_CODE (folded_arg1) == REG) | |
5425 | { | |
5426 | rtx new_const = GEN_INT (- INTVAL (const_arg1)); | |
5427 | struct table_elt *p | |
5428 | = lookup (new_const, safe_hash (new_const, mode) % NBUCKETS, | |
5429 | mode); | |
5430 | ||
5431 | if (p) | |
5432 | for (p = p->first_same_value; p; p = p->next_same_value) | |
5433 | if (GET_CODE (p->exp) == REG) | |
5434 | return cse_gen_binary (MINUS, mode, folded_arg0, | |
5435 | canon_reg (p->exp, NULL_RTX)); | |
5436 | } | |
13c9910f RS |
5437 | goto from_plus; |
5438 | ||
5439 | case MINUS: | |
5440 | /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2). | |
5441 | If so, produce (PLUS Z C2-C). */ | |
5442 | if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT) | |
5443 | { | |
5444 | rtx y = lookup_as_function (XEXP (x, 0), PLUS); | |
5445 | if (y && GET_CODE (XEXP (y, 1)) == CONST_INT) | |
f3becefd RK |
5446 | return fold_rtx (plus_constant (copy_rtx (y), |
5447 | -INTVAL (const_arg1)), | |
a3b5c94a | 5448 | NULL_RTX); |
13c9910f | 5449 | } |
7afe21cc RK |
5450 | |
5451 | /* ... fall through ... */ | |
5452 | ||
13c9910f | 5453 | from_plus: |
7afe21cc RK |
5454 | case SMIN: case SMAX: case UMIN: case UMAX: |
5455 | case IOR: case AND: case XOR: | |
5456 | case MULT: case DIV: case UDIV: | |
5457 | case ASHIFT: case LSHIFTRT: case ASHIFTRT: | |
5458 | /* If we have (<op> <reg> <const_int>) for an associative OP and REG | |
5459 | is known to be of similar form, we may be able to replace the | |
5460 | operation with a combined operation. This may eliminate the | |
5461 | intermediate operation if every use is simplified in this way. | |
5462 | Note that the similar optimization done by combine.c only works | |
5463 | if the intermediate operation's result has only one reference. */ | |
5464 | ||
5465 | if (GET_CODE (folded_arg0) == REG | |
5466 | && const_arg1 && GET_CODE (const_arg1) == CONST_INT) | |
5467 | { | |
5468 | int is_shift | |
5469 | = (code == ASHIFT || code == ASHIFTRT || code == LSHIFTRT); | |
5470 | rtx y = lookup_as_function (folded_arg0, code); | |
5471 | rtx inner_const; | |
5472 | enum rtx_code associate_code; | |
5473 | rtx new_const; | |
5474 | ||
5475 | if (y == 0 | |
5476 | || 0 == (inner_const | |
5477 | = equiv_constant (fold_rtx (XEXP (y, 1), 0))) | |
5478 | || GET_CODE (inner_const) != CONST_INT | |
5479 | /* If we have compiled a statement like | |
5480 | "if (x == (x & mask1))", and now are looking at | |
5481 | "x & mask2", we will have a case where the first operand | |
5482 | of Y is the same as our first operand. Unless we detect | |
5483 | this case, an infinite loop will result. */ | |
5484 | || XEXP (y, 0) == folded_arg0) | |
5485 | break; | |
5486 | ||
5487 | /* Don't associate these operations if they are a PLUS with the | |
5488 | same constant and it is a power of two. These might be doable | |
5489 | with a pre- or post-increment. Similarly for two subtracts of | |
5490 | identical powers of two with post decrement. */ | |
5491 | ||
5492 | if (code == PLUS && INTVAL (const_arg1) == INTVAL (inner_const) | |
5493 | && (0 | |
5494 | #if defined(HAVE_PRE_INCREMENT) || defined(HAVE_POST_INCREMENT) | |
5495 | || exact_log2 (INTVAL (const_arg1)) >= 0 | |
5496 | #endif | |
5497 | #if defined(HAVE_PRE_DECREMENT) || defined(HAVE_POST_DECREMENT) | |
5498 | || exact_log2 (- INTVAL (const_arg1)) >= 0 | |
5499 | #endif | |
5500 | )) | |
5501 | break; | |
5502 | ||
5503 | /* Compute the code used to compose the constants. For example, | |
5504 | A/C1/C2 is A/(C1 * C2), so if CODE == DIV, we want MULT. */ | |
5505 | ||
5506 | associate_code | |
5507 | = (code == MULT || code == DIV || code == UDIV ? MULT | |
5508 | : is_shift || code == PLUS || code == MINUS ? PLUS : code); | |
5509 | ||
5510 | new_const = simplify_binary_operation (associate_code, mode, | |
5511 | const_arg1, inner_const); | |
5512 | ||
5513 | if (new_const == 0) | |
5514 | break; | |
5515 | ||
5516 | /* If we are associating shift operations, don't let this | |
4908e508 RS |
5517 | produce a shift of the size of the object or larger. |
5518 | This could occur when we follow a sign-extend by a right | |
5519 | shift on a machine that does a sign-extend as a pair | |
5520 | of shifts. */ | |
7afe21cc RK |
5521 | |
5522 | if (is_shift && GET_CODE (new_const) == CONST_INT | |
4908e508 RS |
5523 | && INTVAL (new_const) >= GET_MODE_BITSIZE (mode)) |
5524 | { | |
5525 | /* As an exception, we can turn an ASHIFTRT of this | |
5526 | form into a shift of the number of bits - 1. */ | |
5527 | if (code == ASHIFTRT) | |
5528 | new_const = GEN_INT (GET_MODE_BITSIZE (mode) - 1); | |
5529 | else | |
5530 | break; | |
5531 | } | |
7afe21cc RK |
5532 | |
5533 | y = copy_rtx (XEXP (y, 0)); | |
5534 | ||
5535 | /* If Y contains our first operand (the most common way this | |
5536 | can happen is if Y is a MEM), we would do into an infinite | |
5537 | loop if we tried to fold it. So don't in that case. */ | |
5538 | ||
5539 | if (! reg_mentioned_p (folded_arg0, y)) | |
5540 | y = fold_rtx (y, insn); | |
5541 | ||
96b0e481 | 5542 | return cse_gen_binary (code, mode, y, new_const); |
7afe21cc RK |
5543 | } |
5544 | } | |
5545 | ||
5546 | new = simplify_binary_operation (code, mode, | |
5547 | const_arg0 ? const_arg0 : folded_arg0, | |
5548 | const_arg1 ? const_arg1 : folded_arg1); | |
5549 | break; | |
5550 | ||
5551 | case 'o': | |
5552 | /* (lo_sum (high X) X) is simply X. */ | |
5553 | if (code == LO_SUM && const_arg0 != 0 | |
5554 | && GET_CODE (const_arg0) == HIGH | |
5555 | && rtx_equal_p (XEXP (const_arg0, 0), const_arg1)) | |
5556 | return const_arg1; | |
5557 | break; | |
5558 | ||
5559 | case '3': | |
5560 | case 'b': | |
5561 | new = simplify_ternary_operation (code, mode, mode_arg0, | |
5562 | const_arg0 ? const_arg0 : folded_arg0, | |
5563 | const_arg1 ? const_arg1 : folded_arg1, | |
5564 | const_arg2 ? const_arg2 : XEXP (x, 2)); | |
5565 | break; | |
5566 | } | |
5567 | ||
5568 | return new ? new : x; | |
5569 | } | |
5570 | \f | |
5571 | /* Return a constant value currently equivalent to X. | |
5572 | Return 0 if we don't know one. */ | |
5573 | ||
5574 | static rtx | |
5575 | equiv_constant (x) | |
5576 | rtx x; | |
5577 | { | |
5578 | if (GET_CODE (x) == REG | |
5579 | && REGNO_QTY_VALID_P (REGNO (x)) | |
5580 | && qty_const[reg_qty[REGNO (x)]]) | |
5581 | x = gen_lowpart_if_possible (GET_MODE (x), qty_const[reg_qty[REGNO (x)]]); | |
5582 | ||
5583 | if (x != 0 && CONSTANT_P (x)) | |
5584 | return x; | |
5585 | ||
fc3ffe83 RK |
5586 | /* If X is a MEM, try to fold it outside the context of any insn to see if |
5587 | it might be equivalent to a constant. That handles the case where it | |
5588 | is a constant-pool reference. Then try to look it up in the hash table | |
5589 | in case it is something whose value we have seen before. */ | |
5590 | ||
5591 | if (GET_CODE (x) == MEM) | |
5592 | { | |
5593 | struct table_elt *elt; | |
5594 | ||
906c4e36 | 5595 | x = fold_rtx (x, NULL_RTX); |
fc3ffe83 RK |
5596 | if (CONSTANT_P (x)) |
5597 | return x; | |
5598 | ||
5599 | elt = lookup (x, safe_hash (x, GET_MODE (x)) % NBUCKETS, GET_MODE (x)); | |
5600 | if (elt == 0) | |
5601 | return 0; | |
5602 | ||
5603 | for (elt = elt->first_same_value; elt; elt = elt->next_same_value) | |
5604 | if (elt->is_const && CONSTANT_P (elt->exp)) | |
5605 | return elt->exp; | |
5606 | } | |
5607 | ||
7afe21cc RK |
5608 | return 0; |
5609 | } | |
5610 | \f | |
5611 | /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a fixed-point | |
5612 | number, return an rtx (MEM, SUBREG, or CONST_INT) that refers to the | |
5613 | least-significant part of X. | |
5614 | MODE specifies how big a part of X to return. | |
5615 | ||
5616 | If the requested operation cannot be done, 0 is returned. | |
5617 | ||
5618 | This is similar to gen_lowpart in emit-rtl.c. */ | |
5619 | ||
5620 | rtx | |
5621 | gen_lowpart_if_possible (mode, x) | |
5622 | enum machine_mode mode; | |
5623 | register rtx x; | |
5624 | { | |
5625 | rtx result = gen_lowpart_common (mode, x); | |
5626 | ||
5627 | if (result) | |
5628 | return result; | |
5629 | else if (GET_CODE (x) == MEM) | |
5630 | { | |
5631 | /* This is the only other case we handle. */ | |
5632 | register int offset = 0; | |
5633 | rtx new; | |
5634 | ||
5635 | #if WORDS_BIG_ENDIAN | |
5636 | offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD) | |
5637 | - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD)); | |
5638 | #endif | |
5639 | #if BYTES_BIG_ENDIAN | |
5640 | /* Adjust the address so that the address-after-the-data | |
5641 | is unchanged. */ | |
5642 | offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode)) | |
5643 | - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x)))); | |
5644 | #endif | |
5645 | new = gen_rtx (MEM, mode, plus_constant (XEXP (x, 0), offset)); | |
5646 | if (! memory_address_p (mode, XEXP (new, 0))) | |
5647 | return 0; | |
5648 | MEM_VOLATILE_P (new) = MEM_VOLATILE_P (x); | |
5649 | RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (x); | |
5650 | MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (x); | |
5651 | return new; | |
5652 | } | |
5653 | else | |
5654 | return 0; | |
5655 | } | |
5656 | \f | |
5657 | /* Given INSN, a jump insn, TAKEN indicates if we are following the "taken" | |
5658 | branch. It will be zero if not. | |
5659 | ||
5660 | In certain cases, this can cause us to add an equivalence. For example, | |
5661 | if we are following the taken case of | |
5662 | if (i == 2) | |
5663 | we can add the fact that `i' and '2' are now equivalent. | |
5664 | ||
5665 | In any case, we can record that this comparison was passed. If the same | |
5666 | comparison is seen later, we will know its value. */ | |
5667 | ||
5668 | static void | |
5669 | record_jump_equiv (insn, taken) | |
5670 | rtx insn; | |
5671 | int taken; | |
5672 | { | |
5673 | int cond_known_true; | |
5674 | rtx op0, op1; | |
13c9910f | 5675 | enum machine_mode mode, mode0, mode1; |
7afe21cc RK |
5676 | int reversed_nonequality = 0; |
5677 | enum rtx_code code; | |
5678 | ||
5679 | /* Ensure this is the right kind of insn. */ | |
5680 | if (! condjump_p (insn) || simplejump_p (insn)) | |
5681 | return; | |
5682 | ||
5683 | /* See if this jump condition is known true or false. */ | |
5684 | if (taken) | |
5685 | cond_known_true = (XEXP (SET_SRC (PATTERN (insn)), 2) == pc_rtx); | |
5686 | else | |
5687 | cond_known_true = (XEXP (SET_SRC (PATTERN (insn)), 1) == pc_rtx); | |
5688 | ||
5689 | /* Get the type of comparison being done and the operands being compared. | |
5690 | If we had to reverse a non-equality condition, record that fact so we | |
5691 | know that it isn't valid for floating-point. */ | |
5692 | code = GET_CODE (XEXP (SET_SRC (PATTERN (insn)), 0)); | |
5693 | op0 = fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn)), 0), 0), insn); | |
5694 | op1 = fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn)), 0), 1), insn); | |
5695 | ||
13c9910f | 5696 | code = find_comparison_args (code, &op0, &op1, &mode0, &mode1); |
7afe21cc RK |
5697 | if (! cond_known_true) |
5698 | { | |
5699 | reversed_nonequality = (code != EQ && code != NE); | |
5700 | code = reverse_condition (code); | |
5701 | } | |
5702 | ||
5703 | /* The mode is the mode of the non-constant. */ | |
13c9910f RS |
5704 | mode = mode0; |
5705 | if (mode1 != VOIDmode) | |
5706 | mode = mode1; | |
7afe21cc RK |
5707 | |
5708 | record_jump_cond (code, mode, op0, op1, reversed_nonequality); | |
5709 | } | |
5710 | ||
5711 | /* We know that comparison CODE applied to OP0 and OP1 in MODE is true. | |
5712 | REVERSED_NONEQUALITY is nonzero if CODE had to be swapped. | |
5713 | Make any useful entries we can with that information. Called from | |
5714 | above function and called recursively. */ | |
5715 | ||
5716 | static void | |
5717 | record_jump_cond (code, mode, op0, op1, reversed_nonequality) | |
5718 | enum rtx_code code; | |
5719 | enum machine_mode mode; | |
5720 | rtx op0, op1; | |
5721 | int reversed_nonequality; | |
5722 | { | |
2197a88a | 5723 | unsigned op0_hash, op1_hash; |
7afe21cc RK |
5724 | int op0_in_memory, op0_in_struct, op1_in_memory, op1_in_struct; |
5725 | struct table_elt *op0_elt, *op1_elt; | |
5726 | ||
5727 | /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG, | |
5728 | we know that they are also equal in the smaller mode (this is also | |
5729 | true for all smaller modes whether or not there is a SUBREG, but | |
5730 | is not worth testing for with no SUBREG. */ | |
5731 | ||
2e794ee8 | 5732 | /* Note that GET_MODE (op0) may not equal MODE. */ |
7afe21cc | 5733 | if (code == EQ && GET_CODE (op0) == SUBREG |
2e794ee8 RS |
5734 | && (GET_MODE_SIZE (GET_MODE (op0)) |
5735 | > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0))))) | |
7afe21cc RK |
5736 | { |
5737 | enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0)); | |
5738 | rtx tem = gen_lowpart_if_possible (inner_mode, op1); | |
5739 | ||
5740 | record_jump_cond (code, mode, SUBREG_REG (op0), | |
5741 | tem ? tem : gen_rtx (SUBREG, inner_mode, op1, 0), | |
5742 | reversed_nonequality); | |
5743 | } | |
5744 | ||
5745 | if (code == EQ && GET_CODE (op1) == SUBREG | |
2e794ee8 RS |
5746 | && (GET_MODE_SIZE (GET_MODE (op1)) |
5747 | > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1))))) | |
7afe21cc RK |
5748 | { |
5749 | enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1)); | |
5750 | rtx tem = gen_lowpart_if_possible (inner_mode, op0); | |
5751 | ||
5752 | record_jump_cond (code, mode, SUBREG_REG (op1), | |
5753 | tem ? tem : gen_rtx (SUBREG, inner_mode, op0, 0), | |
5754 | reversed_nonequality); | |
5755 | } | |
5756 | ||
5757 | /* Similarly, if this is an NE comparison, and either is a SUBREG | |
5758 | making a smaller mode, we know the whole thing is also NE. */ | |
5759 | ||
2e794ee8 RS |
5760 | /* Note that GET_MODE (op0) may not equal MODE; |
5761 | if we test MODE instead, we can get an infinite recursion | |
5762 | alternating between two modes each wider than MODE. */ | |
5763 | ||
7afe21cc RK |
5764 | if (code == NE && GET_CODE (op0) == SUBREG |
5765 | && subreg_lowpart_p (op0) | |
2e794ee8 RS |
5766 | && (GET_MODE_SIZE (GET_MODE (op0)) |
5767 | < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0))))) | |
7afe21cc RK |
5768 | { |
5769 | enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0)); | |
5770 | rtx tem = gen_lowpart_if_possible (inner_mode, op1); | |
5771 | ||
5772 | record_jump_cond (code, mode, SUBREG_REG (op0), | |
5773 | tem ? tem : gen_rtx (SUBREG, inner_mode, op1, 0), | |
5774 | reversed_nonequality); | |
5775 | } | |
5776 | ||
5777 | if (code == NE && GET_CODE (op1) == SUBREG | |
5778 | && subreg_lowpart_p (op1) | |
2e794ee8 RS |
5779 | && (GET_MODE_SIZE (GET_MODE (op1)) |
5780 | < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1))))) | |
7afe21cc RK |
5781 | { |
5782 | enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1)); | |
5783 | rtx tem = gen_lowpart_if_possible (inner_mode, op0); | |
5784 | ||
5785 | record_jump_cond (code, mode, SUBREG_REG (op1), | |
5786 | tem ? tem : gen_rtx (SUBREG, inner_mode, op0, 0), | |
5787 | reversed_nonequality); | |
5788 | } | |
5789 | ||
5790 | /* Hash both operands. */ | |
5791 | ||
5792 | do_not_record = 0; | |
5793 | hash_arg_in_memory = 0; | |
5794 | hash_arg_in_struct = 0; | |
2197a88a | 5795 | op0_hash = HASH (op0, mode); |
7afe21cc RK |
5796 | op0_in_memory = hash_arg_in_memory; |
5797 | op0_in_struct = hash_arg_in_struct; | |
5798 | ||
5799 | if (do_not_record) | |
5800 | return; | |
5801 | ||
5802 | do_not_record = 0; | |
5803 | hash_arg_in_memory = 0; | |
5804 | hash_arg_in_struct = 0; | |
2197a88a | 5805 | op1_hash = HASH (op1, mode); |
7afe21cc RK |
5806 | op1_in_memory = hash_arg_in_memory; |
5807 | op1_in_struct = hash_arg_in_struct; | |
5808 | ||
5809 | if (do_not_record) | |
5810 | return; | |
5811 | ||
5812 | /* Look up both operands. */ | |
2197a88a RK |
5813 | op0_elt = lookup (op0, op0_hash, mode); |
5814 | op1_elt = lookup (op1, op1_hash, mode); | |
7afe21cc | 5815 | |
af3869c1 RK |
5816 | /* If both operands are already equivalent or if they are not in the |
5817 | table but are identical, do nothing. */ | |
5818 | if ((op0_elt != 0 && op1_elt != 0 | |
5819 | && op0_elt->first_same_value == op1_elt->first_same_value) | |
5820 | || op0 == op1 || rtx_equal_p (op0, op1)) | |
5821 | return; | |
5822 | ||
7afe21cc | 5823 | /* If we aren't setting two things equal all we can do is save this |
b2796a4b RK |
5824 | comparison. Similarly if this is floating-point. In the latter |
5825 | case, OP1 might be zero and both -0.0 and 0.0 are equal to it. | |
5826 | If we record the equality, we might inadvertently delete code | |
5827 | whose intent was to change -0 to +0. */ | |
5828 | ||
cbf6a543 | 5829 | if (code != EQ || FLOAT_MODE_P (GET_MODE (op0))) |
7afe21cc RK |
5830 | { |
5831 | /* If we reversed a floating-point comparison, if OP0 is not a | |
5832 | register, or if OP1 is neither a register or constant, we can't | |
5833 | do anything. */ | |
5834 | ||
5835 | if (GET_CODE (op1) != REG) | |
5836 | op1 = equiv_constant (op1); | |
5837 | ||
cbf6a543 | 5838 | if ((reversed_nonequality && FLOAT_MODE_P (mode)) |
7afe21cc RK |
5839 | || GET_CODE (op0) != REG || op1 == 0) |
5840 | return; | |
5841 | ||
5842 | /* Put OP0 in the hash table if it isn't already. This gives it a | |
5843 | new quantity number. */ | |
5844 | if (op0_elt == 0) | |
5845 | { | |
906c4e36 | 5846 | if (insert_regs (op0, NULL_PTR, 0)) |
7afe21cc RK |
5847 | { |
5848 | rehash_using_reg (op0); | |
2197a88a | 5849 | op0_hash = HASH (op0, mode); |
2bb81c86 RK |
5850 | |
5851 | /* If OP0 is contained in OP1, this changes its hash code | |
5852 | as well. Faster to rehash than to check, except | |
5853 | for the simple case of a constant. */ | |
5854 | if (! CONSTANT_P (op1)) | |
2197a88a | 5855 | op1_hash = HASH (op1,mode); |
7afe21cc RK |
5856 | } |
5857 | ||
2197a88a | 5858 | op0_elt = insert (op0, NULL_PTR, op0_hash, mode); |
7afe21cc RK |
5859 | op0_elt->in_memory = op0_in_memory; |
5860 | op0_elt->in_struct = op0_in_struct; | |
5861 | } | |
5862 | ||
5863 | qty_comparison_code[reg_qty[REGNO (op0)]] = code; | |
5864 | if (GET_CODE (op1) == REG) | |
5865 | { | |
5d5ea909 | 5866 | /* Look it up again--in case op0 and op1 are the same. */ |
2197a88a | 5867 | op1_elt = lookup (op1, op1_hash, mode); |
5d5ea909 | 5868 | |
7afe21cc RK |
5869 | /* Put OP1 in the hash table so it gets a new quantity number. */ |
5870 | if (op1_elt == 0) | |
5871 | { | |
906c4e36 | 5872 | if (insert_regs (op1, NULL_PTR, 0)) |
7afe21cc RK |
5873 | { |
5874 | rehash_using_reg (op1); | |
2197a88a | 5875 | op1_hash = HASH (op1, mode); |
7afe21cc RK |
5876 | } |
5877 | ||
2197a88a | 5878 | op1_elt = insert (op1, NULL_PTR, op1_hash, mode); |
7afe21cc RK |
5879 | op1_elt->in_memory = op1_in_memory; |
5880 | op1_elt->in_struct = op1_in_struct; | |
5881 | } | |
5882 | ||
5883 | qty_comparison_qty[reg_qty[REGNO (op0)]] = reg_qty[REGNO (op1)]; | |
5884 | qty_comparison_const[reg_qty[REGNO (op0)]] = 0; | |
5885 | } | |
5886 | else | |
5887 | { | |
5888 | qty_comparison_qty[reg_qty[REGNO (op0)]] = -1; | |
5889 | qty_comparison_const[reg_qty[REGNO (op0)]] = op1; | |
5890 | } | |
5891 | ||
5892 | return; | |
5893 | } | |
5894 | ||
eb5ad42a RS |
5895 | /* If either side is still missing an equivalence, make it now, |
5896 | then merge the equivalences. */ | |
7afe21cc | 5897 | |
7afe21cc RK |
5898 | if (op0_elt == 0) |
5899 | { | |
eb5ad42a | 5900 | if (insert_regs (op0, NULL_PTR, 0)) |
7afe21cc RK |
5901 | { |
5902 | rehash_using_reg (op0); | |
2197a88a | 5903 | op0_hash = HASH (op0, mode); |
7afe21cc RK |
5904 | } |
5905 | ||
2197a88a | 5906 | op0_elt = insert (op0, NULL_PTR, op0_hash, mode); |
7afe21cc RK |
5907 | op0_elt->in_memory = op0_in_memory; |
5908 | op0_elt->in_struct = op0_in_struct; | |
7afe21cc RK |
5909 | } |
5910 | ||
5911 | if (op1_elt == 0) | |
5912 | { | |
eb5ad42a | 5913 | if (insert_regs (op1, NULL_PTR, 0)) |
7afe21cc RK |
5914 | { |
5915 | rehash_using_reg (op1); | |
2197a88a | 5916 | op1_hash = HASH (op1, mode); |
7afe21cc RK |
5917 | } |
5918 | ||
2197a88a | 5919 | op1_elt = insert (op1, NULL_PTR, op1_hash, mode); |
7afe21cc RK |
5920 | op1_elt->in_memory = op1_in_memory; |
5921 | op1_elt->in_struct = op1_in_struct; | |
7afe21cc | 5922 | } |
eb5ad42a RS |
5923 | |
5924 | merge_equiv_classes (op0_elt, op1_elt); | |
5925 | last_jump_equiv_class = op0_elt; | |
7afe21cc RK |
5926 | } |
5927 | \f | |
5928 | /* CSE processing for one instruction. | |
5929 | First simplify sources and addresses of all assignments | |
5930 | in the instruction, using previously-computed equivalents values. | |
5931 | Then install the new sources and destinations in the table | |
5932 | of available values. | |
5933 | ||
5934 | If IN_LIBCALL_BLOCK is nonzero, don't record any equivalence made in | |
5935 | the insn. */ | |
5936 | ||
5937 | /* Data on one SET contained in the instruction. */ | |
5938 | ||
5939 | struct set | |
5940 | { | |
5941 | /* The SET rtx itself. */ | |
5942 | rtx rtl; | |
5943 | /* The SET_SRC of the rtx (the original value, if it is changing). */ | |
5944 | rtx src; | |
5945 | /* The hash-table element for the SET_SRC of the SET. */ | |
5946 | struct table_elt *src_elt; | |
2197a88a RK |
5947 | /* Hash value for the SET_SRC. */ |
5948 | unsigned src_hash; | |
5949 | /* Hash value for the SET_DEST. */ | |
5950 | unsigned dest_hash; | |
7afe21cc RK |
5951 | /* The SET_DEST, with SUBREG, etc., stripped. */ |
5952 | rtx inner_dest; | |
5953 | /* Place where the pointer to the INNER_DEST was found. */ | |
5954 | rtx *inner_dest_loc; | |
5955 | /* Nonzero if the SET_SRC is in memory. */ | |
5956 | char src_in_memory; | |
5957 | /* Nonzero if the SET_SRC is in a structure. */ | |
5958 | char src_in_struct; | |
5959 | /* Nonzero if the SET_SRC contains something | |
5960 | whose value cannot be predicted and understood. */ | |
5961 | char src_volatile; | |
5962 | /* Original machine mode, in case it becomes a CONST_INT. */ | |
5963 | enum machine_mode mode; | |
5964 | /* A constant equivalent for SET_SRC, if any. */ | |
5965 | rtx src_const; | |
2197a88a RK |
5966 | /* Hash value of constant equivalent for SET_SRC. */ |
5967 | unsigned src_const_hash; | |
7afe21cc RK |
5968 | /* Table entry for constant equivalent for SET_SRC, if any. */ |
5969 | struct table_elt *src_const_elt; | |
5970 | }; | |
5971 | ||
5972 | static void | |
5973 | cse_insn (insn, in_libcall_block) | |
5974 | rtx insn; | |
5975 | int in_libcall_block; | |
5976 | { | |
5977 | register rtx x = PATTERN (insn); | |
7afe21cc | 5978 | register int i; |
92f9aa51 | 5979 | rtx tem; |
7afe21cc RK |
5980 | register int n_sets = 0; |
5981 | ||
5982 | /* Records what this insn does to set CC0. */ | |
5983 | rtx this_insn_cc0 = 0; | |
5984 | enum machine_mode this_insn_cc0_mode; | |
5985 | struct write_data writes_memory; | |
5986 | static struct write_data init = {0, 0, 0, 0}; | |
5987 | ||
5988 | rtx src_eqv = 0; | |
5989 | struct table_elt *src_eqv_elt = 0; | |
5990 | int src_eqv_volatile; | |
5991 | int src_eqv_in_memory; | |
5992 | int src_eqv_in_struct; | |
2197a88a | 5993 | unsigned src_eqv_hash; |
7afe21cc RK |
5994 | |
5995 | struct set *sets; | |
5996 | ||
5997 | this_insn = insn; | |
5998 | writes_memory = init; | |
5999 | ||
6000 | /* Find all the SETs and CLOBBERs in this instruction. | |
6001 | Record all the SETs in the array `set' and count them. | |
6002 | Also determine whether there is a CLOBBER that invalidates | |
6003 | all memory references, or all references at varying addresses. */ | |
6004 | ||
f1e7c95f RK |
6005 | if (GET_CODE (insn) == CALL_INSN) |
6006 | { | |
6007 | for (tem = CALL_INSN_FUNCTION_USAGE (insn); tem; tem = XEXP (tem, 1)) | |
6008 | if (GET_CODE (XEXP (tem, 0)) == CLOBBER) | |
bb4034b3 | 6009 | invalidate (SET_DEST (XEXP (tem, 0)), VOIDmode); |
f1e7c95f RK |
6010 | } |
6011 | ||
7afe21cc RK |
6012 | if (GET_CODE (x) == SET) |
6013 | { | |
6014 | sets = (struct set *) alloca (sizeof (struct set)); | |
6015 | sets[0].rtl = x; | |
6016 | ||
6017 | /* Ignore SETs that are unconditional jumps. | |
6018 | They never need cse processing, so this does not hurt. | |
6019 | The reason is not efficiency but rather | |
6020 | so that we can test at the end for instructions | |
6021 | that have been simplified to unconditional jumps | |
6022 | and not be misled by unchanged instructions | |
6023 | that were unconditional jumps to begin with. */ | |
6024 | if (SET_DEST (x) == pc_rtx | |
6025 | && GET_CODE (SET_SRC (x)) == LABEL_REF) | |
6026 | ; | |
6027 | ||
6028 | /* Don't count call-insns, (set (reg 0) (call ...)), as a set. | |
6029 | The hard function value register is used only once, to copy to | |
6030 | someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)! | |
6031 | Ensure we invalidate the destination register. On the 80386 no | |
7722328e RK |
6032 | other code would invalidate it since it is a fixed_reg. |
6033 | We need not check the return of apply_change_group; see canon_reg. */ | |
7afe21cc RK |
6034 | |
6035 | else if (GET_CODE (SET_SRC (x)) == CALL) | |
6036 | { | |
6037 | canon_reg (SET_SRC (x), insn); | |
77fa0940 | 6038 | apply_change_group (); |
7afe21cc | 6039 | fold_rtx (SET_SRC (x), insn); |
bb4034b3 | 6040 | invalidate (SET_DEST (x), VOIDmode); |
7afe21cc RK |
6041 | } |
6042 | else | |
6043 | n_sets = 1; | |
6044 | } | |
6045 | else if (GET_CODE (x) == PARALLEL) | |
6046 | { | |
6047 | register int lim = XVECLEN (x, 0); | |
6048 | ||
6049 | sets = (struct set *) alloca (lim * sizeof (struct set)); | |
6050 | ||
6051 | /* Find all regs explicitly clobbered in this insn, | |
6052 | and ensure they are not replaced with any other regs | |
6053 | elsewhere in this insn. | |
6054 | When a reg that is clobbered is also used for input, | |
6055 | we should presume that that is for a reason, | |
6056 | and we should not substitute some other register | |
6057 | which is not supposed to be clobbered. | |
6058 | Therefore, this loop cannot be merged into the one below | |
830a38ee | 6059 | because a CALL may precede a CLOBBER and refer to the |
7afe21cc RK |
6060 | value clobbered. We must not let a canonicalization do |
6061 | anything in that case. */ | |
6062 | for (i = 0; i < lim; i++) | |
6063 | { | |
6064 | register rtx y = XVECEXP (x, 0, i); | |
2708da92 RS |
6065 | if (GET_CODE (y) == CLOBBER) |
6066 | { | |
6067 | rtx clobbered = XEXP (y, 0); | |
6068 | ||
6069 | if (GET_CODE (clobbered) == REG | |
6070 | || GET_CODE (clobbered) == SUBREG) | |
bb4034b3 | 6071 | invalidate (clobbered, VOIDmode); |
2708da92 RS |
6072 | else if (GET_CODE (clobbered) == STRICT_LOW_PART |
6073 | || GET_CODE (clobbered) == ZERO_EXTRACT) | |
bb4034b3 | 6074 | invalidate (XEXP (clobbered, 0), GET_MODE (clobbered)); |
2708da92 | 6075 | } |
7afe21cc RK |
6076 | } |
6077 | ||
6078 | for (i = 0; i < lim; i++) | |
6079 | { | |
6080 | register rtx y = XVECEXP (x, 0, i); | |
6081 | if (GET_CODE (y) == SET) | |
6082 | { | |
7722328e RK |
6083 | /* As above, we ignore unconditional jumps and call-insns and |
6084 | ignore the result of apply_change_group. */ | |
7afe21cc RK |
6085 | if (GET_CODE (SET_SRC (y)) == CALL) |
6086 | { | |
6087 | canon_reg (SET_SRC (y), insn); | |
77fa0940 | 6088 | apply_change_group (); |
7afe21cc | 6089 | fold_rtx (SET_SRC (y), insn); |
bb4034b3 | 6090 | invalidate (SET_DEST (y), VOIDmode); |
7afe21cc RK |
6091 | } |
6092 | else if (SET_DEST (y) == pc_rtx | |
6093 | && GET_CODE (SET_SRC (y)) == LABEL_REF) | |
6094 | ; | |
6095 | else | |
6096 | sets[n_sets++].rtl = y; | |
6097 | } | |
6098 | else if (GET_CODE (y) == CLOBBER) | |
6099 | { | |
6100 | /* If we clobber memory, take note of that, | |
6101 | and canon the address. | |
6102 | This does nothing when a register is clobbered | |
6103 | because we have already invalidated the reg. */ | |
6104 | if (GET_CODE (XEXP (y, 0)) == MEM) | |
6105 | { | |
906c4e36 | 6106 | canon_reg (XEXP (y, 0), NULL_RTX); |
7afe21cc RK |
6107 | note_mem_written (XEXP (y, 0), &writes_memory); |
6108 | } | |
6109 | } | |
6110 | else if (GET_CODE (y) == USE | |
6111 | && ! (GET_CODE (XEXP (y, 0)) == REG | |
6112 | && REGNO (XEXP (y, 0)) < FIRST_PSEUDO_REGISTER)) | |
906c4e36 | 6113 | canon_reg (y, NULL_RTX); |
7afe21cc RK |
6114 | else if (GET_CODE (y) == CALL) |
6115 | { | |
7722328e RK |
6116 | /* The result of apply_change_group can be ignored; see |
6117 | canon_reg. */ | |
7afe21cc | 6118 | canon_reg (y, insn); |
77fa0940 | 6119 | apply_change_group (); |
7afe21cc RK |
6120 | fold_rtx (y, insn); |
6121 | } | |
6122 | } | |
6123 | } | |
6124 | else if (GET_CODE (x) == CLOBBER) | |
6125 | { | |
6126 | if (GET_CODE (XEXP (x, 0)) == MEM) | |
6127 | { | |
906c4e36 | 6128 | canon_reg (XEXP (x, 0), NULL_RTX); |
7afe21cc RK |
6129 | note_mem_written (XEXP (x, 0), &writes_memory); |
6130 | } | |
6131 | } | |
6132 | ||
6133 | /* Canonicalize a USE of a pseudo register or memory location. */ | |
6134 | else if (GET_CODE (x) == USE | |
6135 | && ! (GET_CODE (XEXP (x, 0)) == REG | |
6136 | && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)) | |
906c4e36 | 6137 | canon_reg (XEXP (x, 0), NULL_RTX); |
7afe21cc RK |
6138 | else if (GET_CODE (x) == CALL) |
6139 | { | |
7722328e | 6140 | /* The result of apply_change_group can be ignored; see canon_reg. */ |
7afe21cc | 6141 | canon_reg (x, insn); |
77fa0940 | 6142 | apply_change_group (); |
7afe21cc RK |
6143 | fold_rtx (x, insn); |
6144 | } | |
6145 | ||
7b3ab05e JW |
6146 | /* Store the equivalent value in SRC_EQV, if different, or if the DEST |
6147 | is a STRICT_LOW_PART. The latter condition is necessary because SRC_EQV | |
6148 | is handled specially for this case, and if it isn't set, then there will | |
6149 | be no equivalence for the destinatation. */ | |
92f9aa51 RK |
6150 | if (n_sets == 1 && REG_NOTES (insn) != 0 |
6151 | && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0 | |
7b3ab05e JW |
6152 | && (! rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl)) |
6153 | || GET_CODE (SET_DEST (sets[0].rtl)) == STRICT_LOW_PART)) | |
92f9aa51 | 6154 | src_eqv = canon_reg (XEXP (tem, 0), NULL_RTX); |
7afe21cc RK |
6155 | |
6156 | /* Canonicalize sources and addresses of destinations. | |
6157 | We do this in a separate pass to avoid problems when a MATCH_DUP is | |
6158 | present in the insn pattern. In that case, we want to ensure that | |
6159 | we don't break the duplicate nature of the pattern. So we will replace | |
6160 | both operands at the same time. Otherwise, we would fail to find an | |
6161 | equivalent substitution in the loop calling validate_change below. | |
7afe21cc RK |
6162 | |
6163 | We used to suppress canonicalization of DEST if it appears in SRC, | |
77fa0940 | 6164 | but we don't do this any more. */ |
7afe21cc RK |
6165 | |
6166 | for (i = 0; i < n_sets; i++) | |
6167 | { | |
6168 | rtx dest = SET_DEST (sets[i].rtl); | |
6169 | rtx src = SET_SRC (sets[i].rtl); | |
6170 | rtx new = canon_reg (src, insn); | |
6171 | ||
77fa0940 RK |
6172 | if ((GET_CODE (new) == REG && GET_CODE (src) == REG |
6173 | && ((REGNO (new) < FIRST_PSEUDO_REGISTER) | |
6174 | != (REGNO (src) < FIRST_PSEUDO_REGISTER))) | |
6175 | || insn_n_dups[recog_memoized (insn)] > 0) | |
6176 | validate_change (insn, &SET_SRC (sets[i].rtl), new, 1); | |
7afe21cc RK |
6177 | else |
6178 | SET_SRC (sets[i].rtl) = new; | |
6179 | ||
6180 | if (GET_CODE (dest) == ZERO_EXTRACT || GET_CODE (dest) == SIGN_EXTRACT) | |
6181 | { | |
6182 | validate_change (insn, &XEXP (dest, 1), | |
77fa0940 | 6183 | canon_reg (XEXP (dest, 1), insn), 1); |
7afe21cc | 6184 | validate_change (insn, &XEXP (dest, 2), |
77fa0940 | 6185 | canon_reg (XEXP (dest, 2), insn), 1); |
7afe21cc RK |
6186 | } |
6187 | ||
6188 | while (GET_CODE (dest) == SUBREG || GET_CODE (dest) == STRICT_LOW_PART | |
6189 | || GET_CODE (dest) == ZERO_EXTRACT | |
6190 | || GET_CODE (dest) == SIGN_EXTRACT) | |
6191 | dest = XEXP (dest, 0); | |
6192 | ||
6193 | if (GET_CODE (dest) == MEM) | |
6194 | canon_reg (dest, insn); | |
6195 | } | |
6196 | ||
77fa0940 RK |
6197 | /* Now that we have done all the replacements, we can apply the change |
6198 | group and see if they all work. Note that this will cause some | |
6199 | canonicalizations that would have worked individually not to be applied | |
6200 | because some other canonicalization didn't work, but this should not | |
7722328e RK |
6201 | occur often. |
6202 | ||
6203 | The result of apply_change_group can be ignored; see canon_reg. */ | |
77fa0940 RK |
6204 | |
6205 | apply_change_group (); | |
6206 | ||
7afe21cc RK |
6207 | /* Set sets[i].src_elt to the class each source belongs to. |
6208 | Detect assignments from or to volatile things | |
6209 | and set set[i] to zero so they will be ignored | |
6210 | in the rest of this function. | |
6211 | ||
6212 | Nothing in this loop changes the hash table or the register chains. */ | |
6213 | ||
6214 | for (i = 0; i < n_sets; i++) | |
6215 | { | |
6216 | register rtx src, dest; | |
6217 | register rtx src_folded; | |
6218 | register struct table_elt *elt = 0, *p; | |
6219 | enum machine_mode mode; | |
6220 | rtx src_eqv_here; | |
6221 | rtx src_const = 0; | |
6222 | rtx src_related = 0; | |
6223 | struct table_elt *src_const_elt = 0; | |
6224 | int src_cost = 10000, src_eqv_cost = 10000, src_folded_cost = 10000; | |
6225 | int src_related_cost = 10000, src_elt_cost = 10000; | |
6226 | /* Set non-zero if we need to call force_const_mem on with the | |
6227 | contents of src_folded before using it. */ | |
6228 | int src_folded_force_flag = 0; | |
6229 | ||
6230 | dest = SET_DEST (sets[i].rtl); | |
6231 | src = SET_SRC (sets[i].rtl); | |
6232 | ||
6233 | /* If SRC is a constant that has no machine mode, | |
6234 | hash it with the destination's machine mode. | |
6235 | This way we can keep different modes separate. */ | |
6236 | ||
6237 | mode = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src); | |
6238 | sets[i].mode = mode; | |
6239 | ||
6240 | if (src_eqv) | |
6241 | { | |
6242 | enum machine_mode eqvmode = mode; | |
6243 | if (GET_CODE (dest) == STRICT_LOW_PART) | |
6244 | eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0))); | |
6245 | do_not_record = 0; | |
6246 | hash_arg_in_memory = 0; | |
6247 | hash_arg_in_struct = 0; | |
6248 | src_eqv = fold_rtx (src_eqv, insn); | |
2197a88a | 6249 | src_eqv_hash = HASH (src_eqv, eqvmode); |
7afe21cc RK |
6250 | |
6251 | /* Find the equivalence class for the equivalent expression. */ | |
6252 | ||
6253 | if (!do_not_record) | |
2197a88a | 6254 | src_eqv_elt = lookup (src_eqv, src_eqv_hash, eqvmode); |
7afe21cc RK |
6255 | |
6256 | src_eqv_volatile = do_not_record; | |
6257 | src_eqv_in_memory = hash_arg_in_memory; | |
6258 | src_eqv_in_struct = hash_arg_in_struct; | |
6259 | } | |
6260 | ||
6261 | /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the | |
6262 | value of the INNER register, not the destination. So it is not | |
6263 | a legal substitution for the source. But save it for later. */ | |
6264 | if (GET_CODE (dest) == STRICT_LOW_PART) | |
6265 | src_eqv_here = 0; | |
6266 | else | |
6267 | src_eqv_here = src_eqv; | |
6268 | ||
6269 | /* Simplify and foldable subexpressions in SRC. Then get the fully- | |
6270 | simplified result, which may not necessarily be valid. */ | |
6271 | src_folded = fold_rtx (src, insn); | |
6272 | ||
6273 | /* If storing a constant in a bitfield, pre-truncate the constant | |
6274 | so we will be able to record it later. */ | |
6275 | if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT | |
6276 | || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT) | |
6277 | { | |
6278 | rtx width = XEXP (SET_DEST (sets[i].rtl), 1); | |
6279 | ||
6280 | if (GET_CODE (src) == CONST_INT | |
6281 | && GET_CODE (width) == CONST_INT | |
906c4e36 RK |
6282 | && INTVAL (width) < HOST_BITS_PER_WIDE_INT |
6283 | && (INTVAL (src) & ((HOST_WIDE_INT) (-1) << INTVAL (width)))) | |
6284 | src_folded | |
6285 | = GEN_INT (INTVAL (src) & (((HOST_WIDE_INT) 1 | |
6286 | << INTVAL (width)) - 1)); | |
7afe21cc RK |
6287 | } |
6288 | ||
6289 | /* Compute SRC's hash code, and also notice if it | |
6290 | should not be recorded at all. In that case, | |
6291 | prevent any further processing of this assignment. */ | |
6292 | do_not_record = 0; | |
6293 | hash_arg_in_memory = 0; | |
6294 | hash_arg_in_struct = 0; | |
6295 | ||
6296 | sets[i].src = src; | |
2197a88a | 6297 | sets[i].src_hash = HASH (src, mode); |
7afe21cc RK |
6298 | sets[i].src_volatile = do_not_record; |
6299 | sets[i].src_in_memory = hash_arg_in_memory; | |
6300 | sets[i].src_in_struct = hash_arg_in_struct; | |
6301 | ||
0dadecf6 RK |
6302 | #if 0 |
6303 | /* It is no longer clear why we used to do this, but it doesn't | |
6304 | appear to still be needed. So let's try without it since this | |
6305 | code hurts cse'ing widened ops. */ | |
7afe21cc RK |
6306 | /* If source is a perverse subreg (such as QI treated as an SI), |
6307 | treat it as volatile. It may do the work of an SI in one context | |
6308 | where the extra bits are not being used, but cannot replace an SI | |
6309 | in general. */ | |
6310 | if (GET_CODE (src) == SUBREG | |
6311 | && (GET_MODE_SIZE (GET_MODE (src)) | |
6312 | > GET_MODE_SIZE (GET_MODE (SUBREG_REG (src))))) | |
6313 | sets[i].src_volatile = 1; | |
0dadecf6 | 6314 | #endif |
7afe21cc RK |
6315 | |
6316 | /* Locate all possible equivalent forms for SRC. Try to replace | |
6317 | SRC in the insn with each cheaper equivalent. | |
6318 | ||
6319 | We have the following types of equivalents: SRC itself, a folded | |
6320 | version, a value given in a REG_EQUAL note, or a value related | |
6321 | to a constant. | |
6322 | ||
6323 | Each of these equivalents may be part of an additional class | |
6324 | of equivalents (if more than one is in the table, they must be in | |
6325 | the same class; we check for this). | |
6326 | ||
6327 | If the source is volatile, we don't do any table lookups. | |
6328 | ||
6329 | We note any constant equivalent for possible later use in a | |
6330 | REG_NOTE. */ | |
6331 | ||
6332 | if (!sets[i].src_volatile) | |
2197a88a | 6333 | elt = lookup (src, sets[i].src_hash, mode); |
7afe21cc RK |
6334 | |
6335 | sets[i].src_elt = elt; | |
6336 | ||
6337 | if (elt && src_eqv_here && src_eqv_elt) | |
6338 | { | |
6339 | if (elt->first_same_value != src_eqv_elt->first_same_value) | |
6340 | { | |
6341 | /* The REG_EQUAL is indicating that two formerly distinct | |
6342 | classes are now equivalent. So merge them. */ | |
6343 | merge_equiv_classes (elt, src_eqv_elt); | |
2197a88a RK |
6344 | src_eqv_hash = HASH (src_eqv, elt->mode); |
6345 | src_eqv_elt = lookup (src_eqv, src_eqv_hash, elt->mode); | |
7afe21cc RK |
6346 | } |
6347 | ||
6348 | src_eqv_here = 0; | |
6349 | } | |
6350 | ||
6351 | else if (src_eqv_elt) | |
6352 | elt = src_eqv_elt; | |
6353 | ||
6354 | /* Try to find a constant somewhere and record it in `src_const'. | |
6355 | Record its table element, if any, in `src_const_elt'. Look in | |
6356 | any known equivalences first. (If the constant is not in the | |
2197a88a | 6357 | table, also set `sets[i].src_const_hash'). */ |
7afe21cc RK |
6358 | if (elt) |
6359 | for (p = elt->first_same_value; p; p = p->next_same_value) | |
6360 | if (p->is_const) | |
6361 | { | |
6362 | src_const = p->exp; | |
6363 | src_const_elt = elt; | |
6364 | break; | |
6365 | } | |
6366 | ||
6367 | if (src_const == 0 | |
6368 | && (CONSTANT_P (src_folded) | |
6369 | /* Consider (minus (label_ref L1) (label_ref L2)) as | |
6370 | "constant" here so we will record it. This allows us | |
6371 | to fold switch statements when an ADDR_DIFF_VEC is used. */ | |
6372 | || (GET_CODE (src_folded) == MINUS | |
6373 | && GET_CODE (XEXP (src_folded, 0)) == LABEL_REF | |
6374 | && GET_CODE (XEXP (src_folded, 1)) == LABEL_REF))) | |
6375 | src_const = src_folded, src_const_elt = elt; | |
6376 | else if (src_const == 0 && src_eqv_here && CONSTANT_P (src_eqv_here)) | |
6377 | src_const = src_eqv_here, src_const_elt = src_eqv_elt; | |
6378 | ||
6379 | /* If we don't know if the constant is in the table, get its | |
6380 | hash code and look it up. */ | |
6381 | if (src_const && src_const_elt == 0) | |
6382 | { | |
2197a88a RK |
6383 | sets[i].src_const_hash = HASH (src_const, mode); |
6384 | src_const_elt = lookup (src_const, sets[i].src_const_hash, mode); | |
7afe21cc RK |
6385 | } |
6386 | ||
6387 | sets[i].src_const = src_const; | |
6388 | sets[i].src_const_elt = src_const_elt; | |
6389 | ||
6390 | /* If the constant and our source are both in the table, mark them as | |
6391 | equivalent. Otherwise, if a constant is in the table but the source | |
6392 | isn't, set ELT to it. */ | |
6393 | if (src_const_elt && elt | |
6394 | && src_const_elt->first_same_value != elt->first_same_value) | |
6395 | merge_equiv_classes (elt, src_const_elt); | |
6396 | else if (src_const_elt && elt == 0) | |
6397 | elt = src_const_elt; | |
6398 | ||
6399 | /* See if there is a register linearly related to a constant | |
6400 | equivalent of SRC. */ | |
6401 | if (src_const | |
6402 | && (GET_CODE (src_const) == CONST | |
6403 | || (src_const_elt && src_const_elt->related_value != 0))) | |
6404 | { | |
6405 | src_related = use_related_value (src_const, src_const_elt); | |
6406 | if (src_related) | |
6407 | { | |
6408 | struct table_elt *src_related_elt | |
6409 | = lookup (src_related, HASH (src_related, mode), mode); | |
6410 | if (src_related_elt && elt) | |
6411 | { | |
6412 | if (elt->first_same_value | |
6413 | != src_related_elt->first_same_value) | |
6414 | /* This can occur when we previously saw a CONST | |
6415 | involving a SYMBOL_REF and then see the SYMBOL_REF | |
6416 | twice. Merge the involved classes. */ | |
6417 | merge_equiv_classes (elt, src_related_elt); | |
6418 | ||
6419 | src_related = 0; | |
6420 | src_related_elt = 0; | |
6421 | } | |
6422 | else if (src_related_elt && elt == 0) | |
6423 | elt = src_related_elt; | |
6424 | } | |
6425 | } | |
6426 | ||
e4600702 RK |
6427 | /* See if we have a CONST_INT that is already in a register in a |
6428 | wider mode. */ | |
6429 | ||
6430 | if (src_const && src_related == 0 && GET_CODE (src_const) == CONST_INT | |
6431 | && GET_MODE_CLASS (mode) == MODE_INT | |
6432 | && GET_MODE_BITSIZE (mode) < BITS_PER_WORD) | |
6433 | { | |
6434 | enum machine_mode wider_mode; | |
6435 | ||
6436 | for (wider_mode = GET_MODE_WIDER_MODE (mode); | |
6437 | GET_MODE_BITSIZE (wider_mode) <= BITS_PER_WORD | |
6438 | && src_related == 0; | |
6439 | wider_mode = GET_MODE_WIDER_MODE (wider_mode)) | |
6440 | { | |
6441 | struct table_elt *const_elt | |
6442 | = lookup (src_const, HASH (src_const, wider_mode), wider_mode); | |
6443 | ||
6444 | if (const_elt == 0) | |
6445 | continue; | |
6446 | ||
6447 | for (const_elt = const_elt->first_same_value; | |
6448 | const_elt; const_elt = const_elt->next_same_value) | |
6449 | if (GET_CODE (const_elt->exp) == REG) | |
6450 | { | |
6451 | src_related = gen_lowpart_if_possible (mode, | |
6452 | const_elt->exp); | |
6453 | break; | |
6454 | } | |
6455 | } | |
6456 | } | |
6457 | ||
d45cf215 RS |
6458 | /* Another possibility is that we have an AND with a constant in |
6459 | a mode narrower than a word. If so, it might have been generated | |
6460 | as part of an "if" which would narrow the AND. If we already | |
6461 | have done the AND in a wider mode, we can use a SUBREG of that | |
6462 | value. */ | |
6463 | ||
6464 | if (flag_expensive_optimizations && ! src_related | |
6465 | && GET_CODE (src) == AND && GET_CODE (XEXP (src, 1)) == CONST_INT | |
6466 | && GET_MODE_SIZE (mode) < UNITS_PER_WORD) | |
6467 | { | |
6468 | enum machine_mode tmode; | |
906c4e36 | 6469 | rtx new_and = gen_rtx (AND, VOIDmode, NULL_RTX, XEXP (src, 1)); |
d45cf215 RS |
6470 | |
6471 | for (tmode = GET_MODE_WIDER_MODE (mode); | |
6472 | GET_MODE_SIZE (tmode) <= UNITS_PER_WORD; | |
6473 | tmode = GET_MODE_WIDER_MODE (tmode)) | |
6474 | { | |
6475 | rtx inner = gen_lowpart_if_possible (tmode, XEXP (src, 0)); | |
6476 | struct table_elt *larger_elt; | |
6477 | ||
6478 | if (inner) | |
6479 | { | |
6480 | PUT_MODE (new_and, tmode); | |
6481 | XEXP (new_and, 0) = inner; | |
6482 | larger_elt = lookup (new_and, HASH (new_and, tmode), tmode); | |
6483 | if (larger_elt == 0) | |
6484 | continue; | |
6485 | ||
6486 | for (larger_elt = larger_elt->first_same_value; | |
6487 | larger_elt; larger_elt = larger_elt->next_same_value) | |
6488 | if (GET_CODE (larger_elt->exp) == REG) | |
6489 | { | |
6490 | src_related | |
6491 | = gen_lowpart_if_possible (mode, larger_elt->exp); | |
6492 | break; | |
6493 | } | |
6494 | ||
6495 | if (src_related) | |
6496 | break; | |
6497 | } | |
6498 | } | |
6499 | } | |
7bac1be0 RK |
6500 | |
6501 | #ifdef LOAD_EXTEND_OP | |
6502 | /* See if a MEM has already been loaded with a widening operation; | |
6503 | if it has, we can use a subreg of that. Many CISC machines | |
6504 | also have such operations, but this is only likely to be | |
6505 | beneficial these machines. */ | |
6506 | ||
6507 | if (flag_expensive_optimizations && src_related == 0 | |
6508 | && (GET_MODE_SIZE (mode) < UNITS_PER_WORD) | |
6509 | && GET_MODE_CLASS (mode) == MODE_INT | |
6510 | && GET_CODE (src) == MEM && ! do_not_record | |
6511 | && LOAD_EXTEND_OP (mode) != NIL) | |
6512 | { | |
6513 | enum machine_mode tmode; | |
6514 | ||
6515 | /* Set what we are trying to extend and the operation it might | |
6516 | have been extended with. */ | |
6517 | PUT_CODE (memory_extend_rtx, LOAD_EXTEND_OP (mode)); | |
6518 | XEXP (memory_extend_rtx, 0) = src; | |
6519 | ||
6520 | for (tmode = GET_MODE_WIDER_MODE (mode); | |
6521 | GET_MODE_SIZE (tmode) <= UNITS_PER_WORD; | |
6522 | tmode = GET_MODE_WIDER_MODE (tmode)) | |
6523 | { | |
6524 | struct table_elt *larger_elt; | |
6525 | ||
6526 | PUT_MODE (memory_extend_rtx, tmode); | |
6527 | larger_elt = lookup (memory_extend_rtx, | |
6528 | HASH (memory_extend_rtx, tmode), tmode); | |
6529 | if (larger_elt == 0) | |
6530 | continue; | |
6531 | ||
6532 | for (larger_elt = larger_elt->first_same_value; | |
6533 | larger_elt; larger_elt = larger_elt->next_same_value) | |
6534 | if (GET_CODE (larger_elt->exp) == REG) | |
6535 | { | |
6536 | src_related = gen_lowpart_if_possible (mode, | |
6537 | larger_elt->exp); | |
6538 | break; | |
6539 | } | |
6540 | ||
6541 | if (src_related) | |
6542 | break; | |
6543 | } | |
6544 | } | |
6545 | #endif /* LOAD_EXTEND_OP */ | |
6546 | ||
7afe21cc RK |
6547 | if (src == src_folded) |
6548 | src_folded = 0; | |
6549 | ||
6550 | /* At this point, ELT, if non-zero, points to a class of expressions | |
6551 | equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED, | |
6552 | and SRC_RELATED, if non-zero, each contain additional equivalent | |
6553 | expressions. Prune these latter expressions by deleting expressions | |
6554 | already in the equivalence class. | |
6555 | ||
6556 | Check for an equivalent identical to the destination. If found, | |
6557 | this is the preferred equivalent since it will likely lead to | |
6558 | elimination of the insn. Indicate this by placing it in | |
6559 | `src_related'. */ | |
6560 | ||
6561 | if (elt) elt = elt->first_same_value; | |
6562 | for (p = elt; p; p = p->next_same_value) | |
6563 | { | |
6564 | enum rtx_code code = GET_CODE (p->exp); | |
6565 | ||
6566 | /* If the expression is not valid, ignore it. Then we do not | |
6567 | have to check for validity below. In most cases, we can use | |
6568 | `rtx_equal_p', since canonicalization has already been done. */ | |
6569 | if (code != REG && ! exp_equiv_p (p->exp, p->exp, 1, 0)) | |
6570 | continue; | |
6571 | ||
6572 | if (src && GET_CODE (src) == code && rtx_equal_p (src, p->exp)) | |
6573 | src = 0; | |
6574 | else if (src_folded && GET_CODE (src_folded) == code | |
6575 | && rtx_equal_p (src_folded, p->exp)) | |
6576 | src_folded = 0; | |
6577 | else if (src_eqv_here && GET_CODE (src_eqv_here) == code | |
6578 | && rtx_equal_p (src_eqv_here, p->exp)) | |
6579 | src_eqv_here = 0; | |
6580 | else if (src_related && GET_CODE (src_related) == code | |
6581 | && rtx_equal_p (src_related, p->exp)) | |
6582 | src_related = 0; | |
6583 | ||
6584 | /* This is the same as the destination of the insns, we want | |
6585 | to prefer it. Copy it to src_related. The code below will | |
6586 | then give it a negative cost. */ | |
6587 | if (GET_CODE (dest) == code && rtx_equal_p (p->exp, dest)) | |
6588 | src_related = dest; | |
6589 | ||
6590 | } | |
6591 | ||
6592 | /* Find the cheapest valid equivalent, trying all the available | |
6593 | possibilities. Prefer items not in the hash table to ones | |
6594 | that are when they are equal cost. Note that we can never | |
6595 | worsen an insn as the current contents will also succeed. | |
05c33dd8 | 6596 | If we find an equivalent identical to the destination, use it as best, |
7afe21cc RK |
6597 | since this insn will probably be eliminated in that case. */ |
6598 | if (src) | |
6599 | { | |
6600 | if (rtx_equal_p (src, dest)) | |
6601 | src_cost = -1; | |
6602 | else | |
6603 | src_cost = COST (src); | |
6604 | } | |
6605 | ||
6606 | if (src_eqv_here) | |
6607 | { | |
6608 | if (rtx_equal_p (src_eqv_here, dest)) | |
6609 | src_eqv_cost = -1; | |
6610 | else | |
6611 | src_eqv_cost = COST (src_eqv_here); | |
6612 | } | |
6613 | ||
6614 | if (src_folded) | |
6615 | { | |
6616 | if (rtx_equal_p (src_folded, dest)) | |
6617 | src_folded_cost = -1; | |
6618 | else | |
6619 | src_folded_cost = COST (src_folded); | |
6620 | } | |
6621 | ||
6622 | if (src_related) | |
6623 | { | |
6624 | if (rtx_equal_p (src_related, dest)) | |
6625 | src_related_cost = -1; | |
6626 | else | |
6627 | src_related_cost = COST (src_related); | |
6628 | } | |
6629 | ||
6630 | /* If this was an indirect jump insn, a known label will really be | |
6631 | cheaper even though it looks more expensive. */ | |
6632 | if (dest == pc_rtx && src_const && GET_CODE (src_const) == LABEL_REF) | |
6633 | src_folded = src_const, src_folded_cost = -1; | |
6634 | ||
6635 | /* Terminate loop when replacement made. This must terminate since | |
6636 | the current contents will be tested and will always be valid. */ | |
6637 | while (1) | |
6638 | { | |
6639 | rtx trial; | |
6640 | ||
6641 | /* Skip invalid entries. */ | |
6642 | while (elt && GET_CODE (elt->exp) != REG | |
6643 | && ! exp_equiv_p (elt->exp, elt->exp, 1, 0)) | |
6644 | elt = elt->next_same_value; | |
6645 | ||
6646 | if (elt) src_elt_cost = elt->cost; | |
6647 | ||
6648 | /* Find cheapest and skip it for the next time. For items | |
6649 | of equal cost, use this order: | |
6650 | src_folded, src, src_eqv, src_related and hash table entry. */ | |
6651 | if (src_folded_cost <= src_cost | |
6652 | && src_folded_cost <= src_eqv_cost | |
6653 | && src_folded_cost <= src_related_cost | |
6654 | && src_folded_cost <= src_elt_cost) | |
6655 | { | |
6656 | trial = src_folded, src_folded_cost = 10000; | |
6657 | if (src_folded_force_flag) | |
6658 | trial = force_const_mem (mode, trial); | |
6659 | } | |
6660 | else if (src_cost <= src_eqv_cost | |
6661 | && src_cost <= src_related_cost | |
6662 | && src_cost <= src_elt_cost) | |
6663 | trial = src, src_cost = 10000; | |
6664 | else if (src_eqv_cost <= src_related_cost | |
6665 | && src_eqv_cost <= src_elt_cost) | |
0af62b41 | 6666 | trial = copy_rtx (src_eqv_here), src_eqv_cost = 10000; |
7afe21cc | 6667 | else if (src_related_cost <= src_elt_cost) |
0af62b41 | 6668 | trial = copy_rtx (src_related), src_related_cost = 10000; |
7afe21cc RK |
6669 | else |
6670 | { | |
05c33dd8 | 6671 | trial = copy_rtx (elt->exp); |
7afe21cc RK |
6672 | elt = elt->next_same_value; |
6673 | src_elt_cost = 10000; | |
6674 | } | |
6675 | ||
6676 | /* We don't normally have an insn matching (set (pc) (pc)), so | |
6677 | check for this separately here. We will delete such an | |
6678 | insn below. | |
6679 | ||
6680 | Tablejump insns contain a USE of the table, so simply replacing | |
6681 | the operand with the constant won't match. This is simply an | |
6682 | unconditional branch, however, and is therefore valid. Just | |
6683 | insert the substitution here and we will delete and re-emit | |
6684 | the insn later. */ | |
6685 | ||
6686 | if (n_sets == 1 && dest == pc_rtx | |
6687 | && (trial == pc_rtx | |
6688 | || (GET_CODE (trial) == LABEL_REF | |
6689 | && ! condjump_p (insn)))) | |
6690 | { | |
6691 | /* If TRIAL is a label in front of a jump table, we are | |
6692 | really falling through the switch (this is how casesi | |
6693 | insns work), so we must branch around the table. */ | |
6694 | if (GET_CODE (trial) == CODE_LABEL | |
6695 | && NEXT_INSN (trial) != 0 | |
6696 | && GET_CODE (NEXT_INSN (trial)) == JUMP_INSN | |
6697 | && (GET_CODE (PATTERN (NEXT_INSN (trial))) == ADDR_DIFF_VEC | |
6698 | || GET_CODE (PATTERN (NEXT_INSN (trial))) == ADDR_VEC)) | |
6699 | ||
6700 | trial = gen_rtx (LABEL_REF, Pmode, get_label_after (trial)); | |
6701 | ||
6702 | SET_SRC (sets[i].rtl) = trial; | |
44333223 | 6703 | cse_jumps_altered = 1; |
7afe21cc RK |
6704 | break; |
6705 | } | |
6706 | ||
6707 | /* Look for a substitution that makes a valid insn. */ | |
6708 | else if (validate_change (insn, &SET_SRC (sets[i].rtl), trial, 0)) | |
05c33dd8 | 6709 | { |
7722328e RK |
6710 | /* The result of apply_change_group can be ignored; see |
6711 | canon_reg. */ | |
6712 | ||
6713 | validate_change (insn, &SET_SRC (sets[i].rtl), | |
6714 | canon_reg (SET_SRC (sets[i].rtl), insn), | |
6715 | 1); | |
6702af89 | 6716 | apply_change_group (); |
05c33dd8 RK |
6717 | break; |
6718 | } | |
7afe21cc RK |
6719 | |
6720 | /* If we previously found constant pool entries for | |
6721 | constants and this is a constant, try making a | |
6722 | pool entry. Put it in src_folded unless we already have done | |
6723 | this since that is where it likely came from. */ | |
6724 | ||
6725 | else if (constant_pool_entries_cost | |
6726 | && CONSTANT_P (trial) | |
6727 | && (src_folded == 0 || GET_CODE (src_folded) != MEM) | |
6728 | && GET_MODE_CLASS (mode) != MODE_CC) | |
6729 | { | |
6730 | src_folded_force_flag = 1; | |
6731 | src_folded = trial; | |
6732 | src_folded_cost = constant_pool_entries_cost; | |
6733 | } | |
6734 | } | |
6735 | ||
6736 | src = SET_SRC (sets[i].rtl); | |
6737 | ||
6738 | /* In general, it is good to have a SET with SET_SRC == SET_DEST. | |
6739 | However, there is an important exception: If both are registers | |
6740 | that are not the head of their equivalence class, replace SET_SRC | |
6741 | with the head of the class. If we do not do this, we will have | |
6742 | both registers live over a portion of the basic block. This way, | |
6743 | their lifetimes will likely abut instead of overlapping. */ | |
6744 | if (GET_CODE (dest) == REG | |
6745 | && REGNO_QTY_VALID_P (REGNO (dest)) | |
6746 | && qty_mode[reg_qty[REGNO (dest)]] == GET_MODE (dest) | |
6747 | && qty_first_reg[reg_qty[REGNO (dest)]] != REGNO (dest) | |
6748 | && GET_CODE (src) == REG && REGNO (src) == REGNO (dest) | |
6749 | /* Don't do this if the original insn had a hard reg as | |
6750 | SET_SRC. */ | |
6751 | && (GET_CODE (sets[i].src) != REG | |
6752 | || REGNO (sets[i].src) >= FIRST_PSEUDO_REGISTER)) | |
6753 | /* We can't call canon_reg here because it won't do anything if | |
6754 | SRC is a hard register. */ | |
6755 | { | |
6756 | int first = qty_first_reg[reg_qty[REGNO (src)]]; | |
6757 | ||
6758 | src = SET_SRC (sets[i].rtl) | |
6759 | = first >= FIRST_PSEUDO_REGISTER ? regno_reg_rtx[first] | |
6760 | : gen_rtx (REG, GET_MODE (src), first); | |
6761 | ||
6762 | /* If we had a constant that is cheaper than what we are now | |
6763 | setting SRC to, use that constant. We ignored it when we | |
6764 | thought we could make this into a no-op. */ | |
6765 | if (src_const && COST (src_const) < COST (src) | |
6766 | && validate_change (insn, &SET_SRC (sets[i].rtl), src_const, 0)) | |
6767 | src = src_const; | |
6768 | } | |
6769 | ||
6770 | /* If we made a change, recompute SRC values. */ | |
6771 | if (src != sets[i].src) | |
6772 | { | |
6773 | do_not_record = 0; | |
6774 | hash_arg_in_memory = 0; | |
6775 | hash_arg_in_struct = 0; | |
6776 | sets[i].src = src; | |
2197a88a | 6777 | sets[i].src_hash = HASH (src, mode); |
7afe21cc RK |
6778 | sets[i].src_volatile = do_not_record; |
6779 | sets[i].src_in_memory = hash_arg_in_memory; | |
6780 | sets[i].src_in_struct = hash_arg_in_struct; | |
2197a88a | 6781 | sets[i].src_elt = lookup (src, sets[i].src_hash, mode); |
7afe21cc RK |
6782 | } |
6783 | ||
6784 | /* If this is a single SET, we are setting a register, and we have an | |
6785 | equivalent constant, we want to add a REG_NOTE. We don't want | |
6786 | to write a REG_EQUAL note for a constant pseudo since verifying that | |
d45cf215 | 6787 | that pseudo hasn't been eliminated is a pain. Such a note also |
7afe21cc RK |
6788 | won't help anything. */ |
6789 | if (n_sets == 1 && src_const && GET_CODE (dest) == REG | |
6790 | && GET_CODE (src_const) != REG) | |
6791 | { | |
92f9aa51 | 6792 | tem = find_reg_note (insn, REG_EQUAL, NULL_RTX); |
7afe21cc RK |
6793 | |
6794 | /* Record the actual constant value in a REG_EQUAL note, making | |
6795 | a new one if one does not already exist. */ | |
6796 | if (tem) | |
6797 | XEXP (tem, 0) = src_const; | |
6798 | else | |
6799 | REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_EQUAL, | |
6800 | src_const, REG_NOTES (insn)); | |
6801 | ||
6802 | /* If storing a constant value in a register that | |
6803 | previously held the constant value 0, | |
6804 | record this fact with a REG_WAS_0 note on this insn. | |
6805 | ||
6806 | Note that the *register* is required to have previously held 0, | |
6807 | not just any register in the quantity and we must point to the | |
6808 | insn that set that register to zero. | |
6809 | ||
6810 | Rather than track each register individually, we just see if | |
6811 | the last set for this quantity was for this register. */ | |
6812 | ||
6813 | if (REGNO_QTY_VALID_P (REGNO (dest)) | |
6814 | && qty_const[reg_qty[REGNO (dest)]] == const0_rtx) | |
6815 | { | |
6816 | /* See if we previously had a REG_WAS_0 note. */ | |
906c4e36 | 6817 | rtx note = find_reg_note (insn, REG_WAS_0, NULL_RTX); |
7afe21cc RK |
6818 | rtx const_insn = qty_const_insn[reg_qty[REGNO (dest)]]; |
6819 | ||
6820 | if ((tem = single_set (const_insn)) != 0 | |
6821 | && rtx_equal_p (SET_DEST (tem), dest)) | |
6822 | { | |
6823 | if (note) | |
6824 | XEXP (note, 0) = const_insn; | |
6825 | else | |
6826 | REG_NOTES (insn) = gen_rtx (INSN_LIST, REG_WAS_0, | |
6827 | const_insn, REG_NOTES (insn)); | |
6828 | } | |
6829 | } | |
6830 | } | |
6831 | ||
6832 | /* Now deal with the destination. */ | |
6833 | do_not_record = 0; | |
6834 | sets[i].inner_dest_loc = &SET_DEST (sets[0].rtl); | |
6835 | ||
6836 | /* Look within any SIGN_EXTRACT or ZERO_EXTRACT | |
6837 | to the MEM or REG within it. */ | |
6838 | while (GET_CODE (dest) == SIGN_EXTRACT | |
6839 | || GET_CODE (dest) == ZERO_EXTRACT | |
6840 | || GET_CODE (dest) == SUBREG | |
6841 | || GET_CODE (dest) == STRICT_LOW_PART) | |
6842 | { | |
6843 | sets[i].inner_dest_loc = &XEXP (dest, 0); | |
6844 | dest = XEXP (dest, 0); | |
6845 | } | |
6846 | ||
6847 | sets[i].inner_dest = dest; | |
6848 | ||
6849 | if (GET_CODE (dest) == MEM) | |
6850 | { | |
6851 | dest = fold_rtx (dest, insn); | |
6852 | ||
6853 | /* Decide whether we invalidate everything in memory, | |
6854 | or just things at non-fixed places. | |
6855 | Writing a large aggregate must invalidate everything | |
6856 | because we don't know how long it is. */ | |
6857 | note_mem_written (dest, &writes_memory); | |
6858 | } | |
6859 | ||
6860 | /* Compute the hash code of the destination now, | |
6861 | before the effects of this instruction are recorded, | |
6862 | since the register values used in the address computation | |
6863 | are those before this instruction. */ | |
2197a88a | 6864 | sets[i].dest_hash = HASH (dest, mode); |
7afe21cc RK |
6865 | |
6866 | /* Don't enter a bit-field in the hash table | |
6867 | because the value in it after the store | |
6868 | may not equal what was stored, due to truncation. */ | |
6869 | ||
6870 | if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT | |
6871 | || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT) | |
6872 | { | |
6873 | rtx width = XEXP (SET_DEST (sets[i].rtl), 1); | |
6874 | ||
6875 | if (src_const != 0 && GET_CODE (src_const) == CONST_INT | |
6876 | && GET_CODE (width) == CONST_INT | |
906c4e36 RK |
6877 | && INTVAL (width) < HOST_BITS_PER_WIDE_INT |
6878 | && ! (INTVAL (src_const) | |
6879 | & ((HOST_WIDE_INT) (-1) << INTVAL (width)))) | |
7afe21cc RK |
6880 | /* Exception: if the value is constant, |
6881 | and it won't be truncated, record it. */ | |
6882 | ; | |
6883 | else | |
6884 | { | |
6885 | /* This is chosen so that the destination will be invalidated | |
6886 | but no new value will be recorded. | |
6887 | We must invalidate because sometimes constant | |
6888 | values can be recorded for bitfields. */ | |
6889 | sets[i].src_elt = 0; | |
6890 | sets[i].src_volatile = 1; | |
6891 | src_eqv = 0; | |
6892 | src_eqv_elt = 0; | |
6893 | } | |
6894 | } | |
6895 | ||
6896 | /* If only one set in a JUMP_INSN and it is now a no-op, we can delete | |
6897 | the insn. */ | |
6898 | else if (n_sets == 1 && dest == pc_rtx && src == pc_rtx) | |
6899 | { | |
6900 | PUT_CODE (insn, NOTE); | |
6901 | NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED; | |
6902 | NOTE_SOURCE_FILE (insn) = 0; | |
6903 | cse_jumps_altered = 1; | |
6904 | /* One less use of the label this insn used to jump to. */ | |
6905 | --LABEL_NUSES (JUMP_LABEL (insn)); | |
6906 | /* No more processing for this set. */ | |
6907 | sets[i].rtl = 0; | |
6908 | } | |
6909 | ||
6910 | /* If this SET is now setting PC to a label, we know it used to | |
6911 | be a conditional or computed branch. So we see if we can follow | |
6912 | it. If it was a computed branch, delete it and re-emit. */ | |
6913 | else if (dest == pc_rtx && GET_CODE (src) == LABEL_REF) | |
6914 | { | |
6915 | rtx p; | |
6916 | ||
6917 | /* If this is not in the format for a simple branch and | |
6918 | we are the only SET in it, re-emit it. */ | |
6919 | if (! simplejump_p (insn) && n_sets == 1) | |
6920 | { | |
6921 | rtx new = emit_jump_insn_before (gen_jump (XEXP (src, 0)), insn); | |
6922 | JUMP_LABEL (new) = XEXP (src, 0); | |
6923 | LABEL_NUSES (XEXP (src, 0))++; | |
6924 | delete_insn (insn); | |
6925 | insn = new; | |
6926 | } | |
31dcf83f RS |
6927 | else |
6928 | /* Otherwise, force rerecognition, since it probably had | |
6929 | a different pattern before. | |
6930 | This shouldn't really be necessary, since whatever | |
6931 | changed the source value above should have done this. | |
6932 | Until the right place is found, might as well do this here. */ | |
6933 | INSN_CODE (insn) = -1; | |
7afe21cc RK |
6934 | |
6935 | /* Now that we've converted this jump to an unconditional jump, | |
6936 | there is dead code after it. Delete the dead code until we | |
6937 | reach a BARRIER, the end of the function, or a label. Do | |
6938 | not delete NOTEs except for NOTE_INSN_DELETED since later | |
6939 | phases assume these notes are retained. */ | |
6940 | ||
6941 | p = insn; | |
6942 | ||
6943 | while (NEXT_INSN (p) != 0 | |
6944 | && GET_CODE (NEXT_INSN (p)) != BARRIER | |
6945 | && GET_CODE (NEXT_INSN (p)) != CODE_LABEL) | |
6946 | { | |
6947 | if (GET_CODE (NEXT_INSN (p)) != NOTE | |
6948 | || NOTE_LINE_NUMBER (NEXT_INSN (p)) == NOTE_INSN_DELETED) | |
6949 | delete_insn (NEXT_INSN (p)); | |
6950 | else | |
6951 | p = NEXT_INSN (p); | |
6952 | } | |
6953 | ||
6954 | /* If we don't have a BARRIER immediately after INSN, put one there. | |
6955 | Much code assumes that there are no NOTEs between a JUMP_INSN and | |
6956 | BARRIER. */ | |
6957 | ||
6958 | if (NEXT_INSN (insn) == 0 | |
6959 | || GET_CODE (NEXT_INSN (insn)) != BARRIER) | |
6960 | emit_barrier_after (insn); | |
6961 | ||
6962 | /* We might have two BARRIERs separated by notes. Delete the second | |
6963 | one if so. */ | |
6964 | ||
538b78e7 RS |
6965 | if (p != insn && NEXT_INSN (p) != 0 |
6966 | && GET_CODE (NEXT_INSN (p)) == BARRIER) | |
7afe21cc RK |
6967 | delete_insn (NEXT_INSN (p)); |
6968 | ||
6969 | cse_jumps_altered = 1; | |
6970 | sets[i].rtl = 0; | |
6971 | } | |
6972 | ||
c2a47e48 RK |
6973 | /* If destination is volatile, invalidate it and then do no further |
6974 | processing for this assignment. */ | |
7afe21cc RK |
6975 | |
6976 | else if (do_not_record) | |
c2a47e48 RK |
6977 | { |
6978 | if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG | |
6979 | || GET_CODE (dest) == MEM) | |
bb4034b3 | 6980 | invalidate (dest, VOIDmode); |
2708da92 RS |
6981 | else if (GET_CODE (dest) == STRICT_LOW_PART |
6982 | || GET_CODE (dest) == ZERO_EXTRACT) | |
bb4034b3 | 6983 | invalidate (XEXP (dest, 0), GET_MODE (dest)); |
c2a47e48 RK |
6984 | sets[i].rtl = 0; |
6985 | } | |
7afe21cc RK |
6986 | |
6987 | if (sets[i].rtl != 0 && dest != SET_DEST (sets[i].rtl)) | |
2197a88a | 6988 | sets[i].dest_hash = HASH (SET_DEST (sets[i].rtl), mode); |
7afe21cc RK |
6989 | |
6990 | #ifdef HAVE_cc0 | |
6991 | /* If setting CC0, record what it was set to, or a constant, if it | |
6992 | is equivalent to a constant. If it is being set to a floating-point | |
6993 | value, make a COMPARE with the appropriate constant of 0. If we | |
6994 | don't do this, later code can interpret this as a test against | |
6995 | const0_rtx, which can cause problems if we try to put it into an | |
6996 | insn as a floating-point operand. */ | |
6997 | if (dest == cc0_rtx) | |
6998 | { | |
6999 | this_insn_cc0 = src_const && mode != VOIDmode ? src_const : src; | |
7000 | this_insn_cc0_mode = mode; | |
cbf6a543 | 7001 | if (FLOAT_MODE_P (mode)) |
7afe21cc RK |
7002 | this_insn_cc0 = gen_rtx (COMPARE, VOIDmode, this_insn_cc0, |
7003 | CONST0_RTX (mode)); | |
7004 | } | |
7005 | #endif | |
7006 | } | |
7007 | ||
7008 | /* Now enter all non-volatile source expressions in the hash table | |
7009 | if they are not already present. | |
7010 | Record their equivalence classes in src_elt. | |
7011 | This way we can insert the corresponding destinations into | |
7012 | the same classes even if the actual sources are no longer in them | |
7013 | (having been invalidated). */ | |
7014 | ||
7015 | if (src_eqv && src_eqv_elt == 0 && sets[0].rtl != 0 && ! src_eqv_volatile | |
7016 | && ! rtx_equal_p (src_eqv, SET_DEST (sets[0].rtl))) | |
7017 | { | |
7018 | register struct table_elt *elt; | |
7019 | register struct table_elt *classp = sets[0].src_elt; | |
7020 | rtx dest = SET_DEST (sets[0].rtl); | |
7021 | enum machine_mode eqvmode = GET_MODE (dest); | |
7022 | ||
7023 | if (GET_CODE (dest) == STRICT_LOW_PART) | |
7024 | { | |
7025 | eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0))); | |
7026 | classp = 0; | |
7027 | } | |
7028 | if (insert_regs (src_eqv, classp, 0)) | |
2197a88a RK |
7029 | src_eqv_hash = HASH (src_eqv, eqvmode); |
7030 | elt = insert (src_eqv, classp, src_eqv_hash, eqvmode); | |
7afe21cc RK |
7031 | elt->in_memory = src_eqv_in_memory; |
7032 | elt->in_struct = src_eqv_in_struct; | |
7033 | src_eqv_elt = elt; | |
f7911249 JW |
7034 | |
7035 | /* Check to see if src_eqv_elt is the same as a set source which | |
7036 | does not yet have an elt, and if so set the elt of the set source | |
7037 | to src_eqv_elt. */ | |
7038 | for (i = 0; i < n_sets; i++) | |
7039 | if (sets[i].rtl && sets[i].src_elt == 0 | |
7040 | && rtx_equal_p (SET_SRC (sets[i].rtl), src_eqv)) | |
7041 | sets[i].src_elt = src_eqv_elt; | |
7afe21cc RK |
7042 | } |
7043 | ||
7044 | for (i = 0; i < n_sets; i++) | |
7045 | if (sets[i].rtl && ! sets[i].src_volatile | |
7046 | && ! rtx_equal_p (SET_SRC (sets[i].rtl), SET_DEST (sets[i].rtl))) | |
7047 | { | |
7048 | if (GET_CODE (SET_DEST (sets[i].rtl)) == STRICT_LOW_PART) | |
7049 | { | |
7050 | /* REG_EQUAL in setting a STRICT_LOW_PART | |
7051 | gives an equivalent for the entire destination register, | |
7052 | not just for the subreg being stored in now. | |
7053 | This is a more interesting equivalence, so we arrange later | |
7054 | to treat the entire reg as the destination. */ | |
7055 | sets[i].src_elt = src_eqv_elt; | |
2197a88a | 7056 | sets[i].src_hash = src_eqv_hash; |
7afe21cc RK |
7057 | } |
7058 | else | |
7059 | { | |
7060 | /* Insert source and constant equivalent into hash table, if not | |
7061 | already present. */ | |
7062 | register struct table_elt *classp = src_eqv_elt; | |
7063 | register rtx src = sets[i].src; | |
7064 | register rtx dest = SET_DEST (sets[i].rtl); | |
7065 | enum machine_mode mode | |
7066 | = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src); | |
7067 | ||
7068 | if (sets[i].src_elt == 0) | |
7069 | { | |
7070 | register struct table_elt *elt; | |
7071 | ||
7072 | /* Note that these insert_regs calls cannot remove | |
7073 | any of the src_elt's, because they would have failed to | |
7074 | match if not still valid. */ | |
7075 | if (insert_regs (src, classp, 0)) | |
2197a88a RK |
7076 | sets[i].src_hash = HASH (src, mode); |
7077 | elt = insert (src, classp, sets[i].src_hash, mode); | |
7afe21cc RK |
7078 | elt->in_memory = sets[i].src_in_memory; |
7079 | elt->in_struct = sets[i].src_in_struct; | |
7080 | sets[i].src_elt = classp = elt; | |
7081 | } | |
7082 | ||
7083 | if (sets[i].src_const && sets[i].src_const_elt == 0 | |
7084 | && src != sets[i].src_const | |
7085 | && ! rtx_equal_p (sets[i].src_const, src)) | |
7086 | sets[i].src_elt = insert (sets[i].src_const, classp, | |
2197a88a | 7087 | sets[i].src_const_hash, mode); |
7afe21cc RK |
7088 | } |
7089 | } | |
7090 | else if (sets[i].src_elt == 0) | |
7091 | /* If we did not insert the source into the hash table (e.g., it was | |
7092 | volatile), note the equivalence class for the REG_EQUAL value, if any, | |
7093 | so that the destination goes into that class. */ | |
7094 | sets[i].src_elt = src_eqv_elt; | |
7095 | ||
7096 | invalidate_from_clobbers (&writes_memory, x); | |
77fa0940 RK |
7097 | |
7098 | /* Some registers are invalidated by subroutine calls. Memory is | |
7099 | invalidated by non-constant calls. */ | |
7100 | ||
7afe21cc RK |
7101 | if (GET_CODE (insn) == CALL_INSN) |
7102 | { | |
7103 | static struct write_data everything = {0, 1, 1, 1}; | |
77fa0940 RK |
7104 | |
7105 | if (! CONST_CALL_P (insn)) | |
7106 | invalidate_memory (&everything); | |
7afe21cc RK |
7107 | invalidate_for_call (); |
7108 | } | |
7109 | ||
7110 | /* Now invalidate everything set by this instruction. | |
7111 | If a SUBREG or other funny destination is being set, | |
7112 | sets[i].rtl is still nonzero, so here we invalidate the reg | |
7113 | a part of which is being set. */ | |
7114 | ||
7115 | for (i = 0; i < n_sets; i++) | |
7116 | if (sets[i].rtl) | |
7117 | { | |
bb4034b3 JW |
7118 | /* We can't use the inner dest, because the mode associated with |
7119 | a ZERO_EXTRACT is significant. */ | |
7120 | register rtx dest = SET_DEST (sets[i].rtl); | |
7afe21cc RK |
7121 | |
7122 | /* Needed for registers to remove the register from its | |
7123 | previous quantity's chain. | |
7124 | Needed for memory if this is a nonvarying address, unless | |
7125 | we have just done an invalidate_memory that covers even those. */ | |
7126 | if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG | |
bb4034b3 JW |
7127 | || (GET_CODE (dest) == MEM && ! writes_memory.all |
7128 | && ! cse_rtx_addr_varies_p (dest))) | |
7129 | invalidate (dest, VOIDmode); | |
2708da92 RS |
7130 | else if (GET_CODE (dest) == STRICT_LOW_PART |
7131 | || GET_CODE (dest) == ZERO_EXTRACT) | |
bb4034b3 | 7132 | invalidate (XEXP (dest, 0), GET_MODE (dest)); |
7afe21cc RK |
7133 | } |
7134 | ||
7135 | /* Make sure registers mentioned in destinations | |
7136 | are safe for use in an expression to be inserted. | |
7137 | This removes from the hash table | |
7138 | any invalid entry that refers to one of these registers. | |
7139 | ||
7140 | We don't care about the return value from mention_regs because | |
7141 | we are going to hash the SET_DEST values unconditionally. */ | |
7142 | ||
7143 | for (i = 0; i < n_sets; i++) | |
7144 | if (sets[i].rtl && GET_CODE (SET_DEST (sets[i].rtl)) != REG) | |
7145 | mention_regs (SET_DEST (sets[i].rtl)); | |
7146 | ||
7147 | /* We may have just removed some of the src_elt's from the hash table. | |
7148 | So replace each one with the current head of the same class. */ | |
7149 | ||
7150 | for (i = 0; i < n_sets; i++) | |
7151 | if (sets[i].rtl) | |
7152 | { | |
7153 | if (sets[i].src_elt && sets[i].src_elt->first_same_value == 0) | |
7154 | /* If elt was removed, find current head of same class, | |
7155 | or 0 if nothing remains of that class. */ | |
7156 | { | |
7157 | register struct table_elt *elt = sets[i].src_elt; | |
7158 | ||
7159 | while (elt && elt->prev_same_value) | |
7160 | elt = elt->prev_same_value; | |
7161 | ||
7162 | while (elt && elt->first_same_value == 0) | |
7163 | elt = elt->next_same_value; | |
7164 | sets[i].src_elt = elt ? elt->first_same_value : 0; | |
7165 | } | |
7166 | } | |
7167 | ||
7168 | /* Now insert the destinations into their equivalence classes. */ | |
7169 | ||
7170 | for (i = 0; i < n_sets; i++) | |
7171 | if (sets[i].rtl) | |
7172 | { | |
7173 | register rtx dest = SET_DEST (sets[i].rtl); | |
7174 | register struct table_elt *elt; | |
7175 | ||
7176 | /* Don't record value if we are not supposed to risk allocating | |
7177 | floating-point values in registers that might be wider than | |
7178 | memory. */ | |
7179 | if ((flag_float_store | |
7180 | && GET_CODE (dest) == MEM | |
cbf6a543 | 7181 | && FLOAT_MODE_P (GET_MODE (dest))) |
7afe21cc RK |
7182 | /* Don't record values of destinations set inside a libcall block |
7183 | since we might delete the libcall. Things should have been set | |
7184 | up so we won't want to reuse such a value, but we play it safe | |
7185 | here. */ | |
7186 | || in_libcall_block | |
7187 | /* If we didn't put a REG_EQUAL value or a source into the hash | |
7188 | table, there is no point is recording DEST. */ | |
7189 | || sets[i].src_elt == 0) | |
7190 | continue; | |
7191 | ||
7192 | /* STRICT_LOW_PART isn't part of the value BEING set, | |
7193 | and neither is the SUBREG inside it. | |
7194 | Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */ | |
7195 | if (GET_CODE (dest) == STRICT_LOW_PART) | |
7196 | dest = SUBREG_REG (XEXP (dest, 0)); | |
7197 | ||
c610adec | 7198 | if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG) |
7afe21cc RK |
7199 | /* Registers must also be inserted into chains for quantities. */ |
7200 | if (insert_regs (dest, sets[i].src_elt, 1)) | |
7201 | /* If `insert_regs' changes something, the hash code must be | |
7202 | recalculated. */ | |
2197a88a | 7203 | sets[i].dest_hash = HASH (dest, GET_MODE (dest)); |
7afe21cc RK |
7204 | |
7205 | elt = insert (dest, sets[i].src_elt, | |
2197a88a | 7206 | sets[i].dest_hash, GET_MODE (dest)); |
7afe21cc RK |
7207 | elt->in_memory = GET_CODE (sets[i].inner_dest) == MEM; |
7208 | if (elt->in_memory) | |
7209 | { | |
7210 | /* This implicitly assumes a whole struct | |
7211 | need not have MEM_IN_STRUCT_P. | |
7212 | But a whole struct is *supposed* to have MEM_IN_STRUCT_P. */ | |
7213 | elt->in_struct = (MEM_IN_STRUCT_P (sets[i].inner_dest) | |
7214 | || sets[i].inner_dest != SET_DEST (sets[i].rtl)); | |
7215 | } | |
7216 | ||
fc3ffe83 RK |
7217 | /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no |
7218 | narrower than M2, and both M1 and M2 are the same number of words, | |
7219 | we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so | |
7220 | make that equivalence as well. | |
7afe21cc RK |
7221 | |
7222 | However, BAR may have equivalences for which gen_lowpart_if_possible | |
7223 | will produce a simpler value than gen_lowpart_if_possible applied to | |
7224 | BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all | |
7225 | BAR's equivalences. If we don't get a simplified form, make | |
7226 | the SUBREG. It will not be used in an equivalence, but will | |
7227 | cause two similar assignments to be detected. | |
7228 | ||
7229 | Note the loop below will find SUBREG_REG (DEST) since we have | |
7230 | already entered SRC and DEST of the SET in the table. */ | |
7231 | ||
7232 | if (GET_CODE (dest) == SUBREG | |
6cdbaec4 RK |
7233 | && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) - 1) |
7234 | / UNITS_PER_WORD) | |
7235 | == (GET_MODE_SIZE (GET_MODE (dest)) - 1)/ UNITS_PER_WORD) | |
7afe21cc RK |
7236 | && (GET_MODE_SIZE (GET_MODE (dest)) |
7237 | >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest)))) | |
7238 | && sets[i].src_elt != 0) | |
7239 | { | |
7240 | enum machine_mode new_mode = GET_MODE (SUBREG_REG (dest)); | |
7241 | struct table_elt *elt, *classp = 0; | |
7242 | ||
7243 | for (elt = sets[i].src_elt->first_same_value; elt; | |
7244 | elt = elt->next_same_value) | |
7245 | { | |
7246 | rtx new_src = 0; | |
2197a88a | 7247 | unsigned src_hash; |
7afe21cc RK |
7248 | struct table_elt *src_elt; |
7249 | ||
7250 | /* Ignore invalid entries. */ | |
7251 | if (GET_CODE (elt->exp) != REG | |
7252 | && ! exp_equiv_p (elt->exp, elt->exp, 1, 0)) | |
7253 | continue; | |
7254 | ||
7255 | new_src = gen_lowpart_if_possible (new_mode, elt->exp); | |
7256 | if (new_src == 0) | |
7257 | new_src = gen_rtx (SUBREG, new_mode, elt->exp, 0); | |
7258 | ||
7259 | src_hash = HASH (new_src, new_mode); | |
7260 | src_elt = lookup (new_src, src_hash, new_mode); | |
7261 | ||
7262 | /* Put the new source in the hash table is if isn't | |
7263 | already. */ | |
7264 | if (src_elt == 0) | |
7265 | { | |
7266 | if (insert_regs (new_src, classp, 0)) | |
7267 | src_hash = HASH (new_src, new_mode); | |
7268 | src_elt = insert (new_src, classp, src_hash, new_mode); | |
7269 | src_elt->in_memory = elt->in_memory; | |
7270 | src_elt->in_struct = elt->in_struct; | |
7271 | } | |
7272 | else if (classp && classp != src_elt->first_same_value) | |
7273 | /* Show that two things that we've seen before are | |
7274 | actually the same. */ | |
7275 | merge_equiv_classes (src_elt, classp); | |
7276 | ||
7277 | classp = src_elt->first_same_value; | |
7278 | } | |
7279 | } | |
7280 | } | |
7281 | ||
7282 | /* Special handling for (set REG0 REG1) | |
7283 | where REG0 is the "cheapest", cheaper than REG1. | |
7284 | After cse, REG1 will probably not be used in the sequel, | |
7285 | so (if easily done) change this insn to (set REG1 REG0) and | |
7286 | replace REG1 with REG0 in the previous insn that computed their value. | |
7287 | Then REG1 will become a dead store and won't cloud the situation | |
7288 | for later optimizations. | |
7289 | ||
7290 | Do not make this change if REG1 is a hard register, because it will | |
7291 | then be used in the sequel and we may be changing a two-operand insn | |
7292 | into a three-operand insn. | |
7293 | ||
7294 | Also do not do this if we are operating on a copy of INSN. */ | |
7295 | ||
7296 | if (n_sets == 1 && sets[0].rtl && GET_CODE (SET_DEST (sets[0].rtl)) == REG | |
7297 | && NEXT_INSN (PREV_INSN (insn)) == insn | |
7298 | && GET_CODE (SET_SRC (sets[0].rtl)) == REG | |
7299 | && REGNO (SET_SRC (sets[0].rtl)) >= FIRST_PSEUDO_REGISTER | |
7300 | && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets[0].rtl))) | |
7301 | && (qty_first_reg[reg_qty[REGNO (SET_SRC (sets[0].rtl))]] | |
7302 | == REGNO (SET_DEST (sets[0].rtl)))) | |
7303 | { | |
7304 | rtx prev = PREV_INSN (insn); | |
7305 | while (prev && GET_CODE (prev) == NOTE) | |
7306 | prev = PREV_INSN (prev); | |
7307 | ||
7308 | if (prev && GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SET | |
7309 | && SET_DEST (PATTERN (prev)) == SET_SRC (sets[0].rtl)) | |
7310 | { | |
7311 | rtx dest = SET_DEST (sets[0].rtl); | |
906c4e36 | 7312 | rtx note = find_reg_note (prev, REG_EQUIV, NULL_RTX); |
7afe21cc RK |
7313 | |
7314 | validate_change (prev, & SET_DEST (PATTERN (prev)), dest, 1); | |
7315 | validate_change (insn, & SET_DEST (sets[0].rtl), | |
7316 | SET_SRC (sets[0].rtl), 1); | |
7317 | validate_change (insn, & SET_SRC (sets[0].rtl), dest, 1); | |
7318 | apply_change_group (); | |
7319 | ||
7320 | /* If REG1 was equivalent to a constant, REG0 is not. */ | |
7321 | if (note) | |
7322 | PUT_REG_NOTE_KIND (note, REG_EQUAL); | |
7323 | ||
7324 | /* If there was a REG_WAS_0 note on PREV, remove it. Move | |
7325 | any REG_WAS_0 note on INSN to PREV. */ | |
906c4e36 | 7326 | note = find_reg_note (prev, REG_WAS_0, NULL_RTX); |
7afe21cc RK |
7327 | if (note) |
7328 | remove_note (prev, note); | |
7329 | ||
906c4e36 | 7330 | note = find_reg_note (insn, REG_WAS_0, NULL_RTX); |
7afe21cc RK |
7331 | if (note) |
7332 | { | |
7333 | remove_note (insn, note); | |
7334 | XEXP (note, 1) = REG_NOTES (prev); | |
7335 | REG_NOTES (prev) = note; | |
7336 | } | |
7337 | } | |
7338 | } | |
7339 | ||
7340 | /* If this is a conditional jump insn, record any known equivalences due to | |
7341 | the condition being tested. */ | |
7342 | ||
7343 | last_jump_equiv_class = 0; | |
7344 | if (GET_CODE (insn) == JUMP_INSN | |
7345 | && n_sets == 1 && GET_CODE (x) == SET | |
7346 | && GET_CODE (SET_SRC (x)) == IF_THEN_ELSE) | |
7347 | record_jump_equiv (insn, 0); | |
7348 | ||
7349 | #ifdef HAVE_cc0 | |
7350 | /* If the previous insn set CC0 and this insn no longer references CC0, | |
7351 | delete the previous insn. Here we use the fact that nothing expects CC0 | |
7352 | to be valid over an insn, which is true until the final pass. */ | |
7353 | if (prev_insn && GET_CODE (prev_insn) == INSN | |
7354 | && (tem = single_set (prev_insn)) != 0 | |
7355 | && SET_DEST (tem) == cc0_rtx | |
7356 | && ! reg_mentioned_p (cc0_rtx, x)) | |
7357 | { | |
7358 | PUT_CODE (prev_insn, NOTE); | |
7359 | NOTE_LINE_NUMBER (prev_insn) = NOTE_INSN_DELETED; | |
7360 | NOTE_SOURCE_FILE (prev_insn) = 0; | |
7361 | } | |
7362 | ||
7363 | prev_insn_cc0 = this_insn_cc0; | |
7364 | prev_insn_cc0_mode = this_insn_cc0_mode; | |
7365 | #endif | |
7366 | ||
7367 | prev_insn = insn; | |
7368 | } | |
7369 | \f | |
7370 | /* Store 1 in *WRITES_PTR for those categories of memory ref | |
7371 | that must be invalidated when the expression WRITTEN is stored in. | |
7372 | If WRITTEN is null, say everything must be invalidated. */ | |
7373 | ||
7374 | static void | |
7375 | note_mem_written (written, writes_ptr) | |
7376 | rtx written; | |
7377 | struct write_data *writes_ptr; | |
7378 | { | |
7379 | static struct write_data everything = {0, 1, 1, 1}; | |
7380 | ||
7381 | if (written == 0) | |
7382 | *writes_ptr = everything; | |
7383 | else if (GET_CODE (written) == MEM) | |
7384 | { | |
7385 | /* Pushing or popping the stack invalidates just the stack pointer. */ | |
7386 | rtx addr = XEXP (written, 0); | |
7387 | if ((GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC | |
7388 | || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC) | |
7389 | && GET_CODE (XEXP (addr, 0)) == REG | |
7390 | && REGNO (XEXP (addr, 0)) == STACK_POINTER_REGNUM) | |
7391 | { | |
7392 | writes_ptr->sp = 1; | |
7393 | return; | |
7394 | } | |
7395 | else if (GET_MODE (written) == BLKmode) | |
7396 | *writes_ptr = everything; | |
76fb0b60 RS |
7397 | /* (mem (scratch)) means clobber everything. */ |
7398 | else if (GET_CODE (addr) == SCRATCH) | |
7399 | *writes_ptr = everything; | |
7afe21cc RK |
7400 | else if (cse_rtx_addr_varies_p (written)) |
7401 | { | |
7402 | /* A varying address that is a sum indicates an array element, | |
7403 | and that's just as good as a structure element | |
2d08d5b6 JW |
7404 | in implying that we need not invalidate scalar variables. |
7405 | However, we must allow QImode aliasing of scalars, because the | |
7406 | ANSI C standard allows character pointers to alias anything. */ | |
7407 | if (! ((MEM_IN_STRUCT_P (written) | |
7408 | || GET_CODE (XEXP (written, 0)) == PLUS) | |
7409 | && GET_MODE (written) != QImode)) | |
7afe21cc RK |
7410 | writes_ptr->all = 1; |
7411 | writes_ptr->nonscalar = 1; | |
7412 | } | |
7413 | writes_ptr->var = 1; | |
7414 | } | |
7415 | } | |
7416 | ||
7417 | /* Perform invalidation on the basis of everything about an insn | |
7418 | except for invalidating the actual places that are SET in it. | |
7419 | This includes the places CLOBBERed, and anything that might | |
7420 | alias with something that is SET or CLOBBERed. | |
7421 | ||
7422 | W points to the writes_memory for this insn, a struct write_data | |
7423 | saying which kinds of memory references must be invalidated. | |
7424 | X is the pattern of the insn. */ | |
7425 | ||
7426 | static void | |
7427 | invalidate_from_clobbers (w, x) | |
7428 | struct write_data *w; | |
7429 | rtx x; | |
7430 | { | |
7431 | /* If W->var is not set, W specifies no action. | |
7432 | If W->all is set, this step gets all memory refs | |
7433 | so they can be ignored in the rest of this function. */ | |
7434 | if (w->var) | |
7435 | invalidate_memory (w); | |
7436 | ||
7437 | if (w->sp) | |
7438 | { | |
7439 | if (reg_tick[STACK_POINTER_REGNUM] >= 0) | |
7440 | reg_tick[STACK_POINTER_REGNUM]++; | |
7441 | ||
7442 | /* This should be *very* rare. */ | |
7443 | if (TEST_HARD_REG_BIT (hard_regs_in_table, STACK_POINTER_REGNUM)) | |
bb4034b3 | 7444 | invalidate (stack_pointer_rtx, VOIDmode); |
7afe21cc RK |
7445 | } |
7446 | ||
7447 | if (GET_CODE (x) == CLOBBER) | |
7448 | { | |
7449 | rtx ref = XEXP (x, 0); | |
2708da92 RS |
7450 | if (ref) |
7451 | { | |
7452 | if (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG | |
7453 | || (GET_CODE (ref) == MEM && ! w->all)) | |
bb4034b3 | 7454 | invalidate (ref, VOIDmode); |
2708da92 RS |
7455 | else if (GET_CODE (ref) == STRICT_LOW_PART |
7456 | || GET_CODE (ref) == ZERO_EXTRACT) | |
bb4034b3 | 7457 | invalidate (XEXP (ref, 0), GET_MODE (ref)); |
2708da92 | 7458 | } |
7afe21cc RK |
7459 | } |
7460 | else if (GET_CODE (x) == PARALLEL) | |
7461 | { | |
7462 | register int i; | |
7463 | for (i = XVECLEN (x, 0) - 1; i >= 0; i--) | |
7464 | { | |
7465 | register rtx y = XVECEXP (x, 0, i); | |
7466 | if (GET_CODE (y) == CLOBBER) | |
7467 | { | |
7468 | rtx ref = XEXP (y, 0); | |
2708da92 RS |
7469 | if (ref) |
7470 | { | |
7471 | if (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG | |
7472 | || (GET_CODE (ref) == MEM && !w->all)) | |
bb4034b3 | 7473 | invalidate (ref, VOIDmode); |
2708da92 RS |
7474 | else if (GET_CODE (ref) == STRICT_LOW_PART |
7475 | || GET_CODE (ref) == ZERO_EXTRACT) | |
bb4034b3 | 7476 | invalidate (XEXP (ref, 0), GET_MODE (ref)); |
2708da92 | 7477 | } |
7afe21cc RK |
7478 | } |
7479 | } | |
7480 | } | |
7481 | } | |
7482 | \f | |
7483 | /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes | |
7484 | and replace any registers in them with either an equivalent constant | |
7485 | or the canonical form of the register. If we are inside an address, | |
7486 | only do this if the address remains valid. | |
7487 | ||
7488 | OBJECT is 0 except when within a MEM in which case it is the MEM. | |
7489 | ||
7490 | Return the replacement for X. */ | |
7491 | ||
7492 | static rtx | |
7493 | cse_process_notes (x, object) | |
7494 | rtx x; | |
7495 | rtx object; | |
7496 | { | |
7497 | enum rtx_code code = GET_CODE (x); | |
7498 | char *fmt = GET_RTX_FORMAT (code); | |
7afe21cc RK |
7499 | int i; |
7500 | ||
7501 | switch (code) | |
7502 | { | |
7503 | case CONST_INT: | |
7504 | case CONST: | |
7505 | case SYMBOL_REF: | |
7506 | case LABEL_REF: | |
7507 | case CONST_DOUBLE: | |
7508 | case PC: | |
7509 | case CC0: | |
7510 | case LO_SUM: | |
7511 | return x; | |
7512 | ||
7513 | case MEM: | |
7514 | XEXP (x, 0) = cse_process_notes (XEXP (x, 0), x); | |
7515 | return x; | |
7516 | ||
7517 | case EXPR_LIST: | |
7518 | case INSN_LIST: | |
7519 | if (REG_NOTE_KIND (x) == REG_EQUAL) | |
906c4e36 | 7520 | XEXP (x, 0) = cse_process_notes (XEXP (x, 0), NULL_RTX); |
7afe21cc | 7521 | if (XEXP (x, 1)) |
906c4e36 | 7522 | XEXP (x, 1) = cse_process_notes (XEXP (x, 1), NULL_RTX); |
7afe21cc RK |
7523 | return x; |
7524 | ||
e4890d45 RS |
7525 | case SIGN_EXTEND: |
7526 | case ZERO_EXTEND: | |
7527 | { | |
7528 | rtx new = cse_process_notes (XEXP (x, 0), object); | |
7529 | /* We don't substitute VOIDmode constants into these rtx, | |
7530 | since they would impede folding. */ | |
7531 | if (GET_MODE (new) != VOIDmode) | |
7532 | validate_change (object, &XEXP (x, 0), new, 0); | |
7533 | return x; | |
7534 | } | |
7535 | ||
7afe21cc RK |
7536 | case REG: |
7537 | i = reg_qty[REGNO (x)]; | |
7538 | ||
7539 | /* Return a constant or a constant register. */ | |
7540 | if (REGNO_QTY_VALID_P (REGNO (x)) | |
7541 | && qty_const[i] != 0 | |
7542 | && (CONSTANT_P (qty_const[i]) | |
7543 | || GET_CODE (qty_const[i]) == REG)) | |
7544 | { | |
7545 | rtx new = gen_lowpart_if_possible (GET_MODE (x), qty_const[i]); | |
7546 | if (new) | |
7547 | return new; | |
7548 | } | |
7549 | ||
7550 | /* Otherwise, canonicalize this register. */ | |
906c4e36 | 7551 | return canon_reg (x, NULL_RTX); |
7afe21cc RK |
7552 | } |
7553 | ||
7554 | for (i = 0; i < GET_RTX_LENGTH (code); i++) | |
7555 | if (fmt[i] == 'e') | |
7556 | validate_change (object, &XEXP (x, i), | |
7fe34fdf | 7557 | cse_process_notes (XEXP (x, i), object), 0); |
7afe21cc RK |
7558 | |
7559 | return x; | |
7560 | } | |
7561 | \f | |
7562 | /* Find common subexpressions between the end test of a loop and the beginning | |
7563 | of the loop. LOOP_START is the CODE_LABEL at the start of a loop. | |
7564 | ||
7565 | Often we have a loop where an expression in the exit test is used | |
7566 | in the body of the loop. For example "while (*p) *q++ = *p++;". | |
7567 | Because of the way we duplicate the loop exit test in front of the loop, | |
7568 | however, we don't detect that common subexpression. This will be caught | |
7569 | when global cse is implemented, but this is a quite common case. | |
7570 | ||
7571 | This function handles the most common cases of these common expressions. | |
7572 | It is called after we have processed the basic block ending with the | |
7573 | NOTE_INSN_LOOP_END note that ends a loop and the previous JUMP_INSN | |
7574 | jumps to a label used only once. */ | |
7575 | ||
7576 | static void | |
7577 | cse_around_loop (loop_start) | |
7578 | rtx loop_start; | |
7579 | { | |
7580 | rtx insn; | |
7581 | int i; | |
7582 | struct table_elt *p; | |
7583 | ||
7584 | /* If the jump at the end of the loop doesn't go to the start, we don't | |
7585 | do anything. */ | |
7586 | for (insn = PREV_INSN (loop_start); | |
7587 | insn && (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) >= 0); | |
7588 | insn = PREV_INSN (insn)) | |
7589 | ; | |
7590 | ||
7591 | if (insn == 0 | |
7592 | || GET_CODE (insn) != NOTE | |
7593 | || NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG) | |
7594 | return; | |
7595 | ||
7596 | /* If the last insn of the loop (the end test) was an NE comparison, | |
7597 | we will interpret it as an EQ comparison, since we fell through | |
f72aed24 | 7598 | the loop. Any equivalences resulting from that comparison are |
7afe21cc RK |
7599 | therefore not valid and must be invalidated. */ |
7600 | if (last_jump_equiv_class) | |
7601 | for (p = last_jump_equiv_class->first_same_value; p; | |
7602 | p = p->next_same_value) | |
7603 | if (GET_CODE (p->exp) == MEM || GET_CODE (p->exp) == REG | |
f1636e8a RK |
7604 | || (GET_CODE (p->exp) == SUBREG |
7605 | && GET_CODE (SUBREG_REG (p->exp)) == REG)) | |
bb4034b3 | 7606 | invalidate (p->exp, VOIDmode); |
2708da92 RS |
7607 | else if (GET_CODE (p->exp) == STRICT_LOW_PART |
7608 | || GET_CODE (p->exp) == ZERO_EXTRACT) | |
bb4034b3 | 7609 | invalidate (XEXP (p->exp, 0), GET_MODE (p->exp)); |
7afe21cc RK |
7610 | |
7611 | /* Process insns starting after LOOP_START until we hit a CALL_INSN or | |
7612 | a CODE_LABEL (we could handle a CALL_INSN, but it isn't worth it). | |
7613 | ||
7614 | The only thing we do with SET_DEST is invalidate entries, so we | |
7615 | can safely process each SET in order. It is slightly less efficient | |
7616 | to do so, but we only want to handle the most common cases. */ | |
7617 | ||
7618 | for (insn = NEXT_INSN (loop_start); | |
7619 | GET_CODE (insn) != CALL_INSN && GET_CODE (insn) != CODE_LABEL | |
7620 | && ! (GET_CODE (insn) == NOTE | |
7621 | && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END); | |
7622 | insn = NEXT_INSN (insn)) | |
7623 | { | |
7624 | if (GET_RTX_CLASS (GET_CODE (insn)) == 'i' | |
7625 | && (GET_CODE (PATTERN (insn)) == SET | |
7626 | || GET_CODE (PATTERN (insn)) == CLOBBER)) | |
7627 | cse_set_around_loop (PATTERN (insn), insn, loop_start); | |
7628 | else if (GET_RTX_CLASS (GET_CODE (insn)) == 'i' | |
7629 | && GET_CODE (PATTERN (insn)) == PARALLEL) | |
7630 | for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--) | |
7631 | if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == SET | |
7632 | || GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == CLOBBER) | |
7633 | cse_set_around_loop (XVECEXP (PATTERN (insn), 0, i), insn, | |
7634 | loop_start); | |
7635 | } | |
7636 | } | |
7637 | \f | |
8b3686ed RK |
7638 | /* Variable used for communications between the next two routines. */ |
7639 | ||
7640 | static struct write_data skipped_writes_memory; | |
7641 | ||
7642 | /* Process one SET of an insn that was skipped. We ignore CLOBBERs | |
7643 | since they are done elsewhere. This function is called via note_stores. */ | |
7644 | ||
7645 | static void | |
7646 | invalidate_skipped_set (dest, set) | |
7647 | rtx set; | |
7648 | rtx dest; | |
7649 | { | |
7650 | if (GET_CODE (set) == CLOBBER | |
7651 | #ifdef HAVE_cc0 | |
7652 | || dest == cc0_rtx | |
7653 | #endif | |
7654 | || dest == pc_rtx) | |
7655 | return; | |
7656 | ||
7657 | if (GET_CODE (dest) == MEM) | |
7658 | note_mem_written (dest, &skipped_writes_memory); | |
7659 | ||
ffcf6393 RS |
7660 | /* There are times when an address can appear varying and be a PLUS |
7661 | during this scan when it would be a fixed address were we to know | |
7662 | the proper equivalences. So promote "nonscalar" to be "all". */ | |
7663 | if (skipped_writes_memory.nonscalar) | |
7664 | skipped_writes_memory.all = 1; | |
7665 | ||
8b3686ed RK |
7666 | if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG |
7667 | || (! skipped_writes_memory.all && ! cse_rtx_addr_varies_p (dest))) | |
bb4034b3 | 7668 | invalidate (dest, VOIDmode); |
2708da92 RS |
7669 | else if (GET_CODE (dest) == STRICT_LOW_PART |
7670 | || GET_CODE (dest) == ZERO_EXTRACT) | |
bb4034b3 | 7671 | invalidate (XEXP (dest, 0), GET_MODE (dest)); |
8b3686ed RK |
7672 | } |
7673 | ||
7674 | /* Invalidate all insns from START up to the end of the function or the | |
7675 | next label. This called when we wish to CSE around a block that is | |
7676 | conditionally executed. */ | |
7677 | ||
7678 | static void | |
7679 | invalidate_skipped_block (start) | |
7680 | rtx start; | |
7681 | { | |
7682 | rtx insn; | |
8b3686ed RK |
7683 | static struct write_data init = {0, 0, 0, 0}; |
7684 | static struct write_data everything = {0, 1, 1, 1}; | |
7685 | ||
7686 | for (insn = start; insn && GET_CODE (insn) != CODE_LABEL; | |
7687 | insn = NEXT_INSN (insn)) | |
7688 | { | |
7689 | if (GET_RTX_CLASS (GET_CODE (insn)) != 'i') | |
7690 | continue; | |
7691 | ||
7692 | skipped_writes_memory = init; | |
7693 | ||
7694 | if (GET_CODE (insn) == CALL_INSN) | |
7695 | { | |
7696 | invalidate_for_call (); | |
7697 | skipped_writes_memory = everything; | |
7698 | } | |
7699 | ||
7700 | note_stores (PATTERN (insn), invalidate_skipped_set); | |
7701 | invalidate_from_clobbers (&skipped_writes_memory, PATTERN (insn)); | |
7702 | } | |
7703 | } | |
7704 | \f | |
7afe21cc RK |
7705 | /* Used for communication between the following two routines; contains a |
7706 | value to be checked for modification. */ | |
7707 | ||
7708 | static rtx cse_check_loop_start_value; | |
7709 | ||
7710 | /* If modifying X will modify the value in CSE_CHECK_LOOP_START_VALUE, | |
7711 | indicate that fact by setting CSE_CHECK_LOOP_START_VALUE to 0. */ | |
7712 | ||
7713 | static void | |
7714 | cse_check_loop_start (x, set) | |
7715 | rtx x; | |
7716 | rtx set; | |
7717 | { | |
7718 | if (cse_check_loop_start_value == 0 | |
7719 | || GET_CODE (x) == CC0 || GET_CODE (x) == PC) | |
7720 | return; | |
7721 | ||
7722 | if ((GET_CODE (x) == MEM && GET_CODE (cse_check_loop_start_value) == MEM) | |
7723 | || reg_overlap_mentioned_p (x, cse_check_loop_start_value)) | |
7724 | cse_check_loop_start_value = 0; | |
7725 | } | |
7726 | ||
7727 | /* X is a SET or CLOBBER contained in INSN that was found near the start of | |
7728 | a loop that starts with the label at LOOP_START. | |
7729 | ||
7730 | If X is a SET, we see if its SET_SRC is currently in our hash table. | |
7731 | If so, we see if it has a value equal to some register used only in the | |
7732 | loop exit code (as marked by jump.c). | |
7733 | ||
7734 | If those two conditions are true, we search backwards from the start of | |
7735 | the loop to see if that same value was loaded into a register that still | |
7736 | retains its value at the start of the loop. | |
7737 | ||
7738 | If so, we insert an insn after the load to copy the destination of that | |
7739 | load into the equivalent register and (try to) replace our SET_SRC with that | |
7740 | register. | |
7741 | ||
7742 | In any event, we invalidate whatever this SET or CLOBBER modifies. */ | |
7743 | ||
7744 | static void | |
7745 | cse_set_around_loop (x, insn, loop_start) | |
7746 | rtx x; | |
7747 | rtx insn; | |
7748 | rtx loop_start; | |
7749 | { | |
7afe21cc RK |
7750 | struct table_elt *src_elt; |
7751 | static struct write_data init = {0, 0, 0, 0}; | |
7752 | struct write_data writes_memory; | |
7753 | ||
7754 | writes_memory = init; | |
7755 | ||
7756 | /* If this is a SET, see if we can replace SET_SRC, but ignore SETs that | |
7757 | are setting PC or CC0 or whose SET_SRC is already a register. */ | |
7758 | if (GET_CODE (x) == SET | |
7759 | && GET_CODE (SET_DEST (x)) != PC && GET_CODE (SET_DEST (x)) != CC0 | |
7760 | && GET_CODE (SET_SRC (x)) != REG) | |
7761 | { | |
7762 | src_elt = lookup (SET_SRC (x), | |
7763 | HASH (SET_SRC (x), GET_MODE (SET_DEST (x))), | |
7764 | GET_MODE (SET_DEST (x))); | |
7765 | ||
7766 | if (src_elt) | |
7767 | for (src_elt = src_elt->first_same_value; src_elt; | |
7768 | src_elt = src_elt->next_same_value) | |
7769 | if (GET_CODE (src_elt->exp) == REG && REG_LOOP_TEST_P (src_elt->exp) | |
7770 | && COST (src_elt->exp) < COST (SET_SRC (x))) | |
7771 | { | |
7772 | rtx p, set; | |
7773 | ||
7774 | /* Look for an insn in front of LOOP_START that sets | |
7775 | something in the desired mode to SET_SRC (x) before we hit | |
7776 | a label or CALL_INSN. */ | |
7777 | ||
7778 | for (p = prev_nonnote_insn (loop_start); | |
7779 | p && GET_CODE (p) != CALL_INSN | |
7780 | && GET_CODE (p) != CODE_LABEL; | |
7781 | p = prev_nonnote_insn (p)) | |
7782 | if ((set = single_set (p)) != 0 | |
7783 | && GET_CODE (SET_DEST (set)) == REG | |
7784 | && GET_MODE (SET_DEST (set)) == src_elt->mode | |
7785 | && rtx_equal_p (SET_SRC (set), SET_SRC (x))) | |
7786 | { | |
7787 | /* We now have to ensure that nothing between P | |
7788 | and LOOP_START modified anything referenced in | |
7789 | SET_SRC (x). We know that nothing within the loop | |
7790 | can modify it, or we would have invalidated it in | |
7791 | the hash table. */ | |
7792 | rtx q; | |
7793 | ||
7794 | cse_check_loop_start_value = SET_SRC (x); | |
7795 | for (q = p; q != loop_start; q = NEXT_INSN (q)) | |
7796 | if (GET_RTX_CLASS (GET_CODE (q)) == 'i') | |
7797 | note_stores (PATTERN (q), cse_check_loop_start); | |
7798 | ||
7799 | /* If nothing was changed and we can replace our | |
7800 | SET_SRC, add an insn after P to copy its destination | |
7801 | to what we will be replacing SET_SRC with. */ | |
7802 | if (cse_check_loop_start_value | |
7803 | && validate_change (insn, &SET_SRC (x), | |
7804 | src_elt->exp, 0)) | |
7805 | emit_insn_after (gen_move_insn (src_elt->exp, | |
7806 | SET_DEST (set)), | |
7807 | p); | |
7808 | break; | |
7809 | } | |
7810 | } | |
7811 | } | |
7812 | ||
7813 | /* Now invalidate anything modified by X. */ | |
7814 | note_mem_written (SET_DEST (x), &writes_memory); | |
7815 | ||
7816 | if (writes_memory.var) | |
7817 | invalidate_memory (&writes_memory); | |
7818 | ||
7819 | /* See comment on similar code in cse_insn for explanation of these tests. */ | |
7820 | if (GET_CODE (SET_DEST (x)) == REG || GET_CODE (SET_DEST (x)) == SUBREG | |
7821 | || (GET_CODE (SET_DEST (x)) == MEM && ! writes_memory.all | |
7822 | && ! cse_rtx_addr_varies_p (SET_DEST (x)))) | |
bb4034b3 | 7823 | invalidate (SET_DEST (x), VOIDmode); |
2708da92 RS |
7824 | else if (GET_CODE (SET_DEST (x)) == STRICT_LOW_PART |
7825 | || GET_CODE (SET_DEST (x)) == ZERO_EXTRACT) | |
bb4034b3 | 7826 | invalidate (XEXP (SET_DEST (x), 0), GET_MODE (SET_DEST (x))); |
7afe21cc RK |
7827 | } |
7828 | \f | |
7829 | /* Find the end of INSN's basic block and return its range, | |
7830 | the total number of SETs in all the insns of the block, the last insn of the | |
7831 | block, and the branch path. | |
7832 | ||
7833 | The branch path indicates which branches should be followed. If a non-zero | |
7834 | path size is specified, the block should be rescanned and a different set | |
7835 | of branches will be taken. The branch path is only used if | |
8b3686ed | 7836 | FLAG_CSE_FOLLOW_JUMPS or FLAG_CSE_SKIP_BLOCKS is non-zero. |
7afe21cc RK |
7837 | |
7838 | DATA is a pointer to a struct cse_basic_block_data, defined below, that is | |
7839 | used to describe the block. It is filled in with the information about | |
7840 | the current block. The incoming structure's branch path, if any, is used | |
7841 | to construct the output branch path. */ | |
7842 | ||
7afe21cc | 7843 | void |
8b3686ed | 7844 | cse_end_of_basic_block (insn, data, follow_jumps, after_loop, skip_blocks) |
7afe21cc RK |
7845 | rtx insn; |
7846 | struct cse_basic_block_data *data; | |
7847 | int follow_jumps; | |
7848 | int after_loop; | |
8b3686ed | 7849 | int skip_blocks; |
7afe21cc RK |
7850 | { |
7851 | rtx p = insn, q; | |
7852 | int nsets = 0; | |
7853 | int low_cuid = INSN_CUID (insn), high_cuid = INSN_CUID (insn); | |
fc3ffe83 | 7854 | rtx next = GET_RTX_CLASS (GET_CODE (insn)) == 'i' ? insn : next_real_insn (insn); |
7afe21cc RK |
7855 | int path_size = data->path_size; |
7856 | int path_entry = 0; | |
7857 | int i; | |
7858 | ||
7859 | /* Update the previous branch path, if any. If the last branch was | |
7860 | previously TAKEN, mark it NOT_TAKEN. If it was previously NOT_TAKEN, | |
7861 | shorten the path by one and look at the previous branch. We know that | |
7862 | at least one branch must have been taken if PATH_SIZE is non-zero. */ | |
7863 | while (path_size > 0) | |
7864 | { | |
8b3686ed | 7865 | if (data->path[path_size - 1].status != NOT_TAKEN) |
7afe21cc RK |
7866 | { |
7867 | data->path[path_size - 1].status = NOT_TAKEN; | |
7868 | break; | |
7869 | } | |
7870 | else | |
7871 | path_size--; | |
7872 | } | |
7873 | ||
7874 | /* Scan to end of this basic block. */ | |
7875 | while (p && GET_CODE (p) != CODE_LABEL) | |
7876 | { | |
7877 | /* Don't cse out the end of a loop. This makes a difference | |
7878 | only for the unusual loops that always execute at least once; | |
7879 | all other loops have labels there so we will stop in any case. | |
7880 | Cse'ing out the end of the loop is dangerous because it | |
7881 | might cause an invariant expression inside the loop | |
7882 | to be reused after the end of the loop. This would make it | |
7883 | hard to move the expression out of the loop in loop.c, | |
7884 | especially if it is one of several equivalent expressions | |
7885 | and loop.c would like to eliminate it. | |
7886 | ||
7887 | If we are running after loop.c has finished, we can ignore | |
7888 | the NOTE_INSN_LOOP_END. */ | |
7889 | ||
7890 | if (! after_loop && GET_CODE (p) == NOTE | |
7891 | && NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END) | |
7892 | break; | |
7893 | ||
7894 | /* Don't cse over a call to setjmp; on some machines (eg vax) | |
7895 | the regs restored by the longjmp come from | |
7896 | a later time than the setjmp. */ | |
7897 | if (GET_CODE (p) == NOTE | |
7898 | && NOTE_LINE_NUMBER (p) == NOTE_INSN_SETJMP) | |
7899 | break; | |
7900 | ||
7901 | /* A PARALLEL can have lots of SETs in it, | |
7902 | especially if it is really an ASM_OPERANDS. */ | |
7903 | if (GET_RTX_CLASS (GET_CODE (p)) == 'i' | |
7904 | && GET_CODE (PATTERN (p)) == PARALLEL) | |
7905 | nsets += XVECLEN (PATTERN (p), 0); | |
7906 | else if (GET_CODE (p) != NOTE) | |
7907 | nsets += 1; | |
7908 | ||
164c8956 RK |
7909 | /* Ignore insns made by CSE; they cannot affect the boundaries of |
7910 | the basic block. */ | |
7911 | ||
7912 | if (INSN_UID (p) <= max_uid && INSN_CUID (p) > high_cuid) | |
8b3686ed | 7913 | high_cuid = INSN_CUID (p); |
164c8956 RK |
7914 | if (INSN_UID (p) <= max_uid && INSN_CUID (p) < low_cuid) |
7915 | low_cuid = INSN_CUID (p); | |
7afe21cc RK |
7916 | |
7917 | /* See if this insn is in our branch path. If it is and we are to | |
7918 | take it, do so. */ | |
7919 | if (path_entry < path_size && data->path[path_entry].branch == p) | |
7920 | { | |
8b3686ed | 7921 | if (data->path[path_entry].status != NOT_TAKEN) |
7afe21cc RK |
7922 | p = JUMP_LABEL (p); |
7923 | ||
7924 | /* Point to next entry in path, if any. */ | |
7925 | path_entry++; | |
7926 | } | |
7927 | ||
7928 | /* If this is a conditional jump, we can follow it if -fcse-follow-jumps | |
7929 | was specified, we haven't reached our maximum path length, there are | |
7930 | insns following the target of the jump, this is the only use of the | |
8b3686ed RK |
7931 | jump label, and the target label is preceded by a BARRIER. |
7932 | ||
7933 | Alternatively, we can follow the jump if it branches around a | |
7934 | block of code and there are no other branches into the block. | |
7935 | In this case invalidate_skipped_block will be called to invalidate any | |
7936 | registers set in the block when following the jump. */ | |
7937 | ||
7938 | else if ((follow_jumps || skip_blocks) && path_size < PATHLENGTH - 1 | |
7afe21cc RK |
7939 | && GET_CODE (p) == JUMP_INSN |
7940 | && GET_CODE (PATTERN (p)) == SET | |
7941 | && GET_CODE (SET_SRC (PATTERN (p))) == IF_THEN_ELSE | |
7942 | && LABEL_NUSES (JUMP_LABEL (p)) == 1 | |
7943 | && NEXT_INSN (JUMP_LABEL (p)) != 0) | |
7944 | { | |
7945 | for (q = PREV_INSN (JUMP_LABEL (p)); q; q = PREV_INSN (q)) | |
7946 | if ((GET_CODE (q) != NOTE | |
7947 | || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END | |
7948 | || NOTE_LINE_NUMBER (q) == NOTE_INSN_SETJMP) | |
7949 | && (GET_CODE (q) != CODE_LABEL || LABEL_NUSES (q) != 0)) | |
7950 | break; | |
7951 | ||
7952 | /* If we ran into a BARRIER, this code is an extension of the | |
7953 | basic block when the branch is taken. */ | |
8b3686ed | 7954 | if (follow_jumps && q != 0 && GET_CODE (q) == BARRIER) |
7afe21cc RK |
7955 | { |
7956 | /* Don't allow ourself to keep walking around an | |
7957 | always-executed loop. */ | |
fc3ffe83 RK |
7958 | if (next_real_insn (q) == next) |
7959 | { | |
7960 | p = NEXT_INSN (p); | |
7961 | continue; | |
7962 | } | |
7afe21cc RK |
7963 | |
7964 | /* Similarly, don't put a branch in our path more than once. */ | |
7965 | for (i = 0; i < path_entry; i++) | |
7966 | if (data->path[i].branch == p) | |
7967 | break; | |
7968 | ||
7969 | if (i != path_entry) | |
7970 | break; | |
7971 | ||
7972 | data->path[path_entry].branch = p; | |
7973 | data->path[path_entry++].status = TAKEN; | |
7974 | ||
7975 | /* This branch now ends our path. It was possible that we | |
7976 | didn't see this branch the last time around (when the | |
7977 | insn in front of the target was a JUMP_INSN that was | |
7978 | turned into a no-op). */ | |
7979 | path_size = path_entry; | |
7980 | ||
7981 | p = JUMP_LABEL (p); | |
7982 | /* Mark block so we won't scan it again later. */ | |
7983 | PUT_MODE (NEXT_INSN (p), QImode); | |
7984 | } | |
8b3686ed RK |
7985 | /* Detect a branch around a block of code. */ |
7986 | else if (skip_blocks && q != 0 && GET_CODE (q) != CODE_LABEL) | |
7987 | { | |
7988 | register rtx tmp; | |
7989 | ||
fc3ffe83 RK |
7990 | if (next_real_insn (q) == next) |
7991 | { | |
7992 | p = NEXT_INSN (p); | |
7993 | continue; | |
7994 | } | |
8b3686ed RK |
7995 | |
7996 | for (i = 0; i < path_entry; i++) | |
7997 | if (data->path[i].branch == p) | |
7998 | break; | |
7999 | ||
8000 | if (i != path_entry) | |
8001 | break; | |
8002 | ||
8003 | /* This is no_labels_between_p (p, q) with an added check for | |
8004 | reaching the end of a function (in case Q precedes P). */ | |
8005 | for (tmp = NEXT_INSN (p); tmp && tmp != q; tmp = NEXT_INSN (tmp)) | |
8006 | if (GET_CODE (tmp) == CODE_LABEL) | |
8007 | break; | |
8008 | ||
8009 | if (tmp == q) | |
8010 | { | |
8011 | data->path[path_entry].branch = p; | |
8012 | data->path[path_entry++].status = AROUND; | |
8013 | ||
8014 | path_size = path_entry; | |
8015 | ||
8016 | p = JUMP_LABEL (p); | |
8017 | /* Mark block so we won't scan it again later. */ | |
8018 | PUT_MODE (NEXT_INSN (p), QImode); | |
8019 | } | |
8020 | } | |
7afe21cc | 8021 | } |
7afe21cc RK |
8022 | p = NEXT_INSN (p); |
8023 | } | |
8024 | ||
8025 | data->low_cuid = low_cuid; | |
8026 | data->high_cuid = high_cuid; | |
8027 | data->nsets = nsets; | |
8028 | data->last = p; | |
8029 | ||
8030 | /* If all jumps in the path are not taken, set our path length to zero | |
8031 | so a rescan won't be done. */ | |
8032 | for (i = path_size - 1; i >= 0; i--) | |
8b3686ed | 8033 | if (data->path[i].status != NOT_TAKEN) |
7afe21cc RK |
8034 | break; |
8035 | ||
8036 | if (i == -1) | |
8037 | data->path_size = 0; | |
8038 | else | |
8039 | data->path_size = path_size; | |
8040 | ||
8041 | /* End the current branch path. */ | |
8042 | data->path[path_size].branch = 0; | |
8043 | } | |
8044 | \f | |
7afe21cc RK |
8045 | /* Perform cse on the instructions of a function. |
8046 | F is the first instruction. | |
8047 | NREGS is one plus the highest pseudo-reg number used in the instruction. | |
8048 | ||
8049 | AFTER_LOOP is 1 if this is the cse call done after loop optimization | |
8050 | (only if -frerun-cse-after-loop). | |
8051 | ||
8052 | Returns 1 if jump_optimize should be redone due to simplifications | |
8053 | in conditional jump instructions. */ | |
8054 | ||
8055 | int | |
8056 | cse_main (f, nregs, after_loop, file) | |
8057 | rtx f; | |
8058 | int nregs; | |
8059 | int after_loop; | |
8060 | FILE *file; | |
8061 | { | |
8062 | struct cse_basic_block_data val; | |
8063 | register rtx insn = f; | |
8064 | register int i; | |
8065 | ||
8066 | cse_jumps_altered = 0; | |
8067 | constant_pool_entries_cost = 0; | |
8068 | val.path_size = 0; | |
8069 | ||
8070 | init_recog (); | |
8071 | ||
8072 | max_reg = nregs; | |
8073 | ||
8074 | all_minus_one = (int *) alloca (nregs * sizeof (int)); | |
8075 | consec_ints = (int *) alloca (nregs * sizeof (int)); | |
8076 | ||
8077 | for (i = 0; i < nregs; i++) | |
8078 | { | |
8079 | all_minus_one[i] = -1; | |
8080 | consec_ints[i] = i; | |
8081 | } | |
8082 | ||
8083 | reg_next_eqv = (int *) alloca (nregs * sizeof (int)); | |
8084 | reg_prev_eqv = (int *) alloca (nregs * sizeof (int)); | |
8085 | reg_qty = (int *) alloca (nregs * sizeof (int)); | |
8086 | reg_in_table = (int *) alloca (nregs * sizeof (int)); | |
8087 | reg_tick = (int *) alloca (nregs * sizeof (int)); | |
8088 | ||
7bac1be0 RK |
8089 | #ifdef LOAD_EXTEND_OP |
8090 | ||
8091 | /* Allocate scratch rtl here. cse_insn will fill in the memory reference | |
8092 | and change the code and mode as appropriate. */ | |
8093 | memory_extend_rtx = gen_rtx (ZERO_EXTEND, VOIDmode, 0); | |
8094 | #endif | |
8095 | ||
7afe21cc RK |
8096 | /* Discard all the free elements of the previous function |
8097 | since they are allocated in the temporarily obstack. */ | |
4c9a05bc | 8098 | bzero ((char *) table, sizeof table); |
7afe21cc RK |
8099 | free_element_chain = 0; |
8100 | n_elements_made = 0; | |
8101 | ||
8102 | /* Find the largest uid. */ | |
8103 | ||
164c8956 RK |
8104 | max_uid = get_max_uid (); |
8105 | uid_cuid = (int *) alloca ((max_uid + 1) * sizeof (int)); | |
4c9a05bc | 8106 | bzero ((char *) uid_cuid, (max_uid + 1) * sizeof (int)); |
7afe21cc RK |
8107 | |
8108 | /* Compute the mapping from uids to cuids. | |
8109 | CUIDs are numbers assigned to insns, like uids, | |
8110 | except that cuids increase monotonically through the code. | |
8111 | Don't assign cuids to line-number NOTEs, so that the distance in cuids | |
8112 | between two insns is not affected by -g. */ | |
8113 | ||
8114 | for (insn = f, i = 0; insn; insn = NEXT_INSN (insn)) | |
8115 | { | |
8116 | if (GET_CODE (insn) != NOTE | |
8117 | || NOTE_LINE_NUMBER (insn) < 0) | |
8118 | INSN_CUID (insn) = ++i; | |
8119 | else | |
8120 | /* Give a line number note the same cuid as preceding insn. */ | |
8121 | INSN_CUID (insn) = i; | |
8122 | } | |
8123 | ||
8124 | /* Initialize which registers are clobbered by calls. */ | |
8125 | ||
8126 | CLEAR_HARD_REG_SET (regs_invalidated_by_call); | |
8127 | ||
8128 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
8129 | if ((call_used_regs[i] | |
8130 | /* Used to check !fixed_regs[i] here, but that isn't safe; | |
8131 | fixed regs are still call-clobbered, and sched can get | |
8132 | confused if they can "live across calls". | |
8133 | ||
8134 | The frame pointer is always preserved across calls. The arg | |
8135 | pointer is if it is fixed. The stack pointer usually is, unless | |
8136 | RETURN_POPS_ARGS, in which case an explicit CLOBBER | |
8137 | will be present. If we are generating PIC code, the PIC offset | |
8138 | table register is preserved across calls. */ | |
8139 | ||
8140 | && i != STACK_POINTER_REGNUM | |
8141 | && i != FRAME_POINTER_REGNUM | |
8bc169f2 DE |
8142 | #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM |
8143 | && i != HARD_FRAME_POINTER_REGNUM | |
8144 | #endif | |
7afe21cc RK |
8145 | #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM |
8146 | && ! (i == ARG_POINTER_REGNUM && fixed_regs[i]) | |
8147 | #endif | |
be8fe470 | 8148 | #if defined (PIC_OFFSET_TABLE_REGNUM) && !defined (PIC_OFFSET_TABLE_REG_CALL_CLOBBERED) |
7afe21cc RK |
8149 | && ! (i == PIC_OFFSET_TABLE_REGNUM && flag_pic) |
8150 | #endif | |
8151 | ) | |
8152 | || global_regs[i]) | |
8153 | SET_HARD_REG_BIT (regs_invalidated_by_call, i); | |
8154 | ||
8155 | /* Loop over basic blocks. | |
8156 | Compute the maximum number of qty's needed for each basic block | |
8157 | (which is 2 for each SET). */ | |
8158 | insn = f; | |
8159 | while (insn) | |
8160 | { | |
8b3686ed RK |
8161 | cse_end_of_basic_block (insn, &val, flag_cse_follow_jumps, after_loop, |
8162 | flag_cse_skip_blocks); | |
7afe21cc RK |
8163 | |
8164 | /* If this basic block was already processed or has no sets, skip it. */ | |
8165 | if (val.nsets == 0 || GET_MODE (insn) == QImode) | |
8166 | { | |
8167 | PUT_MODE (insn, VOIDmode); | |
8168 | insn = (val.last ? NEXT_INSN (val.last) : 0); | |
8169 | val.path_size = 0; | |
8170 | continue; | |
8171 | } | |
8172 | ||
8173 | cse_basic_block_start = val.low_cuid; | |
8174 | cse_basic_block_end = val.high_cuid; | |
8175 | max_qty = val.nsets * 2; | |
8176 | ||
8177 | if (file) | |
8178 | fprintf (file, ";; Processing block from %d to %d, %d sets.\n", | |
8179 | INSN_UID (insn), val.last ? INSN_UID (val.last) : 0, | |
8180 | val.nsets); | |
8181 | ||
8182 | /* Make MAX_QTY bigger to give us room to optimize | |
8183 | past the end of this basic block, if that should prove useful. */ | |
8184 | if (max_qty < 500) | |
8185 | max_qty = 500; | |
8186 | ||
8187 | max_qty += max_reg; | |
8188 | ||
8189 | /* If this basic block is being extended by following certain jumps, | |
8190 | (see `cse_end_of_basic_block'), we reprocess the code from the start. | |
8191 | Otherwise, we start after this basic block. */ | |
8192 | if (val.path_size > 0) | |
8193 | cse_basic_block (insn, val.last, val.path, 0); | |
8194 | else | |
8195 | { | |
8196 | int old_cse_jumps_altered = cse_jumps_altered; | |
8197 | rtx temp; | |
8198 | ||
8199 | /* When cse changes a conditional jump to an unconditional | |
8200 | jump, we want to reprocess the block, since it will give | |
8201 | us a new branch path to investigate. */ | |
8202 | cse_jumps_altered = 0; | |
8203 | temp = cse_basic_block (insn, val.last, val.path, ! after_loop); | |
8b3686ed RK |
8204 | if (cse_jumps_altered == 0 |
8205 | || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0)) | |
7afe21cc RK |
8206 | insn = temp; |
8207 | ||
8208 | cse_jumps_altered |= old_cse_jumps_altered; | |
8209 | } | |
8210 | ||
8211 | #ifdef USE_C_ALLOCA | |
8212 | alloca (0); | |
8213 | #endif | |
8214 | } | |
8215 | ||
8216 | /* Tell refers_to_mem_p that qty_const info is not available. */ | |
8217 | qty_const = 0; | |
8218 | ||
8219 | if (max_elements_made < n_elements_made) | |
8220 | max_elements_made = n_elements_made; | |
8221 | ||
8222 | return cse_jumps_altered; | |
8223 | } | |
8224 | ||
8225 | /* Process a single basic block. FROM and TO and the limits of the basic | |
8226 | block. NEXT_BRANCH points to the branch path when following jumps or | |
8227 | a null path when not following jumps. | |
8228 | ||
8229 | AROUND_LOOP is non-zero if we are to try to cse around to the start of a | |
8230 | loop. This is true when we are being called for the last time on a | |
8231 | block and this CSE pass is before loop.c. */ | |
8232 | ||
8233 | static rtx | |
8234 | cse_basic_block (from, to, next_branch, around_loop) | |
8235 | register rtx from, to; | |
8236 | struct branch_path *next_branch; | |
8237 | int around_loop; | |
8238 | { | |
8239 | register rtx insn; | |
8240 | int to_usage = 0; | |
8241 | int in_libcall_block = 0; | |
8242 | ||
8243 | /* Each of these arrays is undefined before max_reg, so only allocate | |
8244 | the space actually needed and adjust the start below. */ | |
8245 | ||
8246 | qty_first_reg = (int *) alloca ((max_qty - max_reg) * sizeof (int)); | |
8247 | qty_last_reg = (int *) alloca ((max_qty - max_reg) * sizeof (int)); | |
8248 | qty_mode= (enum machine_mode *) alloca ((max_qty - max_reg) * sizeof (enum machine_mode)); | |
8249 | qty_const = (rtx *) alloca ((max_qty - max_reg) * sizeof (rtx)); | |
8250 | qty_const_insn = (rtx *) alloca ((max_qty - max_reg) * sizeof (rtx)); | |
8251 | qty_comparison_code | |
8252 | = (enum rtx_code *) alloca ((max_qty - max_reg) * sizeof (enum rtx_code)); | |
8253 | qty_comparison_qty = (int *) alloca ((max_qty - max_reg) * sizeof (int)); | |
8254 | qty_comparison_const = (rtx *) alloca ((max_qty - max_reg) * sizeof (rtx)); | |
8255 | ||
8256 | qty_first_reg -= max_reg; | |
8257 | qty_last_reg -= max_reg; | |
8258 | qty_mode -= max_reg; | |
8259 | qty_const -= max_reg; | |
8260 | qty_const_insn -= max_reg; | |
8261 | qty_comparison_code -= max_reg; | |
8262 | qty_comparison_qty -= max_reg; | |
8263 | qty_comparison_const -= max_reg; | |
8264 | ||
8265 | new_basic_block (); | |
8266 | ||
8267 | /* TO might be a label. If so, protect it from being deleted. */ | |
8268 | if (to != 0 && GET_CODE (to) == CODE_LABEL) | |
8269 | ++LABEL_NUSES (to); | |
8270 | ||
8271 | for (insn = from; insn != to; insn = NEXT_INSN (insn)) | |
8272 | { | |
8273 | register enum rtx_code code; | |
8274 | ||
8275 | /* See if this is a branch that is part of the path. If so, and it is | |
8276 | to be taken, do so. */ | |
8277 | if (next_branch->branch == insn) | |
8278 | { | |
8b3686ed RK |
8279 | enum taken status = next_branch++->status; |
8280 | if (status != NOT_TAKEN) | |
7afe21cc | 8281 | { |
8b3686ed RK |
8282 | if (status == TAKEN) |
8283 | record_jump_equiv (insn, 1); | |
8284 | else | |
8285 | invalidate_skipped_block (NEXT_INSN (insn)); | |
8286 | ||
7afe21cc RK |
8287 | /* Set the last insn as the jump insn; it doesn't affect cc0. |
8288 | Then follow this branch. */ | |
8289 | #ifdef HAVE_cc0 | |
8290 | prev_insn_cc0 = 0; | |
8291 | #endif | |
8292 | prev_insn = insn; | |
8293 | insn = JUMP_LABEL (insn); | |
8294 | continue; | |
8295 | } | |
8296 | } | |
8297 | ||
8298 | code = GET_CODE (insn); | |
8299 | if (GET_MODE (insn) == QImode) | |
8300 | PUT_MODE (insn, VOIDmode); | |
8301 | ||
8302 | if (GET_RTX_CLASS (code) == 'i') | |
8303 | { | |
8304 | /* Process notes first so we have all notes in canonical forms when | |
8305 | looking for duplicate operations. */ | |
8306 | ||
8307 | if (REG_NOTES (insn)) | |
906c4e36 | 8308 | REG_NOTES (insn) = cse_process_notes (REG_NOTES (insn), NULL_RTX); |
7afe21cc RK |
8309 | |
8310 | /* Track when we are inside in LIBCALL block. Inside such a block, | |
8311 | we do not want to record destinations. The last insn of a | |
8312 | LIBCALL block is not considered to be part of the block, since | |
830a38ee | 8313 | its destination is the result of the block and hence should be |
7afe21cc RK |
8314 | recorded. */ |
8315 | ||
906c4e36 | 8316 | if (find_reg_note (insn, REG_LIBCALL, NULL_RTX)) |
7afe21cc | 8317 | in_libcall_block = 1; |
906c4e36 | 8318 | else if (find_reg_note (insn, REG_RETVAL, NULL_RTX)) |
7afe21cc RK |
8319 | in_libcall_block = 0; |
8320 | ||
8321 | cse_insn (insn, in_libcall_block); | |
8322 | } | |
8323 | ||
8324 | /* If INSN is now an unconditional jump, skip to the end of our | |
8325 | basic block by pretending that we just did the last insn in the | |
8326 | basic block. If we are jumping to the end of our block, show | |
8327 | that we can have one usage of TO. */ | |
8328 | ||
8329 | if (simplejump_p (insn)) | |
8330 | { | |
8331 | if (to == 0) | |
8332 | return 0; | |
8333 | ||
8334 | if (JUMP_LABEL (insn) == to) | |
8335 | to_usage = 1; | |
8336 | ||
6a5293dc RS |
8337 | /* Maybe TO was deleted because the jump is unconditional. |
8338 | If so, there is nothing left in this basic block. */ | |
8339 | /* ??? Perhaps it would be smarter to set TO | |
8340 | to whatever follows this insn, | |
8341 | and pretend the basic block had always ended here. */ | |
8342 | if (INSN_DELETED_P (to)) | |
8343 | break; | |
8344 | ||
7afe21cc RK |
8345 | insn = PREV_INSN (to); |
8346 | } | |
8347 | ||
8348 | /* See if it is ok to keep on going past the label | |
8349 | which used to end our basic block. Remember that we incremented | |
d45cf215 | 8350 | the count of that label, so we decrement it here. If we made |
7afe21cc RK |
8351 | a jump unconditional, TO_USAGE will be one; in that case, we don't |
8352 | want to count the use in that jump. */ | |
8353 | ||
8354 | if (to != 0 && NEXT_INSN (insn) == to | |
8355 | && GET_CODE (to) == CODE_LABEL && --LABEL_NUSES (to) == to_usage) | |
8356 | { | |
8357 | struct cse_basic_block_data val; | |
8358 | ||
8359 | insn = NEXT_INSN (to); | |
8360 | ||
8361 | if (LABEL_NUSES (to) == 0) | |
8362 | delete_insn (to); | |
8363 | ||
8364 | /* Find the end of the following block. Note that we won't be | |
8365 | following branches in this case. If TO was the last insn | |
8366 | in the function, we are done. Similarly, if we deleted the | |
d45cf215 | 8367 | insn after TO, it must have been because it was preceded by |
7afe21cc RK |
8368 | a BARRIER. In that case, we are done with this block because it |
8369 | has no continuation. */ | |
8370 | ||
8371 | if (insn == 0 || INSN_DELETED_P (insn)) | |
8372 | return 0; | |
8373 | ||
8374 | to_usage = 0; | |
8375 | val.path_size = 0; | |
8b3686ed | 8376 | cse_end_of_basic_block (insn, &val, 0, 0, 0); |
7afe21cc RK |
8377 | |
8378 | /* If the tables we allocated have enough space left | |
8379 | to handle all the SETs in the next basic block, | |
8380 | continue through it. Otherwise, return, | |
8381 | and that block will be scanned individually. */ | |
8382 | if (val.nsets * 2 + next_qty > max_qty) | |
8383 | break; | |
8384 | ||
8385 | cse_basic_block_start = val.low_cuid; | |
8386 | cse_basic_block_end = val.high_cuid; | |
8387 | to = val.last; | |
8388 | ||
8389 | /* Prevent TO from being deleted if it is a label. */ | |
8390 | if (to != 0 && GET_CODE (to) == CODE_LABEL) | |
8391 | ++LABEL_NUSES (to); | |
8392 | ||
8393 | /* Back up so we process the first insn in the extension. */ | |
8394 | insn = PREV_INSN (insn); | |
8395 | } | |
8396 | } | |
8397 | ||
8398 | if (next_qty > max_qty) | |
8399 | abort (); | |
8400 | ||
8401 | /* If we are running before loop.c, we stopped on a NOTE_INSN_LOOP_END, and | |
8402 | the previous insn is the only insn that branches to the head of a loop, | |
8403 | we can cse into the loop. Don't do this if we changed the jump | |
8404 | structure of a loop unless we aren't going to be following jumps. */ | |
8405 | ||
8b3686ed RK |
8406 | if ((cse_jumps_altered == 0 |
8407 | || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0)) | |
7afe21cc RK |
8408 | && around_loop && to != 0 |
8409 | && GET_CODE (to) == NOTE && NOTE_LINE_NUMBER (to) == NOTE_INSN_LOOP_END | |
8410 | && GET_CODE (PREV_INSN (to)) == JUMP_INSN | |
8411 | && JUMP_LABEL (PREV_INSN (to)) != 0 | |
8412 | && LABEL_NUSES (JUMP_LABEL (PREV_INSN (to))) == 1) | |
8413 | cse_around_loop (JUMP_LABEL (PREV_INSN (to))); | |
8414 | ||
8415 | return to ? NEXT_INSN (to) : 0; | |
8416 | } | |
8417 | \f | |
8418 | /* Count the number of times registers are used (not set) in X. | |
8419 | COUNTS is an array in which we accumulate the count, INCR is how much | |
79644f06 RK |
8420 | we count each register usage. |
8421 | ||
8422 | Don't count a usage of DEST, which is the SET_DEST of a SET which | |
8423 | contains X in its SET_SRC. This is because such a SET does not | |
8424 | modify the liveness of DEST. */ | |
7afe21cc RK |
8425 | |
8426 | static void | |
79644f06 | 8427 | count_reg_usage (x, counts, dest, incr) |
7afe21cc RK |
8428 | rtx x; |
8429 | int *counts; | |
79644f06 | 8430 | rtx dest; |
7afe21cc RK |
8431 | int incr; |
8432 | { | |
f1e7c95f | 8433 | enum rtx_code code; |
7afe21cc RK |
8434 | char *fmt; |
8435 | int i, j; | |
8436 | ||
f1e7c95f RK |
8437 | if (x == 0) |
8438 | return; | |
8439 | ||
8440 | switch (code = GET_CODE (x)) | |
7afe21cc RK |
8441 | { |
8442 | case REG: | |
79644f06 RK |
8443 | if (x != dest) |
8444 | counts[REGNO (x)] += incr; | |
7afe21cc RK |
8445 | return; |
8446 | ||
8447 | case PC: | |
8448 | case CC0: | |
8449 | case CONST: | |
8450 | case CONST_INT: | |
8451 | case CONST_DOUBLE: | |
8452 | case SYMBOL_REF: | |
8453 | case LABEL_REF: | |
8454 | case CLOBBER: | |
8455 | return; | |
8456 | ||
8457 | case SET: | |
8458 | /* Unless we are setting a REG, count everything in SET_DEST. */ | |
8459 | if (GET_CODE (SET_DEST (x)) != REG) | |
79644f06 | 8460 | count_reg_usage (SET_DEST (x), counts, NULL_RTX, incr); |
9ff08f70 RK |
8461 | |
8462 | /* If SRC has side-effects, then we can't delete this insn, so the | |
8463 | usage of SET_DEST inside SRC counts. | |
8464 | ||
8465 | ??? Strictly-speaking, we might be preserving this insn | |
8466 | because some other SET has side-effects, but that's hard | |
8467 | to do and can't happen now. */ | |
8468 | count_reg_usage (SET_SRC (x), counts, | |
8469 | side_effects_p (SET_SRC (x)) ? NULL_RTX : SET_DEST (x), | |
8470 | incr); | |
7afe21cc RK |
8471 | return; |
8472 | ||
f1e7c95f RK |
8473 | case CALL_INSN: |
8474 | count_reg_usage (CALL_INSN_FUNCTION_USAGE (x), counts, NULL_RTX, incr); | |
8475 | ||
8476 | /* ... falls through ... */ | |
7afe21cc RK |
8477 | case INSN: |
8478 | case JUMP_INSN: | |
79644f06 | 8479 | count_reg_usage (PATTERN (x), counts, NULL_RTX, incr); |
7afe21cc RK |
8480 | |
8481 | /* Things used in a REG_EQUAL note aren't dead since loop may try to | |
8482 | use them. */ | |
8483 | ||
f1e7c95f | 8484 | count_reg_usage (REG_NOTES (x), counts, NULL_RTX, incr); |
7afe21cc RK |
8485 | return; |
8486 | ||
8487 | case EXPR_LIST: | |
8488 | case INSN_LIST: | |
f1e7c95f RK |
8489 | if (REG_NOTE_KIND (x) == REG_EQUAL |
8490 | || GET_CODE (XEXP (x,0)) == USE) | |
79644f06 | 8491 | count_reg_usage (XEXP (x, 0), counts, NULL_RTX, incr); |
f1e7c95f | 8492 | count_reg_usage (XEXP (x, 1), counts, NULL_RTX, incr); |
7afe21cc RK |
8493 | return; |
8494 | } | |
8495 | ||
8496 | fmt = GET_RTX_FORMAT (code); | |
8497 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
8498 | { | |
8499 | if (fmt[i] == 'e') | |
79644f06 | 8500 | count_reg_usage (XEXP (x, i), counts, dest, incr); |
7afe21cc RK |
8501 | else if (fmt[i] == 'E') |
8502 | for (j = XVECLEN (x, i) - 1; j >= 0; j--) | |
79644f06 | 8503 | count_reg_usage (XVECEXP (x, i, j), counts, dest, incr); |
7afe21cc RK |
8504 | } |
8505 | } | |
8506 | \f | |
8507 | /* Scan all the insns and delete any that are dead; i.e., they store a register | |
8508 | that is never used or they copy a register to itself. | |
8509 | ||
8510 | This is used to remove insns made obviously dead by cse. It improves the | |
8511 | heuristics in loop since it won't try to move dead invariants out of loops | |
8512 | or make givs for dead quantities. The remaining passes of the compilation | |
8513 | are also sped up. */ | |
8514 | ||
8515 | void | |
8516 | delete_dead_from_cse (insns, nreg) | |
8517 | rtx insns; | |
8518 | int nreg; | |
8519 | { | |
8520 | int *counts = (int *) alloca (nreg * sizeof (int)); | |
77fa0940 | 8521 | rtx insn, prev; |
d45cf215 | 8522 | rtx tem; |
7afe21cc | 8523 | int i; |
e4890d45 | 8524 | int in_libcall = 0; |
7afe21cc RK |
8525 | |
8526 | /* First count the number of times each register is used. */ | |
4c9a05bc | 8527 | bzero ((char *) counts, sizeof (int) * nreg); |
7afe21cc | 8528 | for (insn = next_real_insn (insns); insn; insn = next_real_insn (insn)) |
79644f06 | 8529 | count_reg_usage (insn, counts, NULL_RTX, 1); |
7afe21cc RK |
8530 | |
8531 | /* Go from the last insn to the first and delete insns that only set unused | |
8532 | registers or copy a register to itself. As we delete an insn, remove | |
8533 | usage counts for registers it uses. */ | |
77fa0940 | 8534 | for (insn = prev_real_insn (get_last_insn ()); insn; insn = prev) |
7afe21cc RK |
8535 | { |
8536 | int live_insn = 0; | |
8537 | ||
77fa0940 RK |
8538 | prev = prev_real_insn (insn); |
8539 | ||
e4890d45 | 8540 | /* Don't delete any insns that are part of a libcall block. |
77fa0940 RK |
8541 | Flow or loop might get confused if we did that. Remember |
8542 | that we are scanning backwards. */ | |
906c4e36 | 8543 | if (find_reg_note (insn, REG_RETVAL, NULL_RTX)) |
e4890d45 RS |
8544 | in_libcall = 1; |
8545 | ||
8546 | if (in_libcall) | |
8547 | live_insn = 1; | |
8548 | else if (GET_CODE (PATTERN (insn)) == SET) | |
7afe21cc RK |
8549 | { |
8550 | if (GET_CODE (SET_DEST (PATTERN (insn))) == REG | |
8551 | && SET_DEST (PATTERN (insn)) == SET_SRC (PATTERN (insn))) | |
8552 | ; | |
8553 | ||
d45cf215 RS |
8554 | #ifdef HAVE_cc0 |
8555 | else if (GET_CODE (SET_DEST (PATTERN (insn))) == CC0 | |
8556 | && ! side_effects_p (SET_SRC (PATTERN (insn))) | |
8557 | && ((tem = next_nonnote_insn (insn)) == 0 | |
8558 | || GET_RTX_CLASS (GET_CODE (tem)) != 'i' | |
8559 | || ! reg_referenced_p (cc0_rtx, PATTERN (tem)))) | |
8560 | ; | |
8561 | #endif | |
7afe21cc RK |
8562 | else if (GET_CODE (SET_DEST (PATTERN (insn))) != REG |
8563 | || REGNO (SET_DEST (PATTERN (insn))) < FIRST_PSEUDO_REGISTER | |
8564 | || counts[REGNO (SET_DEST (PATTERN (insn)))] != 0 | |
8565 | || side_effects_p (SET_SRC (PATTERN (insn)))) | |
8566 | live_insn = 1; | |
8567 | } | |
8568 | else if (GET_CODE (PATTERN (insn)) == PARALLEL) | |
8569 | for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--) | |
8570 | { | |
8571 | rtx elt = XVECEXP (PATTERN (insn), 0, i); | |
8572 | ||
8573 | if (GET_CODE (elt) == SET) | |
8574 | { | |
8575 | if (GET_CODE (SET_DEST (elt)) == REG | |
8576 | && SET_DEST (elt) == SET_SRC (elt)) | |
8577 | ; | |
8578 | ||
d45cf215 RS |
8579 | #ifdef HAVE_cc0 |
8580 | else if (GET_CODE (SET_DEST (elt)) == CC0 | |
8581 | && ! side_effects_p (SET_SRC (elt)) | |
8582 | && ((tem = next_nonnote_insn (insn)) == 0 | |
8583 | || GET_RTX_CLASS (GET_CODE (tem)) != 'i' | |
8584 | || ! reg_referenced_p (cc0_rtx, PATTERN (tem)))) | |
8585 | ; | |
8586 | #endif | |
7afe21cc RK |
8587 | else if (GET_CODE (SET_DEST (elt)) != REG |
8588 | || REGNO (SET_DEST (elt)) < FIRST_PSEUDO_REGISTER | |
8589 | || counts[REGNO (SET_DEST (elt))] != 0 | |
8590 | || side_effects_p (SET_SRC (elt))) | |
8591 | live_insn = 1; | |
8592 | } | |
8593 | else if (GET_CODE (elt) != CLOBBER && GET_CODE (elt) != USE) | |
8594 | live_insn = 1; | |
8595 | } | |
8596 | else | |
8597 | live_insn = 1; | |
8598 | ||
8599 | /* If this is a dead insn, delete it and show registers in it aren't | |
e4890d45 | 8600 | being used. */ |
7afe21cc | 8601 | |
e4890d45 | 8602 | if (! live_insn) |
7afe21cc | 8603 | { |
79644f06 | 8604 | count_reg_usage (insn, counts, NULL_RTX, -1); |
77fa0940 | 8605 | delete_insn (insn); |
7afe21cc | 8606 | } |
e4890d45 | 8607 | |
906c4e36 | 8608 | if (find_reg_note (insn, REG_LIBCALL, NULL_RTX)) |
e4890d45 | 8609 | in_libcall = 0; |
7afe21cc RK |
8610 | } |
8611 | } |