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6fb5fa3c 1/* RTL dead code elimination.
5624e564 2 Copyright (C) 2005-2015 Free Software Foundation, Inc.
6fb5fa3c
DB
3
4This file is part of GCC.
5
6GCC is free software; you can redistribute it and/or modify it under
7the terms of the GNU General Public License as published by the Free
9dcd6f09 8Software Foundation; either version 3, or (at your option) any later
6fb5fa3c
DB
9version.
10
11GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12WARRANTY; without even the implied warranty of MERCHANTABILITY or
13FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14for more details.
15
16You should have received a copy of the GNU General Public License
9dcd6f09
NC
17along with GCC; see the file COPYING3. If not see
18<http://www.gnu.org/licenses/>. */
6fb5fa3c
DB
19
20#include "config.h"
21#include "system.h"
22#include "coretypes.h"
6fb5fa3c
DB
23#include "tm.h"
24#include "rtl.h"
40e23961
MC
25#include "alias.h"
26#include "symtab.h"
6fb5fa3c
DB
27#include "tree.h"
28#include "regs.h"
29#include "hard-reg-set.h"
30#include "flags.h"
35debead 31#include "except.h"
60393bbc
AM
32#include "dominance.h"
33#include "cfg.h"
34#include "cfgrtl.h"
35#include "cfgbuild.h"
36#include "cfgcleanup.h"
37#include "predict.h"
38#include "basic-block.h"
6fb5fa3c
DB
39#include "df.h"
40#include "cselib.h"
41#include "dce.h"
08df6c0d 42#include "valtrack.h"
6fb5fa3c
DB
43#include "tree-pass.h"
44#include "dbgcnt.h"
0196c95e 45#include "tm_p.h"
5936d944 46#include "emit-rtl.h" /* FIXME: Can go away once crtl is moved to rtl.h. */
6fb5fa3c 47
6fb5fa3c
DB
48
49/* -------------------------------------------------------------------------
50 Core mark/delete routines
51 ------------------------------------------------------------------------- */
52
2e6be65e
EB
53/* True if we are invoked while the df engine is running; in this case,
54 we don't want to reenter it. */
6fb5fa3c
DB
55static bool df_in_progress = false;
56
2da02156
EB
57/* True if we are allowed to alter the CFG in this pass. */
58static bool can_alter_cfg = false;
59
6fb5fa3c
DB
60/* Instructions that have been marked but whose dependencies have not
61 yet been processed. */
0ece9321 62static vec<rtx_insn *> worklist;
6fb5fa3c 63
2e6be65e
EB
64/* Bitmap of instructions marked as needed indexed by INSN_UID. */
65static sbitmap marked;
66
67/* Bitmap obstacks used for block processing by the fast algorithm. */
6fb5fa3c
DB
68static bitmap_obstack dce_blocks_bitmap_obstack;
69static bitmap_obstack dce_tmp_bitmap_obstack;
70
0ece9321 71static bool find_call_stack_args (rtx_call_insn *, bool, bool, bitmap);
6fb5fa3c 72
d4d7f1d1
RS
73/* A subroutine for which BODY is part of the instruction being tested;
74 either the top-level pattern, or an element of a PARALLEL. The
75 instruction is known not to be a bare USE or CLOBBER. */
6fb5fa3c
DB
76
77static bool
d4d7f1d1 78deletable_insn_p_1 (rtx body)
6fb5fa3c 79{
6cad9859 80 switch (GET_CODE (body))
6fb5fa3c 81 {
6fb5fa3c
DB
82 case PREFETCH:
83 case TRAP_IF:
84 /* The UNSPEC case was added here because the ia-64 claims that
85 USEs do not work after reload and generates UNSPECS rather
86 than USEs. Since dce is run after reload we need to avoid
87 deleting these even if they are dead. If it turns out that
88 USEs really do work after reload, the ia-64 should be
89 changed, and the UNSPEC case can be removed. */
90 case UNSPEC:
91 return false;
92
d4d7f1d1 93 default:
1d65f45c 94 return !volatile_refs_p (body);
d4d7f1d1
RS
95 }
96}
97
2e6be65e 98
d4d7f1d1
RS
99/* Return true if INSN is a normal instruction that can be deleted by
100 the DCE pass. */
101
102static bool
0ece9321 103deletable_insn_p (rtx_insn *insn, bool fast, bitmap arg_stores)
d4d7f1d1
RS
104{
105 rtx body, x;
106 int i;
bfac633a 107 df_ref def;
d4d7f1d1 108
5ba5ab9b
KZ
109 if (CALL_P (insn)
110 /* We cannot delete calls inside of the recursive dce because
111 this may cause basic blocks to be deleted and this messes up
112 the rest of the stack of optimization passes. */
113 && (!df_in_progress)
114 /* We cannot delete pure or const sibling calls because it is
115 hard to see the result. */
becfd6e5 116 && (!SIBLING_CALL_P (insn))
5ba5ab9b
KZ
117 /* We can delete dead const or pure calls as long as they do not
118 infinite loop. */
becfd6e5
KZ
119 && (RTL_CONST_OR_PURE_CALL_P (insn)
120 && !RTL_LOOPING_CONST_OR_PURE_CALL_P (insn)))
0ece9321
DM
121 return find_call_stack_args (as_a <rtx_call_insn *> (insn), false,
122 fast, arg_stores);
becfd6e5 123
642d55de
EB
124 /* Don't delete jumps, notes and the like. */
125 if (!NONJUMP_INSN_P (insn))
126 return false;
127
2da02156
EB
128 /* Don't delete insns that may throw if we cannot do so. */
129 if (!(cfun->can_delete_dead_exceptions && can_alter_cfg)
130 && !insn_nothrow_p (insn))
642d55de
EB
131 return false;
132
211d71a7 133 /* If INSN sets a global_reg, leave it untouched. */
bfac633a
RS
134 FOR_EACH_INSN_DEF (def, insn)
135 if (HARD_REGISTER_NUM_P (DF_REF_REGNO (def))
136 && global_regs[DF_REF_REGNO (def)])
211d71a7 137 return false;
56873e13
ES
138 /* Initialization of pseudo PIC register should never be removed. */
139 else if (DF_REF_REG (def) == pic_offset_table_rtx
140 && REGNO (pic_offset_table_rtx) >= FIRST_PSEUDO_REGISTER)
141 return false;
211d71a7 142
d4d7f1d1
RS
143 body = PATTERN (insn);
144 switch (GET_CODE (body))
145 {
146 case USE:
b5b8b0ac 147 case VAR_LOCATION:
d4d7f1d1
RS
148 return false;
149
6fb5fa3c
DB
150 case CLOBBER:
151 if (fast)
152 {
153 /* A CLOBBER of a dead pseudo register serves no purpose.
154 That is not necessarily true for hard registers until
155 after reload. */
6cad9859 156 x = XEXP (body, 0);
6fb5fa3c
DB
157 return REG_P (x) && (!HARD_REGISTER_P (x) || reload_completed);
158 }
d4d7f1d1 159 else
6fb5fa3c
DB
160 /* Because of the way that use-def chains are built, it is not
161 possible to tell if the clobber is dead because it can
162 never be the target of a use-def chain. */
163 return false;
164
6cad9859 165 case PARALLEL:
d4d7f1d1
RS
166 for (i = XVECLEN (body, 0) - 1; i >= 0; i--)
167 if (!deletable_insn_p_1 (XVECEXP (body, 0, i)))
168 return false;
169 return true;
6cad9859 170
6fb5fa3c 171 default:
d4d7f1d1 172 return deletable_insn_p_1 (body);
6fb5fa3c
DB
173 }
174}
175
176
2e6be65e 177/* Return true if INSN has been marked as needed. */
6fb5fa3c
DB
178
179static inline int
0ece9321 180marked_insn_p (rtx_insn *insn)
6fb5fa3c 181{
50e94c7e
SB
182 /* Artificial defs are always needed and they do not have an insn.
183 We should never see them here. */
184 gcc_assert (insn);
d7c028c0 185 return bitmap_bit_p (marked, INSN_UID (insn));
6fb5fa3c
DB
186}
187
188
189/* If INSN has not yet been marked as needed, mark it now, and add it to
190 the worklist. */
191
192static void
0ece9321 193mark_insn (rtx_insn *insn, bool fast)
6fb5fa3c
DB
194{
195 if (!marked_insn_p (insn))
196 {
197 if (!fast)
9771b263 198 worklist.safe_push (insn);
d7c028c0 199 bitmap_set_bit (marked, INSN_UID (insn));
6fb5fa3c
DB
200 if (dump_file)
201 fprintf (dump_file, " Adding insn %d to worklist\n", INSN_UID (insn));
0196c95e
JJ
202 if (CALL_P (insn)
203 && !df_in_progress
204 && !SIBLING_CALL_P (insn)
205 && (RTL_CONST_OR_PURE_CALL_P (insn)
206 && !RTL_LOOPING_CONST_OR_PURE_CALL_P (insn)))
0ece9321 207 find_call_stack_args (as_a <rtx_call_insn *> (insn), true, fast, NULL);
6fb5fa3c
DB
208 }
209}
210
211
212/* A note_stores callback used by mark_nonreg_stores. DATA is the
213 instruction containing DEST. */
214
215static void
7bc980e1 216mark_nonreg_stores_1 (rtx dest, const_rtx pattern, void *data)
6fb5fa3c
DB
217{
218 if (GET_CODE (pattern) != CLOBBER && !REG_P (dest))
0ece9321 219 mark_insn ((rtx_insn *) data, true);
6fb5fa3c
DB
220}
221
222
223/* A note_stores callback used by mark_nonreg_stores. DATA is the
224 instruction containing DEST. */
225
226static void
7bc980e1 227mark_nonreg_stores_2 (rtx dest, const_rtx pattern, void *data)
6fb5fa3c
DB
228{
229 if (GET_CODE (pattern) != CLOBBER && !REG_P (dest))
0ece9321 230 mark_insn ((rtx_insn *) data, false);
6fb5fa3c
DB
231}
232
233
234/* Mark INSN if BODY stores to a non-register destination. */
235
236static void
0ece9321 237mark_nonreg_stores (rtx body, rtx_insn *insn, bool fast)
6fb5fa3c
DB
238{
239 if (fast)
240 note_stores (body, mark_nonreg_stores_1, insn);
241 else
242 note_stores (body, mark_nonreg_stores_2, insn);
243}
244
245
2e0642cd
JJ
246/* Return true if store to MEM, starting OFF bytes from stack pointer,
247 is a call argument store, and clear corresponding bits from SP_BYTES
248 bitmap if it is. */
249
250static bool
251check_argument_store (rtx mem, HOST_WIDE_INT off, HOST_WIDE_INT min_sp_off,
252 HOST_WIDE_INT max_sp_off, bitmap sp_bytes)
253{
254 HOST_WIDE_INT byte;
255 for (byte = off; byte < off + GET_MODE_SIZE (GET_MODE (mem)); byte++)
256 {
257 if (byte < min_sp_off
258 || byte >= max_sp_off
259 || !bitmap_clear_bit (sp_bytes, byte - min_sp_off))
260 return false;
261 }
262 return true;
263}
264
265
0196c95e
JJ
266/* Try to find all stack stores of CALL_INSN arguments if
267 ACCUMULATE_OUTGOING_ARGS. If all stack stores have been found
268 and it is therefore safe to eliminate the call, return true,
269 otherwise return false. This function should be first called
270 with DO_MARK false, and only when the CALL_INSN is actually
271 going to be marked called again with DO_MARK true. */
272
273static bool
0ece9321 274find_call_stack_args (rtx_call_insn *call_insn, bool do_mark, bool fast,
0196c95e
JJ
275 bitmap arg_stores)
276{
0ece9321
DM
277 rtx p;
278 rtx_insn *insn, *prev_insn;
0196c95e
JJ
279 bool ret;
280 HOST_WIDE_INT min_sp_off, max_sp_off;
281 bitmap sp_bytes;
282
283 gcc_assert (CALL_P (call_insn));
284 if (!ACCUMULATE_OUTGOING_ARGS)
285 return true;
286
287 if (!do_mark)
288 {
289 gcc_assert (arg_stores);
290 bitmap_clear (arg_stores);
291 }
292
293 min_sp_off = INTTYPE_MAXIMUM (HOST_WIDE_INT);
294 max_sp_off = 0;
295
296 /* First determine the minimum and maximum offset from sp for
297 stored arguments. */
298 for (p = CALL_INSN_FUNCTION_USAGE (call_insn); p; p = XEXP (p, 1))
299 if (GET_CODE (XEXP (p, 0)) == USE
300 && MEM_P (XEXP (XEXP (p, 0), 0)))
301 {
f5541398
RS
302 rtx mem = XEXP (XEXP (p, 0), 0), addr;
303 HOST_WIDE_INT off = 0, size;
304 if (!MEM_SIZE_KNOWN_P (mem))
0196c95e 305 return false;
f5541398 306 size = MEM_SIZE (mem);
0196c95e
JJ
307 addr = XEXP (mem, 0);
308 if (GET_CODE (addr) == PLUS
309 && REG_P (XEXP (addr, 0))
310 && CONST_INT_P (XEXP (addr, 1)))
311 {
312 off = INTVAL (XEXP (addr, 1));
313 addr = XEXP (addr, 0);
314 }
315 if (addr != stack_pointer_rtx)
316 {
317 if (!REG_P (addr))
318 return false;
319 /* If not fast, use chains to see if addr wasn't set to
320 sp + offset. */
321 if (!fast)
322 {
bfac633a 323 df_ref use;
0196c95e
JJ
324 struct df_link *defs;
325 rtx set;
326
bfac633a
RS
327 FOR_EACH_INSN_USE (use, call_insn)
328 if (rtx_equal_p (addr, DF_REF_REG (use)))
0196c95e
JJ
329 break;
330
bfac633a 331 if (use == NULL)
0196c95e
JJ
332 return false;
333
bfac633a 334 for (defs = DF_REF_CHAIN (use); defs; defs = defs->next)
0196c95e
JJ
335 if (! DF_REF_IS_ARTIFICIAL (defs->ref))
336 break;
337
338 if (defs == NULL)
339 return false;
340
341 set = single_set (DF_REF_INSN (defs->ref));
342 if (!set)
343 return false;
344
345 if (GET_CODE (SET_SRC (set)) != PLUS
346 || XEXP (SET_SRC (set), 0) != stack_pointer_rtx
347 || !CONST_INT_P (XEXP (SET_SRC (set), 1)))
348 return false;
349
350 off += INTVAL (XEXP (SET_SRC (set), 1));
351 }
352 else
353 return false;
354 }
355 min_sp_off = MIN (min_sp_off, off);
f5541398 356 max_sp_off = MAX (max_sp_off, off + size);
0196c95e
JJ
357 }
358
359 if (min_sp_off >= max_sp_off)
360 return true;
361 sp_bytes = BITMAP_ALLOC (NULL);
362
363 /* Set bits in SP_BYTES bitmap for bytes relative to sp + min_sp_off
364 which contain arguments. Checking has been done in the previous
365 loop. */
366 for (p = CALL_INSN_FUNCTION_USAGE (call_insn); p; p = XEXP (p, 1))
367 if (GET_CODE (XEXP (p, 0)) == USE
368 && MEM_P (XEXP (XEXP (p, 0), 0)))
369 {
370 rtx mem = XEXP (XEXP (p, 0), 0), addr;
371 HOST_WIDE_INT off = 0, byte;
372 addr = XEXP (mem, 0);
373 if (GET_CODE (addr) == PLUS
374 && REG_P (XEXP (addr, 0))
375 && CONST_INT_P (XEXP (addr, 1)))
376 {
377 off = INTVAL (XEXP (addr, 1));
378 addr = XEXP (addr, 0);
379 }
380 if (addr != stack_pointer_rtx)
381 {
bfac633a 382 df_ref use;
0196c95e
JJ
383 struct df_link *defs;
384 rtx set;
385
bfac633a
RS
386 FOR_EACH_INSN_USE (use, call_insn)
387 if (rtx_equal_p (addr, DF_REF_REG (use)))
0196c95e
JJ
388 break;
389
bfac633a 390 for (defs = DF_REF_CHAIN (use); defs; defs = defs->next)
0196c95e
JJ
391 if (! DF_REF_IS_ARTIFICIAL (defs->ref))
392 break;
393
394 set = single_set (DF_REF_INSN (defs->ref));
395 off += INTVAL (XEXP (SET_SRC (set), 1));
396 }
f5541398 397 for (byte = off; byte < off + MEM_SIZE (mem); byte++)
0196c95e 398 {
821bb7f8
RG
399 if (!bitmap_set_bit (sp_bytes, byte - min_sp_off))
400 gcc_unreachable ();
0196c95e
JJ
401 }
402 }
403
404 /* Walk backwards, looking for argument stores. The search stops
750900db 405 when seeing another call, sp adjustment or memory store other than
0196c95e
JJ
406 argument store. */
407 ret = false;
408 for (insn = PREV_INSN (call_insn); insn; insn = prev_insn)
409 {
410 rtx set, mem, addr;
2e0642cd 411 HOST_WIDE_INT off;
0196c95e
JJ
412
413 if (insn == BB_HEAD (BLOCK_FOR_INSN (call_insn)))
0ece9321 414 prev_insn = NULL;
0196c95e
JJ
415 else
416 prev_insn = PREV_INSN (insn);
417
418 if (CALL_P (insn))
419 break;
420
2e0642cd 421 if (!NONDEBUG_INSN_P (insn))
0196c95e
JJ
422 continue;
423
424 set = single_set (insn);
425 if (!set || SET_DEST (set) == stack_pointer_rtx)
426 break;
427
428 if (!MEM_P (SET_DEST (set)))
429 continue;
430
431 mem = SET_DEST (set);
432 addr = XEXP (mem, 0);
433 off = 0;
434 if (GET_CODE (addr) == PLUS
435 && REG_P (XEXP (addr, 0))
436 && CONST_INT_P (XEXP (addr, 1)))
437 {
438 off = INTVAL (XEXP (addr, 1));
439 addr = XEXP (addr, 0);
440 }
441 if (addr != stack_pointer_rtx)
442 {
443 if (!REG_P (addr))
444 break;
445 if (!fast)
446 {
bfac633a 447 df_ref use;
0196c95e
JJ
448 struct df_link *defs;
449 rtx set;
450
bfac633a
RS
451 FOR_EACH_INSN_USE (use, insn)
452 if (rtx_equal_p (addr, DF_REF_REG (use)))
0196c95e
JJ
453 break;
454
bfac633a 455 if (use == NULL)
0196c95e
JJ
456 break;
457
bfac633a 458 for (defs = DF_REF_CHAIN (use); defs; defs = defs->next)
0196c95e
JJ
459 if (! DF_REF_IS_ARTIFICIAL (defs->ref))
460 break;
461
462 if (defs == NULL)
463 break;
464
465 set = single_set (DF_REF_INSN (defs->ref));
466 if (!set)
467 break;
468
469 if (GET_CODE (SET_SRC (set)) != PLUS
470 || XEXP (SET_SRC (set), 0) != stack_pointer_rtx
471 || !CONST_INT_P (XEXP (SET_SRC (set), 1)))
472 break;
473
474 off += INTVAL (XEXP (SET_SRC (set), 1));
475 }
476 else
477 break;
478 }
479
2e0642cd
JJ
480 if (GET_MODE_SIZE (GET_MODE (mem)) == 0
481 || !check_argument_store (mem, off, min_sp_off,
482 max_sp_off, sp_bytes))
0196c95e
JJ
483 break;
484
0196c95e
JJ
485 if (!deletable_insn_p (insn, fast, NULL))
486 break;
487
488 if (do_mark)
489 mark_insn (insn, fast);
490 else
491 bitmap_set_bit (arg_stores, INSN_UID (insn));
492
493 if (bitmap_empty_p (sp_bytes))
494 {
495 ret = true;
496 break;
497 }
498 }
499
500 BITMAP_FREE (sp_bytes);
501 if (!ret && arg_stores)
502 bitmap_clear (arg_stores);
503
504 return ret;
505}
506
507
885c9b5d
EB
508/* Remove all REG_EQUAL and REG_EQUIV notes referring to the registers INSN
509 writes to. */
6fb5fa3c
DB
510
511static void
0ece9321 512remove_reg_equal_equiv_notes_for_defs (rtx_insn *insn)
6fb5fa3c 513{
bfac633a 514 df_ref def;
885c9b5d 515
bfac633a
RS
516 FOR_EACH_INSN_DEF (def, insn)
517 remove_reg_equal_equiv_notes_for_regno (DF_REF_REGNO (def));
6fb5fa3c
DB
518}
519
a7a110bb
AO
520/* Scan all BBs for debug insns and reset those that reference values
521 defined in unmarked insns. */
522
523static void
524reset_unmarked_insns_debug_uses (void)
525{
526 basic_block bb;
0ece9321 527 rtx_insn *insn, *next;
a7a110bb 528
4f42035e 529 FOR_EACH_BB_REVERSE_FN (bb, cfun)
a7a110bb
AO
530 FOR_BB_INSNS_REVERSE_SAFE (bb, insn, next)
531 if (DEBUG_INSN_P (insn))
532 {
bfac633a 533 df_ref use;
a7a110bb 534
bfac633a 535 FOR_EACH_INSN_USE (use, insn)
a7a110bb 536 {
a7a110bb
AO
537 struct df_link *defs;
538 for (defs = DF_REF_CHAIN (use); defs; defs = defs->next)
539 {
0ece9321 540 rtx_insn *ref_insn;
a7a110bb
AO
541 if (DF_REF_IS_ARTIFICIAL (defs->ref))
542 continue;
8ced31fe
JJ
543 ref_insn = DF_REF_INSN (defs->ref);
544 if (!marked_insn_p (ref_insn))
a7a110bb
AO
545 break;
546 }
547 if (!defs)
548 continue;
549 /* ??? FIXME could we propagate the values assigned to
550 each of the DEFs? */
551 INSN_VAR_LOCATION_LOC (insn) = gen_rtx_UNKNOWN_VAR_LOC ();
552 df_insn_rescan_debug_internal (insn);
8ced31fe 553 break;
a7a110bb
AO
554 }
555 }
556}
6fb5fa3c 557
9ed7b221 558/* Delete every instruction that hasn't been marked. */
6fb5fa3c
DB
559
560static void
561delete_unmarked_insns (void)
562{
563 basic_block bb;
0ece9321 564 rtx_insn *insn, *next;
5ba5ab9b 565 bool must_clean = false;
6fb5fa3c 566
4f42035e 567 FOR_EACH_BB_REVERSE_FN (bb, cfun)
cd3f1729 568 FOR_BB_INSNS_REVERSE_SAFE (bb, insn, next)
a7a110bb 569 if (NONDEBUG_INSN_P (insn))
6fb5fa3c 570 {
9ed7b221 571 /* Always delete no-op moves. */
6fb5fa3c 572 if (noop_move_p (insn))
9ed7b221
EB
573 ;
574
9ed7b221 575 /* Otherwise rely only on the DCE algorithm. */
6fb5fa3c
DB
576 else if (marked_insn_p (insn))
577 continue;
578
cd3f1729
KZ
579 /* Beware that reaching a dbg counter limit here can result
580 in miscompiled file. This occurs when a group of insns
581 must be deleted together, typically because the kept insn
582 depends on the output from the deleted insn. Deleting
583 this insns in reverse order (both at the bb level and
584 when looking at the blocks) minimizes this, but does not
585 eliminate it, since it is possible for the using insn to
586 be top of a block and the producer to be at the bottom of
587 the block. However, in most cases this will only result
588 in an uninitialized use of an insn that is dead anyway.
589
590 However, there is one rare case that will cause a
591 miscompile: deletion of non-looping pure and constant
592 calls on a machine where ACCUMULATE_OUTGOING_ARGS is true.
593 In this case it is possible to remove the call, but leave
594 the argument pushes to the stack. Because of the changes
595 to the stack pointer, this will almost always lead to a
596 miscompile. */
6fb5fa3c
DB
597 if (!dbg_cnt (dce))
598 continue;
599
600 if (dump_file)
601 fprintf (dump_file, "DCE: Deleting insn %d\n", INSN_UID (insn));
602
885c9b5d 603 /* Before we delete the insn we have to remove the REG_EQUAL notes
9ed7b221 604 for the destination regs in order to avoid dangling notes. */
885c9b5d 605 remove_reg_equal_equiv_notes_for_defs (insn);
6fb5fa3c 606
5ba5ab9b
KZ
607 /* If a pure or const call is deleted, this may make the cfg
608 have unreachable blocks. We rememeber this and call
609 delete_unreachable_blocks at the end. */
610 if (CALL_P (insn))
611 must_clean = true;
612
9ed7b221 613 /* Now delete the insn. */
6fb5fa3c 614 delete_insn_and_edges (insn);
6fb5fa3c 615 }
5ba5ab9b
KZ
616
617 /* Deleted a pure or const call. */
618 if (must_clean)
619 delete_unreachable_blocks ();
6fb5fa3c
DB
620}
621
622
6fb5fa3c
DB
623/* Go through the instructions and mark those whose necessity is not
624 dependent on inter-instruction information. Make sure all other
625 instructions are not marked. */
626
627static void
628prescan_insns_for_dce (bool fast)
629{
630 basic_block bb;
0ece9321 631 rtx_insn *insn, *prev;
0196c95e
JJ
632 bitmap arg_stores = NULL;
633
6fb5fa3c
DB
634 if (dump_file)
635 fprintf (dump_file, "Finding needed instructions:\n");
0196c95e
JJ
636
637 if (!df_in_progress && ACCUMULATE_OUTGOING_ARGS)
638 arg_stores = BITMAP_ALLOC (NULL);
639
11cd3bed 640 FOR_EACH_BB_FN (bb, cfun)
0196c95e
JJ
641 {
642 FOR_BB_INSNS_REVERSE_SAFE (bb, insn, prev)
a7a110bb 643 if (NONDEBUG_INSN_P (insn))
0196c95e
JJ
644 {
645 /* Don't mark argument stores now. They will be marked
646 if needed when the associated CALL is marked. */
647 if (arg_stores && bitmap_bit_p (arg_stores, INSN_UID (insn)))
648 continue;
649 if (deletable_insn_p (insn, fast, arg_stores))
650 mark_nonreg_stores (PATTERN (insn), insn, fast);
651 else
652 mark_insn (insn, fast);
653 }
654 /* find_call_stack_args only looks at argument stores in the
655 same bb. */
656 if (arg_stores)
657 bitmap_clear (arg_stores);
658 }
659
660 if (arg_stores)
661 BITMAP_FREE (arg_stores);
6fb5fa3c
DB
662
663 if (dump_file)
664 fprintf (dump_file, "Finished finding needed instructions:\n");
665}
666
667
668/* UD-based DSE routines. */
669
6ed3da00 670/* Mark instructions that define artificially-used registers, such as
6fb5fa3c
DB
671 the frame pointer and the stack pointer. */
672
673static void
674mark_artificial_uses (void)
675{
676 basic_block bb;
677 struct df_link *defs;
292321a5 678 df_ref use;
6fb5fa3c 679
04a90bec 680 FOR_ALL_BB_FN (bb, cfun)
292321a5
RS
681 FOR_EACH_ARTIFICIAL_USE (use, bb->index)
682 for (defs = DF_REF_CHAIN (use); defs; defs = defs->next)
683 if (!DF_REF_IS_ARTIFICIAL (defs->ref))
684 mark_insn (DF_REF_INSN (defs->ref), false);
6fb5fa3c
DB
685}
686
2e6be65e 687
6fb5fa3c
DB
688/* Mark every instruction that defines a register value that INSN uses. */
689
690static void
0ece9321 691mark_reg_dependencies (rtx_insn *insn)
6fb5fa3c
DB
692{
693 struct df_link *defs;
bfac633a 694 df_ref use;
6fb5fa3c 695
b5b8b0ac
AO
696 if (DEBUG_INSN_P (insn))
697 return;
698
bfac633a 699 FOR_EACH_INSN_USE (use, insn)
6fb5fa3c 700 {
6fb5fa3c
DB
701 if (dump_file)
702 {
703 fprintf (dump_file, "Processing use of ");
704 print_simple_rtl (dump_file, DF_REF_REG (use));
705 fprintf (dump_file, " in insn %d:\n", INSN_UID (insn));
706 }
707 for (defs = DF_REF_CHAIN (use); defs; defs = defs->next)
50e94c7e
SB
708 if (! DF_REF_IS_ARTIFICIAL (defs->ref))
709 mark_insn (DF_REF_INSN (defs->ref), false);
6fb5fa3c
DB
710 }
711}
712
713
2e6be65e
EB
714/* Initialize global variables for a new DCE pass. */
715
6fb5fa3c 716static void
2e6be65e
EB
717init_dce (bool fast)
718{
719 if (!df_in_progress)
720 {
721 if (!fast)
7b19209f
SB
722 {
723 df_set_flags (DF_RD_PRUNE_DEAD_DEFS);
724 df_chain_add_problem (DF_UD_CHAIN);
725 }
2e6be65e
EB
726 df_analyze ();
727 }
728
729 if (dump_file)
730 df_dump (dump_file);
731
732 if (fast)
733 {
734 bitmap_obstack_initialize (&dce_blocks_bitmap_obstack);
735 bitmap_obstack_initialize (&dce_tmp_bitmap_obstack);
2da02156 736 can_alter_cfg = false;
2e6be65e 737 }
2da02156
EB
738 else
739 can_alter_cfg = true;
2e6be65e
EB
740
741 marked = sbitmap_alloc (get_max_uid () + 1);
f61e445a 742 bitmap_clear (marked);
2e6be65e
EB
743}
744
745
746/* Free the data allocated by init_dce. */
747
748static void
749fini_dce (bool fast)
6fb5fa3c
DB
750{
751 sbitmap_free (marked);
2e6be65e
EB
752
753 if (fast)
754 {
755 bitmap_obstack_release (&dce_blocks_bitmap_obstack);
756 bitmap_obstack_release (&dce_tmp_bitmap_obstack);
757 }
6fb5fa3c
DB
758}
759
760
761/* UD-chain based DCE. */
762
763static unsigned int
764rest_of_handle_ud_dce (void)
765{
0ece9321 766 rtx_insn *insn;
6fb5fa3c 767
6fb5fa3c
DB
768 init_dce (false);
769
770 prescan_insns_for_dce (false);
771 mark_artificial_uses ();
9771b263 772 while (worklist.length () > 0)
6fb5fa3c 773 {
9771b263 774 insn = worklist.pop ();
6fb5fa3c
DB
775 mark_reg_dependencies (insn);
776 }
9771b263 777 worklist.release ();
2e6be65e 778
a7a110bb
AO
779 if (MAY_HAVE_DEBUG_INSNS)
780 reset_unmarked_insns_debug_uses ();
781
6fb5fa3c
DB
782 /* Before any insns are deleted, we must remove the chains since
783 they are not bidirectional. */
784 df_remove_problem (df_chain);
785 delete_unmarked_insns ();
786
2e6be65e 787 fini_dce (false);
6fb5fa3c
DB
788 return 0;
789}
790
791
27a4cd48
DM
792namespace {
793
794const pass_data pass_data_ud_rtl_dce =
6fb5fa3c 795{
27a4cd48
DM
796 RTL_PASS, /* type */
797 "ud_dce", /* name */
798 OPTGROUP_NONE, /* optinfo_flags */
27a4cd48
DM
799 TV_DCE, /* tv_id */
800 0, /* properties_required */
801 0, /* properties_provided */
802 0, /* properties_destroyed */
803 0, /* todo_flags_start */
3bea341f 804 TODO_df_finish, /* todo_flags_finish */
6fb5fa3c
DB
805};
806
27a4cd48
DM
807class pass_ud_rtl_dce : public rtl_opt_pass
808{
809public:
c3284718
RS
810 pass_ud_rtl_dce (gcc::context *ctxt)
811 : rtl_opt_pass (pass_data_ud_rtl_dce, ctxt)
27a4cd48
DM
812 {}
813
814 /* opt_pass methods: */
1a3d085c
TS
815 virtual bool gate (function *)
816 {
817 return optimize > 1 && flag_dce && dbg_cnt (dce_ud);
818 }
819
be55bfe6
TS
820 virtual unsigned int execute (function *)
821 {
822 return rest_of_handle_ud_dce ();
823 }
27a4cd48
DM
824
825}; // class pass_ud_rtl_dce
826
827} // anon namespace
828
829rtl_opt_pass *
830make_pass_ud_rtl_dce (gcc::context *ctxt)
831{
832 return new pass_ud_rtl_dce (ctxt);
833}
834
2e6be65e 835
6fb5fa3c
DB
836/* -------------------------------------------------------------------------
837 Fast DCE functions
838 ------------------------------------------------------------------------- */
839
cc806ac1
RS
840/* Process basic block BB. Return true if the live_in set has
841 changed. REDO_OUT is true if the info at the bottom of the block
842 needs to be recalculated before starting. AU is the proper set of
e9f950ba
AO
843 artificial uses. Track global substitution of uses of dead pseudos
844 in debug insns using GLOBAL_DEBUG. */
6fb5fa3c
DB
845
846static bool
e9f950ba
AO
847word_dce_process_block (basic_block bb, bool redo_out,
848 struct dead_debug_global *global_debug)
6fb5fa3c
DB
849{
850 bitmap local_live = BITMAP_ALLOC (&dce_tmp_bitmap_obstack);
0ece9321 851 rtx_insn *insn;
6fb5fa3c 852 bool block_changed;
e9f950ba 853 struct dead_debug_local debug;
6fb5fa3c
DB
854
855 if (redo_out)
856 {
857 /* Need to redo the live_out set of this block if when one of
858 the succs of this block has had a change in it live in
859 set. */
860 edge e;
861 edge_iterator ei;
8d074192
BS
862 df_confluence_function_n con_fun_n = df_word_lr->problem->con_fun_n;
863 bitmap_clear (DF_WORD_LR_OUT (bb));
6fb5fa3c
DB
864 FOR_EACH_EDGE (e, ei, bb->succs)
865 (*con_fun_n) (e);
866 }
867
868 if (dump_file)
869 {
870 fprintf (dump_file, "processing block %d live out = ", bb->index);
8d074192 871 df_print_word_regset (dump_file, DF_WORD_LR_OUT (bb));
6fb5fa3c
DB
872 }
873
8d074192 874 bitmap_copy (local_live, DF_WORD_LR_OUT (bb));
e9f950ba 875 dead_debug_local_init (&debug, NULL, global_debug);
cc806ac1
RS
876
877 FOR_BB_INSNS_REVERSE (bb, insn)
1adbb361
AO
878 if (DEBUG_INSN_P (insn))
879 {
bfac633a
RS
880 df_ref use;
881 FOR_EACH_INSN_USE (use, insn)
882 if (DF_REF_REGNO (use) >= FIRST_PSEUDO_REGISTER
883 && (GET_MODE_SIZE (GET_MODE (DF_REF_REAL_REG (use)))
1adbb361 884 == 2 * UNITS_PER_WORD)
bfac633a
RS
885 && !bitmap_bit_p (local_live, 2 * DF_REF_REGNO (use))
886 && !bitmap_bit_p (local_live, 2 * DF_REF_REGNO (use) + 1))
887 dead_debug_add (&debug, use, DF_REF_REGNO (use));
1adbb361
AO
888 }
889 else if (INSN_P (insn))
cc806ac1 890 {
8d074192 891 bool any_changed;
1adbb361 892
cc806ac1
RS
893 /* No matter if the instruction is needed or not, we remove
894 any regno in the defs from the live set. */
8d074192
BS
895 any_changed = df_word_lr_simulate_defs (insn, local_live);
896 if (any_changed)
897 mark_insn (insn, true);
cc806ac1
RS
898
899 /* On the other hand, we do not allow the dead uses to set
900 anything in local_live. */
901 if (marked_insn_p (insn))
8d074192 902 df_word_lr_simulate_uses (insn, local_live);
6f9e260c 903
39bc0f01 904 /* Insert debug temps for dead REGs used in subsequent debug
6f9e260c
AO
905 insns. We may have to emit a debug temp even if the insn
906 was marked, in case the debug use was after the point of
907 death. */
908 if (debug.used && !bitmap_empty_p (debug.used))
1adbb361 909 {
bfac633a 910 df_ref def;
1adbb361 911
bfac633a
RS
912 FOR_EACH_INSN_DEF (def, insn)
913 dead_debug_insert_temp (&debug, DF_REF_REGNO (def), insn,
85d87497
JJ
914 marked_insn_p (insn)
915 && !control_flow_insn_p (insn)
916 ? DEBUG_TEMP_AFTER_WITH_REG_FORCE
917 : DEBUG_TEMP_BEFORE_WITH_VALUE);
1adbb361
AO
918 }
919
cc806ac1
RS
920 if (dump_file)
921 {
b8698a0f 922 fprintf (dump_file, "finished processing insn %d live out = ",
cc806ac1 923 INSN_UID (insn));
8d074192 924 df_print_word_regset (dump_file, local_live);
cc806ac1
RS
925 }
926 }
b8698a0f 927
8d074192 928 block_changed = !bitmap_equal_p (local_live, DF_WORD_LR_IN (bb));
cc806ac1 929 if (block_changed)
8d074192
BS
930 bitmap_copy (DF_WORD_LR_IN (bb), local_live);
931
e9f950ba 932 dead_debug_local_finish (&debug, NULL);
cc806ac1
RS
933 BITMAP_FREE (local_live);
934 return block_changed;
935}
936
937
938/* Process basic block BB. Return true if the live_in set has
939 changed. REDO_OUT is true if the info at the bottom of the block
940 needs to be recalculated before starting. AU is the proper set of
e9f950ba
AO
941 artificial uses. Track global substitution of uses of dead pseudos
942 in debug insns using GLOBAL_DEBUG. */
cc806ac1
RS
943
944static bool
e9f950ba
AO
945dce_process_block (basic_block bb, bool redo_out, bitmap au,
946 struct dead_debug_global *global_debug)
cc806ac1
RS
947{
948 bitmap local_live = BITMAP_ALLOC (&dce_tmp_bitmap_obstack);
0ece9321 949 rtx_insn *insn;
cc806ac1 950 bool block_changed;
bfac633a 951 df_ref def;
e9f950ba 952 struct dead_debug_local debug;
6fb5fa3c 953
cc806ac1 954 if (redo_out)
6fb5fa3c 955 {
cc806ac1
RS
956 /* Need to redo the live_out set of this block if when one of
957 the succs of this block has had a change in it live in
958 set. */
959 edge e;
960 edge_iterator ei;
961 df_confluence_function_n con_fun_n = df_lr->problem->con_fun_n;
962 bitmap_clear (DF_LR_OUT (bb));
963 FOR_EACH_EDGE (e, ei, bb->succs)
964 (*con_fun_n) (e);
6fb5fa3c
DB
965 }
966
cc806ac1 967 if (dump_file)
6fb5fa3c 968 {
fafe34f9 969 fprintf (dump_file, "processing block %d lr out = ", bb->index);
cc806ac1 970 df_print_regset (dump_file, DF_LR_OUT (bb));
6fb5fa3c
DB
971 }
972
cc806ac1
RS
973 bitmap_copy (local_live, DF_LR_OUT (bb));
974
02b47899 975 df_simulate_initialize_backwards (bb, local_live);
e9f950ba 976 dead_debug_local_init (&debug, NULL, global_debug);
541d3103 977
6fb5fa3c 978 FOR_BB_INSNS_REVERSE (bb, insn)
1adbb361
AO
979 if (DEBUG_INSN_P (insn))
980 {
bfac633a
RS
981 df_ref use;
982 FOR_EACH_INSN_USE (use, insn)
983 if (!bitmap_bit_p (local_live, DF_REF_REGNO (use))
984 && !bitmap_bit_p (au, DF_REF_REGNO (use)))
985 dead_debug_add (&debug, use, DF_REF_REGNO (use));
1adbb361
AO
986 }
987 else if (INSN_P (insn))
6fb5fa3c 988 {
f251709a 989 bool needed = marked_insn_p (insn);
9ed7b221
EB
990
991 /* The insn is needed if there is someone who uses the output. */
f251709a 992 if (!needed)
bfac633a
RS
993 FOR_EACH_INSN_DEF (def, insn)
994 if (bitmap_bit_p (local_live, DF_REF_REGNO (def))
995 || bitmap_bit_p (au, DF_REF_REGNO (def)))
39bc0f01
AO
996 {
997 needed = true;
998 mark_insn (insn, true);
999 break;
1000 }
b8698a0f 1001
6fb5fa3c
DB
1002 /* No matter if the instruction is needed or not, we remove
1003 any regno in the defs from the live set. */
1004 df_simulate_defs (insn, local_live);
1005
1006 /* On the other hand, we do not allow the dead uses to set
1007 anything in local_live. */
f251709a 1008 if (needed)
6fb5fa3c 1009 df_simulate_uses (insn, local_live);
6f9e260c 1010
39bc0f01 1011 /* Insert debug temps for dead REGs used in subsequent debug
6f9e260c
AO
1012 insns. We may have to emit a debug temp even if the insn
1013 was marked, in case the debug use was after the point of
1014 death. */
1015 if (debug.used && !bitmap_empty_p (debug.used))
bfac633a
RS
1016 FOR_EACH_INSN_DEF (def, insn)
1017 dead_debug_insert_temp (&debug, DF_REF_REGNO (def), insn,
85d87497
JJ
1018 needed && !control_flow_insn_p (insn)
1019 ? DEBUG_TEMP_AFTER_WITH_REG_FORCE
1020 : DEBUG_TEMP_BEFORE_WITH_VALUE);
6fb5fa3c 1021 }
b8698a0f 1022
e9f950ba 1023 dead_debug_local_finish (&debug, NULL);
02b47899 1024 df_simulate_finalize_backwards (bb, local_live);
6fb5fa3c
DB
1025
1026 block_changed = !bitmap_equal_p (local_live, DF_LR_IN (bb));
1027 if (block_changed)
1028 bitmap_copy (DF_LR_IN (bb), local_live);
1029
1030 BITMAP_FREE (local_live);
1031 return block_changed;
1032}
1033
2e6be65e 1034
8d074192
BS
1035/* Perform fast DCE once initialization is done. If WORD_LEVEL is
1036 true, use the word level dce, otherwise do it at the pseudo
cc806ac1 1037 level. */
2e6be65e 1038
6fb5fa3c 1039static void
8d074192 1040fast_dce (bool word_level)
6fb5fa3c
DB
1041{
1042 int *postorder = df_get_postorder (DF_BACKWARD);
1043 int n_blocks = df_get_n_blocks (DF_BACKWARD);
6fb5fa3c
DB
1044 /* The set of blocks that have been seen on this iteration. */
1045 bitmap processed = BITMAP_ALLOC (&dce_blocks_bitmap_obstack);
1046 /* The set of blocks that need to have the out vectors reset because
1047 the in of one of their successors has changed. */
1048 bitmap redo_out = BITMAP_ALLOC (&dce_blocks_bitmap_obstack);
1049 bitmap all_blocks = BITMAP_ALLOC (&dce_blocks_bitmap_obstack);
1050 bool global_changed = true;
cc806ac1
RS
1051
1052 /* These regs are considered always live so if they end up dying
1053 because of some def, we need to bring the back again. Calling
1054 df_simulate_fixup_sets has the disadvantage of calling
1055 bb_has_eh_pred once per insn, so we cache the information
1056 here. */
a7e3698d
JH
1057 bitmap au = &df->regular_block_artificial_uses;
1058 bitmap au_eh = &df->eh_block_artificial_uses;
9ed7b221 1059 int i;
e9f950ba 1060 struct dead_debug_global global_debug;
6fb5fa3c
DB
1061
1062 prescan_insns_for_dce (true);
1063
1064 for (i = 0; i < n_blocks; i++)
1065 bitmap_set_bit (all_blocks, postorder[i]);
1066
e9f950ba
AO
1067 dead_debug_global_init (&global_debug, NULL);
1068
6fb5fa3c
DB
1069 while (global_changed)
1070 {
1071 global_changed = false;
9ed7b221 1072
6fb5fa3c
DB
1073 for (i = 0; i < n_blocks; i++)
1074 {
1075 int index = postorder[i];
06e28de2 1076 basic_block bb = BASIC_BLOCK_FOR_FN (cfun, index);
6fb5fa3c
DB
1077 bool local_changed;
1078
1079 if (index < NUM_FIXED_BLOCKS)
1080 {
1081 bitmap_set_bit (processed, index);
1082 continue;
1083 }
1084
8d074192 1085 if (word_level)
b8698a0f 1086 local_changed
e9f950ba
AO
1087 = word_dce_process_block (bb, bitmap_bit_p (redo_out, index),
1088 &global_debug);
cc806ac1 1089 else
b8698a0f 1090 local_changed
cc806ac1 1091 = dce_process_block (bb, bitmap_bit_p (redo_out, index),
e9f950ba
AO
1092 bb_has_eh_pred (bb) ? au_eh : au,
1093 &global_debug);
6fb5fa3c 1094 bitmap_set_bit (processed, index);
b8698a0f 1095
6fb5fa3c
DB
1096 if (local_changed)
1097 {
1098 edge e;
1099 edge_iterator ei;
1100 FOR_EACH_EDGE (e, ei, bb->preds)
1101 if (bitmap_bit_p (processed, e->src->index))
1102 /* Be tricky about when we need to iterate the
1103 analysis. We only have redo the analysis if the
1104 bitmaps change at the top of a block that is the
1105 entry to a loop. */
1106 global_changed = true;
1107 else
1108 bitmap_set_bit (redo_out, e->src->index);
1109 }
1110 }
b8698a0f 1111
6fb5fa3c
DB
1112 if (global_changed)
1113 {
1114 /* Turn off the RUN_DCE flag to prevent recursive calls to
1115 dce. */
1116 int old_flag = df_clear_flags (DF_LR_RUN_DCE);
1117
1118 /* So something was deleted that requires a redo. Do it on
1119 the cheap. */
1120 delete_unmarked_insns ();
f61e445a 1121 bitmap_clear (marked);
6fb5fa3c
DB
1122 bitmap_clear (processed);
1123 bitmap_clear (redo_out);
b8698a0f 1124
6fb5fa3c
DB
1125 /* We do not need to rescan any instructions. We only need
1126 to redo the dataflow equations for the blocks that had a
1127 change at the top of the block. Then we need to redo the
b8698a0f 1128 iteration. */
8d074192
BS
1129 if (word_level)
1130 df_analyze_problem (df_word_lr, all_blocks, postorder, n_blocks);
cc806ac1
RS
1131 else
1132 df_analyze_problem (df_lr, all_blocks, postorder, n_blocks);
6fb5fa3c
DB
1133
1134 if (old_flag & DF_LR_RUN_DCE)
1135 df_set_flags (DF_LR_RUN_DCE);
9ed7b221 1136
6fb5fa3c
DB
1137 prescan_insns_for_dce (true);
1138 }
6fb5fa3c
DB
1139 }
1140
e9f950ba
AO
1141 dead_debug_global_finish (&global_debug, NULL);
1142
6fb5fa3c
DB
1143 delete_unmarked_insns ();
1144
1145 BITMAP_FREE (processed);
1146 BITMAP_FREE (redo_out);
1147 BITMAP_FREE (all_blocks);
1148}
1149
1150
cc806ac1 1151/* Fast register level DCE. */
6fb5fa3c
DB
1152
1153static unsigned int
1154rest_of_handle_fast_dce (void)
1155{
1156 init_dce (true);
cc806ac1
RS
1157 fast_dce (false);
1158 fini_dce (true);
1159 return 0;
1160}
1161
1162
1163/* Fast byte level DCE. */
1164
8d074192
BS
1165void
1166run_word_dce (void)
cc806ac1 1167{
25aef556
BS
1168 int old_flags;
1169
1170 if (!flag_dce)
1171 return;
1172
8d074192 1173 timevar_push (TV_DCE);
25aef556 1174 old_flags = df_clear_flags (DF_DEFER_INSN_RESCAN + DF_NO_INSN_RESCAN);
8d074192 1175 df_word_lr_add_problem ();
cc806ac1
RS
1176 init_dce (true);
1177 fast_dce (true);
2e6be65e 1178 fini_dce (true);
25aef556 1179 df_set_flags (old_flags);
8d074192 1180 timevar_pop (TV_DCE);
6fb5fa3c
DB
1181}
1182
1183
1184/* This is an internal call that is used by the df live register
1185 problem to run fast dce as a side effect of creating the live
1186 information. The stack is organized so that the lr problem is run,
1187 this pass is run, which updates the live info and the df scanning
1188 info, and then returns to allow the rest of the problems to be run.
1189
1190 This can be called by elsewhere but it will not update the bit
2e6be65e 1191 vectors for any other problems than LR. */
6fb5fa3c
DB
1192
1193void
1194run_fast_df_dce (void)
1195{
1196 if (flag_dce)
1197 {
1198 /* If dce is able to delete something, it has to happen
1199 immediately. Otherwise there will be problems handling the
1200 eq_notes. */
81f40b79
ILT
1201 int old_flags =
1202 df_clear_flags (DF_DEFER_INSN_RESCAN + DF_NO_INSN_RESCAN);
1203
6fb5fa3c
DB
1204 df_in_progress = true;
1205 rest_of_handle_fast_dce ();
2e6be65e
EB
1206 df_in_progress = false;
1207
6fb5fa3c
DB
1208 df_set_flags (old_flags);
1209 }
1210}
1211
2e6be65e 1212
9ed7b221
EB
1213/* Run a fast DCE pass. */
1214
1215void
1216run_fast_dce (void)
6fb5fa3c 1217{
9ed7b221
EB
1218 if (flag_dce)
1219 rest_of_handle_fast_dce ();
6fb5fa3c
DB
1220}
1221
1222
27a4cd48
DM
1223namespace {
1224
1225const pass_data pass_data_fast_rtl_dce =
6fb5fa3c 1226{
27a4cd48
DM
1227 RTL_PASS, /* type */
1228 "rtl_dce", /* name */
1229 OPTGROUP_NONE, /* optinfo_flags */
27a4cd48
DM
1230 TV_DCE, /* tv_id */
1231 0, /* properties_required */
1232 0, /* properties_provided */
1233 0, /* properties_destroyed */
1234 0, /* todo_flags_start */
3bea341f 1235 TODO_df_finish, /* todo_flags_finish */
6fb5fa3c 1236};
27a4cd48
DM
1237
1238class pass_fast_rtl_dce : public rtl_opt_pass
1239{
1240public:
c3284718
RS
1241 pass_fast_rtl_dce (gcc::context *ctxt)
1242 : rtl_opt_pass (pass_data_fast_rtl_dce, ctxt)
27a4cd48
DM
1243 {}
1244
1245 /* opt_pass methods: */
1a3d085c
TS
1246 virtual bool gate (function *)
1247 {
1248 return optimize > 0 && flag_dce && dbg_cnt (dce_fast);
1249 }
1250
be55bfe6
TS
1251 virtual unsigned int execute (function *)
1252 {
1253 return rest_of_handle_fast_dce ();
1254 }
27a4cd48
DM
1255
1256}; // class pass_fast_rtl_dce
1257
1258} // anon namespace
1259
1260rtl_opt_pass *
1261make_pass_fast_rtl_dce (gcc::context *ctxt)
1262{
1263 return new pass_fast_rtl_dce (ctxt);
1264}