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6fb5fa3c 1/* RTL dead code elimination.
23a5b65a 2 Copyright (C) 2005-2014 Free Software Foundation, Inc.
6fb5fa3c
DB
3
4This file is part of GCC.
5
6GCC is free software; you can redistribute it and/or modify it under
7the terms of the GNU General Public License as published by the Free
9dcd6f09 8Software Foundation; either version 3, or (at your option) any later
6fb5fa3c
DB
9version.
10
11GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12WARRANTY; without even the implied warranty of MERCHANTABILITY or
13FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14for more details.
15
16You should have received a copy of the GNU General Public License
9dcd6f09
NC
17along with GCC; see the file COPYING3. If not see
18<http://www.gnu.org/licenses/>. */
6fb5fa3c
DB
19
20#include "config.h"
21#include "system.h"
22#include "coretypes.h"
23#include "hashtab.h"
24#include "tm.h"
25#include "rtl.h"
26#include "tree.h"
27#include "regs.h"
28#include "hard-reg-set.h"
29#include "flags.h"
35debead 30#include "except.h"
6fb5fa3c
DB
31#include "df.h"
32#include "cselib.h"
33#include "dce.h"
08df6c0d 34#include "valtrack.h"
6fb5fa3c
DB
35#include "tree-pass.h"
36#include "dbgcnt.h"
0196c95e 37#include "tm_p.h"
5936d944 38#include "emit-rtl.h" /* FIXME: Can go away once crtl is moved to rtl.h. */
6fb5fa3c 39
6fb5fa3c
DB
40
41/* -------------------------------------------------------------------------
42 Core mark/delete routines
43 ------------------------------------------------------------------------- */
44
2e6be65e
EB
45/* True if we are invoked while the df engine is running; in this case,
46 we don't want to reenter it. */
6fb5fa3c
DB
47static bool df_in_progress = false;
48
2da02156
EB
49/* True if we are allowed to alter the CFG in this pass. */
50static bool can_alter_cfg = false;
51
6fb5fa3c
DB
52/* Instructions that have been marked but whose dependencies have not
53 yet been processed. */
9771b263 54static vec<rtx> worklist;
6fb5fa3c 55
2e6be65e
EB
56/* Bitmap of instructions marked as needed indexed by INSN_UID. */
57static sbitmap marked;
58
59/* Bitmap obstacks used for block processing by the fast algorithm. */
6fb5fa3c
DB
60static bitmap_obstack dce_blocks_bitmap_obstack;
61static bitmap_obstack dce_tmp_bitmap_obstack;
62
0196c95e 63static bool find_call_stack_args (rtx, bool, bool, bitmap);
6fb5fa3c 64
d4d7f1d1
RS
65/* A subroutine for which BODY is part of the instruction being tested;
66 either the top-level pattern, or an element of a PARALLEL. The
67 instruction is known not to be a bare USE or CLOBBER. */
6fb5fa3c
DB
68
69static bool
d4d7f1d1 70deletable_insn_p_1 (rtx body)
6fb5fa3c 71{
6cad9859 72 switch (GET_CODE (body))
6fb5fa3c 73 {
6fb5fa3c
DB
74 case PREFETCH:
75 case TRAP_IF:
76 /* The UNSPEC case was added here because the ia-64 claims that
77 USEs do not work after reload and generates UNSPECS rather
78 than USEs. Since dce is run after reload we need to avoid
79 deleting these even if they are dead. If it turns out that
80 USEs really do work after reload, the ia-64 should be
81 changed, and the UNSPEC case can be removed. */
82 case UNSPEC:
83 return false;
84
d4d7f1d1 85 default:
1d65f45c 86 return !volatile_refs_p (body);
d4d7f1d1
RS
87 }
88}
89
2e6be65e 90
d4d7f1d1
RS
91/* Return true if INSN is a normal instruction that can be deleted by
92 the DCE pass. */
93
94static bool
0196c95e 95deletable_insn_p (rtx insn, bool fast, bitmap arg_stores)
d4d7f1d1
RS
96{
97 rtx body, x;
98 int i;
bfac633a 99 df_ref def;
d4d7f1d1 100
5ba5ab9b
KZ
101 if (CALL_P (insn)
102 /* We cannot delete calls inside of the recursive dce because
103 this may cause basic blocks to be deleted and this messes up
104 the rest of the stack of optimization passes. */
105 && (!df_in_progress)
106 /* We cannot delete pure or const sibling calls because it is
107 hard to see the result. */
becfd6e5 108 && (!SIBLING_CALL_P (insn))
5ba5ab9b
KZ
109 /* We can delete dead const or pure calls as long as they do not
110 infinite loop. */
becfd6e5
KZ
111 && (RTL_CONST_OR_PURE_CALL_P (insn)
112 && !RTL_LOOPING_CONST_OR_PURE_CALL_P (insn)))
0196c95e 113 return find_call_stack_args (insn, false, fast, arg_stores);
becfd6e5 114
642d55de
EB
115 /* Don't delete jumps, notes and the like. */
116 if (!NONJUMP_INSN_P (insn))
117 return false;
118
2da02156
EB
119 /* Don't delete insns that may throw if we cannot do so. */
120 if (!(cfun->can_delete_dead_exceptions && can_alter_cfg)
121 && !insn_nothrow_p (insn))
642d55de
EB
122 return false;
123
211d71a7 124 /* If INSN sets a global_reg, leave it untouched. */
bfac633a
RS
125 FOR_EACH_INSN_DEF (def, insn)
126 if (HARD_REGISTER_NUM_P (DF_REF_REGNO (def))
127 && global_regs[DF_REF_REGNO (def)])
211d71a7
SB
128 return false;
129
d4d7f1d1
RS
130 body = PATTERN (insn);
131 switch (GET_CODE (body))
132 {
133 case USE:
b5b8b0ac 134 case VAR_LOCATION:
d4d7f1d1
RS
135 return false;
136
6fb5fa3c
DB
137 case CLOBBER:
138 if (fast)
139 {
140 /* A CLOBBER of a dead pseudo register serves no purpose.
141 That is not necessarily true for hard registers until
142 after reload. */
6cad9859 143 x = XEXP (body, 0);
6fb5fa3c
DB
144 return REG_P (x) && (!HARD_REGISTER_P (x) || reload_completed);
145 }
d4d7f1d1 146 else
6fb5fa3c
DB
147 /* Because of the way that use-def chains are built, it is not
148 possible to tell if the clobber is dead because it can
149 never be the target of a use-def chain. */
150 return false;
151
6cad9859 152 case PARALLEL:
d4d7f1d1
RS
153 for (i = XVECLEN (body, 0) - 1; i >= 0; i--)
154 if (!deletable_insn_p_1 (XVECEXP (body, 0, i)))
155 return false;
156 return true;
6cad9859 157
6fb5fa3c 158 default:
d4d7f1d1 159 return deletable_insn_p_1 (body);
6fb5fa3c
DB
160 }
161}
162
163
2e6be65e 164/* Return true if INSN has been marked as needed. */
6fb5fa3c
DB
165
166static inline int
167marked_insn_p (rtx insn)
168{
50e94c7e
SB
169 /* Artificial defs are always needed and they do not have an insn.
170 We should never see them here. */
171 gcc_assert (insn);
d7c028c0 172 return bitmap_bit_p (marked, INSN_UID (insn));
6fb5fa3c
DB
173}
174
175
176/* If INSN has not yet been marked as needed, mark it now, and add it to
177 the worklist. */
178
179static void
180mark_insn (rtx insn, bool fast)
181{
182 if (!marked_insn_p (insn))
183 {
184 if (!fast)
9771b263 185 worklist.safe_push (insn);
d7c028c0 186 bitmap_set_bit (marked, INSN_UID (insn));
6fb5fa3c
DB
187 if (dump_file)
188 fprintf (dump_file, " Adding insn %d to worklist\n", INSN_UID (insn));
0196c95e
JJ
189 if (CALL_P (insn)
190 && !df_in_progress
191 && !SIBLING_CALL_P (insn)
192 && (RTL_CONST_OR_PURE_CALL_P (insn)
193 && !RTL_LOOPING_CONST_OR_PURE_CALL_P (insn)))
194 find_call_stack_args (insn, true, fast, NULL);
6fb5fa3c
DB
195 }
196}
197
198
199/* A note_stores callback used by mark_nonreg_stores. DATA is the
200 instruction containing DEST. */
201
202static void
7bc980e1 203mark_nonreg_stores_1 (rtx dest, const_rtx pattern, void *data)
6fb5fa3c
DB
204{
205 if (GET_CODE (pattern) != CLOBBER && !REG_P (dest))
206 mark_insn ((rtx) data, true);
207}
208
209
210/* A note_stores callback used by mark_nonreg_stores. DATA is the
211 instruction containing DEST. */
212
213static void
7bc980e1 214mark_nonreg_stores_2 (rtx dest, const_rtx pattern, void *data)
6fb5fa3c
DB
215{
216 if (GET_CODE (pattern) != CLOBBER && !REG_P (dest))
217 mark_insn ((rtx) data, false);
218}
219
220
221/* Mark INSN if BODY stores to a non-register destination. */
222
223static void
224mark_nonreg_stores (rtx body, rtx insn, bool fast)
225{
226 if (fast)
227 note_stores (body, mark_nonreg_stores_1, insn);
228 else
229 note_stores (body, mark_nonreg_stores_2, insn);
230}
231
232
2e0642cd
JJ
233/* Return true if store to MEM, starting OFF bytes from stack pointer,
234 is a call argument store, and clear corresponding bits from SP_BYTES
235 bitmap if it is. */
236
237static bool
238check_argument_store (rtx mem, HOST_WIDE_INT off, HOST_WIDE_INT min_sp_off,
239 HOST_WIDE_INT max_sp_off, bitmap sp_bytes)
240{
241 HOST_WIDE_INT byte;
242 for (byte = off; byte < off + GET_MODE_SIZE (GET_MODE (mem)); byte++)
243 {
244 if (byte < min_sp_off
245 || byte >= max_sp_off
246 || !bitmap_clear_bit (sp_bytes, byte - min_sp_off))
247 return false;
248 }
249 return true;
250}
251
252
0196c95e
JJ
253/* Try to find all stack stores of CALL_INSN arguments if
254 ACCUMULATE_OUTGOING_ARGS. If all stack stores have been found
255 and it is therefore safe to eliminate the call, return true,
256 otherwise return false. This function should be first called
257 with DO_MARK false, and only when the CALL_INSN is actually
258 going to be marked called again with DO_MARK true. */
259
260static bool
261find_call_stack_args (rtx call_insn, bool do_mark, bool fast,
262 bitmap arg_stores)
263{
264 rtx p, insn, prev_insn;
265 bool ret;
266 HOST_WIDE_INT min_sp_off, max_sp_off;
267 bitmap sp_bytes;
268
269 gcc_assert (CALL_P (call_insn));
270 if (!ACCUMULATE_OUTGOING_ARGS)
271 return true;
272
273 if (!do_mark)
274 {
275 gcc_assert (arg_stores);
276 bitmap_clear (arg_stores);
277 }
278
279 min_sp_off = INTTYPE_MAXIMUM (HOST_WIDE_INT);
280 max_sp_off = 0;
281
282 /* First determine the minimum and maximum offset from sp for
283 stored arguments. */
284 for (p = CALL_INSN_FUNCTION_USAGE (call_insn); p; p = XEXP (p, 1))
285 if (GET_CODE (XEXP (p, 0)) == USE
286 && MEM_P (XEXP (XEXP (p, 0), 0)))
287 {
f5541398
RS
288 rtx mem = XEXP (XEXP (p, 0), 0), addr;
289 HOST_WIDE_INT off = 0, size;
290 if (!MEM_SIZE_KNOWN_P (mem))
0196c95e 291 return false;
f5541398 292 size = MEM_SIZE (mem);
0196c95e
JJ
293 addr = XEXP (mem, 0);
294 if (GET_CODE (addr) == PLUS
295 && REG_P (XEXP (addr, 0))
296 && CONST_INT_P (XEXP (addr, 1)))
297 {
298 off = INTVAL (XEXP (addr, 1));
299 addr = XEXP (addr, 0);
300 }
301 if (addr != stack_pointer_rtx)
302 {
303 if (!REG_P (addr))
304 return false;
305 /* If not fast, use chains to see if addr wasn't set to
306 sp + offset. */
307 if (!fast)
308 {
bfac633a 309 df_ref use;
0196c95e
JJ
310 struct df_link *defs;
311 rtx set;
312
bfac633a
RS
313 FOR_EACH_INSN_USE (use, call_insn)
314 if (rtx_equal_p (addr, DF_REF_REG (use)))
0196c95e
JJ
315 break;
316
bfac633a 317 if (use == NULL)
0196c95e
JJ
318 return false;
319
bfac633a 320 for (defs = DF_REF_CHAIN (use); defs; defs = defs->next)
0196c95e
JJ
321 if (! DF_REF_IS_ARTIFICIAL (defs->ref))
322 break;
323
324 if (defs == NULL)
325 return false;
326
327 set = single_set (DF_REF_INSN (defs->ref));
328 if (!set)
329 return false;
330
331 if (GET_CODE (SET_SRC (set)) != PLUS
332 || XEXP (SET_SRC (set), 0) != stack_pointer_rtx
333 || !CONST_INT_P (XEXP (SET_SRC (set), 1)))
334 return false;
335
336 off += INTVAL (XEXP (SET_SRC (set), 1));
337 }
338 else
339 return false;
340 }
341 min_sp_off = MIN (min_sp_off, off);
f5541398 342 max_sp_off = MAX (max_sp_off, off + size);
0196c95e
JJ
343 }
344
345 if (min_sp_off >= max_sp_off)
346 return true;
347 sp_bytes = BITMAP_ALLOC (NULL);
348
349 /* Set bits in SP_BYTES bitmap for bytes relative to sp + min_sp_off
350 which contain arguments. Checking has been done in the previous
351 loop. */
352 for (p = CALL_INSN_FUNCTION_USAGE (call_insn); p; p = XEXP (p, 1))
353 if (GET_CODE (XEXP (p, 0)) == USE
354 && MEM_P (XEXP (XEXP (p, 0), 0)))
355 {
356 rtx mem = XEXP (XEXP (p, 0), 0), addr;
357 HOST_WIDE_INT off = 0, byte;
358 addr = XEXP (mem, 0);
359 if (GET_CODE (addr) == PLUS
360 && REG_P (XEXP (addr, 0))
361 && CONST_INT_P (XEXP (addr, 1)))
362 {
363 off = INTVAL (XEXP (addr, 1));
364 addr = XEXP (addr, 0);
365 }
366 if (addr != stack_pointer_rtx)
367 {
bfac633a 368 df_ref use;
0196c95e
JJ
369 struct df_link *defs;
370 rtx set;
371
bfac633a
RS
372 FOR_EACH_INSN_USE (use, call_insn)
373 if (rtx_equal_p (addr, DF_REF_REG (use)))
0196c95e
JJ
374 break;
375
bfac633a 376 for (defs = DF_REF_CHAIN (use); defs; defs = defs->next)
0196c95e
JJ
377 if (! DF_REF_IS_ARTIFICIAL (defs->ref))
378 break;
379
380 set = single_set (DF_REF_INSN (defs->ref));
381 off += INTVAL (XEXP (SET_SRC (set), 1));
382 }
f5541398 383 for (byte = off; byte < off + MEM_SIZE (mem); byte++)
0196c95e 384 {
821bb7f8
RG
385 if (!bitmap_set_bit (sp_bytes, byte - min_sp_off))
386 gcc_unreachable ();
0196c95e
JJ
387 }
388 }
389
390 /* Walk backwards, looking for argument stores. The search stops
750900db 391 when seeing another call, sp adjustment or memory store other than
0196c95e
JJ
392 argument store. */
393 ret = false;
394 for (insn = PREV_INSN (call_insn); insn; insn = prev_insn)
395 {
396 rtx set, mem, addr;
2e0642cd 397 HOST_WIDE_INT off;
0196c95e
JJ
398
399 if (insn == BB_HEAD (BLOCK_FOR_INSN (call_insn)))
400 prev_insn = NULL_RTX;
401 else
402 prev_insn = PREV_INSN (insn);
403
404 if (CALL_P (insn))
405 break;
406
2e0642cd 407 if (!NONDEBUG_INSN_P (insn))
0196c95e
JJ
408 continue;
409
410 set = single_set (insn);
411 if (!set || SET_DEST (set) == stack_pointer_rtx)
412 break;
413
414 if (!MEM_P (SET_DEST (set)))
415 continue;
416
417 mem = SET_DEST (set);
418 addr = XEXP (mem, 0);
419 off = 0;
420 if (GET_CODE (addr) == PLUS
421 && REG_P (XEXP (addr, 0))
422 && CONST_INT_P (XEXP (addr, 1)))
423 {
424 off = INTVAL (XEXP (addr, 1));
425 addr = XEXP (addr, 0);
426 }
427 if (addr != stack_pointer_rtx)
428 {
429 if (!REG_P (addr))
430 break;
431 if (!fast)
432 {
bfac633a 433 df_ref use;
0196c95e
JJ
434 struct df_link *defs;
435 rtx set;
436
bfac633a
RS
437 FOR_EACH_INSN_USE (use, insn)
438 if (rtx_equal_p (addr, DF_REF_REG (use)))
0196c95e
JJ
439 break;
440
bfac633a 441 if (use == NULL)
0196c95e
JJ
442 break;
443
bfac633a 444 for (defs = DF_REF_CHAIN (use); defs; defs = defs->next)
0196c95e
JJ
445 if (! DF_REF_IS_ARTIFICIAL (defs->ref))
446 break;
447
448 if (defs == NULL)
449 break;
450
451 set = single_set (DF_REF_INSN (defs->ref));
452 if (!set)
453 break;
454
455 if (GET_CODE (SET_SRC (set)) != PLUS
456 || XEXP (SET_SRC (set), 0) != stack_pointer_rtx
457 || !CONST_INT_P (XEXP (SET_SRC (set), 1)))
458 break;
459
460 off += INTVAL (XEXP (SET_SRC (set), 1));
461 }
462 else
463 break;
464 }
465
2e0642cd
JJ
466 if (GET_MODE_SIZE (GET_MODE (mem)) == 0
467 || !check_argument_store (mem, off, min_sp_off,
468 max_sp_off, sp_bytes))
0196c95e
JJ
469 break;
470
0196c95e
JJ
471 if (!deletable_insn_p (insn, fast, NULL))
472 break;
473
474 if (do_mark)
475 mark_insn (insn, fast);
476 else
477 bitmap_set_bit (arg_stores, INSN_UID (insn));
478
479 if (bitmap_empty_p (sp_bytes))
480 {
481 ret = true;
482 break;
483 }
484 }
485
486 BITMAP_FREE (sp_bytes);
487 if (!ret && arg_stores)
488 bitmap_clear (arg_stores);
489
490 return ret;
491}
492
493
885c9b5d
EB
494/* Remove all REG_EQUAL and REG_EQUIV notes referring to the registers INSN
495 writes to. */
6fb5fa3c
DB
496
497static void
885c9b5d 498remove_reg_equal_equiv_notes_for_defs (rtx insn)
6fb5fa3c 499{
bfac633a 500 df_ref def;
885c9b5d 501
bfac633a
RS
502 FOR_EACH_INSN_DEF (def, insn)
503 remove_reg_equal_equiv_notes_for_regno (DF_REF_REGNO (def));
6fb5fa3c
DB
504}
505
a7a110bb
AO
506/* Scan all BBs for debug insns and reset those that reference values
507 defined in unmarked insns. */
508
509static void
510reset_unmarked_insns_debug_uses (void)
511{
512 basic_block bb;
513 rtx insn, next;
514
4f42035e 515 FOR_EACH_BB_REVERSE_FN (bb, cfun)
a7a110bb
AO
516 FOR_BB_INSNS_REVERSE_SAFE (bb, insn, next)
517 if (DEBUG_INSN_P (insn))
518 {
bfac633a 519 df_ref use;
a7a110bb 520
bfac633a 521 FOR_EACH_INSN_USE (use, insn)
a7a110bb 522 {
a7a110bb
AO
523 struct df_link *defs;
524 for (defs = DF_REF_CHAIN (use); defs; defs = defs->next)
525 {
8ced31fe 526 rtx ref_insn;
a7a110bb
AO
527 if (DF_REF_IS_ARTIFICIAL (defs->ref))
528 continue;
8ced31fe
JJ
529 ref_insn = DF_REF_INSN (defs->ref);
530 if (!marked_insn_p (ref_insn))
a7a110bb
AO
531 break;
532 }
533 if (!defs)
534 continue;
535 /* ??? FIXME could we propagate the values assigned to
536 each of the DEFs? */
537 INSN_VAR_LOCATION_LOC (insn) = gen_rtx_UNKNOWN_VAR_LOC ();
538 df_insn_rescan_debug_internal (insn);
8ced31fe 539 break;
a7a110bb
AO
540 }
541 }
542}
6fb5fa3c 543
9ed7b221 544/* Delete every instruction that hasn't been marked. */
6fb5fa3c
DB
545
546static void
547delete_unmarked_insns (void)
548{
549 basic_block bb;
550 rtx insn, next;
5ba5ab9b 551 bool must_clean = false;
6fb5fa3c 552
4f42035e 553 FOR_EACH_BB_REVERSE_FN (bb, cfun)
cd3f1729 554 FOR_BB_INSNS_REVERSE_SAFE (bb, insn, next)
a7a110bb 555 if (NONDEBUG_INSN_P (insn))
6fb5fa3c 556 {
9ed7b221 557 /* Always delete no-op moves. */
6fb5fa3c 558 if (noop_move_p (insn))
9ed7b221
EB
559 ;
560
9ed7b221 561 /* Otherwise rely only on the DCE algorithm. */
6fb5fa3c
DB
562 else if (marked_insn_p (insn))
563 continue;
564
cd3f1729
KZ
565 /* Beware that reaching a dbg counter limit here can result
566 in miscompiled file. This occurs when a group of insns
567 must be deleted together, typically because the kept insn
568 depends on the output from the deleted insn. Deleting
569 this insns in reverse order (both at the bb level and
570 when looking at the blocks) minimizes this, but does not
571 eliminate it, since it is possible for the using insn to
572 be top of a block and the producer to be at the bottom of
573 the block. However, in most cases this will only result
574 in an uninitialized use of an insn that is dead anyway.
575
576 However, there is one rare case that will cause a
577 miscompile: deletion of non-looping pure and constant
578 calls on a machine where ACCUMULATE_OUTGOING_ARGS is true.
579 In this case it is possible to remove the call, but leave
580 the argument pushes to the stack. Because of the changes
581 to the stack pointer, this will almost always lead to a
582 miscompile. */
6fb5fa3c
DB
583 if (!dbg_cnt (dce))
584 continue;
585
586 if (dump_file)
587 fprintf (dump_file, "DCE: Deleting insn %d\n", INSN_UID (insn));
588
885c9b5d 589 /* Before we delete the insn we have to remove the REG_EQUAL notes
9ed7b221 590 for the destination regs in order to avoid dangling notes. */
885c9b5d 591 remove_reg_equal_equiv_notes_for_defs (insn);
6fb5fa3c 592
5ba5ab9b
KZ
593 /* If a pure or const call is deleted, this may make the cfg
594 have unreachable blocks. We rememeber this and call
595 delete_unreachable_blocks at the end. */
596 if (CALL_P (insn))
597 must_clean = true;
598
9ed7b221 599 /* Now delete the insn. */
6fb5fa3c 600 delete_insn_and_edges (insn);
6fb5fa3c 601 }
5ba5ab9b
KZ
602
603 /* Deleted a pure or const call. */
604 if (must_clean)
605 delete_unreachable_blocks ();
6fb5fa3c
DB
606}
607
608
6fb5fa3c
DB
609/* Go through the instructions and mark those whose necessity is not
610 dependent on inter-instruction information. Make sure all other
611 instructions are not marked. */
612
613static void
614prescan_insns_for_dce (bool fast)
615{
616 basic_block bb;
0196c95e
JJ
617 rtx insn, prev;
618 bitmap arg_stores = NULL;
619
6fb5fa3c
DB
620 if (dump_file)
621 fprintf (dump_file, "Finding needed instructions:\n");
0196c95e
JJ
622
623 if (!df_in_progress && ACCUMULATE_OUTGOING_ARGS)
624 arg_stores = BITMAP_ALLOC (NULL);
625
11cd3bed 626 FOR_EACH_BB_FN (bb, cfun)
0196c95e
JJ
627 {
628 FOR_BB_INSNS_REVERSE_SAFE (bb, insn, prev)
a7a110bb 629 if (NONDEBUG_INSN_P (insn))
0196c95e
JJ
630 {
631 /* Don't mark argument stores now. They will be marked
632 if needed when the associated CALL is marked. */
633 if (arg_stores && bitmap_bit_p (arg_stores, INSN_UID (insn)))
634 continue;
635 if (deletable_insn_p (insn, fast, arg_stores))
636 mark_nonreg_stores (PATTERN (insn), insn, fast);
637 else
638 mark_insn (insn, fast);
639 }
640 /* find_call_stack_args only looks at argument stores in the
641 same bb. */
642 if (arg_stores)
643 bitmap_clear (arg_stores);
644 }
645
646 if (arg_stores)
647 BITMAP_FREE (arg_stores);
6fb5fa3c
DB
648
649 if (dump_file)
650 fprintf (dump_file, "Finished finding needed instructions:\n");
651}
652
653
654/* UD-based DSE routines. */
655
6ed3da00 656/* Mark instructions that define artificially-used registers, such as
6fb5fa3c
DB
657 the frame pointer and the stack pointer. */
658
659static void
660mark_artificial_uses (void)
661{
662 basic_block bb;
663 struct df_link *defs;
57512f53 664 df_ref *use_rec;
6fb5fa3c 665
04a90bec 666 FOR_ALL_BB_FN (bb, cfun)
6fb5fa3c 667 {
b8698a0f 668 for (use_rec = df_get_artificial_uses (bb->index);
6fb5fa3c
DB
669 *use_rec; use_rec++)
670 for (defs = DF_REF_CHAIN (*use_rec); defs; defs = defs->next)
50e94c7e
SB
671 if (! DF_REF_IS_ARTIFICIAL (defs->ref))
672 mark_insn (DF_REF_INSN (defs->ref), false);
6fb5fa3c
DB
673 }
674}
675
2e6be65e 676
6fb5fa3c
DB
677/* Mark every instruction that defines a register value that INSN uses. */
678
679static void
680mark_reg_dependencies (rtx insn)
681{
682 struct df_link *defs;
bfac633a 683 df_ref use;
6fb5fa3c 684
b5b8b0ac
AO
685 if (DEBUG_INSN_P (insn))
686 return;
687
bfac633a 688 FOR_EACH_INSN_USE (use, insn)
6fb5fa3c 689 {
6fb5fa3c
DB
690 if (dump_file)
691 {
692 fprintf (dump_file, "Processing use of ");
693 print_simple_rtl (dump_file, DF_REF_REG (use));
694 fprintf (dump_file, " in insn %d:\n", INSN_UID (insn));
695 }
696 for (defs = DF_REF_CHAIN (use); defs; defs = defs->next)
50e94c7e
SB
697 if (! DF_REF_IS_ARTIFICIAL (defs->ref))
698 mark_insn (DF_REF_INSN (defs->ref), false);
6fb5fa3c
DB
699 }
700}
701
702
2e6be65e
EB
703/* Initialize global variables for a new DCE pass. */
704
6fb5fa3c 705static void
2e6be65e
EB
706init_dce (bool fast)
707{
708 if (!df_in_progress)
709 {
710 if (!fast)
7b19209f
SB
711 {
712 df_set_flags (DF_RD_PRUNE_DEAD_DEFS);
713 df_chain_add_problem (DF_UD_CHAIN);
714 }
2e6be65e
EB
715 df_analyze ();
716 }
717
718 if (dump_file)
719 df_dump (dump_file);
720
721 if (fast)
722 {
723 bitmap_obstack_initialize (&dce_blocks_bitmap_obstack);
724 bitmap_obstack_initialize (&dce_tmp_bitmap_obstack);
2da02156 725 can_alter_cfg = false;
2e6be65e 726 }
2da02156
EB
727 else
728 can_alter_cfg = true;
2e6be65e
EB
729
730 marked = sbitmap_alloc (get_max_uid () + 1);
f61e445a 731 bitmap_clear (marked);
2e6be65e
EB
732}
733
734
735/* Free the data allocated by init_dce. */
736
737static void
738fini_dce (bool fast)
6fb5fa3c
DB
739{
740 sbitmap_free (marked);
2e6be65e
EB
741
742 if (fast)
743 {
744 bitmap_obstack_release (&dce_blocks_bitmap_obstack);
745 bitmap_obstack_release (&dce_tmp_bitmap_obstack);
746 }
6fb5fa3c
DB
747}
748
749
750/* UD-chain based DCE. */
751
752static unsigned int
753rest_of_handle_ud_dce (void)
754{
755 rtx insn;
756
6fb5fa3c
DB
757 init_dce (false);
758
759 prescan_insns_for_dce (false);
760 mark_artificial_uses ();
9771b263 761 while (worklist.length () > 0)
6fb5fa3c 762 {
9771b263 763 insn = worklist.pop ();
6fb5fa3c
DB
764 mark_reg_dependencies (insn);
765 }
9771b263 766 worklist.release ();
2e6be65e 767
a7a110bb
AO
768 if (MAY_HAVE_DEBUG_INSNS)
769 reset_unmarked_insns_debug_uses ();
770
6fb5fa3c
DB
771 /* Before any insns are deleted, we must remove the chains since
772 they are not bidirectional. */
773 df_remove_problem (df_chain);
774 delete_unmarked_insns ();
775
2e6be65e 776 fini_dce (false);
6fb5fa3c
DB
777 return 0;
778}
779
780
27a4cd48
DM
781namespace {
782
783const pass_data pass_data_ud_rtl_dce =
6fb5fa3c 784{
27a4cd48
DM
785 RTL_PASS, /* type */
786 "ud_dce", /* name */
787 OPTGROUP_NONE, /* optinfo_flags */
27a4cd48
DM
788 true, /* has_execute */
789 TV_DCE, /* tv_id */
790 0, /* properties_required */
791 0, /* properties_provided */
792 0, /* properties_destroyed */
793 0, /* todo_flags_start */
3bea341f 794 TODO_df_finish, /* todo_flags_finish */
6fb5fa3c
DB
795};
796
27a4cd48
DM
797class pass_ud_rtl_dce : public rtl_opt_pass
798{
799public:
c3284718
RS
800 pass_ud_rtl_dce (gcc::context *ctxt)
801 : rtl_opt_pass (pass_data_ud_rtl_dce, ctxt)
27a4cd48
DM
802 {}
803
804 /* opt_pass methods: */
1a3d085c
TS
805 virtual bool gate (function *)
806 {
807 return optimize > 1 && flag_dce && dbg_cnt (dce_ud);
808 }
809
be55bfe6
TS
810 virtual unsigned int execute (function *)
811 {
812 return rest_of_handle_ud_dce ();
813 }
27a4cd48
DM
814
815}; // class pass_ud_rtl_dce
816
817} // anon namespace
818
819rtl_opt_pass *
820make_pass_ud_rtl_dce (gcc::context *ctxt)
821{
822 return new pass_ud_rtl_dce (ctxt);
823}
824
2e6be65e 825
6fb5fa3c
DB
826/* -------------------------------------------------------------------------
827 Fast DCE functions
828 ------------------------------------------------------------------------- */
829
cc806ac1
RS
830/* Process basic block BB. Return true if the live_in set has
831 changed. REDO_OUT is true if the info at the bottom of the block
832 needs to be recalculated before starting. AU is the proper set of
e9f950ba
AO
833 artificial uses. Track global substitution of uses of dead pseudos
834 in debug insns using GLOBAL_DEBUG. */
6fb5fa3c
DB
835
836static bool
e9f950ba
AO
837word_dce_process_block (basic_block bb, bool redo_out,
838 struct dead_debug_global *global_debug)
6fb5fa3c
DB
839{
840 bitmap local_live = BITMAP_ALLOC (&dce_tmp_bitmap_obstack);
841 rtx insn;
842 bool block_changed;
e9f950ba 843 struct dead_debug_local debug;
6fb5fa3c
DB
844
845 if (redo_out)
846 {
847 /* Need to redo the live_out set of this block if when one of
848 the succs of this block has had a change in it live in
849 set. */
850 edge e;
851 edge_iterator ei;
8d074192
BS
852 df_confluence_function_n con_fun_n = df_word_lr->problem->con_fun_n;
853 bitmap_clear (DF_WORD_LR_OUT (bb));
6fb5fa3c
DB
854 FOR_EACH_EDGE (e, ei, bb->succs)
855 (*con_fun_n) (e);
856 }
857
858 if (dump_file)
859 {
860 fprintf (dump_file, "processing block %d live out = ", bb->index);
8d074192 861 df_print_word_regset (dump_file, DF_WORD_LR_OUT (bb));
6fb5fa3c
DB
862 }
863
8d074192 864 bitmap_copy (local_live, DF_WORD_LR_OUT (bb));
e9f950ba 865 dead_debug_local_init (&debug, NULL, global_debug);
cc806ac1
RS
866
867 FOR_BB_INSNS_REVERSE (bb, insn)
1adbb361
AO
868 if (DEBUG_INSN_P (insn))
869 {
bfac633a
RS
870 df_ref use;
871 FOR_EACH_INSN_USE (use, insn)
872 if (DF_REF_REGNO (use) >= FIRST_PSEUDO_REGISTER
873 && (GET_MODE_SIZE (GET_MODE (DF_REF_REAL_REG (use)))
1adbb361 874 == 2 * UNITS_PER_WORD)
bfac633a
RS
875 && !bitmap_bit_p (local_live, 2 * DF_REF_REGNO (use))
876 && !bitmap_bit_p (local_live, 2 * DF_REF_REGNO (use) + 1))
877 dead_debug_add (&debug, use, DF_REF_REGNO (use));
1adbb361
AO
878 }
879 else if (INSN_P (insn))
cc806ac1 880 {
8d074192 881 bool any_changed;
1adbb361 882
cc806ac1
RS
883 /* No matter if the instruction is needed or not, we remove
884 any regno in the defs from the live set. */
8d074192
BS
885 any_changed = df_word_lr_simulate_defs (insn, local_live);
886 if (any_changed)
887 mark_insn (insn, true);
cc806ac1
RS
888
889 /* On the other hand, we do not allow the dead uses to set
890 anything in local_live. */
891 if (marked_insn_p (insn))
8d074192 892 df_word_lr_simulate_uses (insn, local_live);
6f9e260c 893
39bc0f01 894 /* Insert debug temps for dead REGs used in subsequent debug
6f9e260c
AO
895 insns. We may have to emit a debug temp even if the insn
896 was marked, in case the debug use was after the point of
897 death. */
898 if (debug.used && !bitmap_empty_p (debug.used))
1adbb361 899 {
bfac633a 900 df_ref def;
1adbb361 901
bfac633a
RS
902 FOR_EACH_INSN_DEF (def, insn)
903 dead_debug_insert_temp (&debug, DF_REF_REGNO (def), insn,
85d87497
JJ
904 marked_insn_p (insn)
905 && !control_flow_insn_p (insn)
906 ? DEBUG_TEMP_AFTER_WITH_REG_FORCE
907 : DEBUG_TEMP_BEFORE_WITH_VALUE);
1adbb361
AO
908 }
909
cc806ac1
RS
910 if (dump_file)
911 {
b8698a0f 912 fprintf (dump_file, "finished processing insn %d live out = ",
cc806ac1 913 INSN_UID (insn));
8d074192 914 df_print_word_regset (dump_file, local_live);
cc806ac1
RS
915 }
916 }
b8698a0f 917
8d074192 918 block_changed = !bitmap_equal_p (local_live, DF_WORD_LR_IN (bb));
cc806ac1 919 if (block_changed)
8d074192
BS
920 bitmap_copy (DF_WORD_LR_IN (bb), local_live);
921
e9f950ba 922 dead_debug_local_finish (&debug, NULL);
cc806ac1
RS
923 BITMAP_FREE (local_live);
924 return block_changed;
925}
926
927
928/* Process basic block BB. Return true if the live_in set has
929 changed. REDO_OUT is true if the info at the bottom of the block
930 needs to be recalculated before starting. AU is the proper set of
e9f950ba
AO
931 artificial uses. Track global substitution of uses of dead pseudos
932 in debug insns using GLOBAL_DEBUG. */
cc806ac1
RS
933
934static bool
e9f950ba
AO
935dce_process_block (basic_block bb, bool redo_out, bitmap au,
936 struct dead_debug_global *global_debug)
cc806ac1
RS
937{
938 bitmap local_live = BITMAP_ALLOC (&dce_tmp_bitmap_obstack);
939 rtx insn;
940 bool block_changed;
bfac633a 941 df_ref def;
e9f950ba 942 struct dead_debug_local debug;
6fb5fa3c 943
cc806ac1 944 if (redo_out)
6fb5fa3c 945 {
cc806ac1
RS
946 /* Need to redo the live_out set of this block if when one of
947 the succs of this block has had a change in it live in
948 set. */
949 edge e;
950 edge_iterator ei;
951 df_confluence_function_n con_fun_n = df_lr->problem->con_fun_n;
952 bitmap_clear (DF_LR_OUT (bb));
953 FOR_EACH_EDGE (e, ei, bb->succs)
954 (*con_fun_n) (e);
6fb5fa3c
DB
955 }
956
cc806ac1 957 if (dump_file)
6fb5fa3c 958 {
fafe34f9 959 fprintf (dump_file, "processing block %d lr out = ", bb->index);
cc806ac1 960 df_print_regset (dump_file, DF_LR_OUT (bb));
6fb5fa3c
DB
961 }
962
cc806ac1
RS
963 bitmap_copy (local_live, DF_LR_OUT (bb));
964
02b47899 965 df_simulate_initialize_backwards (bb, local_live);
e9f950ba 966 dead_debug_local_init (&debug, NULL, global_debug);
541d3103 967
6fb5fa3c 968 FOR_BB_INSNS_REVERSE (bb, insn)
1adbb361
AO
969 if (DEBUG_INSN_P (insn))
970 {
bfac633a
RS
971 df_ref use;
972 FOR_EACH_INSN_USE (use, insn)
973 if (!bitmap_bit_p (local_live, DF_REF_REGNO (use))
974 && !bitmap_bit_p (au, DF_REF_REGNO (use)))
975 dead_debug_add (&debug, use, DF_REF_REGNO (use));
1adbb361
AO
976 }
977 else if (INSN_P (insn))
6fb5fa3c 978 {
f251709a 979 bool needed = marked_insn_p (insn);
9ed7b221
EB
980
981 /* The insn is needed if there is someone who uses the output. */
f251709a 982 if (!needed)
bfac633a
RS
983 FOR_EACH_INSN_DEF (def, insn)
984 if (bitmap_bit_p (local_live, DF_REF_REGNO (def))
985 || bitmap_bit_p (au, DF_REF_REGNO (def)))
39bc0f01
AO
986 {
987 needed = true;
988 mark_insn (insn, true);
989 break;
990 }
b8698a0f 991
6fb5fa3c
DB
992 /* No matter if the instruction is needed or not, we remove
993 any regno in the defs from the live set. */
994 df_simulate_defs (insn, local_live);
995
996 /* On the other hand, we do not allow the dead uses to set
997 anything in local_live. */
f251709a 998 if (needed)
6fb5fa3c 999 df_simulate_uses (insn, local_live);
6f9e260c 1000
39bc0f01 1001 /* Insert debug temps for dead REGs used in subsequent debug
6f9e260c
AO
1002 insns. We may have to emit a debug temp even if the insn
1003 was marked, in case the debug use was after the point of
1004 death. */
1005 if (debug.used && !bitmap_empty_p (debug.used))
bfac633a
RS
1006 FOR_EACH_INSN_DEF (def, insn)
1007 dead_debug_insert_temp (&debug, DF_REF_REGNO (def), insn,
85d87497
JJ
1008 needed && !control_flow_insn_p (insn)
1009 ? DEBUG_TEMP_AFTER_WITH_REG_FORCE
1010 : DEBUG_TEMP_BEFORE_WITH_VALUE);
6fb5fa3c 1011 }
b8698a0f 1012
e9f950ba 1013 dead_debug_local_finish (&debug, NULL);
02b47899 1014 df_simulate_finalize_backwards (bb, local_live);
6fb5fa3c
DB
1015
1016 block_changed = !bitmap_equal_p (local_live, DF_LR_IN (bb));
1017 if (block_changed)
1018 bitmap_copy (DF_LR_IN (bb), local_live);
1019
1020 BITMAP_FREE (local_live);
1021 return block_changed;
1022}
1023
2e6be65e 1024
8d074192
BS
1025/* Perform fast DCE once initialization is done. If WORD_LEVEL is
1026 true, use the word level dce, otherwise do it at the pseudo
cc806ac1 1027 level. */
2e6be65e 1028
6fb5fa3c 1029static void
8d074192 1030fast_dce (bool word_level)
6fb5fa3c
DB
1031{
1032 int *postorder = df_get_postorder (DF_BACKWARD);
1033 int n_blocks = df_get_n_blocks (DF_BACKWARD);
6fb5fa3c
DB
1034 /* The set of blocks that have been seen on this iteration. */
1035 bitmap processed = BITMAP_ALLOC (&dce_blocks_bitmap_obstack);
1036 /* The set of blocks that need to have the out vectors reset because
1037 the in of one of their successors has changed. */
1038 bitmap redo_out = BITMAP_ALLOC (&dce_blocks_bitmap_obstack);
1039 bitmap all_blocks = BITMAP_ALLOC (&dce_blocks_bitmap_obstack);
1040 bool global_changed = true;
cc806ac1
RS
1041
1042 /* These regs are considered always live so if they end up dying
1043 because of some def, we need to bring the back again. Calling
1044 df_simulate_fixup_sets has the disadvantage of calling
1045 bb_has_eh_pred once per insn, so we cache the information
1046 here. */
a7e3698d
JH
1047 bitmap au = &df->regular_block_artificial_uses;
1048 bitmap au_eh = &df->eh_block_artificial_uses;
9ed7b221 1049 int i;
e9f950ba 1050 struct dead_debug_global global_debug;
6fb5fa3c
DB
1051
1052 prescan_insns_for_dce (true);
1053
1054 for (i = 0; i < n_blocks; i++)
1055 bitmap_set_bit (all_blocks, postorder[i]);
1056
e9f950ba
AO
1057 dead_debug_global_init (&global_debug, NULL);
1058
6fb5fa3c
DB
1059 while (global_changed)
1060 {
1061 global_changed = false;
9ed7b221 1062
6fb5fa3c
DB
1063 for (i = 0; i < n_blocks; i++)
1064 {
1065 int index = postorder[i];
06e28de2 1066 basic_block bb = BASIC_BLOCK_FOR_FN (cfun, index);
6fb5fa3c
DB
1067 bool local_changed;
1068
1069 if (index < NUM_FIXED_BLOCKS)
1070 {
1071 bitmap_set_bit (processed, index);
1072 continue;
1073 }
1074
8d074192 1075 if (word_level)
b8698a0f 1076 local_changed
e9f950ba
AO
1077 = word_dce_process_block (bb, bitmap_bit_p (redo_out, index),
1078 &global_debug);
cc806ac1 1079 else
b8698a0f 1080 local_changed
cc806ac1 1081 = dce_process_block (bb, bitmap_bit_p (redo_out, index),
e9f950ba
AO
1082 bb_has_eh_pred (bb) ? au_eh : au,
1083 &global_debug);
6fb5fa3c 1084 bitmap_set_bit (processed, index);
b8698a0f 1085
6fb5fa3c
DB
1086 if (local_changed)
1087 {
1088 edge e;
1089 edge_iterator ei;
1090 FOR_EACH_EDGE (e, ei, bb->preds)
1091 if (bitmap_bit_p (processed, e->src->index))
1092 /* Be tricky about when we need to iterate the
1093 analysis. We only have redo the analysis if the
1094 bitmaps change at the top of a block that is the
1095 entry to a loop. */
1096 global_changed = true;
1097 else
1098 bitmap_set_bit (redo_out, e->src->index);
1099 }
1100 }
b8698a0f 1101
6fb5fa3c
DB
1102 if (global_changed)
1103 {
1104 /* Turn off the RUN_DCE flag to prevent recursive calls to
1105 dce. */
1106 int old_flag = df_clear_flags (DF_LR_RUN_DCE);
1107
1108 /* So something was deleted that requires a redo. Do it on
1109 the cheap. */
1110 delete_unmarked_insns ();
f61e445a 1111 bitmap_clear (marked);
6fb5fa3c
DB
1112 bitmap_clear (processed);
1113 bitmap_clear (redo_out);
b8698a0f 1114
6fb5fa3c
DB
1115 /* We do not need to rescan any instructions. We only need
1116 to redo the dataflow equations for the blocks that had a
1117 change at the top of the block. Then we need to redo the
b8698a0f 1118 iteration. */
8d074192
BS
1119 if (word_level)
1120 df_analyze_problem (df_word_lr, all_blocks, postorder, n_blocks);
cc806ac1
RS
1121 else
1122 df_analyze_problem (df_lr, all_blocks, postorder, n_blocks);
6fb5fa3c
DB
1123
1124 if (old_flag & DF_LR_RUN_DCE)
1125 df_set_flags (DF_LR_RUN_DCE);
9ed7b221 1126
6fb5fa3c
DB
1127 prescan_insns_for_dce (true);
1128 }
6fb5fa3c
DB
1129 }
1130
e9f950ba
AO
1131 dead_debug_global_finish (&global_debug, NULL);
1132
6fb5fa3c
DB
1133 delete_unmarked_insns ();
1134
1135 BITMAP_FREE (processed);
1136 BITMAP_FREE (redo_out);
1137 BITMAP_FREE (all_blocks);
1138}
1139
1140
cc806ac1 1141/* Fast register level DCE. */
6fb5fa3c
DB
1142
1143static unsigned int
1144rest_of_handle_fast_dce (void)
1145{
1146 init_dce (true);
cc806ac1
RS
1147 fast_dce (false);
1148 fini_dce (true);
1149 return 0;
1150}
1151
1152
1153/* Fast byte level DCE. */
1154
8d074192
BS
1155void
1156run_word_dce (void)
cc806ac1 1157{
25aef556
BS
1158 int old_flags;
1159
1160 if (!flag_dce)
1161 return;
1162
8d074192 1163 timevar_push (TV_DCE);
25aef556 1164 old_flags = df_clear_flags (DF_DEFER_INSN_RESCAN + DF_NO_INSN_RESCAN);
8d074192 1165 df_word_lr_add_problem ();
cc806ac1
RS
1166 init_dce (true);
1167 fast_dce (true);
2e6be65e 1168 fini_dce (true);
25aef556 1169 df_set_flags (old_flags);
8d074192 1170 timevar_pop (TV_DCE);
6fb5fa3c
DB
1171}
1172
1173
1174/* This is an internal call that is used by the df live register
1175 problem to run fast dce as a side effect of creating the live
1176 information. The stack is organized so that the lr problem is run,
1177 this pass is run, which updates the live info and the df scanning
1178 info, and then returns to allow the rest of the problems to be run.
1179
1180 This can be called by elsewhere but it will not update the bit
2e6be65e 1181 vectors for any other problems than LR. */
6fb5fa3c
DB
1182
1183void
1184run_fast_df_dce (void)
1185{
1186 if (flag_dce)
1187 {
1188 /* If dce is able to delete something, it has to happen
1189 immediately. Otherwise there will be problems handling the
1190 eq_notes. */
81f40b79
ILT
1191 int old_flags =
1192 df_clear_flags (DF_DEFER_INSN_RESCAN + DF_NO_INSN_RESCAN);
1193
6fb5fa3c
DB
1194 df_in_progress = true;
1195 rest_of_handle_fast_dce ();
2e6be65e
EB
1196 df_in_progress = false;
1197
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DB
1198 df_set_flags (old_flags);
1199 }
1200}
1201
2e6be65e 1202
9ed7b221
EB
1203/* Run a fast DCE pass. */
1204
1205void
1206run_fast_dce (void)
6fb5fa3c 1207{
9ed7b221
EB
1208 if (flag_dce)
1209 rest_of_handle_fast_dce ();
6fb5fa3c
DB
1210}
1211
1212
27a4cd48
DM
1213namespace {
1214
1215const pass_data pass_data_fast_rtl_dce =
6fb5fa3c 1216{
27a4cd48
DM
1217 RTL_PASS, /* type */
1218 "rtl_dce", /* name */
1219 OPTGROUP_NONE, /* optinfo_flags */
27a4cd48
DM
1220 true, /* has_execute */
1221 TV_DCE, /* tv_id */
1222 0, /* properties_required */
1223 0, /* properties_provided */
1224 0, /* properties_destroyed */
1225 0, /* todo_flags_start */
3bea341f 1226 TODO_df_finish, /* todo_flags_finish */
6fb5fa3c 1227};
27a4cd48
DM
1228
1229class pass_fast_rtl_dce : public rtl_opt_pass
1230{
1231public:
c3284718
RS
1232 pass_fast_rtl_dce (gcc::context *ctxt)
1233 : rtl_opt_pass (pass_data_fast_rtl_dce, ctxt)
27a4cd48
DM
1234 {}
1235
1236 /* opt_pass methods: */
1a3d085c
TS
1237 virtual bool gate (function *)
1238 {
1239 return optimize > 0 && flag_dce && dbg_cnt (dce_fast);
1240 }
1241
be55bfe6
TS
1242 virtual unsigned int execute (function *)
1243 {
1244 return rest_of_handle_fast_dce ();
1245 }
27a4cd48
DM
1246
1247}; // class pass_fast_rtl_dce
1248
1249} // anon namespace
1250
1251rtl_opt_pass *
1252make_pass_fast_rtl_dce (gcc::context *ctxt)
1253{
1254 return new pass_fast_rtl_dce (ctxt);
1255}