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85ec4feb | 1 | @c Copyright (C) 1988-2018 Free Software Foundation, Inc. |
89045fd1 JL |
2 | @c This is part of the GCC manual. |
3 | @c For copying conditions, see the file gcc.texi. | |
4 | ||
5 | @node RTL | |
6 | @chapter RTL Representation | |
7 | @cindex RTL representation | |
8 | @cindex representation of RTL | |
9 | @cindex Register Transfer Language (RTL) | |
10 | ||
94324dae EB |
11 | The last part of the compiler work is done on a low-level intermediate |
12 | representation called Register Transfer Language. In this language, the | |
13 | instructions to be output are described, pretty much one by one, in an | |
14 | algebraic form that describes what the instruction does. | |
89045fd1 JL |
15 | |
16 | RTL is inspired by Lisp lists. It has both an internal form, made up of | |
17 | structures that point at other structures, and a textual form that is used | |
18 | in the machine description and in printed debugging dumps. The textual | |
19 | form uses nested parentheses to indicate the pointers in the internal form. | |
20 | ||
21 | @menu | |
22 | * RTL Objects:: Expressions vs vectors vs strings vs integers. | |
c771326b | 23 | * RTL Classes:: Categories of RTL expression objects, and their structure. |
89045fd1 | 24 | * Accessors:: Macros to access expression operands or vector elts. |
3568b0ef | 25 | * Special Accessors:: Macros to access specific annotations on RTL. |
89045fd1 JL |
26 | * Flags:: Other flags in an RTL expression. |
27 | * Machine Modes:: Describing the size and format of a datum. | |
28 | * Constants:: Expressions with constant values. | |
29 | * Regs and Memory:: Expressions representing register contents or memory. | |
30 | * Arithmetic:: Expressions representing arithmetic on other expressions. | |
31 | * Comparisons:: Expressions representing comparison of expressions. | |
c771326b | 32 | * Bit-Fields:: Expressions representing bit-fields in memory or reg. |
f9f27ee5 | 33 | * Vector Operations:: Expressions involving vector datatypes. |
89045fd1 JL |
34 | * Conversions:: Extending, truncating, floating or fixing. |
35 | * RTL Declarations:: Declaring volatility, constancy, etc. | |
36 | * Side Effects:: Expressions for storing in registers, etc. | |
37 | * Incdec:: Embedded side-effects for autoincrement addressing. | |
38 | * Assembler:: Representing @code{asm} with operands. | |
38be945b | 39 | * Debug Information:: Expressions representing debugging information. |
89045fd1 JL |
40 | * Insns:: Expression types for entire insns. |
41 | * Calls:: RTL representation of function call insns. | |
42 | * Sharing:: Some expressions are unique; others *must* be copied. | |
43 | * Reading RTL:: Reading textual RTL from a file. | |
44 | @end menu | |
45 | ||
4404ce28 | 46 | @node RTL Objects |
89045fd1 JL |
47 | @section RTL Object Types |
48 | @cindex RTL object types | |
49 | ||
50 | @cindex RTL integers | |
51 | @cindex RTL strings | |
52 | @cindex RTL vectors | |
53 | @cindex RTL expression | |
54 | @cindex RTX (See RTL) | |
55 | RTL uses five kinds of objects: expressions, integers, wide integers, | |
56 | strings and vectors. Expressions are the most important ones. An RTL | |
57 | expression (``RTX'', for short) is a C structure, but it is usually | |
58 | referred to with a pointer; a type that is given the typedef name | |
59 | @code{rtx}. | |
60 | ||
807633e5 ZW |
61 | An integer is simply an @code{int}; their written form uses decimal |
62 | digits. A wide integer is an integral object whose type is | |
63 | @code{HOST_WIDE_INT}; their written form uses decimal digits. | |
89045fd1 JL |
64 | |
65 | A string is a sequence of characters. In core it is represented as a | |
66 | @code{char *} in usual C fashion, and it is written in C syntax as well. | |
67 | However, strings in RTL may never be null. If you write an empty string in | |
68 | a machine description, it is represented in core as a null pointer rather | |
69 | than as a pointer to a null character. In certain contexts, these null | |
70 | pointers instead of strings are valid. Within RTL code, strings are most | |
71 | commonly found inside @code{symbol_ref} expressions, but they appear in | |
ebb48a4d | 72 | other contexts in the RTL expressions that make up machine descriptions. |
89045fd1 | 73 | |
0f40f9f7 | 74 | In a machine description, strings are normally written with double |
8a36672b | 75 | quotes, as you would in C@. However, strings in machine descriptions may |
0f40f9f7 | 76 | extend over many lines, which is invalid C, and adjacent string |
8a36672b | 77 | constants are not concatenated as they are in C@. Any string constant |
0f40f9f7 ZW |
78 | may be surrounded with a single set of parentheses. Sometimes this |
79 | makes the machine description easier to read. | |
80 | ||
81 | There is also a special syntax for strings, which can be useful when C | |
82 | code is embedded in a machine description. Wherever a string can | |
83 | appear, it is also valid to write a C-style brace block. The entire | |
84 | brace block, including the outermost pair of braces, is considered to be | |
85 | the string constant. Double quote characters inside the braces are not | |
86 | special. Therefore, if you write string constants in the C code, you | |
87 | need not escape each quote character with a backslash. | |
88 | ||
89045fd1 JL |
89 | A vector contains an arbitrary number of pointers to expressions. The |
90 | number of elements in the vector is explicitly present in the vector. | |
91 | The written form of a vector consists of square brackets | |
92 | (@samp{[@dots{}]}) surrounding the elements, in sequence and with | |
93 | whitespace separating them. Vectors of length zero are not created; | |
94 | null pointers are used instead. | |
95 | ||
96 | @cindex expression codes | |
97 | @cindex codes, RTL expression | |
98 | @findex GET_CODE | |
99 | @findex PUT_CODE | |
100 | Expressions are classified by @dfn{expression codes} (also called RTX | |
101 | codes). The expression code is a name defined in @file{rtl.def}, which is | |
4bd0bee9 | 102 | also (in uppercase) a C enumeration constant. The possible expression |
89045fd1 JL |
103 | codes and their meanings are machine-independent. The code of an RTX can |
104 | be extracted with the macro @code{GET_CODE (@var{x})} and altered with | |
105 | @code{PUT_CODE (@var{x}, @var{newcode})}. | |
106 | ||
107 | The expression code determines how many operands the expression contains, | |
108 | and what kinds of objects they are. In RTL, unlike Lisp, you cannot tell | |
109 | by looking at an operand what kind of object it is. Instead, you must know | |
110 | from its context---from the expression code of the containing expression. | |
111 | For example, in an expression of code @code{subreg}, the first operand is | |
91914e56 RS |
112 | to be regarded as an expression and the second operand as a polynomial |
113 | integer. In an expression of code @code{plus}, there are two operands, | |
114 | both of which are to be regarded as expressions. In a @code{symbol_ref} | |
115 | expression, there is one operand, which is to be regarded as a string. | |
89045fd1 JL |
116 | |
117 | Expressions are written as parentheses containing the name of the | |
118 | expression type, its flags and machine mode if any, and then the operands | |
119 | of the expression (separated by spaces). | |
120 | ||
4bd0bee9 MK |
121 | Expression code names in the @samp{md} file are written in lowercase, |
122 | but when they appear in C code they are written in uppercase. In this | |
89045fd1 JL |
123 | manual, they are shown as follows: @code{const_int}. |
124 | ||
125 | @cindex (nil) | |
126 | @cindex nil | |
127 | In a few contexts a null pointer is valid where an expression is normally | |
128 | wanted. The written form of this is @code{(nil)}. | |
129 | ||
4404ce28 | 130 | @node RTL Classes |
b89d20aa ZW |
131 | @section RTL Classes and Formats |
132 | @cindex RTL classes | |
133 | @cindex classes of RTX codes | |
134 | @cindex RTX codes, classes of | |
135 | @findex GET_RTX_CLASS | |
136 | ||
137 | The various expression codes are divided into several @dfn{classes}, | |
138 | which are represented by single characters. You can determine the class | |
139 | of an RTX code with the macro @code{GET_RTX_CLASS (@var{code})}. | |
b630e240 | 140 | Currently, @file{rtl.def} defines these classes: |
b89d20aa ZW |
141 | |
142 | @table @code | |
ec8e098d | 143 | @item RTX_OBJ |
b89d20aa ZW |
144 | An RTX code that represents an actual object, such as a register |
145 | (@code{REG}) or a memory location (@code{MEM}, @code{SYMBOL_REF}). | |
ec8e098d PB |
146 | @code{LO_SUM}) is also included; instead, @code{SUBREG} and |
147 | @code{STRICT_LOW_PART} are not in this class, but in class @code{x}. | |
b89d20aa | 148 | |
ec8e098d PB |
149 | @item RTX_CONST_OBJ |
150 | An RTX code that represents a constant object. @code{HIGH} is also | |
151 | included in this class. | |
b89d20aa | 152 | |
ec8e098d PB |
153 | @item RTX_COMPARE |
154 | An RTX code for a non-symmetric comparison, such as @code{GEU} or | |
155 | @code{LT}. | |
156 | ||
157 | @item RTX_COMM_COMPARE | |
158 | An RTX code for a symmetric (commutative) comparison, such as @code{EQ} | |
159 | or @code{ORDERED}. | |
160 | ||
161 | @item RTX_UNARY | |
b89d20aa ZW |
162 | An RTX code for a unary arithmetic operation, such as @code{NEG}, |
163 | @code{NOT}, or @code{ABS}. This category also includes value extension | |
164 | (sign or zero) and conversions between integer and floating point. | |
165 | ||
ec8e098d | 166 | @item RTX_COMM_ARITH |
b89d20aa ZW |
167 | An RTX code for a commutative binary operation, such as @code{PLUS} or |
168 | @code{AND}. @code{NE} and @code{EQ} are comparisons, so they have class | |
169 | @code{<}. | |
170 | ||
ec8e098d | 171 | @item RTX_BIN_ARITH |
b89d20aa ZW |
172 | An RTX code for a non-commutative binary operation, such as @code{MINUS}, |
173 | @code{DIV}, or @code{ASHIFTRT}. | |
174 | ||
ec8e098d | 175 | @item RTX_BITFIELD_OPS |
c771326b | 176 | An RTX code for a bit-field operation. Currently only |
b89d20aa | 177 | @code{ZERO_EXTRACT} and @code{SIGN_EXTRACT}. These have three inputs |
c771326b JM |
178 | and are lvalues (so they can be used for insertion as well). |
179 | @xref{Bit-Fields}. | |
b89d20aa | 180 | |
ec8e098d | 181 | @item RTX_TERNARY |
b89d20aa | 182 | An RTX code for other three input operations. Currently only |
1b1562a5 MM |
183 | @code{IF_THEN_ELSE}, @code{VEC_MERGE}, @code{SIGN_EXTRACT}, |
184 | @code{ZERO_EXTRACT}, and @code{FMA}. | |
b89d20aa | 185 | |
ec8e098d | 186 | @item RTX_INSN |
b89d20aa | 187 | An RTX code for an entire instruction: @code{INSN}, @code{JUMP_INSN}, and |
767094dd | 188 | @code{CALL_INSN}. @xref{Insns}. |
b89d20aa | 189 | |
ec8e098d | 190 | @item RTX_MATCH |
b89d20aa ZW |
191 | An RTX code for something that matches in insns, such as |
192 | @code{MATCH_DUP}. These only occur in machine descriptions. | |
193 | ||
ec8e098d | 194 | @item RTX_AUTOINC |
4b983fdc | 195 | An RTX code for an auto-increment addressing mode, such as |
64e04187 RS |
196 | @code{POST_INC}. @samp{XEXP (@var{x}, 0)} gives the auto-modified |
197 | register. | |
4b983fdc | 198 | |
ec8e098d | 199 | @item RTX_EXTRA |
b89d20aa ZW |
200 | All other RTX codes. This category includes the remaining codes used |
201 | only in machine descriptions (@code{DEFINE_*}, etc.). It also includes | |
202 | all the codes describing side effects (@code{SET}, @code{USE}, | |
203 | @code{CLOBBER}, etc.) and the non-insns that may appear on an insn | |
204 | chain, such as @code{NOTE}, @code{BARRIER}, and @code{CODE_LABEL}. | |
ec8e098d | 205 | @code{SUBREG} is also part of this class. |
b89d20aa | 206 | @end table |
89045fd1 JL |
207 | |
208 | @cindex RTL format | |
a39353e0 SC |
209 | For each expression code, @file{rtl.def} specifies the number of |
210 | contained objects and their kinds using a sequence of characters | |
211 | called the @dfn{format} of the expression code. For example, | |
91914e56 | 212 | the format of @code{subreg} is @samp{ep}. |
89045fd1 JL |
213 | |
214 | @cindex RTL format characters | |
a39353e0 SC |
215 | These are the most commonly used format characters: |
216 | ||
217 | @table @code | |
218 | @item e | |
219 | An expression (actually a pointer to an expression). | |
220 | ||
221 | @item i | |
222 | An integer. | |
223 | ||
224 | @item w | |
225 | A wide integer. | |
226 | ||
227 | @item s | |
228 | A string. | |
229 | ||
230 | @item E | |
231 | A vector of expressions. | |
232 | @end table | |
233 | ||
89045fd1 JL |
234 | A few other format characters are used occasionally: |
235 | ||
236 | @table @code | |
237 | @item u | |
238 | @samp{u} is equivalent to @samp{e} except that it is printed differently | |
239 | in debugging dumps. It is used for pointers to insns. | |
240 | ||
241 | @item n | |
242 | @samp{n} is equivalent to @samp{i} except that it is printed differently | |
243 | in debugging dumps. It is used for the line number or code number of a | |
244 | @code{note} insn. | |
245 | ||
246 | @item S | |
247 | @samp{S} indicates a string which is optional. In the RTL objects in | |
248 | core, @samp{S} is equivalent to @samp{s}, but when the object is read, | |
249 | from an @samp{md} file, the string value of this operand may be omitted. | |
250 | An omitted string is taken to be the null string. | |
251 | ||
252 | @item V | |
253 | @samp{V} indicates a vector which is optional. In the RTL objects in | |
254 | core, @samp{V} is equivalent to @samp{E}, but when the object is read | |
255 | from an @samp{md} file, the vector value of this operand may be omitted. | |
256 | An omitted vector is effectively the same as a vector of no elements. | |
257 | ||
c8ea9a0f | 258 | @item B |
3bcf1b13 | 259 | @samp{B} indicates a pointer to basic block structure. |
c8ea9a0f | 260 | |
91914e56 RS |
261 | @item p |
262 | A polynomial integer. At present this is used only for @code{SUBREG_BYTE}. | |
263 | ||
89045fd1 JL |
264 | @item 0 |
265 | @samp{0} means a slot whose contents do not fit any normal category. | |
266 | @samp{0} slots are not printed at all in dumps, and are often used in | |
267 | special ways by small parts of the compiler. | |
268 | @end table | |
269 | ||
b89d20aa ZW |
270 | There are macros to get the number of operands and the format |
271 | of an expression code: | |
89045fd1 JL |
272 | |
273 | @table @code | |
274 | @findex GET_RTX_LENGTH | |
275 | @item GET_RTX_LENGTH (@var{code}) | |
276 | Number of operands of an RTX of code @var{code}. | |
277 | ||
278 | @findex GET_RTX_FORMAT | |
279 | @item GET_RTX_FORMAT (@var{code}) | |
280 | The format of an RTX of code @var{code}, as a C string. | |
b89d20aa | 281 | @end table |
89045fd1 | 282 | |
b89d20aa ZW |
283 | Some classes of RTX codes always have the same format. For example, it |
284 | is safe to assume that all comparison operations have format @code{ee}. | |
89045fd1 JL |
285 | |
286 | @table @code | |
89045fd1 | 287 | @item 1 |
b89d20aa | 288 | All codes of this class have format @code{e}. |
89045fd1 | 289 | |
b89d20aa ZW |
290 | @item < |
291 | @itemx c | |
292 | @itemx 2 | |
293 | All codes of these classes have format @code{ee}. | |
89045fd1 JL |
294 | |
295 | @item b | |
b89d20aa ZW |
296 | @itemx 3 |
297 | All codes of these classes have format @code{eee}. | |
89045fd1 JL |
298 | |
299 | @item i | |
b89d20aa ZW |
300 | All codes of this class have formats that begin with @code{iuueiee}. |
301 | @xref{Insns}. Note that not all RTL objects linked onto an insn chain | |
302 | are of class @code{i}. | |
89045fd1 | 303 | |
b89d20aa ZW |
304 | @item o |
305 | @itemx m | |
306 | @itemx x | |
307 | You can make no assumptions about the format of these codes. | |
89045fd1 JL |
308 | @end table |
309 | ||
4404ce28 | 310 | @node Accessors |
b89d20aa ZW |
311 | @section Access to Operands |
312 | @cindex accessors | |
313 | @cindex access to operands | |
314 | @cindex operand access | |
315 | ||
89045fd1 JL |
316 | @findex XEXP |
317 | @findex XINT | |
318 | @findex XWINT | |
319 | @findex XSTR | |
320 | Operands of expressions are accessed using the macros @code{XEXP}, | |
321 | @code{XINT}, @code{XWINT} and @code{XSTR}. Each of these macros takes | |
322 | two arguments: an expression-pointer (RTX) and an operand number | |
bd819a4a | 323 | (counting from zero). Thus, |
89045fd1 | 324 | |
3ab51846 | 325 | @smallexample |
89045fd1 | 326 | XEXP (@var{x}, 2) |
3ab51846 | 327 | @end smallexample |
89045fd1 JL |
328 | |
329 | @noindent | |
330 | accesses operand 2 of expression @var{x}, as an expression. | |
331 | ||
3ab51846 | 332 | @smallexample |
89045fd1 | 333 | XINT (@var{x}, 2) |
3ab51846 | 334 | @end smallexample |
89045fd1 JL |
335 | |
336 | @noindent | |
337 | accesses the same operand as an integer. @code{XSTR}, used in the same | |
338 | fashion, would access it as a string. | |
339 | ||
340 | Any operand can be accessed as an integer, as an expression or as a string. | |
341 | You must choose the correct method of access for the kind of value actually | |
342 | stored in the operand. You would do this based on the expression code of | |
343 | the containing expression. That is also how you would know how many | |
344 | operands there are. | |
345 | ||
91914e56 RS |
346 | For example, if @var{x} is an @code{int_list} expression, you know that it has |
347 | two operands which can be correctly accessed as @code{XINT (@var{x}, 0)} | |
348 | and @code{XEXP (@var{x}, 1)}. Incorrect accesses like | |
349 | @code{XEXP (@var{x}, 0)} and @code{XINT (@var{x}, 1)} would compile, | |
350 | but would trigger an internal compiler error when rtl checking is enabled. | |
351 | Nothing stops you from writing @code{XEXP (@var{x}, 28)} either, but | |
352 | this will access memory past the end of the expression with | |
bd819a4a | 353 | unpredictable results. |
89045fd1 JL |
354 | |
355 | Access to operands which are vectors is more complicated. You can use the | |
356 | macro @code{XVEC} to get the vector-pointer itself, or the macros | |
357 | @code{XVECEXP} and @code{XVECLEN} to access the elements and length of a | |
358 | vector. | |
359 | ||
360 | @table @code | |
361 | @findex XVEC | |
362 | @item XVEC (@var{exp}, @var{idx}) | |
363 | Access the vector-pointer which is operand number @var{idx} in @var{exp}. | |
364 | ||
365 | @findex XVECLEN | |
366 | @item XVECLEN (@var{exp}, @var{idx}) | |
367 | Access the length (number of elements) in the vector which is | |
368 | in operand number @var{idx} in @var{exp}. This value is an @code{int}. | |
369 | ||
370 | @findex XVECEXP | |
371 | @item XVECEXP (@var{exp}, @var{idx}, @var{eltnum}) | |
372 | Access element number @var{eltnum} in the vector which is | |
161d7b59 | 373 | in operand number @var{idx} in @var{exp}. This value is an RTX@. |
89045fd1 JL |
374 | |
375 | It is up to you to make sure that @var{eltnum} is not negative | |
376 | and is less than @code{XVECLEN (@var{exp}, @var{idx})}. | |
377 | @end table | |
378 | ||
379 | All the macros defined in this section expand into lvalues and therefore | |
380 | can be used to assign the operands, lengths and vector elements as well as | |
381 | to access them. | |
382 | ||
3568b0ef RH |
383 | @node Special Accessors |
384 | @section Access to Special Operands | |
385 | @cindex access to special operands | |
386 | ||
387 | Some RTL nodes have special annotations associated with them. | |
388 | ||
389 | @table @code | |
390 | @item MEM | |
391 | @table @code | |
392 | @findex MEM_ALIAS_SET | |
393 | @item MEM_ALIAS_SET (@var{x}) | |
394 | If 0, @var{x} is not in any alias set, and may alias anything. Otherwise, | |
395 | @var{x} can only alias @code{MEM}s in a conflicting alias set. This value | |
396 | is set in a language-dependent manner in the front-end, and should not be | |
397 | altered in the back-end. In some front-ends, these numbers may correspond | |
398 | in some way to types, or other language-level entities, but they need not, | |
399 | and the back-end makes no such assumptions. | |
400 | These set numbers are tested with @code{alias_sets_conflict_p}. | |
401 | ||
402 | @findex MEM_EXPR | |
403 | @item MEM_EXPR (@var{x}) | |
404 | If this register is known to hold the value of some user-level | |
405 | declaration, this is that tree node. It may also be a | |
406 | @code{COMPONENT_REF}, in which case this is some field reference, | |
407 | and @code{TREE_OPERAND (@var{x}, 0)} contains the declaration, | |
408 | or another @code{COMPONENT_REF}, or null if there is no compile-time | |
409 | object associated with the reference. | |
410 | ||
527210c4 RS |
411 | @findex MEM_OFFSET_KNOWN_P |
412 | @item MEM_OFFSET_KNOWN_P (@var{x}) | |
413 | True if the offset of the memory reference from @code{MEM_EXPR} is known. | |
414 | @samp{MEM_OFFSET (@var{x})} provides the offset if so. | |
415 | ||
3568b0ef RH |
416 | @findex MEM_OFFSET |
417 | @item MEM_OFFSET (@var{x}) | |
527210c4 RS |
418 | The offset from the start of @code{MEM_EXPR}. The value is only valid if |
419 | @samp{MEM_OFFSET_KNOWN_P (@var{x})} is true. | |
3568b0ef | 420 | |
f5541398 RS |
421 | @findex MEM_SIZE_KNOWN_P |
422 | @item MEM_SIZE_KNOWN_P (@var{x}) | |
423 | True if the size of the memory reference is known. | |
424 | @samp{MEM_SIZE (@var{x})} provides its size if so. | |
425 | ||
3568b0ef RH |
426 | @findex MEM_SIZE |
427 | @item MEM_SIZE (@var{x}) | |
f5541398 | 428 | The size in bytes of the memory reference. |
3568b0ef | 429 | This is mostly relevant for @code{BLKmode} references as otherwise |
f5541398 RS |
430 | the size is implied by the mode. The value is only valid if |
431 | @samp{MEM_SIZE_KNOWN_P (@var{x})} is true. | |
3568b0ef RH |
432 | |
433 | @findex MEM_ALIGN | |
434 | @item MEM_ALIGN (@var{x}) | |
435 | The known alignment in bits of the memory reference. | |
09e881c9 BE |
436 | |
437 | @findex MEM_ADDR_SPACE | |
438 | @item MEM_ADDR_SPACE (@var{x}) | |
439 | The address space of the memory reference. This will commonly be zero | |
440 | for the generic address space. | |
3568b0ef RH |
441 | @end table |
442 | ||
443 | @item REG | |
444 | @table @code | |
445 | @findex ORIGINAL_REGNO | |
446 | @item ORIGINAL_REGNO (@var{x}) | |
447 | This field holds the number the register ``originally'' had; for a | |
448 | pseudo register turned into a hard reg this will hold the old pseudo | |
449 | register number. | |
450 | ||
451 | @findex REG_EXPR | |
452 | @item REG_EXPR (@var{x}) | |
453 | If this register is known to hold the value of some user-level | |
454 | declaration, this is that tree node. | |
455 | ||
456 | @findex REG_OFFSET | |
457 | @item REG_OFFSET (@var{x}) | |
458 | If this register is known to hold the value of some user-level | |
459 | declaration, this is the offset into that logical storage. | |
460 | @end table | |
461 | ||
462 | @item SYMBOL_REF | |
463 | @table @code | |
464 | @findex SYMBOL_REF_DECL | |
465 | @item SYMBOL_REF_DECL (@var{x}) | |
466 | If the @code{symbol_ref} @var{x} was created for a @code{VAR_DECL} or | |
467 | a @code{FUNCTION_DECL}, that tree is recorded here. If this value is | |
468 | null, then @var{x} was created by back end code generation routines, | |
32a61907 ZW |
469 | and there is no associated front end symbol table entry. |
470 | ||
471 | @code{SYMBOL_REF_DECL} may also point to a tree of class @code{'c'}, | |
472 | that is, some sort of constant. In this case, the @code{symbol_ref} | |
473 | is an entry in the per-file constant pool; again, there is no associated | |
474 | front end symbol table entry. | |
3568b0ef | 475 | |
c185c797 RS |
476 | @findex SYMBOL_REF_CONSTANT |
477 | @item SYMBOL_REF_CONSTANT (@var{x}) | |
478 | If @samp{CONSTANT_POOL_ADDRESS_P (@var{x})} is true, this is the constant | |
479 | pool entry for @var{x}. It is null otherwise. | |
480 | ||
481 | @findex SYMBOL_REF_DATA | |
482 | @item SYMBOL_REF_DATA (@var{x}) | |
929e5e5b | 483 | A field of opaque type used to store @code{SYMBOL_REF_DECL} or |
c185c797 RS |
484 | @code{SYMBOL_REF_CONSTANT}. |
485 | ||
3568b0ef RH |
486 | @findex SYMBOL_REF_FLAGS |
487 | @item SYMBOL_REF_FLAGS (@var{x}) | |
488 | In a @code{symbol_ref}, this is used to communicate various predicates | |
489 | about the symbol. Some of these are common enough to be computed by | |
490 | common code, some are specific to the target. The common bits are: | |
491 | ||
492 | @table @code | |
493 | @findex SYMBOL_REF_FUNCTION_P | |
494 | @findex SYMBOL_FLAG_FUNCTION | |
495 | @item SYMBOL_FLAG_FUNCTION | |
496 | Set if the symbol refers to a function. | |
497 | ||
498 | @findex SYMBOL_REF_LOCAL_P | |
499 | @findex SYMBOL_FLAG_LOCAL | |
500 | @item SYMBOL_FLAG_LOCAL | |
501 | Set if the symbol is local to this ``module''. | |
502 | See @code{TARGET_BINDS_LOCAL_P}. | |
503 | ||
504 | @findex SYMBOL_REF_EXTERNAL_P | |
505 | @findex SYMBOL_FLAG_EXTERNAL | |
506 | @item SYMBOL_FLAG_EXTERNAL | |
507 | Set if this symbol is not defined in this translation unit. | |
508 | Note that this is not the inverse of @code{SYMBOL_FLAG_LOCAL}. | |
509 | ||
510 | @findex SYMBOL_REF_SMALL_P | |
511 | @findex SYMBOL_FLAG_SMALL | |
512 | @item SYMBOL_FLAG_SMALL | |
513 | Set if the symbol is located in the small data section. | |
514 | See @code{TARGET_IN_SMALL_DATA_P}. | |
515 | ||
516 | @findex SYMBOL_FLAG_TLS_SHIFT | |
517 | @findex SYMBOL_REF_TLS_MODEL | |
518 | @item SYMBOL_REF_TLS_MODEL (@var{x}) | |
519 | This is a multi-bit field accessor that returns the @code{tls_model} | |
520 | to be used for a thread-local storage symbol. It returns zero for | |
521 | non-thread-local symbols. | |
aacd3885 | 522 | |
3fa9c136 RS |
523 | @findex SYMBOL_REF_HAS_BLOCK_INFO_P |
524 | @findex SYMBOL_FLAG_HAS_BLOCK_INFO | |
525 | @item SYMBOL_FLAG_HAS_BLOCK_INFO | |
526 | Set if the symbol has @code{SYMBOL_REF_BLOCK} and | |
527 | @code{SYMBOL_REF_BLOCK_OFFSET} fields. | |
aacd3885 RS |
528 | |
529 | @findex SYMBOL_REF_ANCHOR_P | |
530 | @findex SYMBOL_FLAG_ANCHOR | |
531 | @cindex @option{-fsection-anchors} | |
532 | @item SYMBOL_FLAG_ANCHOR | |
533 | Set if the symbol is used as a section anchor. ``Section anchors'' | |
534 | are symbols that have a known position within an @code{object_block} | |
535 | and that can be used to access nearby members of that block. | |
536 | They are used to implement @option{-fsection-anchors}. | |
537 | ||
3fa9c136 | 538 | If this flag is set, then @code{SYMBOL_FLAG_HAS_BLOCK_INFO} will be too. |
3568b0ef RH |
539 | @end table |
540 | ||
541 | Bits beginning with @code{SYMBOL_FLAG_MACH_DEP} are available for | |
542 | the target's use. | |
543 | @end table | |
aacd3885 RS |
544 | |
545 | @findex SYMBOL_REF_BLOCK | |
546 | @item SYMBOL_REF_BLOCK (@var{x}) | |
3fa9c136 RS |
547 | If @samp{SYMBOL_REF_HAS_BLOCK_INFO_P (@var{x})}, this is the |
548 | @samp{object_block} structure to which the symbol belongs, | |
549 | or @code{NULL} if it has not been assigned a block. | |
aacd3885 RS |
550 | |
551 | @findex SYMBOL_REF_BLOCK_OFFSET | |
552 | @item SYMBOL_REF_BLOCK_OFFSET (@var{x}) | |
3fa9c136 | 553 | If @samp{SYMBOL_REF_HAS_BLOCK_INFO_P (@var{x})}, this is the offset of @var{x} |
aacd3885 | 554 | from the first object in @samp{SYMBOL_REF_BLOCK (@var{x})}. The value is |
3fa9c136 RS |
555 | negative if @var{x} has not yet been assigned to a block, or it has not |
556 | been given an offset within that block. | |
3568b0ef RH |
557 | @end table |
558 | ||
4404ce28 | 559 | @node Flags |
89045fd1 JL |
560 | @section Flags in an RTL Expression |
561 | @cindex flags in RTL expression | |
562 | ||
0341c5d2 JJ |
563 | RTL expressions contain several flags (one-bit bit-fields) |
564 | that are used in certain types of expression. Most often they | |
4afe3952 | 565 | are accessed with the following macros, which expand into lvalues. |
89045fd1 JL |
566 | |
567 | @table @code | |
52af3804 EB |
568 | @findex CROSSING_JUMP_P |
569 | @cindex @code{jump_insn} and @samp{/j} | |
570 | @item CROSSING_JUMP_P (@var{x}) | |
571 | Nonzero in a @code{jump_insn} if it crosses between hot and cold sections, | |
572 | which could potentially be very far apart in the executable. The presence | |
573 | of this flag indicates to other optimizations that this branching instruction | |
574 | should not be ``collapsed'' into a simpler branching construct. It is used | |
575 | when the optimization to partition basic blocks into hot and cold sections | |
576 | is turned on. | |
577 | ||
0341c5d2 JJ |
578 | @findex CONSTANT_POOL_ADDRESS_P |
579 | @cindex @code{symbol_ref} and @samp{/u} | |
580 | @cindex @code{unchanging}, in @code{symbol_ref} | |
581 | @item CONSTANT_POOL_ADDRESS_P (@var{x}) | |
582 | Nonzero in a @code{symbol_ref} if it refers to part of the current | |
583 | function's constant pool. For most targets these addresses are in a | |
584 | @code{.rodata} section entirely separate from the function, but for | |
585 | some targets the addresses are close to the beginning of the function. | |
586 | In either case GCC assumes these addresses can be addressed directly, | |
587 | perhaps with the help of base registers. | |
588 | Stored in the @code{unchanging} field and printed as @samp{/u}. | |
589 | ||
0341c5d2 | 590 | @findex INSN_ANNULLED_BRANCH_P |
2d4cc6a7 | 591 | @cindex @code{jump_insn} and @samp{/u} |
cf40ea15 | 592 | @cindex @code{call_insn} and @samp{/u} |
7440af14 DM |
593 | @cindex @code{insn} and @samp{/u} |
594 | @cindex @code{unchanging}, in @code{jump_insn}, @code{call_insn} and @code{insn} | |
0341c5d2 | 595 | @item INSN_ANNULLED_BRANCH_P (@var{x}) |
7440af14 DM |
596 | In a @code{jump_insn}, @code{call_insn}, or @code{insn} indicates |
597 | that the branch is an annulling one. See the discussion under | |
8a36672b | 598 | @code{sequence} below. Stored in the @code{unchanging} field and |
7440af14 | 599 | printed as @samp{/u}. |
0341c5d2 | 600 | |
0341c5d2 JJ |
601 | @findex INSN_DELETED_P |
602 | @cindex @code{insn} and @samp{/v} | |
4afe3952 JJ |
603 | @cindex @code{call_insn} and @samp{/v} |
604 | @cindex @code{jump_insn} and @samp{/v} | |
605 | @cindex @code{code_label} and @samp{/v} | |
da5c6bde | 606 | @cindex @code{jump_table_data} and @samp{/v} |
4afe3952 JJ |
607 | @cindex @code{barrier} and @samp{/v} |
608 | @cindex @code{note} and @samp{/v} | |
da5c6bde | 609 | @cindex @code{volatil}, in @code{insn}, @code{call_insn}, @code{jump_insn}, @code{code_label}, @code{jump_table_data}, @code{barrier}, and @code{note} |
0341c5d2 | 610 | @item INSN_DELETED_P (@var{x}) |
4afe3952 | 611 | In an @code{insn}, @code{call_insn}, @code{jump_insn}, @code{code_label}, |
da5c6bde | 612 | @code{jump_table_data}, @code{barrier}, or @code{note}, |
4afe3952 | 613 | nonzero if the insn has been deleted. Stored in the |
0341c5d2 JJ |
614 | @code{volatil} field and printed as @samp{/v}. |
615 | ||
616 | @findex INSN_FROM_TARGET_P | |
617 | @cindex @code{insn} and @samp{/s} | |
2d4cc6a7 | 618 | @cindex @code{jump_insn} and @samp{/s} |
cf40ea15 DM |
619 | @cindex @code{call_insn} and @samp{/s} |
620 | @cindex @code{in_struct}, in @code{insn} and @code{jump_insn} and @code{call_insn} | |
0341c5d2 | 621 | @item INSN_FROM_TARGET_P (@var{x}) |
cf40ea15 DM |
622 | In an @code{insn} or @code{jump_insn} or @code{call_insn} in a delay |
623 | slot of a branch, indicates that the insn | |
0341c5d2 JJ |
624 | is from the target of the branch. If the branch insn has |
625 | @code{INSN_ANNULLED_BRANCH_P} set, this insn will only be executed if | |
626 | the branch is taken. For annulled branches with | |
627 | @code{INSN_FROM_TARGET_P} clear, the insn will be executed only if the | |
628 | branch is not taken. When @code{INSN_ANNULLED_BRANCH_P} is not set, | |
629 | this insn will always be executed. Stored in the @code{in_struct} | |
630 | field and printed as @samp{/s}. | |
631 | ||
0341c5d2 JJ |
632 | @findex LABEL_PRESERVE_P |
633 | @cindex @code{code_label} and @samp{/i} | |
4afe3952 JJ |
634 | @cindex @code{note} and @samp{/i} |
635 | @cindex @code{in_struct}, in @code{code_label} and @code{note} | |
0341c5d2 | 636 | @item LABEL_PRESERVE_P (@var{x}) |
4afe3952 | 637 | In a @code{code_label} or @code{note}, indicates that the label is referenced by |
0341c5d2 JJ |
638 | code or data not visible to the RTL of a given function. |
639 | Labels referenced by a non-local goto will have this bit set. Stored | |
640 | in the @code{in_struct} field and printed as @samp{/s}. | |
641 | ||
642 | @findex LABEL_REF_NONLOCAL_P | |
643 | @cindex @code{label_ref} and @samp{/v} | |
4afe3952 JJ |
644 | @cindex @code{reg_label} and @samp{/v} |
645 | @cindex @code{volatil}, in @code{label_ref} and @code{reg_label} | |
0341c5d2 JJ |
646 | @item LABEL_REF_NONLOCAL_P (@var{x}) |
647 | In @code{label_ref} and @code{reg_label} expressions, nonzero if this is | |
648 | a reference to a non-local label. | |
89045fd1 JL |
649 | Stored in the @code{volatil} field and printed as @samp{/v}. |
650 | ||
0341c5d2 JJ |
651 | @findex MEM_KEEP_ALIAS_SET_P |
652 | @cindex @code{mem} and @samp{/j} | |
653 | @cindex @code{jump}, in @code{mem} | |
654 | @item MEM_KEEP_ALIAS_SET_P (@var{x}) | |
655 | In @code{mem} expressions, 1 if we should keep the alias set for this | |
656 | mem unchanged when we access a component. Set to 1, for example, when we | |
657 | are already in a non-addressable component of an aggregate. | |
658 | Stored in the @code{jump} field and printed as @samp{/j}. | |
c6df88cb | 659 | |
0341c5d2 JJ |
660 | @findex MEM_VOLATILE_P |
661 | @cindex @code{mem} and @samp{/v} | |
2d4cc6a7 | 662 | @cindex @code{asm_input} and @samp{/v} |
4afe3952 | 663 | @cindex @code{asm_operands} and @samp{/v} |
2d4cc6a7 | 664 | @cindex @code{volatil}, in @code{mem}, @code{asm_operands}, and @code{asm_input} |
0341c5d2 | 665 | @item MEM_VOLATILE_P (@var{x}) |
2d4cc6a7 JJ |
666 | In @code{mem}, @code{asm_operands}, and @code{asm_input} expressions, |
667 | nonzero for volatile memory references. | |
0341c5d2 JJ |
668 | Stored in the @code{volatil} field and printed as @samp{/v}. |
669 | ||
4da2eb6b RH |
670 | @findex MEM_NOTRAP_P |
671 | @cindex @code{mem} and @samp{/c} | |
672 | @cindex @code{call}, in @code{mem} | |
673 | @item MEM_NOTRAP_P (@var{x}) | |
674 | In @code{mem}, nonzero for memory references that will not trap. | |
675 | Stored in the @code{call} field and printed as @samp{/c}. | |
676 | ||
d1ed933d EB |
677 | @findex MEM_POINTER |
678 | @cindex @code{mem} and @samp{/f} | |
679 | @cindex @code{frame_related}, in @code{mem} | |
680 | @item MEM_POINTER (@var{x}) | |
681 | Nonzero in a @code{mem} if the memory reference holds a pointer. | |
682 | Stored in the @code{frame_related} field and printed as @samp{/f}. | |
683 | ||
52af3804 EB |
684 | @findex MEM_READONLY_P |
685 | @cindex @code{mem} and @samp{/u} | |
686 | @cindex @code{unchanging}, in @code{mem} | |
687 | @item MEM_READONLY_P (@var{x}) | |
688 | Nonzero in a @code{mem}, if the memory is statically allocated and read-only. | |
689 | ||
690 | Read-only in this context means never modified during the lifetime of the | |
691 | program, not necessarily in ROM or in write-disabled pages. A common | |
692 | example of the later is a shared library's global offset table. This | |
693 | table is initialized by the runtime loader, so the memory is technically | |
694 | writable, but after control is transferred from the runtime loader to the | |
695 | application, this memory will never be subsequently modified. | |
696 | ||
697 | Stored in the @code{unchanging} field and printed as @samp{/u}. | |
698 | ||
699 | @findex PREFETCH_SCHEDULE_BARRIER_P | |
700 | @cindex @code{prefetch} and @samp{/v} | |
701 | @cindex @code{volatile}, in @code{prefetch} | |
702 | @item PREFETCH_SCHEDULE_BARRIER_P (@var{x}) | |
703 | In a @code{prefetch}, indicates that the prefetch is a scheduling barrier. | |
704 | No other INSNs will be moved over it. | |
705 | Stored in the @code{volatil} field and printed as @samp{/v}. | |
706 | ||
0341c5d2 JJ |
707 | @findex REG_FUNCTION_VALUE_P |
708 | @cindex @code{reg} and @samp{/i} | |
d1ed933d | 709 | @cindex @code{return_val}, in @code{reg} |
0341c5d2 JJ |
710 | @item REG_FUNCTION_VALUE_P (@var{x}) |
711 | Nonzero in a @code{reg} if it is the place in which this function's | |
712 | value is going to be returned. (This happens only in a hard | |
d1ed933d | 713 | register.) Stored in the @code{return_val} field and printed as |
0341c5d2 | 714 | @samp{/i}. |
41472af8 | 715 | |
0341c5d2 JJ |
716 | @findex REG_POINTER |
717 | @cindex @code{reg} and @samp{/f} | |
718 | @cindex @code{frame_related}, in @code{reg} | |
719 | @item REG_POINTER (@var{x}) | |
720 | Nonzero in a @code{reg} if the register holds a pointer. Stored in the | |
721 | @code{frame_related} field and printed as @samp{/f}. | |
722 | ||
ebb48a4d | 723 | @findex REG_USERVAR_P |
89045fd1 JL |
724 | @cindex @code{reg} and @samp{/v} |
725 | @cindex @code{volatil}, in @code{reg} | |
726 | @item REG_USERVAR_P (@var{x}) | |
727 | In a @code{reg}, nonzero if it corresponds to a variable present in | |
728 | the user's source code. Zero for temporaries generated internally by | |
729 | the compiler. Stored in the @code{volatil} field and printed as | |
730 | @samp{/v}. | |
731 | ||
89045fd1 JL |
732 | The same hard register may be used also for collecting the values of |
733 | functions called by this one, but @code{REG_FUNCTION_VALUE_P} is zero | |
734 | in this kind of use. | |
735 | ||
52af3804 EB |
736 | @findex RTL_CONST_CALL_P |
737 | @cindex @code{call_insn} and @samp{/u} | |
738 | @cindex @code{unchanging}, in @code{call_insn} | |
739 | @item RTL_CONST_CALL_P (@var{x}) | |
740 | In a @code{call_insn} indicates that the insn represents a call to a | |
741 | const function. Stored in the @code{unchanging} field and printed as | |
742 | @samp{/u}. | |
743 | ||
744 | @findex RTL_PURE_CALL_P | |
745 | @cindex @code{call_insn} and @samp{/i} | |
746 | @cindex @code{return_val}, in @code{call_insn} | |
747 | @item RTL_PURE_CALL_P (@var{x}) | |
748 | In a @code{call_insn} indicates that the insn represents a call to a | |
749 | pure function. Stored in the @code{return_val} field and printed as | |
750 | @samp{/i}. | |
751 | ||
752 | @findex RTL_CONST_OR_PURE_CALL_P | |
753 | @cindex @code{call_insn} and @samp{/u} or @samp{/i} | |
754 | @item RTL_CONST_OR_PURE_CALL_P (@var{x}) | |
755 | In a @code{call_insn}, true if @code{RTL_CONST_CALL_P} or | |
756 | @code{RTL_PURE_CALL_P} is true. | |
757 | ||
758 | @findex RTL_LOOPING_CONST_OR_PURE_CALL_P | |
759 | @cindex @code{call_insn} and @samp{/c} | |
760 | @cindex @code{call}, in @code{call_insn} | |
761 | @item RTL_LOOPING_CONST_OR_PURE_CALL_P (@var{x}) | |
762 | In a @code{call_insn} indicates that the insn represents a possibly | |
763 | infinite looping call to a const or pure function. Stored in the | |
764 | @code{call} field and printed as @samp{/c}. Only true if one of | |
765 | @code{RTL_CONST_CALL_P} or @code{RTL_PURE_CALL_P} is true. | |
766 | ||
2b4b3e5f | 767 | @findex RTX_FRAME_RELATED_P |
0341c5d2 | 768 | @cindex @code{insn} and @samp{/f} |
4afe3952 JJ |
769 | @cindex @code{call_insn} and @samp{/f} |
770 | @cindex @code{jump_insn} and @samp{/f} | |
771 | @cindex @code{barrier} and @samp{/f} | |
772 | @cindex @code{set} and @samp{/f} | |
773 | @cindex @code{frame_related}, in @code{insn}, @code{call_insn}, @code{jump_insn}, @code{barrier}, and @code{set} | |
2b4b3e5f | 774 | @item RTX_FRAME_RELATED_P (@var{x}) |
4afe3952 JJ |
775 | Nonzero in an @code{insn}, @code{call_insn}, @code{jump_insn}, |
776 | @code{barrier}, or @code{set} which is part of a function prologue | |
770ca8c6 JO |
777 | and sets the stack pointer, sets the frame pointer, or saves a register. |
778 | This flag should also be set on an instruction that sets up a temporary | |
779 | register to use in place of the frame pointer. | |
0341c5d2 | 780 | Stored in the @code{frame_related} field and printed as @samp{/f}. |
770ca8c6 JO |
781 | |
782 | In particular, on RISC targets where there are limits on the sizes of | |
783 | immediate constants, it is sometimes impossible to reach the register | |
784 | save area directly from the stack pointer. In that case, a temporary | |
785 | register is used that is near enough to the register save area, and the | |
786 | Canonical Frame Address, i.e., DWARF2's logical frame pointer, register | |
787 | must (temporarily) be changed to be this temporary register. So, the | |
788 | instruction that sets this temporary register must be marked as | |
789 | @code{RTX_FRAME_RELATED_P}. | |
790 | ||
791 | If the marked instruction is overly complex (defined in terms of what | |
792 | @code{dwarf2out_frame_debug_expr} can handle), you will also have to | |
793 | create a @code{REG_FRAME_RELATED_EXPR} note and attach it to the | |
794 | instruction. This note should contain a simple expression of the | |
795 | computation performed by this instruction, i.e., one that | |
796 | @code{dwarf2out_frame_debug_expr} can handle. | |
797 | ||
798 | This flag is required for exception handling support on targets with RTL | |
799 | prologues. | |
2b4b3e5f | 800 | |
0341c5d2 | 801 | @findex SCHED_GROUP_P |
be202ec2 FS |
802 | @cindex @code{insn} and @samp{/s} |
803 | @cindex @code{call_insn} and @samp{/s} | |
804 | @cindex @code{jump_insn} and @samp{/s} | |
da5c6bde SB |
805 | @cindex @code{jump_table_data} and @samp{/s} |
806 | @cindex @code{in_struct}, in @code{insn}, @code{call_insn}, @code{jump_insn} and @code{jump_table_data} | |
0341c5d2 | 807 | @item SCHED_GROUP_P (@var{x}) |
da5c6bde SB |
808 | During instruction scheduling, in an @code{insn}, @code{call_insn}, |
809 | @code{jump_insn} or @code{jump_table_data}, indicates that the | |
0341c5d2 JJ |
810 | previous insn must be scheduled together with this insn. This is used to |
811 | ensure that certain groups of instructions will not be split up by the | |
812 | instruction scheduling pass, for example, @code{use} insns before | |
813 | a @code{call_insn} may not be separated from the @code{call_insn}. | |
814 | Stored in the @code{in_struct} field and printed as @samp{/s}. | |
815 | ||
816 | @findex SET_IS_RETURN_P | |
817 | @cindex @code{insn} and @samp{/j} | |
818 | @cindex @code{jump}, in @code{insn} | |
819 | @item SET_IS_RETURN_P (@var{x}) | |
820 | For a @code{set}, nonzero if it is for a return. | |
821 | Stored in the @code{jump} field and printed as @samp{/j}. | |
822 | ||
823 | @findex SIBLING_CALL_P | |
824 | @cindex @code{call_insn} and @samp{/j} | |
825 | @cindex @code{jump}, in @code{call_insn} | |
826 | @item SIBLING_CALL_P (@var{x}) | |
827 | For a @code{call_insn}, nonzero if the insn is a sibling call. | |
828 | Stored in the @code{jump} field and printed as @samp{/j}. | |
829 | ||
830 | @findex STRING_POOL_ADDRESS_P | |
831 | @cindex @code{symbol_ref} and @samp{/f} | |
832 | @cindex @code{frame_related}, in @code{symbol_ref} | |
833 | @item STRING_POOL_ADDRESS_P (@var{x}) | |
834 | For a @code{symbol_ref} expression, nonzero if it addresses this function's | |
835 | string constant pool. | |
836 | Stored in the @code{frame_related} field and printed as @samp{/f}. | |
837 | ||
838 | @findex SUBREG_PROMOTED_UNSIGNED_P | |
7879b81e | 839 | @cindex @code{subreg} and @samp{/u} and @samp{/v} |
0341c5d2 | 840 | @cindex @code{unchanging}, in @code{subreg} |
7879b81e | 841 | @cindex @code{volatil}, in @code{subreg} |
0341c5d2 | 842 | @item SUBREG_PROMOTED_UNSIGNED_P (@var{x}) |
7879b81e SE |
843 | Returns a value greater then zero for a @code{subreg} that has |
844 | @code{SUBREG_PROMOTED_VAR_P} nonzero if the object being referenced is kept | |
845 | zero-extended, zero if it is kept sign-extended, and less then zero if it is | |
846 | extended some other way via the @code{ptr_extend} instruction. | |
847 | Stored in the @code{unchanging} | |
848 | field and @code{volatil} field, printed as @samp{/u} and @samp{/v}. | |
849 | This macro may only be used to get the value it may not be used to change | |
850 | the value. Use @code{SUBREG_PROMOTED_UNSIGNED_SET} to change the value. | |
851 | ||
852 | @findex SUBREG_PROMOTED_UNSIGNED_SET | |
853 | @cindex @code{subreg} and @samp{/u} | |
854 | @cindex @code{unchanging}, in @code{subreg} | |
855 | @cindex @code{volatil}, in @code{subreg} | |
856 | @item SUBREG_PROMOTED_UNSIGNED_SET (@var{x}) | |
857 | Set the @code{unchanging} and @code{volatil} fields in a @code{subreg} | |
858 | to reflect zero, sign, or other extension. If @code{volatil} is | |
859 | zero, then @code{unchanging} as nonzero means zero extension and as | |
8a36672b | 860 | zero means sign extension. If @code{volatil} is nonzero then some |
7879b81e | 861 | other type of extension was done via the @code{ptr_extend} instruction. |
0341c5d2 JJ |
862 | |
863 | @findex SUBREG_PROMOTED_VAR_P | |
864 | @cindex @code{subreg} and @samp{/s} | |
865 | @cindex @code{in_struct}, in @code{subreg} | |
866 | @item SUBREG_PROMOTED_VAR_P (@var{x}) | |
867 | Nonzero in a @code{subreg} if it was made when accessing an object that | |
868 | was promoted to a wider mode in accord with the @code{PROMOTED_MODE} machine | |
869 | description macro (@pxref{Storage Layout}). In this case, the mode of | |
870 | the @code{subreg} is the declared mode of the object and the mode of | |
871 | @code{SUBREG_REG} is the mode of the register that holds the object. | |
872 | Promoted variables are always either sign- or zero-extended to the wider | |
873 | mode on every assignment. Stored in the @code{in_struct} field and | |
874 | printed as @samp{/s}. | |
89045fd1 | 875 | |
0341c5d2 JJ |
876 | @findex SYMBOL_REF_USED |
877 | @cindex @code{used}, in @code{symbol_ref} | |
878 | @item SYMBOL_REF_USED (@var{x}) | |
879 | In a @code{symbol_ref}, indicates that @var{x} has been used. This is | |
880 | normally only used to ensure that @var{x} is only declared external | |
881 | once. Stored in the @code{used} field. | |
882 | ||
ff0b6b99 FS |
883 | @findex SYMBOL_REF_WEAK |
884 | @cindex @code{symbol_ref} and @samp{/i} | |
d1ed933d | 885 | @cindex @code{return_val}, in @code{symbol_ref} |
ff0b6b99 FS |
886 | @item SYMBOL_REF_WEAK (@var{x}) |
887 | In a @code{symbol_ref}, indicates that @var{x} has been declared weak. | |
d1ed933d | 888 | Stored in the @code{return_val} field and printed as @samp{/i}. |
3568b0ef RH |
889 | |
890 | @findex SYMBOL_REF_FLAG | |
891 | @cindex @code{symbol_ref} and @samp{/v} | |
892 | @cindex @code{volatil}, in @code{symbol_ref} | |
893 | @item SYMBOL_REF_FLAG (@var{x}) | |
894 | In a @code{symbol_ref}, this is used as a flag for machine-specific purposes. | |
895 | Stored in the @code{volatil} field and printed as @samp{/v}. | |
896 | ||
897 | Most uses of @code{SYMBOL_REF_FLAG} are historic and may be subsumed | |
898 | by @code{SYMBOL_REF_FLAGS}. Certainly use of @code{SYMBOL_REF_FLAGS} | |
899 | is mandatory if the target requires more than one bit of storage. | |
89045fd1 JL |
900 | @end table |
901 | ||
0341c5d2 | 902 | These are the fields to which the above macros refer: |
89045fd1 JL |
903 | |
904 | @table @code | |
0341c5d2 JJ |
905 | @findex call |
906 | @cindex @samp{/c} in RTL dump | |
907 | @item call | |
4da2eb6b | 908 | In a @code{mem}, 1 means that the memory reference will not trap. |
89045fd1 | 909 | |
5ba5ab9b KZ |
910 | In a @code{call}, 1 means that this pure or const call may possibly |
911 | infinite loop. | |
912 | ||
0341c5d2 | 913 | In an RTL dump, this flag is represented as @samp{/c}. |
89045fd1 | 914 | |
0341c5d2 JJ |
915 | @findex frame_related |
916 | @cindex @samp{/f} in RTL dump | |
917 | @item frame_related | |
918 | In an @code{insn} or @code{set} expression, 1 means that it is part of | |
919 | a function prologue and sets the stack pointer, sets the frame pointer, | |
920 | saves a register, or sets up a temporary register to use in place of the | |
921 | frame pointer. | |
89045fd1 | 922 | |
0341c5d2 | 923 | In @code{reg} expressions, 1 means that the register holds a pointer. |
89045fd1 | 924 | |
d1ed933d EB |
925 | In @code{mem} expressions, 1 means that the memory reference holds a pointer. |
926 | ||
0341c5d2 JJ |
927 | In @code{symbol_ref} expressions, 1 means that the reference addresses |
928 | this function's string constant pool. | |
89045fd1 | 929 | |
0341c5d2 | 930 | In an RTL dump, this flag is represented as @samp{/f}. |
89045fd1 JL |
931 | |
932 | @findex in_struct | |
0341c5d2 | 933 | @cindex @samp{/s} in RTL dump |
89045fd1 | 934 | @item in_struct |
89045fd1 JL |
935 | In @code{reg} expressions, it is 1 if the register has its entire life |
936 | contained within the test expression of some loop. | |
937 | ||
938 | In @code{subreg} expressions, 1 means that the @code{subreg} is accessing | |
939 | an object that has had its mode promoted from a wider mode. | |
940 | ||
941 | In @code{label_ref} expressions, 1 means that the referenced label is | |
942 | outside the innermost loop containing the insn in which the @code{label_ref} | |
943 | was found. | |
944 | ||
945 | In @code{code_label} expressions, it is 1 if the label may never be deleted. | |
ba72e5a6 HPN |
946 | This is used for labels which are the target of non-local gotos. Such a |
947 | label that would have been deleted is replaced with a @code{note} of type | |
948 | @code{NOTE_INSN_DELETED_LABEL}. | |
89045fd1 | 949 | |
0341c5d2 JJ |
950 | In an @code{insn} during dead-code elimination, 1 means that the insn is |
951 | dead code. | |
952 | ||
2d4cc6a7 JJ |
953 | In an @code{insn} or @code{jump_insn} during reorg for an insn in the |
954 | delay slot of a branch, | |
0341c5d2 JJ |
955 | 1 means that this insn is from the target of the branch. |
956 | ||
957 | In an @code{insn} during instruction scheduling, 1 means that this insn | |
958 | must be scheduled as part of a group together with the previous insn. | |
959 | ||
89045fd1 JL |
960 | In an RTL dump, this flag is represented as @samp{/s}. |
961 | ||
d1ed933d | 962 | @findex return_val |
0341c5d2 | 963 | @cindex @samp{/i} in RTL dump |
d1ed933d | 964 | @item return_val |
0341c5d2 JJ |
965 | In @code{reg} expressions, 1 means the register contains |
966 | the value to be returned by the current function. On | |
967 | machines that pass parameters in registers, the same register number | |
968 | may be used for parameters as well, but this flag is not set on such | |
969 | uses. | |
970 | ||
971 | In @code{symbol_ref} expressions, 1 means the referenced symbol is weak. | |
972 | ||
5ba5ab9b KZ |
973 | In @code{call} expressions, 1 means the call is pure. |
974 | ||
0341c5d2 JJ |
975 | In an RTL dump, this flag is represented as @samp{/i}. |
976 | ||
977 | @findex jump | |
978 | @cindex @samp{/j} in RTL dump | |
979 | @item jump | |
980 | In a @code{mem} expression, 1 means we should keep the alias set for this | |
981 | mem unchanged when we access a component. | |
982 | ||
983 | In a @code{set}, 1 means it is for a return. | |
984 | ||
985 | In a @code{call_insn}, 1 means it is a sibling call. | |
986 | ||
52af3804 EB |
987 | In a @code{jump_insn}, 1 means it is a crossing jump. |
988 | ||
0341c5d2 JJ |
989 | In an RTL dump, this flag is represented as @samp{/j}. |
990 | ||
89045fd1 | 991 | @findex unchanging |
0341c5d2 | 992 | @cindex @samp{/u} in RTL dump |
89045fd1 JL |
993 | @item unchanging |
994 | In @code{reg} and @code{mem} expressions, 1 means | |
995 | that the value of the expression never changes. | |
996 | ||
997 | In @code{subreg} expressions, it is 1 if the @code{subreg} references an | |
998 | unsigned object whose mode has been promoted to a wider mode. | |
999 | ||
2d4cc6a7 JJ |
1000 | In an @code{insn} or @code{jump_insn} in the delay slot of a branch |
1001 | instruction, 1 means an annulling branch should be used. | |
89045fd1 JL |
1002 | |
1003 | In a @code{symbol_ref} expression, 1 means that this symbol addresses | |
0341c5d2 | 1004 | something in the per-function constant pool. |
89045fd1 | 1005 | |
5ba5ab9b KZ |
1006 | In a @code{call_insn} 1 means that this instruction is a call to a const |
1007 | function. | |
89045fd1 JL |
1008 | |
1009 | In an RTL dump, this flag is represented as @samp{/u}. | |
1010 | ||
0341c5d2 JJ |
1011 | @findex used |
1012 | @item used | |
1013 | This flag is used directly (without an access macro) at the end of RTL | |
1014 | generation for a function, to count the number of times an expression | |
1015 | appears in insns. Expressions that appear more than once are copied, | |
1016 | according to the rules for shared structure (@pxref{Sharing}). | |
89045fd1 | 1017 | |
0341c5d2 JJ |
1018 | For a @code{reg}, it is used directly (without an access macro) by the |
1019 | leaf register renumbering code to ensure that each register is only | |
1020 | renumbered once. | |
1021 | ||
1022 | In a @code{symbol_ref}, it indicates that an external declaration for | |
1023 | the symbol has already been written. | |
1024 | ||
1025 | @findex volatil | |
1026 | @cindex @samp{/v} in RTL dump | |
1027 | @item volatil | |
1028 | @cindex volatile memory references | |
2d4cc6a7 JJ |
1029 | In a @code{mem}, @code{asm_operands}, or @code{asm_input} |
1030 | expression, it is 1 if the memory | |
0341c5d2 JJ |
1031 | reference is volatile. Volatile memory references may not be deleted, |
1032 | reordered or combined. | |
1033 | ||
1034 | In a @code{symbol_ref} expression, it is used for machine-specific | |
1035 | purposes. | |
1036 | ||
1037 | In a @code{reg} expression, it is 1 if the value is a user-level variable. | |
1038 | 0 indicates an internal compiler temporary. | |
1039 | ||
1040 | In an @code{insn}, 1 means the insn has been deleted. | |
1041 | ||
1042 | In @code{label_ref} and @code{reg_label} expressions, 1 means a reference | |
1043 | to a non-local label. | |
1044 | ||
3fce100b AK |
1045 | In @code{prefetch} expressions, 1 means that the containing insn is a |
1046 | scheduling barrier. | |
1047 | ||
0341c5d2 | 1048 | In an RTL dump, this flag is represented as @samp{/v}. |
89045fd1 JL |
1049 | @end table |
1050 | ||
4404ce28 | 1051 | @node Machine Modes |
89045fd1 JL |
1052 | @section Machine Modes |
1053 | @cindex machine modes | |
1054 | ||
ef4bddc2 | 1055 | @findex machine_mode |
89045fd1 JL |
1056 | A machine mode describes a size of data object and the representation used |
1057 | for it. In the C code, machine modes are represented by an enumeration | |
ef4bddc2 | 1058 | type, @code{machine_mode}, defined in @file{machmode.def}. Each RTL |
89045fd1 JL |
1059 | expression has room for a machine mode and so do certain kinds of tree |
1060 | expressions (declarations and types, to be precise). | |
1061 | ||
1062 | In debugging dumps and machine descriptions, the machine mode of an RTL | |
1063 | expression is written after the expression code with a colon to separate | |
1064 | them. The letters @samp{mode} which appear at the end of each machine mode | |
1065 | name are omitted. For example, @code{(reg:SI 38)} is a @code{reg} | |
1066 | expression with machine mode @code{SImode}. If the mode is | |
1067 | @code{VOIDmode}, it is not written at all. | |
1068 | ||
1069 | Here is a table of machine modes. The term ``byte'' below refers to an | |
1070 | object of @code{BITS_PER_UNIT} bits (@pxref{Storage Layout}). | |
1071 | ||
1072 | @table @code | |
815d683e PE |
1073 | @findex BImode |
1074 | @item BImode | |
1075 | ``Bit'' mode represents a single bit, for predicate registers. | |
1076 | ||
89045fd1 JL |
1077 | @findex QImode |
1078 | @item QImode | |
1079 | ``Quarter-Integer'' mode represents a single byte treated as an integer. | |
1080 | ||
1081 | @findex HImode | |
1082 | @item HImode | |
1083 | ``Half-Integer'' mode represents a two-byte integer. | |
1084 | ||
1085 | @findex PSImode | |
1086 | @item PSImode | |
1087 | ``Partial Single Integer'' mode represents an integer which occupies | |
1088 | four bytes but which doesn't really use all four. On some machines, | |
1089 | this is the right mode to use for pointers. | |
1090 | ||
1091 | @findex SImode | |
1092 | @item SImode | |
1093 | ``Single Integer'' mode represents a four-byte integer. | |
1094 | ||
1095 | @findex PDImode | |
1096 | @item PDImode | |
1097 | ``Partial Double Integer'' mode represents an integer which occupies | |
1098 | eight bytes but which doesn't really use all eight. On some machines, | |
1099 | this is the right mode to use for certain pointers. | |
1100 | ||
1101 | @findex DImode | |
1102 | @item DImode | |
1103 | ``Double Integer'' mode represents an eight-byte integer. | |
1104 | ||
1105 | @findex TImode | |
1106 | @item TImode | |
1107 | ``Tetra Integer'' (?) mode represents a sixteen-byte integer. | |
1108 | ||
815d683e PE |
1109 | @findex OImode |
1110 | @item OImode | |
1111 | ``Octa Integer'' (?) mode represents a thirty-two-byte integer. | |
1112 | ||
3f97cb0b AI |
1113 | @findex XImode |
1114 | @item XImode | |
1115 | ``Hexadeca Integer'' (?) mode represents a sixty-four-byte integer. | |
1116 | ||
cd6e5291 LB |
1117 | @findex QFmode |
1118 | @item QFmode | |
1119 | ``Quarter-Floating'' mode represents a quarter-precision (single byte) | |
1120 | floating point number. | |
1121 | ||
1122 | @findex HFmode | |
1123 | @item HFmode | |
1124 | ``Half-Floating'' mode represents a half-precision (two byte) floating | |
1125 | point number. | |
1126 | ||
1127 | @findex TQFmode | |
1128 | @item TQFmode | |
1129 | ``Three-Quarter-Floating'' (?) mode represents a three-quarter-precision | |
1130 | (three byte) floating point number. | |
1131 | ||
89045fd1 JL |
1132 | @findex SFmode |
1133 | @item SFmode | |
78373ade GK |
1134 | ``Single Floating'' mode represents a four byte floating point number. |
1135 | In the common case, of a processor with IEEE arithmetic and 8-bit bytes, | |
1136 | this is a single-precision IEEE floating point number; it can also be | |
1137 | used for double-precision (on processors with 16-bit bytes) and | |
cd6e5291 | 1138 | single-precision VAX and IBM types. |
89045fd1 JL |
1139 | |
1140 | @findex DFmode | |
1141 | @item DFmode | |
78373ade GK |
1142 | ``Double Floating'' mode represents an eight byte floating point number. |
1143 | In the common case, of a processor with IEEE arithmetic and 8-bit bytes, | |
1144 | this is a double-precision IEEE floating point number. | |
89045fd1 JL |
1145 | |
1146 | @findex XFmode | |
1147 | @item XFmode | |
968a7562 ZW |
1148 | ``Extended Floating'' mode represents an IEEE extended floating point |
1149 | number. This mode only has 80 meaningful bits (ten bytes). Some | |
1150 | processors require such numbers to be padded to twelve bytes, others | |
1151 | to sixteen; this mode is used for either. | |
89045fd1 | 1152 | |
3e70ce6b BE |
1153 | @findex SDmode |
1154 | @item SDmode | |
1155 | ``Single Decimal Floating'' mode represents a four byte decimal | |
1156 | floating point number (as distinct from conventional binary floating | |
1157 | point). | |
1158 | ||
1159 | @findex DDmode | |
1160 | @item DDmode | |
1161 | ``Double Decimal Floating'' mode represents an eight byte decimal | |
1162 | floating point number. | |
1163 | ||
1164 | @findex TDmode | |
1165 | @item TDmode | |
1166 | ``Tetra Decimal Floating'' mode represents a sixteen byte decimal | |
1167 | floating point number all 128 of whose bits are meaningful. | |
1168 | ||
89045fd1 JL |
1169 | @findex TFmode |
1170 | @item TFmode | |
968a7562 ZW |
1171 | ``Tetra Floating'' mode represents a sixteen byte floating point number |
1172 | all 128 of whose bits are meaningful. One common use is the | |
1173 | IEEE quad-precision format. | |
89045fd1 | 1174 | |
1699ec0b CF |
1175 | @findex QQmode |
1176 | @item QQmode | |
1177 | ``Quarter-Fractional'' mode represents a single byte treated as a signed | |
1178 | fractional number. The default format is ``s.7''. | |
1179 | ||
1180 | @findex HQmode | |
1181 | @item HQmode | |
1182 | ``Half-Fractional'' mode represents a two-byte signed fractional number. | |
1183 | The default format is ``s.15''. | |
1184 | ||
1185 | @findex SQmode | |
1186 | @item SQmode | |
1187 | ``Single Fractional'' mode represents a four-byte signed fractional number. | |
1188 | The default format is ``s.31''. | |
1189 | ||
1190 | @findex DQmode | |
1191 | @item DQmode | |
1192 | ``Double Fractional'' mode represents an eight-byte signed fractional number. | |
1193 | The default format is ``s.63''. | |
1194 | ||
1195 | @findex TQmode | |
1196 | @item TQmode | |
1197 | ``Tetra Fractional'' mode represents a sixteen-byte signed fractional number. | |
1198 | The default format is ``s.127''. | |
1199 | ||
1200 | @findex UQQmode | |
1201 | @item UQQmode | |
1202 | ``Unsigned Quarter-Fractional'' mode represents a single byte treated as an | |
1203 | unsigned fractional number. The default format is ``.8''. | |
1204 | ||
1205 | @findex UHQmode | |
1206 | @item UHQmode | |
1207 | ``Unsigned Half-Fractional'' mode represents a two-byte unsigned fractional | |
1208 | number. The default format is ``.16''. | |
1209 | ||
1210 | @findex USQmode | |
1211 | @item USQmode | |
1212 | ``Unsigned Single Fractional'' mode represents a four-byte unsigned fractional | |
1213 | number. The default format is ``.32''. | |
1214 | ||
1215 | @findex UDQmode | |
1216 | @item UDQmode | |
1217 | ``Unsigned Double Fractional'' mode represents an eight-byte unsigned | |
1218 | fractional number. The default format is ``.64''. | |
1219 | ||
1220 | @findex UTQmode | |
1221 | @item UTQmode | |
1222 | ``Unsigned Tetra Fractional'' mode represents a sixteen-byte unsigned | |
1223 | fractional number. The default format is ``.128''. | |
1224 | ||
1225 | @findex HAmode | |
1226 | @item HAmode | |
1227 | ``Half-Accumulator'' mode represents a two-byte signed accumulator. | |
1228 | The default format is ``s8.7''. | |
1229 | ||
1230 | @findex SAmode | |
1231 | @item SAmode | |
1232 | ``Single Accumulator'' mode represents a four-byte signed accumulator. | |
1233 | The default format is ``s16.15''. | |
1234 | ||
1235 | @findex DAmode | |
1236 | @item DAmode | |
1237 | ``Double Accumulator'' mode represents an eight-byte signed accumulator. | |
1238 | The default format is ``s32.31''. | |
1239 | ||
1240 | @findex TAmode | |
1241 | @item TAmode | |
1242 | ``Tetra Accumulator'' mode represents a sixteen-byte signed accumulator. | |
1243 | The default format is ``s64.63''. | |
1244 | ||
1245 | @findex UHAmode | |
1246 | @item UHAmode | |
1247 | ``Unsigned Half-Accumulator'' mode represents a two-byte unsigned accumulator. | |
1248 | The default format is ``8.8''. | |
1249 | ||
1250 | @findex USAmode | |
1251 | @item USAmode | |
1252 | ``Unsigned Single Accumulator'' mode represents a four-byte unsigned | |
1253 | accumulator. The default format is ``16.16''. | |
1254 | ||
1255 | @findex UDAmode | |
1256 | @item UDAmode | |
1257 | ``Unsigned Double Accumulator'' mode represents an eight-byte unsigned | |
1258 | accumulator. The default format is ``32.32''. | |
1259 | ||
1260 | @findex UTAmode | |
1261 | @item UTAmode | |
1262 | ``Unsigned Tetra Accumulator'' mode represents a sixteen-byte unsigned | |
1263 | accumulator. The default format is ``64.64''. | |
1264 | ||
89045fd1 JL |
1265 | @findex CCmode |
1266 | @item CCmode | |
1267 | ``Condition Code'' mode represents the value of a condition code, which | |
1268 | is a machine-specific set of bits used to represent the result of a | |
1269 | comparison operation. Other machine-specific modes may also be used for | |
1270 | the condition code. These modes are not used on machines that use | |
0d52f2a8 | 1271 | @code{cc0} (@pxref{Condition Code}). |
89045fd1 JL |
1272 | |
1273 | @findex BLKmode | |
1274 | @item BLKmode | |
1275 | ``Block'' mode represents values that are aggregates to which none of | |
1276 | the other modes apply. In RTL, only memory references can have this mode, | |
1277 | and only if they appear in string-move or vector instructions. On machines | |
161d7b59 | 1278 | which have no such instructions, @code{BLKmode} will not appear in RTL@. |
89045fd1 JL |
1279 | |
1280 | @findex VOIDmode | |
1281 | @item VOIDmode | |
1282 | Void mode means the absence of a mode or an unspecified mode. | |
1283 | For example, RTL expressions of code @code{const_int} have mode | |
1284 | @code{VOIDmode} because they can be taken to have whatever mode the context | |
1285 | requires. In debugging dumps of RTL, @code{VOIDmode} is expressed by | |
1286 | the absence of any mode. | |
1287 | ||
cd6e5291 LB |
1288 | @findex QCmode |
1289 | @findex HCmode | |
89045fd1 JL |
1290 | @findex SCmode |
1291 | @findex DCmode | |
1292 | @findex XCmode | |
1293 | @findex TCmode | |
cd6e5291 | 1294 | @item QCmode, HCmode, SCmode, DCmode, XCmode, TCmode |
89045fd1 | 1295 | These modes stand for a complex number represented as a pair of floating |
cd6e5291 LB |
1296 | point values. The floating point values are in @code{QFmode}, |
1297 | @code{HFmode}, @code{SFmode}, @code{DFmode}, @code{XFmode}, and | |
1298 | @code{TFmode}, respectively. | |
89045fd1 JL |
1299 | |
1300 | @findex CQImode | |
1301 | @findex CHImode | |
1302 | @findex CSImode | |
1303 | @findex CDImode | |
1304 | @findex CTImode | |
1305 | @findex COImode | |
1306 | @item CQImode, CHImode, CSImode, CDImode, CTImode, COImode | |
1307 | These modes stand for a complex number represented as a pair of integer | |
1308 | values. The integer values are in @code{QImode}, @code{HImode}, | |
1309 | @code{SImode}, @code{DImode}, @code{TImode}, and @code{OImode}, | |
1310 | respectively. | |
d5e254e1 IE |
1311 | |
1312 | @findex BND32mode | |
1313 | @findex BND64mode | |
1314 | @item BND32mode BND64mode | |
1315 | These modes stand for bounds for pointer of 32 and 64 bit size respectively. | |
1316 | Mode size is double pointer mode size. | |
89045fd1 JL |
1317 | @end table |
1318 | ||
1319 | The machine description defines @code{Pmode} as a C macro which expands | |
1320 | into the machine mode used for addresses. Normally this is the mode | |
1321 | whose size is @code{BITS_PER_WORD}, @code{SImode} on 32-bit machines. | |
1322 | ||
1323 | The only modes which a machine description @i{must} support are | |
1324 | @code{QImode}, and the modes corresponding to @code{BITS_PER_WORD}, | |
1325 | @code{FLOAT_TYPE_SIZE} and @code{DOUBLE_TYPE_SIZE}. | |
1326 | The compiler will attempt to use @code{DImode} for 8-byte structures and | |
1327 | unions, but this can be prevented by overriding the definition of | |
1328 | @code{MAX_FIXED_MODE_SIZE}. Alternatively, you can have the compiler | |
1329 | use @code{TImode} for 16-byte structures and unions. Likewise, you can | |
1330 | arrange for the C type @code{short int} to avoid using @code{HImode}. | |
1331 | ||
1332 | @cindex mode classes | |
1333 | Very few explicit references to machine modes remain in the compiler and | |
1334 | these few references will soon be removed. Instead, the machine modes | |
1335 | are divided into mode classes. These are represented by the enumeration | |
1336 | type @code{enum mode_class} defined in @file{machmode.h}. The possible | |
1337 | mode classes are: | |
1338 | ||
1339 | @table @code | |
1340 | @findex MODE_INT | |
1341 | @item MODE_INT | |
cd6e5291 LB |
1342 | Integer modes. By default these are @code{BImode}, @code{QImode}, |
1343 | @code{HImode}, @code{SImode}, @code{DImode}, @code{TImode}, and | |
1344 | @code{OImode}. | |
89045fd1 JL |
1345 | |
1346 | @findex MODE_PARTIAL_INT | |
1347 | @item MODE_PARTIAL_INT | |
cd6e5291 LB |
1348 | The ``partial integer'' modes, @code{PQImode}, @code{PHImode}, |
1349 | @code{PSImode} and @code{PDImode}. | |
89045fd1 JL |
1350 | |
1351 | @findex MODE_FLOAT | |
1352 | @item MODE_FLOAT | |
cd6e5291 LB |
1353 | Floating point modes. By default these are @code{QFmode}, |
1354 | @code{HFmode}, @code{TQFmode}, @code{SFmode}, @code{DFmode}, | |
89045fd1 JL |
1355 | @code{XFmode} and @code{TFmode}. |
1356 | ||
3e70ce6b BE |
1357 | @findex MODE_DECIMAL_FLOAT |
1358 | @item MODE_DECIMAL_FLOAT | |
1359 | Decimal floating point modes. By default these are @code{SDmode}, | |
1360 | @code{DDmode} and @code{TDmode}. | |
1361 | ||
1699ec0b CF |
1362 | @findex MODE_FRACT |
1363 | @item MODE_FRACT | |
1364 | Signed fractional modes. By default these are @code{QQmode}, @code{HQmode}, | |
1365 | @code{SQmode}, @code{DQmode} and @code{TQmode}. | |
1366 | ||
1367 | @findex MODE_UFRACT | |
1368 | @item MODE_UFRACT | |
1369 | Unsigned fractional modes. By default these are @code{UQQmode}, @code{UHQmode}, | |
1370 | @code{USQmode}, @code{UDQmode} and @code{UTQmode}. | |
1371 | ||
1372 | @findex MODE_ACCUM | |
1373 | @item MODE_ACCUM | |
1374 | Signed accumulator modes. By default these are @code{HAmode}, | |
1375 | @code{SAmode}, @code{DAmode} and @code{TAmode}. | |
1376 | ||
1377 | @findex MODE_UACCUM | |
1378 | @item MODE_UACCUM | |
1379 | Unsigned accumulator modes. By default these are @code{UHAmode}, | |
1380 | @code{USAmode}, @code{UDAmode} and @code{UTAmode}. | |
1381 | ||
89045fd1 JL |
1382 | @findex MODE_COMPLEX_INT |
1383 | @item MODE_COMPLEX_INT | |
1384 | Complex integer modes. (These are not currently implemented). | |
1385 | ||
1386 | @findex MODE_COMPLEX_FLOAT | |
1387 | @item MODE_COMPLEX_FLOAT | |
cd6e5291 LB |
1388 | Complex floating point modes. By default these are @code{QCmode}, |
1389 | @code{HCmode}, @code{SCmode}, @code{DCmode}, @code{XCmode}, and | |
1390 | @code{TCmode}. | |
89045fd1 JL |
1391 | |
1392 | @findex MODE_FUNCTION | |
1393 | @item MODE_FUNCTION | |
1394 | Algol or Pascal function variables including a static chain. | |
1395 | (These are not currently implemented). | |
1396 | ||
1397 | @findex MODE_CC | |
1398 | @item MODE_CC | |
1399 | Modes representing condition code values. These are @code{CCmode} plus | |
ff2ce160 | 1400 | any @code{CC_MODE} modes listed in the @file{@var{machine}-modes.def}. |
f1c9d07d | 1401 | @xref{Jump Patterns}, |
89045fd1 JL |
1402 | also see @ref{Condition Code}. |
1403 | ||
d5e254e1 IE |
1404 | @findex MODE_POINTER_BOUNDS |
1405 | @item MODE_POINTER_BOUNDS | |
1406 | Pointer bounds modes. Used to represent values of pointer bounds type. | |
1407 | Operations in these modes may be executed as NOPs depending on hardware | |
1408 | features and environment setup. | |
1409 | ||
89045fd1 JL |
1410 | @findex MODE_RANDOM |
1411 | @item MODE_RANDOM | |
1412 | This is a catchall mode class for modes which don't fit into the above | |
1413 | classes. Currently @code{VOIDmode} and @code{BLKmode} are in | |
1414 | @code{MODE_RANDOM}. | |
1415 | @end table | |
1416 | ||
1417 | Here are some C macros that relate to machine modes: | |
1418 | ||
1419 | @table @code | |
1420 | @findex GET_MODE | |
1421 | @item GET_MODE (@var{x}) | |
1422 | Returns the machine mode of the RTX @var{x}. | |
1423 | ||
1424 | @findex PUT_MODE | |
1425 | @item PUT_MODE (@var{x}, @var{newmode}) | |
1426 | Alters the machine mode of the RTX @var{x} to be @var{newmode}. | |
1427 | ||
1428 | @findex NUM_MACHINE_MODES | |
1429 | @item NUM_MACHINE_MODES | |
1430 | Stands for the number of machine modes available on the target | |
1431 | machine. This is one greater than the largest numeric value of any | |
1432 | machine mode. | |
1433 | ||
1434 | @findex GET_MODE_NAME | |
1435 | @item GET_MODE_NAME (@var{m}) | |
1436 | Returns the name of mode @var{m} as a string. | |
1437 | ||
1438 | @findex GET_MODE_CLASS | |
1439 | @item GET_MODE_CLASS (@var{m}) | |
1440 | Returns the mode class of mode @var{m}. | |
1441 | ||
1442 | @findex GET_MODE_WIDER_MODE | |
1443 | @item GET_MODE_WIDER_MODE (@var{m}) | |
1444 | Returns the next wider natural mode. For example, the expression | |
1445 | @code{GET_MODE_WIDER_MODE (QImode)} returns @code{HImode}. | |
1446 | ||
1447 | @findex GET_MODE_SIZE | |
1448 | @item GET_MODE_SIZE (@var{m}) | |
1449 | Returns the size in bytes of a datum of mode @var{m}. | |
1450 | ||
1451 | @findex GET_MODE_BITSIZE | |
1452 | @item GET_MODE_BITSIZE (@var{m}) | |
1453 | Returns the size in bits of a datum of mode @var{m}. | |
1454 | ||
1699ec0b CF |
1455 | @findex GET_MODE_IBIT |
1456 | @item GET_MODE_IBIT (@var{m}) | |
1457 | Returns the number of integral bits of a datum of fixed-point mode @var{m}. | |
1458 | ||
1459 | @findex GET_MODE_FBIT | |
1460 | @item GET_MODE_FBIT (@var{m}) | |
1461 | Returns the number of fractional bits of a datum of fixed-point mode @var{m}. | |
1462 | ||
89045fd1 JL |
1463 | @findex GET_MODE_MASK |
1464 | @item GET_MODE_MASK (@var{m}) | |
1465 | Returns a bitmask containing 1 for all bits in a word that fit within | |
1466 | mode @var{m}. This macro can only be used for modes whose bitsize is | |
1467 | less than or equal to @code{HOST_BITS_PER_INT}. | |
1468 | ||
1469 | @findex GET_MODE_ALIGNMENT | |
305f3003 | 1470 | @item GET_MODE_ALIGNMENT (@var{m}) |
89045fd1 JL |
1471 | Return the required alignment, in bits, for an object of mode @var{m}. |
1472 | ||
1473 | @findex GET_MODE_UNIT_SIZE | |
1474 | @item GET_MODE_UNIT_SIZE (@var{m}) | |
1475 | Returns the size in bytes of the subunits of a datum of mode @var{m}. | |
1476 | This is the same as @code{GET_MODE_SIZE} except in the case of complex | |
1477 | modes. For them, the unit size is the size of the real or imaginary | |
1478 | part. | |
1479 | ||
1480 | @findex GET_MODE_NUNITS | |
1481 | @item GET_MODE_NUNITS (@var{m}) | |
1482 | Returns the number of units contained in a mode, i.e., | |
1483 | @code{GET_MODE_SIZE} divided by @code{GET_MODE_UNIT_SIZE}. | |
1484 | ||
1485 | @findex GET_CLASS_NARROWEST_MODE | |
1486 | @item GET_CLASS_NARROWEST_MODE (@var{c}) | |
1487 | Returns the narrowest mode in mode class @var{c}. | |
1488 | @end table | |
1489 | ||
8fd05f4d | 1490 | The following 3 variables are defined on every target. They can be |
8697be17 | 1491 | used to allocate buffers that are guaranteed to be large enough to |
8fd05f4d KZ |
1492 | hold any value that can be represented on the target. The first two |
1493 | can be overridden by defining them in the target's mode.def file, | |
1494 | however, the value must be a constant that can determined very early | |
1495 | in the compilation process. The third symbol cannot be overridden. | |
8697be17 KZ |
1496 | |
1497 | @table @code | |
8fd05f4d KZ |
1498 | @findex BITS_PER_UNIT |
1499 | @item BITS_PER_UNIT | |
1500 | The number of bits in an addressable storage unit (byte). If you do | |
1501 | not define this, the default is 8. | |
1502 | ||
8697be17 KZ |
1503 | @findex MAX_BITSIZE_MODE_ANY_INT |
1504 | @item MAX_BITSIZE_MODE_ANY_INT | |
8fd05f4d KZ |
1505 | The maximum bitsize of any mode that is used in integer math. This |
1506 | should be overridden by the target if it uses large integers as | |
1507 | containers for larger vectors but otherwise never uses the contents to | |
1508 | compute integer values. | |
8697be17 KZ |
1509 | |
1510 | @findex MAX_BITSIZE_MODE_ANY_MODE | |
1511 | @item MAX_BITSIZE_MODE_ANY_MODE | |
1512 | The bitsize of the largest mode on the target. | |
1513 | @end table | |
1514 | ||
89045fd1 JL |
1515 | @findex byte_mode |
1516 | @findex word_mode | |
1517 | The global variables @code{byte_mode} and @code{word_mode} contain modes | |
1518 | whose classes are @code{MODE_INT} and whose bitsizes are either | |
1519 | @code{BITS_PER_UNIT} or @code{BITS_PER_WORD}, respectively. On 32-bit | |
1520 | machines, these are @code{QImode} and @code{SImode}, respectively. | |
1521 | ||
4404ce28 | 1522 | @node Constants |
89045fd1 JL |
1523 | @section Constant Expression Types |
1524 | @cindex RTL constants | |
1525 | @cindex RTL constant expression types | |
1526 | ||
1527 | The simplest RTL expressions are those that represent constant values. | |
1528 | ||
1529 | @table @code | |
1530 | @findex const_int | |
1531 | @item (const_int @var{i}) | |
1532 | This type of expression represents the integer value @var{i}. @var{i} | |
1533 | is customarily accessed with the macro @code{INTVAL} as in | |
1534 | @code{INTVAL (@var{exp})}, which is equivalent to @code{XWINT (@var{exp}, 0)}. | |
1535 | ||
929e10f4 MS |
1536 | Constants generated for modes with fewer bits than in |
1537 | @code{HOST_WIDE_INT} must be sign extended to full width (e.g., with | |
1538 | @code{gen_int_mode}). For constants for modes with more bits than in | |
1539 | @code{HOST_WIDE_INT} the implied high order bits of that constant are | |
1540 | copies of the top bit. Note however that values are neither | |
1541 | inherently signed nor inherently unsigned; where necessary, signedness | |
1542 | is determined by the rtl operation instead. | |
eacf8912 | 1543 | |
89045fd1 JL |
1544 | @findex const0_rtx |
1545 | @findex const1_rtx | |
1546 | @findex const2_rtx | |
1547 | @findex constm1_rtx | |
1548 | There is only one expression object for the integer value zero; it is | |
1549 | the value of the variable @code{const0_rtx}. Likewise, the only | |
1550 | expression for integer value one is found in @code{const1_rtx}, the only | |
1551 | expression for integer value two is found in @code{const2_rtx}, and the | |
1552 | only expression for integer value negative one is found in | |
1553 | @code{constm1_rtx}. Any attempt to create an expression of code | |
1554 | @code{const_int} and value zero, one, two or negative one will return | |
1555 | @code{const0_rtx}, @code{const1_rtx}, @code{const2_rtx} or | |
bd819a4a | 1556 | @code{constm1_rtx} as appropriate. |
89045fd1 JL |
1557 | |
1558 | @findex const_true_rtx | |
1559 | Similarly, there is only one object for the integer whose value is | |
1560 | @code{STORE_FLAG_VALUE}. It is found in @code{const_true_rtx}. If | |
1561 | @code{STORE_FLAG_VALUE} is one, @code{const_true_rtx} and | |
1562 | @code{const1_rtx} will point to the same object. If | |
630d3d5a | 1563 | @code{STORE_FLAG_VALUE} is @minus{}1, @code{const_true_rtx} and |
bd819a4a | 1564 | @code{constm1_rtx} will point to the same object. |
89045fd1 JL |
1565 | |
1566 | @findex const_double | |
bf520698 | 1567 | @item (const_double:@var{m} @var{i0} @var{i1} @dots{}) |
807e902e KZ |
1568 | This represents either a floating-point constant of mode @var{m} or |
1569 | (on older ports that do not define | |
1570 | @code{TARGET_SUPPORTS_WIDE_INT}) an integer constant too large to fit | |
1571 | into @code{HOST_BITS_PER_WIDE_INT} bits but small enough to fit within | |
1572 | twice that number of bits. In the latter case, @var{m} will be | |
1573 | @code{VOIDmode}. For integral values constants for modes with more | |
1574 | bits than twice the number in @code{HOST_WIDE_INT} the implied high | |
1575 | order bits of that constant are copies of the top bit of | |
1576 | @code{CONST_DOUBLE_HIGH}. Note however that integral values are | |
1577 | neither inherently signed nor inherently unsigned; where necessary, | |
1578 | signedness is determined by the rtl operation instead. | |
1579 | ||
1580 | On more modern ports, @code{CONST_DOUBLE} only represents floating | |
1581 | point values. New ports define @code{TARGET_SUPPORTS_WIDE_INT} to | |
1582 | make this designation. | |
89045fd1 | 1583 | |
bf520698 RS |
1584 | @findex CONST_DOUBLE_LOW |
1585 | If @var{m} is @code{VOIDmode}, the bits of the value are stored in | |
1586 | @var{i0} and @var{i1}. @var{i0} is customarily accessed with the macro | |
1587 | @code{CONST_DOUBLE_LOW} and @var{i1} with @code{CONST_DOUBLE_HIGH}. | |
1588 | ||
1589 | If the constant is floating point (regardless of its precision), then | |
1590 | the number of integers used to store the value depends on the size of | |
1591 | @code{REAL_VALUE_TYPE} (@pxref{Floating Point}). The integers | |
1592 | represent a floating point number, but not precisely in the target | |
1593 | machine's or host machine's floating point format. To convert them to | |
1594 | the precise bit pattern used by the target machine, use the macro | |
1595 | @code{REAL_VALUE_TO_TARGET_DOUBLE} and friends (@pxref{Data Output}). | |
1596 | ||
807e902e KZ |
1597 | @findex CONST_WIDE_INT |
1598 | @item (const_wide_int:@var{m} @var{nunits} @var{elt0} @dots{}) | |
1599 | This contains an array of @code{HOST_WIDE_INT}s that is large enough | |
1600 | to hold any constant that can be represented on the target. This form | |
1601 | of rtl is only used on targets that define | |
1602 | @code{TARGET_SUPPORTS_WIDE_INT} to be nonzero and then | |
1603 | @code{CONST_DOUBLE}s are only used to hold floating-point values. If | |
1604 | the target leaves @code{TARGET_SUPPORTS_WIDE_INT} defined as 0, | |
1605 | @code{CONST_WIDE_INT}s are not used and @code{CONST_DOUBLE}s are as | |
1606 | they were before. | |
1607 | ||
1608 | The values are stored in a compressed format. The higher-order | |
1609 | 0s or -1s are not represented if they are just the logical sign | |
1610 | extension of the number that is represented. | |
1611 | ||
1612 | @findex CONST_WIDE_INT_VEC | |
1613 | @item CONST_WIDE_INT_VEC (@var{code}) | |
1614 | Returns the entire array of @code{HOST_WIDE_INT}s that are used to | |
1615 | store the value. This macro should be rarely used. | |
1616 | ||
1617 | @findex CONST_WIDE_INT_NUNITS | |
1618 | @item CONST_WIDE_INT_NUNITS (@var{code}) | |
1619 | The number of @code{HOST_WIDE_INT}s used to represent the number. | |
1620 | Note that this generally is smaller than the number of | |
1621 | @code{HOST_WIDE_INT}s implied by the mode size. | |
1622 | ||
1623 | @findex CONST_WIDE_INT_ELT | |
1624 | @item CONST_WIDE_INT_NUNITS (@var{code},@var{i}) | |
1625 | Returns the @code{i}th element of the array. Element 0 is contains | |
1626 | the low order bits of the constant. | |
1627 | ||
091a3ac7 | 1628 | @findex const_fixed |
bf520698 | 1629 | @item (const_fixed:@var{m} @dots{}) |
091a3ac7 | 1630 | Represents a fixed-point constant of mode @var{m}. |
bf520698 RS |
1631 | The operand is a data structure of type @code{struct fixed_value} and |
1632 | is accessed with the macro @code{CONST_FIXED_VALUE}. The high part of | |
1633 | data is accessed with @code{CONST_FIXED_VALUE_HIGH}; the low part is | |
1634 | accessed with @code{CONST_FIXED_VALUE_LOW}. | |
091a3ac7 | 1635 | |
0c12fc9b RS |
1636 | @findex const_poly_int |
1637 | @item (const_poly_int:@var{m} [@var{c0} @var{c1} @dots{}]) | |
1638 | Represents a @code{poly_int}-style polynomial integer with coefficients | |
1639 | @var{c0}, @var{c1}, @dots{}. The coefficients are @code{wide_int}-based | |
1640 | integers rather than rtxes. @code{CONST_POLY_INT_COEFFS} gives the | |
1641 | values of individual coefficients (which is mostly only useful in | |
1642 | low-level routines) and @code{const_poly_int_value} gives the full | |
1643 | @code{poly_int} value. | |
1644 | ||
69ef87e2 AH |
1645 | @findex const_vector |
1646 | @item (const_vector:@var{m} [@var{x0} @var{x1} @dots{}]) | |
3877c560 RS |
1647 | Represents a vector constant. The values in square brackets are |
1648 | elements of the vector, which are always @code{const_int}, | |
1649 | @code{const_wide_int}, @code{const_double} or @code{const_fixed} | |
1650 | expressions. | |
1651 | ||
1652 | Each vector constant @var{v} is treated as a specific instance of an | |
1653 | arbitrary-length sequence that itself contains | |
1654 | @samp{CONST_VECTOR_NPATTERNS (@var{v})} interleaved patterns. Each | |
1655 | pattern has the form: | |
1656 | ||
1657 | @smallexample | |
1658 | @{ @var{base0}, @var{base1}, @var{base1} + @var{step}, @var{base1} + @var{step} * 2, @dots{} @} | |
1659 | @end smallexample | |
1660 | ||
1661 | The first three elements in each pattern are enough to determine the | |
1662 | values of the other elements. However, if all @var{step}s are zero, | |
1663 | only the first two elements are needed. If in addition each @var{base1} | |
1664 | is equal to the corresponding @var{base0}, only the first element in | |
1665 | each pattern is needed. The number of determining elements per pattern | |
1666 | is given by @samp{CONST_VECTOR_NELTS_PER_PATTERN (@var{v})}. | |
1667 | ||
1668 | For example, the constant: | |
1669 | ||
1670 | @smallexample | |
1671 | @{ 0, 1, 2, 6, 3, 8, 4, 10, 5, 12, 6, 14, 7, 16, 8, 18 @} | |
1672 | @end smallexample | |
1673 | ||
1674 | is interpreted as an interleaving of the sequences: | |
1675 | ||
1676 | @smallexample | |
1677 | @{ 0, 2, 3, 4, 5, 6, 7, 8 @} | |
1678 | @{ 1, 6, 8, 10, 12, 14, 16, 18 @} | |
1679 | @end smallexample | |
1680 | ||
1681 | where the sequences are represented by the following patterns: | |
1682 | ||
1683 | @smallexample | |
1684 | @var{base0} == 0, @var{base1} == 2, @var{step} == 1 | |
1685 | @var{base0} == 1, @var{base1} == 6, @var{step} == 2 | |
1686 | @end smallexample | |
1687 | ||
1688 | In this case: | |
1689 | ||
1690 | @smallexample | |
1691 | CONST_VECTOR_NPATTERNS (@var{v}) == 2 | |
1692 | CONST_VECTOR_NELTS_PER_PATTERN (@var{v}) == 3 | |
1693 | @end smallexample | |
1694 | ||
1695 | Thus the first 6 elements (@samp{@{ 0, 1, 2, 6, 3, 8 @}}) are enough | |
1696 | to determine the whole sequence; we refer to them as the ``encoded'' | |
1697 | elements. They are the only elements present in the square brackets | |
1698 | for variable-length @code{const_vector}s (i.e. for | |
1699 | @code{const_vector}s whose mode @var{m} has a variable number of | |
1700 | elements). However, as a convenience to code that needs to handle | |
1701 | both @code{const_vector}s and @code{parallel}s, all elements are | |
1702 | present in the square brackets for fixed-length @code{const_vector}s; | |
1703 | the encoding scheme simply reduces the amount of work involved in | |
1704 | processing constants that follow a regular pattern. | |
1705 | ||
1706 | Sometimes this scheme can create two possible encodings of the same | |
1707 | vector. For example @{ 0, 1 @} could be seen as two patterns with | |
1708 | one element each or one pattern with two elements (@var{base0} and | |
1709 | @var{base1}). The canonical encoding is always the one with the | |
1710 | fewest patterns or (if both encodings have the same number of | |
1711 | petterns) the one with the fewest encoded elements. | |
1712 | ||
1713 | @samp{const_vector_encoding_nelts (@var{v})} gives the total number of | |
1714 | encoded elements in @var{v}, which is 6 in the example above. | |
1715 | @code{CONST_VECTOR_ENCODED_ELT (@var{v}, @var{i})} accesses the value | |
1716 | of encoded element @var{i}. | |
1717 | ||
1718 | @samp{CONST_VECTOR_DUPLICATE_P (@var{v})} is true if @var{v} simply contains | |
1719 | repeated instances of @samp{CONST_VECTOR_NPATTERNS (@var{v})} values. This is | |
1720 | a shorthand for testing @samp{CONST_VECTOR_NELTS_PER_PATTERN (@var{v}) == 1}. | |
1721 | ||
1722 | @samp{CONST_VECTOR_STEPPED_P (@var{v})} is true if at least one | |
1723 | pattern in @var{v} has a nonzero step. This is a shorthand for | |
1724 | testing @samp{CONST_VECTOR_NELTS_PER_PATTERN (@var{v}) == 3}. | |
1725 | ||
1726 | @code{CONST_VECTOR_NUNITS (@var{v})} gives the total number of elements | |
1727 | in @var{v}; it is a shorthand for getting the number of units in | |
1728 | @samp{GET_MODE (@var{v})}. | |
1729 | ||
1730 | The utility function @code{const_vector_elt} gives the value of an | |
1731 | arbitrary element as an @code{rtx}. @code{const_vector_int_elt} gives | |
1732 | the same value as a @code{wide_int}. | |
69ef87e2 | 1733 | |
89045fd1 JL |
1734 | @findex const_string |
1735 | @item (const_string @var{str}) | |
1736 | Represents a constant string with value @var{str}. Currently this is | |
1737 | used only for insn attributes (@pxref{Insn Attributes}) since constant | |
1738 | strings in C are placed in memory. | |
1739 | ||
1740 | @findex symbol_ref | |
1741 | @item (symbol_ref:@var{mode} @var{symbol}) | |
1742 | Represents the value of an assembler label for data. @var{symbol} is | |
1743 | a string that describes the name of the assembler label. If it starts | |
1744 | with a @samp{*}, the label is the rest of @var{symbol} not including | |
1745 | the @samp{*}. Otherwise, the label is @var{symbol}, usually prefixed | |
1746 | with @samp{_}. | |
1747 | ||
1748 | The @code{symbol_ref} contains a mode, which is usually @code{Pmode}. | |
1749 | Usually that is the only mode for which a symbol is directly valid. | |
1750 | ||
1751 | @findex label_ref | |
4c33cb26 | 1752 | @item (label_ref:@var{mode} @var{label}) |
89045fd1 | 1753 | Represents the value of an assembler label for code. It contains one |
ba72e5a6 HPN |
1754 | operand, an expression, which must be a @code{code_label} or a @code{note} |
1755 | of type @code{NOTE_INSN_DELETED_LABEL} that appears in the instruction | |
1756 | sequence to identify the place where the label should go. | |
89045fd1 JL |
1757 | |
1758 | The reason for using a distinct expression type for code label | |
1759 | references is so that jump optimization can distinguish them. | |
1760 | ||
4c33cb26 R |
1761 | The @code{label_ref} contains a mode, which is usually @code{Pmode}. |
1762 | Usually that is the only mode for which a label is directly valid. | |
1763 | ||
bf520698 | 1764 | @findex const |
89045fd1 | 1765 | @item (const:@var{m} @var{exp}) |
06ec586d RS |
1766 | Wraps an rtx computation @var{exp} whose inputs and result do not |
1767 | change during the execution of a thread. There are two valid uses. | |
1768 | The first is to represent a global or thread-local address calculation. | |
1769 | In this case @var{exp} should contain @code{const_int}, | |
1770 | @code{symbol_ref}, @code{label_ref} or @code{unspec} expressions, | |
1771 | combined with @code{plus} and @code{minus}. Any such @code{unspec}s | |
1772 | are target-specific and typically represent some form of relocation | |
1773 | operator. @var{m} should be a valid address mode. | |
1774 | ||
1775 | The second use of @code{const} is to wrap a vector operation. | |
ef339d6e RS |
1776 | In this case @var{exp} must be a @code{vec_duplicate} or |
1777 | @code{vec_series} expression. | |
89045fd1 JL |
1778 | |
1779 | @findex high | |
1780 | @item (high:@var{m} @var{exp}) | |
1781 | Represents the high-order bits of @var{exp}, usually a | |
1782 | @code{symbol_ref}. The number of bits is machine-dependent and is | |
1783 | normally the number of bits specified in an instruction that initializes | |
1784 | the high order bits of a register. It is used with @code{lo_sum} to | |
1785 | represent the typical two-instruction sequence used in RISC machines to | |
1786 | reference a global memory location. | |
1787 | ||
1788 | @var{m} should be @code{Pmode}. | |
1789 | @end table | |
1790 | ||
bf520698 RS |
1791 | @findex CONST0_RTX |
1792 | @findex CONST1_RTX | |
1793 | @findex CONST2_RTX | |
1794 | The macro @code{CONST0_RTX (@var{mode})} refers to an expression with | |
1795 | value 0 in mode @var{mode}. If mode @var{mode} is of mode class | |
1796 | @code{MODE_INT}, it returns @code{const0_rtx}. If mode @var{mode} is of | |
1797 | mode class @code{MODE_FLOAT}, it returns a @code{CONST_DOUBLE} | |
1798 | expression in mode @var{mode}. Otherwise, it returns a | |
1799 | @code{CONST_VECTOR} expression in mode @var{mode}. Similarly, the macro | |
1800 | @code{CONST1_RTX (@var{mode})} refers to an expression with value 1 in | |
1801 | mode @var{mode} and similarly for @code{CONST2_RTX}. The | |
1802 | @code{CONST1_RTX} and @code{CONST2_RTX} macros are undefined | |
1803 | for vector modes. | |
1804 | ||
4404ce28 | 1805 | @node Regs and Memory |
89045fd1 JL |
1806 | @section Registers and Memory |
1807 | @cindex RTL register expressions | |
1808 | @cindex RTL memory expressions | |
1809 | ||
1810 | Here are the RTL expression types for describing access to machine | |
1811 | registers and to main memory. | |
1812 | ||
1813 | @table @code | |
1814 | @findex reg | |
1815 | @cindex hard registers | |
1816 | @cindex pseudo registers | |
1817 | @item (reg:@var{m} @var{n}) | |
1818 | For small values of the integer @var{n} (those that are less than | |
1819 | @code{FIRST_PSEUDO_REGISTER}), this stands for a reference to machine | |
1820 | register number @var{n}: a @dfn{hard register}. For larger values of | |
1821 | @var{n}, it stands for a temporary value or @dfn{pseudo register}. | |
1822 | The compiler's strategy is to generate code assuming an unlimited | |
1823 | number of such pseudo registers, and later convert them into hard | |
1824 | registers or into memory references. | |
1825 | ||
1826 | @var{m} is the machine mode of the reference. It is necessary because | |
1827 | machines can generally refer to each register in more than one mode. | |
1828 | For example, a register may contain a full word but there may be | |
1829 | instructions to refer to it as a half word or as a single byte, as | |
1830 | well as instructions to refer to it as a floating point number of | |
1831 | various precisions. | |
1832 | ||
1833 | Even for a register that the machine can access in only one mode, | |
1834 | the mode must always be specified. | |
1835 | ||
1836 | The symbol @code{FIRST_PSEUDO_REGISTER} is defined by the machine | |
1837 | description, since the number of hard registers on the machine is an | |
1838 | invariant characteristic of the machine. Note, however, that not | |
1839 | all of the machine registers must be general registers. All the | |
1840 | machine registers that can be used for storage of data are given | |
1841 | hard register numbers, even those that can be used only in certain | |
1842 | instructions or can hold only certain types of data. | |
1843 | ||
1844 | A hard register may be accessed in various modes throughout one | |
1845 | function, but each pseudo register is given a natural mode | |
1846 | and is accessed only in that mode. When it is necessary to describe | |
1847 | an access to a pseudo register using a nonnatural mode, a @code{subreg} | |
1848 | expression is used. | |
1849 | ||
1850 | A @code{reg} expression with a machine mode that specifies more than | |
1851 | one word of data may actually stand for several consecutive registers. | |
1852 | If in addition the register number specifies a hardware register, then | |
1853 | it actually represents several consecutive hardware registers starting | |
1854 | with the specified one. | |
1855 | ||
1856 | Each pseudo register number used in a function's RTL code is | |
1857 | represented by a unique @code{reg} expression. | |
1858 | ||
1859 | @findex FIRST_VIRTUAL_REGISTER | |
1860 | @findex LAST_VIRTUAL_REGISTER | |
1861 | Some pseudo register numbers, those within the range of | |
1862 | @code{FIRST_VIRTUAL_REGISTER} to @code{LAST_VIRTUAL_REGISTER} only | |
1863 | appear during the RTL generation phase and are eliminated before the | |
1864 | optimization phases. These represent locations in the stack frame that | |
1865 | cannot be determined until RTL generation for the function has been | |
1866 | completed. The following virtual register numbers are defined: | |
1867 | ||
1868 | @table @code | |
1869 | @findex VIRTUAL_INCOMING_ARGS_REGNUM | |
1870 | @item VIRTUAL_INCOMING_ARGS_REGNUM | |
1871 | This points to the first word of the incoming arguments passed on the | |
1872 | stack. Normally these arguments are placed there by the caller, but the | |
1873 | callee may have pushed some arguments that were previously passed in | |
1874 | registers. | |
1875 | ||
1876 | @cindex @code{FIRST_PARM_OFFSET} and virtual registers | |
1877 | @cindex @code{ARG_POINTER_REGNUM} and virtual registers | |
1878 | When RTL generation is complete, this virtual register is replaced | |
1879 | by the sum of the register given by @code{ARG_POINTER_REGNUM} and the | |
1880 | value of @code{FIRST_PARM_OFFSET}. | |
1881 | ||
1882 | @findex VIRTUAL_STACK_VARS_REGNUM | |
1883 | @cindex @code{FRAME_GROWS_DOWNWARD} and virtual registers | |
1884 | @item VIRTUAL_STACK_VARS_REGNUM | |
a4d05547 | 1885 | If @code{FRAME_GROWS_DOWNWARD} is defined to a nonzero value, this points |
f62c8a5c JJ |
1886 | to immediately above the first variable on the stack. Otherwise, it points |
1887 | to the first variable on the stack. | |
89045fd1 | 1888 | |
2a31c321 | 1889 | @cindex @code{TARGET_STARTING_FRAME_OFFSET} and virtual registers |
89045fd1 JL |
1890 | @cindex @code{FRAME_POINTER_REGNUM} and virtual registers |
1891 | @code{VIRTUAL_STACK_VARS_REGNUM} is replaced with the sum of the | |
1892 | register given by @code{FRAME_POINTER_REGNUM} and the value | |
2a31c321 | 1893 | @code{TARGET_STARTING_FRAME_OFFSET}. |
89045fd1 JL |
1894 | |
1895 | @findex VIRTUAL_STACK_DYNAMIC_REGNUM | |
1896 | @item VIRTUAL_STACK_DYNAMIC_REGNUM | |
1897 | This points to the location of dynamically allocated memory on the stack | |
1898 | immediately after the stack pointer has been adjusted by the amount of | |
1899 | memory desired. | |
1900 | ||
1901 | @cindex @code{STACK_DYNAMIC_OFFSET} and virtual registers | |
1902 | @cindex @code{STACK_POINTER_REGNUM} and virtual registers | |
1903 | This virtual register is replaced by the sum of the register given by | |
1904 | @code{STACK_POINTER_REGNUM} and the value @code{STACK_DYNAMIC_OFFSET}. | |
1905 | ||
1906 | @findex VIRTUAL_OUTGOING_ARGS_REGNUM | |
1907 | @item VIRTUAL_OUTGOING_ARGS_REGNUM | |
1908 | This points to the location in the stack at which outgoing arguments | |
1909 | should be written when the stack is pre-pushed (arguments pushed using | |
1910 | push insns should always use @code{STACK_POINTER_REGNUM}). | |
1911 | ||
1912 | @cindex @code{STACK_POINTER_OFFSET} and virtual registers | |
1913 | This virtual register is replaced by the sum of the register given by | |
1914 | @code{STACK_POINTER_REGNUM} and the value @code{STACK_POINTER_OFFSET}. | |
1915 | @end table | |
1916 | ||
1917 | @findex subreg | |
84159bd8 KZ |
1918 | @item (subreg:@var{m1} @var{reg:m2} @var{bytenum}) |
1919 | ||
89045fd1 JL |
1920 | @code{subreg} expressions are used to refer to a register in a machine |
1921 | mode other than its natural one, or to refer to one register of | |
ddef6bc7 | 1922 | a multi-part @code{reg} that actually refers to several registers. |
89045fd1 | 1923 | |
84159bd8 | 1924 | Each pseudo register has a natural mode. If it is necessary to |
1ba4e523 | 1925 | operate on it in a different mode, the register must be |
ff2ce160 | 1926 | enclosed in a @code{subreg}. |
84159bd8 | 1927 | |
1ba4e523 KZ |
1928 | There are currently three supported types for the first operand of a |
1929 | @code{subreg}: | |
1930 | @itemize | |
1931 | @item pseudo registers | |
1932 | This is the most common case. Most @code{subreg}s have pseudo | |
1933 | @code{reg}s as their first operand. | |
1934 | ||
1935 | @item mem | |
1936 | @code{subreg}s of @code{mem} were common in earlier versions of GCC and | |
1937 | are still supported. During the reload pass these are replaced by plain | |
1938 | @code{mem}s. On machines that do not do instruction scheduling, use of | |
1939 | @code{subreg}s of @code{mem} are still used, but this is no longer | |
1940 | recommended. Such @code{subreg}s are considered to be | |
1941 | @code{register_operand}s rather than @code{memory_operand}s before and | |
1942 | during reload. Because of this, the scheduling passes cannot properly | |
1943 | schedule instructions with @code{subreg}s of @code{mem}, so for machines | |
1944 | that do scheduling, @code{subreg}s of @code{mem} should never be used. | |
1945 | To support this, the combine and recog passes have explicit code to | |
1946 | inhibit the creation of @code{subreg}s of @code{mem} when | |
1947 | @code{INSN_SCHEDULING} is defined. | |
1948 | ||
1949 | The use of @code{subreg}s of @code{mem} after the reload pass is an area | |
1950 | that is not well understood and should be avoided. There is still some | |
1951 | code in the compiler to support this, but this code has possibly rotted. | |
1952 | This use of @code{subreg}s is discouraged and will most likely not be | |
1953 | supported in the future. | |
1954 | ||
1955 | @item hard registers | |
84159bd8 KZ |
1956 | It is seldom necessary to wrap hard registers in @code{subreg}s; such |
1957 | registers would normally reduce to a single @code{reg} rtx. This use of | |
1ba4e523 KZ |
1958 | @code{subreg}s is discouraged and may not be supported in the future. |
1959 | ||
1960 | @end itemize | |
1961 | ||
1962 | @code{subreg}s of @code{subreg}s are not supported. Using | |
1963 | @code{simplify_gen_subreg} is the recommended way to avoid this problem. | |
84159bd8 KZ |
1964 | |
1965 | @code{subreg}s come in two distinct flavors, each having its own | |
1966 | usage and rules: | |
1967 | ||
1968 | @table @asis | |
1969 | @item Paradoxical subregs | |
1970 | When @var{m1} is strictly wider than @var{m2}, the @code{subreg} | |
1971 | expression is called @dfn{paradoxical}. The canonical test for this | |
1972 | class of @code{subreg} is: | |
1973 | ||
1974 | @smallexample | |
03a95621 | 1975 | paradoxical_subreg_p (@var{m1}, @var{m2}) |
84159bd8 KZ |
1976 | @end smallexample |
1977 | ||
1978 | Paradoxical @code{subreg}s can be used as both lvalues and rvalues. | |
1ba4e523 KZ |
1979 | When used as an lvalue, the low-order bits of the source value |
1980 | are stored in @var{reg} and the high-order bits are discarded. | |
84159bd8 | 1981 | When used as an rvalue, the low-order bits of the @code{subreg} are |
1ba4e523 | 1982 | taken from @var{reg} while the high-order bits may or may not be |
ff2ce160 | 1983 | defined. |
1ba4e523 | 1984 | |
8b287aea | 1985 | The high-order bits of rvalues are defined in the following circumstances: |
1ba4e523 KZ |
1986 | |
1987 | @itemize | |
1988 | @item @code{subreg}s of @code{mem} | |
1989 | When @var{m2} is smaller than a word, the macro @code{LOAD_EXTEND_OP}, | |
1990 | can control how the high-order bits are defined. | |
1991 | ||
1992 | @item @code{subreg} of @code{reg}s | |
1993 | The upper bits are defined when @code{SUBREG_PROMOTED_VAR_P} is true. | |
1994 | @code{SUBREG_PROMOTED_UNSIGNED_P} describes what the upper bits hold. | |
1995 | Such subregs usually represent local variables, register variables | |
1996 | and parameter pseudo variables that have been promoted to a wider mode. | |
1997 | ||
1998 | @end itemize | |
84159bd8 KZ |
1999 | |
2000 | @var{bytenum} is always zero for a paradoxical @code{subreg}, even on | |
2001 | big-endian targets. | |
2002 | ||
2003 | For example, the paradoxical @code{subreg}: | |
2004 | ||
2005 | @smallexample | |
2006 | (set (subreg:SI (reg:HI @var{x}) 0) @var{y}) | |
2007 | @end smallexample | |
2008 | ||
2009 | stores the lower 2 bytes of @var{y} in @var{x} and discards the upper | |
2010 | 2 bytes. A subsequent: | |
89045fd1 | 2011 | |
84159bd8 KZ |
2012 | @smallexample |
2013 | (set @var{z} (subreg:SI (reg:HI @var{x}) 0)) | |
2014 | @end smallexample | |
2015 | ||
1ba4e523 KZ |
2016 | would set the lower two bytes of @var{z} to @var{y} and set the upper |
2017 | two bytes to an unknown value assuming @code{SUBREG_PROMOTED_VAR_P} is | |
2018 | false. | |
84159bd8 | 2019 | |
ff2ce160 | 2020 | @item Normal subregs |
84159bd8 KZ |
2021 | When @var{m1} is at least as narrow as @var{m2} the @code{subreg} |
2022 | expression is called @dfn{normal}. | |
2023 | ||
1eae67f8 | 2024 | @findex REGMODE_NATURAL_SIZE |
1ba4e523 | 2025 | Normal @code{subreg}s restrict consideration to certain bits of |
1eae67f8 RS |
2026 | @var{reg}. For this purpose, @var{reg} is divided into |
2027 | individually-addressable blocks in which each block has: | |
2028 | ||
2029 | @smallexample | |
2030 | REGMODE_NATURAL_SIZE (@var{m2}) | |
2031 | @end smallexample | |
2032 | ||
2033 | bytes. Usually the value is @code{UNITS_PER_WORD}; that is, | |
2034 | most targets usually treat each word of a register as being | |
2035 | independently addressable. | |
2036 | ||
2037 | There are two types of normal @code{subreg}. If @var{m1} is known | |
2038 | to be no bigger than a block, the @code{subreg} refers to the | |
2039 | least-significant part (or @dfn{lowpart}) of one block of @var{reg}. | |
2040 | If @var{m1} is known to be larger than a block, the @code{subreg} refers | |
2041 | to two or more complete blocks. | |
2042 | ||
2043 | When used as an lvalue, @code{subreg} is a block-based accessor. | |
2044 | Storing to a @code{subreg} modifies all the blocks of @var{reg} that | |
2045 | overlap the @code{subreg}, but it leaves the other blocks of @var{reg} | |
84159bd8 KZ |
2046 | alone. |
2047 | ||
1eae67f8 RS |
2048 | When storing to a normal @code{subreg} that is smaller than a block, |
2049 | the other bits of the referenced block are usually left in an undefined | |
84159bd8 KZ |
2050 | state. This laxity makes it easier to generate efficient code for |
2051 | such instructions. To represent an instruction that preserves all the | |
2052 | bits outside of those in the @code{subreg}, use @code{strict_low_part} | |
2053 | or @code{zero_extract} around the @code{subreg}. | |
2054 | ||
2055 | @var{bytenum} must identify the offset of the first byte of the | |
2056 | @code{subreg} from the start of @var{reg}, assuming that @var{reg} is | |
2057 | laid out in memory order. The memory order of bytes is defined by | |
2058 | two target macros, @code{WORDS_BIG_ENDIAN} and @code{BYTES_BIG_ENDIAN}: | |
2059 | ||
2060 | @itemize | |
2061 | @item | |
89045fd1 | 2062 | @cindex @code{WORDS_BIG_ENDIAN}, effect on @code{subreg} |
84159bd8 KZ |
2063 | @code{WORDS_BIG_ENDIAN}, if set to 1, says that byte number zero is |
2064 | part of the most significant word; otherwise, it is part of the least | |
2065 | significant word. | |
ddef6bc7 | 2066 | |
84159bd8 | 2067 | @item |
ddef6bc7 | 2068 | @cindex @code{BYTES_BIG_ENDIAN}, effect on @code{subreg} |
84159bd8 KZ |
2069 | @code{BYTES_BIG_ENDIAN}, if set to 1, says that byte number zero is |
2070 | the most significant byte within a word; otherwise, it is the least | |
2071 | significant byte within a word. | |
2072 | @end itemize | |
89045fd1 | 2073 | |
a6765b81 JR |
2074 | @cindex @code{FLOAT_WORDS_BIG_ENDIAN}, (lack of) effect on @code{subreg} |
2075 | On a few targets, @code{FLOAT_WORDS_BIG_ENDIAN} disagrees with | |
84159bd8 KZ |
2076 | @code{WORDS_BIG_ENDIAN}. However, most parts of the compiler treat |
2077 | floating point values as if they had the same endianness as integer | |
2078 | values. This works because they handle them solely as a collection of | |
2079 | integer values, with no particular numerical value. Only real.c and | |
2080 | the runtime libraries care about @code{FLOAT_WORDS_BIG_ENDIAN}. | |
2081 | ||
ff2ce160 | 2082 | Thus, |
84159bd8 KZ |
2083 | |
2084 | @smallexample | |
2085 | (subreg:HI (reg:SI @var{x}) 2) | |
2086 | @end smallexample | |
2087 | ||
2088 | on a @code{BYTES_BIG_ENDIAN}, @samp{UNITS_PER_WORD == 4} target is the same as | |
2089 | ||
2090 | @smallexample | |
2091 | (subreg:HI (reg:SI @var{x}) 0) | |
2092 | @end smallexample | |
2093 | ||
2094 | on a little-endian, @samp{UNITS_PER_WORD == 4} target. Both | |
2095 | @code{subreg}s access the lower two bytes of register @var{x}. | |
2096 | ||
91914e56 RS |
2097 | Note that the byte offset is a polynomial integer; it may not be a |
2098 | compile-time constant on targets with variable-sized modes. However, | |
2099 | the restrictions above mean that there are only a certain set of | |
2100 | acceptable offsets for a given combination of @var{m1} and @var{m2}. | |
2101 | The compiler can always tell which blocks a valid subreg occupies, and | |
2102 | whether the subreg is a lowpart of a block. | |
2103 | ||
84159bd8 KZ |
2104 | @end table |
2105 | ||
2106 | A @code{MODE_PARTIAL_INT} mode behaves as if it were as wide as the | |
2107 | corresponding @code{MODE_INT} mode, except that it has an unknown | |
2108 | number of undefined bits. For example: | |
2109 | ||
2110 | @smallexample | |
2111 | (subreg:PSI (reg:SI 0) 0) | |
2112 | @end smallexample | |
2113 | ||
1eae67f8 | 2114 | @findex REGMODE_NATURAL_SIZE |
84159bd8 KZ |
2115 | accesses the whole of @samp{(reg:SI 0)}, but the exact relationship |
2116 | between the @code{PSImode} value and the @code{SImode} value is not | |
1eae67f8 RS |
2117 | defined. If we assume @samp{REGMODE_NATURAL_SIZE (DImode) <= 4}, |
2118 | then the following two @code{subreg}s: | |
84159bd8 KZ |
2119 | |
2120 | @smallexample | |
2121 | (subreg:PSI (reg:DI 0) 0) | |
2122 | (subreg:PSI (reg:DI 0) 4) | |
2123 | @end smallexample | |
2124 | ||
2125 | represent independent 4-byte accesses to the two halves of | |
2126 | @samp{(reg:DI 0)}. Both @code{subreg}s have an unknown number | |
2127 | of undefined bits. | |
2128 | ||
1eae67f8 | 2129 | If @samp{REGMODE_NATURAL_SIZE (PSImode) <= 2} then these two @code{subreg}s: |
84159bd8 KZ |
2130 | |
2131 | @smallexample | |
2132 | (subreg:HI (reg:PSI 0) 0) | |
2133 | (subreg:HI (reg:PSI 0) 2) | |
2134 | @end smallexample | |
2135 | ||
2136 | represent independent 2-byte accesses that together span the whole | |
2137 | of @samp{(reg:PSI 0)}. Storing to the first @code{subreg} does not | |
2138 | affect the value of the second, and vice versa. @samp{(reg:PSI 0)} | |
2139 | has an unknown number of undefined bits, so the assignment: | |
2140 | ||
2141 | @smallexample | |
2142 | (set (subreg:HI (reg:PSI 0) 0) (reg:HI 4)) | |
2143 | @end smallexample | |
2144 | ||
2145 | does not guarantee that @samp{(subreg:HI (reg:PSI 0) 0)} has the | |
2146 | value @samp{(reg:HI 4)}. | |
2147 | ||
0d803030 | 2148 | @cindex @code{TARGET_CAN_CHANGE_MODE_CLASS} and subreg semantics |
84159bd8 KZ |
2149 | The rules above apply to both pseudo @var{reg}s and hard @var{reg}s. |
2150 | If the semantics are not correct for particular combinations of | |
2151 | @var{m1}, @var{m2} and hard @var{reg}, the target-specific code | |
2152 | must ensure that those combinations are never used. For example: | |
2153 | ||
2154 | @smallexample | |
0d803030 | 2155 | TARGET_CAN_CHANGE_MODE_CLASS (@var{m2}, @var{m1}, @var{class}) |
84159bd8 KZ |
2156 | @end smallexample |
2157 | ||
0d803030 | 2158 | must be false for every class @var{class} that includes @var{reg}. |
89045fd1 | 2159 | |
e535b963 RS |
2160 | GCC must be able to determine at compile time whether a subreg is |
2161 | paradoxical, whether it occupies a whole number of blocks, or whether | |
2162 | it is a lowpart of a block. This means that certain combinations of | |
2163 | variable-sized mode are not permitted. For example, if @var{m2} | |
2164 | holds @var{n} @code{SI} values, where @var{n} is greater than zero, | |
2165 | it is not possible to form a @code{DI} @code{subreg} of it; such a | |
2166 | @code{subreg} would be paradoxical when @var{n} is 1 but not when | |
2167 | @var{n} is greater than 1. | |
2168 | ||
89045fd1 | 2169 | @findex SUBREG_REG |
ddef6bc7 | 2170 | @findex SUBREG_BYTE |
ebb48a4d | 2171 | The first operand of a @code{subreg} expression is customarily accessed |
89045fd1 | 2172 | with the @code{SUBREG_REG} macro and the second operand is customarily |
ddef6bc7 | 2173 | accessed with the @code{SUBREG_BYTE} macro. |
89045fd1 | 2174 | |
84159bd8 | 2175 | It has been several years since a platform in which |
1ba4e523 | 2176 | @code{BYTES_BIG_ENDIAN} not equal to @code{WORDS_BIG_ENDIAN} has |
84159bd8 KZ |
2177 | been tested. Anyone wishing to support such a platform in the future |
2178 | may be confronted with code rot. | |
2179 | ||
89045fd1 JL |
2180 | @findex scratch |
2181 | @cindex scratch operands | |
2182 | @item (scratch:@var{m}) | |
2183 | This represents a scratch register that will be required for the | |
2184 | execution of a single instruction and not used subsequently. It is | |
2185 | converted into a @code{reg} by either the local register allocator or | |
2186 | the reload pass. | |
2187 | ||
2188 | @code{scratch} is usually present inside a @code{clobber} operation | |
2189 | (@pxref{Side Effects}). | |
2190 | ||
2191 | @findex cc0 | |
2192 | @cindex condition code register | |
2193 | @item (cc0) | |
2194 | This refers to the machine's condition code register. It has no | |
2195 | operands and may not have a machine mode. There are two ways to use it: | |
2196 | ||
2197 | @itemize @bullet | |
2198 | @item | |
2199 | To stand for a complete set of condition code flags. This is best on | |
2200 | most machines, where each comparison sets the entire series of flags. | |
2201 | ||
2202 | With this technique, @code{(cc0)} may be validly used in only two | |
2203 | contexts: as the destination of an assignment (in test and compare | |
2204 | instructions) and in comparison operators comparing against zero | |
2205 | (@code{const_int} with value zero; that is to say, @code{const0_rtx}). | |
2206 | ||
2207 | @item | |
2208 | To stand for a single flag that is the result of a single condition. | |
2209 | This is useful on machines that have only a single flag bit, and in | |
2210 | which comparison instructions must specify the condition to test. | |
2211 | ||
2212 | With this technique, @code{(cc0)} may be validly used in only two | |
2213 | contexts: as the destination of an assignment (in test and compare | |
2214 | instructions) where the source is a comparison operator, and as the | |
2215 | first operand of @code{if_then_else} (in a conditional branch). | |
2216 | @end itemize | |
2217 | ||
2218 | @findex cc0_rtx | |
2219 | There is only one expression object of code @code{cc0}; it is the | |
2220 | value of the variable @code{cc0_rtx}. Any attempt to create an | |
2221 | expression of code @code{cc0} will return @code{cc0_rtx}. | |
2222 | ||
2223 | Instructions can set the condition code implicitly. On many machines, | |
2224 | nearly all instructions set the condition code based on the value that | |
2225 | they compute or store. It is not necessary to record these actions | |
2226 | explicitly in the RTL because the machine description includes a | |
2227 | prescription for recognizing the instructions that do so (by means of | |
2228 | the macro @code{NOTICE_UPDATE_CC}). @xref{Condition Code}. Only | |
2229 | instructions whose sole purpose is to set the condition code, and | |
2230 | instructions that use the condition code, need mention @code{(cc0)}. | |
2231 | ||
2232 | On some machines, the condition code register is given a register number | |
2233 | and a @code{reg} is used instead of @code{(cc0)}. This is usually the | |
2234 | preferable approach if only a small subset of instructions modify the | |
2235 | condition code. Other machines store condition codes in general | |
2236 | registers; in such cases a pseudo register should be used. | |
2237 | ||
981f6289 | 2238 | Some machines, such as the SPARC and RS/6000, have two sets of |
89045fd1 JL |
2239 | arithmetic instructions, one that sets and one that does not set the |
2240 | condition code. This is best handled by normally generating the | |
2241 | instruction that does not set the condition code, and making a pattern | |
2242 | that both performs the arithmetic and sets the condition code register | |
2243 | (which would not be @code{(cc0)} in this case). For examples, search | |
2244 | for @samp{addcc} and @samp{andcc} in @file{sparc.md}. | |
2245 | ||
2246 | @findex pc | |
2247 | @item (pc) | |
2248 | @cindex program counter | |
2249 | This represents the machine's program counter. It has no operands and | |
2250 | may not have a machine mode. @code{(pc)} may be validly used only in | |
2251 | certain specific contexts in jump instructions. | |
2252 | ||
2253 | @findex pc_rtx | |
2254 | There is only one expression object of code @code{pc}; it is the value | |
2255 | of the variable @code{pc_rtx}. Any attempt to create an expression of | |
2256 | code @code{pc} will return @code{pc_rtx}. | |
2257 | ||
2258 | All instructions that do not jump alter the program counter implicitly | |
161d7b59 | 2259 | by incrementing it, but there is no need to mention this in the RTL@. |
89045fd1 JL |
2260 | |
2261 | @findex mem | |
14592a41 | 2262 | @item (mem:@var{m} @var{addr} @var{alias}) |
89045fd1 JL |
2263 | This RTX represents a reference to main memory at an address |
2264 | represented by the expression @var{addr}. @var{m} specifies how large | |
767094dd JM |
2265 | a unit of memory is accessed. @var{alias} specifies an alias set for the |
2266 | reference. In general two items are in different alias sets if they cannot | |
14592a41 | 2267 | reference the same memory address. |
e9a25f70 | 2268 | |
5f9fb0e3 RH |
2269 | The construct @code{(mem:BLK (scratch))} is considered to alias all |
2270 | other memories. Thus it may be used as a memory barrier in epilogue | |
2271 | stack deallocation patterns. | |
2272 | ||
e53a16e7 ILT |
2273 | @findex concat |
2274 | @item (concat@var{m} @var{rtx} @var{rtx}) | |
2275 | This RTX represents the concatenation of two other RTXs. This is used | |
2276 | for complex values. It should only appear in the RTL attached to | |
2277 | declarations and during RTL generation. It should not appear in the | |
2278 | ordinary insn chain. | |
2279 | ||
2280 | @findex concatn | |
923158be | 2281 | @item (concatn@var{m} [@var{rtx} @dots{}]) |
e53a16e7 ILT |
2282 | This RTX represents the concatenation of all the @var{rtx} to make a |
2283 | single value. Like @code{concat}, this should only appear in | |
2284 | declarations, and not in the insn chain. | |
89045fd1 JL |
2285 | @end table |
2286 | ||
4404ce28 | 2287 | @node Arithmetic |
89045fd1 JL |
2288 | @section RTL Expressions for Arithmetic |
2289 | @cindex arithmetic, in RTL | |
2290 | @cindex math, in RTL | |
2291 | @cindex RTL expressions for arithmetic | |
2292 | ||
2293 | Unless otherwise specified, all the operands of arithmetic expressions | |
2294 | must be valid for mode @var{m}. An operand is valid for mode @var{m} | |
2295 | if it has mode @var{m}, or if it is a @code{const_int} or | |
2296 | @code{const_double} and @var{m} is a mode of class @code{MODE_INT}. | |
2297 | ||
2298 | For commutative binary operations, constants should be placed in the | |
2299 | second operand. | |
2300 | ||
2301 | @table @code | |
2302 | @findex plus | |
60ffd2fe ZW |
2303 | @findex ss_plus |
2304 | @findex us_plus | |
89045fd1 | 2305 | @cindex RTL sum |
60ffd2fe ZW |
2306 | @cindex RTL addition |
2307 | @cindex RTL addition with signed saturation | |
2308 | @cindex RTL addition with unsigned saturation | |
89045fd1 | 2309 | @item (plus:@var{m} @var{x} @var{y}) |
60ffd2fe ZW |
2310 | @itemx (ss_plus:@var{m} @var{x} @var{y}) |
2311 | @itemx (us_plus:@var{m} @var{x} @var{y}) | |
89045fd1 | 2312 | |
60ffd2fe ZW |
2313 | These three expressions all represent the sum of the values |
2314 | represented by @var{x} and @var{y} carried out in machine mode | |
2315 | @var{m}. They differ in their behavior on overflow of integer modes. | |
2316 | @code{plus} wraps round modulo the width of @var{m}; @code{ss_plus} | |
2317 | saturates at the maximum signed value representable in @var{m}; | |
2318 | @code{us_plus} saturates at the maximum unsigned value. | |
89045fd1 | 2319 | |
60ffd2fe | 2320 | @c ??? What happens on overflow of floating point modes? |
89045fd1 | 2321 | |
60ffd2fe ZW |
2322 | @findex lo_sum |
2323 | @item (lo_sum:@var{m} @var{x} @var{y}) | |
f9f27ee5 | 2324 | |
60ffd2fe ZW |
2325 | This expression represents the sum of @var{x} and the low-order bits |
2326 | of @var{y}. It is used with @code{high} (@pxref{Constants}) to | |
2327 | represent the typical two-instruction sequence used in RISC machines | |
f0eb93a8 | 2328 | to reference a global memory location. |
f9f27ee5 | 2329 | |
60ffd2fe ZW |
2330 | The number of low order bits is machine-dependent but is |
2331 | normally the number of bits in a @code{Pmode} item minus the number of | |
2332 | bits set by @code{high}. | |
f9f27ee5 | 2333 | |
60ffd2fe | 2334 | @var{m} should be @code{Pmode}. |
f9f27ee5 | 2335 | |
60ffd2fe | 2336 | @findex minus |
f9f27ee5 | 2337 | @findex ss_minus |
f9f27ee5 | 2338 | @findex us_minus |
60ffd2fe ZW |
2339 | @cindex RTL difference |
2340 | @cindex RTL subtraction | |
2341 | @cindex RTL subtraction with signed saturation | |
2342 | @cindex RTL subtraction with unsigned saturation | |
2343 | @item (minus:@var{m} @var{x} @var{y}) | |
2344 | @itemx (ss_minus:@var{m} @var{x} @var{y}) | |
2345 | @itemx (us_minus:@var{m} @var{x} @var{y}) | |
f9f27ee5 | 2346 | |
60ffd2fe ZW |
2347 | These three expressions represent the result of subtracting @var{y} |
2348 | from @var{x}, carried out in mode @var{M}. Behavior on overflow is | |
2349 | the same as for the three variants of @code{plus} (see above). | |
f9f27ee5 | 2350 | |
89045fd1 JL |
2351 | @findex compare |
2352 | @cindex RTL comparison | |
2353 | @item (compare:@var{m} @var{x} @var{y}) | |
2354 | Represents the result of subtracting @var{y} from @var{x} for purposes | |
2355 | of comparison. The result is computed without overflow, as if with | |
2356 | infinite precision. | |
2357 | ||
fd250f0d | 2358 | Of course, machines cannot really subtract with infinite precision. |
e26b8996 RK |
2359 | However, they can pretend to do so when only the sign of the result will |
2360 | be used, which is the case when the result is stored in the condition | |
2361 | code. And that is the @emph{only} way this kind of expression may | |
2362 | validly be used: as a value to be stored in the condition codes, either | |
767094dd | 2363 | @code{(cc0)} or a register. @xref{Comparisons}. |
e26b8996 RK |
2364 | |
2365 | The mode @var{m} is not related to the modes of @var{x} and @var{y}, but | |
2366 | instead is the mode of the condition code value. If @code{(cc0)} is | |
2367 | used, it is @code{VOIDmode}. Otherwise it is some mode in class | |
2368 | @code{MODE_CC}, often @code{CCmode}. @xref{Condition Code}. If @var{m} | |
2369 | is @code{VOIDmode} or @code{CCmode}, the operation returns sufficient | |
2370 | information (in an unspecified format) so that any comparison operator | |
2371 | can be applied to the result of the @code{COMPARE} operation. For other | |
2372 | modes in class @code{MODE_CC}, the operation only returns a subset of | |
2373 | this information. | |
89045fd1 JL |
2374 | |
2375 | Normally, @var{x} and @var{y} must have the same mode. Otherwise, | |
2376 | @code{compare} is valid only if the mode of @var{x} is in class | |
2377 | @code{MODE_INT} and @var{y} is a @code{const_int} or | |
2378 | @code{const_double} with mode @code{VOIDmode}. The mode of @var{x} | |
2379 | determines what mode the comparison is to be done in; thus it must not | |
2380 | be @code{VOIDmode}. | |
2381 | ||
2382 | If one of the operands is a constant, it should be placed in the | |
ebb48a4d | 2383 | second operand and the comparison code adjusted as appropriate. |
89045fd1 JL |
2384 | |
2385 | A @code{compare} specifying two @code{VOIDmode} constants is not valid | |
2386 | since there is no way to know in what mode the comparison is to be | |
2387 | performed; the comparison must either be folded during the compilation | |
2388 | or the first operand must be loaded into a register while its mode is | |
2389 | still known. | |
2390 | ||
2391 | @findex neg | |
e551ad26 | 2392 | @findex ss_neg |
091a3ac7 | 2393 | @findex us_neg |
e551ad26 BS |
2394 | @cindex negation |
2395 | @cindex negation with signed saturation | |
091a3ac7 | 2396 | @cindex negation with unsigned saturation |
89045fd1 | 2397 | @item (neg:@var{m} @var{x}) |
e551ad26 | 2398 | @itemx (ss_neg:@var{m} @var{x}) |
091a3ac7 | 2399 | @itemx (us_neg:@var{m} @var{x}) |
e551ad26 BS |
2400 | These two expressions represent the negation (subtraction from zero) of |
2401 | the value represented by @var{x}, carried out in mode @var{m}. They | |
6fc0bb99 | 2402 | differ in the behavior on overflow of integer modes. In the case of |
e551ad26 BS |
2403 | @code{neg}, the negation of the operand may be a number not representable |
2404 | in mode @var{m}, in which case it is truncated to @var{m}. @code{ss_neg} | |
091a3ac7 CF |
2405 | and @code{us_neg} ensure that an out-of-bounds result saturates to the |
2406 | maximum or minimum signed or unsigned value. | |
89045fd1 JL |
2407 | |
2408 | @findex mult | |
091a3ac7 CF |
2409 | @findex ss_mult |
2410 | @findex us_mult | |
89045fd1 JL |
2411 | @cindex multiplication |
2412 | @cindex product | |
091a3ac7 CF |
2413 | @cindex multiplication with signed saturation |
2414 | @cindex multiplication with unsigned saturation | |
89045fd1 | 2415 | @item (mult:@var{m} @var{x} @var{y}) |
091a3ac7 CF |
2416 | @itemx (ss_mult:@var{m} @var{x} @var{y}) |
2417 | @itemx (us_mult:@var{m} @var{x} @var{y}) | |
89045fd1 JL |
2418 | Represents the signed product of the values represented by @var{x} and |
2419 | @var{y} carried out in machine mode @var{m}. | |
091a3ac7 CF |
2420 | @code{ss_mult} and @code{us_mult} ensure that an out-of-bounds result |
2421 | saturates to the maximum or minimum signed or unsigned value. | |
89045fd1 JL |
2422 | |
2423 | Some machines support a multiplication that generates a product wider | |
2424 | than the operands. Write the pattern for this as | |
2425 | ||
3ab51846 | 2426 | @smallexample |
89045fd1 | 2427 | (mult:@var{m} (sign_extend:@var{m} @var{x}) (sign_extend:@var{m} @var{y})) |
3ab51846 | 2428 | @end smallexample |
89045fd1 JL |
2429 | |
2430 | where @var{m} is wider than the modes of @var{x} and @var{y}, which need | |
2431 | not be the same. | |
2432 | ||
9c34dbbf ZW |
2433 | For unsigned widening multiplication, use the same idiom, but with |
2434 | @code{zero_extend} instead of @code{sign_extend}. | |
89045fd1 | 2435 | |
1b1562a5 MM |
2436 | @findex fma |
2437 | @item (fma:@var{m} @var{x} @var{y} @var{z}) | |
2438 | Represents the @code{fma}, @code{fmaf}, and @code{fmal} builtin | |
0cf5e9df RS |
2439 | functions, which compute @samp{@var{x} * @var{y} + @var{z}} |
2440 | without doing an intermediate rounding step. | |
1b1562a5 | 2441 | |
89045fd1 | 2442 | @findex div |
091a3ac7 | 2443 | @findex ss_div |
89045fd1 JL |
2444 | @cindex division |
2445 | @cindex signed division | |
091a3ac7 | 2446 | @cindex signed division with signed saturation |
89045fd1 JL |
2447 | @cindex quotient |
2448 | @item (div:@var{m} @var{x} @var{y}) | |
091a3ac7 | 2449 | @itemx (ss_div:@var{m} @var{x} @var{y}) |
89045fd1 JL |
2450 | Represents the quotient in signed division of @var{x} by @var{y}, |
2451 | carried out in machine mode @var{m}. If @var{m} is a floating point | |
2452 | mode, it represents the exact quotient; otherwise, the integerized | |
2453 | quotient. | |
091a3ac7 CF |
2454 | @code{ss_div} ensures that an out-of-bounds result saturates to the maximum |
2455 | or minimum signed value. | |
89045fd1 JL |
2456 | |
2457 | Some machines have division instructions in which the operands and | |
ebb48a4d | 2458 | quotient widths are not all the same; you should represent |
89045fd1 JL |
2459 | such instructions using @code{truncate} and @code{sign_extend} as in, |
2460 | ||
3ab51846 | 2461 | @smallexample |
89045fd1 | 2462 | (truncate:@var{m1} (div:@var{m2} @var{x} (sign_extend:@var{m2} @var{y}))) |
3ab51846 | 2463 | @end smallexample |
89045fd1 JL |
2464 | |
2465 | @findex udiv | |
2466 | @cindex unsigned division | |
091a3ac7 | 2467 | @cindex unsigned division with unsigned saturation |
89045fd1 JL |
2468 | @cindex division |
2469 | @item (udiv:@var{m} @var{x} @var{y}) | |
091a3ac7 | 2470 | @itemx (us_div:@var{m} @var{x} @var{y}) |
89045fd1 | 2471 | Like @code{div} but represents unsigned division. |
091a3ac7 CF |
2472 | @code{us_div} ensures that an out-of-bounds result saturates to the maximum |
2473 | or minimum unsigned value. | |
89045fd1 JL |
2474 | |
2475 | @findex mod | |
2476 | @findex umod | |
2477 | @cindex remainder | |
2478 | @cindex division | |
2479 | @item (mod:@var{m} @var{x} @var{y}) | |
2480 | @itemx (umod:@var{m} @var{x} @var{y}) | |
2481 | Like @code{div} and @code{udiv} but represent the remainder instead of | |
2482 | the quotient. | |
2483 | ||
2484 | @findex smin | |
2485 | @findex smax | |
2486 | @cindex signed minimum | |
2487 | @cindex signed maximum | |
2488 | @item (smin:@var{m} @var{x} @var{y}) | |
2489 | @itemx (smax:@var{m} @var{x} @var{y}) | |
2490 | Represents the smaller (for @code{smin}) or larger (for @code{smax}) of | |
7ae4d8d4 RH |
2491 | @var{x} and @var{y}, interpreted as signed values in mode @var{m}. |
2492 | When used with floating point, if both operands are zeros, or if either | |
2493 | operand is @code{NaN}, then it is unspecified which of the two operands | |
2494 | is returned as the result. | |
89045fd1 JL |
2495 | |
2496 | @findex umin | |
2497 | @findex umax | |
2498 | @cindex unsigned minimum and maximum | |
2499 | @item (umin:@var{m} @var{x} @var{y}) | |
2500 | @itemx (umax:@var{m} @var{x} @var{y}) | |
2501 | Like @code{smin} and @code{smax}, but the values are interpreted as unsigned | |
2502 | integers. | |
2503 | ||
2504 | @findex not | |
2505 | @cindex complement, bitwise | |
2506 | @cindex bitwise complement | |
2507 | @item (not:@var{m} @var{x}) | |
2508 | Represents the bitwise complement of the value represented by @var{x}, | |
2509 | carried out in mode @var{m}, which must be a fixed-point machine mode. | |
2510 | ||
2511 | @findex and | |
2512 | @cindex logical-and, bitwise | |
2513 | @cindex bitwise logical-and | |
2514 | @item (and:@var{m} @var{x} @var{y}) | |
2515 | Represents the bitwise logical-and of the values represented by | |
2516 | @var{x} and @var{y}, carried out in machine mode @var{m}, which must be | |
2517 | a fixed-point machine mode. | |
2518 | ||
2519 | @findex ior | |
2520 | @cindex inclusive-or, bitwise | |
2521 | @cindex bitwise inclusive-or | |
2522 | @item (ior:@var{m} @var{x} @var{y}) | |
2523 | Represents the bitwise inclusive-or of the values represented by @var{x} | |
2524 | and @var{y}, carried out in machine mode @var{m}, which must be a | |
2525 | fixed-point mode. | |
2526 | ||
2527 | @findex xor | |
2528 | @cindex exclusive-or, bitwise | |
2529 | @cindex bitwise exclusive-or | |
2530 | @item (xor:@var{m} @var{x} @var{y}) | |
2531 | Represents the bitwise exclusive-or of the values represented by @var{x} | |
2532 | and @var{y}, carried out in machine mode @var{m}, which must be a | |
2533 | fixed-point mode. | |
2534 | ||
2535 | @findex ashift | |
e551ad26 | 2536 | @findex ss_ashift |
091a3ac7 | 2537 | @findex us_ashift |
89045fd1 JL |
2538 | @cindex left shift |
2539 | @cindex shift | |
2540 | @cindex arithmetic shift | |
e551ad26 | 2541 | @cindex arithmetic shift with signed saturation |
091a3ac7 | 2542 | @cindex arithmetic shift with unsigned saturation |
89045fd1 | 2543 | @item (ashift:@var{m} @var{x} @var{c}) |
e551ad26 | 2544 | @itemx (ss_ashift:@var{m} @var{x} @var{c}) |
091a3ac7 CF |
2545 | @itemx (us_ashift:@var{m} @var{x} @var{c}) |
2546 | These three expressions represent the result of arithmetically shifting @var{x} | |
e551ad26 | 2547 | left by @var{c} places. They differ in their behavior on overflow of integer |
6fc0bb99 | 2548 | modes. An @code{ashift} operation is a plain shift with no special behavior |
091a3ac7 CF |
2549 | in case of a change in the sign bit; @code{ss_ashift} and @code{us_ashift} |
2550 | saturates to the minimum or maximum representable value if any of the bits | |
2551 | shifted out differs from the final sign bit. | |
e551ad26 BS |
2552 | |
2553 | @var{x} have mode @var{m}, a fixed-point machine mode. @var{c} | |
89045fd1 JL |
2554 | be a fixed-point mode or be a constant with mode @code{VOIDmode}; which |
2555 | mode is determined by the mode called for in the machine description | |
8aeea6e6 | 2556 | entry for the left-shift instruction. For example, on the VAX, the mode |
89045fd1 JL |
2557 | of @var{c} is @code{QImode} regardless of @var{m}. |
2558 | ||
2559 | @findex lshiftrt | |
2560 | @cindex right shift | |
2561 | @findex ashiftrt | |
2562 | @item (lshiftrt:@var{m} @var{x} @var{c}) | |
2563 | @itemx (ashiftrt:@var{m} @var{x} @var{c}) | |
2564 | Like @code{ashift} but for right shift. Unlike the case for left shift, | |
2565 | these two operations are distinct. | |
2566 | ||
2567 | @findex rotate | |
ebb48a4d | 2568 | @cindex rotate |
89045fd1 JL |
2569 | @cindex left rotate |
2570 | @findex rotatert | |
2571 | @cindex right rotate | |
2572 | @item (rotate:@var{m} @var{x} @var{c}) | |
2573 | @itemx (rotatert:@var{m} @var{x} @var{c}) | |
2574 | Similar but represent left and right rotate. If @var{c} is a constant, | |
2575 | use @code{rotate}. | |
2576 | ||
2577 | @findex abs | |
91c29f68 | 2578 | @findex ss_abs |
89045fd1 JL |
2579 | @cindex absolute value |
2580 | @item (abs:@var{m} @var{x}) | |
91c29f68 | 2581 | @item (ss_abs:@var{m} @var{x}) |
89045fd1 | 2582 | Represents the absolute value of @var{x}, computed in mode @var{m}. |
91c29f68 JZ |
2583 | @code{ss_abs} ensures that an out-of-bounds result saturates to the |
2584 | maximum signed value. | |
2585 | ||
89045fd1 JL |
2586 | |
2587 | @findex sqrt | |
2588 | @cindex square root | |
2589 | @item (sqrt:@var{m} @var{x}) | |
2590 | Represents the square root of @var{x}, computed in mode @var{m}. | |
2591 | Most often @var{m} will be a floating point mode. | |
2592 | ||
2593 | @findex ffs | |
2594 | @item (ffs:@var{m} @var{x}) | |
2595 | Represents one plus the index of the least significant 1-bit in | |
2596 | @var{x}, represented as an integer of mode @var{m}. (The value is | |
e2f00837 JJ |
2597 | zero if @var{x} is zero.) The mode of @var{x} must be @var{m} |
2598 | or @code{VOIDmode}. | |
2928cd7a | 2599 | |
3801c801 BS |
2600 | @findex clrsb |
2601 | @item (clrsb:@var{m} @var{x}) | |
2602 | Represents the number of redundant leading sign bits in @var{x}, | |
2603 | represented as an integer of mode @var{m}, starting at the most | |
2604 | significant bit position. This is one less than the number of leading | |
2605 | sign bits (either 0 or 1), with no special cases. The mode of @var{x} | |
e2f00837 | 2606 | must be @var{m} or @code{VOIDmode}. |
3801c801 | 2607 | |
2928cd7a RH |
2608 | @findex clz |
2609 | @item (clz:@var{m} @var{x}) | |
2610 | Represents the number of leading 0-bits in @var{x}, represented as an | |
2611 | integer of mode @var{m}, starting at the most significant bit position. | |
7dba8395 | 2612 | If @var{x} is zero, the value is determined by |
2a6627c2 | 2613 | @code{CLZ_DEFINED_VALUE_AT_ZERO} (@pxref{Misc}). Note that this is one of |
2928cd7a | 2614 | the few expressions that is not invariant under widening. The mode of |
e2f00837 | 2615 | @var{x} must be @var{m} or @code{VOIDmode}. |
2928cd7a RH |
2616 | |
2617 | @findex ctz | |
2618 | @item (ctz:@var{m} @var{x}) | |
2619 | Represents the number of trailing 0-bits in @var{x}, represented as an | |
2620 | integer of mode @var{m}, starting at the least significant bit position. | |
7dba8395 | 2621 | If @var{x} is zero, the value is determined by |
2a6627c2 | 2622 | @code{CTZ_DEFINED_VALUE_AT_ZERO} (@pxref{Misc}). Except for this case, |
2928cd7a | 2623 | @code{ctz(x)} is equivalent to @code{ffs(@var{x}) - 1}. The mode of |
e2f00837 | 2624 | @var{x} must be @var{m} or @code{VOIDmode}. |
2928cd7a RH |
2625 | |
2626 | @findex popcount | |
2627 | @item (popcount:@var{m} @var{x}) | |
2628 | Represents the number of 1-bits in @var{x}, represented as an integer of | |
e2f00837 | 2629 | mode @var{m}. The mode of @var{x} must be @var{m} or @code{VOIDmode}. |
2928cd7a RH |
2630 | |
2631 | @findex parity | |
2632 | @item (parity:@var{m} @var{x}) | |
2633 | Represents the number of 1-bits modulo 2 in @var{x}, represented as an | |
e2f00837 JJ |
2634 | integer of mode @var{m}. The mode of @var{x} must be @var{m} or |
2635 | @code{VOIDmode}. | |
167fa32c EC |
2636 | |
2637 | @findex bswap | |
2638 | @item (bswap:@var{m} @var{x}) | |
2639 | Represents the value @var{x} with the order of bytes reversed, carried out | |
2640 | in mode @var{m}, which must be a fixed-point machine mode. | |
e2f00837 | 2641 | The mode of @var{x} must be @var{m} or @code{VOIDmode}. |
89045fd1 JL |
2642 | @end table |
2643 | ||
4404ce28 | 2644 | @node Comparisons |
89045fd1 JL |
2645 | @section Comparison Operations |
2646 | @cindex RTL comparison operations | |
2647 | ||
2648 | Comparison operators test a relation on two operands and are considered | |
2649 | to represent a machine-dependent nonzero value described by, but not | |
2650 | necessarily equal to, @code{STORE_FLAG_VALUE} (@pxref{Misc}) | |
60ba917e | 2651 | if the relation holds, or zero if it does not, for comparison operators |
fc7ca5fd | 2652 | whose results have a `MODE_INT' mode, |
60ba917e EB |
2653 | @code{FLOAT_STORE_FLAG_VALUE} (@pxref{Misc}) if the relation holds, or |
2654 | zero if it does not, for comparison operators that return floating-point | |
fc7ca5fd RS |
2655 | values, and a vector of either @code{VECTOR_STORE_FLAG_VALUE} (@pxref{Misc}) |
2656 | if the relation holds, or of zeros if it does not, for comparison operators | |
2657 | that return vector results. | |
2658 | The mode of the comparison operation is independent of the mode | |
60ba917e EB |
2659 | of the data being compared. If the comparison operation is being tested |
2660 | (e.g., the first operand of an @code{if_then_else}), the mode must be | |
2661 | @code{VOIDmode}. | |
89045fd1 JL |
2662 | |
2663 | @cindex condition codes | |
2664 | There are two ways that comparison operations may be used. The | |
2665 | comparison operators may be used to compare the condition codes | |
2666 | @code{(cc0)} against zero, as in @code{(eq (cc0) (const_int 0))}. Such | |
2667 | a construct actually refers to the result of the preceding instruction | |
3924a578 | 2668 | in which the condition codes were set. The instruction setting the |
89045fd1 JL |
2669 | condition code must be adjacent to the instruction using the condition |
2670 | code; only @code{note} insns may separate them. | |
2671 | ||
2672 | Alternatively, a comparison operation may directly compare two data | |
2673 | objects. The mode of the comparison is determined by the operands; they | |
2674 | must both be valid for a common machine mode. A comparison with both | |
2675 | operands constant would be invalid as the machine mode could not be | |
2676 | deduced from it, but such a comparison should never exist in RTL due to | |
2677 | constant folding. | |
2678 | ||
2679 | In the example above, if @code{(cc0)} were last set to | |
2680 | @code{(compare @var{x} @var{y})}, the comparison operation is | |
2681 | identical to @code{(eq @var{x} @var{y})}. Usually only one style | |
2682 | of comparisons is supported on a particular machine, but the combine | |
2683 | pass will try to merge the operations to produce the @code{eq} shown | |
2684 | in case it exists in the context of the particular insn involved. | |
2685 | ||
2686 | Inequality comparisons come in two flavors, signed and unsigned. Thus, | |
2687 | there are distinct expression codes @code{gt} and @code{gtu} for signed and | |
2688 | unsigned greater-than. These can produce different results for the same | |
630d3d5a JM |
2689 | pair of integer values: for example, 1 is signed greater-than @minus{}1 but not |
2690 | unsigned greater-than, because @minus{}1 when regarded as unsigned is actually | |
89045fd1 JL |
2691 | @code{0xffffffff} which is greater than 1. |
2692 | ||
2693 | The signed comparisons are also used for floating point values. Floating | |
2694 | point comparisons are distinguished by the machine modes of the operands. | |
2695 | ||
2696 | @table @code | |
2697 | @findex eq | |
2698 | @cindex equal | |
2699 | @item (eq:@var{m} @var{x} @var{y}) | |
44e4159d R |
2700 | @code{STORE_FLAG_VALUE} if the values represented by @var{x} and @var{y} |
2701 | are equal, otherwise 0. | |
89045fd1 JL |
2702 | |
2703 | @findex ne | |
2704 | @cindex not equal | |
2705 | @item (ne:@var{m} @var{x} @var{y}) | |
44e4159d R |
2706 | @code{STORE_FLAG_VALUE} if the values represented by @var{x} and @var{y} |
2707 | are not equal, otherwise 0. | |
89045fd1 JL |
2708 | |
2709 | @findex gt | |
2710 | @cindex greater than | |
2711 | @item (gt:@var{m} @var{x} @var{y}) | |
44e4159d R |
2712 | @code{STORE_FLAG_VALUE} if the @var{x} is greater than @var{y}. If they |
2713 | are fixed-point, the comparison is done in a signed sense. | |
89045fd1 JL |
2714 | |
2715 | @findex gtu | |
2716 | @cindex greater than | |
2717 | @cindex unsigned greater than | |
2718 | @item (gtu:@var{m} @var{x} @var{y}) | |
2719 | Like @code{gt} but does unsigned comparison, on fixed-point numbers only. | |
2720 | ||
2721 | @findex lt | |
2722 | @cindex less than | |
2723 | @findex ltu | |
2724 | @cindex unsigned less than | |
2725 | @item (lt:@var{m} @var{x} @var{y}) | |
2726 | @itemx (ltu:@var{m} @var{x} @var{y}) | |
2727 | Like @code{gt} and @code{gtu} but test for ``less than''. | |
2728 | ||
2729 | @findex ge | |
2730 | @cindex greater than | |
2731 | @findex geu | |
2732 | @cindex unsigned greater than | |
2733 | @item (ge:@var{m} @var{x} @var{y}) | |
2734 | @itemx (geu:@var{m} @var{x} @var{y}) | |
2735 | Like @code{gt} and @code{gtu} but test for ``greater than or equal''. | |
2736 | ||
2737 | @findex le | |
2738 | @cindex less than or equal | |
2739 | @findex leu | |
2740 | @cindex unsigned less than | |
2741 | @item (le:@var{m} @var{x} @var{y}) | |
2742 | @itemx (leu:@var{m} @var{x} @var{y}) | |
2743 | Like @code{gt} and @code{gtu} but test for ``less than or equal''. | |
2744 | ||
2745 | @findex if_then_else | |
2746 | @item (if_then_else @var{cond} @var{then} @var{else}) | |
2747 | This is not a comparison operation but is listed here because it is | |
2748 | always used in conjunction with a comparison operation. To be | |
2749 | precise, @var{cond} is a comparison expression. This expression | |
2750 | represents a choice, according to @var{cond}, between the value | |
2751 | represented by @var{then} and the one represented by @var{else}. | |
2752 | ||
2753 | On most machines, @code{if_then_else} expressions are valid only | |
2754 | to express conditional jumps. | |
2755 | ||
2756 | @findex cond | |
2757 | @item (cond [@var{test1} @var{value1} @var{test2} @var{value2} @dots{}] @var{default}) | |
2758 | Similar to @code{if_then_else}, but more general. Each of @var{test1}, | |
2759 | @var{test2}, @dots{} is performed in turn. The result of this expression is | |
df2a54e9 JM |
2760 | the @var{value} corresponding to the first nonzero test, or @var{default} if |
2761 | none of the tests are nonzero expressions. | |
89045fd1 JL |
2762 | |
2763 | This is currently not valid for instruction patterns and is supported only | |
2764 | for insn attributes. @xref{Insn Attributes}. | |
2765 | @end table | |
2766 | ||
c771326b JM |
2767 | @node Bit-Fields |
2768 | @section Bit-Fields | |
2769 | @cindex bit-fields | |
89045fd1 | 2770 | |
c771326b | 2771 | Special expression codes exist to represent bit-field instructions. |
89045fd1 JL |
2772 | |
2773 | @table @code | |
2774 | @findex sign_extract | |
2775 | @cindex @code{BITS_BIG_ENDIAN}, effect on @code{sign_extract} | |
2776 | @item (sign_extract:@var{m} @var{loc} @var{size} @var{pos}) | |
c771326b JM |
2777 | This represents a reference to a sign-extended bit-field contained or |
2778 | starting in @var{loc} (a memory or register reference). The bit-field | |
89045fd1 JL |
2779 | is @var{size} bits wide and starts at bit @var{pos}. The compilation |
2780 | option @code{BITS_BIG_ENDIAN} says which end of the memory unit | |
2781 | @var{pos} counts from. | |
2782 | ||
2783 | If @var{loc} is in memory, its mode must be a single-byte integer mode. | |
2784 | If @var{loc} is in a register, the mode to use is specified by the | |
2785 | operand of the @code{insv} or @code{extv} pattern | |
2786 | (@pxref{Standard Names}) and is usually a full-word integer mode, | |
2787 | which is the default if none is specified. | |
2788 | ||
2789 | The mode of @var{pos} is machine-specific and is also specified | |
2790 | in the @code{insv} or @code{extv} pattern. | |
2791 | ||
2792 | The mode @var{m} is the same as the mode that would be used for | |
2793 | @var{loc} if it were a register. | |
2794 | ||
46d096a3 SB |
2795 | A @code{sign_extract} can not appear as an lvalue, or part thereof, |
2796 | in RTL. | |
2797 | ||
89045fd1 JL |
2798 | @findex zero_extract |
2799 | @item (zero_extract:@var{m} @var{loc} @var{size} @var{pos}) | |
2800 | Like @code{sign_extract} but refers to an unsigned or zero-extended | |
c771326b | 2801 | bit-field. The same sequence of bits are extracted, but they |
89045fd1 | 2802 | are filled to an entire word with zeros instead of by sign-extension. |
46d096a3 SB |
2803 | |
2804 | Unlike @code{sign_extract}, this type of expressions can be lvalues | |
2805 | in RTL; they may appear on the left side of an assignment, indicating | |
2806 | insertion of a value into the specified bit-field. | |
89045fd1 JL |
2807 | @end table |
2808 | ||
f9f27ee5 BS |
2809 | @node Vector Operations |
2810 | @section Vector Operations | |
2811 | @cindex vector operations | |
2812 | ||
aee96fe9 | 2813 | All normal RTL expressions can be used with vector modes; they are |
f9f27ee5 BS |
2814 | interpreted as operating on each part of the vector independently. |
2815 | Additionally, there are a few new expressions to describe specific vector | |
2816 | operations. | |
2817 | ||
2818 | @table @code | |
2819 | @findex vec_merge | |
2820 | @item (vec_merge:@var{m} @var{vec1} @var{vec2} @var{items}) | |
2821 | This describes a merge operation between two vectors. The result is a vector | |
2822 | of mode @var{m}; its elements are selected from either @var{vec1} or | |
2823 | @var{vec2}. Which elements are selected is described by @var{items}, which | |
2824 | is a bit mask represented by a @code{const_int}; a zero bit indicates the | |
2825 | corresponding element in the result vector is taken from @var{vec2} while | |
2826 | a set bit indicates it is taken from @var{vec1}. | |
2827 | ||
2828 | @findex vec_select | |
2829 | @item (vec_select:@var{m} @var{vec1} @var{selection}) | |
2830 | This describes an operation that selects parts of a vector. @var{vec1} is | |
a0274eae | 2831 | the source vector, and @var{selection} is a @code{parallel} that contains a |
f9f27ee5 | 2832 | @code{const_int} for each of the subparts of the result vector, giving the |
ff2ce160 | 2833 | number of the source subpart that should be stored into it. |
a0274eae | 2834 | The result mode @var{m} is either the submode for a single element of |
ff2ce160 | 2835 | @var{vec1} (if only one subpart is selected), or another vector mode |
a0274eae | 2836 | with that element submode (if multiple subparts are selected). |
f9f27ee5 BS |
2837 | |
2838 | @findex vec_concat | |
38fe784d | 2839 | @item (vec_concat:@var{m} @var{x1} @var{x2}) |
f9f27ee5 | 2840 | Describes a vector concat operation. The result is a concatenation of the |
38fe784d HPN |
2841 | vectors or scalars @var{x1} and @var{x2}; its length is the sum of the |
2842 | lengths of the two inputs. | |
f9f27ee5 | 2843 | |
f9f27ee5 | 2844 | @findex vec_duplicate |
38fe784d HPN |
2845 | @item (vec_duplicate:@var{m} @var{x}) |
2846 | This operation converts a scalar into a vector or a small vector into a | |
2847 | larger one by duplicating the input values. The output vector mode must have | |
2848 | the same submodes as the input vector mode or the scalar modes, and the | |
2849 | number of output parts must be an integer multiple of the number of input | |
2850 | parts. | |
f9f27ee5 | 2851 | |
ef339d6e RS |
2852 | @findex vec_series |
2853 | @item (vec_series:@var{m} @var{base} @var{step}) | |
2854 | This operation creates a vector in which element @var{i} is equal to | |
2855 | @samp{@var{base} + @var{i}*@var{step}}. @var{m} must be a vector integer mode. | |
f9f27ee5 BS |
2856 | @end table |
2857 | ||
4404ce28 | 2858 | @node Conversions |
89045fd1 JL |
2859 | @section Conversions |
2860 | @cindex conversions | |
2861 | @cindex machine mode conversions | |
2862 | ||
2863 | All conversions between machine modes must be represented by | |
2864 | explicit conversion operations. For example, an expression | |
2865 | which is the sum of a byte and a full word cannot be written as | |
2866 | @code{(plus:SI (reg:QI 34) (reg:SI 80))} because the @code{plus} | |
2867 | operation requires two operands of the same machine mode. | |
2868 | Therefore, the byte-sized operand is enclosed in a conversion | |
2869 | operation, as in | |
2870 | ||
3ab51846 | 2871 | @smallexample |
89045fd1 | 2872 | (plus:SI (sign_extend:SI (reg:QI 34)) (reg:SI 80)) |
3ab51846 | 2873 | @end smallexample |
89045fd1 JL |
2874 | |
2875 | The conversion operation is not a mere placeholder, because there | |
2876 | may be more than one way of converting from a given starting mode | |
2877 | to the desired final mode. The conversion operation code says how | |
2878 | to do it. | |
2879 | ||
2880 | For all conversion operations, @var{x} must not be @code{VOIDmode} | |
2881 | because the mode in which to do the conversion would not be known. | |
2882 | The conversion must either be done at compile-time or @var{x} | |
2883 | must be placed into a register. | |
2884 | ||
2885 | @table @code | |
2886 | @findex sign_extend | |
2887 | @item (sign_extend:@var{m} @var{x}) | |
2888 | Represents the result of sign-extending the value @var{x} | |
2889 | to machine mode @var{m}. @var{m} must be a fixed-point mode | |
2890 | and @var{x} a fixed-point value of a mode narrower than @var{m}. | |
2891 | ||
2892 | @findex zero_extend | |
2893 | @item (zero_extend:@var{m} @var{x}) | |
2894 | Represents the result of zero-extending the value @var{x} | |
2895 | to machine mode @var{m}. @var{m} must be a fixed-point mode | |
2896 | and @var{x} a fixed-point value of a mode narrower than @var{m}. | |
2897 | ||
2898 | @findex float_extend | |
2899 | @item (float_extend:@var{m} @var{x}) | |
2900 | Represents the result of extending the value @var{x} | |
2901 | to machine mode @var{m}. @var{m} must be a floating point mode | |
2902 | and @var{x} a floating point value of a mode narrower than @var{m}. | |
2903 | ||
2904 | @findex truncate | |
2905 | @item (truncate:@var{m} @var{x}) | |
2906 | Represents the result of truncating the value @var{x} | |
2907 | to machine mode @var{m}. @var{m} must be a fixed-point mode | |
2908 | and @var{x} a fixed-point value of a mode wider than @var{m}. | |
2909 | ||
f9f27ee5 BS |
2910 | @findex ss_truncate |
2911 | @item (ss_truncate:@var{m} @var{x}) | |
2912 | Represents the result of truncating the value @var{x} | |
2913 | to machine mode @var{m}, using signed saturation in the case of | |
2914 | overflow. Both @var{m} and the mode of @var{x} must be fixed-point | |
2915 | modes. | |
2916 | ||
2917 | @findex us_truncate | |
2918 | @item (us_truncate:@var{m} @var{x}) | |
2919 | Represents the result of truncating the value @var{x} | |
2920 | to machine mode @var{m}, using unsigned saturation in the case of | |
2921 | overflow. Both @var{m} and the mode of @var{x} must be fixed-point | |
2922 | modes. | |
2923 | ||
89045fd1 JL |
2924 | @findex float_truncate |
2925 | @item (float_truncate:@var{m} @var{x}) | |
2926 | Represents the result of truncating the value @var{x} | |
2927 | to machine mode @var{m}. @var{m} must be a floating point mode | |
2928 | and @var{x} a floating point value of a mode wider than @var{m}. | |
2929 | ||
2930 | @findex float | |
2931 | @item (float:@var{m} @var{x}) | |
2932 | Represents the result of converting fixed point value @var{x}, | |
2933 | regarded as signed, to floating point mode @var{m}. | |
2934 | ||
2935 | @findex unsigned_float | |
2936 | @item (unsigned_float:@var{m} @var{x}) | |
2937 | Represents the result of converting fixed point value @var{x}, | |
2938 | regarded as unsigned, to floating point mode @var{m}. | |
2939 | ||
2940 | @findex fix | |
2941 | @item (fix:@var{m} @var{x}) | |
bf520698 RS |
2942 | When @var{m} is a floating-point mode, represents the result of |
2943 | converting floating point value @var{x} (valid for mode @var{m}) to an | |
2944 | integer, still represented in floating point mode @var{m}, by rounding | |
2945 | towards zero. | |
2946 | ||
2947 | When @var{m} is a fixed-point mode, represents the result of | |
89045fd1 JL |
2948 | converting floating point value @var{x} to mode @var{m}, regarded as |
2949 | signed. How rounding is done is not specified, so this operation may | |
2950 | be used validly in compiling C code only for integer-valued operands. | |
2951 | ||
2952 | @findex unsigned_fix | |
2953 | @item (unsigned_fix:@var{m} @var{x}) | |
2954 | Represents the result of converting floating point value @var{x} to | |
2955 | fixed point mode @var{m}, regarded as unsigned. How rounding is done | |
2956 | is not specified. | |
2957 | ||
091a3ac7 CF |
2958 | @findex fract_convert |
2959 | @item (fract_convert:@var{m} @var{x}) | |
2960 | Represents the result of converting fixed-point value @var{x} to | |
2961 | fixed-point mode @var{m}, signed integer value @var{x} to | |
2962 | fixed-point mode @var{m}, floating-point value @var{x} to | |
2963 | fixed-point mode @var{m}, fixed-point value @var{x} to integer mode @var{m} | |
2964 | regarded as signed, or fixed-point value @var{x} to floating-point mode @var{m}. | |
2965 | When overflows or underflows happen, the results are undefined. | |
2966 | ||
2967 | @findex sat_fract | |
2968 | @item (sat_fract:@var{m} @var{x}) | |
2969 | Represents the result of converting fixed-point value @var{x} to | |
2970 | fixed-point mode @var{m}, signed integer value @var{x} to | |
2971 | fixed-point mode @var{m}, or floating-point value @var{x} to | |
2972 | fixed-point mode @var{m}. | |
2973 | When overflows or underflows happen, the results are saturated to the | |
2974 | maximum or the minimum. | |
2975 | ||
2976 | @findex unsigned_fract_convert | |
2977 | @item (unsigned_fract_convert:@var{m} @var{x}) | |
2978 | Represents the result of converting fixed-point value @var{x} to | |
2979 | integer mode @var{m} regarded as unsigned, or unsigned integer value @var{x} to | |
2980 | fixed-point mode @var{m}. | |
2981 | When overflows or underflows happen, the results are undefined. | |
2982 | ||
2983 | @findex unsigned_sat_fract | |
2984 | @item (unsigned_sat_fract:@var{m} @var{x}) | |
2985 | Represents the result of converting unsigned integer value @var{x} to | |
2986 | fixed-point mode @var{m}. | |
2987 | When overflows or underflows happen, the results are saturated to the | |
2988 | maximum or the minimum. | |
89045fd1 JL |
2989 | @end table |
2990 | ||
4404ce28 | 2991 | @node RTL Declarations |
89045fd1 JL |
2992 | @section Declarations |
2993 | @cindex RTL declarations | |
2994 | @cindex declarations, RTL | |
2995 | ||
2996 | Declaration expression codes do not represent arithmetic operations | |
2997 | but rather state assertions about their operands. | |
2998 | ||
2999 | @table @code | |
3000 | @findex strict_low_part | |
3001 | @cindex @code{subreg}, in @code{strict_low_part} | |
3002 | @item (strict_low_part (subreg:@var{m} (reg:@var{n} @var{r}) 0)) | |
3003 | This expression code is used in only one context: as the destination operand of a | |
3004 | @code{set} expression. In addition, the operand of this expression | |
3005 | must be a non-paradoxical @code{subreg} expression. | |
3006 | ||
3007 | The presence of @code{strict_low_part} says that the part of the | |
3008 | register which is meaningful in mode @var{n}, but is not part of | |
3009 | mode @var{m}, is not to be altered. Normally, an assignment to such | |
3010 | a subreg is allowed to have undefined effects on the rest of the | |
1eae67f8 | 3011 | register when @var{m} is smaller than @samp{REGMODE_NATURAL_SIZE (@var{n})}. |
89045fd1 JL |
3012 | @end table |
3013 | ||
4404ce28 | 3014 | @node Side Effects |
89045fd1 JL |
3015 | @section Side Effect Expressions |
3016 | @cindex RTL side effect expressions | |
3017 | ||
3018 | The expression codes described so far represent values, not actions. | |
3019 | But machine instructions never produce values; they are meaningful | |
3020 | only for their side effects on the state of the machine. Special | |
3021 | expression codes are used to represent side effects. | |
3022 | ||
3023 | The body of an instruction is always one of these side effect codes; | |
3024 | the codes described above, which represent values, appear only as | |
3025 | the operands of these. | |
3026 | ||
3027 | @table @code | |
3028 | @findex set | |
3029 | @item (set @var{lval} @var{x}) | |
3030 | Represents the action of storing the value of @var{x} into the place | |
3031 | represented by @var{lval}. @var{lval} must be an expression | |
70498da3 RS |
3032 | representing a place that can be stored in: @code{reg} (or @code{subreg}, |
3033 | @code{strict_low_part} or @code{zero_extract}), @code{mem}, @code{pc}, | |
3034 | @code{parallel}, or @code{cc0}. | |
89045fd1 JL |
3035 | |
3036 | If @var{lval} is a @code{reg}, @code{subreg} or @code{mem}, it has a | |
bd819a4a | 3037 | machine mode; then @var{x} must be valid for that mode. |
89045fd1 JL |
3038 | |
3039 | If @var{lval} is a @code{reg} whose machine mode is less than the full | |
3040 | width of the register, then it means that the part of the register | |
3041 | specified by the machine mode is given the specified value and the | |
3042 | rest of the register receives an undefined value. Likewise, if | |
3043 | @var{lval} is a @code{subreg} whose machine mode is narrower than | |
3044 | the mode of the register, the rest of the register can be changed in | |
3045 | an undefined way. | |
3046 | ||
46d096a3 SB |
3047 | If @var{lval} is a @code{strict_low_part} of a subreg, then the part |
3048 | of the register specified by the machine mode of the @code{subreg} is | |
3049 | given the value @var{x} and the rest of the register is not changed. | |
3050 | ||
3051 | If @var{lval} is a @code{zero_extract}, then the referenced part of | |
3052 | the bit-field (a memory or register reference) specified by the | |
3053 | @code{zero_extract} is given the value @var{x} and the rest of the | |
3054 | bit-field is not changed. Note that @code{sign_extract} can not | |
3055 | appear in @var{lval}. | |
89045fd1 JL |
3056 | |
3057 | If @var{lval} is @code{(cc0)}, it has no machine mode, and @var{x} may | |
3058 | be either a @code{compare} expression or a value that may have any mode. | |
3059 | The latter case represents a ``test'' instruction. The expression | |
3060 | @code{(set (cc0) (reg:@var{m} @var{n}))} is equivalent to | |
3061 | @code{(set (cc0) (compare (reg:@var{m} @var{n}) (const_int 0)))}. | |
3062 | Use the former expression to save space during the compilation. | |
3063 | ||
7193d1dc RK |
3064 | If @var{lval} is a @code{parallel}, it is used to represent the case of |
3065 | a function returning a structure in multiple registers. Each element | |
c771326b | 3066 | of the @code{parallel} is an @code{expr_list} whose first operand is a |
7193d1dc RK |
3067 | @code{reg} and whose second operand is a @code{const_int} representing the |
3068 | offset (in bytes) into the structure at which the data in that register | |
3069 | corresponds. The first element may be null to indicate that the structure | |
3070 | is also passed partly in memory. | |
3071 | ||
89045fd1 JL |
3072 | @cindex jump instructions and @code{set} |
3073 | @cindex @code{if_then_else} usage | |
3074 | If @var{lval} is @code{(pc)}, we have a jump instruction, and the | |
3075 | possibilities for @var{x} are very limited. It may be a | |
3076 | @code{label_ref} expression (unconditional jump). It may be an | |
3077 | @code{if_then_else} (conditional jump), in which case either the | |
3078 | second or the third operand must be @code{(pc)} (for the case which | |
3079 | does not jump) and the other of the two must be a @code{label_ref} | |
3080 | (for the case which does jump). @var{x} may also be a @code{mem} or | |
3081 | @code{(plus:SI (pc) @var{y})}, where @var{y} may be a @code{reg} or a | |
3082 | @code{mem}; these unusual patterns are used to represent jumps through | |
bd819a4a | 3083 | branch tables. |
89045fd1 JL |
3084 | |
3085 | If @var{lval} is neither @code{(cc0)} nor @code{(pc)}, the mode of | |
3086 | @var{lval} must not be @code{VOIDmode} and the mode of @var{x} must be | |
3087 | valid for the mode of @var{lval}. | |
3088 | ||
3089 | @findex SET_DEST | |
3090 | @findex SET_SRC | |
ebb48a4d | 3091 | @var{lval} is customarily accessed with the @code{SET_DEST} macro and |
89045fd1 JL |
3092 | @var{x} with the @code{SET_SRC} macro. |
3093 | ||
3094 | @findex return | |
3095 | @item (return) | |
3096 | As the sole expression in a pattern, represents a return from the | |
3097 | current function, on machines where this can be done with one | |
8aeea6e6 | 3098 | instruction, such as VAXen. On machines where a multi-instruction |
89045fd1 JL |
3099 | ``epilogue'' must be executed in order to return from the function, |
3100 | returning is done by jumping to a label which precedes the epilogue, and | |
3101 | the @code{return} expression code is never used. | |
3102 | ||
3103 | Inside an @code{if_then_else} expression, represents the value to be | |
3104 | placed in @code{pc} to return to the caller. | |
3105 | ||
3106 | Note that an insn pattern of @code{(return)} is logically equivalent to | |
3107 | @code{(set (pc) (return))}, but the latter form is never used. | |
3108 | ||
26898771 BS |
3109 | @findex simple_return |
3110 | @item (simple_return) | |
3111 | Like @code{(return)}, but truly represents only a function return, while | |
3112 | @code{(return)} may represent an insn that also performs other functions | |
3113 | of the function epilogue. Like @code{(return)}, this may also occur in | |
3114 | conditional jumps. | |
3115 | ||
89045fd1 JL |
3116 | @findex call |
3117 | @item (call @var{function} @var{nargs}) | |
3118 | Represents a function call. @var{function} is a @code{mem} expression | |
3119 | whose address is the address of the function to be called. | |
3120 | @var{nargs} is an expression which can be used for two purposes: on | |
3121 | some machines it represents the number of bytes of stack argument; on | |
3122 | others, it represents the number of argument registers. | |
3123 | ||
3124 | Each machine has a standard machine mode which @var{function} must | |
3125 | have. The machine description defines macro @code{FUNCTION_MODE} to | |
3126 | expand into the requisite mode name. The purpose of this mode is to | |
3127 | specify what kind of addressing is allowed, on machines where the | |
3128 | allowed kinds of addressing depend on the machine mode being | |
3129 | addressed. | |
3130 | ||
3131 | @findex clobber | |
3132 | @item (clobber @var{x}) | |
3133 | Represents the storing or possible storing of an unpredictable, | |
3134 | undescribed value into @var{x}, which must be a @code{reg}, | |
7193d1dc | 3135 | @code{scratch}, @code{parallel} or @code{mem} expression. |
89045fd1 JL |
3136 | |
3137 | One place this is used is in string instructions that store standard | |
3138 | values into particular hard registers. It may not be worth the | |
3139 | trouble to describe the values that are stored, but it is essential to | |
3140 | inform the compiler that the registers will be altered, lest it | |
3141 | attempt to keep data in them across the string instruction. | |
3142 | ||
daf2f129 | 3143 | If @var{x} is @code{(mem:BLK (const_int 0))} or |
260f91c2 | 3144 | @code{(mem:BLK (scratch))}, it means that all memory |
7193d1dc RK |
3145 | locations must be presumed clobbered. If @var{x} is a @code{parallel}, |
3146 | it has the same meaning as a @code{parallel} in a @code{set} expression. | |
89045fd1 JL |
3147 | |
3148 | Note that the machine description classifies certain hard registers as | |
3149 | ``call-clobbered''. All function call instructions are assumed by | |
3150 | default to clobber these registers, so there is no need to use | |
3151 | @code{clobber} expressions to indicate this fact. Also, each function | |
3152 | call is assumed to have the potential to alter any memory location, | |
3153 | unless the function is declared @code{const}. | |
3154 | ||
3155 | If the last group of expressions in a @code{parallel} are each a | |
3156 | @code{clobber} expression whose arguments are @code{reg} or | |
3157 | @code{match_scratch} (@pxref{RTL Template}) expressions, the combiner | |
3158 | phase can add the appropriate @code{clobber} expressions to an insn it | |
3159 | has constructed when doing so will cause a pattern to be matched. | |
3160 | ||
3161 | This feature can be used, for example, on a machine that whose multiply | |
3162 | and add instructions don't use an MQ register but which has an | |
3163 | add-accumulate instruction that does clobber the MQ register. Similarly, | |
3164 | a combined instruction might require a temporary register while the | |
3165 | constituent instructions might not. | |
3166 | ||
3167 | When a @code{clobber} expression for a register appears inside a | |
3168 | @code{parallel} with other side effects, the register allocator | |
3169 | guarantees that the register is unoccupied both before and after that | |
22c02455 VM |
3170 | insn if it is a hard register clobber. For pseudo-register clobber, |
3171 | the register allocator and the reload pass do not assign the same hard | |
3172 | register to the clobber and the input operands if there is an insn | |
3173 | alternative containing the @samp{&} constraint (@pxref{Modifiers}) for | |
3174 | the clobber and the hard register is in register classes of the | |
3175 | clobber in the alternative. You can clobber either a specific hard | |
f98c983a VM |
3176 | register, a pseudo register, or a @code{scratch} expression; in the |
3177 | latter two cases, GCC will allocate a hard register that is available | |
3178 | there for use as a temporary. | |
89045fd1 JL |
3179 | |
3180 | For instructions that require a temporary register, you should use | |
3181 | @code{scratch} instead of a pseudo-register because this will allow the | |
3182 | combiner phase to add the @code{clobber} when required. You do this by | |
3183 | coding (@code{clobber} (@code{match_scratch} @dots{})). If you do | |
3184 | clobber a pseudo register, use one which appears nowhere else---generate | |
161d7b59 | 3185 | a new one each time. Otherwise, you may confuse CSE@. |
89045fd1 JL |
3186 | |
3187 | There is one other known use for clobbering a pseudo register in a | |
3188 | @code{parallel}: when one of the input operands of the insn is also | |
3189 | clobbered by the insn. In this case, using the same pseudo register in | |
3190 | the clobber and elsewhere in the insn produces the expected results. | |
3191 | ||
3192 | @findex use | |
3193 | @item (use @var{x}) | |
3194 | Represents the use of the value of @var{x}. It indicates that the | |
3195 | value in @var{x} at this point in the program is needed, even though | |
3196 | it may not be apparent why this is so. Therefore, the compiler will | |
3197 | not attempt to delete previous instructions whose only effect is to | |
3198 | store a value in @var{x}. @var{x} must be a @code{reg} expression. | |
3199 | ||
9af354b7 BS |
3200 | In some situations, it may be tempting to add a @code{use} of a |
3201 | register in a @code{parallel} to describe a situation where the value | |
c21cd8b1 | 3202 | of a special register will modify the behavior of the instruction. |
e4ae5e77 | 3203 | A hypothetical example might be a pattern for an addition that can |
9af354b7 BS |
3204 | either wrap around or use saturating addition depending on the value |
3205 | of a special control register: | |
3206 | ||
478c9e72 | 3207 | @smallexample |
f282ffb3 | 3208 | (parallel [(set (reg:SI 2) (unspec:SI [(reg:SI 3) |
9c34dbbf | 3209 | (reg:SI 4)] 0)) |
9af354b7 | 3210 | (use (reg:SI 1))]) |
478c9e72 | 3211 | @end smallexample |
9af354b7 BS |
3212 | |
3213 | @noindent | |
3214 | ||
3215 | This will not work, several of the optimizers only look at expressions | |
3216 | locally; it is very likely that if you have multiple insns with | |
3217 | identical inputs to the @code{unspec}, they will be optimized away even | |
3218 | if register 1 changes in between. | |
3219 | ||
3220 | This means that @code{use} can @emph{only} be used to describe | |
3221 | that the register is live. You should think twice before adding | |
3222 | @code{use} statements, more often you will want to use @code{unspec} | |
3223 | instead. The @code{use} RTX is most commonly useful to describe that | |
3224 | a fixed register is implicitly used in an insn. It is also safe to use | |
3225 | in patterns where the compiler knows for other reasons that the result | |
70128ad9 | 3226 | of the whole pattern is variable, such as @samp{movmem@var{m}} or |
9af354b7 BS |
3227 | @samp{call} patterns. |
3228 | ||
b60a8416 R |
3229 | During the reload phase, an insn that has a @code{use} as pattern |
3230 | can carry a reg_equal note. These @code{use} insns will be deleted | |
3231 | before the reload phase exits. | |
3232 | ||
89045fd1 JL |
3233 | During the delayed branch scheduling phase, @var{x} may be an insn. |
3234 | This indicates that @var{x} previously was located at this place in the | |
3235 | code and its data dependencies need to be taken into account. These | |
3236 | @code{use} insns will be deleted before the delayed branch scheduling | |
3237 | phase exits. | |
3238 | ||
3239 | @findex parallel | |
3240 | @item (parallel [@var{x0} @var{x1} @dots{}]) | |
3241 | Represents several side effects performed in parallel. The square | |
3242 | brackets stand for a vector; the operand of @code{parallel} is a | |
3243 | vector of expressions. @var{x0}, @var{x1} and so on are individual | |
3244 | side effect expressions---expressions of code @code{set}, @code{call}, | |
26898771 | 3245 | @code{return}, @code{simple_return}, @code{clobber} or @code{use}. |
89045fd1 JL |
3246 | |
3247 | ``In parallel'' means that first all the values used in the individual | |
3248 | side-effects are computed, and second all the actual side-effects are | |
3249 | performed. For example, | |
3250 | ||
3ab51846 | 3251 | @smallexample |
89045fd1 JL |
3252 | (parallel [(set (reg:SI 1) (mem:SI (reg:SI 1))) |
3253 | (set (mem:SI (reg:SI 1)) (reg:SI 1))]) | |
3ab51846 | 3254 | @end smallexample |
89045fd1 JL |
3255 | |
3256 | @noindent | |
3257 | says unambiguously that the values of hard register 1 and the memory | |
3258 | location addressed by it are interchanged. In both places where | |
3259 | @code{(reg:SI 1)} appears as a memory address it refers to the value | |
3260 | in register 1 @emph{before} the execution of the insn. | |
3261 | ||
3262 | It follows that it is @emph{incorrect} to use @code{parallel} and | |
3263 | expect the result of one @code{set} to be available for the next one. | |
3264 | For example, people sometimes attempt to represent a jump-if-zero | |
3265 | instruction this way: | |
3266 | ||
3ab51846 | 3267 | @smallexample |
89045fd1 JL |
3268 | (parallel [(set (cc0) (reg:SI 34)) |
3269 | (set (pc) (if_then_else | |
3270 | (eq (cc0) (const_int 0)) | |
3271 | (label_ref @dots{}) | |
3272 | (pc)))]) | |
3ab51846 | 3273 | @end smallexample |
89045fd1 JL |
3274 | |
3275 | @noindent | |
3276 | But this is incorrect, because it says that the jump condition depends | |
3277 | on the condition code value @emph{before} this instruction, not on the | |
3278 | new value that is set by this instruction. | |
3279 | ||
3280 | @cindex peephole optimization, RTL representation | |
3281 | Peephole optimization, which takes place together with final assembly | |
3282 | code output, can produce insns whose patterns consist of a @code{parallel} | |
3283 | whose elements are the operands needed to output the resulting | |
3284 | assembler code---often @code{reg}, @code{mem} or constant expressions. | |
3285 | This would not be well-formed RTL at any other stage in compilation, | |
5bd40ade | 3286 | but it is OK then because no further optimization remains to be done. |
89045fd1 JL |
3287 | However, the definition of the macro @code{NOTICE_UPDATE_CC}, if |
3288 | any, must deal with such insns if you define any peephole optimizations. | |
3289 | ||
e68e3108 MM |
3290 | @findex cond_exec |
3291 | @item (cond_exec [@var{cond} @var{expr}]) | |
3292 | Represents a conditionally executed expression. The @var{expr} is | |
df2a54e9 | 3293 | executed only if the @var{cond} is nonzero. The @var{cond} expression |
e68e3108 MM |
3294 | must not have side-effects, but the @var{expr} may very well have |
3295 | side-effects. | |
3296 | ||
89045fd1 JL |
3297 | @findex sequence |
3298 | @item (sequence [@var{insns} @dots{}]) | |
9fb6b620 SB |
3299 | Represents a sequence of insns. If a @code{sequence} appears in the |
3300 | chain of insns, then each of the @var{insns} that appears in the sequence | |
3301 | must be suitable for appearing in the chain of insns, i.e. must satisfy | |
3302 | the @code{INSN_P} predicate. | |
89045fd1 JL |
3303 | |
3304 | After delay-slot scheduling is completed, an insn and all the insns that | |
3305 | reside in its delay slots are grouped together into a @code{sequence}. | |
3306 | The insn requiring the delay slot is the first insn in the vector; | |
3307 | subsequent insns are to be placed in the delay slot. | |
3308 | ||
3309 | @code{INSN_ANNULLED_BRANCH_P} is set on an insn in a delay slot to | |
3310 | indicate that a branch insn should be used that will conditionally annul | |
3311 | the effect of the insns in the delay slots. In such a case, | |
3312 | @code{INSN_FROM_TARGET_P} indicates that the insn is from the target of | |
3313 | the branch and should be executed only if the branch is taken; otherwise | |
3314 | the insn should be executed only if the branch is not taken. | |
3315 | @xref{Delay Slots}. | |
9fb6b620 SB |
3316 | |
3317 | Some back ends also use @code{sequence} objects for purposes other than | |
3318 | delay-slot groups. This is not supported in the common parts of the | |
3319 | compiler, which treat such sequences as delay-slot groups. | |
3320 | ||
3321 | DWARF2 Call Frame Address (CFA) adjustments are sometimes also expressed | |
3322 | using @code{sequence} objects as the value of a @code{RTX_FRAME_RELATED_P} | |
3323 | note. This only happens if the CFA adjustments cannot be easily derived | |
3324 | from the pattern of the instruction to which the note is attached. In | |
3325 | such cases, the value of the note is used instead of best-guesing the | |
3326 | semantics of the instruction. The back end can attach notes containing | |
3327 | a @code{sequence} of @code{set} patterns that express the effect of the | |
3328 | parent instruction. | |
89045fd1 JL |
3329 | @end table |
3330 | ||
3331 | These expression codes appear in place of a side effect, as the body of | |
3332 | an insn, though strictly speaking they do not always describe side | |
3333 | effects as such: | |
3334 | ||
3335 | @table @code | |
3336 | @findex asm_input | |
3337 | @item (asm_input @var{s}) | |
3338 | Represents literal assembler code as described by the string @var{s}. | |
3339 | ||
3340 | @findex unspec | |
3341 | @findex unspec_volatile | |
3342 | @item (unspec [@var{operands} @dots{}] @var{index}) | |
3343 | @itemx (unspec_volatile [@var{operands} @dots{}] @var{index}) | |
3344 | Represents a machine-specific operation on @var{operands}. @var{index} | |
3345 | selects between multiple machine-specific operations. | |
3346 | @code{unspec_volatile} is used for volatile operations and operations | |
3347 | that may trap; @code{unspec} is used for other operations. | |
3348 | ||
3349 | These codes may appear inside a @code{pattern} of an | |
3350 | insn, inside a @code{parallel}, or inside an expression. | |
3351 | ||
3352 | @findex addr_vec | |
3353 | @item (addr_vec:@var{m} [@var{lr0} @var{lr1} @dots{}]) | |
3354 | Represents a table of jump addresses. The vector elements @var{lr0}, | |
3355 | etc., are @code{label_ref} expressions. The mode @var{m} specifies | |
3356 | how much space is given to each address; normally @var{m} would be | |
3357 | @code{Pmode}. | |
3358 | ||
3359 | @findex addr_diff_vec | |
33f7f353 | 3360 | @item (addr_diff_vec:@var{m} @var{base} [@var{lr0} @var{lr1} @dots{}] @var{min} @var{max} @var{flags}) |
89045fd1 JL |
3361 | Represents a table of jump addresses expressed as offsets from |
3362 | @var{base}. The vector elements @var{lr0}, etc., are @code{label_ref} | |
3363 | expressions and so is @var{base}. The mode @var{m} specifies how much | |
33f7f353 JR |
3364 | space is given to each address-difference. @var{min} and @var{max} |
3365 | are set up by branch shortening and hold a label with a minimum and a | |
3366 | maximum address, respectively. @var{flags} indicates the relative | |
3b7a2e58 | 3367 | position of @var{base}, @var{min} and @var{max} to the containing insn |
bd819a4a | 3368 | and of @var{min} and @var{max} to @var{base}. See rtl.def for details. |
21b8482a JJ |
3369 | |
3370 | @findex prefetch | |
3371 | @item (prefetch:@var{m} @var{addr} @var{rw} @var{locality}) | |
3372 | Represents prefetch of memory at address @var{addr}. | |
3373 | Operand @var{rw} is 1 if the prefetch is for data to be written, 0 otherwise; | |
3374 | targets that do not support write prefetches should treat this as a normal | |
3375 | prefetch. | |
3376 | Operand @var{locality} specifies the amount of temporal locality; 0 if there | |
3377 | is none or 1, 2, or 3 for increasing levels of temporal locality; | |
3378 | targets that do not support locality hints should ignore this. | |
3379 | ||
3380 | This insn is used to minimize cache-miss latency by moving data into a | |
3381 | cache before it is accessed. It should use only non-faulting data prefetch | |
3382 | instructions. | |
89045fd1 JL |
3383 | @end table |
3384 | ||
4404ce28 | 3385 | @node Incdec |
89045fd1 JL |
3386 | @section Embedded Side-Effects on Addresses |
3387 | @cindex RTL preincrement | |
3388 | @cindex RTL postincrement | |
3389 | @cindex RTL predecrement | |
3390 | @cindex RTL postdecrement | |
3391 | ||
b18cfc28 | 3392 | Six special side-effect expression codes appear as memory addresses. |
89045fd1 JL |
3393 | |
3394 | @table @code | |
3395 | @findex pre_dec | |
3396 | @item (pre_dec:@var{m} @var{x}) | |
3397 | Represents the side effect of decrementing @var{x} by a standard | |
3398 | amount and represents also the value that @var{x} has after being | |
3399 | decremented. @var{x} must be a @code{reg} or @code{mem}, but most | |
3400 | machines allow only a @code{reg}. @var{m} must be the machine mode | |
3401 | for pointers on the machine in use. The amount @var{x} is decremented | |
3402 | by is the length in bytes of the machine mode of the containing memory | |
3403 | reference of which this expression serves as the address. Here is an | |
bd819a4a | 3404 | example of its use: |
89045fd1 | 3405 | |
3ab51846 | 3406 | @smallexample |
89045fd1 | 3407 | (mem:DF (pre_dec:SI (reg:SI 39))) |
3ab51846 | 3408 | @end smallexample |
89045fd1 JL |
3409 | |
3410 | @noindent | |
3411 | This says to decrement pseudo register 39 by the length of a @code{DFmode} | |
3412 | value and use the result to address a @code{DFmode} value. | |
3413 | ||
3414 | @findex pre_inc | |
3415 | @item (pre_inc:@var{m} @var{x}) | |
3416 | Similar, but specifies incrementing @var{x} instead of decrementing it. | |
3417 | ||
3418 | @findex post_dec | |
3419 | @item (post_dec:@var{m} @var{x}) | |
3420 | Represents the same side effect as @code{pre_dec} but a different | |
3421 | value. The value represented here is the value @var{x} has @i{before} | |
3422 | being decremented. | |
3423 | ||
3424 | @findex post_inc | |
3425 | @item (post_inc:@var{m} @var{x}) | |
3426 | Similar, but specifies incrementing @var{x} instead of decrementing it. | |
b18cfc28 MH |
3427 | |
3428 | @findex post_modify | |
3429 | @item (post_modify:@var{m} @var{x} @var{y}) | |
3430 | ||
3431 | Represents the side effect of setting @var{x} to @var{y} and | |
3432 | represents @var{x} before @var{x} is modified. @var{x} must be a | |
3433 | @code{reg} or @code{mem}, but most machines allow only a @code{reg}. | |
3434 | @var{m} must be the machine mode for pointers on the machine in use. | |
b18cfc28 MH |
3435 | |
3436 | The expression @var{y} must be one of three forms: | |
b18cfc28 MH |
3437 | @code{(plus:@var{m} @var{x} @var{z})}, |
3438 | @code{(minus:@var{m} @var{x} @var{z})}, or | |
3439 | @code{(plus:@var{m} @var{x} @var{i})}, | |
b18cfc28 MH |
3440 | where @var{z} is an index register and @var{i} is a constant. |
3441 | ||
bd819a4a | 3442 | Here is an example of its use: |
b18cfc28 | 3443 | |
478c9e72 | 3444 | @smallexample |
aee96fe9 JM |
3445 | (mem:SF (post_modify:SI (reg:SI 42) (plus (reg:SI 42) |
3446 | (reg:SI 48)))) | |
478c9e72 | 3447 | @end smallexample |
b18cfc28 MH |
3448 | |
3449 | This says to modify pseudo register 42 by adding the contents of pseudo | |
3450 | register 48 to it, after the use of what ever 42 points to. | |
3451 | ||
3b9cd5c8 | 3452 | @findex pre_modify |
b18cfc28 MH |
3453 | @item (pre_modify:@var{m} @var{x} @var{expr}) |
3454 | Similar except side effects happen before the use. | |
89045fd1 JL |
3455 | @end table |
3456 | ||
3457 | These embedded side effect expressions must be used with care. Instruction | |
3458 | patterns may not use them. Until the @samp{flow} pass of the compiler, | |
3459 | they may occur only to represent pushes onto the stack. The @samp{flow} | |
3460 | pass finds cases where registers are incremented or decremented in one | |
3461 | instruction and used as an address shortly before or after; these cases are | |
3462 | then transformed to use pre- or post-increment or -decrement. | |
3463 | ||
3464 | If a register used as the operand of these expressions is used in | |
3465 | another address in an insn, the original value of the register is used. | |
3466 | Uses of the register outside of an address are not permitted within the | |
3467 | same insn as a use in an embedded side effect expression because such | |
3468 | insns behave differently on different machines and hence must be treated | |
3469 | as ambiguous and disallowed. | |
3470 | ||
3471 | An instruction that can be represented with an embedded side effect | |
3472 | could also be represented using @code{parallel} containing an additional | |
3473 | @code{set} to describe how the address register is altered. This is not | |
3474 | done because machines that allow these operations at all typically | |
3475 | allow them wherever a memory address is called for. Describing them as | |
3476 | additional parallel stores would require doubling the number of entries | |
3477 | in the machine description. | |
3478 | ||
4404ce28 | 3479 | @node Assembler |
89045fd1 JL |
3480 | @section Assembler Instructions as Expressions |
3481 | @cindex assembler instructions in RTL | |
3482 | ||
3483 | @cindex @code{asm_operands}, usage | |
3484 | The RTX code @code{asm_operands} represents a value produced by a | |
3485 | user-specified assembler instruction. It is used to represent | |
3486 | an @code{asm} statement with arguments. An @code{asm} statement with | |
3487 | a single output operand, like this: | |
3488 | ||
3489 | @smallexample | |
3490 | asm ("foo %1,%2,%0" : "=a" (outputvar) : "g" (x + y), "di" (*z)); | |
3491 | @end smallexample | |
3492 | ||
3493 | @noindent | |
3494 | is represented using a single @code{asm_operands} RTX which represents | |
3495 | the value that is stored in @code{outputvar}: | |
3496 | ||
3497 | @smallexample | |
3498 | (set @var{rtx-for-outputvar} | |
3499 | (asm_operands "foo %1,%2,%0" "a" 0 | |
3500 | [@var{rtx-for-addition-result} @var{rtx-for-*z}] | |
3501 | [(asm_input:@var{m1} "g") | |
3502 | (asm_input:@var{m2} "di")])) | |
3503 | @end smallexample | |
3504 | ||
3505 | @noindent | |
3506 | Here the operands of the @code{asm_operands} RTX are the assembler | |
3507 | template string, the output-operand's constraint, the index-number of the | |
3508 | output operand among the output operands specified, a vector of input | |
3509 | operand RTX's, and a vector of input-operand modes and constraints. The | |
3510 | mode @var{m1} is the mode of the sum @code{x+y}; @var{m2} is that of | |
3511 | @code{*z}. | |
3512 | ||
3513 | When an @code{asm} statement has multiple output values, its insn has | |
3514 | several such @code{set} RTX's inside of a @code{parallel}. Each @code{set} | |
e4ae5e77 | 3515 | contains an @code{asm_operands}; all of these share the same assembler |
89045fd1 JL |
3516 | template and vectors, but each contains the constraint for the respective |
3517 | output operand. They are also distinguished by the output-operand index | |
3518 | number, which is 0, 1, @dots{} for successive output operands. | |
3519 | ||
38be945b AO |
3520 | @node Debug Information |
3521 | @section Variable Location Debug Information in RTL | |
3522 | @cindex Variable Location Debug Information in RTL | |
3523 | ||
3524 | Variable tracking relies on @code{MEM_EXPR} and @code{REG_EXPR} | |
3525 | annotations to determine what user variables memory and register | |
3526 | references refer to. | |
3527 | ||
3528 | Variable tracking at assignments uses these notes only when they refer | |
3529 | to variables that live at fixed locations (e.g., addressable | |
3530 | variables, global non-automatic variables). For variables whose | |
3531 | location may vary, it relies on the following types of notes. | |
3532 | ||
3533 | @table @code | |
3534 | @findex var_location | |
3535 | @item (var_location:@var{mode} @var{var} @var{exp} @var{stat}) | |
3536 | Binds variable @code{var}, a tree, to value @var{exp}, an RTL | |
3537 | expression. It appears only in @code{NOTE_INSN_VAR_LOCATION} and | |
3538 | @code{DEBUG_INSN}s, with slightly different meanings. @var{mode}, if | |
3539 | present, represents the mode of @var{exp}, which is useful if it is a | |
3540 | modeless expression. @var{stat} is only meaningful in notes, | |
3541 | indicating whether the variable is known to be initialized or | |
3542 | uninitialized. | |
3543 | ||
3544 | @findex debug_expr | |
3545 | @item (debug_expr:@var{mode} @var{decl}) | |
3546 | Stands for the value bound to the @code{DEBUG_EXPR_DECL} @var{decl}, | |
3547 | that points back to it, within value expressions in | |
3548 | @code{VAR_LOCATION} nodes. | |
3549 | ||
96a95ac1 AO |
3550 | @findex debug_implicit_ptr |
3551 | @item (debug_implicit_ptr:@var{mode} @var{decl}) | |
3552 | Stands for the location of a @var{decl} that is no longer addressable. | |
3553 | ||
3554 | @findex entry_value | |
3555 | @item (entry_value:@var{mode} @var{decl}) | |
3556 | Stands for the value a @var{decl} had at the entry point of the | |
3557 | containing function. | |
3558 | ||
3559 | @findex debug_parameter_ref | |
3560 | @item (debug_parameter_ref:@var{mode} @var{decl}) | |
3561 | Refers to a parameter that was completely optimized out. | |
3562 | ||
3563 | @findex debug_marker | |
3564 | @item (debug_marker:@var{mode}) | |
3565 | Marks a program location. With @code{VOIDmode}, it stands for the | |
3566 | beginning of a statement, a recommended inspection point logically after | |
3567 | all prior side effects, and before any subsequent side effects. | |
3568 | ||
38be945b AO |
3569 | @end table |
3570 | ||
4404ce28 | 3571 | @node Insns |
89045fd1 JL |
3572 | @section Insns |
3573 | @cindex insns | |
3574 | ||
3575 | The RTL representation of the code for a function is a doubly-linked | |
3576 | chain of objects called @dfn{insns}. Insns are expressions with | |
3577 | special codes that are used for no other purpose. Some insns are | |
3578 | actual instructions; others represent dispatch tables for @code{switch} | |
3579 | statements; others represent labels to jump to or various sorts of | |
3580 | declarative information. | |
3581 | ||
3582 | In addition to its own specific data, each insn must have a unique | |
3583 | id-number that distinguishes it from all other insns in the current | |
3584 | function (after delayed branch scheduling, copies of an insn with the | |
3585 | same id-number may be present in multiple places in a function, but | |
3586 | these copies will always be identical and will only appear inside a | |
3587 | @code{sequence}), and chain pointers to the preceding and following | |
3588 | insns. These three fields occupy the same position in every insn, | |
3589 | independent of the expression code of the insn. They could be accessed | |
3590 | with @code{XEXP} and @code{XINT}, but instead three special macros are | |
3591 | always used: | |
3592 | ||
3593 | @table @code | |
3594 | @findex INSN_UID | |
3595 | @item INSN_UID (@var{i}) | |
3596 | Accesses the unique id of insn @var{i}. | |
3597 | ||
3598 | @findex PREV_INSN | |
3599 | @item PREV_INSN (@var{i}) | |
3600 | Accesses the chain pointer to the insn preceding @var{i}. | |
3601 | If @var{i} is the first insn, this is a null pointer. | |
3602 | ||
3603 | @findex NEXT_INSN | |
3604 | @item NEXT_INSN (@var{i}) | |
3605 | Accesses the chain pointer to the insn following @var{i}. | |
3606 | If @var{i} is the last insn, this is a null pointer. | |
3607 | @end table | |
3608 | ||
3609 | @findex get_insns | |
3610 | @findex get_last_insn | |
3611 | The first insn in the chain is obtained by calling @code{get_insns}; the | |
3612 | last insn is the result of calling @code{get_last_insn}. Within the | |
3613 | chain delimited by these insns, the @code{NEXT_INSN} and | |
3614 | @code{PREV_INSN} pointers must always correspond: if @var{insn} is not | |
3615 | the first insn, | |
3616 | ||
3ab51846 | 3617 | @smallexample |
89045fd1 | 3618 | NEXT_INSN (PREV_INSN (@var{insn})) == @var{insn} |
3ab51846 | 3619 | @end smallexample |
89045fd1 JL |
3620 | |
3621 | @noindent | |
3622 | is always true and if @var{insn} is not the last insn, | |
3623 | ||
3ab51846 | 3624 | @smallexample |
89045fd1 | 3625 | PREV_INSN (NEXT_INSN (@var{insn})) == @var{insn} |
3ab51846 | 3626 | @end smallexample |
89045fd1 JL |
3627 | |
3628 | @noindent | |
3629 | is always true. | |
3630 | ||
3631 | After delay slot scheduling, some of the insns in the chain might be | |
3632 | @code{sequence} expressions, which contain a vector of insns. The value | |
3633 | of @code{NEXT_INSN} in all but the last of these insns is the next insn | |
3634 | in the vector; the value of @code{NEXT_INSN} of the last insn in the vector | |
3635 | is the same as the value of @code{NEXT_INSN} for the @code{sequence} in | |
3636 | which it is contained. Similar rules apply for @code{PREV_INSN}. | |
3637 | ||
3638 | This means that the above invariants are not necessarily true for insns | |
3639 | inside @code{sequence} expressions. Specifically, if @var{insn} is the | |
3640 | first insn in a @code{sequence}, @code{NEXT_INSN (PREV_INSN (@var{insn}))} | |
3641 | is the insn containing the @code{sequence} expression, as is the value | |
aaef1c12 | 3642 | of @code{PREV_INSN (NEXT_INSN (@var{insn}))} if @var{insn} is the last |
89045fd1 | 3643 | insn in the @code{sequence} expression. You can use these expressions |
bd819a4a | 3644 | to find the containing @code{sequence} expression. |
89045fd1 | 3645 | |
38be945b | 3646 | Every insn has one of the following expression codes: |
89045fd1 JL |
3647 | |
3648 | @table @code | |
3649 | @findex insn | |
3650 | @item insn | |
3651 | The expression code @code{insn} is used for instructions that do not jump | |
3652 | and do not do function calls. @code{sequence} expressions are always | |
3653 | contained in insns with code @code{insn} even if one of those insns | |
3654 | should jump or do function calls. | |
3655 | ||
3656 | Insns with code @code{insn} have four additional fields beyond the three | |
3657 | mandatory ones listed above. These four are described in a table below. | |
3658 | ||
3659 | @findex jump_insn | |
3660 | @item jump_insn | |
3661 | The expression code @code{jump_insn} is used for instructions that may | |
cf7c4aa6 HPN |
3662 | jump (or, more generally, may contain @code{label_ref} expressions to |
3663 | which @code{pc} can be set in that instruction). If there is an | |
3664 | instruction to return from the current function, it is recorded as a | |
3665 | @code{jump_insn}. | |
89045fd1 JL |
3666 | |
3667 | @findex JUMP_LABEL | |
3668 | @code{jump_insn} insns have the same extra fields as @code{insn} insns, | |
3669 | accessed in the same way and in addition contain a field | |
3670 | @code{JUMP_LABEL} which is defined once jump optimization has completed. | |
3671 | ||
13c502cd MM |
3672 | For simple conditional and unconditional jumps, this field contains |
3673 | the @code{code_label} to which this insn will (possibly conditionally) | |
89045fd1 | 3674 | branch. In a more complex jump, @code{JUMP_LABEL} records one of the |
cf7c4aa6 HPN |
3675 | labels that the insn refers to; other jump target labels are recorded |
3676 | as @code{REG_LABEL_TARGET} notes. The exception is @code{addr_vec} | |
3677 | and @code{addr_diff_vec}, where @code{JUMP_LABEL} is @code{NULL_RTX} | |
3678 | and the only way to find the labels is to scan the entire body of the | |
3679 | insn. | |
89045fd1 | 3680 | |
18e15e30 SB |
3681 | Return insns count as jumps, but their @code{JUMP_LABEL} is @code{RETURN} |
3682 | or @code{SIMPLE_RETURN}. | |
89045fd1 JL |
3683 | |
3684 | @findex call_insn | |
3685 | @item call_insn | |
3686 | The expression code @code{call_insn} is used for instructions that may do | |
3687 | function calls. It is important to distinguish these instructions because | |
3688 | they imply that certain registers and memory locations may be altered | |
3689 | unpredictably. | |
3690 | ||
3691 | @findex CALL_INSN_FUNCTION_USAGE | |
3692 | @code{call_insn} insns have the same extra fields as @code{insn} insns, | |
3693 | accessed in the same way and in addition contain a field | |
3694 | @code{CALL_INSN_FUNCTION_USAGE}, which contains a list (chain of | |
e384e6b5 BS |
3695 | @code{expr_list} expressions) containing @code{use}, @code{clobber} and |
3696 | sometimes @code{set} expressions that denote hard registers and | |
3697 | @code{mem}s used or clobbered by the called function. | |
c78df6e1 | 3698 | |
e384e6b5 | 3699 | A @code{mem} generally points to a stack slot in which arguments passed |
c78df6e1 | 3700 | to the libcall by reference (@pxref{Register Arguments, |
6cdd5672 RH |
3701 | TARGET_PASS_BY_REFERENCE}) are stored. If the argument is |
3702 | caller-copied (@pxref{Register Arguments, TARGET_CALLEE_COPIES}), | |
e384e6b5 BS |
3703 | the stack slot will be mentioned in @code{clobber} and @code{use} |
3704 | entries; if it's callee-copied, only a @code{use} will appear, and the | |
3705 | @code{mem} may point to addresses that are not stack slots. | |
3706 | ||
3707 | Registers occurring inside a @code{clobber} in this list augment | |
3708 | registers specified in @code{CALL_USED_REGISTERS} (@pxref{Register | |
3709 | Basics}). | |
3710 | ||
3711 | If the list contains a @code{set} involving two registers, it indicates | |
3712 | that the function returns one of its arguments. Such a @code{set} may | |
3713 | look like a no-op if the same register holds the argument and the return | |
3714 | value. | |
89045fd1 JL |
3715 | |
3716 | @findex code_label | |
3717 | @findex CODE_LABEL_NUMBER | |
3718 | @item code_label | |
3719 | A @code{code_label} insn represents a label that a jump insn can jump | |
3720 | to. It contains two special fields of data in addition to the three | |
3721 | standard ones. @code{CODE_LABEL_NUMBER} is used to hold the @dfn{label | |
3722 | number}, a number that identifies this label uniquely among all the | |
3723 | labels in the compilation (not just in the current function). | |
3724 | Ultimately, the label is represented in the assembler output as an | |
3725 | assembler label, usually of the form @samp{L@var{n}} where @var{n} is | |
3726 | the label number. | |
3727 | ||
3728 | When a @code{code_label} appears in an RTL expression, it normally | |
3729 | appears within a @code{label_ref} which represents the address of | |
3730 | the label, as a number. | |
3731 | ||
ba72e5a6 HPN |
3732 | Besides as a @code{code_label}, a label can also be represented as a |
3733 | @code{note} of type @code{NOTE_INSN_DELETED_LABEL}. | |
3734 | ||
89045fd1 JL |
3735 | @findex LABEL_NUSES |
3736 | The field @code{LABEL_NUSES} is only defined once the jump optimization | |
0dc36574 | 3737 | phase is completed. It contains the number of times this label is |
89045fd1 JL |
3738 | referenced in the current function. |
3739 | ||
0dc36574 ZW |
3740 | @findex LABEL_KIND |
3741 | @findex SET_LABEL_KIND | |
3742 | @findex LABEL_ALT_ENTRY_P | |
3743 | @cindex alternate entry points | |
3744 | The field @code{LABEL_KIND} differentiates four different types of | |
3745 | labels: @code{LABEL_NORMAL}, @code{LABEL_STATIC_ENTRY}, | |
3746 | @code{LABEL_GLOBAL_ENTRY}, and @code{LABEL_WEAK_ENTRY}. The only labels | |
3747 | that do not have type @code{LABEL_NORMAL} are @dfn{alternate entry | |
3748 | points} to the current function. These may be static (visible only in | |
3749 | the containing translation unit), global (exposed to all translation | |
c0478a66 | 3750 | units), or weak (global, but can be overridden by another symbol with the |
0dc36574 ZW |
3751 | same name). |
3752 | ||
3753 | Much of the compiler treats all four kinds of label identically. Some | |
3754 | of it needs to know whether or not a label is an alternate entry point; | |
3755 | for this purpose, the macro @code{LABEL_ALT_ENTRY_P} is provided. It is | |
3756 | equivalent to testing whether @samp{LABEL_KIND (label) == LABEL_NORMAL}. | |
3757 | The only place that cares about the distinction between static, global, | |
3758 | and weak alternate entry points, besides the front-end code that creates | |
3759 | them, is the function @code{output_alternate_entry_point}, in | |
3760 | @file{final.c}. | |
3761 | ||
3762 | To set the kind of a label, use the @code{SET_LABEL_KIND} macro. | |
8cd0faaf | 3763 | |
da5c6bde SB |
3764 | @findex jump_table_data |
3765 | @item jump_table_data | |
3766 | A @code{jump_table_data} insn is a placeholder for the jump-table data | |
3767 | of a @code{casesi} or @code{tablejump} insn. They are placed after | |
3768 | a @code{tablejump_p} insn. A @code{jump_table_data} insn is not part o | |
3769 | a basic blockm but it is associated with the basic block that ends with | |
3770 | the @code{tablejump_p} insn. The @code{PATTERN} of a @code{jump_table_data} | |
3771 | is always either an @code{addr_vec} or an @code{addr_diff_vec}, and a | |
3772 | @code{jump_table_data} insn is always preceded by a @code{code_label}. | |
3773 | The @code{tablejump_p} insn refers to that @code{code_label} via its | |
3774 | @code{JUMP_LABEL}. | |
3775 | ||
89045fd1 JL |
3776 | @findex barrier |
3777 | @item barrier | |
3778 | Barriers are placed in the instruction stream when control cannot flow | |
3779 | past them. They are placed after unconditional jump instructions to | |
3780 | indicate that the jumps are unconditional and after calls to | |
3781 | @code{volatile} functions, which do not return (e.g., @code{exit}). | |
3782 | They contain no information beyond the three standard fields. | |
3783 | ||
3784 | @findex note | |
3785 | @findex NOTE_LINE_NUMBER | |
3786 | @findex NOTE_SOURCE_FILE | |
3787 | @item note | |
3788 | @code{note} insns are used to represent additional debugging and | |
3789 | declarative information. They contain two nonstandard fields, an | |
3790 | integer which is accessed with the macro @code{NOTE_LINE_NUMBER} and a | |
3791 | string accessed with @code{NOTE_SOURCE_FILE}. | |
3792 | ||
3793 | If @code{NOTE_LINE_NUMBER} is positive, the note represents the | |
3794 | position of a source line and @code{NOTE_SOURCE_FILE} is the source file name | |
3795 | that the line came from. These notes control generation of line | |
3796 | number data in the assembler output. | |
3797 | ||
3798 | Otherwise, @code{NOTE_LINE_NUMBER} is not really a line number but a | |
3799 | code with one of the following values (and @code{NOTE_SOURCE_FILE} | |
3800 | must contain a null pointer): | |
3801 | ||
3802 | @table @code | |
3803 | @findex NOTE_INSN_DELETED | |
3804 | @item NOTE_INSN_DELETED | |
3805 | Such a note is completely ignorable. Some passes of the compiler | |
3806 | delete insns by altering them into notes of this kind. | |
3807 | ||
ba72e5a6 HPN |
3808 | @findex NOTE_INSN_DELETED_LABEL |
3809 | @item NOTE_INSN_DELETED_LABEL | |
3810 | This marks what used to be a @code{code_label}, but was not used for other | |
3811 | purposes than taking its address and was transformed to mark that no | |
3812 | code jumps to it. | |
3813 | ||
89045fd1 JL |
3814 | @findex NOTE_INSN_BLOCK_BEG |
3815 | @findex NOTE_INSN_BLOCK_END | |
3816 | @item NOTE_INSN_BLOCK_BEG | |
3817 | @itemx NOTE_INSN_BLOCK_END | |
3818 | These types of notes indicate the position of the beginning and end | |
3819 | of a level of scoping of variable names. They control the output | |
3820 | of debugging information. | |
3821 | ||
3822 | @findex NOTE_INSN_EH_REGION_BEG | |
3823 | @findex NOTE_INSN_EH_REGION_END | |
3824 | @item NOTE_INSN_EH_REGION_BEG | |
3825 | @itemx NOTE_INSN_EH_REGION_END | |
3826 | These types of notes indicate the position of the beginning and end of a | |
9fb6b620 SB |
3827 | level of scoping for exception handling. @code{NOTE_EH_HANDLER} |
3828 | identifies which region is associated with these notes. | |
89045fd1 | 3829 | |
70d5fb1c | 3830 | @findex NOTE_INSN_FUNCTION_BEG |
b630e240 | 3831 | @item NOTE_INSN_FUNCTION_BEG |
70d5fb1c BE |
3832 | Appears at the start of the function body, after the function |
3833 | prologue. | |
3834 | ||
38be945b AO |
3835 | @findex NOTE_INSN_VAR_LOCATION |
3836 | @findex NOTE_VAR_LOCATION | |
3837 | @item NOTE_INSN_VAR_LOCATION | |
3838 | This note is used to generate variable location debugging information. | |
3839 | It indicates that the user variable in its @code{VAR_LOCATION} operand | |
3840 | is at the location given in the RTL expression, or holds a value that | |
3841 | can be computed by evaluating the RTL expression from that static | |
3842 | point in the program up to the next such note for the same user | |
3843 | variable. | |
3844 | ||
96a95ac1 AO |
3845 | @findex NOTE_INSN_BEGIN_STMT |
3846 | @item NOTE_INSN_BEGIN_STMT | |
3847 | This note is used to generate @code{is_stmt} markers in line number | |
3848 | debuggign information. It indicates the beginning of a user | |
3849 | statement. | |
3850 | ||
89045fd1 JL |
3851 | @end table |
3852 | ||
3853 | These codes are printed symbolically when they appear in debugging dumps. | |
38be945b AO |
3854 | |
3855 | @findex debug_insn | |
3856 | @findex INSN_VAR_LOCATION | |
3857 | @item debug_insn | |
3858 | The expression code @code{debug_insn} is used for pseudo-instructions | |
3859 | that hold debugging information for variable tracking at assignments | |
3860 | (see @option{-fvar-tracking-assignments} option). They are the RTL | |
3861 | representation of @code{GIMPLE_DEBUG} statements | |
3862 | (@ref{@code{GIMPLE_DEBUG}}), with a @code{VAR_LOCATION} operand that | |
3863 | binds a user variable tree to an RTL representation of the | |
3864 | @code{value} in the corresponding statement. A @code{DEBUG_EXPR} in | |
3865 | it stands for the value bound to the corresponding | |
3866 | @code{DEBUG_EXPR_DECL}. | |
3867 | ||
96a95ac1 AO |
3868 | @code{GIMPLE_DEBUG_BEGIN_STMT} is expanded to RTL as a @code{DEBUG_INSN} |
3869 | with a @code{VOIDmode} @code{DEBUG_MARKER} @code{PATTERN}. These | |
3870 | @code{DEBUG_INSN}s, that do not carry @code{VAR_LOCATION} information, | |
3871 | just @code{DEBUG_MARKER}s, can be detected by testing | |
3872 | @code{DEBUG_MARKER_INSN_P}, whereas those that do can be recognized as | |
3873 | @code{DEBUG_BIND_INSN_P}. | |
3874 | ||
3875 | Throughout optimization passes, @code{DEBUG_INSN}s are not reordered | |
3876 | with respect to each other, particularly during scheduling. Binding | |
3877 | information is kept in pseudo-instruction form, so that, unlike notes, | |
3878 | it gets the same treatment and adjustments that regular instructions | |
3879 | would. It is the variable tracking pass that turns these | |
3880 | pseudo-instructions into @code{NOTE_INSN_VAR_LOCATION} and | |
3881 | @code{NOTE_INSN_BEGIN_STMT} notes, | |
3882 | analyzing control flow, value equivalences and changes to registers and | |
3883 | memory referenced in value expressions, propagating the values of debug | |
3884 | temporaries and determining expressions that can be used to compute the | |
3885 | value of each user variable at as many points (ranges, actually) in the | |
3886 | program as possible. | |
38be945b AO |
3887 | |
3888 | Unlike @code{NOTE_INSN_VAR_LOCATION}, the value expression in an | |
3889 | @code{INSN_VAR_LOCATION} denotes a value at that specific point in the | |
3890 | program, rather than an expression that can be evaluated at any later | |
3891 | point before an overriding @code{VAR_LOCATION} is encountered. E.g., | |
3892 | if a user variable is bound to a @code{REG} and then a subsequent insn | |
3893 | modifies the @code{REG}, the note location would keep mapping the user | |
3894 | variable to the register across the insn, whereas the insn location | |
3895 | would keep the variable bound to the value, so that the variable | |
3896 | tracking pass would emit another location note for the variable at the | |
3897 | point in which the register is modified. | |
3898 | ||
89045fd1 JL |
3899 | @end table |
3900 | ||
9953e375 | 3901 | @cindex @code{TImode}, in @code{insn} |
89045fd1 JL |
3902 | @cindex @code{HImode}, in @code{insn} |
3903 | @cindex @code{QImode}, in @code{insn} | |
3904 | The machine mode of an insn is normally @code{VOIDmode}, but some | |
ebb48a4d | 3905 | phases use the mode for various purposes. |
9953e375 RH |
3906 | |
3907 | The common subexpression elimination pass sets the mode of an insn to | |
3908 | @code{QImode} when it is the first insn in a block that has already | |
3909 | been processed. | |
3910 | ||
3911 | The second Haifa scheduling pass, for targets that can multiple issue, | |
3912 | sets the mode of an insn to @code{TImode} when it is believed that the | |
ebb48a4d | 3913 | instruction begins an issue group. That is, when the instruction |
9953e375 | 3914 | cannot issue simultaneously with the previous. This may be relied on |
c771326b | 3915 | by later passes, in particular machine-dependent reorg. |
89045fd1 JL |
3916 | |
3917 | Here is a table of the extra fields of @code{insn}, @code{jump_insn} | |
3918 | and @code{call_insn} insns: | |
3919 | ||
3920 | @table @code | |
3921 | @findex PATTERN | |
3922 | @item PATTERN (@var{i}) | |
26898771 BS |
3923 | An expression for the side effect performed by this insn. This must |
3924 | be one of the following codes: @code{set}, @code{call}, @code{use}, | |
3925 | @code{clobber}, @code{return}, @code{simple_return}, @code{asm_input}, | |
3926 | @code{asm_output}, @code{addr_vec}, @code{addr_diff_vec}, | |
3927 | @code{trap_if}, @code{unspec}, @code{unspec_volatile}, | |
3928 | @code{parallel}, @code{cond_exec}, or @code{sequence}. If it is a | |
3929 | @code{parallel}, each element of the @code{parallel} must be one these | |
3930 | codes, except that @code{parallel} expressions cannot be nested and | |
3931 | @code{addr_vec} and @code{addr_diff_vec} are not permitted inside a | |
3932 | @code{parallel} expression. | |
89045fd1 JL |
3933 | |
3934 | @findex INSN_CODE | |
3935 | @item INSN_CODE (@var{i}) | |
3936 | An integer that says which pattern in the machine description matches | |
630d3d5a | 3937 | this insn, or @minus{}1 if the matching has not yet been attempted. |
89045fd1 | 3938 | |
630d3d5a | 3939 | Such matching is never attempted and this field remains @minus{}1 on an insn |
89045fd1 JL |
3940 | whose pattern consists of a single @code{use}, @code{clobber}, |
3941 | @code{asm_input}, @code{addr_vec} or @code{addr_diff_vec} expression. | |
3942 | ||
3943 | @findex asm_noperands | |
3944 | Matching is also never attempted on insns that result from an @code{asm} | |
3945 | statement. These contain at least one @code{asm_operands} expression. | |
3946 | The function @code{asm_noperands} returns a non-negative value for | |
3947 | such insns. | |
3948 | ||
3949 | In the debugging output, this field is printed as a number followed by | |
3950 | a symbolic representation that locates the pattern in the @file{md} | |
3951 | file as some small positive or negative offset from a named pattern. | |
3952 | ||
3953 | @findex LOG_LINKS | |
3954 | @item LOG_LINKS (@var{i}) | |
3955 | A list (chain of @code{insn_list} expressions) giving information about | |
3956 | dependencies between instructions within a basic block. Neither a jump | |
6fb5fa3c DB |
3957 | nor a label may come between the related insns. These are only used by |
3958 | the schedulers and by combine. This is a deprecated data structure. | |
ff2ce160 | 3959 | Def-use and use-def chains are now preferred. |
89045fd1 JL |
3960 | |
3961 | @findex REG_NOTES | |
3962 | @item REG_NOTES (@var{i}) | |
e5af9ddd RS |
3963 | A list (chain of @code{expr_list}, @code{insn_list} and @code{int_list} |
3964 | expressions) giving miscellaneous information about the insn. It is often | |
89045fd1 JL |
3965 | information pertaining to the registers used in this insn. |
3966 | @end table | |
3967 | ||
3968 | The @code{LOG_LINKS} field of an insn is a chain of @code{insn_list} | |
3969 | expressions. Each of these has two operands: the first is an insn, | |
3970 | and the second is another @code{insn_list} expression (the next one in | |
3971 | the chain). The last @code{insn_list} in the chain has a null pointer | |
3972 | as second operand. The significant thing about the chain is which | |
3973 | insns appear in it (as first operands of @code{insn_list} | |
3974 | expressions). Their order is not significant. | |
3975 | ||
3976 | This list is originally set up by the flow analysis pass; it is a null | |
3977 | pointer until then. Flow only adds links for those data dependencies | |
3978 | which can be used for instruction combination. For each insn, the flow | |
3979 | analysis pass adds a link to insns which store into registers values | |
b198261f | 3980 | that are used for the first time in this insn. |
89045fd1 JL |
3981 | |
3982 | The @code{REG_NOTES} field of an insn is a chain similar to the | |
e5af9ddd RS |
3983 | @code{LOG_LINKS} field but it includes @code{expr_list} and @code{int_list} |
3984 | expressions in addition to @code{insn_list} expressions. There are several | |
3985 | kinds of register notes, which are distinguished by the machine mode, which | |
3986 | in a register note is really understood as being an @code{enum reg_note}. | |
89045fd1 JL |
3987 | The first operand @var{op} of the note is data whose meaning depends on |
3988 | the kind of note. | |
3989 | ||
3990 | @findex REG_NOTE_KIND | |
3991 | @findex PUT_REG_NOTE_KIND | |
3992 | The macro @code{REG_NOTE_KIND (@var{x})} returns the kind of | |
3993 | register note. Its counterpart, the macro @code{PUT_REG_NOTE_KIND | |
3994 | (@var{x}, @var{newkind})} sets the register note type of @var{x} to be | |
3995 | @var{newkind}. | |
3996 | ||
3997 | Register notes are of three classes: They may say something about an | |
3998 | input to an insn, they may say something about an output of an insn, or | |
3999 | they may create a linkage between two insns. There are also a set | |
4000 | of values that are only used in @code{LOG_LINKS}. | |
4001 | ||
4002 | These register notes annotate inputs to an insn: | |
4003 | ||
4004 | @table @code | |
ebb48a4d | 4005 | @findex REG_DEAD |
89045fd1 JL |
4006 | @item REG_DEAD |
4007 | The value in @var{op} dies in this insn; that is to say, altering the | |
4008 | value immediately after this insn would not affect the future behavior | |
ebb48a4d | 4009 | of the program. |
89045fd1 | 4010 | |
50b996bf RH |
4011 | It does not follow that the register @var{op} has no useful value after |
4012 | this insn since @var{op} is not necessarily modified by this insn. | |
4013 | Rather, no subsequent instruction uses the contents of @var{op}. | |
4014 | ||
4015 | @findex REG_UNUSED | |
4016 | @item REG_UNUSED | |
4017 | The register @var{op} being set by this insn will not be used in a | |
4018 | subsequent insn. This differs from a @code{REG_DEAD} note, which | |
4019 | indicates that the value in an input will not be used subsequently. | |
4020 | These two notes are independent; both may be present for the same | |
4021 | register. | |
89045fd1 JL |
4022 | |
4023 | @findex REG_INC | |
4024 | @item REG_INC | |
4025 | The register @var{op} is incremented (or decremented; at this level | |
4026 | there is no distinction) by an embedded side effect inside this insn. | |
4027 | This means it appears in a @code{post_inc}, @code{pre_inc}, | |
4028 | @code{post_dec} or @code{pre_dec} expression. | |
4029 | ||
4030 | @findex REG_NONNEG | |
4031 | @item REG_NONNEG | |
4032 | The register @var{op} is known to have a nonnegative value when this | |
4033 | insn is reached. This is used so that decrement and branch until zero | |
4034 | instructions, such as the m68k dbra, can be matched. | |
4035 | ||
4036 | The @code{REG_NONNEG} note is added to insns only if the machine | |
4037 | description has a @samp{decrement_and_branch_until_zero} pattern. | |
4038 | ||
cf7c4aa6 HPN |
4039 | @findex REG_LABEL_OPERAND |
4040 | @item REG_LABEL_OPERAND | |
ba72e5a6 | 4041 | This insn uses @var{op}, a @code{code_label} or a @code{note} of type |
cf7c4aa6 HPN |
4042 | @code{NOTE_INSN_DELETED_LABEL}, but is not a @code{jump_insn}, or it |
4043 | is a @code{jump_insn} that refers to the operand as an ordinary | |
4044 | operand. The label may still eventually be a jump target, but if so | |
4045 | in an indirect jump in a subsequent insn. The presence of this note | |
4046 | allows jump optimization to be aware that @var{op} is, in fact, being | |
4047 | used, and flow optimization to build an accurate flow graph. | |
4048 | ||
4049 | @findex REG_LABEL_TARGET | |
4050 | @item REG_LABEL_TARGET | |
e4ae5e77 | 4051 | This insn is a @code{jump_insn} but not an @code{addr_vec} or |
cf7c4aa6 HPN |
4052 | @code{addr_diff_vec}. It uses @var{op}, a @code{code_label} as a |
4053 | direct or indirect jump target. Its purpose is similar to that of | |
4054 | @code{REG_LABEL_OPERAND}. This note is only present if the insn has | |
4055 | multiple targets; the last label in the insn (in the highest numbered | |
4056 | insn-field) goes into the @code{JUMP_LABEL} field and does not have a | |
4057 | @code{REG_LABEL_TARGET} note. @xref{Insns, JUMP_LABEL}. | |
750054a2 | 4058 | |
cdeee6d2 | 4059 | @findex REG_SETJMP |
ff2ce160 MS |
4060 | @item REG_SETJMP |
4061 | Appears attached to each @code{CALL_INSN} to @code{setjmp} or a | |
cdeee6d2 | 4062 | related function. |
89045fd1 JL |
4063 | @end table |
4064 | ||
4065 | The following notes describe attributes of outputs of an insn: | |
4066 | ||
4067 | @table @code | |
4068 | @findex REG_EQUIV | |
4069 | @findex REG_EQUAL | |
4070 | @item REG_EQUIV | |
4071 | @itemx REG_EQUAL | |
4072 | This note is only valid on an insn that sets only one register and | |
4073 | indicates that that register will be equal to @var{op} at run time; the | |
4074 | scope of this equivalence differs between the two types of notes. The | |
4075 | value which the insn explicitly copies into the register may look | |
4076 | different from @var{op}, but they will be equal at run time. If the | |
6c06e0e8 JJ |
4077 | output of the single @code{set} is a @code{strict_low_part} or |
4078 | @code{zero_extract} expression, the note refers to the register that | |
4079 | is contained in its first operand. | |
ebb48a4d | 4080 | |
89045fd1 JL |
4081 | For @code{REG_EQUIV}, the register is equivalent to @var{op} throughout |
4082 | the entire function, and could validly be replaced in all its | |
4083 | occurrences by @var{op}. (``Validly'' here refers to the data flow of | |
4084 | the program; simple replacement may make some insns invalid.) For | |
4085 | example, when a constant is loaded into a register that is never | |
4086 | assigned any other value, this kind of note is used. | |
4087 | ||
4088 | When a parameter is copied into a pseudo-register at entry to a function, | |
4089 | a note of this kind records that the register is equivalent to the stack | |
4090 | slot where the parameter was passed. Although in this case the register | |
4091 | may be set by other insns, it is still valid to replace the register | |
4092 | by the stack slot throughout the function. | |
4093 | ||
4094 | A @code{REG_EQUIV} note is also used on an instruction which copies a | |
4095 | register parameter into a pseudo-register at entry to a function, if | |
4096 | there is a stack slot where that parameter could be stored. Although | |
4097 | other insns may set the pseudo-register, it is valid for the compiler to | |
4098 | replace the pseudo-register by stack slot throughout the function, | |
4099 | provided the compiler ensures that the stack slot is properly | |
4100 | initialized by making the replacement in the initial copy instruction as | |
4101 | well. This is used on machines for which the calling convention | |
4102 | allocates stack space for register parameters. See | |
4103 | @code{REG_PARM_STACK_SPACE} in @ref{Stack Arguments}. | |
4104 | ||
4105 | In the case of @code{REG_EQUAL}, the register that is set by this insn | |
4106 | will be equal to @var{op} at run time at the end of this insn but not | |
4107 | necessarily elsewhere in the function. In this case, @var{op} | |
4108 | is typically an arithmetic expression. For example, when a sequence of | |
4109 | insns such as a library call is used to perform an arithmetic operation, | |
4110 | this kind of note is attached to the insn that produces or copies the | |
4111 | final value. | |
4112 | ||
4113 | These two notes are used in different ways by the compiler passes. | |
4114 | @code{REG_EQUAL} is used by passes prior to register allocation (such as | |
4115 | common subexpression elimination and loop optimization) to tell them how | |
4116 | to think of that value. @code{REG_EQUIV} notes are used by register | |
4117 | allocation to indicate that there is an available substitute expression | |
4118 | (either a constant or a @code{mem} expression for the location of a | |
4119 | parameter on the stack) that may be used in place of a register if | |
4120 | insufficient registers are available. | |
4121 | ||
4122 | Except for stack homes for parameters, which are indicated by a | |
4123 | @code{REG_EQUIV} note and are not useful to the early optimization | |
4124 | passes and pseudo registers that are equivalent to a memory location | |
aaef1c12 | 4125 | throughout their entire life, which is not detected until later in |
89045fd1 JL |
4126 | the compilation, all equivalences are initially indicated by an attached |
4127 | @code{REG_EQUAL} note. In the early stages of register allocation, a | |
4128 | @code{REG_EQUAL} note is changed into a @code{REG_EQUIV} note if | |
4129 | @var{op} is a constant and the insn represents the only set of its | |
4130 | destination register. | |
4131 | ||
4132 | Thus, compiler passes prior to register allocation need only check for | |
4133 | @code{REG_EQUAL} notes and passes subsequent to register allocation | |
4134 | need only check for @code{REG_EQUIV} notes. | |
89045fd1 JL |
4135 | @end table |
4136 | ||
4137 | These notes describe linkages between insns. They occur in pairs: one | |
4138 | insn has one of a pair of notes that points to a second insn, which has | |
4139 | the inverse note pointing back to the first insn. | |
4140 | ||
4141 | @table @code | |
89045fd1 JL |
4142 | @findex REG_CC_SETTER |
4143 | @findex REG_CC_USER | |
4144 | @item REG_CC_SETTER | |
4145 | @itemx REG_CC_USER | |
4146 | On machines that use @code{cc0}, the insns which set and use @code{cc0} | |
4147 | set and use @code{cc0} are adjacent. However, when branch delay slot | |
4148 | filling is done, this may no longer be true. In this case a | |
4149 | @code{REG_CC_USER} note will be placed on the insn setting @code{cc0} to | |
4150 | point to the insn using @code{cc0} and a @code{REG_CC_SETTER} note will | |
4151 | be placed on the insn using @code{cc0} to point to the insn setting | |
bd819a4a | 4152 | @code{cc0}. |
89045fd1 JL |
4153 | @end table |
4154 | ||
4155 | These values are only used in the @code{LOG_LINKS} field, and indicate | |
4156 | the type of dependency that each link represents. Links which indicate | |
4157 | a data dependence (a read after write dependence) do not use any code, | |
4158 | they simply have mode @code{VOIDmode}, and are printed without any | |
4159 | descriptive text. | |
4160 | ||
4161 | @table @code | |
b198261f MK |
4162 | @findex REG_DEP_TRUE |
4163 | @item REG_DEP_TRUE | |
4164 | This indicates a true dependence (a read after write dependence). | |
89045fd1 JL |
4165 | |
4166 | @findex REG_DEP_OUTPUT | |
4167 | @item REG_DEP_OUTPUT | |
4168 | This indicates an output dependence (a write after write dependence). | |
b198261f MK |
4169 | |
4170 | @findex REG_DEP_ANTI | |
4171 | @item REG_DEP_ANTI | |
4172 | This indicates an anti dependence (a write after read dependence). | |
4173 | ||
89045fd1 JL |
4174 | @end table |
4175 | ||
4176 | These notes describe information gathered from gcov profile data. They | |
e5af9ddd | 4177 | are stored in the @code{REG_NOTES} field of an insn. |
89045fd1 JL |
4178 | |
4179 | @table @code | |
89045fd1 JL |
4180 | @findex REG_BR_PROB |
4181 | @item REG_BR_PROB | |
4182 | This is used to specify the ratio of branches to non-branches of a | |
e5af9ddd | 4183 | branch insn according to the profile data. The note is represented |
5fa396ad JH |
4184 | as an @code{int_list} expression whose integer value is an encoding |
4185 | of @code{profile_probability} type. @code{profile_probability} provide | |
4186 | member function @code{from_reg_br_prob_note} and @code{to_reg_br_prob_note} | |
4187 | to extract and store the probability into the RTL encoding. | |
6714c1ae JL |
4188 | |
4189 | @findex REG_BR_PRED | |
4190 | @item REG_BR_PRED | |
4191 | These notes are found in JUMP insns after delayed branch scheduling | |
3b7a2e58 | 4192 | has taken place. They indicate both the direction and the likelihood |
161d7b59 | 4193 | of the JUMP@. The format is a bitmask of ATTR_FLAG_* values. |
07ebc930 RH |
4194 | |
4195 | @findex REG_FRAME_RELATED_EXPR | |
4196 | @item REG_FRAME_RELATED_EXPR | |
4197 | This is used on an RTX_FRAME_RELATED_P insn wherein the attached expression | |
4198 | is used in place of the actual insn pattern. This is done in cases where | |
4199 | the pattern is either complex or misleading. | |
89045fd1 JL |
4200 | @end table |
4201 | ||
771c6b44 IT |
4202 | The note @code{REG_CALL_NOCF_CHECK} is used in conjunction with the |
4203 | @option{-fcf-protection=branch} option. The note is set if a | |
4204 | @code{nocf_check} attribute is specified for a function type or a | |
4205 | pointer to function type. The note is stored in the @code{REG_NOTES} | |
4206 | field of an insn. | |
4207 | ||
4208 | @table @code | |
4209 | @findex REG_CALL_NOCF_CHECK | |
4210 | @item REG_CALL_NOCF_CHECK | |
4211 | Users have control through the @code{nocf_check} attribute to identify | |
4212 | which calls to a function should be skipped from control-flow instrumentation | |
4213 | when the option @option{-fcf-protection=branch} is specified. The compiler | |
4214 | puts a @code{REG_CALL_NOCF_CHECK} note on each @code{CALL_INSN} instruction | |
4215 | that has a function type marked with a @code{nocf_check} attribute. | |
4216 | @end table | |
4217 | ||
89045fd1 JL |
4218 | For convenience, the machine mode in an @code{insn_list} or |
4219 | @code{expr_list} is printed using these symbolic codes in debugging dumps. | |
4220 | ||
4221 | @findex insn_list | |
4222 | @findex expr_list | |
4223 | The only difference between the expression codes @code{insn_list} and | |
4224 | @code{expr_list} is that the first operand of an @code{insn_list} is | |
4225 | assumed to be an insn and is printed in debugging dumps as the insn's | |
4226 | unique id; the first operand of an @code{expr_list} is printed in the | |
4227 | ordinary way as an expression. | |
4228 | ||
4404ce28 | 4229 | @node Calls |
89045fd1 JL |
4230 | @section RTL Representation of Function-Call Insns |
4231 | @cindex calling functions in RTL | |
4232 | @cindex RTL function-call insns | |
4233 | @cindex function-call insns | |
4234 | ||
4235 | Insns that call subroutines have the RTL expression code @code{call_insn}. | |
4236 | These insns must satisfy special rules, and their bodies must use a special | |
4237 | RTL expression code, @code{call}. | |
4238 | ||
4239 | @cindex @code{call} usage | |
4240 | A @code{call} expression has two operands, as follows: | |
4241 | ||
3ab51846 | 4242 | @smallexample |
89045fd1 | 4243 | (call (mem:@var{fm} @var{addr}) @var{nbytes}) |
3ab51846 | 4244 | @end smallexample |
89045fd1 JL |
4245 | |
4246 | @noindent | |
4247 | Here @var{nbytes} is an operand that represents the number of bytes of | |
4248 | argument data being passed to the subroutine, @var{fm} is a machine mode | |
4249 | (which must equal as the definition of the @code{FUNCTION_MODE} macro in | |
4250 | the machine description) and @var{addr} represents the address of the | |
4251 | subroutine. | |
4252 | ||
4253 | For a subroutine that returns no value, the @code{call} expression as | |
4254 | shown above is the entire body of the insn, except that the insn might | |
4255 | also contain @code{use} or @code{clobber} expressions. | |
4256 | ||
4257 | @cindex @code{BLKmode}, and function return values | |
4258 | For a subroutine that returns a value whose mode is not @code{BLKmode}, | |
4259 | the value is returned in a hard register. If this register's number is | |
4260 | @var{r}, then the body of the call insn looks like this: | |
4261 | ||
3ab51846 | 4262 | @smallexample |
89045fd1 JL |
4263 | (set (reg:@var{m} @var{r}) |
4264 | (call (mem:@var{fm} @var{addr}) @var{nbytes})) | |
3ab51846 | 4265 | @end smallexample |
89045fd1 JL |
4266 | |
4267 | @noindent | |
4268 | This RTL expression makes it clear (to the optimizer passes) that the | |
4269 | appropriate register receives a useful value in this insn. | |
4270 | ||
4271 | When a subroutine returns a @code{BLKmode} value, it is handled by | |
4272 | passing to the subroutine the address of a place to store the value. | |
4273 | So the call insn itself does not ``return'' any value, and it has the | |
4274 | same RTL form as a call that returns nothing. | |
4275 | ||
4276 | On some machines, the call instruction itself clobbers some register, | |
4277 | for example to contain the return address. @code{call_insn} insns | |
4278 | on these machines should have a body which is a @code{parallel} | |
4279 | that contains both the @code{call} expression and @code{clobber} | |
4280 | expressions that indicate which registers are destroyed. Similarly, | |
4281 | if the call instruction requires some register other than the stack | |
0bdcd332 | 4282 | pointer that is not explicitly mentioned in its RTL, a @code{use} |
89045fd1 JL |
4283 | subexpression should mention that register. |
4284 | ||
4285 | Functions that are called are assumed to modify all registers listed in | |
4286 | the configuration macro @code{CALL_USED_REGISTERS} (@pxref{Register | |
4287 | Basics}) and, with the exception of @code{const} functions and library | |
4288 | calls, to modify all of memory. | |
4289 | ||
4290 | Insns containing just @code{use} expressions directly precede the | |
4291 | @code{call_insn} insn to indicate which registers contain inputs to the | |
4292 | function. Similarly, if registers other than those in | |
4293 | @code{CALL_USED_REGISTERS} are clobbered by the called function, insns | |
4294 | containing a single @code{clobber} follow immediately after the call to | |
4295 | indicate which registers. | |
4296 | ||
4297 | @node Sharing | |
4298 | @section Structure Sharing Assumptions | |
4299 | @cindex sharing of RTL components | |
4300 | @cindex RTL structure sharing assumptions | |
4301 | ||
4302 | The compiler assumes that certain kinds of RTL expressions are unique; | |
4303 | there do not exist two distinct objects representing the same value. | |
4304 | In other cases, it makes an opposite assumption: that no RTL expression | |
4305 | object of a certain kind appears in more than one place in the | |
4306 | containing structure. | |
4307 | ||
4308 | These assumptions refer to a single function; except for the RTL | |
4309 | objects that describe global variables and external functions, | |
4310 | and a few standard objects such as small integer constants, | |
4311 | no RTL objects are common to two functions. | |
4312 | ||
4313 | @itemize @bullet | |
4314 | @cindex @code{reg}, RTL sharing | |
4315 | @item | |
4316 | Each pseudo-register has only a single @code{reg} object to represent it, | |
4317 | and therefore only a single machine mode. | |
4318 | ||
4319 | @cindex symbolic label | |
4320 | @cindex @code{symbol_ref}, RTL sharing | |
4321 | @item | |
4322 | For any symbolic label, there is only one @code{symbol_ref} object | |
4323 | referring to it. | |
4324 | ||
4325 | @cindex @code{const_int}, RTL sharing | |
4326 | @item | |
c13e8210 | 4327 | All @code{const_int} expressions with equal values are shared. |
89045fd1 | 4328 | |
0c12fc9b RS |
4329 | @cindex @code{const_poly_int}, RTL sharing |
4330 | @item | |
4331 | All @code{const_poly_int} expressions with equal modes and values | |
4332 | are shared. | |
4333 | ||
89045fd1 JL |
4334 | @cindex @code{pc}, RTL sharing |
4335 | @item | |
4336 | There is only one @code{pc} expression. | |
4337 | ||
4338 | @cindex @code{cc0}, RTL sharing | |
4339 | @item | |
4340 | There is only one @code{cc0} expression. | |
4341 | ||
4342 | @cindex @code{const_double}, RTL sharing | |
4343 | @item | |
4344 | There is only one @code{const_double} expression with value 0 for | |
4345 | each floating point mode. Likewise for values 1 and 2. | |
4346 | ||
69ef87e2 AH |
4347 | @cindex @code{const_vector}, RTL sharing |
4348 | @item | |
4349 | There is only one @code{const_vector} expression with value 0 for | |
4350 | each vector mode, be it an integer or a double constant vector. | |
4351 | ||
89045fd1 JL |
4352 | @cindex @code{label_ref}, RTL sharing |
4353 | @cindex @code{scratch}, RTL sharing | |
4354 | @item | |
4355 | No @code{label_ref} or @code{scratch} appears in more than one place in | |
4356 | the RTL structure; in other words, it is safe to do a tree-walk of all | |
4357 | the insns in the function and assume that each time a @code{label_ref} | |
4358 | or @code{scratch} is seen it is distinct from all others that are seen. | |
4359 | ||
4360 | @cindex @code{mem}, RTL sharing | |
4361 | @item | |
4362 | Only one @code{mem} object is normally created for each static | |
4363 | variable or stack slot, so these objects are frequently shared in all | |
4364 | the places they appear. However, separate but equal objects for these | |
4365 | variables are occasionally made. | |
4366 | ||
4367 | @cindex @code{asm_operands}, RTL sharing | |
4368 | @item | |
4369 | When a single @code{asm} statement has multiple output operands, a | |
4370 | distinct @code{asm_operands} expression is made for each output operand. | |
4371 | However, these all share the vector which contains the sequence of input | |
4372 | operands. This sharing is used later on to test whether two | |
4373 | @code{asm_operands} expressions come from the same statement, so all | |
4374 | optimizations must carefully preserve the sharing if they copy the | |
4375 | vector at all. | |
4376 | ||
4377 | @item | |
4378 | No RTL object appears in more than one place in the RTL structure | |
4379 | except as described above. Many passes of the compiler rely on this | |
4380 | by assuming that they can modify RTL objects in place without unwanted | |
4381 | side-effects on other insns. | |
4382 | ||
4383 | @findex unshare_all_rtl | |
4384 | @item | |
4385 | During initial RTL generation, shared structure is freely introduced. | |
4386 | After all the RTL for a function has been generated, all shared | |
4387 | structure is copied by @code{unshare_all_rtl} in @file{emit-rtl.c}, | |
4388 | after which the above rules are guaranteed to be followed. | |
4389 | ||
4390 | @findex copy_rtx_if_shared | |
4391 | @item | |
4392 | During the combiner pass, shared structure within an insn can exist | |
4393 | temporarily. However, the shared structure is copied before the | |
4394 | combiner is finished with the insn. This is done by calling | |
4395 | @code{copy_rtx_if_shared}, which is a subroutine of | |
4396 | @code{unshare_all_rtl}. | |
4397 | @end itemize | |
4398 | ||
4399 | @node Reading RTL | |
4400 | @section Reading RTL | |
4401 | ||
4402 | To read an RTL object from a file, call @code{read_rtx}. It takes one | |
0f40f9f7 ZW |
4403 | argument, a stdio stream, and returns a single RTL object. This routine |
4404 | is defined in @file{read-rtl.c}. It is not available in the compiler | |
4405 | itself, only the various programs that generate the compiler back end | |
4406 | from the machine description. | |
89045fd1 JL |
4407 | |
4408 | People frequently have the idea of using RTL stored as text in a file as | |
161d7b59 | 4409 | an interface between a language front end and the bulk of GCC@. This |
89045fd1 JL |
4410 | idea is not feasible. |
4411 | ||
f0523f02 | 4412 | GCC was designed to use RTL internally only. Correct RTL for a given |
89045fd1 JL |
4413 | program is very dependent on the particular target machine. And the RTL |
4414 | does not contain all the information about the program. | |
4415 | ||
f0523f02 | 4416 | The proper way to interface GCC to a new language front end is with |
49a4e827 | 4417 | the ``tree'' data structure, described in the files @file{tree.h} and |
929769f4 | 4418 | @file{tree.def}. The documentation for this structure (@pxref{GENERIC}) |
49a4e827 | 4419 | is incomplete. |