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dcdf448e | 1 | /* Dwarf2 Call Frame Information helper routines. |
fbd26352 | 2 | Copyright (C) 1992-2019 Free Software Foundation, Inc. |
dcdf448e | 3 | |
4 | This file is part of GCC. | |
5 | ||
6 | GCC is free software; you can redistribute it and/or modify it under | |
7 | the terms of the GNU General Public License as published by the Free | |
8 | Software Foundation; either version 3, or (at your option) any later | |
9 | version. | |
10 | ||
11 | GCC is distributed in the hope that it will be useful, but WITHOUT ANY | |
12 | WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
13 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
14 | for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with GCC; see the file COPYING3. If not see | |
18 | <http://www.gnu.org/licenses/>. */ | |
19 | ||
20 | #include "config.h" | |
21 | #include "system.h" | |
22 | #include "coretypes.h" | |
7c29e30e | 23 | #include "target.h" |
24 | #include "function.h" | |
25 | #include "rtl.h" | |
26 | #include "tree.h" | |
27 | #include "tree-pass.h" | |
ad7b10a2 | 28 | #include "memmodel.h" |
7c29e30e | 29 | #include "tm_p.h" |
7c29e30e | 30 | #include "emit-rtl.h" |
b20a8bb4 | 31 | #include "stor-layout.h" |
94ea8568 | 32 | #include "cfgbuild.h" |
dcdf448e | 33 | #include "dwarf2out.h" |
34 | #include "dwarf2asm.h" | |
dcdf448e | 35 | #include "common/common-target.h" |
dcdf448e | 36 | |
37 | #include "except.h" /* expand_builtin_dwarf_sp_column */ | |
720cfc43 | 38 | #include "profile-count.h" /* For expr.h */ |
dcdf448e | 39 | #include "expr.h" /* init_return_column_size */ |
dcdf448e | 40 | #include "output.h" /* asm_out_file */ |
41 | #include "debug.h" /* dwarf2out_do_frame, dwarf2out_do_cfi_asm */ | |
42 | ||
43 | ||
44 | /* ??? Poison these here until it can be done generically. They've been | |
45 | totally replaced in this file; make sure it stays that way. */ | |
46 | #undef DWARF2_UNWIND_INFO | |
47 | #undef DWARF2_FRAME_INFO | |
48 | #if (GCC_VERSION >= 3000) | |
49 | #pragma GCC poison DWARF2_UNWIND_INFO DWARF2_FRAME_INFO | |
50 | #endif | |
51 | ||
52 | #ifndef INCOMING_RETURN_ADDR_RTX | |
53 | #define INCOMING_RETURN_ADDR_RTX (gcc_unreachable (), NULL_RTX) | |
54 | #endif | |
a03863ae | 55 | |
56 | #ifndef DEFAULT_INCOMING_FRAME_SP_OFFSET | |
57 | #define DEFAULT_INCOMING_FRAME_SP_OFFSET INCOMING_FRAME_SP_OFFSET | |
58 | #endif | |
dcdf448e | 59 | \f |
eb93b3f4 | 60 | /* A collected description of an entire row of the abstract CFI table. */ |
6dc50383 | 61 | struct GTY(()) dw_cfi_row |
eb93b3f4 | 62 | { |
63 | /* The expression that computes the CFA, expressed in two different ways. | |
64 | The CFA member for the simple cases, and the full CFI expression for | |
65 | the complex cases. The later will be a DW_CFA_cfa_expression. */ | |
66 | dw_cfa_location cfa; | |
67 | dw_cfi_ref cfa_cfi; | |
68 | ||
69 | /* The expressions for any register column that is saved. */ | |
70 | cfi_vec reg_save; | |
098b819f | 71 | |
72 | /* True if the register window is saved. */ | |
73 | bool window_save; | |
6dc50383 | 74 | }; |
eb93b3f4 | 75 | |
b1613fc3 | 76 | /* The caller's ORIG_REG is saved in SAVED_IN_REG. */ |
6dc50383 | 77 | struct GTY(()) reg_saved_in_data { |
b1613fc3 | 78 | rtx orig_reg; |
79 | rtx saved_in_reg; | |
6dc50383 | 80 | }; |
b1613fc3 | 81 | |
b1613fc3 | 82 | |
83 | /* Since we no longer have a proper CFG, we're going to create a facsimile | |
84 | of one on the fly while processing the frame-related insns. | |
85 | ||
97c251e4 | 86 | We create dw_trace_info structures for each extended basic block beginning |
87 | and ending at a "save point". Save points are labels, barriers, certain | |
88 | notes, and of course the beginning and end of the function. | |
b1613fc3 | 89 | |
90 | As we encounter control transfer insns, we propagate the "current" | |
97c251e4 | 91 | row state across the edges to the starts of traces. When checking is |
92 | enabled, we validate that we propagate the same data from all sources. | |
b1613fc3 | 93 | |
94 | All traces are members of the TRACE_INFO array, in the order in which | |
95 | they appear in the instruction stream. | |
96 | ||
97c251e4 | 97 | All save points are present in the TRACE_INDEX hash, mapping the insn |
98 | starting a trace to the dw_trace_info describing the trace. */ | |
b1613fc3 | 99 | |
6dc50383 | 100 | struct dw_trace_info |
b1613fc3 | 101 | { |
97c251e4 | 102 | /* The insn that begins the trace. */ |
f6d940f9 | 103 | rtx_insn *head; |
b1613fc3 | 104 | |
105 | /* The row state at the beginning and end of the trace. */ | |
97c251e4 | 106 | dw_cfi_row *beg_row, *end_row; |
107 | ||
dfe00a8f | 108 | /* Tracking for DW_CFA_GNU_args_size. The "true" sizes are those we find |
109 | while scanning insns. However, the args_size value is irrelevant at | |
110 | any point except can_throw_internal_p insns. Therefore the "delay" | |
111 | sizes the values that must actually be emitted for this trace. */ | |
f6a1fc98 | 112 | poly_int64_pod beg_true_args_size, end_true_args_size; |
113 | poly_int64_pod beg_delay_args_size, end_delay_args_size; | |
dfe00a8f | 114 | |
115 | /* The first EH insn in the trace, where beg_delay_args_size must be set. */ | |
4cd001d5 | 116 | rtx_insn *eh_head; |
dfe00a8f | 117 | |
b1613fc3 | 118 | /* The following variables contain data used in interpreting frame related |
119 | expressions. These are not part of the "real" row state as defined by | |
120 | Dwarf, but it seems like they need to be propagated into a trace in case | |
121 | frame related expressions have been sunk. */ | |
122 | /* ??? This seems fragile. These variables are fragments of a larger | |
123 | expression. If we do not keep the entire expression together, we risk | |
124 | not being able to put it together properly. Consider forcing targets | |
125 | to generate self-contained expressions and dropping all of the magic | |
126 | interpretation code in this file. Or at least refusing to shrink wrap | |
127 | any frame related insn that doesn't contain a complete expression. */ | |
128 | ||
129 | /* The register used for saving registers to the stack, and its offset | |
130 | from the CFA. */ | |
131 | dw_cfa_location cfa_store; | |
132 | ||
133 | /* A temporary register holding an integral value used in adjusting SP | |
134 | or setting up the store_reg. The "offset" field holds the integer | |
135 | value, not an offset. */ | |
136 | dw_cfa_location cfa_temp; | |
137 | ||
138 | /* A set of registers saved in other registers. This is the inverse of | |
139 | the row->reg_save info, if the entry is a DW_CFA_register. This is | |
140 | implemented as a flat array because it normally contains zero or 1 | |
141 | entry, depending on the target. IA-64 is the big spender here, using | |
142 | a maximum of 5 entries. */ | |
f1f41a6c | 143 | vec<reg_saved_in_data> regs_saved_in_regs; |
b1613fc3 | 144 | |
ce4a64fd | 145 | /* An identifier for this trace. Used only for debugging dumps. */ |
146 | unsigned id; | |
147 | ||
148 | /* True if this trace immediately follows NOTE_INSN_SWITCH_TEXT_SECTIONS. */ | |
149 | bool switch_sections; | |
dfe00a8f | 150 | |
151 | /* True if we've seen different values incoming to beg_true_args_size. */ | |
152 | bool args_size_undefined; | |
6a3756e4 | 153 | |
154 | /* True if we've seen an insn with a REG_ARGS_SIZE note before EH_HEAD. */ | |
155 | bool args_size_defined_for_eh; | |
6dc50383 | 156 | }; |
b1613fc3 | 157 | |
b1613fc3 | 158 | |
d9dd21a8 | 159 | /* Hashtable helpers. */ |
160 | ||
770ff93b | 161 | struct trace_info_hasher : nofree_ptr_hash <dw_trace_info> |
d9dd21a8 | 162 | { |
9969c043 | 163 | static inline hashval_t hash (const dw_trace_info *); |
164 | static inline bool equal (const dw_trace_info *, const dw_trace_info *); | |
d9dd21a8 | 165 | }; |
166 | ||
167 | inline hashval_t | |
9969c043 | 168 | trace_info_hasher::hash (const dw_trace_info *ti) |
d9dd21a8 | 169 | { |
170 | return INSN_UID (ti->head); | |
171 | } | |
172 | ||
173 | inline bool | |
9969c043 | 174 | trace_info_hasher::equal (const dw_trace_info *a, const dw_trace_info *b) |
d9dd21a8 | 175 | { |
176 | return a->head == b->head; | |
177 | } | |
178 | ||
179 | ||
b1613fc3 | 180 | /* The variables making up the pseudo-cfg, as described above. */ |
f1f41a6c | 181 | static vec<dw_trace_info> trace_info; |
70dd2446 | 182 | static vec<dw_trace_info *> trace_work_list; |
c1f445d2 | 183 | static hash_table<trace_info_hasher> *trace_index; |
b1613fc3 | 184 | |
dcdf448e | 185 | /* A vector of call frame insns for the CIE. */ |
186 | cfi_vec cie_cfi_vec; | |
187 | ||
eb93b3f4 | 188 | /* The state of the first row of the FDE table, which includes the |
189 | state provided by the CIE. */ | |
1b1ea44c | 190 | static GTY(()) dw_cfi_row *cie_cfi_row; |
eb93b3f4 | 191 | |
b1613fc3 | 192 | static GTY(()) reg_saved_in_data *cie_return_save; |
193 | ||
dcdf448e | 194 | static GTY(()) unsigned long dwarf2out_cfi_label_num; |
195 | ||
46346a52 | 196 | /* The insn after which a new CFI note should be emitted. */ |
c0937357 | 197 | static rtx_insn *add_cfi_insn; |
46346a52 | 198 | |
d4898332 | 199 | /* When non-null, add_cfi will add the CFI to this vector. */ |
200 | static cfi_vec *add_cfi_vec; | |
201 | ||
b1613fc3 | 202 | /* The current instruction trace. */ |
203 | static dw_trace_info *cur_trace; | |
204 | ||
205 | /* The current, i.e. most recently generated, row of the CFI table. */ | |
206 | static dw_cfi_row *cur_row; | |
207 | ||
dfe00a8f | 208 | /* A copy of the current CFA, for use during the processing of a |
209 | single insn. */ | |
210 | static dw_cfa_location *cur_cfa; | |
211 | ||
b1613fc3 | 212 | /* We delay emitting a register save until either (a) we reach the end |
213 | of the prologue or (b) the register is clobbered. This clusters | |
214 | register saves so that there are fewer pc advances. */ | |
215 | ||
6dc50383 | 216 | struct queued_reg_save { |
b1613fc3 | 217 | rtx reg; |
218 | rtx saved_reg; | |
e1b783f6 | 219 | poly_int64_pod cfa_offset; |
6dc50383 | 220 | }; |
b1613fc3 | 221 | |
b1613fc3 | 222 | |
f1f41a6c | 223 | static vec<queued_reg_save> queued_reg_saves; |
b1613fc3 | 224 | |
46346a52 | 225 | /* True if any CFI directives were emitted at the current insn. */ |
226 | static bool any_cfis_emitted; | |
26a649dd | 227 | |
228 | /* Short-hand for commonly used register numbers. */ | |
229 | static unsigned dw_stack_pointer_regnum; | |
230 | static unsigned dw_frame_pointer_regnum; | |
dcdf448e | 231 | \f |
232 | /* Hook used by __throw. */ | |
233 | ||
234 | rtx | |
235 | expand_builtin_dwarf_sp_column (void) | |
236 | { | |
26a649dd | 237 | unsigned int dwarf_regnum = DWARF_FRAME_REGNUM (STACK_POINTER_REGNUM); |
dcdf448e | 238 | return GEN_INT (DWARF2_FRAME_REG_OUT (dwarf_regnum, 1)); |
239 | } | |
240 | ||
241 | /* MEM is a memory reference for the register size table, each element of | |
242 | which has mode MODE. Initialize column C as a return address column. */ | |
243 | ||
244 | static void | |
f77c4496 | 245 | init_return_column_size (scalar_int_mode mode, rtx mem, unsigned int c) |
dcdf448e | 246 | { |
247 | HOST_WIDE_INT offset = c * GET_MODE_SIZE (mode); | |
248 | HOST_WIDE_INT size = GET_MODE_SIZE (Pmode); | |
d11aedc7 | 249 | emit_move_insn (adjust_address (mem, mode, offset), |
250 | gen_int_mode (size, mode)); | |
dcdf448e | 251 | } |
252 | ||
4fd39f13 | 253 | /* Datastructure used by expand_builtin_init_dwarf_reg_sizes and |
254 | init_one_dwarf_reg_size to communicate on what has been done by the | |
255 | latter. */ | |
256 | ||
6dc50383 | 257 | struct init_one_dwarf_reg_state |
4fd39f13 | 258 | { |
259 | /* Whether the dwarf return column was initialized. */ | |
260 | bool wrote_return_column; | |
261 | ||
262 | /* For each hard register REGNO, whether init_one_dwarf_reg_size | |
263 | was given REGNO to process already. */ | |
264 | bool processed_regno [FIRST_PSEUDO_REGISTER]; | |
265 | ||
6dc50383 | 266 | }; |
4fd39f13 | 267 | |
268 | /* Helper for expand_builtin_init_dwarf_reg_sizes. Generate code to | |
269 | initialize the dwarf register size table entry corresponding to register | |
270 | REGNO in REGMODE. TABLE is the table base address, SLOTMODE is the mode to | |
271 | use for the size entry to initialize, and INIT_STATE is the communication | |
272 | datastructure conveying what we're doing to our caller. */ | |
273 | ||
274 | static | |
275 | void init_one_dwarf_reg_size (int regno, machine_mode regmode, | |
276 | rtx table, machine_mode slotmode, | |
277 | init_one_dwarf_reg_state *init_state) | |
278 | { | |
279 | const unsigned int dnum = DWARF_FRAME_REGNUM (regno); | |
280 | const unsigned int rnum = DWARF2_FRAME_REG_OUT (dnum, 1); | |
c0235a33 | 281 | const unsigned int dcol = DWARF_REG_TO_UNWIND_COLUMN (rnum); |
4fd39f13 | 282 | |
52acb7ae | 283 | poly_int64 slotoffset = dcol * GET_MODE_SIZE (slotmode); |
284 | poly_int64 regsize = GET_MODE_SIZE (regmode); | |
4fd39f13 | 285 | |
286 | init_state->processed_regno[regno] = true; | |
287 | ||
288 | if (rnum >= DWARF_FRAME_REGISTERS) | |
289 | return; | |
290 | ||
291 | if (dnum == DWARF_FRAME_RETURN_COLUMN) | |
292 | { | |
293 | if (regmode == VOIDmode) | |
294 | return; | |
295 | init_state->wrote_return_column = true; | |
296 | } | |
297 | ||
52acb7ae | 298 | /* ??? When is this true? Should it be a test based on DCOL instead? */ |
299 | if (maybe_lt (slotoffset, 0)) | |
4fd39f13 | 300 | return; |
301 | ||
302 | emit_move_insn (adjust_address (table, slotmode, slotoffset), | |
303 | gen_int_mode (regsize, slotmode)); | |
304 | } | |
305 | ||
306 | /* Generate code to initialize the dwarf register size table located | |
307 | at the provided ADDRESS. */ | |
dcdf448e | 308 | |
309 | void | |
310 | expand_builtin_init_dwarf_reg_sizes (tree address) | |
311 | { | |
312 | unsigned int i; | |
03b7a719 | 313 | scalar_int_mode mode = SCALAR_INT_TYPE_MODE (char_type_node); |
dcdf448e | 314 | rtx addr = expand_normal (address); |
315 | rtx mem = gen_rtx_MEM (BLKmode, addr); | |
4fd39f13 | 316 | |
317 | init_one_dwarf_reg_state init_state; | |
318 | ||
319 | memset ((char *)&init_state, 0, sizeof (init_state)); | |
dcdf448e | 320 | |
321 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
322 | { | |
4fd39f13 | 323 | machine_mode save_mode; |
324 | rtx span; | |
dcdf448e | 325 | |
4fd39f13 | 326 | /* No point in processing a register multiple times. This could happen |
327 | with register spans, e.g. when a reg is first processed as a piece of | |
328 | a span, then as a register on its own later on. */ | |
329 | ||
330 | if (init_state.processed_regno[i]) | |
331 | continue; | |
332 | ||
333 | save_mode = targetm.dwarf_frame_reg_mode (i); | |
334 | span = targetm.dwarf_register_span (gen_rtx_REG (save_mode, i)); | |
dcdf448e | 335 | |
4fd39f13 | 336 | if (!span) |
337 | init_one_dwarf_reg_size (i, save_mode, mem, mode, &init_state); | |
338 | else | |
339 | { | |
340 | for (int si = 0; si < XVECLEN (span, 0); si++) | |
dcdf448e | 341 | { |
4fd39f13 | 342 | rtx reg = XVECEXP (span, 0, si); |
dcdf448e | 343 | |
4fd39f13 | 344 | init_one_dwarf_reg_size |
345 | (REGNO (reg), GET_MODE (reg), mem, mode, &init_state); | |
346 | } | |
dcdf448e | 347 | } |
348 | } | |
349 | ||
4fd39f13 | 350 | if (!init_state.wrote_return_column) |
dcdf448e | 351 | init_return_column_size (mode, mem, DWARF_FRAME_RETURN_COLUMN); |
352 | ||
353 | #ifdef DWARF_ALT_FRAME_RETURN_COLUMN | |
354 | init_return_column_size (mode, mem, DWARF_ALT_FRAME_RETURN_COLUMN); | |
355 | #endif | |
356 | ||
357 | targetm.init_dwarf_reg_sizes_extra (address); | |
358 | } | |
359 | ||
97c251e4 | 360 | \f |
97c251e4 | 361 | static dw_trace_info * |
f6d940f9 | 362 | get_trace_info (rtx_insn *insn) |
97c251e4 | 363 | { |
364 | dw_trace_info dummy; | |
365 | dummy.head = insn; | |
c1f445d2 | 366 | return trace_index->find_with_hash (&dummy, INSN_UID (insn)); |
97c251e4 | 367 | } |
368 | ||
369 | static bool | |
f6d940f9 | 370 | save_point_p (rtx_insn *insn) |
97c251e4 | 371 | { |
372 | /* Labels, except those that are really jump tables. */ | |
373 | if (LABEL_P (insn)) | |
374 | return inside_basic_block_p (insn); | |
375 | ||
376 | /* We split traces at the prologue/epilogue notes because those | |
377 | are points at which the unwind info is usually stable. This | |
378 | makes it easier to find spots with identical unwind info so | |
379 | that we can use remember/restore_state opcodes. */ | |
380 | if (NOTE_P (insn)) | |
381 | switch (NOTE_KIND (insn)) | |
382 | { | |
383 | case NOTE_INSN_PROLOGUE_END: | |
384 | case NOTE_INSN_EPILOGUE_BEG: | |
385 | return true; | |
386 | } | |
387 | ||
388 | return false; | |
389 | } | |
390 | ||
dcdf448e | 391 | /* Divide OFF by DWARF_CIE_DATA_ALIGNMENT, asserting no remainder. */ |
392 | ||
393 | static inline HOST_WIDE_INT | |
394 | div_data_align (HOST_WIDE_INT off) | |
395 | { | |
396 | HOST_WIDE_INT r = off / DWARF_CIE_DATA_ALIGNMENT; | |
397 | gcc_assert (r * DWARF_CIE_DATA_ALIGNMENT == off); | |
398 | return r; | |
399 | } | |
400 | ||
401 | /* Return true if we need a signed version of a given opcode | |
402 | (e.g. DW_CFA_offset_extended_sf vs DW_CFA_offset_extended). */ | |
403 | ||
404 | static inline bool | |
405 | need_data_align_sf_opcode (HOST_WIDE_INT off) | |
406 | { | |
407 | return DWARF_CIE_DATA_ALIGNMENT < 0 ? off > 0 : off < 0; | |
408 | } | |
409 | ||
410 | /* Return a pointer to a newly allocated Call Frame Instruction. */ | |
411 | ||
412 | static inline dw_cfi_ref | |
413 | new_cfi (void) | |
414 | { | |
25a27413 | 415 | dw_cfi_ref cfi = ggc_alloc<dw_cfi_node> (); |
dcdf448e | 416 | |
417 | cfi->dw_cfi_oprnd1.dw_cfi_reg_num = 0; | |
418 | cfi->dw_cfi_oprnd2.dw_cfi_reg_num = 0; | |
419 | ||
420 | return cfi; | |
421 | } | |
422 | ||
eb93b3f4 | 423 | /* Return a newly allocated CFI row, with no defined data. */ |
424 | ||
1b1ea44c | 425 | static dw_cfi_row * |
eb93b3f4 | 426 | new_cfi_row (void) |
427 | { | |
25a27413 | 428 | dw_cfi_row *row = ggc_cleared_alloc<dw_cfi_row> (); |
eb93b3f4 | 429 | |
430 | row->cfa.reg = INVALID_REGNUM; | |
431 | ||
432 | return row; | |
433 | } | |
434 | ||
435 | /* Return a copy of an existing CFI row. */ | |
436 | ||
1b1ea44c | 437 | static dw_cfi_row * |
438 | copy_cfi_row (dw_cfi_row *src) | |
eb93b3f4 | 439 | { |
25a27413 | 440 | dw_cfi_row *dst = ggc_alloc<dw_cfi_row> (); |
eb93b3f4 | 441 | |
442 | *dst = *src; | |
f1f41a6c | 443 | dst->reg_save = vec_safe_copy (src->reg_save); |
eb93b3f4 | 444 | |
445 | return dst; | |
446 | } | |
447 | ||
e1b783f6 | 448 | /* Return a copy of an existing CFA location. */ |
449 | ||
450 | static dw_cfa_location * | |
451 | copy_cfa (dw_cfa_location *src) | |
452 | { | |
453 | dw_cfa_location *dst = ggc_alloc<dw_cfa_location> (); | |
454 | *dst = *src; | |
455 | return dst; | |
456 | } | |
457 | ||
c746c5c3 | 458 | /* Generate a new label for the CFI info to refer to. */ |
dcdf448e | 459 | |
460 | static char * | |
c746c5c3 | 461 | dwarf2out_cfi_label (void) |
dcdf448e | 462 | { |
c746c5c3 | 463 | int num = dwarf2out_cfi_label_num++; |
464 | char label[20]; | |
dcdf448e | 465 | |
c746c5c3 | 466 | ASM_GENERATE_INTERNAL_LABEL (label, "LCFI", num); |
dcdf448e | 467 | |
c746c5c3 | 468 | return xstrdup (label); |
dcdf448e | 469 | } |
470 | ||
d4898332 | 471 | /* Add CFI either to the current insn stream or to a vector, or both. */ |
dcdf448e | 472 | |
473 | static void | |
d4898332 | 474 | add_cfi (dw_cfi_ref cfi) |
dcdf448e | 475 | { |
c746c5c3 | 476 | any_cfis_emitted = true; |
7b1c31a0 | 477 | |
478 | if (add_cfi_insn != NULL) | |
dcdf448e | 479 | { |
7b1c31a0 | 480 | add_cfi_insn = emit_note_after (NOTE_INSN_CFI, add_cfi_insn); |
481 | NOTE_CFI (add_cfi_insn) = cfi; | |
dcdf448e | 482 | } |
7b1c31a0 | 483 | |
d4898332 | 484 | if (add_cfi_vec != NULL) |
f1f41a6c | 485 | vec_safe_push (*add_cfi_vec, cfi); |
dcdf448e | 486 | } |
487 | ||
0b3b5cad | 488 | static void |
f6a1fc98 | 489 | add_cfi_args_size (poly_int64 size) |
0b3b5cad | 490 | { |
f6a1fc98 | 491 | /* We don't yet have a representation for polynomial sizes. */ |
492 | HOST_WIDE_INT const_size = size.to_constant (); | |
493 | ||
0b3b5cad | 494 | dw_cfi_ref cfi = new_cfi (); |
495 | ||
dfe00a8f | 496 | /* While we can occasionally have args_size < 0 internally, this state |
497 | should not persist at a point we actually need an opcode. */ | |
f6a1fc98 | 498 | gcc_assert (const_size >= 0); |
dfe00a8f | 499 | |
0b3b5cad | 500 | cfi->dw_cfi_opc = DW_CFA_GNU_args_size; |
f6a1fc98 | 501 | cfi->dw_cfi_oprnd1.dw_cfi_offset = const_size; |
0b3b5cad | 502 | |
503 | add_cfi (cfi); | |
504 | } | |
505 | ||
506 | static void | |
507 | add_cfi_restore (unsigned reg) | |
508 | { | |
509 | dw_cfi_ref cfi = new_cfi (); | |
510 | ||
511 | cfi->dw_cfi_opc = (reg & ~0x3f ? DW_CFA_restore_extended : DW_CFA_restore); | |
512 | cfi->dw_cfi_oprnd1.dw_cfi_reg_num = reg; | |
513 | ||
514 | add_cfi (cfi); | |
515 | } | |
516 | ||
e9fe542d | 517 | /* Perform ROW->REG_SAVE[COLUMN] = CFI. CFI may be null, indicating |
518 | that the register column is no longer saved. */ | |
519 | ||
520 | static void | |
1b1ea44c | 521 | update_row_reg_save (dw_cfi_row *row, unsigned column, dw_cfi_ref cfi) |
e9fe542d | 522 | { |
f1f41a6c | 523 | if (vec_safe_length (row->reg_save) <= column) |
524 | vec_safe_grow_cleared (row->reg_save, column + 1); | |
525 | (*row->reg_save)[column] = cfi; | |
e9fe542d | 526 | } |
527 | ||
dcdf448e | 528 | /* This function fills in aa dw_cfa_location structure from a dwarf location |
529 | descriptor sequence. */ | |
530 | ||
531 | static void | |
b3e7c666 | 532 | get_cfa_from_loc_descr (dw_cfa_location *cfa, struct dw_loc_descr_node *loc) |
dcdf448e | 533 | { |
b3e7c666 | 534 | struct dw_loc_descr_node *ptr; |
dcdf448e | 535 | cfa->offset = 0; |
536 | cfa->base_offset = 0; | |
537 | cfa->indirect = 0; | |
538 | cfa->reg = -1; | |
539 | ||
540 | for (ptr = loc; ptr != NULL; ptr = ptr->dw_loc_next) | |
541 | { | |
542 | enum dwarf_location_atom op = ptr->dw_loc_opc; | |
543 | ||
544 | switch (op) | |
545 | { | |
546 | case DW_OP_reg0: | |
547 | case DW_OP_reg1: | |
548 | case DW_OP_reg2: | |
549 | case DW_OP_reg3: | |
550 | case DW_OP_reg4: | |
551 | case DW_OP_reg5: | |
552 | case DW_OP_reg6: | |
553 | case DW_OP_reg7: | |
554 | case DW_OP_reg8: | |
555 | case DW_OP_reg9: | |
556 | case DW_OP_reg10: | |
557 | case DW_OP_reg11: | |
558 | case DW_OP_reg12: | |
559 | case DW_OP_reg13: | |
560 | case DW_OP_reg14: | |
561 | case DW_OP_reg15: | |
562 | case DW_OP_reg16: | |
563 | case DW_OP_reg17: | |
564 | case DW_OP_reg18: | |
565 | case DW_OP_reg19: | |
566 | case DW_OP_reg20: | |
567 | case DW_OP_reg21: | |
568 | case DW_OP_reg22: | |
569 | case DW_OP_reg23: | |
570 | case DW_OP_reg24: | |
571 | case DW_OP_reg25: | |
572 | case DW_OP_reg26: | |
573 | case DW_OP_reg27: | |
574 | case DW_OP_reg28: | |
575 | case DW_OP_reg29: | |
576 | case DW_OP_reg30: | |
577 | case DW_OP_reg31: | |
578 | cfa->reg = op - DW_OP_reg0; | |
579 | break; | |
580 | case DW_OP_regx: | |
581 | cfa->reg = ptr->dw_loc_oprnd1.v.val_int; | |
582 | break; | |
583 | case DW_OP_breg0: | |
584 | case DW_OP_breg1: | |
585 | case DW_OP_breg2: | |
586 | case DW_OP_breg3: | |
587 | case DW_OP_breg4: | |
588 | case DW_OP_breg5: | |
589 | case DW_OP_breg6: | |
590 | case DW_OP_breg7: | |
591 | case DW_OP_breg8: | |
592 | case DW_OP_breg9: | |
593 | case DW_OP_breg10: | |
594 | case DW_OP_breg11: | |
595 | case DW_OP_breg12: | |
596 | case DW_OP_breg13: | |
597 | case DW_OP_breg14: | |
598 | case DW_OP_breg15: | |
599 | case DW_OP_breg16: | |
600 | case DW_OP_breg17: | |
601 | case DW_OP_breg18: | |
602 | case DW_OP_breg19: | |
603 | case DW_OP_breg20: | |
604 | case DW_OP_breg21: | |
605 | case DW_OP_breg22: | |
606 | case DW_OP_breg23: | |
607 | case DW_OP_breg24: | |
608 | case DW_OP_breg25: | |
609 | case DW_OP_breg26: | |
610 | case DW_OP_breg27: | |
611 | case DW_OP_breg28: | |
612 | case DW_OP_breg29: | |
613 | case DW_OP_breg30: | |
614 | case DW_OP_breg31: | |
615 | cfa->reg = op - DW_OP_breg0; | |
616 | cfa->base_offset = ptr->dw_loc_oprnd1.v.val_int; | |
617 | break; | |
618 | case DW_OP_bregx: | |
619 | cfa->reg = ptr->dw_loc_oprnd1.v.val_int; | |
620 | cfa->base_offset = ptr->dw_loc_oprnd2.v.val_int; | |
621 | break; | |
622 | case DW_OP_deref: | |
623 | cfa->indirect = 1; | |
624 | break; | |
625 | case DW_OP_plus_uconst: | |
626 | cfa->offset = ptr->dw_loc_oprnd1.v.val_unsigned; | |
627 | break; | |
628 | default: | |
629 | gcc_unreachable (); | |
630 | } | |
631 | } | |
632 | } | |
633 | ||
4a7a4715 | 634 | /* Find the previous value for the CFA, iteratively. CFI is the opcode |
635 | to interpret, *LOC will be updated as necessary, *REMEMBER is used for | |
636 | one level of remember/restore state processing. */ | |
dcdf448e | 637 | |
638 | void | |
639 | lookup_cfa_1 (dw_cfi_ref cfi, dw_cfa_location *loc, dw_cfa_location *remember) | |
640 | { | |
641 | switch (cfi->dw_cfi_opc) | |
642 | { | |
643 | case DW_CFA_def_cfa_offset: | |
644 | case DW_CFA_def_cfa_offset_sf: | |
645 | loc->offset = cfi->dw_cfi_oprnd1.dw_cfi_offset; | |
646 | break; | |
647 | case DW_CFA_def_cfa_register: | |
648 | loc->reg = cfi->dw_cfi_oprnd1.dw_cfi_reg_num; | |
649 | break; | |
650 | case DW_CFA_def_cfa: | |
651 | case DW_CFA_def_cfa_sf: | |
652 | loc->reg = cfi->dw_cfi_oprnd1.dw_cfi_reg_num; | |
653 | loc->offset = cfi->dw_cfi_oprnd2.dw_cfi_offset; | |
654 | break; | |
655 | case DW_CFA_def_cfa_expression: | |
e1b783f6 | 656 | if (cfi->dw_cfi_oprnd2.dw_cfi_cfa_loc) |
657 | *loc = *cfi->dw_cfi_oprnd2.dw_cfi_cfa_loc; | |
658 | else | |
659 | get_cfa_from_loc_descr (loc, cfi->dw_cfi_oprnd1.dw_cfi_loc); | |
dcdf448e | 660 | break; |
661 | ||
662 | case DW_CFA_remember_state: | |
663 | gcc_assert (!remember->in_use); | |
664 | *remember = *loc; | |
665 | remember->in_use = 1; | |
666 | break; | |
667 | case DW_CFA_restore_state: | |
668 | gcc_assert (remember->in_use); | |
669 | *loc = *remember; | |
670 | remember->in_use = 0; | |
671 | break; | |
672 | ||
673 | default: | |
674 | break; | |
675 | } | |
676 | } | |
677 | ||
dcdf448e | 678 | /* Determine if two dw_cfa_location structures define the same data. */ |
679 | ||
680 | bool | |
681 | cfa_equal_p (const dw_cfa_location *loc1, const dw_cfa_location *loc2) | |
682 | { | |
683 | return (loc1->reg == loc2->reg | |
e1b783f6 | 684 | && known_eq (loc1->offset, loc2->offset) |
dcdf448e | 685 | && loc1->indirect == loc2->indirect |
686 | && (loc1->indirect == 0 | |
e1b783f6 | 687 | || known_eq (loc1->base_offset, loc2->base_offset))); |
dcdf448e | 688 | } |
689 | ||
0b3b5cad | 690 | /* Determine if two CFI operands are identical. */ |
dcdf448e | 691 | |
0b3b5cad | 692 | static bool |
693 | cfi_oprnd_equal_p (enum dw_cfi_oprnd_type t, dw_cfi_oprnd *a, dw_cfi_oprnd *b) | |
dcdf448e | 694 | { |
0b3b5cad | 695 | switch (t) |
696 | { | |
697 | case dw_cfi_oprnd_unused: | |
698 | return true; | |
699 | case dw_cfi_oprnd_reg_num: | |
700 | return a->dw_cfi_reg_num == b->dw_cfi_reg_num; | |
701 | case dw_cfi_oprnd_offset: | |
702 | return a->dw_cfi_offset == b->dw_cfi_offset; | |
703 | case dw_cfi_oprnd_addr: | |
704 | return (a->dw_cfi_addr == b->dw_cfi_addr | |
705 | || strcmp (a->dw_cfi_addr, b->dw_cfi_addr) == 0); | |
706 | case dw_cfi_oprnd_loc: | |
707 | return loc_descr_equal_p (a->dw_cfi_loc, b->dw_cfi_loc); | |
e1b783f6 | 708 | case dw_cfi_oprnd_cfa_loc: |
709 | return cfa_equal_p (a->dw_cfi_cfa_loc, b->dw_cfi_cfa_loc); | |
0b3b5cad | 710 | } |
711 | gcc_unreachable (); | |
712 | } | |
dcdf448e | 713 | |
0b3b5cad | 714 | /* Determine if two CFI entries are identical. */ |
715 | ||
716 | static bool | |
717 | cfi_equal_p (dw_cfi_ref a, dw_cfi_ref b) | |
718 | { | |
719 | enum dwarf_call_frame_info opc; | |
720 | ||
721 | /* Make things easier for our callers, including missing operands. */ | |
722 | if (a == b) | |
723 | return true; | |
724 | if (a == NULL || b == NULL) | |
725 | return false; | |
726 | ||
727 | /* Obviously, the opcodes must match. */ | |
728 | opc = a->dw_cfi_opc; | |
729 | if (opc != b->dw_cfi_opc) | |
730 | return false; | |
731 | ||
732 | /* Compare the two operands, re-using the type of the operands as | |
733 | already exposed elsewhere. */ | |
734 | return (cfi_oprnd_equal_p (dw_cfi_oprnd1_desc (opc), | |
735 | &a->dw_cfi_oprnd1, &b->dw_cfi_oprnd1) | |
736 | && cfi_oprnd_equal_p (dw_cfi_oprnd2_desc (opc), | |
737 | &a->dw_cfi_oprnd2, &b->dw_cfi_oprnd2)); | |
738 | } | |
739 | ||
97c251e4 | 740 | /* Determine if two CFI_ROW structures are identical. */ |
741 | ||
742 | static bool | |
743 | cfi_row_equal_p (dw_cfi_row *a, dw_cfi_row *b) | |
744 | { | |
745 | size_t i, n_a, n_b, n_max; | |
746 | ||
747 | if (a->cfa_cfi) | |
748 | { | |
749 | if (!cfi_equal_p (a->cfa_cfi, b->cfa_cfi)) | |
750 | return false; | |
751 | } | |
752 | else if (!cfa_equal_p (&a->cfa, &b->cfa)) | |
753 | return false; | |
754 | ||
f1f41a6c | 755 | n_a = vec_safe_length (a->reg_save); |
756 | n_b = vec_safe_length (b->reg_save); | |
97c251e4 | 757 | n_max = MAX (n_a, n_b); |
758 | ||
759 | for (i = 0; i < n_max; ++i) | |
760 | { | |
761 | dw_cfi_ref r_a = NULL, r_b = NULL; | |
762 | ||
763 | if (i < n_a) | |
f1f41a6c | 764 | r_a = (*a->reg_save)[i]; |
97c251e4 | 765 | if (i < n_b) |
f1f41a6c | 766 | r_b = (*b->reg_save)[i]; |
97c251e4 | 767 | |
768 | if (!cfi_equal_p (r_a, r_b)) | |
769 | return false; | |
770 | } | |
771 | ||
098b819f | 772 | if (a->window_save != b->window_save) |
773 | return false; | |
774 | ||
97c251e4 | 775 | return true; |
776 | } | |
777 | ||
0b3b5cad | 778 | /* The CFA is now calculated from NEW_CFA. Consider OLD_CFA in determining |
779 | what opcode to emit. Returns the CFI opcode to effect the change, or | |
780 | NULL if NEW_CFA == OLD_CFA. */ | |
781 | ||
782 | static dw_cfi_ref | |
783 | def_cfa_0 (dw_cfa_location *old_cfa, dw_cfa_location *new_cfa) | |
784 | { | |
785 | dw_cfi_ref cfi; | |
dcdf448e | 786 | |
dcdf448e | 787 | /* If nothing changed, no need to issue any call frame instructions. */ |
0b3b5cad | 788 | if (cfa_equal_p (old_cfa, new_cfa)) |
789 | return NULL; | |
dcdf448e | 790 | |
791 | cfi = new_cfi (); | |
792 | ||
e1b783f6 | 793 | HOST_WIDE_INT const_offset; |
794 | if (new_cfa->reg == old_cfa->reg | |
795 | && !new_cfa->indirect | |
796 | && !old_cfa->indirect | |
797 | && new_cfa->offset.is_constant (&const_offset)) | |
dcdf448e | 798 | { |
799 | /* Construct a "DW_CFA_def_cfa_offset <offset>" instruction, indicating | |
800 | the CFA register did not change but the offset did. The data | |
801 | factoring for DW_CFA_def_cfa_offset_sf happens in output_cfi, or | |
802 | in the assembler via the .cfi_def_cfa_offset directive. */ | |
e1b783f6 | 803 | if (const_offset < 0) |
dcdf448e | 804 | cfi->dw_cfi_opc = DW_CFA_def_cfa_offset_sf; |
805 | else | |
806 | cfi->dw_cfi_opc = DW_CFA_def_cfa_offset; | |
e1b783f6 | 807 | cfi->dw_cfi_oprnd1.dw_cfi_offset = const_offset; |
dcdf448e | 808 | } |
e1b783f6 | 809 | else if (new_cfa->offset.is_constant () |
810 | && known_eq (new_cfa->offset, old_cfa->offset) | |
0b3b5cad | 811 | && old_cfa->reg != INVALID_REGNUM |
812 | && !new_cfa->indirect | |
813 | && !old_cfa->indirect) | |
dcdf448e | 814 | { |
815 | /* Construct a "DW_CFA_def_cfa_register <register>" instruction, | |
816 | indicating the CFA register has changed to <register> but the | |
e1b783f6 | 817 | offset has not changed. This requires the old CFA to have |
818 | been set as a register plus offset rather than a general | |
819 | DW_CFA_def_cfa_expression. */ | |
dcdf448e | 820 | cfi->dw_cfi_opc = DW_CFA_def_cfa_register; |
0b3b5cad | 821 | cfi->dw_cfi_oprnd1.dw_cfi_reg_num = new_cfa->reg; |
dcdf448e | 822 | } |
e1b783f6 | 823 | else if (new_cfa->indirect == 0 |
824 | && new_cfa->offset.is_constant (&const_offset)) | |
dcdf448e | 825 | { |
826 | /* Construct a "DW_CFA_def_cfa <register> <offset>" instruction, | |
827 | indicating the CFA register has changed to <register> with | |
828 | the specified offset. The data factoring for DW_CFA_def_cfa_sf | |
829 | happens in output_cfi, or in the assembler via the .cfi_def_cfa | |
830 | directive. */ | |
e1b783f6 | 831 | if (const_offset < 0) |
dcdf448e | 832 | cfi->dw_cfi_opc = DW_CFA_def_cfa_sf; |
833 | else | |
834 | cfi->dw_cfi_opc = DW_CFA_def_cfa; | |
0b3b5cad | 835 | cfi->dw_cfi_oprnd1.dw_cfi_reg_num = new_cfa->reg; |
e1b783f6 | 836 | cfi->dw_cfi_oprnd2.dw_cfi_offset = const_offset; |
dcdf448e | 837 | } |
838 | else | |
839 | { | |
840 | /* Construct a DW_CFA_def_cfa_expression instruction to | |
841 | calculate the CFA using a full location expression since no | |
842 | register-offset pair is available. */ | |
b3e7c666 | 843 | struct dw_loc_descr_node *loc_list; |
dcdf448e | 844 | |
845 | cfi->dw_cfi_opc = DW_CFA_def_cfa_expression; | |
0b3b5cad | 846 | loc_list = build_cfa_loc (new_cfa, 0); |
dcdf448e | 847 | cfi->dw_cfi_oprnd1.dw_cfi_loc = loc_list; |
e1b783f6 | 848 | if (!new_cfa->offset.is_constant () |
849 | || !new_cfa->base_offset.is_constant ()) | |
850 | /* It's hard to reconstruct the CFA location for a polynomial | |
851 | expression, so just cache it instead. */ | |
852 | cfi->dw_cfi_oprnd2.dw_cfi_cfa_loc = copy_cfa (new_cfa); | |
853 | else | |
854 | cfi->dw_cfi_oprnd2.dw_cfi_cfa_loc = NULL; | |
dcdf448e | 855 | } |
856 | ||
0b3b5cad | 857 | return cfi; |
858 | } | |
859 | ||
860 | /* Similarly, but take OLD_CFA from CUR_ROW, and update it after the fact. */ | |
861 | ||
862 | static void | |
863 | def_cfa_1 (dw_cfa_location *new_cfa) | |
864 | { | |
865 | dw_cfi_ref cfi; | |
866 | ||
b1613fc3 | 867 | if (cur_trace->cfa_store.reg == new_cfa->reg && new_cfa->indirect == 0) |
868 | cur_trace->cfa_store.offset = new_cfa->offset; | |
0b3b5cad | 869 | |
870 | cfi = def_cfa_0 (&cur_row->cfa, new_cfa); | |
871 | if (cfi) | |
872 | { | |
873 | cur_row->cfa = *new_cfa; | |
a5c6cfdd | 874 | cur_row->cfa_cfi = (cfi->dw_cfi_opc == DW_CFA_def_cfa_expression |
875 | ? cfi : NULL); | |
0b3b5cad | 876 | |
877 | add_cfi (cfi); | |
878 | } | |
dcdf448e | 879 | } |
880 | ||
881 | /* Add the CFI for saving a register. REG is the CFA column number. | |
dcdf448e | 882 | If SREG is -1, the register is saved at OFFSET from the CFA; |
883 | otherwise it is saved in SREG. */ | |
884 | ||
885 | static void | |
e1b783f6 | 886 | reg_save (unsigned int reg, unsigned int sreg, poly_int64 offset) |
dcdf448e | 887 | { |
d4898332 | 888 | dw_fde_ref fde = cfun ? cfun->fde : NULL; |
dcdf448e | 889 | dw_cfi_ref cfi = new_cfi (); |
dcdf448e | 890 | |
891 | cfi->dw_cfi_oprnd1.dw_cfi_reg_num = reg; | |
892 | ||
e1b783f6 | 893 | if (sreg == INVALID_REGNUM) |
dcdf448e | 894 | { |
e1b783f6 | 895 | HOST_WIDE_INT const_offset; |
896 | /* When stack is aligned, store REG using DW_CFA_expression with FP. */ | |
897 | if (fde && fde->stack_realign) | |
898 | { | |
899 | cfi->dw_cfi_opc = DW_CFA_expression; | |
900 | cfi->dw_cfi_oprnd1.dw_cfi_reg_num = reg; | |
901 | cfi->dw_cfi_oprnd2.dw_cfi_loc | |
902 | = build_cfa_aligned_loc (&cur_row->cfa, offset, | |
903 | fde->stack_realignment); | |
904 | } | |
905 | else if (offset.is_constant (&const_offset)) | |
906 | { | |
907 | if (need_data_align_sf_opcode (const_offset)) | |
908 | cfi->dw_cfi_opc = DW_CFA_offset_extended_sf; | |
909 | else if (reg & ~0x3f) | |
910 | cfi->dw_cfi_opc = DW_CFA_offset_extended; | |
911 | else | |
912 | cfi->dw_cfi_opc = DW_CFA_offset; | |
913 | cfi->dw_cfi_oprnd2.dw_cfi_offset = const_offset; | |
914 | } | |
dcdf448e | 915 | else |
e1b783f6 | 916 | { |
917 | cfi->dw_cfi_opc = DW_CFA_expression; | |
918 | cfi->dw_cfi_oprnd1.dw_cfi_reg_num = reg; | |
919 | cfi->dw_cfi_oprnd2.dw_cfi_loc | |
920 | = build_cfa_loc (&cur_row->cfa, offset); | |
921 | } | |
dcdf448e | 922 | } |
923 | else if (sreg == reg) | |
e9fe542d | 924 | { |
925 | /* While we could emit something like DW_CFA_same_value or | |
926 | DW_CFA_restore, we never expect to see something like that | |
927 | in a prologue. This is more likely to be a bug. A backend | |
928 | can always bypass this by using REG_CFA_RESTORE directly. */ | |
929 | gcc_unreachable (); | |
930 | } | |
dcdf448e | 931 | else |
932 | { | |
933 | cfi->dw_cfi_opc = DW_CFA_register; | |
934 | cfi->dw_cfi_oprnd2.dw_cfi_reg_num = sreg; | |
935 | } | |
936 | ||
d4898332 | 937 | add_cfi (cfi); |
e9fe542d | 938 | update_row_reg_save (cur_row, reg, cfi); |
dcdf448e | 939 | } |
940 | ||
dfe00a8f | 941 | /* A subroutine of scan_trace. Check INSN for a REG_ARGS_SIZE note |
942 | and adjust data structures to match. */ | |
dcdf448e | 943 | |
944 | static void | |
bfc53c49 | 945 | notice_args_size (rtx_insn *insn) |
dcdf448e | 946 | { |
f6a1fc98 | 947 | poly_int64 args_size, delta; |
dfe00a8f | 948 | rtx note; |
dcdf448e | 949 | |
dfe00a8f | 950 | note = find_reg_note (insn, REG_ARGS_SIZE, NULL); |
951 | if (note == NULL) | |
952 | return; | |
eb93b3f4 | 953 | |
6a3756e4 | 954 | if (!cur_trace->eh_head) |
955 | cur_trace->args_size_defined_for_eh = true; | |
956 | ||
f6a1fc98 | 957 | args_size = get_args_size (note); |
dfe00a8f | 958 | delta = args_size - cur_trace->end_true_args_size; |
f6a1fc98 | 959 | if (known_eq (delta, 0)) |
dfe00a8f | 960 | return; |
dcdf448e | 961 | |
dfe00a8f | 962 | cur_trace->end_true_args_size = args_size; |
b1613fc3 | 963 | |
dfe00a8f | 964 | /* If the CFA is computed off the stack pointer, then we must adjust |
965 | the computation of the CFA as well. */ | |
966 | if (cur_cfa->reg == dw_stack_pointer_regnum) | |
967 | { | |
968 | gcc_assert (!cur_cfa->indirect); | |
dcdf448e | 969 | |
dfe00a8f | 970 | /* Convert a change in args_size (always a positive in the |
971 | direction of stack growth) to a change in stack pointer. */ | |
3764c94e | 972 | if (!STACK_GROWS_DOWNWARD) |
973 | delta = -delta; | |
974 | ||
dfe00a8f | 975 | cur_cfa->offset += delta; |
976 | } | |
dcdf448e | 977 | } |
978 | ||
dfe00a8f | 979 | /* A subroutine of scan_trace. INSN is can_throw_internal. Update the |
980 | data within the trace related to EH insns and args_size. */ | |
dcdf448e | 981 | |
982 | static void | |
4cd001d5 | 983 | notice_eh_throw (rtx_insn *insn) |
dcdf448e | 984 | { |
f6a1fc98 | 985 | poly_int64 args_size = cur_trace->end_true_args_size; |
dfe00a8f | 986 | if (cur_trace->eh_head == NULL) |
dcdf448e | 987 | { |
dfe00a8f | 988 | cur_trace->eh_head = insn; |
989 | cur_trace->beg_delay_args_size = args_size; | |
990 | cur_trace->end_delay_args_size = args_size; | |
dcdf448e | 991 | } |
f6a1fc98 | 992 | else if (maybe_ne (cur_trace->end_delay_args_size, args_size)) |
dcdf448e | 993 | { |
dfe00a8f | 994 | cur_trace->end_delay_args_size = args_size; |
dcdf448e | 995 | |
dfe00a8f | 996 | /* ??? If the CFA is the stack pointer, search backward for the last |
997 | CFI note and insert there. Given that the stack changed for the | |
998 | args_size change, there *must* be such a note in between here and | |
999 | the last eh insn. */ | |
1000 | add_cfi_args_size (args_size); | |
1001 | } | |
dcdf448e | 1002 | } |
1003 | ||
559e966b | 1004 | /* Short-hand inline for the very common D_F_R (REGNO (x)) operation. */ |
26a649dd | 1005 | /* ??? This ought to go into dwarf2out.h, except that dwarf2out.h is |
1006 | used in places where rtl is prohibited. */ | |
559e966b | 1007 | |
1008 | static inline unsigned | |
1009 | dwf_regno (const_rtx reg) | |
1010 | { | |
561af01c | 1011 | gcc_assert (REGNO (reg) < FIRST_PSEUDO_REGISTER); |
26a649dd | 1012 | return DWARF_FRAME_REGNUM (REGNO (reg)); |
559e966b | 1013 | } |
1014 | ||
dcdf448e | 1015 | /* Compare X and Y for equivalence. The inputs may be REGs or PC_RTX. */ |
1016 | ||
1017 | static bool | |
1018 | compare_reg_or_pc (rtx x, rtx y) | |
1019 | { | |
1020 | if (REG_P (x) && REG_P (y)) | |
1021 | return REGNO (x) == REGNO (y); | |
1022 | return x == y; | |
1023 | } | |
1024 | ||
1025 | /* Record SRC as being saved in DEST. DEST may be null to delete an | |
1026 | existing entry. SRC may be a register or PC_RTX. */ | |
1027 | ||
1028 | static void | |
1029 | record_reg_saved_in_reg (rtx dest, rtx src) | |
1030 | { | |
1031 | reg_saved_in_data *elt; | |
1032 | size_t i; | |
1033 | ||
f1f41a6c | 1034 | FOR_EACH_VEC_ELT (cur_trace->regs_saved_in_regs, i, elt) |
dcdf448e | 1035 | if (compare_reg_or_pc (elt->orig_reg, src)) |
1036 | { | |
1037 | if (dest == NULL) | |
f1f41a6c | 1038 | cur_trace->regs_saved_in_regs.unordered_remove (i); |
dcdf448e | 1039 | else |
1040 | elt->saved_in_reg = dest; | |
1041 | return; | |
1042 | } | |
1043 | ||
1044 | if (dest == NULL) | |
1045 | return; | |
1046 | ||
e82e4eb5 | 1047 | reg_saved_in_data e = {src, dest}; |
f1f41a6c | 1048 | cur_trace->regs_saved_in_regs.safe_push (e); |
dcdf448e | 1049 | } |
1050 | ||
dcdf448e | 1051 | /* Add an entry to QUEUED_REG_SAVES saying that REG is now saved at |
1052 | SREG, or if SREG is NULL then it is saved at OFFSET to the CFA. */ | |
1053 | ||
1054 | static void | |
e1b783f6 | 1055 | queue_reg_save (rtx reg, rtx sreg, poly_int64 offset) |
dcdf448e | 1056 | { |
c73aa568 | 1057 | queued_reg_save *q; |
e82e4eb5 | 1058 | queued_reg_save e = {reg, sreg, offset}; |
c73aa568 | 1059 | size_t i; |
dcdf448e | 1060 | |
1061 | /* Duplicates waste space, but it's also necessary to remove them | |
6ca363a7 | 1062 | for correctness, since the queue gets output in reverse order. */ |
f1f41a6c | 1063 | FOR_EACH_VEC_ELT (queued_reg_saves, i, q) |
6ca363a7 | 1064 | if (compare_reg_or_pc (q->reg, reg)) |
e82e4eb5 | 1065 | { |
1066 | *q = e; | |
1067 | return; | |
1068 | } | |
dcdf448e | 1069 | |
f1f41a6c | 1070 | queued_reg_saves.safe_push (e); |
dcdf448e | 1071 | } |
1072 | ||
1073 | /* Output all the entries in QUEUED_REG_SAVES. */ | |
1074 | ||
1075 | static void | |
1076 | dwarf2out_flush_queued_reg_saves (void) | |
1077 | { | |
c73aa568 | 1078 | queued_reg_save *q; |
1079 | size_t i; | |
dcdf448e | 1080 | |
f1f41a6c | 1081 | FOR_EACH_VEC_ELT (queued_reg_saves, i, q) |
dcdf448e | 1082 | { |
1083 | unsigned int reg, sreg; | |
1084 | ||
1085 | record_reg_saved_in_reg (q->saved_reg, q->reg); | |
1086 | ||
6ca363a7 | 1087 | if (q->reg == pc_rtx) |
1088 | reg = DWARF_FRAME_RETURN_COLUMN; | |
1089 | else | |
559e966b | 1090 | reg = dwf_regno (q->reg); |
dcdf448e | 1091 | if (q->saved_reg) |
559e966b | 1092 | sreg = dwf_regno (q->saved_reg); |
dcdf448e | 1093 | else |
1094 | sreg = INVALID_REGNUM; | |
d4898332 | 1095 | reg_save (reg, sreg, q->cfa_offset); |
dcdf448e | 1096 | } |
1097 | ||
f1f41a6c | 1098 | queued_reg_saves.truncate (0); |
dcdf448e | 1099 | } |
1100 | ||
1101 | /* Does INSN clobber any register which QUEUED_REG_SAVES lists a saved | |
1102 | location for? Or, does it clobber a register which we've previously | |
1103 | said that some other register is saved in, and for which we now | |
1104 | have a new location for? */ | |
1105 | ||
1106 | static bool | |
1107 | clobbers_queued_reg_save (const_rtx insn) | |
1108 | { | |
c73aa568 | 1109 | queued_reg_save *q; |
1110 | size_t iq; | |
dcdf448e | 1111 | |
f1f41a6c | 1112 | FOR_EACH_VEC_ELT (queued_reg_saves, iq, q) |
dcdf448e | 1113 | { |
c73aa568 | 1114 | size_t ir; |
dcdf448e | 1115 | reg_saved_in_data *rir; |
1116 | ||
1117 | if (modified_in_p (q->reg, insn)) | |
1118 | return true; | |
1119 | ||
f1f41a6c | 1120 | FOR_EACH_VEC_ELT (cur_trace->regs_saved_in_regs, ir, rir) |
dcdf448e | 1121 | if (compare_reg_or_pc (q->reg, rir->orig_reg) |
1122 | && modified_in_p (rir->saved_in_reg, insn)) | |
1123 | return true; | |
1124 | } | |
1125 | ||
1126 | return false; | |
1127 | } | |
1128 | ||
1129 | /* What register, if any, is currently saved in REG? */ | |
1130 | ||
1131 | static rtx | |
1132 | reg_saved_in (rtx reg) | |
1133 | { | |
1134 | unsigned int regn = REGNO (reg); | |
c73aa568 | 1135 | queued_reg_save *q; |
dcdf448e | 1136 | reg_saved_in_data *rir; |
1137 | size_t i; | |
1138 | ||
f1f41a6c | 1139 | FOR_EACH_VEC_ELT (queued_reg_saves, i, q) |
dcdf448e | 1140 | if (q->saved_reg && regn == REGNO (q->saved_reg)) |
1141 | return q->reg; | |
1142 | ||
f1f41a6c | 1143 | FOR_EACH_VEC_ELT (cur_trace->regs_saved_in_regs, i, rir) |
dcdf448e | 1144 | if (regn == REGNO (rir->saved_in_reg)) |
1145 | return rir->orig_reg; | |
1146 | ||
1147 | return NULL_RTX; | |
1148 | } | |
1149 | ||
dcdf448e | 1150 | /* A subroutine of dwarf2out_frame_debug, process a REG_DEF_CFA note. */ |
1151 | ||
1152 | static void | |
c746c5c3 | 1153 | dwarf2out_frame_debug_def_cfa (rtx pat) |
dcdf448e | 1154 | { |
dfe00a8f | 1155 | memset (cur_cfa, 0, sizeof (*cur_cfa)); |
dcdf448e | 1156 | |
e1b783f6 | 1157 | pat = strip_offset (pat, &cur_cfa->offset); |
a5c6cfdd | 1158 | if (MEM_P (pat)) |
1159 | { | |
dfe00a8f | 1160 | cur_cfa->indirect = 1; |
e1b783f6 | 1161 | pat = strip_offset (XEXP (pat, 0), &cur_cfa->base_offset); |
dcdf448e | 1162 | } |
a5c6cfdd | 1163 | /* ??? If this fails, we could be calling into the _loc functions to |
1164 | define a full expression. So far no port does that. */ | |
1165 | gcc_assert (REG_P (pat)); | |
dfe00a8f | 1166 | cur_cfa->reg = dwf_regno (pat); |
dcdf448e | 1167 | } |
1168 | ||
1169 | /* A subroutine of dwarf2out_frame_debug, process a REG_ADJUST_CFA note. */ | |
1170 | ||
1171 | static void | |
c746c5c3 | 1172 | dwarf2out_frame_debug_adjust_cfa (rtx pat) |
dcdf448e | 1173 | { |
1174 | rtx src, dest; | |
1175 | ||
1176 | gcc_assert (GET_CODE (pat) == SET); | |
1177 | dest = XEXP (pat, 0); | |
1178 | src = XEXP (pat, 1); | |
1179 | ||
1180 | switch (GET_CODE (src)) | |
1181 | { | |
1182 | case PLUS: | |
dfe00a8f | 1183 | gcc_assert (dwf_regno (XEXP (src, 0)) == cur_cfa->reg); |
e1b783f6 | 1184 | cur_cfa->offset -= rtx_to_poly_int64 (XEXP (src, 1)); |
dcdf448e | 1185 | break; |
1186 | ||
1187 | case REG: | |
dfe00a8f | 1188 | break; |
dcdf448e | 1189 | |
1190 | default: | |
dfe00a8f | 1191 | gcc_unreachable (); |
dcdf448e | 1192 | } |
1193 | ||
dfe00a8f | 1194 | cur_cfa->reg = dwf_regno (dest); |
1195 | gcc_assert (cur_cfa->indirect == 0); | |
dcdf448e | 1196 | } |
1197 | ||
1198 | /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_OFFSET note. */ | |
1199 | ||
1200 | static void | |
c746c5c3 | 1201 | dwarf2out_frame_debug_cfa_offset (rtx set) |
dcdf448e | 1202 | { |
e1b783f6 | 1203 | poly_int64 offset; |
dcdf448e | 1204 | rtx src, addr, span; |
1205 | unsigned int sregno; | |
1206 | ||
1207 | src = XEXP (set, 1); | |
1208 | addr = XEXP (set, 0); | |
1209 | gcc_assert (MEM_P (addr)); | |
1210 | addr = XEXP (addr, 0); | |
1211 | ||
1212 | /* As documented, only consider extremely simple addresses. */ | |
1213 | switch (GET_CODE (addr)) | |
1214 | { | |
1215 | case REG: | |
dfe00a8f | 1216 | gcc_assert (dwf_regno (addr) == cur_cfa->reg); |
1217 | offset = -cur_cfa->offset; | |
dcdf448e | 1218 | break; |
1219 | case PLUS: | |
dfe00a8f | 1220 | gcc_assert (dwf_regno (XEXP (addr, 0)) == cur_cfa->reg); |
e1b783f6 | 1221 | offset = rtx_to_poly_int64 (XEXP (addr, 1)) - cur_cfa->offset; |
dcdf448e | 1222 | break; |
1223 | default: | |
1224 | gcc_unreachable (); | |
1225 | } | |
1226 | ||
1227 | if (src == pc_rtx) | |
1228 | { | |
1229 | span = NULL; | |
1230 | sregno = DWARF_FRAME_RETURN_COLUMN; | |
1231 | } | |
b1613fc3 | 1232 | else |
dcdf448e | 1233 | { |
1234 | span = targetm.dwarf_register_span (src); | |
559e966b | 1235 | sregno = dwf_regno (src); |
dcdf448e | 1236 | } |
1237 | ||
1238 | /* ??? We'd like to use queue_reg_save, but we need to come up with | |
1239 | a different flushing heuristic for epilogues. */ | |
1240 | if (!span) | |
d4898332 | 1241 | reg_save (sregno, INVALID_REGNUM, offset); |
dcdf448e | 1242 | else |
1243 | { | |
1244 | /* We have a PARALLEL describing where the contents of SRC live. | |
fad67b80 | 1245 | Adjust the offset for each piece of the PARALLEL. */ |
e1b783f6 | 1246 | poly_int64 span_offset = offset; |
dcdf448e | 1247 | |
1248 | gcc_assert (GET_CODE (span) == PARALLEL); | |
1249 | ||
fad67b80 | 1250 | const int par_len = XVECLEN (span, 0); |
1251 | for (int par_index = 0; par_index < par_len; par_index++) | |
dcdf448e | 1252 | { |
1253 | rtx elem = XVECEXP (span, 0, par_index); | |
559e966b | 1254 | sregno = dwf_regno (src); |
d4898332 | 1255 | reg_save (sregno, INVALID_REGNUM, span_offset); |
dcdf448e | 1256 | span_offset += GET_MODE_SIZE (GET_MODE (elem)); |
1257 | } | |
1258 | } | |
1259 | } | |
1260 | ||
1261 | /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_REGISTER note. */ | |
1262 | ||
1263 | static void | |
c746c5c3 | 1264 | dwarf2out_frame_debug_cfa_register (rtx set) |
dcdf448e | 1265 | { |
1266 | rtx src, dest; | |
1267 | unsigned sregno, dregno; | |
1268 | ||
1269 | src = XEXP (set, 1); | |
1270 | dest = XEXP (set, 0); | |
1271 | ||
6ca363a7 | 1272 | record_reg_saved_in_reg (dest, src); |
dcdf448e | 1273 | if (src == pc_rtx) |
1274 | sregno = DWARF_FRAME_RETURN_COLUMN; | |
1275 | else | |
559e966b | 1276 | sregno = dwf_regno (src); |
dcdf448e | 1277 | |
559e966b | 1278 | dregno = dwf_regno (dest); |
dcdf448e | 1279 | |
1280 | /* ??? We'd like to use queue_reg_save, but we need to come up with | |
1281 | a different flushing heuristic for epilogues. */ | |
d4898332 | 1282 | reg_save (sregno, dregno, 0); |
dcdf448e | 1283 | } |
1284 | ||
2276e7e7 | 1285 | /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_EXPRESSION note. */ |
dcdf448e | 1286 | |
1287 | static void | |
c746c5c3 | 1288 | dwarf2out_frame_debug_cfa_expression (rtx set) |
dcdf448e | 1289 | { |
1290 | rtx src, dest, span; | |
1291 | dw_cfi_ref cfi = new_cfi (); | |
e9fe542d | 1292 | unsigned regno; |
dcdf448e | 1293 | |
1294 | dest = SET_DEST (set); | |
1295 | src = SET_SRC (set); | |
1296 | ||
1297 | gcc_assert (REG_P (src)); | |
1298 | gcc_assert (MEM_P (dest)); | |
1299 | ||
1300 | span = targetm.dwarf_register_span (src); | |
1301 | gcc_assert (!span); | |
1302 | ||
e9fe542d | 1303 | regno = dwf_regno (src); |
1304 | ||
dcdf448e | 1305 | cfi->dw_cfi_opc = DW_CFA_expression; |
e9fe542d | 1306 | cfi->dw_cfi_oprnd1.dw_cfi_reg_num = regno; |
dcdf448e | 1307 | cfi->dw_cfi_oprnd2.dw_cfi_loc |
1308 | = mem_loc_descriptor (XEXP (dest, 0), get_address_mode (dest), | |
1309 | GET_MODE (dest), VAR_INIT_STATUS_INITIALIZED); | |
1310 | ||
1311 | /* ??? We'd like to use queue_reg_save, were the interface different, | |
1312 | and, as above, we could manage flushing for epilogues. */ | |
d4898332 | 1313 | add_cfi (cfi); |
e9fe542d | 1314 | update_row_reg_save (cur_row, regno, cfi); |
dcdf448e | 1315 | } |
1316 | ||
2276e7e7 | 1317 | /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_VAL_EXPRESSION |
1318 | note. */ | |
1319 | ||
1320 | static void | |
1321 | dwarf2out_frame_debug_cfa_val_expression (rtx set) | |
1322 | { | |
1323 | rtx dest = SET_DEST (set); | |
1324 | gcc_assert (REG_P (dest)); | |
1325 | ||
1326 | rtx span = targetm.dwarf_register_span (dest); | |
1327 | gcc_assert (!span); | |
1328 | ||
1329 | rtx src = SET_SRC (set); | |
1330 | dw_cfi_ref cfi = new_cfi (); | |
1331 | cfi->dw_cfi_opc = DW_CFA_val_expression; | |
1332 | cfi->dw_cfi_oprnd1.dw_cfi_reg_num = dwf_regno (dest); | |
1333 | cfi->dw_cfi_oprnd2.dw_cfi_loc | |
1334 | = mem_loc_descriptor (src, GET_MODE (src), | |
1335 | GET_MODE (dest), VAR_INIT_STATUS_INITIALIZED); | |
1336 | add_cfi (cfi); | |
1337 | update_row_reg_save (cur_row, dwf_regno (dest), cfi); | |
1338 | } | |
1339 | ||
dcdf448e | 1340 | /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_RESTORE note. */ |
1341 | ||
1342 | static void | |
c746c5c3 | 1343 | dwarf2out_frame_debug_cfa_restore (rtx reg) |
dcdf448e | 1344 | { |
fad67b80 | 1345 | gcc_assert (REG_P (reg)); |
1346 | ||
1347 | rtx span = targetm.dwarf_register_span (reg); | |
1348 | if (!span) | |
1349 | { | |
1350 | unsigned int regno = dwf_regno (reg); | |
1351 | add_cfi_restore (regno); | |
1352 | update_row_reg_save (cur_row, regno, NULL); | |
1353 | } | |
1354 | else | |
1355 | { | |
1356 | /* We have a PARALLEL describing where the contents of REG live. | |
1357 | Restore the register for each piece of the PARALLEL. */ | |
1358 | gcc_assert (GET_CODE (span) == PARALLEL); | |
dcdf448e | 1359 | |
fad67b80 | 1360 | const int par_len = XVECLEN (span, 0); |
1361 | for (int par_index = 0; par_index < par_len; par_index++) | |
1362 | { | |
1363 | reg = XVECEXP (span, 0, par_index); | |
1364 | gcc_assert (REG_P (reg)); | |
1365 | unsigned int regno = dwf_regno (reg); | |
1366 | add_cfi_restore (regno); | |
1367 | update_row_reg_save (cur_row, regno, NULL); | |
1368 | } | |
1369 | } | |
dcdf448e | 1370 | } |
1371 | ||
1372 | /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_WINDOW_SAVE. | |
098b819f | 1373 | FAKE is true if this is not really a window save but something else. |
1374 | ||
1375 | ??? Perhaps we should note in the CIE where windows are saved (instead | |
1376 | of assuming 0(cfa)) and what registers are in the window. */ | |
dcdf448e | 1377 | |
1378 | static void | |
098b819f | 1379 | dwarf2out_frame_debug_cfa_window_save (bool fake) |
dcdf448e | 1380 | { |
1381 | dw_cfi_ref cfi = new_cfi (); | |
1382 | ||
1383 | cfi->dw_cfi_opc = DW_CFA_GNU_window_save; | |
d4898332 | 1384 | add_cfi (cfi); |
098b819f | 1385 | if (!fake) |
1386 | cur_row->window_save = true; | |
dcdf448e | 1387 | } |
1388 | ||
1389 | /* Record call frame debugging information for an expression EXPR, | |
1390 | which either sets SP or FP (adjusting how we calculate the frame | |
1391 | address) or saves a register to the stack or another register. | |
1392 | LABEL indicates the address of EXPR. | |
1393 | ||
1394 | This function encodes a state machine mapping rtxes to actions on | |
1395 | cfa, cfa_store, and cfa_temp.reg. We describe these rules so | |
1396 | users need not read the source code. | |
1397 | ||
1398 | The High-Level Picture | |
1399 | ||
1400 | Changes in the register we use to calculate the CFA: Currently we | |
1401 | assume that if you copy the CFA register into another register, we | |
1402 | should take the other one as the new CFA register; this seems to | |
1403 | work pretty well. If it's wrong for some target, it's simple | |
1404 | enough not to set RTX_FRAME_RELATED_P on the insn in question. | |
1405 | ||
1406 | Changes in the register we use for saving registers to the stack: | |
1407 | This is usually SP, but not always. Again, we deduce that if you | |
1408 | copy SP into another register (and SP is not the CFA register), | |
1409 | then the new register is the one we will be using for register | |
1410 | saves. This also seems to work. | |
1411 | ||
1412 | Register saves: There's not much guesswork about this one; if | |
1413 | RTX_FRAME_RELATED_P is set on an insn which modifies memory, it's a | |
1414 | register save, and the register used to calculate the destination | |
1415 | had better be the one we think we're using for this purpose. | |
1416 | It's also assumed that a copy from a call-saved register to another | |
1417 | register is saving that register if RTX_FRAME_RELATED_P is set on | |
1418 | that instruction. If the copy is from a call-saved register to | |
1419 | the *same* register, that means that the register is now the same | |
1420 | value as in the caller. | |
1421 | ||
1422 | Except: If the register being saved is the CFA register, and the | |
1423 | offset is nonzero, we are saving the CFA, so we assume we have to | |
1424 | use DW_CFA_def_cfa_expression. If the offset is 0, we assume that | |
1425 | the intent is to save the value of SP from the previous frame. | |
1426 | ||
1427 | In addition, if a register has previously been saved to a different | |
1428 | register, | |
1429 | ||
1430 | Invariants / Summaries of Rules | |
1431 | ||
1432 | cfa current rule for calculating the CFA. It usually | |
eb93b3f4 | 1433 | consists of a register and an offset. This is |
dfe00a8f | 1434 | actually stored in *cur_cfa, but abbreviated |
eb93b3f4 | 1435 | for the purposes of this documentation. |
dcdf448e | 1436 | cfa_store register used by prologue code to save things to the stack |
1437 | cfa_store.offset is the offset from the value of | |
1438 | cfa_store.reg to the actual CFA | |
1439 | cfa_temp register holding an integral value. cfa_temp.offset | |
1440 | stores the value, which will be used to adjust the | |
1441 | stack pointer. cfa_temp is also used like cfa_store, | |
1442 | to track stores to the stack via fp or a temp reg. | |
1443 | ||
1444 | Rules 1- 4: Setting a register's value to cfa.reg or an expression | |
1445 | with cfa.reg as the first operand changes the cfa.reg and its | |
1446 | cfa.offset. Rule 1 and 4 also set cfa_temp.reg and | |
1447 | cfa_temp.offset. | |
1448 | ||
1449 | Rules 6- 9: Set a non-cfa.reg register value to a constant or an | |
1450 | expression yielding a constant. This sets cfa_temp.reg | |
1451 | and cfa_temp.offset. | |
1452 | ||
1453 | Rule 5: Create a new register cfa_store used to save items to the | |
1454 | stack. | |
1455 | ||
1456 | Rules 10-14: Save a register to the stack. Define offset as the | |
1457 | difference of the original location and cfa_store's | |
1458 | location (or cfa_temp's location if cfa_temp is used). | |
1459 | ||
1460 | Rules 16-20: If AND operation happens on sp in prologue, we assume | |
1461 | stack is realigned. We will use a group of DW_OP_XXX | |
1462 | expressions to represent the location of the stored | |
1463 | register instead of CFA+offset. | |
1464 | ||
1465 | The Rules | |
1466 | ||
1467 | "{a,b}" indicates a choice of a xor b. | |
1468 | "<reg>:cfa.reg" indicates that <reg> must equal cfa.reg. | |
1469 | ||
1470 | Rule 1: | |
1471 | (set <reg1> <reg2>:cfa.reg) | |
1472 | effects: cfa.reg = <reg1> | |
1473 | cfa.offset unchanged | |
1474 | cfa_temp.reg = <reg1> | |
1475 | cfa_temp.offset = cfa.offset | |
1476 | ||
1477 | Rule 2: | |
1478 | (set sp ({minus,plus,losum} {sp,fp}:cfa.reg | |
1479 | {<const_int>,<reg>:cfa_temp.reg})) | |
1480 | effects: cfa.reg = sp if fp used | |
1481 | cfa.offset += {+/- <const_int>, cfa_temp.offset} if cfa.reg==sp | |
1482 | cfa_store.offset += {+/- <const_int>, cfa_temp.offset} | |
1483 | if cfa_store.reg==sp | |
1484 | ||
1485 | Rule 3: | |
1486 | (set fp ({minus,plus,losum} <reg>:cfa.reg <const_int>)) | |
1487 | effects: cfa.reg = fp | |
1488 | cfa_offset += +/- <const_int> | |
1489 | ||
1490 | Rule 4: | |
1491 | (set <reg1> ({plus,losum} <reg2>:cfa.reg <const_int>)) | |
1492 | constraints: <reg1> != fp | |
1493 | <reg1> != sp | |
1494 | effects: cfa.reg = <reg1> | |
1495 | cfa_temp.reg = <reg1> | |
1496 | cfa_temp.offset = cfa.offset | |
1497 | ||
1498 | Rule 5: | |
1499 | (set <reg1> (plus <reg2>:cfa_temp.reg sp:cfa.reg)) | |
1500 | constraints: <reg1> != fp | |
1501 | <reg1> != sp | |
1502 | effects: cfa_store.reg = <reg1> | |
1503 | cfa_store.offset = cfa.offset - cfa_temp.offset | |
1504 | ||
1505 | Rule 6: | |
1506 | (set <reg> <const_int>) | |
1507 | effects: cfa_temp.reg = <reg> | |
1508 | cfa_temp.offset = <const_int> | |
1509 | ||
1510 | Rule 7: | |
1511 | (set <reg1>:cfa_temp.reg (ior <reg2>:cfa_temp.reg <const_int>)) | |
1512 | effects: cfa_temp.reg = <reg1> | |
1513 | cfa_temp.offset |= <const_int> | |
1514 | ||
1515 | Rule 8: | |
1516 | (set <reg> (high <exp>)) | |
1517 | effects: none | |
1518 | ||
1519 | Rule 9: | |
1520 | (set <reg> (lo_sum <exp> <const_int>)) | |
1521 | effects: cfa_temp.reg = <reg> | |
1522 | cfa_temp.offset = <const_int> | |
1523 | ||
1524 | Rule 10: | |
1525 | (set (mem ({pre,post}_modify sp:cfa_store (???? <reg1> <const_int>))) <reg2>) | |
1526 | effects: cfa_store.offset -= <const_int> | |
1527 | cfa.offset = cfa_store.offset if cfa.reg == sp | |
1528 | cfa.reg = sp | |
1529 | cfa.base_offset = -cfa_store.offset | |
1530 | ||
1531 | Rule 11: | |
1532 | (set (mem ({pre_inc,pre_dec,post_dec} sp:cfa_store.reg)) <reg>) | |
1533 | effects: cfa_store.offset += -/+ mode_size(mem) | |
1534 | cfa.offset = cfa_store.offset if cfa.reg == sp | |
1535 | cfa.reg = sp | |
1536 | cfa.base_offset = -cfa_store.offset | |
1537 | ||
1538 | Rule 12: | |
1539 | (set (mem ({minus,plus,losum} <reg1>:{cfa_store,cfa_temp} <const_int>)) | |
1540 | ||
1541 | <reg2>) | |
1542 | effects: cfa.reg = <reg1> | |
1543 | cfa.base_offset = -/+ <const_int> - {cfa_store,cfa_temp}.offset | |
1544 | ||
1545 | Rule 13: | |
1546 | (set (mem <reg1>:{cfa_store,cfa_temp}) <reg2>) | |
1547 | effects: cfa.reg = <reg1> | |
1548 | cfa.base_offset = -{cfa_store,cfa_temp}.offset | |
1549 | ||
1550 | Rule 14: | |
1551 | (set (mem (post_inc <reg1>:cfa_temp <const_int>)) <reg2>) | |
1552 | effects: cfa.reg = <reg1> | |
1553 | cfa.base_offset = -cfa_temp.offset | |
1554 | cfa_temp.offset -= mode_size(mem) | |
1555 | ||
1556 | Rule 15: | |
1557 | (set <reg> {unspec, unspec_volatile}) | |
1558 | effects: target-dependent | |
1559 | ||
1560 | Rule 16: | |
1561 | (set sp (and: sp <const_int>)) | |
1562 | constraints: cfa_store.reg == sp | |
6033bf11 | 1563 | effects: cfun->fde.stack_realign = 1 |
dcdf448e | 1564 | cfa_store.offset = 0 |
1565 | fde->drap_reg = cfa.reg if cfa.reg != sp and cfa.reg != fp | |
1566 | ||
1567 | Rule 17: | |
1568 | (set (mem ({pre_inc, pre_dec} sp)) (mem (plus (cfa.reg) (const_int)))) | |
1569 | effects: cfa_store.offset += -/+ mode_size(mem) | |
1570 | ||
1571 | Rule 18: | |
1572 | (set (mem ({pre_inc, pre_dec} sp)) fp) | |
1573 | constraints: fde->stack_realign == 1 | |
1574 | effects: cfa_store.offset = 0 | |
1575 | cfa.reg != HARD_FRAME_POINTER_REGNUM | |
1576 | ||
1577 | Rule 19: | |
1578 | (set (mem ({pre_inc, pre_dec} sp)) cfa.reg) | |
1579 | constraints: fde->stack_realign == 1 | |
1580 | && cfa.offset == 0 | |
1581 | && cfa.indirect == 0 | |
1582 | && cfa.reg != HARD_FRAME_POINTER_REGNUM | |
1583 | effects: Use DW_CFA_def_cfa_expression to define cfa | |
1584 | cfa.reg == fde->drap_reg */ | |
1585 | ||
1586 | static void | |
c746c5c3 | 1587 | dwarf2out_frame_debug_expr (rtx expr) |
dcdf448e | 1588 | { |
1589 | rtx src, dest, span; | |
e1b783f6 | 1590 | poly_int64 offset; |
dcdf448e | 1591 | dw_fde_ref fde; |
1592 | ||
1593 | /* If RTX_FRAME_RELATED_P is set on a PARALLEL, process each member of | |
1594 | the PARALLEL independently. The first element is always processed if | |
1595 | it is a SET. This is for backward compatibility. Other elements | |
1596 | are processed only if they are SETs and the RTX_FRAME_RELATED_P | |
1597 | flag is set in them. */ | |
1598 | if (GET_CODE (expr) == PARALLEL || GET_CODE (expr) == SEQUENCE) | |
1599 | { | |
1600 | int par_index; | |
1601 | int limit = XVECLEN (expr, 0); | |
1602 | rtx elem; | |
1603 | ||
1604 | /* PARALLELs have strict read-modify-write semantics, so we | |
1605 | ought to evaluate every rvalue before changing any lvalue. | |
1606 | It's cumbersome to do that in general, but there's an | |
1607 | easy approximation that is enough for all current users: | |
1608 | handle register saves before register assignments. */ | |
1609 | if (GET_CODE (expr) == PARALLEL) | |
1610 | for (par_index = 0; par_index < limit; par_index++) | |
1611 | { | |
1612 | elem = XVECEXP (expr, 0, par_index); | |
1613 | if (GET_CODE (elem) == SET | |
1614 | && MEM_P (SET_DEST (elem)) | |
1615 | && (RTX_FRAME_RELATED_P (elem) || par_index == 0)) | |
c746c5c3 | 1616 | dwarf2out_frame_debug_expr (elem); |
dcdf448e | 1617 | } |
1618 | ||
1619 | for (par_index = 0; par_index < limit; par_index++) | |
1620 | { | |
1621 | elem = XVECEXP (expr, 0, par_index); | |
1622 | if (GET_CODE (elem) == SET | |
1623 | && (!MEM_P (SET_DEST (elem)) || GET_CODE (expr) == SEQUENCE) | |
1624 | && (RTX_FRAME_RELATED_P (elem) || par_index == 0)) | |
c746c5c3 | 1625 | dwarf2out_frame_debug_expr (elem); |
dcdf448e | 1626 | } |
1627 | return; | |
1628 | } | |
1629 | ||
1630 | gcc_assert (GET_CODE (expr) == SET); | |
1631 | ||
1632 | src = SET_SRC (expr); | |
1633 | dest = SET_DEST (expr); | |
1634 | ||
1635 | if (REG_P (src)) | |
1636 | { | |
1637 | rtx rsi = reg_saved_in (src); | |
1638 | if (rsi) | |
1639 | src = rsi; | |
1640 | } | |
1641 | ||
6033bf11 | 1642 | fde = cfun->fde; |
dcdf448e | 1643 | |
1644 | switch (GET_CODE (dest)) | |
1645 | { | |
1646 | case REG: | |
1647 | switch (GET_CODE (src)) | |
1648 | { | |
1649 | /* Setting FP from SP. */ | |
1650 | case REG: | |
dfe00a8f | 1651 | if (cur_cfa->reg == dwf_regno (src)) |
dcdf448e | 1652 | { |
1653 | /* Rule 1 */ | |
1654 | /* Update the CFA rule wrt SP or FP. Make sure src is | |
1655 | relative to the current CFA register. | |
1656 | ||
1657 | We used to require that dest be either SP or FP, but the | |
1658 | ARM copies SP to a temporary register, and from there to | |
1659 | FP. So we just rely on the backends to only set | |
1660 | RTX_FRAME_RELATED_P on appropriate insns. */ | |
dfe00a8f | 1661 | cur_cfa->reg = dwf_regno (dest); |
1662 | cur_trace->cfa_temp.reg = cur_cfa->reg; | |
1663 | cur_trace->cfa_temp.offset = cur_cfa->offset; | |
dcdf448e | 1664 | } |
1665 | else | |
1666 | { | |
1667 | /* Saving a register in a register. */ | |
1668 | gcc_assert (!fixed_regs [REGNO (dest)] | |
1669 | /* For the SPARC and its register window. */ | |
559e966b | 1670 | || (dwf_regno (src) == DWARF_FRAME_RETURN_COLUMN)); |
dcdf448e | 1671 | |
1672 | /* After stack is aligned, we can only save SP in FP | |
1673 | if drap register is used. In this case, we have | |
1674 | to restore stack pointer with the CFA value and we | |
1675 | don't generate this DWARF information. */ | |
1676 | if (fde | |
1677 | && fde->stack_realign | |
1678 | && REGNO (src) == STACK_POINTER_REGNUM) | |
1679 | gcc_assert (REGNO (dest) == HARD_FRAME_POINTER_REGNUM | |
1680 | && fde->drap_reg != INVALID_REGNUM | |
dfe00a8f | 1681 | && cur_cfa->reg != dwf_regno (src)); |
dcdf448e | 1682 | else |
c746c5c3 | 1683 | queue_reg_save (src, dest, 0); |
dcdf448e | 1684 | } |
1685 | break; | |
1686 | ||
1687 | case PLUS: | |
1688 | case MINUS: | |
1689 | case LO_SUM: | |
1690 | if (dest == stack_pointer_rtx) | |
1691 | { | |
1692 | /* Rule 2 */ | |
1693 | /* Adjusting SP. */ | |
e1b783f6 | 1694 | if (REG_P (XEXP (src, 1))) |
dcdf448e | 1695 | { |
b1613fc3 | 1696 | gcc_assert (dwf_regno (XEXP (src, 1)) |
1697 | == cur_trace->cfa_temp.reg); | |
1698 | offset = cur_trace->cfa_temp.offset; | |
dcdf448e | 1699 | } |
e1b783f6 | 1700 | else if (!poly_int_rtx_p (XEXP (src, 1), &offset)) |
1701 | gcc_unreachable (); | |
dcdf448e | 1702 | |
1703 | if (XEXP (src, 0) == hard_frame_pointer_rtx) | |
1704 | { | |
1705 | /* Restoring SP from FP in the epilogue. */ | |
dfe00a8f | 1706 | gcc_assert (cur_cfa->reg == dw_frame_pointer_regnum); |
1707 | cur_cfa->reg = dw_stack_pointer_regnum; | |
dcdf448e | 1708 | } |
1709 | else if (GET_CODE (src) == LO_SUM) | |
1710 | /* Assume we've set the source reg of the LO_SUM from sp. */ | |
1711 | ; | |
1712 | else | |
1713 | gcc_assert (XEXP (src, 0) == stack_pointer_rtx); | |
1714 | ||
1715 | if (GET_CODE (src) != MINUS) | |
1716 | offset = -offset; | |
dfe00a8f | 1717 | if (cur_cfa->reg == dw_stack_pointer_regnum) |
1718 | cur_cfa->offset += offset; | |
b1613fc3 | 1719 | if (cur_trace->cfa_store.reg == dw_stack_pointer_regnum) |
1720 | cur_trace->cfa_store.offset += offset; | |
dcdf448e | 1721 | } |
1722 | else if (dest == hard_frame_pointer_rtx) | |
1723 | { | |
1724 | /* Rule 3 */ | |
1725 | /* Either setting the FP from an offset of the SP, | |
1726 | or adjusting the FP */ | |
1727 | gcc_assert (frame_pointer_needed); | |
1728 | ||
1729 | gcc_assert (REG_P (XEXP (src, 0)) | |
e1b783f6 | 1730 | && dwf_regno (XEXP (src, 0)) == cur_cfa->reg); |
1731 | offset = rtx_to_poly_int64 (XEXP (src, 1)); | |
dcdf448e | 1732 | if (GET_CODE (src) != MINUS) |
1733 | offset = -offset; | |
dfe00a8f | 1734 | cur_cfa->offset += offset; |
1735 | cur_cfa->reg = dw_frame_pointer_regnum; | |
dcdf448e | 1736 | } |
1737 | else | |
1738 | { | |
1739 | gcc_assert (GET_CODE (src) != MINUS); | |
1740 | ||
1741 | /* Rule 4 */ | |
1742 | if (REG_P (XEXP (src, 0)) | |
dfe00a8f | 1743 | && dwf_regno (XEXP (src, 0)) == cur_cfa->reg |
e1b783f6 | 1744 | && poly_int_rtx_p (XEXP (src, 1), &offset)) |
dcdf448e | 1745 | { |
1746 | /* Setting a temporary CFA register that will be copied | |
1747 | into the FP later on. */ | |
e1b783f6 | 1748 | offset = -offset; |
dfe00a8f | 1749 | cur_cfa->offset += offset; |
1750 | cur_cfa->reg = dwf_regno (dest); | |
dcdf448e | 1751 | /* Or used to save regs to the stack. */ |
dfe00a8f | 1752 | cur_trace->cfa_temp.reg = cur_cfa->reg; |
1753 | cur_trace->cfa_temp.offset = cur_cfa->offset; | |
dcdf448e | 1754 | } |
1755 | ||
1756 | /* Rule 5 */ | |
1757 | else if (REG_P (XEXP (src, 0)) | |
b1613fc3 | 1758 | && dwf_regno (XEXP (src, 0)) == cur_trace->cfa_temp.reg |
dcdf448e | 1759 | && XEXP (src, 1) == stack_pointer_rtx) |
1760 | { | |
1761 | /* Setting a scratch register that we will use instead | |
1762 | of SP for saving registers to the stack. */ | |
dfe00a8f | 1763 | gcc_assert (cur_cfa->reg == dw_stack_pointer_regnum); |
b1613fc3 | 1764 | cur_trace->cfa_store.reg = dwf_regno (dest); |
1765 | cur_trace->cfa_store.offset | |
dfe00a8f | 1766 | = cur_cfa->offset - cur_trace->cfa_temp.offset; |
dcdf448e | 1767 | } |
1768 | ||
1769 | /* Rule 9 */ | |
1770 | else if (GET_CODE (src) == LO_SUM | |
e1b783f6 | 1771 | && poly_int_rtx_p (XEXP (src, 1), |
1772 | &cur_trace->cfa_temp.offset)) | |
1773 | cur_trace->cfa_temp.reg = dwf_regno (dest); | |
dcdf448e | 1774 | else |
1775 | gcc_unreachable (); | |
1776 | } | |
1777 | break; | |
1778 | ||
1779 | /* Rule 6 */ | |
1780 | case CONST_INT: | |
ad96f26d | 1781 | case CONST_POLY_INT: |
b1613fc3 | 1782 | cur_trace->cfa_temp.reg = dwf_regno (dest); |
e1b783f6 | 1783 | cur_trace->cfa_temp.offset = rtx_to_poly_int64 (src); |
dcdf448e | 1784 | break; |
1785 | ||
1786 | /* Rule 7 */ | |
1787 | case IOR: | |
1788 | gcc_assert (REG_P (XEXP (src, 0)) | |
b1613fc3 | 1789 | && dwf_regno (XEXP (src, 0)) == cur_trace->cfa_temp.reg |
dcdf448e | 1790 | && CONST_INT_P (XEXP (src, 1))); |
1791 | ||
b1613fc3 | 1792 | cur_trace->cfa_temp.reg = dwf_regno (dest); |
e1b783f6 | 1793 | if (!can_ior_p (cur_trace->cfa_temp.offset, INTVAL (XEXP (src, 1)), |
1794 | &cur_trace->cfa_temp.offset)) | |
1795 | /* The target shouldn't generate this kind of CFI note if we | |
1796 | can't represent it. */ | |
1797 | gcc_unreachable (); | |
dcdf448e | 1798 | break; |
1799 | ||
1800 | /* Skip over HIGH, assuming it will be followed by a LO_SUM, | |
1801 | which will fill in all of the bits. */ | |
1802 | /* Rule 8 */ | |
1803 | case HIGH: | |
1804 | break; | |
1805 | ||
1806 | /* Rule 15 */ | |
1807 | case UNSPEC: | |
1808 | case UNSPEC_VOLATILE: | |
c746c5c3 | 1809 | /* All unspecs should be represented by REG_CFA_* notes. */ |
1810 | gcc_unreachable (); | |
dcdf448e | 1811 | return; |
1812 | ||
1813 | /* Rule 16 */ | |
1814 | case AND: | |
1815 | /* If this AND operation happens on stack pointer in prologue, | |
1816 | we assume the stack is realigned and we extract the | |
1817 | alignment. */ | |
1818 | if (fde && XEXP (src, 0) == stack_pointer_rtx) | |
1819 | { | |
1820 | /* We interpret reg_save differently with stack_realign set. | |
1821 | Thus we must flush whatever we have queued first. */ | |
1822 | dwarf2out_flush_queued_reg_saves (); | |
1823 | ||
b1613fc3 | 1824 | gcc_assert (cur_trace->cfa_store.reg |
1825 | == dwf_regno (XEXP (src, 0))); | |
dcdf448e | 1826 | fde->stack_realign = 1; |
1827 | fde->stack_realignment = INTVAL (XEXP (src, 1)); | |
b1613fc3 | 1828 | cur_trace->cfa_store.offset = 0; |
dcdf448e | 1829 | |
dfe00a8f | 1830 | if (cur_cfa->reg != dw_stack_pointer_regnum |
1831 | && cur_cfa->reg != dw_frame_pointer_regnum) | |
1832 | fde->drap_reg = cur_cfa->reg; | |
dcdf448e | 1833 | } |
1834 | return; | |
1835 | ||
1836 | default: | |
1837 | gcc_unreachable (); | |
1838 | } | |
dcdf448e | 1839 | break; |
1840 | ||
1841 | case MEM: | |
1842 | ||
1843 | /* Saving a register to the stack. Make sure dest is relative to the | |
1844 | CFA register. */ | |
1845 | switch (GET_CODE (XEXP (dest, 0))) | |
1846 | { | |
1847 | /* Rule 10 */ | |
1848 | /* With a push. */ | |
1849 | case PRE_MODIFY: | |
1850 | case POST_MODIFY: | |
1851 | /* We can't handle variable size modifications. */ | |
e1b783f6 | 1852 | offset = -rtx_to_poly_int64 (XEXP (XEXP (XEXP (dest, 0), 1), 1)); |
dcdf448e | 1853 | |
1854 | gcc_assert (REGNO (XEXP (XEXP (dest, 0), 0)) == STACK_POINTER_REGNUM | |
b1613fc3 | 1855 | && cur_trace->cfa_store.reg == dw_stack_pointer_regnum); |
dcdf448e | 1856 | |
b1613fc3 | 1857 | cur_trace->cfa_store.offset += offset; |
dfe00a8f | 1858 | if (cur_cfa->reg == dw_stack_pointer_regnum) |
1859 | cur_cfa->offset = cur_trace->cfa_store.offset; | |
dcdf448e | 1860 | |
1861 | if (GET_CODE (XEXP (dest, 0)) == POST_MODIFY) | |
b1613fc3 | 1862 | offset -= cur_trace->cfa_store.offset; |
dcdf448e | 1863 | else |
b1613fc3 | 1864 | offset = -cur_trace->cfa_store.offset; |
dcdf448e | 1865 | break; |
1866 | ||
1867 | /* Rule 11 */ | |
1868 | case PRE_INC: | |
1869 | case PRE_DEC: | |
1870 | case POST_DEC: | |
1871 | offset = GET_MODE_SIZE (GET_MODE (dest)); | |
1872 | if (GET_CODE (XEXP (dest, 0)) == PRE_INC) | |
1873 | offset = -offset; | |
1874 | ||
1875 | gcc_assert ((REGNO (XEXP (XEXP (dest, 0), 0)) | |
1876 | == STACK_POINTER_REGNUM) | |
b1613fc3 | 1877 | && cur_trace->cfa_store.reg == dw_stack_pointer_regnum); |
dcdf448e | 1878 | |
b1613fc3 | 1879 | cur_trace->cfa_store.offset += offset; |
dcdf448e | 1880 | |
1881 | /* Rule 18: If stack is aligned, we will use FP as a | |
1882 | reference to represent the address of the stored | |
1883 | regiser. */ | |
1884 | if (fde | |
1885 | && fde->stack_realign | |
2013c33b | 1886 | && REG_P (src) |
1887 | && REGNO (src) == HARD_FRAME_POINTER_REGNUM) | |
dcdf448e | 1888 | { |
dfe00a8f | 1889 | gcc_assert (cur_cfa->reg != dw_frame_pointer_regnum); |
b1613fc3 | 1890 | cur_trace->cfa_store.offset = 0; |
dcdf448e | 1891 | } |
1892 | ||
dfe00a8f | 1893 | if (cur_cfa->reg == dw_stack_pointer_regnum) |
1894 | cur_cfa->offset = cur_trace->cfa_store.offset; | |
dcdf448e | 1895 | |
1896 | if (GET_CODE (XEXP (dest, 0)) == POST_DEC) | |
b1613fc3 | 1897 | offset += -cur_trace->cfa_store.offset; |
dcdf448e | 1898 | else |
b1613fc3 | 1899 | offset = -cur_trace->cfa_store.offset; |
dcdf448e | 1900 | break; |
1901 | ||
1902 | /* Rule 12 */ | |
1903 | /* With an offset. */ | |
1904 | case PLUS: | |
1905 | case MINUS: | |
1906 | case LO_SUM: | |
1907 | { | |
559e966b | 1908 | unsigned int regno; |
dcdf448e | 1909 | |
e1b783f6 | 1910 | gcc_assert (REG_P (XEXP (XEXP (dest, 0), 0))); |
1911 | offset = rtx_to_poly_int64 (XEXP (XEXP (dest, 0), 1)); | |
dcdf448e | 1912 | if (GET_CODE (XEXP (dest, 0)) == MINUS) |
1913 | offset = -offset; | |
1914 | ||
559e966b | 1915 | regno = dwf_regno (XEXP (XEXP (dest, 0), 0)); |
dcdf448e | 1916 | |
dfe00a8f | 1917 | if (cur_cfa->reg == regno) |
1918 | offset -= cur_cfa->offset; | |
b1613fc3 | 1919 | else if (cur_trace->cfa_store.reg == regno) |
1920 | offset -= cur_trace->cfa_store.offset; | |
dcdf448e | 1921 | else |
1922 | { | |
b1613fc3 | 1923 | gcc_assert (cur_trace->cfa_temp.reg == regno); |
1924 | offset -= cur_trace->cfa_temp.offset; | |
dcdf448e | 1925 | } |
1926 | } | |
1927 | break; | |
1928 | ||
1929 | /* Rule 13 */ | |
1930 | /* Without an offset. */ | |
1931 | case REG: | |
1932 | { | |
559e966b | 1933 | unsigned int regno = dwf_regno (XEXP (dest, 0)); |
dcdf448e | 1934 | |
dfe00a8f | 1935 | if (cur_cfa->reg == regno) |
1936 | offset = -cur_cfa->offset; | |
b1613fc3 | 1937 | else if (cur_trace->cfa_store.reg == regno) |
1938 | offset = -cur_trace->cfa_store.offset; | |
dcdf448e | 1939 | else |
1940 | { | |
b1613fc3 | 1941 | gcc_assert (cur_trace->cfa_temp.reg == regno); |
1942 | offset = -cur_trace->cfa_temp.offset; | |
dcdf448e | 1943 | } |
1944 | } | |
1945 | break; | |
1946 | ||
1947 | /* Rule 14 */ | |
1948 | case POST_INC: | |
b1613fc3 | 1949 | gcc_assert (cur_trace->cfa_temp.reg |
1950 | == dwf_regno (XEXP (XEXP (dest, 0), 0))); | |
1951 | offset = -cur_trace->cfa_temp.offset; | |
1952 | cur_trace->cfa_temp.offset -= GET_MODE_SIZE (GET_MODE (dest)); | |
dcdf448e | 1953 | break; |
1954 | ||
1955 | default: | |
1956 | gcc_unreachable (); | |
1957 | } | |
1958 | ||
6ca363a7 | 1959 | /* Rule 17 */ |
1960 | /* If the source operand of this MEM operation is a memory, | |
1961 | we only care how much stack grew. */ | |
1962 | if (MEM_P (src)) | |
dcdf448e | 1963 | break; |
1964 | ||
6ca363a7 | 1965 | if (REG_P (src) |
1966 | && REGNO (src) != STACK_POINTER_REGNUM | |
dcdf448e | 1967 | && REGNO (src) != HARD_FRAME_POINTER_REGNUM |
dfe00a8f | 1968 | && dwf_regno (src) == cur_cfa->reg) |
dcdf448e | 1969 | { |
1970 | /* We're storing the current CFA reg into the stack. */ | |
1971 | ||
e1b783f6 | 1972 | if (known_eq (cur_cfa->offset, 0)) |
dcdf448e | 1973 | { |
1974 | /* Rule 19 */ | |
1975 | /* If stack is aligned, putting CFA reg into stack means | |
1976 | we can no longer use reg + offset to represent CFA. | |
1977 | Here we use DW_CFA_def_cfa_expression instead. The | |
1978 | result of this expression equals to the original CFA | |
1979 | value. */ | |
1980 | if (fde | |
1981 | && fde->stack_realign | |
dfe00a8f | 1982 | && cur_cfa->indirect == 0 |
1983 | && cur_cfa->reg != dw_frame_pointer_regnum) | |
dcdf448e | 1984 | { |
dfe00a8f | 1985 | gcc_assert (fde->drap_reg == cur_cfa->reg); |
dcdf448e | 1986 | |
dfe00a8f | 1987 | cur_cfa->indirect = 1; |
1988 | cur_cfa->reg = dw_frame_pointer_regnum; | |
1989 | cur_cfa->base_offset = offset; | |
1990 | cur_cfa->offset = 0; | |
dcdf448e | 1991 | |
1992 | fde->drap_reg_saved = 1; | |
dcdf448e | 1993 | break; |
1994 | } | |
1995 | ||
1996 | /* If the source register is exactly the CFA, assume | |
1997 | we're saving SP like any other register; this happens | |
1998 | on the ARM. */ | |
c746c5c3 | 1999 | queue_reg_save (stack_pointer_rtx, NULL_RTX, offset); |
dcdf448e | 2000 | break; |
2001 | } | |
2002 | else | |
2003 | { | |
2004 | /* Otherwise, we'll need to look in the stack to | |
2005 | calculate the CFA. */ | |
2006 | rtx x = XEXP (dest, 0); | |
2007 | ||
2008 | if (!REG_P (x)) | |
2009 | x = XEXP (x, 0); | |
2010 | gcc_assert (REG_P (x)); | |
2011 | ||
dfe00a8f | 2012 | cur_cfa->reg = dwf_regno (x); |
2013 | cur_cfa->base_offset = offset; | |
2014 | cur_cfa->indirect = 1; | |
dcdf448e | 2015 | break; |
2016 | } | |
2017 | } | |
2018 | ||
6ca363a7 | 2019 | if (REG_P (src)) |
2020 | span = targetm.dwarf_register_span (src); | |
fad67b80 | 2021 | else |
2022 | span = NULL; | |
2023 | ||
6ca363a7 | 2024 | if (!span) |
2025 | queue_reg_save (src, NULL_RTX, offset); | |
2026 | else | |
2027 | { | |
2028 | /* We have a PARALLEL describing where the contents of SRC live. | |
2029 | Queue register saves for each piece of the PARALLEL. */ | |
e1b783f6 | 2030 | poly_int64 span_offset = offset; |
dcdf448e | 2031 | |
6ca363a7 | 2032 | gcc_assert (GET_CODE (span) == PARALLEL); |
dcdf448e | 2033 | |
fad67b80 | 2034 | const int par_len = XVECLEN (span, 0); |
2035 | for (int par_index = 0; par_index < par_len; par_index++) | |
6ca363a7 | 2036 | { |
2037 | rtx elem = XVECEXP (span, 0, par_index); | |
2038 | queue_reg_save (elem, NULL_RTX, span_offset); | |
2039 | span_offset += GET_MODE_SIZE (GET_MODE (elem)); | |
2040 | } | |
2041 | } | |
dcdf448e | 2042 | break; |
2043 | ||
2044 | default: | |
2045 | gcc_unreachable (); | |
2046 | } | |
2047 | } | |
2048 | ||
dfe00a8f | 2049 | /* Record call frame debugging information for INSN, which either sets |
2050 | SP or FP (adjusting how we calculate the frame address) or saves a | |
2051 | register to the stack. */ | |
dcdf448e | 2052 | |
fe2dc6d6 | 2053 | static void |
50fc2d35 | 2054 | dwarf2out_frame_debug (rtx_insn *insn) |
dcdf448e | 2055 | { |
50fc2d35 | 2056 | rtx note, n, pat; |
dcdf448e | 2057 | bool handled_one = false; |
dcdf448e | 2058 | |
2059 | for (note = REG_NOTES (insn); note; note = XEXP (note, 1)) | |
2060 | switch (REG_NOTE_KIND (note)) | |
2061 | { | |
2062 | case REG_FRAME_RELATED_EXPR: | |
50fc2d35 | 2063 | pat = XEXP (note, 0); |
dcdf448e | 2064 | goto do_frame_expr; |
2065 | ||
2066 | case REG_CFA_DEF_CFA: | |
c746c5c3 | 2067 | dwarf2out_frame_debug_def_cfa (XEXP (note, 0)); |
dcdf448e | 2068 | handled_one = true; |
2069 | break; | |
2070 | ||
2071 | case REG_CFA_ADJUST_CFA: | |
2072 | n = XEXP (note, 0); | |
2073 | if (n == NULL) | |
2074 | { | |
2075 | n = PATTERN (insn); | |
2076 | if (GET_CODE (n) == PARALLEL) | |
2077 | n = XVECEXP (n, 0, 0); | |
2078 | } | |
c746c5c3 | 2079 | dwarf2out_frame_debug_adjust_cfa (n); |
dcdf448e | 2080 | handled_one = true; |
2081 | break; | |
2082 | ||
2083 | case REG_CFA_OFFSET: | |
2084 | n = XEXP (note, 0); | |
2085 | if (n == NULL) | |
2086 | n = single_set (insn); | |
c746c5c3 | 2087 | dwarf2out_frame_debug_cfa_offset (n); |
dcdf448e | 2088 | handled_one = true; |
2089 | break; | |
2090 | ||
2091 | case REG_CFA_REGISTER: | |
2092 | n = XEXP (note, 0); | |
2093 | if (n == NULL) | |
2094 | { | |
2095 | n = PATTERN (insn); | |
2096 | if (GET_CODE (n) == PARALLEL) | |
2097 | n = XVECEXP (n, 0, 0); | |
2098 | } | |
c746c5c3 | 2099 | dwarf2out_frame_debug_cfa_register (n); |
dcdf448e | 2100 | handled_one = true; |
2101 | break; | |
2102 | ||
2103 | case REG_CFA_EXPRESSION: | |
2276e7e7 | 2104 | case REG_CFA_VAL_EXPRESSION: |
dcdf448e | 2105 | n = XEXP (note, 0); |
2106 | if (n == NULL) | |
2107 | n = single_set (insn); | |
2276e7e7 | 2108 | |
2109 | if (REG_NOTE_KIND (note) == REG_CFA_EXPRESSION) | |
2110 | dwarf2out_frame_debug_cfa_expression (n); | |
2111 | else | |
2112 | dwarf2out_frame_debug_cfa_val_expression (n); | |
2113 | ||
dcdf448e | 2114 | handled_one = true; |
2115 | break; | |
2116 | ||
2117 | case REG_CFA_RESTORE: | |
2118 | n = XEXP (note, 0); | |
2119 | if (n == NULL) | |
2120 | { | |
2121 | n = PATTERN (insn); | |
2122 | if (GET_CODE (n) == PARALLEL) | |
2123 | n = XVECEXP (n, 0, 0); | |
2124 | n = XEXP (n, 0); | |
2125 | } | |
c746c5c3 | 2126 | dwarf2out_frame_debug_cfa_restore (n); |
dcdf448e | 2127 | handled_one = true; |
2128 | break; | |
2129 | ||
2130 | case REG_CFA_SET_VDRAP: | |
2131 | n = XEXP (note, 0); | |
2132 | if (REG_P (n)) | |
2133 | { | |
6033bf11 | 2134 | dw_fde_ref fde = cfun->fde; |
dcdf448e | 2135 | if (fde) |
2136 | { | |
2137 | gcc_assert (fde->vdrap_reg == INVALID_REGNUM); | |
2138 | if (REG_P (n)) | |
559e966b | 2139 | fde->vdrap_reg = dwf_regno (n); |
dcdf448e | 2140 | } |
2141 | } | |
2142 | handled_one = true; | |
2143 | break; | |
2144 | ||
904601aa | 2145 | case REG_CFA_TOGGLE_RA_MANGLE: |
098b819f | 2146 | /* This uses the same DWARF opcode as the next operation. */ |
2147 | dwarf2out_frame_debug_cfa_window_save (true); | |
2148 | handled_one = true; | |
2149 | break; | |
2150 | ||
dcdf448e | 2151 | case REG_CFA_WINDOW_SAVE: |
098b819f | 2152 | dwarf2out_frame_debug_cfa_window_save (false); |
dcdf448e | 2153 | handled_one = true; |
2154 | break; | |
2155 | ||
2156 | case REG_CFA_FLUSH_QUEUE: | |
637c318f | 2157 | /* The actual flush happens elsewhere. */ |
dcdf448e | 2158 | handled_one = true; |
2159 | break; | |
2160 | ||
2161 | default: | |
2162 | break; | |
2163 | } | |
2164 | ||
637c318f | 2165 | if (!handled_one) |
dcdf448e | 2166 | { |
50fc2d35 | 2167 | pat = PATTERN (insn); |
dcdf448e | 2168 | do_frame_expr: |
50fc2d35 | 2169 | dwarf2out_frame_debug_expr (pat); |
dcdf448e | 2170 | |
2171 | /* Check again. A parallel can save and update the same register. | |
2172 | We could probably check just once, here, but this is safer than | |
2173 | removing the check at the start of the function. */ | |
50fc2d35 | 2174 | if (clobbers_queued_reg_save (pat)) |
637c318f | 2175 | dwarf2out_flush_queued_reg_saves (); |
dcdf448e | 2176 | } |
dcdf448e | 2177 | } |
2178 | ||
0b3b5cad | 2179 | /* Emit CFI info to change the state from OLD_ROW to NEW_ROW. */ |
2180 | ||
2181 | static void | |
1b1ea44c | 2182 | change_cfi_row (dw_cfi_row *old_row, dw_cfi_row *new_row) |
0b3b5cad | 2183 | { |
2184 | size_t i, n_old, n_new, n_max; | |
2185 | dw_cfi_ref cfi; | |
2186 | ||
2187 | if (new_row->cfa_cfi && !cfi_equal_p (old_row->cfa_cfi, new_row->cfa_cfi)) | |
2188 | add_cfi (new_row->cfa_cfi); | |
2189 | else | |
2190 | { | |
2191 | cfi = def_cfa_0 (&old_row->cfa, &new_row->cfa); | |
2192 | if (cfi) | |
2193 | add_cfi (cfi); | |
2194 | } | |
2195 | ||
f1f41a6c | 2196 | n_old = vec_safe_length (old_row->reg_save); |
2197 | n_new = vec_safe_length (new_row->reg_save); | |
0b3b5cad | 2198 | n_max = MAX (n_old, n_new); |
2199 | ||
2200 | for (i = 0; i < n_max; ++i) | |
2201 | { | |
2202 | dw_cfi_ref r_old = NULL, r_new = NULL; | |
2203 | ||
2204 | if (i < n_old) | |
f1f41a6c | 2205 | r_old = (*old_row->reg_save)[i]; |
0b3b5cad | 2206 | if (i < n_new) |
f1f41a6c | 2207 | r_new = (*new_row->reg_save)[i]; |
0b3b5cad | 2208 | |
2209 | if (r_old == r_new) | |
2210 | ; | |
2211 | else if (r_new == NULL) | |
2212 | add_cfi_restore (i); | |
2213 | else if (!cfi_equal_p (r_old, r_new)) | |
2214 | add_cfi (r_new); | |
2215 | } | |
098b819f | 2216 | |
2217 | if (!old_row->window_save && new_row->window_save) | |
2218 | { | |
2219 | dw_cfi_ref cfi = new_cfi (); | |
2220 | ||
2221 | cfi->dw_cfi_opc = DW_CFA_GNU_window_save; | |
2222 | add_cfi (cfi); | |
2223 | } | |
0b3b5cad | 2224 | } |
2225 | ||
c746c5c3 | 2226 | /* Examine CFI and return true if a cfi label and set_loc is needed |
2227 | beforehand. Even when generating CFI assembler instructions, we | |
4a7a4715 | 2228 | still have to add the cfi to the list so that lookup_cfa_1 works |
c746c5c3 | 2229 | later on. When -g2 and above we even need to force emitting of |
2230 | CFI labels and add to list a DW_CFA_set_loc for convert_cfa_to_fb_loc_list | |
2231 | purposes. If we're generating DWARF3 output we use DW_OP_call_frame_cfa | |
2232 | and so don't use convert_cfa_to_fb_loc_list. */ | |
2233 | ||
2234 | static bool | |
2235 | cfi_label_required_p (dw_cfi_ref cfi) | |
2236 | { | |
2237 | if (!dwarf2out_do_cfi_asm ()) | |
2238 | return true; | |
2239 | ||
2240 | if (dwarf_version == 2 | |
2241 | && debug_info_level > DINFO_LEVEL_TERSE | |
2242 | && (write_symbols == DWARF2_DEBUG | |
2243 | || write_symbols == VMS_AND_DWARF2_DEBUG)) | |
2244 | { | |
2245 | switch (cfi->dw_cfi_opc) | |
2246 | { | |
2247 | case DW_CFA_def_cfa_offset: | |
2248 | case DW_CFA_def_cfa_offset_sf: | |
2249 | case DW_CFA_def_cfa_register: | |
2250 | case DW_CFA_def_cfa: | |
2251 | case DW_CFA_def_cfa_sf: | |
2252 | case DW_CFA_def_cfa_expression: | |
2253 | case DW_CFA_restore_state: | |
2254 | return true; | |
2255 | default: | |
2256 | return false; | |
2257 | } | |
2258 | } | |
2259 | return false; | |
2260 | } | |
2261 | ||
2262 | /* Walk the function, looking for NOTE_INSN_CFI notes. Add the CFIs to the | |
2263 | function's FDE, adding CFI labels and set_loc/advance_loc opcodes as | |
2264 | necessary. */ | |
2265 | static void | |
2266 | add_cfis_to_fde (void) | |
2267 | { | |
6033bf11 | 2268 | dw_fde_ref fde = cfun->fde; |
d3a42743 | 2269 | rtx_insn *insn, *next; |
c746c5c3 | 2270 | |
2271 | for (insn = get_insns (); insn; insn = next) | |
2272 | { | |
2273 | next = NEXT_INSN (insn); | |
2274 | ||
2275 | if (NOTE_P (insn) && NOTE_KIND (insn) == NOTE_INSN_SWITCH_TEXT_SECTIONS) | |
60ae1042 | 2276 | fde->dw_fde_switch_cfi_index = vec_safe_length (fde->dw_fde_cfi); |
c746c5c3 | 2277 | |
2278 | if (NOTE_P (insn) && NOTE_KIND (insn) == NOTE_INSN_CFI) | |
2279 | { | |
2280 | bool required = cfi_label_required_p (NOTE_CFI (insn)); | |
08cc385a | 2281 | while (next) |
2282 | if (NOTE_P (next) && NOTE_KIND (next) == NOTE_INSN_CFI) | |
2283 | { | |
2284 | required |= cfi_label_required_p (NOTE_CFI (next)); | |
2285 | next = NEXT_INSN (next); | |
2286 | } | |
2287 | else if (active_insn_p (next) | |
2288 | || (NOTE_P (next) && (NOTE_KIND (next) | |
2289 | == NOTE_INSN_SWITCH_TEXT_SECTIONS))) | |
2290 | break; | |
2291 | else | |
c746c5c3 | 2292 | next = NEXT_INSN (next); |
c746c5c3 | 2293 | if (required) |
2294 | { | |
2295 | int num = dwarf2out_cfi_label_num; | |
2296 | const char *label = dwarf2out_cfi_label (); | |
2297 | dw_cfi_ref xcfi; | |
c746c5c3 | 2298 | |
2299 | /* Set the location counter to the new label. */ | |
2300 | xcfi = new_cfi (); | |
60ae1042 | 2301 | xcfi->dw_cfi_opc = DW_CFA_advance_loc4; |
c746c5c3 | 2302 | xcfi->dw_cfi_oprnd1.dw_cfi_addr = label; |
f1f41a6c | 2303 | vec_safe_push (fde->dw_fde_cfi, xcfi); |
c746c5c3 | 2304 | |
9ed997be | 2305 | rtx_note *tmp = emit_note_before (NOTE_INSN_CFI_LABEL, insn); |
c746c5c3 | 2306 | NOTE_LABEL_NUMBER (tmp) = num; |
2307 | } | |
2308 | ||
2309 | do | |
2310 | { | |
08cc385a | 2311 | if (NOTE_P (insn) && NOTE_KIND (insn) == NOTE_INSN_CFI) |
f1f41a6c | 2312 | vec_safe_push (fde->dw_fde_cfi, NOTE_CFI (insn)); |
c746c5c3 | 2313 | insn = NEXT_INSN (insn); |
2314 | } | |
2315 | while (insn != next); | |
c746c5c3 | 2316 | } |
2317 | } | |
2318 | } | |
2319 | ||
e98fc15a | 2320 | static void dump_cfi_row (FILE *f, dw_cfi_row *row); |
2321 | ||
97c251e4 | 2322 | /* If LABEL is the start of a trace, then initialize the state of that |
2323 | trace from CUR_TRACE and CUR_ROW. */ | |
b1613fc3 | 2324 | |
fe2dc6d6 | 2325 | static void |
f6d940f9 | 2326 | maybe_record_trace_start (rtx_insn *start, rtx_insn *origin) |
c746c5c3 | 2327 | { |
97c251e4 | 2328 | dw_trace_info *ti; |
97c251e4 | 2329 | |
2330 | ti = get_trace_info (start); | |
2331 | gcc_assert (ti != NULL); | |
dcdf448e | 2332 | |
97c251e4 | 2333 | if (dump_file) |
dcdf448e | 2334 | { |
97c251e4 | 2335 | fprintf (dump_file, " saw edge from trace %u to %u (via %s %d)\n", |
ce4a64fd | 2336 | cur_trace->id, ti->id, |
97c251e4 | 2337 | (origin ? rtx_name[(int) GET_CODE (origin)] : "fallthru"), |
2338 | (origin ? INSN_UID (origin) : 0)); | |
2339 | } | |
46346a52 | 2340 | |
f6a1fc98 | 2341 | poly_int64 args_size = cur_trace->end_true_args_size; |
97c251e4 | 2342 | if (ti->beg_row == NULL) |
2343 | { | |
2344 | /* This is the first time we've encountered this trace. Propagate | |
2345 | state across the edge and push the trace onto the work list. */ | |
2346 | ti->beg_row = copy_cfi_row (cur_row); | |
dfe00a8f | 2347 | ti->beg_true_args_size = args_size; |
eb656671 | 2348 | |
97c251e4 | 2349 | ti->cfa_store = cur_trace->cfa_store; |
2350 | ti->cfa_temp = cur_trace->cfa_temp; | |
f1f41a6c | 2351 | ti->regs_saved_in_regs = cur_trace->regs_saved_in_regs.copy (); |
97c251e4 | 2352 | |
f1f41a6c | 2353 | trace_work_list.safe_push (ti); |
97c251e4 | 2354 | |
2355 | if (dump_file) | |
ce4a64fd | 2356 | fprintf (dump_file, "\tpush trace %u to worklist\n", ti->id); |
97c251e4 | 2357 | } |
2358 | else | |
2359 | { | |
dfe00a8f | 2360 | |
97c251e4 | 2361 | /* We ought to have the same state incoming to a given trace no |
2362 | matter how we arrive at the trace. Anything else means we've | |
2363 | got some kind of optimization error. */ | |
e98fc15a | 2364 | #if CHECKING_P |
2365 | if (!cfi_row_equal_p (cur_row, ti->beg_row)) | |
2366 | { | |
2367 | if (dump_file) | |
2368 | { | |
2369 | fprintf (dump_file, "Inconsistent CFI state!\n"); | |
2370 | fprintf (dump_file, "SHOULD have:\n"); | |
2371 | dump_cfi_row (dump_file, ti->beg_row); | |
2372 | fprintf (dump_file, "DO have:\n"); | |
2373 | dump_cfi_row (dump_file, cur_row); | |
2374 | } | |
2375 | ||
2376 | gcc_unreachable (); | |
2377 | } | |
2378 | #endif | |
dfe00a8f | 2379 | |
2380 | /* The args_size is allowed to conflict if it isn't actually used. */ | |
f6a1fc98 | 2381 | if (maybe_ne (ti->beg_true_args_size, args_size)) |
dfe00a8f | 2382 | ti->args_size_undefined = true; |
2383 | } | |
2384 | } | |
2385 | ||
2386 | /* Similarly, but handle the args_size and CFA reset across EH | |
2387 | and non-local goto edges. */ | |
2388 | ||
2389 | static void | |
f6d940f9 | 2390 | maybe_record_trace_start_abnormal (rtx_insn *start, rtx_insn *origin) |
dfe00a8f | 2391 | { |
f6a1fc98 | 2392 | poly_int64 save_args_size, delta; |
dfe00a8f | 2393 | dw_cfa_location save_cfa; |
2394 | ||
2395 | save_args_size = cur_trace->end_true_args_size; | |
f6a1fc98 | 2396 | if (known_eq (save_args_size, 0)) |
dfe00a8f | 2397 | { |
2398 | maybe_record_trace_start (start, origin); | |
2399 | return; | |
2400 | } | |
2401 | ||
2402 | delta = -save_args_size; | |
2403 | cur_trace->end_true_args_size = 0; | |
2404 | ||
2405 | save_cfa = cur_row->cfa; | |
2406 | if (cur_row->cfa.reg == dw_stack_pointer_regnum) | |
2407 | { | |
2408 | /* Convert a change in args_size (always a positive in the | |
2409 | direction of stack growth) to a change in stack pointer. */ | |
3764c94e | 2410 | if (!STACK_GROWS_DOWNWARD) |
2411 | delta = -delta; | |
2412 | ||
dfe00a8f | 2413 | cur_row->cfa.offset += delta; |
97c251e4 | 2414 | } |
dfe00a8f | 2415 | |
2416 | maybe_record_trace_start (start, origin); | |
2417 | ||
2418 | cur_trace->end_true_args_size = save_args_size; | |
2419 | cur_row->cfa = save_cfa; | |
97c251e4 | 2420 | } |
a6b622eb | 2421 | |
97c251e4 | 2422 | /* Propagate CUR_TRACE state to the destinations implied by INSN. */ |
2423 | /* ??? Sadly, this is in large part a duplicate of make_edges. */ | |
2424 | ||
2425 | static void | |
f6d940f9 | 2426 | create_trace_edges (rtx_insn *insn) |
97c251e4 | 2427 | { |
ae799283 | 2428 | rtx tmp; |
97c251e4 | 2429 | int i, n; |
2430 | ||
2431 | if (JUMP_P (insn)) | |
2432 | { | |
c86d86ff | 2433 | rtx_jump_table_data *table; |
2434 | ||
97c251e4 | 2435 | if (find_reg_note (insn, REG_NON_LOCAL_GOTO, NULL_RTX)) |
dfe00a8f | 2436 | return; |
2437 | ||
c86d86ff | 2438 | if (tablejump_p (insn, NULL, &table)) |
46346a52 | 2439 | { |
b77639be | 2440 | rtvec vec = table->get_labels (); |
97c251e4 | 2441 | |
2442 | n = GET_NUM_ELEM (vec); | |
2443 | for (i = 0; i < n; ++i) | |
2444 | { | |
f6d940f9 | 2445 | rtx_insn *lab = as_a <rtx_insn *> (XEXP (RTVEC_ELT (vec, i), 0)); |
dfe00a8f | 2446 | maybe_record_trace_start (lab, insn); |
97c251e4 | 2447 | } |
7848fa7d | 2448 | |
2449 | /* Handle casesi dispatch insns. */ | |
2450 | if ((tmp = tablejump_casesi_pattern (insn)) != NULL_RTX) | |
2451 | { | |
2452 | rtx_insn * lab = label_ref_label (XEXP (SET_SRC (tmp), 2)); | |
2453 | maybe_record_trace_start (lab, insn); | |
2454 | } | |
97c251e4 | 2455 | } |
2456 | else if (computed_jump_p (insn)) | |
46346a52 | 2457 | { |
de039705 | 2458 | rtx_insn *temp; |
2459 | unsigned int i; | |
2460 | FOR_EACH_VEC_SAFE_ELT (forced_labels, i, temp) | |
2461 | maybe_record_trace_start (temp, insn); | |
97c251e4 | 2462 | } |
2463 | else if (returnjump_p (insn)) | |
2464 | ; | |
2465 | else if ((tmp = extract_asm_operands (PATTERN (insn))) != NULL) | |
2466 | { | |
2467 | n = ASM_OPERANDS_LABEL_LENGTH (tmp); | |
2468 | for (i = 0; i < n; ++i) | |
46346a52 | 2469 | { |
f6d940f9 | 2470 | rtx_insn *lab = |
2471 | as_a <rtx_insn *> (XEXP (ASM_OPERANDS_LABEL (tmp, i), 0)); | |
dfe00a8f | 2472 | maybe_record_trace_start (lab, insn); |
97c251e4 | 2473 | } |
2474 | } | |
2475 | else | |
2476 | { | |
f6d940f9 | 2477 | rtx_insn *lab = JUMP_LABEL_AS_INSN (insn); |
97c251e4 | 2478 | gcc_assert (lab != NULL); |
dfe00a8f | 2479 | maybe_record_trace_start (lab, insn); |
97c251e4 | 2480 | } |
2481 | } | |
2482 | else if (CALL_P (insn)) | |
2483 | { | |
2484 | /* Sibling calls don't have edges inside this function. */ | |
2485 | if (SIBLING_CALL_P (insn)) | |
2486 | return; | |
de9b0618 | 2487 | |
97c251e4 | 2488 | /* Process non-local goto edges. */ |
2489 | if (can_nonlocal_goto (insn)) | |
a4de1c23 | 2490 | for (rtx_insn_list *lab = nonlocal_goto_handler_labels; |
6e16e157 | 2491 | lab; |
2492 | lab = lab->next ()) | |
a4de1c23 | 2493 | maybe_record_trace_start_abnormal (lab->insn (), insn); |
97c251e4 | 2494 | } |
b873289f | 2495 | else if (rtx_sequence *seq = dyn_cast <rtx_sequence *> (PATTERN (insn))) |
ad5618b3 | 2496 | { |
b873289f | 2497 | int i, n = seq->len (); |
ad5618b3 | 2498 | for (i = 0; i < n; ++i) |
b873289f | 2499 | create_trace_edges (seq->insn (i)); |
ad5618b3 | 2500 | return; |
2501 | } | |
de9b0618 | 2502 | |
97c251e4 | 2503 | /* Process EH edges. */ |
2504 | if (CALL_P (insn) || cfun->can_throw_non_call_exceptions) | |
2505 | { | |
2506 | eh_landing_pad lp = get_eh_landing_pad_from_rtx (insn); | |
2507 | if (lp) | |
dfe00a8f | 2508 | maybe_record_trace_start_abnormal (lp->landing_pad, insn); |
97c251e4 | 2509 | } |
2510 | } | |
0b3b5cad | 2511 | |
4d256106 | 2512 | /* A subroutine of scan_trace. Do what needs to be done "after" INSN. */ |
2513 | ||
2514 | static void | |
50fc2d35 | 2515 | scan_insn_after (rtx_insn *insn) |
4d256106 | 2516 | { |
2517 | if (RTX_FRAME_RELATED_P (insn)) | |
2518 | dwarf2out_frame_debug (insn); | |
2519 | notice_args_size (insn); | |
2520 | } | |
2521 | ||
97c251e4 | 2522 | /* Scan the trace beginning at INSN and create the CFI notes for the |
2523 | instructions therein. */ | |
2524 | ||
2525 | static void | |
a03863ae | 2526 | scan_trace (dw_trace_info *trace, bool entry) |
97c251e4 | 2527 | { |
f6d940f9 | 2528 | rtx_insn *prev, *insn = trace->head; |
dfe00a8f | 2529 | dw_cfa_location this_cfa; |
97c251e4 | 2530 | |
2531 | if (dump_file) | |
2532 | fprintf (dump_file, "Processing trace %u : start at %s %d\n", | |
ce4a64fd | 2533 | trace->id, rtx_name[(int) GET_CODE (insn)], |
97c251e4 | 2534 | INSN_UID (insn)); |
2535 | ||
2536 | trace->end_row = copy_cfi_row (trace->beg_row); | |
dfe00a8f | 2537 | trace->end_true_args_size = trace->beg_true_args_size; |
97c251e4 | 2538 | |
2539 | cur_trace = trace; | |
2540 | cur_row = trace->end_row; | |
dfe00a8f | 2541 | |
2542 | this_cfa = cur_row->cfa; | |
2543 | cur_cfa = &this_cfa; | |
97c251e4 | 2544 | |
a03863ae | 2545 | /* If the current function starts with a non-standard incoming frame |
2546 | sp offset, emit a note before the first instruction. */ | |
2547 | if (entry | |
2548 | && DEFAULT_INCOMING_FRAME_SP_OFFSET != INCOMING_FRAME_SP_OFFSET) | |
2549 | { | |
2550 | add_cfi_insn = insn; | |
2551 | gcc_assert (NOTE_P (insn) && NOTE_KIND (insn) == NOTE_INSN_DELETED); | |
2552 | this_cfa.offset = INCOMING_FRAME_SP_OFFSET; | |
2553 | def_cfa_1 (&this_cfa); | |
2554 | } | |
2555 | ||
4d256106 | 2556 | for (prev = insn, insn = NEXT_INSN (insn); |
2557 | insn; | |
2558 | prev = insn, insn = NEXT_INSN (insn)) | |
97c251e4 | 2559 | { |
f6d940f9 | 2560 | rtx_insn *control; |
4d256106 | 2561 | |
dfe00a8f | 2562 | /* Do everything that happens "before" the insn. */ |
4d256106 | 2563 | add_cfi_insn = prev; |
97c251e4 | 2564 | |
2565 | /* Notice the end of a trace. */ | |
dfe00a8f | 2566 | if (BARRIER_P (insn)) |
2567 | { | |
2568 | /* Don't bother saving the unneeded queued registers at all. */ | |
f1f41a6c | 2569 | queued_reg_saves.truncate (0); |
dfe00a8f | 2570 | break; |
2571 | } | |
2572 | if (save_point_p (insn)) | |
97c251e4 | 2573 | { |
97c251e4 | 2574 | /* Propagate across fallthru edges. */ |
dfe00a8f | 2575 | dwarf2out_flush_queued_reg_saves (); |
2576 | maybe_record_trace_start (insn, NULL); | |
97c251e4 | 2577 | break; |
46346a52 | 2578 | } |
2579 | ||
97c251e4 | 2580 | if (DEBUG_INSN_P (insn) || !inside_basic_block_p (insn)) |
46346a52 | 2581 | continue; |
2582 | ||
4d256106 | 2583 | /* Handle all changes to the row state. Sequences require special |
2584 | handling for the positioning of the notes. */ | |
b873289f | 2585 | if (rtx_sequence *pat = dyn_cast <rtx_sequence *> (PATTERN (insn))) |
46346a52 | 2586 | { |
50fc2d35 | 2587 | rtx_insn *elt; |
b873289f | 2588 | int i, n = pat->len (); |
dfe00a8f | 2589 | |
f6d940f9 | 2590 | control = pat->insn (0); |
4d256106 | 2591 | if (can_throw_internal (control)) |
2592 | notice_eh_throw (control); | |
2593 | dwarf2out_flush_queued_reg_saves (); | |
2594 | ||
7e66a69e | 2595 | if (JUMP_P (control) && INSN_ANNULLED_BRANCH_P (control)) |
97c251e4 | 2596 | { |
dfe00a8f | 2597 | /* ??? Hopefully multiple delay slots are not annulled. */ |
2598 | gcc_assert (n == 2); | |
4d256106 | 2599 | gcc_assert (!RTX_FRAME_RELATED_P (control)); |
2600 | gcc_assert (!find_reg_note (control, REG_ARGS_SIZE, NULL)); | |
2601 | ||
50fc2d35 | 2602 | elt = pat->insn (1); |
dfe00a8f | 2603 | |
dfe00a8f | 2604 | if (INSN_FROM_TARGET_P (elt)) |
2605 | { | |
e2ab608c | 2606 | cfi_vec save_row_reg_save; |
97c251e4 | 2607 | |
dfed30bc | 2608 | /* If ELT is an instruction from target of an annulled |
2609 | branch, the effects are for the target only and so | |
2610 | the args_size and CFA along the current path | |
2611 | shouldn't change. */ | |
4d256106 | 2612 | add_cfi_insn = NULL; |
f6a1fc98 | 2613 | poly_int64 restore_args_size = cur_trace->end_true_args_size; |
dfe00a8f | 2614 | cur_cfa = &cur_row->cfa; |
f1f41a6c | 2615 | save_row_reg_save = vec_safe_copy (cur_row->reg_save); |
46346a52 | 2616 | |
4d256106 | 2617 | scan_insn_after (elt); |
2618 | ||
2619 | /* ??? Should we instead save the entire row state? */ | |
f1f41a6c | 2620 | gcc_assert (!queued_reg_saves.length ()); |
4d256106 | 2621 | |
2622 | create_trace_edges (control); | |
46346a52 | 2623 | |
dfe00a8f | 2624 | cur_trace->end_true_args_size = restore_args_size; |
2625 | cur_row->cfa = this_cfa; | |
e2ab608c | 2626 | cur_row->reg_save = save_row_reg_save; |
dfe00a8f | 2627 | cur_cfa = &this_cfa; |
dfe00a8f | 2628 | } |
dfed30bc | 2629 | else |
2630 | { | |
2631 | /* If ELT is a annulled branch-taken instruction (i.e. | |
2632 | executed only when branch is not taken), the args_size | |
2633 | and CFA should not change through the jump. */ | |
2634 | create_trace_edges (control); | |
2635 | ||
2636 | /* Update and continue with the trace. */ | |
2637 | add_cfi_insn = insn; | |
2638 | scan_insn_after (elt); | |
2639 | def_cfa_1 (&this_cfa); | |
2640 | } | |
2641 | continue; | |
dfe00a8f | 2642 | } |
2643 | ||
4d256106 | 2644 | /* The insns in the delay slot should all be considered to happen |
2645 | "before" a call insn. Consider a call with a stack pointer | |
2646 | adjustment in the delay slot. The backtrace from the callee | |
2647 | should include the sp adjustment. Unfortunately, that leaves | |
2648 | us with an unavoidable unwinding error exactly at the call insn | |
2649 | itself. For jump insns we'd prefer to avoid this error by | |
2650 | placing the notes after the sequence. */ | |
2651 | if (JUMP_P (control)) | |
2652 | add_cfi_insn = insn; | |
2653 | ||
dfe00a8f | 2654 | for (i = 1; i < n; ++i) |
2655 | { | |
50fc2d35 | 2656 | elt = pat->insn (i); |
4d256106 | 2657 | scan_insn_after (elt); |
dfe00a8f | 2658 | } |
4d256106 | 2659 | |
2660 | /* Make sure any register saves are visible at the jump target. */ | |
2661 | dwarf2out_flush_queued_reg_saves (); | |
637c318f | 2662 | any_cfis_emitted = false; |
4d256106 | 2663 | |
2664 | /* However, if there is some adjustment on the call itself, e.g. | |
2665 | a call_pop, that action should be considered to happen after | |
2666 | the call returns. */ | |
2667 | add_cfi_insn = insn; | |
2668 | scan_insn_after (control); | |
97c251e4 | 2669 | } |
dfe00a8f | 2670 | else |
4d256106 | 2671 | { |
2672 | /* Flush data before calls and jumps, and of course if necessary. */ | |
2673 | if (can_throw_internal (insn)) | |
2674 | { | |
2675 | notice_eh_throw (insn); | |
2676 | dwarf2out_flush_queued_reg_saves (); | |
2677 | } | |
2678 | else if (!NONJUMP_INSN_P (insn) | |
2679 | || clobbers_queued_reg_save (insn) | |
2680 | || find_reg_note (insn, REG_CFA_FLUSH_QUEUE, NULL)) | |
2681 | dwarf2out_flush_queued_reg_saves (); | |
637c318f | 2682 | any_cfis_emitted = false; |
4d256106 | 2683 | |
2684 | add_cfi_insn = insn; | |
2685 | scan_insn_after (insn); | |
2686 | control = insn; | |
2687 | } | |
dfe00a8f | 2688 | |
2689 | /* Between frame-related-p and args_size we might have otherwise | |
2690 | emitted two cfa adjustments. Do it now. */ | |
2691 | def_cfa_1 (&this_cfa); | |
a6b622eb | 2692 | |
637c318f | 2693 | /* Minimize the number of advances by emitting the entire queue |
2694 | once anything is emitted. */ | |
2695 | if (any_cfis_emitted | |
2696 | || find_reg_note (insn, REG_CFA_FLUSH_QUEUE, NULL)) | |
2697 | dwarf2out_flush_queued_reg_saves (); | |
2698 | ||
97c251e4 | 2699 | /* Note that a test for control_flow_insn_p does exactly the |
2700 | same tests as are done to actually create the edges. So | |
2701 | always call the routine and let it not create edges for | |
2702 | non-control-flow insns. */ | |
4d256106 | 2703 | create_trace_edges (control); |
dcdf448e | 2704 | } |
a6b622eb | 2705 | |
7b1c31a0 | 2706 | add_cfi_insn = NULL; |
97c251e4 | 2707 | cur_row = NULL; |
2708 | cur_trace = NULL; | |
dfe00a8f | 2709 | cur_cfa = NULL; |
dcdf448e | 2710 | } |
2711 | ||
97c251e4 | 2712 | /* Scan the function and create the initial set of CFI notes. */ |
dcdf448e | 2713 | |
46346a52 | 2714 | static void |
97c251e4 | 2715 | create_cfi_notes (void) |
dcdf448e | 2716 | { |
97c251e4 | 2717 | dw_trace_info *ti; |
dcdf448e | 2718 | |
f1f41a6c | 2719 | gcc_checking_assert (!queued_reg_saves.exists ()); |
2720 | gcc_checking_assert (!trace_work_list.exists ()); | |
dcdf448e | 2721 | |
97c251e4 | 2722 | /* Always begin at the entry trace. */ |
f1f41a6c | 2723 | ti = &trace_info[0]; |
a03863ae | 2724 | scan_trace (ti, true); |
dcdf448e | 2725 | |
f1f41a6c | 2726 | while (!trace_work_list.is_empty ()) |
97c251e4 | 2727 | { |
f1f41a6c | 2728 | ti = trace_work_list.pop (); |
a03863ae | 2729 | scan_trace (ti, false); |
dcdf448e | 2730 | } |
2731 | ||
f1f41a6c | 2732 | queued_reg_saves.release (); |
2733 | trace_work_list.release (); | |
97c251e4 | 2734 | } |
dcdf448e | 2735 | |
ce4a64fd | 2736 | /* Return the insn before the first NOTE_INSN_CFI after START. */ |
2737 | ||
4cd001d5 | 2738 | static rtx_insn * |
2739 | before_next_cfi_note (rtx_insn *start) | |
ce4a64fd | 2740 | { |
4cd001d5 | 2741 | rtx_insn *prev = start; |
ce4a64fd | 2742 | while (start) |
2743 | { | |
2744 | if (NOTE_P (start) && NOTE_KIND (start) == NOTE_INSN_CFI) | |
2745 | return prev; | |
2746 | prev = start; | |
2747 | start = NEXT_INSN (start); | |
2748 | } | |
2749 | gcc_unreachable (); | |
2750 | } | |
2751 | ||
97c251e4 | 2752 | /* Insert CFI notes between traces to properly change state between them. */ |
dcdf448e | 2753 | |
97c251e4 | 2754 | static void |
2755 | connect_traces (void) | |
2756 | { | |
620610fa | 2757 | unsigned i, n; |
97c251e4 | 2758 | dw_trace_info *prev_ti, *ti; |
2759 | ||
ce4a64fd | 2760 | /* ??? Ideally, we should have both queued and processed every trace. |
2761 | However the current representation of constant pools on various targets | |
2762 | is indistinguishable from unreachable code. Assume for the moment that | |
2763 | we can simply skip over such traces. */ | |
2764 | /* ??? Consider creating a DATA_INSN rtx code to indicate that | |
2765 | these are not "real" instructions, and should not be considered. | |
2766 | This could be generically useful for tablejump data as well. */ | |
2767 | /* Remove all unprocessed traces from the list. */ | |
620610fa | 2768 | unsigned ix, ix2; |
2769 | VEC_ORDERED_REMOVE_IF_FROM_TO (trace_info, ix, ix2, ti, 1, | |
2770 | trace_info.length (), ti->beg_row == NULL); | |
2771 | FOR_EACH_VEC_ELT (trace_info, ix, ti) | |
2772 | gcc_assert (ti->end_row != NULL); | |
97c251e4 | 2773 | |
ce4a64fd | 2774 | /* Work from the end back to the beginning. This lets us easily insert |
2775 | remember/restore_state notes in the correct order wrt other notes. */ | |
620610fa | 2776 | n = trace_info.length (); |
f1f41a6c | 2777 | prev_ti = &trace_info[n - 1]; |
ce4a64fd | 2778 | for (i = n - 1; i > 0; --i) |
dcdf448e | 2779 | { |
97c251e4 | 2780 | dw_cfi_row *old_row; |
dcdf448e | 2781 | |
ce4a64fd | 2782 | ti = prev_ti; |
f1f41a6c | 2783 | prev_ti = &trace_info[i - 1]; |
dcdf448e | 2784 | |
ce4a64fd | 2785 | add_cfi_insn = ti->head; |
97c251e4 | 2786 | |
2787 | /* In dwarf2out_switch_text_section, we'll begin a new FDE | |
2788 | for the portion of the function in the alternate text | |
2789 | section. The row state at the very beginning of that | |
2790 | new FDE will be exactly the row state from the CIE. */ | |
2791 | if (ti->switch_sections) | |
2792 | old_row = cie_cfi_row; | |
2793 | else | |
ce4a64fd | 2794 | { |
2795 | old_row = prev_ti->end_row; | |
2796 | /* If there's no change from the previous end state, fine. */ | |
2797 | if (cfi_row_equal_p (old_row, ti->beg_row)) | |
2798 | ; | |
2799 | /* Otherwise check for the common case of sharing state with | |
2800 | the beginning of an epilogue, but not the end. Insert | |
2801 | remember/restore opcodes in that case. */ | |
2802 | else if (cfi_row_equal_p (prev_ti->beg_row, ti->beg_row)) | |
2803 | { | |
2804 | dw_cfi_ref cfi; | |
2805 | ||
2806 | /* Note that if we blindly insert the remember at the | |
2807 | start of the trace, we can wind up increasing the | |
2808 | size of the unwind info due to extra advance opcodes. | |
2809 | Instead, put the remember immediately before the next | |
2810 | state change. We know there must be one, because the | |
2811 | state at the beginning and head of the trace differ. */ | |
2812 | add_cfi_insn = before_next_cfi_note (prev_ti->head); | |
2813 | cfi = new_cfi (); | |
2814 | cfi->dw_cfi_opc = DW_CFA_remember_state; | |
2815 | add_cfi (cfi); | |
2816 | ||
2817 | add_cfi_insn = ti->head; | |
2818 | cfi = new_cfi (); | |
2819 | cfi->dw_cfi_opc = DW_CFA_restore_state; | |
2820 | add_cfi (cfi); | |
2821 | ||
2822 | old_row = prev_ti->beg_row; | |
2823 | } | |
2824 | /* Otherwise, we'll simply change state from the previous end. */ | |
2825 | } | |
97c251e4 | 2826 | |
97c251e4 | 2827 | change_cfi_row (old_row, ti->beg_row); |
2828 | ||
2829 | if (dump_file && add_cfi_insn != ti->head) | |
2830 | { | |
4cd001d5 | 2831 | rtx_insn *note; |
97c251e4 | 2832 | |
ce4a64fd | 2833 | fprintf (dump_file, "Fixup between trace %u and %u:\n", |
2834 | prev_ti->id, ti->id); | |
97c251e4 | 2835 | |
2836 | note = ti->head; | |
2837 | do | |
2838 | { | |
2839 | note = NEXT_INSN (note); | |
2840 | gcc_assert (NOTE_P (note) && NOTE_KIND (note) == NOTE_INSN_CFI); | |
2841 | output_cfi_directive (dump_file, NOTE_CFI (note)); | |
2842 | } | |
2843 | while (note != add_cfi_insn); | |
2844 | } | |
2845 | } | |
dfe00a8f | 2846 | |
2847 | /* Connect args_size between traces that have can_throw_internal insns. */ | |
f1f41a6c | 2848 | if (cfun->eh->lp_array) |
dfe00a8f | 2849 | { |
f6a1fc98 | 2850 | poly_int64 prev_args_size = 0; |
dfe00a8f | 2851 | |
2852 | for (i = 0; i < n; ++i) | |
2853 | { | |
f1f41a6c | 2854 | ti = &trace_info[i]; |
dfe00a8f | 2855 | |
2856 | if (ti->switch_sections) | |
2857 | prev_args_size = 0; | |
6a3756e4 | 2858 | |
dfe00a8f | 2859 | if (ti->eh_head == NULL) |
2860 | continue; | |
dfe00a8f | 2861 | |
6a3756e4 | 2862 | /* We require either the incoming args_size values to match or the |
2863 | presence of an insn setting it before the first EH insn. */ | |
2864 | gcc_assert (!ti->args_size_undefined || ti->args_size_defined_for_eh); | |
2865 | ||
2866 | /* In the latter case, we force the creation of a CFI note. */ | |
2867 | if (ti->args_size_undefined | |
2868 | || maybe_ne (ti->beg_delay_args_size, prev_args_size)) | |
dfe00a8f | 2869 | { |
2870 | /* ??? Search back to previous CFI note. */ | |
2871 | add_cfi_insn = PREV_INSN (ti->eh_head); | |
2872 | add_cfi_args_size (ti->beg_delay_args_size); | |
2873 | } | |
2874 | ||
2875 | prev_args_size = ti->end_delay_args_size; | |
2876 | } | |
2877 | } | |
dcdf448e | 2878 | } |
2879 | ||
97c251e4 | 2880 | /* Set up the pseudo-cfg of instruction traces, as described at the |
2881 | block comment at the top of the file. */ | |
dcdf448e | 2882 | |
46346a52 | 2883 | static void |
97c251e4 | 2884 | create_pseudo_cfg (void) |
dcdf448e | 2885 | { |
97c251e4 | 2886 | bool saw_barrier, switch_sections; |
e82e4eb5 | 2887 | dw_trace_info ti; |
d3a42743 | 2888 | rtx_insn *insn; |
97c251e4 | 2889 | unsigned i; |
2890 | ||
2891 | /* The first trace begins at the start of the function, | |
2892 | and begins with the CIE row state. */ | |
f1f41a6c | 2893 | trace_info.create (16); |
e82e4eb5 | 2894 | memset (&ti, 0, sizeof (ti)); |
2895 | ti.head = get_insns (); | |
2896 | ti.beg_row = cie_cfi_row; | |
2897 | ti.cfa_store = cie_cfi_row->cfa; | |
2898 | ti.cfa_temp.reg = INVALID_REGNUM; | |
f1f41a6c | 2899 | trace_info.quick_push (ti); |
97c251e4 | 2900 | |
97c251e4 | 2901 | if (cie_return_save) |
f1f41a6c | 2902 | ti.regs_saved_in_regs.safe_push (*cie_return_save); |
dcdf448e | 2903 | |
97c251e4 | 2904 | /* Walk all the insns, collecting start of trace locations. */ |
2905 | saw_barrier = false; | |
2906 | switch_sections = false; | |
2907 | for (insn = get_insns (); insn; insn = NEXT_INSN (insn)) | |
2908 | { | |
2909 | if (BARRIER_P (insn)) | |
2910 | saw_barrier = true; | |
2911 | else if (NOTE_P (insn) | |
2912 | && NOTE_KIND (insn) == NOTE_INSN_SWITCH_TEXT_SECTIONS) | |
2913 | { | |
2914 | /* We should have just seen a barrier. */ | |
2915 | gcc_assert (saw_barrier); | |
2916 | switch_sections = true; | |
2917 | } | |
2918 | /* Watch out for save_point notes between basic blocks. | |
2919 | In particular, a note after a barrier. Do not record these, | |
2920 | delaying trace creation until the label. */ | |
2921 | else if (save_point_p (insn) | |
2922 | && (LABEL_P (insn) || !saw_barrier)) | |
2923 | { | |
e82e4eb5 | 2924 | memset (&ti, 0, sizeof (ti)); |
2925 | ti.head = insn; | |
2926 | ti.switch_sections = switch_sections; | |
91c603de | 2927 | ti.id = trace_info.length (); |
f1f41a6c | 2928 | trace_info.safe_push (ti); |
97c251e4 | 2929 | |
2930 | saw_barrier = false; | |
2931 | switch_sections = false; | |
2932 | } | |
2933 | } | |
2934 | ||
2935 | /* Create the trace index after we've finished building trace_info, | |
2936 | avoiding stale pointer problems due to reallocation. */ | |
c1f445d2 | 2937 | trace_index |
2938 | = new hash_table<trace_info_hasher> (trace_info.length ()); | |
e82e4eb5 | 2939 | dw_trace_info *tp; |
f1f41a6c | 2940 | FOR_EACH_VEC_ELT (trace_info, i, tp) |
97c251e4 | 2941 | { |
d9dd21a8 | 2942 | dw_trace_info **slot; |
dcdf448e | 2943 | |
97c251e4 | 2944 | if (dump_file) |
91c603de | 2945 | fprintf (dump_file, "Creating trace %u : start at %s %d%s\n", tp->id, |
e82e4eb5 | 2946 | rtx_name[(int) GET_CODE (tp->head)], INSN_UID (tp->head), |
2947 | tp->switch_sections ? " (section switch)" : ""); | |
97c251e4 | 2948 | |
c1f445d2 | 2949 | slot = trace_index->find_slot_with_hash (tp, INSN_UID (tp->head), INSERT); |
97c251e4 | 2950 | gcc_assert (*slot == NULL); |
d9dd21a8 | 2951 | *slot = tp; |
97c251e4 | 2952 | } |
dcdf448e | 2953 | } |
97c251e4 | 2954 | |
6ca363a7 | 2955 | /* Record the initial position of the return address. RTL is |
2956 | INCOMING_RETURN_ADDR_RTX. */ | |
2957 | ||
2958 | static void | |
2959 | initial_return_save (rtx rtl) | |
2960 | { | |
2961 | unsigned int reg = INVALID_REGNUM; | |
e1b783f6 | 2962 | poly_int64 offset = 0; |
6ca363a7 | 2963 | |
2964 | switch (GET_CODE (rtl)) | |
2965 | { | |
2966 | case REG: | |
2967 | /* RA is in a register. */ | |
559e966b | 2968 | reg = dwf_regno (rtl); |
6ca363a7 | 2969 | break; |
2970 | ||
2971 | case MEM: | |
2972 | /* RA is on the stack. */ | |
2973 | rtl = XEXP (rtl, 0); | |
2974 | switch (GET_CODE (rtl)) | |
2975 | { | |
2976 | case REG: | |
2977 | gcc_assert (REGNO (rtl) == STACK_POINTER_REGNUM); | |
2978 | offset = 0; | |
2979 | break; | |
2980 | ||
2981 | case PLUS: | |
2982 | gcc_assert (REGNO (XEXP (rtl, 0)) == STACK_POINTER_REGNUM); | |
e1b783f6 | 2983 | offset = rtx_to_poly_int64 (XEXP (rtl, 1)); |
6ca363a7 | 2984 | break; |
2985 | ||
2986 | case MINUS: | |
2987 | gcc_assert (REGNO (XEXP (rtl, 0)) == STACK_POINTER_REGNUM); | |
e1b783f6 | 2988 | offset = -rtx_to_poly_int64 (XEXP (rtl, 1)); |
6ca363a7 | 2989 | break; |
2990 | ||
2991 | default: | |
2992 | gcc_unreachable (); | |
2993 | } | |
2994 | ||
2995 | break; | |
2996 | ||
2997 | case PLUS: | |
2998 | /* The return address is at some offset from any value we can | |
2999 | actually load. For instance, on the SPARC it is in %i7+8. Just | |
3000 | ignore the offset for now; it doesn't matter for unwinding frames. */ | |
3001 | gcc_assert (CONST_INT_P (XEXP (rtl, 1))); | |
3002 | initial_return_save (XEXP (rtl, 0)); | |
3003 | return; | |
3004 | ||
3005 | default: | |
3006 | gcc_unreachable (); | |
3007 | } | |
3008 | ||
3009 | if (reg != DWARF_FRAME_RETURN_COLUMN) | |
3010 | { | |
3011 | if (reg != INVALID_REGNUM) | |
3012 | record_reg_saved_in_reg (rtl, pc_rtx); | |
eb93b3f4 | 3013 | reg_save (DWARF_FRAME_RETURN_COLUMN, reg, offset - cur_row->cfa.offset); |
6ca363a7 | 3014 | } |
3015 | } | |
dcdf448e | 3016 | |
b1613fc3 | 3017 | static void |
3018 | create_cie_data (void) | |
3019 | { | |
3020 | dw_cfa_location loc; | |
3021 | dw_trace_info cie_trace; | |
3022 | ||
3023 | dw_stack_pointer_regnum = DWARF_FRAME_REGNUM (STACK_POINTER_REGNUM); | |
b1613fc3 | 3024 | |
9af5ce0c | 3025 | memset (&cie_trace, 0, sizeof (cie_trace)); |
b1613fc3 | 3026 | cur_trace = &cie_trace; |
3027 | ||
3028 | add_cfi_vec = &cie_cfi_vec; | |
3029 | cie_cfi_row = cur_row = new_cfi_row (); | |
3030 | ||
3031 | /* On entry, the Canonical Frame Address is at SP. */ | |
9af5ce0c | 3032 | memset (&loc, 0, sizeof (loc)); |
b1613fc3 | 3033 | loc.reg = dw_stack_pointer_regnum; |
a03863ae | 3034 | /* create_cie_data is called just once per TU, and when using .cfi_startproc |
3035 | is even done by the assembler rather than the compiler. If the target | |
3036 | has different incoming frame sp offsets depending on what kind of | |
3037 | function it is, use a single constant offset for the target and | |
3038 | if needed, adjust before the first instruction in insn stream. */ | |
3039 | loc.offset = DEFAULT_INCOMING_FRAME_SP_OFFSET; | |
b1613fc3 | 3040 | def_cfa_1 (&loc); |
3041 | ||
3042 | if (targetm.debug_unwind_info () == UI_DWARF2 | |
3043 | || targetm_common.except_unwind_info (&global_options) == UI_DWARF2) | |
3044 | { | |
3045 | initial_return_save (INCOMING_RETURN_ADDR_RTX); | |
3046 | ||
3047 | /* For a few targets, we have the return address incoming into a | |
3048 | register, but choose a different return column. This will result | |
3049 | in a DW_CFA_register for the return, and an entry in | |
3050 | regs_saved_in_regs to match. If the target later stores that | |
3051 | return address register to the stack, we want to be able to emit | |
3052 | the DW_CFA_offset against the return column, not the intermediate | |
3053 | save register. Save the contents of regs_saved_in_regs so that | |
3054 | we can re-initialize it at the start of each function. */ | |
f1f41a6c | 3055 | switch (cie_trace.regs_saved_in_regs.length ()) |
b1613fc3 | 3056 | { |
3057 | case 0: | |
3058 | break; | |
3059 | case 1: | |
25a27413 | 3060 | cie_return_save = ggc_alloc<reg_saved_in_data> (); |
f1f41a6c | 3061 | *cie_return_save = cie_trace.regs_saved_in_regs[0]; |
3062 | cie_trace.regs_saved_in_regs.release (); | |
b1613fc3 | 3063 | break; |
3064 | default: | |
3065 | gcc_unreachable (); | |
3066 | } | |
3067 | } | |
3068 | ||
3069 | add_cfi_vec = NULL; | |
3070 | cur_row = NULL; | |
3071 | cur_trace = NULL; | |
3072 | } | |
3073 | ||
fe2dc6d6 | 3074 | /* Annotate the function with NOTE_INSN_CFI notes to record the CFI |
3075 | state at each location within the function. These notes will be | |
3076 | emitted during pass_final. */ | |
dcdf448e | 3077 | |
fe2dc6d6 | 3078 | static unsigned int |
3079 | execute_dwarf2_frame (void) | |
dcdf448e | 3080 | { |
2d4340b0 | 3081 | /* Different HARD_FRAME_POINTER_REGNUM might coexist in the same file. */ |
3082 | dw_frame_pointer_regnum = DWARF_FRAME_REGNUM (HARD_FRAME_POINTER_REGNUM); | |
3083 | ||
fe2dc6d6 | 3084 | /* The first time we're called, compute the incoming frame state. */ |
3085 | if (cie_cfi_vec == NULL) | |
b1613fc3 | 3086 | create_cie_data (); |
d4898332 | 3087 | |
fe2dc6d6 | 3088 | dwarf2out_alloc_current_fde (); |
3089 | ||
97c251e4 | 3090 | create_pseudo_cfg (); |
3091 | ||
fe2dc6d6 | 3092 | /* Do the work. */ |
3093 | create_cfi_notes (); | |
97c251e4 | 3094 | connect_traces (); |
fe2dc6d6 | 3095 | add_cfis_to_fde (); |
3096 | ||
97c251e4 | 3097 | /* Free all the data we allocated. */ |
3098 | { | |
3099 | size_t i; | |
3100 | dw_trace_info *ti; | |
dcdf448e | 3101 | |
f1f41a6c | 3102 | FOR_EACH_VEC_ELT (trace_info, i, ti) |
3103 | ti->regs_saved_in_regs.release (); | |
97c251e4 | 3104 | } |
f1f41a6c | 3105 | trace_info.release (); |
97c251e4 | 3106 | |
c1f445d2 | 3107 | delete trace_index; |
3108 | trace_index = NULL; | |
eb93b3f4 | 3109 | |
fe2dc6d6 | 3110 | return 0; |
dcdf448e | 3111 | } |
3112 | \f | |
04dfc41a | 3113 | /* Convert a DWARF call frame info. operation to its string name */ |
3114 | ||
3115 | static const char * | |
3116 | dwarf_cfi_name (unsigned int cfi_opc) | |
3117 | { | |
c9f46599 | 3118 | const char *name = get_DW_CFA_name (cfi_opc); |
04dfc41a | 3119 | |
c9f46599 | 3120 | if (name != NULL) |
3121 | return name; | |
04dfc41a | 3122 | |
c9f46599 | 3123 | return "DW_CFA_<unknown>"; |
04dfc41a | 3124 | } |
3125 | ||
3126 | /* This routine will generate the correct assembly data for a location | |
3127 | description based on a cfi entry with a complex address. */ | |
3128 | ||
3129 | static void | |
3130 | output_cfa_loc (dw_cfi_ref cfi, int for_eh) | |
3131 | { | |
3132 | dw_loc_descr_ref loc; | |
3133 | unsigned long size; | |
3134 | ||
2276e7e7 | 3135 | if (cfi->dw_cfi_opc == DW_CFA_expression |
3136 | || cfi->dw_cfi_opc == DW_CFA_val_expression) | |
04dfc41a | 3137 | { |
b1613fc3 | 3138 | unsigned r = |
04dfc41a | 3139 | DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, for_eh); |
3140 | dw2_asm_output_data (1, r, NULL); | |
3141 | loc = cfi->dw_cfi_oprnd2.dw_cfi_loc; | |
3142 | } | |
3143 | else | |
3144 | loc = cfi->dw_cfi_oprnd1.dw_cfi_loc; | |
3145 | ||
3146 | /* Output the size of the block. */ | |
3147 | size = size_of_locs (loc); | |
3148 | dw2_asm_output_data_uleb128 (size, NULL); | |
3149 | ||
3150 | /* Now output the operations themselves. */ | |
3151 | output_loc_sequence (loc, for_eh); | |
3152 | } | |
3153 | ||
3154 | /* Similar, but used for .cfi_escape. */ | |
3155 | ||
3156 | static void | |
3157 | output_cfa_loc_raw (dw_cfi_ref cfi) | |
3158 | { | |
3159 | dw_loc_descr_ref loc; | |
3160 | unsigned long size; | |
3161 | ||
2276e7e7 | 3162 | if (cfi->dw_cfi_opc == DW_CFA_expression |
3163 | || cfi->dw_cfi_opc == DW_CFA_val_expression) | |
04dfc41a | 3164 | { |
b1613fc3 | 3165 | unsigned r = |
04dfc41a | 3166 | DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, 1); |
3167 | fprintf (asm_out_file, "%#x,", r); | |
3168 | loc = cfi->dw_cfi_oprnd2.dw_cfi_loc; | |
3169 | } | |
3170 | else | |
3171 | loc = cfi->dw_cfi_oprnd1.dw_cfi_loc; | |
3172 | ||
3173 | /* Output the size of the block. */ | |
3174 | size = size_of_locs (loc); | |
3175 | dw2_asm_output_data_uleb128_raw (size); | |
3176 | fputc (',', asm_out_file); | |
3177 | ||
3178 | /* Now output the operations themselves. */ | |
3179 | output_loc_sequence_raw (loc); | |
3180 | } | |
3181 | ||
3182 | /* Output a Call Frame Information opcode and its operand(s). */ | |
3183 | ||
3184 | void | |
3185 | output_cfi (dw_cfi_ref cfi, dw_fde_ref fde, int for_eh) | |
3186 | { | |
3187 | unsigned long r; | |
3188 | HOST_WIDE_INT off; | |
3189 | ||
3190 | if (cfi->dw_cfi_opc == DW_CFA_advance_loc) | |
3191 | dw2_asm_output_data (1, (cfi->dw_cfi_opc | |
3192 | | (cfi->dw_cfi_oprnd1.dw_cfi_offset & 0x3f)), | |
3193 | "DW_CFA_advance_loc " HOST_WIDE_INT_PRINT_HEX, | |
3194 | ((unsigned HOST_WIDE_INT) | |
3195 | cfi->dw_cfi_oprnd1.dw_cfi_offset)); | |
3196 | else if (cfi->dw_cfi_opc == DW_CFA_offset) | |
3197 | { | |
3198 | r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, for_eh); | |
3199 | dw2_asm_output_data (1, (cfi->dw_cfi_opc | (r & 0x3f)), | |
3200 | "DW_CFA_offset, column %#lx", r); | |
3201 | off = div_data_align (cfi->dw_cfi_oprnd2.dw_cfi_offset); | |
3202 | dw2_asm_output_data_uleb128 (off, NULL); | |
3203 | } | |
3204 | else if (cfi->dw_cfi_opc == DW_CFA_restore) | |
3205 | { | |
3206 | r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, for_eh); | |
3207 | dw2_asm_output_data (1, (cfi->dw_cfi_opc | (r & 0x3f)), | |
3208 | "DW_CFA_restore, column %#lx", r); | |
3209 | } | |
3210 | else | |
3211 | { | |
3212 | dw2_asm_output_data (1, cfi->dw_cfi_opc, | |
3213 | "%s", dwarf_cfi_name (cfi->dw_cfi_opc)); | |
3214 | ||
3215 | switch (cfi->dw_cfi_opc) | |
3216 | { | |
3217 | case DW_CFA_set_loc: | |
3218 | if (for_eh) | |
3219 | dw2_asm_output_encoded_addr_rtx ( | |
3220 | ASM_PREFERRED_EH_DATA_FORMAT (/*code=*/1, /*global=*/0), | |
3221 | gen_rtx_SYMBOL_REF (Pmode, cfi->dw_cfi_oprnd1.dw_cfi_addr), | |
3222 | false, NULL); | |
3223 | else | |
3224 | dw2_asm_output_addr (DWARF2_ADDR_SIZE, | |
3225 | cfi->dw_cfi_oprnd1.dw_cfi_addr, NULL); | |
3226 | fde->dw_fde_current_label = cfi->dw_cfi_oprnd1.dw_cfi_addr; | |
3227 | break; | |
3228 | ||
3229 | case DW_CFA_advance_loc1: | |
3230 | dw2_asm_output_delta (1, cfi->dw_cfi_oprnd1.dw_cfi_addr, | |
3231 | fde->dw_fde_current_label, NULL); | |
3232 | fde->dw_fde_current_label = cfi->dw_cfi_oprnd1.dw_cfi_addr; | |
3233 | break; | |
3234 | ||
3235 | case DW_CFA_advance_loc2: | |
3236 | dw2_asm_output_delta (2, cfi->dw_cfi_oprnd1.dw_cfi_addr, | |
3237 | fde->dw_fde_current_label, NULL); | |
3238 | fde->dw_fde_current_label = cfi->dw_cfi_oprnd1.dw_cfi_addr; | |
3239 | break; | |
3240 | ||
3241 | case DW_CFA_advance_loc4: | |
3242 | dw2_asm_output_delta (4, cfi->dw_cfi_oprnd1.dw_cfi_addr, | |
3243 | fde->dw_fde_current_label, NULL); | |
3244 | fde->dw_fde_current_label = cfi->dw_cfi_oprnd1.dw_cfi_addr; | |
3245 | break; | |
3246 | ||
3247 | case DW_CFA_MIPS_advance_loc8: | |
3248 | dw2_asm_output_delta (8, cfi->dw_cfi_oprnd1.dw_cfi_addr, | |
3249 | fde->dw_fde_current_label, NULL); | |
3250 | fde->dw_fde_current_label = cfi->dw_cfi_oprnd1.dw_cfi_addr; | |
3251 | break; | |
3252 | ||
3253 | case DW_CFA_offset_extended: | |
3254 | r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, for_eh); | |
3255 | dw2_asm_output_data_uleb128 (r, NULL); | |
3256 | off = div_data_align (cfi->dw_cfi_oprnd2.dw_cfi_offset); | |
3257 | dw2_asm_output_data_uleb128 (off, NULL); | |
3258 | break; | |
3259 | ||
3260 | case DW_CFA_def_cfa: | |
3261 | r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, for_eh); | |
3262 | dw2_asm_output_data_uleb128 (r, NULL); | |
3263 | dw2_asm_output_data_uleb128 (cfi->dw_cfi_oprnd2.dw_cfi_offset, NULL); | |
3264 | break; | |
3265 | ||
3266 | case DW_CFA_offset_extended_sf: | |
3267 | r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, for_eh); | |
3268 | dw2_asm_output_data_uleb128 (r, NULL); | |
3269 | off = div_data_align (cfi->dw_cfi_oprnd2.dw_cfi_offset); | |
3270 | dw2_asm_output_data_sleb128 (off, NULL); | |
3271 | break; | |
3272 | ||
3273 | case DW_CFA_def_cfa_sf: | |
3274 | r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, for_eh); | |
3275 | dw2_asm_output_data_uleb128 (r, NULL); | |
3276 | off = div_data_align (cfi->dw_cfi_oprnd2.dw_cfi_offset); | |
3277 | dw2_asm_output_data_sleb128 (off, NULL); | |
3278 | break; | |
3279 | ||
3280 | case DW_CFA_restore_extended: | |
3281 | case DW_CFA_undefined: | |
3282 | case DW_CFA_same_value: | |
3283 | case DW_CFA_def_cfa_register: | |
3284 | r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, for_eh); | |
3285 | dw2_asm_output_data_uleb128 (r, NULL); | |
3286 | break; | |
3287 | ||
3288 | case DW_CFA_register: | |
3289 | r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, for_eh); | |
3290 | dw2_asm_output_data_uleb128 (r, NULL); | |
3291 | r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd2.dw_cfi_reg_num, for_eh); | |
3292 | dw2_asm_output_data_uleb128 (r, NULL); | |
3293 | break; | |
3294 | ||
3295 | case DW_CFA_def_cfa_offset: | |
3296 | case DW_CFA_GNU_args_size: | |
3297 | dw2_asm_output_data_uleb128 (cfi->dw_cfi_oprnd1.dw_cfi_offset, NULL); | |
3298 | break; | |
3299 | ||
3300 | case DW_CFA_def_cfa_offset_sf: | |
3301 | off = div_data_align (cfi->dw_cfi_oprnd1.dw_cfi_offset); | |
3302 | dw2_asm_output_data_sleb128 (off, NULL); | |
3303 | break; | |
3304 | ||
3305 | case DW_CFA_GNU_window_save: | |
3306 | break; | |
3307 | ||
3308 | case DW_CFA_def_cfa_expression: | |
3309 | case DW_CFA_expression: | |
2276e7e7 | 3310 | case DW_CFA_val_expression: |
04dfc41a | 3311 | output_cfa_loc (cfi, for_eh); |
3312 | break; | |
3313 | ||
3314 | case DW_CFA_GNU_negative_offset_extended: | |
3315 | /* Obsoleted by DW_CFA_offset_extended_sf. */ | |
3316 | gcc_unreachable (); | |
3317 | ||
3318 | default: | |
3319 | break; | |
3320 | } | |
3321 | } | |
3322 | } | |
3323 | ||
3324 | /* Similar, but do it via assembler directives instead. */ | |
3325 | ||
3326 | void | |
3327 | output_cfi_directive (FILE *f, dw_cfi_ref cfi) | |
3328 | { | |
3329 | unsigned long r, r2; | |
3330 | ||
3331 | switch (cfi->dw_cfi_opc) | |
3332 | { | |
3333 | case DW_CFA_advance_loc: | |
3334 | case DW_CFA_advance_loc1: | |
3335 | case DW_CFA_advance_loc2: | |
3336 | case DW_CFA_advance_loc4: | |
3337 | case DW_CFA_MIPS_advance_loc8: | |
3338 | case DW_CFA_set_loc: | |
3339 | /* Should only be created in a code path not followed when emitting | |
3340 | via directives. The assembler is going to take care of this for | |
3341 | us. But this routines is also used for debugging dumps, so | |
3342 | print something. */ | |
3343 | gcc_assert (f != asm_out_file); | |
3344 | fprintf (f, "\t.cfi_advance_loc\n"); | |
3345 | break; | |
3346 | ||
3347 | case DW_CFA_offset: | |
3348 | case DW_CFA_offset_extended: | |
3349 | case DW_CFA_offset_extended_sf: | |
3350 | r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, 1); | |
f03df321 | 3351 | fprintf (f, "\t.cfi_offset %lu, " HOST_WIDE_INT_PRINT_DEC"\n", |
04dfc41a | 3352 | r, cfi->dw_cfi_oprnd2.dw_cfi_offset); |
3353 | break; | |
3354 | ||
3355 | case DW_CFA_restore: | |
3356 | case DW_CFA_restore_extended: | |
3357 | r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, 1); | |
3358 | fprintf (f, "\t.cfi_restore %lu\n", r); | |
3359 | break; | |
3360 | ||
3361 | case DW_CFA_undefined: | |
3362 | r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, 1); | |
3363 | fprintf (f, "\t.cfi_undefined %lu\n", r); | |
3364 | break; | |
3365 | ||
3366 | case DW_CFA_same_value: | |
3367 | r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, 1); | |
3368 | fprintf (f, "\t.cfi_same_value %lu\n", r); | |
3369 | break; | |
3370 | ||
3371 | case DW_CFA_def_cfa: | |
3372 | case DW_CFA_def_cfa_sf: | |
3373 | r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, 1); | |
f03df321 | 3374 | fprintf (f, "\t.cfi_def_cfa %lu, " HOST_WIDE_INT_PRINT_DEC"\n", |
04dfc41a | 3375 | r, cfi->dw_cfi_oprnd2.dw_cfi_offset); |
3376 | break; | |
3377 | ||
3378 | case DW_CFA_def_cfa_register: | |
3379 | r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, 1); | |
3380 | fprintf (f, "\t.cfi_def_cfa_register %lu\n", r); | |
3381 | break; | |
3382 | ||
3383 | case DW_CFA_register: | |
3384 | r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, 1); | |
3385 | r2 = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd2.dw_cfi_reg_num, 1); | |
3386 | fprintf (f, "\t.cfi_register %lu, %lu\n", r, r2); | |
3387 | break; | |
3388 | ||
3389 | case DW_CFA_def_cfa_offset: | |
3390 | case DW_CFA_def_cfa_offset_sf: | |
3391 | fprintf (f, "\t.cfi_def_cfa_offset " | |
3392 | HOST_WIDE_INT_PRINT_DEC"\n", | |
3393 | cfi->dw_cfi_oprnd1.dw_cfi_offset); | |
3394 | break; | |
3395 | ||
3396 | case DW_CFA_remember_state: | |
3397 | fprintf (f, "\t.cfi_remember_state\n"); | |
3398 | break; | |
3399 | case DW_CFA_restore_state: | |
3400 | fprintf (f, "\t.cfi_restore_state\n"); | |
3401 | break; | |
3402 | ||
3403 | case DW_CFA_GNU_args_size: | |
3404 | if (f == asm_out_file) | |
3405 | { | |
3406 | fprintf (f, "\t.cfi_escape %#x,", DW_CFA_GNU_args_size); | |
3407 | dw2_asm_output_data_uleb128_raw (cfi->dw_cfi_oprnd1.dw_cfi_offset); | |
3408 | if (flag_debug_asm) | |
f03df321 | 3409 | fprintf (f, "\t%s args_size " HOST_WIDE_INT_PRINT_DEC, |
04dfc41a | 3410 | ASM_COMMENT_START, cfi->dw_cfi_oprnd1.dw_cfi_offset); |
3411 | fputc ('\n', f); | |
3412 | } | |
3413 | else | |
3414 | { | |
f03df321 | 3415 | fprintf (f, "\t.cfi_GNU_args_size " HOST_WIDE_INT_PRINT_DEC "\n", |
04dfc41a | 3416 | cfi->dw_cfi_oprnd1.dw_cfi_offset); |
3417 | } | |
3418 | break; | |
3419 | ||
3420 | case DW_CFA_GNU_window_save: | |
3421 | fprintf (f, "\t.cfi_window_save\n"); | |
3422 | break; | |
3423 | ||
3424 | case DW_CFA_def_cfa_expression: | |
04dfc41a | 3425 | case DW_CFA_expression: |
2276e7e7 | 3426 | case DW_CFA_val_expression: |
04dfc41a | 3427 | if (f != asm_out_file) |
3428 | { | |
2276e7e7 | 3429 | fprintf (f, "\t.cfi_%scfa_%sexpression ...\n", |
3430 | cfi->dw_cfi_opc == DW_CFA_def_cfa_expression ? "def_" : "", | |
3431 | cfi->dw_cfi_opc == DW_CFA_val_expression ? "val_" : ""); | |
04dfc41a | 3432 | break; |
3433 | } | |
3434 | fprintf (f, "\t.cfi_escape %#x,", cfi->dw_cfi_opc); | |
3435 | output_cfa_loc_raw (cfi); | |
3436 | fputc ('\n', f); | |
3437 | break; | |
3438 | ||
3439 | default: | |
3440 | gcc_unreachable (); | |
3441 | } | |
3442 | } | |
3443 | ||
3444 | void | |
3445 | dwarf2out_emit_cfi (dw_cfi_ref cfi) | |
3446 | { | |
3447 | if (dwarf2out_do_cfi_asm ()) | |
3448 | output_cfi_directive (asm_out_file, cfi); | |
3449 | } | |
35bf1d17 | 3450 | |
3451 | static void | |
3452 | dump_cfi_row (FILE *f, dw_cfi_row *row) | |
3453 | { | |
3454 | dw_cfi_ref cfi; | |
3455 | unsigned i; | |
3456 | ||
3457 | cfi = row->cfa_cfi; | |
3458 | if (!cfi) | |
3459 | { | |
3460 | dw_cfa_location dummy; | |
9af5ce0c | 3461 | memset (&dummy, 0, sizeof (dummy)); |
35bf1d17 | 3462 | dummy.reg = INVALID_REGNUM; |
3463 | cfi = def_cfa_0 (&dummy, &row->cfa); | |
3464 | } | |
3465 | output_cfi_directive (f, cfi); | |
3466 | ||
f1f41a6c | 3467 | FOR_EACH_VEC_SAFE_ELT (row->reg_save, i, cfi) |
35bf1d17 | 3468 | if (cfi) |
3469 | output_cfi_directive (f, cfi); | |
35bf1d17 | 3470 | } |
3471 | ||
3472 | void debug_cfi_row (dw_cfi_row *row); | |
3473 | ||
3474 | void | |
3475 | debug_cfi_row (dw_cfi_row *row) | |
3476 | { | |
3477 | dump_cfi_row (stderr, row); | |
3478 | } | |
04dfc41a | 3479 | \f |
dcdf448e | 3480 | |
fe2dc6d6 | 3481 | /* Save the result of dwarf2out_do_frame across PCH. |
3482 | This variable is tri-state, with 0 unset, >0 true, <0 false. */ | |
3483 | static GTY(()) signed char saved_do_cfi_asm = 0; | |
dcdf448e | 3484 | |
fa48a8cb | 3485 | /* Decide whether to emit EH frame unwind information for the current |
3486 | translation unit. */ | |
3487 | ||
3488 | bool | |
3489 | dwarf2out_do_eh_frame (void) | |
3490 | { | |
3491 | return | |
3492 | (flag_unwind_tables || flag_exceptions) | |
3493 | && targetm_common.except_unwind_info (&global_options) == UI_DWARF2; | |
3494 | } | |
3495 | ||
dcdf448e | 3496 | /* Decide whether we want to emit frame unwind information for the current |
3497 | translation unit. */ | |
3498 | ||
fe2dc6d6 | 3499 | bool |
dcdf448e | 3500 | dwarf2out_do_frame (void) |
3501 | { | |
3502 | /* We want to emit correct CFA location expressions or lists, so we | |
3503 | have to return true if we're going to output debug info, even if | |
3504 | we're not going to output frame or unwind info. */ | |
3505 | if (write_symbols == DWARF2_DEBUG || write_symbols == VMS_AND_DWARF2_DEBUG) | |
3506 | return true; | |
3507 | ||
fe2dc6d6 | 3508 | if (saved_do_cfi_asm > 0) |
dcdf448e | 3509 | return true; |
3510 | ||
3511 | if (targetm.debug_unwind_info () == UI_DWARF2) | |
3512 | return true; | |
3513 | ||
fa48a8cb | 3514 | if (dwarf2out_do_eh_frame ()) |
dcdf448e | 3515 | return true; |
3516 | ||
3517 | return false; | |
3518 | } | |
3519 | ||
3520 | /* Decide whether to emit frame unwind via assembler directives. */ | |
3521 | ||
fe2dc6d6 | 3522 | bool |
dcdf448e | 3523 | dwarf2out_do_cfi_asm (void) |
3524 | { | |
3525 | int enc; | |
3526 | ||
fe2dc6d6 | 3527 | if (saved_do_cfi_asm != 0) |
3528 | return saved_do_cfi_asm > 0; | |
3529 | ||
3530 | /* Assume failure for a moment. */ | |
3531 | saved_do_cfi_asm = -1; | |
3532 | ||
dcdf448e | 3533 | if (!flag_dwarf2_cfi_asm || !dwarf2out_do_frame ()) |
3534 | return false; | |
3535 | if (!HAVE_GAS_CFI_PERSONALITY_DIRECTIVE) | |
3536 | return false; | |
3537 | ||
3538 | /* Make sure the personality encoding is one the assembler can support. | |
3539 | In particular, aligned addresses can't be handled. */ | |
3540 | enc = ASM_PREFERRED_EH_DATA_FORMAT (/*code=*/2,/*global=*/1); | |
3541 | if ((enc & 0x70) != 0 && (enc & 0x70) != DW_EH_PE_pcrel) | |
3542 | return false; | |
3543 | enc = ASM_PREFERRED_EH_DATA_FORMAT (/*code=*/0,/*global=*/0); | |
3544 | if ((enc & 0x70) != 0 && (enc & 0x70) != DW_EH_PE_pcrel) | |
3545 | return false; | |
3546 | ||
3547 | /* If we can't get the assembler to emit only .debug_frame, and we don't need | |
3548 | dwarf2 unwind info for exceptions, then emit .debug_frame by hand. */ | |
fa48a8cb | 3549 | if (!HAVE_GAS_CFI_SECTIONS_DIRECTIVE && !dwarf2out_do_eh_frame ()) |
dcdf448e | 3550 | return false; |
3551 | ||
fe2dc6d6 | 3552 | /* Success! */ |
3553 | saved_do_cfi_asm = 1; | |
dcdf448e | 3554 | return true; |
3555 | } | |
3556 | ||
cbe8bda8 | 3557 | namespace { |
3558 | ||
3559 | const pass_data pass_data_dwarf2_frame = | |
3560 | { | |
3561 | RTL_PASS, /* type */ | |
3562 | "dwarf2", /* name */ | |
3563 | OPTGROUP_NONE, /* optinfo_flags */ | |
cbe8bda8 | 3564 | TV_FINAL, /* tv_id */ |
3565 | 0, /* properties_required */ | |
3566 | 0, /* properties_provided */ | |
3567 | 0, /* properties_destroyed */ | |
3568 | 0, /* todo_flags_start */ | |
3569 | 0, /* todo_flags_finish */ | |
fe2dc6d6 | 3570 | }; |
3571 | ||
cbe8bda8 | 3572 | class pass_dwarf2_frame : public rtl_opt_pass |
3573 | { | |
3574 | public: | |
9af5ce0c | 3575 | pass_dwarf2_frame (gcc::context *ctxt) |
3576 | : rtl_opt_pass (pass_data_dwarf2_frame, ctxt) | |
cbe8bda8 | 3577 | {} |
3578 | ||
3579 | /* opt_pass methods: */ | |
31315c24 | 3580 | virtual bool gate (function *); |
65b0537f | 3581 | virtual unsigned int execute (function *) { return execute_dwarf2_frame (); } |
cbe8bda8 | 3582 | |
3583 | }; // class pass_dwarf2_frame | |
3584 | ||
31315c24 | 3585 | bool |
3586 | pass_dwarf2_frame::gate (function *) | |
3587 | { | |
31315c24 | 3588 | /* Targets which still implement the prologue in assembler text |
3589 | cannot use the generic dwarf2 unwinding. */ | |
cf3a33c8 | 3590 | if (!targetm.have_prologue ()) |
3591 | return false; | |
31315c24 | 3592 | |
3593 | /* ??? What to do for UI_TARGET unwinding? They might be able to benefit | |
3594 | from the optimized shrink-wrapping annotations that we will compute. | |
3595 | For now, only produce the CFI notes for dwarf2. */ | |
3596 | return dwarf2out_do_frame (); | |
3597 | } | |
3598 | ||
cbe8bda8 | 3599 | } // anon namespace |
3600 | ||
3601 | rtl_opt_pass * | |
3602 | make_pass_dwarf2_frame (gcc::context *ctxt) | |
3603 | { | |
3604 | return new pass_dwarf2_frame (ctxt); | |
3605 | } | |
3606 | ||
dcdf448e | 3607 | #include "gt-dwarf2cfi.h" |