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647a1567 RH |
1 | /* Dwarf2 Call Frame Information helper routines. |
2 | Copyright (C) 1992, 1993, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, | |
3 | 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011 | |
4 | Free Software Foundation, Inc. | |
5 | ||
6 | This file is part of GCC. | |
7 | ||
8 | GCC is free software; you can redistribute it and/or modify it under | |
9 | the terms of the GNU General Public License as published by the Free | |
10 | Software Foundation; either version 3, or (at your option) any later | |
11 | version. | |
12 | ||
13 | GCC is distributed in the hope that it will be useful, but WITHOUT ANY | |
14 | WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
15 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
16 | for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
19 | along with GCC; see the file COPYING3. If not see | |
20 | <http://www.gnu.org/licenses/>. */ | |
21 | ||
22 | #include "config.h" | |
23 | #include "system.h" | |
24 | #include "coretypes.h" | |
25 | #include "tm.h" | |
26 | #include "version.h" | |
27 | #include "flags.h" | |
28 | #include "rtl.h" | |
29 | #include "function.h" | |
30 | #include "dwarf2.h" | |
31 | #include "dwarf2out.h" | |
32 | #include "dwarf2asm.h" | |
33 | #include "ggc.h" | |
34 | #include "tm_p.h" | |
35 | #include "target.h" | |
36 | #include "common/common-target.h" | |
37 | #include "tree-pass.h" | |
38 | ||
39 | #include "except.h" /* expand_builtin_dwarf_sp_column */ | |
40 | #include "expr.h" /* init_return_column_size */ | |
41 | #include "regs.h" /* expand_builtin_init_dwarf_reg_sizes */ | |
42 | #include "output.h" /* asm_out_file */ | |
43 | #include "debug.h" /* dwarf2out_do_frame, dwarf2out_do_cfi_asm */ | |
44 | ||
45 | ||
46 | /* ??? Poison these here until it can be done generically. They've been | |
47 | totally replaced in this file; make sure it stays that way. */ | |
48 | #undef DWARF2_UNWIND_INFO | |
49 | #undef DWARF2_FRAME_INFO | |
50 | #if (GCC_VERSION >= 3000) | |
51 | #pragma GCC poison DWARF2_UNWIND_INFO DWARF2_FRAME_INFO | |
52 | #endif | |
53 | ||
54 | #ifndef INCOMING_RETURN_ADDR_RTX | |
55 | #define INCOMING_RETURN_ADDR_RTX (gcc_unreachable (), NULL_RTX) | |
56 | #endif | |
57 | ||
58 | /* The size of the target's pointer type. */ | |
59 | #ifndef PTR_SIZE | |
60 | #define PTR_SIZE (POINTER_SIZE / BITS_PER_UNIT) | |
61 | #endif | |
62 | ||
63 | /* Maximum size (in bytes) of an artificially generated label. */ | |
64 | #define MAX_ARTIFICIAL_LABEL_BYTES 30 | |
65 | ||
66 | /* The size of addresses as they appear in the Dwarf 2 data. | |
67 | Some architectures use word addresses to refer to code locations, | |
68 | but Dwarf 2 info always uses byte addresses. On such machines, | |
69 | Dwarf 2 addresses need to be larger than the architecture's | |
70 | pointers. */ | |
71 | #ifndef DWARF2_ADDR_SIZE | |
72 | #define DWARF2_ADDR_SIZE (POINTER_SIZE / BITS_PER_UNIT) | |
73 | #endif | |
74 | ||
75 | /* The size in bytes of a DWARF field indicating an offset or length | |
76 | relative to a debug info section, specified to be 4 bytes in the | |
77 | DWARF-2 specification. The SGI/MIPS ABI defines it to be the same | |
78 | as PTR_SIZE. */ | |
79 | ||
80 | #ifndef DWARF_OFFSET_SIZE | |
81 | #define DWARF_OFFSET_SIZE 4 | |
82 | #endif | |
83 | ||
84 | /* According to the (draft) DWARF 3 specification, the initial length | |
85 | should either be 4 or 12 bytes. When it's 12 bytes, the first 4 | |
86 | bytes are 0xffffffff, followed by the length stored in the next 8 | |
87 | bytes. | |
88 | ||
89 | However, the SGI/MIPS ABI uses an initial length which is equal to | |
90 | DWARF_OFFSET_SIZE. It is defined (elsewhere) accordingly. */ | |
91 | ||
92 | #ifndef DWARF_INITIAL_LENGTH_SIZE | |
93 | #define DWARF_INITIAL_LENGTH_SIZE (DWARF_OFFSET_SIZE == 4 ? 4 : 12) | |
94 | #endif | |
95 | ||
96 | /* Round SIZE up to the nearest BOUNDARY. */ | |
97 | #define DWARF_ROUND(SIZE,BOUNDARY) \ | |
98 | ((((SIZE) + (BOUNDARY) - 1) / (BOUNDARY)) * (BOUNDARY)) | |
99 | ||
100 | /* Offsets recorded in opcodes are a multiple of this alignment factor. */ | |
101 | #ifndef DWARF_CIE_DATA_ALIGNMENT | |
102 | #ifdef STACK_GROWS_DOWNWARD | |
103 | #define DWARF_CIE_DATA_ALIGNMENT (-((int) UNITS_PER_WORD)) | |
104 | #else | |
105 | #define DWARF_CIE_DATA_ALIGNMENT ((int) UNITS_PER_WORD) | |
106 | #endif | |
107 | #endif | |
108 | ||
109 | /* CIE identifier. */ | |
110 | #if HOST_BITS_PER_WIDE_INT >= 64 | |
111 | #define DWARF_CIE_ID \ | |
112 | (unsigned HOST_WIDE_INT) (DWARF_OFFSET_SIZE == 4 ? DW_CIE_ID : DW64_CIE_ID) | |
113 | #else | |
114 | #define DWARF_CIE_ID DW_CIE_ID | |
115 | #endif | |
116 | ||
117 | /* The DWARF 2 CFA column which tracks the return address. Normally this | |
118 | is the column for PC, or the first column after all of the hard | |
119 | registers. */ | |
120 | #ifndef DWARF_FRAME_RETURN_COLUMN | |
121 | #ifdef PC_REGNUM | |
122 | #define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (PC_REGNUM) | |
123 | #else | |
124 | #define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGISTERS | |
125 | #endif | |
126 | #endif | |
127 | ||
128 | /* The mapping from gcc register number to DWARF 2 CFA column number. By | |
129 | default, we just provide columns for all registers. */ | |
130 | #ifndef DWARF_FRAME_REGNUM | |
131 | #define DWARF_FRAME_REGNUM(REG) DBX_REGISTER_NUMBER (REG) | |
132 | #endif | |
133 | ||
134 | /* Map register numbers held in the call frame info that gcc has | |
135 | collected using DWARF_FRAME_REGNUM to those that should be output in | |
136 | .debug_frame and .eh_frame. */ | |
137 | #ifndef DWARF2_FRAME_REG_OUT | |
138 | #define DWARF2_FRAME_REG_OUT(REGNO, FOR_EH) (REGNO) | |
139 | #endif | |
140 | \f | |
141 | /* A vector of call frame insns for the CIE. */ | |
142 | cfi_vec cie_cfi_vec; | |
143 | ||
144 | static GTY(()) unsigned long dwarf2out_cfi_label_num; | |
145 | ||
bc5612ed BS |
146 | /* The insn after which a new CFI note should be emitted. */ |
147 | static rtx cfi_insn; | |
148 | ||
149 | /* True if remember_state should be emitted before following CFI directive. */ | |
150 | static bool emit_cfa_remember; | |
151 | ||
152 | /* True if any CFI directives were emitted at the current insn. */ | |
153 | static bool any_cfis_emitted; | |
154 | \f | |
155 | ||
156 | static void dwarf2out_cfi_begin_epilogue (rtx insn); | |
157 | static void dwarf2out_frame_debug_restore_state (void); | |
158 | ||
647a1567 RH |
159 | \f |
160 | /* Hook used by __throw. */ | |
161 | ||
162 | rtx | |
163 | expand_builtin_dwarf_sp_column (void) | |
164 | { | |
165 | unsigned int dwarf_regnum = DWARF_FRAME_REGNUM (STACK_POINTER_REGNUM); | |
166 | return GEN_INT (DWARF2_FRAME_REG_OUT (dwarf_regnum, 1)); | |
167 | } | |
168 | ||
169 | /* MEM is a memory reference for the register size table, each element of | |
170 | which has mode MODE. Initialize column C as a return address column. */ | |
171 | ||
172 | static void | |
173 | init_return_column_size (enum machine_mode mode, rtx mem, unsigned int c) | |
174 | { | |
175 | HOST_WIDE_INT offset = c * GET_MODE_SIZE (mode); | |
176 | HOST_WIDE_INT size = GET_MODE_SIZE (Pmode); | |
177 | emit_move_insn (adjust_address (mem, mode, offset), GEN_INT (size)); | |
178 | } | |
179 | ||
180 | /* Generate code to initialize the register size table. */ | |
181 | ||
182 | void | |
183 | expand_builtin_init_dwarf_reg_sizes (tree address) | |
184 | { | |
185 | unsigned int i; | |
186 | enum machine_mode mode = TYPE_MODE (char_type_node); | |
187 | rtx addr = expand_normal (address); | |
188 | rtx mem = gen_rtx_MEM (BLKmode, addr); | |
189 | bool wrote_return_column = false; | |
190 | ||
191 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
192 | { | |
193 | int rnum = DWARF2_FRAME_REG_OUT (DWARF_FRAME_REGNUM (i), 1); | |
194 | ||
195 | if (rnum < DWARF_FRAME_REGISTERS) | |
196 | { | |
197 | HOST_WIDE_INT offset = rnum * GET_MODE_SIZE (mode); | |
198 | enum machine_mode save_mode = reg_raw_mode[i]; | |
199 | HOST_WIDE_INT size; | |
200 | ||
201 | if (HARD_REGNO_CALL_PART_CLOBBERED (i, save_mode)) | |
202 | save_mode = choose_hard_reg_mode (i, 1, true); | |
203 | if (DWARF_FRAME_REGNUM (i) == DWARF_FRAME_RETURN_COLUMN) | |
204 | { | |
205 | if (save_mode == VOIDmode) | |
206 | continue; | |
207 | wrote_return_column = true; | |
208 | } | |
209 | size = GET_MODE_SIZE (save_mode); | |
210 | if (offset < 0) | |
211 | continue; | |
212 | ||
213 | emit_move_insn (adjust_address (mem, mode, offset), | |
214 | gen_int_mode (size, mode)); | |
215 | } | |
216 | } | |
217 | ||
218 | if (!wrote_return_column) | |
219 | init_return_column_size (mode, mem, DWARF_FRAME_RETURN_COLUMN); | |
220 | ||
221 | #ifdef DWARF_ALT_FRAME_RETURN_COLUMN | |
222 | init_return_column_size (mode, mem, DWARF_ALT_FRAME_RETURN_COLUMN); | |
223 | #endif | |
224 | ||
225 | targetm.init_dwarf_reg_sizes_extra (address); | |
226 | } | |
227 | ||
228 | /* Divide OFF by DWARF_CIE_DATA_ALIGNMENT, asserting no remainder. */ | |
229 | ||
230 | static inline HOST_WIDE_INT | |
231 | div_data_align (HOST_WIDE_INT off) | |
232 | { | |
233 | HOST_WIDE_INT r = off / DWARF_CIE_DATA_ALIGNMENT; | |
234 | gcc_assert (r * DWARF_CIE_DATA_ALIGNMENT == off); | |
235 | return r; | |
236 | } | |
237 | ||
238 | /* Return true if we need a signed version of a given opcode | |
239 | (e.g. DW_CFA_offset_extended_sf vs DW_CFA_offset_extended). */ | |
240 | ||
241 | static inline bool | |
242 | need_data_align_sf_opcode (HOST_WIDE_INT off) | |
243 | { | |
244 | return DWARF_CIE_DATA_ALIGNMENT < 0 ? off > 0 : off < 0; | |
245 | } | |
246 | ||
247 | /* Return a pointer to a newly allocated Call Frame Instruction. */ | |
248 | ||
249 | static inline dw_cfi_ref | |
250 | new_cfi (void) | |
251 | { | |
252 | dw_cfi_ref cfi = ggc_alloc_dw_cfi_node (); | |
253 | ||
254 | cfi->dw_cfi_oprnd1.dw_cfi_reg_num = 0; | |
255 | cfi->dw_cfi_oprnd2.dw_cfi_reg_num = 0; | |
256 | ||
257 | return cfi; | |
258 | } | |
259 | ||
260 | /* Add a Call Frame Instruction to list of instructions. */ | |
261 | ||
262 | static inline void | |
263 | add_cfi (cfi_vec *vec, dw_cfi_ref cfi) | |
264 | { | |
265 | dw_fde_ref fde = current_fde (); | |
266 | ||
267 | /* When DRAP is used, CFA is defined with an expression. Redefine | |
268 | CFA may lead to a different CFA value. */ | |
269 | /* ??? Of course, this heuristic fails when we're annotating epilogues, | |
270 | because of course we'll always want to redefine the CFA back to the | |
271 | stack pointer on the way out. Where should we move this check? */ | |
272 | if (0 && fde && fde->drap_reg != INVALID_REGNUM) | |
273 | switch (cfi->dw_cfi_opc) | |
274 | { | |
275 | case DW_CFA_def_cfa_register: | |
276 | case DW_CFA_def_cfa_offset: | |
277 | case DW_CFA_def_cfa_offset_sf: | |
278 | case DW_CFA_def_cfa: | |
279 | case DW_CFA_def_cfa_sf: | |
280 | gcc_unreachable (); | |
281 | ||
282 | default: | |
283 | break; | |
284 | } | |
285 | ||
286 | VEC_safe_push (dw_cfi_ref, gc, *vec, cfi); | |
287 | } | |
288 | ||
289 | /* Generate a new label for the CFI info to refer to. FORCE is true | |
290 | if a label needs to be output even when using .cfi_* directives. */ | |
291 | ||
292 | static char * | |
293 | dwarf2out_cfi_label (bool force) | |
294 | { | |
295 | static char label[20]; | |
296 | ||
297 | if (!force && dwarf2out_do_cfi_asm ()) | |
298 | { | |
299 | /* In this case, we will be emitting the asm directive instead of | |
300 | the label, so just return a placeholder to keep the rest of the | |
301 | interfaces happy. */ | |
302 | strcpy (label, "<do not output>"); | |
303 | } | |
304 | else | |
305 | { | |
306 | int num = dwarf2out_cfi_label_num++; | |
307 | ASM_GENERATE_INTERNAL_LABEL (label, "LCFI", num); | |
bc5612ed BS |
308 | cfi_insn = emit_note_after (NOTE_INSN_CFI_LABEL, cfi_insn); |
309 | NOTE_LABEL_NUMBER (cfi_insn) = num; | |
647a1567 RH |
310 | } |
311 | ||
312 | return label; | |
313 | } | |
314 | ||
647a1567 RH |
315 | /* Add CFI to the current fde at the PC value indicated by LABEL if specified, |
316 | or to the CIE if LABEL is NULL. */ | |
317 | ||
318 | static void | |
319 | add_fde_cfi (const char *label, dw_cfi_ref cfi) | |
320 | { | |
321 | cfi_vec *vec; | |
322 | ||
323 | if (cie_cfi_vec == NULL) | |
324 | cie_cfi_vec = VEC_alloc (dw_cfi_ref, gc, 20); | |
325 | ||
326 | vec = &cie_cfi_vec; | |
327 | ||
328 | if (emit_cfa_remember) | |
329 | { | |
330 | dw_cfi_ref cfi_remember; | |
331 | ||
332 | /* Emit the state save. */ | |
333 | emit_cfa_remember = false; | |
334 | cfi_remember = new_cfi (); | |
335 | cfi_remember->dw_cfi_opc = DW_CFA_remember_state; | |
336 | add_fde_cfi (label, cfi_remember); | |
337 | } | |
338 | ||
339 | if (dwarf2out_do_cfi_asm ()) | |
340 | { | |
341 | if (label) | |
342 | { | |
343 | dw_fde_ref fde = current_fde (); | |
344 | ||
345 | gcc_assert (fde != NULL); | |
346 | ||
347 | /* We still have to add the cfi to the list so that lookup_cfa | |
348 | works later on. When -g2 and above we even need to force | |
349 | emitting of CFI labels and add to list a DW_CFA_set_loc for | |
350 | convert_cfa_to_fb_loc_list purposes. If we're generating | |
351 | DWARF3 output we use DW_OP_call_frame_cfa and so don't use | |
352 | convert_cfa_to_fb_loc_list. */ | |
353 | if (dwarf_version == 2 | |
354 | && debug_info_level > DINFO_LEVEL_TERSE | |
355 | && (write_symbols == DWARF2_DEBUG | |
356 | || write_symbols == VMS_AND_DWARF2_DEBUG)) | |
357 | { | |
358 | switch (cfi->dw_cfi_opc) | |
359 | { | |
360 | case DW_CFA_def_cfa_offset: | |
361 | case DW_CFA_def_cfa_offset_sf: | |
362 | case DW_CFA_def_cfa_register: | |
363 | case DW_CFA_def_cfa: | |
364 | case DW_CFA_def_cfa_sf: | |
365 | case DW_CFA_def_cfa_expression: | |
366 | case DW_CFA_restore_state: | |
367 | if (*label == 0 || strcmp (label, "<do not output>") == 0) | |
368 | label = dwarf2out_cfi_label (true); | |
369 | ||
370 | if (fde->dw_fde_current_label == NULL | |
371 | || strcmp (label, fde->dw_fde_current_label) != 0) | |
372 | { | |
373 | dw_cfi_ref xcfi; | |
374 | ||
375 | label = xstrdup (label); | |
376 | ||
377 | /* Set the location counter to the new label. */ | |
378 | xcfi = new_cfi (); | |
379 | /* It doesn't metter whether DW_CFA_set_loc | |
380 | or DW_CFA_advance_loc4 is added here, those aren't | |
381 | emitted into assembly, only looked up by | |
382 | convert_cfa_to_fb_loc_list. */ | |
383 | xcfi->dw_cfi_opc = DW_CFA_set_loc; | |
384 | xcfi->dw_cfi_oprnd1.dw_cfi_addr = label; | |
385 | add_cfi (&fde->dw_fde_cfi, xcfi); | |
386 | fde->dw_fde_current_label = label; | |
387 | } | |
388 | break; | |
389 | default: | |
390 | break; | |
391 | } | |
392 | } | |
393 | ||
bc5612ed BS |
394 | cfi_insn = emit_note_after (NOTE_INSN_CFI, cfi_insn); |
395 | NOTE_CFI (cfi_insn) = cfi; | |
647a1567 RH |
396 | |
397 | vec = &fde->dw_fde_cfi; | |
398 | any_cfis_emitted = true; | |
399 | } | |
400 | /* ??? If this is a CFI for the CIE, we don't emit. This | |
401 | assumes that the standard CIE contents that the assembler | |
402 | uses matches the standard CIE contents that the compiler | |
403 | uses. This is probably a bad assumption. I'm not quite | |
404 | sure how to address this for now. */ | |
405 | } | |
406 | else if (label) | |
407 | { | |
408 | dw_fde_ref fde = current_fde (); | |
409 | ||
410 | gcc_assert (fde != NULL); | |
411 | ||
412 | if (*label == 0) | |
413 | label = dwarf2out_cfi_label (false); | |
414 | ||
415 | if (fde->dw_fde_current_label == NULL | |
416 | || strcmp (label, fde->dw_fde_current_label) != 0) | |
417 | { | |
418 | dw_cfi_ref xcfi; | |
419 | ||
420 | label = xstrdup (label); | |
421 | ||
422 | /* Set the location counter to the new label. */ | |
423 | xcfi = new_cfi (); | |
424 | /* If we have a current label, advance from there, otherwise | |
425 | set the location directly using set_loc. */ | |
426 | xcfi->dw_cfi_opc = fde->dw_fde_current_label | |
427 | ? DW_CFA_advance_loc4 | |
428 | : DW_CFA_set_loc; | |
429 | xcfi->dw_cfi_oprnd1.dw_cfi_addr = label; | |
430 | add_cfi (&fde->dw_fde_cfi, xcfi); | |
431 | ||
432 | fde->dw_fde_current_label = label; | |
433 | } | |
434 | ||
435 | vec = &fde->dw_fde_cfi; | |
436 | any_cfis_emitted = true; | |
437 | } | |
438 | ||
439 | add_cfi (vec, cfi); | |
440 | } | |
441 | ||
442 | /* This function fills in aa dw_cfa_location structure from a dwarf location | |
443 | descriptor sequence. */ | |
444 | ||
445 | static void | |
446 | get_cfa_from_loc_descr (dw_cfa_location *cfa, struct dw_loc_descr_struct *loc) | |
447 | { | |
448 | struct dw_loc_descr_struct *ptr; | |
449 | cfa->offset = 0; | |
450 | cfa->base_offset = 0; | |
451 | cfa->indirect = 0; | |
452 | cfa->reg = -1; | |
453 | ||
454 | for (ptr = loc; ptr != NULL; ptr = ptr->dw_loc_next) | |
455 | { | |
456 | enum dwarf_location_atom op = ptr->dw_loc_opc; | |
457 | ||
458 | switch (op) | |
459 | { | |
460 | case DW_OP_reg0: | |
461 | case DW_OP_reg1: | |
462 | case DW_OP_reg2: | |
463 | case DW_OP_reg3: | |
464 | case DW_OP_reg4: | |
465 | case DW_OP_reg5: | |
466 | case DW_OP_reg6: | |
467 | case DW_OP_reg7: | |
468 | case DW_OP_reg8: | |
469 | case DW_OP_reg9: | |
470 | case DW_OP_reg10: | |
471 | case DW_OP_reg11: | |
472 | case DW_OP_reg12: | |
473 | case DW_OP_reg13: | |
474 | case DW_OP_reg14: | |
475 | case DW_OP_reg15: | |
476 | case DW_OP_reg16: | |
477 | case DW_OP_reg17: | |
478 | case DW_OP_reg18: | |
479 | case DW_OP_reg19: | |
480 | case DW_OP_reg20: | |
481 | case DW_OP_reg21: | |
482 | case DW_OP_reg22: | |
483 | case DW_OP_reg23: | |
484 | case DW_OP_reg24: | |
485 | case DW_OP_reg25: | |
486 | case DW_OP_reg26: | |
487 | case DW_OP_reg27: | |
488 | case DW_OP_reg28: | |
489 | case DW_OP_reg29: | |
490 | case DW_OP_reg30: | |
491 | case DW_OP_reg31: | |
492 | cfa->reg = op - DW_OP_reg0; | |
493 | break; | |
494 | case DW_OP_regx: | |
495 | cfa->reg = ptr->dw_loc_oprnd1.v.val_int; | |
496 | break; | |
497 | case DW_OP_breg0: | |
498 | case DW_OP_breg1: | |
499 | case DW_OP_breg2: | |
500 | case DW_OP_breg3: | |
501 | case DW_OP_breg4: | |
502 | case DW_OP_breg5: | |
503 | case DW_OP_breg6: | |
504 | case DW_OP_breg7: | |
505 | case DW_OP_breg8: | |
506 | case DW_OP_breg9: | |
507 | case DW_OP_breg10: | |
508 | case DW_OP_breg11: | |
509 | case DW_OP_breg12: | |
510 | case DW_OP_breg13: | |
511 | case DW_OP_breg14: | |
512 | case DW_OP_breg15: | |
513 | case DW_OP_breg16: | |
514 | case DW_OP_breg17: | |
515 | case DW_OP_breg18: | |
516 | case DW_OP_breg19: | |
517 | case DW_OP_breg20: | |
518 | case DW_OP_breg21: | |
519 | case DW_OP_breg22: | |
520 | case DW_OP_breg23: | |
521 | case DW_OP_breg24: | |
522 | case DW_OP_breg25: | |
523 | case DW_OP_breg26: | |
524 | case DW_OP_breg27: | |
525 | case DW_OP_breg28: | |
526 | case DW_OP_breg29: | |
527 | case DW_OP_breg30: | |
528 | case DW_OP_breg31: | |
529 | cfa->reg = op - DW_OP_breg0; | |
530 | cfa->base_offset = ptr->dw_loc_oprnd1.v.val_int; | |
531 | break; | |
532 | case DW_OP_bregx: | |
533 | cfa->reg = ptr->dw_loc_oprnd1.v.val_int; | |
534 | cfa->base_offset = ptr->dw_loc_oprnd2.v.val_int; | |
535 | break; | |
536 | case DW_OP_deref: | |
537 | cfa->indirect = 1; | |
538 | break; | |
539 | case DW_OP_plus_uconst: | |
540 | cfa->offset = ptr->dw_loc_oprnd1.v.val_unsigned; | |
541 | break; | |
542 | default: | |
543 | gcc_unreachable (); | |
544 | } | |
545 | } | |
546 | } | |
547 | ||
548 | /* Subroutine of lookup_cfa. */ | |
549 | ||
550 | void | |
551 | lookup_cfa_1 (dw_cfi_ref cfi, dw_cfa_location *loc, dw_cfa_location *remember) | |
552 | { | |
553 | switch (cfi->dw_cfi_opc) | |
554 | { | |
555 | case DW_CFA_def_cfa_offset: | |
556 | case DW_CFA_def_cfa_offset_sf: | |
557 | loc->offset = cfi->dw_cfi_oprnd1.dw_cfi_offset; | |
558 | break; | |
559 | case DW_CFA_def_cfa_register: | |
560 | loc->reg = cfi->dw_cfi_oprnd1.dw_cfi_reg_num; | |
561 | break; | |
562 | case DW_CFA_def_cfa: | |
563 | case DW_CFA_def_cfa_sf: | |
564 | loc->reg = cfi->dw_cfi_oprnd1.dw_cfi_reg_num; | |
565 | loc->offset = cfi->dw_cfi_oprnd2.dw_cfi_offset; | |
566 | break; | |
567 | case DW_CFA_def_cfa_expression: | |
568 | get_cfa_from_loc_descr (loc, cfi->dw_cfi_oprnd1.dw_cfi_loc); | |
569 | break; | |
570 | ||
571 | case DW_CFA_remember_state: | |
572 | gcc_assert (!remember->in_use); | |
573 | *remember = *loc; | |
574 | remember->in_use = 1; | |
575 | break; | |
576 | case DW_CFA_restore_state: | |
577 | gcc_assert (remember->in_use); | |
578 | *loc = *remember; | |
579 | remember->in_use = 0; | |
580 | break; | |
581 | ||
582 | default: | |
583 | break; | |
584 | } | |
585 | } | |
586 | ||
587 | /* Find the previous value for the CFA. */ | |
588 | ||
589 | static void | |
590 | lookup_cfa (dw_cfa_location *loc) | |
591 | { | |
592 | int ix; | |
593 | dw_cfi_ref cfi; | |
594 | dw_fde_ref fde; | |
595 | dw_cfa_location remember; | |
596 | ||
597 | memset (loc, 0, sizeof (*loc)); | |
598 | loc->reg = INVALID_REGNUM; | |
599 | remember = *loc; | |
600 | ||
601 | FOR_EACH_VEC_ELT (dw_cfi_ref, cie_cfi_vec, ix, cfi) | |
602 | lookup_cfa_1 (cfi, loc, &remember); | |
603 | ||
604 | fde = current_fde (); | |
605 | if (fde) | |
606 | FOR_EACH_VEC_ELT (dw_cfi_ref, fde->dw_fde_cfi, ix, cfi) | |
607 | lookup_cfa_1 (cfi, loc, &remember); | |
608 | } | |
609 | ||
610 | /* The current rule for calculating the DWARF2 canonical frame address. */ | |
611 | static dw_cfa_location cfa; | |
612 | ||
613 | /* The register used for saving registers to the stack, and its offset | |
614 | from the CFA. */ | |
615 | static dw_cfa_location cfa_store; | |
616 | ||
617 | /* The current save location around an epilogue. */ | |
618 | static dw_cfa_location cfa_remember; | |
619 | ||
620 | /* The running total of the size of arguments pushed onto the stack. */ | |
621 | static HOST_WIDE_INT args_size; | |
622 | ||
623 | /* The last args_size we actually output. */ | |
624 | static HOST_WIDE_INT old_args_size; | |
625 | ||
626 | /* Determine if two dw_cfa_location structures define the same data. */ | |
627 | ||
628 | bool | |
629 | cfa_equal_p (const dw_cfa_location *loc1, const dw_cfa_location *loc2) | |
630 | { | |
631 | return (loc1->reg == loc2->reg | |
632 | && loc1->offset == loc2->offset | |
633 | && loc1->indirect == loc2->indirect | |
634 | && (loc1->indirect == 0 | |
635 | || loc1->base_offset == loc2->base_offset)); | |
636 | } | |
637 | ||
638 | /* This routine does the actual work. The CFA is now calculated from | |
639 | the dw_cfa_location structure. */ | |
640 | ||
641 | static void | |
642 | def_cfa_1 (const char *label, dw_cfa_location *loc_p) | |
643 | { | |
644 | dw_cfi_ref cfi; | |
645 | dw_cfa_location old_cfa, loc; | |
646 | ||
647 | cfa = *loc_p; | |
648 | loc = *loc_p; | |
649 | ||
650 | if (cfa_store.reg == loc.reg && loc.indirect == 0) | |
651 | cfa_store.offset = loc.offset; | |
652 | ||
653 | loc.reg = DWARF_FRAME_REGNUM (loc.reg); | |
654 | lookup_cfa (&old_cfa); | |
655 | ||
656 | /* If nothing changed, no need to issue any call frame instructions. */ | |
657 | if (cfa_equal_p (&loc, &old_cfa)) | |
658 | return; | |
659 | ||
660 | cfi = new_cfi (); | |
661 | ||
662 | if (loc.reg == old_cfa.reg && !loc.indirect && !old_cfa.indirect) | |
663 | { | |
664 | /* Construct a "DW_CFA_def_cfa_offset <offset>" instruction, indicating | |
665 | the CFA register did not change but the offset did. The data | |
666 | factoring for DW_CFA_def_cfa_offset_sf happens in output_cfi, or | |
667 | in the assembler via the .cfi_def_cfa_offset directive. */ | |
668 | if (loc.offset < 0) | |
669 | cfi->dw_cfi_opc = DW_CFA_def_cfa_offset_sf; | |
670 | else | |
671 | cfi->dw_cfi_opc = DW_CFA_def_cfa_offset; | |
672 | cfi->dw_cfi_oprnd1.dw_cfi_offset = loc.offset; | |
673 | } | |
674 | ||
675 | #ifndef MIPS_DEBUGGING_INFO /* SGI dbx thinks this means no offset. */ | |
676 | else if (loc.offset == old_cfa.offset | |
677 | && old_cfa.reg != INVALID_REGNUM | |
678 | && !loc.indirect | |
679 | && !old_cfa.indirect) | |
680 | { | |
681 | /* Construct a "DW_CFA_def_cfa_register <register>" instruction, | |
682 | indicating the CFA register has changed to <register> but the | |
683 | offset has not changed. */ | |
684 | cfi->dw_cfi_opc = DW_CFA_def_cfa_register; | |
685 | cfi->dw_cfi_oprnd1.dw_cfi_reg_num = loc.reg; | |
686 | } | |
687 | #endif | |
688 | ||
689 | else if (loc.indirect == 0) | |
690 | { | |
691 | /* Construct a "DW_CFA_def_cfa <register> <offset>" instruction, | |
692 | indicating the CFA register has changed to <register> with | |
693 | the specified offset. The data factoring for DW_CFA_def_cfa_sf | |
694 | happens in output_cfi, or in the assembler via the .cfi_def_cfa | |
695 | directive. */ | |
696 | if (loc.offset < 0) | |
697 | cfi->dw_cfi_opc = DW_CFA_def_cfa_sf; | |
698 | else | |
699 | cfi->dw_cfi_opc = DW_CFA_def_cfa; | |
700 | cfi->dw_cfi_oprnd1.dw_cfi_reg_num = loc.reg; | |
701 | cfi->dw_cfi_oprnd2.dw_cfi_offset = loc.offset; | |
702 | } | |
703 | else | |
704 | { | |
705 | /* Construct a DW_CFA_def_cfa_expression instruction to | |
706 | calculate the CFA using a full location expression since no | |
707 | register-offset pair is available. */ | |
708 | struct dw_loc_descr_struct *loc_list; | |
709 | ||
710 | cfi->dw_cfi_opc = DW_CFA_def_cfa_expression; | |
711 | loc_list = build_cfa_loc (&loc, 0); | |
712 | cfi->dw_cfi_oprnd1.dw_cfi_loc = loc_list; | |
713 | } | |
714 | ||
715 | add_fde_cfi (label, cfi); | |
716 | } | |
717 | ||
718 | /* Add the CFI for saving a register. REG is the CFA column number. | |
719 | LABEL is passed to add_fde_cfi. | |
720 | If SREG is -1, the register is saved at OFFSET from the CFA; | |
721 | otherwise it is saved in SREG. */ | |
722 | ||
723 | static void | |
724 | reg_save (const char *label, unsigned int reg, unsigned int sreg, | |
725 | HOST_WIDE_INT offset) | |
726 | { | |
727 | dw_cfi_ref cfi = new_cfi (); | |
728 | dw_fde_ref fde = current_fde (); | |
729 | ||
730 | cfi->dw_cfi_oprnd1.dw_cfi_reg_num = reg; | |
731 | ||
732 | /* When stack is aligned, store REG using DW_CFA_expression with FP. */ | |
733 | if (fde | |
734 | && fde->stack_realign | |
735 | && sreg == INVALID_REGNUM) | |
736 | { | |
737 | cfi->dw_cfi_opc = DW_CFA_expression; | |
738 | cfi->dw_cfi_oprnd1.dw_cfi_reg_num = reg; | |
739 | cfi->dw_cfi_oprnd2.dw_cfi_loc | |
740 | = build_cfa_aligned_loc (&cfa, offset, fde->stack_realignment); | |
741 | } | |
742 | else if (sreg == INVALID_REGNUM) | |
743 | { | |
744 | if (need_data_align_sf_opcode (offset)) | |
745 | cfi->dw_cfi_opc = DW_CFA_offset_extended_sf; | |
746 | else if (reg & ~0x3f) | |
747 | cfi->dw_cfi_opc = DW_CFA_offset_extended; | |
748 | else | |
749 | cfi->dw_cfi_opc = DW_CFA_offset; | |
750 | cfi->dw_cfi_oprnd2.dw_cfi_offset = offset; | |
751 | } | |
752 | else if (sreg == reg) | |
753 | cfi->dw_cfi_opc = DW_CFA_same_value; | |
754 | else | |
755 | { | |
756 | cfi->dw_cfi_opc = DW_CFA_register; | |
757 | cfi->dw_cfi_oprnd2.dw_cfi_reg_num = sreg; | |
758 | } | |
759 | ||
760 | add_fde_cfi (label, cfi); | |
761 | } | |
762 | ||
763 | /* Record the initial position of the return address. RTL is | |
764 | INCOMING_RETURN_ADDR_RTX. */ | |
765 | ||
766 | static void | |
767 | initial_return_save (rtx rtl) | |
768 | { | |
769 | unsigned int reg = INVALID_REGNUM; | |
770 | HOST_WIDE_INT offset = 0; | |
771 | ||
772 | switch (GET_CODE (rtl)) | |
773 | { | |
774 | case REG: | |
775 | /* RA is in a register. */ | |
776 | reg = DWARF_FRAME_REGNUM (REGNO (rtl)); | |
777 | break; | |
778 | ||
779 | case MEM: | |
780 | /* RA is on the stack. */ | |
781 | rtl = XEXP (rtl, 0); | |
782 | switch (GET_CODE (rtl)) | |
783 | { | |
784 | case REG: | |
785 | gcc_assert (REGNO (rtl) == STACK_POINTER_REGNUM); | |
786 | offset = 0; | |
787 | break; | |
788 | ||
789 | case PLUS: | |
790 | gcc_assert (REGNO (XEXP (rtl, 0)) == STACK_POINTER_REGNUM); | |
791 | offset = INTVAL (XEXP (rtl, 1)); | |
792 | break; | |
793 | ||
794 | case MINUS: | |
795 | gcc_assert (REGNO (XEXP (rtl, 0)) == STACK_POINTER_REGNUM); | |
796 | offset = -INTVAL (XEXP (rtl, 1)); | |
797 | break; | |
798 | ||
799 | default: | |
800 | gcc_unreachable (); | |
801 | } | |
802 | ||
803 | break; | |
804 | ||
805 | case PLUS: | |
806 | /* The return address is at some offset from any value we can | |
807 | actually load. For instance, on the SPARC it is in %i7+8. Just | |
808 | ignore the offset for now; it doesn't matter for unwinding frames. */ | |
809 | gcc_assert (CONST_INT_P (XEXP (rtl, 1))); | |
810 | initial_return_save (XEXP (rtl, 0)); | |
811 | return; | |
812 | ||
813 | default: | |
814 | gcc_unreachable (); | |
815 | } | |
816 | ||
817 | if (reg != DWARF_FRAME_RETURN_COLUMN) | |
818 | reg_save (NULL, DWARF_FRAME_RETURN_COLUMN, reg, offset - cfa.offset); | |
819 | } | |
820 | ||
821 | /* Given a SET, calculate the amount of stack adjustment it | |
822 | contains. */ | |
823 | ||
824 | static HOST_WIDE_INT | |
825 | stack_adjust_offset (const_rtx pattern, HOST_WIDE_INT cur_args_size, | |
826 | HOST_WIDE_INT cur_offset) | |
827 | { | |
828 | const_rtx src = SET_SRC (pattern); | |
829 | const_rtx dest = SET_DEST (pattern); | |
830 | HOST_WIDE_INT offset = 0; | |
831 | enum rtx_code code; | |
832 | ||
833 | if (dest == stack_pointer_rtx) | |
834 | { | |
835 | code = GET_CODE (src); | |
836 | ||
837 | /* Assume (set (reg sp) (reg whatever)) sets args_size | |
838 | level to 0. */ | |
839 | if (code == REG && src != stack_pointer_rtx) | |
840 | { | |
841 | offset = -cur_args_size; | |
842 | #ifndef STACK_GROWS_DOWNWARD | |
843 | offset = -offset; | |
844 | #endif | |
845 | return offset - cur_offset; | |
846 | } | |
847 | ||
848 | if (! (code == PLUS || code == MINUS) | |
849 | || XEXP (src, 0) != stack_pointer_rtx | |
850 | || !CONST_INT_P (XEXP (src, 1))) | |
851 | return 0; | |
852 | ||
853 | /* (set (reg sp) (plus (reg sp) (const_int))) */ | |
854 | offset = INTVAL (XEXP (src, 1)); | |
855 | if (code == PLUS) | |
856 | offset = -offset; | |
857 | return offset; | |
858 | } | |
859 | ||
860 | if (MEM_P (src) && !MEM_P (dest)) | |
861 | dest = src; | |
862 | if (MEM_P (dest)) | |
863 | { | |
864 | /* (set (mem (pre_dec (reg sp))) (foo)) */ | |
865 | src = XEXP (dest, 0); | |
866 | code = GET_CODE (src); | |
867 | ||
868 | switch (code) | |
869 | { | |
870 | case PRE_MODIFY: | |
871 | case POST_MODIFY: | |
872 | if (XEXP (src, 0) == stack_pointer_rtx) | |
873 | { | |
874 | rtx val = XEXP (XEXP (src, 1), 1); | |
875 | /* We handle only adjustments by constant amount. */ | |
876 | gcc_assert (GET_CODE (XEXP (src, 1)) == PLUS | |
877 | && CONST_INT_P (val)); | |
878 | offset = -INTVAL (val); | |
879 | break; | |
880 | } | |
881 | return 0; | |
882 | ||
883 | case PRE_DEC: | |
884 | case POST_DEC: | |
885 | if (XEXP (src, 0) == stack_pointer_rtx) | |
886 | { | |
887 | offset = GET_MODE_SIZE (GET_MODE (dest)); | |
888 | break; | |
889 | } | |
890 | return 0; | |
891 | ||
892 | case PRE_INC: | |
893 | case POST_INC: | |
894 | if (XEXP (src, 0) == stack_pointer_rtx) | |
895 | { | |
896 | offset = -GET_MODE_SIZE (GET_MODE (dest)); | |
897 | break; | |
898 | } | |
899 | return 0; | |
900 | ||
901 | default: | |
902 | return 0; | |
903 | } | |
904 | } | |
905 | else | |
906 | return 0; | |
907 | ||
908 | return offset; | |
909 | } | |
910 | ||
911 | /* Precomputed args_size for CODE_LABELs and BARRIERs preceeding them, | |
912 | indexed by INSN_UID. */ | |
913 | ||
914 | static HOST_WIDE_INT *barrier_args_size; | |
915 | ||
916 | /* Helper function for compute_barrier_args_size. Handle one insn. */ | |
917 | ||
918 | static HOST_WIDE_INT | |
919 | compute_barrier_args_size_1 (rtx insn, HOST_WIDE_INT cur_args_size, | |
920 | VEC (rtx, heap) **next) | |
921 | { | |
922 | HOST_WIDE_INT offset = 0; | |
923 | int i; | |
924 | ||
925 | if (! RTX_FRAME_RELATED_P (insn)) | |
926 | { | |
927 | if (prologue_epilogue_contains (insn)) | |
928 | /* Nothing */; | |
929 | else if (GET_CODE (PATTERN (insn)) == SET) | |
930 | offset = stack_adjust_offset (PATTERN (insn), cur_args_size, 0); | |
931 | else if (GET_CODE (PATTERN (insn)) == PARALLEL | |
932 | || GET_CODE (PATTERN (insn)) == SEQUENCE) | |
933 | { | |
934 | /* There may be stack adjustments inside compound insns. Search | |
935 | for them. */ | |
936 | for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--) | |
937 | if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == SET) | |
938 | offset += stack_adjust_offset (XVECEXP (PATTERN (insn), 0, i), | |
939 | cur_args_size, offset); | |
940 | } | |
941 | } | |
942 | else | |
943 | { | |
944 | rtx expr = find_reg_note (insn, REG_FRAME_RELATED_EXPR, NULL_RTX); | |
945 | ||
946 | if (expr) | |
947 | { | |
948 | expr = XEXP (expr, 0); | |
949 | if (GET_CODE (expr) == PARALLEL | |
950 | || GET_CODE (expr) == SEQUENCE) | |
951 | for (i = 1; i < XVECLEN (expr, 0); i++) | |
952 | { | |
953 | rtx elem = XVECEXP (expr, 0, i); | |
954 | ||
955 | if (GET_CODE (elem) == SET && !RTX_FRAME_RELATED_P (elem)) | |
956 | offset += stack_adjust_offset (elem, cur_args_size, offset); | |
957 | } | |
958 | } | |
959 | } | |
960 | ||
961 | #ifndef STACK_GROWS_DOWNWARD | |
962 | offset = -offset; | |
963 | #endif | |
964 | ||
965 | cur_args_size += offset; | |
966 | if (cur_args_size < 0) | |
967 | cur_args_size = 0; | |
968 | ||
969 | if (JUMP_P (insn)) | |
970 | { | |
971 | rtx dest = JUMP_LABEL (insn); | |
972 | ||
973 | if (dest) | |
974 | { | |
975 | if (barrier_args_size [INSN_UID (dest)] < 0) | |
976 | { | |
977 | barrier_args_size [INSN_UID (dest)] = cur_args_size; | |
978 | VEC_safe_push (rtx, heap, *next, dest); | |
979 | } | |
980 | } | |
981 | } | |
982 | ||
983 | return cur_args_size; | |
984 | } | |
985 | ||
986 | /* Walk the whole function and compute args_size on BARRIERs. */ | |
987 | ||
988 | static void | |
989 | compute_barrier_args_size (void) | |
990 | { | |
991 | int max_uid = get_max_uid (), i; | |
992 | rtx insn; | |
993 | VEC (rtx, heap) *worklist, *next, *tmp; | |
994 | ||
995 | barrier_args_size = XNEWVEC (HOST_WIDE_INT, max_uid); | |
996 | for (i = 0; i < max_uid; i++) | |
997 | barrier_args_size[i] = -1; | |
998 | ||
999 | worklist = VEC_alloc (rtx, heap, 20); | |
1000 | next = VEC_alloc (rtx, heap, 20); | |
1001 | insn = get_insns (); | |
1002 | barrier_args_size[INSN_UID (insn)] = 0; | |
1003 | VEC_quick_push (rtx, worklist, insn); | |
1004 | for (;;) | |
1005 | { | |
1006 | while (!VEC_empty (rtx, worklist)) | |
1007 | { | |
1008 | rtx prev, body, first_insn; | |
1009 | HOST_WIDE_INT cur_args_size; | |
1010 | ||
1011 | first_insn = insn = VEC_pop (rtx, worklist); | |
1012 | cur_args_size = barrier_args_size[INSN_UID (insn)]; | |
1013 | prev = prev_nonnote_insn (insn); | |
1014 | if (prev && BARRIER_P (prev)) | |
1015 | barrier_args_size[INSN_UID (prev)] = cur_args_size; | |
1016 | ||
1017 | for (; insn; insn = NEXT_INSN (insn)) | |
1018 | { | |
1019 | if (INSN_DELETED_P (insn) || NOTE_P (insn)) | |
1020 | continue; | |
1021 | if (BARRIER_P (insn)) | |
1022 | break; | |
1023 | ||
1024 | if (LABEL_P (insn)) | |
1025 | { | |
1026 | if (insn == first_insn) | |
1027 | continue; | |
1028 | else if (barrier_args_size[INSN_UID (insn)] < 0) | |
1029 | { | |
1030 | barrier_args_size[INSN_UID (insn)] = cur_args_size; | |
1031 | continue; | |
1032 | } | |
1033 | else | |
1034 | { | |
1035 | /* The insns starting with this label have been | |
1036 | already scanned or are in the worklist. */ | |
1037 | break; | |
1038 | } | |
1039 | } | |
1040 | ||
1041 | body = PATTERN (insn); | |
1042 | if (GET_CODE (body) == SEQUENCE) | |
1043 | { | |
1044 | HOST_WIDE_INT dest_args_size = cur_args_size; | |
1045 | for (i = 1; i < XVECLEN (body, 0); i++) | |
1046 | if (INSN_ANNULLED_BRANCH_P (XVECEXP (body, 0, 0)) | |
1047 | && INSN_FROM_TARGET_P (XVECEXP (body, 0, i))) | |
1048 | dest_args_size | |
1049 | = compute_barrier_args_size_1 (XVECEXP (body, 0, i), | |
1050 | dest_args_size, &next); | |
1051 | else | |
1052 | cur_args_size | |
1053 | = compute_barrier_args_size_1 (XVECEXP (body, 0, i), | |
1054 | cur_args_size, &next); | |
1055 | ||
1056 | if (INSN_ANNULLED_BRANCH_P (XVECEXP (body, 0, 0))) | |
1057 | compute_barrier_args_size_1 (XVECEXP (body, 0, 0), | |
1058 | dest_args_size, &next); | |
1059 | else | |
1060 | cur_args_size | |
1061 | = compute_barrier_args_size_1 (XVECEXP (body, 0, 0), | |
1062 | cur_args_size, &next); | |
1063 | } | |
1064 | else | |
1065 | cur_args_size | |
1066 | = compute_barrier_args_size_1 (insn, cur_args_size, &next); | |
1067 | } | |
1068 | } | |
1069 | ||
1070 | if (VEC_empty (rtx, next)) | |
1071 | break; | |
1072 | ||
1073 | /* Swap WORKLIST with NEXT and truncate NEXT for next iteration. */ | |
1074 | tmp = next; | |
1075 | next = worklist; | |
1076 | worklist = tmp; | |
1077 | VEC_truncate (rtx, next, 0); | |
1078 | } | |
1079 | ||
1080 | VEC_free (rtx, heap, worklist); | |
1081 | VEC_free (rtx, heap, next); | |
1082 | } | |
1083 | ||
1084 | /* Add a CFI to update the running total of the size of arguments | |
1085 | pushed onto the stack. */ | |
1086 | ||
1087 | static void | |
1088 | dwarf2out_args_size (const char *label, HOST_WIDE_INT size) | |
1089 | { | |
1090 | dw_cfi_ref cfi; | |
1091 | ||
1092 | if (size == old_args_size) | |
1093 | return; | |
1094 | ||
1095 | old_args_size = size; | |
1096 | ||
1097 | cfi = new_cfi (); | |
1098 | cfi->dw_cfi_opc = DW_CFA_GNU_args_size; | |
1099 | cfi->dw_cfi_oprnd1.dw_cfi_offset = size; | |
1100 | add_fde_cfi (label, cfi); | |
1101 | } | |
1102 | ||
1103 | /* Record a stack adjustment of OFFSET bytes. */ | |
1104 | ||
1105 | static void | |
1106 | dwarf2out_stack_adjust (HOST_WIDE_INT offset, const char *label) | |
1107 | { | |
1108 | if (cfa.reg == STACK_POINTER_REGNUM) | |
1109 | cfa.offset += offset; | |
1110 | ||
1111 | if (cfa_store.reg == STACK_POINTER_REGNUM) | |
1112 | cfa_store.offset += offset; | |
1113 | ||
1114 | if (ACCUMULATE_OUTGOING_ARGS) | |
1115 | return; | |
1116 | ||
1117 | #ifndef STACK_GROWS_DOWNWARD | |
1118 | offset = -offset; | |
1119 | #endif | |
1120 | ||
1121 | args_size += offset; | |
1122 | if (args_size < 0) | |
1123 | args_size = 0; | |
1124 | ||
1125 | def_cfa_1 (label, &cfa); | |
1126 | if (flag_asynchronous_unwind_tables) | |
1127 | dwarf2out_args_size (label, args_size); | |
1128 | } | |
1129 | ||
1130 | /* Check INSN to see if it looks like a push or a stack adjustment, and | |
1131 | make a note of it if it does. EH uses this information to find out | |
1132 | how much extra space it needs to pop off the stack. */ | |
1133 | ||
1134 | static void | |
1135 | dwarf2out_notice_stack_adjust (rtx insn, bool after_p) | |
1136 | { | |
1137 | HOST_WIDE_INT offset; | |
1138 | const char *label; | |
1139 | int i; | |
1140 | ||
1141 | /* Don't handle epilogues at all. Certainly it would be wrong to do so | |
1142 | with this function. Proper support would require all frame-related | |
1143 | insns to be marked, and to be able to handle saving state around | |
1144 | epilogues textually in the middle of the function. */ | |
1145 | if (prologue_epilogue_contains (insn)) | |
1146 | return; | |
1147 | ||
1148 | /* If INSN is an instruction from target of an annulled branch, the | |
1149 | effects are for the target only and so current argument size | |
1150 | shouldn't change at all. */ | |
1151 | if (final_sequence | |
1152 | && INSN_ANNULLED_BRANCH_P (XVECEXP (final_sequence, 0, 0)) | |
1153 | && INSN_FROM_TARGET_P (insn)) | |
1154 | return; | |
1155 | ||
1156 | /* If only calls can throw, and we have a frame pointer, | |
1157 | save up adjustments until we see the CALL_INSN. */ | |
1158 | if (!flag_asynchronous_unwind_tables && cfa.reg != STACK_POINTER_REGNUM) | |
1159 | { | |
1160 | if (CALL_P (insn) && !after_p) | |
1161 | { | |
1162 | /* Extract the size of the args from the CALL rtx itself. */ | |
1163 | insn = PATTERN (insn); | |
1164 | if (GET_CODE (insn) == PARALLEL) | |
1165 | insn = XVECEXP (insn, 0, 0); | |
1166 | if (GET_CODE (insn) == SET) | |
1167 | insn = SET_SRC (insn); | |
1168 | gcc_assert (GET_CODE (insn) == CALL); | |
1169 | dwarf2out_args_size ("", INTVAL (XEXP (insn, 1))); | |
1170 | } | |
1171 | return; | |
1172 | } | |
1173 | ||
1174 | if (CALL_P (insn) && !after_p) | |
1175 | { | |
1176 | if (!flag_asynchronous_unwind_tables) | |
1177 | dwarf2out_args_size ("", args_size); | |
1178 | return; | |
1179 | } | |
1180 | else if (BARRIER_P (insn)) | |
1181 | { | |
1182 | /* Don't call compute_barrier_args_size () if the only | |
1183 | BARRIER is at the end of function. */ | |
1184 | if (barrier_args_size == NULL && next_nonnote_insn (insn)) | |
1185 | compute_barrier_args_size (); | |
1186 | if (barrier_args_size == NULL) | |
1187 | offset = 0; | |
1188 | else | |
1189 | { | |
1190 | offset = barrier_args_size[INSN_UID (insn)]; | |
1191 | if (offset < 0) | |
1192 | offset = 0; | |
1193 | } | |
1194 | ||
1195 | offset -= args_size; | |
1196 | #ifndef STACK_GROWS_DOWNWARD | |
1197 | offset = -offset; | |
1198 | #endif | |
1199 | } | |
1200 | else if (GET_CODE (PATTERN (insn)) == SET) | |
1201 | offset = stack_adjust_offset (PATTERN (insn), args_size, 0); | |
1202 | else if (GET_CODE (PATTERN (insn)) == PARALLEL | |
1203 | || GET_CODE (PATTERN (insn)) == SEQUENCE) | |
1204 | { | |
1205 | /* There may be stack adjustments inside compound insns. Search | |
1206 | for them. */ | |
1207 | for (offset = 0, i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--) | |
1208 | if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == SET) | |
1209 | offset += stack_adjust_offset (XVECEXP (PATTERN (insn), 0, i), | |
1210 | args_size, offset); | |
1211 | } | |
1212 | else | |
1213 | return; | |
1214 | ||
1215 | if (offset == 0) | |
1216 | return; | |
1217 | ||
1218 | label = dwarf2out_cfi_label (false); | |
1219 | dwarf2out_stack_adjust (offset, label); | |
1220 | } | |
1221 | ||
1222 | /* We delay emitting a register save until either (a) we reach the end | |
1223 | of the prologue or (b) the register is clobbered. This clusters | |
1224 | register saves so that there are fewer pc advances. */ | |
1225 | ||
1226 | struct GTY(()) queued_reg_save { | |
1227 | struct queued_reg_save *next; | |
1228 | rtx reg; | |
1229 | HOST_WIDE_INT cfa_offset; | |
1230 | rtx saved_reg; | |
1231 | }; | |
1232 | ||
1233 | static GTY(()) struct queued_reg_save *queued_reg_saves; | |
1234 | ||
1235 | /* The caller's ORIG_REG is saved in SAVED_IN_REG. */ | |
1236 | typedef struct GTY(()) reg_saved_in_data { | |
1237 | rtx orig_reg; | |
1238 | rtx saved_in_reg; | |
1239 | } reg_saved_in_data; | |
1240 | ||
1241 | DEF_VEC_O (reg_saved_in_data); | |
1242 | DEF_VEC_ALLOC_O (reg_saved_in_data, gc); | |
1243 | ||
1244 | /* A set of registers saved in other registers. This is implemented as | |
1245 | a flat array because it normally contains zero or 1 entry, depending | |
1246 | on the target. IA-64 is the big spender here, using a maximum of | |
1247 | 5 entries. */ | |
1248 | static GTY(()) VEC(reg_saved_in_data, gc) *regs_saved_in_regs; | |
1249 | ||
1250 | /* Compare X and Y for equivalence. The inputs may be REGs or PC_RTX. */ | |
1251 | ||
1252 | static bool | |
1253 | compare_reg_or_pc (rtx x, rtx y) | |
1254 | { | |
1255 | if (REG_P (x) && REG_P (y)) | |
1256 | return REGNO (x) == REGNO (y); | |
1257 | return x == y; | |
1258 | } | |
1259 | ||
1260 | /* Record SRC as being saved in DEST. DEST may be null to delete an | |
1261 | existing entry. SRC may be a register or PC_RTX. */ | |
1262 | ||
1263 | static void | |
1264 | record_reg_saved_in_reg (rtx dest, rtx src) | |
1265 | { | |
1266 | reg_saved_in_data *elt; | |
1267 | size_t i; | |
1268 | ||
1269 | FOR_EACH_VEC_ELT (reg_saved_in_data, regs_saved_in_regs, i, elt) | |
1270 | if (compare_reg_or_pc (elt->orig_reg, src)) | |
1271 | { | |
1272 | if (dest == NULL) | |
1273 | VEC_unordered_remove(reg_saved_in_data, regs_saved_in_regs, i); | |
1274 | else | |
1275 | elt->saved_in_reg = dest; | |
1276 | return; | |
1277 | } | |
1278 | ||
1279 | if (dest == NULL) | |
1280 | return; | |
1281 | ||
1282 | elt = VEC_safe_push(reg_saved_in_data, gc, regs_saved_in_regs, NULL); | |
1283 | elt->orig_reg = src; | |
1284 | elt->saved_in_reg = dest; | |
1285 | } | |
1286 | ||
1287 | static const char *last_reg_save_label; | |
1288 | ||
1289 | /* Add an entry to QUEUED_REG_SAVES saying that REG is now saved at | |
1290 | SREG, or if SREG is NULL then it is saved at OFFSET to the CFA. */ | |
1291 | ||
1292 | static void | |
1293 | queue_reg_save (const char *label, rtx reg, rtx sreg, HOST_WIDE_INT offset) | |
1294 | { | |
1295 | struct queued_reg_save *q; | |
1296 | ||
1297 | /* Duplicates waste space, but it's also necessary to remove them | |
1298 | for correctness, since the queue gets output in reverse | |
1299 | order. */ | |
1300 | for (q = queued_reg_saves; q != NULL; q = q->next) | |
1301 | if (REGNO (q->reg) == REGNO (reg)) | |
1302 | break; | |
1303 | ||
1304 | if (q == NULL) | |
1305 | { | |
1306 | q = ggc_alloc_queued_reg_save (); | |
1307 | q->next = queued_reg_saves; | |
1308 | queued_reg_saves = q; | |
1309 | } | |
1310 | ||
1311 | q->reg = reg; | |
1312 | q->cfa_offset = offset; | |
1313 | q->saved_reg = sreg; | |
1314 | ||
1315 | last_reg_save_label = label; | |
1316 | } | |
1317 | ||
1318 | /* Output all the entries in QUEUED_REG_SAVES. */ | |
1319 | ||
1320 | static void | |
1321 | dwarf2out_flush_queued_reg_saves (void) | |
1322 | { | |
1323 | struct queued_reg_save *q; | |
1324 | ||
1325 | for (q = queued_reg_saves; q; q = q->next) | |
1326 | { | |
1327 | unsigned int reg, sreg; | |
1328 | ||
1329 | record_reg_saved_in_reg (q->saved_reg, q->reg); | |
1330 | ||
1331 | reg = DWARF_FRAME_REGNUM (REGNO (q->reg)); | |
1332 | if (q->saved_reg) | |
1333 | sreg = DWARF_FRAME_REGNUM (REGNO (q->saved_reg)); | |
1334 | else | |
1335 | sreg = INVALID_REGNUM; | |
1336 | reg_save (last_reg_save_label, reg, sreg, q->cfa_offset); | |
1337 | } | |
1338 | ||
1339 | queued_reg_saves = NULL; | |
1340 | last_reg_save_label = NULL; | |
1341 | } | |
1342 | ||
1343 | /* Does INSN clobber any register which QUEUED_REG_SAVES lists a saved | |
1344 | location for? Or, does it clobber a register which we've previously | |
1345 | said that some other register is saved in, and for which we now | |
1346 | have a new location for? */ | |
1347 | ||
1348 | static bool | |
1349 | clobbers_queued_reg_save (const_rtx insn) | |
1350 | { | |
1351 | struct queued_reg_save *q; | |
1352 | ||
1353 | for (q = queued_reg_saves; q; q = q->next) | |
1354 | { | |
1355 | size_t i; | |
1356 | reg_saved_in_data *rir; | |
1357 | ||
1358 | if (modified_in_p (q->reg, insn)) | |
1359 | return true; | |
1360 | ||
1361 | FOR_EACH_VEC_ELT (reg_saved_in_data, regs_saved_in_regs, i, rir) | |
1362 | if (compare_reg_or_pc (q->reg, rir->orig_reg) | |
1363 | && modified_in_p (rir->saved_in_reg, insn)) | |
1364 | return true; | |
1365 | } | |
1366 | ||
1367 | return false; | |
1368 | } | |
1369 | ||
1370 | /* What register, if any, is currently saved in REG? */ | |
1371 | ||
1372 | static rtx | |
1373 | reg_saved_in (rtx reg) | |
1374 | { | |
1375 | unsigned int regn = REGNO (reg); | |
1376 | struct queued_reg_save *q; | |
1377 | reg_saved_in_data *rir; | |
1378 | size_t i; | |
1379 | ||
1380 | for (q = queued_reg_saves; q; q = q->next) | |
1381 | if (q->saved_reg && regn == REGNO (q->saved_reg)) | |
1382 | return q->reg; | |
1383 | ||
1384 | FOR_EACH_VEC_ELT (reg_saved_in_data, regs_saved_in_regs, i, rir) | |
1385 | if (regn == REGNO (rir->saved_in_reg)) | |
1386 | return rir->orig_reg; | |
1387 | ||
1388 | return NULL_RTX; | |
1389 | } | |
1390 | ||
1391 | ||
1392 | /* A temporary register holding an integral value used in adjusting SP | |
1393 | or setting up the store_reg. The "offset" field holds the integer | |
1394 | value, not an offset. */ | |
1395 | static dw_cfa_location cfa_temp; | |
1396 | ||
1397 | /* A subroutine of dwarf2out_frame_debug, process a REG_DEF_CFA note. */ | |
1398 | ||
1399 | static void | |
1400 | dwarf2out_frame_debug_def_cfa (rtx pat, const char *label) | |
1401 | { | |
1402 | memset (&cfa, 0, sizeof (cfa)); | |
1403 | ||
1404 | switch (GET_CODE (pat)) | |
1405 | { | |
1406 | case PLUS: | |
1407 | cfa.reg = REGNO (XEXP (pat, 0)); | |
1408 | cfa.offset = INTVAL (XEXP (pat, 1)); | |
1409 | break; | |
1410 | ||
1411 | case REG: | |
1412 | cfa.reg = REGNO (pat); | |
1413 | break; | |
1414 | ||
1415 | case MEM: | |
1416 | cfa.indirect = 1; | |
1417 | pat = XEXP (pat, 0); | |
1418 | if (GET_CODE (pat) == PLUS) | |
1419 | { | |
1420 | cfa.base_offset = INTVAL (XEXP (pat, 1)); | |
1421 | pat = XEXP (pat, 0); | |
1422 | } | |
1423 | cfa.reg = REGNO (pat); | |
1424 | break; | |
1425 | ||
1426 | default: | |
1427 | /* Recurse and define an expression. */ | |
1428 | gcc_unreachable (); | |
1429 | } | |
1430 | ||
1431 | def_cfa_1 (label, &cfa); | |
1432 | } | |
1433 | ||
1434 | /* A subroutine of dwarf2out_frame_debug, process a REG_ADJUST_CFA note. */ | |
1435 | ||
1436 | static void | |
1437 | dwarf2out_frame_debug_adjust_cfa (rtx pat, const char *label) | |
1438 | { | |
1439 | rtx src, dest; | |
1440 | ||
1441 | gcc_assert (GET_CODE (pat) == SET); | |
1442 | dest = XEXP (pat, 0); | |
1443 | src = XEXP (pat, 1); | |
1444 | ||
1445 | switch (GET_CODE (src)) | |
1446 | { | |
1447 | case PLUS: | |
1448 | gcc_assert (REGNO (XEXP (src, 0)) == cfa.reg); | |
1449 | cfa.offset -= INTVAL (XEXP (src, 1)); | |
1450 | break; | |
1451 | ||
1452 | case REG: | |
1453 | break; | |
1454 | ||
1455 | default: | |
1456 | gcc_unreachable (); | |
1457 | } | |
1458 | ||
1459 | cfa.reg = REGNO (dest); | |
1460 | gcc_assert (cfa.indirect == 0); | |
1461 | ||
1462 | def_cfa_1 (label, &cfa); | |
1463 | } | |
1464 | ||
1465 | /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_OFFSET note. */ | |
1466 | ||
1467 | static void | |
1468 | dwarf2out_frame_debug_cfa_offset (rtx set, const char *label) | |
1469 | { | |
1470 | HOST_WIDE_INT offset; | |
1471 | rtx src, addr, span; | |
1472 | unsigned int sregno; | |
1473 | ||
1474 | src = XEXP (set, 1); | |
1475 | addr = XEXP (set, 0); | |
1476 | gcc_assert (MEM_P (addr)); | |
1477 | addr = XEXP (addr, 0); | |
1478 | ||
1479 | /* As documented, only consider extremely simple addresses. */ | |
1480 | switch (GET_CODE (addr)) | |
1481 | { | |
1482 | case REG: | |
1483 | gcc_assert (REGNO (addr) == cfa.reg); | |
1484 | offset = -cfa.offset; | |
1485 | break; | |
1486 | case PLUS: | |
1487 | gcc_assert (REGNO (XEXP (addr, 0)) == cfa.reg); | |
1488 | offset = INTVAL (XEXP (addr, 1)) - cfa.offset; | |
1489 | break; | |
1490 | default: | |
1491 | gcc_unreachable (); | |
1492 | } | |
1493 | ||
1494 | if (src == pc_rtx) | |
1495 | { | |
1496 | span = NULL; | |
1497 | sregno = DWARF_FRAME_RETURN_COLUMN; | |
1498 | } | |
1499 | else | |
1500 | { | |
1501 | span = targetm.dwarf_register_span (src); | |
1502 | sregno = DWARF_FRAME_REGNUM (REGNO (src)); | |
1503 | } | |
1504 | ||
1505 | /* ??? We'd like to use queue_reg_save, but we need to come up with | |
1506 | a different flushing heuristic for epilogues. */ | |
1507 | if (!span) | |
1508 | reg_save (label, sregno, INVALID_REGNUM, offset); | |
1509 | else | |
1510 | { | |
1511 | /* We have a PARALLEL describing where the contents of SRC live. | |
1512 | Queue register saves for each piece of the PARALLEL. */ | |
1513 | int par_index; | |
1514 | int limit; | |
1515 | HOST_WIDE_INT span_offset = offset; | |
1516 | ||
1517 | gcc_assert (GET_CODE (span) == PARALLEL); | |
1518 | ||
1519 | limit = XVECLEN (span, 0); | |
1520 | for (par_index = 0; par_index < limit; par_index++) | |
1521 | { | |
1522 | rtx elem = XVECEXP (span, 0, par_index); | |
1523 | ||
1524 | sregno = DWARF_FRAME_REGNUM (REGNO (src)); | |
1525 | reg_save (label, sregno, INVALID_REGNUM, span_offset); | |
1526 | span_offset += GET_MODE_SIZE (GET_MODE (elem)); | |
1527 | } | |
1528 | } | |
1529 | } | |
1530 | ||
1531 | /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_REGISTER note. */ | |
1532 | ||
1533 | static void | |
1534 | dwarf2out_frame_debug_cfa_register (rtx set, const char *label) | |
1535 | { | |
1536 | rtx src, dest; | |
1537 | unsigned sregno, dregno; | |
1538 | ||
1539 | src = XEXP (set, 1); | |
1540 | dest = XEXP (set, 0); | |
1541 | ||
1542 | if (src == pc_rtx) | |
1543 | sregno = DWARF_FRAME_RETURN_COLUMN; | |
1544 | else | |
1545 | { | |
1546 | record_reg_saved_in_reg (dest, src); | |
1547 | sregno = DWARF_FRAME_REGNUM (REGNO (src)); | |
1548 | } | |
1549 | ||
1550 | dregno = DWARF_FRAME_REGNUM (REGNO (dest)); | |
1551 | ||
1552 | /* ??? We'd like to use queue_reg_save, but we need to come up with | |
1553 | a different flushing heuristic for epilogues. */ | |
1554 | reg_save (label, sregno, dregno, 0); | |
1555 | } | |
1556 | ||
1557 | /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_EXPRESSION note. */ | |
1558 | ||
1559 | static void | |
1560 | dwarf2out_frame_debug_cfa_expression (rtx set, const char *label) | |
1561 | { | |
1562 | rtx src, dest, span; | |
1563 | dw_cfi_ref cfi = new_cfi (); | |
1564 | ||
1565 | dest = SET_DEST (set); | |
1566 | src = SET_SRC (set); | |
1567 | ||
1568 | gcc_assert (REG_P (src)); | |
1569 | gcc_assert (MEM_P (dest)); | |
1570 | ||
1571 | span = targetm.dwarf_register_span (src); | |
1572 | gcc_assert (!span); | |
1573 | ||
1574 | cfi->dw_cfi_opc = DW_CFA_expression; | |
1575 | cfi->dw_cfi_oprnd1.dw_cfi_reg_num = DWARF_FRAME_REGNUM (REGNO (src)); | |
1576 | cfi->dw_cfi_oprnd2.dw_cfi_loc | |
1577 | = mem_loc_descriptor (XEXP (dest, 0), get_address_mode (dest), | |
1578 | GET_MODE (dest), VAR_INIT_STATUS_INITIALIZED); | |
1579 | ||
1580 | /* ??? We'd like to use queue_reg_save, were the interface different, | |
1581 | and, as above, we could manage flushing for epilogues. */ | |
1582 | add_fde_cfi (label, cfi); | |
1583 | } | |
1584 | ||
1585 | /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_RESTORE note. */ | |
1586 | ||
1587 | static void | |
1588 | dwarf2out_frame_debug_cfa_restore (rtx reg, const char *label) | |
1589 | { | |
1590 | dw_cfi_ref cfi = new_cfi (); | |
1591 | unsigned int regno = DWARF_FRAME_REGNUM (REGNO (reg)); | |
1592 | ||
1593 | cfi->dw_cfi_opc = (regno & ~0x3f ? DW_CFA_restore_extended : DW_CFA_restore); | |
1594 | cfi->dw_cfi_oprnd1.dw_cfi_reg_num = regno; | |
1595 | ||
1596 | add_fde_cfi (label, cfi); | |
1597 | } | |
1598 | ||
1599 | /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_WINDOW_SAVE. | |
1600 | ??? Perhaps we should note in the CIE where windows are saved (instead of | |
1601 | assuming 0(cfa)) and what registers are in the window. */ | |
1602 | ||
1603 | static void | |
1604 | dwarf2out_frame_debug_cfa_window_save (const char *label) | |
1605 | { | |
1606 | dw_cfi_ref cfi = new_cfi (); | |
1607 | ||
1608 | cfi->dw_cfi_opc = DW_CFA_GNU_window_save; | |
1609 | add_fde_cfi (label, cfi); | |
1610 | } | |
1611 | ||
1612 | /* Record call frame debugging information for an expression EXPR, | |
1613 | which either sets SP or FP (adjusting how we calculate the frame | |
1614 | address) or saves a register to the stack or another register. | |
1615 | LABEL indicates the address of EXPR. | |
1616 | ||
1617 | This function encodes a state machine mapping rtxes to actions on | |
1618 | cfa, cfa_store, and cfa_temp.reg. We describe these rules so | |
1619 | users need not read the source code. | |
1620 | ||
1621 | The High-Level Picture | |
1622 | ||
1623 | Changes in the register we use to calculate the CFA: Currently we | |
1624 | assume that if you copy the CFA register into another register, we | |
1625 | should take the other one as the new CFA register; this seems to | |
1626 | work pretty well. If it's wrong for some target, it's simple | |
1627 | enough not to set RTX_FRAME_RELATED_P on the insn in question. | |
1628 | ||
1629 | Changes in the register we use for saving registers to the stack: | |
1630 | This is usually SP, but not always. Again, we deduce that if you | |
1631 | copy SP into another register (and SP is not the CFA register), | |
1632 | then the new register is the one we will be using for register | |
1633 | saves. This also seems to work. | |
1634 | ||
1635 | Register saves: There's not much guesswork about this one; if | |
1636 | RTX_FRAME_RELATED_P is set on an insn which modifies memory, it's a | |
1637 | register save, and the register used to calculate the destination | |
1638 | had better be the one we think we're using for this purpose. | |
1639 | It's also assumed that a copy from a call-saved register to another | |
1640 | register is saving that register if RTX_FRAME_RELATED_P is set on | |
1641 | that instruction. If the copy is from a call-saved register to | |
1642 | the *same* register, that means that the register is now the same | |
1643 | value as in the caller. | |
1644 | ||
1645 | Except: If the register being saved is the CFA register, and the | |
1646 | offset is nonzero, we are saving the CFA, so we assume we have to | |
1647 | use DW_CFA_def_cfa_expression. If the offset is 0, we assume that | |
1648 | the intent is to save the value of SP from the previous frame. | |
1649 | ||
1650 | In addition, if a register has previously been saved to a different | |
1651 | register, | |
1652 | ||
1653 | Invariants / Summaries of Rules | |
1654 | ||
1655 | cfa current rule for calculating the CFA. It usually | |
1656 | consists of a register and an offset. | |
1657 | cfa_store register used by prologue code to save things to the stack | |
1658 | cfa_store.offset is the offset from the value of | |
1659 | cfa_store.reg to the actual CFA | |
1660 | cfa_temp register holding an integral value. cfa_temp.offset | |
1661 | stores the value, which will be used to adjust the | |
1662 | stack pointer. cfa_temp is also used like cfa_store, | |
1663 | to track stores to the stack via fp or a temp reg. | |
1664 | ||
1665 | Rules 1- 4: Setting a register's value to cfa.reg or an expression | |
1666 | with cfa.reg as the first operand changes the cfa.reg and its | |
1667 | cfa.offset. Rule 1 and 4 also set cfa_temp.reg and | |
1668 | cfa_temp.offset. | |
1669 | ||
1670 | Rules 6- 9: Set a non-cfa.reg register value to a constant or an | |
1671 | expression yielding a constant. This sets cfa_temp.reg | |
1672 | and cfa_temp.offset. | |
1673 | ||
1674 | Rule 5: Create a new register cfa_store used to save items to the | |
1675 | stack. | |
1676 | ||
1677 | Rules 10-14: Save a register to the stack. Define offset as the | |
1678 | difference of the original location and cfa_store's | |
1679 | location (or cfa_temp's location if cfa_temp is used). | |
1680 | ||
1681 | Rules 16-20: If AND operation happens on sp in prologue, we assume | |
1682 | stack is realigned. We will use a group of DW_OP_XXX | |
1683 | expressions to represent the location of the stored | |
1684 | register instead of CFA+offset. | |
1685 | ||
1686 | The Rules | |
1687 | ||
1688 | "{a,b}" indicates a choice of a xor b. | |
1689 | "<reg>:cfa.reg" indicates that <reg> must equal cfa.reg. | |
1690 | ||
1691 | Rule 1: | |
1692 | (set <reg1> <reg2>:cfa.reg) | |
1693 | effects: cfa.reg = <reg1> | |
1694 | cfa.offset unchanged | |
1695 | cfa_temp.reg = <reg1> | |
1696 | cfa_temp.offset = cfa.offset | |
1697 | ||
1698 | Rule 2: | |
1699 | (set sp ({minus,plus,losum} {sp,fp}:cfa.reg | |
1700 | {<const_int>,<reg>:cfa_temp.reg})) | |
1701 | effects: cfa.reg = sp if fp used | |
1702 | cfa.offset += {+/- <const_int>, cfa_temp.offset} if cfa.reg==sp | |
1703 | cfa_store.offset += {+/- <const_int>, cfa_temp.offset} | |
1704 | if cfa_store.reg==sp | |
1705 | ||
1706 | Rule 3: | |
1707 | (set fp ({minus,plus,losum} <reg>:cfa.reg <const_int>)) | |
1708 | effects: cfa.reg = fp | |
1709 | cfa_offset += +/- <const_int> | |
1710 | ||
1711 | Rule 4: | |
1712 | (set <reg1> ({plus,losum} <reg2>:cfa.reg <const_int>)) | |
1713 | constraints: <reg1> != fp | |
1714 | <reg1> != sp | |
1715 | effects: cfa.reg = <reg1> | |
1716 | cfa_temp.reg = <reg1> | |
1717 | cfa_temp.offset = cfa.offset | |
1718 | ||
1719 | Rule 5: | |
1720 | (set <reg1> (plus <reg2>:cfa_temp.reg sp:cfa.reg)) | |
1721 | constraints: <reg1> != fp | |
1722 | <reg1> != sp | |
1723 | effects: cfa_store.reg = <reg1> | |
1724 | cfa_store.offset = cfa.offset - cfa_temp.offset | |
1725 | ||
1726 | Rule 6: | |
1727 | (set <reg> <const_int>) | |
1728 | effects: cfa_temp.reg = <reg> | |
1729 | cfa_temp.offset = <const_int> | |
1730 | ||
1731 | Rule 7: | |
1732 | (set <reg1>:cfa_temp.reg (ior <reg2>:cfa_temp.reg <const_int>)) | |
1733 | effects: cfa_temp.reg = <reg1> | |
1734 | cfa_temp.offset |= <const_int> | |
1735 | ||
1736 | Rule 8: | |
1737 | (set <reg> (high <exp>)) | |
1738 | effects: none | |
1739 | ||
1740 | Rule 9: | |
1741 | (set <reg> (lo_sum <exp> <const_int>)) | |
1742 | effects: cfa_temp.reg = <reg> | |
1743 | cfa_temp.offset = <const_int> | |
1744 | ||
1745 | Rule 10: | |
1746 | (set (mem ({pre,post}_modify sp:cfa_store (???? <reg1> <const_int>))) <reg2>) | |
1747 | effects: cfa_store.offset -= <const_int> | |
1748 | cfa.offset = cfa_store.offset if cfa.reg == sp | |
1749 | cfa.reg = sp | |
1750 | cfa.base_offset = -cfa_store.offset | |
1751 | ||
1752 | Rule 11: | |
1753 | (set (mem ({pre_inc,pre_dec,post_dec} sp:cfa_store.reg)) <reg>) | |
1754 | effects: cfa_store.offset += -/+ mode_size(mem) | |
1755 | cfa.offset = cfa_store.offset if cfa.reg == sp | |
1756 | cfa.reg = sp | |
1757 | cfa.base_offset = -cfa_store.offset | |
1758 | ||
1759 | Rule 12: | |
1760 | (set (mem ({minus,plus,losum} <reg1>:{cfa_store,cfa_temp} <const_int>)) | |
1761 | ||
1762 | <reg2>) | |
1763 | effects: cfa.reg = <reg1> | |
1764 | cfa.base_offset = -/+ <const_int> - {cfa_store,cfa_temp}.offset | |
1765 | ||
1766 | Rule 13: | |
1767 | (set (mem <reg1>:{cfa_store,cfa_temp}) <reg2>) | |
1768 | effects: cfa.reg = <reg1> | |
1769 | cfa.base_offset = -{cfa_store,cfa_temp}.offset | |
1770 | ||
1771 | Rule 14: | |
1772 | (set (mem (post_inc <reg1>:cfa_temp <const_int>)) <reg2>) | |
1773 | effects: cfa.reg = <reg1> | |
1774 | cfa.base_offset = -cfa_temp.offset | |
1775 | cfa_temp.offset -= mode_size(mem) | |
1776 | ||
1777 | Rule 15: | |
1778 | (set <reg> {unspec, unspec_volatile}) | |
1779 | effects: target-dependent | |
1780 | ||
1781 | Rule 16: | |
1782 | (set sp (and: sp <const_int>)) | |
1783 | constraints: cfa_store.reg == sp | |
1784 | effects: current_fde.stack_realign = 1 | |
1785 | cfa_store.offset = 0 | |
1786 | fde->drap_reg = cfa.reg if cfa.reg != sp and cfa.reg != fp | |
1787 | ||
1788 | Rule 17: | |
1789 | (set (mem ({pre_inc, pre_dec} sp)) (mem (plus (cfa.reg) (const_int)))) | |
1790 | effects: cfa_store.offset += -/+ mode_size(mem) | |
1791 | ||
1792 | Rule 18: | |
1793 | (set (mem ({pre_inc, pre_dec} sp)) fp) | |
1794 | constraints: fde->stack_realign == 1 | |
1795 | effects: cfa_store.offset = 0 | |
1796 | cfa.reg != HARD_FRAME_POINTER_REGNUM | |
1797 | ||
1798 | Rule 19: | |
1799 | (set (mem ({pre_inc, pre_dec} sp)) cfa.reg) | |
1800 | constraints: fde->stack_realign == 1 | |
1801 | && cfa.offset == 0 | |
1802 | && cfa.indirect == 0 | |
1803 | && cfa.reg != HARD_FRAME_POINTER_REGNUM | |
1804 | effects: Use DW_CFA_def_cfa_expression to define cfa | |
1805 | cfa.reg == fde->drap_reg */ | |
1806 | ||
1807 | static void | |
1808 | dwarf2out_frame_debug_expr (rtx expr, const char *label) | |
1809 | { | |
1810 | rtx src, dest, span; | |
1811 | HOST_WIDE_INT offset; | |
1812 | dw_fde_ref fde; | |
1813 | ||
1814 | /* If RTX_FRAME_RELATED_P is set on a PARALLEL, process each member of | |
1815 | the PARALLEL independently. The first element is always processed if | |
1816 | it is a SET. This is for backward compatibility. Other elements | |
1817 | are processed only if they are SETs and the RTX_FRAME_RELATED_P | |
1818 | flag is set in them. */ | |
1819 | if (GET_CODE (expr) == PARALLEL || GET_CODE (expr) == SEQUENCE) | |
1820 | { | |
1821 | int par_index; | |
1822 | int limit = XVECLEN (expr, 0); | |
1823 | rtx elem; | |
1824 | ||
1825 | /* PARALLELs have strict read-modify-write semantics, so we | |
1826 | ought to evaluate every rvalue before changing any lvalue. | |
1827 | It's cumbersome to do that in general, but there's an | |
1828 | easy approximation that is enough for all current users: | |
1829 | handle register saves before register assignments. */ | |
1830 | if (GET_CODE (expr) == PARALLEL) | |
1831 | for (par_index = 0; par_index < limit; par_index++) | |
1832 | { | |
1833 | elem = XVECEXP (expr, 0, par_index); | |
1834 | if (GET_CODE (elem) == SET | |
1835 | && MEM_P (SET_DEST (elem)) | |
1836 | && (RTX_FRAME_RELATED_P (elem) || par_index == 0)) | |
1837 | dwarf2out_frame_debug_expr (elem, label); | |
1838 | } | |
1839 | ||
1840 | for (par_index = 0; par_index < limit; par_index++) | |
1841 | { | |
1842 | elem = XVECEXP (expr, 0, par_index); | |
1843 | if (GET_CODE (elem) == SET | |
1844 | && (!MEM_P (SET_DEST (elem)) || GET_CODE (expr) == SEQUENCE) | |
1845 | && (RTX_FRAME_RELATED_P (elem) || par_index == 0)) | |
1846 | dwarf2out_frame_debug_expr (elem, label); | |
1847 | else if (GET_CODE (elem) == SET | |
1848 | && par_index != 0 | |
1849 | && !RTX_FRAME_RELATED_P (elem)) | |
1850 | { | |
1851 | /* Stack adjustment combining might combine some post-prologue | |
1852 | stack adjustment into a prologue stack adjustment. */ | |
1853 | HOST_WIDE_INT offset = stack_adjust_offset (elem, args_size, 0); | |
1854 | ||
1855 | if (offset != 0) | |
1856 | dwarf2out_stack_adjust (offset, label); | |
1857 | } | |
1858 | } | |
1859 | return; | |
1860 | } | |
1861 | ||
1862 | gcc_assert (GET_CODE (expr) == SET); | |
1863 | ||
1864 | src = SET_SRC (expr); | |
1865 | dest = SET_DEST (expr); | |
1866 | ||
1867 | if (REG_P (src)) | |
1868 | { | |
1869 | rtx rsi = reg_saved_in (src); | |
1870 | if (rsi) | |
1871 | src = rsi; | |
1872 | } | |
1873 | ||
1874 | fde = current_fde (); | |
1875 | ||
1876 | switch (GET_CODE (dest)) | |
1877 | { | |
1878 | case REG: | |
1879 | switch (GET_CODE (src)) | |
1880 | { | |
1881 | /* Setting FP from SP. */ | |
1882 | case REG: | |
1883 | if (cfa.reg == (unsigned) REGNO (src)) | |
1884 | { | |
1885 | /* Rule 1 */ | |
1886 | /* Update the CFA rule wrt SP or FP. Make sure src is | |
1887 | relative to the current CFA register. | |
1888 | ||
1889 | We used to require that dest be either SP or FP, but the | |
1890 | ARM copies SP to a temporary register, and from there to | |
1891 | FP. So we just rely on the backends to only set | |
1892 | RTX_FRAME_RELATED_P on appropriate insns. */ | |
1893 | cfa.reg = REGNO (dest); | |
1894 | cfa_temp.reg = cfa.reg; | |
1895 | cfa_temp.offset = cfa.offset; | |
1896 | } | |
1897 | else | |
1898 | { | |
1899 | /* Saving a register in a register. */ | |
1900 | gcc_assert (!fixed_regs [REGNO (dest)] | |
1901 | /* For the SPARC and its register window. */ | |
1902 | || (DWARF_FRAME_REGNUM (REGNO (src)) | |
1903 | == DWARF_FRAME_RETURN_COLUMN)); | |
1904 | ||
1905 | /* After stack is aligned, we can only save SP in FP | |
1906 | if drap register is used. In this case, we have | |
1907 | to restore stack pointer with the CFA value and we | |
1908 | don't generate this DWARF information. */ | |
1909 | if (fde | |
1910 | && fde->stack_realign | |
1911 | && REGNO (src) == STACK_POINTER_REGNUM) | |
1912 | gcc_assert (REGNO (dest) == HARD_FRAME_POINTER_REGNUM | |
1913 | && fde->drap_reg != INVALID_REGNUM | |
1914 | && cfa.reg != REGNO (src)); | |
1915 | else | |
1916 | queue_reg_save (label, src, dest, 0); | |
1917 | } | |
1918 | break; | |
1919 | ||
1920 | case PLUS: | |
1921 | case MINUS: | |
1922 | case LO_SUM: | |
1923 | if (dest == stack_pointer_rtx) | |
1924 | { | |
1925 | /* Rule 2 */ | |
1926 | /* Adjusting SP. */ | |
1927 | switch (GET_CODE (XEXP (src, 1))) | |
1928 | { | |
1929 | case CONST_INT: | |
1930 | offset = INTVAL (XEXP (src, 1)); | |
1931 | break; | |
1932 | case REG: | |
1933 | gcc_assert ((unsigned) REGNO (XEXP (src, 1)) | |
1934 | == cfa_temp.reg); | |
1935 | offset = cfa_temp.offset; | |
1936 | break; | |
1937 | default: | |
1938 | gcc_unreachable (); | |
1939 | } | |
1940 | ||
1941 | if (XEXP (src, 0) == hard_frame_pointer_rtx) | |
1942 | { | |
1943 | /* Restoring SP from FP in the epilogue. */ | |
1944 | gcc_assert (cfa.reg == (unsigned) HARD_FRAME_POINTER_REGNUM); | |
1945 | cfa.reg = STACK_POINTER_REGNUM; | |
1946 | } | |
1947 | else if (GET_CODE (src) == LO_SUM) | |
1948 | /* Assume we've set the source reg of the LO_SUM from sp. */ | |
1949 | ; | |
1950 | else | |
1951 | gcc_assert (XEXP (src, 0) == stack_pointer_rtx); | |
1952 | ||
1953 | if (GET_CODE (src) != MINUS) | |
1954 | offset = -offset; | |
1955 | if (cfa.reg == STACK_POINTER_REGNUM) | |
1956 | cfa.offset += offset; | |
1957 | if (cfa_store.reg == STACK_POINTER_REGNUM) | |
1958 | cfa_store.offset += offset; | |
1959 | } | |
1960 | else if (dest == hard_frame_pointer_rtx) | |
1961 | { | |
1962 | /* Rule 3 */ | |
1963 | /* Either setting the FP from an offset of the SP, | |
1964 | or adjusting the FP */ | |
1965 | gcc_assert (frame_pointer_needed); | |
1966 | ||
1967 | gcc_assert (REG_P (XEXP (src, 0)) | |
1968 | && (unsigned) REGNO (XEXP (src, 0)) == cfa.reg | |
1969 | && CONST_INT_P (XEXP (src, 1))); | |
1970 | offset = INTVAL (XEXP (src, 1)); | |
1971 | if (GET_CODE (src) != MINUS) | |
1972 | offset = -offset; | |
1973 | cfa.offset += offset; | |
1974 | cfa.reg = HARD_FRAME_POINTER_REGNUM; | |
1975 | } | |
1976 | else | |
1977 | { | |
1978 | gcc_assert (GET_CODE (src) != MINUS); | |
1979 | ||
1980 | /* Rule 4 */ | |
1981 | if (REG_P (XEXP (src, 0)) | |
1982 | && REGNO (XEXP (src, 0)) == cfa.reg | |
1983 | && CONST_INT_P (XEXP (src, 1))) | |
1984 | { | |
1985 | /* Setting a temporary CFA register that will be copied | |
1986 | into the FP later on. */ | |
1987 | offset = - INTVAL (XEXP (src, 1)); | |
1988 | cfa.offset += offset; | |
1989 | cfa.reg = REGNO (dest); | |
1990 | /* Or used to save regs to the stack. */ | |
1991 | cfa_temp.reg = cfa.reg; | |
1992 | cfa_temp.offset = cfa.offset; | |
1993 | } | |
1994 | ||
1995 | /* Rule 5 */ | |
1996 | else if (REG_P (XEXP (src, 0)) | |
1997 | && REGNO (XEXP (src, 0)) == cfa_temp.reg | |
1998 | && XEXP (src, 1) == stack_pointer_rtx) | |
1999 | { | |
2000 | /* Setting a scratch register that we will use instead | |
2001 | of SP for saving registers to the stack. */ | |
2002 | gcc_assert (cfa.reg == STACK_POINTER_REGNUM); | |
2003 | cfa_store.reg = REGNO (dest); | |
2004 | cfa_store.offset = cfa.offset - cfa_temp.offset; | |
2005 | } | |
2006 | ||
2007 | /* Rule 9 */ | |
2008 | else if (GET_CODE (src) == LO_SUM | |
2009 | && CONST_INT_P (XEXP (src, 1))) | |
2010 | { | |
2011 | cfa_temp.reg = REGNO (dest); | |
2012 | cfa_temp.offset = INTVAL (XEXP (src, 1)); | |
2013 | } | |
2014 | else | |
2015 | gcc_unreachable (); | |
2016 | } | |
2017 | break; | |
2018 | ||
2019 | /* Rule 6 */ | |
2020 | case CONST_INT: | |
2021 | cfa_temp.reg = REGNO (dest); | |
2022 | cfa_temp.offset = INTVAL (src); | |
2023 | break; | |
2024 | ||
2025 | /* Rule 7 */ | |
2026 | case IOR: | |
2027 | gcc_assert (REG_P (XEXP (src, 0)) | |
2028 | && (unsigned) REGNO (XEXP (src, 0)) == cfa_temp.reg | |
2029 | && CONST_INT_P (XEXP (src, 1))); | |
2030 | ||
2031 | if ((unsigned) REGNO (dest) != cfa_temp.reg) | |
2032 | cfa_temp.reg = REGNO (dest); | |
2033 | cfa_temp.offset |= INTVAL (XEXP (src, 1)); | |
2034 | break; | |
2035 | ||
2036 | /* Skip over HIGH, assuming it will be followed by a LO_SUM, | |
2037 | which will fill in all of the bits. */ | |
2038 | /* Rule 8 */ | |
2039 | case HIGH: | |
2040 | break; | |
2041 | ||
2042 | /* Rule 15 */ | |
2043 | case UNSPEC: | |
2044 | case UNSPEC_VOLATILE: | |
2045 | gcc_assert (targetm.dwarf_handle_frame_unspec); | |
2046 | targetm.dwarf_handle_frame_unspec (label, expr, XINT (src, 1)); | |
2047 | return; | |
2048 | ||
2049 | /* Rule 16 */ | |
2050 | case AND: | |
2051 | /* If this AND operation happens on stack pointer in prologue, | |
2052 | we assume the stack is realigned and we extract the | |
2053 | alignment. */ | |
2054 | if (fde && XEXP (src, 0) == stack_pointer_rtx) | |
2055 | { | |
2056 | /* We interpret reg_save differently with stack_realign set. | |
2057 | Thus we must flush whatever we have queued first. */ | |
2058 | dwarf2out_flush_queued_reg_saves (); | |
2059 | ||
2060 | gcc_assert (cfa_store.reg == REGNO (XEXP (src, 0))); | |
2061 | fde->stack_realign = 1; | |
2062 | fde->stack_realignment = INTVAL (XEXP (src, 1)); | |
2063 | cfa_store.offset = 0; | |
2064 | ||
2065 | if (cfa.reg != STACK_POINTER_REGNUM | |
2066 | && cfa.reg != HARD_FRAME_POINTER_REGNUM) | |
2067 | fde->drap_reg = cfa.reg; | |
2068 | } | |
2069 | return; | |
2070 | ||
2071 | default: | |
2072 | gcc_unreachable (); | |
2073 | } | |
2074 | ||
2075 | def_cfa_1 (label, &cfa); | |
2076 | break; | |
2077 | ||
2078 | case MEM: | |
2079 | ||
2080 | /* Saving a register to the stack. Make sure dest is relative to the | |
2081 | CFA register. */ | |
2082 | switch (GET_CODE (XEXP (dest, 0))) | |
2083 | { | |
2084 | /* Rule 10 */ | |
2085 | /* With a push. */ | |
2086 | case PRE_MODIFY: | |
2087 | case POST_MODIFY: | |
2088 | /* We can't handle variable size modifications. */ | |
2089 | gcc_assert (GET_CODE (XEXP (XEXP (XEXP (dest, 0), 1), 1)) | |
2090 | == CONST_INT); | |
2091 | offset = -INTVAL (XEXP (XEXP (XEXP (dest, 0), 1), 1)); | |
2092 | ||
2093 | gcc_assert (REGNO (XEXP (XEXP (dest, 0), 0)) == STACK_POINTER_REGNUM | |
2094 | && cfa_store.reg == STACK_POINTER_REGNUM); | |
2095 | ||
2096 | cfa_store.offset += offset; | |
2097 | if (cfa.reg == STACK_POINTER_REGNUM) | |
2098 | cfa.offset = cfa_store.offset; | |
2099 | ||
2100 | if (GET_CODE (XEXP (dest, 0)) == POST_MODIFY) | |
2101 | offset -= cfa_store.offset; | |
2102 | else | |
2103 | offset = -cfa_store.offset; | |
2104 | break; | |
2105 | ||
2106 | /* Rule 11 */ | |
2107 | case PRE_INC: | |
2108 | case PRE_DEC: | |
2109 | case POST_DEC: | |
2110 | offset = GET_MODE_SIZE (GET_MODE (dest)); | |
2111 | if (GET_CODE (XEXP (dest, 0)) == PRE_INC) | |
2112 | offset = -offset; | |
2113 | ||
2114 | gcc_assert ((REGNO (XEXP (XEXP (dest, 0), 0)) | |
2115 | == STACK_POINTER_REGNUM) | |
2116 | && cfa_store.reg == STACK_POINTER_REGNUM); | |
2117 | ||
2118 | cfa_store.offset += offset; | |
2119 | ||
2120 | /* Rule 18: If stack is aligned, we will use FP as a | |
2121 | reference to represent the address of the stored | |
2122 | regiser. */ | |
2123 | if (fde | |
2124 | && fde->stack_realign | |
2125 | && src == hard_frame_pointer_rtx) | |
2126 | { | |
2127 | gcc_assert (cfa.reg != HARD_FRAME_POINTER_REGNUM); | |
2128 | cfa_store.offset = 0; | |
2129 | } | |
2130 | ||
2131 | if (cfa.reg == STACK_POINTER_REGNUM) | |
2132 | cfa.offset = cfa_store.offset; | |
2133 | ||
2134 | if (GET_CODE (XEXP (dest, 0)) == POST_DEC) | |
2135 | offset += -cfa_store.offset; | |
2136 | else | |
2137 | offset = -cfa_store.offset; | |
2138 | break; | |
2139 | ||
2140 | /* Rule 12 */ | |
2141 | /* With an offset. */ | |
2142 | case PLUS: | |
2143 | case MINUS: | |
2144 | case LO_SUM: | |
2145 | { | |
2146 | int regno; | |
2147 | ||
2148 | gcc_assert (CONST_INT_P (XEXP (XEXP (dest, 0), 1)) | |
2149 | && REG_P (XEXP (XEXP (dest, 0), 0))); | |
2150 | offset = INTVAL (XEXP (XEXP (dest, 0), 1)); | |
2151 | if (GET_CODE (XEXP (dest, 0)) == MINUS) | |
2152 | offset = -offset; | |
2153 | ||
2154 | regno = REGNO (XEXP (XEXP (dest, 0), 0)); | |
2155 | ||
2156 | if (cfa.reg == (unsigned) regno) | |
2157 | offset -= cfa.offset; | |
2158 | else if (cfa_store.reg == (unsigned) regno) | |
2159 | offset -= cfa_store.offset; | |
2160 | else | |
2161 | { | |
2162 | gcc_assert (cfa_temp.reg == (unsigned) regno); | |
2163 | offset -= cfa_temp.offset; | |
2164 | } | |
2165 | } | |
2166 | break; | |
2167 | ||
2168 | /* Rule 13 */ | |
2169 | /* Without an offset. */ | |
2170 | case REG: | |
2171 | { | |
2172 | int regno = REGNO (XEXP (dest, 0)); | |
2173 | ||
2174 | if (cfa.reg == (unsigned) regno) | |
2175 | offset = -cfa.offset; | |
2176 | else if (cfa_store.reg == (unsigned) regno) | |
2177 | offset = -cfa_store.offset; | |
2178 | else | |
2179 | { | |
2180 | gcc_assert (cfa_temp.reg == (unsigned) regno); | |
2181 | offset = -cfa_temp.offset; | |
2182 | } | |
2183 | } | |
2184 | break; | |
2185 | ||
2186 | /* Rule 14 */ | |
2187 | case POST_INC: | |
2188 | gcc_assert (cfa_temp.reg | |
2189 | == (unsigned) REGNO (XEXP (XEXP (dest, 0), 0))); | |
2190 | offset = -cfa_temp.offset; | |
2191 | cfa_temp.offset -= GET_MODE_SIZE (GET_MODE (dest)); | |
2192 | break; | |
2193 | ||
2194 | default: | |
2195 | gcc_unreachable (); | |
2196 | } | |
2197 | ||
2198 | /* Rule 17 */ | |
2199 | /* If the source operand of this MEM operation is not a | |
2200 | register, basically the source is return address. Here | |
2201 | we only care how much stack grew and we don't save it. */ | |
2202 | if (!REG_P (src)) | |
2203 | break; | |
2204 | ||
2205 | if (REGNO (src) != STACK_POINTER_REGNUM | |
2206 | && REGNO (src) != HARD_FRAME_POINTER_REGNUM | |
2207 | && (unsigned) REGNO (src) == cfa.reg) | |
2208 | { | |
2209 | /* We're storing the current CFA reg into the stack. */ | |
2210 | ||
2211 | if (cfa.offset == 0) | |
2212 | { | |
2213 | /* Rule 19 */ | |
2214 | /* If stack is aligned, putting CFA reg into stack means | |
2215 | we can no longer use reg + offset to represent CFA. | |
2216 | Here we use DW_CFA_def_cfa_expression instead. The | |
2217 | result of this expression equals to the original CFA | |
2218 | value. */ | |
2219 | if (fde | |
2220 | && fde->stack_realign | |
2221 | && cfa.indirect == 0 | |
2222 | && cfa.reg != HARD_FRAME_POINTER_REGNUM) | |
2223 | { | |
2224 | dw_cfa_location cfa_exp; | |
2225 | ||
2226 | gcc_assert (fde->drap_reg == cfa.reg); | |
2227 | ||
2228 | cfa_exp.indirect = 1; | |
2229 | cfa_exp.reg = HARD_FRAME_POINTER_REGNUM; | |
2230 | cfa_exp.base_offset = offset; | |
2231 | cfa_exp.offset = 0; | |
2232 | ||
2233 | fde->drap_reg_saved = 1; | |
2234 | ||
2235 | def_cfa_1 (label, &cfa_exp); | |
2236 | break; | |
2237 | } | |
2238 | ||
2239 | /* If the source register is exactly the CFA, assume | |
2240 | we're saving SP like any other register; this happens | |
2241 | on the ARM. */ | |
2242 | def_cfa_1 (label, &cfa); | |
2243 | queue_reg_save (label, stack_pointer_rtx, NULL_RTX, offset); | |
2244 | break; | |
2245 | } | |
2246 | else | |
2247 | { | |
2248 | /* Otherwise, we'll need to look in the stack to | |
2249 | calculate the CFA. */ | |
2250 | rtx x = XEXP (dest, 0); | |
2251 | ||
2252 | if (!REG_P (x)) | |
2253 | x = XEXP (x, 0); | |
2254 | gcc_assert (REG_P (x)); | |
2255 | ||
2256 | cfa.reg = REGNO (x); | |
2257 | cfa.base_offset = offset; | |
2258 | cfa.indirect = 1; | |
2259 | def_cfa_1 (label, &cfa); | |
2260 | break; | |
2261 | } | |
2262 | } | |
2263 | ||
2264 | def_cfa_1 (label, &cfa); | |
2265 | { | |
2266 | span = targetm.dwarf_register_span (src); | |
2267 | ||
2268 | if (!span) | |
2269 | queue_reg_save (label, src, NULL_RTX, offset); | |
2270 | else | |
2271 | { | |
2272 | /* We have a PARALLEL describing where the contents of SRC | |
2273 | live. Queue register saves for each piece of the | |
2274 | PARALLEL. */ | |
2275 | int par_index; | |
2276 | int limit; | |
2277 | HOST_WIDE_INT span_offset = offset; | |
2278 | ||
2279 | gcc_assert (GET_CODE (span) == PARALLEL); | |
2280 | ||
2281 | limit = XVECLEN (span, 0); | |
2282 | for (par_index = 0; par_index < limit; par_index++) | |
2283 | { | |
2284 | rtx elem = XVECEXP (span, 0, par_index); | |
2285 | ||
2286 | queue_reg_save (label, elem, NULL_RTX, span_offset); | |
2287 | span_offset += GET_MODE_SIZE (GET_MODE (elem)); | |
2288 | } | |
2289 | } | |
2290 | } | |
2291 | break; | |
2292 | ||
2293 | default: | |
2294 | gcc_unreachable (); | |
2295 | } | |
2296 | } | |
2297 | ||
2298 | /* Record call frame debugging information for INSN, which either | |
2299 | sets SP or FP (adjusting how we calculate the frame address) or saves a | |
2300 | register to the stack. If INSN is NULL_RTX, initialize our state. | |
2301 | ||
2302 | If AFTER_P is false, we're being called before the insn is emitted, | |
2303 | otherwise after. Call instructions get invoked twice. */ | |
2304 | ||
2305 | void | |
2306 | dwarf2out_frame_debug (rtx insn, bool after_p) | |
2307 | { | |
2308 | const char *label; | |
2309 | rtx note, n; | |
2310 | bool handled_one = false; | |
2311 | bool need_flush = false; | |
2312 | ||
bc5612ed BS |
2313 | /* Remember where we are to insert notes. */ |
2314 | cfi_insn = (after_p ? insn : PREV_INSN (insn)); | |
2315 | ||
647a1567 RH |
2316 | if (!NONJUMP_INSN_P (insn) || clobbers_queued_reg_save (insn)) |
2317 | dwarf2out_flush_queued_reg_saves (); | |
2318 | ||
2319 | if (!RTX_FRAME_RELATED_P (insn)) | |
2320 | { | |
2321 | /* ??? This should be done unconditionally since stack adjustments | |
2322 | matter if the stack pointer is not the CFA register anymore but | |
2323 | is still used to save registers. */ | |
2324 | if (!ACCUMULATE_OUTGOING_ARGS) | |
2325 | dwarf2out_notice_stack_adjust (insn, after_p); | |
2326 | return; | |
2327 | } | |
2328 | ||
2329 | label = dwarf2out_cfi_label (false); | |
2330 | any_cfis_emitted = false; | |
2331 | ||
2332 | for (note = REG_NOTES (insn); note; note = XEXP (note, 1)) | |
2333 | switch (REG_NOTE_KIND (note)) | |
2334 | { | |
2335 | case REG_FRAME_RELATED_EXPR: | |
2336 | insn = XEXP (note, 0); | |
2337 | goto do_frame_expr; | |
2338 | ||
2339 | case REG_CFA_DEF_CFA: | |
2340 | dwarf2out_frame_debug_def_cfa (XEXP (note, 0), label); | |
2341 | handled_one = true; | |
2342 | break; | |
2343 | ||
2344 | case REG_CFA_ADJUST_CFA: | |
2345 | n = XEXP (note, 0); | |
2346 | if (n == NULL) | |
2347 | { | |
2348 | n = PATTERN (insn); | |
2349 | if (GET_CODE (n) == PARALLEL) | |
2350 | n = XVECEXP (n, 0, 0); | |
2351 | } | |
2352 | dwarf2out_frame_debug_adjust_cfa (n, label); | |
2353 | handled_one = true; | |
2354 | break; | |
2355 | ||
2356 | case REG_CFA_OFFSET: | |
2357 | n = XEXP (note, 0); | |
2358 | if (n == NULL) | |
2359 | n = single_set (insn); | |
2360 | dwarf2out_frame_debug_cfa_offset (n, label); | |
2361 | handled_one = true; | |
2362 | break; | |
2363 | ||
2364 | case REG_CFA_REGISTER: | |
2365 | n = XEXP (note, 0); | |
2366 | if (n == NULL) | |
2367 | { | |
2368 | n = PATTERN (insn); | |
2369 | if (GET_CODE (n) == PARALLEL) | |
2370 | n = XVECEXP (n, 0, 0); | |
2371 | } | |
2372 | dwarf2out_frame_debug_cfa_register (n, label); | |
2373 | handled_one = true; | |
2374 | break; | |
2375 | ||
2376 | case REG_CFA_EXPRESSION: | |
2377 | n = XEXP (note, 0); | |
2378 | if (n == NULL) | |
2379 | n = single_set (insn); | |
2380 | dwarf2out_frame_debug_cfa_expression (n, label); | |
2381 | handled_one = true; | |
2382 | break; | |
2383 | ||
2384 | case REG_CFA_RESTORE: | |
2385 | n = XEXP (note, 0); | |
2386 | if (n == NULL) | |
2387 | { | |
2388 | n = PATTERN (insn); | |
2389 | if (GET_CODE (n) == PARALLEL) | |
2390 | n = XVECEXP (n, 0, 0); | |
2391 | n = XEXP (n, 0); | |
2392 | } | |
2393 | dwarf2out_frame_debug_cfa_restore (n, label); | |
2394 | handled_one = true; | |
2395 | break; | |
2396 | ||
2397 | case REG_CFA_SET_VDRAP: | |
2398 | n = XEXP (note, 0); | |
2399 | if (REG_P (n)) | |
2400 | { | |
2401 | dw_fde_ref fde = current_fde (); | |
2402 | if (fde) | |
2403 | { | |
2404 | gcc_assert (fde->vdrap_reg == INVALID_REGNUM); | |
2405 | if (REG_P (n)) | |
2406 | fde->vdrap_reg = REGNO (n); | |
2407 | } | |
2408 | } | |
2409 | handled_one = true; | |
2410 | break; | |
2411 | ||
2412 | case REG_CFA_WINDOW_SAVE: | |
2413 | dwarf2out_frame_debug_cfa_window_save (label); | |
2414 | handled_one = true; | |
2415 | break; | |
2416 | ||
2417 | case REG_CFA_FLUSH_QUEUE: | |
2418 | /* The actual flush happens below. */ | |
2419 | need_flush = true; | |
2420 | handled_one = true; | |
2421 | break; | |
2422 | ||
2423 | default: | |
2424 | break; | |
2425 | } | |
2426 | ||
2427 | if (handled_one) | |
2428 | { | |
2429 | /* Minimize the number of advances by emitting the entire queue | |
2430 | once anything is emitted. */ | |
2431 | need_flush |= any_cfis_emitted; | |
2432 | } | |
2433 | else | |
2434 | { | |
2435 | insn = PATTERN (insn); | |
2436 | do_frame_expr: | |
2437 | dwarf2out_frame_debug_expr (insn, label); | |
2438 | ||
2439 | /* Check again. A parallel can save and update the same register. | |
2440 | We could probably check just once, here, but this is safer than | |
2441 | removing the check at the start of the function. */ | |
2442 | if (any_cfis_emitted || clobbers_queued_reg_save (insn)) | |
2443 | need_flush = true; | |
2444 | } | |
2445 | ||
2446 | if (need_flush) | |
2447 | dwarf2out_flush_queued_reg_saves (); | |
2448 | } | |
2449 | ||
2450 | /* Called once at the start of final to initialize some data for the | |
2451 | current function. */ | |
2452 | void | |
2453 | dwarf2out_frame_debug_init (void) | |
2454 | { | |
bc5612ed BS |
2455 | rtx insn; |
2456 | ||
2457 | regs_saved_in_regs = NULL; | |
2458 | queued_reg_saves = NULL; | |
2459 | ||
2460 | if (barrier_args_size) | |
2461 | { | |
2462 | XDELETEVEC (barrier_args_size); | |
2463 | barrier_args_size = NULL; | |
2464 | } | |
647a1567 RH |
2465 | |
2466 | /* Set up state for generating call frame debug info. */ | |
2467 | lookup_cfa (&cfa); | |
2468 | gcc_assert (cfa.reg | |
2469 | == (unsigned long)DWARF_FRAME_REGNUM (STACK_POINTER_REGNUM)); | |
2470 | ||
2471 | cfa.reg = STACK_POINTER_REGNUM; | |
2472 | cfa_store = cfa; | |
2473 | cfa_temp.reg = -1; | |
2474 | cfa_temp.offset = 0; | |
2475 | ||
bc5612ed | 2476 | for (insn = get_insns (); insn ; insn = NEXT_INSN (insn)) |
647a1567 | 2477 | { |
bc5612ed BS |
2478 | rtx pat; |
2479 | ||
2480 | if (BARRIER_P (insn)) | |
2481 | { | |
2482 | dwarf2out_frame_debug (insn, false); | |
2483 | continue; | |
2484 | } | |
2485 | ||
2486 | if (NOTE_P (insn)) | |
2487 | { | |
2488 | switch (NOTE_KIND (insn)) | |
2489 | { | |
2490 | case NOTE_INSN_EPILOGUE_BEG: | |
2491 | #if defined(HAVE_epilogue) | |
2492 | dwarf2out_cfi_begin_epilogue (insn); | |
2493 | #endif | |
2494 | break; | |
2495 | case NOTE_INSN_CFA_RESTORE_STATE: | |
2496 | cfi_insn = insn; | |
2497 | dwarf2out_frame_debug_restore_state (); | |
2498 | break; | |
2499 | } | |
2500 | continue; | |
2501 | } | |
2502 | ||
2503 | if (!NONDEBUG_INSN_P (insn)) | |
2504 | continue; | |
2505 | ||
2506 | pat = PATTERN (insn); | |
2507 | if (asm_noperands (pat) >= 0) | |
2508 | { | |
2509 | dwarf2out_frame_debug (insn, false); | |
2510 | continue; | |
2511 | } | |
2512 | ||
2513 | if (GET_CODE (pat) == SEQUENCE) | |
2514 | { | |
2515 | int i, n = XVECLEN (pat, 0); | |
2516 | for (i = 1; i < n; ++i) | |
2517 | dwarf2out_frame_debug (XVECEXP (pat, 0, i), false); | |
2518 | } | |
2519 | ||
2520 | if (CALL_P (insn) | |
2521 | || find_reg_note (insn, REG_CFA_FLUSH_QUEUE, NULL)) | |
2522 | dwarf2out_frame_debug (insn, false); | |
2523 | ||
2524 | dwarf2out_frame_debug (insn, true); | |
647a1567 RH |
2525 | } |
2526 | } | |
2527 | ||
2528 | /* Determine if we need to save and restore CFI information around this | |
2529 | epilogue. If SIBCALL is true, then this is a sibcall epilogue. If | |
2530 | we do need to save/restore, then emit the save now, and insert a | |
2531 | NOTE_INSN_CFA_RESTORE_STATE at the appropriate place in the stream. */ | |
2532 | ||
bc5612ed | 2533 | static void |
647a1567 RH |
2534 | dwarf2out_cfi_begin_epilogue (rtx insn) |
2535 | { | |
2536 | bool saw_frp = false; | |
2537 | rtx i; | |
2538 | ||
2539 | /* Scan forward to the return insn, noticing if there are possible | |
2540 | frame related insns. */ | |
2541 | for (i = NEXT_INSN (insn); i ; i = NEXT_INSN (i)) | |
2542 | { | |
2543 | if (!INSN_P (i)) | |
2544 | continue; | |
2545 | ||
2546 | /* Look for both regular and sibcalls to end the block. */ | |
2547 | if (returnjump_p (i)) | |
2548 | break; | |
2549 | if (CALL_P (i) && SIBLING_CALL_P (i)) | |
2550 | break; | |
2551 | ||
2552 | if (GET_CODE (PATTERN (i)) == SEQUENCE) | |
2553 | { | |
2554 | int idx; | |
2555 | rtx seq = PATTERN (i); | |
2556 | ||
2557 | if (returnjump_p (XVECEXP (seq, 0, 0))) | |
2558 | break; | |
2559 | if (CALL_P (XVECEXP (seq, 0, 0)) | |
2560 | && SIBLING_CALL_P (XVECEXP (seq, 0, 0))) | |
2561 | break; | |
2562 | ||
2563 | for (idx = 0; idx < XVECLEN (seq, 0); idx++) | |
2564 | if (RTX_FRAME_RELATED_P (XVECEXP (seq, 0, idx))) | |
2565 | saw_frp = true; | |
2566 | } | |
2567 | ||
2568 | if (RTX_FRAME_RELATED_P (i)) | |
2569 | saw_frp = true; | |
2570 | } | |
2571 | ||
2572 | /* If the port doesn't emit epilogue unwind info, we don't need a | |
2573 | save/restore pair. */ | |
2574 | if (!saw_frp) | |
2575 | return; | |
2576 | ||
2577 | /* Otherwise, search forward to see if the return insn was the last | |
2578 | basic block of the function. If so, we don't need save/restore. */ | |
2579 | gcc_assert (i != NULL); | |
2580 | i = next_real_insn (i); | |
2581 | if (i == NULL) | |
2582 | return; | |
2583 | ||
2584 | /* Insert the restore before that next real insn in the stream, and before | |
2585 | a potential NOTE_INSN_EPILOGUE_BEG -- we do need these notes to be | |
2586 | properly nested. This should be after any label or alignment. This | |
2587 | will be pushed into the CFI stream by the function below. */ | |
2588 | while (1) | |
2589 | { | |
2590 | rtx p = PREV_INSN (i); | |
2591 | if (!NOTE_P (p)) | |
2592 | break; | |
2593 | if (NOTE_KIND (p) == NOTE_INSN_BASIC_BLOCK) | |
2594 | break; | |
2595 | i = p; | |
2596 | } | |
2597 | emit_note_before (NOTE_INSN_CFA_RESTORE_STATE, i); | |
2598 | ||
2599 | emit_cfa_remember = true; | |
2600 | ||
2601 | /* And emulate the state save. */ | |
2602 | gcc_assert (!cfa_remember.in_use); | |
2603 | cfa_remember = cfa; | |
2604 | cfa_remember.in_use = 1; | |
2605 | } | |
2606 | ||
2607 | /* A "subroutine" of dwarf2out_cfi_begin_epilogue. Emit the restore | |
2608 | required. */ | |
2609 | ||
bc5612ed | 2610 | static void |
647a1567 RH |
2611 | dwarf2out_frame_debug_restore_state (void) |
2612 | { | |
2613 | dw_cfi_ref cfi = new_cfi (); | |
2614 | const char *label = dwarf2out_cfi_label (false); | |
2615 | ||
2616 | cfi->dw_cfi_opc = DW_CFA_restore_state; | |
2617 | add_fde_cfi (label, cfi); | |
2618 | ||
2619 | gcc_assert (cfa_remember.in_use); | |
2620 | cfa = cfa_remember; | |
2621 | cfa_remember.in_use = 0; | |
2622 | } | |
2623 | ||
2624 | /* Run once per function. */ | |
2625 | ||
2626 | void | |
2627 | dwarf2cfi_function_init (void) | |
2628 | { | |
2629 | args_size = old_args_size = 0; | |
2630 | } | |
2631 | ||
2632 | /* Run once. */ | |
2633 | ||
2634 | void | |
2635 | dwarf2cfi_frame_init (void) | |
2636 | { | |
2637 | dw_cfa_location loc; | |
2638 | ||
2639 | /* Generate the CFA instructions common to all FDE's. Do it now for the | |
2640 | sake of lookup_cfa. */ | |
2641 | ||
2642 | /* On entry, the Canonical Frame Address is at SP. */ | |
2643 | memset(&loc, 0, sizeof (loc)); | |
2644 | loc.reg = STACK_POINTER_REGNUM; | |
2645 | loc.offset = INCOMING_FRAME_SP_OFFSET; | |
2646 | def_cfa_1 (NULL, &loc); | |
2647 | ||
2648 | if (targetm.debug_unwind_info () == UI_DWARF2 | |
2649 | || targetm_common.except_unwind_info (&global_options) == UI_DWARF2) | |
2650 | initial_return_save (INCOMING_RETURN_ADDR_RTX); | |
2651 | } | |
2652 | \f | |
2653 | ||
2654 | /* Save the result of dwarf2out_do_frame across PCH. */ | |
2655 | static GTY(()) bool saved_do_cfi_asm = 0; | |
2656 | ||
2657 | /* Decide whether we want to emit frame unwind information for the current | |
2658 | translation unit. */ | |
2659 | ||
2660 | int | |
2661 | dwarf2out_do_frame (void) | |
2662 | { | |
2663 | /* We want to emit correct CFA location expressions or lists, so we | |
2664 | have to return true if we're going to output debug info, even if | |
2665 | we're not going to output frame or unwind info. */ | |
2666 | if (write_symbols == DWARF2_DEBUG || write_symbols == VMS_AND_DWARF2_DEBUG) | |
2667 | return true; | |
2668 | ||
2669 | if (saved_do_cfi_asm) | |
2670 | return true; | |
2671 | ||
2672 | if (targetm.debug_unwind_info () == UI_DWARF2) | |
2673 | return true; | |
2674 | ||
2675 | if ((flag_unwind_tables || flag_exceptions) | |
2676 | && targetm_common.except_unwind_info (&global_options) == UI_DWARF2) | |
2677 | return true; | |
2678 | ||
2679 | return false; | |
2680 | } | |
2681 | ||
2682 | /* Decide whether to emit frame unwind via assembler directives. */ | |
2683 | ||
2684 | int | |
2685 | dwarf2out_do_cfi_asm (void) | |
2686 | { | |
2687 | int enc; | |
2688 | ||
2689 | #ifdef MIPS_DEBUGGING_INFO | |
2690 | return false; | |
2691 | #endif | |
2692 | if (saved_do_cfi_asm) | |
2693 | return true; | |
2694 | if (!flag_dwarf2_cfi_asm || !dwarf2out_do_frame ()) | |
2695 | return false; | |
2696 | if (!HAVE_GAS_CFI_PERSONALITY_DIRECTIVE) | |
2697 | return false; | |
2698 | ||
2699 | /* Make sure the personality encoding is one the assembler can support. | |
2700 | In particular, aligned addresses can't be handled. */ | |
2701 | enc = ASM_PREFERRED_EH_DATA_FORMAT (/*code=*/2,/*global=*/1); | |
2702 | if ((enc & 0x70) != 0 && (enc & 0x70) != DW_EH_PE_pcrel) | |
2703 | return false; | |
2704 | enc = ASM_PREFERRED_EH_DATA_FORMAT (/*code=*/0,/*global=*/0); | |
2705 | if ((enc & 0x70) != 0 && (enc & 0x70) != DW_EH_PE_pcrel) | |
2706 | return false; | |
2707 | ||
2708 | /* If we can't get the assembler to emit only .debug_frame, and we don't need | |
2709 | dwarf2 unwind info for exceptions, then emit .debug_frame by hand. */ | |
2710 | if (!HAVE_GAS_CFI_SECTIONS_DIRECTIVE | |
2711 | && !flag_unwind_tables && !flag_exceptions | |
2712 | && targetm_common.except_unwind_info (&global_options) != UI_DWARF2) | |
2713 | return false; | |
2714 | ||
2715 | saved_do_cfi_asm = true; | |
2716 | return true; | |
2717 | } | |
2718 | ||
2719 | #include "gt-dwarf2cfi.h" |