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dcdf448e | 1 | /* Dwarf2 Call Frame Information helper routines. |
711789cc | 2 | Copyright (C) 1992-2013 Free Software Foundation, Inc. |
dcdf448e | 3 | |
4 | This file is part of GCC. | |
5 | ||
6 | GCC is free software; you can redistribute it and/or modify it under | |
7 | the terms of the GNU General Public License as published by the Free | |
8 | Software Foundation; either version 3, or (at your option) any later | |
9 | version. | |
10 | ||
11 | GCC is distributed in the hope that it will be useful, but WITHOUT ANY | |
12 | WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
13 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
14 | for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with GCC; see the file COPYING3. If not see | |
18 | <http://www.gnu.org/licenses/>. */ | |
19 | ||
20 | #include "config.h" | |
21 | #include "system.h" | |
22 | #include "coretypes.h" | |
23 | #include "tm.h" | |
24 | #include "version.h" | |
25 | #include "flags.h" | |
26 | #include "rtl.h" | |
27 | #include "function.h" | |
97c251e4 | 28 | #include "basic-block.h" |
dcdf448e | 29 | #include "dwarf2.h" |
30 | #include "dwarf2out.h" | |
31 | #include "dwarf2asm.h" | |
32 | #include "ggc.h" | |
d9dd21a8 | 33 | #include "hash-table.h" |
dcdf448e | 34 | #include "tm_p.h" |
35 | #include "target.h" | |
36 | #include "common/common-target.h" | |
37 | #include "tree-pass.h" | |
38 | ||
39 | #include "except.h" /* expand_builtin_dwarf_sp_column */ | |
40 | #include "expr.h" /* init_return_column_size */ | |
41 | #include "regs.h" /* expand_builtin_init_dwarf_reg_sizes */ | |
42 | #include "output.h" /* asm_out_file */ | |
43 | #include "debug.h" /* dwarf2out_do_frame, dwarf2out_do_cfi_asm */ | |
44 | ||
45 | ||
46 | /* ??? Poison these here until it can be done generically. They've been | |
47 | totally replaced in this file; make sure it stays that way. */ | |
48 | #undef DWARF2_UNWIND_INFO | |
49 | #undef DWARF2_FRAME_INFO | |
50 | #if (GCC_VERSION >= 3000) | |
51 | #pragma GCC poison DWARF2_UNWIND_INFO DWARF2_FRAME_INFO | |
52 | #endif | |
53 | ||
54 | #ifndef INCOMING_RETURN_ADDR_RTX | |
55 | #define INCOMING_RETURN_ADDR_RTX (gcc_unreachable (), NULL_RTX) | |
56 | #endif | |
57 | ||
dcdf448e | 58 | /* Maximum size (in bytes) of an artificially generated label. */ |
59 | #define MAX_ARTIFICIAL_LABEL_BYTES 30 | |
dcdf448e | 60 | \f |
eb93b3f4 | 61 | /* A collected description of an entire row of the abstract CFI table. */ |
62 | typedef struct GTY(()) dw_cfi_row_struct | |
63 | { | |
64 | /* The expression that computes the CFA, expressed in two different ways. | |
65 | The CFA member for the simple cases, and the full CFI expression for | |
66 | the complex cases. The later will be a DW_CFA_cfa_expression. */ | |
67 | dw_cfa_location cfa; | |
68 | dw_cfi_ref cfa_cfi; | |
69 | ||
70 | /* The expressions for any register column that is saved. */ | |
71 | cfi_vec reg_save; | |
eb93b3f4 | 72 | } dw_cfi_row; |
73 | ||
b1613fc3 | 74 | /* The caller's ORIG_REG is saved in SAVED_IN_REG. */ |
75 | typedef struct GTY(()) reg_saved_in_data_struct { | |
76 | rtx orig_reg; | |
77 | rtx saved_in_reg; | |
78 | } reg_saved_in_data; | |
79 | ||
b1613fc3 | 80 | |
81 | /* Since we no longer have a proper CFG, we're going to create a facsimile | |
82 | of one on the fly while processing the frame-related insns. | |
83 | ||
97c251e4 | 84 | We create dw_trace_info structures for each extended basic block beginning |
85 | and ending at a "save point". Save points are labels, barriers, certain | |
86 | notes, and of course the beginning and end of the function. | |
b1613fc3 | 87 | |
88 | As we encounter control transfer insns, we propagate the "current" | |
97c251e4 | 89 | row state across the edges to the starts of traces. When checking is |
90 | enabled, we validate that we propagate the same data from all sources. | |
b1613fc3 | 91 | |
92 | All traces are members of the TRACE_INFO array, in the order in which | |
93 | they appear in the instruction stream. | |
94 | ||
97c251e4 | 95 | All save points are present in the TRACE_INDEX hash, mapping the insn |
96 | starting a trace to the dw_trace_info describing the trace. */ | |
b1613fc3 | 97 | |
98 | typedef struct | |
99 | { | |
97c251e4 | 100 | /* The insn that begins the trace. */ |
101 | rtx head; | |
b1613fc3 | 102 | |
103 | /* The row state at the beginning and end of the trace. */ | |
97c251e4 | 104 | dw_cfi_row *beg_row, *end_row; |
105 | ||
dfe00a8f | 106 | /* Tracking for DW_CFA_GNU_args_size. The "true" sizes are those we find |
107 | while scanning insns. However, the args_size value is irrelevant at | |
108 | any point except can_throw_internal_p insns. Therefore the "delay" | |
109 | sizes the values that must actually be emitted for this trace. */ | |
110 | HOST_WIDE_INT beg_true_args_size, end_true_args_size; | |
111 | HOST_WIDE_INT beg_delay_args_size, end_delay_args_size; | |
112 | ||
113 | /* The first EH insn in the trace, where beg_delay_args_size must be set. */ | |
114 | rtx eh_head; | |
115 | ||
b1613fc3 | 116 | /* The following variables contain data used in interpreting frame related |
117 | expressions. These are not part of the "real" row state as defined by | |
118 | Dwarf, but it seems like they need to be propagated into a trace in case | |
119 | frame related expressions have been sunk. */ | |
120 | /* ??? This seems fragile. These variables are fragments of a larger | |
121 | expression. If we do not keep the entire expression together, we risk | |
122 | not being able to put it together properly. Consider forcing targets | |
123 | to generate self-contained expressions and dropping all of the magic | |
124 | interpretation code in this file. Or at least refusing to shrink wrap | |
125 | any frame related insn that doesn't contain a complete expression. */ | |
126 | ||
127 | /* The register used for saving registers to the stack, and its offset | |
128 | from the CFA. */ | |
129 | dw_cfa_location cfa_store; | |
130 | ||
131 | /* A temporary register holding an integral value used in adjusting SP | |
132 | or setting up the store_reg. The "offset" field holds the integer | |
133 | value, not an offset. */ | |
134 | dw_cfa_location cfa_temp; | |
135 | ||
136 | /* A set of registers saved in other registers. This is the inverse of | |
137 | the row->reg_save info, if the entry is a DW_CFA_register. This is | |
138 | implemented as a flat array because it normally contains zero or 1 | |
139 | entry, depending on the target. IA-64 is the big spender here, using | |
140 | a maximum of 5 entries. */ | |
f1f41a6c | 141 | vec<reg_saved_in_data> regs_saved_in_regs; |
b1613fc3 | 142 | |
ce4a64fd | 143 | /* An identifier for this trace. Used only for debugging dumps. */ |
144 | unsigned id; | |
145 | ||
146 | /* True if this trace immediately follows NOTE_INSN_SWITCH_TEXT_SECTIONS. */ | |
147 | bool switch_sections; | |
dfe00a8f | 148 | |
149 | /* True if we've seen different values incoming to beg_true_args_size. */ | |
150 | bool args_size_undefined; | |
b1613fc3 | 151 | } dw_trace_info; |
152 | ||
b1613fc3 | 153 | |
97c251e4 | 154 | typedef dw_trace_info *dw_trace_info_ref; |
b1613fc3 | 155 | |
b1613fc3 | 156 | |
d9dd21a8 | 157 | /* Hashtable helpers. */ |
158 | ||
159 | struct trace_info_hasher : typed_noop_remove <dw_trace_info> | |
160 | { | |
161 | typedef dw_trace_info value_type; | |
162 | typedef dw_trace_info compare_type; | |
163 | static inline hashval_t hash (const value_type *); | |
164 | static inline bool equal (const value_type *, const compare_type *); | |
165 | }; | |
166 | ||
167 | inline hashval_t | |
168 | trace_info_hasher::hash (const value_type *ti) | |
169 | { | |
170 | return INSN_UID (ti->head); | |
171 | } | |
172 | ||
173 | inline bool | |
174 | trace_info_hasher::equal (const value_type *a, const compare_type *b) | |
175 | { | |
176 | return a->head == b->head; | |
177 | } | |
178 | ||
179 | ||
b1613fc3 | 180 | /* The variables making up the pseudo-cfg, as described above. */ |
f1f41a6c | 181 | static vec<dw_trace_info> trace_info; |
182 | static vec<dw_trace_info_ref> trace_work_list; | |
d9dd21a8 | 183 | static hash_table <trace_info_hasher> trace_index; |
b1613fc3 | 184 | |
dcdf448e | 185 | /* A vector of call frame insns for the CIE. */ |
186 | cfi_vec cie_cfi_vec; | |
187 | ||
eb93b3f4 | 188 | /* The state of the first row of the FDE table, which includes the |
189 | state provided by the CIE. */ | |
1b1ea44c | 190 | static GTY(()) dw_cfi_row *cie_cfi_row; |
eb93b3f4 | 191 | |
b1613fc3 | 192 | static GTY(()) reg_saved_in_data *cie_return_save; |
193 | ||
dcdf448e | 194 | static GTY(()) unsigned long dwarf2out_cfi_label_num; |
195 | ||
46346a52 | 196 | /* The insn after which a new CFI note should be emitted. */ |
7b1c31a0 | 197 | static rtx add_cfi_insn; |
46346a52 | 198 | |
d4898332 | 199 | /* When non-null, add_cfi will add the CFI to this vector. */ |
200 | static cfi_vec *add_cfi_vec; | |
201 | ||
b1613fc3 | 202 | /* The current instruction trace. */ |
203 | static dw_trace_info *cur_trace; | |
204 | ||
205 | /* The current, i.e. most recently generated, row of the CFI table. */ | |
206 | static dw_cfi_row *cur_row; | |
207 | ||
dfe00a8f | 208 | /* A copy of the current CFA, for use during the processing of a |
209 | single insn. */ | |
210 | static dw_cfa_location *cur_cfa; | |
211 | ||
b1613fc3 | 212 | /* We delay emitting a register save until either (a) we reach the end |
213 | of the prologue or (b) the register is clobbered. This clusters | |
214 | register saves so that there are fewer pc advances. */ | |
215 | ||
216 | typedef struct { | |
217 | rtx reg; | |
218 | rtx saved_reg; | |
219 | HOST_WIDE_INT cfa_offset; | |
220 | } queued_reg_save; | |
221 | ||
b1613fc3 | 222 | |
f1f41a6c | 223 | static vec<queued_reg_save> queued_reg_saves; |
b1613fc3 | 224 | |
46346a52 | 225 | /* True if any CFI directives were emitted at the current insn. */ |
226 | static bool any_cfis_emitted; | |
26a649dd | 227 | |
228 | /* Short-hand for commonly used register numbers. */ | |
229 | static unsigned dw_stack_pointer_regnum; | |
230 | static unsigned dw_frame_pointer_regnum; | |
dcdf448e | 231 | \f |
232 | /* Hook used by __throw. */ | |
233 | ||
234 | rtx | |
235 | expand_builtin_dwarf_sp_column (void) | |
236 | { | |
26a649dd | 237 | unsigned int dwarf_regnum = DWARF_FRAME_REGNUM (STACK_POINTER_REGNUM); |
dcdf448e | 238 | return GEN_INT (DWARF2_FRAME_REG_OUT (dwarf_regnum, 1)); |
239 | } | |
240 | ||
241 | /* MEM is a memory reference for the register size table, each element of | |
242 | which has mode MODE. Initialize column C as a return address column. */ | |
243 | ||
244 | static void | |
245 | init_return_column_size (enum machine_mode mode, rtx mem, unsigned int c) | |
246 | { | |
247 | HOST_WIDE_INT offset = c * GET_MODE_SIZE (mode); | |
248 | HOST_WIDE_INT size = GET_MODE_SIZE (Pmode); | |
249 | emit_move_insn (adjust_address (mem, mode, offset), GEN_INT (size)); | |
250 | } | |
251 | ||
252 | /* Generate code to initialize the register size table. */ | |
253 | ||
254 | void | |
255 | expand_builtin_init_dwarf_reg_sizes (tree address) | |
256 | { | |
257 | unsigned int i; | |
258 | enum machine_mode mode = TYPE_MODE (char_type_node); | |
259 | rtx addr = expand_normal (address); | |
260 | rtx mem = gen_rtx_MEM (BLKmode, addr); | |
261 | bool wrote_return_column = false; | |
262 | ||
263 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
264 | { | |
26a649dd | 265 | unsigned int dnum = DWARF_FRAME_REGNUM (i); |
266 | unsigned int rnum = DWARF2_FRAME_REG_OUT (dnum, 1); | |
dcdf448e | 267 | |
268 | if (rnum < DWARF_FRAME_REGISTERS) | |
269 | { | |
270 | HOST_WIDE_INT offset = rnum * GET_MODE_SIZE (mode); | |
271 | enum machine_mode save_mode = reg_raw_mode[i]; | |
272 | HOST_WIDE_INT size; | |
273 | ||
274 | if (HARD_REGNO_CALL_PART_CLOBBERED (i, save_mode)) | |
275 | save_mode = choose_hard_reg_mode (i, 1, true); | |
26a649dd | 276 | if (dnum == DWARF_FRAME_RETURN_COLUMN) |
dcdf448e | 277 | { |
278 | if (save_mode == VOIDmode) | |
279 | continue; | |
280 | wrote_return_column = true; | |
281 | } | |
282 | size = GET_MODE_SIZE (save_mode); | |
283 | if (offset < 0) | |
284 | continue; | |
285 | ||
286 | emit_move_insn (adjust_address (mem, mode, offset), | |
287 | gen_int_mode (size, mode)); | |
288 | } | |
289 | } | |
290 | ||
291 | if (!wrote_return_column) | |
292 | init_return_column_size (mode, mem, DWARF_FRAME_RETURN_COLUMN); | |
293 | ||
294 | #ifdef DWARF_ALT_FRAME_RETURN_COLUMN | |
295 | init_return_column_size (mode, mem, DWARF_ALT_FRAME_RETURN_COLUMN); | |
296 | #endif | |
297 | ||
298 | targetm.init_dwarf_reg_sizes_extra (address); | |
299 | } | |
300 | ||
97c251e4 | 301 | \f |
97c251e4 | 302 | static dw_trace_info * |
303 | get_trace_info (rtx insn) | |
304 | { | |
305 | dw_trace_info dummy; | |
306 | dummy.head = insn; | |
d9dd21a8 | 307 | return trace_index.find_with_hash (&dummy, INSN_UID (insn)); |
97c251e4 | 308 | } |
309 | ||
310 | static bool | |
311 | save_point_p (rtx insn) | |
312 | { | |
313 | /* Labels, except those that are really jump tables. */ | |
314 | if (LABEL_P (insn)) | |
315 | return inside_basic_block_p (insn); | |
316 | ||
317 | /* We split traces at the prologue/epilogue notes because those | |
318 | are points at which the unwind info is usually stable. This | |
319 | makes it easier to find spots with identical unwind info so | |
320 | that we can use remember/restore_state opcodes. */ | |
321 | if (NOTE_P (insn)) | |
322 | switch (NOTE_KIND (insn)) | |
323 | { | |
324 | case NOTE_INSN_PROLOGUE_END: | |
325 | case NOTE_INSN_EPILOGUE_BEG: | |
326 | return true; | |
327 | } | |
328 | ||
329 | return false; | |
330 | } | |
331 | ||
dcdf448e | 332 | /* Divide OFF by DWARF_CIE_DATA_ALIGNMENT, asserting no remainder. */ |
333 | ||
334 | static inline HOST_WIDE_INT | |
335 | div_data_align (HOST_WIDE_INT off) | |
336 | { | |
337 | HOST_WIDE_INT r = off / DWARF_CIE_DATA_ALIGNMENT; | |
338 | gcc_assert (r * DWARF_CIE_DATA_ALIGNMENT == off); | |
339 | return r; | |
340 | } | |
341 | ||
342 | /* Return true if we need a signed version of a given opcode | |
343 | (e.g. DW_CFA_offset_extended_sf vs DW_CFA_offset_extended). */ | |
344 | ||
345 | static inline bool | |
346 | need_data_align_sf_opcode (HOST_WIDE_INT off) | |
347 | { | |
348 | return DWARF_CIE_DATA_ALIGNMENT < 0 ? off > 0 : off < 0; | |
349 | } | |
350 | ||
351 | /* Return a pointer to a newly allocated Call Frame Instruction. */ | |
352 | ||
353 | static inline dw_cfi_ref | |
354 | new_cfi (void) | |
355 | { | |
356 | dw_cfi_ref cfi = ggc_alloc_dw_cfi_node (); | |
357 | ||
358 | cfi->dw_cfi_oprnd1.dw_cfi_reg_num = 0; | |
359 | cfi->dw_cfi_oprnd2.dw_cfi_reg_num = 0; | |
360 | ||
361 | return cfi; | |
362 | } | |
363 | ||
eb93b3f4 | 364 | /* Return a newly allocated CFI row, with no defined data. */ |
365 | ||
1b1ea44c | 366 | static dw_cfi_row * |
eb93b3f4 | 367 | new_cfi_row (void) |
368 | { | |
1b1ea44c | 369 | dw_cfi_row *row = ggc_alloc_cleared_dw_cfi_row (); |
eb93b3f4 | 370 | |
371 | row->cfa.reg = INVALID_REGNUM; | |
372 | ||
373 | return row; | |
374 | } | |
375 | ||
376 | /* Return a copy of an existing CFI row. */ | |
377 | ||
1b1ea44c | 378 | static dw_cfi_row * |
379 | copy_cfi_row (dw_cfi_row *src) | |
eb93b3f4 | 380 | { |
1b1ea44c | 381 | dw_cfi_row *dst = ggc_alloc_dw_cfi_row (); |
eb93b3f4 | 382 | |
383 | *dst = *src; | |
f1f41a6c | 384 | dst->reg_save = vec_safe_copy (src->reg_save); |
eb93b3f4 | 385 | |
386 | return dst; | |
387 | } | |
388 | ||
c746c5c3 | 389 | /* Generate a new label for the CFI info to refer to. */ |
dcdf448e | 390 | |
391 | static char * | |
c746c5c3 | 392 | dwarf2out_cfi_label (void) |
dcdf448e | 393 | { |
c746c5c3 | 394 | int num = dwarf2out_cfi_label_num++; |
395 | char label[20]; | |
dcdf448e | 396 | |
c746c5c3 | 397 | ASM_GENERATE_INTERNAL_LABEL (label, "LCFI", num); |
dcdf448e | 398 | |
c746c5c3 | 399 | return xstrdup (label); |
dcdf448e | 400 | } |
401 | ||
d4898332 | 402 | /* Add CFI either to the current insn stream or to a vector, or both. */ |
dcdf448e | 403 | |
404 | static void | |
d4898332 | 405 | add_cfi (dw_cfi_ref cfi) |
dcdf448e | 406 | { |
c746c5c3 | 407 | any_cfis_emitted = true; |
7b1c31a0 | 408 | |
409 | if (add_cfi_insn != NULL) | |
dcdf448e | 410 | { |
7b1c31a0 | 411 | add_cfi_insn = emit_note_after (NOTE_INSN_CFI, add_cfi_insn); |
412 | NOTE_CFI (add_cfi_insn) = cfi; | |
dcdf448e | 413 | } |
7b1c31a0 | 414 | |
d4898332 | 415 | if (add_cfi_vec != NULL) |
f1f41a6c | 416 | vec_safe_push (*add_cfi_vec, cfi); |
dcdf448e | 417 | } |
418 | ||
0b3b5cad | 419 | static void |
420 | add_cfi_args_size (HOST_WIDE_INT size) | |
421 | { | |
422 | dw_cfi_ref cfi = new_cfi (); | |
423 | ||
dfe00a8f | 424 | /* While we can occasionally have args_size < 0 internally, this state |
425 | should not persist at a point we actually need an opcode. */ | |
426 | gcc_assert (size >= 0); | |
427 | ||
0b3b5cad | 428 | cfi->dw_cfi_opc = DW_CFA_GNU_args_size; |
429 | cfi->dw_cfi_oprnd1.dw_cfi_offset = size; | |
430 | ||
431 | add_cfi (cfi); | |
432 | } | |
433 | ||
434 | static void | |
435 | add_cfi_restore (unsigned reg) | |
436 | { | |
437 | dw_cfi_ref cfi = new_cfi (); | |
438 | ||
439 | cfi->dw_cfi_opc = (reg & ~0x3f ? DW_CFA_restore_extended : DW_CFA_restore); | |
440 | cfi->dw_cfi_oprnd1.dw_cfi_reg_num = reg; | |
441 | ||
442 | add_cfi (cfi); | |
443 | } | |
444 | ||
e9fe542d | 445 | /* Perform ROW->REG_SAVE[COLUMN] = CFI. CFI may be null, indicating |
446 | that the register column is no longer saved. */ | |
447 | ||
448 | static void | |
1b1ea44c | 449 | update_row_reg_save (dw_cfi_row *row, unsigned column, dw_cfi_ref cfi) |
e9fe542d | 450 | { |
f1f41a6c | 451 | if (vec_safe_length (row->reg_save) <= column) |
452 | vec_safe_grow_cleared (row->reg_save, column + 1); | |
453 | (*row->reg_save)[column] = cfi; | |
e9fe542d | 454 | } |
455 | ||
dcdf448e | 456 | /* This function fills in aa dw_cfa_location structure from a dwarf location |
457 | descriptor sequence. */ | |
458 | ||
459 | static void | |
460 | get_cfa_from_loc_descr (dw_cfa_location *cfa, struct dw_loc_descr_struct *loc) | |
461 | { | |
462 | struct dw_loc_descr_struct *ptr; | |
463 | cfa->offset = 0; | |
464 | cfa->base_offset = 0; | |
465 | cfa->indirect = 0; | |
466 | cfa->reg = -1; | |
467 | ||
468 | for (ptr = loc; ptr != NULL; ptr = ptr->dw_loc_next) | |
469 | { | |
470 | enum dwarf_location_atom op = ptr->dw_loc_opc; | |
471 | ||
472 | switch (op) | |
473 | { | |
474 | case DW_OP_reg0: | |
475 | case DW_OP_reg1: | |
476 | case DW_OP_reg2: | |
477 | case DW_OP_reg3: | |
478 | case DW_OP_reg4: | |
479 | case DW_OP_reg5: | |
480 | case DW_OP_reg6: | |
481 | case DW_OP_reg7: | |
482 | case DW_OP_reg8: | |
483 | case DW_OP_reg9: | |
484 | case DW_OP_reg10: | |
485 | case DW_OP_reg11: | |
486 | case DW_OP_reg12: | |
487 | case DW_OP_reg13: | |
488 | case DW_OP_reg14: | |
489 | case DW_OP_reg15: | |
490 | case DW_OP_reg16: | |
491 | case DW_OP_reg17: | |
492 | case DW_OP_reg18: | |
493 | case DW_OP_reg19: | |
494 | case DW_OP_reg20: | |
495 | case DW_OP_reg21: | |
496 | case DW_OP_reg22: | |
497 | case DW_OP_reg23: | |
498 | case DW_OP_reg24: | |
499 | case DW_OP_reg25: | |
500 | case DW_OP_reg26: | |
501 | case DW_OP_reg27: | |
502 | case DW_OP_reg28: | |
503 | case DW_OP_reg29: | |
504 | case DW_OP_reg30: | |
505 | case DW_OP_reg31: | |
506 | cfa->reg = op - DW_OP_reg0; | |
507 | break; | |
508 | case DW_OP_regx: | |
509 | cfa->reg = ptr->dw_loc_oprnd1.v.val_int; | |
510 | break; | |
511 | case DW_OP_breg0: | |
512 | case DW_OP_breg1: | |
513 | case DW_OP_breg2: | |
514 | case DW_OP_breg3: | |
515 | case DW_OP_breg4: | |
516 | case DW_OP_breg5: | |
517 | case DW_OP_breg6: | |
518 | case DW_OP_breg7: | |
519 | case DW_OP_breg8: | |
520 | case DW_OP_breg9: | |
521 | case DW_OP_breg10: | |
522 | case DW_OP_breg11: | |
523 | case DW_OP_breg12: | |
524 | case DW_OP_breg13: | |
525 | case DW_OP_breg14: | |
526 | case DW_OP_breg15: | |
527 | case DW_OP_breg16: | |
528 | case DW_OP_breg17: | |
529 | case DW_OP_breg18: | |
530 | case DW_OP_breg19: | |
531 | case DW_OP_breg20: | |
532 | case DW_OP_breg21: | |
533 | case DW_OP_breg22: | |
534 | case DW_OP_breg23: | |
535 | case DW_OP_breg24: | |
536 | case DW_OP_breg25: | |
537 | case DW_OP_breg26: | |
538 | case DW_OP_breg27: | |
539 | case DW_OP_breg28: | |
540 | case DW_OP_breg29: | |
541 | case DW_OP_breg30: | |
542 | case DW_OP_breg31: | |
543 | cfa->reg = op - DW_OP_breg0; | |
544 | cfa->base_offset = ptr->dw_loc_oprnd1.v.val_int; | |
545 | break; | |
546 | case DW_OP_bregx: | |
547 | cfa->reg = ptr->dw_loc_oprnd1.v.val_int; | |
548 | cfa->base_offset = ptr->dw_loc_oprnd2.v.val_int; | |
549 | break; | |
550 | case DW_OP_deref: | |
551 | cfa->indirect = 1; | |
552 | break; | |
553 | case DW_OP_plus_uconst: | |
554 | cfa->offset = ptr->dw_loc_oprnd1.v.val_unsigned; | |
555 | break; | |
556 | default: | |
557 | gcc_unreachable (); | |
558 | } | |
559 | } | |
560 | } | |
561 | ||
4a7a4715 | 562 | /* Find the previous value for the CFA, iteratively. CFI is the opcode |
563 | to interpret, *LOC will be updated as necessary, *REMEMBER is used for | |
564 | one level of remember/restore state processing. */ | |
dcdf448e | 565 | |
566 | void | |
567 | lookup_cfa_1 (dw_cfi_ref cfi, dw_cfa_location *loc, dw_cfa_location *remember) | |
568 | { | |
569 | switch (cfi->dw_cfi_opc) | |
570 | { | |
571 | case DW_CFA_def_cfa_offset: | |
572 | case DW_CFA_def_cfa_offset_sf: | |
573 | loc->offset = cfi->dw_cfi_oprnd1.dw_cfi_offset; | |
574 | break; | |
575 | case DW_CFA_def_cfa_register: | |
576 | loc->reg = cfi->dw_cfi_oprnd1.dw_cfi_reg_num; | |
577 | break; | |
578 | case DW_CFA_def_cfa: | |
579 | case DW_CFA_def_cfa_sf: | |
580 | loc->reg = cfi->dw_cfi_oprnd1.dw_cfi_reg_num; | |
581 | loc->offset = cfi->dw_cfi_oprnd2.dw_cfi_offset; | |
582 | break; | |
583 | case DW_CFA_def_cfa_expression: | |
584 | get_cfa_from_loc_descr (loc, cfi->dw_cfi_oprnd1.dw_cfi_loc); | |
585 | break; | |
586 | ||
587 | case DW_CFA_remember_state: | |
588 | gcc_assert (!remember->in_use); | |
589 | *remember = *loc; | |
590 | remember->in_use = 1; | |
591 | break; | |
592 | case DW_CFA_restore_state: | |
593 | gcc_assert (remember->in_use); | |
594 | *loc = *remember; | |
595 | remember->in_use = 0; | |
596 | break; | |
597 | ||
598 | default: | |
599 | break; | |
600 | } | |
601 | } | |
602 | ||
dcdf448e | 603 | /* Determine if two dw_cfa_location structures define the same data. */ |
604 | ||
605 | bool | |
606 | cfa_equal_p (const dw_cfa_location *loc1, const dw_cfa_location *loc2) | |
607 | { | |
608 | return (loc1->reg == loc2->reg | |
609 | && loc1->offset == loc2->offset | |
610 | && loc1->indirect == loc2->indirect | |
611 | && (loc1->indirect == 0 | |
612 | || loc1->base_offset == loc2->base_offset)); | |
613 | } | |
614 | ||
0b3b5cad | 615 | /* Determine if two CFI operands are identical. */ |
dcdf448e | 616 | |
0b3b5cad | 617 | static bool |
618 | cfi_oprnd_equal_p (enum dw_cfi_oprnd_type t, dw_cfi_oprnd *a, dw_cfi_oprnd *b) | |
dcdf448e | 619 | { |
0b3b5cad | 620 | switch (t) |
621 | { | |
622 | case dw_cfi_oprnd_unused: | |
623 | return true; | |
624 | case dw_cfi_oprnd_reg_num: | |
625 | return a->dw_cfi_reg_num == b->dw_cfi_reg_num; | |
626 | case dw_cfi_oprnd_offset: | |
627 | return a->dw_cfi_offset == b->dw_cfi_offset; | |
628 | case dw_cfi_oprnd_addr: | |
629 | return (a->dw_cfi_addr == b->dw_cfi_addr | |
630 | || strcmp (a->dw_cfi_addr, b->dw_cfi_addr) == 0); | |
631 | case dw_cfi_oprnd_loc: | |
632 | return loc_descr_equal_p (a->dw_cfi_loc, b->dw_cfi_loc); | |
633 | } | |
634 | gcc_unreachable (); | |
635 | } | |
dcdf448e | 636 | |
0b3b5cad | 637 | /* Determine if two CFI entries are identical. */ |
638 | ||
639 | static bool | |
640 | cfi_equal_p (dw_cfi_ref a, dw_cfi_ref b) | |
641 | { | |
642 | enum dwarf_call_frame_info opc; | |
643 | ||
644 | /* Make things easier for our callers, including missing operands. */ | |
645 | if (a == b) | |
646 | return true; | |
647 | if (a == NULL || b == NULL) | |
648 | return false; | |
649 | ||
650 | /* Obviously, the opcodes must match. */ | |
651 | opc = a->dw_cfi_opc; | |
652 | if (opc != b->dw_cfi_opc) | |
653 | return false; | |
654 | ||
655 | /* Compare the two operands, re-using the type of the operands as | |
656 | already exposed elsewhere. */ | |
657 | return (cfi_oprnd_equal_p (dw_cfi_oprnd1_desc (opc), | |
658 | &a->dw_cfi_oprnd1, &b->dw_cfi_oprnd1) | |
659 | && cfi_oprnd_equal_p (dw_cfi_oprnd2_desc (opc), | |
660 | &a->dw_cfi_oprnd2, &b->dw_cfi_oprnd2)); | |
661 | } | |
662 | ||
97c251e4 | 663 | /* Determine if two CFI_ROW structures are identical. */ |
664 | ||
665 | static bool | |
666 | cfi_row_equal_p (dw_cfi_row *a, dw_cfi_row *b) | |
667 | { | |
668 | size_t i, n_a, n_b, n_max; | |
669 | ||
670 | if (a->cfa_cfi) | |
671 | { | |
672 | if (!cfi_equal_p (a->cfa_cfi, b->cfa_cfi)) | |
673 | return false; | |
674 | } | |
675 | else if (!cfa_equal_p (&a->cfa, &b->cfa)) | |
676 | return false; | |
677 | ||
f1f41a6c | 678 | n_a = vec_safe_length (a->reg_save); |
679 | n_b = vec_safe_length (b->reg_save); | |
97c251e4 | 680 | n_max = MAX (n_a, n_b); |
681 | ||
682 | for (i = 0; i < n_max; ++i) | |
683 | { | |
684 | dw_cfi_ref r_a = NULL, r_b = NULL; | |
685 | ||
686 | if (i < n_a) | |
f1f41a6c | 687 | r_a = (*a->reg_save)[i]; |
97c251e4 | 688 | if (i < n_b) |
f1f41a6c | 689 | r_b = (*b->reg_save)[i]; |
97c251e4 | 690 | |
691 | if (!cfi_equal_p (r_a, r_b)) | |
692 | return false; | |
693 | } | |
694 | ||
695 | return true; | |
696 | } | |
697 | ||
0b3b5cad | 698 | /* The CFA is now calculated from NEW_CFA. Consider OLD_CFA in determining |
699 | what opcode to emit. Returns the CFI opcode to effect the change, or | |
700 | NULL if NEW_CFA == OLD_CFA. */ | |
701 | ||
702 | static dw_cfi_ref | |
703 | def_cfa_0 (dw_cfa_location *old_cfa, dw_cfa_location *new_cfa) | |
704 | { | |
705 | dw_cfi_ref cfi; | |
dcdf448e | 706 | |
dcdf448e | 707 | /* If nothing changed, no need to issue any call frame instructions. */ |
0b3b5cad | 708 | if (cfa_equal_p (old_cfa, new_cfa)) |
709 | return NULL; | |
dcdf448e | 710 | |
711 | cfi = new_cfi (); | |
712 | ||
0b3b5cad | 713 | if (new_cfa->reg == old_cfa->reg && !new_cfa->indirect && !old_cfa->indirect) |
dcdf448e | 714 | { |
715 | /* Construct a "DW_CFA_def_cfa_offset <offset>" instruction, indicating | |
716 | the CFA register did not change but the offset did. The data | |
717 | factoring for DW_CFA_def_cfa_offset_sf happens in output_cfi, or | |
718 | in the assembler via the .cfi_def_cfa_offset directive. */ | |
0b3b5cad | 719 | if (new_cfa->offset < 0) |
dcdf448e | 720 | cfi->dw_cfi_opc = DW_CFA_def_cfa_offset_sf; |
721 | else | |
722 | cfi->dw_cfi_opc = DW_CFA_def_cfa_offset; | |
0b3b5cad | 723 | cfi->dw_cfi_oprnd1.dw_cfi_offset = new_cfa->offset; |
dcdf448e | 724 | } |
0b3b5cad | 725 | else if (new_cfa->offset == old_cfa->offset |
726 | && old_cfa->reg != INVALID_REGNUM | |
727 | && !new_cfa->indirect | |
728 | && !old_cfa->indirect) | |
dcdf448e | 729 | { |
730 | /* Construct a "DW_CFA_def_cfa_register <register>" instruction, | |
731 | indicating the CFA register has changed to <register> but the | |
732 | offset has not changed. */ | |
733 | cfi->dw_cfi_opc = DW_CFA_def_cfa_register; | |
0b3b5cad | 734 | cfi->dw_cfi_oprnd1.dw_cfi_reg_num = new_cfa->reg; |
dcdf448e | 735 | } |
0b3b5cad | 736 | else if (new_cfa->indirect == 0) |
dcdf448e | 737 | { |
738 | /* Construct a "DW_CFA_def_cfa <register> <offset>" instruction, | |
739 | indicating the CFA register has changed to <register> with | |
740 | the specified offset. The data factoring for DW_CFA_def_cfa_sf | |
741 | happens in output_cfi, or in the assembler via the .cfi_def_cfa | |
742 | directive. */ | |
0b3b5cad | 743 | if (new_cfa->offset < 0) |
dcdf448e | 744 | cfi->dw_cfi_opc = DW_CFA_def_cfa_sf; |
745 | else | |
746 | cfi->dw_cfi_opc = DW_CFA_def_cfa; | |
0b3b5cad | 747 | cfi->dw_cfi_oprnd1.dw_cfi_reg_num = new_cfa->reg; |
748 | cfi->dw_cfi_oprnd2.dw_cfi_offset = new_cfa->offset; | |
dcdf448e | 749 | } |
750 | else | |
751 | { | |
752 | /* Construct a DW_CFA_def_cfa_expression instruction to | |
753 | calculate the CFA using a full location expression since no | |
754 | register-offset pair is available. */ | |
755 | struct dw_loc_descr_struct *loc_list; | |
756 | ||
757 | cfi->dw_cfi_opc = DW_CFA_def_cfa_expression; | |
0b3b5cad | 758 | loc_list = build_cfa_loc (new_cfa, 0); |
dcdf448e | 759 | cfi->dw_cfi_oprnd1.dw_cfi_loc = loc_list; |
760 | } | |
761 | ||
0b3b5cad | 762 | return cfi; |
763 | } | |
764 | ||
765 | /* Similarly, but take OLD_CFA from CUR_ROW, and update it after the fact. */ | |
766 | ||
767 | static void | |
768 | def_cfa_1 (dw_cfa_location *new_cfa) | |
769 | { | |
770 | dw_cfi_ref cfi; | |
771 | ||
b1613fc3 | 772 | if (cur_trace->cfa_store.reg == new_cfa->reg && new_cfa->indirect == 0) |
773 | cur_trace->cfa_store.offset = new_cfa->offset; | |
0b3b5cad | 774 | |
775 | cfi = def_cfa_0 (&cur_row->cfa, new_cfa); | |
776 | if (cfi) | |
777 | { | |
778 | cur_row->cfa = *new_cfa; | |
a5c6cfdd | 779 | cur_row->cfa_cfi = (cfi->dw_cfi_opc == DW_CFA_def_cfa_expression |
780 | ? cfi : NULL); | |
0b3b5cad | 781 | |
782 | add_cfi (cfi); | |
783 | } | |
dcdf448e | 784 | } |
785 | ||
786 | /* Add the CFI for saving a register. REG is the CFA column number. | |
dcdf448e | 787 | If SREG is -1, the register is saved at OFFSET from the CFA; |
788 | otherwise it is saved in SREG. */ | |
789 | ||
790 | static void | |
d4898332 | 791 | reg_save (unsigned int reg, unsigned int sreg, HOST_WIDE_INT offset) |
dcdf448e | 792 | { |
d4898332 | 793 | dw_fde_ref fde = cfun ? cfun->fde : NULL; |
dcdf448e | 794 | dw_cfi_ref cfi = new_cfi (); |
dcdf448e | 795 | |
796 | cfi->dw_cfi_oprnd1.dw_cfi_reg_num = reg; | |
797 | ||
798 | /* When stack is aligned, store REG using DW_CFA_expression with FP. */ | |
799 | if (fde | |
800 | && fde->stack_realign | |
801 | && sreg == INVALID_REGNUM) | |
802 | { | |
803 | cfi->dw_cfi_opc = DW_CFA_expression; | |
804 | cfi->dw_cfi_oprnd1.dw_cfi_reg_num = reg; | |
805 | cfi->dw_cfi_oprnd2.dw_cfi_loc | |
eb93b3f4 | 806 | = build_cfa_aligned_loc (&cur_row->cfa, offset, |
807 | fde->stack_realignment); | |
dcdf448e | 808 | } |
809 | else if (sreg == INVALID_REGNUM) | |
810 | { | |
811 | if (need_data_align_sf_opcode (offset)) | |
812 | cfi->dw_cfi_opc = DW_CFA_offset_extended_sf; | |
813 | else if (reg & ~0x3f) | |
814 | cfi->dw_cfi_opc = DW_CFA_offset_extended; | |
815 | else | |
816 | cfi->dw_cfi_opc = DW_CFA_offset; | |
817 | cfi->dw_cfi_oprnd2.dw_cfi_offset = offset; | |
818 | } | |
819 | else if (sreg == reg) | |
e9fe542d | 820 | { |
821 | /* While we could emit something like DW_CFA_same_value or | |
822 | DW_CFA_restore, we never expect to see something like that | |
823 | in a prologue. This is more likely to be a bug. A backend | |
824 | can always bypass this by using REG_CFA_RESTORE directly. */ | |
825 | gcc_unreachable (); | |
826 | } | |
dcdf448e | 827 | else |
828 | { | |
829 | cfi->dw_cfi_opc = DW_CFA_register; | |
830 | cfi->dw_cfi_oprnd2.dw_cfi_reg_num = sreg; | |
831 | } | |
832 | ||
d4898332 | 833 | add_cfi (cfi); |
e9fe542d | 834 | update_row_reg_save (cur_row, reg, cfi); |
dcdf448e | 835 | } |
836 | ||
dfe00a8f | 837 | /* A subroutine of scan_trace. Check INSN for a REG_ARGS_SIZE note |
838 | and adjust data structures to match. */ | |
dcdf448e | 839 | |
840 | static void | |
dfe00a8f | 841 | notice_args_size (rtx insn) |
dcdf448e | 842 | { |
dfe00a8f | 843 | HOST_WIDE_INT args_size, delta; |
844 | rtx note; | |
dcdf448e | 845 | |
dfe00a8f | 846 | note = find_reg_note (insn, REG_ARGS_SIZE, NULL); |
847 | if (note == NULL) | |
848 | return; | |
eb93b3f4 | 849 | |
dfe00a8f | 850 | args_size = INTVAL (XEXP (note, 0)); |
851 | delta = args_size - cur_trace->end_true_args_size; | |
852 | if (delta == 0) | |
853 | return; | |
dcdf448e | 854 | |
dfe00a8f | 855 | cur_trace->end_true_args_size = args_size; |
b1613fc3 | 856 | |
dfe00a8f | 857 | /* If the CFA is computed off the stack pointer, then we must adjust |
858 | the computation of the CFA as well. */ | |
859 | if (cur_cfa->reg == dw_stack_pointer_regnum) | |
860 | { | |
861 | gcc_assert (!cur_cfa->indirect); | |
dcdf448e | 862 | |
dfe00a8f | 863 | /* Convert a change in args_size (always a positive in the |
864 | direction of stack growth) to a change in stack pointer. */ | |
afde4c94 | 865 | #ifndef STACK_GROWS_DOWNWARD |
dfe00a8f | 866 | delta = -delta; |
afde4c94 | 867 | #endif |
dfe00a8f | 868 | cur_cfa->offset += delta; |
869 | } | |
dcdf448e | 870 | } |
871 | ||
dfe00a8f | 872 | /* A subroutine of scan_trace. INSN is can_throw_internal. Update the |
873 | data within the trace related to EH insns and args_size. */ | |
dcdf448e | 874 | |
875 | static void | |
dfe00a8f | 876 | notice_eh_throw (rtx insn) |
dcdf448e | 877 | { |
dfe00a8f | 878 | HOST_WIDE_INT args_size; |
dcdf448e | 879 | |
dfe00a8f | 880 | args_size = cur_trace->end_true_args_size; |
881 | if (cur_trace->eh_head == NULL) | |
dcdf448e | 882 | { |
dfe00a8f | 883 | cur_trace->eh_head = insn; |
884 | cur_trace->beg_delay_args_size = args_size; | |
885 | cur_trace->end_delay_args_size = args_size; | |
dcdf448e | 886 | } |
dfe00a8f | 887 | else if (cur_trace->end_delay_args_size != args_size) |
dcdf448e | 888 | { |
dfe00a8f | 889 | cur_trace->end_delay_args_size = args_size; |
dcdf448e | 890 | |
dfe00a8f | 891 | /* ??? If the CFA is the stack pointer, search backward for the last |
892 | CFI note and insert there. Given that the stack changed for the | |
893 | args_size change, there *must* be such a note in between here and | |
894 | the last eh insn. */ | |
895 | add_cfi_args_size (args_size); | |
896 | } | |
dcdf448e | 897 | } |
898 | ||
559e966b | 899 | /* Short-hand inline for the very common D_F_R (REGNO (x)) operation. */ |
26a649dd | 900 | /* ??? This ought to go into dwarf2out.h, except that dwarf2out.h is |
901 | used in places where rtl is prohibited. */ | |
559e966b | 902 | |
903 | static inline unsigned | |
904 | dwf_regno (const_rtx reg) | |
905 | { | |
26a649dd | 906 | return DWARF_FRAME_REGNUM (REGNO (reg)); |
559e966b | 907 | } |
908 | ||
dcdf448e | 909 | /* Compare X and Y for equivalence. The inputs may be REGs or PC_RTX. */ |
910 | ||
911 | static bool | |
912 | compare_reg_or_pc (rtx x, rtx y) | |
913 | { | |
914 | if (REG_P (x) && REG_P (y)) | |
915 | return REGNO (x) == REGNO (y); | |
916 | return x == y; | |
917 | } | |
918 | ||
919 | /* Record SRC as being saved in DEST. DEST may be null to delete an | |
920 | existing entry. SRC may be a register or PC_RTX. */ | |
921 | ||
922 | static void | |
923 | record_reg_saved_in_reg (rtx dest, rtx src) | |
924 | { | |
925 | reg_saved_in_data *elt; | |
926 | size_t i; | |
927 | ||
f1f41a6c | 928 | FOR_EACH_VEC_ELT (cur_trace->regs_saved_in_regs, i, elt) |
dcdf448e | 929 | if (compare_reg_or_pc (elt->orig_reg, src)) |
930 | { | |
931 | if (dest == NULL) | |
f1f41a6c | 932 | cur_trace->regs_saved_in_regs.unordered_remove (i); |
dcdf448e | 933 | else |
934 | elt->saved_in_reg = dest; | |
935 | return; | |
936 | } | |
937 | ||
938 | if (dest == NULL) | |
939 | return; | |
940 | ||
e82e4eb5 | 941 | reg_saved_in_data e = {src, dest}; |
f1f41a6c | 942 | cur_trace->regs_saved_in_regs.safe_push (e); |
dcdf448e | 943 | } |
944 | ||
dcdf448e | 945 | /* Add an entry to QUEUED_REG_SAVES saying that REG is now saved at |
946 | SREG, or if SREG is NULL then it is saved at OFFSET to the CFA. */ | |
947 | ||
948 | static void | |
c746c5c3 | 949 | queue_reg_save (rtx reg, rtx sreg, HOST_WIDE_INT offset) |
dcdf448e | 950 | { |
c73aa568 | 951 | queued_reg_save *q; |
e82e4eb5 | 952 | queued_reg_save e = {reg, sreg, offset}; |
c73aa568 | 953 | size_t i; |
dcdf448e | 954 | |
955 | /* Duplicates waste space, but it's also necessary to remove them | |
6ca363a7 | 956 | for correctness, since the queue gets output in reverse order. */ |
f1f41a6c | 957 | FOR_EACH_VEC_ELT (queued_reg_saves, i, q) |
6ca363a7 | 958 | if (compare_reg_or_pc (q->reg, reg)) |
e82e4eb5 | 959 | { |
960 | *q = e; | |
961 | return; | |
962 | } | |
dcdf448e | 963 | |
f1f41a6c | 964 | queued_reg_saves.safe_push (e); |
dcdf448e | 965 | } |
966 | ||
967 | /* Output all the entries in QUEUED_REG_SAVES. */ | |
968 | ||
969 | static void | |
970 | dwarf2out_flush_queued_reg_saves (void) | |
971 | { | |
c73aa568 | 972 | queued_reg_save *q; |
973 | size_t i; | |
dcdf448e | 974 | |
f1f41a6c | 975 | FOR_EACH_VEC_ELT (queued_reg_saves, i, q) |
dcdf448e | 976 | { |
977 | unsigned int reg, sreg; | |
978 | ||
979 | record_reg_saved_in_reg (q->saved_reg, q->reg); | |
980 | ||
6ca363a7 | 981 | if (q->reg == pc_rtx) |
982 | reg = DWARF_FRAME_RETURN_COLUMN; | |
983 | else | |
559e966b | 984 | reg = dwf_regno (q->reg); |
dcdf448e | 985 | if (q->saved_reg) |
559e966b | 986 | sreg = dwf_regno (q->saved_reg); |
dcdf448e | 987 | else |
988 | sreg = INVALID_REGNUM; | |
d4898332 | 989 | reg_save (reg, sreg, q->cfa_offset); |
dcdf448e | 990 | } |
991 | ||
f1f41a6c | 992 | queued_reg_saves.truncate (0); |
dcdf448e | 993 | } |
994 | ||
995 | /* Does INSN clobber any register which QUEUED_REG_SAVES lists a saved | |
996 | location for? Or, does it clobber a register which we've previously | |
997 | said that some other register is saved in, and for which we now | |
998 | have a new location for? */ | |
999 | ||
1000 | static bool | |
1001 | clobbers_queued_reg_save (const_rtx insn) | |
1002 | { | |
c73aa568 | 1003 | queued_reg_save *q; |
1004 | size_t iq; | |
dcdf448e | 1005 | |
f1f41a6c | 1006 | FOR_EACH_VEC_ELT (queued_reg_saves, iq, q) |
dcdf448e | 1007 | { |
c73aa568 | 1008 | size_t ir; |
dcdf448e | 1009 | reg_saved_in_data *rir; |
1010 | ||
1011 | if (modified_in_p (q->reg, insn)) | |
1012 | return true; | |
1013 | ||
f1f41a6c | 1014 | FOR_EACH_VEC_ELT (cur_trace->regs_saved_in_regs, ir, rir) |
dcdf448e | 1015 | if (compare_reg_or_pc (q->reg, rir->orig_reg) |
1016 | && modified_in_p (rir->saved_in_reg, insn)) | |
1017 | return true; | |
1018 | } | |
1019 | ||
1020 | return false; | |
1021 | } | |
1022 | ||
1023 | /* What register, if any, is currently saved in REG? */ | |
1024 | ||
1025 | static rtx | |
1026 | reg_saved_in (rtx reg) | |
1027 | { | |
1028 | unsigned int regn = REGNO (reg); | |
c73aa568 | 1029 | queued_reg_save *q; |
dcdf448e | 1030 | reg_saved_in_data *rir; |
1031 | size_t i; | |
1032 | ||
f1f41a6c | 1033 | FOR_EACH_VEC_ELT (queued_reg_saves, i, q) |
dcdf448e | 1034 | if (q->saved_reg && regn == REGNO (q->saved_reg)) |
1035 | return q->reg; | |
1036 | ||
f1f41a6c | 1037 | FOR_EACH_VEC_ELT (cur_trace->regs_saved_in_regs, i, rir) |
dcdf448e | 1038 | if (regn == REGNO (rir->saved_in_reg)) |
1039 | return rir->orig_reg; | |
1040 | ||
1041 | return NULL_RTX; | |
1042 | } | |
1043 | ||
dcdf448e | 1044 | /* A subroutine of dwarf2out_frame_debug, process a REG_DEF_CFA note. */ |
1045 | ||
1046 | static void | |
c746c5c3 | 1047 | dwarf2out_frame_debug_def_cfa (rtx pat) |
dcdf448e | 1048 | { |
dfe00a8f | 1049 | memset (cur_cfa, 0, sizeof (*cur_cfa)); |
dcdf448e | 1050 | |
a5c6cfdd | 1051 | if (GET_CODE (pat) == PLUS) |
dcdf448e | 1052 | { |
dfe00a8f | 1053 | cur_cfa->offset = INTVAL (XEXP (pat, 1)); |
a5c6cfdd | 1054 | pat = XEXP (pat, 0); |
1055 | } | |
1056 | if (MEM_P (pat)) | |
1057 | { | |
dfe00a8f | 1058 | cur_cfa->indirect = 1; |
dcdf448e | 1059 | pat = XEXP (pat, 0); |
1060 | if (GET_CODE (pat) == PLUS) | |
1061 | { | |
dfe00a8f | 1062 | cur_cfa->base_offset = INTVAL (XEXP (pat, 1)); |
dcdf448e | 1063 | pat = XEXP (pat, 0); |
1064 | } | |
dcdf448e | 1065 | } |
a5c6cfdd | 1066 | /* ??? If this fails, we could be calling into the _loc functions to |
1067 | define a full expression. So far no port does that. */ | |
1068 | gcc_assert (REG_P (pat)); | |
dfe00a8f | 1069 | cur_cfa->reg = dwf_regno (pat); |
dcdf448e | 1070 | } |
1071 | ||
1072 | /* A subroutine of dwarf2out_frame_debug, process a REG_ADJUST_CFA note. */ | |
1073 | ||
1074 | static void | |
c746c5c3 | 1075 | dwarf2out_frame_debug_adjust_cfa (rtx pat) |
dcdf448e | 1076 | { |
1077 | rtx src, dest; | |
1078 | ||
1079 | gcc_assert (GET_CODE (pat) == SET); | |
1080 | dest = XEXP (pat, 0); | |
1081 | src = XEXP (pat, 1); | |
1082 | ||
1083 | switch (GET_CODE (src)) | |
1084 | { | |
1085 | case PLUS: | |
dfe00a8f | 1086 | gcc_assert (dwf_regno (XEXP (src, 0)) == cur_cfa->reg); |
1087 | cur_cfa->offset -= INTVAL (XEXP (src, 1)); | |
dcdf448e | 1088 | break; |
1089 | ||
1090 | case REG: | |
dfe00a8f | 1091 | break; |
dcdf448e | 1092 | |
1093 | default: | |
dfe00a8f | 1094 | gcc_unreachable (); |
dcdf448e | 1095 | } |
1096 | ||
dfe00a8f | 1097 | cur_cfa->reg = dwf_regno (dest); |
1098 | gcc_assert (cur_cfa->indirect == 0); | |
dcdf448e | 1099 | } |
1100 | ||
1101 | /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_OFFSET note. */ | |
1102 | ||
1103 | static void | |
c746c5c3 | 1104 | dwarf2out_frame_debug_cfa_offset (rtx set) |
dcdf448e | 1105 | { |
1106 | HOST_WIDE_INT offset; | |
1107 | rtx src, addr, span; | |
1108 | unsigned int sregno; | |
1109 | ||
1110 | src = XEXP (set, 1); | |
1111 | addr = XEXP (set, 0); | |
1112 | gcc_assert (MEM_P (addr)); | |
1113 | addr = XEXP (addr, 0); | |
1114 | ||
1115 | /* As documented, only consider extremely simple addresses. */ | |
1116 | switch (GET_CODE (addr)) | |
1117 | { | |
1118 | case REG: | |
dfe00a8f | 1119 | gcc_assert (dwf_regno (addr) == cur_cfa->reg); |
1120 | offset = -cur_cfa->offset; | |
dcdf448e | 1121 | break; |
1122 | case PLUS: | |
dfe00a8f | 1123 | gcc_assert (dwf_regno (XEXP (addr, 0)) == cur_cfa->reg); |
1124 | offset = INTVAL (XEXP (addr, 1)) - cur_cfa->offset; | |
dcdf448e | 1125 | break; |
1126 | default: | |
1127 | gcc_unreachable (); | |
1128 | } | |
1129 | ||
1130 | if (src == pc_rtx) | |
1131 | { | |
1132 | span = NULL; | |
1133 | sregno = DWARF_FRAME_RETURN_COLUMN; | |
1134 | } | |
b1613fc3 | 1135 | else |
dcdf448e | 1136 | { |
1137 | span = targetm.dwarf_register_span (src); | |
559e966b | 1138 | sregno = dwf_regno (src); |
dcdf448e | 1139 | } |
1140 | ||
1141 | /* ??? We'd like to use queue_reg_save, but we need to come up with | |
1142 | a different flushing heuristic for epilogues. */ | |
1143 | if (!span) | |
d4898332 | 1144 | reg_save (sregno, INVALID_REGNUM, offset); |
dcdf448e | 1145 | else |
1146 | { | |
1147 | /* We have a PARALLEL describing where the contents of SRC live. | |
1148 | Queue register saves for each piece of the PARALLEL. */ | |
1149 | int par_index; | |
1150 | int limit; | |
1151 | HOST_WIDE_INT span_offset = offset; | |
1152 | ||
1153 | gcc_assert (GET_CODE (span) == PARALLEL); | |
1154 | ||
1155 | limit = XVECLEN (span, 0); | |
1156 | for (par_index = 0; par_index < limit; par_index++) | |
1157 | { | |
1158 | rtx elem = XVECEXP (span, 0, par_index); | |
1159 | ||
559e966b | 1160 | sregno = dwf_regno (src); |
d4898332 | 1161 | reg_save (sregno, INVALID_REGNUM, span_offset); |
dcdf448e | 1162 | span_offset += GET_MODE_SIZE (GET_MODE (elem)); |
1163 | } | |
1164 | } | |
1165 | } | |
1166 | ||
1167 | /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_REGISTER note. */ | |
1168 | ||
1169 | static void | |
c746c5c3 | 1170 | dwarf2out_frame_debug_cfa_register (rtx set) |
dcdf448e | 1171 | { |
1172 | rtx src, dest; | |
1173 | unsigned sregno, dregno; | |
1174 | ||
1175 | src = XEXP (set, 1); | |
1176 | dest = XEXP (set, 0); | |
1177 | ||
6ca363a7 | 1178 | record_reg_saved_in_reg (dest, src); |
dcdf448e | 1179 | if (src == pc_rtx) |
1180 | sregno = DWARF_FRAME_RETURN_COLUMN; | |
1181 | else | |
559e966b | 1182 | sregno = dwf_regno (src); |
dcdf448e | 1183 | |
559e966b | 1184 | dregno = dwf_regno (dest); |
dcdf448e | 1185 | |
1186 | /* ??? We'd like to use queue_reg_save, but we need to come up with | |
1187 | a different flushing heuristic for epilogues. */ | |
d4898332 | 1188 | reg_save (sregno, dregno, 0); |
dcdf448e | 1189 | } |
1190 | ||
1191 | /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_EXPRESSION note. */ | |
1192 | ||
1193 | static void | |
c746c5c3 | 1194 | dwarf2out_frame_debug_cfa_expression (rtx set) |
dcdf448e | 1195 | { |
1196 | rtx src, dest, span; | |
1197 | dw_cfi_ref cfi = new_cfi (); | |
e9fe542d | 1198 | unsigned regno; |
dcdf448e | 1199 | |
1200 | dest = SET_DEST (set); | |
1201 | src = SET_SRC (set); | |
1202 | ||
1203 | gcc_assert (REG_P (src)); | |
1204 | gcc_assert (MEM_P (dest)); | |
1205 | ||
1206 | span = targetm.dwarf_register_span (src); | |
1207 | gcc_assert (!span); | |
1208 | ||
e9fe542d | 1209 | regno = dwf_regno (src); |
1210 | ||
dcdf448e | 1211 | cfi->dw_cfi_opc = DW_CFA_expression; |
e9fe542d | 1212 | cfi->dw_cfi_oprnd1.dw_cfi_reg_num = regno; |
dcdf448e | 1213 | cfi->dw_cfi_oprnd2.dw_cfi_loc |
1214 | = mem_loc_descriptor (XEXP (dest, 0), get_address_mode (dest), | |
1215 | GET_MODE (dest), VAR_INIT_STATUS_INITIALIZED); | |
1216 | ||
1217 | /* ??? We'd like to use queue_reg_save, were the interface different, | |
1218 | and, as above, we could manage flushing for epilogues. */ | |
d4898332 | 1219 | add_cfi (cfi); |
e9fe542d | 1220 | update_row_reg_save (cur_row, regno, cfi); |
dcdf448e | 1221 | } |
1222 | ||
1223 | /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_RESTORE note. */ | |
1224 | ||
1225 | static void | |
c746c5c3 | 1226 | dwarf2out_frame_debug_cfa_restore (rtx reg) |
dcdf448e | 1227 | { |
559e966b | 1228 | unsigned int regno = dwf_regno (reg); |
dcdf448e | 1229 | |
0b3b5cad | 1230 | add_cfi_restore (regno); |
e9fe542d | 1231 | update_row_reg_save (cur_row, regno, NULL); |
dcdf448e | 1232 | } |
1233 | ||
1234 | /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_WINDOW_SAVE. | |
1235 | ??? Perhaps we should note in the CIE where windows are saved (instead of | |
1236 | assuming 0(cfa)) and what registers are in the window. */ | |
1237 | ||
1238 | static void | |
c746c5c3 | 1239 | dwarf2out_frame_debug_cfa_window_save (void) |
dcdf448e | 1240 | { |
1241 | dw_cfi_ref cfi = new_cfi (); | |
1242 | ||
1243 | cfi->dw_cfi_opc = DW_CFA_GNU_window_save; | |
d4898332 | 1244 | add_cfi (cfi); |
dcdf448e | 1245 | } |
1246 | ||
1247 | /* Record call frame debugging information for an expression EXPR, | |
1248 | which either sets SP or FP (adjusting how we calculate the frame | |
1249 | address) or saves a register to the stack or another register. | |
1250 | LABEL indicates the address of EXPR. | |
1251 | ||
1252 | This function encodes a state machine mapping rtxes to actions on | |
1253 | cfa, cfa_store, and cfa_temp.reg. We describe these rules so | |
1254 | users need not read the source code. | |
1255 | ||
1256 | The High-Level Picture | |
1257 | ||
1258 | Changes in the register we use to calculate the CFA: Currently we | |
1259 | assume that if you copy the CFA register into another register, we | |
1260 | should take the other one as the new CFA register; this seems to | |
1261 | work pretty well. If it's wrong for some target, it's simple | |
1262 | enough not to set RTX_FRAME_RELATED_P on the insn in question. | |
1263 | ||
1264 | Changes in the register we use for saving registers to the stack: | |
1265 | This is usually SP, but not always. Again, we deduce that if you | |
1266 | copy SP into another register (and SP is not the CFA register), | |
1267 | then the new register is the one we will be using for register | |
1268 | saves. This also seems to work. | |
1269 | ||
1270 | Register saves: There's not much guesswork about this one; if | |
1271 | RTX_FRAME_RELATED_P is set on an insn which modifies memory, it's a | |
1272 | register save, and the register used to calculate the destination | |
1273 | had better be the one we think we're using for this purpose. | |
1274 | It's also assumed that a copy from a call-saved register to another | |
1275 | register is saving that register if RTX_FRAME_RELATED_P is set on | |
1276 | that instruction. If the copy is from a call-saved register to | |
1277 | the *same* register, that means that the register is now the same | |
1278 | value as in the caller. | |
1279 | ||
1280 | Except: If the register being saved is the CFA register, and the | |
1281 | offset is nonzero, we are saving the CFA, so we assume we have to | |
1282 | use DW_CFA_def_cfa_expression. If the offset is 0, we assume that | |
1283 | the intent is to save the value of SP from the previous frame. | |
1284 | ||
1285 | In addition, if a register has previously been saved to a different | |
1286 | register, | |
1287 | ||
1288 | Invariants / Summaries of Rules | |
1289 | ||
1290 | cfa current rule for calculating the CFA. It usually | |
eb93b3f4 | 1291 | consists of a register and an offset. This is |
dfe00a8f | 1292 | actually stored in *cur_cfa, but abbreviated |
eb93b3f4 | 1293 | for the purposes of this documentation. |
dcdf448e | 1294 | cfa_store register used by prologue code to save things to the stack |
1295 | cfa_store.offset is the offset from the value of | |
1296 | cfa_store.reg to the actual CFA | |
1297 | cfa_temp register holding an integral value. cfa_temp.offset | |
1298 | stores the value, which will be used to adjust the | |
1299 | stack pointer. cfa_temp is also used like cfa_store, | |
1300 | to track stores to the stack via fp or a temp reg. | |
1301 | ||
1302 | Rules 1- 4: Setting a register's value to cfa.reg or an expression | |
1303 | with cfa.reg as the first operand changes the cfa.reg and its | |
1304 | cfa.offset. Rule 1 and 4 also set cfa_temp.reg and | |
1305 | cfa_temp.offset. | |
1306 | ||
1307 | Rules 6- 9: Set a non-cfa.reg register value to a constant or an | |
1308 | expression yielding a constant. This sets cfa_temp.reg | |
1309 | and cfa_temp.offset. | |
1310 | ||
1311 | Rule 5: Create a new register cfa_store used to save items to the | |
1312 | stack. | |
1313 | ||
1314 | Rules 10-14: Save a register to the stack. Define offset as the | |
1315 | difference of the original location and cfa_store's | |
1316 | location (or cfa_temp's location if cfa_temp is used). | |
1317 | ||
1318 | Rules 16-20: If AND operation happens on sp in prologue, we assume | |
1319 | stack is realigned. We will use a group of DW_OP_XXX | |
1320 | expressions to represent the location of the stored | |
1321 | register instead of CFA+offset. | |
1322 | ||
1323 | The Rules | |
1324 | ||
1325 | "{a,b}" indicates a choice of a xor b. | |
1326 | "<reg>:cfa.reg" indicates that <reg> must equal cfa.reg. | |
1327 | ||
1328 | Rule 1: | |
1329 | (set <reg1> <reg2>:cfa.reg) | |
1330 | effects: cfa.reg = <reg1> | |
1331 | cfa.offset unchanged | |
1332 | cfa_temp.reg = <reg1> | |
1333 | cfa_temp.offset = cfa.offset | |
1334 | ||
1335 | Rule 2: | |
1336 | (set sp ({minus,plus,losum} {sp,fp}:cfa.reg | |
1337 | {<const_int>,<reg>:cfa_temp.reg})) | |
1338 | effects: cfa.reg = sp if fp used | |
1339 | cfa.offset += {+/- <const_int>, cfa_temp.offset} if cfa.reg==sp | |
1340 | cfa_store.offset += {+/- <const_int>, cfa_temp.offset} | |
1341 | if cfa_store.reg==sp | |
1342 | ||
1343 | Rule 3: | |
1344 | (set fp ({minus,plus,losum} <reg>:cfa.reg <const_int>)) | |
1345 | effects: cfa.reg = fp | |
1346 | cfa_offset += +/- <const_int> | |
1347 | ||
1348 | Rule 4: | |
1349 | (set <reg1> ({plus,losum} <reg2>:cfa.reg <const_int>)) | |
1350 | constraints: <reg1> != fp | |
1351 | <reg1> != sp | |
1352 | effects: cfa.reg = <reg1> | |
1353 | cfa_temp.reg = <reg1> | |
1354 | cfa_temp.offset = cfa.offset | |
1355 | ||
1356 | Rule 5: | |
1357 | (set <reg1> (plus <reg2>:cfa_temp.reg sp:cfa.reg)) | |
1358 | constraints: <reg1> != fp | |
1359 | <reg1> != sp | |
1360 | effects: cfa_store.reg = <reg1> | |
1361 | cfa_store.offset = cfa.offset - cfa_temp.offset | |
1362 | ||
1363 | Rule 6: | |
1364 | (set <reg> <const_int>) | |
1365 | effects: cfa_temp.reg = <reg> | |
1366 | cfa_temp.offset = <const_int> | |
1367 | ||
1368 | Rule 7: | |
1369 | (set <reg1>:cfa_temp.reg (ior <reg2>:cfa_temp.reg <const_int>)) | |
1370 | effects: cfa_temp.reg = <reg1> | |
1371 | cfa_temp.offset |= <const_int> | |
1372 | ||
1373 | Rule 8: | |
1374 | (set <reg> (high <exp>)) | |
1375 | effects: none | |
1376 | ||
1377 | Rule 9: | |
1378 | (set <reg> (lo_sum <exp> <const_int>)) | |
1379 | effects: cfa_temp.reg = <reg> | |
1380 | cfa_temp.offset = <const_int> | |
1381 | ||
1382 | Rule 10: | |
1383 | (set (mem ({pre,post}_modify sp:cfa_store (???? <reg1> <const_int>))) <reg2>) | |
1384 | effects: cfa_store.offset -= <const_int> | |
1385 | cfa.offset = cfa_store.offset if cfa.reg == sp | |
1386 | cfa.reg = sp | |
1387 | cfa.base_offset = -cfa_store.offset | |
1388 | ||
1389 | Rule 11: | |
1390 | (set (mem ({pre_inc,pre_dec,post_dec} sp:cfa_store.reg)) <reg>) | |
1391 | effects: cfa_store.offset += -/+ mode_size(mem) | |
1392 | cfa.offset = cfa_store.offset if cfa.reg == sp | |
1393 | cfa.reg = sp | |
1394 | cfa.base_offset = -cfa_store.offset | |
1395 | ||
1396 | Rule 12: | |
1397 | (set (mem ({minus,plus,losum} <reg1>:{cfa_store,cfa_temp} <const_int>)) | |
1398 | ||
1399 | <reg2>) | |
1400 | effects: cfa.reg = <reg1> | |
1401 | cfa.base_offset = -/+ <const_int> - {cfa_store,cfa_temp}.offset | |
1402 | ||
1403 | Rule 13: | |
1404 | (set (mem <reg1>:{cfa_store,cfa_temp}) <reg2>) | |
1405 | effects: cfa.reg = <reg1> | |
1406 | cfa.base_offset = -{cfa_store,cfa_temp}.offset | |
1407 | ||
1408 | Rule 14: | |
1409 | (set (mem (post_inc <reg1>:cfa_temp <const_int>)) <reg2>) | |
1410 | effects: cfa.reg = <reg1> | |
1411 | cfa.base_offset = -cfa_temp.offset | |
1412 | cfa_temp.offset -= mode_size(mem) | |
1413 | ||
1414 | Rule 15: | |
1415 | (set <reg> {unspec, unspec_volatile}) | |
1416 | effects: target-dependent | |
1417 | ||
1418 | Rule 16: | |
1419 | (set sp (and: sp <const_int>)) | |
1420 | constraints: cfa_store.reg == sp | |
6033bf11 | 1421 | effects: cfun->fde.stack_realign = 1 |
dcdf448e | 1422 | cfa_store.offset = 0 |
1423 | fde->drap_reg = cfa.reg if cfa.reg != sp and cfa.reg != fp | |
1424 | ||
1425 | Rule 17: | |
1426 | (set (mem ({pre_inc, pre_dec} sp)) (mem (plus (cfa.reg) (const_int)))) | |
1427 | effects: cfa_store.offset += -/+ mode_size(mem) | |
1428 | ||
1429 | Rule 18: | |
1430 | (set (mem ({pre_inc, pre_dec} sp)) fp) | |
1431 | constraints: fde->stack_realign == 1 | |
1432 | effects: cfa_store.offset = 0 | |
1433 | cfa.reg != HARD_FRAME_POINTER_REGNUM | |
1434 | ||
1435 | Rule 19: | |
1436 | (set (mem ({pre_inc, pre_dec} sp)) cfa.reg) | |
1437 | constraints: fde->stack_realign == 1 | |
1438 | && cfa.offset == 0 | |
1439 | && cfa.indirect == 0 | |
1440 | && cfa.reg != HARD_FRAME_POINTER_REGNUM | |
1441 | effects: Use DW_CFA_def_cfa_expression to define cfa | |
1442 | cfa.reg == fde->drap_reg */ | |
1443 | ||
1444 | static void | |
c746c5c3 | 1445 | dwarf2out_frame_debug_expr (rtx expr) |
dcdf448e | 1446 | { |
1447 | rtx src, dest, span; | |
1448 | HOST_WIDE_INT offset; | |
1449 | dw_fde_ref fde; | |
1450 | ||
1451 | /* If RTX_FRAME_RELATED_P is set on a PARALLEL, process each member of | |
1452 | the PARALLEL independently. The first element is always processed if | |
1453 | it is a SET. This is for backward compatibility. Other elements | |
1454 | are processed only if they are SETs and the RTX_FRAME_RELATED_P | |
1455 | flag is set in them. */ | |
1456 | if (GET_CODE (expr) == PARALLEL || GET_CODE (expr) == SEQUENCE) | |
1457 | { | |
1458 | int par_index; | |
1459 | int limit = XVECLEN (expr, 0); | |
1460 | rtx elem; | |
1461 | ||
1462 | /* PARALLELs have strict read-modify-write semantics, so we | |
1463 | ought to evaluate every rvalue before changing any lvalue. | |
1464 | It's cumbersome to do that in general, but there's an | |
1465 | easy approximation that is enough for all current users: | |
1466 | handle register saves before register assignments. */ | |
1467 | if (GET_CODE (expr) == PARALLEL) | |
1468 | for (par_index = 0; par_index < limit; par_index++) | |
1469 | { | |
1470 | elem = XVECEXP (expr, 0, par_index); | |
1471 | if (GET_CODE (elem) == SET | |
1472 | && MEM_P (SET_DEST (elem)) | |
1473 | && (RTX_FRAME_RELATED_P (elem) || par_index == 0)) | |
c746c5c3 | 1474 | dwarf2out_frame_debug_expr (elem); |
dcdf448e | 1475 | } |
1476 | ||
1477 | for (par_index = 0; par_index < limit; par_index++) | |
1478 | { | |
1479 | elem = XVECEXP (expr, 0, par_index); | |
1480 | if (GET_CODE (elem) == SET | |
1481 | && (!MEM_P (SET_DEST (elem)) || GET_CODE (expr) == SEQUENCE) | |
1482 | && (RTX_FRAME_RELATED_P (elem) || par_index == 0)) | |
c746c5c3 | 1483 | dwarf2out_frame_debug_expr (elem); |
dcdf448e | 1484 | } |
1485 | return; | |
1486 | } | |
1487 | ||
1488 | gcc_assert (GET_CODE (expr) == SET); | |
1489 | ||
1490 | src = SET_SRC (expr); | |
1491 | dest = SET_DEST (expr); | |
1492 | ||
1493 | if (REG_P (src)) | |
1494 | { | |
1495 | rtx rsi = reg_saved_in (src); | |
1496 | if (rsi) | |
1497 | src = rsi; | |
1498 | } | |
1499 | ||
6033bf11 | 1500 | fde = cfun->fde; |
dcdf448e | 1501 | |
1502 | switch (GET_CODE (dest)) | |
1503 | { | |
1504 | case REG: | |
1505 | switch (GET_CODE (src)) | |
1506 | { | |
1507 | /* Setting FP from SP. */ | |
1508 | case REG: | |
dfe00a8f | 1509 | if (cur_cfa->reg == dwf_regno (src)) |
dcdf448e | 1510 | { |
1511 | /* Rule 1 */ | |
1512 | /* Update the CFA rule wrt SP or FP. Make sure src is | |
1513 | relative to the current CFA register. | |
1514 | ||
1515 | We used to require that dest be either SP or FP, but the | |
1516 | ARM copies SP to a temporary register, and from there to | |
1517 | FP. So we just rely on the backends to only set | |
1518 | RTX_FRAME_RELATED_P on appropriate insns. */ | |
dfe00a8f | 1519 | cur_cfa->reg = dwf_regno (dest); |
1520 | cur_trace->cfa_temp.reg = cur_cfa->reg; | |
1521 | cur_trace->cfa_temp.offset = cur_cfa->offset; | |
dcdf448e | 1522 | } |
1523 | else | |
1524 | { | |
1525 | /* Saving a register in a register. */ | |
1526 | gcc_assert (!fixed_regs [REGNO (dest)] | |
1527 | /* For the SPARC and its register window. */ | |
559e966b | 1528 | || (dwf_regno (src) == DWARF_FRAME_RETURN_COLUMN)); |
dcdf448e | 1529 | |
1530 | /* After stack is aligned, we can only save SP in FP | |
1531 | if drap register is used. In this case, we have | |
1532 | to restore stack pointer with the CFA value and we | |
1533 | don't generate this DWARF information. */ | |
1534 | if (fde | |
1535 | && fde->stack_realign | |
1536 | && REGNO (src) == STACK_POINTER_REGNUM) | |
1537 | gcc_assert (REGNO (dest) == HARD_FRAME_POINTER_REGNUM | |
1538 | && fde->drap_reg != INVALID_REGNUM | |
dfe00a8f | 1539 | && cur_cfa->reg != dwf_regno (src)); |
dcdf448e | 1540 | else |
c746c5c3 | 1541 | queue_reg_save (src, dest, 0); |
dcdf448e | 1542 | } |
1543 | break; | |
1544 | ||
1545 | case PLUS: | |
1546 | case MINUS: | |
1547 | case LO_SUM: | |
1548 | if (dest == stack_pointer_rtx) | |
1549 | { | |
1550 | /* Rule 2 */ | |
1551 | /* Adjusting SP. */ | |
1552 | switch (GET_CODE (XEXP (src, 1))) | |
1553 | { | |
1554 | case CONST_INT: | |
1555 | offset = INTVAL (XEXP (src, 1)); | |
1556 | break; | |
1557 | case REG: | |
b1613fc3 | 1558 | gcc_assert (dwf_regno (XEXP (src, 1)) |
1559 | == cur_trace->cfa_temp.reg); | |
1560 | offset = cur_trace->cfa_temp.offset; | |
dcdf448e | 1561 | break; |
1562 | default: | |
1563 | gcc_unreachable (); | |
1564 | } | |
1565 | ||
1566 | if (XEXP (src, 0) == hard_frame_pointer_rtx) | |
1567 | { | |
1568 | /* Restoring SP from FP in the epilogue. */ | |
dfe00a8f | 1569 | gcc_assert (cur_cfa->reg == dw_frame_pointer_regnum); |
1570 | cur_cfa->reg = dw_stack_pointer_regnum; | |
dcdf448e | 1571 | } |
1572 | else if (GET_CODE (src) == LO_SUM) | |
1573 | /* Assume we've set the source reg of the LO_SUM from sp. */ | |
1574 | ; | |
1575 | else | |
1576 | gcc_assert (XEXP (src, 0) == stack_pointer_rtx); | |
1577 | ||
1578 | if (GET_CODE (src) != MINUS) | |
1579 | offset = -offset; | |
dfe00a8f | 1580 | if (cur_cfa->reg == dw_stack_pointer_regnum) |
1581 | cur_cfa->offset += offset; | |
b1613fc3 | 1582 | if (cur_trace->cfa_store.reg == dw_stack_pointer_regnum) |
1583 | cur_trace->cfa_store.offset += offset; | |
dcdf448e | 1584 | } |
1585 | else if (dest == hard_frame_pointer_rtx) | |
1586 | { | |
1587 | /* Rule 3 */ | |
1588 | /* Either setting the FP from an offset of the SP, | |
1589 | or adjusting the FP */ | |
1590 | gcc_assert (frame_pointer_needed); | |
1591 | ||
1592 | gcc_assert (REG_P (XEXP (src, 0)) | |
dfe00a8f | 1593 | && dwf_regno (XEXP (src, 0)) == cur_cfa->reg |
dcdf448e | 1594 | && CONST_INT_P (XEXP (src, 1))); |
1595 | offset = INTVAL (XEXP (src, 1)); | |
1596 | if (GET_CODE (src) != MINUS) | |
1597 | offset = -offset; | |
dfe00a8f | 1598 | cur_cfa->offset += offset; |
1599 | cur_cfa->reg = dw_frame_pointer_regnum; | |
dcdf448e | 1600 | } |
1601 | else | |
1602 | { | |
1603 | gcc_assert (GET_CODE (src) != MINUS); | |
1604 | ||
1605 | /* Rule 4 */ | |
1606 | if (REG_P (XEXP (src, 0)) | |
dfe00a8f | 1607 | && dwf_regno (XEXP (src, 0)) == cur_cfa->reg |
dcdf448e | 1608 | && CONST_INT_P (XEXP (src, 1))) |
1609 | { | |
1610 | /* Setting a temporary CFA register that will be copied | |
1611 | into the FP later on. */ | |
1612 | offset = - INTVAL (XEXP (src, 1)); | |
dfe00a8f | 1613 | cur_cfa->offset += offset; |
1614 | cur_cfa->reg = dwf_regno (dest); | |
dcdf448e | 1615 | /* Or used to save regs to the stack. */ |
dfe00a8f | 1616 | cur_trace->cfa_temp.reg = cur_cfa->reg; |
1617 | cur_trace->cfa_temp.offset = cur_cfa->offset; | |
dcdf448e | 1618 | } |
1619 | ||
1620 | /* Rule 5 */ | |
1621 | else if (REG_P (XEXP (src, 0)) | |
b1613fc3 | 1622 | && dwf_regno (XEXP (src, 0)) == cur_trace->cfa_temp.reg |
dcdf448e | 1623 | && XEXP (src, 1) == stack_pointer_rtx) |
1624 | { | |
1625 | /* Setting a scratch register that we will use instead | |
1626 | of SP for saving registers to the stack. */ | |
dfe00a8f | 1627 | gcc_assert (cur_cfa->reg == dw_stack_pointer_regnum); |
b1613fc3 | 1628 | cur_trace->cfa_store.reg = dwf_regno (dest); |
1629 | cur_trace->cfa_store.offset | |
dfe00a8f | 1630 | = cur_cfa->offset - cur_trace->cfa_temp.offset; |
dcdf448e | 1631 | } |
1632 | ||
1633 | /* Rule 9 */ | |
1634 | else if (GET_CODE (src) == LO_SUM | |
1635 | && CONST_INT_P (XEXP (src, 1))) | |
1636 | { | |
b1613fc3 | 1637 | cur_trace->cfa_temp.reg = dwf_regno (dest); |
1638 | cur_trace->cfa_temp.offset = INTVAL (XEXP (src, 1)); | |
dcdf448e | 1639 | } |
1640 | else | |
1641 | gcc_unreachable (); | |
1642 | } | |
1643 | break; | |
1644 | ||
1645 | /* Rule 6 */ | |
1646 | case CONST_INT: | |
b1613fc3 | 1647 | cur_trace->cfa_temp.reg = dwf_regno (dest); |
1648 | cur_trace->cfa_temp.offset = INTVAL (src); | |
dcdf448e | 1649 | break; |
1650 | ||
1651 | /* Rule 7 */ | |
1652 | case IOR: | |
1653 | gcc_assert (REG_P (XEXP (src, 0)) | |
b1613fc3 | 1654 | && dwf_regno (XEXP (src, 0)) == cur_trace->cfa_temp.reg |
dcdf448e | 1655 | && CONST_INT_P (XEXP (src, 1))); |
1656 | ||
b1613fc3 | 1657 | cur_trace->cfa_temp.reg = dwf_regno (dest); |
1658 | cur_trace->cfa_temp.offset |= INTVAL (XEXP (src, 1)); | |
dcdf448e | 1659 | break; |
1660 | ||
1661 | /* Skip over HIGH, assuming it will be followed by a LO_SUM, | |
1662 | which will fill in all of the bits. */ | |
1663 | /* Rule 8 */ | |
1664 | case HIGH: | |
1665 | break; | |
1666 | ||
1667 | /* Rule 15 */ | |
1668 | case UNSPEC: | |
1669 | case UNSPEC_VOLATILE: | |
c746c5c3 | 1670 | /* All unspecs should be represented by REG_CFA_* notes. */ |
1671 | gcc_unreachable (); | |
dcdf448e | 1672 | return; |
1673 | ||
1674 | /* Rule 16 */ | |
1675 | case AND: | |
1676 | /* If this AND operation happens on stack pointer in prologue, | |
1677 | we assume the stack is realigned and we extract the | |
1678 | alignment. */ | |
1679 | if (fde && XEXP (src, 0) == stack_pointer_rtx) | |
1680 | { | |
1681 | /* We interpret reg_save differently with stack_realign set. | |
1682 | Thus we must flush whatever we have queued first. */ | |
1683 | dwarf2out_flush_queued_reg_saves (); | |
1684 | ||
b1613fc3 | 1685 | gcc_assert (cur_trace->cfa_store.reg |
1686 | == dwf_regno (XEXP (src, 0))); | |
dcdf448e | 1687 | fde->stack_realign = 1; |
1688 | fde->stack_realignment = INTVAL (XEXP (src, 1)); | |
b1613fc3 | 1689 | cur_trace->cfa_store.offset = 0; |
dcdf448e | 1690 | |
dfe00a8f | 1691 | if (cur_cfa->reg != dw_stack_pointer_regnum |
1692 | && cur_cfa->reg != dw_frame_pointer_regnum) | |
1693 | fde->drap_reg = cur_cfa->reg; | |
dcdf448e | 1694 | } |
1695 | return; | |
1696 | ||
1697 | default: | |
1698 | gcc_unreachable (); | |
1699 | } | |
dcdf448e | 1700 | break; |
1701 | ||
1702 | case MEM: | |
1703 | ||
1704 | /* Saving a register to the stack. Make sure dest is relative to the | |
1705 | CFA register. */ | |
1706 | switch (GET_CODE (XEXP (dest, 0))) | |
1707 | { | |
1708 | /* Rule 10 */ | |
1709 | /* With a push. */ | |
1710 | case PRE_MODIFY: | |
1711 | case POST_MODIFY: | |
1712 | /* We can't handle variable size modifications. */ | |
1713 | gcc_assert (GET_CODE (XEXP (XEXP (XEXP (dest, 0), 1), 1)) | |
1714 | == CONST_INT); | |
1715 | offset = -INTVAL (XEXP (XEXP (XEXP (dest, 0), 1), 1)); | |
1716 | ||
1717 | gcc_assert (REGNO (XEXP (XEXP (dest, 0), 0)) == STACK_POINTER_REGNUM | |
b1613fc3 | 1718 | && cur_trace->cfa_store.reg == dw_stack_pointer_regnum); |
dcdf448e | 1719 | |
b1613fc3 | 1720 | cur_trace->cfa_store.offset += offset; |
dfe00a8f | 1721 | if (cur_cfa->reg == dw_stack_pointer_regnum) |
1722 | cur_cfa->offset = cur_trace->cfa_store.offset; | |
dcdf448e | 1723 | |
1724 | if (GET_CODE (XEXP (dest, 0)) == POST_MODIFY) | |
b1613fc3 | 1725 | offset -= cur_trace->cfa_store.offset; |
dcdf448e | 1726 | else |
b1613fc3 | 1727 | offset = -cur_trace->cfa_store.offset; |
dcdf448e | 1728 | break; |
1729 | ||
1730 | /* Rule 11 */ | |
1731 | case PRE_INC: | |
1732 | case PRE_DEC: | |
1733 | case POST_DEC: | |
1734 | offset = GET_MODE_SIZE (GET_MODE (dest)); | |
1735 | if (GET_CODE (XEXP (dest, 0)) == PRE_INC) | |
1736 | offset = -offset; | |
1737 | ||
1738 | gcc_assert ((REGNO (XEXP (XEXP (dest, 0), 0)) | |
1739 | == STACK_POINTER_REGNUM) | |
b1613fc3 | 1740 | && cur_trace->cfa_store.reg == dw_stack_pointer_regnum); |
dcdf448e | 1741 | |
b1613fc3 | 1742 | cur_trace->cfa_store.offset += offset; |
dcdf448e | 1743 | |
1744 | /* Rule 18: If stack is aligned, we will use FP as a | |
1745 | reference to represent the address of the stored | |
1746 | regiser. */ | |
1747 | if (fde | |
1748 | && fde->stack_realign | |
2013c33b | 1749 | && REG_P (src) |
1750 | && REGNO (src) == HARD_FRAME_POINTER_REGNUM) | |
dcdf448e | 1751 | { |
dfe00a8f | 1752 | gcc_assert (cur_cfa->reg != dw_frame_pointer_regnum); |
b1613fc3 | 1753 | cur_trace->cfa_store.offset = 0; |
dcdf448e | 1754 | } |
1755 | ||
dfe00a8f | 1756 | if (cur_cfa->reg == dw_stack_pointer_regnum) |
1757 | cur_cfa->offset = cur_trace->cfa_store.offset; | |
dcdf448e | 1758 | |
1759 | if (GET_CODE (XEXP (dest, 0)) == POST_DEC) | |
b1613fc3 | 1760 | offset += -cur_trace->cfa_store.offset; |
dcdf448e | 1761 | else |
b1613fc3 | 1762 | offset = -cur_trace->cfa_store.offset; |
dcdf448e | 1763 | break; |
1764 | ||
1765 | /* Rule 12 */ | |
1766 | /* With an offset. */ | |
1767 | case PLUS: | |
1768 | case MINUS: | |
1769 | case LO_SUM: | |
1770 | { | |
559e966b | 1771 | unsigned int regno; |
dcdf448e | 1772 | |
1773 | gcc_assert (CONST_INT_P (XEXP (XEXP (dest, 0), 1)) | |
1774 | && REG_P (XEXP (XEXP (dest, 0), 0))); | |
1775 | offset = INTVAL (XEXP (XEXP (dest, 0), 1)); | |
1776 | if (GET_CODE (XEXP (dest, 0)) == MINUS) | |
1777 | offset = -offset; | |
1778 | ||
559e966b | 1779 | regno = dwf_regno (XEXP (XEXP (dest, 0), 0)); |
dcdf448e | 1780 | |
dfe00a8f | 1781 | if (cur_cfa->reg == regno) |
1782 | offset -= cur_cfa->offset; | |
b1613fc3 | 1783 | else if (cur_trace->cfa_store.reg == regno) |
1784 | offset -= cur_trace->cfa_store.offset; | |
dcdf448e | 1785 | else |
1786 | { | |
b1613fc3 | 1787 | gcc_assert (cur_trace->cfa_temp.reg == regno); |
1788 | offset -= cur_trace->cfa_temp.offset; | |
dcdf448e | 1789 | } |
1790 | } | |
1791 | break; | |
1792 | ||
1793 | /* Rule 13 */ | |
1794 | /* Without an offset. */ | |
1795 | case REG: | |
1796 | { | |
559e966b | 1797 | unsigned int regno = dwf_regno (XEXP (dest, 0)); |
dcdf448e | 1798 | |
dfe00a8f | 1799 | if (cur_cfa->reg == regno) |
1800 | offset = -cur_cfa->offset; | |
b1613fc3 | 1801 | else if (cur_trace->cfa_store.reg == regno) |
1802 | offset = -cur_trace->cfa_store.offset; | |
dcdf448e | 1803 | else |
1804 | { | |
b1613fc3 | 1805 | gcc_assert (cur_trace->cfa_temp.reg == regno); |
1806 | offset = -cur_trace->cfa_temp.offset; | |
dcdf448e | 1807 | } |
1808 | } | |
1809 | break; | |
1810 | ||
1811 | /* Rule 14 */ | |
1812 | case POST_INC: | |
b1613fc3 | 1813 | gcc_assert (cur_trace->cfa_temp.reg |
1814 | == dwf_regno (XEXP (XEXP (dest, 0), 0))); | |
1815 | offset = -cur_trace->cfa_temp.offset; | |
1816 | cur_trace->cfa_temp.offset -= GET_MODE_SIZE (GET_MODE (dest)); | |
dcdf448e | 1817 | break; |
1818 | ||
1819 | default: | |
1820 | gcc_unreachable (); | |
1821 | } | |
1822 | ||
6ca363a7 | 1823 | /* Rule 17 */ |
1824 | /* If the source operand of this MEM operation is a memory, | |
1825 | we only care how much stack grew. */ | |
1826 | if (MEM_P (src)) | |
dcdf448e | 1827 | break; |
1828 | ||
6ca363a7 | 1829 | if (REG_P (src) |
1830 | && REGNO (src) != STACK_POINTER_REGNUM | |
dcdf448e | 1831 | && REGNO (src) != HARD_FRAME_POINTER_REGNUM |
dfe00a8f | 1832 | && dwf_regno (src) == cur_cfa->reg) |
dcdf448e | 1833 | { |
1834 | /* We're storing the current CFA reg into the stack. */ | |
1835 | ||
dfe00a8f | 1836 | if (cur_cfa->offset == 0) |
dcdf448e | 1837 | { |
1838 | /* Rule 19 */ | |
1839 | /* If stack is aligned, putting CFA reg into stack means | |
1840 | we can no longer use reg + offset to represent CFA. | |
1841 | Here we use DW_CFA_def_cfa_expression instead. The | |
1842 | result of this expression equals to the original CFA | |
1843 | value. */ | |
1844 | if (fde | |
1845 | && fde->stack_realign | |
dfe00a8f | 1846 | && cur_cfa->indirect == 0 |
1847 | && cur_cfa->reg != dw_frame_pointer_regnum) | |
dcdf448e | 1848 | { |
dfe00a8f | 1849 | gcc_assert (fde->drap_reg == cur_cfa->reg); |
dcdf448e | 1850 | |
dfe00a8f | 1851 | cur_cfa->indirect = 1; |
1852 | cur_cfa->reg = dw_frame_pointer_regnum; | |
1853 | cur_cfa->base_offset = offset; | |
1854 | cur_cfa->offset = 0; | |
dcdf448e | 1855 | |
1856 | fde->drap_reg_saved = 1; | |
dcdf448e | 1857 | break; |
1858 | } | |
1859 | ||
1860 | /* If the source register is exactly the CFA, assume | |
1861 | we're saving SP like any other register; this happens | |
1862 | on the ARM. */ | |
c746c5c3 | 1863 | queue_reg_save (stack_pointer_rtx, NULL_RTX, offset); |
dcdf448e | 1864 | break; |
1865 | } | |
1866 | else | |
1867 | { | |
1868 | /* Otherwise, we'll need to look in the stack to | |
1869 | calculate the CFA. */ | |
1870 | rtx x = XEXP (dest, 0); | |
1871 | ||
1872 | if (!REG_P (x)) | |
1873 | x = XEXP (x, 0); | |
1874 | gcc_assert (REG_P (x)); | |
1875 | ||
dfe00a8f | 1876 | cur_cfa->reg = dwf_regno (x); |
1877 | cur_cfa->base_offset = offset; | |
1878 | cur_cfa->indirect = 1; | |
dcdf448e | 1879 | break; |
1880 | } | |
1881 | } | |
1882 | ||
6ca363a7 | 1883 | span = NULL; |
1884 | if (REG_P (src)) | |
1885 | span = targetm.dwarf_register_span (src); | |
1886 | if (!span) | |
1887 | queue_reg_save (src, NULL_RTX, offset); | |
1888 | else | |
1889 | { | |
1890 | /* We have a PARALLEL describing where the contents of SRC live. | |
1891 | Queue register saves for each piece of the PARALLEL. */ | |
1892 | int par_index; | |
1893 | int limit; | |
1894 | HOST_WIDE_INT span_offset = offset; | |
dcdf448e | 1895 | |
6ca363a7 | 1896 | gcc_assert (GET_CODE (span) == PARALLEL); |
dcdf448e | 1897 | |
6ca363a7 | 1898 | limit = XVECLEN (span, 0); |
1899 | for (par_index = 0; par_index < limit; par_index++) | |
1900 | { | |
1901 | rtx elem = XVECEXP (span, 0, par_index); | |
1902 | queue_reg_save (elem, NULL_RTX, span_offset); | |
1903 | span_offset += GET_MODE_SIZE (GET_MODE (elem)); | |
1904 | } | |
1905 | } | |
dcdf448e | 1906 | break; |
1907 | ||
1908 | default: | |
1909 | gcc_unreachable (); | |
1910 | } | |
1911 | } | |
1912 | ||
dfe00a8f | 1913 | /* Record call frame debugging information for INSN, which either sets |
1914 | SP or FP (adjusting how we calculate the frame address) or saves a | |
1915 | register to the stack. */ | |
dcdf448e | 1916 | |
fe2dc6d6 | 1917 | static void |
dfe00a8f | 1918 | dwarf2out_frame_debug (rtx insn) |
dcdf448e | 1919 | { |
dcdf448e | 1920 | rtx note, n; |
1921 | bool handled_one = false; | |
dcdf448e | 1922 | |
1923 | for (note = REG_NOTES (insn); note; note = XEXP (note, 1)) | |
1924 | switch (REG_NOTE_KIND (note)) | |
1925 | { | |
1926 | case REG_FRAME_RELATED_EXPR: | |
1927 | insn = XEXP (note, 0); | |
1928 | goto do_frame_expr; | |
1929 | ||
1930 | case REG_CFA_DEF_CFA: | |
c746c5c3 | 1931 | dwarf2out_frame_debug_def_cfa (XEXP (note, 0)); |
dcdf448e | 1932 | handled_one = true; |
1933 | break; | |
1934 | ||
1935 | case REG_CFA_ADJUST_CFA: | |
1936 | n = XEXP (note, 0); | |
1937 | if (n == NULL) | |
1938 | { | |
1939 | n = PATTERN (insn); | |
1940 | if (GET_CODE (n) == PARALLEL) | |
1941 | n = XVECEXP (n, 0, 0); | |
1942 | } | |
c746c5c3 | 1943 | dwarf2out_frame_debug_adjust_cfa (n); |
dcdf448e | 1944 | handled_one = true; |
1945 | break; | |
1946 | ||
1947 | case REG_CFA_OFFSET: | |
1948 | n = XEXP (note, 0); | |
1949 | if (n == NULL) | |
1950 | n = single_set (insn); | |
c746c5c3 | 1951 | dwarf2out_frame_debug_cfa_offset (n); |
dcdf448e | 1952 | handled_one = true; |
1953 | break; | |
1954 | ||
1955 | case REG_CFA_REGISTER: | |
1956 | n = XEXP (note, 0); | |
1957 | if (n == NULL) | |
1958 | { | |
1959 | n = PATTERN (insn); | |
1960 | if (GET_CODE (n) == PARALLEL) | |
1961 | n = XVECEXP (n, 0, 0); | |
1962 | } | |
c746c5c3 | 1963 | dwarf2out_frame_debug_cfa_register (n); |
dcdf448e | 1964 | handled_one = true; |
1965 | break; | |
1966 | ||
1967 | case REG_CFA_EXPRESSION: | |
1968 | n = XEXP (note, 0); | |
1969 | if (n == NULL) | |
1970 | n = single_set (insn); | |
c746c5c3 | 1971 | dwarf2out_frame_debug_cfa_expression (n); |
dcdf448e | 1972 | handled_one = true; |
1973 | break; | |
1974 | ||
1975 | case REG_CFA_RESTORE: | |
1976 | n = XEXP (note, 0); | |
1977 | if (n == NULL) | |
1978 | { | |
1979 | n = PATTERN (insn); | |
1980 | if (GET_CODE (n) == PARALLEL) | |
1981 | n = XVECEXP (n, 0, 0); | |
1982 | n = XEXP (n, 0); | |
1983 | } | |
c746c5c3 | 1984 | dwarf2out_frame_debug_cfa_restore (n); |
dcdf448e | 1985 | handled_one = true; |
1986 | break; | |
1987 | ||
1988 | case REG_CFA_SET_VDRAP: | |
1989 | n = XEXP (note, 0); | |
1990 | if (REG_P (n)) | |
1991 | { | |
6033bf11 | 1992 | dw_fde_ref fde = cfun->fde; |
dcdf448e | 1993 | if (fde) |
1994 | { | |
1995 | gcc_assert (fde->vdrap_reg == INVALID_REGNUM); | |
1996 | if (REG_P (n)) | |
559e966b | 1997 | fde->vdrap_reg = dwf_regno (n); |
dcdf448e | 1998 | } |
1999 | } | |
2000 | handled_one = true; | |
2001 | break; | |
2002 | ||
2003 | case REG_CFA_WINDOW_SAVE: | |
c746c5c3 | 2004 | dwarf2out_frame_debug_cfa_window_save (); |
dcdf448e | 2005 | handled_one = true; |
2006 | break; | |
2007 | ||
2008 | case REG_CFA_FLUSH_QUEUE: | |
637c318f | 2009 | /* The actual flush happens elsewhere. */ |
dcdf448e | 2010 | handled_one = true; |
2011 | break; | |
2012 | ||
2013 | default: | |
2014 | break; | |
2015 | } | |
2016 | ||
637c318f | 2017 | if (!handled_one) |
dcdf448e | 2018 | { |
2019 | insn = PATTERN (insn); | |
2020 | do_frame_expr: | |
c746c5c3 | 2021 | dwarf2out_frame_debug_expr (insn); |
dcdf448e | 2022 | |
2023 | /* Check again. A parallel can save and update the same register. | |
2024 | We could probably check just once, here, but this is safer than | |
2025 | removing the check at the start of the function. */ | |
637c318f | 2026 | if (clobbers_queued_reg_save (insn)) |
2027 | dwarf2out_flush_queued_reg_saves (); | |
dcdf448e | 2028 | } |
dcdf448e | 2029 | } |
2030 | ||
0b3b5cad | 2031 | /* Emit CFI info to change the state from OLD_ROW to NEW_ROW. */ |
2032 | ||
2033 | static void | |
1b1ea44c | 2034 | change_cfi_row (dw_cfi_row *old_row, dw_cfi_row *new_row) |
0b3b5cad | 2035 | { |
2036 | size_t i, n_old, n_new, n_max; | |
2037 | dw_cfi_ref cfi; | |
2038 | ||
2039 | if (new_row->cfa_cfi && !cfi_equal_p (old_row->cfa_cfi, new_row->cfa_cfi)) | |
2040 | add_cfi (new_row->cfa_cfi); | |
2041 | else | |
2042 | { | |
2043 | cfi = def_cfa_0 (&old_row->cfa, &new_row->cfa); | |
2044 | if (cfi) | |
2045 | add_cfi (cfi); | |
2046 | } | |
2047 | ||
f1f41a6c | 2048 | n_old = vec_safe_length (old_row->reg_save); |
2049 | n_new = vec_safe_length (new_row->reg_save); | |
0b3b5cad | 2050 | n_max = MAX (n_old, n_new); |
2051 | ||
2052 | for (i = 0; i < n_max; ++i) | |
2053 | { | |
2054 | dw_cfi_ref r_old = NULL, r_new = NULL; | |
2055 | ||
2056 | if (i < n_old) | |
f1f41a6c | 2057 | r_old = (*old_row->reg_save)[i]; |
0b3b5cad | 2058 | if (i < n_new) |
f1f41a6c | 2059 | r_new = (*new_row->reg_save)[i]; |
0b3b5cad | 2060 | |
2061 | if (r_old == r_new) | |
2062 | ; | |
2063 | else if (r_new == NULL) | |
2064 | add_cfi_restore (i); | |
2065 | else if (!cfi_equal_p (r_old, r_new)) | |
2066 | add_cfi (r_new); | |
2067 | } | |
2068 | } | |
2069 | ||
c746c5c3 | 2070 | /* Examine CFI and return true if a cfi label and set_loc is needed |
2071 | beforehand. Even when generating CFI assembler instructions, we | |
4a7a4715 | 2072 | still have to add the cfi to the list so that lookup_cfa_1 works |
c746c5c3 | 2073 | later on. When -g2 and above we even need to force emitting of |
2074 | CFI labels and add to list a DW_CFA_set_loc for convert_cfa_to_fb_loc_list | |
2075 | purposes. If we're generating DWARF3 output we use DW_OP_call_frame_cfa | |
2076 | and so don't use convert_cfa_to_fb_loc_list. */ | |
2077 | ||
2078 | static bool | |
2079 | cfi_label_required_p (dw_cfi_ref cfi) | |
2080 | { | |
2081 | if (!dwarf2out_do_cfi_asm ()) | |
2082 | return true; | |
2083 | ||
2084 | if (dwarf_version == 2 | |
2085 | && debug_info_level > DINFO_LEVEL_TERSE | |
2086 | && (write_symbols == DWARF2_DEBUG | |
2087 | || write_symbols == VMS_AND_DWARF2_DEBUG)) | |
2088 | { | |
2089 | switch (cfi->dw_cfi_opc) | |
2090 | { | |
2091 | case DW_CFA_def_cfa_offset: | |
2092 | case DW_CFA_def_cfa_offset_sf: | |
2093 | case DW_CFA_def_cfa_register: | |
2094 | case DW_CFA_def_cfa: | |
2095 | case DW_CFA_def_cfa_sf: | |
2096 | case DW_CFA_def_cfa_expression: | |
2097 | case DW_CFA_restore_state: | |
2098 | return true; | |
2099 | default: | |
2100 | return false; | |
2101 | } | |
2102 | } | |
2103 | return false; | |
2104 | } | |
2105 | ||
2106 | /* Walk the function, looking for NOTE_INSN_CFI notes. Add the CFIs to the | |
2107 | function's FDE, adding CFI labels and set_loc/advance_loc opcodes as | |
2108 | necessary. */ | |
2109 | static void | |
2110 | add_cfis_to_fde (void) | |
2111 | { | |
6033bf11 | 2112 | dw_fde_ref fde = cfun->fde; |
c746c5c3 | 2113 | rtx insn, next; |
2114 | /* We always start with a function_begin label. */ | |
2115 | bool first = false; | |
2116 | ||
2117 | for (insn = get_insns (); insn; insn = next) | |
2118 | { | |
2119 | next = NEXT_INSN (insn); | |
2120 | ||
2121 | if (NOTE_P (insn) && NOTE_KIND (insn) == NOTE_INSN_SWITCH_TEXT_SECTIONS) | |
2122 | { | |
f1f41a6c | 2123 | fde->dw_fde_switch_cfi_index = vec_safe_length (fde->dw_fde_cfi); |
c746c5c3 | 2124 | /* Don't attempt to advance_loc4 between labels |
2125 | in different sections. */ | |
2126 | first = true; | |
2127 | } | |
2128 | ||
2129 | if (NOTE_P (insn) && NOTE_KIND (insn) == NOTE_INSN_CFI) | |
2130 | { | |
2131 | bool required = cfi_label_required_p (NOTE_CFI (insn)); | |
08cc385a | 2132 | while (next) |
2133 | if (NOTE_P (next) && NOTE_KIND (next) == NOTE_INSN_CFI) | |
2134 | { | |
2135 | required |= cfi_label_required_p (NOTE_CFI (next)); | |
2136 | next = NEXT_INSN (next); | |
2137 | } | |
2138 | else if (active_insn_p (next) | |
2139 | || (NOTE_P (next) && (NOTE_KIND (next) | |
2140 | == NOTE_INSN_SWITCH_TEXT_SECTIONS))) | |
2141 | break; | |
2142 | else | |
c746c5c3 | 2143 | next = NEXT_INSN (next); |
c746c5c3 | 2144 | if (required) |
2145 | { | |
2146 | int num = dwarf2out_cfi_label_num; | |
2147 | const char *label = dwarf2out_cfi_label (); | |
2148 | dw_cfi_ref xcfi; | |
2149 | rtx tmp; | |
2150 | ||
2151 | /* Set the location counter to the new label. */ | |
2152 | xcfi = new_cfi (); | |
2153 | xcfi->dw_cfi_opc = (first ? DW_CFA_set_loc | |
2154 | : DW_CFA_advance_loc4); | |
2155 | xcfi->dw_cfi_oprnd1.dw_cfi_addr = label; | |
f1f41a6c | 2156 | vec_safe_push (fde->dw_fde_cfi, xcfi); |
c746c5c3 | 2157 | |
2158 | tmp = emit_note_before (NOTE_INSN_CFI_LABEL, insn); | |
2159 | NOTE_LABEL_NUMBER (tmp) = num; | |
2160 | } | |
2161 | ||
2162 | do | |
2163 | { | |
08cc385a | 2164 | if (NOTE_P (insn) && NOTE_KIND (insn) == NOTE_INSN_CFI) |
f1f41a6c | 2165 | vec_safe_push (fde->dw_fde_cfi, NOTE_CFI (insn)); |
c746c5c3 | 2166 | insn = NEXT_INSN (insn); |
2167 | } | |
2168 | while (insn != next); | |
2169 | first = false; | |
2170 | } | |
2171 | } | |
2172 | } | |
2173 | ||
97c251e4 | 2174 | /* If LABEL is the start of a trace, then initialize the state of that |
2175 | trace from CUR_TRACE and CUR_ROW. */ | |
b1613fc3 | 2176 | |
fe2dc6d6 | 2177 | static void |
dfe00a8f | 2178 | maybe_record_trace_start (rtx start, rtx origin) |
c746c5c3 | 2179 | { |
97c251e4 | 2180 | dw_trace_info *ti; |
dfe00a8f | 2181 | HOST_WIDE_INT args_size; |
97c251e4 | 2182 | |
2183 | ti = get_trace_info (start); | |
2184 | gcc_assert (ti != NULL); | |
dcdf448e | 2185 | |
97c251e4 | 2186 | if (dump_file) |
dcdf448e | 2187 | { |
97c251e4 | 2188 | fprintf (dump_file, " saw edge from trace %u to %u (via %s %d)\n", |
ce4a64fd | 2189 | cur_trace->id, ti->id, |
97c251e4 | 2190 | (origin ? rtx_name[(int) GET_CODE (origin)] : "fallthru"), |
2191 | (origin ? INSN_UID (origin) : 0)); | |
2192 | } | |
46346a52 | 2193 | |
dfe00a8f | 2194 | args_size = cur_trace->end_true_args_size; |
97c251e4 | 2195 | if (ti->beg_row == NULL) |
2196 | { | |
2197 | /* This is the first time we've encountered this trace. Propagate | |
2198 | state across the edge and push the trace onto the work list. */ | |
2199 | ti->beg_row = copy_cfi_row (cur_row); | |
dfe00a8f | 2200 | ti->beg_true_args_size = args_size; |
eb656671 | 2201 | |
97c251e4 | 2202 | ti->cfa_store = cur_trace->cfa_store; |
2203 | ti->cfa_temp = cur_trace->cfa_temp; | |
f1f41a6c | 2204 | ti->regs_saved_in_regs = cur_trace->regs_saved_in_regs.copy (); |
97c251e4 | 2205 | |
f1f41a6c | 2206 | trace_work_list.safe_push (ti); |
97c251e4 | 2207 | |
2208 | if (dump_file) | |
ce4a64fd | 2209 | fprintf (dump_file, "\tpush trace %u to worklist\n", ti->id); |
97c251e4 | 2210 | } |
2211 | else | |
2212 | { | |
dfe00a8f | 2213 | |
97c251e4 | 2214 | /* We ought to have the same state incoming to a given trace no |
2215 | matter how we arrive at the trace. Anything else means we've | |
2216 | got some kind of optimization error. */ | |
2217 | gcc_checking_assert (cfi_row_equal_p (cur_row, ti->beg_row)); | |
dfe00a8f | 2218 | |
2219 | /* The args_size is allowed to conflict if it isn't actually used. */ | |
2220 | if (ti->beg_true_args_size != args_size) | |
2221 | ti->args_size_undefined = true; | |
2222 | } | |
2223 | } | |
2224 | ||
2225 | /* Similarly, but handle the args_size and CFA reset across EH | |
2226 | and non-local goto edges. */ | |
2227 | ||
2228 | static void | |
2229 | maybe_record_trace_start_abnormal (rtx start, rtx origin) | |
2230 | { | |
2231 | HOST_WIDE_INT save_args_size, delta; | |
2232 | dw_cfa_location save_cfa; | |
2233 | ||
2234 | save_args_size = cur_trace->end_true_args_size; | |
2235 | if (save_args_size == 0) | |
2236 | { | |
2237 | maybe_record_trace_start (start, origin); | |
2238 | return; | |
2239 | } | |
2240 | ||
2241 | delta = -save_args_size; | |
2242 | cur_trace->end_true_args_size = 0; | |
2243 | ||
2244 | save_cfa = cur_row->cfa; | |
2245 | if (cur_row->cfa.reg == dw_stack_pointer_regnum) | |
2246 | { | |
2247 | /* Convert a change in args_size (always a positive in the | |
2248 | direction of stack growth) to a change in stack pointer. */ | |
2249 | #ifndef STACK_GROWS_DOWNWARD | |
2250 | delta = -delta; | |
2251 | #endif | |
2252 | cur_row->cfa.offset += delta; | |
97c251e4 | 2253 | } |
dfe00a8f | 2254 | |
2255 | maybe_record_trace_start (start, origin); | |
2256 | ||
2257 | cur_trace->end_true_args_size = save_args_size; | |
2258 | cur_row->cfa = save_cfa; | |
97c251e4 | 2259 | } |
a6b622eb | 2260 | |
97c251e4 | 2261 | /* Propagate CUR_TRACE state to the destinations implied by INSN. */ |
2262 | /* ??? Sadly, this is in large part a duplicate of make_edges. */ | |
2263 | ||
2264 | static void | |
2265 | create_trace_edges (rtx insn) | |
2266 | { | |
2267 | rtx tmp, lab; | |
2268 | int i, n; | |
2269 | ||
2270 | if (JUMP_P (insn)) | |
2271 | { | |
2272 | if (find_reg_note (insn, REG_NON_LOCAL_GOTO, NULL_RTX)) | |
dfe00a8f | 2273 | return; |
2274 | ||
2275 | if (tablejump_p (insn, NULL, &tmp)) | |
46346a52 | 2276 | { |
97c251e4 | 2277 | rtvec vec; |
46346a52 | 2278 | |
97c251e4 | 2279 | tmp = PATTERN (tmp); |
2280 | vec = XVEC (tmp, GET_CODE (tmp) == ADDR_DIFF_VEC); | |
2281 | ||
2282 | n = GET_NUM_ELEM (vec); | |
2283 | for (i = 0; i < n; ++i) | |
2284 | { | |
2285 | lab = XEXP (RTVEC_ELT (vec, i), 0); | |
dfe00a8f | 2286 | maybe_record_trace_start (lab, insn); |
97c251e4 | 2287 | } |
2288 | } | |
2289 | else if (computed_jump_p (insn)) | |
46346a52 | 2290 | { |
97c251e4 | 2291 | for (lab = forced_labels; lab; lab = XEXP (lab, 1)) |
dfe00a8f | 2292 | maybe_record_trace_start (XEXP (lab, 0), insn); |
97c251e4 | 2293 | } |
2294 | else if (returnjump_p (insn)) | |
2295 | ; | |
2296 | else if ((tmp = extract_asm_operands (PATTERN (insn))) != NULL) | |
2297 | { | |
2298 | n = ASM_OPERANDS_LABEL_LENGTH (tmp); | |
2299 | for (i = 0; i < n; ++i) | |
46346a52 | 2300 | { |
97c251e4 | 2301 | lab = XEXP (ASM_OPERANDS_LABEL (tmp, i), 0); |
dfe00a8f | 2302 | maybe_record_trace_start (lab, insn); |
97c251e4 | 2303 | } |
2304 | } | |
2305 | else | |
2306 | { | |
2307 | lab = JUMP_LABEL (insn); | |
2308 | gcc_assert (lab != NULL); | |
dfe00a8f | 2309 | maybe_record_trace_start (lab, insn); |
97c251e4 | 2310 | } |
2311 | } | |
2312 | else if (CALL_P (insn)) | |
2313 | { | |
2314 | /* Sibling calls don't have edges inside this function. */ | |
2315 | if (SIBLING_CALL_P (insn)) | |
2316 | return; | |
de9b0618 | 2317 | |
97c251e4 | 2318 | /* Process non-local goto edges. */ |
2319 | if (can_nonlocal_goto (insn)) | |
2320 | for (lab = nonlocal_goto_handler_labels; lab; lab = XEXP (lab, 1)) | |
dfe00a8f | 2321 | maybe_record_trace_start_abnormal (XEXP (lab, 0), insn); |
97c251e4 | 2322 | } |
ad5618b3 | 2323 | else if (GET_CODE (PATTERN (insn)) == SEQUENCE) |
2324 | { | |
2325 | rtx seq = PATTERN (insn); | |
2326 | int i, n = XVECLEN (seq, 0); | |
2327 | for (i = 0; i < n; ++i) | |
2328 | create_trace_edges (XVECEXP (seq, 0, i)); | |
2329 | return; | |
2330 | } | |
de9b0618 | 2331 | |
97c251e4 | 2332 | /* Process EH edges. */ |
2333 | if (CALL_P (insn) || cfun->can_throw_non_call_exceptions) | |
2334 | { | |
2335 | eh_landing_pad lp = get_eh_landing_pad_from_rtx (insn); | |
2336 | if (lp) | |
dfe00a8f | 2337 | maybe_record_trace_start_abnormal (lp->landing_pad, insn); |
97c251e4 | 2338 | } |
2339 | } | |
0b3b5cad | 2340 | |
4d256106 | 2341 | /* A subroutine of scan_trace. Do what needs to be done "after" INSN. */ |
2342 | ||
2343 | static void | |
2344 | scan_insn_after (rtx insn) | |
2345 | { | |
2346 | if (RTX_FRAME_RELATED_P (insn)) | |
2347 | dwarf2out_frame_debug (insn); | |
2348 | notice_args_size (insn); | |
2349 | } | |
2350 | ||
97c251e4 | 2351 | /* Scan the trace beginning at INSN and create the CFI notes for the |
2352 | instructions therein. */ | |
2353 | ||
2354 | static void | |
2355 | scan_trace (dw_trace_info *trace) | |
2356 | { | |
4d256106 | 2357 | rtx prev, insn = trace->head; |
dfe00a8f | 2358 | dw_cfa_location this_cfa; |
97c251e4 | 2359 | |
2360 | if (dump_file) | |
2361 | fprintf (dump_file, "Processing trace %u : start at %s %d\n", | |
ce4a64fd | 2362 | trace->id, rtx_name[(int) GET_CODE (insn)], |
97c251e4 | 2363 | INSN_UID (insn)); |
2364 | ||
2365 | trace->end_row = copy_cfi_row (trace->beg_row); | |
dfe00a8f | 2366 | trace->end_true_args_size = trace->beg_true_args_size; |
97c251e4 | 2367 | |
2368 | cur_trace = trace; | |
2369 | cur_row = trace->end_row; | |
dfe00a8f | 2370 | |
2371 | this_cfa = cur_row->cfa; | |
2372 | cur_cfa = &this_cfa; | |
97c251e4 | 2373 | |
4d256106 | 2374 | for (prev = insn, insn = NEXT_INSN (insn); |
2375 | insn; | |
2376 | prev = insn, insn = NEXT_INSN (insn)) | |
97c251e4 | 2377 | { |
4d256106 | 2378 | rtx control; |
2379 | ||
dfe00a8f | 2380 | /* Do everything that happens "before" the insn. */ |
4d256106 | 2381 | add_cfi_insn = prev; |
97c251e4 | 2382 | |
2383 | /* Notice the end of a trace. */ | |
dfe00a8f | 2384 | if (BARRIER_P (insn)) |
2385 | { | |
2386 | /* Don't bother saving the unneeded queued registers at all. */ | |
f1f41a6c | 2387 | queued_reg_saves.truncate (0); |
dfe00a8f | 2388 | break; |
2389 | } | |
2390 | if (save_point_p (insn)) | |
97c251e4 | 2391 | { |
97c251e4 | 2392 | /* Propagate across fallthru edges. */ |
dfe00a8f | 2393 | dwarf2out_flush_queued_reg_saves (); |
2394 | maybe_record_trace_start (insn, NULL); | |
97c251e4 | 2395 | break; |
46346a52 | 2396 | } |
2397 | ||
97c251e4 | 2398 | if (DEBUG_INSN_P (insn) || !inside_basic_block_p (insn)) |
46346a52 | 2399 | continue; |
2400 | ||
4d256106 | 2401 | /* Handle all changes to the row state. Sequences require special |
2402 | handling for the positioning of the notes. */ | |
dfe00a8f | 2403 | if (GET_CODE (PATTERN (insn)) == SEQUENCE) |
46346a52 | 2404 | { |
dfe00a8f | 2405 | rtx elt, pat = PATTERN (insn); |
2406 | int i, n = XVECLEN (pat, 0); | |
2407 | ||
4d256106 | 2408 | control = XVECEXP (pat, 0, 0); |
2409 | if (can_throw_internal (control)) | |
2410 | notice_eh_throw (control); | |
2411 | dwarf2out_flush_queued_reg_saves (); | |
2412 | ||
7e66a69e | 2413 | if (JUMP_P (control) && INSN_ANNULLED_BRANCH_P (control)) |
97c251e4 | 2414 | { |
dfe00a8f | 2415 | /* ??? Hopefully multiple delay slots are not annulled. */ |
2416 | gcc_assert (n == 2); | |
4d256106 | 2417 | gcc_assert (!RTX_FRAME_RELATED_P (control)); |
2418 | gcc_assert (!find_reg_note (control, REG_ARGS_SIZE, NULL)); | |
2419 | ||
dfe00a8f | 2420 | elt = XVECEXP (pat, 0, 1); |
2421 | ||
dfe00a8f | 2422 | if (INSN_FROM_TARGET_P (elt)) |
2423 | { | |
2424 | HOST_WIDE_INT restore_args_size; | |
e2ab608c | 2425 | cfi_vec save_row_reg_save; |
97c251e4 | 2426 | |
dfed30bc | 2427 | /* If ELT is an instruction from target of an annulled |
2428 | branch, the effects are for the target only and so | |
2429 | the args_size and CFA along the current path | |
2430 | shouldn't change. */ | |
4d256106 | 2431 | add_cfi_insn = NULL; |
dfe00a8f | 2432 | restore_args_size = cur_trace->end_true_args_size; |
2433 | cur_cfa = &cur_row->cfa; | |
f1f41a6c | 2434 | save_row_reg_save = vec_safe_copy (cur_row->reg_save); |
46346a52 | 2435 | |
4d256106 | 2436 | scan_insn_after (elt); |
2437 | ||
2438 | /* ??? Should we instead save the entire row state? */ | |
f1f41a6c | 2439 | gcc_assert (!queued_reg_saves.length ()); |
4d256106 | 2440 | |
2441 | create_trace_edges (control); | |
46346a52 | 2442 | |
dfe00a8f | 2443 | cur_trace->end_true_args_size = restore_args_size; |
2444 | cur_row->cfa = this_cfa; | |
e2ab608c | 2445 | cur_row->reg_save = save_row_reg_save; |
dfe00a8f | 2446 | cur_cfa = &this_cfa; |
dfe00a8f | 2447 | } |
dfed30bc | 2448 | else |
2449 | { | |
2450 | /* If ELT is a annulled branch-taken instruction (i.e. | |
2451 | executed only when branch is not taken), the args_size | |
2452 | and CFA should not change through the jump. */ | |
2453 | create_trace_edges (control); | |
2454 | ||
2455 | /* Update and continue with the trace. */ | |
2456 | add_cfi_insn = insn; | |
2457 | scan_insn_after (elt); | |
2458 | def_cfa_1 (&this_cfa); | |
2459 | } | |
2460 | continue; | |
dfe00a8f | 2461 | } |
2462 | ||
4d256106 | 2463 | /* The insns in the delay slot should all be considered to happen |
2464 | "before" a call insn. Consider a call with a stack pointer | |
2465 | adjustment in the delay slot. The backtrace from the callee | |
2466 | should include the sp adjustment. Unfortunately, that leaves | |
2467 | us with an unavoidable unwinding error exactly at the call insn | |
2468 | itself. For jump insns we'd prefer to avoid this error by | |
2469 | placing the notes after the sequence. */ | |
2470 | if (JUMP_P (control)) | |
2471 | add_cfi_insn = insn; | |
2472 | ||
dfe00a8f | 2473 | for (i = 1; i < n; ++i) |
2474 | { | |
2475 | elt = XVECEXP (pat, 0, i); | |
4d256106 | 2476 | scan_insn_after (elt); |
dfe00a8f | 2477 | } |
4d256106 | 2478 | |
2479 | /* Make sure any register saves are visible at the jump target. */ | |
2480 | dwarf2out_flush_queued_reg_saves (); | |
637c318f | 2481 | any_cfis_emitted = false; |
4d256106 | 2482 | |
2483 | /* However, if there is some adjustment on the call itself, e.g. | |
2484 | a call_pop, that action should be considered to happen after | |
2485 | the call returns. */ | |
2486 | add_cfi_insn = insn; | |
2487 | scan_insn_after (control); | |
97c251e4 | 2488 | } |
dfe00a8f | 2489 | else |
4d256106 | 2490 | { |
2491 | /* Flush data before calls and jumps, and of course if necessary. */ | |
2492 | if (can_throw_internal (insn)) | |
2493 | { | |
2494 | notice_eh_throw (insn); | |
2495 | dwarf2out_flush_queued_reg_saves (); | |
2496 | } | |
2497 | else if (!NONJUMP_INSN_P (insn) | |
2498 | || clobbers_queued_reg_save (insn) | |
2499 | || find_reg_note (insn, REG_CFA_FLUSH_QUEUE, NULL)) | |
2500 | dwarf2out_flush_queued_reg_saves (); | |
637c318f | 2501 | any_cfis_emitted = false; |
4d256106 | 2502 | |
2503 | add_cfi_insn = insn; | |
2504 | scan_insn_after (insn); | |
2505 | control = insn; | |
2506 | } | |
dfe00a8f | 2507 | |
2508 | /* Between frame-related-p and args_size we might have otherwise | |
2509 | emitted two cfa adjustments. Do it now. */ | |
2510 | def_cfa_1 (&this_cfa); | |
a6b622eb | 2511 | |
637c318f | 2512 | /* Minimize the number of advances by emitting the entire queue |
2513 | once anything is emitted. */ | |
2514 | if (any_cfis_emitted | |
2515 | || find_reg_note (insn, REG_CFA_FLUSH_QUEUE, NULL)) | |
2516 | dwarf2out_flush_queued_reg_saves (); | |
2517 | ||
97c251e4 | 2518 | /* Note that a test for control_flow_insn_p does exactly the |
2519 | same tests as are done to actually create the edges. So | |
2520 | always call the routine and let it not create edges for | |
2521 | non-control-flow insns. */ | |
4d256106 | 2522 | create_trace_edges (control); |
dcdf448e | 2523 | } |
a6b622eb | 2524 | |
7b1c31a0 | 2525 | add_cfi_insn = NULL; |
97c251e4 | 2526 | cur_row = NULL; |
2527 | cur_trace = NULL; | |
dfe00a8f | 2528 | cur_cfa = NULL; |
dcdf448e | 2529 | } |
2530 | ||
97c251e4 | 2531 | /* Scan the function and create the initial set of CFI notes. */ |
dcdf448e | 2532 | |
46346a52 | 2533 | static void |
97c251e4 | 2534 | create_cfi_notes (void) |
dcdf448e | 2535 | { |
97c251e4 | 2536 | dw_trace_info *ti; |
dcdf448e | 2537 | |
f1f41a6c | 2538 | gcc_checking_assert (!queued_reg_saves.exists ()); |
2539 | gcc_checking_assert (!trace_work_list.exists ()); | |
dcdf448e | 2540 | |
97c251e4 | 2541 | /* Always begin at the entry trace. */ |
f1f41a6c | 2542 | ti = &trace_info[0]; |
97c251e4 | 2543 | scan_trace (ti); |
dcdf448e | 2544 | |
f1f41a6c | 2545 | while (!trace_work_list.is_empty ()) |
97c251e4 | 2546 | { |
f1f41a6c | 2547 | ti = trace_work_list.pop (); |
97c251e4 | 2548 | scan_trace (ti); |
dcdf448e | 2549 | } |
2550 | ||
f1f41a6c | 2551 | queued_reg_saves.release (); |
2552 | trace_work_list.release (); | |
97c251e4 | 2553 | } |
dcdf448e | 2554 | |
ce4a64fd | 2555 | /* Return the insn before the first NOTE_INSN_CFI after START. */ |
2556 | ||
2557 | static rtx | |
2558 | before_next_cfi_note (rtx start) | |
2559 | { | |
2560 | rtx prev = start; | |
2561 | while (start) | |
2562 | { | |
2563 | if (NOTE_P (start) && NOTE_KIND (start) == NOTE_INSN_CFI) | |
2564 | return prev; | |
2565 | prev = start; | |
2566 | start = NEXT_INSN (start); | |
2567 | } | |
2568 | gcc_unreachable (); | |
2569 | } | |
2570 | ||
97c251e4 | 2571 | /* Insert CFI notes between traces to properly change state between them. */ |
dcdf448e | 2572 | |
97c251e4 | 2573 | static void |
2574 | connect_traces (void) | |
2575 | { | |
f1f41a6c | 2576 | unsigned i, n = trace_info.length (); |
97c251e4 | 2577 | dw_trace_info *prev_ti, *ti; |
2578 | ||
ce4a64fd | 2579 | /* ??? Ideally, we should have both queued and processed every trace. |
2580 | However the current representation of constant pools on various targets | |
2581 | is indistinguishable from unreachable code. Assume for the moment that | |
2582 | we can simply skip over such traces. */ | |
2583 | /* ??? Consider creating a DATA_INSN rtx code to indicate that | |
2584 | these are not "real" instructions, and should not be considered. | |
2585 | This could be generically useful for tablejump data as well. */ | |
2586 | /* Remove all unprocessed traces from the list. */ | |
2587 | for (i = n - 1; i > 0; --i) | |
2588 | { | |
f1f41a6c | 2589 | ti = &trace_info[i]; |
ce4a64fd | 2590 | if (ti->beg_row == NULL) |
2591 | { | |
f1f41a6c | 2592 | trace_info.ordered_remove (i); |
ce4a64fd | 2593 | n -= 1; |
2594 | } | |
2595 | else | |
2596 | gcc_assert (ti->end_row != NULL); | |
2597 | } | |
97c251e4 | 2598 | |
ce4a64fd | 2599 | /* Work from the end back to the beginning. This lets us easily insert |
2600 | remember/restore_state notes in the correct order wrt other notes. */ | |
f1f41a6c | 2601 | prev_ti = &trace_info[n - 1]; |
ce4a64fd | 2602 | for (i = n - 1; i > 0; --i) |
dcdf448e | 2603 | { |
97c251e4 | 2604 | dw_cfi_row *old_row; |
dcdf448e | 2605 | |
ce4a64fd | 2606 | ti = prev_ti; |
f1f41a6c | 2607 | prev_ti = &trace_info[i - 1]; |
dcdf448e | 2608 | |
ce4a64fd | 2609 | add_cfi_insn = ti->head; |
97c251e4 | 2610 | |
2611 | /* In dwarf2out_switch_text_section, we'll begin a new FDE | |
2612 | for the portion of the function in the alternate text | |
2613 | section. The row state at the very beginning of that | |
2614 | new FDE will be exactly the row state from the CIE. */ | |
2615 | if (ti->switch_sections) | |
2616 | old_row = cie_cfi_row; | |
2617 | else | |
ce4a64fd | 2618 | { |
2619 | old_row = prev_ti->end_row; | |
2620 | /* If there's no change from the previous end state, fine. */ | |
2621 | if (cfi_row_equal_p (old_row, ti->beg_row)) | |
2622 | ; | |
2623 | /* Otherwise check for the common case of sharing state with | |
2624 | the beginning of an epilogue, but not the end. Insert | |
2625 | remember/restore opcodes in that case. */ | |
2626 | else if (cfi_row_equal_p (prev_ti->beg_row, ti->beg_row)) | |
2627 | { | |
2628 | dw_cfi_ref cfi; | |
2629 | ||
2630 | /* Note that if we blindly insert the remember at the | |
2631 | start of the trace, we can wind up increasing the | |
2632 | size of the unwind info due to extra advance opcodes. | |
2633 | Instead, put the remember immediately before the next | |
2634 | state change. We know there must be one, because the | |
2635 | state at the beginning and head of the trace differ. */ | |
2636 | add_cfi_insn = before_next_cfi_note (prev_ti->head); | |
2637 | cfi = new_cfi (); | |
2638 | cfi->dw_cfi_opc = DW_CFA_remember_state; | |
2639 | add_cfi (cfi); | |
2640 | ||
2641 | add_cfi_insn = ti->head; | |
2642 | cfi = new_cfi (); | |
2643 | cfi->dw_cfi_opc = DW_CFA_restore_state; | |
2644 | add_cfi (cfi); | |
2645 | ||
2646 | old_row = prev_ti->beg_row; | |
2647 | } | |
2648 | /* Otherwise, we'll simply change state from the previous end. */ | |
2649 | } | |
97c251e4 | 2650 | |
97c251e4 | 2651 | change_cfi_row (old_row, ti->beg_row); |
2652 | ||
2653 | if (dump_file && add_cfi_insn != ti->head) | |
2654 | { | |
2655 | rtx note; | |
2656 | ||
ce4a64fd | 2657 | fprintf (dump_file, "Fixup between trace %u and %u:\n", |
2658 | prev_ti->id, ti->id); | |
97c251e4 | 2659 | |
2660 | note = ti->head; | |
2661 | do | |
2662 | { | |
2663 | note = NEXT_INSN (note); | |
2664 | gcc_assert (NOTE_P (note) && NOTE_KIND (note) == NOTE_INSN_CFI); | |
2665 | output_cfi_directive (dump_file, NOTE_CFI (note)); | |
2666 | } | |
2667 | while (note != add_cfi_insn); | |
2668 | } | |
2669 | } | |
dfe00a8f | 2670 | |
2671 | /* Connect args_size between traces that have can_throw_internal insns. */ | |
f1f41a6c | 2672 | if (cfun->eh->lp_array) |
dfe00a8f | 2673 | { |
2674 | HOST_WIDE_INT prev_args_size = 0; | |
2675 | ||
2676 | for (i = 0; i < n; ++i) | |
2677 | { | |
f1f41a6c | 2678 | ti = &trace_info[i]; |
dfe00a8f | 2679 | |
2680 | if (ti->switch_sections) | |
2681 | prev_args_size = 0; | |
2682 | if (ti->eh_head == NULL) | |
2683 | continue; | |
2684 | gcc_assert (!ti->args_size_undefined); | |
2685 | ||
2686 | if (ti->beg_delay_args_size != prev_args_size) | |
2687 | { | |
2688 | /* ??? Search back to previous CFI note. */ | |
2689 | add_cfi_insn = PREV_INSN (ti->eh_head); | |
2690 | add_cfi_args_size (ti->beg_delay_args_size); | |
2691 | } | |
2692 | ||
2693 | prev_args_size = ti->end_delay_args_size; | |
2694 | } | |
2695 | } | |
dcdf448e | 2696 | } |
2697 | ||
97c251e4 | 2698 | /* Set up the pseudo-cfg of instruction traces, as described at the |
2699 | block comment at the top of the file. */ | |
dcdf448e | 2700 | |
46346a52 | 2701 | static void |
97c251e4 | 2702 | create_pseudo_cfg (void) |
dcdf448e | 2703 | { |
97c251e4 | 2704 | bool saw_barrier, switch_sections; |
e82e4eb5 | 2705 | dw_trace_info ti; |
97c251e4 | 2706 | rtx insn; |
2707 | unsigned i; | |
2708 | ||
2709 | /* The first trace begins at the start of the function, | |
2710 | and begins with the CIE row state. */ | |
f1f41a6c | 2711 | trace_info.create (16); |
e82e4eb5 | 2712 | memset (&ti, 0, sizeof (ti)); |
2713 | ti.head = get_insns (); | |
2714 | ti.beg_row = cie_cfi_row; | |
2715 | ti.cfa_store = cie_cfi_row->cfa; | |
2716 | ti.cfa_temp.reg = INVALID_REGNUM; | |
f1f41a6c | 2717 | trace_info.quick_push (ti); |
97c251e4 | 2718 | |
97c251e4 | 2719 | if (cie_return_save) |
f1f41a6c | 2720 | ti.regs_saved_in_regs.safe_push (*cie_return_save); |
dcdf448e | 2721 | |
97c251e4 | 2722 | /* Walk all the insns, collecting start of trace locations. */ |
2723 | saw_barrier = false; | |
2724 | switch_sections = false; | |
2725 | for (insn = get_insns (); insn; insn = NEXT_INSN (insn)) | |
2726 | { | |
2727 | if (BARRIER_P (insn)) | |
2728 | saw_barrier = true; | |
2729 | else if (NOTE_P (insn) | |
2730 | && NOTE_KIND (insn) == NOTE_INSN_SWITCH_TEXT_SECTIONS) | |
2731 | { | |
2732 | /* We should have just seen a barrier. */ | |
2733 | gcc_assert (saw_barrier); | |
2734 | switch_sections = true; | |
2735 | } | |
2736 | /* Watch out for save_point notes between basic blocks. | |
2737 | In particular, a note after a barrier. Do not record these, | |
2738 | delaying trace creation until the label. */ | |
2739 | else if (save_point_p (insn) | |
2740 | && (LABEL_P (insn) || !saw_barrier)) | |
2741 | { | |
e82e4eb5 | 2742 | memset (&ti, 0, sizeof (ti)); |
2743 | ti.head = insn; | |
2744 | ti.switch_sections = switch_sections; | |
f1f41a6c | 2745 | ti.id = trace_info.length () - 1; |
2746 | trace_info.safe_push (ti); | |
97c251e4 | 2747 | |
2748 | saw_barrier = false; | |
2749 | switch_sections = false; | |
2750 | } | |
2751 | } | |
2752 | ||
2753 | /* Create the trace index after we've finished building trace_info, | |
2754 | avoiding stale pointer problems due to reallocation. */ | |
d9dd21a8 | 2755 | trace_index.create (trace_info.length ()); |
e82e4eb5 | 2756 | dw_trace_info *tp; |
f1f41a6c | 2757 | FOR_EACH_VEC_ELT (trace_info, i, tp) |
97c251e4 | 2758 | { |
d9dd21a8 | 2759 | dw_trace_info **slot; |
dcdf448e | 2760 | |
97c251e4 | 2761 | if (dump_file) |
2762 | fprintf (dump_file, "Creating trace %u : start at %s %d%s\n", i, | |
e82e4eb5 | 2763 | rtx_name[(int) GET_CODE (tp->head)], INSN_UID (tp->head), |
2764 | tp->switch_sections ? " (section switch)" : ""); | |
97c251e4 | 2765 | |
d9dd21a8 | 2766 | slot = trace_index.find_slot_with_hash (tp, INSN_UID (tp->head), INSERT); |
97c251e4 | 2767 | gcc_assert (*slot == NULL); |
d9dd21a8 | 2768 | *slot = tp; |
97c251e4 | 2769 | } |
dcdf448e | 2770 | } |
97c251e4 | 2771 | |
6ca363a7 | 2772 | /* Record the initial position of the return address. RTL is |
2773 | INCOMING_RETURN_ADDR_RTX. */ | |
2774 | ||
2775 | static void | |
2776 | initial_return_save (rtx rtl) | |
2777 | { | |
2778 | unsigned int reg = INVALID_REGNUM; | |
2779 | HOST_WIDE_INT offset = 0; | |
2780 | ||
2781 | switch (GET_CODE (rtl)) | |
2782 | { | |
2783 | case REG: | |
2784 | /* RA is in a register. */ | |
559e966b | 2785 | reg = dwf_regno (rtl); |
6ca363a7 | 2786 | break; |
2787 | ||
2788 | case MEM: | |
2789 | /* RA is on the stack. */ | |
2790 | rtl = XEXP (rtl, 0); | |
2791 | switch (GET_CODE (rtl)) | |
2792 | { | |
2793 | case REG: | |
2794 | gcc_assert (REGNO (rtl) == STACK_POINTER_REGNUM); | |
2795 | offset = 0; | |
2796 | break; | |
2797 | ||
2798 | case PLUS: | |
2799 | gcc_assert (REGNO (XEXP (rtl, 0)) == STACK_POINTER_REGNUM); | |
2800 | offset = INTVAL (XEXP (rtl, 1)); | |
2801 | break; | |
2802 | ||
2803 | case MINUS: | |
2804 | gcc_assert (REGNO (XEXP (rtl, 0)) == STACK_POINTER_REGNUM); | |
2805 | offset = -INTVAL (XEXP (rtl, 1)); | |
2806 | break; | |
2807 | ||
2808 | default: | |
2809 | gcc_unreachable (); | |
2810 | } | |
2811 | ||
2812 | break; | |
2813 | ||
2814 | case PLUS: | |
2815 | /* The return address is at some offset from any value we can | |
2816 | actually load. For instance, on the SPARC it is in %i7+8. Just | |
2817 | ignore the offset for now; it doesn't matter for unwinding frames. */ | |
2818 | gcc_assert (CONST_INT_P (XEXP (rtl, 1))); | |
2819 | initial_return_save (XEXP (rtl, 0)); | |
2820 | return; | |
2821 | ||
2822 | default: | |
2823 | gcc_unreachable (); | |
2824 | } | |
2825 | ||
2826 | if (reg != DWARF_FRAME_RETURN_COLUMN) | |
2827 | { | |
2828 | if (reg != INVALID_REGNUM) | |
2829 | record_reg_saved_in_reg (rtl, pc_rtx); | |
eb93b3f4 | 2830 | reg_save (DWARF_FRAME_RETURN_COLUMN, reg, offset - cur_row->cfa.offset); |
6ca363a7 | 2831 | } |
2832 | } | |
dcdf448e | 2833 | |
b1613fc3 | 2834 | static void |
2835 | create_cie_data (void) | |
2836 | { | |
2837 | dw_cfa_location loc; | |
2838 | dw_trace_info cie_trace; | |
2839 | ||
2840 | dw_stack_pointer_regnum = DWARF_FRAME_REGNUM (STACK_POINTER_REGNUM); | |
2841 | dw_frame_pointer_regnum = DWARF_FRAME_REGNUM (HARD_FRAME_POINTER_REGNUM); | |
2842 | ||
2843 | memset (&cie_trace, 0, sizeof(cie_trace)); | |
2844 | cur_trace = &cie_trace; | |
2845 | ||
2846 | add_cfi_vec = &cie_cfi_vec; | |
2847 | cie_cfi_row = cur_row = new_cfi_row (); | |
2848 | ||
2849 | /* On entry, the Canonical Frame Address is at SP. */ | |
2850 | memset(&loc, 0, sizeof (loc)); | |
2851 | loc.reg = dw_stack_pointer_regnum; | |
2852 | loc.offset = INCOMING_FRAME_SP_OFFSET; | |
2853 | def_cfa_1 (&loc); | |
2854 | ||
2855 | if (targetm.debug_unwind_info () == UI_DWARF2 | |
2856 | || targetm_common.except_unwind_info (&global_options) == UI_DWARF2) | |
2857 | { | |
2858 | initial_return_save (INCOMING_RETURN_ADDR_RTX); | |
2859 | ||
2860 | /* For a few targets, we have the return address incoming into a | |
2861 | register, but choose a different return column. This will result | |
2862 | in a DW_CFA_register for the return, and an entry in | |
2863 | regs_saved_in_regs to match. If the target later stores that | |
2864 | return address register to the stack, we want to be able to emit | |
2865 | the DW_CFA_offset against the return column, not the intermediate | |
2866 | save register. Save the contents of regs_saved_in_regs so that | |
2867 | we can re-initialize it at the start of each function. */ | |
f1f41a6c | 2868 | switch (cie_trace.regs_saved_in_regs.length ()) |
b1613fc3 | 2869 | { |
2870 | case 0: | |
2871 | break; | |
2872 | case 1: | |
2873 | cie_return_save = ggc_alloc_reg_saved_in_data (); | |
f1f41a6c | 2874 | *cie_return_save = cie_trace.regs_saved_in_regs[0]; |
2875 | cie_trace.regs_saved_in_regs.release (); | |
b1613fc3 | 2876 | break; |
2877 | default: | |
2878 | gcc_unreachable (); | |
2879 | } | |
2880 | } | |
2881 | ||
2882 | add_cfi_vec = NULL; | |
2883 | cur_row = NULL; | |
2884 | cur_trace = NULL; | |
2885 | } | |
2886 | ||
fe2dc6d6 | 2887 | /* Annotate the function with NOTE_INSN_CFI notes to record the CFI |
2888 | state at each location within the function. These notes will be | |
2889 | emitted during pass_final. */ | |
dcdf448e | 2890 | |
fe2dc6d6 | 2891 | static unsigned int |
2892 | execute_dwarf2_frame (void) | |
dcdf448e | 2893 | { |
fe2dc6d6 | 2894 | /* The first time we're called, compute the incoming frame state. */ |
2895 | if (cie_cfi_vec == NULL) | |
b1613fc3 | 2896 | create_cie_data (); |
d4898332 | 2897 | |
fe2dc6d6 | 2898 | dwarf2out_alloc_current_fde (); |
2899 | ||
97c251e4 | 2900 | create_pseudo_cfg (); |
2901 | ||
fe2dc6d6 | 2902 | /* Do the work. */ |
2903 | create_cfi_notes (); | |
97c251e4 | 2904 | connect_traces (); |
fe2dc6d6 | 2905 | add_cfis_to_fde (); |
2906 | ||
97c251e4 | 2907 | /* Free all the data we allocated. */ |
2908 | { | |
2909 | size_t i; | |
2910 | dw_trace_info *ti; | |
dcdf448e | 2911 | |
f1f41a6c | 2912 | FOR_EACH_VEC_ELT (trace_info, i, ti) |
2913 | ti->regs_saved_in_regs.release (); | |
97c251e4 | 2914 | } |
f1f41a6c | 2915 | trace_info.release (); |
97c251e4 | 2916 | |
d9dd21a8 | 2917 | trace_index.dispose (); |
eb93b3f4 | 2918 | |
fe2dc6d6 | 2919 | return 0; |
dcdf448e | 2920 | } |
2921 | \f | |
04dfc41a | 2922 | /* Convert a DWARF call frame info. operation to its string name */ |
2923 | ||
2924 | static const char * | |
2925 | dwarf_cfi_name (unsigned int cfi_opc) | |
2926 | { | |
c9f46599 | 2927 | const char *name = get_DW_CFA_name (cfi_opc); |
04dfc41a | 2928 | |
c9f46599 | 2929 | if (name != NULL) |
2930 | return name; | |
04dfc41a | 2931 | |
c9f46599 | 2932 | return "DW_CFA_<unknown>"; |
04dfc41a | 2933 | } |
2934 | ||
2935 | /* This routine will generate the correct assembly data for a location | |
2936 | description based on a cfi entry with a complex address. */ | |
2937 | ||
2938 | static void | |
2939 | output_cfa_loc (dw_cfi_ref cfi, int for_eh) | |
2940 | { | |
2941 | dw_loc_descr_ref loc; | |
2942 | unsigned long size; | |
2943 | ||
2944 | if (cfi->dw_cfi_opc == DW_CFA_expression) | |
2945 | { | |
b1613fc3 | 2946 | unsigned r = |
04dfc41a | 2947 | DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, for_eh); |
2948 | dw2_asm_output_data (1, r, NULL); | |
2949 | loc = cfi->dw_cfi_oprnd2.dw_cfi_loc; | |
2950 | } | |
2951 | else | |
2952 | loc = cfi->dw_cfi_oprnd1.dw_cfi_loc; | |
2953 | ||
2954 | /* Output the size of the block. */ | |
2955 | size = size_of_locs (loc); | |
2956 | dw2_asm_output_data_uleb128 (size, NULL); | |
2957 | ||
2958 | /* Now output the operations themselves. */ | |
2959 | output_loc_sequence (loc, for_eh); | |
2960 | } | |
2961 | ||
2962 | /* Similar, but used for .cfi_escape. */ | |
2963 | ||
2964 | static void | |
2965 | output_cfa_loc_raw (dw_cfi_ref cfi) | |
2966 | { | |
2967 | dw_loc_descr_ref loc; | |
2968 | unsigned long size; | |
2969 | ||
2970 | if (cfi->dw_cfi_opc == DW_CFA_expression) | |
2971 | { | |
b1613fc3 | 2972 | unsigned r = |
04dfc41a | 2973 | DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, 1); |
2974 | fprintf (asm_out_file, "%#x,", r); | |
2975 | loc = cfi->dw_cfi_oprnd2.dw_cfi_loc; | |
2976 | } | |
2977 | else | |
2978 | loc = cfi->dw_cfi_oprnd1.dw_cfi_loc; | |
2979 | ||
2980 | /* Output the size of the block. */ | |
2981 | size = size_of_locs (loc); | |
2982 | dw2_asm_output_data_uleb128_raw (size); | |
2983 | fputc (',', asm_out_file); | |
2984 | ||
2985 | /* Now output the operations themselves. */ | |
2986 | output_loc_sequence_raw (loc); | |
2987 | } | |
2988 | ||
2989 | /* Output a Call Frame Information opcode and its operand(s). */ | |
2990 | ||
2991 | void | |
2992 | output_cfi (dw_cfi_ref cfi, dw_fde_ref fde, int for_eh) | |
2993 | { | |
2994 | unsigned long r; | |
2995 | HOST_WIDE_INT off; | |
2996 | ||
2997 | if (cfi->dw_cfi_opc == DW_CFA_advance_loc) | |
2998 | dw2_asm_output_data (1, (cfi->dw_cfi_opc | |
2999 | | (cfi->dw_cfi_oprnd1.dw_cfi_offset & 0x3f)), | |
3000 | "DW_CFA_advance_loc " HOST_WIDE_INT_PRINT_HEX, | |
3001 | ((unsigned HOST_WIDE_INT) | |
3002 | cfi->dw_cfi_oprnd1.dw_cfi_offset)); | |
3003 | else if (cfi->dw_cfi_opc == DW_CFA_offset) | |
3004 | { | |
3005 | r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, for_eh); | |
3006 | dw2_asm_output_data (1, (cfi->dw_cfi_opc | (r & 0x3f)), | |
3007 | "DW_CFA_offset, column %#lx", r); | |
3008 | off = div_data_align (cfi->dw_cfi_oprnd2.dw_cfi_offset); | |
3009 | dw2_asm_output_data_uleb128 (off, NULL); | |
3010 | } | |
3011 | else if (cfi->dw_cfi_opc == DW_CFA_restore) | |
3012 | { | |
3013 | r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, for_eh); | |
3014 | dw2_asm_output_data (1, (cfi->dw_cfi_opc | (r & 0x3f)), | |
3015 | "DW_CFA_restore, column %#lx", r); | |
3016 | } | |
3017 | else | |
3018 | { | |
3019 | dw2_asm_output_data (1, cfi->dw_cfi_opc, | |
3020 | "%s", dwarf_cfi_name (cfi->dw_cfi_opc)); | |
3021 | ||
3022 | switch (cfi->dw_cfi_opc) | |
3023 | { | |
3024 | case DW_CFA_set_loc: | |
3025 | if (for_eh) | |
3026 | dw2_asm_output_encoded_addr_rtx ( | |
3027 | ASM_PREFERRED_EH_DATA_FORMAT (/*code=*/1, /*global=*/0), | |
3028 | gen_rtx_SYMBOL_REF (Pmode, cfi->dw_cfi_oprnd1.dw_cfi_addr), | |
3029 | false, NULL); | |
3030 | else | |
3031 | dw2_asm_output_addr (DWARF2_ADDR_SIZE, | |
3032 | cfi->dw_cfi_oprnd1.dw_cfi_addr, NULL); | |
3033 | fde->dw_fde_current_label = cfi->dw_cfi_oprnd1.dw_cfi_addr; | |
3034 | break; | |
3035 | ||
3036 | case DW_CFA_advance_loc1: | |
3037 | dw2_asm_output_delta (1, cfi->dw_cfi_oprnd1.dw_cfi_addr, | |
3038 | fde->dw_fde_current_label, NULL); | |
3039 | fde->dw_fde_current_label = cfi->dw_cfi_oprnd1.dw_cfi_addr; | |
3040 | break; | |
3041 | ||
3042 | case DW_CFA_advance_loc2: | |
3043 | dw2_asm_output_delta (2, cfi->dw_cfi_oprnd1.dw_cfi_addr, | |
3044 | fde->dw_fde_current_label, NULL); | |
3045 | fde->dw_fde_current_label = cfi->dw_cfi_oprnd1.dw_cfi_addr; | |
3046 | break; | |
3047 | ||
3048 | case DW_CFA_advance_loc4: | |
3049 | dw2_asm_output_delta (4, cfi->dw_cfi_oprnd1.dw_cfi_addr, | |
3050 | fde->dw_fde_current_label, NULL); | |
3051 | fde->dw_fde_current_label = cfi->dw_cfi_oprnd1.dw_cfi_addr; | |
3052 | break; | |
3053 | ||
3054 | case DW_CFA_MIPS_advance_loc8: | |
3055 | dw2_asm_output_delta (8, cfi->dw_cfi_oprnd1.dw_cfi_addr, | |
3056 | fde->dw_fde_current_label, NULL); | |
3057 | fde->dw_fde_current_label = cfi->dw_cfi_oprnd1.dw_cfi_addr; | |
3058 | break; | |
3059 | ||
3060 | case DW_CFA_offset_extended: | |
3061 | r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, for_eh); | |
3062 | dw2_asm_output_data_uleb128 (r, NULL); | |
3063 | off = div_data_align (cfi->dw_cfi_oprnd2.dw_cfi_offset); | |
3064 | dw2_asm_output_data_uleb128 (off, NULL); | |
3065 | break; | |
3066 | ||
3067 | case DW_CFA_def_cfa: | |
3068 | r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, for_eh); | |
3069 | dw2_asm_output_data_uleb128 (r, NULL); | |
3070 | dw2_asm_output_data_uleb128 (cfi->dw_cfi_oprnd2.dw_cfi_offset, NULL); | |
3071 | break; | |
3072 | ||
3073 | case DW_CFA_offset_extended_sf: | |
3074 | r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, for_eh); | |
3075 | dw2_asm_output_data_uleb128 (r, NULL); | |
3076 | off = div_data_align (cfi->dw_cfi_oprnd2.dw_cfi_offset); | |
3077 | dw2_asm_output_data_sleb128 (off, NULL); | |
3078 | break; | |
3079 | ||
3080 | case DW_CFA_def_cfa_sf: | |
3081 | r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, for_eh); | |
3082 | dw2_asm_output_data_uleb128 (r, NULL); | |
3083 | off = div_data_align (cfi->dw_cfi_oprnd2.dw_cfi_offset); | |
3084 | dw2_asm_output_data_sleb128 (off, NULL); | |
3085 | break; | |
3086 | ||
3087 | case DW_CFA_restore_extended: | |
3088 | case DW_CFA_undefined: | |
3089 | case DW_CFA_same_value: | |
3090 | case DW_CFA_def_cfa_register: | |
3091 | r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, for_eh); | |
3092 | dw2_asm_output_data_uleb128 (r, NULL); | |
3093 | break; | |
3094 | ||
3095 | case DW_CFA_register: | |
3096 | r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, for_eh); | |
3097 | dw2_asm_output_data_uleb128 (r, NULL); | |
3098 | r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd2.dw_cfi_reg_num, for_eh); | |
3099 | dw2_asm_output_data_uleb128 (r, NULL); | |
3100 | break; | |
3101 | ||
3102 | case DW_CFA_def_cfa_offset: | |
3103 | case DW_CFA_GNU_args_size: | |
3104 | dw2_asm_output_data_uleb128 (cfi->dw_cfi_oprnd1.dw_cfi_offset, NULL); | |
3105 | break; | |
3106 | ||
3107 | case DW_CFA_def_cfa_offset_sf: | |
3108 | off = div_data_align (cfi->dw_cfi_oprnd1.dw_cfi_offset); | |
3109 | dw2_asm_output_data_sleb128 (off, NULL); | |
3110 | break; | |
3111 | ||
3112 | case DW_CFA_GNU_window_save: | |
3113 | break; | |
3114 | ||
3115 | case DW_CFA_def_cfa_expression: | |
3116 | case DW_CFA_expression: | |
3117 | output_cfa_loc (cfi, for_eh); | |
3118 | break; | |
3119 | ||
3120 | case DW_CFA_GNU_negative_offset_extended: | |
3121 | /* Obsoleted by DW_CFA_offset_extended_sf. */ | |
3122 | gcc_unreachable (); | |
3123 | ||
3124 | default: | |
3125 | break; | |
3126 | } | |
3127 | } | |
3128 | } | |
3129 | ||
3130 | /* Similar, but do it via assembler directives instead. */ | |
3131 | ||
3132 | void | |
3133 | output_cfi_directive (FILE *f, dw_cfi_ref cfi) | |
3134 | { | |
3135 | unsigned long r, r2; | |
3136 | ||
3137 | switch (cfi->dw_cfi_opc) | |
3138 | { | |
3139 | case DW_CFA_advance_loc: | |
3140 | case DW_CFA_advance_loc1: | |
3141 | case DW_CFA_advance_loc2: | |
3142 | case DW_CFA_advance_loc4: | |
3143 | case DW_CFA_MIPS_advance_loc8: | |
3144 | case DW_CFA_set_loc: | |
3145 | /* Should only be created in a code path not followed when emitting | |
3146 | via directives. The assembler is going to take care of this for | |
3147 | us. But this routines is also used for debugging dumps, so | |
3148 | print something. */ | |
3149 | gcc_assert (f != asm_out_file); | |
3150 | fprintf (f, "\t.cfi_advance_loc\n"); | |
3151 | break; | |
3152 | ||
3153 | case DW_CFA_offset: | |
3154 | case DW_CFA_offset_extended: | |
3155 | case DW_CFA_offset_extended_sf: | |
3156 | r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, 1); | |
3157 | fprintf (f, "\t.cfi_offset %lu, "HOST_WIDE_INT_PRINT_DEC"\n", | |
3158 | r, cfi->dw_cfi_oprnd2.dw_cfi_offset); | |
3159 | break; | |
3160 | ||
3161 | case DW_CFA_restore: | |
3162 | case DW_CFA_restore_extended: | |
3163 | r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, 1); | |
3164 | fprintf (f, "\t.cfi_restore %lu\n", r); | |
3165 | break; | |
3166 | ||
3167 | case DW_CFA_undefined: | |
3168 | r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, 1); | |
3169 | fprintf (f, "\t.cfi_undefined %lu\n", r); | |
3170 | break; | |
3171 | ||
3172 | case DW_CFA_same_value: | |
3173 | r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, 1); | |
3174 | fprintf (f, "\t.cfi_same_value %lu\n", r); | |
3175 | break; | |
3176 | ||
3177 | case DW_CFA_def_cfa: | |
3178 | case DW_CFA_def_cfa_sf: | |
3179 | r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, 1); | |
3180 | fprintf (f, "\t.cfi_def_cfa %lu, "HOST_WIDE_INT_PRINT_DEC"\n", | |
3181 | r, cfi->dw_cfi_oprnd2.dw_cfi_offset); | |
3182 | break; | |
3183 | ||
3184 | case DW_CFA_def_cfa_register: | |
3185 | r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, 1); | |
3186 | fprintf (f, "\t.cfi_def_cfa_register %lu\n", r); | |
3187 | break; | |
3188 | ||
3189 | case DW_CFA_register: | |
3190 | r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, 1); | |
3191 | r2 = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd2.dw_cfi_reg_num, 1); | |
3192 | fprintf (f, "\t.cfi_register %lu, %lu\n", r, r2); | |
3193 | break; | |
3194 | ||
3195 | case DW_CFA_def_cfa_offset: | |
3196 | case DW_CFA_def_cfa_offset_sf: | |
3197 | fprintf (f, "\t.cfi_def_cfa_offset " | |
3198 | HOST_WIDE_INT_PRINT_DEC"\n", | |
3199 | cfi->dw_cfi_oprnd1.dw_cfi_offset); | |
3200 | break; | |
3201 | ||
3202 | case DW_CFA_remember_state: | |
3203 | fprintf (f, "\t.cfi_remember_state\n"); | |
3204 | break; | |
3205 | case DW_CFA_restore_state: | |
3206 | fprintf (f, "\t.cfi_restore_state\n"); | |
3207 | break; | |
3208 | ||
3209 | case DW_CFA_GNU_args_size: | |
3210 | if (f == asm_out_file) | |
3211 | { | |
3212 | fprintf (f, "\t.cfi_escape %#x,", DW_CFA_GNU_args_size); | |
3213 | dw2_asm_output_data_uleb128_raw (cfi->dw_cfi_oprnd1.dw_cfi_offset); | |
3214 | if (flag_debug_asm) | |
3215 | fprintf (f, "\t%s args_size "HOST_WIDE_INT_PRINT_DEC, | |
3216 | ASM_COMMENT_START, cfi->dw_cfi_oprnd1.dw_cfi_offset); | |
3217 | fputc ('\n', f); | |
3218 | } | |
3219 | else | |
3220 | { | |
3221 | fprintf (f, "\t.cfi_GNU_args_size "HOST_WIDE_INT_PRINT_DEC "\n", | |
3222 | cfi->dw_cfi_oprnd1.dw_cfi_offset); | |
3223 | } | |
3224 | break; | |
3225 | ||
3226 | case DW_CFA_GNU_window_save: | |
3227 | fprintf (f, "\t.cfi_window_save\n"); | |
3228 | break; | |
3229 | ||
3230 | case DW_CFA_def_cfa_expression: | |
3231 | if (f != asm_out_file) | |
3232 | { | |
3233 | fprintf (f, "\t.cfi_def_cfa_expression ...\n"); | |
3234 | break; | |
3235 | } | |
3236 | /* FALLTHRU */ | |
3237 | case DW_CFA_expression: | |
3238 | if (f != asm_out_file) | |
3239 | { | |
3240 | fprintf (f, "\t.cfi_cfa_expression ...\n"); | |
3241 | break; | |
3242 | } | |
3243 | fprintf (f, "\t.cfi_escape %#x,", cfi->dw_cfi_opc); | |
3244 | output_cfa_loc_raw (cfi); | |
3245 | fputc ('\n', f); | |
3246 | break; | |
3247 | ||
3248 | default: | |
3249 | gcc_unreachable (); | |
3250 | } | |
3251 | } | |
3252 | ||
3253 | void | |
3254 | dwarf2out_emit_cfi (dw_cfi_ref cfi) | |
3255 | { | |
3256 | if (dwarf2out_do_cfi_asm ()) | |
3257 | output_cfi_directive (asm_out_file, cfi); | |
3258 | } | |
35bf1d17 | 3259 | |
3260 | static void | |
3261 | dump_cfi_row (FILE *f, dw_cfi_row *row) | |
3262 | { | |
3263 | dw_cfi_ref cfi; | |
3264 | unsigned i; | |
3265 | ||
3266 | cfi = row->cfa_cfi; | |
3267 | if (!cfi) | |
3268 | { | |
3269 | dw_cfa_location dummy; | |
3270 | memset(&dummy, 0, sizeof(dummy)); | |
3271 | dummy.reg = INVALID_REGNUM; | |
3272 | cfi = def_cfa_0 (&dummy, &row->cfa); | |
3273 | } | |
3274 | output_cfi_directive (f, cfi); | |
3275 | ||
f1f41a6c | 3276 | FOR_EACH_VEC_SAFE_ELT (row->reg_save, i, cfi) |
35bf1d17 | 3277 | if (cfi) |
3278 | output_cfi_directive (f, cfi); | |
35bf1d17 | 3279 | } |
3280 | ||
3281 | void debug_cfi_row (dw_cfi_row *row); | |
3282 | ||
3283 | void | |
3284 | debug_cfi_row (dw_cfi_row *row) | |
3285 | { | |
3286 | dump_cfi_row (stderr, row); | |
3287 | } | |
04dfc41a | 3288 | \f |
dcdf448e | 3289 | |
fe2dc6d6 | 3290 | /* Save the result of dwarf2out_do_frame across PCH. |
3291 | This variable is tri-state, with 0 unset, >0 true, <0 false. */ | |
3292 | static GTY(()) signed char saved_do_cfi_asm = 0; | |
dcdf448e | 3293 | |
3294 | /* Decide whether we want to emit frame unwind information for the current | |
3295 | translation unit. */ | |
3296 | ||
fe2dc6d6 | 3297 | bool |
dcdf448e | 3298 | dwarf2out_do_frame (void) |
3299 | { | |
3300 | /* We want to emit correct CFA location expressions or lists, so we | |
3301 | have to return true if we're going to output debug info, even if | |
3302 | we're not going to output frame or unwind info. */ | |
3303 | if (write_symbols == DWARF2_DEBUG || write_symbols == VMS_AND_DWARF2_DEBUG) | |
3304 | return true; | |
3305 | ||
fe2dc6d6 | 3306 | if (saved_do_cfi_asm > 0) |
dcdf448e | 3307 | return true; |
3308 | ||
3309 | if (targetm.debug_unwind_info () == UI_DWARF2) | |
3310 | return true; | |
3311 | ||
3312 | if ((flag_unwind_tables || flag_exceptions) | |
3313 | && targetm_common.except_unwind_info (&global_options) == UI_DWARF2) | |
3314 | return true; | |
3315 | ||
3316 | return false; | |
3317 | } | |
3318 | ||
3319 | /* Decide whether to emit frame unwind via assembler directives. */ | |
3320 | ||
fe2dc6d6 | 3321 | bool |
dcdf448e | 3322 | dwarf2out_do_cfi_asm (void) |
3323 | { | |
3324 | int enc; | |
3325 | ||
fe2dc6d6 | 3326 | if (saved_do_cfi_asm != 0) |
3327 | return saved_do_cfi_asm > 0; | |
3328 | ||
3329 | /* Assume failure for a moment. */ | |
3330 | saved_do_cfi_asm = -1; | |
3331 | ||
dcdf448e | 3332 | if (!flag_dwarf2_cfi_asm || !dwarf2out_do_frame ()) |
3333 | return false; | |
3334 | if (!HAVE_GAS_CFI_PERSONALITY_DIRECTIVE) | |
3335 | return false; | |
3336 | ||
3337 | /* Make sure the personality encoding is one the assembler can support. | |
3338 | In particular, aligned addresses can't be handled. */ | |
3339 | enc = ASM_PREFERRED_EH_DATA_FORMAT (/*code=*/2,/*global=*/1); | |
3340 | if ((enc & 0x70) != 0 && (enc & 0x70) != DW_EH_PE_pcrel) | |
3341 | return false; | |
3342 | enc = ASM_PREFERRED_EH_DATA_FORMAT (/*code=*/0,/*global=*/0); | |
3343 | if ((enc & 0x70) != 0 && (enc & 0x70) != DW_EH_PE_pcrel) | |
3344 | return false; | |
3345 | ||
3346 | /* If we can't get the assembler to emit only .debug_frame, and we don't need | |
3347 | dwarf2 unwind info for exceptions, then emit .debug_frame by hand. */ | |
3348 | if (!HAVE_GAS_CFI_SECTIONS_DIRECTIVE | |
3349 | && !flag_unwind_tables && !flag_exceptions | |
3350 | && targetm_common.except_unwind_info (&global_options) != UI_DWARF2) | |
3351 | return false; | |
3352 | ||
fe2dc6d6 | 3353 | /* Success! */ |
3354 | saved_do_cfi_asm = 1; | |
dcdf448e | 3355 | return true; |
3356 | } | |
3357 | ||
fe2dc6d6 | 3358 | static bool |
3359 | gate_dwarf2_frame (void) | |
3360 | { | |
3361 | #ifndef HAVE_prologue | |
3362 | /* Targets which still implement the prologue in assembler text | |
3363 | cannot use the generic dwarf2 unwinding. */ | |
3364 | return false; | |
3365 | #endif | |
3366 | ||
3367 | /* ??? What to do for UI_TARGET unwinding? They might be able to benefit | |
3368 | from the optimized shrink-wrapping annotations that we will compute. | |
3369 | For now, only produce the CFI notes for dwarf2. */ | |
3370 | return dwarf2out_do_frame (); | |
3371 | } | |
3372 | ||
cbe8bda8 | 3373 | namespace { |
3374 | ||
3375 | const pass_data pass_data_dwarf2_frame = | |
3376 | { | |
3377 | RTL_PASS, /* type */ | |
3378 | "dwarf2", /* name */ | |
3379 | OPTGROUP_NONE, /* optinfo_flags */ | |
3380 | true, /* has_gate */ | |
3381 | true, /* has_execute */ | |
3382 | TV_FINAL, /* tv_id */ | |
3383 | 0, /* properties_required */ | |
3384 | 0, /* properties_provided */ | |
3385 | 0, /* properties_destroyed */ | |
3386 | 0, /* todo_flags_start */ | |
3387 | 0, /* todo_flags_finish */ | |
fe2dc6d6 | 3388 | }; |
3389 | ||
cbe8bda8 | 3390 | class pass_dwarf2_frame : public rtl_opt_pass |
3391 | { | |
3392 | public: | |
3393 | pass_dwarf2_frame(gcc::context *ctxt) | |
3394 | : rtl_opt_pass(pass_data_dwarf2_frame, ctxt) | |
3395 | {} | |
3396 | ||
3397 | /* opt_pass methods: */ | |
3398 | bool gate () { return gate_dwarf2_frame (); } | |
3399 | unsigned int execute () { return execute_dwarf2_frame (); } | |
3400 | ||
3401 | }; // class pass_dwarf2_frame | |
3402 | ||
3403 | } // anon namespace | |
3404 | ||
3405 | rtl_opt_pass * | |
3406 | make_pass_dwarf2_frame (gcc::context *ctxt) | |
3407 | { | |
3408 | return new pass_dwarf2_frame (ctxt); | |
3409 | } | |
3410 | ||
dcdf448e | 3411 | #include "gt-dwarf2cfi.h" |