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647a1567 | 1 | /* Dwarf2 Call Frame Information helper routines. |
23a5b65a | 2 | Copyright (C) 1992-2014 Free Software Foundation, Inc. |
647a1567 RH |
3 | |
4 | This file is part of GCC. | |
5 | ||
6 | GCC is free software; you can redistribute it and/or modify it under | |
7 | the terms of the GNU General Public License as published by the Free | |
8 | Software Foundation; either version 3, or (at your option) any later | |
9 | version. | |
10 | ||
11 | GCC is distributed in the hope that it will be useful, but WITHOUT ANY | |
12 | WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
13 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
14 | for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with GCC; see the file COPYING3. If not see | |
18 | <http://www.gnu.org/licenses/>. */ | |
19 | ||
20 | #include "config.h" | |
21 | #include "system.h" | |
22 | #include "coretypes.h" | |
23 | #include "tm.h" | |
24 | #include "version.h" | |
25 | #include "flags.h" | |
26 | #include "rtl.h" | |
4d648807 | 27 | #include "tree.h" |
d8a2d370 | 28 | #include "stor-layout.h" |
647a1567 | 29 | #include "function.h" |
829bdd4b | 30 | #include "basic-block.h" |
647a1567 RH |
31 | #include "dwarf2.h" |
32 | #include "dwarf2out.h" | |
33 | #include "dwarf2asm.h" | |
34 | #include "ggc.h" | |
4a8fb1a1 | 35 | #include "hash-table.h" |
647a1567 RH |
36 | #include "tm_p.h" |
37 | #include "target.h" | |
38 | #include "common/common-target.h" | |
39 | #include "tree-pass.h" | |
40 | ||
41 | #include "except.h" /* expand_builtin_dwarf_sp_column */ | |
42 | #include "expr.h" /* init_return_column_size */ | |
43 | #include "regs.h" /* expand_builtin_init_dwarf_reg_sizes */ | |
44 | #include "output.h" /* asm_out_file */ | |
45 | #include "debug.h" /* dwarf2out_do_frame, dwarf2out_do_cfi_asm */ | |
46 | ||
47 | ||
48 | /* ??? Poison these here until it can be done generically. They've been | |
49 | totally replaced in this file; make sure it stays that way. */ | |
50 | #undef DWARF2_UNWIND_INFO | |
51 | #undef DWARF2_FRAME_INFO | |
52 | #if (GCC_VERSION >= 3000) | |
53 | #pragma GCC poison DWARF2_UNWIND_INFO DWARF2_FRAME_INFO | |
54 | #endif | |
55 | ||
56 | #ifndef INCOMING_RETURN_ADDR_RTX | |
57 | #define INCOMING_RETURN_ADDR_RTX (gcc_unreachable (), NULL_RTX) | |
58 | #endif | |
59 | ||
647a1567 RH |
60 | /* Maximum size (in bytes) of an artificially generated label. */ |
61 | #define MAX_ARTIFICIAL_LABEL_BYTES 30 | |
647a1567 | 62 | \f |
f17d3401 RH |
63 | /* A collected description of an entire row of the abstract CFI table. */ |
64 | typedef struct GTY(()) dw_cfi_row_struct | |
65 | { | |
66 | /* The expression that computes the CFA, expressed in two different ways. | |
67 | The CFA member for the simple cases, and the full CFI expression for | |
68 | the complex cases. The later will be a DW_CFA_cfa_expression. */ | |
69 | dw_cfa_location cfa; | |
70 | dw_cfi_ref cfa_cfi; | |
71 | ||
72 | /* The expressions for any register column that is saved. */ | |
73 | cfi_vec reg_save; | |
f17d3401 RH |
74 | } dw_cfi_row; |
75 | ||
43215a89 RH |
76 | /* The caller's ORIG_REG is saved in SAVED_IN_REG. */ |
77 | typedef struct GTY(()) reg_saved_in_data_struct { | |
78 | rtx orig_reg; | |
79 | rtx saved_in_reg; | |
80 | } reg_saved_in_data; | |
81 | ||
43215a89 RH |
82 | |
83 | /* Since we no longer have a proper CFG, we're going to create a facsimile | |
84 | of one on the fly while processing the frame-related insns. | |
85 | ||
829bdd4b RH |
86 | We create dw_trace_info structures for each extended basic block beginning |
87 | and ending at a "save point". Save points are labels, barriers, certain | |
88 | notes, and of course the beginning and end of the function. | |
43215a89 RH |
89 | |
90 | As we encounter control transfer insns, we propagate the "current" | |
829bdd4b RH |
91 | row state across the edges to the starts of traces. When checking is |
92 | enabled, we validate that we propagate the same data from all sources. | |
43215a89 RH |
93 | |
94 | All traces are members of the TRACE_INFO array, in the order in which | |
95 | they appear in the instruction stream. | |
96 | ||
829bdd4b RH |
97 | All save points are present in the TRACE_INDEX hash, mapping the insn |
98 | starting a trace to the dw_trace_info describing the trace. */ | |
43215a89 RH |
99 | |
100 | typedef struct | |
101 | { | |
829bdd4b RH |
102 | /* The insn that begins the trace. */ |
103 | rtx head; | |
43215a89 RH |
104 | |
105 | /* The row state at the beginning and end of the trace. */ | |
829bdd4b RH |
106 | dw_cfi_row *beg_row, *end_row; |
107 | ||
9a08d230 RH |
108 | /* Tracking for DW_CFA_GNU_args_size. The "true" sizes are those we find |
109 | while scanning insns. However, the args_size value is irrelevant at | |
110 | any point except can_throw_internal_p insns. Therefore the "delay" | |
111 | sizes the values that must actually be emitted for this trace. */ | |
112 | HOST_WIDE_INT beg_true_args_size, end_true_args_size; | |
113 | HOST_WIDE_INT beg_delay_args_size, end_delay_args_size; | |
114 | ||
115 | /* The first EH insn in the trace, where beg_delay_args_size must be set. */ | |
116 | rtx eh_head; | |
117 | ||
43215a89 RH |
118 | /* The following variables contain data used in interpreting frame related |
119 | expressions. These are not part of the "real" row state as defined by | |
120 | Dwarf, but it seems like they need to be propagated into a trace in case | |
121 | frame related expressions have been sunk. */ | |
122 | /* ??? This seems fragile. These variables are fragments of a larger | |
123 | expression. If we do not keep the entire expression together, we risk | |
124 | not being able to put it together properly. Consider forcing targets | |
125 | to generate self-contained expressions and dropping all of the magic | |
126 | interpretation code in this file. Or at least refusing to shrink wrap | |
127 | any frame related insn that doesn't contain a complete expression. */ | |
128 | ||
129 | /* The register used for saving registers to the stack, and its offset | |
130 | from the CFA. */ | |
131 | dw_cfa_location cfa_store; | |
132 | ||
133 | /* A temporary register holding an integral value used in adjusting SP | |
134 | or setting up the store_reg. The "offset" field holds the integer | |
135 | value, not an offset. */ | |
136 | dw_cfa_location cfa_temp; | |
137 | ||
138 | /* A set of registers saved in other registers. This is the inverse of | |
139 | the row->reg_save info, if the entry is a DW_CFA_register. This is | |
140 | implemented as a flat array because it normally contains zero or 1 | |
141 | entry, depending on the target. IA-64 is the big spender here, using | |
142 | a maximum of 5 entries. */ | |
9771b263 | 143 | vec<reg_saved_in_data> regs_saved_in_regs; |
43215a89 | 144 | |
200e10dc RH |
145 | /* An identifier for this trace. Used only for debugging dumps. */ |
146 | unsigned id; | |
147 | ||
148 | /* True if this trace immediately follows NOTE_INSN_SWITCH_TEXT_SECTIONS. */ | |
149 | bool switch_sections; | |
9a08d230 RH |
150 | |
151 | /* True if we've seen different values incoming to beg_true_args_size. */ | |
152 | bool args_size_undefined; | |
43215a89 RH |
153 | } dw_trace_info; |
154 | ||
43215a89 | 155 | |
829bdd4b | 156 | typedef dw_trace_info *dw_trace_info_ref; |
43215a89 | 157 | |
43215a89 | 158 | |
4a8fb1a1 LC |
159 | /* Hashtable helpers. */ |
160 | ||
161 | struct trace_info_hasher : typed_noop_remove <dw_trace_info> | |
162 | { | |
163 | typedef dw_trace_info value_type; | |
164 | typedef dw_trace_info compare_type; | |
165 | static inline hashval_t hash (const value_type *); | |
166 | static inline bool equal (const value_type *, const compare_type *); | |
167 | }; | |
168 | ||
169 | inline hashval_t | |
170 | trace_info_hasher::hash (const value_type *ti) | |
171 | { | |
172 | return INSN_UID (ti->head); | |
173 | } | |
174 | ||
175 | inline bool | |
176 | trace_info_hasher::equal (const value_type *a, const compare_type *b) | |
177 | { | |
178 | return a->head == b->head; | |
179 | } | |
180 | ||
181 | ||
43215a89 | 182 | /* The variables making up the pseudo-cfg, as described above. */ |
9771b263 DN |
183 | static vec<dw_trace_info> trace_info; |
184 | static vec<dw_trace_info_ref> trace_work_list; | |
c203e8a7 | 185 | static hash_table<trace_info_hasher> *trace_index; |
43215a89 | 186 | |
647a1567 RH |
187 | /* A vector of call frame insns for the CIE. */ |
188 | cfi_vec cie_cfi_vec; | |
189 | ||
f17d3401 RH |
190 | /* The state of the first row of the FDE table, which includes the |
191 | state provided by the CIE. */ | |
ce363ef2 | 192 | static GTY(()) dw_cfi_row *cie_cfi_row; |
f17d3401 | 193 | |
43215a89 RH |
194 | static GTY(()) reg_saved_in_data *cie_return_save; |
195 | ||
647a1567 RH |
196 | static GTY(()) unsigned long dwarf2out_cfi_label_num; |
197 | ||
bc5612ed | 198 | /* The insn after which a new CFI note should be emitted. */ |
141618e2 | 199 | static rtx add_cfi_insn; |
bc5612ed | 200 | |
3edb53aa RH |
201 | /* When non-null, add_cfi will add the CFI to this vector. */ |
202 | static cfi_vec *add_cfi_vec; | |
203 | ||
43215a89 RH |
204 | /* The current instruction trace. */ |
205 | static dw_trace_info *cur_trace; | |
206 | ||
207 | /* The current, i.e. most recently generated, row of the CFI table. */ | |
208 | static dw_cfi_row *cur_row; | |
209 | ||
9a08d230 RH |
210 | /* A copy of the current CFA, for use during the processing of a |
211 | single insn. */ | |
212 | static dw_cfa_location *cur_cfa; | |
213 | ||
43215a89 RH |
214 | /* We delay emitting a register save until either (a) we reach the end |
215 | of the prologue or (b) the register is clobbered. This clusters | |
216 | register saves so that there are fewer pc advances. */ | |
217 | ||
218 | typedef struct { | |
219 | rtx reg; | |
220 | rtx saved_reg; | |
221 | HOST_WIDE_INT cfa_offset; | |
222 | } queued_reg_save; | |
223 | ||
43215a89 | 224 | |
9771b263 | 225 | static vec<queued_reg_save> queued_reg_saves; |
43215a89 | 226 | |
bc5612ed BS |
227 | /* True if any CFI directives were emitted at the current insn. */ |
228 | static bool any_cfis_emitted; | |
4f42d714 RH |
229 | |
230 | /* Short-hand for commonly used register numbers. */ | |
231 | static unsigned dw_stack_pointer_regnum; | |
232 | static unsigned dw_frame_pointer_regnum; | |
647a1567 RH |
233 | \f |
234 | /* Hook used by __throw. */ | |
235 | ||
236 | rtx | |
237 | expand_builtin_dwarf_sp_column (void) | |
238 | { | |
4f42d714 | 239 | unsigned int dwarf_regnum = DWARF_FRAME_REGNUM (STACK_POINTER_REGNUM); |
647a1567 RH |
240 | return GEN_INT (DWARF2_FRAME_REG_OUT (dwarf_regnum, 1)); |
241 | } | |
242 | ||
243 | /* MEM is a memory reference for the register size table, each element of | |
244 | which has mode MODE. Initialize column C as a return address column. */ | |
245 | ||
246 | static void | |
247 | init_return_column_size (enum machine_mode mode, rtx mem, unsigned int c) | |
248 | { | |
249 | HOST_WIDE_INT offset = c * GET_MODE_SIZE (mode); | |
250 | HOST_WIDE_INT size = GET_MODE_SIZE (Pmode); | |
69db2d57 RS |
251 | emit_move_insn (adjust_address (mem, mode, offset), |
252 | gen_int_mode (size, mode)); | |
647a1567 RH |
253 | } |
254 | ||
255 | /* Generate code to initialize the register size table. */ | |
256 | ||
257 | void | |
258 | expand_builtin_init_dwarf_reg_sizes (tree address) | |
259 | { | |
260 | unsigned int i; | |
261 | enum machine_mode mode = TYPE_MODE (char_type_node); | |
262 | rtx addr = expand_normal (address); | |
263 | rtx mem = gen_rtx_MEM (BLKmode, addr); | |
264 | bool wrote_return_column = false; | |
265 | ||
266 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
267 | { | |
4f42d714 RH |
268 | unsigned int dnum = DWARF_FRAME_REGNUM (i); |
269 | unsigned int rnum = DWARF2_FRAME_REG_OUT (dnum, 1); | |
647a1567 RH |
270 | |
271 | if (rnum < DWARF_FRAME_REGISTERS) | |
272 | { | |
273 | HOST_WIDE_INT offset = rnum * GET_MODE_SIZE (mode); | |
274 | enum machine_mode save_mode = reg_raw_mode[i]; | |
275 | HOST_WIDE_INT size; | |
276 | ||
277 | if (HARD_REGNO_CALL_PART_CLOBBERED (i, save_mode)) | |
278 | save_mode = choose_hard_reg_mode (i, 1, true); | |
4f42d714 | 279 | if (dnum == DWARF_FRAME_RETURN_COLUMN) |
647a1567 RH |
280 | { |
281 | if (save_mode == VOIDmode) | |
282 | continue; | |
283 | wrote_return_column = true; | |
284 | } | |
285 | size = GET_MODE_SIZE (save_mode); | |
286 | if (offset < 0) | |
287 | continue; | |
288 | ||
289 | emit_move_insn (adjust_address (mem, mode, offset), | |
290 | gen_int_mode (size, mode)); | |
291 | } | |
292 | } | |
293 | ||
294 | if (!wrote_return_column) | |
295 | init_return_column_size (mode, mem, DWARF_FRAME_RETURN_COLUMN); | |
296 | ||
297 | #ifdef DWARF_ALT_FRAME_RETURN_COLUMN | |
298 | init_return_column_size (mode, mem, DWARF_ALT_FRAME_RETURN_COLUMN); | |
299 | #endif | |
300 | ||
301 | targetm.init_dwarf_reg_sizes_extra (address); | |
302 | } | |
303 | ||
829bdd4b | 304 | \f |
829bdd4b RH |
305 | static dw_trace_info * |
306 | get_trace_info (rtx insn) | |
307 | { | |
308 | dw_trace_info dummy; | |
309 | dummy.head = insn; | |
c203e8a7 | 310 | return trace_index->find_with_hash (&dummy, INSN_UID (insn)); |
829bdd4b RH |
311 | } |
312 | ||
313 | static bool | |
314 | save_point_p (rtx insn) | |
315 | { | |
316 | /* Labels, except those that are really jump tables. */ | |
317 | if (LABEL_P (insn)) | |
318 | return inside_basic_block_p (insn); | |
319 | ||
320 | /* We split traces at the prologue/epilogue notes because those | |
321 | are points at which the unwind info is usually stable. This | |
322 | makes it easier to find spots with identical unwind info so | |
323 | that we can use remember/restore_state opcodes. */ | |
324 | if (NOTE_P (insn)) | |
325 | switch (NOTE_KIND (insn)) | |
326 | { | |
327 | case NOTE_INSN_PROLOGUE_END: | |
328 | case NOTE_INSN_EPILOGUE_BEG: | |
329 | return true; | |
330 | } | |
331 | ||
332 | return false; | |
333 | } | |
334 | ||
647a1567 RH |
335 | /* Divide OFF by DWARF_CIE_DATA_ALIGNMENT, asserting no remainder. */ |
336 | ||
337 | static inline HOST_WIDE_INT | |
338 | div_data_align (HOST_WIDE_INT off) | |
339 | { | |
340 | HOST_WIDE_INT r = off / DWARF_CIE_DATA_ALIGNMENT; | |
341 | gcc_assert (r * DWARF_CIE_DATA_ALIGNMENT == off); | |
342 | return r; | |
343 | } | |
344 | ||
345 | /* Return true if we need a signed version of a given opcode | |
346 | (e.g. DW_CFA_offset_extended_sf vs DW_CFA_offset_extended). */ | |
347 | ||
348 | static inline bool | |
349 | need_data_align_sf_opcode (HOST_WIDE_INT off) | |
350 | { | |
351 | return DWARF_CIE_DATA_ALIGNMENT < 0 ? off > 0 : off < 0; | |
352 | } | |
353 | ||
354 | /* Return a pointer to a newly allocated Call Frame Instruction. */ | |
355 | ||
356 | static inline dw_cfi_ref | |
357 | new_cfi (void) | |
358 | { | |
766090c2 | 359 | dw_cfi_ref cfi = ggc_alloc<dw_cfi_node> (); |
647a1567 RH |
360 | |
361 | cfi->dw_cfi_oprnd1.dw_cfi_reg_num = 0; | |
362 | cfi->dw_cfi_oprnd2.dw_cfi_reg_num = 0; | |
363 | ||
364 | return cfi; | |
365 | } | |
366 | ||
f17d3401 RH |
367 | /* Return a newly allocated CFI row, with no defined data. */ |
368 | ||
ce363ef2 | 369 | static dw_cfi_row * |
f17d3401 RH |
370 | new_cfi_row (void) |
371 | { | |
766090c2 | 372 | dw_cfi_row *row = ggc_cleared_alloc<dw_cfi_row> (); |
f17d3401 RH |
373 | |
374 | row->cfa.reg = INVALID_REGNUM; | |
375 | ||
376 | return row; | |
377 | } | |
378 | ||
379 | /* Return a copy of an existing CFI row. */ | |
380 | ||
ce363ef2 RH |
381 | static dw_cfi_row * |
382 | copy_cfi_row (dw_cfi_row *src) | |
f17d3401 | 383 | { |
766090c2 | 384 | dw_cfi_row *dst = ggc_alloc<dw_cfi_row> (); |
f17d3401 RH |
385 | |
386 | *dst = *src; | |
9771b263 | 387 | dst->reg_save = vec_safe_copy (src->reg_save); |
f17d3401 RH |
388 | |
389 | return dst; | |
390 | } | |
391 | ||
89e25f95 | 392 | /* Generate a new label for the CFI info to refer to. */ |
647a1567 RH |
393 | |
394 | static char * | |
89e25f95 | 395 | dwarf2out_cfi_label (void) |
647a1567 | 396 | { |
89e25f95 BS |
397 | int num = dwarf2out_cfi_label_num++; |
398 | char label[20]; | |
647a1567 | 399 | |
89e25f95 | 400 | ASM_GENERATE_INTERNAL_LABEL (label, "LCFI", num); |
647a1567 | 401 | |
89e25f95 | 402 | return xstrdup (label); |
647a1567 RH |
403 | } |
404 | ||
3edb53aa | 405 | /* Add CFI either to the current insn stream or to a vector, or both. */ |
647a1567 RH |
406 | |
407 | static void | |
3edb53aa | 408 | add_cfi (dw_cfi_ref cfi) |
647a1567 | 409 | { |
89e25f95 | 410 | any_cfis_emitted = true; |
141618e2 RH |
411 | |
412 | if (add_cfi_insn != NULL) | |
647a1567 | 413 | { |
141618e2 RH |
414 | add_cfi_insn = emit_note_after (NOTE_INSN_CFI, add_cfi_insn); |
415 | NOTE_CFI (add_cfi_insn) = cfi; | |
647a1567 | 416 | } |
141618e2 | 417 | |
3edb53aa | 418 | if (add_cfi_vec != NULL) |
9771b263 | 419 | vec_safe_push (*add_cfi_vec, cfi); |
647a1567 RH |
420 | } |
421 | ||
57e16c96 RH |
422 | static void |
423 | add_cfi_args_size (HOST_WIDE_INT size) | |
424 | { | |
425 | dw_cfi_ref cfi = new_cfi (); | |
426 | ||
9a08d230 RH |
427 | /* While we can occasionally have args_size < 0 internally, this state |
428 | should not persist at a point we actually need an opcode. */ | |
429 | gcc_assert (size >= 0); | |
430 | ||
57e16c96 RH |
431 | cfi->dw_cfi_opc = DW_CFA_GNU_args_size; |
432 | cfi->dw_cfi_oprnd1.dw_cfi_offset = size; | |
433 | ||
434 | add_cfi (cfi); | |
435 | } | |
436 | ||
437 | static void | |
438 | add_cfi_restore (unsigned reg) | |
439 | { | |
440 | dw_cfi_ref cfi = new_cfi (); | |
441 | ||
442 | cfi->dw_cfi_opc = (reg & ~0x3f ? DW_CFA_restore_extended : DW_CFA_restore); | |
443 | cfi->dw_cfi_oprnd1.dw_cfi_reg_num = reg; | |
444 | ||
445 | add_cfi (cfi); | |
446 | } | |
447 | ||
f1a0e830 RH |
448 | /* Perform ROW->REG_SAVE[COLUMN] = CFI. CFI may be null, indicating |
449 | that the register column is no longer saved. */ | |
450 | ||
451 | static void | |
ce363ef2 | 452 | update_row_reg_save (dw_cfi_row *row, unsigned column, dw_cfi_ref cfi) |
f1a0e830 | 453 | { |
9771b263 DN |
454 | if (vec_safe_length (row->reg_save) <= column) |
455 | vec_safe_grow_cleared (row->reg_save, column + 1); | |
456 | (*row->reg_save)[column] = cfi; | |
f1a0e830 RH |
457 | } |
458 | ||
647a1567 RH |
459 | /* This function fills in aa dw_cfa_location structure from a dwarf location |
460 | descriptor sequence. */ | |
461 | ||
462 | static void | |
84562394 | 463 | get_cfa_from_loc_descr (dw_cfa_location *cfa, struct dw_loc_descr_node *loc) |
647a1567 | 464 | { |
84562394 | 465 | struct dw_loc_descr_node *ptr; |
647a1567 RH |
466 | cfa->offset = 0; |
467 | cfa->base_offset = 0; | |
468 | cfa->indirect = 0; | |
469 | cfa->reg = -1; | |
470 | ||
471 | for (ptr = loc; ptr != NULL; ptr = ptr->dw_loc_next) | |
472 | { | |
473 | enum dwarf_location_atom op = ptr->dw_loc_opc; | |
474 | ||
475 | switch (op) | |
476 | { | |
477 | case DW_OP_reg0: | |
478 | case DW_OP_reg1: | |
479 | case DW_OP_reg2: | |
480 | case DW_OP_reg3: | |
481 | case DW_OP_reg4: | |
482 | case DW_OP_reg5: | |
483 | case DW_OP_reg6: | |
484 | case DW_OP_reg7: | |
485 | case DW_OP_reg8: | |
486 | case DW_OP_reg9: | |
487 | case DW_OP_reg10: | |
488 | case DW_OP_reg11: | |
489 | case DW_OP_reg12: | |
490 | case DW_OP_reg13: | |
491 | case DW_OP_reg14: | |
492 | case DW_OP_reg15: | |
493 | case DW_OP_reg16: | |
494 | case DW_OP_reg17: | |
495 | case DW_OP_reg18: | |
496 | case DW_OP_reg19: | |
497 | case DW_OP_reg20: | |
498 | case DW_OP_reg21: | |
499 | case DW_OP_reg22: | |
500 | case DW_OP_reg23: | |
501 | case DW_OP_reg24: | |
502 | case DW_OP_reg25: | |
503 | case DW_OP_reg26: | |
504 | case DW_OP_reg27: | |
505 | case DW_OP_reg28: | |
506 | case DW_OP_reg29: | |
507 | case DW_OP_reg30: | |
508 | case DW_OP_reg31: | |
509 | cfa->reg = op - DW_OP_reg0; | |
510 | break; | |
511 | case DW_OP_regx: | |
512 | cfa->reg = ptr->dw_loc_oprnd1.v.val_int; | |
513 | break; | |
514 | case DW_OP_breg0: | |
515 | case DW_OP_breg1: | |
516 | case DW_OP_breg2: | |
517 | case DW_OP_breg3: | |
518 | case DW_OP_breg4: | |
519 | case DW_OP_breg5: | |
520 | case DW_OP_breg6: | |
521 | case DW_OP_breg7: | |
522 | case DW_OP_breg8: | |
523 | case DW_OP_breg9: | |
524 | case DW_OP_breg10: | |
525 | case DW_OP_breg11: | |
526 | case DW_OP_breg12: | |
527 | case DW_OP_breg13: | |
528 | case DW_OP_breg14: | |
529 | case DW_OP_breg15: | |
530 | case DW_OP_breg16: | |
531 | case DW_OP_breg17: | |
532 | case DW_OP_breg18: | |
533 | case DW_OP_breg19: | |
534 | case DW_OP_breg20: | |
535 | case DW_OP_breg21: | |
536 | case DW_OP_breg22: | |
537 | case DW_OP_breg23: | |
538 | case DW_OP_breg24: | |
539 | case DW_OP_breg25: | |
540 | case DW_OP_breg26: | |
541 | case DW_OP_breg27: | |
542 | case DW_OP_breg28: | |
543 | case DW_OP_breg29: | |
544 | case DW_OP_breg30: | |
545 | case DW_OP_breg31: | |
546 | cfa->reg = op - DW_OP_breg0; | |
547 | cfa->base_offset = ptr->dw_loc_oprnd1.v.val_int; | |
548 | break; | |
549 | case DW_OP_bregx: | |
550 | cfa->reg = ptr->dw_loc_oprnd1.v.val_int; | |
551 | cfa->base_offset = ptr->dw_loc_oprnd2.v.val_int; | |
552 | break; | |
553 | case DW_OP_deref: | |
554 | cfa->indirect = 1; | |
555 | break; | |
556 | case DW_OP_plus_uconst: | |
557 | cfa->offset = ptr->dw_loc_oprnd1.v.val_unsigned; | |
558 | break; | |
559 | default: | |
560 | gcc_unreachable (); | |
561 | } | |
562 | } | |
563 | } | |
564 | ||
4a8ee122 RH |
565 | /* Find the previous value for the CFA, iteratively. CFI is the opcode |
566 | to interpret, *LOC will be updated as necessary, *REMEMBER is used for | |
567 | one level of remember/restore state processing. */ | |
647a1567 RH |
568 | |
569 | void | |
570 | lookup_cfa_1 (dw_cfi_ref cfi, dw_cfa_location *loc, dw_cfa_location *remember) | |
571 | { | |
572 | switch (cfi->dw_cfi_opc) | |
573 | { | |
574 | case DW_CFA_def_cfa_offset: | |
575 | case DW_CFA_def_cfa_offset_sf: | |
576 | loc->offset = cfi->dw_cfi_oprnd1.dw_cfi_offset; | |
577 | break; | |
578 | case DW_CFA_def_cfa_register: | |
579 | loc->reg = cfi->dw_cfi_oprnd1.dw_cfi_reg_num; | |
580 | break; | |
581 | case DW_CFA_def_cfa: | |
582 | case DW_CFA_def_cfa_sf: | |
583 | loc->reg = cfi->dw_cfi_oprnd1.dw_cfi_reg_num; | |
584 | loc->offset = cfi->dw_cfi_oprnd2.dw_cfi_offset; | |
585 | break; | |
586 | case DW_CFA_def_cfa_expression: | |
587 | get_cfa_from_loc_descr (loc, cfi->dw_cfi_oprnd1.dw_cfi_loc); | |
588 | break; | |
589 | ||
590 | case DW_CFA_remember_state: | |
591 | gcc_assert (!remember->in_use); | |
592 | *remember = *loc; | |
593 | remember->in_use = 1; | |
594 | break; | |
595 | case DW_CFA_restore_state: | |
596 | gcc_assert (remember->in_use); | |
597 | *loc = *remember; | |
598 | remember->in_use = 0; | |
599 | break; | |
600 | ||
601 | default: | |
602 | break; | |
603 | } | |
604 | } | |
605 | ||
647a1567 RH |
606 | /* Determine if two dw_cfa_location structures define the same data. */ |
607 | ||
608 | bool | |
609 | cfa_equal_p (const dw_cfa_location *loc1, const dw_cfa_location *loc2) | |
610 | { | |
611 | return (loc1->reg == loc2->reg | |
612 | && loc1->offset == loc2->offset | |
613 | && loc1->indirect == loc2->indirect | |
614 | && (loc1->indirect == 0 | |
615 | || loc1->base_offset == loc2->base_offset)); | |
616 | } | |
617 | ||
57e16c96 | 618 | /* Determine if two CFI operands are identical. */ |
647a1567 | 619 | |
57e16c96 RH |
620 | static bool |
621 | cfi_oprnd_equal_p (enum dw_cfi_oprnd_type t, dw_cfi_oprnd *a, dw_cfi_oprnd *b) | |
647a1567 | 622 | { |
57e16c96 RH |
623 | switch (t) |
624 | { | |
625 | case dw_cfi_oprnd_unused: | |
626 | return true; | |
627 | case dw_cfi_oprnd_reg_num: | |
628 | return a->dw_cfi_reg_num == b->dw_cfi_reg_num; | |
629 | case dw_cfi_oprnd_offset: | |
630 | return a->dw_cfi_offset == b->dw_cfi_offset; | |
631 | case dw_cfi_oprnd_addr: | |
632 | return (a->dw_cfi_addr == b->dw_cfi_addr | |
633 | || strcmp (a->dw_cfi_addr, b->dw_cfi_addr) == 0); | |
634 | case dw_cfi_oprnd_loc: | |
635 | return loc_descr_equal_p (a->dw_cfi_loc, b->dw_cfi_loc); | |
636 | } | |
637 | gcc_unreachable (); | |
638 | } | |
647a1567 | 639 | |
57e16c96 RH |
640 | /* Determine if two CFI entries are identical. */ |
641 | ||
642 | static bool | |
643 | cfi_equal_p (dw_cfi_ref a, dw_cfi_ref b) | |
644 | { | |
645 | enum dwarf_call_frame_info opc; | |
646 | ||
647 | /* Make things easier for our callers, including missing operands. */ | |
648 | if (a == b) | |
649 | return true; | |
650 | if (a == NULL || b == NULL) | |
651 | return false; | |
652 | ||
653 | /* Obviously, the opcodes must match. */ | |
654 | opc = a->dw_cfi_opc; | |
655 | if (opc != b->dw_cfi_opc) | |
656 | return false; | |
657 | ||
658 | /* Compare the two operands, re-using the type of the operands as | |
659 | already exposed elsewhere. */ | |
660 | return (cfi_oprnd_equal_p (dw_cfi_oprnd1_desc (opc), | |
661 | &a->dw_cfi_oprnd1, &b->dw_cfi_oprnd1) | |
662 | && cfi_oprnd_equal_p (dw_cfi_oprnd2_desc (opc), | |
663 | &a->dw_cfi_oprnd2, &b->dw_cfi_oprnd2)); | |
664 | } | |
665 | ||
829bdd4b RH |
666 | /* Determine if two CFI_ROW structures are identical. */ |
667 | ||
668 | static bool | |
669 | cfi_row_equal_p (dw_cfi_row *a, dw_cfi_row *b) | |
670 | { | |
671 | size_t i, n_a, n_b, n_max; | |
672 | ||
673 | if (a->cfa_cfi) | |
674 | { | |
675 | if (!cfi_equal_p (a->cfa_cfi, b->cfa_cfi)) | |
676 | return false; | |
677 | } | |
678 | else if (!cfa_equal_p (&a->cfa, &b->cfa)) | |
679 | return false; | |
680 | ||
9771b263 DN |
681 | n_a = vec_safe_length (a->reg_save); |
682 | n_b = vec_safe_length (b->reg_save); | |
829bdd4b RH |
683 | n_max = MAX (n_a, n_b); |
684 | ||
685 | for (i = 0; i < n_max; ++i) | |
686 | { | |
687 | dw_cfi_ref r_a = NULL, r_b = NULL; | |
688 | ||
689 | if (i < n_a) | |
9771b263 | 690 | r_a = (*a->reg_save)[i]; |
829bdd4b | 691 | if (i < n_b) |
9771b263 | 692 | r_b = (*b->reg_save)[i]; |
829bdd4b RH |
693 | |
694 | if (!cfi_equal_p (r_a, r_b)) | |
695 | return false; | |
696 | } | |
697 | ||
698 | return true; | |
699 | } | |
700 | ||
57e16c96 RH |
701 | /* The CFA is now calculated from NEW_CFA. Consider OLD_CFA in determining |
702 | what opcode to emit. Returns the CFI opcode to effect the change, or | |
703 | NULL if NEW_CFA == OLD_CFA. */ | |
704 | ||
705 | static dw_cfi_ref | |
706 | def_cfa_0 (dw_cfa_location *old_cfa, dw_cfa_location *new_cfa) | |
707 | { | |
708 | dw_cfi_ref cfi; | |
647a1567 | 709 | |
647a1567 | 710 | /* If nothing changed, no need to issue any call frame instructions. */ |
57e16c96 RH |
711 | if (cfa_equal_p (old_cfa, new_cfa)) |
712 | return NULL; | |
647a1567 RH |
713 | |
714 | cfi = new_cfi (); | |
715 | ||
57e16c96 | 716 | if (new_cfa->reg == old_cfa->reg && !new_cfa->indirect && !old_cfa->indirect) |
647a1567 RH |
717 | { |
718 | /* Construct a "DW_CFA_def_cfa_offset <offset>" instruction, indicating | |
719 | the CFA register did not change but the offset did. The data | |
720 | factoring for DW_CFA_def_cfa_offset_sf happens in output_cfi, or | |
721 | in the assembler via the .cfi_def_cfa_offset directive. */ | |
57e16c96 | 722 | if (new_cfa->offset < 0) |
647a1567 RH |
723 | cfi->dw_cfi_opc = DW_CFA_def_cfa_offset_sf; |
724 | else | |
725 | cfi->dw_cfi_opc = DW_CFA_def_cfa_offset; | |
57e16c96 | 726 | cfi->dw_cfi_oprnd1.dw_cfi_offset = new_cfa->offset; |
647a1567 | 727 | } |
57e16c96 RH |
728 | else if (new_cfa->offset == old_cfa->offset |
729 | && old_cfa->reg != INVALID_REGNUM | |
730 | && !new_cfa->indirect | |
731 | && !old_cfa->indirect) | |
647a1567 RH |
732 | { |
733 | /* Construct a "DW_CFA_def_cfa_register <register>" instruction, | |
734 | indicating the CFA register has changed to <register> but the | |
735 | offset has not changed. */ | |
736 | cfi->dw_cfi_opc = DW_CFA_def_cfa_register; | |
57e16c96 | 737 | cfi->dw_cfi_oprnd1.dw_cfi_reg_num = new_cfa->reg; |
647a1567 | 738 | } |
57e16c96 | 739 | else if (new_cfa->indirect == 0) |
647a1567 RH |
740 | { |
741 | /* Construct a "DW_CFA_def_cfa <register> <offset>" instruction, | |
742 | indicating the CFA register has changed to <register> with | |
743 | the specified offset. The data factoring for DW_CFA_def_cfa_sf | |
744 | happens in output_cfi, or in the assembler via the .cfi_def_cfa | |
745 | directive. */ | |
57e16c96 | 746 | if (new_cfa->offset < 0) |
647a1567 RH |
747 | cfi->dw_cfi_opc = DW_CFA_def_cfa_sf; |
748 | else | |
749 | cfi->dw_cfi_opc = DW_CFA_def_cfa; | |
57e16c96 RH |
750 | cfi->dw_cfi_oprnd1.dw_cfi_reg_num = new_cfa->reg; |
751 | cfi->dw_cfi_oprnd2.dw_cfi_offset = new_cfa->offset; | |
647a1567 RH |
752 | } |
753 | else | |
754 | { | |
755 | /* Construct a DW_CFA_def_cfa_expression instruction to | |
756 | calculate the CFA using a full location expression since no | |
757 | register-offset pair is available. */ | |
84562394 | 758 | struct dw_loc_descr_node *loc_list; |
647a1567 RH |
759 | |
760 | cfi->dw_cfi_opc = DW_CFA_def_cfa_expression; | |
57e16c96 | 761 | loc_list = build_cfa_loc (new_cfa, 0); |
647a1567 RH |
762 | cfi->dw_cfi_oprnd1.dw_cfi_loc = loc_list; |
763 | } | |
764 | ||
57e16c96 RH |
765 | return cfi; |
766 | } | |
767 | ||
768 | /* Similarly, but take OLD_CFA from CUR_ROW, and update it after the fact. */ | |
769 | ||
770 | static void | |
771 | def_cfa_1 (dw_cfa_location *new_cfa) | |
772 | { | |
773 | dw_cfi_ref cfi; | |
774 | ||
43215a89 RH |
775 | if (cur_trace->cfa_store.reg == new_cfa->reg && new_cfa->indirect == 0) |
776 | cur_trace->cfa_store.offset = new_cfa->offset; | |
57e16c96 RH |
777 | |
778 | cfi = def_cfa_0 (&cur_row->cfa, new_cfa); | |
779 | if (cfi) | |
780 | { | |
781 | cur_row->cfa = *new_cfa; | |
8f1594b2 RH |
782 | cur_row->cfa_cfi = (cfi->dw_cfi_opc == DW_CFA_def_cfa_expression |
783 | ? cfi : NULL); | |
57e16c96 RH |
784 | |
785 | add_cfi (cfi); | |
786 | } | |
647a1567 RH |
787 | } |
788 | ||
789 | /* Add the CFI for saving a register. REG is the CFA column number. | |
647a1567 RH |
790 | If SREG is -1, the register is saved at OFFSET from the CFA; |
791 | otherwise it is saved in SREG. */ | |
792 | ||
793 | static void | |
3edb53aa | 794 | reg_save (unsigned int reg, unsigned int sreg, HOST_WIDE_INT offset) |
647a1567 | 795 | { |
3edb53aa | 796 | dw_fde_ref fde = cfun ? cfun->fde : NULL; |
647a1567 | 797 | dw_cfi_ref cfi = new_cfi (); |
647a1567 RH |
798 | |
799 | cfi->dw_cfi_oprnd1.dw_cfi_reg_num = reg; | |
800 | ||
801 | /* When stack is aligned, store REG using DW_CFA_expression with FP. */ | |
802 | if (fde | |
803 | && fde->stack_realign | |
804 | && sreg == INVALID_REGNUM) | |
805 | { | |
806 | cfi->dw_cfi_opc = DW_CFA_expression; | |
807 | cfi->dw_cfi_oprnd1.dw_cfi_reg_num = reg; | |
808 | cfi->dw_cfi_oprnd2.dw_cfi_loc | |
f17d3401 RH |
809 | = build_cfa_aligned_loc (&cur_row->cfa, offset, |
810 | fde->stack_realignment); | |
647a1567 RH |
811 | } |
812 | else if (sreg == INVALID_REGNUM) | |
813 | { | |
814 | if (need_data_align_sf_opcode (offset)) | |
815 | cfi->dw_cfi_opc = DW_CFA_offset_extended_sf; | |
816 | else if (reg & ~0x3f) | |
817 | cfi->dw_cfi_opc = DW_CFA_offset_extended; | |
818 | else | |
819 | cfi->dw_cfi_opc = DW_CFA_offset; | |
820 | cfi->dw_cfi_oprnd2.dw_cfi_offset = offset; | |
821 | } | |
822 | else if (sreg == reg) | |
f1a0e830 RH |
823 | { |
824 | /* While we could emit something like DW_CFA_same_value or | |
825 | DW_CFA_restore, we never expect to see something like that | |
826 | in a prologue. This is more likely to be a bug. A backend | |
827 | can always bypass this by using REG_CFA_RESTORE directly. */ | |
828 | gcc_unreachable (); | |
829 | } | |
647a1567 RH |
830 | else |
831 | { | |
832 | cfi->dw_cfi_opc = DW_CFA_register; | |
833 | cfi->dw_cfi_oprnd2.dw_cfi_reg_num = sreg; | |
834 | } | |
835 | ||
3edb53aa | 836 | add_cfi (cfi); |
f1a0e830 | 837 | update_row_reg_save (cur_row, reg, cfi); |
647a1567 RH |
838 | } |
839 | ||
9a08d230 RH |
840 | /* A subroutine of scan_trace. Check INSN for a REG_ARGS_SIZE note |
841 | and adjust data structures to match. */ | |
647a1567 RH |
842 | |
843 | static void | |
9a08d230 | 844 | notice_args_size (rtx insn) |
647a1567 | 845 | { |
9a08d230 RH |
846 | HOST_WIDE_INT args_size, delta; |
847 | rtx note; | |
647a1567 | 848 | |
9a08d230 RH |
849 | note = find_reg_note (insn, REG_ARGS_SIZE, NULL); |
850 | if (note == NULL) | |
851 | return; | |
f17d3401 | 852 | |
9a08d230 RH |
853 | args_size = INTVAL (XEXP (note, 0)); |
854 | delta = args_size - cur_trace->end_true_args_size; | |
855 | if (delta == 0) | |
856 | return; | |
647a1567 | 857 | |
9a08d230 | 858 | cur_trace->end_true_args_size = args_size; |
43215a89 | 859 | |
9a08d230 RH |
860 | /* If the CFA is computed off the stack pointer, then we must adjust |
861 | the computation of the CFA as well. */ | |
862 | if (cur_cfa->reg == dw_stack_pointer_regnum) | |
863 | { | |
864 | gcc_assert (!cur_cfa->indirect); | |
647a1567 | 865 | |
9a08d230 RH |
866 | /* Convert a change in args_size (always a positive in the |
867 | direction of stack growth) to a change in stack pointer. */ | |
981dc735 | 868 | #ifndef STACK_GROWS_DOWNWARD |
9a08d230 | 869 | delta = -delta; |
981dc735 | 870 | #endif |
9a08d230 RH |
871 | cur_cfa->offset += delta; |
872 | } | |
647a1567 RH |
873 | } |
874 | ||
9a08d230 RH |
875 | /* A subroutine of scan_trace. INSN is can_throw_internal. Update the |
876 | data within the trace related to EH insns and args_size. */ | |
647a1567 RH |
877 | |
878 | static void | |
9a08d230 | 879 | notice_eh_throw (rtx insn) |
647a1567 | 880 | { |
9a08d230 | 881 | HOST_WIDE_INT args_size; |
647a1567 | 882 | |
9a08d230 RH |
883 | args_size = cur_trace->end_true_args_size; |
884 | if (cur_trace->eh_head == NULL) | |
647a1567 | 885 | { |
9a08d230 RH |
886 | cur_trace->eh_head = insn; |
887 | cur_trace->beg_delay_args_size = args_size; | |
888 | cur_trace->end_delay_args_size = args_size; | |
647a1567 | 889 | } |
9a08d230 | 890 | else if (cur_trace->end_delay_args_size != args_size) |
647a1567 | 891 | { |
9a08d230 | 892 | cur_trace->end_delay_args_size = args_size; |
647a1567 | 893 | |
9a08d230 RH |
894 | /* ??? If the CFA is the stack pointer, search backward for the last |
895 | CFI note and insert there. Given that the stack changed for the | |
896 | args_size change, there *must* be such a note in between here and | |
897 | the last eh insn. */ | |
898 | add_cfi_args_size (args_size); | |
899 | } | |
647a1567 RH |
900 | } |
901 | ||
7263c6d7 | 902 | /* Short-hand inline for the very common D_F_R (REGNO (x)) operation. */ |
4f42d714 RH |
903 | /* ??? This ought to go into dwarf2out.h, except that dwarf2out.h is |
904 | used in places where rtl is prohibited. */ | |
7263c6d7 RH |
905 | |
906 | static inline unsigned | |
907 | dwf_regno (const_rtx reg) | |
908 | { | |
362805fc | 909 | gcc_assert (REGNO (reg) < FIRST_PSEUDO_REGISTER); |
4f42d714 | 910 | return DWARF_FRAME_REGNUM (REGNO (reg)); |
7263c6d7 RH |
911 | } |
912 | ||
647a1567 RH |
913 | /* Compare X and Y for equivalence. The inputs may be REGs or PC_RTX. */ |
914 | ||
915 | static bool | |
916 | compare_reg_or_pc (rtx x, rtx y) | |
917 | { | |
918 | if (REG_P (x) && REG_P (y)) | |
919 | return REGNO (x) == REGNO (y); | |
920 | return x == y; | |
921 | } | |
922 | ||
923 | /* Record SRC as being saved in DEST. DEST may be null to delete an | |
924 | existing entry. SRC may be a register or PC_RTX. */ | |
925 | ||
926 | static void | |
927 | record_reg_saved_in_reg (rtx dest, rtx src) | |
928 | { | |
929 | reg_saved_in_data *elt; | |
930 | size_t i; | |
931 | ||
9771b263 | 932 | FOR_EACH_VEC_ELT (cur_trace->regs_saved_in_regs, i, elt) |
647a1567 RH |
933 | if (compare_reg_or_pc (elt->orig_reg, src)) |
934 | { | |
935 | if (dest == NULL) | |
9771b263 | 936 | cur_trace->regs_saved_in_regs.unordered_remove (i); |
647a1567 RH |
937 | else |
938 | elt->saved_in_reg = dest; | |
939 | return; | |
940 | } | |
941 | ||
942 | if (dest == NULL) | |
943 | return; | |
944 | ||
f32682ca | 945 | reg_saved_in_data e = {src, dest}; |
9771b263 | 946 | cur_trace->regs_saved_in_regs.safe_push (e); |
647a1567 RH |
947 | } |
948 | ||
647a1567 RH |
949 | /* Add an entry to QUEUED_REG_SAVES saying that REG is now saved at |
950 | SREG, or if SREG is NULL then it is saved at OFFSET to the CFA. */ | |
951 | ||
952 | static void | |
89e25f95 | 953 | queue_reg_save (rtx reg, rtx sreg, HOST_WIDE_INT offset) |
647a1567 | 954 | { |
999646c1 | 955 | queued_reg_save *q; |
f32682ca | 956 | queued_reg_save e = {reg, sreg, offset}; |
999646c1 | 957 | size_t i; |
647a1567 RH |
958 | |
959 | /* Duplicates waste space, but it's also necessary to remove them | |
a8e5c0e7 | 960 | for correctness, since the queue gets output in reverse order. */ |
9771b263 | 961 | FOR_EACH_VEC_ELT (queued_reg_saves, i, q) |
a8e5c0e7 | 962 | if (compare_reg_or_pc (q->reg, reg)) |
f32682ca DN |
963 | { |
964 | *q = e; | |
965 | return; | |
966 | } | |
647a1567 | 967 | |
9771b263 | 968 | queued_reg_saves.safe_push (e); |
647a1567 RH |
969 | } |
970 | ||
971 | /* Output all the entries in QUEUED_REG_SAVES. */ | |
972 | ||
973 | static void | |
974 | dwarf2out_flush_queued_reg_saves (void) | |
975 | { | |
999646c1 RH |
976 | queued_reg_save *q; |
977 | size_t i; | |
647a1567 | 978 | |
9771b263 | 979 | FOR_EACH_VEC_ELT (queued_reg_saves, i, q) |
647a1567 RH |
980 | { |
981 | unsigned int reg, sreg; | |
982 | ||
983 | record_reg_saved_in_reg (q->saved_reg, q->reg); | |
984 | ||
a8e5c0e7 RH |
985 | if (q->reg == pc_rtx) |
986 | reg = DWARF_FRAME_RETURN_COLUMN; | |
987 | else | |
7263c6d7 | 988 | reg = dwf_regno (q->reg); |
647a1567 | 989 | if (q->saved_reg) |
7263c6d7 | 990 | sreg = dwf_regno (q->saved_reg); |
647a1567 RH |
991 | else |
992 | sreg = INVALID_REGNUM; | |
3edb53aa | 993 | reg_save (reg, sreg, q->cfa_offset); |
647a1567 RH |
994 | } |
995 | ||
9771b263 | 996 | queued_reg_saves.truncate (0); |
647a1567 RH |
997 | } |
998 | ||
999 | /* Does INSN clobber any register which QUEUED_REG_SAVES lists a saved | |
1000 | location for? Or, does it clobber a register which we've previously | |
1001 | said that some other register is saved in, and for which we now | |
1002 | have a new location for? */ | |
1003 | ||
1004 | static bool | |
1005 | clobbers_queued_reg_save (const_rtx insn) | |
1006 | { | |
999646c1 RH |
1007 | queued_reg_save *q; |
1008 | size_t iq; | |
647a1567 | 1009 | |
9771b263 | 1010 | FOR_EACH_VEC_ELT (queued_reg_saves, iq, q) |
647a1567 | 1011 | { |
999646c1 | 1012 | size_t ir; |
647a1567 RH |
1013 | reg_saved_in_data *rir; |
1014 | ||
1015 | if (modified_in_p (q->reg, insn)) | |
1016 | return true; | |
1017 | ||
9771b263 | 1018 | FOR_EACH_VEC_ELT (cur_trace->regs_saved_in_regs, ir, rir) |
647a1567 RH |
1019 | if (compare_reg_or_pc (q->reg, rir->orig_reg) |
1020 | && modified_in_p (rir->saved_in_reg, insn)) | |
1021 | return true; | |
1022 | } | |
1023 | ||
1024 | return false; | |
1025 | } | |
1026 | ||
1027 | /* What register, if any, is currently saved in REG? */ | |
1028 | ||
1029 | static rtx | |
1030 | reg_saved_in (rtx reg) | |
1031 | { | |
1032 | unsigned int regn = REGNO (reg); | |
999646c1 | 1033 | queued_reg_save *q; |
647a1567 RH |
1034 | reg_saved_in_data *rir; |
1035 | size_t i; | |
1036 | ||
9771b263 | 1037 | FOR_EACH_VEC_ELT (queued_reg_saves, i, q) |
647a1567 RH |
1038 | if (q->saved_reg && regn == REGNO (q->saved_reg)) |
1039 | return q->reg; | |
1040 | ||
9771b263 | 1041 | FOR_EACH_VEC_ELT (cur_trace->regs_saved_in_regs, i, rir) |
647a1567 RH |
1042 | if (regn == REGNO (rir->saved_in_reg)) |
1043 | return rir->orig_reg; | |
1044 | ||
1045 | return NULL_RTX; | |
1046 | } | |
1047 | ||
647a1567 RH |
1048 | /* A subroutine of dwarf2out_frame_debug, process a REG_DEF_CFA note. */ |
1049 | ||
1050 | static void | |
89e25f95 | 1051 | dwarf2out_frame_debug_def_cfa (rtx pat) |
647a1567 | 1052 | { |
9a08d230 | 1053 | memset (cur_cfa, 0, sizeof (*cur_cfa)); |
647a1567 | 1054 | |
8f1594b2 | 1055 | if (GET_CODE (pat) == PLUS) |
647a1567 | 1056 | { |
9a08d230 | 1057 | cur_cfa->offset = INTVAL (XEXP (pat, 1)); |
8f1594b2 RH |
1058 | pat = XEXP (pat, 0); |
1059 | } | |
1060 | if (MEM_P (pat)) | |
1061 | { | |
9a08d230 | 1062 | cur_cfa->indirect = 1; |
647a1567 RH |
1063 | pat = XEXP (pat, 0); |
1064 | if (GET_CODE (pat) == PLUS) | |
1065 | { | |
9a08d230 | 1066 | cur_cfa->base_offset = INTVAL (XEXP (pat, 1)); |
647a1567 RH |
1067 | pat = XEXP (pat, 0); |
1068 | } | |
647a1567 | 1069 | } |
8f1594b2 RH |
1070 | /* ??? If this fails, we could be calling into the _loc functions to |
1071 | define a full expression. So far no port does that. */ | |
1072 | gcc_assert (REG_P (pat)); | |
9a08d230 | 1073 | cur_cfa->reg = dwf_regno (pat); |
647a1567 RH |
1074 | } |
1075 | ||
1076 | /* A subroutine of dwarf2out_frame_debug, process a REG_ADJUST_CFA note. */ | |
1077 | ||
1078 | static void | |
89e25f95 | 1079 | dwarf2out_frame_debug_adjust_cfa (rtx pat) |
647a1567 RH |
1080 | { |
1081 | rtx src, dest; | |
1082 | ||
1083 | gcc_assert (GET_CODE (pat) == SET); | |
1084 | dest = XEXP (pat, 0); | |
1085 | src = XEXP (pat, 1); | |
1086 | ||
1087 | switch (GET_CODE (src)) | |
1088 | { | |
1089 | case PLUS: | |
9a08d230 RH |
1090 | gcc_assert (dwf_regno (XEXP (src, 0)) == cur_cfa->reg); |
1091 | cur_cfa->offset -= INTVAL (XEXP (src, 1)); | |
647a1567 RH |
1092 | break; |
1093 | ||
1094 | case REG: | |
9a08d230 | 1095 | break; |
647a1567 RH |
1096 | |
1097 | default: | |
9a08d230 | 1098 | gcc_unreachable (); |
647a1567 RH |
1099 | } |
1100 | ||
9a08d230 RH |
1101 | cur_cfa->reg = dwf_regno (dest); |
1102 | gcc_assert (cur_cfa->indirect == 0); | |
647a1567 RH |
1103 | } |
1104 | ||
1105 | /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_OFFSET note. */ | |
1106 | ||
1107 | static void | |
89e25f95 | 1108 | dwarf2out_frame_debug_cfa_offset (rtx set) |
647a1567 RH |
1109 | { |
1110 | HOST_WIDE_INT offset; | |
1111 | rtx src, addr, span; | |
1112 | unsigned int sregno; | |
1113 | ||
1114 | src = XEXP (set, 1); | |
1115 | addr = XEXP (set, 0); | |
1116 | gcc_assert (MEM_P (addr)); | |
1117 | addr = XEXP (addr, 0); | |
1118 | ||
1119 | /* As documented, only consider extremely simple addresses. */ | |
1120 | switch (GET_CODE (addr)) | |
1121 | { | |
1122 | case REG: | |
9a08d230 RH |
1123 | gcc_assert (dwf_regno (addr) == cur_cfa->reg); |
1124 | offset = -cur_cfa->offset; | |
647a1567 RH |
1125 | break; |
1126 | case PLUS: | |
9a08d230 RH |
1127 | gcc_assert (dwf_regno (XEXP (addr, 0)) == cur_cfa->reg); |
1128 | offset = INTVAL (XEXP (addr, 1)) - cur_cfa->offset; | |
647a1567 RH |
1129 | break; |
1130 | default: | |
1131 | gcc_unreachable (); | |
1132 | } | |
1133 | ||
1134 | if (src == pc_rtx) | |
1135 | { | |
1136 | span = NULL; | |
1137 | sregno = DWARF_FRAME_RETURN_COLUMN; | |
1138 | } | |
43215a89 | 1139 | else |
647a1567 RH |
1140 | { |
1141 | span = targetm.dwarf_register_span (src); | |
7263c6d7 | 1142 | sregno = dwf_regno (src); |
647a1567 RH |
1143 | } |
1144 | ||
1145 | /* ??? We'd like to use queue_reg_save, but we need to come up with | |
1146 | a different flushing heuristic for epilogues. */ | |
1147 | if (!span) | |
3edb53aa | 1148 | reg_save (sregno, INVALID_REGNUM, offset); |
647a1567 RH |
1149 | else |
1150 | { | |
1151 | /* We have a PARALLEL describing where the contents of SRC live. | |
a4d47cac | 1152 | Adjust the offset for each piece of the PARALLEL. */ |
647a1567 RH |
1153 | HOST_WIDE_INT span_offset = offset; |
1154 | ||
1155 | gcc_assert (GET_CODE (span) == PARALLEL); | |
1156 | ||
a4d47cac EB |
1157 | const int par_len = XVECLEN (span, 0); |
1158 | for (int par_index = 0; par_index < par_len; par_index++) | |
647a1567 RH |
1159 | { |
1160 | rtx elem = XVECEXP (span, 0, par_index); | |
7263c6d7 | 1161 | sregno = dwf_regno (src); |
3edb53aa | 1162 | reg_save (sregno, INVALID_REGNUM, span_offset); |
647a1567 RH |
1163 | span_offset += GET_MODE_SIZE (GET_MODE (elem)); |
1164 | } | |
1165 | } | |
1166 | } | |
1167 | ||
1168 | /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_REGISTER note. */ | |
1169 | ||
1170 | static void | |
89e25f95 | 1171 | dwarf2out_frame_debug_cfa_register (rtx set) |
647a1567 RH |
1172 | { |
1173 | rtx src, dest; | |
1174 | unsigned sregno, dregno; | |
1175 | ||
1176 | src = XEXP (set, 1); | |
1177 | dest = XEXP (set, 0); | |
1178 | ||
a8e5c0e7 | 1179 | record_reg_saved_in_reg (dest, src); |
647a1567 RH |
1180 | if (src == pc_rtx) |
1181 | sregno = DWARF_FRAME_RETURN_COLUMN; | |
1182 | else | |
7263c6d7 | 1183 | sregno = dwf_regno (src); |
647a1567 | 1184 | |
7263c6d7 | 1185 | dregno = dwf_regno (dest); |
647a1567 RH |
1186 | |
1187 | /* ??? We'd like to use queue_reg_save, but we need to come up with | |
1188 | a different flushing heuristic for epilogues. */ | |
3edb53aa | 1189 | reg_save (sregno, dregno, 0); |
647a1567 RH |
1190 | } |
1191 | ||
1192 | /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_EXPRESSION note. */ | |
1193 | ||
1194 | static void | |
89e25f95 | 1195 | dwarf2out_frame_debug_cfa_expression (rtx set) |
647a1567 RH |
1196 | { |
1197 | rtx src, dest, span; | |
1198 | dw_cfi_ref cfi = new_cfi (); | |
f1a0e830 | 1199 | unsigned regno; |
647a1567 RH |
1200 | |
1201 | dest = SET_DEST (set); | |
1202 | src = SET_SRC (set); | |
1203 | ||
1204 | gcc_assert (REG_P (src)); | |
1205 | gcc_assert (MEM_P (dest)); | |
1206 | ||
1207 | span = targetm.dwarf_register_span (src); | |
1208 | gcc_assert (!span); | |
1209 | ||
f1a0e830 RH |
1210 | regno = dwf_regno (src); |
1211 | ||
647a1567 | 1212 | cfi->dw_cfi_opc = DW_CFA_expression; |
f1a0e830 | 1213 | cfi->dw_cfi_oprnd1.dw_cfi_reg_num = regno; |
647a1567 RH |
1214 | cfi->dw_cfi_oprnd2.dw_cfi_loc |
1215 | = mem_loc_descriptor (XEXP (dest, 0), get_address_mode (dest), | |
1216 | GET_MODE (dest), VAR_INIT_STATUS_INITIALIZED); | |
1217 | ||
1218 | /* ??? We'd like to use queue_reg_save, were the interface different, | |
1219 | and, as above, we could manage flushing for epilogues. */ | |
3edb53aa | 1220 | add_cfi (cfi); |
f1a0e830 | 1221 | update_row_reg_save (cur_row, regno, cfi); |
647a1567 RH |
1222 | } |
1223 | ||
1224 | /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_RESTORE note. */ | |
1225 | ||
1226 | static void | |
89e25f95 | 1227 | dwarf2out_frame_debug_cfa_restore (rtx reg) |
647a1567 | 1228 | { |
a4d47cac EB |
1229 | gcc_assert (REG_P (reg)); |
1230 | ||
1231 | rtx span = targetm.dwarf_register_span (reg); | |
1232 | if (!span) | |
1233 | { | |
1234 | unsigned int regno = dwf_regno (reg); | |
1235 | add_cfi_restore (regno); | |
1236 | update_row_reg_save (cur_row, regno, NULL); | |
1237 | } | |
1238 | else | |
1239 | { | |
1240 | /* We have a PARALLEL describing where the contents of REG live. | |
1241 | Restore the register for each piece of the PARALLEL. */ | |
1242 | gcc_assert (GET_CODE (span) == PARALLEL); | |
647a1567 | 1243 | |
a4d47cac EB |
1244 | const int par_len = XVECLEN (span, 0); |
1245 | for (int par_index = 0; par_index < par_len; par_index++) | |
1246 | { | |
1247 | reg = XVECEXP (span, 0, par_index); | |
1248 | gcc_assert (REG_P (reg)); | |
1249 | unsigned int regno = dwf_regno (reg); | |
1250 | add_cfi_restore (regno); | |
1251 | update_row_reg_save (cur_row, regno, NULL); | |
1252 | } | |
1253 | } | |
647a1567 RH |
1254 | } |
1255 | ||
1256 | /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_WINDOW_SAVE. | |
1257 | ??? Perhaps we should note in the CIE where windows are saved (instead of | |
1258 | assuming 0(cfa)) and what registers are in the window. */ | |
1259 | ||
1260 | static void | |
89e25f95 | 1261 | dwarf2out_frame_debug_cfa_window_save (void) |
647a1567 RH |
1262 | { |
1263 | dw_cfi_ref cfi = new_cfi (); | |
1264 | ||
1265 | cfi->dw_cfi_opc = DW_CFA_GNU_window_save; | |
3edb53aa | 1266 | add_cfi (cfi); |
647a1567 RH |
1267 | } |
1268 | ||
1269 | /* Record call frame debugging information for an expression EXPR, | |
1270 | which either sets SP or FP (adjusting how we calculate the frame | |
1271 | address) or saves a register to the stack or another register. | |
1272 | LABEL indicates the address of EXPR. | |
1273 | ||
1274 | This function encodes a state machine mapping rtxes to actions on | |
1275 | cfa, cfa_store, and cfa_temp.reg. We describe these rules so | |
1276 | users need not read the source code. | |
1277 | ||
1278 | The High-Level Picture | |
1279 | ||
1280 | Changes in the register we use to calculate the CFA: Currently we | |
1281 | assume that if you copy the CFA register into another register, we | |
1282 | should take the other one as the new CFA register; this seems to | |
1283 | work pretty well. If it's wrong for some target, it's simple | |
1284 | enough not to set RTX_FRAME_RELATED_P on the insn in question. | |
1285 | ||
1286 | Changes in the register we use for saving registers to the stack: | |
1287 | This is usually SP, but not always. Again, we deduce that if you | |
1288 | copy SP into another register (and SP is not the CFA register), | |
1289 | then the new register is the one we will be using for register | |
1290 | saves. This also seems to work. | |
1291 | ||
1292 | Register saves: There's not much guesswork about this one; if | |
1293 | RTX_FRAME_RELATED_P is set on an insn which modifies memory, it's a | |
1294 | register save, and the register used to calculate the destination | |
1295 | had better be the one we think we're using for this purpose. | |
1296 | It's also assumed that a copy from a call-saved register to another | |
1297 | register is saving that register if RTX_FRAME_RELATED_P is set on | |
1298 | that instruction. If the copy is from a call-saved register to | |
1299 | the *same* register, that means that the register is now the same | |
1300 | value as in the caller. | |
1301 | ||
1302 | Except: If the register being saved is the CFA register, and the | |
1303 | offset is nonzero, we are saving the CFA, so we assume we have to | |
1304 | use DW_CFA_def_cfa_expression. If the offset is 0, we assume that | |
1305 | the intent is to save the value of SP from the previous frame. | |
1306 | ||
1307 | In addition, if a register has previously been saved to a different | |
1308 | register, | |
1309 | ||
1310 | Invariants / Summaries of Rules | |
1311 | ||
1312 | cfa current rule for calculating the CFA. It usually | |
f17d3401 | 1313 | consists of a register and an offset. This is |
9a08d230 | 1314 | actually stored in *cur_cfa, but abbreviated |
f17d3401 | 1315 | for the purposes of this documentation. |
647a1567 RH |
1316 | cfa_store register used by prologue code to save things to the stack |
1317 | cfa_store.offset is the offset from the value of | |
1318 | cfa_store.reg to the actual CFA | |
1319 | cfa_temp register holding an integral value. cfa_temp.offset | |
1320 | stores the value, which will be used to adjust the | |
1321 | stack pointer. cfa_temp is also used like cfa_store, | |
1322 | to track stores to the stack via fp or a temp reg. | |
1323 | ||
1324 | Rules 1- 4: Setting a register's value to cfa.reg or an expression | |
1325 | with cfa.reg as the first operand changes the cfa.reg and its | |
1326 | cfa.offset. Rule 1 and 4 also set cfa_temp.reg and | |
1327 | cfa_temp.offset. | |
1328 | ||
1329 | Rules 6- 9: Set a non-cfa.reg register value to a constant or an | |
1330 | expression yielding a constant. This sets cfa_temp.reg | |
1331 | and cfa_temp.offset. | |
1332 | ||
1333 | Rule 5: Create a new register cfa_store used to save items to the | |
1334 | stack. | |
1335 | ||
1336 | Rules 10-14: Save a register to the stack. Define offset as the | |
1337 | difference of the original location and cfa_store's | |
1338 | location (or cfa_temp's location if cfa_temp is used). | |
1339 | ||
1340 | Rules 16-20: If AND operation happens on sp in prologue, we assume | |
1341 | stack is realigned. We will use a group of DW_OP_XXX | |
1342 | expressions to represent the location of the stored | |
1343 | register instead of CFA+offset. | |
1344 | ||
1345 | The Rules | |
1346 | ||
1347 | "{a,b}" indicates a choice of a xor b. | |
1348 | "<reg>:cfa.reg" indicates that <reg> must equal cfa.reg. | |
1349 | ||
1350 | Rule 1: | |
1351 | (set <reg1> <reg2>:cfa.reg) | |
1352 | effects: cfa.reg = <reg1> | |
1353 | cfa.offset unchanged | |
1354 | cfa_temp.reg = <reg1> | |
1355 | cfa_temp.offset = cfa.offset | |
1356 | ||
1357 | Rule 2: | |
1358 | (set sp ({minus,plus,losum} {sp,fp}:cfa.reg | |
1359 | {<const_int>,<reg>:cfa_temp.reg})) | |
1360 | effects: cfa.reg = sp if fp used | |
1361 | cfa.offset += {+/- <const_int>, cfa_temp.offset} if cfa.reg==sp | |
1362 | cfa_store.offset += {+/- <const_int>, cfa_temp.offset} | |
1363 | if cfa_store.reg==sp | |
1364 | ||
1365 | Rule 3: | |
1366 | (set fp ({minus,plus,losum} <reg>:cfa.reg <const_int>)) | |
1367 | effects: cfa.reg = fp | |
1368 | cfa_offset += +/- <const_int> | |
1369 | ||
1370 | Rule 4: | |
1371 | (set <reg1> ({plus,losum} <reg2>:cfa.reg <const_int>)) | |
1372 | constraints: <reg1> != fp | |
1373 | <reg1> != sp | |
1374 | effects: cfa.reg = <reg1> | |
1375 | cfa_temp.reg = <reg1> | |
1376 | cfa_temp.offset = cfa.offset | |
1377 | ||
1378 | Rule 5: | |
1379 | (set <reg1> (plus <reg2>:cfa_temp.reg sp:cfa.reg)) | |
1380 | constraints: <reg1> != fp | |
1381 | <reg1> != sp | |
1382 | effects: cfa_store.reg = <reg1> | |
1383 | cfa_store.offset = cfa.offset - cfa_temp.offset | |
1384 | ||
1385 | Rule 6: | |
1386 | (set <reg> <const_int>) | |
1387 | effects: cfa_temp.reg = <reg> | |
1388 | cfa_temp.offset = <const_int> | |
1389 | ||
1390 | Rule 7: | |
1391 | (set <reg1>:cfa_temp.reg (ior <reg2>:cfa_temp.reg <const_int>)) | |
1392 | effects: cfa_temp.reg = <reg1> | |
1393 | cfa_temp.offset |= <const_int> | |
1394 | ||
1395 | Rule 8: | |
1396 | (set <reg> (high <exp>)) | |
1397 | effects: none | |
1398 | ||
1399 | Rule 9: | |
1400 | (set <reg> (lo_sum <exp> <const_int>)) | |
1401 | effects: cfa_temp.reg = <reg> | |
1402 | cfa_temp.offset = <const_int> | |
1403 | ||
1404 | Rule 10: | |
1405 | (set (mem ({pre,post}_modify sp:cfa_store (???? <reg1> <const_int>))) <reg2>) | |
1406 | effects: cfa_store.offset -= <const_int> | |
1407 | cfa.offset = cfa_store.offset if cfa.reg == sp | |
1408 | cfa.reg = sp | |
1409 | cfa.base_offset = -cfa_store.offset | |
1410 | ||
1411 | Rule 11: | |
1412 | (set (mem ({pre_inc,pre_dec,post_dec} sp:cfa_store.reg)) <reg>) | |
1413 | effects: cfa_store.offset += -/+ mode_size(mem) | |
1414 | cfa.offset = cfa_store.offset if cfa.reg == sp | |
1415 | cfa.reg = sp | |
1416 | cfa.base_offset = -cfa_store.offset | |
1417 | ||
1418 | Rule 12: | |
1419 | (set (mem ({minus,plus,losum} <reg1>:{cfa_store,cfa_temp} <const_int>)) | |
1420 | ||
1421 | <reg2>) | |
1422 | effects: cfa.reg = <reg1> | |
1423 | cfa.base_offset = -/+ <const_int> - {cfa_store,cfa_temp}.offset | |
1424 | ||
1425 | Rule 13: | |
1426 | (set (mem <reg1>:{cfa_store,cfa_temp}) <reg2>) | |
1427 | effects: cfa.reg = <reg1> | |
1428 | cfa.base_offset = -{cfa_store,cfa_temp}.offset | |
1429 | ||
1430 | Rule 14: | |
1431 | (set (mem (post_inc <reg1>:cfa_temp <const_int>)) <reg2>) | |
1432 | effects: cfa.reg = <reg1> | |
1433 | cfa.base_offset = -cfa_temp.offset | |
1434 | cfa_temp.offset -= mode_size(mem) | |
1435 | ||
1436 | Rule 15: | |
1437 | (set <reg> {unspec, unspec_volatile}) | |
1438 | effects: target-dependent | |
1439 | ||
1440 | Rule 16: | |
1441 | (set sp (and: sp <const_int>)) | |
1442 | constraints: cfa_store.reg == sp | |
a518b996 | 1443 | effects: cfun->fde.stack_realign = 1 |
647a1567 RH |
1444 | cfa_store.offset = 0 |
1445 | fde->drap_reg = cfa.reg if cfa.reg != sp and cfa.reg != fp | |
1446 | ||
1447 | Rule 17: | |
1448 | (set (mem ({pre_inc, pre_dec} sp)) (mem (plus (cfa.reg) (const_int)))) | |
1449 | effects: cfa_store.offset += -/+ mode_size(mem) | |
1450 | ||
1451 | Rule 18: | |
1452 | (set (mem ({pre_inc, pre_dec} sp)) fp) | |
1453 | constraints: fde->stack_realign == 1 | |
1454 | effects: cfa_store.offset = 0 | |
1455 | cfa.reg != HARD_FRAME_POINTER_REGNUM | |
1456 | ||
1457 | Rule 19: | |
1458 | (set (mem ({pre_inc, pre_dec} sp)) cfa.reg) | |
1459 | constraints: fde->stack_realign == 1 | |
1460 | && cfa.offset == 0 | |
1461 | && cfa.indirect == 0 | |
1462 | && cfa.reg != HARD_FRAME_POINTER_REGNUM | |
1463 | effects: Use DW_CFA_def_cfa_expression to define cfa | |
1464 | cfa.reg == fde->drap_reg */ | |
1465 | ||
1466 | static void | |
89e25f95 | 1467 | dwarf2out_frame_debug_expr (rtx expr) |
647a1567 RH |
1468 | { |
1469 | rtx src, dest, span; | |
1470 | HOST_WIDE_INT offset; | |
1471 | dw_fde_ref fde; | |
1472 | ||
1473 | /* If RTX_FRAME_RELATED_P is set on a PARALLEL, process each member of | |
1474 | the PARALLEL independently. The first element is always processed if | |
1475 | it is a SET. This is for backward compatibility. Other elements | |
1476 | are processed only if they are SETs and the RTX_FRAME_RELATED_P | |
1477 | flag is set in them. */ | |
1478 | if (GET_CODE (expr) == PARALLEL || GET_CODE (expr) == SEQUENCE) | |
1479 | { | |
1480 | int par_index; | |
1481 | int limit = XVECLEN (expr, 0); | |
1482 | rtx elem; | |
1483 | ||
1484 | /* PARALLELs have strict read-modify-write semantics, so we | |
1485 | ought to evaluate every rvalue before changing any lvalue. | |
1486 | It's cumbersome to do that in general, but there's an | |
1487 | easy approximation that is enough for all current users: | |
1488 | handle register saves before register assignments. */ | |
1489 | if (GET_CODE (expr) == PARALLEL) | |
1490 | for (par_index = 0; par_index < limit; par_index++) | |
1491 | { | |
1492 | elem = XVECEXP (expr, 0, par_index); | |
1493 | if (GET_CODE (elem) == SET | |
1494 | && MEM_P (SET_DEST (elem)) | |
1495 | && (RTX_FRAME_RELATED_P (elem) || par_index == 0)) | |
89e25f95 | 1496 | dwarf2out_frame_debug_expr (elem); |
647a1567 RH |
1497 | } |
1498 | ||
1499 | for (par_index = 0; par_index < limit; par_index++) | |
1500 | { | |
1501 | elem = XVECEXP (expr, 0, par_index); | |
1502 | if (GET_CODE (elem) == SET | |
1503 | && (!MEM_P (SET_DEST (elem)) || GET_CODE (expr) == SEQUENCE) | |
1504 | && (RTX_FRAME_RELATED_P (elem) || par_index == 0)) | |
89e25f95 | 1505 | dwarf2out_frame_debug_expr (elem); |
647a1567 RH |
1506 | } |
1507 | return; | |
1508 | } | |
1509 | ||
1510 | gcc_assert (GET_CODE (expr) == SET); | |
1511 | ||
1512 | src = SET_SRC (expr); | |
1513 | dest = SET_DEST (expr); | |
1514 | ||
1515 | if (REG_P (src)) | |
1516 | { | |
1517 | rtx rsi = reg_saved_in (src); | |
1518 | if (rsi) | |
1519 | src = rsi; | |
1520 | } | |
1521 | ||
a518b996 | 1522 | fde = cfun->fde; |
647a1567 RH |
1523 | |
1524 | switch (GET_CODE (dest)) | |
1525 | { | |
1526 | case REG: | |
1527 | switch (GET_CODE (src)) | |
1528 | { | |
1529 | /* Setting FP from SP. */ | |
1530 | case REG: | |
9a08d230 | 1531 | if (cur_cfa->reg == dwf_regno (src)) |
647a1567 RH |
1532 | { |
1533 | /* Rule 1 */ | |
1534 | /* Update the CFA rule wrt SP or FP. Make sure src is | |
1535 | relative to the current CFA register. | |
1536 | ||
1537 | We used to require that dest be either SP or FP, but the | |
1538 | ARM copies SP to a temporary register, and from there to | |
1539 | FP. So we just rely on the backends to only set | |
1540 | RTX_FRAME_RELATED_P on appropriate insns. */ | |
9a08d230 RH |
1541 | cur_cfa->reg = dwf_regno (dest); |
1542 | cur_trace->cfa_temp.reg = cur_cfa->reg; | |
1543 | cur_trace->cfa_temp.offset = cur_cfa->offset; | |
647a1567 RH |
1544 | } |
1545 | else | |
1546 | { | |
1547 | /* Saving a register in a register. */ | |
1548 | gcc_assert (!fixed_regs [REGNO (dest)] | |
1549 | /* For the SPARC and its register window. */ | |
7263c6d7 | 1550 | || (dwf_regno (src) == DWARF_FRAME_RETURN_COLUMN)); |
647a1567 RH |
1551 | |
1552 | /* After stack is aligned, we can only save SP in FP | |
1553 | if drap register is used. In this case, we have | |
1554 | to restore stack pointer with the CFA value and we | |
1555 | don't generate this DWARF information. */ | |
1556 | if (fde | |
1557 | && fde->stack_realign | |
1558 | && REGNO (src) == STACK_POINTER_REGNUM) | |
1559 | gcc_assert (REGNO (dest) == HARD_FRAME_POINTER_REGNUM | |
1560 | && fde->drap_reg != INVALID_REGNUM | |
9a08d230 | 1561 | && cur_cfa->reg != dwf_regno (src)); |
647a1567 | 1562 | else |
89e25f95 | 1563 | queue_reg_save (src, dest, 0); |
647a1567 RH |
1564 | } |
1565 | break; | |
1566 | ||
1567 | case PLUS: | |
1568 | case MINUS: | |
1569 | case LO_SUM: | |
1570 | if (dest == stack_pointer_rtx) | |
1571 | { | |
1572 | /* Rule 2 */ | |
1573 | /* Adjusting SP. */ | |
1574 | switch (GET_CODE (XEXP (src, 1))) | |
1575 | { | |
1576 | case CONST_INT: | |
1577 | offset = INTVAL (XEXP (src, 1)); | |
1578 | break; | |
1579 | case REG: | |
43215a89 RH |
1580 | gcc_assert (dwf_regno (XEXP (src, 1)) |
1581 | == cur_trace->cfa_temp.reg); | |
1582 | offset = cur_trace->cfa_temp.offset; | |
647a1567 RH |
1583 | break; |
1584 | default: | |
1585 | gcc_unreachable (); | |
1586 | } | |
1587 | ||
1588 | if (XEXP (src, 0) == hard_frame_pointer_rtx) | |
1589 | { | |
1590 | /* Restoring SP from FP in the epilogue. */ | |
9a08d230 RH |
1591 | gcc_assert (cur_cfa->reg == dw_frame_pointer_regnum); |
1592 | cur_cfa->reg = dw_stack_pointer_regnum; | |
647a1567 RH |
1593 | } |
1594 | else if (GET_CODE (src) == LO_SUM) | |
1595 | /* Assume we've set the source reg of the LO_SUM from sp. */ | |
1596 | ; | |
1597 | else | |
1598 | gcc_assert (XEXP (src, 0) == stack_pointer_rtx); | |
1599 | ||
1600 | if (GET_CODE (src) != MINUS) | |
1601 | offset = -offset; | |
9a08d230 RH |
1602 | if (cur_cfa->reg == dw_stack_pointer_regnum) |
1603 | cur_cfa->offset += offset; | |
43215a89 RH |
1604 | if (cur_trace->cfa_store.reg == dw_stack_pointer_regnum) |
1605 | cur_trace->cfa_store.offset += offset; | |
647a1567 RH |
1606 | } |
1607 | else if (dest == hard_frame_pointer_rtx) | |
1608 | { | |
1609 | /* Rule 3 */ | |
1610 | /* Either setting the FP from an offset of the SP, | |
1611 | or adjusting the FP */ | |
1612 | gcc_assert (frame_pointer_needed); | |
1613 | ||
1614 | gcc_assert (REG_P (XEXP (src, 0)) | |
9a08d230 | 1615 | && dwf_regno (XEXP (src, 0)) == cur_cfa->reg |
647a1567 RH |
1616 | && CONST_INT_P (XEXP (src, 1))); |
1617 | offset = INTVAL (XEXP (src, 1)); | |
1618 | if (GET_CODE (src) != MINUS) | |
1619 | offset = -offset; | |
9a08d230 RH |
1620 | cur_cfa->offset += offset; |
1621 | cur_cfa->reg = dw_frame_pointer_regnum; | |
647a1567 RH |
1622 | } |
1623 | else | |
1624 | { | |
1625 | gcc_assert (GET_CODE (src) != MINUS); | |
1626 | ||
1627 | /* Rule 4 */ | |
1628 | if (REG_P (XEXP (src, 0)) | |
9a08d230 | 1629 | && dwf_regno (XEXP (src, 0)) == cur_cfa->reg |
647a1567 RH |
1630 | && CONST_INT_P (XEXP (src, 1))) |
1631 | { | |
1632 | /* Setting a temporary CFA register that will be copied | |
1633 | into the FP later on. */ | |
1634 | offset = - INTVAL (XEXP (src, 1)); | |
9a08d230 RH |
1635 | cur_cfa->offset += offset; |
1636 | cur_cfa->reg = dwf_regno (dest); | |
647a1567 | 1637 | /* Or used to save regs to the stack. */ |
9a08d230 RH |
1638 | cur_trace->cfa_temp.reg = cur_cfa->reg; |
1639 | cur_trace->cfa_temp.offset = cur_cfa->offset; | |
647a1567 RH |
1640 | } |
1641 | ||
1642 | /* Rule 5 */ | |
1643 | else if (REG_P (XEXP (src, 0)) | |
43215a89 | 1644 | && dwf_regno (XEXP (src, 0)) == cur_trace->cfa_temp.reg |
647a1567 RH |
1645 | && XEXP (src, 1) == stack_pointer_rtx) |
1646 | { | |
1647 | /* Setting a scratch register that we will use instead | |
1648 | of SP for saving registers to the stack. */ | |
9a08d230 | 1649 | gcc_assert (cur_cfa->reg == dw_stack_pointer_regnum); |
43215a89 RH |
1650 | cur_trace->cfa_store.reg = dwf_regno (dest); |
1651 | cur_trace->cfa_store.offset | |
9a08d230 | 1652 | = cur_cfa->offset - cur_trace->cfa_temp.offset; |
647a1567 RH |
1653 | } |
1654 | ||
1655 | /* Rule 9 */ | |
1656 | else if (GET_CODE (src) == LO_SUM | |
1657 | && CONST_INT_P (XEXP (src, 1))) | |
1658 | { | |
43215a89 RH |
1659 | cur_trace->cfa_temp.reg = dwf_regno (dest); |
1660 | cur_trace->cfa_temp.offset = INTVAL (XEXP (src, 1)); | |
647a1567 RH |
1661 | } |
1662 | else | |
1663 | gcc_unreachable (); | |
1664 | } | |
1665 | break; | |
1666 | ||
1667 | /* Rule 6 */ | |
1668 | case CONST_INT: | |
43215a89 RH |
1669 | cur_trace->cfa_temp.reg = dwf_regno (dest); |
1670 | cur_trace->cfa_temp.offset = INTVAL (src); | |
647a1567 RH |
1671 | break; |
1672 | ||
1673 | /* Rule 7 */ | |
1674 | case IOR: | |
1675 | gcc_assert (REG_P (XEXP (src, 0)) | |
43215a89 | 1676 | && dwf_regno (XEXP (src, 0)) == cur_trace->cfa_temp.reg |
647a1567 RH |
1677 | && CONST_INT_P (XEXP (src, 1))); |
1678 | ||
43215a89 RH |
1679 | cur_trace->cfa_temp.reg = dwf_regno (dest); |
1680 | cur_trace->cfa_temp.offset |= INTVAL (XEXP (src, 1)); | |
647a1567 RH |
1681 | break; |
1682 | ||
1683 | /* Skip over HIGH, assuming it will be followed by a LO_SUM, | |
1684 | which will fill in all of the bits. */ | |
1685 | /* Rule 8 */ | |
1686 | case HIGH: | |
1687 | break; | |
1688 | ||
1689 | /* Rule 15 */ | |
1690 | case UNSPEC: | |
1691 | case UNSPEC_VOLATILE: | |
89e25f95 BS |
1692 | /* All unspecs should be represented by REG_CFA_* notes. */ |
1693 | gcc_unreachable (); | |
647a1567 RH |
1694 | return; |
1695 | ||
1696 | /* Rule 16 */ | |
1697 | case AND: | |
1698 | /* If this AND operation happens on stack pointer in prologue, | |
1699 | we assume the stack is realigned and we extract the | |
1700 | alignment. */ | |
1701 | if (fde && XEXP (src, 0) == stack_pointer_rtx) | |
1702 | { | |
1703 | /* We interpret reg_save differently with stack_realign set. | |
1704 | Thus we must flush whatever we have queued first. */ | |
1705 | dwarf2out_flush_queued_reg_saves (); | |
1706 | ||
43215a89 RH |
1707 | gcc_assert (cur_trace->cfa_store.reg |
1708 | == dwf_regno (XEXP (src, 0))); | |
647a1567 RH |
1709 | fde->stack_realign = 1; |
1710 | fde->stack_realignment = INTVAL (XEXP (src, 1)); | |
43215a89 | 1711 | cur_trace->cfa_store.offset = 0; |
647a1567 | 1712 | |
9a08d230 RH |
1713 | if (cur_cfa->reg != dw_stack_pointer_regnum |
1714 | && cur_cfa->reg != dw_frame_pointer_regnum) | |
1715 | fde->drap_reg = cur_cfa->reg; | |
647a1567 RH |
1716 | } |
1717 | return; | |
1718 | ||
1719 | default: | |
1720 | gcc_unreachable (); | |
1721 | } | |
647a1567 RH |
1722 | break; |
1723 | ||
1724 | case MEM: | |
1725 | ||
1726 | /* Saving a register to the stack. Make sure dest is relative to the | |
1727 | CFA register. */ | |
1728 | switch (GET_CODE (XEXP (dest, 0))) | |
1729 | { | |
1730 | /* Rule 10 */ | |
1731 | /* With a push. */ | |
1732 | case PRE_MODIFY: | |
1733 | case POST_MODIFY: | |
1734 | /* We can't handle variable size modifications. */ | |
1735 | gcc_assert (GET_CODE (XEXP (XEXP (XEXP (dest, 0), 1), 1)) | |
1736 | == CONST_INT); | |
1737 | offset = -INTVAL (XEXP (XEXP (XEXP (dest, 0), 1), 1)); | |
1738 | ||
1739 | gcc_assert (REGNO (XEXP (XEXP (dest, 0), 0)) == STACK_POINTER_REGNUM | |
43215a89 | 1740 | && cur_trace->cfa_store.reg == dw_stack_pointer_regnum); |
647a1567 | 1741 | |
43215a89 | 1742 | cur_trace->cfa_store.offset += offset; |
9a08d230 RH |
1743 | if (cur_cfa->reg == dw_stack_pointer_regnum) |
1744 | cur_cfa->offset = cur_trace->cfa_store.offset; | |
647a1567 RH |
1745 | |
1746 | if (GET_CODE (XEXP (dest, 0)) == POST_MODIFY) | |
43215a89 | 1747 | offset -= cur_trace->cfa_store.offset; |
647a1567 | 1748 | else |
43215a89 | 1749 | offset = -cur_trace->cfa_store.offset; |
647a1567 RH |
1750 | break; |
1751 | ||
1752 | /* Rule 11 */ | |
1753 | case PRE_INC: | |
1754 | case PRE_DEC: | |
1755 | case POST_DEC: | |
1756 | offset = GET_MODE_SIZE (GET_MODE (dest)); | |
1757 | if (GET_CODE (XEXP (dest, 0)) == PRE_INC) | |
1758 | offset = -offset; | |
1759 | ||
1760 | gcc_assert ((REGNO (XEXP (XEXP (dest, 0), 0)) | |
1761 | == STACK_POINTER_REGNUM) | |
43215a89 | 1762 | && cur_trace->cfa_store.reg == dw_stack_pointer_regnum); |
647a1567 | 1763 | |
43215a89 | 1764 | cur_trace->cfa_store.offset += offset; |
647a1567 RH |
1765 | |
1766 | /* Rule 18: If stack is aligned, we will use FP as a | |
1767 | reference to represent the address of the stored | |
1768 | regiser. */ | |
1769 | if (fde | |
1770 | && fde->stack_realign | |
7b4d5595 L |
1771 | && REG_P (src) |
1772 | && REGNO (src) == HARD_FRAME_POINTER_REGNUM) | |
647a1567 | 1773 | { |
9a08d230 | 1774 | gcc_assert (cur_cfa->reg != dw_frame_pointer_regnum); |
43215a89 | 1775 | cur_trace->cfa_store.offset = 0; |
647a1567 RH |
1776 | } |
1777 | ||
9a08d230 RH |
1778 | if (cur_cfa->reg == dw_stack_pointer_regnum) |
1779 | cur_cfa->offset = cur_trace->cfa_store.offset; | |
647a1567 RH |
1780 | |
1781 | if (GET_CODE (XEXP (dest, 0)) == POST_DEC) | |
43215a89 | 1782 | offset += -cur_trace->cfa_store.offset; |
647a1567 | 1783 | else |
43215a89 | 1784 | offset = -cur_trace->cfa_store.offset; |
647a1567 RH |
1785 | break; |
1786 | ||
1787 | /* Rule 12 */ | |
1788 | /* With an offset. */ | |
1789 | case PLUS: | |
1790 | case MINUS: | |
1791 | case LO_SUM: | |
1792 | { | |
7263c6d7 | 1793 | unsigned int regno; |
647a1567 RH |
1794 | |
1795 | gcc_assert (CONST_INT_P (XEXP (XEXP (dest, 0), 1)) | |
1796 | && REG_P (XEXP (XEXP (dest, 0), 0))); | |
1797 | offset = INTVAL (XEXP (XEXP (dest, 0), 1)); | |
1798 | if (GET_CODE (XEXP (dest, 0)) == MINUS) | |
1799 | offset = -offset; | |
1800 | ||
7263c6d7 | 1801 | regno = dwf_regno (XEXP (XEXP (dest, 0), 0)); |
647a1567 | 1802 | |
9a08d230 RH |
1803 | if (cur_cfa->reg == regno) |
1804 | offset -= cur_cfa->offset; | |
43215a89 RH |
1805 | else if (cur_trace->cfa_store.reg == regno) |
1806 | offset -= cur_trace->cfa_store.offset; | |
647a1567 RH |
1807 | else |
1808 | { | |
43215a89 RH |
1809 | gcc_assert (cur_trace->cfa_temp.reg == regno); |
1810 | offset -= cur_trace->cfa_temp.offset; | |
647a1567 RH |
1811 | } |
1812 | } | |
1813 | break; | |
1814 | ||
1815 | /* Rule 13 */ | |
1816 | /* Without an offset. */ | |
1817 | case REG: | |
1818 | { | |
7263c6d7 | 1819 | unsigned int regno = dwf_regno (XEXP (dest, 0)); |
647a1567 | 1820 | |
9a08d230 RH |
1821 | if (cur_cfa->reg == regno) |
1822 | offset = -cur_cfa->offset; | |
43215a89 RH |
1823 | else if (cur_trace->cfa_store.reg == regno) |
1824 | offset = -cur_trace->cfa_store.offset; | |
647a1567 RH |
1825 | else |
1826 | { | |
43215a89 RH |
1827 | gcc_assert (cur_trace->cfa_temp.reg == regno); |
1828 | offset = -cur_trace->cfa_temp.offset; | |
647a1567 RH |
1829 | } |
1830 | } | |
1831 | break; | |
1832 | ||
1833 | /* Rule 14 */ | |
1834 | case POST_INC: | |
43215a89 RH |
1835 | gcc_assert (cur_trace->cfa_temp.reg |
1836 | == dwf_regno (XEXP (XEXP (dest, 0), 0))); | |
1837 | offset = -cur_trace->cfa_temp.offset; | |
1838 | cur_trace->cfa_temp.offset -= GET_MODE_SIZE (GET_MODE (dest)); | |
647a1567 RH |
1839 | break; |
1840 | ||
1841 | default: | |
1842 | gcc_unreachable (); | |
1843 | } | |
1844 | ||
a8e5c0e7 RH |
1845 | /* Rule 17 */ |
1846 | /* If the source operand of this MEM operation is a memory, | |
1847 | we only care how much stack grew. */ | |
1848 | if (MEM_P (src)) | |
647a1567 RH |
1849 | break; |
1850 | ||
a8e5c0e7 RH |
1851 | if (REG_P (src) |
1852 | && REGNO (src) != STACK_POINTER_REGNUM | |
647a1567 | 1853 | && REGNO (src) != HARD_FRAME_POINTER_REGNUM |
9a08d230 | 1854 | && dwf_regno (src) == cur_cfa->reg) |
647a1567 RH |
1855 | { |
1856 | /* We're storing the current CFA reg into the stack. */ | |
1857 | ||
9a08d230 | 1858 | if (cur_cfa->offset == 0) |
647a1567 RH |
1859 | { |
1860 | /* Rule 19 */ | |
1861 | /* If stack is aligned, putting CFA reg into stack means | |
1862 | we can no longer use reg + offset to represent CFA. | |
1863 | Here we use DW_CFA_def_cfa_expression instead. The | |
1864 | result of this expression equals to the original CFA | |
1865 | value. */ | |
1866 | if (fde | |
1867 | && fde->stack_realign | |
9a08d230 RH |
1868 | && cur_cfa->indirect == 0 |
1869 | && cur_cfa->reg != dw_frame_pointer_regnum) | |
647a1567 | 1870 | { |
9a08d230 | 1871 | gcc_assert (fde->drap_reg == cur_cfa->reg); |
647a1567 | 1872 | |
9a08d230 RH |
1873 | cur_cfa->indirect = 1; |
1874 | cur_cfa->reg = dw_frame_pointer_regnum; | |
1875 | cur_cfa->base_offset = offset; | |
1876 | cur_cfa->offset = 0; | |
647a1567 RH |
1877 | |
1878 | fde->drap_reg_saved = 1; | |
647a1567 RH |
1879 | break; |
1880 | } | |
1881 | ||
1882 | /* If the source register is exactly the CFA, assume | |
1883 | we're saving SP like any other register; this happens | |
1884 | on the ARM. */ | |
89e25f95 | 1885 | queue_reg_save (stack_pointer_rtx, NULL_RTX, offset); |
647a1567 RH |
1886 | break; |
1887 | } | |
1888 | else | |
1889 | { | |
1890 | /* Otherwise, we'll need to look in the stack to | |
1891 | calculate the CFA. */ | |
1892 | rtx x = XEXP (dest, 0); | |
1893 | ||
1894 | if (!REG_P (x)) | |
1895 | x = XEXP (x, 0); | |
1896 | gcc_assert (REG_P (x)); | |
1897 | ||
9a08d230 RH |
1898 | cur_cfa->reg = dwf_regno (x); |
1899 | cur_cfa->base_offset = offset; | |
1900 | cur_cfa->indirect = 1; | |
647a1567 RH |
1901 | break; |
1902 | } | |
1903 | } | |
1904 | ||
a8e5c0e7 RH |
1905 | if (REG_P (src)) |
1906 | span = targetm.dwarf_register_span (src); | |
a4d47cac EB |
1907 | else |
1908 | span = NULL; | |
1909 | ||
a8e5c0e7 RH |
1910 | if (!span) |
1911 | queue_reg_save (src, NULL_RTX, offset); | |
1912 | else | |
1913 | { | |
1914 | /* We have a PARALLEL describing where the contents of SRC live. | |
1915 | Queue register saves for each piece of the PARALLEL. */ | |
a8e5c0e7 | 1916 | HOST_WIDE_INT span_offset = offset; |
647a1567 | 1917 | |
a8e5c0e7 | 1918 | gcc_assert (GET_CODE (span) == PARALLEL); |
647a1567 | 1919 | |
a4d47cac EB |
1920 | const int par_len = XVECLEN (span, 0); |
1921 | for (int par_index = 0; par_index < par_len; par_index++) | |
a8e5c0e7 RH |
1922 | { |
1923 | rtx elem = XVECEXP (span, 0, par_index); | |
1924 | queue_reg_save (elem, NULL_RTX, span_offset); | |
1925 | span_offset += GET_MODE_SIZE (GET_MODE (elem)); | |
1926 | } | |
1927 | } | |
647a1567 RH |
1928 | break; |
1929 | ||
1930 | default: | |
1931 | gcc_unreachable (); | |
1932 | } | |
1933 | } | |
1934 | ||
9a08d230 RH |
1935 | /* Record call frame debugging information for INSN, which either sets |
1936 | SP or FP (adjusting how we calculate the frame address) or saves a | |
1937 | register to the stack. */ | |
647a1567 | 1938 | |
7644b3c7 | 1939 | static void |
9a08d230 | 1940 | dwarf2out_frame_debug (rtx insn) |
647a1567 | 1941 | { |
647a1567 RH |
1942 | rtx note, n; |
1943 | bool handled_one = false; | |
647a1567 RH |
1944 | |
1945 | for (note = REG_NOTES (insn); note; note = XEXP (note, 1)) | |
1946 | switch (REG_NOTE_KIND (note)) | |
1947 | { | |
1948 | case REG_FRAME_RELATED_EXPR: | |
1949 | insn = XEXP (note, 0); | |
1950 | goto do_frame_expr; | |
1951 | ||
1952 | case REG_CFA_DEF_CFA: | |
89e25f95 | 1953 | dwarf2out_frame_debug_def_cfa (XEXP (note, 0)); |
647a1567 RH |
1954 | handled_one = true; |
1955 | break; | |
1956 | ||
1957 | case REG_CFA_ADJUST_CFA: | |
1958 | n = XEXP (note, 0); | |
1959 | if (n == NULL) | |
1960 | { | |
1961 | n = PATTERN (insn); | |
1962 | if (GET_CODE (n) == PARALLEL) | |
1963 | n = XVECEXP (n, 0, 0); | |
1964 | } | |
89e25f95 | 1965 | dwarf2out_frame_debug_adjust_cfa (n); |
647a1567 RH |
1966 | handled_one = true; |
1967 | break; | |
1968 | ||
1969 | case REG_CFA_OFFSET: | |
1970 | n = XEXP (note, 0); | |
1971 | if (n == NULL) | |
1972 | n = single_set (insn); | |
89e25f95 | 1973 | dwarf2out_frame_debug_cfa_offset (n); |
647a1567 RH |
1974 | handled_one = true; |
1975 | break; | |
1976 | ||
1977 | case REG_CFA_REGISTER: | |
1978 | n = XEXP (note, 0); | |
1979 | if (n == NULL) | |
1980 | { | |
1981 | n = PATTERN (insn); | |
1982 | if (GET_CODE (n) == PARALLEL) | |
1983 | n = XVECEXP (n, 0, 0); | |
1984 | } | |
89e25f95 | 1985 | dwarf2out_frame_debug_cfa_register (n); |
647a1567 RH |
1986 | handled_one = true; |
1987 | break; | |
1988 | ||
1989 | case REG_CFA_EXPRESSION: | |
1990 | n = XEXP (note, 0); | |
1991 | if (n == NULL) | |
1992 | n = single_set (insn); | |
89e25f95 | 1993 | dwarf2out_frame_debug_cfa_expression (n); |
647a1567 RH |
1994 | handled_one = true; |
1995 | break; | |
1996 | ||
1997 | case REG_CFA_RESTORE: | |
1998 | n = XEXP (note, 0); | |
1999 | if (n == NULL) | |
2000 | { | |
2001 | n = PATTERN (insn); | |
2002 | if (GET_CODE (n) == PARALLEL) | |
2003 | n = XVECEXP (n, 0, 0); | |
2004 | n = XEXP (n, 0); | |
2005 | } | |
89e25f95 | 2006 | dwarf2out_frame_debug_cfa_restore (n); |
647a1567 RH |
2007 | handled_one = true; |
2008 | break; | |
2009 | ||
2010 | case REG_CFA_SET_VDRAP: | |
2011 | n = XEXP (note, 0); | |
2012 | if (REG_P (n)) | |
2013 | { | |
a518b996 | 2014 | dw_fde_ref fde = cfun->fde; |
647a1567 RH |
2015 | if (fde) |
2016 | { | |
2017 | gcc_assert (fde->vdrap_reg == INVALID_REGNUM); | |
2018 | if (REG_P (n)) | |
7263c6d7 | 2019 | fde->vdrap_reg = dwf_regno (n); |
647a1567 RH |
2020 | } |
2021 | } | |
2022 | handled_one = true; | |
2023 | break; | |
2024 | ||
2025 | case REG_CFA_WINDOW_SAVE: | |
89e25f95 | 2026 | dwarf2out_frame_debug_cfa_window_save (); |
647a1567 RH |
2027 | handled_one = true; |
2028 | break; | |
2029 | ||
2030 | case REG_CFA_FLUSH_QUEUE: | |
67d7405e | 2031 | /* The actual flush happens elsewhere. */ |
647a1567 RH |
2032 | handled_one = true; |
2033 | break; | |
2034 | ||
2035 | default: | |
2036 | break; | |
2037 | } | |
2038 | ||
67d7405e | 2039 | if (!handled_one) |
647a1567 RH |
2040 | { |
2041 | insn = PATTERN (insn); | |
2042 | do_frame_expr: | |
89e25f95 | 2043 | dwarf2out_frame_debug_expr (insn); |
647a1567 RH |
2044 | |
2045 | /* Check again. A parallel can save and update the same register. | |
2046 | We could probably check just once, here, but this is safer than | |
2047 | removing the check at the start of the function. */ | |
67d7405e RH |
2048 | if (clobbers_queued_reg_save (insn)) |
2049 | dwarf2out_flush_queued_reg_saves (); | |
647a1567 | 2050 | } |
647a1567 RH |
2051 | } |
2052 | ||
57e16c96 RH |
2053 | /* Emit CFI info to change the state from OLD_ROW to NEW_ROW. */ |
2054 | ||
2055 | static void | |
ce363ef2 | 2056 | change_cfi_row (dw_cfi_row *old_row, dw_cfi_row *new_row) |
57e16c96 RH |
2057 | { |
2058 | size_t i, n_old, n_new, n_max; | |
2059 | dw_cfi_ref cfi; | |
2060 | ||
2061 | if (new_row->cfa_cfi && !cfi_equal_p (old_row->cfa_cfi, new_row->cfa_cfi)) | |
2062 | add_cfi (new_row->cfa_cfi); | |
2063 | else | |
2064 | { | |
2065 | cfi = def_cfa_0 (&old_row->cfa, &new_row->cfa); | |
2066 | if (cfi) | |
2067 | add_cfi (cfi); | |
2068 | } | |
2069 | ||
9771b263 DN |
2070 | n_old = vec_safe_length (old_row->reg_save); |
2071 | n_new = vec_safe_length (new_row->reg_save); | |
57e16c96 RH |
2072 | n_max = MAX (n_old, n_new); |
2073 | ||
2074 | for (i = 0; i < n_max; ++i) | |
2075 | { | |
2076 | dw_cfi_ref r_old = NULL, r_new = NULL; | |
2077 | ||
2078 | if (i < n_old) | |
9771b263 | 2079 | r_old = (*old_row->reg_save)[i]; |
57e16c96 | 2080 | if (i < n_new) |
9771b263 | 2081 | r_new = (*new_row->reg_save)[i]; |
57e16c96 RH |
2082 | |
2083 | if (r_old == r_new) | |
2084 | ; | |
2085 | else if (r_new == NULL) | |
2086 | add_cfi_restore (i); | |
2087 | else if (!cfi_equal_p (r_old, r_new)) | |
2088 | add_cfi (r_new); | |
2089 | } | |
2090 | } | |
2091 | ||
89e25f95 BS |
2092 | /* Examine CFI and return true if a cfi label and set_loc is needed |
2093 | beforehand. Even when generating CFI assembler instructions, we | |
4a8ee122 | 2094 | still have to add the cfi to the list so that lookup_cfa_1 works |
89e25f95 BS |
2095 | later on. When -g2 and above we even need to force emitting of |
2096 | CFI labels and add to list a DW_CFA_set_loc for convert_cfa_to_fb_loc_list | |
2097 | purposes. If we're generating DWARF3 output we use DW_OP_call_frame_cfa | |
2098 | and so don't use convert_cfa_to_fb_loc_list. */ | |
2099 | ||
2100 | static bool | |
2101 | cfi_label_required_p (dw_cfi_ref cfi) | |
2102 | { | |
2103 | if (!dwarf2out_do_cfi_asm ()) | |
2104 | return true; | |
2105 | ||
2106 | if (dwarf_version == 2 | |
2107 | && debug_info_level > DINFO_LEVEL_TERSE | |
2108 | && (write_symbols == DWARF2_DEBUG | |
2109 | || write_symbols == VMS_AND_DWARF2_DEBUG)) | |
2110 | { | |
2111 | switch (cfi->dw_cfi_opc) | |
2112 | { | |
2113 | case DW_CFA_def_cfa_offset: | |
2114 | case DW_CFA_def_cfa_offset_sf: | |
2115 | case DW_CFA_def_cfa_register: | |
2116 | case DW_CFA_def_cfa: | |
2117 | case DW_CFA_def_cfa_sf: | |
2118 | case DW_CFA_def_cfa_expression: | |
2119 | case DW_CFA_restore_state: | |
2120 | return true; | |
2121 | default: | |
2122 | return false; | |
2123 | } | |
2124 | } | |
2125 | return false; | |
2126 | } | |
2127 | ||
2128 | /* Walk the function, looking for NOTE_INSN_CFI notes. Add the CFIs to the | |
2129 | function's FDE, adding CFI labels and set_loc/advance_loc opcodes as | |
2130 | necessary. */ | |
2131 | static void | |
2132 | add_cfis_to_fde (void) | |
2133 | { | |
a518b996 | 2134 | dw_fde_ref fde = cfun->fde; |
f65c531e | 2135 | rtx_insn *insn, *next; |
89e25f95 BS |
2136 | /* We always start with a function_begin label. */ |
2137 | bool first = false; | |
2138 | ||
2139 | for (insn = get_insns (); insn; insn = next) | |
2140 | { | |
2141 | next = NEXT_INSN (insn); | |
2142 | ||
2143 | if (NOTE_P (insn) && NOTE_KIND (insn) == NOTE_INSN_SWITCH_TEXT_SECTIONS) | |
2144 | { | |
9771b263 | 2145 | fde->dw_fde_switch_cfi_index = vec_safe_length (fde->dw_fde_cfi); |
89e25f95 BS |
2146 | /* Don't attempt to advance_loc4 between labels |
2147 | in different sections. */ | |
2148 | first = true; | |
2149 | } | |
2150 | ||
2151 | if (NOTE_P (insn) && NOTE_KIND (insn) == NOTE_INSN_CFI) | |
2152 | { | |
2153 | bool required = cfi_label_required_p (NOTE_CFI (insn)); | |
b84dad8e JJ |
2154 | while (next) |
2155 | if (NOTE_P (next) && NOTE_KIND (next) == NOTE_INSN_CFI) | |
2156 | { | |
2157 | required |= cfi_label_required_p (NOTE_CFI (next)); | |
2158 | next = NEXT_INSN (next); | |
2159 | } | |
2160 | else if (active_insn_p (next) | |
2161 | || (NOTE_P (next) && (NOTE_KIND (next) | |
2162 | == NOTE_INSN_SWITCH_TEXT_SECTIONS))) | |
2163 | break; | |
2164 | else | |
89e25f95 | 2165 | next = NEXT_INSN (next); |
89e25f95 BS |
2166 | if (required) |
2167 | { | |
2168 | int num = dwarf2out_cfi_label_num; | |
2169 | const char *label = dwarf2out_cfi_label (); | |
2170 | dw_cfi_ref xcfi; | |
2171 | rtx tmp; | |
2172 | ||
2173 | /* Set the location counter to the new label. */ | |
2174 | xcfi = new_cfi (); | |
2175 | xcfi->dw_cfi_opc = (first ? DW_CFA_set_loc | |
2176 | : DW_CFA_advance_loc4); | |
2177 | xcfi->dw_cfi_oprnd1.dw_cfi_addr = label; | |
9771b263 | 2178 | vec_safe_push (fde->dw_fde_cfi, xcfi); |
89e25f95 BS |
2179 | |
2180 | tmp = emit_note_before (NOTE_INSN_CFI_LABEL, insn); | |
2181 | NOTE_LABEL_NUMBER (tmp) = num; | |
2182 | } | |
2183 | ||
2184 | do | |
2185 | { | |
b84dad8e | 2186 | if (NOTE_P (insn) && NOTE_KIND (insn) == NOTE_INSN_CFI) |
9771b263 | 2187 | vec_safe_push (fde->dw_fde_cfi, NOTE_CFI (insn)); |
89e25f95 BS |
2188 | insn = NEXT_INSN (insn); |
2189 | } | |
2190 | while (insn != next); | |
2191 | first = false; | |
2192 | } | |
2193 | } | |
2194 | } | |
2195 | ||
829bdd4b RH |
2196 | /* If LABEL is the start of a trace, then initialize the state of that |
2197 | trace from CUR_TRACE and CUR_ROW. */ | |
43215a89 | 2198 | |
7644b3c7 | 2199 | static void |
9a08d230 | 2200 | maybe_record_trace_start (rtx start, rtx origin) |
89e25f95 | 2201 | { |
829bdd4b | 2202 | dw_trace_info *ti; |
9a08d230 | 2203 | HOST_WIDE_INT args_size; |
829bdd4b RH |
2204 | |
2205 | ti = get_trace_info (start); | |
2206 | gcc_assert (ti != NULL); | |
647a1567 | 2207 | |
829bdd4b | 2208 | if (dump_file) |
647a1567 | 2209 | { |
829bdd4b | 2210 | fprintf (dump_file, " saw edge from trace %u to %u (via %s %d)\n", |
200e10dc | 2211 | cur_trace->id, ti->id, |
829bdd4b RH |
2212 | (origin ? rtx_name[(int) GET_CODE (origin)] : "fallthru"), |
2213 | (origin ? INSN_UID (origin) : 0)); | |
2214 | } | |
bc5612ed | 2215 | |
9a08d230 | 2216 | args_size = cur_trace->end_true_args_size; |
829bdd4b RH |
2217 | if (ti->beg_row == NULL) |
2218 | { | |
2219 | /* This is the first time we've encountered this trace. Propagate | |
2220 | state across the edge and push the trace onto the work list. */ | |
2221 | ti->beg_row = copy_cfi_row (cur_row); | |
9a08d230 | 2222 | ti->beg_true_args_size = args_size; |
2f23f97a | 2223 | |
829bdd4b RH |
2224 | ti->cfa_store = cur_trace->cfa_store; |
2225 | ti->cfa_temp = cur_trace->cfa_temp; | |
9771b263 | 2226 | ti->regs_saved_in_regs = cur_trace->regs_saved_in_regs.copy (); |
829bdd4b | 2227 | |
9771b263 | 2228 | trace_work_list.safe_push (ti); |
829bdd4b RH |
2229 | |
2230 | if (dump_file) | |
200e10dc | 2231 | fprintf (dump_file, "\tpush trace %u to worklist\n", ti->id); |
829bdd4b RH |
2232 | } |
2233 | else | |
2234 | { | |
9a08d230 | 2235 | |
829bdd4b RH |
2236 | /* We ought to have the same state incoming to a given trace no |
2237 | matter how we arrive at the trace. Anything else means we've | |
2238 | got some kind of optimization error. */ | |
2239 | gcc_checking_assert (cfi_row_equal_p (cur_row, ti->beg_row)); | |
9a08d230 RH |
2240 | |
2241 | /* The args_size is allowed to conflict if it isn't actually used. */ | |
2242 | if (ti->beg_true_args_size != args_size) | |
2243 | ti->args_size_undefined = true; | |
2244 | } | |
2245 | } | |
2246 | ||
2247 | /* Similarly, but handle the args_size and CFA reset across EH | |
2248 | and non-local goto edges. */ | |
2249 | ||
2250 | static void | |
2251 | maybe_record_trace_start_abnormal (rtx start, rtx origin) | |
2252 | { | |
2253 | HOST_WIDE_INT save_args_size, delta; | |
2254 | dw_cfa_location save_cfa; | |
2255 | ||
2256 | save_args_size = cur_trace->end_true_args_size; | |
2257 | if (save_args_size == 0) | |
2258 | { | |
2259 | maybe_record_trace_start (start, origin); | |
2260 | return; | |
2261 | } | |
2262 | ||
2263 | delta = -save_args_size; | |
2264 | cur_trace->end_true_args_size = 0; | |
2265 | ||
2266 | save_cfa = cur_row->cfa; | |
2267 | if (cur_row->cfa.reg == dw_stack_pointer_regnum) | |
2268 | { | |
2269 | /* Convert a change in args_size (always a positive in the | |
2270 | direction of stack growth) to a change in stack pointer. */ | |
2271 | #ifndef STACK_GROWS_DOWNWARD | |
2272 | delta = -delta; | |
2273 | #endif | |
2274 | cur_row->cfa.offset += delta; | |
829bdd4b | 2275 | } |
9a08d230 RH |
2276 | |
2277 | maybe_record_trace_start (start, origin); | |
2278 | ||
2279 | cur_trace->end_true_args_size = save_args_size; | |
2280 | cur_row->cfa = save_cfa; | |
829bdd4b | 2281 | } |
45fba6d1 | 2282 | |
829bdd4b RH |
2283 | /* Propagate CUR_TRACE state to the destinations implied by INSN. */ |
2284 | /* ??? Sadly, this is in large part a duplicate of make_edges. */ | |
2285 | ||
2286 | static void | |
2287 | create_trace_edges (rtx insn) | |
2288 | { | |
ca486330 | 2289 | rtx tmp; |
829bdd4b RH |
2290 | int i, n; |
2291 | ||
2292 | if (JUMP_P (insn)) | |
2293 | { | |
8942ee0f DM |
2294 | rtx_jump_table_data *table; |
2295 | ||
829bdd4b | 2296 | if (find_reg_note (insn, REG_NON_LOCAL_GOTO, NULL_RTX)) |
9a08d230 RH |
2297 | return; |
2298 | ||
8942ee0f | 2299 | if (tablejump_p (insn, NULL, &table)) |
bc5612ed | 2300 | { |
95c43227 | 2301 | rtvec vec = table->get_labels (); |
829bdd4b RH |
2302 | |
2303 | n = GET_NUM_ELEM (vec); | |
2304 | for (i = 0; i < n; ++i) | |
2305 | { | |
ca486330 | 2306 | rtx lab = XEXP (RTVEC_ELT (vec, i), 0); |
9a08d230 | 2307 | maybe_record_trace_start (lab, insn); |
829bdd4b RH |
2308 | } |
2309 | } | |
2310 | else if (computed_jump_p (insn)) | |
bc5612ed | 2311 | { |
ca486330 DM |
2312 | for (rtx_expr_list *lab = forced_labels; lab; lab = lab->next ()) |
2313 | maybe_record_trace_start (lab->element (), insn); | |
829bdd4b RH |
2314 | } |
2315 | else if (returnjump_p (insn)) | |
2316 | ; | |
2317 | else if ((tmp = extract_asm_operands (PATTERN (insn))) != NULL) | |
2318 | { | |
2319 | n = ASM_OPERANDS_LABEL_LENGTH (tmp); | |
2320 | for (i = 0; i < n; ++i) | |
bc5612ed | 2321 | { |
ca486330 | 2322 | rtx lab = XEXP (ASM_OPERANDS_LABEL (tmp, i), 0); |
9a08d230 | 2323 | maybe_record_trace_start (lab, insn); |
829bdd4b RH |
2324 | } |
2325 | } | |
2326 | else | |
2327 | { | |
ca486330 | 2328 | rtx lab = JUMP_LABEL (insn); |
829bdd4b | 2329 | gcc_assert (lab != NULL); |
9a08d230 | 2330 | maybe_record_trace_start (lab, insn); |
829bdd4b RH |
2331 | } |
2332 | } | |
2333 | else if (CALL_P (insn)) | |
2334 | { | |
2335 | /* Sibling calls don't have edges inside this function. */ | |
2336 | if (SIBLING_CALL_P (insn)) | |
2337 | return; | |
965b2557 | 2338 | |
829bdd4b RH |
2339 | /* Process non-local goto edges. */ |
2340 | if (can_nonlocal_goto (insn)) | |
2382940b DM |
2341 | for (rtx_expr_list *lab = nonlocal_goto_handler_labels; |
2342 | lab; | |
2343 | lab = lab->next ()) | |
2344 | maybe_record_trace_start_abnormal (lab->element (), insn); | |
829bdd4b | 2345 | } |
292d1dfb | 2346 | else if (rtx_sequence *seq = dyn_cast <rtx_sequence *> (PATTERN (insn))) |
3382318a | 2347 | { |
292d1dfb | 2348 | int i, n = seq->len (); |
3382318a | 2349 | for (i = 0; i < n; ++i) |
292d1dfb | 2350 | create_trace_edges (seq->insn (i)); |
3382318a RH |
2351 | return; |
2352 | } | |
965b2557 | 2353 | |
829bdd4b RH |
2354 | /* Process EH edges. */ |
2355 | if (CALL_P (insn) || cfun->can_throw_non_call_exceptions) | |
2356 | { | |
2357 | eh_landing_pad lp = get_eh_landing_pad_from_rtx (insn); | |
2358 | if (lp) | |
9a08d230 | 2359 | maybe_record_trace_start_abnormal (lp->landing_pad, insn); |
829bdd4b RH |
2360 | } |
2361 | } | |
57e16c96 | 2362 | |
eebc8f37 RH |
2363 | /* A subroutine of scan_trace. Do what needs to be done "after" INSN. */ |
2364 | ||
2365 | static void | |
2366 | scan_insn_after (rtx insn) | |
2367 | { | |
2368 | if (RTX_FRAME_RELATED_P (insn)) | |
2369 | dwarf2out_frame_debug (insn); | |
2370 | notice_args_size (insn); | |
2371 | } | |
2372 | ||
829bdd4b RH |
2373 | /* Scan the trace beginning at INSN and create the CFI notes for the |
2374 | instructions therein. */ | |
2375 | ||
2376 | static void | |
2377 | scan_trace (dw_trace_info *trace) | |
2378 | { | |
eebc8f37 | 2379 | rtx prev, insn = trace->head; |
9a08d230 | 2380 | dw_cfa_location this_cfa; |
829bdd4b RH |
2381 | |
2382 | if (dump_file) | |
2383 | fprintf (dump_file, "Processing trace %u : start at %s %d\n", | |
200e10dc | 2384 | trace->id, rtx_name[(int) GET_CODE (insn)], |
829bdd4b RH |
2385 | INSN_UID (insn)); |
2386 | ||
2387 | trace->end_row = copy_cfi_row (trace->beg_row); | |
9a08d230 | 2388 | trace->end_true_args_size = trace->beg_true_args_size; |
829bdd4b RH |
2389 | |
2390 | cur_trace = trace; | |
2391 | cur_row = trace->end_row; | |
9a08d230 RH |
2392 | |
2393 | this_cfa = cur_row->cfa; | |
2394 | cur_cfa = &this_cfa; | |
829bdd4b | 2395 | |
eebc8f37 RH |
2396 | for (prev = insn, insn = NEXT_INSN (insn); |
2397 | insn; | |
2398 | prev = insn, insn = NEXT_INSN (insn)) | |
829bdd4b | 2399 | { |
eebc8f37 RH |
2400 | rtx control; |
2401 | ||
9a08d230 | 2402 | /* Do everything that happens "before" the insn. */ |
eebc8f37 | 2403 | add_cfi_insn = prev; |
829bdd4b RH |
2404 | |
2405 | /* Notice the end of a trace. */ | |
9a08d230 RH |
2406 | if (BARRIER_P (insn)) |
2407 | { | |
2408 | /* Don't bother saving the unneeded queued registers at all. */ | |
9771b263 | 2409 | queued_reg_saves.truncate (0); |
9a08d230 RH |
2410 | break; |
2411 | } | |
2412 | if (save_point_p (insn)) | |
829bdd4b | 2413 | { |
829bdd4b | 2414 | /* Propagate across fallthru edges. */ |
9a08d230 RH |
2415 | dwarf2out_flush_queued_reg_saves (); |
2416 | maybe_record_trace_start (insn, NULL); | |
829bdd4b | 2417 | break; |
bc5612ed BS |
2418 | } |
2419 | ||
829bdd4b | 2420 | if (DEBUG_INSN_P (insn) || !inside_basic_block_p (insn)) |
bc5612ed BS |
2421 | continue; |
2422 | ||
eebc8f37 RH |
2423 | /* Handle all changes to the row state. Sequences require special |
2424 | handling for the positioning of the notes. */ | |
292d1dfb | 2425 | if (rtx_sequence *pat = dyn_cast <rtx_sequence *> (PATTERN (insn))) |
bc5612ed | 2426 | { |
292d1dfb DM |
2427 | rtx elt; |
2428 | int i, n = pat->len (); | |
9a08d230 | 2429 | |
292d1dfb | 2430 | control = pat->element (0); |
eebc8f37 RH |
2431 | if (can_throw_internal (control)) |
2432 | notice_eh_throw (control); | |
2433 | dwarf2out_flush_queued_reg_saves (); | |
2434 | ||
8f06d483 | 2435 | if (JUMP_P (control) && INSN_ANNULLED_BRANCH_P (control)) |
829bdd4b | 2436 | { |
9a08d230 RH |
2437 | /* ??? Hopefully multiple delay slots are not annulled. */ |
2438 | gcc_assert (n == 2); | |
eebc8f37 RH |
2439 | gcc_assert (!RTX_FRAME_RELATED_P (control)); |
2440 | gcc_assert (!find_reg_note (control, REG_ARGS_SIZE, NULL)); | |
2441 | ||
292d1dfb | 2442 | elt = pat->element (1); |
9a08d230 | 2443 | |
9a08d230 RH |
2444 | if (INSN_FROM_TARGET_P (elt)) |
2445 | { | |
2446 | HOST_WIDE_INT restore_args_size; | |
5d1f1cd5 | 2447 | cfi_vec save_row_reg_save; |
829bdd4b | 2448 | |
bf27c43e RH |
2449 | /* If ELT is an instruction from target of an annulled |
2450 | branch, the effects are for the target only and so | |
2451 | the args_size and CFA along the current path | |
2452 | shouldn't change. */ | |
eebc8f37 | 2453 | add_cfi_insn = NULL; |
9a08d230 RH |
2454 | restore_args_size = cur_trace->end_true_args_size; |
2455 | cur_cfa = &cur_row->cfa; | |
9771b263 | 2456 | save_row_reg_save = vec_safe_copy (cur_row->reg_save); |
bc5612ed | 2457 | |
eebc8f37 RH |
2458 | scan_insn_after (elt); |
2459 | ||
2460 | /* ??? Should we instead save the entire row state? */ | |
9771b263 | 2461 | gcc_assert (!queued_reg_saves.length ()); |
eebc8f37 RH |
2462 | |
2463 | create_trace_edges (control); | |
bc5612ed | 2464 | |
9a08d230 RH |
2465 | cur_trace->end_true_args_size = restore_args_size; |
2466 | cur_row->cfa = this_cfa; | |
5d1f1cd5 | 2467 | cur_row->reg_save = save_row_reg_save; |
9a08d230 | 2468 | cur_cfa = &this_cfa; |
9a08d230 | 2469 | } |
bf27c43e RH |
2470 | else |
2471 | { | |
2472 | /* If ELT is a annulled branch-taken instruction (i.e. | |
2473 | executed only when branch is not taken), the args_size | |
2474 | and CFA should not change through the jump. */ | |
2475 | create_trace_edges (control); | |
2476 | ||
2477 | /* Update and continue with the trace. */ | |
2478 | add_cfi_insn = insn; | |
2479 | scan_insn_after (elt); | |
2480 | def_cfa_1 (&this_cfa); | |
2481 | } | |
2482 | continue; | |
9a08d230 RH |
2483 | } |
2484 | ||
eebc8f37 RH |
2485 | /* The insns in the delay slot should all be considered to happen |
2486 | "before" a call insn. Consider a call with a stack pointer | |
2487 | adjustment in the delay slot. The backtrace from the callee | |
2488 | should include the sp adjustment. Unfortunately, that leaves | |
2489 | us with an unavoidable unwinding error exactly at the call insn | |
2490 | itself. For jump insns we'd prefer to avoid this error by | |
2491 | placing the notes after the sequence. */ | |
2492 | if (JUMP_P (control)) | |
2493 | add_cfi_insn = insn; | |
2494 | ||
9a08d230 RH |
2495 | for (i = 1; i < n; ++i) |
2496 | { | |
292d1dfb | 2497 | elt = pat->element (i); |
eebc8f37 | 2498 | scan_insn_after (elt); |
9a08d230 | 2499 | } |
eebc8f37 RH |
2500 | |
2501 | /* Make sure any register saves are visible at the jump target. */ | |
2502 | dwarf2out_flush_queued_reg_saves (); | |
67d7405e | 2503 | any_cfis_emitted = false; |
eebc8f37 RH |
2504 | |
2505 | /* However, if there is some adjustment on the call itself, e.g. | |
2506 | a call_pop, that action should be considered to happen after | |
2507 | the call returns. */ | |
2508 | add_cfi_insn = insn; | |
2509 | scan_insn_after (control); | |
829bdd4b | 2510 | } |
9a08d230 | 2511 | else |
eebc8f37 RH |
2512 | { |
2513 | /* Flush data before calls and jumps, and of course if necessary. */ | |
2514 | if (can_throw_internal (insn)) | |
2515 | { | |
2516 | notice_eh_throw (insn); | |
2517 | dwarf2out_flush_queued_reg_saves (); | |
2518 | } | |
2519 | else if (!NONJUMP_INSN_P (insn) | |
2520 | || clobbers_queued_reg_save (insn) | |
2521 | || find_reg_note (insn, REG_CFA_FLUSH_QUEUE, NULL)) | |
2522 | dwarf2out_flush_queued_reg_saves (); | |
67d7405e | 2523 | any_cfis_emitted = false; |
eebc8f37 RH |
2524 | |
2525 | add_cfi_insn = insn; | |
2526 | scan_insn_after (insn); | |
2527 | control = insn; | |
2528 | } | |
9a08d230 RH |
2529 | |
2530 | /* Between frame-related-p and args_size we might have otherwise | |
2531 | emitted two cfa adjustments. Do it now. */ | |
2532 | def_cfa_1 (&this_cfa); | |
45fba6d1 | 2533 | |
67d7405e RH |
2534 | /* Minimize the number of advances by emitting the entire queue |
2535 | once anything is emitted. */ | |
2536 | if (any_cfis_emitted | |
2537 | || find_reg_note (insn, REG_CFA_FLUSH_QUEUE, NULL)) | |
2538 | dwarf2out_flush_queued_reg_saves (); | |
2539 | ||
829bdd4b RH |
2540 | /* Note that a test for control_flow_insn_p does exactly the |
2541 | same tests as are done to actually create the edges. So | |
2542 | always call the routine and let it not create edges for | |
2543 | non-control-flow insns. */ | |
eebc8f37 | 2544 | create_trace_edges (control); |
647a1567 | 2545 | } |
45fba6d1 | 2546 | |
141618e2 | 2547 | add_cfi_insn = NULL; |
829bdd4b RH |
2548 | cur_row = NULL; |
2549 | cur_trace = NULL; | |
9a08d230 | 2550 | cur_cfa = NULL; |
647a1567 RH |
2551 | } |
2552 | ||
829bdd4b | 2553 | /* Scan the function and create the initial set of CFI notes. */ |
647a1567 | 2554 | |
bc5612ed | 2555 | static void |
829bdd4b | 2556 | create_cfi_notes (void) |
647a1567 | 2557 | { |
829bdd4b | 2558 | dw_trace_info *ti; |
647a1567 | 2559 | |
9771b263 DN |
2560 | gcc_checking_assert (!queued_reg_saves.exists ()); |
2561 | gcc_checking_assert (!trace_work_list.exists ()); | |
647a1567 | 2562 | |
829bdd4b | 2563 | /* Always begin at the entry trace. */ |
9771b263 | 2564 | ti = &trace_info[0]; |
829bdd4b | 2565 | scan_trace (ti); |
647a1567 | 2566 | |
9771b263 | 2567 | while (!trace_work_list.is_empty ()) |
829bdd4b | 2568 | { |
9771b263 | 2569 | ti = trace_work_list.pop (); |
829bdd4b | 2570 | scan_trace (ti); |
647a1567 RH |
2571 | } |
2572 | ||
9771b263 DN |
2573 | queued_reg_saves.release (); |
2574 | trace_work_list.release (); | |
829bdd4b | 2575 | } |
647a1567 | 2576 | |
200e10dc RH |
2577 | /* Return the insn before the first NOTE_INSN_CFI after START. */ |
2578 | ||
2579 | static rtx | |
2580 | before_next_cfi_note (rtx start) | |
2581 | { | |
2582 | rtx prev = start; | |
2583 | while (start) | |
2584 | { | |
2585 | if (NOTE_P (start) && NOTE_KIND (start) == NOTE_INSN_CFI) | |
2586 | return prev; | |
2587 | prev = start; | |
2588 | start = NEXT_INSN (start); | |
2589 | } | |
2590 | gcc_unreachable (); | |
2591 | } | |
2592 | ||
829bdd4b | 2593 | /* Insert CFI notes between traces to properly change state between them. */ |
647a1567 | 2594 | |
829bdd4b RH |
2595 | static void |
2596 | connect_traces (void) | |
2597 | { | |
9771b263 | 2598 | unsigned i, n = trace_info.length (); |
829bdd4b RH |
2599 | dw_trace_info *prev_ti, *ti; |
2600 | ||
200e10dc RH |
2601 | /* ??? Ideally, we should have both queued and processed every trace. |
2602 | However the current representation of constant pools on various targets | |
2603 | is indistinguishable from unreachable code. Assume for the moment that | |
2604 | we can simply skip over such traces. */ | |
2605 | /* ??? Consider creating a DATA_INSN rtx code to indicate that | |
2606 | these are not "real" instructions, and should not be considered. | |
2607 | This could be generically useful for tablejump data as well. */ | |
2608 | /* Remove all unprocessed traces from the list. */ | |
2609 | for (i = n - 1; i > 0; --i) | |
2610 | { | |
9771b263 | 2611 | ti = &trace_info[i]; |
200e10dc RH |
2612 | if (ti->beg_row == NULL) |
2613 | { | |
9771b263 | 2614 | trace_info.ordered_remove (i); |
200e10dc RH |
2615 | n -= 1; |
2616 | } | |
2617 | else | |
2618 | gcc_assert (ti->end_row != NULL); | |
2619 | } | |
829bdd4b | 2620 | |
200e10dc RH |
2621 | /* Work from the end back to the beginning. This lets us easily insert |
2622 | remember/restore_state notes in the correct order wrt other notes. */ | |
9771b263 | 2623 | prev_ti = &trace_info[n - 1]; |
200e10dc | 2624 | for (i = n - 1; i > 0; --i) |
647a1567 | 2625 | { |
829bdd4b | 2626 | dw_cfi_row *old_row; |
647a1567 | 2627 | |
200e10dc | 2628 | ti = prev_ti; |
9771b263 | 2629 | prev_ti = &trace_info[i - 1]; |
647a1567 | 2630 | |
200e10dc | 2631 | add_cfi_insn = ti->head; |
829bdd4b RH |
2632 | |
2633 | /* In dwarf2out_switch_text_section, we'll begin a new FDE | |
2634 | for the portion of the function in the alternate text | |
2635 | section. The row state at the very beginning of that | |
2636 | new FDE will be exactly the row state from the CIE. */ | |
2637 | if (ti->switch_sections) | |
2638 | old_row = cie_cfi_row; | |
2639 | else | |
200e10dc RH |
2640 | { |
2641 | old_row = prev_ti->end_row; | |
2642 | /* If there's no change from the previous end state, fine. */ | |
2643 | if (cfi_row_equal_p (old_row, ti->beg_row)) | |
2644 | ; | |
2645 | /* Otherwise check for the common case of sharing state with | |
2646 | the beginning of an epilogue, but not the end. Insert | |
2647 | remember/restore opcodes in that case. */ | |
2648 | else if (cfi_row_equal_p (prev_ti->beg_row, ti->beg_row)) | |
2649 | { | |
2650 | dw_cfi_ref cfi; | |
2651 | ||
2652 | /* Note that if we blindly insert the remember at the | |
2653 | start of the trace, we can wind up increasing the | |
2654 | size of the unwind info due to extra advance opcodes. | |
2655 | Instead, put the remember immediately before the next | |
2656 | state change. We know there must be one, because the | |
2657 | state at the beginning and head of the trace differ. */ | |
2658 | add_cfi_insn = before_next_cfi_note (prev_ti->head); | |
2659 | cfi = new_cfi (); | |
2660 | cfi->dw_cfi_opc = DW_CFA_remember_state; | |
2661 | add_cfi (cfi); | |
2662 | ||
2663 | add_cfi_insn = ti->head; | |
2664 | cfi = new_cfi (); | |
2665 | cfi->dw_cfi_opc = DW_CFA_restore_state; | |
2666 | add_cfi (cfi); | |
2667 | ||
2668 | old_row = prev_ti->beg_row; | |
2669 | } | |
2670 | /* Otherwise, we'll simply change state from the previous end. */ | |
2671 | } | |
829bdd4b | 2672 | |
829bdd4b RH |
2673 | change_cfi_row (old_row, ti->beg_row); |
2674 | ||
2675 | if (dump_file && add_cfi_insn != ti->head) | |
2676 | { | |
2677 | rtx note; | |
2678 | ||
200e10dc RH |
2679 | fprintf (dump_file, "Fixup between trace %u and %u:\n", |
2680 | prev_ti->id, ti->id); | |
829bdd4b RH |
2681 | |
2682 | note = ti->head; | |
2683 | do | |
2684 | { | |
2685 | note = NEXT_INSN (note); | |
2686 | gcc_assert (NOTE_P (note) && NOTE_KIND (note) == NOTE_INSN_CFI); | |
2687 | output_cfi_directive (dump_file, NOTE_CFI (note)); | |
2688 | } | |
2689 | while (note != add_cfi_insn); | |
2690 | } | |
2691 | } | |
9a08d230 RH |
2692 | |
2693 | /* Connect args_size between traces that have can_throw_internal insns. */ | |
9771b263 | 2694 | if (cfun->eh->lp_array) |
9a08d230 RH |
2695 | { |
2696 | HOST_WIDE_INT prev_args_size = 0; | |
2697 | ||
2698 | for (i = 0; i < n; ++i) | |
2699 | { | |
9771b263 | 2700 | ti = &trace_info[i]; |
9a08d230 RH |
2701 | |
2702 | if (ti->switch_sections) | |
2703 | prev_args_size = 0; | |
2704 | if (ti->eh_head == NULL) | |
2705 | continue; | |
2706 | gcc_assert (!ti->args_size_undefined); | |
2707 | ||
2708 | if (ti->beg_delay_args_size != prev_args_size) | |
2709 | { | |
2710 | /* ??? Search back to previous CFI note. */ | |
2711 | add_cfi_insn = PREV_INSN (ti->eh_head); | |
2712 | add_cfi_args_size (ti->beg_delay_args_size); | |
2713 | } | |
2714 | ||
2715 | prev_args_size = ti->end_delay_args_size; | |
2716 | } | |
2717 | } | |
647a1567 RH |
2718 | } |
2719 | ||
829bdd4b RH |
2720 | /* Set up the pseudo-cfg of instruction traces, as described at the |
2721 | block comment at the top of the file. */ | |
647a1567 | 2722 | |
bc5612ed | 2723 | static void |
829bdd4b | 2724 | create_pseudo_cfg (void) |
647a1567 | 2725 | { |
829bdd4b | 2726 | bool saw_barrier, switch_sections; |
f32682ca | 2727 | dw_trace_info ti; |
f65c531e | 2728 | rtx_insn *insn; |
829bdd4b RH |
2729 | unsigned i; |
2730 | ||
2731 | /* The first trace begins at the start of the function, | |
2732 | and begins with the CIE row state. */ | |
9771b263 | 2733 | trace_info.create (16); |
f32682ca DN |
2734 | memset (&ti, 0, sizeof (ti)); |
2735 | ti.head = get_insns (); | |
2736 | ti.beg_row = cie_cfi_row; | |
2737 | ti.cfa_store = cie_cfi_row->cfa; | |
2738 | ti.cfa_temp.reg = INVALID_REGNUM; | |
9771b263 | 2739 | trace_info.quick_push (ti); |
829bdd4b | 2740 | |
829bdd4b | 2741 | if (cie_return_save) |
9771b263 | 2742 | ti.regs_saved_in_regs.safe_push (*cie_return_save); |
647a1567 | 2743 | |
829bdd4b RH |
2744 | /* Walk all the insns, collecting start of trace locations. */ |
2745 | saw_barrier = false; | |
2746 | switch_sections = false; | |
2747 | for (insn = get_insns (); insn; insn = NEXT_INSN (insn)) | |
2748 | { | |
2749 | if (BARRIER_P (insn)) | |
2750 | saw_barrier = true; | |
2751 | else if (NOTE_P (insn) | |
2752 | && NOTE_KIND (insn) == NOTE_INSN_SWITCH_TEXT_SECTIONS) | |
2753 | { | |
2754 | /* We should have just seen a barrier. */ | |
2755 | gcc_assert (saw_barrier); | |
2756 | switch_sections = true; | |
2757 | } | |
2758 | /* Watch out for save_point notes between basic blocks. | |
2759 | In particular, a note after a barrier. Do not record these, | |
2760 | delaying trace creation until the label. */ | |
2761 | else if (save_point_p (insn) | |
2762 | && (LABEL_P (insn) || !saw_barrier)) | |
2763 | { | |
f32682ca DN |
2764 | memset (&ti, 0, sizeof (ti)); |
2765 | ti.head = insn; | |
2766 | ti.switch_sections = switch_sections; | |
9771b263 DN |
2767 | ti.id = trace_info.length () - 1; |
2768 | trace_info.safe_push (ti); | |
829bdd4b RH |
2769 | |
2770 | saw_barrier = false; | |
2771 | switch_sections = false; | |
2772 | } | |
2773 | } | |
2774 | ||
2775 | /* Create the trace index after we've finished building trace_info, | |
2776 | avoiding stale pointer problems due to reallocation. */ | |
c203e8a7 TS |
2777 | trace_index |
2778 | = new hash_table<trace_info_hasher> (trace_info.length ()); | |
f32682ca | 2779 | dw_trace_info *tp; |
9771b263 | 2780 | FOR_EACH_VEC_ELT (trace_info, i, tp) |
829bdd4b | 2781 | { |
4a8fb1a1 | 2782 | dw_trace_info **slot; |
647a1567 | 2783 | |
829bdd4b RH |
2784 | if (dump_file) |
2785 | fprintf (dump_file, "Creating trace %u : start at %s %d%s\n", i, | |
f32682ca DN |
2786 | rtx_name[(int) GET_CODE (tp->head)], INSN_UID (tp->head), |
2787 | tp->switch_sections ? " (section switch)" : ""); | |
829bdd4b | 2788 | |
c203e8a7 | 2789 | slot = trace_index->find_slot_with_hash (tp, INSN_UID (tp->head), INSERT); |
829bdd4b | 2790 | gcc_assert (*slot == NULL); |
4a8fb1a1 | 2791 | *slot = tp; |
829bdd4b | 2792 | } |
647a1567 | 2793 | } |
829bdd4b | 2794 | |
a8e5c0e7 RH |
2795 | /* Record the initial position of the return address. RTL is |
2796 | INCOMING_RETURN_ADDR_RTX. */ | |
2797 | ||
2798 | static void | |
2799 | initial_return_save (rtx rtl) | |
2800 | { | |
2801 | unsigned int reg = INVALID_REGNUM; | |
2802 | HOST_WIDE_INT offset = 0; | |
2803 | ||
2804 | switch (GET_CODE (rtl)) | |
2805 | { | |
2806 | case REG: | |
2807 | /* RA is in a register. */ | |
7263c6d7 | 2808 | reg = dwf_regno (rtl); |
a8e5c0e7 RH |
2809 | break; |
2810 | ||
2811 | case MEM: | |
2812 | /* RA is on the stack. */ | |
2813 | rtl = XEXP (rtl, 0); | |
2814 | switch (GET_CODE (rtl)) | |
2815 | { | |
2816 | case REG: | |
2817 | gcc_assert (REGNO (rtl) == STACK_POINTER_REGNUM); | |
2818 | offset = 0; | |
2819 | break; | |
2820 | ||
2821 | case PLUS: | |
2822 | gcc_assert (REGNO (XEXP (rtl, 0)) == STACK_POINTER_REGNUM); | |
2823 | offset = INTVAL (XEXP (rtl, 1)); | |
2824 | break; | |
2825 | ||
2826 | case MINUS: | |
2827 | gcc_assert (REGNO (XEXP (rtl, 0)) == STACK_POINTER_REGNUM); | |
2828 | offset = -INTVAL (XEXP (rtl, 1)); | |
2829 | break; | |
2830 | ||
2831 | default: | |
2832 | gcc_unreachable (); | |
2833 | } | |
2834 | ||
2835 | break; | |
2836 | ||
2837 | case PLUS: | |
2838 | /* The return address is at some offset from any value we can | |
2839 | actually load. For instance, on the SPARC it is in %i7+8. Just | |
2840 | ignore the offset for now; it doesn't matter for unwinding frames. */ | |
2841 | gcc_assert (CONST_INT_P (XEXP (rtl, 1))); | |
2842 | initial_return_save (XEXP (rtl, 0)); | |
2843 | return; | |
2844 | ||
2845 | default: | |
2846 | gcc_unreachable (); | |
2847 | } | |
2848 | ||
2849 | if (reg != DWARF_FRAME_RETURN_COLUMN) | |
2850 | { | |
2851 | if (reg != INVALID_REGNUM) | |
2852 | record_reg_saved_in_reg (rtl, pc_rtx); | |
f17d3401 | 2853 | reg_save (DWARF_FRAME_RETURN_COLUMN, reg, offset - cur_row->cfa.offset); |
a8e5c0e7 RH |
2854 | } |
2855 | } | |
647a1567 | 2856 | |
43215a89 RH |
2857 | static void |
2858 | create_cie_data (void) | |
2859 | { | |
2860 | dw_cfa_location loc; | |
2861 | dw_trace_info cie_trace; | |
2862 | ||
2863 | dw_stack_pointer_regnum = DWARF_FRAME_REGNUM (STACK_POINTER_REGNUM); | |
2864 | dw_frame_pointer_regnum = DWARF_FRAME_REGNUM (HARD_FRAME_POINTER_REGNUM); | |
2865 | ||
c3284718 | 2866 | memset (&cie_trace, 0, sizeof (cie_trace)); |
43215a89 RH |
2867 | cur_trace = &cie_trace; |
2868 | ||
2869 | add_cfi_vec = &cie_cfi_vec; | |
2870 | cie_cfi_row = cur_row = new_cfi_row (); | |
2871 | ||
2872 | /* On entry, the Canonical Frame Address is at SP. */ | |
c3284718 | 2873 | memset (&loc, 0, sizeof (loc)); |
43215a89 RH |
2874 | loc.reg = dw_stack_pointer_regnum; |
2875 | loc.offset = INCOMING_FRAME_SP_OFFSET; | |
2876 | def_cfa_1 (&loc); | |
2877 | ||
2878 | if (targetm.debug_unwind_info () == UI_DWARF2 | |
2879 | || targetm_common.except_unwind_info (&global_options) == UI_DWARF2) | |
2880 | { | |
2881 | initial_return_save (INCOMING_RETURN_ADDR_RTX); | |
2882 | ||
2883 | /* For a few targets, we have the return address incoming into a | |
2884 | register, but choose a different return column. This will result | |
2885 | in a DW_CFA_register for the return, and an entry in | |
2886 | regs_saved_in_regs to match. If the target later stores that | |
2887 | return address register to the stack, we want to be able to emit | |
2888 | the DW_CFA_offset against the return column, not the intermediate | |
2889 | save register. Save the contents of regs_saved_in_regs so that | |
2890 | we can re-initialize it at the start of each function. */ | |
9771b263 | 2891 | switch (cie_trace.regs_saved_in_regs.length ()) |
43215a89 RH |
2892 | { |
2893 | case 0: | |
2894 | break; | |
2895 | case 1: | |
766090c2 | 2896 | cie_return_save = ggc_alloc<reg_saved_in_data> (); |
9771b263 DN |
2897 | *cie_return_save = cie_trace.regs_saved_in_regs[0]; |
2898 | cie_trace.regs_saved_in_regs.release (); | |
43215a89 RH |
2899 | break; |
2900 | default: | |
2901 | gcc_unreachable (); | |
2902 | } | |
2903 | } | |
2904 | ||
2905 | add_cfi_vec = NULL; | |
2906 | cur_row = NULL; | |
2907 | cur_trace = NULL; | |
2908 | } | |
2909 | ||
7644b3c7 RH |
2910 | /* Annotate the function with NOTE_INSN_CFI notes to record the CFI |
2911 | state at each location within the function. These notes will be | |
2912 | emitted during pass_final. */ | |
647a1567 | 2913 | |
7644b3c7 RH |
2914 | static unsigned int |
2915 | execute_dwarf2_frame (void) | |
647a1567 | 2916 | { |
7644b3c7 RH |
2917 | /* The first time we're called, compute the incoming frame state. */ |
2918 | if (cie_cfi_vec == NULL) | |
43215a89 | 2919 | create_cie_data (); |
3edb53aa | 2920 | |
7644b3c7 RH |
2921 | dwarf2out_alloc_current_fde (); |
2922 | ||
829bdd4b RH |
2923 | create_pseudo_cfg (); |
2924 | ||
7644b3c7 RH |
2925 | /* Do the work. */ |
2926 | create_cfi_notes (); | |
829bdd4b | 2927 | connect_traces (); |
7644b3c7 RH |
2928 | add_cfis_to_fde (); |
2929 | ||
829bdd4b RH |
2930 | /* Free all the data we allocated. */ |
2931 | { | |
2932 | size_t i; | |
2933 | dw_trace_info *ti; | |
647a1567 | 2934 | |
9771b263 DN |
2935 | FOR_EACH_VEC_ELT (trace_info, i, ti) |
2936 | ti->regs_saved_in_regs.release (); | |
829bdd4b | 2937 | } |
9771b263 | 2938 | trace_info.release (); |
829bdd4b | 2939 | |
c203e8a7 TS |
2940 | delete trace_index; |
2941 | trace_index = NULL; | |
f17d3401 | 2942 | |
7644b3c7 | 2943 | return 0; |
647a1567 RH |
2944 | } |
2945 | \f | |
948d330e RH |
2946 | /* Convert a DWARF call frame info. operation to its string name */ |
2947 | ||
2948 | static const char * | |
2949 | dwarf_cfi_name (unsigned int cfi_opc) | |
2950 | { | |
11ec770e | 2951 | const char *name = get_DW_CFA_name (cfi_opc); |
948d330e | 2952 | |
11ec770e TT |
2953 | if (name != NULL) |
2954 | return name; | |
948d330e | 2955 | |
11ec770e | 2956 | return "DW_CFA_<unknown>"; |
948d330e RH |
2957 | } |
2958 | ||
2959 | /* This routine will generate the correct assembly data for a location | |
2960 | description based on a cfi entry with a complex address. */ | |
2961 | ||
2962 | static void | |
2963 | output_cfa_loc (dw_cfi_ref cfi, int for_eh) | |
2964 | { | |
2965 | dw_loc_descr_ref loc; | |
2966 | unsigned long size; | |
2967 | ||
2968 | if (cfi->dw_cfi_opc == DW_CFA_expression) | |
2969 | { | |
43215a89 | 2970 | unsigned r = |
948d330e RH |
2971 | DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, for_eh); |
2972 | dw2_asm_output_data (1, r, NULL); | |
2973 | loc = cfi->dw_cfi_oprnd2.dw_cfi_loc; | |
2974 | } | |
2975 | else | |
2976 | loc = cfi->dw_cfi_oprnd1.dw_cfi_loc; | |
2977 | ||
2978 | /* Output the size of the block. */ | |
2979 | size = size_of_locs (loc); | |
2980 | dw2_asm_output_data_uleb128 (size, NULL); | |
2981 | ||
2982 | /* Now output the operations themselves. */ | |
2983 | output_loc_sequence (loc, for_eh); | |
2984 | } | |
2985 | ||
2986 | /* Similar, but used for .cfi_escape. */ | |
2987 | ||
2988 | static void | |
2989 | output_cfa_loc_raw (dw_cfi_ref cfi) | |
2990 | { | |
2991 | dw_loc_descr_ref loc; | |
2992 | unsigned long size; | |
2993 | ||
2994 | if (cfi->dw_cfi_opc == DW_CFA_expression) | |
2995 | { | |
43215a89 | 2996 | unsigned r = |
948d330e RH |
2997 | DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, 1); |
2998 | fprintf (asm_out_file, "%#x,", r); | |
2999 | loc = cfi->dw_cfi_oprnd2.dw_cfi_loc; | |
3000 | } | |
3001 | else | |
3002 | loc = cfi->dw_cfi_oprnd1.dw_cfi_loc; | |
3003 | ||
3004 | /* Output the size of the block. */ | |
3005 | size = size_of_locs (loc); | |
3006 | dw2_asm_output_data_uleb128_raw (size); | |
3007 | fputc (',', asm_out_file); | |
3008 | ||
3009 | /* Now output the operations themselves. */ | |
3010 | output_loc_sequence_raw (loc); | |
3011 | } | |
3012 | ||
3013 | /* Output a Call Frame Information opcode and its operand(s). */ | |
3014 | ||
3015 | void | |
3016 | output_cfi (dw_cfi_ref cfi, dw_fde_ref fde, int for_eh) | |
3017 | { | |
3018 | unsigned long r; | |
3019 | HOST_WIDE_INT off; | |
3020 | ||
3021 | if (cfi->dw_cfi_opc == DW_CFA_advance_loc) | |
3022 | dw2_asm_output_data (1, (cfi->dw_cfi_opc | |
3023 | | (cfi->dw_cfi_oprnd1.dw_cfi_offset & 0x3f)), | |
3024 | "DW_CFA_advance_loc " HOST_WIDE_INT_PRINT_HEX, | |
3025 | ((unsigned HOST_WIDE_INT) | |
3026 | cfi->dw_cfi_oprnd1.dw_cfi_offset)); | |
3027 | else if (cfi->dw_cfi_opc == DW_CFA_offset) | |
3028 | { | |
3029 | r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, for_eh); | |
3030 | dw2_asm_output_data (1, (cfi->dw_cfi_opc | (r & 0x3f)), | |
3031 | "DW_CFA_offset, column %#lx", r); | |
3032 | off = div_data_align (cfi->dw_cfi_oprnd2.dw_cfi_offset); | |
3033 | dw2_asm_output_data_uleb128 (off, NULL); | |
3034 | } | |
3035 | else if (cfi->dw_cfi_opc == DW_CFA_restore) | |
3036 | { | |
3037 | r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, for_eh); | |
3038 | dw2_asm_output_data (1, (cfi->dw_cfi_opc | (r & 0x3f)), | |
3039 | "DW_CFA_restore, column %#lx", r); | |
3040 | } | |
3041 | else | |
3042 | { | |
3043 | dw2_asm_output_data (1, cfi->dw_cfi_opc, | |
3044 | "%s", dwarf_cfi_name (cfi->dw_cfi_opc)); | |
3045 | ||
3046 | switch (cfi->dw_cfi_opc) | |
3047 | { | |
3048 | case DW_CFA_set_loc: | |
3049 | if (for_eh) | |
3050 | dw2_asm_output_encoded_addr_rtx ( | |
3051 | ASM_PREFERRED_EH_DATA_FORMAT (/*code=*/1, /*global=*/0), | |
3052 | gen_rtx_SYMBOL_REF (Pmode, cfi->dw_cfi_oprnd1.dw_cfi_addr), | |
3053 | false, NULL); | |
3054 | else | |
3055 | dw2_asm_output_addr (DWARF2_ADDR_SIZE, | |
3056 | cfi->dw_cfi_oprnd1.dw_cfi_addr, NULL); | |
3057 | fde->dw_fde_current_label = cfi->dw_cfi_oprnd1.dw_cfi_addr; | |
3058 | break; | |
3059 | ||
3060 | case DW_CFA_advance_loc1: | |
3061 | dw2_asm_output_delta (1, cfi->dw_cfi_oprnd1.dw_cfi_addr, | |
3062 | fde->dw_fde_current_label, NULL); | |
3063 | fde->dw_fde_current_label = cfi->dw_cfi_oprnd1.dw_cfi_addr; | |
3064 | break; | |
3065 | ||
3066 | case DW_CFA_advance_loc2: | |
3067 | dw2_asm_output_delta (2, cfi->dw_cfi_oprnd1.dw_cfi_addr, | |
3068 | fde->dw_fde_current_label, NULL); | |
3069 | fde->dw_fde_current_label = cfi->dw_cfi_oprnd1.dw_cfi_addr; | |
3070 | break; | |
3071 | ||
3072 | case DW_CFA_advance_loc4: | |
3073 | dw2_asm_output_delta (4, cfi->dw_cfi_oprnd1.dw_cfi_addr, | |
3074 | fde->dw_fde_current_label, NULL); | |
3075 | fde->dw_fde_current_label = cfi->dw_cfi_oprnd1.dw_cfi_addr; | |
3076 | break; | |
3077 | ||
3078 | case DW_CFA_MIPS_advance_loc8: | |
3079 | dw2_asm_output_delta (8, cfi->dw_cfi_oprnd1.dw_cfi_addr, | |
3080 | fde->dw_fde_current_label, NULL); | |
3081 | fde->dw_fde_current_label = cfi->dw_cfi_oprnd1.dw_cfi_addr; | |
3082 | break; | |
3083 | ||
3084 | case DW_CFA_offset_extended: | |
3085 | r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, for_eh); | |
3086 | dw2_asm_output_data_uleb128 (r, NULL); | |
3087 | off = div_data_align (cfi->dw_cfi_oprnd2.dw_cfi_offset); | |
3088 | dw2_asm_output_data_uleb128 (off, NULL); | |
3089 | break; | |
3090 | ||
3091 | case DW_CFA_def_cfa: | |
3092 | r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, for_eh); | |
3093 | dw2_asm_output_data_uleb128 (r, NULL); | |
3094 | dw2_asm_output_data_uleb128 (cfi->dw_cfi_oprnd2.dw_cfi_offset, NULL); | |
3095 | break; | |
3096 | ||
3097 | case DW_CFA_offset_extended_sf: | |
3098 | r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, for_eh); | |
3099 | dw2_asm_output_data_uleb128 (r, NULL); | |
3100 | off = div_data_align (cfi->dw_cfi_oprnd2.dw_cfi_offset); | |
3101 | dw2_asm_output_data_sleb128 (off, NULL); | |
3102 | break; | |
3103 | ||
3104 | case DW_CFA_def_cfa_sf: | |
3105 | r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, for_eh); | |
3106 | dw2_asm_output_data_uleb128 (r, NULL); | |
3107 | off = div_data_align (cfi->dw_cfi_oprnd2.dw_cfi_offset); | |
3108 | dw2_asm_output_data_sleb128 (off, NULL); | |
3109 | break; | |
3110 | ||
3111 | case DW_CFA_restore_extended: | |
3112 | case DW_CFA_undefined: | |
3113 | case DW_CFA_same_value: | |
3114 | case DW_CFA_def_cfa_register: | |
3115 | r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, for_eh); | |
3116 | dw2_asm_output_data_uleb128 (r, NULL); | |
3117 | break; | |
3118 | ||
3119 | case DW_CFA_register: | |
3120 | r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, for_eh); | |
3121 | dw2_asm_output_data_uleb128 (r, NULL); | |
3122 | r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd2.dw_cfi_reg_num, for_eh); | |
3123 | dw2_asm_output_data_uleb128 (r, NULL); | |
3124 | break; | |
3125 | ||
3126 | case DW_CFA_def_cfa_offset: | |
3127 | case DW_CFA_GNU_args_size: | |
3128 | dw2_asm_output_data_uleb128 (cfi->dw_cfi_oprnd1.dw_cfi_offset, NULL); | |
3129 | break; | |
3130 | ||
3131 | case DW_CFA_def_cfa_offset_sf: | |
3132 | off = div_data_align (cfi->dw_cfi_oprnd1.dw_cfi_offset); | |
3133 | dw2_asm_output_data_sleb128 (off, NULL); | |
3134 | break; | |
3135 | ||
3136 | case DW_CFA_GNU_window_save: | |
3137 | break; | |
3138 | ||
3139 | case DW_CFA_def_cfa_expression: | |
3140 | case DW_CFA_expression: | |
3141 | output_cfa_loc (cfi, for_eh); | |
3142 | break; | |
3143 | ||
3144 | case DW_CFA_GNU_negative_offset_extended: | |
3145 | /* Obsoleted by DW_CFA_offset_extended_sf. */ | |
3146 | gcc_unreachable (); | |
3147 | ||
3148 | default: | |
3149 | break; | |
3150 | } | |
3151 | } | |
3152 | } | |
3153 | ||
3154 | /* Similar, but do it via assembler directives instead. */ | |
3155 | ||
3156 | void | |
3157 | output_cfi_directive (FILE *f, dw_cfi_ref cfi) | |
3158 | { | |
3159 | unsigned long r, r2; | |
3160 | ||
3161 | switch (cfi->dw_cfi_opc) | |
3162 | { | |
3163 | case DW_CFA_advance_loc: | |
3164 | case DW_CFA_advance_loc1: | |
3165 | case DW_CFA_advance_loc2: | |
3166 | case DW_CFA_advance_loc4: | |
3167 | case DW_CFA_MIPS_advance_loc8: | |
3168 | case DW_CFA_set_loc: | |
3169 | /* Should only be created in a code path not followed when emitting | |
3170 | via directives. The assembler is going to take care of this for | |
3171 | us. But this routines is also used for debugging dumps, so | |
3172 | print something. */ | |
3173 | gcc_assert (f != asm_out_file); | |
3174 | fprintf (f, "\t.cfi_advance_loc\n"); | |
3175 | break; | |
3176 | ||
3177 | case DW_CFA_offset: | |
3178 | case DW_CFA_offset_extended: | |
3179 | case DW_CFA_offset_extended_sf: | |
3180 | r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, 1); | |
3181 | fprintf (f, "\t.cfi_offset %lu, "HOST_WIDE_INT_PRINT_DEC"\n", | |
3182 | r, cfi->dw_cfi_oprnd2.dw_cfi_offset); | |
3183 | break; | |
3184 | ||
3185 | case DW_CFA_restore: | |
3186 | case DW_CFA_restore_extended: | |
3187 | r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, 1); | |
3188 | fprintf (f, "\t.cfi_restore %lu\n", r); | |
3189 | break; | |
3190 | ||
3191 | case DW_CFA_undefined: | |
3192 | r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, 1); | |
3193 | fprintf (f, "\t.cfi_undefined %lu\n", r); | |
3194 | break; | |
3195 | ||
3196 | case DW_CFA_same_value: | |
3197 | r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, 1); | |
3198 | fprintf (f, "\t.cfi_same_value %lu\n", r); | |
3199 | break; | |
3200 | ||
3201 | case DW_CFA_def_cfa: | |
3202 | case DW_CFA_def_cfa_sf: | |
3203 | r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, 1); | |
3204 | fprintf (f, "\t.cfi_def_cfa %lu, "HOST_WIDE_INT_PRINT_DEC"\n", | |
3205 | r, cfi->dw_cfi_oprnd2.dw_cfi_offset); | |
3206 | break; | |
3207 | ||
3208 | case DW_CFA_def_cfa_register: | |
3209 | r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, 1); | |
3210 | fprintf (f, "\t.cfi_def_cfa_register %lu\n", r); | |
3211 | break; | |
3212 | ||
3213 | case DW_CFA_register: | |
3214 | r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, 1); | |
3215 | r2 = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd2.dw_cfi_reg_num, 1); | |
3216 | fprintf (f, "\t.cfi_register %lu, %lu\n", r, r2); | |
3217 | break; | |
3218 | ||
3219 | case DW_CFA_def_cfa_offset: | |
3220 | case DW_CFA_def_cfa_offset_sf: | |
3221 | fprintf (f, "\t.cfi_def_cfa_offset " | |
3222 | HOST_WIDE_INT_PRINT_DEC"\n", | |
3223 | cfi->dw_cfi_oprnd1.dw_cfi_offset); | |
3224 | break; | |
3225 | ||
3226 | case DW_CFA_remember_state: | |
3227 | fprintf (f, "\t.cfi_remember_state\n"); | |
3228 | break; | |
3229 | case DW_CFA_restore_state: | |
3230 | fprintf (f, "\t.cfi_restore_state\n"); | |
3231 | break; | |
3232 | ||
3233 | case DW_CFA_GNU_args_size: | |
3234 | if (f == asm_out_file) | |
3235 | { | |
3236 | fprintf (f, "\t.cfi_escape %#x,", DW_CFA_GNU_args_size); | |
3237 | dw2_asm_output_data_uleb128_raw (cfi->dw_cfi_oprnd1.dw_cfi_offset); | |
3238 | if (flag_debug_asm) | |
3239 | fprintf (f, "\t%s args_size "HOST_WIDE_INT_PRINT_DEC, | |
3240 | ASM_COMMENT_START, cfi->dw_cfi_oprnd1.dw_cfi_offset); | |
3241 | fputc ('\n', f); | |
3242 | } | |
3243 | else | |
3244 | { | |
3245 | fprintf (f, "\t.cfi_GNU_args_size "HOST_WIDE_INT_PRINT_DEC "\n", | |
3246 | cfi->dw_cfi_oprnd1.dw_cfi_offset); | |
3247 | } | |
3248 | break; | |
3249 | ||
3250 | case DW_CFA_GNU_window_save: | |
3251 | fprintf (f, "\t.cfi_window_save\n"); | |
3252 | break; | |
3253 | ||
3254 | case DW_CFA_def_cfa_expression: | |
3255 | if (f != asm_out_file) | |
3256 | { | |
3257 | fprintf (f, "\t.cfi_def_cfa_expression ...\n"); | |
3258 | break; | |
3259 | } | |
3260 | /* FALLTHRU */ | |
3261 | case DW_CFA_expression: | |
3262 | if (f != asm_out_file) | |
3263 | { | |
3264 | fprintf (f, "\t.cfi_cfa_expression ...\n"); | |
3265 | break; | |
3266 | } | |
3267 | fprintf (f, "\t.cfi_escape %#x,", cfi->dw_cfi_opc); | |
3268 | output_cfa_loc_raw (cfi); | |
3269 | fputc ('\n', f); | |
3270 | break; | |
3271 | ||
3272 | default: | |
3273 | gcc_unreachable (); | |
3274 | } | |
3275 | } | |
3276 | ||
3277 | void | |
3278 | dwarf2out_emit_cfi (dw_cfi_ref cfi) | |
3279 | { | |
3280 | if (dwarf2out_do_cfi_asm ()) | |
3281 | output_cfi_directive (asm_out_file, cfi); | |
3282 | } | |
a5d0ce89 RH |
3283 | |
3284 | static void | |
3285 | dump_cfi_row (FILE *f, dw_cfi_row *row) | |
3286 | { | |
3287 | dw_cfi_ref cfi; | |
3288 | unsigned i; | |
3289 | ||
3290 | cfi = row->cfa_cfi; | |
3291 | if (!cfi) | |
3292 | { | |
3293 | dw_cfa_location dummy; | |
c3284718 | 3294 | memset (&dummy, 0, sizeof (dummy)); |
a5d0ce89 RH |
3295 | dummy.reg = INVALID_REGNUM; |
3296 | cfi = def_cfa_0 (&dummy, &row->cfa); | |
3297 | } | |
3298 | output_cfi_directive (f, cfi); | |
3299 | ||
9771b263 | 3300 | FOR_EACH_VEC_SAFE_ELT (row->reg_save, i, cfi) |
a5d0ce89 RH |
3301 | if (cfi) |
3302 | output_cfi_directive (f, cfi); | |
a5d0ce89 RH |
3303 | } |
3304 | ||
3305 | void debug_cfi_row (dw_cfi_row *row); | |
3306 | ||
3307 | void | |
3308 | debug_cfi_row (dw_cfi_row *row) | |
3309 | { | |
3310 | dump_cfi_row (stderr, row); | |
3311 | } | |
948d330e | 3312 | \f |
647a1567 | 3313 | |
7644b3c7 RH |
3314 | /* Save the result of dwarf2out_do_frame across PCH. |
3315 | This variable is tri-state, with 0 unset, >0 true, <0 false. */ | |
3316 | static GTY(()) signed char saved_do_cfi_asm = 0; | |
647a1567 RH |
3317 | |
3318 | /* Decide whether we want to emit frame unwind information for the current | |
3319 | translation unit. */ | |
3320 | ||
7644b3c7 | 3321 | bool |
647a1567 RH |
3322 | dwarf2out_do_frame (void) |
3323 | { | |
3324 | /* We want to emit correct CFA location expressions or lists, so we | |
3325 | have to return true if we're going to output debug info, even if | |
3326 | we're not going to output frame or unwind info. */ | |
3327 | if (write_symbols == DWARF2_DEBUG || write_symbols == VMS_AND_DWARF2_DEBUG) | |
3328 | return true; | |
3329 | ||
7644b3c7 | 3330 | if (saved_do_cfi_asm > 0) |
647a1567 RH |
3331 | return true; |
3332 | ||
3333 | if (targetm.debug_unwind_info () == UI_DWARF2) | |
3334 | return true; | |
3335 | ||
3336 | if ((flag_unwind_tables || flag_exceptions) | |
3337 | && targetm_common.except_unwind_info (&global_options) == UI_DWARF2) | |
3338 | return true; | |
3339 | ||
3340 | return false; | |
3341 | } | |
3342 | ||
3343 | /* Decide whether to emit frame unwind via assembler directives. */ | |
3344 | ||
7644b3c7 | 3345 | bool |
647a1567 RH |
3346 | dwarf2out_do_cfi_asm (void) |
3347 | { | |
3348 | int enc; | |
3349 | ||
7644b3c7 RH |
3350 | if (saved_do_cfi_asm != 0) |
3351 | return saved_do_cfi_asm > 0; | |
3352 | ||
3353 | /* Assume failure for a moment. */ | |
3354 | saved_do_cfi_asm = -1; | |
3355 | ||
647a1567 RH |
3356 | if (!flag_dwarf2_cfi_asm || !dwarf2out_do_frame ()) |
3357 | return false; | |
3358 | if (!HAVE_GAS_CFI_PERSONALITY_DIRECTIVE) | |
3359 | return false; | |
3360 | ||
3361 | /* Make sure the personality encoding is one the assembler can support. | |
3362 | In particular, aligned addresses can't be handled. */ | |
3363 | enc = ASM_PREFERRED_EH_DATA_FORMAT (/*code=*/2,/*global=*/1); | |
3364 | if ((enc & 0x70) != 0 && (enc & 0x70) != DW_EH_PE_pcrel) | |
3365 | return false; | |
3366 | enc = ASM_PREFERRED_EH_DATA_FORMAT (/*code=*/0,/*global=*/0); | |
3367 | if ((enc & 0x70) != 0 && (enc & 0x70) != DW_EH_PE_pcrel) | |
3368 | return false; | |
3369 | ||
3370 | /* If we can't get the assembler to emit only .debug_frame, and we don't need | |
3371 | dwarf2 unwind info for exceptions, then emit .debug_frame by hand. */ | |
3372 | if (!HAVE_GAS_CFI_SECTIONS_DIRECTIVE | |
3373 | && !flag_unwind_tables && !flag_exceptions | |
3374 | && targetm_common.except_unwind_info (&global_options) != UI_DWARF2) | |
3375 | return false; | |
3376 | ||
7644b3c7 RH |
3377 | /* Success! */ |
3378 | saved_do_cfi_asm = 1; | |
647a1567 RH |
3379 | return true; |
3380 | } | |
3381 | ||
27a4cd48 DM |
3382 | namespace { |
3383 | ||
3384 | const pass_data pass_data_dwarf2_frame = | |
3385 | { | |
3386 | RTL_PASS, /* type */ | |
3387 | "dwarf2", /* name */ | |
3388 | OPTGROUP_NONE, /* optinfo_flags */ | |
27a4cd48 DM |
3389 | TV_FINAL, /* tv_id */ |
3390 | 0, /* properties_required */ | |
3391 | 0, /* properties_provided */ | |
3392 | 0, /* properties_destroyed */ | |
3393 | 0, /* todo_flags_start */ | |
3394 | 0, /* todo_flags_finish */ | |
7644b3c7 RH |
3395 | }; |
3396 | ||
27a4cd48 DM |
3397 | class pass_dwarf2_frame : public rtl_opt_pass |
3398 | { | |
3399 | public: | |
c3284718 RS |
3400 | pass_dwarf2_frame (gcc::context *ctxt) |
3401 | : rtl_opt_pass (pass_data_dwarf2_frame, ctxt) | |
27a4cd48 DM |
3402 | {} |
3403 | ||
3404 | /* opt_pass methods: */ | |
1a3d085c | 3405 | virtual bool gate (function *); |
be55bfe6 | 3406 | virtual unsigned int execute (function *) { return execute_dwarf2_frame (); } |
27a4cd48 DM |
3407 | |
3408 | }; // class pass_dwarf2_frame | |
3409 | ||
1a3d085c TS |
3410 | bool |
3411 | pass_dwarf2_frame::gate (function *) | |
3412 | { | |
3413 | #ifndef HAVE_prologue | |
3414 | /* Targets which still implement the prologue in assembler text | |
3415 | cannot use the generic dwarf2 unwinding. */ | |
3416 | return false; | |
3417 | #endif | |
3418 | ||
3419 | /* ??? What to do for UI_TARGET unwinding? They might be able to benefit | |
3420 | from the optimized shrink-wrapping annotations that we will compute. | |
3421 | For now, only produce the CFI notes for dwarf2. */ | |
3422 | return dwarf2out_do_frame (); | |
3423 | } | |
3424 | ||
27a4cd48 DM |
3425 | } // anon namespace |
3426 | ||
3427 | rtl_opt_pass * | |
3428 | make_pass_dwarf2_frame (gcc::context *ctxt) | |
3429 | { | |
3430 | return new pass_dwarf2_frame (ctxt); | |
3431 | } | |
3432 | ||
647a1567 | 3433 | #include "gt-dwarf2cfi.h" |