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Commit | Line | Data |
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23b2ce53 | 1 | /* Emit RTL for the GNU C-Compiler expander. |
ef58a523 | 2 | Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998, |
90a74703 | 3 | 1999, 2000, 2001 Free Software Foundation, Inc. |
23b2ce53 | 4 | |
1322177d | 5 | This file is part of GCC. |
23b2ce53 | 6 | |
1322177d LB |
7 | GCC is free software; you can redistribute it and/or modify it under |
8 | the terms of the GNU General Public License as published by the Free | |
9 | Software Foundation; either version 2, or (at your option) any later | |
10 | version. | |
23b2ce53 | 11 | |
1322177d LB |
12 | GCC is distributed in the hope that it will be useful, but WITHOUT ANY |
13 | WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
14 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
15 | for more details. | |
23b2ce53 RS |
16 | |
17 | You should have received a copy of the GNU General Public License | |
1322177d LB |
18 | along with GCC; see the file COPYING. If not, write to the Free |
19 | Software Foundation, 59 Temple Place - Suite 330, Boston, MA | |
20 | 02111-1307, USA. */ | |
23b2ce53 RS |
21 | |
22 | ||
23 | /* Middle-to-low level generation of rtx code and insns. | |
24 | ||
25 | This file contains the functions `gen_rtx', `gen_reg_rtx' | |
26 | and `gen_label_rtx' that are the usual ways of creating rtl | |
27 | expressions for most purposes. | |
28 | ||
29 | It also has the functions for creating insns and linking | |
30 | them in the doubly-linked chain. | |
31 | ||
32 | The patterns of the insns are created by machine-dependent | |
33 | routines in insn-emit.c, which is generated automatically from | |
34 | the machine description. These routines use `gen_rtx' to make | |
35 | the individual rtx's of the pattern; what is machine dependent | |
36 | is the kind of rtx's they make and what arguments they use. */ | |
37 | ||
38 | #include "config.h" | |
670ee920 | 39 | #include "system.h" |
01198c2f | 40 | #include "toplev.h" |
23b2ce53 | 41 | #include "rtl.h" |
a25c7971 | 42 | #include "tree.h" |
6baf1cc8 | 43 | #include "tm_p.h" |
23b2ce53 RS |
44 | #include "flags.h" |
45 | #include "function.h" | |
46 | #include "expr.h" | |
47 | #include "regs.h" | |
aff48bca | 48 | #include "hard-reg-set.h" |
c13e8210 | 49 | #include "hashtab.h" |
23b2ce53 | 50 | #include "insn-config.h" |
e9a25f70 | 51 | #include "recog.h" |
23b2ce53 | 52 | #include "real.h" |
ca695ac9 | 53 | #include "obstack.h" |
0dfa1860 | 54 | #include "bitmap.h" |
a05924f9 | 55 | #include "basic-block.h" |
87ff9c8e | 56 | #include "ggc.h" |
e1772ac0 | 57 | #include "debug.h" |
d23c55c2 | 58 | #include "langhooks.h" |
ca695ac9 | 59 | |
1d445e9e ILT |
60 | /* Commonly used modes. */ |
61 | ||
0f41302f MS |
62 | enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */ |
63 | enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */ | |
9ec36da5 | 64 | enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */ |
0f41302f | 65 | enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */ |
1d445e9e | 66 | |
23b2ce53 RS |
67 | |
68 | /* This is *not* reset after each function. It gives each CODE_LABEL | |
69 | in the entire compilation a unique label number. */ | |
70 | ||
71 | static int label_num = 1; | |
72 | ||
23b2ce53 RS |
73 | /* Highest label number in current function. |
74 | Zero means use the value of label_num instead. | |
75 | This is nonzero only when belatedly compiling an inline function. */ | |
76 | ||
77 | static int last_label_num; | |
78 | ||
79 | /* Value label_num had when set_new_first_and_last_label_number was called. | |
80 | If label_num has not changed since then, last_label_num is valid. */ | |
81 | ||
82 | static int base_label_num; | |
83 | ||
84 | /* Nonzero means do not generate NOTEs for source line numbers. */ | |
85 | ||
86 | static int no_line_numbers; | |
87 | ||
88 | /* Commonly used rtx's, so that we only need space for one copy. | |
89 | These are initialized once for the entire compilation. | |
90 | All of these except perhaps the floating-point CONST_DOUBLEs | |
91 | are unique; no other rtx-object will be equal to any of these. */ | |
92 | ||
5da077de | 93 | rtx global_rtl[GR_MAX]; |
23b2ce53 RS |
94 | |
95 | /* We record floating-point CONST_DOUBLEs in each floating-point mode for | |
96 | the values of 0, 1, and 2. For the integer entries and VOIDmode, we | |
97 | record a copy of const[012]_rtx. */ | |
98 | ||
99 | rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE]; | |
100 | ||
68d75312 JC |
101 | rtx const_true_rtx; |
102 | ||
23b2ce53 RS |
103 | REAL_VALUE_TYPE dconst0; |
104 | REAL_VALUE_TYPE dconst1; | |
105 | REAL_VALUE_TYPE dconst2; | |
106 | REAL_VALUE_TYPE dconstm1; | |
107 | ||
108 | /* All references to the following fixed hard registers go through | |
109 | these unique rtl objects. On machines where the frame-pointer and | |
110 | arg-pointer are the same register, they use the same unique object. | |
111 | ||
112 | After register allocation, other rtl objects which used to be pseudo-regs | |
113 | may be clobbered to refer to the frame-pointer register. | |
114 | But references that were originally to the frame-pointer can be | |
115 | distinguished from the others because they contain frame_pointer_rtx. | |
116 | ||
ac6f08b0 DE |
117 | When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little |
118 | tricky: until register elimination has taken place hard_frame_pointer_rtx | |
750c9258 | 119 | should be used if it is being set, and frame_pointer_rtx otherwise. After |
ac6f08b0 DE |
120 | register elimination hard_frame_pointer_rtx should always be used. |
121 | On machines where the two registers are same (most) then these are the | |
122 | same. | |
123 | ||
23b2ce53 RS |
124 | In an inline procedure, the stack and frame pointer rtxs may not be |
125 | used for anything else. */ | |
23b2ce53 RS |
126 | rtx struct_value_rtx; /* (REG:Pmode STRUCT_VALUE_REGNUM) */ |
127 | rtx struct_value_incoming_rtx; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */ | |
128 | rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */ | |
129 | rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */ | |
130 | rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */ | |
131 | ||
a4417a86 JW |
132 | /* This is used to implement __builtin_return_address for some machines. |
133 | See for instance the MIPS port. */ | |
134 | rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */ | |
135 | ||
23b2ce53 RS |
136 | /* We make one copy of (const_int C) where C is in |
137 | [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT] | |
138 | to save space during the compilation and simplify comparisons of | |
139 | integers. */ | |
140 | ||
5da077de | 141 | rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1]; |
23b2ce53 | 142 | |
c13e8210 MM |
143 | /* A hash table storing CONST_INTs whose absolute value is greater |
144 | than MAX_SAVED_CONST_INT. */ | |
145 | ||
146 | static htab_t const_int_htab; | |
147 | ||
173b24b9 RK |
148 | /* A hash table storing memory attribute structures. */ |
149 | static htab_t mem_attrs_htab; | |
150 | ||
23b2ce53 RS |
151 | /* start_sequence and gen_sequence can make a lot of rtx expressions which are |
152 | shortly thrown away. We use two mechanisms to prevent this waste: | |
153 | ||
a3770a81 RH |
154 | For sizes up to 5 elements, we keep a SEQUENCE and its associated |
155 | rtvec for use by gen_sequence. One entry for each size is | |
156 | sufficient because most cases are calls to gen_sequence followed by | |
157 | immediately emitting the SEQUENCE. Reuse is safe since emitting a | |
158 | sequence is destructive on the insn in it anyway and hence can't be | |
159 | redone. | |
23b2ce53 RS |
160 | |
161 | We do not bother to save this cached data over nested function calls. | |
162 | Instead, we just reinitialize them. */ | |
163 | ||
164 | #define SEQUENCE_RESULT_SIZE 5 | |
165 | ||
23b2ce53 RS |
166 | static rtx sequence_result[SEQUENCE_RESULT_SIZE]; |
167 | ||
0f41302f | 168 | /* During RTL generation, we also keep a list of free INSN rtl codes. */ |
43127294 RK |
169 | static rtx free_insn; |
170 | ||
01d939e8 BS |
171 | #define first_insn (cfun->emit->x_first_insn) |
172 | #define last_insn (cfun->emit->x_last_insn) | |
173 | #define cur_insn_uid (cfun->emit->x_cur_insn_uid) | |
174 | #define last_linenum (cfun->emit->x_last_linenum) | |
175 | #define last_filename (cfun->emit->x_last_filename) | |
176 | #define first_label_num (cfun->emit->x_first_label_num) | |
23b2ce53 | 177 | |
711d877c KG |
178 | static rtx make_jump_insn_raw PARAMS ((rtx)); |
179 | static rtx make_call_insn_raw PARAMS ((rtx)); | |
180 | static rtx find_line_note PARAMS ((rtx)); | |
181 | static void mark_sequence_stack PARAMS ((struct sequence_stack *)); | |
738cc472 RK |
182 | static rtx change_address_1 PARAMS ((rtx, enum machine_mode, rtx, |
183 | int)); | |
d1b81779 | 184 | static void unshare_all_rtl_1 PARAMS ((rtx)); |
5c6df058 | 185 | static void unshare_all_decls PARAMS ((tree)); |
2d4aecb3 | 186 | static void reset_used_decls PARAMS ((tree)); |
e5bef2e4 | 187 | static void mark_label_nuses PARAMS ((rtx)); |
c13e8210 MM |
188 | static hashval_t const_int_htab_hash PARAMS ((const void *)); |
189 | static int const_int_htab_eq PARAMS ((const void *, | |
190 | const void *)); | |
173b24b9 RK |
191 | static hashval_t mem_attrs_htab_hash PARAMS ((const void *)); |
192 | static int mem_attrs_htab_eq PARAMS ((const void *, | |
193 | const void *)); | |
194 | static void mem_attrs_mark PARAMS ((const void *)); | |
195 | static mem_attrs *get_mem_attrs PARAMS ((HOST_WIDE_INT, tree, rtx, | |
10b76d73 RK |
196 | rtx, unsigned int, |
197 | enum machine_mode)); | |
c13e8210 | 198 | |
6b24c259 JH |
199 | /* Probability of the conditional branch currently proceeded by try_split. |
200 | Set to -1 otherwise. */ | |
201 | int split_branch_probability = -1; | |
ca695ac9 | 202 | \f |
c13e8210 MM |
203 | /* Returns a hash code for X (which is a really a CONST_INT). */ |
204 | ||
205 | static hashval_t | |
206 | const_int_htab_hash (x) | |
207 | const void *x; | |
208 | { | |
e77d72cb | 209 | return (hashval_t) INTVAL ((const struct rtx_def *) x); |
c13e8210 MM |
210 | } |
211 | ||
212 | /* Returns non-zero if the value represented by X (which is really a | |
213 | CONST_INT) is the same as that given by Y (which is really a | |
214 | HOST_WIDE_INT *). */ | |
215 | ||
216 | static int | |
217 | const_int_htab_eq (x, y) | |
218 | const void *x; | |
219 | const void *y; | |
220 | { | |
e77d72cb | 221 | return (INTVAL ((const struct rtx_def *) x) == *((const HOST_WIDE_INT *) y)); |
c13e8210 MM |
222 | } |
223 | ||
173b24b9 RK |
224 | /* Returns a hash code for X (which is a really a mem_attrs *). */ |
225 | ||
226 | static hashval_t | |
227 | mem_attrs_htab_hash (x) | |
228 | const void *x; | |
229 | { | |
230 | mem_attrs *p = (mem_attrs *) x; | |
231 | ||
232 | return (p->alias ^ (p->align * 1000) | |
233 | ^ ((p->offset ? INTVAL (p->offset) : 0) * 50000) | |
234 | ^ ((p->size ? INTVAL (p->size) : 0) * 2500000) | |
235 | ^ (long) p->decl); | |
236 | } | |
237 | ||
238 | /* Returns non-zero if the value represented by X (which is really a | |
239 | mem_attrs *) is the same as that given by Y (which is also really a | |
240 | mem_attrs *). */ | |
c13e8210 MM |
241 | |
242 | static int | |
173b24b9 RK |
243 | mem_attrs_htab_eq (x, y) |
244 | const void *x; | |
245 | const void *y; | |
c13e8210 | 246 | { |
173b24b9 RK |
247 | mem_attrs *p = (mem_attrs *) x; |
248 | mem_attrs *q = (mem_attrs *) y; | |
249 | ||
250 | return (p->alias == q->alias && p->decl == q->decl && p->offset == q->offset | |
251 | && p->size == q->size && p->align == q->align); | |
c13e8210 MM |
252 | } |
253 | ||
173b24b9 RK |
254 | /* This routine is called when we determine that we need a mem_attrs entry. |
255 | It marks the associated decl and RTL as being used, if present. */ | |
c13e8210 MM |
256 | |
257 | static void | |
173b24b9 RK |
258 | mem_attrs_mark (x) |
259 | const void *x; | |
c13e8210 | 260 | { |
173b24b9 RK |
261 | mem_attrs *p = (mem_attrs *) x; |
262 | ||
263 | if (p->decl) | |
264 | ggc_mark_tree (p->decl); | |
265 | ||
266 | if (p->offset) | |
267 | ggc_mark_rtx (p->offset); | |
268 | ||
269 | if (p->size) | |
270 | ggc_mark_rtx (p->size); | |
271 | } | |
272 | ||
273 | /* Allocate a new mem_attrs structure and insert it into the hash table if | |
10b76d73 RK |
274 | one identical to it is not already in the table. We are doing this for |
275 | MEM of mode MODE. */ | |
173b24b9 RK |
276 | |
277 | static mem_attrs * | |
10b76d73 | 278 | get_mem_attrs (alias, decl, offset, size, align, mode) |
173b24b9 RK |
279 | HOST_WIDE_INT alias; |
280 | tree decl; | |
281 | rtx offset; | |
282 | rtx size; | |
283 | unsigned int align; | |
10b76d73 | 284 | enum machine_mode mode; |
173b24b9 RK |
285 | { |
286 | mem_attrs attrs; | |
287 | void **slot; | |
288 | ||
10b76d73 RK |
289 | /* If everything is the default, we can just return zero. */ |
290 | if (alias == 0 && decl == 0 && offset == 0 | |
291 | && (size == 0 | |
292 | || (mode != BLKmode && GET_MODE_SIZE (mode) == INTVAL (size))) | |
916f389b | 293 | && (align == BITS_PER_UNIT |
10b76d73 RK |
294 | || (mode != BLKmode && align == GET_MODE_ALIGNMENT (mode)))) |
295 | return 0; | |
296 | ||
173b24b9 RK |
297 | attrs.alias = alias; |
298 | attrs.decl = decl; | |
299 | attrs.offset = offset; | |
300 | attrs.size = size; | |
301 | attrs.align = align; | |
302 | ||
303 | slot = htab_find_slot (mem_attrs_htab, &attrs, INSERT); | |
304 | if (*slot == 0) | |
305 | { | |
306 | *slot = ggc_alloc (sizeof (mem_attrs)); | |
307 | memcpy (*slot, &attrs, sizeof (mem_attrs)); | |
308 | } | |
309 | ||
310 | return *slot; | |
c13e8210 MM |
311 | } |
312 | ||
08394eef BS |
313 | /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and |
314 | don't attempt to share with the various global pieces of rtl (such as | |
315 | frame_pointer_rtx). */ | |
316 | ||
317 | rtx | |
318 | gen_raw_REG (mode, regno) | |
319 | enum machine_mode mode; | |
320 | int regno; | |
321 | { | |
322 | rtx x = gen_rtx_raw_REG (mode, regno); | |
323 | ORIGINAL_REGNO (x) = regno; | |
324 | return x; | |
325 | } | |
326 | ||
c5c76735 JL |
327 | /* There are some RTL codes that require special attention; the generation |
328 | functions do the raw handling. If you add to this list, modify | |
329 | special_rtx in gengenrtl.c as well. */ | |
330 | ||
3b80f6ca RH |
331 | rtx |
332 | gen_rtx_CONST_INT (mode, arg) | |
c13e8210 | 333 | enum machine_mode mode ATTRIBUTE_UNUSED; |
3b80f6ca RH |
334 | HOST_WIDE_INT arg; |
335 | { | |
c13e8210 MM |
336 | void **slot; |
337 | ||
3b80f6ca | 338 | if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT) |
5da077de | 339 | return const_int_rtx[arg + MAX_SAVED_CONST_INT]; |
3b80f6ca RH |
340 | |
341 | #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1 | |
342 | if (const_true_rtx && arg == STORE_FLAG_VALUE) | |
343 | return const_true_rtx; | |
344 | #endif | |
345 | ||
c13e8210 | 346 | /* Look up the CONST_INT in the hash table. */ |
e38992e8 RK |
347 | slot = htab_find_slot_with_hash (const_int_htab, &arg, |
348 | (hashval_t) arg, INSERT); | |
29105cea | 349 | if (*slot == 0) |
1f8f4a0b | 350 | *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg); |
c13e8210 MM |
351 | |
352 | return (rtx) *slot; | |
3b80f6ca RH |
353 | } |
354 | ||
29105cea | 355 | /* CONST_DOUBLEs needs special handling because their length is known |
0133b7d9 | 356 | only at run-time. */ |
29105cea | 357 | |
0133b7d9 | 358 | rtx |
a79e3a45 | 359 | gen_rtx_CONST_DOUBLE (mode, arg0, arg1) |
0133b7d9 | 360 | enum machine_mode mode; |
a79e3a45 | 361 | HOST_WIDE_INT arg0, arg1; |
0133b7d9 RH |
362 | { |
363 | rtx r = rtx_alloc (CONST_DOUBLE); | |
2454beaf RH |
364 | int i; |
365 | ||
0133b7d9 | 366 | PUT_MODE (r, mode); |
a79e3a45 RK |
367 | X0EXP (r, 0) = NULL_RTX; |
368 | XWINT (r, 1) = arg0; | |
2454beaf | 369 | XWINT (r, 2) = arg1; |
2454beaf | 370 | |
a79e3a45 | 371 | for (i = GET_RTX_LENGTH (CONST_DOUBLE) - 1; i > 2; --i) |
2454beaf RH |
372 | XWINT (r, i) = 0; |
373 | ||
0133b7d9 RH |
374 | return r; |
375 | } | |
376 | ||
3b80f6ca RH |
377 | rtx |
378 | gen_rtx_REG (mode, regno) | |
379 | enum machine_mode mode; | |
380 | int regno; | |
381 | { | |
382 | /* In case the MD file explicitly references the frame pointer, have | |
383 | all such references point to the same frame pointer. This is | |
384 | used during frame pointer elimination to distinguish the explicit | |
385 | references to these registers from pseudos that happened to be | |
386 | assigned to them. | |
387 | ||
388 | If we have eliminated the frame pointer or arg pointer, we will | |
389 | be using it as a normal register, for example as a spill | |
390 | register. In such cases, we might be accessing it in a mode that | |
391 | is not Pmode and therefore cannot use the pre-allocated rtx. | |
392 | ||
393 | Also don't do this when we are making new REGs in reload, since | |
394 | we don't want to get confused with the real pointers. */ | |
395 | ||
396 | if (mode == Pmode && !reload_in_progress) | |
397 | { | |
bcb33994 | 398 | if (regno == FRAME_POINTER_REGNUM) |
3b80f6ca RH |
399 | return frame_pointer_rtx; |
400 | #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM | |
bcb33994 | 401 | if (regno == HARD_FRAME_POINTER_REGNUM) |
3b80f6ca RH |
402 | return hard_frame_pointer_rtx; |
403 | #endif | |
404 | #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM | |
bcb33994 | 405 | if (regno == ARG_POINTER_REGNUM) |
3b80f6ca RH |
406 | return arg_pointer_rtx; |
407 | #endif | |
408 | #ifdef RETURN_ADDRESS_POINTER_REGNUM | |
bcb33994 | 409 | if (regno == RETURN_ADDRESS_POINTER_REGNUM) |
3b80f6ca RH |
410 | return return_address_pointer_rtx; |
411 | #endif | |
bcb33994 | 412 | if (regno == STACK_POINTER_REGNUM) |
3b80f6ca RH |
413 | return stack_pointer_rtx; |
414 | } | |
415 | ||
08394eef | 416 | return gen_raw_REG (mode, regno); |
3b80f6ca RH |
417 | } |
418 | ||
41472af8 MM |
419 | rtx |
420 | gen_rtx_MEM (mode, addr) | |
421 | enum machine_mode mode; | |
422 | rtx addr; | |
423 | { | |
424 | rtx rt = gen_rtx_raw_MEM (mode, addr); | |
425 | ||
426 | /* This field is not cleared by the mere allocation of the rtx, so | |
427 | we clear it here. */ | |
173b24b9 | 428 | MEM_ATTRS (rt) = 0; |
41472af8 MM |
429 | |
430 | return rt; | |
431 | } | |
ddef6bc7 JJ |
432 | |
433 | rtx | |
434 | gen_rtx_SUBREG (mode, reg, offset) | |
435 | enum machine_mode mode; | |
436 | rtx reg; | |
437 | int offset; | |
438 | { | |
439 | /* This is the most common failure type. | |
440 | Catch it early so we can see who does it. */ | |
441 | if ((offset % GET_MODE_SIZE (mode)) != 0) | |
442 | abort (); | |
443 | ||
444 | /* This check isn't usable right now because combine will | |
445 | throw arbitrary crap like a CALL into a SUBREG in | |
446 | gen_lowpart_for_combine so we must just eat it. */ | |
447 | #if 0 | |
448 | /* Check for this too. */ | |
449 | if (offset >= GET_MODE_SIZE (GET_MODE (reg))) | |
450 | abort (); | |
451 | #endif | |
452 | return gen_rtx_fmt_ei (SUBREG, mode, reg, offset); | |
453 | } | |
454 | ||
173b24b9 RK |
455 | /* Generate a SUBREG representing the least-significant part of REG if MODE |
456 | is smaller than mode of REG, otherwise paradoxical SUBREG. */ | |
457 | ||
ddef6bc7 JJ |
458 | rtx |
459 | gen_lowpart_SUBREG (mode, reg) | |
460 | enum machine_mode mode; | |
461 | rtx reg; | |
462 | { | |
463 | enum machine_mode inmode; | |
ddef6bc7 JJ |
464 | |
465 | inmode = GET_MODE (reg); | |
466 | if (inmode == VOIDmode) | |
467 | inmode = mode; | |
e0e08ac2 JH |
468 | return gen_rtx_SUBREG (mode, reg, |
469 | subreg_lowpart_offset (mode, inmode)); | |
ddef6bc7 | 470 | } |
c5c76735 | 471 | \f |
23b2ce53 RS |
472 | /* rtx gen_rtx (code, mode, [element1, ..., elementn]) |
473 | ** | |
474 | ** This routine generates an RTX of the size specified by | |
475 | ** <code>, which is an RTX code. The RTX structure is initialized | |
476 | ** from the arguments <element1> through <elementn>, which are | |
477 | ** interpreted according to the specific RTX type's format. The | |
478 | ** special machine mode associated with the rtx (if any) is specified | |
479 | ** in <mode>. | |
480 | ** | |
1632afca | 481 | ** gen_rtx can be invoked in a way which resembles the lisp-like |
23b2ce53 RS |
482 | ** rtx it will generate. For example, the following rtx structure: |
483 | ** | |
484 | ** (plus:QI (mem:QI (reg:SI 1)) | |
485 | ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3)))) | |
486 | ** | |
487 | ** ...would be generated by the following C code: | |
488 | ** | |
750c9258 | 489 | ** gen_rtx (PLUS, QImode, |
23b2ce53 RS |
490 | ** gen_rtx (MEM, QImode, |
491 | ** gen_rtx (REG, SImode, 1)), | |
492 | ** gen_rtx (MEM, QImode, | |
493 | ** gen_rtx (PLUS, SImode, | |
494 | ** gen_rtx (REG, SImode, 2), | |
495 | ** gen_rtx (REG, SImode, 3)))), | |
496 | */ | |
497 | ||
498 | /*VARARGS2*/ | |
499 | rtx | |
711d877c | 500 | gen_rtx VPARAMS ((enum rtx_code code, enum machine_mode mode, ...)) |
23b2ce53 | 501 | { |
b3694847 SS |
502 | int i; /* Array indices... */ |
503 | const char *fmt; /* Current rtx's format... */ | |
504 | rtx rt_val; /* RTX to return to caller... */ | |
23b2ce53 | 505 | |
7a75edb7 AJ |
506 | VA_OPEN (p, mode); |
507 | VA_FIXEDARG (p, enum rtx_code, code); | |
508 | VA_FIXEDARG (p, enum machine_mode, mode); | |
23b2ce53 | 509 | |
0133b7d9 | 510 | switch (code) |
23b2ce53 | 511 | { |
0133b7d9 RH |
512 | case CONST_INT: |
513 | rt_val = gen_rtx_CONST_INT (mode, va_arg (p, HOST_WIDE_INT)); | |
514 | break; | |
515 | ||
516 | case CONST_DOUBLE: | |
517 | { | |
a79e3a45 | 518 | HOST_WIDE_INT arg0 = va_arg (p, HOST_WIDE_INT); |
0133b7d9 | 519 | HOST_WIDE_INT arg1 = va_arg (p, HOST_WIDE_INT); |
a79e3a45 RK |
520 | |
521 | rt_val = gen_rtx_CONST_DOUBLE (mode, arg0, arg1); | |
0133b7d9 RH |
522 | } |
523 | break; | |
524 | ||
525 | case REG: | |
526 | rt_val = gen_rtx_REG (mode, va_arg (p, int)); | |
527 | break; | |
528 | ||
529 | case MEM: | |
530 | rt_val = gen_rtx_MEM (mode, va_arg (p, rtx)); | |
531 | break; | |
532 | ||
533 | default: | |
23b2ce53 RS |
534 | rt_val = rtx_alloc (code); /* Allocate the storage space. */ |
535 | rt_val->mode = mode; /* Store the machine mode... */ | |
536 | ||
537 | fmt = GET_RTX_FORMAT (code); /* Find the right format... */ | |
538 | for (i = 0; i < GET_RTX_LENGTH (code); i++) | |
539 | { | |
540 | switch (*fmt++) | |
541 | { | |
542 | case '0': /* Unused field. */ | |
543 | break; | |
544 | ||
545 | case 'i': /* An integer? */ | |
546 | XINT (rt_val, i) = va_arg (p, int); | |
547 | break; | |
548 | ||
906c4e36 RK |
549 | case 'w': /* A wide integer? */ |
550 | XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT); | |
551 | break; | |
552 | ||
23b2ce53 RS |
553 | case 's': /* A string? */ |
554 | XSTR (rt_val, i) = va_arg (p, char *); | |
555 | break; | |
556 | ||
557 | case 'e': /* An expression? */ | |
558 | case 'u': /* An insn? Same except when printing. */ | |
559 | XEXP (rt_val, i) = va_arg (p, rtx); | |
560 | break; | |
561 | ||
562 | case 'E': /* An RTX vector? */ | |
563 | XVEC (rt_val, i) = va_arg (p, rtvec); | |
564 | break; | |
565 | ||
0dfa1860 MM |
566 | case 'b': /* A bitmap? */ |
567 | XBITMAP (rt_val, i) = va_arg (p, bitmap); | |
568 | break; | |
569 | ||
570 | case 't': /* A tree? */ | |
571 | XTREE (rt_val, i) = va_arg (p, tree); | |
572 | break; | |
573 | ||
23b2ce53 | 574 | default: |
1632afca | 575 | abort (); |
23b2ce53 RS |
576 | } |
577 | } | |
0133b7d9 | 578 | break; |
23b2ce53 | 579 | } |
0133b7d9 | 580 | |
7a75edb7 | 581 | VA_CLOSE (p); |
0133b7d9 | 582 | return rt_val; |
23b2ce53 RS |
583 | } |
584 | ||
585 | /* gen_rtvec (n, [rt1, ..., rtn]) | |
586 | ** | |
587 | ** This routine creates an rtvec and stores within it the | |
588 | ** pointers to rtx's which are its arguments. | |
589 | */ | |
590 | ||
591 | /*VARARGS1*/ | |
592 | rtvec | |
711d877c | 593 | gen_rtvec VPARAMS ((int n, ...)) |
23b2ce53 | 594 | { |
6268b922 | 595 | int i, save_n; |
23b2ce53 RS |
596 | rtx *vector; |
597 | ||
7a75edb7 AJ |
598 | VA_OPEN (p, n); |
599 | VA_FIXEDARG (p, int, n); | |
23b2ce53 RS |
600 | |
601 | if (n == 0) | |
602 | return NULL_RTVEC; /* Don't allocate an empty rtvec... */ | |
603 | ||
604 | vector = (rtx *) alloca (n * sizeof (rtx)); | |
4f90e4a0 | 605 | |
23b2ce53 RS |
606 | for (i = 0; i < n; i++) |
607 | vector[i] = va_arg (p, rtx); | |
6268b922 KG |
608 | |
609 | /* The definition of VA_* in K&R C causes `n' to go out of scope. */ | |
610 | save_n = n; | |
7a75edb7 | 611 | VA_CLOSE (p); |
23b2ce53 | 612 | |
6268b922 | 613 | return gen_rtvec_v (save_n, vector); |
23b2ce53 RS |
614 | } |
615 | ||
616 | rtvec | |
617 | gen_rtvec_v (n, argp) | |
618 | int n; | |
619 | rtx *argp; | |
620 | { | |
b3694847 SS |
621 | int i; |
622 | rtvec rt_val; | |
23b2ce53 RS |
623 | |
624 | if (n == 0) | |
625 | return NULL_RTVEC; /* Don't allocate an empty rtvec... */ | |
626 | ||
627 | rt_val = rtvec_alloc (n); /* Allocate an rtvec... */ | |
628 | ||
629 | for (i = 0; i < n; i++) | |
8f985ec4 | 630 | rt_val->elem[i] = *argp++; |
23b2ce53 RS |
631 | |
632 | return rt_val; | |
633 | } | |
634 | \f | |
635 | /* Generate a REG rtx for a new pseudo register of mode MODE. | |
636 | This pseudo is assigned the next sequential register number. */ | |
637 | ||
638 | rtx | |
639 | gen_reg_rtx (mode) | |
640 | enum machine_mode mode; | |
641 | { | |
01d939e8 | 642 | struct function *f = cfun; |
b3694847 | 643 | rtx val; |
23b2ce53 | 644 | |
f1db3576 JL |
645 | /* Don't let anything called after initial flow analysis create new |
646 | registers. */ | |
647 | if (no_new_pseudos) | |
23b2ce53 RS |
648 | abort (); |
649 | ||
1b3d8f8a GK |
650 | if (generating_concat_p |
651 | && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT | |
652 | || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT)) | |
fc84e8a8 RS |
653 | { |
654 | /* For complex modes, don't make a single pseudo. | |
655 | Instead, make a CONCAT of two pseudos. | |
656 | This allows noncontiguous allocation of the real and imaginary parts, | |
657 | which makes much better code. Besides, allocating DCmode | |
658 | pseudos overstrains reload on some machines like the 386. */ | |
659 | rtx realpart, imagpart; | |
660 | int size = GET_MODE_UNIT_SIZE (mode); | |
661 | enum machine_mode partmode | |
662 | = mode_for_size (size * BITS_PER_UNIT, | |
663 | (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT | |
664 | ? MODE_FLOAT : MODE_INT), | |
665 | 0); | |
666 | ||
667 | realpart = gen_reg_rtx (partmode); | |
668 | imagpart = gen_reg_rtx (partmode); | |
3b80f6ca | 669 | return gen_rtx_CONCAT (mode, realpart, imagpart); |
fc84e8a8 RS |
670 | } |
671 | ||
0d4903b8 RK |
672 | /* Make sure regno_pointer_align, regno_decl, and regno_reg_rtx are large |
673 | enough to have an element for this pseudo reg number. */ | |
23b2ce53 | 674 | |
3502dc9c | 675 | if (reg_rtx_no == f->emit->regno_pointer_align_length) |
23b2ce53 | 676 | { |
3502dc9c | 677 | int old_size = f->emit->regno_pointer_align_length; |
e2ecd91c | 678 | char *new; |
0d4903b8 RK |
679 | rtx *new1; |
680 | tree *new2; | |
681 | ||
e2ecd91c | 682 | new = xrealloc (f->emit->regno_pointer_align, old_size * 2); |
49ad7cfa | 683 | memset (new + old_size, 0, old_size); |
f9e158c3 | 684 | f->emit->regno_pointer_align = (unsigned char *) new; |
49ad7cfa | 685 | |
e2ecd91c BS |
686 | new1 = (rtx *) xrealloc (f->emit->x_regno_reg_rtx, |
687 | old_size * 2 * sizeof (rtx)); | |
49ad7cfa | 688 | memset (new1 + old_size, 0, old_size * sizeof (rtx)); |
23b2ce53 RS |
689 | regno_reg_rtx = new1; |
690 | ||
0d4903b8 RK |
691 | new2 = (tree *) xrealloc (f->emit->regno_decl, |
692 | old_size * 2 * sizeof (tree)); | |
693 | memset (new2 + old_size, 0, old_size * sizeof (tree)); | |
694 | f->emit->regno_decl = new2; | |
695 | ||
3502dc9c | 696 | f->emit->regno_pointer_align_length = old_size * 2; |
23b2ce53 RS |
697 | } |
698 | ||
08394eef | 699 | val = gen_raw_REG (mode, reg_rtx_no); |
23b2ce53 RS |
700 | regno_reg_rtx[reg_rtx_no++] = val; |
701 | return val; | |
702 | } | |
703 | ||
754fdcca RK |
704 | /* Identify REG (which may be a CONCAT) as a user register. */ |
705 | ||
706 | void | |
707 | mark_user_reg (reg) | |
708 | rtx reg; | |
709 | { | |
710 | if (GET_CODE (reg) == CONCAT) | |
711 | { | |
712 | REG_USERVAR_P (XEXP (reg, 0)) = 1; | |
713 | REG_USERVAR_P (XEXP (reg, 1)) = 1; | |
714 | } | |
715 | else if (GET_CODE (reg) == REG) | |
716 | REG_USERVAR_P (reg) = 1; | |
717 | else | |
718 | abort (); | |
719 | } | |
720 | ||
86fe05e0 RK |
721 | /* Identify REG as a probable pointer register and show its alignment |
722 | as ALIGN, if nonzero. */ | |
23b2ce53 RS |
723 | |
724 | void | |
86fe05e0 | 725 | mark_reg_pointer (reg, align) |
23b2ce53 | 726 | rtx reg; |
86fe05e0 | 727 | int align; |
23b2ce53 | 728 | { |
3502dc9c | 729 | if (! REG_POINTER (reg)) |
00995e78 | 730 | { |
3502dc9c | 731 | REG_POINTER (reg) = 1; |
86fe05e0 | 732 | |
00995e78 RE |
733 | if (align) |
734 | REGNO_POINTER_ALIGN (REGNO (reg)) = align; | |
735 | } | |
736 | else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg))) | |
737 | /* We can no-longer be sure just how aligned this pointer is */ | |
86fe05e0 | 738 | REGNO_POINTER_ALIGN (REGNO (reg)) = align; |
23b2ce53 RS |
739 | } |
740 | ||
741 | /* Return 1 plus largest pseudo reg number used in the current function. */ | |
742 | ||
743 | int | |
744 | max_reg_num () | |
745 | { | |
746 | return reg_rtx_no; | |
747 | } | |
748 | ||
749 | /* Return 1 + the largest label number used so far in the current function. */ | |
750 | ||
751 | int | |
752 | max_label_num () | |
753 | { | |
754 | if (last_label_num && label_num == base_label_num) | |
755 | return last_label_num; | |
756 | return label_num; | |
757 | } | |
758 | ||
759 | /* Return first label number used in this function (if any were used). */ | |
760 | ||
761 | int | |
762 | get_first_label_num () | |
763 | { | |
764 | return first_label_num; | |
765 | } | |
766 | \f | |
ddef6bc7 JJ |
767 | /* Return the final regno of X, which is a SUBREG of a hard |
768 | register. */ | |
769 | int | |
770 | subreg_hard_regno (x, check_mode) | |
b3694847 | 771 | rtx x; |
ddef6bc7 JJ |
772 | int check_mode; |
773 | { | |
774 | enum machine_mode mode = GET_MODE (x); | |
775 | unsigned int byte_offset, base_regno, final_regno; | |
776 | rtx reg = SUBREG_REG (x); | |
777 | ||
778 | /* This is where we attempt to catch illegal subregs | |
779 | created by the compiler. */ | |
780 | if (GET_CODE (x) != SUBREG | |
781 | || GET_CODE (reg) != REG) | |
782 | abort (); | |
783 | base_regno = REGNO (reg); | |
784 | if (base_regno >= FIRST_PSEUDO_REGISTER) | |
785 | abort (); | |
0607953c | 786 | if (check_mode && ! HARD_REGNO_MODE_OK (base_regno, GET_MODE (reg))) |
ddef6bc7 JJ |
787 | abort (); |
788 | ||
789 | /* Catch non-congruent offsets too. */ | |
790 | byte_offset = SUBREG_BYTE (x); | |
791 | if ((byte_offset % GET_MODE_SIZE (mode)) != 0) | |
792 | abort (); | |
793 | ||
794 | final_regno = subreg_regno (x); | |
795 | ||
796 | return final_regno; | |
797 | } | |
798 | ||
23b2ce53 RS |
799 | /* Return a value representing some low-order bits of X, where the number |
800 | of low-order bits is given by MODE. Note that no conversion is done | |
750c9258 | 801 | between floating-point and fixed-point values, rather, the bit |
23b2ce53 RS |
802 | representation is returned. |
803 | ||
804 | This function handles the cases in common between gen_lowpart, below, | |
805 | and two variants in cse.c and combine.c. These are the cases that can | |
806 | be safely handled at all points in the compilation. | |
807 | ||
808 | If this is not a case we can handle, return 0. */ | |
809 | ||
810 | rtx | |
811 | gen_lowpart_common (mode, x) | |
812 | enum machine_mode mode; | |
b3694847 | 813 | rtx x; |
23b2ce53 | 814 | { |
ddef6bc7 JJ |
815 | int msize = GET_MODE_SIZE (mode); |
816 | int xsize = GET_MODE_SIZE (GET_MODE (x)); | |
817 | int offset = 0; | |
23b2ce53 RS |
818 | |
819 | if (GET_MODE (x) == mode) | |
820 | return x; | |
821 | ||
822 | /* MODE must occupy no more words than the mode of X. */ | |
823 | if (GET_MODE (x) != VOIDmode | |
ddef6bc7 JJ |
824 | && ((msize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD |
825 | > ((xsize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))) | |
23b2ce53 RS |
826 | return 0; |
827 | ||
e0e08ac2 | 828 | offset = subreg_lowpart_offset (mode, GET_MODE (x)); |
23b2ce53 RS |
829 | |
830 | if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND) | |
83e9c679 RK |
831 | && (GET_MODE_CLASS (mode) == MODE_INT |
832 | || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)) | |
23b2ce53 RS |
833 | { |
834 | /* If we are getting the low-order part of something that has been | |
835 | sign- or zero-extended, we can either just use the object being | |
836 | extended or make a narrower extension. If we want an even smaller | |
837 | piece than the size of the object being extended, call ourselves | |
838 | recursively. | |
839 | ||
840 | This case is used mostly by combine and cse. */ | |
841 | ||
842 | if (GET_MODE (XEXP (x, 0)) == mode) | |
843 | return XEXP (x, 0); | |
844 | else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (XEXP (x, 0)))) | |
845 | return gen_lowpart_common (mode, XEXP (x, 0)); | |
846 | else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (x))) | |
3b80f6ca | 847 | return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0)); |
23b2ce53 | 848 | } |
76321db6 MH |
849 | else if (GET_CODE (x) == SUBREG || GET_CODE (x) == REG |
850 | || GET_CODE (x) == CONCAT) | |
e0e08ac2 | 851 | return simplify_gen_subreg (mode, x, GET_MODE (x), offset); |
23b2ce53 RS |
852 | /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits |
853 | from the low-order part of the constant. */ | |
83e9c679 RK |
854 | else if ((GET_MODE_CLASS (mode) == MODE_INT |
855 | || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT) | |
856 | && GET_MODE (x) == VOIDmode | |
23b2ce53 | 857 | && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)) |
1a5b457d RK |
858 | { |
859 | /* If MODE is twice the host word size, X is already the desired | |
860 | representation. Otherwise, if MODE is wider than a word, we can't | |
e1389cac | 861 | do this. If MODE is exactly a word, return just one CONST_INT. */ |
1a5b457d | 862 | |
a8dd0e73 | 863 | if (GET_MODE_BITSIZE (mode) >= 2 * HOST_BITS_PER_WIDE_INT) |
1a5b457d | 864 | return x; |
906c4e36 | 865 | else if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT) |
1a5b457d | 866 | return 0; |
906c4e36 | 867 | else if (GET_MODE_BITSIZE (mode) == HOST_BITS_PER_WIDE_INT) |
1a5b457d | 868 | return (GET_CODE (x) == CONST_INT ? x |
906c4e36 | 869 | : GEN_INT (CONST_DOUBLE_LOW (x))); |
1a5b457d RK |
870 | else |
871 | { | |
27eef9ce | 872 | /* MODE must be narrower than HOST_BITS_PER_WIDE_INT. */ |
906c4e36 RK |
873 | HOST_WIDE_INT val = (GET_CODE (x) == CONST_INT ? INTVAL (x) |
874 | : CONST_DOUBLE_LOW (x)); | |
1a5b457d | 875 | |
27eef9ce | 876 | /* Sign extend to HOST_WIDE_INT. */ |
e1389cac | 877 | val = trunc_int_for_mode (val, mode); |
1a5b457d RK |
878 | |
879 | return (GET_CODE (x) == CONST_INT && INTVAL (x) == val ? x | |
906c4e36 | 880 | : GEN_INT (val)); |
1a5b457d RK |
881 | } |
882 | } | |
23b2ce53 | 883 | |
a2061c0d | 884 | #ifndef REAL_ARITHMETIC |
8aada4ad RK |
885 | /* If X is an integral constant but we want it in floating-point, it |
886 | must be the case that we have a union of an integer and a floating-point | |
887 | value. If the machine-parameters allow it, simulate that union here | |
750c9258 | 888 | and return the result. The two-word and single-word cases are |
d6020413 | 889 | different. */ |
8aada4ad | 890 | |
b3bf132d | 891 | else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT |
906c4e36 | 892 | && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD) |
b3bf132d | 893 | || flag_pretend_float) |
8aada4ad | 894 | && GET_MODE_CLASS (mode) == MODE_FLOAT |
d6020413 RK |
895 | && GET_MODE_SIZE (mode) == UNITS_PER_WORD |
896 | && GET_CODE (x) == CONST_INT | |
906c4e36 | 897 | && sizeof (float) * HOST_BITS_PER_CHAR == HOST_BITS_PER_WIDE_INT) |
d6020413 | 898 | { |
906c4e36 | 899 | union {HOST_WIDE_INT i; float d; } u; |
d6020413 RK |
900 | |
901 | u.i = INTVAL (x); | |
53596fba | 902 | return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode); |
d6020413 | 903 | } |
d6020413 | 904 | else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT |
906c4e36 | 905 | && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD) |
d6020413 RK |
906 | || flag_pretend_float) |
907 | && GET_MODE_CLASS (mode) == MODE_FLOAT | |
908 | && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD | |
8aada4ad RK |
909 | && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE) |
910 | && GET_MODE (x) == VOIDmode | |
906c4e36 RK |
911 | && (sizeof (double) * HOST_BITS_PER_CHAR |
912 | == 2 * HOST_BITS_PER_WIDE_INT)) | |
8aada4ad | 913 | { |
906c4e36 RK |
914 | union {HOST_WIDE_INT i[2]; double d; } u; |
915 | HOST_WIDE_INT low, high; | |
8aada4ad RK |
916 | |
917 | if (GET_CODE (x) == CONST_INT) | |
906c4e36 | 918 | low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1); |
8aada4ad RK |
919 | else |
920 | low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x); | |
921 | ||
922 | #ifdef HOST_WORDS_BIG_ENDIAN | |
923 | u.i[0] = high, u.i[1] = low; | |
924 | #else | |
925 | u.i[0] = low, u.i[1] = high; | |
926 | #endif | |
927 | ||
53596fba | 928 | return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode); |
8aada4ad | 929 | } |
a6a503ed | 930 | |
b3bf132d RK |
931 | /* Similarly, if this is converting a floating-point value into a |
932 | single-word integer. Only do this is the host and target parameters are | |
933 | compatible. */ | |
934 | ||
935 | else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT | |
906c4e36 | 936 | && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD) |
b3bf132d | 937 | || flag_pretend_float) |
83e9c679 RK |
938 | && (GET_MODE_CLASS (mode) == MODE_INT |
939 | || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT) | |
b3bf132d RK |
940 | && GET_CODE (x) == CONST_DOUBLE |
941 | && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT | |
942 | && GET_MODE_BITSIZE (mode) == BITS_PER_WORD) | |
ddef6bc7 | 943 | return constant_subword (x, (offset / UNITS_PER_WORD), GET_MODE (x)); |
b3bf132d | 944 | |
8aada4ad RK |
945 | /* Similarly, if this is converting a floating-point value into a |
946 | two-word integer, we can do this one word at a time and make an | |
947 | integer. Only do this is the host and target parameters are | |
948 | compatible. */ | |
949 | ||
b3bf132d | 950 | else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT |
906c4e36 | 951 | && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD) |
b3bf132d | 952 | || flag_pretend_float) |
83e9c679 | 953 | && (GET_MODE_CLASS (mode) == MODE_INT |
f5a2fb25 | 954 | || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT) |
8aada4ad RK |
955 | && GET_CODE (x) == CONST_DOUBLE |
956 | && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT | |
957 | && GET_MODE_BITSIZE (mode) == 2 * BITS_PER_WORD) | |
958 | { | |
ddef6bc7 JJ |
959 | rtx lowpart, highpart; |
960 | ||
961 | lowpart = constant_subword (x, | |
962 | (offset / UNITS_PER_WORD) + WORDS_BIG_ENDIAN, | |
963 | GET_MODE (x)); | |
964 | highpart = constant_subword (x, | |
965 | (offset / UNITS_PER_WORD) + (! WORDS_BIG_ENDIAN), | |
966 | GET_MODE (x)); | |
8aada4ad RK |
967 | if (lowpart && GET_CODE (lowpart) == CONST_INT |
968 | && highpart && GET_CODE (highpart) == CONST_INT) | |
969 | return immed_double_const (INTVAL (lowpart), INTVAL (highpart), mode); | |
970 | } | |
a2061c0d GK |
971 | #else /* ifndef REAL_ARITHMETIC */ |
972 | ||
973 | /* When we have a FP emulator, we can handle all conversions between | |
974 | FP and integer operands. This simplifies reload because it | |
975 | doesn't have to deal with constructs like (subreg:DI | |
976 | (const_double:SF ...)) or (subreg:DF (const_int ...)). */ | |
57dadce2 EC |
977 | /* Single-precision floats are always 32-bits and double-precision |
978 | floats are always 64-bits. */ | |
a2061c0d | 979 | |
76321db6 | 980 | else if (GET_MODE_CLASS (mode) == MODE_FLOAT |
57dadce2 | 981 | && GET_MODE_BITSIZE (mode) == 32 |
a2061c0d | 982 | && GET_CODE (x) == CONST_INT) |
76321db6 | 983 | { |
a2061c0d GK |
984 | REAL_VALUE_TYPE r; |
985 | HOST_WIDE_INT i; | |
986 | ||
987 | i = INTVAL (x); | |
988 | r = REAL_VALUE_FROM_TARGET_SINGLE (i); | |
989 | return CONST_DOUBLE_FROM_REAL_VALUE (r, mode); | |
76321db6 MH |
990 | } |
991 | else if (GET_MODE_CLASS (mode) == MODE_FLOAT | |
57dadce2 | 992 | && GET_MODE_BITSIZE (mode) == 64 |
a2061c0d GK |
993 | && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE) |
994 | && GET_MODE (x) == VOIDmode) | |
995 | { | |
996 | REAL_VALUE_TYPE r; | |
997 | HOST_WIDE_INT i[2]; | |
998 | HOST_WIDE_INT low, high; | |
999 | ||
1000 | if (GET_CODE (x) == CONST_INT) | |
1001 | { | |
1002 | low = INTVAL (x); | |
1003 | high = low >> (HOST_BITS_PER_WIDE_INT - 1); | |
1004 | } | |
1005 | else | |
1006 | { | |
750c9258 | 1007 | low = CONST_DOUBLE_LOW (x); |
a2061c0d GK |
1008 | high = CONST_DOUBLE_HIGH (x); |
1009 | } | |
1010 | ||
1011 | /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the | |
1012 | target machine. */ | |
1013 | if (WORDS_BIG_ENDIAN) | |
1014 | i[0] = high, i[1] = low; | |
1015 | else | |
1016 | i[0] = low, i[1] = high; | |
1017 | ||
1018 | r = REAL_VALUE_FROM_TARGET_DOUBLE (i); | |
1019 | return CONST_DOUBLE_FROM_REAL_VALUE (r, mode); | |
1020 | } | |
1021 | else if ((GET_MODE_CLASS (mode) == MODE_INT | |
1022 | || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT) | |
1023 | && GET_CODE (x) == CONST_DOUBLE | |
1024 | && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT) | |
1025 | { | |
1026 | REAL_VALUE_TYPE r; | |
1027 | long i[4]; /* Only the low 32 bits of each 'long' are used. */ | |
1028 | int endian = WORDS_BIG_ENDIAN ? 1 : 0; | |
1029 | ||
8125704b GK |
1030 | /* Convert 'r' into an array of four 32-bit words in target word |
1031 | order. */ | |
a2061c0d | 1032 | REAL_VALUE_FROM_CONST_DOUBLE (r, x); |
57dadce2 | 1033 | switch (GET_MODE_BITSIZE (GET_MODE (x))) |
a2061c0d | 1034 | { |
57dadce2 | 1035 | case 32: |
8125704b GK |
1036 | REAL_VALUE_TO_TARGET_SINGLE (r, i[3 * endian]); |
1037 | i[1] = 0; | |
1038 | i[2] = 0; | |
1039 | i[3 - 3 * endian] = 0; | |
1040 | break; | |
57dadce2 | 1041 | case 64: |
8125704b GK |
1042 | REAL_VALUE_TO_TARGET_DOUBLE (r, i + 2 * endian); |
1043 | i[2 - 2 * endian] = 0; | |
1044 | i[3 - 2 * endian] = 0; | |
1045 | break; | |
57dadce2 | 1046 | case 96: |
e389897b | 1047 | REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i + endian); |
8125704b | 1048 | i[3 - 3 * endian] = 0; |
76321db6 | 1049 | break; |
57dadce2 | 1050 | case 128: |
a2061c0d GK |
1051 | REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i); |
1052 | break; | |
1053 | default: | |
1156b23c | 1054 | abort (); |
a2061c0d | 1055 | } |
a2061c0d GK |
1056 | /* Now, pack the 32-bit elements of the array into a CONST_DOUBLE |
1057 | and return it. */ | |
1058 | #if HOST_BITS_PER_WIDE_INT == 32 | |
8125704b | 1059 | return immed_double_const (i[3 * endian], i[1 + endian], mode); |
a2061c0d | 1060 | #else |
8125704b GK |
1061 | if (HOST_BITS_PER_WIDE_INT != 64) |
1062 | abort (); | |
50e60bc3 | 1063 | |
931db8d2 DE |
1064 | return immed_double_const (i[3 * endian] |
1065 | | ((HOST_WIDE_INT) i[1 + endian] << 32), | |
1066 | i[2 - endian] | |
1067 | | ((HOST_WIDE_INT) i[3 - 3 * endian] << 32), | |
8125704b | 1068 | mode); |
a2061c0d GK |
1069 | #endif |
1070 | } | |
1071 | #endif /* ifndef REAL_ARITHMETIC */ | |
8aada4ad | 1072 | |
23b2ce53 RS |
1073 | /* Otherwise, we can't do this. */ |
1074 | return 0; | |
1075 | } | |
1076 | \f | |
280194b0 RS |
1077 | /* Return the real part (which has mode MODE) of a complex value X. |
1078 | This always comes at the low address in memory. */ | |
1079 | ||
1080 | rtx | |
1081 | gen_realpart (mode, x) | |
1082 | enum machine_mode mode; | |
b3694847 | 1083 | rtx x; |
280194b0 | 1084 | { |
e0e08ac2 JH |
1085 | if (WORDS_BIG_ENDIAN |
1086 | && GET_MODE_BITSIZE (mode) < BITS_PER_WORD | |
1087 | && REG_P (x) | |
1088 | && REGNO (x) < FIRST_PSEUDO_REGISTER) | |
400500c4 RK |
1089 | internal_error |
1090 | ("Can't access real part of complex value in hard register"); | |
dc139c90 | 1091 | else if (WORDS_BIG_ENDIAN) |
280194b0 RS |
1092 | return gen_highpart (mode, x); |
1093 | else | |
1094 | return gen_lowpart (mode, x); | |
1095 | } | |
1096 | ||
1097 | /* Return the imaginary part (which has mode MODE) of a complex value X. | |
1098 | This always comes at the high address in memory. */ | |
1099 | ||
1100 | rtx | |
1101 | gen_imagpart (mode, x) | |
1102 | enum machine_mode mode; | |
b3694847 | 1103 | rtx x; |
280194b0 | 1104 | { |
e0e08ac2 | 1105 | if (WORDS_BIG_ENDIAN) |
280194b0 | 1106 | return gen_lowpart (mode, x); |
ddef6bc7 | 1107 | else if (! WORDS_BIG_ENDIAN |
40c0c3cf JL |
1108 | && GET_MODE_BITSIZE (mode) < BITS_PER_WORD |
1109 | && REG_P (x) | |
1110 | && REGNO (x) < FIRST_PSEUDO_REGISTER) | |
400500c4 RK |
1111 | internal_error |
1112 | ("can't access imaginary part of complex value in hard register"); | |
280194b0 RS |
1113 | else |
1114 | return gen_highpart (mode, x); | |
1115 | } | |
81284a6a JW |
1116 | |
1117 | /* Return 1 iff X, assumed to be a SUBREG, | |
1118 | refers to the real part of the complex value in its containing reg. | |
1119 | Complex values are always stored with the real part in the first word, | |
1120 | regardless of WORDS_BIG_ENDIAN. */ | |
1121 | ||
1122 | int | |
1123 | subreg_realpart_p (x) | |
1124 | rtx x; | |
1125 | { | |
1126 | if (GET_CODE (x) != SUBREG) | |
1127 | abort (); | |
1128 | ||
ddef6bc7 | 1129 | return ((unsigned int) SUBREG_BYTE (x) |
770ae6cc | 1130 | < GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x)))); |
81284a6a | 1131 | } |
280194b0 | 1132 | \f |
23b2ce53 RS |
1133 | /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value, |
1134 | return an rtx (MEM, SUBREG, or CONST_INT) that refers to the | |
1135 | least-significant part of X. | |
1136 | MODE specifies how big a part of X to return; | |
1137 | it usually should not be larger than a word. | |
1138 | If X is a MEM whose address is a QUEUED, the value may be so also. */ | |
1139 | ||
1140 | rtx | |
1141 | gen_lowpart (mode, x) | |
1142 | enum machine_mode mode; | |
b3694847 | 1143 | rtx x; |
23b2ce53 RS |
1144 | { |
1145 | rtx result = gen_lowpart_common (mode, x); | |
1146 | ||
1147 | if (result) | |
1148 | return result; | |
ea8262b0 RK |
1149 | else if (GET_CODE (x) == REG) |
1150 | { | |
1151 | /* Must be a hard reg that's not valid in MODE. */ | |
1152 | result = gen_lowpart_common (mode, copy_to_reg (x)); | |
1153 | if (result == 0) | |
1154 | abort (); | |
72c3833b | 1155 | return result; |
ea8262b0 | 1156 | } |
23b2ce53 RS |
1157 | else if (GET_CODE (x) == MEM) |
1158 | { | |
1159 | /* The only additional case we can do is MEM. */ | |
b3694847 | 1160 | int offset = 0; |
23b2ce53 RS |
1161 | if (WORDS_BIG_ENDIAN) |
1162 | offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD) | |
1163 | - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD)); | |
1164 | ||
1165 | if (BYTES_BIG_ENDIAN) | |
1166 | /* Adjust the address so that the address-after-the-data | |
1167 | is unchanged. */ | |
1168 | offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode)) | |
1169 | - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x)))); | |
1170 | ||
f4ef873c | 1171 | return adjust_address (x, mode, offset); |
23b2ce53 | 1172 | } |
e9a25f70 JL |
1173 | else if (GET_CODE (x) == ADDRESSOF) |
1174 | return gen_lowpart (mode, force_reg (GET_MODE (x), x)); | |
23b2ce53 RS |
1175 | else |
1176 | abort (); | |
1177 | } | |
1178 | ||
750c9258 | 1179 | /* Like `gen_lowpart', but refer to the most significant part. |
ccba022b RS |
1180 | This is used to access the imaginary part of a complex number. */ |
1181 | ||
1182 | rtx | |
1183 | gen_highpart (mode, x) | |
1184 | enum machine_mode mode; | |
b3694847 | 1185 | rtx x; |
ccba022b | 1186 | { |
ddef6bc7 | 1187 | unsigned int msize = GET_MODE_SIZE (mode); |
e0e08ac2 | 1188 | rtx result; |
ddef6bc7 | 1189 | |
ccba022b RS |
1190 | /* This case loses if X is a subreg. To catch bugs early, |
1191 | complain if an invalid MODE is used even in other cases. */ | |
ddef6bc7 JJ |
1192 | if (msize > UNITS_PER_WORD |
1193 | && msize != GET_MODE_UNIT_SIZE (GET_MODE (x))) | |
ccba022b | 1194 | abort (); |
ddef6bc7 | 1195 | |
e0e08ac2 JH |
1196 | result = simplify_gen_subreg (mode, x, GET_MODE (x), |
1197 | subreg_highpart_offset (mode, GET_MODE (x))); | |
09482e0d JW |
1198 | |
1199 | /* simplify_gen_subreg is not guaranteed to return a valid operand for | |
1200 | the target if we have a MEM. gen_highpart must return a valid operand, | |
1201 | emitting code if necessary to do so. */ | |
1202 | if (GET_CODE (result) == MEM) | |
1203 | result = validize_mem (result); | |
1204 | ||
e0e08ac2 JH |
1205 | if (!result) |
1206 | abort (); | |
1207 | return result; | |
1208 | } | |
5222e470 JH |
1209 | |
1210 | /* Like gen_highpart_mode, but accept mode of EXP operand in case EXP can | |
1211 | be VOIDmode constant. */ | |
1212 | rtx | |
1213 | gen_highpart_mode (outermode, innermode, exp) | |
1214 | enum machine_mode outermode, innermode; | |
1215 | rtx exp; | |
1216 | { | |
1217 | if (GET_MODE (exp) != VOIDmode) | |
1218 | { | |
1219 | if (GET_MODE (exp) != innermode) | |
1220 | abort (); | |
1221 | return gen_highpart (outermode, exp); | |
1222 | } | |
1223 | return simplify_gen_subreg (outermode, exp, innermode, | |
1224 | subreg_highpart_offset (outermode, innermode)); | |
1225 | } | |
e0e08ac2 JH |
1226 | /* Return offset in bytes to get OUTERMODE low part |
1227 | of the value in mode INNERMODE stored in memory in target format. */ | |
8698cce3 | 1228 | |
e0e08ac2 JH |
1229 | unsigned int |
1230 | subreg_lowpart_offset (outermode, innermode) | |
1231 | enum machine_mode outermode, innermode; | |
1232 | { | |
1233 | unsigned int offset = 0; | |
1234 | int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode)); | |
8698cce3 | 1235 | |
e0e08ac2 | 1236 | if (difference > 0) |
ccba022b | 1237 | { |
e0e08ac2 JH |
1238 | if (WORDS_BIG_ENDIAN) |
1239 | offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD; | |
1240 | if (BYTES_BIG_ENDIAN) | |
1241 | offset += difference % UNITS_PER_WORD; | |
ccba022b | 1242 | } |
ddef6bc7 | 1243 | |
e0e08ac2 | 1244 | return offset; |
ccba022b | 1245 | } |
eea50aa0 | 1246 | |
e0e08ac2 JH |
1247 | /* Return offset in bytes to get OUTERMODE high part |
1248 | of the value in mode INNERMODE stored in memory in target format. */ | |
1249 | unsigned int | |
1250 | subreg_highpart_offset (outermode, innermode) | |
eea50aa0 | 1251 | enum machine_mode outermode, innermode; |
eea50aa0 JH |
1252 | { |
1253 | unsigned int offset = 0; | |
1254 | int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode)); | |
1255 | ||
e0e08ac2 JH |
1256 | if (GET_MODE_SIZE (innermode) < GET_MODE_SIZE (outermode)) |
1257 | abort (); | |
1258 | ||
eea50aa0 JH |
1259 | if (difference > 0) |
1260 | { | |
e0e08ac2 | 1261 | if (! WORDS_BIG_ENDIAN) |
eea50aa0 | 1262 | offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD; |
e0e08ac2 | 1263 | if (! BYTES_BIG_ENDIAN) |
eea50aa0 JH |
1264 | offset += difference % UNITS_PER_WORD; |
1265 | } | |
1266 | ||
e0e08ac2 | 1267 | return offset; |
eea50aa0 | 1268 | } |
ccba022b | 1269 | |
23b2ce53 RS |
1270 | /* Return 1 iff X, assumed to be a SUBREG, |
1271 | refers to the least significant part of its containing reg. | |
1272 | If X is not a SUBREG, always return 1 (it is its own low part!). */ | |
1273 | ||
1274 | int | |
1275 | subreg_lowpart_p (x) | |
1276 | rtx x; | |
1277 | { | |
1278 | if (GET_CODE (x) != SUBREG) | |
1279 | return 1; | |
a3a03040 RK |
1280 | else if (GET_MODE (SUBREG_REG (x)) == VOIDmode) |
1281 | return 0; | |
23b2ce53 | 1282 | |
e0e08ac2 JH |
1283 | return (subreg_lowpart_offset (GET_MODE (x), GET_MODE (SUBREG_REG (x))) |
1284 | == SUBREG_BYTE (x)); | |
23b2ce53 RS |
1285 | } |
1286 | \f | |
23b2ce53 | 1287 | |
ddef6bc7 JJ |
1288 | /* Helper routine for all the constant cases of operand_subword. |
1289 | Some places invoke this directly. */ | |
23b2ce53 RS |
1290 | |
1291 | rtx | |
ddef6bc7 | 1292 | constant_subword (op, offset, mode) |
23b2ce53 | 1293 | rtx op; |
ddef6bc7 | 1294 | int offset; |
23b2ce53 RS |
1295 | enum machine_mode mode; |
1296 | { | |
906c4e36 | 1297 | int size_ratio = HOST_BITS_PER_WIDE_INT / BITS_PER_WORD; |
ddef6bc7 | 1298 | HOST_WIDE_INT val; |
23b2ce53 RS |
1299 | |
1300 | /* If OP is already an integer word, return it. */ | |
1301 | if (GET_MODE_CLASS (mode) == MODE_INT | |
1302 | && GET_MODE_SIZE (mode) == UNITS_PER_WORD) | |
1303 | return op; | |
1304 | ||
1632afca | 1305 | #ifdef REAL_ARITHMETIC |
5495cc55 RH |
1306 | /* The output is some bits, the width of the target machine's word. |
1307 | A wider-word host can surely hold them in a CONST_INT. A narrower-word | |
1308 | host can't. */ | |
9847c2f6 | 1309 | if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD |
1632afca | 1310 | && GET_MODE_CLASS (mode) == MODE_FLOAT |
7677ffa4 | 1311 | && GET_MODE_BITSIZE (mode) == 64 |
1632afca RS |
1312 | && GET_CODE (op) == CONST_DOUBLE) |
1313 | { | |
9847c2f6 | 1314 | long k[2]; |
1632afca RS |
1315 | REAL_VALUE_TYPE rv; |
1316 | ||
1317 | REAL_VALUE_FROM_CONST_DOUBLE (rv, op); | |
1318 | REAL_VALUE_TO_TARGET_DOUBLE (rv, k); | |
7677ffa4 | 1319 | |
9847c2f6 | 1320 | /* We handle 32-bit and >= 64-bit words here. Note that the order in |
7677ffa4 | 1321 | which the words are written depends on the word endianness. |
7677ffa4 | 1322 | ??? This is a potential portability problem and should |
7cae975e RH |
1323 | be fixed at some point. |
1324 | ||
a1f300c0 | 1325 | We must exercise caution with the sign bit. By definition there |
7cae975e RH |
1326 | are 32 significant bits in K; there may be more in a HOST_WIDE_INT. |
1327 | Consider a host with a 32-bit long and a 64-bit HOST_WIDE_INT. | |
1328 | So we explicitly mask and sign-extend as necessary. */ | |
9847c2f6 | 1329 | if (BITS_PER_WORD == 32) |
7cae975e | 1330 | { |
ddef6bc7 | 1331 | val = k[offset]; |
7cae975e RH |
1332 | val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000; |
1333 | return GEN_INT (val); | |
1334 | } | |
1335 | #if HOST_BITS_PER_WIDE_INT >= 64 | |
ddef6bc7 | 1336 | else if (BITS_PER_WORD >= 64 && offset == 0) |
7cae975e RH |
1337 | { |
1338 | val = k[! WORDS_BIG_ENDIAN]; | |
1339 | val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32; | |
1340 | val |= (HOST_WIDE_INT) k[WORDS_BIG_ENDIAN] & 0xffffffff; | |
1341 | return GEN_INT (val); | |
1342 | } | |
9847c2f6 | 1343 | #endif |
47b34d40 JW |
1344 | else if (BITS_PER_WORD == 16) |
1345 | { | |
ddef6bc7 JJ |
1346 | val = k[offset >> 1]; |
1347 | if ((offset & 1) == ! WORDS_BIG_ENDIAN) | |
7cae975e | 1348 | val >>= 16; |
73de376f | 1349 | val = ((val & 0xffff) ^ 0x8000) - 0x8000; |
7cae975e | 1350 | return GEN_INT (val); |
47b34d40 | 1351 | } |
7677ffa4 RK |
1352 | else |
1353 | abort (); | |
1632afca | 1354 | } |
a5559dbc RE |
1355 | else if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD |
1356 | && GET_MODE_CLASS (mode) == MODE_FLOAT | |
1357 | && GET_MODE_BITSIZE (mode) > 64 | |
1358 | && GET_CODE (op) == CONST_DOUBLE) | |
5495cc55 RH |
1359 | { |
1360 | long k[4]; | |
1361 | REAL_VALUE_TYPE rv; | |
a5559dbc | 1362 | |
5495cc55 RH |
1363 | REAL_VALUE_FROM_CONST_DOUBLE (rv, op); |
1364 | REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv, k); | |
a5559dbc | 1365 | |
5495cc55 RH |
1366 | if (BITS_PER_WORD == 32) |
1367 | { | |
ddef6bc7 | 1368 | val = k[offset]; |
5495cc55 RH |
1369 | val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000; |
1370 | return GEN_INT (val); | |
1371 | } | |
1372 | #if HOST_BITS_PER_WIDE_INT >= 64 | |
ddef6bc7 | 1373 | else if (BITS_PER_WORD >= 64 && offset <= 1) |
5495cc55 | 1374 | { |
ddef6bc7 | 1375 | val = k[offset * 2 + ! WORDS_BIG_ENDIAN]; |
5495cc55 | 1376 | val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32; |
ddef6bc7 | 1377 | val |= (HOST_WIDE_INT) k[offset * 2 + WORDS_BIG_ENDIAN] & 0xffffffff; |
5495cc55 RH |
1378 | return GEN_INT (val); |
1379 | } | |
1380 | #endif | |
1381 | else | |
1382 | abort (); | |
1383 | } | |
1632afca | 1384 | #else /* no REAL_ARITHMETIC */ |
23b2ce53 | 1385 | if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT |
906c4e36 | 1386 | && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD) |
23b2ce53 RS |
1387 | || flag_pretend_float) |
1388 | && GET_MODE_CLASS (mode) == MODE_FLOAT | |
1389 | && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD | |
1390 | && GET_CODE (op) == CONST_DOUBLE) | |
7529ac93 CH |
1391 | { |
1392 | /* The constant is stored in the host's word-ordering, | |
1393 | but we want to access it in the target's word-ordering. Some | |
1394 | compilers don't like a conditional inside macro args, so we have two | |
1395 | copies of the return. */ | |
2fe02d7e | 1396 | #ifdef HOST_WORDS_BIG_ENDIAN |
ddef6bc7 | 1397 | return GEN_INT (offset == WORDS_BIG_ENDIAN |
7529ac93 | 1398 | ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op)); |
2fe02d7e | 1399 | #else |
ddef6bc7 | 1400 | return GEN_INT (offset != WORDS_BIG_ENDIAN |
7529ac93 | 1401 | ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op)); |
2fe02d7e | 1402 | #endif |
7529ac93 | 1403 | } |
1632afca | 1404 | #endif /* no REAL_ARITHMETIC */ |
23b2ce53 RS |
1405 | |
1406 | /* Single word float is a little harder, since single- and double-word | |
1407 | values often do not have the same high-order bits. We have already | |
1408 | verified that we want the only defined word of the single-word value. */ | |
1632afca | 1409 | #ifdef REAL_ARITHMETIC |
9847c2f6 | 1410 | if (GET_MODE_CLASS (mode) == MODE_FLOAT |
7677ffa4 | 1411 | && GET_MODE_BITSIZE (mode) == 32 |
1632afca RS |
1412 | && GET_CODE (op) == CONST_DOUBLE) |
1413 | { | |
9847c2f6 | 1414 | long l; |
1632afca RS |
1415 | REAL_VALUE_TYPE rv; |
1416 | ||
1417 | REAL_VALUE_FROM_CONST_DOUBLE (rv, op); | |
1418 | REAL_VALUE_TO_TARGET_SINGLE (rv, l); | |
aa2ae679 | 1419 | |
7cae975e RH |
1420 | /* Sign extend from known 32-bit value to HOST_WIDE_INT. */ |
1421 | val = l; | |
1422 | val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000; | |
b5a3eb84 | 1423 | |
aa2ae679 JL |
1424 | if (BITS_PER_WORD == 16) |
1425 | { | |
ddef6bc7 | 1426 | if ((offset & 1) == ! WORDS_BIG_ENDIAN) |
7cae975e | 1427 | val >>= 16; |
73de376f | 1428 | val = ((val & 0xffff) ^ 0x8000) - 0x8000; |
aa2ae679 | 1429 | } |
7cae975e RH |
1430 | |
1431 | return GEN_INT (val); | |
1632afca RS |
1432 | } |
1433 | #else | |
23b2ce53 | 1434 | if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT |
906c4e36 | 1435 | && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD) |
23b2ce53 | 1436 | || flag_pretend_float) |
e01a2cec | 1437 | && sizeof (float) * 8 == HOST_BITS_PER_WIDE_INT |
23b2ce53 RS |
1438 | && GET_MODE_CLASS (mode) == MODE_FLOAT |
1439 | && GET_MODE_SIZE (mode) == UNITS_PER_WORD | |
1440 | && GET_CODE (op) == CONST_DOUBLE) | |
1441 | { | |
1442 | double d; | |
906c4e36 | 1443 | union {float f; HOST_WIDE_INT i; } u; |
23b2ce53 RS |
1444 | |
1445 | REAL_VALUE_FROM_CONST_DOUBLE (d, op); | |
1446 | ||
1447 | u.f = d; | |
906c4e36 | 1448 | return GEN_INT (u.i); |
23b2ce53 | 1449 | } |
e01a2cec RK |
1450 | if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT |
1451 | && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD) | |
1452 | || flag_pretend_float) | |
1453 | && sizeof (double) * 8 == HOST_BITS_PER_WIDE_INT | |
1454 | && GET_MODE_CLASS (mode) == MODE_FLOAT | |
1455 | && GET_MODE_SIZE (mode) == UNITS_PER_WORD | |
1456 | && GET_CODE (op) == CONST_DOUBLE) | |
1457 | { | |
1458 | double d; | |
1459 | union {double d; HOST_WIDE_INT i; } u; | |
1460 | ||
1461 | REAL_VALUE_FROM_CONST_DOUBLE (d, op); | |
1462 | ||
1463 | u.d = d; | |
1464 | return GEN_INT (u.i); | |
1465 | } | |
1632afca | 1466 | #endif /* no REAL_ARITHMETIC */ |
750c9258 | 1467 | |
23b2ce53 RS |
1468 | /* The only remaining cases that we can handle are integers. |
1469 | Convert to proper endianness now since these cases need it. | |
750c9258 | 1470 | At this point, offset == 0 means the low-order word. |
23b2ce53 | 1471 | |
2d4f57f8 RK |
1472 | We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT |
1473 | in general. However, if OP is (const_int 0), we can just return | |
1474 | it for any word. */ | |
1475 | ||
1476 | if (op == const0_rtx) | |
1477 | return op; | |
23b2ce53 RS |
1478 | |
1479 | if (GET_MODE_CLASS (mode) != MODE_INT | |
2d4f57f8 | 1480 | || (GET_CODE (op) != CONST_INT && GET_CODE (op) != CONST_DOUBLE) |
0cf214a0 | 1481 | || BITS_PER_WORD > HOST_BITS_PER_WIDE_INT) |
23b2ce53 RS |
1482 | return 0; |
1483 | ||
1484 | if (WORDS_BIG_ENDIAN) | |
ddef6bc7 | 1485 | offset = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - offset; |
23b2ce53 RS |
1486 | |
1487 | /* Find out which word on the host machine this value is in and get | |
1488 | it from the constant. */ | |
ddef6bc7 | 1489 | val = (offset / size_ratio == 0 |
23b2ce53 RS |
1490 | ? (GET_CODE (op) == CONST_INT ? INTVAL (op) : CONST_DOUBLE_LOW (op)) |
1491 | : (GET_CODE (op) == CONST_INT | |
1492 | ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op))); | |
1493 | ||
3f518020 | 1494 | /* Get the value we want into the low bits of val. */ |
906c4e36 | 1495 | if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT) |
ddef6bc7 | 1496 | val = ((val >> ((offset % size_ratio) * BITS_PER_WORD))); |
3f518020 | 1497 | |
7e4ce834 | 1498 | val = trunc_int_for_mode (val, word_mode); |
23b2ce53 | 1499 | |
906c4e36 | 1500 | return GEN_INT (val); |
23b2ce53 RS |
1501 | } |
1502 | ||
ddef6bc7 JJ |
1503 | /* Return subword OFFSET of operand OP. |
1504 | The word number, OFFSET, is interpreted as the word number starting | |
1505 | at the low-order address. OFFSET 0 is the low-order word if not | |
1506 | WORDS_BIG_ENDIAN, otherwise it is the high-order word. | |
1507 | ||
1508 | If we cannot extract the required word, we return zero. Otherwise, | |
1509 | an rtx corresponding to the requested word will be returned. | |
1510 | ||
1511 | VALIDATE_ADDRESS is nonzero if the address should be validated. Before | |
1512 | reload has completed, a valid address will always be returned. After | |
1513 | reload, if a valid address cannot be returned, we return zero. | |
1514 | ||
1515 | If VALIDATE_ADDRESS is zero, we simply form the required address; validating | |
1516 | it is the responsibility of the caller. | |
1517 | ||
1518 | MODE is the mode of OP in case it is a CONST_INT. | |
1519 | ||
1520 | ??? This is still rather broken for some cases. The problem for the | |
1521 | moment is that all callers of this thing provide no 'goal mode' to | |
1522 | tell us to work with. This exists because all callers were written | |
0631e0bf JH |
1523 | in a word based SUBREG world. |
1524 | Now use of this function can be deprecated by simplify_subreg in most | |
1525 | cases. | |
1526 | */ | |
ddef6bc7 JJ |
1527 | |
1528 | rtx | |
1529 | operand_subword (op, offset, validate_address, mode) | |
1530 | rtx op; | |
1531 | unsigned int offset; | |
1532 | int validate_address; | |
1533 | enum machine_mode mode; | |
1534 | { | |
1535 | if (mode == VOIDmode) | |
1536 | mode = GET_MODE (op); | |
1537 | ||
1538 | if (mode == VOIDmode) | |
1539 | abort (); | |
1540 | ||
30f7a378 | 1541 | /* If OP is narrower than a word, fail. */ |
ddef6bc7 JJ |
1542 | if (mode != BLKmode |
1543 | && (GET_MODE_SIZE (mode) < UNITS_PER_WORD)) | |
1544 | return 0; | |
1545 | ||
30f7a378 | 1546 | /* If we want a word outside OP, return zero. */ |
ddef6bc7 JJ |
1547 | if (mode != BLKmode |
1548 | && (offset + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode)) | |
1549 | return const0_rtx; | |
1550 | ||
ddef6bc7 JJ |
1551 | /* Form a new MEM at the requested address. */ |
1552 | if (GET_CODE (op) == MEM) | |
1553 | { | |
f1ec5147 | 1554 | rtx new = adjust_address_nv (op, word_mode, offset * UNITS_PER_WORD); |
ddef6bc7 | 1555 | |
f1ec5147 RK |
1556 | if (! validate_address) |
1557 | return new; | |
1558 | ||
1559 | else if (reload_completed) | |
ddef6bc7 | 1560 | { |
f1ec5147 RK |
1561 | if (! strict_memory_address_p (word_mode, XEXP (new, 0))) |
1562 | return 0; | |
ddef6bc7 | 1563 | } |
f1ec5147 RK |
1564 | else |
1565 | return replace_equiv_address (new, XEXP (new, 0)); | |
ddef6bc7 JJ |
1566 | } |
1567 | ||
0631e0bf JH |
1568 | /* Rest can be handled by simplify_subreg. */ |
1569 | return simplify_gen_subreg (word_mode, op, mode, (offset * UNITS_PER_WORD)); | |
ddef6bc7 JJ |
1570 | } |
1571 | ||
23b2ce53 RS |
1572 | /* Similar to `operand_subword', but never return 0. If we can't extract |
1573 | the required subword, put OP into a register and try again. If that fails, | |
750c9258 | 1574 | abort. We always validate the address in this case. |
23b2ce53 RS |
1575 | |
1576 | MODE is the mode of OP, in case it is CONST_INT. */ | |
1577 | ||
1578 | rtx | |
ddef6bc7 | 1579 | operand_subword_force (op, offset, mode) |
23b2ce53 | 1580 | rtx op; |
ddef6bc7 | 1581 | unsigned int offset; |
23b2ce53 RS |
1582 | enum machine_mode mode; |
1583 | { | |
ddef6bc7 | 1584 | rtx result = operand_subword (op, offset, 1, mode); |
23b2ce53 RS |
1585 | |
1586 | if (result) | |
1587 | return result; | |
1588 | ||
1589 | if (mode != BLKmode && mode != VOIDmode) | |
77e6b0eb JC |
1590 | { |
1591 | /* If this is a register which can not be accessed by words, copy it | |
1592 | to a pseudo register. */ | |
1593 | if (GET_CODE (op) == REG) | |
1594 | op = copy_to_reg (op); | |
1595 | else | |
1596 | op = force_reg (mode, op); | |
1597 | } | |
23b2ce53 | 1598 | |
ddef6bc7 | 1599 | result = operand_subword (op, offset, 1, mode); |
23b2ce53 RS |
1600 | if (result == 0) |
1601 | abort (); | |
1602 | ||
1603 | return result; | |
1604 | } | |
1605 | \f | |
1606 | /* Given a compare instruction, swap the operands. | |
1607 | A test instruction is changed into a compare of 0 against the operand. */ | |
1608 | ||
1609 | void | |
1610 | reverse_comparison (insn) | |
1611 | rtx insn; | |
1612 | { | |
1613 | rtx body = PATTERN (insn); | |
1614 | rtx comp; | |
1615 | ||
1616 | if (GET_CODE (body) == SET) | |
1617 | comp = SET_SRC (body); | |
1618 | else | |
1619 | comp = SET_SRC (XVECEXP (body, 0, 0)); | |
1620 | ||
1621 | if (GET_CODE (comp) == COMPARE) | |
1622 | { | |
1623 | rtx op0 = XEXP (comp, 0); | |
1624 | rtx op1 = XEXP (comp, 1); | |
1625 | XEXP (comp, 0) = op1; | |
1626 | XEXP (comp, 1) = op0; | |
1627 | } | |
1628 | else | |
1629 | { | |
c5c76735 JL |
1630 | rtx new = gen_rtx_COMPARE (VOIDmode, |
1631 | CONST0_RTX (GET_MODE (comp)), comp); | |
23b2ce53 RS |
1632 | if (GET_CODE (body) == SET) |
1633 | SET_SRC (body) = new; | |
1634 | else | |
1635 | SET_SRC (XVECEXP (body, 0, 0)) = new; | |
1636 | } | |
1637 | } | |
1638 | \f | |
173b24b9 RK |
1639 | |
1640 | /* Given REF, a MEM, and T, either the type of X or the expression | |
1641 | corresponding to REF, set the memory attributes. OBJECTP is nonzero | |
1642 | if we are making a new object of this type. */ | |
1643 | ||
1644 | void | |
1645 | set_mem_attributes (ref, t, objectp) | |
1646 | rtx ref; | |
1647 | tree t; | |
1648 | int objectp; | |
1649 | { | |
8ac61af7 RK |
1650 | HOST_WIDE_INT alias = MEM_ALIAS_SET (ref); |
1651 | tree decl = MEM_DECL (ref); | |
1652 | rtx offset = MEM_OFFSET (ref); | |
1653 | rtx size = MEM_SIZE (ref); | |
1654 | unsigned int align = MEM_ALIGN (ref); | |
173b24b9 RK |
1655 | tree type; |
1656 | ||
1657 | /* It can happen that type_for_mode was given a mode for which there | |
1658 | is no language-level type. In which case it returns NULL, which | |
1659 | we can see here. */ | |
1660 | if (t == NULL_TREE) | |
1661 | return; | |
1662 | ||
1663 | type = TYPE_P (t) ? t : TREE_TYPE (t); | |
1664 | ||
173b24b9 RK |
1665 | /* If we have already set DECL_RTL = ref, get_alias_set will get the |
1666 | wrong answer, as it assumes that DECL_RTL already has the right alias | |
1667 | info. Callers should not set DECL_RTL until after the call to | |
1668 | set_mem_attributes. */ | |
1669 | if (DECL_P (t) && ref == DECL_RTL_IF_SET (t)) | |
1670 | abort (); | |
1671 | ||
738cc472 | 1672 | /* Get the alias set from the expression or type (perhaps using a |
8ac61af7 RK |
1673 | front-end routine) and use it. */ |
1674 | alias = get_alias_set (t); | |
173b24b9 RK |
1675 | |
1676 | MEM_VOLATILE_P (ref) = TYPE_VOLATILE (type); | |
1677 | MEM_IN_STRUCT_P (ref) = AGGREGATE_TYPE_P (type); | |
03bf2c23 | 1678 | RTX_UNCHANGING_P (ref) |
1285011e RK |
1679 | |= ((lang_hooks.honor_readonly |
1680 | && (TYPE_READONLY (type) || TREE_READONLY (t))) | |
1681 | || (! TYPE_P (t) && TREE_CONSTANT (t))); | |
173b24b9 | 1682 | |
8ac61af7 RK |
1683 | /* If we are making an object of this type, or if this is a DECL, we know |
1684 | that it is a scalar if the type is not an aggregate. */ | |
1685 | if ((objectp || DECL_P (t)) && ! AGGREGATE_TYPE_P (type)) | |
173b24b9 RK |
1686 | MEM_SCALAR_P (ref) = 1; |
1687 | ||
c3d32120 RK |
1688 | /* We can set the alignment from the type if we are making an object, |
1689 | this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */ | |
1690 | if (objectp || TREE_CODE (t) == INDIRECT_REF || TYPE_ALIGN_OK (type)) | |
1691 | align = MAX (align, TYPE_ALIGN (type)); | |
40c0668b | 1692 | |
738cc472 RK |
1693 | /* If the size is known, we can set that. */ |
1694 | if (TYPE_SIZE_UNIT (type) && host_integerp (TYPE_SIZE_UNIT (type), 1)) | |
8ac61af7 | 1695 | size = GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type), 1)); |
738cc472 | 1696 | |
80965c18 RK |
1697 | /* If T is not a type, we may be able to deduce some more information about |
1698 | the expression. */ | |
1699 | if (! TYPE_P (t)) | |
8ac61af7 RK |
1700 | { |
1701 | maybe_set_unchanging (ref, t); | |
1702 | if (TREE_THIS_VOLATILE (t)) | |
1703 | MEM_VOLATILE_P (ref) = 1; | |
173b24b9 | 1704 | |
8ac61af7 | 1705 | /* Now remove any NOPs: they don't change what the underlying object is. |
80965c18 | 1706 | Likewise for SAVE_EXPR. */ |
8ac61af7 RK |
1707 | while (TREE_CODE (t) == NOP_EXPR || TREE_CODE (t) == CONVERT_EXPR |
1708 | || TREE_CODE (t) == NON_LVALUE_EXPR || TREE_CODE (t) == SAVE_EXPR) | |
1709 | t = TREE_OPERAND (t, 0); | |
1710 | ||
10b76d73 RK |
1711 | /* If this expression can't be addressed (e.g., it contains a reference |
1712 | to a non-addressable field), show we don't change its alias set. */ | |
1713 | if (! can_address_p (t)) | |
1714 | MEM_KEEP_ALIAS_SET_P (ref) = 1; | |
1715 | ||
8ac61af7 RK |
1716 | /* If this is a decl, set the attributes of the MEM from it. */ |
1717 | if (DECL_P (t)) | |
1718 | { | |
1719 | decl = t; | |
1720 | offset = GEN_INT (0); | |
1721 | size = (DECL_SIZE_UNIT (t) | |
1722 | && host_integerp (DECL_SIZE_UNIT (t), 1) | |
1723 | ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t), 1)) : 0); | |
1724 | align = DECL_ALIGN (t); | |
1725 | } | |
1726 | ||
40c0668b | 1727 | /* If this is a constant, we know the alignment. */ |
9ddfb1a7 RK |
1728 | else if (TREE_CODE_CLASS (TREE_CODE (t)) == 'c') |
1729 | { | |
1730 | align = TYPE_ALIGN (type); | |
1731 | #ifdef CONSTANT_ALIGNMENT | |
1732 | align = CONSTANT_ALIGNMENT (t, align); | |
1733 | #endif | |
1734 | } | |
8ac61af7 RK |
1735 | } |
1736 | ||
1737 | /* Now set the attributes we computed above. */ | |
10b76d73 RK |
1738 | MEM_ATTRS (ref) |
1739 | = get_mem_attrs (alias, decl, offset, size, align, GET_MODE (ref)); | |
8ac61af7 RK |
1740 | |
1741 | /* If this is already known to be a scalar or aggregate, we are done. */ | |
1742 | if (MEM_IN_STRUCT_P (ref) || MEM_SCALAR_P (ref)) | |
738cc472 RK |
1743 | return; |
1744 | ||
8ac61af7 RK |
1745 | /* If it is a reference into an aggregate, this is part of an aggregate. |
1746 | Otherwise we don't know. */ | |
173b24b9 RK |
1747 | else if (TREE_CODE (t) == COMPONENT_REF || TREE_CODE (t) == ARRAY_REF |
1748 | || TREE_CODE (t) == ARRAY_RANGE_REF | |
1749 | || TREE_CODE (t) == BIT_FIELD_REF) | |
1750 | MEM_IN_STRUCT_P (ref) = 1; | |
1751 | } | |
1752 | ||
1753 | /* Set the alias set of MEM to SET. */ | |
1754 | ||
1755 | void | |
1756 | set_mem_alias_set (mem, set) | |
1757 | rtx mem; | |
1758 | HOST_WIDE_INT set; | |
1759 | { | |
173b24b9 RK |
1760 | #ifdef ENABLE_CHECKING |
1761 | /* If the new and old alias sets don't conflict, something is wrong. */ | |
1762 | if (!alias_sets_conflict_p (set, MEM_ALIAS_SET (mem))) | |
1763 | abort (); | |
173b24b9 RK |
1764 | #endif |
1765 | ||
1766 | MEM_ATTRS (mem) = get_mem_attrs (set, MEM_DECL (mem), MEM_OFFSET (mem), | |
10b76d73 RK |
1767 | MEM_SIZE (mem), MEM_ALIGN (mem), |
1768 | GET_MODE (mem)); | |
173b24b9 | 1769 | } |
738cc472 | 1770 | |
d022d93e | 1771 | /* Set the alignment of MEM to ALIGN bits. */ |
738cc472 RK |
1772 | |
1773 | void | |
1774 | set_mem_align (mem, align) | |
1775 | rtx mem; | |
1776 | unsigned int align; | |
1777 | { | |
1778 | MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_DECL (mem), | |
10b76d73 RK |
1779 | MEM_OFFSET (mem), MEM_SIZE (mem), align, |
1780 | GET_MODE (mem)); | |
738cc472 | 1781 | } |
1285011e RK |
1782 | |
1783 | /* Set the decl for MEM to DECL. */ | |
1784 | ||
1785 | void | |
1786 | set_mem_decl (mem, decl) | |
1787 | rtx mem; | |
1788 | tree decl; | |
1789 | { | |
1790 | MEM_ATTRS (mem) | |
1791 | = get_mem_attrs (MEM_ALIAS_SET (mem), decl, MEM_OFFSET (mem), | |
1792 | MEM_SIZE (mem), MEM_ALIGN (mem), GET_MODE (mem)); | |
1793 | } | |
173b24b9 | 1794 | \f |
738cc472 RK |
1795 | /* Return a memory reference like MEMREF, but with its mode changed to MODE |
1796 | and its address changed to ADDR. (VOIDmode means don't change the mode. | |
1797 | NULL for ADDR means don't change the address.) VALIDATE is nonzero if the | |
1798 | returned memory location is required to be valid. The memory | |
1799 | attributes are not changed. */ | |
23b2ce53 | 1800 | |
738cc472 | 1801 | static rtx |
f1ec5147 | 1802 | change_address_1 (memref, mode, addr, validate) |
23b2ce53 RS |
1803 | rtx memref; |
1804 | enum machine_mode mode; | |
1805 | rtx addr; | |
f1ec5147 | 1806 | int validate; |
23b2ce53 RS |
1807 | { |
1808 | rtx new; | |
1809 | ||
1810 | if (GET_CODE (memref) != MEM) | |
1811 | abort (); | |
1812 | if (mode == VOIDmode) | |
1813 | mode = GET_MODE (memref); | |
1814 | if (addr == 0) | |
1815 | addr = XEXP (memref, 0); | |
1816 | ||
f1ec5147 | 1817 | if (validate) |
23b2ce53 | 1818 | { |
f1ec5147 RK |
1819 | if (reload_in_progress || reload_completed) |
1820 | { | |
1821 | if (! memory_address_p (mode, addr)) | |
1822 | abort (); | |
1823 | } | |
1824 | else | |
1825 | addr = memory_address (mode, addr); | |
23b2ce53 | 1826 | } |
750c9258 | 1827 | |
9b04c6a8 RK |
1828 | if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref)) |
1829 | return memref; | |
1830 | ||
3b80f6ca | 1831 | new = gen_rtx_MEM (mode, addr); |
c6df88cb | 1832 | MEM_COPY_ATTRIBUTES (new, memref); |
23b2ce53 RS |
1833 | return new; |
1834 | } | |
792760b9 | 1835 | |
738cc472 RK |
1836 | /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what |
1837 | way we are changing MEMREF, so we only preserve the alias set. */ | |
f4ef873c RK |
1838 | |
1839 | rtx | |
738cc472 | 1840 | change_address (memref, mode, addr) |
f4ef873c RK |
1841 | rtx memref; |
1842 | enum machine_mode mode; | |
738cc472 | 1843 | rtx addr; |
f4ef873c | 1844 | { |
738cc472 RK |
1845 | rtx new = change_address_1 (memref, mode, addr, 1); |
1846 | enum machine_mode mmode = GET_MODE (new); | |
c2f7bcc3 | 1847 | |
738cc472 RK |
1848 | MEM_ATTRS (new) |
1849 | = get_mem_attrs (MEM_ALIAS_SET (memref), 0, 0, | |
1850 | mmode == BLKmode ? 0 : GEN_INT (GET_MODE_SIZE (mmode)), | |
a06ef755 RK |
1851 | (mmode == BLKmode ? BITS_PER_UNIT |
1852 | : GET_MODE_ALIGNMENT (mmode)), | |
10b76d73 | 1853 | mmode); |
823e3574 | 1854 | |
738cc472 | 1855 | return new; |
f4ef873c | 1856 | } |
792760b9 | 1857 | |
738cc472 RK |
1858 | /* Return a memory reference like MEMREF, but with its mode changed |
1859 | to MODE and its address offset by OFFSET bytes. If VALIDATE is | |
630036c6 JJ |
1860 | nonzero, the memory address is forced to be valid. |
1861 | If ADJUST is zero, OFFSET is only used to update MEM_ATTRS | |
1862 | and caller is responsible for adjusting MEMREF base register. */ | |
f1ec5147 RK |
1863 | |
1864 | rtx | |
630036c6 | 1865 | adjust_address_1 (memref, mode, offset, validate, adjust) |
f1ec5147 RK |
1866 | rtx memref; |
1867 | enum machine_mode mode; | |
1868 | HOST_WIDE_INT offset; | |
630036c6 | 1869 | int validate, adjust; |
f1ec5147 | 1870 | { |
823e3574 | 1871 | rtx addr = XEXP (memref, 0); |
738cc472 RK |
1872 | rtx new; |
1873 | rtx memoffset = MEM_OFFSET (memref); | |
10b76d73 | 1874 | rtx size = 0; |
738cc472 | 1875 | unsigned int memalign = MEM_ALIGN (memref); |
823e3574 | 1876 | |
630036c6 JJ |
1877 | if (adjust == 0 || offset == 0) |
1878 | /* ??? Prefer to create garbage instead of creating shared rtl. */ | |
1879 | addr = copy_rtx (addr); | |
738cc472 | 1880 | /* If MEMREF is a LO_SUM and the offset is within the alignment of the |
823e3574 | 1881 | object, we can merge it into the LO_SUM. */ |
630036c6 JJ |
1882 | else if (GET_MODE (memref) != BLKmode && GET_CODE (addr) == LO_SUM |
1883 | && offset >= 0 | |
1884 | && (unsigned HOST_WIDE_INT) offset | |
1885 | < GET_MODE_ALIGNMENT (GET_MODE (memref)) / BITS_PER_UNIT) | |
738cc472 | 1886 | addr = gen_rtx_LO_SUM (Pmode, XEXP (addr, 0), |
823e3574 RK |
1887 | plus_constant (XEXP (addr, 1), offset)); |
1888 | else | |
1889 | addr = plus_constant (addr, offset); | |
1890 | ||
738cc472 RK |
1891 | new = change_address_1 (memref, mode, addr, validate); |
1892 | ||
1893 | /* Compute the new values of the memory attributes due to this adjustment. | |
1894 | We add the offsets and update the alignment. */ | |
1895 | if (memoffset) | |
1896 | memoffset = GEN_INT (offset + INTVAL (memoffset)); | |
1897 | ||
03bf2c23 RK |
1898 | /* Compute the new alignment by taking the MIN of the alignment and the |
1899 | lowest-order set bit in OFFSET, but don't change the alignment if OFFSET | |
1900 | if zero. */ | |
1901 | if (offset != 0) | |
d022d93e | 1902 | memalign = MIN (memalign, (offset & -offset) * BITS_PER_UNIT); |
738cc472 | 1903 | |
10b76d73 | 1904 | /* We can compute the size in a number of ways. */ |
a06ef755 RK |
1905 | if (GET_MODE (new) != BLKmode) |
1906 | size = GEN_INT (GET_MODE_SIZE (GET_MODE (new))); | |
10b76d73 RK |
1907 | else if (MEM_SIZE (memref)) |
1908 | size = plus_constant (MEM_SIZE (memref), -offset); | |
1909 | ||
1910 | MEM_ATTRS (new) = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_DECL (memref), | |
1911 | memoffset, size, memalign, GET_MODE (new)); | |
738cc472 RK |
1912 | |
1913 | /* At some point, we should validate that this offset is within the object, | |
1914 | if all the appropriate values are known. */ | |
1915 | return new; | |
f1ec5147 RK |
1916 | } |
1917 | ||
630036c6 JJ |
1918 | /* Return a memory reference like MEMREF, but with its mode changed |
1919 | to MODE and its address changed to ADDR, which is assumed to be | |
1920 | MEMREF offseted by OFFSET bytes. If VALIDATE is | |
1921 | nonzero, the memory address is forced to be valid. */ | |
1922 | ||
1923 | rtx | |
1924 | adjust_automodify_address_1 (memref, mode, addr, offset, validate) | |
1925 | rtx memref; | |
1926 | enum machine_mode mode; | |
1927 | rtx addr; | |
1928 | HOST_WIDE_INT offset; | |
1929 | int validate; | |
1930 | { | |
1931 | memref = change_address_1 (memref, VOIDmode, addr, validate); | |
1932 | return adjust_address_1 (memref, mode, offset, validate, 0); | |
1933 | } | |
1934 | ||
8ac61af7 RK |
1935 | /* Return a memory reference like MEMREF, but whose address is changed by |
1936 | adding OFFSET, an RTX, to it. POW2 is the highest power of two factor | |
1937 | known to be in OFFSET (possibly 1). */ | |
0d4903b8 RK |
1938 | |
1939 | rtx | |
1940 | offset_address (memref, offset, pow2) | |
1941 | rtx memref; | |
1942 | rtx offset; | |
1943 | HOST_WIDE_INT pow2; | |
1944 | { | |
1945 | rtx new = change_address_1 (memref, VOIDmode, | |
1946 | gen_rtx_PLUS (Pmode, XEXP (memref, 0), | |
1947 | force_reg (Pmode, offset)), 1); | |
0d4903b8 RK |
1948 | |
1949 | /* Update the alignment to reflect the offset. Reset the offset, which | |
1950 | we don't know. */ | |
0d4903b8 | 1951 | MEM_ATTRS (new) = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_DECL (memref), |
d022d93e | 1952 | 0, 0, MIN (MEM_ALIGN (memref), |
10b76d73 RK |
1953 | pow2 * BITS_PER_UNIT), |
1954 | GET_MODE (new)); | |
0d4903b8 RK |
1955 | return new; |
1956 | } | |
1957 | ||
792760b9 RK |
1958 | /* Return a memory reference like MEMREF, but with its address changed to |
1959 | ADDR. The caller is asserting that the actual piece of memory pointed | |
1960 | to is the same, just the form of the address is being changed, such as | |
1961 | by putting something into a register. */ | |
1962 | ||
1963 | rtx | |
1964 | replace_equiv_address (memref, addr) | |
1965 | rtx memref; | |
1966 | rtx addr; | |
1967 | { | |
738cc472 RK |
1968 | /* change_address_1 copies the memory attribute structure without change |
1969 | and that's exactly what we want here. */ | |
40c0668b | 1970 | update_temp_slot_address (XEXP (memref, 0), addr); |
738cc472 | 1971 | return change_address_1 (memref, VOIDmode, addr, 1); |
792760b9 | 1972 | } |
738cc472 | 1973 | |
f1ec5147 RK |
1974 | /* Likewise, but the reference is not required to be valid. */ |
1975 | ||
1976 | rtx | |
1977 | replace_equiv_address_nv (memref, addr) | |
1978 | rtx memref; | |
1979 | rtx addr; | |
1980 | { | |
f1ec5147 RK |
1981 | return change_address_1 (memref, VOIDmode, addr, 0); |
1982 | } | |
23b2ce53 RS |
1983 | \f |
1984 | /* Return a newly created CODE_LABEL rtx with a unique label number. */ | |
1985 | ||
1986 | rtx | |
1987 | gen_label_rtx () | |
1988 | { | |
b3694847 | 1989 | rtx label; |
ca695ac9 | 1990 | |
b93a436e | 1991 | label = gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX, |
9714cf43 | 1992 | NULL_RTX, label_num++, NULL, NULL); |
ca695ac9 | 1993 | |
23b2ce53 | 1994 | LABEL_NUSES (label) = 0; |
8cd0faaf | 1995 | LABEL_ALTERNATE_NAME (label) = NULL; |
23b2ce53 RS |
1996 | return label; |
1997 | } | |
1998 | \f | |
1999 | /* For procedure integration. */ | |
2000 | ||
23b2ce53 | 2001 | /* Install new pointers to the first and last insns in the chain. |
86fe05e0 | 2002 | Also, set cur_insn_uid to one higher than the last in use. |
23b2ce53 RS |
2003 | Used for an inline-procedure after copying the insn chain. */ |
2004 | ||
2005 | void | |
2006 | set_new_first_and_last_insn (first, last) | |
2007 | rtx first, last; | |
2008 | { | |
86fe05e0 RK |
2009 | rtx insn; |
2010 | ||
23b2ce53 RS |
2011 | first_insn = first; |
2012 | last_insn = last; | |
86fe05e0 RK |
2013 | cur_insn_uid = 0; |
2014 | ||
2015 | for (insn = first; insn; insn = NEXT_INSN (insn)) | |
2016 | cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn)); | |
2017 | ||
2018 | cur_insn_uid++; | |
23b2ce53 RS |
2019 | } |
2020 | ||
2021 | /* Set the range of label numbers found in the current function. | |
2022 | This is used when belatedly compiling an inline function. */ | |
2023 | ||
2024 | void | |
2025 | set_new_first_and_last_label_num (first, last) | |
2026 | int first, last; | |
2027 | { | |
2028 | base_label_num = label_num; | |
2029 | first_label_num = first; | |
2030 | last_label_num = last; | |
2031 | } | |
49ad7cfa BS |
2032 | |
2033 | /* Set the last label number found in the current function. | |
2034 | This is used when belatedly compiling an inline function. */ | |
23b2ce53 RS |
2035 | |
2036 | void | |
49ad7cfa BS |
2037 | set_new_last_label_num (last) |
2038 | int last; | |
23b2ce53 | 2039 | { |
49ad7cfa BS |
2040 | base_label_num = label_num; |
2041 | last_label_num = last; | |
23b2ce53 | 2042 | } |
49ad7cfa | 2043 | \f |
23b2ce53 RS |
2044 | /* Restore all variables describing the current status from the structure *P. |
2045 | This is used after a nested function. */ | |
2046 | ||
2047 | void | |
2048 | restore_emit_status (p) | |
272df862 | 2049 | struct function *p ATTRIBUTE_UNUSED; |
23b2ce53 | 2050 | { |
457a2d9c | 2051 | last_label_num = 0; |
49ad7cfa | 2052 | clear_emit_caches (); |
23b2ce53 | 2053 | } |
e2ecd91c | 2054 | |
21cd906e | 2055 | /* Clear out all parts of the state in F that can safely be discarded |
e2ecd91c | 2056 | after the function has been compiled, to let garbage collection |
0a8a198c | 2057 | reclaim the memory. */ |
21cd906e | 2058 | |
e2ecd91c | 2059 | void |
0a8a198c | 2060 | free_emit_status (f) |
e2ecd91c BS |
2061 | struct function *f; |
2062 | { | |
2063 | free (f->emit->x_regno_reg_rtx); | |
e2ecd91c | 2064 | free (f->emit->regno_pointer_align); |
0d4903b8 | 2065 | free (f->emit->regno_decl); |
fa51b01b RH |
2066 | free (f->emit); |
2067 | f->emit = NULL; | |
e2ecd91c | 2068 | } |
23b2ce53 | 2069 | \f |
750c9258 | 2070 | /* Go through all the RTL insn bodies and copy any invalid shared |
d1b81779 | 2071 | structure. This routine should only be called once. */ |
23b2ce53 RS |
2072 | |
2073 | void | |
d1b81779 GK |
2074 | unshare_all_rtl (fndecl, insn) |
2075 | tree fndecl; | |
2076 | rtx insn; | |
23b2ce53 | 2077 | { |
d1b81779 | 2078 | tree decl; |
23b2ce53 | 2079 | |
d1b81779 GK |
2080 | /* Make sure that virtual parameters are not shared. */ |
2081 | for (decl = DECL_ARGUMENTS (fndecl); decl; decl = TREE_CHAIN (decl)) | |
19e7881c | 2082 | SET_DECL_RTL (decl, copy_rtx_if_shared (DECL_RTL (decl))); |
d1b81779 | 2083 | |
5c6df058 AO |
2084 | /* Make sure that virtual stack slots are not shared. */ |
2085 | unshare_all_decls (DECL_INITIAL (fndecl)); | |
2086 | ||
d1b81779 GK |
2087 | /* Unshare just about everything else. */ |
2088 | unshare_all_rtl_1 (insn); | |
750c9258 | 2089 | |
23b2ce53 RS |
2090 | /* Make sure the addresses of stack slots found outside the insn chain |
2091 | (such as, in DECL_RTL of a variable) are not shared | |
2092 | with the insn chain. | |
2093 | ||
2094 | This special care is necessary when the stack slot MEM does not | |
2095 | actually appear in the insn chain. If it does appear, its address | |
2096 | is unshared from all else at that point. */ | |
242b0ce6 | 2097 | stack_slot_list = copy_rtx_if_shared (stack_slot_list); |
23b2ce53 RS |
2098 | } |
2099 | ||
750c9258 | 2100 | /* Go through all the RTL insn bodies and copy any invalid shared |
d1b81779 GK |
2101 | structure, again. This is a fairly expensive thing to do so it |
2102 | should be done sparingly. */ | |
2103 | ||
2104 | void | |
2105 | unshare_all_rtl_again (insn) | |
2106 | rtx insn; | |
2107 | { | |
2108 | rtx p; | |
624c87aa RE |
2109 | tree decl; |
2110 | ||
d1b81779 | 2111 | for (p = insn; p; p = NEXT_INSN (p)) |
2c3c49de | 2112 | if (INSN_P (p)) |
d1b81779 GK |
2113 | { |
2114 | reset_used_flags (PATTERN (p)); | |
2115 | reset_used_flags (REG_NOTES (p)); | |
2116 | reset_used_flags (LOG_LINKS (p)); | |
2117 | } | |
624c87aa | 2118 | |
2d4aecb3 AO |
2119 | /* Make sure that virtual stack slots are not shared. */ |
2120 | reset_used_decls (DECL_INITIAL (cfun->decl)); | |
2121 | ||
624c87aa RE |
2122 | /* Make sure that virtual parameters are not shared. */ |
2123 | for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = TREE_CHAIN (decl)) | |
2124 | reset_used_flags (DECL_RTL (decl)); | |
2125 | ||
2126 | reset_used_flags (stack_slot_list); | |
2127 | ||
2128 | unshare_all_rtl (cfun->decl, insn); | |
d1b81779 GK |
2129 | } |
2130 | ||
2131 | /* Go through all the RTL insn bodies and copy any invalid shared structure. | |
2132 | Assumes the mark bits are cleared at entry. */ | |
2133 | ||
2134 | static void | |
2135 | unshare_all_rtl_1 (insn) | |
2136 | rtx insn; | |
2137 | { | |
2138 | for (; insn; insn = NEXT_INSN (insn)) | |
2c3c49de | 2139 | if (INSN_P (insn)) |
d1b81779 GK |
2140 | { |
2141 | PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn)); | |
2142 | REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn)); | |
2143 | LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn)); | |
2144 | } | |
2145 | } | |
2146 | ||
5c6df058 AO |
2147 | /* Go through all virtual stack slots of a function and copy any |
2148 | shared structure. */ | |
2149 | static void | |
2150 | unshare_all_decls (blk) | |
2151 | tree blk; | |
2152 | { | |
2153 | tree t; | |
2154 | ||
2155 | /* Copy shared decls. */ | |
2156 | for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t)) | |
19e7881c MM |
2157 | if (DECL_RTL_SET_P (t)) |
2158 | SET_DECL_RTL (t, copy_rtx_if_shared (DECL_RTL (t))); | |
5c6df058 AO |
2159 | |
2160 | /* Now process sub-blocks. */ | |
2161 | for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t)) | |
2162 | unshare_all_decls (t); | |
2163 | } | |
2164 | ||
2d4aecb3 | 2165 | /* Go through all virtual stack slots of a function and mark them as |
30f7a378 | 2166 | not shared. */ |
2d4aecb3 AO |
2167 | static void |
2168 | reset_used_decls (blk) | |
2169 | tree blk; | |
2170 | { | |
2171 | tree t; | |
2172 | ||
2173 | /* Mark decls. */ | |
2174 | for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t)) | |
19e7881c MM |
2175 | if (DECL_RTL_SET_P (t)) |
2176 | reset_used_flags (DECL_RTL (t)); | |
2d4aecb3 AO |
2177 | |
2178 | /* Now process sub-blocks. */ | |
2179 | for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t)) | |
2180 | reset_used_decls (t); | |
2181 | } | |
2182 | ||
23b2ce53 RS |
2183 | /* Mark ORIG as in use, and return a copy of it if it was already in use. |
2184 | Recursively does the same for subexpressions. */ | |
2185 | ||
2186 | rtx | |
2187 | copy_rtx_if_shared (orig) | |
2188 | rtx orig; | |
2189 | { | |
b3694847 SS |
2190 | rtx x = orig; |
2191 | int i; | |
2192 | enum rtx_code code; | |
2193 | const char *format_ptr; | |
23b2ce53 RS |
2194 | int copied = 0; |
2195 | ||
2196 | if (x == 0) | |
2197 | return 0; | |
2198 | ||
2199 | code = GET_CODE (x); | |
2200 | ||
2201 | /* These types may be freely shared. */ | |
2202 | ||
2203 | switch (code) | |
2204 | { | |
2205 | case REG: | |
2206 | case QUEUED: | |
2207 | case CONST_INT: | |
2208 | case CONST_DOUBLE: | |
2209 | case SYMBOL_REF: | |
2210 | case CODE_LABEL: | |
2211 | case PC: | |
2212 | case CC0: | |
2213 | case SCRATCH: | |
0f41302f | 2214 | /* SCRATCH must be shared because they represent distinct values. */ |
23b2ce53 RS |
2215 | return x; |
2216 | ||
b851ea09 RK |
2217 | case CONST: |
2218 | /* CONST can be shared if it contains a SYMBOL_REF. If it contains | |
2219 | a LABEL_REF, it isn't sharable. */ | |
2220 | if (GET_CODE (XEXP (x, 0)) == PLUS | |
2221 | && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF | |
2222 | && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT) | |
2223 | return x; | |
2224 | break; | |
2225 | ||
23b2ce53 RS |
2226 | case INSN: |
2227 | case JUMP_INSN: | |
2228 | case CALL_INSN: | |
2229 | case NOTE: | |
23b2ce53 RS |
2230 | case BARRIER: |
2231 | /* The chain of insns is not being copied. */ | |
2232 | return x; | |
2233 | ||
2234 | case MEM: | |
83512665 JL |
2235 | /* A MEM is allowed to be shared if its address is constant. |
2236 | ||
750c9258 | 2237 | We used to allow sharing of MEMs which referenced |
83512665 JL |
2238 | virtual_stack_vars_rtx or virtual_incoming_args_rtx, but |
2239 | that can lose. instantiate_virtual_regs will not unshare | |
2240 | the MEMs, and combine may change the structure of the address | |
2241 | because it looks safe and profitable in one context, but | |
2242 | in some other context it creates unrecognizable RTL. */ | |
2243 | if (CONSTANT_ADDRESS_P (XEXP (x, 0))) | |
23b2ce53 RS |
2244 | return x; |
2245 | ||
e9a25f70 JL |
2246 | break; |
2247 | ||
2248 | default: | |
2249 | break; | |
23b2ce53 RS |
2250 | } |
2251 | ||
2252 | /* This rtx may not be shared. If it has already been seen, | |
2253 | replace it with a copy of itself. */ | |
2254 | ||
2255 | if (x->used) | |
2256 | { | |
b3694847 | 2257 | rtx copy; |
23b2ce53 RS |
2258 | |
2259 | copy = rtx_alloc (code); | |
4e135bdd | 2260 | memcpy (copy, x, |
4c9a05bc RK |
2261 | (sizeof (*copy) - sizeof (copy->fld) |
2262 | + sizeof (copy->fld[0]) * GET_RTX_LENGTH (code))); | |
23b2ce53 RS |
2263 | x = copy; |
2264 | copied = 1; | |
2265 | } | |
2266 | x->used = 1; | |
2267 | ||
2268 | /* Now scan the subexpressions recursively. | |
2269 | We can store any replaced subexpressions directly into X | |
2270 | since we know X is not shared! Any vectors in X | |
2271 | must be copied if X was copied. */ | |
2272 | ||
2273 | format_ptr = GET_RTX_FORMAT (code); | |
2274 | ||
2275 | for (i = 0; i < GET_RTX_LENGTH (code); i++) | |
2276 | { | |
2277 | switch (*format_ptr++) | |
2278 | { | |
2279 | case 'e': | |
2280 | XEXP (x, i) = copy_rtx_if_shared (XEXP (x, i)); | |
2281 | break; | |
2282 | ||
2283 | case 'E': | |
2284 | if (XVEC (x, i) != NULL) | |
2285 | { | |
b3694847 | 2286 | int j; |
f0722107 | 2287 | int len = XVECLEN (x, i); |
23b2ce53 | 2288 | |
f0722107 | 2289 | if (copied && len > 0) |
8f985ec4 | 2290 | XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem); |
f0722107 RS |
2291 | for (j = 0; j < len; j++) |
2292 | XVECEXP (x, i, j) = copy_rtx_if_shared (XVECEXP (x, i, j)); | |
23b2ce53 RS |
2293 | } |
2294 | break; | |
2295 | } | |
2296 | } | |
2297 | return x; | |
2298 | } | |
2299 | ||
2300 | /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used | |
2301 | to look for shared sub-parts. */ | |
2302 | ||
2303 | void | |
2304 | reset_used_flags (x) | |
2305 | rtx x; | |
2306 | { | |
b3694847 SS |
2307 | int i, j; |
2308 | enum rtx_code code; | |
2309 | const char *format_ptr; | |
23b2ce53 RS |
2310 | |
2311 | if (x == 0) | |
2312 | return; | |
2313 | ||
2314 | code = GET_CODE (x); | |
2315 | ||
9faa82d8 | 2316 | /* These types may be freely shared so we needn't do any resetting |
23b2ce53 RS |
2317 | for them. */ |
2318 | ||
2319 | switch (code) | |
2320 | { | |
2321 | case REG: | |
2322 | case QUEUED: | |
2323 | case CONST_INT: | |
2324 | case CONST_DOUBLE: | |
2325 | case SYMBOL_REF: | |
2326 | case CODE_LABEL: | |
2327 | case PC: | |
2328 | case CC0: | |
2329 | return; | |
2330 | ||
2331 | case INSN: | |
2332 | case JUMP_INSN: | |
2333 | case CALL_INSN: | |
2334 | case NOTE: | |
2335 | case LABEL_REF: | |
2336 | case BARRIER: | |
2337 | /* The chain of insns is not being copied. */ | |
2338 | return; | |
750c9258 | 2339 | |
e9a25f70 JL |
2340 | default: |
2341 | break; | |
23b2ce53 RS |
2342 | } |
2343 | ||
2344 | x->used = 0; | |
2345 | ||
2346 | format_ptr = GET_RTX_FORMAT (code); | |
2347 | for (i = 0; i < GET_RTX_LENGTH (code); i++) | |
2348 | { | |
2349 | switch (*format_ptr++) | |
2350 | { | |
2351 | case 'e': | |
2352 | reset_used_flags (XEXP (x, i)); | |
2353 | break; | |
2354 | ||
2355 | case 'E': | |
2356 | for (j = 0; j < XVECLEN (x, i); j++) | |
2357 | reset_used_flags (XVECEXP (x, i, j)); | |
2358 | break; | |
2359 | } | |
2360 | } | |
2361 | } | |
2362 | \f | |
2363 | /* Copy X if necessary so that it won't be altered by changes in OTHER. | |
2364 | Return X or the rtx for the pseudo reg the value of X was copied into. | |
2365 | OTHER must be valid as a SET_DEST. */ | |
2366 | ||
2367 | rtx | |
2368 | make_safe_from (x, other) | |
2369 | rtx x, other; | |
2370 | { | |
2371 | while (1) | |
2372 | switch (GET_CODE (other)) | |
2373 | { | |
2374 | case SUBREG: | |
2375 | other = SUBREG_REG (other); | |
2376 | break; | |
2377 | case STRICT_LOW_PART: | |
2378 | case SIGN_EXTEND: | |
2379 | case ZERO_EXTEND: | |
2380 | other = XEXP (other, 0); | |
2381 | break; | |
2382 | default: | |
2383 | goto done; | |
2384 | } | |
2385 | done: | |
2386 | if ((GET_CODE (other) == MEM | |
2387 | && ! CONSTANT_P (x) | |
2388 | && GET_CODE (x) != REG | |
2389 | && GET_CODE (x) != SUBREG) | |
2390 | || (GET_CODE (other) == REG | |
2391 | && (REGNO (other) < FIRST_PSEUDO_REGISTER | |
2392 | || reg_mentioned_p (other, x)))) | |
2393 | { | |
2394 | rtx temp = gen_reg_rtx (GET_MODE (x)); | |
2395 | emit_move_insn (temp, x); | |
2396 | return temp; | |
2397 | } | |
2398 | return x; | |
2399 | } | |
2400 | \f | |
2401 | /* Emission of insns (adding them to the doubly-linked list). */ | |
2402 | ||
2403 | /* Return the first insn of the current sequence or current function. */ | |
2404 | ||
2405 | rtx | |
2406 | get_insns () | |
2407 | { | |
2408 | return first_insn; | |
2409 | } | |
2410 | ||
2411 | /* Return the last insn emitted in current sequence or current function. */ | |
2412 | ||
2413 | rtx | |
2414 | get_last_insn () | |
2415 | { | |
2416 | return last_insn; | |
2417 | } | |
2418 | ||
2419 | /* Specify a new insn as the last in the chain. */ | |
2420 | ||
2421 | void | |
2422 | set_last_insn (insn) | |
2423 | rtx insn; | |
2424 | { | |
2425 | if (NEXT_INSN (insn) != 0) | |
2426 | abort (); | |
2427 | last_insn = insn; | |
2428 | } | |
2429 | ||
2430 | /* Return the last insn emitted, even if it is in a sequence now pushed. */ | |
2431 | ||
2432 | rtx | |
2433 | get_last_insn_anywhere () | |
2434 | { | |
2435 | struct sequence_stack *stack; | |
2436 | if (last_insn) | |
2437 | return last_insn; | |
49ad7cfa | 2438 | for (stack = seq_stack; stack; stack = stack->next) |
23b2ce53 RS |
2439 | if (stack->last != 0) |
2440 | return stack->last; | |
2441 | return 0; | |
2442 | } | |
2443 | ||
2444 | /* Return a number larger than any instruction's uid in this function. */ | |
2445 | ||
2446 | int | |
2447 | get_max_uid () | |
2448 | { | |
2449 | return cur_insn_uid; | |
2450 | } | |
aeeeda03 | 2451 | |
673b5311 MM |
2452 | /* Renumber instructions so that no instruction UIDs are wasted. */ |
2453 | ||
aeeeda03 | 2454 | void |
673b5311 MM |
2455 | renumber_insns (stream) |
2456 | FILE *stream; | |
aeeeda03 MM |
2457 | { |
2458 | rtx insn; | |
aeeeda03 | 2459 | |
673b5311 MM |
2460 | /* If we're not supposed to renumber instructions, don't. */ |
2461 | if (!flag_renumber_insns) | |
2462 | return; | |
2463 | ||
aeeeda03 MM |
2464 | /* If there aren't that many instructions, then it's not really |
2465 | worth renumbering them. */ | |
673b5311 | 2466 | if (flag_renumber_insns == 1 && get_max_uid () < 25000) |
aeeeda03 MM |
2467 | return; |
2468 | ||
2469 | cur_insn_uid = 1; | |
2470 | ||
2471 | for (insn = get_insns (); insn; insn = NEXT_INSN (insn)) | |
673b5311 MM |
2472 | { |
2473 | if (stream) | |
750c9258 | 2474 | fprintf (stream, "Renumbering insn %d to %d\n", |
673b5311 MM |
2475 | INSN_UID (insn), cur_insn_uid); |
2476 | INSN_UID (insn) = cur_insn_uid++; | |
2477 | } | |
aeeeda03 | 2478 | } |
23b2ce53 RS |
2479 | \f |
2480 | /* Return the next insn. If it is a SEQUENCE, return the first insn | |
2481 | of the sequence. */ | |
2482 | ||
2483 | rtx | |
2484 | next_insn (insn) | |
2485 | rtx insn; | |
2486 | { | |
2487 | if (insn) | |
2488 | { | |
2489 | insn = NEXT_INSN (insn); | |
2490 | if (insn && GET_CODE (insn) == INSN | |
2491 | && GET_CODE (PATTERN (insn)) == SEQUENCE) | |
2492 | insn = XVECEXP (PATTERN (insn), 0, 0); | |
2493 | } | |
2494 | ||
2495 | return insn; | |
2496 | } | |
2497 | ||
2498 | /* Return the previous insn. If it is a SEQUENCE, return the last insn | |
2499 | of the sequence. */ | |
2500 | ||
2501 | rtx | |
2502 | previous_insn (insn) | |
2503 | rtx insn; | |
2504 | { | |
2505 | if (insn) | |
2506 | { | |
2507 | insn = PREV_INSN (insn); | |
2508 | if (insn && GET_CODE (insn) == INSN | |
2509 | && GET_CODE (PATTERN (insn)) == SEQUENCE) | |
2510 | insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1); | |
2511 | } | |
2512 | ||
2513 | return insn; | |
2514 | } | |
2515 | ||
2516 | /* Return the next insn after INSN that is not a NOTE. This routine does not | |
2517 | look inside SEQUENCEs. */ | |
2518 | ||
2519 | rtx | |
2520 | next_nonnote_insn (insn) | |
2521 | rtx insn; | |
2522 | { | |
2523 | while (insn) | |
2524 | { | |
2525 | insn = NEXT_INSN (insn); | |
2526 | if (insn == 0 || GET_CODE (insn) != NOTE) | |
2527 | break; | |
2528 | } | |
2529 | ||
2530 | return insn; | |
2531 | } | |
2532 | ||
2533 | /* Return the previous insn before INSN that is not a NOTE. This routine does | |
2534 | not look inside SEQUENCEs. */ | |
2535 | ||
2536 | rtx | |
2537 | prev_nonnote_insn (insn) | |
2538 | rtx insn; | |
2539 | { | |
2540 | while (insn) | |
2541 | { | |
2542 | insn = PREV_INSN (insn); | |
2543 | if (insn == 0 || GET_CODE (insn) != NOTE) | |
2544 | break; | |
2545 | } | |
2546 | ||
2547 | return insn; | |
2548 | } | |
2549 | ||
2550 | /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN; | |
2551 | or 0, if there is none. This routine does not look inside | |
0f41302f | 2552 | SEQUENCEs. */ |
23b2ce53 RS |
2553 | |
2554 | rtx | |
2555 | next_real_insn (insn) | |
2556 | rtx insn; | |
2557 | { | |
2558 | while (insn) | |
2559 | { | |
2560 | insn = NEXT_INSN (insn); | |
2561 | if (insn == 0 || GET_CODE (insn) == INSN | |
2562 | || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN) | |
2563 | break; | |
2564 | } | |
2565 | ||
2566 | return insn; | |
2567 | } | |
2568 | ||
2569 | /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN; | |
2570 | or 0, if there is none. This routine does not look inside | |
2571 | SEQUENCEs. */ | |
2572 | ||
2573 | rtx | |
2574 | prev_real_insn (insn) | |
2575 | rtx insn; | |
2576 | { | |
2577 | while (insn) | |
2578 | { | |
2579 | insn = PREV_INSN (insn); | |
2580 | if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN | |
2581 | || GET_CODE (insn) == JUMP_INSN) | |
2582 | break; | |
2583 | } | |
2584 | ||
2585 | return insn; | |
2586 | } | |
2587 | ||
2588 | /* Find the next insn after INSN that really does something. This routine | |
2589 | does not look inside SEQUENCEs. Until reload has completed, this is the | |
2590 | same as next_real_insn. */ | |
2591 | ||
69732dcb RH |
2592 | int |
2593 | active_insn_p (insn) | |
2594 | rtx insn; | |
2595 | { | |
2596 | return (GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN | |
2597 | || (GET_CODE (insn) == INSN | |
2598 | && (! reload_completed | |
2599 | || (GET_CODE (PATTERN (insn)) != USE | |
2600 | && GET_CODE (PATTERN (insn)) != CLOBBER)))); | |
2601 | } | |
2602 | ||
23b2ce53 RS |
2603 | rtx |
2604 | next_active_insn (insn) | |
2605 | rtx insn; | |
2606 | { | |
2607 | while (insn) | |
2608 | { | |
2609 | insn = NEXT_INSN (insn); | |
69732dcb | 2610 | if (insn == 0 || active_insn_p (insn)) |
23b2ce53 RS |
2611 | break; |
2612 | } | |
2613 | ||
2614 | return insn; | |
2615 | } | |
2616 | ||
2617 | /* Find the last insn before INSN that really does something. This routine | |
2618 | does not look inside SEQUENCEs. Until reload has completed, this is the | |
2619 | same as prev_real_insn. */ | |
2620 | ||
2621 | rtx | |
2622 | prev_active_insn (insn) | |
2623 | rtx insn; | |
2624 | { | |
2625 | while (insn) | |
2626 | { | |
2627 | insn = PREV_INSN (insn); | |
69732dcb | 2628 | if (insn == 0 || active_insn_p (insn)) |
23b2ce53 RS |
2629 | break; |
2630 | } | |
2631 | ||
2632 | return insn; | |
2633 | } | |
2634 | ||
2635 | /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */ | |
2636 | ||
2637 | rtx | |
2638 | next_label (insn) | |
2639 | rtx insn; | |
2640 | { | |
2641 | while (insn) | |
2642 | { | |
2643 | insn = NEXT_INSN (insn); | |
2644 | if (insn == 0 || GET_CODE (insn) == CODE_LABEL) | |
2645 | break; | |
2646 | } | |
2647 | ||
2648 | return insn; | |
2649 | } | |
2650 | ||
2651 | /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */ | |
2652 | ||
2653 | rtx | |
2654 | prev_label (insn) | |
2655 | rtx insn; | |
2656 | { | |
2657 | while (insn) | |
2658 | { | |
2659 | insn = PREV_INSN (insn); | |
2660 | if (insn == 0 || GET_CODE (insn) == CODE_LABEL) | |
2661 | break; | |
2662 | } | |
2663 | ||
2664 | return insn; | |
2665 | } | |
2666 | \f | |
2667 | #ifdef HAVE_cc0 | |
c572e5ba JVA |
2668 | /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER |
2669 | and REG_CC_USER notes so we can find it. */ | |
2670 | ||
2671 | void | |
2672 | link_cc0_insns (insn) | |
2673 | rtx insn; | |
2674 | { | |
2675 | rtx user = next_nonnote_insn (insn); | |
2676 | ||
2677 | if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE) | |
2678 | user = XVECEXP (PATTERN (user), 0, 0); | |
2679 | ||
c5c76735 JL |
2680 | REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn, |
2681 | REG_NOTES (user)); | |
3b80f6ca | 2682 | REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_CC_USER, user, REG_NOTES (insn)); |
c572e5ba JVA |
2683 | } |
2684 | ||
23b2ce53 RS |
2685 | /* Return the next insn that uses CC0 after INSN, which is assumed to |
2686 | set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter | |
2687 | applied to the result of this function should yield INSN). | |
2688 | ||
2689 | Normally, this is simply the next insn. However, if a REG_CC_USER note | |
2690 | is present, it contains the insn that uses CC0. | |
2691 | ||
2692 | Return 0 if we can't find the insn. */ | |
2693 | ||
2694 | rtx | |
2695 | next_cc0_user (insn) | |
2696 | rtx insn; | |
2697 | { | |
906c4e36 | 2698 | rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX); |
23b2ce53 RS |
2699 | |
2700 | if (note) | |
2701 | return XEXP (note, 0); | |
2702 | ||
2703 | insn = next_nonnote_insn (insn); | |
2704 | if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE) | |
2705 | insn = XVECEXP (PATTERN (insn), 0, 0); | |
2706 | ||
2c3c49de | 2707 | if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn))) |
23b2ce53 RS |
2708 | return insn; |
2709 | ||
2710 | return 0; | |
2711 | } | |
2712 | ||
2713 | /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER | |
2714 | note, it is the previous insn. */ | |
2715 | ||
2716 | rtx | |
2717 | prev_cc0_setter (insn) | |
2718 | rtx insn; | |
2719 | { | |
906c4e36 | 2720 | rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX); |
23b2ce53 RS |
2721 | |
2722 | if (note) | |
2723 | return XEXP (note, 0); | |
2724 | ||
2725 | insn = prev_nonnote_insn (insn); | |
2726 | if (! sets_cc0_p (PATTERN (insn))) | |
2727 | abort (); | |
2728 | ||
2729 | return insn; | |
2730 | } | |
2731 | #endif | |
e5bef2e4 HB |
2732 | |
2733 | /* Increment the label uses for all labels present in rtx. */ | |
2734 | ||
2735 | static void | |
2736 | mark_label_nuses(x) | |
2737 | rtx x; | |
2738 | { | |
b3694847 SS |
2739 | enum rtx_code code; |
2740 | int i, j; | |
2741 | const char *fmt; | |
e5bef2e4 HB |
2742 | |
2743 | code = GET_CODE (x); | |
2744 | if (code == LABEL_REF) | |
2745 | LABEL_NUSES (XEXP (x, 0))++; | |
2746 | ||
2747 | fmt = GET_RTX_FORMAT (code); | |
2748 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
2749 | { | |
2750 | if (fmt[i] == 'e') | |
2751 | mark_label_nuses (XEXP (x, i)); | |
2752 | else if (fmt[i] == 'E') | |
2753 | for (j = XVECLEN (x, i) - 1; j >= 0; j--) | |
2754 | mark_label_nuses (XVECEXP (x, i, j)); | |
2755 | } | |
2756 | } | |
2757 | ||
23b2ce53 RS |
2758 | \f |
2759 | /* Try splitting insns that can be split for better scheduling. | |
2760 | PAT is the pattern which might split. | |
2761 | TRIAL is the insn providing PAT. | |
11147ebe | 2762 | LAST is non-zero if we should return the last insn of the sequence produced. |
23b2ce53 RS |
2763 | |
2764 | If this routine succeeds in splitting, it returns the first or last | |
11147ebe | 2765 | replacement insn depending on the value of LAST. Otherwise, it |
23b2ce53 RS |
2766 | returns TRIAL. If the insn to be returned can be split, it will be. */ |
2767 | ||
2768 | rtx | |
11147ebe | 2769 | try_split (pat, trial, last) |
23b2ce53 | 2770 | rtx pat, trial; |
11147ebe | 2771 | int last; |
23b2ce53 RS |
2772 | { |
2773 | rtx before = PREV_INSN (trial); | |
2774 | rtx after = NEXT_INSN (trial); | |
23b2ce53 RS |
2775 | int has_barrier = 0; |
2776 | rtx tem; | |
6b24c259 JH |
2777 | rtx note, seq; |
2778 | int probability; | |
2779 | ||
2780 | if (any_condjump_p (trial) | |
2781 | && (note = find_reg_note (trial, REG_BR_PROB, 0))) | |
2782 | split_branch_probability = INTVAL (XEXP (note, 0)); | |
2783 | probability = split_branch_probability; | |
2784 | ||
2785 | seq = split_insns (pat, trial); | |
2786 | ||
2787 | split_branch_probability = -1; | |
23b2ce53 RS |
2788 | |
2789 | /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER. | |
2790 | We may need to handle this specially. */ | |
2791 | if (after && GET_CODE (after) == BARRIER) | |
2792 | { | |
2793 | has_barrier = 1; | |
2794 | after = NEXT_INSN (after); | |
2795 | } | |
2796 | ||
2797 | if (seq) | |
2798 | { | |
2799 | /* SEQ can either be a SEQUENCE or the pattern of a single insn. | |
2800 | The latter case will normally arise only when being done so that | |
2801 | it, in turn, will be split (SFmode on the 29k is an example). */ | |
2802 | if (GET_CODE (seq) == SEQUENCE) | |
2803 | { | |
6b24c259 | 2804 | int i, njumps = 0; |
750c9258 AJ |
2805 | |
2806 | /* Avoid infinite loop if any insn of the result matches | |
4b5e8abe CP |
2807 | the original pattern. */ |
2808 | for (i = 0; i < XVECLEN (seq, 0); i++) | |
750c9258 | 2809 | if (GET_CODE (XVECEXP (seq, 0, i)) == INSN |
4b5e8abe | 2810 | && rtx_equal_p (PATTERN (XVECEXP (seq, 0, i)), pat)) |
750c9258 | 2811 | return trial; |
4b5e8abe | 2812 | |
90a74703 JH |
2813 | /* Mark labels. */ |
2814 | for (i = XVECLEN (seq, 0) - 1; i >= 0; i--) | |
2815 | if (GET_CODE (XVECEXP (seq, 0, i)) == JUMP_INSN) | |
6b24c259 JH |
2816 | { |
2817 | rtx insn = XVECEXP (seq, 0, i); | |
2818 | mark_jump_label (PATTERN (insn), | |
2819 | XVECEXP (seq, 0, i), 0); | |
2820 | njumps++; | |
2821 | if (probability != -1 | |
2822 | && any_condjump_p (insn) | |
2823 | && !find_reg_note (insn, REG_BR_PROB, 0)) | |
2824 | { | |
2825 | /* We can preserve the REG_BR_PROB notes only if exactly | |
a1f300c0 | 2826 | one jump is created, otherwise the machine description |
6b24c259 JH |
2827 | is responsible for this step using |
2828 | split_branch_probability variable. */ | |
2829 | if (njumps != 1) | |
2830 | abort (); | |
2831 | REG_NOTES (insn) | |
2832 | = gen_rtx_EXPR_LIST (REG_BR_PROB, | |
2833 | GEN_INT (probability), | |
2834 | REG_NOTES (insn)); | |
2835 | } | |
2836 | } | |
216183ce | 2837 | |
2d01e445 AO |
2838 | /* If we are splitting a CALL_INSN, look for the CALL_INSN |
2839 | in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */ | |
2840 | if (GET_CODE (trial) == CALL_INSN) | |
2841 | for (i = XVECLEN (seq, 0) - 1; i >= 0; i--) | |
2842 | if (GET_CODE (XVECEXP (seq, 0, i)) == CALL_INSN) | |
2843 | CALL_INSN_FUNCTION_USAGE (XVECEXP (seq, 0, i)) | |
2844 | = CALL_INSN_FUNCTION_USAGE (trial); | |
2845 | ||
216183ce RH |
2846 | /* Copy notes, particularly those related to the CFG. */ |
2847 | for (note = REG_NOTES (trial); note ; note = XEXP (note, 1)) | |
2848 | { | |
2849 | switch (REG_NOTE_KIND (note)) | |
2850 | { | |
2851 | case REG_EH_REGION: | |
2852 | for (i = XVECLEN (seq, 0) - 1; i >= 0; i--) | |
2853 | { | |
2854 | rtx insn = XVECEXP (seq, 0, i); | |
2855 | if (GET_CODE (insn) == CALL_INSN | |
2856 | || (flag_non_call_exceptions | |
2857 | && may_trap_p (PATTERN (insn)))) | |
2858 | REG_NOTES (insn) | |
2859 | = gen_rtx_EXPR_LIST (REG_EH_REGION, | |
2860 | XEXP (note, 0), | |
2861 | REG_NOTES (insn)); | |
2862 | } | |
2863 | break; | |
2864 | ||
2865 | case REG_NORETURN: | |
2866 | case REG_SETJMP: | |
2867 | case REG_ALWAYS_RETURN: | |
2868 | for (i = XVECLEN (seq, 0) - 1; i >= 0; i--) | |
2869 | { | |
2870 | rtx insn = XVECEXP (seq, 0, i); | |
2871 | if (GET_CODE (insn) == CALL_INSN) | |
2872 | REG_NOTES (insn) | |
2873 | = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note), | |
2874 | XEXP (note, 0), | |
2875 | REG_NOTES (insn)); | |
2876 | } | |
2877 | break; | |
2878 | ||
2879 | case REG_NON_LOCAL_GOTO: | |
2880 | for (i = XVECLEN (seq, 0) - 1; i >= 0; i--) | |
2881 | { | |
2882 | rtx insn = XVECEXP (seq, 0, i); | |
2883 | if (GET_CODE (insn) == JUMP_INSN) | |
2884 | REG_NOTES (insn) | |
2885 | = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note), | |
2886 | XEXP (note, 0), | |
2887 | REG_NOTES (insn)); | |
2888 | } | |
2889 | break; | |
2890 | ||
2891 | default: | |
2892 | break; | |
2893 | } | |
2894 | } | |
d6e95df8 | 2895 | |
e5bef2e4 HB |
2896 | /* If there are LABELS inside the split insns increment the |
2897 | usage count so we don't delete the label. */ | |
2898 | if (GET_CODE (trial) == INSN) | |
2899 | for (i = XVECLEN (seq, 0) - 1; i >= 0; i--) | |
2900 | if (GET_CODE (XVECEXP (seq, 0, i)) == INSN) | |
2901 | mark_label_nuses (PATTERN (XVECEXP (seq, 0, i))); | |
2902 | ||
3c030e88 | 2903 | tem = emit_insn_after (seq, trial); |
23b2ce53 | 2904 | |
53c17031 | 2905 | delete_related_insns (trial); |
23b2ce53 RS |
2906 | if (has_barrier) |
2907 | emit_barrier_after (tem); | |
11147ebe RK |
2908 | |
2909 | /* Recursively call try_split for each new insn created; by the | |
2910 | time control returns here that insn will be fully split, so | |
2911 | set LAST and continue from the insn after the one returned. | |
f4a3cd05 | 2912 | We can't use next_active_insn here since AFTER may be a note. |
23886015 | 2913 | Ignore deleted insns, which can be occur if not optimizing. */ |
2c3c49de RB |
2914 | for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem)) |
2915 | if (! INSN_DELETED_P (tem) && INSN_P (tem)) | |
f4a3cd05 | 2916 | tem = try_split (PATTERN (tem), tem, 1); |
23b2ce53 RS |
2917 | } |
2918 | /* Avoid infinite loop if the result matches the original pattern. */ | |
2919 | else if (rtx_equal_p (seq, pat)) | |
2920 | return trial; | |
2921 | else | |
2922 | { | |
2923 | PATTERN (trial) = seq; | |
2924 | INSN_CODE (trial) = -1; | |
11147ebe | 2925 | try_split (seq, trial, last); |
23b2ce53 RS |
2926 | } |
2927 | ||
11147ebe RK |
2928 | /* Return either the first or the last insn, depending on which was |
2929 | requested. */ | |
750c9258 | 2930 | return last |
6b24c259 JH |
2931 | ? (after ? PREV_INSN (after) : last_insn) |
2932 | : NEXT_INSN (before); | |
23b2ce53 RS |
2933 | } |
2934 | ||
2935 | return trial; | |
2936 | } | |
2937 | \f | |
2938 | /* Make and return an INSN rtx, initializing all its slots. | |
4b1f5e8c | 2939 | Store PATTERN in the pattern slots. */ |
23b2ce53 RS |
2940 | |
2941 | rtx | |
4b1f5e8c | 2942 | make_insn_raw (pattern) |
23b2ce53 | 2943 | rtx pattern; |
23b2ce53 | 2944 | { |
b3694847 | 2945 | rtx insn; |
23b2ce53 | 2946 | |
1f8f4a0b | 2947 | insn = rtx_alloc (INSN); |
23b2ce53 | 2948 | |
43127294 | 2949 | INSN_UID (insn) = cur_insn_uid++; |
23b2ce53 RS |
2950 | PATTERN (insn) = pattern; |
2951 | INSN_CODE (insn) = -1; | |
1632afca RS |
2952 | LOG_LINKS (insn) = NULL; |
2953 | REG_NOTES (insn) = NULL; | |
23b2ce53 | 2954 | |
47984720 NC |
2955 | #ifdef ENABLE_RTL_CHECKING |
2956 | if (insn | |
2c3c49de | 2957 | && INSN_P (insn) |
47984720 NC |
2958 | && (returnjump_p (insn) |
2959 | || (GET_CODE (insn) == SET | |
2960 | && SET_DEST (insn) == pc_rtx))) | |
2961 | { | |
2962 | warning ("ICE: emit_insn used where emit_jump_insn needed:\n"); | |
2963 | debug_rtx (insn); | |
2964 | } | |
2965 | #endif | |
750c9258 | 2966 | |
23b2ce53 RS |
2967 | return insn; |
2968 | } | |
2969 | ||
2970 | /* Like `make_insn' but make a JUMP_INSN instead of an insn. */ | |
2971 | ||
2972 | static rtx | |
4b1f5e8c | 2973 | make_jump_insn_raw (pattern) |
23b2ce53 | 2974 | rtx pattern; |
23b2ce53 | 2975 | { |
b3694847 | 2976 | rtx insn; |
23b2ce53 | 2977 | |
4b1f5e8c | 2978 | insn = rtx_alloc (JUMP_INSN); |
1632afca | 2979 | INSN_UID (insn) = cur_insn_uid++; |
23b2ce53 RS |
2980 | |
2981 | PATTERN (insn) = pattern; | |
2982 | INSN_CODE (insn) = -1; | |
1632afca RS |
2983 | LOG_LINKS (insn) = NULL; |
2984 | REG_NOTES (insn) = NULL; | |
2985 | JUMP_LABEL (insn) = NULL; | |
23b2ce53 RS |
2986 | |
2987 | return insn; | |
2988 | } | |
aff507f4 RK |
2989 | |
2990 | /* Like `make_insn' but make a CALL_INSN instead of an insn. */ | |
2991 | ||
2992 | static rtx | |
2993 | make_call_insn_raw (pattern) | |
2994 | rtx pattern; | |
2995 | { | |
b3694847 | 2996 | rtx insn; |
aff507f4 RK |
2997 | |
2998 | insn = rtx_alloc (CALL_INSN); | |
2999 | INSN_UID (insn) = cur_insn_uid++; | |
3000 | ||
3001 | PATTERN (insn) = pattern; | |
3002 | INSN_CODE (insn) = -1; | |
3003 | LOG_LINKS (insn) = NULL; | |
3004 | REG_NOTES (insn) = NULL; | |
3005 | CALL_INSN_FUNCTION_USAGE (insn) = NULL; | |
3006 | ||
3007 | return insn; | |
3008 | } | |
23b2ce53 RS |
3009 | \f |
3010 | /* Add INSN to the end of the doubly-linked list. | |
3011 | INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */ | |
3012 | ||
3013 | void | |
3014 | add_insn (insn) | |
b3694847 | 3015 | rtx insn; |
23b2ce53 RS |
3016 | { |
3017 | PREV_INSN (insn) = last_insn; | |
3018 | NEXT_INSN (insn) = 0; | |
3019 | ||
3020 | if (NULL != last_insn) | |
3021 | NEXT_INSN (last_insn) = insn; | |
3022 | ||
3023 | if (NULL == first_insn) | |
3024 | first_insn = insn; | |
3025 | ||
3026 | last_insn = insn; | |
3027 | } | |
3028 | ||
a0ae8e8d RK |
3029 | /* Add INSN into the doubly-linked list after insn AFTER. This and |
3030 | the next should be the only functions called to insert an insn once | |
ba213285 | 3031 | delay slots have been filled since only they know how to update a |
a0ae8e8d | 3032 | SEQUENCE. */ |
23b2ce53 RS |
3033 | |
3034 | void | |
3035 | add_insn_after (insn, after) | |
3036 | rtx insn, after; | |
3037 | { | |
3038 | rtx next = NEXT_INSN (after); | |
3c030e88 | 3039 | basic_block bb; |
23b2ce53 | 3040 | |
6782074d | 3041 | if (optimize && INSN_DELETED_P (after)) |
ba213285 RK |
3042 | abort (); |
3043 | ||
23b2ce53 RS |
3044 | NEXT_INSN (insn) = next; |
3045 | PREV_INSN (insn) = after; | |
3046 | ||
3047 | if (next) | |
3048 | { | |
3049 | PREV_INSN (next) = insn; | |
3050 | if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE) | |
3051 | PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn; | |
3052 | } | |
3053 | else if (last_insn == after) | |
3054 | last_insn = insn; | |
3055 | else | |
3056 | { | |
49ad7cfa | 3057 | struct sequence_stack *stack = seq_stack; |
23b2ce53 RS |
3058 | /* Scan all pending sequences too. */ |
3059 | for (; stack; stack = stack->next) | |
3060 | if (after == stack->last) | |
fef0509b RK |
3061 | { |
3062 | stack->last = insn; | |
3063 | break; | |
3064 | } | |
a0ae8e8d RK |
3065 | |
3066 | if (stack == 0) | |
3067 | abort (); | |
23b2ce53 RS |
3068 | } |
3069 | ||
3c030e88 JH |
3070 | if (basic_block_for_insn |
3071 | && (unsigned int)INSN_UID (after) < basic_block_for_insn->num_elements | |
3072 | && (bb = BLOCK_FOR_INSN (after))) | |
3073 | { | |
3074 | set_block_for_insn (insn, bb); | |
3075 | /* Should not happen as first in the BB is always | |
a1f300c0 | 3076 | either NOTE or LABEL. */ |
3c030e88 JH |
3077 | if (bb->end == after |
3078 | /* Avoid clobbering of structure when creating new BB. */ | |
3079 | && GET_CODE (insn) != BARRIER | |
3080 | && (GET_CODE (insn) != NOTE | |
3081 | || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK)) | |
3082 | bb->end = insn; | |
3083 | } | |
3084 | ||
23b2ce53 RS |
3085 | NEXT_INSN (after) = insn; |
3086 | if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE) | |
3087 | { | |
3088 | rtx sequence = PATTERN (after); | |
3089 | NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn; | |
3090 | } | |
3091 | } | |
3092 | ||
a0ae8e8d RK |
3093 | /* Add INSN into the doubly-linked list before insn BEFORE. This and |
3094 | the previous should be the only functions called to insert an insn once | |
ba213285 | 3095 | delay slots have been filled since only they know how to update a |
a0ae8e8d RK |
3096 | SEQUENCE. */ |
3097 | ||
3098 | void | |
3099 | add_insn_before (insn, before) | |
3100 | rtx insn, before; | |
3101 | { | |
3102 | rtx prev = PREV_INSN (before); | |
3c030e88 | 3103 | basic_block bb; |
a0ae8e8d | 3104 | |
6782074d | 3105 | if (optimize && INSN_DELETED_P (before)) |
ba213285 RK |
3106 | abort (); |
3107 | ||
a0ae8e8d RK |
3108 | PREV_INSN (insn) = prev; |
3109 | NEXT_INSN (insn) = before; | |
3110 | ||
3111 | if (prev) | |
3112 | { | |
3113 | NEXT_INSN (prev) = insn; | |
3114 | if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE) | |
3115 | { | |
3116 | rtx sequence = PATTERN (prev); | |
3117 | NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn; | |
3118 | } | |
3119 | } | |
3120 | else if (first_insn == before) | |
3121 | first_insn = insn; | |
3122 | else | |
3123 | { | |
49ad7cfa | 3124 | struct sequence_stack *stack = seq_stack; |
a0ae8e8d RK |
3125 | /* Scan all pending sequences too. */ |
3126 | for (; stack; stack = stack->next) | |
3127 | if (before == stack->first) | |
fef0509b RK |
3128 | { |
3129 | stack->first = insn; | |
3130 | break; | |
3131 | } | |
a0ae8e8d RK |
3132 | |
3133 | if (stack == 0) | |
3134 | abort (); | |
3135 | } | |
3136 | ||
3c030e88 JH |
3137 | if (basic_block_for_insn |
3138 | && (unsigned int)INSN_UID (before) < basic_block_for_insn->num_elements | |
3139 | && (bb = BLOCK_FOR_INSN (before))) | |
3140 | { | |
3141 | set_block_for_insn (insn, bb); | |
3142 | /* Should not happen as first in the BB is always | |
a1f300c0 | 3143 | either NOTE or LABEl. */ |
3c030e88 JH |
3144 | if (bb->head == insn |
3145 | /* Avoid clobbering of structure when creating new BB. */ | |
3146 | && GET_CODE (insn) != BARRIER | |
3147 | && (GET_CODE (insn) != NOTE | |
3148 | || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK)) | |
3149 | abort (); | |
3150 | } | |
3151 | ||
a0ae8e8d RK |
3152 | PREV_INSN (before) = insn; |
3153 | if (GET_CODE (before) == INSN && GET_CODE (PATTERN (before)) == SEQUENCE) | |
3154 | PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn; | |
3155 | } | |
3156 | ||
89e99eea DB |
3157 | /* Remove an insn from its doubly-linked list. This function knows how |
3158 | to handle sequences. */ | |
3159 | void | |
3160 | remove_insn (insn) | |
3161 | rtx insn; | |
3162 | { | |
3163 | rtx next = NEXT_INSN (insn); | |
3164 | rtx prev = PREV_INSN (insn); | |
53c17031 JH |
3165 | basic_block bb; |
3166 | ||
89e99eea DB |
3167 | if (prev) |
3168 | { | |
3169 | NEXT_INSN (prev) = next; | |
3170 | if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE) | |
3171 | { | |
3172 | rtx sequence = PATTERN (prev); | |
3173 | NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next; | |
3174 | } | |
3175 | } | |
3176 | else if (first_insn == insn) | |
3177 | first_insn = next; | |
3178 | else | |
3179 | { | |
49ad7cfa | 3180 | struct sequence_stack *stack = seq_stack; |
89e99eea DB |
3181 | /* Scan all pending sequences too. */ |
3182 | for (; stack; stack = stack->next) | |
3183 | if (insn == stack->first) | |
3184 | { | |
3185 | stack->first = next; | |
3186 | break; | |
3187 | } | |
3188 | ||
3189 | if (stack == 0) | |
3190 | abort (); | |
3191 | } | |
3192 | ||
3193 | if (next) | |
3194 | { | |
3195 | PREV_INSN (next) = prev; | |
3196 | if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE) | |
3197 | PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev; | |
3198 | } | |
3199 | else if (last_insn == insn) | |
3200 | last_insn = prev; | |
3201 | else | |
3202 | { | |
49ad7cfa | 3203 | struct sequence_stack *stack = seq_stack; |
89e99eea DB |
3204 | /* Scan all pending sequences too. */ |
3205 | for (; stack; stack = stack->next) | |
3206 | if (insn == stack->last) | |
3207 | { | |
3208 | stack->last = prev; | |
3209 | break; | |
3210 | } | |
3211 | ||
3212 | if (stack == 0) | |
3213 | abort (); | |
3214 | } | |
53c17031 JH |
3215 | if (basic_block_for_insn |
3216 | && (unsigned int)INSN_UID (insn) < basic_block_for_insn->num_elements | |
3217 | && (bb = BLOCK_FOR_INSN (insn))) | |
3218 | { | |
3219 | if (bb->head == insn) | |
3220 | { | |
3221 | /* Never ever delete the basic block note without deleting whole basic | |
3222 | block. */ | |
3223 | if (GET_CODE (insn) == NOTE) | |
3224 | abort (); | |
3225 | bb->head = next; | |
3226 | } | |
3227 | if (bb->end == insn) | |
3228 | bb->end = prev; | |
3229 | } | |
89e99eea DB |
3230 | } |
3231 | ||
23b2ce53 RS |
3232 | /* Delete all insns made since FROM. |
3233 | FROM becomes the new last instruction. */ | |
3234 | ||
3235 | void | |
3236 | delete_insns_since (from) | |
3237 | rtx from; | |
3238 | { | |
3239 | if (from == 0) | |
3240 | first_insn = 0; | |
3241 | else | |
3242 | NEXT_INSN (from) = 0; | |
3243 | last_insn = from; | |
3244 | } | |
3245 | ||
5dab5552 MS |
3246 | /* This function is deprecated, please use sequences instead. |
3247 | ||
3248 | Move a consecutive bunch of insns to a different place in the chain. | |
23b2ce53 RS |
3249 | The insns to be moved are those between FROM and TO. |
3250 | They are moved to a new position after the insn AFTER. | |
3251 | AFTER must not be FROM or TO or any insn in between. | |
3252 | ||
3253 | This function does not know about SEQUENCEs and hence should not be | |
3254 | called after delay-slot filling has been done. */ | |
3255 | ||
3256 | void | |
3c030e88 | 3257 | reorder_insns_nobb (from, to, after) |
23b2ce53 RS |
3258 | rtx from, to, after; |
3259 | { | |
3260 | /* Splice this bunch out of where it is now. */ | |
3261 | if (PREV_INSN (from)) | |
3262 | NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to); | |
3263 | if (NEXT_INSN (to)) | |
3264 | PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from); | |
3265 | if (last_insn == to) | |
3266 | last_insn = PREV_INSN (from); | |
3267 | if (first_insn == from) | |
3268 | first_insn = NEXT_INSN (to); | |
3269 | ||
3270 | /* Make the new neighbors point to it and it to them. */ | |
3271 | if (NEXT_INSN (after)) | |
3272 | PREV_INSN (NEXT_INSN (after)) = to; | |
3273 | ||
3274 | NEXT_INSN (to) = NEXT_INSN (after); | |
3275 | PREV_INSN (from) = after; | |
3276 | NEXT_INSN (after) = from; | |
3277 | if (after == last_insn) | |
3278 | last_insn = to; | |
3279 | } | |
3280 | ||
3c030e88 JH |
3281 | /* Same as function above, but take care to update BB boundaries. */ |
3282 | void | |
3283 | reorder_insns (from, to, after) | |
3284 | rtx from, to, after; | |
3285 | { | |
3286 | rtx prev = PREV_INSN (from); | |
3287 | basic_block bb, bb2; | |
3288 | ||
3289 | reorder_insns_nobb (from, to, after); | |
3290 | ||
3291 | if (basic_block_for_insn | |
3292 | && (unsigned int)INSN_UID (after) < basic_block_for_insn->num_elements | |
3293 | && (bb = BLOCK_FOR_INSN (after))) | |
3294 | { | |
3295 | rtx x; | |
3296 | ||
3297 | if (basic_block_for_insn | |
3298 | && (unsigned int)INSN_UID (from) < basic_block_for_insn->num_elements | |
3299 | && (bb2 = BLOCK_FOR_INSN (from))) | |
3300 | { | |
3301 | if (bb2->end == to) | |
3302 | bb2->end = prev; | |
3303 | } | |
3304 | ||
3305 | if (bb->end == after) | |
3306 | bb->end = to; | |
3307 | ||
3308 | for (x = from; x != NEXT_INSN (to); x = NEXT_INSN (x)) | |
3309 | set_block_for_insn (x, bb); | |
3310 | } | |
3311 | } | |
3312 | ||
23b2ce53 RS |
3313 | /* Return the line note insn preceding INSN. */ |
3314 | ||
3315 | static rtx | |
3316 | find_line_note (insn) | |
3317 | rtx insn; | |
3318 | { | |
3319 | if (no_line_numbers) | |
3320 | return 0; | |
3321 | ||
3322 | for (; insn; insn = PREV_INSN (insn)) | |
3323 | if (GET_CODE (insn) == NOTE | |
3324 | && NOTE_LINE_NUMBER (insn) >= 0) | |
3325 | break; | |
3326 | ||
3327 | return insn; | |
3328 | } | |
3329 | ||
3330 | /* Like reorder_insns, but inserts line notes to preserve the line numbers | |
3331 | of the moved insns when debugging. This may insert a note between AFTER | |
3332 | and FROM, and another one after TO. */ | |
3333 | ||
3334 | void | |
3335 | reorder_insns_with_line_notes (from, to, after) | |
3336 | rtx from, to, after; | |
3337 | { | |
3338 | rtx from_line = find_line_note (from); | |
3339 | rtx after_line = find_line_note (after); | |
3340 | ||
3341 | reorder_insns (from, to, after); | |
3342 | ||
3343 | if (from_line == after_line) | |
3344 | return; | |
3345 | ||
3346 | if (from_line) | |
3347 | emit_line_note_after (NOTE_SOURCE_FILE (from_line), | |
3348 | NOTE_LINE_NUMBER (from_line), | |
3349 | after); | |
3350 | if (after_line) | |
3351 | emit_line_note_after (NOTE_SOURCE_FILE (after_line), | |
3352 | NOTE_LINE_NUMBER (after_line), | |
3353 | to); | |
3354 | } | |
aeeeda03 | 3355 | |
64b59a80 | 3356 | /* Remove unnecessary notes from the instruction stream. */ |
aeeeda03 MM |
3357 | |
3358 | void | |
64b59a80 | 3359 | remove_unnecessary_notes () |
aeeeda03 | 3360 | { |
542d73ae RH |
3361 | rtx block_stack = NULL_RTX; |
3362 | rtx eh_stack = NULL_RTX; | |
aeeeda03 MM |
3363 | rtx insn; |
3364 | rtx next; | |
542d73ae | 3365 | rtx tmp; |
aeeeda03 | 3366 | |
116eebd6 MM |
3367 | /* We must not remove the first instruction in the function because |
3368 | the compiler depends on the first instruction being a note. */ | |
aeeeda03 MM |
3369 | for (insn = NEXT_INSN (get_insns ()); insn; insn = next) |
3370 | { | |
3371 | /* Remember what's next. */ | |
3372 | next = NEXT_INSN (insn); | |
3373 | ||
3374 | /* We're only interested in notes. */ | |
3375 | if (GET_CODE (insn) != NOTE) | |
3376 | continue; | |
3377 | ||
542d73ae | 3378 | switch (NOTE_LINE_NUMBER (insn)) |
18c038b9 | 3379 | { |
542d73ae RH |
3380 | case NOTE_INSN_DELETED: |
3381 | remove_insn (insn); | |
3382 | break; | |
3383 | ||
3384 | case NOTE_INSN_EH_REGION_BEG: | |
3385 | eh_stack = alloc_INSN_LIST (insn, eh_stack); | |
3386 | break; | |
3387 | ||
3388 | case NOTE_INSN_EH_REGION_END: | |
3389 | /* Too many end notes. */ | |
3390 | if (eh_stack == NULL_RTX) | |
3391 | abort (); | |
3392 | /* Mismatched nesting. */ | |
3393 | if (NOTE_EH_HANDLER (XEXP (eh_stack, 0)) != NOTE_EH_HANDLER (insn)) | |
3394 | abort (); | |
3395 | tmp = eh_stack; | |
3396 | eh_stack = XEXP (eh_stack, 1); | |
3397 | free_INSN_LIST_node (tmp); | |
3398 | break; | |
3399 | ||
3400 | case NOTE_INSN_BLOCK_BEG: | |
3401 | /* By now, all notes indicating lexical blocks should have | |
3402 | NOTE_BLOCK filled in. */ | |
3403 | if (NOTE_BLOCK (insn) == NULL_TREE) | |
3404 | abort (); | |
3405 | block_stack = alloc_INSN_LIST (insn, block_stack); | |
3406 | break; | |
3407 | ||
3408 | case NOTE_INSN_BLOCK_END: | |
3409 | /* Too many end notes. */ | |
3410 | if (block_stack == NULL_RTX) | |
3411 | abort (); | |
3412 | /* Mismatched nesting. */ | |
3413 | if (NOTE_BLOCK (XEXP (block_stack, 0)) != NOTE_BLOCK (insn)) | |
3414 | abort (); | |
3415 | tmp = block_stack; | |
3416 | block_stack = XEXP (block_stack, 1); | |
3417 | free_INSN_LIST_node (tmp); | |
3418 | ||
18c038b9 MM |
3419 | /* Scan back to see if there are any non-note instructions |
3420 | between INSN and the beginning of this block. If not, | |
3421 | then there is no PC range in the generated code that will | |
3422 | actually be in this block, so there's no point in | |
3423 | remembering the existence of the block. */ | |
542d73ae | 3424 | for (tmp = PREV_INSN (insn); tmp ; tmp = PREV_INSN (tmp)) |
18c038b9 MM |
3425 | { |
3426 | /* This block contains a real instruction. Note that we | |
3427 | don't include labels; if the only thing in the block | |
3428 | is a label, then there are still no PC values that | |
3429 | lie within the block. */ | |
542d73ae | 3430 | if (INSN_P (tmp)) |
18c038b9 MM |
3431 | break; |
3432 | ||
3433 | /* We're only interested in NOTEs. */ | |
542d73ae | 3434 | if (GET_CODE (tmp) != NOTE) |
18c038b9 MM |
3435 | continue; |
3436 | ||
542d73ae | 3437 | if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_BEG) |
18c038b9 | 3438 | { |
e1772ac0 NB |
3439 | /* We just verified that this BLOCK matches us with |
3440 | the block_stack check above. Never delete the | |
3441 | BLOCK for the outermost scope of the function; we | |
3442 | can refer to names from that scope even if the | |
3443 | block notes are messed up. */ | |
3444 | if (! is_body_block (NOTE_BLOCK (insn)) | |
3445 | && (*debug_hooks->ignore_block) (NOTE_BLOCK (insn))) | |
deb5e280 | 3446 | { |
542d73ae | 3447 | remove_insn (tmp); |
deb5e280 JM |
3448 | remove_insn (insn); |
3449 | } | |
18c038b9 MM |
3450 | break; |
3451 | } | |
542d73ae | 3452 | else if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_END) |
18c038b9 MM |
3453 | /* There's a nested block. We need to leave the |
3454 | current block in place since otherwise the debugger | |
3455 | wouldn't be able to show symbols from our block in | |
3456 | the nested block. */ | |
3457 | break; | |
3458 | } | |
3459 | } | |
aeeeda03 | 3460 | } |
542d73ae RH |
3461 | |
3462 | /* Too many begin notes. */ | |
3463 | if (block_stack || eh_stack) | |
3464 | abort (); | |
aeeeda03 MM |
3465 | } |
3466 | ||
23b2ce53 RS |
3467 | \f |
3468 | /* Emit an insn of given code and pattern | |
3469 | at a specified place within the doubly-linked list. */ | |
3470 | ||
3471 | /* Make an instruction with body PATTERN | |
3472 | and output it before the instruction BEFORE. */ | |
3473 | ||
3474 | rtx | |
3475 | emit_insn_before (pattern, before) | |
b3694847 | 3476 | rtx pattern, before; |
23b2ce53 | 3477 | { |
b3694847 | 3478 | rtx insn = before; |
23b2ce53 RS |
3479 | |
3480 | if (GET_CODE (pattern) == SEQUENCE) | |
3481 | { | |
b3694847 | 3482 | int i; |
23b2ce53 RS |
3483 | |
3484 | for (i = 0; i < XVECLEN (pattern, 0); i++) | |
3485 | { | |
3486 | insn = XVECEXP (pattern, 0, i); | |
a0ae8e8d | 3487 | add_insn_before (insn, before); |
23b2ce53 | 3488 | } |
23b2ce53 RS |
3489 | } |
3490 | else | |
3491 | { | |
4b1f5e8c | 3492 | insn = make_insn_raw (pattern); |
a0ae8e8d | 3493 | add_insn_before (insn, before); |
23b2ce53 RS |
3494 | } |
3495 | ||
3496 | return insn; | |
3497 | } | |
3498 | ||
3499 | /* Make an instruction with body PATTERN and code JUMP_INSN | |
3500 | and output it before the instruction BEFORE. */ | |
3501 | ||
3502 | rtx | |
3503 | emit_jump_insn_before (pattern, before) | |
b3694847 | 3504 | rtx pattern, before; |
23b2ce53 | 3505 | { |
b3694847 | 3506 | rtx insn; |
23b2ce53 RS |
3507 | |
3508 | if (GET_CODE (pattern) == SEQUENCE) | |
3509 | insn = emit_insn_before (pattern, before); | |
3510 | else | |
3511 | { | |
85cf32bc | 3512 | insn = make_jump_insn_raw (pattern); |
a0ae8e8d | 3513 | add_insn_before (insn, before); |
23b2ce53 RS |
3514 | } |
3515 | ||
3516 | return insn; | |
3517 | } | |
3518 | ||
3519 | /* Make an instruction with body PATTERN and code CALL_INSN | |
3520 | and output it before the instruction BEFORE. */ | |
3521 | ||
3522 | rtx | |
3523 | emit_call_insn_before (pattern, before) | |
b3694847 | 3524 | rtx pattern, before; |
23b2ce53 | 3525 | { |
b3694847 | 3526 | rtx insn; |
aff507f4 RK |
3527 | |
3528 | if (GET_CODE (pattern) == SEQUENCE) | |
3529 | insn = emit_insn_before (pattern, before); | |
3530 | else | |
3531 | { | |
3532 | insn = make_call_insn_raw (pattern); | |
a0ae8e8d | 3533 | add_insn_before (insn, before); |
aff507f4 RK |
3534 | PUT_CODE (insn, CALL_INSN); |
3535 | } | |
3536 | ||
23b2ce53 RS |
3537 | return insn; |
3538 | } | |
3539 | ||
3540 | /* Make an insn of code BARRIER | |
e881bb1b | 3541 | and output it before the insn BEFORE. */ |
23b2ce53 RS |
3542 | |
3543 | rtx | |
3544 | emit_barrier_before (before) | |
b3694847 | 3545 | rtx before; |
23b2ce53 | 3546 | { |
b3694847 | 3547 | rtx insn = rtx_alloc (BARRIER); |
23b2ce53 RS |
3548 | |
3549 | INSN_UID (insn) = cur_insn_uid++; | |
3550 | ||
a0ae8e8d | 3551 | add_insn_before (insn, before); |
23b2ce53 RS |
3552 | return insn; |
3553 | } | |
3554 | ||
e881bb1b RH |
3555 | /* Emit the label LABEL before the insn BEFORE. */ |
3556 | ||
3557 | rtx | |
3558 | emit_label_before (label, before) | |
3559 | rtx label, before; | |
3560 | { | |
3561 | /* This can be called twice for the same label as a result of the | |
3562 | confusion that follows a syntax error! So make it harmless. */ | |
3563 | if (INSN_UID (label) == 0) | |
3564 | { | |
3565 | INSN_UID (label) = cur_insn_uid++; | |
3566 | add_insn_before (label, before); | |
3567 | } | |
3568 | ||
3569 | return label; | |
3570 | } | |
3571 | ||
23b2ce53 RS |
3572 | /* Emit a note of subtype SUBTYPE before the insn BEFORE. */ |
3573 | ||
3574 | rtx | |
3575 | emit_note_before (subtype, before) | |
3576 | int subtype; | |
3577 | rtx before; | |
3578 | { | |
b3694847 | 3579 | rtx note = rtx_alloc (NOTE); |
23b2ce53 RS |
3580 | INSN_UID (note) = cur_insn_uid++; |
3581 | NOTE_SOURCE_FILE (note) = 0; | |
3582 | NOTE_LINE_NUMBER (note) = subtype; | |
3583 | ||
a0ae8e8d | 3584 | add_insn_before (note, before); |
23b2ce53 RS |
3585 | return note; |
3586 | } | |
3587 | \f | |
3588 | /* Make an insn of code INSN with body PATTERN | |
3589 | and output it after the insn AFTER. */ | |
3590 | ||
3591 | rtx | |
3592 | emit_insn_after (pattern, after) | |
b3694847 | 3593 | rtx pattern, after; |
23b2ce53 | 3594 | { |
b3694847 | 3595 | rtx insn = after; |
23b2ce53 RS |
3596 | |
3597 | if (GET_CODE (pattern) == SEQUENCE) | |
3598 | { | |
b3694847 | 3599 | int i; |
23b2ce53 RS |
3600 | |
3601 | for (i = 0; i < XVECLEN (pattern, 0); i++) | |
3602 | { | |
3603 | insn = XVECEXP (pattern, 0, i); | |
3604 | add_insn_after (insn, after); | |
3605 | after = insn; | |
3606 | } | |
23b2ce53 RS |
3607 | } |
3608 | else | |
3609 | { | |
4b1f5e8c | 3610 | insn = make_insn_raw (pattern); |
23b2ce53 RS |
3611 | add_insn_after (insn, after); |
3612 | } | |
3613 | ||
3614 | return insn; | |
3615 | } | |
3616 | ||
255680cf RK |
3617 | /* Similar to emit_insn_after, except that line notes are to be inserted so |
3618 | as to act as if this insn were at FROM. */ | |
3619 | ||
3620 | void | |
3621 | emit_insn_after_with_line_notes (pattern, after, from) | |
3622 | rtx pattern, after, from; | |
3623 | { | |
3624 | rtx from_line = find_line_note (from); | |
3625 | rtx after_line = find_line_note (after); | |
3626 | rtx insn = emit_insn_after (pattern, after); | |
3627 | ||
3628 | if (from_line) | |
3629 | emit_line_note_after (NOTE_SOURCE_FILE (from_line), | |
3630 | NOTE_LINE_NUMBER (from_line), | |
3631 | after); | |
3632 | ||
3633 | if (after_line) | |
3634 | emit_line_note_after (NOTE_SOURCE_FILE (after_line), | |
3635 | NOTE_LINE_NUMBER (after_line), | |
3636 | insn); | |
3637 | } | |
3638 | ||
23b2ce53 RS |
3639 | /* Make an insn of code JUMP_INSN with body PATTERN |
3640 | and output it after the insn AFTER. */ | |
3641 | ||
3642 | rtx | |
3643 | emit_jump_insn_after (pattern, after) | |
b3694847 | 3644 | rtx pattern, after; |
23b2ce53 | 3645 | { |
b3694847 | 3646 | rtx insn; |
23b2ce53 RS |
3647 | |
3648 | if (GET_CODE (pattern) == SEQUENCE) | |
3649 | insn = emit_insn_after (pattern, after); | |
3650 | else | |
3651 | { | |
85cf32bc | 3652 | insn = make_jump_insn_raw (pattern); |
23b2ce53 RS |
3653 | add_insn_after (insn, after); |
3654 | } | |
3655 | ||
3656 | return insn; | |
3657 | } | |
3658 | ||
3659 | /* Make an insn of code BARRIER | |
3660 | and output it after the insn AFTER. */ | |
3661 | ||
3662 | rtx | |
3663 | emit_barrier_after (after) | |
b3694847 | 3664 | rtx after; |
23b2ce53 | 3665 | { |
b3694847 | 3666 | rtx insn = rtx_alloc (BARRIER); |
23b2ce53 RS |
3667 | |
3668 | INSN_UID (insn) = cur_insn_uid++; | |
3669 | ||
3670 | add_insn_after (insn, after); | |
3671 | return insn; | |
3672 | } | |
3673 | ||
3674 | /* Emit the label LABEL after the insn AFTER. */ | |
3675 | ||
3676 | rtx | |
3677 | emit_label_after (label, after) | |
3678 | rtx label, after; | |
3679 | { | |
3680 | /* This can be called twice for the same label | |
3681 | as a result of the confusion that follows a syntax error! | |
3682 | So make it harmless. */ | |
3683 | if (INSN_UID (label) == 0) | |
3684 | { | |
3685 | INSN_UID (label) = cur_insn_uid++; | |
3686 | add_insn_after (label, after); | |
3687 | } | |
3688 | ||
3689 | return label; | |
3690 | } | |
3691 | ||
3692 | /* Emit a note of subtype SUBTYPE after the insn AFTER. */ | |
3693 | ||
3694 | rtx | |
3695 | emit_note_after (subtype, after) | |
3696 | int subtype; | |
3697 | rtx after; | |
3698 | { | |
b3694847 | 3699 | rtx note = rtx_alloc (NOTE); |
23b2ce53 RS |
3700 | INSN_UID (note) = cur_insn_uid++; |
3701 | NOTE_SOURCE_FILE (note) = 0; | |
3702 | NOTE_LINE_NUMBER (note) = subtype; | |
3703 | add_insn_after (note, after); | |
3704 | return note; | |
3705 | } | |
3706 | ||
3707 | /* Emit a line note for FILE and LINE after the insn AFTER. */ | |
3708 | ||
3709 | rtx | |
3710 | emit_line_note_after (file, line, after) | |
3cce094d | 3711 | const char *file; |
23b2ce53 RS |
3712 | int line; |
3713 | rtx after; | |
3714 | { | |
b3694847 | 3715 | rtx note; |
23b2ce53 RS |
3716 | |
3717 | if (no_line_numbers && line > 0) | |
3718 | { | |
3719 | cur_insn_uid++; | |
3720 | return 0; | |
3721 | } | |
3722 | ||
3723 | note = rtx_alloc (NOTE); | |
3724 | INSN_UID (note) = cur_insn_uid++; | |
3725 | NOTE_SOURCE_FILE (note) = file; | |
3726 | NOTE_LINE_NUMBER (note) = line; | |
3727 | add_insn_after (note, after); | |
3728 | return note; | |
3729 | } | |
3730 | \f | |
3731 | /* Make an insn of code INSN with pattern PATTERN | |
3732 | and add it to the end of the doubly-linked list. | |
3733 | If PATTERN is a SEQUENCE, take the elements of it | |
3734 | and emit an insn for each element. | |
3735 | ||
3736 | Returns the last insn emitted. */ | |
3737 | ||
3738 | rtx | |
3739 | emit_insn (pattern) | |
3740 | rtx pattern; | |
3741 | { | |
3742 | rtx insn = last_insn; | |
3743 | ||
3744 | if (GET_CODE (pattern) == SEQUENCE) | |
3745 | { | |
b3694847 | 3746 | int i; |
23b2ce53 RS |
3747 | |
3748 | for (i = 0; i < XVECLEN (pattern, 0); i++) | |
3749 | { | |
3750 | insn = XVECEXP (pattern, 0, i); | |
3751 | add_insn (insn); | |
3752 | } | |
23b2ce53 RS |
3753 | } |
3754 | else | |
3755 | { | |
4b1f5e8c | 3756 | insn = make_insn_raw (pattern); |
23b2ce53 RS |
3757 | add_insn (insn); |
3758 | } | |
3759 | ||
3760 | return insn; | |
3761 | } | |
3762 | ||
3763 | /* Emit the insns in a chain starting with INSN. | |
3764 | Return the last insn emitted. */ | |
3765 | ||
3766 | rtx | |
3767 | emit_insns (insn) | |
3768 | rtx insn; | |
3769 | { | |
3770 | rtx last = 0; | |
3771 | ||
3772 | while (insn) | |
3773 | { | |
3774 | rtx next = NEXT_INSN (insn); | |
3775 | add_insn (insn); | |
3776 | last = insn; | |
3777 | insn = next; | |
3778 | } | |
3779 | ||
3780 | return last; | |
3781 | } | |
3782 | ||
3783 | /* Emit the insns in a chain starting with INSN and place them in front of | |
3784 | the insn BEFORE. Return the last insn emitted. */ | |
3785 | ||
3786 | rtx | |
3787 | emit_insns_before (insn, before) | |
3788 | rtx insn; | |
3789 | rtx before; | |
3790 | { | |
3791 | rtx last = 0; | |
3792 | ||
3793 | while (insn) | |
3794 | { | |
3795 | rtx next = NEXT_INSN (insn); | |
a0ae8e8d | 3796 | add_insn_before (insn, before); |
23b2ce53 RS |
3797 | last = insn; |
3798 | insn = next; | |
3799 | } | |
3800 | ||
3801 | return last; | |
3802 | } | |
3803 | ||
e0a5c5eb RS |
3804 | /* Emit the insns in a chain starting with FIRST and place them in back of |
3805 | the insn AFTER. Return the last insn emitted. */ | |
3806 | ||
3807 | rtx | |
3808 | emit_insns_after (first, after) | |
b3694847 SS |
3809 | rtx first; |
3810 | rtx after; | |
e0a5c5eb | 3811 | { |
b3694847 SS |
3812 | rtx last; |
3813 | rtx after_after; | |
3c030e88 | 3814 | basic_block bb; |
e0a5c5eb RS |
3815 | |
3816 | if (!after) | |
3817 | abort (); | |
3818 | ||
3819 | if (!first) | |
ca6c03ca | 3820 | return after; |
e0a5c5eb | 3821 | |
3c030e88 JH |
3822 | if (basic_block_for_insn |
3823 | && (unsigned int)INSN_UID (after) < basic_block_for_insn->num_elements | |
3824 | && (bb = BLOCK_FOR_INSN (after))) | |
3825 | { | |
3826 | for (last = first; NEXT_INSN (last); last = NEXT_INSN (last)) | |
3827 | set_block_for_insn (last, bb); | |
3828 | set_block_for_insn (last, bb); | |
3829 | if (bb->end == after) | |
3830 | bb->end = last; | |
3831 | } | |
3832 | else | |
3833 | for (last = first; NEXT_INSN (last); last = NEXT_INSN (last)) | |
3834 | continue; | |
e0a5c5eb RS |
3835 | |
3836 | after_after = NEXT_INSN (after); | |
3837 | ||
3838 | NEXT_INSN (after) = first; | |
3839 | PREV_INSN (first) = after; | |
3840 | NEXT_INSN (last) = after_after; | |
3841 | if (after_after) | |
3842 | PREV_INSN (after_after) = last; | |
3843 | ||
c4d990db RS |
3844 | if (after == last_insn) |
3845 | last_insn = last; | |
e0a5c5eb RS |
3846 | return last; |
3847 | } | |
3848 | ||
23b2ce53 RS |
3849 | /* Make an insn of code JUMP_INSN with pattern PATTERN |
3850 | and add it to the end of the doubly-linked list. */ | |
3851 | ||
3852 | rtx | |
3853 | emit_jump_insn (pattern) | |
3854 | rtx pattern; | |
3855 | { | |
3856 | if (GET_CODE (pattern) == SEQUENCE) | |
3857 | return emit_insn (pattern); | |
3858 | else | |
3859 | { | |
b3694847 | 3860 | rtx insn = make_jump_insn_raw (pattern); |
23b2ce53 RS |
3861 | add_insn (insn); |
3862 | return insn; | |
3863 | } | |
3864 | } | |
3865 | ||
3866 | /* Make an insn of code CALL_INSN with pattern PATTERN | |
3867 | and add it to the end of the doubly-linked list. */ | |
3868 | ||
3869 | rtx | |
3870 | emit_call_insn (pattern) | |
3871 | rtx pattern; | |
3872 | { | |
3873 | if (GET_CODE (pattern) == SEQUENCE) | |
3874 | return emit_insn (pattern); | |
3875 | else | |
3876 | { | |
b3694847 | 3877 | rtx insn = make_call_insn_raw (pattern); |
23b2ce53 RS |
3878 | add_insn (insn); |
3879 | PUT_CODE (insn, CALL_INSN); | |
3880 | return insn; | |
3881 | } | |
3882 | } | |
3883 | ||
3884 | /* Add the label LABEL to the end of the doubly-linked list. */ | |
3885 | ||
3886 | rtx | |
3887 | emit_label (label) | |
3888 | rtx label; | |
3889 | { | |
3890 | /* This can be called twice for the same label | |
3891 | as a result of the confusion that follows a syntax error! | |
3892 | So make it harmless. */ | |
3893 | if (INSN_UID (label) == 0) | |
3894 | { | |
3895 | INSN_UID (label) = cur_insn_uid++; | |
3896 | add_insn (label); | |
3897 | } | |
3898 | return label; | |
3899 | } | |
3900 | ||
3901 | /* Make an insn of code BARRIER | |
3902 | and add it to the end of the doubly-linked list. */ | |
3903 | ||
3904 | rtx | |
3905 | emit_barrier () | |
3906 | { | |
b3694847 | 3907 | rtx barrier = rtx_alloc (BARRIER); |
23b2ce53 RS |
3908 | INSN_UID (barrier) = cur_insn_uid++; |
3909 | add_insn (barrier); | |
3910 | return barrier; | |
3911 | } | |
3912 | ||
3913 | /* Make an insn of code NOTE | |
3914 | with data-fields specified by FILE and LINE | |
3915 | and add it to the end of the doubly-linked list, | |
3916 | but only if line-numbers are desired for debugging info. */ | |
3917 | ||
3918 | rtx | |
3919 | emit_line_note (file, line) | |
3cce094d | 3920 | const char *file; |
23b2ce53 RS |
3921 | int line; |
3922 | { | |
3f1d071b | 3923 | set_file_and_line_for_stmt (file, line); |
23b2ce53 RS |
3924 | |
3925 | #if 0 | |
3926 | if (no_line_numbers) | |
3927 | return 0; | |
3928 | #endif | |
3929 | ||
3930 | return emit_note (file, line); | |
3931 | } | |
3932 | ||
3933 | /* Make an insn of code NOTE | |
3934 | with data-fields specified by FILE and LINE | |
3935 | and add it to the end of the doubly-linked list. | |
3936 | If it is a line-number NOTE, omit it if it matches the previous one. */ | |
3937 | ||
3938 | rtx | |
3939 | emit_note (file, line) | |
3cce094d | 3940 | const char *file; |
23b2ce53 RS |
3941 | int line; |
3942 | { | |
b3694847 | 3943 | rtx note; |
23b2ce53 RS |
3944 | |
3945 | if (line > 0) | |
3946 | { | |
3947 | if (file && last_filename && !strcmp (file, last_filename) | |
3948 | && line == last_linenum) | |
3949 | return 0; | |
3950 | last_filename = file; | |
3951 | last_linenum = line; | |
3952 | } | |
3953 | ||
3954 | if (no_line_numbers && line > 0) | |
3955 | { | |
3956 | cur_insn_uid++; | |
3957 | return 0; | |
3958 | } | |
3959 | ||
3960 | note = rtx_alloc (NOTE); | |
3961 | INSN_UID (note) = cur_insn_uid++; | |
3962 | NOTE_SOURCE_FILE (note) = file; | |
3963 | NOTE_LINE_NUMBER (note) = line; | |
3964 | add_insn (note); | |
3965 | return note; | |
3966 | } | |
3967 | ||
fe77a034 | 3968 | /* Emit a NOTE, and don't omit it even if LINE is the previous note. */ |
23b2ce53 RS |
3969 | |
3970 | rtx | |
3971 | emit_line_note_force (file, line) | |
3cce094d | 3972 | const char *file; |
23b2ce53 RS |
3973 | int line; |
3974 | { | |
3975 | last_linenum = -1; | |
3976 | return emit_line_note (file, line); | |
3977 | } | |
3978 | ||
3979 | /* Cause next statement to emit a line note even if the line number | |
3980 | has not changed. This is used at the beginning of a function. */ | |
3981 | ||
3982 | void | |
3983 | force_next_line_note () | |
3984 | { | |
3985 | last_linenum = -1; | |
3986 | } | |
87b47c85 AM |
3987 | |
3988 | /* Place a note of KIND on insn INSN with DATUM as the datum. If a | |
30f7a378 | 3989 | note of this type already exists, remove it first. */ |
87b47c85 | 3990 | |
3d238248 | 3991 | rtx |
87b47c85 AM |
3992 | set_unique_reg_note (insn, kind, datum) |
3993 | rtx insn; | |
3994 | enum reg_note kind; | |
3995 | rtx datum; | |
3996 | { | |
3997 | rtx note = find_reg_note (insn, kind, NULL_RTX); | |
3998 | ||
3d238248 JJ |
3999 | /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes. |
4000 | It serves no useful purpose and breaks eliminate_regs. */ | |
4001 | if ((kind == REG_EQUAL || kind == REG_EQUIV) | |
4002 | && GET_CODE (datum) == ASM_OPERANDS) | |
4003 | return NULL_RTX; | |
4004 | ||
750c9258 | 4005 | if (note) |
3d238248 JJ |
4006 | { |
4007 | XEXP (note, 0) = datum; | |
4008 | return note; | |
4009 | } | |
87b47c85 AM |
4010 | |
4011 | REG_NOTES (insn) = gen_rtx_EXPR_LIST (kind, datum, REG_NOTES (insn)); | |
3d238248 | 4012 | return REG_NOTES (insn); |
87b47c85 | 4013 | } |
23b2ce53 RS |
4014 | \f |
4015 | /* Return an indication of which type of insn should have X as a body. | |
4016 | The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */ | |
4017 | ||
4018 | enum rtx_code | |
4019 | classify_insn (x) | |
4020 | rtx x; | |
4021 | { | |
4022 | if (GET_CODE (x) == CODE_LABEL) | |
4023 | return CODE_LABEL; | |
4024 | if (GET_CODE (x) == CALL) | |
4025 | return CALL_INSN; | |
4026 | if (GET_CODE (x) == RETURN) | |
4027 | return JUMP_INSN; | |
4028 | if (GET_CODE (x) == SET) | |
4029 | { | |
4030 | if (SET_DEST (x) == pc_rtx) | |
4031 | return JUMP_INSN; | |
4032 | else if (GET_CODE (SET_SRC (x)) == CALL) | |
4033 | return CALL_INSN; | |
4034 | else | |
4035 | return INSN; | |
4036 | } | |
4037 | if (GET_CODE (x) == PARALLEL) | |
4038 | { | |
b3694847 | 4039 | int j; |
23b2ce53 RS |
4040 | for (j = XVECLEN (x, 0) - 1; j >= 0; j--) |
4041 | if (GET_CODE (XVECEXP (x, 0, j)) == CALL) | |
4042 | return CALL_INSN; | |
4043 | else if (GET_CODE (XVECEXP (x, 0, j)) == SET | |
4044 | && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx) | |
4045 | return JUMP_INSN; | |
4046 | else if (GET_CODE (XVECEXP (x, 0, j)) == SET | |
4047 | && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL) | |
4048 | return CALL_INSN; | |
4049 | } | |
4050 | return INSN; | |
4051 | } | |
4052 | ||
4053 | /* Emit the rtl pattern X as an appropriate kind of insn. | |
4054 | If X is a label, it is simply added into the insn chain. */ | |
4055 | ||
4056 | rtx | |
4057 | emit (x) | |
4058 | rtx x; | |
4059 | { | |
4060 | enum rtx_code code = classify_insn (x); | |
4061 | ||
4062 | if (code == CODE_LABEL) | |
4063 | return emit_label (x); | |
4064 | else if (code == INSN) | |
4065 | return emit_insn (x); | |
4066 | else if (code == JUMP_INSN) | |
4067 | { | |
b3694847 | 4068 | rtx insn = emit_jump_insn (x); |
7f1c097d | 4069 | if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN) |
23b2ce53 RS |
4070 | return emit_barrier (); |
4071 | return insn; | |
4072 | } | |
4073 | else if (code == CALL_INSN) | |
4074 | return emit_call_insn (x); | |
4075 | else | |
4076 | abort (); | |
4077 | } | |
4078 | \f | |
5c7a310f MM |
4079 | /* Begin emitting insns to a sequence which can be packaged in an |
4080 | RTL_EXPR. If this sequence will contain something that might cause | |
4081 | the compiler to pop arguments to function calls (because those | |
4082 | pops have previously been deferred; see INHIBIT_DEFER_POP for more | |
4083 | details), use do_pending_stack_adjust before calling this function. | |
4084 | That will ensure that the deferred pops are not accidentally | |
4eb00163 | 4085 | emitted in the middle of this sequence. */ |
23b2ce53 RS |
4086 | |
4087 | void | |
4088 | start_sequence () | |
4089 | { | |
4090 | struct sequence_stack *tem; | |
4091 | ||
a3770a81 | 4092 | tem = (struct sequence_stack *) xmalloc (sizeof (struct sequence_stack)); |
23b2ce53 | 4093 | |
49ad7cfa | 4094 | tem->next = seq_stack; |
23b2ce53 RS |
4095 | tem->first = first_insn; |
4096 | tem->last = last_insn; | |
591ccf92 | 4097 | tem->sequence_rtl_expr = seq_rtl_expr; |
23b2ce53 | 4098 | |
49ad7cfa | 4099 | seq_stack = tem; |
23b2ce53 RS |
4100 | |
4101 | first_insn = 0; | |
4102 | last_insn = 0; | |
4103 | } | |
4104 | ||
591ccf92 MM |
4105 | /* Similarly, but indicate that this sequence will be placed in T, an |
4106 | RTL_EXPR. See the documentation for start_sequence for more | |
4107 | information about how to use this function. */ | |
4108 | ||
4109 | void | |
4110 | start_sequence_for_rtl_expr (t) | |
4111 | tree t; | |
4112 | { | |
4113 | start_sequence (); | |
4114 | ||
4115 | seq_rtl_expr = t; | |
4116 | } | |
4117 | ||
5c7a310f MM |
4118 | /* Set up the insn chain starting with FIRST as the current sequence, |
4119 | saving the previously current one. See the documentation for | |
4120 | start_sequence for more information about how to use this function. */ | |
23b2ce53 RS |
4121 | |
4122 | void | |
4123 | push_to_sequence (first) | |
4124 | rtx first; | |
4125 | { | |
4126 | rtx last; | |
4127 | ||
4128 | start_sequence (); | |
4129 | ||
4130 | for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last)); | |
4131 | ||
4132 | first_insn = first; | |
4133 | last_insn = last; | |
4134 | } | |
4135 | ||
c14f7160 ML |
4136 | /* Set up the insn chain from a chain stort in FIRST to LAST. */ |
4137 | ||
4138 | void | |
4139 | push_to_full_sequence (first, last) | |
4140 | rtx first, last; | |
4141 | { | |
4142 | start_sequence (); | |
4143 | first_insn = first; | |
4144 | last_insn = last; | |
4145 | /* We really should have the end of the insn chain here. */ | |
4146 | if (last && NEXT_INSN (last)) | |
4147 | abort (); | |
4148 | } | |
4149 | ||
f15ae3a1 TW |
4150 | /* Set up the outer-level insn chain |
4151 | as the current sequence, saving the previously current one. */ | |
4152 | ||
4153 | void | |
4154 | push_topmost_sequence () | |
4155 | { | |
aefdd5ab | 4156 | struct sequence_stack *stack, *top = NULL; |
f15ae3a1 TW |
4157 | |
4158 | start_sequence (); | |
4159 | ||
49ad7cfa | 4160 | for (stack = seq_stack; stack; stack = stack->next) |
f15ae3a1 TW |
4161 | top = stack; |
4162 | ||
4163 | first_insn = top->first; | |
4164 | last_insn = top->last; | |
591ccf92 | 4165 | seq_rtl_expr = top->sequence_rtl_expr; |
f15ae3a1 TW |
4166 | } |
4167 | ||
4168 | /* After emitting to the outer-level insn chain, update the outer-level | |
4169 | insn chain, and restore the previous saved state. */ | |
4170 | ||
4171 | void | |
4172 | pop_topmost_sequence () | |
4173 | { | |
aefdd5ab | 4174 | struct sequence_stack *stack, *top = NULL; |
f15ae3a1 | 4175 | |
49ad7cfa | 4176 | for (stack = seq_stack; stack; stack = stack->next) |
f15ae3a1 TW |
4177 | top = stack; |
4178 | ||
4179 | top->first = first_insn; | |
4180 | top->last = last_insn; | |
591ccf92 | 4181 | /* ??? Why don't we save seq_rtl_expr here? */ |
f15ae3a1 TW |
4182 | |
4183 | end_sequence (); | |
4184 | } | |
4185 | ||
23b2ce53 RS |
4186 | /* After emitting to a sequence, restore previous saved state. |
4187 | ||
5c7a310f | 4188 | To get the contents of the sequence just made, you must call |
750c9258 | 4189 | `gen_sequence' *before* calling here. |
5c7a310f MM |
4190 | |
4191 | If the compiler might have deferred popping arguments while | |
4192 | generating this sequence, and this sequence will not be immediately | |
4193 | inserted into the instruction stream, use do_pending_stack_adjust | |
4194 | before calling gen_sequence. That will ensure that the deferred | |
4195 | pops are inserted into this sequence, and not into some random | |
4196 | location in the instruction stream. See INHIBIT_DEFER_POP for more | |
4197 | information about deferred popping of arguments. */ | |
23b2ce53 RS |
4198 | |
4199 | void | |
4200 | end_sequence () | |
4201 | { | |
49ad7cfa | 4202 | struct sequence_stack *tem = seq_stack; |
23b2ce53 RS |
4203 | |
4204 | first_insn = tem->first; | |
4205 | last_insn = tem->last; | |
591ccf92 | 4206 | seq_rtl_expr = tem->sequence_rtl_expr; |
49ad7cfa | 4207 | seq_stack = tem->next; |
23b2ce53 | 4208 | |
a3770a81 | 4209 | free (tem); |
23b2ce53 RS |
4210 | } |
4211 | ||
c14f7160 ML |
4212 | /* This works like end_sequence, but records the old sequence in FIRST |
4213 | and LAST. */ | |
4214 | ||
4215 | void | |
4216 | end_full_sequence (first, last) | |
4217 | rtx *first, *last; | |
4218 | { | |
4219 | *first = first_insn; | |
4220 | *last = last_insn; | |
4221 | end_sequence(); | |
4222 | } | |
4223 | ||
23b2ce53 RS |
4224 | /* Return 1 if currently emitting into a sequence. */ |
4225 | ||
4226 | int | |
4227 | in_sequence_p () | |
4228 | { | |
49ad7cfa | 4229 | return seq_stack != 0; |
23b2ce53 RS |
4230 | } |
4231 | ||
4232 | /* Generate a SEQUENCE rtx containing the insns already emitted | |
4233 | to the current sequence. | |
4234 | ||
4235 | This is how the gen_... function from a DEFINE_EXPAND | |
4236 | constructs the SEQUENCE that it returns. */ | |
4237 | ||
4238 | rtx | |
4239 | gen_sequence () | |
4240 | { | |
4241 | rtx result; | |
4242 | rtx tem; | |
23b2ce53 RS |
4243 | int i; |
4244 | int len; | |
4245 | ||
4246 | /* Count the insns in the chain. */ | |
4247 | len = 0; | |
4248 | for (tem = first_insn; tem; tem = NEXT_INSN (tem)) | |
4249 | len++; | |
4250 | ||
ee265800 | 4251 | /* If only one insn, return it rather than a SEQUENCE. |
23b2ce53 | 4252 | (Now that we cache SEQUENCE expressions, it isn't worth special-casing |
750c9258 | 4253 | the case of an empty list.) |
ee265800 AH |
4254 | We only return the pattern of an insn if its code is INSN and it |
4255 | has no notes. This ensures that no information gets lost. */ | |
23b2ce53 | 4256 | if (len == 1 |
ca55abae | 4257 | && ! RTX_FRAME_RELATED_P (first_insn) |
ee265800 | 4258 | && GET_CODE (first_insn) == INSN |
30f7a378 | 4259 | /* Don't throw away any reg notes. */ |
ee265800 | 4260 | && REG_NOTES (first_insn) == 0) |
1f8f4a0b | 4261 | return PATTERN (first_insn); |
23b2ce53 | 4262 | |
1f8f4a0b | 4263 | result = gen_rtx_SEQUENCE (VOIDmode, rtvec_alloc (len)); |
23b2ce53 RS |
4264 | |
4265 | for (i = 0, tem = first_insn; tem; tem = NEXT_INSN (tem), i++) | |
4266 | XVECEXP (result, 0, i) = tem; | |
4267 | ||
4268 | return result; | |
4269 | } | |
4270 | \f | |
59ec66dc MM |
4271 | /* Put the various virtual registers into REGNO_REG_RTX. */ |
4272 | ||
4273 | void | |
49ad7cfa BS |
4274 | init_virtual_regs (es) |
4275 | struct emit_status *es; | |
59ec66dc | 4276 | { |
49ad7cfa BS |
4277 | rtx *ptr = es->x_regno_reg_rtx; |
4278 | ptr[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx; | |
4279 | ptr[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx; | |
4280 | ptr[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx; | |
4281 | ptr[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx; | |
4282 | ptr[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx; | |
4283 | } | |
4284 | ||
4285 | void | |
4286 | clear_emit_caches () | |
4287 | { | |
4288 | int i; | |
4289 | ||
4290 | /* Clear the start_sequence/gen_sequence cache. */ | |
49ad7cfa BS |
4291 | for (i = 0; i < SEQUENCE_RESULT_SIZE; i++) |
4292 | sequence_result[i] = 0; | |
4293 | free_insn = 0; | |
59ec66dc | 4294 | } |
da43a810 BS |
4295 | \f |
4296 | /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */ | |
4297 | static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS]; | |
4298 | static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS]; | |
4299 | static int copy_insn_n_scratches; | |
4300 | ||
4301 | /* When an insn is being copied by copy_insn_1, this is nonzero if we have | |
4302 | copied an ASM_OPERANDS. | |
4303 | In that case, it is the original input-operand vector. */ | |
4304 | static rtvec orig_asm_operands_vector; | |
4305 | ||
4306 | /* When an insn is being copied by copy_insn_1, this is nonzero if we have | |
4307 | copied an ASM_OPERANDS. | |
4308 | In that case, it is the copied input-operand vector. */ | |
4309 | static rtvec copy_asm_operands_vector; | |
4310 | ||
4311 | /* Likewise for the constraints vector. */ | |
4312 | static rtvec orig_asm_constraints_vector; | |
4313 | static rtvec copy_asm_constraints_vector; | |
4314 | ||
4315 | /* Recursively create a new copy of an rtx for copy_insn. | |
4316 | This function differs from copy_rtx in that it handles SCRATCHes and | |
4317 | ASM_OPERANDs properly. | |
4318 | Normally, this function is not used directly; use copy_insn as front end. | |
4319 | However, you could first copy an insn pattern with copy_insn and then use | |
4320 | this function afterwards to properly copy any REG_NOTEs containing | |
4321 | SCRATCHes. */ | |
4322 | ||
4323 | rtx | |
4324 | copy_insn_1 (orig) | |
b3694847 | 4325 | rtx orig; |
da43a810 | 4326 | { |
b3694847 SS |
4327 | rtx copy; |
4328 | int i, j; | |
4329 | RTX_CODE code; | |
4330 | const char *format_ptr; | |
da43a810 BS |
4331 | |
4332 | code = GET_CODE (orig); | |
4333 | ||
4334 | switch (code) | |
4335 | { | |
4336 | case REG: | |
4337 | case QUEUED: | |
4338 | case CONST_INT: | |
4339 | case CONST_DOUBLE: | |
4340 | case SYMBOL_REF: | |
4341 | case CODE_LABEL: | |
4342 | case PC: | |
4343 | case CC0: | |
4344 | case ADDRESSOF: | |
4345 | return orig; | |
4346 | ||
4347 | case SCRATCH: | |
4348 | for (i = 0; i < copy_insn_n_scratches; i++) | |
4349 | if (copy_insn_scratch_in[i] == orig) | |
4350 | return copy_insn_scratch_out[i]; | |
4351 | break; | |
4352 | ||
4353 | case CONST: | |
4354 | /* CONST can be shared if it contains a SYMBOL_REF. If it contains | |
4355 | a LABEL_REF, it isn't sharable. */ | |
4356 | if (GET_CODE (XEXP (orig, 0)) == PLUS | |
4357 | && GET_CODE (XEXP (XEXP (orig, 0), 0)) == SYMBOL_REF | |
4358 | && GET_CODE (XEXP (XEXP (orig, 0), 1)) == CONST_INT) | |
4359 | return orig; | |
4360 | break; | |
750c9258 | 4361 | |
da43a810 BS |
4362 | /* A MEM with a constant address is not sharable. The problem is that |
4363 | the constant address may need to be reloaded. If the mem is shared, | |
4364 | then reloading one copy of this mem will cause all copies to appear | |
4365 | to have been reloaded. */ | |
4366 | ||
4367 | default: | |
4368 | break; | |
4369 | } | |
4370 | ||
4371 | copy = rtx_alloc (code); | |
4372 | ||
4373 | /* Copy the various flags, and other information. We assume that | |
4374 | all fields need copying, and then clear the fields that should | |
4375 | not be copied. That is the sensible default behavior, and forces | |
4376 | us to explicitly document why we are *not* copying a flag. */ | |
4377 | memcpy (copy, orig, sizeof (struct rtx_def) - sizeof (rtunion)); | |
4378 | ||
4379 | /* We do not copy the USED flag, which is used as a mark bit during | |
4380 | walks over the RTL. */ | |
4381 | copy->used = 0; | |
4382 | ||
4383 | /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */ | |
4384 | if (GET_RTX_CLASS (code) == 'i') | |
4385 | { | |
4386 | copy->jump = 0; | |
4387 | copy->call = 0; | |
4388 | copy->frame_related = 0; | |
4389 | } | |
750c9258 | 4390 | |
da43a810 BS |
4391 | format_ptr = GET_RTX_FORMAT (GET_CODE (copy)); |
4392 | ||
4393 | for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++) | |
4394 | { | |
e63db8f6 | 4395 | copy->fld[i] = orig->fld[i]; |
da43a810 BS |
4396 | switch (*format_ptr++) |
4397 | { | |
4398 | case 'e': | |
da43a810 BS |
4399 | if (XEXP (orig, i) != NULL) |
4400 | XEXP (copy, i) = copy_insn_1 (XEXP (orig, i)); | |
4401 | break; | |
4402 | ||
da43a810 BS |
4403 | case 'E': |
4404 | case 'V': | |
da43a810 BS |
4405 | if (XVEC (orig, i) == orig_asm_constraints_vector) |
4406 | XVEC (copy, i) = copy_asm_constraints_vector; | |
4407 | else if (XVEC (orig, i) == orig_asm_operands_vector) | |
4408 | XVEC (copy, i) = copy_asm_operands_vector; | |
4409 | else if (XVEC (orig, i) != NULL) | |
4410 | { | |
4411 | XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i)); | |
4412 | for (j = 0; j < XVECLEN (copy, i); j++) | |
4413 | XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j)); | |
4414 | } | |
4415 | break; | |
4416 | ||
da43a810 | 4417 | case 't': |
da43a810 | 4418 | case 'w': |
da43a810 | 4419 | case 'i': |
da43a810 BS |
4420 | case 's': |
4421 | case 'S': | |
e63db8f6 BS |
4422 | case 'u': |
4423 | case '0': | |
4424 | /* These are left unchanged. */ | |
da43a810 BS |
4425 | break; |
4426 | ||
4427 | default: | |
4428 | abort (); | |
4429 | } | |
4430 | } | |
4431 | ||
4432 | if (code == SCRATCH) | |
4433 | { | |
4434 | i = copy_insn_n_scratches++; | |
4435 | if (i >= MAX_RECOG_OPERANDS) | |
4436 | abort (); | |
4437 | copy_insn_scratch_in[i] = orig; | |
4438 | copy_insn_scratch_out[i] = copy; | |
4439 | } | |
4440 | else if (code == ASM_OPERANDS) | |
4441 | { | |
6462bb43 AO |
4442 | orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig); |
4443 | copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy); | |
4444 | orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig); | |
4445 | copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy); | |
da43a810 BS |
4446 | } |
4447 | ||
4448 | return copy; | |
4449 | } | |
4450 | ||
4451 | /* Create a new copy of an rtx. | |
4452 | This function differs from copy_rtx in that it handles SCRATCHes and | |
4453 | ASM_OPERANDs properly. | |
4454 | INSN doesn't really have to be a full INSN; it could be just the | |
4455 | pattern. */ | |
4456 | rtx | |
4457 | copy_insn (insn) | |
4458 | rtx insn; | |
4459 | { | |
4460 | copy_insn_n_scratches = 0; | |
4461 | orig_asm_operands_vector = 0; | |
4462 | orig_asm_constraints_vector = 0; | |
4463 | copy_asm_operands_vector = 0; | |
4464 | copy_asm_constraints_vector = 0; | |
4465 | return copy_insn_1 (insn); | |
4466 | } | |
59ec66dc | 4467 | |
23b2ce53 RS |
4468 | /* Initialize data structures and variables in this file |
4469 | before generating rtl for each function. */ | |
4470 | ||
4471 | void | |
4472 | init_emit () | |
4473 | { | |
01d939e8 | 4474 | struct function *f = cfun; |
23b2ce53 | 4475 | |
49ad7cfa | 4476 | f->emit = (struct emit_status *) xmalloc (sizeof (struct emit_status)); |
23b2ce53 RS |
4477 | first_insn = NULL; |
4478 | last_insn = NULL; | |
591ccf92 | 4479 | seq_rtl_expr = NULL; |
23b2ce53 RS |
4480 | cur_insn_uid = 1; |
4481 | reg_rtx_no = LAST_VIRTUAL_REGISTER + 1; | |
4482 | last_linenum = 0; | |
4483 | last_filename = 0; | |
4484 | first_label_num = label_num; | |
4485 | last_label_num = 0; | |
49ad7cfa | 4486 | seq_stack = NULL; |
23b2ce53 | 4487 | |
49ad7cfa | 4488 | clear_emit_caches (); |
23b2ce53 RS |
4489 | |
4490 | /* Init the tables that describe all the pseudo regs. */ | |
4491 | ||
3502dc9c | 4492 | f->emit->regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101; |
23b2ce53 | 4493 | |
49ad7cfa | 4494 | f->emit->regno_pointer_align |
3502dc9c | 4495 | = (unsigned char *) xcalloc (f->emit->regno_pointer_align_length, |
f9e158c3 | 4496 | sizeof (unsigned char)); |
86fe05e0 | 4497 | |
750c9258 | 4498 | regno_reg_rtx |
0d4903b8 RK |
4499 | = (rtx *) xcalloc (f->emit->regno_pointer_align_length, sizeof (rtx)); |
4500 | ||
4501 | f->emit->regno_decl | |
4502 | = (tree *) xcalloc (f->emit->regno_pointer_align_length, sizeof (tree)); | |
23b2ce53 RS |
4503 | |
4504 | /* Put copies of all the virtual register rtx into regno_reg_rtx. */ | |
49ad7cfa | 4505 | init_virtual_regs (f->emit); |
740ab4a2 RK |
4506 | |
4507 | /* Indicate that the virtual registers and stack locations are | |
4508 | all pointers. */ | |
3502dc9c JDA |
4509 | REG_POINTER (stack_pointer_rtx) = 1; |
4510 | REG_POINTER (frame_pointer_rtx) = 1; | |
4511 | REG_POINTER (hard_frame_pointer_rtx) = 1; | |
4512 | REG_POINTER (arg_pointer_rtx) = 1; | |
740ab4a2 | 4513 | |
3502dc9c JDA |
4514 | REG_POINTER (virtual_incoming_args_rtx) = 1; |
4515 | REG_POINTER (virtual_stack_vars_rtx) = 1; | |
4516 | REG_POINTER (virtual_stack_dynamic_rtx) = 1; | |
4517 | REG_POINTER (virtual_outgoing_args_rtx) = 1; | |
4518 | REG_POINTER (virtual_cfa_rtx) = 1; | |
5e82e7bd | 4519 | |
86fe05e0 | 4520 | #ifdef STACK_BOUNDARY |
bdb429a5 RK |
4521 | REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY; |
4522 | REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY; | |
4523 | REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY; | |
4524 | REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY; | |
4525 | ||
4526 | REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY; | |
4527 | REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY; | |
4528 | REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY; | |
4529 | REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY; | |
4530 | REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD; | |
86fe05e0 RK |
4531 | #endif |
4532 | ||
5e82e7bd JVA |
4533 | #ifdef INIT_EXPANDERS |
4534 | INIT_EXPANDERS; | |
4535 | #endif | |
23b2ce53 RS |
4536 | } |
4537 | ||
87ff9c8e RH |
4538 | /* Mark SS for GC. */ |
4539 | ||
4540 | static void | |
4541 | mark_sequence_stack (ss) | |
4542 | struct sequence_stack *ss; | |
4543 | { | |
4544 | while (ss) | |
4545 | { | |
4546 | ggc_mark_rtx (ss->first); | |
591ccf92 | 4547 | ggc_mark_tree (ss->sequence_rtl_expr); |
87ff9c8e RH |
4548 | ss = ss->next; |
4549 | } | |
4550 | } | |
4551 | ||
4552 | /* Mark ES for GC. */ | |
4553 | ||
4554 | void | |
fa51b01b | 4555 | mark_emit_status (es) |
87ff9c8e RH |
4556 | struct emit_status *es; |
4557 | { | |
4558 | rtx *r; | |
0d4903b8 | 4559 | tree *t; |
87ff9c8e RH |
4560 | int i; |
4561 | ||
4562 | if (es == 0) | |
4563 | return; | |
4564 | ||
0d4903b8 RK |
4565 | for (i = es->regno_pointer_align_length, r = es->x_regno_reg_rtx, |
4566 | t = es->regno_decl; | |
4567 | i > 0; --i, ++r, ++t) | |
4568 | { | |
4569 | ggc_mark_rtx (*r); | |
4570 | ggc_mark_tree (*t); | |
4571 | } | |
87ff9c8e RH |
4572 | |
4573 | mark_sequence_stack (es->sequence_stack); | |
591ccf92 | 4574 | ggc_mark_tree (es->sequence_rtl_expr); |
87ff9c8e RH |
4575 | ggc_mark_rtx (es->x_first_insn); |
4576 | } | |
4577 | ||
23b2ce53 RS |
4578 | /* Create some permanent unique rtl objects shared between all functions. |
4579 | LINE_NUMBERS is nonzero if line numbers are to be generated. */ | |
4580 | ||
4581 | void | |
4582 | init_emit_once (line_numbers) | |
4583 | int line_numbers; | |
4584 | { | |
4585 | int i; | |
4586 | enum machine_mode mode; | |
9ec36da5 | 4587 | enum machine_mode double_mode; |
23b2ce53 | 4588 | |
173b24b9 | 4589 | /* Initialize the CONST_INT and memory attribute hash tables. */ |
750c9258 | 4590 | const_int_htab = htab_create (37, const_int_htab_hash, |
67673f5c | 4591 | const_int_htab_eq, NULL); |
173b24b9 RK |
4592 | ggc_add_deletable_htab (const_int_htab, 0, 0); |
4593 | ||
4594 | mem_attrs_htab = htab_create (37, mem_attrs_htab_hash, | |
4595 | mem_attrs_htab_eq, NULL); | |
4596 | ggc_add_deletable_htab (mem_attrs_htab, 0, mem_attrs_mark); | |
67673f5c | 4597 | |
23b2ce53 RS |
4598 | no_line_numbers = ! line_numbers; |
4599 | ||
43fa6302 AS |
4600 | /* Compute the word and byte modes. */ |
4601 | ||
4602 | byte_mode = VOIDmode; | |
4603 | word_mode = VOIDmode; | |
4604 | double_mode = VOIDmode; | |
4605 | ||
4606 | for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode; | |
4607 | mode = GET_MODE_WIDER_MODE (mode)) | |
4608 | { | |
4609 | if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT | |
4610 | && byte_mode == VOIDmode) | |
4611 | byte_mode = mode; | |
4612 | ||
4613 | if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD | |
4614 | && word_mode == VOIDmode) | |
4615 | word_mode = mode; | |
4616 | } | |
4617 | ||
43fa6302 AS |
4618 | for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode; |
4619 | mode = GET_MODE_WIDER_MODE (mode)) | |
4620 | { | |
4621 | if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE | |
4622 | && double_mode == VOIDmode) | |
4623 | double_mode = mode; | |
4624 | } | |
4625 | ||
4626 | ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0); | |
4627 | ||
5da077de AS |
4628 | /* Assign register numbers to the globally defined register rtx. |
4629 | This must be done at runtime because the register number field | |
4630 | is in a union and some compilers can't initialize unions. */ | |
4631 | ||
4632 | pc_rtx = gen_rtx (PC, VOIDmode); | |
4633 | cc0_rtx = gen_rtx (CC0, VOIDmode); | |
08394eef BS |
4634 | stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM); |
4635 | frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM); | |
5da077de | 4636 | if (hard_frame_pointer_rtx == 0) |
750c9258 | 4637 | hard_frame_pointer_rtx = gen_raw_REG (Pmode, |
08394eef | 4638 | HARD_FRAME_POINTER_REGNUM); |
5da077de | 4639 | if (arg_pointer_rtx == 0) |
08394eef | 4640 | arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM); |
750c9258 | 4641 | virtual_incoming_args_rtx = |
08394eef | 4642 | gen_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM); |
750c9258 | 4643 | virtual_stack_vars_rtx = |
08394eef | 4644 | gen_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM); |
750c9258 | 4645 | virtual_stack_dynamic_rtx = |
08394eef | 4646 | gen_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM); |
750c9258 AJ |
4647 | virtual_outgoing_args_rtx = |
4648 | gen_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM); | |
08394eef | 4649 | virtual_cfa_rtx = gen_raw_REG (Pmode, VIRTUAL_CFA_REGNUM); |
5da077de AS |
4650 | |
4651 | /* These rtx must be roots if GC is enabled. */ | |
1f8f4a0b | 4652 | ggc_add_rtx_root (global_rtl, GR_MAX); |
5da077de | 4653 | |
5da077de | 4654 | #ifdef INIT_EXPANDERS |
414c4dc4 NC |
4655 | /* This is to initialize {init|mark|free}_machine_status before the first |
4656 | call to push_function_context_to. This is needed by the Chill front | |
a1f300c0 | 4657 | end which calls push_function_context_to before the first call to |
5da077de AS |
4658 | init_function_start. */ |
4659 | INIT_EXPANDERS; | |
4660 | #endif | |
4661 | ||
23b2ce53 RS |
4662 | /* Create the unique rtx's for certain rtx codes and operand values. */ |
4663 | ||
c5c76735 JL |
4664 | /* Don't use gen_rtx here since gen_rtx in this case |
4665 | tries to use these variables. */ | |
23b2ce53 | 4666 | for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++) |
750c9258 | 4667 | const_int_rtx[i + MAX_SAVED_CONST_INT] = |
5da077de | 4668 | gen_rtx_raw_CONST_INT (VOIDmode, i); |
1f8f4a0b | 4669 | ggc_add_rtx_root (const_int_rtx, 2 * MAX_SAVED_CONST_INT + 1); |
23b2ce53 | 4670 | |
68d75312 JC |
4671 | if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT |
4672 | && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT) | |
5da077de | 4673 | const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT]; |
68d75312 | 4674 | else |
3b80f6ca | 4675 | const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE); |
23b2ce53 | 4676 | |
9ec36da5 JL |
4677 | dconst0 = REAL_VALUE_ATOF ("0", double_mode); |
4678 | dconst1 = REAL_VALUE_ATOF ("1", double_mode); | |
4679 | dconst2 = REAL_VALUE_ATOF ("2", double_mode); | |
4680 | dconstm1 = REAL_VALUE_ATOF ("-1", double_mode); | |
23b2ce53 RS |
4681 | |
4682 | for (i = 0; i <= 2; i++) | |
4683 | { | |
4684 | for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode; | |
4685 | mode = GET_MODE_WIDER_MODE (mode)) | |
4686 | { | |
4687 | rtx tem = rtx_alloc (CONST_DOUBLE); | |
4688 | union real_extract u; | |
4689 | ||
d425c5b0 RH |
4690 | /* Zero any holes in a structure. */ |
4691 | memset ((char *) &u, 0, sizeof u); | |
23b2ce53 RS |
4692 | u.d = i == 0 ? dconst0 : i == 1 ? dconst1 : dconst2; |
4693 | ||
d425c5b0 RH |
4694 | /* Avoid trailing garbage in the rtx. */ |
4695 | if (sizeof (u) < sizeof (HOST_WIDE_INT)) | |
4696 | CONST_DOUBLE_LOW (tem) = 0; | |
4697 | if (sizeof (u) < 2 * sizeof (HOST_WIDE_INT)) | |
4698 | CONST_DOUBLE_HIGH (tem) = 0; | |
4699 | ||
4e135bdd | 4700 | memcpy (&CONST_DOUBLE_LOW (tem), &u, sizeof u); |
f8a83ee3 | 4701 | CONST_DOUBLE_CHAIN (tem) = NULL_RTX; |
23b2ce53 RS |
4702 | PUT_MODE (tem, mode); |
4703 | ||
4704 | const_tiny_rtx[i][(int) mode] = tem; | |
4705 | } | |
4706 | ||
906c4e36 | 4707 | const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i); |
23b2ce53 RS |
4708 | |
4709 | for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode; | |
4710 | mode = GET_MODE_WIDER_MODE (mode)) | |
906c4e36 | 4711 | const_tiny_rtx[i][(int) mode] = GEN_INT (i); |
33d3e559 RS |
4712 | |
4713 | for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT); | |
4714 | mode != VOIDmode; | |
4715 | mode = GET_MODE_WIDER_MODE (mode)) | |
4716 | const_tiny_rtx[i][(int) mode] = GEN_INT (i); | |
23b2ce53 RS |
4717 | } |
4718 | ||
dbbbbf3b JDA |
4719 | for (i = (int) CCmode; i < (int) MAX_MACHINE_MODE; ++i) |
4720 | if (GET_MODE_CLASS ((enum machine_mode) i) == MODE_CC) | |
4721 | const_tiny_rtx[0][i] = const0_rtx; | |
23b2ce53 | 4722 | |
f0417c82 RH |
4723 | const_tiny_rtx[0][(int) BImode] = const0_rtx; |
4724 | if (STORE_FLAG_VALUE == 1) | |
4725 | const_tiny_rtx[1][(int) BImode] = const1_rtx; | |
4726 | ||
b6a1cbae GM |
4727 | /* For bounded pointers, `&const_tiny_rtx[0][0]' is not the same as |
4728 | `(rtx *) const_tiny_rtx'. The former has bounds that only cover | |
4729 | `const_tiny_rtx[0]', whereas the latter has bounds that cover all. */ | |
4730 | ggc_add_rtx_root ((rtx *) const_tiny_rtx, sizeof const_tiny_rtx / sizeof (rtx)); | |
21cd906e | 4731 | ggc_add_rtx_root (&const_true_rtx, 1); |
a7e1e2ac AO |
4732 | |
4733 | #ifdef RETURN_ADDRESS_POINTER_REGNUM | |
4734 | return_address_pointer_rtx | |
08394eef | 4735 | = gen_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM); |
a7e1e2ac AO |
4736 | #endif |
4737 | ||
4738 | #ifdef STRUCT_VALUE | |
4739 | struct_value_rtx = STRUCT_VALUE; | |
4740 | #else | |
4741 | struct_value_rtx = gen_rtx_REG (Pmode, STRUCT_VALUE_REGNUM); | |
4742 | #endif | |
4743 | ||
4744 | #ifdef STRUCT_VALUE_INCOMING | |
4745 | struct_value_incoming_rtx = STRUCT_VALUE_INCOMING; | |
4746 | #else | |
4747 | #ifdef STRUCT_VALUE_INCOMING_REGNUM | |
4748 | struct_value_incoming_rtx | |
4749 | = gen_rtx_REG (Pmode, STRUCT_VALUE_INCOMING_REGNUM); | |
4750 | #else | |
4751 | struct_value_incoming_rtx = struct_value_rtx; | |
4752 | #endif | |
4753 | #endif | |
4754 | ||
4755 | #ifdef STATIC_CHAIN_REGNUM | |
4756 | static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM); | |
4757 | ||
4758 | #ifdef STATIC_CHAIN_INCOMING_REGNUM | |
4759 | if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM) | |
4760 | static_chain_incoming_rtx | |
4761 | = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM); | |
4762 | else | |
4763 | #endif | |
4764 | static_chain_incoming_rtx = static_chain_rtx; | |
4765 | #endif | |
4766 | ||
4767 | #ifdef STATIC_CHAIN | |
4768 | static_chain_rtx = STATIC_CHAIN; | |
4769 | ||
4770 | #ifdef STATIC_CHAIN_INCOMING | |
4771 | static_chain_incoming_rtx = STATIC_CHAIN_INCOMING; | |
4772 | #else | |
4773 | static_chain_incoming_rtx = static_chain_rtx; | |
4774 | #endif | |
4775 | #endif | |
4776 | ||
848e0190 JH |
4777 | if (PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM) |
4778 | pic_offset_table_rtx = gen_rtx_REG (Pmode, PIC_OFFSET_TABLE_REGNUM); | |
a7e1e2ac | 4779 | |
d7db6646 RH |
4780 | ggc_add_rtx_root (&pic_offset_table_rtx, 1); |
4781 | ggc_add_rtx_root (&struct_value_rtx, 1); | |
4782 | ggc_add_rtx_root (&struct_value_incoming_rtx, 1); | |
4783 | ggc_add_rtx_root (&static_chain_rtx, 1); | |
4784 | ggc_add_rtx_root (&static_chain_incoming_rtx, 1); | |
4785 | ggc_add_rtx_root (&return_address_pointer_rtx, 1); | |
23b2ce53 | 4786 | } |
a11759a3 JR |
4787 | \f |
4788 | /* Query and clear/ restore no_line_numbers. This is used by the | |
4789 | switch / case handling in stmt.c to give proper line numbers in | |
4790 | warnings about unreachable code. */ | |
4791 | ||
4792 | int | |
4793 | force_line_numbers () | |
4794 | { | |
4795 | int old = no_line_numbers; | |
4796 | ||
4797 | no_line_numbers = 0; | |
4798 | if (old) | |
4799 | force_next_line_note (); | |
4800 | return old; | |
4801 | } | |
4802 | ||
4803 | void | |
4804 | restore_line_number_status (old_value) | |
4805 | int old_value; | |
4806 | { | |
4807 | no_line_numbers = old_value; | |
4808 | } |