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23b2ce53 | 1 | /* Emit RTL for the GNU C-Compiler expander. |
747215f1 | 2 | Copyright (C) 1987, 88, 92-97, 1998, 1999 Free Software Foundation, Inc. |
23b2ce53 RS |
3 | |
4 | This file is part of GNU CC. | |
5 | ||
6 | GNU CC is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 2, or (at your option) | |
9 | any later version. | |
10 | ||
11 | GNU CC is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with GNU CC; see the file COPYING. If not, write to | |
940d9d63 RK |
18 | the Free Software Foundation, 59 Temple Place - Suite 330, |
19 | Boston, MA 02111-1307, USA. */ | |
23b2ce53 RS |
20 | |
21 | ||
22 | /* Middle-to-low level generation of rtx code and insns. | |
23 | ||
24 | This file contains the functions `gen_rtx', `gen_reg_rtx' | |
25 | and `gen_label_rtx' that are the usual ways of creating rtl | |
26 | expressions for most purposes. | |
27 | ||
28 | It also has the functions for creating insns and linking | |
29 | them in the doubly-linked chain. | |
30 | ||
31 | The patterns of the insns are created by machine-dependent | |
32 | routines in insn-emit.c, which is generated automatically from | |
33 | the machine description. These routines use `gen_rtx' to make | |
34 | the individual rtx's of the pattern; what is machine dependent | |
35 | is the kind of rtx's they make and what arguments they use. */ | |
36 | ||
37 | #include "config.h" | |
670ee920 | 38 | #include "system.h" |
23b2ce53 | 39 | #include "rtl.h" |
a25c7971 | 40 | #include "tree.h" |
23b2ce53 | 41 | #include "flags.h" |
1ef08c63 | 42 | #include "except.h" |
23b2ce53 RS |
43 | #include "function.h" |
44 | #include "expr.h" | |
45 | #include "regs.h" | |
aff48bca | 46 | #include "hard-reg-set.h" |
23b2ce53 | 47 | #include "insn-config.h" |
e9a25f70 | 48 | #include "recog.h" |
23b2ce53 | 49 | #include "real.h" |
ca695ac9 | 50 | #include "obstack.h" |
0dfa1860 | 51 | #include "bitmap.h" |
ca695ac9 | 52 | |
1d445e9e ILT |
53 | /* Commonly used modes. */ |
54 | ||
0f41302f MS |
55 | enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */ |
56 | enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */ | |
9ec36da5 | 57 | enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */ |
0f41302f | 58 | enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */ |
1d445e9e | 59 | |
23b2ce53 RS |
60 | /* This is reset to LAST_VIRTUAL_REGISTER + 1 at the start of each function. |
61 | After rtl generation, it is 1 plus the largest register number used. */ | |
62 | ||
63 | int reg_rtx_no = LAST_VIRTUAL_REGISTER + 1; | |
64 | ||
65 | /* This is *not* reset after each function. It gives each CODE_LABEL | |
66 | in the entire compilation a unique label number. */ | |
67 | ||
68 | static int label_num = 1; | |
69 | ||
70 | /* Lowest label number in current function. */ | |
71 | ||
72 | static int first_label_num; | |
73 | ||
74 | /* Highest label number in current function. | |
75 | Zero means use the value of label_num instead. | |
76 | This is nonzero only when belatedly compiling an inline function. */ | |
77 | ||
78 | static int last_label_num; | |
79 | ||
80 | /* Value label_num had when set_new_first_and_last_label_number was called. | |
81 | If label_num has not changed since then, last_label_num is valid. */ | |
82 | ||
83 | static int base_label_num; | |
84 | ||
85 | /* Nonzero means do not generate NOTEs for source line numbers. */ | |
86 | ||
87 | static int no_line_numbers; | |
88 | ||
89 | /* Commonly used rtx's, so that we only need space for one copy. | |
90 | These are initialized once for the entire compilation. | |
91 | All of these except perhaps the floating-point CONST_DOUBLEs | |
92 | are unique; no other rtx-object will be equal to any of these. */ | |
93 | ||
c84e2712 KG |
94 | /* Avoid warnings by initializing the `fld' field. Since its a union, |
95 | bypass problems with KNR compilers by only doing so when __GNUC__. */ | |
96 | #ifdef __GNUC__ | |
97 | #define FLDI , {{0}} | |
98 | #else | |
99 | #define FLDI | |
100 | #endif | |
101 | ||
68d75312 JC |
102 | struct _global_rtl global_rtl = |
103 | { | |
c84e2712 KG |
104 | {PC, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* pc_rtx */ |
105 | {CC0, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* cc0_rtx */ | |
106 | {REG, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* stack_pointer_rtx */ | |
107 | {REG, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* frame_pointer_rtx */ | |
108 | {REG, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* hard_frame_pointer_rtx */ | |
109 | {REG, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* arg_pointer_rtx */ | |
110 | {REG, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* virtual_incoming_args_rtx */ | |
111 | {REG, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* virtual_stack_vars_rtx */ | |
112 | {REG, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* virtual_stack_dynamic_rtx */ | |
113 | {REG, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* virtual_outgoing_args_rtx */ | |
114 | {REG, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* virtual_cfa_rtx */ | |
68d75312 | 115 | }; |
23b2ce53 RS |
116 | |
117 | /* We record floating-point CONST_DOUBLEs in each floating-point mode for | |
118 | the values of 0, 1, and 2. For the integer entries and VOIDmode, we | |
119 | record a copy of const[012]_rtx. */ | |
120 | ||
121 | rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE]; | |
122 | ||
68d75312 JC |
123 | rtx const_true_rtx; |
124 | ||
23b2ce53 RS |
125 | REAL_VALUE_TYPE dconst0; |
126 | REAL_VALUE_TYPE dconst1; | |
127 | REAL_VALUE_TYPE dconst2; | |
128 | REAL_VALUE_TYPE dconstm1; | |
129 | ||
130 | /* All references to the following fixed hard registers go through | |
131 | these unique rtl objects. On machines where the frame-pointer and | |
132 | arg-pointer are the same register, they use the same unique object. | |
133 | ||
134 | After register allocation, other rtl objects which used to be pseudo-regs | |
135 | may be clobbered to refer to the frame-pointer register. | |
136 | But references that were originally to the frame-pointer can be | |
137 | distinguished from the others because they contain frame_pointer_rtx. | |
138 | ||
ac6f08b0 DE |
139 | When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little |
140 | tricky: until register elimination has taken place hard_frame_pointer_rtx | |
141 | should be used if it is being set, and frame_pointer_rtx otherwise. After | |
142 | register elimination hard_frame_pointer_rtx should always be used. | |
143 | On machines where the two registers are same (most) then these are the | |
144 | same. | |
145 | ||
23b2ce53 RS |
146 | In an inline procedure, the stack and frame pointer rtxs may not be |
147 | used for anything else. */ | |
23b2ce53 RS |
148 | rtx struct_value_rtx; /* (REG:Pmode STRUCT_VALUE_REGNUM) */ |
149 | rtx struct_value_incoming_rtx; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */ | |
150 | rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */ | |
151 | rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */ | |
152 | rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */ | |
153 | ||
a4417a86 JW |
154 | /* This is used to implement __builtin_return_address for some machines. |
155 | See for instance the MIPS port. */ | |
156 | rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */ | |
157 | ||
23b2ce53 RS |
158 | /* We make one copy of (const_int C) where C is in |
159 | [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT] | |
160 | to save space during the compilation and simplify comparisons of | |
161 | integers. */ | |
162 | ||
68d75312 | 163 | struct rtx_def const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1]; |
23b2ce53 RS |
164 | |
165 | /* The ends of the doubly-linked chain of rtl for the current function. | |
166 | Both are reset to null at the start of rtl generation for the function. | |
167 | ||
a25c7971 RK |
168 | start_sequence saves both of these on `sequence_stack' along with |
169 | `sequence_rtl_expr' and then starts a new, nested sequence of insns. */ | |
23b2ce53 RS |
170 | |
171 | static rtx first_insn = NULL; | |
172 | static rtx last_insn = NULL; | |
173 | ||
a25c7971 RK |
174 | /* RTL_EXPR within which the current sequence will be placed. Use to |
175 | prevent reuse of any temporaries within the sequence until after the | |
176 | RTL_EXPR is emitted. */ | |
177 | ||
178 | tree sequence_rtl_expr = NULL; | |
179 | ||
23b2ce53 RS |
180 | /* INSN_UID for next insn emitted. |
181 | Reset to 1 for each function compiled. */ | |
182 | ||
183 | static int cur_insn_uid = 1; | |
184 | ||
185 | /* Line number and source file of the last line-number NOTE emitted. | |
186 | This is used to avoid generating duplicates. */ | |
187 | ||
188 | static int last_linenum = 0; | |
189 | static char *last_filename = 0; | |
190 | ||
191 | /* A vector indexed by pseudo reg number. The allocated length | |
192 | of this vector is regno_pointer_flag_length. Since this | |
193 | vector is needed during the expansion phase when the total | |
194 | number of registers in the function is not yet known, | |
195 | it is copied and made bigger when necessary. */ | |
196 | ||
197 | char *regno_pointer_flag; | |
198 | int regno_pointer_flag_length; | |
199 | ||
86fe05e0 RK |
200 | /* Indexed by pseudo register number, if nonzero gives the known alignment |
201 | for that pseudo (if regno_pointer_flag is set). | |
202 | Allocated in parallel with regno_pointer_flag. */ | |
203 | char *regno_pointer_align; | |
204 | ||
23b2ce53 RS |
205 | /* Indexed by pseudo register number, gives the rtx for that pseudo. |
206 | Allocated in parallel with regno_pointer_flag. */ | |
207 | ||
208 | rtx *regno_reg_rtx; | |
209 | ||
210 | /* Stack of pending (incomplete) sequences saved by `start_sequence'. | |
211 | Each element describes one pending sequence. | |
212 | The main insn-chain is saved in the last element of the chain, | |
213 | unless the chain is empty. */ | |
214 | ||
215 | struct sequence_stack *sequence_stack; | |
216 | ||
217 | /* start_sequence and gen_sequence can make a lot of rtx expressions which are | |
218 | shortly thrown away. We use two mechanisms to prevent this waste: | |
219 | ||
220 | First, we keep a list of the expressions used to represent the sequence | |
221 | stack in sequence_element_free_list. | |
222 | ||
223 | Second, for sizes up to 5 elements, we keep a SEQUENCE and its associated | |
224 | rtvec for use by gen_sequence. One entry for each size is sufficient | |
225 | because most cases are calls to gen_sequence followed by immediately | |
226 | emitting the SEQUENCE. Reuse is safe since emitting a sequence is | |
227 | destructive on the insn in it anyway and hence can't be redone. | |
228 | ||
229 | We do not bother to save this cached data over nested function calls. | |
230 | Instead, we just reinitialize them. */ | |
231 | ||
232 | #define SEQUENCE_RESULT_SIZE 5 | |
233 | ||
234 | static struct sequence_stack *sequence_element_free_list; | |
235 | static rtx sequence_result[SEQUENCE_RESULT_SIZE]; | |
236 | ||
0f41302f | 237 | /* During RTL generation, we also keep a list of free INSN rtl codes. */ |
43127294 RK |
238 | static rtx free_insn; |
239 | ||
23b2ce53 RS |
240 | extern int rtx_equal_function_value_matters; |
241 | ||
242 | /* Filename and line number of last line-number note, | |
243 | whether we actually emitted it or not. */ | |
244 | extern char *emit_filename; | |
245 | extern int emit_lineno; | |
956d6950 JL |
246 | |
247 | static rtx make_jump_insn_raw PROTO((rtx)); | |
248 | static rtx make_call_insn_raw PROTO((rtx)); | |
1d300e19 | 249 | static rtx find_line_note PROTO((rtx)); |
ca695ac9 | 250 | \f |
3b80f6ca RH |
251 | rtx |
252 | gen_rtx_CONST_INT (mode, arg) | |
253 | enum machine_mode mode; | |
254 | HOST_WIDE_INT arg; | |
255 | { | |
256 | if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT) | |
257 | return &const_int_rtx[arg + MAX_SAVED_CONST_INT]; | |
258 | ||
259 | #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1 | |
260 | if (const_true_rtx && arg == STORE_FLAG_VALUE) | |
261 | return const_true_rtx; | |
262 | #endif | |
263 | ||
264 | return gen_rtx_raw_CONST_INT (mode, arg); | |
265 | } | |
266 | ||
267 | rtx | |
268 | gen_rtx_REG (mode, regno) | |
269 | enum machine_mode mode; | |
270 | int regno; | |
271 | { | |
272 | /* In case the MD file explicitly references the frame pointer, have | |
273 | all such references point to the same frame pointer. This is | |
274 | used during frame pointer elimination to distinguish the explicit | |
275 | references to these registers from pseudos that happened to be | |
276 | assigned to them. | |
277 | ||
278 | If we have eliminated the frame pointer or arg pointer, we will | |
279 | be using it as a normal register, for example as a spill | |
280 | register. In such cases, we might be accessing it in a mode that | |
281 | is not Pmode and therefore cannot use the pre-allocated rtx. | |
282 | ||
283 | Also don't do this when we are making new REGs in reload, since | |
284 | we don't want to get confused with the real pointers. */ | |
285 | ||
286 | if (mode == Pmode && !reload_in_progress) | |
287 | { | |
288 | if (regno == FRAME_POINTER_REGNUM) | |
289 | return frame_pointer_rtx; | |
290 | #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM | |
291 | if (regno == HARD_FRAME_POINTER_REGNUM) | |
292 | return hard_frame_pointer_rtx; | |
293 | #endif | |
294 | #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM | |
295 | if (regno == ARG_POINTER_REGNUM) | |
296 | return arg_pointer_rtx; | |
297 | #endif | |
298 | #ifdef RETURN_ADDRESS_POINTER_REGNUM | |
299 | if (regno == RETURN_ADDRESS_POINTER_REGNUM) | |
300 | return return_address_pointer_rtx; | |
301 | #endif | |
302 | if (regno == STACK_POINTER_REGNUM) | |
303 | return stack_pointer_rtx; | |
304 | } | |
305 | ||
306 | return gen_rtx_raw_REG (mode, regno); | |
307 | } | |
308 | ||
41472af8 MM |
309 | rtx |
310 | gen_rtx_MEM (mode, addr) | |
311 | enum machine_mode mode; | |
312 | rtx addr; | |
313 | { | |
314 | rtx rt = gen_rtx_raw_MEM (mode, addr); | |
315 | ||
316 | /* This field is not cleared by the mere allocation of the rtx, so | |
317 | we clear it here. */ | |
318 | MEM_ALIAS_SET (rt) = 0; | |
319 | ||
320 | return rt; | |
321 | } | |
322 | ||
23b2ce53 RS |
323 | /* rtx gen_rtx (code, mode, [element1, ..., elementn]) |
324 | ** | |
325 | ** This routine generates an RTX of the size specified by | |
326 | ** <code>, which is an RTX code. The RTX structure is initialized | |
327 | ** from the arguments <element1> through <elementn>, which are | |
328 | ** interpreted according to the specific RTX type's format. The | |
329 | ** special machine mode associated with the rtx (if any) is specified | |
330 | ** in <mode>. | |
331 | ** | |
1632afca | 332 | ** gen_rtx can be invoked in a way which resembles the lisp-like |
23b2ce53 RS |
333 | ** rtx it will generate. For example, the following rtx structure: |
334 | ** | |
335 | ** (plus:QI (mem:QI (reg:SI 1)) | |
336 | ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3)))) | |
337 | ** | |
338 | ** ...would be generated by the following C code: | |
339 | ** | |
340 | ** gen_rtx (PLUS, QImode, | |
341 | ** gen_rtx (MEM, QImode, | |
342 | ** gen_rtx (REG, SImode, 1)), | |
343 | ** gen_rtx (MEM, QImode, | |
344 | ** gen_rtx (PLUS, SImode, | |
345 | ** gen_rtx (REG, SImode, 2), | |
346 | ** gen_rtx (REG, SImode, 3)))), | |
347 | */ | |
348 | ||
349 | /*VARARGS2*/ | |
350 | rtx | |
4f90e4a0 | 351 | gen_rtx VPROTO((enum rtx_code code, enum machine_mode mode, ...)) |
23b2ce53 | 352 | { |
5148a72b | 353 | #ifndef ANSI_PROTOTYPES |
23b2ce53 RS |
354 | enum rtx_code code; |
355 | enum machine_mode mode; | |
4f90e4a0 RK |
356 | #endif |
357 | va_list p; | |
23b2ce53 RS |
358 | register int i; /* Array indices... */ |
359 | register char *fmt; /* Current rtx's format... */ | |
360 | register rtx rt_val; /* RTX to return to caller... */ | |
361 | ||
4f90e4a0 RK |
362 | VA_START (p, mode); |
363 | ||
5148a72b | 364 | #ifndef ANSI_PROTOTYPES |
23b2ce53 RS |
365 | code = va_arg (p, enum rtx_code); |
366 | mode = va_arg (p, enum machine_mode); | |
4f90e4a0 | 367 | #endif |
23b2ce53 RS |
368 | |
369 | if (code == CONST_INT) | |
3b80f6ca | 370 | rt_val = gen_rtx_CONST_INT (mode, va_arg (p, HOST_WIDE_INT)); |
23b2ce53 | 371 | else if (code == REG) |
3b80f6ca | 372 | rt_val = gen_rtx_REG (mode, va_arg (p, int)); |
b4213325 MM |
373 | else if (code == MEM) |
374 | rt_val = gen_rtx_MEM (mode, va_arg (p, rtx)); | |
23b2ce53 RS |
375 | else |
376 | { | |
377 | rt_val = rtx_alloc (code); /* Allocate the storage space. */ | |
378 | rt_val->mode = mode; /* Store the machine mode... */ | |
379 | ||
380 | fmt = GET_RTX_FORMAT (code); /* Find the right format... */ | |
381 | for (i = 0; i < GET_RTX_LENGTH (code); i++) | |
382 | { | |
383 | switch (*fmt++) | |
384 | { | |
385 | case '0': /* Unused field. */ | |
386 | break; | |
387 | ||
388 | case 'i': /* An integer? */ | |
389 | XINT (rt_val, i) = va_arg (p, int); | |
390 | break; | |
391 | ||
906c4e36 RK |
392 | case 'w': /* A wide integer? */ |
393 | XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT); | |
394 | break; | |
395 | ||
23b2ce53 RS |
396 | case 's': /* A string? */ |
397 | XSTR (rt_val, i) = va_arg (p, char *); | |
398 | break; | |
399 | ||
400 | case 'e': /* An expression? */ | |
401 | case 'u': /* An insn? Same except when printing. */ | |
402 | XEXP (rt_val, i) = va_arg (p, rtx); | |
403 | break; | |
404 | ||
405 | case 'E': /* An RTX vector? */ | |
406 | XVEC (rt_val, i) = va_arg (p, rtvec); | |
407 | break; | |
408 | ||
0dfa1860 MM |
409 | case 'b': /* A bitmap? */ |
410 | XBITMAP (rt_val, i) = va_arg (p, bitmap); | |
411 | break; | |
412 | ||
413 | case 't': /* A tree? */ | |
414 | XTREE (rt_val, i) = va_arg (p, tree); | |
415 | break; | |
416 | ||
23b2ce53 | 417 | default: |
1632afca | 418 | abort (); |
23b2ce53 RS |
419 | } |
420 | } | |
421 | } | |
422 | va_end (p); | |
423 | return rt_val; /* Return the new RTX... */ | |
424 | } | |
425 | ||
426 | /* gen_rtvec (n, [rt1, ..., rtn]) | |
427 | ** | |
428 | ** This routine creates an rtvec and stores within it the | |
429 | ** pointers to rtx's which are its arguments. | |
430 | */ | |
431 | ||
432 | /*VARARGS1*/ | |
433 | rtvec | |
4f90e4a0 | 434 | gen_rtvec VPROTO((int n, ...)) |
23b2ce53 | 435 | { |
5148a72b | 436 | #ifndef ANSI_PROTOTYPES |
4f90e4a0 RK |
437 | int n; |
438 | #endif | |
439 | int i; | |
23b2ce53 RS |
440 | va_list p; |
441 | rtx *vector; | |
442 | ||
4f90e4a0 RK |
443 | VA_START (p, n); |
444 | ||
5148a72b | 445 | #ifndef ANSI_PROTOTYPES |
23b2ce53 | 446 | n = va_arg (p, int); |
4f90e4a0 | 447 | #endif |
23b2ce53 RS |
448 | |
449 | if (n == 0) | |
450 | return NULL_RTVEC; /* Don't allocate an empty rtvec... */ | |
451 | ||
452 | vector = (rtx *) alloca (n * sizeof (rtx)); | |
4f90e4a0 | 453 | |
23b2ce53 RS |
454 | for (i = 0; i < n; i++) |
455 | vector[i] = va_arg (p, rtx); | |
456 | va_end (p); | |
457 | ||
458 | return gen_rtvec_v (n, vector); | |
459 | } | |
460 | ||
461 | rtvec | |
462 | gen_rtvec_v (n, argp) | |
463 | int n; | |
464 | rtx *argp; | |
465 | { | |
466 | register int i; | |
467 | register rtvec rt_val; | |
468 | ||
469 | if (n == 0) | |
470 | return NULL_RTVEC; /* Don't allocate an empty rtvec... */ | |
471 | ||
472 | rt_val = rtvec_alloc (n); /* Allocate an rtvec... */ | |
473 | ||
474 | for (i = 0; i < n; i++) | |
475 | rt_val->elem[i].rtx = *argp++; | |
476 | ||
477 | return rt_val; | |
478 | } | |
ba444f92 RK |
479 | |
480 | rtvec | |
481 | gen_rtvec_vv (n, argp) | |
482 | int n; | |
483 | rtunion *argp; | |
484 | { | |
485 | register int i; | |
486 | register rtvec rt_val; | |
487 | ||
488 | if (n == 0) | |
489 | return NULL_RTVEC; /* Don't allocate an empty rtvec... */ | |
490 | ||
491 | rt_val = rtvec_alloc (n); /* Allocate an rtvec... */ | |
492 | ||
493 | for (i = 0; i < n; i++) | |
494 | rt_val->elem[i].rtx = (argp++)->rtx; | |
495 | ||
496 | return rt_val; | |
497 | } | |
23b2ce53 RS |
498 | \f |
499 | /* Generate a REG rtx for a new pseudo register of mode MODE. | |
500 | This pseudo is assigned the next sequential register number. */ | |
501 | ||
502 | rtx | |
503 | gen_reg_rtx (mode) | |
504 | enum machine_mode mode; | |
505 | { | |
506 | register rtx val; | |
507 | ||
f1db3576 JL |
508 | /* Don't let anything called after initial flow analysis create new |
509 | registers. */ | |
510 | if (no_new_pseudos) | |
23b2ce53 RS |
511 | abort (); |
512 | ||
fc84e8a8 RS |
513 | if (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT |
514 | || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT) | |
515 | { | |
516 | /* For complex modes, don't make a single pseudo. | |
517 | Instead, make a CONCAT of two pseudos. | |
518 | This allows noncontiguous allocation of the real and imaginary parts, | |
519 | which makes much better code. Besides, allocating DCmode | |
520 | pseudos overstrains reload on some machines like the 386. */ | |
521 | rtx realpart, imagpart; | |
522 | int size = GET_MODE_UNIT_SIZE (mode); | |
523 | enum machine_mode partmode | |
524 | = mode_for_size (size * BITS_PER_UNIT, | |
525 | (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT | |
526 | ? MODE_FLOAT : MODE_INT), | |
527 | 0); | |
528 | ||
529 | realpart = gen_reg_rtx (partmode); | |
530 | imagpart = gen_reg_rtx (partmode); | |
3b80f6ca | 531 | return gen_rtx_CONCAT (mode, realpart, imagpart); |
fc84e8a8 RS |
532 | } |
533 | ||
23b2ce53 RS |
534 | /* Make sure regno_pointer_flag and regno_reg_rtx are large |
535 | enough to have an element for this pseudo reg number. */ | |
536 | ||
537 | if (reg_rtx_no == regno_pointer_flag_length) | |
538 | { | |
539 | rtx *new1; | |
540 | char *new = | |
86fe05e0 | 541 | (char *) savealloc (regno_pointer_flag_length * 2); |
23b2ce53 | 542 | bcopy (regno_pointer_flag, new, regno_pointer_flag_length); |
c0b178d0 | 543 | bzero (&new[regno_pointer_flag_length], regno_pointer_flag_length); |
23b2ce53 RS |
544 | regno_pointer_flag = new; |
545 | ||
86fe05e0 RK |
546 | new = (char *) savealloc (regno_pointer_flag_length * 2); |
547 | bcopy (regno_pointer_align, new, regno_pointer_flag_length); | |
548 | bzero (&new[regno_pointer_flag_length], regno_pointer_flag_length); | |
549 | regno_pointer_align = new; | |
550 | ||
551 | new1 = (rtx *) savealloc (regno_pointer_flag_length * 2 * sizeof (rtx)); | |
4c9a05bc RK |
552 | bcopy ((char *) regno_reg_rtx, (char *) new1, |
553 | regno_pointer_flag_length * sizeof (rtx)); | |
554 | bzero ((char *) &new1[regno_pointer_flag_length], | |
c0b178d0 | 555 | regno_pointer_flag_length * sizeof (rtx)); |
23b2ce53 RS |
556 | regno_reg_rtx = new1; |
557 | ||
558 | regno_pointer_flag_length *= 2; | |
559 | } | |
560 | ||
3b80f6ca | 561 | val = gen_rtx_raw_REG (mode, reg_rtx_no); |
23b2ce53 RS |
562 | regno_reg_rtx[reg_rtx_no++] = val; |
563 | return val; | |
564 | } | |
565 | ||
754fdcca RK |
566 | /* Identify REG (which may be a CONCAT) as a user register. */ |
567 | ||
568 | void | |
569 | mark_user_reg (reg) | |
570 | rtx reg; | |
571 | { | |
572 | if (GET_CODE (reg) == CONCAT) | |
573 | { | |
574 | REG_USERVAR_P (XEXP (reg, 0)) = 1; | |
575 | REG_USERVAR_P (XEXP (reg, 1)) = 1; | |
576 | } | |
577 | else if (GET_CODE (reg) == REG) | |
578 | REG_USERVAR_P (reg) = 1; | |
579 | else | |
580 | abort (); | |
581 | } | |
582 | ||
86fe05e0 RK |
583 | /* Identify REG as a probable pointer register and show its alignment |
584 | as ALIGN, if nonzero. */ | |
23b2ce53 RS |
585 | |
586 | void | |
86fe05e0 | 587 | mark_reg_pointer (reg, align) |
23b2ce53 | 588 | rtx reg; |
86fe05e0 | 589 | int align; |
23b2ce53 RS |
590 | { |
591 | REGNO_POINTER_FLAG (REGNO (reg)) = 1; | |
86fe05e0 RK |
592 | |
593 | if (align) | |
594 | REGNO_POINTER_ALIGN (REGNO (reg)) = align; | |
23b2ce53 RS |
595 | } |
596 | ||
597 | /* Return 1 plus largest pseudo reg number used in the current function. */ | |
598 | ||
599 | int | |
600 | max_reg_num () | |
601 | { | |
602 | return reg_rtx_no; | |
603 | } | |
604 | ||
605 | /* Return 1 + the largest label number used so far in the current function. */ | |
606 | ||
607 | int | |
608 | max_label_num () | |
609 | { | |
610 | if (last_label_num && label_num == base_label_num) | |
611 | return last_label_num; | |
612 | return label_num; | |
613 | } | |
614 | ||
615 | /* Return first label number used in this function (if any were used). */ | |
616 | ||
617 | int | |
618 | get_first_label_num () | |
619 | { | |
620 | return first_label_num; | |
621 | } | |
622 | \f | |
623 | /* Return a value representing some low-order bits of X, where the number | |
624 | of low-order bits is given by MODE. Note that no conversion is done | |
625 | between floating-point and fixed-point values, rather, the bit | |
626 | representation is returned. | |
627 | ||
628 | This function handles the cases in common between gen_lowpart, below, | |
629 | and two variants in cse.c and combine.c. These are the cases that can | |
630 | be safely handled at all points in the compilation. | |
631 | ||
632 | If this is not a case we can handle, return 0. */ | |
633 | ||
634 | rtx | |
635 | gen_lowpart_common (mode, x) | |
636 | enum machine_mode mode; | |
637 | register rtx x; | |
638 | { | |
639 | int word = 0; | |
640 | ||
641 | if (GET_MODE (x) == mode) | |
642 | return x; | |
643 | ||
644 | /* MODE must occupy no more words than the mode of X. */ | |
645 | if (GET_MODE (x) != VOIDmode | |
646 | && ((GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD | |
647 | > ((GET_MODE_SIZE (GET_MODE (x)) + (UNITS_PER_WORD - 1)) | |
648 | / UNITS_PER_WORD))) | |
649 | return 0; | |
650 | ||
651 | if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD) | |
652 | word = ((GET_MODE_SIZE (GET_MODE (x)) | |
653 | - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD)) | |
654 | / UNITS_PER_WORD); | |
655 | ||
656 | if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND) | |
83e9c679 RK |
657 | && (GET_MODE_CLASS (mode) == MODE_INT |
658 | || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)) | |
23b2ce53 RS |
659 | { |
660 | /* If we are getting the low-order part of something that has been | |
661 | sign- or zero-extended, we can either just use the object being | |
662 | extended or make a narrower extension. If we want an even smaller | |
663 | piece than the size of the object being extended, call ourselves | |
664 | recursively. | |
665 | ||
666 | This case is used mostly by combine and cse. */ | |
667 | ||
668 | if (GET_MODE (XEXP (x, 0)) == mode) | |
669 | return XEXP (x, 0); | |
670 | else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (XEXP (x, 0)))) | |
671 | return gen_lowpart_common (mode, XEXP (x, 0)); | |
672 | else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (x))) | |
3b80f6ca | 673 | return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0)); |
23b2ce53 RS |
674 | } |
675 | else if (GET_CODE (x) == SUBREG | |
676 | && (GET_MODE_SIZE (mode) <= UNITS_PER_WORD | |
677 | || GET_MODE_SIZE (mode) == GET_MODE_UNIT_SIZE (GET_MODE (x)))) | |
678 | return (GET_MODE (SUBREG_REG (x)) == mode && SUBREG_WORD (x) == 0 | |
679 | ? SUBREG_REG (x) | |
3b80f6ca | 680 | : gen_rtx_SUBREG (mode, SUBREG_REG (x), SUBREG_WORD (x) + word)); |
23b2ce53 RS |
681 | else if (GET_CODE (x) == REG) |
682 | { | |
4901a643 RH |
683 | /* Let the backend decide how many registers to skip. This is needed |
684 | in particular for Sparc64 where fp regs are smaller than a word. */ | |
685 | /* ??? Note that subregs are now ambiguous, in that those against | |
686 | pseudos are sized by the Word Size, while those against hard | |
687 | regs are sized by the underlying register size. Better would be | |
688 | to always interpret the subreg offset parameter as bytes or bits. */ | |
689 | ||
690 | if (WORDS_BIG_ENDIAN && REGNO (x) < FIRST_PSEUDO_REGISTER) | |
691 | word = (HARD_REGNO_NREGS (REGNO (x), GET_MODE (x)) | |
692 | - HARD_REGNO_NREGS (REGNO (x), mode)); | |
693 | ||
23b2ce53 | 694 | /* If the register is not valid for MODE, return 0. If we don't |
674d5d8b RK |
695 | do this, there is no way to fix up the resulting REG later. |
696 | But we do do this if the current REG is not valid for its | |
697 | mode. This latter is a kludge, but is required due to the | |
698 | way that parameters are passed on some machines, most | |
699 | notably Sparc. */ | |
23b2ce53 | 700 | if (REGNO (x) < FIRST_PSEUDO_REGISTER |
674d5d8b RK |
701 | && ! HARD_REGNO_MODE_OK (REGNO (x) + word, mode) |
702 | && HARD_REGNO_MODE_OK (REGNO (x), GET_MODE (x))) | |
23b2ce53 RS |
703 | return 0; |
704 | else if (REGNO (x) < FIRST_PSEUDO_REGISTER | |
705 | /* integrate.c can't handle parts of a return value register. */ | |
706 | && (! REG_FUNCTION_VALUE_P (x) | |
cb00f51a | 707 | || ! rtx_equal_function_value_matters) |
aff48bca JL |
708 | #ifdef CLASS_CANNOT_CHANGE_SIZE |
709 | && ! (GET_MODE_SIZE (mode) != GET_MODE_SIZE (GET_MODE (x)) | |
710 | && GET_MODE_CLASS (GET_MODE (x)) != MODE_COMPLEX_INT | |
711 | && GET_MODE_CLASS (GET_MODE (x)) != MODE_COMPLEX_FLOAT | |
712 | && (TEST_HARD_REG_BIT | |
713 | (reg_class_contents[(int) CLASS_CANNOT_CHANGE_SIZE], | |
714 | REGNO (x)))) | |
715 | #endif | |
cb00f51a RK |
716 | /* We want to keep the stack, frame, and arg pointers |
717 | special. */ | |
65e8fe02 | 718 | && x != frame_pointer_rtx |
cb00f51a | 719 | #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM |
65e8fe02 | 720 | && x != arg_pointer_rtx |
cb00f51a | 721 | #endif |
65e8fe02 | 722 | && x != stack_pointer_rtx) |
3b80f6ca | 723 | return gen_rtx_REG (mode, REGNO (x) + word); |
23b2ce53 | 724 | else |
3b80f6ca | 725 | return gen_rtx_SUBREG (mode, x, word); |
23b2ce53 | 726 | } |
23b2ce53 RS |
727 | /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits |
728 | from the low-order part of the constant. */ | |
83e9c679 RK |
729 | else if ((GET_MODE_CLASS (mode) == MODE_INT |
730 | || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT) | |
731 | && GET_MODE (x) == VOIDmode | |
23b2ce53 | 732 | && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)) |
1a5b457d RK |
733 | { |
734 | /* If MODE is twice the host word size, X is already the desired | |
735 | representation. Otherwise, if MODE is wider than a word, we can't | |
736 | do this. If MODE is exactly a word, return just one CONST_INT. | |
737 | If MODE is smaller than a word, clear the bits that don't belong | |
738 | in our mode, unless they and our sign bit are all one. So we get | |
739 | either a reasonable negative value or a reasonable unsigned value | |
740 | for this mode. */ | |
741 | ||
a8dd0e73 | 742 | if (GET_MODE_BITSIZE (mode) >= 2 * HOST_BITS_PER_WIDE_INT) |
1a5b457d | 743 | return x; |
906c4e36 | 744 | else if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT) |
1a5b457d | 745 | return 0; |
906c4e36 | 746 | else if (GET_MODE_BITSIZE (mode) == HOST_BITS_PER_WIDE_INT) |
1a5b457d | 747 | return (GET_CODE (x) == CONST_INT ? x |
906c4e36 | 748 | : GEN_INT (CONST_DOUBLE_LOW (x))); |
1a5b457d RK |
749 | else |
750 | { | |
27eef9ce | 751 | /* MODE must be narrower than HOST_BITS_PER_WIDE_INT. */ |
1a5b457d | 752 | int width = GET_MODE_BITSIZE (mode); |
906c4e36 RK |
753 | HOST_WIDE_INT val = (GET_CODE (x) == CONST_INT ? INTVAL (x) |
754 | : CONST_DOUBLE_LOW (x)); | |
1a5b457d | 755 | |
27eef9ce JC |
756 | /* Sign extend to HOST_WIDE_INT. */ |
757 | val = val << (HOST_BITS_PER_WIDE_INT - width) >> (HOST_BITS_PER_WIDE_INT - width); | |
1a5b457d RK |
758 | |
759 | return (GET_CODE (x) == CONST_INT && INTVAL (x) == val ? x | |
906c4e36 | 760 | : GEN_INT (val)); |
1a5b457d RK |
761 | } |
762 | } | |
23b2ce53 | 763 | |
8aada4ad RK |
764 | /* If X is an integral constant but we want it in floating-point, it |
765 | must be the case that we have a union of an integer and a floating-point | |
766 | value. If the machine-parameters allow it, simulate that union here | |
d6020413 RK |
767 | and return the result. The two-word and single-word cases are |
768 | different. */ | |
8aada4ad | 769 | |
b3bf132d | 770 | else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT |
906c4e36 | 771 | && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD) |
b3bf132d | 772 | || flag_pretend_float) |
8aada4ad | 773 | && GET_MODE_CLASS (mode) == MODE_FLOAT |
d6020413 RK |
774 | && GET_MODE_SIZE (mode) == UNITS_PER_WORD |
775 | && GET_CODE (x) == CONST_INT | |
906c4e36 | 776 | && sizeof (float) * HOST_BITS_PER_CHAR == HOST_BITS_PER_WIDE_INT) |
b6a524cb RS |
777 | #ifdef REAL_ARITHMETIC |
778 | { | |
779 | REAL_VALUE_TYPE r; | |
780 | HOST_WIDE_INT i; | |
781 | ||
782 | i = INTVAL (x); | |
783 | r = REAL_VALUE_FROM_TARGET_SINGLE (i); | |
53596fba | 784 | return CONST_DOUBLE_FROM_REAL_VALUE (r, mode); |
b6a524cb RS |
785 | } |
786 | #else | |
d6020413 | 787 | { |
906c4e36 | 788 | union {HOST_WIDE_INT i; float d; } u; |
d6020413 RK |
789 | |
790 | u.i = INTVAL (x); | |
53596fba | 791 | return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode); |
d6020413 | 792 | } |
b6a524cb | 793 | #endif |
d6020413 | 794 | else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT |
906c4e36 | 795 | && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD) |
d6020413 RK |
796 | || flag_pretend_float) |
797 | && GET_MODE_CLASS (mode) == MODE_FLOAT | |
798 | && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD | |
8aada4ad RK |
799 | && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE) |
800 | && GET_MODE (x) == VOIDmode | |
906c4e36 RK |
801 | && (sizeof (double) * HOST_BITS_PER_CHAR |
802 | == 2 * HOST_BITS_PER_WIDE_INT)) | |
b6a524cb RS |
803 | #ifdef REAL_ARITHMETIC |
804 | { | |
805 | REAL_VALUE_TYPE r; | |
806 | HOST_WIDE_INT i[2]; | |
807 | HOST_WIDE_INT low, high; | |
808 | ||
809 | if (GET_CODE (x) == CONST_INT) | |
810 | low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1); | |
811 | else | |
812 | low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x); | |
813 | ||
8698cce3 | 814 | /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the |
0f41302f | 815 | target machine. */ |
8698cce3 RK |
816 | if (WORDS_BIG_ENDIAN) |
817 | i[0] = high, i[1] = low; | |
818 | else | |
819 | i[0] = low, i[1] = high; | |
b6a524cb RS |
820 | |
821 | r = REAL_VALUE_FROM_TARGET_DOUBLE (i); | |
53596fba | 822 | return CONST_DOUBLE_FROM_REAL_VALUE (r, mode); |
b6a524cb RS |
823 | } |
824 | #else | |
8aada4ad | 825 | { |
906c4e36 RK |
826 | union {HOST_WIDE_INT i[2]; double d; } u; |
827 | HOST_WIDE_INT low, high; | |
8aada4ad RK |
828 | |
829 | if (GET_CODE (x) == CONST_INT) | |
906c4e36 | 830 | low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1); |
8aada4ad RK |
831 | else |
832 | low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x); | |
833 | ||
834 | #ifdef HOST_WORDS_BIG_ENDIAN | |
835 | u.i[0] = high, u.i[1] = low; | |
836 | #else | |
837 | u.i[0] = low, u.i[1] = high; | |
838 | #endif | |
839 | ||
53596fba | 840 | return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode); |
8aada4ad | 841 | } |
b6a524cb | 842 | #endif |
a6a503ed JW |
843 | |
844 | /* We need an extra case for machines where HOST_BITS_PER_WIDE_INT is the | |
4926b75a JL |
845 | same as sizeof (double) or when sizeof (float) is larger than the |
846 | size of a word on the target machine. */ | |
a6a503ed | 847 | #ifdef REAL_ARITHMETIC |
4926b75a | 848 | else if (mode == SFmode && GET_CODE (x) == CONST_INT) |
a6a503ed JW |
849 | { |
850 | REAL_VALUE_TYPE r; | |
851 | HOST_WIDE_INT i; | |
852 | ||
853 | i = INTVAL (x); | |
854 | r = REAL_VALUE_FROM_TARGET_SINGLE (i); | |
855 | return CONST_DOUBLE_FROM_REAL_VALUE (r, mode); | |
856 | } | |
857 | #endif | |
858 | ||
b3bf132d RK |
859 | /* Similarly, if this is converting a floating-point value into a |
860 | single-word integer. Only do this is the host and target parameters are | |
861 | compatible. */ | |
862 | ||
863 | else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT | |
906c4e36 | 864 | && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD) |
b3bf132d | 865 | || flag_pretend_float) |
83e9c679 RK |
866 | && (GET_MODE_CLASS (mode) == MODE_INT |
867 | || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT) | |
b3bf132d RK |
868 | && GET_CODE (x) == CONST_DOUBLE |
869 | && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT | |
870 | && GET_MODE_BITSIZE (mode) == BITS_PER_WORD) | |
a80586cc | 871 | return operand_subword (x, word, 0, GET_MODE (x)); |
b3bf132d | 872 | |
8aada4ad RK |
873 | /* Similarly, if this is converting a floating-point value into a |
874 | two-word integer, we can do this one word at a time and make an | |
875 | integer. Only do this is the host and target parameters are | |
876 | compatible. */ | |
877 | ||
b3bf132d | 878 | else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT |
906c4e36 | 879 | && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD) |
b3bf132d | 880 | || flag_pretend_float) |
83e9c679 | 881 | && (GET_MODE_CLASS (mode) == MODE_INT |
f5a2fb25 | 882 | || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT) |
8aada4ad RK |
883 | && GET_CODE (x) == CONST_DOUBLE |
884 | && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT | |
885 | && GET_MODE_BITSIZE (mode) == 2 * BITS_PER_WORD) | |
886 | { | |
a80586cc RK |
887 | rtx lowpart |
888 | = operand_subword (x, word + WORDS_BIG_ENDIAN, 0, GET_MODE (x)); | |
889 | rtx highpart | |
890 | = operand_subword (x, word + ! WORDS_BIG_ENDIAN, 0, GET_MODE (x)); | |
8aada4ad RK |
891 | |
892 | if (lowpart && GET_CODE (lowpart) == CONST_INT | |
893 | && highpart && GET_CODE (highpart) == CONST_INT) | |
894 | return immed_double_const (INTVAL (lowpart), INTVAL (highpart), mode); | |
895 | } | |
896 | ||
23b2ce53 RS |
897 | /* Otherwise, we can't do this. */ |
898 | return 0; | |
899 | } | |
900 | \f | |
280194b0 RS |
901 | /* Return the real part (which has mode MODE) of a complex value X. |
902 | This always comes at the low address in memory. */ | |
903 | ||
904 | rtx | |
905 | gen_realpart (mode, x) | |
906 | enum machine_mode mode; | |
907 | register rtx x; | |
908 | { | |
dc139c90 RK |
909 | if (GET_CODE (x) == CONCAT && GET_MODE (XEXP (x, 0)) == mode) |
910 | return XEXP (x, 0); | |
911 | else if (WORDS_BIG_ENDIAN) | |
280194b0 RS |
912 | return gen_highpart (mode, x); |
913 | else | |
914 | return gen_lowpart (mode, x); | |
915 | } | |
916 | ||
917 | /* Return the imaginary part (which has mode MODE) of a complex value X. | |
918 | This always comes at the high address in memory. */ | |
919 | ||
920 | rtx | |
921 | gen_imagpart (mode, x) | |
922 | enum machine_mode mode; | |
923 | register rtx x; | |
924 | { | |
dc139c90 RK |
925 | if (GET_CODE (x) == CONCAT && GET_MODE (XEXP (x, 0)) == mode) |
926 | return XEXP (x, 1); | |
927 | else if (WORDS_BIG_ENDIAN) | |
280194b0 RS |
928 | return gen_lowpart (mode, x); |
929 | else | |
930 | return gen_highpart (mode, x); | |
931 | } | |
81284a6a JW |
932 | |
933 | /* Return 1 iff X, assumed to be a SUBREG, | |
934 | refers to the real part of the complex value in its containing reg. | |
935 | Complex values are always stored with the real part in the first word, | |
936 | regardless of WORDS_BIG_ENDIAN. */ | |
937 | ||
938 | int | |
939 | subreg_realpart_p (x) | |
940 | rtx x; | |
941 | { | |
942 | if (GET_CODE (x) != SUBREG) | |
943 | abort (); | |
944 | ||
ddc54eaa | 945 | return SUBREG_WORD (x) * UNITS_PER_WORD < GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x))); |
81284a6a | 946 | } |
280194b0 | 947 | \f |
23b2ce53 RS |
948 | /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value, |
949 | return an rtx (MEM, SUBREG, or CONST_INT) that refers to the | |
950 | least-significant part of X. | |
951 | MODE specifies how big a part of X to return; | |
952 | it usually should not be larger than a word. | |
953 | If X is a MEM whose address is a QUEUED, the value may be so also. */ | |
954 | ||
955 | rtx | |
956 | gen_lowpart (mode, x) | |
957 | enum machine_mode mode; | |
958 | register rtx x; | |
959 | { | |
960 | rtx result = gen_lowpart_common (mode, x); | |
961 | ||
962 | if (result) | |
963 | return result; | |
ea8262b0 RK |
964 | else if (GET_CODE (x) == REG) |
965 | { | |
966 | /* Must be a hard reg that's not valid in MODE. */ | |
967 | result = gen_lowpart_common (mode, copy_to_reg (x)); | |
968 | if (result == 0) | |
969 | abort (); | |
72c3833b | 970 | return result; |
ea8262b0 | 971 | } |
23b2ce53 RS |
972 | else if (GET_CODE (x) == MEM) |
973 | { | |
974 | /* The only additional case we can do is MEM. */ | |
975 | register int offset = 0; | |
976 | if (WORDS_BIG_ENDIAN) | |
977 | offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD) | |
978 | - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD)); | |
979 | ||
980 | if (BYTES_BIG_ENDIAN) | |
981 | /* Adjust the address so that the address-after-the-data | |
982 | is unchanged. */ | |
983 | offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode)) | |
984 | - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x)))); | |
985 | ||
986 | return change_address (x, mode, plus_constant (XEXP (x, 0), offset)); | |
987 | } | |
e9a25f70 JL |
988 | else if (GET_CODE (x) == ADDRESSOF) |
989 | return gen_lowpart (mode, force_reg (GET_MODE (x), x)); | |
23b2ce53 RS |
990 | else |
991 | abort (); | |
992 | } | |
993 | ||
ccba022b RS |
994 | /* Like `gen_lowpart', but refer to the most significant part. |
995 | This is used to access the imaginary part of a complex number. */ | |
996 | ||
997 | rtx | |
998 | gen_highpart (mode, x) | |
999 | enum machine_mode mode; | |
1000 | register rtx x; | |
1001 | { | |
1002 | /* This case loses if X is a subreg. To catch bugs early, | |
1003 | complain if an invalid MODE is used even in other cases. */ | |
1004 | if (GET_MODE_SIZE (mode) > UNITS_PER_WORD | |
1005 | && GET_MODE_SIZE (mode) != GET_MODE_UNIT_SIZE (GET_MODE (x))) | |
1006 | abort (); | |
1007 | if (GET_CODE (x) == CONST_DOUBLE | |
1632afca | 1008 | #if !(TARGET_FLOAT_FORMAT != HOST_FLOAT_FORMAT || defined (REAL_IS_NOT_DOUBLE)) |
ccba022b RS |
1009 | && GET_MODE_CLASS (GET_MODE (x)) != MODE_FLOAT |
1010 | #endif | |
1011 | ) | |
3b80f6ca | 1012 | return GEN_INT (CONST_DOUBLE_HIGH (x) & GET_MODE_MASK (mode)); |
ccba022b | 1013 | else if (GET_CODE (x) == CONST_INT) |
27eef9ce JC |
1014 | { |
1015 | if (HOST_BITS_PER_WIDE_INT <= BITS_PER_WORD) | |
1016 | return const0_rtx; | |
1017 | return GEN_INT (INTVAL (x) >> (HOST_BITS_PER_WIDE_INT - BITS_PER_WORD)); | |
1018 | } | |
ccba022b RS |
1019 | else if (GET_CODE (x) == MEM) |
1020 | { | |
1021 | register int offset = 0; | |
8698cce3 RK |
1022 | if (! WORDS_BIG_ENDIAN) |
1023 | offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD) | |
1024 | - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD)); | |
1025 | ||
1026 | if (! BYTES_BIG_ENDIAN | |
1027 | && GET_MODE_SIZE (mode) < UNITS_PER_WORD) | |
ccba022b RS |
1028 | offset -= (GET_MODE_SIZE (mode) |
1029 | - MIN (UNITS_PER_WORD, | |
1030 | GET_MODE_SIZE (GET_MODE (x)))); | |
8698cce3 | 1031 | |
ccba022b RS |
1032 | return change_address (x, mode, plus_constant (XEXP (x, 0), offset)); |
1033 | } | |
1034 | else if (GET_CODE (x) == SUBREG) | |
1035 | { | |
1036 | /* The only time this should occur is when we are looking at a | |
1037 | multi-word item with a SUBREG whose mode is the same as that of the | |
1038 | item. It isn't clear what we would do if it wasn't. */ | |
1039 | if (SUBREG_WORD (x) != 0) | |
1040 | abort (); | |
1041 | return gen_highpart (mode, SUBREG_REG (x)); | |
1042 | } | |
1043 | else if (GET_CODE (x) == REG) | |
1044 | { | |
6cca74ab | 1045 | int word; |
ccba022b | 1046 | |
4901a643 RH |
1047 | /* Let the backend decide how many registers to skip. This is needed |
1048 | in particular for sparc64 where fp regs are smaller than a word. */ | |
1049 | /* ??? Note that subregs are now ambiguous, in that those against | |
6cca74ab | 1050 | pseudos are sized by the word size, while those against hard |
4901a643 RH |
1051 | regs are sized by the underlying register size. Better would be |
1052 | to always interpret the subreg offset parameter as bytes or bits. */ | |
1053 | ||
6cca74ab GM |
1054 | if (WORDS_BIG_ENDIAN) |
1055 | word = 0; | |
1056 | else if (REGNO (x) < FIRST_PSEUDO_REGISTER) | |
4901a643 RH |
1057 | word = (HARD_REGNO_NREGS (REGNO (x), GET_MODE (x)) |
1058 | - HARD_REGNO_NREGS (REGNO (x), mode)); | |
6cca74ab GM |
1059 | else |
1060 | word = ((GET_MODE_SIZE (GET_MODE (x)) | |
1061 | - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD)) | |
1062 | / UNITS_PER_WORD); | |
3e4a14ef | 1063 | |
cb00f51a | 1064 | if (REGNO (x) < FIRST_PSEUDO_REGISTER |
0f41302f | 1065 | /* integrate.c can't handle parts of a return value register. */ |
4badc528 RS |
1066 | && (! REG_FUNCTION_VALUE_P (x) |
1067 | || ! rtx_equal_function_value_matters) | |
cb00f51a | 1068 | /* We want to keep the stack, frame, and arg pointers special. */ |
65e8fe02 | 1069 | && x != frame_pointer_rtx |
cb00f51a | 1070 | #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM |
65e8fe02 | 1071 | && x != arg_pointer_rtx |
cb00f51a | 1072 | #endif |
65e8fe02 | 1073 | && x != stack_pointer_rtx) |
3b80f6ca | 1074 | return gen_rtx_REG (mode, REGNO (x) + word); |
ccba022b | 1075 | else |
3b80f6ca | 1076 | return gen_rtx_SUBREG (mode, x, word); |
ccba022b RS |
1077 | } |
1078 | else | |
1079 | abort (); | |
1080 | } | |
1081 | ||
23b2ce53 RS |
1082 | /* Return 1 iff X, assumed to be a SUBREG, |
1083 | refers to the least significant part of its containing reg. | |
1084 | If X is not a SUBREG, always return 1 (it is its own low part!). */ | |
1085 | ||
1086 | int | |
1087 | subreg_lowpart_p (x) | |
1088 | rtx x; | |
1089 | { | |
1090 | if (GET_CODE (x) != SUBREG) | |
1091 | return 1; | |
a3a03040 RK |
1092 | else if (GET_MODE (SUBREG_REG (x)) == VOIDmode) |
1093 | return 0; | |
23b2ce53 RS |
1094 | |
1095 | if (WORDS_BIG_ENDIAN | |
1096 | && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) > UNITS_PER_WORD) | |
1097 | return (SUBREG_WORD (x) | |
1098 | == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) | |
1099 | - MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)) | |
1100 | / UNITS_PER_WORD)); | |
1101 | ||
1102 | return SUBREG_WORD (x) == 0; | |
1103 | } | |
1104 | \f | |
1105 | /* Return subword I of operand OP. | |
1106 | The word number, I, is interpreted as the word number starting at the | |
1107 | low-order address. Word 0 is the low-order word if not WORDS_BIG_ENDIAN, | |
1108 | otherwise it is the high-order word. | |
1109 | ||
1110 | If we cannot extract the required word, we return zero. Otherwise, an | |
1111 | rtx corresponding to the requested word will be returned. | |
1112 | ||
1113 | VALIDATE_ADDRESS is nonzero if the address should be validated. Before | |
1114 | reload has completed, a valid address will always be returned. After | |
1115 | reload, if a valid address cannot be returned, we return zero. | |
1116 | ||
1117 | If VALIDATE_ADDRESS is zero, we simply form the required address; validating | |
1118 | it is the responsibility of the caller. | |
1119 | ||
1120 | MODE is the mode of OP in case it is a CONST_INT. */ | |
1121 | ||
1122 | rtx | |
1123 | operand_subword (op, i, validate_address, mode) | |
1124 | rtx op; | |
1125 | int i; | |
1126 | int validate_address; | |
1127 | enum machine_mode mode; | |
1128 | { | |
906c4e36 RK |
1129 | HOST_WIDE_INT val; |
1130 | int size_ratio = HOST_BITS_PER_WIDE_INT / BITS_PER_WORD; | |
b15fd092 | 1131 | int bits_per_word = BITS_PER_WORD; |
23b2ce53 RS |
1132 | |
1133 | if (mode == VOIDmode) | |
1134 | mode = GET_MODE (op); | |
1135 | ||
1136 | if (mode == VOIDmode) | |
1137 | abort (); | |
1138 | ||
0003feb2 | 1139 | /* If OP is narrower than a word, fail. */ |
23b2ce53 | 1140 | if (mode != BLKmode |
0003feb2 | 1141 | && (GET_MODE_SIZE (mode) < UNITS_PER_WORD)) |
23b2ce53 | 1142 | return 0; |
0003feb2 VM |
1143 | |
1144 | /* If we want a word outside OP, return zero. */ | |
1145 | if (mode != BLKmode | |
1146 | && (i + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode)) | |
1147 | return const0_rtx; | |
23b2ce53 RS |
1148 | |
1149 | /* If OP is already an integer word, return it. */ | |
1150 | if (GET_MODE_CLASS (mode) == MODE_INT | |
1151 | && GET_MODE_SIZE (mode) == UNITS_PER_WORD) | |
1152 | return op; | |
1153 | ||
1154 | /* If OP is a REG or SUBREG, we can handle it very simply. */ | |
1155 | if (GET_CODE (op) == REG) | |
1156 | { | |
1157 | /* If the register is not valid for MODE, return 0. If we don't | |
1158 | do this, there is no way to fix up the resulting REG later. */ | |
1159 | if (REGNO (op) < FIRST_PSEUDO_REGISTER | |
1160 | && ! HARD_REGNO_MODE_OK (REGNO (op) + i, word_mode)) | |
1161 | return 0; | |
1162 | else if (REGNO (op) >= FIRST_PSEUDO_REGISTER | |
1163 | || (REG_FUNCTION_VALUE_P (op) | |
cb00f51a RK |
1164 | && rtx_equal_function_value_matters) |
1165 | /* We want to keep the stack, frame, and arg pointers | |
1166 | special. */ | |
65e8fe02 | 1167 | || op == frame_pointer_rtx |
cb00f51a | 1168 | #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM |
65e8fe02 | 1169 | || op == arg_pointer_rtx |
cb00f51a | 1170 | #endif |
65e8fe02 | 1171 | || op == stack_pointer_rtx) |
3b80f6ca | 1172 | return gen_rtx_SUBREG (word_mode, op, i); |
23b2ce53 | 1173 | else |
3b80f6ca | 1174 | return gen_rtx_REG (word_mode, REGNO (op) + i); |
23b2ce53 RS |
1175 | } |
1176 | else if (GET_CODE (op) == SUBREG) | |
3b80f6ca | 1177 | return gen_rtx_SUBREG (word_mode, SUBREG_REG (op), i + SUBREG_WORD (op)); |
fc84e8a8 RS |
1178 | else if (GET_CODE (op) == CONCAT) |
1179 | { | |
1180 | int partwords = GET_MODE_UNIT_SIZE (GET_MODE (op)) / UNITS_PER_WORD; | |
1181 | if (i < partwords) | |
1182 | return operand_subword (XEXP (op, 0), i, validate_address, mode); | |
1183 | return operand_subword (XEXP (op, 1), i - partwords, | |
1184 | validate_address, mode); | |
1185 | } | |
23b2ce53 RS |
1186 | |
1187 | /* Form a new MEM at the requested address. */ | |
1188 | if (GET_CODE (op) == MEM) | |
1189 | { | |
1190 | rtx addr = plus_constant (XEXP (op, 0), i * UNITS_PER_WORD); | |
1191 | rtx new; | |
1192 | ||
1193 | if (validate_address) | |
1194 | { | |
1195 | if (reload_completed) | |
1196 | { | |
1197 | if (! strict_memory_address_p (word_mode, addr)) | |
1198 | return 0; | |
1199 | } | |
1200 | else | |
1201 | addr = memory_address (word_mode, addr); | |
1202 | } | |
1203 | ||
3b80f6ca | 1204 | new = gen_rtx_MEM (word_mode, addr); |
23b2ce53 | 1205 | |
c6df88cb | 1206 | MEM_COPY_ATTRIBUTES (new, op); |
23b2ce53 RS |
1207 | RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (op); |
1208 | ||
1209 | return new; | |
1210 | } | |
1211 | ||
1212 | /* The only remaining cases are when OP is a constant. If the host and | |
1213 | target floating formats are the same, handling two-word floating | |
7677ffa4 | 1214 | constants are easy. Note that REAL_VALUE_TO_TARGET_{SINGLE,DOUBLE} |
9847c2f6 RK |
1215 | are defined as returning one or two 32 bit values, respectively, |
1216 | and not values of BITS_PER_WORD bits. */ | |
1632afca | 1217 | #ifdef REAL_ARITHMETIC |
9847c2f6 RK |
1218 | /* The output is some bits, the width of the target machine's word. |
1219 | A wider-word host can surely hold them in a CONST_INT. A narrower-word | |
1220 | host can't. */ | |
1221 | if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD | |
1632afca | 1222 | && GET_MODE_CLASS (mode) == MODE_FLOAT |
7677ffa4 | 1223 | && GET_MODE_BITSIZE (mode) == 64 |
1632afca RS |
1224 | && GET_CODE (op) == CONST_DOUBLE) |
1225 | { | |
9847c2f6 | 1226 | long k[2]; |
1632afca RS |
1227 | REAL_VALUE_TYPE rv; |
1228 | ||
1229 | REAL_VALUE_FROM_CONST_DOUBLE (rv, op); | |
1230 | REAL_VALUE_TO_TARGET_DOUBLE (rv, k); | |
7677ffa4 | 1231 | |
9847c2f6 | 1232 | /* We handle 32-bit and >= 64-bit words here. Note that the order in |
7677ffa4 RK |
1233 | which the words are written depends on the word endianness. |
1234 | ||
1235 | ??? This is a potential portability problem and should | |
1236 | be fixed at some point. */ | |
9847c2f6 RK |
1237 | if (BITS_PER_WORD == 32) |
1238 | return GEN_INT ((HOST_WIDE_INT) k[i]); | |
1239 | #if HOST_BITS_PER_WIDE_INT > 32 | |
1240 | else if (BITS_PER_WORD >= 64 && i == 0) | |
1241 | return GEN_INT ((((HOST_WIDE_INT) k[! WORDS_BIG_ENDIAN]) << 32) | |
1242 | | (HOST_WIDE_INT) k[WORDS_BIG_ENDIAN]); | |
1243 | #endif | |
47b34d40 JW |
1244 | else if (BITS_PER_WORD == 16) |
1245 | { | |
1246 | long value; | |
1247 | value = k[i >> 1]; | |
aa2ae679 | 1248 | if ((i & 0x1) == !WORDS_BIG_ENDIAN) |
47b34d40 JW |
1249 | value >>= 16; |
1250 | value &= 0xffff; | |
1251 | return GEN_INT ((HOST_WIDE_INT) value); | |
1252 | } | |
7677ffa4 RK |
1253 | else |
1254 | abort (); | |
1632afca | 1255 | } |
a5559dbc RE |
1256 | else if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD |
1257 | && GET_MODE_CLASS (mode) == MODE_FLOAT | |
1258 | && GET_MODE_BITSIZE (mode) > 64 | |
1259 | && GET_CODE (op) == CONST_DOUBLE) | |
1260 | { | |
1261 | long k[4]; | |
1262 | REAL_VALUE_TYPE rv; | |
1263 | ||
1264 | REAL_VALUE_FROM_CONST_DOUBLE (rv, op); | |
1265 | REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv, k); | |
1266 | ||
1267 | if (BITS_PER_WORD == 32) | |
1268 | return GEN_INT ((HOST_WIDE_INT) k[i]); | |
1269 | } | |
1632afca | 1270 | #else /* no REAL_ARITHMETIC */ |
23b2ce53 | 1271 | if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT |
906c4e36 | 1272 | && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD) |
23b2ce53 RS |
1273 | || flag_pretend_float) |
1274 | && GET_MODE_CLASS (mode) == MODE_FLOAT | |
1275 | && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD | |
1276 | && GET_CODE (op) == CONST_DOUBLE) | |
7529ac93 CH |
1277 | { |
1278 | /* The constant is stored in the host's word-ordering, | |
1279 | but we want to access it in the target's word-ordering. Some | |
1280 | compilers don't like a conditional inside macro args, so we have two | |
1281 | copies of the return. */ | |
2fe02d7e | 1282 | #ifdef HOST_WORDS_BIG_ENDIAN |
7529ac93 CH |
1283 | return GEN_INT (i == WORDS_BIG_ENDIAN |
1284 | ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op)); | |
2fe02d7e | 1285 | #else |
7529ac93 CH |
1286 | return GEN_INT (i != WORDS_BIG_ENDIAN |
1287 | ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op)); | |
2fe02d7e | 1288 | #endif |
7529ac93 | 1289 | } |
1632afca | 1290 | #endif /* no REAL_ARITHMETIC */ |
23b2ce53 RS |
1291 | |
1292 | /* Single word float is a little harder, since single- and double-word | |
1293 | values often do not have the same high-order bits. We have already | |
1294 | verified that we want the only defined word of the single-word value. */ | |
1632afca | 1295 | #ifdef REAL_ARITHMETIC |
9847c2f6 | 1296 | if (GET_MODE_CLASS (mode) == MODE_FLOAT |
7677ffa4 | 1297 | && GET_MODE_BITSIZE (mode) == 32 |
1632afca RS |
1298 | && GET_CODE (op) == CONST_DOUBLE) |
1299 | { | |
9847c2f6 | 1300 | long l; |
1632afca RS |
1301 | REAL_VALUE_TYPE rv; |
1302 | ||
1303 | REAL_VALUE_FROM_CONST_DOUBLE (rv, op); | |
1304 | REAL_VALUE_TO_TARGET_SINGLE (rv, l); | |
aa2ae679 | 1305 | |
b5a3eb84 JW |
1306 | /* If 32 bits is an entire word for the target, but not for the host, |
1307 | then sign-extend on the host so that the number will look the same | |
1308 | way on the host that it would on the target. See for instance | |
1309 | simplify_unary_operation. The #if is needed to avoid compiler | |
1310 | warnings. */ | |
1311 | ||
1312 | #if HOST_BITS_PER_LONG > 32 | |
1313 | if (BITS_PER_WORD < HOST_BITS_PER_LONG && BITS_PER_WORD == 32 | |
1314 | && (l & ((long) 1 << 31))) | |
1315 | l |= ((long) (-1) << 32); | |
1316 | #endif | |
1317 | ||
aa2ae679 JL |
1318 | if (BITS_PER_WORD == 16) |
1319 | { | |
1320 | if ((i & 0x1) == !WORDS_BIG_ENDIAN) | |
1321 | l >>= 16; | |
1322 | l &= 0xffff; | |
1323 | } | |
9847c2f6 | 1324 | return GEN_INT ((HOST_WIDE_INT) l); |
1632afca RS |
1325 | } |
1326 | #else | |
23b2ce53 | 1327 | if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT |
906c4e36 | 1328 | && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD) |
23b2ce53 | 1329 | || flag_pretend_float) |
e01a2cec | 1330 | && sizeof (float) * 8 == HOST_BITS_PER_WIDE_INT |
23b2ce53 RS |
1331 | && GET_MODE_CLASS (mode) == MODE_FLOAT |
1332 | && GET_MODE_SIZE (mode) == UNITS_PER_WORD | |
1333 | && GET_CODE (op) == CONST_DOUBLE) | |
1334 | { | |
1335 | double d; | |
906c4e36 | 1336 | union {float f; HOST_WIDE_INT i; } u; |
23b2ce53 RS |
1337 | |
1338 | REAL_VALUE_FROM_CONST_DOUBLE (d, op); | |
1339 | ||
1340 | u.f = d; | |
906c4e36 | 1341 | return GEN_INT (u.i); |
23b2ce53 | 1342 | } |
e01a2cec RK |
1343 | if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT |
1344 | && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD) | |
1345 | || flag_pretend_float) | |
1346 | && sizeof (double) * 8 == HOST_BITS_PER_WIDE_INT | |
1347 | && GET_MODE_CLASS (mode) == MODE_FLOAT | |
1348 | && GET_MODE_SIZE (mode) == UNITS_PER_WORD | |
1349 | && GET_CODE (op) == CONST_DOUBLE) | |
1350 | { | |
1351 | double d; | |
1352 | union {double d; HOST_WIDE_INT i; } u; | |
1353 | ||
1354 | REAL_VALUE_FROM_CONST_DOUBLE (d, op); | |
1355 | ||
1356 | u.d = d; | |
1357 | return GEN_INT (u.i); | |
1358 | } | |
1632afca | 1359 | #endif /* no REAL_ARITHMETIC */ |
23b2ce53 RS |
1360 | |
1361 | /* The only remaining cases that we can handle are integers. | |
1362 | Convert to proper endianness now since these cases need it. | |
1363 | At this point, i == 0 means the low-order word. | |
1364 | ||
2d4f57f8 RK |
1365 | We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT |
1366 | in general. However, if OP is (const_int 0), we can just return | |
1367 | it for any word. */ | |
1368 | ||
1369 | if (op == const0_rtx) | |
1370 | return op; | |
23b2ce53 RS |
1371 | |
1372 | if (GET_MODE_CLASS (mode) != MODE_INT | |
2d4f57f8 | 1373 | || (GET_CODE (op) != CONST_INT && GET_CODE (op) != CONST_DOUBLE) |
0cf214a0 | 1374 | || BITS_PER_WORD > HOST_BITS_PER_WIDE_INT) |
23b2ce53 RS |
1375 | return 0; |
1376 | ||
1377 | if (WORDS_BIG_ENDIAN) | |
1378 | i = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - i; | |
1379 | ||
1380 | /* Find out which word on the host machine this value is in and get | |
1381 | it from the constant. */ | |
1382 | val = (i / size_ratio == 0 | |
1383 | ? (GET_CODE (op) == CONST_INT ? INTVAL (op) : CONST_DOUBLE_LOW (op)) | |
1384 | : (GET_CODE (op) == CONST_INT | |
1385 | ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op))); | |
1386 | ||
3f518020 | 1387 | /* Get the value we want into the low bits of val. */ |
906c4e36 | 1388 | if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT) |
3f518020 JL |
1389 | val = ((val >> ((i % size_ratio) * BITS_PER_WORD))); |
1390 | ||
1391 | /* Clear the bits that don't belong in our mode, unless they and our sign | |
1392 | bit are all one. So we get either a reasonable negative value or a | |
1393 | reasonable unsigned value for this mode. */ | |
1394 | if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT | |
b15fd092 JL |
1395 | && ((val & ((HOST_WIDE_INT) (-1) << (bits_per_word - 1))) |
1396 | != ((HOST_WIDE_INT) (-1) << (bits_per_word - 1)))) | |
1397 | val &= ((HOST_WIDE_INT) 1 << bits_per_word) - 1; | |
3f518020 JL |
1398 | |
1399 | /* If this would be an entire word for the target, but is not for | |
1400 | the host, then sign-extend on the host so that the number will look | |
1401 | the same way on the host that it would on the target. | |
1402 | ||
1403 | For example, when building a 64 bit alpha hosted 32 bit sparc | |
1404 | targeted compiler, then we want the 32 bit unsigned value -1 to be | |
1405 | represented as a 64 bit value -1, and not as 0x00000000ffffffff. | |
1406 | The later confuses the sparc backend. */ | |
1407 | ||
1408 | if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT | |
b15fd092 JL |
1409 | && (val & ((HOST_WIDE_INT) 1 << (bits_per_word - 1)))) |
1410 | val |= ((HOST_WIDE_INT) (-1) << bits_per_word); | |
23b2ce53 | 1411 | |
906c4e36 | 1412 | return GEN_INT (val); |
23b2ce53 RS |
1413 | } |
1414 | ||
1415 | /* Similar to `operand_subword', but never return 0. If we can't extract | |
1416 | the required subword, put OP into a register and try again. If that fails, | |
1417 | abort. We always validate the address in this case. It is not valid | |
1418 | to call this function after reload; it is mostly meant for RTL | |
1419 | generation. | |
1420 | ||
1421 | MODE is the mode of OP, in case it is CONST_INT. */ | |
1422 | ||
1423 | rtx | |
1424 | operand_subword_force (op, i, mode) | |
1425 | rtx op; | |
1426 | int i; | |
1427 | enum machine_mode mode; | |
1428 | { | |
1429 | rtx result = operand_subword (op, i, 1, mode); | |
1430 | ||
1431 | if (result) | |
1432 | return result; | |
1433 | ||
1434 | if (mode != BLKmode && mode != VOIDmode) | |
77e6b0eb JC |
1435 | { |
1436 | /* If this is a register which can not be accessed by words, copy it | |
1437 | to a pseudo register. */ | |
1438 | if (GET_CODE (op) == REG) | |
1439 | op = copy_to_reg (op); | |
1440 | else | |
1441 | op = force_reg (mode, op); | |
1442 | } | |
23b2ce53 RS |
1443 | |
1444 | result = operand_subword (op, i, 1, mode); | |
1445 | if (result == 0) | |
1446 | abort (); | |
1447 | ||
1448 | return result; | |
1449 | } | |
1450 | \f | |
1451 | /* Given a compare instruction, swap the operands. | |
1452 | A test instruction is changed into a compare of 0 against the operand. */ | |
1453 | ||
1454 | void | |
1455 | reverse_comparison (insn) | |
1456 | rtx insn; | |
1457 | { | |
1458 | rtx body = PATTERN (insn); | |
1459 | rtx comp; | |
1460 | ||
1461 | if (GET_CODE (body) == SET) | |
1462 | comp = SET_SRC (body); | |
1463 | else | |
1464 | comp = SET_SRC (XVECEXP (body, 0, 0)); | |
1465 | ||
1466 | if (GET_CODE (comp) == COMPARE) | |
1467 | { | |
1468 | rtx op0 = XEXP (comp, 0); | |
1469 | rtx op1 = XEXP (comp, 1); | |
1470 | XEXP (comp, 0) = op1; | |
1471 | XEXP (comp, 1) = op0; | |
1472 | } | |
1473 | else | |
1474 | { | |
3b80f6ca | 1475 | rtx new = gen_rtx_COMPARE (VOIDmode, CONST0_RTX (GET_MODE (comp)), comp); |
23b2ce53 RS |
1476 | if (GET_CODE (body) == SET) |
1477 | SET_SRC (body) = new; | |
1478 | else | |
1479 | SET_SRC (XVECEXP (body, 0, 0)) = new; | |
1480 | } | |
1481 | } | |
1482 | \f | |
1483 | /* Return a memory reference like MEMREF, but with its mode changed | |
1484 | to MODE and its address changed to ADDR. | |
1485 | (VOIDmode means don't change the mode. | |
1486 | NULL for ADDR means don't change the address.) */ | |
1487 | ||
1488 | rtx | |
1489 | change_address (memref, mode, addr) | |
1490 | rtx memref; | |
1491 | enum machine_mode mode; | |
1492 | rtx addr; | |
1493 | { | |
1494 | rtx new; | |
1495 | ||
1496 | if (GET_CODE (memref) != MEM) | |
1497 | abort (); | |
1498 | if (mode == VOIDmode) | |
1499 | mode = GET_MODE (memref); | |
1500 | if (addr == 0) | |
1501 | addr = XEXP (memref, 0); | |
1502 | ||
1503 | /* If reload is in progress or has completed, ADDR must be valid. | |
1504 | Otherwise, we can call memory_address to make it valid. */ | |
1505 | if (reload_completed || reload_in_progress) | |
1506 | { | |
1507 | if (! memory_address_p (mode, addr)) | |
1508 | abort (); | |
1509 | } | |
1510 | else | |
1511 | addr = memory_address (mode, addr); | |
1512 | ||
9b04c6a8 RK |
1513 | if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref)) |
1514 | return memref; | |
1515 | ||
3b80f6ca | 1516 | new = gen_rtx_MEM (mode, addr); |
23b2ce53 | 1517 | RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (memref); |
c6df88cb | 1518 | MEM_COPY_ATTRIBUTES (new, memref); |
23b2ce53 RS |
1519 | return new; |
1520 | } | |
1521 | \f | |
1522 | /* Return a newly created CODE_LABEL rtx with a unique label number. */ | |
1523 | ||
1524 | rtx | |
1525 | gen_label_rtx () | |
1526 | { | |
ca695ac9 JB |
1527 | register rtx label; |
1528 | ||
b93a436e JL |
1529 | label = gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX, |
1530 | NULL_RTX, label_num++, NULL_PTR); | |
ca695ac9 | 1531 | |
23b2ce53 RS |
1532 | LABEL_NUSES (label) = 0; |
1533 | return label; | |
1534 | } | |
1535 | \f | |
1536 | /* For procedure integration. */ | |
1537 | ||
1538 | /* Return a newly created INLINE_HEADER rtx. Should allocate this | |
1539 | from a permanent obstack when the opportunity arises. */ | |
1540 | ||
1541 | rtx | |
1542 | gen_inline_header_rtx (first_insn, first_parm_insn, first_labelno, | |
1543 | last_labelno, max_parm_regnum, max_regnum, args_size, | |
a6108925 | 1544 | pops_args, stack_slots, forced_labels, function_flags, |
23b2ce53 | 1545 | outgoing_args_size, original_arg_vector, |
86fe05e0 | 1546 | original_decl_initial, regno_rtx, regno_flag, |
e9a25f70 | 1547 | regno_align, parm_reg_stack_loc) |
23b2ce53 RS |
1548 | rtx first_insn, first_parm_insn; |
1549 | int first_labelno, last_labelno, max_parm_regnum, max_regnum, args_size; | |
1550 | int pops_args; | |
1551 | rtx stack_slots; | |
a6108925 | 1552 | rtx forced_labels; |
23b2ce53 RS |
1553 | int function_flags; |
1554 | int outgoing_args_size; | |
1555 | rtvec original_arg_vector; | |
1556 | rtx original_decl_initial; | |
86fe05e0 RK |
1557 | rtvec regno_rtx; |
1558 | char *regno_flag; | |
1559 | char *regno_align; | |
e9a25f70 | 1560 | rtvec parm_reg_stack_loc; |
23b2ce53 | 1561 | { |
3b80f6ca RH |
1562 | rtx header = gen_rtx_INLINE_HEADER (VOIDmode, |
1563 | cur_insn_uid++, NULL_RTX, | |
1564 | first_insn, first_parm_insn, | |
1565 | first_labelno, last_labelno, | |
1566 | max_parm_regnum, max_regnum, args_size, | |
1567 | pops_args, stack_slots, forced_labels, | |
1568 | function_flags, outgoing_args_size, | |
1569 | original_arg_vector, | |
1570 | original_decl_initial, | |
1571 | regno_rtx, regno_flag, regno_align, | |
1572 | parm_reg_stack_loc); | |
23b2ce53 RS |
1573 | return header; |
1574 | } | |
1575 | ||
1576 | /* Install new pointers to the first and last insns in the chain. | |
86fe05e0 | 1577 | Also, set cur_insn_uid to one higher than the last in use. |
23b2ce53 RS |
1578 | Used for an inline-procedure after copying the insn chain. */ |
1579 | ||
1580 | void | |
1581 | set_new_first_and_last_insn (first, last) | |
1582 | rtx first, last; | |
1583 | { | |
86fe05e0 RK |
1584 | rtx insn; |
1585 | ||
23b2ce53 RS |
1586 | first_insn = first; |
1587 | last_insn = last; | |
86fe05e0 RK |
1588 | cur_insn_uid = 0; |
1589 | ||
1590 | for (insn = first; insn; insn = NEXT_INSN (insn)) | |
1591 | cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn)); | |
1592 | ||
1593 | cur_insn_uid++; | |
23b2ce53 RS |
1594 | } |
1595 | ||
1596 | /* Set the range of label numbers found in the current function. | |
1597 | This is used when belatedly compiling an inline function. */ | |
1598 | ||
1599 | void | |
1600 | set_new_first_and_last_label_num (first, last) | |
1601 | int first, last; | |
1602 | { | |
1603 | base_label_num = label_num; | |
1604 | first_label_num = first; | |
1605 | last_label_num = last; | |
1606 | } | |
1607 | \f | |
1608 | /* Save all variables describing the current status into the structure *P. | |
1609 | This is used before starting a nested function. */ | |
1610 | ||
1611 | void | |
1612 | save_emit_status (p) | |
1613 | struct function *p; | |
1614 | { | |
1615 | p->reg_rtx_no = reg_rtx_no; | |
1616 | p->first_label_num = first_label_num; | |
1617 | p->first_insn = first_insn; | |
1618 | p->last_insn = last_insn; | |
a25c7971 | 1619 | p->sequence_rtl_expr = sequence_rtl_expr; |
23b2ce53 RS |
1620 | p->sequence_stack = sequence_stack; |
1621 | p->cur_insn_uid = cur_insn_uid; | |
1622 | p->last_linenum = last_linenum; | |
1623 | p->last_filename = last_filename; | |
1624 | p->regno_pointer_flag = regno_pointer_flag; | |
86fe05e0 | 1625 | p->regno_pointer_align = regno_pointer_align; |
23b2ce53 RS |
1626 | p->regno_pointer_flag_length = regno_pointer_flag_length; |
1627 | p->regno_reg_rtx = regno_reg_rtx; | |
1628 | } | |
1629 | ||
1630 | /* Restore all variables describing the current status from the structure *P. | |
1631 | This is used after a nested function. */ | |
1632 | ||
1633 | void | |
1634 | restore_emit_status (p) | |
1635 | struct function *p; | |
1636 | { | |
1637 | int i; | |
1638 | ||
1639 | reg_rtx_no = p->reg_rtx_no; | |
1640 | first_label_num = p->first_label_num; | |
457a2d9c | 1641 | last_label_num = 0; |
23b2ce53 RS |
1642 | first_insn = p->first_insn; |
1643 | last_insn = p->last_insn; | |
a25c7971 | 1644 | sequence_rtl_expr = p->sequence_rtl_expr; |
23b2ce53 RS |
1645 | sequence_stack = p->sequence_stack; |
1646 | cur_insn_uid = p->cur_insn_uid; | |
1647 | last_linenum = p->last_linenum; | |
1648 | last_filename = p->last_filename; | |
1649 | regno_pointer_flag = p->regno_pointer_flag; | |
86fe05e0 | 1650 | regno_pointer_align = p->regno_pointer_align; |
23b2ce53 RS |
1651 | regno_pointer_flag_length = p->regno_pointer_flag_length; |
1652 | regno_reg_rtx = p->regno_reg_rtx; | |
1653 | ||
0f41302f MS |
1654 | /* Clear our cache of rtx expressions for start_sequence and |
1655 | gen_sequence. */ | |
23b2ce53 RS |
1656 | sequence_element_free_list = 0; |
1657 | for (i = 0; i < SEQUENCE_RESULT_SIZE; i++) | |
1658 | sequence_result[i] = 0; | |
43127294 RK |
1659 | |
1660 | free_insn = 0; | |
23b2ce53 RS |
1661 | } |
1662 | \f | |
1663 | /* Go through all the RTL insn bodies and copy any invalid shared structure. | |
1664 | It does not work to do this twice, because the mark bits set here | |
1665 | are not cleared afterwards. */ | |
1666 | ||
1667 | void | |
1668 | unshare_all_rtl (insn) | |
1669 | register rtx insn; | |
1670 | { | |
1671 | for (; insn; insn = NEXT_INSN (insn)) | |
1672 | if (GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN | |
1673 | || GET_CODE (insn) == CALL_INSN) | |
1674 | { | |
1675 | PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn)); | |
1676 | REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn)); | |
1677 | LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn)); | |
1678 | } | |
1679 | ||
1680 | /* Make sure the addresses of stack slots found outside the insn chain | |
1681 | (such as, in DECL_RTL of a variable) are not shared | |
1682 | with the insn chain. | |
1683 | ||
1684 | This special care is necessary when the stack slot MEM does not | |
1685 | actually appear in the insn chain. If it does appear, its address | |
1686 | is unshared from all else at that point. */ | |
1687 | ||
1688 | copy_rtx_if_shared (stack_slot_list); | |
1689 | } | |
1690 | ||
1691 | /* Mark ORIG as in use, and return a copy of it if it was already in use. | |
1692 | Recursively does the same for subexpressions. */ | |
1693 | ||
1694 | rtx | |
1695 | copy_rtx_if_shared (orig) | |
1696 | rtx orig; | |
1697 | { | |
1698 | register rtx x = orig; | |
1699 | register int i; | |
1700 | register enum rtx_code code; | |
1701 | register char *format_ptr; | |
1702 | int copied = 0; | |
1703 | ||
1704 | if (x == 0) | |
1705 | return 0; | |
1706 | ||
1707 | code = GET_CODE (x); | |
1708 | ||
1709 | /* These types may be freely shared. */ | |
1710 | ||
1711 | switch (code) | |
1712 | { | |
1713 | case REG: | |
1714 | case QUEUED: | |
1715 | case CONST_INT: | |
1716 | case CONST_DOUBLE: | |
1717 | case SYMBOL_REF: | |
1718 | case CODE_LABEL: | |
1719 | case PC: | |
1720 | case CC0: | |
1721 | case SCRATCH: | |
0f41302f | 1722 | /* SCRATCH must be shared because they represent distinct values. */ |
23b2ce53 RS |
1723 | return x; |
1724 | ||
b851ea09 RK |
1725 | case CONST: |
1726 | /* CONST can be shared if it contains a SYMBOL_REF. If it contains | |
1727 | a LABEL_REF, it isn't sharable. */ | |
1728 | if (GET_CODE (XEXP (x, 0)) == PLUS | |
1729 | && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF | |
1730 | && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT) | |
1731 | return x; | |
1732 | break; | |
1733 | ||
23b2ce53 RS |
1734 | case INSN: |
1735 | case JUMP_INSN: | |
1736 | case CALL_INSN: | |
1737 | case NOTE: | |
23b2ce53 RS |
1738 | case BARRIER: |
1739 | /* The chain of insns is not being copied. */ | |
1740 | return x; | |
1741 | ||
1742 | case MEM: | |
1743 | /* A MEM is allowed to be shared if its address is constant | |
1744 | or is a constant plus one of the special registers. */ | |
1745 | if (CONSTANT_ADDRESS_P (XEXP (x, 0)) | |
1746 | || XEXP (x, 0) == virtual_stack_vars_rtx | |
1747 | || XEXP (x, 0) == virtual_incoming_args_rtx) | |
1748 | return x; | |
1749 | ||
1750 | if (GET_CODE (XEXP (x, 0)) == PLUS | |
1751 | && (XEXP (XEXP (x, 0), 0) == virtual_stack_vars_rtx | |
1752 | || XEXP (XEXP (x, 0), 0) == virtual_incoming_args_rtx) | |
1753 | && CONSTANT_ADDRESS_P (XEXP (XEXP (x, 0), 1))) | |
1754 | { | |
1755 | /* This MEM can appear in more than one place, | |
1756 | but its address better not be shared with anything else. */ | |
1757 | if (! x->used) | |
1758 | XEXP (x, 0) = copy_rtx_if_shared (XEXP (x, 0)); | |
1759 | x->used = 1; | |
1760 | return x; | |
1761 | } | |
e9a25f70 JL |
1762 | break; |
1763 | ||
1764 | default: | |
1765 | break; | |
23b2ce53 RS |
1766 | } |
1767 | ||
1768 | /* This rtx may not be shared. If it has already been seen, | |
1769 | replace it with a copy of itself. */ | |
1770 | ||
1771 | if (x->used) | |
1772 | { | |
1773 | register rtx copy; | |
1774 | ||
1775 | copy = rtx_alloc (code); | |
4c9a05bc RK |
1776 | bcopy ((char *) x, (char *) copy, |
1777 | (sizeof (*copy) - sizeof (copy->fld) | |
1778 | + sizeof (copy->fld[0]) * GET_RTX_LENGTH (code))); | |
23b2ce53 RS |
1779 | x = copy; |
1780 | copied = 1; | |
1781 | } | |
1782 | x->used = 1; | |
1783 | ||
1784 | /* Now scan the subexpressions recursively. | |
1785 | We can store any replaced subexpressions directly into X | |
1786 | since we know X is not shared! Any vectors in X | |
1787 | must be copied if X was copied. */ | |
1788 | ||
1789 | format_ptr = GET_RTX_FORMAT (code); | |
1790 | ||
1791 | for (i = 0; i < GET_RTX_LENGTH (code); i++) | |
1792 | { | |
1793 | switch (*format_ptr++) | |
1794 | { | |
1795 | case 'e': | |
1796 | XEXP (x, i) = copy_rtx_if_shared (XEXP (x, i)); | |
1797 | break; | |
1798 | ||
1799 | case 'E': | |
1800 | if (XVEC (x, i) != NULL) | |
1801 | { | |
1802 | register int j; | |
f0722107 | 1803 | int len = XVECLEN (x, i); |
23b2ce53 | 1804 | |
f0722107 | 1805 | if (copied && len > 0) |
ba444f92 | 1806 | XVEC (x, i) = gen_rtvec_vv (len, XVEC (x, i)->elem); |
f0722107 RS |
1807 | for (j = 0; j < len; j++) |
1808 | XVECEXP (x, i, j) = copy_rtx_if_shared (XVECEXP (x, i, j)); | |
23b2ce53 RS |
1809 | } |
1810 | break; | |
1811 | } | |
1812 | } | |
1813 | return x; | |
1814 | } | |
1815 | ||
1816 | /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used | |
1817 | to look for shared sub-parts. */ | |
1818 | ||
1819 | void | |
1820 | reset_used_flags (x) | |
1821 | rtx x; | |
1822 | { | |
1823 | register int i, j; | |
1824 | register enum rtx_code code; | |
1825 | register char *format_ptr; | |
23b2ce53 RS |
1826 | |
1827 | if (x == 0) | |
1828 | return; | |
1829 | ||
1830 | code = GET_CODE (x); | |
1831 | ||
9faa82d8 | 1832 | /* These types may be freely shared so we needn't do any resetting |
23b2ce53 RS |
1833 | for them. */ |
1834 | ||
1835 | switch (code) | |
1836 | { | |
1837 | case REG: | |
1838 | case QUEUED: | |
1839 | case CONST_INT: | |
1840 | case CONST_DOUBLE: | |
1841 | case SYMBOL_REF: | |
1842 | case CODE_LABEL: | |
1843 | case PC: | |
1844 | case CC0: | |
1845 | return; | |
1846 | ||
1847 | case INSN: | |
1848 | case JUMP_INSN: | |
1849 | case CALL_INSN: | |
1850 | case NOTE: | |
1851 | case LABEL_REF: | |
1852 | case BARRIER: | |
1853 | /* The chain of insns is not being copied. */ | |
1854 | return; | |
e9a25f70 JL |
1855 | |
1856 | default: | |
1857 | break; | |
23b2ce53 RS |
1858 | } |
1859 | ||
1860 | x->used = 0; | |
1861 | ||
1862 | format_ptr = GET_RTX_FORMAT (code); | |
1863 | for (i = 0; i < GET_RTX_LENGTH (code); i++) | |
1864 | { | |
1865 | switch (*format_ptr++) | |
1866 | { | |
1867 | case 'e': | |
1868 | reset_used_flags (XEXP (x, i)); | |
1869 | break; | |
1870 | ||
1871 | case 'E': | |
1872 | for (j = 0; j < XVECLEN (x, i); j++) | |
1873 | reset_used_flags (XVECEXP (x, i, j)); | |
1874 | break; | |
1875 | } | |
1876 | } | |
1877 | } | |
1878 | \f | |
1879 | /* Copy X if necessary so that it won't be altered by changes in OTHER. | |
1880 | Return X or the rtx for the pseudo reg the value of X was copied into. | |
1881 | OTHER must be valid as a SET_DEST. */ | |
1882 | ||
1883 | rtx | |
1884 | make_safe_from (x, other) | |
1885 | rtx x, other; | |
1886 | { | |
1887 | while (1) | |
1888 | switch (GET_CODE (other)) | |
1889 | { | |
1890 | case SUBREG: | |
1891 | other = SUBREG_REG (other); | |
1892 | break; | |
1893 | case STRICT_LOW_PART: | |
1894 | case SIGN_EXTEND: | |
1895 | case ZERO_EXTEND: | |
1896 | other = XEXP (other, 0); | |
1897 | break; | |
1898 | default: | |
1899 | goto done; | |
1900 | } | |
1901 | done: | |
1902 | if ((GET_CODE (other) == MEM | |
1903 | && ! CONSTANT_P (x) | |
1904 | && GET_CODE (x) != REG | |
1905 | && GET_CODE (x) != SUBREG) | |
1906 | || (GET_CODE (other) == REG | |
1907 | && (REGNO (other) < FIRST_PSEUDO_REGISTER | |
1908 | || reg_mentioned_p (other, x)))) | |
1909 | { | |
1910 | rtx temp = gen_reg_rtx (GET_MODE (x)); | |
1911 | emit_move_insn (temp, x); | |
1912 | return temp; | |
1913 | } | |
1914 | return x; | |
1915 | } | |
1916 | \f | |
1917 | /* Emission of insns (adding them to the doubly-linked list). */ | |
1918 | ||
1919 | /* Return the first insn of the current sequence or current function. */ | |
1920 | ||
1921 | rtx | |
1922 | get_insns () | |
1923 | { | |
1924 | return first_insn; | |
1925 | } | |
1926 | ||
1927 | /* Return the last insn emitted in current sequence or current function. */ | |
1928 | ||
1929 | rtx | |
1930 | get_last_insn () | |
1931 | { | |
1932 | return last_insn; | |
1933 | } | |
1934 | ||
1935 | /* Specify a new insn as the last in the chain. */ | |
1936 | ||
1937 | void | |
1938 | set_last_insn (insn) | |
1939 | rtx insn; | |
1940 | { | |
1941 | if (NEXT_INSN (insn) != 0) | |
1942 | abort (); | |
1943 | last_insn = insn; | |
1944 | } | |
1945 | ||
1946 | /* Return the last insn emitted, even if it is in a sequence now pushed. */ | |
1947 | ||
1948 | rtx | |
1949 | get_last_insn_anywhere () | |
1950 | { | |
1951 | struct sequence_stack *stack; | |
1952 | if (last_insn) | |
1953 | return last_insn; | |
1954 | for (stack = sequence_stack; stack; stack = stack->next) | |
1955 | if (stack->last != 0) | |
1956 | return stack->last; | |
1957 | return 0; | |
1958 | } | |
1959 | ||
1960 | /* Return a number larger than any instruction's uid in this function. */ | |
1961 | ||
1962 | int | |
1963 | get_max_uid () | |
1964 | { | |
1965 | return cur_insn_uid; | |
1966 | } | |
1967 | \f | |
1968 | /* Return the next insn. If it is a SEQUENCE, return the first insn | |
1969 | of the sequence. */ | |
1970 | ||
1971 | rtx | |
1972 | next_insn (insn) | |
1973 | rtx insn; | |
1974 | { | |
1975 | if (insn) | |
1976 | { | |
1977 | insn = NEXT_INSN (insn); | |
1978 | if (insn && GET_CODE (insn) == INSN | |
1979 | && GET_CODE (PATTERN (insn)) == SEQUENCE) | |
1980 | insn = XVECEXP (PATTERN (insn), 0, 0); | |
1981 | } | |
1982 | ||
1983 | return insn; | |
1984 | } | |
1985 | ||
1986 | /* Return the previous insn. If it is a SEQUENCE, return the last insn | |
1987 | of the sequence. */ | |
1988 | ||
1989 | rtx | |
1990 | previous_insn (insn) | |
1991 | rtx insn; | |
1992 | { | |
1993 | if (insn) | |
1994 | { | |
1995 | insn = PREV_INSN (insn); | |
1996 | if (insn && GET_CODE (insn) == INSN | |
1997 | && GET_CODE (PATTERN (insn)) == SEQUENCE) | |
1998 | insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1); | |
1999 | } | |
2000 | ||
2001 | return insn; | |
2002 | } | |
2003 | ||
2004 | /* Return the next insn after INSN that is not a NOTE. This routine does not | |
2005 | look inside SEQUENCEs. */ | |
2006 | ||
2007 | rtx | |
2008 | next_nonnote_insn (insn) | |
2009 | rtx insn; | |
2010 | { | |
2011 | while (insn) | |
2012 | { | |
2013 | insn = NEXT_INSN (insn); | |
2014 | if (insn == 0 || GET_CODE (insn) != NOTE) | |
2015 | break; | |
2016 | } | |
2017 | ||
2018 | return insn; | |
2019 | } | |
2020 | ||
2021 | /* Return the previous insn before INSN that is not a NOTE. This routine does | |
2022 | not look inside SEQUENCEs. */ | |
2023 | ||
2024 | rtx | |
2025 | prev_nonnote_insn (insn) | |
2026 | rtx insn; | |
2027 | { | |
2028 | while (insn) | |
2029 | { | |
2030 | insn = PREV_INSN (insn); | |
2031 | if (insn == 0 || GET_CODE (insn) != NOTE) | |
2032 | break; | |
2033 | } | |
2034 | ||
2035 | return insn; | |
2036 | } | |
2037 | ||
2038 | /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN; | |
2039 | or 0, if there is none. This routine does not look inside | |
0f41302f | 2040 | SEQUENCEs. */ |
23b2ce53 RS |
2041 | |
2042 | rtx | |
2043 | next_real_insn (insn) | |
2044 | rtx insn; | |
2045 | { | |
2046 | while (insn) | |
2047 | { | |
2048 | insn = NEXT_INSN (insn); | |
2049 | if (insn == 0 || GET_CODE (insn) == INSN | |
2050 | || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN) | |
2051 | break; | |
2052 | } | |
2053 | ||
2054 | return insn; | |
2055 | } | |
2056 | ||
2057 | /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN; | |
2058 | or 0, if there is none. This routine does not look inside | |
2059 | SEQUENCEs. */ | |
2060 | ||
2061 | rtx | |
2062 | prev_real_insn (insn) | |
2063 | rtx insn; | |
2064 | { | |
2065 | while (insn) | |
2066 | { | |
2067 | insn = PREV_INSN (insn); | |
2068 | if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN | |
2069 | || GET_CODE (insn) == JUMP_INSN) | |
2070 | break; | |
2071 | } | |
2072 | ||
2073 | return insn; | |
2074 | } | |
2075 | ||
2076 | /* Find the next insn after INSN that really does something. This routine | |
2077 | does not look inside SEQUENCEs. Until reload has completed, this is the | |
2078 | same as next_real_insn. */ | |
2079 | ||
2080 | rtx | |
2081 | next_active_insn (insn) | |
2082 | rtx insn; | |
2083 | { | |
2084 | while (insn) | |
2085 | { | |
2086 | insn = NEXT_INSN (insn); | |
2087 | if (insn == 0 | |
2088 | || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN | |
2089 | || (GET_CODE (insn) == INSN | |
2090 | && (! reload_completed | |
2091 | || (GET_CODE (PATTERN (insn)) != USE | |
2092 | && GET_CODE (PATTERN (insn)) != CLOBBER)))) | |
2093 | break; | |
2094 | } | |
2095 | ||
2096 | return insn; | |
2097 | } | |
2098 | ||
2099 | /* Find the last insn before INSN that really does something. This routine | |
2100 | does not look inside SEQUENCEs. Until reload has completed, this is the | |
2101 | same as prev_real_insn. */ | |
2102 | ||
2103 | rtx | |
2104 | prev_active_insn (insn) | |
2105 | rtx insn; | |
2106 | { | |
2107 | while (insn) | |
2108 | { | |
2109 | insn = PREV_INSN (insn); | |
2110 | if (insn == 0 | |
2111 | || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN | |
2112 | || (GET_CODE (insn) == INSN | |
2113 | && (! reload_completed | |
2114 | || (GET_CODE (PATTERN (insn)) != USE | |
2115 | && GET_CODE (PATTERN (insn)) != CLOBBER)))) | |
2116 | break; | |
2117 | } | |
2118 | ||
2119 | return insn; | |
2120 | } | |
2121 | ||
2122 | /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */ | |
2123 | ||
2124 | rtx | |
2125 | next_label (insn) | |
2126 | rtx insn; | |
2127 | { | |
2128 | while (insn) | |
2129 | { | |
2130 | insn = NEXT_INSN (insn); | |
2131 | if (insn == 0 || GET_CODE (insn) == CODE_LABEL) | |
2132 | break; | |
2133 | } | |
2134 | ||
2135 | return insn; | |
2136 | } | |
2137 | ||
2138 | /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */ | |
2139 | ||
2140 | rtx | |
2141 | prev_label (insn) | |
2142 | rtx insn; | |
2143 | { | |
2144 | while (insn) | |
2145 | { | |
2146 | insn = PREV_INSN (insn); | |
2147 | if (insn == 0 || GET_CODE (insn) == CODE_LABEL) | |
2148 | break; | |
2149 | } | |
2150 | ||
2151 | return insn; | |
2152 | } | |
2153 | \f | |
2154 | #ifdef HAVE_cc0 | |
c572e5ba JVA |
2155 | /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER |
2156 | and REG_CC_USER notes so we can find it. */ | |
2157 | ||
2158 | void | |
2159 | link_cc0_insns (insn) | |
2160 | rtx insn; | |
2161 | { | |
2162 | rtx user = next_nonnote_insn (insn); | |
2163 | ||
2164 | if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE) | |
2165 | user = XVECEXP (PATTERN (user), 0, 0); | |
2166 | ||
3b80f6ca RH |
2167 | REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn, REG_NOTES (user)); |
2168 | REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_CC_USER, user, REG_NOTES (insn)); | |
c572e5ba JVA |
2169 | } |
2170 | ||
23b2ce53 RS |
2171 | /* Return the next insn that uses CC0 after INSN, which is assumed to |
2172 | set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter | |
2173 | applied to the result of this function should yield INSN). | |
2174 | ||
2175 | Normally, this is simply the next insn. However, if a REG_CC_USER note | |
2176 | is present, it contains the insn that uses CC0. | |
2177 | ||
2178 | Return 0 if we can't find the insn. */ | |
2179 | ||
2180 | rtx | |
2181 | next_cc0_user (insn) | |
2182 | rtx insn; | |
2183 | { | |
906c4e36 | 2184 | rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX); |
23b2ce53 RS |
2185 | |
2186 | if (note) | |
2187 | return XEXP (note, 0); | |
2188 | ||
2189 | insn = next_nonnote_insn (insn); | |
2190 | if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE) | |
2191 | insn = XVECEXP (PATTERN (insn), 0, 0); | |
2192 | ||
2193 | if (insn && GET_RTX_CLASS (GET_CODE (insn)) == 'i' | |
2194 | && reg_mentioned_p (cc0_rtx, PATTERN (insn))) | |
2195 | return insn; | |
2196 | ||
2197 | return 0; | |
2198 | } | |
2199 | ||
2200 | /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER | |
2201 | note, it is the previous insn. */ | |
2202 | ||
2203 | rtx | |
2204 | prev_cc0_setter (insn) | |
2205 | rtx insn; | |
2206 | { | |
906c4e36 | 2207 | rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX); |
23b2ce53 RS |
2208 | |
2209 | if (note) | |
2210 | return XEXP (note, 0); | |
2211 | ||
2212 | insn = prev_nonnote_insn (insn); | |
2213 | if (! sets_cc0_p (PATTERN (insn))) | |
2214 | abort (); | |
2215 | ||
2216 | return insn; | |
2217 | } | |
2218 | #endif | |
2219 | \f | |
2220 | /* Try splitting insns that can be split for better scheduling. | |
2221 | PAT is the pattern which might split. | |
2222 | TRIAL is the insn providing PAT. | |
11147ebe | 2223 | LAST is non-zero if we should return the last insn of the sequence produced. |
23b2ce53 RS |
2224 | |
2225 | If this routine succeeds in splitting, it returns the first or last | |
11147ebe | 2226 | replacement insn depending on the value of LAST. Otherwise, it |
23b2ce53 RS |
2227 | returns TRIAL. If the insn to be returned can be split, it will be. */ |
2228 | ||
2229 | rtx | |
11147ebe | 2230 | try_split (pat, trial, last) |
23b2ce53 | 2231 | rtx pat, trial; |
11147ebe | 2232 | int last; |
23b2ce53 RS |
2233 | { |
2234 | rtx before = PREV_INSN (trial); | |
2235 | rtx after = NEXT_INSN (trial); | |
2236 | rtx seq = split_insns (pat, trial); | |
2237 | int has_barrier = 0; | |
2238 | rtx tem; | |
2239 | ||
2240 | /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER. | |
2241 | We may need to handle this specially. */ | |
2242 | if (after && GET_CODE (after) == BARRIER) | |
2243 | { | |
2244 | has_barrier = 1; | |
2245 | after = NEXT_INSN (after); | |
2246 | } | |
2247 | ||
2248 | if (seq) | |
2249 | { | |
2250 | /* SEQ can either be a SEQUENCE or the pattern of a single insn. | |
2251 | The latter case will normally arise only when being done so that | |
2252 | it, in turn, will be split (SFmode on the 29k is an example). */ | |
2253 | if (GET_CODE (seq) == SEQUENCE) | |
2254 | { | |
2255 | /* If we are splitting a JUMP_INSN, look for the JUMP_INSN in | |
2256 | SEQ and copy our JUMP_LABEL to it. If JUMP_LABEL is non-zero, | |
2257 | increment the usage count so we don't delete the label. */ | |
2258 | int i; | |
2259 | ||
2260 | if (GET_CODE (trial) == JUMP_INSN) | |
2261 | for (i = XVECLEN (seq, 0) - 1; i >= 0; i--) | |
2262 | if (GET_CODE (XVECEXP (seq, 0, i)) == JUMP_INSN) | |
2263 | { | |
2264 | JUMP_LABEL (XVECEXP (seq, 0, i)) = JUMP_LABEL (trial); | |
2265 | ||
2266 | if (JUMP_LABEL (trial)) | |
2267 | LABEL_NUSES (JUMP_LABEL (trial))++; | |
2268 | } | |
2269 | ||
2270 | tem = emit_insn_after (seq, before); | |
2271 | ||
2272 | delete_insn (trial); | |
2273 | if (has_barrier) | |
2274 | emit_barrier_after (tem); | |
11147ebe RK |
2275 | |
2276 | /* Recursively call try_split for each new insn created; by the | |
2277 | time control returns here that insn will be fully split, so | |
2278 | set LAST and continue from the insn after the one returned. | |
f4a3cd05 | 2279 | We can't use next_active_insn here since AFTER may be a note. |
23886015 | 2280 | Ignore deleted insns, which can be occur if not optimizing. */ |
11147ebe RK |
2281 | for (tem = NEXT_INSN (before); tem != after; |
2282 | tem = NEXT_INSN (tem)) | |
23886015 RH |
2283 | if (! INSN_DELETED_P (tem) |
2284 | && GET_RTX_CLASS (GET_CODE (tem)) == 'i') | |
f4a3cd05 | 2285 | tem = try_split (PATTERN (tem), tem, 1); |
23b2ce53 RS |
2286 | } |
2287 | /* Avoid infinite loop if the result matches the original pattern. */ | |
2288 | else if (rtx_equal_p (seq, pat)) | |
2289 | return trial; | |
2290 | else | |
2291 | { | |
2292 | PATTERN (trial) = seq; | |
2293 | INSN_CODE (trial) = -1; | |
11147ebe | 2294 | try_split (seq, trial, last); |
23b2ce53 RS |
2295 | } |
2296 | ||
11147ebe RK |
2297 | /* Return either the first or the last insn, depending on which was |
2298 | requested. */ | |
2299 | return last ? prev_active_insn (after) : next_active_insn (before); | |
23b2ce53 RS |
2300 | } |
2301 | ||
2302 | return trial; | |
2303 | } | |
2304 | \f | |
2305 | /* Make and return an INSN rtx, initializing all its slots. | |
4b1f5e8c | 2306 | Store PATTERN in the pattern slots. */ |
23b2ce53 RS |
2307 | |
2308 | rtx | |
4b1f5e8c | 2309 | make_insn_raw (pattern) |
23b2ce53 | 2310 | rtx pattern; |
23b2ce53 RS |
2311 | { |
2312 | register rtx insn; | |
2313 | ||
43127294 RK |
2314 | /* If in RTL generation phase, see if FREE_INSN can be used. */ |
2315 | if (free_insn != 0 && rtx_equal_function_value_matters) | |
2316 | { | |
2317 | insn = free_insn; | |
2318 | free_insn = NEXT_INSN (free_insn); | |
2319 | PUT_CODE (insn, INSN); | |
2320 | } | |
2321 | else | |
2322 | insn = rtx_alloc (INSN); | |
23b2ce53 | 2323 | |
43127294 | 2324 | INSN_UID (insn) = cur_insn_uid++; |
23b2ce53 RS |
2325 | PATTERN (insn) = pattern; |
2326 | INSN_CODE (insn) = -1; | |
1632afca RS |
2327 | LOG_LINKS (insn) = NULL; |
2328 | REG_NOTES (insn) = NULL; | |
23b2ce53 RS |
2329 | |
2330 | return insn; | |
2331 | } | |
2332 | ||
2333 | /* Like `make_insn' but make a JUMP_INSN instead of an insn. */ | |
2334 | ||
2335 | static rtx | |
4b1f5e8c | 2336 | make_jump_insn_raw (pattern) |
23b2ce53 | 2337 | rtx pattern; |
23b2ce53 RS |
2338 | { |
2339 | register rtx insn; | |
2340 | ||
4b1f5e8c | 2341 | insn = rtx_alloc (JUMP_INSN); |
1632afca | 2342 | INSN_UID (insn) = cur_insn_uid++; |
23b2ce53 RS |
2343 | |
2344 | PATTERN (insn) = pattern; | |
2345 | INSN_CODE (insn) = -1; | |
1632afca RS |
2346 | LOG_LINKS (insn) = NULL; |
2347 | REG_NOTES (insn) = NULL; | |
2348 | JUMP_LABEL (insn) = NULL; | |
23b2ce53 RS |
2349 | |
2350 | return insn; | |
2351 | } | |
aff507f4 RK |
2352 | |
2353 | /* Like `make_insn' but make a CALL_INSN instead of an insn. */ | |
2354 | ||
2355 | static rtx | |
2356 | make_call_insn_raw (pattern) | |
2357 | rtx pattern; | |
2358 | { | |
2359 | register rtx insn; | |
2360 | ||
2361 | insn = rtx_alloc (CALL_INSN); | |
2362 | INSN_UID (insn) = cur_insn_uid++; | |
2363 | ||
2364 | PATTERN (insn) = pattern; | |
2365 | INSN_CODE (insn) = -1; | |
2366 | LOG_LINKS (insn) = NULL; | |
2367 | REG_NOTES (insn) = NULL; | |
2368 | CALL_INSN_FUNCTION_USAGE (insn) = NULL; | |
2369 | ||
2370 | return insn; | |
2371 | } | |
23b2ce53 RS |
2372 | \f |
2373 | /* Add INSN to the end of the doubly-linked list. | |
2374 | INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */ | |
2375 | ||
2376 | void | |
2377 | add_insn (insn) | |
2378 | register rtx insn; | |
2379 | { | |
2380 | PREV_INSN (insn) = last_insn; | |
2381 | NEXT_INSN (insn) = 0; | |
2382 | ||
2383 | if (NULL != last_insn) | |
2384 | NEXT_INSN (last_insn) = insn; | |
2385 | ||
2386 | if (NULL == first_insn) | |
2387 | first_insn = insn; | |
2388 | ||
2389 | last_insn = insn; | |
2390 | } | |
2391 | ||
a0ae8e8d RK |
2392 | /* Add INSN into the doubly-linked list after insn AFTER. This and |
2393 | the next should be the only functions called to insert an insn once | |
ba213285 | 2394 | delay slots have been filled since only they know how to update a |
a0ae8e8d | 2395 | SEQUENCE. */ |
23b2ce53 RS |
2396 | |
2397 | void | |
2398 | add_insn_after (insn, after) | |
2399 | rtx insn, after; | |
2400 | { | |
2401 | rtx next = NEXT_INSN (after); | |
2402 | ||
6782074d | 2403 | if (optimize && INSN_DELETED_P (after)) |
ba213285 RK |
2404 | abort (); |
2405 | ||
23b2ce53 RS |
2406 | NEXT_INSN (insn) = next; |
2407 | PREV_INSN (insn) = after; | |
2408 | ||
2409 | if (next) | |
2410 | { | |
2411 | PREV_INSN (next) = insn; | |
2412 | if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE) | |
2413 | PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn; | |
2414 | } | |
2415 | else if (last_insn == after) | |
2416 | last_insn = insn; | |
2417 | else | |
2418 | { | |
2419 | struct sequence_stack *stack = sequence_stack; | |
2420 | /* Scan all pending sequences too. */ | |
2421 | for (; stack; stack = stack->next) | |
2422 | if (after == stack->last) | |
fef0509b RK |
2423 | { |
2424 | stack->last = insn; | |
2425 | break; | |
2426 | } | |
a0ae8e8d RK |
2427 | |
2428 | if (stack == 0) | |
2429 | abort (); | |
23b2ce53 RS |
2430 | } |
2431 | ||
2432 | NEXT_INSN (after) = insn; | |
2433 | if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE) | |
2434 | { | |
2435 | rtx sequence = PATTERN (after); | |
2436 | NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn; | |
2437 | } | |
2438 | } | |
2439 | ||
a0ae8e8d RK |
2440 | /* Add INSN into the doubly-linked list before insn BEFORE. This and |
2441 | the previous should be the only functions called to insert an insn once | |
ba213285 | 2442 | delay slots have been filled since only they know how to update a |
a0ae8e8d RK |
2443 | SEQUENCE. */ |
2444 | ||
2445 | void | |
2446 | add_insn_before (insn, before) | |
2447 | rtx insn, before; | |
2448 | { | |
2449 | rtx prev = PREV_INSN (before); | |
2450 | ||
6782074d | 2451 | if (optimize && INSN_DELETED_P (before)) |
ba213285 RK |
2452 | abort (); |
2453 | ||
a0ae8e8d RK |
2454 | PREV_INSN (insn) = prev; |
2455 | NEXT_INSN (insn) = before; | |
2456 | ||
2457 | if (prev) | |
2458 | { | |
2459 | NEXT_INSN (prev) = insn; | |
2460 | if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE) | |
2461 | { | |
2462 | rtx sequence = PATTERN (prev); | |
2463 | NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn; | |
2464 | } | |
2465 | } | |
2466 | else if (first_insn == before) | |
2467 | first_insn = insn; | |
2468 | else | |
2469 | { | |
2470 | struct sequence_stack *stack = sequence_stack; | |
2471 | /* Scan all pending sequences too. */ | |
2472 | for (; stack; stack = stack->next) | |
2473 | if (before == stack->first) | |
fef0509b RK |
2474 | { |
2475 | stack->first = insn; | |
2476 | break; | |
2477 | } | |
a0ae8e8d RK |
2478 | |
2479 | if (stack == 0) | |
2480 | abort (); | |
2481 | } | |
2482 | ||
2483 | PREV_INSN (before) = insn; | |
2484 | if (GET_CODE (before) == INSN && GET_CODE (PATTERN (before)) == SEQUENCE) | |
2485 | PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn; | |
2486 | } | |
2487 | ||
89e99eea DB |
2488 | /* Remove an insn from its doubly-linked list. This function knows how |
2489 | to handle sequences. */ | |
2490 | void | |
2491 | remove_insn (insn) | |
2492 | rtx insn; | |
2493 | { | |
2494 | rtx next = NEXT_INSN (insn); | |
2495 | rtx prev = PREV_INSN (insn); | |
2496 | if (prev) | |
2497 | { | |
2498 | NEXT_INSN (prev) = next; | |
2499 | if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE) | |
2500 | { | |
2501 | rtx sequence = PATTERN (prev); | |
2502 | NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next; | |
2503 | } | |
2504 | } | |
2505 | else if (first_insn == insn) | |
2506 | first_insn = next; | |
2507 | else | |
2508 | { | |
2509 | struct sequence_stack *stack = sequence_stack; | |
2510 | /* Scan all pending sequences too. */ | |
2511 | for (; stack; stack = stack->next) | |
2512 | if (insn == stack->first) | |
2513 | { | |
2514 | stack->first = next; | |
2515 | break; | |
2516 | } | |
2517 | ||
2518 | if (stack == 0) | |
2519 | abort (); | |
2520 | } | |
2521 | ||
2522 | if (next) | |
2523 | { | |
2524 | PREV_INSN (next) = prev; | |
2525 | if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE) | |
2526 | PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev; | |
2527 | } | |
2528 | else if (last_insn == insn) | |
2529 | last_insn = prev; | |
2530 | else | |
2531 | { | |
2532 | struct sequence_stack *stack = sequence_stack; | |
2533 | /* Scan all pending sequences too. */ | |
2534 | for (; stack; stack = stack->next) | |
2535 | if (insn == stack->last) | |
2536 | { | |
2537 | stack->last = prev; | |
2538 | break; | |
2539 | } | |
2540 | ||
2541 | if (stack == 0) | |
2542 | abort (); | |
2543 | } | |
2544 | } | |
2545 | ||
23b2ce53 RS |
2546 | /* Delete all insns made since FROM. |
2547 | FROM becomes the new last instruction. */ | |
2548 | ||
2549 | void | |
2550 | delete_insns_since (from) | |
2551 | rtx from; | |
2552 | { | |
2553 | if (from == 0) | |
2554 | first_insn = 0; | |
2555 | else | |
2556 | NEXT_INSN (from) = 0; | |
2557 | last_insn = from; | |
2558 | } | |
2559 | ||
5dab5552 MS |
2560 | /* This function is deprecated, please use sequences instead. |
2561 | ||
2562 | Move a consecutive bunch of insns to a different place in the chain. | |
23b2ce53 RS |
2563 | The insns to be moved are those between FROM and TO. |
2564 | They are moved to a new position after the insn AFTER. | |
2565 | AFTER must not be FROM or TO or any insn in between. | |
2566 | ||
2567 | This function does not know about SEQUENCEs and hence should not be | |
2568 | called after delay-slot filling has been done. */ | |
2569 | ||
2570 | void | |
2571 | reorder_insns (from, to, after) | |
2572 | rtx from, to, after; | |
2573 | { | |
2574 | /* Splice this bunch out of where it is now. */ | |
2575 | if (PREV_INSN (from)) | |
2576 | NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to); | |
2577 | if (NEXT_INSN (to)) | |
2578 | PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from); | |
2579 | if (last_insn == to) | |
2580 | last_insn = PREV_INSN (from); | |
2581 | if (first_insn == from) | |
2582 | first_insn = NEXT_INSN (to); | |
2583 | ||
2584 | /* Make the new neighbors point to it and it to them. */ | |
2585 | if (NEXT_INSN (after)) | |
2586 | PREV_INSN (NEXT_INSN (after)) = to; | |
2587 | ||
2588 | NEXT_INSN (to) = NEXT_INSN (after); | |
2589 | PREV_INSN (from) = after; | |
2590 | NEXT_INSN (after) = from; | |
2591 | if (after == last_insn) | |
2592 | last_insn = to; | |
2593 | } | |
2594 | ||
2595 | /* Return the line note insn preceding INSN. */ | |
2596 | ||
2597 | static rtx | |
2598 | find_line_note (insn) | |
2599 | rtx insn; | |
2600 | { | |
2601 | if (no_line_numbers) | |
2602 | return 0; | |
2603 | ||
2604 | for (; insn; insn = PREV_INSN (insn)) | |
2605 | if (GET_CODE (insn) == NOTE | |
2606 | && NOTE_LINE_NUMBER (insn) >= 0) | |
2607 | break; | |
2608 | ||
2609 | return insn; | |
2610 | } | |
2611 | ||
2612 | /* Like reorder_insns, but inserts line notes to preserve the line numbers | |
2613 | of the moved insns when debugging. This may insert a note between AFTER | |
2614 | and FROM, and another one after TO. */ | |
2615 | ||
2616 | void | |
2617 | reorder_insns_with_line_notes (from, to, after) | |
2618 | rtx from, to, after; | |
2619 | { | |
2620 | rtx from_line = find_line_note (from); | |
2621 | rtx after_line = find_line_note (after); | |
2622 | ||
2623 | reorder_insns (from, to, after); | |
2624 | ||
2625 | if (from_line == after_line) | |
2626 | return; | |
2627 | ||
2628 | if (from_line) | |
2629 | emit_line_note_after (NOTE_SOURCE_FILE (from_line), | |
2630 | NOTE_LINE_NUMBER (from_line), | |
2631 | after); | |
2632 | if (after_line) | |
2633 | emit_line_note_after (NOTE_SOURCE_FILE (after_line), | |
2634 | NOTE_LINE_NUMBER (after_line), | |
2635 | to); | |
2636 | } | |
2637 | \f | |
2638 | /* Emit an insn of given code and pattern | |
2639 | at a specified place within the doubly-linked list. */ | |
2640 | ||
2641 | /* Make an instruction with body PATTERN | |
2642 | and output it before the instruction BEFORE. */ | |
2643 | ||
2644 | rtx | |
2645 | emit_insn_before (pattern, before) | |
2646 | register rtx pattern, before; | |
2647 | { | |
2648 | register rtx insn = before; | |
2649 | ||
2650 | if (GET_CODE (pattern) == SEQUENCE) | |
2651 | { | |
2652 | register int i; | |
2653 | ||
2654 | for (i = 0; i < XVECLEN (pattern, 0); i++) | |
2655 | { | |
2656 | insn = XVECEXP (pattern, 0, i); | |
a0ae8e8d | 2657 | add_insn_before (insn, before); |
23b2ce53 RS |
2658 | } |
2659 | if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE) | |
2660 | sequence_result[XVECLEN (pattern, 0)] = pattern; | |
2661 | } | |
2662 | else | |
2663 | { | |
4b1f5e8c | 2664 | insn = make_insn_raw (pattern); |
a0ae8e8d | 2665 | add_insn_before (insn, before); |
23b2ce53 RS |
2666 | } |
2667 | ||
2668 | return insn; | |
2669 | } | |
2670 | ||
2671 | /* Make an instruction with body PATTERN and code JUMP_INSN | |
2672 | and output it before the instruction BEFORE. */ | |
2673 | ||
2674 | rtx | |
2675 | emit_jump_insn_before (pattern, before) | |
2676 | register rtx pattern, before; | |
2677 | { | |
2678 | register rtx insn; | |
2679 | ||
2680 | if (GET_CODE (pattern) == SEQUENCE) | |
2681 | insn = emit_insn_before (pattern, before); | |
2682 | else | |
2683 | { | |
85cf32bc | 2684 | insn = make_jump_insn_raw (pattern); |
a0ae8e8d | 2685 | add_insn_before (insn, before); |
23b2ce53 RS |
2686 | } |
2687 | ||
2688 | return insn; | |
2689 | } | |
2690 | ||
2691 | /* Make an instruction with body PATTERN and code CALL_INSN | |
2692 | and output it before the instruction BEFORE. */ | |
2693 | ||
2694 | rtx | |
2695 | emit_call_insn_before (pattern, before) | |
2696 | register rtx pattern, before; | |
2697 | { | |
aff507f4 RK |
2698 | register rtx insn; |
2699 | ||
2700 | if (GET_CODE (pattern) == SEQUENCE) | |
2701 | insn = emit_insn_before (pattern, before); | |
2702 | else | |
2703 | { | |
2704 | insn = make_call_insn_raw (pattern); | |
a0ae8e8d | 2705 | add_insn_before (insn, before); |
aff507f4 RK |
2706 | PUT_CODE (insn, CALL_INSN); |
2707 | } | |
2708 | ||
23b2ce53 RS |
2709 | return insn; |
2710 | } | |
2711 | ||
2712 | /* Make an insn of code BARRIER | |
e881bb1b | 2713 | and output it before the insn BEFORE. */ |
23b2ce53 RS |
2714 | |
2715 | rtx | |
2716 | emit_barrier_before (before) | |
2717 | register rtx before; | |
2718 | { | |
2719 | register rtx insn = rtx_alloc (BARRIER); | |
2720 | ||
2721 | INSN_UID (insn) = cur_insn_uid++; | |
2722 | ||
a0ae8e8d | 2723 | add_insn_before (insn, before); |
23b2ce53 RS |
2724 | return insn; |
2725 | } | |
2726 | ||
e881bb1b RH |
2727 | /* Emit the label LABEL before the insn BEFORE. */ |
2728 | ||
2729 | rtx | |
2730 | emit_label_before (label, before) | |
2731 | rtx label, before; | |
2732 | { | |
2733 | /* This can be called twice for the same label as a result of the | |
2734 | confusion that follows a syntax error! So make it harmless. */ | |
2735 | if (INSN_UID (label) == 0) | |
2736 | { | |
2737 | INSN_UID (label) = cur_insn_uid++; | |
2738 | add_insn_before (label, before); | |
2739 | } | |
2740 | ||
2741 | return label; | |
2742 | } | |
2743 | ||
23b2ce53 RS |
2744 | /* Emit a note of subtype SUBTYPE before the insn BEFORE. */ |
2745 | ||
2746 | rtx | |
2747 | emit_note_before (subtype, before) | |
2748 | int subtype; | |
2749 | rtx before; | |
2750 | { | |
2751 | register rtx note = rtx_alloc (NOTE); | |
2752 | INSN_UID (note) = cur_insn_uid++; | |
2753 | NOTE_SOURCE_FILE (note) = 0; | |
2754 | NOTE_LINE_NUMBER (note) = subtype; | |
2755 | ||
a0ae8e8d | 2756 | add_insn_before (note, before); |
23b2ce53 RS |
2757 | return note; |
2758 | } | |
2759 | \f | |
2760 | /* Make an insn of code INSN with body PATTERN | |
2761 | and output it after the insn AFTER. */ | |
2762 | ||
2763 | rtx | |
2764 | emit_insn_after (pattern, after) | |
2765 | register rtx pattern, after; | |
2766 | { | |
2767 | register rtx insn = after; | |
2768 | ||
2769 | if (GET_CODE (pattern) == SEQUENCE) | |
2770 | { | |
2771 | register int i; | |
2772 | ||
2773 | for (i = 0; i < XVECLEN (pattern, 0); i++) | |
2774 | { | |
2775 | insn = XVECEXP (pattern, 0, i); | |
2776 | add_insn_after (insn, after); | |
2777 | after = insn; | |
2778 | } | |
2779 | if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE) | |
2780 | sequence_result[XVECLEN (pattern, 0)] = pattern; | |
2781 | } | |
2782 | else | |
2783 | { | |
4b1f5e8c | 2784 | insn = make_insn_raw (pattern); |
23b2ce53 RS |
2785 | add_insn_after (insn, after); |
2786 | } | |
2787 | ||
2788 | return insn; | |
2789 | } | |
2790 | ||
255680cf RK |
2791 | /* Similar to emit_insn_after, except that line notes are to be inserted so |
2792 | as to act as if this insn were at FROM. */ | |
2793 | ||
2794 | void | |
2795 | emit_insn_after_with_line_notes (pattern, after, from) | |
2796 | rtx pattern, after, from; | |
2797 | { | |
2798 | rtx from_line = find_line_note (from); | |
2799 | rtx after_line = find_line_note (after); | |
2800 | rtx insn = emit_insn_after (pattern, after); | |
2801 | ||
2802 | if (from_line) | |
2803 | emit_line_note_after (NOTE_SOURCE_FILE (from_line), | |
2804 | NOTE_LINE_NUMBER (from_line), | |
2805 | after); | |
2806 | ||
2807 | if (after_line) | |
2808 | emit_line_note_after (NOTE_SOURCE_FILE (after_line), | |
2809 | NOTE_LINE_NUMBER (after_line), | |
2810 | insn); | |
2811 | } | |
2812 | ||
23b2ce53 RS |
2813 | /* Make an insn of code JUMP_INSN with body PATTERN |
2814 | and output it after the insn AFTER. */ | |
2815 | ||
2816 | rtx | |
2817 | emit_jump_insn_after (pattern, after) | |
2818 | register rtx pattern, after; | |
2819 | { | |
2820 | register rtx insn; | |
2821 | ||
2822 | if (GET_CODE (pattern) == SEQUENCE) | |
2823 | insn = emit_insn_after (pattern, after); | |
2824 | else | |
2825 | { | |
85cf32bc | 2826 | insn = make_jump_insn_raw (pattern); |
23b2ce53 RS |
2827 | add_insn_after (insn, after); |
2828 | } | |
2829 | ||
2830 | return insn; | |
2831 | } | |
2832 | ||
2833 | /* Make an insn of code BARRIER | |
2834 | and output it after the insn AFTER. */ | |
2835 | ||
2836 | rtx | |
2837 | emit_barrier_after (after) | |
2838 | register rtx after; | |
2839 | { | |
2840 | register rtx insn = rtx_alloc (BARRIER); | |
2841 | ||
2842 | INSN_UID (insn) = cur_insn_uid++; | |
2843 | ||
2844 | add_insn_after (insn, after); | |
2845 | return insn; | |
2846 | } | |
2847 | ||
2848 | /* Emit the label LABEL after the insn AFTER. */ | |
2849 | ||
2850 | rtx | |
2851 | emit_label_after (label, after) | |
2852 | rtx label, after; | |
2853 | { | |
2854 | /* This can be called twice for the same label | |
2855 | as a result of the confusion that follows a syntax error! | |
2856 | So make it harmless. */ | |
2857 | if (INSN_UID (label) == 0) | |
2858 | { | |
2859 | INSN_UID (label) = cur_insn_uid++; | |
2860 | add_insn_after (label, after); | |
2861 | } | |
2862 | ||
2863 | return label; | |
2864 | } | |
2865 | ||
2866 | /* Emit a note of subtype SUBTYPE after the insn AFTER. */ | |
2867 | ||
2868 | rtx | |
2869 | emit_note_after (subtype, after) | |
2870 | int subtype; | |
2871 | rtx after; | |
2872 | { | |
2873 | register rtx note = rtx_alloc (NOTE); | |
2874 | INSN_UID (note) = cur_insn_uid++; | |
2875 | NOTE_SOURCE_FILE (note) = 0; | |
2876 | NOTE_LINE_NUMBER (note) = subtype; | |
2877 | add_insn_after (note, after); | |
2878 | return note; | |
2879 | } | |
2880 | ||
2881 | /* Emit a line note for FILE and LINE after the insn AFTER. */ | |
2882 | ||
2883 | rtx | |
2884 | emit_line_note_after (file, line, after) | |
2885 | char *file; | |
2886 | int line; | |
2887 | rtx after; | |
2888 | { | |
2889 | register rtx note; | |
2890 | ||
2891 | if (no_line_numbers && line > 0) | |
2892 | { | |
2893 | cur_insn_uid++; | |
2894 | return 0; | |
2895 | } | |
2896 | ||
2897 | note = rtx_alloc (NOTE); | |
2898 | INSN_UID (note) = cur_insn_uid++; | |
2899 | NOTE_SOURCE_FILE (note) = file; | |
2900 | NOTE_LINE_NUMBER (note) = line; | |
2901 | add_insn_after (note, after); | |
2902 | return note; | |
2903 | } | |
2904 | \f | |
2905 | /* Make an insn of code INSN with pattern PATTERN | |
2906 | and add it to the end of the doubly-linked list. | |
2907 | If PATTERN is a SEQUENCE, take the elements of it | |
2908 | and emit an insn for each element. | |
2909 | ||
2910 | Returns the last insn emitted. */ | |
2911 | ||
2912 | rtx | |
2913 | emit_insn (pattern) | |
2914 | rtx pattern; | |
2915 | { | |
2916 | rtx insn = last_insn; | |
2917 | ||
2918 | if (GET_CODE (pattern) == SEQUENCE) | |
2919 | { | |
2920 | register int i; | |
2921 | ||
2922 | for (i = 0; i < XVECLEN (pattern, 0); i++) | |
2923 | { | |
2924 | insn = XVECEXP (pattern, 0, i); | |
2925 | add_insn (insn); | |
2926 | } | |
2927 | if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE) | |
2928 | sequence_result[XVECLEN (pattern, 0)] = pattern; | |
2929 | } | |
2930 | else | |
2931 | { | |
4b1f5e8c | 2932 | insn = make_insn_raw (pattern); |
23b2ce53 RS |
2933 | add_insn (insn); |
2934 | } | |
2935 | ||
2936 | return insn; | |
2937 | } | |
2938 | ||
2939 | /* Emit the insns in a chain starting with INSN. | |
2940 | Return the last insn emitted. */ | |
2941 | ||
2942 | rtx | |
2943 | emit_insns (insn) | |
2944 | rtx insn; | |
2945 | { | |
2946 | rtx last = 0; | |
2947 | ||
2948 | while (insn) | |
2949 | { | |
2950 | rtx next = NEXT_INSN (insn); | |
2951 | add_insn (insn); | |
2952 | last = insn; | |
2953 | insn = next; | |
2954 | } | |
2955 | ||
2956 | return last; | |
2957 | } | |
2958 | ||
2959 | /* Emit the insns in a chain starting with INSN and place them in front of | |
2960 | the insn BEFORE. Return the last insn emitted. */ | |
2961 | ||
2962 | rtx | |
2963 | emit_insns_before (insn, before) | |
2964 | rtx insn; | |
2965 | rtx before; | |
2966 | { | |
2967 | rtx last = 0; | |
2968 | ||
2969 | while (insn) | |
2970 | { | |
2971 | rtx next = NEXT_INSN (insn); | |
a0ae8e8d | 2972 | add_insn_before (insn, before); |
23b2ce53 RS |
2973 | last = insn; |
2974 | insn = next; | |
2975 | } | |
2976 | ||
2977 | return last; | |
2978 | } | |
2979 | ||
e0a5c5eb RS |
2980 | /* Emit the insns in a chain starting with FIRST and place them in back of |
2981 | the insn AFTER. Return the last insn emitted. */ | |
2982 | ||
2983 | rtx | |
2984 | emit_insns_after (first, after) | |
2985 | register rtx first; | |
2986 | register rtx after; | |
2987 | { | |
2988 | register rtx last; | |
2989 | register rtx after_after; | |
2990 | ||
2991 | if (!after) | |
2992 | abort (); | |
2993 | ||
2994 | if (!first) | |
2995 | return first; | |
2996 | ||
2997 | for (last = first; NEXT_INSN (last); last = NEXT_INSN (last)) | |
2998 | continue; | |
2999 | ||
3000 | after_after = NEXT_INSN (after); | |
3001 | ||
3002 | NEXT_INSN (after) = first; | |
3003 | PREV_INSN (first) = after; | |
3004 | NEXT_INSN (last) = after_after; | |
3005 | if (after_after) | |
3006 | PREV_INSN (after_after) = last; | |
3007 | ||
c4d990db RS |
3008 | if (after == last_insn) |
3009 | last_insn = last; | |
e0a5c5eb RS |
3010 | return last; |
3011 | } | |
3012 | ||
23b2ce53 RS |
3013 | /* Make an insn of code JUMP_INSN with pattern PATTERN |
3014 | and add it to the end of the doubly-linked list. */ | |
3015 | ||
3016 | rtx | |
3017 | emit_jump_insn (pattern) | |
3018 | rtx pattern; | |
3019 | { | |
3020 | if (GET_CODE (pattern) == SEQUENCE) | |
3021 | return emit_insn (pattern); | |
3022 | else | |
3023 | { | |
85cf32bc | 3024 | register rtx insn = make_jump_insn_raw (pattern); |
23b2ce53 RS |
3025 | add_insn (insn); |
3026 | return insn; | |
3027 | } | |
3028 | } | |
3029 | ||
3030 | /* Make an insn of code CALL_INSN with pattern PATTERN | |
3031 | and add it to the end of the doubly-linked list. */ | |
3032 | ||
3033 | rtx | |
3034 | emit_call_insn (pattern) | |
3035 | rtx pattern; | |
3036 | { | |
3037 | if (GET_CODE (pattern) == SEQUENCE) | |
3038 | return emit_insn (pattern); | |
3039 | else | |
3040 | { | |
aff507f4 | 3041 | register rtx insn = make_call_insn_raw (pattern); |
23b2ce53 RS |
3042 | add_insn (insn); |
3043 | PUT_CODE (insn, CALL_INSN); | |
3044 | return insn; | |
3045 | } | |
3046 | } | |
3047 | ||
3048 | /* Add the label LABEL to the end of the doubly-linked list. */ | |
3049 | ||
3050 | rtx | |
3051 | emit_label (label) | |
3052 | rtx label; | |
3053 | { | |
3054 | /* This can be called twice for the same label | |
3055 | as a result of the confusion that follows a syntax error! | |
3056 | So make it harmless. */ | |
3057 | if (INSN_UID (label) == 0) | |
3058 | { | |
3059 | INSN_UID (label) = cur_insn_uid++; | |
3060 | add_insn (label); | |
3061 | } | |
3062 | return label; | |
3063 | } | |
3064 | ||
3065 | /* Make an insn of code BARRIER | |
3066 | and add it to the end of the doubly-linked list. */ | |
3067 | ||
3068 | rtx | |
3069 | emit_barrier () | |
3070 | { | |
3071 | register rtx barrier = rtx_alloc (BARRIER); | |
3072 | INSN_UID (barrier) = cur_insn_uid++; | |
3073 | add_insn (barrier); | |
3074 | return barrier; | |
3075 | } | |
3076 | ||
3077 | /* Make an insn of code NOTE | |
3078 | with data-fields specified by FILE and LINE | |
3079 | and add it to the end of the doubly-linked list, | |
3080 | but only if line-numbers are desired for debugging info. */ | |
3081 | ||
3082 | rtx | |
3083 | emit_line_note (file, line) | |
3084 | char *file; | |
3085 | int line; | |
3086 | { | |
3087 | emit_filename = file; | |
3088 | emit_lineno = line; | |
3089 | ||
3090 | #if 0 | |
3091 | if (no_line_numbers) | |
3092 | return 0; | |
3093 | #endif | |
3094 | ||
3095 | return emit_note (file, line); | |
3096 | } | |
3097 | ||
3098 | /* Make an insn of code NOTE | |
3099 | with data-fields specified by FILE and LINE | |
3100 | and add it to the end of the doubly-linked list. | |
3101 | If it is a line-number NOTE, omit it if it matches the previous one. */ | |
3102 | ||
3103 | rtx | |
3104 | emit_note (file, line) | |
3105 | char *file; | |
3106 | int line; | |
3107 | { | |
3108 | register rtx note; | |
3109 | ||
3110 | if (line > 0) | |
3111 | { | |
3112 | if (file && last_filename && !strcmp (file, last_filename) | |
3113 | && line == last_linenum) | |
3114 | return 0; | |
3115 | last_filename = file; | |
3116 | last_linenum = line; | |
3117 | } | |
3118 | ||
3119 | if (no_line_numbers && line > 0) | |
3120 | { | |
3121 | cur_insn_uid++; | |
3122 | return 0; | |
3123 | } | |
3124 | ||
3125 | note = rtx_alloc (NOTE); | |
3126 | INSN_UID (note) = cur_insn_uid++; | |
3127 | NOTE_SOURCE_FILE (note) = file; | |
3128 | NOTE_LINE_NUMBER (note) = line; | |
3129 | add_insn (note); | |
3130 | return note; | |
3131 | } | |
3132 | ||
fe77a034 | 3133 | /* Emit a NOTE, and don't omit it even if LINE is the previous note. */ |
23b2ce53 RS |
3134 | |
3135 | rtx | |
3136 | emit_line_note_force (file, line) | |
3137 | char *file; | |
3138 | int line; | |
3139 | { | |
3140 | last_linenum = -1; | |
3141 | return emit_line_note (file, line); | |
3142 | } | |
3143 | ||
3144 | /* Cause next statement to emit a line note even if the line number | |
3145 | has not changed. This is used at the beginning of a function. */ | |
3146 | ||
3147 | void | |
3148 | force_next_line_note () | |
3149 | { | |
3150 | last_linenum = -1; | |
3151 | } | |
87b47c85 AM |
3152 | |
3153 | /* Place a note of KIND on insn INSN with DATUM as the datum. If a | |
3154 | note of this type already exists, remove it first. */ | |
3155 | ||
3156 | void | |
3157 | set_unique_reg_note (insn, kind, datum) | |
3158 | rtx insn; | |
3159 | enum reg_note kind; | |
3160 | rtx datum; | |
3161 | { | |
3162 | rtx note = find_reg_note (insn, kind, NULL_RTX); | |
3163 | ||
3164 | /* First remove the note if there already is one. */ | |
3165 | if (note) | |
3166 | remove_note (insn, note); | |
3167 | ||
3168 | REG_NOTES (insn) = gen_rtx_EXPR_LIST (kind, datum, REG_NOTES (insn)); | |
3169 | } | |
23b2ce53 RS |
3170 | \f |
3171 | /* Return an indication of which type of insn should have X as a body. | |
3172 | The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */ | |
3173 | ||
3174 | enum rtx_code | |
3175 | classify_insn (x) | |
3176 | rtx x; | |
3177 | { | |
3178 | if (GET_CODE (x) == CODE_LABEL) | |
3179 | return CODE_LABEL; | |
3180 | if (GET_CODE (x) == CALL) | |
3181 | return CALL_INSN; | |
3182 | if (GET_CODE (x) == RETURN) | |
3183 | return JUMP_INSN; | |
3184 | if (GET_CODE (x) == SET) | |
3185 | { | |
3186 | if (SET_DEST (x) == pc_rtx) | |
3187 | return JUMP_INSN; | |
3188 | else if (GET_CODE (SET_SRC (x)) == CALL) | |
3189 | return CALL_INSN; | |
3190 | else | |
3191 | return INSN; | |
3192 | } | |
3193 | if (GET_CODE (x) == PARALLEL) | |
3194 | { | |
3195 | register int j; | |
3196 | for (j = XVECLEN (x, 0) - 1; j >= 0; j--) | |
3197 | if (GET_CODE (XVECEXP (x, 0, j)) == CALL) | |
3198 | return CALL_INSN; | |
3199 | else if (GET_CODE (XVECEXP (x, 0, j)) == SET | |
3200 | && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx) | |
3201 | return JUMP_INSN; | |
3202 | else if (GET_CODE (XVECEXP (x, 0, j)) == SET | |
3203 | && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL) | |
3204 | return CALL_INSN; | |
3205 | } | |
3206 | return INSN; | |
3207 | } | |
3208 | ||
3209 | /* Emit the rtl pattern X as an appropriate kind of insn. | |
3210 | If X is a label, it is simply added into the insn chain. */ | |
3211 | ||
3212 | rtx | |
3213 | emit (x) | |
3214 | rtx x; | |
3215 | { | |
3216 | enum rtx_code code = classify_insn (x); | |
3217 | ||
3218 | if (code == CODE_LABEL) | |
3219 | return emit_label (x); | |
3220 | else if (code == INSN) | |
3221 | return emit_insn (x); | |
3222 | else if (code == JUMP_INSN) | |
3223 | { | |
3224 | register rtx insn = emit_jump_insn (x); | |
3225 | if (simplejump_p (insn) || GET_CODE (x) == RETURN) | |
3226 | return emit_barrier (); | |
3227 | return insn; | |
3228 | } | |
3229 | else if (code == CALL_INSN) | |
3230 | return emit_call_insn (x); | |
3231 | else | |
3232 | abort (); | |
3233 | } | |
3234 | \f | |
3235 | /* Begin emitting insns to a sequence which can be packaged in an RTL_EXPR. */ | |
3236 | ||
3237 | void | |
3238 | start_sequence () | |
3239 | { | |
3240 | struct sequence_stack *tem; | |
3241 | ||
3242 | if (sequence_element_free_list) | |
3243 | { | |
3244 | /* Reuse a previously-saved struct sequence_stack. */ | |
3245 | tem = sequence_element_free_list; | |
3246 | sequence_element_free_list = tem->next; | |
3247 | } | |
3248 | else | |
3249 | tem = (struct sequence_stack *) permalloc (sizeof (struct sequence_stack)); | |
3250 | ||
3251 | tem->next = sequence_stack; | |
3252 | tem->first = first_insn; | |
3253 | tem->last = last_insn; | |
3ae24368 | 3254 | tem->sequence_rtl_expr = sequence_rtl_expr; |
23b2ce53 RS |
3255 | |
3256 | sequence_stack = tem; | |
3257 | ||
3258 | first_insn = 0; | |
3259 | last_insn = 0; | |
3260 | } | |
3261 | ||
a25c7971 RK |
3262 | /* Similarly, but indicate that this sequence will be placed in |
3263 | T, an RTL_EXPR. */ | |
3264 | ||
3265 | void | |
3266 | start_sequence_for_rtl_expr (t) | |
3267 | tree t; | |
3268 | { | |
3269 | start_sequence (); | |
3270 | ||
3271 | sequence_rtl_expr = t; | |
3272 | } | |
3273 | ||
23b2ce53 RS |
3274 | /* Set up the insn chain starting with FIRST |
3275 | as the current sequence, saving the previously current one. */ | |
3276 | ||
3277 | void | |
3278 | push_to_sequence (first) | |
3279 | rtx first; | |
3280 | { | |
3281 | rtx last; | |
3282 | ||
3283 | start_sequence (); | |
3284 | ||
3285 | for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last)); | |
3286 | ||
3287 | first_insn = first; | |
3288 | last_insn = last; | |
3289 | } | |
3290 | ||
f15ae3a1 TW |
3291 | /* Set up the outer-level insn chain |
3292 | as the current sequence, saving the previously current one. */ | |
3293 | ||
3294 | void | |
3295 | push_topmost_sequence () | |
3296 | { | |
aefdd5ab | 3297 | struct sequence_stack *stack, *top = NULL; |
f15ae3a1 TW |
3298 | |
3299 | start_sequence (); | |
3300 | ||
3301 | for (stack = sequence_stack; stack; stack = stack->next) | |
3302 | top = stack; | |
3303 | ||
3304 | first_insn = top->first; | |
3305 | last_insn = top->last; | |
629a4238 | 3306 | sequence_rtl_expr = top->sequence_rtl_expr; |
f15ae3a1 TW |
3307 | } |
3308 | ||
3309 | /* After emitting to the outer-level insn chain, update the outer-level | |
3310 | insn chain, and restore the previous saved state. */ | |
3311 | ||
3312 | void | |
3313 | pop_topmost_sequence () | |
3314 | { | |
aefdd5ab | 3315 | struct sequence_stack *stack, *top = NULL; |
f15ae3a1 TW |
3316 | |
3317 | for (stack = sequence_stack; stack; stack = stack->next) | |
3318 | top = stack; | |
3319 | ||
3320 | top->first = first_insn; | |
3321 | top->last = last_insn; | |
3ae24368 | 3322 | /* ??? Why don't we save sequence_rtl_expr here? */ |
f15ae3a1 TW |
3323 | |
3324 | end_sequence (); | |
3325 | } | |
3326 | ||
23b2ce53 RS |
3327 | /* After emitting to a sequence, restore previous saved state. |
3328 | ||
3329 | To get the contents of the sequence just made, | |
3330 | you must call `gen_sequence' *before* calling here. */ | |
3331 | ||
3332 | void | |
3333 | end_sequence () | |
3334 | { | |
3335 | struct sequence_stack *tem = sequence_stack; | |
3336 | ||
3337 | first_insn = tem->first; | |
3338 | last_insn = tem->last; | |
629a4238 | 3339 | sequence_rtl_expr = tem->sequence_rtl_expr; |
23b2ce53 RS |
3340 | sequence_stack = tem->next; |
3341 | ||
3342 | tem->next = sequence_element_free_list; | |
3343 | sequence_element_free_list = tem; | |
3344 | } | |
3345 | ||
3346 | /* Return 1 if currently emitting into a sequence. */ | |
3347 | ||
3348 | int | |
3349 | in_sequence_p () | |
3350 | { | |
3351 | return sequence_stack != 0; | |
3352 | } | |
3353 | ||
3354 | /* Generate a SEQUENCE rtx containing the insns already emitted | |
3355 | to the current sequence. | |
3356 | ||
3357 | This is how the gen_... function from a DEFINE_EXPAND | |
3358 | constructs the SEQUENCE that it returns. */ | |
3359 | ||
3360 | rtx | |
3361 | gen_sequence () | |
3362 | { | |
3363 | rtx result; | |
3364 | rtx tem; | |
23b2ce53 RS |
3365 | int i; |
3366 | int len; | |
3367 | ||
3368 | /* Count the insns in the chain. */ | |
3369 | len = 0; | |
3370 | for (tem = first_insn; tem; tem = NEXT_INSN (tem)) | |
3371 | len++; | |
3372 | ||
3373 | /* If only one insn, return its pattern rather than a SEQUENCE. | |
3374 | (Now that we cache SEQUENCE expressions, it isn't worth special-casing | |
3375 | the case of an empty list.) */ | |
3376 | if (len == 1 | |
ca55abae | 3377 | && ! RTX_FRAME_RELATED_P (first_insn) |
23b2ce53 RS |
3378 | && (GET_CODE (first_insn) == INSN |
3379 | || GET_CODE (first_insn) == JUMP_INSN | |
15d23f2b DE |
3380 | /* Don't discard the call usage field. */ |
3381 | || (GET_CODE (first_insn) == CALL_INSN | |
3382 | && CALL_INSN_FUNCTION_USAGE (first_insn) == NULL_RTX))) | |
43127294 RK |
3383 | { |
3384 | NEXT_INSN (first_insn) = free_insn; | |
3385 | free_insn = first_insn; | |
3386 | return PATTERN (first_insn); | |
3387 | } | |
23b2ce53 RS |
3388 | |
3389 | /* Put them in a vector. See if we already have a SEQUENCE of the | |
3390 | appropriate length around. */ | |
3391 | if (len < SEQUENCE_RESULT_SIZE && (result = sequence_result[len]) != 0) | |
3392 | sequence_result[len] = 0; | |
3393 | else | |
3394 | { | |
9faa82d8 RK |
3395 | /* Ensure that this rtl goes in saveable_obstack, since we may |
3396 | cache it. */ | |
d508ebba JW |
3397 | push_obstacks_nochange (); |
3398 | rtl_in_saveable_obstack (); | |
3b80f6ca | 3399 | result = gen_rtx_SEQUENCE (VOIDmode, rtvec_alloc (len)); |
d508ebba | 3400 | pop_obstacks (); |
23b2ce53 RS |
3401 | } |
3402 | ||
3403 | for (i = 0, tem = first_insn; tem; tem = NEXT_INSN (tem), i++) | |
3404 | XVECEXP (result, 0, i) = tem; | |
3405 | ||
3406 | return result; | |
3407 | } | |
3408 | \f | |
59ec66dc MM |
3409 | /* Put the various virtual registers into REGNO_REG_RTX. */ |
3410 | ||
3411 | void | |
3412 | init_virtual_regs () | |
3413 | { | |
3414 | regno_reg_rtx[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx; | |
3415 | regno_reg_rtx[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx; | |
3416 | regno_reg_rtx[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx; | |
3417 | regno_reg_rtx[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx; | |
3418 | regno_reg_rtx[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx; | |
3419 | } | |
3420 | ||
23b2ce53 RS |
3421 | /* Initialize data structures and variables in this file |
3422 | before generating rtl for each function. */ | |
3423 | ||
3424 | void | |
3425 | init_emit () | |
3426 | { | |
3427 | int i; | |
3428 | ||
3429 | first_insn = NULL; | |
3430 | last_insn = NULL; | |
a25c7971 | 3431 | sequence_rtl_expr = NULL; |
23b2ce53 RS |
3432 | cur_insn_uid = 1; |
3433 | reg_rtx_no = LAST_VIRTUAL_REGISTER + 1; | |
3434 | last_linenum = 0; | |
3435 | last_filename = 0; | |
3436 | first_label_num = label_num; | |
3437 | last_label_num = 0; | |
24d11a9a | 3438 | sequence_stack = NULL; |
23b2ce53 RS |
3439 | |
3440 | /* Clear the start_sequence/gen_sequence cache. */ | |
3441 | sequence_element_free_list = 0; | |
3442 | for (i = 0; i < SEQUENCE_RESULT_SIZE; i++) | |
3443 | sequence_result[i] = 0; | |
43127294 | 3444 | free_insn = 0; |
23b2ce53 RS |
3445 | |
3446 | /* Init the tables that describe all the pseudo regs. */ | |
3447 | ||
3448 | regno_pointer_flag_length = LAST_VIRTUAL_REGISTER + 101; | |
3449 | ||
3450 | regno_pointer_flag | |
86fe05e0 | 3451 | = (char *) savealloc (regno_pointer_flag_length); |
23b2ce53 RS |
3452 | bzero (regno_pointer_flag, regno_pointer_flag_length); |
3453 | ||
86fe05e0 RK |
3454 | regno_pointer_align |
3455 | = (char *) savealloc (regno_pointer_flag_length); | |
3456 | bzero (regno_pointer_align, regno_pointer_flag_length); | |
3457 | ||
23b2ce53 | 3458 | regno_reg_rtx |
86fe05e0 | 3459 | = (rtx *) savealloc (regno_pointer_flag_length * sizeof (rtx)); |
4c9a05bc | 3460 | bzero ((char *) regno_reg_rtx, regno_pointer_flag_length * sizeof (rtx)); |
23b2ce53 RS |
3461 | |
3462 | /* Put copies of all the virtual register rtx into regno_reg_rtx. */ | |
59ec66dc | 3463 | init_virtual_regs (); |
740ab4a2 RK |
3464 | |
3465 | /* Indicate that the virtual registers and stack locations are | |
3466 | all pointers. */ | |
3467 | REGNO_POINTER_FLAG (STACK_POINTER_REGNUM) = 1; | |
3468 | REGNO_POINTER_FLAG (FRAME_POINTER_REGNUM) = 1; | |
15c9248c | 3469 | REGNO_POINTER_FLAG (HARD_FRAME_POINTER_REGNUM) = 1; |
740ab4a2 RK |
3470 | REGNO_POINTER_FLAG (ARG_POINTER_REGNUM) = 1; |
3471 | ||
3472 | REGNO_POINTER_FLAG (VIRTUAL_INCOMING_ARGS_REGNUM) = 1; | |
3473 | REGNO_POINTER_FLAG (VIRTUAL_STACK_VARS_REGNUM) = 1; | |
3474 | REGNO_POINTER_FLAG (VIRTUAL_STACK_DYNAMIC_REGNUM) = 1; | |
3475 | REGNO_POINTER_FLAG (VIRTUAL_OUTGOING_ARGS_REGNUM) = 1; | |
71038426 | 3476 | REGNO_POINTER_FLAG (VIRTUAL_CFA_REGNUM) = 1; |
5e82e7bd | 3477 | |
86fe05e0 RK |
3478 | #ifdef STACK_BOUNDARY |
3479 | REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY / BITS_PER_UNIT; | |
3480 | REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY / BITS_PER_UNIT; | |
3481 | REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) | |
3482 | = STACK_BOUNDARY / BITS_PER_UNIT; | |
3483 | REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY / BITS_PER_UNIT; | |
3484 | ||
3485 | REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) | |
3486 | = STACK_BOUNDARY / BITS_PER_UNIT; | |
3487 | REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) | |
3488 | = STACK_BOUNDARY / BITS_PER_UNIT; | |
3489 | REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) | |
3490 | = STACK_BOUNDARY / BITS_PER_UNIT; | |
3491 | REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) | |
3492 | = STACK_BOUNDARY / BITS_PER_UNIT; | |
71038426 | 3493 | REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = UNITS_PER_WORD; |
86fe05e0 RK |
3494 | #endif |
3495 | ||
5e82e7bd JVA |
3496 | #ifdef INIT_EXPANDERS |
3497 | INIT_EXPANDERS; | |
3498 | #endif | |
23b2ce53 RS |
3499 | } |
3500 | ||
3501 | /* Create some permanent unique rtl objects shared between all functions. | |
3502 | LINE_NUMBERS is nonzero if line numbers are to be generated. */ | |
3503 | ||
3504 | void | |
3505 | init_emit_once (line_numbers) | |
3506 | int line_numbers; | |
3507 | { | |
3508 | int i; | |
3509 | enum machine_mode mode; | |
9ec36da5 | 3510 | enum machine_mode double_mode; |
23b2ce53 RS |
3511 | |
3512 | no_line_numbers = ! line_numbers; | |
3513 | ||
3514 | sequence_stack = NULL; | |
3515 | ||
1d445e9e ILT |
3516 | /* Compute the word and byte modes. */ |
3517 | ||
3518 | byte_mode = VOIDmode; | |
3519 | word_mode = VOIDmode; | |
9ec36da5 | 3520 | double_mode = VOIDmode; |
1d445e9e ILT |
3521 | |
3522 | for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode; | |
3523 | mode = GET_MODE_WIDER_MODE (mode)) | |
3524 | { | |
3525 | if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT | |
3526 | && byte_mode == VOIDmode) | |
3527 | byte_mode = mode; | |
3528 | ||
3529 | if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD | |
3530 | && word_mode == VOIDmode) | |
3531 | word_mode = mode; | |
3532 | } | |
3533 | ||
9ec36da5 JL |
3534 | #ifndef DOUBLE_TYPE_SIZE |
3535 | #define DOUBLE_TYPE_SIZE (BITS_PER_WORD * 2) | |
3536 | #endif | |
3537 | ||
3538 | for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode; | |
3539 | mode = GET_MODE_WIDER_MODE (mode)) | |
3540 | { | |
3541 | if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE | |
3542 | && double_mode == VOIDmode) | |
3543 | double_mode = mode; | |
3544 | } | |
3545 | ||
15c9248c RK |
3546 | ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0); |
3547 | ||
23b2ce53 RS |
3548 | /* Create the unique rtx's for certain rtx codes and operand values. */ |
3549 | ||
23b2ce53 RS |
3550 | for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++) |
3551 | { | |
68d75312 JC |
3552 | PUT_CODE (&const_int_rtx[i + MAX_SAVED_CONST_INT], CONST_INT); |
3553 | PUT_MODE (&const_int_rtx[i + MAX_SAVED_CONST_INT], VOIDmode); | |
3554 | INTVAL (&const_int_rtx[i + MAX_SAVED_CONST_INT]) = i; | |
23b2ce53 RS |
3555 | } |
3556 | ||
68d75312 JC |
3557 | if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT |
3558 | && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT) | |
3559 | const_true_rtx = &const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT]; | |
3560 | else | |
3b80f6ca | 3561 | const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE); |
23b2ce53 | 3562 | |
9ec36da5 JL |
3563 | dconst0 = REAL_VALUE_ATOF ("0", double_mode); |
3564 | dconst1 = REAL_VALUE_ATOF ("1", double_mode); | |
3565 | dconst2 = REAL_VALUE_ATOF ("2", double_mode); | |
3566 | dconstm1 = REAL_VALUE_ATOF ("-1", double_mode); | |
23b2ce53 RS |
3567 | |
3568 | for (i = 0; i <= 2; i++) | |
3569 | { | |
3570 | for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode; | |
3571 | mode = GET_MODE_WIDER_MODE (mode)) | |
3572 | { | |
3573 | rtx tem = rtx_alloc (CONST_DOUBLE); | |
3574 | union real_extract u; | |
3575 | ||
4c9a05bc | 3576 | bzero ((char *) &u, sizeof u); /* Zero any holes in a structure. */ |
23b2ce53 RS |
3577 | u.d = i == 0 ? dconst0 : i == 1 ? dconst1 : dconst2; |
3578 | ||
4c9a05bc | 3579 | bcopy ((char *) &u, (char *) &CONST_DOUBLE_LOW (tem), sizeof u); |
23b2ce53 RS |
3580 | CONST_DOUBLE_MEM (tem) = cc0_rtx; |
3581 | PUT_MODE (tem, mode); | |
3582 | ||
3583 | const_tiny_rtx[i][(int) mode] = tem; | |
3584 | } | |
3585 | ||
906c4e36 | 3586 | const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i); |
23b2ce53 RS |
3587 | |
3588 | for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode; | |
3589 | mode = GET_MODE_WIDER_MODE (mode)) | |
906c4e36 | 3590 | const_tiny_rtx[i][(int) mode] = GEN_INT (i); |
33d3e559 RS |
3591 | |
3592 | for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT); | |
3593 | mode != VOIDmode; | |
3594 | mode = GET_MODE_WIDER_MODE (mode)) | |
3595 | const_tiny_rtx[i][(int) mode] = GEN_INT (i); | |
23b2ce53 RS |
3596 | } |
3597 | ||
dfa09e23 TW |
3598 | for (mode = GET_CLASS_NARROWEST_MODE (MODE_CC); mode != VOIDmode; |
3599 | mode = GET_MODE_WIDER_MODE (mode)) | |
3600 | const_tiny_rtx[0][(int) mode] = const0_rtx; | |
3601 | ||
23b2ce53 | 3602 | |
68d75312 JC |
3603 | /* Assign register numbers to the globally defined register rtx. |
3604 | This must be done at runtime because the register number field | |
3605 | is in a union and some compilers can't initialize unions. */ | |
3606 | ||
3607 | REGNO (stack_pointer_rtx) = STACK_POINTER_REGNUM; | |
3608 | PUT_MODE (stack_pointer_rtx, Pmode); | |
3609 | REGNO (frame_pointer_rtx) = FRAME_POINTER_REGNUM; | |
3610 | PUT_MODE (frame_pointer_rtx, Pmode); | |
ffc3503d | 3611 | #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM |
68d75312 JC |
3612 | REGNO (hard_frame_pointer_rtx) = HARD_FRAME_POINTER_REGNUM; |
3613 | PUT_MODE (hard_frame_pointer_rtx, Pmode); | |
ffc3503d JL |
3614 | #endif |
3615 | #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM | |
68d75312 JC |
3616 | REGNO (arg_pointer_rtx) = ARG_POINTER_REGNUM; |
3617 | PUT_MODE (arg_pointer_rtx, Pmode); | |
ffc3503d | 3618 | #endif |
68d75312 JC |
3619 | |
3620 | REGNO (virtual_incoming_args_rtx) = VIRTUAL_INCOMING_ARGS_REGNUM; | |
3621 | PUT_MODE (virtual_incoming_args_rtx, Pmode); | |
3622 | REGNO (virtual_stack_vars_rtx) = VIRTUAL_STACK_VARS_REGNUM; | |
3623 | PUT_MODE (virtual_stack_vars_rtx, Pmode); | |
3624 | REGNO (virtual_stack_dynamic_rtx) = VIRTUAL_STACK_DYNAMIC_REGNUM; | |
3625 | PUT_MODE (virtual_stack_dynamic_rtx, Pmode); | |
3626 | REGNO (virtual_outgoing_args_rtx) = VIRTUAL_OUTGOING_ARGS_REGNUM; | |
3627 | PUT_MODE (virtual_outgoing_args_rtx, Pmode); | |
71038426 RH |
3628 | REGNO (virtual_cfa_rtx) = VIRTUAL_CFA_REGNUM; |
3629 | PUT_MODE (virtual_cfa_rtx, Pmode); | |
23b2ce53 | 3630 | |
a4417a86 | 3631 | #ifdef RETURN_ADDRESS_POINTER_REGNUM |
ffc3503d JL |
3632 | return_address_pointer_rtx |
3633 | = gen_rtx_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM); | |
a4417a86 JW |
3634 | #endif |
3635 | ||
23b2ce53 RS |
3636 | #ifdef STRUCT_VALUE |
3637 | struct_value_rtx = STRUCT_VALUE; | |
3638 | #else | |
3b80f6ca | 3639 | struct_value_rtx = gen_rtx_REG (Pmode, STRUCT_VALUE_REGNUM); |
23b2ce53 RS |
3640 | #endif |
3641 | ||
3642 | #ifdef STRUCT_VALUE_INCOMING | |
3643 | struct_value_incoming_rtx = STRUCT_VALUE_INCOMING; | |
3644 | #else | |
3645 | #ifdef STRUCT_VALUE_INCOMING_REGNUM | |
3646 | struct_value_incoming_rtx | |
3b80f6ca | 3647 | = gen_rtx_REG (Pmode, STRUCT_VALUE_INCOMING_REGNUM); |
23b2ce53 RS |
3648 | #else |
3649 | struct_value_incoming_rtx = struct_value_rtx; | |
3650 | #endif | |
3651 | #endif | |
3652 | ||
3653 | #ifdef STATIC_CHAIN_REGNUM | |
3b80f6ca | 3654 | static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM); |
23b2ce53 RS |
3655 | |
3656 | #ifdef STATIC_CHAIN_INCOMING_REGNUM | |
3657 | if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM) | |
3b80f6ca | 3658 | static_chain_incoming_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM); |
23b2ce53 RS |
3659 | else |
3660 | #endif | |
3661 | static_chain_incoming_rtx = static_chain_rtx; | |
3662 | #endif | |
3663 | ||
3664 | #ifdef STATIC_CHAIN | |
3665 | static_chain_rtx = STATIC_CHAIN; | |
3666 | ||
3667 | #ifdef STATIC_CHAIN_INCOMING | |
3668 | static_chain_incoming_rtx = STATIC_CHAIN_INCOMING; | |
3669 | #else | |
3670 | static_chain_incoming_rtx = static_chain_rtx; | |
3671 | #endif | |
3672 | #endif | |
3673 | ||
3674 | #ifdef PIC_OFFSET_TABLE_REGNUM | |
3b80f6ca | 3675 | pic_offset_table_rtx = gen_rtx_REG (Pmode, PIC_OFFSET_TABLE_REGNUM); |
23b2ce53 | 3676 | #endif |
990c642c JL |
3677 | |
3678 | #ifdef INIT_EXPANDERS | |
3679 | /* This is to initialize save_machine_status and restore_machine_status before | |
3680 | the first call to push_function_context_to. This is needed by the Chill | |
3681 | front end which calls push_function_context_to before the first cal to | |
3682 | init_function_start. */ | |
3683 | INIT_EXPANDERS; | |
3684 | #endif | |
23b2ce53 | 3685 | } |
a11759a3 JR |
3686 | \f |
3687 | /* Query and clear/ restore no_line_numbers. This is used by the | |
3688 | switch / case handling in stmt.c to give proper line numbers in | |
3689 | warnings about unreachable code. */ | |
3690 | ||
3691 | int | |
3692 | force_line_numbers () | |
3693 | { | |
3694 | int old = no_line_numbers; | |
3695 | ||
3696 | no_line_numbers = 0; | |
3697 | if (old) | |
3698 | force_next_line_note (); | |
3699 | return old; | |
3700 | } | |
3701 | ||
3702 | void | |
3703 | restore_line_number_status (old_value) | |
3704 | int old_value; | |
3705 | { | |
3706 | no_line_numbers = old_value; | |
3707 | } |