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Commit | Line | Data |
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23b2ce53 | 1 | /* Emit RTL for the GNU C-Compiler expander. |
ef58a523 | 2 | Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998, |
2cc2d4bb | 3 | 1999, 2000, 2001, 2002 Free Software Foundation, Inc. |
23b2ce53 | 4 | |
1322177d | 5 | This file is part of GCC. |
23b2ce53 | 6 | |
1322177d LB |
7 | GCC is free software; you can redistribute it and/or modify it under |
8 | the terms of the GNU General Public License as published by the Free | |
9 | Software Foundation; either version 2, or (at your option) any later | |
10 | version. | |
23b2ce53 | 11 | |
1322177d LB |
12 | GCC is distributed in the hope that it will be useful, but WITHOUT ANY |
13 | WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
14 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
15 | for more details. | |
23b2ce53 RS |
16 | |
17 | You should have received a copy of the GNU General Public License | |
1322177d LB |
18 | along with GCC; see the file COPYING. If not, write to the Free |
19 | Software Foundation, 59 Temple Place - Suite 330, Boston, MA | |
20 | 02111-1307, USA. */ | |
23b2ce53 RS |
21 | |
22 | ||
23 | /* Middle-to-low level generation of rtx code and insns. | |
24 | ||
25 | This file contains the functions `gen_rtx', `gen_reg_rtx' | |
26 | and `gen_label_rtx' that are the usual ways of creating rtl | |
27 | expressions for most purposes. | |
28 | ||
29 | It also has the functions for creating insns and linking | |
30 | them in the doubly-linked chain. | |
31 | ||
32 | The patterns of the insns are created by machine-dependent | |
33 | routines in insn-emit.c, which is generated automatically from | |
34 | the machine description. These routines use `gen_rtx' to make | |
35 | the individual rtx's of the pattern; what is machine dependent | |
36 | is the kind of rtx's they make and what arguments they use. */ | |
37 | ||
38 | #include "config.h" | |
670ee920 | 39 | #include "system.h" |
01198c2f | 40 | #include "toplev.h" |
23b2ce53 | 41 | #include "rtl.h" |
a25c7971 | 42 | #include "tree.h" |
6baf1cc8 | 43 | #include "tm_p.h" |
23b2ce53 RS |
44 | #include "flags.h" |
45 | #include "function.h" | |
46 | #include "expr.h" | |
47 | #include "regs.h" | |
aff48bca | 48 | #include "hard-reg-set.h" |
c13e8210 | 49 | #include "hashtab.h" |
23b2ce53 | 50 | #include "insn-config.h" |
e9a25f70 | 51 | #include "recog.h" |
23b2ce53 | 52 | #include "real.h" |
ca695ac9 | 53 | #include "obstack.h" |
0dfa1860 | 54 | #include "bitmap.h" |
a05924f9 | 55 | #include "basic-block.h" |
87ff9c8e | 56 | #include "ggc.h" |
e1772ac0 | 57 | #include "debug.h" |
d23c55c2 | 58 | #include "langhooks.h" |
ca695ac9 | 59 | |
1d445e9e ILT |
60 | /* Commonly used modes. */ |
61 | ||
0f41302f MS |
62 | enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */ |
63 | enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */ | |
9ec36da5 | 64 | enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */ |
0f41302f | 65 | enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */ |
1d445e9e | 66 | |
23b2ce53 RS |
67 | |
68 | /* This is *not* reset after each function. It gives each CODE_LABEL | |
69 | in the entire compilation a unique label number. */ | |
70 | ||
71 | static int label_num = 1; | |
72 | ||
23b2ce53 RS |
73 | /* Highest label number in current function. |
74 | Zero means use the value of label_num instead. | |
75 | This is nonzero only when belatedly compiling an inline function. */ | |
76 | ||
77 | static int last_label_num; | |
78 | ||
79 | /* Value label_num had when set_new_first_and_last_label_number was called. | |
80 | If label_num has not changed since then, last_label_num is valid. */ | |
81 | ||
82 | static int base_label_num; | |
83 | ||
84 | /* Nonzero means do not generate NOTEs for source line numbers. */ | |
85 | ||
86 | static int no_line_numbers; | |
87 | ||
88 | /* Commonly used rtx's, so that we only need space for one copy. | |
89 | These are initialized once for the entire compilation. | |
5692c7bc ZW |
90 | All of these are unique; no other rtx-object will be equal to any |
91 | of these. */ | |
23b2ce53 | 92 | |
5da077de | 93 | rtx global_rtl[GR_MAX]; |
23b2ce53 | 94 | |
6cde4876 JL |
95 | /* Commonly used RTL for hard registers. These objects are not necessarily |
96 | unique, so we allocate them separately from global_rtl. They are | |
97 | initialized once per compilation unit, then copied into regno_reg_rtx | |
98 | at the beginning of each function. */ | |
99 | static GTY(()) rtx static_regno_reg_rtx[FIRST_PSEUDO_REGISTER]; | |
100 | ||
23b2ce53 RS |
101 | /* We record floating-point CONST_DOUBLEs in each floating-point mode for |
102 | the values of 0, 1, and 2. For the integer entries and VOIDmode, we | |
103 | record a copy of const[012]_rtx. */ | |
104 | ||
105 | rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE]; | |
106 | ||
68d75312 JC |
107 | rtx const_true_rtx; |
108 | ||
23b2ce53 RS |
109 | REAL_VALUE_TYPE dconst0; |
110 | REAL_VALUE_TYPE dconst1; | |
111 | REAL_VALUE_TYPE dconst2; | |
112 | REAL_VALUE_TYPE dconstm1; | |
113 | ||
114 | /* All references to the following fixed hard registers go through | |
115 | these unique rtl objects. On machines where the frame-pointer and | |
116 | arg-pointer are the same register, they use the same unique object. | |
117 | ||
118 | After register allocation, other rtl objects which used to be pseudo-regs | |
119 | may be clobbered to refer to the frame-pointer register. | |
120 | But references that were originally to the frame-pointer can be | |
121 | distinguished from the others because they contain frame_pointer_rtx. | |
122 | ||
ac6f08b0 DE |
123 | When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little |
124 | tricky: until register elimination has taken place hard_frame_pointer_rtx | |
750c9258 | 125 | should be used if it is being set, and frame_pointer_rtx otherwise. After |
ac6f08b0 DE |
126 | register elimination hard_frame_pointer_rtx should always be used. |
127 | On machines where the two registers are same (most) then these are the | |
128 | same. | |
129 | ||
23b2ce53 RS |
130 | In an inline procedure, the stack and frame pointer rtxs may not be |
131 | used for anything else. */ | |
23b2ce53 RS |
132 | rtx struct_value_rtx; /* (REG:Pmode STRUCT_VALUE_REGNUM) */ |
133 | rtx struct_value_incoming_rtx; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */ | |
134 | rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */ | |
135 | rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */ | |
136 | rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */ | |
137 | ||
a4417a86 JW |
138 | /* This is used to implement __builtin_return_address for some machines. |
139 | See for instance the MIPS port. */ | |
140 | rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */ | |
141 | ||
23b2ce53 RS |
142 | /* We make one copy of (const_int C) where C is in |
143 | [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT] | |
144 | to save space during the compilation and simplify comparisons of | |
145 | integers. */ | |
146 | ||
5da077de | 147 | rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1]; |
23b2ce53 | 148 | |
c13e8210 MM |
149 | /* A hash table storing CONST_INTs whose absolute value is greater |
150 | than MAX_SAVED_CONST_INT. */ | |
151 | ||
e2500fed GK |
152 | static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def))) |
153 | htab_t const_int_htab; | |
c13e8210 | 154 | |
173b24b9 | 155 | /* A hash table storing memory attribute structures. */ |
e2500fed GK |
156 | static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs))) |
157 | htab_t mem_attrs_htab; | |
173b24b9 | 158 | |
5692c7bc | 159 | /* A hash table storing all CONST_DOUBLEs. */ |
e2500fed GK |
160 | static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def))) |
161 | htab_t const_double_htab; | |
5692c7bc | 162 | |
01d939e8 BS |
163 | #define first_insn (cfun->emit->x_first_insn) |
164 | #define last_insn (cfun->emit->x_last_insn) | |
165 | #define cur_insn_uid (cfun->emit->x_cur_insn_uid) | |
166 | #define last_linenum (cfun->emit->x_last_linenum) | |
167 | #define last_filename (cfun->emit->x_last_filename) | |
168 | #define first_label_num (cfun->emit->x_first_label_num) | |
23b2ce53 | 169 | |
711d877c KG |
170 | static rtx make_jump_insn_raw PARAMS ((rtx)); |
171 | static rtx make_call_insn_raw PARAMS ((rtx)); | |
172 | static rtx find_line_note PARAMS ((rtx)); | |
738cc472 RK |
173 | static rtx change_address_1 PARAMS ((rtx, enum machine_mode, rtx, |
174 | int)); | |
d1b81779 | 175 | static void unshare_all_rtl_1 PARAMS ((rtx)); |
5c6df058 | 176 | static void unshare_all_decls PARAMS ((tree)); |
2d4aecb3 | 177 | static void reset_used_decls PARAMS ((tree)); |
e5bef2e4 | 178 | static void mark_label_nuses PARAMS ((rtx)); |
c13e8210 MM |
179 | static hashval_t const_int_htab_hash PARAMS ((const void *)); |
180 | static int const_int_htab_eq PARAMS ((const void *, | |
181 | const void *)); | |
5692c7bc ZW |
182 | static hashval_t const_double_htab_hash PARAMS ((const void *)); |
183 | static int const_double_htab_eq PARAMS ((const void *, | |
184 | const void *)); | |
185 | static rtx lookup_const_double PARAMS ((rtx)); | |
173b24b9 RK |
186 | static hashval_t mem_attrs_htab_hash PARAMS ((const void *)); |
187 | static int mem_attrs_htab_eq PARAMS ((const void *, | |
188 | const void *)); | |
173b24b9 | 189 | static mem_attrs *get_mem_attrs PARAMS ((HOST_WIDE_INT, tree, rtx, |
10b76d73 RK |
190 | rtx, unsigned int, |
191 | enum machine_mode)); | |
998d7deb | 192 | static tree component_ref_for_mem_expr PARAMS ((tree)); |
ff88fe10 | 193 | static rtx gen_const_vector_0 PARAMS ((enum machine_mode)); |
c13e8210 | 194 | |
6b24c259 JH |
195 | /* Probability of the conditional branch currently proceeded by try_split. |
196 | Set to -1 otherwise. */ | |
197 | int split_branch_probability = -1; | |
ca695ac9 | 198 | \f |
c13e8210 MM |
199 | /* Returns a hash code for X (which is a really a CONST_INT). */ |
200 | ||
201 | static hashval_t | |
202 | const_int_htab_hash (x) | |
203 | const void *x; | |
204 | { | |
5692c7bc | 205 | return (hashval_t) INTVAL ((struct rtx_def *) x); |
c13e8210 MM |
206 | } |
207 | ||
208 | /* Returns non-zero if the value represented by X (which is really a | |
209 | CONST_INT) is the same as that given by Y (which is really a | |
210 | HOST_WIDE_INT *). */ | |
211 | ||
212 | static int | |
213 | const_int_htab_eq (x, y) | |
214 | const void *x; | |
215 | const void *y; | |
216 | { | |
5692c7bc ZW |
217 | return (INTVAL ((rtx) x) == *((const HOST_WIDE_INT *) y)); |
218 | } | |
219 | ||
220 | /* Returns a hash code for X (which is really a CONST_DOUBLE). */ | |
221 | static hashval_t | |
222 | const_double_htab_hash (x) | |
223 | const void *x; | |
224 | { | |
225 | hashval_t h = 0; | |
226 | size_t i; | |
227 | rtx value = (rtx) x; | |
228 | ||
229 | for (i = 0; i < sizeof(CONST_DOUBLE_FORMAT)-1; i++) | |
230 | h ^= XWINT (value, i); | |
231 | return h; | |
232 | } | |
233 | ||
234 | /* Returns non-zero if the value represented by X (really a ...) | |
235 | is the same as that represented by Y (really a ...) */ | |
236 | static int | |
237 | const_double_htab_eq (x, y) | |
238 | const void *x; | |
239 | const void *y; | |
240 | { | |
241 | rtx a = (rtx)x, b = (rtx)y; | |
242 | size_t i; | |
243 | ||
244 | if (GET_MODE (a) != GET_MODE (b)) | |
245 | return 0; | |
246 | for (i = 0; i < sizeof(CONST_DOUBLE_FORMAT)-1; i++) | |
247 | if (XWINT (a, i) != XWINT (b, i)) | |
248 | return 0; | |
249 | ||
250 | return 1; | |
c13e8210 MM |
251 | } |
252 | ||
173b24b9 RK |
253 | /* Returns a hash code for X (which is a really a mem_attrs *). */ |
254 | ||
255 | static hashval_t | |
256 | mem_attrs_htab_hash (x) | |
257 | const void *x; | |
258 | { | |
259 | mem_attrs *p = (mem_attrs *) x; | |
260 | ||
261 | return (p->alias ^ (p->align * 1000) | |
262 | ^ ((p->offset ? INTVAL (p->offset) : 0) * 50000) | |
263 | ^ ((p->size ? INTVAL (p->size) : 0) * 2500000) | |
998d7deb | 264 | ^ (size_t) p->expr); |
173b24b9 RK |
265 | } |
266 | ||
267 | /* Returns non-zero if the value represented by X (which is really a | |
268 | mem_attrs *) is the same as that given by Y (which is also really a | |
269 | mem_attrs *). */ | |
c13e8210 MM |
270 | |
271 | static int | |
173b24b9 RK |
272 | mem_attrs_htab_eq (x, y) |
273 | const void *x; | |
274 | const void *y; | |
c13e8210 | 275 | { |
173b24b9 RK |
276 | mem_attrs *p = (mem_attrs *) x; |
277 | mem_attrs *q = (mem_attrs *) y; | |
278 | ||
998d7deb | 279 | return (p->alias == q->alias && p->expr == q->expr && p->offset == q->offset |
173b24b9 | 280 | && p->size == q->size && p->align == q->align); |
c13e8210 MM |
281 | } |
282 | ||
173b24b9 | 283 | /* Allocate a new mem_attrs structure and insert it into the hash table if |
10b76d73 RK |
284 | one identical to it is not already in the table. We are doing this for |
285 | MEM of mode MODE. */ | |
173b24b9 RK |
286 | |
287 | static mem_attrs * | |
998d7deb | 288 | get_mem_attrs (alias, expr, offset, size, align, mode) |
173b24b9 | 289 | HOST_WIDE_INT alias; |
998d7deb | 290 | tree expr; |
173b24b9 RK |
291 | rtx offset; |
292 | rtx size; | |
293 | unsigned int align; | |
10b76d73 | 294 | enum machine_mode mode; |
173b24b9 RK |
295 | { |
296 | mem_attrs attrs; | |
297 | void **slot; | |
298 | ||
10b76d73 | 299 | /* If everything is the default, we can just return zero. */ |
998d7deb | 300 | if (alias == 0 && expr == 0 && offset == 0 |
10b76d73 RK |
301 | && (size == 0 |
302 | || (mode != BLKmode && GET_MODE_SIZE (mode) == INTVAL (size))) | |
916f389b | 303 | && (align == BITS_PER_UNIT |
917afb0c RK |
304 | || (STRICT_ALIGNMENT |
305 | && mode != BLKmode && align == GET_MODE_ALIGNMENT (mode)))) | |
10b76d73 RK |
306 | return 0; |
307 | ||
173b24b9 | 308 | attrs.alias = alias; |
998d7deb | 309 | attrs.expr = expr; |
173b24b9 RK |
310 | attrs.offset = offset; |
311 | attrs.size = size; | |
312 | attrs.align = align; | |
313 | ||
314 | slot = htab_find_slot (mem_attrs_htab, &attrs, INSERT); | |
315 | if (*slot == 0) | |
316 | { | |
317 | *slot = ggc_alloc (sizeof (mem_attrs)); | |
318 | memcpy (*slot, &attrs, sizeof (mem_attrs)); | |
319 | } | |
320 | ||
321 | return *slot; | |
c13e8210 MM |
322 | } |
323 | ||
08394eef BS |
324 | /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and |
325 | don't attempt to share with the various global pieces of rtl (such as | |
326 | frame_pointer_rtx). */ | |
327 | ||
328 | rtx | |
329 | gen_raw_REG (mode, regno) | |
330 | enum machine_mode mode; | |
331 | int regno; | |
332 | { | |
333 | rtx x = gen_rtx_raw_REG (mode, regno); | |
334 | ORIGINAL_REGNO (x) = regno; | |
335 | return x; | |
336 | } | |
337 | ||
c5c76735 JL |
338 | /* There are some RTL codes that require special attention; the generation |
339 | functions do the raw handling. If you add to this list, modify | |
340 | special_rtx in gengenrtl.c as well. */ | |
341 | ||
3b80f6ca RH |
342 | rtx |
343 | gen_rtx_CONST_INT (mode, arg) | |
c13e8210 | 344 | enum machine_mode mode ATTRIBUTE_UNUSED; |
3b80f6ca RH |
345 | HOST_WIDE_INT arg; |
346 | { | |
c13e8210 MM |
347 | void **slot; |
348 | ||
3b80f6ca | 349 | if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT) |
5da077de | 350 | return const_int_rtx[arg + MAX_SAVED_CONST_INT]; |
3b80f6ca RH |
351 | |
352 | #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1 | |
353 | if (const_true_rtx && arg == STORE_FLAG_VALUE) | |
354 | return const_true_rtx; | |
355 | #endif | |
356 | ||
c13e8210 | 357 | /* Look up the CONST_INT in the hash table. */ |
e38992e8 RK |
358 | slot = htab_find_slot_with_hash (const_int_htab, &arg, |
359 | (hashval_t) arg, INSERT); | |
29105cea | 360 | if (*slot == 0) |
1f8f4a0b | 361 | *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg); |
c13e8210 MM |
362 | |
363 | return (rtx) *slot; | |
3b80f6ca RH |
364 | } |
365 | ||
2496c7bd LB |
366 | rtx |
367 | gen_int_mode (c, mode) | |
368 | HOST_WIDE_INT c; | |
369 | enum machine_mode mode; | |
370 | { | |
371 | return GEN_INT (trunc_int_for_mode (c, mode)); | |
372 | } | |
373 | ||
5692c7bc ZW |
374 | /* CONST_DOUBLEs might be created from pairs of integers, or from |
375 | REAL_VALUE_TYPEs. Also, their length is known only at run time, | |
376 | so we cannot use gen_rtx_raw_CONST_DOUBLE. */ | |
377 | ||
378 | /* Determine whether REAL, a CONST_DOUBLE, already exists in the | |
379 | hash table. If so, return its counterpart; otherwise add it | |
380 | to the hash table and return it. */ | |
381 | static rtx | |
382 | lookup_const_double (real) | |
383 | rtx real; | |
384 | { | |
385 | void **slot = htab_find_slot (const_double_htab, real, INSERT); | |
386 | if (*slot == 0) | |
387 | *slot = real; | |
388 | ||
389 | return (rtx) *slot; | |
390 | } | |
29105cea | 391 | |
5692c7bc ZW |
392 | /* Return a CONST_DOUBLE rtx for a floating-point value specified by |
393 | VALUE in mode MODE. */ | |
0133b7d9 | 394 | rtx |
5692c7bc ZW |
395 | const_double_from_real_value (value, mode) |
396 | REAL_VALUE_TYPE value; | |
0133b7d9 | 397 | enum machine_mode mode; |
0133b7d9 | 398 | { |
5692c7bc ZW |
399 | rtx real = rtx_alloc (CONST_DOUBLE); |
400 | PUT_MODE (real, mode); | |
401 | ||
402 | memcpy (&CONST_DOUBLE_LOW (real), &value, sizeof (REAL_VALUE_TYPE)); | |
403 | ||
404 | return lookup_const_double (real); | |
405 | } | |
406 | ||
407 | /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair | |
408 | of ints: I0 is the low-order word and I1 is the high-order word. | |
409 | Do not use this routine for non-integer modes; convert to | |
410 | REAL_VALUE_TYPE and use CONST_DOUBLE_FROM_REAL_VALUE. */ | |
411 | ||
412 | rtx | |
413 | immed_double_const (i0, i1, mode) | |
414 | HOST_WIDE_INT i0, i1; | |
415 | enum machine_mode mode; | |
416 | { | |
417 | rtx value; | |
418 | unsigned int i; | |
419 | ||
420 | if (mode != VOIDmode) | |
421 | { | |
422 | int width; | |
423 | if (GET_MODE_CLASS (mode) != MODE_INT | |
cb2a532e AH |
424 | && GET_MODE_CLASS (mode) != MODE_PARTIAL_INT |
425 | /* We can get a 0 for an error mark. */ | |
426 | && GET_MODE_CLASS (mode) != MODE_VECTOR_INT | |
427 | && GET_MODE_CLASS (mode) != MODE_VECTOR_FLOAT) | |
5692c7bc ZW |
428 | abort (); |
429 | ||
430 | /* We clear out all bits that don't belong in MODE, unless they and | |
431 | our sign bit are all one. So we get either a reasonable negative | |
432 | value or a reasonable unsigned value for this mode. */ | |
433 | width = GET_MODE_BITSIZE (mode); | |
434 | if (width < HOST_BITS_PER_WIDE_INT | |
435 | && ((i0 & ((HOST_WIDE_INT) (-1) << (width - 1))) | |
436 | != ((HOST_WIDE_INT) (-1) << (width - 1)))) | |
437 | i0 &= ((HOST_WIDE_INT) 1 << width) - 1, i1 = 0; | |
438 | else if (width == HOST_BITS_PER_WIDE_INT | |
439 | && ! (i1 == ~0 && i0 < 0)) | |
440 | i1 = 0; | |
441 | else if (width > 2 * HOST_BITS_PER_WIDE_INT) | |
442 | /* We cannot represent this value as a constant. */ | |
443 | abort (); | |
444 | ||
445 | /* If this would be an entire word for the target, but is not for | |
446 | the host, then sign-extend on the host so that the number will | |
447 | look the same way on the host that it would on the target. | |
448 | ||
449 | For example, when building a 64 bit alpha hosted 32 bit sparc | |
450 | targeted compiler, then we want the 32 bit unsigned value -1 to be | |
451 | represented as a 64 bit value -1, and not as 0x00000000ffffffff. | |
452 | The latter confuses the sparc backend. */ | |
453 | ||
454 | if (width < HOST_BITS_PER_WIDE_INT | |
455 | && (i0 & ((HOST_WIDE_INT) 1 << (width - 1)))) | |
456 | i0 |= ((HOST_WIDE_INT) (-1) << width); | |
2454beaf | 457 | |
5692c7bc ZW |
458 | /* If MODE fits within HOST_BITS_PER_WIDE_INT, always use a |
459 | CONST_INT. | |
2454beaf | 460 | |
5692c7bc ZW |
461 | ??? Strictly speaking, this is wrong if we create a CONST_INT for |
462 | a large unsigned constant with the size of MODE being | |
463 | HOST_BITS_PER_WIDE_INT and later try to interpret that constant | |
464 | in a wider mode. In that case we will mis-interpret it as a | |
465 | negative number. | |
2454beaf | 466 | |
5692c7bc ZW |
467 | Unfortunately, the only alternative is to make a CONST_DOUBLE for |
468 | any constant in any mode if it is an unsigned constant larger | |
469 | than the maximum signed integer in an int on the host. However, | |
470 | doing this will break everyone that always expects to see a | |
471 | CONST_INT for SImode and smaller. | |
472 | ||
473 | We have always been making CONST_INTs in this case, so nothing | |
474 | new is being broken. */ | |
475 | ||
476 | if (width <= HOST_BITS_PER_WIDE_INT) | |
477 | i1 = (i0 < 0) ? ~(HOST_WIDE_INT) 0 : 0; | |
478 | } | |
479 | ||
480 | /* If this integer fits in one word, return a CONST_INT. */ | |
481 | if ((i1 == 0 && i0 >= 0) || (i1 == ~0 && i0 < 0)) | |
482 | return GEN_INT (i0); | |
483 | ||
484 | /* We use VOIDmode for integers. */ | |
485 | value = rtx_alloc (CONST_DOUBLE); | |
486 | PUT_MODE (value, VOIDmode); | |
487 | ||
488 | CONST_DOUBLE_LOW (value) = i0; | |
489 | CONST_DOUBLE_HIGH (value) = i1; | |
490 | ||
491 | for (i = 2; i < (sizeof CONST_DOUBLE_FORMAT - 1); i++) | |
492 | XWINT (value, i) = 0; | |
493 | ||
494 | return lookup_const_double (value); | |
0133b7d9 RH |
495 | } |
496 | ||
3b80f6ca RH |
497 | rtx |
498 | gen_rtx_REG (mode, regno) | |
499 | enum machine_mode mode; | |
5692c7bc | 500 | unsigned int regno; |
3b80f6ca RH |
501 | { |
502 | /* In case the MD file explicitly references the frame pointer, have | |
503 | all such references point to the same frame pointer. This is | |
504 | used during frame pointer elimination to distinguish the explicit | |
505 | references to these registers from pseudos that happened to be | |
506 | assigned to them. | |
507 | ||
508 | If we have eliminated the frame pointer or arg pointer, we will | |
509 | be using it as a normal register, for example as a spill | |
510 | register. In such cases, we might be accessing it in a mode that | |
511 | is not Pmode and therefore cannot use the pre-allocated rtx. | |
512 | ||
513 | Also don't do this when we are making new REGs in reload, since | |
514 | we don't want to get confused with the real pointers. */ | |
515 | ||
516 | if (mode == Pmode && !reload_in_progress) | |
517 | { | |
bcb33994 | 518 | if (regno == FRAME_POINTER_REGNUM) |
3b80f6ca RH |
519 | return frame_pointer_rtx; |
520 | #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM | |
bcb33994 | 521 | if (regno == HARD_FRAME_POINTER_REGNUM) |
3b80f6ca RH |
522 | return hard_frame_pointer_rtx; |
523 | #endif | |
524 | #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM | |
bcb33994 | 525 | if (regno == ARG_POINTER_REGNUM) |
3b80f6ca RH |
526 | return arg_pointer_rtx; |
527 | #endif | |
528 | #ifdef RETURN_ADDRESS_POINTER_REGNUM | |
bcb33994 | 529 | if (regno == RETURN_ADDRESS_POINTER_REGNUM) |
3b80f6ca RH |
530 | return return_address_pointer_rtx; |
531 | #endif | |
2d67bd7b JDA |
532 | if (regno == PIC_OFFSET_TABLE_REGNUM |
533 | && fixed_regs[PIC_OFFSET_TABLE_REGNUM]) | |
68252e27 | 534 | return pic_offset_table_rtx; |
bcb33994 | 535 | if (regno == STACK_POINTER_REGNUM) |
3b80f6ca RH |
536 | return stack_pointer_rtx; |
537 | } | |
538 | ||
006a94b0 | 539 | #if 0 |
6cde4876 | 540 | /* If the per-function register table has been set up, try to re-use |
006a94b0 JL |
541 | an existing entry in that table to avoid useless generation of RTL. |
542 | ||
543 | This code is disabled for now until we can fix the various backends | |
544 | which depend on having non-shared hard registers in some cases. Long | |
545 | term we want to re-enable this code as it can significantly cut down | |
546 | on the amount of useless RTL that gets generated. */ | |
6cde4876 JL |
547 | if (cfun |
548 | && cfun->emit | |
549 | && regno_reg_rtx | |
550 | && regno < FIRST_PSEUDO_REGISTER | |
551 | && reg_raw_mode[regno] == mode) | |
552 | return regno_reg_rtx[regno]; | |
006a94b0 | 553 | #endif |
6cde4876 | 554 | |
08394eef | 555 | return gen_raw_REG (mode, regno); |
3b80f6ca RH |
556 | } |
557 | ||
41472af8 MM |
558 | rtx |
559 | gen_rtx_MEM (mode, addr) | |
560 | enum machine_mode mode; | |
561 | rtx addr; | |
562 | { | |
563 | rtx rt = gen_rtx_raw_MEM (mode, addr); | |
564 | ||
565 | /* This field is not cleared by the mere allocation of the rtx, so | |
566 | we clear it here. */ | |
173b24b9 | 567 | MEM_ATTRS (rt) = 0; |
41472af8 MM |
568 | |
569 | return rt; | |
570 | } | |
ddef6bc7 JJ |
571 | |
572 | rtx | |
573 | gen_rtx_SUBREG (mode, reg, offset) | |
574 | enum machine_mode mode; | |
575 | rtx reg; | |
576 | int offset; | |
577 | { | |
578 | /* This is the most common failure type. | |
579 | Catch it early so we can see who does it. */ | |
580 | if ((offset % GET_MODE_SIZE (mode)) != 0) | |
581 | abort (); | |
582 | ||
583 | /* This check isn't usable right now because combine will | |
584 | throw arbitrary crap like a CALL into a SUBREG in | |
585 | gen_lowpart_for_combine so we must just eat it. */ | |
586 | #if 0 | |
587 | /* Check for this too. */ | |
588 | if (offset >= GET_MODE_SIZE (GET_MODE (reg))) | |
589 | abort (); | |
590 | #endif | |
5692c7bc | 591 | return gen_rtx_raw_SUBREG (mode, reg, offset); |
ddef6bc7 JJ |
592 | } |
593 | ||
173b24b9 RK |
594 | /* Generate a SUBREG representing the least-significant part of REG if MODE |
595 | is smaller than mode of REG, otherwise paradoxical SUBREG. */ | |
596 | ||
ddef6bc7 JJ |
597 | rtx |
598 | gen_lowpart_SUBREG (mode, reg) | |
599 | enum machine_mode mode; | |
600 | rtx reg; | |
601 | { | |
602 | enum machine_mode inmode; | |
ddef6bc7 JJ |
603 | |
604 | inmode = GET_MODE (reg); | |
605 | if (inmode == VOIDmode) | |
606 | inmode = mode; | |
e0e08ac2 JH |
607 | return gen_rtx_SUBREG (mode, reg, |
608 | subreg_lowpart_offset (mode, inmode)); | |
ddef6bc7 | 609 | } |
c5c76735 | 610 | \f |
23b2ce53 RS |
611 | /* rtx gen_rtx (code, mode, [element1, ..., elementn]) |
612 | ** | |
613 | ** This routine generates an RTX of the size specified by | |
614 | ** <code>, which is an RTX code. The RTX structure is initialized | |
615 | ** from the arguments <element1> through <elementn>, which are | |
616 | ** interpreted according to the specific RTX type's format. The | |
617 | ** special machine mode associated with the rtx (if any) is specified | |
618 | ** in <mode>. | |
619 | ** | |
1632afca | 620 | ** gen_rtx can be invoked in a way which resembles the lisp-like |
23b2ce53 RS |
621 | ** rtx it will generate. For example, the following rtx structure: |
622 | ** | |
623 | ** (plus:QI (mem:QI (reg:SI 1)) | |
624 | ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3)))) | |
625 | ** | |
626 | ** ...would be generated by the following C code: | |
627 | ** | |
750c9258 | 628 | ** gen_rtx (PLUS, QImode, |
23b2ce53 RS |
629 | ** gen_rtx (MEM, QImode, |
630 | ** gen_rtx (REG, SImode, 1)), | |
631 | ** gen_rtx (MEM, QImode, | |
632 | ** gen_rtx (PLUS, SImode, | |
633 | ** gen_rtx (REG, SImode, 2), | |
634 | ** gen_rtx (REG, SImode, 3)))), | |
635 | */ | |
636 | ||
637 | /*VARARGS2*/ | |
638 | rtx | |
711d877c | 639 | gen_rtx VPARAMS ((enum rtx_code code, enum machine_mode mode, ...)) |
23b2ce53 | 640 | { |
b3694847 SS |
641 | int i; /* Array indices... */ |
642 | const char *fmt; /* Current rtx's format... */ | |
643 | rtx rt_val; /* RTX to return to caller... */ | |
23b2ce53 | 644 | |
7a75edb7 AJ |
645 | VA_OPEN (p, mode); |
646 | VA_FIXEDARG (p, enum rtx_code, code); | |
647 | VA_FIXEDARG (p, enum machine_mode, mode); | |
23b2ce53 | 648 | |
0133b7d9 | 649 | switch (code) |
23b2ce53 | 650 | { |
0133b7d9 RH |
651 | case CONST_INT: |
652 | rt_val = gen_rtx_CONST_INT (mode, va_arg (p, HOST_WIDE_INT)); | |
653 | break; | |
654 | ||
655 | case CONST_DOUBLE: | |
656 | { | |
a79e3a45 | 657 | HOST_WIDE_INT arg0 = va_arg (p, HOST_WIDE_INT); |
0133b7d9 | 658 | HOST_WIDE_INT arg1 = va_arg (p, HOST_WIDE_INT); |
a79e3a45 | 659 | |
0fb7aeda | 660 | rt_val = immed_double_const (arg0, arg1, mode); |
0133b7d9 RH |
661 | } |
662 | break; | |
663 | ||
664 | case REG: | |
665 | rt_val = gen_rtx_REG (mode, va_arg (p, int)); | |
666 | break; | |
667 | ||
668 | case MEM: | |
669 | rt_val = gen_rtx_MEM (mode, va_arg (p, rtx)); | |
670 | break; | |
671 | ||
672 | default: | |
23b2ce53 RS |
673 | rt_val = rtx_alloc (code); /* Allocate the storage space. */ |
674 | rt_val->mode = mode; /* Store the machine mode... */ | |
675 | ||
676 | fmt = GET_RTX_FORMAT (code); /* Find the right format... */ | |
677 | for (i = 0; i < GET_RTX_LENGTH (code); i++) | |
678 | { | |
679 | switch (*fmt++) | |
680 | { | |
681 | case '0': /* Unused field. */ | |
682 | break; | |
683 | ||
684 | case 'i': /* An integer? */ | |
685 | XINT (rt_val, i) = va_arg (p, int); | |
686 | break; | |
687 | ||
906c4e36 RK |
688 | case 'w': /* A wide integer? */ |
689 | XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT); | |
690 | break; | |
691 | ||
23b2ce53 RS |
692 | case 's': /* A string? */ |
693 | XSTR (rt_val, i) = va_arg (p, char *); | |
694 | break; | |
695 | ||
696 | case 'e': /* An expression? */ | |
697 | case 'u': /* An insn? Same except when printing. */ | |
698 | XEXP (rt_val, i) = va_arg (p, rtx); | |
699 | break; | |
700 | ||
701 | case 'E': /* An RTX vector? */ | |
702 | XVEC (rt_val, i) = va_arg (p, rtvec); | |
703 | break; | |
704 | ||
0dfa1860 MM |
705 | case 'b': /* A bitmap? */ |
706 | XBITMAP (rt_val, i) = va_arg (p, bitmap); | |
707 | break; | |
708 | ||
709 | case 't': /* A tree? */ | |
710 | XTREE (rt_val, i) = va_arg (p, tree); | |
711 | break; | |
712 | ||
23b2ce53 | 713 | default: |
1632afca | 714 | abort (); |
23b2ce53 RS |
715 | } |
716 | } | |
0133b7d9 | 717 | break; |
23b2ce53 | 718 | } |
0133b7d9 | 719 | |
7a75edb7 | 720 | VA_CLOSE (p); |
0133b7d9 | 721 | return rt_val; |
23b2ce53 RS |
722 | } |
723 | ||
724 | /* gen_rtvec (n, [rt1, ..., rtn]) | |
725 | ** | |
726 | ** This routine creates an rtvec and stores within it the | |
727 | ** pointers to rtx's which are its arguments. | |
728 | */ | |
729 | ||
730 | /*VARARGS1*/ | |
731 | rtvec | |
711d877c | 732 | gen_rtvec VPARAMS ((int n, ...)) |
23b2ce53 | 733 | { |
6268b922 | 734 | int i, save_n; |
23b2ce53 RS |
735 | rtx *vector; |
736 | ||
7a75edb7 AJ |
737 | VA_OPEN (p, n); |
738 | VA_FIXEDARG (p, int, n); | |
23b2ce53 RS |
739 | |
740 | if (n == 0) | |
741 | return NULL_RTVEC; /* Don't allocate an empty rtvec... */ | |
742 | ||
743 | vector = (rtx *) alloca (n * sizeof (rtx)); | |
4f90e4a0 | 744 | |
23b2ce53 RS |
745 | for (i = 0; i < n; i++) |
746 | vector[i] = va_arg (p, rtx); | |
6268b922 KG |
747 | |
748 | /* The definition of VA_* in K&R C causes `n' to go out of scope. */ | |
749 | save_n = n; | |
7a75edb7 | 750 | VA_CLOSE (p); |
23b2ce53 | 751 | |
6268b922 | 752 | return gen_rtvec_v (save_n, vector); |
23b2ce53 RS |
753 | } |
754 | ||
755 | rtvec | |
756 | gen_rtvec_v (n, argp) | |
757 | int n; | |
758 | rtx *argp; | |
759 | { | |
b3694847 SS |
760 | int i; |
761 | rtvec rt_val; | |
23b2ce53 RS |
762 | |
763 | if (n == 0) | |
764 | return NULL_RTVEC; /* Don't allocate an empty rtvec... */ | |
765 | ||
766 | rt_val = rtvec_alloc (n); /* Allocate an rtvec... */ | |
767 | ||
768 | for (i = 0; i < n; i++) | |
8f985ec4 | 769 | rt_val->elem[i] = *argp++; |
23b2ce53 RS |
770 | |
771 | return rt_val; | |
772 | } | |
773 | \f | |
774 | /* Generate a REG rtx for a new pseudo register of mode MODE. | |
775 | This pseudo is assigned the next sequential register number. */ | |
776 | ||
777 | rtx | |
778 | gen_reg_rtx (mode) | |
779 | enum machine_mode mode; | |
780 | { | |
01d939e8 | 781 | struct function *f = cfun; |
b3694847 | 782 | rtx val; |
23b2ce53 | 783 | |
f1db3576 JL |
784 | /* Don't let anything called after initial flow analysis create new |
785 | registers. */ | |
786 | if (no_new_pseudos) | |
23b2ce53 RS |
787 | abort (); |
788 | ||
1b3d8f8a GK |
789 | if (generating_concat_p |
790 | && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT | |
791 | || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT)) | |
fc84e8a8 RS |
792 | { |
793 | /* For complex modes, don't make a single pseudo. | |
794 | Instead, make a CONCAT of two pseudos. | |
795 | This allows noncontiguous allocation of the real and imaginary parts, | |
796 | which makes much better code. Besides, allocating DCmode | |
797 | pseudos overstrains reload on some machines like the 386. */ | |
798 | rtx realpart, imagpart; | |
799 | int size = GET_MODE_UNIT_SIZE (mode); | |
800 | enum machine_mode partmode | |
801 | = mode_for_size (size * BITS_PER_UNIT, | |
802 | (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT | |
803 | ? MODE_FLOAT : MODE_INT), | |
804 | 0); | |
805 | ||
806 | realpart = gen_reg_rtx (partmode); | |
807 | imagpart = gen_reg_rtx (partmode); | |
3b80f6ca | 808 | return gen_rtx_CONCAT (mode, realpart, imagpart); |
fc84e8a8 RS |
809 | } |
810 | ||
0d4903b8 RK |
811 | /* Make sure regno_pointer_align, regno_decl, and regno_reg_rtx are large |
812 | enough to have an element for this pseudo reg number. */ | |
23b2ce53 | 813 | |
3502dc9c | 814 | if (reg_rtx_no == f->emit->regno_pointer_align_length) |
23b2ce53 | 815 | { |
3502dc9c | 816 | int old_size = f->emit->regno_pointer_align_length; |
e2ecd91c | 817 | char *new; |
0d4903b8 RK |
818 | rtx *new1; |
819 | tree *new2; | |
820 | ||
e2500fed | 821 | new = ggc_realloc (f->emit->regno_pointer_align, old_size * 2); |
49ad7cfa | 822 | memset (new + old_size, 0, old_size); |
f9e158c3 | 823 | f->emit->regno_pointer_align = (unsigned char *) new; |
49ad7cfa | 824 | |
e2500fed GK |
825 | new1 = (rtx *) ggc_realloc (f->emit->x_regno_reg_rtx, |
826 | old_size * 2 * sizeof (rtx)); | |
49ad7cfa | 827 | memset (new1 + old_size, 0, old_size * sizeof (rtx)); |
23b2ce53 RS |
828 | regno_reg_rtx = new1; |
829 | ||
e2500fed GK |
830 | new2 = (tree *) ggc_realloc (f->emit->regno_decl, |
831 | old_size * 2 * sizeof (tree)); | |
0d4903b8 RK |
832 | memset (new2 + old_size, 0, old_size * sizeof (tree)); |
833 | f->emit->regno_decl = new2; | |
834 | ||
3502dc9c | 835 | f->emit->regno_pointer_align_length = old_size * 2; |
23b2ce53 RS |
836 | } |
837 | ||
08394eef | 838 | val = gen_raw_REG (mode, reg_rtx_no); |
23b2ce53 RS |
839 | regno_reg_rtx[reg_rtx_no++] = val; |
840 | return val; | |
841 | } | |
842 | ||
754fdcca RK |
843 | /* Identify REG (which may be a CONCAT) as a user register. */ |
844 | ||
845 | void | |
846 | mark_user_reg (reg) | |
847 | rtx reg; | |
848 | { | |
849 | if (GET_CODE (reg) == CONCAT) | |
850 | { | |
851 | REG_USERVAR_P (XEXP (reg, 0)) = 1; | |
852 | REG_USERVAR_P (XEXP (reg, 1)) = 1; | |
853 | } | |
854 | else if (GET_CODE (reg) == REG) | |
855 | REG_USERVAR_P (reg) = 1; | |
856 | else | |
857 | abort (); | |
858 | } | |
859 | ||
86fe05e0 RK |
860 | /* Identify REG as a probable pointer register and show its alignment |
861 | as ALIGN, if nonzero. */ | |
23b2ce53 RS |
862 | |
863 | void | |
86fe05e0 | 864 | mark_reg_pointer (reg, align) |
23b2ce53 | 865 | rtx reg; |
86fe05e0 | 866 | int align; |
23b2ce53 | 867 | { |
3502dc9c | 868 | if (! REG_POINTER (reg)) |
00995e78 | 869 | { |
3502dc9c | 870 | REG_POINTER (reg) = 1; |
86fe05e0 | 871 | |
00995e78 RE |
872 | if (align) |
873 | REGNO_POINTER_ALIGN (REGNO (reg)) = align; | |
874 | } | |
875 | else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg))) | |
876 | /* We can no-longer be sure just how aligned this pointer is */ | |
86fe05e0 | 877 | REGNO_POINTER_ALIGN (REGNO (reg)) = align; |
23b2ce53 RS |
878 | } |
879 | ||
880 | /* Return 1 plus largest pseudo reg number used in the current function. */ | |
881 | ||
882 | int | |
883 | max_reg_num () | |
884 | { | |
885 | return reg_rtx_no; | |
886 | } | |
887 | ||
888 | /* Return 1 + the largest label number used so far in the current function. */ | |
889 | ||
890 | int | |
891 | max_label_num () | |
892 | { | |
893 | if (last_label_num && label_num == base_label_num) | |
894 | return last_label_num; | |
895 | return label_num; | |
896 | } | |
897 | ||
898 | /* Return first label number used in this function (if any were used). */ | |
899 | ||
900 | int | |
901 | get_first_label_num () | |
902 | { | |
903 | return first_label_num; | |
904 | } | |
905 | \f | |
ddef6bc7 JJ |
906 | /* Return the final regno of X, which is a SUBREG of a hard |
907 | register. */ | |
908 | int | |
909 | subreg_hard_regno (x, check_mode) | |
b3694847 | 910 | rtx x; |
ddef6bc7 JJ |
911 | int check_mode; |
912 | { | |
913 | enum machine_mode mode = GET_MODE (x); | |
914 | unsigned int byte_offset, base_regno, final_regno; | |
915 | rtx reg = SUBREG_REG (x); | |
916 | ||
917 | /* This is where we attempt to catch illegal subregs | |
918 | created by the compiler. */ | |
919 | if (GET_CODE (x) != SUBREG | |
920 | || GET_CODE (reg) != REG) | |
921 | abort (); | |
922 | base_regno = REGNO (reg); | |
923 | if (base_regno >= FIRST_PSEUDO_REGISTER) | |
924 | abort (); | |
0607953c | 925 | if (check_mode && ! HARD_REGNO_MODE_OK (base_regno, GET_MODE (reg))) |
ddef6bc7 JJ |
926 | abort (); |
927 | ||
928 | /* Catch non-congruent offsets too. */ | |
929 | byte_offset = SUBREG_BYTE (x); | |
930 | if ((byte_offset % GET_MODE_SIZE (mode)) != 0) | |
931 | abort (); | |
932 | ||
933 | final_regno = subreg_regno (x); | |
934 | ||
935 | return final_regno; | |
936 | } | |
937 | ||
23b2ce53 RS |
938 | /* Return a value representing some low-order bits of X, where the number |
939 | of low-order bits is given by MODE. Note that no conversion is done | |
750c9258 | 940 | between floating-point and fixed-point values, rather, the bit |
23b2ce53 RS |
941 | representation is returned. |
942 | ||
943 | This function handles the cases in common between gen_lowpart, below, | |
944 | and two variants in cse.c and combine.c. These are the cases that can | |
945 | be safely handled at all points in the compilation. | |
946 | ||
947 | If this is not a case we can handle, return 0. */ | |
948 | ||
949 | rtx | |
950 | gen_lowpart_common (mode, x) | |
951 | enum machine_mode mode; | |
b3694847 | 952 | rtx x; |
23b2ce53 | 953 | { |
ddef6bc7 JJ |
954 | int msize = GET_MODE_SIZE (mode); |
955 | int xsize = GET_MODE_SIZE (GET_MODE (x)); | |
956 | int offset = 0; | |
23b2ce53 RS |
957 | |
958 | if (GET_MODE (x) == mode) | |
959 | return x; | |
960 | ||
961 | /* MODE must occupy no more words than the mode of X. */ | |
962 | if (GET_MODE (x) != VOIDmode | |
ddef6bc7 JJ |
963 | && ((msize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD |
964 | > ((xsize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))) | |
23b2ce53 RS |
965 | return 0; |
966 | ||
53501a19 BS |
967 | /* Don't allow generating paradoxical FLOAT_MODE subregs. */ |
968 | if (GET_MODE_CLASS (mode) == MODE_FLOAT | |
969 | && GET_MODE (x) != VOIDmode && msize > xsize) | |
970 | return 0; | |
971 | ||
e0e08ac2 | 972 | offset = subreg_lowpart_offset (mode, GET_MODE (x)); |
23b2ce53 RS |
973 | |
974 | if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND) | |
83e9c679 RK |
975 | && (GET_MODE_CLASS (mode) == MODE_INT |
976 | || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)) | |
23b2ce53 RS |
977 | { |
978 | /* If we are getting the low-order part of something that has been | |
979 | sign- or zero-extended, we can either just use the object being | |
980 | extended or make a narrower extension. If we want an even smaller | |
981 | piece than the size of the object being extended, call ourselves | |
982 | recursively. | |
983 | ||
984 | This case is used mostly by combine and cse. */ | |
985 | ||
986 | if (GET_MODE (XEXP (x, 0)) == mode) | |
987 | return XEXP (x, 0); | |
988 | else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (XEXP (x, 0)))) | |
989 | return gen_lowpart_common (mode, XEXP (x, 0)); | |
990 | else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (x))) | |
3b80f6ca | 991 | return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0)); |
23b2ce53 | 992 | } |
76321db6 MH |
993 | else if (GET_CODE (x) == SUBREG || GET_CODE (x) == REG |
994 | || GET_CODE (x) == CONCAT) | |
e0e08ac2 | 995 | return simplify_gen_subreg (mode, x, GET_MODE (x), offset); |
23b2ce53 RS |
996 | /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits |
997 | from the low-order part of the constant. */ | |
83e9c679 RK |
998 | else if ((GET_MODE_CLASS (mode) == MODE_INT |
999 | || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT) | |
1000 | && GET_MODE (x) == VOIDmode | |
23b2ce53 | 1001 | && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)) |
1a5b457d RK |
1002 | { |
1003 | /* If MODE is twice the host word size, X is already the desired | |
1004 | representation. Otherwise, if MODE is wider than a word, we can't | |
e1389cac | 1005 | do this. If MODE is exactly a word, return just one CONST_INT. */ |
1a5b457d | 1006 | |
a8dd0e73 | 1007 | if (GET_MODE_BITSIZE (mode) >= 2 * HOST_BITS_PER_WIDE_INT) |
1a5b457d | 1008 | return x; |
906c4e36 | 1009 | else if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT) |
1a5b457d | 1010 | return 0; |
906c4e36 | 1011 | else if (GET_MODE_BITSIZE (mode) == HOST_BITS_PER_WIDE_INT) |
1a5b457d | 1012 | return (GET_CODE (x) == CONST_INT ? x |
906c4e36 | 1013 | : GEN_INT (CONST_DOUBLE_LOW (x))); |
1a5b457d RK |
1014 | else |
1015 | { | |
27eef9ce | 1016 | /* MODE must be narrower than HOST_BITS_PER_WIDE_INT. */ |
906c4e36 RK |
1017 | HOST_WIDE_INT val = (GET_CODE (x) == CONST_INT ? INTVAL (x) |
1018 | : CONST_DOUBLE_LOW (x)); | |
1a5b457d | 1019 | |
27eef9ce | 1020 | /* Sign extend to HOST_WIDE_INT. */ |
e1389cac | 1021 | val = trunc_int_for_mode (val, mode); |
1a5b457d RK |
1022 | |
1023 | return (GET_CODE (x) == CONST_INT && INTVAL (x) == val ? x | |
906c4e36 | 1024 | : GEN_INT (val)); |
1a5b457d RK |
1025 | } |
1026 | } | |
23b2ce53 | 1027 | |
ba31d94e | 1028 | /* The floating-point emulator can handle all conversions between |
a2061c0d GK |
1029 | FP and integer operands. This simplifies reload because it |
1030 | doesn't have to deal with constructs like (subreg:DI | |
1031 | (const_double:SF ...)) or (subreg:DF (const_int ...)). */ | |
57dadce2 EC |
1032 | /* Single-precision floats are always 32-bits and double-precision |
1033 | floats are always 64-bits. */ | |
a2061c0d | 1034 | |
76321db6 | 1035 | else if (GET_MODE_CLASS (mode) == MODE_FLOAT |
57dadce2 | 1036 | && GET_MODE_BITSIZE (mode) == 32 |
a2061c0d | 1037 | && GET_CODE (x) == CONST_INT) |
68252e27 | 1038 | { |
a2061c0d GK |
1039 | REAL_VALUE_TYPE r; |
1040 | HOST_WIDE_INT i; | |
1041 | ||
1042 | i = INTVAL (x); | |
1043 | r = REAL_VALUE_FROM_TARGET_SINGLE (i); | |
1044 | return CONST_DOUBLE_FROM_REAL_VALUE (r, mode); | |
68252e27 | 1045 | } |
76321db6 | 1046 | else if (GET_MODE_CLASS (mode) == MODE_FLOAT |
57dadce2 | 1047 | && GET_MODE_BITSIZE (mode) == 64 |
a2061c0d GK |
1048 | && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE) |
1049 | && GET_MODE (x) == VOIDmode) | |
1050 | { | |
1051 | REAL_VALUE_TYPE r; | |
1052 | HOST_WIDE_INT i[2]; | |
1053 | HOST_WIDE_INT low, high; | |
1054 | ||
1055 | if (GET_CODE (x) == CONST_INT) | |
1056 | { | |
1057 | low = INTVAL (x); | |
1058 | high = low >> (HOST_BITS_PER_WIDE_INT - 1); | |
1059 | } | |
1060 | else | |
1061 | { | |
750c9258 | 1062 | low = CONST_DOUBLE_LOW (x); |
a2061c0d GK |
1063 | high = CONST_DOUBLE_HIGH (x); |
1064 | } | |
1065 | ||
467cb2da | 1066 | #if HOST_BITS_PER_WIDE_INT == 32 |
a2061c0d GK |
1067 | /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the |
1068 | target machine. */ | |
1069 | if (WORDS_BIG_ENDIAN) | |
1070 | i[0] = high, i[1] = low; | |
1071 | else | |
1072 | i[0] = low, i[1] = high; | |
467cb2da HP |
1073 | #else |
1074 | i[0] = low; | |
1075 | #endif | |
a2061c0d GK |
1076 | |
1077 | r = REAL_VALUE_FROM_TARGET_DOUBLE (i); | |
1078 | return CONST_DOUBLE_FROM_REAL_VALUE (r, mode); | |
1079 | } | |
1080 | else if ((GET_MODE_CLASS (mode) == MODE_INT | |
1081 | || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT) | |
1082 | && GET_CODE (x) == CONST_DOUBLE | |
1083 | && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT) | |
1084 | { | |
1085 | REAL_VALUE_TYPE r; | |
1086 | long i[4]; /* Only the low 32 bits of each 'long' are used. */ | |
1087 | int endian = WORDS_BIG_ENDIAN ? 1 : 0; | |
1088 | ||
8125704b GK |
1089 | /* Convert 'r' into an array of four 32-bit words in target word |
1090 | order. */ | |
a2061c0d | 1091 | REAL_VALUE_FROM_CONST_DOUBLE (r, x); |
57dadce2 | 1092 | switch (GET_MODE_BITSIZE (GET_MODE (x))) |
a2061c0d | 1093 | { |
57dadce2 | 1094 | case 32: |
68252e27 | 1095 | REAL_VALUE_TO_TARGET_SINGLE (r, i[3 * endian]); |
8125704b GK |
1096 | i[1] = 0; |
1097 | i[2] = 0; | |
68252e27 KH |
1098 | i[3 - 3 * endian] = 0; |
1099 | break; | |
57dadce2 | 1100 | case 64: |
68252e27 | 1101 | REAL_VALUE_TO_TARGET_DOUBLE (r, i + 2 * endian); |
8125704b GK |
1102 | i[2 - 2 * endian] = 0; |
1103 | i[3 - 2 * endian] = 0; | |
68252e27 | 1104 | break; |
57dadce2 | 1105 | case 96: |
e389897b | 1106 | REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i + endian); |
8125704b | 1107 | i[3 - 3 * endian] = 0; |
76321db6 | 1108 | break; |
57dadce2 | 1109 | case 128: |
a2061c0d GK |
1110 | REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i); |
1111 | break; | |
1112 | default: | |
1156b23c | 1113 | abort (); |
a2061c0d | 1114 | } |
a2061c0d GK |
1115 | /* Now, pack the 32-bit elements of the array into a CONST_DOUBLE |
1116 | and return it. */ | |
1117 | #if HOST_BITS_PER_WIDE_INT == 32 | |
8125704b | 1118 | return immed_double_const (i[3 * endian], i[1 + endian], mode); |
a2061c0d | 1119 | #else |
8125704b GK |
1120 | if (HOST_BITS_PER_WIDE_INT != 64) |
1121 | abort (); | |
50e60bc3 | 1122 | |
a76033a0 GK |
1123 | return immed_double_const ((((unsigned long) i[3 * endian]) |
1124 | | ((HOST_WIDE_INT) i[1 + endian] << 32)), | |
1125 | (((unsigned long) i[2 - endian]) | |
1126 | | ((HOST_WIDE_INT) i[3 - 3 * endian] << 32)), | |
8125704b | 1127 | mode); |
a2061c0d GK |
1128 | #endif |
1129 | } | |
8aada4ad | 1130 | |
23b2ce53 RS |
1131 | /* Otherwise, we can't do this. */ |
1132 | return 0; | |
1133 | } | |
1134 | \f | |
280194b0 RS |
1135 | /* Return the real part (which has mode MODE) of a complex value X. |
1136 | This always comes at the low address in memory. */ | |
1137 | ||
1138 | rtx | |
1139 | gen_realpart (mode, x) | |
1140 | enum machine_mode mode; | |
b3694847 | 1141 | rtx x; |
280194b0 | 1142 | { |
e0e08ac2 JH |
1143 | if (WORDS_BIG_ENDIAN |
1144 | && GET_MODE_BITSIZE (mode) < BITS_PER_WORD | |
1145 | && REG_P (x) | |
1146 | && REGNO (x) < FIRST_PSEUDO_REGISTER) | |
400500c4 | 1147 | internal_error |
c725bd79 | 1148 | ("can't access real part of complex value in hard register"); |
dc139c90 | 1149 | else if (WORDS_BIG_ENDIAN) |
280194b0 RS |
1150 | return gen_highpart (mode, x); |
1151 | else | |
1152 | return gen_lowpart (mode, x); | |
1153 | } | |
1154 | ||
1155 | /* Return the imaginary part (which has mode MODE) of a complex value X. | |
1156 | This always comes at the high address in memory. */ | |
1157 | ||
1158 | rtx | |
1159 | gen_imagpart (mode, x) | |
1160 | enum machine_mode mode; | |
b3694847 | 1161 | rtx x; |
280194b0 | 1162 | { |
e0e08ac2 | 1163 | if (WORDS_BIG_ENDIAN) |
280194b0 | 1164 | return gen_lowpart (mode, x); |
ddef6bc7 | 1165 | else if (! WORDS_BIG_ENDIAN |
40c0c3cf JL |
1166 | && GET_MODE_BITSIZE (mode) < BITS_PER_WORD |
1167 | && REG_P (x) | |
1168 | && REGNO (x) < FIRST_PSEUDO_REGISTER) | |
400500c4 RK |
1169 | internal_error |
1170 | ("can't access imaginary part of complex value in hard register"); | |
280194b0 RS |
1171 | else |
1172 | return gen_highpart (mode, x); | |
1173 | } | |
81284a6a JW |
1174 | |
1175 | /* Return 1 iff X, assumed to be a SUBREG, | |
1176 | refers to the real part of the complex value in its containing reg. | |
1177 | Complex values are always stored with the real part in the first word, | |
1178 | regardless of WORDS_BIG_ENDIAN. */ | |
1179 | ||
1180 | int | |
1181 | subreg_realpart_p (x) | |
1182 | rtx x; | |
1183 | { | |
1184 | if (GET_CODE (x) != SUBREG) | |
1185 | abort (); | |
1186 | ||
ddef6bc7 | 1187 | return ((unsigned int) SUBREG_BYTE (x) |
770ae6cc | 1188 | < GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x)))); |
81284a6a | 1189 | } |
280194b0 | 1190 | \f |
23b2ce53 RS |
1191 | /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value, |
1192 | return an rtx (MEM, SUBREG, or CONST_INT) that refers to the | |
1193 | least-significant part of X. | |
1194 | MODE specifies how big a part of X to return; | |
1195 | it usually should not be larger than a word. | |
1196 | If X is a MEM whose address is a QUEUED, the value may be so also. */ | |
1197 | ||
1198 | rtx | |
1199 | gen_lowpart (mode, x) | |
1200 | enum machine_mode mode; | |
b3694847 | 1201 | rtx x; |
23b2ce53 RS |
1202 | { |
1203 | rtx result = gen_lowpart_common (mode, x); | |
1204 | ||
1205 | if (result) | |
1206 | return result; | |
ea8262b0 RK |
1207 | else if (GET_CODE (x) == REG) |
1208 | { | |
1209 | /* Must be a hard reg that's not valid in MODE. */ | |
1210 | result = gen_lowpart_common (mode, copy_to_reg (x)); | |
1211 | if (result == 0) | |
1212 | abort (); | |
72c3833b | 1213 | return result; |
ea8262b0 | 1214 | } |
23b2ce53 RS |
1215 | else if (GET_CODE (x) == MEM) |
1216 | { | |
1217 | /* The only additional case we can do is MEM. */ | |
b3694847 | 1218 | int offset = 0; |
23b2ce53 RS |
1219 | if (WORDS_BIG_ENDIAN) |
1220 | offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD) | |
1221 | - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD)); | |
1222 | ||
1223 | if (BYTES_BIG_ENDIAN) | |
1224 | /* Adjust the address so that the address-after-the-data | |
1225 | is unchanged. */ | |
1226 | offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode)) | |
1227 | - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x)))); | |
1228 | ||
f4ef873c | 1229 | return adjust_address (x, mode, offset); |
23b2ce53 | 1230 | } |
e9a25f70 JL |
1231 | else if (GET_CODE (x) == ADDRESSOF) |
1232 | return gen_lowpart (mode, force_reg (GET_MODE (x), x)); | |
23b2ce53 RS |
1233 | else |
1234 | abort (); | |
1235 | } | |
1236 | ||
750c9258 | 1237 | /* Like `gen_lowpart', but refer to the most significant part. |
ccba022b RS |
1238 | This is used to access the imaginary part of a complex number. */ |
1239 | ||
1240 | rtx | |
1241 | gen_highpart (mode, x) | |
1242 | enum machine_mode mode; | |
b3694847 | 1243 | rtx x; |
ccba022b | 1244 | { |
ddef6bc7 | 1245 | unsigned int msize = GET_MODE_SIZE (mode); |
e0e08ac2 | 1246 | rtx result; |
ddef6bc7 | 1247 | |
ccba022b RS |
1248 | /* This case loses if X is a subreg. To catch bugs early, |
1249 | complain if an invalid MODE is used even in other cases. */ | |
ddef6bc7 JJ |
1250 | if (msize > UNITS_PER_WORD |
1251 | && msize != GET_MODE_UNIT_SIZE (GET_MODE (x))) | |
ccba022b | 1252 | abort (); |
ddef6bc7 | 1253 | |
e0e08ac2 JH |
1254 | result = simplify_gen_subreg (mode, x, GET_MODE (x), |
1255 | subreg_highpart_offset (mode, GET_MODE (x))); | |
09482e0d JW |
1256 | |
1257 | /* simplify_gen_subreg is not guaranteed to return a valid operand for | |
1258 | the target if we have a MEM. gen_highpart must return a valid operand, | |
1259 | emitting code if necessary to do so. */ | |
13b8c631 | 1260 | if (result != NULL_RTX && GET_CODE (result) == MEM) |
09482e0d JW |
1261 | result = validize_mem (result); |
1262 | ||
e0e08ac2 JH |
1263 | if (!result) |
1264 | abort (); | |
1265 | return result; | |
1266 | } | |
5222e470 JH |
1267 | |
1268 | /* Like gen_highpart_mode, but accept mode of EXP operand in case EXP can | |
1269 | be VOIDmode constant. */ | |
1270 | rtx | |
1271 | gen_highpart_mode (outermode, innermode, exp) | |
68252e27 KH |
1272 | enum machine_mode outermode, innermode; |
1273 | rtx exp; | |
5222e470 JH |
1274 | { |
1275 | if (GET_MODE (exp) != VOIDmode) | |
1276 | { | |
1277 | if (GET_MODE (exp) != innermode) | |
1278 | abort (); | |
1279 | return gen_highpart (outermode, exp); | |
1280 | } | |
1281 | return simplify_gen_subreg (outermode, exp, innermode, | |
1282 | subreg_highpart_offset (outermode, innermode)); | |
1283 | } | |
68252e27 | 1284 | |
e0e08ac2 JH |
1285 | /* Return offset in bytes to get OUTERMODE low part |
1286 | of the value in mode INNERMODE stored in memory in target format. */ | |
8698cce3 | 1287 | |
e0e08ac2 JH |
1288 | unsigned int |
1289 | subreg_lowpart_offset (outermode, innermode) | |
1290 | enum machine_mode outermode, innermode; | |
1291 | { | |
1292 | unsigned int offset = 0; | |
1293 | int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode)); | |
8698cce3 | 1294 | |
e0e08ac2 | 1295 | if (difference > 0) |
ccba022b | 1296 | { |
e0e08ac2 JH |
1297 | if (WORDS_BIG_ENDIAN) |
1298 | offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD; | |
1299 | if (BYTES_BIG_ENDIAN) | |
1300 | offset += difference % UNITS_PER_WORD; | |
ccba022b | 1301 | } |
ddef6bc7 | 1302 | |
e0e08ac2 | 1303 | return offset; |
ccba022b | 1304 | } |
eea50aa0 | 1305 | |
e0e08ac2 JH |
1306 | /* Return offset in bytes to get OUTERMODE high part |
1307 | of the value in mode INNERMODE stored in memory in target format. */ | |
1308 | unsigned int | |
1309 | subreg_highpart_offset (outermode, innermode) | |
eea50aa0 | 1310 | enum machine_mode outermode, innermode; |
eea50aa0 JH |
1311 | { |
1312 | unsigned int offset = 0; | |
1313 | int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode)); | |
1314 | ||
e0e08ac2 | 1315 | if (GET_MODE_SIZE (innermode) < GET_MODE_SIZE (outermode)) |
68252e27 | 1316 | abort (); |
e0e08ac2 | 1317 | |
eea50aa0 JH |
1318 | if (difference > 0) |
1319 | { | |
e0e08ac2 | 1320 | if (! WORDS_BIG_ENDIAN) |
eea50aa0 | 1321 | offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD; |
e0e08ac2 | 1322 | if (! BYTES_BIG_ENDIAN) |
eea50aa0 JH |
1323 | offset += difference % UNITS_PER_WORD; |
1324 | } | |
1325 | ||
e0e08ac2 | 1326 | return offset; |
eea50aa0 | 1327 | } |
ccba022b | 1328 | |
23b2ce53 RS |
1329 | /* Return 1 iff X, assumed to be a SUBREG, |
1330 | refers to the least significant part of its containing reg. | |
1331 | If X is not a SUBREG, always return 1 (it is its own low part!). */ | |
1332 | ||
1333 | int | |
1334 | subreg_lowpart_p (x) | |
1335 | rtx x; | |
1336 | { | |
1337 | if (GET_CODE (x) != SUBREG) | |
1338 | return 1; | |
a3a03040 RK |
1339 | else if (GET_MODE (SUBREG_REG (x)) == VOIDmode) |
1340 | return 0; | |
23b2ce53 | 1341 | |
e0e08ac2 JH |
1342 | return (subreg_lowpart_offset (GET_MODE (x), GET_MODE (SUBREG_REG (x))) |
1343 | == SUBREG_BYTE (x)); | |
23b2ce53 RS |
1344 | } |
1345 | \f | |
23b2ce53 | 1346 | |
ddef6bc7 JJ |
1347 | /* Helper routine for all the constant cases of operand_subword. |
1348 | Some places invoke this directly. */ | |
23b2ce53 RS |
1349 | |
1350 | rtx | |
ddef6bc7 | 1351 | constant_subword (op, offset, mode) |
23b2ce53 | 1352 | rtx op; |
ddef6bc7 | 1353 | int offset; |
23b2ce53 RS |
1354 | enum machine_mode mode; |
1355 | { | |
906c4e36 | 1356 | int size_ratio = HOST_BITS_PER_WIDE_INT / BITS_PER_WORD; |
ddef6bc7 | 1357 | HOST_WIDE_INT val; |
23b2ce53 RS |
1358 | |
1359 | /* If OP is already an integer word, return it. */ | |
1360 | if (GET_MODE_CLASS (mode) == MODE_INT | |
1361 | && GET_MODE_SIZE (mode) == UNITS_PER_WORD) | |
1362 | return op; | |
1363 | ||
5495cc55 RH |
1364 | /* The output is some bits, the width of the target machine's word. |
1365 | A wider-word host can surely hold them in a CONST_INT. A narrower-word | |
1366 | host can't. */ | |
9847c2f6 | 1367 | if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD |
1632afca | 1368 | && GET_MODE_CLASS (mode) == MODE_FLOAT |
7677ffa4 | 1369 | && GET_MODE_BITSIZE (mode) == 64 |
1632afca RS |
1370 | && GET_CODE (op) == CONST_DOUBLE) |
1371 | { | |
9847c2f6 | 1372 | long k[2]; |
1632afca RS |
1373 | REAL_VALUE_TYPE rv; |
1374 | ||
1375 | REAL_VALUE_FROM_CONST_DOUBLE (rv, op); | |
1376 | REAL_VALUE_TO_TARGET_DOUBLE (rv, k); | |
7677ffa4 | 1377 | |
9847c2f6 | 1378 | /* We handle 32-bit and >= 64-bit words here. Note that the order in |
7677ffa4 | 1379 | which the words are written depends on the word endianness. |
7677ffa4 | 1380 | ??? This is a potential portability problem and should |
7cae975e RH |
1381 | be fixed at some point. |
1382 | ||
a1f300c0 | 1383 | We must exercise caution with the sign bit. By definition there |
7cae975e RH |
1384 | are 32 significant bits in K; there may be more in a HOST_WIDE_INT. |
1385 | Consider a host with a 32-bit long and a 64-bit HOST_WIDE_INT. | |
1386 | So we explicitly mask and sign-extend as necessary. */ | |
9847c2f6 | 1387 | if (BITS_PER_WORD == 32) |
7cae975e | 1388 | { |
ddef6bc7 | 1389 | val = k[offset]; |
7cae975e RH |
1390 | val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000; |
1391 | return GEN_INT (val); | |
1392 | } | |
1393 | #if HOST_BITS_PER_WIDE_INT >= 64 | |
ddef6bc7 | 1394 | else if (BITS_PER_WORD >= 64 && offset == 0) |
7cae975e RH |
1395 | { |
1396 | val = k[! WORDS_BIG_ENDIAN]; | |
1397 | val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32; | |
1398 | val |= (HOST_WIDE_INT) k[WORDS_BIG_ENDIAN] & 0xffffffff; | |
1399 | return GEN_INT (val); | |
1400 | } | |
9847c2f6 | 1401 | #endif |
47b34d40 JW |
1402 | else if (BITS_PER_WORD == 16) |
1403 | { | |
ddef6bc7 JJ |
1404 | val = k[offset >> 1]; |
1405 | if ((offset & 1) == ! WORDS_BIG_ENDIAN) | |
7cae975e | 1406 | val >>= 16; |
73de376f | 1407 | val = ((val & 0xffff) ^ 0x8000) - 0x8000; |
7cae975e | 1408 | return GEN_INT (val); |
47b34d40 | 1409 | } |
7677ffa4 RK |
1410 | else |
1411 | abort (); | |
1632afca | 1412 | } |
a5559dbc RE |
1413 | else if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD |
1414 | && GET_MODE_CLASS (mode) == MODE_FLOAT | |
1415 | && GET_MODE_BITSIZE (mode) > 64 | |
1416 | && GET_CODE (op) == CONST_DOUBLE) | |
5495cc55 RH |
1417 | { |
1418 | long k[4]; | |
1419 | REAL_VALUE_TYPE rv; | |
a5559dbc | 1420 | |
5495cc55 RH |
1421 | REAL_VALUE_FROM_CONST_DOUBLE (rv, op); |
1422 | REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv, k); | |
a5559dbc | 1423 | |
5495cc55 RH |
1424 | if (BITS_PER_WORD == 32) |
1425 | { | |
ddef6bc7 | 1426 | val = k[offset]; |
5495cc55 RH |
1427 | val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000; |
1428 | return GEN_INT (val); | |
1429 | } | |
1430 | #if HOST_BITS_PER_WIDE_INT >= 64 | |
ddef6bc7 | 1431 | else if (BITS_PER_WORD >= 64 && offset <= 1) |
5495cc55 | 1432 | { |
ddef6bc7 | 1433 | val = k[offset * 2 + ! WORDS_BIG_ENDIAN]; |
5495cc55 | 1434 | val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32; |
ddef6bc7 | 1435 | val |= (HOST_WIDE_INT) k[offset * 2 + WORDS_BIG_ENDIAN] & 0xffffffff; |
5495cc55 RH |
1436 | return GEN_INT (val); |
1437 | } | |
1438 | #endif | |
1439 | else | |
1440 | abort (); | |
1441 | } | |
23b2ce53 RS |
1442 | |
1443 | /* Single word float is a little harder, since single- and double-word | |
1444 | values often do not have the same high-order bits. We have already | |
1445 | verified that we want the only defined word of the single-word value. */ | |
9847c2f6 | 1446 | if (GET_MODE_CLASS (mode) == MODE_FLOAT |
7677ffa4 | 1447 | && GET_MODE_BITSIZE (mode) == 32 |
1632afca RS |
1448 | && GET_CODE (op) == CONST_DOUBLE) |
1449 | { | |
9847c2f6 | 1450 | long l; |
1632afca RS |
1451 | REAL_VALUE_TYPE rv; |
1452 | ||
1453 | REAL_VALUE_FROM_CONST_DOUBLE (rv, op); | |
1454 | REAL_VALUE_TO_TARGET_SINGLE (rv, l); | |
aa2ae679 | 1455 | |
7cae975e RH |
1456 | /* Sign extend from known 32-bit value to HOST_WIDE_INT. */ |
1457 | val = l; | |
1458 | val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000; | |
b5a3eb84 | 1459 | |
aa2ae679 JL |
1460 | if (BITS_PER_WORD == 16) |
1461 | { | |
ddef6bc7 | 1462 | if ((offset & 1) == ! WORDS_BIG_ENDIAN) |
7cae975e | 1463 | val >>= 16; |
73de376f | 1464 | val = ((val & 0xffff) ^ 0x8000) - 0x8000; |
aa2ae679 | 1465 | } |
7cae975e RH |
1466 | |
1467 | return GEN_INT (val); | |
1632afca | 1468 | } |
750c9258 | 1469 | |
23b2ce53 RS |
1470 | /* The only remaining cases that we can handle are integers. |
1471 | Convert to proper endianness now since these cases need it. | |
750c9258 | 1472 | At this point, offset == 0 means the low-order word. |
23b2ce53 | 1473 | |
2d4f57f8 RK |
1474 | We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT |
1475 | in general. However, if OP is (const_int 0), we can just return | |
1476 | it for any word. */ | |
1477 | ||
1478 | if (op == const0_rtx) | |
1479 | return op; | |
23b2ce53 RS |
1480 | |
1481 | if (GET_MODE_CLASS (mode) != MODE_INT | |
2d4f57f8 | 1482 | || (GET_CODE (op) != CONST_INT && GET_CODE (op) != CONST_DOUBLE) |
0cf214a0 | 1483 | || BITS_PER_WORD > HOST_BITS_PER_WIDE_INT) |
23b2ce53 RS |
1484 | return 0; |
1485 | ||
1486 | if (WORDS_BIG_ENDIAN) | |
ddef6bc7 | 1487 | offset = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - offset; |
23b2ce53 RS |
1488 | |
1489 | /* Find out which word on the host machine this value is in and get | |
1490 | it from the constant. */ | |
ddef6bc7 | 1491 | val = (offset / size_ratio == 0 |
23b2ce53 RS |
1492 | ? (GET_CODE (op) == CONST_INT ? INTVAL (op) : CONST_DOUBLE_LOW (op)) |
1493 | : (GET_CODE (op) == CONST_INT | |
1494 | ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op))); | |
1495 | ||
3f518020 | 1496 | /* Get the value we want into the low bits of val. */ |
906c4e36 | 1497 | if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT) |
ddef6bc7 | 1498 | val = ((val >> ((offset % size_ratio) * BITS_PER_WORD))); |
3f518020 | 1499 | |
7e4ce834 | 1500 | val = trunc_int_for_mode (val, word_mode); |
23b2ce53 | 1501 | |
906c4e36 | 1502 | return GEN_INT (val); |
23b2ce53 RS |
1503 | } |
1504 | ||
ddef6bc7 JJ |
1505 | /* Return subword OFFSET of operand OP. |
1506 | The word number, OFFSET, is interpreted as the word number starting | |
1507 | at the low-order address. OFFSET 0 is the low-order word if not | |
1508 | WORDS_BIG_ENDIAN, otherwise it is the high-order word. | |
1509 | ||
1510 | If we cannot extract the required word, we return zero. Otherwise, | |
1511 | an rtx corresponding to the requested word will be returned. | |
1512 | ||
1513 | VALIDATE_ADDRESS is nonzero if the address should be validated. Before | |
1514 | reload has completed, a valid address will always be returned. After | |
1515 | reload, if a valid address cannot be returned, we return zero. | |
1516 | ||
1517 | If VALIDATE_ADDRESS is zero, we simply form the required address; validating | |
1518 | it is the responsibility of the caller. | |
1519 | ||
1520 | MODE is the mode of OP in case it is a CONST_INT. | |
1521 | ||
1522 | ??? This is still rather broken for some cases. The problem for the | |
1523 | moment is that all callers of this thing provide no 'goal mode' to | |
1524 | tell us to work with. This exists because all callers were written | |
0631e0bf JH |
1525 | in a word based SUBREG world. |
1526 | Now use of this function can be deprecated by simplify_subreg in most | |
1527 | cases. | |
1528 | */ | |
ddef6bc7 JJ |
1529 | |
1530 | rtx | |
1531 | operand_subword (op, offset, validate_address, mode) | |
1532 | rtx op; | |
1533 | unsigned int offset; | |
1534 | int validate_address; | |
1535 | enum machine_mode mode; | |
1536 | { | |
1537 | if (mode == VOIDmode) | |
1538 | mode = GET_MODE (op); | |
1539 | ||
1540 | if (mode == VOIDmode) | |
1541 | abort (); | |
1542 | ||
30f7a378 | 1543 | /* If OP is narrower than a word, fail. */ |
ddef6bc7 JJ |
1544 | if (mode != BLKmode |
1545 | && (GET_MODE_SIZE (mode) < UNITS_PER_WORD)) | |
1546 | return 0; | |
1547 | ||
30f7a378 | 1548 | /* If we want a word outside OP, return zero. */ |
ddef6bc7 JJ |
1549 | if (mode != BLKmode |
1550 | && (offset + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode)) | |
1551 | return const0_rtx; | |
1552 | ||
ddef6bc7 JJ |
1553 | /* Form a new MEM at the requested address. */ |
1554 | if (GET_CODE (op) == MEM) | |
1555 | { | |
f1ec5147 | 1556 | rtx new = adjust_address_nv (op, word_mode, offset * UNITS_PER_WORD); |
ddef6bc7 | 1557 | |
f1ec5147 RK |
1558 | if (! validate_address) |
1559 | return new; | |
1560 | ||
1561 | else if (reload_completed) | |
ddef6bc7 | 1562 | { |
f1ec5147 RK |
1563 | if (! strict_memory_address_p (word_mode, XEXP (new, 0))) |
1564 | return 0; | |
ddef6bc7 | 1565 | } |
f1ec5147 RK |
1566 | else |
1567 | return replace_equiv_address (new, XEXP (new, 0)); | |
ddef6bc7 JJ |
1568 | } |
1569 | ||
0631e0bf JH |
1570 | /* Rest can be handled by simplify_subreg. */ |
1571 | return simplify_gen_subreg (word_mode, op, mode, (offset * UNITS_PER_WORD)); | |
ddef6bc7 JJ |
1572 | } |
1573 | ||
23b2ce53 RS |
1574 | /* Similar to `operand_subword', but never return 0. If we can't extract |
1575 | the required subword, put OP into a register and try again. If that fails, | |
750c9258 | 1576 | abort. We always validate the address in this case. |
23b2ce53 RS |
1577 | |
1578 | MODE is the mode of OP, in case it is CONST_INT. */ | |
1579 | ||
1580 | rtx | |
ddef6bc7 | 1581 | operand_subword_force (op, offset, mode) |
23b2ce53 | 1582 | rtx op; |
ddef6bc7 | 1583 | unsigned int offset; |
23b2ce53 RS |
1584 | enum machine_mode mode; |
1585 | { | |
ddef6bc7 | 1586 | rtx result = operand_subword (op, offset, 1, mode); |
23b2ce53 RS |
1587 | |
1588 | if (result) | |
1589 | return result; | |
1590 | ||
1591 | if (mode != BLKmode && mode != VOIDmode) | |
77e6b0eb JC |
1592 | { |
1593 | /* If this is a register which can not be accessed by words, copy it | |
1594 | to a pseudo register. */ | |
1595 | if (GET_CODE (op) == REG) | |
1596 | op = copy_to_reg (op); | |
1597 | else | |
1598 | op = force_reg (mode, op); | |
1599 | } | |
23b2ce53 | 1600 | |
ddef6bc7 | 1601 | result = operand_subword (op, offset, 1, mode); |
23b2ce53 RS |
1602 | if (result == 0) |
1603 | abort (); | |
1604 | ||
1605 | return result; | |
1606 | } | |
1607 | \f | |
1608 | /* Given a compare instruction, swap the operands. | |
1609 | A test instruction is changed into a compare of 0 against the operand. */ | |
1610 | ||
1611 | void | |
1612 | reverse_comparison (insn) | |
1613 | rtx insn; | |
1614 | { | |
1615 | rtx body = PATTERN (insn); | |
1616 | rtx comp; | |
1617 | ||
1618 | if (GET_CODE (body) == SET) | |
1619 | comp = SET_SRC (body); | |
1620 | else | |
1621 | comp = SET_SRC (XVECEXP (body, 0, 0)); | |
1622 | ||
1623 | if (GET_CODE (comp) == COMPARE) | |
1624 | { | |
1625 | rtx op0 = XEXP (comp, 0); | |
1626 | rtx op1 = XEXP (comp, 1); | |
1627 | XEXP (comp, 0) = op1; | |
1628 | XEXP (comp, 1) = op0; | |
1629 | } | |
1630 | else | |
1631 | { | |
c5c76735 JL |
1632 | rtx new = gen_rtx_COMPARE (VOIDmode, |
1633 | CONST0_RTX (GET_MODE (comp)), comp); | |
23b2ce53 RS |
1634 | if (GET_CODE (body) == SET) |
1635 | SET_SRC (body) = new; | |
1636 | else | |
1637 | SET_SRC (XVECEXP (body, 0, 0)) = new; | |
1638 | } | |
1639 | } | |
1640 | \f | |
998d7deb RH |
1641 | /* Within a MEM_EXPR, we care about either (1) a component ref of a decl, |
1642 | or (2) a component ref of something variable. Represent the later with | |
1643 | a NULL expression. */ | |
1644 | ||
1645 | static tree | |
1646 | component_ref_for_mem_expr (ref) | |
1647 | tree ref; | |
1648 | { | |
1649 | tree inner = TREE_OPERAND (ref, 0); | |
1650 | ||
1651 | if (TREE_CODE (inner) == COMPONENT_REF) | |
1652 | inner = component_ref_for_mem_expr (inner); | |
c56e3582 RK |
1653 | else |
1654 | { | |
1655 | tree placeholder_ptr = 0; | |
1656 | ||
1657 | /* Now remove any conversions: they don't change what the underlying | |
1658 | object is. Likewise for SAVE_EXPR. Also handle PLACEHOLDER_EXPR. */ | |
1659 | while (TREE_CODE (inner) == NOP_EXPR || TREE_CODE (inner) == CONVERT_EXPR | |
1660 | || TREE_CODE (inner) == NON_LVALUE_EXPR | |
1661 | || TREE_CODE (inner) == VIEW_CONVERT_EXPR | |
1662 | || TREE_CODE (inner) == SAVE_EXPR | |
1663 | || TREE_CODE (inner) == PLACEHOLDER_EXPR) | |
68252e27 KH |
1664 | if (TREE_CODE (inner) == PLACEHOLDER_EXPR) |
1665 | inner = find_placeholder (inner, &placeholder_ptr); | |
1666 | else | |
1667 | inner = TREE_OPERAND (inner, 0); | |
c56e3582 RK |
1668 | |
1669 | if (! DECL_P (inner)) | |
1670 | inner = NULL_TREE; | |
1671 | } | |
998d7deb RH |
1672 | |
1673 | if (inner == TREE_OPERAND (ref, 0)) | |
1674 | return ref; | |
1675 | else | |
c56e3582 RK |
1676 | return build (COMPONENT_REF, TREE_TYPE (ref), inner, |
1677 | TREE_OPERAND (ref, 1)); | |
998d7deb | 1678 | } |
173b24b9 RK |
1679 | |
1680 | /* Given REF, a MEM, and T, either the type of X or the expression | |
1681 | corresponding to REF, set the memory attributes. OBJECTP is nonzero | |
1682 | if we are making a new object of this type. */ | |
1683 | ||
1684 | void | |
1685 | set_mem_attributes (ref, t, objectp) | |
1686 | rtx ref; | |
1687 | tree t; | |
1688 | int objectp; | |
1689 | { | |
8ac61af7 | 1690 | HOST_WIDE_INT alias = MEM_ALIAS_SET (ref); |
998d7deb | 1691 | tree expr = MEM_EXPR (ref); |
8ac61af7 RK |
1692 | rtx offset = MEM_OFFSET (ref); |
1693 | rtx size = MEM_SIZE (ref); | |
1694 | unsigned int align = MEM_ALIGN (ref); | |
173b24b9 RK |
1695 | tree type; |
1696 | ||
1697 | /* It can happen that type_for_mode was given a mode for which there | |
1698 | is no language-level type. In which case it returns NULL, which | |
1699 | we can see here. */ | |
1700 | if (t == NULL_TREE) | |
1701 | return; | |
1702 | ||
1703 | type = TYPE_P (t) ? t : TREE_TYPE (t); | |
1704 | ||
173b24b9 RK |
1705 | /* If we have already set DECL_RTL = ref, get_alias_set will get the |
1706 | wrong answer, as it assumes that DECL_RTL already has the right alias | |
1707 | info. Callers should not set DECL_RTL until after the call to | |
1708 | set_mem_attributes. */ | |
1709 | if (DECL_P (t) && ref == DECL_RTL_IF_SET (t)) | |
1710 | abort (); | |
1711 | ||
738cc472 | 1712 | /* Get the alias set from the expression or type (perhaps using a |
8ac61af7 RK |
1713 | front-end routine) and use it. */ |
1714 | alias = get_alias_set (t); | |
173b24b9 RK |
1715 | |
1716 | MEM_VOLATILE_P (ref) = TYPE_VOLATILE (type); | |
1717 | MEM_IN_STRUCT_P (ref) = AGGREGATE_TYPE_P (type); | |
03bf2c23 | 1718 | RTX_UNCHANGING_P (ref) |
1285011e RK |
1719 | |= ((lang_hooks.honor_readonly |
1720 | && (TYPE_READONLY (type) || TREE_READONLY (t))) | |
1721 | || (! TYPE_P (t) && TREE_CONSTANT (t))); | |
173b24b9 | 1722 | |
8ac61af7 RK |
1723 | /* If we are making an object of this type, or if this is a DECL, we know |
1724 | that it is a scalar if the type is not an aggregate. */ | |
1725 | if ((objectp || DECL_P (t)) && ! AGGREGATE_TYPE_P (type)) | |
173b24b9 RK |
1726 | MEM_SCALAR_P (ref) = 1; |
1727 | ||
c3d32120 RK |
1728 | /* We can set the alignment from the type if we are making an object, |
1729 | this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */ | |
1730 | if (objectp || TREE_CODE (t) == INDIRECT_REF || TYPE_ALIGN_OK (type)) | |
1731 | align = MAX (align, TYPE_ALIGN (type)); | |
40c0668b | 1732 | |
738cc472 RK |
1733 | /* If the size is known, we can set that. */ |
1734 | if (TYPE_SIZE_UNIT (type) && host_integerp (TYPE_SIZE_UNIT (type), 1)) | |
8ac61af7 | 1735 | size = GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type), 1)); |
738cc472 | 1736 | |
80965c18 RK |
1737 | /* If T is not a type, we may be able to deduce some more information about |
1738 | the expression. */ | |
1739 | if (! TYPE_P (t)) | |
8ac61af7 RK |
1740 | { |
1741 | maybe_set_unchanging (ref, t); | |
1742 | if (TREE_THIS_VOLATILE (t)) | |
1743 | MEM_VOLATILE_P (ref) = 1; | |
173b24b9 | 1744 | |
c56e3582 RK |
1745 | /* Now remove any conversions: they don't change what the underlying |
1746 | object is. Likewise for SAVE_EXPR. */ | |
8ac61af7 | 1747 | while (TREE_CODE (t) == NOP_EXPR || TREE_CODE (t) == CONVERT_EXPR |
c56e3582 RK |
1748 | || TREE_CODE (t) == NON_LVALUE_EXPR |
1749 | || TREE_CODE (t) == VIEW_CONVERT_EXPR | |
1750 | || TREE_CODE (t) == SAVE_EXPR) | |
8ac61af7 RK |
1751 | t = TREE_OPERAND (t, 0); |
1752 | ||
10b76d73 RK |
1753 | /* If this expression can't be addressed (e.g., it contains a reference |
1754 | to a non-addressable field), show we don't change its alias set. */ | |
1755 | if (! can_address_p (t)) | |
1756 | MEM_KEEP_ALIAS_SET_P (ref) = 1; | |
1757 | ||
8ac61af7 RK |
1758 | /* If this is a decl, set the attributes of the MEM from it. */ |
1759 | if (DECL_P (t)) | |
1760 | { | |
998d7deb RH |
1761 | expr = t; |
1762 | offset = const0_rtx; | |
8ac61af7 RK |
1763 | size = (DECL_SIZE_UNIT (t) |
1764 | && host_integerp (DECL_SIZE_UNIT (t), 1) | |
1765 | ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t), 1)) : 0); | |
68252e27 | 1766 | align = DECL_ALIGN (t); |
8ac61af7 RK |
1767 | } |
1768 | ||
40c0668b | 1769 | /* If this is a constant, we know the alignment. */ |
9ddfb1a7 RK |
1770 | else if (TREE_CODE_CLASS (TREE_CODE (t)) == 'c') |
1771 | { | |
1772 | align = TYPE_ALIGN (type); | |
1773 | #ifdef CONSTANT_ALIGNMENT | |
1774 | align = CONSTANT_ALIGNMENT (t, align); | |
1775 | #endif | |
1776 | } | |
998d7deb RH |
1777 | |
1778 | /* If this is a field reference and not a bit-field, record it. */ | |
1779 | /* ??? There is some information that can be gleened from bit-fields, | |
1780 | such as the word offset in the structure that might be modified. | |
1781 | But skip it for now. */ | |
1782 | else if (TREE_CODE (t) == COMPONENT_REF | |
1783 | && ! DECL_BIT_FIELD (TREE_OPERAND (t, 1))) | |
1784 | { | |
1785 | expr = component_ref_for_mem_expr (t); | |
1786 | offset = const0_rtx; | |
1787 | /* ??? Any reason the field size would be different than | |
1788 | the size we got from the type? */ | |
1789 | } | |
1790 | ||
1791 | /* If this is an array reference, look for an outer field reference. */ | |
1792 | else if (TREE_CODE (t) == ARRAY_REF) | |
1793 | { | |
1794 | tree off_tree = size_zero_node; | |
1795 | ||
1796 | do | |
1797 | { | |
1798 | off_tree | |
1799 | = fold (build (PLUS_EXPR, sizetype, | |
1800 | fold (build (MULT_EXPR, sizetype, | |
1801 | TREE_OPERAND (t, 1), | |
1802 | TYPE_SIZE_UNIT (TREE_TYPE (t)))), | |
1803 | off_tree)); | |
1804 | t = TREE_OPERAND (t, 0); | |
1805 | } | |
1806 | while (TREE_CODE (t) == ARRAY_REF); | |
1807 | ||
1808 | if (TREE_CODE (t) == COMPONENT_REF) | |
1809 | { | |
1810 | expr = component_ref_for_mem_expr (t); | |
1811 | if (host_integerp (off_tree, 1)) | |
1812 | offset = GEN_INT (tree_low_cst (off_tree, 1)); | |
1813 | /* ??? Any reason the field size would be different than | |
1814 | the size we got from the type? */ | |
1815 | } | |
1816 | } | |
8ac61af7 RK |
1817 | } |
1818 | ||
1819 | /* Now set the attributes we computed above. */ | |
10b76d73 | 1820 | MEM_ATTRS (ref) |
998d7deb | 1821 | = get_mem_attrs (alias, expr, offset, size, align, GET_MODE (ref)); |
8ac61af7 RK |
1822 | |
1823 | /* If this is already known to be a scalar or aggregate, we are done. */ | |
1824 | if (MEM_IN_STRUCT_P (ref) || MEM_SCALAR_P (ref)) | |
738cc472 RK |
1825 | return; |
1826 | ||
8ac61af7 RK |
1827 | /* If it is a reference into an aggregate, this is part of an aggregate. |
1828 | Otherwise we don't know. */ | |
173b24b9 RK |
1829 | else if (TREE_CODE (t) == COMPONENT_REF || TREE_CODE (t) == ARRAY_REF |
1830 | || TREE_CODE (t) == ARRAY_RANGE_REF | |
1831 | || TREE_CODE (t) == BIT_FIELD_REF) | |
1832 | MEM_IN_STRUCT_P (ref) = 1; | |
1833 | } | |
1834 | ||
1835 | /* Set the alias set of MEM to SET. */ | |
1836 | ||
1837 | void | |
1838 | set_mem_alias_set (mem, set) | |
1839 | rtx mem; | |
1840 | HOST_WIDE_INT set; | |
1841 | { | |
68252e27 | 1842 | #ifdef ENABLE_CHECKING |
173b24b9 RK |
1843 | /* If the new and old alias sets don't conflict, something is wrong. */ |
1844 | if (!alias_sets_conflict_p (set, MEM_ALIAS_SET (mem))) | |
1845 | abort (); | |
173b24b9 RK |
1846 | #endif |
1847 | ||
998d7deb | 1848 | MEM_ATTRS (mem) = get_mem_attrs (set, MEM_EXPR (mem), MEM_OFFSET (mem), |
10b76d73 RK |
1849 | MEM_SIZE (mem), MEM_ALIGN (mem), |
1850 | GET_MODE (mem)); | |
173b24b9 | 1851 | } |
738cc472 | 1852 | |
d022d93e | 1853 | /* Set the alignment of MEM to ALIGN bits. */ |
738cc472 RK |
1854 | |
1855 | void | |
1856 | set_mem_align (mem, align) | |
1857 | rtx mem; | |
1858 | unsigned int align; | |
1859 | { | |
998d7deb | 1860 | MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem), |
10b76d73 RK |
1861 | MEM_OFFSET (mem), MEM_SIZE (mem), align, |
1862 | GET_MODE (mem)); | |
738cc472 | 1863 | } |
1285011e | 1864 | |
998d7deb | 1865 | /* Set the expr for MEM to EXPR. */ |
1285011e RK |
1866 | |
1867 | void | |
998d7deb | 1868 | set_mem_expr (mem, expr) |
1285011e | 1869 | rtx mem; |
998d7deb | 1870 | tree expr; |
1285011e RK |
1871 | { |
1872 | MEM_ATTRS (mem) | |
998d7deb | 1873 | = get_mem_attrs (MEM_ALIAS_SET (mem), expr, MEM_OFFSET (mem), |
1285011e RK |
1874 | MEM_SIZE (mem), MEM_ALIGN (mem), GET_MODE (mem)); |
1875 | } | |
998d7deb RH |
1876 | |
1877 | /* Set the offset of MEM to OFFSET. */ | |
1878 | ||
1879 | void | |
1880 | set_mem_offset (mem, offset) | |
1881 | rtx mem, offset; | |
1882 | { | |
1883 | MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem), | |
1884 | offset, MEM_SIZE (mem), MEM_ALIGN (mem), | |
1885 | GET_MODE (mem)); | |
1886 | } | |
173b24b9 | 1887 | \f |
738cc472 RK |
1888 | /* Return a memory reference like MEMREF, but with its mode changed to MODE |
1889 | and its address changed to ADDR. (VOIDmode means don't change the mode. | |
1890 | NULL for ADDR means don't change the address.) VALIDATE is nonzero if the | |
1891 | returned memory location is required to be valid. The memory | |
1892 | attributes are not changed. */ | |
23b2ce53 | 1893 | |
738cc472 | 1894 | static rtx |
f1ec5147 | 1895 | change_address_1 (memref, mode, addr, validate) |
23b2ce53 RS |
1896 | rtx memref; |
1897 | enum machine_mode mode; | |
1898 | rtx addr; | |
f1ec5147 | 1899 | int validate; |
23b2ce53 RS |
1900 | { |
1901 | rtx new; | |
1902 | ||
1903 | if (GET_CODE (memref) != MEM) | |
1904 | abort (); | |
1905 | if (mode == VOIDmode) | |
1906 | mode = GET_MODE (memref); | |
1907 | if (addr == 0) | |
1908 | addr = XEXP (memref, 0); | |
1909 | ||
f1ec5147 | 1910 | if (validate) |
23b2ce53 | 1911 | { |
f1ec5147 RK |
1912 | if (reload_in_progress || reload_completed) |
1913 | { | |
1914 | if (! memory_address_p (mode, addr)) | |
1915 | abort (); | |
1916 | } | |
1917 | else | |
1918 | addr = memory_address (mode, addr); | |
23b2ce53 | 1919 | } |
750c9258 | 1920 | |
9b04c6a8 RK |
1921 | if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref)) |
1922 | return memref; | |
1923 | ||
3b80f6ca | 1924 | new = gen_rtx_MEM (mode, addr); |
c6df88cb | 1925 | MEM_COPY_ATTRIBUTES (new, memref); |
23b2ce53 RS |
1926 | return new; |
1927 | } | |
792760b9 | 1928 | |
738cc472 RK |
1929 | /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what |
1930 | way we are changing MEMREF, so we only preserve the alias set. */ | |
f4ef873c RK |
1931 | |
1932 | rtx | |
738cc472 | 1933 | change_address (memref, mode, addr) |
f4ef873c RK |
1934 | rtx memref; |
1935 | enum machine_mode mode; | |
738cc472 | 1936 | rtx addr; |
f4ef873c | 1937 | { |
738cc472 RK |
1938 | rtx new = change_address_1 (memref, mode, addr, 1); |
1939 | enum machine_mode mmode = GET_MODE (new); | |
c2f7bcc3 | 1940 | |
738cc472 RK |
1941 | MEM_ATTRS (new) |
1942 | = get_mem_attrs (MEM_ALIAS_SET (memref), 0, 0, | |
1943 | mmode == BLKmode ? 0 : GEN_INT (GET_MODE_SIZE (mmode)), | |
a06ef755 RK |
1944 | (mmode == BLKmode ? BITS_PER_UNIT |
1945 | : GET_MODE_ALIGNMENT (mmode)), | |
10b76d73 | 1946 | mmode); |
823e3574 | 1947 | |
738cc472 | 1948 | return new; |
f4ef873c | 1949 | } |
792760b9 | 1950 | |
738cc472 RK |
1951 | /* Return a memory reference like MEMREF, but with its mode changed |
1952 | to MODE and its address offset by OFFSET bytes. If VALIDATE is | |
630036c6 JJ |
1953 | nonzero, the memory address is forced to be valid. |
1954 | If ADJUST is zero, OFFSET is only used to update MEM_ATTRS | |
1955 | and caller is responsible for adjusting MEMREF base register. */ | |
f1ec5147 RK |
1956 | |
1957 | rtx | |
630036c6 | 1958 | adjust_address_1 (memref, mode, offset, validate, adjust) |
f1ec5147 RK |
1959 | rtx memref; |
1960 | enum machine_mode mode; | |
1961 | HOST_WIDE_INT offset; | |
630036c6 | 1962 | int validate, adjust; |
f1ec5147 | 1963 | { |
823e3574 | 1964 | rtx addr = XEXP (memref, 0); |
738cc472 RK |
1965 | rtx new; |
1966 | rtx memoffset = MEM_OFFSET (memref); | |
10b76d73 | 1967 | rtx size = 0; |
738cc472 | 1968 | unsigned int memalign = MEM_ALIGN (memref); |
823e3574 | 1969 | |
d14419e4 | 1970 | /* ??? Prefer to create garbage instead of creating shared rtl. |
4a78c787 | 1971 | This may happen even if offset is non-zero -- consider |
d14419e4 RH |
1972 | (plus (plus reg reg) const_int) -- so do this always. */ |
1973 | addr = copy_rtx (addr); | |
1974 | ||
4a78c787 RH |
1975 | if (adjust) |
1976 | { | |
1977 | /* If MEMREF is a LO_SUM and the offset is within the alignment of the | |
1978 | object, we can merge it into the LO_SUM. */ | |
1979 | if (GET_MODE (memref) != BLKmode && GET_CODE (addr) == LO_SUM | |
1980 | && offset >= 0 | |
1981 | && (unsigned HOST_WIDE_INT) offset | |
1982 | < GET_MODE_ALIGNMENT (GET_MODE (memref)) / BITS_PER_UNIT) | |
1983 | addr = gen_rtx_LO_SUM (Pmode, XEXP (addr, 0), | |
1984 | plus_constant (XEXP (addr, 1), offset)); | |
1985 | else | |
1986 | addr = plus_constant (addr, offset); | |
1987 | } | |
823e3574 | 1988 | |
738cc472 RK |
1989 | new = change_address_1 (memref, mode, addr, validate); |
1990 | ||
1991 | /* Compute the new values of the memory attributes due to this adjustment. | |
1992 | We add the offsets and update the alignment. */ | |
1993 | if (memoffset) | |
1994 | memoffset = GEN_INT (offset + INTVAL (memoffset)); | |
1995 | ||
03bf2c23 RK |
1996 | /* Compute the new alignment by taking the MIN of the alignment and the |
1997 | lowest-order set bit in OFFSET, but don't change the alignment if OFFSET | |
1998 | if zero. */ | |
1999 | if (offset != 0) | |
3bf1e984 RK |
2000 | memalign |
2001 | = MIN (memalign, | |
2002 | (unsigned HOST_WIDE_INT) (offset & -offset) * BITS_PER_UNIT); | |
738cc472 | 2003 | |
10b76d73 | 2004 | /* We can compute the size in a number of ways. */ |
a06ef755 RK |
2005 | if (GET_MODE (new) != BLKmode) |
2006 | size = GEN_INT (GET_MODE_SIZE (GET_MODE (new))); | |
10b76d73 RK |
2007 | else if (MEM_SIZE (memref)) |
2008 | size = plus_constant (MEM_SIZE (memref), -offset); | |
2009 | ||
998d7deb | 2010 | MEM_ATTRS (new) = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref), |
10b76d73 | 2011 | memoffset, size, memalign, GET_MODE (new)); |
738cc472 RK |
2012 | |
2013 | /* At some point, we should validate that this offset is within the object, | |
2014 | if all the appropriate values are known. */ | |
2015 | return new; | |
f1ec5147 RK |
2016 | } |
2017 | ||
630036c6 JJ |
2018 | /* Return a memory reference like MEMREF, but with its mode changed |
2019 | to MODE and its address changed to ADDR, which is assumed to be | |
2020 | MEMREF offseted by OFFSET bytes. If VALIDATE is | |
2021 | nonzero, the memory address is forced to be valid. */ | |
2022 | ||
2023 | rtx | |
2024 | adjust_automodify_address_1 (memref, mode, addr, offset, validate) | |
2025 | rtx memref; | |
2026 | enum machine_mode mode; | |
2027 | rtx addr; | |
2028 | HOST_WIDE_INT offset; | |
2029 | int validate; | |
2030 | { | |
2031 | memref = change_address_1 (memref, VOIDmode, addr, validate); | |
2032 | return adjust_address_1 (memref, mode, offset, validate, 0); | |
2033 | } | |
2034 | ||
8ac61af7 RK |
2035 | /* Return a memory reference like MEMREF, but whose address is changed by |
2036 | adding OFFSET, an RTX, to it. POW2 is the highest power of two factor | |
2037 | known to be in OFFSET (possibly 1). */ | |
0d4903b8 RK |
2038 | |
2039 | rtx | |
2040 | offset_address (memref, offset, pow2) | |
2041 | rtx memref; | |
2042 | rtx offset; | |
2043 | HOST_WIDE_INT pow2; | |
2044 | { | |
e3c8ea67 RH |
2045 | rtx new, addr = XEXP (memref, 0); |
2046 | ||
2047 | new = simplify_gen_binary (PLUS, Pmode, addr, offset); | |
2048 | ||
68252e27 | 2049 | /* At this point we don't know _why_ the address is invalid. It |
e3c8ea67 RH |
2050 | could have secondary memory refereces, multiplies or anything. |
2051 | ||
2052 | However, if we did go and rearrange things, we can wind up not | |
2053 | being able to recognize the magic around pic_offset_table_rtx. | |
2054 | This stuff is fragile, and is yet another example of why it is | |
2055 | bad to expose PIC machinery too early. */ | |
2056 | if (! memory_address_p (GET_MODE (memref), new) | |
2057 | && GET_CODE (addr) == PLUS | |
2058 | && XEXP (addr, 0) == pic_offset_table_rtx) | |
2059 | { | |
2060 | addr = force_reg (GET_MODE (addr), addr); | |
2061 | new = simplify_gen_binary (PLUS, Pmode, addr, offset); | |
2062 | } | |
2063 | ||
f6041ed8 | 2064 | update_temp_slot_address (XEXP (memref, 0), new); |
e3c8ea67 | 2065 | new = change_address_1 (memref, VOIDmode, new, 1); |
0d4903b8 RK |
2066 | |
2067 | /* Update the alignment to reflect the offset. Reset the offset, which | |
2068 | we don't know. */ | |
2cc2d4bb RK |
2069 | MEM_ATTRS (new) |
2070 | = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref), 0, 0, | |
2071 | MIN (MEM_ALIGN (memref), | |
3bf1e984 | 2072 | (unsigned HOST_WIDE_INT) pow2 * BITS_PER_UNIT), |
2cc2d4bb | 2073 | GET_MODE (new)); |
0d4903b8 RK |
2074 | return new; |
2075 | } | |
68252e27 | 2076 | |
792760b9 RK |
2077 | /* Return a memory reference like MEMREF, but with its address changed to |
2078 | ADDR. The caller is asserting that the actual piece of memory pointed | |
2079 | to is the same, just the form of the address is being changed, such as | |
2080 | by putting something into a register. */ | |
2081 | ||
2082 | rtx | |
2083 | replace_equiv_address (memref, addr) | |
2084 | rtx memref; | |
2085 | rtx addr; | |
2086 | { | |
738cc472 RK |
2087 | /* change_address_1 copies the memory attribute structure without change |
2088 | and that's exactly what we want here. */ | |
40c0668b | 2089 | update_temp_slot_address (XEXP (memref, 0), addr); |
738cc472 | 2090 | return change_address_1 (memref, VOIDmode, addr, 1); |
792760b9 | 2091 | } |
738cc472 | 2092 | |
f1ec5147 RK |
2093 | /* Likewise, but the reference is not required to be valid. */ |
2094 | ||
2095 | rtx | |
2096 | replace_equiv_address_nv (memref, addr) | |
2097 | rtx memref; | |
2098 | rtx addr; | |
2099 | { | |
f1ec5147 RK |
2100 | return change_address_1 (memref, VOIDmode, addr, 0); |
2101 | } | |
e7dfe4bb RH |
2102 | |
2103 | /* Return a memory reference like MEMREF, but with its mode widened to | |
2104 | MODE and offset by OFFSET. This would be used by targets that e.g. | |
2105 | cannot issue QImode memory operations and have to use SImode memory | |
2106 | operations plus masking logic. */ | |
2107 | ||
2108 | rtx | |
2109 | widen_memory_access (memref, mode, offset) | |
2110 | rtx memref; | |
2111 | enum machine_mode mode; | |
2112 | HOST_WIDE_INT offset; | |
2113 | { | |
2114 | rtx new = adjust_address_1 (memref, mode, offset, 1, 1); | |
2115 | tree expr = MEM_EXPR (new); | |
2116 | rtx memoffset = MEM_OFFSET (new); | |
2117 | unsigned int size = GET_MODE_SIZE (mode); | |
2118 | ||
2119 | /* If we don't know what offset we were at within the expression, then | |
2120 | we can't know if we've overstepped the bounds. */ | |
fa1591cb | 2121 | if (! memoffset) |
e7dfe4bb RH |
2122 | expr = NULL_TREE; |
2123 | ||
2124 | while (expr) | |
2125 | { | |
2126 | if (TREE_CODE (expr) == COMPONENT_REF) | |
2127 | { | |
2128 | tree field = TREE_OPERAND (expr, 1); | |
2129 | ||
2130 | if (! DECL_SIZE_UNIT (field)) | |
2131 | { | |
2132 | expr = NULL_TREE; | |
2133 | break; | |
2134 | } | |
2135 | ||
2136 | /* Is the field at least as large as the access? If so, ok, | |
2137 | otherwise strip back to the containing structure. */ | |
03667700 RK |
2138 | if (TREE_CODE (DECL_SIZE_UNIT (field)) == INTEGER_CST |
2139 | && compare_tree_int (DECL_SIZE_UNIT (field), size) >= 0 | |
e7dfe4bb RH |
2140 | && INTVAL (memoffset) >= 0) |
2141 | break; | |
2142 | ||
2143 | if (! host_integerp (DECL_FIELD_OFFSET (field), 1)) | |
2144 | { | |
2145 | expr = NULL_TREE; | |
2146 | break; | |
2147 | } | |
2148 | ||
2149 | expr = TREE_OPERAND (expr, 0); | |
2150 | memoffset = (GEN_INT (INTVAL (memoffset) | |
2151 | + tree_low_cst (DECL_FIELD_OFFSET (field), 1) | |
2152 | + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 1) | |
2153 | / BITS_PER_UNIT))); | |
2154 | } | |
2155 | /* Similarly for the decl. */ | |
2156 | else if (DECL_P (expr) | |
2157 | && DECL_SIZE_UNIT (expr) | |
45f79783 | 2158 | && TREE_CODE (DECL_SIZE_UNIT (expr)) == INTEGER_CST |
e7dfe4bb RH |
2159 | && compare_tree_int (DECL_SIZE_UNIT (expr), size) >= 0 |
2160 | && (! memoffset || INTVAL (memoffset) >= 0)) | |
2161 | break; | |
2162 | else | |
2163 | { | |
2164 | /* The widened memory access overflows the expression, which means | |
2165 | that it could alias another expression. Zap it. */ | |
2166 | expr = NULL_TREE; | |
2167 | break; | |
2168 | } | |
2169 | } | |
2170 | ||
2171 | if (! expr) | |
2172 | memoffset = NULL_RTX; | |
2173 | ||
2174 | /* The widened memory may alias other stuff, so zap the alias set. */ | |
2175 | /* ??? Maybe use get_alias_set on any remaining expression. */ | |
2176 | ||
2177 | MEM_ATTRS (new) = get_mem_attrs (0, expr, memoffset, GEN_INT (size), | |
2178 | MEM_ALIGN (new), mode); | |
2179 | ||
2180 | return new; | |
2181 | } | |
23b2ce53 RS |
2182 | \f |
2183 | /* Return a newly created CODE_LABEL rtx with a unique label number. */ | |
2184 | ||
2185 | rtx | |
2186 | gen_label_rtx () | |
2187 | { | |
b3694847 | 2188 | rtx label; |
ca695ac9 | 2189 | |
ba4f7968 JH |
2190 | label = gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX, NULL_RTX, |
2191 | NULL, label_num++, NULL, NULL); | |
ca695ac9 | 2192 | |
23b2ce53 | 2193 | LABEL_NUSES (label) = 0; |
8cd0faaf | 2194 | LABEL_ALTERNATE_NAME (label) = NULL; |
23b2ce53 RS |
2195 | return label; |
2196 | } | |
2197 | \f | |
2198 | /* For procedure integration. */ | |
2199 | ||
23b2ce53 | 2200 | /* Install new pointers to the first and last insns in the chain. |
86fe05e0 | 2201 | Also, set cur_insn_uid to one higher than the last in use. |
23b2ce53 RS |
2202 | Used for an inline-procedure after copying the insn chain. */ |
2203 | ||
2204 | void | |
2205 | set_new_first_and_last_insn (first, last) | |
2206 | rtx first, last; | |
2207 | { | |
86fe05e0 RK |
2208 | rtx insn; |
2209 | ||
23b2ce53 RS |
2210 | first_insn = first; |
2211 | last_insn = last; | |
86fe05e0 RK |
2212 | cur_insn_uid = 0; |
2213 | ||
2214 | for (insn = first; insn; insn = NEXT_INSN (insn)) | |
2215 | cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn)); | |
2216 | ||
2217 | cur_insn_uid++; | |
23b2ce53 RS |
2218 | } |
2219 | ||
2220 | /* Set the range of label numbers found in the current function. | |
2221 | This is used when belatedly compiling an inline function. */ | |
2222 | ||
2223 | void | |
2224 | set_new_first_and_last_label_num (first, last) | |
2225 | int first, last; | |
2226 | { | |
2227 | base_label_num = label_num; | |
2228 | first_label_num = first; | |
2229 | last_label_num = last; | |
2230 | } | |
49ad7cfa BS |
2231 | |
2232 | /* Set the last label number found in the current function. | |
2233 | This is used when belatedly compiling an inline function. */ | |
23b2ce53 RS |
2234 | |
2235 | void | |
49ad7cfa BS |
2236 | set_new_last_label_num (last) |
2237 | int last; | |
23b2ce53 | 2238 | { |
49ad7cfa BS |
2239 | base_label_num = label_num; |
2240 | last_label_num = last; | |
23b2ce53 | 2241 | } |
49ad7cfa | 2242 | \f |
23b2ce53 RS |
2243 | /* Restore all variables describing the current status from the structure *P. |
2244 | This is used after a nested function. */ | |
2245 | ||
2246 | void | |
2247 | restore_emit_status (p) | |
272df862 | 2248 | struct function *p ATTRIBUTE_UNUSED; |
23b2ce53 | 2249 | { |
457a2d9c | 2250 | last_label_num = 0; |
23b2ce53 RS |
2251 | } |
2252 | \f | |
750c9258 | 2253 | /* Go through all the RTL insn bodies and copy any invalid shared |
d1b81779 | 2254 | structure. This routine should only be called once. */ |
23b2ce53 RS |
2255 | |
2256 | void | |
d1b81779 GK |
2257 | unshare_all_rtl (fndecl, insn) |
2258 | tree fndecl; | |
2259 | rtx insn; | |
23b2ce53 | 2260 | { |
d1b81779 | 2261 | tree decl; |
23b2ce53 | 2262 | |
d1b81779 GK |
2263 | /* Make sure that virtual parameters are not shared. */ |
2264 | for (decl = DECL_ARGUMENTS (fndecl); decl; decl = TREE_CHAIN (decl)) | |
19e7881c | 2265 | SET_DECL_RTL (decl, copy_rtx_if_shared (DECL_RTL (decl))); |
d1b81779 | 2266 | |
5c6df058 AO |
2267 | /* Make sure that virtual stack slots are not shared. */ |
2268 | unshare_all_decls (DECL_INITIAL (fndecl)); | |
2269 | ||
d1b81779 GK |
2270 | /* Unshare just about everything else. */ |
2271 | unshare_all_rtl_1 (insn); | |
750c9258 | 2272 | |
23b2ce53 RS |
2273 | /* Make sure the addresses of stack slots found outside the insn chain |
2274 | (such as, in DECL_RTL of a variable) are not shared | |
2275 | with the insn chain. | |
2276 | ||
2277 | This special care is necessary when the stack slot MEM does not | |
2278 | actually appear in the insn chain. If it does appear, its address | |
2279 | is unshared from all else at that point. */ | |
242b0ce6 | 2280 | stack_slot_list = copy_rtx_if_shared (stack_slot_list); |
23b2ce53 RS |
2281 | } |
2282 | ||
750c9258 | 2283 | /* Go through all the RTL insn bodies and copy any invalid shared |
d1b81779 GK |
2284 | structure, again. This is a fairly expensive thing to do so it |
2285 | should be done sparingly. */ | |
2286 | ||
2287 | void | |
2288 | unshare_all_rtl_again (insn) | |
2289 | rtx insn; | |
2290 | { | |
2291 | rtx p; | |
624c87aa RE |
2292 | tree decl; |
2293 | ||
d1b81779 | 2294 | for (p = insn; p; p = NEXT_INSN (p)) |
2c3c49de | 2295 | if (INSN_P (p)) |
d1b81779 GK |
2296 | { |
2297 | reset_used_flags (PATTERN (p)); | |
2298 | reset_used_flags (REG_NOTES (p)); | |
2299 | reset_used_flags (LOG_LINKS (p)); | |
2300 | } | |
624c87aa | 2301 | |
2d4aecb3 AO |
2302 | /* Make sure that virtual stack slots are not shared. */ |
2303 | reset_used_decls (DECL_INITIAL (cfun->decl)); | |
2304 | ||
624c87aa RE |
2305 | /* Make sure that virtual parameters are not shared. */ |
2306 | for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = TREE_CHAIN (decl)) | |
2307 | reset_used_flags (DECL_RTL (decl)); | |
2308 | ||
2309 | reset_used_flags (stack_slot_list); | |
2310 | ||
2311 | unshare_all_rtl (cfun->decl, insn); | |
d1b81779 GK |
2312 | } |
2313 | ||
2314 | /* Go through all the RTL insn bodies and copy any invalid shared structure. | |
2315 | Assumes the mark bits are cleared at entry. */ | |
2316 | ||
2317 | static void | |
2318 | unshare_all_rtl_1 (insn) | |
2319 | rtx insn; | |
2320 | { | |
2321 | for (; insn; insn = NEXT_INSN (insn)) | |
2c3c49de | 2322 | if (INSN_P (insn)) |
d1b81779 GK |
2323 | { |
2324 | PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn)); | |
2325 | REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn)); | |
2326 | LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn)); | |
2327 | } | |
2328 | } | |
2329 | ||
5c6df058 AO |
2330 | /* Go through all virtual stack slots of a function and copy any |
2331 | shared structure. */ | |
2332 | static void | |
2333 | unshare_all_decls (blk) | |
2334 | tree blk; | |
2335 | { | |
2336 | tree t; | |
2337 | ||
2338 | /* Copy shared decls. */ | |
2339 | for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t)) | |
19e7881c MM |
2340 | if (DECL_RTL_SET_P (t)) |
2341 | SET_DECL_RTL (t, copy_rtx_if_shared (DECL_RTL (t))); | |
5c6df058 AO |
2342 | |
2343 | /* Now process sub-blocks. */ | |
2344 | for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t)) | |
2345 | unshare_all_decls (t); | |
2346 | } | |
2347 | ||
2d4aecb3 | 2348 | /* Go through all virtual stack slots of a function and mark them as |
30f7a378 | 2349 | not shared. */ |
2d4aecb3 AO |
2350 | static void |
2351 | reset_used_decls (blk) | |
2352 | tree blk; | |
2353 | { | |
2354 | tree t; | |
2355 | ||
2356 | /* Mark decls. */ | |
2357 | for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t)) | |
19e7881c MM |
2358 | if (DECL_RTL_SET_P (t)) |
2359 | reset_used_flags (DECL_RTL (t)); | |
2d4aecb3 AO |
2360 | |
2361 | /* Now process sub-blocks. */ | |
2362 | for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t)) | |
2363 | reset_used_decls (t); | |
2364 | } | |
2365 | ||
127c1ba5 | 2366 | /* Similar to `copy_rtx' except that if MAY_SHARE is present, it is |
93fe8e92 RK |
2367 | placed in the result directly, rather than being copied. MAY_SHARE is |
2368 | either a MEM of an EXPR_LIST of MEMs. */ | |
127c1ba5 RK |
2369 | |
2370 | rtx | |
2371 | copy_most_rtx (orig, may_share) | |
2372 | rtx orig; | |
2373 | rtx may_share; | |
2374 | { | |
2375 | rtx copy; | |
2376 | int i, j; | |
2377 | RTX_CODE code; | |
2378 | const char *format_ptr; | |
2379 | ||
93fe8e92 RK |
2380 | if (orig == may_share |
2381 | || (GET_CODE (may_share) == EXPR_LIST | |
2382 | && in_expr_list_p (may_share, orig))) | |
127c1ba5 RK |
2383 | return orig; |
2384 | ||
2385 | code = GET_CODE (orig); | |
2386 | ||
2387 | switch (code) | |
2388 | { | |
2389 | case REG: | |
2390 | case QUEUED: | |
2391 | case CONST_INT: | |
2392 | case CONST_DOUBLE: | |
2393 | case CONST_VECTOR: | |
2394 | case SYMBOL_REF: | |
2395 | case CODE_LABEL: | |
2396 | case PC: | |
2397 | case CC0: | |
2398 | return orig; | |
2399 | default: | |
2400 | break; | |
2401 | } | |
2402 | ||
2403 | copy = rtx_alloc (code); | |
2404 | PUT_MODE (copy, GET_MODE (orig)); | |
2adc7f12 JJ |
2405 | RTX_FLAG (copy, in_struct) = RTX_FLAG (orig, in_struct); |
2406 | RTX_FLAG (copy, volatil) = RTX_FLAG (orig, volatil); | |
2407 | RTX_FLAG (copy, unchanging) = RTX_FLAG (orig, unchanging); | |
2408 | RTX_FLAG (copy, integrated) = RTX_FLAG (orig, integrated); | |
2409 | RTX_FLAG (copy, frame_related) = RTX_FLAG (orig, frame_related); | |
127c1ba5 RK |
2410 | |
2411 | format_ptr = GET_RTX_FORMAT (GET_CODE (copy)); | |
2412 | ||
2413 | for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++) | |
2414 | { | |
2415 | switch (*format_ptr++) | |
2416 | { | |
2417 | case 'e': | |
2418 | XEXP (copy, i) = XEXP (orig, i); | |
2419 | if (XEXP (orig, i) != NULL && XEXP (orig, i) != may_share) | |
2420 | XEXP (copy, i) = copy_most_rtx (XEXP (orig, i), may_share); | |
2421 | break; | |
2422 | ||
2423 | case 'u': | |
2424 | XEXP (copy, i) = XEXP (orig, i); | |
2425 | break; | |
2426 | ||
2427 | case 'E': | |
2428 | case 'V': | |
2429 | XVEC (copy, i) = XVEC (orig, i); | |
2430 | if (XVEC (orig, i) != NULL) | |
2431 | { | |
2432 | XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i)); | |
2433 | for (j = 0; j < XVECLEN (copy, i); j++) | |
2434 | XVECEXP (copy, i, j) | |
2435 | = copy_most_rtx (XVECEXP (orig, i, j), may_share); | |
2436 | } | |
2437 | break; | |
2438 | ||
2439 | case 'w': | |
2440 | XWINT (copy, i) = XWINT (orig, i); | |
2441 | break; | |
2442 | ||
2443 | case 'n': | |
2444 | case 'i': | |
2445 | XINT (copy, i) = XINT (orig, i); | |
2446 | break; | |
2447 | ||
2448 | case 't': | |
2449 | XTREE (copy, i) = XTREE (orig, i); | |
2450 | break; | |
2451 | ||
2452 | case 's': | |
2453 | case 'S': | |
2454 | XSTR (copy, i) = XSTR (orig, i); | |
2455 | break; | |
2456 | ||
2457 | case '0': | |
2458 | /* Copy this through the wide int field; that's safest. */ | |
2459 | X0WINT (copy, i) = X0WINT (orig, i); | |
2460 | break; | |
2461 | ||
2462 | default: | |
2463 | abort (); | |
2464 | } | |
2465 | } | |
2466 | return copy; | |
2467 | } | |
2468 | ||
23b2ce53 RS |
2469 | /* Mark ORIG as in use, and return a copy of it if it was already in use. |
2470 | Recursively does the same for subexpressions. */ | |
2471 | ||
2472 | rtx | |
2473 | copy_rtx_if_shared (orig) | |
2474 | rtx orig; | |
2475 | { | |
b3694847 SS |
2476 | rtx x = orig; |
2477 | int i; | |
2478 | enum rtx_code code; | |
2479 | const char *format_ptr; | |
23b2ce53 RS |
2480 | int copied = 0; |
2481 | ||
2482 | if (x == 0) | |
2483 | return 0; | |
2484 | ||
2485 | code = GET_CODE (x); | |
2486 | ||
2487 | /* These types may be freely shared. */ | |
2488 | ||
2489 | switch (code) | |
2490 | { | |
2491 | case REG: | |
2492 | case QUEUED: | |
2493 | case CONST_INT: | |
2494 | case CONST_DOUBLE: | |
69ef87e2 | 2495 | case CONST_VECTOR: |
23b2ce53 RS |
2496 | case SYMBOL_REF: |
2497 | case CODE_LABEL: | |
2498 | case PC: | |
2499 | case CC0: | |
2500 | case SCRATCH: | |
0f41302f | 2501 | /* SCRATCH must be shared because they represent distinct values. */ |
23b2ce53 RS |
2502 | return x; |
2503 | ||
b851ea09 RK |
2504 | case CONST: |
2505 | /* CONST can be shared if it contains a SYMBOL_REF. If it contains | |
2506 | a LABEL_REF, it isn't sharable. */ | |
2507 | if (GET_CODE (XEXP (x, 0)) == PLUS | |
2508 | && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF | |
2509 | && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT) | |
2510 | return x; | |
2511 | break; | |
2512 | ||
23b2ce53 RS |
2513 | case INSN: |
2514 | case JUMP_INSN: | |
2515 | case CALL_INSN: | |
2516 | case NOTE: | |
23b2ce53 RS |
2517 | case BARRIER: |
2518 | /* The chain of insns is not being copied. */ | |
2519 | return x; | |
2520 | ||
2521 | case MEM: | |
83512665 JL |
2522 | /* A MEM is allowed to be shared if its address is constant. |
2523 | ||
750c9258 | 2524 | We used to allow sharing of MEMs which referenced |
83512665 JL |
2525 | virtual_stack_vars_rtx or virtual_incoming_args_rtx, but |
2526 | that can lose. instantiate_virtual_regs will not unshare | |
2527 | the MEMs, and combine may change the structure of the address | |
2528 | because it looks safe and profitable in one context, but | |
2529 | in some other context it creates unrecognizable RTL. */ | |
2530 | if (CONSTANT_ADDRESS_P (XEXP (x, 0))) | |
23b2ce53 RS |
2531 | return x; |
2532 | ||
e9a25f70 JL |
2533 | break; |
2534 | ||
2535 | default: | |
2536 | break; | |
23b2ce53 RS |
2537 | } |
2538 | ||
2539 | /* This rtx may not be shared. If it has already been seen, | |
2540 | replace it with a copy of itself. */ | |
2541 | ||
2adc7f12 | 2542 | if (RTX_FLAG (x, used)) |
23b2ce53 | 2543 | { |
b3694847 | 2544 | rtx copy; |
23b2ce53 RS |
2545 | |
2546 | copy = rtx_alloc (code); | |
4e135bdd | 2547 | memcpy (copy, x, |
4c9a05bc RK |
2548 | (sizeof (*copy) - sizeof (copy->fld) |
2549 | + sizeof (copy->fld[0]) * GET_RTX_LENGTH (code))); | |
23b2ce53 RS |
2550 | x = copy; |
2551 | copied = 1; | |
2552 | } | |
2adc7f12 | 2553 | RTX_FLAG (x, used) = 1; |
23b2ce53 RS |
2554 | |
2555 | /* Now scan the subexpressions recursively. | |
2556 | We can store any replaced subexpressions directly into X | |
2557 | since we know X is not shared! Any vectors in X | |
2558 | must be copied if X was copied. */ | |
2559 | ||
2560 | format_ptr = GET_RTX_FORMAT (code); | |
2561 | ||
2562 | for (i = 0; i < GET_RTX_LENGTH (code); i++) | |
2563 | { | |
2564 | switch (*format_ptr++) | |
2565 | { | |
2566 | case 'e': | |
2567 | XEXP (x, i) = copy_rtx_if_shared (XEXP (x, i)); | |
2568 | break; | |
2569 | ||
2570 | case 'E': | |
2571 | if (XVEC (x, i) != NULL) | |
2572 | { | |
b3694847 | 2573 | int j; |
f0722107 | 2574 | int len = XVECLEN (x, i); |
23b2ce53 | 2575 | |
f0722107 | 2576 | if (copied && len > 0) |
8f985ec4 | 2577 | XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem); |
f0722107 RS |
2578 | for (j = 0; j < len; j++) |
2579 | XVECEXP (x, i, j) = copy_rtx_if_shared (XVECEXP (x, i, j)); | |
23b2ce53 RS |
2580 | } |
2581 | break; | |
2582 | } | |
2583 | } | |
2584 | return x; | |
2585 | } | |
2586 | ||
2587 | /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used | |
2588 | to look for shared sub-parts. */ | |
2589 | ||
2590 | void | |
2591 | reset_used_flags (x) | |
2592 | rtx x; | |
2593 | { | |
b3694847 SS |
2594 | int i, j; |
2595 | enum rtx_code code; | |
2596 | const char *format_ptr; | |
23b2ce53 RS |
2597 | |
2598 | if (x == 0) | |
2599 | return; | |
2600 | ||
2601 | code = GET_CODE (x); | |
2602 | ||
9faa82d8 | 2603 | /* These types may be freely shared so we needn't do any resetting |
23b2ce53 RS |
2604 | for them. */ |
2605 | ||
2606 | switch (code) | |
2607 | { | |
2608 | case REG: | |
2609 | case QUEUED: | |
2610 | case CONST_INT: | |
2611 | case CONST_DOUBLE: | |
69ef87e2 | 2612 | case CONST_VECTOR: |
23b2ce53 RS |
2613 | case SYMBOL_REF: |
2614 | case CODE_LABEL: | |
2615 | case PC: | |
2616 | case CC0: | |
2617 | return; | |
2618 | ||
2619 | case INSN: | |
2620 | case JUMP_INSN: | |
2621 | case CALL_INSN: | |
2622 | case NOTE: | |
2623 | case LABEL_REF: | |
2624 | case BARRIER: | |
2625 | /* The chain of insns is not being copied. */ | |
2626 | return; | |
750c9258 | 2627 | |
e9a25f70 JL |
2628 | default: |
2629 | break; | |
23b2ce53 RS |
2630 | } |
2631 | ||
2adc7f12 | 2632 | RTX_FLAG (x, used) = 0; |
23b2ce53 RS |
2633 | |
2634 | format_ptr = GET_RTX_FORMAT (code); | |
2635 | for (i = 0; i < GET_RTX_LENGTH (code); i++) | |
2636 | { | |
2637 | switch (*format_ptr++) | |
2638 | { | |
2639 | case 'e': | |
2640 | reset_used_flags (XEXP (x, i)); | |
2641 | break; | |
2642 | ||
2643 | case 'E': | |
2644 | for (j = 0; j < XVECLEN (x, i); j++) | |
2645 | reset_used_flags (XVECEXP (x, i, j)); | |
2646 | break; | |
2647 | } | |
2648 | } | |
2649 | } | |
2650 | \f | |
2651 | /* Copy X if necessary so that it won't be altered by changes in OTHER. | |
2652 | Return X or the rtx for the pseudo reg the value of X was copied into. | |
2653 | OTHER must be valid as a SET_DEST. */ | |
2654 | ||
2655 | rtx | |
2656 | make_safe_from (x, other) | |
2657 | rtx x, other; | |
2658 | { | |
2659 | while (1) | |
2660 | switch (GET_CODE (other)) | |
2661 | { | |
2662 | case SUBREG: | |
2663 | other = SUBREG_REG (other); | |
2664 | break; | |
2665 | case STRICT_LOW_PART: | |
2666 | case SIGN_EXTEND: | |
2667 | case ZERO_EXTEND: | |
2668 | other = XEXP (other, 0); | |
2669 | break; | |
2670 | default: | |
2671 | goto done; | |
2672 | } | |
2673 | done: | |
2674 | if ((GET_CODE (other) == MEM | |
2675 | && ! CONSTANT_P (x) | |
2676 | && GET_CODE (x) != REG | |
2677 | && GET_CODE (x) != SUBREG) | |
2678 | || (GET_CODE (other) == REG | |
2679 | && (REGNO (other) < FIRST_PSEUDO_REGISTER | |
2680 | || reg_mentioned_p (other, x)))) | |
2681 | { | |
2682 | rtx temp = gen_reg_rtx (GET_MODE (x)); | |
2683 | emit_move_insn (temp, x); | |
2684 | return temp; | |
2685 | } | |
2686 | return x; | |
2687 | } | |
2688 | \f | |
2689 | /* Emission of insns (adding them to the doubly-linked list). */ | |
2690 | ||
2691 | /* Return the first insn of the current sequence or current function. */ | |
2692 | ||
2693 | rtx | |
2694 | get_insns () | |
2695 | { | |
2696 | return first_insn; | |
2697 | } | |
2698 | ||
3dec4024 JH |
2699 | /* Specify a new insn as the first in the chain. */ |
2700 | ||
2701 | void | |
2702 | set_first_insn (insn) | |
2703 | rtx insn; | |
2704 | { | |
2705 | if (PREV_INSN (insn) != 0) | |
2706 | abort (); | |
2707 | first_insn = insn; | |
2708 | } | |
2709 | ||
23b2ce53 RS |
2710 | /* Return the last insn emitted in current sequence or current function. */ |
2711 | ||
2712 | rtx | |
2713 | get_last_insn () | |
2714 | { | |
2715 | return last_insn; | |
2716 | } | |
2717 | ||
2718 | /* Specify a new insn as the last in the chain. */ | |
2719 | ||
2720 | void | |
2721 | set_last_insn (insn) | |
2722 | rtx insn; | |
2723 | { | |
2724 | if (NEXT_INSN (insn) != 0) | |
2725 | abort (); | |
2726 | last_insn = insn; | |
2727 | } | |
2728 | ||
2729 | /* Return the last insn emitted, even if it is in a sequence now pushed. */ | |
2730 | ||
2731 | rtx | |
2732 | get_last_insn_anywhere () | |
2733 | { | |
2734 | struct sequence_stack *stack; | |
2735 | if (last_insn) | |
2736 | return last_insn; | |
49ad7cfa | 2737 | for (stack = seq_stack; stack; stack = stack->next) |
23b2ce53 RS |
2738 | if (stack->last != 0) |
2739 | return stack->last; | |
2740 | return 0; | |
2741 | } | |
2742 | ||
2a496e8b JDA |
2743 | /* Return the first nonnote insn emitted in current sequence or current |
2744 | function. This routine looks inside SEQUENCEs. */ | |
2745 | ||
2746 | rtx | |
2747 | get_first_nonnote_insn () | |
2748 | { | |
2749 | rtx insn = first_insn; | |
2750 | ||
2751 | while (insn) | |
2752 | { | |
2753 | insn = next_insn (insn); | |
2754 | if (insn == 0 || GET_CODE (insn) != NOTE) | |
2755 | break; | |
2756 | } | |
2757 | ||
2758 | return insn; | |
2759 | } | |
2760 | ||
2761 | /* Return the last nonnote insn emitted in current sequence or current | |
2762 | function. This routine looks inside SEQUENCEs. */ | |
2763 | ||
2764 | rtx | |
2765 | get_last_nonnote_insn () | |
2766 | { | |
2767 | rtx insn = last_insn; | |
2768 | ||
2769 | while (insn) | |
2770 | { | |
2771 | insn = previous_insn (insn); | |
2772 | if (insn == 0 || GET_CODE (insn) != NOTE) | |
2773 | break; | |
2774 | } | |
2775 | ||
2776 | return insn; | |
2777 | } | |
2778 | ||
23b2ce53 RS |
2779 | /* Return a number larger than any instruction's uid in this function. */ |
2780 | ||
2781 | int | |
2782 | get_max_uid () | |
2783 | { | |
2784 | return cur_insn_uid; | |
2785 | } | |
aeeeda03 | 2786 | |
673b5311 MM |
2787 | /* Renumber instructions so that no instruction UIDs are wasted. */ |
2788 | ||
aeeeda03 | 2789 | void |
673b5311 MM |
2790 | renumber_insns (stream) |
2791 | FILE *stream; | |
aeeeda03 MM |
2792 | { |
2793 | rtx insn; | |
aeeeda03 | 2794 | |
673b5311 MM |
2795 | /* If we're not supposed to renumber instructions, don't. */ |
2796 | if (!flag_renumber_insns) | |
2797 | return; | |
2798 | ||
aeeeda03 MM |
2799 | /* If there aren't that many instructions, then it's not really |
2800 | worth renumbering them. */ | |
673b5311 | 2801 | if (flag_renumber_insns == 1 && get_max_uid () < 25000) |
aeeeda03 MM |
2802 | return; |
2803 | ||
2804 | cur_insn_uid = 1; | |
2805 | ||
2806 | for (insn = get_insns (); insn; insn = NEXT_INSN (insn)) | |
673b5311 MM |
2807 | { |
2808 | if (stream) | |
750c9258 | 2809 | fprintf (stream, "Renumbering insn %d to %d\n", |
673b5311 MM |
2810 | INSN_UID (insn), cur_insn_uid); |
2811 | INSN_UID (insn) = cur_insn_uid++; | |
2812 | } | |
aeeeda03 | 2813 | } |
23b2ce53 RS |
2814 | \f |
2815 | /* Return the next insn. If it is a SEQUENCE, return the first insn | |
2816 | of the sequence. */ | |
2817 | ||
2818 | rtx | |
2819 | next_insn (insn) | |
2820 | rtx insn; | |
2821 | { | |
2822 | if (insn) | |
2823 | { | |
2824 | insn = NEXT_INSN (insn); | |
2825 | if (insn && GET_CODE (insn) == INSN | |
2826 | && GET_CODE (PATTERN (insn)) == SEQUENCE) | |
2827 | insn = XVECEXP (PATTERN (insn), 0, 0); | |
2828 | } | |
2829 | ||
2830 | return insn; | |
2831 | } | |
2832 | ||
2833 | /* Return the previous insn. If it is a SEQUENCE, return the last insn | |
2834 | of the sequence. */ | |
2835 | ||
2836 | rtx | |
2837 | previous_insn (insn) | |
2838 | rtx insn; | |
2839 | { | |
2840 | if (insn) | |
2841 | { | |
2842 | insn = PREV_INSN (insn); | |
2843 | if (insn && GET_CODE (insn) == INSN | |
2844 | && GET_CODE (PATTERN (insn)) == SEQUENCE) | |
2845 | insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1); | |
2846 | } | |
2847 | ||
2848 | return insn; | |
2849 | } | |
2850 | ||
2851 | /* Return the next insn after INSN that is not a NOTE. This routine does not | |
2852 | look inside SEQUENCEs. */ | |
2853 | ||
2854 | rtx | |
2855 | next_nonnote_insn (insn) | |
2856 | rtx insn; | |
2857 | { | |
2858 | while (insn) | |
2859 | { | |
2860 | insn = NEXT_INSN (insn); | |
2861 | if (insn == 0 || GET_CODE (insn) != NOTE) | |
2862 | break; | |
2863 | } | |
2864 | ||
2865 | return insn; | |
2866 | } | |
2867 | ||
2868 | /* Return the previous insn before INSN that is not a NOTE. This routine does | |
2869 | not look inside SEQUENCEs. */ | |
2870 | ||
2871 | rtx | |
2872 | prev_nonnote_insn (insn) | |
2873 | rtx insn; | |
2874 | { | |
2875 | while (insn) | |
2876 | { | |
2877 | insn = PREV_INSN (insn); | |
2878 | if (insn == 0 || GET_CODE (insn) != NOTE) | |
2879 | break; | |
2880 | } | |
2881 | ||
2882 | return insn; | |
2883 | } | |
2884 | ||
2885 | /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN; | |
2886 | or 0, if there is none. This routine does not look inside | |
0f41302f | 2887 | SEQUENCEs. */ |
23b2ce53 RS |
2888 | |
2889 | rtx | |
2890 | next_real_insn (insn) | |
2891 | rtx insn; | |
2892 | { | |
2893 | while (insn) | |
2894 | { | |
2895 | insn = NEXT_INSN (insn); | |
2896 | if (insn == 0 || GET_CODE (insn) == INSN | |
2897 | || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN) | |
2898 | break; | |
2899 | } | |
2900 | ||
2901 | return insn; | |
2902 | } | |
2903 | ||
2904 | /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN; | |
2905 | or 0, if there is none. This routine does not look inside | |
2906 | SEQUENCEs. */ | |
2907 | ||
2908 | rtx | |
2909 | prev_real_insn (insn) | |
2910 | rtx insn; | |
2911 | { | |
2912 | while (insn) | |
2913 | { | |
2914 | insn = PREV_INSN (insn); | |
2915 | if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN | |
2916 | || GET_CODE (insn) == JUMP_INSN) | |
2917 | break; | |
2918 | } | |
2919 | ||
2920 | return insn; | |
2921 | } | |
2922 | ||
2923 | /* Find the next insn after INSN that really does something. This routine | |
2924 | does not look inside SEQUENCEs. Until reload has completed, this is the | |
2925 | same as next_real_insn. */ | |
2926 | ||
69732dcb RH |
2927 | int |
2928 | active_insn_p (insn) | |
2929 | rtx insn; | |
2930 | { | |
2931 | return (GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN | |
2932 | || (GET_CODE (insn) == INSN | |
2933 | && (! reload_completed | |
2934 | || (GET_CODE (PATTERN (insn)) != USE | |
2935 | && GET_CODE (PATTERN (insn)) != CLOBBER)))); | |
2936 | } | |
2937 | ||
23b2ce53 RS |
2938 | rtx |
2939 | next_active_insn (insn) | |
2940 | rtx insn; | |
2941 | { | |
2942 | while (insn) | |
2943 | { | |
2944 | insn = NEXT_INSN (insn); | |
69732dcb | 2945 | if (insn == 0 || active_insn_p (insn)) |
23b2ce53 RS |
2946 | break; |
2947 | } | |
2948 | ||
2949 | return insn; | |
2950 | } | |
2951 | ||
2952 | /* Find the last insn before INSN that really does something. This routine | |
2953 | does not look inside SEQUENCEs. Until reload has completed, this is the | |
2954 | same as prev_real_insn. */ | |
2955 | ||
2956 | rtx | |
2957 | prev_active_insn (insn) | |
2958 | rtx insn; | |
2959 | { | |
2960 | while (insn) | |
2961 | { | |
2962 | insn = PREV_INSN (insn); | |
69732dcb | 2963 | if (insn == 0 || active_insn_p (insn)) |
23b2ce53 RS |
2964 | break; |
2965 | } | |
2966 | ||
2967 | return insn; | |
2968 | } | |
2969 | ||
2970 | /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */ | |
2971 | ||
2972 | rtx | |
2973 | next_label (insn) | |
2974 | rtx insn; | |
2975 | { | |
2976 | while (insn) | |
2977 | { | |
2978 | insn = NEXT_INSN (insn); | |
2979 | if (insn == 0 || GET_CODE (insn) == CODE_LABEL) | |
2980 | break; | |
2981 | } | |
2982 | ||
2983 | return insn; | |
2984 | } | |
2985 | ||
2986 | /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */ | |
2987 | ||
2988 | rtx | |
2989 | prev_label (insn) | |
2990 | rtx insn; | |
2991 | { | |
2992 | while (insn) | |
2993 | { | |
2994 | insn = PREV_INSN (insn); | |
2995 | if (insn == 0 || GET_CODE (insn) == CODE_LABEL) | |
2996 | break; | |
2997 | } | |
2998 | ||
2999 | return insn; | |
3000 | } | |
3001 | \f | |
3002 | #ifdef HAVE_cc0 | |
c572e5ba JVA |
3003 | /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER |
3004 | and REG_CC_USER notes so we can find it. */ | |
3005 | ||
3006 | void | |
3007 | link_cc0_insns (insn) | |
3008 | rtx insn; | |
3009 | { | |
3010 | rtx user = next_nonnote_insn (insn); | |
3011 | ||
3012 | if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE) | |
3013 | user = XVECEXP (PATTERN (user), 0, 0); | |
3014 | ||
c5c76735 JL |
3015 | REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn, |
3016 | REG_NOTES (user)); | |
3b80f6ca | 3017 | REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_CC_USER, user, REG_NOTES (insn)); |
c572e5ba JVA |
3018 | } |
3019 | ||
23b2ce53 RS |
3020 | /* Return the next insn that uses CC0 after INSN, which is assumed to |
3021 | set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter | |
3022 | applied to the result of this function should yield INSN). | |
3023 | ||
3024 | Normally, this is simply the next insn. However, if a REG_CC_USER note | |
3025 | is present, it contains the insn that uses CC0. | |
3026 | ||
3027 | Return 0 if we can't find the insn. */ | |
3028 | ||
3029 | rtx | |
3030 | next_cc0_user (insn) | |
3031 | rtx insn; | |
3032 | { | |
906c4e36 | 3033 | rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX); |
23b2ce53 RS |
3034 | |
3035 | if (note) | |
3036 | return XEXP (note, 0); | |
3037 | ||
3038 | insn = next_nonnote_insn (insn); | |
3039 | if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE) | |
3040 | insn = XVECEXP (PATTERN (insn), 0, 0); | |
3041 | ||
2c3c49de | 3042 | if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn))) |
23b2ce53 RS |
3043 | return insn; |
3044 | ||
3045 | return 0; | |
3046 | } | |
3047 | ||
3048 | /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER | |
3049 | note, it is the previous insn. */ | |
3050 | ||
3051 | rtx | |
3052 | prev_cc0_setter (insn) | |
3053 | rtx insn; | |
3054 | { | |
906c4e36 | 3055 | rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX); |
23b2ce53 RS |
3056 | |
3057 | if (note) | |
3058 | return XEXP (note, 0); | |
3059 | ||
3060 | insn = prev_nonnote_insn (insn); | |
3061 | if (! sets_cc0_p (PATTERN (insn))) | |
3062 | abort (); | |
3063 | ||
3064 | return insn; | |
3065 | } | |
3066 | #endif | |
e5bef2e4 HB |
3067 | |
3068 | /* Increment the label uses for all labels present in rtx. */ | |
3069 | ||
3070 | static void | |
68252e27 KH |
3071 | mark_label_nuses (x) |
3072 | rtx x; | |
e5bef2e4 | 3073 | { |
b3694847 SS |
3074 | enum rtx_code code; |
3075 | int i, j; | |
3076 | const char *fmt; | |
e5bef2e4 HB |
3077 | |
3078 | code = GET_CODE (x); | |
3079 | if (code == LABEL_REF) | |
3080 | LABEL_NUSES (XEXP (x, 0))++; | |
3081 | ||
3082 | fmt = GET_RTX_FORMAT (code); | |
3083 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
3084 | { | |
3085 | if (fmt[i] == 'e') | |
0fb7aeda | 3086 | mark_label_nuses (XEXP (x, i)); |
e5bef2e4 | 3087 | else if (fmt[i] == 'E') |
0fb7aeda | 3088 | for (j = XVECLEN (x, i) - 1; j >= 0; j--) |
e5bef2e4 HB |
3089 | mark_label_nuses (XVECEXP (x, i, j)); |
3090 | } | |
3091 | } | |
3092 | ||
23b2ce53 RS |
3093 | \f |
3094 | /* Try splitting insns that can be split for better scheduling. | |
3095 | PAT is the pattern which might split. | |
3096 | TRIAL is the insn providing PAT. | |
11147ebe | 3097 | LAST is non-zero if we should return the last insn of the sequence produced. |
23b2ce53 RS |
3098 | |
3099 | If this routine succeeds in splitting, it returns the first or last | |
11147ebe | 3100 | replacement insn depending on the value of LAST. Otherwise, it |
23b2ce53 RS |
3101 | returns TRIAL. If the insn to be returned can be split, it will be. */ |
3102 | ||
3103 | rtx | |
11147ebe | 3104 | try_split (pat, trial, last) |
23b2ce53 | 3105 | rtx pat, trial; |
11147ebe | 3106 | int last; |
23b2ce53 RS |
3107 | { |
3108 | rtx before = PREV_INSN (trial); | |
3109 | rtx after = NEXT_INSN (trial); | |
23b2ce53 RS |
3110 | int has_barrier = 0; |
3111 | rtx tem; | |
6b24c259 JH |
3112 | rtx note, seq; |
3113 | int probability; | |
3114 | ||
3115 | if (any_condjump_p (trial) | |
3116 | && (note = find_reg_note (trial, REG_BR_PROB, 0))) | |
3117 | split_branch_probability = INTVAL (XEXP (note, 0)); | |
3118 | probability = split_branch_probability; | |
3119 | ||
3120 | seq = split_insns (pat, trial); | |
3121 | ||
3122 | split_branch_probability = -1; | |
23b2ce53 RS |
3123 | |
3124 | /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER. | |
3125 | We may need to handle this specially. */ | |
3126 | if (after && GET_CODE (after) == BARRIER) | |
3127 | { | |
3128 | has_barrier = 1; | |
3129 | after = NEXT_INSN (after); | |
3130 | } | |
3131 | ||
3132 | if (seq) | |
3133 | { | |
2f937369 DM |
3134 | /* Sometimes there will be only one insn in that list, this case will |
3135 | normally arise only when we want it in turn to be split (SFmode on | |
3136 | the 29k is an example). */ | |
3137 | if (NEXT_INSN (seq) != NULL_RTX) | |
23b2ce53 | 3138 | { |
2f937369 DM |
3139 | rtx insn_last, insn; |
3140 | int njumps = 0; | |
750c9258 AJ |
3141 | |
3142 | /* Avoid infinite loop if any insn of the result matches | |
4b5e8abe | 3143 | the original pattern. */ |
2f937369 DM |
3144 | insn_last = seq; |
3145 | while (1) | |
3146 | { | |
6f9703af DM |
3147 | if (INSN_P (insn_last) |
3148 | && rtx_equal_p (PATTERN (insn_last), pat)) | |
2f937369 DM |
3149 | return trial; |
3150 | if (NEXT_INSN (insn_last) == NULL_RTX) | |
3151 | break; | |
3152 | insn_last = NEXT_INSN (insn_last); | |
3153 | } | |
4b5e8abe | 3154 | |
90a74703 | 3155 | /* Mark labels. */ |
2f937369 DM |
3156 | insn = insn_last; |
3157 | while (insn != NULL_RTX) | |
3158 | { | |
3159 | if (GET_CODE (insn) == JUMP_INSN) | |
3160 | { | |
3161 | mark_jump_label (PATTERN (insn), insn, 0); | |
3162 | njumps++; | |
3163 | if (probability != -1 | |
3164 | && any_condjump_p (insn) | |
3165 | && !find_reg_note (insn, REG_BR_PROB, 0)) | |
3166 | { | |
3167 | /* We can preserve the REG_BR_PROB notes only if exactly | |
3168 | one jump is created, otherwise the machine description | |
3169 | is responsible for this step using | |
3170 | split_branch_probability variable. */ | |
3171 | if (njumps != 1) | |
3172 | abort (); | |
3173 | REG_NOTES (insn) | |
3174 | = gen_rtx_EXPR_LIST (REG_BR_PROB, | |
3175 | GEN_INT (probability), | |
3176 | REG_NOTES (insn)); | |
3177 | } | |
3178 | } | |
3179 | ||
3180 | insn = PREV_INSN (insn); | |
3181 | } | |
216183ce | 3182 | |
2d01e445 AO |
3183 | /* If we are splitting a CALL_INSN, look for the CALL_INSN |
3184 | in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */ | |
3185 | if (GET_CODE (trial) == CALL_INSN) | |
2f937369 DM |
3186 | { |
3187 | insn = insn_last; | |
3188 | while (insn != NULL_RTX) | |
3189 | { | |
3190 | if (GET_CODE (insn) == CALL_INSN) | |
3191 | CALL_INSN_FUNCTION_USAGE (insn) | |
3192 | = CALL_INSN_FUNCTION_USAGE (trial); | |
3193 | ||
3194 | insn = PREV_INSN (insn); | |
3195 | } | |
3196 | } | |
2d01e445 | 3197 | |
216183ce | 3198 | /* Copy notes, particularly those related to the CFG. */ |
68252e27 | 3199 | for (note = REG_NOTES (trial); note; note = XEXP (note, 1)) |
216183ce RH |
3200 | { |
3201 | switch (REG_NOTE_KIND (note)) | |
3202 | { | |
3203 | case REG_EH_REGION: | |
2f937369 DM |
3204 | insn = insn_last; |
3205 | while (insn != NULL_RTX) | |
216183ce | 3206 | { |
216183ce RH |
3207 | if (GET_CODE (insn) == CALL_INSN |
3208 | || (flag_non_call_exceptions | |
3209 | && may_trap_p (PATTERN (insn)))) | |
3210 | REG_NOTES (insn) | |
3211 | = gen_rtx_EXPR_LIST (REG_EH_REGION, | |
3212 | XEXP (note, 0), | |
3213 | REG_NOTES (insn)); | |
2f937369 | 3214 | insn = PREV_INSN (insn); |
216183ce RH |
3215 | } |
3216 | break; | |
3217 | ||
3218 | case REG_NORETURN: | |
3219 | case REG_SETJMP: | |
3220 | case REG_ALWAYS_RETURN: | |
2f937369 DM |
3221 | insn = insn_last; |
3222 | while (insn != NULL_RTX) | |
216183ce | 3223 | { |
216183ce RH |
3224 | if (GET_CODE (insn) == CALL_INSN) |
3225 | REG_NOTES (insn) | |
3226 | = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note), | |
3227 | XEXP (note, 0), | |
3228 | REG_NOTES (insn)); | |
2f937369 | 3229 | insn = PREV_INSN (insn); |
216183ce RH |
3230 | } |
3231 | break; | |
3232 | ||
3233 | case REG_NON_LOCAL_GOTO: | |
2f937369 DM |
3234 | insn = insn_last; |
3235 | while (insn != NULL_RTX) | |
216183ce | 3236 | { |
216183ce RH |
3237 | if (GET_CODE (insn) == JUMP_INSN) |
3238 | REG_NOTES (insn) | |
3239 | = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note), | |
3240 | XEXP (note, 0), | |
3241 | REG_NOTES (insn)); | |
2f937369 | 3242 | insn = PREV_INSN (insn); |
216183ce RH |
3243 | } |
3244 | break; | |
3245 | ||
3246 | default: | |
3247 | break; | |
3248 | } | |
3249 | } | |
d6e95df8 | 3250 | |
e5bef2e4 HB |
3251 | /* If there are LABELS inside the split insns increment the |
3252 | usage count so we don't delete the label. */ | |
3253 | if (GET_CODE (trial) == INSN) | |
2f937369 | 3254 | { |
c6a3fcf0 | 3255 | insn = insn_last; |
2f937369 DM |
3256 | while (insn != NULL_RTX) |
3257 | { | |
3258 | if (GET_CODE (insn) == INSN) | |
3259 | mark_label_nuses (PATTERN (insn)); | |
3260 | ||
3261 | insn = PREV_INSN (insn); | |
3262 | } | |
3263 | } | |
e5bef2e4 | 3264 | |
0d682900 | 3265 | tem = emit_insn_after_scope (seq, trial, INSN_SCOPE (trial)); |
23b2ce53 | 3266 | |
83a49407 | 3267 | delete_insn (trial); |
23b2ce53 RS |
3268 | if (has_barrier) |
3269 | emit_barrier_after (tem); | |
11147ebe RK |
3270 | |
3271 | /* Recursively call try_split for each new insn created; by the | |
3272 | time control returns here that insn will be fully split, so | |
3273 | set LAST and continue from the insn after the one returned. | |
f4a3cd05 | 3274 | We can't use next_active_insn here since AFTER may be a note. |
23886015 | 3275 | Ignore deleted insns, which can be occur if not optimizing. */ |
2c3c49de RB |
3276 | for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem)) |
3277 | if (! INSN_DELETED_P (tem) && INSN_P (tem)) | |
f4a3cd05 | 3278 | tem = try_split (PATTERN (tem), tem, 1); |
23b2ce53 RS |
3279 | } |
3280 | /* Avoid infinite loop if the result matches the original pattern. */ | |
2f937369 | 3281 | else if (rtx_equal_p (PATTERN (seq), pat)) |
23b2ce53 RS |
3282 | return trial; |
3283 | else | |
3284 | { | |
2f937369 | 3285 | PATTERN (trial) = PATTERN (seq); |
23b2ce53 | 3286 | INSN_CODE (trial) = -1; |
2f937369 | 3287 | try_split (PATTERN (trial), trial, last); |
23b2ce53 RS |
3288 | } |
3289 | ||
11147ebe RK |
3290 | /* Return either the first or the last insn, depending on which was |
3291 | requested. */ | |
750c9258 | 3292 | return last |
6b24c259 JH |
3293 | ? (after ? PREV_INSN (after) : last_insn) |
3294 | : NEXT_INSN (before); | |
23b2ce53 RS |
3295 | } |
3296 | ||
3297 | return trial; | |
3298 | } | |
3299 | \f | |
3300 | /* Make and return an INSN rtx, initializing all its slots. | |
4b1f5e8c | 3301 | Store PATTERN in the pattern slots. */ |
23b2ce53 RS |
3302 | |
3303 | rtx | |
4b1f5e8c | 3304 | make_insn_raw (pattern) |
23b2ce53 | 3305 | rtx pattern; |
23b2ce53 | 3306 | { |
b3694847 | 3307 | rtx insn; |
23b2ce53 | 3308 | |
1f8f4a0b | 3309 | insn = rtx_alloc (INSN); |
23b2ce53 | 3310 | |
43127294 | 3311 | INSN_UID (insn) = cur_insn_uid++; |
23b2ce53 RS |
3312 | PATTERN (insn) = pattern; |
3313 | INSN_CODE (insn) = -1; | |
1632afca RS |
3314 | LOG_LINKS (insn) = NULL; |
3315 | REG_NOTES (insn) = NULL; | |
ba4f7968 JH |
3316 | INSN_SCOPE (insn) = NULL; |
3317 | BLOCK_FOR_INSN (insn) = NULL; | |
23b2ce53 | 3318 | |
47984720 NC |
3319 | #ifdef ENABLE_RTL_CHECKING |
3320 | if (insn | |
2c3c49de | 3321 | && INSN_P (insn) |
47984720 NC |
3322 | && (returnjump_p (insn) |
3323 | || (GET_CODE (insn) == SET | |
3324 | && SET_DEST (insn) == pc_rtx))) | |
3325 | { | |
3326 | warning ("ICE: emit_insn used where emit_jump_insn needed:\n"); | |
3327 | debug_rtx (insn); | |
3328 | } | |
3329 | #endif | |
750c9258 | 3330 | |
23b2ce53 RS |
3331 | return insn; |
3332 | } | |
3333 | ||
2f937369 | 3334 | /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */ |
23b2ce53 RS |
3335 | |
3336 | static rtx | |
4b1f5e8c | 3337 | make_jump_insn_raw (pattern) |
23b2ce53 | 3338 | rtx pattern; |
23b2ce53 | 3339 | { |
b3694847 | 3340 | rtx insn; |
23b2ce53 | 3341 | |
4b1f5e8c | 3342 | insn = rtx_alloc (JUMP_INSN); |
1632afca | 3343 | INSN_UID (insn) = cur_insn_uid++; |
23b2ce53 RS |
3344 | |
3345 | PATTERN (insn) = pattern; | |
3346 | INSN_CODE (insn) = -1; | |
1632afca RS |
3347 | LOG_LINKS (insn) = NULL; |
3348 | REG_NOTES (insn) = NULL; | |
3349 | JUMP_LABEL (insn) = NULL; | |
ba4f7968 JH |
3350 | INSN_SCOPE (insn) = NULL; |
3351 | BLOCK_FOR_INSN (insn) = NULL; | |
23b2ce53 RS |
3352 | |
3353 | return insn; | |
3354 | } | |
aff507f4 | 3355 | |
2f937369 | 3356 | /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */ |
aff507f4 RK |
3357 | |
3358 | static rtx | |
3359 | make_call_insn_raw (pattern) | |
3360 | rtx pattern; | |
3361 | { | |
b3694847 | 3362 | rtx insn; |
aff507f4 RK |
3363 | |
3364 | insn = rtx_alloc (CALL_INSN); | |
3365 | INSN_UID (insn) = cur_insn_uid++; | |
3366 | ||
3367 | PATTERN (insn) = pattern; | |
3368 | INSN_CODE (insn) = -1; | |
3369 | LOG_LINKS (insn) = NULL; | |
3370 | REG_NOTES (insn) = NULL; | |
3371 | CALL_INSN_FUNCTION_USAGE (insn) = NULL; | |
ba4f7968 JH |
3372 | INSN_SCOPE (insn) = NULL; |
3373 | BLOCK_FOR_INSN (insn) = NULL; | |
aff507f4 RK |
3374 | |
3375 | return insn; | |
3376 | } | |
23b2ce53 RS |
3377 | \f |
3378 | /* Add INSN to the end of the doubly-linked list. | |
3379 | INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */ | |
3380 | ||
3381 | void | |
3382 | add_insn (insn) | |
b3694847 | 3383 | rtx insn; |
23b2ce53 RS |
3384 | { |
3385 | PREV_INSN (insn) = last_insn; | |
3386 | NEXT_INSN (insn) = 0; | |
3387 | ||
3388 | if (NULL != last_insn) | |
3389 | NEXT_INSN (last_insn) = insn; | |
3390 | ||
3391 | if (NULL == first_insn) | |
3392 | first_insn = insn; | |
3393 | ||
3394 | last_insn = insn; | |
3395 | } | |
3396 | ||
a0ae8e8d RK |
3397 | /* Add INSN into the doubly-linked list after insn AFTER. This and |
3398 | the next should be the only functions called to insert an insn once | |
ba213285 | 3399 | delay slots have been filled since only they know how to update a |
a0ae8e8d | 3400 | SEQUENCE. */ |
23b2ce53 RS |
3401 | |
3402 | void | |
3403 | add_insn_after (insn, after) | |
3404 | rtx insn, after; | |
3405 | { | |
3406 | rtx next = NEXT_INSN (after); | |
3c030e88 | 3407 | basic_block bb; |
23b2ce53 | 3408 | |
6782074d | 3409 | if (optimize && INSN_DELETED_P (after)) |
ba213285 RK |
3410 | abort (); |
3411 | ||
23b2ce53 RS |
3412 | NEXT_INSN (insn) = next; |
3413 | PREV_INSN (insn) = after; | |
3414 | ||
3415 | if (next) | |
3416 | { | |
3417 | PREV_INSN (next) = insn; | |
3418 | if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE) | |
3419 | PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn; | |
3420 | } | |
3421 | else if (last_insn == after) | |
3422 | last_insn = insn; | |
3423 | else | |
3424 | { | |
49ad7cfa | 3425 | struct sequence_stack *stack = seq_stack; |
23b2ce53 RS |
3426 | /* Scan all pending sequences too. */ |
3427 | for (; stack; stack = stack->next) | |
3428 | if (after == stack->last) | |
fef0509b RK |
3429 | { |
3430 | stack->last = insn; | |
3431 | break; | |
3432 | } | |
a0ae8e8d RK |
3433 | |
3434 | if (stack == 0) | |
3435 | abort (); | |
23b2ce53 RS |
3436 | } |
3437 | ||
ba4f7968 JH |
3438 | if (GET_CODE (after) != BARRIER |
3439 | && GET_CODE (insn) != BARRIER | |
3c030e88 JH |
3440 | && (bb = BLOCK_FOR_INSN (after))) |
3441 | { | |
3442 | set_block_for_insn (insn, bb); | |
38c1593d | 3443 | if (INSN_P (insn)) |
68252e27 | 3444 | bb->flags |= BB_DIRTY; |
3c030e88 | 3445 | /* Should not happen as first in the BB is always |
a1f300c0 | 3446 | either NOTE or LABEL. */ |
3c030e88 JH |
3447 | if (bb->end == after |
3448 | /* Avoid clobbering of structure when creating new BB. */ | |
3449 | && GET_CODE (insn) != BARRIER | |
3450 | && (GET_CODE (insn) != NOTE | |
3451 | || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK)) | |
3452 | bb->end = insn; | |
3453 | } | |
3454 | ||
23b2ce53 RS |
3455 | NEXT_INSN (after) = insn; |
3456 | if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE) | |
3457 | { | |
3458 | rtx sequence = PATTERN (after); | |
3459 | NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn; | |
3460 | } | |
3461 | } | |
3462 | ||
a0ae8e8d RK |
3463 | /* Add INSN into the doubly-linked list before insn BEFORE. This and |
3464 | the previous should be the only functions called to insert an insn once | |
ba213285 | 3465 | delay slots have been filled since only they know how to update a |
a0ae8e8d RK |
3466 | SEQUENCE. */ |
3467 | ||
3468 | void | |
3469 | add_insn_before (insn, before) | |
3470 | rtx insn, before; | |
3471 | { | |
3472 | rtx prev = PREV_INSN (before); | |
3c030e88 | 3473 | basic_block bb; |
a0ae8e8d | 3474 | |
6782074d | 3475 | if (optimize && INSN_DELETED_P (before)) |
ba213285 RK |
3476 | abort (); |
3477 | ||
a0ae8e8d RK |
3478 | PREV_INSN (insn) = prev; |
3479 | NEXT_INSN (insn) = before; | |
3480 | ||
3481 | if (prev) | |
3482 | { | |
3483 | NEXT_INSN (prev) = insn; | |
3484 | if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE) | |
3485 | { | |
3486 | rtx sequence = PATTERN (prev); | |
3487 | NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn; | |
3488 | } | |
3489 | } | |
3490 | else if (first_insn == before) | |
3491 | first_insn = insn; | |
3492 | else | |
3493 | { | |
49ad7cfa | 3494 | struct sequence_stack *stack = seq_stack; |
a0ae8e8d RK |
3495 | /* Scan all pending sequences too. */ |
3496 | for (; stack; stack = stack->next) | |
3497 | if (before == stack->first) | |
fef0509b RK |
3498 | { |
3499 | stack->first = insn; | |
3500 | break; | |
3501 | } | |
a0ae8e8d RK |
3502 | |
3503 | if (stack == 0) | |
3504 | abort (); | |
3505 | } | |
3506 | ||
ba4f7968 JH |
3507 | if (GET_CODE (before) != BARRIER |
3508 | && GET_CODE (insn) != BARRIER | |
3c030e88 JH |
3509 | && (bb = BLOCK_FOR_INSN (before))) |
3510 | { | |
3511 | set_block_for_insn (insn, bb); | |
38c1593d | 3512 | if (INSN_P (insn)) |
68252e27 | 3513 | bb->flags |= BB_DIRTY; |
3c030e88 | 3514 | /* Should not happen as first in the BB is always |
a1f300c0 | 3515 | either NOTE or LABEl. */ |
3c030e88 JH |
3516 | if (bb->head == insn |
3517 | /* Avoid clobbering of structure when creating new BB. */ | |
3518 | && GET_CODE (insn) != BARRIER | |
3519 | && (GET_CODE (insn) != NOTE | |
3520 | || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK)) | |
3521 | abort (); | |
3522 | } | |
3523 | ||
a0ae8e8d RK |
3524 | PREV_INSN (before) = insn; |
3525 | if (GET_CODE (before) == INSN && GET_CODE (PATTERN (before)) == SEQUENCE) | |
3526 | PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn; | |
3527 | } | |
3528 | ||
89e99eea DB |
3529 | /* Remove an insn from its doubly-linked list. This function knows how |
3530 | to handle sequences. */ | |
3531 | void | |
3532 | remove_insn (insn) | |
3533 | rtx insn; | |
3534 | { | |
3535 | rtx next = NEXT_INSN (insn); | |
3536 | rtx prev = PREV_INSN (insn); | |
53c17031 JH |
3537 | basic_block bb; |
3538 | ||
89e99eea DB |
3539 | if (prev) |
3540 | { | |
3541 | NEXT_INSN (prev) = next; | |
3542 | if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE) | |
3543 | { | |
3544 | rtx sequence = PATTERN (prev); | |
3545 | NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next; | |
3546 | } | |
3547 | } | |
3548 | else if (first_insn == insn) | |
3549 | first_insn = next; | |
3550 | else | |
3551 | { | |
49ad7cfa | 3552 | struct sequence_stack *stack = seq_stack; |
89e99eea DB |
3553 | /* Scan all pending sequences too. */ |
3554 | for (; stack; stack = stack->next) | |
3555 | if (insn == stack->first) | |
3556 | { | |
3557 | stack->first = next; | |
3558 | break; | |
3559 | } | |
3560 | ||
3561 | if (stack == 0) | |
3562 | abort (); | |
3563 | } | |
3564 | ||
3565 | if (next) | |
3566 | { | |
3567 | PREV_INSN (next) = prev; | |
3568 | if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE) | |
3569 | PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev; | |
3570 | } | |
3571 | else if (last_insn == insn) | |
3572 | last_insn = prev; | |
3573 | else | |
3574 | { | |
49ad7cfa | 3575 | struct sequence_stack *stack = seq_stack; |
89e99eea DB |
3576 | /* Scan all pending sequences too. */ |
3577 | for (; stack; stack = stack->next) | |
3578 | if (insn == stack->last) | |
3579 | { | |
3580 | stack->last = prev; | |
3581 | break; | |
3582 | } | |
3583 | ||
3584 | if (stack == 0) | |
3585 | abort (); | |
3586 | } | |
ba4f7968 | 3587 | if (GET_CODE (insn) != BARRIER |
53c17031 JH |
3588 | && (bb = BLOCK_FOR_INSN (insn))) |
3589 | { | |
38c1593d | 3590 | if (INSN_P (insn)) |
68252e27 | 3591 | bb->flags |= BB_DIRTY; |
53c17031 JH |
3592 | if (bb->head == insn) |
3593 | { | |
3bf1e984 RK |
3594 | /* Never ever delete the basic block note without deleting whole |
3595 | basic block. */ | |
53c17031 JH |
3596 | if (GET_CODE (insn) == NOTE) |
3597 | abort (); | |
3598 | bb->head = next; | |
3599 | } | |
3600 | if (bb->end == insn) | |
3601 | bb->end = prev; | |
3602 | } | |
89e99eea DB |
3603 | } |
3604 | ||
23b2ce53 RS |
3605 | /* Delete all insns made since FROM. |
3606 | FROM becomes the new last instruction. */ | |
3607 | ||
3608 | void | |
3609 | delete_insns_since (from) | |
3610 | rtx from; | |
3611 | { | |
3612 | if (from == 0) | |
3613 | first_insn = 0; | |
3614 | else | |
3615 | NEXT_INSN (from) = 0; | |
3616 | last_insn = from; | |
3617 | } | |
3618 | ||
5dab5552 MS |
3619 | /* This function is deprecated, please use sequences instead. |
3620 | ||
3621 | Move a consecutive bunch of insns to a different place in the chain. | |
23b2ce53 RS |
3622 | The insns to be moved are those between FROM and TO. |
3623 | They are moved to a new position after the insn AFTER. | |
3624 | AFTER must not be FROM or TO or any insn in between. | |
3625 | ||
3626 | This function does not know about SEQUENCEs and hence should not be | |
3627 | called after delay-slot filling has been done. */ | |
3628 | ||
3629 | void | |
3c030e88 | 3630 | reorder_insns_nobb (from, to, after) |
23b2ce53 RS |
3631 | rtx from, to, after; |
3632 | { | |
3633 | /* Splice this bunch out of where it is now. */ | |
3634 | if (PREV_INSN (from)) | |
3635 | NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to); | |
3636 | if (NEXT_INSN (to)) | |
3637 | PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from); | |
3638 | if (last_insn == to) | |
3639 | last_insn = PREV_INSN (from); | |
3640 | if (first_insn == from) | |
3641 | first_insn = NEXT_INSN (to); | |
3642 | ||
3643 | /* Make the new neighbors point to it and it to them. */ | |
3644 | if (NEXT_INSN (after)) | |
3645 | PREV_INSN (NEXT_INSN (after)) = to; | |
3646 | ||
3647 | NEXT_INSN (to) = NEXT_INSN (after); | |
3648 | PREV_INSN (from) = after; | |
3649 | NEXT_INSN (after) = from; | |
3650 | if (after == last_insn) | |
3651 | last_insn = to; | |
3652 | } | |
3653 | ||
3c030e88 JH |
3654 | /* Same as function above, but take care to update BB boundaries. */ |
3655 | void | |
3656 | reorder_insns (from, to, after) | |
3657 | rtx from, to, after; | |
3658 | { | |
3659 | rtx prev = PREV_INSN (from); | |
3660 | basic_block bb, bb2; | |
3661 | ||
3662 | reorder_insns_nobb (from, to, after); | |
3663 | ||
ba4f7968 | 3664 | if (GET_CODE (after) != BARRIER |
3c030e88 JH |
3665 | && (bb = BLOCK_FOR_INSN (after))) |
3666 | { | |
3667 | rtx x; | |
38c1593d | 3668 | bb->flags |= BB_DIRTY; |
68252e27 | 3669 | |
ba4f7968 | 3670 | if (GET_CODE (from) != BARRIER |
3c030e88 JH |
3671 | && (bb2 = BLOCK_FOR_INSN (from))) |
3672 | { | |
3673 | if (bb2->end == to) | |
3674 | bb2->end = prev; | |
38c1593d | 3675 | bb2->flags |= BB_DIRTY; |
3c030e88 JH |
3676 | } |
3677 | ||
3678 | if (bb->end == after) | |
3679 | bb->end = to; | |
3680 | ||
3681 | for (x = from; x != NEXT_INSN (to); x = NEXT_INSN (x)) | |
3682 | set_block_for_insn (x, bb); | |
3683 | } | |
3684 | } | |
3685 | ||
23b2ce53 RS |
3686 | /* Return the line note insn preceding INSN. */ |
3687 | ||
3688 | static rtx | |
3689 | find_line_note (insn) | |
3690 | rtx insn; | |
3691 | { | |
3692 | if (no_line_numbers) | |
3693 | return 0; | |
3694 | ||
3695 | for (; insn; insn = PREV_INSN (insn)) | |
3696 | if (GET_CODE (insn) == NOTE | |
0fb7aeda | 3697 | && NOTE_LINE_NUMBER (insn) >= 0) |
23b2ce53 RS |
3698 | break; |
3699 | ||
3700 | return insn; | |
3701 | } | |
3702 | ||
3703 | /* Like reorder_insns, but inserts line notes to preserve the line numbers | |
3704 | of the moved insns when debugging. This may insert a note between AFTER | |
3705 | and FROM, and another one after TO. */ | |
3706 | ||
3707 | void | |
3708 | reorder_insns_with_line_notes (from, to, after) | |
3709 | rtx from, to, after; | |
3710 | { | |
3711 | rtx from_line = find_line_note (from); | |
3712 | rtx after_line = find_line_note (after); | |
3713 | ||
3714 | reorder_insns (from, to, after); | |
3715 | ||
3716 | if (from_line == after_line) | |
3717 | return; | |
3718 | ||
3719 | if (from_line) | |
3720 | emit_line_note_after (NOTE_SOURCE_FILE (from_line), | |
3721 | NOTE_LINE_NUMBER (from_line), | |
3722 | after); | |
3723 | if (after_line) | |
3724 | emit_line_note_after (NOTE_SOURCE_FILE (after_line), | |
3725 | NOTE_LINE_NUMBER (after_line), | |
3726 | to); | |
3727 | } | |
aeeeda03 | 3728 | |
64b59a80 | 3729 | /* Remove unnecessary notes from the instruction stream. */ |
aeeeda03 MM |
3730 | |
3731 | void | |
64b59a80 | 3732 | remove_unnecessary_notes () |
aeeeda03 | 3733 | { |
542d73ae RH |
3734 | rtx block_stack = NULL_RTX; |
3735 | rtx eh_stack = NULL_RTX; | |
aeeeda03 MM |
3736 | rtx insn; |
3737 | rtx next; | |
542d73ae | 3738 | rtx tmp; |
aeeeda03 | 3739 | |
116eebd6 MM |
3740 | /* We must not remove the first instruction in the function because |
3741 | the compiler depends on the first instruction being a note. */ | |
aeeeda03 MM |
3742 | for (insn = NEXT_INSN (get_insns ()); insn; insn = next) |
3743 | { | |
3744 | /* Remember what's next. */ | |
3745 | next = NEXT_INSN (insn); | |
3746 | ||
3747 | /* We're only interested in notes. */ | |
3748 | if (GET_CODE (insn) != NOTE) | |
3749 | continue; | |
3750 | ||
542d73ae | 3751 | switch (NOTE_LINE_NUMBER (insn)) |
18c038b9 | 3752 | { |
542d73ae | 3753 | case NOTE_INSN_DELETED: |
e803a64b | 3754 | case NOTE_INSN_LOOP_END_TOP_COND: |
542d73ae RH |
3755 | remove_insn (insn); |
3756 | break; | |
3757 | ||
3758 | case NOTE_INSN_EH_REGION_BEG: | |
3759 | eh_stack = alloc_INSN_LIST (insn, eh_stack); | |
3760 | break; | |
3761 | ||
3762 | case NOTE_INSN_EH_REGION_END: | |
3763 | /* Too many end notes. */ | |
3764 | if (eh_stack == NULL_RTX) | |
3765 | abort (); | |
3766 | /* Mismatched nesting. */ | |
3767 | if (NOTE_EH_HANDLER (XEXP (eh_stack, 0)) != NOTE_EH_HANDLER (insn)) | |
3768 | abort (); | |
3769 | tmp = eh_stack; | |
3770 | eh_stack = XEXP (eh_stack, 1); | |
3771 | free_INSN_LIST_node (tmp); | |
3772 | break; | |
3773 | ||
3774 | case NOTE_INSN_BLOCK_BEG: | |
3775 | /* By now, all notes indicating lexical blocks should have | |
3776 | NOTE_BLOCK filled in. */ | |
3777 | if (NOTE_BLOCK (insn) == NULL_TREE) | |
3778 | abort (); | |
3779 | block_stack = alloc_INSN_LIST (insn, block_stack); | |
3780 | break; | |
3781 | ||
3782 | case NOTE_INSN_BLOCK_END: | |
3783 | /* Too many end notes. */ | |
3784 | if (block_stack == NULL_RTX) | |
3785 | abort (); | |
3786 | /* Mismatched nesting. */ | |
3787 | if (NOTE_BLOCK (XEXP (block_stack, 0)) != NOTE_BLOCK (insn)) | |
3788 | abort (); | |
3789 | tmp = block_stack; | |
3790 | block_stack = XEXP (block_stack, 1); | |
3791 | free_INSN_LIST_node (tmp); | |
3792 | ||
18c038b9 MM |
3793 | /* Scan back to see if there are any non-note instructions |
3794 | between INSN and the beginning of this block. If not, | |
3795 | then there is no PC range in the generated code that will | |
3796 | actually be in this block, so there's no point in | |
3797 | remembering the existence of the block. */ | |
68252e27 | 3798 | for (tmp = PREV_INSN (insn); tmp; tmp = PREV_INSN (tmp)) |
18c038b9 MM |
3799 | { |
3800 | /* This block contains a real instruction. Note that we | |
3801 | don't include labels; if the only thing in the block | |
3802 | is a label, then there are still no PC values that | |
3803 | lie within the block. */ | |
542d73ae | 3804 | if (INSN_P (tmp)) |
18c038b9 MM |
3805 | break; |
3806 | ||
3807 | /* We're only interested in NOTEs. */ | |
542d73ae | 3808 | if (GET_CODE (tmp) != NOTE) |
18c038b9 MM |
3809 | continue; |
3810 | ||
542d73ae | 3811 | if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_BEG) |
18c038b9 | 3812 | { |
e1772ac0 NB |
3813 | /* We just verified that this BLOCK matches us with |
3814 | the block_stack check above. Never delete the | |
3815 | BLOCK for the outermost scope of the function; we | |
3816 | can refer to names from that scope even if the | |
3817 | block notes are messed up. */ | |
3818 | if (! is_body_block (NOTE_BLOCK (insn)) | |
3819 | && (*debug_hooks->ignore_block) (NOTE_BLOCK (insn))) | |
deb5e280 | 3820 | { |
542d73ae | 3821 | remove_insn (tmp); |
deb5e280 JM |
3822 | remove_insn (insn); |
3823 | } | |
18c038b9 MM |
3824 | break; |
3825 | } | |
542d73ae | 3826 | else if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_END) |
18c038b9 MM |
3827 | /* There's a nested block. We need to leave the |
3828 | current block in place since otherwise the debugger | |
3829 | wouldn't be able to show symbols from our block in | |
3830 | the nested block. */ | |
3831 | break; | |
3832 | } | |
3833 | } | |
aeeeda03 | 3834 | } |
542d73ae RH |
3835 | |
3836 | /* Too many begin notes. */ | |
3837 | if (block_stack || eh_stack) | |
3838 | abort (); | |
aeeeda03 MM |
3839 | } |
3840 | ||
23b2ce53 | 3841 | \f |
2f937369 DM |
3842 | /* Emit insn(s) of given code and pattern |
3843 | at a specified place within the doubly-linked list. | |
23b2ce53 | 3844 | |
2f937369 DM |
3845 | All of the emit_foo global entry points accept an object |
3846 | X which is either an insn list or a PATTERN of a single | |
3847 | instruction. | |
23b2ce53 | 3848 | |
2f937369 DM |
3849 | There are thus a few canonical ways to generate code and |
3850 | emit it at a specific place in the instruction stream. For | |
3851 | example, consider the instruction named SPOT and the fact that | |
3852 | we would like to emit some instructions before SPOT. We might | |
3853 | do it like this: | |
23b2ce53 | 3854 | |
2f937369 DM |
3855 | start_sequence (); |
3856 | ... emit the new instructions ... | |
3857 | insns_head = get_insns (); | |
3858 | end_sequence (); | |
23b2ce53 | 3859 | |
2f937369 | 3860 | emit_insn_before (insns_head, SPOT); |
23b2ce53 | 3861 | |
2f937369 DM |
3862 | It used to be common to generate SEQUENCE rtl instead, but that |
3863 | is a relic of the past which no longer occurs. The reason is that | |
3864 | SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE | |
3865 | generated would almost certainly die right after it was created. */ | |
23b2ce53 | 3866 | |
2f937369 | 3867 | /* Make X be output before the instruction BEFORE. */ |
23b2ce53 RS |
3868 | |
3869 | rtx | |
2f937369 DM |
3870 | emit_insn_before (x, before) |
3871 | rtx x, before; | |
23b2ce53 | 3872 | { |
2f937369 | 3873 | rtx last = before; |
b3694847 | 3874 | rtx insn; |
23b2ce53 | 3875 | |
2f937369 DM |
3876 | #ifdef ENABLE_RTL_CHECKING |
3877 | if (before == NULL_RTX) | |
3878 | abort (); | |
3879 | #endif | |
3880 | ||
3881 | if (x == NULL_RTX) | |
3882 | return last; | |
3883 | ||
3884 | switch (GET_CODE (x)) | |
23b2ce53 | 3885 | { |
2f937369 DM |
3886 | case INSN: |
3887 | case JUMP_INSN: | |
3888 | case CALL_INSN: | |
3889 | case CODE_LABEL: | |
3890 | case BARRIER: | |
3891 | case NOTE: | |
3892 | insn = x; | |
3893 | while (insn) | |
3894 | { | |
3895 | rtx next = NEXT_INSN (insn); | |
3896 | add_insn_before (insn, before); | |
3897 | last = insn; | |
3898 | insn = next; | |
3899 | } | |
3900 | break; | |
3901 | ||
3902 | #ifdef ENABLE_RTL_CHECKING | |
3903 | case SEQUENCE: | |
3904 | abort (); | |
3905 | break; | |
3906 | #endif | |
3907 | ||
3908 | default: | |
3909 | last = make_insn_raw (x); | |
3910 | add_insn_before (last, before); | |
3911 | break; | |
23b2ce53 RS |
3912 | } |
3913 | ||
2f937369 | 3914 | return last; |
23b2ce53 RS |
3915 | } |
3916 | ||
2f937369 | 3917 | /* Make an instruction with body X and code JUMP_INSN |
23b2ce53 RS |
3918 | and output it before the instruction BEFORE. */ |
3919 | ||
3920 | rtx | |
2f937369 DM |
3921 | emit_jump_insn_before (x, before) |
3922 | rtx x, before; | |
23b2ce53 | 3923 | { |
2f937369 | 3924 | rtx insn, last; |
aff507f4 | 3925 | |
2f937369 DM |
3926 | #ifdef ENABLE_RTL_CHECKING |
3927 | if (before == NULL_RTX) | |
3928 | abort (); | |
3929 | #endif | |
3930 | ||
3931 | switch (GET_CODE (x)) | |
aff507f4 | 3932 | { |
2f937369 DM |
3933 | case INSN: |
3934 | case JUMP_INSN: | |
3935 | case CALL_INSN: | |
3936 | case CODE_LABEL: | |
3937 | case BARRIER: | |
3938 | case NOTE: | |
3939 | insn = x; | |
3940 | while (insn) | |
3941 | { | |
3942 | rtx next = NEXT_INSN (insn); | |
3943 | add_insn_before (insn, before); | |
3944 | last = insn; | |
3945 | insn = next; | |
3946 | } | |
3947 | break; | |
3948 | ||
3949 | #ifdef ENABLE_RTL_CHECKING | |
3950 | case SEQUENCE: | |
3951 | abort (); | |
3952 | break; | |
3953 | #endif | |
3954 | ||
3955 | default: | |
3956 | last = make_jump_insn_raw (x); | |
3957 | add_insn_before (last, before); | |
3958 | break; | |
aff507f4 RK |
3959 | } |
3960 | ||
2f937369 | 3961 | return last; |
23b2ce53 RS |
3962 | } |
3963 | ||
2f937369 | 3964 | /* Make an instruction with body X and code CALL_INSN |
969d70ca JH |
3965 | and output it before the instruction BEFORE. */ |
3966 | ||
3967 | rtx | |
2f937369 DM |
3968 | emit_call_insn_before (x, before) |
3969 | rtx x, before; | |
969d70ca | 3970 | { |
2f937369 | 3971 | rtx last, insn; |
969d70ca | 3972 | |
2f937369 DM |
3973 | #ifdef ENABLE_RTL_CHECKING |
3974 | if (before == NULL_RTX) | |
3975 | abort (); | |
3976 | #endif | |
3977 | ||
3978 | switch (GET_CODE (x)) | |
969d70ca | 3979 | { |
2f937369 DM |
3980 | case INSN: |
3981 | case JUMP_INSN: | |
3982 | case CALL_INSN: | |
3983 | case CODE_LABEL: | |
3984 | case BARRIER: | |
3985 | case NOTE: | |
3986 | insn = x; | |
3987 | while (insn) | |
3988 | { | |
3989 | rtx next = NEXT_INSN (insn); | |
3990 | add_insn_before (insn, before); | |
3991 | last = insn; | |
3992 | insn = next; | |
3993 | } | |
3994 | break; | |
3995 | ||
3996 | #ifdef ENABLE_RTL_CHECKING | |
3997 | case SEQUENCE: | |
3998 | abort (); | |
3999 | break; | |
4000 | #endif | |
4001 | ||
4002 | default: | |
4003 | last = make_call_insn_raw (x); | |
4004 | add_insn_before (last, before); | |
4005 | break; | |
969d70ca JH |
4006 | } |
4007 | ||
2f937369 | 4008 | return last; |
969d70ca JH |
4009 | } |
4010 | ||
23b2ce53 | 4011 | /* Make an insn of code BARRIER |
e881bb1b | 4012 | and output it before the insn BEFORE. */ |
23b2ce53 RS |
4013 | |
4014 | rtx | |
4015 | emit_barrier_before (before) | |
b3694847 | 4016 | rtx before; |
23b2ce53 | 4017 | { |
b3694847 | 4018 | rtx insn = rtx_alloc (BARRIER); |
23b2ce53 RS |
4019 | |
4020 | INSN_UID (insn) = cur_insn_uid++; | |
4021 | ||
a0ae8e8d | 4022 | add_insn_before (insn, before); |
23b2ce53 RS |
4023 | return insn; |
4024 | } | |
4025 | ||
e881bb1b RH |
4026 | /* Emit the label LABEL before the insn BEFORE. */ |
4027 | ||
4028 | rtx | |
4029 | emit_label_before (label, before) | |
4030 | rtx label, before; | |
4031 | { | |
4032 | /* This can be called twice for the same label as a result of the | |
4033 | confusion that follows a syntax error! So make it harmless. */ | |
4034 | if (INSN_UID (label) == 0) | |
4035 | { | |
4036 | INSN_UID (label) = cur_insn_uid++; | |
4037 | add_insn_before (label, before); | |
4038 | } | |
4039 | ||
4040 | return label; | |
4041 | } | |
4042 | ||
23b2ce53 RS |
4043 | /* Emit a note of subtype SUBTYPE before the insn BEFORE. */ |
4044 | ||
4045 | rtx | |
4046 | emit_note_before (subtype, before) | |
4047 | int subtype; | |
4048 | rtx before; | |
4049 | { | |
b3694847 | 4050 | rtx note = rtx_alloc (NOTE); |
23b2ce53 RS |
4051 | INSN_UID (note) = cur_insn_uid++; |
4052 | NOTE_SOURCE_FILE (note) = 0; | |
4053 | NOTE_LINE_NUMBER (note) = subtype; | |
ba4f7968 | 4054 | BLOCK_FOR_INSN (note) = NULL; |
23b2ce53 | 4055 | |
a0ae8e8d | 4056 | add_insn_before (note, before); |
23b2ce53 RS |
4057 | return note; |
4058 | } | |
4059 | \f | |
2f937369 DM |
4060 | /* Helper for emit_insn_after, handles lists of instructions |
4061 | efficiently. */ | |
23b2ce53 | 4062 | |
2f937369 DM |
4063 | static rtx emit_insn_after_1 PARAMS ((rtx, rtx)); |
4064 | ||
4065 | static rtx | |
4066 | emit_insn_after_1 (first, after) | |
4067 | rtx first, after; | |
23b2ce53 | 4068 | { |
2f937369 DM |
4069 | rtx last; |
4070 | rtx after_after; | |
4071 | basic_block bb; | |
23b2ce53 | 4072 | |
2f937369 DM |
4073 | if (GET_CODE (after) != BARRIER |
4074 | && (bb = BLOCK_FOR_INSN (after))) | |
23b2ce53 | 4075 | { |
2f937369 DM |
4076 | bb->flags |= BB_DIRTY; |
4077 | for (last = first; NEXT_INSN (last); last = NEXT_INSN (last)) | |
4078 | if (GET_CODE (last) != BARRIER) | |
4079 | set_block_for_insn (last, bb); | |
4080 | if (GET_CODE (last) != BARRIER) | |
4081 | set_block_for_insn (last, bb); | |
4082 | if (bb->end == after) | |
4083 | bb->end = last; | |
23b2ce53 RS |
4084 | } |
4085 | else | |
2f937369 DM |
4086 | for (last = first; NEXT_INSN (last); last = NEXT_INSN (last)) |
4087 | continue; | |
4088 | ||
4089 | after_after = NEXT_INSN (after); | |
4090 | ||
4091 | NEXT_INSN (after) = first; | |
4092 | PREV_INSN (first) = after; | |
4093 | NEXT_INSN (last) = after_after; | |
4094 | if (after_after) | |
4095 | PREV_INSN (after_after) = last; | |
4096 | ||
4097 | if (after == last_insn) | |
4098 | last_insn = last; | |
4099 | return last; | |
4100 | } | |
4101 | ||
4102 | /* Make X be output after the insn AFTER. */ | |
4103 | ||
4104 | rtx | |
4105 | emit_insn_after (x, after) | |
4106 | rtx x, after; | |
4107 | { | |
4108 | rtx last = after; | |
4109 | ||
4110 | #ifdef ENABLE_RTL_CHECKING | |
4111 | if (after == NULL_RTX) | |
4112 | abort (); | |
4113 | #endif | |
4114 | ||
4115 | if (x == NULL_RTX) | |
4116 | return last; | |
4117 | ||
4118 | switch (GET_CODE (x)) | |
23b2ce53 | 4119 | { |
2f937369 DM |
4120 | case INSN: |
4121 | case JUMP_INSN: | |
4122 | case CALL_INSN: | |
4123 | case CODE_LABEL: | |
4124 | case BARRIER: | |
4125 | case NOTE: | |
4126 | last = emit_insn_after_1 (x, after); | |
4127 | break; | |
4128 | ||
4129 | #ifdef ENABLE_RTL_CHECKING | |
4130 | case SEQUENCE: | |
4131 | abort (); | |
4132 | break; | |
4133 | #endif | |
4134 | ||
4135 | default: | |
4136 | last = make_insn_raw (x); | |
4137 | add_insn_after (last, after); | |
4138 | break; | |
23b2ce53 RS |
4139 | } |
4140 | ||
2f937369 | 4141 | return last; |
23b2ce53 RS |
4142 | } |
4143 | ||
255680cf RK |
4144 | /* Similar to emit_insn_after, except that line notes are to be inserted so |
4145 | as to act as if this insn were at FROM. */ | |
4146 | ||
4147 | void | |
2f937369 DM |
4148 | emit_insn_after_with_line_notes (x, after, from) |
4149 | rtx x, after, from; | |
255680cf RK |
4150 | { |
4151 | rtx from_line = find_line_note (from); | |
4152 | rtx after_line = find_line_note (after); | |
2f937369 | 4153 | rtx insn = emit_insn_after (x, after); |
255680cf RK |
4154 | |
4155 | if (from_line) | |
4156 | emit_line_note_after (NOTE_SOURCE_FILE (from_line), | |
4157 | NOTE_LINE_NUMBER (from_line), | |
4158 | after); | |
4159 | ||
4160 | if (after_line) | |
4161 | emit_line_note_after (NOTE_SOURCE_FILE (after_line), | |
4162 | NOTE_LINE_NUMBER (after_line), | |
4163 | insn); | |
4164 | } | |
4165 | ||
2f937369 | 4166 | /* Make an insn of code JUMP_INSN with body X |
23b2ce53 RS |
4167 | and output it after the insn AFTER. */ |
4168 | ||
4169 | rtx | |
2f937369 DM |
4170 | emit_jump_insn_after (x, after) |
4171 | rtx x, after; | |
23b2ce53 | 4172 | { |
2f937369 | 4173 | rtx last; |
23b2ce53 | 4174 | |
2f937369 DM |
4175 | #ifdef ENABLE_RTL_CHECKING |
4176 | if (after == NULL_RTX) | |
4177 | abort (); | |
4178 | #endif | |
4179 | ||
4180 | switch (GET_CODE (x)) | |
23b2ce53 | 4181 | { |
2f937369 DM |
4182 | case INSN: |
4183 | case JUMP_INSN: | |
4184 | case CALL_INSN: | |
4185 | case CODE_LABEL: | |
4186 | case BARRIER: | |
4187 | case NOTE: | |
4188 | last = emit_insn_after_1 (x, after); | |
4189 | break; | |
4190 | ||
4191 | #ifdef ENABLE_RTL_CHECKING | |
4192 | case SEQUENCE: | |
4193 | abort (); | |
4194 | break; | |
4195 | #endif | |
4196 | ||
4197 | default: | |
4198 | last = make_jump_insn_raw (x); | |
4199 | add_insn_after (last, after); | |
4200 | break; | |
23b2ce53 RS |
4201 | } |
4202 | ||
2f937369 DM |
4203 | return last; |
4204 | } | |
4205 | ||
4206 | /* Make an instruction with body X and code CALL_INSN | |
4207 | and output it after the instruction AFTER. */ | |
4208 | ||
4209 | rtx | |
4210 | emit_call_insn_after (x, after) | |
4211 | rtx x, after; | |
4212 | { | |
4213 | rtx last; | |
4214 | ||
4215 | #ifdef ENABLE_RTL_CHECKING | |
4216 | if (after == NULL_RTX) | |
4217 | abort (); | |
4218 | #endif | |
4219 | ||
4220 | switch (GET_CODE (x)) | |
4221 | { | |
4222 | case INSN: | |
4223 | case JUMP_INSN: | |
4224 | case CALL_INSN: | |
4225 | case CODE_LABEL: | |
4226 | case BARRIER: | |
4227 | case NOTE: | |
4228 | last = emit_insn_after_1 (x, after); | |
4229 | break; | |
4230 | ||
4231 | #ifdef ENABLE_RTL_CHECKING | |
4232 | case SEQUENCE: | |
4233 | abort (); | |
4234 | break; | |
4235 | #endif | |
4236 | ||
4237 | default: | |
4238 | last = make_call_insn_raw (x); | |
4239 | add_insn_after (last, after); | |
4240 | break; | |
4241 | } | |
4242 | ||
4243 | return last; | |
23b2ce53 RS |
4244 | } |
4245 | ||
4246 | /* Make an insn of code BARRIER | |
4247 | and output it after the insn AFTER. */ | |
4248 | ||
4249 | rtx | |
4250 | emit_barrier_after (after) | |
b3694847 | 4251 | rtx after; |
23b2ce53 | 4252 | { |
b3694847 | 4253 | rtx insn = rtx_alloc (BARRIER); |
23b2ce53 RS |
4254 | |
4255 | INSN_UID (insn) = cur_insn_uid++; | |
4256 | ||
4257 | add_insn_after (insn, after); | |
4258 | return insn; | |
4259 | } | |
4260 | ||
4261 | /* Emit the label LABEL after the insn AFTER. */ | |
4262 | ||
4263 | rtx | |
4264 | emit_label_after (label, after) | |
4265 | rtx label, after; | |
4266 | { | |
4267 | /* This can be called twice for the same label | |
4268 | as a result of the confusion that follows a syntax error! | |
4269 | So make it harmless. */ | |
4270 | if (INSN_UID (label) == 0) | |
4271 | { | |
4272 | INSN_UID (label) = cur_insn_uid++; | |
4273 | add_insn_after (label, after); | |
4274 | } | |
4275 | ||
4276 | return label; | |
4277 | } | |
4278 | ||
4279 | /* Emit a note of subtype SUBTYPE after the insn AFTER. */ | |
4280 | ||
4281 | rtx | |
4282 | emit_note_after (subtype, after) | |
4283 | int subtype; | |
4284 | rtx after; | |
4285 | { | |
b3694847 | 4286 | rtx note = rtx_alloc (NOTE); |
23b2ce53 RS |
4287 | INSN_UID (note) = cur_insn_uid++; |
4288 | NOTE_SOURCE_FILE (note) = 0; | |
4289 | NOTE_LINE_NUMBER (note) = subtype; | |
ba4f7968 | 4290 | BLOCK_FOR_INSN (note) = NULL; |
23b2ce53 RS |
4291 | add_insn_after (note, after); |
4292 | return note; | |
4293 | } | |
4294 | ||
4295 | /* Emit a line note for FILE and LINE after the insn AFTER. */ | |
4296 | ||
4297 | rtx | |
4298 | emit_line_note_after (file, line, after) | |
3cce094d | 4299 | const char *file; |
23b2ce53 RS |
4300 | int line; |
4301 | rtx after; | |
4302 | { | |
b3694847 | 4303 | rtx note; |
23b2ce53 RS |
4304 | |
4305 | if (no_line_numbers && line > 0) | |
4306 | { | |
4307 | cur_insn_uid++; | |
4308 | return 0; | |
4309 | } | |
4310 | ||
68252e27 | 4311 | note = rtx_alloc (NOTE); |
23b2ce53 RS |
4312 | INSN_UID (note) = cur_insn_uid++; |
4313 | NOTE_SOURCE_FILE (note) = file; | |
4314 | NOTE_LINE_NUMBER (note) = line; | |
ba4f7968 | 4315 | BLOCK_FOR_INSN (note) = NULL; |
23b2ce53 RS |
4316 | add_insn_after (note, after); |
4317 | return note; | |
4318 | } | |
4319 | \f | |
0d682900 JH |
4320 | /* Like emit_insn_after, but set INSN_SCOPE according to SCOPE. */ |
4321 | rtx | |
4322 | emit_insn_after_scope (pattern, after, scope) | |
4323 | rtx pattern, after; | |
4324 | tree scope; | |
4325 | { | |
4326 | rtx last = emit_insn_after (pattern, after); | |
0d682900 | 4327 | |
2f937369 DM |
4328 | after = NEXT_INSN (after); |
4329 | while (1) | |
4330 | { | |
d11cea13 DM |
4331 | if (active_insn_p (after)) |
4332 | INSN_SCOPE (after) = scope; | |
2f937369 DM |
4333 | if (after == last) |
4334 | break; | |
4335 | after = NEXT_INSN (after); | |
4336 | } | |
0d682900 JH |
4337 | return last; |
4338 | } | |
4339 | ||
4340 | /* Like emit_jump_insn_after, but set INSN_SCOPE according to SCOPE. */ | |
4341 | rtx | |
4342 | emit_jump_insn_after_scope (pattern, after, scope) | |
4343 | rtx pattern, after; | |
4344 | tree scope; | |
4345 | { | |
4346 | rtx last = emit_jump_insn_after (pattern, after); | |
2f937369 DM |
4347 | |
4348 | after = NEXT_INSN (after); | |
4349 | while (1) | |
4350 | { | |
d11cea13 DM |
4351 | if (active_insn_p (after)) |
4352 | INSN_SCOPE (after) = scope; | |
2f937369 DM |
4353 | if (after == last) |
4354 | break; | |
4355 | after = NEXT_INSN (after); | |
4356 | } | |
0d682900 JH |
4357 | return last; |
4358 | } | |
4359 | ||
4360 | /* Like emit_call_insn_after, but set INSN_SCOPE according to SCOPE. */ | |
4361 | rtx | |
4362 | emit_call_insn_after_scope (pattern, after, scope) | |
4363 | rtx pattern, after; | |
4364 | tree scope; | |
4365 | { | |
4366 | rtx last = emit_call_insn_after (pattern, after); | |
2f937369 DM |
4367 | |
4368 | after = NEXT_INSN (after); | |
4369 | while (1) | |
4370 | { | |
d11cea13 DM |
4371 | if (active_insn_p (after)) |
4372 | INSN_SCOPE (after) = scope; | |
2f937369 DM |
4373 | if (after == last) |
4374 | break; | |
4375 | after = NEXT_INSN (after); | |
4376 | } | |
0d682900 JH |
4377 | return last; |
4378 | } | |
4379 | ||
4380 | /* Like emit_insn_before, but set INSN_SCOPE according to SCOPE. */ | |
4381 | rtx | |
4382 | emit_insn_before_scope (pattern, before, scope) | |
4383 | rtx pattern, before; | |
4384 | tree scope; | |
4385 | { | |
4386 | rtx first = PREV_INSN (before); | |
4387 | rtx last = emit_insn_before (pattern, before); | |
4388 | ||
2f937369 DM |
4389 | first = NEXT_INSN (first); |
4390 | while (1) | |
4391 | { | |
d11cea13 DM |
4392 | if (active_insn_p (first)) |
4393 | INSN_SCOPE (first) = scope; | |
2f937369 DM |
4394 | if (first == last) |
4395 | break; | |
4396 | first = NEXT_INSN (first); | |
4397 | } | |
0d682900 JH |
4398 | return last; |
4399 | } | |
4400 | \f | |
2f937369 DM |
4401 | /* Take X and emit it at the end of the doubly-linked |
4402 | INSN list. | |
23b2ce53 RS |
4403 | |
4404 | Returns the last insn emitted. */ | |
4405 | ||
4406 | rtx | |
2f937369 DM |
4407 | emit_insn (x) |
4408 | rtx x; | |
23b2ce53 | 4409 | { |
2f937369 DM |
4410 | rtx last = last_insn; |
4411 | rtx insn; | |
23b2ce53 | 4412 | |
2f937369 DM |
4413 | if (x == NULL_RTX) |
4414 | return last; | |
23b2ce53 | 4415 | |
2f937369 DM |
4416 | switch (GET_CODE (x)) |
4417 | { | |
4418 | case INSN: | |
4419 | case JUMP_INSN: | |
4420 | case CALL_INSN: | |
4421 | case CODE_LABEL: | |
4422 | case BARRIER: | |
4423 | case NOTE: | |
4424 | insn = x; | |
4425 | while (insn) | |
23b2ce53 | 4426 | { |
2f937369 | 4427 | rtx next = NEXT_INSN (insn); |
23b2ce53 | 4428 | add_insn (insn); |
2f937369 DM |
4429 | last = insn; |
4430 | insn = next; | |
23b2ce53 | 4431 | } |
2f937369 | 4432 | break; |
23b2ce53 | 4433 | |
2f937369 DM |
4434 | #ifdef ENABLE_RTL_CHECKING |
4435 | case SEQUENCE: | |
4436 | abort (); | |
4437 | break; | |
4438 | #endif | |
23b2ce53 | 4439 | |
2f937369 DM |
4440 | default: |
4441 | last = make_insn_raw (x); | |
4442 | add_insn (last); | |
4443 | break; | |
23b2ce53 RS |
4444 | } |
4445 | ||
4446 | return last; | |
4447 | } | |
4448 | ||
2f937369 DM |
4449 | /* Make an insn of code JUMP_INSN with pattern X |
4450 | and add it to the end of the doubly-linked list. */ | |
23b2ce53 RS |
4451 | |
4452 | rtx | |
2f937369 DM |
4453 | emit_jump_insn (x) |
4454 | rtx x; | |
23b2ce53 | 4455 | { |
2f937369 | 4456 | rtx last, insn; |
23b2ce53 | 4457 | |
2f937369 | 4458 | switch (GET_CODE (x)) |
23b2ce53 | 4459 | { |
2f937369 DM |
4460 | case INSN: |
4461 | case JUMP_INSN: | |
4462 | case CALL_INSN: | |
4463 | case CODE_LABEL: | |
4464 | case BARRIER: | |
4465 | case NOTE: | |
4466 | insn = x; | |
4467 | while (insn) | |
4468 | { | |
4469 | rtx next = NEXT_INSN (insn); | |
4470 | add_insn (insn); | |
4471 | last = insn; | |
4472 | insn = next; | |
4473 | } | |
4474 | break; | |
e0a5c5eb | 4475 | |
2f937369 DM |
4476 | #ifdef ENABLE_RTL_CHECKING |
4477 | case SEQUENCE: | |
4478 | abort (); | |
4479 | break; | |
4480 | #endif | |
e0a5c5eb | 4481 | |
2f937369 DM |
4482 | default: |
4483 | last = make_jump_insn_raw (x); | |
4484 | add_insn (last); | |
4485 | break; | |
3c030e88 | 4486 | } |
e0a5c5eb RS |
4487 | |
4488 | return last; | |
4489 | } | |
4490 | ||
2f937369 | 4491 | /* Make an insn of code CALL_INSN with pattern X |
23b2ce53 RS |
4492 | and add it to the end of the doubly-linked list. */ |
4493 | ||
4494 | rtx | |
2f937369 DM |
4495 | emit_call_insn (x) |
4496 | rtx x; | |
23b2ce53 | 4497 | { |
2f937369 DM |
4498 | rtx insn; |
4499 | ||
4500 | switch (GET_CODE (x)) | |
23b2ce53 | 4501 | { |
2f937369 DM |
4502 | case INSN: |
4503 | case JUMP_INSN: | |
4504 | case CALL_INSN: | |
4505 | case CODE_LABEL: | |
4506 | case BARRIER: | |
4507 | case NOTE: | |
4508 | insn = emit_insn (x); | |
4509 | break; | |
23b2ce53 | 4510 | |
2f937369 DM |
4511 | #ifdef ENABLE_RTL_CHECKING |
4512 | case SEQUENCE: | |
4513 | abort (); | |
4514 | break; | |
4515 | #endif | |
23b2ce53 | 4516 | |
2f937369 DM |
4517 | default: |
4518 | insn = make_call_insn_raw (x); | |
23b2ce53 | 4519 | add_insn (insn); |
2f937369 | 4520 | break; |
23b2ce53 | 4521 | } |
2f937369 DM |
4522 | |
4523 | return insn; | |
23b2ce53 RS |
4524 | } |
4525 | ||
4526 | /* Add the label LABEL to the end of the doubly-linked list. */ | |
4527 | ||
4528 | rtx | |
4529 | emit_label (label) | |
4530 | rtx label; | |
4531 | { | |
4532 | /* This can be called twice for the same label | |
4533 | as a result of the confusion that follows a syntax error! | |
4534 | So make it harmless. */ | |
4535 | if (INSN_UID (label) == 0) | |
4536 | { | |
4537 | INSN_UID (label) = cur_insn_uid++; | |
4538 | add_insn (label); | |
4539 | } | |
4540 | return label; | |
4541 | } | |
4542 | ||
4543 | /* Make an insn of code BARRIER | |
4544 | and add it to the end of the doubly-linked list. */ | |
4545 | ||
4546 | rtx | |
4547 | emit_barrier () | |
4548 | { | |
b3694847 | 4549 | rtx barrier = rtx_alloc (BARRIER); |
23b2ce53 RS |
4550 | INSN_UID (barrier) = cur_insn_uid++; |
4551 | add_insn (barrier); | |
4552 | return barrier; | |
4553 | } | |
4554 | ||
4555 | /* Make an insn of code NOTE | |
4556 | with data-fields specified by FILE and LINE | |
4557 | and add it to the end of the doubly-linked list, | |
4558 | but only if line-numbers are desired for debugging info. */ | |
4559 | ||
4560 | rtx | |
4561 | emit_line_note (file, line) | |
3cce094d | 4562 | const char *file; |
23b2ce53 RS |
4563 | int line; |
4564 | { | |
3f1d071b | 4565 | set_file_and_line_for_stmt (file, line); |
23b2ce53 RS |
4566 | |
4567 | #if 0 | |
4568 | if (no_line_numbers) | |
4569 | return 0; | |
4570 | #endif | |
4571 | ||
4572 | return emit_note (file, line); | |
4573 | } | |
4574 | ||
4575 | /* Make an insn of code NOTE | |
4576 | with data-fields specified by FILE and LINE | |
4577 | and add it to the end of the doubly-linked list. | |
4578 | If it is a line-number NOTE, omit it if it matches the previous one. */ | |
4579 | ||
4580 | rtx | |
4581 | emit_note (file, line) | |
3cce094d | 4582 | const char *file; |
23b2ce53 RS |
4583 | int line; |
4584 | { | |
b3694847 | 4585 | rtx note; |
23b2ce53 RS |
4586 | |
4587 | if (line > 0) | |
4588 | { | |
4589 | if (file && last_filename && !strcmp (file, last_filename) | |
4590 | && line == last_linenum) | |
4591 | return 0; | |
4592 | last_filename = file; | |
4593 | last_linenum = line; | |
4594 | } | |
4595 | ||
4596 | if (no_line_numbers && line > 0) | |
4597 | { | |
4598 | cur_insn_uid++; | |
4599 | return 0; | |
4600 | } | |
4601 | ||
4602 | note = rtx_alloc (NOTE); | |
4603 | INSN_UID (note) = cur_insn_uid++; | |
4604 | NOTE_SOURCE_FILE (note) = file; | |
4605 | NOTE_LINE_NUMBER (note) = line; | |
ba4f7968 | 4606 | BLOCK_FOR_INSN (note) = NULL; |
23b2ce53 RS |
4607 | add_insn (note); |
4608 | return note; | |
4609 | } | |
4610 | ||
fe77a034 | 4611 | /* Emit a NOTE, and don't omit it even if LINE is the previous note. */ |
23b2ce53 RS |
4612 | |
4613 | rtx | |
4614 | emit_line_note_force (file, line) | |
3cce094d | 4615 | const char *file; |
23b2ce53 RS |
4616 | int line; |
4617 | { | |
4618 | last_linenum = -1; | |
4619 | return emit_line_note (file, line); | |
4620 | } | |
4621 | ||
4622 | /* Cause next statement to emit a line note even if the line number | |
4623 | has not changed. This is used at the beginning of a function. */ | |
4624 | ||
4625 | void | |
4626 | force_next_line_note () | |
4627 | { | |
4628 | last_linenum = -1; | |
4629 | } | |
87b47c85 AM |
4630 | |
4631 | /* Place a note of KIND on insn INSN with DATUM as the datum. If a | |
30f7a378 | 4632 | note of this type already exists, remove it first. */ |
87b47c85 | 4633 | |
3d238248 | 4634 | rtx |
87b47c85 AM |
4635 | set_unique_reg_note (insn, kind, datum) |
4636 | rtx insn; | |
4637 | enum reg_note kind; | |
4638 | rtx datum; | |
4639 | { | |
4640 | rtx note = find_reg_note (insn, kind, NULL_RTX); | |
4641 | ||
52488da1 JW |
4642 | switch (kind) |
4643 | { | |
4644 | case REG_EQUAL: | |
4645 | case REG_EQUIV: | |
4646 | /* Don't add REG_EQUAL/REG_EQUIV notes if the insn | |
4647 | has multiple sets (some callers assume single_set | |
4648 | means the insn only has one set, when in fact it | |
4649 | means the insn only has one * useful * set). */ | |
4650 | if (GET_CODE (PATTERN (insn)) == PARALLEL && multiple_sets (insn)) | |
4651 | { | |
4652 | if (note) | |
4653 | abort (); | |
4654 | return NULL_RTX; | |
4655 | } | |
4656 | ||
4657 | /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes. | |
4658 | It serves no useful purpose and breaks eliminate_regs. */ | |
4659 | if (GET_CODE (datum) == ASM_OPERANDS) | |
4660 | return NULL_RTX; | |
4661 | break; | |
4662 | ||
4663 | default: | |
4664 | break; | |
4665 | } | |
3d238248 | 4666 | |
750c9258 | 4667 | if (note) |
3d238248 JJ |
4668 | { |
4669 | XEXP (note, 0) = datum; | |
4670 | return note; | |
4671 | } | |
87b47c85 AM |
4672 | |
4673 | REG_NOTES (insn) = gen_rtx_EXPR_LIST (kind, datum, REG_NOTES (insn)); | |
3d238248 | 4674 | return REG_NOTES (insn); |
87b47c85 | 4675 | } |
23b2ce53 RS |
4676 | \f |
4677 | /* Return an indication of which type of insn should have X as a body. | |
4678 | The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */ | |
4679 | ||
4680 | enum rtx_code | |
4681 | classify_insn (x) | |
4682 | rtx x; | |
4683 | { | |
4684 | if (GET_CODE (x) == CODE_LABEL) | |
4685 | return CODE_LABEL; | |
4686 | if (GET_CODE (x) == CALL) | |
4687 | return CALL_INSN; | |
4688 | if (GET_CODE (x) == RETURN) | |
4689 | return JUMP_INSN; | |
4690 | if (GET_CODE (x) == SET) | |
4691 | { | |
4692 | if (SET_DEST (x) == pc_rtx) | |
4693 | return JUMP_INSN; | |
4694 | else if (GET_CODE (SET_SRC (x)) == CALL) | |
4695 | return CALL_INSN; | |
4696 | else | |
4697 | return INSN; | |
4698 | } | |
4699 | if (GET_CODE (x) == PARALLEL) | |
4700 | { | |
b3694847 | 4701 | int j; |
23b2ce53 RS |
4702 | for (j = XVECLEN (x, 0) - 1; j >= 0; j--) |
4703 | if (GET_CODE (XVECEXP (x, 0, j)) == CALL) | |
4704 | return CALL_INSN; | |
4705 | else if (GET_CODE (XVECEXP (x, 0, j)) == SET | |
4706 | && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx) | |
4707 | return JUMP_INSN; | |
4708 | else if (GET_CODE (XVECEXP (x, 0, j)) == SET | |
4709 | && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL) | |
4710 | return CALL_INSN; | |
4711 | } | |
4712 | return INSN; | |
4713 | } | |
4714 | ||
4715 | /* Emit the rtl pattern X as an appropriate kind of insn. | |
4716 | If X is a label, it is simply added into the insn chain. */ | |
4717 | ||
4718 | rtx | |
4719 | emit (x) | |
4720 | rtx x; | |
4721 | { | |
4722 | enum rtx_code code = classify_insn (x); | |
4723 | ||
4724 | if (code == CODE_LABEL) | |
4725 | return emit_label (x); | |
4726 | else if (code == INSN) | |
4727 | return emit_insn (x); | |
4728 | else if (code == JUMP_INSN) | |
4729 | { | |
b3694847 | 4730 | rtx insn = emit_jump_insn (x); |
7f1c097d | 4731 | if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN) |
23b2ce53 RS |
4732 | return emit_barrier (); |
4733 | return insn; | |
4734 | } | |
4735 | else if (code == CALL_INSN) | |
4736 | return emit_call_insn (x); | |
4737 | else | |
4738 | abort (); | |
4739 | } | |
4740 | \f | |
e2500fed GK |
4741 | /* Space for free sequence stack entries. */ |
4742 | static GTY ((deletable (""))) struct sequence_stack *free_sequence_stack; | |
4743 | ||
5c7a310f MM |
4744 | /* Begin emitting insns to a sequence which can be packaged in an |
4745 | RTL_EXPR. If this sequence will contain something that might cause | |
4746 | the compiler to pop arguments to function calls (because those | |
4747 | pops have previously been deferred; see INHIBIT_DEFER_POP for more | |
4748 | details), use do_pending_stack_adjust before calling this function. | |
4749 | That will ensure that the deferred pops are not accidentally | |
4eb00163 | 4750 | emitted in the middle of this sequence. */ |
23b2ce53 RS |
4751 | |
4752 | void | |
4753 | start_sequence () | |
4754 | { | |
4755 | struct sequence_stack *tem; | |
4756 | ||
e2500fed GK |
4757 | if (free_sequence_stack != NULL) |
4758 | { | |
4759 | tem = free_sequence_stack; | |
4760 | free_sequence_stack = tem->next; | |
4761 | } | |
4762 | else | |
4763 | tem = (struct sequence_stack *) ggc_alloc (sizeof (struct sequence_stack)); | |
23b2ce53 | 4764 | |
49ad7cfa | 4765 | tem->next = seq_stack; |
23b2ce53 RS |
4766 | tem->first = first_insn; |
4767 | tem->last = last_insn; | |
591ccf92 | 4768 | tem->sequence_rtl_expr = seq_rtl_expr; |
23b2ce53 | 4769 | |
49ad7cfa | 4770 | seq_stack = tem; |
23b2ce53 RS |
4771 | |
4772 | first_insn = 0; | |
4773 | last_insn = 0; | |
4774 | } | |
4775 | ||
591ccf92 MM |
4776 | /* Similarly, but indicate that this sequence will be placed in T, an |
4777 | RTL_EXPR. See the documentation for start_sequence for more | |
4778 | information about how to use this function. */ | |
4779 | ||
4780 | void | |
4781 | start_sequence_for_rtl_expr (t) | |
4782 | tree t; | |
4783 | { | |
4784 | start_sequence (); | |
4785 | ||
4786 | seq_rtl_expr = t; | |
4787 | } | |
4788 | ||
5c7a310f MM |
4789 | /* Set up the insn chain starting with FIRST as the current sequence, |
4790 | saving the previously current one. See the documentation for | |
4791 | start_sequence for more information about how to use this function. */ | |
23b2ce53 RS |
4792 | |
4793 | void | |
4794 | push_to_sequence (first) | |
4795 | rtx first; | |
4796 | { | |
4797 | rtx last; | |
4798 | ||
4799 | start_sequence (); | |
4800 | ||
4801 | for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last)); | |
4802 | ||
4803 | first_insn = first; | |
4804 | last_insn = last; | |
4805 | } | |
4806 | ||
c14f7160 ML |
4807 | /* Set up the insn chain from a chain stort in FIRST to LAST. */ |
4808 | ||
4809 | void | |
4810 | push_to_full_sequence (first, last) | |
4811 | rtx first, last; | |
4812 | { | |
4813 | start_sequence (); | |
4814 | first_insn = first; | |
4815 | last_insn = last; | |
4816 | /* We really should have the end of the insn chain here. */ | |
4817 | if (last && NEXT_INSN (last)) | |
4818 | abort (); | |
4819 | } | |
4820 | ||
f15ae3a1 TW |
4821 | /* Set up the outer-level insn chain |
4822 | as the current sequence, saving the previously current one. */ | |
4823 | ||
4824 | void | |
4825 | push_topmost_sequence () | |
4826 | { | |
aefdd5ab | 4827 | struct sequence_stack *stack, *top = NULL; |
f15ae3a1 TW |
4828 | |
4829 | start_sequence (); | |
4830 | ||
49ad7cfa | 4831 | for (stack = seq_stack; stack; stack = stack->next) |
f15ae3a1 TW |
4832 | top = stack; |
4833 | ||
4834 | first_insn = top->first; | |
4835 | last_insn = top->last; | |
591ccf92 | 4836 | seq_rtl_expr = top->sequence_rtl_expr; |
f15ae3a1 TW |
4837 | } |
4838 | ||
4839 | /* After emitting to the outer-level insn chain, update the outer-level | |
4840 | insn chain, and restore the previous saved state. */ | |
4841 | ||
4842 | void | |
4843 | pop_topmost_sequence () | |
4844 | { | |
aefdd5ab | 4845 | struct sequence_stack *stack, *top = NULL; |
f15ae3a1 | 4846 | |
49ad7cfa | 4847 | for (stack = seq_stack; stack; stack = stack->next) |
f15ae3a1 TW |
4848 | top = stack; |
4849 | ||
4850 | top->first = first_insn; | |
4851 | top->last = last_insn; | |
591ccf92 | 4852 | /* ??? Why don't we save seq_rtl_expr here? */ |
f15ae3a1 TW |
4853 | |
4854 | end_sequence (); | |
4855 | } | |
4856 | ||
23b2ce53 RS |
4857 | /* After emitting to a sequence, restore previous saved state. |
4858 | ||
5c7a310f | 4859 | To get the contents of the sequence just made, you must call |
2f937369 | 4860 | `get_insns' *before* calling here. |
5c7a310f MM |
4861 | |
4862 | If the compiler might have deferred popping arguments while | |
4863 | generating this sequence, and this sequence will not be immediately | |
4864 | inserted into the instruction stream, use do_pending_stack_adjust | |
2f937369 | 4865 | before calling get_insns. That will ensure that the deferred |
5c7a310f MM |
4866 | pops are inserted into this sequence, and not into some random |
4867 | location in the instruction stream. See INHIBIT_DEFER_POP for more | |
4868 | information about deferred popping of arguments. */ | |
23b2ce53 RS |
4869 | |
4870 | void | |
4871 | end_sequence () | |
4872 | { | |
49ad7cfa | 4873 | struct sequence_stack *tem = seq_stack; |
23b2ce53 RS |
4874 | |
4875 | first_insn = tem->first; | |
4876 | last_insn = tem->last; | |
591ccf92 | 4877 | seq_rtl_expr = tem->sequence_rtl_expr; |
49ad7cfa | 4878 | seq_stack = tem->next; |
23b2ce53 | 4879 | |
e2500fed GK |
4880 | memset (tem, 0, sizeof (*tem)); |
4881 | tem->next = free_sequence_stack; | |
4882 | free_sequence_stack = tem; | |
23b2ce53 RS |
4883 | } |
4884 | ||
c14f7160 ML |
4885 | /* This works like end_sequence, but records the old sequence in FIRST |
4886 | and LAST. */ | |
4887 | ||
4888 | void | |
4889 | end_full_sequence (first, last) | |
4890 | rtx *first, *last; | |
4891 | { | |
4892 | *first = first_insn; | |
4893 | *last = last_insn; | |
68252e27 | 4894 | end_sequence (); |
c14f7160 ML |
4895 | } |
4896 | ||
23b2ce53 RS |
4897 | /* Return 1 if currently emitting into a sequence. */ |
4898 | ||
4899 | int | |
4900 | in_sequence_p () | |
4901 | { | |
49ad7cfa | 4902 | return seq_stack != 0; |
23b2ce53 | 4903 | } |
23b2ce53 | 4904 | \f |
59ec66dc MM |
4905 | /* Put the various virtual registers into REGNO_REG_RTX. */ |
4906 | ||
4907 | void | |
49ad7cfa BS |
4908 | init_virtual_regs (es) |
4909 | struct emit_status *es; | |
59ec66dc | 4910 | { |
49ad7cfa BS |
4911 | rtx *ptr = es->x_regno_reg_rtx; |
4912 | ptr[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx; | |
4913 | ptr[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx; | |
4914 | ptr[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx; | |
4915 | ptr[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx; | |
4916 | ptr[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx; | |
4917 | } | |
4918 | ||
da43a810 BS |
4919 | \f |
4920 | /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */ | |
4921 | static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS]; | |
4922 | static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS]; | |
4923 | static int copy_insn_n_scratches; | |
4924 | ||
4925 | /* When an insn is being copied by copy_insn_1, this is nonzero if we have | |
4926 | copied an ASM_OPERANDS. | |
4927 | In that case, it is the original input-operand vector. */ | |
4928 | static rtvec orig_asm_operands_vector; | |
4929 | ||
4930 | /* When an insn is being copied by copy_insn_1, this is nonzero if we have | |
4931 | copied an ASM_OPERANDS. | |
4932 | In that case, it is the copied input-operand vector. */ | |
4933 | static rtvec copy_asm_operands_vector; | |
4934 | ||
4935 | /* Likewise for the constraints vector. */ | |
4936 | static rtvec orig_asm_constraints_vector; | |
4937 | static rtvec copy_asm_constraints_vector; | |
4938 | ||
4939 | /* Recursively create a new copy of an rtx for copy_insn. | |
4940 | This function differs from copy_rtx in that it handles SCRATCHes and | |
4941 | ASM_OPERANDs properly. | |
4942 | Normally, this function is not used directly; use copy_insn as front end. | |
4943 | However, you could first copy an insn pattern with copy_insn and then use | |
4944 | this function afterwards to properly copy any REG_NOTEs containing | |
4945 | SCRATCHes. */ | |
4946 | ||
4947 | rtx | |
4948 | copy_insn_1 (orig) | |
b3694847 | 4949 | rtx orig; |
da43a810 | 4950 | { |
b3694847 SS |
4951 | rtx copy; |
4952 | int i, j; | |
4953 | RTX_CODE code; | |
4954 | const char *format_ptr; | |
da43a810 BS |
4955 | |
4956 | code = GET_CODE (orig); | |
4957 | ||
4958 | switch (code) | |
4959 | { | |
4960 | case REG: | |
4961 | case QUEUED: | |
4962 | case CONST_INT: | |
4963 | case CONST_DOUBLE: | |
69ef87e2 | 4964 | case CONST_VECTOR: |
da43a810 BS |
4965 | case SYMBOL_REF: |
4966 | case CODE_LABEL: | |
4967 | case PC: | |
4968 | case CC0: | |
4969 | case ADDRESSOF: | |
4970 | return orig; | |
4971 | ||
4972 | case SCRATCH: | |
4973 | for (i = 0; i < copy_insn_n_scratches; i++) | |
4974 | if (copy_insn_scratch_in[i] == orig) | |
4975 | return copy_insn_scratch_out[i]; | |
4976 | break; | |
4977 | ||
4978 | case CONST: | |
4979 | /* CONST can be shared if it contains a SYMBOL_REF. If it contains | |
4980 | a LABEL_REF, it isn't sharable. */ | |
4981 | if (GET_CODE (XEXP (orig, 0)) == PLUS | |
4982 | && GET_CODE (XEXP (XEXP (orig, 0), 0)) == SYMBOL_REF | |
4983 | && GET_CODE (XEXP (XEXP (orig, 0), 1)) == CONST_INT) | |
4984 | return orig; | |
4985 | break; | |
750c9258 | 4986 | |
da43a810 BS |
4987 | /* A MEM with a constant address is not sharable. The problem is that |
4988 | the constant address may need to be reloaded. If the mem is shared, | |
4989 | then reloading one copy of this mem will cause all copies to appear | |
4990 | to have been reloaded. */ | |
4991 | ||
4992 | default: | |
4993 | break; | |
4994 | } | |
4995 | ||
4996 | copy = rtx_alloc (code); | |
4997 | ||
4998 | /* Copy the various flags, and other information. We assume that | |
4999 | all fields need copying, and then clear the fields that should | |
5000 | not be copied. That is the sensible default behavior, and forces | |
5001 | us to explicitly document why we are *not* copying a flag. */ | |
5002 | memcpy (copy, orig, sizeof (struct rtx_def) - sizeof (rtunion)); | |
5003 | ||
5004 | /* We do not copy the USED flag, which is used as a mark bit during | |
5005 | walks over the RTL. */ | |
2adc7f12 | 5006 | RTX_FLAG (copy, used) = 0; |
da43a810 BS |
5007 | |
5008 | /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */ | |
5009 | if (GET_RTX_CLASS (code) == 'i') | |
5010 | { | |
2adc7f12 JJ |
5011 | RTX_FLAG (copy, jump) = 0; |
5012 | RTX_FLAG (copy, call) = 0; | |
5013 | RTX_FLAG (copy, frame_related) = 0; | |
da43a810 | 5014 | } |
750c9258 | 5015 | |
da43a810 BS |
5016 | format_ptr = GET_RTX_FORMAT (GET_CODE (copy)); |
5017 | ||
5018 | for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++) | |
5019 | { | |
e63db8f6 | 5020 | copy->fld[i] = orig->fld[i]; |
da43a810 BS |
5021 | switch (*format_ptr++) |
5022 | { | |
5023 | case 'e': | |
da43a810 BS |
5024 | if (XEXP (orig, i) != NULL) |
5025 | XEXP (copy, i) = copy_insn_1 (XEXP (orig, i)); | |
5026 | break; | |
5027 | ||
da43a810 BS |
5028 | case 'E': |
5029 | case 'V': | |
da43a810 BS |
5030 | if (XVEC (orig, i) == orig_asm_constraints_vector) |
5031 | XVEC (copy, i) = copy_asm_constraints_vector; | |
5032 | else if (XVEC (orig, i) == orig_asm_operands_vector) | |
5033 | XVEC (copy, i) = copy_asm_operands_vector; | |
5034 | else if (XVEC (orig, i) != NULL) | |
5035 | { | |
5036 | XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i)); | |
5037 | for (j = 0; j < XVECLEN (copy, i); j++) | |
5038 | XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j)); | |
5039 | } | |
5040 | break; | |
5041 | ||
da43a810 | 5042 | case 't': |
da43a810 | 5043 | case 'w': |
da43a810 | 5044 | case 'i': |
da43a810 BS |
5045 | case 's': |
5046 | case 'S': | |
e63db8f6 BS |
5047 | case 'u': |
5048 | case '0': | |
5049 | /* These are left unchanged. */ | |
da43a810 BS |
5050 | break; |
5051 | ||
5052 | default: | |
5053 | abort (); | |
5054 | } | |
5055 | } | |
5056 | ||
5057 | if (code == SCRATCH) | |
5058 | { | |
5059 | i = copy_insn_n_scratches++; | |
5060 | if (i >= MAX_RECOG_OPERANDS) | |
5061 | abort (); | |
5062 | copy_insn_scratch_in[i] = orig; | |
5063 | copy_insn_scratch_out[i] = copy; | |
5064 | } | |
5065 | else if (code == ASM_OPERANDS) | |
5066 | { | |
6462bb43 AO |
5067 | orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig); |
5068 | copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy); | |
5069 | orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig); | |
5070 | copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy); | |
da43a810 BS |
5071 | } |
5072 | ||
5073 | return copy; | |
5074 | } | |
5075 | ||
5076 | /* Create a new copy of an rtx. | |
5077 | This function differs from copy_rtx in that it handles SCRATCHes and | |
5078 | ASM_OPERANDs properly. | |
5079 | INSN doesn't really have to be a full INSN; it could be just the | |
5080 | pattern. */ | |
5081 | rtx | |
5082 | copy_insn (insn) | |
5083 | rtx insn; | |
5084 | { | |
5085 | copy_insn_n_scratches = 0; | |
5086 | orig_asm_operands_vector = 0; | |
5087 | orig_asm_constraints_vector = 0; | |
5088 | copy_asm_operands_vector = 0; | |
5089 | copy_asm_constraints_vector = 0; | |
5090 | return copy_insn_1 (insn); | |
5091 | } | |
59ec66dc | 5092 | |
23b2ce53 RS |
5093 | /* Initialize data structures and variables in this file |
5094 | before generating rtl for each function. */ | |
5095 | ||
5096 | void | |
5097 | init_emit () | |
5098 | { | |
01d939e8 | 5099 | struct function *f = cfun; |
23b2ce53 | 5100 | |
e2500fed | 5101 | f->emit = (struct emit_status *) ggc_alloc (sizeof (struct emit_status)); |
23b2ce53 RS |
5102 | first_insn = NULL; |
5103 | last_insn = NULL; | |
591ccf92 | 5104 | seq_rtl_expr = NULL; |
23b2ce53 RS |
5105 | cur_insn_uid = 1; |
5106 | reg_rtx_no = LAST_VIRTUAL_REGISTER + 1; | |
5107 | last_linenum = 0; | |
5108 | last_filename = 0; | |
5109 | first_label_num = label_num; | |
5110 | last_label_num = 0; | |
49ad7cfa | 5111 | seq_stack = NULL; |
23b2ce53 | 5112 | |
23b2ce53 RS |
5113 | /* Init the tables that describe all the pseudo regs. */ |
5114 | ||
3502dc9c | 5115 | f->emit->regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101; |
23b2ce53 | 5116 | |
49ad7cfa | 5117 | f->emit->regno_pointer_align |
e2500fed GK |
5118 | = (unsigned char *) ggc_alloc_cleared (f->emit->regno_pointer_align_length |
5119 | * sizeof (unsigned char)); | |
86fe05e0 | 5120 | |
750c9258 | 5121 | regno_reg_rtx |
e2500fed GK |
5122 | = (rtx *) ggc_alloc_cleared (f->emit->regno_pointer_align_length |
5123 | * sizeof (rtx)); | |
0d4903b8 RK |
5124 | |
5125 | f->emit->regno_decl | |
e2500fed GK |
5126 | = (tree *) ggc_alloc_cleared (f->emit->regno_pointer_align_length |
5127 | * sizeof (tree)); | |
23b2ce53 | 5128 | |
e50126e8 | 5129 | /* Put copies of all the hard registers into regno_reg_rtx. */ |
6cde4876 JL |
5130 | memcpy (regno_reg_rtx, |
5131 | static_regno_reg_rtx, | |
5132 | FIRST_PSEUDO_REGISTER * sizeof (rtx)); | |
e50126e8 | 5133 | |
23b2ce53 | 5134 | /* Put copies of all the virtual register rtx into regno_reg_rtx. */ |
49ad7cfa | 5135 | init_virtual_regs (f->emit); |
740ab4a2 RK |
5136 | |
5137 | /* Indicate that the virtual registers and stack locations are | |
5138 | all pointers. */ | |
3502dc9c JDA |
5139 | REG_POINTER (stack_pointer_rtx) = 1; |
5140 | REG_POINTER (frame_pointer_rtx) = 1; | |
5141 | REG_POINTER (hard_frame_pointer_rtx) = 1; | |
5142 | REG_POINTER (arg_pointer_rtx) = 1; | |
740ab4a2 | 5143 | |
3502dc9c JDA |
5144 | REG_POINTER (virtual_incoming_args_rtx) = 1; |
5145 | REG_POINTER (virtual_stack_vars_rtx) = 1; | |
5146 | REG_POINTER (virtual_stack_dynamic_rtx) = 1; | |
5147 | REG_POINTER (virtual_outgoing_args_rtx) = 1; | |
5148 | REG_POINTER (virtual_cfa_rtx) = 1; | |
5e82e7bd | 5149 | |
86fe05e0 | 5150 | #ifdef STACK_BOUNDARY |
bdb429a5 RK |
5151 | REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY; |
5152 | REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY; | |
5153 | REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY; | |
5154 | REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY; | |
5155 | ||
5156 | REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY; | |
5157 | REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY; | |
5158 | REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY; | |
5159 | REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY; | |
5160 | REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD; | |
86fe05e0 RK |
5161 | #endif |
5162 | ||
5e82e7bd JVA |
5163 | #ifdef INIT_EXPANDERS |
5164 | INIT_EXPANDERS; | |
5165 | #endif | |
23b2ce53 RS |
5166 | } |
5167 | ||
ff88fe10 | 5168 | /* Generate the constant 0. */ |
69ef87e2 AH |
5169 | |
5170 | static rtx | |
ff88fe10 | 5171 | gen_const_vector_0 (mode) |
69ef87e2 AH |
5172 | enum machine_mode mode; |
5173 | { | |
5174 | rtx tem; | |
5175 | rtvec v; | |
5176 | int units, i; | |
5177 | enum machine_mode inner; | |
5178 | ||
5179 | units = GET_MODE_NUNITS (mode); | |
5180 | inner = GET_MODE_INNER (mode); | |
5181 | ||
5182 | v = rtvec_alloc (units); | |
5183 | ||
5184 | /* We need to call this function after we to set CONST0_RTX first. */ | |
5185 | if (!CONST0_RTX (inner)) | |
5186 | abort (); | |
5187 | ||
5188 | for (i = 0; i < units; ++i) | |
5189 | RTVEC_ELT (v, i) = CONST0_RTX (inner); | |
5190 | ||
5191 | tem = gen_rtx_CONST_VECTOR (mode, v); | |
5192 | return tem; | |
5193 | } | |
5194 | ||
23b2ce53 RS |
5195 | /* Create some permanent unique rtl objects shared between all functions. |
5196 | LINE_NUMBERS is nonzero if line numbers are to be generated. */ | |
5197 | ||
5198 | void | |
5199 | init_emit_once (line_numbers) | |
5200 | int line_numbers; | |
5201 | { | |
5202 | int i; | |
5203 | enum machine_mode mode; | |
9ec36da5 | 5204 | enum machine_mode double_mode; |
23b2ce53 | 5205 | |
5692c7bc ZW |
5206 | /* Initialize the CONST_INT, CONST_DOUBLE, and memory attribute hash |
5207 | tables. */ | |
750c9258 | 5208 | const_int_htab = htab_create (37, const_int_htab_hash, |
67673f5c | 5209 | const_int_htab_eq, NULL); |
173b24b9 | 5210 | |
5692c7bc ZW |
5211 | const_double_htab = htab_create (37, const_double_htab_hash, |
5212 | const_double_htab_eq, NULL); | |
5692c7bc | 5213 | |
173b24b9 RK |
5214 | mem_attrs_htab = htab_create (37, mem_attrs_htab_hash, |
5215 | mem_attrs_htab_eq, NULL); | |
67673f5c | 5216 | |
23b2ce53 RS |
5217 | no_line_numbers = ! line_numbers; |
5218 | ||
43fa6302 AS |
5219 | /* Compute the word and byte modes. */ |
5220 | ||
5221 | byte_mode = VOIDmode; | |
5222 | word_mode = VOIDmode; | |
5223 | double_mode = VOIDmode; | |
5224 | ||
5225 | for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode; | |
5226 | mode = GET_MODE_WIDER_MODE (mode)) | |
5227 | { | |
5228 | if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT | |
5229 | && byte_mode == VOIDmode) | |
5230 | byte_mode = mode; | |
5231 | ||
5232 | if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD | |
5233 | && word_mode == VOIDmode) | |
5234 | word_mode = mode; | |
5235 | } | |
5236 | ||
43fa6302 AS |
5237 | for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode; |
5238 | mode = GET_MODE_WIDER_MODE (mode)) | |
5239 | { | |
5240 | if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE | |
5241 | && double_mode == VOIDmode) | |
5242 | double_mode = mode; | |
5243 | } | |
5244 | ||
5245 | ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0); | |
5246 | ||
5da077de AS |
5247 | /* Assign register numbers to the globally defined register rtx. |
5248 | This must be done at runtime because the register number field | |
5249 | is in a union and some compilers can't initialize unions. */ | |
5250 | ||
5251 | pc_rtx = gen_rtx (PC, VOIDmode); | |
5252 | cc0_rtx = gen_rtx (CC0, VOIDmode); | |
08394eef BS |
5253 | stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM); |
5254 | frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM); | |
5da077de | 5255 | if (hard_frame_pointer_rtx == 0) |
750c9258 | 5256 | hard_frame_pointer_rtx = gen_raw_REG (Pmode, |
08394eef | 5257 | HARD_FRAME_POINTER_REGNUM); |
5da077de | 5258 | if (arg_pointer_rtx == 0) |
08394eef | 5259 | arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM); |
750c9258 | 5260 | virtual_incoming_args_rtx = |
08394eef | 5261 | gen_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM); |
750c9258 | 5262 | virtual_stack_vars_rtx = |
08394eef | 5263 | gen_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM); |
750c9258 | 5264 | virtual_stack_dynamic_rtx = |
08394eef | 5265 | gen_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM); |
750c9258 AJ |
5266 | virtual_outgoing_args_rtx = |
5267 | gen_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM); | |
08394eef | 5268 | virtual_cfa_rtx = gen_raw_REG (Pmode, VIRTUAL_CFA_REGNUM); |
5da077de | 5269 | |
6cde4876 JL |
5270 | /* Initialize RTL for commonly used hard registers. These are |
5271 | copied into regno_reg_rtx as we begin to compile each function. */ | |
5272 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
5273 | static_regno_reg_rtx[i] = gen_raw_REG (reg_raw_mode[i], i); | |
5274 | ||
5da077de | 5275 | #ifdef INIT_EXPANDERS |
414c4dc4 NC |
5276 | /* This is to initialize {init|mark|free}_machine_status before the first |
5277 | call to push_function_context_to. This is needed by the Chill front | |
a1f300c0 | 5278 | end which calls push_function_context_to before the first call to |
5da077de AS |
5279 | init_function_start. */ |
5280 | INIT_EXPANDERS; | |
5281 | #endif | |
5282 | ||
23b2ce53 RS |
5283 | /* Create the unique rtx's for certain rtx codes and operand values. */ |
5284 | ||
c5c76735 JL |
5285 | /* Don't use gen_rtx here since gen_rtx in this case |
5286 | tries to use these variables. */ | |
23b2ce53 | 5287 | for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++) |
750c9258 | 5288 | const_int_rtx[i + MAX_SAVED_CONST_INT] = |
5da077de | 5289 | gen_rtx_raw_CONST_INT (VOIDmode, i); |
23b2ce53 | 5290 | |
68d75312 JC |
5291 | if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT |
5292 | && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT) | |
5da077de | 5293 | const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT]; |
68d75312 | 5294 | else |
3b80f6ca | 5295 | const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE); |
23b2ce53 | 5296 | |
5692c7bc ZW |
5297 | REAL_VALUE_FROM_INT (dconst0, 0, 0, double_mode); |
5298 | REAL_VALUE_FROM_INT (dconst1, 1, 0, double_mode); | |
5299 | REAL_VALUE_FROM_INT (dconst2, 2, 0, double_mode); | |
5300 | REAL_VALUE_FROM_INT (dconstm1, -1, -1, double_mode); | |
23b2ce53 RS |
5301 | |
5302 | for (i = 0; i <= 2; i++) | |
5303 | { | |
b216cd4a ZW |
5304 | REAL_VALUE_TYPE *r = |
5305 | (i == 0 ? &dconst0 : i == 1 ? &dconst1 : &dconst2); | |
5306 | ||
23b2ce53 RS |
5307 | for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode; |
5308 | mode = GET_MODE_WIDER_MODE (mode)) | |
5692c7bc ZW |
5309 | const_tiny_rtx[i][(int) mode] = |
5310 | CONST_DOUBLE_FROM_REAL_VALUE (*r, mode); | |
23b2ce53 | 5311 | |
906c4e36 | 5312 | const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i); |
23b2ce53 RS |
5313 | |
5314 | for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode; | |
5315 | mode = GET_MODE_WIDER_MODE (mode)) | |
906c4e36 | 5316 | const_tiny_rtx[i][(int) mode] = GEN_INT (i); |
33d3e559 RS |
5317 | |
5318 | for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT); | |
5319 | mode != VOIDmode; | |
5320 | mode = GET_MODE_WIDER_MODE (mode)) | |
5321 | const_tiny_rtx[i][(int) mode] = GEN_INT (i); | |
23b2ce53 RS |
5322 | } |
5323 | ||
69ef87e2 AH |
5324 | for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT); |
5325 | mode != VOIDmode; | |
5326 | mode = GET_MODE_WIDER_MODE (mode)) | |
ff88fe10 | 5327 | const_tiny_rtx[0][(int) mode] = gen_const_vector_0 (mode); |
69ef87e2 AH |
5328 | |
5329 | for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT); | |
5330 | mode != VOIDmode; | |
5331 | mode = GET_MODE_WIDER_MODE (mode)) | |
ff88fe10 | 5332 | const_tiny_rtx[0][(int) mode] = gen_const_vector_0 (mode); |
69ef87e2 | 5333 | |
dbbbbf3b JDA |
5334 | for (i = (int) CCmode; i < (int) MAX_MACHINE_MODE; ++i) |
5335 | if (GET_MODE_CLASS ((enum machine_mode) i) == MODE_CC) | |
5336 | const_tiny_rtx[0][i] = const0_rtx; | |
23b2ce53 | 5337 | |
f0417c82 RH |
5338 | const_tiny_rtx[0][(int) BImode] = const0_rtx; |
5339 | if (STORE_FLAG_VALUE == 1) | |
5340 | const_tiny_rtx[1][(int) BImode] = const1_rtx; | |
5341 | ||
a7e1e2ac AO |
5342 | #ifdef RETURN_ADDRESS_POINTER_REGNUM |
5343 | return_address_pointer_rtx | |
08394eef | 5344 | = gen_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM); |
a7e1e2ac AO |
5345 | #endif |
5346 | ||
5347 | #ifdef STRUCT_VALUE | |
5348 | struct_value_rtx = STRUCT_VALUE; | |
5349 | #else | |
5350 | struct_value_rtx = gen_rtx_REG (Pmode, STRUCT_VALUE_REGNUM); | |
5351 | #endif | |
5352 | ||
5353 | #ifdef STRUCT_VALUE_INCOMING | |
5354 | struct_value_incoming_rtx = STRUCT_VALUE_INCOMING; | |
5355 | #else | |
5356 | #ifdef STRUCT_VALUE_INCOMING_REGNUM | |
5357 | struct_value_incoming_rtx | |
5358 | = gen_rtx_REG (Pmode, STRUCT_VALUE_INCOMING_REGNUM); | |
5359 | #else | |
5360 | struct_value_incoming_rtx = struct_value_rtx; | |
5361 | #endif | |
5362 | #endif | |
5363 | ||
5364 | #ifdef STATIC_CHAIN_REGNUM | |
5365 | static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM); | |
5366 | ||
5367 | #ifdef STATIC_CHAIN_INCOMING_REGNUM | |
5368 | if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM) | |
5369 | static_chain_incoming_rtx | |
5370 | = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM); | |
5371 | else | |
5372 | #endif | |
5373 | static_chain_incoming_rtx = static_chain_rtx; | |
5374 | #endif | |
5375 | ||
5376 | #ifdef STATIC_CHAIN | |
5377 | static_chain_rtx = STATIC_CHAIN; | |
5378 | ||
5379 | #ifdef STATIC_CHAIN_INCOMING | |
5380 | static_chain_incoming_rtx = STATIC_CHAIN_INCOMING; | |
5381 | #else | |
5382 | static_chain_incoming_rtx = static_chain_rtx; | |
5383 | #endif | |
5384 | #endif | |
5385 | ||
848e0190 | 5386 | if (PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM) |
751551d5 | 5387 | pic_offset_table_rtx = gen_raw_REG (Pmode, PIC_OFFSET_TABLE_REGNUM); |
23b2ce53 | 5388 | } |
a11759a3 JR |
5389 | \f |
5390 | /* Query and clear/ restore no_line_numbers. This is used by the | |
5391 | switch / case handling in stmt.c to give proper line numbers in | |
5392 | warnings about unreachable code. */ | |
5393 | ||
5394 | int | |
5395 | force_line_numbers () | |
5396 | { | |
5397 | int old = no_line_numbers; | |
5398 | ||
5399 | no_line_numbers = 0; | |
5400 | if (old) | |
5401 | force_next_line_note (); | |
5402 | return old; | |
5403 | } | |
5404 | ||
5405 | void | |
5406 | restore_line_number_status (old_value) | |
5407 | int old_value; | |
5408 | { | |
5409 | no_line_numbers = old_value; | |
5410 | } | |
969d70ca JH |
5411 | |
5412 | /* Produce exact duplicate of insn INSN after AFTER. | |
5413 | Care updating of libcall regions if present. */ | |
5414 | ||
5415 | rtx | |
5416 | emit_copy_of_insn_after (insn, after) | |
5417 | rtx insn, after; | |
5418 | { | |
5419 | rtx new; | |
5420 | rtx note1, note2, link; | |
5421 | ||
5422 | switch (GET_CODE (insn)) | |
5423 | { | |
5424 | case INSN: | |
5425 | new = emit_insn_after (copy_insn (PATTERN (insn)), after); | |
5426 | break; | |
5427 | ||
5428 | case JUMP_INSN: | |
5429 | new = emit_jump_insn_after (copy_insn (PATTERN (insn)), after); | |
5430 | break; | |
5431 | ||
5432 | case CALL_INSN: | |
5433 | new = emit_call_insn_after (copy_insn (PATTERN (insn)), after); | |
5434 | if (CALL_INSN_FUNCTION_USAGE (insn)) | |
5435 | CALL_INSN_FUNCTION_USAGE (new) | |
5436 | = copy_insn (CALL_INSN_FUNCTION_USAGE (insn)); | |
5437 | SIBLING_CALL_P (new) = SIBLING_CALL_P (insn); | |
5438 | CONST_OR_PURE_CALL_P (new) = CONST_OR_PURE_CALL_P (insn); | |
5439 | break; | |
5440 | ||
5441 | default: | |
5442 | abort (); | |
5443 | } | |
5444 | ||
5445 | /* Update LABEL_NUSES. */ | |
5446 | mark_jump_label (PATTERN (new), new, 0); | |
5447 | ||
ba4f7968 JH |
5448 | INSN_SCOPE (new) = INSN_SCOPE (insn); |
5449 | ||
969d70ca JH |
5450 | /* Copy all REG_NOTES except REG_LABEL since mark_jump_label will |
5451 | make them. */ | |
5452 | for (link = REG_NOTES (insn); link; link = XEXP (link, 1)) | |
5453 | if (REG_NOTE_KIND (link) != REG_LABEL) | |
5454 | { | |
5455 | if (GET_CODE (link) == EXPR_LIST) | |
5456 | REG_NOTES (new) | |
5457 | = copy_insn_1 (gen_rtx_EXPR_LIST (REG_NOTE_KIND (link), | |
5458 | XEXP (link, 0), | |
5459 | REG_NOTES (new))); | |
5460 | else | |
5461 | REG_NOTES (new) | |
5462 | = copy_insn_1 (gen_rtx_INSN_LIST (REG_NOTE_KIND (link), | |
5463 | XEXP (link, 0), | |
5464 | REG_NOTES (new))); | |
5465 | } | |
5466 | ||
5467 | /* Fix the libcall sequences. */ | |
5468 | if ((note1 = find_reg_note (new, REG_RETVAL, NULL_RTX)) != NULL) | |
5469 | { | |
5470 | rtx p = new; | |
5471 | while ((note2 = find_reg_note (p, REG_LIBCALL, NULL_RTX)) == NULL) | |
5472 | p = PREV_INSN (p); | |
5473 | XEXP (note1, 0) = p; | |
5474 | XEXP (note2, 0) = new; | |
5475 | } | |
5476 | return new; | |
5477 | } | |
e2500fed GK |
5478 | |
5479 | #include "gt-emit-rtl.h" |