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15bbde2b | 1 | /* Emit RTL for the GNU C-Compiler expander. |
ddca3e9d | 2 | Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998, |
5377f687 | 3 | 1999, 2000, 2001 Free Software Foundation, Inc. |
15bbde2b | 4 | |
f12b58b3 | 5 | This file is part of GCC. |
15bbde2b | 6 | |
f12b58b3 | 7 | GCC is free software; you can redistribute it and/or modify it under |
8 | the terms of the GNU General Public License as published by the Free | |
9 | Software Foundation; either version 2, or (at your option) any later | |
10 | version. | |
15bbde2b | 11 | |
f12b58b3 | 12 | GCC is distributed in the hope that it will be useful, but WITHOUT ANY |
13 | WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
14 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
15 | for more details. | |
15bbde2b | 16 | |
17 | You should have received a copy of the GNU General Public License | |
f12b58b3 | 18 | along with GCC; see the file COPYING. If not, write to the Free |
19 | Software Foundation, 59 Temple Place - Suite 330, Boston, MA | |
20 | 02111-1307, USA. */ | |
15bbde2b | 21 | |
22 | ||
23 | /* Middle-to-low level generation of rtx code and insns. | |
24 | ||
25 | This file contains the functions `gen_rtx', `gen_reg_rtx' | |
26 | and `gen_label_rtx' that are the usual ways of creating rtl | |
27 | expressions for most purposes. | |
28 | ||
29 | It also has the functions for creating insns and linking | |
30 | them in the doubly-linked chain. | |
31 | ||
32 | The patterns of the insns are created by machine-dependent | |
33 | routines in insn-emit.c, which is generated automatically from | |
34 | the machine description. These routines use `gen_rtx' to make | |
35 | the individual rtx's of the pattern; what is machine dependent | |
36 | is the kind of rtx's they make and what arguments they use. */ | |
37 | ||
38 | #include "config.h" | |
405711de | 39 | #include "system.h" |
d3b64f2d | 40 | #include "toplev.h" |
15bbde2b | 41 | #include "rtl.h" |
3fd7e17f | 42 | #include "tree.h" |
7953c610 | 43 | #include "tm_p.h" |
15bbde2b | 44 | #include "flags.h" |
45 | #include "function.h" | |
46 | #include "expr.h" | |
47 | #include "regs.h" | |
c6b6c51f | 48 | #include "hard-reg-set.h" |
73f5c1e3 | 49 | #include "hashtab.h" |
15bbde2b | 50 | #include "insn-config.h" |
0dbd1c74 | 51 | #include "recog.h" |
15bbde2b | 52 | #include "real.h" |
649d8da6 | 53 | #include "obstack.h" |
a3426c4c | 54 | #include "bitmap.h" |
f3d96a58 | 55 | #include "basic-block.h" |
a7b0c170 | 56 | #include "ggc.h" |
b29760a8 | 57 | #include "debug.h" |
649d8da6 | 58 | |
399d45d3 | 59 | /* Commonly used modes. */ |
60 | ||
a92771b8 | 61 | enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */ |
62 | enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */ | |
9e042f31 | 63 | enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */ |
a92771b8 | 64 | enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */ |
399d45d3 | 65 | |
15bbde2b | 66 | |
67 | /* This is *not* reset after each function. It gives each CODE_LABEL | |
68 | in the entire compilation a unique label number. */ | |
69 | ||
70 | static int label_num = 1; | |
71 | ||
15bbde2b | 72 | /* Highest label number in current function. |
73 | Zero means use the value of label_num instead. | |
74 | This is nonzero only when belatedly compiling an inline function. */ | |
75 | ||
76 | static int last_label_num; | |
77 | ||
78 | /* Value label_num had when set_new_first_and_last_label_number was called. | |
79 | If label_num has not changed since then, last_label_num is valid. */ | |
80 | ||
81 | static int base_label_num; | |
82 | ||
83 | /* Nonzero means do not generate NOTEs for source line numbers. */ | |
84 | ||
85 | static int no_line_numbers; | |
86 | ||
87 | /* Commonly used rtx's, so that we only need space for one copy. | |
88 | These are initialized once for the entire compilation. | |
89 | All of these except perhaps the floating-point CONST_DOUBLEs | |
90 | are unique; no other rtx-object will be equal to any of these. */ | |
91 | ||
57c097d5 | 92 | rtx global_rtl[GR_MAX]; |
15bbde2b | 93 | |
94 | /* We record floating-point CONST_DOUBLEs in each floating-point mode for | |
95 | the values of 0, 1, and 2. For the integer entries and VOIDmode, we | |
96 | record a copy of const[012]_rtx. */ | |
97 | ||
98 | rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE]; | |
99 | ||
1a60f06a | 100 | rtx const_true_rtx; |
101 | ||
15bbde2b | 102 | REAL_VALUE_TYPE dconst0; |
103 | REAL_VALUE_TYPE dconst1; | |
104 | REAL_VALUE_TYPE dconst2; | |
105 | REAL_VALUE_TYPE dconstm1; | |
106 | ||
107 | /* All references to the following fixed hard registers go through | |
108 | these unique rtl objects. On machines where the frame-pointer and | |
109 | arg-pointer are the same register, they use the same unique object. | |
110 | ||
111 | After register allocation, other rtl objects which used to be pseudo-regs | |
112 | may be clobbered to refer to the frame-pointer register. | |
113 | But references that were originally to the frame-pointer can be | |
114 | distinguished from the others because they contain frame_pointer_rtx. | |
115 | ||
90c25824 | 116 | When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little |
117 | tricky: until register elimination has taken place hard_frame_pointer_rtx | |
d823ba47 | 118 | should be used if it is being set, and frame_pointer_rtx otherwise. After |
90c25824 | 119 | register elimination hard_frame_pointer_rtx should always be used. |
120 | On machines where the two registers are same (most) then these are the | |
121 | same. | |
122 | ||
15bbde2b | 123 | In an inline procedure, the stack and frame pointer rtxs may not be |
124 | used for anything else. */ | |
15bbde2b | 125 | rtx struct_value_rtx; /* (REG:Pmode STRUCT_VALUE_REGNUM) */ |
126 | rtx struct_value_incoming_rtx; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */ | |
127 | rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */ | |
128 | rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */ | |
129 | rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */ | |
130 | ||
4b0c5859 | 131 | /* This is used to implement __builtin_return_address for some machines. |
132 | See for instance the MIPS port. */ | |
133 | rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */ | |
134 | ||
15bbde2b | 135 | /* We make one copy of (const_int C) where C is in |
136 | [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT] | |
137 | to save space during the compilation and simplify comparisons of | |
138 | integers. */ | |
139 | ||
57c097d5 | 140 | rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1]; |
15bbde2b | 141 | |
73f5c1e3 | 142 | /* A hash table storing CONST_INTs whose absolute value is greater |
143 | than MAX_SAVED_CONST_INT. */ | |
144 | ||
145 | static htab_t const_int_htab; | |
146 | ||
c6259b83 | 147 | /* A hash table storing memory attribute structures. */ |
148 | static htab_t mem_attrs_htab; | |
149 | ||
15bbde2b | 150 | /* start_sequence and gen_sequence can make a lot of rtx expressions which are |
151 | shortly thrown away. We use two mechanisms to prevent this waste: | |
152 | ||
1bfd55c5 | 153 | For sizes up to 5 elements, we keep a SEQUENCE and its associated |
154 | rtvec for use by gen_sequence. One entry for each size is | |
155 | sufficient because most cases are calls to gen_sequence followed by | |
156 | immediately emitting the SEQUENCE. Reuse is safe since emitting a | |
157 | sequence is destructive on the insn in it anyway and hence can't be | |
158 | redone. | |
15bbde2b | 159 | |
160 | We do not bother to save this cached data over nested function calls. | |
161 | Instead, we just reinitialize them. */ | |
162 | ||
163 | #define SEQUENCE_RESULT_SIZE 5 | |
164 | ||
15bbde2b | 165 | static rtx sequence_result[SEQUENCE_RESULT_SIZE]; |
166 | ||
a92771b8 | 167 | /* During RTL generation, we also keep a list of free INSN rtl codes. */ |
575333f9 | 168 | static rtx free_insn; |
169 | ||
08513b52 | 170 | #define first_insn (cfun->emit->x_first_insn) |
171 | #define last_insn (cfun->emit->x_last_insn) | |
172 | #define cur_insn_uid (cfun->emit->x_cur_insn_uid) | |
173 | #define last_linenum (cfun->emit->x_last_linenum) | |
174 | #define last_filename (cfun->emit->x_last_filename) | |
175 | #define first_label_num (cfun->emit->x_first_label_num) | |
15bbde2b | 176 | |
621f6678 | 177 | static rtx make_jump_insn_raw PARAMS ((rtx)); |
178 | static rtx make_call_insn_raw PARAMS ((rtx)); | |
179 | static rtx find_line_note PARAMS ((rtx)); | |
180 | static void mark_sequence_stack PARAMS ((struct sequence_stack *)); | |
96216d37 | 181 | static rtx change_address_1 PARAMS ((rtx, enum machine_mode, rtx, |
182 | int)); | |
2d96a59a | 183 | static void unshare_all_rtl_1 PARAMS ((rtx)); |
72ec8878 | 184 | static void unshare_all_decls PARAMS ((tree)); |
01dc9f0c | 185 | static void reset_used_decls PARAMS ((tree)); |
344dc2fa | 186 | static void mark_label_nuses PARAMS ((rtx)); |
73f5c1e3 | 187 | static hashval_t const_int_htab_hash PARAMS ((const void *)); |
188 | static int const_int_htab_eq PARAMS ((const void *, | |
189 | const void *)); | |
c6259b83 | 190 | static hashval_t mem_attrs_htab_hash PARAMS ((const void *)); |
191 | static int mem_attrs_htab_eq PARAMS ((const void *, | |
192 | const void *)); | |
193 | static void mem_attrs_mark PARAMS ((const void *)); | |
194 | static mem_attrs *get_mem_attrs PARAMS ((HOST_WIDE_INT, tree, rtx, | |
195 | rtx, unsigned int)); | |
73f5c1e3 | 196 | |
3cd757b1 | 197 | /* Probability of the conditional branch currently proceeded by try_split. |
198 | Set to -1 otherwise. */ | |
199 | int split_branch_probability = -1; | |
649d8da6 | 200 | \f |
73f5c1e3 | 201 | /* Returns a hash code for X (which is a really a CONST_INT). */ |
202 | ||
203 | static hashval_t | |
204 | const_int_htab_hash (x) | |
205 | const void *x; | |
206 | { | |
5e431971 | 207 | return (hashval_t) INTVAL ((const struct rtx_def *) x); |
73f5c1e3 | 208 | } |
209 | ||
210 | /* Returns non-zero if the value represented by X (which is really a | |
211 | CONST_INT) is the same as that given by Y (which is really a | |
212 | HOST_WIDE_INT *). */ | |
213 | ||
214 | static int | |
215 | const_int_htab_eq (x, y) | |
216 | const void *x; | |
217 | const void *y; | |
218 | { | |
5e431971 | 219 | return (INTVAL ((const struct rtx_def *) x) == *((const HOST_WIDE_INT *) y)); |
73f5c1e3 | 220 | } |
221 | ||
c6259b83 | 222 | /* Returns a hash code for X (which is a really a mem_attrs *). */ |
223 | ||
224 | static hashval_t | |
225 | mem_attrs_htab_hash (x) | |
226 | const void *x; | |
227 | { | |
228 | mem_attrs *p = (mem_attrs *) x; | |
229 | ||
230 | return (p->alias ^ (p->align * 1000) | |
231 | ^ ((p->offset ? INTVAL (p->offset) : 0) * 50000) | |
232 | ^ ((p->size ? INTVAL (p->size) : 0) * 2500000) | |
233 | ^ (long) p->decl); | |
234 | } | |
235 | ||
236 | /* Returns non-zero if the value represented by X (which is really a | |
237 | mem_attrs *) is the same as that given by Y (which is also really a | |
238 | mem_attrs *). */ | |
73f5c1e3 | 239 | |
240 | static int | |
c6259b83 | 241 | mem_attrs_htab_eq (x, y) |
242 | const void *x; | |
243 | const void *y; | |
73f5c1e3 | 244 | { |
c6259b83 | 245 | mem_attrs *p = (mem_attrs *) x; |
246 | mem_attrs *q = (mem_attrs *) y; | |
247 | ||
248 | return (p->alias == q->alias && p->decl == q->decl && p->offset == q->offset | |
249 | && p->size == q->size && p->align == q->align); | |
73f5c1e3 | 250 | } |
251 | ||
c6259b83 | 252 | /* This routine is called when we determine that we need a mem_attrs entry. |
253 | It marks the associated decl and RTL as being used, if present. */ | |
73f5c1e3 | 254 | |
255 | static void | |
c6259b83 | 256 | mem_attrs_mark (x) |
257 | const void *x; | |
73f5c1e3 | 258 | { |
c6259b83 | 259 | mem_attrs *p = (mem_attrs *) x; |
260 | ||
261 | if (p->decl) | |
262 | ggc_mark_tree (p->decl); | |
263 | ||
264 | if (p->offset) | |
265 | ggc_mark_rtx (p->offset); | |
266 | ||
267 | if (p->size) | |
268 | ggc_mark_rtx (p->size); | |
269 | } | |
270 | ||
271 | /* Allocate a new mem_attrs structure and insert it into the hash table if | |
272 | one identical to it is not already in the table. */ | |
273 | ||
274 | static mem_attrs * | |
275 | get_mem_attrs (alias, decl, offset, size, align) | |
276 | HOST_WIDE_INT alias; | |
277 | tree decl; | |
278 | rtx offset; | |
279 | rtx size; | |
280 | unsigned int align; | |
281 | { | |
282 | mem_attrs attrs; | |
283 | void **slot; | |
284 | ||
285 | attrs.alias = alias; | |
286 | attrs.decl = decl; | |
287 | attrs.offset = offset; | |
288 | attrs.size = size; | |
289 | attrs.align = align; | |
290 | ||
291 | slot = htab_find_slot (mem_attrs_htab, &attrs, INSERT); | |
292 | if (*slot == 0) | |
293 | { | |
294 | *slot = ggc_alloc (sizeof (mem_attrs)); | |
295 | memcpy (*slot, &attrs, sizeof (mem_attrs)); | |
296 | } | |
297 | ||
298 | return *slot; | |
73f5c1e3 | 299 | } |
300 | ||
22cf44bc | 301 | /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and |
302 | don't attempt to share with the various global pieces of rtl (such as | |
303 | frame_pointer_rtx). */ | |
304 | ||
305 | rtx | |
306 | gen_raw_REG (mode, regno) | |
307 | enum machine_mode mode; | |
308 | int regno; | |
309 | { | |
310 | rtx x = gen_rtx_raw_REG (mode, regno); | |
311 | ORIGINAL_REGNO (x) = regno; | |
312 | return x; | |
313 | } | |
314 | ||
7014838c | 315 | /* There are some RTL codes that require special attention; the generation |
316 | functions do the raw handling. If you add to this list, modify | |
317 | special_rtx in gengenrtl.c as well. */ | |
318 | ||
3ad7bb1c | 319 | rtx |
320 | gen_rtx_CONST_INT (mode, arg) | |
73f5c1e3 | 321 | enum machine_mode mode ATTRIBUTE_UNUSED; |
3ad7bb1c | 322 | HOST_WIDE_INT arg; |
323 | { | |
73f5c1e3 | 324 | void **slot; |
325 | ||
3ad7bb1c | 326 | if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT) |
57c097d5 | 327 | return const_int_rtx[arg + MAX_SAVED_CONST_INT]; |
3ad7bb1c | 328 | |
329 | #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1 | |
330 | if (const_true_rtx && arg == STORE_FLAG_VALUE) | |
331 | return const_true_rtx; | |
332 | #endif | |
333 | ||
73f5c1e3 | 334 | /* Look up the CONST_INT in the hash table. */ |
2b3dbc20 | 335 | slot = htab_find_slot_with_hash (const_int_htab, &arg, |
336 | (hashval_t) arg, INSERT); | |
7f2875d3 | 337 | if (*slot == 0) |
d7c47c0e | 338 | *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg); |
73f5c1e3 | 339 | |
340 | return (rtx) *slot; | |
3ad7bb1c | 341 | } |
342 | ||
7f2875d3 | 343 | /* CONST_DOUBLEs needs special handling because their length is known |
67f2a2eb | 344 | only at run-time. */ |
7f2875d3 | 345 | |
67f2a2eb | 346 | rtx |
347 | gen_rtx_CONST_DOUBLE (mode, arg0, arg1, arg2) | |
348 | enum machine_mode mode; | |
349 | rtx arg0; | |
350 | HOST_WIDE_INT arg1, arg2; | |
351 | { | |
352 | rtx r = rtx_alloc (CONST_DOUBLE); | |
4e929432 | 353 | int i; |
354 | ||
67f2a2eb | 355 | PUT_MODE (r, mode); |
356 | XEXP (r, 0) = arg0; | |
25999090 | 357 | X0EXP (r, 1) = NULL_RTX; |
4e929432 | 358 | XWINT (r, 2) = arg1; |
359 | XWINT (r, 3) = arg2; | |
360 | ||
361 | for (i = GET_RTX_LENGTH (CONST_DOUBLE) - 1; i > 3; --i) | |
362 | XWINT (r, i) = 0; | |
363 | ||
67f2a2eb | 364 | return r; |
365 | } | |
366 | ||
3ad7bb1c | 367 | rtx |
368 | gen_rtx_REG (mode, regno) | |
369 | enum machine_mode mode; | |
370 | int regno; | |
371 | { | |
372 | /* In case the MD file explicitly references the frame pointer, have | |
373 | all such references point to the same frame pointer. This is | |
374 | used during frame pointer elimination to distinguish the explicit | |
375 | references to these registers from pseudos that happened to be | |
376 | assigned to them. | |
377 | ||
378 | If we have eliminated the frame pointer or arg pointer, we will | |
379 | be using it as a normal register, for example as a spill | |
380 | register. In such cases, we might be accessing it in a mode that | |
381 | is not Pmode and therefore cannot use the pre-allocated rtx. | |
382 | ||
383 | Also don't do this when we are making new REGs in reload, since | |
384 | we don't want to get confused with the real pointers. */ | |
385 | ||
386 | if (mode == Pmode && !reload_in_progress) | |
387 | { | |
e8b59353 | 388 | if (regno == FRAME_POINTER_REGNUM) |
3ad7bb1c | 389 | return frame_pointer_rtx; |
390 | #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM | |
e8b59353 | 391 | if (regno == HARD_FRAME_POINTER_REGNUM) |
3ad7bb1c | 392 | return hard_frame_pointer_rtx; |
393 | #endif | |
394 | #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM | |
e8b59353 | 395 | if (regno == ARG_POINTER_REGNUM) |
3ad7bb1c | 396 | return arg_pointer_rtx; |
397 | #endif | |
398 | #ifdef RETURN_ADDRESS_POINTER_REGNUM | |
e8b59353 | 399 | if (regno == RETURN_ADDRESS_POINTER_REGNUM) |
3ad7bb1c | 400 | return return_address_pointer_rtx; |
401 | #endif | |
e8b59353 | 402 | if (regno == STACK_POINTER_REGNUM) |
3ad7bb1c | 403 | return stack_pointer_rtx; |
404 | } | |
405 | ||
22cf44bc | 406 | return gen_raw_REG (mode, regno); |
3ad7bb1c | 407 | } |
408 | ||
b5ba9f3a | 409 | rtx |
410 | gen_rtx_MEM (mode, addr) | |
411 | enum machine_mode mode; | |
412 | rtx addr; | |
413 | { | |
414 | rtx rt = gen_rtx_raw_MEM (mode, addr); | |
415 | ||
416 | /* This field is not cleared by the mere allocation of the rtx, so | |
417 | we clear it here. */ | |
c6259b83 | 418 | MEM_ATTRS (rt) = 0; |
b5ba9f3a | 419 | |
420 | return rt; | |
421 | } | |
701e46d0 | 422 | |
423 | rtx | |
424 | gen_rtx_SUBREG (mode, reg, offset) | |
425 | enum machine_mode mode; | |
426 | rtx reg; | |
427 | int offset; | |
428 | { | |
429 | /* This is the most common failure type. | |
430 | Catch it early so we can see who does it. */ | |
431 | if ((offset % GET_MODE_SIZE (mode)) != 0) | |
432 | abort (); | |
433 | ||
434 | /* This check isn't usable right now because combine will | |
435 | throw arbitrary crap like a CALL into a SUBREG in | |
436 | gen_lowpart_for_combine so we must just eat it. */ | |
437 | #if 0 | |
438 | /* Check for this too. */ | |
439 | if (offset >= GET_MODE_SIZE (GET_MODE (reg))) | |
440 | abort (); | |
441 | #endif | |
442 | return gen_rtx_fmt_ei (SUBREG, mode, reg, offset); | |
443 | } | |
444 | ||
c6259b83 | 445 | /* Generate a SUBREG representing the least-significant part of REG if MODE |
446 | is smaller than mode of REG, otherwise paradoxical SUBREG. */ | |
447 | ||
701e46d0 | 448 | rtx |
449 | gen_lowpart_SUBREG (mode, reg) | |
450 | enum machine_mode mode; | |
451 | rtx reg; | |
452 | { | |
453 | enum machine_mode inmode; | |
701e46d0 | 454 | |
455 | inmode = GET_MODE (reg); | |
456 | if (inmode == VOIDmode) | |
457 | inmode = mode; | |
81802af6 | 458 | return gen_rtx_SUBREG (mode, reg, |
459 | subreg_lowpart_offset (mode, inmode)); | |
701e46d0 | 460 | } |
7014838c | 461 | \f |
15bbde2b | 462 | /* rtx gen_rtx (code, mode, [element1, ..., elementn]) |
463 | ** | |
464 | ** This routine generates an RTX of the size specified by | |
465 | ** <code>, which is an RTX code. The RTX structure is initialized | |
466 | ** from the arguments <element1> through <elementn>, which are | |
467 | ** interpreted according to the specific RTX type's format. The | |
468 | ** special machine mode associated with the rtx (if any) is specified | |
469 | ** in <mode>. | |
470 | ** | |
fc92fa61 | 471 | ** gen_rtx can be invoked in a way which resembles the lisp-like |
15bbde2b | 472 | ** rtx it will generate. For example, the following rtx structure: |
473 | ** | |
474 | ** (plus:QI (mem:QI (reg:SI 1)) | |
475 | ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3)))) | |
476 | ** | |
477 | ** ...would be generated by the following C code: | |
478 | ** | |
d823ba47 | 479 | ** gen_rtx (PLUS, QImode, |
15bbde2b | 480 | ** gen_rtx (MEM, QImode, |
481 | ** gen_rtx (REG, SImode, 1)), | |
482 | ** gen_rtx (MEM, QImode, | |
483 | ** gen_rtx (PLUS, SImode, | |
484 | ** gen_rtx (REG, SImode, 2), | |
485 | ** gen_rtx (REG, SImode, 3)))), | |
486 | */ | |
487 | ||
488 | /*VARARGS2*/ | |
489 | rtx | |
621f6678 | 490 | gen_rtx VPARAMS ((enum rtx_code code, enum machine_mode mode, ...)) |
15bbde2b | 491 | { |
19cb6b50 | 492 | int i; /* Array indices... */ |
493 | const char *fmt; /* Current rtx's format... */ | |
494 | rtx rt_val; /* RTX to return to caller... */ | |
15bbde2b | 495 | |
0903457a | 496 | VA_OPEN (p, mode); |
497 | VA_FIXEDARG (p, enum rtx_code, code); | |
498 | VA_FIXEDARG (p, enum machine_mode, mode); | |
15bbde2b | 499 | |
67f2a2eb | 500 | switch (code) |
15bbde2b | 501 | { |
67f2a2eb | 502 | case CONST_INT: |
503 | rt_val = gen_rtx_CONST_INT (mode, va_arg (p, HOST_WIDE_INT)); | |
504 | break; | |
505 | ||
506 | case CONST_DOUBLE: | |
507 | { | |
508 | rtx arg0 = va_arg (p, rtx); | |
509 | HOST_WIDE_INT arg1 = va_arg (p, HOST_WIDE_INT); | |
510 | HOST_WIDE_INT arg2 = va_arg (p, HOST_WIDE_INT); | |
511 | rt_val = gen_rtx_CONST_DOUBLE (mode, arg0, arg1, arg2); | |
512 | } | |
513 | break; | |
514 | ||
515 | case REG: | |
516 | rt_val = gen_rtx_REG (mode, va_arg (p, int)); | |
517 | break; | |
518 | ||
519 | case MEM: | |
520 | rt_val = gen_rtx_MEM (mode, va_arg (p, rtx)); | |
521 | break; | |
522 | ||
523 | default: | |
15bbde2b | 524 | rt_val = rtx_alloc (code); /* Allocate the storage space. */ |
525 | rt_val->mode = mode; /* Store the machine mode... */ | |
526 | ||
527 | fmt = GET_RTX_FORMAT (code); /* Find the right format... */ | |
528 | for (i = 0; i < GET_RTX_LENGTH (code); i++) | |
529 | { | |
530 | switch (*fmt++) | |
531 | { | |
532 | case '0': /* Unused field. */ | |
533 | break; | |
534 | ||
535 | case 'i': /* An integer? */ | |
536 | XINT (rt_val, i) = va_arg (p, int); | |
537 | break; | |
538 | ||
b572011e | 539 | case 'w': /* A wide integer? */ |
540 | XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT); | |
541 | break; | |
542 | ||
15bbde2b | 543 | case 's': /* A string? */ |
544 | XSTR (rt_val, i) = va_arg (p, char *); | |
545 | break; | |
546 | ||
547 | case 'e': /* An expression? */ | |
548 | case 'u': /* An insn? Same except when printing. */ | |
549 | XEXP (rt_val, i) = va_arg (p, rtx); | |
550 | break; | |
551 | ||
552 | case 'E': /* An RTX vector? */ | |
553 | XVEC (rt_val, i) = va_arg (p, rtvec); | |
554 | break; | |
555 | ||
a3426c4c | 556 | case 'b': /* A bitmap? */ |
557 | XBITMAP (rt_val, i) = va_arg (p, bitmap); | |
558 | break; | |
559 | ||
560 | case 't': /* A tree? */ | |
561 | XTREE (rt_val, i) = va_arg (p, tree); | |
562 | break; | |
563 | ||
15bbde2b | 564 | default: |
fc92fa61 | 565 | abort (); |
15bbde2b | 566 | } |
567 | } | |
67f2a2eb | 568 | break; |
15bbde2b | 569 | } |
67f2a2eb | 570 | |
0903457a | 571 | VA_CLOSE (p); |
67f2a2eb | 572 | return rt_val; |
15bbde2b | 573 | } |
574 | ||
575 | /* gen_rtvec (n, [rt1, ..., rtn]) | |
576 | ** | |
577 | ** This routine creates an rtvec and stores within it the | |
578 | ** pointers to rtx's which are its arguments. | |
579 | */ | |
580 | ||
581 | /*VARARGS1*/ | |
582 | rtvec | |
621f6678 | 583 | gen_rtvec VPARAMS ((int n, ...)) |
15bbde2b | 584 | { |
7ad77798 | 585 | int i, save_n; |
15bbde2b | 586 | rtx *vector; |
587 | ||
0903457a | 588 | VA_OPEN (p, n); |
589 | VA_FIXEDARG (p, int, n); | |
15bbde2b | 590 | |
591 | if (n == 0) | |
592 | return NULL_RTVEC; /* Don't allocate an empty rtvec... */ | |
593 | ||
594 | vector = (rtx *) alloca (n * sizeof (rtx)); | |
e5fcd76a | 595 | |
15bbde2b | 596 | for (i = 0; i < n; i++) |
597 | vector[i] = va_arg (p, rtx); | |
7ad77798 | 598 | |
599 | /* The definition of VA_* in K&R C causes `n' to go out of scope. */ | |
600 | save_n = n; | |
0903457a | 601 | VA_CLOSE (p); |
15bbde2b | 602 | |
7ad77798 | 603 | return gen_rtvec_v (save_n, vector); |
15bbde2b | 604 | } |
605 | ||
606 | rtvec | |
607 | gen_rtvec_v (n, argp) | |
608 | int n; | |
609 | rtx *argp; | |
610 | { | |
19cb6b50 | 611 | int i; |
612 | rtvec rt_val; | |
15bbde2b | 613 | |
614 | if (n == 0) | |
615 | return NULL_RTVEC; /* Don't allocate an empty rtvec... */ | |
616 | ||
617 | rt_val = rtvec_alloc (n); /* Allocate an rtvec... */ | |
618 | ||
619 | for (i = 0; i < n; i++) | |
a4070a91 | 620 | rt_val->elem[i] = *argp++; |
15bbde2b | 621 | |
622 | return rt_val; | |
623 | } | |
624 | \f | |
625 | /* Generate a REG rtx for a new pseudo register of mode MODE. | |
626 | This pseudo is assigned the next sequential register number. */ | |
627 | ||
628 | rtx | |
629 | gen_reg_rtx (mode) | |
630 | enum machine_mode mode; | |
631 | { | |
08513b52 | 632 | struct function *f = cfun; |
19cb6b50 | 633 | rtx val; |
15bbde2b | 634 | |
9e519b97 | 635 | /* Don't let anything called after initial flow analysis create new |
636 | registers. */ | |
637 | if (no_new_pseudos) | |
15bbde2b | 638 | abort (); |
639 | ||
316bc009 | 640 | if (generating_concat_p |
641 | && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT | |
642 | || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT)) | |
76c37538 | 643 | { |
644 | /* For complex modes, don't make a single pseudo. | |
645 | Instead, make a CONCAT of two pseudos. | |
646 | This allows noncontiguous allocation of the real and imaginary parts, | |
647 | which makes much better code. Besides, allocating DCmode | |
648 | pseudos overstrains reload on some machines like the 386. */ | |
649 | rtx realpart, imagpart; | |
650 | int size = GET_MODE_UNIT_SIZE (mode); | |
651 | enum machine_mode partmode | |
652 | = mode_for_size (size * BITS_PER_UNIT, | |
653 | (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT | |
654 | ? MODE_FLOAT : MODE_INT), | |
655 | 0); | |
656 | ||
657 | realpart = gen_reg_rtx (partmode); | |
658 | imagpart = gen_reg_rtx (partmode); | |
3ad7bb1c | 659 | return gen_rtx_CONCAT (mode, realpart, imagpart); |
76c37538 | 660 | } |
661 | ||
fcdc122e | 662 | /* Make sure regno_pointer_align, regno_decl, and regno_reg_rtx are large |
663 | enough to have an element for this pseudo reg number. */ | |
15bbde2b | 664 | |
e61a0a7f | 665 | if (reg_rtx_no == f->emit->regno_pointer_align_length) |
15bbde2b | 666 | { |
e61a0a7f | 667 | int old_size = f->emit->regno_pointer_align_length; |
26df1c5e | 668 | char *new; |
fcdc122e | 669 | rtx *new1; |
670 | tree *new2; | |
671 | ||
26df1c5e | 672 | new = xrealloc (f->emit->regno_pointer_align, old_size * 2); |
0a893c29 | 673 | memset (new + old_size, 0, old_size); |
4491f79f | 674 | f->emit->regno_pointer_align = (unsigned char *) new; |
0a893c29 | 675 | |
26df1c5e | 676 | new1 = (rtx *) xrealloc (f->emit->x_regno_reg_rtx, |
677 | old_size * 2 * sizeof (rtx)); | |
0a893c29 | 678 | memset (new1 + old_size, 0, old_size * sizeof (rtx)); |
15bbde2b | 679 | regno_reg_rtx = new1; |
680 | ||
fcdc122e | 681 | new2 = (tree *) xrealloc (f->emit->regno_decl, |
682 | old_size * 2 * sizeof (tree)); | |
683 | memset (new2 + old_size, 0, old_size * sizeof (tree)); | |
684 | f->emit->regno_decl = new2; | |
685 | ||
e61a0a7f | 686 | f->emit->regno_pointer_align_length = old_size * 2; |
15bbde2b | 687 | } |
688 | ||
22cf44bc | 689 | val = gen_raw_REG (mode, reg_rtx_no); |
15bbde2b | 690 | regno_reg_rtx[reg_rtx_no++] = val; |
691 | return val; | |
692 | } | |
693 | ||
de8ecfb5 | 694 | /* Identify REG (which may be a CONCAT) as a user register. */ |
695 | ||
696 | void | |
697 | mark_user_reg (reg) | |
698 | rtx reg; | |
699 | { | |
700 | if (GET_CODE (reg) == CONCAT) | |
701 | { | |
702 | REG_USERVAR_P (XEXP (reg, 0)) = 1; | |
703 | REG_USERVAR_P (XEXP (reg, 1)) = 1; | |
704 | } | |
705 | else if (GET_CODE (reg) == REG) | |
706 | REG_USERVAR_P (reg) = 1; | |
707 | else | |
708 | abort (); | |
709 | } | |
710 | ||
d4c332ff | 711 | /* Identify REG as a probable pointer register and show its alignment |
712 | as ALIGN, if nonzero. */ | |
15bbde2b | 713 | |
714 | void | |
d4c332ff | 715 | mark_reg_pointer (reg, align) |
15bbde2b | 716 | rtx reg; |
d4c332ff | 717 | int align; |
15bbde2b | 718 | { |
e61a0a7f | 719 | if (! REG_POINTER (reg)) |
612409a6 | 720 | { |
e61a0a7f | 721 | REG_POINTER (reg) = 1; |
d4c332ff | 722 | |
612409a6 | 723 | if (align) |
724 | REGNO_POINTER_ALIGN (REGNO (reg)) = align; | |
725 | } | |
726 | else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg))) | |
727 | /* We can no-longer be sure just how aligned this pointer is */ | |
d4c332ff | 728 | REGNO_POINTER_ALIGN (REGNO (reg)) = align; |
15bbde2b | 729 | } |
730 | ||
731 | /* Return 1 plus largest pseudo reg number used in the current function. */ | |
732 | ||
733 | int | |
734 | max_reg_num () | |
735 | { | |
736 | return reg_rtx_no; | |
737 | } | |
738 | ||
739 | /* Return 1 + the largest label number used so far in the current function. */ | |
740 | ||
741 | int | |
742 | max_label_num () | |
743 | { | |
744 | if (last_label_num && label_num == base_label_num) | |
745 | return last_label_num; | |
746 | return label_num; | |
747 | } | |
748 | ||
749 | /* Return first label number used in this function (if any were used). */ | |
750 | ||
751 | int | |
752 | get_first_label_num () | |
753 | { | |
754 | return first_label_num; | |
755 | } | |
756 | \f | |
701e46d0 | 757 | /* Return the final regno of X, which is a SUBREG of a hard |
758 | register. */ | |
759 | int | |
760 | subreg_hard_regno (x, check_mode) | |
19cb6b50 | 761 | rtx x; |
701e46d0 | 762 | int check_mode; |
763 | { | |
764 | enum machine_mode mode = GET_MODE (x); | |
765 | unsigned int byte_offset, base_regno, final_regno; | |
766 | rtx reg = SUBREG_REG (x); | |
767 | ||
768 | /* This is where we attempt to catch illegal subregs | |
769 | created by the compiler. */ | |
770 | if (GET_CODE (x) != SUBREG | |
771 | || GET_CODE (reg) != REG) | |
772 | abort (); | |
773 | base_regno = REGNO (reg); | |
774 | if (base_regno >= FIRST_PSEUDO_REGISTER) | |
775 | abort (); | |
475fa9bd | 776 | if (check_mode && ! HARD_REGNO_MODE_OK (base_regno, GET_MODE (reg))) |
701e46d0 | 777 | abort (); |
778 | ||
779 | /* Catch non-congruent offsets too. */ | |
780 | byte_offset = SUBREG_BYTE (x); | |
781 | if ((byte_offset % GET_MODE_SIZE (mode)) != 0) | |
782 | abort (); | |
783 | ||
784 | final_regno = subreg_regno (x); | |
785 | ||
786 | return final_regno; | |
787 | } | |
788 | ||
15bbde2b | 789 | /* Return a value representing some low-order bits of X, where the number |
790 | of low-order bits is given by MODE. Note that no conversion is done | |
d823ba47 | 791 | between floating-point and fixed-point values, rather, the bit |
15bbde2b | 792 | representation is returned. |
793 | ||
794 | This function handles the cases in common between gen_lowpart, below, | |
795 | and two variants in cse.c and combine.c. These are the cases that can | |
796 | be safely handled at all points in the compilation. | |
797 | ||
798 | If this is not a case we can handle, return 0. */ | |
799 | ||
800 | rtx | |
801 | gen_lowpart_common (mode, x) | |
802 | enum machine_mode mode; | |
19cb6b50 | 803 | rtx x; |
15bbde2b | 804 | { |
701e46d0 | 805 | int msize = GET_MODE_SIZE (mode); |
806 | int xsize = GET_MODE_SIZE (GET_MODE (x)); | |
807 | int offset = 0; | |
15bbde2b | 808 | |
809 | if (GET_MODE (x) == mode) | |
810 | return x; | |
811 | ||
812 | /* MODE must occupy no more words than the mode of X. */ | |
813 | if (GET_MODE (x) != VOIDmode | |
701e46d0 | 814 | && ((msize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD |
815 | > ((xsize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))) | |
15bbde2b | 816 | return 0; |
817 | ||
81802af6 | 818 | offset = subreg_lowpart_offset (mode, GET_MODE (x)); |
15bbde2b | 819 | |
820 | if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND) | |
64115b39 | 821 | && (GET_MODE_CLASS (mode) == MODE_INT |
822 | || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)) | |
15bbde2b | 823 | { |
824 | /* If we are getting the low-order part of something that has been | |
825 | sign- or zero-extended, we can either just use the object being | |
826 | extended or make a narrower extension. If we want an even smaller | |
827 | piece than the size of the object being extended, call ourselves | |
828 | recursively. | |
829 | ||
830 | This case is used mostly by combine and cse. */ | |
831 | ||
832 | if (GET_MODE (XEXP (x, 0)) == mode) | |
833 | return XEXP (x, 0); | |
834 | else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (XEXP (x, 0)))) | |
835 | return gen_lowpart_common (mode, XEXP (x, 0)); | |
836 | else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (x))) | |
3ad7bb1c | 837 | return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0)); |
15bbde2b | 838 | } |
3c27c2b2 | 839 | else if (GET_CODE (x) == SUBREG || GET_CODE (x) == REG |
840 | || GET_CODE (x) == CONCAT) | |
81802af6 | 841 | return simplify_gen_subreg (mode, x, GET_MODE (x), offset); |
15bbde2b | 842 | /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits |
843 | from the low-order part of the constant. */ | |
64115b39 | 844 | else if ((GET_MODE_CLASS (mode) == MODE_INT |
845 | || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT) | |
846 | && GET_MODE (x) == VOIDmode | |
15bbde2b | 847 | && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)) |
99e0010b | 848 | { |
849 | /* If MODE is twice the host word size, X is already the desired | |
850 | representation. Otherwise, if MODE is wider than a word, we can't | |
b3b27b2a | 851 | do this. If MODE is exactly a word, return just one CONST_INT. */ |
99e0010b | 852 | |
d347deeb | 853 | if (GET_MODE_BITSIZE (mode) >= 2 * HOST_BITS_PER_WIDE_INT) |
99e0010b | 854 | return x; |
b572011e | 855 | else if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT) |
99e0010b | 856 | return 0; |
b572011e | 857 | else if (GET_MODE_BITSIZE (mode) == HOST_BITS_PER_WIDE_INT) |
99e0010b | 858 | return (GET_CODE (x) == CONST_INT ? x |
b572011e | 859 | : GEN_INT (CONST_DOUBLE_LOW (x))); |
99e0010b | 860 | else |
861 | { | |
a0d52dee | 862 | /* MODE must be narrower than HOST_BITS_PER_WIDE_INT. */ |
b572011e | 863 | HOST_WIDE_INT val = (GET_CODE (x) == CONST_INT ? INTVAL (x) |
864 | : CONST_DOUBLE_LOW (x)); | |
99e0010b | 865 | |
a0d52dee | 866 | /* Sign extend to HOST_WIDE_INT. */ |
b3b27b2a | 867 | val = trunc_int_for_mode (val, mode); |
99e0010b | 868 | |
869 | return (GET_CODE (x) == CONST_INT && INTVAL (x) == val ? x | |
b572011e | 870 | : GEN_INT (val)); |
99e0010b | 871 | } |
872 | } | |
15bbde2b | 873 | |
c8971cad | 874 | #ifndef REAL_ARITHMETIC |
4a307dd5 | 875 | /* If X is an integral constant but we want it in floating-point, it |
876 | must be the case that we have a union of an integer and a floating-point | |
877 | value. If the machine-parameters allow it, simulate that union here | |
d823ba47 | 878 | and return the result. The two-word and single-word cases are |
414a3664 | 879 | different. */ |
4a307dd5 | 880 | |
f51cb679 | 881 | else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT |
b572011e | 882 | && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD) |
f51cb679 | 883 | || flag_pretend_float) |
4a307dd5 | 884 | && GET_MODE_CLASS (mode) == MODE_FLOAT |
414a3664 | 885 | && GET_MODE_SIZE (mode) == UNITS_PER_WORD |
886 | && GET_CODE (x) == CONST_INT | |
b572011e | 887 | && sizeof (float) * HOST_BITS_PER_CHAR == HOST_BITS_PER_WIDE_INT) |
414a3664 | 888 | { |
b572011e | 889 | union {HOST_WIDE_INT i; float d; } u; |
414a3664 | 890 | |
891 | u.i = INTVAL (x); | |
715907c0 | 892 | return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode); |
414a3664 | 893 | } |
414a3664 | 894 | else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT |
b572011e | 895 | && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD) |
414a3664 | 896 | || flag_pretend_float) |
897 | && GET_MODE_CLASS (mode) == MODE_FLOAT | |
898 | && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD | |
4a307dd5 | 899 | && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE) |
900 | && GET_MODE (x) == VOIDmode | |
b572011e | 901 | && (sizeof (double) * HOST_BITS_PER_CHAR |
902 | == 2 * HOST_BITS_PER_WIDE_INT)) | |
4a307dd5 | 903 | { |
b572011e | 904 | union {HOST_WIDE_INT i[2]; double d; } u; |
905 | HOST_WIDE_INT low, high; | |
4a307dd5 | 906 | |
907 | if (GET_CODE (x) == CONST_INT) | |
b572011e | 908 | low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1); |
4a307dd5 | 909 | else |
910 | low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x); | |
911 | ||
912 | #ifdef HOST_WORDS_BIG_ENDIAN | |
913 | u.i[0] = high, u.i[1] = low; | |
914 | #else | |
915 | u.i[0] = low, u.i[1] = high; | |
916 | #endif | |
917 | ||
715907c0 | 918 | return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode); |
4a307dd5 | 919 | } |
e21bed9e | 920 | |
f51cb679 | 921 | /* Similarly, if this is converting a floating-point value into a |
922 | single-word integer. Only do this is the host and target parameters are | |
923 | compatible. */ | |
924 | ||
925 | else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT | |
b572011e | 926 | && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD) |
f51cb679 | 927 | || flag_pretend_float) |
64115b39 | 928 | && (GET_MODE_CLASS (mode) == MODE_INT |
929 | || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT) | |
f51cb679 | 930 | && GET_CODE (x) == CONST_DOUBLE |
931 | && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT | |
932 | && GET_MODE_BITSIZE (mode) == BITS_PER_WORD) | |
701e46d0 | 933 | return constant_subword (x, (offset / UNITS_PER_WORD), GET_MODE (x)); |
f51cb679 | 934 | |
4a307dd5 | 935 | /* Similarly, if this is converting a floating-point value into a |
936 | two-word integer, we can do this one word at a time and make an | |
937 | integer. Only do this is the host and target parameters are | |
938 | compatible. */ | |
939 | ||
f51cb679 | 940 | else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT |
b572011e | 941 | && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD) |
f51cb679 | 942 | || flag_pretend_float) |
64115b39 | 943 | && (GET_MODE_CLASS (mode) == MODE_INT |
6ff0332a | 944 | || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT) |
4a307dd5 | 945 | && GET_CODE (x) == CONST_DOUBLE |
946 | && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT | |
947 | && GET_MODE_BITSIZE (mode) == 2 * BITS_PER_WORD) | |
948 | { | |
701e46d0 | 949 | rtx lowpart, highpart; |
950 | ||
951 | lowpart = constant_subword (x, | |
952 | (offset / UNITS_PER_WORD) + WORDS_BIG_ENDIAN, | |
953 | GET_MODE (x)); | |
954 | highpart = constant_subword (x, | |
955 | (offset / UNITS_PER_WORD) + (! WORDS_BIG_ENDIAN), | |
956 | GET_MODE (x)); | |
4a307dd5 | 957 | if (lowpart && GET_CODE (lowpart) == CONST_INT |
958 | && highpart && GET_CODE (highpart) == CONST_INT) | |
959 | return immed_double_const (INTVAL (lowpart), INTVAL (highpart), mode); | |
960 | } | |
c8971cad | 961 | #else /* ifndef REAL_ARITHMETIC */ |
962 | ||
963 | /* When we have a FP emulator, we can handle all conversions between | |
964 | FP and integer operands. This simplifies reload because it | |
965 | doesn't have to deal with constructs like (subreg:DI | |
966 | (const_double:SF ...)) or (subreg:DF (const_int ...)). */ | |
7547817f | 967 | /* Single-precision floats are always 32-bits and double-precision |
968 | floats are always 64-bits. */ | |
c8971cad | 969 | |
3c27c2b2 | 970 | else if (GET_MODE_CLASS (mode) == MODE_FLOAT |
7547817f | 971 | && GET_MODE_BITSIZE (mode) == 32 |
c8971cad | 972 | && GET_CODE (x) == CONST_INT) |
3c27c2b2 | 973 | { |
c8971cad | 974 | REAL_VALUE_TYPE r; |
975 | HOST_WIDE_INT i; | |
976 | ||
977 | i = INTVAL (x); | |
978 | r = REAL_VALUE_FROM_TARGET_SINGLE (i); | |
979 | return CONST_DOUBLE_FROM_REAL_VALUE (r, mode); | |
3c27c2b2 | 980 | } |
981 | else if (GET_MODE_CLASS (mode) == MODE_FLOAT | |
7547817f | 982 | && GET_MODE_BITSIZE (mode) == 64 |
c8971cad | 983 | && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE) |
984 | && GET_MODE (x) == VOIDmode) | |
985 | { | |
986 | REAL_VALUE_TYPE r; | |
987 | HOST_WIDE_INT i[2]; | |
988 | HOST_WIDE_INT low, high; | |
989 | ||
990 | if (GET_CODE (x) == CONST_INT) | |
991 | { | |
992 | low = INTVAL (x); | |
993 | high = low >> (HOST_BITS_PER_WIDE_INT - 1); | |
994 | } | |
995 | else | |
996 | { | |
d823ba47 | 997 | low = CONST_DOUBLE_LOW (x); |
c8971cad | 998 | high = CONST_DOUBLE_HIGH (x); |
999 | } | |
1000 | ||
1001 | /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the | |
1002 | target machine. */ | |
1003 | if (WORDS_BIG_ENDIAN) | |
1004 | i[0] = high, i[1] = low; | |
1005 | else | |
1006 | i[0] = low, i[1] = high; | |
1007 | ||
1008 | r = REAL_VALUE_FROM_TARGET_DOUBLE (i); | |
1009 | return CONST_DOUBLE_FROM_REAL_VALUE (r, mode); | |
1010 | } | |
1011 | else if ((GET_MODE_CLASS (mode) == MODE_INT | |
1012 | || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT) | |
1013 | && GET_CODE (x) == CONST_DOUBLE | |
1014 | && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT) | |
1015 | { | |
1016 | REAL_VALUE_TYPE r; | |
1017 | long i[4]; /* Only the low 32 bits of each 'long' are used. */ | |
1018 | int endian = WORDS_BIG_ENDIAN ? 1 : 0; | |
1019 | ||
1020 | REAL_VALUE_FROM_CONST_DOUBLE (r, x); | |
7547817f | 1021 | switch (GET_MODE_BITSIZE (GET_MODE (x))) |
c8971cad | 1022 | { |
7547817f | 1023 | case 32: |
c8971cad | 1024 | REAL_VALUE_TO_TARGET_SINGLE (r, i[endian]); |
a774762c | 1025 | i[1 - endian] = 0; |
c8971cad | 1026 | break; |
7547817f | 1027 | case 64: |
c8971cad | 1028 | REAL_VALUE_TO_TARGET_DOUBLE (r, i); |
1029 | break; | |
7547817f | 1030 | case 96: |
3f980cf7 | 1031 | REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i + endian); |
1032 | i[3-3*endian] = 0; | |
3c27c2b2 | 1033 | break; |
7547817f | 1034 | case 128: |
c8971cad | 1035 | REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i); |
1036 | break; | |
1037 | default: | |
a774762c | 1038 | abort (); |
c8971cad | 1039 | } |
1040 | ||
1041 | /* Now, pack the 32-bit elements of the array into a CONST_DOUBLE | |
1042 | and return it. */ | |
1043 | #if HOST_BITS_PER_WIDE_INT == 32 | |
a774762c | 1044 | return immed_double_const (i[endian], i[1 - endian], mode); |
c8971cad | 1045 | #else |
83e32a86 | 1046 | { |
1047 | int c; | |
1048 | ||
1049 | if (HOST_BITS_PER_WIDE_INT != 64) | |
a774762c | 1050 | abort (); |
1051 | ||
83e32a86 | 1052 | for (c = 0; c < 4; c++) |
a774762c | 1053 | i[c] &= ~ (0L); |
3f980cf7 | 1054 | |
7547817f | 1055 | switch (GET_MODE_BITSIZE (GET_MODE (x))) |
3f980cf7 | 1056 | { |
7547817f | 1057 | case 32: |
1058 | case 64: | |
3f980cf7 | 1059 | return immed_double_const (((unsigned long) i[endian]) | |
1060 | (((HOST_WIDE_INT) i[1-endian]) << 32), | |
1061 | 0, mode); | |
7547817f | 1062 | case 96: |
1063 | case 128: | |
3f980cf7 | 1064 | return immed_double_const (((unsigned long) i[endian*3]) | |
1065 | (((HOST_WIDE_INT) i[1+endian]) << 32), | |
1066 | ((unsigned long) i[2-endian]) | | |
1067 | (((HOST_WIDE_INT) i[3-endian*3]) << 32), | |
1068 | mode); | |
3c27c2b2 | 1069 | default: |
1070 | abort (); | |
3f980cf7 | 1071 | } |
83e32a86 | 1072 | } |
c8971cad | 1073 | #endif |
1074 | } | |
1075 | #endif /* ifndef REAL_ARITHMETIC */ | |
4a307dd5 | 1076 | |
15bbde2b | 1077 | /* Otherwise, we can't do this. */ |
1078 | return 0; | |
1079 | } | |
1080 | \f | |
568f439b | 1081 | /* Return the real part (which has mode MODE) of a complex value X. |
1082 | This always comes at the low address in memory. */ | |
1083 | ||
1084 | rtx | |
1085 | gen_realpart (mode, x) | |
1086 | enum machine_mode mode; | |
19cb6b50 | 1087 | rtx x; |
568f439b | 1088 | { |
81802af6 | 1089 | if (WORDS_BIG_ENDIAN |
1090 | && GET_MODE_BITSIZE (mode) < BITS_PER_WORD | |
1091 | && REG_P (x) | |
1092 | && REGNO (x) < FIRST_PSEUDO_REGISTER) | |
f060a027 | 1093 | internal_error |
1094 | ("Can't access real part of complex value in hard register"); | |
0864dc1b | 1095 | else if (WORDS_BIG_ENDIAN) |
568f439b | 1096 | return gen_highpart (mode, x); |
1097 | else | |
1098 | return gen_lowpart (mode, x); | |
1099 | } | |
1100 | ||
1101 | /* Return the imaginary part (which has mode MODE) of a complex value X. | |
1102 | This always comes at the high address in memory. */ | |
1103 | ||
1104 | rtx | |
1105 | gen_imagpart (mode, x) | |
1106 | enum machine_mode mode; | |
19cb6b50 | 1107 | rtx x; |
568f439b | 1108 | { |
81802af6 | 1109 | if (WORDS_BIG_ENDIAN) |
568f439b | 1110 | return gen_lowpart (mode, x); |
701e46d0 | 1111 | else if (! WORDS_BIG_ENDIAN |
ea9a92b6 | 1112 | && GET_MODE_BITSIZE (mode) < BITS_PER_WORD |
1113 | && REG_P (x) | |
1114 | && REGNO (x) < FIRST_PSEUDO_REGISTER) | |
f060a027 | 1115 | internal_error |
1116 | ("can't access imaginary part of complex value in hard register"); | |
568f439b | 1117 | else |
1118 | return gen_highpart (mode, x); | |
1119 | } | |
48c70a46 | 1120 | |
1121 | /* Return 1 iff X, assumed to be a SUBREG, | |
1122 | refers to the real part of the complex value in its containing reg. | |
1123 | Complex values are always stored with the real part in the first word, | |
1124 | regardless of WORDS_BIG_ENDIAN. */ | |
1125 | ||
1126 | int | |
1127 | subreg_realpart_p (x) | |
1128 | rtx x; | |
1129 | { | |
1130 | if (GET_CODE (x) != SUBREG) | |
1131 | abort (); | |
1132 | ||
701e46d0 | 1133 | return ((unsigned int) SUBREG_BYTE (x) |
02e7a332 | 1134 | < GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x)))); |
48c70a46 | 1135 | } |
568f439b | 1136 | \f |
15bbde2b | 1137 | /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value, |
1138 | return an rtx (MEM, SUBREG, or CONST_INT) that refers to the | |
1139 | least-significant part of X. | |
1140 | MODE specifies how big a part of X to return; | |
1141 | it usually should not be larger than a word. | |
1142 | If X is a MEM whose address is a QUEUED, the value may be so also. */ | |
1143 | ||
1144 | rtx | |
1145 | gen_lowpart (mode, x) | |
1146 | enum machine_mode mode; | |
19cb6b50 | 1147 | rtx x; |
15bbde2b | 1148 | { |
1149 | rtx result = gen_lowpart_common (mode, x); | |
1150 | ||
1151 | if (result) | |
1152 | return result; | |
365c9063 | 1153 | else if (GET_CODE (x) == REG) |
1154 | { | |
1155 | /* Must be a hard reg that's not valid in MODE. */ | |
1156 | result = gen_lowpart_common (mode, copy_to_reg (x)); | |
1157 | if (result == 0) | |
1158 | abort (); | |
314d6ec8 | 1159 | return result; |
365c9063 | 1160 | } |
15bbde2b | 1161 | else if (GET_CODE (x) == MEM) |
1162 | { | |
1163 | /* The only additional case we can do is MEM. */ | |
19cb6b50 | 1164 | int offset = 0; |
15bbde2b | 1165 | if (WORDS_BIG_ENDIAN) |
1166 | offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD) | |
1167 | - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD)); | |
1168 | ||
1169 | if (BYTES_BIG_ENDIAN) | |
1170 | /* Adjust the address so that the address-after-the-data | |
1171 | is unchanged. */ | |
1172 | offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode)) | |
1173 | - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x)))); | |
1174 | ||
e513d163 | 1175 | return adjust_address (x, mode, offset); |
15bbde2b | 1176 | } |
0dbd1c74 | 1177 | else if (GET_CODE (x) == ADDRESSOF) |
1178 | return gen_lowpart (mode, force_reg (GET_MODE (x), x)); | |
15bbde2b | 1179 | else |
1180 | abort (); | |
1181 | } | |
1182 | ||
d823ba47 | 1183 | /* Like `gen_lowpart', but refer to the most significant part. |
d56d0ca2 | 1184 | This is used to access the imaginary part of a complex number. */ |
1185 | ||
1186 | rtx | |
1187 | gen_highpart (mode, x) | |
1188 | enum machine_mode mode; | |
19cb6b50 | 1189 | rtx x; |
d56d0ca2 | 1190 | { |
701e46d0 | 1191 | unsigned int msize = GET_MODE_SIZE (mode); |
81802af6 | 1192 | rtx result; |
701e46d0 | 1193 | |
d56d0ca2 | 1194 | /* This case loses if X is a subreg. To catch bugs early, |
1195 | complain if an invalid MODE is used even in other cases. */ | |
701e46d0 | 1196 | if (msize > UNITS_PER_WORD |
1197 | && msize != GET_MODE_UNIT_SIZE (GET_MODE (x))) | |
d56d0ca2 | 1198 | abort (); |
701e46d0 | 1199 | |
81802af6 | 1200 | result = simplify_gen_subreg (mode, x, GET_MODE (x), |
1201 | subreg_highpart_offset (mode, GET_MODE (x))); | |
a8c36ab2 | 1202 | |
1203 | /* simplify_gen_subreg is not guaranteed to return a valid operand for | |
1204 | the target if we have a MEM. gen_highpart must return a valid operand, | |
1205 | emitting code if necessary to do so. */ | |
1206 | if (GET_CODE (result) == MEM) | |
1207 | result = validize_mem (result); | |
1208 | ||
81802af6 | 1209 | if (!result) |
1210 | abort (); | |
1211 | return result; | |
1212 | } | |
704fcf2b | 1213 | |
1214 | /* Like gen_highpart_mode, but accept mode of EXP operand in case EXP can | |
1215 | be VOIDmode constant. */ | |
1216 | rtx | |
1217 | gen_highpart_mode (outermode, innermode, exp) | |
1218 | enum machine_mode outermode, innermode; | |
1219 | rtx exp; | |
1220 | { | |
1221 | if (GET_MODE (exp) != VOIDmode) | |
1222 | { | |
1223 | if (GET_MODE (exp) != innermode) | |
1224 | abort (); | |
1225 | return gen_highpart (outermode, exp); | |
1226 | } | |
1227 | return simplify_gen_subreg (outermode, exp, innermode, | |
1228 | subreg_highpart_offset (outermode, innermode)); | |
1229 | } | |
81802af6 | 1230 | /* Return offset in bytes to get OUTERMODE low part |
1231 | of the value in mode INNERMODE stored in memory in target format. */ | |
10ef59ac | 1232 | |
81802af6 | 1233 | unsigned int |
1234 | subreg_lowpart_offset (outermode, innermode) | |
1235 | enum machine_mode outermode, innermode; | |
1236 | { | |
1237 | unsigned int offset = 0; | |
1238 | int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode)); | |
10ef59ac | 1239 | |
81802af6 | 1240 | if (difference > 0) |
d56d0ca2 | 1241 | { |
81802af6 | 1242 | if (WORDS_BIG_ENDIAN) |
1243 | offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD; | |
1244 | if (BYTES_BIG_ENDIAN) | |
1245 | offset += difference % UNITS_PER_WORD; | |
d56d0ca2 | 1246 | } |
701e46d0 | 1247 | |
81802af6 | 1248 | return offset; |
d56d0ca2 | 1249 | } |
64ab453f | 1250 | |
81802af6 | 1251 | /* Return offset in bytes to get OUTERMODE high part |
1252 | of the value in mode INNERMODE stored in memory in target format. */ | |
1253 | unsigned int | |
1254 | subreg_highpart_offset (outermode, innermode) | |
64ab453f | 1255 | enum machine_mode outermode, innermode; |
64ab453f | 1256 | { |
1257 | unsigned int offset = 0; | |
1258 | int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode)); | |
1259 | ||
81802af6 | 1260 | if (GET_MODE_SIZE (innermode) < GET_MODE_SIZE (outermode)) |
1261 | abort (); | |
1262 | ||
64ab453f | 1263 | if (difference > 0) |
1264 | { | |
81802af6 | 1265 | if (! WORDS_BIG_ENDIAN) |
64ab453f | 1266 | offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD; |
81802af6 | 1267 | if (! BYTES_BIG_ENDIAN) |
64ab453f | 1268 | offset += difference % UNITS_PER_WORD; |
1269 | } | |
1270 | ||
81802af6 | 1271 | return offset; |
64ab453f | 1272 | } |
d56d0ca2 | 1273 | |
15bbde2b | 1274 | /* Return 1 iff X, assumed to be a SUBREG, |
1275 | refers to the least significant part of its containing reg. | |
1276 | If X is not a SUBREG, always return 1 (it is its own low part!). */ | |
1277 | ||
1278 | int | |
1279 | subreg_lowpart_p (x) | |
1280 | rtx x; | |
1281 | { | |
1282 | if (GET_CODE (x) != SUBREG) | |
1283 | return 1; | |
7e14c1bf | 1284 | else if (GET_MODE (SUBREG_REG (x)) == VOIDmode) |
1285 | return 0; | |
15bbde2b | 1286 | |
81802af6 | 1287 | return (subreg_lowpart_offset (GET_MODE (x), GET_MODE (SUBREG_REG (x))) |
1288 | == SUBREG_BYTE (x)); | |
15bbde2b | 1289 | } |
1290 | \f | |
15bbde2b | 1291 | |
701e46d0 | 1292 | /* Helper routine for all the constant cases of operand_subword. |
1293 | Some places invoke this directly. */ | |
15bbde2b | 1294 | |
1295 | rtx | |
701e46d0 | 1296 | constant_subword (op, offset, mode) |
15bbde2b | 1297 | rtx op; |
701e46d0 | 1298 | int offset; |
15bbde2b | 1299 | enum machine_mode mode; |
1300 | { | |
b572011e | 1301 | int size_ratio = HOST_BITS_PER_WIDE_INT / BITS_PER_WORD; |
701e46d0 | 1302 | HOST_WIDE_INT val; |
15bbde2b | 1303 | |
1304 | /* If OP is already an integer word, return it. */ | |
1305 | if (GET_MODE_CLASS (mode) == MODE_INT | |
1306 | && GET_MODE_SIZE (mode) == UNITS_PER_WORD) | |
1307 | return op; | |
1308 | ||
fc92fa61 | 1309 | #ifdef REAL_ARITHMETIC |
915c336f | 1310 | /* The output is some bits, the width of the target machine's word. |
1311 | A wider-word host can surely hold them in a CONST_INT. A narrower-word | |
1312 | host can't. */ | |
0477aa9f | 1313 | if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD |
fc92fa61 | 1314 | && GET_MODE_CLASS (mode) == MODE_FLOAT |
48509d90 | 1315 | && GET_MODE_BITSIZE (mode) == 64 |
fc92fa61 | 1316 | && GET_CODE (op) == CONST_DOUBLE) |
1317 | { | |
0477aa9f | 1318 | long k[2]; |
fc92fa61 | 1319 | REAL_VALUE_TYPE rv; |
1320 | ||
1321 | REAL_VALUE_FROM_CONST_DOUBLE (rv, op); | |
1322 | REAL_VALUE_TO_TARGET_DOUBLE (rv, k); | |
48509d90 | 1323 | |
0477aa9f | 1324 | /* We handle 32-bit and >= 64-bit words here. Note that the order in |
48509d90 | 1325 | which the words are written depends on the word endianness. |
48509d90 | 1326 | ??? This is a potential portability problem and should |
cd1091f4 | 1327 | be fixed at some point. |
1328 | ||
1329 | We must excercise caution with the sign bit. By definition there | |
1330 | are 32 significant bits in K; there may be more in a HOST_WIDE_INT. | |
1331 | Consider a host with a 32-bit long and a 64-bit HOST_WIDE_INT. | |
1332 | So we explicitly mask and sign-extend as necessary. */ | |
0477aa9f | 1333 | if (BITS_PER_WORD == 32) |
cd1091f4 | 1334 | { |
701e46d0 | 1335 | val = k[offset]; |
cd1091f4 | 1336 | val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000; |
1337 | return GEN_INT (val); | |
1338 | } | |
1339 | #if HOST_BITS_PER_WIDE_INT >= 64 | |
701e46d0 | 1340 | else if (BITS_PER_WORD >= 64 && offset == 0) |
cd1091f4 | 1341 | { |
1342 | val = k[! WORDS_BIG_ENDIAN]; | |
1343 | val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32; | |
1344 | val |= (HOST_WIDE_INT) k[WORDS_BIG_ENDIAN] & 0xffffffff; | |
1345 | return GEN_INT (val); | |
1346 | } | |
0477aa9f | 1347 | #endif |
de8de626 | 1348 | else if (BITS_PER_WORD == 16) |
1349 | { | |
701e46d0 | 1350 | val = k[offset >> 1]; |
1351 | if ((offset & 1) == ! WORDS_BIG_ENDIAN) | |
cd1091f4 | 1352 | val >>= 16; |
bfc60c50 | 1353 | val = ((val & 0xffff) ^ 0x8000) - 0x8000; |
cd1091f4 | 1354 | return GEN_INT (val); |
de8de626 | 1355 | } |
48509d90 | 1356 | else |
1357 | abort (); | |
fc92fa61 | 1358 | } |
61f41e95 | 1359 | else if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD |
1360 | && GET_MODE_CLASS (mode) == MODE_FLOAT | |
1361 | && GET_MODE_BITSIZE (mode) > 64 | |
1362 | && GET_CODE (op) == CONST_DOUBLE) | |
915c336f | 1363 | { |
1364 | long k[4]; | |
1365 | REAL_VALUE_TYPE rv; | |
61f41e95 | 1366 | |
915c336f | 1367 | REAL_VALUE_FROM_CONST_DOUBLE (rv, op); |
1368 | REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv, k); | |
61f41e95 | 1369 | |
915c336f | 1370 | if (BITS_PER_WORD == 32) |
1371 | { | |
701e46d0 | 1372 | val = k[offset]; |
915c336f | 1373 | val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000; |
1374 | return GEN_INT (val); | |
1375 | } | |
1376 | #if HOST_BITS_PER_WIDE_INT >= 64 | |
701e46d0 | 1377 | else if (BITS_PER_WORD >= 64 && offset <= 1) |
915c336f | 1378 | { |
701e46d0 | 1379 | val = k[offset * 2 + ! WORDS_BIG_ENDIAN]; |
915c336f | 1380 | val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32; |
701e46d0 | 1381 | val |= (HOST_WIDE_INT) k[offset * 2 + WORDS_BIG_ENDIAN] & 0xffffffff; |
915c336f | 1382 | return GEN_INT (val); |
1383 | } | |
1384 | #endif | |
1385 | else | |
1386 | abort (); | |
1387 | } | |
fc92fa61 | 1388 | #else /* no REAL_ARITHMETIC */ |
15bbde2b | 1389 | if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT |
b572011e | 1390 | && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD) |
15bbde2b | 1391 | || flag_pretend_float) |
1392 | && GET_MODE_CLASS (mode) == MODE_FLOAT | |
1393 | && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD | |
1394 | && GET_CODE (op) == CONST_DOUBLE) | |
35bb04fc | 1395 | { |
1396 | /* The constant is stored in the host's word-ordering, | |
1397 | but we want to access it in the target's word-ordering. Some | |
1398 | compilers don't like a conditional inside macro args, so we have two | |
1399 | copies of the return. */ | |
06683233 | 1400 | #ifdef HOST_WORDS_BIG_ENDIAN |
701e46d0 | 1401 | return GEN_INT (offset == WORDS_BIG_ENDIAN |
35bb04fc | 1402 | ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op)); |
06683233 | 1403 | #else |
701e46d0 | 1404 | return GEN_INT (offset != WORDS_BIG_ENDIAN |
35bb04fc | 1405 | ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op)); |
06683233 | 1406 | #endif |
35bb04fc | 1407 | } |
fc92fa61 | 1408 | #endif /* no REAL_ARITHMETIC */ |
15bbde2b | 1409 | |
1410 | /* Single word float is a little harder, since single- and double-word | |
1411 | values often do not have the same high-order bits. We have already | |
1412 | verified that we want the only defined word of the single-word value. */ | |
fc92fa61 | 1413 | #ifdef REAL_ARITHMETIC |
0477aa9f | 1414 | if (GET_MODE_CLASS (mode) == MODE_FLOAT |
48509d90 | 1415 | && GET_MODE_BITSIZE (mode) == 32 |
fc92fa61 | 1416 | && GET_CODE (op) == CONST_DOUBLE) |
1417 | { | |
0477aa9f | 1418 | long l; |
fc92fa61 | 1419 | REAL_VALUE_TYPE rv; |
1420 | ||
1421 | REAL_VALUE_FROM_CONST_DOUBLE (rv, op); | |
1422 | REAL_VALUE_TO_TARGET_SINGLE (rv, l); | |
587a9fdf | 1423 | |
cd1091f4 | 1424 | /* Sign extend from known 32-bit value to HOST_WIDE_INT. */ |
1425 | val = l; | |
1426 | val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000; | |
eb294a2f | 1427 | |
587a9fdf | 1428 | if (BITS_PER_WORD == 16) |
1429 | { | |
701e46d0 | 1430 | if ((offset & 1) == ! WORDS_BIG_ENDIAN) |
cd1091f4 | 1431 | val >>= 16; |
bfc60c50 | 1432 | val = ((val & 0xffff) ^ 0x8000) - 0x8000; |
587a9fdf | 1433 | } |
cd1091f4 | 1434 | |
1435 | return GEN_INT (val); | |
fc92fa61 | 1436 | } |
1437 | #else | |
15bbde2b | 1438 | if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT |
b572011e | 1439 | && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD) |
15bbde2b | 1440 | || flag_pretend_float) |
dc611f66 | 1441 | && sizeof (float) * 8 == HOST_BITS_PER_WIDE_INT |
15bbde2b | 1442 | && GET_MODE_CLASS (mode) == MODE_FLOAT |
1443 | && GET_MODE_SIZE (mode) == UNITS_PER_WORD | |
1444 | && GET_CODE (op) == CONST_DOUBLE) | |
1445 | { | |
1446 | double d; | |
b572011e | 1447 | union {float f; HOST_WIDE_INT i; } u; |
15bbde2b | 1448 | |
1449 | REAL_VALUE_FROM_CONST_DOUBLE (d, op); | |
1450 | ||
1451 | u.f = d; | |
b572011e | 1452 | return GEN_INT (u.i); |
15bbde2b | 1453 | } |
dc611f66 | 1454 | if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT |
1455 | && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD) | |
1456 | || flag_pretend_float) | |
1457 | && sizeof (double) * 8 == HOST_BITS_PER_WIDE_INT | |
1458 | && GET_MODE_CLASS (mode) == MODE_FLOAT | |
1459 | && GET_MODE_SIZE (mode) == UNITS_PER_WORD | |
1460 | && GET_CODE (op) == CONST_DOUBLE) | |
1461 | { | |
1462 | double d; | |
1463 | union {double d; HOST_WIDE_INT i; } u; | |
1464 | ||
1465 | REAL_VALUE_FROM_CONST_DOUBLE (d, op); | |
1466 | ||
1467 | u.d = d; | |
1468 | return GEN_INT (u.i); | |
1469 | } | |
fc92fa61 | 1470 | #endif /* no REAL_ARITHMETIC */ |
d823ba47 | 1471 | |
15bbde2b | 1472 | /* The only remaining cases that we can handle are integers. |
1473 | Convert to proper endianness now since these cases need it. | |
d823ba47 | 1474 | At this point, offset == 0 means the low-order word. |
15bbde2b | 1475 | |
870288ea | 1476 | We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT |
1477 | in general. However, if OP is (const_int 0), we can just return | |
1478 | it for any word. */ | |
1479 | ||
1480 | if (op == const0_rtx) | |
1481 | return op; | |
15bbde2b | 1482 | |
1483 | if (GET_MODE_CLASS (mode) != MODE_INT | |
870288ea | 1484 | || (GET_CODE (op) != CONST_INT && GET_CODE (op) != CONST_DOUBLE) |
5c1fd70d | 1485 | || BITS_PER_WORD > HOST_BITS_PER_WIDE_INT) |
15bbde2b | 1486 | return 0; |
1487 | ||
1488 | if (WORDS_BIG_ENDIAN) | |
701e46d0 | 1489 | offset = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - offset; |
15bbde2b | 1490 | |
1491 | /* Find out which word on the host machine this value is in and get | |
1492 | it from the constant. */ | |
701e46d0 | 1493 | val = (offset / size_ratio == 0 |
15bbde2b | 1494 | ? (GET_CODE (op) == CONST_INT ? INTVAL (op) : CONST_DOUBLE_LOW (op)) |
1495 | : (GET_CODE (op) == CONST_INT | |
1496 | ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op))); | |
1497 | ||
5418f2a8 | 1498 | /* Get the value we want into the low bits of val. */ |
b572011e | 1499 | if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT) |
701e46d0 | 1500 | val = ((val >> ((offset % size_ratio) * BITS_PER_WORD))); |
5418f2a8 | 1501 | |
b2345915 | 1502 | val = trunc_int_for_mode (val, word_mode); |
15bbde2b | 1503 | |
b572011e | 1504 | return GEN_INT (val); |
15bbde2b | 1505 | } |
1506 | ||
701e46d0 | 1507 | /* Return subword OFFSET of operand OP. |
1508 | The word number, OFFSET, is interpreted as the word number starting | |
1509 | at the low-order address. OFFSET 0 is the low-order word if not | |
1510 | WORDS_BIG_ENDIAN, otherwise it is the high-order word. | |
1511 | ||
1512 | If we cannot extract the required word, we return zero. Otherwise, | |
1513 | an rtx corresponding to the requested word will be returned. | |
1514 | ||
1515 | VALIDATE_ADDRESS is nonzero if the address should be validated. Before | |
1516 | reload has completed, a valid address will always be returned. After | |
1517 | reload, if a valid address cannot be returned, we return zero. | |
1518 | ||
1519 | If VALIDATE_ADDRESS is zero, we simply form the required address; validating | |
1520 | it is the responsibility of the caller. | |
1521 | ||
1522 | MODE is the mode of OP in case it is a CONST_INT. | |
1523 | ||
1524 | ??? This is still rather broken for some cases. The problem for the | |
1525 | moment is that all callers of this thing provide no 'goal mode' to | |
1526 | tell us to work with. This exists because all callers were written | |
84e81e84 | 1527 | in a word based SUBREG world. |
1528 | Now use of this function can be deprecated by simplify_subreg in most | |
1529 | cases. | |
1530 | */ | |
701e46d0 | 1531 | |
1532 | rtx | |
1533 | operand_subword (op, offset, validate_address, mode) | |
1534 | rtx op; | |
1535 | unsigned int offset; | |
1536 | int validate_address; | |
1537 | enum machine_mode mode; | |
1538 | { | |
1539 | if (mode == VOIDmode) | |
1540 | mode = GET_MODE (op); | |
1541 | ||
1542 | if (mode == VOIDmode) | |
1543 | abort (); | |
1544 | ||
6312a35e | 1545 | /* If OP is narrower than a word, fail. */ |
701e46d0 | 1546 | if (mode != BLKmode |
1547 | && (GET_MODE_SIZE (mode) < UNITS_PER_WORD)) | |
1548 | return 0; | |
1549 | ||
6312a35e | 1550 | /* If we want a word outside OP, return zero. */ |
701e46d0 | 1551 | if (mode != BLKmode |
1552 | && (offset + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode)) | |
1553 | return const0_rtx; | |
1554 | ||
701e46d0 | 1555 | /* Form a new MEM at the requested address. */ |
1556 | if (GET_CODE (op) == MEM) | |
1557 | { | |
e4e86ec5 | 1558 | rtx new = adjust_address_nv (op, word_mode, offset * UNITS_PER_WORD); |
701e46d0 | 1559 | |
e4e86ec5 | 1560 | if (! validate_address) |
1561 | return new; | |
1562 | ||
1563 | else if (reload_completed) | |
701e46d0 | 1564 | { |
e4e86ec5 | 1565 | if (! strict_memory_address_p (word_mode, XEXP (new, 0))) |
1566 | return 0; | |
701e46d0 | 1567 | } |
e4e86ec5 | 1568 | else |
1569 | return replace_equiv_address (new, XEXP (new, 0)); | |
701e46d0 | 1570 | } |
1571 | ||
84e81e84 | 1572 | /* Rest can be handled by simplify_subreg. */ |
1573 | return simplify_gen_subreg (word_mode, op, mode, (offset * UNITS_PER_WORD)); | |
701e46d0 | 1574 | } |
1575 | ||
15bbde2b | 1576 | /* Similar to `operand_subword', but never return 0. If we can't extract |
1577 | the required subword, put OP into a register and try again. If that fails, | |
d823ba47 | 1578 | abort. We always validate the address in this case. |
15bbde2b | 1579 | |
1580 | MODE is the mode of OP, in case it is CONST_INT. */ | |
1581 | ||
1582 | rtx | |
701e46d0 | 1583 | operand_subword_force (op, offset, mode) |
15bbde2b | 1584 | rtx op; |
701e46d0 | 1585 | unsigned int offset; |
15bbde2b | 1586 | enum machine_mode mode; |
1587 | { | |
701e46d0 | 1588 | rtx result = operand_subword (op, offset, 1, mode); |
15bbde2b | 1589 | |
1590 | if (result) | |
1591 | return result; | |
1592 | ||
1593 | if (mode != BLKmode && mode != VOIDmode) | |
ac825d29 | 1594 | { |
1595 | /* If this is a register which can not be accessed by words, copy it | |
1596 | to a pseudo register. */ | |
1597 | if (GET_CODE (op) == REG) | |
1598 | op = copy_to_reg (op); | |
1599 | else | |
1600 | op = force_reg (mode, op); | |
1601 | } | |
15bbde2b | 1602 | |
701e46d0 | 1603 | result = operand_subword (op, offset, 1, mode); |
15bbde2b | 1604 | if (result == 0) |
1605 | abort (); | |
1606 | ||
1607 | return result; | |
1608 | } | |
1609 | \f | |
1610 | /* Given a compare instruction, swap the operands. | |
1611 | A test instruction is changed into a compare of 0 against the operand. */ | |
1612 | ||
1613 | void | |
1614 | reverse_comparison (insn) | |
1615 | rtx insn; | |
1616 | { | |
1617 | rtx body = PATTERN (insn); | |
1618 | rtx comp; | |
1619 | ||
1620 | if (GET_CODE (body) == SET) | |
1621 | comp = SET_SRC (body); | |
1622 | else | |
1623 | comp = SET_SRC (XVECEXP (body, 0, 0)); | |
1624 | ||
1625 | if (GET_CODE (comp) == COMPARE) | |
1626 | { | |
1627 | rtx op0 = XEXP (comp, 0); | |
1628 | rtx op1 = XEXP (comp, 1); | |
1629 | XEXP (comp, 0) = op1; | |
1630 | XEXP (comp, 1) = op0; | |
1631 | } | |
1632 | else | |
1633 | { | |
7014838c | 1634 | rtx new = gen_rtx_COMPARE (VOIDmode, |
1635 | CONST0_RTX (GET_MODE (comp)), comp); | |
15bbde2b | 1636 | if (GET_CODE (body) == SET) |
1637 | SET_SRC (body) = new; | |
1638 | else | |
1639 | SET_SRC (XVECEXP (body, 0, 0)) = new; | |
1640 | } | |
1641 | } | |
1642 | \f | |
c6259b83 | 1643 | |
1644 | /* Given REF, a MEM, and T, either the type of X or the expression | |
1645 | corresponding to REF, set the memory attributes. OBJECTP is nonzero | |
1646 | if we are making a new object of this type. */ | |
1647 | ||
1648 | void | |
1649 | set_mem_attributes (ref, t, objectp) | |
1650 | rtx ref; | |
1651 | tree t; | |
1652 | int objectp; | |
1653 | { | |
1654 | tree type; | |
1655 | ||
1656 | /* It can happen that type_for_mode was given a mode for which there | |
1657 | is no language-level type. In which case it returns NULL, which | |
1658 | we can see here. */ | |
1659 | if (t == NULL_TREE) | |
1660 | return; | |
1661 | ||
1662 | type = TYPE_P (t) ? t : TREE_TYPE (t); | |
1663 | ||
c6259b83 | 1664 | /* If we have already set DECL_RTL = ref, get_alias_set will get the |
1665 | wrong answer, as it assumes that DECL_RTL already has the right alias | |
1666 | info. Callers should not set DECL_RTL until after the call to | |
1667 | set_mem_attributes. */ | |
1668 | if (DECL_P (t) && ref == DECL_RTL_IF_SET (t)) | |
1669 | abort (); | |
1670 | ||
96216d37 | 1671 | /* Get the alias set from the expression or type (perhaps using a |
1672 | front-end routine). */ | |
c6259b83 | 1673 | set_mem_alias_set (ref, get_alias_set (t)); |
1674 | ||
96216d37 | 1675 | /* It is incorrect to set RTX_UNCHANGING_P from TREE_READONLY (type) |
1676 | here, because, in C and C++, the fact that a location is accessed | |
1677 | through a const expression does not mean that the value there can | |
1678 | never change. */ | |
1679 | ||
c6259b83 | 1680 | MEM_VOLATILE_P (ref) = TYPE_VOLATILE (type); |
1681 | MEM_IN_STRUCT_P (ref) = AGGREGATE_TYPE_P (type); | |
1682 | ||
1683 | /* If we are making an object of this type, we know that it is a scalar if | |
1684 | the type is not an aggregate. */ | |
1685 | if (objectp && ! AGGREGATE_TYPE_P (type)) | |
1686 | MEM_SCALAR_P (ref) = 1; | |
1687 | ||
96216d37 | 1688 | /* If the size is known, we can set that. */ |
1689 | if (TYPE_SIZE_UNIT (type) && host_integerp (TYPE_SIZE_UNIT (type), 1)) | |
1690 | MEM_ATTRS (ref) | |
1691 | = get_mem_attrs (MEM_ALIAS_SET (ref), MEM_DECL (ref), MEM_OFFSET (ref), | |
1692 | GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type), 1)), | |
1693 | MEM_ALIGN (ref)); | |
1694 | ||
1695 | /* If T is a type, there's nothing more we can do. Otherwise, we may be able | |
c6259b83 | 1696 | to deduce some more information about the expression. */ |
1697 | if (TYPE_P (t)) | |
1698 | return; | |
1699 | ||
1700 | maybe_set_unchanging (ref, t); | |
1701 | if (TREE_THIS_VOLATILE (t)) | |
1702 | MEM_VOLATILE_P (ref) = 1; | |
1703 | ||
c6259b83 | 1704 | /* Now remove any NOPs: they don't change what the underlying object is. |
1705 | Likewise for SAVE_EXPR. */ | |
1706 | while (TREE_CODE (t) == NOP_EXPR || TREE_CODE (t) == CONVERT_EXPR | |
1707 | || TREE_CODE (t) == NON_LVALUE_EXPR || TREE_CODE (t) == SAVE_EXPR) | |
1708 | t = TREE_OPERAND (t, 0); | |
1709 | ||
96216d37 | 1710 | /* If this is a decl, set the attributes of the MEM from it. */ |
1711 | if (DECL_P (t)) | |
1712 | MEM_ATTRS (ref) | |
1713 | = get_mem_attrs | |
1714 | (MEM_ALIAS_SET (ref), t, GEN_INT (0), | |
1715 | (TYPE_SIZE_UNIT (TREE_TYPE (t)) | |
1716 | && host_integerp (TYPE_SIZE_UNIT (TREE_TYPE (t)), 1)) | |
1717 | ? GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (TREE_TYPE (t)), 1)) | |
1718 | : 0, DECL_ALIGN (t) / BITS_PER_UNIT); | |
1719 | ||
1720 | /* Now see if we can say more about whether it's an aggregate or | |
1721 | scalar. If we already know it's an aggregate, don't bother. */ | |
1722 | if (MEM_IN_STRUCT_P (ref)) | |
1723 | return; | |
1724 | ||
c6259b83 | 1725 | /* Since we already know the type isn't an aggregate, if this is a decl, |
1726 | it must be a scalar. Or if it is a reference into an aggregate, | |
1727 | this is part of an aggregate. Otherwise we don't know. */ | |
1728 | if (DECL_P (t)) | |
1729 | MEM_SCALAR_P (ref) = 1; | |
1730 | else if (TREE_CODE (t) == COMPONENT_REF || TREE_CODE (t) == ARRAY_REF | |
1731 | || TREE_CODE (t) == ARRAY_RANGE_REF | |
1732 | || TREE_CODE (t) == BIT_FIELD_REF) | |
1733 | MEM_IN_STRUCT_P (ref) = 1; | |
1734 | } | |
1735 | ||
1736 | /* Set the alias set of MEM to SET. */ | |
1737 | ||
1738 | void | |
1739 | set_mem_alias_set (mem, set) | |
1740 | rtx mem; | |
1741 | HOST_WIDE_INT set; | |
1742 | { | |
c6259b83 | 1743 | #ifdef ENABLE_CHECKING |
1744 | /* If the new and old alias sets don't conflict, something is wrong. */ | |
1745 | if (!alias_sets_conflict_p (set, MEM_ALIAS_SET (mem))) | |
1746 | abort (); | |
c6259b83 | 1747 | #endif |
1748 | ||
1749 | MEM_ATTRS (mem) = get_mem_attrs (set, MEM_DECL (mem), MEM_OFFSET (mem), | |
1750 | MEM_SIZE (mem), MEM_ALIGN (mem)); | |
1751 | } | |
96216d37 | 1752 | |
1753 | /* Set the alignment of MEM to ALIGN. */ | |
1754 | ||
1755 | void | |
1756 | set_mem_align (mem, align) | |
1757 | rtx mem; | |
1758 | unsigned int align; | |
1759 | { | |
1760 | MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_DECL (mem), | |
1761 | MEM_OFFSET (mem), MEM_SIZE (mem), align); | |
1762 | } | |
c6259b83 | 1763 | \f |
96216d37 | 1764 | /* Return a memory reference like MEMREF, but with its mode changed to MODE |
1765 | and its address changed to ADDR. (VOIDmode means don't change the mode. | |
1766 | NULL for ADDR means don't change the address.) VALIDATE is nonzero if the | |
1767 | returned memory location is required to be valid. The memory | |
1768 | attributes are not changed. */ | |
15bbde2b | 1769 | |
96216d37 | 1770 | static rtx |
e4e86ec5 | 1771 | change_address_1 (memref, mode, addr, validate) |
15bbde2b | 1772 | rtx memref; |
1773 | enum machine_mode mode; | |
1774 | rtx addr; | |
e4e86ec5 | 1775 | int validate; |
15bbde2b | 1776 | { |
1777 | rtx new; | |
1778 | ||
1779 | if (GET_CODE (memref) != MEM) | |
1780 | abort (); | |
1781 | if (mode == VOIDmode) | |
1782 | mode = GET_MODE (memref); | |
1783 | if (addr == 0) | |
1784 | addr = XEXP (memref, 0); | |
1785 | ||
e4e86ec5 | 1786 | if (validate) |
15bbde2b | 1787 | { |
e4e86ec5 | 1788 | if (reload_in_progress || reload_completed) |
1789 | { | |
1790 | if (! memory_address_p (mode, addr)) | |
1791 | abort (); | |
1792 | } | |
1793 | else | |
1794 | addr = memory_address (mode, addr); | |
15bbde2b | 1795 | } |
d823ba47 | 1796 | |
e8976cd7 | 1797 | if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref)) |
1798 | return memref; | |
1799 | ||
3ad7bb1c | 1800 | new = gen_rtx_MEM (mode, addr); |
6a0934dd | 1801 | MEM_COPY_ATTRIBUTES (new, memref); |
15bbde2b | 1802 | return new; |
1803 | } | |
537ffcfc | 1804 | |
96216d37 | 1805 | /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what |
1806 | way we are changing MEMREF, so we only preserve the alias set. */ | |
e513d163 | 1807 | |
1808 | rtx | |
96216d37 | 1809 | change_address (memref, mode, addr) |
e513d163 | 1810 | rtx memref; |
1811 | enum machine_mode mode; | |
96216d37 | 1812 | rtx addr; |
e513d163 | 1813 | { |
96216d37 | 1814 | rtx new = change_address_1 (memref, mode, addr, 1); |
1815 | enum machine_mode mmode = GET_MODE (new); | |
6cc60c4d | 1816 | |
96216d37 | 1817 | MEM_ATTRS (new) |
1818 | = get_mem_attrs (MEM_ALIAS_SET (memref), 0, 0, | |
1819 | mmode == BLKmode ? 0 : GEN_INT (GET_MODE_SIZE (mmode)), | |
1820 | (mmode == BLKmode ? 1 | |
1821 | : GET_MODE_ALIGNMENT (mmode) / BITS_PER_UNIT)); | |
fb257ae6 | 1822 | |
96216d37 | 1823 | return new; |
e513d163 | 1824 | } |
537ffcfc | 1825 | |
96216d37 | 1826 | /* Return a memory reference like MEMREF, but with its mode changed |
1827 | to MODE and its address offset by OFFSET bytes. If VALIDATE is | |
1828 | nonzero, the memory address is forced to be valid. */ | |
e4e86ec5 | 1829 | |
1830 | rtx | |
96216d37 | 1831 | adjust_address_1 (memref, mode, offset, validate) |
e4e86ec5 | 1832 | rtx memref; |
1833 | enum machine_mode mode; | |
1834 | HOST_WIDE_INT offset; | |
96216d37 | 1835 | int validate; |
e4e86ec5 | 1836 | { |
fb257ae6 | 1837 | rtx addr = XEXP (memref, 0); |
96216d37 | 1838 | rtx new; |
1839 | rtx memoffset = MEM_OFFSET (memref); | |
1840 | unsigned int memalign = MEM_ALIGN (memref); | |
fb257ae6 | 1841 | |
96216d37 | 1842 | /* If MEMREF is a LO_SUM and the offset is within the alignment of the |
fb257ae6 | 1843 | object, we can merge it into the LO_SUM. */ |
1844 | if (GET_MODE (memref) != BLKmode && GET_CODE (addr) == LO_SUM | |
9c5033bb | 1845 | && offset >= 0 |
eca1c9c0 | 1846 | && (unsigned HOST_WIDE_INT) offset |
1847 | < GET_MODE_ALIGNMENT (GET_MODE (memref)) / BITS_PER_UNIT) | |
96216d37 | 1848 | addr = gen_rtx_LO_SUM (Pmode, XEXP (addr, 0), |
fb257ae6 | 1849 | plus_constant (XEXP (addr, 1), offset)); |
96216d37 | 1850 | else if (offset == 0) |
1851 | /* ??? Prefer to create garbage instead of creating shared rtl. */ | |
1852 | addr = copy_rtx (addr); | |
fb257ae6 | 1853 | else |
1854 | addr = plus_constant (addr, offset); | |
1855 | ||
96216d37 | 1856 | new = change_address_1 (memref, mode, addr, validate); |
1857 | ||
1858 | /* Compute the new values of the memory attributes due to this adjustment. | |
1859 | We add the offsets and update the alignment. */ | |
1860 | if (memoffset) | |
1861 | memoffset = GEN_INT (offset + INTVAL (memoffset)); | |
1862 | ||
1863 | /* If the offset is negative, don't try to update the alignment. If it's | |
1864 | zero, the alignment hasn't changed. Otherwise, the known alignment may | |
1865 | be less strict. */ | |
1866 | if (offset < 0) | |
1867 | memalign = 1; | |
1868 | ||
1869 | while (offset > 0 && (offset % memalign) != 0) | |
1870 | memalign >>= 1; | |
1871 | ||
1872 | MEM_ATTRS (new) | |
1873 | = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_DECL (memref), memoffset, | |
1874 | mode == BLKmode | |
1875 | ? 0 : GEN_INT (GET_MODE_SIZE (mode)), memalign); | |
1876 | ||
1877 | /* At some point, we should validate that this offset is within the object, | |
1878 | if all the appropriate values are known. */ | |
1879 | return new; | |
e4e86ec5 | 1880 | } |
1881 | ||
fcdc122e | 1882 | /* Return a memory reference like MEMREF, but with its address changed to |
1883 | ADDR. The caller is asserting that the actual piece of memory pointed | |
1884 | to is the same, just the form of the address is being changed, such as | |
1885 | by putting something into a register. */ | |
1886 | ||
1887 | rtx | |
1888 | offset_address (memref, offset, pow2) | |
1889 | rtx memref; | |
1890 | rtx offset; | |
1891 | HOST_WIDE_INT pow2; | |
1892 | { | |
1893 | rtx new = change_address_1 (memref, VOIDmode, | |
1894 | gen_rtx_PLUS (Pmode, XEXP (memref, 0), | |
1895 | force_reg (Pmode, offset)), 1); | |
1896 | unsigned int memalign = MEM_ALIGN (memref); | |
1897 | ||
1898 | /* Update the alignment to reflect the offset. Reset the offset, which | |
1899 | we don't know. */ | |
1900 | while (pow2 % memalign != 0) | |
1901 | memalign >>= 1; | |
1902 | ||
1903 | MEM_ATTRS (new) = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_DECL (memref), | |
1904 | 0, 0, memalign); | |
1905 | return new; | |
1906 | } | |
1907 | ||
537ffcfc | 1908 | /* Return a memory reference like MEMREF, but with its address changed to |
1909 | ADDR. The caller is asserting that the actual piece of memory pointed | |
1910 | to is the same, just the form of the address is being changed, such as | |
1911 | by putting something into a register. */ | |
1912 | ||
1913 | rtx | |
1914 | replace_equiv_address (memref, addr) | |
1915 | rtx memref; | |
1916 | rtx addr; | |
1917 | { | |
96216d37 | 1918 | /* change_address_1 copies the memory attribute structure without change |
1919 | and that's exactly what we want here. */ | |
1920 | return change_address_1 (memref, VOIDmode, addr, 1); | |
537ffcfc | 1921 | } |
96216d37 | 1922 | |
e4e86ec5 | 1923 | /* Likewise, but the reference is not required to be valid. */ |
1924 | ||
1925 | rtx | |
1926 | replace_equiv_address_nv (memref, addr) | |
1927 | rtx memref; | |
1928 | rtx addr; | |
1929 | { | |
e4e86ec5 | 1930 | return change_address_1 (memref, VOIDmode, addr, 0); |
1931 | } | |
15bbde2b | 1932 | \f |
1933 | /* Return a newly created CODE_LABEL rtx with a unique label number. */ | |
1934 | ||
1935 | rtx | |
1936 | gen_label_rtx () | |
1937 | { | |
19cb6b50 | 1938 | rtx label; |
649d8da6 | 1939 | |
b54842d8 | 1940 | label = gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX, |
4679ade3 | 1941 | NULL_RTX, label_num++, NULL, NULL); |
649d8da6 | 1942 | |
15bbde2b | 1943 | LABEL_NUSES (label) = 0; |
bfee5366 | 1944 | LABEL_ALTERNATE_NAME (label) = NULL; |
15bbde2b | 1945 | return label; |
1946 | } | |
1947 | \f | |
1948 | /* For procedure integration. */ | |
1949 | ||
15bbde2b | 1950 | /* Install new pointers to the first and last insns in the chain. |
d4c332ff | 1951 | Also, set cur_insn_uid to one higher than the last in use. |
15bbde2b | 1952 | Used for an inline-procedure after copying the insn chain. */ |
1953 | ||
1954 | void | |
1955 | set_new_first_and_last_insn (first, last) | |
1956 | rtx first, last; | |
1957 | { | |
d4c332ff | 1958 | rtx insn; |
1959 | ||
15bbde2b | 1960 | first_insn = first; |
1961 | last_insn = last; | |
d4c332ff | 1962 | cur_insn_uid = 0; |
1963 | ||
1964 | for (insn = first; insn; insn = NEXT_INSN (insn)) | |
1965 | cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn)); | |
1966 | ||
1967 | cur_insn_uid++; | |
15bbde2b | 1968 | } |
1969 | ||
1970 | /* Set the range of label numbers found in the current function. | |
1971 | This is used when belatedly compiling an inline function. */ | |
1972 | ||
1973 | void | |
1974 | set_new_first_and_last_label_num (first, last) | |
1975 | int first, last; | |
1976 | { | |
1977 | base_label_num = label_num; | |
1978 | first_label_num = first; | |
1979 | last_label_num = last; | |
1980 | } | |
0a893c29 | 1981 | |
1982 | /* Set the last label number found in the current function. | |
1983 | This is used when belatedly compiling an inline function. */ | |
15bbde2b | 1984 | |
1985 | void | |
0a893c29 | 1986 | set_new_last_label_num (last) |
1987 | int last; | |
15bbde2b | 1988 | { |
0a893c29 | 1989 | base_label_num = label_num; |
1990 | last_label_num = last; | |
15bbde2b | 1991 | } |
0a893c29 | 1992 | \f |
15bbde2b | 1993 | /* Restore all variables describing the current status from the structure *P. |
1994 | This is used after a nested function. */ | |
1995 | ||
1996 | void | |
1997 | restore_emit_status (p) | |
c5b89159 | 1998 | struct function *p ATTRIBUTE_UNUSED; |
15bbde2b | 1999 | { |
bb9d6298 | 2000 | last_label_num = 0; |
0a893c29 | 2001 | clear_emit_caches (); |
15bbde2b | 2002 | } |
26df1c5e | 2003 | |
c788feb1 | 2004 | /* Clear out all parts of the state in F that can safely be discarded |
26df1c5e | 2005 | after the function has been compiled, to let garbage collection |
a57bcb3b | 2006 | reclaim the memory. */ |
c788feb1 | 2007 | |
26df1c5e | 2008 | void |
a57bcb3b | 2009 | free_emit_status (f) |
26df1c5e | 2010 | struct function *f; |
2011 | { | |
2012 | free (f->emit->x_regno_reg_rtx); | |
26df1c5e | 2013 | free (f->emit->regno_pointer_align); |
fcdc122e | 2014 | free (f->emit->regno_decl); |
3c3bb268 | 2015 | free (f->emit); |
2016 | f->emit = NULL; | |
26df1c5e | 2017 | } |
15bbde2b | 2018 | \f |
d823ba47 | 2019 | /* Go through all the RTL insn bodies and copy any invalid shared |
2d96a59a | 2020 | structure. This routine should only be called once. */ |
15bbde2b | 2021 | |
2022 | void | |
2d96a59a | 2023 | unshare_all_rtl (fndecl, insn) |
2024 | tree fndecl; | |
2025 | rtx insn; | |
15bbde2b | 2026 | { |
2d96a59a | 2027 | tree decl; |
15bbde2b | 2028 | |
2d96a59a | 2029 | /* Make sure that virtual parameters are not shared. */ |
2030 | for (decl = DECL_ARGUMENTS (fndecl); decl; decl = TREE_CHAIN (decl)) | |
0e8e37b2 | 2031 | SET_DECL_RTL (decl, copy_rtx_if_shared (DECL_RTL (decl))); |
2d96a59a | 2032 | |
72ec8878 | 2033 | /* Make sure that virtual stack slots are not shared. */ |
2034 | unshare_all_decls (DECL_INITIAL (fndecl)); | |
2035 | ||
2d96a59a | 2036 | /* Unshare just about everything else. */ |
2037 | unshare_all_rtl_1 (insn); | |
d823ba47 | 2038 | |
15bbde2b | 2039 | /* Make sure the addresses of stack slots found outside the insn chain |
2040 | (such as, in DECL_RTL of a variable) are not shared | |
2041 | with the insn chain. | |
2042 | ||
2043 | This special care is necessary when the stack slot MEM does not | |
2044 | actually appear in the insn chain. If it does appear, its address | |
2045 | is unshared from all else at that point. */ | |
45733446 | 2046 | stack_slot_list = copy_rtx_if_shared (stack_slot_list); |
15bbde2b | 2047 | } |
2048 | ||
d823ba47 | 2049 | /* Go through all the RTL insn bodies and copy any invalid shared |
2d96a59a | 2050 | structure, again. This is a fairly expensive thing to do so it |
2051 | should be done sparingly. */ | |
2052 | ||
2053 | void | |
2054 | unshare_all_rtl_again (insn) | |
2055 | rtx insn; | |
2056 | { | |
2057 | rtx p; | |
5244079b | 2058 | tree decl; |
2059 | ||
2d96a59a | 2060 | for (p = insn; p; p = NEXT_INSN (p)) |
9204e736 | 2061 | if (INSN_P (p)) |
2d96a59a | 2062 | { |
2063 | reset_used_flags (PATTERN (p)); | |
2064 | reset_used_flags (REG_NOTES (p)); | |
2065 | reset_used_flags (LOG_LINKS (p)); | |
2066 | } | |
5244079b | 2067 | |
01dc9f0c | 2068 | /* Make sure that virtual stack slots are not shared. */ |
2069 | reset_used_decls (DECL_INITIAL (cfun->decl)); | |
2070 | ||
5244079b | 2071 | /* Make sure that virtual parameters are not shared. */ |
2072 | for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = TREE_CHAIN (decl)) | |
2073 | reset_used_flags (DECL_RTL (decl)); | |
2074 | ||
2075 | reset_used_flags (stack_slot_list); | |
2076 | ||
2077 | unshare_all_rtl (cfun->decl, insn); | |
2d96a59a | 2078 | } |
2079 | ||
2080 | /* Go through all the RTL insn bodies and copy any invalid shared structure. | |
2081 | Assumes the mark bits are cleared at entry. */ | |
2082 | ||
2083 | static void | |
2084 | unshare_all_rtl_1 (insn) | |
2085 | rtx insn; | |
2086 | { | |
2087 | for (; insn; insn = NEXT_INSN (insn)) | |
9204e736 | 2088 | if (INSN_P (insn)) |
2d96a59a | 2089 | { |
2090 | PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn)); | |
2091 | REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn)); | |
2092 | LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn)); | |
2093 | } | |
2094 | } | |
2095 | ||
72ec8878 | 2096 | /* Go through all virtual stack slots of a function and copy any |
2097 | shared structure. */ | |
2098 | static void | |
2099 | unshare_all_decls (blk) | |
2100 | tree blk; | |
2101 | { | |
2102 | tree t; | |
2103 | ||
2104 | /* Copy shared decls. */ | |
2105 | for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t)) | |
0e8e37b2 | 2106 | if (DECL_RTL_SET_P (t)) |
2107 | SET_DECL_RTL (t, copy_rtx_if_shared (DECL_RTL (t))); | |
72ec8878 | 2108 | |
2109 | /* Now process sub-blocks. */ | |
2110 | for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t)) | |
2111 | unshare_all_decls (t); | |
2112 | } | |
2113 | ||
01dc9f0c | 2114 | /* Go through all virtual stack slots of a function and mark them as |
6312a35e | 2115 | not shared. */ |
01dc9f0c | 2116 | static void |
2117 | reset_used_decls (blk) | |
2118 | tree blk; | |
2119 | { | |
2120 | tree t; | |
2121 | ||
2122 | /* Mark decls. */ | |
2123 | for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t)) | |
0e8e37b2 | 2124 | if (DECL_RTL_SET_P (t)) |
2125 | reset_used_flags (DECL_RTL (t)); | |
01dc9f0c | 2126 | |
2127 | /* Now process sub-blocks. */ | |
2128 | for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t)) | |
2129 | reset_used_decls (t); | |
2130 | } | |
2131 | ||
15bbde2b | 2132 | /* Mark ORIG as in use, and return a copy of it if it was already in use. |
2133 | Recursively does the same for subexpressions. */ | |
2134 | ||
2135 | rtx | |
2136 | copy_rtx_if_shared (orig) | |
2137 | rtx orig; | |
2138 | { | |
19cb6b50 | 2139 | rtx x = orig; |
2140 | int i; | |
2141 | enum rtx_code code; | |
2142 | const char *format_ptr; | |
15bbde2b | 2143 | int copied = 0; |
2144 | ||
2145 | if (x == 0) | |
2146 | return 0; | |
2147 | ||
2148 | code = GET_CODE (x); | |
2149 | ||
2150 | /* These types may be freely shared. */ | |
2151 | ||
2152 | switch (code) | |
2153 | { | |
2154 | case REG: | |
2155 | case QUEUED: | |
2156 | case CONST_INT: | |
2157 | case CONST_DOUBLE: | |
2158 | case SYMBOL_REF: | |
2159 | case CODE_LABEL: | |
2160 | case PC: | |
2161 | case CC0: | |
2162 | case SCRATCH: | |
a92771b8 | 2163 | /* SCRATCH must be shared because they represent distinct values. */ |
15bbde2b | 2164 | return x; |
2165 | ||
f63d12e3 | 2166 | case CONST: |
2167 | /* CONST can be shared if it contains a SYMBOL_REF. If it contains | |
2168 | a LABEL_REF, it isn't sharable. */ | |
2169 | if (GET_CODE (XEXP (x, 0)) == PLUS | |
2170 | && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF | |
2171 | && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT) | |
2172 | return x; | |
2173 | break; | |
2174 | ||
15bbde2b | 2175 | case INSN: |
2176 | case JUMP_INSN: | |
2177 | case CALL_INSN: | |
2178 | case NOTE: | |
15bbde2b | 2179 | case BARRIER: |
2180 | /* The chain of insns is not being copied. */ | |
2181 | return x; | |
2182 | ||
2183 | case MEM: | |
baf55c37 | 2184 | /* A MEM is allowed to be shared if its address is constant. |
2185 | ||
d823ba47 | 2186 | We used to allow sharing of MEMs which referenced |
baf55c37 | 2187 | virtual_stack_vars_rtx or virtual_incoming_args_rtx, but |
2188 | that can lose. instantiate_virtual_regs will not unshare | |
2189 | the MEMs, and combine may change the structure of the address | |
2190 | because it looks safe and profitable in one context, but | |
2191 | in some other context it creates unrecognizable RTL. */ | |
2192 | if (CONSTANT_ADDRESS_P (XEXP (x, 0))) | |
15bbde2b | 2193 | return x; |
2194 | ||
0dbd1c74 | 2195 | break; |
2196 | ||
2197 | default: | |
2198 | break; | |
15bbde2b | 2199 | } |
2200 | ||
2201 | /* This rtx may not be shared. If it has already been seen, | |
2202 | replace it with a copy of itself. */ | |
2203 | ||
2204 | if (x->used) | |
2205 | { | |
19cb6b50 | 2206 | rtx copy; |
15bbde2b | 2207 | |
2208 | copy = rtx_alloc (code); | |
b1b63592 | 2209 | memcpy (copy, x, |
748e6d74 | 2210 | (sizeof (*copy) - sizeof (copy->fld) |
2211 | + sizeof (copy->fld[0]) * GET_RTX_LENGTH (code))); | |
15bbde2b | 2212 | x = copy; |
2213 | copied = 1; | |
2214 | } | |
2215 | x->used = 1; | |
2216 | ||
2217 | /* Now scan the subexpressions recursively. | |
2218 | We can store any replaced subexpressions directly into X | |
2219 | since we know X is not shared! Any vectors in X | |
2220 | must be copied if X was copied. */ | |
2221 | ||
2222 | format_ptr = GET_RTX_FORMAT (code); | |
2223 | ||
2224 | for (i = 0; i < GET_RTX_LENGTH (code); i++) | |
2225 | { | |
2226 | switch (*format_ptr++) | |
2227 | { | |
2228 | case 'e': | |
2229 | XEXP (x, i) = copy_rtx_if_shared (XEXP (x, i)); | |
2230 | break; | |
2231 | ||
2232 | case 'E': | |
2233 | if (XVEC (x, i) != NULL) | |
2234 | { | |
19cb6b50 | 2235 | int j; |
ffe0869b | 2236 | int len = XVECLEN (x, i); |
15bbde2b | 2237 | |
ffe0869b | 2238 | if (copied && len > 0) |
a4070a91 | 2239 | XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem); |
ffe0869b | 2240 | for (j = 0; j < len; j++) |
2241 | XVECEXP (x, i, j) = copy_rtx_if_shared (XVECEXP (x, i, j)); | |
15bbde2b | 2242 | } |
2243 | break; | |
2244 | } | |
2245 | } | |
2246 | return x; | |
2247 | } | |
2248 | ||
2249 | /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used | |
2250 | to look for shared sub-parts. */ | |
2251 | ||
2252 | void | |
2253 | reset_used_flags (x) | |
2254 | rtx x; | |
2255 | { | |
19cb6b50 | 2256 | int i, j; |
2257 | enum rtx_code code; | |
2258 | const char *format_ptr; | |
15bbde2b | 2259 | |
2260 | if (x == 0) | |
2261 | return; | |
2262 | ||
2263 | code = GET_CODE (x); | |
2264 | ||
c3418f42 | 2265 | /* These types may be freely shared so we needn't do any resetting |
15bbde2b | 2266 | for them. */ |
2267 | ||
2268 | switch (code) | |
2269 | { | |
2270 | case REG: | |
2271 | case QUEUED: | |
2272 | case CONST_INT: | |
2273 | case CONST_DOUBLE: | |
2274 | case SYMBOL_REF: | |
2275 | case CODE_LABEL: | |
2276 | case PC: | |
2277 | case CC0: | |
2278 | return; | |
2279 | ||
2280 | case INSN: | |
2281 | case JUMP_INSN: | |
2282 | case CALL_INSN: | |
2283 | case NOTE: | |
2284 | case LABEL_REF: | |
2285 | case BARRIER: | |
2286 | /* The chain of insns is not being copied. */ | |
2287 | return; | |
d823ba47 | 2288 | |
0dbd1c74 | 2289 | default: |
2290 | break; | |
15bbde2b | 2291 | } |
2292 | ||
2293 | x->used = 0; | |
2294 | ||
2295 | format_ptr = GET_RTX_FORMAT (code); | |
2296 | for (i = 0; i < GET_RTX_LENGTH (code); i++) | |
2297 | { | |
2298 | switch (*format_ptr++) | |
2299 | { | |
2300 | case 'e': | |
2301 | reset_used_flags (XEXP (x, i)); | |
2302 | break; | |
2303 | ||
2304 | case 'E': | |
2305 | for (j = 0; j < XVECLEN (x, i); j++) | |
2306 | reset_used_flags (XVECEXP (x, i, j)); | |
2307 | break; | |
2308 | } | |
2309 | } | |
2310 | } | |
2311 | \f | |
2312 | /* Copy X if necessary so that it won't be altered by changes in OTHER. | |
2313 | Return X or the rtx for the pseudo reg the value of X was copied into. | |
2314 | OTHER must be valid as a SET_DEST. */ | |
2315 | ||
2316 | rtx | |
2317 | make_safe_from (x, other) | |
2318 | rtx x, other; | |
2319 | { | |
2320 | while (1) | |
2321 | switch (GET_CODE (other)) | |
2322 | { | |
2323 | case SUBREG: | |
2324 | other = SUBREG_REG (other); | |
2325 | break; | |
2326 | case STRICT_LOW_PART: | |
2327 | case SIGN_EXTEND: | |
2328 | case ZERO_EXTEND: | |
2329 | other = XEXP (other, 0); | |
2330 | break; | |
2331 | default: | |
2332 | goto done; | |
2333 | } | |
2334 | done: | |
2335 | if ((GET_CODE (other) == MEM | |
2336 | && ! CONSTANT_P (x) | |
2337 | && GET_CODE (x) != REG | |
2338 | && GET_CODE (x) != SUBREG) | |
2339 | || (GET_CODE (other) == REG | |
2340 | && (REGNO (other) < FIRST_PSEUDO_REGISTER | |
2341 | || reg_mentioned_p (other, x)))) | |
2342 | { | |
2343 | rtx temp = gen_reg_rtx (GET_MODE (x)); | |
2344 | emit_move_insn (temp, x); | |
2345 | return temp; | |
2346 | } | |
2347 | return x; | |
2348 | } | |
2349 | \f | |
2350 | /* Emission of insns (adding them to the doubly-linked list). */ | |
2351 | ||
2352 | /* Return the first insn of the current sequence or current function. */ | |
2353 | ||
2354 | rtx | |
2355 | get_insns () | |
2356 | { | |
2357 | return first_insn; | |
2358 | } | |
2359 | ||
2360 | /* Return the last insn emitted in current sequence or current function. */ | |
2361 | ||
2362 | rtx | |
2363 | get_last_insn () | |
2364 | { | |
2365 | return last_insn; | |
2366 | } | |
2367 | ||
2368 | /* Specify a new insn as the last in the chain. */ | |
2369 | ||
2370 | void | |
2371 | set_last_insn (insn) | |
2372 | rtx insn; | |
2373 | { | |
2374 | if (NEXT_INSN (insn) != 0) | |
2375 | abort (); | |
2376 | last_insn = insn; | |
2377 | } | |
2378 | ||
2379 | /* Return the last insn emitted, even if it is in a sequence now pushed. */ | |
2380 | ||
2381 | rtx | |
2382 | get_last_insn_anywhere () | |
2383 | { | |
2384 | struct sequence_stack *stack; | |
2385 | if (last_insn) | |
2386 | return last_insn; | |
0a893c29 | 2387 | for (stack = seq_stack; stack; stack = stack->next) |
15bbde2b | 2388 | if (stack->last != 0) |
2389 | return stack->last; | |
2390 | return 0; | |
2391 | } | |
2392 | ||
2393 | /* Return a number larger than any instruction's uid in this function. */ | |
2394 | ||
2395 | int | |
2396 | get_max_uid () | |
2397 | { | |
2398 | return cur_insn_uid; | |
2399 | } | |
90b89d2c | 2400 | |
214d02d0 | 2401 | /* Renumber instructions so that no instruction UIDs are wasted. */ |
2402 | ||
90b89d2c | 2403 | void |
214d02d0 | 2404 | renumber_insns (stream) |
2405 | FILE *stream; | |
90b89d2c | 2406 | { |
2407 | rtx insn; | |
90b89d2c | 2408 | |
214d02d0 | 2409 | /* If we're not supposed to renumber instructions, don't. */ |
2410 | if (!flag_renumber_insns) | |
2411 | return; | |
2412 | ||
90b89d2c | 2413 | /* If there aren't that many instructions, then it's not really |
2414 | worth renumbering them. */ | |
214d02d0 | 2415 | if (flag_renumber_insns == 1 && get_max_uid () < 25000) |
90b89d2c | 2416 | return; |
2417 | ||
2418 | cur_insn_uid = 1; | |
2419 | ||
2420 | for (insn = get_insns (); insn; insn = NEXT_INSN (insn)) | |
214d02d0 | 2421 | { |
2422 | if (stream) | |
d823ba47 | 2423 | fprintf (stream, "Renumbering insn %d to %d\n", |
214d02d0 | 2424 | INSN_UID (insn), cur_insn_uid); |
2425 | INSN_UID (insn) = cur_insn_uid++; | |
2426 | } | |
90b89d2c | 2427 | } |
15bbde2b | 2428 | \f |
2429 | /* Return the next insn. If it is a SEQUENCE, return the first insn | |
2430 | of the sequence. */ | |
2431 | ||
2432 | rtx | |
2433 | next_insn (insn) | |
2434 | rtx insn; | |
2435 | { | |
2436 | if (insn) | |
2437 | { | |
2438 | insn = NEXT_INSN (insn); | |
2439 | if (insn && GET_CODE (insn) == INSN | |
2440 | && GET_CODE (PATTERN (insn)) == SEQUENCE) | |
2441 | insn = XVECEXP (PATTERN (insn), 0, 0); | |
2442 | } | |
2443 | ||
2444 | return insn; | |
2445 | } | |
2446 | ||
2447 | /* Return the previous insn. If it is a SEQUENCE, return the last insn | |
2448 | of the sequence. */ | |
2449 | ||
2450 | rtx | |
2451 | previous_insn (insn) | |
2452 | rtx insn; | |
2453 | { | |
2454 | if (insn) | |
2455 | { | |
2456 | insn = PREV_INSN (insn); | |
2457 | if (insn && GET_CODE (insn) == INSN | |
2458 | && GET_CODE (PATTERN (insn)) == SEQUENCE) | |
2459 | insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1); | |
2460 | } | |
2461 | ||
2462 | return insn; | |
2463 | } | |
2464 | ||
2465 | /* Return the next insn after INSN that is not a NOTE. This routine does not | |
2466 | look inside SEQUENCEs. */ | |
2467 | ||
2468 | rtx | |
2469 | next_nonnote_insn (insn) | |
2470 | rtx insn; | |
2471 | { | |
2472 | while (insn) | |
2473 | { | |
2474 | insn = NEXT_INSN (insn); | |
2475 | if (insn == 0 || GET_CODE (insn) != NOTE) | |
2476 | break; | |
2477 | } | |
2478 | ||
2479 | return insn; | |
2480 | } | |
2481 | ||
2482 | /* Return the previous insn before INSN that is not a NOTE. This routine does | |
2483 | not look inside SEQUENCEs. */ | |
2484 | ||
2485 | rtx | |
2486 | prev_nonnote_insn (insn) | |
2487 | rtx insn; | |
2488 | { | |
2489 | while (insn) | |
2490 | { | |
2491 | insn = PREV_INSN (insn); | |
2492 | if (insn == 0 || GET_CODE (insn) != NOTE) | |
2493 | break; | |
2494 | } | |
2495 | ||
2496 | return insn; | |
2497 | } | |
2498 | ||
2499 | /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN; | |
2500 | or 0, if there is none. This routine does not look inside | |
a92771b8 | 2501 | SEQUENCEs. */ |
15bbde2b | 2502 | |
2503 | rtx | |
2504 | next_real_insn (insn) | |
2505 | rtx insn; | |
2506 | { | |
2507 | while (insn) | |
2508 | { | |
2509 | insn = NEXT_INSN (insn); | |
2510 | if (insn == 0 || GET_CODE (insn) == INSN | |
2511 | || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN) | |
2512 | break; | |
2513 | } | |
2514 | ||
2515 | return insn; | |
2516 | } | |
2517 | ||
2518 | /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN; | |
2519 | or 0, if there is none. This routine does not look inside | |
2520 | SEQUENCEs. */ | |
2521 | ||
2522 | rtx | |
2523 | prev_real_insn (insn) | |
2524 | rtx insn; | |
2525 | { | |
2526 | while (insn) | |
2527 | { | |
2528 | insn = PREV_INSN (insn); | |
2529 | if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN | |
2530 | || GET_CODE (insn) == JUMP_INSN) | |
2531 | break; | |
2532 | } | |
2533 | ||
2534 | return insn; | |
2535 | } | |
2536 | ||
2537 | /* Find the next insn after INSN that really does something. This routine | |
2538 | does not look inside SEQUENCEs. Until reload has completed, this is the | |
2539 | same as next_real_insn. */ | |
2540 | ||
2215ca0d | 2541 | int |
2542 | active_insn_p (insn) | |
2543 | rtx insn; | |
2544 | { | |
2545 | return (GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN | |
2546 | || (GET_CODE (insn) == INSN | |
2547 | && (! reload_completed | |
2548 | || (GET_CODE (PATTERN (insn)) != USE | |
2549 | && GET_CODE (PATTERN (insn)) != CLOBBER)))); | |
2550 | } | |
2551 | ||
15bbde2b | 2552 | rtx |
2553 | next_active_insn (insn) | |
2554 | rtx insn; | |
2555 | { | |
2556 | while (insn) | |
2557 | { | |
2558 | insn = NEXT_INSN (insn); | |
2215ca0d | 2559 | if (insn == 0 || active_insn_p (insn)) |
15bbde2b | 2560 | break; |
2561 | } | |
2562 | ||
2563 | return insn; | |
2564 | } | |
2565 | ||
2566 | /* Find the last insn before INSN that really does something. This routine | |
2567 | does not look inside SEQUENCEs. Until reload has completed, this is the | |
2568 | same as prev_real_insn. */ | |
2569 | ||
2570 | rtx | |
2571 | prev_active_insn (insn) | |
2572 | rtx insn; | |
2573 | { | |
2574 | while (insn) | |
2575 | { | |
2576 | insn = PREV_INSN (insn); | |
2215ca0d | 2577 | if (insn == 0 || active_insn_p (insn)) |
15bbde2b | 2578 | break; |
2579 | } | |
2580 | ||
2581 | return insn; | |
2582 | } | |
2583 | ||
2584 | /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */ | |
2585 | ||
2586 | rtx | |
2587 | next_label (insn) | |
2588 | rtx insn; | |
2589 | { | |
2590 | while (insn) | |
2591 | { | |
2592 | insn = NEXT_INSN (insn); | |
2593 | if (insn == 0 || GET_CODE (insn) == CODE_LABEL) | |
2594 | break; | |
2595 | } | |
2596 | ||
2597 | return insn; | |
2598 | } | |
2599 | ||
2600 | /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */ | |
2601 | ||
2602 | rtx | |
2603 | prev_label (insn) | |
2604 | rtx insn; | |
2605 | { | |
2606 | while (insn) | |
2607 | { | |
2608 | insn = PREV_INSN (insn); | |
2609 | if (insn == 0 || GET_CODE (insn) == CODE_LABEL) | |
2610 | break; | |
2611 | } | |
2612 | ||
2613 | return insn; | |
2614 | } | |
2615 | \f | |
2616 | #ifdef HAVE_cc0 | |
b15e0bba | 2617 | /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER |
2618 | and REG_CC_USER notes so we can find it. */ | |
2619 | ||
2620 | void | |
2621 | link_cc0_insns (insn) | |
2622 | rtx insn; | |
2623 | { | |
2624 | rtx user = next_nonnote_insn (insn); | |
2625 | ||
2626 | if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE) | |
2627 | user = XVECEXP (PATTERN (user), 0, 0); | |
2628 | ||
7014838c | 2629 | REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn, |
2630 | REG_NOTES (user)); | |
3ad7bb1c | 2631 | REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_CC_USER, user, REG_NOTES (insn)); |
b15e0bba | 2632 | } |
2633 | ||
15bbde2b | 2634 | /* Return the next insn that uses CC0 after INSN, which is assumed to |
2635 | set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter | |
2636 | applied to the result of this function should yield INSN). | |
2637 | ||
2638 | Normally, this is simply the next insn. However, if a REG_CC_USER note | |
2639 | is present, it contains the insn that uses CC0. | |
2640 | ||
2641 | Return 0 if we can't find the insn. */ | |
2642 | ||
2643 | rtx | |
2644 | next_cc0_user (insn) | |
2645 | rtx insn; | |
2646 | { | |
b572011e | 2647 | rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX); |
15bbde2b | 2648 | |
2649 | if (note) | |
2650 | return XEXP (note, 0); | |
2651 | ||
2652 | insn = next_nonnote_insn (insn); | |
2653 | if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE) | |
2654 | insn = XVECEXP (PATTERN (insn), 0, 0); | |
2655 | ||
9204e736 | 2656 | if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn))) |
15bbde2b | 2657 | return insn; |
2658 | ||
2659 | return 0; | |
2660 | } | |
2661 | ||
2662 | /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER | |
2663 | note, it is the previous insn. */ | |
2664 | ||
2665 | rtx | |
2666 | prev_cc0_setter (insn) | |
2667 | rtx insn; | |
2668 | { | |
b572011e | 2669 | rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX); |
15bbde2b | 2670 | |
2671 | if (note) | |
2672 | return XEXP (note, 0); | |
2673 | ||
2674 | insn = prev_nonnote_insn (insn); | |
2675 | if (! sets_cc0_p (PATTERN (insn))) | |
2676 | abort (); | |
2677 | ||
2678 | return insn; | |
2679 | } | |
2680 | #endif | |
344dc2fa | 2681 | |
2682 | /* Increment the label uses for all labels present in rtx. */ | |
2683 | ||
2684 | static void | |
2685 | mark_label_nuses(x) | |
2686 | rtx x; | |
2687 | { | |
19cb6b50 | 2688 | enum rtx_code code; |
2689 | int i, j; | |
2690 | const char *fmt; | |
344dc2fa | 2691 | |
2692 | code = GET_CODE (x); | |
2693 | if (code == LABEL_REF) | |
2694 | LABEL_NUSES (XEXP (x, 0))++; | |
2695 | ||
2696 | fmt = GET_RTX_FORMAT (code); | |
2697 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
2698 | { | |
2699 | if (fmt[i] == 'e') | |
2700 | mark_label_nuses (XEXP (x, i)); | |
2701 | else if (fmt[i] == 'E') | |
2702 | for (j = XVECLEN (x, i) - 1; j >= 0; j--) | |
2703 | mark_label_nuses (XVECEXP (x, i, j)); | |
2704 | } | |
2705 | } | |
2706 | ||
15bbde2b | 2707 | \f |
2708 | /* Try splitting insns that can be split for better scheduling. | |
2709 | PAT is the pattern which might split. | |
2710 | TRIAL is the insn providing PAT. | |
0e69a50a | 2711 | LAST is non-zero if we should return the last insn of the sequence produced. |
15bbde2b | 2712 | |
2713 | If this routine succeeds in splitting, it returns the first or last | |
0e69a50a | 2714 | replacement insn depending on the value of LAST. Otherwise, it |
15bbde2b | 2715 | returns TRIAL. If the insn to be returned can be split, it will be. */ |
2716 | ||
2717 | rtx | |
0e69a50a | 2718 | try_split (pat, trial, last) |
15bbde2b | 2719 | rtx pat, trial; |
0e69a50a | 2720 | int last; |
15bbde2b | 2721 | { |
2722 | rtx before = PREV_INSN (trial); | |
2723 | rtx after = NEXT_INSN (trial); | |
15bbde2b | 2724 | int has_barrier = 0; |
2725 | rtx tem; | |
3cd757b1 | 2726 | rtx note, seq; |
2727 | int probability; | |
2728 | ||
2729 | if (any_condjump_p (trial) | |
2730 | && (note = find_reg_note (trial, REG_BR_PROB, 0))) | |
2731 | split_branch_probability = INTVAL (XEXP (note, 0)); | |
2732 | probability = split_branch_probability; | |
2733 | ||
2734 | seq = split_insns (pat, trial); | |
2735 | ||
2736 | split_branch_probability = -1; | |
15bbde2b | 2737 | |
2738 | /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER. | |
2739 | We may need to handle this specially. */ | |
2740 | if (after && GET_CODE (after) == BARRIER) | |
2741 | { | |
2742 | has_barrier = 1; | |
2743 | after = NEXT_INSN (after); | |
2744 | } | |
2745 | ||
2746 | if (seq) | |
2747 | { | |
2748 | /* SEQ can either be a SEQUENCE or the pattern of a single insn. | |
2749 | The latter case will normally arise only when being done so that | |
2750 | it, in turn, will be split (SFmode on the 29k is an example). */ | |
2751 | if (GET_CODE (seq) == SEQUENCE) | |
2752 | { | |
3cd757b1 | 2753 | int i, njumps = 0; |
d823ba47 | 2754 | |
2755 | /* Avoid infinite loop if any insn of the result matches | |
5262c253 | 2756 | the original pattern. */ |
2757 | for (i = 0; i < XVECLEN (seq, 0); i++) | |
d823ba47 | 2758 | if (GET_CODE (XVECEXP (seq, 0, i)) == INSN |
5262c253 | 2759 | && rtx_equal_p (PATTERN (XVECEXP (seq, 0, i)), pat)) |
d823ba47 | 2760 | return trial; |
5262c253 | 2761 | |
5377f687 | 2762 | /* Mark labels. */ |
2763 | for (i = XVECLEN (seq, 0) - 1; i >= 0; i--) | |
2764 | if (GET_CODE (XVECEXP (seq, 0, i)) == JUMP_INSN) | |
3cd757b1 | 2765 | { |
2766 | rtx insn = XVECEXP (seq, 0, i); | |
2767 | mark_jump_label (PATTERN (insn), | |
2768 | XVECEXP (seq, 0, i), 0); | |
2769 | njumps++; | |
2770 | if (probability != -1 | |
2771 | && any_condjump_p (insn) | |
2772 | && !find_reg_note (insn, REG_BR_PROB, 0)) | |
2773 | { | |
2774 | /* We can preserve the REG_BR_PROB notes only if exactly | |
2775 | one jump is created, otherwise the machinde description | |
2776 | is responsible for this step using | |
2777 | split_branch_probability variable. */ | |
2778 | if (njumps != 1) | |
2779 | abort (); | |
2780 | REG_NOTES (insn) | |
2781 | = gen_rtx_EXPR_LIST (REG_BR_PROB, | |
2782 | GEN_INT (probability), | |
2783 | REG_NOTES (insn)); | |
2784 | } | |
2785 | } | |
381eb1e7 | 2786 | |
1b3a64a8 | 2787 | /* If we are splitting a CALL_INSN, look for the CALL_INSN |
2788 | in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */ | |
2789 | if (GET_CODE (trial) == CALL_INSN) | |
2790 | for (i = XVECLEN (seq, 0) - 1; i >= 0; i--) | |
2791 | if (GET_CODE (XVECEXP (seq, 0, i)) == CALL_INSN) | |
2792 | CALL_INSN_FUNCTION_USAGE (XVECEXP (seq, 0, i)) | |
2793 | = CALL_INSN_FUNCTION_USAGE (trial); | |
2794 | ||
381eb1e7 | 2795 | /* Copy notes, particularly those related to the CFG. */ |
2796 | for (note = REG_NOTES (trial); note ; note = XEXP (note, 1)) | |
2797 | { | |
2798 | switch (REG_NOTE_KIND (note)) | |
2799 | { | |
2800 | case REG_EH_REGION: | |
2801 | for (i = XVECLEN (seq, 0) - 1; i >= 0; i--) | |
2802 | { | |
2803 | rtx insn = XVECEXP (seq, 0, i); | |
2804 | if (GET_CODE (insn) == CALL_INSN | |
2805 | || (flag_non_call_exceptions | |
2806 | && may_trap_p (PATTERN (insn)))) | |
2807 | REG_NOTES (insn) | |
2808 | = gen_rtx_EXPR_LIST (REG_EH_REGION, | |
2809 | XEXP (note, 0), | |
2810 | REG_NOTES (insn)); | |
2811 | } | |
2812 | break; | |
2813 | ||
2814 | case REG_NORETURN: | |
2815 | case REG_SETJMP: | |
2816 | case REG_ALWAYS_RETURN: | |
2817 | for (i = XVECLEN (seq, 0) - 1; i >= 0; i--) | |
2818 | { | |
2819 | rtx insn = XVECEXP (seq, 0, i); | |
2820 | if (GET_CODE (insn) == CALL_INSN) | |
2821 | REG_NOTES (insn) | |
2822 | = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note), | |
2823 | XEXP (note, 0), | |
2824 | REG_NOTES (insn)); | |
2825 | } | |
2826 | break; | |
2827 | ||
2828 | case REG_NON_LOCAL_GOTO: | |
2829 | for (i = XVECLEN (seq, 0) - 1; i >= 0; i--) | |
2830 | { | |
2831 | rtx insn = XVECEXP (seq, 0, i); | |
2832 | if (GET_CODE (insn) == JUMP_INSN) | |
2833 | REG_NOTES (insn) | |
2834 | = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note), | |
2835 | XEXP (note, 0), | |
2836 | REG_NOTES (insn)); | |
2837 | } | |
2838 | break; | |
2839 | ||
2840 | default: | |
2841 | break; | |
2842 | } | |
2843 | } | |
5bb27a4b | 2844 | |
344dc2fa | 2845 | /* If there are LABELS inside the split insns increment the |
2846 | usage count so we don't delete the label. */ | |
2847 | if (GET_CODE (trial) == INSN) | |
2848 | for (i = XVECLEN (seq, 0) - 1; i >= 0; i--) | |
2849 | if (GET_CODE (XVECEXP (seq, 0, i)) == INSN) | |
2850 | mark_label_nuses (PATTERN (XVECEXP (seq, 0, i))); | |
2851 | ||
9dda7915 | 2852 | tem = emit_insn_after (seq, trial); |
15bbde2b | 2853 | |
e4bf866d | 2854 | delete_related_insns (trial); |
15bbde2b | 2855 | if (has_barrier) |
2856 | emit_barrier_after (tem); | |
0e69a50a | 2857 | |
2858 | /* Recursively call try_split for each new insn created; by the | |
2859 | time control returns here that insn will be fully split, so | |
2860 | set LAST and continue from the insn after the one returned. | |
06343e77 | 2861 | We can't use next_active_insn here since AFTER may be a note. |
ab6683d6 | 2862 | Ignore deleted insns, which can be occur if not optimizing. */ |
9204e736 | 2863 | for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem)) |
2864 | if (! INSN_DELETED_P (tem) && INSN_P (tem)) | |
06343e77 | 2865 | tem = try_split (PATTERN (tem), tem, 1); |
15bbde2b | 2866 | } |
2867 | /* Avoid infinite loop if the result matches the original pattern. */ | |
2868 | else if (rtx_equal_p (seq, pat)) | |
2869 | return trial; | |
2870 | else | |
2871 | { | |
2872 | PATTERN (trial) = seq; | |
2873 | INSN_CODE (trial) = -1; | |
0e69a50a | 2874 | try_split (seq, trial, last); |
15bbde2b | 2875 | } |
2876 | ||
0e69a50a | 2877 | /* Return either the first or the last insn, depending on which was |
2878 | requested. */ | |
d823ba47 | 2879 | return last |
3cd757b1 | 2880 | ? (after ? PREV_INSN (after) : last_insn) |
2881 | : NEXT_INSN (before); | |
15bbde2b | 2882 | } |
2883 | ||
2884 | return trial; | |
2885 | } | |
2886 | \f | |
2887 | /* Make and return an INSN rtx, initializing all its slots. | |
6a84e367 | 2888 | Store PATTERN in the pattern slots. */ |
15bbde2b | 2889 | |
2890 | rtx | |
6a84e367 | 2891 | make_insn_raw (pattern) |
15bbde2b | 2892 | rtx pattern; |
15bbde2b | 2893 | { |
19cb6b50 | 2894 | rtx insn; |
15bbde2b | 2895 | |
d7c47c0e | 2896 | insn = rtx_alloc (INSN); |
15bbde2b | 2897 | |
575333f9 | 2898 | INSN_UID (insn) = cur_insn_uid++; |
15bbde2b | 2899 | PATTERN (insn) = pattern; |
2900 | INSN_CODE (insn) = -1; | |
fc92fa61 | 2901 | LOG_LINKS (insn) = NULL; |
2902 | REG_NOTES (insn) = NULL; | |
15bbde2b | 2903 | |
fe7f701d | 2904 | #ifdef ENABLE_RTL_CHECKING |
2905 | if (insn | |
9204e736 | 2906 | && INSN_P (insn) |
fe7f701d | 2907 | && (returnjump_p (insn) |
2908 | || (GET_CODE (insn) == SET | |
2909 | && SET_DEST (insn) == pc_rtx))) | |
2910 | { | |
2911 | warning ("ICE: emit_insn used where emit_jump_insn needed:\n"); | |
2912 | debug_rtx (insn); | |
2913 | } | |
2914 | #endif | |
d823ba47 | 2915 | |
15bbde2b | 2916 | return insn; |
2917 | } | |
2918 | ||
2919 | /* Like `make_insn' but make a JUMP_INSN instead of an insn. */ | |
2920 | ||
2921 | static rtx | |
6a84e367 | 2922 | make_jump_insn_raw (pattern) |
15bbde2b | 2923 | rtx pattern; |
15bbde2b | 2924 | { |
19cb6b50 | 2925 | rtx insn; |
15bbde2b | 2926 | |
6a84e367 | 2927 | insn = rtx_alloc (JUMP_INSN); |
fc92fa61 | 2928 | INSN_UID (insn) = cur_insn_uid++; |
15bbde2b | 2929 | |
2930 | PATTERN (insn) = pattern; | |
2931 | INSN_CODE (insn) = -1; | |
fc92fa61 | 2932 | LOG_LINKS (insn) = NULL; |
2933 | REG_NOTES (insn) = NULL; | |
2934 | JUMP_LABEL (insn) = NULL; | |
15bbde2b | 2935 | |
2936 | return insn; | |
2937 | } | |
6e911104 | 2938 | |
2939 | /* Like `make_insn' but make a CALL_INSN instead of an insn. */ | |
2940 | ||
2941 | static rtx | |
2942 | make_call_insn_raw (pattern) | |
2943 | rtx pattern; | |
2944 | { | |
19cb6b50 | 2945 | rtx insn; |
6e911104 | 2946 | |
2947 | insn = rtx_alloc (CALL_INSN); | |
2948 | INSN_UID (insn) = cur_insn_uid++; | |
2949 | ||
2950 | PATTERN (insn) = pattern; | |
2951 | INSN_CODE (insn) = -1; | |
2952 | LOG_LINKS (insn) = NULL; | |
2953 | REG_NOTES (insn) = NULL; | |
2954 | CALL_INSN_FUNCTION_USAGE (insn) = NULL; | |
2955 | ||
2956 | return insn; | |
2957 | } | |
15bbde2b | 2958 | \f |
2959 | /* Add INSN to the end of the doubly-linked list. | |
2960 | INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */ | |
2961 | ||
2962 | void | |
2963 | add_insn (insn) | |
19cb6b50 | 2964 | rtx insn; |
15bbde2b | 2965 | { |
2966 | PREV_INSN (insn) = last_insn; | |
2967 | NEXT_INSN (insn) = 0; | |
2968 | ||
2969 | if (NULL != last_insn) | |
2970 | NEXT_INSN (last_insn) = insn; | |
2971 | ||
2972 | if (NULL == first_insn) | |
2973 | first_insn = insn; | |
2974 | ||
2975 | last_insn = insn; | |
2976 | } | |
2977 | ||
312de84d | 2978 | /* Add INSN into the doubly-linked list after insn AFTER. This and |
2979 | the next should be the only functions called to insert an insn once | |
f65c10c0 | 2980 | delay slots have been filled since only they know how to update a |
312de84d | 2981 | SEQUENCE. */ |
15bbde2b | 2982 | |
2983 | void | |
2984 | add_insn_after (insn, after) | |
2985 | rtx insn, after; | |
2986 | { | |
2987 | rtx next = NEXT_INSN (after); | |
9dda7915 | 2988 | basic_block bb; |
15bbde2b | 2989 | |
9ea33026 | 2990 | if (optimize && INSN_DELETED_P (after)) |
f65c10c0 | 2991 | abort (); |
2992 | ||
15bbde2b | 2993 | NEXT_INSN (insn) = next; |
2994 | PREV_INSN (insn) = after; | |
2995 | ||
2996 | if (next) | |
2997 | { | |
2998 | PREV_INSN (next) = insn; | |
2999 | if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE) | |
3000 | PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn; | |
3001 | } | |
3002 | else if (last_insn == after) | |
3003 | last_insn = insn; | |
3004 | else | |
3005 | { | |
0a893c29 | 3006 | struct sequence_stack *stack = seq_stack; |
15bbde2b | 3007 | /* Scan all pending sequences too. */ |
3008 | for (; stack; stack = stack->next) | |
3009 | if (after == stack->last) | |
398f4855 | 3010 | { |
3011 | stack->last = insn; | |
3012 | break; | |
3013 | } | |
312de84d | 3014 | |
3015 | if (stack == 0) | |
3016 | abort (); | |
15bbde2b | 3017 | } |
3018 | ||
9dda7915 | 3019 | if (basic_block_for_insn |
3020 | && (unsigned int)INSN_UID (after) < basic_block_for_insn->num_elements | |
3021 | && (bb = BLOCK_FOR_INSN (after))) | |
3022 | { | |
3023 | set_block_for_insn (insn, bb); | |
3024 | /* Should not happen as first in the BB is always | |
3025 | eigther NOTE or LABEL. */ | |
3026 | if (bb->end == after | |
3027 | /* Avoid clobbering of structure when creating new BB. */ | |
3028 | && GET_CODE (insn) != BARRIER | |
3029 | && (GET_CODE (insn) != NOTE | |
3030 | || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK)) | |
3031 | bb->end = insn; | |
3032 | } | |
3033 | ||
15bbde2b | 3034 | NEXT_INSN (after) = insn; |
3035 | if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE) | |
3036 | { | |
3037 | rtx sequence = PATTERN (after); | |
3038 | NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn; | |
3039 | } | |
3040 | } | |
3041 | ||
312de84d | 3042 | /* Add INSN into the doubly-linked list before insn BEFORE. This and |
3043 | the previous should be the only functions called to insert an insn once | |
f65c10c0 | 3044 | delay slots have been filled since only they know how to update a |
312de84d | 3045 | SEQUENCE. */ |
3046 | ||
3047 | void | |
3048 | add_insn_before (insn, before) | |
3049 | rtx insn, before; | |
3050 | { | |
3051 | rtx prev = PREV_INSN (before); | |
9dda7915 | 3052 | basic_block bb; |
312de84d | 3053 | |
9ea33026 | 3054 | if (optimize && INSN_DELETED_P (before)) |
f65c10c0 | 3055 | abort (); |
3056 | ||
312de84d | 3057 | PREV_INSN (insn) = prev; |
3058 | NEXT_INSN (insn) = before; | |
3059 | ||
3060 | if (prev) | |
3061 | { | |
3062 | NEXT_INSN (prev) = insn; | |
3063 | if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE) | |
3064 | { | |
3065 | rtx sequence = PATTERN (prev); | |
3066 | NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn; | |
3067 | } | |
3068 | } | |
3069 | else if (first_insn == before) | |
3070 | first_insn = insn; | |
3071 | else | |
3072 | { | |
0a893c29 | 3073 | struct sequence_stack *stack = seq_stack; |
312de84d | 3074 | /* Scan all pending sequences too. */ |
3075 | for (; stack; stack = stack->next) | |
3076 | if (before == stack->first) | |
398f4855 | 3077 | { |
3078 | stack->first = insn; | |
3079 | break; | |
3080 | } | |
312de84d | 3081 | |
3082 | if (stack == 0) | |
3083 | abort (); | |
3084 | } | |
3085 | ||
9dda7915 | 3086 | if (basic_block_for_insn |
3087 | && (unsigned int)INSN_UID (before) < basic_block_for_insn->num_elements | |
3088 | && (bb = BLOCK_FOR_INSN (before))) | |
3089 | { | |
3090 | set_block_for_insn (insn, bb); | |
3091 | /* Should not happen as first in the BB is always | |
3092 | eigther NOTE or LABEl. */ | |
3093 | if (bb->head == insn | |
3094 | /* Avoid clobbering of structure when creating new BB. */ | |
3095 | && GET_CODE (insn) != BARRIER | |
3096 | && (GET_CODE (insn) != NOTE | |
3097 | || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK)) | |
3098 | abort (); | |
3099 | } | |
3100 | ||
312de84d | 3101 | PREV_INSN (before) = insn; |
3102 | if (GET_CODE (before) == INSN && GET_CODE (PATTERN (before)) == SEQUENCE) | |
3103 | PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn; | |
3104 | } | |
3105 | ||
7ddcf2bf | 3106 | /* Remove an insn from its doubly-linked list. This function knows how |
3107 | to handle sequences. */ | |
3108 | void | |
3109 | remove_insn (insn) | |
3110 | rtx insn; | |
3111 | { | |
3112 | rtx next = NEXT_INSN (insn); | |
3113 | rtx prev = PREV_INSN (insn); | |
e4bf866d | 3114 | basic_block bb; |
3115 | ||
7ddcf2bf | 3116 | if (prev) |
3117 | { | |
3118 | NEXT_INSN (prev) = next; | |
3119 | if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE) | |
3120 | { | |
3121 | rtx sequence = PATTERN (prev); | |
3122 | NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next; | |
3123 | } | |
3124 | } | |
3125 | else if (first_insn == insn) | |
3126 | first_insn = next; | |
3127 | else | |
3128 | { | |
0a893c29 | 3129 | struct sequence_stack *stack = seq_stack; |
7ddcf2bf | 3130 | /* Scan all pending sequences too. */ |
3131 | for (; stack; stack = stack->next) | |
3132 | if (insn == stack->first) | |
3133 | { | |
3134 | stack->first = next; | |
3135 | break; | |
3136 | } | |
3137 | ||
3138 | if (stack == 0) | |
3139 | abort (); | |
3140 | } | |
3141 | ||
3142 | if (next) | |
3143 | { | |
3144 | PREV_INSN (next) = prev; | |
3145 | if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE) | |
3146 | PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev; | |
3147 | } | |
3148 | else if (last_insn == insn) | |
3149 | last_insn = prev; | |
3150 | else | |
3151 | { | |
0a893c29 | 3152 | struct sequence_stack *stack = seq_stack; |
7ddcf2bf | 3153 | /* Scan all pending sequences too. */ |
3154 | for (; stack; stack = stack->next) | |
3155 | if (insn == stack->last) | |
3156 | { | |
3157 | stack->last = prev; | |
3158 | break; | |
3159 | } | |
3160 | ||
3161 | if (stack == 0) | |
3162 | abort (); | |
3163 | } | |
e4bf866d | 3164 | if (basic_block_for_insn |
3165 | && (unsigned int)INSN_UID (insn) < basic_block_for_insn->num_elements | |
3166 | && (bb = BLOCK_FOR_INSN (insn))) | |
3167 | { | |
3168 | if (bb->head == insn) | |
3169 | { | |
3170 | /* Never ever delete the basic block note without deleting whole basic | |
3171 | block. */ | |
3172 | if (GET_CODE (insn) == NOTE) | |
3173 | abort (); | |
3174 | bb->head = next; | |
3175 | } | |
3176 | if (bb->end == insn) | |
3177 | bb->end = prev; | |
3178 | } | |
7ddcf2bf | 3179 | } |
3180 | ||
15bbde2b | 3181 | /* Delete all insns made since FROM. |
3182 | FROM becomes the new last instruction. */ | |
3183 | ||
3184 | void | |
3185 | delete_insns_since (from) | |
3186 | rtx from; | |
3187 | { | |
3188 | if (from == 0) | |
3189 | first_insn = 0; | |
3190 | else | |
3191 | NEXT_INSN (from) = 0; | |
3192 | last_insn = from; | |
3193 | } | |
3194 | ||
34e2ddcd | 3195 | /* This function is deprecated, please use sequences instead. |
3196 | ||
3197 | Move a consecutive bunch of insns to a different place in the chain. | |
15bbde2b | 3198 | The insns to be moved are those between FROM and TO. |
3199 | They are moved to a new position after the insn AFTER. | |
3200 | AFTER must not be FROM or TO or any insn in between. | |
3201 | ||
3202 | This function does not know about SEQUENCEs and hence should not be | |
3203 | called after delay-slot filling has been done. */ | |
3204 | ||
3205 | void | |
9dda7915 | 3206 | reorder_insns_nobb (from, to, after) |
15bbde2b | 3207 | rtx from, to, after; |
3208 | { | |
3209 | /* Splice this bunch out of where it is now. */ | |
3210 | if (PREV_INSN (from)) | |
3211 | NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to); | |
3212 | if (NEXT_INSN (to)) | |
3213 | PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from); | |
3214 | if (last_insn == to) | |
3215 | last_insn = PREV_INSN (from); | |
3216 | if (first_insn == from) | |
3217 | first_insn = NEXT_INSN (to); | |
3218 | ||
3219 | /* Make the new neighbors point to it and it to them. */ | |
3220 | if (NEXT_INSN (after)) | |
3221 | PREV_INSN (NEXT_INSN (after)) = to; | |
3222 | ||
3223 | NEXT_INSN (to) = NEXT_INSN (after); | |
3224 | PREV_INSN (from) = after; | |
3225 | NEXT_INSN (after) = from; | |
3226 | if (after == last_insn) | |
3227 | last_insn = to; | |
3228 | } | |
3229 | ||
9dda7915 | 3230 | /* Same as function above, but take care to update BB boundaries. */ |
3231 | void | |
3232 | reorder_insns (from, to, after) | |
3233 | rtx from, to, after; | |
3234 | { | |
3235 | rtx prev = PREV_INSN (from); | |
3236 | basic_block bb, bb2; | |
3237 | ||
3238 | reorder_insns_nobb (from, to, after); | |
3239 | ||
3240 | if (basic_block_for_insn | |
3241 | && (unsigned int)INSN_UID (after) < basic_block_for_insn->num_elements | |
3242 | && (bb = BLOCK_FOR_INSN (after))) | |
3243 | { | |
3244 | rtx x; | |
3245 | ||
3246 | if (basic_block_for_insn | |
3247 | && (unsigned int)INSN_UID (from) < basic_block_for_insn->num_elements | |
3248 | && (bb2 = BLOCK_FOR_INSN (from))) | |
3249 | { | |
3250 | if (bb2->end == to) | |
3251 | bb2->end = prev; | |
3252 | } | |
3253 | ||
3254 | if (bb->end == after) | |
3255 | bb->end = to; | |
3256 | ||
3257 | for (x = from; x != NEXT_INSN (to); x = NEXT_INSN (x)) | |
3258 | set_block_for_insn (x, bb); | |
3259 | } | |
3260 | } | |
3261 | ||
15bbde2b | 3262 | /* Return the line note insn preceding INSN. */ |
3263 | ||
3264 | static rtx | |
3265 | find_line_note (insn) | |
3266 | rtx insn; | |
3267 | { | |
3268 | if (no_line_numbers) | |
3269 | return 0; | |
3270 | ||
3271 | for (; insn; insn = PREV_INSN (insn)) | |
3272 | if (GET_CODE (insn) == NOTE | |
3273 | && NOTE_LINE_NUMBER (insn) >= 0) | |
3274 | break; | |
3275 | ||
3276 | return insn; | |
3277 | } | |
3278 | ||
3279 | /* Like reorder_insns, but inserts line notes to preserve the line numbers | |
3280 | of the moved insns when debugging. This may insert a note between AFTER | |
3281 | and FROM, and another one after TO. */ | |
3282 | ||
3283 | void | |
3284 | reorder_insns_with_line_notes (from, to, after) | |
3285 | rtx from, to, after; | |
3286 | { | |
3287 | rtx from_line = find_line_note (from); | |
3288 | rtx after_line = find_line_note (after); | |
3289 | ||
3290 | reorder_insns (from, to, after); | |
3291 | ||
3292 | if (from_line == after_line) | |
3293 | return; | |
3294 | ||
3295 | if (from_line) | |
3296 | emit_line_note_after (NOTE_SOURCE_FILE (from_line), | |
3297 | NOTE_LINE_NUMBER (from_line), | |
3298 | after); | |
3299 | if (after_line) | |
3300 | emit_line_note_after (NOTE_SOURCE_FILE (after_line), | |
3301 | NOTE_LINE_NUMBER (after_line), | |
3302 | to); | |
3303 | } | |
90b89d2c | 3304 | |
0a78547b | 3305 | /* Remove unnecessary notes from the instruction stream. */ |
90b89d2c | 3306 | |
3307 | void | |
0a78547b | 3308 | remove_unnecessary_notes () |
90b89d2c | 3309 | { |
92cfc4a8 | 3310 | rtx block_stack = NULL_RTX; |
3311 | rtx eh_stack = NULL_RTX; | |
90b89d2c | 3312 | rtx insn; |
3313 | rtx next; | |
92cfc4a8 | 3314 | rtx tmp; |
90b89d2c | 3315 | |
f1ab82be | 3316 | /* We must not remove the first instruction in the function because |
3317 | the compiler depends on the first instruction being a note. */ | |
90b89d2c | 3318 | for (insn = NEXT_INSN (get_insns ()); insn; insn = next) |
3319 | { | |
3320 | /* Remember what's next. */ | |
3321 | next = NEXT_INSN (insn); | |
3322 | ||
3323 | /* We're only interested in notes. */ | |
3324 | if (GET_CODE (insn) != NOTE) | |
3325 | continue; | |
3326 | ||
92cfc4a8 | 3327 | switch (NOTE_LINE_NUMBER (insn)) |
5846cb0f | 3328 | { |
92cfc4a8 | 3329 | case NOTE_INSN_DELETED: |
3330 | remove_insn (insn); | |
3331 | break; | |
3332 | ||
3333 | case NOTE_INSN_EH_REGION_BEG: | |
3334 | eh_stack = alloc_INSN_LIST (insn, eh_stack); | |
3335 | break; | |
3336 | ||
3337 | case NOTE_INSN_EH_REGION_END: | |
3338 | /* Too many end notes. */ | |
3339 | if (eh_stack == NULL_RTX) | |
3340 | abort (); | |
3341 | /* Mismatched nesting. */ | |
3342 | if (NOTE_EH_HANDLER (XEXP (eh_stack, 0)) != NOTE_EH_HANDLER (insn)) | |
3343 | abort (); | |
3344 | tmp = eh_stack; | |
3345 | eh_stack = XEXP (eh_stack, 1); | |
3346 | free_INSN_LIST_node (tmp); | |
3347 | break; | |
3348 | ||
3349 | case NOTE_INSN_BLOCK_BEG: | |
3350 | /* By now, all notes indicating lexical blocks should have | |
3351 | NOTE_BLOCK filled in. */ | |
3352 | if (NOTE_BLOCK (insn) == NULL_TREE) | |
3353 | abort (); | |
3354 | block_stack = alloc_INSN_LIST (insn, block_stack); | |
3355 | break; | |
3356 | ||
3357 | case NOTE_INSN_BLOCK_END: | |
3358 | /* Too many end notes. */ | |
3359 | if (block_stack == NULL_RTX) | |
3360 | abort (); | |
3361 | /* Mismatched nesting. */ | |
3362 | if (NOTE_BLOCK (XEXP (block_stack, 0)) != NOTE_BLOCK (insn)) | |
3363 | abort (); | |
3364 | tmp = block_stack; | |
3365 | block_stack = XEXP (block_stack, 1); | |
3366 | free_INSN_LIST_node (tmp); | |
3367 | ||
5846cb0f | 3368 | /* Scan back to see if there are any non-note instructions |
3369 | between INSN and the beginning of this block. If not, | |
3370 | then there is no PC range in the generated code that will | |
3371 | actually be in this block, so there's no point in | |
3372 | remembering the existence of the block. */ | |
92cfc4a8 | 3373 | for (tmp = PREV_INSN (insn); tmp ; tmp = PREV_INSN (tmp)) |
5846cb0f | 3374 | { |
3375 | /* This block contains a real instruction. Note that we | |
3376 | don't include labels; if the only thing in the block | |
3377 | is a label, then there are still no PC values that | |
3378 | lie within the block. */ | |
92cfc4a8 | 3379 | if (INSN_P (tmp)) |
5846cb0f | 3380 | break; |
3381 | ||
3382 | /* We're only interested in NOTEs. */ | |
92cfc4a8 | 3383 | if (GET_CODE (tmp) != NOTE) |
5846cb0f | 3384 | continue; |
3385 | ||
92cfc4a8 | 3386 | if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_BEG) |
5846cb0f | 3387 | { |
b29760a8 | 3388 | /* We just verified that this BLOCK matches us with |
3389 | the block_stack check above. Never delete the | |
3390 | BLOCK for the outermost scope of the function; we | |
3391 | can refer to names from that scope even if the | |
3392 | block notes are messed up. */ | |
3393 | if (! is_body_block (NOTE_BLOCK (insn)) | |
3394 | && (*debug_hooks->ignore_block) (NOTE_BLOCK (insn))) | |
e33dbbdf | 3395 | { |
92cfc4a8 | 3396 | remove_insn (tmp); |
e33dbbdf | 3397 | remove_insn (insn); |
3398 | } | |
5846cb0f | 3399 | break; |
3400 | } | |
92cfc4a8 | 3401 | else if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_END) |
5846cb0f | 3402 | /* There's a nested block. We need to leave the |
3403 | current block in place since otherwise the debugger | |
3404 | wouldn't be able to show symbols from our block in | |
3405 | the nested block. */ | |
3406 | break; | |
3407 | } | |
3408 | } | |
90b89d2c | 3409 | } |
92cfc4a8 | 3410 | |
3411 | /* Too many begin notes. */ | |
3412 | if (block_stack || eh_stack) | |
3413 | abort (); | |
90b89d2c | 3414 | } |
3415 | ||
15bbde2b | 3416 | \f |
3417 | /* Emit an insn of given code and pattern | |
3418 | at a specified place within the doubly-linked list. */ | |
3419 | ||
3420 | /* Make an instruction with body PATTERN | |
3421 | and output it before the instruction BEFORE. */ | |
3422 | ||
3423 | rtx | |
3424 | emit_insn_before (pattern, before) | |
19cb6b50 | 3425 | rtx pattern, before; |
15bbde2b | 3426 | { |
19cb6b50 | 3427 | rtx insn = before; |
15bbde2b | 3428 | |
3429 | if (GET_CODE (pattern) == SEQUENCE) | |
3430 | { | |
19cb6b50 | 3431 | int i; |
15bbde2b | 3432 | |
3433 | for (i = 0; i < XVECLEN (pattern, 0); i++) | |
3434 | { | |
3435 | insn = XVECEXP (pattern, 0, i); | |
312de84d | 3436 | add_insn_before (insn, before); |
15bbde2b | 3437 | } |
15bbde2b | 3438 | } |
3439 | else | |
3440 | { | |
6a84e367 | 3441 | insn = make_insn_raw (pattern); |
312de84d | 3442 | add_insn_before (insn, before); |
15bbde2b | 3443 | } |
3444 | ||
3445 | return insn; | |
3446 | } | |
3447 | ||
3448 | /* Make an instruction with body PATTERN and code JUMP_INSN | |
3449 | and output it before the instruction BEFORE. */ | |
3450 | ||
3451 | rtx | |
3452 | emit_jump_insn_before (pattern, before) | |
19cb6b50 | 3453 | rtx pattern, before; |
15bbde2b | 3454 | { |
19cb6b50 | 3455 | rtx insn; |
15bbde2b | 3456 | |
3457 | if (GET_CODE (pattern) == SEQUENCE) | |
3458 | insn = emit_insn_before (pattern, before); | |
3459 | else | |
3460 | { | |
8f060628 | 3461 | insn = make_jump_insn_raw (pattern); |
312de84d | 3462 | add_insn_before (insn, before); |
15bbde2b | 3463 | } |
3464 | ||
3465 | return insn; | |
3466 | } | |
3467 | ||
3468 | /* Make an instruction with body PATTERN and code CALL_INSN | |
3469 | and output it before the instruction BEFORE. */ | |
3470 | ||
3471 | rtx | |
3472 | emit_call_insn_before (pattern, before) | |
19cb6b50 | 3473 | rtx pattern, before; |
15bbde2b | 3474 | { |
19cb6b50 | 3475 | rtx insn; |
6e911104 | 3476 | |
3477 | if (GET_CODE (pattern) == SEQUENCE) | |
3478 | insn = emit_insn_before (pattern, before); | |
3479 | else | |
3480 | { | |
3481 | insn = make_call_insn_raw (pattern); | |
312de84d | 3482 | add_insn_before (insn, before); |
6e911104 | 3483 | PUT_CODE (insn, CALL_INSN); |
3484 | } | |
3485 | ||
15bbde2b | 3486 | return insn; |
3487 | } | |
3488 | ||
3489 | /* Make an insn of code BARRIER | |
71caadc0 | 3490 | and output it before the insn BEFORE. */ |
15bbde2b | 3491 | |
3492 | rtx | |
3493 | emit_barrier_before (before) | |
19cb6b50 | 3494 | rtx before; |
15bbde2b | 3495 | { |
19cb6b50 | 3496 | rtx insn = rtx_alloc (BARRIER); |
15bbde2b | 3497 | |
3498 | INSN_UID (insn) = cur_insn_uid++; | |
3499 | ||
312de84d | 3500 | add_insn_before (insn, before); |
15bbde2b | 3501 | return insn; |
3502 | } | |
3503 | ||
71caadc0 | 3504 | /* Emit the label LABEL before the insn BEFORE. */ |
3505 | ||
3506 | rtx | |
3507 | emit_label_before (label, before) | |
3508 | rtx label, before; | |
3509 | { | |
3510 | /* This can be called twice for the same label as a result of the | |
3511 | confusion that follows a syntax error! So make it harmless. */ | |
3512 | if (INSN_UID (label) == 0) | |
3513 | { | |
3514 | INSN_UID (label) = cur_insn_uid++; | |
3515 | add_insn_before (label, before); | |
3516 | } | |
3517 | ||
3518 | return label; | |
3519 | } | |
3520 | ||
15bbde2b | 3521 | /* Emit a note of subtype SUBTYPE before the insn BEFORE. */ |
3522 | ||
3523 | rtx | |
3524 | emit_note_before (subtype, before) | |
3525 | int subtype; | |
3526 | rtx before; | |
3527 | { | |
19cb6b50 | 3528 | rtx note = rtx_alloc (NOTE); |
15bbde2b | 3529 | INSN_UID (note) = cur_insn_uid++; |
3530 | NOTE_SOURCE_FILE (note) = 0; | |
3531 | NOTE_LINE_NUMBER (note) = subtype; | |
3532 | ||
312de84d | 3533 | add_insn_before (note, before); |
15bbde2b | 3534 | return note; |
3535 | } | |
3536 | \f | |
3537 | /* Make an insn of code INSN with body PATTERN | |
3538 | and output it after the insn AFTER. */ | |
3539 | ||
3540 | rtx | |
3541 | emit_insn_after (pattern, after) | |
19cb6b50 | 3542 | rtx pattern, after; |
15bbde2b | 3543 | { |
19cb6b50 | 3544 | rtx insn = after; |
15bbde2b | 3545 | |
3546 | if (GET_CODE (pattern) == SEQUENCE) | |
3547 | { | |
19cb6b50 | 3548 | int i; |
15bbde2b | 3549 | |
3550 | for (i = 0; i < XVECLEN (pattern, 0); i++) | |
3551 | { | |
3552 | insn = XVECEXP (pattern, 0, i); | |
3553 | add_insn_after (insn, after); | |
3554 | after = insn; | |
3555 | } | |
15bbde2b | 3556 | } |
3557 | else | |
3558 | { | |
6a84e367 | 3559 | insn = make_insn_raw (pattern); |
15bbde2b | 3560 | add_insn_after (insn, after); |
3561 | } | |
3562 | ||
3563 | return insn; | |
3564 | } | |
3565 | ||
1bea98fb | 3566 | /* Similar to emit_insn_after, except that line notes are to be inserted so |
3567 | as to act as if this insn were at FROM. */ | |
3568 | ||
3569 | void | |
3570 | emit_insn_after_with_line_notes (pattern, after, from) | |
3571 | rtx pattern, after, from; | |
3572 | { | |
3573 | rtx from_line = find_line_note (from); | |
3574 | rtx after_line = find_line_note (after); | |
3575 | rtx insn = emit_insn_after (pattern, after); | |
3576 | ||
3577 | if (from_line) | |
3578 | emit_line_note_after (NOTE_SOURCE_FILE (from_line), | |
3579 | NOTE_LINE_NUMBER (from_line), | |
3580 | after); | |
3581 | ||
3582 | if (after_line) | |
3583 | emit_line_note_after (NOTE_SOURCE_FILE (after_line), | |
3584 | NOTE_LINE_NUMBER (after_line), | |
3585 | insn); | |
3586 | } | |
3587 | ||
15bbde2b | 3588 | /* Make an insn of code JUMP_INSN with body PATTERN |
3589 | and output it after the insn AFTER. */ | |
3590 | ||
3591 | rtx | |
3592 | emit_jump_insn_after (pattern, after) | |
19cb6b50 | 3593 | rtx pattern, after; |
15bbde2b | 3594 | { |
19cb6b50 | 3595 | rtx insn; |
15bbde2b | 3596 | |
3597 | if (GET_CODE (pattern) == SEQUENCE) | |
3598 | insn = emit_insn_after (pattern, after); | |
3599 | else | |
3600 | { | |
8f060628 | 3601 | insn = make_jump_insn_raw (pattern); |
15bbde2b | 3602 | add_insn_after (insn, after); |
3603 | } | |
3604 | ||
3605 | return insn; | |
3606 | } | |
3607 | ||
3608 | /* Make an insn of code BARRIER | |
3609 | and output it after the insn AFTER. */ | |
3610 | ||
3611 | rtx | |
3612 | emit_barrier_after (after) | |
19cb6b50 | 3613 | rtx after; |
15bbde2b | 3614 | { |
19cb6b50 | 3615 | rtx insn = rtx_alloc (BARRIER); |
15bbde2b | 3616 | |
3617 | INSN_UID (insn) = cur_insn_uid++; | |
3618 | ||
3619 | add_insn_after (insn, after); | |
3620 | return insn; | |
3621 | } | |
3622 | ||
3623 | /* Emit the label LABEL after the insn AFTER. */ | |
3624 | ||
3625 | rtx | |
3626 | emit_label_after (label, after) | |
3627 | rtx label, after; | |
3628 | { | |
3629 | /* This can be called twice for the same label | |
3630 | as a result of the confusion that follows a syntax error! | |
3631 | So make it harmless. */ | |
3632 | if (INSN_UID (label) == 0) | |
3633 | { | |
3634 | INSN_UID (label) = cur_insn_uid++; | |
3635 | add_insn_after (label, after); | |
3636 | } | |
3637 | ||
3638 | return label; | |
3639 | } | |
3640 | ||
3641 | /* Emit a note of subtype SUBTYPE after the insn AFTER. */ | |
3642 | ||
3643 | rtx | |
3644 | emit_note_after (subtype, after) | |
3645 | int subtype; | |
3646 | rtx after; | |
3647 | { | |
19cb6b50 | 3648 | rtx note = rtx_alloc (NOTE); |
15bbde2b | 3649 | INSN_UID (note) = cur_insn_uid++; |
3650 | NOTE_SOURCE_FILE (note) = 0; | |
3651 | NOTE_LINE_NUMBER (note) = subtype; | |
3652 | add_insn_after (note, after); | |
3653 | return note; | |
3654 | } | |
3655 | ||
3656 | /* Emit a line note for FILE and LINE after the insn AFTER. */ | |
3657 | ||
3658 | rtx | |
3659 | emit_line_note_after (file, line, after) | |
9a356c3c | 3660 | const char *file; |
15bbde2b | 3661 | int line; |
3662 | rtx after; | |
3663 | { | |
19cb6b50 | 3664 | rtx note; |
15bbde2b | 3665 | |
3666 | if (no_line_numbers && line > 0) | |
3667 | { | |
3668 | cur_insn_uid++; | |
3669 | return 0; | |
3670 | } | |
3671 | ||
3672 | note = rtx_alloc (NOTE); | |
3673 | INSN_UID (note) = cur_insn_uid++; | |
3674 | NOTE_SOURCE_FILE (note) = file; | |
3675 | NOTE_LINE_NUMBER (note) = line; | |
3676 | add_insn_after (note, after); | |
3677 | return note; | |
3678 | } | |
3679 | \f | |
3680 | /* Make an insn of code INSN with pattern PATTERN | |
3681 | and add it to the end of the doubly-linked list. | |
3682 | If PATTERN is a SEQUENCE, take the elements of it | |
3683 | and emit an insn for each element. | |
3684 | ||
3685 | Returns the last insn emitted. */ | |
3686 | ||
3687 | rtx | |
3688 | emit_insn (pattern) | |
3689 | rtx pattern; | |
3690 | { | |
3691 | rtx insn = last_insn; | |
3692 | ||
3693 | if (GET_CODE (pattern) == SEQUENCE) | |
3694 | { | |
19cb6b50 | 3695 | int i; |
15bbde2b | 3696 | |
3697 | for (i = 0; i < XVECLEN (pattern, 0); i++) | |
3698 | { | |
3699 | insn = XVECEXP (pattern, 0, i); | |
3700 | add_insn (insn); | |
3701 | } | |
15bbde2b | 3702 | } |
3703 | else | |
3704 | { | |
6a84e367 | 3705 | insn = make_insn_raw (pattern); |
15bbde2b | 3706 | add_insn (insn); |
3707 | } | |
3708 | ||
3709 | return insn; | |
3710 | } | |
3711 | ||
3712 | /* Emit the insns in a chain starting with INSN. | |
3713 | Return the last insn emitted. */ | |
3714 | ||
3715 | rtx | |
3716 | emit_insns (insn) | |
3717 | rtx insn; | |
3718 | { | |
3719 | rtx last = 0; | |
3720 | ||
3721 | while (insn) | |
3722 | { | |
3723 | rtx next = NEXT_INSN (insn); | |
3724 | add_insn (insn); | |
3725 | last = insn; | |
3726 | insn = next; | |
3727 | } | |
3728 | ||
3729 | return last; | |
3730 | } | |
3731 | ||
3732 | /* Emit the insns in a chain starting with INSN and place them in front of | |
3733 | the insn BEFORE. Return the last insn emitted. */ | |
3734 | ||
3735 | rtx | |
3736 | emit_insns_before (insn, before) | |
3737 | rtx insn; | |
3738 | rtx before; | |
3739 | { | |
3740 | rtx last = 0; | |
3741 | ||
3742 | while (insn) | |
3743 | { | |
3744 | rtx next = NEXT_INSN (insn); | |
312de84d | 3745 | add_insn_before (insn, before); |
15bbde2b | 3746 | last = insn; |
3747 | insn = next; | |
3748 | } | |
3749 | ||
3750 | return last; | |
3751 | } | |
3752 | ||
b36b07d8 | 3753 | /* Emit the insns in a chain starting with FIRST and place them in back of |
3754 | the insn AFTER. Return the last insn emitted. */ | |
3755 | ||
3756 | rtx | |
3757 | emit_insns_after (first, after) | |
19cb6b50 | 3758 | rtx first; |
3759 | rtx after; | |
b36b07d8 | 3760 | { |
19cb6b50 | 3761 | rtx last; |
3762 | rtx after_after; | |
9dda7915 | 3763 | basic_block bb; |
b36b07d8 | 3764 | |
3765 | if (!after) | |
3766 | abort (); | |
3767 | ||
3768 | if (!first) | |
b36d64df | 3769 | return after; |
b36b07d8 | 3770 | |
9dda7915 | 3771 | if (basic_block_for_insn |
3772 | && (unsigned int)INSN_UID (after) < basic_block_for_insn->num_elements | |
3773 | && (bb = BLOCK_FOR_INSN (after))) | |
3774 | { | |
3775 | for (last = first; NEXT_INSN (last); last = NEXT_INSN (last)) | |
3776 | set_block_for_insn (last, bb); | |
3777 | set_block_for_insn (last, bb); | |
3778 | if (bb->end == after) | |
3779 | bb->end = last; | |
3780 | } | |
3781 | else | |
3782 | for (last = first; NEXT_INSN (last); last = NEXT_INSN (last)) | |
3783 | continue; | |
b36b07d8 | 3784 | |
3785 | after_after = NEXT_INSN (after); | |
3786 | ||
3787 | NEXT_INSN (after) = first; | |
3788 | PREV_INSN (first) = after; | |
3789 | NEXT_INSN (last) = after_after; | |
3790 | if (after_after) | |
3791 | PREV_INSN (after_after) = last; | |
3792 | ||
0c905390 | 3793 | if (after == last_insn) |
3794 | last_insn = last; | |
b36b07d8 | 3795 | return last; |
3796 | } | |
3797 | ||
15bbde2b | 3798 | /* Make an insn of code JUMP_INSN with pattern PATTERN |
3799 | and add it to the end of the doubly-linked list. */ | |
3800 | ||
3801 | rtx | |
3802 | emit_jump_insn (pattern) | |
3803 | rtx pattern; | |
3804 | { | |
3805 | if (GET_CODE (pattern) == SEQUENCE) | |
3806 | return emit_insn (pattern); | |
3807 | else | |
3808 | { | |
19cb6b50 | 3809 | rtx insn = make_jump_insn_raw (pattern); |
15bbde2b | 3810 | add_insn (insn); |
3811 | return insn; | |
3812 | } | |
3813 | } | |
3814 | ||
3815 | /* Make an insn of code CALL_INSN with pattern PATTERN | |
3816 | and add it to the end of the doubly-linked list. */ | |
3817 | ||
3818 | rtx | |
3819 | emit_call_insn (pattern) | |
3820 | rtx pattern; | |
3821 | { | |
3822 | if (GET_CODE (pattern) == SEQUENCE) | |
3823 | return emit_insn (pattern); | |
3824 | else | |
3825 | { | |
19cb6b50 | 3826 | rtx insn = make_call_insn_raw (pattern); |
15bbde2b | 3827 | add_insn (insn); |
3828 | PUT_CODE (insn, CALL_INSN); | |
3829 | return insn; | |
3830 | } | |
3831 | } | |
3832 | ||
3833 | /* Add the label LABEL to the end of the doubly-linked list. */ | |
3834 | ||
3835 | rtx | |
3836 | emit_label (label) | |
3837 | rtx label; | |
3838 | { | |
3839 | /* This can be called twice for the same label | |
3840 | as a result of the confusion that follows a syntax error! | |
3841 | So make it harmless. */ | |
3842 | if (INSN_UID (label) == 0) | |
3843 | { | |
3844 | INSN_UID (label) = cur_insn_uid++; | |
3845 | add_insn (label); | |
3846 | } | |
3847 | return label; | |
3848 | } | |
3849 | ||
3850 | /* Make an insn of code BARRIER | |
3851 | and add it to the end of the doubly-linked list. */ | |
3852 | ||
3853 | rtx | |
3854 | emit_barrier () | |
3855 | { | |
19cb6b50 | 3856 | rtx barrier = rtx_alloc (BARRIER); |
15bbde2b | 3857 | INSN_UID (barrier) = cur_insn_uid++; |
3858 | add_insn (barrier); | |
3859 | return barrier; | |
3860 | } | |
3861 | ||
3862 | /* Make an insn of code NOTE | |
3863 | with data-fields specified by FILE and LINE | |
3864 | and add it to the end of the doubly-linked list, | |
3865 | but only if line-numbers are desired for debugging info. */ | |
3866 | ||
3867 | rtx | |
3868 | emit_line_note (file, line) | |
9a356c3c | 3869 | const char *file; |
15bbde2b | 3870 | int line; |
3871 | { | |
21b005ed | 3872 | set_file_and_line_for_stmt (file, line); |
15bbde2b | 3873 | |
3874 | #if 0 | |
3875 | if (no_line_numbers) | |
3876 | return 0; | |
3877 | #endif | |
3878 | ||
3879 | return emit_note (file, line); | |
3880 | } | |
3881 | ||
3882 | /* Make an insn of code NOTE | |
3883 | with data-fields specified by FILE and LINE | |
3884 | and add it to the end of the doubly-linked list. | |
3885 | If it is a line-number NOTE, omit it if it matches the previous one. */ | |
3886 | ||
3887 | rtx | |
3888 | emit_note (file, line) | |
9a356c3c | 3889 | const char *file; |
15bbde2b | 3890 | int line; |
3891 | { | |
19cb6b50 | 3892 | rtx note; |
15bbde2b | 3893 | |
3894 | if (line > 0) | |
3895 | { | |
3896 | if (file && last_filename && !strcmp (file, last_filename) | |
3897 | && line == last_linenum) | |
3898 | return 0; | |
3899 | last_filename = file; | |
3900 | last_linenum = line; | |
3901 | } | |
3902 | ||
3903 | if (no_line_numbers && line > 0) | |
3904 | { | |
3905 | cur_insn_uid++; | |
3906 | return 0; | |
3907 | } | |
3908 | ||
3909 | note = rtx_alloc (NOTE); | |
3910 | INSN_UID (note) = cur_insn_uid++; | |
3911 | NOTE_SOURCE_FILE (note) = file; | |
3912 | NOTE_LINE_NUMBER (note) = line; | |
3913 | add_insn (note); | |
3914 | return note; | |
3915 | } | |
3916 | ||
8d54063f | 3917 | /* Emit a NOTE, and don't omit it even if LINE is the previous note. */ |
15bbde2b | 3918 | |
3919 | rtx | |
3920 | emit_line_note_force (file, line) | |
9a356c3c | 3921 | const char *file; |
15bbde2b | 3922 | int line; |
3923 | { | |
3924 | last_linenum = -1; | |
3925 | return emit_line_note (file, line); | |
3926 | } | |
3927 | ||
3928 | /* Cause next statement to emit a line note even if the line number | |
3929 | has not changed. This is used at the beginning of a function. */ | |
3930 | ||
3931 | void | |
3932 | force_next_line_note () | |
3933 | { | |
3934 | last_linenum = -1; | |
3935 | } | |
f1934a33 | 3936 | |
3937 | /* Place a note of KIND on insn INSN with DATUM as the datum. If a | |
6312a35e | 3938 | note of this type already exists, remove it first. */ |
f1934a33 | 3939 | |
d823ba47 | 3940 | void |
f1934a33 | 3941 | set_unique_reg_note (insn, kind, datum) |
3942 | rtx insn; | |
3943 | enum reg_note kind; | |
3944 | rtx datum; | |
3945 | { | |
3946 | rtx note = find_reg_note (insn, kind, NULL_RTX); | |
3947 | ||
3948 | /* First remove the note if there already is one. */ | |
d823ba47 | 3949 | if (note) |
f1934a33 | 3950 | remove_note (insn, note); |
3951 | ||
3952 | REG_NOTES (insn) = gen_rtx_EXPR_LIST (kind, datum, REG_NOTES (insn)); | |
3953 | } | |
15bbde2b | 3954 | \f |
3955 | /* Return an indication of which type of insn should have X as a body. | |
3956 | The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */ | |
3957 | ||
3958 | enum rtx_code | |
3959 | classify_insn (x) | |
3960 | rtx x; | |
3961 | { | |
3962 | if (GET_CODE (x) == CODE_LABEL) | |
3963 | return CODE_LABEL; | |
3964 | if (GET_CODE (x) == CALL) | |
3965 | return CALL_INSN; | |
3966 | if (GET_CODE (x) == RETURN) | |
3967 | return JUMP_INSN; | |
3968 | if (GET_CODE (x) == SET) | |
3969 | { | |
3970 | if (SET_DEST (x) == pc_rtx) | |
3971 | return JUMP_INSN; | |
3972 | else if (GET_CODE (SET_SRC (x)) == CALL) | |
3973 | return CALL_INSN; | |
3974 | else | |
3975 | return INSN; | |
3976 | } | |
3977 | if (GET_CODE (x) == PARALLEL) | |
3978 | { | |
19cb6b50 | 3979 | int j; |
15bbde2b | 3980 | for (j = XVECLEN (x, 0) - 1; j >= 0; j--) |
3981 | if (GET_CODE (XVECEXP (x, 0, j)) == CALL) | |
3982 | return CALL_INSN; | |
3983 | else if (GET_CODE (XVECEXP (x, 0, j)) == SET | |
3984 | && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx) | |
3985 | return JUMP_INSN; | |
3986 | else if (GET_CODE (XVECEXP (x, 0, j)) == SET | |
3987 | && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL) | |
3988 | return CALL_INSN; | |
3989 | } | |
3990 | return INSN; | |
3991 | } | |
3992 | ||
3993 | /* Emit the rtl pattern X as an appropriate kind of insn. | |
3994 | If X is a label, it is simply added into the insn chain. */ | |
3995 | ||
3996 | rtx | |
3997 | emit (x) | |
3998 | rtx x; | |
3999 | { | |
4000 | enum rtx_code code = classify_insn (x); | |
4001 | ||
4002 | if (code == CODE_LABEL) | |
4003 | return emit_label (x); | |
4004 | else if (code == INSN) | |
4005 | return emit_insn (x); | |
4006 | else if (code == JUMP_INSN) | |
4007 | { | |
19cb6b50 | 4008 | rtx insn = emit_jump_insn (x); |
b2816317 | 4009 | if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN) |
15bbde2b | 4010 | return emit_barrier (); |
4011 | return insn; | |
4012 | } | |
4013 | else if (code == CALL_INSN) | |
4014 | return emit_call_insn (x); | |
4015 | else | |
4016 | abort (); | |
4017 | } | |
4018 | \f | |
b49854c6 | 4019 | /* Begin emitting insns to a sequence which can be packaged in an |
4020 | RTL_EXPR. If this sequence will contain something that might cause | |
4021 | the compiler to pop arguments to function calls (because those | |
4022 | pops have previously been deferred; see INHIBIT_DEFER_POP for more | |
4023 | details), use do_pending_stack_adjust before calling this function. | |
4024 | That will ensure that the deferred pops are not accidentally | |
9588521d | 4025 | emitted in the middle of this sequence. */ |
15bbde2b | 4026 | |
4027 | void | |
4028 | start_sequence () | |
4029 | { | |
4030 | struct sequence_stack *tem; | |
4031 | ||
1bfd55c5 | 4032 | tem = (struct sequence_stack *) xmalloc (sizeof (struct sequence_stack)); |
15bbde2b | 4033 | |
0a893c29 | 4034 | tem->next = seq_stack; |
15bbde2b | 4035 | tem->first = first_insn; |
4036 | tem->last = last_insn; | |
961819fb | 4037 | tem->sequence_rtl_expr = seq_rtl_expr; |
15bbde2b | 4038 | |
0a893c29 | 4039 | seq_stack = tem; |
15bbde2b | 4040 | |
4041 | first_insn = 0; | |
4042 | last_insn = 0; | |
4043 | } | |
4044 | ||
961819fb | 4045 | /* Similarly, but indicate that this sequence will be placed in T, an |
4046 | RTL_EXPR. See the documentation for start_sequence for more | |
4047 | information about how to use this function. */ | |
4048 | ||
4049 | void | |
4050 | start_sequence_for_rtl_expr (t) | |
4051 | tree t; | |
4052 | { | |
4053 | start_sequence (); | |
4054 | ||
4055 | seq_rtl_expr = t; | |
4056 | } | |
4057 | ||
b49854c6 | 4058 | /* Set up the insn chain starting with FIRST as the current sequence, |
4059 | saving the previously current one. See the documentation for | |
4060 | start_sequence for more information about how to use this function. */ | |
15bbde2b | 4061 | |
4062 | void | |
4063 | push_to_sequence (first) | |
4064 | rtx first; | |
4065 | { | |
4066 | rtx last; | |
4067 | ||
4068 | start_sequence (); | |
4069 | ||
4070 | for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last)); | |
4071 | ||
4072 | first_insn = first; | |
4073 | last_insn = last; | |
4074 | } | |
4075 | ||
78147e84 | 4076 | /* Set up the insn chain from a chain stort in FIRST to LAST. */ |
4077 | ||
4078 | void | |
4079 | push_to_full_sequence (first, last) | |
4080 | rtx first, last; | |
4081 | { | |
4082 | start_sequence (); | |
4083 | first_insn = first; | |
4084 | last_insn = last; | |
4085 | /* We really should have the end of the insn chain here. */ | |
4086 | if (last && NEXT_INSN (last)) | |
4087 | abort (); | |
4088 | } | |
4089 | ||
ab74c92f | 4090 | /* Set up the outer-level insn chain |
4091 | as the current sequence, saving the previously current one. */ | |
4092 | ||
4093 | void | |
4094 | push_topmost_sequence () | |
4095 | { | |
2041cfd9 | 4096 | struct sequence_stack *stack, *top = NULL; |
ab74c92f | 4097 | |
4098 | start_sequence (); | |
4099 | ||
0a893c29 | 4100 | for (stack = seq_stack; stack; stack = stack->next) |
ab74c92f | 4101 | top = stack; |
4102 | ||
4103 | first_insn = top->first; | |
4104 | last_insn = top->last; | |
961819fb | 4105 | seq_rtl_expr = top->sequence_rtl_expr; |
ab74c92f | 4106 | } |
4107 | ||
4108 | /* After emitting to the outer-level insn chain, update the outer-level | |
4109 | insn chain, and restore the previous saved state. */ | |
4110 | ||
4111 | void | |
4112 | pop_topmost_sequence () | |
4113 | { | |
2041cfd9 | 4114 | struct sequence_stack *stack, *top = NULL; |
ab74c92f | 4115 | |
0a893c29 | 4116 | for (stack = seq_stack; stack; stack = stack->next) |
ab74c92f | 4117 | top = stack; |
4118 | ||
4119 | top->first = first_insn; | |
4120 | top->last = last_insn; | |
961819fb | 4121 | /* ??? Why don't we save seq_rtl_expr here? */ |
ab74c92f | 4122 | |
4123 | end_sequence (); | |
4124 | } | |
4125 | ||
15bbde2b | 4126 | /* After emitting to a sequence, restore previous saved state. |
4127 | ||
b49854c6 | 4128 | To get the contents of the sequence just made, you must call |
d823ba47 | 4129 | `gen_sequence' *before* calling here. |
b49854c6 | 4130 | |
4131 | If the compiler might have deferred popping arguments while | |
4132 | generating this sequence, and this sequence will not be immediately | |
4133 | inserted into the instruction stream, use do_pending_stack_adjust | |
4134 | before calling gen_sequence. That will ensure that the deferred | |
4135 | pops are inserted into this sequence, and not into some random | |
4136 | location in the instruction stream. See INHIBIT_DEFER_POP for more | |
4137 | information about deferred popping of arguments. */ | |
15bbde2b | 4138 | |
4139 | void | |
4140 | end_sequence () | |
4141 | { | |
0a893c29 | 4142 | struct sequence_stack *tem = seq_stack; |
15bbde2b | 4143 | |
4144 | first_insn = tem->first; | |
4145 | last_insn = tem->last; | |
961819fb | 4146 | seq_rtl_expr = tem->sequence_rtl_expr; |
0a893c29 | 4147 | seq_stack = tem->next; |
15bbde2b | 4148 | |
1bfd55c5 | 4149 | free (tem); |
15bbde2b | 4150 | } |
4151 | ||
78147e84 | 4152 | /* This works like end_sequence, but records the old sequence in FIRST |
4153 | and LAST. */ | |
4154 | ||
4155 | void | |
4156 | end_full_sequence (first, last) | |
4157 | rtx *first, *last; | |
4158 | { | |
4159 | *first = first_insn; | |
4160 | *last = last_insn; | |
4161 | end_sequence(); | |
4162 | } | |
4163 | ||
15bbde2b | 4164 | /* Return 1 if currently emitting into a sequence. */ |
4165 | ||
4166 | int | |
4167 | in_sequence_p () | |
4168 | { | |
0a893c29 | 4169 | return seq_stack != 0; |
15bbde2b | 4170 | } |
4171 | ||
4172 | /* Generate a SEQUENCE rtx containing the insns already emitted | |
4173 | to the current sequence. | |
4174 | ||
4175 | This is how the gen_... function from a DEFINE_EXPAND | |
4176 | constructs the SEQUENCE that it returns. */ | |
4177 | ||
4178 | rtx | |
4179 | gen_sequence () | |
4180 | { | |
4181 | rtx result; | |
4182 | rtx tem; | |
15bbde2b | 4183 | int i; |
4184 | int len; | |
4185 | ||
4186 | /* Count the insns in the chain. */ | |
4187 | len = 0; | |
4188 | for (tem = first_insn; tem; tem = NEXT_INSN (tem)) | |
4189 | len++; | |
4190 | ||
88bbcaa6 | 4191 | /* If only one insn, return it rather than a SEQUENCE. |
15bbde2b | 4192 | (Now that we cache SEQUENCE expressions, it isn't worth special-casing |
d823ba47 | 4193 | the case of an empty list.) |
88bbcaa6 | 4194 | We only return the pattern of an insn if its code is INSN and it |
4195 | has no notes. This ensures that no information gets lost. */ | |
15bbde2b | 4196 | if (len == 1 |
447a9eb9 | 4197 | && ! RTX_FRAME_RELATED_P (first_insn) |
88bbcaa6 | 4198 | && GET_CODE (first_insn) == INSN |
6312a35e | 4199 | /* Don't throw away any reg notes. */ |
88bbcaa6 | 4200 | && REG_NOTES (first_insn) == 0) |
d7c47c0e | 4201 | return PATTERN (first_insn); |
15bbde2b | 4202 | |
d7c47c0e | 4203 | result = gen_rtx_SEQUENCE (VOIDmode, rtvec_alloc (len)); |
15bbde2b | 4204 | |
4205 | for (i = 0, tem = first_insn; tem; tem = NEXT_INSN (tem), i++) | |
4206 | XVECEXP (result, 0, i) = tem; | |
4207 | ||
4208 | return result; | |
4209 | } | |
4210 | \f | |
02ebfa52 | 4211 | /* Put the various virtual registers into REGNO_REG_RTX. */ |
4212 | ||
4213 | void | |
0a893c29 | 4214 | init_virtual_regs (es) |
4215 | struct emit_status *es; | |
02ebfa52 | 4216 | { |
0a893c29 | 4217 | rtx *ptr = es->x_regno_reg_rtx; |
4218 | ptr[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx; | |
4219 | ptr[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx; | |
4220 | ptr[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx; | |
4221 | ptr[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx; | |
4222 | ptr[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx; | |
4223 | } | |
4224 | ||
4225 | void | |
4226 | clear_emit_caches () | |
4227 | { | |
4228 | int i; | |
4229 | ||
4230 | /* Clear the start_sequence/gen_sequence cache. */ | |
0a893c29 | 4231 | for (i = 0; i < SEQUENCE_RESULT_SIZE; i++) |
4232 | sequence_result[i] = 0; | |
4233 | free_insn = 0; | |
02ebfa52 | 4234 | } |
928d57e3 | 4235 | \f |
4236 | /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */ | |
4237 | static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS]; | |
4238 | static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS]; | |
4239 | static int copy_insn_n_scratches; | |
4240 | ||
4241 | /* When an insn is being copied by copy_insn_1, this is nonzero if we have | |
4242 | copied an ASM_OPERANDS. | |
4243 | In that case, it is the original input-operand vector. */ | |
4244 | static rtvec orig_asm_operands_vector; | |
4245 | ||
4246 | /* When an insn is being copied by copy_insn_1, this is nonzero if we have | |
4247 | copied an ASM_OPERANDS. | |
4248 | In that case, it is the copied input-operand vector. */ | |
4249 | static rtvec copy_asm_operands_vector; | |
4250 | ||
4251 | /* Likewise for the constraints vector. */ | |
4252 | static rtvec orig_asm_constraints_vector; | |
4253 | static rtvec copy_asm_constraints_vector; | |
4254 | ||
4255 | /* Recursively create a new copy of an rtx for copy_insn. | |
4256 | This function differs from copy_rtx in that it handles SCRATCHes and | |
4257 | ASM_OPERANDs properly. | |
4258 | Normally, this function is not used directly; use copy_insn as front end. | |
4259 | However, you could first copy an insn pattern with copy_insn and then use | |
4260 | this function afterwards to properly copy any REG_NOTEs containing | |
4261 | SCRATCHes. */ | |
4262 | ||
4263 | rtx | |
4264 | copy_insn_1 (orig) | |
19cb6b50 | 4265 | rtx orig; |
928d57e3 | 4266 | { |
19cb6b50 | 4267 | rtx copy; |
4268 | int i, j; | |
4269 | RTX_CODE code; | |
4270 | const char *format_ptr; | |
928d57e3 | 4271 | |
4272 | code = GET_CODE (orig); | |
4273 | ||
4274 | switch (code) | |
4275 | { | |
4276 | case REG: | |
4277 | case QUEUED: | |
4278 | case CONST_INT: | |
4279 | case CONST_DOUBLE: | |
4280 | case SYMBOL_REF: | |
4281 | case CODE_LABEL: | |
4282 | case PC: | |
4283 | case CC0: | |
4284 | case ADDRESSOF: | |
4285 | return orig; | |
4286 | ||
4287 | case SCRATCH: | |
4288 | for (i = 0; i < copy_insn_n_scratches; i++) | |
4289 | if (copy_insn_scratch_in[i] == orig) | |
4290 | return copy_insn_scratch_out[i]; | |
4291 | break; | |
4292 | ||
4293 | case CONST: | |
4294 | /* CONST can be shared if it contains a SYMBOL_REF. If it contains | |
4295 | a LABEL_REF, it isn't sharable. */ | |
4296 | if (GET_CODE (XEXP (orig, 0)) == PLUS | |
4297 | && GET_CODE (XEXP (XEXP (orig, 0), 0)) == SYMBOL_REF | |
4298 | && GET_CODE (XEXP (XEXP (orig, 0), 1)) == CONST_INT) | |
4299 | return orig; | |
4300 | break; | |
d823ba47 | 4301 | |
928d57e3 | 4302 | /* A MEM with a constant address is not sharable. The problem is that |
4303 | the constant address may need to be reloaded. If the mem is shared, | |
4304 | then reloading one copy of this mem will cause all copies to appear | |
4305 | to have been reloaded. */ | |
4306 | ||
4307 | default: | |
4308 | break; | |
4309 | } | |
4310 | ||
4311 | copy = rtx_alloc (code); | |
4312 | ||
4313 | /* Copy the various flags, and other information. We assume that | |
4314 | all fields need copying, and then clear the fields that should | |
4315 | not be copied. That is the sensible default behavior, and forces | |
4316 | us to explicitly document why we are *not* copying a flag. */ | |
4317 | memcpy (copy, orig, sizeof (struct rtx_def) - sizeof (rtunion)); | |
4318 | ||
4319 | /* We do not copy the USED flag, which is used as a mark bit during | |
4320 | walks over the RTL. */ | |
4321 | copy->used = 0; | |
4322 | ||
4323 | /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */ | |
4324 | if (GET_RTX_CLASS (code) == 'i') | |
4325 | { | |
4326 | copy->jump = 0; | |
4327 | copy->call = 0; | |
4328 | copy->frame_related = 0; | |
4329 | } | |
d823ba47 | 4330 | |
928d57e3 | 4331 | format_ptr = GET_RTX_FORMAT (GET_CODE (copy)); |
4332 | ||
4333 | for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++) | |
4334 | { | |
d925550d | 4335 | copy->fld[i] = orig->fld[i]; |
928d57e3 | 4336 | switch (*format_ptr++) |
4337 | { | |
4338 | case 'e': | |
928d57e3 | 4339 | if (XEXP (orig, i) != NULL) |
4340 | XEXP (copy, i) = copy_insn_1 (XEXP (orig, i)); | |
4341 | break; | |
4342 | ||
928d57e3 | 4343 | case 'E': |
4344 | case 'V': | |
928d57e3 | 4345 | if (XVEC (orig, i) == orig_asm_constraints_vector) |
4346 | XVEC (copy, i) = copy_asm_constraints_vector; | |
4347 | else if (XVEC (orig, i) == orig_asm_operands_vector) | |
4348 | XVEC (copy, i) = copy_asm_operands_vector; | |
4349 | else if (XVEC (orig, i) != NULL) | |
4350 | { | |
4351 | XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i)); | |
4352 | for (j = 0; j < XVECLEN (copy, i); j++) | |
4353 | XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j)); | |
4354 | } | |
4355 | break; | |
4356 | ||
928d57e3 | 4357 | case 't': |
928d57e3 | 4358 | case 'w': |
928d57e3 | 4359 | case 'i': |
928d57e3 | 4360 | case 's': |
4361 | case 'S': | |
d925550d | 4362 | case 'u': |
4363 | case '0': | |
4364 | /* These are left unchanged. */ | |
928d57e3 | 4365 | break; |
4366 | ||
4367 | default: | |
4368 | abort (); | |
4369 | } | |
4370 | } | |
4371 | ||
4372 | if (code == SCRATCH) | |
4373 | { | |
4374 | i = copy_insn_n_scratches++; | |
4375 | if (i >= MAX_RECOG_OPERANDS) | |
4376 | abort (); | |
4377 | copy_insn_scratch_in[i] = orig; | |
4378 | copy_insn_scratch_out[i] = copy; | |
4379 | } | |
4380 | else if (code == ASM_OPERANDS) | |
4381 | { | |
d91f2122 | 4382 | orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig); |
4383 | copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy); | |
4384 | orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig); | |
4385 | copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy); | |
928d57e3 | 4386 | } |
4387 | ||
4388 | return copy; | |
4389 | } | |
4390 | ||
4391 | /* Create a new copy of an rtx. | |
4392 | This function differs from copy_rtx in that it handles SCRATCHes and | |
4393 | ASM_OPERANDs properly. | |
4394 | INSN doesn't really have to be a full INSN; it could be just the | |
4395 | pattern. */ | |
4396 | rtx | |
4397 | copy_insn (insn) | |
4398 | rtx insn; | |
4399 | { | |
4400 | copy_insn_n_scratches = 0; | |
4401 | orig_asm_operands_vector = 0; | |
4402 | orig_asm_constraints_vector = 0; | |
4403 | copy_asm_operands_vector = 0; | |
4404 | copy_asm_constraints_vector = 0; | |
4405 | return copy_insn_1 (insn); | |
4406 | } | |
02ebfa52 | 4407 | |
15bbde2b | 4408 | /* Initialize data structures and variables in this file |
4409 | before generating rtl for each function. */ | |
4410 | ||
4411 | void | |
4412 | init_emit () | |
4413 | { | |
08513b52 | 4414 | struct function *f = cfun; |
15bbde2b | 4415 | |
0a893c29 | 4416 | f->emit = (struct emit_status *) xmalloc (sizeof (struct emit_status)); |
15bbde2b | 4417 | first_insn = NULL; |
4418 | last_insn = NULL; | |
961819fb | 4419 | seq_rtl_expr = NULL; |
15bbde2b | 4420 | cur_insn_uid = 1; |
4421 | reg_rtx_no = LAST_VIRTUAL_REGISTER + 1; | |
4422 | last_linenum = 0; | |
4423 | last_filename = 0; | |
4424 | first_label_num = label_num; | |
4425 | last_label_num = 0; | |
0a893c29 | 4426 | seq_stack = NULL; |
15bbde2b | 4427 | |
0a893c29 | 4428 | clear_emit_caches (); |
15bbde2b | 4429 | |
4430 | /* Init the tables that describe all the pseudo regs. */ | |
4431 | ||
e61a0a7f | 4432 | f->emit->regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101; |
15bbde2b | 4433 | |
0a893c29 | 4434 | f->emit->regno_pointer_align |
e61a0a7f | 4435 | = (unsigned char *) xcalloc (f->emit->regno_pointer_align_length, |
4491f79f | 4436 | sizeof (unsigned char)); |
d4c332ff | 4437 | |
d823ba47 | 4438 | regno_reg_rtx |
fcdc122e | 4439 | = (rtx *) xcalloc (f->emit->regno_pointer_align_length, sizeof (rtx)); |
4440 | ||
4441 | f->emit->regno_decl | |
4442 | = (tree *) xcalloc (f->emit->regno_pointer_align_length, sizeof (tree)); | |
15bbde2b | 4443 | |
4444 | /* Put copies of all the virtual register rtx into regno_reg_rtx. */ | |
0a893c29 | 4445 | init_virtual_regs (f->emit); |
888e0d33 | 4446 | |
4447 | /* Indicate that the virtual registers and stack locations are | |
4448 | all pointers. */ | |
e61a0a7f | 4449 | REG_POINTER (stack_pointer_rtx) = 1; |
4450 | REG_POINTER (frame_pointer_rtx) = 1; | |
4451 | REG_POINTER (hard_frame_pointer_rtx) = 1; | |
4452 | REG_POINTER (arg_pointer_rtx) = 1; | |
888e0d33 | 4453 | |
e61a0a7f | 4454 | REG_POINTER (virtual_incoming_args_rtx) = 1; |
4455 | REG_POINTER (virtual_stack_vars_rtx) = 1; | |
4456 | REG_POINTER (virtual_stack_dynamic_rtx) = 1; | |
4457 | REG_POINTER (virtual_outgoing_args_rtx) = 1; | |
4458 | REG_POINTER (virtual_cfa_rtx) = 1; | |
89525da0 | 4459 | |
d4c332ff | 4460 | #ifdef STACK_BOUNDARY |
80909c64 | 4461 | REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY; |
4462 | REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY; | |
4463 | REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY; | |
4464 | REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY; | |
4465 | ||
4466 | REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY; | |
4467 | REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY; | |
4468 | REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY; | |
4469 | REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY; | |
4470 | REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD; | |
d4c332ff | 4471 | #endif |
4472 | ||
89525da0 | 4473 | #ifdef INIT_EXPANDERS |
4474 | INIT_EXPANDERS; | |
4475 | #endif | |
15bbde2b | 4476 | } |
4477 | ||
a7b0c170 | 4478 | /* Mark SS for GC. */ |
4479 | ||
4480 | static void | |
4481 | mark_sequence_stack (ss) | |
4482 | struct sequence_stack *ss; | |
4483 | { | |
4484 | while (ss) | |
4485 | { | |
4486 | ggc_mark_rtx (ss->first); | |
961819fb | 4487 | ggc_mark_tree (ss->sequence_rtl_expr); |
a7b0c170 | 4488 | ss = ss->next; |
4489 | } | |
4490 | } | |
4491 | ||
4492 | /* Mark ES for GC. */ | |
4493 | ||
4494 | void | |
3c3bb268 | 4495 | mark_emit_status (es) |
a7b0c170 | 4496 | struct emit_status *es; |
4497 | { | |
4498 | rtx *r; | |
fcdc122e | 4499 | tree *t; |
a7b0c170 | 4500 | int i; |
4501 | ||
4502 | if (es == 0) | |
4503 | return; | |
4504 | ||
fcdc122e | 4505 | for (i = es->regno_pointer_align_length, r = es->x_regno_reg_rtx, |
4506 | t = es->regno_decl; | |
4507 | i > 0; --i, ++r, ++t) | |
4508 | { | |
4509 | ggc_mark_rtx (*r); | |
4510 | ggc_mark_tree (*t); | |
4511 | } | |
a7b0c170 | 4512 | |
4513 | mark_sequence_stack (es->sequence_stack); | |
961819fb | 4514 | ggc_mark_tree (es->sequence_rtl_expr); |
a7b0c170 | 4515 | ggc_mark_rtx (es->x_first_insn); |
4516 | } | |
4517 | ||
15bbde2b | 4518 | /* Create some permanent unique rtl objects shared between all functions. |
4519 | LINE_NUMBERS is nonzero if line numbers are to be generated. */ | |
4520 | ||
4521 | void | |
4522 | init_emit_once (line_numbers) | |
4523 | int line_numbers; | |
4524 | { | |
4525 | int i; | |
4526 | enum machine_mode mode; | |
9e042f31 | 4527 | enum machine_mode double_mode; |
15bbde2b | 4528 | |
c6259b83 | 4529 | /* Initialize the CONST_INT and memory attribute hash tables. */ |
d823ba47 | 4530 | const_int_htab = htab_create (37, const_int_htab_hash, |
77695070 | 4531 | const_int_htab_eq, NULL); |
c6259b83 | 4532 | ggc_add_deletable_htab (const_int_htab, 0, 0); |
4533 | ||
4534 | mem_attrs_htab = htab_create (37, mem_attrs_htab_hash, | |
4535 | mem_attrs_htab_eq, NULL); | |
4536 | ggc_add_deletable_htab (mem_attrs_htab, 0, mem_attrs_mark); | |
77695070 | 4537 | |
15bbde2b | 4538 | no_line_numbers = ! line_numbers; |
4539 | ||
71d7daa2 | 4540 | /* Compute the word and byte modes. */ |
4541 | ||
4542 | byte_mode = VOIDmode; | |
4543 | word_mode = VOIDmode; | |
4544 | double_mode = VOIDmode; | |
4545 | ||
4546 | for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode; | |
4547 | mode = GET_MODE_WIDER_MODE (mode)) | |
4548 | { | |
4549 | if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT | |
4550 | && byte_mode == VOIDmode) | |
4551 | byte_mode = mode; | |
4552 | ||
4553 | if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD | |
4554 | && word_mode == VOIDmode) | |
4555 | word_mode = mode; | |
4556 | } | |
4557 | ||
71d7daa2 | 4558 | for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode; |
4559 | mode = GET_MODE_WIDER_MODE (mode)) | |
4560 | { | |
4561 | if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE | |
4562 | && double_mode == VOIDmode) | |
4563 | double_mode = mode; | |
4564 | } | |
4565 | ||
4566 | ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0); | |
4567 | ||
57c097d5 | 4568 | /* Assign register numbers to the globally defined register rtx. |
4569 | This must be done at runtime because the register number field | |
4570 | is in a union and some compilers can't initialize unions. */ | |
4571 | ||
4572 | pc_rtx = gen_rtx (PC, VOIDmode); | |
4573 | cc0_rtx = gen_rtx (CC0, VOIDmode); | |
22cf44bc | 4574 | stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM); |
4575 | frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM); | |
57c097d5 | 4576 | if (hard_frame_pointer_rtx == 0) |
d823ba47 | 4577 | hard_frame_pointer_rtx = gen_raw_REG (Pmode, |
22cf44bc | 4578 | HARD_FRAME_POINTER_REGNUM); |
57c097d5 | 4579 | if (arg_pointer_rtx == 0) |
22cf44bc | 4580 | arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM); |
d823ba47 | 4581 | virtual_incoming_args_rtx = |
22cf44bc | 4582 | gen_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM); |
d823ba47 | 4583 | virtual_stack_vars_rtx = |
22cf44bc | 4584 | gen_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM); |
d823ba47 | 4585 | virtual_stack_dynamic_rtx = |
22cf44bc | 4586 | gen_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM); |
d823ba47 | 4587 | virtual_outgoing_args_rtx = |
4588 | gen_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM); | |
22cf44bc | 4589 | virtual_cfa_rtx = gen_raw_REG (Pmode, VIRTUAL_CFA_REGNUM); |
57c097d5 | 4590 | |
4591 | /* These rtx must be roots if GC is enabled. */ | |
d7c47c0e | 4592 | ggc_add_rtx_root (global_rtl, GR_MAX); |
57c097d5 | 4593 | |
57c097d5 | 4594 | #ifdef INIT_EXPANDERS |
ab5beff9 | 4595 | /* This is to initialize {init|mark|free}_machine_status before the first |
4596 | call to push_function_context_to. This is needed by the Chill front | |
4597 | end which calls push_function_context_to before the first cal to | |
57c097d5 | 4598 | init_function_start. */ |
4599 | INIT_EXPANDERS; | |
4600 | #endif | |
4601 | ||
15bbde2b | 4602 | /* Create the unique rtx's for certain rtx codes and operand values. */ |
4603 | ||
7014838c | 4604 | /* Don't use gen_rtx here since gen_rtx in this case |
4605 | tries to use these variables. */ | |
15bbde2b | 4606 | for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++) |
d823ba47 | 4607 | const_int_rtx[i + MAX_SAVED_CONST_INT] = |
57c097d5 | 4608 | gen_rtx_raw_CONST_INT (VOIDmode, i); |
d7c47c0e | 4609 | ggc_add_rtx_root (const_int_rtx, 2 * MAX_SAVED_CONST_INT + 1); |
15bbde2b | 4610 | |
1a60f06a | 4611 | if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT |
4612 | && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT) | |
57c097d5 | 4613 | const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT]; |
1a60f06a | 4614 | else |
3ad7bb1c | 4615 | const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE); |
15bbde2b | 4616 | |
9e042f31 | 4617 | dconst0 = REAL_VALUE_ATOF ("0", double_mode); |
4618 | dconst1 = REAL_VALUE_ATOF ("1", double_mode); | |
4619 | dconst2 = REAL_VALUE_ATOF ("2", double_mode); | |
4620 | dconstm1 = REAL_VALUE_ATOF ("-1", double_mode); | |
15bbde2b | 4621 | |
4622 | for (i = 0; i <= 2; i++) | |
4623 | { | |
4624 | for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode; | |
4625 | mode = GET_MODE_WIDER_MODE (mode)) | |
4626 | { | |
4627 | rtx tem = rtx_alloc (CONST_DOUBLE); | |
4628 | union real_extract u; | |
4629 | ||
fd781f88 | 4630 | /* Zero any holes in a structure. */ |
4631 | memset ((char *) &u, 0, sizeof u); | |
15bbde2b | 4632 | u.d = i == 0 ? dconst0 : i == 1 ? dconst1 : dconst2; |
4633 | ||
fd781f88 | 4634 | /* Avoid trailing garbage in the rtx. */ |
4635 | if (sizeof (u) < sizeof (HOST_WIDE_INT)) | |
4636 | CONST_DOUBLE_LOW (tem) = 0; | |
4637 | if (sizeof (u) < 2 * sizeof (HOST_WIDE_INT)) | |
4638 | CONST_DOUBLE_HIGH (tem) = 0; | |
4639 | ||
b1b63592 | 4640 | memcpy (&CONST_DOUBLE_LOW (tem), &u, sizeof u); |
15bbde2b | 4641 | CONST_DOUBLE_MEM (tem) = cc0_rtx; |
791ceafe | 4642 | CONST_DOUBLE_CHAIN (tem) = NULL_RTX; |
15bbde2b | 4643 | PUT_MODE (tem, mode); |
4644 | ||
4645 | const_tiny_rtx[i][(int) mode] = tem; | |
4646 | } | |
4647 | ||
b572011e | 4648 | const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i); |
15bbde2b | 4649 | |
4650 | for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode; | |
4651 | mode = GET_MODE_WIDER_MODE (mode)) | |
b572011e | 4652 | const_tiny_rtx[i][(int) mode] = GEN_INT (i); |
7540dcc4 | 4653 | |
4654 | for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT); | |
4655 | mode != VOIDmode; | |
4656 | mode = GET_MODE_WIDER_MODE (mode)) | |
4657 | const_tiny_rtx[i][(int) mode] = GEN_INT (i); | |
15bbde2b | 4658 | } |
4659 | ||
0fd4500a | 4660 | for (i = (int) CCmode; i < (int) MAX_MACHINE_MODE; ++i) |
4661 | if (GET_MODE_CLASS ((enum machine_mode) i) == MODE_CC) | |
4662 | const_tiny_rtx[0][i] = const0_rtx; | |
15bbde2b | 4663 | |
065336b4 | 4664 | const_tiny_rtx[0][(int) BImode] = const0_rtx; |
4665 | if (STORE_FLAG_VALUE == 1) | |
4666 | const_tiny_rtx[1][(int) BImode] = const1_rtx; | |
4667 | ||
3098b2d3 | 4668 | /* For bounded pointers, `&const_tiny_rtx[0][0]' is not the same as |
4669 | `(rtx *) const_tiny_rtx'. The former has bounds that only cover | |
4670 | `const_tiny_rtx[0]', whereas the latter has bounds that cover all. */ | |
4671 | ggc_add_rtx_root ((rtx *) const_tiny_rtx, sizeof const_tiny_rtx / sizeof (rtx)); | |
c788feb1 | 4672 | ggc_add_rtx_root (&const_true_rtx, 1); |
f4bffa58 | 4673 | |
4674 | #ifdef RETURN_ADDRESS_POINTER_REGNUM | |
4675 | return_address_pointer_rtx | |
22cf44bc | 4676 | = gen_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM); |
f4bffa58 | 4677 | #endif |
4678 | ||
4679 | #ifdef STRUCT_VALUE | |
4680 | struct_value_rtx = STRUCT_VALUE; | |
4681 | #else | |
4682 | struct_value_rtx = gen_rtx_REG (Pmode, STRUCT_VALUE_REGNUM); | |
4683 | #endif | |
4684 | ||
4685 | #ifdef STRUCT_VALUE_INCOMING | |
4686 | struct_value_incoming_rtx = STRUCT_VALUE_INCOMING; | |
4687 | #else | |
4688 | #ifdef STRUCT_VALUE_INCOMING_REGNUM | |
4689 | struct_value_incoming_rtx | |
4690 | = gen_rtx_REG (Pmode, STRUCT_VALUE_INCOMING_REGNUM); | |
4691 | #else | |
4692 | struct_value_incoming_rtx = struct_value_rtx; | |
4693 | #endif | |
4694 | #endif | |
4695 | ||
4696 | #ifdef STATIC_CHAIN_REGNUM | |
4697 | static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM); | |
4698 | ||
4699 | #ifdef STATIC_CHAIN_INCOMING_REGNUM | |
4700 | if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM) | |
4701 | static_chain_incoming_rtx | |
4702 | = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM); | |
4703 | else | |
4704 | #endif | |
4705 | static_chain_incoming_rtx = static_chain_rtx; | |
4706 | #endif | |
4707 | ||
4708 | #ifdef STATIC_CHAIN | |
4709 | static_chain_rtx = STATIC_CHAIN; | |
4710 | ||
4711 | #ifdef STATIC_CHAIN_INCOMING | |
4712 | static_chain_incoming_rtx = STATIC_CHAIN_INCOMING; | |
4713 | #else | |
4714 | static_chain_incoming_rtx = static_chain_rtx; | |
4715 | #endif | |
4716 | #endif | |
4717 | ||
14e6e4d4 | 4718 | if (PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM) |
4719 | pic_offset_table_rtx = gen_rtx_REG (Pmode, PIC_OFFSET_TABLE_REGNUM); | |
f4bffa58 | 4720 | |
521dd524 | 4721 | ggc_add_rtx_root (&pic_offset_table_rtx, 1); |
4722 | ggc_add_rtx_root (&struct_value_rtx, 1); | |
4723 | ggc_add_rtx_root (&struct_value_incoming_rtx, 1); | |
4724 | ggc_add_rtx_root (&static_chain_rtx, 1); | |
4725 | ggc_add_rtx_root (&static_chain_incoming_rtx, 1); | |
4726 | ggc_add_rtx_root (&return_address_pointer_rtx, 1); | |
15bbde2b | 4727 | } |
ac6c481d | 4728 | \f |
4729 | /* Query and clear/ restore no_line_numbers. This is used by the | |
4730 | switch / case handling in stmt.c to give proper line numbers in | |
4731 | warnings about unreachable code. */ | |
4732 | ||
4733 | int | |
4734 | force_line_numbers () | |
4735 | { | |
4736 | int old = no_line_numbers; | |
4737 | ||
4738 | no_line_numbers = 0; | |
4739 | if (old) | |
4740 | force_next_line_note (); | |
4741 | return old; | |
4742 | } | |
4743 | ||
4744 | void | |
4745 | restore_line_number_status (old_value) | |
4746 | int old_value; | |
4747 | { | |
4748 | no_line_numbers = old_value; | |
4749 | } |