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1/* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 1988, 1992 Free Software Foundation, Inc.
3
4This file is part of GNU CC.
5
6GNU CC is free software; you can redistribute it and/or modify
7it under the terms of the GNU General Public License as published by
8the Free Software Foundation; either version 2, or (at your option)
9any later version.
10
11GNU CC is distributed in the hope that it will be useful,
12but WITHOUT ANY WARRANTY; without even the implied warranty of
13MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14GNU General Public License for more details.
15
16You should have received a copy of the GNU General Public License
17along with GNU CC; see the file COPYING. If not, write to
18the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
19
20
21/* Middle-to-low level generation of rtx code and insns.
22
23 This file contains the functions `gen_rtx', `gen_reg_rtx'
24 and `gen_label_rtx' that are the usual ways of creating rtl
25 expressions for most purposes.
26
27 It also has the functions for creating insns and linking
28 them in the doubly-linked chain.
29
30 The patterns of the insns are created by machine-dependent
31 routines in insn-emit.c, which is generated automatically from
32 the machine description. These routines use `gen_rtx' to make
33 the individual rtx's of the pattern; what is machine dependent
34 is the kind of rtx's they make and what arguments they use. */
35
36#include "config.h"
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37#include "gvarargs.h"
38#include "rtl.h"
39#include "flags.h"
40#include "function.h"
41#include "expr.h"
42#include "regs.h"
43#include "insn-config.h"
44#include "real.h"
f8d97cf4 45#include <stdio.h>
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46
47/* This is reset to LAST_VIRTUAL_REGISTER + 1 at the start of each function.
48 After rtl generation, it is 1 plus the largest register number used. */
49
50int reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
51
52/* This is *not* reset after each function. It gives each CODE_LABEL
53 in the entire compilation a unique label number. */
54
55static int label_num = 1;
56
57/* Lowest label number in current function. */
58
59static int first_label_num;
60
61/* Highest label number in current function.
62 Zero means use the value of label_num instead.
63 This is nonzero only when belatedly compiling an inline function. */
64
65static int last_label_num;
66
67/* Value label_num had when set_new_first_and_last_label_number was called.
68 If label_num has not changed since then, last_label_num is valid. */
69
70static int base_label_num;
71
72/* Nonzero means do not generate NOTEs for source line numbers. */
73
74static int no_line_numbers;
75
76/* Commonly used rtx's, so that we only need space for one copy.
77 These are initialized once for the entire compilation.
78 All of these except perhaps the floating-point CONST_DOUBLEs
79 are unique; no other rtx-object will be equal to any of these. */
80
81rtx pc_rtx; /* (PC) */
82rtx cc0_rtx; /* (CC0) */
83rtx cc1_rtx; /* (CC1) (not actually used nowadays) */
84rtx const0_rtx; /* (CONST_INT 0) */
85rtx const1_rtx; /* (CONST_INT 1) */
86rtx const2_rtx; /* (CONST_INT 2) */
87rtx constm1_rtx; /* (CONST_INT -1) */
88rtx const_true_rtx; /* (CONST_INT STORE_FLAG_VALUE) */
89
90/* We record floating-point CONST_DOUBLEs in each floating-point mode for
91 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
92 record a copy of const[012]_rtx. */
93
94rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
95
96REAL_VALUE_TYPE dconst0;
97REAL_VALUE_TYPE dconst1;
98REAL_VALUE_TYPE dconst2;
99REAL_VALUE_TYPE dconstm1;
100
101/* All references to the following fixed hard registers go through
102 these unique rtl objects. On machines where the frame-pointer and
103 arg-pointer are the same register, they use the same unique object.
104
105 After register allocation, other rtl objects which used to be pseudo-regs
106 may be clobbered to refer to the frame-pointer register.
107 But references that were originally to the frame-pointer can be
108 distinguished from the others because they contain frame_pointer_rtx.
109
110 In an inline procedure, the stack and frame pointer rtxs may not be
111 used for anything else. */
112rtx stack_pointer_rtx; /* (REG:Pmode STACK_POINTER_REGNUM) */
113rtx frame_pointer_rtx; /* (REG:Pmode FRAME_POINTER_REGNUM) */
114rtx arg_pointer_rtx; /* (REG:Pmode ARG_POINTER_REGNUM) */
115rtx struct_value_rtx; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
116rtx struct_value_incoming_rtx; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
117rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
118rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
119rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
120
121rtx virtual_incoming_args_rtx; /* (REG:Pmode VIRTUAL_INCOMING_ARGS_REGNUM) */
122rtx virtual_stack_vars_rtx; /* (REG:Pmode VIRTUAL_STACK_VARS_REGNUM) */
123rtx virtual_stack_dynamic_rtx; /* (REG:Pmode VIRTUAL_STACK_DYNAMIC_REGNUM) */
124rtx virtual_outgoing_args_rtx; /* (REG:Pmode VIRTUAL_OUTGOING_ARGS_REGNUM) */
125
126/* We make one copy of (const_int C) where C is in
127 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
128 to save space during the compilation and simplify comparisons of
129 integers. */
130
131#define MAX_SAVED_CONST_INT 64
132
133static rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
134
135/* The ends of the doubly-linked chain of rtl for the current function.
136 Both are reset to null at the start of rtl generation for the function.
137
138 start_sequence saves both of these on `sequence_stack' and then
139 starts a new, nested sequence of insns. */
140
141static rtx first_insn = NULL;
142static rtx last_insn = NULL;
143
144/* INSN_UID for next insn emitted.
145 Reset to 1 for each function compiled. */
146
147static int cur_insn_uid = 1;
148
149/* Line number and source file of the last line-number NOTE emitted.
150 This is used to avoid generating duplicates. */
151
152static int last_linenum = 0;
153static char *last_filename = 0;
154
155/* A vector indexed by pseudo reg number. The allocated length
156 of this vector is regno_pointer_flag_length. Since this
157 vector is needed during the expansion phase when the total
158 number of registers in the function is not yet known,
159 it is copied and made bigger when necessary. */
160
161char *regno_pointer_flag;
162int regno_pointer_flag_length;
163
164/* Indexed by pseudo register number, gives the rtx for that pseudo.
165 Allocated in parallel with regno_pointer_flag. */
166
167rtx *regno_reg_rtx;
168
169/* Stack of pending (incomplete) sequences saved by `start_sequence'.
170 Each element describes one pending sequence.
171 The main insn-chain is saved in the last element of the chain,
172 unless the chain is empty. */
173
174struct sequence_stack *sequence_stack;
175
176/* start_sequence and gen_sequence can make a lot of rtx expressions which are
177 shortly thrown away. We use two mechanisms to prevent this waste:
178
179 First, we keep a list of the expressions used to represent the sequence
180 stack in sequence_element_free_list.
181
182 Second, for sizes up to 5 elements, we keep a SEQUENCE and its associated
183 rtvec for use by gen_sequence. One entry for each size is sufficient
184 because most cases are calls to gen_sequence followed by immediately
185 emitting the SEQUENCE. Reuse is safe since emitting a sequence is
186 destructive on the insn in it anyway and hence can't be redone.
187
188 We do not bother to save this cached data over nested function calls.
189 Instead, we just reinitialize them. */
190
191#define SEQUENCE_RESULT_SIZE 5
192
193static struct sequence_stack *sequence_element_free_list;
194static rtx sequence_result[SEQUENCE_RESULT_SIZE];
195
196extern int rtx_equal_function_value_matters;
197
198/* Filename and line number of last line-number note,
199 whether we actually emitted it or not. */
200extern char *emit_filename;
201extern int emit_lineno;
202
203rtx change_address ();
204void init_emit ();
205\f
206/* rtx gen_rtx (code, mode, [element1, ..., elementn])
207**
208** This routine generates an RTX of the size specified by
209** <code>, which is an RTX code. The RTX structure is initialized
210** from the arguments <element1> through <elementn>, which are
211** interpreted according to the specific RTX type's format. The
212** special machine mode associated with the rtx (if any) is specified
213** in <mode>.
214**
215** gen_rtx() can be invoked in a way which resembles the lisp-like
216** rtx it will generate. For example, the following rtx structure:
217**
218** (plus:QI (mem:QI (reg:SI 1))
219** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
220**
221** ...would be generated by the following C code:
222**
223** gen_rtx (PLUS, QImode,
224** gen_rtx (MEM, QImode,
225** gen_rtx (REG, SImode, 1)),
226** gen_rtx (MEM, QImode,
227** gen_rtx (PLUS, SImode,
228** gen_rtx (REG, SImode, 2),
229** gen_rtx (REG, SImode, 3)))),
230*/
231
232/*VARARGS2*/
233rtx
234gen_rtx (va_alist)
235 va_dcl
236{
237 va_list p;
238 enum rtx_code code;
239 enum machine_mode mode;
240 register int i; /* Array indices... */
241 register char *fmt; /* Current rtx's format... */
242 register rtx rt_val; /* RTX to return to caller... */
243
244 va_start (p);
245 code = va_arg (p, enum rtx_code);
246 mode = va_arg (p, enum machine_mode);
247
248 if (code == CONST_INT)
249 {
906c4e36 250 HOST_WIDE_INT arg = va_arg (p, HOST_WIDE_INT);
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251
252 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
253 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
254
255 if (const_true_rtx && arg == STORE_FLAG_VALUE)
256 return const_true_rtx;
257
258 rt_val = rtx_alloc (code);
259 INTVAL (rt_val) = arg;
260 }
261 else if (code == REG)
262 {
263 int regno = va_arg (p, int);
264
265 /* In case the MD file explicitly references the frame pointer, have
266 all such references point to the same frame pointer. This is used
267 during frame pointer elimination to distinguish the explicit
268 references to these registers from pseudos that happened to be
269 assigned to them.
270
271 If we have eliminated the frame pointer or arg pointer, we will
272 be using it as a normal register, for example as a spill register.
273 In such cases, we might be accessing it in a mode that is not
600a5d88 274 Pmode and therefore cannot use the pre-allocated rtx.
23b2ce53 275
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276 Also don't do this when we are making new REGs in reload,
277 since we don't want to get confused with the real pointers. */
278
279 if (frame_pointer_rtx && regno == FRAME_POINTER_REGNUM && mode == Pmode
280 && ! reload_in_progress)
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281 return frame_pointer_rtx;
282#if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
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283 if (arg_pointer_rtx && regno == ARG_POINTER_REGNUM && mode == Pmode
284 && ! reload_in_progress)
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285 return arg_pointer_rtx;
286#endif
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287 if (stack_pointer_rtx && regno == STACK_POINTER_REGNUM && mode == Pmode
288 && ! reload_in_progress)
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289 return stack_pointer_rtx;
290 else
291 {
292 rt_val = rtx_alloc (code);
293 rt_val->mode = mode;
294 REGNO (rt_val) = regno;
295 return rt_val;
296 }
297 }
298 else
299 {
300 rt_val = rtx_alloc (code); /* Allocate the storage space. */
301 rt_val->mode = mode; /* Store the machine mode... */
302
303 fmt = GET_RTX_FORMAT (code); /* Find the right format... */
304 for (i = 0; i < GET_RTX_LENGTH (code); i++)
305 {
306 switch (*fmt++)
307 {
308 case '0': /* Unused field. */
309 break;
310
311 case 'i': /* An integer? */
312 XINT (rt_val, i) = va_arg (p, int);
313 break;
314
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315 case 'w': /* A wide integer? */
316 XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT);
317 break;
318
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319 case 's': /* A string? */
320 XSTR (rt_val, i) = va_arg (p, char *);
321 break;
322
323 case 'e': /* An expression? */
324 case 'u': /* An insn? Same except when printing. */
325 XEXP (rt_val, i) = va_arg (p, rtx);
326 break;
327
328 case 'E': /* An RTX vector? */
329 XVEC (rt_val, i) = va_arg (p, rtvec);
330 break;
331
332 default:
333 abort();
334 }
335 }
336 }
337 va_end (p);
338 return rt_val; /* Return the new RTX... */
339}
340
341/* gen_rtvec (n, [rt1, ..., rtn])
342**
343** This routine creates an rtvec and stores within it the
344** pointers to rtx's which are its arguments.
345*/
346
347/*VARARGS1*/
348rtvec
349gen_rtvec (va_alist)
350 va_dcl
351{
352 int n, i;
353 va_list p;
354 rtx *vector;
355
356 va_start (p);
357 n = va_arg (p, int);
358
359 if (n == 0)
360 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
361
362 vector = (rtx *) alloca (n * sizeof (rtx));
363 for (i = 0; i < n; i++)
364 vector[i] = va_arg (p, rtx);
365 va_end (p);
366
367 return gen_rtvec_v (n, vector);
368}
369
370rtvec
371gen_rtvec_v (n, argp)
372 int n;
373 rtx *argp;
374{
375 register int i;
376 register rtvec rt_val;
377
378 if (n == 0)
379 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
380
381 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
382
383 for (i = 0; i < n; i++)
384 rt_val->elem[i].rtx = *argp++;
385
386 return rt_val;
387}
388\f
389/* Generate a REG rtx for a new pseudo register of mode MODE.
390 This pseudo is assigned the next sequential register number. */
391
392rtx
393gen_reg_rtx (mode)
394 enum machine_mode mode;
395{
396 register rtx val;
397
398 /* Don't let anything called by or after reload create new registers
399 (actually, registers can't be created after flow, but this is a good
400 approximation). */
401
402 if (reload_in_progress || reload_completed)
403 abort ();
404
405 /* Make sure regno_pointer_flag and regno_reg_rtx are large
406 enough to have an element for this pseudo reg number. */
407
408 if (reg_rtx_no == regno_pointer_flag_length)
409 {
410 rtx *new1;
411 char *new =
412 (char *) oballoc (regno_pointer_flag_length * 2);
413 bzero (new, regno_pointer_flag_length * 2);
414 bcopy (regno_pointer_flag, new, regno_pointer_flag_length);
415 regno_pointer_flag = new;
416
417 new1 = (rtx *) oballoc (regno_pointer_flag_length * 2 * sizeof (rtx));
418 bzero (new1, regno_pointer_flag_length * 2 * sizeof (rtx));
419 bcopy (regno_reg_rtx, new1, regno_pointer_flag_length * sizeof (rtx));
420 regno_reg_rtx = new1;
421
422 regno_pointer_flag_length *= 2;
423 }
424
425 val = gen_rtx (REG, mode, reg_rtx_no);
426 regno_reg_rtx[reg_rtx_no++] = val;
427 return val;
428}
429
430/* Identify REG as a probable pointer register. */
431
432void
433mark_reg_pointer (reg)
434 rtx reg;
435{
436 REGNO_POINTER_FLAG (REGNO (reg)) = 1;
437}
438
439/* Return 1 plus largest pseudo reg number used in the current function. */
440
441int
442max_reg_num ()
443{
444 return reg_rtx_no;
445}
446
447/* Return 1 + the largest label number used so far in the current function. */
448
449int
450max_label_num ()
451{
452 if (last_label_num && label_num == base_label_num)
453 return last_label_num;
454 return label_num;
455}
456
457/* Return first label number used in this function (if any were used). */
458
459int
460get_first_label_num ()
461{
462 return first_label_num;
463}
464\f
465/* Return a value representing some low-order bits of X, where the number
466 of low-order bits is given by MODE. Note that no conversion is done
467 between floating-point and fixed-point values, rather, the bit
468 representation is returned.
469
470 This function handles the cases in common between gen_lowpart, below,
471 and two variants in cse.c and combine.c. These are the cases that can
472 be safely handled at all points in the compilation.
473
474 If this is not a case we can handle, return 0. */
475
476rtx
477gen_lowpart_common (mode, x)
478 enum machine_mode mode;
479 register rtx x;
480{
481 int word = 0;
482
483 if (GET_MODE (x) == mode)
484 return x;
485
486 /* MODE must occupy no more words than the mode of X. */
487 if (GET_MODE (x) != VOIDmode
488 && ((GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
489 > ((GET_MODE_SIZE (GET_MODE (x)) + (UNITS_PER_WORD - 1))
490 / UNITS_PER_WORD)))
491 return 0;
492
493 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD)
494 word = ((GET_MODE_SIZE (GET_MODE (x))
495 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD))
496 / UNITS_PER_WORD);
497
498 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
83e9c679
RK
499 && (GET_MODE_CLASS (mode) == MODE_INT
500 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
23b2ce53
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501 {
502 /* If we are getting the low-order part of something that has been
503 sign- or zero-extended, we can either just use the object being
504 extended or make a narrower extension. If we want an even smaller
505 piece than the size of the object being extended, call ourselves
506 recursively.
507
508 This case is used mostly by combine and cse. */
509
510 if (GET_MODE (XEXP (x, 0)) == mode)
511 return XEXP (x, 0);
512 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
513 return gen_lowpart_common (mode, XEXP (x, 0));
514 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (x)))
515 return gen_rtx (GET_CODE (x), mode, XEXP (x, 0));
516 }
517 else if (GET_CODE (x) == SUBREG
518 && (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
519 || GET_MODE_SIZE (mode) == GET_MODE_UNIT_SIZE (GET_MODE (x))))
520 return (GET_MODE (SUBREG_REG (x)) == mode && SUBREG_WORD (x) == 0
521 ? SUBREG_REG (x)
522 : gen_rtx (SUBREG, mode, SUBREG_REG (x), SUBREG_WORD (x)));
523 else if (GET_CODE (x) == REG)
524 {
525 /* If the register is not valid for MODE, return 0. If we don't
526 do this, there is no way to fix up the resulting REG later. */
527 if (REGNO (x) < FIRST_PSEUDO_REGISTER
528 && ! HARD_REGNO_MODE_OK (REGNO (x) + word, mode))
529 return 0;
530 else if (REGNO (x) < FIRST_PSEUDO_REGISTER
531 /* integrate.c can't handle parts of a return value register. */
532 && (! REG_FUNCTION_VALUE_P (x)
cb00f51a
RK
533 || ! rtx_equal_function_value_matters)
534 /* We want to keep the stack, frame, and arg pointers
535 special. */
536 && REGNO (x) != FRAME_POINTER_REGNUM
537#if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
538 && REGNO (x) != ARG_POINTER_REGNUM
539#endif
540 && REGNO (x) != STACK_POINTER_REGNUM)
23b2ce53
RS
541 return gen_rtx (REG, mode, REGNO (x) + word);
542 else
543 return gen_rtx (SUBREG, mode, x, word);
544 }
545
546 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
547 from the low-order part of the constant. */
83e9c679
RK
548 else if ((GET_MODE_CLASS (mode) == MODE_INT
549 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
550 && GET_MODE (x) == VOIDmode
23b2ce53 551 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE))
1a5b457d
RK
552 {
553 /* If MODE is twice the host word size, X is already the desired
554 representation. Otherwise, if MODE is wider than a word, we can't
555 do this. If MODE is exactly a word, return just one CONST_INT.
556 If MODE is smaller than a word, clear the bits that don't belong
557 in our mode, unless they and our sign bit are all one. So we get
558 either a reasonable negative value or a reasonable unsigned value
559 for this mode. */
560
906c4e36 561 if (GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT)
1a5b457d 562 return x;
906c4e36 563 else if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT)
1a5b457d 564 return 0;
906c4e36 565 else if (GET_MODE_BITSIZE (mode) == HOST_BITS_PER_WIDE_INT)
1a5b457d 566 return (GET_CODE (x) == CONST_INT ? x
906c4e36 567 : GEN_INT (CONST_DOUBLE_LOW (x)));
1a5b457d
RK
568 else
569 {
570 /* MODE must be narrower than HOST_BITS_PER_INT. */
571 int width = GET_MODE_BITSIZE (mode);
906c4e36
RK
572 HOST_WIDE_INT val = (GET_CODE (x) == CONST_INT ? INTVAL (x)
573 : CONST_DOUBLE_LOW (x));
1a5b457d 574
906c4e36
RK
575 if (((val & ((HOST_WIDE_INT) (-1) << (width - 1)))
576 != ((HOST_WIDE_INT) (-1) << (width - 1))))
577 val &= ((HOST_WIDE_INT) 1 << width) - 1;
1a5b457d
RK
578
579 return (GET_CODE (x) == CONST_INT && INTVAL (x) == val ? x
906c4e36 580 : GEN_INT (val));
1a5b457d
RK
581 }
582 }
23b2ce53 583
8aada4ad
RK
584 /* If X is an integral constant but we want it in floating-point, it
585 must be the case that we have a union of an integer and a floating-point
586 value. If the machine-parameters allow it, simulate that union here
d6020413
RK
587 and return the result. The two-word and single-word cases are
588 different. */
8aada4ad 589
b3bf132d 590 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
906c4e36 591 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
b3bf132d 592 || flag_pretend_float)
8aada4ad 593 && GET_MODE_CLASS (mode) == MODE_FLOAT
d6020413
RK
594 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
595 && GET_CODE (x) == CONST_INT
906c4e36 596 && sizeof (float) * HOST_BITS_PER_CHAR == HOST_BITS_PER_WIDE_INT)
d6020413 597 {
906c4e36 598 union {HOST_WIDE_INT i; float d; } u;
d6020413
RK
599
600 u.i = INTVAL (x);
601 return immed_real_const_1 (u.d, mode);
602 }
603
604 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
906c4e36 605 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
d6020413
RK
606 || flag_pretend_float)
607 && GET_MODE_CLASS (mode) == MODE_FLOAT
608 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
8aada4ad
RK
609 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
610 && GET_MODE (x) == VOIDmode
906c4e36
RK
611 && (sizeof (double) * HOST_BITS_PER_CHAR
612 == 2 * HOST_BITS_PER_WIDE_INT))
8aada4ad 613 {
906c4e36
RK
614 union {HOST_WIDE_INT i[2]; double d; } u;
615 HOST_WIDE_INT low, high;
8aada4ad
RK
616
617 if (GET_CODE (x) == CONST_INT)
906c4e36 618 low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1);
8aada4ad
RK
619 else
620 low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x);
621
622#ifdef HOST_WORDS_BIG_ENDIAN
623 u.i[0] = high, u.i[1] = low;
624#else
625 u.i[0] = low, u.i[1] = high;
626#endif
627
628 return immed_real_const_1 (u.d, mode);
629 }
630
b3bf132d
RK
631 /* Similarly, if this is converting a floating-point value into a
632 single-word integer. Only do this is the host and target parameters are
633 compatible. */
634
635 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
906c4e36 636 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
b3bf132d 637 || flag_pretend_float)
83e9c679
RK
638 && (GET_MODE_CLASS (mode) == MODE_INT
639 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
b3bf132d
RK
640 && GET_CODE (x) == CONST_DOUBLE
641 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
642 && GET_MODE_BITSIZE (mode) == BITS_PER_WORD)
643 return operand_subword (x, 0, 0, GET_MODE (x));
644
8aada4ad
RK
645 /* Similarly, if this is converting a floating-point value into a
646 two-word integer, we can do this one word at a time and make an
647 integer. Only do this is the host and target parameters are
648 compatible. */
649
b3bf132d 650 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
906c4e36 651 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
b3bf132d 652 || flag_pretend_float)
83e9c679 653 && (GET_MODE_CLASS (mode) == MODE_INT
f5a2fb25 654 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
8aada4ad
RK
655 && GET_CODE (x) == CONST_DOUBLE
656 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
657 && GET_MODE_BITSIZE (mode) == 2 * BITS_PER_WORD)
658 {
659 rtx lowpart = operand_subword (x, WORDS_BIG_ENDIAN, 0, GET_MODE (x));
660 rtx highpart = operand_subword (x, ! WORDS_BIG_ENDIAN, 0, GET_MODE (x));
661
662 if (lowpart && GET_CODE (lowpart) == CONST_INT
663 && highpart && GET_CODE (highpart) == CONST_INT)
664 return immed_double_const (INTVAL (lowpart), INTVAL (highpart), mode);
665 }
666
23b2ce53
RS
667 /* Otherwise, we can't do this. */
668 return 0;
669}
670\f
280194b0
RS
671/* Return the real part (which has mode MODE) of a complex value X.
672 This always comes at the low address in memory. */
673
674rtx
675gen_realpart (mode, x)
676 enum machine_mode mode;
677 register rtx x;
678{
679 if (WORDS_BIG_ENDIAN)
680 return gen_highpart (mode, x);
681 else
682 return gen_lowpart (mode, x);
683}
684
685/* Return the imaginary part (which has mode MODE) of a complex value X.
686 This always comes at the high address in memory. */
687
688rtx
689gen_imagpart (mode, x)
690 enum machine_mode mode;
691 register rtx x;
692{
693 if (WORDS_BIG_ENDIAN)
694 return gen_lowpart (mode, x);
695 else
696 return gen_highpart (mode, x);
697}
698\f
23b2ce53
RS
699/* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
700 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
701 least-significant part of X.
702 MODE specifies how big a part of X to return;
703 it usually should not be larger than a word.
704 If X is a MEM whose address is a QUEUED, the value may be so also. */
705
706rtx
707gen_lowpart (mode, x)
708 enum machine_mode mode;
709 register rtx x;
710{
711 rtx result = gen_lowpart_common (mode, x);
712
713 if (result)
714 return result;
715 else if (GET_CODE (x) == MEM)
716 {
717 /* The only additional case we can do is MEM. */
718 register int offset = 0;
719 if (WORDS_BIG_ENDIAN)
720 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
721 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
722
723 if (BYTES_BIG_ENDIAN)
724 /* Adjust the address so that the address-after-the-data
725 is unchanged. */
726 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
727 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
728
729 return change_address (x, mode, plus_constant (XEXP (x, 0), offset));
730 }
731 else
732 abort ();
733}
734
ccba022b
RS
735/* Like `gen_lowpart', but refer to the most significant part.
736 This is used to access the imaginary part of a complex number. */
737
738rtx
739gen_highpart (mode, x)
740 enum machine_mode mode;
741 register rtx x;
742{
743 /* This case loses if X is a subreg. To catch bugs early,
744 complain if an invalid MODE is used even in other cases. */
745 if (GET_MODE_SIZE (mode) > UNITS_PER_WORD
746 && GET_MODE_SIZE (mode) != GET_MODE_UNIT_SIZE (GET_MODE (x)))
747 abort ();
748 if (GET_CODE (x) == CONST_DOUBLE
749#if !(TARGET_FLOAT_FORMAT != HOST_FLOAT_FORMAT || defined(REAL_IS_NOT_DOUBLE))
750 && GET_MODE_CLASS (GET_MODE (x)) != MODE_FLOAT
751#endif
752 )
753 return gen_rtx (CONST_INT, VOIDmode,
754 CONST_DOUBLE_HIGH (x) & GET_MODE_MASK (mode));
755 else if (GET_CODE (x) == CONST_INT)
756 return const0_rtx;
757 else if (GET_CODE (x) == MEM)
758 {
759 register int offset = 0;
760#if !WORDS_BIG_ENDIAN
761 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
762 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
763#endif
764#if !BYTES_BIG_ENDIAN
765 if (GET_MODE_SIZE (mode) < UNITS_PER_WORD)
766 offset -= (GET_MODE_SIZE (mode)
767 - MIN (UNITS_PER_WORD,
768 GET_MODE_SIZE (GET_MODE (x))));
769#endif
770 return change_address (x, mode, plus_constant (XEXP (x, 0), offset));
771 }
772 else if (GET_CODE (x) == SUBREG)
773 {
774 /* The only time this should occur is when we are looking at a
775 multi-word item with a SUBREG whose mode is the same as that of the
776 item. It isn't clear what we would do if it wasn't. */
777 if (SUBREG_WORD (x) != 0)
778 abort ();
779 return gen_highpart (mode, SUBREG_REG (x));
780 }
781 else if (GET_CODE (x) == REG)
782 {
783 int word = 0;
784
785#if !WORDS_BIG_ENDIAN
786 if (GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD)
787 word = ((GET_MODE_SIZE (GET_MODE (x))
788 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD))
789 / UNITS_PER_WORD);
790#endif
cb00f51a
RK
791 if (REGNO (x) < FIRST_PSEUDO_REGISTER
792 /* We want to keep the stack, frame, and arg pointers special. */
793 && REGNO (x) != FRAME_POINTER_REGNUM
794#if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
795 && REGNO (x) != ARG_POINTER_REGNUM
796#endif
797 && REGNO (x) != STACK_POINTER_REGNUM)
ccba022b
RS
798 return gen_rtx (REG, mode, REGNO (x) + word);
799 else
800 return gen_rtx (SUBREG, mode, x, word);
801 }
802 else
803 abort ();
804}
805
23b2ce53
RS
806/* Return 1 iff X, assumed to be a SUBREG,
807 refers to the least significant part of its containing reg.
808 If X is not a SUBREG, always return 1 (it is its own low part!). */
809
810int
811subreg_lowpart_p (x)
812 rtx x;
813{
814 if (GET_CODE (x) != SUBREG)
815 return 1;
816
817 if (WORDS_BIG_ENDIAN
818 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) > UNITS_PER_WORD)
819 return (SUBREG_WORD (x)
820 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))
821 - MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD))
822 / UNITS_PER_WORD));
823
824 return SUBREG_WORD (x) == 0;
825}
826\f
827/* Return subword I of operand OP.
828 The word number, I, is interpreted as the word number starting at the
829 low-order address. Word 0 is the low-order word if not WORDS_BIG_ENDIAN,
830 otherwise it is the high-order word.
831
832 If we cannot extract the required word, we return zero. Otherwise, an
833 rtx corresponding to the requested word will be returned.
834
835 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
836 reload has completed, a valid address will always be returned. After
837 reload, if a valid address cannot be returned, we return zero.
838
839 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
840 it is the responsibility of the caller.
841
842 MODE is the mode of OP in case it is a CONST_INT. */
843
844rtx
845operand_subword (op, i, validate_address, mode)
846 rtx op;
847 int i;
848 int validate_address;
849 enum machine_mode mode;
850{
906c4e36
RK
851 HOST_WIDE_INT val;
852 int size_ratio = HOST_BITS_PER_WIDE_INT / BITS_PER_WORD;
23b2ce53
RS
853
854 if (mode == VOIDmode)
855 mode = GET_MODE (op);
856
857 if (mode == VOIDmode)
858 abort ();
859
860 /* If OP is narrower than a word or if we want a word outside OP, fail. */
861 if (mode != BLKmode
862 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD
863 || (i + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode)))
864 return 0;
865
866 /* If OP is already an integer word, return it. */
867 if (GET_MODE_CLASS (mode) == MODE_INT
868 && GET_MODE_SIZE (mode) == UNITS_PER_WORD)
869 return op;
870
871 /* If OP is a REG or SUBREG, we can handle it very simply. */
872 if (GET_CODE (op) == REG)
873 {
874 /* If the register is not valid for MODE, return 0. If we don't
875 do this, there is no way to fix up the resulting REG later. */
876 if (REGNO (op) < FIRST_PSEUDO_REGISTER
877 && ! HARD_REGNO_MODE_OK (REGNO (op) + i, word_mode))
878 return 0;
879 else if (REGNO (op) >= FIRST_PSEUDO_REGISTER
880 || (REG_FUNCTION_VALUE_P (op)
cb00f51a
RK
881 && rtx_equal_function_value_matters)
882 /* We want to keep the stack, frame, and arg pointers
883 special. */
884 || REGNO (op) == FRAME_POINTER_REGNUM
885#if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
886 || REGNO (op) == ARG_POINTER_REGNUM
887#endif
888 || REGNO (op) == STACK_POINTER_REGNUM)
23b2ce53
RS
889 return gen_rtx (SUBREG, word_mode, op, i);
890 else
891 return gen_rtx (REG, word_mode, REGNO (op) + i);
892 }
893 else if (GET_CODE (op) == SUBREG)
894 return gen_rtx (SUBREG, word_mode, SUBREG_REG (op), i + SUBREG_WORD (op));
895
896 /* Form a new MEM at the requested address. */
897 if (GET_CODE (op) == MEM)
898 {
899 rtx addr = plus_constant (XEXP (op, 0), i * UNITS_PER_WORD);
900 rtx new;
901
902 if (validate_address)
903 {
904 if (reload_completed)
905 {
906 if (! strict_memory_address_p (word_mode, addr))
907 return 0;
908 }
909 else
910 addr = memory_address (word_mode, addr);
911 }
912
913 new = gen_rtx (MEM, word_mode, addr);
914
915 MEM_VOLATILE_P (new) = MEM_VOLATILE_P (op);
916 MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (op);
917 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (op);
918
919 return new;
920 }
921
922 /* The only remaining cases are when OP is a constant. If the host and
923 target floating formats are the same, handling two-word floating
924 constants are easy. */
925 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
906c4e36 926 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
23b2ce53
RS
927 || flag_pretend_float)
928 && GET_MODE_CLASS (mode) == MODE_FLOAT
929 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
930 && GET_CODE (op) == CONST_DOUBLE)
7529ac93
CH
931 {
932 /* The constant is stored in the host's word-ordering,
933 but we want to access it in the target's word-ordering. Some
934 compilers don't like a conditional inside macro args, so we have two
935 copies of the return. */
2fe02d7e 936#ifdef HOST_WORDS_BIG_ENDIAN
7529ac93
CH
937 return GEN_INT (i == WORDS_BIG_ENDIAN
938 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
2fe02d7e 939#else
7529ac93
CH
940 return GEN_INT (i != WORDS_BIG_ENDIAN
941 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
2fe02d7e 942#endif
7529ac93 943 }
23b2ce53
RS
944
945 /* Single word float is a little harder, since single- and double-word
946 values often do not have the same high-order bits. We have already
947 verified that we want the only defined word of the single-word value. */
948 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
906c4e36 949 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
23b2ce53
RS
950 || flag_pretend_float)
951 && GET_MODE_CLASS (mode) == MODE_FLOAT
952 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
953 && GET_CODE (op) == CONST_DOUBLE)
954 {
955 double d;
906c4e36 956 union {float f; HOST_WIDE_INT i; } u;
23b2ce53
RS
957
958 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
959
960 u.f = d;
906c4e36 961 return GEN_INT (u.i);
23b2ce53
RS
962 }
963
964 /* The only remaining cases that we can handle are integers.
965 Convert to proper endianness now since these cases need it.
966 At this point, i == 0 means the low-order word.
967
968 Note that it must be that BITS_PER_WORD <= HOST_BITS_PER_INT.
969 This is because if it were greater, it could only have been two
970 times greater since we do not support making wider constants. In
971 that case, it MODE would have already been the proper size and
972 it would have been handled above. This means we do not have to
973 worry about the case where we would be returning a CONST_DOUBLE. */
974
975 if (GET_MODE_CLASS (mode) != MODE_INT
976 || (GET_CODE (op) != CONST_INT && GET_CODE (op) != CONST_DOUBLE))
977 return 0;
978
979 if (WORDS_BIG_ENDIAN)
980 i = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - i;
981
982 /* Find out which word on the host machine this value is in and get
983 it from the constant. */
984 val = (i / size_ratio == 0
985 ? (GET_CODE (op) == CONST_INT ? INTVAL (op) : CONST_DOUBLE_LOW (op))
986 : (GET_CODE (op) == CONST_INT
987 ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op)));
988
989 /* If BITS_PER_WORD is smaller than an int, get the appropriate bits. */
906c4e36 990 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT)
23b2ce53 991 val = ((val >> ((i % size_ratio) * BITS_PER_WORD))
906c4e36
RK
992 & (((HOST_WIDE_INT) 1
993 << (BITS_PER_WORD % HOST_BITS_PER_WIDE_INT)) - 1));
23b2ce53 994
906c4e36 995 return GEN_INT (val);
23b2ce53
RS
996}
997
998/* Similar to `operand_subword', but never return 0. If we can't extract
999 the required subword, put OP into a register and try again. If that fails,
1000 abort. We always validate the address in this case. It is not valid
1001 to call this function after reload; it is mostly meant for RTL
1002 generation.
1003
1004 MODE is the mode of OP, in case it is CONST_INT. */
1005
1006rtx
1007operand_subword_force (op, i, mode)
1008 rtx op;
1009 int i;
1010 enum machine_mode mode;
1011{
1012 rtx result = operand_subword (op, i, 1, mode);
1013
1014 if (result)
1015 return result;
1016
1017 if (mode != BLKmode && mode != VOIDmode)
1018 op = force_reg (mode, op);
1019
1020 result = operand_subword (op, i, 1, mode);
1021 if (result == 0)
1022 abort ();
1023
1024 return result;
1025}
1026\f
1027/* Given a compare instruction, swap the operands.
1028 A test instruction is changed into a compare of 0 against the operand. */
1029
1030void
1031reverse_comparison (insn)
1032 rtx insn;
1033{
1034 rtx body = PATTERN (insn);
1035 rtx comp;
1036
1037 if (GET_CODE (body) == SET)
1038 comp = SET_SRC (body);
1039 else
1040 comp = SET_SRC (XVECEXP (body, 0, 0));
1041
1042 if (GET_CODE (comp) == COMPARE)
1043 {
1044 rtx op0 = XEXP (comp, 0);
1045 rtx op1 = XEXP (comp, 1);
1046 XEXP (comp, 0) = op1;
1047 XEXP (comp, 1) = op0;
1048 }
1049 else
1050 {
1051 rtx new = gen_rtx (COMPARE, VOIDmode,
1052 CONST0_RTX (GET_MODE (comp)), comp);
1053 if (GET_CODE (body) == SET)
1054 SET_SRC (body) = new;
1055 else
1056 SET_SRC (XVECEXP (body, 0, 0)) = new;
1057 }
1058}
1059\f
1060/* Return a memory reference like MEMREF, but with its mode changed
1061 to MODE and its address changed to ADDR.
1062 (VOIDmode means don't change the mode.
1063 NULL for ADDR means don't change the address.) */
1064
1065rtx
1066change_address (memref, mode, addr)
1067 rtx memref;
1068 enum machine_mode mode;
1069 rtx addr;
1070{
1071 rtx new;
1072
1073 if (GET_CODE (memref) != MEM)
1074 abort ();
1075 if (mode == VOIDmode)
1076 mode = GET_MODE (memref);
1077 if (addr == 0)
1078 addr = XEXP (memref, 0);
1079
1080 /* If reload is in progress or has completed, ADDR must be valid.
1081 Otherwise, we can call memory_address to make it valid. */
1082 if (reload_completed || reload_in_progress)
1083 {
1084 if (! memory_address_p (mode, addr))
1085 abort ();
1086 }
1087 else
1088 addr = memory_address (mode, addr);
1089
1090 new = gen_rtx (MEM, mode, addr);
1091 MEM_VOLATILE_P (new) = MEM_VOLATILE_P (memref);
1092 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (memref);
1093 MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (memref);
1094 return new;
1095}
1096\f
1097/* Return a newly created CODE_LABEL rtx with a unique label number. */
1098
1099rtx
1100gen_label_rtx ()
1101{
906c4e36
RK
1102 register rtx label = gen_rtx (CODE_LABEL, VOIDmode, 0, 0, 0,
1103 label_num++, NULL_PTR);
23b2ce53
RS
1104 LABEL_NUSES (label) = 0;
1105 return label;
1106}
1107\f
1108/* For procedure integration. */
1109
1110/* Return a newly created INLINE_HEADER rtx. Should allocate this
1111 from a permanent obstack when the opportunity arises. */
1112
1113rtx
1114gen_inline_header_rtx (first_insn, first_parm_insn, first_labelno,
1115 last_labelno, max_parm_regnum, max_regnum, args_size,
1116 pops_args, stack_slots, function_flags,
1117 outgoing_args_size, original_arg_vector,
1118 original_decl_initial)
1119 rtx first_insn, first_parm_insn;
1120 int first_labelno, last_labelno, max_parm_regnum, max_regnum, args_size;
1121 int pops_args;
1122 rtx stack_slots;
1123 int function_flags;
1124 int outgoing_args_size;
1125 rtvec original_arg_vector;
1126 rtx original_decl_initial;
1127{
1128 rtx header = gen_rtx (INLINE_HEADER, VOIDmode,
906c4e36 1129 cur_insn_uid++, NULL_RTX,
23b2ce53
RS
1130 first_insn, first_parm_insn,
1131 first_labelno, last_labelno,
1132 max_parm_regnum, max_regnum, args_size, pops_args,
1133 stack_slots, function_flags, outgoing_args_size,
1134 original_arg_vector, original_decl_initial);
1135 return header;
1136}
1137
1138/* Install new pointers to the first and last insns in the chain.
1139 Used for an inline-procedure after copying the insn chain. */
1140
1141void
1142set_new_first_and_last_insn (first, last)
1143 rtx first, last;
1144{
1145 first_insn = first;
1146 last_insn = last;
1147}
1148
1149/* Set the range of label numbers found in the current function.
1150 This is used when belatedly compiling an inline function. */
1151
1152void
1153set_new_first_and_last_label_num (first, last)
1154 int first, last;
1155{
1156 base_label_num = label_num;
1157 first_label_num = first;
1158 last_label_num = last;
1159}
1160\f
1161/* Save all variables describing the current status into the structure *P.
1162 This is used before starting a nested function. */
1163
1164void
1165save_emit_status (p)
1166 struct function *p;
1167{
1168 p->reg_rtx_no = reg_rtx_no;
1169 p->first_label_num = first_label_num;
1170 p->first_insn = first_insn;
1171 p->last_insn = last_insn;
1172 p->sequence_stack = sequence_stack;
1173 p->cur_insn_uid = cur_insn_uid;
1174 p->last_linenum = last_linenum;
1175 p->last_filename = last_filename;
1176 p->regno_pointer_flag = regno_pointer_flag;
1177 p->regno_pointer_flag_length = regno_pointer_flag_length;
1178 p->regno_reg_rtx = regno_reg_rtx;
1179}
1180
1181/* Restore all variables describing the current status from the structure *P.
1182 This is used after a nested function. */
1183
1184void
1185restore_emit_status (p)
1186 struct function *p;
1187{
1188 int i;
1189
1190 reg_rtx_no = p->reg_rtx_no;
1191 first_label_num = p->first_label_num;
1192 first_insn = p->first_insn;
1193 last_insn = p->last_insn;
1194 sequence_stack = p->sequence_stack;
1195 cur_insn_uid = p->cur_insn_uid;
1196 last_linenum = p->last_linenum;
1197 last_filename = p->last_filename;
1198 regno_pointer_flag = p->regno_pointer_flag;
1199 regno_pointer_flag_length = p->regno_pointer_flag_length;
1200 regno_reg_rtx = p->regno_reg_rtx;
1201
1202 /* Clear our cache of rtx expressions for start_sequence and gen_sequence. */
1203 sequence_element_free_list = 0;
1204 for (i = 0; i < SEQUENCE_RESULT_SIZE; i++)
1205 sequence_result[i] = 0;
1206}
1207\f
1208/* Go through all the RTL insn bodies and copy any invalid shared structure.
1209 It does not work to do this twice, because the mark bits set here
1210 are not cleared afterwards. */
1211
1212void
1213unshare_all_rtl (insn)
1214 register rtx insn;
1215{
1216 for (; insn; insn = NEXT_INSN (insn))
1217 if (GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN
1218 || GET_CODE (insn) == CALL_INSN)
1219 {
1220 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
1221 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
1222 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
1223 }
1224
1225 /* Make sure the addresses of stack slots found outside the insn chain
1226 (such as, in DECL_RTL of a variable) are not shared
1227 with the insn chain.
1228
1229 This special care is necessary when the stack slot MEM does not
1230 actually appear in the insn chain. If it does appear, its address
1231 is unshared from all else at that point. */
1232
1233 copy_rtx_if_shared (stack_slot_list);
1234}
1235
1236/* Mark ORIG as in use, and return a copy of it if it was already in use.
1237 Recursively does the same for subexpressions. */
1238
1239rtx
1240copy_rtx_if_shared (orig)
1241 rtx orig;
1242{
1243 register rtx x = orig;
1244 register int i;
1245 register enum rtx_code code;
1246 register char *format_ptr;
1247 int copied = 0;
1248
1249 if (x == 0)
1250 return 0;
1251
1252 code = GET_CODE (x);
1253
1254 /* These types may be freely shared. */
1255
1256 switch (code)
1257 {
1258 case REG:
1259 case QUEUED:
1260 case CONST_INT:
1261 case CONST_DOUBLE:
1262 case SYMBOL_REF:
1263 case CODE_LABEL:
1264 case PC:
1265 case CC0:
1266 case SCRATCH:
1267 /* SCRATCH must be shared because they represent distinct values. */
1268 return x;
1269
1270 case INSN:
1271 case JUMP_INSN:
1272 case CALL_INSN:
1273 case NOTE:
1274 case LABEL_REF:
1275 case BARRIER:
1276 /* The chain of insns is not being copied. */
1277 return x;
1278
1279 case MEM:
1280 /* A MEM is allowed to be shared if its address is constant
1281 or is a constant plus one of the special registers. */
1282 if (CONSTANT_ADDRESS_P (XEXP (x, 0))
1283 || XEXP (x, 0) == virtual_stack_vars_rtx
1284 || XEXP (x, 0) == virtual_incoming_args_rtx)
1285 return x;
1286
1287 if (GET_CODE (XEXP (x, 0)) == PLUS
1288 && (XEXP (XEXP (x, 0), 0) == virtual_stack_vars_rtx
1289 || XEXP (XEXP (x, 0), 0) == virtual_incoming_args_rtx)
1290 && CONSTANT_ADDRESS_P (XEXP (XEXP (x, 0), 1)))
1291 {
1292 /* This MEM can appear in more than one place,
1293 but its address better not be shared with anything else. */
1294 if (! x->used)
1295 XEXP (x, 0) = copy_rtx_if_shared (XEXP (x, 0));
1296 x->used = 1;
1297 return x;
1298 }
1299 }
1300
1301 /* This rtx may not be shared. If it has already been seen,
1302 replace it with a copy of itself. */
1303
1304 if (x->used)
1305 {
1306 register rtx copy;
1307
1308 copy = rtx_alloc (code);
1309 bcopy (x, copy, (sizeof (*copy) - sizeof (copy->fld)
1310 + sizeof (copy->fld[0]) * GET_RTX_LENGTH (code)));
1311 x = copy;
1312 copied = 1;
1313 }
1314 x->used = 1;
1315
1316 /* Now scan the subexpressions recursively.
1317 We can store any replaced subexpressions directly into X
1318 since we know X is not shared! Any vectors in X
1319 must be copied if X was copied. */
1320
1321 format_ptr = GET_RTX_FORMAT (code);
1322
1323 for (i = 0; i < GET_RTX_LENGTH (code); i++)
1324 {
1325 switch (*format_ptr++)
1326 {
1327 case 'e':
1328 XEXP (x, i) = copy_rtx_if_shared (XEXP (x, i));
1329 break;
1330
1331 case 'E':
1332 if (XVEC (x, i) != NULL)
1333 {
1334 register int j;
1335
1336 if (copied)
1337 XVEC (x, i) = gen_rtvec_v (XVECLEN (x, i), &XVECEXP (x, i, 0));
1338 for (j = 0; j < XVECLEN (x, i); j++)
1339 XVECEXP (x, i, j)
1340 = copy_rtx_if_shared (XVECEXP (x, i, j));
1341 }
1342 break;
1343 }
1344 }
1345 return x;
1346}
1347
1348/* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
1349 to look for shared sub-parts. */
1350
1351void
1352reset_used_flags (x)
1353 rtx x;
1354{
1355 register int i, j;
1356 register enum rtx_code code;
1357 register char *format_ptr;
1358 int copied = 0;
1359
1360 if (x == 0)
1361 return;
1362
1363 code = GET_CODE (x);
1364
1365 /* These types may be freely shared so we needn't do any reseting
1366 for them. */
1367
1368 switch (code)
1369 {
1370 case REG:
1371 case QUEUED:
1372 case CONST_INT:
1373 case CONST_DOUBLE:
1374 case SYMBOL_REF:
1375 case CODE_LABEL:
1376 case PC:
1377 case CC0:
1378 return;
1379
1380 case INSN:
1381 case JUMP_INSN:
1382 case CALL_INSN:
1383 case NOTE:
1384 case LABEL_REF:
1385 case BARRIER:
1386 /* The chain of insns is not being copied. */
1387 return;
1388 }
1389
1390 x->used = 0;
1391
1392 format_ptr = GET_RTX_FORMAT (code);
1393 for (i = 0; i < GET_RTX_LENGTH (code); i++)
1394 {
1395 switch (*format_ptr++)
1396 {
1397 case 'e':
1398 reset_used_flags (XEXP (x, i));
1399 break;
1400
1401 case 'E':
1402 for (j = 0; j < XVECLEN (x, i); j++)
1403 reset_used_flags (XVECEXP (x, i, j));
1404 break;
1405 }
1406 }
1407}
1408\f
1409/* Copy X if necessary so that it won't be altered by changes in OTHER.
1410 Return X or the rtx for the pseudo reg the value of X was copied into.
1411 OTHER must be valid as a SET_DEST. */
1412
1413rtx
1414make_safe_from (x, other)
1415 rtx x, other;
1416{
1417 while (1)
1418 switch (GET_CODE (other))
1419 {
1420 case SUBREG:
1421 other = SUBREG_REG (other);
1422 break;
1423 case STRICT_LOW_PART:
1424 case SIGN_EXTEND:
1425 case ZERO_EXTEND:
1426 other = XEXP (other, 0);
1427 break;
1428 default:
1429 goto done;
1430 }
1431 done:
1432 if ((GET_CODE (other) == MEM
1433 && ! CONSTANT_P (x)
1434 && GET_CODE (x) != REG
1435 && GET_CODE (x) != SUBREG)
1436 || (GET_CODE (other) == REG
1437 && (REGNO (other) < FIRST_PSEUDO_REGISTER
1438 || reg_mentioned_p (other, x))))
1439 {
1440 rtx temp = gen_reg_rtx (GET_MODE (x));
1441 emit_move_insn (temp, x);
1442 return temp;
1443 }
1444 return x;
1445}
1446\f
1447/* Emission of insns (adding them to the doubly-linked list). */
1448
1449/* Return the first insn of the current sequence or current function. */
1450
1451rtx
1452get_insns ()
1453{
1454 return first_insn;
1455}
1456
1457/* Return the last insn emitted in current sequence or current function. */
1458
1459rtx
1460get_last_insn ()
1461{
1462 return last_insn;
1463}
1464
1465/* Specify a new insn as the last in the chain. */
1466
1467void
1468set_last_insn (insn)
1469 rtx insn;
1470{
1471 if (NEXT_INSN (insn) != 0)
1472 abort ();
1473 last_insn = insn;
1474}
1475
1476/* Return the last insn emitted, even if it is in a sequence now pushed. */
1477
1478rtx
1479get_last_insn_anywhere ()
1480{
1481 struct sequence_stack *stack;
1482 if (last_insn)
1483 return last_insn;
1484 for (stack = sequence_stack; stack; stack = stack->next)
1485 if (stack->last != 0)
1486 return stack->last;
1487 return 0;
1488}
1489
1490/* Return a number larger than any instruction's uid in this function. */
1491
1492int
1493get_max_uid ()
1494{
1495 return cur_insn_uid;
1496}
1497\f
1498/* Return the next insn. If it is a SEQUENCE, return the first insn
1499 of the sequence. */
1500
1501rtx
1502next_insn (insn)
1503 rtx insn;
1504{
1505 if (insn)
1506 {
1507 insn = NEXT_INSN (insn);
1508 if (insn && GET_CODE (insn) == INSN
1509 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1510 insn = XVECEXP (PATTERN (insn), 0, 0);
1511 }
1512
1513 return insn;
1514}
1515
1516/* Return the previous insn. If it is a SEQUENCE, return the last insn
1517 of the sequence. */
1518
1519rtx
1520previous_insn (insn)
1521 rtx insn;
1522{
1523 if (insn)
1524 {
1525 insn = PREV_INSN (insn);
1526 if (insn && GET_CODE (insn) == INSN
1527 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1528 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
1529 }
1530
1531 return insn;
1532}
1533
1534/* Return the next insn after INSN that is not a NOTE. This routine does not
1535 look inside SEQUENCEs. */
1536
1537rtx
1538next_nonnote_insn (insn)
1539 rtx insn;
1540{
1541 while (insn)
1542 {
1543 insn = NEXT_INSN (insn);
1544 if (insn == 0 || GET_CODE (insn) != NOTE)
1545 break;
1546 }
1547
1548 return insn;
1549}
1550
1551/* Return the previous insn before INSN that is not a NOTE. This routine does
1552 not look inside SEQUENCEs. */
1553
1554rtx
1555prev_nonnote_insn (insn)
1556 rtx insn;
1557{
1558 while (insn)
1559 {
1560 insn = PREV_INSN (insn);
1561 if (insn == 0 || GET_CODE (insn) != NOTE)
1562 break;
1563 }
1564
1565 return insn;
1566}
1567
1568/* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
1569 or 0, if there is none. This routine does not look inside
1570 SEQUENCEs. */
1571
1572rtx
1573next_real_insn (insn)
1574 rtx insn;
1575{
1576 while (insn)
1577 {
1578 insn = NEXT_INSN (insn);
1579 if (insn == 0 || GET_CODE (insn) == INSN
1580 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN)
1581 break;
1582 }
1583
1584 return insn;
1585}
1586
1587/* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
1588 or 0, if there is none. This routine does not look inside
1589 SEQUENCEs. */
1590
1591rtx
1592prev_real_insn (insn)
1593 rtx insn;
1594{
1595 while (insn)
1596 {
1597 insn = PREV_INSN (insn);
1598 if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN
1599 || GET_CODE (insn) == JUMP_INSN)
1600 break;
1601 }
1602
1603 return insn;
1604}
1605
1606/* Find the next insn after INSN that really does something. This routine
1607 does not look inside SEQUENCEs. Until reload has completed, this is the
1608 same as next_real_insn. */
1609
1610rtx
1611next_active_insn (insn)
1612 rtx insn;
1613{
1614 while (insn)
1615 {
1616 insn = NEXT_INSN (insn);
1617 if (insn == 0
1618 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
1619 || (GET_CODE (insn) == INSN
1620 && (! reload_completed
1621 || (GET_CODE (PATTERN (insn)) != USE
1622 && GET_CODE (PATTERN (insn)) != CLOBBER))))
1623 break;
1624 }
1625
1626 return insn;
1627}
1628
1629/* Find the last insn before INSN that really does something. This routine
1630 does not look inside SEQUENCEs. Until reload has completed, this is the
1631 same as prev_real_insn. */
1632
1633rtx
1634prev_active_insn (insn)
1635 rtx insn;
1636{
1637 while (insn)
1638 {
1639 insn = PREV_INSN (insn);
1640 if (insn == 0
1641 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
1642 || (GET_CODE (insn) == INSN
1643 && (! reload_completed
1644 || (GET_CODE (PATTERN (insn)) != USE
1645 && GET_CODE (PATTERN (insn)) != CLOBBER))))
1646 break;
1647 }
1648
1649 return insn;
1650}
1651
1652/* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
1653
1654rtx
1655next_label (insn)
1656 rtx insn;
1657{
1658 while (insn)
1659 {
1660 insn = NEXT_INSN (insn);
1661 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
1662 break;
1663 }
1664
1665 return insn;
1666}
1667
1668/* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
1669
1670rtx
1671prev_label (insn)
1672 rtx insn;
1673{
1674 while (insn)
1675 {
1676 insn = PREV_INSN (insn);
1677 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
1678 break;
1679 }
1680
1681 return insn;
1682}
1683\f
1684#ifdef HAVE_cc0
c572e5ba
JVA
1685/* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
1686 and REG_CC_USER notes so we can find it. */
1687
1688void
1689link_cc0_insns (insn)
1690 rtx insn;
1691{
1692 rtx user = next_nonnote_insn (insn);
1693
1694 if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE)
1695 user = XVECEXP (PATTERN (user), 0, 0);
1696
1697 REG_NOTES (user) = gen_rtx (INSN_LIST, REG_CC_SETTER, insn,
1698 REG_NOTES (user));
1699 REG_NOTES (insn) = gen_rtx (INSN_LIST, REG_CC_USER, user, REG_NOTES (insn));
1700}
1701
23b2ce53
RS
1702/* Return the next insn that uses CC0 after INSN, which is assumed to
1703 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
1704 applied to the result of this function should yield INSN).
1705
1706 Normally, this is simply the next insn. However, if a REG_CC_USER note
1707 is present, it contains the insn that uses CC0.
1708
1709 Return 0 if we can't find the insn. */
1710
1711rtx
1712next_cc0_user (insn)
1713 rtx insn;
1714{
906c4e36 1715 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
23b2ce53
RS
1716
1717 if (note)
1718 return XEXP (note, 0);
1719
1720 insn = next_nonnote_insn (insn);
1721 if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
1722 insn = XVECEXP (PATTERN (insn), 0, 0);
1723
1724 if (insn && GET_RTX_CLASS (GET_CODE (insn)) == 'i'
1725 && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
1726 return insn;
1727
1728 return 0;
1729}
1730
1731/* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
1732 note, it is the previous insn. */
1733
1734rtx
1735prev_cc0_setter (insn)
1736 rtx insn;
1737{
906c4e36 1738 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
23b2ce53
RS
1739 rtx link;
1740
1741 if (note)
1742 return XEXP (note, 0);
1743
1744 insn = prev_nonnote_insn (insn);
1745 if (! sets_cc0_p (PATTERN (insn)))
1746 abort ();
1747
1748 return insn;
1749}
1750#endif
1751\f
1752/* Try splitting insns that can be split for better scheduling.
1753 PAT is the pattern which might split.
1754 TRIAL is the insn providing PAT.
1755 BACKWARDS is non-zero if we are scanning insns from last to first.
1756
1757 If this routine succeeds in splitting, it returns the first or last
1758 replacement insn depending on the value of BACKWARDS. Otherwise, it
1759 returns TRIAL. If the insn to be returned can be split, it will be. */
1760
1761rtx
1762try_split (pat, trial, backwards)
1763 rtx pat, trial;
1764 int backwards;
1765{
1766 rtx before = PREV_INSN (trial);
1767 rtx after = NEXT_INSN (trial);
1768 rtx seq = split_insns (pat, trial);
1769 int has_barrier = 0;
1770 rtx tem;
1771
1772 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
1773 We may need to handle this specially. */
1774 if (after && GET_CODE (after) == BARRIER)
1775 {
1776 has_barrier = 1;
1777 after = NEXT_INSN (after);
1778 }
1779
1780 if (seq)
1781 {
1782 /* SEQ can either be a SEQUENCE or the pattern of a single insn.
1783 The latter case will normally arise only when being done so that
1784 it, in turn, will be split (SFmode on the 29k is an example). */
1785 if (GET_CODE (seq) == SEQUENCE)
1786 {
1787 /* If we are splitting a JUMP_INSN, look for the JUMP_INSN in
1788 SEQ and copy our JUMP_LABEL to it. If JUMP_LABEL is non-zero,
1789 increment the usage count so we don't delete the label. */
1790 int i;
1791
1792 if (GET_CODE (trial) == JUMP_INSN)
1793 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
1794 if (GET_CODE (XVECEXP (seq, 0, i)) == JUMP_INSN)
1795 {
1796 JUMP_LABEL (XVECEXP (seq, 0, i)) = JUMP_LABEL (trial);
1797
1798 if (JUMP_LABEL (trial))
1799 LABEL_NUSES (JUMP_LABEL (trial))++;
1800 }
1801
1802 tem = emit_insn_after (seq, before);
1803
1804 delete_insn (trial);
1805 if (has_barrier)
1806 emit_barrier_after (tem);
1807 }
1808 /* Avoid infinite loop if the result matches the original pattern. */
1809 else if (rtx_equal_p (seq, pat))
1810 return trial;
1811 else
1812 {
1813 PATTERN (trial) = seq;
1814 INSN_CODE (trial) = -1;
1815 }
1816
1817 /* Set TEM to the insn we should return. */
1818 tem = backwards ? prev_active_insn (after) : next_active_insn (before);
1819 return try_split (PATTERN (tem), tem, backwards);
1820 }
1821
1822 return trial;
1823}
1824\f
1825/* Make and return an INSN rtx, initializing all its slots.
4b1f5e8c 1826 Store PATTERN in the pattern slots. */
23b2ce53
RS
1827
1828rtx
4b1f5e8c 1829make_insn_raw (pattern)
23b2ce53 1830 rtx pattern;
23b2ce53
RS
1831{
1832 register rtx insn;
1833
1834 insn = rtx_alloc(INSN);
1835 INSN_UID(insn) = cur_insn_uid++;
1836
1837 PATTERN (insn) = pattern;
1838 INSN_CODE (insn) = -1;
1839 LOG_LINKS(insn) = NULL;
1840 REG_NOTES(insn) = NULL;
1841
1842 return insn;
1843}
1844
1845/* Like `make_insn' but make a JUMP_INSN instead of an insn. */
1846
1847static rtx
4b1f5e8c 1848make_jump_insn_raw (pattern)
23b2ce53 1849 rtx pattern;
23b2ce53
RS
1850{
1851 register rtx insn;
1852
4b1f5e8c 1853 insn = rtx_alloc (JUMP_INSN);
23b2ce53
RS
1854 INSN_UID(insn) = cur_insn_uid++;
1855
1856 PATTERN (insn) = pattern;
1857 INSN_CODE (insn) = -1;
1858 LOG_LINKS(insn) = NULL;
1859 REG_NOTES(insn) = NULL;
1860 JUMP_LABEL(insn) = NULL;
1861
1862 return insn;
1863}
1864\f
1865/* Add INSN to the end of the doubly-linked list.
1866 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
1867
1868void
1869add_insn (insn)
1870 register rtx insn;
1871{
1872 PREV_INSN (insn) = last_insn;
1873 NEXT_INSN (insn) = 0;
1874
1875 if (NULL != last_insn)
1876 NEXT_INSN (last_insn) = insn;
1877
1878 if (NULL == first_insn)
1879 first_insn = insn;
1880
1881 last_insn = insn;
1882}
1883
1884/* Add INSN into the doubly-linked list after insn AFTER. This should be the
1885 only function called to insert an insn once delay slots have been filled
1886 since only it knows how to update a SEQUENCE. */
1887
1888void
1889add_insn_after (insn, after)
1890 rtx insn, after;
1891{
1892 rtx next = NEXT_INSN (after);
1893
1894 NEXT_INSN (insn) = next;
1895 PREV_INSN (insn) = after;
1896
1897 if (next)
1898 {
1899 PREV_INSN (next) = insn;
1900 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
1901 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
1902 }
1903 else if (last_insn == after)
1904 last_insn = insn;
1905 else
1906 {
1907 struct sequence_stack *stack = sequence_stack;
1908 /* Scan all pending sequences too. */
1909 for (; stack; stack = stack->next)
1910 if (after == stack->last)
1911 stack->last = insn;
1912 }
1913
1914 NEXT_INSN (after) = insn;
1915 if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE)
1916 {
1917 rtx sequence = PATTERN (after);
1918 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
1919 }
1920}
1921
1922/* Delete all insns made since FROM.
1923 FROM becomes the new last instruction. */
1924
1925void
1926delete_insns_since (from)
1927 rtx from;
1928{
1929 if (from == 0)
1930 first_insn = 0;
1931 else
1932 NEXT_INSN (from) = 0;
1933 last_insn = from;
1934}
1935
1936/* Move a consecutive bunch of insns to a different place in the chain.
1937 The insns to be moved are those between FROM and TO.
1938 They are moved to a new position after the insn AFTER.
1939 AFTER must not be FROM or TO or any insn in between.
1940
1941 This function does not know about SEQUENCEs and hence should not be
1942 called after delay-slot filling has been done. */
1943
1944void
1945reorder_insns (from, to, after)
1946 rtx from, to, after;
1947{
1948 /* Splice this bunch out of where it is now. */
1949 if (PREV_INSN (from))
1950 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
1951 if (NEXT_INSN (to))
1952 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
1953 if (last_insn == to)
1954 last_insn = PREV_INSN (from);
1955 if (first_insn == from)
1956 first_insn = NEXT_INSN (to);
1957
1958 /* Make the new neighbors point to it and it to them. */
1959 if (NEXT_INSN (after))
1960 PREV_INSN (NEXT_INSN (after)) = to;
1961
1962 NEXT_INSN (to) = NEXT_INSN (after);
1963 PREV_INSN (from) = after;
1964 NEXT_INSN (after) = from;
1965 if (after == last_insn)
1966 last_insn = to;
1967}
1968
1969/* Return the line note insn preceding INSN. */
1970
1971static rtx
1972find_line_note (insn)
1973 rtx insn;
1974{
1975 if (no_line_numbers)
1976 return 0;
1977
1978 for (; insn; insn = PREV_INSN (insn))
1979 if (GET_CODE (insn) == NOTE
1980 && NOTE_LINE_NUMBER (insn) >= 0)
1981 break;
1982
1983 return insn;
1984}
1985
1986/* Like reorder_insns, but inserts line notes to preserve the line numbers
1987 of the moved insns when debugging. This may insert a note between AFTER
1988 and FROM, and another one after TO. */
1989
1990void
1991reorder_insns_with_line_notes (from, to, after)
1992 rtx from, to, after;
1993{
1994 rtx from_line = find_line_note (from);
1995 rtx after_line = find_line_note (after);
1996
1997 reorder_insns (from, to, after);
1998
1999 if (from_line == after_line)
2000 return;
2001
2002 if (from_line)
2003 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
2004 NOTE_LINE_NUMBER (from_line),
2005 after);
2006 if (after_line)
2007 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
2008 NOTE_LINE_NUMBER (after_line),
2009 to);
2010}
2011\f
2012/* Emit an insn of given code and pattern
2013 at a specified place within the doubly-linked list. */
2014
2015/* Make an instruction with body PATTERN
2016 and output it before the instruction BEFORE. */
2017
2018rtx
2019emit_insn_before (pattern, before)
2020 register rtx pattern, before;
2021{
2022 register rtx insn = before;
2023
2024 if (GET_CODE (pattern) == SEQUENCE)
2025 {
2026 register int i;
2027
2028 for (i = 0; i < XVECLEN (pattern, 0); i++)
2029 {
2030 insn = XVECEXP (pattern, 0, i);
2031 add_insn_after (insn, PREV_INSN (before));
2032 }
2033 if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2034 sequence_result[XVECLEN (pattern, 0)] = pattern;
2035 }
2036 else
2037 {
4b1f5e8c 2038 insn = make_insn_raw (pattern);
23b2ce53
RS
2039 add_insn_after (insn, PREV_INSN (before));
2040 }
2041
2042 return insn;
2043}
2044
2045/* Make an instruction with body PATTERN and code JUMP_INSN
2046 and output it before the instruction BEFORE. */
2047
2048rtx
2049emit_jump_insn_before (pattern, before)
2050 register rtx pattern, before;
2051{
2052 register rtx insn;
2053
2054 if (GET_CODE (pattern) == SEQUENCE)
2055 insn = emit_insn_before (pattern, before);
2056 else
2057 {
906c4e36 2058 insn = make_jump_insn_raw (pattern, NULL_RTVEC);
23b2ce53
RS
2059 add_insn_after (insn, PREV_INSN (before));
2060 }
2061
2062 return insn;
2063}
2064
2065/* Make an instruction with body PATTERN and code CALL_INSN
2066 and output it before the instruction BEFORE. */
2067
2068rtx
2069emit_call_insn_before (pattern, before)
2070 register rtx pattern, before;
2071{
2072 rtx insn = emit_insn_before (pattern, before);
2073 PUT_CODE (insn, CALL_INSN);
2074 return insn;
2075}
2076
2077/* Make an insn of code BARRIER
2078 and output it before the insn AFTER. */
2079
2080rtx
2081emit_barrier_before (before)
2082 register rtx before;
2083{
2084 register rtx insn = rtx_alloc (BARRIER);
2085
2086 INSN_UID (insn) = cur_insn_uid++;
2087
2088 add_insn_after (insn, PREV_INSN (before));
2089 return insn;
2090}
2091
2092/* Emit a note of subtype SUBTYPE before the insn BEFORE. */
2093
2094rtx
2095emit_note_before (subtype, before)
2096 int subtype;
2097 rtx before;
2098{
2099 register rtx note = rtx_alloc (NOTE);
2100 INSN_UID (note) = cur_insn_uid++;
2101 NOTE_SOURCE_FILE (note) = 0;
2102 NOTE_LINE_NUMBER (note) = subtype;
2103
2104 add_insn_after (note, PREV_INSN (before));
2105 return note;
2106}
2107\f
2108/* Make an insn of code INSN with body PATTERN
2109 and output it after the insn AFTER. */
2110
2111rtx
2112emit_insn_after (pattern, after)
2113 register rtx pattern, after;
2114{
2115 register rtx insn = after;
2116
2117 if (GET_CODE (pattern) == SEQUENCE)
2118 {
2119 register int i;
2120
2121 for (i = 0; i < XVECLEN (pattern, 0); i++)
2122 {
2123 insn = XVECEXP (pattern, 0, i);
2124 add_insn_after (insn, after);
2125 after = insn;
2126 }
2127 if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2128 sequence_result[XVECLEN (pattern, 0)] = pattern;
2129 }
2130 else
2131 {
4b1f5e8c 2132 insn = make_insn_raw (pattern);
23b2ce53
RS
2133 add_insn_after (insn, after);
2134 }
2135
2136 return insn;
2137}
2138
255680cf
RK
2139/* Similar to emit_insn_after, except that line notes are to be inserted so
2140 as to act as if this insn were at FROM. */
2141
2142void
2143emit_insn_after_with_line_notes (pattern, after, from)
2144 rtx pattern, after, from;
2145{
2146 rtx from_line = find_line_note (from);
2147 rtx after_line = find_line_note (after);
2148 rtx insn = emit_insn_after (pattern, after);
2149
2150 if (from_line)
2151 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
2152 NOTE_LINE_NUMBER (from_line),
2153 after);
2154
2155 if (after_line)
2156 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
2157 NOTE_LINE_NUMBER (after_line),
2158 insn);
2159}
2160
23b2ce53
RS
2161/* Make an insn of code JUMP_INSN with body PATTERN
2162 and output it after the insn AFTER. */
2163
2164rtx
2165emit_jump_insn_after (pattern, after)
2166 register rtx pattern, after;
2167{
2168 register rtx insn;
2169
2170 if (GET_CODE (pattern) == SEQUENCE)
2171 insn = emit_insn_after (pattern, after);
2172 else
2173 {
906c4e36 2174 insn = make_jump_insn_raw (pattern, NULL_RTVEC);
23b2ce53
RS
2175 add_insn_after (insn, after);
2176 }
2177
2178 return insn;
2179}
2180
2181/* Make an insn of code BARRIER
2182 and output it after the insn AFTER. */
2183
2184rtx
2185emit_barrier_after (after)
2186 register rtx after;
2187{
2188 register rtx insn = rtx_alloc (BARRIER);
2189
2190 INSN_UID (insn) = cur_insn_uid++;
2191
2192 add_insn_after (insn, after);
2193 return insn;
2194}
2195
2196/* Emit the label LABEL after the insn AFTER. */
2197
2198rtx
2199emit_label_after (label, after)
2200 rtx label, after;
2201{
2202 /* This can be called twice for the same label
2203 as a result of the confusion that follows a syntax error!
2204 So make it harmless. */
2205 if (INSN_UID (label) == 0)
2206 {
2207 INSN_UID (label) = cur_insn_uid++;
2208 add_insn_after (label, after);
2209 }
2210
2211 return label;
2212}
2213
2214/* Emit a note of subtype SUBTYPE after the insn AFTER. */
2215
2216rtx
2217emit_note_after (subtype, after)
2218 int subtype;
2219 rtx after;
2220{
2221 register rtx note = rtx_alloc (NOTE);
2222 INSN_UID (note) = cur_insn_uid++;
2223 NOTE_SOURCE_FILE (note) = 0;
2224 NOTE_LINE_NUMBER (note) = subtype;
2225 add_insn_after (note, after);
2226 return note;
2227}
2228
2229/* Emit a line note for FILE and LINE after the insn AFTER. */
2230
2231rtx
2232emit_line_note_after (file, line, after)
2233 char *file;
2234 int line;
2235 rtx after;
2236{
2237 register rtx note;
2238
2239 if (no_line_numbers && line > 0)
2240 {
2241 cur_insn_uid++;
2242 return 0;
2243 }
2244
2245 note = rtx_alloc (NOTE);
2246 INSN_UID (note) = cur_insn_uid++;
2247 NOTE_SOURCE_FILE (note) = file;
2248 NOTE_LINE_NUMBER (note) = line;
2249 add_insn_after (note, after);
2250 return note;
2251}
2252\f
2253/* Make an insn of code INSN with pattern PATTERN
2254 and add it to the end of the doubly-linked list.
2255 If PATTERN is a SEQUENCE, take the elements of it
2256 and emit an insn for each element.
2257
2258 Returns the last insn emitted. */
2259
2260rtx
2261emit_insn (pattern)
2262 rtx pattern;
2263{
2264 rtx insn = last_insn;
2265
2266 if (GET_CODE (pattern) == SEQUENCE)
2267 {
2268 register int i;
2269
2270 for (i = 0; i < XVECLEN (pattern, 0); i++)
2271 {
2272 insn = XVECEXP (pattern, 0, i);
2273 add_insn (insn);
2274 }
2275 if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2276 sequence_result[XVECLEN (pattern, 0)] = pattern;
2277 }
2278 else
2279 {
4b1f5e8c 2280 insn = make_insn_raw (pattern);
23b2ce53
RS
2281 add_insn (insn);
2282 }
2283
2284 return insn;
2285}
2286
2287/* Emit the insns in a chain starting with INSN.
2288 Return the last insn emitted. */
2289
2290rtx
2291emit_insns (insn)
2292 rtx insn;
2293{
2294 rtx last = 0;
2295
2296 while (insn)
2297 {
2298 rtx next = NEXT_INSN (insn);
2299 add_insn (insn);
2300 last = insn;
2301 insn = next;
2302 }
2303
2304 return last;
2305}
2306
2307/* Emit the insns in a chain starting with INSN and place them in front of
2308 the insn BEFORE. Return the last insn emitted. */
2309
2310rtx
2311emit_insns_before (insn, before)
2312 rtx insn;
2313 rtx before;
2314{
2315 rtx last = 0;
2316
2317 while (insn)
2318 {
2319 rtx next = NEXT_INSN (insn);
2320 add_insn_after (insn, PREV_INSN (before));
2321 last = insn;
2322 insn = next;
2323 }
2324
2325 return last;
2326}
2327
e0a5c5eb
RS
2328/* Emit the insns in a chain starting with FIRST and place them in back of
2329 the insn AFTER. Return the last insn emitted. */
2330
2331rtx
2332emit_insns_after (first, after)
2333 register rtx first;
2334 register rtx after;
2335{
2336 register rtx last;
2337 register rtx after_after;
2338
2339 if (!after)
2340 abort ();
2341
2342 if (!first)
2343 return first;
2344
2345 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
2346 continue;
2347
2348 after_after = NEXT_INSN (after);
2349
2350 NEXT_INSN (after) = first;
2351 PREV_INSN (first) = after;
2352 NEXT_INSN (last) = after_after;
2353 if (after_after)
2354 PREV_INSN (after_after) = last;
2355
c4d990db
RS
2356 if (after == last_insn)
2357 last_insn = last;
e0a5c5eb
RS
2358 return last;
2359}
2360
23b2ce53
RS
2361/* Make an insn of code JUMP_INSN with pattern PATTERN
2362 and add it to the end of the doubly-linked list. */
2363
2364rtx
2365emit_jump_insn (pattern)
2366 rtx pattern;
2367{
2368 if (GET_CODE (pattern) == SEQUENCE)
2369 return emit_insn (pattern);
2370 else
2371 {
906c4e36 2372 register rtx insn = make_jump_insn_raw (pattern, NULL_RTVEC);
23b2ce53
RS
2373 add_insn (insn);
2374 return insn;
2375 }
2376}
2377
2378/* Make an insn of code CALL_INSN with pattern PATTERN
2379 and add it to the end of the doubly-linked list. */
2380
2381rtx
2382emit_call_insn (pattern)
2383 rtx pattern;
2384{
2385 if (GET_CODE (pattern) == SEQUENCE)
2386 return emit_insn (pattern);
2387 else
2388 {
4b1f5e8c 2389 register rtx insn = make_insn_raw (pattern);
23b2ce53
RS
2390 add_insn (insn);
2391 PUT_CODE (insn, CALL_INSN);
2392 return insn;
2393 }
2394}
2395
2396/* Add the label LABEL to the end of the doubly-linked list. */
2397
2398rtx
2399emit_label (label)
2400 rtx label;
2401{
2402 /* This can be called twice for the same label
2403 as a result of the confusion that follows a syntax error!
2404 So make it harmless. */
2405 if (INSN_UID (label) == 0)
2406 {
2407 INSN_UID (label) = cur_insn_uid++;
2408 add_insn (label);
2409 }
2410 return label;
2411}
2412
2413/* Make an insn of code BARRIER
2414 and add it to the end of the doubly-linked list. */
2415
2416rtx
2417emit_barrier ()
2418{
2419 register rtx barrier = rtx_alloc (BARRIER);
2420 INSN_UID (barrier) = cur_insn_uid++;
2421 add_insn (barrier);
2422 return barrier;
2423}
2424
2425/* Make an insn of code NOTE
2426 with data-fields specified by FILE and LINE
2427 and add it to the end of the doubly-linked list,
2428 but only if line-numbers are desired for debugging info. */
2429
2430rtx
2431emit_line_note (file, line)
2432 char *file;
2433 int line;
2434{
2435 emit_filename = file;
2436 emit_lineno = line;
2437
2438#if 0
2439 if (no_line_numbers)
2440 return 0;
2441#endif
2442
2443 return emit_note (file, line);
2444}
2445
2446/* Make an insn of code NOTE
2447 with data-fields specified by FILE and LINE
2448 and add it to the end of the doubly-linked list.
2449 If it is a line-number NOTE, omit it if it matches the previous one. */
2450
2451rtx
2452emit_note (file, line)
2453 char *file;
2454 int line;
2455{
2456 register rtx note;
2457
2458 if (line > 0)
2459 {
2460 if (file && last_filename && !strcmp (file, last_filename)
2461 && line == last_linenum)
2462 return 0;
2463 last_filename = file;
2464 last_linenum = line;
2465 }
2466
2467 if (no_line_numbers && line > 0)
2468 {
2469 cur_insn_uid++;
2470 return 0;
2471 }
2472
2473 note = rtx_alloc (NOTE);
2474 INSN_UID (note) = cur_insn_uid++;
2475 NOTE_SOURCE_FILE (note) = file;
2476 NOTE_LINE_NUMBER (note) = line;
2477 add_insn (note);
2478 return note;
2479}
2480
2481/* Emit a NOTE, and don't omit it even if LINE it the previous note. */
2482
2483rtx
2484emit_line_note_force (file, line)
2485 char *file;
2486 int line;
2487{
2488 last_linenum = -1;
2489 return emit_line_note (file, line);
2490}
2491
2492/* Cause next statement to emit a line note even if the line number
2493 has not changed. This is used at the beginning of a function. */
2494
2495void
2496force_next_line_note ()
2497{
2498 last_linenum = -1;
2499}
2500\f
2501/* Return an indication of which type of insn should have X as a body.
2502 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
2503
2504enum rtx_code
2505classify_insn (x)
2506 rtx x;
2507{
2508 if (GET_CODE (x) == CODE_LABEL)
2509 return CODE_LABEL;
2510 if (GET_CODE (x) == CALL)
2511 return CALL_INSN;
2512 if (GET_CODE (x) == RETURN)
2513 return JUMP_INSN;
2514 if (GET_CODE (x) == SET)
2515 {
2516 if (SET_DEST (x) == pc_rtx)
2517 return JUMP_INSN;
2518 else if (GET_CODE (SET_SRC (x)) == CALL)
2519 return CALL_INSN;
2520 else
2521 return INSN;
2522 }
2523 if (GET_CODE (x) == PARALLEL)
2524 {
2525 register int j;
2526 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
2527 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
2528 return CALL_INSN;
2529 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
2530 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
2531 return JUMP_INSN;
2532 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
2533 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
2534 return CALL_INSN;
2535 }
2536 return INSN;
2537}
2538
2539/* Emit the rtl pattern X as an appropriate kind of insn.
2540 If X is a label, it is simply added into the insn chain. */
2541
2542rtx
2543emit (x)
2544 rtx x;
2545{
2546 enum rtx_code code = classify_insn (x);
2547
2548 if (code == CODE_LABEL)
2549 return emit_label (x);
2550 else if (code == INSN)
2551 return emit_insn (x);
2552 else if (code == JUMP_INSN)
2553 {
2554 register rtx insn = emit_jump_insn (x);
2555 if (simplejump_p (insn) || GET_CODE (x) == RETURN)
2556 return emit_barrier ();
2557 return insn;
2558 }
2559 else if (code == CALL_INSN)
2560 return emit_call_insn (x);
2561 else
2562 abort ();
2563}
2564\f
2565/* Begin emitting insns to a sequence which can be packaged in an RTL_EXPR. */
2566
2567void
2568start_sequence ()
2569{
2570 struct sequence_stack *tem;
2571
2572 if (sequence_element_free_list)
2573 {
2574 /* Reuse a previously-saved struct sequence_stack. */
2575 tem = sequence_element_free_list;
2576 sequence_element_free_list = tem->next;
2577 }
2578 else
2579 tem = (struct sequence_stack *) permalloc (sizeof (struct sequence_stack));
2580
2581 tem->next = sequence_stack;
2582 tem->first = first_insn;
2583 tem->last = last_insn;
2584
2585 sequence_stack = tem;
2586
2587 first_insn = 0;
2588 last_insn = 0;
2589}
2590
2591/* Set up the insn chain starting with FIRST
2592 as the current sequence, saving the previously current one. */
2593
2594void
2595push_to_sequence (first)
2596 rtx first;
2597{
2598 rtx last;
2599
2600 start_sequence ();
2601
2602 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
2603
2604 first_insn = first;
2605 last_insn = last;
2606}
2607
2608/* After emitting to a sequence, restore previous saved state.
2609
2610 To get the contents of the sequence just made,
2611 you must call `gen_sequence' *before* calling here. */
2612
2613void
2614end_sequence ()
2615{
2616 struct sequence_stack *tem = sequence_stack;
2617
2618 first_insn = tem->first;
2619 last_insn = tem->last;
2620 sequence_stack = tem->next;
2621
2622 tem->next = sequence_element_free_list;
2623 sequence_element_free_list = tem;
2624}
2625
2626/* Return 1 if currently emitting into a sequence. */
2627
2628int
2629in_sequence_p ()
2630{
2631 return sequence_stack != 0;
2632}
2633
2634/* Generate a SEQUENCE rtx containing the insns already emitted
2635 to the current sequence.
2636
2637 This is how the gen_... function from a DEFINE_EXPAND
2638 constructs the SEQUENCE that it returns. */
2639
2640rtx
2641gen_sequence ()
2642{
2643 rtx result;
2644 rtx tem;
2645 rtvec newvec;
2646 int i;
2647 int len;
2648
2649 /* Count the insns in the chain. */
2650 len = 0;
2651 for (tem = first_insn; tem; tem = NEXT_INSN (tem))
2652 len++;
2653
2654 /* If only one insn, return its pattern rather than a SEQUENCE.
2655 (Now that we cache SEQUENCE expressions, it isn't worth special-casing
2656 the case of an empty list.) */
2657 if (len == 1
2658 && (GET_CODE (first_insn) == INSN
2659 || GET_CODE (first_insn) == JUMP_INSN
2660 || GET_CODE (first_insn) == CALL_INSN))
2661 return PATTERN (first_insn);
2662
2663 /* Put them in a vector. See if we already have a SEQUENCE of the
2664 appropriate length around. */
2665 if (len < SEQUENCE_RESULT_SIZE && (result = sequence_result[len]) != 0)
2666 sequence_result[len] = 0;
2667 else
2668 {
2669 /* Ensure that this rtl goes in saveable_obstack, since we may be
2670 caching it. */
2671 int in_current_obstack = rtl_in_saveable_obstack ();
2672 result = gen_rtx (SEQUENCE, VOIDmode, rtvec_alloc (len));
2673 if (in_current_obstack)
2674 rtl_in_current_obstack ();
2675 }
2676
2677 for (i = 0, tem = first_insn; tem; tem = NEXT_INSN (tem), i++)
2678 XVECEXP (result, 0, i) = tem;
2679
2680 return result;
2681}
2682\f
2683/* Set up regno_reg_rtx, reg_rtx_no and regno_pointer_flag
2684 according to the chain of insns starting with FIRST.
2685
2686 Also set cur_insn_uid to exceed the largest uid in that chain.
2687
2688 This is used when an inline function's rtl is saved
2689 and passed to rest_of_compilation later. */
2690
2691static void restore_reg_data_1 ();
2692
2693void
2694restore_reg_data (first)
2695 rtx first;
2696{
2697 register rtx insn;
2698 int i;
2699 register int max_uid = 0;
2700
2701 for (insn = first; insn; insn = NEXT_INSN (insn))
2702 {
2703 if (INSN_UID (insn) >= max_uid)
2704 max_uid = INSN_UID (insn);
2705
2706 switch (GET_CODE (insn))
2707 {
2708 case NOTE:
2709 case CODE_LABEL:
2710 case BARRIER:
2711 break;
2712
2713 case JUMP_INSN:
2714 case CALL_INSN:
2715 case INSN:
2716 restore_reg_data_1 (PATTERN (insn));
2717 break;
2718 }
2719 }
2720
2721 /* Don't duplicate the uids already in use. */
2722 cur_insn_uid = max_uid + 1;
2723
2724 /* If any regs are missing, make them up.
2725
2726 ??? word_mode is not necessarily the right mode. Most likely these REGs
2727 are never used. At some point this should be checked. */
2728
2729 for (i = FIRST_PSEUDO_REGISTER; i < reg_rtx_no; i++)
2730 if (regno_reg_rtx[i] == 0)
2731 regno_reg_rtx[i] = gen_rtx (REG, word_mode, i);
2732}
2733
2734static void
2735restore_reg_data_1 (orig)
2736 rtx orig;
2737{
2738 register rtx x = orig;
2739 register int i;
2740 register enum rtx_code code;
2741 register char *format_ptr;
2742
2743 code = GET_CODE (x);
2744
2745 switch (code)
2746 {
2747 case QUEUED:
2748 case CONST_INT:
2749 case CONST_DOUBLE:
2750 case SYMBOL_REF:
2751 case CODE_LABEL:
2752 case PC:
2753 case CC0:
2754 case LABEL_REF:
2755 return;
2756
2757 case REG:
2758 if (REGNO (x) >= FIRST_PSEUDO_REGISTER)
2759 {
2760 /* Make sure regno_pointer_flag and regno_reg_rtx are large
2761 enough to have an element for this pseudo reg number. */
2762 if (REGNO (x) >= reg_rtx_no)
2763 {
2764 reg_rtx_no = REGNO (x);
2765
2766 if (reg_rtx_no >= regno_pointer_flag_length)
2767 {
2768 int newlen = MAX (regno_pointer_flag_length * 2,
2769 reg_rtx_no + 30);
2770 rtx *new1;
2771 char *new = (char *) oballoc (newlen);
2772 bzero (new, newlen);
2773 bcopy (regno_pointer_flag, new, regno_pointer_flag_length);
2774
2775 new1 = (rtx *) oballoc (newlen * sizeof (rtx));
2776 bzero (new1, newlen * sizeof (rtx));
2777 bcopy (regno_reg_rtx, new1, regno_pointer_flag_length * sizeof (rtx));
2778
2779 regno_pointer_flag = new;
2780 regno_reg_rtx = new1;
2781 regno_pointer_flag_length = newlen;
2782 }
2783 reg_rtx_no ++;
2784 }
2785 regno_reg_rtx[REGNO (x)] = x;
2786 }
2787 return;
2788
2789 case MEM:
2790 if (GET_CODE (XEXP (x, 0)) == REG)
2791 mark_reg_pointer (XEXP (x, 0));
2792 restore_reg_data_1 (XEXP (x, 0));
2793 return;
2794 }
2795
2796 /* Now scan the subexpressions recursively. */
2797
2798 format_ptr = GET_RTX_FORMAT (code);
2799
2800 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2801 {
2802 switch (*format_ptr++)
2803 {
2804 case 'e':
2805 restore_reg_data_1 (XEXP (x, i));
2806 break;
2807
2808 case 'E':
2809 if (XVEC (x, i) != NULL)
2810 {
2811 register int j;
2812
2813 for (j = 0; j < XVECLEN (x, i); j++)
2814 restore_reg_data_1 (XVECEXP (x, i, j));
2815 }
2816 break;
2817 }
2818 }
2819}
2820\f
2821/* Initialize data structures and variables in this file
2822 before generating rtl for each function. */
2823
2824void
2825init_emit ()
2826{
2827 int i;
2828
2829 first_insn = NULL;
2830 last_insn = NULL;
2831 cur_insn_uid = 1;
2832 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
2833 last_linenum = 0;
2834 last_filename = 0;
2835 first_label_num = label_num;
2836 last_label_num = 0;
2837
2838 /* Clear the start_sequence/gen_sequence cache. */
2839 sequence_element_free_list = 0;
2840 for (i = 0; i < SEQUENCE_RESULT_SIZE; i++)
2841 sequence_result[i] = 0;
2842
2843 /* Init the tables that describe all the pseudo regs. */
2844
2845 regno_pointer_flag_length = LAST_VIRTUAL_REGISTER + 101;
2846
2847 regno_pointer_flag
2848 = (char *) oballoc (regno_pointer_flag_length);
2849 bzero (regno_pointer_flag, regno_pointer_flag_length);
2850
2851 regno_reg_rtx
2852 = (rtx *) oballoc (regno_pointer_flag_length * sizeof (rtx));
2853 bzero (regno_reg_rtx, regno_pointer_flag_length * sizeof (rtx));
2854
2855 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
2856 regno_reg_rtx[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
2857 regno_reg_rtx[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
2858 regno_reg_rtx[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
2859 regno_reg_rtx[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
740ab4a2
RK
2860
2861 /* Indicate that the virtual registers and stack locations are
2862 all pointers. */
2863 REGNO_POINTER_FLAG (STACK_POINTER_REGNUM) = 1;
2864 REGNO_POINTER_FLAG (FRAME_POINTER_REGNUM) = 1;
2865 REGNO_POINTER_FLAG (ARG_POINTER_REGNUM) = 1;
2866
2867 REGNO_POINTER_FLAG (VIRTUAL_INCOMING_ARGS_REGNUM) = 1;
2868 REGNO_POINTER_FLAG (VIRTUAL_STACK_VARS_REGNUM) = 1;
2869 REGNO_POINTER_FLAG (VIRTUAL_STACK_DYNAMIC_REGNUM) = 1;
2870 REGNO_POINTER_FLAG (VIRTUAL_OUTGOING_ARGS_REGNUM) = 1;
23b2ce53
RS
2871}
2872
2873/* Create some permanent unique rtl objects shared between all functions.
2874 LINE_NUMBERS is nonzero if line numbers are to be generated. */
2875
2876void
2877init_emit_once (line_numbers)
2878 int line_numbers;
2879{
2880 int i;
2881 enum machine_mode mode;
2882
2883 no_line_numbers = ! line_numbers;
2884
2885 sequence_stack = NULL;
2886
2887 /* Create the unique rtx's for certain rtx codes and operand values. */
2888
2889 pc_rtx = gen_rtx (PC, VOIDmode);
2890 cc0_rtx = gen_rtx (CC0, VOIDmode);
2891
2892 /* Don't use gen_rtx here since gen_rtx in this case
2893 tries to use these variables. */
2894 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
2895 {
2896 const_int_rtx[i + MAX_SAVED_CONST_INT] = rtx_alloc (CONST_INT);
2897 PUT_MODE (const_int_rtx[i + MAX_SAVED_CONST_INT], VOIDmode);
2898 INTVAL (const_int_rtx[i + MAX_SAVED_CONST_INT]) = i;
2899 }
2900
2901 /* These four calls obtain some of the rtx expressions made above. */
906c4e36
RK
2902 const0_rtx = GEN_INT (0);
2903 const1_rtx = GEN_INT (1);
2904 const2_rtx = GEN_INT (2);
2905 constm1_rtx = GEN_INT (-1);
23b2ce53
RS
2906
2907 /* This will usually be one of the above constants, but may be a new rtx. */
906c4e36 2908 const_true_rtx = GEN_INT (STORE_FLAG_VALUE);
23b2ce53
RS
2909
2910 dconst0 = REAL_VALUE_ATOF ("0");
2911 dconst1 = REAL_VALUE_ATOF ("1");
2912 dconst2 = REAL_VALUE_ATOF ("2");
2913 dconstm1 = REAL_VALUE_ATOF ("-1");
2914
2915 for (i = 0; i <= 2; i++)
2916 {
2917 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
2918 mode = GET_MODE_WIDER_MODE (mode))
2919 {
2920 rtx tem = rtx_alloc (CONST_DOUBLE);
2921 union real_extract u;
2922
2923 bzero (&u, sizeof u); /* Zero any holes in a structure. */
2924 u.d = i == 0 ? dconst0 : i == 1 ? dconst1 : dconst2;
2925
2926 bcopy (&u, &CONST_DOUBLE_LOW (tem), sizeof u);
2927 CONST_DOUBLE_MEM (tem) = cc0_rtx;
2928 PUT_MODE (tem, mode);
2929
2930 const_tiny_rtx[i][(int) mode] = tem;
2931 }
2932
906c4e36 2933 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
23b2ce53
RS
2934
2935 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
2936 mode = GET_MODE_WIDER_MODE (mode))
906c4e36 2937 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
23b2ce53
RS
2938 }
2939
dfa09e23
TW
2940 for (mode = GET_CLASS_NARROWEST_MODE (MODE_CC); mode != VOIDmode;
2941 mode = GET_MODE_WIDER_MODE (mode))
2942 const_tiny_rtx[0][(int) mode] = const0_rtx;
2943
23b2ce53
RS
2944 stack_pointer_rtx = gen_rtx (REG, Pmode, STACK_POINTER_REGNUM);
2945 frame_pointer_rtx = gen_rtx (REG, Pmode, FRAME_POINTER_REGNUM);
2946
2947 if (FRAME_POINTER_REGNUM == ARG_POINTER_REGNUM)
2948 arg_pointer_rtx = frame_pointer_rtx;
2949 else if (STACK_POINTER_REGNUM == ARG_POINTER_REGNUM)
2950 arg_pointer_rtx = stack_pointer_rtx;
2951 else
2952 arg_pointer_rtx = gen_rtx (REG, Pmode, ARG_POINTER_REGNUM);
2953
2954 /* Create the virtual registers. Do so here since the following objects
2955 might reference them. */
2956
2957 virtual_incoming_args_rtx = gen_rtx (REG, Pmode,
2958 VIRTUAL_INCOMING_ARGS_REGNUM);
2959 virtual_stack_vars_rtx = gen_rtx (REG, Pmode,
2960 VIRTUAL_STACK_VARS_REGNUM);
2961 virtual_stack_dynamic_rtx = gen_rtx (REG, Pmode,
2962 VIRTUAL_STACK_DYNAMIC_REGNUM);
2963 virtual_outgoing_args_rtx = gen_rtx (REG, Pmode,
2964 VIRTUAL_OUTGOING_ARGS_REGNUM);
2965
2966#ifdef STRUCT_VALUE
2967 struct_value_rtx = STRUCT_VALUE;
2968#else
2969 struct_value_rtx = gen_rtx (REG, Pmode, STRUCT_VALUE_REGNUM);
2970#endif
2971
2972#ifdef STRUCT_VALUE_INCOMING
2973 struct_value_incoming_rtx = STRUCT_VALUE_INCOMING;
2974#else
2975#ifdef STRUCT_VALUE_INCOMING_REGNUM
2976 struct_value_incoming_rtx
2977 = gen_rtx (REG, Pmode, STRUCT_VALUE_INCOMING_REGNUM);
2978#else
2979 struct_value_incoming_rtx = struct_value_rtx;
2980#endif
2981#endif
2982
2983#ifdef STATIC_CHAIN_REGNUM
2984 static_chain_rtx = gen_rtx (REG, Pmode, STATIC_CHAIN_REGNUM);
2985
2986#ifdef STATIC_CHAIN_INCOMING_REGNUM
2987 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
2988 static_chain_incoming_rtx = gen_rtx (REG, Pmode, STATIC_CHAIN_INCOMING_REGNUM);
2989 else
2990#endif
2991 static_chain_incoming_rtx = static_chain_rtx;
2992#endif
2993
2994#ifdef STATIC_CHAIN
2995 static_chain_rtx = STATIC_CHAIN;
2996
2997#ifdef STATIC_CHAIN_INCOMING
2998 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
2999#else
3000 static_chain_incoming_rtx = static_chain_rtx;
3001#endif
3002#endif
3003
3004#ifdef PIC_OFFSET_TABLE_REGNUM
3005 pic_offset_table_rtx = gen_rtx (REG, Pmode, PIC_OFFSET_TABLE_REGNUM);
3006#endif
3007}