]>
Commit | Line | Data |
---|---|---|
23b2ce53 | 1 | /* Emit RTL for the GNU C-Compiler expander. |
dc139c90 | 2 | Copyright (C) 1987, 1988, 1992, 1993, 1994 Free Software Foundation, Inc. |
23b2ce53 RS |
3 | |
4 | This file is part of GNU CC. | |
5 | ||
6 | GNU CC is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 2, or (at your option) | |
9 | any later version. | |
10 | ||
11 | GNU CC is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with GNU CC; see the file COPYING. If not, write to | |
18 | the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ | |
19 | ||
20 | ||
21 | /* Middle-to-low level generation of rtx code and insns. | |
22 | ||
23 | This file contains the functions `gen_rtx', `gen_reg_rtx' | |
24 | and `gen_label_rtx' that are the usual ways of creating rtl | |
25 | expressions for most purposes. | |
26 | ||
27 | It also has the functions for creating insns and linking | |
28 | them in the doubly-linked chain. | |
29 | ||
30 | The patterns of the insns are created by machine-dependent | |
31 | routines in insn-emit.c, which is generated automatically from | |
32 | the machine description. These routines use `gen_rtx' to make | |
33 | the individual rtx's of the pattern; what is machine dependent | |
34 | is the kind of rtx's they make and what arguments they use. */ | |
35 | ||
36 | #include "config.h" | |
23b2ce53 RS |
37 | #include "gvarargs.h" |
38 | #include "rtl.h" | |
a25c7971 | 39 | #include "tree.h" |
23b2ce53 RS |
40 | #include "flags.h" |
41 | #include "function.h" | |
42 | #include "expr.h" | |
43 | #include "regs.h" | |
44 | #include "insn-config.h" | |
45 | #include "real.h" | |
ca695ac9 JB |
46 | #include "obstack.h" |
47 | ||
48 | #include "bytecode.h" | |
49 | #include "machmode.h" | |
50 | #include "bc-opcode.h" | |
51 | #include "bc-typecd.h" | |
52 | #include "bc-optab.h" | |
53 | #include "bc-emit.h" | |
54 | ||
f8d97cf4 | 55 | #include <stdio.h> |
23b2ce53 | 56 | |
ca695ac9 JB |
57 | |
58 | /* Opcode names */ | |
59 | #ifdef BCDEBUG_PRINT_CODE | |
60 | char *opcode_name[] = | |
61 | { | |
62 | #include "bc-opname.h" | |
63 | ||
64 | "***END***" | |
65 | }; | |
66 | #endif | |
67 | ||
68 | ||
1d445e9e ILT |
69 | /* Commonly used modes. */ |
70 | ||
71 | enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT */ | |
72 | enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD */ | |
73 | ||
23b2ce53 RS |
74 | /* This is reset to LAST_VIRTUAL_REGISTER + 1 at the start of each function. |
75 | After rtl generation, it is 1 plus the largest register number used. */ | |
76 | ||
77 | int reg_rtx_no = LAST_VIRTUAL_REGISTER + 1; | |
78 | ||
79 | /* This is *not* reset after each function. It gives each CODE_LABEL | |
80 | in the entire compilation a unique label number. */ | |
81 | ||
82 | static int label_num = 1; | |
83 | ||
84 | /* Lowest label number in current function. */ | |
85 | ||
86 | static int first_label_num; | |
87 | ||
88 | /* Highest label number in current function. | |
89 | Zero means use the value of label_num instead. | |
90 | This is nonzero only when belatedly compiling an inline function. */ | |
91 | ||
92 | static int last_label_num; | |
93 | ||
94 | /* Value label_num had when set_new_first_and_last_label_number was called. | |
95 | If label_num has not changed since then, last_label_num is valid. */ | |
96 | ||
97 | static int base_label_num; | |
98 | ||
99 | /* Nonzero means do not generate NOTEs for source line numbers. */ | |
100 | ||
101 | static int no_line_numbers; | |
102 | ||
103 | /* Commonly used rtx's, so that we only need space for one copy. | |
104 | These are initialized once for the entire compilation. | |
105 | All of these except perhaps the floating-point CONST_DOUBLEs | |
106 | are unique; no other rtx-object will be equal to any of these. */ | |
107 | ||
108 | rtx pc_rtx; /* (PC) */ | |
109 | rtx cc0_rtx; /* (CC0) */ | |
110 | rtx cc1_rtx; /* (CC1) (not actually used nowadays) */ | |
111 | rtx const0_rtx; /* (CONST_INT 0) */ | |
112 | rtx const1_rtx; /* (CONST_INT 1) */ | |
113 | rtx const2_rtx; /* (CONST_INT 2) */ | |
114 | rtx constm1_rtx; /* (CONST_INT -1) */ | |
115 | rtx const_true_rtx; /* (CONST_INT STORE_FLAG_VALUE) */ | |
116 | ||
117 | /* We record floating-point CONST_DOUBLEs in each floating-point mode for | |
118 | the values of 0, 1, and 2. For the integer entries and VOIDmode, we | |
119 | record a copy of const[012]_rtx. */ | |
120 | ||
121 | rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE]; | |
122 | ||
123 | REAL_VALUE_TYPE dconst0; | |
124 | REAL_VALUE_TYPE dconst1; | |
125 | REAL_VALUE_TYPE dconst2; | |
126 | REAL_VALUE_TYPE dconstm1; | |
127 | ||
128 | /* All references to the following fixed hard registers go through | |
129 | these unique rtl objects. On machines where the frame-pointer and | |
130 | arg-pointer are the same register, they use the same unique object. | |
131 | ||
132 | After register allocation, other rtl objects which used to be pseudo-regs | |
133 | may be clobbered to refer to the frame-pointer register. | |
134 | But references that were originally to the frame-pointer can be | |
135 | distinguished from the others because they contain frame_pointer_rtx. | |
136 | ||
ac6f08b0 DE |
137 | When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little |
138 | tricky: until register elimination has taken place hard_frame_pointer_rtx | |
139 | should be used if it is being set, and frame_pointer_rtx otherwise. After | |
140 | register elimination hard_frame_pointer_rtx should always be used. | |
141 | On machines where the two registers are same (most) then these are the | |
142 | same. | |
143 | ||
23b2ce53 RS |
144 | In an inline procedure, the stack and frame pointer rtxs may not be |
145 | used for anything else. */ | |
146 | rtx stack_pointer_rtx; /* (REG:Pmode STACK_POINTER_REGNUM) */ | |
147 | rtx frame_pointer_rtx; /* (REG:Pmode FRAME_POINTER_REGNUM) */ | |
ac6f08b0 | 148 | rtx hard_frame_pointer_rtx; /* (REG:Pmode HARD_FRAME_POINTER_REGNUM) */ |
23b2ce53 RS |
149 | rtx arg_pointer_rtx; /* (REG:Pmode ARG_POINTER_REGNUM) */ |
150 | rtx struct_value_rtx; /* (REG:Pmode STRUCT_VALUE_REGNUM) */ | |
151 | rtx struct_value_incoming_rtx; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */ | |
152 | rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */ | |
153 | rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */ | |
154 | rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */ | |
155 | ||
156 | rtx virtual_incoming_args_rtx; /* (REG:Pmode VIRTUAL_INCOMING_ARGS_REGNUM) */ | |
157 | rtx virtual_stack_vars_rtx; /* (REG:Pmode VIRTUAL_STACK_VARS_REGNUM) */ | |
158 | rtx virtual_stack_dynamic_rtx; /* (REG:Pmode VIRTUAL_STACK_DYNAMIC_REGNUM) */ | |
159 | rtx virtual_outgoing_args_rtx; /* (REG:Pmode VIRTUAL_OUTGOING_ARGS_REGNUM) */ | |
160 | ||
161 | /* We make one copy of (const_int C) where C is in | |
162 | [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT] | |
163 | to save space during the compilation and simplify comparisons of | |
164 | integers. */ | |
165 | ||
166 | #define MAX_SAVED_CONST_INT 64 | |
167 | ||
168 | static rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1]; | |
169 | ||
170 | /* The ends of the doubly-linked chain of rtl for the current function. | |
171 | Both are reset to null at the start of rtl generation for the function. | |
172 | ||
a25c7971 RK |
173 | start_sequence saves both of these on `sequence_stack' along with |
174 | `sequence_rtl_expr' and then starts a new, nested sequence of insns. */ | |
23b2ce53 RS |
175 | |
176 | static rtx first_insn = NULL; | |
177 | static rtx last_insn = NULL; | |
178 | ||
a25c7971 RK |
179 | /* RTL_EXPR within which the current sequence will be placed. Use to |
180 | prevent reuse of any temporaries within the sequence until after the | |
181 | RTL_EXPR is emitted. */ | |
182 | ||
183 | tree sequence_rtl_expr = NULL; | |
184 | ||
23b2ce53 RS |
185 | /* INSN_UID for next insn emitted. |
186 | Reset to 1 for each function compiled. */ | |
187 | ||
188 | static int cur_insn_uid = 1; | |
189 | ||
190 | /* Line number and source file of the last line-number NOTE emitted. | |
191 | This is used to avoid generating duplicates. */ | |
192 | ||
193 | static int last_linenum = 0; | |
194 | static char *last_filename = 0; | |
195 | ||
196 | /* A vector indexed by pseudo reg number. The allocated length | |
197 | of this vector is regno_pointer_flag_length. Since this | |
198 | vector is needed during the expansion phase when the total | |
199 | number of registers in the function is not yet known, | |
200 | it is copied and made bigger when necessary. */ | |
201 | ||
202 | char *regno_pointer_flag; | |
203 | int regno_pointer_flag_length; | |
204 | ||
205 | /* Indexed by pseudo register number, gives the rtx for that pseudo. | |
206 | Allocated in parallel with regno_pointer_flag. */ | |
207 | ||
208 | rtx *regno_reg_rtx; | |
209 | ||
210 | /* Stack of pending (incomplete) sequences saved by `start_sequence'. | |
211 | Each element describes one pending sequence. | |
212 | The main insn-chain is saved in the last element of the chain, | |
213 | unless the chain is empty. */ | |
214 | ||
215 | struct sequence_stack *sequence_stack; | |
216 | ||
217 | /* start_sequence and gen_sequence can make a lot of rtx expressions which are | |
218 | shortly thrown away. We use two mechanisms to prevent this waste: | |
219 | ||
220 | First, we keep a list of the expressions used to represent the sequence | |
221 | stack in sequence_element_free_list. | |
222 | ||
223 | Second, for sizes up to 5 elements, we keep a SEQUENCE and its associated | |
224 | rtvec for use by gen_sequence. One entry for each size is sufficient | |
225 | because most cases are calls to gen_sequence followed by immediately | |
226 | emitting the SEQUENCE. Reuse is safe since emitting a sequence is | |
227 | destructive on the insn in it anyway and hence can't be redone. | |
228 | ||
229 | We do not bother to save this cached data over nested function calls. | |
230 | Instead, we just reinitialize them. */ | |
231 | ||
232 | #define SEQUENCE_RESULT_SIZE 5 | |
233 | ||
234 | static struct sequence_stack *sequence_element_free_list; | |
235 | static rtx sequence_result[SEQUENCE_RESULT_SIZE]; | |
236 | ||
237 | extern int rtx_equal_function_value_matters; | |
238 | ||
239 | /* Filename and line number of last line-number note, | |
240 | whether we actually emitted it or not. */ | |
241 | extern char *emit_filename; | |
242 | extern int emit_lineno; | |
243 | ||
244 | rtx change_address (); | |
245 | void init_emit (); | |
246 | \f | |
ca695ac9 JB |
247 | extern struct obstack *rtl_obstack; |
248 | ||
249 | extern int stack_depth; | |
250 | extern int max_stack_depth; | |
251 | \f | |
23b2ce53 RS |
252 | /* rtx gen_rtx (code, mode, [element1, ..., elementn]) |
253 | ** | |
254 | ** This routine generates an RTX of the size specified by | |
255 | ** <code>, which is an RTX code. The RTX structure is initialized | |
256 | ** from the arguments <element1> through <elementn>, which are | |
257 | ** interpreted according to the specific RTX type's format. The | |
258 | ** special machine mode associated with the rtx (if any) is specified | |
259 | ** in <mode>. | |
260 | ** | |
1632afca | 261 | ** gen_rtx can be invoked in a way which resembles the lisp-like |
23b2ce53 RS |
262 | ** rtx it will generate. For example, the following rtx structure: |
263 | ** | |
264 | ** (plus:QI (mem:QI (reg:SI 1)) | |
265 | ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3)))) | |
266 | ** | |
267 | ** ...would be generated by the following C code: | |
268 | ** | |
269 | ** gen_rtx (PLUS, QImode, | |
270 | ** gen_rtx (MEM, QImode, | |
271 | ** gen_rtx (REG, SImode, 1)), | |
272 | ** gen_rtx (MEM, QImode, | |
273 | ** gen_rtx (PLUS, SImode, | |
274 | ** gen_rtx (REG, SImode, 2), | |
275 | ** gen_rtx (REG, SImode, 3)))), | |
276 | */ | |
277 | ||
278 | /*VARARGS2*/ | |
279 | rtx | |
280 | gen_rtx (va_alist) | |
281 | va_dcl | |
282 | { | |
283 | va_list p; | |
284 | enum rtx_code code; | |
285 | enum machine_mode mode; | |
286 | register int i; /* Array indices... */ | |
287 | register char *fmt; /* Current rtx's format... */ | |
288 | register rtx rt_val; /* RTX to return to caller... */ | |
289 | ||
290 | va_start (p); | |
291 | code = va_arg (p, enum rtx_code); | |
292 | mode = va_arg (p, enum machine_mode); | |
293 | ||
294 | if (code == CONST_INT) | |
295 | { | |
906c4e36 | 296 | HOST_WIDE_INT arg = va_arg (p, HOST_WIDE_INT); |
23b2ce53 RS |
297 | |
298 | if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT) | |
299 | return const_int_rtx[arg + MAX_SAVED_CONST_INT]; | |
300 | ||
301 | if (const_true_rtx && arg == STORE_FLAG_VALUE) | |
302 | return const_true_rtx; | |
303 | ||
304 | rt_val = rtx_alloc (code); | |
305 | INTVAL (rt_val) = arg; | |
306 | } | |
307 | else if (code == REG) | |
308 | { | |
309 | int regno = va_arg (p, int); | |
310 | ||
311 | /* In case the MD file explicitly references the frame pointer, have | |
312 | all such references point to the same frame pointer. This is used | |
313 | during frame pointer elimination to distinguish the explicit | |
314 | references to these registers from pseudos that happened to be | |
315 | assigned to them. | |
316 | ||
317 | If we have eliminated the frame pointer or arg pointer, we will | |
318 | be using it as a normal register, for example as a spill register. | |
319 | In such cases, we might be accessing it in a mode that is not | |
600a5d88 | 320 | Pmode and therefore cannot use the pre-allocated rtx. |
23b2ce53 | 321 | |
600a5d88 RK |
322 | Also don't do this when we are making new REGs in reload, |
323 | since we don't want to get confused with the real pointers. */ | |
324 | ||
325 | if (frame_pointer_rtx && regno == FRAME_POINTER_REGNUM && mode == Pmode | |
326 | && ! reload_in_progress) | |
23b2ce53 | 327 | return frame_pointer_rtx; |
ac6f08b0 DE |
328 | #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM |
329 | if (hard_frame_pointer_rtx && regno == HARD_FRAME_POINTER_REGNUM | |
330 | && mode == Pmode && ! reload_in_progress) | |
331 | return hard_frame_pointer_rtx; | |
332 | #endif | |
333 | #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM | |
600a5d88 RK |
334 | if (arg_pointer_rtx && regno == ARG_POINTER_REGNUM && mode == Pmode |
335 | && ! reload_in_progress) | |
23b2ce53 RS |
336 | return arg_pointer_rtx; |
337 | #endif | |
600a5d88 RK |
338 | if (stack_pointer_rtx && regno == STACK_POINTER_REGNUM && mode == Pmode |
339 | && ! reload_in_progress) | |
23b2ce53 RS |
340 | return stack_pointer_rtx; |
341 | else | |
342 | { | |
343 | rt_val = rtx_alloc (code); | |
344 | rt_val->mode = mode; | |
345 | REGNO (rt_val) = regno; | |
346 | return rt_val; | |
347 | } | |
348 | } | |
349 | else | |
350 | { | |
351 | rt_val = rtx_alloc (code); /* Allocate the storage space. */ | |
352 | rt_val->mode = mode; /* Store the machine mode... */ | |
353 | ||
354 | fmt = GET_RTX_FORMAT (code); /* Find the right format... */ | |
355 | for (i = 0; i < GET_RTX_LENGTH (code); i++) | |
356 | { | |
357 | switch (*fmt++) | |
358 | { | |
359 | case '0': /* Unused field. */ | |
360 | break; | |
361 | ||
362 | case 'i': /* An integer? */ | |
363 | XINT (rt_val, i) = va_arg (p, int); | |
364 | break; | |
365 | ||
906c4e36 RK |
366 | case 'w': /* A wide integer? */ |
367 | XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT); | |
368 | break; | |
369 | ||
23b2ce53 RS |
370 | case 's': /* A string? */ |
371 | XSTR (rt_val, i) = va_arg (p, char *); | |
372 | break; | |
373 | ||
374 | case 'e': /* An expression? */ | |
375 | case 'u': /* An insn? Same except when printing. */ | |
376 | XEXP (rt_val, i) = va_arg (p, rtx); | |
377 | break; | |
378 | ||
379 | case 'E': /* An RTX vector? */ | |
380 | XVEC (rt_val, i) = va_arg (p, rtvec); | |
381 | break; | |
382 | ||
383 | default: | |
1632afca | 384 | abort (); |
23b2ce53 RS |
385 | } |
386 | } | |
387 | } | |
388 | va_end (p); | |
389 | return rt_val; /* Return the new RTX... */ | |
390 | } | |
391 | ||
392 | /* gen_rtvec (n, [rt1, ..., rtn]) | |
393 | ** | |
394 | ** This routine creates an rtvec and stores within it the | |
395 | ** pointers to rtx's which are its arguments. | |
396 | */ | |
397 | ||
398 | /*VARARGS1*/ | |
399 | rtvec | |
400 | gen_rtvec (va_alist) | |
401 | va_dcl | |
402 | { | |
403 | int n, i; | |
404 | va_list p; | |
405 | rtx *vector; | |
406 | ||
407 | va_start (p); | |
408 | n = va_arg (p, int); | |
409 | ||
410 | if (n == 0) | |
411 | return NULL_RTVEC; /* Don't allocate an empty rtvec... */ | |
412 | ||
413 | vector = (rtx *) alloca (n * sizeof (rtx)); | |
414 | for (i = 0; i < n; i++) | |
415 | vector[i] = va_arg (p, rtx); | |
416 | va_end (p); | |
417 | ||
418 | return gen_rtvec_v (n, vector); | |
419 | } | |
420 | ||
421 | rtvec | |
422 | gen_rtvec_v (n, argp) | |
423 | int n; | |
424 | rtx *argp; | |
425 | { | |
426 | register int i; | |
427 | register rtvec rt_val; | |
428 | ||
429 | if (n == 0) | |
430 | return NULL_RTVEC; /* Don't allocate an empty rtvec... */ | |
431 | ||
432 | rt_val = rtvec_alloc (n); /* Allocate an rtvec... */ | |
433 | ||
434 | for (i = 0; i < n; i++) | |
435 | rt_val->elem[i].rtx = *argp++; | |
436 | ||
437 | return rt_val; | |
438 | } | |
439 | \f | |
440 | /* Generate a REG rtx for a new pseudo register of mode MODE. | |
441 | This pseudo is assigned the next sequential register number. */ | |
442 | ||
443 | rtx | |
444 | gen_reg_rtx (mode) | |
445 | enum machine_mode mode; | |
446 | { | |
447 | register rtx val; | |
448 | ||
449 | /* Don't let anything called by or after reload create new registers | |
450 | (actually, registers can't be created after flow, but this is a good | |
451 | approximation). */ | |
452 | ||
453 | if (reload_in_progress || reload_completed) | |
454 | abort (); | |
455 | ||
fc84e8a8 RS |
456 | if (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT |
457 | || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT) | |
458 | { | |
459 | /* For complex modes, don't make a single pseudo. | |
460 | Instead, make a CONCAT of two pseudos. | |
461 | This allows noncontiguous allocation of the real and imaginary parts, | |
462 | which makes much better code. Besides, allocating DCmode | |
463 | pseudos overstrains reload on some machines like the 386. */ | |
464 | rtx realpart, imagpart; | |
465 | int size = GET_MODE_UNIT_SIZE (mode); | |
466 | enum machine_mode partmode | |
467 | = mode_for_size (size * BITS_PER_UNIT, | |
468 | (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT | |
469 | ? MODE_FLOAT : MODE_INT), | |
470 | 0); | |
471 | ||
472 | realpart = gen_reg_rtx (partmode); | |
473 | imagpart = gen_reg_rtx (partmode); | |
474 | return gen_rtx (CONCAT, mode, realpart, imagpart); | |
475 | } | |
476 | ||
23b2ce53 RS |
477 | /* Make sure regno_pointer_flag and regno_reg_rtx are large |
478 | enough to have an element for this pseudo reg number. */ | |
479 | ||
480 | if (reg_rtx_no == regno_pointer_flag_length) | |
481 | { | |
482 | rtx *new1; | |
483 | char *new = | |
484 | (char *) oballoc (regno_pointer_flag_length * 2); | |
23b2ce53 | 485 | bcopy (regno_pointer_flag, new, regno_pointer_flag_length); |
c0b178d0 | 486 | bzero (&new[regno_pointer_flag_length], regno_pointer_flag_length); |
23b2ce53 RS |
487 | regno_pointer_flag = new; |
488 | ||
489 | new1 = (rtx *) oballoc (regno_pointer_flag_length * 2 * sizeof (rtx)); | |
23b2ce53 | 490 | bcopy (regno_reg_rtx, new1, regno_pointer_flag_length * sizeof (rtx)); |
c0b178d0 RK |
491 | bzero (&new1[regno_pointer_flag_length], |
492 | regno_pointer_flag_length * sizeof (rtx)); | |
23b2ce53 RS |
493 | regno_reg_rtx = new1; |
494 | ||
495 | regno_pointer_flag_length *= 2; | |
496 | } | |
497 | ||
498 | val = gen_rtx (REG, mode, reg_rtx_no); | |
499 | regno_reg_rtx[reg_rtx_no++] = val; | |
500 | return val; | |
501 | } | |
502 | ||
503 | /* Identify REG as a probable pointer register. */ | |
504 | ||
505 | void | |
506 | mark_reg_pointer (reg) | |
507 | rtx reg; | |
508 | { | |
509 | REGNO_POINTER_FLAG (REGNO (reg)) = 1; | |
510 | } | |
511 | ||
512 | /* Return 1 plus largest pseudo reg number used in the current function. */ | |
513 | ||
514 | int | |
515 | max_reg_num () | |
516 | { | |
517 | return reg_rtx_no; | |
518 | } | |
519 | ||
520 | /* Return 1 + the largest label number used so far in the current function. */ | |
521 | ||
522 | int | |
523 | max_label_num () | |
524 | { | |
525 | if (last_label_num && label_num == base_label_num) | |
526 | return last_label_num; | |
527 | return label_num; | |
528 | } | |
529 | ||
530 | /* Return first label number used in this function (if any were used). */ | |
531 | ||
532 | int | |
533 | get_first_label_num () | |
534 | { | |
535 | return first_label_num; | |
536 | } | |
537 | \f | |
538 | /* Return a value representing some low-order bits of X, where the number | |
539 | of low-order bits is given by MODE. Note that no conversion is done | |
540 | between floating-point and fixed-point values, rather, the bit | |
541 | representation is returned. | |
542 | ||
543 | This function handles the cases in common between gen_lowpart, below, | |
544 | and two variants in cse.c and combine.c. These are the cases that can | |
545 | be safely handled at all points in the compilation. | |
546 | ||
547 | If this is not a case we can handle, return 0. */ | |
548 | ||
549 | rtx | |
550 | gen_lowpart_common (mode, x) | |
551 | enum machine_mode mode; | |
552 | register rtx x; | |
553 | { | |
554 | int word = 0; | |
555 | ||
556 | if (GET_MODE (x) == mode) | |
557 | return x; | |
558 | ||
559 | /* MODE must occupy no more words than the mode of X. */ | |
560 | if (GET_MODE (x) != VOIDmode | |
561 | && ((GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD | |
562 | > ((GET_MODE_SIZE (GET_MODE (x)) + (UNITS_PER_WORD - 1)) | |
563 | / UNITS_PER_WORD))) | |
564 | return 0; | |
565 | ||
566 | if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD) | |
567 | word = ((GET_MODE_SIZE (GET_MODE (x)) | |
568 | - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD)) | |
569 | / UNITS_PER_WORD); | |
570 | ||
571 | if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND) | |
83e9c679 RK |
572 | && (GET_MODE_CLASS (mode) == MODE_INT |
573 | || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)) | |
23b2ce53 RS |
574 | { |
575 | /* If we are getting the low-order part of something that has been | |
576 | sign- or zero-extended, we can either just use the object being | |
577 | extended or make a narrower extension. If we want an even smaller | |
578 | piece than the size of the object being extended, call ourselves | |
579 | recursively. | |
580 | ||
581 | This case is used mostly by combine and cse. */ | |
582 | ||
583 | if (GET_MODE (XEXP (x, 0)) == mode) | |
584 | return XEXP (x, 0); | |
585 | else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (XEXP (x, 0)))) | |
586 | return gen_lowpart_common (mode, XEXP (x, 0)); | |
587 | else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (x))) | |
588 | return gen_rtx (GET_CODE (x), mode, XEXP (x, 0)); | |
589 | } | |
590 | else if (GET_CODE (x) == SUBREG | |
591 | && (GET_MODE_SIZE (mode) <= UNITS_PER_WORD | |
592 | || GET_MODE_SIZE (mode) == GET_MODE_UNIT_SIZE (GET_MODE (x)))) | |
593 | return (GET_MODE (SUBREG_REG (x)) == mode && SUBREG_WORD (x) == 0 | |
594 | ? SUBREG_REG (x) | |
595 | : gen_rtx (SUBREG, mode, SUBREG_REG (x), SUBREG_WORD (x))); | |
596 | else if (GET_CODE (x) == REG) | |
597 | { | |
598 | /* If the register is not valid for MODE, return 0. If we don't | |
674d5d8b RK |
599 | do this, there is no way to fix up the resulting REG later. |
600 | But we do do this if the current REG is not valid for its | |
601 | mode. This latter is a kludge, but is required due to the | |
602 | way that parameters are passed on some machines, most | |
603 | notably Sparc. */ | |
23b2ce53 | 604 | if (REGNO (x) < FIRST_PSEUDO_REGISTER |
674d5d8b RK |
605 | && ! HARD_REGNO_MODE_OK (REGNO (x) + word, mode) |
606 | && HARD_REGNO_MODE_OK (REGNO (x), GET_MODE (x))) | |
23b2ce53 RS |
607 | return 0; |
608 | else if (REGNO (x) < FIRST_PSEUDO_REGISTER | |
609 | /* integrate.c can't handle parts of a return value register. */ | |
610 | && (! REG_FUNCTION_VALUE_P (x) | |
cb00f51a RK |
611 | || ! rtx_equal_function_value_matters) |
612 | /* We want to keep the stack, frame, and arg pointers | |
613 | special. */ | |
614 | && REGNO (x) != FRAME_POINTER_REGNUM | |
615 | #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM | |
616 | && REGNO (x) != ARG_POINTER_REGNUM | |
617 | #endif | |
618 | && REGNO (x) != STACK_POINTER_REGNUM) | |
23b2ce53 RS |
619 | return gen_rtx (REG, mode, REGNO (x) + word); |
620 | else | |
621 | return gen_rtx (SUBREG, mode, x, word); | |
622 | } | |
23b2ce53 RS |
623 | /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits |
624 | from the low-order part of the constant. */ | |
83e9c679 RK |
625 | else if ((GET_MODE_CLASS (mode) == MODE_INT |
626 | || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT) | |
627 | && GET_MODE (x) == VOIDmode | |
23b2ce53 | 628 | && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)) |
1a5b457d RK |
629 | { |
630 | /* If MODE is twice the host word size, X is already the desired | |
631 | representation. Otherwise, if MODE is wider than a word, we can't | |
632 | do this. If MODE is exactly a word, return just one CONST_INT. | |
633 | If MODE is smaller than a word, clear the bits that don't belong | |
634 | in our mode, unless they and our sign bit are all one. So we get | |
635 | either a reasonable negative value or a reasonable unsigned value | |
636 | for this mode. */ | |
637 | ||
906c4e36 | 638 | if (GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT) |
1a5b457d | 639 | return x; |
906c4e36 | 640 | else if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT) |
1a5b457d | 641 | return 0; |
906c4e36 | 642 | else if (GET_MODE_BITSIZE (mode) == HOST_BITS_PER_WIDE_INT) |
1a5b457d | 643 | return (GET_CODE (x) == CONST_INT ? x |
906c4e36 | 644 | : GEN_INT (CONST_DOUBLE_LOW (x))); |
1a5b457d RK |
645 | else |
646 | { | |
647 | /* MODE must be narrower than HOST_BITS_PER_INT. */ | |
648 | int width = GET_MODE_BITSIZE (mode); | |
906c4e36 RK |
649 | HOST_WIDE_INT val = (GET_CODE (x) == CONST_INT ? INTVAL (x) |
650 | : CONST_DOUBLE_LOW (x)); | |
1a5b457d | 651 | |
906c4e36 RK |
652 | if (((val & ((HOST_WIDE_INT) (-1) << (width - 1))) |
653 | != ((HOST_WIDE_INT) (-1) << (width - 1)))) | |
654 | val &= ((HOST_WIDE_INT) 1 << width) - 1; | |
1a5b457d RK |
655 | |
656 | return (GET_CODE (x) == CONST_INT && INTVAL (x) == val ? x | |
906c4e36 | 657 | : GEN_INT (val)); |
1a5b457d RK |
658 | } |
659 | } | |
23b2ce53 | 660 | |
8aada4ad RK |
661 | /* If X is an integral constant but we want it in floating-point, it |
662 | must be the case that we have a union of an integer and a floating-point | |
663 | value. If the machine-parameters allow it, simulate that union here | |
d6020413 RK |
664 | and return the result. The two-word and single-word cases are |
665 | different. */ | |
8aada4ad | 666 | |
b3bf132d | 667 | else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT |
906c4e36 | 668 | && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD) |
b3bf132d | 669 | || flag_pretend_float) |
8aada4ad | 670 | && GET_MODE_CLASS (mode) == MODE_FLOAT |
d6020413 RK |
671 | && GET_MODE_SIZE (mode) == UNITS_PER_WORD |
672 | && GET_CODE (x) == CONST_INT | |
906c4e36 | 673 | && sizeof (float) * HOST_BITS_PER_CHAR == HOST_BITS_PER_WIDE_INT) |
b6a524cb RS |
674 | #ifdef REAL_ARITHMETIC |
675 | { | |
676 | REAL_VALUE_TYPE r; | |
677 | HOST_WIDE_INT i; | |
678 | ||
679 | i = INTVAL (x); | |
680 | r = REAL_VALUE_FROM_TARGET_SINGLE (i); | |
681 | return immed_real_const_1 (r, mode); | |
682 | } | |
683 | #else | |
d6020413 | 684 | { |
906c4e36 | 685 | union {HOST_WIDE_INT i; float d; } u; |
d6020413 RK |
686 | |
687 | u.i = INTVAL (x); | |
688 | return immed_real_const_1 (u.d, mode); | |
689 | } | |
b6a524cb | 690 | #endif |
d6020413 | 691 | else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT |
906c4e36 | 692 | && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD) |
d6020413 RK |
693 | || flag_pretend_float) |
694 | && GET_MODE_CLASS (mode) == MODE_FLOAT | |
695 | && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD | |
8aada4ad RK |
696 | && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE) |
697 | && GET_MODE (x) == VOIDmode | |
906c4e36 RK |
698 | && (sizeof (double) * HOST_BITS_PER_CHAR |
699 | == 2 * HOST_BITS_PER_WIDE_INT)) | |
b6a524cb RS |
700 | #ifdef REAL_ARITHMETIC |
701 | { | |
702 | REAL_VALUE_TYPE r; | |
703 | HOST_WIDE_INT i[2]; | |
704 | HOST_WIDE_INT low, high; | |
705 | ||
706 | if (GET_CODE (x) == CONST_INT) | |
707 | low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1); | |
708 | else | |
709 | low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x); | |
710 | ||
711 | /* TARGET_DOUBLE takes the addressing order of the target machine. */ | |
712 | #ifdef WORDS_BIG_ENDIAN | |
713 | i[0] = high, i[1] = low; | |
714 | #else | |
715 | i[0] = low, i[1] = high; | |
716 | #endif | |
717 | ||
718 | r = REAL_VALUE_FROM_TARGET_DOUBLE (i); | |
719 | return immed_real_const_1 (r, mode); | |
720 | } | |
721 | #else | |
8aada4ad | 722 | { |
906c4e36 RK |
723 | union {HOST_WIDE_INT i[2]; double d; } u; |
724 | HOST_WIDE_INT low, high; | |
8aada4ad RK |
725 | |
726 | if (GET_CODE (x) == CONST_INT) | |
906c4e36 | 727 | low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1); |
8aada4ad RK |
728 | else |
729 | low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x); | |
730 | ||
731 | #ifdef HOST_WORDS_BIG_ENDIAN | |
732 | u.i[0] = high, u.i[1] = low; | |
733 | #else | |
734 | u.i[0] = low, u.i[1] = high; | |
735 | #endif | |
736 | ||
737 | return immed_real_const_1 (u.d, mode); | |
738 | } | |
b6a524cb | 739 | #endif |
b3bf132d RK |
740 | /* Similarly, if this is converting a floating-point value into a |
741 | single-word integer. Only do this is the host and target parameters are | |
742 | compatible. */ | |
743 | ||
744 | else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT | |
906c4e36 | 745 | && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD) |
b3bf132d | 746 | || flag_pretend_float) |
83e9c679 RK |
747 | && (GET_MODE_CLASS (mode) == MODE_INT |
748 | || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT) | |
b3bf132d RK |
749 | && GET_CODE (x) == CONST_DOUBLE |
750 | && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT | |
751 | && GET_MODE_BITSIZE (mode) == BITS_PER_WORD) | |
752 | return operand_subword (x, 0, 0, GET_MODE (x)); | |
753 | ||
8aada4ad RK |
754 | /* Similarly, if this is converting a floating-point value into a |
755 | two-word integer, we can do this one word at a time and make an | |
756 | integer. Only do this is the host and target parameters are | |
757 | compatible. */ | |
758 | ||
b3bf132d | 759 | else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT |
906c4e36 | 760 | && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD) |
b3bf132d | 761 | || flag_pretend_float) |
83e9c679 | 762 | && (GET_MODE_CLASS (mode) == MODE_INT |
f5a2fb25 | 763 | || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT) |
8aada4ad RK |
764 | && GET_CODE (x) == CONST_DOUBLE |
765 | && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT | |
766 | && GET_MODE_BITSIZE (mode) == 2 * BITS_PER_WORD) | |
767 | { | |
768 | rtx lowpart = operand_subword (x, WORDS_BIG_ENDIAN, 0, GET_MODE (x)); | |
769 | rtx highpart = operand_subword (x, ! WORDS_BIG_ENDIAN, 0, GET_MODE (x)); | |
770 | ||
771 | if (lowpart && GET_CODE (lowpart) == CONST_INT | |
772 | && highpart && GET_CODE (highpart) == CONST_INT) | |
773 | return immed_double_const (INTVAL (lowpart), INTVAL (highpart), mode); | |
774 | } | |
775 | ||
23b2ce53 RS |
776 | /* Otherwise, we can't do this. */ |
777 | return 0; | |
778 | } | |
779 | \f | |
280194b0 RS |
780 | /* Return the real part (which has mode MODE) of a complex value X. |
781 | This always comes at the low address in memory. */ | |
782 | ||
783 | rtx | |
784 | gen_realpart (mode, x) | |
785 | enum machine_mode mode; | |
786 | register rtx x; | |
787 | { | |
dc139c90 RK |
788 | if (GET_CODE (x) == CONCAT && GET_MODE (XEXP (x, 0)) == mode) |
789 | return XEXP (x, 0); | |
790 | else if (WORDS_BIG_ENDIAN) | |
280194b0 RS |
791 | return gen_highpart (mode, x); |
792 | else | |
793 | return gen_lowpart (mode, x); | |
794 | } | |
795 | ||
796 | /* Return the imaginary part (which has mode MODE) of a complex value X. | |
797 | This always comes at the high address in memory. */ | |
798 | ||
799 | rtx | |
800 | gen_imagpart (mode, x) | |
801 | enum machine_mode mode; | |
802 | register rtx x; | |
803 | { | |
dc139c90 RK |
804 | if (GET_CODE (x) == CONCAT && GET_MODE (XEXP (x, 0)) == mode) |
805 | return XEXP (x, 1); | |
806 | else if (WORDS_BIG_ENDIAN) | |
280194b0 RS |
807 | return gen_lowpart (mode, x); |
808 | else | |
809 | return gen_highpart (mode, x); | |
810 | } | |
811 | \f | |
23b2ce53 RS |
812 | /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value, |
813 | return an rtx (MEM, SUBREG, or CONST_INT) that refers to the | |
814 | least-significant part of X. | |
815 | MODE specifies how big a part of X to return; | |
816 | it usually should not be larger than a word. | |
817 | If X is a MEM whose address is a QUEUED, the value may be so also. */ | |
818 | ||
819 | rtx | |
820 | gen_lowpart (mode, x) | |
821 | enum machine_mode mode; | |
822 | register rtx x; | |
823 | { | |
824 | rtx result = gen_lowpart_common (mode, x); | |
825 | ||
826 | if (result) | |
827 | return result; | |
828 | else if (GET_CODE (x) == MEM) | |
829 | { | |
830 | /* The only additional case we can do is MEM. */ | |
831 | register int offset = 0; | |
832 | if (WORDS_BIG_ENDIAN) | |
833 | offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD) | |
834 | - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD)); | |
835 | ||
836 | if (BYTES_BIG_ENDIAN) | |
837 | /* Adjust the address so that the address-after-the-data | |
838 | is unchanged. */ | |
839 | offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode)) | |
840 | - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x)))); | |
841 | ||
842 | return change_address (x, mode, plus_constant (XEXP (x, 0), offset)); | |
843 | } | |
844 | else | |
845 | abort (); | |
846 | } | |
847 | ||
ccba022b RS |
848 | /* Like `gen_lowpart', but refer to the most significant part. |
849 | This is used to access the imaginary part of a complex number. */ | |
850 | ||
851 | rtx | |
852 | gen_highpart (mode, x) | |
853 | enum machine_mode mode; | |
854 | register rtx x; | |
855 | { | |
856 | /* This case loses if X is a subreg. To catch bugs early, | |
857 | complain if an invalid MODE is used even in other cases. */ | |
858 | if (GET_MODE_SIZE (mode) > UNITS_PER_WORD | |
859 | && GET_MODE_SIZE (mode) != GET_MODE_UNIT_SIZE (GET_MODE (x))) | |
860 | abort (); | |
861 | if (GET_CODE (x) == CONST_DOUBLE | |
1632afca | 862 | #if !(TARGET_FLOAT_FORMAT != HOST_FLOAT_FORMAT || defined (REAL_IS_NOT_DOUBLE)) |
ccba022b RS |
863 | && GET_MODE_CLASS (GET_MODE (x)) != MODE_FLOAT |
864 | #endif | |
865 | ) | |
866 | return gen_rtx (CONST_INT, VOIDmode, | |
867 | CONST_DOUBLE_HIGH (x) & GET_MODE_MASK (mode)); | |
868 | else if (GET_CODE (x) == CONST_INT) | |
869 | return const0_rtx; | |
870 | else if (GET_CODE (x) == MEM) | |
871 | { | |
872 | register int offset = 0; | |
873 | #if !WORDS_BIG_ENDIAN | |
874 | offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD) | |
875 | - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD)); | |
876 | #endif | |
877 | #if !BYTES_BIG_ENDIAN | |
878 | if (GET_MODE_SIZE (mode) < UNITS_PER_WORD) | |
879 | offset -= (GET_MODE_SIZE (mode) | |
880 | - MIN (UNITS_PER_WORD, | |
881 | GET_MODE_SIZE (GET_MODE (x)))); | |
882 | #endif | |
883 | return change_address (x, mode, plus_constant (XEXP (x, 0), offset)); | |
884 | } | |
885 | else if (GET_CODE (x) == SUBREG) | |
886 | { | |
887 | /* The only time this should occur is when we are looking at a | |
888 | multi-word item with a SUBREG whose mode is the same as that of the | |
889 | item. It isn't clear what we would do if it wasn't. */ | |
890 | if (SUBREG_WORD (x) != 0) | |
891 | abort (); | |
892 | return gen_highpart (mode, SUBREG_REG (x)); | |
893 | } | |
894 | else if (GET_CODE (x) == REG) | |
895 | { | |
896 | int word = 0; | |
897 | ||
898 | #if !WORDS_BIG_ENDIAN | |
899 | if (GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD) | |
900 | word = ((GET_MODE_SIZE (GET_MODE (x)) | |
901 | - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD)) | |
902 | / UNITS_PER_WORD); | |
903 | #endif | |
cb00f51a | 904 | if (REGNO (x) < FIRST_PSEUDO_REGISTER |
4badc528 RS |
905 | /* integrate.c can't handle parts of a return value register. */ |
906 | && (! REG_FUNCTION_VALUE_P (x) | |
907 | || ! rtx_equal_function_value_matters) | |
cb00f51a RK |
908 | /* We want to keep the stack, frame, and arg pointers special. */ |
909 | && REGNO (x) != FRAME_POINTER_REGNUM | |
910 | #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM | |
911 | && REGNO (x) != ARG_POINTER_REGNUM | |
912 | #endif | |
913 | && REGNO (x) != STACK_POINTER_REGNUM) | |
ccba022b RS |
914 | return gen_rtx (REG, mode, REGNO (x) + word); |
915 | else | |
916 | return gen_rtx (SUBREG, mode, x, word); | |
917 | } | |
918 | else | |
919 | abort (); | |
920 | } | |
921 | ||
23b2ce53 RS |
922 | /* Return 1 iff X, assumed to be a SUBREG, |
923 | refers to the least significant part of its containing reg. | |
924 | If X is not a SUBREG, always return 1 (it is its own low part!). */ | |
925 | ||
926 | int | |
927 | subreg_lowpart_p (x) | |
928 | rtx x; | |
929 | { | |
930 | if (GET_CODE (x) != SUBREG) | |
931 | return 1; | |
932 | ||
933 | if (WORDS_BIG_ENDIAN | |
934 | && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) > UNITS_PER_WORD) | |
935 | return (SUBREG_WORD (x) | |
936 | == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) | |
937 | - MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)) | |
938 | / UNITS_PER_WORD)); | |
939 | ||
940 | return SUBREG_WORD (x) == 0; | |
941 | } | |
942 | \f | |
943 | /* Return subword I of operand OP. | |
944 | The word number, I, is interpreted as the word number starting at the | |
945 | low-order address. Word 0 is the low-order word if not WORDS_BIG_ENDIAN, | |
946 | otherwise it is the high-order word. | |
947 | ||
948 | If we cannot extract the required word, we return zero. Otherwise, an | |
949 | rtx corresponding to the requested word will be returned. | |
950 | ||
951 | VALIDATE_ADDRESS is nonzero if the address should be validated. Before | |
952 | reload has completed, a valid address will always be returned. After | |
953 | reload, if a valid address cannot be returned, we return zero. | |
954 | ||
955 | If VALIDATE_ADDRESS is zero, we simply form the required address; validating | |
956 | it is the responsibility of the caller. | |
957 | ||
958 | MODE is the mode of OP in case it is a CONST_INT. */ | |
959 | ||
960 | rtx | |
961 | operand_subword (op, i, validate_address, mode) | |
962 | rtx op; | |
963 | int i; | |
964 | int validate_address; | |
965 | enum machine_mode mode; | |
966 | { | |
906c4e36 RK |
967 | HOST_WIDE_INT val; |
968 | int size_ratio = HOST_BITS_PER_WIDE_INT / BITS_PER_WORD; | |
23b2ce53 RS |
969 | |
970 | if (mode == VOIDmode) | |
971 | mode = GET_MODE (op); | |
972 | ||
973 | if (mode == VOIDmode) | |
974 | abort (); | |
975 | ||
976 | /* If OP is narrower than a word or if we want a word outside OP, fail. */ | |
977 | if (mode != BLKmode | |
978 | && (GET_MODE_SIZE (mode) < UNITS_PER_WORD | |
979 | || (i + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))) | |
980 | return 0; | |
981 | ||
982 | /* If OP is already an integer word, return it. */ | |
983 | if (GET_MODE_CLASS (mode) == MODE_INT | |
984 | && GET_MODE_SIZE (mode) == UNITS_PER_WORD) | |
985 | return op; | |
986 | ||
987 | /* If OP is a REG or SUBREG, we can handle it very simply. */ | |
988 | if (GET_CODE (op) == REG) | |
989 | { | |
990 | /* If the register is not valid for MODE, return 0. If we don't | |
991 | do this, there is no way to fix up the resulting REG later. */ | |
992 | if (REGNO (op) < FIRST_PSEUDO_REGISTER | |
993 | && ! HARD_REGNO_MODE_OK (REGNO (op) + i, word_mode)) | |
994 | return 0; | |
995 | else if (REGNO (op) >= FIRST_PSEUDO_REGISTER | |
996 | || (REG_FUNCTION_VALUE_P (op) | |
cb00f51a RK |
997 | && rtx_equal_function_value_matters) |
998 | /* We want to keep the stack, frame, and arg pointers | |
999 | special. */ | |
1000 | || REGNO (op) == FRAME_POINTER_REGNUM | |
1001 | #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM | |
1002 | || REGNO (op) == ARG_POINTER_REGNUM | |
1003 | #endif | |
1004 | || REGNO (op) == STACK_POINTER_REGNUM) | |
23b2ce53 RS |
1005 | return gen_rtx (SUBREG, word_mode, op, i); |
1006 | else | |
1007 | return gen_rtx (REG, word_mode, REGNO (op) + i); | |
1008 | } | |
1009 | else if (GET_CODE (op) == SUBREG) | |
1010 | return gen_rtx (SUBREG, word_mode, SUBREG_REG (op), i + SUBREG_WORD (op)); | |
fc84e8a8 RS |
1011 | else if (GET_CODE (op) == CONCAT) |
1012 | { | |
1013 | int partwords = GET_MODE_UNIT_SIZE (GET_MODE (op)) / UNITS_PER_WORD; | |
1014 | if (i < partwords) | |
1015 | return operand_subword (XEXP (op, 0), i, validate_address, mode); | |
1016 | return operand_subword (XEXP (op, 1), i - partwords, | |
1017 | validate_address, mode); | |
1018 | } | |
23b2ce53 RS |
1019 | |
1020 | /* Form a new MEM at the requested address. */ | |
1021 | if (GET_CODE (op) == MEM) | |
1022 | { | |
1023 | rtx addr = plus_constant (XEXP (op, 0), i * UNITS_PER_WORD); | |
1024 | rtx new; | |
1025 | ||
1026 | if (validate_address) | |
1027 | { | |
1028 | if (reload_completed) | |
1029 | { | |
1030 | if (! strict_memory_address_p (word_mode, addr)) | |
1031 | return 0; | |
1032 | } | |
1033 | else | |
1034 | addr = memory_address (word_mode, addr); | |
1035 | } | |
1036 | ||
1037 | new = gen_rtx (MEM, word_mode, addr); | |
1038 | ||
1039 | MEM_VOLATILE_P (new) = MEM_VOLATILE_P (op); | |
1040 | MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (op); | |
1041 | RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (op); | |
1042 | ||
1043 | return new; | |
1044 | } | |
1045 | ||
1046 | /* The only remaining cases are when OP is a constant. If the host and | |
1047 | target floating formats are the same, handling two-word floating | |
7677ffa4 RK |
1048 | constants are easy. Note that REAL_VALUE_TO_TARGET_{SINGLE,DOUBLE} |
1049 | are defined as returning 32 bit and 64-bit values, respectively, | |
1050 | and not values of BITS_PER_WORD and 2 * BITS_PER_WORD bits. */ | |
1632afca RS |
1051 | #ifdef REAL_ARITHMETIC |
1052 | if ((HOST_BITS_PER_WIDE_INT == BITS_PER_WORD) | |
1053 | && GET_MODE_CLASS (mode) == MODE_FLOAT | |
7677ffa4 | 1054 | && GET_MODE_BITSIZE (mode) == 64 |
1632afca RS |
1055 | && GET_CODE (op) == CONST_DOUBLE) |
1056 | { | |
1057 | HOST_WIDE_INT k[2]; | |
1058 | REAL_VALUE_TYPE rv; | |
1059 | ||
1060 | REAL_VALUE_FROM_CONST_DOUBLE (rv, op); | |
1061 | REAL_VALUE_TO_TARGET_DOUBLE (rv, k); | |
7677ffa4 RK |
1062 | |
1063 | /* We handle 32-bit and 64-bit host words here. Note that the order in | |
1064 | which the words are written depends on the word endianness. | |
1065 | ||
1066 | ??? This is a potential portability problem and should | |
1067 | be fixed at some point. */ | |
1068 | if (HOST_BITS_PER_WIDE_INT == 32) | |
1069 | return GEN_INT (k[i]); | |
1070 | else if (HOST_BITS_PER_WIDE_INT == 64 && i == 0) | |
51591ce9 | 1071 | return GEN_INT ((k[! WORDS_BIG_ENDIAN] << (HOST_BITS_PER_WIDE_INT / 2)) |
7677ffa4 RK |
1072 | | k[WORDS_BIG_ENDIAN]); |
1073 | else | |
1074 | abort (); | |
1632afca RS |
1075 | } |
1076 | #else /* no REAL_ARITHMETIC */ | |
23b2ce53 | 1077 | if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT |
906c4e36 | 1078 | && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD) |
23b2ce53 RS |
1079 | || flag_pretend_float) |
1080 | && GET_MODE_CLASS (mode) == MODE_FLOAT | |
1081 | && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD | |
1082 | && GET_CODE (op) == CONST_DOUBLE) | |
7529ac93 CH |
1083 | { |
1084 | /* The constant is stored in the host's word-ordering, | |
1085 | but we want to access it in the target's word-ordering. Some | |
1086 | compilers don't like a conditional inside macro args, so we have two | |
1087 | copies of the return. */ | |
2fe02d7e | 1088 | #ifdef HOST_WORDS_BIG_ENDIAN |
7529ac93 CH |
1089 | return GEN_INT (i == WORDS_BIG_ENDIAN |
1090 | ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op)); | |
2fe02d7e | 1091 | #else |
7529ac93 CH |
1092 | return GEN_INT (i != WORDS_BIG_ENDIAN |
1093 | ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op)); | |
2fe02d7e | 1094 | #endif |
7529ac93 | 1095 | } |
1632afca | 1096 | #endif /* no REAL_ARITHMETIC */ |
23b2ce53 RS |
1097 | |
1098 | /* Single word float is a little harder, since single- and double-word | |
1099 | values often do not have the same high-order bits. We have already | |
1100 | verified that we want the only defined word of the single-word value. */ | |
1632afca RS |
1101 | #ifdef REAL_ARITHMETIC |
1102 | if ((HOST_BITS_PER_WIDE_INT == BITS_PER_WORD) | |
1103 | && GET_MODE_CLASS (mode) == MODE_FLOAT | |
7677ffa4 | 1104 | && GET_MODE_BITSIZE (mode) == 32 |
1632afca RS |
1105 | && GET_CODE (op) == CONST_DOUBLE) |
1106 | { | |
1107 | HOST_WIDE_INT l; | |
1108 | REAL_VALUE_TYPE rv; | |
1109 | ||
1110 | REAL_VALUE_FROM_CONST_DOUBLE (rv, op); | |
1111 | REAL_VALUE_TO_TARGET_SINGLE (rv, l); | |
1112 | return GEN_INT (l); | |
1113 | } | |
1114 | #else | |
23b2ce53 | 1115 | if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT |
906c4e36 | 1116 | && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD) |
23b2ce53 RS |
1117 | || flag_pretend_float) |
1118 | && GET_MODE_CLASS (mode) == MODE_FLOAT | |
1119 | && GET_MODE_SIZE (mode) == UNITS_PER_WORD | |
1120 | && GET_CODE (op) == CONST_DOUBLE) | |
1121 | { | |
1122 | double d; | |
906c4e36 | 1123 | union {float f; HOST_WIDE_INT i; } u; |
23b2ce53 RS |
1124 | |
1125 | REAL_VALUE_FROM_CONST_DOUBLE (d, op); | |
1126 | ||
1127 | u.f = d; | |
906c4e36 | 1128 | return GEN_INT (u.i); |
23b2ce53 | 1129 | } |
1632afca | 1130 | #endif /* no REAL_ARITHMETIC */ |
23b2ce53 RS |
1131 | |
1132 | /* The only remaining cases that we can handle are integers. | |
1133 | Convert to proper endianness now since these cases need it. | |
1134 | At this point, i == 0 means the low-order word. | |
1135 | ||
2d4f57f8 RK |
1136 | We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT |
1137 | in general. However, if OP is (const_int 0), we can just return | |
1138 | it for any word. */ | |
1139 | ||
1140 | if (op == const0_rtx) | |
1141 | return op; | |
23b2ce53 RS |
1142 | |
1143 | if (GET_MODE_CLASS (mode) != MODE_INT | |
2d4f57f8 RK |
1144 | || (GET_CODE (op) != CONST_INT && GET_CODE (op) != CONST_DOUBLE) |
1145 | || BITS_PER_WORD > HOST_BITS_PER_INT) | |
23b2ce53 RS |
1146 | return 0; |
1147 | ||
1148 | if (WORDS_BIG_ENDIAN) | |
1149 | i = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - i; | |
1150 | ||
1151 | /* Find out which word on the host machine this value is in and get | |
1152 | it from the constant. */ | |
1153 | val = (i / size_ratio == 0 | |
1154 | ? (GET_CODE (op) == CONST_INT ? INTVAL (op) : CONST_DOUBLE_LOW (op)) | |
1155 | : (GET_CODE (op) == CONST_INT | |
1156 | ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op))); | |
1157 | ||
1158 | /* If BITS_PER_WORD is smaller than an int, get the appropriate bits. */ | |
906c4e36 | 1159 | if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT) |
23b2ce53 | 1160 | val = ((val >> ((i % size_ratio) * BITS_PER_WORD)) |
906c4e36 RK |
1161 | & (((HOST_WIDE_INT) 1 |
1162 | << (BITS_PER_WORD % HOST_BITS_PER_WIDE_INT)) - 1)); | |
23b2ce53 | 1163 | |
906c4e36 | 1164 | return GEN_INT (val); |
23b2ce53 RS |
1165 | } |
1166 | ||
1167 | /* Similar to `operand_subword', but never return 0. If we can't extract | |
1168 | the required subword, put OP into a register and try again. If that fails, | |
1169 | abort. We always validate the address in this case. It is not valid | |
1170 | to call this function after reload; it is mostly meant for RTL | |
1171 | generation. | |
1172 | ||
1173 | MODE is the mode of OP, in case it is CONST_INT. */ | |
1174 | ||
1175 | rtx | |
1176 | operand_subword_force (op, i, mode) | |
1177 | rtx op; | |
1178 | int i; | |
1179 | enum machine_mode mode; | |
1180 | { | |
1181 | rtx result = operand_subword (op, i, 1, mode); | |
1182 | ||
1183 | if (result) | |
1184 | return result; | |
1185 | ||
1186 | if (mode != BLKmode && mode != VOIDmode) | |
1187 | op = force_reg (mode, op); | |
1188 | ||
1189 | result = operand_subword (op, i, 1, mode); | |
1190 | if (result == 0) | |
1191 | abort (); | |
1192 | ||
1193 | return result; | |
1194 | } | |
1195 | \f | |
1196 | /* Given a compare instruction, swap the operands. | |
1197 | A test instruction is changed into a compare of 0 against the operand. */ | |
1198 | ||
1199 | void | |
1200 | reverse_comparison (insn) | |
1201 | rtx insn; | |
1202 | { | |
1203 | rtx body = PATTERN (insn); | |
1204 | rtx comp; | |
1205 | ||
1206 | if (GET_CODE (body) == SET) | |
1207 | comp = SET_SRC (body); | |
1208 | else | |
1209 | comp = SET_SRC (XVECEXP (body, 0, 0)); | |
1210 | ||
1211 | if (GET_CODE (comp) == COMPARE) | |
1212 | { | |
1213 | rtx op0 = XEXP (comp, 0); | |
1214 | rtx op1 = XEXP (comp, 1); | |
1215 | XEXP (comp, 0) = op1; | |
1216 | XEXP (comp, 1) = op0; | |
1217 | } | |
1218 | else | |
1219 | { | |
1220 | rtx new = gen_rtx (COMPARE, VOIDmode, | |
1221 | CONST0_RTX (GET_MODE (comp)), comp); | |
1222 | if (GET_CODE (body) == SET) | |
1223 | SET_SRC (body) = new; | |
1224 | else | |
1225 | SET_SRC (XVECEXP (body, 0, 0)) = new; | |
1226 | } | |
1227 | } | |
1228 | \f | |
1229 | /* Return a memory reference like MEMREF, but with its mode changed | |
1230 | to MODE and its address changed to ADDR. | |
1231 | (VOIDmode means don't change the mode. | |
1232 | NULL for ADDR means don't change the address.) */ | |
1233 | ||
1234 | rtx | |
1235 | change_address (memref, mode, addr) | |
1236 | rtx memref; | |
1237 | enum machine_mode mode; | |
1238 | rtx addr; | |
1239 | { | |
1240 | rtx new; | |
1241 | ||
1242 | if (GET_CODE (memref) != MEM) | |
1243 | abort (); | |
1244 | if (mode == VOIDmode) | |
1245 | mode = GET_MODE (memref); | |
1246 | if (addr == 0) | |
1247 | addr = XEXP (memref, 0); | |
1248 | ||
1249 | /* If reload is in progress or has completed, ADDR must be valid. | |
1250 | Otherwise, we can call memory_address to make it valid. */ | |
1251 | if (reload_completed || reload_in_progress) | |
1252 | { | |
1253 | if (! memory_address_p (mode, addr)) | |
1254 | abort (); | |
1255 | } | |
1256 | else | |
1257 | addr = memory_address (mode, addr); | |
1258 | ||
1259 | new = gen_rtx (MEM, mode, addr); | |
1260 | MEM_VOLATILE_P (new) = MEM_VOLATILE_P (memref); | |
1261 | RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (memref); | |
1262 | MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (memref); | |
1263 | return new; | |
1264 | } | |
1265 | \f | |
1266 | /* Return a newly created CODE_LABEL rtx with a unique label number. */ | |
1267 | ||
1268 | rtx | |
1269 | gen_label_rtx () | |
1270 | { | |
ca695ac9 JB |
1271 | register rtx label; |
1272 | ||
8b6813aa RS |
1273 | label = (output_bytecode |
1274 | ? gen_rtx (CODE_LABEL, VOIDmode, NULL, bc_get_bytecode_label ()) | |
1275 | : gen_rtx (CODE_LABEL, VOIDmode, 0, 0, 0, label_num++, NULL_PTR)); | |
ca695ac9 | 1276 | |
23b2ce53 RS |
1277 | LABEL_NUSES (label) = 0; |
1278 | return label; | |
1279 | } | |
1280 | \f | |
1281 | /* For procedure integration. */ | |
1282 | ||
1283 | /* Return a newly created INLINE_HEADER rtx. Should allocate this | |
1284 | from a permanent obstack when the opportunity arises. */ | |
1285 | ||
1286 | rtx | |
1287 | gen_inline_header_rtx (first_insn, first_parm_insn, first_labelno, | |
1288 | last_labelno, max_parm_regnum, max_regnum, args_size, | |
1289 | pops_args, stack_slots, function_flags, | |
1290 | outgoing_args_size, original_arg_vector, | |
1291 | original_decl_initial) | |
1292 | rtx first_insn, first_parm_insn; | |
1293 | int first_labelno, last_labelno, max_parm_regnum, max_regnum, args_size; | |
1294 | int pops_args; | |
1295 | rtx stack_slots; | |
1296 | int function_flags; | |
1297 | int outgoing_args_size; | |
1298 | rtvec original_arg_vector; | |
1299 | rtx original_decl_initial; | |
1300 | { | |
1301 | rtx header = gen_rtx (INLINE_HEADER, VOIDmode, | |
906c4e36 | 1302 | cur_insn_uid++, NULL_RTX, |
23b2ce53 RS |
1303 | first_insn, first_parm_insn, |
1304 | first_labelno, last_labelno, | |
1305 | max_parm_regnum, max_regnum, args_size, pops_args, | |
1306 | stack_slots, function_flags, outgoing_args_size, | |
1307 | original_arg_vector, original_decl_initial); | |
1308 | return header; | |
1309 | } | |
1310 | ||
1311 | /* Install new pointers to the first and last insns in the chain. | |
1312 | Used for an inline-procedure after copying the insn chain. */ | |
1313 | ||
1314 | void | |
1315 | set_new_first_and_last_insn (first, last) | |
1316 | rtx first, last; | |
1317 | { | |
1318 | first_insn = first; | |
1319 | last_insn = last; | |
1320 | } | |
1321 | ||
1322 | /* Set the range of label numbers found in the current function. | |
1323 | This is used when belatedly compiling an inline function. */ | |
1324 | ||
1325 | void | |
1326 | set_new_first_and_last_label_num (first, last) | |
1327 | int first, last; | |
1328 | { | |
1329 | base_label_num = label_num; | |
1330 | first_label_num = first; | |
1331 | last_label_num = last; | |
1332 | } | |
1333 | \f | |
1334 | /* Save all variables describing the current status into the structure *P. | |
1335 | This is used before starting a nested function. */ | |
1336 | ||
1337 | void | |
1338 | save_emit_status (p) | |
1339 | struct function *p; | |
1340 | { | |
1341 | p->reg_rtx_no = reg_rtx_no; | |
1342 | p->first_label_num = first_label_num; | |
1343 | p->first_insn = first_insn; | |
1344 | p->last_insn = last_insn; | |
a25c7971 | 1345 | p->sequence_rtl_expr = sequence_rtl_expr; |
23b2ce53 RS |
1346 | p->sequence_stack = sequence_stack; |
1347 | p->cur_insn_uid = cur_insn_uid; | |
1348 | p->last_linenum = last_linenum; | |
1349 | p->last_filename = last_filename; | |
1350 | p->regno_pointer_flag = regno_pointer_flag; | |
1351 | p->regno_pointer_flag_length = regno_pointer_flag_length; | |
1352 | p->regno_reg_rtx = regno_reg_rtx; | |
1353 | } | |
1354 | ||
1355 | /* Restore all variables describing the current status from the structure *P. | |
1356 | This is used after a nested function. */ | |
1357 | ||
1358 | void | |
1359 | restore_emit_status (p) | |
1360 | struct function *p; | |
1361 | { | |
1362 | int i; | |
1363 | ||
1364 | reg_rtx_no = p->reg_rtx_no; | |
1365 | first_label_num = p->first_label_num; | |
457a2d9c | 1366 | last_label_num = 0; |
23b2ce53 RS |
1367 | first_insn = p->first_insn; |
1368 | last_insn = p->last_insn; | |
a25c7971 | 1369 | sequence_rtl_expr = p->sequence_rtl_expr; |
23b2ce53 RS |
1370 | sequence_stack = p->sequence_stack; |
1371 | cur_insn_uid = p->cur_insn_uid; | |
1372 | last_linenum = p->last_linenum; | |
1373 | last_filename = p->last_filename; | |
1374 | regno_pointer_flag = p->regno_pointer_flag; | |
1375 | regno_pointer_flag_length = p->regno_pointer_flag_length; | |
1376 | regno_reg_rtx = p->regno_reg_rtx; | |
1377 | ||
1378 | /* Clear our cache of rtx expressions for start_sequence and gen_sequence. */ | |
1379 | sequence_element_free_list = 0; | |
1380 | for (i = 0; i < SEQUENCE_RESULT_SIZE; i++) | |
1381 | sequence_result[i] = 0; | |
1382 | } | |
1383 | \f | |
1384 | /* Go through all the RTL insn bodies and copy any invalid shared structure. | |
1385 | It does not work to do this twice, because the mark bits set here | |
1386 | are not cleared afterwards. */ | |
1387 | ||
1388 | void | |
1389 | unshare_all_rtl (insn) | |
1390 | register rtx insn; | |
1391 | { | |
1392 | for (; insn; insn = NEXT_INSN (insn)) | |
1393 | if (GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN | |
1394 | || GET_CODE (insn) == CALL_INSN) | |
1395 | { | |
1396 | PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn)); | |
1397 | REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn)); | |
1398 | LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn)); | |
1399 | } | |
1400 | ||
1401 | /* Make sure the addresses of stack slots found outside the insn chain | |
1402 | (such as, in DECL_RTL of a variable) are not shared | |
1403 | with the insn chain. | |
1404 | ||
1405 | This special care is necessary when the stack slot MEM does not | |
1406 | actually appear in the insn chain. If it does appear, its address | |
1407 | is unshared from all else at that point. */ | |
1408 | ||
1409 | copy_rtx_if_shared (stack_slot_list); | |
1410 | } | |
1411 | ||
1412 | /* Mark ORIG as in use, and return a copy of it if it was already in use. | |
1413 | Recursively does the same for subexpressions. */ | |
1414 | ||
1415 | rtx | |
1416 | copy_rtx_if_shared (orig) | |
1417 | rtx orig; | |
1418 | { | |
1419 | register rtx x = orig; | |
1420 | register int i; | |
1421 | register enum rtx_code code; | |
1422 | register char *format_ptr; | |
1423 | int copied = 0; | |
1424 | ||
1425 | if (x == 0) | |
1426 | return 0; | |
1427 | ||
1428 | code = GET_CODE (x); | |
1429 | ||
1430 | /* These types may be freely shared. */ | |
1431 | ||
1432 | switch (code) | |
1433 | { | |
1434 | case REG: | |
1435 | case QUEUED: | |
1436 | case CONST_INT: | |
1437 | case CONST_DOUBLE: | |
1438 | case SYMBOL_REF: | |
1439 | case CODE_LABEL: | |
1440 | case PC: | |
1441 | case CC0: | |
1442 | case SCRATCH: | |
1443 | /* SCRATCH must be shared because they represent distinct values. */ | |
1444 | return x; | |
1445 | ||
b851ea09 RK |
1446 | case CONST: |
1447 | /* CONST can be shared if it contains a SYMBOL_REF. If it contains | |
1448 | a LABEL_REF, it isn't sharable. */ | |
1449 | if (GET_CODE (XEXP (x, 0)) == PLUS | |
1450 | && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF | |
1451 | && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT) | |
1452 | return x; | |
1453 | break; | |
1454 | ||
23b2ce53 RS |
1455 | case INSN: |
1456 | case JUMP_INSN: | |
1457 | case CALL_INSN: | |
1458 | case NOTE: | |
1459 | case LABEL_REF: | |
1460 | case BARRIER: | |
1461 | /* The chain of insns is not being copied. */ | |
1462 | return x; | |
1463 | ||
1464 | case MEM: | |
1465 | /* A MEM is allowed to be shared if its address is constant | |
1466 | or is a constant plus one of the special registers. */ | |
1467 | if (CONSTANT_ADDRESS_P (XEXP (x, 0)) | |
1468 | || XEXP (x, 0) == virtual_stack_vars_rtx | |
1469 | || XEXP (x, 0) == virtual_incoming_args_rtx) | |
1470 | return x; | |
1471 | ||
1472 | if (GET_CODE (XEXP (x, 0)) == PLUS | |
1473 | && (XEXP (XEXP (x, 0), 0) == virtual_stack_vars_rtx | |
1474 | || XEXP (XEXP (x, 0), 0) == virtual_incoming_args_rtx) | |
1475 | && CONSTANT_ADDRESS_P (XEXP (XEXP (x, 0), 1))) | |
1476 | { | |
1477 | /* This MEM can appear in more than one place, | |
1478 | but its address better not be shared with anything else. */ | |
1479 | if (! x->used) | |
1480 | XEXP (x, 0) = copy_rtx_if_shared (XEXP (x, 0)); | |
1481 | x->used = 1; | |
1482 | return x; | |
1483 | } | |
1484 | } | |
1485 | ||
1486 | /* This rtx may not be shared. If it has already been seen, | |
1487 | replace it with a copy of itself. */ | |
1488 | ||
1489 | if (x->used) | |
1490 | { | |
1491 | register rtx copy; | |
1492 | ||
1493 | copy = rtx_alloc (code); | |
1494 | bcopy (x, copy, (sizeof (*copy) - sizeof (copy->fld) | |
1495 | + sizeof (copy->fld[0]) * GET_RTX_LENGTH (code))); | |
1496 | x = copy; | |
1497 | copied = 1; | |
1498 | } | |
1499 | x->used = 1; | |
1500 | ||
1501 | /* Now scan the subexpressions recursively. | |
1502 | We can store any replaced subexpressions directly into X | |
1503 | since we know X is not shared! Any vectors in X | |
1504 | must be copied if X was copied. */ | |
1505 | ||
1506 | format_ptr = GET_RTX_FORMAT (code); | |
1507 | ||
1508 | for (i = 0; i < GET_RTX_LENGTH (code); i++) | |
1509 | { | |
1510 | switch (*format_ptr++) | |
1511 | { | |
1512 | case 'e': | |
1513 | XEXP (x, i) = copy_rtx_if_shared (XEXP (x, i)); | |
1514 | break; | |
1515 | ||
1516 | case 'E': | |
1517 | if (XVEC (x, i) != NULL) | |
1518 | { | |
1519 | register int j; | |
f0722107 | 1520 | int len = XVECLEN (x, i); |
23b2ce53 | 1521 | |
f0722107 RS |
1522 | if (copied && len > 0) |
1523 | XVEC (x, i) = gen_rtvec_v (len, &XVECEXP (x, i, 0)); | |
1524 | for (j = 0; j < len; j++) | |
1525 | XVECEXP (x, i, j) = copy_rtx_if_shared (XVECEXP (x, i, j)); | |
23b2ce53 RS |
1526 | } |
1527 | break; | |
1528 | } | |
1529 | } | |
1530 | return x; | |
1531 | } | |
1532 | ||
1533 | /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used | |
1534 | to look for shared sub-parts. */ | |
1535 | ||
1536 | void | |
1537 | reset_used_flags (x) | |
1538 | rtx x; | |
1539 | { | |
1540 | register int i, j; | |
1541 | register enum rtx_code code; | |
1542 | register char *format_ptr; | |
1543 | int copied = 0; | |
1544 | ||
1545 | if (x == 0) | |
1546 | return; | |
1547 | ||
1548 | code = GET_CODE (x); | |
1549 | ||
1550 | /* These types may be freely shared so we needn't do any reseting | |
1551 | for them. */ | |
1552 | ||
1553 | switch (code) | |
1554 | { | |
1555 | case REG: | |
1556 | case QUEUED: | |
1557 | case CONST_INT: | |
1558 | case CONST_DOUBLE: | |
1559 | case SYMBOL_REF: | |
1560 | case CODE_LABEL: | |
1561 | case PC: | |
1562 | case CC0: | |
1563 | return; | |
1564 | ||
1565 | case INSN: | |
1566 | case JUMP_INSN: | |
1567 | case CALL_INSN: | |
1568 | case NOTE: | |
1569 | case LABEL_REF: | |
1570 | case BARRIER: | |
1571 | /* The chain of insns is not being copied. */ | |
1572 | return; | |
1573 | } | |
1574 | ||
1575 | x->used = 0; | |
1576 | ||
1577 | format_ptr = GET_RTX_FORMAT (code); | |
1578 | for (i = 0; i < GET_RTX_LENGTH (code); i++) | |
1579 | { | |
1580 | switch (*format_ptr++) | |
1581 | { | |
1582 | case 'e': | |
1583 | reset_used_flags (XEXP (x, i)); | |
1584 | break; | |
1585 | ||
1586 | case 'E': | |
1587 | for (j = 0; j < XVECLEN (x, i); j++) | |
1588 | reset_used_flags (XVECEXP (x, i, j)); | |
1589 | break; | |
1590 | } | |
1591 | } | |
1592 | } | |
1593 | \f | |
1594 | /* Copy X if necessary so that it won't be altered by changes in OTHER. | |
1595 | Return X or the rtx for the pseudo reg the value of X was copied into. | |
1596 | OTHER must be valid as a SET_DEST. */ | |
1597 | ||
1598 | rtx | |
1599 | make_safe_from (x, other) | |
1600 | rtx x, other; | |
1601 | { | |
1602 | while (1) | |
1603 | switch (GET_CODE (other)) | |
1604 | { | |
1605 | case SUBREG: | |
1606 | other = SUBREG_REG (other); | |
1607 | break; | |
1608 | case STRICT_LOW_PART: | |
1609 | case SIGN_EXTEND: | |
1610 | case ZERO_EXTEND: | |
1611 | other = XEXP (other, 0); | |
1612 | break; | |
1613 | default: | |
1614 | goto done; | |
1615 | } | |
1616 | done: | |
1617 | if ((GET_CODE (other) == MEM | |
1618 | && ! CONSTANT_P (x) | |
1619 | && GET_CODE (x) != REG | |
1620 | && GET_CODE (x) != SUBREG) | |
1621 | || (GET_CODE (other) == REG | |
1622 | && (REGNO (other) < FIRST_PSEUDO_REGISTER | |
1623 | || reg_mentioned_p (other, x)))) | |
1624 | { | |
1625 | rtx temp = gen_reg_rtx (GET_MODE (x)); | |
1626 | emit_move_insn (temp, x); | |
1627 | return temp; | |
1628 | } | |
1629 | return x; | |
1630 | } | |
1631 | \f | |
1632 | /* Emission of insns (adding them to the doubly-linked list). */ | |
1633 | ||
1634 | /* Return the first insn of the current sequence or current function. */ | |
1635 | ||
1636 | rtx | |
1637 | get_insns () | |
1638 | { | |
1639 | return first_insn; | |
1640 | } | |
1641 | ||
1642 | /* Return the last insn emitted in current sequence or current function. */ | |
1643 | ||
1644 | rtx | |
1645 | get_last_insn () | |
1646 | { | |
1647 | return last_insn; | |
1648 | } | |
1649 | ||
1650 | /* Specify a new insn as the last in the chain. */ | |
1651 | ||
1652 | void | |
1653 | set_last_insn (insn) | |
1654 | rtx insn; | |
1655 | { | |
1656 | if (NEXT_INSN (insn) != 0) | |
1657 | abort (); | |
1658 | last_insn = insn; | |
1659 | } | |
1660 | ||
1661 | /* Return the last insn emitted, even if it is in a sequence now pushed. */ | |
1662 | ||
1663 | rtx | |
1664 | get_last_insn_anywhere () | |
1665 | { | |
1666 | struct sequence_stack *stack; | |
1667 | if (last_insn) | |
1668 | return last_insn; | |
1669 | for (stack = sequence_stack; stack; stack = stack->next) | |
1670 | if (stack->last != 0) | |
1671 | return stack->last; | |
1672 | return 0; | |
1673 | } | |
1674 | ||
1675 | /* Return a number larger than any instruction's uid in this function. */ | |
1676 | ||
1677 | int | |
1678 | get_max_uid () | |
1679 | { | |
1680 | return cur_insn_uid; | |
1681 | } | |
1682 | \f | |
1683 | /* Return the next insn. If it is a SEQUENCE, return the first insn | |
1684 | of the sequence. */ | |
1685 | ||
1686 | rtx | |
1687 | next_insn (insn) | |
1688 | rtx insn; | |
1689 | { | |
1690 | if (insn) | |
1691 | { | |
1692 | insn = NEXT_INSN (insn); | |
1693 | if (insn && GET_CODE (insn) == INSN | |
1694 | && GET_CODE (PATTERN (insn)) == SEQUENCE) | |
1695 | insn = XVECEXP (PATTERN (insn), 0, 0); | |
1696 | } | |
1697 | ||
1698 | return insn; | |
1699 | } | |
1700 | ||
1701 | /* Return the previous insn. If it is a SEQUENCE, return the last insn | |
1702 | of the sequence. */ | |
1703 | ||
1704 | rtx | |
1705 | previous_insn (insn) | |
1706 | rtx insn; | |
1707 | { | |
1708 | if (insn) | |
1709 | { | |
1710 | insn = PREV_INSN (insn); | |
1711 | if (insn && GET_CODE (insn) == INSN | |
1712 | && GET_CODE (PATTERN (insn)) == SEQUENCE) | |
1713 | insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1); | |
1714 | } | |
1715 | ||
1716 | return insn; | |
1717 | } | |
1718 | ||
1719 | /* Return the next insn after INSN that is not a NOTE. This routine does not | |
1720 | look inside SEQUENCEs. */ | |
1721 | ||
1722 | rtx | |
1723 | next_nonnote_insn (insn) | |
1724 | rtx insn; | |
1725 | { | |
1726 | while (insn) | |
1727 | { | |
1728 | insn = NEXT_INSN (insn); | |
1729 | if (insn == 0 || GET_CODE (insn) != NOTE) | |
1730 | break; | |
1731 | } | |
1732 | ||
1733 | return insn; | |
1734 | } | |
1735 | ||
1736 | /* Return the previous insn before INSN that is not a NOTE. This routine does | |
1737 | not look inside SEQUENCEs. */ | |
1738 | ||
1739 | rtx | |
1740 | prev_nonnote_insn (insn) | |
1741 | rtx insn; | |
1742 | { | |
1743 | while (insn) | |
1744 | { | |
1745 | insn = PREV_INSN (insn); | |
1746 | if (insn == 0 || GET_CODE (insn) != NOTE) | |
1747 | break; | |
1748 | } | |
1749 | ||
1750 | return insn; | |
1751 | } | |
1752 | ||
1753 | /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN; | |
1754 | or 0, if there is none. This routine does not look inside | |
1755 | SEQUENCEs. */ | |
1756 | ||
1757 | rtx | |
1758 | next_real_insn (insn) | |
1759 | rtx insn; | |
1760 | { | |
1761 | while (insn) | |
1762 | { | |
1763 | insn = NEXT_INSN (insn); | |
1764 | if (insn == 0 || GET_CODE (insn) == INSN | |
1765 | || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN) | |
1766 | break; | |
1767 | } | |
1768 | ||
1769 | return insn; | |
1770 | } | |
1771 | ||
1772 | /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN; | |
1773 | or 0, if there is none. This routine does not look inside | |
1774 | SEQUENCEs. */ | |
1775 | ||
1776 | rtx | |
1777 | prev_real_insn (insn) | |
1778 | rtx insn; | |
1779 | { | |
1780 | while (insn) | |
1781 | { | |
1782 | insn = PREV_INSN (insn); | |
1783 | if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN | |
1784 | || GET_CODE (insn) == JUMP_INSN) | |
1785 | break; | |
1786 | } | |
1787 | ||
1788 | return insn; | |
1789 | } | |
1790 | ||
1791 | /* Find the next insn after INSN that really does something. This routine | |
1792 | does not look inside SEQUENCEs. Until reload has completed, this is the | |
1793 | same as next_real_insn. */ | |
1794 | ||
1795 | rtx | |
1796 | next_active_insn (insn) | |
1797 | rtx insn; | |
1798 | { | |
1799 | while (insn) | |
1800 | { | |
1801 | insn = NEXT_INSN (insn); | |
1802 | if (insn == 0 | |
1803 | || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN | |
1804 | || (GET_CODE (insn) == INSN | |
1805 | && (! reload_completed | |
1806 | || (GET_CODE (PATTERN (insn)) != USE | |
1807 | && GET_CODE (PATTERN (insn)) != CLOBBER)))) | |
1808 | break; | |
1809 | } | |
1810 | ||
1811 | return insn; | |
1812 | } | |
1813 | ||
1814 | /* Find the last insn before INSN that really does something. This routine | |
1815 | does not look inside SEQUENCEs. Until reload has completed, this is the | |
1816 | same as prev_real_insn. */ | |
1817 | ||
1818 | rtx | |
1819 | prev_active_insn (insn) | |
1820 | rtx insn; | |
1821 | { | |
1822 | while (insn) | |
1823 | { | |
1824 | insn = PREV_INSN (insn); | |
1825 | if (insn == 0 | |
1826 | || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN | |
1827 | || (GET_CODE (insn) == INSN | |
1828 | && (! reload_completed | |
1829 | || (GET_CODE (PATTERN (insn)) != USE | |
1830 | && GET_CODE (PATTERN (insn)) != CLOBBER)))) | |
1831 | break; | |
1832 | } | |
1833 | ||
1834 | return insn; | |
1835 | } | |
1836 | ||
1837 | /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */ | |
1838 | ||
1839 | rtx | |
1840 | next_label (insn) | |
1841 | rtx insn; | |
1842 | { | |
1843 | while (insn) | |
1844 | { | |
1845 | insn = NEXT_INSN (insn); | |
1846 | if (insn == 0 || GET_CODE (insn) == CODE_LABEL) | |
1847 | break; | |
1848 | } | |
1849 | ||
1850 | return insn; | |
1851 | } | |
1852 | ||
1853 | /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */ | |
1854 | ||
1855 | rtx | |
1856 | prev_label (insn) | |
1857 | rtx insn; | |
1858 | { | |
1859 | while (insn) | |
1860 | { | |
1861 | insn = PREV_INSN (insn); | |
1862 | if (insn == 0 || GET_CODE (insn) == CODE_LABEL) | |
1863 | break; | |
1864 | } | |
1865 | ||
1866 | return insn; | |
1867 | } | |
1868 | \f | |
1869 | #ifdef HAVE_cc0 | |
c572e5ba JVA |
1870 | /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER |
1871 | and REG_CC_USER notes so we can find it. */ | |
1872 | ||
1873 | void | |
1874 | link_cc0_insns (insn) | |
1875 | rtx insn; | |
1876 | { | |
1877 | rtx user = next_nonnote_insn (insn); | |
1878 | ||
1879 | if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE) | |
1880 | user = XVECEXP (PATTERN (user), 0, 0); | |
1881 | ||
1882 | REG_NOTES (user) = gen_rtx (INSN_LIST, REG_CC_SETTER, insn, | |
1883 | REG_NOTES (user)); | |
1884 | REG_NOTES (insn) = gen_rtx (INSN_LIST, REG_CC_USER, user, REG_NOTES (insn)); | |
1885 | } | |
1886 | ||
23b2ce53 RS |
1887 | /* Return the next insn that uses CC0 after INSN, which is assumed to |
1888 | set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter | |
1889 | applied to the result of this function should yield INSN). | |
1890 | ||
1891 | Normally, this is simply the next insn. However, if a REG_CC_USER note | |
1892 | is present, it contains the insn that uses CC0. | |
1893 | ||
1894 | Return 0 if we can't find the insn. */ | |
1895 | ||
1896 | rtx | |
1897 | next_cc0_user (insn) | |
1898 | rtx insn; | |
1899 | { | |
906c4e36 | 1900 | rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX); |
23b2ce53 RS |
1901 | |
1902 | if (note) | |
1903 | return XEXP (note, 0); | |
1904 | ||
1905 | insn = next_nonnote_insn (insn); | |
1906 | if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE) | |
1907 | insn = XVECEXP (PATTERN (insn), 0, 0); | |
1908 | ||
1909 | if (insn && GET_RTX_CLASS (GET_CODE (insn)) == 'i' | |
1910 | && reg_mentioned_p (cc0_rtx, PATTERN (insn))) | |
1911 | return insn; | |
1912 | ||
1913 | return 0; | |
1914 | } | |
1915 | ||
1916 | /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER | |
1917 | note, it is the previous insn. */ | |
1918 | ||
1919 | rtx | |
1920 | prev_cc0_setter (insn) | |
1921 | rtx insn; | |
1922 | { | |
906c4e36 | 1923 | rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX); |
23b2ce53 RS |
1924 | rtx link; |
1925 | ||
1926 | if (note) | |
1927 | return XEXP (note, 0); | |
1928 | ||
1929 | insn = prev_nonnote_insn (insn); | |
1930 | if (! sets_cc0_p (PATTERN (insn))) | |
1931 | abort (); | |
1932 | ||
1933 | return insn; | |
1934 | } | |
1935 | #endif | |
1936 | \f | |
1937 | /* Try splitting insns that can be split for better scheduling. | |
1938 | PAT is the pattern which might split. | |
1939 | TRIAL is the insn providing PAT. | |
1940 | BACKWARDS is non-zero if we are scanning insns from last to first. | |
1941 | ||
1942 | If this routine succeeds in splitting, it returns the first or last | |
1943 | replacement insn depending on the value of BACKWARDS. Otherwise, it | |
1944 | returns TRIAL. If the insn to be returned can be split, it will be. */ | |
1945 | ||
1946 | rtx | |
1947 | try_split (pat, trial, backwards) | |
1948 | rtx pat, trial; | |
1949 | int backwards; | |
1950 | { | |
1951 | rtx before = PREV_INSN (trial); | |
1952 | rtx after = NEXT_INSN (trial); | |
1953 | rtx seq = split_insns (pat, trial); | |
1954 | int has_barrier = 0; | |
1955 | rtx tem; | |
1956 | ||
1957 | /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER. | |
1958 | We may need to handle this specially. */ | |
1959 | if (after && GET_CODE (after) == BARRIER) | |
1960 | { | |
1961 | has_barrier = 1; | |
1962 | after = NEXT_INSN (after); | |
1963 | } | |
1964 | ||
1965 | if (seq) | |
1966 | { | |
1967 | /* SEQ can either be a SEQUENCE or the pattern of a single insn. | |
1968 | The latter case will normally arise only when being done so that | |
1969 | it, in turn, will be split (SFmode on the 29k is an example). */ | |
1970 | if (GET_CODE (seq) == SEQUENCE) | |
1971 | { | |
1972 | /* If we are splitting a JUMP_INSN, look for the JUMP_INSN in | |
1973 | SEQ and copy our JUMP_LABEL to it. If JUMP_LABEL is non-zero, | |
1974 | increment the usage count so we don't delete the label. */ | |
1975 | int i; | |
1976 | ||
1977 | if (GET_CODE (trial) == JUMP_INSN) | |
1978 | for (i = XVECLEN (seq, 0) - 1; i >= 0; i--) | |
1979 | if (GET_CODE (XVECEXP (seq, 0, i)) == JUMP_INSN) | |
1980 | { | |
1981 | JUMP_LABEL (XVECEXP (seq, 0, i)) = JUMP_LABEL (trial); | |
1982 | ||
1983 | if (JUMP_LABEL (trial)) | |
1984 | LABEL_NUSES (JUMP_LABEL (trial))++; | |
1985 | } | |
1986 | ||
1987 | tem = emit_insn_after (seq, before); | |
1988 | ||
1989 | delete_insn (trial); | |
1990 | if (has_barrier) | |
1991 | emit_barrier_after (tem); | |
1992 | } | |
1993 | /* Avoid infinite loop if the result matches the original pattern. */ | |
1994 | else if (rtx_equal_p (seq, pat)) | |
1995 | return trial; | |
1996 | else | |
1997 | { | |
1998 | PATTERN (trial) = seq; | |
1999 | INSN_CODE (trial) = -1; | |
2000 | } | |
2001 | ||
2002 | /* Set TEM to the insn we should return. */ | |
2003 | tem = backwards ? prev_active_insn (after) : next_active_insn (before); | |
2004 | return try_split (PATTERN (tem), tem, backwards); | |
2005 | } | |
2006 | ||
2007 | return trial; | |
2008 | } | |
2009 | \f | |
2010 | /* Make and return an INSN rtx, initializing all its slots. | |
4b1f5e8c | 2011 | Store PATTERN in the pattern slots. */ |
23b2ce53 RS |
2012 | |
2013 | rtx | |
4b1f5e8c | 2014 | make_insn_raw (pattern) |
23b2ce53 | 2015 | rtx pattern; |
23b2ce53 RS |
2016 | { |
2017 | register rtx insn; | |
2018 | ||
1632afca RS |
2019 | insn = rtx_alloc (INSN); |
2020 | INSN_UID (insn) = cur_insn_uid++; | |
23b2ce53 RS |
2021 | |
2022 | PATTERN (insn) = pattern; | |
2023 | INSN_CODE (insn) = -1; | |
1632afca RS |
2024 | LOG_LINKS (insn) = NULL; |
2025 | REG_NOTES (insn) = NULL; | |
23b2ce53 RS |
2026 | |
2027 | return insn; | |
2028 | } | |
2029 | ||
2030 | /* Like `make_insn' but make a JUMP_INSN instead of an insn. */ | |
2031 | ||
2032 | static rtx | |
4b1f5e8c | 2033 | make_jump_insn_raw (pattern) |
23b2ce53 | 2034 | rtx pattern; |
23b2ce53 RS |
2035 | { |
2036 | register rtx insn; | |
2037 | ||
4b1f5e8c | 2038 | insn = rtx_alloc (JUMP_INSN); |
1632afca | 2039 | INSN_UID (insn) = cur_insn_uid++; |
23b2ce53 RS |
2040 | |
2041 | PATTERN (insn) = pattern; | |
2042 | INSN_CODE (insn) = -1; | |
1632afca RS |
2043 | LOG_LINKS (insn) = NULL; |
2044 | REG_NOTES (insn) = NULL; | |
2045 | JUMP_LABEL (insn) = NULL; | |
23b2ce53 RS |
2046 | |
2047 | return insn; | |
2048 | } | |
2049 | \f | |
2050 | /* Add INSN to the end of the doubly-linked list. | |
2051 | INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */ | |
2052 | ||
2053 | void | |
2054 | add_insn (insn) | |
2055 | register rtx insn; | |
2056 | { | |
2057 | PREV_INSN (insn) = last_insn; | |
2058 | NEXT_INSN (insn) = 0; | |
2059 | ||
2060 | if (NULL != last_insn) | |
2061 | NEXT_INSN (last_insn) = insn; | |
2062 | ||
2063 | if (NULL == first_insn) | |
2064 | first_insn = insn; | |
2065 | ||
2066 | last_insn = insn; | |
2067 | } | |
2068 | ||
2069 | /* Add INSN into the doubly-linked list after insn AFTER. This should be the | |
2070 | only function called to insert an insn once delay slots have been filled | |
2071 | since only it knows how to update a SEQUENCE. */ | |
2072 | ||
2073 | void | |
2074 | add_insn_after (insn, after) | |
2075 | rtx insn, after; | |
2076 | { | |
2077 | rtx next = NEXT_INSN (after); | |
2078 | ||
2079 | NEXT_INSN (insn) = next; | |
2080 | PREV_INSN (insn) = after; | |
2081 | ||
2082 | if (next) | |
2083 | { | |
2084 | PREV_INSN (next) = insn; | |
2085 | if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE) | |
2086 | PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn; | |
2087 | } | |
2088 | else if (last_insn == after) | |
2089 | last_insn = insn; | |
2090 | else | |
2091 | { | |
2092 | struct sequence_stack *stack = sequence_stack; | |
2093 | /* Scan all pending sequences too. */ | |
2094 | for (; stack; stack = stack->next) | |
2095 | if (after == stack->last) | |
2096 | stack->last = insn; | |
2097 | } | |
2098 | ||
2099 | NEXT_INSN (after) = insn; | |
2100 | if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE) | |
2101 | { | |
2102 | rtx sequence = PATTERN (after); | |
2103 | NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn; | |
2104 | } | |
2105 | } | |
2106 | ||
2107 | /* Delete all insns made since FROM. | |
2108 | FROM becomes the new last instruction. */ | |
2109 | ||
2110 | void | |
2111 | delete_insns_since (from) | |
2112 | rtx from; | |
2113 | { | |
2114 | if (from == 0) | |
2115 | first_insn = 0; | |
2116 | else | |
2117 | NEXT_INSN (from) = 0; | |
2118 | last_insn = from; | |
2119 | } | |
2120 | ||
2121 | /* Move a consecutive bunch of insns to a different place in the chain. | |
2122 | The insns to be moved are those between FROM and TO. | |
2123 | They are moved to a new position after the insn AFTER. | |
2124 | AFTER must not be FROM or TO or any insn in between. | |
2125 | ||
2126 | This function does not know about SEQUENCEs and hence should not be | |
2127 | called after delay-slot filling has been done. */ | |
2128 | ||
2129 | void | |
2130 | reorder_insns (from, to, after) | |
2131 | rtx from, to, after; | |
2132 | { | |
2133 | /* Splice this bunch out of where it is now. */ | |
2134 | if (PREV_INSN (from)) | |
2135 | NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to); | |
2136 | if (NEXT_INSN (to)) | |
2137 | PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from); | |
2138 | if (last_insn == to) | |
2139 | last_insn = PREV_INSN (from); | |
2140 | if (first_insn == from) | |
2141 | first_insn = NEXT_INSN (to); | |
2142 | ||
2143 | /* Make the new neighbors point to it and it to them. */ | |
2144 | if (NEXT_INSN (after)) | |
2145 | PREV_INSN (NEXT_INSN (after)) = to; | |
2146 | ||
2147 | NEXT_INSN (to) = NEXT_INSN (after); | |
2148 | PREV_INSN (from) = after; | |
2149 | NEXT_INSN (after) = from; | |
2150 | if (after == last_insn) | |
2151 | last_insn = to; | |
2152 | } | |
2153 | ||
2154 | /* Return the line note insn preceding INSN. */ | |
2155 | ||
2156 | static rtx | |
2157 | find_line_note (insn) | |
2158 | rtx insn; | |
2159 | { | |
2160 | if (no_line_numbers) | |
2161 | return 0; | |
2162 | ||
2163 | for (; insn; insn = PREV_INSN (insn)) | |
2164 | if (GET_CODE (insn) == NOTE | |
2165 | && NOTE_LINE_NUMBER (insn) >= 0) | |
2166 | break; | |
2167 | ||
2168 | return insn; | |
2169 | } | |
2170 | ||
2171 | /* Like reorder_insns, but inserts line notes to preserve the line numbers | |
2172 | of the moved insns when debugging. This may insert a note between AFTER | |
2173 | and FROM, and another one after TO. */ | |
2174 | ||
2175 | void | |
2176 | reorder_insns_with_line_notes (from, to, after) | |
2177 | rtx from, to, after; | |
2178 | { | |
2179 | rtx from_line = find_line_note (from); | |
2180 | rtx after_line = find_line_note (after); | |
2181 | ||
2182 | reorder_insns (from, to, after); | |
2183 | ||
2184 | if (from_line == after_line) | |
2185 | return; | |
2186 | ||
2187 | if (from_line) | |
2188 | emit_line_note_after (NOTE_SOURCE_FILE (from_line), | |
2189 | NOTE_LINE_NUMBER (from_line), | |
2190 | after); | |
2191 | if (after_line) | |
2192 | emit_line_note_after (NOTE_SOURCE_FILE (after_line), | |
2193 | NOTE_LINE_NUMBER (after_line), | |
2194 | to); | |
2195 | } | |
2196 | \f | |
2197 | /* Emit an insn of given code and pattern | |
2198 | at a specified place within the doubly-linked list. */ | |
2199 | ||
2200 | /* Make an instruction with body PATTERN | |
2201 | and output it before the instruction BEFORE. */ | |
2202 | ||
2203 | rtx | |
2204 | emit_insn_before (pattern, before) | |
2205 | register rtx pattern, before; | |
2206 | { | |
2207 | register rtx insn = before; | |
2208 | ||
2209 | if (GET_CODE (pattern) == SEQUENCE) | |
2210 | { | |
2211 | register int i; | |
2212 | ||
2213 | for (i = 0; i < XVECLEN (pattern, 0); i++) | |
2214 | { | |
2215 | insn = XVECEXP (pattern, 0, i); | |
2216 | add_insn_after (insn, PREV_INSN (before)); | |
2217 | } | |
2218 | if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE) | |
2219 | sequence_result[XVECLEN (pattern, 0)] = pattern; | |
2220 | } | |
2221 | else | |
2222 | { | |
4b1f5e8c | 2223 | insn = make_insn_raw (pattern); |
23b2ce53 RS |
2224 | add_insn_after (insn, PREV_INSN (before)); |
2225 | } | |
2226 | ||
2227 | return insn; | |
2228 | } | |
2229 | ||
2230 | /* Make an instruction with body PATTERN and code JUMP_INSN | |
2231 | and output it before the instruction BEFORE. */ | |
2232 | ||
2233 | rtx | |
2234 | emit_jump_insn_before (pattern, before) | |
2235 | register rtx pattern, before; | |
2236 | { | |
2237 | register rtx insn; | |
2238 | ||
2239 | if (GET_CODE (pattern) == SEQUENCE) | |
2240 | insn = emit_insn_before (pattern, before); | |
2241 | else | |
2242 | { | |
85cf32bc | 2243 | insn = make_jump_insn_raw (pattern); |
23b2ce53 RS |
2244 | add_insn_after (insn, PREV_INSN (before)); |
2245 | } | |
2246 | ||
2247 | return insn; | |
2248 | } | |
2249 | ||
2250 | /* Make an instruction with body PATTERN and code CALL_INSN | |
2251 | and output it before the instruction BEFORE. */ | |
2252 | ||
2253 | rtx | |
2254 | emit_call_insn_before (pattern, before) | |
2255 | register rtx pattern, before; | |
2256 | { | |
2257 | rtx insn = emit_insn_before (pattern, before); | |
2258 | PUT_CODE (insn, CALL_INSN); | |
2259 | return insn; | |
2260 | } | |
2261 | ||
2262 | /* Make an insn of code BARRIER | |
2263 | and output it before the insn AFTER. */ | |
2264 | ||
2265 | rtx | |
2266 | emit_barrier_before (before) | |
2267 | register rtx before; | |
2268 | { | |
2269 | register rtx insn = rtx_alloc (BARRIER); | |
2270 | ||
2271 | INSN_UID (insn) = cur_insn_uid++; | |
2272 | ||
2273 | add_insn_after (insn, PREV_INSN (before)); | |
2274 | return insn; | |
2275 | } | |
2276 | ||
2277 | /* Emit a note of subtype SUBTYPE before the insn BEFORE. */ | |
2278 | ||
2279 | rtx | |
2280 | emit_note_before (subtype, before) | |
2281 | int subtype; | |
2282 | rtx before; | |
2283 | { | |
2284 | register rtx note = rtx_alloc (NOTE); | |
2285 | INSN_UID (note) = cur_insn_uid++; | |
2286 | NOTE_SOURCE_FILE (note) = 0; | |
2287 | NOTE_LINE_NUMBER (note) = subtype; | |
2288 | ||
2289 | add_insn_after (note, PREV_INSN (before)); | |
2290 | return note; | |
2291 | } | |
2292 | \f | |
2293 | /* Make an insn of code INSN with body PATTERN | |
2294 | and output it after the insn AFTER. */ | |
2295 | ||
2296 | rtx | |
2297 | emit_insn_after (pattern, after) | |
2298 | register rtx pattern, after; | |
2299 | { | |
2300 | register rtx insn = after; | |
2301 | ||
2302 | if (GET_CODE (pattern) == SEQUENCE) | |
2303 | { | |
2304 | register int i; | |
2305 | ||
2306 | for (i = 0; i < XVECLEN (pattern, 0); i++) | |
2307 | { | |
2308 | insn = XVECEXP (pattern, 0, i); | |
2309 | add_insn_after (insn, after); | |
2310 | after = insn; | |
2311 | } | |
2312 | if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE) | |
2313 | sequence_result[XVECLEN (pattern, 0)] = pattern; | |
2314 | } | |
2315 | else | |
2316 | { | |
4b1f5e8c | 2317 | insn = make_insn_raw (pattern); |
23b2ce53 RS |
2318 | add_insn_after (insn, after); |
2319 | } | |
2320 | ||
2321 | return insn; | |
2322 | } | |
2323 | ||
255680cf RK |
2324 | /* Similar to emit_insn_after, except that line notes are to be inserted so |
2325 | as to act as if this insn were at FROM. */ | |
2326 | ||
2327 | void | |
2328 | emit_insn_after_with_line_notes (pattern, after, from) | |
2329 | rtx pattern, after, from; | |
2330 | { | |
2331 | rtx from_line = find_line_note (from); | |
2332 | rtx after_line = find_line_note (after); | |
2333 | rtx insn = emit_insn_after (pattern, after); | |
2334 | ||
2335 | if (from_line) | |
2336 | emit_line_note_after (NOTE_SOURCE_FILE (from_line), | |
2337 | NOTE_LINE_NUMBER (from_line), | |
2338 | after); | |
2339 | ||
2340 | if (after_line) | |
2341 | emit_line_note_after (NOTE_SOURCE_FILE (after_line), | |
2342 | NOTE_LINE_NUMBER (after_line), | |
2343 | insn); | |
2344 | } | |
2345 | ||
23b2ce53 RS |
2346 | /* Make an insn of code JUMP_INSN with body PATTERN |
2347 | and output it after the insn AFTER. */ | |
2348 | ||
2349 | rtx | |
2350 | emit_jump_insn_after (pattern, after) | |
2351 | register rtx pattern, after; | |
2352 | { | |
2353 | register rtx insn; | |
2354 | ||
2355 | if (GET_CODE (pattern) == SEQUENCE) | |
2356 | insn = emit_insn_after (pattern, after); | |
2357 | else | |
2358 | { | |
85cf32bc | 2359 | insn = make_jump_insn_raw (pattern); |
23b2ce53 RS |
2360 | add_insn_after (insn, after); |
2361 | } | |
2362 | ||
2363 | return insn; | |
2364 | } | |
2365 | ||
2366 | /* Make an insn of code BARRIER | |
2367 | and output it after the insn AFTER. */ | |
2368 | ||
2369 | rtx | |
2370 | emit_barrier_after (after) | |
2371 | register rtx after; | |
2372 | { | |
2373 | register rtx insn = rtx_alloc (BARRIER); | |
2374 | ||
2375 | INSN_UID (insn) = cur_insn_uid++; | |
2376 | ||
2377 | add_insn_after (insn, after); | |
2378 | return insn; | |
2379 | } | |
2380 | ||
2381 | /* Emit the label LABEL after the insn AFTER. */ | |
2382 | ||
2383 | rtx | |
2384 | emit_label_after (label, after) | |
2385 | rtx label, after; | |
2386 | { | |
2387 | /* This can be called twice for the same label | |
2388 | as a result of the confusion that follows a syntax error! | |
2389 | So make it harmless. */ | |
2390 | if (INSN_UID (label) == 0) | |
2391 | { | |
2392 | INSN_UID (label) = cur_insn_uid++; | |
2393 | add_insn_after (label, after); | |
2394 | } | |
2395 | ||
2396 | return label; | |
2397 | } | |
2398 | ||
2399 | /* Emit a note of subtype SUBTYPE after the insn AFTER. */ | |
2400 | ||
2401 | rtx | |
2402 | emit_note_after (subtype, after) | |
2403 | int subtype; | |
2404 | rtx after; | |
2405 | { | |
2406 | register rtx note = rtx_alloc (NOTE); | |
2407 | INSN_UID (note) = cur_insn_uid++; | |
2408 | NOTE_SOURCE_FILE (note) = 0; | |
2409 | NOTE_LINE_NUMBER (note) = subtype; | |
2410 | add_insn_after (note, after); | |
2411 | return note; | |
2412 | } | |
2413 | ||
2414 | /* Emit a line note for FILE and LINE after the insn AFTER. */ | |
2415 | ||
2416 | rtx | |
2417 | emit_line_note_after (file, line, after) | |
2418 | char *file; | |
2419 | int line; | |
2420 | rtx after; | |
2421 | { | |
2422 | register rtx note; | |
2423 | ||
2424 | if (no_line_numbers && line > 0) | |
2425 | { | |
2426 | cur_insn_uid++; | |
2427 | return 0; | |
2428 | } | |
2429 | ||
2430 | note = rtx_alloc (NOTE); | |
2431 | INSN_UID (note) = cur_insn_uid++; | |
2432 | NOTE_SOURCE_FILE (note) = file; | |
2433 | NOTE_LINE_NUMBER (note) = line; | |
2434 | add_insn_after (note, after); | |
2435 | return note; | |
2436 | } | |
2437 | \f | |
2438 | /* Make an insn of code INSN with pattern PATTERN | |
2439 | and add it to the end of the doubly-linked list. | |
2440 | If PATTERN is a SEQUENCE, take the elements of it | |
2441 | and emit an insn for each element. | |
2442 | ||
2443 | Returns the last insn emitted. */ | |
2444 | ||
2445 | rtx | |
2446 | emit_insn (pattern) | |
2447 | rtx pattern; | |
2448 | { | |
2449 | rtx insn = last_insn; | |
2450 | ||
2451 | if (GET_CODE (pattern) == SEQUENCE) | |
2452 | { | |
2453 | register int i; | |
2454 | ||
2455 | for (i = 0; i < XVECLEN (pattern, 0); i++) | |
2456 | { | |
2457 | insn = XVECEXP (pattern, 0, i); | |
2458 | add_insn (insn); | |
2459 | } | |
2460 | if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE) | |
2461 | sequence_result[XVECLEN (pattern, 0)] = pattern; | |
2462 | } | |
2463 | else | |
2464 | { | |
4b1f5e8c | 2465 | insn = make_insn_raw (pattern); |
23b2ce53 RS |
2466 | add_insn (insn); |
2467 | } | |
2468 | ||
2469 | return insn; | |
2470 | } | |
2471 | ||
2472 | /* Emit the insns in a chain starting with INSN. | |
2473 | Return the last insn emitted. */ | |
2474 | ||
2475 | rtx | |
2476 | emit_insns (insn) | |
2477 | rtx insn; | |
2478 | { | |
2479 | rtx last = 0; | |
2480 | ||
2481 | while (insn) | |
2482 | { | |
2483 | rtx next = NEXT_INSN (insn); | |
2484 | add_insn (insn); | |
2485 | last = insn; | |
2486 | insn = next; | |
2487 | } | |
2488 | ||
2489 | return last; | |
2490 | } | |
2491 | ||
2492 | /* Emit the insns in a chain starting with INSN and place them in front of | |
2493 | the insn BEFORE. Return the last insn emitted. */ | |
2494 | ||
2495 | rtx | |
2496 | emit_insns_before (insn, before) | |
2497 | rtx insn; | |
2498 | rtx before; | |
2499 | { | |
2500 | rtx last = 0; | |
2501 | ||
2502 | while (insn) | |
2503 | { | |
2504 | rtx next = NEXT_INSN (insn); | |
2505 | add_insn_after (insn, PREV_INSN (before)); | |
2506 | last = insn; | |
2507 | insn = next; | |
2508 | } | |
2509 | ||
2510 | return last; | |
2511 | } | |
2512 | ||
e0a5c5eb RS |
2513 | /* Emit the insns in a chain starting with FIRST and place them in back of |
2514 | the insn AFTER. Return the last insn emitted. */ | |
2515 | ||
2516 | rtx | |
2517 | emit_insns_after (first, after) | |
2518 | register rtx first; | |
2519 | register rtx after; | |
2520 | { | |
2521 | register rtx last; | |
2522 | register rtx after_after; | |
2523 | ||
2524 | if (!after) | |
2525 | abort (); | |
2526 | ||
2527 | if (!first) | |
2528 | return first; | |
2529 | ||
2530 | for (last = first; NEXT_INSN (last); last = NEXT_INSN (last)) | |
2531 | continue; | |
2532 | ||
2533 | after_after = NEXT_INSN (after); | |
2534 | ||
2535 | NEXT_INSN (after) = first; | |
2536 | PREV_INSN (first) = after; | |
2537 | NEXT_INSN (last) = after_after; | |
2538 | if (after_after) | |
2539 | PREV_INSN (after_after) = last; | |
2540 | ||
c4d990db RS |
2541 | if (after == last_insn) |
2542 | last_insn = last; | |
e0a5c5eb RS |
2543 | return last; |
2544 | } | |
2545 | ||
23b2ce53 RS |
2546 | /* Make an insn of code JUMP_INSN with pattern PATTERN |
2547 | and add it to the end of the doubly-linked list. */ | |
2548 | ||
2549 | rtx | |
2550 | emit_jump_insn (pattern) | |
2551 | rtx pattern; | |
2552 | { | |
2553 | if (GET_CODE (pattern) == SEQUENCE) | |
2554 | return emit_insn (pattern); | |
2555 | else | |
2556 | { | |
85cf32bc | 2557 | register rtx insn = make_jump_insn_raw (pattern); |
23b2ce53 RS |
2558 | add_insn (insn); |
2559 | return insn; | |
2560 | } | |
2561 | } | |
2562 | ||
2563 | /* Make an insn of code CALL_INSN with pattern PATTERN | |
2564 | and add it to the end of the doubly-linked list. */ | |
2565 | ||
2566 | rtx | |
2567 | emit_call_insn (pattern) | |
2568 | rtx pattern; | |
2569 | { | |
2570 | if (GET_CODE (pattern) == SEQUENCE) | |
2571 | return emit_insn (pattern); | |
2572 | else | |
2573 | { | |
4b1f5e8c | 2574 | register rtx insn = make_insn_raw (pattern); |
23b2ce53 RS |
2575 | add_insn (insn); |
2576 | PUT_CODE (insn, CALL_INSN); | |
2577 | return insn; | |
2578 | } | |
2579 | } | |
2580 | ||
2581 | /* Add the label LABEL to the end of the doubly-linked list. */ | |
2582 | ||
2583 | rtx | |
2584 | emit_label (label) | |
2585 | rtx label; | |
2586 | { | |
2587 | /* This can be called twice for the same label | |
2588 | as a result of the confusion that follows a syntax error! | |
2589 | So make it harmless. */ | |
2590 | if (INSN_UID (label) == 0) | |
2591 | { | |
2592 | INSN_UID (label) = cur_insn_uid++; | |
2593 | add_insn (label); | |
2594 | } | |
2595 | return label; | |
2596 | } | |
2597 | ||
2598 | /* Make an insn of code BARRIER | |
2599 | and add it to the end of the doubly-linked list. */ | |
2600 | ||
2601 | rtx | |
2602 | emit_barrier () | |
2603 | { | |
2604 | register rtx barrier = rtx_alloc (BARRIER); | |
2605 | INSN_UID (barrier) = cur_insn_uid++; | |
2606 | add_insn (barrier); | |
2607 | return barrier; | |
2608 | } | |
2609 | ||
2610 | /* Make an insn of code NOTE | |
2611 | with data-fields specified by FILE and LINE | |
2612 | and add it to the end of the doubly-linked list, | |
2613 | but only if line-numbers are desired for debugging info. */ | |
2614 | ||
2615 | rtx | |
2616 | emit_line_note (file, line) | |
2617 | char *file; | |
2618 | int line; | |
2619 | { | |
ca695ac9 JB |
2620 | if (output_bytecode) |
2621 | { | |
2622 | /* FIXME: for now we do nothing, but eventually we will have to deal with | |
2623 | debugging information. */ | |
2624 | return 0; | |
2625 | } | |
2626 | ||
23b2ce53 RS |
2627 | emit_filename = file; |
2628 | emit_lineno = line; | |
2629 | ||
2630 | #if 0 | |
2631 | if (no_line_numbers) | |
2632 | return 0; | |
2633 | #endif | |
2634 | ||
2635 | return emit_note (file, line); | |
2636 | } | |
2637 | ||
2638 | /* Make an insn of code NOTE | |
2639 | with data-fields specified by FILE and LINE | |
2640 | and add it to the end of the doubly-linked list. | |
2641 | If it is a line-number NOTE, omit it if it matches the previous one. */ | |
2642 | ||
2643 | rtx | |
2644 | emit_note (file, line) | |
2645 | char *file; | |
2646 | int line; | |
2647 | { | |
2648 | register rtx note; | |
2649 | ||
2650 | if (line > 0) | |
2651 | { | |
2652 | if (file && last_filename && !strcmp (file, last_filename) | |
2653 | && line == last_linenum) | |
2654 | return 0; | |
2655 | last_filename = file; | |
2656 | last_linenum = line; | |
2657 | } | |
2658 | ||
2659 | if (no_line_numbers && line > 0) | |
2660 | { | |
2661 | cur_insn_uid++; | |
2662 | return 0; | |
2663 | } | |
2664 | ||
2665 | note = rtx_alloc (NOTE); | |
2666 | INSN_UID (note) = cur_insn_uid++; | |
2667 | NOTE_SOURCE_FILE (note) = file; | |
2668 | NOTE_LINE_NUMBER (note) = line; | |
2669 | add_insn (note); | |
2670 | return note; | |
2671 | } | |
2672 | ||
2673 | /* Emit a NOTE, and don't omit it even if LINE it the previous note. */ | |
2674 | ||
2675 | rtx | |
2676 | emit_line_note_force (file, line) | |
2677 | char *file; | |
2678 | int line; | |
2679 | { | |
2680 | last_linenum = -1; | |
2681 | return emit_line_note (file, line); | |
2682 | } | |
2683 | ||
2684 | /* Cause next statement to emit a line note even if the line number | |
2685 | has not changed. This is used at the beginning of a function. */ | |
2686 | ||
2687 | void | |
2688 | force_next_line_note () | |
2689 | { | |
2690 | last_linenum = -1; | |
2691 | } | |
2692 | \f | |
2693 | /* Return an indication of which type of insn should have X as a body. | |
2694 | The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */ | |
2695 | ||
2696 | enum rtx_code | |
2697 | classify_insn (x) | |
2698 | rtx x; | |
2699 | { | |
2700 | if (GET_CODE (x) == CODE_LABEL) | |
2701 | return CODE_LABEL; | |
2702 | if (GET_CODE (x) == CALL) | |
2703 | return CALL_INSN; | |
2704 | if (GET_CODE (x) == RETURN) | |
2705 | return JUMP_INSN; | |
2706 | if (GET_CODE (x) == SET) | |
2707 | { | |
2708 | if (SET_DEST (x) == pc_rtx) | |
2709 | return JUMP_INSN; | |
2710 | else if (GET_CODE (SET_SRC (x)) == CALL) | |
2711 | return CALL_INSN; | |
2712 | else | |
2713 | return INSN; | |
2714 | } | |
2715 | if (GET_CODE (x) == PARALLEL) | |
2716 | { | |
2717 | register int j; | |
2718 | for (j = XVECLEN (x, 0) - 1; j >= 0; j--) | |
2719 | if (GET_CODE (XVECEXP (x, 0, j)) == CALL) | |
2720 | return CALL_INSN; | |
2721 | else if (GET_CODE (XVECEXP (x, 0, j)) == SET | |
2722 | && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx) | |
2723 | return JUMP_INSN; | |
2724 | else if (GET_CODE (XVECEXP (x, 0, j)) == SET | |
2725 | && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL) | |
2726 | return CALL_INSN; | |
2727 | } | |
2728 | return INSN; | |
2729 | } | |
2730 | ||
2731 | /* Emit the rtl pattern X as an appropriate kind of insn. | |
2732 | If X is a label, it is simply added into the insn chain. */ | |
2733 | ||
2734 | rtx | |
2735 | emit (x) | |
2736 | rtx x; | |
2737 | { | |
2738 | enum rtx_code code = classify_insn (x); | |
2739 | ||
2740 | if (code == CODE_LABEL) | |
2741 | return emit_label (x); | |
2742 | else if (code == INSN) | |
2743 | return emit_insn (x); | |
2744 | else if (code == JUMP_INSN) | |
2745 | { | |
2746 | register rtx insn = emit_jump_insn (x); | |
2747 | if (simplejump_p (insn) || GET_CODE (x) == RETURN) | |
2748 | return emit_barrier (); | |
2749 | return insn; | |
2750 | } | |
2751 | else if (code == CALL_INSN) | |
2752 | return emit_call_insn (x); | |
2753 | else | |
2754 | abort (); | |
2755 | } | |
2756 | \f | |
2757 | /* Begin emitting insns to a sequence which can be packaged in an RTL_EXPR. */ | |
2758 | ||
2759 | void | |
2760 | start_sequence () | |
2761 | { | |
2762 | struct sequence_stack *tem; | |
2763 | ||
2764 | if (sequence_element_free_list) | |
2765 | { | |
2766 | /* Reuse a previously-saved struct sequence_stack. */ | |
2767 | tem = sequence_element_free_list; | |
2768 | sequence_element_free_list = tem->next; | |
2769 | } | |
2770 | else | |
2771 | tem = (struct sequence_stack *) permalloc (sizeof (struct sequence_stack)); | |
2772 | ||
2773 | tem->next = sequence_stack; | |
2774 | tem->first = first_insn; | |
2775 | tem->last = last_insn; | |
3ae24368 | 2776 | tem->sequence_rtl_expr = sequence_rtl_expr; |
23b2ce53 RS |
2777 | |
2778 | sequence_stack = tem; | |
2779 | ||
2780 | first_insn = 0; | |
2781 | last_insn = 0; | |
2782 | } | |
2783 | ||
a25c7971 RK |
2784 | /* Similarly, but indicate that this sequence will be placed in |
2785 | T, an RTL_EXPR. */ | |
2786 | ||
2787 | void | |
2788 | start_sequence_for_rtl_expr (t) | |
2789 | tree t; | |
2790 | { | |
2791 | start_sequence (); | |
2792 | ||
2793 | sequence_rtl_expr = t; | |
2794 | } | |
2795 | ||
23b2ce53 RS |
2796 | /* Set up the insn chain starting with FIRST |
2797 | as the current sequence, saving the previously current one. */ | |
2798 | ||
2799 | void | |
2800 | push_to_sequence (first) | |
2801 | rtx first; | |
2802 | { | |
2803 | rtx last; | |
2804 | ||
2805 | start_sequence (); | |
2806 | ||
2807 | for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last)); | |
2808 | ||
2809 | first_insn = first; | |
2810 | last_insn = last; | |
2811 | } | |
2812 | ||
f15ae3a1 TW |
2813 | /* Set up the outer-level insn chain |
2814 | as the current sequence, saving the previously current one. */ | |
2815 | ||
2816 | void | |
2817 | push_topmost_sequence () | |
2818 | { | |
2819 | struct sequence_stack *stack, *top; | |
2820 | ||
2821 | start_sequence (); | |
2822 | ||
2823 | for (stack = sequence_stack; stack; stack = stack->next) | |
2824 | top = stack; | |
2825 | ||
2826 | first_insn = top->first; | |
2827 | last_insn = top->last; | |
629a4238 | 2828 | sequence_rtl_expr = top->sequence_rtl_expr; |
f15ae3a1 TW |
2829 | } |
2830 | ||
2831 | /* After emitting to the outer-level insn chain, update the outer-level | |
2832 | insn chain, and restore the previous saved state. */ | |
2833 | ||
2834 | void | |
2835 | pop_topmost_sequence () | |
2836 | { | |
2837 | struct sequence_stack *stack, *top; | |
2838 | ||
2839 | for (stack = sequence_stack; stack; stack = stack->next) | |
2840 | top = stack; | |
2841 | ||
2842 | top->first = first_insn; | |
2843 | top->last = last_insn; | |
3ae24368 | 2844 | /* ??? Why don't we save sequence_rtl_expr here? */ |
f15ae3a1 TW |
2845 | |
2846 | end_sequence (); | |
2847 | } | |
2848 | ||
23b2ce53 RS |
2849 | /* After emitting to a sequence, restore previous saved state. |
2850 | ||
2851 | To get the contents of the sequence just made, | |
2852 | you must call `gen_sequence' *before* calling here. */ | |
2853 | ||
2854 | void | |
2855 | end_sequence () | |
2856 | { | |
2857 | struct sequence_stack *tem = sequence_stack; | |
2858 | ||
2859 | first_insn = tem->first; | |
2860 | last_insn = tem->last; | |
629a4238 | 2861 | sequence_rtl_expr = tem->sequence_rtl_expr; |
23b2ce53 RS |
2862 | sequence_stack = tem->next; |
2863 | ||
2864 | tem->next = sequence_element_free_list; | |
2865 | sequence_element_free_list = tem; | |
2866 | } | |
2867 | ||
2868 | /* Return 1 if currently emitting into a sequence. */ | |
2869 | ||
2870 | int | |
2871 | in_sequence_p () | |
2872 | { | |
2873 | return sequence_stack != 0; | |
2874 | } | |
2875 | ||
2876 | /* Generate a SEQUENCE rtx containing the insns already emitted | |
2877 | to the current sequence. | |
2878 | ||
2879 | This is how the gen_... function from a DEFINE_EXPAND | |
2880 | constructs the SEQUENCE that it returns. */ | |
2881 | ||
2882 | rtx | |
2883 | gen_sequence () | |
2884 | { | |
2885 | rtx result; | |
2886 | rtx tem; | |
2887 | rtvec newvec; | |
2888 | int i; | |
2889 | int len; | |
2890 | ||
2891 | /* Count the insns in the chain. */ | |
2892 | len = 0; | |
2893 | for (tem = first_insn; tem; tem = NEXT_INSN (tem)) | |
2894 | len++; | |
2895 | ||
2896 | /* If only one insn, return its pattern rather than a SEQUENCE. | |
2897 | (Now that we cache SEQUENCE expressions, it isn't worth special-casing | |
2898 | the case of an empty list.) */ | |
2899 | if (len == 1 | |
2900 | && (GET_CODE (first_insn) == INSN | |
2901 | || GET_CODE (first_insn) == JUMP_INSN | |
2902 | || GET_CODE (first_insn) == CALL_INSN)) | |
2903 | return PATTERN (first_insn); | |
2904 | ||
2905 | /* Put them in a vector. See if we already have a SEQUENCE of the | |
2906 | appropriate length around. */ | |
2907 | if (len < SEQUENCE_RESULT_SIZE && (result = sequence_result[len]) != 0) | |
2908 | sequence_result[len] = 0; | |
2909 | else | |
2910 | { | |
2911 | /* Ensure that this rtl goes in saveable_obstack, since we may be | |
2912 | caching it. */ | |
d508ebba JW |
2913 | push_obstacks_nochange (); |
2914 | rtl_in_saveable_obstack (); | |
23b2ce53 | 2915 | result = gen_rtx (SEQUENCE, VOIDmode, rtvec_alloc (len)); |
d508ebba | 2916 | pop_obstacks (); |
23b2ce53 RS |
2917 | } |
2918 | ||
2919 | for (i = 0, tem = first_insn; tem; tem = NEXT_INSN (tem), i++) | |
2920 | XVECEXP (result, 0, i) = tem; | |
2921 | ||
2922 | return result; | |
2923 | } | |
2924 | \f | |
2925 | /* Set up regno_reg_rtx, reg_rtx_no and regno_pointer_flag | |
2926 | according to the chain of insns starting with FIRST. | |
2927 | ||
2928 | Also set cur_insn_uid to exceed the largest uid in that chain. | |
2929 | ||
2930 | This is used when an inline function's rtl is saved | |
2931 | and passed to rest_of_compilation later. */ | |
2932 | ||
2933 | static void restore_reg_data_1 (); | |
2934 | ||
2935 | void | |
2936 | restore_reg_data (first) | |
2937 | rtx first; | |
2938 | { | |
2939 | register rtx insn; | |
2940 | int i; | |
2941 | register int max_uid = 0; | |
2942 | ||
2943 | for (insn = first; insn; insn = NEXT_INSN (insn)) | |
2944 | { | |
2945 | if (INSN_UID (insn) >= max_uid) | |
2946 | max_uid = INSN_UID (insn); | |
2947 | ||
2948 | switch (GET_CODE (insn)) | |
2949 | { | |
2950 | case NOTE: | |
2951 | case CODE_LABEL: | |
2952 | case BARRIER: | |
2953 | break; | |
2954 | ||
2955 | case JUMP_INSN: | |
2956 | case CALL_INSN: | |
2957 | case INSN: | |
2958 | restore_reg_data_1 (PATTERN (insn)); | |
2959 | break; | |
2960 | } | |
2961 | } | |
2962 | ||
2963 | /* Don't duplicate the uids already in use. */ | |
2964 | cur_insn_uid = max_uid + 1; | |
2965 | ||
2966 | /* If any regs are missing, make them up. | |
2967 | ||
2968 | ??? word_mode is not necessarily the right mode. Most likely these REGs | |
2969 | are never used. At some point this should be checked. */ | |
2970 | ||
2971 | for (i = FIRST_PSEUDO_REGISTER; i < reg_rtx_no; i++) | |
2972 | if (regno_reg_rtx[i] == 0) | |
2973 | regno_reg_rtx[i] = gen_rtx (REG, word_mode, i); | |
2974 | } | |
2975 | ||
2976 | static void | |
2977 | restore_reg_data_1 (orig) | |
2978 | rtx orig; | |
2979 | { | |
2980 | register rtx x = orig; | |
2981 | register int i; | |
2982 | register enum rtx_code code; | |
2983 | register char *format_ptr; | |
2984 | ||
2985 | code = GET_CODE (x); | |
2986 | ||
2987 | switch (code) | |
2988 | { | |
2989 | case QUEUED: | |
2990 | case CONST_INT: | |
2991 | case CONST_DOUBLE: | |
2992 | case SYMBOL_REF: | |
2993 | case CODE_LABEL: | |
2994 | case PC: | |
2995 | case CC0: | |
2996 | case LABEL_REF: | |
2997 | return; | |
2998 | ||
2999 | case REG: | |
3000 | if (REGNO (x) >= FIRST_PSEUDO_REGISTER) | |
3001 | { | |
3002 | /* Make sure regno_pointer_flag and regno_reg_rtx are large | |
3003 | enough to have an element for this pseudo reg number. */ | |
3004 | if (REGNO (x) >= reg_rtx_no) | |
3005 | { | |
3006 | reg_rtx_no = REGNO (x); | |
3007 | ||
3008 | if (reg_rtx_no >= regno_pointer_flag_length) | |
3009 | { | |
3010 | int newlen = MAX (regno_pointer_flag_length * 2, | |
3011 | reg_rtx_no + 30); | |
3012 | rtx *new1; | |
3013 | char *new = (char *) oballoc (newlen); | |
3014 | bzero (new, newlen); | |
3015 | bcopy (regno_pointer_flag, new, regno_pointer_flag_length); | |
3016 | ||
3017 | new1 = (rtx *) oballoc (newlen * sizeof (rtx)); | |
3018 | bzero (new1, newlen * sizeof (rtx)); | |
3019 | bcopy (regno_reg_rtx, new1, regno_pointer_flag_length * sizeof (rtx)); | |
3020 | ||
3021 | regno_pointer_flag = new; | |
3022 | regno_reg_rtx = new1; | |
3023 | regno_pointer_flag_length = newlen; | |
3024 | } | |
3025 | reg_rtx_no ++; | |
3026 | } | |
3027 | regno_reg_rtx[REGNO (x)] = x; | |
3028 | } | |
3029 | return; | |
3030 | ||
3031 | case MEM: | |
3032 | if (GET_CODE (XEXP (x, 0)) == REG) | |
3033 | mark_reg_pointer (XEXP (x, 0)); | |
3034 | restore_reg_data_1 (XEXP (x, 0)); | |
3035 | return; | |
3036 | } | |
3037 | ||
3038 | /* Now scan the subexpressions recursively. */ | |
3039 | ||
3040 | format_ptr = GET_RTX_FORMAT (code); | |
3041 | ||
3042 | for (i = 0; i < GET_RTX_LENGTH (code); i++) | |
3043 | { | |
3044 | switch (*format_ptr++) | |
3045 | { | |
3046 | case 'e': | |
3047 | restore_reg_data_1 (XEXP (x, i)); | |
3048 | break; | |
3049 | ||
3050 | case 'E': | |
3051 | if (XVEC (x, i) != NULL) | |
3052 | { | |
3053 | register int j; | |
3054 | ||
3055 | for (j = 0; j < XVECLEN (x, i); j++) | |
3056 | restore_reg_data_1 (XVECEXP (x, i, j)); | |
3057 | } | |
3058 | break; | |
3059 | } | |
3060 | } | |
3061 | } | |
3062 | \f | |
3063 | /* Initialize data structures and variables in this file | |
3064 | before generating rtl for each function. */ | |
3065 | ||
3066 | void | |
3067 | init_emit () | |
3068 | { | |
3069 | int i; | |
3070 | ||
3071 | first_insn = NULL; | |
3072 | last_insn = NULL; | |
a25c7971 | 3073 | sequence_rtl_expr = NULL; |
23b2ce53 RS |
3074 | cur_insn_uid = 1; |
3075 | reg_rtx_no = LAST_VIRTUAL_REGISTER + 1; | |
3076 | last_linenum = 0; | |
3077 | last_filename = 0; | |
3078 | first_label_num = label_num; | |
3079 | last_label_num = 0; | |
24d11a9a | 3080 | sequence_stack = NULL; |
23b2ce53 RS |
3081 | |
3082 | /* Clear the start_sequence/gen_sequence cache. */ | |
3083 | sequence_element_free_list = 0; | |
3084 | for (i = 0; i < SEQUENCE_RESULT_SIZE; i++) | |
3085 | sequence_result[i] = 0; | |
3086 | ||
3087 | /* Init the tables that describe all the pseudo regs. */ | |
3088 | ||
3089 | regno_pointer_flag_length = LAST_VIRTUAL_REGISTER + 101; | |
3090 | ||
3091 | regno_pointer_flag | |
3092 | = (char *) oballoc (regno_pointer_flag_length); | |
3093 | bzero (regno_pointer_flag, regno_pointer_flag_length); | |
3094 | ||
3095 | regno_reg_rtx | |
3096 | = (rtx *) oballoc (regno_pointer_flag_length * sizeof (rtx)); | |
3097 | bzero (regno_reg_rtx, regno_pointer_flag_length * sizeof (rtx)); | |
3098 | ||
3099 | /* Put copies of all the virtual register rtx into regno_reg_rtx. */ | |
3100 | regno_reg_rtx[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx; | |
3101 | regno_reg_rtx[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx; | |
3102 | regno_reg_rtx[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx; | |
3103 | regno_reg_rtx[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx; | |
740ab4a2 RK |
3104 | |
3105 | /* Indicate that the virtual registers and stack locations are | |
3106 | all pointers. */ | |
3107 | REGNO_POINTER_FLAG (STACK_POINTER_REGNUM) = 1; | |
3108 | REGNO_POINTER_FLAG (FRAME_POINTER_REGNUM) = 1; | |
3109 | REGNO_POINTER_FLAG (ARG_POINTER_REGNUM) = 1; | |
3110 | ||
3111 | REGNO_POINTER_FLAG (VIRTUAL_INCOMING_ARGS_REGNUM) = 1; | |
3112 | REGNO_POINTER_FLAG (VIRTUAL_STACK_VARS_REGNUM) = 1; | |
3113 | REGNO_POINTER_FLAG (VIRTUAL_STACK_DYNAMIC_REGNUM) = 1; | |
3114 | REGNO_POINTER_FLAG (VIRTUAL_OUTGOING_ARGS_REGNUM) = 1; | |
5e82e7bd JVA |
3115 | |
3116 | #ifdef INIT_EXPANDERS | |
3117 | INIT_EXPANDERS; | |
3118 | #endif | |
23b2ce53 RS |
3119 | } |
3120 | ||
3121 | /* Create some permanent unique rtl objects shared between all functions. | |
3122 | LINE_NUMBERS is nonzero if line numbers are to be generated. */ | |
3123 | ||
3124 | void | |
3125 | init_emit_once (line_numbers) | |
3126 | int line_numbers; | |
3127 | { | |
3128 | int i; | |
3129 | enum machine_mode mode; | |
3130 | ||
3131 | no_line_numbers = ! line_numbers; | |
3132 | ||
3133 | sequence_stack = NULL; | |
3134 | ||
1d445e9e ILT |
3135 | /* Compute the word and byte modes. */ |
3136 | ||
3137 | byte_mode = VOIDmode; | |
3138 | word_mode = VOIDmode; | |
3139 | ||
3140 | for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode; | |
3141 | mode = GET_MODE_WIDER_MODE (mode)) | |
3142 | { | |
3143 | if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT | |
3144 | && byte_mode == VOIDmode) | |
3145 | byte_mode = mode; | |
3146 | ||
3147 | if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD | |
3148 | && word_mode == VOIDmode) | |
3149 | word_mode = mode; | |
3150 | } | |
3151 | ||
23b2ce53 RS |
3152 | /* Create the unique rtx's for certain rtx codes and operand values. */ |
3153 | ||
3154 | pc_rtx = gen_rtx (PC, VOIDmode); | |
3155 | cc0_rtx = gen_rtx (CC0, VOIDmode); | |
3156 | ||
3157 | /* Don't use gen_rtx here since gen_rtx in this case | |
3158 | tries to use these variables. */ | |
3159 | for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++) | |
3160 | { | |
3161 | const_int_rtx[i + MAX_SAVED_CONST_INT] = rtx_alloc (CONST_INT); | |
3162 | PUT_MODE (const_int_rtx[i + MAX_SAVED_CONST_INT], VOIDmode); | |
3163 | INTVAL (const_int_rtx[i + MAX_SAVED_CONST_INT]) = i; | |
3164 | } | |
3165 | ||
3166 | /* These four calls obtain some of the rtx expressions made above. */ | |
906c4e36 RK |
3167 | const0_rtx = GEN_INT (0); |
3168 | const1_rtx = GEN_INT (1); | |
3169 | const2_rtx = GEN_INT (2); | |
3170 | constm1_rtx = GEN_INT (-1); | |
23b2ce53 RS |
3171 | |
3172 | /* This will usually be one of the above constants, but may be a new rtx. */ | |
906c4e36 | 3173 | const_true_rtx = GEN_INT (STORE_FLAG_VALUE); |
23b2ce53 | 3174 | |
1632afca RS |
3175 | dconst0 = REAL_VALUE_ATOF ("0", DFmode); |
3176 | dconst1 = REAL_VALUE_ATOF ("1", DFmode); | |
3177 | dconst2 = REAL_VALUE_ATOF ("2", DFmode); | |
3178 | dconstm1 = REAL_VALUE_ATOF ("-1", DFmode); | |
23b2ce53 RS |
3179 | |
3180 | for (i = 0; i <= 2; i++) | |
3181 | { | |
3182 | for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode; | |
3183 | mode = GET_MODE_WIDER_MODE (mode)) | |
3184 | { | |
3185 | rtx tem = rtx_alloc (CONST_DOUBLE); | |
3186 | union real_extract u; | |
3187 | ||
3188 | bzero (&u, sizeof u); /* Zero any holes in a structure. */ | |
3189 | u.d = i == 0 ? dconst0 : i == 1 ? dconst1 : dconst2; | |
3190 | ||
3191 | bcopy (&u, &CONST_DOUBLE_LOW (tem), sizeof u); | |
3192 | CONST_DOUBLE_MEM (tem) = cc0_rtx; | |
3193 | PUT_MODE (tem, mode); | |
3194 | ||
3195 | const_tiny_rtx[i][(int) mode] = tem; | |
3196 | } | |
3197 | ||
906c4e36 | 3198 | const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i); |
23b2ce53 RS |
3199 | |
3200 | for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode; | |
3201 | mode = GET_MODE_WIDER_MODE (mode)) | |
906c4e36 | 3202 | const_tiny_rtx[i][(int) mode] = GEN_INT (i); |
33d3e559 RS |
3203 | |
3204 | for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT); | |
3205 | mode != VOIDmode; | |
3206 | mode = GET_MODE_WIDER_MODE (mode)) | |
3207 | const_tiny_rtx[i][(int) mode] = GEN_INT (i); | |
23b2ce53 RS |
3208 | } |
3209 | ||
dfa09e23 TW |
3210 | for (mode = GET_CLASS_NARROWEST_MODE (MODE_CC); mode != VOIDmode; |
3211 | mode = GET_MODE_WIDER_MODE (mode)) | |
3212 | const_tiny_rtx[0][(int) mode] = const0_rtx; | |
3213 | ||
23b2ce53 RS |
3214 | stack_pointer_rtx = gen_rtx (REG, Pmode, STACK_POINTER_REGNUM); |
3215 | frame_pointer_rtx = gen_rtx (REG, Pmode, FRAME_POINTER_REGNUM); | |
3216 | ||
ac6f08b0 DE |
3217 | if (HARD_FRAME_POINTER_REGNUM == FRAME_POINTER_REGNUM) |
3218 | hard_frame_pointer_rtx = frame_pointer_rtx; | |
3219 | else | |
3220 | hard_frame_pointer_rtx = gen_rtx (REG, Pmode, HARD_FRAME_POINTER_REGNUM); | |
3221 | ||
23b2ce53 RS |
3222 | if (FRAME_POINTER_REGNUM == ARG_POINTER_REGNUM) |
3223 | arg_pointer_rtx = frame_pointer_rtx; | |
ac6f08b0 DE |
3224 | else if (HARD_FRAME_POINTER_REGNUM == ARG_POINTER_REGNUM) |
3225 | arg_pointer_rtx = hard_frame_pointer_rtx; | |
23b2ce53 RS |
3226 | else if (STACK_POINTER_REGNUM == ARG_POINTER_REGNUM) |
3227 | arg_pointer_rtx = stack_pointer_rtx; | |
3228 | else | |
3229 | arg_pointer_rtx = gen_rtx (REG, Pmode, ARG_POINTER_REGNUM); | |
3230 | ||
3231 | /* Create the virtual registers. Do so here since the following objects | |
3232 | might reference them. */ | |
3233 | ||
3234 | virtual_incoming_args_rtx = gen_rtx (REG, Pmode, | |
3235 | VIRTUAL_INCOMING_ARGS_REGNUM); | |
3236 | virtual_stack_vars_rtx = gen_rtx (REG, Pmode, | |
3237 | VIRTUAL_STACK_VARS_REGNUM); | |
3238 | virtual_stack_dynamic_rtx = gen_rtx (REG, Pmode, | |
3239 | VIRTUAL_STACK_DYNAMIC_REGNUM); | |
3240 | virtual_outgoing_args_rtx = gen_rtx (REG, Pmode, | |
3241 | VIRTUAL_OUTGOING_ARGS_REGNUM); | |
3242 | ||
3243 | #ifdef STRUCT_VALUE | |
3244 | struct_value_rtx = STRUCT_VALUE; | |
3245 | #else | |
3246 | struct_value_rtx = gen_rtx (REG, Pmode, STRUCT_VALUE_REGNUM); | |
3247 | #endif | |
3248 | ||
3249 | #ifdef STRUCT_VALUE_INCOMING | |
3250 | struct_value_incoming_rtx = STRUCT_VALUE_INCOMING; | |
3251 | #else | |
3252 | #ifdef STRUCT_VALUE_INCOMING_REGNUM | |
3253 | struct_value_incoming_rtx | |
3254 | = gen_rtx (REG, Pmode, STRUCT_VALUE_INCOMING_REGNUM); | |
3255 | #else | |
3256 | struct_value_incoming_rtx = struct_value_rtx; | |
3257 | #endif | |
3258 | #endif | |
3259 | ||
3260 | #ifdef STATIC_CHAIN_REGNUM | |
3261 | static_chain_rtx = gen_rtx (REG, Pmode, STATIC_CHAIN_REGNUM); | |
3262 | ||
3263 | #ifdef STATIC_CHAIN_INCOMING_REGNUM | |
3264 | if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM) | |
3265 | static_chain_incoming_rtx = gen_rtx (REG, Pmode, STATIC_CHAIN_INCOMING_REGNUM); | |
3266 | else | |
3267 | #endif | |
3268 | static_chain_incoming_rtx = static_chain_rtx; | |
3269 | #endif | |
3270 | ||
3271 | #ifdef STATIC_CHAIN | |
3272 | static_chain_rtx = STATIC_CHAIN; | |
3273 | ||
3274 | #ifdef STATIC_CHAIN_INCOMING | |
3275 | static_chain_incoming_rtx = STATIC_CHAIN_INCOMING; | |
3276 | #else | |
3277 | static_chain_incoming_rtx = static_chain_rtx; | |
3278 | #endif | |
3279 | #endif | |
3280 | ||
3281 | #ifdef PIC_OFFSET_TABLE_REGNUM | |
3282 | pic_offset_table_rtx = gen_rtx (REG, Pmode, PIC_OFFSET_TABLE_REGNUM); | |
3283 | #endif | |
3284 | } |