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18ca7dab | 1 | /* Subroutines for manipulating rtx's in semantically interesting ways. |
18b9ca6f | 2 | Copyright (C) 1987, 1991, 1994 Free Software Foundation, Inc. |
18ca7dab RK |
3 | |
4 | This file is part of GNU CC. | |
5 | ||
6 | GNU CC is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 2, or (at your option) | |
9 | any later version. | |
10 | ||
11 | GNU CC is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with GNU CC; see the file COPYING. If not, write to | |
18 | the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ | |
19 | ||
20 | ||
21 | #include "config.h" | |
22 | #include "rtl.h" | |
23 | #include "tree.h" | |
24 | #include "flags.h" | |
25 | #include "expr.h" | |
26 | #include "hard-reg-set.h" | |
27 | #include "insn-config.h" | |
28 | #include "recog.h" | |
29 | #include "insn-flags.h" | |
30 | #include "insn-codes.h" | |
31 | ||
b1ec3c92 CH |
32 | /* Return an rtx for the sum of X and the integer C. |
33 | ||
8008b228 | 34 | This function should be used via the `plus_constant' macro. */ |
18ca7dab RK |
35 | |
36 | rtx | |
b1ec3c92 | 37 | plus_constant_wide (x, c) |
18ca7dab | 38 | register rtx x; |
b1ec3c92 | 39 | register HOST_WIDE_INT c; |
18ca7dab RK |
40 | { |
41 | register RTX_CODE code; | |
42 | register enum machine_mode mode; | |
43 | register rtx tem; | |
44 | int all_constant = 0; | |
45 | ||
46 | if (c == 0) | |
47 | return x; | |
48 | ||
49 | restart: | |
50 | ||
51 | code = GET_CODE (x); | |
52 | mode = GET_MODE (x); | |
53 | switch (code) | |
54 | { | |
55 | case CONST_INT: | |
b1ec3c92 | 56 | return GEN_INT (INTVAL (x) + c); |
18ca7dab RK |
57 | |
58 | case CONST_DOUBLE: | |
59 | { | |
b1ec3c92 CH |
60 | HOST_WIDE_INT l1 = CONST_DOUBLE_LOW (x); |
61 | HOST_WIDE_INT h1 = CONST_DOUBLE_HIGH (x); | |
62 | HOST_WIDE_INT l2 = c; | |
63 | HOST_WIDE_INT h2 = c < 0 ? ~0 : 0; | |
64 | HOST_WIDE_INT lv, hv; | |
18ca7dab RK |
65 | |
66 | add_double (l1, h1, l2, h2, &lv, &hv); | |
67 | ||
68 | return immed_double_const (lv, hv, VOIDmode); | |
69 | } | |
70 | ||
71 | case MEM: | |
72 | /* If this is a reference to the constant pool, try replacing it with | |
73 | a reference to a new constant. If the resulting address isn't | |
74 | valid, don't return it because we have no way to validize it. */ | |
75 | if (GET_CODE (XEXP (x, 0)) == SYMBOL_REF | |
76 | && CONSTANT_POOL_ADDRESS_P (XEXP (x, 0))) | |
77 | { | |
78 | tem | |
79 | = force_const_mem (GET_MODE (x), | |
80 | plus_constant (get_pool_constant (XEXP (x, 0)), | |
81 | c)); | |
82 | if (memory_address_p (GET_MODE (tem), XEXP (tem, 0))) | |
83 | return tem; | |
84 | } | |
85 | break; | |
86 | ||
87 | case CONST: | |
88 | /* If adding to something entirely constant, set a flag | |
89 | so that we can add a CONST around the result. */ | |
90 | x = XEXP (x, 0); | |
91 | all_constant = 1; | |
92 | goto restart; | |
93 | ||
94 | case SYMBOL_REF: | |
95 | case LABEL_REF: | |
96 | all_constant = 1; | |
97 | break; | |
98 | ||
99 | case PLUS: | |
100 | /* The interesting case is adding the integer to a sum. | |
101 | Look for constant term in the sum and combine | |
102 | with C. For an integer constant term, we make a combined | |
103 | integer. For a constant term that is not an explicit integer, | |
e5671f2b RK |
104 | we cannot really combine, but group them together anyway. |
105 | ||
106 | Use a recursive call in case the remaining operand is something | |
107 | that we handle specially, such as a SYMBOL_REF. */ | |
108 | ||
109 | if (GET_CODE (XEXP (x, 1)) == CONST_INT) | |
110 | return plus_constant (XEXP (x, 0), c + INTVAL (XEXP (x, 1))); | |
18ca7dab RK |
111 | else if (CONSTANT_P (XEXP (x, 0))) |
112 | return gen_rtx (PLUS, mode, | |
113 | plus_constant (XEXP (x, 0), c), | |
114 | XEXP (x, 1)); | |
115 | else if (CONSTANT_P (XEXP (x, 1))) | |
116 | return gen_rtx (PLUS, mode, | |
117 | XEXP (x, 0), | |
118 | plus_constant (XEXP (x, 1), c)); | |
119 | } | |
120 | ||
121 | if (c != 0) | |
b1ec3c92 | 122 | x = gen_rtx (PLUS, mode, x, GEN_INT (c)); |
18ca7dab RK |
123 | |
124 | if (GET_CODE (x) == SYMBOL_REF || GET_CODE (x) == LABEL_REF) | |
125 | return x; | |
126 | else if (all_constant) | |
127 | return gen_rtx (CONST, mode, x); | |
128 | else | |
129 | return x; | |
130 | } | |
131 | ||
b1ec3c92 CH |
132 | /* This is the same as `plus_constant', except that it handles LO_SUM. |
133 | ||
134 | This function should be used via the `plus_constant_for_output' macro. */ | |
18ca7dab RK |
135 | |
136 | rtx | |
b1ec3c92 | 137 | plus_constant_for_output_wide (x, c) |
18ca7dab | 138 | register rtx x; |
b1ec3c92 | 139 | register HOST_WIDE_INT c; |
18ca7dab RK |
140 | { |
141 | register RTX_CODE code = GET_CODE (x); | |
142 | register enum machine_mode mode = GET_MODE (x); | |
143 | int all_constant = 0; | |
144 | ||
145 | if (GET_CODE (x) == LO_SUM) | |
146 | return gen_rtx (LO_SUM, mode, XEXP (x, 0), | |
147 | plus_constant_for_output (XEXP (x, 1), c)); | |
148 | ||
149 | else | |
150 | return plus_constant (x, c); | |
151 | } | |
152 | \f | |
153 | /* If X is a sum, return a new sum like X but lacking any constant terms. | |
154 | Add all the removed constant terms into *CONSTPTR. | |
155 | X itself is not altered. The result != X if and only if | |
156 | it is not isomorphic to X. */ | |
157 | ||
158 | rtx | |
159 | eliminate_constant_term (x, constptr) | |
160 | rtx x; | |
161 | rtx *constptr; | |
162 | { | |
163 | register rtx x0, x1; | |
164 | rtx tem; | |
165 | ||
166 | if (GET_CODE (x) != PLUS) | |
167 | return x; | |
168 | ||
169 | /* First handle constants appearing at this level explicitly. */ | |
170 | if (GET_CODE (XEXP (x, 1)) == CONST_INT | |
171 | && 0 != (tem = simplify_binary_operation (PLUS, GET_MODE (x), *constptr, | |
172 | XEXP (x, 1))) | |
173 | && GET_CODE (tem) == CONST_INT) | |
174 | { | |
175 | *constptr = tem; | |
176 | return eliminate_constant_term (XEXP (x, 0), constptr); | |
177 | } | |
178 | ||
179 | tem = const0_rtx; | |
180 | x0 = eliminate_constant_term (XEXP (x, 0), &tem); | |
181 | x1 = eliminate_constant_term (XEXP (x, 1), &tem); | |
182 | if ((x1 != XEXP (x, 1) || x0 != XEXP (x, 0)) | |
183 | && 0 != (tem = simplify_binary_operation (PLUS, GET_MODE (x), | |
184 | *constptr, tem)) | |
185 | && GET_CODE (tem) == CONST_INT) | |
186 | { | |
187 | *constptr = tem; | |
188 | return gen_rtx (PLUS, GET_MODE (x), x0, x1); | |
189 | } | |
190 | ||
191 | return x; | |
192 | } | |
193 | ||
194 | /* Returns the insn that next references REG after INSN, or 0 | |
195 | if REG is clobbered before next referenced or we cannot find | |
196 | an insn that references REG in a straight-line piece of code. */ | |
197 | ||
198 | rtx | |
199 | find_next_ref (reg, insn) | |
200 | rtx reg; | |
201 | rtx insn; | |
202 | { | |
203 | rtx next; | |
204 | ||
205 | for (insn = NEXT_INSN (insn); insn; insn = next) | |
206 | { | |
207 | next = NEXT_INSN (insn); | |
208 | if (GET_CODE (insn) == NOTE) | |
209 | continue; | |
210 | if (GET_CODE (insn) == CODE_LABEL | |
211 | || GET_CODE (insn) == BARRIER) | |
212 | return 0; | |
213 | if (GET_CODE (insn) == INSN | |
214 | || GET_CODE (insn) == JUMP_INSN | |
215 | || GET_CODE (insn) == CALL_INSN) | |
216 | { | |
217 | if (reg_set_p (reg, insn)) | |
218 | return 0; | |
219 | if (reg_mentioned_p (reg, PATTERN (insn))) | |
220 | return insn; | |
221 | if (GET_CODE (insn) == JUMP_INSN) | |
222 | { | |
223 | if (simplejump_p (insn)) | |
224 | next = JUMP_LABEL (insn); | |
225 | else | |
226 | return 0; | |
227 | } | |
228 | if (GET_CODE (insn) == CALL_INSN | |
229 | && REGNO (reg) < FIRST_PSEUDO_REGISTER | |
230 | && call_used_regs[REGNO (reg)]) | |
231 | return 0; | |
232 | } | |
233 | else | |
234 | abort (); | |
235 | } | |
236 | return 0; | |
237 | } | |
238 | ||
239 | /* Return an rtx for the size in bytes of the value of EXP. */ | |
240 | ||
241 | rtx | |
242 | expr_size (exp) | |
243 | tree exp; | |
244 | { | |
99098c66 RK |
245 | tree size = size_in_bytes (TREE_TYPE (exp)); |
246 | ||
247 | if (TREE_CODE (size) != INTEGER_CST | |
248 | && contains_placeholder_p (size)) | |
249 | size = build (WITH_RECORD_EXPR, sizetype, size, exp); | |
250 | ||
251 | return expand_expr (size, NULL_RTX, TYPE_MODE (sizetype), 0); | |
18ca7dab RK |
252 | } |
253 | \f | |
254 | /* Return a copy of X in which all memory references | |
255 | and all constants that involve symbol refs | |
256 | have been replaced with new temporary registers. | |
257 | Also emit code to load the memory locations and constants | |
258 | into those registers. | |
259 | ||
260 | If X contains no such constants or memory references, | |
261 | X itself (not a copy) is returned. | |
262 | ||
263 | If a constant is found in the address that is not a legitimate constant | |
264 | in an insn, it is left alone in the hope that it might be valid in the | |
265 | address. | |
266 | ||
267 | X may contain no arithmetic except addition, subtraction and multiplication. | |
268 | Values returned by expand_expr with 1 for sum_ok fit this constraint. */ | |
269 | ||
270 | static rtx | |
271 | break_out_memory_refs (x) | |
272 | register rtx x; | |
273 | { | |
274 | if (GET_CODE (x) == MEM | |
cabeca29 | 275 | || (CONSTANT_P (x) && CONSTANT_ADDRESS_P (x) |
18ca7dab | 276 | && GET_MODE (x) != VOIDmode)) |
2cca6e3f | 277 | x = force_reg (GET_MODE (x), x); |
18ca7dab RK |
278 | else if (GET_CODE (x) == PLUS || GET_CODE (x) == MINUS |
279 | || GET_CODE (x) == MULT) | |
280 | { | |
281 | register rtx op0 = break_out_memory_refs (XEXP (x, 0)); | |
282 | register rtx op1 = break_out_memory_refs (XEXP (x, 1)); | |
2cca6e3f | 283 | |
18ca7dab RK |
284 | if (op0 != XEXP (x, 0) || op1 != XEXP (x, 1)) |
285 | x = gen_rtx (GET_CODE (x), Pmode, op0, op1); | |
286 | } | |
2cca6e3f | 287 | |
18ca7dab RK |
288 | return x; |
289 | } | |
290 | ||
291 | /* Given a memory address or facsimile X, construct a new address, | |
292 | currently equivalent, that is stable: future stores won't change it. | |
293 | ||
294 | X must be composed of constants, register and memory references | |
295 | combined with addition, subtraction and multiplication: | |
296 | in other words, just what you can get from expand_expr if sum_ok is 1. | |
297 | ||
298 | Works by making copies of all regs and memory locations used | |
299 | by X and combining them the same way X does. | |
300 | You could also stabilize the reference to this address | |
301 | by copying the address to a register with copy_to_reg; | |
302 | but then you wouldn't get indexed addressing in the reference. */ | |
303 | ||
304 | rtx | |
305 | copy_all_regs (x) | |
306 | register rtx x; | |
307 | { | |
308 | if (GET_CODE (x) == REG) | |
309 | { | |
11c50c5e DE |
310 | if (REGNO (x) != FRAME_POINTER_REGNUM |
311 | #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM | |
312 | && REGNO (x) != HARD_FRAME_POINTER_REGNUM | |
313 | #endif | |
314 | ) | |
18ca7dab RK |
315 | x = copy_to_reg (x); |
316 | } | |
317 | else if (GET_CODE (x) == MEM) | |
318 | x = copy_to_reg (x); | |
319 | else if (GET_CODE (x) == PLUS || GET_CODE (x) == MINUS | |
320 | || GET_CODE (x) == MULT) | |
321 | { | |
322 | register rtx op0 = copy_all_regs (XEXP (x, 0)); | |
323 | register rtx op1 = copy_all_regs (XEXP (x, 1)); | |
324 | if (op0 != XEXP (x, 0) || op1 != XEXP (x, 1)) | |
325 | x = gen_rtx (GET_CODE (x), Pmode, op0, op1); | |
326 | } | |
327 | return x; | |
328 | } | |
329 | \f | |
330 | /* Return something equivalent to X but valid as a memory address | |
331 | for something of mode MODE. When X is not itself valid, this | |
332 | works by copying X or subexpressions of it into registers. */ | |
333 | ||
334 | rtx | |
335 | memory_address (mode, x) | |
336 | enum machine_mode mode; | |
337 | register rtx x; | |
338 | { | |
18b9ca6f | 339 | register rtx oldx = x; |
18ca7dab RK |
340 | |
341 | /* By passing constant addresses thru registers | |
342 | we get a chance to cse them. */ | |
cabeca29 | 343 | if (! cse_not_expected && CONSTANT_P (x) && CONSTANT_ADDRESS_P (x)) |
18b9ca6f | 344 | x = force_reg (Pmode, x); |
18ca7dab RK |
345 | |
346 | /* Accept a QUEUED that refers to a REG | |
347 | even though that isn't a valid address. | |
348 | On attempting to put this in an insn we will call protect_from_queue | |
349 | which will turn it into a REG, which is valid. */ | |
18b9ca6f | 350 | else if (GET_CODE (x) == QUEUED |
18ca7dab | 351 | && GET_CODE (QUEUED_VAR (x)) == REG) |
18b9ca6f | 352 | ; |
18ca7dab RK |
353 | |
354 | /* We get better cse by rejecting indirect addressing at this stage. | |
355 | Let the combiner create indirect addresses where appropriate. | |
356 | For now, generate the code so that the subexpressions useful to share | |
357 | are visible. But not if cse won't be done! */ | |
18b9ca6f | 358 | else |
18ca7dab | 359 | { |
18b9ca6f RK |
360 | if (! cse_not_expected && GET_CODE (x) != REG) |
361 | x = break_out_memory_refs (x); | |
362 | ||
363 | /* At this point, any valid address is accepted. */ | |
364 | GO_IF_LEGITIMATE_ADDRESS (mode, x, win); | |
365 | ||
366 | /* If it was valid before but breaking out memory refs invalidated it, | |
367 | use it the old way. */ | |
368 | if (memory_address_p (mode, oldx)) | |
369 | goto win2; | |
370 | ||
371 | /* Perform machine-dependent transformations on X | |
372 | in certain cases. This is not necessary since the code | |
373 | below can handle all possible cases, but machine-dependent | |
374 | transformations can make better code. */ | |
375 | LEGITIMIZE_ADDRESS (x, oldx, mode, win); | |
376 | ||
377 | /* PLUS and MULT can appear in special ways | |
378 | as the result of attempts to make an address usable for indexing. | |
379 | Usually they are dealt with by calling force_operand, below. | |
380 | But a sum containing constant terms is special | |
381 | if removing them makes the sum a valid address: | |
382 | then we generate that address in a register | |
383 | and index off of it. We do this because it often makes | |
384 | shorter code, and because the addresses thus generated | |
385 | in registers often become common subexpressions. */ | |
386 | if (GET_CODE (x) == PLUS) | |
387 | { | |
388 | rtx constant_term = const0_rtx; | |
389 | rtx y = eliminate_constant_term (x, &constant_term); | |
390 | if (constant_term == const0_rtx | |
391 | || ! memory_address_p (mode, y)) | |
392 | x = force_operand (x, NULL_RTX); | |
393 | else | |
394 | { | |
395 | y = gen_rtx (PLUS, GET_MODE (x), copy_to_reg (y), constant_term); | |
396 | if (! memory_address_p (mode, y)) | |
397 | x = force_operand (x, NULL_RTX); | |
398 | else | |
399 | x = y; | |
400 | } | |
401 | } | |
18ca7dab | 402 | |
18b9ca6f RK |
403 | if (GET_CODE (x) == MULT || GET_CODE (x) == MINUS) |
404 | x = force_operand (x, NULL_RTX); | |
18ca7dab | 405 | |
18b9ca6f RK |
406 | /* If we have a register that's an invalid address, |
407 | it must be a hard reg of the wrong class. Copy it to a pseudo. */ | |
408 | else if (GET_CODE (x) == REG) | |
409 | x = copy_to_reg (x); | |
410 | ||
411 | /* Last resort: copy the value to a register, since | |
412 | the register is a valid address. */ | |
413 | else | |
414 | x = force_reg (Pmode, x); | |
415 | ||
416 | goto done; | |
18ca7dab | 417 | |
c02a7fbb RK |
418 | win2: |
419 | x = oldx; | |
420 | win: | |
421 | if (flag_force_addr && ! cse_not_expected && GET_CODE (x) != REG | |
422 | /* Don't copy an addr via a reg if it is one of our stack slots. */ | |
423 | && ! (GET_CODE (x) == PLUS | |
424 | && (XEXP (x, 0) == virtual_stack_vars_rtx | |
425 | || XEXP (x, 0) == virtual_incoming_args_rtx))) | |
426 | { | |
427 | if (general_operand (x, Pmode)) | |
428 | x = force_reg (Pmode, x); | |
429 | else | |
430 | x = force_operand (x, NULL_RTX); | |
431 | } | |
18ca7dab | 432 | } |
18b9ca6f RK |
433 | |
434 | done: | |
435 | ||
2cca6e3f RK |
436 | /* If we didn't change the address, we are done. Otherwise, mark |
437 | a reg as a pointer if we have REG or REG + CONST_INT. */ | |
438 | if (oldx == x) | |
439 | return x; | |
440 | else if (GET_CODE (x) == REG) | |
441 | mark_reg_pointer (x); | |
442 | else if (GET_CODE (x) == PLUS | |
443 | && GET_CODE (XEXP (x, 0)) == REG | |
444 | && GET_CODE (XEXP (x, 1)) == CONST_INT) | |
445 | mark_reg_pointer (XEXP (x, 0)); | |
446 | ||
18b9ca6f RK |
447 | /* OLDX may have been the address on a temporary. Update the address |
448 | to indicate that X is now used. */ | |
449 | update_temp_slot_address (oldx, x); | |
450 | ||
18ca7dab RK |
451 | return x; |
452 | } | |
453 | ||
454 | /* Like `memory_address' but pretend `flag_force_addr' is 0. */ | |
455 | ||
456 | rtx | |
457 | memory_address_noforce (mode, x) | |
458 | enum machine_mode mode; | |
459 | rtx x; | |
460 | { | |
461 | int ambient_force_addr = flag_force_addr; | |
462 | rtx val; | |
463 | ||
464 | flag_force_addr = 0; | |
465 | val = memory_address (mode, x); | |
466 | flag_force_addr = ambient_force_addr; | |
467 | return val; | |
468 | } | |
469 | ||
470 | /* Convert a mem ref into one with a valid memory address. | |
471 | Pass through anything else unchanged. */ | |
472 | ||
473 | rtx | |
474 | validize_mem (ref) | |
475 | rtx ref; | |
476 | { | |
477 | if (GET_CODE (ref) != MEM) | |
478 | return ref; | |
479 | if (memory_address_p (GET_MODE (ref), XEXP (ref, 0))) | |
480 | return ref; | |
481 | /* Don't alter REF itself, since that is probably a stack slot. */ | |
482 | return change_address (ref, GET_MODE (ref), XEXP (ref, 0)); | |
483 | } | |
484 | \f | |
485 | /* Return a modified copy of X with its memory address copied | |
486 | into a temporary register to protect it from side effects. | |
487 | If X is not a MEM, it is returned unchanged (and not copied). | |
488 | Perhaps even if it is a MEM, if there is no need to change it. */ | |
489 | ||
490 | rtx | |
491 | stabilize (x) | |
492 | rtx x; | |
493 | { | |
494 | register rtx addr; | |
495 | if (GET_CODE (x) != MEM) | |
496 | return x; | |
497 | addr = XEXP (x, 0); | |
498 | if (rtx_unstable_p (addr)) | |
499 | { | |
500 | rtx temp = copy_all_regs (addr); | |
501 | rtx mem; | |
502 | if (GET_CODE (temp) != REG) | |
503 | temp = copy_to_reg (temp); | |
504 | mem = gen_rtx (MEM, GET_MODE (x), temp); | |
505 | ||
506 | /* Mark returned memref with in_struct if it's in an array or | |
507 | structure. Copy const and volatile from original memref. */ | |
508 | ||
509 | MEM_IN_STRUCT_P (mem) = MEM_IN_STRUCT_P (x) || GET_CODE (addr) == PLUS; | |
510 | RTX_UNCHANGING_P (mem) = RTX_UNCHANGING_P (x); | |
511 | MEM_VOLATILE_P (mem) = MEM_VOLATILE_P (x); | |
512 | return mem; | |
513 | } | |
514 | return x; | |
515 | } | |
516 | \f | |
517 | /* Copy the value or contents of X to a new temp reg and return that reg. */ | |
518 | ||
519 | rtx | |
520 | copy_to_reg (x) | |
521 | rtx x; | |
522 | { | |
523 | register rtx temp = gen_reg_rtx (GET_MODE (x)); | |
524 | ||
525 | /* If not an operand, must be an address with PLUS and MULT so | |
526 | do the computation. */ | |
527 | if (! general_operand (x, VOIDmode)) | |
528 | x = force_operand (x, temp); | |
529 | ||
530 | if (x != temp) | |
531 | emit_move_insn (temp, x); | |
532 | ||
533 | return temp; | |
534 | } | |
535 | ||
536 | /* Like copy_to_reg but always give the new register mode Pmode | |
537 | in case X is a constant. */ | |
538 | ||
539 | rtx | |
540 | copy_addr_to_reg (x) | |
541 | rtx x; | |
542 | { | |
543 | return copy_to_mode_reg (Pmode, x); | |
544 | } | |
545 | ||
546 | /* Like copy_to_reg but always give the new register mode MODE | |
547 | in case X is a constant. */ | |
548 | ||
549 | rtx | |
550 | copy_to_mode_reg (mode, x) | |
551 | enum machine_mode mode; | |
552 | rtx x; | |
553 | { | |
554 | register rtx temp = gen_reg_rtx (mode); | |
555 | ||
556 | /* If not an operand, must be an address with PLUS and MULT so | |
557 | do the computation. */ | |
558 | if (! general_operand (x, VOIDmode)) | |
559 | x = force_operand (x, temp); | |
560 | ||
561 | if (GET_MODE (x) != mode && GET_MODE (x) != VOIDmode) | |
562 | abort (); | |
563 | if (x != temp) | |
564 | emit_move_insn (temp, x); | |
565 | return temp; | |
566 | } | |
567 | ||
568 | /* Load X into a register if it is not already one. | |
569 | Use mode MODE for the register. | |
570 | X should be valid for mode MODE, but it may be a constant which | |
571 | is valid for all integer modes; that's why caller must specify MODE. | |
572 | ||
573 | The caller must not alter the value in the register we return, | |
574 | since we mark it as a "constant" register. */ | |
575 | ||
576 | rtx | |
577 | force_reg (mode, x) | |
578 | enum machine_mode mode; | |
579 | rtx x; | |
580 | { | |
581 | register rtx temp, insn; | |
582 | ||
583 | if (GET_CODE (x) == REG) | |
584 | return x; | |
585 | temp = gen_reg_rtx (mode); | |
586 | insn = emit_move_insn (temp, x); | |
587 | /* Let optimizers know that TEMP's value never changes | |
588 | and that X can be substituted for it. */ | |
589 | if (CONSTANT_P (x)) | |
590 | { | |
b1ec3c92 | 591 | rtx note = find_reg_note (insn, REG_EQUAL, NULL_RTX); |
18ca7dab RK |
592 | |
593 | if (note) | |
594 | XEXP (note, 0) = x; | |
595 | else | |
596 | REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_EQUAL, x, REG_NOTES (insn)); | |
597 | } | |
598 | return temp; | |
599 | } | |
600 | ||
601 | /* If X is a memory ref, copy its contents to a new temp reg and return | |
602 | that reg. Otherwise, return X. */ | |
603 | ||
604 | rtx | |
605 | force_not_mem (x) | |
606 | rtx x; | |
607 | { | |
608 | register rtx temp; | |
609 | if (GET_CODE (x) != MEM || GET_MODE (x) == BLKmode) | |
610 | return x; | |
611 | temp = gen_reg_rtx (GET_MODE (x)); | |
612 | emit_move_insn (temp, x); | |
613 | return temp; | |
614 | } | |
615 | ||
616 | /* Copy X to TARGET (if it's nonzero and a reg) | |
617 | or to a new temp reg and return that reg. | |
618 | MODE is the mode to use for X in case it is a constant. */ | |
619 | ||
620 | rtx | |
621 | copy_to_suggested_reg (x, target, mode) | |
622 | rtx x, target; | |
623 | enum machine_mode mode; | |
624 | { | |
625 | register rtx temp; | |
626 | ||
627 | if (target && GET_CODE (target) == REG) | |
628 | temp = target; | |
629 | else | |
630 | temp = gen_reg_rtx (mode); | |
631 | ||
632 | emit_move_insn (temp, x); | |
633 | return temp; | |
634 | } | |
635 | \f | |
9ff65789 RK |
636 | /* Return the mode to use to store a scalar of TYPE and MODE. |
637 | PUNSIGNEDP points to the signedness of the type and may be adjusted | |
638 | to show what signedness to use on extension operations. | |
639 | ||
640 | FOR_CALL is non-zero if this call is promoting args for a call. */ | |
641 | ||
642 | enum machine_mode | |
643 | promote_mode (type, mode, punsignedp, for_call) | |
644 | tree type; | |
645 | enum machine_mode mode; | |
646 | int *punsignedp; | |
647 | int for_call; | |
648 | { | |
649 | enum tree_code code = TREE_CODE (type); | |
650 | int unsignedp = *punsignedp; | |
651 | ||
652 | #ifdef PROMOTE_FOR_CALL_ONLY | |
653 | if (! for_call) | |
654 | return mode; | |
655 | #endif | |
656 | ||
657 | switch (code) | |
658 | { | |
659 | #ifdef PROMOTE_MODE | |
660 | case INTEGER_TYPE: case ENUMERAL_TYPE: case BOOLEAN_TYPE: | |
661 | case CHAR_TYPE: case REAL_TYPE: case OFFSET_TYPE: | |
662 | PROMOTE_MODE (mode, unsignedp, type); | |
663 | break; | |
664 | #endif | |
665 | ||
666 | case POINTER_TYPE: | |
667 | break; | |
668 | } | |
669 | ||
670 | *punsignedp = unsignedp; | |
671 | return mode; | |
672 | } | |
673 | \f | |
18ca7dab RK |
674 | /* Adjust the stack pointer by ADJUST (an rtx for a number of bytes). |
675 | This pops when ADJUST is positive. ADJUST need not be constant. */ | |
676 | ||
677 | void | |
678 | adjust_stack (adjust) | |
679 | rtx adjust; | |
680 | { | |
681 | rtx temp; | |
682 | adjust = protect_from_queue (adjust, 0); | |
683 | ||
684 | if (adjust == const0_rtx) | |
685 | return; | |
686 | ||
687 | temp = expand_binop (Pmode, | |
688 | #ifdef STACK_GROWS_DOWNWARD | |
689 | add_optab, | |
690 | #else | |
691 | sub_optab, | |
692 | #endif | |
693 | stack_pointer_rtx, adjust, stack_pointer_rtx, 0, | |
694 | OPTAB_LIB_WIDEN); | |
695 | ||
696 | if (temp != stack_pointer_rtx) | |
697 | emit_move_insn (stack_pointer_rtx, temp); | |
698 | } | |
699 | ||
700 | /* Adjust the stack pointer by minus ADJUST (an rtx for a number of bytes). | |
701 | This pushes when ADJUST is positive. ADJUST need not be constant. */ | |
702 | ||
703 | void | |
704 | anti_adjust_stack (adjust) | |
705 | rtx adjust; | |
706 | { | |
707 | rtx temp; | |
708 | adjust = protect_from_queue (adjust, 0); | |
709 | ||
710 | if (adjust == const0_rtx) | |
711 | return; | |
712 | ||
713 | temp = expand_binop (Pmode, | |
714 | #ifdef STACK_GROWS_DOWNWARD | |
715 | sub_optab, | |
716 | #else | |
717 | add_optab, | |
718 | #endif | |
719 | stack_pointer_rtx, adjust, stack_pointer_rtx, 0, | |
720 | OPTAB_LIB_WIDEN); | |
721 | ||
722 | if (temp != stack_pointer_rtx) | |
723 | emit_move_insn (stack_pointer_rtx, temp); | |
724 | } | |
725 | ||
726 | /* Round the size of a block to be pushed up to the boundary required | |
727 | by this machine. SIZE is the desired size, which need not be constant. */ | |
728 | ||
729 | rtx | |
730 | round_push (size) | |
731 | rtx size; | |
732 | { | |
733 | #ifdef STACK_BOUNDARY | |
734 | int align = STACK_BOUNDARY / BITS_PER_UNIT; | |
735 | if (align == 1) | |
736 | return size; | |
737 | if (GET_CODE (size) == CONST_INT) | |
738 | { | |
739 | int new = (INTVAL (size) + align - 1) / align * align; | |
740 | if (INTVAL (size) != new) | |
b1ec3c92 | 741 | size = GEN_INT (new); |
18ca7dab RK |
742 | } |
743 | else | |
744 | { | |
b1ec3c92 CH |
745 | size = expand_divmod (0, CEIL_DIV_EXPR, Pmode, size, GEN_INT (align), |
746 | NULL_RTX, 1); | |
747 | size = expand_mult (Pmode, size, GEN_INT (align), NULL_RTX, 1); | |
18ca7dab RK |
748 | } |
749 | #endif /* STACK_BOUNDARY */ | |
750 | return size; | |
751 | } | |
752 | \f | |
59257ff7 RK |
753 | /* Save the stack pointer for the purpose in SAVE_LEVEL. PSAVE is a pointer |
754 | to a previously-created save area. If no save area has been allocated, | |
755 | this function will allocate one. If a save area is specified, it | |
756 | must be of the proper mode. | |
757 | ||
758 | The insns are emitted after insn AFTER, if nonzero, otherwise the insns | |
759 | are emitted at the current position. */ | |
760 | ||
761 | void | |
762 | emit_stack_save (save_level, psave, after) | |
763 | enum save_level save_level; | |
764 | rtx *psave; | |
765 | rtx after; | |
766 | { | |
767 | rtx sa = *psave; | |
768 | /* The default is that we use a move insn and save in a Pmode object. */ | |
769 | rtx (*fcn) () = gen_move_insn; | |
770 | enum machine_mode mode = Pmode; | |
771 | ||
772 | /* See if this machine has anything special to do for this kind of save. */ | |
773 | switch (save_level) | |
774 | { | |
775 | #ifdef HAVE_save_stack_block | |
776 | case SAVE_BLOCK: | |
777 | if (HAVE_save_stack_block) | |
778 | { | |
779 | fcn = gen_save_stack_block; | |
780 | mode = insn_operand_mode[CODE_FOR_save_stack_block][0]; | |
781 | } | |
782 | break; | |
783 | #endif | |
784 | #ifdef HAVE_save_stack_function | |
785 | case SAVE_FUNCTION: | |
786 | if (HAVE_save_stack_function) | |
787 | { | |
788 | fcn = gen_save_stack_function; | |
789 | mode = insn_operand_mode[CODE_FOR_save_stack_function][0]; | |
790 | } | |
791 | break; | |
792 | #endif | |
793 | #ifdef HAVE_save_stack_nonlocal | |
794 | case SAVE_NONLOCAL: | |
795 | if (HAVE_save_stack_nonlocal) | |
796 | { | |
797 | fcn = gen_save_stack_nonlocal; | |
0d69ab6f | 798 | mode = insn_operand_mode[(int) CODE_FOR_save_stack_nonlocal][0]; |
59257ff7 RK |
799 | } |
800 | break; | |
801 | #endif | |
802 | } | |
803 | ||
804 | /* If there is no save area and we have to allocate one, do so. Otherwise | |
805 | verify the save area is the proper mode. */ | |
806 | ||
807 | if (sa == 0) | |
808 | { | |
809 | if (mode != VOIDmode) | |
810 | { | |
811 | if (save_level == SAVE_NONLOCAL) | |
812 | *psave = sa = assign_stack_local (mode, GET_MODE_SIZE (mode), 0); | |
813 | else | |
814 | *psave = sa = gen_reg_rtx (mode); | |
815 | } | |
816 | } | |
817 | else | |
818 | { | |
819 | if (mode == VOIDmode || GET_MODE (sa) != mode) | |
820 | abort (); | |
821 | } | |
822 | ||
823 | if (after) | |
700f6f98 RK |
824 | { |
825 | rtx seq; | |
826 | ||
827 | start_sequence (); | |
5460015d JW |
828 | /* We must validize inside the sequence, to ensure that any instructions |
829 | created by the validize call also get moved to the right place. */ | |
830 | if (sa != 0) | |
831 | sa = validize_mem (sa); | |
d072107f | 832 | emit_insn (fcn (sa, stack_pointer_rtx)); |
700f6f98 RK |
833 | seq = gen_sequence (); |
834 | end_sequence (); | |
835 | emit_insn_after (seq, after); | |
836 | } | |
59257ff7 | 837 | else |
5460015d JW |
838 | { |
839 | if (sa != 0) | |
840 | sa = validize_mem (sa); | |
841 | emit_insn (fcn (sa, stack_pointer_rtx)); | |
842 | } | |
59257ff7 RK |
843 | } |
844 | ||
845 | /* Restore the stack pointer for the purpose in SAVE_LEVEL. SA is the save | |
846 | area made by emit_stack_save. If it is zero, we have nothing to do. | |
847 | ||
848 | Put any emitted insns after insn AFTER, if nonzero, otherwise at | |
849 | current position. */ | |
850 | ||
851 | void | |
852 | emit_stack_restore (save_level, sa, after) | |
853 | enum save_level save_level; | |
854 | rtx after; | |
855 | rtx sa; | |
856 | { | |
857 | /* The default is that we use a move insn. */ | |
858 | rtx (*fcn) () = gen_move_insn; | |
859 | ||
860 | /* See if this machine has anything special to do for this kind of save. */ | |
861 | switch (save_level) | |
862 | { | |
863 | #ifdef HAVE_restore_stack_block | |
864 | case SAVE_BLOCK: | |
865 | if (HAVE_restore_stack_block) | |
866 | fcn = gen_restore_stack_block; | |
867 | break; | |
868 | #endif | |
869 | #ifdef HAVE_restore_stack_function | |
870 | case SAVE_FUNCTION: | |
871 | if (HAVE_restore_stack_function) | |
872 | fcn = gen_restore_stack_function; | |
873 | break; | |
874 | #endif | |
875 | #ifdef HAVE_restore_stack_nonlocal | |
876 | ||
877 | case SAVE_NONLOCAL: | |
878 | if (HAVE_restore_stack_nonlocal) | |
879 | fcn = gen_restore_stack_nonlocal; | |
880 | break; | |
881 | #endif | |
882 | } | |
883 | ||
d072107f RK |
884 | if (sa != 0) |
885 | sa = validize_mem (sa); | |
886 | ||
59257ff7 | 887 | if (after) |
700f6f98 RK |
888 | { |
889 | rtx seq; | |
890 | ||
891 | start_sequence (); | |
d072107f | 892 | emit_insn (fcn (stack_pointer_rtx, sa)); |
700f6f98 RK |
893 | seq = gen_sequence (); |
894 | end_sequence (); | |
895 | emit_insn_after (seq, after); | |
896 | } | |
59257ff7 | 897 | else |
d072107f | 898 | emit_insn (fcn (stack_pointer_rtx, sa)); |
59257ff7 RK |
899 | } |
900 | \f | |
18ca7dab RK |
901 | /* Return an rtx representing the address of an area of memory dynamically |
902 | pushed on the stack. This region of memory is always aligned to | |
903 | a multiple of BIGGEST_ALIGNMENT. | |
904 | ||
905 | Any required stack pointer alignment is preserved. | |
906 | ||
907 | SIZE is an rtx representing the size of the area. | |
091ad0b9 RK |
908 | TARGET is a place in which the address can be placed. |
909 | ||
910 | KNOWN_ALIGN is the alignment (in bits) that we know SIZE has. */ | |
18ca7dab RK |
911 | |
912 | rtx | |
091ad0b9 | 913 | allocate_dynamic_stack_space (size, target, known_align) |
18ca7dab RK |
914 | rtx size; |
915 | rtx target; | |
091ad0b9 | 916 | int known_align; |
18ca7dab RK |
917 | { |
918 | /* Ensure the size is in the proper mode. */ | |
919 | if (GET_MODE (size) != VOIDmode && GET_MODE (size) != Pmode) | |
920 | size = convert_to_mode (Pmode, size, 1); | |
921 | ||
922 | /* We will need to ensure that the address we return is aligned to | |
923 | BIGGEST_ALIGNMENT. If STACK_DYNAMIC_OFFSET is defined, we don't | |
924 | always know its final value at this point in the compilation (it | |
925 | might depend on the size of the outgoing parameter lists, for | |
926 | example), so we must align the value to be returned in that case. | |
927 | (Note that STACK_DYNAMIC_OFFSET will have a default non-zero value if | |
928 | STACK_POINTER_OFFSET or ACCUMULATE_OUTGOING_ARGS are defined). | |
929 | We must also do an alignment operation on the returned value if | |
930 | the stack pointer alignment is less strict that BIGGEST_ALIGNMENT. | |
931 | ||
932 | If we have to align, we must leave space in SIZE for the hole | |
933 | that might result from the alignment operation. */ | |
934 | ||
935 | #if defined (STACK_DYNAMIC_OFFSET) || defined(STACK_POINTER_OFFSET) || defined (ALLOCATE_OUTGOING_ARGS) | |
936 | #define MUST_ALIGN | |
937 | #endif | |
938 | ||
939 | #if ! defined (MUST_ALIGN) && (!defined(STACK_BOUNDARY) || STACK_BOUNDARY < BIGGEST_ALIGNMENT) | |
940 | #define MUST_ALIGN | |
941 | #endif | |
942 | ||
943 | #ifdef MUST_ALIGN | |
944 | ||
86b25e81 RS |
945 | #if 0 /* It turns out we must always make extra space, if MUST_ALIGN |
946 | because we must always round the address up at the end, | |
947 | because we don't know whether the dynamic offset | |
948 | will mess up the desired alignment. */ | |
1d9d04f8 RS |
949 | /* If we have to round the address up regardless of known_align, |
950 | make extra space regardless, also. */ | |
3b998c11 | 951 | if (known_align % BIGGEST_ALIGNMENT != 0) |
1d9d04f8 | 952 | #endif |
3b998c11 RK |
953 | { |
954 | if (GET_CODE (size) == CONST_INT) | |
b1ec3c92 CH |
955 | size = GEN_INT (INTVAL (size) |
956 | + (BIGGEST_ALIGNMENT / BITS_PER_UNIT - 1)); | |
3b998c11 RK |
957 | else |
958 | size = expand_binop (Pmode, add_optab, size, | |
b1ec3c92 CH |
959 | GEN_INT (BIGGEST_ALIGNMENT / BITS_PER_UNIT - 1), |
960 | NULL_RTX, 1, OPTAB_LIB_WIDEN); | |
3b998c11 | 961 | } |
1d9d04f8 | 962 | |
18ca7dab RK |
963 | #endif |
964 | ||
965 | #ifdef SETJMP_VIA_SAVE_AREA | |
966 | /* If setjmp restores regs from a save area in the stack frame, | |
967 | avoid clobbering the reg save area. Note that the offset of | |
968 | virtual_incoming_args_rtx includes the preallocated stack args space. | |
969 | It would be no problem to clobber that, but it's on the wrong side | |
970 | of the old save area. */ | |
971 | { | |
972 | rtx dynamic_offset | |
973 | = expand_binop (Pmode, sub_optab, virtual_stack_dynamic_rtx, | |
b1ec3c92 | 974 | stack_pointer_rtx, NULL_RTX, 1, OPTAB_LIB_WIDEN); |
18ca7dab | 975 | size = expand_binop (Pmode, add_optab, size, dynamic_offset, |
b1ec3c92 | 976 | NULL_RTX, 1, OPTAB_LIB_WIDEN); |
18ca7dab RK |
977 | } |
978 | #endif /* SETJMP_VIA_SAVE_AREA */ | |
979 | ||
980 | /* Round the size to a multiple of the required stack alignment. | |
981 | Since the stack if presumed to be rounded before this allocation, | |
982 | this will maintain the required alignment. | |
983 | ||
984 | If the stack grows downward, we could save an insn by subtracting | |
985 | SIZE from the stack pointer and then aligning the stack pointer. | |
986 | The problem with this is that the stack pointer may be unaligned | |
987 | between the execution of the subtraction and alignment insns and | |
988 | some machines do not allow this. Even on those that do, some | |
989 | signal handlers malfunction if a signal should occur between those | |
990 | insns. Since this is an extremely rare event, we have no reliable | |
991 | way of knowing which systems have this problem. So we avoid even | |
992 | momentarily mis-aligning the stack. */ | |
993 | ||
89d825c9 | 994 | #ifdef STACK_BOUNDARY |
86b25e81 RS |
995 | /* If we added a variable amount to SIZE, |
996 | we can no longer assume it is aligned. */ | |
997 | #if !defined (SETJMP_VIA_SAVE_AREA) && !defined (MUST_ALIGN) | |
091ad0b9 | 998 | if (known_align % STACK_BOUNDARY != 0) |
34c9156a | 999 | #endif |
091ad0b9 | 1000 | size = round_push (size); |
89d825c9 | 1001 | #endif |
18ca7dab RK |
1002 | |
1003 | do_pending_stack_adjust (); | |
1004 | ||
091ad0b9 RK |
1005 | /* Don't use a TARGET that isn't a pseudo. */ |
1006 | if (target == 0 || GET_CODE (target) != REG | |
1007 | || REGNO (target) < FIRST_PSEUDO_REGISTER) | |
18ca7dab RK |
1008 | target = gen_reg_rtx (Pmode); |
1009 | ||
3ad69266 RS |
1010 | mark_reg_pointer (target); |
1011 | ||
18ca7dab RK |
1012 | #ifndef STACK_GROWS_DOWNWARD |
1013 | emit_move_insn (target, virtual_stack_dynamic_rtx); | |
1014 | #endif | |
1015 | ||
1016 | /* Perform the required allocation from the stack. Some systems do | |
1017 | this differently than simply incrementing/decrementing from the | |
1018 | stack pointer. */ | |
1019 | #ifdef HAVE_allocate_stack | |
1020 | if (HAVE_allocate_stack) | |
1021 | { | |
1022 | enum machine_mode mode | |
1023 | = insn_operand_mode[(int) CODE_FOR_allocate_stack][0]; | |
1024 | ||
1025 | if (insn_operand_predicate[(int) CODE_FOR_allocate_stack][0] | |
1026 | && ! ((*insn_operand_predicate[(int) CODE_FOR_allocate_stack][0]) | |
1027 | (size, mode))) | |
1028 | size = copy_to_mode_reg (mode, size); | |
1029 | ||
1030 | emit_insn (gen_allocate_stack (size)); | |
1031 | } | |
1032 | else | |
1033 | #endif | |
1034 | anti_adjust_stack (size); | |
1035 | ||
1036 | #ifdef STACK_GROWS_DOWNWARD | |
1037 | emit_move_insn (target, virtual_stack_dynamic_rtx); | |
1038 | #endif | |
1039 | ||
1040 | #ifdef MUST_ALIGN | |
86b25e81 RS |
1041 | #if 0 /* Even if we know the stack pointer has enough alignment, |
1042 | there's no way to tell whether virtual_stack_dynamic_rtx shares that | |
1043 | alignment, so we still need to round the address up. */ | |
091ad0b9 | 1044 | if (known_align % BIGGEST_ALIGNMENT != 0) |
1d9d04f8 | 1045 | #endif |
091ad0b9 RK |
1046 | { |
1047 | target = expand_divmod (0, CEIL_DIV_EXPR, Pmode, target, | |
b1ec3c92 CH |
1048 | GEN_INT (BIGGEST_ALIGNMENT / BITS_PER_UNIT), |
1049 | NULL_RTX, 1); | |
091ad0b9 RK |
1050 | |
1051 | target = expand_mult (Pmode, target, | |
b1ec3c92 CH |
1052 | GEN_INT (BIGGEST_ALIGNMENT / BITS_PER_UNIT), |
1053 | NULL_RTX, 1); | |
091ad0b9 | 1054 | } |
18ca7dab RK |
1055 | #endif |
1056 | ||
1057 | /* Some systems require a particular insn to refer to the stack | |
1058 | to make the pages exist. */ | |
1059 | #ifdef HAVE_probe | |
1060 | if (HAVE_probe) | |
1061 | emit_insn (gen_probe ()); | |
1062 | #endif | |
1063 | ||
1064 | return target; | |
1065 | } | |
1066 | \f | |
1067 | /* Return an rtx representing the register or memory location | |
1068 | in which a scalar value of data type VALTYPE | |
1069 | was returned by a function call to function FUNC. | |
1070 | FUNC is a FUNCTION_DECL node if the precise function is known, | |
1071 | otherwise 0. */ | |
1072 | ||
1073 | rtx | |
1074 | hard_function_value (valtype, func) | |
1075 | tree valtype; | |
1076 | tree func; | |
1077 | { | |
1078 | return FUNCTION_VALUE (valtype, func); | |
1079 | } | |
1080 | ||
1081 | /* Return an rtx representing the register or memory location | |
1082 | in which a scalar value of mode MODE was returned by a library call. */ | |
1083 | ||
1084 | rtx | |
1085 | hard_libcall_value (mode) | |
1086 | enum machine_mode mode; | |
1087 | { | |
1088 | return LIBCALL_VALUE (mode); | |
1089 | } | |
0c5e217d RS |
1090 | |
1091 | /* Look up the tree code for a given rtx code | |
1092 | to provide the arithmetic operation for REAL_ARITHMETIC. | |
1093 | The function returns an int because the caller may not know | |
1094 | what `enum tree_code' means. */ | |
1095 | ||
1096 | int | |
1097 | rtx_to_tree_code (code) | |
1098 | enum rtx_code code; | |
1099 | { | |
1100 | enum tree_code tcode; | |
1101 | ||
1102 | switch (code) | |
1103 | { | |
1104 | case PLUS: | |
1105 | tcode = PLUS_EXPR; | |
1106 | break; | |
1107 | case MINUS: | |
1108 | tcode = MINUS_EXPR; | |
1109 | break; | |
1110 | case MULT: | |
1111 | tcode = MULT_EXPR; | |
1112 | break; | |
1113 | case DIV: | |
1114 | tcode = RDIV_EXPR; | |
1115 | break; | |
1116 | case SMIN: | |
1117 | tcode = MIN_EXPR; | |
1118 | break; | |
1119 | case SMAX: | |
1120 | tcode = MAX_EXPR; | |
1121 | break; | |
1122 | default: | |
1123 | tcode = LAST_AND_UNUSED_TREE_CODE; | |
1124 | break; | |
1125 | } | |
1126 | return ((int) tcode); | |
1127 | } |