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bbf6f052 | 1 | /* Convert tree expression to rtl instructions, for GNU compiler. |
23a5b65a | 2 | Copyright (C) 1988-2014 Free Software Foundation, Inc. |
bbf6f052 | 3 | |
1322177d | 4 | This file is part of GCC. |
bbf6f052 | 5 | |
1322177d LB |
6 | GCC is free software; you can redistribute it and/or modify it under |
7 | the terms of the GNU General Public License as published by the Free | |
9dcd6f09 | 8 | Software Foundation; either version 3, or (at your option) any later |
1322177d | 9 | version. |
bbf6f052 | 10 | |
1322177d LB |
11 | GCC is distributed in the hope that it will be useful, but WITHOUT ANY |
12 | WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
13 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
14 | for more details. | |
bbf6f052 RK |
15 | |
16 | You should have received a copy of the GNU General Public License | |
9dcd6f09 NC |
17 | along with GCC; see the file COPYING3. If not see |
18 | <http://www.gnu.org/licenses/>. */ | |
bbf6f052 | 19 | |
bbf6f052 | 20 | #include "config.h" |
670ee920 | 21 | #include "system.h" |
4977bab6 ZW |
22 | #include "coretypes.h" |
23 | #include "tm.h" | |
ca695ac9 | 24 | #include "machmode.h" |
bbf6f052 RK |
25 | #include "rtl.h" |
26 | #include "tree.h" | |
d8a2d370 DN |
27 | #include "stringpool.h" |
28 | #include "stor-layout.h" | |
29 | #include "attribs.h" | |
30 | #include "varasm.h" | |
bbf6f052 | 31 | #include "flags.h" |
bf76bb5a | 32 | #include "regs.h" |
4ed67205 | 33 | #include "hard-reg-set.h" |
3d195391 | 34 | #include "except.h" |
83685514 AM |
35 | #include "hashtab.h" |
36 | #include "hash-set.h" | |
37 | #include "vec.h" | |
38 | #include "input.h" | |
bbf6f052 | 39 | #include "function.h" |
bbf6f052 | 40 | #include "insn-config.h" |
34e81b5a | 41 | #include "insn-attr.h" |
3a94c984 | 42 | /* Include expr.h after insn-config.h so we get HAVE_conditional_move. */ |
d6f4ec51 | 43 | #include "expr.h" |
e78d8e51 ZW |
44 | #include "optabs.h" |
45 | #include "libfuncs.h" | |
bbf6f052 | 46 | #include "recog.h" |
3ef1eef4 | 47 | #include "reload.h" |
bbf6f052 | 48 | #include "typeclass.h" |
10f0ad3d | 49 | #include "toplev.h" |
ac79cd5a | 50 | #include "langhooks.h" |
e2c49ac2 | 51 | #include "intl.h" |
b1474bb7 | 52 | #include "tm_p.h" |
6de9cd9a | 53 | #include "tree-iterator.h" |
2fb9a547 AM |
54 | #include "basic-block.h" |
55 | #include "tree-ssa-alias.h" | |
56 | #include "internal-fn.h" | |
57 | #include "gimple-expr.h" | |
58 | #include "is-a.h" | |
442b4905 AM |
59 | #include "gimple.h" |
60 | #include "gimple-ssa.h" | |
61 | #include "cgraph.h" | |
62 | #include "tree-ssanames.h" | |
c988af2b | 63 | #include "target.h" |
677f3fa8 | 64 | #include "common/common-target.h" |
2f8e398b | 65 | #include "timevar.h" |
6fb5fa3c | 66 | #include "df.h" |
a509ebb5 | 67 | #include "diagnostic.h" |
8e9055ae | 68 | #include "tree-ssa-live.h" |
78bca40d | 69 | #include "tree-outof-ssa.h" |
9d86796b | 70 | #include "target-globals.h" |
1169e45d | 71 | #include "params.h" |
4484a35a | 72 | #include "tree-ssa-address.h" |
1fe37220 | 73 | #include "cfgexpand.h" |
9b2b7279 | 74 | #include "builtins.h" |
bbf6f052 | 75 | |
bbf6f052 RK |
76 | #ifndef STACK_PUSH_CODE |
77 | #ifdef STACK_GROWS_DOWNWARD | |
78 | #define STACK_PUSH_CODE PRE_DEC | |
79 | #else | |
80 | #define STACK_PUSH_CODE PRE_INC | |
81 | #endif | |
82 | #endif | |
83 | ||
4ca79136 | 84 | |
bbf6f052 RK |
85 | /* If this is nonzero, we do not bother generating VOLATILE |
86 | around volatile memory references, and we are willing to | |
87 | output indirect addresses. If cse is to follow, we reject | |
88 | indirect addresses so a useful potential cse is generated; | |
89 | if it is used only once, instruction combination will produce | |
90 | the same indirect address eventually. */ | |
91 | int cse_not_expected; | |
92 | ||
4969d05d RK |
93 | /* This structure is used by move_by_pieces to describe the move to |
94 | be performed. */ | |
b0f43ca0 | 95 | struct move_by_pieces_d |
4969d05d RK |
96 | { |
97 | rtx to; | |
98 | rtx to_addr; | |
99 | int autinc_to; | |
100 | int explicit_inc_to; | |
101 | rtx from; | |
102 | rtx from_addr; | |
103 | int autinc_from; | |
104 | int explicit_inc_from; | |
3bdf5ad1 RK |
105 | unsigned HOST_WIDE_INT len; |
106 | HOST_WIDE_INT offset; | |
4969d05d RK |
107 | int reverse; |
108 | }; | |
109 | ||
57814e5e | 110 | /* This structure is used by store_by_pieces to describe the clear to |
9de08200 RK |
111 | be performed. */ |
112 | ||
b0f43ca0 | 113 | struct store_by_pieces_d |
9de08200 RK |
114 | { |
115 | rtx to; | |
116 | rtx to_addr; | |
117 | int autinc_to; | |
118 | int explicit_inc_to; | |
3bdf5ad1 RK |
119 | unsigned HOST_WIDE_INT len; |
120 | HOST_WIDE_INT offset; | |
502b8322 | 121 | rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode); |
fad205ff | 122 | void *constfundata; |
9de08200 RK |
123 | int reverse; |
124 | }; | |
125 | ||
eb923e54 | 126 | static void move_by_pieces_1 (insn_gen_fn, machine_mode, |
b0f43ca0 | 127 | struct move_by_pieces_d *); |
502b8322 | 128 | static bool block_move_libcall_safe_for_call_parm (void); |
3918b108 | 129 | static bool emit_block_move_via_movmem (rtx, rtx, rtx, unsigned, unsigned, HOST_WIDE_INT, |
82bb7d4e JH |
130 | unsigned HOST_WIDE_INT, unsigned HOST_WIDE_INT, |
131 | unsigned HOST_WIDE_INT); | |
502b8322 AJ |
132 | static tree emit_block_move_libcall_fn (int); |
133 | static void emit_block_move_via_loop (rtx, rtx, rtx, unsigned); | |
134 | static rtx clear_by_pieces_1 (void *, HOST_WIDE_INT, enum machine_mode); | |
135 | static void clear_by_pieces (rtx, unsigned HOST_WIDE_INT, unsigned int); | |
b0f43ca0 | 136 | static void store_by_pieces_1 (struct store_by_pieces_d *, unsigned int); |
eb923e54 | 137 | static void store_by_pieces_2 (insn_gen_fn, machine_mode, |
b0f43ca0 | 138 | struct store_by_pieces_d *); |
502b8322 | 139 | static tree clear_storage_libcall_fn (int); |
f3222b79 | 140 | static rtx_insn *compress_float_constant (rtx, rtx); |
502b8322 | 141 | static rtx get_subtarget (rtx); |
502b8322 AJ |
142 | static void store_constructor_field (rtx, unsigned HOST_WIDE_INT, |
143 | HOST_WIDE_INT, enum machine_mode, | |
3467ad5c | 144 | tree, int, alias_set_type); |
502b8322 | 145 | static void store_constructor (tree, rtx, int, HOST_WIDE_INT); |
1169e45d AH |
146 | static rtx store_field (rtx, HOST_WIDE_INT, HOST_WIDE_INT, |
147 | unsigned HOST_WIDE_INT, unsigned HOST_WIDE_INT, | |
3467ad5c | 148 | enum machine_mode, tree, alias_set_type, bool); |
502b8322 | 149 | |
fa233e34 | 150 | static unsigned HOST_WIDE_INT highest_pow2_factor_for_target (const_tree, const_tree); |
502b8322 | 151 | |
22ea9ec0 | 152 | static int is_aligning_offset (const_tree, const_tree); |
eb698c58 RS |
153 | static void expand_operands (tree, tree, rtx, rtx*, rtx*, |
154 | enum expand_modifier); | |
bc15d0ef | 155 | static rtx reduce_to_bit_field_precision (rtx, rtx, tree); |
8e7aa1f9 | 156 | static rtx do_store_flag (sepops, rtx, enum machine_mode); |
21d93687 | 157 | #ifdef PUSH_ROUNDING |
502b8322 | 158 | static void emit_single_push_insn (enum machine_mode, rtx, tree); |
21d93687 | 159 | #endif |
a4da41e1 | 160 | static void do_tablejump (rtx, enum machine_mode, rtx, rtx, rtx, int); |
502b8322 | 161 | static rtx const_vector_from_tree (tree); |
57aaef66 | 162 | static void write_complex_part (rtx, rtx, bool); |
bbf6f052 | 163 | |
fbe1758d | 164 | /* This macro is used to determine whether move_by_pieces should be called |
3a94c984 | 165 | to perform a structure copy. */ |
fbe1758d | 166 | #ifndef MOVE_BY_PIECES_P |
19caa751 | 167 | #define MOVE_BY_PIECES_P(SIZE, ALIGN) \ |
45d78e7f | 168 | (move_by_pieces_ninsns (SIZE, ALIGN, MOVE_MAX_PIECES + 1) \ |
e04ad03d | 169 | < (unsigned int) MOVE_RATIO (optimize_insn_for_speed_p ())) |
fbe1758d AM |
170 | #endif |
171 | ||
78762e3b RS |
172 | /* This macro is used to determine whether clear_by_pieces should be |
173 | called to clear storage. */ | |
174 | #ifndef CLEAR_BY_PIECES_P | |
175 | #define CLEAR_BY_PIECES_P(SIZE, ALIGN) \ | |
45d78e7f | 176 | (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \ |
e04ad03d | 177 | < (unsigned int) CLEAR_RATIO (optimize_insn_for_speed_p ())) |
78762e3b RS |
178 | #endif |
179 | ||
4977bab6 | 180 | /* This macro is used to determine whether store_by_pieces should be |
cfa31150 SL |
181 | called to "memset" storage with byte values other than zero. */ |
182 | #ifndef SET_BY_PIECES_P | |
183 | #define SET_BY_PIECES_P(SIZE, ALIGN) \ | |
184 | (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \ | |
e04ad03d | 185 | < (unsigned int) SET_RATIO (optimize_insn_for_speed_p ())) |
cfa31150 SL |
186 | #endif |
187 | ||
188 | /* This macro is used to determine whether store_by_pieces should be | |
189 | called to "memcpy" storage when the source is a constant string. */ | |
4977bab6 | 190 | #ifndef STORE_BY_PIECES_P |
45d78e7f JJ |
191 | #define STORE_BY_PIECES_P(SIZE, ALIGN) \ |
192 | (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \ | |
e04ad03d | 193 | < (unsigned int) MOVE_RATIO (optimize_insn_for_speed_p ())) |
4977bab6 | 194 | #endif |
bbf6f052 | 195 | \f |
b5deb7b6 SL |
196 | /* This is run to set up which modes can be used |
197 | directly in memory and to initialize the block move optab. It is run | |
198 | at the beginning of compilation and when the target is reinitialized. */ | |
4fa52007 RK |
199 | |
200 | void | |
b5deb7b6 | 201 | init_expr_target (void) |
4fa52007 RK |
202 | { |
203 | rtx insn, pat; | |
204 | enum machine_mode mode; | |
cff48d8f | 205 | int num_clobbers; |
9ec36da5 | 206 | rtx mem, mem1; |
bf1660a6 | 207 | rtx reg; |
9ec36da5 | 208 | |
e2549997 RS |
209 | /* Try indexing by frame ptr and try by stack ptr. |
210 | It is known that on the Convex the stack ptr isn't a valid index. | |
211 | With luck, one or the other is valid on any machine. */ | |
9ec36da5 JL |
212 | mem = gen_rtx_MEM (VOIDmode, stack_pointer_rtx); |
213 | mem1 = gen_rtx_MEM (VOIDmode, frame_pointer_rtx); | |
4fa52007 | 214 | |
bf1660a6 JL |
215 | /* A scratch register we can modify in-place below to avoid |
216 | useless RTL allocations. */ | |
217 | reg = gen_rtx_REG (VOIDmode, -1); | |
218 | ||
1f8c3c5b | 219 | insn = rtx_alloc (INSN); |
bbbbb16a | 220 | pat = gen_rtx_SET (VOIDmode, NULL_RTX, NULL_RTX); |
1f8c3c5b | 221 | PATTERN (insn) = pat; |
4fa52007 RK |
222 | |
223 | for (mode = VOIDmode; (int) mode < NUM_MACHINE_MODES; | |
224 | mode = (enum machine_mode) ((int) mode + 1)) | |
225 | { | |
226 | int regno; | |
4fa52007 RK |
227 | |
228 | direct_load[(int) mode] = direct_store[(int) mode] = 0; | |
229 | PUT_MODE (mem, mode); | |
e2549997 | 230 | PUT_MODE (mem1, mode); |
bf1660a6 | 231 | PUT_MODE (reg, mode); |
4fa52007 | 232 | |
e6fe56a4 RK |
233 | /* See if there is some register that can be used in this mode and |
234 | directly loaded or stored from memory. */ | |
235 | ||
7308a047 RS |
236 | if (mode != VOIDmode && mode != BLKmode) |
237 | for (regno = 0; regno < FIRST_PSEUDO_REGISTER | |
238 | && (direct_load[(int) mode] == 0 || direct_store[(int) mode] == 0); | |
239 | regno++) | |
240 | { | |
241 | if (! HARD_REGNO_MODE_OK (regno, mode)) | |
242 | continue; | |
e6fe56a4 | 243 | |
6fb5fa3c | 244 | SET_REGNO (reg, regno); |
e6fe56a4 | 245 | |
7308a047 RS |
246 | SET_SRC (pat) = mem; |
247 | SET_DEST (pat) = reg; | |
248 | if (recog (pat, insn, &num_clobbers) >= 0) | |
249 | direct_load[(int) mode] = 1; | |
e6fe56a4 | 250 | |
e2549997 RS |
251 | SET_SRC (pat) = mem1; |
252 | SET_DEST (pat) = reg; | |
253 | if (recog (pat, insn, &num_clobbers) >= 0) | |
254 | direct_load[(int) mode] = 1; | |
255 | ||
7308a047 RS |
256 | SET_SRC (pat) = reg; |
257 | SET_DEST (pat) = mem; | |
258 | if (recog (pat, insn, &num_clobbers) >= 0) | |
259 | direct_store[(int) mode] = 1; | |
e2549997 RS |
260 | |
261 | SET_SRC (pat) = reg; | |
262 | SET_DEST (pat) = mem1; | |
263 | if (recog (pat, insn, &num_clobbers) >= 0) | |
264 | direct_store[(int) mode] = 1; | |
7308a047 | 265 | } |
4fa52007 RK |
266 | } |
267 | ||
51286de6 RH |
268 | mem = gen_rtx_MEM (VOIDmode, gen_rtx_raw_REG (Pmode, 10000)); |
269 | ||
270 | for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode; | |
271 | mode = GET_MODE_WIDER_MODE (mode)) | |
272 | { | |
273 | enum machine_mode srcmode; | |
274 | for (srcmode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); srcmode != mode; | |
0fb7aeda | 275 | srcmode = GET_MODE_WIDER_MODE (srcmode)) |
51286de6 RH |
276 | { |
277 | enum insn_code ic; | |
278 | ||
279 | ic = can_extend_p (mode, srcmode, 0); | |
280 | if (ic == CODE_FOR_nothing) | |
281 | continue; | |
282 | ||
283 | PUT_MODE (mem, srcmode); | |
0fb7aeda | 284 | |
2ef6ce06 | 285 | if (insn_operand_matches (ic, 1, mem)) |
51286de6 RH |
286 | float_extend_from_mem[mode][srcmode] = true; |
287 | } | |
288 | } | |
4fa52007 | 289 | } |
cff48d8f | 290 | |
bbf6f052 RK |
291 | /* This is run at the start of compiling a function. */ |
292 | ||
293 | void | |
502b8322 | 294 | init_expr (void) |
bbf6f052 | 295 | { |
3e029763 | 296 | memset (&crtl->expr, 0, sizeof (crtl->expr)); |
bbf6f052 | 297 | } |
bbf6f052 RK |
298 | \f |
299 | /* Copy data from FROM to TO, where the machine modes are not the same. | |
0f996086 CF |
300 | Both modes may be integer, or both may be floating, or both may be |
301 | fixed-point. | |
bbf6f052 RK |
302 | UNSIGNEDP should be nonzero if FROM is an unsigned type. |
303 | This causes zero-extension instead of sign-extension. */ | |
304 | ||
305 | void | |
502b8322 | 306 | convert_move (rtx to, rtx from, int unsignedp) |
bbf6f052 RK |
307 | { |
308 | enum machine_mode to_mode = GET_MODE (to); | |
309 | enum machine_mode from_mode = GET_MODE (from); | |
3d8bf70f BE |
310 | int to_real = SCALAR_FLOAT_MODE_P (to_mode); |
311 | int from_real = SCALAR_FLOAT_MODE_P (from_mode); | |
bbf6f052 RK |
312 | enum insn_code code; |
313 | rtx libcall; | |
314 | ||
315 | /* rtx code for making an equivalent value. */ | |
37d0b254 SE |
316 | enum rtx_code equiv_code = (unsignedp < 0 ? UNKNOWN |
317 | : (unsignedp ? ZERO_EXTEND : SIGN_EXTEND)); | |
bbf6f052 | 318 | |
bbf6f052 | 319 | |
5b0264cb | 320 | gcc_assert (to_real == from_real); |
ed1223ba EC |
321 | gcc_assert (to_mode != BLKmode); |
322 | gcc_assert (from_mode != BLKmode); | |
bbf6f052 | 323 | |
6de9cd9a DN |
324 | /* If the source and destination are already the same, then there's |
325 | nothing to do. */ | |
326 | if (to == from) | |
327 | return; | |
328 | ||
1499e0a8 RK |
329 | /* If FROM is a SUBREG that indicates that we have already done at least |
330 | the required extension, strip it. We don't handle such SUBREGs as | |
331 | TO here. */ | |
332 | ||
333 | if (GET_CODE (from) == SUBREG && SUBREG_PROMOTED_VAR_P (from) | |
69660a70 BS |
334 | && (GET_MODE_PRECISION (GET_MODE (SUBREG_REG (from))) |
335 | >= GET_MODE_PRECISION (to_mode)) | |
362d42dc | 336 | && SUBREG_CHECK_PROMOTED_SIGN (from, unsignedp)) |
1499e0a8 RK |
337 | from = gen_lowpart (to_mode, from), from_mode = to_mode; |
338 | ||
5b0264cb | 339 | gcc_assert (GET_CODE (to) != SUBREG || !SUBREG_PROMOTED_VAR_P (to)); |
1499e0a8 | 340 | |
bbf6f052 RK |
341 | if (to_mode == from_mode |
342 | || (from_mode == VOIDmode && CONSTANT_P (from))) | |
343 | { | |
344 | emit_move_insn (to, from); | |
345 | return; | |
346 | } | |
347 | ||
0b4565c9 BS |
348 | if (VECTOR_MODE_P (to_mode) || VECTOR_MODE_P (from_mode)) |
349 | { | |
5b0264cb | 350 | gcc_assert (GET_MODE_BITSIZE (from_mode) == GET_MODE_BITSIZE (to_mode)); |
3a94c984 | 351 | |
0b4565c9 | 352 | if (VECTOR_MODE_P (to_mode)) |
bafe341a | 353 | from = simplify_gen_subreg (to_mode, from, GET_MODE (from), 0); |
0b4565c9 | 354 | else |
bafe341a | 355 | to = simplify_gen_subreg (from_mode, to, GET_MODE (to), 0); |
0b4565c9 BS |
356 | |
357 | emit_move_insn (to, from); | |
358 | return; | |
359 | } | |
360 | ||
06765df1 R |
361 | if (GET_CODE (to) == CONCAT && GET_CODE (from) == CONCAT) |
362 | { | |
363 | convert_move (XEXP (to, 0), XEXP (from, 0), unsignedp); | |
364 | convert_move (XEXP (to, 1), XEXP (from, 1), unsignedp); | |
365 | return; | |
366 | } | |
367 | ||
bbf6f052 RK |
368 | if (to_real) |
369 | { | |
770affca DM |
370 | rtx value; |
371 | rtx_insn *insns; | |
85363ca0 | 372 | convert_optab tab; |
81d79e2c | 373 | |
15ed7b52 JG |
374 | gcc_assert ((GET_MODE_PRECISION (from_mode) |
375 | != GET_MODE_PRECISION (to_mode)) | |
376 | || (DECIMAL_FLOAT_MODE_P (from_mode) | |
377 | != DECIMAL_FLOAT_MODE_P (to_mode))); | |
ed1223ba | 378 | |
15ed7b52 JG |
379 | if (GET_MODE_PRECISION (from_mode) == GET_MODE_PRECISION (to_mode)) |
380 | /* Conversion between decimal float and binary float, same size. */ | |
381 | tab = DECIMAL_FLOAT_MODE_P (from_mode) ? trunc_optab : sext_optab; | |
382 | else if (GET_MODE_PRECISION (from_mode) < GET_MODE_PRECISION (to_mode)) | |
85363ca0 | 383 | tab = sext_optab; |
85363ca0 | 384 | else |
5b0264cb | 385 | tab = trunc_optab; |
2b01c326 | 386 | |
85363ca0 | 387 | /* Try converting directly if the insn is supported. */ |
2b01c326 | 388 | |
947131ba | 389 | code = convert_optab_handler (tab, to_mode, from_mode); |
85363ca0 | 390 | if (code != CODE_FOR_nothing) |
b092b471 | 391 | { |
85363ca0 ZW |
392 | emit_unop_insn (code, to, from, |
393 | tab == sext_optab ? FLOAT_EXTEND : FLOAT_TRUNCATE); | |
b092b471 JW |
394 | return; |
395 | } | |
b092b471 | 396 | |
85363ca0 | 397 | /* Otherwise use a libcall. */ |
8a33f100 | 398 | libcall = convert_optab_libfunc (tab, to_mode, from_mode); |
3a94c984 | 399 | |
5b0264cb NS |
400 | /* Is this conversion implemented yet? */ |
401 | gcc_assert (libcall); | |
bbf6f052 | 402 | |
642dfa8b | 403 | start_sequence (); |
ebb1b59a | 404 | value = emit_library_call_value (libcall, NULL_RTX, LCT_CONST, to_mode, |
81d79e2c | 405 | 1, from, from_mode); |
642dfa8b BS |
406 | insns = get_insns (); |
407 | end_sequence (); | |
450b1728 EC |
408 | emit_libcall_block (insns, to, value, |
409 | tab == trunc_optab ? gen_rtx_FLOAT_TRUNCATE (to_mode, | |
410 | from) | |
411 | : gen_rtx_FLOAT_EXTEND (to_mode, from)); | |
bbf6f052 RK |
412 | return; |
413 | } | |
414 | ||
85363ca0 | 415 | /* Handle pointer conversion. */ /* SPEE 900220. */ |
aea3d681 DD |
416 | /* If the target has a converter from FROM_MODE to TO_MODE, use it. */ |
417 | { | |
418 | convert_optab ctab; | |
419 | ||
420 | if (GET_MODE_PRECISION (from_mode) > GET_MODE_PRECISION (to_mode)) | |
421 | ctab = trunc_optab; | |
422 | else if (unsignedp) | |
423 | ctab = zext_optab; | |
424 | else | |
425 | ctab = sext_optab; | |
426 | ||
427 | if (convert_optab_handler (ctab, to_mode, from_mode) | |
428 | != CODE_FOR_nothing) | |
429 | { | |
430 | emit_unop_insn (convert_optab_handler (ctab, to_mode, from_mode), | |
431 | to, from, UNKNOWN); | |
432 | return; | |
433 | } | |
434 | } | |
435 | ||
85363ca0 ZW |
436 | /* Targets are expected to provide conversion insns between PxImode and |
437 | xImode for all MODE_PARTIAL_INT modes they use, but no others. */ | |
438 | if (GET_MODE_CLASS (to_mode) == MODE_PARTIAL_INT) | |
439 | { | |
440 | enum machine_mode full_mode | |
441 | = smallest_mode_for_size (GET_MODE_BITSIZE (to_mode), MODE_INT); | |
442 | ||
947131ba | 443 | gcc_assert (convert_optab_handler (trunc_optab, to_mode, full_mode) |
5b0264cb | 444 | != CODE_FOR_nothing); |
85363ca0 ZW |
445 | |
446 | if (full_mode != from_mode) | |
447 | from = convert_to_mode (full_mode, from, unsignedp); | |
947131ba | 448 | emit_unop_insn (convert_optab_handler (trunc_optab, to_mode, full_mode), |
85363ca0 ZW |
449 | to, from, UNKNOWN); |
450 | return; | |
451 | } | |
452 | if (GET_MODE_CLASS (from_mode) == MODE_PARTIAL_INT) | |
453 | { | |
d2348bd5 | 454 | rtx new_from; |
85363ca0 ZW |
455 | enum machine_mode full_mode |
456 | = smallest_mode_for_size (GET_MODE_BITSIZE (from_mode), MODE_INT); | |
e90247f8 BS |
457 | convert_optab ctab = unsignedp ? zext_optab : sext_optab; |
458 | enum insn_code icode; | |
85363ca0 | 459 | |
e90247f8 BS |
460 | icode = convert_optab_handler (ctab, full_mode, from_mode); |
461 | gcc_assert (icode != CODE_FOR_nothing); | |
85363ca0 | 462 | |
85363ca0 | 463 | if (to_mode == full_mode) |
d2348bd5 | 464 | { |
e90247f8 | 465 | emit_unop_insn (icode, to, from, UNKNOWN); |
d2348bd5 DD |
466 | return; |
467 | } | |
468 | ||
469 | new_from = gen_reg_rtx (full_mode); | |
e90247f8 | 470 | emit_unop_insn (icode, new_from, from, UNKNOWN); |
85363ca0 | 471 | |
a1105617 | 472 | /* else proceed to integer conversions below. */ |
85363ca0 | 473 | from_mode = full_mode; |
d2348bd5 | 474 | from = new_from; |
85363ca0 ZW |
475 | } |
476 | ||
0f996086 CF |
477 | /* Make sure both are fixed-point modes or both are not. */ |
478 | gcc_assert (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode) == | |
479 | ALL_SCALAR_FIXED_POINT_MODE_P (to_mode)); | |
480 | if (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode)) | |
481 | { | |
482 | /* If we widen from_mode to to_mode and they are in the same class, | |
483 | we won't saturate the result. | |
484 | Otherwise, always saturate the result to play safe. */ | |
485 | if (GET_MODE_CLASS (from_mode) == GET_MODE_CLASS (to_mode) | |
486 | && GET_MODE_SIZE (from_mode) < GET_MODE_SIZE (to_mode)) | |
487 | expand_fixed_convert (to, from, 0, 0); | |
488 | else | |
489 | expand_fixed_convert (to, from, 0, 1); | |
490 | return; | |
491 | } | |
492 | ||
bbf6f052 RK |
493 | /* Now both modes are integers. */ |
494 | ||
495 | /* Handle expanding beyond a word. */ | |
69660a70 BS |
496 | if (GET_MODE_PRECISION (from_mode) < GET_MODE_PRECISION (to_mode) |
497 | && GET_MODE_PRECISION (to_mode) > BITS_PER_WORD) | |
bbf6f052 | 498 | { |
770affca | 499 | rtx_insn *insns; |
bbf6f052 RK |
500 | rtx lowpart; |
501 | rtx fill_value; | |
502 | rtx lowfrom; | |
503 | int i; | |
504 | enum machine_mode lowpart_mode; | |
505 | int nwords = CEIL (GET_MODE_SIZE (to_mode), UNITS_PER_WORD); | |
506 | ||
507 | /* Try converting directly if the insn is supported. */ | |
508 | if ((code = can_extend_p (to_mode, from_mode, unsignedp)) | |
509 | != CODE_FOR_nothing) | |
510 | { | |
cd1b4b44 RK |
511 | /* If FROM is a SUBREG, put it into a register. Do this |
512 | so that we always generate the same set of insns for | |
513 | better cse'ing; if an intermediate assignment occurred, | |
514 | we won't be doing the operation directly on the SUBREG. */ | |
515 | if (optimize > 0 && GET_CODE (from) == SUBREG) | |
516 | from = force_reg (from_mode, from); | |
bbf6f052 RK |
517 | emit_unop_insn (code, to, from, equiv_code); |
518 | return; | |
519 | } | |
520 | /* Next, try converting via full word. */ | |
69660a70 | 521 | else if (GET_MODE_PRECISION (from_mode) < BITS_PER_WORD |
bbf6f052 RK |
522 | && ((code = can_extend_p (to_mode, word_mode, unsignedp)) |
523 | != CODE_FOR_nothing)) | |
524 | { | |
2f6025a1 | 525 | rtx word_to = gen_reg_rtx (word_mode); |
f8cfc6aa | 526 | if (REG_P (to)) |
6a2d136b EB |
527 | { |
528 | if (reg_overlap_mentioned_p (to, from)) | |
529 | from = force_reg (from_mode, from); | |
c41c1387 | 530 | emit_clobber (to); |
6a2d136b | 531 | } |
2f6025a1 PB |
532 | convert_move (word_to, from, unsignedp); |
533 | emit_unop_insn (code, to, word_to, equiv_code); | |
bbf6f052 RK |
534 | return; |
535 | } | |
536 | ||
537 | /* No special multiword conversion insn; do it by hand. */ | |
538 | start_sequence (); | |
539 | ||
ecd49d51 OH |
540 | /* Since we will turn this into a no conflict block, we must ensure the |
541 | the source does not overlap the target so force it into an isolated | |
542 | register when maybe so. Likewise for any MEM input, since the | |
543 | conversion sequence might require several references to it and we | |
544 | must ensure we're getting the same value every time. */ | |
5c5033c3 | 545 | |
ecd49d51 | 546 | if (MEM_P (from) || reg_overlap_mentioned_p (to, from)) |
5c5033c3 RK |
547 | from = force_reg (from_mode, from); |
548 | ||
bbf6f052 | 549 | /* Get a copy of FROM widened to a word, if necessary. */ |
69660a70 | 550 | if (GET_MODE_PRECISION (from_mode) < BITS_PER_WORD) |
bbf6f052 RK |
551 | lowpart_mode = word_mode; |
552 | else | |
553 | lowpart_mode = from_mode; | |
554 | ||
555 | lowfrom = convert_to_mode (lowpart_mode, from, unsignedp); | |
556 | ||
557 | lowpart = gen_lowpart (lowpart_mode, to); | |
558 | emit_move_insn (lowpart, lowfrom); | |
559 | ||
560 | /* Compute the value to put in each remaining word. */ | |
561 | if (unsignedp) | |
562 | fill_value = const0_rtx; | |
563 | else | |
3662b277 SE |
564 | fill_value = emit_store_flag_force (gen_reg_rtx (word_mode), |
565 | LT, lowfrom, const0_rtx, | |
566 | lowpart_mode, 0, -1); | |
bbf6f052 RK |
567 | |
568 | /* Fill the remaining words. */ | |
569 | for (i = GET_MODE_SIZE (lowpart_mode) / UNITS_PER_WORD; i < nwords; i++) | |
570 | { | |
571 | int index = (WORDS_BIG_ENDIAN ? nwords - i - 1 : i); | |
572 | rtx subword = operand_subword (to, index, 1, to_mode); | |
573 | ||
5b0264cb | 574 | gcc_assert (subword); |
bbf6f052 RK |
575 | |
576 | if (fill_value != subword) | |
577 | emit_move_insn (subword, fill_value); | |
578 | } | |
579 | ||
580 | insns = get_insns (); | |
581 | end_sequence (); | |
582 | ||
d70dcf29 | 583 | emit_insn (insns); |
bbf6f052 RK |
584 | return; |
585 | } | |
586 | ||
d3c64ee3 | 587 | /* Truncating multi-word to a word or less. */ |
69660a70 BS |
588 | if (GET_MODE_PRECISION (from_mode) > BITS_PER_WORD |
589 | && GET_MODE_PRECISION (to_mode) <= BITS_PER_WORD) | |
bbf6f052 | 590 | { |
3c0cb5de | 591 | if (!((MEM_P (from) |
431a6eca JW |
592 | && ! MEM_VOLATILE_P (from) |
593 | && direct_load[(int) to_mode] | |
5bfed9a9 GJL |
594 | && ! mode_dependent_address_p (XEXP (from, 0), |
595 | MEM_ADDR_SPACE (from))) | |
f8cfc6aa | 596 | || REG_P (from) |
431a6eca JW |
597 | || GET_CODE (from) == SUBREG)) |
598 | from = force_reg (from_mode, from); | |
bbf6f052 RK |
599 | convert_move (to, gen_lowpart (word_mode, from), 0); |
600 | return; | |
601 | } | |
602 | ||
bbf6f052 RK |
603 | /* Now follow all the conversions between integers |
604 | no more than a word long. */ | |
605 | ||
606 | /* For truncation, usually we can just refer to FROM in a narrower mode. */ | |
607 | if (GET_MODE_BITSIZE (to_mode) < GET_MODE_BITSIZE (from_mode) | |
d0edd768 | 608 | && TRULY_NOOP_TRUNCATION_MODES_P (to_mode, from_mode)) |
bbf6f052 | 609 | { |
3c0cb5de | 610 | if (!((MEM_P (from) |
d3c64ee3 RS |
611 | && ! MEM_VOLATILE_P (from) |
612 | && direct_load[(int) to_mode] | |
5bfed9a9 GJL |
613 | && ! mode_dependent_address_p (XEXP (from, 0), |
614 | MEM_ADDR_SPACE (from))) | |
f8cfc6aa | 615 | || REG_P (from) |
d3c64ee3 RS |
616 | || GET_CODE (from) == SUBREG)) |
617 | from = force_reg (from_mode, from); | |
f8cfc6aa | 618 | if (REG_P (from) && REGNO (from) < FIRST_PSEUDO_REGISTER |
34aa3599 RK |
619 | && ! HARD_REGNO_MODE_OK (REGNO (from), to_mode)) |
620 | from = copy_to_reg (from); | |
bbf6f052 RK |
621 | emit_move_insn (to, gen_lowpart (to_mode, from)); |
622 | return; | |
623 | } | |
624 | ||
d3c64ee3 | 625 | /* Handle extension. */ |
69660a70 | 626 | if (GET_MODE_PRECISION (to_mode) > GET_MODE_PRECISION (from_mode)) |
bbf6f052 RK |
627 | { |
628 | /* Convert directly if that works. */ | |
629 | if ((code = can_extend_p (to_mode, from_mode, unsignedp)) | |
630 | != CODE_FOR_nothing) | |
631 | { | |
632 | emit_unop_insn (code, to, from, equiv_code); | |
633 | return; | |
634 | } | |
635 | else | |
636 | { | |
637 | enum machine_mode intermediate; | |
2b28d92e | 638 | rtx tmp; |
eb6c3df1 | 639 | int shift_amount; |
bbf6f052 RK |
640 | |
641 | /* Search for a mode to convert via. */ | |
642 | for (intermediate = from_mode; intermediate != VOIDmode; | |
643 | intermediate = GET_MODE_WIDER_MODE (intermediate)) | |
930b4e39 RK |
644 | if (((can_extend_p (to_mode, intermediate, unsignedp) |
645 | != CODE_FOR_nothing) | |
646 | || (GET_MODE_SIZE (to_mode) < GET_MODE_SIZE (intermediate) | |
d0edd768 | 647 | && TRULY_NOOP_TRUNCATION_MODES_P (to_mode, intermediate))) |
bbf6f052 RK |
648 | && (can_extend_p (intermediate, from_mode, unsignedp) |
649 | != CODE_FOR_nothing)) | |
650 | { | |
651 | convert_move (to, convert_to_mode (intermediate, from, | |
652 | unsignedp), unsignedp); | |
653 | return; | |
654 | } | |
655 | ||
2b28d92e | 656 | /* No suitable intermediate mode. |
3a94c984 | 657 | Generate what we need with shifts. */ |
69660a70 BS |
658 | shift_amount = (GET_MODE_PRECISION (to_mode) |
659 | - GET_MODE_PRECISION (from_mode)); | |
2b28d92e NC |
660 | from = gen_lowpart (to_mode, force_reg (from_mode, from)); |
661 | tmp = expand_shift (LSHIFT_EXPR, to_mode, from, shift_amount, | |
662 | to, unsignedp); | |
3a94c984 | 663 | tmp = expand_shift (RSHIFT_EXPR, to_mode, tmp, shift_amount, |
2b28d92e NC |
664 | to, unsignedp); |
665 | if (tmp != to) | |
666 | emit_move_insn (to, tmp); | |
667 | return; | |
bbf6f052 RK |
668 | } |
669 | } | |
670 | ||
3a94c984 | 671 | /* Support special truncate insns for certain modes. */ |
947131ba RS |
672 | if (convert_optab_handler (trunc_optab, to_mode, |
673 | from_mode) != CODE_FOR_nothing) | |
bbf6f052 | 674 | { |
947131ba | 675 | emit_unop_insn (convert_optab_handler (trunc_optab, to_mode, from_mode), |
85363ca0 | 676 | to, from, UNKNOWN); |
b9bcad65 RK |
677 | return; |
678 | } | |
679 | ||
bbf6f052 RK |
680 | /* Handle truncation of volatile memrefs, and so on; |
681 | the things that couldn't be truncated directly, | |
85363ca0 ZW |
682 | and for which there was no special instruction. |
683 | ||
684 | ??? Code above formerly short-circuited this, for most integer | |
685 | mode pairs, with a force_reg in from_mode followed by a recursive | |
686 | call to this routine. Appears always to have been wrong. */ | |
69660a70 | 687 | if (GET_MODE_PRECISION (to_mode) < GET_MODE_PRECISION (from_mode)) |
bbf6f052 RK |
688 | { |
689 | rtx temp = force_reg (to_mode, gen_lowpart (to_mode, from)); | |
690 | emit_move_insn (to, temp); | |
691 | return; | |
692 | } | |
693 | ||
694 | /* Mode combination is not recognized. */ | |
5b0264cb | 695 | gcc_unreachable (); |
bbf6f052 RK |
696 | } |
697 | ||
698 | /* Return an rtx for a value that would result | |
699 | from converting X to mode MODE. | |
700 | Both X and MODE may be floating, or both integer. | |
701 | UNSIGNEDP is nonzero if X is an unsigned value. | |
702 | This can be done by referring to a part of X in place | |
ad76cef8 | 703 | or by copying to a new temporary with conversion. */ |
bbf6f052 RK |
704 | |
705 | rtx | |
502b8322 | 706 | convert_to_mode (enum machine_mode mode, rtx x, int unsignedp) |
5ffe63ed RS |
707 | { |
708 | return convert_modes (mode, VOIDmode, x, unsignedp); | |
709 | } | |
710 | ||
711 | /* Return an rtx for a value that would result | |
712 | from converting X from mode OLDMODE to mode MODE. | |
713 | Both modes may be floating, or both integer. | |
714 | UNSIGNEDP is nonzero if X is an unsigned value. | |
715 | ||
716 | This can be done by referring to a part of X in place | |
717 | or by copying to a new temporary with conversion. | |
718 | ||
ad76cef8 | 719 | You can give VOIDmode for OLDMODE, if you are sure X has a nonvoid mode. */ |
5ffe63ed RS |
720 | |
721 | rtx | |
502b8322 | 722 | convert_modes (enum machine_mode mode, enum machine_mode oldmode, rtx x, int unsignedp) |
bbf6f052 | 723 | { |
b3694847 | 724 | rtx temp; |
5ffe63ed | 725 | |
1499e0a8 RK |
726 | /* If FROM is a SUBREG that indicates that we have already done at least |
727 | the required extension, strip it. */ | |
728 | ||
729 | if (GET_CODE (x) == SUBREG && SUBREG_PROMOTED_VAR_P (x) | |
730 | && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) >= GET_MODE_SIZE (mode) | |
362d42dc | 731 | && SUBREG_CHECK_PROMOTED_SIGN (x, unsignedp)) |
2477c234 | 732 | x = gen_lowpart (mode, SUBREG_REG (x)); |
bbf6f052 | 733 | |
64791b18 RK |
734 | if (GET_MODE (x) != VOIDmode) |
735 | oldmode = GET_MODE (x); | |
3a94c984 | 736 | |
3a3d54f2 UB |
737 | if (mode == oldmode) |
738 | return x; | |
739 | ||
807e902e | 740 | if (CONST_SCALAR_INT_P (x) && GET_MODE_CLASS (mode) == MODE_INT) |
96ff8a16 | 741 | { |
807e902e KZ |
742 | /* If the caller did not tell us the old mode, then there is not |
743 | much to do with respect to canonicalization. We have to | |
744 | assume that all the bits are significant. */ | |
745 | if (GET_MODE_CLASS (oldmode) != MODE_INT) | |
746 | oldmode = MAX_MODE_INT; | |
747 | wide_int w = wide_int::from (std::make_pair (x, oldmode), | |
748 | GET_MODE_PRECISION (mode), | |
749 | unsignedp ? UNSIGNED : SIGNED); | |
750 | return immed_wide_int_const (w, mode); | |
96ff8a16 | 751 | } |
bbf6f052 RK |
752 | |
753 | /* We can do this with a gen_lowpart if both desired and current modes | |
754 | are integer, and this is either a constant integer, a register, or a | |
807e902e KZ |
755 | non-volatile MEM. */ |
756 | if (GET_MODE_CLASS (mode) == MODE_INT | |
757 | && GET_MODE_CLASS (oldmode) == MODE_INT | |
758 | && GET_MODE_PRECISION (mode) <= GET_MODE_PRECISION (oldmode) | |
759 | && ((MEM_P (x) && !MEM_VOLATILE_P (x) && direct_load[(int) mode]) | |
760 | || (REG_P (x) | |
761 | && (!HARD_REGISTER_P (x) | |
762 | || HARD_REGNO_MODE_OK (REGNO (x), mode)) | |
763 | && TRULY_NOOP_TRUNCATION_MODES_P (mode, GET_MODE (x))))) | |
764 | ||
765 | return gen_lowpart (mode, x); | |
bbf6f052 | 766 | |
ebe75517 JH |
767 | /* Converting from integer constant into mode is always equivalent to an |
768 | subreg operation. */ | |
769 | if (VECTOR_MODE_P (mode) && GET_MODE (x) == VOIDmode) | |
770 | { | |
5b0264cb | 771 | gcc_assert (GET_MODE_BITSIZE (mode) == GET_MODE_BITSIZE (oldmode)); |
ebe75517 JH |
772 | return simplify_gen_subreg (mode, x, oldmode, 0); |
773 | } | |
774 | ||
bbf6f052 RK |
775 | temp = gen_reg_rtx (mode); |
776 | convert_move (temp, x, unsignedp); | |
777 | return temp; | |
778 | } | |
779 | \f | |
d824aea2 NF |
780 | /* Return the largest alignment we can use for doing a move (or store) |
781 | of MAX_PIECES. ALIGN is the largest alignment we could use. */ | |
782 | ||
783 | static unsigned int | |
784 | alignment_for_piecewise_move (unsigned int max_pieces, unsigned int align) | |
785 | { | |
786 | enum machine_mode tmode; | |
787 | ||
788 | tmode = mode_for_size (max_pieces * BITS_PER_UNIT, MODE_INT, 1); | |
789 | if (align >= GET_MODE_ALIGNMENT (tmode)) | |
790 | align = GET_MODE_ALIGNMENT (tmode); | |
791 | else | |
792 | { | |
793 | enum machine_mode tmode, xmode; | |
794 | ||
795 | for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT), xmode = tmode; | |
796 | tmode != VOIDmode; | |
797 | xmode = tmode, tmode = GET_MODE_WIDER_MODE (tmode)) | |
798 | if (GET_MODE_SIZE (tmode) > max_pieces | |
799 | || SLOW_UNALIGNED_ACCESS (tmode, align)) | |
800 | break; | |
801 | ||
802 | align = MAX (align, GET_MODE_ALIGNMENT (xmode)); | |
803 | } | |
804 | ||
805 | return align; | |
806 | } | |
807 | ||
808 | /* Return the widest integer mode no wider than SIZE. If no such mode | |
809 | can be found, return VOIDmode. */ | |
810 | ||
811 | static enum machine_mode | |
812 | widest_int_mode_for_size (unsigned int size) | |
813 | { | |
814 | enum machine_mode tmode, mode = VOIDmode; | |
815 | ||
816 | for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT); | |
817 | tmode != VOIDmode; tmode = GET_MODE_WIDER_MODE (tmode)) | |
818 | if (GET_MODE_SIZE (tmode) < size) | |
819 | mode = tmode; | |
820 | ||
821 | return mode; | |
822 | } | |
823 | ||
cf5124f6 RS |
824 | /* STORE_MAX_PIECES is the number of bytes at a time that we can |
825 | store efficiently. Due to internal GCC limitations, this is | |
826 | MOVE_MAX_PIECES limited by the number of bytes GCC can represent | |
827 | for an immediate constant. */ | |
828 | ||
829 | #define STORE_MAX_PIECES MIN (MOVE_MAX_PIECES, 2 * sizeof (HOST_WIDE_INT)) | |
830 | ||
8fd3cf4e JJ |
831 | /* Determine whether the LEN bytes can be moved by using several move |
832 | instructions. Return nonzero if a call to move_by_pieces should | |
833 | succeed. */ | |
834 | ||
835 | int | |
1b9a8025 | 836 | can_move_by_pieces (unsigned HOST_WIDE_INT len ATTRIBUTE_UNUSED, |
502b8322 | 837 | unsigned int align ATTRIBUTE_UNUSED) |
8fd3cf4e JJ |
838 | { |
839 | return MOVE_BY_PIECES_P (len, align); | |
840 | } | |
841 | ||
21d93687 | 842 | /* Generate several move instructions to copy LEN bytes from block FROM to |
ad76cef8 | 843 | block TO. (These are MEM rtx's with BLKmode). |
566aa174 | 844 | |
21d93687 RK |
845 | If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is |
846 | used to push FROM to the stack. | |
566aa174 | 847 | |
8fd3cf4e | 848 | ALIGN is maximum stack alignment we can assume. |
bbf6f052 | 849 | |
8fd3cf4e JJ |
850 | If ENDP is 0 return to, if ENDP is 1 return memory at the end ala |
851 | mempcpy, and if ENDP is 2 return memory the end minus one byte ala | |
852 | stpcpy. */ | |
853 | ||
854 | rtx | |
502b8322 AJ |
855 | move_by_pieces (rtx to, rtx from, unsigned HOST_WIDE_INT len, |
856 | unsigned int align, int endp) | |
bbf6f052 | 857 | { |
b0f43ca0 | 858 | struct move_by_pieces_d data; |
372d6395 RS |
859 | enum machine_mode to_addr_mode; |
860 | enum machine_mode from_addr_mode = get_address_mode (from); | |
566aa174 | 861 | rtx to_addr, from_addr = XEXP (from, 0); |
770ae6cc | 862 | unsigned int max_size = MOVE_MAX_PIECES + 1; |
fbe1758d | 863 | enum insn_code icode; |
bbf6f052 | 864 | |
f26aca6d DD |
865 | align = MIN (to ? MEM_ALIGN (to) : align, MEM_ALIGN (from)); |
866 | ||
bbf6f052 | 867 | data.offset = 0; |
bbf6f052 | 868 | data.from_addr = from_addr; |
566aa174 JH |
869 | if (to) |
870 | { | |
372d6395 | 871 | to_addr_mode = get_address_mode (to); |
566aa174 JH |
872 | to_addr = XEXP (to, 0); |
873 | data.to = to; | |
874 | data.autinc_to | |
875 | = (GET_CODE (to_addr) == PRE_INC || GET_CODE (to_addr) == PRE_DEC | |
876 | || GET_CODE (to_addr) == POST_INC || GET_CODE (to_addr) == POST_DEC); | |
877 | data.reverse | |
878 | = (GET_CODE (to_addr) == PRE_DEC || GET_CODE (to_addr) == POST_DEC); | |
879 | } | |
880 | else | |
881 | { | |
d4ebfa65 | 882 | to_addr_mode = VOIDmode; |
566aa174 JH |
883 | to_addr = NULL_RTX; |
884 | data.to = NULL_RTX; | |
885 | data.autinc_to = 1; | |
886 | #ifdef STACK_GROWS_DOWNWARD | |
887 | data.reverse = 1; | |
888 | #else | |
889 | data.reverse = 0; | |
890 | #endif | |
891 | } | |
892 | data.to_addr = to_addr; | |
bbf6f052 | 893 | data.from = from; |
bbf6f052 RK |
894 | data.autinc_from |
895 | = (GET_CODE (from_addr) == PRE_INC || GET_CODE (from_addr) == PRE_DEC | |
896 | || GET_CODE (from_addr) == POST_INC | |
897 | || GET_CODE (from_addr) == POST_DEC); | |
898 | ||
899 | data.explicit_inc_from = 0; | |
900 | data.explicit_inc_to = 0; | |
bbf6f052 RK |
901 | if (data.reverse) data.offset = len; |
902 | data.len = len; | |
903 | ||
904 | /* If copying requires more than two move insns, | |
905 | copy addresses to registers (to make displacements shorter) | |
906 | and use post-increment if available. */ | |
907 | if (!(data.autinc_from && data.autinc_to) | |
45d78e7f | 908 | && move_by_pieces_ninsns (len, align, max_size) > 2) |
bbf6f052 | 909 | { |
d824aea2 NF |
910 | /* Find the mode of the largest move... |
911 | MODE might not be used depending on the definitions of the | |
912 | USE_* macros below. */ | |
913 | enum machine_mode mode ATTRIBUTE_UNUSED | |
914 | = widest_int_mode_for_size (max_size); | |
fbe1758d AM |
915 | |
916 | if (USE_LOAD_PRE_DECREMENT (mode) && data.reverse && ! data.autinc_from) | |
bbf6f052 | 917 | { |
d4ebfa65 | 918 | data.from_addr = copy_to_mode_reg (from_addr_mode, |
0a81f074 RS |
919 | plus_constant (from_addr_mode, |
920 | from_addr, len)); | |
bbf6f052 RK |
921 | data.autinc_from = 1; |
922 | data.explicit_inc_from = -1; | |
923 | } | |
fbe1758d | 924 | if (USE_LOAD_POST_INCREMENT (mode) && ! data.autinc_from) |
bbf6f052 | 925 | { |
d4ebfa65 | 926 | data.from_addr = copy_to_mode_reg (from_addr_mode, from_addr); |
bbf6f052 RK |
927 | data.autinc_from = 1; |
928 | data.explicit_inc_from = 1; | |
929 | } | |
bbf6f052 | 930 | if (!data.autinc_from && CONSTANT_P (from_addr)) |
d4ebfa65 | 931 | data.from_addr = copy_to_mode_reg (from_addr_mode, from_addr); |
fbe1758d | 932 | if (USE_STORE_PRE_DECREMENT (mode) && data.reverse && ! data.autinc_to) |
bbf6f052 | 933 | { |
d4ebfa65 | 934 | data.to_addr = copy_to_mode_reg (to_addr_mode, |
0a81f074 RS |
935 | plus_constant (to_addr_mode, |
936 | to_addr, len)); | |
bbf6f052 RK |
937 | data.autinc_to = 1; |
938 | data.explicit_inc_to = -1; | |
939 | } | |
fbe1758d | 940 | if (USE_STORE_POST_INCREMENT (mode) && ! data.reverse && ! data.autinc_to) |
bbf6f052 | 941 | { |
d4ebfa65 | 942 | data.to_addr = copy_to_mode_reg (to_addr_mode, to_addr); |
bbf6f052 RK |
943 | data.autinc_to = 1; |
944 | data.explicit_inc_to = 1; | |
945 | } | |
bbf6f052 | 946 | if (!data.autinc_to && CONSTANT_P (to_addr)) |
d4ebfa65 | 947 | data.to_addr = copy_to_mode_reg (to_addr_mode, to_addr); |
bbf6f052 RK |
948 | } |
949 | ||
d824aea2 | 950 | align = alignment_for_piecewise_move (MOVE_MAX_PIECES, align); |
bbf6f052 RK |
951 | |
952 | /* First move what we can in the largest integer mode, then go to | |
953 | successively smaller modes. */ | |
954 | ||
f841b683 | 955 | while (max_size > 1 && data.len > 0) |
bbf6f052 | 956 | { |
d824aea2 | 957 | enum machine_mode mode = widest_int_mode_for_size (max_size); |
bbf6f052 RK |
958 | |
959 | if (mode == VOIDmode) | |
960 | break; | |
961 | ||
947131ba | 962 | icode = optab_handler (mov_optab, mode); |
19caa751 | 963 | if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode)) |
bbf6f052 RK |
964 | move_by_pieces_1 (GEN_FCN (icode), mode, &data); |
965 | ||
966 | max_size = GET_MODE_SIZE (mode); | |
967 | } | |
968 | ||
969 | /* The code above should have handled everything. */ | |
5b0264cb | 970 | gcc_assert (!data.len); |
8fd3cf4e JJ |
971 | |
972 | if (endp) | |
973 | { | |
974 | rtx to1; | |
975 | ||
5b0264cb | 976 | gcc_assert (!data.reverse); |
8fd3cf4e JJ |
977 | if (data.autinc_to) |
978 | { | |
979 | if (endp == 2) | |
980 | { | |
981 | if (HAVE_POST_INCREMENT && data.explicit_inc_to > 0) | |
982 | emit_insn (gen_add2_insn (data.to_addr, constm1_rtx)); | |
983 | else | |
d4ebfa65 | 984 | data.to_addr = copy_to_mode_reg (to_addr_mode, |
0a81f074 RS |
985 | plus_constant (to_addr_mode, |
986 | data.to_addr, | |
8fd3cf4e JJ |
987 | -1)); |
988 | } | |
989 | to1 = adjust_automodify_address (data.to, QImode, data.to_addr, | |
990 | data.offset); | |
991 | } | |
992 | else | |
993 | { | |
994 | if (endp == 2) | |
995 | --data.offset; | |
996 | to1 = adjust_address (data.to, QImode, data.offset); | |
997 | } | |
998 | return to1; | |
999 | } | |
1000 | else | |
1001 | return data.to; | |
bbf6f052 RK |
1002 | } |
1003 | ||
1004 | /* Return number of insns required to move L bytes by pieces. | |
f1eaaf73 | 1005 | ALIGN (in bits) is maximum alignment we can assume. */ |
bbf6f052 | 1006 | |
0d8f5d62 | 1007 | unsigned HOST_WIDE_INT |
45d78e7f JJ |
1008 | move_by_pieces_ninsns (unsigned HOST_WIDE_INT l, unsigned int align, |
1009 | unsigned int max_size) | |
bbf6f052 | 1010 | { |
3bdf5ad1 | 1011 | unsigned HOST_WIDE_INT n_insns = 0; |
bbf6f052 | 1012 | |
d824aea2 | 1013 | align = alignment_for_piecewise_move (MOVE_MAX_PIECES, align); |
bbf6f052 | 1014 | |
f841b683 | 1015 | while (max_size > 1 && l > 0) |
bbf6f052 | 1016 | { |
d824aea2 | 1017 | enum machine_mode mode; |
bbf6f052 RK |
1018 | enum insn_code icode; |
1019 | ||
d824aea2 | 1020 | mode = widest_int_mode_for_size (max_size); |
bbf6f052 RK |
1021 | |
1022 | if (mode == VOIDmode) | |
1023 | break; | |
1024 | ||
947131ba | 1025 | icode = optab_handler (mov_optab, mode); |
19caa751 | 1026 | if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode)) |
bbf6f052 RK |
1027 | n_insns += l / GET_MODE_SIZE (mode), l %= GET_MODE_SIZE (mode); |
1028 | ||
1029 | max_size = GET_MODE_SIZE (mode); | |
1030 | } | |
1031 | ||
5b0264cb | 1032 | gcc_assert (!l); |
bbf6f052 RK |
1033 | return n_insns; |
1034 | } | |
1035 | ||
1036 | /* Subroutine of move_by_pieces. Move as many bytes as appropriate | |
1037 | with move instructions for mode MODE. GENFUN is the gen_... function | |
1038 | to make a move insn for that mode. DATA has all the other info. */ | |
1039 | ||
1040 | static void | |
eb923e54 | 1041 | move_by_pieces_1 (insn_gen_fn genfun, machine_mode mode, |
b0f43ca0 | 1042 | struct move_by_pieces_d *data) |
bbf6f052 | 1043 | { |
3bdf5ad1 | 1044 | unsigned int size = GET_MODE_SIZE (mode); |
ae0ed63a | 1045 | rtx to1 = NULL_RTX, from1; |
bbf6f052 RK |
1046 | |
1047 | while (data->len >= size) | |
1048 | { | |
3bdf5ad1 RK |
1049 | if (data->reverse) |
1050 | data->offset -= size; | |
1051 | ||
566aa174 | 1052 | if (data->to) |
3bdf5ad1 | 1053 | { |
566aa174 | 1054 | if (data->autinc_to) |
630036c6 JJ |
1055 | to1 = adjust_automodify_address (data->to, mode, data->to_addr, |
1056 | data->offset); | |
566aa174 | 1057 | else |
f4ef873c | 1058 | to1 = adjust_address (data->to, mode, data->offset); |
3bdf5ad1 | 1059 | } |
3bdf5ad1 RK |
1060 | |
1061 | if (data->autinc_from) | |
630036c6 JJ |
1062 | from1 = adjust_automodify_address (data->from, mode, data->from_addr, |
1063 | data->offset); | |
3bdf5ad1 | 1064 | else |
f4ef873c | 1065 | from1 = adjust_address (data->from, mode, data->offset); |
bbf6f052 | 1066 | |
940da324 | 1067 | if (HAVE_PRE_DECREMENT && data->explicit_inc_to < 0) |
3d709fd3 | 1068 | emit_insn (gen_add2_insn (data->to_addr, |
69db2d57 RS |
1069 | gen_int_mode (-(HOST_WIDE_INT) size, |
1070 | GET_MODE (data->to_addr)))); | |
940da324 | 1071 | if (HAVE_PRE_DECREMENT && data->explicit_inc_from < 0) |
3d709fd3 | 1072 | emit_insn (gen_add2_insn (data->from_addr, |
69db2d57 RS |
1073 | gen_int_mode (-(HOST_WIDE_INT) size, |
1074 | GET_MODE (data->from_addr)))); | |
bbf6f052 | 1075 | |
566aa174 JH |
1076 | if (data->to) |
1077 | emit_insn ((*genfun) (to1, from1)); | |
1078 | else | |
21d93687 RK |
1079 | { |
1080 | #ifdef PUSH_ROUNDING | |
1081 | emit_single_push_insn (mode, from1, NULL); | |
1082 | #else | |
5b0264cb | 1083 | gcc_unreachable (); |
21d93687 RK |
1084 | #endif |
1085 | } | |
3bdf5ad1 | 1086 | |
940da324 | 1087 | if (HAVE_POST_INCREMENT && data->explicit_inc_to > 0) |
69db2d57 RS |
1088 | emit_insn (gen_add2_insn (data->to_addr, |
1089 | gen_int_mode (size, | |
1090 | GET_MODE (data->to_addr)))); | |
940da324 | 1091 | if (HAVE_POST_INCREMENT && data->explicit_inc_from > 0) |
69db2d57 RS |
1092 | emit_insn (gen_add2_insn (data->from_addr, |
1093 | gen_int_mode (size, | |
1094 | GET_MODE (data->from_addr)))); | |
bbf6f052 | 1095 | |
3bdf5ad1 RK |
1096 | if (! data->reverse) |
1097 | data->offset += size; | |
bbf6f052 RK |
1098 | |
1099 | data->len -= size; | |
1100 | } | |
1101 | } | |
1102 | \f | |
4ca79136 RH |
1103 | /* Emit code to move a block Y to a block X. This may be done with |
1104 | string-move instructions, with multiple scalar move instructions, | |
1105 | or with a library call. | |
bbf6f052 | 1106 | |
4ca79136 | 1107 | Both X and Y must be MEM rtx's (perhaps inside VOLATILE) with mode BLKmode. |
bbf6f052 | 1108 | SIZE is an rtx that says how long they are. |
19caa751 | 1109 | ALIGN is the maximum alignment we can assume they have. |
44bb111a | 1110 | METHOD describes what kind of copy this is, and what mechanisms may be used. |
3918b108 JH |
1111 | MIN_SIZE is the minimal size of block to move |
1112 | MAX_SIZE is the maximal size of block to move, if it can not be represented | |
1113 | in unsigned HOST_WIDE_INT, than it is mask of all ones. | |
bbf6f052 | 1114 | |
e9a25f70 JL |
1115 | Return the address of the new block, if memcpy is called and returns it, |
1116 | 0 otherwise. */ | |
1117 | ||
1118 | rtx | |
079a182e | 1119 | emit_block_move_hints (rtx x, rtx y, rtx size, enum block_op_methods method, |
3918b108 JH |
1120 | unsigned int expected_align, HOST_WIDE_INT expected_size, |
1121 | unsigned HOST_WIDE_INT min_size, | |
82bb7d4e JH |
1122 | unsigned HOST_WIDE_INT max_size, |
1123 | unsigned HOST_WIDE_INT probable_max_size) | |
bbf6f052 | 1124 | { |
44bb111a | 1125 | bool may_use_call; |
e9a25f70 | 1126 | rtx retval = 0; |
44bb111a RH |
1127 | unsigned int align; |
1128 | ||
8b4c365c RG |
1129 | gcc_assert (size); |
1130 | if (CONST_INT_P (size) | |
1131 | && INTVAL (size) == 0) | |
1132 | return 0; | |
1133 | ||
44bb111a RH |
1134 | switch (method) |
1135 | { | |
1136 | case BLOCK_OP_NORMAL: | |
8148fe65 | 1137 | case BLOCK_OP_TAILCALL: |
44bb111a RH |
1138 | may_use_call = true; |
1139 | break; | |
1140 | ||
1141 | case BLOCK_OP_CALL_PARM: | |
1142 | may_use_call = block_move_libcall_safe_for_call_parm (); | |
1143 | ||
1144 | /* Make inhibit_defer_pop nonzero around the library call | |
1145 | to force it to pop the arguments right away. */ | |
1146 | NO_DEFER_POP; | |
1147 | break; | |
1148 | ||
1149 | case BLOCK_OP_NO_LIBCALL: | |
1150 | may_use_call = false; | |
1151 | break; | |
1152 | ||
1153 | default: | |
5b0264cb | 1154 | gcc_unreachable (); |
44bb111a RH |
1155 | } |
1156 | ||
8b4c365c | 1157 | gcc_assert (MEM_P (x) && MEM_P (y)); |
44bb111a | 1158 | align = MIN (MEM_ALIGN (x), MEM_ALIGN (y)); |
e100f395 | 1159 | gcc_assert (align >= BITS_PER_UNIT); |
e9a25f70 | 1160 | |
82c82743 RH |
1161 | /* Make sure we've got BLKmode addresses; store_one_arg can decide that |
1162 | block copy is more efficient for other large modes, e.g. DCmode. */ | |
1163 | x = adjust_address (x, BLKmode, 0); | |
1164 | y = adjust_address (y, BLKmode, 0); | |
1165 | ||
cb38fd88 RH |
1166 | /* Set MEM_SIZE as appropriate for this block copy. The main place this |
1167 | can be incorrect is coming from __builtin_memcpy. */ | |
481683e1 | 1168 | if (CONST_INT_P (size)) |
cb38fd88 RH |
1169 | { |
1170 | x = shallow_copy_rtx (x); | |
1171 | y = shallow_copy_rtx (y); | |
f5541398 RS |
1172 | set_mem_size (x, INTVAL (size)); |
1173 | set_mem_size (y, INTVAL (size)); | |
cb38fd88 RH |
1174 | } |
1175 | ||
481683e1 | 1176 | if (CONST_INT_P (size) && MOVE_BY_PIECES_P (INTVAL (size), align)) |
8fd3cf4e | 1177 | move_by_pieces (x, y, INTVAL (size), align, 0); |
079a182e | 1178 | else if (emit_block_move_via_movmem (x, y, size, align, |
3918b108 | 1179 | expected_align, expected_size, |
82bb7d4e | 1180 | min_size, max_size, probable_max_size)) |
4ca79136 | 1181 | ; |
09e881c9 BE |
1182 | else if (may_use_call |
1183 | && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (x)) | |
1184 | && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (y))) | |
c4b9a87e ER |
1185 | { |
1186 | /* Since x and y are passed to a libcall, mark the corresponding | |
1187 | tree EXPR as addressable. */ | |
1188 | tree y_expr = MEM_EXPR (y); | |
1189 | tree x_expr = MEM_EXPR (x); | |
1190 | if (y_expr) | |
1191 | mark_addressable (y_expr); | |
1192 | if (x_expr) | |
1193 | mark_addressable (x_expr); | |
1194 | retval = emit_block_move_via_libcall (x, y, size, | |
1195 | method == BLOCK_OP_TAILCALL); | |
1196 | } | |
1197 | ||
44bb111a RH |
1198 | else |
1199 | emit_block_move_via_loop (x, y, size, align); | |
1200 | ||
1201 | if (method == BLOCK_OP_CALL_PARM) | |
1202 | OK_DEFER_POP; | |
266007a7 | 1203 | |
4ca79136 RH |
1204 | return retval; |
1205 | } | |
266007a7 | 1206 | |
079a182e JH |
1207 | rtx |
1208 | emit_block_move (rtx x, rtx y, rtx size, enum block_op_methods method) | |
1209 | { | |
3918b108 JH |
1210 | unsigned HOST_WIDE_INT max, min = 0; |
1211 | if (GET_CODE (size) == CONST_INT) | |
1212 | min = max = UINTVAL (size); | |
1213 | else | |
1214 | max = GET_MODE_MASK (GET_MODE (size)); | |
1215 | return emit_block_move_hints (x, y, size, method, 0, -1, | |
82bb7d4e | 1216 | min, max, max); |
079a182e JH |
1217 | } |
1218 | ||
502b8322 | 1219 | /* A subroutine of emit_block_move. Returns true if calling the |
44bb111a RH |
1220 | block move libcall will not clobber any parameters which may have |
1221 | already been placed on the stack. */ | |
1222 | ||
1223 | static bool | |
502b8322 | 1224 | block_move_libcall_safe_for_call_parm (void) |
44bb111a | 1225 | { |
81464b2c KT |
1226 | #if defined (REG_PARM_STACK_SPACE) |
1227 | tree fn; | |
1228 | #endif | |
1229 | ||
a357a6d4 | 1230 | /* If arguments are pushed on the stack, then they're safe. */ |
44bb111a RH |
1231 | if (PUSH_ARGS) |
1232 | return true; | |
44bb111a | 1233 | |
450b1728 | 1234 | /* If registers go on the stack anyway, any argument is sure to clobber |
a357a6d4 | 1235 | an outgoing argument. */ |
ac294f0b | 1236 | #if defined (REG_PARM_STACK_SPACE) |
81464b2c | 1237 | fn = emit_block_move_libcall_fn (false); |
5a905a2b JJ |
1238 | /* Avoid set but not used warning if *REG_PARM_STACK_SPACE doesn't |
1239 | depend on its argument. */ | |
1240 | (void) fn; | |
81464b2c KT |
1241 | if (OUTGOING_REG_PARM_STACK_SPACE ((!fn ? NULL_TREE : TREE_TYPE (fn))) |
1242 | && REG_PARM_STACK_SPACE (fn) != 0) | |
1243 | return false; | |
44bb111a | 1244 | #endif |
44bb111a | 1245 | |
a357a6d4 GK |
1246 | /* If any argument goes in memory, then it might clobber an outgoing |
1247 | argument. */ | |
1248 | { | |
d5cc9181 JR |
1249 | CUMULATIVE_ARGS args_so_far_v; |
1250 | cumulative_args_t args_so_far; | |
a357a6d4 | 1251 | tree fn, arg; |
450b1728 | 1252 | |
a357a6d4 | 1253 | fn = emit_block_move_libcall_fn (false); |
d5cc9181 JR |
1254 | INIT_CUMULATIVE_ARGS (args_so_far_v, TREE_TYPE (fn), NULL_RTX, 0, 3); |
1255 | args_so_far = pack_cumulative_args (&args_so_far_v); | |
450b1728 | 1256 | |
a357a6d4 GK |
1257 | arg = TYPE_ARG_TYPES (TREE_TYPE (fn)); |
1258 | for ( ; arg != void_list_node ; arg = TREE_CHAIN (arg)) | |
1259 | { | |
1260 | enum machine_mode mode = TYPE_MODE (TREE_VALUE (arg)); | |
d5cc9181 | 1261 | rtx tmp = targetm.calls.function_arg (args_so_far, mode, |
3c07301f | 1262 | NULL_TREE, true); |
a357a6d4 | 1263 | if (!tmp || !REG_P (tmp)) |
44bb111a | 1264 | return false; |
d5cc9181 | 1265 | if (targetm.calls.arg_partial_bytes (args_so_far, mode, NULL, 1)) |
a357a6d4 | 1266 | return false; |
d5cc9181 | 1267 | targetm.calls.function_arg_advance (args_so_far, mode, |
3c07301f | 1268 | NULL_TREE, true); |
a357a6d4 GK |
1269 | } |
1270 | } | |
1271 | return true; | |
44bb111a RH |
1272 | } |
1273 | ||
70128ad9 | 1274 | /* A subroutine of emit_block_move. Expand a movmem pattern; |
4ca79136 | 1275 | return true if successful. */ |
3ef1eef4 | 1276 | |
4ca79136 | 1277 | static bool |
079a182e | 1278 | emit_block_move_via_movmem (rtx x, rtx y, rtx size, unsigned int align, |
3918b108 JH |
1279 | unsigned int expected_align, HOST_WIDE_INT expected_size, |
1280 | unsigned HOST_WIDE_INT min_size, | |
82bb7d4e JH |
1281 | unsigned HOST_WIDE_INT max_size, |
1282 | unsigned HOST_WIDE_INT probable_max_size) | |
4ca79136 | 1283 | { |
a5e9c810 | 1284 | int save_volatile_ok = volatile_ok; |
4ca79136 | 1285 | enum machine_mode mode; |
266007a7 | 1286 | |
079a182e JH |
1287 | if (expected_align < align) |
1288 | expected_align = align; | |
3918b108 JH |
1289 | if (expected_size != -1) |
1290 | { | |
82bb7d4e JH |
1291 | if ((unsigned HOST_WIDE_INT)expected_size > probable_max_size) |
1292 | expected_size = probable_max_size; | |
3918b108 JH |
1293 | if ((unsigned HOST_WIDE_INT)expected_size < min_size) |
1294 | expected_size = min_size; | |
1295 | } | |
079a182e | 1296 | |
4ca79136 RH |
1297 | /* Since this is a move insn, we don't care about volatility. */ |
1298 | volatile_ok = 1; | |
1299 | ||
ee960939 OH |
1300 | /* Try the most limited insn first, because there's no point |
1301 | including more than one in the machine description unless | |
1302 | the more limited one has some advantage. */ | |
1303 | ||
4ca79136 RH |
1304 | for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode; |
1305 | mode = GET_MODE_WIDER_MODE (mode)) | |
1306 | { | |
f9621cc4 | 1307 | enum insn_code code = direct_optab_handler (movmem_optab, mode); |
4ca79136 RH |
1308 | |
1309 | if (code != CODE_FOR_nothing | |
1310 | /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT | |
1311 | here because if SIZE is less than the mode mask, as it is | |
1312 | returned by the macro, it will definitely be less than the | |
5689294c L |
1313 | actual mode mask. Since SIZE is within the Pmode address |
1314 | space, we limit MODE to Pmode. */ | |
481683e1 | 1315 | && ((CONST_INT_P (size) |
4ca79136 RH |
1316 | && ((unsigned HOST_WIDE_INT) INTVAL (size) |
1317 | <= (GET_MODE_MASK (mode) >> 1))) | |
3918b108 | 1318 | || max_size <= (GET_MODE_MASK (mode) >> 1) |
5689294c | 1319 | || GET_MODE_BITSIZE (mode) >= GET_MODE_BITSIZE (Pmode))) |
a5c7d693 | 1320 | { |
82bb7d4e | 1321 | struct expand_operand ops[9]; |
a5c7d693 | 1322 | unsigned int nops; |
4ca79136 RH |
1323 | |
1324 | /* ??? When called via emit_block_move_for_call, it'd be | |
1325 | nice if there were some way to inform the backend, so | |
1326 | that it doesn't fail the expansion because it thinks | |
1327 | emitting the libcall would be more efficient. */ | |
f04713ee | 1328 | nops = insn_data[(int) code].n_generator_args; |
82bb7d4e | 1329 | gcc_assert (nops == 4 || nops == 6 || nops == 8 || nops == 9); |
c2654ded | 1330 | |
a5c7d693 RS |
1331 | create_fixed_operand (&ops[0], x); |
1332 | create_fixed_operand (&ops[1], y); | |
1333 | /* The check above guarantees that this size conversion is valid. */ | |
1334 | create_convert_operand_to (&ops[2], size, mode, true); | |
1335 | create_integer_operand (&ops[3], align / BITS_PER_UNIT); | |
3918b108 | 1336 | if (nops >= 6) |
a5c7d693 RS |
1337 | { |
1338 | create_integer_operand (&ops[4], expected_align / BITS_PER_UNIT); | |
1339 | create_integer_operand (&ops[5], expected_size); | |
a5c7d693 | 1340 | } |
82bb7d4e | 1341 | if (nops >= 8) |
3918b108 JH |
1342 | { |
1343 | create_integer_operand (&ops[6], min_size); | |
1344 | /* If we can not represent the maximal size, | |
1345 | make parameter NULL. */ | |
1346 | if ((HOST_WIDE_INT) max_size != -1) | |
1347 | create_integer_operand (&ops[7], max_size); | |
1348 | else | |
1349 | create_fixed_operand (&ops[7], NULL); | |
1350 | } | |
82bb7d4e JH |
1351 | if (nops == 9) |
1352 | { | |
1353 | /* If we can not represent the maximal size, | |
1354 | make parameter NULL. */ | |
1355 | if ((HOST_WIDE_INT) probable_max_size != -1) | |
1356 | create_integer_operand (&ops[8], probable_max_size); | |
1357 | else | |
1358 | create_fixed_operand (&ops[8], NULL); | |
1359 | } | |
a5c7d693 | 1360 | if (maybe_expand_insn (code, nops, ops)) |
4ca79136 | 1361 | { |
a5e9c810 | 1362 | volatile_ok = save_volatile_ok; |
4ca79136 | 1363 | return true; |
bbf6f052 RK |
1364 | } |
1365 | } | |
4ca79136 | 1366 | } |
bbf6f052 | 1367 | |
a5e9c810 | 1368 | volatile_ok = save_volatile_ok; |
4ca79136 RH |
1369 | return false; |
1370 | } | |
3ef1eef4 | 1371 | |
8f99553f | 1372 | /* A subroutine of emit_block_move. Expand a call to memcpy. |
4ca79136 | 1373 | Return the return value from memcpy, 0 otherwise. */ |
4bc973ae | 1374 | |
8c996513 | 1375 | rtx |
8148fe65 | 1376 | emit_block_move_via_libcall (rtx dst, rtx src, rtx size, bool tailcall) |
4ca79136 | 1377 | { |
ee960939 | 1378 | rtx dst_addr, src_addr; |
5039610b | 1379 | tree call_expr, fn, src_tree, dst_tree, size_tree; |
4ca79136 RH |
1380 | enum machine_mode size_mode; |
1381 | rtx retval; | |
4bc973ae | 1382 | |
ad76cef8 PB |
1383 | /* Emit code to copy the addresses of DST and SRC and SIZE into new |
1384 | pseudos. We can then place those new pseudos into a VAR_DECL and | |
1385 | use them later. */ | |
ee960939 | 1386 | |
18ae1560 UB |
1387 | dst_addr = copy_addr_to_reg (XEXP (dst, 0)); |
1388 | src_addr = copy_addr_to_reg (XEXP (src, 0)); | |
4ca79136 | 1389 | |
ee960939 OH |
1390 | dst_addr = convert_memory_address (ptr_mode, dst_addr); |
1391 | src_addr = convert_memory_address (ptr_mode, src_addr); | |
ee960939 OH |
1392 | |
1393 | dst_tree = make_tree (ptr_type_node, dst_addr); | |
1394 | src_tree = make_tree (ptr_type_node, src_addr); | |
4ca79136 | 1395 | |
8f99553f | 1396 | size_mode = TYPE_MODE (sizetype); |
ee960939 | 1397 | |
4ca79136 RH |
1398 | size = convert_to_mode (size_mode, size, 1); |
1399 | size = copy_to_mode_reg (size_mode, size); | |
1400 | ||
1401 | /* It is incorrect to use the libcall calling conventions to call | |
1402 | memcpy in this context. This could be a user call to memcpy and | |
1403 | the user may wish to examine the return value from memcpy. For | |
1404 | targets where libcalls and normal calls have different conventions | |
8f99553f | 1405 | for returning pointers, we could end up generating incorrect code. */ |
4ca79136 | 1406 | |
8f99553f | 1407 | size_tree = make_tree (sizetype, size); |
4ca79136 RH |
1408 | |
1409 | fn = emit_block_move_libcall_fn (true); | |
5039610b | 1410 | call_expr = build_call_expr (fn, 3, dst_tree, src_tree, size_tree); |
8148fe65 | 1411 | CALL_EXPR_TAILCALL (call_expr) = tailcall; |
4ca79136 | 1412 | |
84217346 | 1413 | retval = expand_normal (call_expr); |
4ca79136 | 1414 | |
8f99553f | 1415 | return retval; |
4ca79136 | 1416 | } |
52cf7115 | 1417 | |
4ca79136 | 1418 | /* A subroutine of emit_block_move_via_libcall. Create the tree node |
bbee5843 | 1419 | for the function we use for block copies. */ |
52cf7115 | 1420 | |
4ca79136 RH |
1421 | static GTY(()) tree block_move_fn; |
1422 | ||
9661b15f | 1423 | void |
502b8322 | 1424 | init_block_move_fn (const char *asmspec) |
4ca79136 | 1425 | { |
9661b15f | 1426 | if (!block_move_fn) |
4ca79136 | 1427 | { |
e384e6b5 | 1428 | tree args, fn, attrs, attr_args; |
9661b15f | 1429 | |
8f99553f JM |
1430 | fn = get_identifier ("memcpy"); |
1431 | args = build_function_type_list (ptr_type_node, ptr_type_node, | |
1432 | const_ptr_type_node, sizetype, | |
1433 | NULL_TREE); | |
52cf7115 | 1434 | |
c2255bc4 | 1435 | fn = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL, fn, args); |
4ca79136 RH |
1436 | DECL_EXTERNAL (fn) = 1; |
1437 | TREE_PUBLIC (fn) = 1; | |
1438 | DECL_ARTIFICIAL (fn) = 1; | |
1439 | TREE_NOTHROW (fn) = 1; | |
5b5cba1f JM |
1440 | DECL_VISIBILITY (fn) = VISIBILITY_DEFAULT; |
1441 | DECL_VISIBILITY_SPECIFIED (fn) = 1; | |
66c60e67 | 1442 | |
e384e6b5 BS |
1443 | attr_args = build_tree_list (NULL_TREE, build_string (1, "1")); |
1444 | attrs = tree_cons (get_identifier ("fn spec"), attr_args, NULL); | |
1445 | ||
1446 | decl_attributes (&fn, attrs, ATTR_FLAG_BUILT_IN); | |
1447 | ||
4ca79136 | 1448 | block_move_fn = fn; |
bbf6f052 | 1449 | } |
e9a25f70 | 1450 | |
9661b15f | 1451 | if (asmspec) |
0e6df31e | 1452 | set_user_assembler_name (block_move_fn, asmspec); |
9661b15f JJ |
1453 | } |
1454 | ||
1455 | static tree | |
502b8322 | 1456 | emit_block_move_libcall_fn (int for_call) |
9661b15f JJ |
1457 | { |
1458 | static bool emitted_extern; | |
1459 | ||
1460 | if (!block_move_fn) | |
1461 | init_block_move_fn (NULL); | |
1462 | ||
4ca79136 RH |
1463 | if (for_call && !emitted_extern) |
1464 | { | |
1465 | emitted_extern = true; | |
0e6df31e | 1466 | make_decl_rtl (block_move_fn); |
4ca79136 RH |
1467 | } |
1468 | ||
9661b15f | 1469 | return block_move_fn; |
bbf6f052 | 1470 | } |
44bb111a RH |
1471 | |
1472 | /* A subroutine of emit_block_move. Copy the data via an explicit | |
1473 | loop. This is used only when libcalls are forbidden. */ | |
1474 | /* ??? It'd be nice to copy in hunks larger than QImode. */ | |
1475 | ||
1476 | static void | |
502b8322 AJ |
1477 | emit_block_move_via_loop (rtx x, rtx y, rtx size, |
1478 | unsigned int align ATTRIBUTE_UNUSED) | |
44bb111a | 1479 | { |
770affca DM |
1480 | rtx_code_label *cmp_label, *top_label; |
1481 | rtx iter, x_addr, y_addr, tmp; | |
372d6395 RS |
1482 | enum machine_mode x_addr_mode = get_address_mode (x); |
1483 | enum machine_mode y_addr_mode = get_address_mode (y); | |
44bb111a RH |
1484 | enum machine_mode iter_mode; |
1485 | ||
1486 | iter_mode = GET_MODE (size); | |
1487 | if (iter_mode == VOIDmode) | |
1488 | iter_mode = word_mode; | |
1489 | ||
1490 | top_label = gen_label_rtx (); | |
1491 | cmp_label = gen_label_rtx (); | |
1492 | iter = gen_reg_rtx (iter_mode); | |
1493 | ||
1494 | emit_move_insn (iter, const0_rtx); | |
1495 | ||
1496 | x_addr = force_operand (XEXP (x, 0), NULL_RTX); | |
1497 | y_addr = force_operand (XEXP (y, 0), NULL_RTX); | |
1498 | do_pending_stack_adjust (); | |
1499 | ||
44bb111a RH |
1500 | emit_jump (cmp_label); |
1501 | emit_label (top_label); | |
1502 | ||
d4ebfa65 | 1503 | tmp = convert_modes (x_addr_mode, iter_mode, iter, true); |
dc3e0b55 | 1504 | x_addr = simplify_gen_binary (PLUS, x_addr_mode, x_addr, tmp); |
d4ebfa65 BE |
1505 | |
1506 | if (x_addr_mode != y_addr_mode) | |
1507 | tmp = convert_modes (y_addr_mode, iter_mode, iter, true); | |
dc3e0b55 | 1508 | y_addr = simplify_gen_binary (PLUS, y_addr_mode, y_addr, tmp); |
d4ebfa65 | 1509 | |
44bb111a RH |
1510 | x = change_address (x, QImode, x_addr); |
1511 | y = change_address (y, QImode, y_addr); | |
1512 | ||
1513 | emit_move_insn (x, y); | |
1514 | ||
1515 | tmp = expand_simple_binop (iter_mode, PLUS, iter, const1_rtx, iter, | |
1516 | true, OPTAB_LIB_WIDEN); | |
1517 | if (tmp != iter) | |
1518 | emit_move_insn (iter, tmp); | |
1519 | ||
44bb111a RH |
1520 | emit_label (cmp_label); |
1521 | ||
1522 | emit_cmp_and_jump_insns (iter, size, LT, NULL_RTX, iter_mode, | |
a4da41e1 | 1523 | true, top_label, REG_BR_PROB_BASE * 90 / 100); |
44bb111a | 1524 | } |
bbf6f052 RK |
1525 | \f |
1526 | /* Copy all or part of a value X into registers starting at REGNO. | |
1527 | The number of registers to be filled is NREGS. */ | |
1528 | ||
1529 | void | |
502b8322 | 1530 | move_block_to_reg (int regno, rtx x, int nregs, enum machine_mode mode) |
bbf6f052 RK |
1531 | { |
1532 | int i; | |
381127e8 | 1533 | #ifdef HAVE_load_multiple |
3a94c984 | 1534 | rtx pat; |
770affca | 1535 | rtx_insn *last; |
381127e8 | 1536 | #endif |
bbf6f052 | 1537 | |
72bb9717 RK |
1538 | if (nregs == 0) |
1539 | return; | |
1540 | ||
1a627b35 | 1541 | if (CONSTANT_P (x) && !targetm.legitimate_constant_p (mode, x)) |
bbf6f052 RK |
1542 | x = validize_mem (force_const_mem (mode, x)); |
1543 | ||
1544 | /* See if the machine can do this with a load multiple insn. */ | |
1545 | #ifdef HAVE_load_multiple | |
c3a02afe | 1546 | if (HAVE_load_multiple) |
bbf6f052 | 1547 | { |
c3a02afe | 1548 | last = get_last_insn (); |
38a448ca | 1549 | pat = gen_load_multiple (gen_rtx_REG (word_mode, regno), x, |
c3a02afe RK |
1550 | GEN_INT (nregs)); |
1551 | if (pat) | |
1552 | { | |
1553 | emit_insn (pat); | |
1554 | return; | |
1555 | } | |
1556 | else | |
1557 | delete_insns_since (last); | |
bbf6f052 | 1558 | } |
bbf6f052 RK |
1559 | #endif |
1560 | ||
1561 | for (i = 0; i < nregs; i++) | |
38a448ca | 1562 | emit_move_insn (gen_rtx_REG (word_mode, regno + i), |
bbf6f052 RK |
1563 | operand_subword_force (x, i, mode)); |
1564 | } | |
1565 | ||
1566 | /* Copy all or part of a BLKmode value X out of registers starting at REGNO. | |
c6b97fac | 1567 | The number of registers to be filled is NREGS. */ |
0040593d | 1568 | |
bbf6f052 | 1569 | void |
502b8322 | 1570 | move_block_from_reg (int regno, rtx x, int nregs) |
bbf6f052 RK |
1571 | { |
1572 | int i; | |
bbf6f052 | 1573 | |
2954d7db RK |
1574 | if (nregs == 0) |
1575 | return; | |
1576 | ||
bbf6f052 RK |
1577 | /* See if the machine can do this with a store multiple insn. */ |
1578 | #ifdef HAVE_store_multiple | |
c3a02afe | 1579 | if (HAVE_store_multiple) |
bbf6f052 | 1580 | { |
770affca | 1581 | rtx_insn *last = get_last_insn (); |
c6b97fac AM |
1582 | rtx pat = gen_store_multiple (x, gen_rtx_REG (word_mode, regno), |
1583 | GEN_INT (nregs)); | |
c3a02afe RK |
1584 | if (pat) |
1585 | { | |
1586 | emit_insn (pat); | |
1587 | return; | |
1588 | } | |
1589 | else | |
1590 | delete_insns_since (last); | |
bbf6f052 | 1591 | } |
bbf6f052 RK |
1592 | #endif |
1593 | ||
1594 | for (i = 0; i < nregs; i++) | |
1595 | { | |
1596 | rtx tem = operand_subword (x, i, 1, BLKmode); | |
1597 | ||
5b0264cb | 1598 | gcc_assert (tem); |
bbf6f052 | 1599 | |
38a448ca | 1600 | emit_move_insn (tem, gen_rtx_REG (word_mode, regno + i)); |
bbf6f052 RK |
1601 | } |
1602 | } | |
1603 | ||
084a1106 JDA |
1604 | /* Generate a PARALLEL rtx for a new non-consecutive group of registers from |
1605 | ORIG, where ORIG is a non-consecutive group of registers represented by | |
1606 | a PARALLEL. The clone is identical to the original except in that the | |
1607 | original set of registers is replaced by a new set of pseudo registers. | |
1608 | The new set has the same modes as the original set. */ | |
1609 | ||
1610 | rtx | |
502b8322 | 1611 | gen_group_rtx (rtx orig) |
084a1106 JDA |
1612 | { |
1613 | int i, length; | |
1614 | rtx *tmps; | |
1615 | ||
5b0264cb | 1616 | gcc_assert (GET_CODE (orig) == PARALLEL); |
084a1106 JDA |
1617 | |
1618 | length = XVECLEN (orig, 0); | |
1b4572a8 | 1619 | tmps = XALLOCAVEC (rtx, length); |
084a1106 JDA |
1620 | |
1621 | /* Skip a NULL entry in first slot. */ | |
1622 | i = XEXP (XVECEXP (orig, 0, 0), 0) ? 0 : 1; | |
1623 | ||
1624 | if (i) | |
1625 | tmps[0] = 0; | |
1626 | ||
1627 | for (; i < length; i++) | |
1628 | { | |
1629 | enum machine_mode mode = GET_MODE (XEXP (XVECEXP (orig, 0, i), 0)); | |
1630 | rtx offset = XEXP (XVECEXP (orig, 0, i), 1); | |
1631 | ||
1632 | tmps[i] = gen_rtx_EXPR_LIST (VOIDmode, gen_reg_rtx (mode), offset); | |
1633 | } | |
1634 | ||
1635 | return gen_rtx_PARALLEL (GET_MODE (orig), gen_rtvec_v (length, tmps)); | |
1636 | } | |
1637 | ||
27e29549 RH |
1638 | /* A subroutine of emit_group_load. Arguments as for emit_group_load, |
1639 | except that values are placed in TMPS[i], and must later be moved | |
daa956d0 | 1640 | into corresponding XEXP (XVECEXP (DST, 0, i), 0) element. */ |
fffa9c1d | 1641 | |
27e29549 RH |
1642 | static void |
1643 | emit_group_load_1 (rtx *tmps, rtx dst, rtx orig_src, tree type, int ssize) | |
fffa9c1d | 1644 | { |
27e29549 | 1645 | rtx src; |
aac5cc16 | 1646 | int start, i; |
7ef7000b | 1647 | enum machine_mode m = GET_MODE (orig_src); |
fffa9c1d | 1648 | |
5b0264cb | 1649 | gcc_assert (GET_CODE (dst) == PARALLEL); |
fffa9c1d | 1650 | |
f2978871 AM |
1651 | if (m != VOIDmode |
1652 | && !SCALAR_INT_MODE_P (m) | |
1653 | && !MEM_P (orig_src) | |
1654 | && GET_CODE (orig_src) != CONCAT) | |
782fa603 AH |
1655 | { |
1656 | enum machine_mode imode = int_mode_for_mode (GET_MODE (orig_src)); | |
1657 | if (imode == BLKmode) | |
9474e8ab | 1658 | src = assign_stack_temp (GET_MODE (orig_src), ssize); |
782fa603 AH |
1659 | else |
1660 | src = gen_reg_rtx (imode); | |
1661 | if (imode != BLKmode) | |
1662 | src = gen_lowpart (GET_MODE (orig_src), src); | |
1663 | emit_move_insn (src, orig_src); | |
1664 | /* ...and back again. */ | |
1665 | if (imode != BLKmode) | |
1666 | src = gen_lowpart (imode, src); | |
27e29549 | 1667 | emit_group_load_1 (tmps, dst, src, type, ssize); |
782fa603 AH |
1668 | return; |
1669 | } | |
1670 | ||
fffa9c1d JW |
1671 | /* Check for a NULL entry, used to indicate that the parameter goes |
1672 | both on the stack and in registers. */ | |
aac5cc16 RH |
1673 | if (XEXP (XVECEXP (dst, 0, 0), 0)) |
1674 | start = 0; | |
fffa9c1d | 1675 | else |
aac5cc16 RH |
1676 | start = 1; |
1677 | ||
aac5cc16 RH |
1678 | /* Process the pieces. */ |
1679 | for (i = start; i < XVECLEN (dst, 0); i++) | |
1680 | { | |
1681 | enum machine_mode mode = GET_MODE (XEXP (XVECEXP (dst, 0, i), 0)); | |
770ae6cc RK |
1682 | HOST_WIDE_INT bytepos = INTVAL (XEXP (XVECEXP (dst, 0, i), 1)); |
1683 | unsigned int bytelen = GET_MODE_SIZE (mode); | |
aac5cc16 RH |
1684 | int shift = 0; |
1685 | ||
1686 | /* Handle trailing fragments that run over the size of the struct. */ | |
8752c357 | 1687 | if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize) |
aac5cc16 | 1688 | { |
6e985040 AM |
1689 | /* Arrange to shift the fragment to where it belongs. |
1690 | extract_bit_field loads to the lsb of the reg. */ | |
1691 | if ( | |
1692 | #ifdef BLOCK_REG_PADDING | |
1693 | BLOCK_REG_PADDING (GET_MODE (orig_src), type, i == start) | |
1694 | == (BYTES_BIG_ENDIAN ? upward : downward) | |
1695 | #else | |
1696 | BYTES_BIG_ENDIAN | |
1697 | #endif | |
1698 | ) | |
1699 | shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT; | |
aac5cc16 | 1700 | bytelen = ssize - bytepos; |
5b0264cb | 1701 | gcc_assert (bytelen > 0); |
aac5cc16 RH |
1702 | } |
1703 | ||
f3ce87a9 DE |
1704 | /* If we won't be loading directly from memory, protect the real source |
1705 | from strange tricks we might play; but make sure that the source can | |
1706 | be loaded directly into the destination. */ | |
1707 | src = orig_src; | |
3c0cb5de | 1708 | if (!MEM_P (orig_src) |
f3ce87a9 DE |
1709 | && (!CONSTANT_P (orig_src) |
1710 | || (GET_MODE (orig_src) != mode | |
1711 | && GET_MODE (orig_src) != VOIDmode))) | |
1712 | { | |
1713 | if (GET_MODE (orig_src) == VOIDmode) | |
1714 | src = gen_reg_rtx (mode); | |
1715 | else | |
1716 | src = gen_reg_rtx (GET_MODE (orig_src)); | |
04050c69 | 1717 | |
f3ce87a9 DE |
1718 | emit_move_insn (src, orig_src); |
1719 | } | |
1720 | ||
aac5cc16 | 1721 | /* Optimize the access just a bit. */ |
3c0cb5de | 1722 | if (MEM_P (src) |
6e985040 AM |
1723 | && (! SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (src)) |
1724 | || MEM_ALIGN (src) >= GET_MODE_ALIGNMENT (mode)) | |
729a2125 | 1725 | && bytepos * BITS_PER_UNIT % GET_MODE_ALIGNMENT (mode) == 0 |
aac5cc16 RH |
1726 | && bytelen == GET_MODE_SIZE (mode)) |
1727 | { | |
1728 | tmps[i] = gen_reg_rtx (mode); | |
f4ef873c | 1729 | emit_move_insn (tmps[i], adjust_address (src, mode, bytepos)); |
fffa9c1d | 1730 | } |
d20b1190 EB |
1731 | else if (COMPLEX_MODE_P (mode) |
1732 | && GET_MODE (src) == mode | |
1733 | && bytelen == GET_MODE_SIZE (mode)) | |
1734 | /* Let emit_move_complex do the bulk of the work. */ | |
1735 | tmps[i] = src; | |
7c4a6db0 JW |
1736 | else if (GET_CODE (src) == CONCAT) |
1737 | { | |
015b1ad1 JDA |
1738 | unsigned int slen = GET_MODE_SIZE (GET_MODE (src)); |
1739 | unsigned int slen0 = GET_MODE_SIZE (GET_MODE (XEXP (src, 0))); | |
1740 | ||
1741 | if ((bytepos == 0 && bytelen == slen0) | |
1742 | || (bytepos != 0 && bytepos + bytelen <= slen)) | |
cbb92744 | 1743 | { |
015b1ad1 JDA |
1744 | /* The following assumes that the concatenated objects all |
1745 | have the same size. In this case, a simple calculation | |
1746 | can be used to determine the object and the bit field | |
1747 | to be extracted. */ | |
1748 | tmps[i] = XEXP (src, bytepos / slen0); | |
cbb92744 | 1749 | if (! CONSTANT_P (tmps[i]) |
f8cfc6aa | 1750 | && (!REG_P (tmps[i]) || GET_MODE (tmps[i]) != mode)) |
cbb92744 | 1751 | tmps[i] = extract_bit_field (tmps[i], bytelen * BITS_PER_UNIT, |
015b1ad1 | 1752 | (bytepos % slen0) * BITS_PER_UNIT, |
c6285bd7 | 1753 | 1, NULL_RTX, mode, mode); |
cbb92744 | 1754 | } |
5b0264cb | 1755 | else |
58f69841 | 1756 | { |
5b0264cb | 1757 | rtx mem; |
f58c00e3 | 1758 | |
5b0264cb | 1759 | gcc_assert (!bytepos); |
9474e8ab | 1760 | mem = assign_stack_temp (GET_MODE (src), slen); |
58f69841 | 1761 | emit_move_insn (mem, src); |
f58c00e3 | 1762 | tmps[i] = extract_bit_field (mem, bytelen * BITS_PER_UNIT, |
c6285bd7 | 1763 | 0, 1, NULL_RTX, mode, mode); |
58f69841 | 1764 | } |
7c4a6db0 | 1765 | } |
9c0631a7 AH |
1766 | /* FIXME: A SIMD parallel will eventually lead to a subreg of a |
1767 | SIMD register, which is currently broken. While we get GCC | |
1768 | to emit proper RTL for these cases, let's dump to memory. */ | |
1769 | else if (VECTOR_MODE_P (GET_MODE (dst)) | |
f8cfc6aa | 1770 | && REG_P (src)) |
9c0631a7 AH |
1771 | { |
1772 | int slen = GET_MODE_SIZE (GET_MODE (src)); | |
1773 | rtx mem; | |
1774 | ||
9474e8ab | 1775 | mem = assign_stack_temp (GET_MODE (src), slen); |
9c0631a7 AH |
1776 | emit_move_insn (mem, src); |
1777 | tmps[i] = adjust_address (mem, mode, (int) bytepos); | |
1778 | } | |
d3a16cbd FJ |
1779 | else if (CONSTANT_P (src) && GET_MODE (dst) != BLKmode |
1780 | && XVECLEN (dst, 0) > 1) | |
c3284718 | 1781 | tmps[i] = simplify_gen_subreg (mode, src, GET_MODE (dst), bytepos); |
7cefcade JDA |
1782 | else if (CONSTANT_P (src)) |
1783 | { | |
1784 | HOST_WIDE_INT len = (HOST_WIDE_INT) bytelen; | |
1785 | ||
1786 | if (len == ssize) | |
1787 | tmps[i] = src; | |
1788 | else | |
1789 | { | |
1790 | rtx first, second; | |
1791 | ||
807e902e | 1792 | /* TODO: const_wide_int can have sizes other than this... */ |
7cefcade JDA |
1793 | gcc_assert (2 * len == ssize); |
1794 | split_double (src, &first, &second); | |
1795 | if (i) | |
1796 | tmps[i] = second; | |
1797 | else | |
1798 | tmps[i] = first; | |
1799 | } | |
1800 | } | |
1801 | else if (REG_P (src) && GET_MODE (src) == mode) | |
2ee5437b | 1802 | tmps[i] = src; |
fffa9c1d | 1803 | else |
19caa751 | 1804 | tmps[i] = extract_bit_field (src, bytelen * BITS_PER_UNIT, |
c6285bd7 | 1805 | bytepos * BITS_PER_UNIT, 1, NULL_RTX, |
b3520980 | 1806 | mode, mode); |
fffa9c1d | 1807 | |
6e985040 | 1808 | if (shift) |
09b52670 | 1809 | tmps[i] = expand_shift (LSHIFT_EXPR, mode, tmps[i], |
eb6c3df1 | 1810 | shift, tmps[i], 0); |
fffa9c1d | 1811 | } |
27e29549 RH |
1812 | } |
1813 | ||
1814 | /* Emit code to move a block SRC of type TYPE to a block DST, | |
1815 | where DST is non-consecutive registers represented by a PARALLEL. | |
1816 | SSIZE represents the total size of block ORIG_SRC in bytes, or -1 | |
1817 | if not known. */ | |
1818 | ||
1819 | void | |
1820 | emit_group_load (rtx dst, rtx src, tree type, int ssize) | |
1821 | { | |
1822 | rtx *tmps; | |
1823 | int i; | |
1824 | ||
1b4572a8 | 1825 | tmps = XALLOCAVEC (rtx, XVECLEN (dst, 0)); |
27e29549 | 1826 | emit_group_load_1 (tmps, dst, src, type, ssize); |
19caa751 | 1827 | |
aac5cc16 | 1828 | /* Copy the extracted pieces into the proper (probable) hard regs. */ |
27e29549 RH |
1829 | for (i = 0; i < XVECLEN (dst, 0); i++) |
1830 | { | |
1831 | rtx d = XEXP (XVECEXP (dst, 0, i), 0); | |
1832 | if (d == NULL) | |
1833 | continue; | |
1834 | emit_move_insn (d, tmps[i]); | |
1835 | } | |
1836 | } | |
1837 | ||
1838 | /* Similar, but load SRC into new pseudos in a format that looks like | |
1839 | PARALLEL. This can later be fed to emit_group_move to get things | |
1840 | in the right place. */ | |
1841 | ||
1842 | rtx | |
1843 | emit_group_load_into_temps (rtx parallel, rtx src, tree type, int ssize) | |
1844 | { | |
1845 | rtvec vec; | |
1846 | int i; | |
1847 | ||
1848 | vec = rtvec_alloc (XVECLEN (parallel, 0)); | |
1849 | emit_group_load_1 (&RTVEC_ELT (vec, 0), parallel, src, type, ssize); | |
1850 | ||
1851 | /* Convert the vector to look just like the original PARALLEL, except | |
1852 | with the computed values. */ | |
1853 | for (i = 0; i < XVECLEN (parallel, 0); i++) | |
1854 | { | |
1855 | rtx e = XVECEXP (parallel, 0, i); | |
1856 | rtx d = XEXP (e, 0); | |
1857 | ||
1858 | if (d) | |
1859 | { | |
1860 | d = force_reg (GET_MODE (d), RTVEC_ELT (vec, i)); | |
1861 | e = alloc_EXPR_LIST (REG_NOTE_KIND (e), d, XEXP (e, 1)); | |
1862 | } | |
1863 | RTVEC_ELT (vec, i) = e; | |
1864 | } | |
1865 | ||
1866 | return gen_rtx_PARALLEL (GET_MODE (parallel), vec); | |
fffa9c1d JW |
1867 | } |
1868 | ||
084a1106 JDA |
1869 | /* Emit code to move a block SRC to block DST, where SRC and DST are |
1870 | non-consecutive groups of registers, each represented by a PARALLEL. */ | |
1871 | ||
1872 | void | |
502b8322 | 1873 | emit_group_move (rtx dst, rtx src) |
084a1106 JDA |
1874 | { |
1875 | int i; | |
1876 | ||
5b0264cb NS |
1877 | gcc_assert (GET_CODE (src) == PARALLEL |
1878 | && GET_CODE (dst) == PARALLEL | |
1879 | && XVECLEN (src, 0) == XVECLEN (dst, 0)); | |
084a1106 JDA |
1880 | |
1881 | /* Skip first entry if NULL. */ | |
1882 | for (i = XEXP (XVECEXP (src, 0, 0), 0) ? 0 : 1; i < XVECLEN (src, 0); i++) | |
1883 | emit_move_insn (XEXP (XVECEXP (dst, 0, i), 0), | |
1884 | XEXP (XVECEXP (src, 0, i), 0)); | |
1885 | } | |
1886 | ||
27e29549 RH |
1887 | /* Move a group of registers represented by a PARALLEL into pseudos. */ |
1888 | ||
1889 | rtx | |
1890 | emit_group_move_into_temps (rtx src) | |
1891 | { | |
1892 | rtvec vec = rtvec_alloc (XVECLEN (src, 0)); | |
1893 | int i; | |
1894 | ||
1895 | for (i = 0; i < XVECLEN (src, 0); i++) | |
1896 | { | |
1897 | rtx e = XVECEXP (src, 0, i); | |
1898 | rtx d = XEXP (e, 0); | |
1899 | ||
1900 | if (d) | |
1901 | e = alloc_EXPR_LIST (REG_NOTE_KIND (e), copy_to_reg (d), XEXP (e, 1)); | |
1902 | RTVEC_ELT (vec, i) = e; | |
1903 | } | |
1904 | ||
1905 | return gen_rtx_PARALLEL (GET_MODE (src), vec); | |
1906 | } | |
1907 | ||
6e985040 AM |
1908 | /* Emit code to move a block SRC to a block ORIG_DST of type TYPE, |
1909 | where SRC is non-consecutive registers represented by a PARALLEL. | |
1910 | SSIZE represents the total size of block ORIG_DST, or -1 if not | |
1911 | known. */ | |
fffa9c1d JW |
1912 | |
1913 | void | |
6e985040 | 1914 | emit_group_store (rtx orig_dst, rtx src, tree type ATTRIBUTE_UNUSED, int ssize) |
fffa9c1d | 1915 | { |
aac5cc16 | 1916 | rtx *tmps, dst; |
79edfde8 | 1917 | int start, finish, i; |
7ef7000b | 1918 | enum machine_mode m = GET_MODE (orig_dst); |
fffa9c1d | 1919 | |
5b0264cb | 1920 | gcc_assert (GET_CODE (src) == PARALLEL); |
fffa9c1d | 1921 | |
0da34ce4 RH |
1922 | if (!SCALAR_INT_MODE_P (m) |
1923 | && !MEM_P (orig_dst) && GET_CODE (orig_dst) != CONCAT) | |
782fa603 AH |
1924 | { |
1925 | enum machine_mode imode = int_mode_for_mode (GET_MODE (orig_dst)); | |
1926 | if (imode == BLKmode) | |
9474e8ab | 1927 | dst = assign_stack_temp (GET_MODE (orig_dst), ssize); |
782fa603 AH |
1928 | else |
1929 | dst = gen_reg_rtx (imode); | |
1930 | emit_group_store (dst, src, type, ssize); | |
1931 | if (imode != BLKmode) | |
1932 | dst = gen_lowpart (GET_MODE (orig_dst), dst); | |
1933 | emit_move_insn (orig_dst, dst); | |
1934 | return; | |
1935 | } | |
1936 | ||
fffa9c1d JW |
1937 | /* Check for a NULL entry, used to indicate that the parameter goes |
1938 | both on the stack and in registers. */ | |
aac5cc16 RH |
1939 | if (XEXP (XVECEXP (src, 0, 0), 0)) |
1940 | start = 0; | |
fffa9c1d | 1941 | else |
aac5cc16 | 1942 | start = 1; |
79edfde8 | 1943 | finish = XVECLEN (src, 0); |
aac5cc16 | 1944 | |
1b4572a8 | 1945 | tmps = XALLOCAVEC (rtx, finish); |
fffa9c1d | 1946 | |
aac5cc16 | 1947 | /* Copy the (probable) hard regs into pseudos. */ |
79edfde8 | 1948 | for (i = start; i < finish; i++) |
fffa9c1d | 1949 | { |
aac5cc16 | 1950 | rtx reg = XEXP (XVECEXP (src, 0, i), 0); |
5ac60669 RS |
1951 | if (!REG_P (reg) || REGNO (reg) < FIRST_PSEUDO_REGISTER) |
1952 | { | |
1953 | tmps[i] = gen_reg_rtx (GET_MODE (reg)); | |
1954 | emit_move_insn (tmps[i], reg); | |
1955 | } | |
1956 | else | |
1957 | tmps[i] = reg; | |
aac5cc16 | 1958 | } |
fffa9c1d | 1959 | |
aac5cc16 RH |
1960 | /* If we won't be storing directly into memory, protect the real destination |
1961 | from strange tricks we might play. */ | |
1962 | dst = orig_dst; | |
10a9f2be JW |
1963 | if (GET_CODE (dst) == PARALLEL) |
1964 | { | |
1965 | rtx temp; | |
1966 | ||
1967 | /* We can get a PARALLEL dst if there is a conditional expression in | |
1968 | a return statement. In that case, the dst and src are the same, | |
1969 | so no action is necessary. */ | |
1970 | if (rtx_equal_p (dst, src)) | |
1971 | return; | |
1972 | ||
1973 | /* It is unclear if we can ever reach here, but we may as well handle | |
1974 | it. Allocate a temporary, and split this into a store/load to/from | |
1975 | the temporary. */ | |
9474e8ab | 1976 | temp = assign_stack_temp (GET_MODE (dst), ssize); |
6e985040 AM |
1977 | emit_group_store (temp, src, type, ssize); |
1978 | emit_group_load (dst, temp, type, ssize); | |
10a9f2be JW |
1979 | return; |
1980 | } | |
3c0cb5de | 1981 | else if (!MEM_P (dst) && GET_CODE (dst) != CONCAT) |
aac5cc16 | 1982 | { |
79edfde8 RS |
1983 | enum machine_mode outer = GET_MODE (dst); |
1984 | enum machine_mode inner; | |
5650dfbd | 1985 | HOST_WIDE_INT bytepos; |
79edfde8 RS |
1986 | bool done = false; |
1987 | rtx temp; | |
1988 | ||
5ac60669 | 1989 | if (!REG_P (dst) || REGNO (dst) < FIRST_PSEUDO_REGISTER) |
79edfde8 RS |
1990 | dst = gen_reg_rtx (outer); |
1991 | ||
aac5cc16 | 1992 | /* Make life a bit easier for combine. */ |
79edfde8 RS |
1993 | /* If the first element of the vector is the low part |
1994 | of the destination mode, use a paradoxical subreg to | |
1995 | initialize the destination. */ | |
1996 | if (start < finish) | |
1997 | { | |
1998 | inner = GET_MODE (tmps[start]); | |
7488662d | 1999 | bytepos = subreg_lowpart_offset (inner, outer); |
79edfde8 RS |
2000 | if (INTVAL (XEXP (XVECEXP (src, 0, start), 1)) == bytepos) |
2001 | { | |
2002 | temp = simplify_gen_subreg (outer, tmps[start], | |
7488662d | 2003 | inner, 0); |
9fd20553 RS |
2004 | if (temp) |
2005 | { | |
2006 | emit_move_insn (dst, temp); | |
2007 | done = true; | |
2008 | start++; | |
2009 | } | |
79edfde8 RS |
2010 | } |
2011 | } | |
2012 | ||
2013 | /* If the first element wasn't the low part, try the last. */ | |
2014 | if (!done | |
2015 | && start < finish - 1) | |
2016 | { | |
2017 | inner = GET_MODE (tmps[finish - 1]); | |
7488662d | 2018 | bytepos = subreg_lowpart_offset (inner, outer); |
79edfde8 RS |
2019 | if (INTVAL (XEXP (XVECEXP (src, 0, finish - 1), 1)) == bytepos) |
2020 | { | |
2021 | temp = simplify_gen_subreg (outer, tmps[finish - 1], | |
7488662d | 2022 | inner, 0); |
9fd20553 RS |
2023 | if (temp) |
2024 | { | |
2025 | emit_move_insn (dst, temp); | |
2026 | done = true; | |
2027 | finish--; | |
2028 | } | |
79edfde8 RS |
2029 | } |
2030 | } | |
2031 | ||
2032 | /* Otherwise, simply initialize the result to zero. */ | |
2033 | if (!done) | |
2034 | emit_move_insn (dst, CONST0_RTX (outer)); | |
aac5cc16 | 2035 | } |
aac5cc16 RH |
2036 | |
2037 | /* Process the pieces. */ | |
79edfde8 | 2038 | for (i = start; i < finish; i++) |
aac5cc16 | 2039 | { |
770ae6cc | 2040 | HOST_WIDE_INT bytepos = INTVAL (XEXP (XVECEXP (src, 0, i), 1)); |
aac5cc16 | 2041 | enum machine_mode mode = GET_MODE (tmps[i]); |
770ae6cc | 2042 | unsigned int bytelen = GET_MODE_SIZE (mode); |
ca85aa4a | 2043 | unsigned int adj_bytelen; |
6ddae612 | 2044 | rtx dest = dst; |
aac5cc16 RH |
2045 | |
2046 | /* Handle trailing fragments that run over the size of the struct. */ | |
8752c357 | 2047 | if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize) |
38c4df0b | 2048 | adj_bytelen = ssize - bytepos; |
ca85aa4a EB |
2049 | else |
2050 | adj_bytelen = bytelen; | |
fffa9c1d | 2051 | |
6ddae612 JJ |
2052 | if (GET_CODE (dst) == CONCAT) |
2053 | { | |
38c4df0b JM |
2054 | if (bytepos + adj_bytelen |
2055 | <= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0)))) | |
6ddae612 JJ |
2056 | dest = XEXP (dst, 0); |
2057 | else if (bytepos >= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0)))) | |
2058 | { | |
2059 | bytepos -= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0))); | |
2060 | dest = XEXP (dst, 1); | |
2061 | } | |
5b0264cb | 2062 | else |
0d446150 | 2063 | { |
6cd7942d L |
2064 | enum machine_mode dest_mode = GET_MODE (dest); |
2065 | enum machine_mode tmp_mode = GET_MODE (tmps[i]); | |
6cd7942d | 2066 | |
e0978eba | 2067 | gcc_assert (bytepos == 0 && XVECLEN (src, 0)); |
6cd7942d L |
2068 | |
2069 | if (GET_MODE_ALIGNMENT (dest_mode) | |
2070 | >= GET_MODE_ALIGNMENT (tmp_mode)) | |
2071 | { | |
e0978eba | 2072 | dest = assign_stack_temp (dest_mode, |
9474e8ab | 2073 | GET_MODE_SIZE (dest_mode)); |
6cd7942d L |
2074 | emit_move_insn (adjust_address (dest, |
2075 | tmp_mode, | |
2076 | bytepos), | |
2077 | tmps[i]); | |
2078 | dst = dest; | |
2079 | } | |
2080 | else | |
2081 | { | |
e0978eba | 2082 | dest = assign_stack_temp (tmp_mode, |
9474e8ab | 2083 | GET_MODE_SIZE (tmp_mode)); |
6cd7942d L |
2084 | emit_move_insn (dest, tmps[i]); |
2085 | dst = adjust_address (dest, dest_mode, bytepos); | |
2086 | } | |
0d446150 JH |
2087 | break; |
2088 | } | |
6ddae612 JJ |
2089 | } |
2090 | ||
ca85aa4a | 2091 | /* Handle trailing fragments that run over the size of the struct. */ |
38c4df0b JM |
2092 | if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize) |
2093 | { | |
2094 | /* store_bit_field always takes its value from the lsb. | |
2095 | Move the fragment to the lsb if it's not already there. */ | |
2096 | if ( | |
2097 | #ifdef BLOCK_REG_PADDING | |
2098 | BLOCK_REG_PADDING (GET_MODE (orig_dst), type, i == start) | |
2099 | == (BYTES_BIG_ENDIAN ? upward : downward) | |
2100 | #else | |
2101 | BYTES_BIG_ENDIAN | |
2102 | #endif | |
2103 | ) | |
2104 | { | |
2105 | int shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT; | |
2106 | tmps[i] = expand_shift (RSHIFT_EXPR, mode, tmps[i], | |
eb6c3df1 | 2107 | shift, tmps[i], 0); |
38c4df0b | 2108 | } |
ca85aa4a EB |
2109 | |
2110 | /* Make sure not to write past the end of the struct. */ | |
2111 | store_bit_field (dest, | |
2112 | adj_bytelen * BITS_PER_UNIT, bytepos * BITS_PER_UNIT, | |
c931d01d | 2113 | bytepos * BITS_PER_UNIT, ssize * BITS_PER_UNIT - 1, |
ca85aa4a | 2114 | VOIDmode, tmps[i]); |
38c4df0b JM |
2115 | } |
2116 | ||
aac5cc16 | 2117 | /* Optimize the access just a bit. */ |
ca85aa4a EB |
2118 | else if (MEM_P (dest) |
2119 | && (!SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (dest)) | |
2120 | || MEM_ALIGN (dest) >= GET_MODE_ALIGNMENT (mode)) | |
2121 | && bytepos * BITS_PER_UNIT % GET_MODE_ALIGNMENT (mode) == 0 | |
2122 | && bytelen == GET_MODE_SIZE (mode)) | |
6ddae612 | 2123 | emit_move_insn (adjust_address (dest, mode, bytepos), tmps[i]); |
ca85aa4a | 2124 | |
aac5cc16 | 2125 | else |
6ddae612 | 2126 | store_bit_field (dest, bytelen * BITS_PER_UNIT, bytepos * BITS_PER_UNIT, |
1169e45d | 2127 | 0, 0, mode, tmps[i]); |
fffa9c1d | 2128 | } |
729a2125 | 2129 | |
aac5cc16 | 2130 | /* Copy from the pseudo into the (probable) hard reg. */ |
0d446150 | 2131 | if (orig_dst != dst) |
aac5cc16 | 2132 | emit_move_insn (orig_dst, dst); |
fffa9c1d JW |
2133 | } |
2134 | ||
9a002da8 RS |
2135 | /* Return a form of X that does not use a PARALLEL. TYPE is the type |
2136 | of the value stored in X. */ | |
2137 | ||
2138 | rtx | |
2139 | maybe_emit_group_store (rtx x, tree type) | |
2140 | { | |
2141 | enum machine_mode mode = TYPE_MODE (type); | |
2142 | gcc_checking_assert (GET_MODE (x) == VOIDmode || GET_MODE (x) == mode); | |
2143 | if (GET_CODE (x) == PARALLEL) | |
2144 | { | |
2145 | rtx result = gen_reg_rtx (mode); | |
2146 | emit_group_store (result, x, type, int_size_in_bytes (type)); | |
2147 | return result; | |
2148 | } | |
2149 | return x; | |
2150 | } | |
2151 | ||
929634d8 | 2152 | /* Copy a BLKmode object of TYPE out of a register SRCREG into TARGET. |
c36fce9a | 2153 | |
929634d8 | 2154 | This is used on targets that return BLKmode values in registers. */ |
c36fce9a | 2155 | |
929634d8 EB |
2156 | void |
2157 | copy_blkmode_from_reg (rtx target, rtx srcreg, tree type) | |
c36fce9a | 2158 | { |
19caa751 RK |
2159 | unsigned HOST_WIDE_INT bytes = int_size_in_bytes (type); |
2160 | rtx src = NULL, dst = NULL; | |
2161 | unsigned HOST_WIDE_INT bitsize = MIN (TYPE_ALIGN (type), BITS_PER_WORD); | |
c988af2b | 2162 | unsigned HOST_WIDE_INT bitpos, xbitpos, padding_correction = 0; |
929634d8 EB |
2163 | enum machine_mode mode = GET_MODE (srcreg); |
2164 | enum machine_mode tmode = GET_MODE (target); | |
15af420d | 2165 | enum machine_mode copy_mode; |
19caa751 | 2166 | |
929634d8 EB |
2167 | /* BLKmode registers created in the back-end shouldn't have survived. */ |
2168 | gcc_assert (mode != BLKmode); | |
19caa751 | 2169 | |
c988af2b RS |
2170 | /* If the structure doesn't take up a whole number of words, see whether |
2171 | SRCREG is padded on the left or on the right. If it's on the left, | |
2172 | set PADDING_CORRECTION to the number of bits to skip. | |
2173 | ||
2174 | In most ABIs, the structure will be returned at the least end of | |
2175 | the register, which translates to right padding on little-endian | |
2176 | targets and left padding on big-endian targets. The opposite | |
2177 | holds if the structure is returned at the most significant | |
2178 | end of the register. */ | |
2179 | if (bytes % UNITS_PER_WORD != 0 | |
2180 | && (targetm.calls.return_in_msb (type) | |
2181 | ? !BYTES_BIG_ENDIAN | |
2182 | : BYTES_BIG_ENDIAN)) | |
2183 | padding_correction | |
19caa751 RK |
2184 | = (BITS_PER_WORD - ((bytes % UNITS_PER_WORD) * BITS_PER_UNIT)); |
2185 | ||
929634d8 EB |
2186 | /* We can use a single move if we have an exact mode for the size. */ |
2187 | else if (MEM_P (target) | |
2188 | && (!SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (target)) | |
2189 | || MEM_ALIGN (target) >= GET_MODE_ALIGNMENT (mode)) | |
2190 | && bytes == GET_MODE_SIZE (mode)) | |
2191 | { | |
2192 | emit_move_insn (adjust_address (target, mode, 0), srcreg); | |
2193 | return; | |
2194 | } | |
2195 | ||
2196 | /* And if we additionally have the same mode for a register. */ | |
2197 | else if (REG_P (target) | |
2198 | && GET_MODE (target) == mode | |
2199 | && bytes == GET_MODE_SIZE (mode)) | |
2200 | { | |
2201 | emit_move_insn (target, srcreg); | |
2202 | return; | |
2203 | } | |
2204 | ||
2205 | /* This code assumes srcreg is at least a full word. If it isn't, copy it | |
2206 | into a new pseudo which is a full word. */ | |
2207 | if (GET_MODE_SIZE (mode) < UNITS_PER_WORD) | |
2208 | { | |
2209 | srcreg = convert_to_mode (word_mode, srcreg, TYPE_UNSIGNED (type)); | |
2210 | mode = word_mode; | |
2211 | } | |
2212 | ||
15af420d EB |
2213 | /* Copy the structure BITSIZE bits at a time. If the target lives in |
2214 | memory, take care of not reading/writing past its end by selecting | |
2215 | a copy mode suited to BITSIZE. This should always be possible given | |
2216 | how it is computed. | |
3a94c984 | 2217 | |
929634d8 EB |
2218 | If the target lives in register, make sure not to select a copy mode |
2219 | larger than the mode of the register. | |
2220 | ||
19caa751 RK |
2221 | We could probably emit more efficient code for machines which do not use |
2222 | strict alignment, but it doesn't seem worth the effort at the current | |
2223 | time. */ | |
15af420d EB |
2224 | |
2225 | copy_mode = word_mode; | |
929634d8 | 2226 | if (MEM_P (target)) |
15af420d EB |
2227 | { |
2228 | enum machine_mode mem_mode = mode_for_size (bitsize, MODE_INT, 1); | |
2229 | if (mem_mode != BLKmode) | |
2230 | copy_mode = mem_mode; | |
2231 | } | |
929634d8 EB |
2232 | else if (REG_P (target) && GET_MODE_BITSIZE (tmode) < BITS_PER_WORD) |
2233 | copy_mode = tmode; | |
15af420d | 2234 | |
c988af2b | 2235 | for (bitpos = 0, xbitpos = padding_correction; |
19caa751 RK |
2236 | bitpos < bytes * BITS_PER_UNIT; |
2237 | bitpos += bitsize, xbitpos += bitsize) | |
2238 | { | |
3a94c984 | 2239 | /* We need a new source operand each time xbitpos is on a |
c988af2b | 2240 | word boundary and when xbitpos == padding_correction |
19caa751 | 2241 | (the first time through). */ |
929634d8 EB |
2242 | if (xbitpos % BITS_PER_WORD == 0 || xbitpos == padding_correction) |
2243 | src = operand_subword_force (srcreg, xbitpos / BITS_PER_WORD, mode); | |
19caa751 RK |
2244 | |
2245 | /* We need a new destination operand each time bitpos is on | |
2246 | a word boundary. */ | |
929634d8 EB |
2247 | if (REG_P (target) && GET_MODE_BITSIZE (tmode) < BITS_PER_WORD) |
2248 | dst = target; | |
2249 | else if (bitpos % BITS_PER_WORD == 0) | |
2250 | dst = operand_subword (target, bitpos / BITS_PER_WORD, 1, tmode); | |
3a94c984 | 2251 | |
19caa751 | 2252 | /* Use xbitpos for the source extraction (right justified) and |
15af420d | 2253 | bitpos for the destination store (left justified). */ |
1169e45d | 2254 | store_bit_field (dst, bitsize, bitpos % BITS_PER_WORD, 0, 0, copy_mode, |
19caa751 | 2255 | extract_bit_field (src, bitsize, |
c6285bd7 | 2256 | xbitpos % BITS_PER_WORD, 1, |
15af420d | 2257 | NULL_RTX, copy_mode, copy_mode)); |
19caa751 | 2258 | } |
c36fce9a GRK |
2259 | } |
2260 | ||
2ba87a29 RS |
2261 | /* Copy BLKmode value SRC into a register of mode MODE. Return the |
2262 | register if it contains any data, otherwise return null. | |
2263 | ||
2264 | This is used on targets that return BLKmode values in registers. */ | |
2265 | ||
2266 | rtx | |
2267 | copy_blkmode_to_reg (enum machine_mode mode, tree src) | |
2268 | { | |
2269 | int i, n_regs; | |
2270 | unsigned HOST_WIDE_INT bitpos, xbitpos, padding_correction = 0, bytes; | |
2271 | unsigned int bitsize; | |
2272 | rtx *dst_words, dst, x, src_word = NULL_RTX, dst_word = NULL_RTX; | |
2273 | enum machine_mode dst_mode; | |
2274 | ||
2275 | gcc_assert (TYPE_MODE (TREE_TYPE (src)) == BLKmode); | |
2276 | ||
2277 | x = expand_normal (src); | |
2278 | ||
2279 | bytes = int_size_in_bytes (TREE_TYPE (src)); | |
2280 | if (bytes == 0) | |
2281 | return NULL_RTX; | |
2282 | ||
2283 | /* If the structure doesn't take up a whole number of words, see | |
2284 | whether the register value should be padded on the left or on | |
2285 | the right. Set PADDING_CORRECTION to the number of padding | |
2286 | bits needed on the left side. | |
2287 | ||
2288 | In most ABIs, the structure will be returned at the least end of | |
2289 | the register, which translates to right padding on little-endian | |
2290 | targets and left padding on big-endian targets. The opposite | |
2291 | holds if the structure is returned at the most significant | |
2292 | end of the register. */ | |
2293 | if (bytes % UNITS_PER_WORD != 0 | |
2294 | && (targetm.calls.return_in_msb (TREE_TYPE (src)) | |
2295 | ? !BYTES_BIG_ENDIAN | |
2296 | : BYTES_BIG_ENDIAN)) | |
2297 | padding_correction = (BITS_PER_WORD - ((bytes % UNITS_PER_WORD) | |
2298 | * BITS_PER_UNIT)); | |
2299 | ||
2300 | n_regs = (bytes + UNITS_PER_WORD - 1) / UNITS_PER_WORD; | |
2301 | dst_words = XALLOCAVEC (rtx, n_regs); | |
2302 | bitsize = MIN (TYPE_ALIGN (TREE_TYPE (src)), BITS_PER_WORD); | |
2303 | ||
2304 | /* Copy the structure BITSIZE bits at a time. */ | |
2305 | for (bitpos = 0, xbitpos = padding_correction; | |
2306 | bitpos < bytes * BITS_PER_UNIT; | |
2307 | bitpos += bitsize, xbitpos += bitsize) | |
2308 | { | |
2309 | /* We need a new destination pseudo each time xbitpos is | |
2310 | on a word boundary and when xbitpos == padding_correction | |
2311 | (the first time through). */ | |
2312 | if (xbitpos % BITS_PER_WORD == 0 | |
2313 | || xbitpos == padding_correction) | |
2314 | { | |
2315 | /* Generate an appropriate register. */ | |
2316 | dst_word = gen_reg_rtx (word_mode); | |
2317 | dst_words[xbitpos / BITS_PER_WORD] = dst_word; | |
2318 | ||
2319 | /* Clear the destination before we move anything into it. */ | |
2320 | emit_move_insn (dst_word, CONST0_RTX (word_mode)); | |
2321 | } | |
2322 | ||
2323 | /* We need a new source operand each time bitpos is on a word | |
2324 | boundary. */ | |
2325 | if (bitpos % BITS_PER_WORD == 0) | |
2326 | src_word = operand_subword_force (x, bitpos / BITS_PER_WORD, BLKmode); | |
2327 | ||
2328 | /* Use bitpos for the source extraction (left justified) and | |
2329 | xbitpos for the destination store (right justified). */ | |
2330 | store_bit_field (dst_word, bitsize, xbitpos % BITS_PER_WORD, | |
2331 | 0, 0, word_mode, | |
2332 | extract_bit_field (src_word, bitsize, | |
c6285bd7 | 2333 | bitpos % BITS_PER_WORD, 1, |
2ba87a29 RS |
2334 | NULL_RTX, word_mode, word_mode)); |
2335 | } | |
2336 | ||
2337 | if (mode == BLKmode) | |
2338 | { | |
2339 | /* Find the smallest integer mode large enough to hold the | |
2340 | entire structure. */ | |
2341 | for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); | |
2342 | mode != VOIDmode; | |
2343 | mode = GET_MODE_WIDER_MODE (mode)) | |
2344 | /* Have we found a large enough mode? */ | |
2345 | if (GET_MODE_SIZE (mode) >= bytes) | |
2346 | break; | |
2347 | ||
2348 | /* A suitable mode should have been found. */ | |
2349 | gcc_assert (mode != VOIDmode); | |
2350 | } | |
2351 | ||
2352 | if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (word_mode)) | |
2353 | dst_mode = word_mode; | |
2354 | else | |
2355 | dst_mode = mode; | |
2356 | dst = gen_reg_rtx (dst_mode); | |
2357 | ||
2358 | for (i = 0; i < n_regs; i++) | |
2359 | emit_move_insn (operand_subword (dst, i, 0, dst_mode), dst_words[i]); | |
2360 | ||
2361 | if (mode != dst_mode) | |
2362 | dst = gen_lowpart (mode, dst); | |
2363 | ||
2364 | return dst; | |
2365 | } | |
2366 | ||
94b25f81 RK |
2367 | /* Add a USE expression for REG to the (possibly empty) list pointed |
2368 | to by CALL_FUSAGE. REG must denote a hard register. */ | |
bbf6f052 RK |
2369 | |
2370 | void | |
7d810276 | 2371 | use_reg_mode (rtx *call_fusage, rtx reg, enum machine_mode mode) |
b3f8cf4a | 2372 | { |
5b0264cb | 2373 | gcc_assert (REG_P (reg) && REGNO (reg) < FIRST_PSEUDO_REGISTER); |
ed1223ba | 2374 | |
b3f8cf4a | 2375 | *call_fusage |
7d810276 | 2376 | = gen_rtx_EXPR_LIST (mode, gen_rtx_USE (VOIDmode, reg), *call_fusage); |
b3f8cf4a RK |
2377 | } |
2378 | ||
97891c11 TV |
2379 | /* Add a CLOBBER expression for REG to the (possibly empty) list pointed |
2380 | to by CALL_FUSAGE. REG must denote a hard register. */ | |
2381 | ||
2382 | void | |
2383 | clobber_reg_mode (rtx *call_fusage, rtx reg, enum machine_mode mode) | |
2384 | { | |
2385 | gcc_assert (REG_P (reg) && REGNO (reg) < FIRST_PSEUDO_REGISTER); | |
2386 | ||
2387 | *call_fusage | |
2388 | = gen_rtx_EXPR_LIST (mode, gen_rtx_CLOBBER (VOIDmode, reg), *call_fusage); | |
2389 | } | |
2390 | ||
94b25f81 RK |
2391 | /* Add USE expressions to *CALL_FUSAGE for each of NREGS consecutive regs, |
2392 | starting at REGNO. All of these registers must be hard registers. */ | |
b3f8cf4a RK |
2393 | |
2394 | void | |
502b8322 | 2395 | use_regs (rtx *call_fusage, int regno, int nregs) |
bbf6f052 | 2396 | { |
0304dfbb | 2397 | int i; |
bbf6f052 | 2398 | |
5b0264cb | 2399 | gcc_assert (regno + nregs <= FIRST_PSEUDO_REGISTER); |
0304dfbb DE |
2400 | |
2401 | for (i = 0; i < nregs; i++) | |
e50126e8 | 2402 | use_reg (call_fusage, regno_reg_rtx[regno + i]); |
bbf6f052 | 2403 | } |
fffa9c1d JW |
2404 | |
2405 | /* Add USE expressions to *CALL_FUSAGE for each REG contained in the | |
2406 | PARALLEL REGS. This is for calls that pass values in multiple | |
2407 | non-contiguous locations. The Irix 6 ABI has examples of this. */ | |
2408 | ||
2409 | void | |
502b8322 | 2410 | use_group_regs (rtx *call_fusage, rtx regs) |
fffa9c1d JW |
2411 | { |
2412 | int i; | |
2413 | ||
6bd35f86 DE |
2414 | for (i = 0; i < XVECLEN (regs, 0); i++) |
2415 | { | |
2416 | rtx reg = XEXP (XVECEXP (regs, 0, i), 0); | |
fffa9c1d | 2417 | |
6bd35f86 DE |
2418 | /* A NULL entry means the parameter goes both on the stack and in |
2419 | registers. This can also be a MEM for targets that pass values | |
2420 | partially on the stack and partially in registers. */ | |
f8cfc6aa | 2421 | if (reg != 0 && REG_P (reg)) |
6bd35f86 DE |
2422 | use_reg (call_fusage, reg); |
2423 | } | |
fffa9c1d | 2424 | } |
641cac0b AN |
2425 | |
2426 | /* Return the defining gimple statement for SSA_NAME NAME if it is an | |
2427 | assigment and the code of the expresion on the RHS is CODE. Return | |
2428 | NULL otherwise. */ | |
2429 | ||
2430 | static gimple | |
2431 | get_def_for_expr (tree name, enum tree_code code) | |
2432 | { | |
2433 | gimple def_stmt; | |
2434 | ||
2435 | if (TREE_CODE (name) != SSA_NAME) | |
2436 | return NULL; | |
2437 | ||
2438 | def_stmt = get_gimple_for_ssa_name (name); | |
2439 | if (!def_stmt | |
2440 | || gimple_assign_rhs_code (def_stmt) != code) | |
2441 | return NULL; | |
2442 | ||
2443 | return def_stmt; | |
2444 | } | |
683c600b | 2445 | |
18c56439 | 2446 | #ifdef HAVE_conditional_move |
683c600b AP |
2447 | /* Return the defining gimple statement for SSA_NAME NAME if it is an |
2448 | assigment and the class of the expresion on the RHS is CLASS. Return | |
2449 | NULL otherwise. */ | |
2450 | ||
2451 | static gimple | |
2452 | get_def_for_expr_class (tree name, enum tree_code_class tclass) | |
2453 | { | |
2454 | gimple def_stmt; | |
2455 | ||
2456 | if (TREE_CODE (name) != SSA_NAME) | |
2457 | return NULL; | |
2458 | ||
2459 | def_stmt = get_gimple_for_ssa_name (name); | |
2460 | if (!def_stmt | |
2461 | || TREE_CODE_CLASS (gimple_assign_rhs_code (def_stmt)) != tclass) | |
2462 | return NULL; | |
2463 | ||
2464 | return def_stmt; | |
2465 | } | |
18c56439 | 2466 | #endif |
bbf6f052 | 2467 | \f |
57814e5e | 2468 | |
cf5124f6 RS |
2469 | /* Determine whether the LEN bytes generated by CONSTFUN can be |
2470 | stored to memory using several move instructions. CONSTFUNDATA is | |
2471 | a pointer which will be passed as argument in every CONSTFUN call. | |
cfa31150 SL |
2472 | ALIGN is maximum alignment we can assume. MEMSETP is true if this is |
2473 | a memset operation and false if it's a copy of a constant string. | |
2474 | Return nonzero if a call to store_by_pieces should succeed. */ | |
cf5124f6 | 2475 | |
57814e5e | 2476 | int |
502b8322 AJ |
2477 | can_store_by_pieces (unsigned HOST_WIDE_INT len, |
2478 | rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode), | |
cfa31150 | 2479 | void *constfundata, unsigned int align, bool memsetp) |
57814e5e | 2480 | { |
45d78e7f JJ |
2481 | unsigned HOST_WIDE_INT l; |
2482 | unsigned int max_size; | |
57814e5e | 2483 | HOST_WIDE_INT offset = 0; |
d824aea2 | 2484 | enum machine_mode mode; |
57814e5e JJ |
2485 | enum insn_code icode; |
2486 | int reverse; | |
6ab31ade JR |
2487 | /* cst is set but not used if LEGITIMATE_CONSTANT doesn't use it. */ |
2488 | rtx cst ATTRIBUTE_UNUSED; | |
57814e5e | 2489 | |
2c430630 RS |
2490 | if (len == 0) |
2491 | return 1; | |
2492 | ||
b8698a0f | 2493 | if (! (memsetp |
cfa31150 SL |
2494 | ? SET_BY_PIECES_P (len, align) |
2495 | : STORE_BY_PIECES_P (len, align))) | |
57814e5e JJ |
2496 | return 0; |
2497 | ||
d824aea2 | 2498 | align = alignment_for_piecewise_move (STORE_MAX_PIECES, align); |
57814e5e JJ |
2499 | |
2500 | /* We would first store what we can in the largest integer mode, then go to | |
2501 | successively smaller modes. */ | |
2502 | ||
2503 | for (reverse = 0; | |
2504 | reverse <= (HAVE_PRE_DECREMENT || HAVE_POST_DECREMENT); | |
2505 | reverse++) | |
2506 | { | |
2507 | l = len; | |
cf5124f6 | 2508 | max_size = STORE_MAX_PIECES + 1; |
f841b683 | 2509 | while (max_size > 1 && l > 0) |
57814e5e | 2510 | { |
d824aea2 | 2511 | mode = widest_int_mode_for_size (max_size); |
57814e5e JJ |
2512 | |
2513 | if (mode == VOIDmode) | |
2514 | break; | |
2515 | ||
947131ba | 2516 | icode = optab_handler (mov_optab, mode); |
57814e5e JJ |
2517 | if (icode != CODE_FOR_nothing |
2518 | && align >= GET_MODE_ALIGNMENT (mode)) | |
2519 | { | |
2520 | unsigned int size = GET_MODE_SIZE (mode); | |
2521 | ||
2522 | while (l >= size) | |
2523 | { | |
2524 | if (reverse) | |
2525 | offset -= size; | |
2526 | ||
2527 | cst = (*constfun) (constfundata, offset, mode); | |
1a627b35 | 2528 | if (!targetm.legitimate_constant_p (mode, cst)) |
57814e5e JJ |
2529 | return 0; |
2530 | ||
2531 | if (!reverse) | |
2532 | offset += size; | |
2533 | ||
2534 | l -= size; | |
2535 | } | |
2536 | } | |
2537 | ||
2538 | max_size = GET_MODE_SIZE (mode); | |
2539 | } | |
2540 | ||
2541 | /* The code above should have handled everything. */ | |
5b0264cb | 2542 | gcc_assert (!l); |
57814e5e JJ |
2543 | } |
2544 | ||
2545 | return 1; | |
2546 | } | |
2547 | ||
2548 | /* Generate several move instructions to store LEN bytes generated by | |
2549 | CONSTFUN to block TO. (A MEM rtx with BLKmode). CONSTFUNDATA is a | |
2550 | pointer which will be passed as argument in every CONSTFUN call. | |
cfa31150 SL |
2551 | ALIGN is maximum alignment we can assume. MEMSETP is true if this is |
2552 | a memset operation and false if it's a copy of a constant string. | |
8fd3cf4e JJ |
2553 | If ENDP is 0 return to, if ENDP is 1 return memory at the end ala |
2554 | mempcpy, and if ENDP is 2 return memory the end minus one byte ala | |
2555 | stpcpy. */ | |
57814e5e | 2556 | |
8fd3cf4e | 2557 | rtx |
502b8322 AJ |
2558 | store_by_pieces (rtx to, unsigned HOST_WIDE_INT len, |
2559 | rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode), | |
cfa31150 | 2560 | void *constfundata, unsigned int align, bool memsetp, int endp) |
57814e5e | 2561 | { |
372d6395 | 2562 | enum machine_mode to_addr_mode = get_address_mode (to); |
b0f43ca0 | 2563 | struct store_by_pieces_d data; |
57814e5e | 2564 | |
2c430630 RS |
2565 | if (len == 0) |
2566 | { | |
5b0264cb | 2567 | gcc_assert (endp != 2); |
2c430630 RS |
2568 | return to; |
2569 | } | |
2570 | ||
cfa31150 SL |
2571 | gcc_assert (memsetp |
2572 | ? SET_BY_PIECES_P (len, align) | |
2573 | : STORE_BY_PIECES_P (len, align)); | |
57814e5e JJ |
2574 | data.constfun = constfun; |
2575 | data.constfundata = constfundata; | |
2576 | data.len = len; | |
2577 | data.to = to; | |
2578 | store_by_pieces_1 (&data, align); | |
8fd3cf4e JJ |
2579 | if (endp) |
2580 | { | |
2581 | rtx to1; | |
2582 | ||
5b0264cb | 2583 | gcc_assert (!data.reverse); |
8fd3cf4e JJ |
2584 | if (data.autinc_to) |
2585 | { | |
2586 | if (endp == 2) | |
2587 | { | |
2588 | if (HAVE_POST_INCREMENT && data.explicit_inc_to > 0) | |
2589 | emit_insn (gen_add2_insn (data.to_addr, constm1_rtx)); | |
2590 | else | |
d4ebfa65 | 2591 | data.to_addr = copy_to_mode_reg (to_addr_mode, |
0a81f074 RS |
2592 | plus_constant (to_addr_mode, |
2593 | data.to_addr, | |
8fd3cf4e JJ |
2594 | -1)); |
2595 | } | |
2596 | to1 = adjust_automodify_address (data.to, QImode, data.to_addr, | |
2597 | data.offset); | |
2598 | } | |
2599 | else | |
2600 | { | |
2601 | if (endp == 2) | |
2602 | --data.offset; | |
2603 | to1 = adjust_address (data.to, QImode, data.offset); | |
2604 | } | |
2605 | return to1; | |
2606 | } | |
2607 | else | |
2608 | return data.to; | |
57814e5e JJ |
2609 | } |
2610 | ||
19caa751 | 2611 | /* Generate several move instructions to clear LEN bytes of block TO. (A MEM |
ad76cef8 | 2612 | rtx with BLKmode). ALIGN is maximum alignment we can assume. */ |
9de08200 RK |
2613 | |
2614 | static void | |
342e2b74 | 2615 | clear_by_pieces (rtx to, unsigned HOST_WIDE_INT len, unsigned int align) |
9de08200 | 2616 | { |
b0f43ca0 | 2617 | struct store_by_pieces_d data; |
57814e5e | 2618 | |
2c430630 RS |
2619 | if (len == 0) |
2620 | return; | |
2621 | ||
57814e5e | 2622 | data.constfun = clear_by_pieces_1; |
df4ae160 | 2623 | data.constfundata = NULL; |
57814e5e JJ |
2624 | data.len = len; |
2625 | data.to = to; | |
2626 | store_by_pieces_1 (&data, align); | |
2627 | } | |
2628 | ||
2629 | /* Callback routine for clear_by_pieces. | |
2630 | Return const0_rtx unconditionally. */ | |
2631 | ||
2632 | static rtx | |
502b8322 AJ |
2633 | clear_by_pieces_1 (void *data ATTRIBUTE_UNUSED, |
2634 | HOST_WIDE_INT offset ATTRIBUTE_UNUSED, | |
2635 | enum machine_mode mode ATTRIBUTE_UNUSED) | |
57814e5e JJ |
2636 | { |
2637 | return const0_rtx; | |
2638 | } | |
2639 | ||
2640 | /* Subroutine of clear_by_pieces and store_by_pieces. | |
2641 | Generate several move instructions to store LEN bytes of block TO. (A MEM | |
ad76cef8 | 2642 | rtx with BLKmode). ALIGN is maximum alignment we can assume. */ |
57814e5e JJ |
2643 | |
2644 | static void | |
b0f43ca0 | 2645 | store_by_pieces_1 (struct store_by_pieces_d *data ATTRIBUTE_UNUSED, |
502b8322 | 2646 | unsigned int align ATTRIBUTE_UNUSED) |
57814e5e | 2647 | { |
372d6395 | 2648 | enum machine_mode to_addr_mode = get_address_mode (data->to); |
57814e5e | 2649 | rtx to_addr = XEXP (data->to, 0); |
45d78e7f | 2650 | unsigned int max_size = STORE_MAX_PIECES + 1; |
fbe1758d | 2651 | enum insn_code icode; |
9de08200 | 2652 | |
57814e5e JJ |
2653 | data->offset = 0; |
2654 | data->to_addr = to_addr; | |
2655 | data->autinc_to | |
9de08200 RK |
2656 | = (GET_CODE (to_addr) == PRE_INC || GET_CODE (to_addr) == PRE_DEC |
2657 | || GET_CODE (to_addr) == POST_INC || GET_CODE (to_addr) == POST_DEC); | |
2658 | ||
57814e5e JJ |
2659 | data->explicit_inc_to = 0; |
2660 | data->reverse | |
9de08200 | 2661 | = (GET_CODE (to_addr) == PRE_DEC || GET_CODE (to_addr) == POST_DEC); |
57814e5e JJ |
2662 | if (data->reverse) |
2663 | data->offset = data->len; | |
9de08200 | 2664 | |
57814e5e | 2665 | /* If storing requires more than two move insns, |
9de08200 RK |
2666 | copy addresses to registers (to make displacements shorter) |
2667 | and use post-increment if available. */ | |
57814e5e | 2668 | if (!data->autinc_to |
45d78e7f | 2669 | && move_by_pieces_ninsns (data->len, align, max_size) > 2) |
9de08200 | 2670 | { |
d824aea2 NF |
2671 | /* Determine the main mode we'll be using. |
2672 | MODE might not be used depending on the definitions of the | |
2673 | USE_* macros below. */ | |
2674 | enum machine_mode mode ATTRIBUTE_UNUSED | |
2675 | = widest_int_mode_for_size (max_size); | |
fbe1758d | 2676 | |
57814e5e | 2677 | if (USE_STORE_PRE_DECREMENT (mode) && data->reverse && ! data->autinc_to) |
9de08200 | 2678 | { |
d4ebfa65 | 2679 | data->to_addr = copy_to_mode_reg (to_addr_mode, |
0a81f074 RS |
2680 | plus_constant (to_addr_mode, |
2681 | to_addr, | |
2682 | data->len)); | |
57814e5e JJ |
2683 | data->autinc_to = 1; |
2684 | data->explicit_inc_to = -1; | |
9de08200 | 2685 | } |
3bdf5ad1 | 2686 | |
57814e5e JJ |
2687 | if (USE_STORE_POST_INCREMENT (mode) && ! data->reverse |
2688 | && ! data->autinc_to) | |
9de08200 | 2689 | { |
d4ebfa65 | 2690 | data->to_addr = copy_to_mode_reg (to_addr_mode, to_addr); |
57814e5e JJ |
2691 | data->autinc_to = 1; |
2692 | data->explicit_inc_to = 1; | |
9de08200 | 2693 | } |
3bdf5ad1 | 2694 | |
57814e5e | 2695 | if ( !data->autinc_to && CONSTANT_P (to_addr)) |
d4ebfa65 | 2696 | data->to_addr = copy_to_mode_reg (to_addr_mode, to_addr); |
9de08200 RK |
2697 | } |
2698 | ||
d824aea2 | 2699 | align = alignment_for_piecewise_move (STORE_MAX_PIECES, align); |
9de08200 | 2700 | |
57814e5e | 2701 | /* First store what we can in the largest integer mode, then go to |
9de08200 RK |
2702 | successively smaller modes. */ |
2703 | ||
f841b683 | 2704 | while (max_size > 1 && data->len > 0) |
9de08200 | 2705 | { |
d824aea2 | 2706 | enum machine_mode mode = widest_int_mode_for_size (max_size); |
9de08200 RK |
2707 | |
2708 | if (mode == VOIDmode) | |
2709 | break; | |
2710 | ||
947131ba | 2711 | icode = optab_handler (mov_optab, mode); |
19caa751 | 2712 | if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode)) |
57814e5e | 2713 | store_by_pieces_2 (GEN_FCN (icode), mode, data); |
9de08200 RK |
2714 | |
2715 | max_size = GET_MODE_SIZE (mode); | |
2716 | } | |
2717 | ||
2718 | /* The code above should have handled everything. */ | |
5b0264cb | 2719 | gcc_assert (!data->len); |
9de08200 RK |
2720 | } |
2721 | ||
57814e5e | 2722 | /* Subroutine of store_by_pieces_1. Store as many bytes as appropriate |
9de08200 RK |
2723 | with move instructions for mode MODE. GENFUN is the gen_... function |
2724 | to make a move insn for that mode. DATA has all the other info. */ | |
2725 | ||
2726 | static void | |
eb923e54 | 2727 | store_by_pieces_2 (insn_gen_fn genfun, machine_mode mode, |
b0f43ca0 | 2728 | struct store_by_pieces_d *data) |
9de08200 | 2729 | { |
3bdf5ad1 | 2730 | unsigned int size = GET_MODE_SIZE (mode); |
57814e5e | 2731 | rtx to1, cst; |
9de08200 RK |
2732 | |
2733 | while (data->len >= size) | |
2734 | { | |
3bdf5ad1 RK |
2735 | if (data->reverse) |
2736 | data->offset -= size; | |
9de08200 | 2737 | |
3bdf5ad1 | 2738 | if (data->autinc_to) |
630036c6 JJ |
2739 | to1 = adjust_automodify_address (data->to, mode, data->to_addr, |
2740 | data->offset); | |
3a94c984 | 2741 | else |
f4ef873c | 2742 | to1 = adjust_address (data->to, mode, data->offset); |
9de08200 | 2743 | |
940da324 | 2744 | if (HAVE_PRE_DECREMENT && data->explicit_inc_to < 0) |
57814e5e | 2745 | emit_insn (gen_add2_insn (data->to_addr, |
69db2d57 RS |
2746 | gen_int_mode (-(HOST_WIDE_INT) size, |
2747 | GET_MODE (data->to_addr)))); | |
9de08200 | 2748 | |
57814e5e JJ |
2749 | cst = (*data->constfun) (data->constfundata, data->offset, mode); |
2750 | emit_insn ((*genfun) (to1, cst)); | |
3bdf5ad1 | 2751 | |
940da324 | 2752 | if (HAVE_POST_INCREMENT && data->explicit_inc_to > 0) |
69db2d57 RS |
2753 | emit_insn (gen_add2_insn (data->to_addr, |
2754 | gen_int_mode (size, | |
2755 | GET_MODE (data->to_addr)))); | |
9de08200 | 2756 | |
3bdf5ad1 RK |
2757 | if (! data->reverse) |
2758 | data->offset += size; | |
9de08200 RK |
2759 | |
2760 | data->len -= size; | |
2761 | } | |
2762 | } | |
2763 | \f | |
19caa751 | 2764 | /* Write zeros through the storage of OBJECT. If OBJECT has BLKmode, SIZE is |
8ac61af7 | 2765 | its length in bytes. */ |
e9a25f70 JL |
2766 | |
2767 | rtx | |
079a182e | 2768 | clear_storage_hints (rtx object, rtx size, enum block_op_methods method, |
3918b108 JH |
2769 | unsigned int expected_align, HOST_WIDE_INT expected_size, |
2770 | unsigned HOST_WIDE_INT min_size, | |
82bb7d4e JH |
2771 | unsigned HOST_WIDE_INT max_size, |
2772 | unsigned HOST_WIDE_INT probable_max_size) | |
bbf6f052 | 2773 | { |
57aaef66 RH |
2774 | enum machine_mode mode = GET_MODE (object); |
2775 | unsigned int align; | |
e9a25f70 | 2776 | |
8148fe65 JJ |
2777 | gcc_assert (method == BLOCK_OP_NORMAL || method == BLOCK_OP_TAILCALL); |
2778 | ||
fcf1b822 RK |
2779 | /* If OBJECT is not BLKmode and SIZE is the same size as its mode, |
2780 | just move a zero. Otherwise, do this a piece at a time. */ | |
57aaef66 | 2781 | if (mode != BLKmode |
481683e1 | 2782 | && CONST_INT_P (size) |
57aaef66 | 2783 | && INTVAL (size) == (HOST_WIDE_INT) GET_MODE_SIZE (mode)) |
bbf6f052 | 2784 | { |
57aaef66 RH |
2785 | rtx zero = CONST0_RTX (mode); |
2786 | if (zero != NULL) | |
2787 | { | |
2788 | emit_move_insn (object, zero); | |
2789 | return NULL; | |
2790 | } | |
2791 | ||
2792 | if (COMPLEX_MODE_P (mode)) | |
2793 | { | |
2794 | zero = CONST0_RTX (GET_MODE_INNER (mode)); | |
2795 | if (zero != NULL) | |
2796 | { | |
2797 | write_complex_part (object, zero, 0); | |
2798 | write_complex_part (object, zero, 1); | |
2799 | return NULL; | |
2800 | } | |
2801 | } | |
4ca79136 RH |
2802 | } |
2803 | ||
57aaef66 RH |
2804 | if (size == const0_rtx) |
2805 | return NULL; | |
2806 | ||
2807 | align = MEM_ALIGN (object); | |
2808 | ||
481683e1 | 2809 | if (CONST_INT_P (size) |
57aaef66 RH |
2810 | && CLEAR_BY_PIECES_P (INTVAL (size), align)) |
2811 | clear_by_pieces (object, INTVAL (size), align); | |
079a182e | 2812 | else if (set_storage_via_setmem (object, size, const0_rtx, align, |
3918b108 | 2813 | expected_align, expected_size, |
82bb7d4e | 2814 | min_size, max_size, probable_max_size)) |
57aaef66 | 2815 | ; |
09e881c9 | 2816 | else if (ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (object))) |
8c996513 JH |
2817 | return set_storage_via_libcall (object, size, const0_rtx, |
2818 | method == BLOCK_OP_TAILCALL); | |
09e881c9 BE |
2819 | else |
2820 | gcc_unreachable (); | |
57aaef66 RH |
2821 | |
2822 | return NULL; | |
4ca79136 RH |
2823 | } |
2824 | ||
079a182e JH |
2825 | rtx |
2826 | clear_storage (rtx object, rtx size, enum block_op_methods method) | |
2827 | { | |
3918b108 JH |
2828 | unsigned HOST_WIDE_INT max, min = 0; |
2829 | if (GET_CODE (size) == CONST_INT) | |
2830 | min = max = UINTVAL (size); | |
2831 | else | |
2832 | max = GET_MODE_MASK (GET_MODE (size)); | |
82bb7d4e | 2833 | return clear_storage_hints (object, size, method, 0, -1, min, max, max); |
079a182e JH |
2834 | } |
2835 | ||
2836 | ||
8f99553f | 2837 | /* A subroutine of clear_storage. Expand a call to memset. |
4ca79136 | 2838 | Return the return value of memset, 0 otherwise. */ |
9de08200 | 2839 | |
8c996513 JH |
2840 | rtx |
2841 | set_storage_via_libcall (rtx object, rtx size, rtx val, bool tailcall) | |
4ca79136 | 2842 | { |
5039610b | 2843 | tree call_expr, fn, object_tree, size_tree, val_tree; |
4ca79136 RH |
2844 | enum machine_mode size_mode; |
2845 | rtx retval; | |
9de08200 | 2846 | |
ad76cef8 PB |
2847 | /* Emit code to copy OBJECT and SIZE into new pseudos. We can then |
2848 | place those into new pseudos into a VAR_DECL and use them later. */ | |
52cf7115 | 2849 | |
18ae1560 | 2850 | object = copy_addr_to_reg (XEXP (object, 0)); |
52cf7115 | 2851 | |
8f99553f | 2852 | size_mode = TYPE_MODE (sizetype); |
4ca79136 RH |
2853 | size = convert_to_mode (size_mode, size, 1); |
2854 | size = copy_to_mode_reg (size_mode, size); | |
52cf7115 | 2855 | |
4ca79136 RH |
2856 | /* It is incorrect to use the libcall calling conventions to call |
2857 | memset in this context. This could be a user call to memset and | |
2858 | the user may wish to examine the return value from memset. For | |
2859 | targets where libcalls and normal calls have different conventions | |
8f99553f | 2860 | for returning pointers, we could end up generating incorrect code. */ |
4bc973ae | 2861 | |
4ca79136 | 2862 | object_tree = make_tree (ptr_type_node, object); |
481683e1 | 2863 | if (!CONST_INT_P (val)) |
8c996513 | 2864 | val = convert_to_mode (TYPE_MODE (integer_type_node), val, 1); |
8f99553f | 2865 | size_tree = make_tree (sizetype, size); |
8c996513 | 2866 | val_tree = make_tree (integer_type_node, val); |
4ca79136 RH |
2867 | |
2868 | fn = clear_storage_libcall_fn (true); | |
038dc49a | 2869 | call_expr = build_call_expr (fn, 3, object_tree, val_tree, size_tree); |
8148fe65 | 2870 | CALL_EXPR_TAILCALL (call_expr) = tailcall; |
4ca79136 | 2871 | |
84217346 | 2872 | retval = expand_normal (call_expr); |
4ca79136 | 2873 | |
8f99553f | 2874 | return retval; |
4ca79136 RH |
2875 | } |
2876 | ||
8c996513 | 2877 | /* A subroutine of set_storage_via_libcall. Create the tree node |
bbee5843 | 2878 | for the function we use for block clears. */ |
4ca79136 | 2879 | |
8dd5516b | 2880 | tree block_clear_fn; |
66c60e67 | 2881 | |
9661b15f | 2882 | void |
502b8322 | 2883 | init_block_clear_fn (const char *asmspec) |
4ca79136 | 2884 | { |
9661b15f | 2885 | if (!block_clear_fn) |
4ca79136 | 2886 | { |
9661b15f JJ |
2887 | tree fn, args; |
2888 | ||
8f99553f JM |
2889 | fn = get_identifier ("memset"); |
2890 | args = build_function_type_list (ptr_type_node, ptr_type_node, | |
2891 | integer_type_node, sizetype, | |
2892 | NULL_TREE); | |
4ca79136 | 2893 | |
c2255bc4 | 2894 | fn = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL, fn, args); |
4ca79136 RH |
2895 | DECL_EXTERNAL (fn) = 1; |
2896 | TREE_PUBLIC (fn) = 1; | |
2897 | DECL_ARTIFICIAL (fn) = 1; | |
2898 | TREE_NOTHROW (fn) = 1; | |
5b5cba1f JM |
2899 | DECL_VISIBILITY (fn) = VISIBILITY_DEFAULT; |
2900 | DECL_VISIBILITY_SPECIFIED (fn) = 1; | |
4ca79136 RH |
2901 | |
2902 | block_clear_fn = fn; | |
bbf6f052 | 2903 | } |
e9a25f70 | 2904 | |
9661b15f | 2905 | if (asmspec) |
0e6df31e | 2906 | set_user_assembler_name (block_clear_fn, asmspec); |
9661b15f JJ |
2907 | } |
2908 | ||
2909 | static tree | |
502b8322 | 2910 | clear_storage_libcall_fn (int for_call) |
9661b15f JJ |
2911 | { |
2912 | static bool emitted_extern; | |
2913 | ||
2914 | if (!block_clear_fn) | |
2915 | init_block_clear_fn (NULL); | |
2916 | ||
4ca79136 RH |
2917 | if (for_call && !emitted_extern) |
2918 | { | |
2919 | emitted_extern = true; | |
0e6df31e | 2920 | make_decl_rtl (block_clear_fn); |
4ca79136 | 2921 | } |
bbf6f052 | 2922 | |
9661b15f | 2923 | return block_clear_fn; |
4ca79136 | 2924 | } |
57e84f18 AS |
2925 | \f |
2926 | /* Expand a setmem pattern; return true if successful. */ | |
2927 | ||
2928 | bool | |
079a182e | 2929 | set_storage_via_setmem (rtx object, rtx size, rtx val, unsigned int align, |
3918b108 JH |
2930 | unsigned int expected_align, HOST_WIDE_INT expected_size, |
2931 | unsigned HOST_WIDE_INT min_size, | |
82bb7d4e JH |
2932 | unsigned HOST_WIDE_INT max_size, |
2933 | unsigned HOST_WIDE_INT probable_max_size) | |
57e84f18 AS |
2934 | { |
2935 | /* Try the most limited insn first, because there's no point | |
2936 | including more than one in the machine description unless | |
2937 | the more limited one has some advantage. */ | |
2938 | ||
57e84f18 AS |
2939 | enum machine_mode mode; |
2940 | ||
079a182e JH |
2941 | if (expected_align < align) |
2942 | expected_align = align; | |
3918b108 JH |
2943 | if (expected_size != -1) |
2944 | { | |
2945 | if ((unsigned HOST_WIDE_INT)expected_size > max_size) | |
2946 | expected_size = max_size; | |
2947 | if ((unsigned HOST_WIDE_INT)expected_size < min_size) | |
2948 | expected_size = min_size; | |
2949 | } | |
079a182e | 2950 | |
57e84f18 AS |
2951 | for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode; |
2952 | mode = GET_MODE_WIDER_MODE (mode)) | |
2953 | { | |
f9621cc4 | 2954 | enum insn_code code = direct_optab_handler (setmem_optab, mode); |
57e84f18 AS |
2955 | |
2956 | if (code != CODE_FOR_nothing | |
5689294c L |
2957 | /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT |
2958 | here because if SIZE is less than the mode mask, as it is | |
2959 | returned by the macro, it will definitely be less than the | |
2960 | actual mode mask. Since SIZE is within the Pmode address | |
2961 | space, we limit MODE to Pmode. */ | |
481683e1 | 2962 | && ((CONST_INT_P (size) |
57e84f18 AS |
2963 | && ((unsigned HOST_WIDE_INT) INTVAL (size) |
2964 | <= (GET_MODE_MASK (mode) >> 1))) | |
3918b108 | 2965 | || max_size <= (GET_MODE_MASK (mode) >> 1) |
5689294c | 2966 | || GET_MODE_BITSIZE (mode) >= GET_MODE_BITSIZE (Pmode))) |
a5c7d693 | 2967 | { |
82bb7d4e | 2968 | struct expand_operand ops[9]; |
a5c7d693 RS |
2969 | unsigned int nops; |
2970 | ||
f04713ee | 2971 | nops = insn_data[(int) code].n_generator_args; |
82bb7d4e | 2972 | gcc_assert (nops == 4 || nops == 6 || nops == 8 || nops == 9); |
c2654ded | 2973 | |
a5c7d693 RS |
2974 | create_fixed_operand (&ops[0], object); |
2975 | /* The check above guarantees that this size conversion is valid. */ | |
2976 | create_convert_operand_to (&ops[1], size, mode, true); | |
2977 | create_convert_operand_from (&ops[2], val, byte_mode, true); | |
2978 | create_integer_operand (&ops[3], align / BITS_PER_UNIT); | |
3918b108 | 2979 | if (nops >= 6) |
9ed92901 | 2980 | { |
a5c7d693 RS |
2981 | create_integer_operand (&ops[4], expected_align / BITS_PER_UNIT); |
2982 | create_integer_operand (&ops[5], expected_size); | |
9ed92901 | 2983 | } |
82bb7d4e | 2984 | if (nops >= 8) |
3918b108 JH |
2985 | { |
2986 | create_integer_operand (&ops[6], min_size); | |
2987 | /* If we can not represent the maximal size, | |
2988 | make parameter NULL. */ | |
2989 | if ((HOST_WIDE_INT) max_size != -1) | |
2990 | create_integer_operand (&ops[7], max_size); | |
2991 | else | |
2992 | create_fixed_operand (&ops[7], NULL); | |
2993 | } | |
82bb7d4e JH |
2994 | if (nops == 9) |
2995 | { | |
2996 | /* If we can not represent the maximal size, | |
2997 | make parameter NULL. */ | |
2998 | if ((HOST_WIDE_INT) probable_max_size != -1) | |
2999 | create_integer_operand (&ops[8], probable_max_size); | |
3000 | else | |
3001 | create_fixed_operand (&ops[8], NULL); | |
3002 | } | |
a5c7d693 RS |
3003 | if (maybe_expand_insn (code, nops, ops)) |
3004 | return true; | |
57e84f18 AS |
3005 | } |
3006 | } | |
3007 | ||
3008 | return false; | |
3009 | } | |
3010 | ||
4ca79136 | 3011 | \f |
1466e387 RH |
3012 | /* Write to one of the components of the complex value CPLX. Write VAL to |
3013 | the real part if IMAG_P is false, and the imaginary part if its true. */ | |
bbf6f052 | 3014 | |
1466e387 RH |
3015 | static void |
3016 | write_complex_part (rtx cplx, rtx val, bool imag_p) | |
3017 | { | |
ddf4e03f RH |
3018 | enum machine_mode cmode; |
3019 | enum machine_mode imode; | |
3020 | unsigned ibitsize; | |
3021 | ||
1466e387 | 3022 | if (GET_CODE (cplx) == CONCAT) |
1466e387 | 3023 | { |
ddf4e03f RH |
3024 | emit_move_insn (XEXP (cplx, imag_p), val); |
3025 | return; | |
3026 | } | |
3027 | ||
3028 | cmode = GET_MODE (cplx); | |
3029 | imode = GET_MODE_INNER (cmode); | |
3030 | ibitsize = GET_MODE_BITSIZE (imode); | |
bbf6f052 | 3031 | |
7a31c801 DE |
3032 | /* For MEMs simplify_gen_subreg may generate an invalid new address |
3033 | because, e.g., the original address is considered mode-dependent | |
3034 | by the target, which restricts simplify_subreg from invoking | |
3035 | adjust_address_nv. Instead of preparing fallback support for an | |
3036 | invalid address, we call adjust_address_nv directly. */ | |
3037 | if (MEM_P (cplx)) | |
22469409 BW |
3038 | { |
3039 | emit_move_insn (adjust_address_nv (cplx, imode, | |
3040 | imag_p ? GET_MODE_SIZE (imode) : 0), | |
3041 | val); | |
3042 | return; | |
3043 | } | |
7a31c801 | 3044 | |
ddf4e03f RH |
3045 | /* If the sub-object is at least word sized, then we know that subregging |
3046 | will work. This special case is important, since store_bit_field | |
3047 | wants to operate on integer modes, and there's rarely an OImode to | |
3048 | correspond to TCmode. */ | |
36d7571c EB |
3049 | if (ibitsize >= BITS_PER_WORD |
3050 | /* For hard regs we have exact predicates. Assume we can split | |
3051 | the original object if it spans an even number of hard regs. | |
3052 | This special case is important for SCmode on 64-bit platforms | |
3053 | where the natural size of floating-point regs is 32-bit. */ | |
2ca202e7 | 3054 | || (REG_P (cplx) |
36d7571c | 3055 | && REGNO (cplx) < FIRST_PSEUDO_REGISTER |
7a31c801 | 3056 | && hard_regno_nregs[REGNO (cplx)][cmode] % 2 == 0)) |
ddf4e03f RH |
3057 | { |
3058 | rtx part = simplify_gen_subreg (imode, cplx, cmode, | |
3059 | imag_p ? GET_MODE_SIZE (imode) : 0); | |
36d7571c EB |
3060 | if (part) |
3061 | { | |
3062 | emit_move_insn (part, val); | |
3063 | return; | |
3064 | } | |
3065 | else | |
3066 | /* simplify_gen_subreg may fail for sub-word MEMs. */ | |
3067 | gcc_assert (MEM_P (cplx) && ibitsize < BITS_PER_WORD); | |
1466e387 | 3068 | } |
36d7571c | 3069 | |
1169e45d | 3070 | store_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0, 0, 0, imode, val); |
1466e387 RH |
3071 | } |
3072 | ||
3073 | /* Extract one of the components of the complex value CPLX. Extract the | |
3074 | real part if IMAG_P is false, and the imaginary part if it's true. */ | |
3075 | ||
3076 | static rtx | |
3077 | read_complex_part (rtx cplx, bool imag_p) | |
bbf6f052 | 3078 | { |
1466e387 RH |
3079 | enum machine_mode cmode, imode; |
3080 | unsigned ibitsize; | |
bbf6f052 | 3081 | |
1466e387 RH |
3082 | if (GET_CODE (cplx) == CONCAT) |
3083 | return XEXP (cplx, imag_p); | |
bbf6f052 | 3084 | |
1466e387 RH |
3085 | cmode = GET_MODE (cplx); |
3086 | imode = GET_MODE_INNER (cmode); | |
3087 | ibitsize = GET_MODE_BITSIZE (imode); | |
3088 | ||
3089 | /* Special case reads from complex constants that got spilled to memory. */ | |
3090 | if (MEM_P (cplx) && GET_CODE (XEXP (cplx, 0)) == SYMBOL_REF) | |
de1b33dd | 3091 | { |
1466e387 RH |
3092 | tree decl = SYMBOL_REF_DECL (XEXP (cplx, 0)); |
3093 | if (decl && TREE_CODE (decl) == COMPLEX_CST) | |
3094 | { | |
3095 | tree part = imag_p ? TREE_IMAGPART (decl) : TREE_REALPART (decl); | |
3096 | if (CONSTANT_CLASS_P (part)) | |
3097 | return expand_expr (part, NULL_RTX, imode, EXPAND_NORMAL); | |
3098 | } | |
3099 | } | |
51286de6 | 3100 | |
7a31c801 DE |
3101 | /* For MEMs simplify_gen_subreg may generate an invalid new address |
3102 | because, e.g., the original address is considered mode-dependent | |
3103 | by the target, which restricts simplify_subreg from invoking | |
3104 | adjust_address_nv. Instead of preparing fallback support for an | |
3105 | invalid address, we call adjust_address_nv directly. */ | |
3106 | if (MEM_P (cplx)) | |
3107 | return adjust_address_nv (cplx, imode, | |
3108 | imag_p ? GET_MODE_SIZE (imode) : 0); | |
3109 | ||
ddf4e03f RH |
3110 | /* If the sub-object is at least word sized, then we know that subregging |
3111 | will work. This special case is important, since extract_bit_field | |
3112 | wants to operate on integer modes, and there's rarely an OImode to | |
3113 | correspond to TCmode. */ | |
36d7571c EB |
3114 | if (ibitsize >= BITS_PER_WORD |
3115 | /* For hard regs we have exact predicates. Assume we can split | |
3116 | the original object if it spans an even number of hard regs. | |
3117 | This special case is important for SCmode on 64-bit platforms | |
3118 | where the natural size of floating-point regs is 32-bit. */ | |
2ca202e7 | 3119 | || (REG_P (cplx) |
36d7571c | 3120 | && REGNO (cplx) < FIRST_PSEUDO_REGISTER |
7a31c801 | 3121 | && hard_regno_nregs[REGNO (cplx)][cmode] % 2 == 0)) |
ddf4e03f RH |
3122 | { |
3123 | rtx ret = simplify_gen_subreg (imode, cplx, cmode, | |
3124 | imag_p ? GET_MODE_SIZE (imode) : 0); | |
36d7571c EB |
3125 | if (ret) |
3126 | return ret; | |
3127 | else | |
3128 | /* simplify_gen_subreg may fail for sub-word MEMs. */ | |
3129 | gcc_assert (MEM_P (cplx) && ibitsize < BITS_PER_WORD); | |
ddf4e03f RH |
3130 | } |
3131 | ||
1466e387 | 3132 | return extract_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0, |
c6285bd7 | 3133 | true, NULL_RTX, imode, imode); |
1466e387 RH |
3134 | } |
3135 | \f | |
539eaa3a | 3136 | /* A subroutine of emit_move_insn_1. Yet another lowpart generator. |
074e6d01 | 3137 | NEW_MODE and OLD_MODE are the same size. Return NULL if X cannot be |
539eaa3a RH |
3138 | represented in NEW_MODE. If FORCE is true, this will never happen, as |
3139 | we'll force-create a SUBREG if needed. */ | |
0c19a26f | 3140 | |
1466e387 | 3141 | static rtx |
074e6d01 | 3142 | emit_move_change_mode (enum machine_mode new_mode, |
539eaa3a | 3143 | enum machine_mode old_mode, rtx x, bool force) |
1466e387 | 3144 | { |
074e6d01 | 3145 | rtx ret; |
1466e387 | 3146 | |
4bcc9de5 UB |
3147 | if (push_operand (x, GET_MODE (x))) |
3148 | { | |
3149 | ret = gen_rtx_MEM (new_mode, XEXP (x, 0)); | |
3150 | MEM_COPY_ATTRIBUTES (ret, x); | |
3151 | } | |
3152 | else if (MEM_P (x)) | |
1466e387 | 3153 | { |
ef7befe0 BE |
3154 | /* We don't have to worry about changing the address since the |
3155 | size in bytes is supposed to be the same. */ | |
3156 | if (reload_in_progress) | |
3157 | { | |
3158 | /* Copy the MEM to change the mode and move any | |
3159 | substitutions from the old MEM to the new one. */ | |
3160 | ret = adjust_address_nv (x, new_mode, 0); | |
3161 | copy_replacements (x, ret); | |
3162 | } | |
3163 | else | |
3164 | ret = adjust_address (x, new_mode, 0); | |
de1b33dd | 3165 | } |
1466e387 RH |
3166 | else |
3167 | { | |
35fd3193 | 3168 | /* Note that we do want simplify_subreg's behavior of validating |
074e6d01 RH |
3169 | that the new mode is ok for a hard register. If we were to use |
3170 | simplify_gen_subreg, we would create the subreg, but would | |
3171 | probably run into the target not being able to implement it. */ | |
539eaa3a RH |
3172 | /* Except, of course, when FORCE is true, when this is exactly what |
3173 | we want. Which is needed for CCmodes on some targets. */ | |
3174 | if (force) | |
3175 | ret = simplify_gen_subreg (new_mode, x, old_mode, 0); | |
3176 | else | |
3177 | ret = simplify_subreg (new_mode, x, old_mode, 0); | |
1466e387 | 3178 | } |
bbf6f052 | 3179 | |
074e6d01 RH |
3180 | return ret; |
3181 | } | |
3182 | ||
1466e387 RH |
3183 | /* A subroutine of emit_move_insn_1. Generate a move from Y into X using |
3184 | an integer mode of the same size as MODE. Returns the instruction | |
3185 | emitted, or NULL if such a move could not be generated. */ | |
bbf6f052 | 3186 | |
f3222b79 | 3187 | static rtx_insn * |
652b0932 | 3188 | emit_move_via_integer (enum machine_mode mode, rtx x, rtx y, bool force) |
1466e387 RH |
3189 | { |
3190 | enum machine_mode imode; | |
3191 | enum insn_code code; | |
bbf6f052 | 3192 | |
1466e387 RH |
3193 | /* There must exist a mode of the exact size we require. */ |
3194 | imode = int_mode_for_mode (mode); | |
3195 | if (imode == BLKmode) | |
f3222b79 | 3196 | return NULL; |
de1b33dd | 3197 | |
1466e387 | 3198 | /* The target must support moves in this mode. */ |
947131ba | 3199 | code = optab_handler (mov_optab, imode); |
1466e387 | 3200 | if (code == CODE_FOR_nothing) |
f3222b79 | 3201 | return NULL; |
de1b33dd | 3202 | |
652b0932 | 3203 | x = emit_move_change_mode (imode, mode, x, force); |
539eaa3a | 3204 | if (x == NULL_RTX) |
f3222b79 | 3205 | return NULL; |
652b0932 | 3206 | y = emit_move_change_mode (imode, mode, y, force); |
539eaa3a | 3207 | if (y == NULL_RTX) |
f3222b79 | 3208 | return NULL; |
539eaa3a | 3209 | return emit_insn (GEN_FCN (code) (x, y)); |
261c4230 RS |
3210 | } |
3211 | ||
1466e387 RH |
3212 | /* A subroutine of emit_move_insn_1. X is a push_operand in MODE. |
3213 | Return an equivalent MEM that does not use an auto-increment. */ | |
261c4230 | 3214 | |
e2f0f5f7 | 3215 | rtx |
1466e387 | 3216 | emit_move_resolve_push (enum machine_mode mode, rtx x) |
261c4230 | 3217 | { |
1466e387 RH |
3218 | enum rtx_code code = GET_CODE (XEXP (x, 0)); |
3219 | HOST_WIDE_INT adjust; | |
3220 | rtx temp; | |
261c4230 | 3221 | |
1466e387 RH |
3222 | adjust = GET_MODE_SIZE (mode); |
3223 | #ifdef PUSH_ROUNDING | |
3224 | adjust = PUSH_ROUNDING (adjust); | |
3225 | #endif | |
3226 | if (code == PRE_DEC || code == POST_DEC) | |
3227 | adjust = -adjust; | |
6541fe75 JJ |
3228 | else if (code == PRE_MODIFY || code == POST_MODIFY) |
3229 | { | |
3230 | rtx expr = XEXP (XEXP (x, 0), 1); | |
3231 | HOST_WIDE_INT val; | |
3232 | ||
3233 | gcc_assert (GET_CODE (expr) == PLUS || GET_CODE (expr) == MINUS); | |
481683e1 | 3234 | gcc_assert (CONST_INT_P (XEXP (expr, 1))); |
6541fe75 JJ |
3235 | val = INTVAL (XEXP (expr, 1)); |
3236 | if (GET_CODE (expr) == MINUS) | |
3237 | val = -val; | |
3238 | gcc_assert (adjust == val || adjust == -val); | |
3239 | adjust = val; | |
3240 | } | |
76bbe028 | 3241 | |
1466e387 RH |
3242 | /* Do not use anti_adjust_stack, since we don't want to update |
3243 | stack_pointer_delta. */ | |
3244 | temp = expand_simple_binop (Pmode, PLUS, stack_pointer_rtx, | |
2f1cd2eb | 3245 | gen_int_mode (adjust, Pmode), stack_pointer_rtx, |
1466e387 RH |
3246 | 0, OPTAB_LIB_WIDEN); |
3247 | if (temp != stack_pointer_rtx) | |
3248 | emit_move_insn (stack_pointer_rtx, temp); | |
bbf6f052 | 3249 | |
1466e387 | 3250 | switch (code) |
7308a047 | 3251 | { |
1466e387 RH |
3252 | case PRE_INC: |
3253 | case PRE_DEC: | |
6541fe75 | 3254 | case PRE_MODIFY: |
1466e387 RH |
3255 | temp = stack_pointer_rtx; |
3256 | break; | |
3257 | case POST_INC: | |
1466e387 | 3258 | case POST_DEC: |
6541fe75 | 3259 | case POST_MODIFY: |
0a81f074 | 3260 | temp = plus_constant (Pmode, stack_pointer_rtx, -adjust); |
1466e387 RH |
3261 | break; |
3262 | default: | |
3263 | gcc_unreachable (); | |
3264 | } | |
7308a047 | 3265 | |
1466e387 RH |
3266 | return replace_equiv_address (x, temp); |
3267 | } | |
1a06f5fe | 3268 | |
1466e387 RH |
3269 | /* A subroutine of emit_move_complex. Generate a move from Y into X. |
3270 | X is known to satisfy push_operand, and MODE is known to be complex. | |
3271 | Returns the last instruction emitted. */ | |
bb93b973 | 3272 | |
f3222b79 | 3273 | rtx_insn * |
1466e387 RH |
3274 | emit_move_complex_push (enum machine_mode mode, rtx x, rtx y) |
3275 | { | |
3276 | enum machine_mode submode = GET_MODE_INNER (mode); | |
3277 | bool imag_first; | |
bb93b973 | 3278 | |
1466e387 RH |
3279 | #ifdef PUSH_ROUNDING |
3280 | unsigned int submodesize = GET_MODE_SIZE (submode); | |
bb93b973 | 3281 | |
1466e387 RH |
3282 | /* In case we output to the stack, but the size is smaller than the |
3283 | machine can push exactly, we need to use move instructions. */ | |
3284 | if (PUSH_ROUNDING (submodesize) != submodesize) | |
3285 | { | |
3286 | x = emit_move_resolve_push (mode, x); | |
3287 | return emit_move_insn (x, y); | |
3288 | } | |
79ce92d7 | 3289 | #endif |
7308a047 | 3290 | |
1466e387 RH |
3291 | /* Note that the real part always precedes the imag part in memory |
3292 | regardless of machine's endianness. */ | |
3293 | switch (GET_CODE (XEXP (x, 0))) | |
3294 | { | |
3295 | case PRE_DEC: | |
3296 | case POST_DEC: | |
3297 | imag_first = true; | |
3298 | break; | |
3299 | case PRE_INC: | |
3300 | case POST_INC: | |
3301 | imag_first = false; | |
3302 | break; | |
3303 | default: | |
3304 | gcc_unreachable (); | |
3305 | } | |
beb72684 | 3306 | |
1466e387 RH |
3307 | emit_move_insn (gen_rtx_MEM (submode, XEXP (x, 0)), |
3308 | read_complex_part (y, imag_first)); | |
3309 | return emit_move_insn (gen_rtx_MEM (submode, XEXP (x, 0)), | |
3310 | read_complex_part (y, !imag_first)); | |
3311 | } | |
405f63da | 3312 | |
ceca734e RH |
3313 | /* A subroutine of emit_move_complex. Perform the move from Y to X |
3314 | via two moves of the parts. Returns the last instruction emitted. */ | |
3315 | ||
f3222b79 | 3316 | rtx_insn * |
ceca734e RH |
3317 | emit_move_complex_parts (rtx x, rtx y) |
3318 | { | |
3319 | /* Show the output dies here. This is necessary for SUBREGs | |
3320 | of pseudos since we cannot track their lifetimes correctly; | |
3321 | hard regs shouldn't appear here except as return values. */ | |
3322 | if (!reload_completed && !reload_in_progress | |
3323 | && REG_P (x) && !reg_overlap_mentioned_p (x, y)) | |
c41c1387 | 3324 | emit_clobber (x); |
ceca734e RH |
3325 | |
3326 | write_complex_part (x, read_complex_part (y, false), false); | |
3327 | write_complex_part (x, read_complex_part (y, true), true); | |
3328 | ||
3329 | return get_last_insn (); | |
3330 | } | |
3331 | ||
1466e387 RH |
3332 | /* A subroutine of emit_move_insn_1. Generate a move from Y into X. |
3333 | MODE is known to be complex. Returns the last instruction emitted. */ | |
beb72684 | 3334 | |
f3222b79 | 3335 | static rtx_insn * |
1466e387 RH |
3336 | emit_move_complex (enum machine_mode mode, rtx x, rtx y) |
3337 | { | |
3338 | bool try_int; | |
405f63da | 3339 | |
1466e387 RH |
3340 | /* Need to take special care for pushes, to maintain proper ordering |
3341 | of the data, and possibly extra padding. */ | |
3342 | if (push_operand (x, mode)) | |
3343 | return emit_move_complex_push (mode, x, y); | |
7308a047 | 3344 | |
d617d2d8 EB |
3345 | /* See if we can coerce the target into moving both values at once, except |
3346 | for floating point where we favor moving as parts if this is easy. */ | |
c6506442 | 3347 | if (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT |
d617d2d8 EB |
3348 | && optab_handler (mov_optab, GET_MODE_INNER (mode)) != CODE_FOR_nothing |
3349 | && !(REG_P (x) | |
3350 | && HARD_REGISTER_P (x) | |
c3284718 | 3351 | && hard_regno_nregs[REGNO (x)][mode] == 1) |
d617d2d8 EB |
3352 | && !(REG_P (y) |
3353 | && HARD_REGISTER_P (y) | |
c3284718 | 3354 | && hard_regno_nregs[REGNO (y)][mode] == 1)) |
c6506442 | 3355 | try_int = false; |
1466e387 | 3356 | /* Not possible if the values are inherently not adjacent. */ |
c6506442 | 3357 | else if (GET_CODE (x) == CONCAT || GET_CODE (y) == CONCAT) |
1466e387 RH |
3358 | try_int = false; |
3359 | /* Is possible if both are registers (or subregs of registers). */ | |
3360 | else if (register_operand (x, mode) && register_operand (y, mode)) | |
3361 | try_int = true; | |
3362 | /* If one of the operands is a memory, and alignment constraints | |
3363 | are friendly enough, we may be able to do combined memory operations. | |
3364 | We do not attempt this if Y is a constant because that combination is | |
3365 | usually better with the by-parts thing below. */ | |
3366 | else if ((MEM_P (x) ? !CONSTANT_P (y) : MEM_P (y)) | |
3367 | && (!STRICT_ALIGNMENT | |
3368 | || get_mode_alignment (mode) == BIGGEST_ALIGNMENT)) | |
3369 | try_int = true; | |
3370 | else | |
3371 | try_int = false; | |
3372 | ||
3373 | if (try_int) | |
a3600c71 | 3374 | { |
f3222b79 | 3375 | rtx_insn *ret; |
c6506442 DE |
3376 | |
3377 | /* For memory to memory moves, optimal behavior can be had with the | |
3378 | existing block move logic. */ | |
3379 | if (MEM_P (x) && MEM_P (y)) | |
3380 | { | |
3381 | emit_block_move (x, y, GEN_INT (GET_MODE_SIZE (mode)), | |
3382 | BLOCK_OP_NO_LIBCALL); | |
3383 | return get_last_insn (); | |
3384 | } | |
3385 | ||
652b0932 | 3386 | ret = emit_move_via_integer (mode, x, y, true); |
1466e387 RH |
3387 | if (ret) |
3388 | return ret; | |
3389 | } | |
a3600c71 | 3390 | |
ceca734e | 3391 | return emit_move_complex_parts (x, y); |
1466e387 | 3392 | } |
a3600c71 | 3393 | |
1466e387 RH |
3394 | /* A subroutine of emit_move_insn_1. Generate a move from Y into X. |
3395 | MODE is known to be MODE_CC. Returns the last instruction emitted. */ | |
a3600c71 | 3396 | |
f3222b79 | 3397 | static rtx_insn * |
1466e387 RH |
3398 | emit_move_ccmode (enum machine_mode mode, rtx x, rtx y) |
3399 | { | |
f3222b79 | 3400 | rtx_insn *ret; |
a3600c71 | 3401 | |
1466e387 RH |
3402 | /* Assume all MODE_CC modes are equivalent; if we have movcc, use it. */ |
3403 | if (mode != CCmode) | |
3404 | { | |
947131ba | 3405 | enum insn_code code = optab_handler (mov_optab, CCmode); |
1466e387 | 3406 | if (code != CODE_FOR_nothing) |
539eaa3a RH |
3407 | { |
3408 | x = emit_move_change_mode (CCmode, mode, x, true); | |
3409 | y = emit_move_change_mode (CCmode, mode, y, true); | |
3410 | return emit_insn (GEN_FCN (code) (x, y)); | |
3411 | } | |
1466e387 RH |
3412 | } |
3413 | ||
3414 | /* Otherwise, find the MODE_INT mode of the same width. */ | |
652b0932 | 3415 | ret = emit_move_via_integer (mode, x, y, false); |
1466e387 RH |
3416 | gcc_assert (ret != NULL); |
3417 | return ret; | |
3418 | } | |
3419 | ||
550ab0c6 JM |
3420 | /* Return true if word I of OP lies entirely in the |
3421 | undefined bits of a paradoxical subreg. */ | |
3422 | ||
3423 | static bool | |
22ea9ec0 | 3424 | undefined_operand_subword_p (const_rtx op, int i) |
550ab0c6 JM |
3425 | { |
3426 | enum machine_mode innermode, innermostmode; | |
3427 | int offset; | |
3428 | if (GET_CODE (op) != SUBREG) | |
3429 | return false; | |
3430 | innermode = GET_MODE (op); | |
3431 | innermostmode = GET_MODE (SUBREG_REG (op)); | |
3432 | offset = i * UNITS_PER_WORD + SUBREG_BYTE (op); | |
3433 | /* The SUBREG_BYTE represents offset, as if the value were stored in | |
3434 | memory, except for a paradoxical subreg where we define | |
3435 | SUBREG_BYTE to be 0; undo this exception as in | |
3436 | simplify_subreg. */ | |
3437 | if (SUBREG_BYTE (op) == 0 | |
3438 | && GET_MODE_SIZE (innermostmode) < GET_MODE_SIZE (innermode)) | |
3439 | { | |
3440 | int difference = (GET_MODE_SIZE (innermostmode) - GET_MODE_SIZE (innermode)); | |
3441 | if (WORDS_BIG_ENDIAN) | |
3442 | offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD; | |
3443 | if (BYTES_BIG_ENDIAN) | |
3444 | offset += difference % UNITS_PER_WORD; | |
3445 | } | |
3446 | if (offset >= GET_MODE_SIZE (innermostmode) | |
3447 | || offset <= -GET_MODE_SIZE (word_mode)) | |
3448 | return true; | |
3449 | return false; | |
3450 | } | |
3451 | ||
1466e387 RH |
3452 | /* A subroutine of emit_move_insn_1. Generate a move from Y into X. |
3453 | MODE is any multi-word or full-word mode that lacks a move_insn | |
3454 | pattern. Note that you will get better code if you define such | |
3455 | patterns, even if they must turn into multiple assembler instructions. */ | |
3456 | ||
f3222b79 | 3457 | static rtx_insn * |
1466e387 RH |
3458 | emit_move_multi_word (enum machine_mode mode, rtx x, rtx y) |
3459 | { | |
f3222b79 DM |
3460 | rtx_insn *last_insn = 0; |
3461 | rtx_insn *seq; | |
3462 | rtx inner; | |
1466e387 RH |
3463 | bool need_clobber; |
3464 | int i; | |
ed1223ba | 3465 | |
1466e387 | 3466 | gcc_assert (GET_MODE_SIZE (mode) >= UNITS_PER_WORD); |
ed1223ba | 3467 | |
1466e387 RH |
3468 | /* If X is a push on the stack, do the push now and replace |
3469 | X with a reference to the stack pointer. */ | |
3470 | if (push_operand (x, mode)) | |
3471 | x = emit_move_resolve_push (mode, x); | |
3472 | ||
3473 | /* If we are in reload, see if either operand is a MEM whose address | |
3474 | is scheduled for replacement. */ | |
3475 | if (reload_in_progress && MEM_P (x) | |
3476 | && (inner = find_replacement (&XEXP (x, 0))) != XEXP (x, 0)) | |
3477 | x = replace_equiv_address_nv (x, inner); | |
3478 | if (reload_in_progress && MEM_P (y) | |
3479 | && (inner = find_replacement (&XEXP (y, 0))) != XEXP (y, 0)) | |
3480 | y = replace_equiv_address_nv (y, inner); | |
3481 | ||
3482 | start_sequence (); | |
3483 | ||
3484 | need_clobber = false; | |
3485 | for (i = 0; | |
3486 | i < (GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD; | |
3487 | i++) | |
3488 | { | |
3489 | rtx xpart = operand_subword (x, i, 1, mode); | |
550ab0c6 JM |
3490 | rtx ypart; |
3491 | ||
3492 | /* Do not generate code for a move if it would come entirely | |
3493 | from the undefined bits of a paradoxical subreg. */ | |
3494 | if (undefined_operand_subword_p (y, i)) | |
3495 | continue; | |
3496 | ||
3497 | ypart = operand_subword (y, i, 1, mode); | |
1466e387 RH |
3498 | |
3499 | /* If we can't get a part of Y, put Y into memory if it is a | |
535a42b1 NS |
3500 | constant. Otherwise, force it into a register. Then we must |
3501 | be able to get a part of Y. */ | |
1466e387 | 3502 | if (ypart == 0 && CONSTANT_P (y)) |
a3600c71 | 3503 | { |
aacd3885 | 3504 | y = use_anchored_address (force_const_mem (mode, y)); |
1466e387 | 3505 | ypart = operand_subword (y, i, 1, mode); |
a3600c71 | 3506 | } |
1466e387 RH |
3507 | else if (ypart == 0) |
3508 | ypart = operand_subword_force (y, i, mode); | |
3509 | ||
3510 | gcc_assert (xpart && ypart); | |
3511 | ||
3512 | need_clobber |= (GET_CODE (xpart) == SUBREG); | |
502b8322 | 3513 | |
1466e387 | 3514 | last_insn = emit_move_insn (xpart, ypart); |
a3600c71 HPN |
3515 | } |
3516 | ||
1466e387 RH |
3517 | seq = get_insns (); |
3518 | end_sequence (); | |
3519 | ||
3520 | /* Show the output dies here. This is necessary for SUBREGs | |
3521 | of pseudos since we cannot track their lifetimes correctly; | |
3522 | hard regs shouldn't appear here except as return values. | |
3523 | We never want to emit such a clobber after reload. */ | |
3524 | if (x != y | |
3525 | && ! (reload_in_progress || reload_completed) | |
3526 | && need_clobber != 0) | |
c41c1387 | 3527 | emit_clobber (x); |
1466e387 RH |
3528 | |
3529 | emit_insn (seq); | |
3530 | ||
3531 | return last_insn; | |
3532 | } | |
3533 | ||
3534 | /* Low level part of emit_move_insn. | |
3535 | Called just like emit_move_insn, but assumes X and Y | |
3536 | are basically valid. */ | |
3537 | ||
f3222b79 | 3538 | rtx_insn * |
1466e387 RH |
3539 | emit_move_insn_1 (rtx x, rtx y) |
3540 | { | |
3541 | enum machine_mode mode = GET_MODE (x); | |
3542 | enum insn_code code; | |
3543 | ||
3544 | gcc_assert ((unsigned int) mode < (unsigned int) MAX_MACHINE_MODE); | |
3545 | ||
947131ba | 3546 | code = optab_handler (mov_optab, mode); |
1466e387 RH |
3547 | if (code != CODE_FOR_nothing) |
3548 | return emit_insn (GEN_FCN (code) (x, y)); | |
3549 | ||
3550 | /* Expand complex moves by moving real part and imag part. */ | |
3551 | if (COMPLEX_MODE_P (mode)) | |
3552 | return emit_move_complex (mode, x, y); | |
3553 | ||
0f996086 CF |
3554 | if (GET_MODE_CLASS (mode) == MODE_DECIMAL_FLOAT |
3555 | || ALL_FIXED_POINT_MODE_P (mode)) | |
ef7befe0 | 3556 | { |
f3222b79 | 3557 | rtx_insn *result = emit_move_via_integer (mode, x, y, true); |
ef7befe0 BE |
3558 | |
3559 | /* If we can't find an integer mode, use multi words. */ | |
3560 | if (result) | |
3561 | return result; | |
3562 | else | |
3563 | return emit_move_multi_word (mode, x, y); | |
3564 | } | |
3565 | ||
1466e387 RH |
3566 | if (GET_MODE_CLASS (mode) == MODE_CC) |
3567 | return emit_move_ccmode (mode, x, y); | |
3568 | ||
5581fc91 RS |
3569 | /* Try using a move pattern for the corresponding integer mode. This is |
3570 | only safe when simplify_subreg can convert MODE constants into integer | |
3571 | constants. At present, it can only do this reliably if the value | |
3572 | fits within a HOST_WIDE_INT. */ | |
1466e387 | 3573 | if (!CONSTANT_P (y) || GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT) |
bbf6f052 | 3574 | { |
f3222b79 | 3575 | rtx_insn *ret = emit_move_via_integer (mode, x, y, lra_in_progress); |
55a2c322 | 3576 | |
1466e387 | 3577 | if (ret) |
55a2c322 VM |
3578 | { |
3579 | if (! lra_in_progress || recog (PATTERN (ret), ret, 0) >= 0) | |
3580 | return ret; | |
3581 | } | |
1466e387 | 3582 | } |
0fb7aeda | 3583 | |
1466e387 RH |
3584 | return emit_move_multi_word (mode, x, y); |
3585 | } | |
918a6124 | 3586 | |
1466e387 RH |
3587 | /* Generate code to copy Y into X. |
3588 | Both Y and X must have the same mode, except that | |
3589 | Y can be a constant with VOIDmode. | |
3590 | This mode cannot be BLKmode; use emit_block_move for that. | |
3a94c984 | 3591 | |
1466e387 | 3592 | Return the last instruction emitted. */ |
3ef1eef4 | 3593 | |
f3222b79 | 3594 | rtx_insn * |
1466e387 RH |
3595 | emit_move_insn (rtx x, rtx y) |
3596 | { | |
3597 | enum machine_mode mode = GET_MODE (x); | |
3598 | rtx y_cst = NULL_RTX; | |
f3222b79 DM |
3599 | rtx_insn *last_insn; |
3600 | rtx set; | |
15a7a8ec | 3601 | |
1466e387 RH |
3602 | gcc_assert (mode != BLKmode |
3603 | && (GET_MODE (y) == mode || GET_MODE (y) == VOIDmode)); | |
bbf6f052 | 3604 | |
1466e387 RH |
3605 | if (CONSTANT_P (y)) |
3606 | { | |
3607 | if (optimize | |
3608 | && SCALAR_FLOAT_MODE_P (GET_MODE (x)) | |
3609 | && (last_insn = compress_float_constant (x, y))) | |
3610 | return last_insn; | |
bbf6f052 | 3611 | |
1466e387 | 3612 | y_cst = y; |
bbf6f052 | 3613 | |
1a627b35 | 3614 | if (!targetm.legitimate_constant_p (mode, y)) |
1466e387 RH |
3615 | { |
3616 | y = force_const_mem (mode, y); | |
235ae7be | 3617 | |
1466e387 RH |
3618 | /* If the target's cannot_force_const_mem prevented the spill, |
3619 | assume that the target's move expanders will also take care | |
3620 | of the non-legitimate constant. */ | |
3621 | if (!y) | |
3622 | y = y_cst; | |
aacd3885 RS |
3623 | else |
3624 | y = use_anchored_address (y); | |
bbf6f052 | 3625 | } |
1466e387 | 3626 | } |
6551fa4d | 3627 | |
1466e387 RH |
3628 | /* If X or Y are memory references, verify that their addresses are valid |
3629 | for the machine. */ | |
3630 | if (MEM_P (x) | |
09e881c9 BE |
3631 | && (! memory_address_addr_space_p (GET_MODE (x), XEXP (x, 0), |
3632 | MEM_ADDR_SPACE (x)) | |
3de5e93a | 3633 | && ! push_operand (x, GET_MODE (x)))) |
1466e387 | 3634 | x = validize_mem (x); |
235ae7be | 3635 | |
1466e387 | 3636 | if (MEM_P (y) |
09e881c9 BE |
3637 | && ! memory_address_addr_space_p (GET_MODE (y), XEXP (y, 0), |
3638 | MEM_ADDR_SPACE (y))) | |
1466e387 | 3639 | y = validize_mem (y); |
235ae7be | 3640 | |
1466e387 | 3641 | gcc_assert (mode != BLKmode); |
235ae7be | 3642 | |
1466e387 RH |
3643 | last_insn = emit_move_insn_1 (x, y); |
3644 | ||
3645 | if (y_cst && REG_P (x) | |
3646 | && (set = single_set (last_insn)) != NULL_RTX | |
3647 | && SET_DEST (set) == x | |
3648 | && ! rtx_equal_p (y_cst, SET_SRC (set))) | |
591e29d9 | 3649 | set_unique_reg_note (last_insn, REG_EQUAL, copy_rtx (y_cst)); |
1466e387 RH |
3650 | |
3651 | return last_insn; | |
bbf6f052 | 3652 | } |
51286de6 RH |
3653 | |
3654 | /* If Y is representable exactly in a narrower mode, and the target can | |
3655 | perform the extension directly from constant or memory, then emit the | |
3656 | move as an extension. */ | |
3657 | ||
f3222b79 | 3658 | static rtx_insn * |
502b8322 | 3659 | compress_float_constant (rtx x, rtx y) |
51286de6 RH |
3660 | { |
3661 | enum machine_mode dstmode = GET_MODE (x); | |
3662 | enum machine_mode orig_srcmode = GET_MODE (y); | |
3663 | enum machine_mode srcmode; | |
3664 | REAL_VALUE_TYPE r; | |
e4541b7a | 3665 | int oldcost, newcost; |
f40751dd | 3666 | bool speed = optimize_insn_for_speed_p (); |
51286de6 RH |
3667 | |
3668 | REAL_VALUE_FROM_CONST_DOUBLE (r, y); | |
3669 | ||
1a627b35 | 3670 | if (targetm.legitimate_constant_p (dstmode, y)) |
5e8f01f4 | 3671 | oldcost = set_src_cost (y, speed); |
e4541b7a | 3672 | else |
5e8f01f4 | 3673 | oldcost = set_src_cost (force_const_mem (dstmode, y), speed); |
e4541b7a | 3674 | |
51286de6 RH |
3675 | for (srcmode = GET_CLASS_NARROWEST_MODE (GET_MODE_CLASS (orig_srcmode)); |
3676 | srcmode != orig_srcmode; | |
3677 | srcmode = GET_MODE_WIDER_MODE (srcmode)) | |
3678 | { | |
3679 | enum insn_code ic; | |
f3222b79 DM |
3680 | rtx trunc_y; |
3681 | rtx_insn *last_insn; | |
51286de6 RH |
3682 | |
3683 | /* Skip if the target can't extend this way. */ | |
3684 | ic = can_extend_p (dstmode, srcmode, 0); | |
3685 | if (ic == CODE_FOR_nothing) | |
3686 | continue; | |
3687 | ||
3688 | /* Skip if the narrowed value isn't exact. */ | |
3689 | if (! exact_real_truncate (srcmode, &r)) | |
3690 | continue; | |
3691 | ||
3692 | trunc_y = CONST_DOUBLE_FROM_REAL_VALUE (r, srcmode); | |
3693 | ||
1a627b35 | 3694 | if (targetm.legitimate_constant_p (srcmode, trunc_y)) |
51286de6 RH |
3695 | { |
3696 | /* Skip if the target needs extra instructions to perform | |
3697 | the extension. */ | |
2ef6ce06 | 3698 | if (!insn_operand_matches (ic, 1, trunc_y)) |
51286de6 | 3699 | continue; |
e4541b7a | 3700 | /* This is valid, but may not be cheaper than the original. */ |
5e8f01f4 RS |
3701 | newcost = set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode, trunc_y), |
3702 | speed); | |
e4541b7a DJ |
3703 | if (oldcost < newcost) |
3704 | continue; | |
51286de6 RH |
3705 | } |
3706 | else if (float_extend_from_mem[dstmode][srcmode]) | |
e4541b7a DJ |
3707 | { |
3708 | trunc_y = force_const_mem (srcmode, trunc_y); | |
3709 | /* This is valid, but may not be cheaper than the original. */ | |
5e8f01f4 RS |
3710 | newcost = set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode, trunc_y), |
3711 | speed); | |
e4541b7a DJ |
3712 | if (oldcost < newcost) |
3713 | continue; | |
3714 | trunc_y = validize_mem (trunc_y); | |
3715 | } | |
51286de6 RH |
3716 | else |
3717 | continue; | |
d763e130 RS |
3718 | |
3719 | /* For CSE's benefit, force the compressed constant pool entry | |
3720 | into a new pseudo. This constant may be used in different modes, | |
3721 | and if not, combine will put things back together for us. */ | |
3722 | trunc_y = force_reg (srcmode, trunc_y); | |
a4d70cfa JJ |
3723 | |
3724 | /* If x is a hard register, perform the extension into a pseudo, | |
3725 | so that e.g. stack realignment code is aware of it. */ | |
3726 | rtx target = x; | |
3727 | if (REG_P (x) && HARD_REGISTER_P (x)) | |
3728 | target = gen_reg_rtx (dstmode); | |
3729 | ||
3730 | emit_unop_insn (ic, target, trunc_y, UNKNOWN); | |
51286de6 RH |
3731 | last_insn = get_last_insn (); |
3732 | ||
a4d70cfa | 3733 | if (REG_P (target)) |
0c19a26f | 3734 | set_unique_reg_note (last_insn, REG_EQUAL, y); |
51286de6 | 3735 | |
a4d70cfa JJ |
3736 | if (target != x) |
3737 | return emit_move_insn (x, target); | |
51286de6 RH |
3738 | return last_insn; |
3739 | } | |
3740 | ||
f3222b79 | 3741 | return NULL; |
51286de6 | 3742 | } |
bbf6f052 RK |
3743 | \f |
3744 | /* Pushing data onto the stack. */ | |
3745 | ||
3746 | /* Push a block of length SIZE (perhaps variable) | |
3747 | and return an rtx to address the beginning of the block. | |
bbf6f052 RK |
3748 | The value may be virtual_outgoing_args_rtx. |
3749 | ||
3750 | EXTRA is the number of bytes of padding to push in addition to SIZE. | |
3751 | BELOW nonzero means this padding comes at low addresses; | |
3752 | otherwise, the padding comes at high addresses. */ | |
3753 | ||
3754 | rtx | |
502b8322 | 3755 | push_block (rtx size, int extra, int below) |
bbf6f052 | 3756 | { |
b3694847 | 3757 | rtx temp; |
88f63c77 RK |
3758 | |
3759 | size = convert_modes (Pmode, ptr_mode, size, 1); | |
bbf6f052 | 3760 | if (CONSTANT_P (size)) |
0a81f074 | 3761 | anti_adjust_stack (plus_constant (Pmode, size, extra)); |
f8cfc6aa | 3762 | else if (REG_P (size) && extra == 0) |
bbf6f052 RK |
3763 | anti_adjust_stack (size); |
3764 | else | |
3765 | { | |
ce48579b | 3766 | temp = copy_to_mode_reg (Pmode, size); |
bbf6f052 | 3767 | if (extra != 0) |
2f1cd2eb RS |
3768 | temp = expand_binop (Pmode, add_optab, temp, |
3769 | gen_int_mode (extra, Pmode), | |
bbf6f052 RK |
3770 | temp, 0, OPTAB_LIB_WIDEN); |
3771 | anti_adjust_stack (temp); | |
3772 | } | |
3773 | ||
f73ad30e | 3774 | #ifndef STACK_GROWS_DOWNWARD |
f73ad30e | 3775 | if (0) |
f73ad30e JH |
3776 | #else |
3777 | if (1) | |
bbf6f052 | 3778 | #endif |
f73ad30e | 3779 | { |
f73ad30e JH |
3780 | temp = virtual_outgoing_args_rtx; |
3781 | if (extra != 0 && below) | |
0a81f074 | 3782 | temp = plus_constant (Pmode, temp, extra); |
f73ad30e JH |
3783 | } |
3784 | else | |
3785 | { | |
481683e1 | 3786 | if (CONST_INT_P (size)) |
0a81f074 | 3787 | temp = plus_constant (Pmode, virtual_outgoing_args_rtx, |
3a94c984 | 3788 | -INTVAL (size) - (below ? 0 : extra)); |
f73ad30e JH |
3789 | else if (extra != 0 && !below) |
3790 | temp = gen_rtx_PLUS (Pmode, virtual_outgoing_args_rtx, | |
0a81f074 RS |
3791 | negate_rtx (Pmode, plus_constant (Pmode, size, |
3792 | extra))); | |
f73ad30e JH |
3793 | else |
3794 | temp = gen_rtx_PLUS (Pmode, virtual_outgoing_args_rtx, | |
3795 | negate_rtx (Pmode, size)); | |
3796 | } | |
bbf6f052 RK |
3797 | |
3798 | return memory_address (GET_CLASS_NARROWEST_MODE (MODE_INT), temp); | |
3799 | } | |
3800 | ||
9a08d230 RH |
3801 | /* A utility routine that returns the base of an auto-inc memory, or NULL. */ |
3802 | ||
3803 | static rtx | |
3804 | mem_autoinc_base (rtx mem) | |
3805 | { | |
3806 | if (MEM_P (mem)) | |
3807 | { | |
3808 | rtx addr = XEXP (mem, 0); | |
3809 | if (GET_RTX_CLASS (GET_CODE (addr)) == RTX_AUTOINC) | |
3810 | return XEXP (addr, 0); | |
3811 | } | |
3812 | return NULL; | |
3813 | } | |
3814 | ||
3815 | /* A utility routine used here, in reload, and in try_split. The insns | |
3816 | after PREV up to and including LAST are known to adjust the stack, | |
3817 | with a final value of END_ARGS_SIZE. Iterate backward from LAST | |
3818 | placing notes as appropriate. PREV may be NULL, indicating the | |
3819 | entire insn sequence prior to LAST should be scanned. | |
3820 | ||
3821 | The set of allowed stack pointer modifications is small: | |
3822 | (1) One or more auto-inc style memory references (aka pushes), | |
3823 | (2) One or more addition/subtraction with the SP as destination, | |
3824 | (3) A single move insn with the SP as destination, | |
319638ed JJ |
3825 | (4) A call_pop insn, |
3826 | (5) Noreturn call insns if !ACCUMULATE_OUTGOING_ARGS. | |
9a08d230 | 3827 | |
319638ed JJ |
3828 | Insns in the sequence that do not modify the SP are ignored, |
3829 | except for noreturn calls. | |
9a08d230 RH |
3830 | |
3831 | The return value is the amount of adjustment that can be trivially | |
3832 | verified, via immediate operand or auto-inc. If the adjustment | |
3833 | cannot be trivially extracted, the return value is INT_MIN. */ | |
3834 | ||
42aa5124 | 3835 | HOST_WIDE_INT |
e8a54173 | 3836 | find_args_size_adjust (rtx_insn *insn) |
9a08d230 | 3837 | { |
42aa5124 RH |
3838 | rtx dest, set, pat; |
3839 | int i; | |
9a08d230 | 3840 | |
42aa5124 RH |
3841 | pat = PATTERN (insn); |
3842 | set = NULL; | |
9a08d230 | 3843 | |
42aa5124 RH |
3844 | /* Look for a call_pop pattern. */ |
3845 | if (CALL_P (insn)) | |
3846 | { | |
3847 | /* We have to allow non-call_pop patterns for the case | |
3848 | of emit_single_push_insn of a TLS address. */ | |
3849 | if (GET_CODE (pat) != PARALLEL) | |
3850 | return 0; | |
9a08d230 | 3851 | |
42aa5124 RH |
3852 | /* All call_pop have a stack pointer adjust in the parallel. |
3853 | The call itself is always first, and the stack adjust is | |
3854 | usually last, so search from the end. */ | |
3855 | for (i = XVECLEN (pat, 0) - 1; i > 0; --i) | |
9a08d230 | 3856 | { |
42aa5124 RH |
3857 | set = XVECEXP (pat, 0, i); |
3858 | if (GET_CODE (set) != SET) | |
6bfd73a6 | 3859 | continue; |
42aa5124 RH |
3860 | dest = SET_DEST (set); |
3861 | if (dest == stack_pointer_rtx) | |
3862 | break; | |
9a08d230 | 3863 | } |
42aa5124 RH |
3864 | /* We'd better have found the stack pointer adjust. */ |
3865 | if (i == 0) | |
3866 | return 0; | |
3867 | /* Fall through to process the extracted SET and DEST | |
3868 | as if it was a standalone insn. */ | |
3869 | } | |
3870 | else if (GET_CODE (pat) == SET) | |
3871 | set = pat; | |
3872 | else if ((set = single_set (insn)) != NULL) | |
3873 | ; | |
3874 | else if (GET_CODE (pat) == PARALLEL) | |
3875 | { | |
3876 | /* ??? Some older ports use a parallel with a stack adjust | |
3877 | and a store for a PUSH_ROUNDING pattern, rather than a | |
3878 | PRE/POST_MODIFY rtx. Don't force them to update yet... */ | |
3879 | /* ??? See h8300 and m68k, pushqi1. */ | |
3880 | for (i = XVECLEN (pat, 0) - 1; i >= 0; --i) | |
9a08d230 | 3881 | { |
42aa5124 RH |
3882 | set = XVECEXP (pat, 0, i); |
3883 | if (GET_CODE (set) != SET) | |
9a08d230 | 3884 | continue; |
42aa5124 RH |
3885 | dest = SET_DEST (set); |
3886 | if (dest == stack_pointer_rtx) | |
3887 | break; | |
3888 | ||
3889 | /* We do not expect an auto-inc of the sp in the parallel. */ | |
3890 | gcc_checking_assert (mem_autoinc_base (dest) != stack_pointer_rtx); | |
3891 | gcc_checking_assert (mem_autoinc_base (SET_SRC (set)) | |
3892 | != stack_pointer_rtx); | |
9a08d230 | 3893 | } |
42aa5124 RH |
3894 | if (i < 0) |
3895 | return 0; | |
3896 | } | |
3897 | else | |
3898 | return 0; | |
3899 | ||
3900 | dest = SET_DEST (set); | |
3901 | ||
3902 | /* Look for direct modifications of the stack pointer. */ | |
3903 | if (REG_P (dest) && REGNO (dest) == STACK_POINTER_REGNUM) | |
3904 | { | |
3905 | /* Look for a trivial adjustment, otherwise assume nothing. */ | |
3906 | /* Note that the SPU restore_stack_block pattern refers to | |
3907 | the stack pointer in V4SImode. Consider that non-trivial. */ | |
3908 | if (SCALAR_INT_MODE_P (GET_MODE (dest)) | |
3909 | && GET_CODE (SET_SRC (set)) == PLUS | |
3910 | && XEXP (SET_SRC (set), 0) == stack_pointer_rtx | |
3911 | && CONST_INT_P (XEXP (SET_SRC (set), 1))) | |
3912 | return INTVAL (XEXP (SET_SRC (set), 1)); | |
3913 | /* ??? Reload can generate no-op moves, which will be cleaned | |
3914 | up later. Recognize it and continue searching. */ | |
3915 | else if (rtx_equal_p (dest, SET_SRC (set))) | |
3916 | return 0; | |
9a08d230 | 3917 | else |
42aa5124 RH |
3918 | return HOST_WIDE_INT_MIN; |
3919 | } | |
3920 | else | |
3921 | { | |
3922 | rtx mem, addr; | |
9a08d230 | 3923 | |
9a08d230 | 3924 | /* Otherwise only think about autoinc patterns. */ |
42aa5124 | 3925 | if (mem_autoinc_base (dest) == stack_pointer_rtx) |
9a08d230 | 3926 | { |
42aa5124 RH |
3927 | mem = dest; |
3928 | gcc_checking_assert (mem_autoinc_base (SET_SRC (set)) | |
3929 | != stack_pointer_rtx); | |
9a08d230 | 3930 | } |
42aa5124 RH |
3931 | else if (mem_autoinc_base (SET_SRC (set)) == stack_pointer_rtx) |
3932 | mem = SET_SRC (set); | |
9a08d230 | 3933 | else |
42aa5124 RH |
3934 | return 0; |
3935 | ||
3936 | addr = XEXP (mem, 0); | |
3937 | switch (GET_CODE (addr)) | |
3938 | { | |
3939 | case PRE_INC: | |
3940 | case POST_INC: | |
3941 | return GET_MODE_SIZE (GET_MODE (mem)); | |
3942 | case PRE_DEC: | |
3943 | case POST_DEC: | |
3944 | return -GET_MODE_SIZE (GET_MODE (mem)); | |
3945 | case PRE_MODIFY: | |
3946 | case POST_MODIFY: | |
3947 | addr = XEXP (addr, 1); | |
3948 | gcc_assert (GET_CODE (addr) == PLUS); | |
3949 | gcc_assert (XEXP (addr, 0) == stack_pointer_rtx); | |
3950 | gcc_assert (CONST_INT_P (XEXP (addr, 1))); | |
3951 | return INTVAL (XEXP (addr, 1)); | |
3952 | default: | |
3953 | gcc_unreachable (); | |
3954 | } | |
3955 | } | |
3956 | } | |
3957 | ||
3958 | int | |
e5b51ca0 | 3959 | fixup_args_size_notes (rtx_insn *prev, rtx_insn *last, int end_args_size) |
42aa5124 RH |
3960 | { |
3961 | int args_size = end_args_size; | |
3962 | bool saw_unknown = false; | |
dc01c3d1 | 3963 | rtx_insn *insn; |
42aa5124 RH |
3964 | |
3965 | for (insn = last; insn != prev; insn = PREV_INSN (insn)) | |
3966 | { | |
3967 | HOST_WIDE_INT this_delta; | |
3968 | ||
3969 | if (!NONDEBUG_INSN_P (insn)) | |
9a08d230 RH |
3970 | continue; |
3971 | ||
42aa5124 RH |
3972 | this_delta = find_args_size_adjust (insn); |
3973 | if (this_delta == 0) | |
319638ed JJ |
3974 | { |
3975 | if (!CALL_P (insn) | |
3976 | || ACCUMULATE_OUTGOING_ARGS | |
3977 | || find_reg_note (insn, REG_NORETURN, NULL_RTX) == NULL_RTX) | |
3978 | continue; | |
3979 | } | |
42aa5124 RH |
3980 | |
3981 | gcc_assert (!saw_unknown); | |
3982 | if (this_delta == HOST_WIDE_INT_MIN) | |
3983 | saw_unknown = true; | |
3984 | ||
9a08d230 RH |
3985 | add_reg_note (insn, REG_ARGS_SIZE, GEN_INT (args_size)); |
3986 | #ifdef STACK_GROWS_DOWNWARD | |
eb87c7c4 | 3987 | this_delta = -(unsigned HOST_WIDE_INT) this_delta; |
9a08d230 RH |
3988 | #endif |
3989 | args_size -= this_delta; | |
3990 | } | |
3991 | ||
3992 | return saw_unknown ? INT_MIN : args_size; | |
3993 | } | |
21d93687 | 3994 | |
9a08d230 | 3995 | #ifdef PUSH_ROUNDING |
566aa174 | 3996 | /* Emit single push insn. */ |
21d93687 | 3997 | |
566aa174 | 3998 | static void |
9a08d230 | 3999 | emit_single_push_insn_1 (enum machine_mode mode, rtx x, tree type) |
566aa174 | 4000 | { |
566aa174 | 4001 | rtx dest_addr; |
918a6124 | 4002 | unsigned rounded_size = PUSH_ROUNDING (GET_MODE_SIZE (mode)); |
566aa174 | 4003 | rtx dest; |
371b8fc0 | 4004 | enum insn_code icode; |
566aa174 | 4005 | |
371b8fc0 JH |
4006 | stack_pointer_delta += PUSH_ROUNDING (GET_MODE_SIZE (mode)); |
4007 | /* If there is push pattern, use it. Otherwise try old way of throwing | |
4008 | MEM representing push operation to move expander. */ | |
947131ba | 4009 | icode = optab_handler (push_optab, mode); |
371b8fc0 JH |
4010 | if (icode != CODE_FOR_nothing) |
4011 | { | |
a5c7d693 RS |
4012 | struct expand_operand ops[1]; |
4013 | ||
4014 | create_input_operand (&ops[0], x, mode); | |
4015 | if (maybe_expand_insn (icode, 1, ops)) | |
4016 | return; | |
371b8fc0 | 4017 | } |
566aa174 JH |
4018 | if (GET_MODE_SIZE (mode) == rounded_size) |
4019 | dest_addr = gen_rtx_fmt_e (STACK_PUSH_CODE, Pmode, stack_pointer_rtx); | |
329d586f KH |
4020 | /* If we are to pad downward, adjust the stack pointer first and |
4021 | then store X into the stack location using an offset. This is | |
4022 | because emit_move_insn does not know how to pad; it does not have | |
4023 | access to type. */ | |
4024 | else if (FUNCTION_ARG_PADDING (mode, type) == downward) | |
4025 | { | |
4026 | unsigned padding_size = rounded_size - GET_MODE_SIZE (mode); | |
4027 | HOST_WIDE_INT offset; | |
4028 | ||
4029 | emit_move_insn (stack_pointer_rtx, | |
4030 | expand_binop (Pmode, | |
4031 | #ifdef STACK_GROWS_DOWNWARD | |
4032 | sub_optab, | |
4033 | #else | |
4034 | add_optab, | |
4035 | #endif | |
4036 | stack_pointer_rtx, | |
2f1cd2eb | 4037 | gen_int_mode (rounded_size, Pmode), |
329d586f KH |
4038 | NULL_RTX, 0, OPTAB_LIB_WIDEN)); |
4039 | ||
4040 | offset = (HOST_WIDE_INT) padding_size; | |
4041 | #ifdef STACK_GROWS_DOWNWARD | |
4042 | if (STACK_PUSH_CODE == POST_DEC) | |
4043 | /* We have already decremented the stack pointer, so get the | |
4044 | previous value. */ | |
4045 | offset += (HOST_WIDE_INT) rounded_size; | |
4046 | #else | |
4047 | if (STACK_PUSH_CODE == POST_INC) | |
4048 | /* We have already incremented the stack pointer, so get the | |
4049 | previous value. */ | |
4050 | offset -= (HOST_WIDE_INT) rounded_size; | |
4051 | #endif | |
4789c0ce RS |
4052 | dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx, |
4053 | gen_int_mode (offset, Pmode)); | |
329d586f | 4054 | } |
566aa174 JH |
4055 | else |
4056 | { | |
4057 | #ifdef STACK_GROWS_DOWNWARD | |
329d586f | 4058 | /* ??? This seems wrong if STACK_PUSH_CODE == POST_DEC. */ |
566aa174 | 4059 | dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx, |
4789c0ce RS |
4060 | gen_int_mode (-(HOST_WIDE_INT) rounded_size, |
4061 | Pmode)); | |
566aa174 | 4062 | #else |
329d586f | 4063 | /* ??? This seems wrong if STACK_PUSH_CODE == POST_INC. */ |
566aa174 | 4064 | dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx, |
4789c0ce | 4065 | gen_int_mode (rounded_size, Pmode)); |
566aa174 JH |
4066 | #endif |
4067 | dest_addr = gen_rtx_PRE_MODIFY (Pmode, stack_pointer_rtx, dest_addr); | |
4068 | } | |
4069 | ||
4070 | dest = gen_rtx_MEM (mode, dest_addr); | |
4071 | ||
566aa174 JH |
4072 | if (type != 0) |
4073 | { | |
4074 | set_mem_attributes (dest, type, 1); | |
c3d32120 | 4075 | |
e2f0f5f7 | 4076 | if (cfun->tail_call_marked) |
c3d32120 RK |
4077 | /* Function incoming arguments may overlap with sibling call |
4078 | outgoing arguments and we cannot allow reordering of reads | |
4079 | from function arguments with stores to outgoing arguments | |
4080 | of sibling calls. */ | |
4081 | set_mem_alias_set (dest, 0); | |
566aa174 JH |
4082 | } |
4083 | emit_move_insn (dest, x); | |
566aa174 | 4084 | } |
9a08d230 RH |
4085 | |
4086 | /* Emit and annotate a single push insn. */ | |
4087 | ||
4088 | static void | |
4089 | emit_single_push_insn (enum machine_mode mode, rtx x, tree type) | |
4090 | { | |
4091 | int delta, old_delta = stack_pointer_delta; | |
770affca DM |
4092 | rtx_insn *prev = get_last_insn (); |
4093 | rtx_insn *last; | |
9a08d230 RH |
4094 | |
4095 | emit_single_push_insn_1 (mode, x, type); | |
4096 | ||
4097 | last = get_last_insn (); | |
4098 | ||
4099 | /* Notice the common case where we emitted exactly one insn. */ | |
4100 | if (PREV_INSN (last) == prev) | |
4101 | { | |
4102 | add_reg_note (last, REG_ARGS_SIZE, GEN_INT (stack_pointer_delta)); | |
4103 | return; | |
4104 | } | |
4105 | ||
4106 | delta = fixup_args_size_notes (prev, last, stack_pointer_delta); | |
4107 | gcc_assert (delta == INT_MIN || delta == old_delta); | |
4108 | } | |
21d93687 | 4109 | #endif |
566aa174 | 4110 | |
bbf6f052 RK |
4111 | /* Generate code to push X onto the stack, assuming it has mode MODE and |
4112 | type TYPE. | |
4113 | MODE is redundant except when X is a CONST_INT (since they don't | |
4114 | carry mode info). | |
4115 | SIZE is an rtx for the size of data to be copied (in bytes), | |
4116 | needed only if X is BLKmode. | |
4117 | ||
f1eaaf73 | 4118 | ALIGN (in bits) is maximum alignment we can assume. |
bbf6f052 | 4119 | |
cd048831 | 4120 | If PARTIAL and REG are both nonzero, then copy that many of the first |
78a52f11 RH |
4121 | bytes of X into registers starting with REG, and push the rest of X. |
4122 | The amount of space pushed is decreased by PARTIAL bytes. | |
bbf6f052 | 4123 | REG must be a hard register in this case. |
cd048831 RK |
4124 | If REG is zero but PARTIAL is not, take any all others actions for an |
4125 | argument partially in registers, but do not actually load any | |
4126 | registers. | |
bbf6f052 RK |
4127 | |
4128 | EXTRA is the amount in bytes of extra space to leave next to this arg. | |
6dc42e49 | 4129 | This is ignored if an argument block has already been allocated. |
bbf6f052 RK |
4130 | |
4131 | On a machine that lacks real push insns, ARGS_ADDR is the address of | |
4132 | the bottom of the argument block for this call. We use indexing off there | |
4133 | to store the arg. On machines with push insns, ARGS_ADDR is 0 when a | |
4134 | argument block has not been preallocated. | |
4135 | ||
e5e809f4 JL |
4136 | ARGS_SO_FAR is the size of args previously pushed for this call. |
4137 | ||
4138 | REG_PARM_STACK_SPACE is nonzero if functions require stack space | |
4139 | for arguments passed in registers. If nonzero, it will be the number | |
4140 | of bytes required. */ | |
bbf6f052 RK |
4141 | |
4142 | void | |
502b8322 AJ |
4143 | emit_push_insn (rtx x, enum machine_mode mode, tree type, rtx size, |
4144 | unsigned int align, int partial, rtx reg, int extra, | |
4145 | rtx args_addr, rtx args_so_far, int reg_parm_stack_space, | |
4146 | rtx alignment_pad) | |
bbf6f052 RK |
4147 | { |
4148 | rtx xinner; | |
4149 | enum direction stack_direction | |
4150 | #ifdef STACK_GROWS_DOWNWARD | |
4151 | = downward; | |
4152 | #else | |
4153 | = upward; | |
4154 | #endif | |
4155 | ||
4156 | /* Decide where to pad the argument: `downward' for below, | |
4157 | `upward' for above, or `none' for don't pad it. | |
4158 | Default is below for small data on big-endian machines; else above. */ | |
4159 | enum direction where_pad = FUNCTION_ARG_PADDING (mode, type); | |
4160 | ||
0fb7aeda | 4161 | /* Invert direction if stack is post-decrement. |
9e0e11bf GK |
4162 | FIXME: why? */ |
4163 | if (STACK_PUSH_CODE == POST_DEC) | |
bbf6f052 RK |
4164 | if (where_pad != none) |
4165 | where_pad = (where_pad == downward ? upward : downward); | |
4166 | ||
ad76cef8 | 4167 | xinner = x; |
bbf6f052 | 4168 | |
46bd2bee JM |
4169 | if (mode == BLKmode |
4170 | || (STRICT_ALIGNMENT && align < GET_MODE_ALIGNMENT (mode))) | |
bbf6f052 RK |
4171 | { |
4172 | /* Copy a block into the stack, entirely or partially. */ | |
4173 | ||
b3694847 | 4174 | rtx temp; |
78a52f11 | 4175 | int used; |
531547e9 | 4176 | int offset; |
bbf6f052 | 4177 | int skip; |
3a94c984 | 4178 | |
78a52f11 RH |
4179 | offset = partial % (PARM_BOUNDARY / BITS_PER_UNIT); |
4180 | used = partial - offset; | |
531547e9 | 4181 | |
46bd2bee JM |
4182 | if (mode != BLKmode) |
4183 | { | |
4184 | /* A value is to be stored in an insufficiently aligned | |
4185 | stack slot; copy via a suitably aligned slot if | |
4186 | necessary. */ | |
4187 | size = GEN_INT (GET_MODE_SIZE (mode)); | |
4188 | if (!MEM_P (xinner)) | |
4189 | { | |
9474e8ab | 4190 | temp = assign_temp (type, 1, 1); |
46bd2bee JM |
4191 | emit_move_insn (temp, xinner); |
4192 | xinner = temp; | |
4193 | } | |
4194 | } | |
4195 | ||
5b0264cb | 4196 | gcc_assert (size); |
bbf6f052 | 4197 | |
bbf6f052 RK |
4198 | /* USED is now the # of bytes we need not copy to the stack |
4199 | because registers will take care of them. */ | |
4200 | ||
4201 | if (partial != 0) | |
f4ef873c | 4202 | xinner = adjust_address (xinner, BLKmode, used); |
bbf6f052 RK |
4203 | |
4204 | /* If the partial register-part of the arg counts in its stack size, | |
4205 | skip the part of stack space corresponding to the registers. | |
4206 | Otherwise, start copying to the beginning of the stack space, | |
4207 | by setting SKIP to 0. */ | |
e5e809f4 | 4208 | skip = (reg_parm_stack_space == 0) ? 0 : used; |
bbf6f052 RK |
4209 | |
4210 | #ifdef PUSH_ROUNDING | |
4211 | /* Do it with several push insns if that doesn't take lots of insns | |
4212 | and if there is no difficulty with push insns that skip bytes | |
4213 | on the stack for alignment purposes. */ | |
4214 | if (args_addr == 0 | |
f73ad30e | 4215 | && PUSH_ARGS |
481683e1 | 4216 | && CONST_INT_P (size) |
bbf6f052 | 4217 | && skip == 0 |
f26aca6d | 4218 | && MEM_ALIGN (xinner) >= align |
15914757 | 4219 | && (MOVE_BY_PIECES_P ((unsigned) INTVAL (size) - used, align)) |
bbf6f052 RK |
4220 | /* Here we avoid the case of a structure whose weak alignment |
4221 | forces many pushes of a small amount of data, | |
4222 | and such small pushes do rounding that causes trouble. */ | |
e1565e65 | 4223 | && ((! SLOW_UNALIGNED_ACCESS (word_mode, align)) |
19caa751 | 4224 | || align >= BIGGEST_ALIGNMENT |
f1eaaf73 DE |
4225 | || (PUSH_ROUNDING (align / BITS_PER_UNIT) |
4226 | == (align / BITS_PER_UNIT))) | |
3e926b4d | 4227 | && (HOST_WIDE_INT) PUSH_ROUNDING (INTVAL (size)) == INTVAL (size)) |
bbf6f052 RK |
4228 | { |
4229 | /* Push padding now if padding above and stack grows down, | |
4230 | or if padding below and stack grows up. | |
4231 | But if space already allocated, this has already been done. */ | |
4232 | if (extra && args_addr == 0 | |
4233 | && where_pad != none && where_pad != stack_direction) | |
906c4e36 | 4234 | anti_adjust_stack (GEN_INT (extra)); |
bbf6f052 | 4235 | |
8fd3cf4e | 4236 | move_by_pieces (NULL, xinner, INTVAL (size) - used, align, 0); |
bbf6f052 RK |
4237 | } |
4238 | else | |
3a94c984 | 4239 | #endif /* PUSH_ROUNDING */ |
bbf6f052 | 4240 | { |
7ab923cc JJ |
4241 | rtx target; |
4242 | ||
bbf6f052 RK |
4243 | /* Otherwise make space on the stack and copy the data |
4244 | to the address of that space. */ | |
4245 | ||
4246 | /* Deduct words put into registers from the size we must copy. */ | |
4247 | if (partial != 0) | |
4248 | { | |
481683e1 | 4249 | if (CONST_INT_P (size)) |
906c4e36 | 4250 | size = GEN_INT (INTVAL (size) - used); |
bbf6f052 RK |
4251 | else |
4252 | size = expand_binop (GET_MODE (size), sub_optab, size, | |
2f1cd2eb RS |
4253 | gen_int_mode (used, GET_MODE (size)), |
4254 | NULL_RTX, 0, OPTAB_LIB_WIDEN); | |
bbf6f052 RK |
4255 | } |
4256 | ||
4257 | /* Get the address of the stack space. | |
4258 | In this case, we do not deal with EXTRA separately. | |
4259 | A single stack adjust will do. */ | |
4260 | if (! args_addr) | |
4261 | { | |
4262 | temp = push_block (size, extra, where_pad == downward); | |
4263 | extra = 0; | |
4264 | } | |
481683e1 | 4265 | else if (CONST_INT_P (args_so_far)) |
bbf6f052 | 4266 | temp = memory_address (BLKmode, |
0a81f074 | 4267 | plus_constant (Pmode, args_addr, |
bbf6f052 RK |
4268 | skip + INTVAL (args_so_far))); |
4269 | else | |
4270 | temp = memory_address (BLKmode, | |
0a81f074 RS |
4271 | plus_constant (Pmode, |
4272 | gen_rtx_PLUS (Pmode, | |
38a448ca RH |
4273 | args_addr, |
4274 | args_so_far), | |
bbf6f052 | 4275 | skip)); |
4ca79136 RH |
4276 | |
4277 | if (!ACCUMULATE_OUTGOING_ARGS) | |
4278 | { | |
4279 | /* If the source is referenced relative to the stack pointer, | |
4280 | copy it to another register to stabilize it. We do not need | |
4281 | to do this if we know that we won't be changing sp. */ | |
4282 | ||
4283 | if (reg_mentioned_p (virtual_stack_dynamic_rtx, temp) | |
4284 | || reg_mentioned_p (virtual_outgoing_args_rtx, temp)) | |
4285 | temp = copy_to_reg (temp); | |
4286 | } | |
4287 | ||
3a94c984 | 4288 | target = gen_rtx_MEM (BLKmode, temp); |
7ab923cc | 4289 | |
2bb16349 RH |
4290 | /* We do *not* set_mem_attributes here, because incoming arguments |
4291 | may overlap with sibling call outgoing arguments and we cannot | |
4292 | allow reordering of reads from function arguments with stores | |
4293 | to outgoing arguments of sibling calls. We do, however, want | |
4294 | to record the alignment of the stack slot. */ | |
44bb111a RH |
4295 | /* ALIGN may well be better aligned than TYPE, e.g. due to |
4296 | PARM_BOUNDARY. Assume the caller isn't lying. */ | |
4297 | set_mem_align (target, align); | |
4ca79136 | 4298 | |
44bb111a | 4299 | emit_block_move (target, xinner, size, BLOCK_OP_CALL_PARM); |
bbf6f052 RK |
4300 | } |
4301 | } | |
4302 | else if (partial > 0) | |
4303 | { | |
4304 | /* Scalar partly in registers. */ | |
4305 | ||
4306 | int size = GET_MODE_SIZE (mode) / UNITS_PER_WORD; | |
4307 | int i; | |
4308 | int not_stack; | |
78a52f11 | 4309 | /* # bytes of start of argument |
bbf6f052 | 4310 | that we must make space for but need not store. */ |
ac7e839c | 4311 | int offset = partial % (PARM_BOUNDARY / BITS_PER_UNIT); |
bbf6f052 RK |
4312 | int args_offset = INTVAL (args_so_far); |
4313 | int skip; | |
4314 | ||
4315 | /* Push padding now if padding above and stack grows down, | |
4316 | or if padding below and stack grows up. | |
4317 | But if space already allocated, this has already been done. */ | |
4318 | if (extra && args_addr == 0 | |
4319 | && where_pad != none && where_pad != stack_direction) | |
906c4e36 | 4320 | anti_adjust_stack (GEN_INT (extra)); |
bbf6f052 RK |
4321 | |
4322 | /* If we make space by pushing it, we might as well push | |
4323 | the real data. Otherwise, we can leave OFFSET nonzero | |
4324 | and leave the space uninitialized. */ | |
4325 | if (args_addr == 0) | |
4326 | offset = 0; | |
4327 | ||
4328 | /* Now NOT_STACK gets the number of words that we don't need to | |
40b0345d | 4329 | allocate on the stack. Convert OFFSET to words too. */ |
78a52f11 | 4330 | not_stack = (partial - offset) / UNITS_PER_WORD; |
ac7e839c | 4331 | offset /= UNITS_PER_WORD; |
bbf6f052 RK |
4332 | |
4333 | /* If the partial register-part of the arg counts in its stack size, | |
4334 | skip the part of stack space corresponding to the registers. | |
4335 | Otherwise, start copying to the beginning of the stack space, | |
4336 | by setting SKIP to 0. */ | |
e5e809f4 | 4337 | skip = (reg_parm_stack_space == 0) ? 0 : not_stack; |
bbf6f052 | 4338 | |
1a627b35 | 4339 | if (CONSTANT_P (x) && !targetm.legitimate_constant_p (mode, x)) |
bbf6f052 RK |
4340 | x = validize_mem (force_const_mem (mode, x)); |
4341 | ||
4342 | /* If X is a hard register in a non-integer mode, copy it into a pseudo; | |
4343 | SUBREGs of such registers are not allowed. */ | |
f8cfc6aa | 4344 | if ((REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER |
bbf6f052 RK |
4345 | && GET_MODE_CLASS (GET_MODE (x)) != MODE_INT)) |
4346 | x = copy_to_reg (x); | |
4347 | ||
4348 | /* Loop over all the words allocated on the stack for this arg. */ | |
4349 | /* We can do it by words, because any scalar bigger than a word | |
4350 | has a size a multiple of a word. */ | |
bbf6f052 | 4351 | for (i = size - 1; i >= not_stack; i--) |
bbf6f052 RK |
4352 | if (i >= not_stack + offset) |
4353 | emit_push_insn (operand_subword_force (x, i, mode), | |
906c4e36 RK |
4354 | word_mode, NULL_TREE, NULL_RTX, align, 0, NULL_RTX, |
4355 | 0, args_addr, | |
4356 | GEN_INT (args_offset + ((i - not_stack + skip) | |
e5e809f4 | 4357 | * UNITS_PER_WORD)), |
4fc026cd | 4358 | reg_parm_stack_space, alignment_pad); |
bbf6f052 RK |
4359 | } |
4360 | else | |
4361 | { | |
4362 | rtx addr; | |
3bdf5ad1 | 4363 | rtx dest; |
bbf6f052 RK |
4364 | |
4365 | /* Push padding now if padding above and stack grows down, | |
4366 | or if padding below and stack grows up. | |
4367 | But if space already allocated, this has already been done. */ | |
4368 | if (extra && args_addr == 0 | |
4369 | && where_pad != none && where_pad != stack_direction) | |
906c4e36 | 4370 | anti_adjust_stack (GEN_INT (extra)); |
bbf6f052 RK |
4371 | |
4372 | #ifdef PUSH_ROUNDING | |
f73ad30e | 4373 | if (args_addr == 0 && PUSH_ARGS) |
566aa174 | 4374 | emit_single_push_insn (mode, x, type); |
bbf6f052 RK |
4375 | else |
4376 | #endif | |
921b3427 | 4377 | { |
481683e1 | 4378 | if (CONST_INT_P (args_so_far)) |
921b3427 RK |
4379 | addr |
4380 | = memory_address (mode, | |
0a81f074 | 4381 | plus_constant (Pmode, args_addr, |
921b3427 | 4382 | INTVAL (args_so_far))); |
3a94c984 | 4383 | else |
38a448ca RH |
4384 | addr = memory_address (mode, gen_rtx_PLUS (Pmode, args_addr, |
4385 | args_so_far)); | |
566aa174 | 4386 | dest = gen_rtx_MEM (mode, addr); |
2bb16349 RH |
4387 | |
4388 | /* We do *not* set_mem_attributes here, because incoming arguments | |
4389 | may overlap with sibling call outgoing arguments and we cannot | |
4390 | allow reordering of reads from function arguments with stores | |
4391 | to outgoing arguments of sibling calls. We do, however, want | |
4392 | to record the alignment of the stack slot. */ | |
4393 | /* ALIGN may well be better aligned than TYPE, e.g. due to | |
4394 | PARM_BOUNDARY. Assume the caller isn't lying. */ | |
4395 | set_mem_align (dest, align); | |
bbf6f052 | 4396 | |
566aa174 | 4397 | emit_move_insn (dest, x); |
566aa174 | 4398 | } |
bbf6f052 RK |
4399 | } |
4400 | ||
bbf6f052 RK |
4401 | /* If part should go in registers, copy that part |
4402 | into the appropriate registers. Do this now, at the end, | |
4403 | since mem-to-mem copies above may do function calls. */ | |
cd048831 | 4404 | if (partial > 0 && reg != 0) |
fffa9c1d JW |
4405 | { |
4406 | /* Handle calls that pass values in multiple non-contiguous locations. | |
4407 | The Irix 6 ABI has examples of this. */ | |
4408 | if (GET_CODE (reg) == PARALLEL) | |
6e985040 | 4409 | emit_group_load (reg, x, type, -1); |
fffa9c1d | 4410 | else |
78a52f11 RH |
4411 | { |
4412 | gcc_assert (partial % UNITS_PER_WORD == 0); | |
4413 | move_block_to_reg (REGNO (reg), x, partial / UNITS_PER_WORD, mode); | |
4414 | } | |
fffa9c1d | 4415 | } |
bbf6f052 RK |
4416 | |
4417 | if (extra && args_addr == 0 && where_pad == stack_direction) | |
906c4e36 | 4418 | anti_adjust_stack (GEN_INT (extra)); |
3a94c984 | 4419 | |
3ea2292a | 4420 | if (alignment_pad && args_addr == 0) |
4fc026cd | 4421 | anti_adjust_stack (alignment_pad); |
bbf6f052 RK |
4422 | } |
4423 | \f | |
296b4ed9 RK |
4424 | /* Return X if X can be used as a subtarget in a sequence of arithmetic |
4425 | operations. */ | |
4426 | ||
4427 | static rtx | |
502b8322 | 4428 | get_subtarget (rtx x) |
296b4ed9 | 4429 | { |
7c27e184 PB |
4430 | return (optimize |
4431 | || x == 0 | |
296b4ed9 | 4432 | /* Only registers can be subtargets. */ |
f8cfc6aa | 4433 | || !REG_P (x) |
296b4ed9 RK |
4434 | /* Don't use hard regs to avoid extending their life. */ |
4435 | || REGNO (x) < FIRST_PSEUDO_REGISTER | |
296b4ed9 RK |
4436 | ? 0 : x); |
4437 | } | |
4438 | ||
8c1cfd5a RH |
4439 | /* A subroutine of expand_assignment. Optimize FIELD op= VAL, where |
4440 | FIELD is a bitfield. Returns true if the optimization was successful, | |
4441 | and there's nothing else to do. */ | |
4442 | ||
4443 | static bool | |
4444 | optimize_bitfield_assignment_op (unsigned HOST_WIDE_INT bitsize, | |
4445 | unsigned HOST_WIDE_INT bitpos, | |
1169e45d AH |
4446 | unsigned HOST_WIDE_INT bitregion_start, |
4447 | unsigned HOST_WIDE_INT bitregion_end, | |
8c1cfd5a RH |
4448 | enum machine_mode mode1, rtx str_rtx, |
4449 | tree to, tree src) | |
4450 | { | |
4451 | enum machine_mode str_mode = GET_MODE (str_rtx); | |
4452 | unsigned int str_bitsize = GET_MODE_BITSIZE (str_mode); | |
4453 | tree op0, op1; | |
4454 | rtx value, result; | |
4455 | optab binop; | |
3bf162a0 AP |
4456 | gimple srcstmt; |
4457 | enum tree_code code; | |
8c1cfd5a RH |
4458 | |
4459 | if (mode1 != VOIDmode | |
4460 | || bitsize >= BITS_PER_WORD | |
4461 | || str_bitsize > BITS_PER_WORD | |
4462 | || TREE_SIDE_EFFECTS (to) | |
4463 | || TREE_THIS_VOLATILE (to)) | |
4464 | return false; | |
4465 | ||
4466 | STRIP_NOPS (src); | |
3bf162a0 AP |
4467 | if (TREE_CODE (src) != SSA_NAME) |
4468 | return false; | |
4469 | if (TREE_CODE (TREE_TYPE (src)) != INTEGER_TYPE) | |
4470 | return false; | |
4471 | ||
4472 | srcstmt = get_gimple_for_ssa_name (src); | |
4473 | if (!srcstmt | |
4474 | || TREE_CODE_CLASS (gimple_assign_rhs_code (srcstmt)) != tcc_binary) | |
8c1cfd5a RH |
4475 | return false; |
4476 | ||
3bf162a0 AP |
4477 | code = gimple_assign_rhs_code (srcstmt); |
4478 | ||
4479 | op0 = gimple_assign_rhs1 (srcstmt); | |
4480 | ||
4481 | /* If OP0 is an SSA_NAME, then we want to walk the use-def chain | |
4482 | to find its initialization. Hopefully the initialization will | |
4483 | be from a bitfield load. */ | |
4484 | if (TREE_CODE (op0) == SSA_NAME) | |
4485 | { | |
4486 | gimple op0stmt = get_gimple_for_ssa_name (op0); | |
4487 | ||
4488 | /* We want to eventually have OP0 be the same as TO, which | |
4489 | should be a bitfield. */ | |
4490 | if (!op0stmt | |
4491 | || !is_gimple_assign (op0stmt) | |
4492 | || gimple_assign_rhs_code (op0stmt) != TREE_CODE (to)) | |
4493 | return false; | |
4494 | op0 = gimple_assign_rhs1 (op0stmt); | |
4495 | } | |
4496 | ||
4497 | op1 = gimple_assign_rhs2 (srcstmt); | |
8c1cfd5a RH |
4498 | |
4499 | if (!operand_equal_p (to, op0, 0)) | |
4500 | return false; | |
4501 | ||
4502 | if (MEM_P (str_rtx)) | |
4503 | { | |
4504 | unsigned HOST_WIDE_INT offset1; | |
4505 | ||
4506 | if (str_bitsize == 0 || str_bitsize > BITS_PER_WORD) | |
4507 | str_mode = word_mode; | |
4508 | str_mode = get_best_mode (bitsize, bitpos, | |
1169e45d | 4509 | bitregion_start, bitregion_end, |
8c1cfd5a RH |
4510 | MEM_ALIGN (str_rtx), str_mode, 0); |
4511 | if (str_mode == VOIDmode) | |
4512 | return false; | |
4513 | str_bitsize = GET_MODE_BITSIZE (str_mode); | |
4514 | ||
4515 | offset1 = bitpos; | |
4516 | bitpos %= str_bitsize; | |
4517 | offset1 = (offset1 - bitpos) / BITS_PER_UNIT; | |
4518 | str_rtx = adjust_address (str_rtx, str_mode, offset1); | |
4519 | } | |
4520 | else if (!REG_P (str_rtx) && GET_CODE (str_rtx) != SUBREG) | |
4521 | return false; | |
4522 | ||
4523 | /* If the bit field covers the whole REG/MEM, store_field | |
4524 | will likely generate better code. */ | |
4525 | if (bitsize >= str_bitsize) | |
4526 | return false; | |
4527 | ||
4528 | /* We can't handle fields split across multiple entities. */ | |
4529 | if (bitpos + bitsize > str_bitsize) | |
4530 | return false; | |
4531 | ||
4532 | if (BYTES_BIG_ENDIAN) | |
4533 | bitpos = str_bitsize - bitpos - bitsize; | |
4534 | ||
3bf162a0 | 4535 | switch (code) |
8c1cfd5a RH |
4536 | { |
4537 | case PLUS_EXPR: | |
4538 | case MINUS_EXPR: | |
4539 | /* For now, just optimize the case of the topmost bitfield | |
4540 | where we don't need to do any masking and also | |
4541 | 1 bit bitfields where xor can be used. | |
4542 | We might win by one instruction for the other bitfields | |
4543 | too if insv/extv instructions aren't used, so that | |
4544 | can be added later. */ | |
4545 | if (bitpos + bitsize != str_bitsize | |
4546 | && (bitsize != 1 || TREE_CODE (op1) != INTEGER_CST)) | |
4547 | break; | |
4548 | ||
49452c07 | 4549 | value = expand_expr (op1, NULL_RTX, str_mode, EXPAND_NORMAL); |
8c1cfd5a RH |
4550 | value = convert_modes (str_mode, |
4551 | TYPE_MODE (TREE_TYPE (op1)), value, | |
4552 | TYPE_UNSIGNED (TREE_TYPE (op1))); | |
4553 | ||
4554 | /* We may be accessing data outside the field, which means | |
4555 | we can alias adjacent data. */ | |
4556 | if (MEM_P (str_rtx)) | |
4557 | { | |
4558 | str_rtx = shallow_copy_rtx (str_rtx); | |
4559 | set_mem_alias_set (str_rtx, 0); | |
4560 | set_mem_expr (str_rtx, 0); | |
4561 | } | |
4562 | ||
3bf162a0 | 4563 | binop = code == PLUS_EXPR ? add_optab : sub_optab; |
8c1cfd5a RH |
4564 | if (bitsize == 1 && bitpos + bitsize != str_bitsize) |
4565 | { | |
4566 | value = expand_and (str_mode, value, const1_rtx, NULL); | |
4567 | binop = xor_optab; | |
4568 | } | |
8c5f2327 | 4569 | value = expand_shift (LSHIFT_EXPR, str_mode, value, bitpos, NULL_RTX, 1); |
8c1cfd5a RH |
4570 | result = expand_binop (str_mode, binop, str_rtx, |
4571 | value, str_rtx, 1, OPTAB_WIDEN); | |
4572 | if (result != str_rtx) | |
4573 | emit_move_insn (str_rtx, result); | |
4574 | return true; | |
4575 | ||
92fb2d32 KH |
4576 | case BIT_IOR_EXPR: |
4577 | case BIT_XOR_EXPR: | |
4578 | if (TREE_CODE (op1) != INTEGER_CST) | |
4579 | break; | |
8c5f2327 EB |
4580 | value = expand_expr (op1, NULL_RTX, str_mode, EXPAND_NORMAL); |
4581 | value = convert_modes (str_mode, | |
92fb2d32 KH |
4582 | TYPE_MODE (TREE_TYPE (op1)), value, |
4583 | TYPE_UNSIGNED (TREE_TYPE (op1))); | |
4584 | ||
4585 | /* We may be accessing data outside the field, which means | |
4586 | we can alias adjacent data. */ | |
4587 | if (MEM_P (str_rtx)) | |
4588 | { | |
4589 | str_rtx = shallow_copy_rtx (str_rtx); | |
4590 | set_mem_alias_set (str_rtx, 0); | |
4591 | set_mem_expr (str_rtx, 0); | |
4592 | } | |
4593 | ||
3bf162a0 | 4594 | binop = code == BIT_IOR_EXPR ? ior_optab : xor_optab; |
8c5f2327 | 4595 | if (bitpos + bitsize != str_bitsize) |
92fb2d32 | 4596 | { |
2f1cd2eb RS |
4597 | rtx mask = gen_int_mode (((unsigned HOST_WIDE_INT) 1 << bitsize) - 1, |
4598 | str_mode); | |
8c5f2327 | 4599 | value = expand_and (str_mode, value, mask, NULL_RTX); |
92fb2d32 | 4600 | } |
8c5f2327 EB |
4601 | value = expand_shift (LSHIFT_EXPR, str_mode, value, bitpos, NULL_RTX, 1); |
4602 | result = expand_binop (str_mode, binop, str_rtx, | |
92fb2d32 KH |
4603 | value, str_rtx, 1, OPTAB_WIDEN); |
4604 | if (result != str_rtx) | |
4605 | emit_move_insn (str_rtx, result); | |
4606 | return true; | |
4607 | ||
8c1cfd5a RH |
4608 | default: |
4609 | break; | |
4610 | } | |
4611 | ||
4612 | return false; | |
4613 | } | |
4614 | ||
1169e45d AH |
4615 | /* In the C++ memory model, consecutive bit fields in a structure are |
4616 | considered one memory location. | |
4617 | ||
1d0bafd9 | 4618 | Given a COMPONENT_REF EXP at position (BITPOS, OFFSET), this function |
26c71b93 | 4619 | returns the bit range of consecutive bits in which this COMPONENT_REF |
1d0bafd9 EB |
4620 | belongs. The values are returned in *BITSTART and *BITEND. *BITPOS |
4621 | and *OFFSET may be adjusted in the process. | |
4622 | ||
4623 | If the access does not need to be restricted, 0 is returned in both | |
26c71b93 | 4624 | *BITSTART and *BITEND. */ |
1169e45d AH |
4625 | |
4626 | static void | |
4627 | get_bit_range (unsigned HOST_WIDE_INT *bitstart, | |
4628 | unsigned HOST_WIDE_INT *bitend, | |
26c71b93 | 4629 | tree exp, |
1d0bafd9 EB |
4630 | HOST_WIDE_INT *bitpos, |
4631 | tree *offset) | |
1169e45d | 4632 | { |
1d0bafd9 | 4633 | HOST_WIDE_INT bitoffset; |
7ebf9677 | 4634 | tree field, repr; |
1169e45d AH |
4635 | |
4636 | gcc_assert (TREE_CODE (exp) == COMPONENT_REF); | |
4637 | ||
26c71b93 RG |
4638 | field = TREE_OPERAND (exp, 1); |
4639 | repr = DECL_BIT_FIELD_REPRESENTATIVE (field); | |
4640 | /* If we do not have a DECL_BIT_FIELD_REPRESENTATIVE there is no | |
4641 | need to limit the range we can access. */ | |
4642 | if (!repr) | |
1169e45d AH |
4643 | { |
4644 | *bitstart = *bitend = 0; | |
4645 | return; | |
4646 | } | |
4647 | ||
a59b038c EB |
4648 | /* If we have a DECL_BIT_FIELD_REPRESENTATIVE but the enclosing record is |
4649 | part of a larger bit field, then the representative does not serve any | |
4650 | useful purpose. This can occur in Ada. */ | |
4651 | if (handled_component_p (TREE_OPERAND (exp, 0))) | |
4652 | { | |
4653 | enum machine_mode rmode; | |
4654 | HOST_WIDE_INT rbitsize, rbitpos; | |
4655 | tree roffset; | |
4656 | int unsignedp; | |
4657 | int volatilep = 0; | |
4658 | get_inner_reference (TREE_OPERAND (exp, 0), &rbitsize, &rbitpos, | |
b3ecff82 | 4659 | &roffset, &rmode, &unsignedp, &volatilep, false); |
a59b038c EB |
4660 | if ((rbitpos % BITS_PER_UNIT) != 0) |
4661 | { | |
4662 | *bitstart = *bitend = 0; | |
4663 | return; | |
4664 | } | |
4665 | } | |
4666 | ||
26c71b93 | 4667 | /* Compute the adjustment to bitpos from the offset of the field |
7ebf9677 RG |
4668 | relative to the representative. DECL_FIELD_OFFSET of field and |
4669 | repr are the same by construction if they are not constants, | |
4670 | see finish_bitfield_layout. */ | |
cc269bb6 RS |
4671 | if (tree_fits_uhwi_p (DECL_FIELD_OFFSET (field)) |
4672 | && tree_fits_uhwi_p (DECL_FIELD_OFFSET (repr))) | |
ae7e9ddd RS |
4673 | bitoffset = (tree_to_uhwi (DECL_FIELD_OFFSET (field)) |
4674 | - tree_to_uhwi (DECL_FIELD_OFFSET (repr))) * BITS_PER_UNIT; | |
7ebf9677 RG |
4675 | else |
4676 | bitoffset = 0; | |
ae7e9ddd RS |
4677 | bitoffset += (tree_to_uhwi (DECL_FIELD_BIT_OFFSET (field)) |
4678 | - tree_to_uhwi (DECL_FIELD_BIT_OFFSET (repr))); | |
1169e45d | 4679 | |
1d0bafd9 | 4680 | /* If the adjustment is larger than bitpos, we would have a negative bit |
fda1ba0a JJ |
4681 | position for the lower bound and this may wreak havoc later. Adjust |
4682 | offset and bitpos to make the lower bound non-negative in that case. */ | |
1d0bafd9 EB |
4683 | if (bitoffset > *bitpos) |
4684 | { | |
4685 | HOST_WIDE_INT adjust = bitoffset - *bitpos; | |
1d0bafd9 | 4686 | gcc_assert ((adjust % BITS_PER_UNIT) == 0); |
1d0bafd9 EB |
4687 | |
4688 | *bitpos += adjust; | |
fda1ba0a JJ |
4689 | if (*offset == NULL_TREE) |
4690 | *offset = size_int (-adjust / BITS_PER_UNIT); | |
4691 | else | |
4692 | *offset | |
4693 | = size_binop (MINUS_EXPR, *offset, size_int (adjust / BITS_PER_UNIT)); | |
1d0bafd9 EB |
4694 | *bitstart = 0; |
4695 | } | |
4696 | else | |
4697 | *bitstart = *bitpos - bitoffset; | |
4698 | ||
ae7e9ddd | 4699 | *bitend = *bitstart + tree_to_uhwi (DECL_SIZE (repr)) - 1; |
1169e45d | 4700 | } |
8c1cfd5a | 4701 | |
e88ebf86 AO |
4702 | /* Returns true if ADDR is an ADDR_EXPR of a DECL that does not reside |
4703 | in memory and has non-BLKmode. DECL_RTL must not be a MEM; if | |
4704 | DECL_RTL was not set yet, return NORTL. */ | |
4705 | ||
4706 | static inline bool | |
4707 | addr_expr_of_non_mem_decl_p_1 (tree addr, bool nortl) | |
4708 | { | |
4709 | if (TREE_CODE (addr) != ADDR_EXPR) | |
4710 | return false; | |
4711 | ||
4712 | tree base = TREE_OPERAND (addr, 0); | |
4713 | ||
4714 | if (!DECL_P (base) | |
4715 | || TREE_ADDRESSABLE (base) | |
4716 | || DECL_MODE (base) == BLKmode) | |
4717 | return false; | |
4718 | ||
4719 | if (!DECL_RTL_SET_P (base)) | |
4720 | return nortl; | |
4721 | ||
4722 | return (!MEM_P (DECL_RTL (base))); | |
4723 | } | |
4724 | ||
22345357 RG |
4725 | /* Returns true if the MEM_REF REF refers to an object that does not |
4726 | reside in memory and has non-BLKmode. */ | |
4727 | ||
e88ebf86 | 4728 | static inline bool |
22345357 RG |
4729 | mem_ref_refers_to_non_mem_p (tree ref) |
4730 | { | |
4731 | tree base = TREE_OPERAND (ref, 0); | |
e88ebf86 AO |
4732 | return addr_expr_of_non_mem_decl_p_1 (base, false); |
4733 | } | |
4734 | ||
79f5e442 ZD |
4735 | /* Expand an assignment that stores the value of FROM into TO. If NONTEMPORAL |
4736 | is true, try generating a nontemporal store. */ | |
bbf6f052 | 4737 | |
e836a5a2 | 4738 | void |
79f5e442 | 4739 | expand_assignment (tree to, tree from, bool nontemporal) |
bbf6f052 | 4740 | { |
b3694847 | 4741 | rtx to_rtx = 0; |
bbf6f052 | 4742 | rtx result; |
be1ac4ec | 4743 | enum machine_mode mode; |
cab35794 | 4744 | unsigned int align; |
a5c7d693 | 4745 | enum insn_code icode; |
bbf6f052 RK |
4746 | |
4747 | /* Don't crash if the lhs of the assignment was erroneous. */ | |
bbf6f052 | 4748 | if (TREE_CODE (to) == ERROR_MARK) |
709f5be1 | 4749 | { |
e16b6fd0 | 4750 | expand_normal (from); |
e836a5a2 | 4751 | return; |
709f5be1 | 4752 | } |
bbf6f052 | 4753 | |
6cc1d694 RS |
4754 | /* Optimize away no-op moves without side-effects. */ |
4755 | if (operand_equal_p (to, from, 0)) | |
4756 | return; | |
4757 | ||
22345357 | 4758 | /* Handle misaligned stores. */ |
be1ac4ec RG |
4759 | mode = TYPE_MODE (TREE_TYPE (to)); |
4760 | if ((TREE_CODE (to) == MEM_REF | |
4761 | || TREE_CODE (to) == TARGET_MEM_REF) | |
4762 | && mode != BLKmode | |
43332529 | 4763 | && !mem_ref_refers_to_non_mem_p (to) |
b0f4a35f | 4764 | && ((align = get_object_alignment (to)) |
cab35794 | 4765 | < GET_MODE_ALIGNMENT (mode)) |
43332529 MJ |
4766 | && (((icode = optab_handler (movmisalign_optab, mode)) |
4767 | != CODE_FOR_nothing) | |
4768 | || SLOW_UNALIGNED_ACCESS (mode, align))) | |
be1ac4ec | 4769 | { |
02f6574b | 4770 | rtx reg, mem; |
be1ac4ec RG |
4771 | |
4772 | reg = expand_expr (from, NULL_RTX, VOIDmode, EXPAND_NORMAL); | |
4773 | reg = force_not_mem (reg); | |
02f6574b | 4774 | mem = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE); |
be1ac4ec | 4775 | |
43332529 MJ |
4776 | if (icode != CODE_FOR_nothing) |
4777 | { | |
02f6574b MJ |
4778 | struct expand_operand ops[2]; |
4779 | ||
43332529 MJ |
4780 | create_fixed_operand (&ops[0], mem); |
4781 | create_input_operand (&ops[1], reg, mode); | |
4782 | /* The movmisalign<mode> pattern cannot fail, else the assignment | |
4783 | would silently be omitted. */ | |
4784 | expand_insn (icode, 2, ops); | |
4785 | } | |
4786 | else | |
ca85aa4a | 4787 | store_bit_field (mem, GET_MODE_BITSIZE (mode), 0, 0, 0, mode, reg); |
be1ac4ec RG |
4788 | return; |
4789 | } | |
4790 | ||
bbf6f052 RK |
4791 | /* Assignment of a structure component needs special treatment |
4792 | if the structure component's rtx is not simply a MEM. | |
6be58303 JW |
4793 | Assignment of an array element at a constant index, and assignment of |
4794 | an array element in an unaligned packed structure field, has the same | |
22345357 | 4795 | problem. Same for (partially) storing into a non-memory object. */ |
8c1cfd5a | 4796 | if (handled_component_p (to) |
70f34814 | 4797 | || (TREE_CODE (to) == MEM_REF |
22345357 | 4798 | && mem_ref_refers_to_non_mem_p (to)) |
7c02ae17 | 4799 | || TREE_CODE (TREE_TYPE (to)) == ARRAY_TYPE) |
bbf6f052 RK |
4800 | { |
4801 | enum machine_mode mode1; | |
770ae6cc | 4802 | HOST_WIDE_INT bitsize, bitpos; |
1169e45d AH |
4803 | unsigned HOST_WIDE_INT bitregion_start = 0; |
4804 | unsigned HOST_WIDE_INT bitregion_end = 0; | |
7bb0943f | 4805 | tree offset; |
bbf6f052 RK |
4806 | int unsignedp; |
4807 | int volatilep = 0; | |
0088fcb1 RK |
4808 | tree tem; |
4809 | ||
4810 | push_temp_slots (); | |
839c4796 | 4811 | tem = get_inner_reference (to, &bitsize, &bitpos, &offset, &mode1, |
b3ecff82 | 4812 | &unsignedp, &volatilep, true); |
bbf6f052 | 4813 | |
fda1ba0a JJ |
4814 | /* Make sure bitpos is not negative, it can wreak havoc later. */ |
4815 | if (bitpos < 0) | |
4816 | { | |
4817 | gcc_assert (offset == NULL_TREE); | |
4818 | offset = size_int (bitpos >> (BITS_PER_UNIT == 8 | |
4819 | ? 3 : exact_log2 (BITS_PER_UNIT))); | |
4820 | bitpos &= BITS_PER_UNIT - 1; | |
4821 | } | |
4822 | ||
1169e45d AH |
4823 | if (TREE_CODE (to) == COMPONENT_REF |
4824 | && DECL_BIT_FIELD_TYPE (TREE_OPERAND (to, 1))) | |
1d0bafd9 | 4825 | get_bit_range (&bitregion_start, &bitregion_end, to, &bitpos, &offset); |
2399cad0 BE |
4826 | /* The C++ memory model naturally applies to byte-aligned fields. |
4827 | However, if we do not have a DECL_BIT_FIELD_TYPE but BITPOS or | |
4828 | BITSIZE are not byte-aligned, there is no need to limit the range | |
4829 | we can access. This can occur with packed structures in Ada. */ | |
4830 | else if (bitsize > 0 | |
4831 | && bitsize % BITS_PER_UNIT == 0 | |
4832 | && bitpos % BITS_PER_UNIT == 0) | |
4833 | { | |
4834 | bitregion_start = bitpos; | |
4835 | bitregion_end = bitpos + bitsize - 1; | |
4836 | } | |
1169e45d | 4837 | |
59bb1544 | 4838 | to_rtx = expand_expr (tem, NULL_RTX, VOIDmode, EXPAND_WRITE); |
1ed1b4fb | 4839 | |
996947e6 | 4840 | /* If the field has a mode, we want to access it in the |
1004f0c5 JJ |
4841 | field's mode, not the computed mode. |
4842 | If a MEM has VOIDmode (external with incomplete type), | |
4843 | use BLKmode for it instead. */ | |
4844 | if (MEM_P (to_rtx)) | |
4845 | { | |
996947e6 | 4846 | if (mode1 != VOIDmode) |
1004f0c5 JJ |
4847 | to_rtx = adjust_address (to_rtx, mode1, 0); |
4848 | else if (GET_MODE (to_rtx) == VOIDmode) | |
4849 | to_rtx = adjust_address (to_rtx, BLKmode, 0); | |
4850 | } | |
6a78b724 | 4851 | |
7bb0943f RS |
4852 | if (offset != 0) |
4853 | { | |
d4ebfa65 | 4854 | enum machine_mode address_mode; |
1e188d1e | 4855 | rtx offset_rtx; |
7bb0943f | 4856 | |
1e188d1e RH |
4857 | if (!MEM_P (to_rtx)) |
4858 | { | |
4859 | /* We can get constant negative offsets into arrays with broken | |
4860 | user code. Translate this to a trap instead of ICEing. */ | |
4861 | gcc_assert (TREE_CODE (offset) == INTEGER_CST); | |
4862 | expand_builtin_trap (); | |
4863 | to_rtx = gen_rtx_MEM (BLKmode, const0_rtx); | |
4864 | } | |
bd070e1a | 4865 | |
1e188d1e | 4866 | offset_rtx = expand_expr (offset, NULL_RTX, VOIDmode, EXPAND_SUM); |
372d6395 | 4867 | address_mode = get_address_mode (to_rtx); |
d4ebfa65 BE |
4868 | if (GET_MODE (offset_rtx) != address_mode) |
4869 | offset_rtx = convert_to_mode (address_mode, offset_rtx, 0); | |
bd070e1a | 4870 | |
7fbf8a3e BE |
4871 | /* If we have an expression in OFFSET_RTX and a non-zero |
4872 | byte offset in BITPOS, adding the byte offset before the | |
4873 | OFFSET_RTX results in better intermediate code, which makes | |
4874 | later rtl optimization passes perform better. | |
4875 | ||
4876 | We prefer intermediate code like this: | |
4877 | ||
4878 | r124:DI=r123:DI+0x18 | |
4879 | [r124:DI]=r121:DI | |
4880 | ||
4881 | ... instead of ... | |
4882 | ||
4883 | r124:DI=r123:DI+0x10 | |
4884 | [r124:DI+0x8]=r121:DI | |
4885 | ||
4886 | This is only done for aligned data values, as these can | |
4887 | be expected to result in single move instructions. */ | |
4888 | if (mode1 != VOIDmode | |
4889 | && bitpos != 0 | |
a06ef755 | 4890 | && bitsize > 0 |
3a94c984 | 4891 | && (bitpos % bitsize) == 0 |
89752202 | 4892 | && (bitsize % GET_MODE_ALIGNMENT (mode1)) == 0 |
7fbf8a3e | 4893 | && MEM_ALIGN (to_rtx) >= GET_MODE_ALIGNMENT (mode1)) |
89752202 | 4894 | { |
e3c8ea67 | 4895 | to_rtx = adjust_address (to_rtx, mode1, bitpos / BITS_PER_UNIT); |
26c096c3 BE |
4896 | bitregion_start = 0; |
4897 | if (bitregion_end >= (unsigned HOST_WIDE_INT) bitpos) | |
4898 | bitregion_end -= bitpos; | |
89752202 HB |
4899 | bitpos = 0; |
4900 | } | |
4901 | ||
0d4903b8 | 4902 | to_rtx = offset_address (to_rtx, offset_rtx, |
d50a16c4 EB |
4903 | highest_pow2_factor_for_target (to, |
4904 | offset)); | |
7bb0943f | 4905 | } |
c5c76735 | 4906 | |
6a866023 JJ |
4907 | /* No action is needed if the target is not a memory and the field |
4908 | lies completely outside that target. This can occur if the source | |
4909 | code contains an out-of-bounds access to a small array. */ | |
4910 | if (!MEM_P (to_rtx) | |
4911 | && GET_MODE (to_rtx) != BLKmode | |
4912 | && (unsigned HOST_WIDE_INT) bitpos | |
69660a70 | 4913 | >= GET_MODE_PRECISION (GET_MODE (to_rtx))) |
6a866023 JJ |
4914 | { |
4915 | expand_normal (from); | |
4916 | result = NULL; | |
4917 | } | |
8c1cfd5a | 4918 | /* Handle expand_expr of a complex value returning a CONCAT. */ |
6a866023 | 4919 | else if (GET_CODE (to_rtx) == CONCAT) |
a06ef755 | 4920 | { |
19228b93 JJ |
4921 | unsigned short mode_bitsize = GET_MODE_BITSIZE (GET_MODE (to_rtx)); |
4922 | if (COMPLEX_MODE_P (TYPE_MODE (TREE_TYPE (from))) | |
4923 | && bitpos == 0 | |
4924 | && bitsize == mode_bitsize) | |
4925 | result = store_expr (from, to_rtx, false, nontemporal); | |
4926 | else if (bitsize == mode_bitsize / 2 | |
4927 | && (bitpos == 0 || bitpos == mode_bitsize / 2)) | |
4928 | result = store_expr (from, XEXP (to_rtx, bitpos != 0), false, | |
4929 | nontemporal); | |
4930 | else if (bitpos + bitsize <= mode_bitsize / 2) | |
4931 | result = store_field (XEXP (to_rtx, 0), bitsize, bitpos, | |
1169e45d | 4932 | bitregion_start, bitregion_end, |
3467ad5c | 4933 | mode1, from, |
19228b93 JJ |
4934 | get_alias_set (to), nontemporal); |
4935 | else if (bitpos >= mode_bitsize / 2) | |
4936 | result = store_field (XEXP (to_rtx, 1), bitsize, | |
1169e45d AH |
4937 | bitpos - mode_bitsize / 2, |
4938 | bitregion_start, bitregion_end, | |
4939 | mode1, from, | |
3467ad5c | 4940 | get_alias_set (to), nontemporal); |
19228b93 | 4941 | else if (bitpos == 0 && bitsize == mode_bitsize) |
0becc986 | 4942 | { |
19228b93 JJ |
4943 | rtx from_rtx; |
4944 | result = expand_normal (from); | |
4945 | from_rtx = simplify_gen_subreg (GET_MODE (to_rtx), result, | |
4946 | TYPE_MODE (TREE_TYPE (from)), 0); | |
4947 | emit_move_insn (XEXP (to_rtx, 0), | |
4948 | read_complex_part (from_rtx, false)); | |
4949 | emit_move_insn (XEXP (to_rtx, 1), | |
4950 | read_complex_part (from_rtx, true)); | |
0becc986 RH |
4951 | } |
4952 | else | |
4953 | { | |
19228b93 | 4954 | rtx temp = assign_stack_temp (GET_MODE (to_rtx), |
9474e8ab | 4955 | GET_MODE_SIZE (GET_MODE (to_rtx))); |
19228b93 JJ |
4956 | write_complex_part (temp, XEXP (to_rtx, 0), false); |
4957 | write_complex_part (temp, XEXP (to_rtx, 1), true); | |
1169e45d AH |
4958 | result = store_field (temp, bitsize, bitpos, |
4959 | bitregion_start, bitregion_end, | |
4960 | mode1, from, | |
3467ad5c | 4961 | get_alias_set (to), nontemporal); |
19228b93 JJ |
4962 | emit_move_insn (XEXP (to_rtx, 0), read_complex_part (temp, false)); |
4963 | emit_move_insn (XEXP (to_rtx, 1), read_complex_part (temp, true)); | |
0becc986 | 4964 | } |
bbf6f052 | 4965 | } |
8c1cfd5a | 4966 | else |
df62f18a | 4967 | { |
8c1cfd5a | 4968 | if (MEM_P (to_rtx)) |
b8b139c7 | 4969 | { |
8c1cfd5a RH |
4970 | /* If the field is at offset zero, we could have been given the |
4971 | DECL_RTX of the parent struct. Don't munge it. */ | |
4972 | to_rtx = shallow_copy_rtx (to_rtx); | |
8c1cfd5a | 4973 | set_mem_attributes_minus_bitpos (to_rtx, to, 0, bitpos); |
8c1cfd5a RH |
4974 | if (volatilep) |
4975 | MEM_VOLATILE_P (to_rtx) = 1; | |
df62f18a | 4976 | } |
60ba25bf | 4977 | |
1169e45d AH |
4978 | if (optimize_bitfield_assignment_op (bitsize, bitpos, |
4979 | bitregion_start, bitregion_end, | |
4980 | mode1, | |
8c1cfd5a RH |
4981 | to_rtx, to, from)) |
4982 | result = NULL; | |
4983 | else | |
1169e45d AH |
4984 | result = store_field (to_rtx, bitsize, bitpos, |
4985 | bitregion_start, bitregion_end, | |
4986 | mode1, from, | |
3467ad5c | 4987 | get_alias_set (to), nontemporal); |
df62f18a JJ |
4988 | } |
4989 | ||
8c1cfd5a RH |
4990 | if (result) |
4991 | preserve_temp_slots (result); | |
a06ef755 | 4992 | pop_temp_slots (); |
e836a5a2 | 4993 | return; |
bbf6f052 RK |
4994 | } |
4995 | ||
cd1db108 RS |
4996 | /* If the rhs is a function call and its value is not an aggregate, |
4997 | call the function before we start to compute the lhs. | |
4998 | This is needed for correct code for cases such as | |
4999 | val = setjmp (buf) on machines where reference to val | |
1ad87b63 RK |
5000 | requires loading up part of an address in a separate insn. |
5001 | ||
1858863b JW |
5002 | Don't do this if TO is a VAR_DECL or PARM_DECL whose DECL_RTL is REG |
5003 | since it might be a promoted variable where the zero- or sign- extension | |
5004 | needs to be done. Handling this in the normal way is safe because no | |
4e3825db | 5005 | computation is done before the call. The same is true for SSA names. */ |
61f71b34 | 5006 | if (TREE_CODE (from) == CALL_EXPR && ! aggregate_value_p (from, from) |
90d245c5 | 5007 | && COMPLETE_TYPE_P (TREE_TYPE (from)) |
b35cd3c1 | 5008 | && TREE_CODE (TYPE_SIZE (TREE_TYPE (from))) == INTEGER_CST |
2ba87a29 RS |
5009 | && ! (((TREE_CODE (to) == VAR_DECL |
5010 | || TREE_CODE (to) == PARM_DECL | |
5011 | || TREE_CODE (to) == RESULT_DECL) | |
4e3825db MM |
5012 | && REG_P (DECL_RTL (to))) |
5013 | || TREE_CODE (to) == SSA_NAME)) | |
cd1db108 | 5014 | { |
0088fcb1 RK |
5015 | rtx value; |
5016 | ||
5017 | push_temp_slots (); | |
84217346 | 5018 | value = expand_normal (from); |
cd1db108 | 5019 | if (to_rtx == 0) |
37a08a29 | 5020 | to_rtx = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE); |
aaf87c45 | 5021 | |
fffa9c1d JW |
5022 | /* Handle calls that return values in multiple non-contiguous locations. |
5023 | The Irix 6 ABI has examples of this. */ | |
5024 | if (GET_CODE (to_rtx) == PARALLEL) | |
5ef0b50d EB |
5025 | { |
5026 | if (GET_CODE (value) == PARALLEL) | |
5027 | emit_group_move (to_rtx, value); | |
5028 | else | |
5029 | emit_group_load (to_rtx, value, TREE_TYPE (from), | |
5030 | int_size_in_bytes (TREE_TYPE (from))); | |
5031 | } | |
5032 | else if (GET_CODE (value) == PARALLEL) | |
5033 | emit_group_store (to_rtx, value, TREE_TYPE (from), | |
5034 | int_size_in_bytes (TREE_TYPE (from))); | |
fffa9c1d | 5035 | else if (GET_MODE (to_rtx) == BLKmode) |
929634d8 | 5036 | { |
3467ad5c | 5037 | /* Handle calls that return BLKmode values in registers. */ |
929634d8 EB |
5038 | if (REG_P (value)) |
5039 | copy_blkmode_from_reg (to_rtx, value, TREE_TYPE (from)); | |
5040 | else | |
5041 | emit_block_move (to_rtx, value, expr_size (from), BLOCK_OP_NORMAL); | |
5042 | } | |
aaf87c45 | 5043 | else |
6419e5b0 | 5044 | { |
5ae6cd0d | 5045 | if (POINTER_TYPE_P (TREE_TYPE (to))) |
d4ebfa65 BE |
5046 | value = convert_memory_address_addr_space |
5047 | (GET_MODE (to_rtx), value, | |
5048 | TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (to)))); | |
5049 | ||
6419e5b0 DT |
5050 | emit_move_insn (to_rtx, value); |
5051 | } | |
cd1db108 | 5052 | preserve_temp_slots (to_rtx); |
0088fcb1 | 5053 | pop_temp_slots (); |
e836a5a2 | 5054 | return; |
cd1db108 RS |
5055 | } |
5056 | ||
22345357 RG |
5057 | /* Ordinary treatment. Expand TO to get a REG or MEM rtx. */ |
5058 | to_rtx = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE); | |
bbf6f052 | 5059 | |
86d38d25 | 5060 | /* Don't move directly into a return register. */ |
14a774a9 | 5061 | if (TREE_CODE (to) == RESULT_DECL |
f8cfc6aa | 5062 | && (REG_P (to_rtx) || GET_CODE (to_rtx) == PARALLEL)) |
86d38d25 | 5063 | { |
0088fcb1 RK |
5064 | rtx temp; |
5065 | ||
5066 | push_temp_slots (); | |
1bae867a EB |
5067 | |
5068 | /* If the source is itself a return value, it still is in a pseudo at | |
5069 | this point so we can move it back to the return register directly. */ | |
5070 | if (REG_P (to_rtx) | |
5071 | && TYPE_MODE (TREE_TYPE (from)) == BLKmode | |
5072 | && TREE_CODE (from) != CALL_EXPR) | |
2ba87a29 RS |
5073 | temp = copy_blkmode_to_reg (GET_MODE (to_rtx), from); |
5074 | else | |
5075 | temp = expand_expr (from, NULL_RTX, GET_MODE (to_rtx), EXPAND_NORMAL); | |
14a774a9 | 5076 | |
5ef0b50d EB |
5077 | /* Handle calls that return values in multiple non-contiguous locations. |
5078 | The Irix 6 ABI has examples of this. */ | |
14a774a9 | 5079 | if (GET_CODE (to_rtx) == PARALLEL) |
5ef0b50d EB |
5080 | { |
5081 | if (GET_CODE (temp) == PARALLEL) | |
5082 | emit_group_move (to_rtx, temp); | |
5083 | else | |
5084 | emit_group_load (to_rtx, temp, TREE_TYPE (from), | |
5085 | int_size_in_bytes (TREE_TYPE (from))); | |
5086 | } | |
2ba87a29 | 5087 | else if (temp) |
14a774a9 RK |
5088 | emit_move_insn (to_rtx, temp); |
5089 | ||
86d38d25 | 5090 | preserve_temp_slots (to_rtx); |
0088fcb1 | 5091 | pop_temp_slots (); |
e836a5a2 | 5092 | return; |
86d38d25 RS |
5093 | } |
5094 | ||
bbf6f052 RK |
5095 | /* In case we are returning the contents of an object which overlaps |
5096 | the place the value is being stored, use a safe function when copying | |
5097 | a value through a pointer into a structure value return block. */ | |
434c8f4b RG |
5098 | if (TREE_CODE (to) == RESULT_DECL |
5099 | && TREE_CODE (from) == INDIRECT_REF | |
09e881c9 | 5100 | && ADDR_SPACE_GENERIC_P |
434c8f4b RG |
5101 | (TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (from, 0))))) |
5102 | && refs_may_alias_p (to, from) | |
e3b5732b JH |
5103 | && cfun->returns_struct |
5104 | && !cfun->returns_pcc_struct) | |
bbf6f052 | 5105 | { |
0088fcb1 RK |
5106 | rtx from_rtx, size; |
5107 | ||
5108 | push_temp_slots (); | |
33a20d10 | 5109 | size = expr_size (from); |
84217346 | 5110 | from_rtx = expand_normal (from); |
bbf6f052 | 5111 | |
8f99553f JM |
5112 | emit_library_call (memmove_libfunc, LCT_NORMAL, |
5113 | VOIDmode, 3, XEXP (to_rtx, 0), Pmode, | |
5114 | XEXP (from_rtx, 0), Pmode, | |
5115 | convert_to_mode (TYPE_MODE (sizetype), | |
5116 | size, TYPE_UNSIGNED (sizetype)), | |
5117 | TYPE_MODE (sizetype)); | |
bbf6f052 RK |
5118 | |
5119 | preserve_temp_slots (to_rtx); | |
0088fcb1 | 5120 | pop_temp_slots (); |
e836a5a2 | 5121 | return; |
bbf6f052 RK |
5122 | } |
5123 | ||
5124 | /* Compute FROM and store the value in the rtx we got. */ | |
5125 | ||
0088fcb1 | 5126 | push_temp_slots (); |
79f5e442 | 5127 | result = store_expr (from, to_rtx, 0, nontemporal); |
bbf6f052 | 5128 | preserve_temp_slots (result); |
0088fcb1 | 5129 | pop_temp_slots (); |
e836a5a2 | 5130 | return; |
bbf6f052 RK |
5131 | } |
5132 | ||
79f5e442 ZD |
5133 | /* Emits nontemporal store insn that moves FROM to TO. Returns true if this |
5134 | succeeded, false otherwise. */ | |
5135 | ||
28ed065e | 5136 | bool |
79f5e442 ZD |
5137 | emit_storent_insn (rtx to, rtx from) |
5138 | { | |
a5c7d693 RS |
5139 | struct expand_operand ops[2]; |
5140 | enum machine_mode mode = GET_MODE (to); | |
947131ba | 5141 | enum insn_code code = optab_handler (storent_optab, mode); |
79f5e442 ZD |
5142 | |
5143 | if (code == CODE_FOR_nothing) | |
5144 | return false; | |
5145 | ||
a5c7d693 RS |
5146 | create_fixed_operand (&ops[0], to); |
5147 | create_input_operand (&ops[1], from, mode); | |
5148 | return maybe_expand_insn (code, 2, ops); | |
79f5e442 ZD |
5149 | } |
5150 | ||
bbf6f052 RK |
5151 | /* Generate code for computing expression EXP, |
5152 | and storing the value into TARGET. | |
bbf6f052 | 5153 | |
709f5be1 RS |
5154 | If the mode is BLKmode then we may return TARGET itself. |
5155 | It turns out that in BLKmode it doesn't cause a problem. | |
5156 | because C has no operators that could combine two different | |
5157 | assignments into the same BLKmode object with different values | |
5158 | with no sequence point. Will other languages need this to | |
5159 | be more thorough? | |
5160 | ||
6f4fd16d | 5161 | If CALL_PARAM_P is nonzero, this is a store into a call param on the |
79f5e442 | 5162 | stack, and block moves may need to be treated specially. |
b8698a0f | 5163 | |
79f5e442 | 5164 | If NONTEMPORAL is true, try using a nontemporal store instruction. */ |
bbf6f052 RK |
5165 | |
5166 | rtx | |
79f5e442 | 5167 | store_expr (tree exp, rtx target, int call_param_p, bool nontemporal) |
bbf6f052 | 5168 | { |
b3694847 | 5169 | rtx temp; |
0fab64a3 | 5170 | rtx alt_rtl = NULL_RTX; |
29f5bccb | 5171 | location_t loc = curr_insn_location (); |
bbf6f052 | 5172 | |
847311f4 AL |
5173 | if (VOID_TYPE_P (TREE_TYPE (exp))) |
5174 | { | |
5175 | /* C++ can generate ?: expressions with a throw expression in one | |
5176 | branch and an rvalue in the other. Here, we resolve attempts to | |
4d6922ee | 5177 | store the throw expression's nonexistent result. */ |
6f4fd16d | 5178 | gcc_assert (!call_param_p); |
49452c07 | 5179 | expand_expr (exp, const0_rtx, VOIDmode, EXPAND_NORMAL); |
847311f4 AL |
5180 | return NULL_RTX; |
5181 | } | |
bbf6f052 RK |
5182 | if (TREE_CODE (exp) == COMPOUND_EXPR) |
5183 | { | |
5184 | /* Perform first part of compound expression, then assign from second | |
5185 | part. */ | |
8403445a | 5186 | expand_expr (TREE_OPERAND (exp, 0), const0_rtx, VOIDmode, |
6f4fd16d | 5187 | call_param_p ? EXPAND_STACK_PARM : EXPAND_NORMAL); |
79f5e442 ZD |
5188 | return store_expr (TREE_OPERAND (exp, 1), target, call_param_p, |
5189 | nontemporal); | |
bbf6f052 RK |
5190 | } |
5191 | else if (TREE_CODE (exp) == COND_EXPR && GET_MODE (target) == BLKmode) | |
5192 | { | |
5193 | /* For conditional expression, get safe form of the target. Then | |
5194 | test the condition, doing the appropriate assignment on either | |
5195 | side. This avoids the creation of unnecessary temporaries. | |
5196 | For non-BLKmode, it is more efficient not to do this. */ | |
5197 | ||
770affca | 5198 | rtx_code_label *lab1 = gen_label_rtx (), *lab2 = gen_label_rtx (); |
bbf6f052 | 5199 | |
dabf8373 | 5200 | do_pending_stack_adjust (); |
bbf6f052 | 5201 | NO_DEFER_POP; |
40e90eac | 5202 | jumpifnot (TREE_OPERAND (exp, 0), lab1, -1); |
79f5e442 ZD |
5203 | store_expr (TREE_OPERAND (exp, 1), target, call_param_p, |
5204 | nontemporal); | |
bbf6f052 RK |
5205 | emit_jump_insn (gen_jump (lab2)); |
5206 | emit_barrier (); | |
5207 | emit_label (lab1); | |
79f5e442 ZD |
5208 | store_expr (TREE_OPERAND (exp, 2), target, call_param_p, |
5209 | nontemporal); | |
bbf6f052 RK |
5210 | emit_label (lab2); |
5211 | OK_DEFER_POP; | |
a3a58acc | 5212 | |
436d948e | 5213 | return NULL_RTX; |
12f06d17 | 5214 | } |
1499e0a8 | 5215 | else if (GET_CODE (target) == SUBREG && SUBREG_PROMOTED_VAR_P (target)) |
09da1532 | 5216 | /* If this is a scalar in a register that is stored in a wider mode |
1499e0a8 RK |
5217 | than the declared mode, compute the result into its declared mode |
5218 | and then convert to the wider mode. Our value is the computed | |
5219 | expression. */ | |
5220 | { | |
b76b08ef RK |
5221 | rtx inner_target = 0; |
5222 | ||
436d948e KH |
5223 | /* We can do the conversion inside EXP, which will often result |
5224 | in some optimizations. Do the conversion in two steps: first | |
5225 | change the signedness, if needed, then the extend. But don't | |
5226 | do this if the type of EXP is a subtype of something else | |
5227 | since then the conversion might involve more than just | |
5228 | converting modes. */ | |
5229 | if (INTEGRAL_TYPE_P (TREE_TYPE (exp)) | |
7e7d1b4b | 5230 | && TREE_TYPE (TREE_TYPE (exp)) == 0 |
ac5dc795 PB |
5231 | && GET_MODE_PRECISION (GET_MODE (target)) |
5232 | == TYPE_PRECISION (TREE_TYPE (exp))) | |
f635a84d | 5233 | { |
362d42dc KV |
5234 | if (!SUBREG_CHECK_PROMOTED_SIGN (target, |
5235 | TYPE_UNSIGNED (TREE_TYPE (exp)))) | |
fdd84500 RH |
5236 | { |
5237 | /* Some types, e.g. Fortran's logical*4, won't have a signed | |
5238 | version, so use the mode instead. */ | |
5239 | tree ntype | |
12753674 | 5240 | = (signed_or_unsigned_type_for |
362d42dc | 5241 | (SUBREG_PROMOTED_SIGN (target), TREE_TYPE (exp))); |
fdd84500 RH |
5242 | if (ntype == NULL) |
5243 | ntype = lang_hooks.types.type_for_mode | |
5244 | (TYPE_MODE (TREE_TYPE (exp)), | |
362d42dc | 5245 | SUBREG_PROMOTED_SIGN (target)); |
fdd84500 | 5246 | |
db3927fb | 5247 | exp = fold_convert_loc (loc, ntype, exp); |
fdd84500 | 5248 | } |
f635a84d | 5249 | |
db3927fb AH |
5250 | exp = fold_convert_loc (loc, lang_hooks.types.type_for_mode |
5251 | (GET_MODE (SUBREG_REG (target)), | |
362d42dc | 5252 | SUBREG_PROMOTED_SIGN (target)), |
db3927fb | 5253 | exp); |
b76b08ef RK |
5254 | |
5255 | inner_target = SUBREG_REG (target); | |
f635a84d | 5256 | } |
3a94c984 | 5257 | |
8403445a | 5258 | temp = expand_expr (exp, inner_target, VOIDmode, |
6f4fd16d | 5259 | call_param_p ? EXPAND_STACK_PARM : EXPAND_NORMAL); |
b258707c RS |
5260 | |
5261 | /* If TEMP is a VOIDmode constant, use convert_modes to make | |
5262 | sure that we properly convert it. */ | |
5263 | if (CONSTANT_P (temp) && GET_MODE (temp) == VOIDmode) | |
1f1b0541 RH |
5264 | { |
5265 | temp = convert_modes (GET_MODE (target), TYPE_MODE (TREE_TYPE (exp)), | |
362d42dc | 5266 | temp, SUBREG_PROMOTED_SIGN (target)); |
1f1b0541 RH |
5267 | temp = convert_modes (GET_MODE (SUBREG_REG (target)), |
5268 | GET_MODE (target), temp, | |
362d42dc | 5269 | SUBREG_PROMOTED_SIGN (target)); |
1f1b0541 | 5270 | } |
b258707c | 5271 | |
1499e0a8 | 5272 | convert_move (SUBREG_REG (target), temp, |
362d42dc | 5273 | SUBREG_PROMOTED_SIGN (target)); |
3dbecef9 | 5274 | |
436d948e | 5275 | return NULL_RTX; |
1499e0a8 | 5276 | } |
a4feaa71 JJ |
5277 | else if ((TREE_CODE (exp) == STRING_CST |
5278 | || (TREE_CODE (exp) == MEM_REF | |
5279 | && TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR | |
5280 | && TREE_CODE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0)) | |
5281 | == STRING_CST | |
5282 | && integer_zerop (TREE_OPERAND (exp, 1)))) | |
14a43348 | 5283 | && !nontemporal && !call_param_p |
a4feaa71 | 5284 | && MEM_P (target)) |
14a43348 JJ |
5285 | { |
5286 | /* Optimize initialization of an array with a STRING_CST. */ | |
5287 | HOST_WIDE_INT exp_len, str_copy_len; | |
5288 | rtx dest_mem; | |
a4feaa71 JJ |
5289 | tree str = TREE_CODE (exp) == STRING_CST |
5290 | ? exp : TREE_OPERAND (TREE_OPERAND (exp, 0), 0); | |
14a43348 JJ |
5291 | |
5292 | exp_len = int_expr_size (exp); | |
5293 | if (exp_len <= 0) | |
5294 | goto normal_expr; | |
5295 | ||
a4feaa71 | 5296 | if (TREE_STRING_LENGTH (str) <= 0) |
70f34814 RG |
5297 | goto normal_expr; |
5298 | ||
5299 | str_copy_len = strlen (TREE_STRING_POINTER (str)); | |
5300 | if (str_copy_len < TREE_STRING_LENGTH (str) - 1) | |
5301 | goto normal_expr; | |
5302 | ||
5303 | str_copy_len = TREE_STRING_LENGTH (str); | |
a4feaa71 JJ |
5304 | if ((STORE_MAX_PIECES & (STORE_MAX_PIECES - 1)) == 0 |
5305 | && TREE_STRING_POINTER (str)[TREE_STRING_LENGTH (str) - 1] == '\0') | |
70f34814 RG |
5306 | { |
5307 | str_copy_len += STORE_MAX_PIECES - 1; | |
5308 | str_copy_len &= ~(STORE_MAX_PIECES - 1); | |
5309 | } | |
5310 | str_copy_len = MIN (str_copy_len, exp_len); | |
5311 | if (!can_store_by_pieces (str_copy_len, builtin_strncpy_read_str, | |
a4feaa71 | 5312 | CONST_CAST (char *, TREE_STRING_POINTER (str)), |
70f34814 RG |
5313 | MEM_ALIGN (target), false)) |
5314 | goto normal_expr; | |
5315 | ||
5316 | dest_mem = target; | |
5317 | ||
5318 | dest_mem = store_by_pieces (dest_mem, | |
5319 | str_copy_len, builtin_strncpy_read_str, | |
a4feaa71 JJ |
5320 | CONST_CAST (char *, |
5321 | TREE_STRING_POINTER (str)), | |
70f34814 RG |
5322 | MEM_ALIGN (target), false, |
5323 | exp_len > str_copy_len ? 1 : 0); | |
5324 | if (exp_len > str_copy_len) | |
5325 | clear_storage (adjust_address (dest_mem, BLKmode, 0), | |
5326 | GEN_INT (exp_len - str_copy_len), | |
5327 | BLOCK_OP_NORMAL); | |
5328 | return NULL_RTX; | |
5329 | } | |
bbf6f052 RK |
5330 | else |
5331 | { | |
79f5e442 ZD |
5332 | rtx tmp_target; |
5333 | ||
14a43348 | 5334 | normal_expr: |
79f5e442 ZD |
5335 | /* If we want to use a nontemporal store, force the value to |
5336 | register first. */ | |
5337 | tmp_target = nontemporal ? NULL_RTX : target; | |
5338 | temp = expand_expr_real (exp, tmp_target, GET_MODE (target), | |
6f4fd16d | 5339 | (call_param_p |
0fab64a3 | 5340 | ? EXPAND_STACK_PARM : EXPAND_NORMAL), |
4c437f02 | 5341 | &alt_rtl, false); |
bbf6f052 RK |
5342 | } |
5343 | ||
b258707c RS |
5344 | /* If TEMP is a VOIDmode constant and the mode of the type of EXP is not |
5345 | the same as that of TARGET, adjust the constant. This is needed, for | |
807e902e KZ |
5346 | example, in case it is a CONST_DOUBLE or CONST_WIDE_INT and we want |
5347 | only a word-sized value. */ | |
b258707c | 5348 | if (CONSTANT_P (temp) && GET_MODE (temp) == VOIDmode |
c1da1f33 | 5349 | && TREE_CODE (exp) != ERROR_MARK |
b258707c RS |
5350 | && GET_MODE (target) != TYPE_MODE (TREE_TYPE (exp))) |
5351 | temp = convert_modes (GET_MODE (target), TYPE_MODE (TREE_TYPE (exp)), | |
8df83eae | 5352 | temp, TYPE_UNSIGNED (TREE_TYPE (exp))); |
b258707c | 5353 | |
bbf6f052 | 5354 | /* If value was not generated in the target, store it there. |
1bbd65cd EB |
5355 | Convert the value to TARGET's type first if necessary and emit the |
5356 | pending incrementations that have been queued when expanding EXP. | |
5357 | Note that we cannot emit the whole queue blindly because this will | |
5358 | effectively disable the POST_INC optimization later. | |
5359 | ||
37a08a29 | 5360 | If TEMP and TARGET compare equal according to rtx_equal_p, but |
f3f2255a R |
5361 | one or both of them are volatile memory refs, we have to distinguish |
5362 | two cases: | |
5363 | - expand_expr has used TARGET. In this case, we must not generate | |
5364 | another copy. This can be detected by TARGET being equal according | |
5365 | to == . | |
5366 | - expand_expr has not used TARGET - that means that the source just | |
5367 | happens to have the same RTX form. Since temp will have been created | |
5368 | by expand_expr, it will compare unequal according to == . | |
5369 | We must generate a copy in this case, to reach the correct number | |
5370 | of volatile memory references. */ | |
bbf6f052 | 5371 | |
6036acbb | 5372 | if ((! rtx_equal_p (temp, target) |
f3f2255a R |
5373 | || (temp != target && (side_effects_p (temp) |
5374 | || side_effects_p (target)))) | |
e5408e52 | 5375 | && TREE_CODE (exp) != ERROR_MARK |
9c5c5f2c MM |
5376 | /* If store_expr stores a DECL whose DECL_RTL(exp) == TARGET, |
5377 | but TARGET is not valid memory reference, TEMP will differ | |
5378 | from TARGET although it is really the same location. */ | |
ef72faaf JJ |
5379 | && !(alt_rtl |
5380 | && rtx_equal_p (alt_rtl, target) | |
5381 | && !side_effects_p (alt_rtl) | |
5382 | && !side_effects_p (target)) | |
535a42b1 NS |
5383 | /* If there's nothing to copy, don't bother. Don't call |
5384 | expr_size unless necessary, because some front-ends (C++) | |
5385 | expr_size-hook must not be given objects that are not | |
5386 | supposed to be bit-copied or bit-initialized. */ | |
e56fc090 | 5387 | && expr_size (exp) != const0_rtx) |
bbf6f052 | 5388 | { |
929634d8 | 5389 | if (GET_MODE (temp) != GET_MODE (target) && GET_MODE (temp) != VOIDmode) |
bbf6f052 | 5390 | { |
929634d8 EB |
5391 | if (GET_MODE (target) == BLKmode) |
5392 | { | |
3467ad5c | 5393 | /* Handle calls that return BLKmode values in registers. */ |
1939f02b UB |
5394 | if (REG_P (temp) && TREE_CODE (exp) == CALL_EXPR) |
5395 | copy_blkmode_from_reg (target, temp, TREE_TYPE (exp)); | |
929634d8 | 5396 | else |
1939f02b UB |
5397 | store_bit_field (target, |
5398 | INTVAL (expr_size (exp)) * BITS_PER_UNIT, | |
5399 | 0, 0, 0, GET_MODE (temp), temp); | |
929634d8 | 5400 | } |
bbf6f052 | 5401 | else |
929634d8 | 5402 | convert_move (target, temp, TYPE_UNSIGNED (TREE_TYPE (exp))); |
bbf6f052 RK |
5403 | } |
5404 | ||
5405 | else if (GET_MODE (temp) == BLKmode && TREE_CODE (exp) == STRING_CST) | |
5406 | { | |
c24ae149 RK |
5407 | /* Handle copying a string constant into an array. The string |
5408 | constant may be shorter than the array. So copy just the string's | |
5409 | actual length, and clear the rest. First get the size of the data | |
5410 | type of the string, which is actually the size of the target. */ | |
5411 | rtx size = expr_size (exp); | |
bbf6f052 | 5412 | |
481683e1 | 5413 | if (CONST_INT_P (size) |
e87b4f3f | 5414 | && INTVAL (size) < TREE_STRING_LENGTH (exp)) |
8403445a | 5415 | emit_block_move (target, temp, size, |
6f4fd16d | 5416 | (call_param_p |
8403445a | 5417 | ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL)); |
e87b4f3f | 5418 | else |
bbf6f052 | 5419 | { |
d4ebfa65 BE |
5420 | enum machine_mode pointer_mode |
5421 | = targetm.addr_space.pointer_mode (MEM_ADDR_SPACE (target)); | |
372d6395 | 5422 | enum machine_mode address_mode = get_address_mode (target); |
d4ebfa65 | 5423 | |
e87b4f3f RS |
5424 | /* Compute the size of the data to copy from the string. */ |
5425 | tree copy_size | |
db3927fb AH |
5426 | = size_binop_loc (loc, MIN_EXPR, |
5427 | make_tree (sizetype, size), | |
5428 | size_int (TREE_STRING_LENGTH (exp))); | |
8403445a AM |
5429 | rtx copy_size_rtx |
5430 | = expand_expr (copy_size, NULL_RTX, VOIDmode, | |
6f4fd16d | 5431 | (call_param_p |
8403445a | 5432 | ? EXPAND_STACK_PARM : EXPAND_NORMAL)); |
770affca | 5433 | rtx_code_label *label = 0; |
e87b4f3f RS |
5434 | |
5435 | /* Copy that much. */ | |
d4ebfa65 | 5436 | copy_size_rtx = convert_to_mode (pointer_mode, copy_size_rtx, |
8df83eae | 5437 | TYPE_UNSIGNED (sizetype)); |
8403445a | 5438 | emit_block_move (target, temp, copy_size_rtx, |
6f4fd16d | 5439 | (call_param_p |
8403445a | 5440 | ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL)); |
e87b4f3f | 5441 | |
88f63c77 | 5442 | /* Figure out how much is left in TARGET that we have to clear. |
d4ebfa65 | 5443 | Do all calculations in pointer_mode. */ |
481683e1 | 5444 | if (CONST_INT_P (copy_size_rtx)) |
e87b4f3f | 5445 | { |
0a81f074 RS |
5446 | size = plus_constant (address_mode, size, |
5447 | -INTVAL (copy_size_rtx)); | |
c24ae149 RK |
5448 | target = adjust_address (target, BLKmode, |
5449 | INTVAL (copy_size_rtx)); | |
e87b4f3f RS |
5450 | } |
5451 | else | |
5452 | { | |
fa06ab5c | 5453 | size = expand_binop (TYPE_MODE (sizetype), sub_optab, size, |
906c4e36 RK |
5454 | copy_size_rtx, NULL_RTX, 0, |
5455 | OPTAB_LIB_WIDEN); | |
e87b4f3f | 5456 | |
d4ebfa65 BE |
5457 | if (GET_MODE (copy_size_rtx) != address_mode) |
5458 | copy_size_rtx = convert_to_mode (address_mode, | |
5459 | copy_size_rtx, | |
8df83eae | 5460 | TYPE_UNSIGNED (sizetype)); |
c24ae149 RK |
5461 | |
5462 | target = offset_address (target, copy_size_rtx, | |
5463 | highest_pow2_factor (copy_size)); | |
e87b4f3f | 5464 | label = gen_label_rtx (); |
c5d5d461 | 5465 | emit_cmp_and_jump_insns (size, const0_rtx, LT, NULL_RTX, |
a06ef755 | 5466 | GET_MODE (size), 0, label); |
e87b4f3f RS |
5467 | } |
5468 | ||
5469 | if (size != const0_rtx) | |
8148fe65 | 5470 | clear_storage (target, size, BLOCK_OP_NORMAL); |
22619c3f | 5471 | |
e87b4f3f RS |
5472 | if (label) |
5473 | emit_label (label); | |
bbf6f052 RK |
5474 | } |
5475 | } | |
fffa9c1d JW |
5476 | /* Handle calls that return values in multiple non-contiguous locations. |
5477 | The Irix 6 ABI has examples of this. */ | |
5478 | else if (GET_CODE (target) == PARALLEL) | |
5ef0b50d EB |
5479 | { |
5480 | if (GET_CODE (temp) == PARALLEL) | |
5481 | emit_group_move (target, temp); | |
5482 | else | |
5483 | emit_group_load (target, temp, TREE_TYPE (exp), | |
5484 | int_size_in_bytes (TREE_TYPE (exp))); | |
5485 | } | |
5486 | else if (GET_CODE (temp) == PARALLEL) | |
5487 | emit_group_store (target, temp, TREE_TYPE (exp), | |
5488 | int_size_in_bytes (TREE_TYPE (exp))); | |
bbf6f052 | 5489 | else if (GET_MODE (temp) == BLKmode) |
8403445a | 5490 | emit_block_move (target, temp, expr_size (exp), |
6f4fd16d | 5491 | (call_param_p |
8403445a | 5492 | ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL)); |
5ef0b50d EB |
5493 | /* If we emit a nontemporal store, there is nothing else to do. */ |
5494 | else if (nontemporal && emit_storent_insn (target, temp)) | |
79f5e442 | 5495 | ; |
bbf6f052 | 5496 | else |
b0dccb00 RH |
5497 | { |
5498 | temp = force_operand (temp, target); | |
5499 | if (temp != target) | |
5500 | emit_move_insn (target, temp); | |
5501 | } | |
bbf6f052 | 5502 | } |
709f5be1 | 5503 | |
436d948e | 5504 | return NULL_RTX; |
bbf6f052 RK |
5505 | } |
5506 | \f | |
953d0c90 RS |
5507 | /* Return true if field F of structure TYPE is a flexible array. */ |
5508 | ||
5509 | static bool | |
5510 | flexible_array_member_p (const_tree f, const_tree type) | |
5511 | { | |
5512 | const_tree tf; | |
5513 | ||
5514 | tf = TREE_TYPE (f); | |
5515 | return (DECL_CHAIN (f) == NULL | |
5516 | && TREE_CODE (tf) == ARRAY_TYPE | |
5517 | && TYPE_DOMAIN (tf) | |
5518 | && TYPE_MIN_VALUE (TYPE_DOMAIN (tf)) | |
5519 | && integer_zerop (TYPE_MIN_VALUE (TYPE_DOMAIN (tf))) | |
5520 | && !TYPE_MAX_VALUE (TYPE_DOMAIN (tf)) | |
5521 | && int_size_in_bytes (type) >= 0); | |
5522 | } | |
5523 | ||
5524 | /* If FOR_CTOR_P, return the number of top-level elements that a constructor | |
5525 | must have in order for it to completely initialize a value of type TYPE. | |
5526 | Return -1 if the number isn't known. | |
5527 | ||
5528 | If !FOR_CTOR_P, return an estimate of the number of scalars in TYPE. */ | |
5529 | ||
5530 | static HOST_WIDE_INT | |
5531 | count_type_elements (const_tree type, bool for_ctor_p) | |
5532 | { | |
5533 | switch (TREE_CODE (type)) | |
5534 | { | |
5535 | case ARRAY_TYPE: | |
5536 | { | |
5537 | tree nelts; | |
5538 | ||
5539 | nelts = array_type_nelts (type); | |
cc269bb6 | 5540 | if (nelts && tree_fits_uhwi_p (nelts)) |
953d0c90 RS |
5541 | { |
5542 | unsigned HOST_WIDE_INT n; | |
5543 | ||
ae7e9ddd | 5544 | n = tree_to_uhwi (nelts) + 1; |
953d0c90 RS |
5545 | if (n == 0 || for_ctor_p) |
5546 | return n; | |
5547 | else | |
5548 | return n * count_type_elements (TREE_TYPE (type), false); | |
5549 | } | |
5550 | return for_ctor_p ? -1 : 1; | |
5551 | } | |
5552 | ||
5553 | case RECORD_TYPE: | |
5554 | { | |
5555 | unsigned HOST_WIDE_INT n; | |
5556 | tree f; | |
5557 | ||
5558 | n = 0; | |
5559 | for (f = TYPE_FIELDS (type); f ; f = DECL_CHAIN (f)) | |
5560 | if (TREE_CODE (f) == FIELD_DECL) | |
5561 | { | |
5562 | if (!for_ctor_p) | |
5563 | n += count_type_elements (TREE_TYPE (f), false); | |
5564 | else if (!flexible_array_member_p (f, type)) | |
5565 | /* Don't count flexible arrays, which are not supposed | |
5566 | to be initialized. */ | |
5567 | n += 1; | |
5568 | } | |
5569 | ||
5570 | return n; | |
5571 | } | |
5572 | ||
5573 | case UNION_TYPE: | |
5574 | case QUAL_UNION_TYPE: | |
5575 | { | |
5576 | tree f; | |
5577 | HOST_WIDE_INT n, m; | |
5578 | ||
5579 | gcc_assert (!for_ctor_p); | |
5580 | /* Estimate the number of scalars in each field and pick the | |
5581 | maximum. Other estimates would do instead; the idea is simply | |
5582 | to make sure that the estimate is not sensitive to the ordering | |
5583 | of the fields. */ | |
5584 | n = 1; | |
5585 | for (f = TYPE_FIELDS (type); f ; f = DECL_CHAIN (f)) | |
5586 | if (TREE_CODE (f) == FIELD_DECL) | |
5587 | { | |
5588 | m = count_type_elements (TREE_TYPE (f), false); | |
5589 | /* If the field doesn't span the whole union, add an extra | |
5590 | scalar for the rest. */ | |
5591 | if (simple_cst_equal (TYPE_SIZE (TREE_TYPE (f)), | |
5592 | TYPE_SIZE (type)) != 1) | |
5593 | m++; | |
5594 | if (n < m) | |
5595 | n = m; | |
5596 | } | |
5597 | return n; | |
5598 | } | |
5599 | ||
5600 | case COMPLEX_TYPE: | |
5601 | return 2; | |
5602 | ||
5603 | case VECTOR_TYPE: | |
5604 | return TYPE_VECTOR_SUBPARTS (type); | |
5605 | ||
5606 | case INTEGER_TYPE: | |
5607 | case REAL_TYPE: | |
5608 | case FIXED_POINT_TYPE: | |
5609 | case ENUMERAL_TYPE: | |
5610 | case BOOLEAN_TYPE: | |
5611 | case POINTER_TYPE: | |
5612 | case OFFSET_TYPE: | |
5613 | case REFERENCE_TYPE: | |
f298ca26 | 5614 | case NULLPTR_TYPE: |
953d0c90 RS |
5615 | return 1; |
5616 | ||
5617 | case ERROR_MARK: | |
5618 | return 0; | |
5619 | ||
5620 | case VOID_TYPE: | |
5621 | case METHOD_TYPE: | |
5622 | case FUNCTION_TYPE: | |
5623 | case LANG_TYPE: | |
5624 | default: | |
5625 | gcc_unreachable (); | |
5626 | } | |
5627 | } | |
5628 | ||
fe24d485 | 5629 | /* Helper for categorize_ctor_elements. Identical interface. */ |
9de08200 | 5630 | |
fe24d485 | 5631 | static bool |
fa233e34 | 5632 | categorize_ctor_elements_1 (const_tree ctor, HOST_WIDE_INT *p_nz_elts, |
953d0c90 | 5633 | HOST_WIDE_INT *p_init_elts, bool *p_complete) |
9de08200 | 5634 | { |
4038c495 | 5635 | unsigned HOST_WIDE_INT idx; |
953d0c90 RS |
5636 | HOST_WIDE_INT nz_elts, init_elts, num_fields; |
5637 | tree value, purpose, elt_type; | |
9de08200 | 5638 | |
fe24d485 OH |
5639 | /* Whether CTOR is a valid constant initializer, in accordance with what |
5640 | initializer_constant_valid_p does. If inferred from the constructor | |
5641 | elements, true until proven otherwise. */ | |
5642 | bool const_from_elts_p = constructor_static_from_elts_p (ctor); | |
5643 | bool const_p = const_from_elts_p ? true : TREE_STATIC (ctor); | |
5644 | ||
6de9cd9a | 5645 | nz_elts = 0; |
953d0c90 RS |
5646 | init_elts = 0; |
5647 | num_fields = 0; | |
5648 | elt_type = NULL_TREE; | |
caf93cb0 | 5649 | |
4038c495 | 5650 | FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (ctor), idx, purpose, value) |
9de08200 | 5651 | { |
675c873b | 5652 | HOST_WIDE_INT mult = 1; |
9de08200 | 5653 | |
13396b6e | 5654 | if (purpose && TREE_CODE (purpose) == RANGE_EXPR) |
6de9cd9a DN |
5655 | { |
5656 | tree lo_index = TREE_OPERAND (purpose, 0); | |
5657 | tree hi_index = TREE_OPERAND (purpose, 1); | |
9de08200 | 5658 | |
cc269bb6 | 5659 | if (tree_fits_uhwi_p (lo_index) && tree_fits_uhwi_p (hi_index)) |
ae7e9ddd RS |
5660 | mult = (tree_to_uhwi (hi_index) |
5661 | - tree_to_uhwi (lo_index) + 1); | |
6de9cd9a | 5662 | } |
953d0c90 RS |
5663 | num_fields += mult; |
5664 | elt_type = TREE_TYPE (value); | |
9de08200 | 5665 | |
6de9cd9a DN |
5666 | switch (TREE_CODE (value)) |
5667 | { | |
5668 | case CONSTRUCTOR: | |
5669 | { | |
fe24d485 | 5670 | HOST_WIDE_INT nz = 0, ic = 0; |
ed1223ba | 5671 | |
953d0c90 RS |
5672 | bool const_elt_p = categorize_ctor_elements_1 (value, &nz, &ic, |
5673 | p_complete); | |
fe24d485 | 5674 | |
6de9cd9a | 5675 | nz_elts += mult * nz; |
953d0c90 | 5676 | init_elts += mult * ic; |
fe24d485 OH |
5677 | |
5678 | if (const_from_elts_p && const_p) | |
5679 | const_p = const_elt_p; | |
6de9cd9a DN |
5680 | } |
5681 | break; | |
9de08200 | 5682 | |
6de9cd9a DN |
5683 | case INTEGER_CST: |
5684 | case REAL_CST: | |
0f996086 | 5685 | case FIXED_CST: |
6de9cd9a DN |
5686 | if (!initializer_zerop (value)) |
5687 | nz_elts += mult; | |
953d0c90 | 5688 | init_elts += mult; |
6de9cd9a | 5689 | break; |
97f8d136 RK |
5690 | |
5691 | case STRING_CST: | |
5692 | nz_elts += mult * TREE_STRING_LENGTH (value); | |
953d0c90 | 5693 | init_elts += mult * TREE_STRING_LENGTH (value); |
97f8d136 RK |
5694 | break; |
5695 | ||
6de9cd9a DN |
5696 | case COMPLEX_CST: |
5697 | if (!initializer_zerop (TREE_REALPART (value))) | |
5698 | nz_elts += mult; | |
5699 | if (!initializer_zerop (TREE_IMAGPART (value))) | |
5700 | nz_elts += mult; | |
953d0c90 | 5701 | init_elts += mult; |
6de9cd9a | 5702 | break; |
97f8d136 | 5703 | |
6de9cd9a DN |
5704 | case VECTOR_CST: |
5705 | { | |
d2a12ae7 RG |
5706 | unsigned i; |
5707 | for (i = 0; i < VECTOR_CST_NELTS (value); ++i) | |
6fa91b48 | 5708 | { |
d2a12ae7 RG |
5709 | tree v = VECTOR_CST_ELT (value, i); |
5710 | if (!initializer_zerop (v)) | |
6fa91b48 | 5711 | nz_elts += mult; |
953d0c90 | 5712 | init_elts += mult; |
6fa91b48 | 5713 | } |
6de9cd9a DN |
5714 | } |
5715 | break; | |
69ef87e2 | 5716 | |
6de9cd9a | 5717 | default: |
675c873b | 5718 | { |
953d0c90 | 5719 | HOST_WIDE_INT tc = count_type_elements (elt_type, false); |
675c873b | 5720 | nz_elts += mult * tc; |
953d0c90 | 5721 | init_elts += mult * tc; |
fe24d485 | 5722 | |
675c873b | 5723 | if (const_from_elts_p && const_p) |
953d0c90 | 5724 | const_p = initializer_constant_valid_p (value, elt_type) |
675c873b EB |
5725 | != NULL_TREE; |
5726 | } | |
6de9cd9a DN |
5727 | break; |
5728 | } | |
5729 | } | |
69ef87e2 | 5730 | |
953d0c90 RS |
5731 | if (*p_complete && !complete_ctor_at_level_p (TREE_TYPE (ctor), |
5732 | num_fields, elt_type)) | |
5733 | *p_complete = false; | |
6f642f98 | 5734 | |
6de9cd9a | 5735 | *p_nz_elts += nz_elts; |
953d0c90 | 5736 | *p_init_elts += init_elts; |
fe24d485 OH |
5737 | |
5738 | return const_p; | |
6de9cd9a DN |
5739 | } |
5740 | ||
fe24d485 OH |
5741 | /* Examine CTOR to discover: |
5742 | * how many scalar fields are set to nonzero values, | |
5743 | and place it in *P_NZ_ELTS; | |
5744 | * how many scalar fields in total are in CTOR, | |
5745 | and place it in *P_ELT_COUNT. | |
953d0c90 RS |
5746 | * whether the constructor is complete -- in the sense that every |
5747 | meaningful byte is explicitly given a value -- | |
5748 | and place it in *P_COMPLETE. | |
fe24d485 OH |
5749 | |
5750 | Return whether or not CTOR is a valid static constant initializer, the same | |
5751 | as "initializer_constant_valid_p (CTOR, TREE_TYPE (CTOR)) != 0". */ | |
5752 | ||
5753 | bool | |
fa233e34 | 5754 | categorize_ctor_elements (const_tree ctor, HOST_WIDE_INT *p_nz_elts, |
953d0c90 | 5755 | HOST_WIDE_INT *p_init_elts, bool *p_complete) |
6de9cd9a DN |
5756 | { |
5757 | *p_nz_elts = 0; | |
953d0c90 RS |
5758 | *p_init_elts = 0; |
5759 | *p_complete = true; | |
fe24d485 | 5760 | |
953d0c90 | 5761 | return categorize_ctor_elements_1 (ctor, p_nz_elts, p_init_elts, p_complete); |
6de9cd9a DN |
5762 | } |
5763 | ||
953d0c90 RS |
5764 | /* TYPE is initialized by a constructor with NUM_ELTS elements, the last |
5765 | of which had type LAST_TYPE. Each element was itself a complete | |
5766 | initializer, in the sense that every meaningful byte was explicitly | |
5767 | given a value. Return true if the same is true for the constructor | |
5768 | as a whole. */ | |
6de9cd9a | 5769 | |
953d0c90 RS |
5770 | bool |
5771 | complete_ctor_at_level_p (const_tree type, HOST_WIDE_INT num_elts, | |
5772 | const_tree last_type) | |
6de9cd9a | 5773 | { |
953d0c90 RS |
5774 | if (TREE_CODE (type) == UNION_TYPE |
5775 | || TREE_CODE (type) == QUAL_UNION_TYPE) | |
6de9cd9a | 5776 | { |
953d0c90 RS |
5777 | if (num_elts == 0) |
5778 | return false; | |
3a94c984 | 5779 | |
953d0c90 | 5780 | gcc_assert (num_elts == 1 && last_type); |
16d5ffec | 5781 | |
953d0c90 RS |
5782 | /* ??? We could look at each element of the union, and find the |
5783 | largest element. Which would avoid comparing the size of the | |
5784 | initialized element against any tail padding in the union. | |
5785 | Doesn't seem worth the effort... */ | |
5786 | return simple_cst_equal (TYPE_SIZE (type), TYPE_SIZE (last_type)) == 1; | |
9de08200 | 5787 | } |
953d0c90 RS |
5788 | |
5789 | return count_type_elements (type, true) == num_elts; | |
9de08200 RK |
5790 | } |
5791 | ||
5792 | /* Return 1 if EXP contains mostly (3/4) zeros. */ | |
5793 | ||
e0ce7708 | 5794 | static int |
22ea9ec0 | 5795 | mostly_zeros_p (const_tree exp) |
9de08200 | 5796 | { |
9de08200 RK |
5797 | if (TREE_CODE (exp) == CONSTRUCTOR) |
5798 | { | |
953d0c90 RS |
5799 | HOST_WIDE_INT nz_elts, init_elts; |
5800 | bool complete_p; | |
6de9cd9a | 5801 | |
953d0c90 RS |
5802 | categorize_ctor_elements (exp, &nz_elts, &init_elts, &complete_p); |
5803 | return !complete_p || nz_elts < init_elts / 4; | |
9de08200 RK |
5804 | } |
5805 | ||
6de9cd9a | 5806 | return initializer_zerop (exp); |
9de08200 | 5807 | } |
c5250139 RG |
5808 | |
5809 | /* Return 1 if EXP contains all zeros. */ | |
5810 | ||
5811 | static int | |
22ea9ec0 | 5812 | all_zeros_p (const_tree exp) |
c5250139 RG |
5813 | { |
5814 | if (TREE_CODE (exp) == CONSTRUCTOR) | |
c5250139 | 5815 | { |
953d0c90 RS |
5816 | HOST_WIDE_INT nz_elts, init_elts; |
5817 | bool complete_p; | |
c5250139 | 5818 | |
953d0c90 | 5819 | categorize_ctor_elements (exp, &nz_elts, &init_elts, &complete_p); |
1f098f07 | 5820 | return nz_elts == 0; |
c5250139 RG |
5821 | } |
5822 | ||
5823 | return initializer_zerop (exp); | |
5824 | } | |
9de08200 | 5825 | \f |
e1a43f73 PB |
5826 | /* Helper function for store_constructor. |
5827 | TARGET, BITSIZE, BITPOS, MODE, EXP are as for store_field. | |
04050c69 | 5828 | CLEARED is as for store_constructor. |
23cb1766 | 5829 | ALIAS_SET is the alias set to use for any stores. |
23ccec44 JW |
5830 | |
5831 | This provides a recursive shortcut back to store_constructor when it isn't | |
5832 | necessary to go through store_field. This is so that we can pass through | |
5833 | the cleared field to let store_constructor know that we may not have to | |
5834 | clear a substructure if the outer structure has already been cleared. */ | |
e1a43f73 PB |
5835 | |
5836 | static void | |
502b8322 AJ |
5837 | store_constructor_field (rtx target, unsigned HOST_WIDE_INT bitsize, |
5838 | HOST_WIDE_INT bitpos, enum machine_mode mode, | |
3467ad5c | 5839 | tree exp, int cleared, alias_set_type alias_set) |
e1a43f73 PB |
5840 | { |
5841 | if (TREE_CODE (exp) == CONSTRUCTOR | |
6c89c39a RK |
5842 | /* We can only call store_constructor recursively if the size and |
5843 | bit position are on a byte boundary. */ | |
23ccec44 | 5844 | && bitpos % BITS_PER_UNIT == 0 |
6c89c39a | 5845 | && (bitsize > 0 && bitsize % BITS_PER_UNIT == 0) |
cc2902df | 5846 | /* If we have a nonzero bitpos for a register target, then we just |
23ccec44 JW |
5847 | let store_field do the bitfield handling. This is unlikely to |
5848 | generate unnecessary clear instructions anyways. */ | |
3c0cb5de | 5849 | && (bitpos == 0 || MEM_P (target))) |
e1a43f73 | 5850 | { |
3c0cb5de | 5851 | if (MEM_P (target)) |
61cb205c RK |
5852 | target |
5853 | = adjust_address (target, | |
5854 | GET_MODE (target) == BLKmode | |
5855 | || 0 != (bitpos | |
5856 | % GET_MODE_ALIGNMENT (GET_MODE (target))) | |
5857 | ? BLKmode : VOIDmode, bitpos / BITS_PER_UNIT); | |
23cb1766 | 5858 | |
e0339ef7 | 5859 | |
04050c69 | 5860 | /* Update the alias set, if required. */ |
3c0cb5de | 5861 | if (MEM_P (target) && ! MEM_KEEP_ALIAS_SET_P (target) |
10b76d73 | 5862 | && MEM_ALIAS_SET (target) != 0) |
70072ed9 RK |
5863 | { |
5864 | target = copy_rtx (target); | |
5865 | set_mem_alias_set (target, alias_set); | |
5866 | } | |
e0339ef7 | 5867 | |
dbb5c281 | 5868 | store_constructor (exp, target, cleared, bitsize / BITS_PER_UNIT); |
e1a43f73 PB |
5869 | } |
5870 | else | |
3467ad5c | 5871 | store_field (target, bitsize, bitpos, 0, 0, mode, exp, alias_set, false); |
e1a43f73 PB |
5872 | } |
5873 | ||
862d0b35 DN |
5874 | |
5875 | /* Returns the number of FIELD_DECLs in TYPE. */ | |
5876 | ||
5877 | static int | |
5878 | fields_length (const_tree type) | |
5879 | { | |
5880 | tree t = TYPE_FIELDS (type); | |
5881 | int count = 0; | |
5882 | ||
5883 | for (; t; t = DECL_CHAIN (t)) | |
5884 | if (TREE_CODE (t) == FIELD_DECL) | |
5885 | ++count; | |
5886 | ||
5887 | return count; | |
5888 | } | |
5889 | ||
5890 | ||
bbf6f052 | 5891 | /* Store the value of constructor EXP into the rtx TARGET. |
04050c69 RK |
5892 | TARGET is either a REG or a MEM; we know it cannot conflict, since |
5893 | safe_from_p has been called. | |
dbb5c281 RK |
5894 | CLEARED is true if TARGET is known to have been zero'd. |
5895 | SIZE is the number of bytes of TARGET we are allowed to modify: this | |
b7010412 RK |
5896 | may not be the same as the size of EXP if we are assigning to a field |
5897 | which has been packed to exclude padding bits. */ | |
bbf6f052 RK |
5898 | |
5899 | static void | |
502b8322 | 5900 | store_constructor (tree exp, rtx target, int cleared, HOST_WIDE_INT size) |
bbf6f052 | 5901 | { |
4af3895e | 5902 | tree type = TREE_TYPE (exp); |
a5efcd63 | 5903 | #ifdef WORD_REGISTER_OPERATIONS |
13eb1f7f | 5904 | HOST_WIDE_INT exp_size = int_size_in_bytes (type); |
a5efcd63 | 5905 | #endif |
4af3895e | 5906 | |
5b0264cb | 5907 | switch (TREE_CODE (type)) |
bbf6f052 | 5908 | { |
5b0264cb NS |
5909 | case RECORD_TYPE: |
5910 | case UNION_TYPE: | |
5911 | case QUAL_UNION_TYPE: | |
5912 | { | |
4038c495 GB |
5913 | unsigned HOST_WIDE_INT idx; |
5914 | tree field, value; | |
9de08200 | 5915 | |
5b0264cb NS |
5916 | /* If size is zero or the target is already cleared, do nothing. */ |
5917 | if (size == 0 || cleared) | |
9de08200 | 5918 | cleared = 1; |
5b0264cb NS |
5919 | /* We either clear the aggregate or indicate the value is dead. */ |
5920 | else if ((TREE_CODE (type) == UNION_TYPE | |
5921 | || TREE_CODE (type) == QUAL_UNION_TYPE) | |
5922 | && ! CONSTRUCTOR_ELTS (exp)) | |
5923 | /* If the constructor is empty, clear the union. */ | |
5924 | { | |
8148fe65 | 5925 | clear_storage (target, expr_size (exp), BLOCK_OP_NORMAL); |
5b0264cb NS |
5926 | cleared = 1; |
5927 | } | |
bbf6f052 | 5928 | |
5b0264cb NS |
5929 | /* If we are building a static constructor into a register, |
5930 | set the initial value as zero so we can fold the value into | |
5931 | a constant. But if more than one register is involved, | |
5932 | this probably loses. */ | |
5933 | else if (REG_P (target) && TREE_STATIC (exp) | |
5934 | && GET_MODE_SIZE (GET_MODE (target)) <= UNITS_PER_WORD) | |
5935 | { | |
5936 | emit_move_insn (target, CONST0_RTX (GET_MODE (target))); | |
5937 | cleared = 1; | |
5938 | } | |
3a94c984 | 5939 | |
5b0264cb NS |
5940 | /* If the constructor has fewer fields than the structure or |
5941 | if we are initializing the structure to mostly zeros, clear | |
5942 | the whole structure first. Don't do this if TARGET is a | |
5943 | register whose mode size isn't equal to SIZE since | |
5944 | clear_storage can't handle this case. */ | |
5945 | else if (size > 0 | |
9771b263 | 5946 | && (((int)vec_safe_length (CONSTRUCTOR_ELTS (exp)) |
5b0264cb NS |
5947 | != fields_length (type)) |
5948 | || mostly_zeros_p (exp)) | |
5949 | && (!REG_P (target) | |
5950 | || ((HOST_WIDE_INT) GET_MODE_SIZE (GET_MODE (target)) | |
5951 | == size))) | |
5952 | { | |
8148fe65 | 5953 | clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL); |
5b0264cb NS |
5954 | cleared = 1; |
5955 | } | |
b50d17a1 | 5956 | |
58f7fcc3 | 5957 | if (REG_P (target) && !cleared) |
c41c1387 | 5958 | emit_clobber (target); |
bbf6f052 | 5959 | |
5b0264cb NS |
5960 | /* Store each element of the constructor into the |
5961 | corresponding field of TARGET. */ | |
4038c495 | 5962 | FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), idx, field, value) |
5b0264cb | 5963 | { |
5b0264cb NS |
5964 | enum machine_mode mode; |
5965 | HOST_WIDE_INT bitsize; | |
5966 | HOST_WIDE_INT bitpos = 0; | |
5967 | tree offset; | |
5968 | rtx to_rtx = target; | |
ed1223ba | 5969 | |
5b0264cb NS |
5970 | /* Just ignore missing fields. We cleared the whole |
5971 | structure, above, if any fields are missing. */ | |
5972 | if (field == 0) | |
5973 | continue; | |
ed1223ba | 5974 | |
5b0264cb NS |
5975 | if (cleared && initializer_zerop (value)) |
5976 | continue; | |
ed1223ba | 5977 | |
cc269bb6 | 5978 | if (tree_fits_uhwi_p (DECL_SIZE (field))) |
ae7e9ddd | 5979 | bitsize = tree_to_uhwi (DECL_SIZE (field)); |
5b0264cb NS |
5980 | else |
5981 | bitsize = -1; | |
ed1223ba | 5982 | |
5b0264cb NS |
5983 | mode = DECL_MODE (field); |
5984 | if (DECL_BIT_FIELD (field)) | |
5985 | mode = VOIDmode; | |
ed1223ba | 5986 | |
5b0264cb | 5987 | offset = DECL_FIELD_OFFSET (field); |
9541ffee RS |
5988 | if (tree_fits_shwi_p (offset) |
5989 | && tree_fits_shwi_p (bit_position (field))) | |
5b0264cb NS |
5990 | { |
5991 | bitpos = int_bit_position (field); | |
5992 | offset = 0; | |
5993 | } | |
5994 | else | |
9439e9a1 | 5995 | bitpos = tree_to_shwi (DECL_FIELD_BIT_OFFSET (field)); |
ed1223ba | 5996 | |
5b0264cb NS |
5997 | if (offset) |
5998 | { | |
d4ebfa65 | 5999 | enum machine_mode address_mode; |
5b0264cb | 6000 | rtx offset_rtx; |
ed1223ba | 6001 | |
5b0264cb NS |
6002 | offset |
6003 | = SUBSTITUTE_PLACEHOLDER_IN_EXPR (offset, | |
6004 | make_tree (TREE_TYPE (exp), | |
6005 | target)); | |
6006 | ||
84217346 | 6007 | offset_rtx = expand_normal (offset); |
5b0264cb | 6008 | gcc_assert (MEM_P (to_rtx)); |
ed1223ba | 6009 | |
372d6395 | 6010 | address_mode = get_address_mode (to_rtx); |
d4ebfa65 BE |
6011 | if (GET_MODE (offset_rtx) != address_mode) |
6012 | offset_rtx = convert_to_mode (address_mode, offset_rtx, 0); | |
bd070e1a | 6013 | |
5b0264cb NS |
6014 | to_rtx = offset_address (to_rtx, offset_rtx, |
6015 | highest_pow2_factor (offset)); | |
6016 | } | |
c5c76735 | 6017 | |
34c73909 | 6018 | #ifdef WORD_REGISTER_OPERATIONS |
5b0264cb NS |
6019 | /* If this initializes a field that is smaller than a |
6020 | word, at the start of a word, try to widen it to a full | |
6021 | word. This special case allows us to output C++ member | |
6022 | function initializations in a form that the optimizers | |
6023 | can understand. */ | |
6024 | if (REG_P (target) | |
6025 | && bitsize < BITS_PER_WORD | |
6026 | && bitpos % BITS_PER_WORD == 0 | |
6027 | && GET_MODE_CLASS (mode) == MODE_INT | |
6028 | && TREE_CODE (value) == INTEGER_CST | |
6029 | && exp_size >= 0 | |
6030 | && bitpos + BITS_PER_WORD <= exp_size * BITS_PER_UNIT) | |
6031 | { | |
6032 | tree type = TREE_TYPE (value); | |
ed1223ba | 6033 | |
5b0264cb NS |
6034 | if (TYPE_PRECISION (type) < BITS_PER_WORD) |
6035 | { | |
0f250839 RG |
6036 | type = lang_hooks.types.type_for_mode |
6037 | (word_mode, TYPE_UNSIGNED (type)); | |
3967bc2d | 6038 | value = fold_convert (type, value); |
5b0264cb | 6039 | } |
ed1223ba | 6040 | |
5b0264cb NS |
6041 | if (BYTES_BIG_ENDIAN) |
6042 | value | |
4845b383 | 6043 | = fold_build2 (LSHIFT_EXPR, type, value, |
3967bc2d | 6044 | build_int_cst (type, |
4845b383 | 6045 | BITS_PER_WORD - bitsize)); |
5b0264cb NS |
6046 | bitsize = BITS_PER_WORD; |
6047 | mode = word_mode; | |
6048 | } | |
34c73909 | 6049 | #endif |
10b76d73 | 6050 | |
5b0264cb NS |
6051 | if (MEM_P (to_rtx) && !MEM_KEEP_ALIAS_SET_P (to_rtx) |
6052 | && DECL_NONADDRESSABLE_P (field)) | |
6053 | { | |
6054 | to_rtx = copy_rtx (to_rtx); | |
6055 | MEM_KEEP_ALIAS_SET_P (to_rtx) = 1; | |
6056 | } | |
ed1223ba | 6057 | |
5b0264cb | 6058 | store_constructor_field (to_rtx, bitsize, bitpos, mode, |
3467ad5c | 6059 | value, cleared, |
5b0264cb NS |
6060 | get_alias_set (TREE_TYPE (field))); |
6061 | } | |
6062 | break; | |
6063 | } | |
6064 | case ARRAY_TYPE: | |
6065 | { | |
4038c495 GB |
6066 | tree value, index; |
6067 | unsigned HOST_WIDE_INT i; | |
5b0264cb NS |
6068 | int need_to_clear; |
6069 | tree domain; | |
6070 | tree elttype = TREE_TYPE (type); | |
6071 | int const_bounds_p; | |
6072 | HOST_WIDE_INT minelt = 0; | |
6073 | HOST_WIDE_INT maxelt = 0; | |
6074 | ||
6075 | domain = TYPE_DOMAIN (type); | |
6076 | const_bounds_p = (TYPE_MIN_VALUE (domain) | |
6077 | && TYPE_MAX_VALUE (domain) | |
9541ffee RS |
6078 | && tree_fits_shwi_p (TYPE_MIN_VALUE (domain)) |
6079 | && tree_fits_shwi_p (TYPE_MAX_VALUE (domain))); | |
5b0264cb NS |
6080 | |
6081 | /* If we have constant bounds for the range of the type, get them. */ | |
6082 | if (const_bounds_p) | |
6083 | { | |
9439e9a1 RS |
6084 | minelt = tree_to_shwi (TYPE_MIN_VALUE (domain)); |
6085 | maxelt = tree_to_shwi (TYPE_MAX_VALUE (domain)); | |
5b0264cb | 6086 | } |
3a021db2 | 6087 | |
5b0264cb NS |
6088 | /* If the constructor has fewer elements than the array, clear |
6089 | the whole array first. Similarly if this is static | |
6090 | constructor of a non-BLKmode object. */ | |
6091 | if (cleared) | |
6092 | need_to_clear = 0; | |
6093 | else if (REG_P (target) && TREE_STATIC (exp)) | |
6094 | need_to_clear = 1; | |
6095 | else | |
6096 | { | |
4038c495 GB |
6097 | unsigned HOST_WIDE_INT idx; |
6098 | tree index, value; | |
5b0264cb NS |
6099 | HOST_WIDE_INT count = 0, zero_count = 0; |
6100 | need_to_clear = ! const_bounds_p; | |
ed1223ba | 6101 | |
5b0264cb NS |
6102 | /* This loop is a more accurate version of the loop in |
6103 | mostly_zeros_p (it handles RANGE_EXPR in an index). It | |
6104 | is also needed to check for missing elements. */ | |
4038c495 | 6105 | FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), idx, index, value) |
5b0264cb | 6106 | { |
5b0264cb | 6107 | HOST_WIDE_INT this_node_count; |
4038c495 GB |
6108 | |
6109 | if (need_to_clear) | |
6110 | break; | |
ed1223ba | 6111 | |
5b0264cb NS |
6112 | if (index != NULL_TREE && TREE_CODE (index) == RANGE_EXPR) |
6113 | { | |
6114 | tree lo_index = TREE_OPERAND (index, 0); | |
6115 | tree hi_index = TREE_OPERAND (index, 1); | |
ed1223ba | 6116 | |
cc269bb6 RS |
6117 | if (! tree_fits_uhwi_p (lo_index) |
6118 | || ! tree_fits_uhwi_p (hi_index)) | |
5b0264cb NS |
6119 | { |
6120 | need_to_clear = 1; | |
6121 | break; | |
6122 | } | |
ed1223ba | 6123 | |
ae7e9ddd RS |
6124 | this_node_count = (tree_to_uhwi (hi_index) |
6125 | - tree_to_uhwi (lo_index) + 1); | |
5b0264cb NS |
6126 | } |
6127 | else | |
6128 | this_node_count = 1; | |
ed1223ba | 6129 | |
5b0264cb | 6130 | count += this_node_count; |
4038c495 | 6131 | if (mostly_zeros_p (value)) |
5b0264cb NS |
6132 | zero_count += this_node_count; |
6133 | } | |
ed1223ba | 6134 | |
5b0264cb NS |
6135 | /* Clear the entire array first if there are any missing |
6136 | elements, or if the incidence of zero elements is >= | |
6137 | 75%. */ | |
6138 | if (! need_to_clear | |
6139 | && (count < maxelt - minelt + 1 | |
6140 | || 4 * zero_count >= 3 * count)) | |
6141 | need_to_clear = 1; | |
6142 | } | |
ed1223ba | 6143 | |
5b0264cb NS |
6144 | if (need_to_clear && size > 0) |
6145 | { | |
6146 | if (REG_P (target)) | |
6147 | emit_move_insn (target, CONST0_RTX (GET_MODE (target))); | |
6148 | else | |
8148fe65 | 6149 | clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL); |
5b0264cb NS |
6150 | cleared = 1; |
6151 | } | |
3a021db2 | 6152 | |
5b0264cb NS |
6153 | if (!cleared && REG_P (target)) |
6154 | /* Inform later passes that the old value is dead. */ | |
c41c1387 | 6155 | emit_clobber (target); |
3a021db2 | 6156 | |
5b0264cb NS |
6157 | /* Store each element of the constructor into the |
6158 | corresponding element of TARGET, determined by counting the | |
6159 | elements. */ | |
4038c495 | 6160 | FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), i, index, value) |
5b0264cb NS |
6161 | { |
6162 | enum machine_mode mode; | |
6163 | HOST_WIDE_INT bitsize; | |
6164 | HOST_WIDE_INT bitpos; | |
5b0264cb | 6165 | rtx xtarget = target; |
ed1223ba | 6166 | |
5b0264cb NS |
6167 | if (cleared && initializer_zerop (value)) |
6168 | continue; | |
ed1223ba | 6169 | |
5b0264cb NS |
6170 | mode = TYPE_MODE (elttype); |
6171 | if (mode == BLKmode) | |
cc269bb6 | 6172 | bitsize = (tree_fits_uhwi_p (TYPE_SIZE (elttype)) |
ae7e9ddd | 6173 | ? tree_to_uhwi (TYPE_SIZE (elttype)) |
5b0264cb NS |
6174 | : -1); |
6175 | else | |
6176 | bitsize = GET_MODE_BITSIZE (mode); | |
ed1223ba | 6177 | |
5b0264cb NS |
6178 | if (index != NULL_TREE && TREE_CODE (index) == RANGE_EXPR) |
6179 | { | |
6180 | tree lo_index = TREE_OPERAND (index, 0); | |
6181 | tree hi_index = TREE_OPERAND (index, 1); | |
6182 | rtx index_r, pos_rtx; | |
6183 | HOST_WIDE_INT lo, hi, count; | |
6184 | tree position; | |
ed1223ba | 6185 | |
5b0264cb NS |
6186 | /* If the range is constant and "small", unroll the loop. */ |
6187 | if (const_bounds_p | |
9541ffee RS |
6188 | && tree_fits_shwi_p (lo_index) |
6189 | && tree_fits_shwi_p (hi_index) | |
9439e9a1 RS |
6190 | && (lo = tree_to_shwi (lo_index), |
6191 | hi = tree_to_shwi (hi_index), | |
5b0264cb NS |
6192 | count = hi - lo + 1, |
6193 | (!MEM_P (target) | |
6194 | || count <= 2 | |
cc269bb6 | 6195 | || (tree_fits_uhwi_p (TYPE_SIZE (elttype)) |
ae7e9ddd | 6196 | && (tree_to_uhwi (TYPE_SIZE (elttype)) * count |
5b0264cb NS |
6197 | <= 40 * 8))))) |
6198 | { | |
6199 | lo -= minelt; hi -= minelt; | |
6200 | for (; lo <= hi; lo++) | |
6201 | { | |
9439e9a1 | 6202 | bitpos = lo * tree_to_shwi (TYPE_SIZE (elttype)); |
ed1223ba | 6203 | |
5b0264cb NS |
6204 | if (MEM_P (target) |
6205 | && !MEM_KEEP_ALIAS_SET_P (target) | |
6206 | && TREE_CODE (type) == ARRAY_TYPE | |
6207 | && TYPE_NONALIASED_COMPONENT (type)) | |
6208 | { | |
6209 | target = copy_rtx (target); | |
6210 | MEM_KEEP_ALIAS_SET_P (target) = 1; | |
6211 | } | |
ed1223ba | 6212 | |
5b0264cb | 6213 | store_constructor_field |
3467ad5c | 6214 | (target, bitsize, bitpos, mode, value, cleared, |
5b0264cb NS |
6215 | get_alias_set (elttype)); |
6216 | } | |
6217 | } | |
6218 | else | |
6219 | { | |
770affca DM |
6220 | rtx_code_label *loop_start = gen_label_rtx (); |
6221 | rtx_code_label *loop_end = gen_label_rtx (); | |
5b0264cb | 6222 | tree exit_cond; |
ed1223ba | 6223 | |
84217346 | 6224 | expand_normal (hi_index); |
ed1223ba | 6225 | |
c2255bc4 AH |
6226 | index = build_decl (EXPR_LOCATION (exp), |
6227 | VAR_DECL, NULL_TREE, domain); | |
cde0f3fd | 6228 | index_r = gen_reg_rtx (promote_decl_mode (index, NULL)); |
5b0264cb | 6229 | SET_DECL_RTL (index, index_r); |
79f5e442 | 6230 | store_expr (lo_index, index_r, 0, false); |
ed1223ba | 6231 | |
5b0264cb NS |
6232 | /* Build the head of the loop. */ |
6233 | do_pending_stack_adjust (); | |
6234 | emit_label (loop_start); | |
6235 | ||
6236 | /* Assign value to element index. */ | |
3967bc2d RS |
6237 | position = |
6238 | fold_convert (ssizetype, | |
6239 | fold_build2 (MINUS_EXPR, | |
6240 | TREE_TYPE (index), | |
6241 | index, | |
6242 | TYPE_MIN_VALUE (domain))); | |
6243 | ||
6244 | position = | |
6245 | size_binop (MULT_EXPR, position, | |
6246 | fold_convert (ssizetype, | |
6247 | TYPE_SIZE_UNIT (elttype))); | |
ed1223ba | 6248 | |
84217346 | 6249 | pos_rtx = expand_normal (position); |
5b0264cb NS |
6250 | xtarget = offset_address (target, pos_rtx, |
6251 | highest_pow2_factor (position)); | |
6252 | xtarget = adjust_address (xtarget, mode, 0); | |
6253 | if (TREE_CODE (value) == CONSTRUCTOR) | |
6254 | store_constructor (value, xtarget, cleared, | |
6255 | bitsize / BITS_PER_UNIT); | |
6256 | else | |
79f5e442 | 6257 | store_expr (value, xtarget, 0, false); |
5b0264cb NS |
6258 | |
6259 | /* Generate a conditional jump to exit the loop. */ | |
6260 | exit_cond = build2 (LT_EXPR, integer_type_node, | |
6261 | index, hi_index); | |
40e90eac | 6262 | jumpif (exit_cond, loop_end, -1); |
ed1223ba | 6263 | |
5b0264cb NS |
6264 | /* Update the loop counter, and jump to the head of |
6265 | the loop. */ | |
6266 | expand_assignment (index, | |
6267 | build2 (PLUS_EXPR, TREE_TYPE (index), | |
79f5e442 ZD |
6268 | index, integer_one_node), |
6269 | false); | |
ed1223ba | 6270 | |
5b0264cb | 6271 | emit_jump (loop_start); |
ed1223ba | 6272 | |
5b0264cb NS |
6273 | /* Build the end of the loop. */ |
6274 | emit_label (loop_end); | |
6275 | } | |
6276 | } | |
9541ffee | 6277 | else if ((index != 0 && ! tree_fits_shwi_p (index)) |
cc269bb6 | 6278 | || ! tree_fits_uhwi_p (TYPE_SIZE (elttype))) |
5b0264cb NS |
6279 | { |
6280 | tree position; | |
ed1223ba | 6281 | |
5b0264cb NS |
6282 | if (index == 0) |
6283 | index = ssize_int (1); | |
ed1223ba | 6284 | |
5b0264cb NS |
6285 | if (minelt) |
6286 | index = fold_convert (ssizetype, | |
4845b383 KH |
6287 | fold_build2 (MINUS_EXPR, |
6288 | TREE_TYPE (index), | |
6289 | index, | |
6290 | TYPE_MIN_VALUE (domain))); | |
ed1223ba | 6291 | |
3967bc2d RS |
6292 | position = |
6293 | size_binop (MULT_EXPR, index, | |
6294 | fold_convert (ssizetype, | |
6295 | TYPE_SIZE_UNIT (elttype))); | |
5b0264cb | 6296 | xtarget = offset_address (target, |
84217346 | 6297 | expand_normal (position), |
5b0264cb NS |
6298 | highest_pow2_factor (position)); |
6299 | xtarget = adjust_address (xtarget, mode, 0); | |
79f5e442 | 6300 | store_expr (value, xtarget, 0, false); |
5b0264cb NS |
6301 | } |
6302 | else | |
6303 | { | |
6304 | if (index != 0) | |
9439e9a1 | 6305 | bitpos = ((tree_to_shwi (index) - minelt) |
ae7e9ddd | 6306 | * tree_to_uhwi (TYPE_SIZE (elttype))); |
5b0264cb | 6307 | else |
ae7e9ddd | 6308 | bitpos = (i * tree_to_uhwi (TYPE_SIZE (elttype))); |
ed1223ba | 6309 | |
5b0264cb NS |
6310 | if (MEM_P (target) && !MEM_KEEP_ALIAS_SET_P (target) |
6311 | && TREE_CODE (type) == ARRAY_TYPE | |
6312 | && TYPE_NONALIASED_COMPONENT (type)) | |
6313 | { | |
6314 | target = copy_rtx (target); | |
6315 | MEM_KEEP_ALIAS_SET_P (target) = 1; | |
6316 | } | |
6317 | store_constructor_field (target, bitsize, bitpos, mode, value, | |
3467ad5c | 6318 | cleared, get_alias_set (elttype)); |
5b0264cb NS |
6319 | } |
6320 | } | |
6321 | break; | |
6322 | } | |
3a021db2 | 6323 | |
5b0264cb NS |
6324 | case VECTOR_TYPE: |
6325 | { | |
4038c495 GB |
6326 | unsigned HOST_WIDE_INT idx; |
6327 | constructor_elt *ce; | |
5b0264cb NS |
6328 | int i; |
6329 | int need_to_clear; | |
dee54b6e | 6330 | int icode = CODE_FOR_nothing; |
5b0264cb | 6331 | tree elttype = TREE_TYPE (type); |
ae7e9ddd | 6332 | int elt_size = tree_to_uhwi (TYPE_SIZE (elttype)); |
5b0264cb NS |
6333 | enum machine_mode eltmode = TYPE_MODE (elttype); |
6334 | HOST_WIDE_INT bitsize; | |
6335 | HOST_WIDE_INT bitpos; | |
201dd46b | 6336 | rtvec vector = NULL; |
5b0264cb | 6337 | unsigned n_elts; |
723a7ced | 6338 | alias_set_type alias; |
ed1223ba | 6339 | |
5b0264cb | 6340 | gcc_assert (eltmode != BLKmode); |
ed1223ba | 6341 | |
5b0264cb NS |
6342 | n_elts = TYPE_VECTOR_SUBPARTS (type); |
6343 | if (REG_P (target) && VECTOR_MODE_P (GET_MODE (target))) | |
6344 | { | |
6345 | enum machine_mode mode = GET_MODE (target); | |
ed1223ba | 6346 | |
947131ba | 6347 | icode = (int) optab_handler (vec_init_optab, mode); |
29d78eaf JJ |
6348 | /* Don't use vec_init<mode> if some elements have VECTOR_TYPE. */ |
6349 | if (icode != CODE_FOR_nothing) | |
6350 | { | |
6351 | tree value; | |
6352 | ||
6353 | FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp), idx, value) | |
6354 | if (TREE_CODE (TREE_TYPE (value)) == VECTOR_TYPE) | |
6355 | { | |
6356 | icode = CODE_FOR_nothing; | |
6357 | break; | |
6358 | } | |
6359 | } | |
5b0264cb NS |
6360 | if (icode != CODE_FOR_nothing) |
6361 | { | |
6362 | unsigned int i; | |
ed1223ba | 6363 | |
201dd46b | 6364 | vector = rtvec_alloc (n_elts); |
5b0264cb | 6365 | for (i = 0; i < n_elts; i++) |
201dd46b | 6366 | RTVEC_ELT (vector, i) = CONST0_RTX (GET_MODE_INNER (mode)); |
5b0264cb NS |
6367 | } |
6368 | } | |
ed1223ba | 6369 | |
5b0264cb NS |
6370 | /* If the constructor has fewer elements than the vector, |
6371 | clear the whole array first. Similarly if this is static | |
6372 | constructor of a non-BLKmode object. */ | |
6373 | if (cleared) | |
6374 | need_to_clear = 0; | |
6375 | else if (REG_P (target) && TREE_STATIC (exp)) | |
6376 | need_to_clear = 1; | |
6377 | else | |
6378 | { | |
6379 | unsigned HOST_WIDE_INT count = 0, zero_count = 0; | |
4038c495 | 6380 | tree value; |
ed1223ba | 6381 | |
4038c495 | 6382 | FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp), idx, value) |
5b0264cb | 6383 | { |
386b1f1f | 6384 | int n_elts_here = tree_to_uhwi |
5b0264cb | 6385 | (int_const_binop (TRUNC_DIV_EXPR, |
4038c495 | 6386 | TYPE_SIZE (TREE_TYPE (value)), |
386b1f1f | 6387 | TYPE_SIZE (elttype))); |
ed1223ba | 6388 | |
5b0264cb | 6389 | count += n_elts_here; |
4038c495 | 6390 | if (mostly_zeros_p (value)) |
5b0264cb NS |
6391 | zero_count += n_elts_here; |
6392 | } | |
3a021db2 | 6393 | |
5b0264cb NS |
6394 | /* Clear the entire vector first if there are any missing elements, |
6395 | or if the incidence of zero elements is >= 75%. */ | |
6396 | need_to_clear = (count < n_elts || 4 * zero_count >= 3 * count); | |
6397 | } | |
ed1223ba | 6398 | |
5b0264cb NS |
6399 | if (need_to_clear && size > 0 && !vector) |
6400 | { | |
6401 | if (REG_P (target)) | |
723a7ced | 6402 | emit_move_insn (target, CONST0_RTX (GET_MODE (target))); |
5b0264cb | 6403 | else |
8148fe65 | 6404 | clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL); |
5b0264cb NS |
6405 | cleared = 1; |
6406 | } | |
ed1223ba | 6407 | |
2ab1754e | 6408 | /* Inform later passes that the old value is dead. */ |
cf26aa89 | 6409 | if (!cleared && !vector && REG_P (target)) |
2ab1754e | 6410 | emit_move_insn (target, CONST0_RTX (GET_MODE (target))); |
5b0264cb | 6411 | |
723a7ced JJ |
6412 | if (MEM_P (target)) |
6413 | alias = MEM_ALIAS_SET (target); | |
6414 | else | |
6415 | alias = get_alias_set (elttype); | |
6416 | ||
5b0264cb NS |
6417 | /* Store each element of the constructor into the corresponding |
6418 | element of TARGET, determined by counting the elements. */ | |
4038c495 | 6419 | for (idx = 0, i = 0; |
9771b263 | 6420 | vec_safe_iterate (CONSTRUCTOR_ELTS (exp), idx, &ce); |
4038c495 | 6421 | idx++, i += bitsize / elt_size) |
5b0264cb | 6422 | { |
5b0264cb | 6423 | HOST_WIDE_INT eltpos; |
4038c495 | 6424 | tree value = ce->value; |
ed1223ba | 6425 | |
ae7e9ddd | 6426 | bitsize = tree_to_uhwi (TYPE_SIZE (TREE_TYPE (value))); |
5b0264cb NS |
6427 | if (cleared && initializer_zerop (value)) |
6428 | continue; | |
ed1223ba | 6429 | |
4038c495 | 6430 | if (ce->index) |
ae7e9ddd | 6431 | eltpos = tree_to_uhwi (ce->index); |
5b0264cb NS |
6432 | else |
6433 | eltpos = i; | |
ed1223ba | 6434 | |
5b0264cb NS |
6435 | if (vector) |
6436 | { | |
29d78eaf JJ |
6437 | /* vec_init<mode> should not be used if there are VECTOR_TYPE |
6438 | elements. */ | |
5b0264cb | 6439 | gcc_assert (TREE_CODE (TREE_TYPE (value)) != VECTOR_TYPE); |
201dd46b | 6440 | RTVEC_ELT (vector, eltpos) |
84217346 | 6441 | = expand_normal (value); |
5b0264cb NS |
6442 | } |
6443 | else | |
6444 | { | |
6445 | enum machine_mode value_mode = | |
6446 | TREE_CODE (TREE_TYPE (value)) == VECTOR_TYPE | |
3a021db2 PB |
6447 | ? TYPE_MODE (TREE_TYPE (value)) |
6448 | : eltmode; | |
5b0264cb | 6449 | bitpos = eltpos * elt_size; |
3467ad5c EB |
6450 | store_constructor_field (target, bitsize, bitpos, value_mode, |
6451 | value, cleared, alias); | |
5b0264cb NS |
6452 | } |
6453 | } | |
ed1223ba | 6454 | |
5b0264cb NS |
6455 | if (vector) |
6456 | emit_insn (GEN_FCN (icode) | |
6457 | (target, | |
201dd46b | 6458 | gen_rtx_PARALLEL (GET_MODE (target), vector))); |
5b0264cb NS |
6459 | break; |
6460 | } | |
ed1223ba | 6461 | |
5b0264cb NS |
6462 | default: |
6463 | gcc_unreachable (); | |
071a6595 | 6464 | } |
bbf6f052 RK |
6465 | } |
6466 | ||
6467 | /* Store the value of EXP (an expression tree) | |
6468 | into a subfield of TARGET which has mode MODE and occupies | |
6469 | BITSIZE bits, starting BITPOS bits from the start of TARGET. | |
6470 | If MODE is VOIDmode, it means that we are storing into a bit-field. | |
6471 | ||
1169e45d AH |
6472 | BITREGION_START is bitpos of the first bitfield in this region. |
6473 | BITREGION_END is the bitpos of the ending bitfield in this region. | |
6474 | These two fields are 0, if the C++ memory model does not apply, | |
6475 | or we are not interested in keeping track of bitfield regions. | |
6476 | ||
f45bdcd0 KH |
6477 | Always return const0_rtx unless we have something particular to |
6478 | return. | |
bbf6f052 | 6479 | |
ece32014 MM |
6480 | ALIAS_SET is the alias set for the destination. This value will |
6481 | (in general) be different from that for TARGET, since TARGET is a | |
79f5e442 | 6482 | reference to the containing structure. |
b8698a0f | 6483 | |
79f5e442 | 6484 | If NONTEMPORAL is true, try generating a nontemporal store. */ |
bbf6f052 RK |
6485 | |
6486 | static rtx | |
502b8322 | 6487 | store_field (rtx target, HOST_WIDE_INT bitsize, HOST_WIDE_INT bitpos, |
1169e45d AH |
6488 | unsigned HOST_WIDE_INT bitregion_start, |
6489 | unsigned HOST_WIDE_INT bitregion_end, | |
3467ad5c | 6490 | enum machine_mode mode, tree exp, |
4862826d | 6491 | alias_set_type alias_set, bool nontemporal) |
bbf6f052 | 6492 | { |
e9a25f70 JL |
6493 | if (TREE_CODE (exp) == ERROR_MARK) |
6494 | return const0_rtx; | |
6495 | ||
2be6a7e9 RK |
6496 | /* If we have nothing to store, do nothing unless the expression has |
6497 | side-effects. */ | |
6498 | if (bitsize == 0) | |
49452c07 | 6499 | return expand_expr (exp, const0_rtx, VOIDmode, EXPAND_NORMAL); |
bbf6f052 | 6500 | |
c3b247b4 JM |
6501 | if (GET_CODE (target) == CONCAT) |
6502 | { | |
6503 | /* We're storing into a struct containing a single __complex. */ | |
6504 | ||
5b0264cb | 6505 | gcc_assert (!bitpos); |
79f5e442 | 6506 | return store_expr (exp, target, 0, nontemporal); |
c3b247b4 | 6507 | } |
bbf6f052 RK |
6508 | |
6509 | /* If the structure is in a register or if the component | |
6510 | is a bit field, we cannot use addressing to access it. | |
6511 | Use bit-field techniques or SUBREG to store in it. */ | |
6512 | ||
4fa52007 | 6513 | if (mode == VOIDmode |
6ab06cbb JW |
6514 | || (mode != BLKmode && ! direct_store[(int) mode] |
6515 | && GET_MODE_CLASS (mode) != MODE_COMPLEX_INT | |
6516 | && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT) | |
f8cfc6aa | 6517 | || REG_P (target) |
c980ac49 | 6518 | || GET_CODE (target) == SUBREG |
ccc98036 RS |
6519 | /* If the field isn't aligned enough to store as an ordinary memref, |
6520 | store it as a bit field. */ | |
15b19a7d | 6521 | || (mode != BLKmode |
9e5f281f OH |
6522 | && ((((MEM_ALIGN (target) < GET_MODE_ALIGNMENT (mode)) |
6523 | || bitpos % GET_MODE_ALIGNMENT (mode)) | |
6524 | && SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (target))) | |
502b8322 | 6525 | || (bitpos % BITS_PER_UNIT != 0))) |
36acc1a2 BS |
6526 | || (bitsize >= 0 && mode != BLKmode |
6527 | && GET_MODE_BITSIZE (mode) > bitsize) | |
14a774a9 RK |
6528 | /* If the RHS and field are a constant size and the size of the |
6529 | RHS isn't the same size as the bitfield, we must use bitfield | |
6530 | operations. */ | |
05bccae2 RK |
6531 | || (bitsize >= 0 |
6532 | && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST | |
70f34814 RG |
6533 | && compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)), bitsize) != 0) |
6534 | /* If we are expanding a MEM_REF of a non-BLKmode non-addressable | |
6535 | decl we must use bitfield operations. */ | |
6536 | || (bitsize >= 0 | |
6537 | && TREE_CODE (exp) == MEM_REF | |
6538 | && TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR | |
6539 | && DECL_P (TREE_OPERAND (TREE_OPERAND (exp, 0), 0)) | |
6540 | && !TREE_ADDRESSABLE (TREE_OPERAND (TREE_OPERAND (exp, 0),0 )) | |
6541 | && DECL_MODE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0)) != BLKmode)) | |
bbf6f052 | 6542 | { |
48cc8d3b | 6543 | rtx temp; |
641cac0b | 6544 | gimple nop_def; |
48cc8d3b RH |
6545 | |
6546 | /* If EXP is a NOP_EXPR of precision less than its mode, then that | |
6547 | implies a mask operation. If the precision is the same size as | |
6548 | the field we're storing into, that mask is redundant. This is | |
6549 | particularly common with bit field assignments generated by the | |
6550 | C front end. */ | |
641cac0b AN |
6551 | nop_def = get_def_for_expr (exp, NOP_EXPR); |
6552 | if (nop_def) | |
8d740330 RH |
6553 | { |
6554 | tree type = TREE_TYPE (exp); | |
6555 | if (INTEGRAL_TYPE_P (type) | |
6556 | && TYPE_PRECISION (type) < GET_MODE_BITSIZE (TYPE_MODE (type)) | |
6557 | && bitsize == TYPE_PRECISION (type)) | |
6558 | { | |
641cac0b AN |
6559 | tree op = gimple_assign_rhs1 (nop_def); |
6560 | type = TREE_TYPE (op); | |
8d740330 | 6561 | if (INTEGRAL_TYPE_P (type) && TYPE_PRECISION (type) >= bitsize) |
641cac0b | 6562 | exp = op; |
8d740330 RH |
6563 | } |
6564 | } | |
48cc8d3b | 6565 | |
84217346 | 6566 | temp = expand_normal (exp); |
bbd6cf73 | 6567 | |
ef19912d RK |
6568 | /* If BITSIZE is narrower than the size of the type of EXP |
6569 | we will be narrowing TEMP. Normally, what's wanted are the | |
6570 | low-order bits. However, if EXP's type is a record and this is | |
6571 | big-endian machine, we want the upper BITSIZE bits. */ | |
6572 | if (BYTES_BIG_ENDIAN && GET_MODE_CLASS (GET_MODE (temp)) == MODE_INT | |
65a07688 | 6573 | && bitsize < (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (temp)) |
ef19912d RK |
6574 | && TREE_CODE (TREE_TYPE (exp)) == RECORD_TYPE) |
6575 | temp = expand_shift (RSHIFT_EXPR, GET_MODE (temp), temp, | |
eb6c3df1 | 6576 | GET_MODE_BITSIZE (GET_MODE (temp)) - bitsize, |
c1853da7 | 6577 | NULL_RTX, 1); |
ef19912d | 6578 | |
8c5f2327 | 6579 | /* Unless MODE is VOIDmode or BLKmode, convert TEMP to MODE. */ |
bbd6cf73 RK |
6580 | if (mode != VOIDmode && mode != BLKmode |
6581 | && mode != TYPE_MODE (TREE_TYPE (exp))) | |
6582 | temp = convert_modes (mode, TYPE_MODE (TREE_TYPE (exp)), temp, 1); | |
6583 | ||
bd323ce5 | 6584 | /* If the modes of TEMP and TARGET are both BLKmode, both |
a281e72d | 6585 | must be in memory and BITPOS must be aligned on a byte |
bd323ce5 EB |
6586 | boundary. If so, we simply do a block copy. Likewise |
6587 | for a BLKmode-like TARGET. */ | |
6588 | if (GET_MODE (temp) == BLKmode | |
6589 | && (GET_MODE (target) == BLKmode | |
6590 | || (MEM_P (target) | |
6591 | && GET_MODE_CLASS (GET_MODE (target)) == MODE_INT | |
6592 | && (bitpos % BITS_PER_UNIT) == 0 | |
6593 | && (bitsize % BITS_PER_UNIT) == 0))) | |
a281e72d | 6594 | { |
5b0264cb | 6595 | gcc_assert (MEM_P (target) && MEM_P (temp) |
bd323ce5 | 6596 | && (bitpos % BITS_PER_UNIT) == 0); |
a281e72d | 6597 | |
f4ef873c | 6598 | target = adjust_address (target, VOIDmode, bitpos / BITS_PER_UNIT); |
a281e72d | 6599 | emit_block_move (target, temp, |
a06ef755 | 6600 | GEN_INT ((bitsize + BITS_PER_UNIT - 1) |
44bb111a RH |
6601 | / BITS_PER_UNIT), |
6602 | BLOCK_OP_NORMAL); | |
a281e72d | 6603 | |
f45bdcd0 | 6604 | return const0_rtx; |
a281e72d RK |
6605 | } |
6606 | ||
5ef0b50d EB |
6607 | /* Handle calls that return values in multiple non-contiguous locations. |
6608 | The Irix 6 ABI has examples of this. */ | |
63d94e58 EB |
6609 | if (GET_CODE (temp) == PARALLEL) |
6610 | { | |
3467ad5c | 6611 | HOST_WIDE_INT size = int_size_in_bytes (TREE_TYPE (exp)); |
63d94e58 | 6612 | rtx temp_target; |
d6cd6e22 | 6613 | if (mode == BLKmode || mode == VOIDmode) |
3467ad5c EB |
6614 | mode = smallest_mode_for_size (size * BITS_PER_UNIT, MODE_INT); |
6615 | temp_target = gen_reg_rtx (mode); | |
6616 | emit_group_store (temp_target, temp, TREE_TYPE (exp), size); | |
63d94e58 EB |
6617 | temp = temp_target; |
6618 | } | |
3467ad5c | 6619 | else if (mode == BLKmode) |
929634d8 | 6620 | { |
3467ad5c EB |
6621 | /* Handle calls that return BLKmode values in registers. */ |
6622 | if (REG_P (temp) && TREE_CODE (exp) == CALL_EXPR) | |
6623 | { | |
6624 | rtx temp_target = gen_reg_rtx (GET_MODE (temp)); | |
6625 | copy_blkmode_from_reg (temp_target, temp, TREE_TYPE (exp)); | |
6626 | temp = temp_target; | |
6627 | } | |
6628 | else | |
6629 | { | |
6630 | HOST_WIDE_INT size = int_size_in_bytes (TREE_TYPE (exp)); | |
6631 | rtx temp_target; | |
6632 | mode = smallest_mode_for_size (size * BITS_PER_UNIT, MODE_INT); | |
6633 | temp_target = gen_reg_rtx (mode); | |
6634 | temp_target | |
6635 | = extract_bit_field (temp, size * BITS_PER_UNIT, 0, 1, | |
c6285bd7 | 6636 | temp_target, mode, mode); |
3467ad5c EB |
6637 | temp = temp_target; |
6638 | } | |
929634d8 EB |
6639 | } |
6640 | ||
63d94e58 EB |
6641 | /* Store the value in the bitfield. */ |
6642 | store_bit_field (target, bitsize, bitpos, | |
6643 | bitregion_start, bitregion_end, | |
6644 | mode, temp); | |
a06ef755 | 6645 | |
bbf6f052 RK |
6646 | return const0_rtx; |
6647 | } | |
6648 | else | |
6649 | { | |
bbf6f052 | 6650 | /* Now build a reference to just the desired component. */ |
f45bdcd0 | 6651 | rtx to_rtx = adjust_address (target, mode, bitpos / BITS_PER_UNIT); |
a06ef755 RK |
6652 | |
6653 | if (to_rtx == target) | |
6654 | to_rtx = copy_rtx (to_rtx); | |
792760b9 | 6655 | |
10b76d73 | 6656 | if (!MEM_KEEP_ALIAS_SET_P (to_rtx) && MEM_ALIAS_SET (to_rtx) != 0) |
a06ef755 | 6657 | set_mem_alias_set (to_rtx, alias_set); |
bbf6f052 | 6658 | |
79f5e442 | 6659 | return store_expr (exp, to_rtx, 0, nontemporal); |
bbf6f052 RK |
6660 | } |
6661 | } | |
6662 | \f | |
6663 | /* Given an expression EXP that may be a COMPONENT_REF, a BIT_FIELD_REF, | |
b4e3fabb RK |
6664 | an ARRAY_REF, or an ARRAY_RANGE_REF, look for nested operations of these |
6665 | codes and find the ultimate containing object, which we return. | |
bbf6f052 RK |
6666 | |
6667 | We set *PBITSIZE to the size in bits that we want, *PBITPOS to the | |
6668 | bit position, and *PUNSIGNEDP to the signedness of the field. | |
7bb0943f RS |
6669 | If the position of the field is variable, we store a tree |
6670 | giving the variable offset (in units) in *POFFSET. | |
6671 | This offset is in addition to the bit position. | |
6672 | If the position is not variable, we store 0 in *POFFSET. | |
bbf6f052 RK |
6673 | |
6674 | If any of the extraction expressions is volatile, | |
6675 | we store 1 in *PVOLATILEP. Otherwise we don't change that. | |
6676 | ||
bd323ce5 EB |
6677 | If the field is a non-BLKmode bit-field, *PMODE is set to VOIDmode. |
6678 | Otherwise, it is a mode that can be used to access the field. | |
e7c33f54 RK |
6679 | |
6680 | If the field describes a variable-sized object, *PMODE is set to | |
bd323ce5 | 6681 | BLKmode and *PBITSIZE is set to -1. An access cannot be made in |
b3ecff82 BE |
6682 | this case, but the address of the object can be found. |
6683 | ||
6684 | If KEEP_ALIGNING is true and the target is STRICT_ALIGNMENT, we don't | |
6685 | look through nodes that serve as markers of a greater alignment than | |
6686 | the one that can be deduced from the expression. These nodes make it | |
6687 | possible for front-ends to prevent temporaries from being created by | |
6688 | the middle-end on alignment considerations. For that purpose, the | |
6689 | normal operating mode at high-level is to always pass FALSE so that | |
6690 | the ultimate containing object is really returned; moreover, the | |
6691 | associated predicate handled_component_p will always return TRUE | |
6692 | on these nodes, thus indicating that they are essentially handled | |
6693 | by get_inner_reference. TRUE should only be passed when the caller | |
6694 | is scanning the expression in order to build another representation | |
6695 | and specifically knows how to handle these nodes; as such, this is | |
6696 | the normal operating mode in the RTL expanders. */ | |
bbf6f052 RK |
6697 | |
6698 | tree | |
502b8322 AJ |
6699 | get_inner_reference (tree exp, HOST_WIDE_INT *pbitsize, |
6700 | HOST_WIDE_INT *pbitpos, tree *poffset, | |
6701 | enum machine_mode *pmode, int *punsignedp, | |
b3ecff82 | 6702 | int *pvolatilep, bool keep_aligning) |
bbf6f052 RK |
6703 | { |
6704 | tree size_tree = 0; | |
6705 | enum machine_mode mode = VOIDmode; | |
bd323ce5 | 6706 | bool blkmode_bitfield = false; |
fed3cef0 | 6707 | tree offset = size_zero_node; |
807e902e | 6708 | offset_int bit_offset = 0; |
bbf6f052 | 6709 | |
770ae6cc RK |
6710 | /* First get the mode, signedness, and size. We do this from just the |
6711 | outermost expression. */ | |
997ac87b | 6712 | *pbitsize = -1; |
bbf6f052 RK |
6713 | if (TREE_CODE (exp) == COMPONENT_REF) |
6714 | { | |
bd323ce5 EB |
6715 | tree field = TREE_OPERAND (exp, 1); |
6716 | size_tree = DECL_SIZE (field); | |
5dfd32cd BE |
6717 | if (flag_strict_volatile_bitfields > 0 |
6718 | && TREE_THIS_VOLATILE (exp) | |
6719 | && DECL_BIT_FIELD_TYPE (field) | |
6720 | && DECL_MODE (field) != BLKmode) | |
6a78b724 DD |
6721 | /* Volatile bitfields should be accessed in the mode of the |
6722 | field's type, not the mode computed based on the bit | |
6723 | size. */ | |
6724 | mode = TYPE_MODE (DECL_BIT_FIELD_TYPE (field)); | |
5dfd32cd BE |
6725 | else if (!DECL_BIT_FIELD (field)) |
6726 | mode = DECL_MODE (field); | |
6727 | else if (DECL_MODE (field) == BLKmode) | |
6728 | blkmode_bitfield = true; | |
bd323ce5 EB |
6729 | |
6730 | *punsignedp = DECL_UNSIGNED (field); | |
bbf6f052 RK |
6731 | } |
6732 | else if (TREE_CODE (exp) == BIT_FIELD_REF) | |
6733 | { | |
6734 | size_tree = TREE_OPERAND (exp, 1); | |
fc0f49f3 RG |
6735 | *punsignedp = (! INTEGRAL_TYPE_P (TREE_TYPE (exp)) |
6736 | || TYPE_UNSIGNED (TREE_TYPE (exp))); | |
ed1223ba | 6737 | |
0890b981 AP |
6738 | /* For vector types, with the correct size of access, use the mode of |
6739 | inner type. */ | |
6740 | if (TREE_CODE (TREE_TYPE (TREE_OPERAND (exp, 0))) == VECTOR_TYPE | |
6741 | && TREE_TYPE (exp) == TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0))) | |
6742 | && tree_int_cst_equal (size_tree, TYPE_SIZE (TREE_TYPE (exp)))) | |
6743 | mode = TYPE_MODE (TREE_TYPE (exp)); | |
bbf6f052 RK |
6744 | } |
6745 | else | |
6746 | { | |
6747 | mode = TYPE_MODE (TREE_TYPE (exp)); | |
8df83eae | 6748 | *punsignedp = TYPE_UNSIGNED (TREE_TYPE (exp)); |
770ae6cc | 6749 | |
ab87f8c8 JL |
6750 | if (mode == BLKmode) |
6751 | size_tree = TYPE_SIZE (TREE_TYPE (exp)); | |
770ae6cc RK |
6752 | else |
6753 | *pbitsize = GET_MODE_BITSIZE (mode); | |
bbf6f052 | 6754 | } |
3a94c984 | 6755 | |
770ae6cc | 6756 | if (size_tree != 0) |
bbf6f052 | 6757 | { |
cc269bb6 | 6758 | if (! tree_fits_uhwi_p (size_tree)) |
e7c33f54 RK |
6759 | mode = BLKmode, *pbitsize = -1; |
6760 | else | |
ae7e9ddd | 6761 | *pbitsize = tree_to_uhwi (size_tree); |
bbf6f052 RK |
6762 | } |
6763 | ||
6764 | /* Compute cumulative bit-offset for nested component-refs and array-refs, | |
6765 | and find the ultimate containing object. */ | |
bbf6f052 RK |
6766 | while (1) |
6767 | { | |
afe84921 | 6768 | switch (TREE_CODE (exp)) |
bbf6f052 | 6769 | { |
afe84921 | 6770 | case BIT_FIELD_REF: |
807e902e | 6771 | bit_offset += wi::to_offset (TREE_OPERAND (exp, 2)); |
afe84921 | 6772 | break; |
bbf6f052 | 6773 | |
afe84921 RH |
6774 | case COMPONENT_REF: |
6775 | { | |
6776 | tree field = TREE_OPERAND (exp, 1); | |
6777 | tree this_offset = component_ref_field_offset (exp); | |
e7f3c83f | 6778 | |
afe84921 RH |
6779 | /* If this field hasn't been filled in yet, don't go past it. |
6780 | This should only happen when folding expressions made during | |
6781 | type construction. */ | |
6782 | if (this_offset == 0) | |
6783 | break; | |
e6d8c385 | 6784 | |
afe84921 | 6785 | offset = size_binop (PLUS_EXPR, offset, this_offset); |
807e902e | 6786 | bit_offset += wi::to_offset (DECL_FIELD_BIT_OFFSET (field)); |
7156dead | 6787 | |
afe84921 RH |
6788 | /* ??? Right now we don't do anything with DECL_OFFSET_ALIGN. */ |
6789 | } | |
6790 | break; | |
7156dead | 6791 | |
afe84921 RH |
6792 | case ARRAY_REF: |
6793 | case ARRAY_RANGE_REF: | |
6794 | { | |
6795 | tree index = TREE_OPERAND (exp, 1); | |
6796 | tree low_bound = array_ref_low_bound (exp); | |
6797 | tree unit_size = array_ref_element_size (exp); | |
6798 | ||
6799 | /* We assume all arrays have sizes that are a multiple of a byte. | |
6800 | First subtract the lower bound, if any, in the type of the | |
6801 | index, then convert to sizetype and multiply by the size of | |
6802 | the array element. */ | |
6803 | if (! integer_zerop (low_bound)) | |
4845b383 KH |
6804 | index = fold_build2 (MINUS_EXPR, TREE_TYPE (index), |
6805 | index, low_bound); | |
afe84921 RH |
6806 | |
6807 | offset = size_binop (PLUS_EXPR, offset, | |
6808 | size_binop (MULT_EXPR, | |
3967bc2d | 6809 | fold_convert (sizetype, index), |
afe84921 RH |
6810 | unit_size)); |
6811 | } | |
6812 | break; | |
6813 | ||
6814 | case REALPART_EXPR: | |
afe84921 RH |
6815 | break; |
6816 | ||
6817 | case IMAGPART_EXPR: | |
807e902e | 6818 | bit_offset += *pbitsize; |
afe84921 RH |
6819 | break; |
6820 | ||
afe84921 | 6821 | case VIEW_CONVERT_EXPR: |
b3ecff82 BE |
6822 | if (keep_aligning && STRICT_ALIGNMENT |
6823 | && (TYPE_ALIGN (TREE_TYPE (exp)) | |
6824 | > TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (exp, 0)))) | |
6825 | && (TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (exp, 0))) | |
6826 | < BIGGEST_ALIGNMENT) | |
6827 | && (TYPE_ALIGN_OK (TREE_TYPE (exp)) | |
6828 | || TYPE_ALIGN_OK (TREE_TYPE (TREE_OPERAND (exp, 0))))) | |
6829 | goto done; | |
afe84921 RH |
6830 | break; |
6831 | ||
70f34814 RG |
6832 | case MEM_REF: |
6833 | /* Hand back the decl for MEM[&decl, off]. */ | |
6834 | if (TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR) | |
6835 | { | |
6836 | tree off = TREE_OPERAND (exp, 1); | |
6837 | if (!integer_zerop (off)) | |
6838 | { | |
807e902e KZ |
6839 | offset_int boff, coff = mem_ref_offset (exp); |
6840 | boff = wi::lshift (coff, LOG2_BITS_PER_UNIT); | |
27bcd47c | 6841 | bit_offset += boff; |
70f34814 RG |
6842 | } |
6843 | exp = TREE_OPERAND (TREE_OPERAND (exp, 0), 0); | |
6844 | } | |
6845 | goto done; | |
6846 | ||
afe84921 RH |
6847 | default: |
6848 | goto done; | |
6849 | } | |
7bb0943f RS |
6850 | |
6851 | /* If any reference in the chain is volatile, the effect is volatile. */ | |
6852 | if (TREE_THIS_VOLATILE (exp)) | |
6853 | *pvolatilep = 1; | |
839c4796 | 6854 | |
bbf6f052 RK |
6855 | exp = TREE_OPERAND (exp, 0); |
6856 | } | |
afe84921 | 6857 | done: |
bbf6f052 | 6858 | |
770ae6cc | 6859 | /* If OFFSET is constant, see if we can return the whole thing as a |
9c219b9b RG |
6860 | constant bit position. Make sure to handle overflow during |
6861 | this conversion. */ | |
97919ae7 RG |
6862 | if (TREE_CODE (offset) == INTEGER_CST) |
6863 | { | |
807e902e KZ |
6864 | offset_int tem = wi::sext (wi::to_offset (offset), |
6865 | TYPE_PRECISION (sizetype)); | |
6866 | tem = wi::lshift (tem, LOG2_BITS_PER_UNIT); | |
27bcd47c | 6867 | tem += bit_offset; |
807e902e | 6868 | if (wi::fits_shwi_p (tem)) |
27bcd47c LC |
6869 | { |
6870 | *pbitpos = tem.to_shwi (); | |
bd323ce5 | 6871 | *poffset = offset = NULL_TREE; |
9c219b9b RG |
6872 | } |
6873 | } | |
6874 | ||
6875 | /* Otherwise, split it up. */ | |
bd323ce5 EB |
6876 | if (offset) |
6877 | { | |
f22cfd73 | 6878 | /* Avoid returning a negative bitpos as this may wreak havoc later. */ |
807e902e | 6879 | if (wi::neg_p (bit_offset)) |
f22cfd73 | 6880 | { |
807e902e KZ |
6881 | offset_int mask = wi::mask <offset_int> (LOG2_BITS_PER_UNIT, false); |
6882 | offset_int tem = bit_offset.and_not (mask); | |
f22cfd73 EB |
6883 | /* TEM is the bitpos rounded to BITS_PER_UNIT towards -Inf. |
6884 | Subtract it to BIT_OFFSET and add it (scaled) to OFFSET. */ | |
27bcd47c | 6885 | bit_offset -= tem; |
807e902e | 6886 | tem = wi::arshift (tem, LOG2_BITS_PER_UNIT); |
f22cfd73 | 6887 | offset = size_binop (PLUS_EXPR, offset, |
807e902e | 6888 | wide_int_to_tree (sizetype, tem)); |
f22cfd73 EB |
6889 | } |
6890 | ||
27bcd47c | 6891 | *pbitpos = bit_offset.to_shwi (); |
bd323ce5 EB |
6892 | *poffset = offset; |
6893 | } | |
6894 | ||
6895 | /* We can use BLKmode for a byte-aligned BLKmode bitfield. */ | |
6896 | if (mode == VOIDmode | |
6897 | && blkmode_bitfield | |
6898 | && (*pbitpos % BITS_PER_UNIT) == 0 | |
6899 | && (*pbitsize % BITS_PER_UNIT) == 0) | |
6900 | *pmode = BLKmode; | |
6901 | else | |
6902 | *pmode = mode; | |
b50d17a1 | 6903 | |
bbf6f052 RK |
6904 | return exp; |
6905 | } | |
921b3427 | 6906 | |
44de5aeb | 6907 | /* Return a tree of sizetype representing the size, in bytes, of the element |
9f7ccf69 | 6908 | of EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */ |
44de5aeb RK |
6909 | |
6910 | tree | |
6911 | array_ref_element_size (tree exp) | |
6912 | { | |
6913 | tree aligned_size = TREE_OPERAND (exp, 3); | |
6914 | tree elmt_type = TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0))); | |
db3927fb | 6915 | location_t loc = EXPR_LOCATION (exp); |
44de5aeb RK |
6916 | |
6917 | /* If a size was specified in the ARRAY_REF, it's the size measured | |
6918 | in alignment units of the element type. So multiply by that value. */ | |
6919 | if (aligned_size) | |
bc482be4 RH |
6920 | { |
6921 | /* ??? tree_ssa_useless_type_conversion will eliminate casts to | |
6922 | sizetype from another type of the same width and signedness. */ | |
6923 | if (TREE_TYPE (aligned_size) != sizetype) | |
db3927fb AH |
6924 | aligned_size = fold_convert_loc (loc, sizetype, aligned_size); |
6925 | return size_binop_loc (loc, MULT_EXPR, aligned_size, | |
6926 | size_int (TYPE_ALIGN_UNIT (elmt_type))); | |
bc482be4 | 6927 | } |
44de5aeb | 6928 | |
caf93cb0 | 6929 | /* Otherwise, take the size from that of the element type. Substitute |
44de5aeb RK |
6930 | any PLACEHOLDER_EXPR that we have. */ |
6931 | else | |
6932 | return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_SIZE_UNIT (elmt_type), exp); | |
6933 | } | |
6934 | ||
6935 | /* Return a tree representing the lower bound of the array mentioned in | |
9f7ccf69 | 6936 | EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */ |
44de5aeb RK |
6937 | |
6938 | tree | |
6939 | array_ref_low_bound (tree exp) | |
6940 | { | |
6941 | tree domain_type = TYPE_DOMAIN (TREE_TYPE (TREE_OPERAND (exp, 0))); | |
6942 | ||
6943 | /* If a lower bound is specified in EXP, use it. */ | |
6944 | if (TREE_OPERAND (exp, 2)) | |
6945 | return TREE_OPERAND (exp, 2); | |
6946 | ||
6947 | /* Otherwise, if there is a domain type and it has a lower bound, use it, | |
6948 | substituting for a PLACEHOLDER_EXPR as needed. */ | |
6949 | if (domain_type && TYPE_MIN_VALUE (domain_type)) | |
6950 | return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_MIN_VALUE (domain_type), exp); | |
6951 | ||
6952 | /* Otherwise, return a zero of the appropriate type. */ | |
5212068f | 6953 | return build_int_cst (TREE_TYPE (TREE_OPERAND (exp, 1)), 0); |
44de5aeb RK |
6954 | } |
6955 | ||
d8279b12 RG |
6956 | /* Returns true if REF is an array reference to an array at the end of |
6957 | a structure. If this is the case, the array may be allocated larger | |
6958 | than its upper bound implies. */ | |
6959 | ||
6960 | bool | |
6961 | array_at_struct_end_p (tree ref) | |
6962 | { | |
6963 | if (TREE_CODE (ref) != ARRAY_REF | |
6964 | && TREE_CODE (ref) != ARRAY_RANGE_REF) | |
6965 | return false; | |
6966 | ||
6967 | while (handled_component_p (ref)) | |
6968 | { | |
6969 | /* If the reference chain contains a component reference to a | |
6970 | non-union type and there follows another field the reference | |
6971 | is not at the end of a structure. */ | |
6972 | if (TREE_CODE (ref) == COMPONENT_REF | |
6973 | && TREE_CODE (TREE_TYPE (TREE_OPERAND (ref, 0))) == RECORD_TYPE) | |
6974 | { | |
6975 | tree nextf = DECL_CHAIN (TREE_OPERAND (ref, 1)); | |
6976 | while (nextf && TREE_CODE (nextf) != FIELD_DECL) | |
6977 | nextf = DECL_CHAIN (nextf); | |
6978 | if (nextf) | |
6979 | return false; | |
6980 | } | |
6981 | ||
6982 | ref = TREE_OPERAND (ref, 0); | |
6983 | } | |
6984 | ||
6985 | /* If the reference is based on a declared entity, the size of the array | |
6986 | is constrained by its given domain. */ | |
6987 | if (DECL_P (ref)) | |
6988 | return false; | |
6989 | ||
6990 | return true; | |
6991 | } | |
6992 | ||
a7e5372d | 6993 | /* Return a tree representing the upper bound of the array mentioned in |
9f7ccf69 | 6994 | EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */ |
a7e5372d ZD |
6995 | |
6996 | tree | |
6997 | array_ref_up_bound (tree exp) | |
6998 | { | |
6999 | tree domain_type = TYPE_DOMAIN (TREE_TYPE (TREE_OPERAND (exp, 0))); | |
7000 | ||
7001 | /* If there is a domain type and it has an upper bound, use it, substituting | |
7002 | for a PLACEHOLDER_EXPR as needed. */ | |
7003 | if (domain_type && TYPE_MAX_VALUE (domain_type)) | |
7004 | return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_MAX_VALUE (domain_type), exp); | |
7005 | ||
7006 | /* Otherwise fail. */ | |
7007 | return NULL_TREE; | |
7008 | } | |
7009 | ||
44de5aeb RK |
7010 | /* Return a tree representing the offset, in bytes, of the field referenced |
7011 | by EXP. This does not include any offset in DECL_FIELD_BIT_OFFSET. */ | |
7012 | ||
7013 | tree | |
7014 | component_ref_field_offset (tree exp) | |
7015 | { | |
7016 | tree aligned_offset = TREE_OPERAND (exp, 2); | |
7017 | tree field = TREE_OPERAND (exp, 1); | |
db3927fb | 7018 | location_t loc = EXPR_LOCATION (exp); |
44de5aeb RK |
7019 | |
7020 | /* If an offset was specified in the COMPONENT_REF, it's the offset measured | |
7021 | in units of DECL_OFFSET_ALIGN / BITS_PER_UNIT. So multiply by that | |
7022 | value. */ | |
7023 | if (aligned_offset) | |
bc482be4 RH |
7024 | { |
7025 | /* ??? tree_ssa_useless_type_conversion will eliminate casts to | |
7026 | sizetype from another type of the same width and signedness. */ | |
7027 | if (TREE_TYPE (aligned_offset) != sizetype) | |
db3927fb AH |
7028 | aligned_offset = fold_convert_loc (loc, sizetype, aligned_offset); |
7029 | return size_binop_loc (loc, MULT_EXPR, aligned_offset, | |
7030 | size_int (DECL_OFFSET_ALIGN (field) | |
7031 | / BITS_PER_UNIT)); | |
bc482be4 | 7032 | } |
44de5aeb | 7033 | |
caf93cb0 | 7034 | /* Otherwise, take the offset from that of the field. Substitute |
44de5aeb RK |
7035 | any PLACEHOLDER_EXPR that we have. */ |
7036 | else | |
7037 | return SUBSTITUTE_PLACEHOLDER_IN_EXPR (DECL_FIELD_OFFSET (field), exp); | |
7038 | } | |
ceadb728 OH |
7039 | |
7040 | /* Alignment in bits the TARGET of an assignment may be assumed to have. */ | |
7041 | ||
7042 | static unsigned HOST_WIDE_INT | |
7043 | target_align (const_tree target) | |
7044 | { | |
7045 | /* We might have a chain of nested references with intermediate misaligning | |
7046 | bitfields components, so need to recurse to find out. */ | |
7047 | ||
7048 | unsigned HOST_WIDE_INT this_align, outer_align; | |
7049 | ||
7050 | switch (TREE_CODE (target)) | |
7051 | { | |
7052 | case BIT_FIELD_REF: | |
7053 | return 1; | |
7054 | ||
7055 | case COMPONENT_REF: | |
7056 | this_align = DECL_ALIGN (TREE_OPERAND (target, 1)); | |
7057 | outer_align = target_align (TREE_OPERAND (target, 0)); | |
7058 | return MIN (this_align, outer_align); | |
7059 | ||
7060 | case ARRAY_REF: | |
7061 | case ARRAY_RANGE_REF: | |
7062 | this_align = TYPE_ALIGN (TREE_TYPE (target)); | |
7063 | outer_align = target_align (TREE_OPERAND (target, 0)); | |
7064 | return MIN (this_align, outer_align); | |
7065 | ||
7066 | CASE_CONVERT: | |
7067 | case NON_LVALUE_EXPR: | |
7068 | case VIEW_CONVERT_EXPR: | |
7069 | this_align = TYPE_ALIGN (TREE_TYPE (target)); | |
7070 | outer_align = target_align (TREE_OPERAND (target, 0)); | |
7071 | return MAX (this_align, outer_align); | |
7072 | ||
7073 | default: | |
7074 | return TYPE_ALIGN (TREE_TYPE (target)); | |
7075 | } | |
7076 | } | |
7077 | ||
bbf6f052 | 7078 | \f |
3fe44edd RK |
7079 | /* Given an rtx VALUE that may contain additions and multiplications, return |
7080 | an equivalent value that just refers to a register, memory, or constant. | |
7081 | This is done by generating instructions to perform the arithmetic and | |
7082 | returning a pseudo-register containing the value. | |
c45a13a6 RK |
7083 | |
7084 | The returned value may be a REG, SUBREG, MEM or constant. */ | |
bbf6f052 RK |
7085 | |
7086 | rtx | |
502b8322 | 7087 | force_operand (rtx value, rtx target) |
bbf6f052 | 7088 | { |
8a28dbcc | 7089 | rtx op1, op2; |
bbf6f052 | 7090 | /* Use subtarget as the target for operand 0 of a binary operation. */ |
b3694847 | 7091 | rtx subtarget = get_subtarget (target); |
8a28dbcc | 7092 | enum rtx_code code = GET_CODE (value); |
bbf6f052 | 7093 | |
50654f6c ZD |
7094 | /* Check for subreg applied to an expression produced by loop optimizer. */ |
7095 | if (code == SUBREG | |
f8cfc6aa | 7096 | && !REG_P (SUBREG_REG (value)) |
3c0cb5de | 7097 | && !MEM_P (SUBREG_REG (value))) |
50654f6c | 7098 | { |
b7e6d1da UB |
7099 | value |
7100 | = simplify_gen_subreg (GET_MODE (value), | |
7101 | force_reg (GET_MODE (SUBREG_REG (value)), | |
7102 | force_operand (SUBREG_REG (value), | |
7103 | NULL_RTX)), | |
7104 | GET_MODE (SUBREG_REG (value)), | |
7105 | SUBREG_BYTE (value)); | |
50654f6c ZD |
7106 | code = GET_CODE (value); |
7107 | } | |
7108 | ||
8b015896 | 7109 | /* Check for a PIC address load. */ |
8a28dbcc | 7110 | if ((code == PLUS || code == MINUS) |
8b015896 RH |
7111 | && XEXP (value, 0) == pic_offset_table_rtx |
7112 | && (GET_CODE (XEXP (value, 1)) == SYMBOL_REF | |
7113 | || GET_CODE (XEXP (value, 1)) == LABEL_REF | |
7114 | || GET_CODE (XEXP (value, 1)) == CONST)) | |
7115 | { | |
7116 | if (!subtarget) | |
7117 | subtarget = gen_reg_rtx (GET_MODE (value)); | |
7118 | emit_move_insn (subtarget, value); | |
7119 | return subtarget; | |
7120 | } | |
7121 | ||
ec8e098d | 7122 | if (ARITHMETIC_P (value)) |
bbf6f052 RK |
7123 | { |
7124 | op2 = XEXP (value, 1); | |
f8cfc6aa | 7125 | if (!CONSTANT_P (op2) && !(REG_P (op2) && op2 != subtarget)) |
bbf6f052 | 7126 | subtarget = 0; |
481683e1 | 7127 | if (code == MINUS && CONST_INT_P (op2)) |
bbf6f052 | 7128 | { |
8a28dbcc | 7129 | code = PLUS; |
bbf6f052 RK |
7130 | op2 = negate_rtx (GET_MODE (value), op2); |
7131 | } | |
7132 | ||
7133 | /* Check for an addition with OP2 a constant integer and our first | |
8a28dbcc JH |
7134 | operand a PLUS of a virtual register and something else. In that |
7135 | case, we want to emit the sum of the virtual register and the | |
7136 | constant first and then add the other value. This allows virtual | |
7137 | register instantiation to simply modify the constant rather than | |
7138 | creating another one around this addition. */ | |
481683e1 | 7139 | if (code == PLUS && CONST_INT_P (op2) |
bbf6f052 | 7140 | && GET_CODE (XEXP (value, 0)) == PLUS |
f8cfc6aa | 7141 | && REG_P (XEXP (XEXP (value, 0), 0)) |
bbf6f052 RK |
7142 | && REGNO (XEXP (XEXP (value, 0), 0)) >= FIRST_VIRTUAL_REGISTER |
7143 | && REGNO (XEXP (XEXP (value, 0), 0)) <= LAST_VIRTUAL_REGISTER) | |
7144 | { | |
8a28dbcc JH |
7145 | rtx temp = expand_simple_binop (GET_MODE (value), code, |
7146 | XEXP (XEXP (value, 0), 0), op2, | |
7147 | subtarget, 0, OPTAB_LIB_WIDEN); | |
7148 | return expand_simple_binop (GET_MODE (value), code, temp, | |
7149 | force_operand (XEXP (XEXP (value, | |
7150 | 0), 1), 0), | |
7151 | target, 0, OPTAB_LIB_WIDEN); | |
bbf6f052 | 7152 | } |
3a94c984 | 7153 | |
8a28dbcc JH |
7154 | op1 = force_operand (XEXP (value, 0), subtarget); |
7155 | op2 = force_operand (op2, NULL_RTX); | |
7156 | switch (code) | |
7157 | { | |
7158 | case MULT: | |
7159 | return expand_mult (GET_MODE (value), op1, op2, target, 1); | |
7160 | case DIV: | |
7161 | if (!INTEGRAL_MODE_P (GET_MODE (value))) | |
7162 | return expand_simple_binop (GET_MODE (value), code, op1, op2, | |
7163 | target, 1, OPTAB_LIB_WIDEN); | |
7164 | else | |
7165 | return expand_divmod (0, | |
7166 | FLOAT_MODE_P (GET_MODE (value)) | |
7167 | ? RDIV_EXPR : TRUNC_DIV_EXPR, | |
7168 | GET_MODE (value), op1, op2, target, 0); | |
8a28dbcc JH |
7169 | case MOD: |
7170 | return expand_divmod (1, TRUNC_MOD_EXPR, GET_MODE (value), op1, op2, | |
7171 | target, 0); | |
8a28dbcc JH |
7172 | case UDIV: |
7173 | return expand_divmod (0, TRUNC_DIV_EXPR, GET_MODE (value), op1, op2, | |
7174 | target, 1); | |
8a28dbcc JH |
7175 | case UMOD: |
7176 | return expand_divmod (1, TRUNC_MOD_EXPR, GET_MODE (value), op1, op2, | |
7177 | target, 1); | |
8a28dbcc JH |
7178 | case ASHIFTRT: |
7179 | return expand_simple_binop (GET_MODE (value), code, op1, op2, | |
7180 | target, 0, OPTAB_LIB_WIDEN); | |
8a28dbcc JH |
7181 | default: |
7182 | return expand_simple_binop (GET_MODE (value), code, op1, op2, | |
7183 | target, 1, OPTAB_LIB_WIDEN); | |
7184 | } | |
7185 | } | |
ec8e098d | 7186 | if (UNARY_P (value)) |
8a28dbcc | 7187 | { |
72a10eff RS |
7188 | if (!target) |
7189 | target = gen_reg_rtx (GET_MODE (value)); | |
8a28dbcc | 7190 | op1 = force_operand (XEXP (value, 0), NULL_RTX); |
1fd5360d R |
7191 | switch (code) |
7192 | { | |
72a10eff RS |
7193 | case ZERO_EXTEND: |
7194 | case SIGN_EXTEND: | |
1fd5360d | 7195 | case TRUNCATE: |
e69e3d0e ZD |
7196 | case FLOAT_EXTEND: |
7197 | case FLOAT_TRUNCATE: | |
72a10eff RS |
7198 | convert_move (target, op1, code == ZERO_EXTEND); |
7199 | return target; | |
7200 | ||
7201 | case FIX: | |
7202 | case UNSIGNED_FIX: | |
7203 | expand_fix (target, op1, code == UNSIGNED_FIX); | |
7204 | return target; | |
7205 | ||
7206 | case FLOAT: | |
7207 | case UNSIGNED_FLOAT: | |
7208 | expand_float (target, op1, code == UNSIGNED_FLOAT); | |
7209 | return target; | |
7210 | ||
1fd5360d R |
7211 | default: |
7212 | return expand_simple_unop (GET_MODE (value), code, op1, target, 0); | |
7213 | } | |
bbf6f052 | 7214 | } |
34e81b5a RK |
7215 | |
7216 | #ifdef INSN_SCHEDULING | |
7217 | /* On machines that have insn scheduling, we want all memory reference to be | |
7218 | explicit, so we need to deal with such paradoxical SUBREGs. */ | |
6a4bdc79 | 7219 | if (paradoxical_subreg_p (value) && MEM_P (SUBREG_REG (value))) |
34e81b5a RK |
7220 | value |
7221 | = simplify_gen_subreg (GET_MODE (value), | |
7222 | force_reg (GET_MODE (SUBREG_REG (value)), | |
7223 | force_operand (SUBREG_REG (value), | |
7224 | NULL_RTX)), | |
7225 | GET_MODE (SUBREG_REG (value)), | |
7226 | SUBREG_BYTE (value)); | |
7227 | #endif | |
7228 | ||
bbf6f052 RK |
7229 | return value; |
7230 | } | |
7231 | \f | |
bbf6f052 | 7232 | /* Subroutine of expand_expr: return nonzero iff there is no way that |
e5e809f4 JL |
7233 | EXP can reference X, which is being modified. TOP_P is nonzero if this |
7234 | call is going to be used to determine whether we need a temporary | |
ff439b5f CB |
7235 | for EXP, as opposed to a recursive call to this function. |
7236 | ||
7237 | It is always safe for this routine to return zero since it merely | |
7238 | searches for optimization opportunities. */ | |
bbf6f052 | 7239 | |
8f17b5c5 | 7240 | int |
22ea9ec0 | 7241 | safe_from_p (const_rtx x, tree exp, int top_p) |
bbf6f052 RK |
7242 | { |
7243 | rtx exp_rtl = 0; | |
7244 | int i, nops; | |
7245 | ||
6676e72f RK |
7246 | if (x == 0 |
7247 | /* If EXP has varying size, we MUST use a target since we currently | |
8f6562d0 PB |
7248 | have no way of allocating temporaries of variable size |
7249 | (except for arrays that have TYPE_ARRAY_MAX_SIZE set). | |
7250 | So we assume here that something at a higher level has prevented a | |
f4510f37 | 7251 | clash. This is somewhat bogus, but the best we can do. Only |
e5e809f4 | 7252 | do this when X is BLKmode and when we are at the top level. */ |
d0f062fb | 7253 | || (top_p && TREE_TYPE (exp) != 0 && COMPLETE_TYPE_P (TREE_TYPE (exp)) |
f4510f37 | 7254 | && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) != INTEGER_CST |
8f6562d0 PB |
7255 | && (TREE_CODE (TREE_TYPE (exp)) != ARRAY_TYPE |
7256 | || TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp)) == NULL_TREE | |
7257 | || TREE_CODE (TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp))) | |
7258 | != INTEGER_CST) | |
1da68f56 RK |
7259 | && GET_MODE (x) == BLKmode) |
7260 | /* If X is in the outgoing argument area, it is always safe. */ | |
3c0cb5de | 7261 | || (MEM_P (x) |
1da68f56 RK |
7262 | && (XEXP (x, 0) == virtual_outgoing_args_rtx |
7263 | || (GET_CODE (XEXP (x, 0)) == PLUS | |
7264 | && XEXP (XEXP (x, 0), 0) == virtual_outgoing_args_rtx)))) | |
bbf6f052 RK |
7265 | return 1; |
7266 | ||
7267 | /* If this is a subreg of a hard register, declare it unsafe, otherwise, | |
7268 | find the underlying pseudo. */ | |
7269 | if (GET_CODE (x) == SUBREG) | |
7270 | { | |
7271 | x = SUBREG_REG (x); | |
f8cfc6aa | 7272 | if (REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER) |
bbf6f052 RK |
7273 | return 0; |
7274 | } | |
7275 | ||
1da68f56 | 7276 | /* Now look at our tree code and possibly recurse. */ |
bbf6f052 RK |
7277 | switch (TREE_CODE_CLASS (TREE_CODE (exp))) |
7278 | { | |
6615c446 | 7279 | case tcc_declaration: |
a9772b60 | 7280 | exp_rtl = DECL_RTL_IF_SET (exp); |
bbf6f052 RK |
7281 | break; |
7282 | ||
6615c446 | 7283 | case tcc_constant: |
bbf6f052 RK |
7284 | return 1; |
7285 | ||
6615c446 | 7286 | case tcc_exceptional: |
bbf6f052 | 7287 | if (TREE_CODE (exp) == TREE_LIST) |
f8d4be57 CE |
7288 | { |
7289 | while (1) | |
7290 | { | |
7291 | if (TREE_VALUE (exp) && !safe_from_p (x, TREE_VALUE (exp), 0)) | |
7292 | return 0; | |
7293 | exp = TREE_CHAIN (exp); | |
7294 | if (!exp) | |
7295 | return 1; | |
7296 | if (TREE_CODE (exp) != TREE_LIST) | |
7297 | return safe_from_p (x, exp, 0); | |
7298 | } | |
7299 | } | |
33598a1b BS |
7300 | else if (TREE_CODE (exp) == CONSTRUCTOR) |
7301 | { | |
7302 | constructor_elt *ce; | |
7303 | unsigned HOST_WIDE_INT idx; | |
7304 | ||
9771b263 | 7305 | FOR_EACH_VEC_SAFE_ELT (CONSTRUCTOR_ELTS (exp), idx, ce) |
33598a1b BS |
7306 | if ((ce->index != NULL_TREE && !safe_from_p (x, ce->index, 0)) |
7307 | || !safe_from_p (x, ce->value, 0)) | |
7308 | return 0; | |
7309 | return 1; | |
7310 | } | |
ff439b5f CB |
7311 | else if (TREE_CODE (exp) == ERROR_MARK) |
7312 | return 1; /* An already-visited SAVE_EXPR? */ | |
bbf6f052 RK |
7313 | else |
7314 | return 0; | |
7315 | ||
6615c446 | 7316 | case tcc_statement: |
350fae66 RK |
7317 | /* The only case we look at here is the DECL_INITIAL inside a |
7318 | DECL_EXPR. */ | |
7319 | return (TREE_CODE (exp) != DECL_EXPR | |
7320 | || TREE_CODE (DECL_EXPR_DECL (exp)) != VAR_DECL | |
7321 | || !DECL_INITIAL (DECL_EXPR_DECL (exp)) | |
7322 | || safe_from_p (x, DECL_INITIAL (DECL_EXPR_DECL (exp)), 0)); | |
7323 | ||
6615c446 JO |
7324 | case tcc_binary: |
7325 | case tcc_comparison: | |
f8d4be57 CE |
7326 | if (!safe_from_p (x, TREE_OPERAND (exp, 1), 0)) |
7327 | return 0; | |
5d3cc252 | 7328 | /* Fall through. */ |
f8d4be57 | 7329 | |
6615c446 | 7330 | case tcc_unary: |
f8d4be57 | 7331 | return safe_from_p (x, TREE_OPERAND (exp, 0), 0); |
bbf6f052 | 7332 | |
6615c446 JO |
7333 | case tcc_expression: |
7334 | case tcc_reference: | |
5039610b | 7335 | case tcc_vl_exp: |
bbf6f052 RK |
7336 | /* Now do code-specific tests. EXP_RTL is set to any rtx we find in |
7337 | the expression. If it is set, we conflict iff we are that rtx or | |
7338 | both are in memory. Otherwise, we check all operands of the | |
7339 | expression recursively. */ | |
7340 | ||
7341 | switch (TREE_CODE (exp)) | |
7342 | { | |
7343 | case ADDR_EXPR: | |
70072ed9 RK |
7344 | /* If the operand is static or we are static, we can't conflict. |
7345 | Likewise if we don't conflict with the operand at all. */ | |
7346 | if (staticp (TREE_OPERAND (exp, 0)) | |
7347 | || TREE_STATIC (exp) | |
7348 | || safe_from_p (x, TREE_OPERAND (exp, 0), 0)) | |
7349 | return 1; | |
7350 | ||
7351 | /* Otherwise, the only way this can conflict is if we are taking | |
7352 | the address of a DECL a that address if part of X, which is | |
7353 | very rare. */ | |
7354 | exp = TREE_OPERAND (exp, 0); | |
7355 | if (DECL_P (exp)) | |
7356 | { | |
7357 | if (!DECL_RTL_SET_P (exp) | |
3c0cb5de | 7358 | || !MEM_P (DECL_RTL (exp))) |
70072ed9 RK |
7359 | return 0; |
7360 | else | |
7361 | exp_rtl = XEXP (DECL_RTL (exp), 0); | |
7362 | } | |
7363 | break; | |
bbf6f052 | 7364 | |
be1ac4ec | 7365 | case MEM_REF: |
3c0cb5de | 7366 | if (MEM_P (x) |
1da68f56 RK |
7367 | && alias_sets_conflict_p (MEM_ALIAS_SET (x), |
7368 | get_alias_set (exp))) | |
bbf6f052 RK |
7369 | return 0; |
7370 | break; | |
7371 | ||
7372 | case CALL_EXPR: | |
f9808f81 MM |
7373 | /* Assume that the call will clobber all hard registers and |
7374 | all of memory. */ | |
f8cfc6aa | 7375 | if ((REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER) |
3c0cb5de | 7376 | || MEM_P (x)) |
f9808f81 | 7377 | return 0; |
bbf6f052 RK |
7378 | break; |
7379 | ||
bbf6f052 | 7380 | case WITH_CLEANUP_EXPR: |
5dab5552 | 7381 | case CLEANUP_POINT_EXPR: |
ac45df5d | 7382 | /* Lowered by gimplify.c. */ |
5b0264cb | 7383 | gcc_unreachable (); |
ac45df5d | 7384 | |
bbf6f052 | 7385 | case SAVE_EXPR: |
82c82743 | 7386 | return safe_from_p (x, TREE_OPERAND (exp, 0), 0); |
bbf6f052 | 7387 | |
e9a25f70 JL |
7388 | default: |
7389 | break; | |
bbf6f052 RK |
7390 | } |
7391 | ||
7392 | /* If we have an rtx, we do not need to scan our operands. */ | |
7393 | if (exp_rtl) | |
7394 | break; | |
7395 | ||
5039610b | 7396 | nops = TREE_OPERAND_LENGTH (exp); |
bbf6f052 RK |
7397 | for (i = 0; i < nops; i++) |
7398 | if (TREE_OPERAND (exp, i) != 0 | |
e5e809f4 | 7399 | && ! safe_from_p (x, TREE_OPERAND (exp, i), 0)) |
bbf6f052 | 7400 | return 0; |
8f17b5c5 | 7401 | |
6615c446 JO |
7402 | break; |
7403 | ||
7404 | case tcc_type: | |
7405 | /* Should never get a type here. */ | |
7406 | gcc_unreachable (); | |
bbf6f052 RK |
7407 | } |
7408 | ||
7409 | /* If we have an rtl, find any enclosed object. Then see if we conflict | |
7410 | with it. */ | |
7411 | if (exp_rtl) | |
7412 | { | |
7413 | if (GET_CODE (exp_rtl) == SUBREG) | |
7414 | { | |
7415 | exp_rtl = SUBREG_REG (exp_rtl); | |
f8cfc6aa | 7416 | if (REG_P (exp_rtl) |
bbf6f052 RK |
7417 | && REGNO (exp_rtl) < FIRST_PSEUDO_REGISTER) |
7418 | return 0; | |
7419 | } | |
7420 | ||
7421 | /* If the rtl is X, then it is not safe. Otherwise, it is unless both | |
1da68f56 | 7422 | are memory and they conflict. */ |
bbf6f052 | 7423 | return ! (rtx_equal_p (x, exp_rtl) |
3c0cb5de | 7424 | || (MEM_P (x) && MEM_P (exp_rtl) |
53d9622b | 7425 | && true_dependence (exp_rtl, VOIDmode, x))); |
bbf6f052 RK |
7426 | } |
7427 | ||
7428 | /* If we reach here, it is safe. */ | |
7429 | return 1; | |
7430 | } | |
7431 | ||
14a774a9 | 7432 | \f |
0d4903b8 RK |
7433 | /* Return the highest power of two that EXP is known to be a multiple of. |
7434 | This is used in updating alignment of MEMs in array references. */ | |
7435 | ||
86a07404 | 7436 | unsigned HOST_WIDE_INT |
fa233e34 | 7437 | highest_pow2_factor (const_tree exp) |
0d4903b8 | 7438 | { |
eae76e53 JJ |
7439 | unsigned HOST_WIDE_INT ret; |
7440 | int trailing_zeros = tree_ctz (exp); | |
7441 | if (trailing_zeros >= HOST_BITS_PER_WIDE_INT) | |
7442 | return BIGGEST_ALIGNMENT; | |
7443 | ret = (unsigned HOST_WIDE_INT) 1 << trailing_zeros; | |
7444 | if (ret > BIGGEST_ALIGNMENT) | |
7445 | return BIGGEST_ALIGNMENT; | |
7446 | return ret; | |
0d4903b8 | 7447 | } |
818c0c94 | 7448 | |
d50a16c4 EB |
7449 | /* Similar, except that the alignment requirements of TARGET are |
7450 | taken into account. Assume it is at least as aligned as its | |
7451 | type, unless it is a COMPONENT_REF in which case the layout of | |
7452 | the structure gives the alignment. */ | |
818c0c94 | 7453 | |
9ceca302 | 7454 | static unsigned HOST_WIDE_INT |
fa233e34 | 7455 | highest_pow2_factor_for_target (const_tree target, const_tree exp) |
818c0c94 | 7456 | { |
ceadb728 OH |
7457 | unsigned HOST_WIDE_INT talign = target_align (target) / BITS_PER_UNIT; |
7458 | unsigned HOST_WIDE_INT factor = highest_pow2_factor (exp); | |
b8698a0f | 7459 | |
ceadb728 | 7460 | return MAX (factor, talign); |
818c0c94 | 7461 | } |
0d4903b8 | 7462 | \f |
18c56439 | 7463 | #ifdef HAVE_conditional_move |
073a8998 | 7464 | /* Convert the tree comparison code TCODE to the rtl one where the |
683c600b AP |
7465 | signedness is UNSIGNEDP. */ |
7466 | ||
7467 | static enum rtx_code | |
7468 | convert_tree_comp_to_rtx (enum tree_code tcode, int unsignedp) | |
7469 | { | |
7470 | enum rtx_code code; | |
7471 | switch (tcode) | |
7472 | { | |
7473 | case EQ_EXPR: | |
7474 | code = EQ; | |
7475 | break; | |
7476 | case NE_EXPR: | |
7477 | code = NE; | |
7478 | break; | |
7479 | case LT_EXPR: | |
7480 | code = unsignedp ? LTU : LT; | |
7481 | break; | |
7482 | case LE_EXPR: | |
7483 | code = unsignedp ? LEU : LE; | |
7484 | break; | |
7485 | case GT_EXPR: | |
7486 | code = unsignedp ? GTU : GT; | |
7487 | break; | |
7488 | case GE_EXPR: | |
7489 | code = unsignedp ? GEU : GE; | |
7490 | break; | |
7491 | case UNORDERED_EXPR: | |
7492 | code = UNORDERED; | |
7493 | break; | |
7494 | case ORDERED_EXPR: | |
7495 | code = ORDERED; | |
7496 | break; | |
7497 | case UNLT_EXPR: | |
7498 | code = UNLT; | |
7499 | break; | |
7500 | case UNLE_EXPR: | |
7501 | code = UNLE; | |
7502 | break; | |
7503 | case UNGT_EXPR: | |
7504 | code = UNGT; | |
7505 | break; | |
7506 | case UNGE_EXPR: | |
7507 | code = UNGE; | |
7508 | break; | |
7509 | case UNEQ_EXPR: | |
7510 | code = UNEQ; | |
7511 | break; | |
7512 | case LTGT_EXPR: | |
7513 | code = LTGT; | |
7514 | break; | |
7515 | ||
7516 | default: | |
7517 | gcc_unreachable (); | |
7518 | } | |
7519 | return code; | |
7520 | } | |
18c56439 | 7521 | #endif |
683c600b | 7522 | |
eb698c58 RS |
7523 | /* Subroutine of expand_expr. Expand the two operands of a binary |
7524 | expression EXP0 and EXP1 placing the results in OP0 and OP1. | |
7525 | The value may be stored in TARGET if TARGET is nonzero. The | |
7526 | MODIFIER argument is as documented by expand_expr. */ | |
7527 | ||
7528 | static void | |
7529 | expand_operands (tree exp0, tree exp1, rtx target, rtx *op0, rtx *op1, | |
7530 | enum expand_modifier modifier) | |
7531 | { | |
7532 | if (! safe_from_p (target, exp1, 1)) | |
7533 | target = 0; | |
7534 | if (operand_equal_p (exp0, exp1, 0)) | |
7535 | { | |
7536 | *op0 = expand_expr (exp0, target, VOIDmode, modifier); | |
7537 | *op1 = copy_rtx (*op0); | |
7538 | } | |
7539 | else | |
7540 | { | |
c67e6e14 RS |
7541 | /* If we need to preserve evaluation order, copy exp0 into its own |
7542 | temporary variable so that it can't be clobbered by exp1. */ | |
7543 | if (flag_evaluation_order && TREE_SIDE_EFFECTS (exp1)) | |
7544 | exp0 = save_expr (exp0); | |
eb698c58 RS |
7545 | *op0 = expand_expr (exp0, target, VOIDmode, modifier); |
7546 | *op1 = expand_expr (exp1, NULL_RTX, VOIDmode, modifier); | |
7547 | } | |
7548 | } | |
7549 | ||
f47e9b4e | 7550 | \f |
c0220ea4 | 7551 | /* Return a MEM that contains constant EXP. DEFER is as for |
aacd3885 RS |
7552 | output_constant_def and MODIFIER is as for expand_expr. */ |
7553 | ||
7554 | static rtx | |
7555 | expand_expr_constant (tree exp, int defer, enum expand_modifier modifier) | |
7556 | { | |
7557 | rtx mem; | |
7558 | ||
7559 | mem = output_constant_def (exp, defer); | |
7560 | if (modifier != EXPAND_INITIALIZER) | |
7561 | mem = use_anchored_address (mem); | |
7562 | return mem; | |
7563 | } | |
7564 | ||
70bb498a | 7565 | /* A subroutine of expand_expr_addr_expr. Evaluate the address of EXP. |
6377bb9a RH |
7566 | The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */ |
7567 | ||
7568 | static rtx | |
70bb498a | 7569 | expand_expr_addr_expr_1 (tree exp, rtx target, enum machine_mode tmode, |
d4ebfa65 | 7570 | enum expand_modifier modifier, addr_space_t as) |
6377bb9a RH |
7571 | { |
7572 | rtx result, subtarget; | |
7573 | tree inner, offset; | |
7574 | HOST_WIDE_INT bitsize, bitpos; | |
7575 | int volatilep, unsignedp; | |
7576 | enum machine_mode mode1; | |
7577 | ||
7578 | /* If we are taking the address of a constant and are at the top level, | |
7579 | we have to use output_constant_def since we can't call force_const_mem | |
7580 | at top level. */ | |
7581 | /* ??? This should be considered a front-end bug. We should not be | |
7582 | generating ADDR_EXPR of something that isn't an LVALUE. The only | |
7583 | exception here is STRING_CST. */ | |
16089886 | 7584 | if (CONSTANT_CLASS_P (exp)) |
b1b95093 JJ |
7585 | { |
7586 | result = XEXP (expand_expr_constant (exp, 0, modifier), 0); | |
7587 | if (modifier < EXPAND_SUM) | |
7588 | result = force_operand (result, target); | |
7589 | return result; | |
7590 | } | |
6377bb9a RH |
7591 | |
7592 | /* Everything must be something allowed by is_gimple_addressable. */ | |
7593 | switch (TREE_CODE (exp)) | |
7594 | { | |
7595 | case INDIRECT_REF: | |
7596 | /* This case will happen via recursion for &a->b. */ | |
aacd3885 | 7597 | return expand_expr (TREE_OPERAND (exp, 0), target, tmode, modifier); |
6377bb9a | 7598 | |
70f34814 RG |
7599 | case MEM_REF: |
7600 | { | |
7601 | tree tem = TREE_OPERAND (exp, 0); | |
7602 | if (!integer_zerop (TREE_OPERAND (exp, 1))) | |
0d82a1c8 | 7603 | tem = fold_build_pointer_plus (tem, TREE_OPERAND (exp, 1)); |
70f34814 RG |
7604 | return expand_expr (tem, target, tmode, modifier); |
7605 | } | |
7606 | ||
6377bb9a | 7607 | case CONST_DECL: |
ffab1d07 | 7608 | /* Expand the initializer like constants above. */ |
b1b95093 JJ |
7609 | result = XEXP (expand_expr_constant (DECL_INITIAL (exp), |
7610 | 0, modifier), 0); | |
7611 | if (modifier < EXPAND_SUM) | |
7612 | result = force_operand (result, target); | |
7613 | return result; | |
6377bb9a RH |
7614 | |
7615 | case REALPART_EXPR: | |
7616 | /* The real part of the complex number is always first, therefore | |
7617 | the address is the same as the address of the parent object. */ | |
7618 | offset = 0; | |
7619 | bitpos = 0; | |
7620 | inner = TREE_OPERAND (exp, 0); | |
7621 | break; | |
7622 | ||
7623 | case IMAGPART_EXPR: | |
7624 | /* The imaginary part of the complex number is always second. | |
2a7e31df | 7625 | The expression is therefore always offset by the size of the |
6377bb9a RH |
7626 | scalar type. */ |
7627 | offset = 0; | |
7628 | bitpos = GET_MODE_BITSIZE (TYPE_MODE (TREE_TYPE (exp))); | |
7629 | inner = TREE_OPERAND (exp, 0); | |
7630 | break; | |
7631 | ||
43303d6f JJ |
7632 | case COMPOUND_LITERAL_EXPR: |
7633 | /* Allow COMPOUND_LITERAL_EXPR in initializers, if e.g. | |
7634 | rtl_for_decl_init is called on DECL_INITIAL with | |
7635 | COMPOUNT_LITERAL_EXPRs in it, they aren't gimplified. */ | |
7636 | if (modifier == EXPAND_INITIALIZER | |
7637 | && COMPOUND_LITERAL_EXPR_DECL (exp)) | |
7638 | return expand_expr_addr_expr_1 (COMPOUND_LITERAL_EXPR_DECL (exp), | |
7639 | target, tmode, modifier, as); | |
7640 | /* FALLTHRU */ | |
6377bb9a RH |
7641 | default: |
7642 | /* If the object is a DECL, then expand it for its rtl. Don't bypass | |
7643 | expand_expr, as that can have various side effects; LABEL_DECLs for | |
16089886 RS |
7644 | example, may not have their DECL_RTL set yet. Expand the rtl of |
7645 | CONSTRUCTORs too, which should yield a memory reference for the | |
7646 | constructor's contents. Assume language specific tree nodes can | |
7647 | be expanded in some interesting way. */ | |
2ec5deb5 | 7648 | gcc_assert (TREE_CODE (exp) < LAST_AND_UNUSED_TREE_CODE); |
6377bb9a | 7649 | if (DECL_P (exp) |
16089886 | 7650 | || TREE_CODE (exp) == CONSTRUCTOR |
2ec5deb5 | 7651 | || TREE_CODE (exp) == COMPOUND_LITERAL_EXPR) |
6377bb9a RH |
7652 | { |
7653 | result = expand_expr (exp, target, tmode, | |
7654 | modifier == EXPAND_INITIALIZER | |
7655 | ? EXPAND_INITIALIZER : EXPAND_CONST_ADDRESS); | |
7656 | ||
7657 | /* If the DECL isn't in memory, then the DECL wasn't properly | |
7658 | marked TREE_ADDRESSABLE, which will be either a front-end | |
7659 | or a tree optimizer bug. */ | |
69135c94 DD |
7660 | |
7661 | if (TREE_ADDRESSABLE (exp) | |
7662 | && ! MEM_P (result) | |
c3284718 | 7663 | && ! targetm.calls.allocate_stack_slots_for_args ()) |
69135c94 DD |
7664 | { |
7665 | error ("local frame unavailable (naked function?)"); | |
7666 | return result; | |
7667 | } | |
7668 | else | |
7669 | gcc_assert (MEM_P (result)); | |
6377bb9a RH |
7670 | result = XEXP (result, 0); |
7671 | ||
7672 | /* ??? Is this needed anymore? */ | |
bbee5843 SB |
7673 | if (DECL_P (exp)) |
7674 | TREE_USED (exp) = 1; | |
6377bb9a RH |
7675 | |
7676 | if (modifier != EXPAND_INITIALIZER | |
825298c4 JJ |
7677 | && modifier != EXPAND_CONST_ADDRESS |
7678 | && modifier != EXPAND_SUM) | |
6377bb9a RH |
7679 | result = force_operand (result, target); |
7680 | return result; | |
7681 | } | |
7682 | ||
2614034e EB |
7683 | /* Pass FALSE as the last argument to get_inner_reference although |
7684 | we are expanding to RTL. The rationale is that we know how to | |
7685 | handle "aligning nodes" here: we can just bypass them because | |
7686 | they won't change the final object whose address will be returned | |
7687 | (they actually exist only for that purpose). */ | |
6377bb9a | 7688 | inner = get_inner_reference (exp, &bitsize, &bitpos, &offset, |
b3ecff82 | 7689 | &mode1, &unsignedp, &volatilep, false); |
6377bb9a RH |
7690 | break; |
7691 | } | |
7692 | ||
7693 | /* We must have made progress. */ | |
5b0264cb | 7694 | gcc_assert (inner != exp); |
6377bb9a RH |
7695 | |
7696 | subtarget = offset || bitpos ? NULL_RTX : target; | |
8ebec1a5 JJ |
7697 | /* For VIEW_CONVERT_EXPR, where the outer alignment is bigger than |
7698 | inner alignment, force the inner to be sufficiently aligned. */ | |
7699 | if (CONSTANT_CLASS_P (inner) | |
7700 | && TYPE_ALIGN (TREE_TYPE (inner)) < TYPE_ALIGN (TREE_TYPE (exp))) | |
7701 | { | |
7702 | inner = copy_node (inner); | |
7703 | TREE_TYPE (inner) = copy_node (TREE_TYPE (inner)); | |
7704 | TYPE_ALIGN (TREE_TYPE (inner)) = TYPE_ALIGN (TREE_TYPE (exp)); | |
7705 | TYPE_USER_ALIGN (TREE_TYPE (inner)) = 1; | |
7706 | } | |
d4ebfa65 | 7707 | result = expand_expr_addr_expr_1 (inner, subtarget, tmode, modifier, as); |
6377bb9a | 7708 | |
6377bb9a RH |
7709 | if (offset) |
7710 | { | |
7711 | rtx tmp; | |
7712 | ||
7713 | if (modifier != EXPAND_NORMAL) | |
7714 | result = force_operand (result, NULL); | |
b8698a0f | 7715 | tmp = expand_expr (offset, NULL_RTX, tmode, |
4543943a AP |
7716 | modifier == EXPAND_INITIALIZER |
7717 | ? EXPAND_INITIALIZER : EXPAND_NORMAL); | |
6377bb9a | 7718 | |
cddddfff JL |
7719 | /* expand_expr is allowed to return an object in a mode other |
7720 | than TMODE. If it did, we need to convert. */ | |
7721 | if (GET_MODE (tmp) != VOIDmode && tmode != GET_MODE (tmp)) | |
7722 | tmp = convert_modes (tmode, GET_MODE (tmp), | |
7723 | tmp, TYPE_UNSIGNED (TREE_TYPE (offset))); | |
d4ebfa65 BE |
7724 | result = convert_memory_address_addr_space (tmode, result, as); |
7725 | tmp = convert_memory_address_addr_space (tmode, tmp, as); | |
b0b324b0 | 7726 | |
d047a201 | 7727 | if (modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER) |
419e1853 | 7728 | result = simplify_gen_binary (PLUS, tmode, result, tmp); |
6377bb9a RH |
7729 | else |
7730 | { | |
7731 | subtarget = bitpos ? NULL_RTX : target; | |
7732 | result = expand_simple_binop (tmode, PLUS, result, tmp, subtarget, | |
7733 | 1, OPTAB_LIB_WIDEN); | |
7734 | } | |
7735 | } | |
7736 | ||
7737 | if (bitpos) | |
7738 | { | |
7739 | /* Someone beforehand should have rejected taking the address | |
7740 | of such an object. */ | |
b0b324b0 | 7741 | gcc_assert ((bitpos % BITS_PER_UNIT) == 0); |
6377bb9a | 7742 | |
b7104c55 | 7743 | result = convert_memory_address_addr_space (tmode, result, as); |
0a81f074 | 7744 | result = plus_constant (tmode, result, bitpos / BITS_PER_UNIT); |
6377bb9a RH |
7745 | if (modifier < EXPAND_SUM) |
7746 | result = force_operand (result, target); | |
7747 | } | |
7748 | ||
7749 | return result; | |
7750 | } | |
7751 | ||
70bb498a RH |
7752 | /* A subroutine of expand_expr. Evaluate EXP, which is an ADDR_EXPR. |
7753 | The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */ | |
7754 | ||
7755 | static rtx | |
7756 | expand_expr_addr_expr (tree exp, rtx target, enum machine_mode tmode, | |
7757 | enum expand_modifier modifier) | |
7758 | { | |
d4ebfa65 BE |
7759 | addr_space_t as = ADDR_SPACE_GENERIC; |
7760 | enum machine_mode address_mode = Pmode; | |
7761 | enum machine_mode pointer_mode = ptr_mode; | |
70bb498a RH |
7762 | enum machine_mode rmode; |
7763 | rtx result; | |
7764 | ||
b0b324b0 RH |
7765 | /* Target mode of VOIDmode says "whatever's natural". */ |
7766 | if (tmode == VOIDmode) | |
7767 | tmode = TYPE_MODE (TREE_TYPE (exp)); | |
7768 | ||
d4ebfa65 BE |
7769 | if (POINTER_TYPE_P (TREE_TYPE (exp))) |
7770 | { | |
7771 | as = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (exp))); | |
7772 | address_mode = targetm.addr_space.address_mode (as); | |
7773 | pointer_mode = targetm.addr_space.pointer_mode (as); | |
7774 | } | |
7775 | ||
b0b324b0 RH |
7776 | /* We can get called with some Weird Things if the user does silliness |
7777 | like "(short) &a". In that case, convert_memory_address won't do | |
7778 | the right thing, so ignore the given target mode. */ | |
d4ebfa65 BE |
7779 | if (tmode != address_mode && tmode != pointer_mode) |
7780 | tmode = address_mode; | |
b0b324b0 | 7781 | |
70bb498a | 7782 | result = expand_expr_addr_expr_1 (TREE_OPERAND (exp, 0), target, |
d4ebfa65 | 7783 | tmode, modifier, as); |
70bb498a RH |
7784 | |
7785 | /* Despite expand_expr claims concerning ignoring TMODE when not | |
b0b324b0 RH |
7786 | strictly convenient, stuff breaks if we don't honor it. Note |
7787 | that combined with the above, we only do this for pointer modes. */ | |
70bb498a RH |
7788 | rmode = GET_MODE (result); |
7789 | if (rmode == VOIDmode) | |
7790 | rmode = tmode; | |
7791 | if (rmode != tmode) | |
d4ebfa65 | 7792 | result = convert_memory_address_addr_space (tmode, result, as); |
b0b324b0 | 7793 | |
70bb498a RH |
7794 | return result; |
7795 | } | |
7796 | ||
32eed045 JJ |
7797 | /* Generate code for computing CONSTRUCTOR EXP. |
7798 | An rtx for the computed value is returned. If AVOID_TEMP_MEM | |
7799 | is TRUE, instead of creating a temporary variable in memory | |
7800 | NULL is returned and the caller needs to handle it differently. */ | |
7801 | ||
7802 | static rtx | |
7803 | expand_constructor (tree exp, rtx target, enum expand_modifier modifier, | |
7804 | bool avoid_temp_mem) | |
7805 | { | |
7806 | tree type = TREE_TYPE (exp); | |
7807 | enum machine_mode mode = TYPE_MODE (type); | |
7808 | ||
7809 | /* Try to avoid creating a temporary at all. This is possible | |
7810 | if all of the initializer is zero. | |
7811 | FIXME: try to handle all [0..255] initializers we can handle | |
7812 | with memset. */ | |
7813 | if (TREE_STATIC (exp) | |
7814 | && !TREE_ADDRESSABLE (exp) | |
7815 | && target != 0 && mode == BLKmode | |
7816 | && all_zeros_p (exp)) | |
7817 | { | |
7818 | clear_storage (target, expr_size (exp), BLOCK_OP_NORMAL); | |
7819 | return target; | |
7820 | } | |
7821 | ||
7822 | /* All elts simple constants => refer to a constant in memory. But | |
7823 | if this is a non-BLKmode mode, let it store a field at a time | |
807e902e KZ |
7824 | since that should make a CONST_INT, CONST_WIDE_INT or |
7825 | CONST_DOUBLE when we fold. Likewise, if we have a target we can | |
7826 | use, it is best to store directly into the target unless the type | |
7827 | is large enough that memcpy will be used. If we are making an | |
7828 | initializer and all operands are constant, put it in memory as | |
7829 | well. | |
32eed045 JJ |
7830 | |
7831 | FIXME: Avoid trying to fill vector constructors piece-meal. | |
7832 | Output them with output_constant_def below unless we're sure | |
7833 | they're zeros. This should go away when vector initializers | |
7834 | are treated like VECTOR_CST instead of arrays. */ | |
7835 | if ((TREE_STATIC (exp) | |
7836 | && ((mode == BLKmode | |
7837 | && ! (target != 0 && safe_from_p (target, exp, 1))) | |
7838 | || TREE_ADDRESSABLE (exp) | |
cc269bb6 | 7839 | || (tree_fits_uhwi_p (TYPE_SIZE_UNIT (type)) |
32eed045 | 7840 | && (! MOVE_BY_PIECES_P |
ae7e9ddd | 7841 | (tree_to_uhwi (TYPE_SIZE_UNIT (type)), |
32eed045 JJ |
7842 | TYPE_ALIGN (type))) |
7843 | && ! mostly_zeros_p (exp)))) | |
7844 | || ((modifier == EXPAND_INITIALIZER || modifier == EXPAND_CONST_ADDRESS) | |
7845 | && TREE_CONSTANT (exp))) | |
7846 | { | |
7847 | rtx constructor; | |
7848 | ||
7849 | if (avoid_temp_mem) | |
7850 | return NULL_RTX; | |
7851 | ||
7852 | constructor = expand_expr_constant (exp, 1, modifier); | |
7853 | ||
7854 | if (modifier != EXPAND_CONST_ADDRESS | |
7855 | && modifier != EXPAND_INITIALIZER | |
7856 | && modifier != EXPAND_SUM) | |
7857 | constructor = validize_mem (constructor); | |
7858 | ||
7859 | return constructor; | |
7860 | } | |
7861 | ||
7862 | /* Handle calls that pass values in multiple non-contiguous | |
7863 | locations. The Irix 6 ABI has examples of this. */ | |
7864 | if (target == 0 || ! safe_from_p (target, exp, 1) | |
7865 | || GET_CODE (target) == PARALLEL || modifier == EXPAND_STACK_PARM) | |
7866 | { | |
7867 | if (avoid_temp_mem) | |
7868 | return NULL_RTX; | |
7869 | ||
9ee5337d | 7870 | target = assign_temp (type, TREE_ADDRESSABLE (exp), 1); |
32eed045 JJ |
7871 | } |
7872 | ||
7873 | store_constructor (exp, target, 0, int_expr_size (exp)); | |
7874 | return target; | |
7875 | } | |
7876 | ||
70bb498a | 7877 | |
bbf6f052 RK |
7878 | /* expand_expr: generate code for computing expression EXP. |
7879 | An rtx for the computed value is returned. The value is never null. | |
7880 | In the case of a void EXP, const0_rtx is returned. | |
7881 | ||
7882 | The value may be stored in TARGET if TARGET is nonzero. | |
7883 | TARGET is just a suggestion; callers must assume that | |
7884 | the rtx returned may not be the same as TARGET. | |
7885 | ||
7886 | If TARGET is CONST0_RTX, it means that the value will be ignored. | |
7887 | ||
7888 | If TMODE is not VOIDmode, it suggests generating the | |
7889 | result in mode TMODE. But this is done only when convenient. | |
7890 | Otherwise, TMODE is ignored and the value generated in its natural mode. | |
7891 | TMODE is just a suggestion; callers must assume that | |
7892 | the rtx returned may not have mode TMODE. | |
7893 | ||
d6a5ac33 RK |
7894 | Note that TARGET may have neither TMODE nor MODE. In that case, it |
7895 | probably will not be used. | |
bbf6f052 RK |
7896 | |
7897 | If MODIFIER is EXPAND_SUM then when EXP is an addition | |
7898 | we can return an rtx of the form (MULT (REG ...) (CONST_INT ...)) | |
7899 | or a nest of (PLUS ...) and (MINUS ...) where the terms are | |
7900 | products as above, or REG or MEM, or constant. | |
7901 | Ordinarily in such cases we would output mul or add instructions | |
7902 | and then return a pseudo reg containing the sum. | |
7903 | ||
7904 | EXPAND_INITIALIZER is much like EXPAND_SUM except that | |
7905 | it also marks a label as absolutely required (it can't be dead). | |
26fcb35a | 7906 | It also makes a ZERO_EXTEND or SIGN_EXTEND instead of emitting extend insns. |
d6a5ac33 RK |
7907 | This is used for outputting expressions used in initializers. |
7908 | ||
7909 | EXPAND_CONST_ADDRESS says that it is okay to return a MEM | |
7910 | with a constant address even if that address is not normally legitimate. | |
8403445a AM |
7911 | EXPAND_INITIALIZER and EXPAND_SUM also have this effect. |
7912 | ||
7913 | EXPAND_STACK_PARM is used when expanding to a TARGET on the stack for | |
7914 | a call parameter. Such targets require special care as we haven't yet | |
7915 | marked TARGET so that it's safe from being trashed by libcalls. We | |
7916 | don't want to use TARGET for anything but the final result; | |
7917 | Intermediate values must go elsewhere. Additionally, calls to | |
caf93cb0 | 7918 | emit_block_move will be flagged with BLOCK_OP_CALL_PARM. |
0fab64a3 MM |
7919 | |
7920 | If EXP is a VAR_DECL whose DECL_RTL was a MEM with an invalid | |
7921 | address, and ALT_RTL is non-NULL, then *ALT_RTL is set to the | |
7922 | DECL_RTL of the VAR_DECL. *ALT_RTL is also set if EXP is a | |
7923 | COMPOUND_EXPR whose second argument is such a VAR_DECL, and so on | |
4c437f02 BE |
7924 | recursively. |
7925 | ||
7926 | If INNER_REFERENCE_P is true, we are expanding an inner reference. | |
7927 | In this case, we don't adjust a returned MEM rtx that wouldn't be | |
7928 | sufficiently aligned for its mode; instead, it's up to the caller | |
7929 | to deal with it afterwards. This is used to make sure that unaligned | |
7930 | base objects for which out-of-bounds accesses are supported, for | |
7931 | example record types with trailing arrays, aren't realigned behind | |
7932 | the back of the caller. | |
7933 | The normal operating mode is to pass FALSE for this parameter. */ | |
bbf6f052 RK |
7934 | |
7935 | rtx | |
0fab64a3 | 7936 | expand_expr_real (tree exp, rtx target, enum machine_mode tmode, |
4c437f02 BE |
7937 | enum expand_modifier modifier, rtx *alt_rtl, |
7938 | bool inner_reference_p) | |
6de9cd9a | 7939 | { |
a5883ba0 | 7940 | rtx ret; |
6de9cd9a DN |
7941 | |
7942 | /* Handle ERROR_MARK before anybody tries to access its type. */ | |
7943 | if (TREE_CODE (exp) == ERROR_MARK | |
726a989a | 7944 | || (TREE_CODE (TREE_TYPE (exp)) == ERROR_MARK)) |
6de9cd9a DN |
7945 | { |
7946 | ret = CONST0_RTX (tmode); | |
7947 | return ret ? ret : const0_rtx; | |
7948 | } | |
7949 | ||
4c437f02 BE |
7950 | ret = expand_expr_real_1 (exp, target, tmode, modifier, alt_rtl, |
7951 | inner_reference_p); | |
6de9cd9a DN |
7952 | return ret; |
7953 | } | |
7954 | ||
683c600b AP |
7955 | /* Try to expand the conditional expression which is represented by |
7956 | TREEOP0 ? TREEOP1 : TREEOP2 using conditonal moves. If succeseds | |
7957 | return the rtl reg which repsents the result. Otherwise return | |
7958 | NULL_RTL. */ | |
7959 | ||
7960 | static rtx | |
7961 | expand_cond_expr_using_cmove (tree treeop0 ATTRIBUTE_UNUSED, | |
7962 | tree treeop1 ATTRIBUTE_UNUSED, | |
7963 | tree treeop2 ATTRIBUTE_UNUSED) | |
7964 | { | |
7965 | #ifdef HAVE_conditional_move | |
7966 | rtx insn; | |
7967 | rtx op00, op01, op1, op2; | |
7968 | enum rtx_code comparison_code; | |
7969 | enum machine_mode comparison_mode; | |
7970 | gimple srcstmt; | |
7971 | rtx temp; | |
7972 | tree type = TREE_TYPE (treeop1); | |
7973 | int unsignedp = TYPE_UNSIGNED (type); | |
7974 | enum machine_mode mode = TYPE_MODE (type); | |
a72d8780 | 7975 | enum machine_mode orig_mode = mode; |
683c600b | 7976 | |
683c600b AP |
7977 | /* If we cannot do a conditional move on the mode, try doing it |
7978 | with the promoted mode. */ | |
7979 | if (!can_conditionally_move_p (mode)) | |
59bdc31c SE |
7980 | { |
7981 | mode = promote_mode (type, mode, &unsignedp); | |
7982 | if (!can_conditionally_move_p (mode)) | |
7983 | return NULL_RTX; | |
7984 | temp = assign_temp (type, 0, 0); /* Use promoted mode for temp. */ | |
7985 | } | |
7986 | else | |
7987 | temp = assign_temp (type, 0, 1); | |
683c600b AP |
7988 | |
7989 | start_sequence (); | |
7990 | expand_operands (treeop1, treeop2, | |
7991 | temp, &op1, &op2, EXPAND_NORMAL); | |
7992 | ||
7993 | if (TREE_CODE (treeop0) == SSA_NAME | |
7994 | && (srcstmt = get_def_for_expr_class (treeop0, tcc_comparison))) | |
7995 | { | |
7996 | tree type = TREE_TYPE (gimple_assign_rhs1 (srcstmt)); | |
7997 | enum tree_code cmpcode = gimple_assign_rhs_code (srcstmt); | |
7998 | op00 = expand_normal (gimple_assign_rhs1 (srcstmt)); | |
7999 | op01 = expand_normal (gimple_assign_rhs2 (srcstmt)); | |
8000 | comparison_mode = TYPE_MODE (type); | |
8001 | unsignedp = TYPE_UNSIGNED (type); | |
8002 | comparison_code = convert_tree_comp_to_rtx (cmpcode, unsignedp); | |
8003 | } | |
8004 | else if (TREE_CODE_CLASS (TREE_CODE (treeop0)) == tcc_comparison) | |
8005 | { | |
8006 | tree type = TREE_TYPE (TREE_OPERAND (treeop0, 0)); | |
8007 | enum tree_code cmpcode = TREE_CODE (treeop0); | |
8008 | op00 = expand_normal (TREE_OPERAND (treeop0, 0)); | |
8009 | op01 = expand_normal (TREE_OPERAND (treeop0, 1)); | |
8010 | unsignedp = TYPE_UNSIGNED (type); | |
8011 | comparison_mode = TYPE_MODE (type); | |
8012 | comparison_code = convert_tree_comp_to_rtx (cmpcode, unsignedp); | |
8013 | } | |
8014 | else | |
8015 | { | |
8016 | op00 = expand_normal (treeop0); | |
8017 | op01 = const0_rtx; | |
8018 | comparison_code = NE; | |
8019 | comparison_mode = TYPE_MODE (TREE_TYPE (treeop0)); | |
8020 | } | |
8021 | ||
8022 | if (GET_MODE (op1) != mode) | |
8023 | op1 = gen_lowpart (mode, op1); | |
8024 | ||
8025 | if (GET_MODE (op2) != mode) | |
8026 | op2 = gen_lowpart (mode, op2); | |
8027 | ||
8028 | /* Try to emit the conditional move. */ | |
8029 | insn = emit_conditional_move (temp, comparison_code, | |
8030 | op00, op01, comparison_mode, | |
8031 | op1, op2, mode, | |
8032 | unsignedp); | |
8033 | ||
8034 | /* If we could do the conditional move, emit the sequence, | |
8035 | and return. */ | |
8036 | if (insn) | |
8037 | { | |
770affca | 8038 | rtx_insn *seq = get_insns (); |
683c600b AP |
8039 | end_sequence (); |
8040 | emit_insn (seq); | |
a72d8780 | 8041 | return convert_modes (orig_mode, mode, temp, 0); |
683c600b AP |
8042 | } |
8043 | ||
8044 | /* Otherwise discard the sequence and fall back to code with | |
8045 | branches. */ | |
8046 | end_sequence (); | |
8047 | #endif | |
8048 | return NULL_RTX; | |
8049 | } | |
8050 | ||
28ed065e | 8051 | rtx |
f994f296 MM |
8052 | expand_expr_real_2 (sepops ops, rtx target, enum machine_mode tmode, |
8053 | enum expand_modifier modifier) | |
bbf6f052 | 8054 | { |
f994f296 | 8055 | rtx op0, op1, op2, temp; |
07beea0d | 8056 | tree type; |
8df83eae | 8057 | int unsignedp; |
b3694847 | 8058 | enum machine_mode mode; |
f994f296 | 8059 | enum tree_code code = ops->code; |
bbf6f052 | 8060 | optab this_optab; |
68557e14 ML |
8061 | rtx subtarget, original_target; |
8062 | int ignore; | |
ac5dc795 | 8063 | bool reduce_bit_field; |
f994f296 | 8064 | location_t loc = ops->location; |
16949072 | 8065 | tree treeop0, treeop1, treeop2; |
ac5dc795 | 8066 | #define REDUCE_BIT_FIELD(expr) (reduce_bit_field \ |
bc15d0ef JM |
8067 | ? reduce_to_bit_field_precision ((expr), \ |
8068 | target, \ | |
8069 | type) \ | |
8070 | : (expr)) | |
bbf6f052 | 8071 | |
f994f296 | 8072 | type = ops->type; |
726a989a RB |
8073 | mode = TYPE_MODE (type); |
8074 | unsignedp = TYPE_UNSIGNED (type); | |
8df83eae | 8075 | |
f994f296 MM |
8076 | treeop0 = ops->op0; |
8077 | treeop1 = ops->op1; | |
16949072 | 8078 | treeop2 = ops->op2; |
f994f296 MM |
8079 | |
8080 | /* We should be called only on simple (binary or unary) expressions, | |
8081 | exactly those that are valid in gimple expressions that aren't | |
8082 | GIMPLE_SINGLE_RHS (or invalid). */ | |
8083 | gcc_assert (get_gimple_rhs_class (code) == GIMPLE_UNARY_RHS | |
0354c0c7 BS |
8084 | || get_gimple_rhs_class (code) == GIMPLE_BINARY_RHS |
8085 | || get_gimple_rhs_class (code) == GIMPLE_TERNARY_RHS); | |
b32e7cdb | 8086 | |
68557e14 | 8087 | ignore = (target == const0_rtx |
1a87cf0c | 8088 | || ((CONVERT_EXPR_CODE_P (code) |
a134e5f3 | 8089 | || code == COND_EXPR || code == VIEW_CONVERT_EXPR) |
68557e14 ML |
8090 | && TREE_CODE (type) == VOID_TYPE)); |
8091 | ||
f994f296 MM |
8092 | /* We should be called only if we need the result. */ |
8093 | gcc_assert (!ignore); | |
8094 | ||
ac5dc795 PB |
8095 | /* An operation in what may be a bit-field type needs the |
8096 | result to be reduced to the precision of the bit-field type, | |
8097 | which is narrower than that of the type's mode. */ | |
a577c405 | 8098 | reduce_bit_field = (INTEGRAL_TYPE_P (type) |
ac5dc795 PB |
8099 | && GET_MODE_PRECISION (mode) > TYPE_PRECISION (type)); |
8100 | ||
ac5dc795 PB |
8101 | if (reduce_bit_field && modifier == EXPAND_STACK_PARM) |
8102 | target = 0; | |
8103 | ||
8104 | /* Use subtarget as the target for operand 0 of a binary operation. */ | |
8105 | subtarget = get_subtarget (target); | |
8106 | original_target = target; | |
bbf6f052 | 8107 | |
bbf6f052 RK |
8108 | switch (code) |
8109 | { | |
1d65f45c | 8110 | case NON_LVALUE_EXPR: |
f994f296 MM |
8111 | case PAREN_EXPR: |
8112 | CASE_CONVERT: | |
8113 | if (treeop0 == error_mark_node) | |
8114 | return const0_rtx; | |
6de9cd9a | 8115 | |
f994f296 MM |
8116 | if (TREE_CODE (type) == UNION_TYPE) |
8117 | { | |
8118 | tree valtype = TREE_TYPE (treeop0); | |
6de9cd9a | 8119 | |
f994f296 MM |
8120 | /* If both input and output are BLKmode, this conversion isn't doing |
8121 | anything except possibly changing memory attribute. */ | |
8122 | if (mode == BLKmode && TYPE_MODE (valtype) == BLKmode) | |
8123 | { | |
8124 | rtx result = expand_expr (treeop0, target, tmode, | |
8125 | modifier); | |
bbf6f052 | 8126 | |
f994f296 MM |
8127 | result = copy_rtx (result); |
8128 | set_mem_attributes (result, type, 0); | |
8129 | return result; | |
8130 | } | |
8b11a64c | 8131 | |
f994f296 MM |
8132 | if (target == 0) |
8133 | { | |
8134 | if (TYPE_MODE (type) != BLKmode) | |
8135 | target = gen_reg_rtx (TYPE_MODE (type)); | |
8136 | else | |
9474e8ab | 8137 | target = assign_temp (type, 1, 1); |
f994f296 | 8138 | } |
921b3427 | 8139 | |
f994f296 MM |
8140 | if (MEM_P (target)) |
8141 | /* Store data into beginning of memory target. */ | |
8142 | store_expr (treeop0, | |
8143 | adjust_address (target, TYPE_MODE (valtype), 0), | |
8144 | modifier == EXPAND_STACK_PARM, | |
8145 | false); | |
8893239d | 8146 | |
f994f296 MM |
8147 | else |
8148 | { | |
8149 | gcc_assert (REG_P (target)); | |
d6a5ac33 | 8150 | |
f994f296 MM |
8151 | /* Store this field into a union of the proper type. */ |
8152 | store_field (target, | |
8153 | MIN ((int_size_in_bytes (TREE_TYPE | |
8154 | (treeop0)) | |
8155 | * BITS_PER_UNIT), | |
8156 | (HOST_WIDE_INT) GET_MODE_BITSIZE (mode)), | |
3467ad5c | 8157 | 0, 0, 0, TYPE_MODE (valtype), treeop0, 0, false); |
f994f296 | 8158 | } |
d6a5ac33 | 8159 | |
f994f296 MM |
8160 | /* Return the entire union. */ |
8161 | return target; | |
e44842fe RK |
8162 | } |
8163 | ||
f994f296 MM |
8164 | if (mode == TYPE_MODE (TREE_TYPE (treeop0))) |
8165 | { | |
8166 | op0 = expand_expr (treeop0, target, VOIDmode, | |
8167 | modifier); | |
d6a5ac33 | 8168 | |
f994f296 MM |
8169 | /* If the signedness of the conversion differs and OP0 is |
8170 | a promoted SUBREG, clear that indication since we now | |
8171 | have to do the proper extension. */ | |
8172 | if (TYPE_UNSIGNED (TREE_TYPE (treeop0)) != unsignedp | |
8173 | && GET_CODE (op0) == SUBREG) | |
8174 | SUBREG_PROMOTED_VAR_P (op0) = 0; | |
d6a5ac33 | 8175 | |
f994f296 | 8176 | return REDUCE_BIT_FIELD (op0); |
0fab64a3 | 8177 | } |
1499e0a8 | 8178 | |
f994f296 MM |
8179 | op0 = expand_expr (treeop0, NULL_RTX, mode, |
8180 | modifier == EXPAND_SUM ? EXPAND_NORMAL : modifier); | |
8181 | if (GET_MODE (op0) == mode) | |
8182 | ; | |
8183 | ||
8184 | /* If OP0 is a constant, just convert it into the proper mode. */ | |
8185 | else if (CONSTANT_P (op0)) | |
dc6d66b3 | 8186 | { |
f994f296 | 8187 | tree inner_type = TREE_TYPE (treeop0); |
7254cb57 MM |
8188 | enum machine_mode inner_mode = GET_MODE (op0); |
8189 | ||
8190 | if (inner_mode == VOIDmode) | |
8191 | inner_mode = TYPE_MODE (inner_type); | |
dc6d66b3 | 8192 | |
f994f296 MM |
8193 | if (modifier == EXPAND_INITIALIZER) |
8194 | op0 = simplify_gen_subreg (mode, op0, inner_mode, | |
8195 | subreg_lowpart_offset (mode, | |
8196 | inner_mode)); | |
8197 | else | |
8198 | op0= convert_modes (mode, inner_mode, op0, | |
8199 | TYPE_UNSIGNED (inner_type)); | |
dc6d66b3 RK |
8200 | } |
8201 | ||
f994f296 MM |
8202 | else if (modifier == EXPAND_INITIALIZER) |
8203 | op0 = gen_rtx_fmt_e (unsignedp ? ZERO_EXTEND : SIGN_EXTEND, mode, op0); | |
1499e0a8 | 8204 | |
f994f296 MM |
8205 | else if (target == 0) |
8206 | op0 = convert_to_mode (mode, op0, | |
8207 | TYPE_UNSIGNED (TREE_TYPE | |
8208 | (treeop0))); | |
8209 | else | |
1499e0a8 | 8210 | { |
f994f296 MM |
8211 | convert_move (target, op0, |
8212 | TYPE_UNSIGNED (TREE_TYPE (treeop0))); | |
8213 | op0 = target; | |
8214 | } | |
ed1223ba | 8215 | |
f994f296 | 8216 | return REDUCE_BIT_FIELD (op0); |
bbf6f052 | 8217 | |
09e881c9 BE |
8218 | case ADDR_SPACE_CONVERT_EXPR: |
8219 | { | |
8220 | tree treeop0_type = TREE_TYPE (treeop0); | |
8221 | addr_space_t as_to; | |
8222 | addr_space_t as_from; | |
8223 | ||
8224 | gcc_assert (POINTER_TYPE_P (type)); | |
8225 | gcc_assert (POINTER_TYPE_P (treeop0_type)); | |
8226 | ||
8227 | as_to = TYPE_ADDR_SPACE (TREE_TYPE (type)); | |
8228 | as_from = TYPE_ADDR_SPACE (TREE_TYPE (treeop0_type)); | |
8229 | ||
8230 | /* Conversions between pointers to the same address space should | |
8231 | have been implemented via CONVERT_EXPR / NOP_EXPR. */ | |
8232 | gcc_assert (as_to != as_from); | |
8233 | ||
8234 | /* Ask target code to handle conversion between pointers | |
8235 | to overlapping address spaces. */ | |
8236 | if (targetm.addr_space.subset_p (as_to, as_from) | |
8237 | || targetm.addr_space.subset_p (as_from, as_to)) | |
8238 | { | |
8239 | op0 = expand_expr (treeop0, NULL_RTX, VOIDmode, modifier); | |
8240 | op0 = targetm.addr_space.convert (op0, treeop0_type, type); | |
8241 | gcc_assert (op0); | |
8242 | return op0; | |
8243 | } | |
8244 | ||
8245 | /* For disjoint address spaces, converting anything but | |
8246 | a null pointer invokes undefined behaviour. We simply | |
8247 | always return a null pointer here. */ | |
8248 | return CONST0_RTX (mode); | |
8249 | } | |
8250 | ||
b8698a0f | 8251 | case POINTER_PLUS_EXPR: |
f994f296 | 8252 | /* Even though the sizetype mode and the pointer's mode can be different |
b8698a0f | 8253 | expand is able to handle this correctly and get the correct result out |
f994f296 MM |
8254 | of the PLUS_EXPR code. */ |
8255 | /* Make sure to sign-extend the sizetype offset in a POINTER_PLUS_EXPR | |
8256 | if sizetype precision is smaller than pointer precision. */ | |
8257 | if (TYPE_PRECISION (sizetype) < TYPE_PRECISION (type)) | |
8258 | treeop1 = fold_convert_loc (loc, type, | |
8259 | fold_convert_loc (loc, ssizetype, | |
8260 | treeop1)); | |
9516c54e TG |
8261 | /* If sizetype precision is larger than pointer precision, truncate the |
8262 | offset to have matching modes. */ | |
8263 | else if (TYPE_PRECISION (sizetype) > TYPE_PRECISION (type)) | |
8264 | treeop1 = fold_convert_loc (loc, type, treeop1); | |
8265 | ||
f994f296 | 8266 | case PLUS_EXPR: |
f994f296 MM |
8267 | /* If we are adding a constant, a VAR_DECL that is sp, fp, or ap, and |
8268 | something else, make sure we add the register to the constant and | |
8269 | then to the other thing. This case can occur during strength | |
8270 | reduction and doing it this way will produce better code if the | |
8271 | frame pointer or argument pointer is eliminated. | |
bbf6f052 | 8272 | |
f994f296 MM |
8273 | fold-const.c will ensure that the constant is always in the inner |
8274 | PLUS_EXPR, so the only case we need to do anything about is if | |
8275 | sp, ap, or fp is our second argument, in which case we must swap | |
8276 | the innermost first argument and our second argument. */ | |
3a94c984 | 8277 | |
f994f296 MM |
8278 | if (TREE_CODE (treeop0) == PLUS_EXPR |
8279 | && TREE_CODE (TREE_OPERAND (treeop0, 1)) == INTEGER_CST | |
8280 | && TREE_CODE (treeop1) == VAR_DECL | |
8281 | && (DECL_RTL (treeop1) == frame_pointer_rtx | |
8282 | || DECL_RTL (treeop1) == stack_pointer_rtx | |
8283 | || DECL_RTL (treeop1) == arg_pointer_rtx)) | |
8284 | { | |
e384e6b5 | 8285 | gcc_unreachable (); |
f994f296 | 8286 | } |
bbf6f052 | 8287 | |
f994f296 MM |
8288 | /* If the result is to be ptr_mode and we are adding an integer to |
8289 | something, we might be forming a constant. So try to use | |
8290 | plus_constant. If it produces a sum and we can't accept it, | |
8291 | use force_operand. This allows P = &ARR[const] to generate | |
8292 | efficient code on machines where a SYMBOL_REF is not a valid | |
8293 | address. | |
0f996086 | 8294 | |
f994f296 MM |
8295 | If this is an EXPAND_SUM call, always return the sum. */ |
8296 | if (modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER | |
8297 | || (mode == ptr_mode && (unsignedp || ! flag_trapv))) | |
9ad58e09 | 8298 | { |
f994f296 MM |
8299 | if (modifier == EXPAND_STACK_PARM) |
8300 | target = 0; | |
8301 | if (TREE_CODE (treeop0) == INTEGER_CST | |
69660a70 | 8302 | && GET_MODE_PRECISION (mode) <= HOST_BITS_PER_WIDE_INT |
f994f296 MM |
8303 | && TREE_CONSTANT (treeop1)) |
8304 | { | |
8305 | rtx constant_part; | |
807e902e KZ |
8306 | HOST_WIDE_INT wc; |
8307 | enum machine_mode wmode = TYPE_MODE (TREE_TYPE (treeop1)); | |
9ad58e09 | 8308 | |
f994f296 MM |
8309 | op1 = expand_expr (treeop1, subtarget, VOIDmode, |
8310 | EXPAND_SUM); | |
807e902e | 8311 | /* Use wi::shwi to ensure that the constant is |
f994f296 MM |
8312 | truncated according to the mode of OP1, then sign extended |
8313 | to a HOST_WIDE_INT. Using the constant directly can result | |
8314 | in non-canonical RTL in a 64x32 cross compile. */ | |
807e902e KZ |
8315 | wc = TREE_INT_CST_LOW (treeop0); |
8316 | constant_part = | |
8317 | immed_wide_int_const (wi::shwi (wc, wmode), wmode); | |
0a81f074 | 8318 | op1 = plus_constant (mode, op1, INTVAL (constant_part)); |
f994f296 MM |
8319 | if (modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER) |
8320 | op1 = force_operand (op1, target); | |
8321 | return REDUCE_BIT_FIELD (op1); | |
8322 | } | |
9ad58e09 | 8323 | |
f994f296 | 8324 | else if (TREE_CODE (treeop1) == INTEGER_CST |
69660a70 | 8325 | && GET_MODE_PRECISION (mode) <= HOST_BITS_PER_WIDE_INT |
f994f296 MM |
8326 | && TREE_CONSTANT (treeop0)) |
8327 | { | |
8328 | rtx constant_part; | |
807e902e KZ |
8329 | HOST_WIDE_INT wc; |
8330 | enum machine_mode wmode = TYPE_MODE (TREE_TYPE (treeop0)); | |
9ad58e09 | 8331 | |
f994f296 MM |
8332 | op0 = expand_expr (treeop0, subtarget, VOIDmode, |
8333 | (modifier == EXPAND_INITIALIZER | |
8334 | ? EXPAND_INITIALIZER : EXPAND_SUM)); | |
8335 | if (! CONSTANT_P (op0)) | |
8336 | { | |
8337 | op1 = expand_expr (treeop1, NULL_RTX, | |
8338 | VOIDmode, modifier); | |
8339 | /* Return a PLUS if modifier says it's OK. */ | |
8340 | if (modifier == EXPAND_SUM | |
8341 | || modifier == EXPAND_INITIALIZER) | |
8342 | return simplify_gen_binary (PLUS, mode, op0, op1); | |
8343 | goto binop2; | |
8344 | } | |
807e902e | 8345 | /* Use wi::shwi to ensure that the constant is |
f994f296 MM |
8346 | truncated according to the mode of OP1, then sign extended |
8347 | to a HOST_WIDE_INT. Using the constant directly can result | |
8348 | in non-canonical RTL in a 64x32 cross compile. */ | |
807e902e | 8349 | wc = TREE_INT_CST_LOW (treeop1); |
f994f296 | 8350 | constant_part |
807e902e | 8351 | = immed_wide_int_const (wi::shwi (wc, wmode), wmode); |
0a81f074 | 8352 | op0 = plus_constant (mode, op0, INTVAL (constant_part)); |
f994f296 MM |
8353 | if (modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER) |
8354 | op0 = force_operand (op0, target); | |
8355 | return REDUCE_BIT_FIELD (op0); | |
8356 | } | |
9ad58e09 RS |
8357 | } |
8358 | ||
cc99c5fe JJ |
8359 | /* Use TER to expand pointer addition of a negated value |
8360 | as pointer subtraction. */ | |
8361 | if ((POINTER_TYPE_P (TREE_TYPE (treeop0)) | |
8362 | || (TREE_CODE (TREE_TYPE (treeop0)) == VECTOR_TYPE | |
8363 | && POINTER_TYPE_P (TREE_TYPE (TREE_TYPE (treeop0))))) | |
8364 | && TREE_CODE (treeop1) == SSA_NAME | |
8365 | && TYPE_MODE (TREE_TYPE (treeop0)) | |
8366 | == TYPE_MODE (TREE_TYPE (treeop1))) | |
8367 | { | |
8368 | gimple def = get_def_for_expr (treeop1, NEGATE_EXPR); | |
8369 | if (def) | |
8370 | { | |
8371 | treeop1 = gimple_assign_rhs1 (def); | |
8372 | code = MINUS_EXPR; | |
8373 | goto do_minus; | |
8374 | } | |
8375 | } | |
8376 | ||
f994f296 MM |
8377 | /* No sense saving up arithmetic to be done |
8378 | if it's all in the wrong mode to form part of an address. | |
8379 | And force_operand won't know whether to sign-extend or | |
8380 | zero-extend. */ | |
8381 | if ((modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER) | |
8382 | || mode != ptr_mode) | |
8383 | { | |
8384 | expand_operands (treeop0, treeop1, | |
8385 | subtarget, &op0, &op1, EXPAND_NORMAL); | |
8386 | if (op0 == const0_rtx) | |
8387 | return op1; | |
8388 | if (op1 == const0_rtx) | |
8389 | return op0; | |
8390 | goto binop2; | |
8391 | } | |
9ad58e09 | 8392 | |
f994f296 MM |
8393 | expand_operands (treeop0, treeop1, |
8394 | subtarget, &op0, &op1, modifier); | |
8395 | return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS, mode, op0, op1)); | |
bbf6f052 | 8396 | |
f994f296 | 8397 | case MINUS_EXPR: |
cc99c5fe | 8398 | do_minus: |
f994f296 MM |
8399 | /* For initializers, we are allowed to return a MINUS of two |
8400 | symbolic constants. Here we handle all cases when both operands | |
8401 | are constant. */ | |
8402 | /* Handle difference of two symbolic constants, | |
8403 | for the sake of an initializer. */ | |
8404 | if ((modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER) | |
8405 | && really_constant_p (treeop0) | |
8406 | && really_constant_p (treeop1)) | |
8407 | { | |
8408 | expand_operands (treeop0, treeop1, | |
8409 | NULL_RTX, &op0, &op1, modifier); | |
1499e0a8 | 8410 | |
f994f296 MM |
8411 | /* If the last operand is a CONST_INT, use plus_constant of |
8412 | the negated constant. Else make the MINUS. */ | |
8413 | if (CONST_INT_P (op1)) | |
0a81f074 RS |
8414 | return REDUCE_BIT_FIELD (plus_constant (mode, op0, |
8415 | -INTVAL (op1))); | |
f994f296 MM |
8416 | else |
8417 | return REDUCE_BIT_FIELD (gen_rtx_MINUS (mode, op0, op1)); | |
8418 | } | |
1499e0a8 | 8419 | |
f994f296 MM |
8420 | /* No sense saving up arithmetic to be done |
8421 | if it's all in the wrong mode to form part of an address. | |
8422 | And force_operand won't know whether to sign-extend or | |
8423 | zero-extend. */ | |
8424 | if ((modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER) | |
8425 | || mode != ptr_mode) | |
8426 | goto binop; | |
bbf6f052 | 8427 | |
f994f296 MM |
8428 | expand_operands (treeop0, treeop1, |
8429 | subtarget, &op0, &op1, modifier); | |
70e6ca43 | 8430 | |
f994f296 MM |
8431 | /* Convert A - const to A + (-const). */ |
8432 | if (CONST_INT_P (op1)) | |
dd27116b | 8433 | { |
f994f296 MM |
8434 | op1 = negate_rtx (mode, op1); |
8435 | return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS, mode, op0, op1)); | |
dd27116b | 8436 | } |
3207b172 | 8437 | |
f994f296 | 8438 | goto binop2; |
3a94c984 | 8439 | |
0354c0c7 BS |
8440 | case WIDEN_MULT_PLUS_EXPR: |
8441 | case WIDEN_MULT_MINUS_EXPR: | |
8442 | expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1, EXPAND_NORMAL); | |
16949072 | 8443 | op2 = expand_normal (treeop2); |
0354c0c7 BS |
8444 | target = expand_widen_pattern_expr (ops, op0, op1, op2, |
8445 | target, unsignedp); | |
8446 | return target; | |
8447 | ||
5b58b39b | 8448 | case WIDEN_MULT_EXPR: |
f994f296 MM |
8449 | /* If first operand is constant, swap them. |
8450 | Thus the following special case checks need only | |
8451 | check the second operand. */ | |
8452 | if (TREE_CODE (treeop0) == INTEGER_CST) | |
8453 | { | |
8454 | tree t1 = treeop0; | |
8455 | treeop0 = treeop1; | |
8456 | treeop1 = t1; | |
8457 | } | |
bbf6f052 | 8458 | |
f994f296 MM |
8459 | /* First, check if we have a multiplication of one signed and one |
8460 | unsigned operand. */ | |
5b58b39b BS |
8461 | if (TREE_CODE (treeop1) != INTEGER_CST |
8462 | && (TYPE_UNSIGNED (TREE_TYPE (treeop0)) | |
8463 | != TYPE_UNSIGNED (TREE_TYPE (treeop1)))) | |
f994f296 | 8464 | { |
5b58b39b | 8465 | enum machine_mode innermode = TYPE_MODE (TREE_TYPE (treeop0)); |
f994f296 | 8466 | this_optab = usmul_widen_optab; |
5dfe80ba AS |
8467 | if (find_widening_optab_handler (this_optab, mode, innermode, 0) |
8468 | != CODE_FOR_nothing) | |
f994f296 | 8469 | { |
5dfe80ba AS |
8470 | if (TYPE_UNSIGNED (TREE_TYPE (treeop0))) |
8471 | expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1, | |
8472 | EXPAND_NORMAL); | |
8473 | else | |
8474 | expand_operands (treeop0, treeop1, NULL_RTX, &op1, &op0, | |
8475 | EXPAND_NORMAL); | |
f778dd4d JJ |
8476 | /* op0 and op1 might still be constant, despite the above |
8477 | != INTEGER_CST check. Handle it. */ | |
8478 | if (GET_MODE (op0) == VOIDmode && GET_MODE (op1) == VOIDmode) | |
8479 | { | |
8480 | op0 = convert_modes (innermode, mode, op0, true); | |
8481 | op1 = convert_modes (innermode, mode, op1, false); | |
8482 | return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1, | |
8483 | target, unsignedp)); | |
8484 | } | |
5dfe80ba | 8485 | goto binop3; |
f994f296 MM |
8486 | } |
8487 | } | |
5b58b39b BS |
8488 | /* Check for a multiplication with matching signedness. */ |
8489 | else if ((TREE_CODE (treeop1) == INTEGER_CST | |
8490 | && int_fits_type_p (treeop1, TREE_TYPE (treeop0))) | |
8491 | || (TYPE_UNSIGNED (TREE_TYPE (treeop1)) | |
8492 | == TYPE_UNSIGNED (TREE_TYPE (treeop0)))) | |
f994f296 | 8493 | { |
5b58b39b | 8494 | tree op0type = TREE_TYPE (treeop0); |
f994f296 MM |
8495 | enum machine_mode innermode = TYPE_MODE (op0type); |
8496 | bool zextend_p = TYPE_UNSIGNED (op0type); | |
8497 | optab other_optab = zextend_p ? smul_widen_optab : umul_widen_optab; | |
8498 | this_optab = zextend_p ? umul_widen_optab : smul_widen_optab; | |
1e0598e2 | 8499 | |
5dfe80ba | 8500 | if (TREE_CODE (treeop0) != INTEGER_CST) |
f994f296 | 8501 | { |
5dfe80ba | 8502 | if (find_widening_optab_handler (this_optab, mode, innermode, 0) |
a484f6ba | 8503 | != CODE_FOR_nothing) |
f994f296 | 8504 | { |
5b58b39b BS |
8505 | expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1, |
8506 | EXPAND_NORMAL); | |
f778dd4d JJ |
8507 | /* op0 and op1 might still be constant, despite the above |
8508 | != INTEGER_CST check. Handle it. */ | |
8509 | if (GET_MODE (op0) == VOIDmode && GET_MODE (op1) == VOIDmode) | |
8510 | { | |
8511 | widen_mult_const: | |
8512 | op0 = convert_modes (innermode, mode, op0, zextend_p); | |
8513 | op1 | |
8514 | = convert_modes (innermode, mode, op1, | |
8515 | TYPE_UNSIGNED (TREE_TYPE (treeop1))); | |
8516 | return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1, | |
8517 | target, | |
8518 | unsignedp)); | |
8519 | } | |
5b58b39b BS |
8520 | temp = expand_widening_mult (mode, op0, op1, target, |
8521 | unsignedp, this_optab); | |
8522 | return REDUCE_BIT_FIELD (temp); | |
f994f296 | 8523 | } |
5dfe80ba | 8524 | if (find_widening_optab_handler (other_optab, mode, innermode, 0) |
a484f6ba | 8525 | != CODE_FOR_nothing |
5b58b39b | 8526 | && innermode == word_mode) |
f994f296 MM |
8527 | { |
8528 | rtx htem, hipart; | |
5b58b39b BS |
8529 | op0 = expand_normal (treeop0); |
8530 | if (TREE_CODE (treeop1) == INTEGER_CST) | |
f994f296 | 8531 | op1 = convert_modes (innermode, mode, |
f778dd4d JJ |
8532 | expand_normal (treeop1), |
8533 | TYPE_UNSIGNED (TREE_TYPE (treeop1))); | |
f994f296 | 8534 | else |
5b58b39b | 8535 | op1 = expand_normal (treeop1); |
f778dd4d JJ |
8536 | /* op0 and op1 might still be constant, despite the above |
8537 | != INTEGER_CST check. Handle it. */ | |
8538 | if (GET_MODE (op0) == VOIDmode && GET_MODE (op1) == VOIDmode) | |
8539 | goto widen_mult_const; | |
f994f296 MM |
8540 | temp = expand_binop (mode, other_optab, op0, op1, target, |
8541 | unsignedp, OPTAB_LIB_WIDEN); | |
8542 | hipart = gen_highpart (innermode, temp); | |
8543 | htem = expand_mult_highpart_adjust (innermode, hipart, | |
8544 | op0, op1, hipart, | |
8545 | zextend_p); | |
8546 | if (htem != hipart) | |
8547 | emit_move_insn (hipart, htem); | |
8548 | return REDUCE_BIT_FIELD (temp); | |
8549 | } | |
8550 | } | |
8551 | } | |
5b58b39b BS |
8552 | treeop0 = fold_build1 (CONVERT_EXPR, type, treeop0); |
8553 | treeop1 = fold_build1 (CONVERT_EXPR, type, treeop1); | |
8554 | expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL); | |
8555 | return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1, target, unsignedp)); | |
8556 | ||
16949072 RG |
8557 | case FMA_EXPR: |
8558 | { | |
8559 | optab opt = fma_optab; | |
8560 | gimple def0, def2; | |
8561 | ||
65450d64 JJ |
8562 | /* If there is no insn for FMA, emit it as __builtin_fma{,f,l} |
8563 | call. */ | |
8564 | if (optab_handler (fma_optab, mode) == CODE_FOR_nothing) | |
8565 | { | |
8566 | tree fn = mathfn_built_in (TREE_TYPE (treeop0), BUILT_IN_FMA); | |
8567 | tree call_expr; | |
8568 | ||
8569 | gcc_assert (fn != NULL_TREE); | |
8570 | call_expr = build_call_expr (fn, 3, treeop0, treeop1, treeop2); | |
8571 | return expand_builtin (call_expr, target, subtarget, mode, false); | |
8572 | } | |
8573 | ||
16949072 RG |
8574 | def0 = get_def_for_expr (treeop0, NEGATE_EXPR); |
8575 | def2 = get_def_for_expr (treeop2, NEGATE_EXPR); | |
8576 | ||
8577 | op0 = op2 = NULL; | |
8578 | ||
8579 | if (def0 && def2 | |
8580 | && optab_handler (fnms_optab, mode) != CODE_FOR_nothing) | |
8581 | { | |
8582 | opt = fnms_optab; | |
8583 | op0 = expand_normal (gimple_assign_rhs1 (def0)); | |
8584 | op2 = expand_normal (gimple_assign_rhs1 (def2)); | |
8585 | } | |
8586 | else if (def0 | |
8587 | && optab_handler (fnma_optab, mode) != CODE_FOR_nothing) | |
8588 | { | |
8589 | opt = fnma_optab; | |
8590 | op0 = expand_normal (gimple_assign_rhs1 (def0)); | |
8591 | } | |
8592 | else if (def2 | |
8593 | && optab_handler (fms_optab, mode) != CODE_FOR_nothing) | |
8594 | { | |
8595 | opt = fms_optab; | |
8596 | op2 = expand_normal (gimple_assign_rhs1 (def2)); | |
8597 | } | |
8598 | ||
8599 | if (op0 == NULL) | |
8600 | op0 = expand_expr (treeop0, subtarget, VOIDmode, EXPAND_NORMAL); | |
8601 | if (op2 == NULL) | |
8602 | op2 = expand_normal (treeop2); | |
8603 | op1 = expand_normal (treeop1); | |
8604 | ||
8605 | return expand_ternary_op (TYPE_MODE (type), opt, | |
8606 | op0, op1, op2, target, 0); | |
8607 | } | |
8608 | ||
5b58b39b BS |
8609 | case MULT_EXPR: |
8610 | /* If this is a fixed-point operation, then we cannot use the code | |
8611 | below because "expand_mult" doesn't support sat/no-sat fixed-point | |
8612 | multiplications. */ | |
8613 | if (ALL_FIXED_POINT_MODE_P (mode)) | |
8614 | goto binop; | |
8615 | ||
8616 | /* If first operand is constant, swap them. | |
8617 | Thus the following special case checks need only | |
8618 | check the second operand. */ | |
8619 | if (TREE_CODE (treeop0) == INTEGER_CST) | |
8620 | { | |
8621 | tree t1 = treeop0; | |
8622 | treeop0 = treeop1; | |
8623 | treeop1 = t1; | |
8624 | } | |
8625 | ||
8626 | /* Attempt to return something suitable for generating an | |
8627 | indexed address, for machines that support that. */ | |
8628 | ||
8629 | if (modifier == EXPAND_SUM && mode == ptr_mode | |
9541ffee | 8630 | && tree_fits_shwi_p (treeop1)) |
5b58b39b BS |
8631 | { |
8632 | tree exp1 = treeop1; | |
8633 | ||
8634 | op0 = expand_expr (treeop0, subtarget, VOIDmode, | |
8635 | EXPAND_SUM); | |
8636 | ||
8637 | if (!REG_P (op0)) | |
8638 | op0 = force_operand (op0, NULL_RTX); | |
8639 | if (!REG_P (op0)) | |
8640 | op0 = copy_to_mode_reg (mode, op0); | |
8641 | ||
8642 | return REDUCE_BIT_FIELD (gen_rtx_MULT (mode, op0, | |
9439e9a1 | 8643 | gen_int_mode (tree_to_shwi (exp1), |
5b58b39b BS |
8644 | TYPE_MODE (TREE_TYPE (exp1))))); |
8645 | } | |
8646 | ||
8647 | if (modifier == EXPAND_STACK_PARM) | |
8648 | target = 0; | |
8649 | ||
8650 | expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL); | |
f994f296 | 8651 | return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1, target, unsignedp)); |
bbf6f052 | 8652 | |
f994f296 MM |
8653 | case TRUNC_DIV_EXPR: |
8654 | case FLOOR_DIV_EXPR: | |
8655 | case CEIL_DIV_EXPR: | |
8656 | case ROUND_DIV_EXPR: | |
8657 | case EXACT_DIV_EXPR: | |
8658 | /* If this is a fixed-point operation, then we cannot use the code | |
8659 | below because "expand_divmod" doesn't support sat/no-sat fixed-point | |
8660 | divisions. */ | |
8661 | if (ALL_FIXED_POINT_MODE_P (mode)) | |
8662 | goto binop; | |
ac182688 | 8663 | |
f994f296 MM |
8664 | if (modifier == EXPAND_STACK_PARM) |
8665 | target = 0; | |
8666 | /* Possible optimization: compute the dividend with EXPAND_SUM | |
8667 | then if the divisor is constant can optimize the case | |
8668 | where some terms of the dividend have coeffs divisible by it. */ | |
8669 | expand_operands (treeop0, treeop1, | |
8670 | subtarget, &op0, &op1, EXPAND_NORMAL); | |
8671 | return expand_divmod (0, code, mode, op0, op1, target, unsignedp); | |
ac182688 | 8672 | |
f994f296 MM |
8673 | case RDIV_EXPR: |
8674 | goto binop; | |
6de9cd9a | 8675 | |
00f07b86 RH |
8676 | case MULT_HIGHPART_EXPR: |
8677 | expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL); | |
8678 | temp = expand_mult_highpart (mode, op0, op1, target, unsignedp); | |
8679 | gcc_assert (temp); | |
8680 | return temp; | |
8681 | ||
f994f296 MM |
8682 | case TRUNC_MOD_EXPR: |
8683 | case FLOOR_MOD_EXPR: | |
8684 | case CEIL_MOD_EXPR: | |
8685 | case ROUND_MOD_EXPR: | |
8686 | if (modifier == EXPAND_STACK_PARM) | |
8687 | target = 0; | |
8688 | expand_operands (treeop0, treeop1, | |
8689 | subtarget, &op0, &op1, EXPAND_NORMAL); | |
8690 | return expand_divmod (1, code, mode, op0, op1, target, unsignedp); | |
742920c7 | 8691 | |
f994f296 MM |
8692 | case FIXED_CONVERT_EXPR: |
8693 | op0 = expand_normal (treeop0); | |
8694 | if (target == 0 || modifier == EXPAND_STACK_PARM) | |
8695 | target = gen_reg_rtx (mode); | |
742920c7 | 8696 | |
f994f296 MM |
8697 | if ((TREE_CODE (TREE_TYPE (treeop0)) == INTEGER_TYPE |
8698 | && TYPE_UNSIGNED (TREE_TYPE (treeop0))) | |
8699 | || (TREE_CODE (type) == INTEGER_TYPE && TYPE_UNSIGNED (type))) | |
8700 | expand_fixed_convert (target, op0, 1, TYPE_SATURATING (type)); | |
8701 | else | |
8702 | expand_fixed_convert (target, op0, 0, TYPE_SATURATING (type)); | |
8703 | return target; | |
6de9cd9a | 8704 | |
f994f296 MM |
8705 | case FIX_TRUNC_EXPR: |
8706 | op0 = expand_normal (treeop0); | |
8707 | if (target == 0 || modifier == EXPAND_STACK_PARM) | |
8708 | target = gen_reg_rtx (mode); | |
8709 | expand_fix (target, op0, unsignedp); | |
8710 | return target; | |
bbf6f052 | 8711 | |
f994f296 MM |
8712 | case FLOAT_EXPR: |
8713 | op0 = expand_normal (treeop0); | |
8714 | if (target == 0 || modifier == EXPAND_STACK_PARM) | |
8715 | target = gen_reg_rtx (mode); | |
8716 | /* expand_float can't figure out what to do if FROM has VOIDmode. | |
8717 | So give it the correct mode. With -O, cse will optimize this. */ | |
8718 | if (GET_MODE (op0) == VOIDmode) | |
8719 | op0 = copy_to_mode_reg (TYPE_MODE (TREE_TYPE (treeop0)), | |
8720 | op0); | |
8721 | expand_float (target, op0, | |
8722 | TYPE_UNSIGNED (TREE_TYPE (treeop0))); | |
8723 | return target; | |
4af3895e | 8724 | |
f994f296 MM |
8725 | case NEGATE_EXPR: |
8726 | op0 = expand_expr (treeop0, subtarget, | |
8727 | VOIDmode, EXPAND_NORMAL); | |
8728 | if (modifier == EXPAND_STACK_PARM) | |
8729 | target = 0; | |
8730 | temp = expand_unop (mode, | |
8731 | optab_for_tree_code (NEGATE_EXPR, type, | |
8732 | optab_default), | |
8733 | op0, target, 0); | |
8734 | gcc_assert (temp); | |
8735 | return REDUCE_BIT_FIELD (temp); | |
05bccae2 | 8736 | |
f994f296 MM |
8737 | case ABS_EXPR: |
8738 | op0 = expand_expr (treeop0, subtarget, | |
8739 | VOIDmode, EXPAND_NORMAL); | |
8740 | if (modifier == EXPAND_STACK_PARM) | |
8741 | target = 0; | |
3a94c984 | 8742 | |
f994f296 MM |
8743 | /* ABS_EXPR is not valid for complex arguments. */ |
8744 | gcc_assert (GET_MODE_CLASS (mode) != MODE_COMPLEX_INT | |
8745 | && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT); | |
742920c7 | 8746 | |
f994f296 MM |
8747 | /* Unsigned abs is simply the operand. Testing here means we don't |
8748 | risk generating incorrect code below. */ | |
8749 | if (TYPE_UNSIGNED (type)) | |
8750 | return op0; | |
4038c495 | 8751 | |
f994f296 MM |
8752 | return expand_abs (mode, op0, target, unsignedp, |
8753 | safe_from_p (target, treeop0, 1)); | |
32eed045 | 8754 | |
f994f296 MM |
8755 | case MAX_EXPR: |
8756 | case MIN_EXPR: | |
8757 | target = original_target; | |
8758 | if (target == 0 | |
8759 | || modifier == EXPAND_STACK_PARM | |
8760 | || (MEM_P (target) && MEM_VOLATILE_P (target)) | |
8761 | || GET_MODE (target) != mode | |
8762 | || (REG_P (target) | |
8763 | && REGNO (target) < FIRST_PSEUDO_REGISTER)) | |
8764 | target = gen_reg_rtx (mode); | |
8765 | expand_operands (treeop0, treeop1, | |
8766 | target, &op0, &op1, EXPAND_NORMAL); | |
32eed045 | 8767 | |
f994f296 MM |
8768 | /* First try to do it with a special MIN or MAX instruction. |
8769 | If that does not win, use a conditional jump to select the proper | |
8770 | value. */ | |
8771 | this_optab = optab_for_tree_code (code, type, optab_default); | |
8772 | temp = expand_binop (mode, this_optab, op0, op1, target, unsignedp, | |
8773 | OPTAB_WIDEN); | |
8774 | if (temp != 0) | |
8775 | return temp; | |
ed1223ba | 8776 | |
f994f296 MM |
8777 | /* At this point, a MEM target is no longer useful; we will get better |
8778 | code without it. */ | |
ed1223ba | 8779 | |
f994f296 MM |
8780 | if (! REG_P (target)) |
8781 | target = gen_reg_rtx (mode); | |
ed1223ba | 8782 | |
f994f296 MM |
8783 | /* If op1 was placed in target, swap op0 and op1. */ |
8784 | if (target != op0 && target == op1) | |
8785 | { | |
8786 | temp = op0; | |
8787 | op0 = op1; | |
8788 | op1 = temp; | |
8789 | } | |
ed1223ba | 8790 | |
f994f296 MM |
8791 | /* We generate better code and avoid problems with op1 mentioning |
8792 | target by forcing op1 into a pseudo if it isn't a constant. */ | |
8793 | if (! CONSTANT_P (op1)) | |
8794 | op1 = force_reg (mode, op1); | |
4af3895e | 8795 | |
bbf6f052 | 8796 | { |
f994f296 MM |
8797 | enum rtx_code comparison_code; |
8798 | rtx cmpop1 = op1; | |
ae00112b | 8799 | |
f994f296 MM |
8800 | if (code == MAX_EXPR) |
8801 | comparison_code = unsignedp ? GEU : GE; | |
8802 | else | |
8803 | comparison_code = unsignedp ? LEU : LE; | |
ae00112b | 8804 | |
f994f296 MM |
8805 | /* Canonicalize to comparisons against 0. */ |
8806 | if (op1 == const1_rtx) | |
b8e444f4 | 8807 | { |
f994f296 MM |
8808 | /* Converting (a >= 1 ? a : 1) into (a > 0 ? a : 1) |
8809 | or (a != 0 ? a : 1) for unsigned. | |
8810 | For MIN we are safe converting (a <= 1 ? a : 1) | |
8811 | into (a <= 0 ? a : 1) */ | |
8812 | cmpop1 = const0_rtx; | |
8813 | if (code == MAX_EXPR) | |
8814 | comparison_code = unsignedp ? NE : GT; | |
b8e444f4 | 8815 | } |
f994f296 | 8816 | if (op1 == constm1_rtx && !unsignedp) |
8d2e5f72 | 8817 | { |
f994f296 MM |
8818 | /* Converting (a >= -1 ? a : -1) into (a >= 0 ? a : -1) |
8819 | and (a <= -1 ? a : -1) into (a < 0 ? a : -1) */ | |
8820 | cmpop1 = const0_rtx; | |
8821 | if (code == MIN_EXPR) | |
8822 | comparison_code = LT; | |
8d2e5f72 | 8823 | } |
f994f296 MM |
8824 | #ifdef HAVE_conditional_move |
8825 | /* Use a conditional move if possible. */ | |
8826 | if (can_conditionally_move_p (mode)) | |
7bb0943f | 8827 | { |
f994f296 | 8828 | rtx insn; |
7bb0943f | 8829 | |
f994f296 | 8830 | start_sequence (); |
2d48c13d | 8831 | |
f994f296 MM |
8832 | /* Try to emit the conditional move. */ |
8833 | insn = emit_conditional_move (target, comparison_code, | |
8834 | op0, cmpop1, mode, | |
8835 | op0, op1, mode, | |
8836 | unsignedp); | |
8837 | ||
8838 | /* If we could do the conditional move, emit the sequence, | |
8839 | and return. */ | |
8840 | if (insn) | |
89752202 | 8841 | { |
770affca | 8842 | rtx_insn *seq = get_insns (); |
f994f296 MM |
8843 | end_sequence (); |
8844 | emit_insn (seq); | |
8845 | return target; | |
89752202 HB |
8846 | } |
8847 | ||
f994f296 MM |
8848 | /* Otherwise discard the sequence and fall back to code with |
8849 | branches. */ | |
8850 | end_sequence (); | |
7bb0943f | 8851 | } |
f994f296 MM |
8852 | #endif |
8853 | if (target != op0) | |
8854 | emit_move_insn (target, op0); | |
7bb0943f | 8855 | |
f994f296 MM |
8856 | temp = gen_label_rtx (); |
8857 | do_compare_rtx_and_jump (target, cmpop1, comparison_code, | |
40e90eac JJ |
8858 | unsignedp, mode, NULL_RTX, NULL_RTX, temp, |
8859 | -1); | |
f994f296 MM |
8860 | } |
8861 | emit_move_insn (target, op1); | |
8862 | emit_label (temp); | |
8863 | return target; | |
1ce7f3c2 | 8864 | |
f994f296 MM |
8865 | case BIT_NOT_EXPR: |
8866 | op0 = expand_expr (treeop0, subtarget, | |
8867 | VOIDmode, EXPAND_NORMAL); | |
8868 | if (modifier == EXPAND_STACK_PARM) | |
8869 | target = 0; | |
e002c7cb | 8870 | /* In case we have to reduce the result to bitfield precision |
205ec405 JJ |
8871 | for unsigned bitfield expand this as XOR with a proper constant |
8872 | instead. */ | |
8873 | if (reduce_bit_field && TYPE_UNSIGNED (type)) | |
807e902e KZ |
8874 | { |
8875 | wide_int mask = wi::mask (TYPE_PRECISION (type), | |
8876 | false, GET_MODE_PRECISION (mode)); | |
8877 | ||
8878 | temp = expand_binop (mode, xor_optab, op0, | |
8879 | immed_wide_int_const (mask, mode), | |
8880 | target, 1, OPTAB_LIB_WIDEN); | |
8881 | } | |
e002c7cb RG |
8882 | else |
8883 | temp = expand_unop (mode, one_cmpl_optab, op0, target, 1); | |
f994f296 MM |
8884 | gcc_assert (temp); |
8885 | return temp; | |
f47e9b4e | 8886 | |
f994f296 MM |
8887 | /* ??? Can optimize bitwise operations with one arg constant. |
8888 | Can optimize (a bitwise1 n) bitwise2 (a bitwise3 b) | |
8889 | and (a bitwise1 b) bitwise2 b (etc) | |
8890 | but that is probably not worth while. */ | |
bbf6f052 | 8891 | |
f994f296 | 8892 | case BIT_AND_EXPR: |
f994f296 | 8893 | case BIT_IOR_EXPR: |
f994f296 MM |
8894 | case BIT_XOR_EXPR: |
8895 | goto binop; | |
7a06d606 | 8896 | |
f994f296 MM |
8897 | case LROTATE_EXPR: |
8898 | case RROTATE_EXPR: | |
8899 | gcc_assert (VECTOR_MODE_P (TYPE_MODE (type)) | |
8900 | || (GET_MODE_PRECISION (TYPE_MODE (type)) | |
8901 | == TYPE_PRECISION (type))); | |
8902 | /* fall through */ | |
a281e72d | 8903 | |
f994f296 MM |
8904 | case LSHIFT_EXPR: |
8905 | case RSHIFT_EXPR: | |
8906 | /* If this is a fixed-point operation, then we cannot use the code | |
8907 | below because "expand_shift" doesn't support sat/no-sat fixed-point | |
8908 | shifts. */ | |
8909 | if (ALL_FIXED_POINT_MODE_P (mode)) | |
8910 | goto binop; | |
3a94c984 | 8911 | |
f994f296 MM |
8912 | if (! safe_from_p (subtarget, treeop1, 1)) |
8913 | subtarget = 0; | |
8914 | if (modifier == EXPAND_STACK_PARM) | |
8915 | target = 0; | |
8916 | op0 = expand_expr (treeop0, subtarget, | |
8917 | VOIDmode, EXPAND_NORMAL); | |
eb6c3df1 RG |
8918 | temp = expand_variable_shift (code, mode, op0, treeop1, target, |
8919 | unsignedp); | |
f994f296 MM |
8920 | if (code == LSHIFT_EXPR) |
8921 | temp = REDUCE_BIT_FIELD (temp); | |
8922 | return temp; | |
bbf6f052 | 8923 | |
f994f296 MM |
8924 | /* Could determine the answer when only additive constants differ. Also, |
8925 | the addition of one can be handled by changing the condition. */ | |
8926 | case LT_EXPR: | |
8927 | case LE_EXPR: | |
8928 | case GT_EXPR: | |
8929 | case GE_EXPR: | |
8930 | case EQ_EXPR: | |
8931 | case NE_EXPR: | |
8932 | case UNORDERED_EXPR: | |
8933 | case ORDERED_EXPR: | |
8934 | case UNLT_EXPR: | |
8935 | case UNLE_EXPR: | |
8936 | case UNGT_EXPR: | |
8937 | case UNGE_EXPR: | |
8938 | case UNEQ_EXPR: | |
8939 | case LTGT_EXPR: | |
8940 | temp = do_store_flag (ops, | |
8941 | modifier != EXPAND_STACK_PARM ? target : NULL_RTX, | |
8942 | tmode != VOIDmode ? tmode : mode); | |
8943 | if (temp) | |
8944 | return temp; | |
dc6d66b3 | 8945 | |
f994f296 MM |
8946 | /* Use a compare and a jump for BLKmode comparisons, or for function |
8947 | type comparisons is HAVE_canonicalize_funcptr_for_compare. */ | |
dc6d66b3 | 8948 | |
f994f296 MM |
8949 | if ((target == 0 |
8950 | || modifier == EXPAND_STACK_PARM | |
8951 | || ! safe_from_p (target, treeop0, 1) | |
8952 | || ! safe_from_p (target, treeop1, 1) | |
8953 | /* Make sure we don't have a hard reg (such as function's return | |
8954 | value) live across basic blocks, if not optimizing. */ | |
8955 | || (!optimize && REG_P (target) | |
8956 | && REGNO (target) < FIRST_PSEUDO_REGISTER))) | |
8957 | target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode); | |
ef19912d | 8958 | |
f994f296 | 8959 | emit_move_insn (target, const0_rtx); |
ef19912d | 8960 | |
f994f296 | 8961 | op1 = gen_label_rtx (); |
40e90eac | 8962 | jumpifnot_1 (code, treeop0, treeop1, op1, -1); |
befdad07 | 8963 | |
7bba408b JJ |
8964 | if (TYPE_PRECISION (type) == 1 && !TYPE_UNSIGNED (type)) |
8965 | emit_move_insn (target, constm1_rtx); | |
8966 | else | |
8967 | emit_move_insn (target, const1_rtx); | |
bbf6f052 | 8968 | |
f994f296 MM |
8969 | emit_label (op1); |
8970 | return target; | |
bbf6f052 | 8971 | |
f994f296 MM |
8972 | case COMPLEX_EXPR: |
8973 | /* Get the rtx code of the operands. */ | |
8974 | op0 = expand_normal (treeop0); | |
8975 | op1 = expand_normal (treeop1); | |
05019f83 | 8976 | |
f994f296 MM |
8977 | if (!target) |
8978 | target = gen_reg_rtx (TYPE_MODE (type)); | |
3f0fee7b JJ |
8979 | else |
8980 | /* If target overlaps with op1, then either we need to force | |
8981 | op1 into a pseudo (if target also overlaps with op0), | |
8982 | or write the complex parts in reverse order. */ | |
8983 | switch (GET_CODE (target)) | |
8984 | { | |
8985 | case CONCAT: | |
8986 | if (reg_overlap_mentioned_p (XEXP (target, 0), op1)) | |
8987 | { | |
8988 | if (reg_overlap_mentioned_p (XEXP (target, 1), op0)) | |
8989 | { | |
8990 | complex_expr_force_op1: | |
8991 | temp = gen_reg_rtx (GET_MODE_INNER (GET_MODE (target))); | |
8992 | emit_move_insn (temp, op1); | |
8993 | op1 = temp; | |
8994 | break; | |
8995 | } | |
8996 | complex_expr_swap_order: | |
8997 | /* Move the imaginary (op1) and real (op0) parts to their | |
8998 | location. */ | |
8999 | write_complex_part (target, op1, true); | |
9000 | write_complex_part (target, op0, false); | |
9001 | ||
9002 | return target; | |
9003 | } | |
9004 | break; | |
9005 | case MEM: | |
9006 | temp = adjust_address_nv (target, | |
9007 | GET_MODE_INNER (GET_MODE (target)), 0); | |
9008 | if (reg_overlap_mentioned_p (temp, op1)) | |
9009 | { | |
9010 | enum machine_mode imode = GET_MODE_INNER (GET_MODE (target)); | |
9011 | temp = adjust_address_nv (target, imode, | |
9012 | GET_MODE_SIZE (imode)); | |
9013 | if (reg_overlap_mentioned_p (temp, op0)) | |
9014 | goto complex_expr_force_op1; | |
9015 | goto complex_expr_swap_order; | |
9016 | } | |
9017 | break; | |
9018 | default: | |
9019 | if (reg_overlap_mentioned_p (target, op1)) | |
9020 | { | |
9021 | if (reg_overlap_mentioned_p (target, op0)) | |
9022 | goto complex_expr_force_op1; | |
9023 | goto complex_expr_swap_order; | |
9024 | } | |
9025 | break; | |
9026 | } | |
41472af8 | 9027 | |
f994f296 MM |
9028 | /* Move the real (op0) and imaginary (op1) parts to their location. */ |
9029 | write_complex_part (target, op0, false); | |
9030 | write_complex_part (target, op1, true); | |
f47e9b4e | 9031 | |
f994f296 | 9032 | return target; |
dc6d66b3 | 9033 | |
f994f296 MM |
9034 | case WIDEN_SUM_EXPR: |
9035 | { | |
9036 | tree oprnd0 = treeop0; | |
9037 | tree oprnd1 = treeop1; | |
0d15e60c | 9038 | |
f994f296 MM |
9039 | expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL); |
9040 | target = expand_widen_pattern_expr (ops, op0, NULL_RTX, op1, | |
9041 | target, unsignedp); | |
9042 | return target; | |
bbf6f052 RK |
9043 | } |
9044 | ||
f994f296 MM |
9045 | case REDUC_MAX_EXPR: |
9046 | case REDUC_MIN_EXPR: | |
9047 | case REDUC_PLUS_EXPR: | |
d2af6a68 | 9048 | { |
f994f296 MM |
9049 | op0 = expand_normal (treeop0); |
9050 | this_optab = optab_for_tree_code (code, type, optab_default); | |
9051 | temp = expand_unop (mode, this_optab, op0, target, unsignedp); | |
9052 | gcc_assert (temp); | |
9053 | return temp; | |
9054 | } | |
d2af6a68 | 9055 | |
f994f296 MM |
9056 | case VEC_LSHIFT_EXPR: |
9057 | case VEC_RSHIFT_EXPR: | |
9058 | { | |
9059 | target = expand_vec_shift_expr (ops, target); | |
9060 | return target; | |
9061 | } | |
14a774a9 | 9062 | |
f994f296 MM |
9063 | case VEC_UNPACK_HI_EXPR: |
9064 | case VEC_UNPACK_LO_EXPR: | |
9065 | { | |
9066 | op0 = expand_normal (treeop0); | |
f994f296 MM |
9067 | temp = expand_widen_pattern_expr (ops, op0, NULL_RTX, NULL_RTX, |
9068 | target, unsignedp); | |
9069 | gcc_assert (temp); | |
9070 | return temp; | |
9071 | } | |
c3d32120 | 9072 | |
f994f296 MM |
9073 | case VEC_UNPACK_FLOAT_HI_EXPR: |
9074 | case VEC_UNPACK_FLOAT_LO_EXPR: | |
9075 | { | |
9076 | op0 = expand_normal (treeop0); | |
9077 | /* The signedness is determined from input operand. */ | |
f994f296 MM |
9078 | temp = expand_widen_pattern_expr |
9079 | (ops, op0, NULL_RTX, NULL_RTX, | |
9080 | target, TYPE_UNSIGNED (TREE_TYPE (treeop0))); | |
14a774a9 | 9081 | |
f994f296 MM |
9082 | gcc_assert (temp); |
9083 | return temp; | |
9084 | } | |
d6a5ac33 | 9085 | |
f994f296 MM |
9086 | case VEC_WIDEN_MULT_HI_EXPR: |
9087 | case VEC_WIDEN_MULT_LO_EXPR: | |
3f30a9a6 RH |
9088 | case VEC_WIDEN_MULT_EVEN_EXPR: |
9089 | case VEC_WIDEN_MULT_ODD_EXPR: | |
36ba4aae IR |
9090 | case VEC_WIDEN_LSHIFT_HI_EXPR: |
9091 | case VEC_WIDEN_LSHIFT_LO_EXPR: | |
3f30a9a6 RH |
9092 | expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1, EXPAND_NORMAL); |
9093 | target = expand_widen_pattern_expr (ops, op0, op1, NULL_RTX, | |
9094 | target, unsignedp); | |
9095 | gcc_assert (target); | |
9096 | return target; | |
36ba4aae | 9097 | |
f994f296 MM |
9098 | case VEC_PACK_TRUNC_EXPR: |
9099 | case VEC_PACK_SAT_EXPR: | |
9100 | case VEC_PACK_FIX_TRUNC_EXPR: | |
9101 | mode = TYPE_MODE (TREE_TYPE (treeop0)); | |
9102 | goto binop; | |
2205ed25 RH |
9103 | |
9104 | case VEC_PERM_EXPR: | |
22e4dee7 RH |
9105 | expand_operands (treeop0, treeop1, target, &op0, &op1, EXPAND_NORMAL); |
9106 | op2 = expand_normal (treeop2); | |
ccdfb0e2 RH |
9107 | |
9108 | /* Careful here: if the target doesn't support integral vector modes, | |
9109 | a constant selection vector could wind up smooshed into a normal | |
9110 | integral constant. */ | |
9111 | if (CONSTANT_P (op2) && GET_CODE (op2) != CONST_VECTOR) | |
9112 | { | |
9113 | tree sel_type = TREE_TYPE (treeop2); | |
9114 | enum machine_mode vmode | |
9115 | = mode_for_vector (TYPE_MODE (TREE_TYPE (sel_type)), | |
9116 | TYPE_VECTOR_SUBPARTS (sel_type)); | |
9117 | gcc_assert (GET_MODE_CLASS (vmode) == MODE_VECTOR_INT); | |
9118 | op2 = simplify_subreg (vmode, op2, TYPE_MODE (sel_type), 0); | |
9119 | gcc_assert (op2 && GET_CODE (op2) == CONST_VECTOR); | |
9120 | } | |
9121 | else | |
9122 | gcc_assert (GET_MODE_CLASS (GET_MODE (op2)) == MODE_VECTOR_INT); | |
9123 | ||
22e4dee7 RH |
9124 | temp = expand_vec_perm (mode, op0, op1, op2, target); |
9125 | gcc_assert (temp); | |
9126 | return temp; | |
bbf6f052 | 9127 | |
f471fe72 RG |
9128 | case DOT_PROD_EXPR: |
9129 | { | |
9130 | tree oprnd0 = treeop0; | |
9131 | tree oprnd1 = treeop1; | |
9132 | tree oprnd2 = treeop2; | |
9133 | rtx op2; | |
9134 | ||
9135 | expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL); | |
9136 | op2 = expand_normal (oprnd2); | |
9137 | target = expand_widen_pattern_expr (ops, op0, op1, op2, | |
9138 | target, unsignedp); | |
9139 | return target; | |
9140 | } | |
9141 | ||
79d652a5 CH |
9142 | case SAD_EXPR: |
9143 | { | |
9144 | tree oprnd0 = treeop0; | |
9145 | tree oprnd1 = treeop1; | |
9146 | tree oprnd2 = treeop2; | |
9147 | rtx op2; | |
9148 | ||
9149 | expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL); | |
9150 | op2 = expand_normal (oprnd2); | |
9151 | target = expand_widen_pattern_expr (ops, op0, op1, op2, | |
9152 | target, unsignedp); | |
9153 | return target; | |
9154 | } | |
9155 | ||
f471fe72 RG |
9156 | case REALIGN_LOAD_EXPR: |
9157 | { | |
9158 | tree oprnd0 = treeop0; | |
9159 | tree oprnd1 = treeop1; | |
9160 | tree oprnd2 = treeop2; | |
9161 | rtx op2; | |
9162 | ||
9163 | this_optab = optab_for_tree_code (code, type, optab_default); | |
9164 | expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL); | |
9165 | op2 = expand_normal (oprnd2); | |
9166 | temp = expand_ternary_op (mode, this_optab, op0, op1, op2, | |
9167 | target, unsignedp); | |
9168 | gcc_assert (temp); | |
9169 | return temp; | |
9170 | } | |
9171 | ||
4e71066d RG |
9172 | case COND_EXPR: |
9173 | /* A COND_EXPR with its type being VOID_TYPE represents a | |
9174 | conditional jump and is handled in | |
9175 | expand_gimple_cond_expr. */ | |
9176 | gcc_assert (!VOID_TYPE_P (type)); | |
9177 | ||
9178 | /* Note that COND_EXPRs whose type is a structure or union | |
9179 | are required to be constructed to contain assignments of | |
9180 | a temporary variable, so that we can evaluate them here | |
9181 | for side effect only. If type is void, we must do likewise. */ | |
9182 | ||
9183 | gcc_assert (!TREE_ADDRESSABLE (type) | |
9184 | && !ignore | |
9185 | && TREE_TYPE (treeop1) != void_type_node | |
9186 | && TREE_TYPE (treeop2) != void_type_node); | |
9187 | ||
683c600b AP |
9188 | temp = expand_cond_expr_using_cmove (treeop0, treeop1, treeop2); |
9189 | if (temp) | |
9190 | return temp; | |
9191 | ||
4e71066d RG |
9192 | /* If we are not to produce a result, we have no target. Otherwise, |
9193 | if a target was specified use it; it will not be used as an | |
9194 | intermediate target unless it is safe. If no target, use a | |
9195 | temporary. */ | |
9196 | ||
9197 | if (modifier != EXPAND_STACK_PARM | |
9198 | && original_target | |
9199 | && safe_from_p (original_target, treeop0, 1) | |
9200 | && GET_MODE (original_target) == mode | |
4e71066d RG |
9201 | && !MEM_P (original_target)) |
9202 | temp = original_target; | |
9203 | else | |
9474e8ab | 9204 | temp = assign_temp (type, 0, 1); |
4e71066d RG |
9205 | |
9206 | do_pending_stack_adjust (); | |
9207 | NO_DEFER_POP; | |
9208 | op0 = gen_label_rtx (); | |
9209 | op1 = gen_label_rtx (); | |
9210 | jumpifnot (treeop0, op0, -1); | |
9211 | store_expr (treeop1, temp, | |
9212 | modifier == EXPAND_STACK_PARM, | |
9213 | false); | |
9214 | ||
9215 | emit_jump_insn (gen_jump (op1)); | |
9216 | emit_barrier (); | |
9217 | emit_label (op0); | |
9218 | store_expr (treeop2, temp, | |
9219 | modifier == EXPAND_STACK_PARM, | |
9220 | false); | |
9221 | ||
9222 | emit_label (op1); | |
9223 | OK_DEFER_POP; | |
9224 | return temp; | |
9225 | ||
9226 | case VEC_COND_EXPR: | |
9227 | target = expand_vec_cond_expr (type, treeop0, treeop1, treeop2, target); | |
9228 | return target; | |
9229 | ||
f994f296 MM |
9230 | default: |
9231 | gcc_unreachable (); | |
9232 | } | |
d6a5ac33 | 9233 | |
f994f296 MM |
9234 | /* Here to do an ordinary binary operator. */ |
9235 | binop: | |
9236 | expand_operands (treeop0, treeop1, | |
9237 | subtarget, &op0, &op1, EXPAND_NORMAL); | |
9238 | binop2: | |
9239 | this_optab = optab_for_tree_code (code, type, optab_default); | |
9240 | binop3: | |
9241 | if (modifier == EXPAND_STACK_PARM) | |
9242 | target = 0; | |
9243 | temp = expand_binop (mode, this_optab, op0, op1, target, | |
e05531ef | 9244 | unsignedp, OPTAB_LIB_WIDEN); |
f994f296 | 9245 | gcc_assert (temp); |
d906fd7f RG |
9246 | /* Bitwise operations do not need bitfield reduction as we expect their |
9247 | operands being properly truncated. */ | |
9248 | if (code == BIT_XOR_EXPR | |
9249 | || code == BIT_AND_EXPR | |
9250 | || code == BIT_IOR_EXPR) | |
9251 | return temp; | |
f994f296 MM |
9252 | return REDUCE_BIT_FIELD (temp); |
9253 | } | |
9254 | #undef REDUCE_BIT_FIELD | |
7f62854a | 9255 | |
78bca40d AM |
9256 | |
9257 | /* Return TRUE if expression STMT is suitable for replacement. | |
9258 | Never consider memory loads as replaceable, because those don't ever lead | |
9259 | into constant expressions. */ | |
9260 | ||
9261 | static bool | |
9262 | stmt_is_replaceable_p (gimple stmt) | |
9263 | { | |
9264 | if (ssa_is_replaceable_p (stmt)) | |
9265 | { | |
9266 | /* Don't move around loads. */ | |
9267 | if (!gimple_assign_single_p (stmt) | |
9268 | || is_gimple_val (gimple_assign_rhs1 (stmt))) | |
9269 | return true; | |
9270 | } | |
9271 | return false; | |
9272 | } | |
9273 | ||
28ed065e | 9274 | rtx |
f994f296 | 9275 | expand_expr_real_1 (tree exp, rtx target, enum machine_mode tmode, |
4c437f02 BE |
9276 | enum expand_modifier modifier, rtx *alt_rtl, |
9277 | bool inner_reference_p) | |
f994f296 MM |
9278 | { |
9279 | rtx op0, op1, temp, decl_rtl; | |
9280 | tree type; | |
9281 | int unsignedp; | |
9282 | enum machine_mode mode; | |
9283 | enum tree_code code = TREE_CODE (exp); | |
f994f296 MM |
9284 | rtx subtarget, original_target; |
9285 | int ignore; | |
9286 | tree context; | |
9287 | bool reduce_bit_field; | |
9288 | location_t loc = EXPR_LOCATION (exp); | |
9289 | struct separate_ops ops; | |
9290 | tree treeop0, treeop1, treeop2; | |
d36d83e9 EB |
9291 | tree ssa_name = NULL_TREE; |
9292 | gimple g; | |
7f62854a | 9293 | |
f994f296 MM |
9294 | type = TREE_TYPE (exp); |
9295 | mode = TYPE_MODE (type); | |
9296 | unsignedp = TYPE_UNSIGNED (type); | |
7f62854a | 9297 | |
f994f296 MM |
9298 | treeop0 = treeop1 = treeop2 = NULL_TREE; |
9299 | if (!VL_EXP_CLASS_P (exp)) | |
9300 | switch (TREE_CODE_LENGTH (code)) | |
9301 | { | |
9302 | default: | |
9303 | case 3: treeop2 = TREE_OPERAND (exp, 2); | |
9304 | case 2: treeop1 = TREE_OPERAND (exp, 1); | |
9305 | case 1: treeop0 = TREE_OPERAND (exp, 0); | |
9306 | case 0: break; | |
9307 | } | |
9308 | ops.code = code; | |
9309 | ops.type = type; | |
9310 | ops.op0 = treeop0; | |
9311 | ops.op1 = treeop1; | |
9312 | ops.op2 = treeop2; | |
9313 | ops.location = loc; | |
12342f90 | 9314 | |
f994f296 MM |
9315 | ignore = (target == const0_rtx |
9316 | || ((CONVERT_EXPR_CODE_P (code) | |
9317 | || code == COND_EXPR || code == VIEW_CONVERT_EXPR) | |
9318 | && TREE_CODE (type) == VOID_TYPE)); | |
fdf473ae | 9319 | |
f994f296 MM |
9320 | /* An operation in what may be a bit-field type needs the |
9321 | result to be reduced to the precision of the bit-field type, | |
9322 | which is narrower than that of the type's mode. */ | |
9323 | reduce_bit_field = (!ignore | |
a577c405 | 9324 | && INTEGRAL_TYPE_P (type) |
f994f296 | 9325 | && GET_MODE_PRECISION (mode) > TYPE_PRECISION (type)); |
12342f90 | 9326 | |
f994f296 MM |
9327 | /* If we are going to ignore this result, we need only do something |
9328 | if there is a side-effect somewhere in the expression. If there | |
9329 | is, short-circuit the most common cases here. Note that we must | |
9330 | not call expand_expr with anything but const0_rtx in case this | |
9331 | is an initial expansion of a size that contains a PLACEHOLDER_EXPR. */ | |
d6a5ac33 | 9332 | |
f994f296 MM |
9333 | if (ignore) |
9334 | { | |
9335 | if (! TREE_SIDE_EFFECTS (exp)) | |
9336 | return const0_rtx; | |
9337 | ||
9338 | /* Ensure we reference a volatile object even if value is ignored, but | |
9339 | don't do this if all we are doing is taking its address. */ | |
9340 | if (TREE_THIS_VOLATILE (exp) | |
9341 | && TREE_CODE (exp) != FUNCTION_DECL | |
9342 | && mode != VOIDmode && mode != BLKmode | |
9343 | && modifier != EXPAND_CONST_ADDRESS) | |
7acda552 | 9344 | { |
f994f296 MM |
9345 | temp = expand_expr (exp, NULL_RTX, VOIDmode, modifier); |
9346 | if (MEM_P (temp)) | |
e16b6fd0 | 9347 | copy_to_reg (temp); |
f994f296 | 9348 | return const0_rtx; |
7acda552 RK |
9349 | } |
9350 | ||
f994f296 | 9351 | if (TREE_CODE_CLASS (code) == tcc_unary |
ea814c66 EB |
9352 | || code == BIT_FIELD_REF |
9353 | || code == COMPONENT_REF | |
9354 | || code == INDIRECT_REF) | |
f994f296 MM |
9355 | return expand_expr (treeop0, const0_rtx, VOIDmode, |
9356 | modifier); | |
e675826d | 9357 | |
f994f296 MM |
9358 | else if (TREE_CODE_CLASS (code) == tcc_binary |
9359 | || TREE_CODE_CLASS (code) == tcc_comparison | |
9360 | || code == ARRAY_REF || code == ARRAY_RANGE_REF) | |
9361 | { | |
9362 | expand_expr (treeop0, const0_rtx, VOIDmode, modifier); | |
9363 | expand_expr (treeop1, const0_rtx, VOIDmode, modifier); | |
9364 | return const0_rtx; | |
9365 | } | |
e675826d | 9366 | |
f994f296 MM |
9367 | target = 0; |
9368 | } | |
e675826d | 9369 | |
f994f296 MM |
9370 | if (reduce_bit_field && modifier == EXPAND_STACK_PARM) |
9371 | target = 0; | |
e675826d | 9372 | |
f994f296 MM |
9373 | /* Use subtarget as the target for operand 0 of a binary operation. */ |
9374 | subtarget = get_subtarget (target); | |
9375 | original_target = target; | |
e675826d | 9376 | |
f994f296 MM |
9377 | switch (code) |
9378 | { | |
9379 | case LABEL_DECL: | |
9380 | { | |
9381 | tree function = decl_function_context (exp); | |
e675826d | 9382 | |
f994f296 MM |
9383 | temp = label_rtx (exp); |
9384 | temp = gen_rtx_LABEL_REF (Pmode, temp); | |
e675826d | 9385 | |
f994f296 MM |
9386 | if (function != current_function_decl |
9387 | && function != 0) | |
9388 | LABEL_REF_NONLOCAL_P (temp) = 1; | |
9389 | ||
9390 | temp = gen_rtx_MEM (FUNCTION_MODE, temp); | |
9391 | return temp; | |
e675826d EB |
9392 | } |
9393 | ||
f994f296 MM |
9394 | case SSA_NAME: |
9395 | /* ??? ivopts calls expander, without any preparation from | |
9396 | out-of-ssa. So fake instructions as if this was an access to the | |
9397 | base variable. This unnecessarily allocates a pseudo, see how we can | |
9398 | reuse it, if partition base vars have it set already. */ | |
9399 | if (!currently_expanding_to_rtl) | |
70b5e7dc RG |
9400 | { |
9401 | tree var = SSA_NAME_VAR (exp); | |
9402 | if (var && DECL_RTL_SET_P (var)) | |
9403 | return DECL_RTL (var); | |
9404 | return gen_raw_REG (TYPE_MODE (TREE_TYPE (exp)), | |
9405 | LAST_VIRTUAL_REGISTER + 1); | |
9406 | } | |
d36d83e9 EB |
9407 | |
9408 | g = get_gimple_for_ssa_name (exp); | |
dcde5957 JJ |
9409 | /* For EXPAND_INITIALIZER try harder to get something simpler. */ |
9410 | if (g == NULL | |
9411 | && modifier == EXPAND_INITIALIZER | |
9412 | && !SSA_NAME_IS_DEFAULT_DEF (exp) | |
9413 | && (optimize || DECL_IGNORED_P (SSA_NAME_VAR (exp))) | |
9414 | && stmt_is_replaceable_p (SSA_NAME_DEF_STMT (exp))) | |
9415 | g = SSA_NAME_DEF_STMT (exp); | |
d36d83e9 | 9416 | if (g) |
7bc14a04 | 9417 | { |
29f5bccb | 9418 | rtx r; |
d2d11532 RB |
9419 | ops.code = gimple_assign_rhs_code (g); |
9420 | switch (get_gimple_rhs_class (ops.code)) | |
9421 | { | |
9422 | case GIMPLE_TERNARY_RHS: | |
9423 | ops.op2 = gimple_assign_rhs3 (g); | |
9424 | /* Fallthru */ | |
9425 | case GIMPLE_BINARY_RHS: | |
9426 | ops.op1 = gimple_assign_rhs2 (g); | |
9427 | /* Fallthru */ | |
9428 | case GIMPLE_UNARY_RHS: | |
9429 | ops.op0 = gimple_assign_rhs1 (g); | |
9430 | ops.type = TREE_TYPE (gimple_assign_lhs (g)); | |
9431 | ops.location = gimple_location (g); | |
9432 | r = expand_expr_real_2 (&ops, target, tmode, modifier); | |
9433 | break; | |
9434 | case GIMPLE_SINGLE_RHS: | |
9435 | { | |
9436 | location_t saved_loc = curr_insn_location (); | |
9437 | set_curr_insn_location (gimple_location (g)); | |
9438 | r = expand_expr_real (gimple_assign_rhs1 (g), target, | |
9439 | tmode, modifier, NULL, inner_reference_p); | |
9440 | set_curr_insn_location (saved_loc); | |
9441 | break; | |
9442 | } | |
9443 | default: | |
9444 | gcc_unreachable (); | |
9445 | } | |
7bc14a04 PB |
9446 | if (REG_P (r) && !REG_EXPR (r)) |
9447 | set_reg_attrs_for_decl_rtl (SSA_NAME_VAR (exp), r); | |
9448 | return r; | |
9449 | } | |
d36d83e9 EB |
9450 | |
9451 | ssa_name = exp; | |
9452 | decl_rtl = get_rtx_for_ssa_name (ssa_name); | |
9453 | exp = SSA_NAME_VAR (ssa_name); | |
f994f296 | 9454 | goto expand_decl_rtl; |
ed239f5a | 9455 | |
f994f296 MM |
9456 | case PARM_DECL: |
9457 | case VAR_DECL: | |
9458 | /* If a static var's type was incomplete when the decl was written, | |
9459 | but the type is complete now, lay out the decl now. */ | |
9460 | if (DECL_SIZE (exp) == 0 | |
9461 | && COMPLETE_OR_UNBOUND_ARRAY_TYPE_P (TREE_TYPE (exp)) | |
9462 | && (TREE_STATIC (exp) || DECL_EXTERNAL (exp))) | |
9463 | layout_decl (exp, 0); | |
9464 | ||
f994f296 | 9465 | /* ... fall through ... */ |
ed239f5a | 9466 | |
f994f296 MM |
9467 | case FUNCTION_DECL: |
9468 | case RESULT_DECL: | |
9469 | decl_rtl = DECL_RTL (exp); | |
9470 | expand_decl_rtl: | |
9471 | gcc_assert (decl_rtl); | |
9472 | decl_rtl = copy_rtx (decl_rtl); | |
b748fbd6 | 9473 | /* Record writes to register variables. */ |
d108e679 AS |
9474 | if (modifier == EXPAND_WRITE |
9475 | && REG_P (decl_rtl) | |
9476 | && HARD_REGISTER_P (decl_rtl)) | |
9477 | add_to_hard_reg_set (&crtl->asm_clobbers, | |
9478 | GET_MODE (decl_rtl), REGNO (decl_rtl)); | |
ed239f5a | 9479 | |
f994f296 MM |
9480 | /* Ensure variable marked as used even if it doesn't go through |
9481 | a parser. If it hasn't be used yet, write out an external | |
9482 | definition. */ | |
bbee5843 | 9483 | TREE_USED (exp) = 1; |
ed239f5a | 9484 | |
f994f296 MM |
9485 | /* Show we haven't gotten RTL for this yet. */ |
9486 | temp = 0; | |
ed239f5a | 9487 | |
f994f296 MM |
9488 | /* Variables inherited from containing functions should have |
9489 | been lowered by this point. */ | |
9490 | context = decl_function_context (exp); | |
3fd0303a | 9491 | gcc_assert (SCOPE_FILE_SCOPE_P (context) |
f994f296 MM |
9492 | || context == current_function_decl |
9493 | || TREE_STATIC (exp) | |
bd39cb52 | 9494 | || DECL_EXTERNAL (exp) |
f994f296 MM |
9495 | /* ??? C++ creates functions that are not TREE_STATIC. */ |
9496 | || TREE_CODE (exp) == FUNCTION_DECL); | |
ed239f5a | 9497 | |
f994f296 MM |
9498 | /* This is the case of an array whose size is to be determined |
9499 | from its initializer, while the initializer is still being parsed. | |
9474e8ab | 9500 | ??? We aren't parsing while expanding anymore. */ |
c11c10d8 | 9501 | |
f994f296 MM |
9502 | if (MEM_P (decl_rtl) && REG_P (XEXP (decl_rtl, 0))) |
9503 | temp = validize_mem (decl_rtl); | |
ed239f5a | 9504 | |
f994f296 MM |
9505 | /* If DECL_RTL is memory, we are in the normal case and the |
9506 | address is not valid, get the address into a register. */ | |
0fb7aeda | 9507 | |
f994f296 MM |
9508 | else if (MEM_P (decl_rtl) && modifier != EXPAND_INITIALIZER) |
9509 | { | |
9510 | if (alt_rtl) | |
9511 | *alt_rtl = decl_rtl; | |
9512 | decl_rtl = use_anchored_address (decl_rtl); | |
9513 | if (modifier != EXPAND_CONST_ADDRESS | |
9514 | && modifier != EXPAND_SUM | |
09e881c9 BE |
9515 | && !memory_address_addr_space_p (DECL_MODE (exp), |
9516 | XEXP (decl_rtl, 0), | |
9517 | MEM_ADDR_SPACE (decl_rtl))) | |
f994f296 MM |
9518 | temp = replace_equiv_address (decl_rtl, |
9519 | copy_rtx (XEXP (decl_rtl, 0))); | |
ed239f5a RK |
9520 | } |
9521 | ||
f994f296 MM |
9522 | /* If we got something, return it. But first, set the alignment |
9523 | if the address is a register. */ | |
9524 | if (temp != 0) | |
9525 | { | |
9526 | if (MEM_P (temp) && REG_P (XEXP (temp, 0))) | |
9527 | mark_reg_pointer (XEXP (temp, 0), DECL_ALIGN (exp)); | |
ed239f5a | 9528 | |
f994f296 MM |
9529 | return temp; |
9530 | } | |
5be014d5 | 9531 | |
2ba87a29 RS |
9532 | /* If the mode of DECL_RTL does not match that of the decl, |
9533 | there are two cases: we are dealing with a BLKmode value | |
9534 | that is returned in a register, or we are dealing with | |
9535 | a promoted value. In the latter case, return a SUBREG | |
9536 | of the wanted mode, but mark it so that we know that it | |
9537 | was already extended. */ | |
9538 | if (REG_P (decl_rtl) | |
9539 | && DECL_MODE (exp) != BLKmode | |
9540 | && GET_MODE (decl_rtl) != DECL_MODE (exp)) | |
7f9844ca | 9541 | { |
f994f296 | 9542 | enum machine_mode pmode; |
7f9844ca | 9543 | |
d36d83e9 EB |
9544 | /* Get the signedness to be used for this variable. Ensure we get |
9545 | the same mode we got when the variable was declared. */ | |
9546 | if (code == SSA_NAME | |
9547 | && (g = SSA_NAME_DEF_STMT (ssa_name)) | |
67f95586 MP |
9548 | && gimple_code (g) == GIMPLE_CALL |
9549 | && !gimple_call_internal_p (g)) | |
9550 | pmode = promote_function_mode (type, mode, &unsignedp, | |
9551 | gimple_call_fntype (g), | |
9552 | 2); | |
d36d83e9 EB |
9553 | else |
9554 | pmode = promote_decl_mode (exp, &unsignedp); | |
f994f296 MM |
9555 | gcc_assert (GET_MODE (decl_rtl) == pmode); |
9556 | ||
9557 | temp = gen_lowpart_SUBREG (mode, decl_rtl); | |
9558 | SUBREG_PROMOTED_VAR_P (temp) = 1; | |
27be0c32 | 9559 | SUBREG_PROMOTED_SET (temp, unsignedp); |
f994f296 | 9560 | return temp; |
7f9844ca RS |
9561 | } |
9562 | ||
f994f296 | 9563 | return decl_rtl; |
bbf6f052 | 9564 | |
f994f296 | 9565 | case INTEGER_CST: |
807e902e KZ |
9566 | /* Given that TYPE_PRECISION (type) is not always equal to |
9567 | GET_MODE_PRECISION (TYPE_MODE (type)), we need to extend from | |
9568 | the former to the latter according to the signedness of the | |
9569 | type. */ | |
9570 | temp = immed_wide_int_const (wide_int::from | |
9571 | (exp, | |
9572 | GET_MODE_PRECISION (TYPE_MODE (type)), | |
9573 | TYPE_SIGN (type)), | |
9574 | TYPE_MODE (type)); | |
f994f296 | 9575 | return temp; |
bbf6f052 | 9576 | |
f994f296 MM |
9577 | case VECTOR_CST: |
9578 | { | |
9579 | tree tmp = NULL_TREE; | |
9580 | if (GET_MODE_CLASS (mode) == MODE_VECTOR_INT | |
9581 | || GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT | |
9582 | || GET_MODE_CLASS (mode) == MODE_VECTOR_FRACT | |
9583 | || GET_MODE_CLASS (mode) == MODE_VECTOR_UFRACT | |
9584 | || GET_MODE_CLASS (mode) == MODE_VECTOR_ACCUM | |
9585 | || GET_MODE_CLASS (mode) == MODE_VECTOR_UACCUM) | |
9586 | return const_vector_from_tree (exp); | |
9587 | if (GET_MODE_CLASS (mode) == MODE_INT) | |
9588 | { | |
9589 | tree type_for_mode = lang_hooks.types.type_for_mode (mode, 1); | |
9590 | if (type_for_mode) | |
9591 | tmp = fold_unary_loc (loc, VIEW_CONVERT_EXPR, type_for_mode, exp); | |
9592 | } | |
9593 | if (!tmp) | |
d2a12ae7 | 9594 | { |
9771b263 | 9595 | vec<constructor_elt, va_gc> *v; |
d2a12ae7 | 9596 | unsigned i; |
9771b263 | 9597 | vec_alloc (v, VECTOR_CST_NELTS (exp)); |
d2a12ae7 RG |
9598 | for (i = 0; i < VECTOR_CST_NELTS (exp); ++i) |
9599 | CONSTRUCTOR_APPEND_ELT (v, NULL_TREE, VECTOR_CST_ELT (exp, i)); | |
9600 | tmp = build_constructor (type, v); | |
9601 | } | |
f994f296 MM |
9602 | return expand_expr (tmp, ignore ? const0_rtx : target, |
9603 | tmode, modifier); | |
9604 | } | |
bbf6f052 | 9605 | |
f994f296 MM |
9606 | case CONST_DECL: |
9607 | return expand_expr (DECL_INITIAL (exp), target, VOIDmode, modifier); | |
bbf6f052 | 9608 | |
f994f296 MM |
9609 | case REAL_CST: |
9610 | /* If optimized, generate immediate CONST_DOUBLE | |
9611 | which will be turned into memory by reload if necessary. | |
cbbc503e | 9612 | |
f994f296 MM |
9613 | We used to force a register so that loop.c could see it. But |
9614 | this does not allow gen_* patterns to perform optimizations with | |
9615 | the constants. It also produces two insns in cases like "x = 1.0;". | |
9616 | On most machines, floating-point constants are not permitted in | |
9617 | many insns, so we'd end up copying it to a register in any case. | |
bbf6f052 | 9618 | |
f994f296 MM |
9619 | Now, we do the copying in expand_binop, if appropriate. */ |
9620 | return CONST_DOUBLE_FROM_REAL_VALUE (TREE_REAL_CST (exp), | |
9621 | TYPE_MODE (TREE_TYPE (exp))); | |
cbbc503e | 9622 | |
f994f296 MM |
9623 | case FIXED_CST: |
9624 | return CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (exp), | |
9625 | TYPE_MODE (TREE_TYPE (exp))); | |
bbf6f052 | 9626 | |
f994f296 MM |
9627 | case COMPLEX_CST: |
9628 | /* Handle evaluating a complex constant in a CONCAT target. */ | |
9629 | if (original_target && GET_CODE (original_target) == CONCAT) | |
4ef7870a | 9630 | { |
f994f296 MM |
9631 | enum machine_mode mode = TYPE_MODE (TREE_TYPE (TREE_TYPE (exp))); |
9632 | rtx rtarg, itarg; | |
9633 | ||
9634 | rtarg = XEXP (original_target, 0); | |
9635 | itarg = XEXP (original_target, 1); | |
9636 | ||
9637 | /* Move the real and imaginary parts separately. */ | |
9638 | op0 = expand_expr (TREE_REALPART (exp), rtarg, mode, EXPAND_NORMAL); | |
9639 | op1 = expand_expr (TREE_IMAGPART (exp), itarg, mode, EXPAND_NORMAL); | |
9640 | ||
9641 | if (op0 != rtarg) | |
9642 | emit_move_insn (rtarg, op0); | |
9643 | if (op1 != itarg) | |
9644 | emit_move_insn (itarg, op1); | |
9645 | ||
9646 | return original_target; | |
4ef7870a | 9647 | } |
bbf6f052 | 9648 | |
f994f296 | 9649 | /* ... fall through ... */ |
bbf6f052 | 9650 | |
f994f296 MM |
9651 | case STRING_CST: |
9652 | temp = expand_expr_constant (exp, 1, modifier); | |
14661f36 | 9653 | |
f994f296 MM |
9654 | /* temp contains a constant address. |
9655 | On RISC machines where a constant address isn't valid, | |
9656 | make some insns to get that address into a register. */ | |
9657 | if (modifier != EXPAND_CONST_ADDRESS | |
9658 | && modifier != EXPAND_INITIALIZER | |
9659 | && modifier != EXPAND_SUM | |
09e881c9 BE |
9660 | && ! memory_address_addr_space_p (mode, XEXP (temp, 0), |
9661 | MEM_ADDR_SPACE (temp))) | |
f994f296 MM |
9662 | return replace_equiv_address (temp, |
9663 | copy_rtx (XEXP (temp, 0))); | |
9664 | return temp; | |
14661f36 | 9665 | |
f994f296 MM |
9666 | case SAVE_EXPR: |
9667 | { | |
9668 | tree val = treeop0; | |
4c437f02 BE |
9669 | rtx ret = expand_expr_real_1 (val, target, tmode, modifier, alt_rtl, |
9670 | inner_reference_p); | |
ea87523e | 9671 | |
f994f296 MM |
9672 | if (!SAVE_EXPR_RESOLVED_P (exp)) |
9673 | { | |
9674 | /* We can indeed still hit this case, typically via builtin | |
9675 | expanders calling save_expr immediately before expanding | |
9676 | something. Assume this means that we only have to deal | |
9677 | with non-BLKmode values. */ | |
9678 | gcc_assert (GET_MODE (ret) != BLKmode); | |
ae431183 | 9679 | |
29f5bccb | 9680 | val = build_decl (curr_insn_location (), |
f994f296 MM |
9681 | VAR_DECL, NULL, TREE_TYPE (exp)); |
9682 | DECL_ARTIFICIAL (val) = 1; | |
9683 | DECL_IGNORED_P (val) = 1; | |
9684 | treeop0 = val; | |
9685 | TREE_OPERAND (exp, 0) = treeop0; | |
9686 | SAVE_EXPR_RESOLVED_P (exp) = 1; | |
1717e19e | 9687 | |
f994f296 MM |
9688 | if (!CONSTANT_P (ret)) |
9689 | ret = copy_to_reg (ret); | |
9690 | SET_DECL_RTL (val, ret); | |
9691 | } | |
1717e19e | 9692 | |
f994f296 MM |
9693 | return ret; |
9694 | } | |
9695 | ||
f994f296 MM |
9696 | |
9697 | case CONSTRUCTOR: | |
9698 | /* If we don't need the result, just ensure we evaluate any | |
9699 | subexpressions. */ | |
9700 | if (ignore) | |
1717e19e | 9701 | { |
f994f296 MM |
9702 | unsigned HOST_WIDE_INT idx; |
9703 | tree value; | |
9704 | ||
9705 | FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp), idx, value) | |
9706 | expand_expr (value, const0_rtx, VOIDmode, EXPAND_NORMAL); | |
9707 | ||
9708 | return const0_rtx; | |
1717e19e UW |
9709 | } |
9710 | ||
f994f296 | 9711 | return expand_constructor (exp, target, modifier, false); |
bbf6f052 | 9712 | |
be1ac4ec | 9713 | case TARGET_MEM_REF: |
f994f296 | 9714 | { |
e831c1e8 RG |
9715 | addr_space_t as |
9716 | = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0)))); | |
28164eed | 9717 | enum insn_code icode; |
cab35794 | 9718 | unsigned int align; |
09e881c9 | 9719 | |
c1bf2a39 | 9720 | op0 = addr_for_mem_ref (exp, as, true); |
09e881c9 | 9721 | op0 = memory_address_addr_space (mode, op0, as); |
f994f296 | 9722 | temp = gen_rtx_MEM (mode, op0); |
f994f296 | 9723 | set_mem_attributes (temp, exp, 0); |
09e881c9 | 9724 | set_mem_addr_space (temp, as); |
b0f4a35f | 9725 | align = get_object_alignment (exp); |
02f6574b | 9726 | if (modifier != EXPAND_WRITE |
7bcc6e75 | 9727 | && modifier != EXPAND_MEMORY |
02f6574b | 9728 | && mode != BLKmode |
cab35794 | 9729 | && align < GET_MODE_ALIGNMENT (mode) |
be1ac4ec RG |
9730 | /* If the target does not have special handling for unaligned |
9731 | loads of mode then it can use regular moves for them. */ | |
9732 | && ((icode = optab_handler (movmisalign_optab, mode)) | |
9733 | != CODE_FOR_nothing)) | |
f994f296 | 9734 | { |
28164eed | 9735 | struct expand_operand ops[2]; |
8403445a | 9736 | |
f994f296 | 9737 | /* We've already validated the memory, and we're creating a |
28164eed RS |
9738 | new pseudo destination. The predicates really can't fail, |
9739 | nor can the generator. */ | |
9740 | create_output_operand (&ops[0], NULL_RTX, mode); | |
9741 | create_fixed_operand (&ops[1], temp); | |
9742 | expand_insn (icode, 2, ops); | |
a53f90ad | 9743 | temp = ops[0].value; |
f994f296 | 9744 | } |
f994f296 MM |
9745 | return temp; |
9746 | } | |
9747 | ||
70f34814 RG |
9748 | case MEM_REF: |
9749 | { | |
9750 | addr_space_t as | |
e831c1e8 | 9751 | = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0)))); |
70f34814 RG |
9752 | enum machine_mode address_mode; |
9753 | tree base = TREE_OPERAND (exp, 0); | |
75421dcd | 9754 | gimple def_stmt; |
28164eed | 9755 | enum insn_code icode; |
cab35794 | 9756 | unsigned align; |
70f34814 RG |
9757 | /* Handle expansion of non-aliased memory with non-BLKmode. That |
9758 | might end up in a register. */ | |
22345357 | 9759 | if (mem_ref_refers_to_non_mem_p (exp)) |
70f34814 | 9760 | { |
807e902e | 9761 | HOST_WIDE_INT offset = mem_ref_offset (exp).to_short_addr (); |
70f34814 | 9762 | base = TREE_OPERAND (base, 0); |
22345357 | 9763 | if (offset == 0 |
cc269bb6 | 9764 | && tree_fits_uhwi_p (TYPE_SIZE (type)) |
22345357 | 9765 | && (GET_MODE_BITSIZE (DECL_MODE (base)) |
eb1ce453 | 9766 | == tree_to_uhwi (TYPE_SIZE (type)))) |
a53f90ad | 9767 | return expand_expr (build1 (VIEW_CONVERT_EXPR, type, base), |
22345357 | 9768 | target, tmode, modifier); |
a53f90ad | 9769 | if (TYPE_MODE (type) == BLKmode) |
70f34814 | 9770 | { |
22345357 | 9771 | temp = assign_stack_temp (DECL_MODE (base), |
9474e8ab | 9772 | GET_MODE_SIZE (DECL_MODE (base))); |
22345357 RG |
9773 | store_expr (base, temp, 0, false); |
9774 | temp = adjust_address (temp, BLKmode, offset); | |
a53f90ad | 9775 | set_mem_size (temp, int_size_in_bytes (type)); |
22345357 | 9776 | return temp; |
70f34814 | 9777 | } |
a53f90ad EB |
9778 | exp = build3 (BIT_FIELD_REF, type, base, TYPE_SIZE (type), |
9779 | bitsize_int (offset * BITS_PER_UNIT)); | |
9780 | return expand_expr (exp, target, tmode, modifier); | |
70f34814 RG |
9781 | } |
9782 | address_mode = targetm.addr_space.address_mode (as); | |
75421dcd RG |
9783 | base = TREE_OPERAND (exp, 0); |
9784 | if ((def_stmt = get_def_for_expr (base, BIT_AND_EXPR))) | |
be1ac4ec RG |
9785 | { |
9786 | tree mask = gimple_assign_rhs2 (def_stmt); | |
9787 | base = build2 (BIT_AND_EXPR, TREE_TYPE (base), | |
9788 | gimple_assign_rhs1 (def_stmt), mask); | |
9789 | TREE_OPERAND (exp, 0) = base; | |
9790 | } | |
b0f4a35f | 9791 | align = get_object_alignment (exp); |
ee01a467 | 9792 | op0 = expand_expr (base, NULL_RTX, VOIDmode, EXPAND_SUM); |
ca9f3779 | 9793 | op0 = memory_address_addr_space (mode, op0, as); |
70f34814 | 9794 | if (!integer_zerop (TREE_OPERAND (exp, 1))) |
b4351367 | 9795 | { |
807e902e | 9796 | rtx off = immed_wide_int_const (mem_ref_offset (exp), address_mode); |
b4351367 | 9797 | op0 = simplify_gen_binary (PLUS, address_mode, op0, off); |
96f1f3fa | 9798 | op0 = memory_address_addr_space (mode, op0, as); |
b4351367 | 9799 | } |
70f34814 RG |
9800 | temp = gen_rtx_MEM (mode, op0); |
9801 | set_mem_attributes (temp, exp, 0); | |
9802 | set_mem_addr_space (temp, as); | |
9803 | if (TREE_THIS_VOLATILE (exp)) | |
9804 | MEM_VOLATILE_P (temp) = 1; | |
02f6574b | 9805 | if (modifier != EXPAND_WRITE |
7bcc6e75 | 9806 | && modifier != EXPAND_MEMORY |
4c437f02 | 9807 | && !inner_reference_p |
02f6574b | 9808 | && mode != BLKmode |
0a1c20dc | 9809 | && align < GET_MODE_ALIGNMENT (mode)) |
be1ac4ec | 9810 | { |
0a1c20dc MJ |
9811 | if ((icode = optab_handler (movmisalign_optab, mode)) |
9812 | != CODE_FOR_nothing) | |
9813 | { | |
9814 | struct expand_operand ops[2]; | |
9815 | ||
9816 | /* We've already validated the memory, and we're creating a | |
9817 | new pseudo destination. The predicates really can't fail, | |
9818 | nor can the generator. */ | |
9819 | create_output_operand (&ops[0], NULL_RTX, mode); | |
9820 | create_fixed_operand (&ops[1], temp); | |
9821 | expand_insn (icode, 2, ops); | |
a53f90ad | 9822 | temp = ops[0].value; |
0a1c20dc MJ |
9823 | } |
9824 | else if (SLOW_UNALIGNED_ACCESS (mode, align)) | |
9825 | temp = extract_bit_field (temp, GET_MODE_BITSIZE (mode), | |
9826 | 0, TYPE_UNSIGNED (TREE_TYPE (exp)), | |
c6285bd7 SL |
9827 | (modifier == EXPAND_STACK_PARM |
9828 | ? NULL_RTX : target), | |
0a1c20dc | 9829 | mode, mode); |
be1ac4ec | 9830 | } |
70f34814 RG |
9831 | return temp; |
9832 | } | |
9833 | ||
f994f296 MM |
9834 | case ARRAY_REF: |
9835 | ||
9836 | { | |
9837 | tree array = treeop0; | |
9838 | tree index = treeop1; | |
33be0bec | 9839 | tree init; |
f994f296 MM |
9840 | |
9841 | /* Fold an expression like: "foo"[2]. | |
9842 | This is not done in fold so it won't happen inside &. | |
9843 | Don't fold if this is for wide characters since it's too | |
9844 | difficult to do correctly and this is a very rare case. */ | |
9845 | ||
9846 | if (modifier != EXPAND_CONST_ADDRESS | |
9847 | && modifier != EXPAND_INITIALIZER | |
9848 | && modifier != EXPAND_MEMORY) | |
9849 | { | |
9850 | tree t = fold_read_from_constant_string (exp); | |
9851 | ||
9852 | if (t) | |
9853 | return expand_expr (t, target, tmode, modifier); | |
9854 | } | |
9855 | ||
9856 | /* If this is a constant index into a constant array, | |
9857 | just get the value from the array. Handle both the cases when | |
9858 | we have an explicit constructor and when our operand is a variable | |
9859 | that was declared const. */ | |
9860 | ||
9861 | if (modifier != EXPAND_CONST_ADDRESS | |
9862 | && modifier != EXPAND_INITIALIZER | |
9863 | && modifier != EXPAND_MEMORY | |
9864 | && TREE_CODE (array) == CONSTRUCTOR | |
9865 | && ! TREE_SIDE_EFFECTS (array) | |
9866 | && TREE_CODE (index) == INTEGER_CST) | |
9867 | { | |
9868 | unsigned HOST_WIDE_INT ix; | |
9869 | tree field, value; | |
9870 | ||
9871 | FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (array), ix, | |
9872 | field, value) | |
9873 | if (tree_int_cst_equal (field, index)) | |
b10af0c8 | 9874 | { |
f994f296 MM |
9875 | if (!TREE_SIDE_EFFECTS (value)) |
9876 | return expand_expr (fold (value), target, tmode, modifier); | |
9877 | break; | |
b10af0c8 | 9878 | } |
f994f296 | 9879 | } |
bbf6f052 | 9880 | |
f994f296 MM |
9881 | else if (optimize >= 1 |
9882 | && modifier != EXPAND_CONST_ADDRESS | |
9883 | && modifier != EXPAND_INITIALIZER | |
9884 | && modifier != EXPAND_MEMORY | |
9885 | && TREE_READONLY (array) && ! TREE_SIDE_EFFECTS (array) | |
6a6dac52 JH |
9886 | && TREE_CODE (index) == INTEGER_CST |
9887 | && (TREE_CODE (array) == VAR_DECL | |
9888 | || TREE_CODE (array) == CONST_DECL) | |
9889 | && (init = ctor_for_folding (array)) != error_mark_node) | |
f994f296 | 9890 | { |
42ed6cde JJ |
9891 | if (init == NULL_TREE) |
9892 | { | |
9893 | tree value = build_zero_cst (type); | |
9894 | if (TREE_CODE (value) == CONSTRUCTOR) | |
9895 | { | |
9896 | /* If VALUE is a CONSTRUCTOR, this optimization is only | |
9897 | useful if this doesn't store the CONSTRUCTOR into | |
9898 | memory. If it does, it is more efficient to just | |
9899 | load the data from the array directly. */ | |
9900 | rtx ret = expand_constructor (value, target, | |
9901 | modifier, true); | |
9902 | if (ret == NULL_RTX) | |
9903 | value = NULL_TREE; | |
9904 | } | |
9905 | ||
9906 | if (value) | |
9907 | return expand_expr (value, target, tmode, modifier); | |
9908 | } | |
9909 | else if (TREE_CODE (init) == CONSTRUCTOR) | |
f994f296 | 9910 | { |
6a6dac52 JH |
9911 | unsigned HOST_WIDE_INT ix; |
9912 | tree field, value; | |
0f996086 | 9913 | |
6a6dac52 JH |
9914 | FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (init), ix, |
9915 | field, value) | |
9916 | if (tree_int_cst_equal (field, index)) | |
9917 | { | |
9918 | if (TREE_SIDE_EFFECTS (value)) | |
9919 | break; | |
bbf6f052 | 9920 | |
6a6dac52 | 9921 | if (TREE_CODE (value) == CONSTRUCTOR) |
f994f296 | 9922 | { |
6a6dac52 JH |
9923 | /* If VALUE is a CONSTRUCTOR, this |
9924 | optimization is only useful if | |
9925 | this doesn't store the CONSTRUCTOR | |
9926 | into memory. If it does, it is more | |
9927 | efficient to just load the data from | |
9928 | the array directly. */ | |
9929 | rtx ret = expand_constructor (value, target, | |
9930 | modifier, true); | |
9931 | if (ret == NULL_RTX) | |
f994f296 | 9932 | break; |
f994f296 | 9933 | } |
6a6dac52 | 9934 | |
33be0bec EB |
9935 | return |
9936 | expand_expr (fold (value), target, tmode, modifier); | |
6a6dac52 JH |
9937 | } |
9938 | } | |
33be0bec | 9939 | else if (TREE_CODE (init) == STRING_CST) |
6a6dac52 | 9940 | { |
6a6dac52 | 9941 | tree low_bound = array_ref_low_bound (exp); |
33be0bec EB |
9942 | tree index1 = fold_convert_loc (loc, sizetype, treeop1); |
9943 | ||
9944 | /* Optimize the special case of a zero lower bound. | |
9945 | ||
9946 | We convert the lower bound to sizetype to avoid problems | |
9947 | with constant folding. E.g. suppose the lower bound is | |
9948 | 1 and its mode is QI. Without the conversion | |
9949 | (ARRAY + (INDEX - (unsigned char)1)) | |
9950 | becomes | |
9951 | (ARRAY + (-(unsigned char)1) + INDEX) | |
9952 | which becomes | |
9953 | (ARRAY + 255 + INDEX). Oops! */ | |
9954 | if (!integer_zerop (low_bound)) | |
6a6dac52 | 9955 | index1 = size_diffop_loc (loc, index1, |
33be0bec EB |
9956 | fold_convert_loc (loc, sizetype, |
9957 | low_bound)); | |
6a6dac52 | 9958 | |
33be0bec | 9959 | if (compare_tree_int (index1, TREE_STRING_LENGTH (init)) < 0) |
f994f296 | 9960 | { |
6a6dac52 JH |
9961 | tree type = TREE_TYPE (TREE_TYPE (init)); |
9962 | enum machine_mode mode = TYPE_MODE (type); | |
9963 | ||
9964 | if (GET_MODE_CLASS (mode) == MODE_INT | |
9965 | && GET_MODE_SIZE (mode) == 1) | |
9966 | return gen_int_mode (TREE_STRING_POINTER (init) | |
9967 | [TREE_INT_CST_LOW (index1)], | |
9968 | mode); | |
f994f296 MM |
9969 | } |
9970 | } | |
9971 | } | |
9972 | } | |
9973 | goto normal_inner_ref; | |
9974 | ||
9975 | case COMPONENT_REF: | |
9976 | /* If the operand is a CONSTRUCTOR, we can just extract the | |
9977 | appropriate field if it is present. */ | |
9978 | if (TREE_CODE (treeop0) == CONSTRUCTOR) | |
9979 | { | |
9980 | unsigned HOST_WIDE_INT idx; | |
9981 | tree field, value; | |
9982 | ||
9983 | FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (treeop0), | |
9984 | idx, field, value) | |
9985 | if (field == treeop1 | |
9986 | /* We can normally use the value of the field in the | |
9987 | CONSTRUCTOR. However, if this is a bitfield in | |
9988 | an integral mode that we can fit in a HOST_WIDE_INT, | |
9989 | we must mask only the number of bits in the bitfield, | |
9990 | since this is done implicitly by the constructor. If | |
9991 | the bitfield does not meet either of those conditions, | |
9992 | we can't do this optimization. */ | |
9993 | && (! DECL_BIT_FIELD (field) | |
9994 | || ((GET_MODE_CLASS (DECL_MODE (field)) == MODE_INT) | |
69660a70 | 9995 | && (GET_MODE_PRECISION (DECL_MODE (field)) |
f994f296 MM |
9996 | <= HOST_BITS_PER_WIDE_INT)))) |
9997 | { | |
9998 | if (DECL_BIT_FIELD (field) | |
9999 | && modifier == EXPAND_STACK_PARM) | |
10000 | target = 0; | |
10001 | op0 = expand_expr (value, target, tmode, modifier); | |
10002 | if (DECL_BIT_FIELD (field)) | |
10003 | { | |
10004 | HOST_WIDE_INT bitsize = TREE_INT_CST_LOW (DECL_SIZE (field)); | |
10005 | enum machine_mode imode = TYPE_MODE (TREE_TYPE (field)); | |
10006 | ||
10007 | if (TYPE_UNSIGNED (TREE_TYPE (field))) | |
10008 | { | |
2f1cd2eb RS |
10009 | op1 = gen_int_mode (((HOST_WIDE_INT) 1 << bitsize) - 1, |
10010 | imode); | |
f994f296 MM |
10011 | op0 = expand_and (imode, op0, op1, target); |
10012 | } | |
10013 | else | |
10014 | { | |
69660a70 | 10015 | int count = GET_MODE_PRECISION (imode) - bitsize; |
f994f296 MM |
10016 | |
10017 | op0 = expand_shift (LSHIFT_EXPR, imode, op0, count, | |
10018 | target, 0); | |
10019 | op0 = expand_shift (RSHIFT_EXPR, imode, op0, count, | |
10020 | target, 0); | |
10021 | } | |
10022 | } | |
10023 | ||
10024 | return op0; | |
10025 | } | |
10026 | } | |
10027 | goto normal_inner_ref; | |
10028 | ||
10029 | case BIT_FIELD_REF: | |
10030 | case ARRAY_RANGE_REF: | |
10031 | normal_inner_ref: | |
10032 | { | |
10033 | enum machine_mode mode1, mode2; | |
10034 | HOST_WIDE_INT bitsize, bitpos; | |
10035 | tree offset; | |
10036 | int volatilep = 0, must_force_mem; | |
10037 | tree tem = get_inner_reference (exp, &bitsize, &bitpos, &offset, | |
b3ecff82 | 10038 | &mode1, &unsignedp, &volatilep, true); |
f994f296 | 10039 | rtx orig_op0, memloc; |
65dc645a | 10040 | bool mem_attrs_from_type = false; |
f994f296 MM |
10041 | |
10042 | /* If we got back the original object, something is wrong. Perhaps | |
10043 | we are evaluating an expression too early. In any event, don't | |
10044 | infinitely recurse. */ | |
10045 | gcc_assert (tem != exp); | |
10046 | ||
10047 | /* If TEM's type is a union of variable size, pass TARGET to the inner | |
10048 | computation, since it will need a temporary and TARGET is known | |
10049 | to have to do. This occurs in unchecked conversion in Ada. */ | |
10050 | orig_op0 = op0 | |
4c437f02 BE |
10051 | = expand_expr_real (tem, |
10052 | (TREE_CODE (TREE_TYPE (tem)) == UNION_TYPE | |
10053 | && COMPLETE_TYPE_P (TREE_TYPE (tem)) | |
10054 | && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem))) | |
10055 | != INTEGER_CST) | |
10056 | && modifier != EXPAND_STACK_PARM | |
10057 | ? target : NULL_RTX), | |
10058 | VOIDmode, | |
10059 | modifier == EXPAND_SUM ? EXPAND_NORMAL : modifier, | |
10060 | NULL, true); | |
6a78b724 | 10061 | |
996947e6 | 10062 | /* If the field has a mode, we want to access it in the |
1004f0c5 JJ |
10063 | field's mode, not the computed mode. |
10064 | If a MEM has VOIDmode (external with incomplete type), | |
10065 | use BLKmode for it instead. */ | |
10066 | if (MEM_P (op0)) | |
10067 | { | |
996947e6 | 10068 | if (mode1 != VOIDmode) |
1004f0c5 JJ |
10069 | op0 = adjust_address (op0, mode1, 0); |
10070 | else if (GET_MODE (op0) == VOIDmode) | |
10071 | op0 = adjust_address (op0, BLKmode, 0); | |
10072 | } | |
6a78b724 | 10073 | |
f994f296 MM |
10074 | mode2 |
10075 | = CONSTANT_P (op0) ? TYPE_MODE (TREE_TYPE (tem)) : GET_MODE (op0); | |
10076 | ||
10077 | /* If we have either an offset, a BLKmode result, or a reference | |
10078 | outside the underlying object, we must force it to memory. | |
10079 | Such a case can occur in Ada if we have unchecked conversion | |
10080 | of an expression from a scalar type to an aggregate type or | |
10081 | for an ARRAY_RANGE_REF whose type is BLKmode, or if we were | |
10082 | passed a partially uninitialized object or a view-conversion | |
10083 | to a larger size. */ | |
10084 | must_force_mem = (offset | |
10085 | || mode1 == BLKmode | |
10086 | || bitpos + bitsize > GET_MODE_BITSIZE (mode2)); | |
10087 | ||
10088 | /* Handle CONCAT first. */ | |
10089 | if (GET_CODE (op0) == CONCAT && !must_force_mem) | |
10090 | { | |
10091 | if (bitpos == 0 | |
10092 | && bitsize == GET_MODE_BITSIZE (GET_MODE (op0))) | |
10093 | return op0; | |
10094 | if (bitpos == 0 | |
10095 | && bitsize == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 0))) | |
10096 | && bitsize) | |
10097 | { | |
10098 | op0 = XEXP (op0, 0); | |
10099 | mode2 = GET_MODE (op0); | |
10100 | } | |
10101 | else if (bitpos == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 0))) | |
10102 | && bitsize == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 1))) | |
10103 | && bitpos | |
10104 | && bitsize) | |
10105 | { | |
10106 | op0 = XEXP (op0, 1); | |
10107 | bitpos = 0; | |
10108 | mode2 = GET_MODE (op0); | |
10109 | } | |
10110 | else | |
10111 | /* Otherwise force into memory. */ | |
10112 | must_force_mem = 1; | |
10113 | } | |
10114 | ||
10115 | /* If this is a constant, put it in a register if it is a legitimate | |
10116 | constant and we don't need a memory reference. */ | |
10117 | if (CONSTANT_P (op0) | |
10118 | && mode2 != BLKmode | |
1a627b35 | 10119 | && targetm.legitimate_constant_p (mode2, op0) |
f994f296 MM |
10120 | && !must_force_mem) |
10121 | op0 = force_reg (mode2, op0); | |
10122 | ||
10123 | /* Otherwise, if this is a constant, try to force it to the constant | |
10124 | pool. Note that back-ends, e.g. MIPS, may refuse to do so if it | |
10125 | is a legitimate constant. */ | |
10126 | else if (CONSTANT_P (op0) && (memloc = force_const_mem (mode2, op0))) | |
10127 | op0 = validize_mem (memloc); | |
10128 | ||
10129 | /* Otherwise, if this is a constant or the object is not in memory | |
10130 | and need be, put it there. */ | |
10131 | else if (CONSTANT_P (op0) || (!MEM_P (op0) && must_force_mem)) | |
10132 | { | |
9ee5337d | 10133 | memloc = assign_temp (TREE_TYPE (tem), 1, 1); |
f994f296 MM |
10134 | emit_move_insn (memloc, op0); |
10135 | op0 = memloc; | |
65dc645a | 10136 | mem_attrs_from_type = true; |
f994f296 MM |
10137 | } |
10138 | ||
10139 | if (offset) | |
10140 | { | |
d4ebfa65 | 10141 | enum machine_mode address_mode; |
f994f296 MM |
10142 | rtx offset_rtx = expand_expr (offset, NULL_RTX, VOIDmode, |
10143 | EXPAND_SUM); | |
10144 | ||
10145 | gcc_assert (MEM_P (op0)); | |
10146 | ||
372d6395 | 10147 | address_mode = get_address_mode (op0); |
d4ebfa65 BE |
10148 | if (GET_MODE (offset_rtx) != address_mode) |
10149 | offset_rtx = convert_to_mode (address_mode, offset_rtx, 0); | |
f994f296 | 10150 | |
7fbf8a3e BE |
10151 | /* See the comment in expand_assignment for the rationale. */ |
10152 | if (mode1 != VOIDmode | |
10153 | && bitpos != 0 | |
10154 | && bitsize > 0 | |
f994f296 MM |
10155 | && (bitpos % bitsize) == 0 |
10156 | && (bitsize % GET_MODE_ALIGNMENT (mode1)) == 0 | |
7fbf8a3e | 10157 | && MEM_ALIGN (op0) >= GET_MODE_ALIGNMENT (mode1)) |
f994f296 MM |
10158 | { |
10159 | op0 = adjust_address (op0, mode1, bitpos / BITS_PER_UNIT); | |
10160 | bitpos = 0; | |
10161 | } | |
10162 | ||
10163 | op0 = offset_address (op0, offset_rtx, | |
10164 | highest_pow2_factor (offset)); | |
10165 | } | |
10166 | ||
10167 | /* If OFFSET is making OP0 more aligned than BIGGEST_ALIGNMENT, | |
10168 | record its alignment as BIGGEST_ALIGNMENT. */ | |
10169 | if (MEM_P (op0) && bitpos == 0 && offset != 0 | |
10170 | && is_aligning_offset (offset, tem)) | |
10171 | set_mem_align (op0, BIGGEST_ALIGNMENT); | |
10172 | ||
10173 | /* Don't forget about volatility even if this is a bitfield. */ | |
10174 | if (MEM_P (op0) && volatilep && ! MEM_VOLATILE_P (op0)) | |
10175 | { | |
10176 | if (op0 == orig_op0) | |
10177 | op0 = copy_rtx (op0); | |
10178 | ||
10179 | MEM_VOLATILE_P (op0) = 1; | |
10180 | } | |
10181 | ||
10182 | /* In cases where an aligned union has an unaligned object | |
10183 | as a field, we might be extracting a BLKmode value from | |
10184 | an integer-mode (e.g., SImode) object. Handle this case | |
10185 | by doing the extract into an object as wide as the field | |
10186 | (which we know to be the width of a basic mode), then | |
10187 | storing into memory, and changing the mode to BLKmode. */ | |
10188 | if (mode1 == VOIDmode | |
10189 | || REG_P (op0) || GET_CODE (op0) == SUBREG | |
10190 | || (mode1 != BLKmode && ! direct_load[(int) mode1] | |
10191 | && GET_MODE_CLASS (mode) != MODE_COMPLEX_INT | |
10192 | && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT | |
10193 | && modifier != EXPAND_CONST_ADDRESS | |
9e65d03e JDA |
10194 | && modifier != EXPAND_INITIALIZER |
10195 | && modifier != EXPAND_MEMORY) | |
996947e6 BE |
10196 | /* If the bitfield is volatile and the bitsize |
10197 | is narrower than the access size of the bitfield, | |
10198 | we need to extract bitfields from the access. */ | |
10199 | || (volatilep && TREE_CODE (exp) == COMPONENT_REF | |
10200 | && DECL_BIT_FIELD_TYPE (TREE_OPERAND (exp, 1)) | |
10201 | && mode1 != BLKmode | |
10202 | && bitsize < GET_MODE_SIZE (mode1) * BITS_PER_UNIT) | |
f994f296 MM |
10203 | /* If the field isn't aligned enough to fetch as a memref, |
10204 | fetch it as a bit field. */ | |
10205 | || (mode1 != BLKmode | |
10206 | && (((TYPE_ALIGN (TREE_TYPE (tem)) < GET_MODE_ALIGNMENT (mode) | |
10207 | || (bitpos % GET_MODE_ALIGNMENT (mode) != 0) | |
10208 | || (MEM_P (op0) | |
10209 | && (MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode1) | |
10210 | || (bitpos % GET_MODE_ALIGNMENT (mode1) != 0)))) | |
ef7e7ab2 | 10211 | && modifier != EXPAND_MEMORY |
f994f296 MM |
10212 | && ((modifier == EXPAND_CONST_ADDRESS |
10213 | || modifier == EXPAND_INITIALIZER) | |
10214 | ? STRICT_ALIGNMENT | |
10215 | : SLOW_UNALIGNED_ACCESS (mode1, MEM_ALIGN (op0)))) | |
10216 | || (bitpos % BITS_PER_UNIT != 0))) | |
10217 | /* If the type and the field are a constant size and the | |
10218 | size of the type isn't the same size as the bitfield, | |
10219 | we must use bitfield operations. */ | |
10220 | || (bitsize >= 0 | |
10221 | && TYPE_SIZE (TREE_TYPE (exp)) | |
10222 | && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST | |
10223 | && 0 != compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)), | |
10224 | bitsize))) | |
10225 | { | |
10226 | enum machine_mode ext_mode = mode; | |
10227 | ||
10228 | if (ext_mode == BLKmode | |
10229 | && ! (target != 0 && MEM_P (op0) | |
10230 | && MEM_P (target) | |
10231 | && bitpos % BITS_PER_UNIT == 0)) | |
10232 | ext_mode = mode_for_size (bitsize, MODE_INT, 1); | |
10233 | ||
10234 | if (ext_mode == BLKmode) | |
10235 | { | |
10236 | if (target == 0) | |
9474e8ab | 10237 | target = assign_temp (type, 1, 1); |
f994f296 | 10238 | |
ae3df2dc EB |
10239 | /* ??? Unlike the similar test a few lines below, this one is |
10240 | very likely obsolete. */ | |
f994f296 MM |
10241 | if (bitsize == 0) |
10242 | return target; | |
10243 | ||
10244 | /* In this case, BITPOS must start at a byte boundary and | |
10245 | TARGET, if specified, must be a MEM. */ | |
10246 | gcc_assert (MEM_P (op0) | |
10247 | && (!target || MEM_P (target)) | |
10248 | && !(bitpos % BITS_PER_UNIT)); | |
10249 | ||
10250 | emit_block_move (target, | |
10251 | adjust_address (op0, VOIDmode, | |
10252 | bitpos / BITS_PER_UNIT), | |
10253 | GEN_INT ((bitsize + BITS_PER_UNIT - 1) | |
10254 | / BITS_PER_UNIT), | |
10255 | (modifier == EXPAND_STACK_PARM | |
10256 | ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL)); | |
10257 | ||
10258 | return target; | |
10259 | } | |
10260 | ||
ae3df2dc EB |
10261 | /* If we have nothing to extract, the result will be 0 for targets |
10262 | with SHIFT_COUNT_TRUNCATED == 0 and garbage otherwise. Always | |
10263 | return 0 for the sake of consistency, as reading a zero-sized | |
10264 | bitfield is valid in Ada and the value is fully specified. */ | |
10265 | if (bitsize == 0) | |
10266 | return const0_rtx; | |
10267 | ||
f994f296 MM |
10268 | op0 = validize_mem (op0); |
10269 | ||
10270 | if (MEM_P (op0) && REG_P (XEXP (op0, 0))) | |
10271 | mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0)); | |
10272 | ||
c6285bd7 | 10273 | op0 = extract_bit_field (op0, bitsize, bitpos, unsignedp, |
f994f296 MM |
10274 | (modifier == EXPAND_STACK_PARM |
10275 | ? NULL_RTX : target), | |
10276 | ext_mode, ext_mode); | |
10277 | ||
10278 | /* If the result is a record type and BITSIZE is narrower than | |
10279 | the mode of OP0, an integral mode, and this is a big endian | |
10280 | machine, we must put the field into the high-order bits. */ | |
10281 | if (TREE_CODE (type) == RECORD_TYPE && BYTES_BIG_ENDIAN | |
10282 | && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT | |
10283 | && bitsize < (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (op0))) | |
10284 | op0 = expand_shift (LSHIFT_EXPR, GET_MODE (op0), op0, | |
eb6c3df1 RG |
10285 | GET_MODE_BITSIZE (GET_MODE (op0)) |
10286 | - bitsize, op0, 1); | |
f994f296 MM |
10287 | |
10288 | /* If the result type is BLKmode, store the data into a temporary | |
10289 | of the appropriate type, but with the mode corresponding to the | |
c6c2314f | 10290 | mode for the data we have (op0's mode). */ |
f994f296 MM |
10291 | if (mode == BLKmode) |
10292 | { | |
c6c2314f EB |
10293 | rtx new_rtx |
10294 | = assign_stack_temp_for_type (ext_mode, | |
10295 | GET_MODE_BITSIZE (ext_mode), | |
10296 | type); | |
f994f296 MM |
10297 | emit_move_insn (new_rtx, op0); |
10298 | op0 = copy_rtx (new_rtx); | |
10299 | PUT_MODE (op0, BLKmode); | |
f994f296 | 10300 | } |
2d7050fd | 10301 | |
f994f296 MM |
10302 | return op0; |
10303 | } | |
bbf6f052 | 10304 | |
f994f296 MM |
10305 | /* If the result is BLKmode, use that to access the object |
10306 | now as well. */ | |
10307 | if (mode == BLKmode) | |
10308 | mode1 = BLKmode; | |
bbf6f052 | 10309 | |
f994f296 MM |
10310 | /* Get a reference to just this component. */ |
10311 | if (modifier == EXPAND_CONST_ADDRESS | |
10312 | || modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER) | |
10313 | op0 = adjust_address_nv (op0, mode1, bitpos / BITS_PER_UNIT); | |
10314 | else | |
10315 | op0 = adjust_address (op0, mode1, bitpos / BITS_PER_UNIT); | |
bbf6f052 | 10316 | |
f994f296 MM |
10317 | if (op0 == orig_op0) |
10318 | op0 = copy_rtx (op0); | |
bbf6f052 | 10319 | |
65dc645a MJ |
10320 | /* If op0 is a temporary because of forcing to memory, pass only the |
10321 | type to set_mem_attributes so that the original expression is never | |
10322 | marked as ADDRESSABLE through MEM_EXPR of the temporary. */ | |
10323 | if (mem_attrs_from_type) | |
10324 | set_mem_attributes (op0, type, 0); | |
10325 | else | |
10326 | set_mem_attributes (op0, exp, 0); | |
10327 | ||
f994f296 MM |
10328 | if (REG_P (XEXP (op0, 0))) |
10329 | mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0)); | |
3a94c984 | 10330 | |
f994f296 MM |
10331 | MEM_VOLATILE_P (op0) |= volatilep; |
10332 | if (mode == mode1 || mode1 == BLKmode || mode1 == tmode | |
10333 | || modifier == EXPAND_CONST_ADDRESS | |
10334 | || modifier == EXPAND_INITIALIZER) | |
10335 | return op0; | |
33be0bec | 10336 | |
a53f90ad | 10337 | if (target == 0) |
f994f296 | 10338 | target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode); |
fa2981d8 | 10339 | |
f994f296 MM |
10340 | convert_move (target, op0, unsignedp); |
10341 | return target; | |
10342 | } | |
e3be1116 | 10343 | |
f994f296 MM |
10344 | case OBJ_TYPE_REF: |
10345 | return expand_expr (OBJ_TYPE_REF_EXPR (exp), target, tmode, modifier); | |
dbedefae | 10346 | |
f994f296 MM |
10347 | case CALL_EXPR: |
10348 | /* All valid uses of __builtin_va_arg_pack () are removed during | |
10349 | inlining. */ | |
10350 | if (CALL_EXPR_VA_ARG_PACK (exp)) | |
10351 | error ("%Kinvalid use of %<__builtin_va_arg_pack ()%>", exp); | |
230dedb3 | 10352 | { |
f994f296 | 10353 | tree fndecl = get_callee_fndecl (exp), attr; |
927630a5 | 10354 | |
f994f296 MM |
10355 | if (fndecl |
10356 | && (attr = lookup_attribute ("error", | |
10357 | DECL_ATTRIBUTES (fndecl))) != NULL) | |
10358 | error ("%Kcall to %qs declared with attribute error: %s", | |
10359 | exp, identifier_to_locale (lang_hooks.decl_printable_name (fndecl, 1)), | |
10360 | TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr)))); | |
10361 | if (fndecl | |
10362 | && (attr = lookup_attribute ("warning", | |
10363 | DECL_ATTRIBUTES (fndecl))) != NULL) | |
10364 | warning_at (tree_nonartificial_location (exp), | |
10365 | 0, "%Kcall to %qs declared with attribute warning: %s", | |
10366 | exp, identifier_to_locale (lang_hooks.decl_printable_name (fndecl, 1)), | |
10367 | TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr)))); | |
927630a5 | 10368 | |
f994f296 MM |
10369 | /* Check for a built-in function. */ |
10370 | if (fndecl && DECL_BUILT_IN (fndecl)) | |
230dedb3 | 10371 | { |
f994f296 MM |
10372 | gcc_assert (DECL_BUILT_IN_CLASS (fndecl) != BUILT_IN_FRONTEND); |
10373 | return expand_builtin (exp, target, subtarget, tmode, ignore); | |
230dedb3 | 10374 | } |
f994f296 MM |
10375 | } |
10376 | return expand_call (exp, target, ignore); | |
927630a5 | 10377 | |
f994f296 MM |
10378 | case VIEW_CONVERT_EXPR: |
10379 | op0 = NULL_RTX; | |
927630a5 | 10380 | |
f994f296 MM |
10381 | /* If we are converting to BLKmode, try to avoid an intermediate |
10382 | temporary by fetching an inner memory reference. */ | |
10383 | if (mode == BLKmode | |
a53f90ad | 10384 | && TREE_CODE (TYPE_SIZE (type)) == INTEGER_CST |
f994f296 MM |
10385 | && TYPE_MODE (TREE_TYPE (treeop0)) != BLKmode |
10386 | && handled_component_p (treeop0)) | |
10387 | { | |
10388 | enum machine_mode mode1; | |
10389 | HOST_WIDE_INT bitsize, bitpos; | |
10390 | tree offset; | |
10391 | int unsignedp; | |
10392 | int volatilep = 0; | |
10393 | tree tem | |
10394 | = get_inner_reference (treeop0, &bitsize, &bitpos, | |
b3ecff82 BE |
10395 | &offset, &mode1, &unsignedp, &volatilep, |
10396 | true); | |
f994f296 | 10397 | rtx orig_op0; |
927630a5 | 10398 | |
f994f296 MM |
10399 | /* ??? We should work harder and deal with non-zero offsets. */ |
10400 | if (!offset | |
10401 | && (bitpos % BITS_PER_UNIT) == 0 | |
10402 | && bitsize >= 0 | |
a53f90ad | 10403 | && compare_tree_int (TYPE_SIZE (type), bitsize) == 0) |
f994f296 MM |
10404 | { |
10405 | /* See the normal_inner_ref case for the rationale. */ | |
10406 | orig_op0 | |
4c437f02 BE |
10407 | = expand_expr_real (tem, |
10408 | (TREE_CODE (TREE_TYPE (tem)) == UNION_TYPE | |
10409 | && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem))) | |
10410 | != INTEGER_CST) | |
10411 | && modifier != EXPAND_STACK_PARM | |
10412 | ? target : NULL_RTX), | |
10413 | VOIDmode, | |
10414 | modifier == EXPAND_SUM ? EXPAND_NORMAL : modifier, | |
10415 | NULL, true); | |
927630a5 | 10416 | |
f994f296 | 10417 | if (MEM_P (orig_op0)) |
230dedb3 | 10418 | { |
f994f296 | 10419 | op0 = orig_op0; |
230dedb3 | 10420 | |
f994f296 MM |
10421 | /* Get a reference to just this component. */ |
10422 | if (modifier == EXPAND_CONST_ADDRESS | |
10423 | || modifier == EXPAND_SUM | |
10424 | || modifier == EXPAND_INITIALIZER) | |
10425 | op0 = adjust_address_nv (op0, mode, bitpos / BITS_PER_UNIT); | |
10426 | else | |
10427 | op0 = adjust_address (op0, mode, bitpos / BITS_PER_UNIT); | |
d6a5ac33 | 10428 | |
f994f296 MM |
10429 | if (op0 == orig_op0) |
10430 | op0 = copy_rtx (op0); | |
10431 | ||
10432 | set_mem_attributes (op0, treeop0, 0); | |
10433 | if (REG_P (XEXP (op0, 0))) | |
10434 | mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0)); | |
10435 | ||
10436 | MEM_VOLATILE_P (op0) |= volatilep; | |
10437 | } | |
10438 | } | |
230dedb3 | 10439 | } |
bbf6f052 | 10440 | |
f994f296 | 10441 | if (!op0) |
4c437f02 BE |
10442 | op0 = expand_expr_real (treeop0, NULL_RTX, VOIDmode, modifier, |
10443 | NULL, inner_reference_p); | |
f994f296 MM |
10444 | |
10445 | /* If the input and output modes are both the same, we are done. */ | |
10446 | if (mode == GET_MODE (op0)) | |
10447 | ; | |
10448 | /* If neither mode is BLKmode, and both modes are the same size | |
10449 | then we can use gen_lowpart. */ | |
10450 | else if (mode != BLKmode && GET_MODE (op0) != BLKmode | |
69660a70 BS |
10451 | && (GET_MODE_PRECISION (mode) |
10452 | == GET_MODE_PRECISION (GET_MODE (op0))) | |
f994f296 MM |
10453 | && !COMPLEX_MODE_P (GET_MODE (op0))) |
10454 | { | |
10455 | if (GET_CODE (op0) == SUBREG) | |
10456 | op0 = force_reg (GET_MODE (op0), op0); | |
220c5f0c JJ |
10457 | temp = gen_lowpart_common (mode, op0); |
10458 | if (temp) | |
10459 | op0 = temp; | |
10460 | else | |
10461 | { | |
10462 | if (!REG_P (op0) && !MEM_P (op0)) | |
10463 | op0 = force_reg (GET_MODE (op0), op0); | |
10464 | op0 = gen_lowpart (mode, op0); | |
10465 | } | |
f994f296 | 10466 | } |
915f5921 EB |
10467 | /* If both types are integral, convert from one mode to the other. */ |
10468 | else if (INTEGRAL_TYPE_P (type) && INTEGRAL_TYPE_P (TREE_TYPE (treeop0))) | |
b8698a0f | 10469 | op0 = convert_modes (mode, GET_MODE (op0), op0, |
f994f296 | 10470 | TYPE_UNSIGNED (TREE_TYPE (treeop0))); |
322913f8 EB |
10471 | /* If the output type is a bit-field type, do an extraction. */ |
10472 | else if (reduce_bit_field) | |
10473 | return extract_bit_field (op0, TYPE_PRECISION (type), 0, | |
10474 | TYPE_UNSIGNED (type), NULL_RTX, | |
10475 | mode, mode); | |
f994f296 MM |
10476 | /* As a last resort, spill op0 to memory, and reload it in a |
10477 | different mode. */ | |
10478 | else if (!MEM_P (op0)) | |
10479 | { | |
10480 | /* If the operand is not a MEM, force it into memory. Since we | |
10481 | are going to be changing the mode of the MEM, don't call | |
10482 | force_const_mem for constants because we don't allow pool | |
10483 | constants to change mode. */ | |
10484 | tree inner_type = TREE_TYPE (treeop0); | |
10485 | ||
10486 | gcc_assert (!TREE_ADDRESSABLE (exp)); | |
bbf6f052 | 10487 | |
f994f296 MM |
10488 | if (target == 0 || GET_MODE (target) != TYPE_MODE (inner_type)) |
10489 | target | |
10490 | = assign_stack_temp_for_type | |
10491 | (TYPE_MODE (inner_type), | |
9474e8ab | 10492 | GET_MODE_SIZE (TYPE_MODE (inner_type)), inner_type); |
d6a5ac33 | 10493 | |
f994f296 MM |
10494 | emit_move_insn (target, op0); |
10495 | op0 = target; | |
10496 | } | |
d6a5ac33 | 10497 | |
322913f8 EB |
10498 | /* If OP0 is (now) a MEM, we need to deal with alignment issues. If the |
10499 | output type is such that the operand is known to be aligned, indicate | |
10500 | that it is. Otherwise, we need only be concerned about alignment for | |
10501 | non-BLKmode results. */ | |
f994f296 MM |
10502 | if (MEM_P (op0)) |
10503 | { | |
a9d3ac1e RG |
10504 | enum insn_code icode; |
10505 | ||
f994f296 | 10506 | if (TYPE_ALIGN_OK (type)) |
9506aecb EB |
10507 | { |
10508 | /* ??? Copying the MEM without substantially changing it might | |
10509 | run afoul of the code handling volatile memory references in | |
10510 | store_expr, which assumes that TARGET is returned unmodified | |
10511 | if it has been used. */ | |
10512 | op0 = copy_rtx (op0); | |
10513 | set_mem_align (op0, MAX (MEM_ALIGN (op0), TYPE_ALIGN (type))); | |
10514 | } | |
4c437f02 BE |
10515 | else if (modifier != EXPAND_WRITE |
10516 | && modifier != EXPAND_MEMORY | |
10517 | && !inner_reference_p | |
f994f296 MM |
10518 | && mode != BLKmode |
10519 | && MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode)) | |
10520 | { | |
4c437f02 BE |
10521 | /* If the target does have special handling for unaligned |
10522 | loads of mode then use them. */ | |
10523 | if ((icode = optab_handler (movmisalign_optab, mode)) | |
10524 | != CODE_FOR_nothing) | |
10525 | { | |
10526 | rtx reg, insn; | |
10527 | ||
10528 | op0 = adjust_address (op0, mode, 0); | |
10529 | /* We've already validated the memory, and we're creating a | |
10530 | new pseudo destination. The predicates really can't | |
10531 | fail. */ | |
10532 | reg = gen_reg_rtx (mode); | |
10533 | ||
10534 | /* Nor can the insn generator. */ | |
10535 | insn = GEN_FCN (icode) (reg, op0); | |
10536 | emit_insn (insn); | |
10537 | return reg; | |
10538 | } | |
10539 | else if (STRICT_ALIGNMENT) | |
10540 | { | |
10541 | tree inner_type = TREE_TYPE (treeop0); | |
10542 | HOST_WIDE_INT temp_size | |
10543 | = MAX (int_size_in_bytes (inner_type), | |
10544 | (HOST_WIDE_INT) GET_MODE_SIZE (mode)); | |
10545 | rtx new_rtx | |
10546 | = assign_stack_temp_for_type (mode, temp_size, type); | |
10547 | rtx new_with_op0_mode | |
10548 | = adjust_address (new_rtx, GET_MODE (op0), 0); | |
10549 | ||
10550 | gcc_assert (!TREE_ADDRESSABLE (exp)); | |
10551 | ||
10552 | if (GET_MODE (op0) == BLKmode) | |
10553 | emit_block_move (new_with_op0_mode, op0, | |
10554 | GEN_INT (GET_MODE_SIZE (mode)), | |
10555 | (modifier == EXPAND_STACK_PARM | |
10556 | ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL)); | |
10557 | else | |
10558 | emit_move_insn (new_with_op0_mode, op0); | |
70582b3a | 10559 | |
4c437f02 BE |
10560 | op0 = new_rtx; |
10561 | } | |
f994f296 | 10562 | } |
0f996086 | 10563 | |
f994f296 MM |
10564 | op0 = adjust_address (op0, mode, 0); |
10565 | } | |
bbf6f052 | 10566 | |
f994f296 | 10567 | return op0; |
6de9cd9a | 10568 | |
939409af RS |
10569 | case MODIFY_EXPR: |
10570 | { | |
b32e7cdb MM |
10571 | tree lhs = treeop0; |
10572 | tree rhs = treeop1; | |
df9af2bb KH |
10573 | gcc_assert (ignore); |
10574 | ||
bbf6f052 RK |
10575 | /* Check for |= or &= of a bitfield of size one into another bitfield |
10576 | of size 1. In this case, (unless we need the result of the | |
10577 | assignment) we can do this more efficiently with a | |
10578 | test followed by an assignment, if necessary. | |
10579 | ||
10580 | ??? At this point, we can't get a BIT_FIELD_REF here. But if | |
10581 | things change so we do, this code should be enhanced to | |
10582 | support it. */ | |
df9af2bb | 10583 | if (TREE_CODE (lhs) == COMPONENT_REF |
bbf6f052 RK |
10584 | && (TREE_CODE (rhs) == BIT_IOR_EXPR |
10585 | || TREE_CODE (rhs) == BIT_AND_EXPR) | |
10586 | && TREE_OPERAND (rhs, 0) == lhs | |
10587 | && TREE_CODE (TREE_OPERAND (rhs, 1)) == COMPONENT_REF | |
05bccae2 RK |
10588 | && integer_onep (DECL_SIZE (TREE_OPERAND (lhs, 1))) |
10589 | && integer_onep (DECL_SIZE (TREE_OPERAND (TREE_OPERAND (rhs, 1), 1)))) | |
bbf6f052 | 10590 | { |
770affca | 10591 | rtx_code_label *label = gen_label_rtx (); |
3967bc2d | 10592 | int value = TREE_CODE (rhs) == BIT_IOR_EXPR; |
bbf6f052 | 10593 | do_jump (TREE_OPERAND (rhs, 1), |
3967bc2d | 10594 | value ? label : 0, |
40e90eac | 10595 | value ? 0 : label, -1); |
79f5e442 | 10596 | expand_assignment (lhs, build_int_cst (TREE_TYPE (rhs), value), |
342f75af | 10597 | false); |
e7c33f54 | 10598 | do_pending_stack_adjust (); |
bbf6f052 RK |
10599 | emit_label (label); |
10600 | return const0_rtx; | |
10601 | } | |
10602 | ||
342f75af | 10603 | expand_assignment (lhs, rhs, false); |
7f8adc4e | 10604 | return const0_rtx; |
bbf6f052 RK |
10605 | } |
10606 | ||
bbf6f052 | 10607 | case ADDR_EXPR: |
70bb498a | 10608 | return expand_expr_addr_expr (exp, target, tmode, modifier); |
bbf6f052 | 10609 | |
7308a047 | 10610 | case REALPART_EXPR: |
b32e7cdb | 10611 | op0 = expand_normal (treeop0); |
1466e387 | 10612 | return read_complex_part (op0, false); |
3a94c984 | 10613 | |
7308a047 | 10614 | case IMAGPART_EXPR: |
b32e7cdb | 10615 | op0 = expand_normal (treeop0); |
1466e387 | 10616 | return read_complex_part (op0, true); |
7308a047 | 10617 | |
28ed065e MM |
10618 | case RETURN_EXPR: |
10619 | case LABEL_EXPR: | |
10620 | case GOTO_EXPR: | |
10621 | case SWITCH_EXPR: | |
10622 | case ASM_EXPR: | |
28ed065e MM |
10623 | /* Expanded in cfgexpand.c. */ |
10624 | gcc_unreachable (); | |
6de9cd9a | 10625 | |
e976b8b2 | 10626 | case TRY_CATCH_EXPR: |
6de9cd9a | 10627 | case CATCH_EXPR: |
6de9cd9a | 10628 | case EH_FILTER_EXPR: |
b335b813 | 10629 | case TRY_FINALLY_EXPR: |
ac45df5d | 10630 | /* Lowered by tree-eh.c. */ |
5b0264cb | 10631 | gcc_unreachable (); |
b335b813 | 10632 | |
ac45df5d RH |
10633 | case WITH_CLEANUP_EXPR: |
10634 | case CLEANUP_POINT_EXPR: | |
10635 | case TARGET_EXPR: | |
165b54c3 | 10636 | case CASE_LABEL_EXPR: |
77c9db77 | 10637 | case VA_ARG_EXPR: |
caf93cb0 | 10638 | case BIND_EXPR: |
e5bacf32 PB |
10639 | case INIT_EXPR: |
10640 | case CONJ_EXPR: | |
10641 | case COMPOUND_EXPR: | |
10642 | case PREINCREMENT_EXPR: | |
10643 | case PREDECREMENT_EXPR: | |
10644 | case POSTINCREMENT_EXPR: | |
10645 | case POSTDECREMENT_EXPR: | |
10646 | case LOOP_EXPR: | |
10647 | case EXIT_EXPR: | |
ca5f4331 | 10648 | case COMPOUND_LITERAL_EXPR: |
ac45df5d | 10649 | /* Lowered by gimplify.c. */ |
5b0264cb | 10650 | gcc_unreachable (); |
b335b813 | 10651 | |
67231816 RH |
10652 | case FDESC_EXPR: |
10653 | /* Function descriptors are not valid except for as | |
10654 | initialization constants, and should not be expanded. */ | |
5b0264cb | 10655 | gcc_unreachable (); |
67231816 | 10656 | |
d25cee4d RH |
10657 | case WITH_SIZE_EXPR: |
10658 | /* WITH_SIZE_EXPR expands to its first argument. The caller should | |
10659 | have pulled out the size to use in whatever context it needed. */ | |
b32e7cdb | 10660 | return expand_expr_real (treeop0, original_target, tmode, |
4c437f02 | 10661 | modifier, alt_rtl, inner_reference_p); |
d25cee4d | 10662 | |
bbf6f052 | 10663 | default: |
f994f296 | 10664 | return expand_expr_real_2 (&ops, target, tmode, modifier); |
bbf6f052 | 10665 | } |
bc15d0ef | 10666 | } |
bc15d0ef JM |
10667 | \f |
10668 | /* Subroutine of above: reduce EXP to the precision of TYPE (in the | |
10669 | signedness of TYPE), possibly returning the result in TARGET. */ | |
10670 | static rtx | |
10671 | reduce_to_bit_field_precision (rtx exp, rtx target, tree type) | |
10672 | { | |
10673 | HOST_WIDE_INT prec = TYPE_PRECISION (type); | |
10674 | if (target && GET_MODE (target) != GET_MODE (exp)) | |
10675 | target = 0; | |
1f2ad84c | 10676 | /* For constant values, reduce using build_int_cst_type. */ |
481683e1 | 10677 | if (CONST_INT_P (exp)) |
1f2ad84c AP |
10678 | { |
10679 | HOST_WIDE_INT value = INTVAL (exp); | |
10680 | tree t = build_int_cst_type (type, value); | |
10681 | return expand_expr (t, target, VOIDmode, EXPAND_NORMAL); | |
10682 | } | |
10683 | else if (TYPE_UNSIGNED (type)) | |
bc15d0ef | 10684 | { |
807e902e KZ |
10685 | enum machine_mode mode = GET_MODE (exp); |
10686 | rtx mask = immed_wide_int_const | |
10687 | (wi::mask (prec, false, GET_MODE_PRECISION (mode)), mode); | |
10688 | return expand_and (mode, exp, mask, target); | |
bc15d0ef JM |
10689 | } |
10690 | else | |
10691 | { | |
69660a70 | 10692 | int count = GET_MODE_PRECISION (GET_MODE (exp)) - prec; |
eb6c3df1 RG |
10693 | exp = expand_shift (LSHIFT_EXPR, GET_MODE (exp), |
10694 | exp, count, target, 0); | |
10695 | return expand_shift (RSHIFT_EXPR, GET_MODE (exp), | |
10696 | exp, count, target, 0); | |
bc15d0ef | 10697 | } |
bbf6f052 | 10698 | } |
b93a436e | 10699 | \f |
1ce7f3c2 RK |
10700 | /* Subroutine of above: returns 1 if OFFSET corresponds to an offset that |
10701 | when applied to the address of EXP produces an address known to be | |
10702 | aligned more than BIGGEST_ALIGNMENT. */ | |
10703 | ||
10704 | static int | |
22ea9ec0 | 10705 | is_aligning_offset (const_tree offset, const_tree exp) |
1ce7f3c2 | 10706 | { |
6fce44af | 10707 | /* Strip off any conversions. */ |
1043771b | 10708 | while (CONVERT_EXPR_P (offset)) |
1ce7f3c2 RK |
10709 | offset = TREE_OPERAND (offset, 0); |
10710 | ||
10711 | /* We must now have a BIT_AND_EXPR with a constant that is one less than | |
10712 | power of 2 and which is larger than BIGGEST_ALIGNMENT. */ | |
10713 | if (TREE_CODE (offset) != BIT_AND_EXPR | |
cc269bb6 | 10714 | || !tree_fits_uhwi_p (TREE_OPERAND (offset, 1)) |
caf93cb0 | 10715 | || compare_tree_int (TREE_OPERAND (offset, 1), |
c0cfc691 | 10716 | BIGGEST_ALIGNMENT / BITS_PER_UNIT) <= 0 |
40de8128 | 10717 | || exact_log2 (tree_to_uhwi (TREE_OPERAND (offset, 1)) + 1) < 0) |
1ce7f3c2 RK |
10718 | return 0; |
10719 | ||
10720 | /* Look at the first operand of BIT_AND_EXPR and strip any conversion. | |
10721 | It must be NEGATE_EXPR. Then strip any more conversions. */ | |
10722 | offset = TREE_OPERAND (offset, 0); | |
1043771b | 10723 | while (CONVERT_EXPR_P (offset)) |
1ce7f3c2 RK |
10724 | offset = TREE_OPERAND (offset, 0); |
10725 | ||
10726 | if (TREE_CODE (offset) != NEGATE_EXPR) | |
10727 | return 0; | |
10728 | ||
10729 | offset = TREE_OPERAND (offset, 0); | |
1043771b | 10730 | while (CONVERT_EXPR_P (offset)) |
1ce7f3c2 RK |
10731 | offset = TREE_OPERAND (offset, 0); |
10732 | ||
6fce44af RK |
10733 | /* This must now be the address of EXP. */ |
10734 | return TREE_CODE (offset) == ADDR_EXPR && TREE_OPERAND (offset, 0) == exp; | |
1ce7f3c2 RK |
10735 | } |
10736 | \f | |
e0a2f705 | 10737 | /* Return the tree node if an ARG corresponds to a string constant or zero |
cc2902df | 10738 | if it doesn't. If we return nonzero, set *PTR_OFFSET to the offset |
fed3cef0 RK |
10739 | in bytes within the string that ARG is accessing. The type of the |
10740 | offset will be `sizetype'. */ | |
b93a436e | 10741 | |
28f4ec01 | 10742 | tree |
502b8322 | 10743 | string_constant (tree arg, tree *ptr_offset) |
b93a436e | 10744 | { |
a3de5951 | 10745 | tree array, offset, lower_bound; |
b93a436e JL |
10746 | STRIP_NOPS (arg); |
10747 | ||
a45f71f5 | 10748 | if (TREE_CODE (arg) == ADDR_EXPR) |
b93a436e | 10749 | { |
a45f71f5 JJ |
10750 | if (TREE_CODE (TREE_OPERAND (arg, 0)) == STRING_CST) |
10751 | { | |
10752 | *ptr_offset = size_zero_node; | |
10753 | return TREE_OPERAND (arg, 0); | |
10754 | } | |
10755 | else if (TREE_CODE (TREE_OPERAND (arg, 0)) == VAR_DECL) | |
10756 | { | |
10757 | array = TREE_OPERAND (arg, 0); | |
10758 | offset = size_zero_node; | |
10759 | } | |
10760 | else if (TREE_CODE (TREE_OPERAND (arg, 0)) == ARRAY_REF) | |
10761 | { | |
10762 | array = TREE_OPERAND (TREE_OPERAND (arg, 0), 0); | |
10763 | offset = TREE_OPERAND (TREE_OPERAND (arg, 0), 1); | |
10764 | if (TREE_CODE (array) != STRING_CST | |
10765 | && TREE_CODE (array) != VAR_DECL) | |
10766 | return 0; | |
a3de5951 | 10767 | |
9f5ed61a | 10768 | /* Check if the array has a nonzero lower bound. */ |
a3de5951 AM |
10769 | lower_bound = array_ref_low_bound (TREE_OPERAND (arg, 0)); |
10770 | if (!integer_zerop (lower_bound)) | |
10771 | { | |
10772 | /* If the offset and base aren't both constants, return 0. */ | |
10773 | if (TREE_CODE (lower_bound) != INTEGER_CST) | |
10774 | return 0; | |
10775 | if (TREE_CODE (offset) != INTEGER_CST) | |
10776 | return 0; | |
10777 | /* Adjust offset by the lower bound. */ | |
ed1223ba | 10778 | offset = size_diffop (fold_convert (sizetype, offset), |
a3de5951 AM |
10779 | fold_convert (sizetype, lower_bound)); |
10780 | } | |
a45f71f5 | 10781 | } |
321358d4 RG |
10782 | else if (TREE_CODE (TREE_OPERAND (arg, 0)) == MEM_REF) |
10783 | { | |
10784 | array = TREE_OPERAND (TREE_OPERAND (arg, 0), 0); | |
10785 | offset = TREE_OPERAND (TREE_OPERAND (arg, 0), 1); | |
10786 | if (TREE_CODE (array) != ADDR_EXPR) | |
10787 | return 0; | |
10788 | array = TREE_OPERAND (array, 0); | |
10789 | if (TREE_CODE (array) != STRING_CST | |
10790 | && TREE_CODE (array) != VAR_DECL) | |
10791 | return 0; | |
10792 | } | |
a45f71f5 JJ |
10793 | else |
10794 | return 0; | |
6de9cd9a | 10795 | } |
5be014d5 | 10796 | else if (TREE_CODE (arg) == PLUS_EXPR || TREE_CODE (arg) == POINTER_PLUS_EXPR) |
b93a436e JL |
10797 | { |
10798 | tree arg0 = TREE_OPERAND (arg, 0); | |
10799 | tree arg1 = TREE_OPERAND (arg, 1); | |
10800 | ||
10801 | STRIP_NOPS (arg0); | |
10802 | STRIP_NOPS (arg1); | |
10803 | ||
10804 | if (TREE_CODE (arg0) == ADDR_EXPR | |
a45f71f5 JJ |
10805 | && (TREE_CODE (TREE_OPERAND (arg0, 0)) == STRING_CST |
10806 | || TREE_CODE (TREE_OPERAND (arg0, 0)) == VAR_DECL)) | |
bbf6f052 | 10807 | { |
a45f71f5 JJ |
10808 | array = TREE_OPERAND (arg0, 0); |
10809 | offset = arg1; | |
bbf6f052 | 10810 | } |
b93a436e | 10811 | else if (TREE_CODE (arg1) == ADDR_EXPR |
a45f71f5 JJ |
10812 | && (TREE_CODE (TREE_OPERAND (arg1, 0)) == STRING_CST |
10813 | || TREE_CODE (TREE_OPERAND (arg1, 0)) == VAR_DECL)) | |
bbf6f052 | 10814 | { |
a45f71f5 JJ |
10815 | array = TREE_OPERAND (arg1, 0); |
10816 | offset = arg0; | |
bbf6f052 | 10817 | } |
a45f71f5 JJ |
10818 | else |
10819 | return 0; | |
10820 | } | |
10821 | else | |
10822 | return 0; | |
10823 | ||
10824 | if (TREE_CODE (array) == STRING_CST) | |
10825 | { | |
3967bc2d | 10826 | *ptr_offset = fold_convert (sizetype, offset); |
a45f71f5 JJ |
10827 | return array; |
10828 | } | |
1d0804d4 JH |
10829 | else if (TREE_CODE (array) == VAR_DECL |
10830 | || TREE_CODE (array) == CONST_DECL) | |
a45f71f5 JJ |
10831 | { |
10832 | int length; | |
6a6dac52 | 10833 | tree init = ctor_for_folding (array); |
a45f71f5 JJ |
10834 | |
10835 | /* Variables initialized to string literals can be handled too. */ | |
6a6dac52 JH |
10836 | if (init == error_mark_node |
10837 | || !init | |
10838 | || TREE_CODE (init) != STRING_CST) | |
a45f71f5 JJ |
10839 | return 0; |
10840 | ||
a45f71f5 JJ |
10841 | /* Avoid const char foo[4] = "abcde"; */ |
10842 | if (DECL_SIZE_UNIT (array) == NULL_TREE | |
10843 | || TREE_CODE (DECL_SIZE_UNIT (array)) != INTEGER_CST | |
6a6dac52 | 10844 | || (length = TREE_STRING_LENGTH (init)) <= 0 |
a45f71f5 JJ |
10845 | || compare_tree_int (DECL_SIZE_UNIT (array), length) < 0) |
10846 | return 0; | |
10847 | ||
10848 | /* If variable is bigger than the string literal, OFFSET must be constant | |
10849 | and inside of the bounds of the string literal. */ | |
3967bc2d | 10850 | offset = fold_convert (sizetype, offset); |
a45f71f5 | 10851 | if (compare_tree_int (DECL_SIZE_UNIT (array), length) > 0 |
cc269bb6 | 10852 | && (! tree_fits_uhwi_p (offset) |
a45f71f5 JJ |
10853 | || compare_tree_int (offset, length) >= 0)) |
10854 | return 0; | |
10855 | ||
10856 | *ptr_offset = offset; | |
6a6dac52 | 10857 | return init; |
b93a436e | 10858 | } |
ca695ac9 | 10859 | |
b93a436e JL |
10860 | return 0; |
10861 | } | |
ca695ac9 | 10862 | \f |
8e7aa1f9 MM |
10863 | /* Generate code to calculate OPS, and exploded expression |
10864 | using a store-flag instruction and return an rtx for the result. | |
10865 | OPS reflects a comparison. | |
ca695ac9 | 10866 | |
b93a436e | 10867 | If TARGET is nonzero, store the result there if convenient. |
ca695ac9 | 10868 | |
b93a436e JL |
10869 | Return zero if there is no suitable set-flag instruction |
10870 | available on this machine. | |
ca695ac9 | 10871 | |
b93a436e JL |
10872 | Once expand_expr has been called on the arguments of the comparison, |
10873 | we are committed to doing the store flag, since it is not safe to | |
10874 | re-evaluate the expression. We emit the store-flag insn by calling | |
10875 | emit_store_flag, but only expand the arguments if we have a reason | |
10876 | to believe that emit_store_flag will be successful. If we think that | |
10877 | it will, but it isn't, we have to simulate the store-flag with a | |
10878 | set/jump/set sequence. */ | |
ca695ac9 | 10879 | |
b93a436e | 10880 | static rtx |
8e7aa1f9 | 10881 | do_store_flag (sepops ops, rtx target, enum machine_mode mode) |
b93a436e JL |
10882 | { |
10883 | enum rtx_code code; | |
10884 | tree arg0, arg1, type; | |
10885 | tree tem; | |
10886 | enum machine_mode operand_mode; | |
b93a436e JL |
10887 | int unsignedp; |
10888 | rtx op0, op1; | |
b93a436e | 10889 | rtx subtarget = target; |
8e7aa1f9 | 10890 | location_t loc = ops->location; |
ca695ac9 | 10891 | |
8e7aa1f9 MM |
10892 | arg0 = ops->op0; |
10893 | arg1 = ops->op1; | |
5129d2ce AH |
10894 | |
10895 | /* Don't crash if the comparison was erroneous. */ | |
10896 | if (arg0 == error_mark_node || arg1 == error_mark_node) | |
10897 | return const0_rtx; | |
10898 | ||
b93a436e JL |
10899 | type = TREE_TYPE (arg0); |
10900 | operand_mode = TYPE_MODE (type); | |
8df83eae | 10901 | unsignedp = TYPE_UNSIGNED (type); |
ca695ac9 | 10902 | |
b93a436e JL |
10903 | /* We won't bother with BLKmode store-flag operations because it would mean |
10904 | passing a lot of information to emit_store_flag. */ | |
10905 | if (operand_mode == BLKmode) | |
10906 | return 0; | |
ca695ac9 | 10907 | |
b93a436e JL |
10908 | /* We won't bother with store-flag operations involving function pointers |
10909 | when function pointers must be canonicalized before comparisons. */ | |
10910 | #ifdef HAVE_canonicalize_funcptr_for_compare | |
10911 | if (HAVE_canonicalize_funcptr_for_compare | |
8e7aa1f9 MM |
10912 | && ((TREE_CODE (TREE_TYPE (arg0)) == POINTER_TYPE |
10913 | && (TREE_CODE (TREE_TYPE (TREE_TYPE (arg0))) | |
b93a436e | 10914 | == FUNCTION_TYPE)) |
8e7aa1f9 MM |
10915 | || (TREE_CODE (TREE_TYPE (arg1)) == POINTER_TYPE |
10916 | && (TREE_CODE (TREE_TYPE (TREE_TYPE (arg1))) | |
b93a436e JL |
10917 | == FUNCTION_TYPE)))) |
10918 | return 0; | |
ca695ac9 JB |
10919 | #endif |
10920 | ||
b93a436e JL |
10921 | STRIP_NOPS (arg0); |
10922 | STRIP_NOPS (arg1); | |
f90e8e2e | 10923 | |
d246ab4f AS |
10924 | /* For vector typed comparisons emit code to generate the desired |
10925 | all-ones or all-zeros mask. Conveniently use the VEC_COND_EXPR | |
10926 | expander for this. */ | |
10927 | if (TREE_CODE (ops->type) == VECTOR_TYPE) | |
10928 | { | |
10929 | tree ifexp = build2 (ops->code, ops->type, arg0, arg1); | |
10930 | tree if_true = constant_boolean_node (true, ops->type); | |
10931 | tree if_false = constant_boolean_node (false, ops->type); | |
10932 | return expand_vec_cond_expr (ops->type, ifexp, if_true, if_false, target); | |
10933 | } | |
10934 | ||
b93a436e JL |
10935 | /* Get the rtx comparison code to use. We know that EXP is a comparison |
10936 | operation of some type. Some comparisons against 1 and -1 can be | |
10937 | converted to comparisons with zero. Do so here so that the tests | |
10938 | below will be aware that we have a comparison with zero. These | |
10939 | tests will not catch constants in the first operand, but constants | |
10940 | are rarely passed as the first operand. */ | |
ca695ac9 | 10941 | |
8e7aa1f9 | 10942 | switch (ops->code) |
b93a436e JL |
10943 | { |
10944 | case EQ_EXPR: | |
10945 | code = EQ; | |
bbf6f052 | 10946 | break; |
b93a436e JL |
10947 | case NE_EXPR: |
10948 | code = NE; | |
bbf6f052 | 10949 | break; |
b93a436e JL |
10950 | case LT_EXPR: |
10951 | if (integer_onep (arg1)) | |
10952 | arg1 = integer_zero_node, code = unsignedp ? LEU : LE; | |
10953 | else | |
10954 | code = unsignedp ? LTU : LT; | |
ca695ac9 | 10955 | break; |
b93a436e JL |
10956 | case LE_EXPR: |
10957 | if (! unsignedp && integer_all_onesp (arg1)) | |
10958 | arg1 = integer_zero_node, code = LT; | |
10959 | else | |
10960 | code = unsignedp ? LEU : LE; | |
ca695ac9 | 10961 | break; |
b93a436e JL |
10962 | case GT_EXPR: |
10963 | if (! unsignedp && integer_all_onesp (arg1)) | |
10964 | arg1 = integer_zero_node, code = GE; | |
10965 | else | |
10966 | code = unsignedp ? GTU : GT; | |
10967 | break; | |
10968 | case GE_EXPR: | |
10969 | if (integer_onep (arg1)) | |
10970 | arg1 = integer_zero_node, code = unsignedp ? GTU : GT; | |
10971 | else | |
10972 | code = unsignedp ? GEU : GE; | |
ca695ac9 | 10973 | break; |
1eb8759b RH |
10974 | |
10975 | case UNORDERED_EXPR: | |
10976 | code = UNORDERED; | |
10977 | break; | |
10978 | case ORDERED_EXPR: | |
10979 | code = ORDERED; | |
10980 | break; | |
10981 | case UNLT_EXPR: | |
10982 | code = UNLT; | |
10983 | break; | |
10984 | case UNLE_EXPR: | |
10985 | code = UNLE; | |
10986 | break; | |
10987 | case UNGT_EXPR: | |
10988 | code = UNGT; | |
10989 | break; | |
10990 | case UNGE_EXPR: | |
10991 | code = UNGE; | |
10992 | break; | |
10993 | case UNEQ_EXPR: | |
10994 | code = UNEQ; | |
10995 | break; | |
d1a7edaf PB |
10996 | case LTGT_EXPR: |
10997 | code = LTGT; | |
10998 | break; | |
1eb8759b | 10999 | |
ca695ac9 | 11000 | default: |
5b0264cb | 11001 | gcc_unreachable (); |
bbf6f052 | 11002 | } |
bbf6f052 | 11003 | |
b93a436e | 11004 | /* Put a constant second. */ |
0f996086 CF |
11005 | if (TREE_CODE (arg0) == REAL_CST || TREE_CODE (arg0) == INTEGER_CST |
11006 | || TREE_CODE (arg0) == FIXED_CST) | |
b93a436e JL |
11007 | { |
11008 | tem = arg0; arg0 = arg1; arg1 = tem; | |
11009 | code = swap_condition (code); | |
ca695ac9 | 11010 | } |
bbf6f052 | 11011 | |
b93a436e JL |
11012 | /* If this is an equality or inequality test of a single bit, we can |
11013 | do this by shifting the bit being tested to the low-order bit and | |
11014 | masking the result with the constant 1. If the condition was EQ, | |
11015 | we xor it with 1. This does not require an scc insn and is faster | |
7960bf22 JL |
11016 | than an scc insn even if we have it. |
11017 | ||
11018 | The code to make this transformation was moved into fold_single_bit_test, | |
11019 | so we just call into the folder and expand its result. */ | |
d39985fa | 11020 | |
b93a436e | 11021 | if ((code == NE || code == EQ) |
3c411f3f | 11022 | && integer_zerop (arg1) |
7bba408b | 11023 | && (TYPE_PRECISION (ops->type) != 1 || TYPE_UNSIGNED (ops->type))) |
60cd4dae | 11024 | { |
3c411f3f AP |
11025 | gimple srcstmt = get_def_for_expr (arg0, BIT_AND_EXPR); |
11026 | if (srcstmt | |
11027 | && integer_pow2p (gimple_assign_rhs2 (srcstmt))) | |
11028 | { | |
11029 | enum tree_code tcode = code == NE ? NE_EXPR : EQ_EXPR; | |
11030 | tree type = lang_hooks.types.type_for_mode (mode, unsignedp); | |
11031 | tree temp = fold_build2_loc (loc, BIT_AND_EXPR, TREE_TYPE (arg1), | |
11032 | gimple_assign_rhs1 (srcstmt), | |
11033 | gimple_assign_rhs2 (srcstmt)); | |
11034 | temp = fold_single_bit_test (loc, tcode, temp, arg1, type); | |
11035 | if (temp) | |
11036 | return expand_expr (temp, target, VOIDmode, EXPAND_NORMAL); | |
11037 | } | |
60cd4dae | 11038 | } |
bbf6f052 | 11039 | |
296b4ed9 | 11040 | if (! get_subtarget (target) |
e3be1116 | 11041 | || GET_MODE (subtarget) != operand_mode) |
b93a436e JL |
11042 | subtarget = 0; |
11043 | ||
bbbbb16a | 11044 | expand_operands (arg0, arg1, subtarget, &op0, &op1, EXPAND_NORMAL); |
b93a436e JL |
11045 | |
11046 | if (target == 0) | |
11047 | target = gen_reg_rtx (mode); | |
11048 | ||
495499da PB |
11049 | /* Try a cstore if possible. */ |
11050 | return emit_store_flag_force (target, code, op0, op1, | |
7bba408b JJ |
11051 | operand_mode, unsignedp, |
11052 | (TYPE_PRECISION (ops->type) == 1 | |
11053 | && !TYPE_UNSIGNED (ops->type)) ? -1 : 1); | |
ca695ac9 | 11054 | } |
b93a436e | 11055 | \f |
b93a436e | 11056 | |
ad82abb8 ZW |
11057 | /* Stubs in case we haven't got a casesi insn. */ |
11058 | #ifndef HAVE_casesi | |
11059 | # define HAVE_casesi 0 | |
11060 | # define gen_casesi(a, b, c, d, e) (0) | |
11061 | # define CODE_FOR_casesi CODE_FOR_nothing | |
11062 | #endif | |
11063 | ||
ad82abb8 | 11064 | /* Attempt to generate a casesi instruction. Returns 1 if successful, |
a4da41e1 ER |
11065 | 0 otherwise (i.e. if there is no casesi instruction). |
11066 | ||
11067 | DEFAULT_PROBABILITY is the probability of jumping to the default | |
11068 | label. */ | |
ad82abb8 | 11069 | int |
502b8322 | 11070 | try_casesi (tree index_type, tree index_expr, tree minval, tree range, |
a4da41e1 ER |
11071 | rtx table_label, rtx default_label, rtx fallback_label, |
11072 | int default_probability) | |
ad82abb8 | 11073 | { |
a5c7d693 | 11074 | struct expand_operand ops[5]; |
ad82abb8 | 11075 | enum machine_mode index_mode = SImode; |
ad82abb8 | 11076 | rtx op1, op2, index; |
ad82abb8 ZW |
11077 | |
11078 | if (! HAVE_casesi) | |
11079 | return 0; | |
11080 | ||
11081 | /* Convert the index to SImode. */ | |
11082 | if (GET_MODE_BITSIZE (TYPE_MODE (index_type)) > GET_MODE_BITSIZE (index_mode)) | |
11083 | { | |
11084 | enum machine_mode omode = TYPE_MODE (index_type); | |
84217346 | 11085 | rtx rangertx = expand_normal (range); |
ad82abb8 ZW |
11086 | |
11087 | /* We must handle the endpoints in the original mode. */ | |
3244e67d RS |
11088 | index_expr = build2 (MINUS_EXPR, index_type, |
11089 | index_expr, minval); | |
ad82abb8 | 11090 | minval = integer_zero_node; |
84217346 | 11091 | index = expand_normal (index_expr); |
b7814a18 RG |
11092 | if (default_label) |
11093 | emit_cmp_and_jump_insns (rangertx, index, LTU, NULL_RTX, | |
a4da41e1 ER |
11094 | omode, 1, default_label, |
11095 | default_probability); | |
ad82abb8 ZW |
11096 | /* Now we can safely truncate. */ |
11097 | index = convert_to_mode (index_mode, index, 0); | |
11098 | } | |
11099 | else | |
11100 | { | |
11101 | if (TYPE_MODE (index_type) != index_mode) | |
11102 | { | |
0f250839 | 11103 | index_type = lang_hooks.types.type_for_mode (index_mode, 0); |
3967bc2d | 11104 | index_expr = fold_convert (index_type, index_expr); |
ad82abb8 ZW |
11105 | } |
11106 | ||
84217346 | 11107 | index = expand_normal (index_expr); |
ad82abb8 | 11108 | } |
ad76cef8 | 11109 | |
ad82abb8 ZW |
11110 | do_pending_stack_adjust (); |
11111 | ||
84217346 | 11112 | op1 = expand_normal (minval); |
84217346 | 11113 | op2 = expand_normal (range); |
ad82abb8 | 11114 | |
a5c7d693 RS |
11115 | create_input_operand (&ops[0], index, index_mode); |
11116 | create_convert_operand_from_type (&ops[1], op1, TREE_TYPE (minval)); | |
11117 | create_convert_operand_from_type (&ops[2], op2, TREE_TYPE (range)); | |
11118 | create_fixed_operand (&ops[3], table_label); | |
11119 | create_fixed_operand (&ops[4], (default_label | |
11120 | ? default_label | |
11121 | : fallback_label)); | |
11122 | expand_jump_insn (CODE_FOR_casesi, 5, ops); | |
ad82abb8 ZW |
11123 | return 1; |
11124 | } | |
11125 | ||
11126 | /* Attempt to generate a tablejump instruction; same concept. */ | |
11127 | #ifndef HAVE_tablejump | |
11128 | #define HAVE_tablejump 0 | |
11129 | #define gen_tablejump(x, y) (0) | |
11130 | #endif | |
11131 | ||
11132 | /* Subroutine of the next function. | |
11133 | ||
11134 | INDEX is the value being switched on, with the lowest value | |
b93a436e JL |
11135 | in the table already subtracted. |
11136 | MODE is its expected mode (needed if INDEX is constant). | |
11137 | RANGE is the length of the jump table. | |
11138 | TABLE_LABEL is a CODE_LABEL rtx for the table itself. | |
88d3b7f0 | 11139 | |
b93a436e | 11140 | DEFAULT_LABEL is a CODE_LABEL rtx to jump to if the |
a4da41e1 ER |
11141 | index value is out of range. |
11142 | DEFAULT_PROBABILITY is the probability of jumping to | |
11143 | the default label. */ | |
0f41302f | 11144 | |
ad82abb8 | 11145 | static void |
502b8322 | 11146 | do_tablejump (rtx index, enum machine_mode mode, rtx range, rtx table_label, |
a4da41e1 | 11147 | rtx default_label, int default_probability) |
ca695ac9 | 11148 | { |
b3694847 | 11149 | rtx temp, vector; |
88d3b7f0 | 11150 | |
cb91fab0 JH |
11151 | if (INTVAL (range) > cfun->cfg->max_jumptable_ents) |
11152 | cfun->cfg->max_jumptable_ents = INTVAL (range); | |
1877be45 | 11153 | |
b93a436e JL |
11154 | /* Do an unsigned comparison (in the proper mode) between the index |
11155 | expression and the value which represents the length of the range. | |
11156 | Since we just finished subtracting the lower bound of the range | |
11157 | from the index expression, this comparison allows us to simultaneously | |
11158 | check that the original index expression value is both greater than | |
11159 | or equal to the minimum value of the range and less than or equal to | |
11160 | the maximum value of the range. */ | |
709f5be1 | 11161 | |
b7814a18 RG |
11162 | if (default_label) |
11163 | emit_cmp_and_jump_insns (index, range, GTU, NULL_RTX, mode, 1, | |
a4da41e1 ER |
11164 | default_label, default_probability); |
11165 | ||
bbf6f052 | 11166 | |
b93a436e JL |
11167 | /* If index is in range, it must fit in Pmode. |
11168 | Convert to Pmode so we can index with it. */ | |
11169 | if (mode != Pmode) | |
11170 | index = convert_to_mode (Pmode, index, 1); | |
bbf6f052 | 11171 | |
ba228239 | 11172 | /* Don't let a MEM slip through, because then INDEX that comes |
b93a436e JL |
11173 | out of PIC_CASE_VECTOR_ADDRESS won't be a valid address, |
11174 | and break_out_memory_refs will go to work on it and mess it up. */ | |
11175 | #ifdef PIC_CASE_VECTOR_ADDRESS | |
f8cfc6aa | 11176 | if (flag_pic && !REG_P (index)) |
b93a436e JL |
11177 | index = copy_to_mode_reg (Pmode, index); |
11178 | #endif | |
ca695ac9 | 11179 | |
b93a436e JL |
11180 | /* ??? The only correct use of CASE_VECTOR_MODE is the one inside the |
11181 | GET_MODE_SIZE, because this indicates how large insns are. The other | |
11182 | uses should all be Pmode, because they are addresses. This code | |
11183 | could fail if addresses and insns are not the same size. */ | |
e7f31789 JL |
11184 | index = simplify_gen_binary (MULT, Pmode, index, |
11185 | gen_int_mode (GET_MODE_SIZE (CASE_VECTOR_MODE), | |
11186 | Pmode)); | |
11187 | index = simplify_gen_binary (PLUS, Pmode, index, | |
11188 | gen_rtx_LABEL_REF (Pmode, table_label)); | |
11189 | ||
b93a436e JL |
11190 | #ifdef PIC_CASE_VECTOR_ADDRESS |
11191 | if (flag_pic) | |
11192 | index = PIC_CASE_VECTOR_ADDRESS (index); | |
11193 | else | |
bbf6f052 | 11194 | #endif |
3de5e93a | 11195 | index = memory_address (CASE_VECTOR_MODE, index); |
b93a436e | 11196 | temp = gen_reg_rtx (CASE_VECTOR_MODE); |
542a8afa | 11197 | vector = gen_const_mem (CASE_VECTOR_MODE, index); |
b93a436e JL |
11198 | convert_move (temp, vector, 0); |
11199 | ||
11200 | emit_jump_insn (gen_tablejump (temp, table_label)); | |
11201 | ||
11202 | /* If we are generating PIC code or if the table is PC-relative, the | |
11203 | table and JUMP_INSN must be adjacent, so don't output a BARRIER. */ | |
11204 | if (! CASE_VECTOR_PC_RELATIVE && ! flag_pic) | |
11205 | emit_barrier (); | |
bbf6f052 | 11206 | } |
b93a436e | 11207 | |
ad82abb8 | 11208 | int |
502b8322 | 11209 | try_tablejump (tree index_type, tree index_expr, tree minval, tree range, |
a4da41e1 | 11210 | rtx table_label, rtx default_label, int default_probability) |
ad82abb8 ZW |
11211 | { |
11212 | rtx index; | |
11213 | ||
11214 | if (! HAVE_tablejump) | |
11215 | return 0; | |
11216 | ||
4845b383 | 11217 | index_expr = fold_build2 (MINUS_EXPR, index_type, |
3967bc2d RS |
11218 | fold_convert (index_type, index_expr), |
11219 | fold_convert (index_type, minval)); | |
84217346 | 11220 | index = expand_normal (index_expr); |
ad82abb8 ZW |
11221 | do_pending_stack_adjust (); |
11222 | ||
11223 | do_tablejump (index, TYPE_MODE (index_type), | |
11224 | convert_modes (TYPE_MODE (index_type), | |
11225 | TYPE_MODE (TREE_TYPE (range)), | |
84217346 | 11226 | expand_normal (range), |
8df83eae | 11227 | TYPE_UNSIGNED (TREE_TYPE (range))), |
a4da41e1 | 11228 | table_label, default_label, default_probability); |
ad82abb8 ZW |
11229 | return 1; |
11230 | } | |
e2500fed | 11231 | |
d744e06e AH |
11232 | /* Return a CONST_VECTOR rtx for a VECTOR_CST tree. */ |
11233 | static rtx | |
502b8322 | 11234 | const_vector_from_tree (tree exp) |
d744e06e AH |
11235 | { |
11236 | rtvec v; | |
d2a12ae7 RG |
11237 | unsigned i; |
11238 | int units; | |
11239 | tree elt; | |
d744e06e AH |
11240 | enum machine_mode inner, mode; |
11241 | ||
11242 | mode = TYPE_MODE (TREE_TYPE (exp)); | |
11243 | ||
6de9cd9a | 11244 | if (initializer_zerop (exp)) |
d744e06e AH |
11245 | return CONST0_RTX (mode); |
11246 | ||
11247 | units = GET_MODE_NUNITS (mode); | |
11248 | inner = GET_MODE_INNER (mode); | |
11249 | ||
11250 | v = rtvec_alloc (units); | |
11251 | ||
d2a12ae7 | 11252 | for (i = 0; i < VECTOR_CST_NELTS (exp); ++i) |
d744e06e | 11253 | { |
d2a12ae7 | 11254 | elt = VECTOR_CST_ELT (exp, i); |
d744e06e AH |
11255 | |
11256 | if (TREE_CODE (elt) == REAL_CST) | |
11257 | RTVEC_ELT (v, i) = CONST_DOUBLE_FROM_REAL_VALUE (TREE_REAL_CST (elt), | |
11258 | inner); | |
0f996086 CF |
11259 | else if (TREE_CODE (elt) == FIXED_CST) |
11260 | RTVEC_ELT (v, i) = CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (elt), | |
11261 | inner); | |
d744e06e | 11262 | else |
807e902e | 11263 | RTVEC_ELT (v, i) = immed_wide_int_const (elt, inner); |
d744e06e AH |
11264 | } |
11265 | ||
a73b091d | 11266 | return gen_rtx_CONST_VECTOR (mode, v); |
d744e06e | 11267 | } |
f9417da1 | 11268 | |
bde8a146 | 11269 | /* Build a decl for a personality function given a language prefix. */ |
f9417da1 RG |
11270 | |
11271 | tree | |
bde8a146 | 11272 | build_personality_function (const char *lang) |
f9417da1 | 11273 | { |
bde8a146 | 11274 | const char *unwind_and_version; |
f9417da1 | 11275 | tree decl, type; |
bde8a146 RH |
11276 | char *name; |
11277 | ||
677f3fa8 | 11278 | switch (targetm_common.except_unwind_info (&global_options)) |
bde8a146 RH |
11279 | { |
11280 | case UI_NONE: | |
11281 | return NULL; | |
11282 | case UI_SJLJ: | |
11283 | unwind_and_version = "_sj0"; | |
11284 | break; | |
11285 | case UI_DWARF2: | |
11286 | case UI_TARGET: | |
11287 | unwind_and_version = "_v0"; | |
11288 | break; | |
bf1431e3 TG |
11289 | case UI_SEH: |
11290 | unwind_and_version = "_seh0"; | |
11291 | break; | |
bde8a146 RH |
11292 | default: |
11293 | gcc_unreachable (); | |
11294 | } | |
11295 | ||
11296 | name = ACONCAT (("__", lang, "_personality", unwind_and_version, NULL)); | |
f9417da1 RG |
11297 | |
11298 | type = build_function_type_list (integer_type_node, integer_type_node, | |
11299 | long_long_unsigned_type_node, | |
11300 | ptr_type_node, ptr_type_node, NULL_TREE); | |
11301 | decl = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL, | |
11302 | get_identifier (name), type); | |
11303 | DECL_ARTIFICIAL (decl) = 1; | |
11304 | DECL_EXTERNAL (decl) = 1; | |
11305 | TREE_PUBLIC (decl) = 1; | |
11306 | ||
11307 | /* Zap the nonsensical SYMBOL_REF_DECL for this. What we're left with | |
11308 | are the flags assigned by targetm.encode_section_info. */ | |
11309 | SET_SYMBOL_REF_DECL (XEXP (DECL_RTL (decl), 0), NULL); | |
11310 | ||
11311 | return decl; | |
11312 | } | |
11313 | ||
11314 | /* Extracts the personality function of DECL and returns the corresponding | |
11315 | libfunc. */ | |
11316 | ||
11317 | rtx | |
11318 | get_personality_function (tree decl) | |
11319 | { | |
11320 | tree personality = DECL_FUNCTION_PERSONALITY (decl); | |
11321 | enum eh_personality_kind pk; | |
11322 | ||
11323 | pk = function_needs_eh_personality (DECL_STRUCT_FUNCTION (decl)); | |
11324 | if (pk == eh_personality_none) | |
11325 | return NULL; | |
11326 | ||
11327 | if (!personality | |
11328 | && pk == eh_personality_any) | |
11329 | personality = lang_hooks.eh_personality (); | |
11330 | ||
11331 | if (pk == eh_personality_lang) | |
11332 | gcc_assert (personality != NULL_TREE); | |
11333 | ||
11334 | return XEXP (DECL_RTL (personality), 0); | |
11335 | } | |
11336 | ||
e2500fed | 11337 | #include "gt-expr.h" |