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10f307d9 | 1 | /* Convert tree expression to rtl instructions, for GNU compiler. |
e1439bcb | 2 | Copyright (C) 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, |
38ba30bf | 3 | 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011 |
f96bd2bf | 4 | Free Software Foundation, Inc. |
10f307d9 | 5 | |
f12b58b3 | 6 | This file is part of GCC. |
10f307d9 | 7 | |
f12b58b3 | 8 | GCC is free software; you can redistribute it and/or modify it under |
9 | the terms of the GNU General Public License as published by the Free | |
8c4c00c1 | 10 | Software Foundation; either version 3, or (at your option) any later |
f12b58b3 | 11 | version. |
10f307d9 | 12 | |
f12b58b3 | 13 | GCC is distributed in the hope that it will be useful, but WITHOUT ANY |
14 | WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
15 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
16 | for more details. | |
10f307d9 | 17 | |
18 | You should have received a copy of the GNU General Public License | |
8c4c00c1 | 19 | along with GCC; see the file COPYING3. If not see |
20 | <http://www.gnu.org/licenses/>. */ | |
10f307d9 | 21 | |
10f307d9 | 22 | #include "config.h" |
405711de | 23 | #include "system.h" |
805e22b2 | 24 | #include "coretypes.h" |
25 | #include "tm.h" | |
649d8da6 | 26 | #include "machmode.h" |
10f307d9 | 27 | #include "rtl.h" |
28 | #include "tree.h" | |
29 | #include "flags.h" | |
09994a52 | 30 | #include "regs.h" |
261db321 | 31 | #include "hard-reg-set.h" |
037a5228 | 32 | #include "except.h" |
10f307d9 | 33 | #include "function.h" |
10f307d9 | 34 | #include "insn-config.h" |
3084721c | 35 | #include "insn-attr.h" |
fa56dc1d | 36 | /* Include expr.h after insn-config.h so we get HAVE_conditional_move. */ |
cd03a192 | 37 | #include "expr.h" |
d8fc4d0b | 38 | #include "optabs.h" |
39 | #include "libfuncs.h" | |
10f307d9 | 40 | #include "recog.h" |
6702c250 | 41 | #include "reload.h" |
10f307d9 | 42 | #include "output.h" |
10f307d9 | 43 | #include "typeclass.h" |
12874aaf | 44 | #include "toplev.h" |
b3187c7c | 45 | #include "langhooks.h" |
a3c49299 | 46 | #include "intl.h" |
075136a2 | 47 | #include "tm_p.h" |
4ee9c684 | 48 | #include "tree-iterator.h" |
5290ebdb | 49 | #include "tree-pass.h" |
50 | #include "tree-flow.h" | |
2c8ff1ed | 51 | #include "target.h" |
5290ebdb | 52 | #include "timevar.h" |
3072d30e | 53 | #include "df.h" |
cb7f680b | 54 | #include "diagnostic.h" |
a8dd994c | 55 | #include "ssaexpand.h" |
db5ca0ab | 56 | #include "target-globals.h" |
10f307d9 | 57 | |
10f307d9 | 58 | /* Decide whether a function's arguments should be processed |
7473731d | 59 | from first to last or from last to first. |
60 | ||
61 | They should if the stack and args grow in opposite directions, but | |
62 | only if we have push insns. */ | |
10f307d9 | 63 | |
10f307d9 | 64 | #ifdef PUSH_ROUNDING |
7473731d | 65 | |
2a8e54a4 | 66 | #ifndef PUSH_ARGS_REVERSED |
cd5f9545 | 67 | #if defined (STACK_GROWS_DOWNWARD) != defined (ARGS_GROW_DOWNWARD) |
fa56dc1d | 68 | #define PUSH_ARGS_REVERSED /* If it's last to first. */ |
10f307d9 | 69 | #endif |
2a8e54a4 | 70 | #endif |
7473731d | 71 | |
10f307d9 | 72 | #endif |
73 | ||
74 | #ifndef STACK_PUSH_CODE | |
75 | #ifdef STACK_GROWS_DOWNWARD | |
76 | #define STACK_PUSH_CODE PRE_DEC | |
77 | #else | |
78 | #define STACK_PUSH_CODE PRE_INC | |
79 | #endif | |
80 | #endif | |
81 | ||
c0bfc78e | 82 | |
10f307d9 | 83 | /* If this is nonzero, we do not bother generating VOLATILE |
84 | around volatile memory references, and we are willing to | |
85 | output indirect addresses. If cse is to follow, we reject | |
86 | indirect addresses so a useful potential cse is generated; | |
87 | if it is used only once, instruction combination will produce | |
88 | the same indirect address eventually. */ | |
89 | int cse_not_expected; | |
90 | ||
3ebd94bd | 91 | /* This structure is used by move_by_pieces to describe the move to |
92 | be performed. */ | |
584511c1 | 93 | struct move_by_pieces_d |
3ebd94bd | 94 | { |
95 | rtx to; | |
96 | rtx to_addr; | |
97 | int autinc_to; | |
98 | int explicit_inc_to; | |
99 | rtx from; | |
100 | rtx from_addr; | |
101 | int autinc_from; | |
102 | int explicit_inc_from; | |
f7c44134 | 103 | unsigned HOST_WIDE_INT len; |
104 | HOST_WIDE_INT offset; | |
3ebd94bd | 105 | int reverse; |
106 | }; | |
107 | ||
6840589f | 108 | /* This structure is used by store_by_pieces to describe the clear to |
dbd14dc5 | 109 | be performed. */ |
110 | ||
584511c1 | 111 | struct store_by_pieces_d |
dbd14dc5 | 112 | { |
113 | rtx to; | |
114 | rtx to_addr; | |
115 | int autinc_to; | |
116 | int explicit_inc_to; | |
f7c44134 | 117 | unsigned HOST_WIDE_INT len; |
118 | HOST_WIDE_INT offset; | |
35cb5232 | 119 | rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode); |
b9a7cc69 | 120 | void *constfundata; |
dbd14dc5 | 121 | int reverse; |
122 | }; | |
123 | ||
35cb5232 | 124 | static unsigned HOST_WIDE_INT move_by_pieces_ninsns (unsigned HOST_WIDE_INT, |
025d4f81 | 125 | unsigned int, |
35cb5232 | 126 | unsigned int); |
127 | static void move_by_pieces_1 (rtx (*) (rtx, ...), enum machine_mode, | |
584511c1 | 128 | struct move_by_pieces_d *); |
35cb5232 | 129 | static bool block_move_libcall_safe_for_call_parm (void); |
162719b3 | 130 | static bool emit_block_move_via_movmem (rtx, rtx, rtx, unsigned, unsigned, HOST_WIDE_INT); |
35cb5232 | 131 | static tree emit_block_move_libcall_fn (int); |
132 | static void emit_block_move_via_loop (rtx, rtx, rtx, unsigned); | |
133 | static rtx clear_by_pieces_1 (void *, HOST_WIDE_INT, enum machine_mode); | |
134 | static void clear_by_pieces (rtx, unsigned HOST_WIDE_INT, unsigned int); | |
584511c1 | 135 | static void store_by_pieces_1 (struct store_by_pieces_d *, unsigned int); |
35cb5232 | 136 | static void store_by_pieces_2 (rtx (*) (rtx, ...), enum machine_mode, |
584511c1 | 137 | struct store_by_pieces_d *); |
35cb5232 | 138 | static tree clear_storage_libcall_fn (int); |
139 | static rtx compress_float_constant (rtx, rtx); | |
140 | static rtx get_subtarget (rtx); | |
35cb5232 | 141 | static void store_constructor_field (rtx, unsigned HOST_WIDE_INT, |
142 | HOST_WIDE_INT, enum machine_mode, | |
32c2fdea | 143 | tree, tree, int, alias_set_type); |
35cb5232 | 144 | static void store_constructor (tree, rtx, int, HOST_WIDE_INT); |
145 | static rtx store_field (rtx, HOST_WIDE_INT, HOST_WIDE_INT, enum machine_mode, | |
32c2fdea | 146 | tree, tree, alias_set_type, bool); |
35cb5232 | 147 | |
b7bf20db | 148 | static unsigned HOST_WIDE_INT highest_pow2_factor_for_target (const_tree, const_tree); |
35cb5232 | 149 | |
1f1872fd | 150 | static int is_aligning_offset (const_tree, const_tree); |
33204670 | 151 | static void expand_operands (tree, tree, rtx, rtx*, rtx*, |
152 | enum expand_modifier); | |
4f7f7efd | 153 | static rtx reduce_to_bit_field_precision (rtx, rtx, tree); |
2c02962c | 154 | static rtx do_store_flag (sepops, rtx, enum machine_mode); |
fad4a30c | 155 | #ifdef PUSH_ROUNDING |
35cb5232 | 156 | static void emit_single_push_insn (enum machine_mode, rtx, tree); |
fad4a30c | 157 | #endif |
35cb5232 | 158 | static void do_tablejump (rtx, enum machine_mode, rtx, rtx, rtx); |
159 | static rtx const_vector_from_tree (tree); | |
83016f38 | 160 | static void write_complex_part (rtx, rtx, bool); |
10f307d9 | 161 | |
53bd09ab | 162 | /* This macro is used to determine whether move_by_pieces should be called |
fa56dc1d | 163 | to perform a structure copy. */ |
53bd09ab | 164 | #ifndef MOVE_BY_PIECES_P |
325d1c45 | 165 | #define MOVE_BY_PIECES_P(SIZE, ALIGN) \ |
025d4f81 | 166 | (move_by_pieces_ninsns (SIZE, ALIGN, MOVE_MAX_PIECES + 1) \ |
f5733e7c | 167 | < (unsigned int) MOVE_RATIO (optimize_insn_for_speed_p ())) |
53bd09ab | 168 | #endif |
169 | ||
310d3ec9 | 170 | /* This macro is used to determine whether clear_by_pieces should be |
171 | called to clear storage. */ | |
172 | #ifndef CLEAR_BY_PIECES_P | |
173 | #define CLEAR_BY_PIECES_P(SIZE, ALIGN) \ | |
025d4f81 | 174 | (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \ |
f5733e7c | 175 | < (unsigned int) CLEAR_RATIO (optimize_insn_for_speed_p ())) |
310d3ec9 | 176 | #endif |
177 | ||
805e22b2 | 178 | /* This macro is used to determine whether store_by_pieces should be |
4b297e2e | 179 | called to "memset" storage with byte values other than zero. */ |
180 | #ifndef SET_BY_PIECES_P | |
181 | #define SET_BY_PIECES_P(SIZE, ALIGN) \ | |
182 | (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \ | |
f5733e7c | 183 | < (unsigned int) SET_RATIO (optimize_insn_for_speed_p ())) |
4b297e2e | 184 | #endif |
185 | ||
186 | /* This macro is used to determine whether store_by_pieces should be | |
187 | called to "memcpy" storage when the source is a constant string. */ | |
805e22b2 | 188 | #ifndef STORE_BY_PIECES_P |
025d4f81 | 189 | #define STORE_BY_PIECES_P(SIZE, ALIGN) \ |
190 | (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \ | |
f5733e7c | 191 | < (unsigned int) MOVE_RATIO (optimize_insn_for_speed_p ())) |
805e22b2 | 192 | #endif |
193 | ||
6ef828f9 | 194 | /* SLOW_UNALIGNED_ACCESS is nonzero if unaligned accesses are very slow. */ |
35f44ac1 | 195 | |
196 | #ifndef SLOW_UNALIGNED_ACCESS | |
9439ebf7 | 197 | #define SLOW_UNALIGNED_ACCESS(MODE, ALIGN) STRICT_ALIGNMENT |
35f44ac1 | 198 | #endif |
10f307d9 | 199 | \f |
6d8b68a3 | 200 | /* This is run to set up which modes can be used |
201 | directly in memory and to initialize the block move optab. It is run | |
202 | at the beginning of compilation and when the target is reinitialized. */ | |
07edfa02 | 203 | |
204 | void | |
6d8b68a3 | 205 | init_expr_target (void) |
07edfa02 | 206 | { |
207 | rtx insn, pat; | |
208 | enum machine_mode mode; | |
6fa98783 | 209 | int num_clobbers; |
9e042f31 | 210 | rtx mem, mem1; |
0c7f5242 | 211 | rtx reg; |
9e042f31 | 212 | |
a97fcedd | 213 | /* Try indexing by frame ptr and try by stack ptr. |
214 | It is known that on the Convex the stack ptr isn't a valid index. | |
215 | With luck, one or the other is valid on any machine. */ | |
9e042f31 | 216 | mem = gen_rtx_MEM (VOIDmode, stack_pointer_rtx); |
217 | mem1 = gen_rtx_MEM (VOIDmode, frame_pointer_rtx); | |
07edfa02 | 218 | |
0c7f5242 | 219 | /* A scratch register we can modify in-place below to avoid |
220 | useless RTL allocations. */ | |
221 | reg = gen_rtx_REG (VOIDmode, -1); | |
222 | ||
7a5749cc | 223 | insn = rtx_alloc (INSN); |
b9c74b4d | 224 | pat = gen_rtx_SET (VOIDmode, NULL_RTX, NULL_RTX); |
7a5749cc | 225 | PATTERN (insn) = pat; |
07edfa02 | 226 | |
227 | for (mode = VOIDmode; (int) mode < NUM_MACHINE_MODES; | |
228 | mode = (enum machine_mode) ((int) mode + 1)) | |
229 | { | |
230 | int regno; | |
07edfa02 | 231 | |
232 | direct_load[(int) mode] = direct_store[(int) mode] = 0; | |
233 | PUT_MODE (mem, mode); | |
a97fcedd | 234 | PUT_MODE (mem1, mode); |
0c7f5242 | 235 | PUT_MODE (reg, mode); |
07edfa02 | 236 | |
3c209fda | 237 | /* See if there is some register that can be used in this mode and |
238 | directly loaded or stored from memory. */ | |
239 | ||
b63679d2 | 240 | if (mode != VOIDmode && mode != BLKmode) |
241 | for (regno = 0; regno < FIRST_PSEUDO_REGISTER | |
242 | && (direct_load[(int) mode] == 0 || direct_store[(int) mode] == 0); | |
243 | regno++) | |
244 | { | |
245 | if (! HARD_REGNO_MODE_OK (regno, mode)) | |
246 | continue; | |
3c209fda | 247 | |
3072d30e | 248 | SET_REGNO (reg, regno); |
3c209fda | 249 | |
b63679d2 | 250 | SET_SRC (pat) = mem; |
251 | SET_DEST (pat) = reg; | |
252 | if (recog (pat, insn, &num_clobbers) >= 0) | |
253 | direct_load[(int) mode] = 1; | |
3c209fda | 254 | |
a97fcedd | 255 | SET_SRC (pat) = mem1; |
256 | SET_DEST (pat) = reg; | |
257 | if (recog (pat, insn, &num_clobbers) >= 0) | |
258 | direct_load[(int) mode] = 1; | |
259 | ||
b63679d2 | 260 | SET_SRC (pat) = reg; |
261 | SET_DEST (pat) = mem; | |
262 | if (recog (pat, insn, &num_clobbers) >= 0) | |
263 | direct_store[(int) mode] = 1; | |
a97fcedd | 264 | |
265 | SET_SRC (pat) = reg; | |
266 | SET_DEST (pat) = mem1; | |
267 | if (recog (pat, insn, &num_clobbers) >= 0) | |
268 | direct_store[(int) mode] = 1; | |
b63679d2 | 269 | } |
07edfa02 | 270 | } |
271 | ||
c0c4a46d | 272 | mem = gen_rtx_MEM (VOIDmode, gen_rtx_raw_REG (Pmode, 10000)); |
273 | ||
274 | for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode; | |
275 | mode = GET_MODE_WIDER_MODE (mode)) | |
276 | { | |
277 | enum machine_mode srcmode; | |
278 | for (srcmode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); srcmode != mode; | |
ff385626 | 279 | srcmode = GET_MODE_WIDER_MODE (srcmode)) |
c0c4a46d | 280 | { |
281 | enum insn_code ic; | |
282 | ||
283 | ic = can_extend_p (mode, srcmode, 0); | |
284 | if (ic == CODE_FOR_nothing) | |
285 | continue; | |
286 | ||
287 | PUT_MODE (mem, srcmode); | |
ff385626 | 288 | |
39c56a89 | 289 | if (insn_operand_matches (ic, 1, mem)) |
c0c4a46d | 290 | float_extend_from_mem[mode][srcmode] = true; |
291 | } | |
292 | } | |
07edfa02 | 293 | } |
6fa98783 | 294 | |
10f307d9 | 295 | /* This is run at the start of compiling a function. */ |
296 | ||
297 | void | |
35cb5232 | 298 | init_expr (void) |
10f307d9 | 299 | { |
fd6ffb7c | 300 | memset (&crtl->expr, 0, sizeof (crtl->expr)); |
10f307d9 | 301 | } |
10f307d9 | 302 | \f |
303 | /* Copy data from FROM to TO, where the machine modes are not the same. | |
68a556d6 | 304 | Both modes may be integer, or both may be floating, or both may be |
305 | fixed-point. | |
10f307d9 | 306 | UNSIGNEDP should be nonzero if FROM is an unsigned type. |
307 | This causes zero-extension instead of sign-extension. */ | |
308 | ||
309 | void | |
35cb5232 | 310 | convert_move (rtx to, rtx from, int unsignedp) |
10f307d9 | 311 | { |
312 | enum machine_mode to_mode = GET_MODE (to); | |
313 | enum machine_mode from_mode = GET_MODE (from); | |
cee7491d | 314 | int to_real = SCALAR_FLOAT_MODE_P (to_mode); |
315 | int from_real = SCALAR_FLOAT_MODE_P (from_mode); | |
10f307d9 | 316 | enum insn_code code; |
317 | rtx libcall; | |
318 | ||
319 | /* rtx code for making an equivalent value. */ | |
65923445 | 320 | enum rtx_code equiv_code = (unsignedp < 0 ? UNKNOWN |
321 | : (unsignedp ? ZERO_EXTEND : SIGN_EXTEND)); | |
10f307d9 | 322 | |
10f307d9 | 323 | |
611234b4 | 324 | gcc_assert (to_real == from_real); |
1f8b6002 | 325 | gcc_assert (to_mode != BLKmode); |
326 | gcc_assert (from_mode != BLKmode); | |
10f307d9 | 327 | |
4ee9c684 | 328 | /* If the source and destination are already the same, then there's |
329 | nothing to do. */ | |
330 | if (to == from) | |
331 | return; | |
332 | ||
acfb31e5 | 333 | /* If FROM is a SUBREG that indicates that we have already done at least |
334 | the required extension, strip it. We don't handle such SUBREGs as | |
335 | TO here. */ | |
336 | ||
337 | if (GET_CODE (from) == SUBREG && SUBREG_PROMOTED_VAR_P (from) | |
338 | && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (from))) | |
339 | >= GET_MODE_SIZE (to_mode)) | |
340 | && SUBREG_PROMOTED_UNSIGNED_P (from) == unsignedp) | |
341 | from = gen_lowpart (to_mode, from), from_mode = to_mode; | |
342 | ||
611234b4 | 343 | gcc_assert (GET_CODE (to) != SUBREG || !SUBREG_PROMOTED_VAR_P (to)); |
acfb31e5 | 344 | |
10f307d9 | 345 | if (to_mode == from_mode |
346 | || (from_mode == VOIDmode && CONSTANT_P (from))) | |
347 | { | |
348 | emit_move_insn (to, from); | |
349 | return; | |
350 | } | |
351 | ||
8a95ab85 | 352 | if (VECTOR_MODE_P (to_mode) || VECTOR_MODE_P (from_mode)) |
353 | { | |
611234b4 | 354 | gcc_assert (GET_MODE_BITSIZE (from_mode) == GET_MODE_BITSIZE (to_mode)); |
fa56dc1d | 355 | |
8a95ab85 | 356 | if (VECTOR_MODE_P (to_mode)) |
1c0d4c2c | 357 | from = simplify_gen_subreg (to_mode, from, GET_MODE (from), 0); |
8a95ab85 | 358 | else |
1c0d4c2c | 359 | to = simplify_gen_subreg (from_mode, to, GET_MODE (to), 0); |
8a95ab85 | 360 | |
361 | emit_move_insn (to, from); | |
362 | return; | |
363 | } | |
364 | ||
a9f93c81 | 365 | if (GET_CODE (to) == CONCAT && GET_CODE (from) == CONCAT) |
366 | { | |
367 | convert_move (XEXP (to, 0), XEXP (from, 0), unsignedp); | |
368 | convert_move (XEXP (to, 1), XEXP (from, 1), unsignedp); | |
369 | return; | |
370 | } | |
371 | ||
10f307d9 | 372 | if (to_real) |
373 | { | |
542baf17 | 374 | rtx value, insns; |
a7cc195f | 375 | convert_optab tab; |
ece3ba9a | 376 | |
069b07bf | 377 | gcc_assert ((GET_MODE_PRECISION (from_mode) |
378 | != GET_MODE_PRECISION (to_mode)) | |
379 | || (DECIMAL_FLOAT_MODE_P (from_mode) | |
380 | != DECIMAL_FLOAT_MODE_P (to_mode))); | |
1f8b6002 | 381 | |
069b07bf | 382 | if (GET_MODE_PRECISION (from_mode) == GET_MODE_PRECISION (to_mode)) |
383 | /* Conversion between decimal float and binary float, same size. */ | |
384 | tab = DECIMAL_FLOAT_MODE_P (from_mode) ? trunc_optab : sext_optab; | |
385 | else if (GET_MODE_PRECISION (from_mode) < GET_MODE_PRECISION (to_mode)) | |
a7cc195f | 386 | tab = sext_optab; |
a7cc195f | 387 | else |
611234b4 | 388 | tab = trunc_optab; |
dd8a4c60 | 389 | |
a7cc195f | 390 | /* Try converting directly if the insn is supported. */ |
dd8a4c60 | 391 | |
d6bf3b14 | 392 | code = convert_optab_handler (tab, to_mode, from_mode); |
a7cc195f | 393 | if (code != CODE_FOR_nothing) |
c2a91a88 | 394 | { |
a7cc195f | 395 | emit_unop_insn (code, to, from, |
396 | tab == sext_optab ? FLOAT_EXTEND : FLOAT_TRUNCATE); | |
c2a91a88 | 397 | return; |
398 | } | |
c2a91a88 | 399 | |
a7cc195f | 400 | /* Otherwise use a libcall. */ |
f36b9f69 | 401 | libcall = convert_optab_libfunc (tab, to_mode, from_mode); |
fa56dc1d | 402 | |
611234b4 | 403 | /* Is this conversion implemented yet? */ |
404 | gcc_assert (libcall); | |
10f307d9 | 405 | |
542baf17 | 406 | start_sequence (); |
2c5d421b | 407 | value = emit_library_call_value (libcall, NULL_RTX, LCT_CONST, to_mode, |
ece3ba9a | 408 | 1, from, from_mode); |
542baf17 | 409 | insns = get_insns (); |
410 | end_sequence (); | |
1d5ca076 | 411 | emit_libcall_block (insns, to, value, |
412 | tab == trunc_optab ? gen_rtx_FLOAT_TRUNCATE (to_mode, | |
413 | from) | |
414 | : gen_rtx_FLOAT_EXTEND (to_mode, from)); | |
10f307d9 | 415 | return; |
416 | } | |
417 | ||
a7cc195f | 418 | /* Handle pointer conversion. */ /* SPEE 900220. */ |
419 | /* Targets are expected to provide conversion insns between PxImode and | |
420 | xImode for all MODE_PARTIAL_INT modes they use, but no others. */ | |
421 | if (GET_MODE_CLASS (to_mode) == MODE_PARTIAL_INT) | |
422 | { | |
423 | enum machine_mode full_mode | |
424 | = smallest_mode_for_size (GET_MODE_BITSIZE (to_mode), MODE_INT); | |
425 | ||
d6bf3b14 | 426 | gcc_assert (convert_optab_handler (trunc_optab, to_mode, full_mode) |
611234b4 | 427 | != CODE_FOR_nothing); |
a7cc195f | 428 | |
429 | if (full_mode != from_mode) | |
430 | from = convert_to_mode (full_mode, from, unsignedp); | |
d6bf3b14 | 431 | emit_unop_insn (convert_optab_handler (trunc_optab, to_mode, full_mode), |
a7cc195f | 432 | to, from, UNKNOWN); |
433 | return; | |
434 | } | |
435 | if (GET_MODE_CLASS (from_mode) == MODE_PARTIAL_INT) | |
436 | { | |
06633980 | 437 | rtx new_from; |
a7cc195f | 438 | enum machine_mode full_mode |
439 | = smallest_mode_for_size (GET_MODE_BITSIZE (from_mode), MODE_INT); | |
440 | ||
d6bf3b14 | 441 | gcc_assert (convert_optab_handler (sext_optab, full_mode, from_mode) |
611234b4 | 442 | != CODE_FOR_nothing); |
a7cc195f | 443 | |
a7cc195f | 444 | if (to_mode == full_mode) |
06633980 | 445 | { |
d6bf3b14 | 446 | emit_unop_insn (convert_optab_handler (sext_optab, full_mode, |
447 | from_mode), | |
06633980 | 448 | to, from, UNKNOWN); |
449 | return; | |
450 | } | |
451 | ||
452 | new_from = gen_reg_rtx (full_mode); | |
d6bf3b14 | 453 | emit_unop_insn (convert_optab_handler (sext_optab, full_mode, from_mode), |
06633980 | 454 | new_from, from, UNKNOWN); |
a7cc195f | 455 | |
aab2cf92 | 456 | /* else proceed to integer conversions below. */ |
a7cc195f | 457 | from_mode = full_mode; |
06633980 | 458 | from = new_from; |
a7cc195f | 459 | } |
460 | ||
68a556d6 | 461 | /* Make sure both are fixed-point modes or both are not. */ |
462 | gcc_assert (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode) == | |
463 | ALL_SCALAR_FIXED_POINT_MODE_P (to_mode)); | |
464 | if (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode)) | |
465 | { | |
466 | /* If we widen from_mode to to_mode and they are in the same class, | |
467 | we won't saturate the result. | |
468 | Otherwise, always saturate the result to play safe. */ | |
469 | if (GET_MODE_CLASS (from_mode) == GET_MODE_CLASS (to_mode) | |
470 | && GET_MODE_SIZE (from_mode) < GET_MODE_SIZE (to_mode)) | |
471 | expand_fixed_convert (to, from, 0, 0); | |
472 | else | |
473 | expand_fixed_convert (to, from, 0, 1); | |
474 | return; | |
475 | } | |
476 | ||
10f307d9 | 477 | /* Now both modes are integers. */ |
478 | ||
479 | /* Handle expanding beyond a word. */ | |
480 | if (GET_MODE_BITSIZE (from_mode) < GET_MODE_BITSIZE (to_mode) | |
481 | && GET_MODE_BITSIZE (to_mode) > BITS_PER_WORD) | |
482 | { | |
483 | rtx insns; | |
484 | rtx lowpart; | |
485 | rtx fill_value; | |
486 | rtx lowfrom; | |
487 | int i; | |
488 | enum machine_mode lowpart_mode; | |
489 | int nwords = CEIL (GET_MODE_SIZE (to_mode), UNITS_PER_WORD); | |
490 | ||
491 | /* Try converting directly if the insn is supported. */ | |
492 | if ((code = can_extend_p (to_mode, from_mode, unsignedp)) | |
493 | != CODE_FOR_nothing) | |
494 | { | |
6a0b5011 | 495 | /* If FROM is a SUBREG, put it into a register. Do this |
496 | so that we always generate the same set of insns for | |
497 | better cse'ing; if an intermediate assignment occurred, | |
498 | we won't be doing the operation directly on the SUBREG. */ | |
499 | if (optimize > 0 && GET_CODE (from) == SUBREG) | |
500 | from = force_reg (from_mode, from); | |
10f307d9 | 501 | emit_unop_insn (code, to, from, equiv_code); |
502 | return; | |
503 | } | |
504 | /* Next, try converting via full word. */ | |
505 | else if (GET_MODE_BITSIZE (from_mode) < BITS_PER_WORD | |
506 | && ((code = can_extend_p (to_mode, word_mode, unsignedp)) | |
507 | != CODE_FOR_nothing)) | |
508 | { | |
8ae2fa3b | 509 | rtx word_to = gen_reg_rtx (word_mode); |
8ad4c111 | 510 | if (REG_P (to)) |
d6af6bc2 | 511 | { |
512 | if (reg_overlap_mentioned_p (to, from)) | |
513 | from = force_reg (from_mode, from); | |
18b42941 | 514 | emit_clobber (to); |
d6af6bc2 | 515 | } |
8ae2fa3b | 516 | convert_move (word_to, from, unsignedp); |
517 | emit_unop_insn (code, to, word_to, equiv_code); | |
10f307d9 | 518 | return; |
519 | } | |
520 | ||
521 | /* No special multiword conversion insn; do it by hand. */ | |
522 | start_sequence (); | |
523 | ||
ab72e117 | 524 | /* Since we will turn this into a no conflict block, we must ensure |
525 | that the source does not overlap the target. */ | |
526 | ||
527 | if (reg_overlap_mentioned_p (to, from)) | |
528 | from = force_reg (from_mode, from); | |
529 | ||
10f307d9 | 530 | /* Get a copy of FROM widened to a word, if necessary. */ |
531 | if (GET_MODE_BITSIZE (from_mode) < BITS_PER_WORD) | |
532 | lowpart_mode = word_mode; | |
533 | else | |
534 | lowpart_mode = from_mode; | |
535 | ||
536 | lowfrom = convert_to_mode (lowpart_mode, from, unsignedp); | |
537 | ||
538 | lowpart = gen_lowpart (lowpart_mode, to); | |
539 | emit_move_insn (lowpart, lowfrom); | |
540 | ||
541 | /* Compute the value to put in each remaining word. */ | |
542 | if (unsignedp) | |
543 | fill_value = const0_rtx; | |
544 | else | |
2040a7e4 | 545 | fill_value = emit_store_flag (gen_reg_rtx (word_mode), |
546 | LT, lowfrom, const0_rtx, | |
547 | VOIDmode, 0, -1); | |
10f307d9 | 548 | |
549 | /* Fill the remaining words. */ | |
550 | for (i = GET_MODE_SIZE (lowpart_mode) / UNITS_PER_WORD; i < nwords; i++) | |
551 | { | |
552 | int index = (WORDS_BIG_ENDIAN ? nwords - i - 1 : i); | |
553 | rtx subword = operand_subword (to, index, 1, to_mode); | |
554 | ||
611234b4 | 555 | gcc_assert (subword); |
10f307d9 | 556 | |
557 | if (fill_value != subword) | |
558 | emit_move_insn (subword, fill_value); | |
559 | } | |
560 | ||
561 | insns = get_insns (); | |
562 | end_sequence (); | |
563 | ||
e29831db | 564 | emit_insn (insns); |
10f307d9 | 565 | return; |
566 | } | |
567 | ||
5602c36d | 568 | /* Truncating multi-word to a word or less. */ |
569 | if (GET_MODE_BITSIZE (from_mode) > BITS_PER_WORD | |
570 | && GET_MODE_BITSIZE (to_mode) <= BITS_PER_WORD) | |
10f307d9 | 571 | { |
e16ceb8e | 572 | if (!((MEM_P (from) |
d5601bb1 | 573 | && ! MEM_VOLATILE_P (from) |
574 | && direct_load[(int) to_mode] | |
575 | && ! mode_dependent_address_p (XEXP (from, 0))) | |
8ad4c111 | 576 | || REG_P (from) |
d5601bb1 | 577 | || GET_CODE (from) == SUBREG)) |
578 | from = force_reg (from_mode, from); | |
10f307d9 | 579 | convert_move (to, gen_lowpart (word_mode, from), 0); |
580 | return; | |
581 | } | |
582 | ||
10f307d9 | 583 | /* Now follow all the conversions between integers |
584 | no more than a word long. */ | |
585 | ||
586 | /* For truncation, usually we can just refer to FROM in a narrower mode. */ | |
587 | if (GET_MODE_BITSIZE (to_mode) < GET_MODE_BITSIZE (from_mode) | |
588 | && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (to_mode), | |
5602c36d | 589 | GET_MODE_BITSIZE (from_mode))) |
10f307d9 | 590 | { |
e16ceb8e | 591 | if (!((MEM_P (from) |
5602c36d | 592 | && ! MEM_VOLATILE_P (from) |
593 | && direct_load[(int) to_mode] | |
594 | && ! mode_dependent_address_p (XEXP (from, 0))) | |
8ad4c111 | 595 | || REG_P (from) |
5602c36d | 596 | || GET_CODE (from) == SUBREG)) |
597 | from = force_reg (from_mode, from); | |
8ad4c111 | 598 | if (REG_P (from) && REGNO (from) < FIRST_PSEUDO_REGISTER |
7de79a05 | 599 | && ! HARD_REGNO_MODE_OK (REGNO (from), to_mode)) |
600 | from = copy_to_reg (from); | |
10f307d9 | 601 | emit_move_insn (to, gen_lowpart (to_mode, from)); |
602 | return; | |
603 | } | |
604 | ||
5602c36d | 605 | /* Handle extension. */ |
10f307d9 | 606 | if (GET_MODE_BITSIZE (to_mode) > GET_MODE_BITSIZE (from_mode)) |
607 | { | |
608 | /* Convert directly if that works. */ | |
609 | if ((code = can_extend_p (to_mode, from_mode, unsignedp)) | |
610 | != CODE_FOR_nothing) | |
611 | { | |
612 | emit_unop_insn (code, to, from, equiv_code); | |
613 | return; | |
614 | } | |
615 | else | |
616 | { | |
617 | enum machine_mode intermediate; | |
851e6849 | 618 | rtx tmp; |
619 | tree shift_amount; | |
10f307d9 | 620 | |
621 | /* Search for a mode to convert via. */ | |
622 | for (intermediate = from_mode; intermediate != VOIDmode; | |
623 | intermediate = GET_MODE_WIDER_MODE (intermediate)) | |
0f22a35c | 624 | if (((can_extend_p (to_mode, intermediate, unsignedp) |
625 | != CODE_FOR_nothing) | |
626 | || (GET_MODE_SIZE (to_mode) < GET_MODE_SIZE (intermediate) | |
fc10bba7 | 627 | && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (to_mode), |
628 | GET_MODE_BITSIZE (intermediate)))) | |
10f307d9 | 629 | && (can_extend_p (intermediate, from_mode, unsignedp) |
630 | != CODE_FOR_nothing)) | |
631 | { | |
632 | convert_move (to, convert_to_mode (intermediate, from, | |
633 | unsignedp), unsignedp); | |
634 | return; | |
635 | } | |
636 | ||
851e6849 | 637 | /* No suitable intermediate mode. |
fa56dc1d | 638 | Generate what we need with shifts. */ |
7c446c95 | 639 | shift_amount = build_int_cst (NULL_TREE, |
640 | GET_MODE_BITSIZE (to_mode) | |
7016c612 | 641 | - GET_MODE_BITSIZE (from_mode)); |
851e6849 | 642 | from = gen_lowpart (to_mode, force_reg (from_mode, from)); |
643 | tmp = expand_shift (LSHIFT_EXPR, to_mode, from, shift_amount, | |
644 | to, unsignedp); | |
fa56dc1d | 645 | tmp = expand_shift (RSHIFT_EXPR, to_mode, tmp, shift_amount, |
851e6849 | 646 | to, unsignedp); |
647 | if (tmp != to) | |
648 | emit_move_insn (to, tmp); | |
649 | return; | |
10f307d9 | 650 | } |
651 | } | |
652 | ||
fa56dc1d | 653 | /* Support special truncate insns for certain modes. */ |
d6bf3b14 | 654 | if (convert_optab_handler (trunc_optab, to_mode, |
655 | from_mode) != CODE_FOR_nothing) | |
10f307d9 | 656 | { |
d6bf3b14 | 657 | emit_unop_insn (convert_optab_handler (trunc_optab, to_mode, from_mode), |
a7cc195f | 658 | to, from, UNKNOWN); |
cd0fdd24 | 659 | return; |
660 | } | |
661 | ||
10f307d9 | 662 | /* Handle truncation of volatile memrefs, and so on; |
663 | the things that couldn't be truncated directly, | |
a7cc195f | 664 | and for which there was no special instruction. |
665 | ||
666 | ??? Code above formerly short-circuited this, for most integer | |
667 | mode pairs, with a force_reg in from_mode followed by a recursive | |
668 | call to this routine. Appears always to have been wrong. */ | |
10f307d9 | 669 | if (GET_MODE_BITSIZE (to_mode) < GET_MODE_BITSIZE (from_mode)) |
670 | { | |
671 | rtx temp = force_reg (to_mode, gen_lowpart (to_mode, from)); | |
672 | emit_move_insn (to, temp); | |
673 | return; | |
674 | } | |
675 | ||
676 | /* Mode combination is not recognized. */ | |
611234b4 | 677 | gcc_unreachable (); |
10f307d9 | 678 | } |
679 | ||
680 | /* Return an rtx for a value that would result | |
681 | from converting X to mode MODE. | |
682 | Both X and MODE may be floating, or both integer. | |
683 | UNSIGNEDP is nonzero if X is an unsigned value. | |
684 | This can be done by referring to a part of X in place | |
0a534ba7 | 685 | or by copying to a new temporary with conversion. */ |
10f307d9 | 686 | |
687 | rtx | |
35cb5232 | 688 | convert_to_mode (enum machine_mode mode, rtx x, int unsignedp) |
a63e1c46 | 689 | { |
690 | return convert_modes (mode, VOIDmode, x, unsignedp); | |
691 | } | |
692 | ||
693 | /* Return an rtx for a value that would result | |
694 | from converting X from mode OLDMODE to mode MODE. | |
695 | Both modes may be floating, or both integer. | |
696 | UNSIGNEDP is nonzero if X is an unsigned value. | |
697 | ||
698 | This can be done by referring to a part of X in place | |
699 | or by copying to a new temporary with conversion. | |
700 | ||
0a534ba7 | 701 | You can give VOIDmode for OLDMODE, if you are sure X has a nonvoid mode. */ |
a63e1c46 | 702 | |
703 | rtx | |
35cb5232 | 704 | convert_modes (enum machine_mode mode, enum machine_mode oldmode, rtx x, int unsignedp) |
10f307d9 | 705 | { |
19cb6b50 | 706 | rtx temp; |
a63e1c46 | 707 | |
acfb31e5 | 708 | /* If FROM is a SUBREG that indicates that we have already done at least |
709 | the required extension, strip it. */ | |
710 | ||
711 | if (GET_CODE (x) == SUBREG && SUBREG_PROMOTED_VAR_P (x) | |
712 | && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) >= GET_MODE_SIZE (mode) | |
713 | && SUBREG_PROMOTED_UNSIGNED_P (x) == unsignedp) | |
714 | x = gen_lowpart (mode, x); | |
10f307d9 | 715 | |
e4d9bbd7 | 716 | if (GET_MODE (x) != VOIDmode) |
717 | oldmode = GET_MODE (x); | |
fa56dc1d | 718 | |
79a80d86 | 719 | if (mode == oldmode) |
720 | return x; | |
721 | ||
10f307d9 | 722 | /* There is one case that we must handle specially: If we are converting |
b572011e | 723 | a CONST_INT into a mode whose size is twice HOST_BITS_PER_WIDE_INT and |
10f307d9 | 724 | we are to interpret the constant as unsigned, gen_lowpart will do |
725 | the wrong if the constant appears negative. What we want to do is | |
726 | make the high-order word of the constant zero, not all ones. */ | |
727 | ||
728 | if (unsignedp && GET_MODE_CLASS (mode) == MODE_INT | |
b572011e | 729 | && GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT |
971ba038 | 730 | && CONST_INT_P (x) && INTVAL (x) < 0) |
e92ac421 | 731 | { |
3e052aec | 732 | double_int val = uhwi_to_double_int (INTVAL (x)); |
e92ac421 | 733 | |
3e052aec | 734 | /* We need to zero extend VAL. */ |
735 | if (oldmode != VOIDmode) | |
736 | val = double_int_zext (val, GET_MODE_BITSIZE (oldmode)); | |
e92ac421 | 737 | |
3e052aec | 738 | return immed_double_int_const (val, mode); |
e92ac421 | 739 | } |
10f307d9 | 740 | |
741 | /* We can do this with a gen_lowpart if both desired and current modes | |
742 | are integer, and this is either a constant integer, a register, or a | |
d3177667 | 743 | non-volatile MEM. Except for the constant case where MODE is no |
744 | wider than HOST_BITS_PER_WIDE_INT, we must be narrowing the operand. */ | |
10f307d9 | 745 | |
971ba038 | 746 | if ((CONST_INT_P (x) |
d3177667 | 747 | && GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT) |
10f307d9 | 748 | || (GET_MODE_CLASS (mode) == MODE_INT |
a63e1c46 | 749 | && GET_MODE_CLASS (oldmode) == MODE_INT |
10f307d9 | 750 | && (GET_CODE (x) == CONST_DOUBLE |
a63e1c46 | 751 | || (GET_MODE_SIZE (mode) <= GET_MODE_SIZE (oldmode) |
e16ceb8e | 752 | && ((MEM_P (x) && ! MEM_VOLATILE_P (x) |
e2f3d3c1 | 753 | && direct_load[(int) mode]) |
8ad4c111 | 754 | || (REG_P (x) |
12726d6a | 755 | && (! HARD_REGISTER_P (x) |
756 | || HARD_REGNO_MODE_OK (REGNO (x), mode)) | |
ec557174 | 757 | && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (mode), |
758 | GET_MODE_BITSIZE (GET_MODE (x))))))))) | |
d3177667 | 759 | { |
760 | /* ?? If we don't know OLDMODE, we have to assume here that | |
761 | X does not need sign- or zero-extension. This may not be | |
762 | the case, but it's the best we can do. */ | |
971ba038 | 763 | if (CONST_INT_P (x) && oldmode != VOIDmode |
d3177667 | 764 | && GET_MODE_SIZE (mode) > GET_MODE_SIZE (oldmode)) |
765 | { | |
766 | HOST_WIDE_INT val = INTVAL (x); | |
767 | int width = GET_MODE_BITSIZE (oldmode); | |
768 | ||
769 | /* We must sign or zero-extend in this case. Start by | |
770 | zero-extending, then sign extend if we need to. */ | |
771 | val &= ((HOST_WIDE_INT) 1 << width) - 1; | |
772 | if (! unsignedp | |
773 | && (val & ((HOST_WIDE_INT) 1 << (width - 1)))) | |
774 | val |= (HOST_WIDE_INT) (-1) << width; | |
775 | ||
2d232d05 | 776 | return gen_int_mode (val, mode); |
d3177667 | 777 | } |
778 | ||
779 | return gen_lowpart (mode, x); | |
780 | } | |
10f307d9 | 781 | |
77d25dbd | 782 | /* Converting from integer constant into mode is always equivalent to an |
783 | subreg operation. */ | |
784 | if (VECTOR_MODE_P (mode) && GET_MODE (x) == VOIDmode) | |
785 | { | |
611234b4 | 786 | gcc_assert (GET_MODE_BITSIZE (mode) == GET_MODE_BITSIZE (oldmode)); |
77d25dbd | 787 | return simplify_gen_subreg (mode, x, oldmode, 0); |
788 | } | |
789 | ||
10f307d9 | 790 | temp = gen_reg_rtx (mode); |
791 | convert_move (temp, x, unsignedp); | |
792 | return temp; | |
793 | } | |
794 | \f | |
c7e41aee | 795 | /* Return the largest alignment we can use for doing a move (or store) |
796 | of MAX_PIECES. ALIGN is the largest alignment we could use. */ | |
797 | ||
798 | static unsigned int | |
799 | alignment_for_piecewise_move (unsigned int max_pieces, unsigned int align) | |
800 | { | |
801 | enum machine_mode tmode; | |
802 | ||
803 | tmode = mode_for_size (max_pieces * BITS_PER_UNIT, MODE_INT, 1); | |
804 | if (align >= GET_MODE_ALIGNMENT (tmode)) | |
805 | align = GET_MODE_ALIGNMENT (tmode); | |
806 | else | |
807 | { | |
808 | enum machine_mode tmode, xmode; | |
809 | ||
810 | for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT), xmode = tmode; | |
811 | tmode != VOIDmode; | |
812 | xmode = tmode, tmode = GET_MODE_WIDER_MODE (tmode)) | |
813 | if (GET_MODE_SIZE (tmode) > max_pieces | |
814 | || SLOW_UNALIGNED_ACCESS (tmode, align)) | |
815 | break; | |
816 | ||
817 | align = MAX (align, GET_MODE_ALIGNMENT (xmode)); | |
818 | } | |
819 | ||
820 | return align; | |
821 | } | |
822 | ||
823 | /* Return the widest integer mode no wider than SIZE. If no such mode | |
824 | can be found, return VOIDmode. */ | |
825 | ||
826 | static enum machine_mode | |
827 | widest_int_mode_for_size (unsigned int size) | |
828 | { | |
829 | enum machine_mode tmode, mode = VOIDmode; | |
830 | ||
831 | for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT); | |
832 | tmode != VOIDmode; tmode = GET_MODE_WIDER_MODE (tmode)) | |
833 | if (GET_MODE_SIZE (tmode) < size) | |
834 | mode = tmode; | |
835 | ||
836 | return mode; | |
837 | } | |
838 | ||
d1f6ae0c | 839 | /* STORE_MAX_PIECES is the number of bytes at a time that we can |
840 | store efficiently. Due to internal GCC limitations, this is | |
841 | MOVE_MAX_PIECES limited by the number of bytes GCC can represent | |
842 | for an immediate constant. */ | |
843 | ||
844 | #define STORE_MAX_PIECES MIN (MOVE_MAX_PIECES, 2 * sizeof (HOST_WIDE_INT)) | |
845 | ||
9fe0e1b8 | 846 | /* Determine whether the LEN bytes can be moved by using several move |
847 | instructions. Return nonzero if a call to move_by_pieces should | |
848 | succeed. */ | |
849 | ||
850 | int | |
35cb5232 | 851 | can_move_by_pieces (unsigned HOST_WIDE_INT len, |
852 | unsigned int align ATTRIBUTE_UNUSED) | |
9fe0e1b8 | 853 | { |
854 | return MOVE_BY_PIECES_P (len, align); | |
855 | } | |
856 | ||
fad4a30c | 857 | /* Generate several move instructions to copy LEN bytes from block FROM to |
0a534ba7 | 858 | block TO. (These are MEM rtx's with BLKmode). |
ef7dc4b4 | 859 | |
fad4a30c | 860 | If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is |
861 | used to push FROM to the stack. | |
ef7dc4b4 | 862 | |
9fe0e1b8 | 863 | ALIGN is maximum stack alignment we can assume. |
10f307d9 | 864 | |
9fe0e1b8 | 865 | If ENDP is 0 return to, if ENDP is 1 return memory at the end ala |
866 | mempcpy, and if ENDP is 2 return memory the end minus one byte ala | |
867 | stpcpy. */ | |
868 | ||
869 | rtx | |
35cb5232 | 870 | move_by_pieces (rtx to, rtx from, unsigned HOST_WIDE_INT len, |
871 | unsigned int align, int endp) | |
10f307d9 | 872 | { |
584511c1 | 873 | struct move_by_pieces_d data; |
98155838 | 874 | enum machine_mode to_addr_mode, from_addr_mode |
875 | = targetm.addr_space.address_mode (MEM_ADDR_SPACE (from)); | |
ef7dc4b4 | 876 | rtx to_addr, from_addr = XEXP (from, 0); |
02e7a332 | 877 | unsigned int max_size = MOVE_MAX_PIECES + 1; |
53bd09ab | 878 | enum insn_code icode; |
10f307d9 | 879 | |
b4ad0ea6 | 880 | align = MIN (to ? MEM_ALIGN (to) : align, MEM_ALIGN (from)); |
881 | ||
10f307d9 | 882 | data.offset = 0; |
10f307d9 | 883 | data.from_addr = from_addr; |
ef7dc4b4 | 884 | if (to) |
885 | { | |
98155838 | 886 | to_addr_mode = targetm.addr_space.address_mode (MEM_ADDR_SPACE (to)); |
ef7dc4b4 | 887 | to_addr = XEXP (to, 0); |
888 | data.to = to; | |
889 | data.autinc_to | |
890 | = (GET_CODE (to_addr) == PRE_INC || GET_CODE (to_addr) == PRE_DEC | |
891 | || GET_CODE (to_addr) == POST_INC || GET_CODE (to_addr) == POST_DEC); | |
892 | data.reverse | |
893 | = (GET_CODE (to_addr) == PRE_DEC || GET_CODE (to_addr) == POST_DEC); | |
894 | } | |
895 | else | |
896 | { | |
98155838 | 897 | to_addr_mode = VOIDmode; |
ef7dc4b4 | 898 | to_addr = NULL_RTX; |
899 | data.to = NULL_RTX; | |
900 | data.autinc_to = 1; | |
901 | #ifdef STACK_GROWS_DOWNWARD | |
902 | data.reverse = 1; | |
903 | #else | |
904 | data.reverse = 0; | |
905 | #endif | |
906 | } | |
907 | data.to_addr = to_addr; | |
10f307d9 | 908 | data.from = from; |
10f307d9 | 909 | data.autinc_from |
910 | = (GET_CODE (from_addr) == PRE_INC || GET_CODE (from_addr) == PRE_DEC | |
911 | || GET_CODE (from_addr) == POST_INC | |
912 | || GET_CODE (from_addr) == POST_DEC); | |
913 | ||
914 | data.explicit_inc_from = 0; | |
915 | data.explicit_inc_to = 0; | |
10f307d9 | 916 | if (data.reverse) data.offset = len; |
917 | data.len = len; | |
918 | ||
919 | /* If copying requires more than two move insns, | |
920 | copy addresses to registers (to make displacements shorter) | |
921 | and use post-increment if available. */ | |
922 | if (!(data.autinc_from && data.autinc_to) | |
025d4f81 | 923 | && move_by_pieces_ninsns (len, align, max_size) > 2) |
10f307d9 | 924 | { |
c7e41aee | 925 | /* Find the mode of the largest move... |
926 | MODE might not be used depending on the definitions of the | |
927 | USE_* macros below. */ | |
928 | enum machine_mode mode ATTRIBUTE_UNUSED | |
929 | = widest_int_mode_for_size (max_size); | |
53bd09ab | 930 | |
931 | if (USE_LOAD_PRE_DECREMENT (mode) && data.reverse && ! data.autinc_from) | |
10f307d9 | 932 | { |
98155838 | 933 | data.from_addr = copy_to_mode_reg (from_addr_mode, |
934 | plus_constant (from_addr, len)); | |
10f307d9 | 935 | data.autinc_from = 1; |
936 | data.explicit_inc_from = -1; | |
937 | } | |
53bd09ab | 938 | if (USE_LOAD_POST_INCREMENT (mode) && ! data.autinc_from) |
10f307d9 | 939 | { |
98155838 | 940 | data.from_addr = copy_to_mode_reg (from_addr_mode, from_addr); |
10f307d9 | 941 | data.autinc_from = 1; |
942 | data.explicit_inc_from = 1; | |
943 | } | |
10f307d9 | 944 | if (!data.autinc_from && CONSTANT_P (from_addr)) |
98155838 | 945 | data.from_addr = copy_to_mode_reg (from_addr_mode, from_addr); |
53bd09ab | 946 | if (USE_STORE_PRE_DECREMENT (mode) && data.reverse && ! data.autinc_to) |
10f307d9 | 947 | { |
98155838 | 948 | data.to_addr = copy_to_mode_reg (to_addr_mode, |
949 | plus_constant (to_addr, len)); | |
10f307d9 | 950 | data.autinc_to = 1; |
951 | data.explicit_inc_to = -1; | |
952 | } | |
53bd09ab | 953 | if (USE_STORE_POST_INCREMENT (mode) && ! data.reverse && ! data.autinc_to) |
10f307d9 | 954 | { |
98155838 | 955 | data.to_addr = copy_to_mode_reg (to_addr_mode, to_addr); |
10f307d9 | 956 | data.autinc_to = 1; |
957 | data.explicit_inc_to = 1; | |
958 | } | |
10f307d9 | 959 | if (!data.autinc_to && CONSTANT_P (to_addr)) |
98155838 | 960 | data.to_addr = copy_to_mode_reg (to_addr_mode, to_addr); |
10f307d9 | 961 | } |
962 | ||
c7e41aee | 963 | align = alignment_for_piecewise_move (MOVE_MAX_PIECES, align); |
10f307d9 | 964 | |
965 | /* First move what we can in the largest integer mode, then go to | |
966 | successively smaller modes. */ | |
967 | ||
968 | while (max_size > 1) | |
969 | { | |
c7e41aee | 970 | enum machine_mode mode = widest_int_mode_for_size (max_size); |
10f307d9 | 971 | |
972 | if (mode == VOIDmode) | |
973 | break; | |
974 | ||
d6bf3b14 | 975 | icode = optab_handler (mov_optab, mode); |
325d1c45 | 976 | if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode)) |
10f307d9 | 977 | move_by_pieces_1 (GEN_FCN (icode), mode, &data); |
978 | ||
979 | max_size = GET_MODE_SIZE (mode); | |
980 | } | |
981 | ||
982 | /* The code above should have handled everything. */ | |
611234b4 | 983 | gcc_assert (!data.len); |
9fe0e1b8 | 984 | |
985 | if (endp) | |
986 | { | |
987 | rtx to1; | |
988 | ||
611234b4 | 989 | gcc_assert (!data.reverse); |
9fe0e1b8 | 990 | if (data.autinc_to) |
991 | { | |
992 | if (endp == 2) | |
993 | { | |
994 | if (HAVE_POST_INCREMENT && data.explicit_inc_to > 0) | |
995 | emit_insn (gen_add2_insn (data.to_addr, constm1_rtx)); | |
996 | else | |
98155838 | 997 | data.to_addr = copy_to_mode_reg (to_addr_mode, |
998 | plus_constant (data.to_addr, | |
9fe0e1b8 | 999 | -1)); |
1000 | } | |
1001 | to1 = adjust_automodify_address (data.to, QImode, data.to_addr, | |
1002 | data.offset); | |
1003 | } | |
1004 | else | |
1005 | { | |
1006 | if (endp == 2) | |
1007 | --data.offset; | |
1008 | to1 = adjust_address (data.to, QImode, data.offset); | |
1009 | } | |
1010 | return to1; | |
1011 | } | |
1012 | else | |
1013 | return data.to; | |
10f307d9 | 1014 | } |
1015 | ||
1016 | /* Return number of insns required to move L bytes by pieces. | |
decd7a45 | 1017 | ALIGN (in bits) is maximum alignment we can assume. */ |
10f307d9 | 1018 | |
f7c44134 | 1019 | static unsigned HOST_WIDE_INT |
025d4f81 | 1020 | move_by_pieces_ninsns (unsigned HOST_WIDE_INT l, unsigned int align, |
1021 | unsigned int max_size) | |
10f307d9 | 1022 | { |
f7c44134 | 1023 | unsigned HOST_WIDE_INT n_insns = 0; |
10f307d9 | 1024 | |
c7e41aee | 1025 | align = alignment_for_piecewise_move (MOVE_MAX_PIECES, align); |
10f307d9 | 1026 | |
1027 | while (max_size > 1) | |
1028 | { | |
c7e41aee | 1029 | enum machine_mode mode; |
10f307d9 | 1030 | enum insn_code icode; |
1031 | ||
c7e41aee | 1032 | mode = widest_int_mode_for_size (max_size); |
10f307d9 | 1033 | |
1034 | if (mode == VOIDmode) | |
1035 | break; | |
1036 | ||
d6bf3b14 | 1037 | icode = optab_handler (mov_optab, mode); |
325d1c45 | 1038 | if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode)) |
10f307d9 | 1039 | n_insns += l / GET_MODE_SIZE (mode), l %= GET_MODE_SIZE (mode); |
1040 | ||
1041 | max_size = GET_MODE_SIZE (mode); | |
1042 | } | |
1043 | ||
611234b4 | 1044 | gcc_assert (!l); |
10f307d9 | 1045 | return n_insns; |
1046 | } | |
1047 | ||
1048 | /* Subroutine of move_by_pieces. Move as many bytes as appropriate | |
1049 | with move instructions for mode MODE. GENFUN is the gen_... function | |
1050 | to make a move insn for that mode. DATA has all the other info. */ | |
1051 | ||
1052 | static void | |
35cb5232 | 1053 | move_by_pieces_1 (rtx (*genfun) (rtx, ...), enum machine_mode mode, |
584511c1 | 1054 | struct move_by_pieces_d *data) |
10f307d9 | 1055 | { |
f7c44134 | 1056 | unsigned int size = GET_MODE_SIZE (mode); |
97b330ca | 1057 | rtx to1 = NULL_RTX, from1; |
10f307d9 | 1058 | |
1059 | while (data->len >= size) | |
1060 | { | |
f7c44134 | 1061 | if (data->reverse) |
1062 | data->offset -= size; | |
1063 | ||
ef7dc4b4 | 1064 | if (data->to) |
f7c44134 | 1065 | { |
ef7dc4b4 | 1066 | if (data->autinc_to) |
bf42c62d | 1067 | to1 = adjust_automodify_address (data->to, mode, data->to_addr, |
1068 | data->offset); | |
ef7dc4b4 | 1069 | else |
e513d163 | 1070 | to1 = adjust_address (data->to, mode, data->offset); |
f7c44134 | 1071 | } |
f7c44134 | 1072 | |
1073 | if (data->autinc_from) | |
bf42c62d | 1074 | from1 = adjust_automodify_address (data->from, mode, data->from_addr, |
1075 | data->offset); | |
f7c44134 | 1076 | else |
e513d163 | 1077 | from1 = adjust_address (data->from, mode, data->offset); |
10f307d9 | 1078 | |
e4e498cf | 1079 | if (HAVE_PRE_DECREMENT && data->explicit_inc_to < 0) |
e1855348 | 1080 | emit_insn (gen_add2_insn (data->to_addr, |
1081 | GEN_INT (-(HOST_WIDE_INT)size))); | |
e4e498cf | 1082 | if (HAVE_PRE_DECREMENT && data->explicit_inc_from < 0) |
e1855348 | 1083 | emit_insn (gen_add2_insn (data->from_addr, |
1084 | GEN_INT (-(HOST_WIDE_INT)size))); | |
10f307d9 | 1085 | |
ef7dc4b4 | 1086 | if (data->to) |
1087 | emit_insn ((*genfun) (to1, from1)); | |
1088 | else | |
fad4a30c | 1089 | { |
1090 | #ifdef PUSH_ROUNDING | |
1091 | emit_single_push_insn (mode, from1, NULL); | |
1092 | #else | |
611234b4 | 1093 | gcc_unreachable (); |
fad4a30c | 1094 | #endif |
1095 | } | |
f7c44134 | 1096 | |
e4e498cf | 1097 | if (HAVE_POST_INCREMENT && data->explicit_inc_to > 0) |
b572011e | 1098 | emit_insn (gen_add2_insn (data->to_addr, GEN_INT (size))); |
e4e498cf | 1099 | if (HAVE_POST_INCREMENT && data->explicit_inc_from > 0) |
b572011e | 1100 | emit_insn (gen_add2_insn (data->from_addr, GEN_INT (size))); |
10f307d9 | 1101 | |
f7c44134 | 1102 | if (! data->reverse) |
1103 | data->offset += size; | |
10f307d9 | 1104 | |
1105 | data->len -= size; | |
1106 | } | |
1107 | } | |
1108 | \f | |
c0bfc78e | 1109 | /* Emit code to move a block Y to a block X. This may be done with |
1110 | string-move instructions, with multiple scalar move instructions, | |
1111 | or with a library call. | |
10f307d9 | 1112 | |
c0bfc78e | 1113 | Both X and Y must be MEM rtx's (perhaps inside VOLATILE) with mode BLKmode. |
10f307d9 | 1114 | SIZE is an rtx that says how long they are. |
325d1c45 | 1115 | ALIGN is the maximum alignment we can assume they have. |
0378dbdc | 1116 | METHOD describes what kind of copy this is, and what mechanisms may be used. |
10f307d9 | 1117 | |
0dbd1c74 | 1118 | Return the address of the new block, if memcpy is called and returns it, |
1119 | 0 otherwise. */ | |
1120 | ||
1121 | rtx | |
162719b3 | 1122 | emit_block_move_hints (rtx x, rtx y, rtx size, enum block_op_methods method, |
1123 | unsigned int expected_align, HOST_WIDE_INT expected_size) | |
10f307d9 | 1124 | { |
0378dbdc | 1125 | bool may_use_call; |
0dbd1c74 | 1126 | rtx retval = 0; |
0378dbdc | 1127 | unsigned int align; |
1128 | ||
aeccaf28 | 1129 | gcc_assert (size); |
1130 | if (CONST_INT_P (size) | |
1131 | && INTVAL (size) == 0) | |
1132 | return 0; | |
1133 | ||
0378dbdc | 1134 | switch (method) |
1135 | { | |
1136 | case BLOCK_OP_NORMAL: | |
0b25db21 | 1137 | case BLOCK_OP_TAILCALL: |
0378dbdc | 1138 | may_use_call = true; |
1139 | break; | |
1140 | ||
1141 | case BLOCK_OP_CALL_PARM: | |
1142 | may_use_call = block_move_libcall_safe_for_call_parm (); | |
1143 | ||
1144 | /* Make inhibit_defer_pop nonzero around the library call | |
1145 | to force it to pop the arguments right away. */ | |
1146 | NO_DEFER_POP; | |
1147 | break; | |
1148 | ||
1149 | case BLOCK_OP_NO_LIBCALL: | |
1150 | may_use_call = false; | |
1151 | break; | |
1152 | ||
1153 | default: | |
611234b4 | 1154 | gcc_unreachable (); |
0378dbdc | 1155 | } |
1156 | ||
aeccaf28 | 1157 | gcc_assert (MEM_P (x) && MEM_P (y)); |
0378dbdc | 1158 | align = MIN (MEM_ALIGN (x), MEM_ALIGN (y)); |
0ea95334 | 1159 | gcc_assert (align >= BITS_PER_UNIT); |
0dbd1c74 | 1160 | |
67c155cb | 1161 | /* Make sure we've got BLKmode addresses; store_one_arg can decide that |
1162 | block copy is more efficient for other large modes, e.g. DCmode. */ | |
1163 | x = adjust_address (x, BLKmode, 0); | |
1164 | y = adjust_address (y, BLKmode, 0); | |
1165 | ||
e83ff88b | 1166 | /* Set MEM_SIZE as appropriate for this block copy. The main place this |
1167 | can be incorrect is coming from __builtin_memcpy. */ | |
971ba038 | 1168 | if (CONST_INT_P (size)) |
e83ff88b | 1169 | { |
1170 | x = shallow_copy_rtx (x); | |
1171 | y = shallow_copy_rtx (y); | |
1172 | set_mem_size (x, size); | |
1173 | set_mem_size (y, size); | |
1174 | } | |
1175 | ||
971ba038 | 1176 | if (CONST_INT_P (size) && MOVE_BY_PIECES_P (INTVAL (size), align)) |
9fe0e1b8 | 1177 | move_by_pieces (x, y, INTVAL (size), align, 0); |
162719b3 | 1178 | else if (emit_block_move_via_movmem (x, y, size, align, |
1179 | expected_align, expected_size)) | |
c0bfc78e | 1180 | ; |
bd1a81f7 | 1181 | else if (may_use_call |
1182 | && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (x)) | |
1183 | && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (y))) | |
0b25db21 | 1184 | retval = emit_block_move_via_libcall (x, y, size, |
1185 | method == BLOCK_OP_TAILCALL); | |
0378dbdc | 1186 | else |
1187 | emit_block_move_via_loop (x, y, size, align); | |
1188 | ||
1189 | if (method == BLOCK_OP_CALL_PARM) | |
1190 | OK_DEFER_POP; | |
a5fd5157 | 1191 | |
c0bfc78e | 1192 | return retval; |
1193 | } | |
a5fd5157 | 1194 | |
162719b3 | 1195 | rtx |
1196 | emit_block_move (rtx x, rtx y, rtx size, enum block_op_methods method) | |
1197 | { | |
1198 | return emit_block_move_hints (x, y, size, method, 0, -1); | |
1199 | } | |
1200 | ||
35cb5232 | 1201 | /* A subroutine of emit_block_move. Returns true if calling the |
0378dbdc | 1202 | block move libcall will not clobber any parameters which may have |
1203 | already been placed on the stack. */ | |
1204 | ||
1205 | static bool | |
35cb5232 | 1206 | block_move_libcall_safe_for_call_parm (void) |
0378dbdc | 1207 | { |
22c61100 | 1208 | #if defined (REG_PARM_STACK_SPACE) |
1209 | tree fn; | |
1210 | #endif | |
1211 | ||
a58c0619 | 1212 | /* If arguments are pushed on the stack, then they're safe. */ |
0378dbdc | 1213 | if (PUSH_ARGS) |
1214 | return true; | |
0378dbdc | 1215 | |
1d5ca076 | 1216 | /* If registers go on the stack anyway, any argument is sure to clobber |
a58c0619 | 1217 | an outgoing argument. */ |
63c68695 | 1218 | #if defined (REG_PARM_STACK_SPACE) |
22c61100 | 1219 | fn = emit_block_move_libcall_fn (false); |
ac2fdd89 | 1220 | /* Avoid set but not used warning if *REG_PARM_STACK_SPACE doesn't |
1221 | depend on its argument. */ | |
1222 | (void) fn; | |
22c61100 | 1223 | if (OUTGOING_REG_PARM_STACK_SPACE ((!fn ? NULL_TREE : TREE_TYPE (fn))) |
1224 | && REG_PARM_STACK_SPACE (fn) != 0) | |
1225 | return false; | |
0378dbdc | 1226 | #endif |
0378dbdc | 1227 | |
a58c0619 | 1228 | /* If any argument goes in memory, then it might clobber an outgoing |
1229 | argument. */ | |
1230 | { | |
1231 | CUMULATIVE_ARGS args_so_far; | |
1232 | tree fn, arg; | |
1d5ca076 | 1233 | |
a58c0619 | 1234 | fn = emit_block_move_libcall_fn (false); |
30c70355 | 1235 | INIT_CUMULATIVE_ARGS (args_so_far, TREE_TYPE (fn), NULL_RTX, 0, 3); |
1d5ca076 | 1236 | |
a58c0619 | 1237 | arg = TYPE_ARG_TYPES (TREE_TYPE (fn)); |
1238 | for ( ; arg != void_list_node ; arg = TREE_CHAIN (arg)) | |
1239 | { | |
1240 | enum machine_mode mode = TYPE_MODE (TREE_VALUE (arg)); | |
f387af4f | 1241 | rtx tmp = targetm.calls.function_arg (&args_so_far, mode, |
1242 | NULL_TREE, true); | |
a58c0619 | 1243 | if (!tmp || !REG_P (tmp)) |
0378dbdc | 1244 | return false; |
f054eb3c | 1245 | if (targetm.calls.arg_partial_bytes (&args_so_far, mode, NULL, 1)) |
a58c0619 | 1246 | return false; |
f387af4f | 1247 | targetm.calls.function_arg_advance (&args_so_far, mode, |
1248 | NULL_TREE, true); | |
a58c0619 | 1249 | } |
1250 | } | |
1251 | return true; | |
0378dbdc | 1252 | } |
1253 | ||
008c057d | 1254 | /* A subroutine of emit_block_move. Expand a movmem pattern; |
c0bfc78e | 1255 | return true if successful. */ |
6702c250 | 1256 | |
c0bfc78e | 1257 | static bool |
162719b3 | 1258 | emit_block_move_via_movmem (rtx x, rtx y, rtx size, unsigned int align, |
1259 | unsigned int expected_align, HOST_WIDE_INT expected_size) | |
c0bfc78e | 1260 | { |
c0bfc78e | 1261 | rtx opalign = GEN_INT (align / BITS_PER_UNIT); |
fbc6244b | 1262 | int save_volatile_ok = volatile_ok; |
c0bfc78e | 1263 | enum machine_mode mode; |
a5fd5157 | 1264 | |
162719b3 | 1265 | if (expected_align < align) |
1266 | expected_align = align; | |
1267 | ||
c0bfc78e | 1268 | /* Since this is a move insn, we don't care about volatility. */ |
1269 | volatile_ok = 1; | |
1270 | ||
d5f9786f | 1271 | /* Try the most limited insn first, because there's no point |
1272 | including more than one in the machine description unless | |
1273 | the more limited one has some advantage. */ | |
1274 | ||
c0bfc78e | 1275 | for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode; |
1276 | mode = GET_MODE_WIDER_MODE (mode)) | |
1277 | { | |
6b531606 | 1278 | enum insn_code code = direct_optab_handler (movmem_optab, mode); |
c0bfc78e | 1279 | insn_operand_predicate_fn pred; |
1280 | ||
1281 | if (code != CODE_FOR_nothing | |
1282 | /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT | |
1283 | here because if SIZE is less than the mode mask, as it is | |
1284 | returned by the macro, it will definitely be less than the | |
1285 | actual mode mask. */ | |
971ba038 | 1286 | && ((CONST_INT_P (size) |
c0bfc78e | 1287 | && ((unsigned HOST_WIDE_INT) INTVAL (size) |
1288 | <= (GET_MODE_MASK (mode) >> 1))) | |
1289 | || GET_MODE_BITSIZE (mode) >= BITS_PER_WORD) | |
1290 | && ((pred = insn_data[(int) code].operand[0].predicate) == 0 | |
1291 | || (*pred) (x, BLKmode)) | |
1292 | && ((pred = insn_data[(int) code].operand[1].predicate) == 0 | |
1293 | || (*pred) (y, BLKmode)) | |
1294 | && ((pred = insn_data[(int) code].operand[3].predicate) == 0 | |
1295 | || (*pred) (opalign, VOIDmode))) | |
1296 | { | |
1297 | rtx op2; | |
1298 | rtx last = get_last_insn (); | |
1299 | rtx pat; | |
1300 | ||
1301 | op2 = convert_to_mode (mode, size, 1); | |
1302 | pred = insn_data[(int) code].operand[2].predicate; | |
1303 | if (pred != 0 && ! (*pred) (op2, mode)) | |
1304 | op2 = copy_to_mode_reg (mode, op2); | |
1305 | ||
1306 | /* ??? When called via emit_block_move_for_call, it'd be | |
1307 | nice if there were some way to inform the backend, so | |
1308 | that it doesn't fail the expansion because it thinks | |
1309 | emitting the libcall would be more efficient. */ | |
1310 | ||
162719b3 | 1311 | if (insn_data[(int) code].n_operands == 4) |
1312 | pat = GEN_FCN ((int) code) (x, y, op2, opalign); | |
1313 | else | |
1314 | pat = GEN_FCN ((int) code) (x, y, op2, opalign, | |
4e85cee6 | 1315 | GEN_INT (expected_align |
1316 | / BITS_PER_UNIT), | |
162719b3 | 1317 | GEN_INT (expected_size)); |
c0bfc78e | 1318 | if (pat) |
1319 | { | |
1320 | emit_insn (pat); | |
fbc6244b | 1321 | volatile_ok = save_volatile_ok; |
c0bfc78e | 1322 | return true; |
10f307d9 | 1323 | } |
c0bfc78e | 1324 | else |
1325 | delete_insns_since (last); | |
10f307d9 | 1326 | } |
c0bfc78e | 1327 | } |
10f307d9 | 1328 | |
fbc6244b | 1329 | volatile_ok = save_volatile_ok; |
c0bfc78e | 1330 | return false; |
1331 | } | |
6702c250 | 1332 | |
f896c932 | 1333 | /* A subroutine of emit_block_move. Expand a call to memcpy. |
c0bfc78e | 1334 | Return the return value from memcpy, 0 otherwise. */ |
06b8e3db | 1335 | |
ab608690 | 1336 | rtx |
0b25db21 | 1337 | emit_block_move_via_libcall (rtx dst, rtx src, rtx size, bool tailcall) |
c0bfc78e | 1338 | { |
d5f9786f | 1339 | rtx dst_addr, src_addr; |
c2f47e15 | 1340 | tree call_expr, fn, src_tree, dst_tree, size_tree; |
c0bfc78e | 1341 | enum machine_mode size_mode; |
1342 | rtx retval; | |
06b8e3db | 1343 | |
0a534ba7 | 1344 | /* Emit code to copy the addresses of DST and SRC and SIZE into new |
1345 | pseudos. We can then place those new pseudos into a VAR_DECL and | |
1346 | use them later. */ | |
d5f9786f | 1347 | |
1348 | dst_addr = copy_to_mode_reg (Pmode, XEXP (dst, 0)); | |
1349 | src_addr = copy_to_mode_reg (Pmode, XEXP (src, 0)); | |
c0bfc78e | 1350 | |
d5f9786f | 1351 | dst_addr = convert_memory_address (ptr_mode, dst_addr); |
1352 | src_addr = convert_memory_address (ptr_mode, src_addr); | |
d5f9786f | 1353 | |
1354 | dst_tree = make_tree (ptr_type_node, dst_addr); | |
1355 | src_tree = make_tree (ptr_type_node, src_addr); | |
c0bfc78e | 1356 | |
f896c932 | 1357 | size_mode = TYPE_MODE (sizetype); |
d5f9786f | 1358 | |
c0bfc78e | 1359 | size = convert_to_mode (size_mode, size, 1); |
1360 | size = copy_to_mode_reg (size_mode, size); | |
1361 | ||
1362 | /* It is incorrect to use the libcall calling conventions to call | |
1363 | memcpy in this context. This could be a user call to memcpy and | |
1364 | the user may wish to examine the return value from memcpy. For | |
1365 | targets where libcalls and normal calls have different conventions | |
f896c932 | 1366 | for returning pointers, we could end up generating incorrect code. */ |
c0bfc78e | 1367 | |
f896c932 | 1368 | size_tree = make_tree (sizetype, size); |
c0bfc78e | 1369 | |
1370 | fn = emit_block_move_libcall_fn (true); | |
c2f47e15 | 1371 | call_expr = build_call_expr (fn, 3, dst_tree, src_tree, size_tree); |
0b25db21 | 1372 | CALL_EXPR_TAILCALL (call_expr) = tailcall; |
c0bfc78e | 1373 | |
8ec3c5c2 | 1374 | retval = expand_normal (call_expr); |
c0bfc78e | 1375 | |
f896c932 | 1376 | return retval; |
c0bfc78e | 1377 | } |
f708f8fd | 1378 | |
c0bfc78e | 1379 | /* A subroutine of emit_block_move_via_libcall. Create the tree node |
1380 | for the function we use for block copies. The first time FOR_CALL | |
1381 | is true, we call assemble_external. */ | |
f708f8fd | 1382 | |
c0bfc78e | 1383 | static GTY(()) tree block_move_fn; |
1384 | ||
d459e0d8 | 1385 | void |
35cb5232 | 1386 | init_block_move_fn (const char *asmspec) |
c0bfc78e | 1387 | { |
d459e0d8 | 1388 | if (!block_move_fn) |
c0bfc78e | 1389 | { |
9fe0e1b8 | 1390 | tree args, fn; |
d459e0d8 | 1391 | |
f896c932 | 1392 | fn = get_identifier ("memcpy"); |
1393 | args = build_function_type_list (ptr_type_node, ptr_type_node, | |
1394 | const_ptr_type_node, sizetype, | |
1395 | NULL_TREE); | |
f708f8fd | 1396 | |
e60a6f7b | 1397 | fn = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL, fn, args); |
c0bfc78e | 1398 | DECL_EXTERNAL (fn) = 1; |
1399 | TREE_PUBLIC (fn) = 1; | |
1400 | DECL_ARTIFICIAL (fn) = 1; | |
1401 | TREE_NOTHROW (fn) = 1; | |
f0f2eb24 | 1402 | DECL_VISIBILITY (fn) = VISIBILITY_DEFAULT; |
1403 | DECL_VISIBILITY_SPECIFIED (fn) = 1; | |
8ca560c1 | 1404 | |
c0bfc78e | 1405 | block_move_fn = fn; |
10f307d9 | 1406 | } |
0dbd1c74 | 1407 | |
d459e0d8 | 1408 | if (asmspec) |
b2c4af5e | 1409 | set_user_assembler_name (block_move_fn, asmspec); |
d459e0d8 | 1410 | } |
1411 | ||
1412 | static tree | |
35cb5232 | 1413 | emit_block_move_libcall_fn (int for_call) |
d459e0d8 | 1414 | { |
1415 | static bool emitted_extern; | |
1416 | ||
1417 | if (!block_move_fn) | |
1418 | init_block_move_fn (NULL); | |
1419 | ||
c0bfc78e | 1420 | if (for_call && !emitted_extern) |
1421 | { | |
1422 | emitted_extern = true; | |
b2c4af5e | 1423 | make_decl_rtl (block_move_fn); |
d459e0d8 | 1424 | assemble_external (block_move_fn); |
c0bfc78e | 1425 | } |
1426 | ||
d459e0d8 | 1427 | return block_move_fn; |
10f307d9 | 1428 | } |
0378dbdc | 1429 | |
1430 | /* A subroutine of emit_block_move. Copy the data via an explicit | |
1431 | loop. This is used only when libcalls are forbidden. */ | |
1432 | /* ??? It'd be nice to copy in hunks larger than QImode. */ | |
1433 | ||
1434 | static void | |
35cb5232 | 1435 | emit_block_move_via_loop (rtx x, rtx y, rtx size, |
1436 | unsigned int align ATTRIBUTE_UNUSED) | |
0378dbdc | 1437 | { |
1438 | rtx cmp_label, top_label, iter, x_addr, y_addr, tmp; | |
98155838 | 1439 | enum machine_mode x_addr_mode |
1440 | = targetm.addr_space.address_mode (MEM_ADDR_SPACE (x)); | |
1441 | enum machine_mode y_addr_mode | |
1442 | = targetm.addr_space.address_mode (MEM_ADDR_SPACE (y)); | |
0378dbdc | 1443 | enum machine_mode iter_mode; |
1444 | ||
1445 | iter_mode = GET_MODE (size); | |
1446 | if (iter_mode == VOIDmode) | |
1447 | iter_mode = word_mode; | |
1448 | ||
1449 | top_label = gen_label_rtx (); | |
1450 | cmp_label = gen_label_rtx (); | |
1451 | iter = gen_reg_rtx (iter_mode); | |
1452 | ||
1453 | emit_move_insn (iter, const0_rtx); | |
1454 | ||
1455 | x_addr = force_operand (XEXP (x, 0), NULL_RTX); | |
1456 | y_addr = force_operand (XEXP (y, 0), NULL_RTX); | |
1457 | do_pending_stack_adjust (); | |
1458 | ||
0378dbdc | 1459 | emit_jump (cmp_label); |
1460 | emit_label (top_label); | |
1461 | ||
98155838 | 1462 | tmp = convert_modes (x_addr_mode, iter_mode, iter, true); |
1463 | x_addr = gen_rtx_PLUS (x_addr_mode, x_addr, tmp); | |
1464 | ||
1465 | if (x_addr_mode != y_addr_mode) | |
1466 | tmp = convert_modes (y_addr_mode, iter_mode, iter, true); | |
1467 | y_addr = gen_rtx_PLUS (y_addr_mode, y_addr, tmp); | |
1468 | ||
0378dbdc | 1469 | x = change_address (x, QImode, x_addr); |
1470 | y = change_address (y, QImode, y_addr); | |
1471 | ||
1472 | emit_move_insn (x, y); | |
1473 | ||
1474 | tmp = expand_simple_binop (iter_mode, PLUS, iter, const1_rtx, iter, | |
1475 | true, OPTAB_LIB_WIDEN); | |
1476 | if (tmp != iter) | |
1477 | emit_move_insn (iter, tmp); | |
1478 | ||
0378dbdc | 1479 | emit_label (cmp_label); |
1480 | ||
1481 | emit_cmp_and_jump_insns (iter, size, LT, NULL_RTX, iter_mode, | |
1482 | true, top_label); | |
0378dbdc | 1483 | } |
10f307d9 | 1484 | \f |
1485 | /* Copy all or part of a value X into registers starting at REGNO. | |
1486 | The number of registers to be filled is NREGS. */ | |
1487 | ||
1488 | void | |
35cb5232 | 1489 | move_block_to_reg (int regno, rtx x, int nregs, enum machine_mode mode) |
10f307d9 | 1490 | { |
1491 | int i; | |
0c22b90f | 1492 | #ifdef HAVE_load_multiple |
fa56dc1d | 1493 | rtx pat; |
0c22b90f | 1494 | rtx last; |
1495 | #endif | |
10f307d9 | 1496 | |
c9750f6d | 1497 | if (nregs == 0) |
1498 | return; | |
1499 | ||
10f307d9 | 1500 | if (CONSTANT_P (x) && ! LEGITIMATE_CONSTANT_P (x)) |
1501 | x = validize_mem (force_const_mem (mode, x)); | |
1502 | ||
1503 | /* See if the machine can do this with a load multiple insn. */ | |
1504 | #ifdef HAVE_load_multiple | |
d3afc10f | 1505 | if (HAVE_load_multiple) |
10f307d9 | 1506 | { |
d3afc10f | 1507 | last = get_last_insn (); |
941522d6 | 1508 | pat = gen_load_multiple (gen_rtx_REG (word_mode, regno), x, |
d3afc10f | 1509 | GEN_INT (nregs)); |
1510 | if (pat) | |
1511 | { | |
1512 | emit_insn (pat); | |
1513 | return; | |
1514 | } | |
1515 | else | |
1516 | delete_insns_since (last); | |
10f307d9 | 1517 | } |
10f307d9 | 1518 | #endif |
1519 | ||
1520 | for (i = 0; i < nregs; i++) | |
941522d6 | 1521 | emit_move_insn (gen_rtx_REG (word_mode, regno + i), |
10f307d9 | 1522 | operand_subword_force (x, i, mode)); |
1523 | } | |
1524 | ||
1525 | /* Copy all or part of a BLKmode value X out of registers starting at REGNO. | |
530178a9 | 1526 | The number of registers to be filled is NREGS. */ |
db7bca86 | 1527 | |
10f307d9 | 1528 | void |
35cb5232 | 1529 | move_block_from_reg (int regno, rtx x, int nregs) |
10f307d9 | 1530 | { |
1531 | int i; | |
10f307d9 | 1532 | |
cc119c14 | 1533 | if (nregs == 0) |
1534 | return; | |
1535 | ||
10f307d9 | 1536 | /* See if the machine can do this with a store multiple insn. */ |
1537 | #ifdef HAVE_store_multiple | |
d3afc10f | 1538 | if (HAVE_store_multiple) |
10f307d9 | 1539 | { |
530178a9 | 1540 | rtx last = get_last_insn (); |
1541 | rtx pat = gen_store_multiple (x, gen_rtx_REG (word_mode, regno), | |
1542 | GEN_INT (nregs)); | |
d3afc10f | 1543 | if (pat) |
1544 | { | |
1545 | emit_insn (pat); | |
1546 | return; | |
1547 | } | |
1548 | else | |
1549 | delete_insns_since (last); | |
10f307d9 | 1550 | } |
10f307d9 | 1551 | #endif |
1552 | ||
1553 | for (i = 0; i < nregs; i++) | |
1554 | { | |
1555 | rtx tem = operand_subword (x, i, 1, BLKmode); | |
1556 | ||
611234b4 | 1557 | gcc_assert (tem); |
10f307d9 | 1558 | |
941522d6 | 1559 | emit_move_insn (tem, gen_rtx_REG (word_mode, regno + i)); |
10f307d9 | 1560 | } |
1561 | } | |
1562 | ||
b566e2e5 | 1563 | /* Generate a PARALLEL rtx for a new non-consecutive group of registers from |
1564 | ORIG, where ORIG is a non-consecutive group of registers represented by | |
1565 | a PARALLEL. The clone is identical to the original except in that the | |
1566 | original set of registers is replaced by a new set of pseudo registers. | |
1567 | The new set has the same modes as the original set. */ | |
1568 | ||
1569 | rtx | |
35cb5232 | 1570 | gen_group_rtx (rtx orig) |
b566e2e5 | 1571 | { |
1572 | int i, length; | |
1573 | rtx *tmps; | |
1574 | ||
611234b4 | 1575 | gcc_assert (GET_CODE (orig) == PARALLEL); |
b566e2e5 | 1576 | |
1577 | length = XVECLEN (orig, 0); | |
2457c754 | 1578 | tmps = XALLOCAVEC (rtx, length); |
b566e2e5 | 1579 | |
1580 | /* Skip a NULL entry in first slot. */ | |
1581 | i = XEXP (XVECEXP (orig, 0, 0), 0) ? 0 : 1; | |
1582 | ||
1583 | if (i) | |
1584 | tmps[0] = 0; | |
1585 | ||
1586 | for (; i < length; i++) | |
1587 | { | |
1588 | enum machine_mode mode = GET_MODE (XEXP (XVECEXP (orig, 0, i), 0)); | |
1589 | rtx offset = XEXP (XVECEXP (orig, 0, i), 1); | |
1590 | ||
1591 | tmps[i] = gen_rtx_EXPR_LIST (VOIDmode, gen_reg_rtx (mode), offset); | |
1592 | } | |
1593 | ||
1594 | return gen_rtx_PARALLEL (GET_MODE (orig), gen_rtvec_v (length, tmps)); | |
1595 | } | |
1596 | ||
e2ff5c1b | 1597 | /* A subroutine of emit_group_load. Arguments as for emit_group_load, |
1598 | except that values are placed in TMPS[i], and must later be moved | |
10689255 | 1599 | into corresponding XEXP (XVECEXP (DST, 0, i), 0) element. */ |
ce739127 | 1600 | |
e2ff5c1b | 1601 | static void |
1602 | emit_group_load_1 (rtx *tmps, rtx dst, rtx orig_src, tree type, int ssize) | |
ce739127 | 1603 | { |
e2ff5c1b | 1604 | rtx src; |
6ede8018 | 1605 | int start, i; |
5e19bed1 | 1606 | enum machine_mode m = GET_MODE (orig_src); |
ce739127 | 1607 | |
611234b4 | 1608 | gcc_assert (GET_CODE (dst) == PARALLEL); |
ce739127 | 1609 | |
553b7a5d | 1610 | if (m != VOIDmode |
1611 | && !SCALAR_INT_MODE_P (m) | |
1612 | && !MEM_P (orig_src) | |
1613 | && GET_CODE (orig_src) != CONCAT) | |
57fb21b0 | 1614 | { |
1615 | enum machine_mode imode = int_mode_for_mode (GET_MODE (orig_src)); | |
1616 | if (imode == BLKmode) | |
1617 | src = assign_stack_temp (GET_MODE (orig_src), ssize, 0); | |
1618 | else | |
1619 | src = gen_reg_rtx (imode); | |
1620 | if (imode != BLKmode) | |
1621 | src = gen_lowpart (GET_MODE (orig_src), src); | |
1622 | emit_move_insn (src, orig_src); | |
1623 | /* ...and back again. */ | |
1624 | if (imode != BLKmode) | |
1625 | src = gen_lowpart (imode, src); | |
e2ff5c1b | 1626 | emit_group_load_1 (tmps, dst, src, type, ssize); |
57fb21b0 | 1627 | return; |
1628 | } | |
1629 | ||
ce739127 | 1630 | /* Check for a NULL entry, used to indicate that the parameter goes |
1631 | both on the stack and in registers. */ | |
6ede8018 | 1632 | if (XEXP (XVECEXP (dst, 0, 0), 0)) |
1633 | start = 0; | |
ce739127 | 1634 | else |
6ede8018 | 1635 | start = 1; |
1636 | ||
6ede8018 | 1637 | /* Process the pieces. */ |
1638 | for (i = start; i < XVECLEN (dst, 0); i++) | |
1639 | { | |
1640 | enum machine_mode mode = GET_MODE (XEXP (XVECEXP (dst, 0, i), 0)); | |
02e7a332 | 1641 | HOST_WIDE_INT bytepos = INTVAL (XEXP (XVECEXP (dst, 0, i), 1)); |
1642 | unsigned int bytelen = GET_MODE_SIZE (mode); | |
6ede8018 | 1643 | int shift = 0; |
1644 | ||
1645 | /* Handle trailing fragments that run over the size of the struct. */ | |
e1439bcb | 1646 | if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize) |
6ede8018 | 1647 | { |
5f4cd670 | 1648 | /* Arrange to shift the fragment to where it belongs. |
1649 | extract_bit_field loads to the lsb of the reg. */ | |
1650 | if ( | |
1651 | #ifdef BLOCK_REG_PADDING | |
1652 | BLOCK_REG_PADDING (GET_MODE (orig_src), type, i == start) | |
1653 | == (BYTES_BIG_ENDIAN ? upward : downward) | |
1654 | #else | |
1655 | BYTES_BIG_ENDIAN | |
1656 | #endif | |
1657 | ) | |
1658 | shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT; | |
6ede8018 | 1659 | bytelen = ssize - bytepos; |
611234b4 | 1660 | gcc_assert (bytelen > 0); |
6ede8018 | 1661 | } |
1662 | ||
c037cba7 | 1663 | /* If we won't be loading directly from memory, protect the real source |
1664 | from strange tricks we might play; but make sure that the source can | |
1665 | be loaded directly into the destination. */ | |
1666 | src = orig_src; | |
e16ceb8e | 1667 | if (!MEM_P (orig_src) |
c037cba7 | 1668 | && (!CONSTANT_P (orig_src) |
1669 | || (GET_MODE (orig_src) != mode | |
1670 | && GET_MODE (orig_src) != VOIDmode))) | |
1671 | { | |
1672 | if (GET_MODE (orig_src) == VOIDmode) | |
1673 | src = gen_reg_rtx (mode); | |
1674 | else | |
1675 | src = gen_reg_rtx (GET_MODE (orig_src)); | |
2c269e73 | 1676 | |
c037cba7 | 1677 | emit_move_insn (src, orig_src); |
1678 | } | |
1679 | ||
6ede8018 | 1680 | /* Optimize the access just a bit. */ |
e16ceb8e | 1681 | if (MEM_P (src) |
5f4cd670 | 1682 | && (! SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (src)) |
1683 | || MEM_ALIGN (src) >= GET_MODE_ALIGNMENT (mode)) | |
fe352cf1 | 1684 | && bytepos * BITS_PER_UNIT % GET_MODE_ALIGNMENT (mode) == 0 |
6ede8018 | 1685 | && bytelen == GET_MODE_SIZE (mode)) |
1686 | { | |
1687 | tmps[i] = gen_reg_rtx (mode); | |
e513d163 | 1688 | emit_move_insn (tmps[i], adjust_address (src, mode, bytepos)); |
ce739127 | 1689 | } |
9a98257b | 1690 | else if (COMPLEX_MODE_P (mode) |
1691 | && GET_MODE (src) == mode | |
1692 | && bytelen == GET_MODE_SIZE (mode)) | |
1693 | /* Let emit_move_complex do the bulk of the work. */ | |
1694 | tmps[i] = src; | |
a1000ec6 | 1695 | else if (GET_CODE (src) == CONCAT) |
1696 | { | |
2a075f91 | 1697 | unsigned int slen = GET_MODE_SIZE (GET_MODE (src)); |
1698 | unsigned int slen0 = GET_MODE_SIZE (GET_MODE (XEXP (src, 0))); | |
1699 | ||
1700 | if ((bytepos == 0 && bytelen == slen0) | |
1701 | || (bytepos != 0 && bytepos + bytelen <= slen)) | |
4c183732 | 1702 | { |
2a075f91 | 1703 | /* The following assumes that the concatenated objects all |
1704 | have the same size. In this case, a simple calculation | |
1705 | can be used to determine the object and the bit field | |
1706 | to be extracted. */ | |
1707 | tmps[i] = XEXP (src, bytepos / slen0); | |
4c183732 | 1708 | if (! CONSTANT_P (tmps[i]) |
8ad4c111 | 1709 | && (!REG_P (tmps[i]) || GET_MODE (tmps[i]) != mode)) |
4c183732 | 1710 | tmps[i] = extract_bit_field (tmps[i], bytelen * BITS_PER_UNIT, |
2a075f91 | 1711 | (bytepos % slen0) * BITS_PER_UNIT, |
8eef3a45 | 1712 | 1, false, NULL_RTX, mode, mode); |
4c183732 | 1713 | } |
611234b4 | 1714 | else |
10d075b5 | 1715 | { |
611234b4 | 1716 | rtx mem; |
6ee1d299 | 1717 | |
611234b4 | 1718 | gcc_assert (!bytepos); |
1719 | mem = assign_stack_temp (GET_MODE (src), slen, 0); | |
10d075b5 | 1720 | emit_move_insn (mem, src); |
6ee1d299 | 1721 | tmps[i] = extract_bit_field (mem, bytelen * BITS_PER_UNIT, |
8eef3a45 | 1722 | 0, 1, false, NULL_RTX, mode, mode); |
10d075b5 | 1723 | } |
a1000ec6 | 1724 | } |
c050f95a | 1725 | /* FIXME: A SIMD parallel will eventually lead to a subreg of a |
1726 | SIMD register, which is currently broken. While we get GCC | |
1727 | to emit proper RTL for these cases, let's dump to memory. */ | |
1728 | else if (VECTOR_MODE_P (GET_MODE (dst)) | |
8ad4c111 | 1729 | && REG_P (src)) |
c050f95a | 1730 | { |
1731 | int slen = GET_MODE_SIZE (GET_MODE (src)); | |
1732 | rtx mem; | |
1733 | ||
1734 | mem = assign_stack_temp (GET_MODE (src), slen, 0); | |
1735 | emit_move_insn (mem, src); | |
1736 | tmps[i] = adjust_address (mem, mode, (int) bytepos); | |
1737 | } | |
568b64fd | 1738 | else if (CONSTANT_P (src) && GET_MODE (dst) != BLKmode |
1739 | && XVECLEN (dst, 0) > 1) | |
1740 | tmps[i] = simplify_gen_subreg (mode, src, GET_MODE(dst), bytepos); | |
25b1440f | 1741 | else if (CONSTANT_P (src)) |
1742 | { | |
1743 | HOST_WIDE_INT len = (HOST_WIDE_INT) bytelen; | |
1744 | ||
1745 | if (len == ssize) | |
1746 | tmps[i] = src; | |
1747 | else | |
1748 | { | |
1749 | rtx first, second; | |
1750 | ||
1751 | gcc_assert (2 * len == ssize); | |
1752 | split_double (src, &first, &second); | |
1753 | if (i) | |
1754 | tmps[i] = second; | |
1755 | else | |
1756 | tmps[i] = first; | |
1757 | } | |
1758 | } | |
1759 | else if (REG_P (src) && GET_MODE (src) == mode) | |
73645c13 | 1760 | tmps[i] = src; |
ce739127 | 1761 | else |
325d1c45 | 1762 | tmps[i] = extract_bit_field (src, bytelen * BITS_PER_UNIT, |
8eef3a45 | 1763 | bytepos * BITS_PER_UNIT, 1, false, NULL_RTX, |
1445ea5b | 1764 | mode, mode); |
ce739127 | 1765 | |
5f4cd670 | 1766 | if (shift) |
92966f8b | 1767 | tmps[i] = expand_shift (LSHIFT_EXPR, mode, tmps[i], |
7016c612 | 1768 | build_int_cst (NULL_TREE, shift), tmps[i], 0); |
ce739127 | 1769 | } |
e2ff5c1b | 1770 | } |
1771 | ||
1772 | /* Emit code to move a block SRC of type TYPE to a block DST, | |
1773 | where DST is non-consecutive registers represented by a PARALLEL. | |
1774 | SSIZE represents the total size of block ORIG_SRC in bytes, or -1 | |
1775 | if not known. */ | |
1776 | ||
1777 | void | |
1778 | emit_group_load (rtx dst, rtx src, tree type, int ssize) | |
1779 | { | |
1780 | rtx *tmps; | |
1781 | int i; | |
1782 | ||
2457c754 | 1783 | tmps = XALLOCAVEC (rtx, XVECLEN (dst, 0)); |
e2ff5c1b | 1784 | emit_group_load_1 (tmps, dst, src, type, ssize); |
325d1c45 | 1785 | |
6ede8018 | 1786 | /* Copy the extracted pieces into the proper (probable) hard regs. */ |
e2ff5c1b | 1787 | for (i = 0; i < XVECLEN (dst, 0); i++) |
1788 | { | |
1789 | rtx d = XEXP (XVECEXP (dst, 0, i), 0); | |
1790 | if (d == NULL) | |
1791 | continue; | |
1792 | emit_move_insn (d, tmps[i]); | |
1793 | } | |
1794 | } | |
1795 | ||
1796 | /* Similar, but load SRC into new pseudos in a format that looks like | |
1797 | PARALLEL. This can later be fed to emit_group_move to get things | |
1798 | in the right place. */ | |
1799 | ||
1800 | rtx | |
1801 | emit_group_load_into_temps (rtx parallel, rtx src, tree type, int ssize) | |
1802 | { | |
1803 | rtvec vec; | |
1804 | int i; | |
1805 | ||
1806 | vec = rtvec_alloc (XVECLEN (parallel, 0)); | |
1807 | emit_group_load_1 (&RTVEC_ELT (vec, 0), parallel, src, type, ssize); | |
1808 | ||
1809 | /* Convert the vector to look just like the original PARALLEL, except | |
1810 | with the computed values. */ | |
1811 | for (i = 0; i < XVECLEN (parallel, 0); i++) | |
1812 | { | |
1813 | rtx e = XVECEXP (parallel, 0, i); | |
1814 | rtx d = XEXP (e, 0); | |
1815 | ||
1816 | if (d) | |
1817 | { | |
1818 | d = force_reg (GET_MODE (d), RTVEC_ELT (vec, i)); | |
1819 | e = alloc_EXPR_LIST (REG_NOTE_KIND (e), d, XEXP (e, 1)); | |
1820 | } | |
1821 | RTVEC_ELT (vec, i) = e; | |
1822 | } | |
1823 | ||
1824 | return gen_rtx_PARALLEL (GET_MODE (parallel), vec); | |
ce739127 | 1825 | } |
1826 | ||
b566e2e5 | 1827 | /* Emit code to move a block SRC to block DST, where SRC and DST are |
1828 | non-consecutive groups of registers, each represented by a PARALLEL. */ | |
1829 | ||
1830 | void | |
35cb5232 | 1831 | emit_group_move (rtx dst, rtx src) |
b566e2e5 | 1832 | { |
1833 | int i; | |
1834 | ||
611234b4 | 1835 | gcc_assert (GET_CODE (src) == PARALLEL |
1836 | && GET_CODE (dst) == PARALLEL | |
1837 | && XVECLEN (src, 0) == XVECLEN (dst, 0)); | |
b566e2e5 | 1838 | |
1839 | /* Skip first entry if NULL. */ | |
1840 | for (i = XEXP (XVECEXP (src, 0, 0), 0) ? 0 : 1; i < XVECLEN (src, 0); i++) | |
1841 | emit_move_insn (XEXP (XVECEXP (dst, 0, i), 0), | |
1842 | XEXP (XVECEXP (src, 0, i), 0)); | |
1843 | } | |
1844 | ||
e2ff5c1b | 1845 | /* Move a group of registers represented by a PARALLEL into pseudos. */ |
1846 | ||
1847 | rtx | |
1848 | emit_group_move_into_temps (rtx src) | |
1849 | { | |
1850 | rtvec vec = rtvec_alloc (XVECLEN (src, 0)); | |
1851 | int i; | |
1852 | ||
1853 | for (i = 0; i < XVECLEN (src, 0); i++) | |
1854 | { | |
1855 | rtx e = XVECEXP (src, 0, i); | |
1856 | rtx d = XEXP (e, 0); | |
1857 | ||
1858 | if (d) | |
1859 | e = alloc_EXPR_LIST (REG_NOTE_KIND (e), copy_to_reg (d), XEXP (e, 1)); | |
1860 | RTVEC_ELT (vec, i) = e; | |
1861 | } | |
1862 | ||
1863 | return gen_rtx_PARALLEL (GET_MODE (src), vec); | |
1864 | } | |
1865 | ||
5f4cd670 | 1866 | /* Emit code to move a block SRC to a block ORIG_DST of type TYPE, |
1867 | where SRC is non-consecutive registers represented by a PARALLEL. | |
1868 | SSIZE represents the total size of block ORIG_DST, or -1 if not | |
1869 | known. */ | |
ce739127 | 1870 | |
1871 | void | |
5f4cd670 | 1872 | emit_group_store (rtx orig_dst, rtx src, tree type ATTRIBUTE_UNUSED, int ssize) |
ce739127 | 1873 | { |
6ede8018 | 1874 | rtx *tmps, dst; |
73fe0e40 | 1875 | int start, finish, i; |
5e19bed1 | 1876 | enum machine_mode m = GET_MODE (orig_dst); |
ce739127 | 1877 | |
611234b4 | 1878 | gcc_assert (GET_CODE (src) == PARALLEL); |
ce739127 | 1879 | |
0b755acc | 1880 | if (!SCALAR_INT_MODE_P (m) |
1881 | && !MEM_P (orig_dst) && GET_CODE (orig_dst) != CONCAT) | |
57fb21b0 | 1882 | { |
1883 | enum machine_mode imode = int_mode_for_mode (GET_MODE (orig_dst)); | |
1884 | if (imode == BLKmode) | |
1885 | dst = assign_stack_temp (GET_MODE (orig_dst), ssize, 0); | |
1886 | else | |
1887 | dst = gen_reg_rtx (imode); | |
1888 | emit_group_store (dst, src, type, ssize); | |
1889 | if (imode != BLKmode) | |
1890 | dst = gen_lowpart (GET_MODE (orig_dst), dst); | |
1891 | emit_move_insn (orig_dst, dst); | |
1892 | return; | |
1893 | } | |
1894 | ||
ce739127 | 1895 | /* Check for a NULL entry, used to indicate that the parameter goes |
1896 | both on the stack and in registers. */ | |
6ede8018 | 1897 | if (XEXP (XVECEXP (src, 0, 0), 0)) |
1898 | start = 0; | |
ce739127 | 1899 | else |
6ede8018 | 1900 | start = 1; |
73fe0e40 | 1901 | finish = XVECLEN (src, 0); |
6ede8018 | 1902 | |
2457c754 | 1903 | tmps = XALLOCAVEC (rtx, finish); |
ce739127 | 1904 | |
6ede8018 | 1905 | /* Copy the (probable) hard regs into pseudos. */ |
73fe0e40 | 1906 | for (i = start; i < finish; i++) |
ce739127 | 1907 | { |
6ede8018 | 1908 | rtx reg = XEXP (XVECEXP (src, 0, i), 0); |
2b4bed8a | 1909 | if (!REG_P (reg) || REGNO (reg) < FIRST_PSEUDO_REGISTER) |
1910 | { | |
1911 | tmps[i] = gen_reg_rtx (GET_MODE (reg)); | |
1912 | emit_move_insn (tmps[i], reg); | |
1913 | } | |
1914 | else | |
1915 | tmps[i] = reg; | |
6ede8018 | 1916 | } |
ce739127 | 1917 | |
6ede8018 | 1918 | /* If we won't be storing directly into memory, protect the real destination |
1919 | from strange tricks we might play. */ | |
1920 | dst = orig_dst; | |
723d3639 | 1921 | if (GET_CODE (dst) == PARALLEL) |
1922 | { | |
1923 | rtx temp; | |
1924 | ||
1925 | /* We can get a PARALLEL dst if there is a conditional expression in | |
1926 | a return statement. In that case, the dst and src are the same, | |
1927 | so no action is necessary. */ | |
1928 | if (rtx_equal_p (dst, src)) | |
1929 | return; | |
1930 | ||
1931 | /* It is unclear if we can ever reach here, but we may as well handle | |
1932 | it. Allocate a temporary, and split this into a store/load to/from | |
1933 | the temporary. */ | |
1934 | ||
1935 | temp = assign_stack_temp (GET_MODE (dst), ssize, 0); | |
5f4cd670 | 1936 | emit_group_store (temp, src, type, ssize); |
1937 | emit_group_load (dst, temp, type, ssize); | |
723d3639 | 1938 | return; |
1939 | } | |
e16ceb8e | 1940 | else if (!MEM_P (dst) && GET_CODE (dst) != CONCAT) |
6ede8018 | 1941 | { |
73fe0e40 | 1942 | enum machine_mode outer = GET_MODE (dst); |
1943 | enum machine_mode inner; | |
f25b36d2 | 1944 | HOST_WIDE_INT bytepos; |
73fe0e40 | 1945 | bool done = false; |
1946 | rtx temp; | |
1947 | ||
2b4bed8a | 1948 | if (!REG_P (dst) || REGNO (dst) < FIRST_PSEUDO_REGISTER) |
73fe0e40 | 1949 | dst = gen_reg_rtx (outer); |
1950 | ||
6ede8018 | 1951 | /* Make life a bit easier for combine. */ |
73fe0e40 | 1952 | /* If the first element of the vector is the low part |
1953 | of the destination mode, use a paradoxical subreg to | |
1954 | initialize the destination. */ | |
1955 | if (start < finish) | |
1956 | { | |
1957 | inner = GET_MODE (tmps[start]); | |
47e9d4ca | 1958 | bytepos = subreg_lowpart_offset (inner, outer); |
73fe0e40 | 1959 | if (INTVAL (XEXP (XVECEXP (src, 0, start), 1)) == bytepos) |
1960 | { | |
1961 | temp = simplify_gen_subreg (outer, tmps[start], | |
47e9d4ca | 1962 | inner, 0); |
4bd9981b | 1963 | if (temp) |
1964 | { | |
1965 | emit_move_insn (dst, temp); | |
1966 | done = true; | |
1967 | start++; | |
1968 | } | |
73fe0e40 | 1969 | } |
1970 | } | |
1971 | ||
1972 | /* If the first element wasn't the low part, try the last. */ | |
1973 | if (!done | |
1974 | && start < finish - 1) | |
1975 | { | |
1976 | inner = GET_MODE (tmps[finish - 1]); | |
47e9d4ca | 1977 | bytepos = subreg_lowpart_offset (inner, outer); |
73fe0e40 | 1978 | if (INTVAL (XEXP (XVECEXP (src, 0, finish - 1), 1)) == bytepos) |
1979 | { | |
1980 | temp = simplify_gen_subreg (outer, tmps[finish - 1], | |
47e9d4ca | 1981 | inner, 0); |
4bd9981b | 1982 | if (temp) |
1983 | { | |
1984 | emit_move_insn (dst, temp); | |
1985 | done = true; | |
1986 | finish--; | |
1987 | } | |
73fe0e40 | 1988 | } |
1989 | } | |
1990 | ||
1991 | /* Otherwise, simply initialize the result to zero. */ | |
1992 | if (!done) | |
1993 | emit_move_insn (dst, CONST0_RTX (outer)); | |
6ede8018 | 1994 | } |
6ede8018 | 1995 | |
1996 | /* Process the pieces. */ | |
73fe0e40 | 1997 | for (i = start; i < finish; i++) |
6ede8018 | 1998 | { |
02e7a332 | 1999 | HOST_WIDE_INT bytepos = INTVAL (XEXP (XVECEXP (src, 0, i), 1)); |
6ede8018 | 2000 | enum machine_mode mode = GET_MODE (tmps[i]); |
02e7a332 | 2001 | unsigned int bytelen = GET_MODE_SIZE (mode); |
dc77d5c5 | 2002 | unsigned int adj_bytelen = bytelen; |
463e3bf7 | 2003 | rtx dest = dst; |
6ede8018 | 2004 | |
2005 | /* Handle trailing fragments that run over the size of the struct. */ | |
e1439bcb | 2006 | if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize) |
dc77d5c5 | 2007 | adj_bytelen = ssize - bytepos; |
ce739127 | 2008 | |
463e3bf7 | 2009 | if (GET_CODE (dst) == CONCAT) |
2010 | { | |
dc77d5c5 | 2011 | if (bytepos + adj_bytelen |
2012 | <= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0)))) | |
463e3bf7 | 2013 | dest = XEXP (dst, 0); |
2014 | else if (bytepos >= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0)))) | |
2015 | { | |
2016 | bytepos -= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0))); | |
2017 | dest = XEXP (dst, 1); | |
2018 | } | |
611234b4 | 2019 | else |
376c21d1 | 2020 | { |
2c49840d | 2021 | enum machine_mode dest_mode = GET_MODE (dest); |
2022 | enum machine_mode tmp_mode = GET_MODE (tmps[i]); | |
2c49840d | 2023 | |
47b0fad7 | 2024 | gcc_assert (bytepos == 0 && XVECLEN (src, 0)); |
2c49840d | 2025 | |
2026 | if (GET_MODE_ALIGNMENT (dest_mode) | |
2027 | >= GET_MODE_ALIGNMENT (tmp_mode)) | |
2028 | { | |
47b0fad7 | 2029 | dest = assign_stack_temp (dest_mode, |
2030 | GET_MODE_SIZE (dest_mode), | |
2031 | 0); | |
2c49840d | 2032 | emit_move_insn (adjust_address (dest, |
2033 | tmp_mode, | |
2034 | bytepos), | |
2035 | tmps[i]); | |
2036 | dst = dest; | |
2037 | } | |
2038 | else | |
2039 | { | |
47b0fad7 | 2040 | dest = assign_stack_temp (tmp_mode, |
2041 | GET_MODE_SIZE (tmp_mode), | |
2042 | 0); | |
2c49840d | 2043 | emit_move_insn (dest, tmps[i]); |
2044 | dst = adjust_address (dest, dest_mode, bytepos); | |
2045 | } | |
376c21d1 | 2046 | break; |
2047 | } | |
463e3bf7 | 2048 | } |
2049 | ||
dc77d5c5 | 2050 | if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize) |
2051 | { | |
2052 | /* store_bit_field always takes its value from the lsb. | |
2053 | Move the fragment to the lsb if it's not already there. */ | |
2054 | if ( | |
2055 | #ifdef BLOCK_REG_PADDING | |
2056 | BLOCK_REG_PADDING (GET_MODE (orig_dst), type, i == start) | |
2057 | == (BYTES_BIG_ENDIAN ? upward : downward) | |
2058 | #else | |
2059 | BYTES_BIG_ENDIAN | |
2060 | #endif | |
2061 | ) | |
2062 | { | |
2063 | int shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT; | |
2064 | tmps[i] = expand_shift (RSHIFT_EXPR, mode, tmps[i], | |
2065 | build_int_cst (NULL_TREE, shift), | |
2066 | tmps[i], 0); | |
2067 | } | |
2068 | bytelen = adj_bytelen; | |
2069 | } | |
2070 | ||
6ede8018 | 2071 | /* Optimize the access just a bit. */ |
e16ceb8e | 2072 | if (MEM_P (dest) |
5f4cd670 | 2073 | && (! SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (dest)) |
2074 | || MEM_ALIGN (dest) >= GET_MODE_ALIGNMENT (mode)) | |
fe352cf1 | 2075 | && bytepos * BITS_PER_UNIT % GET_MODE_ALIGNMENT (mode) == 0 |
6ede8018 | 2076 | && bytelen == GET_MODE_SIZE (mode)) |
463e3bf7 | 2077 | emit_move_insn (adjust_address (dest, mode, bytepos), tmps[i]); |
6ede8018 | 2078 | else |
463e3bf7 | 2079 | store_bit_field (dest, bytelen * BITS_PER_UNIT, bytepos * BITS_PER_UNIT, |
1445ea5b | 2080 | mode, tmps[i]); |
ce739127 | 2081 | } |
fe352cf1 | 2082 | |
6ede8018 | 2083 | /* Copy from the pseudo into the (probable) hard reg. */ |
376c21d1 | 2084 | if (orig_dst != dst) |
6ede8018 | 2085 | emit_move_insn (orig_dst, dst); |
ce739127 | 2086 | } |
2087 | ||
25eb0f59 | 2088 | /* Generate code to copy a BLKmode object of TYPE out of a |
2089 | set of registers starting with SRCREG into TGTBLK. If TGTBLK | |
2090 | is null, a stack temporary is created. TGTBLK is returned. | |
2091 | ||
2c8ff1ed | 2092 | The purpose of this routine is to handle functions that return |
2093 | BLKmode structures in registers. Some machines (the PA for example) | |
2094 | want to return all small structures in registers regardless of the | |
2095 | structure's alignment. */ | |
25eb0f59 | 2096 | |
2097 | rtx | |
35cb5232 | 2098 | copy_blkmode_from_reg (rtx tgtblk, rtx srcreg, tree type) |
25eb0f59 | 2099 | { |
325d1c45 | 2100 | unsigned HOST_WIDE_INT bytes = int_size_in_bytes (type); |
2101 | rtx src = NULL, dst = NULL; | |
2102 | unsigned HOST_WIDE_INT bitsize = MIN (TYPE_ALIGN (type), BITS_PER_WORD); | |
2c8ff1ed | 2103 | unsigned HOST_WIDE_INT bitpos, xbitpos, padding_correction = 0; |
13a68d5b | 2104 | enum machine_mode copy_mode; |
325d1c45 | 2105 | |
2106 | if (tgtblk == 0) | |
2107 | { | |
387bc205 | 2108 | tgtblk = assign_temp (build_qualified_type (type, |
2109 | (TYPE_QUALS (type) | |
2110 | | TYPE_QUAL_CONST)), | |
2111 | 0, 1, 1); | |
325d1c45 | 2112 | preserve_temp_slots (tgtblk); |
2113 | } | |
fa56dc1d | 2114 | |
a689a61a | 2115 | /* This code assumes srcreg is at least a full word. If it isn't, copy it |
f4a0a478 | 2116 | into a new pseudo which is a full word. */ |
23551094 | 2117 | |
325d1c45 | 2118 | if (GET_MODE (srcreg) != BLKmode |
2119 | && GET_MODE_SIZE (GET_MODE (srcreg)) < UNITS_PER_WORD) | |
78a8ed03 | 2120 | srcreg = convert_to_mode (word_mode, srcreg, TYPE_UNSIGNED (type)); |
325d1c45 | 2121 | |
2c8ff1ed | 2122 | /* If the structure doesn't take up a whole number of words, see whether |
2123 | SRCREG is padded on the left or on the right. If it's on the left, | |
2124 | set PADDING_CORRECTION to the number of bits to skip. | |
2125 | ||
2126 | In most ABIs, the structure will be returned at the least end of | |
2127 | the register, which translates to right padding on little-endian | |
2128 | targets and left padding on big-endian targets. The opposite | |
2129 | holds if the structure is returned at the most significant | |
2130 | end of the register. */ | |
2131 | if (bytes % UNITS_PER_WORD != 0 | |
2132 | && (targetm.calls.return_in_msb (type) | |
2133 | ? !BYTES_BIG_ENDIAN | |
2134 | : BYTES_BIG_ENDIAN)) | |
2135 | padding_correction | |
325d1c45 | 2136 | = (BITS_PER_WORD - ((bytes % UNITS_PER_WORD) * BITS_PER_UNIT)); |
2137 | ||
13a68d5b | 2138 | /* Copy the structure BITSIZE bits at a time. If the target lives in |
2139 | memory, take care of not reading/writing past its end by selecting | |
2140 | a copy mode suited to BITSIZE. This should always be possible given | |
2141 | how it is computed. | |
fa56dc1d | 2142 | |
325d1c45 | 2143 | We could probably emit more efficient code for machines which do not use |
2144 | strict alignment, but it doesn't seem worth the effort at the current | |
2145 | time. */ | |
13a68d5b | 2146 | |
2147 | copy_mode = word_mode; | |
2148 | if (MEM_P (tgtblk)) | |
2149 | { | |
2150 | enum machine_mode mem_mode = mode_for_size (bitsize, MODE_INT, 1); | |
2151 | if (mem_mode != BLKmode) | |
2152 | copy_mode = mem_mode; | |
2153 | } | |
2154 | ||
2c8ff1ed | 2155 | for (bitpos = 0, xbitpos = padding_correction; |
325d1c45 | 2156 | bitpos < bytes * BITS_PER_UNIT; |
2157 | bitpos += bitsize, xbitpos += bitsize) | |
2158 | { | |
fa56dc1d | 2159 | /* We need a new source operand each time xbitpos is on a |
2c8ff1ed | 2160 | word boundary and when xbitpos == padding_correction |
325d1c45 | 2161 | (the first time through). */ |
2162 | if (xbitpos % BITS_PER_WORD == 0 | |
2c8ff1ed | 2163 | || xbitpos == padding_correction) |
c502077e | 2164 | src = operand_subword_force (srcreg, xbitpos / BITS_PER_WORD, |
2165 | GET_MODE (srcreg)); | |
325d1c45 | 2166 | |
2167 | /* We need a new destination operand each time bitpos is on | |
2168 | a word boundary. */ | |
2169 | if (bitpos % BITS_PER_WORD == 0) | |
2170 | dst = operand_subword (tgtblk, bitpos / BITS_PER_WORD, 1, BLKmode); | |
fa56dc1d | 2171 | |
325d1c45 | 2172 | /* Use xbitpos for the source extraction (right justified) and |
13a68d5b | 2173 | bitpos for the destination store (left justified). */ |
2174 | store_bit_field (dst, bitsize, bitpos % BITS_PER_WORD, copy_mode, | |
325d1c45 | 2175 | extract_bit_field (src, bitsize, |
8eef3a45 | 2176 | xbitpos % BITS_PER_WORD, 1, false, |
13a68d5b | 2177 | NULL_RTX, copy_mode, copy_mode)); |
325d1c45 | 2178 | } |
2179 | ||
2180 | return tgtblk; | |
25eb0f59 | 2181 | } |
2182 | ||
07409b3a | 2183 | /* Add a USE expression for REG to the (possibly empty) list pointed |
2184 | to by CALL_FUSAGE. REG must denote a hard register. */ | |
10f307d9 | 2185 | |
2186 | void | |
35cb5232 | 2187 | use_reg (rtx *call_fusage, rtx reg) |
7e2ca70b | 2188 | { |
611234b4 | 2189 | gcc_assert (REG_P (reg) && REGNO (reg) < FIRST_PSEUDO_REGISTER); |
1f8b6002 | 2190 | |
7e2ca70b | 2191 | *call_fusage |
941522d6 | 2192 | = gen_rtx_EXPR_LIST (VOIDmode, |
2193 | gen_rtx_USE (VOIDmode, reg), *call_fusage); | |
7e2ca70b | 2194 | } |
2195 | ||
07409b3a | 2196 | /* Add USE expressions to *CALL_FUSAGE for each of NREGS consecutive regs, |
2197 | starting at REGNO. All of these registers must be hard registers. */ | |
7e2ca70b | 2198 | |
2199 | void | |
35cb5232 | 2200 | use_regs (rtx *call_fusage, int regno, int nregs) |
10f307d9 | 2201 | { |
f2799de7 | 2202 | int i; |
10f307d9 | 2203 | |
611234b4 | 2204 | gcc_assert (regno + nregs <= FIRST_PSEUDO_REGISTER); |
f2799de7 | 2205 | |
2206 | for (i = 0; i < nregs; i++) | |
936082bb | 2207 | use_reg (call_fusage, regno_reg_rtx[regno + i]); |
10f307d9 | 2208 | } |
ce739127 | 2209 | |
2210 | /* Add USE expressions to *CALL_FUSAGE for each REG contained in the | |
2211 | PARALLEL REGS. This is for calls that pass values in multiple | |
2212 | non-contiguous locations. The Irix 6 ABI has examples of this. */ | |
2213 | ||
2214 | void | |
35cb5232 | 2215 | use_group_regs (rtx *call_fusage, rtx regs) |
ce739127 | 2216 | { |
2217 | int i; | |
2218 | ||
2f373e5d | 2219 | for (i = 0; i < XVECLEN (regs, 0); i++) |
2220 | { | |
2221 | rtx reg = XEXP (XVECEXP (regs, 0, i), 0); | |
ce739127 | 2222 | |
2f373e5d | 2223 | /* A NULL entry means the parameter goes both on the stack and in |
2224 | registers. This can also be a MEM for targets that pass values | |
2225 | partially on the stack and partially in registers. */ | |
8ad4c111 | 2226 | if (reg != 0 && REG_P (reg)) |
2f373e5d | 2227 | use_reg (call_fusage, reg); |
2228 | } | |
ce739127 | 2229 | } |
c1a83279 | 2230 | |
2231 | /* Return the defining gimple statement for SSA_NAME NAME if it is an | |
2232 | assigment and the code of the expresion on the RHS is CODE. Return | |
2233 | NULL otherwise. */ | |
2234 | ||
2235 | static gimple | |
2236 | get_def_for_expr (tree name, enum tree_code code) | |
2237 | { | |
2238 | gimple def_stmt; | |
2239 | ||
2240 | if (TREE_CODE (name) != SSA_NAME) | |
2241 | return NULL; | |
2242 | ||
2243 | def_stmt = get_gimple_for_ssa_name (name); | |
2244 | if (!def_stmt | |
2245 | || gimple_assign_rhs_code (def_stmt) != code) | |
2246 | return NULL; | |
2247 | ||
2248 | return def_stmt; | |
2249 | } | |
10f307d9 | 2250 | \f |
6840589f | 2251 | |
d1f6ae0c | 2252 | /* Determine whether the LEN bytes generated by CONSTFUN can be |
2253 | stored to memory using several move instructions. CONSTFUNDATA is | |
2254 | a pointer which will be passed as argument in every CONSTFUN call. | |
4b297e2e | 2255 | ALIGN is maximum alignment we can assume. MEMSETP is true if this is |
2256 | a memset operation and false if it's a copy of a constant string. | |
2257 | Return nonzero if a call to store_by_pieces should succeed. */ | |
d1f6ae0c | 2258 | |
6840589f | 2259 | int |
35cb5232 | 2260 | can_store_by_pieces (unsigned HOST_WIDE_INT len, |
2261 | rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode), | |
4b297e2e | 2262 | void *constfundata, unsigned int align, bool memsetp) |
6840589f | 2263 | { |
025d4f81 | 2264 | unsigned HOST_WIDE_INT l; |
2265 | unsigned int max_size; | |
6840589f | 2266 | HOST_WIDE_INT offset = 0; |
c7e41aee | 2267 | enum machine_mode mode; |
6840589f | 2268 | enum insn_code icode; |
2269 | int reverse; | |
d92517d3 | 2270 | /* cst is set but not used if LEGITIMATE_CONSTANT doesn't use it. */ |
2271 | rtx cst ATTRIBUTE_UNUSED; | |
6840589f | 2272 | |
1d881c02 | 2273 | if (len == 0) |
2274 | return 1; | |
2275 | ||
48e1416a | 2276 | if (! (memsetp |
4b297e2e | 2277 | ? SET_BY_PIECES_P (len, align) |
2278 | : STORE_BY_PIECES_P (len, align))) | |
6840589f | 2279 | return 0; |
2280 | ||
c7e41aee | 2281 | align = alignment_for_piecewise_move (STORE_MAX_PIECES, align); |
6840589f | 2282 | |
2283 | /* We would first store what we can in the largest integer mode, then go to | |
2284 | successively smaller modes. */ | |
2285 | ||
2286 | for (reverse = 0; | |
2287 | reverse <= (HAVE_PRE_DECREMENT || HAVE_POST_DECREMENT); | |
2288 | reverse++) | |
2289 | { | |
2290 | l = len; | |
d1f6ae0c | 2291 | max_size = STORE_MAX_PIECES + 1; |
6840589f | 2292 | while (max_size > 1) |
2293 | { | |
c7e41aee | 2294 | mode = widest_int_mode_for_size (max_size); |
6840589f | 2295 | |
2296 | if (mode == VOIDmode) | |
2297 | break; | |
2298 | ||
d6bf3b14 | 2299 | icode = optab_handler (mov_optab, mode); |
6840589f | 2300 | if (icode != CODE_FOR_nothing |
2301 | && align >= GET_MODE_ALIGNMENT (mode)) | |
2302 | { | |
2303 | unsigned int size = GET_MODE_SIZE (mode); | |
2304 | ||
2305 | while (l >= size) | |
2306 | { | |
2307 | if (reverse) | |
2308 | offset -= size; | |
2309 | ||
2310 | cst = (*constfun) (constfundata, offset, mode); | |
2311 | if (!LEGITIMATE_CONSTANT_P (cst)) | |
2312 | return 0; | |
2313 | ||
2314 | if (!reverse) | |
2315 | offset += size; | |
2316 | ||
2317 | l -= size; | |
2318 | } | |
2319 | } | |
2320 | ||
2321 | max_size = GET_MODE_SIZE (mode); | |
2322 | } | |
2323 | ||
2324 | /* The code above should have handled everything. */ | |
611234b4 | 2325 | gcc_assert (!l); |
6840589f | 2326 | } |
2327 | ||
2328 | return 1; | |
2329 | } | |
2330 | ||
2331 | /* Generate several move instructions to store LEN bytes generated by | |
2332 | CONSTFUN to block TO. (A MEM rtx with BLKmode). CONSTFUNDATA is a | |
2333 | pointer which will be passed as argument in every CONSTFUN call. | |
4b297e2e | 2334 | ALIGN is maximum alignment we can assume. MEMSETP is true if this is |
2335 | a memset operation and false if it's a copy of a constant string. | |
9fe0e1b8 | 2336 | If ENDP is 0 return to, if ENDP is 1 return memory at the end ala |
2337 | mempcpy, and if ENDP is 2 return memory the end minus one byte ala | |
2338 | stpcpy. */ | |
6840589f | 2339 | |
9fe0e1b8 | 2340 | rtx |
35cb5232 | 2341 | store_by_pieces (rtx to, unsigned HOST_WIDE_INT len, |
2342 | rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode), | |
4b297e2e | 2343 | void *constfundata, unsigned int align, bool memsetp, int endp) |
6840589f | 2344 | { |
98155838 | 2345 | enum machine_mode to_addr_mode |
2346 | = targetm.addr_space.address_mode (MEM_ADDR_SPACE (to)); | |
584511c1 | 2347 | struct store_by_pieces_d data; |
6840589f | 2348 | |
1d881c02 | 2349 | if (len == 0) |
2350 | { | |
611234b4 | 2351 | gcc_assert (endp != 2); |
1d881c02 | 2352 | return to; |
2353 | } | |
2354 | ||
4b297e2e | 2355 | gcc_assert (memsetp |
2356 | ? SET_BY_PIECES_P (len, align) | |
2357 | : STORE_BY_PIECES_P (len, align)); | |
6840589f | 2358 | data.constfun = constfun; |
2359 | data.constfundata = constfundata; | |
2360 | data.len = len; | |
2361 | data.to = to; | |
2362 | store_by_pieces_1 (&data, align); | |
9fe0e1b8 | 2363 | if (endp) |
2364 | { | |
2365 | rtx to1; | |
2366 | ||
611234b4 | 2367 | gcc_assert (!data.reverse); |
9fe0e1b8 | 2368 | if (data.autinc_to) |
2369 | { | |
2370 | if (endp == 2) | |
2371 | { | |
2372 | if (HAVE_POST_INCREMENT && data.explicit_inc_to > 0) | |
2373 | emit_insn (gen_add2_insn (data.to_addr, constm1_rtx)); | |
2374 | else | |
98155838 | 2375 | data.to_addr = copy_to_mode_reg (to_addr_mode, |
2376 | plus_constant (data.to_addr, | |
9fe0e1b8 | 2377 | -1)); |
2378 | } | |
2379 | to1 = adjust_automodify_address (data.to, QImode, data.to_addr, | |
2380 | data.offset); | |
2381 | } | |
2382 | else | |
2383 | { | |
2384 | if (endp == 2) | |
2385 | --data.offset; | |
2386 | to1 = adjust_address (data.to, QImode, data.offset); | |
2387 | } | |
2388 | return to1; | |
2389 | } | |
2390 | else | |
2391 | return data.to; | |
6840589f | 2392 | } |
2393 | ||
325d1c45 | 2394 | /* Generate several move instructions to clear LEN bytes of block TO. (A MEM |
0a534ba7 | 2395 | rtx with BLKmode). ALIGN is maximum alignment we can assume. */ |
dbd14dc5 | 2396 | |
2397 | static void | |
f1667d92 | 2398 | clear_by_pieces (rtx to, unsigned HOST_WIDE_INT len, unsigned int align) |
dbd14dc5 | 2399 | { |
584511c1 | 2400 | struct store_by_pieces_d data; |
6840589f | 2401 | |
1d881c02 | 2402 | if (len == 0) |
2403 | return; | |
2404 | ||
6840589f | 2405 | data.constfun = clear_by_pieces_1; |
2571646d | 2406 | data.constfundata = NULL; |
6840589f | 2407 | data.len = len; |
2408 | data.to = to; | |
2409 | store_by_pieces_1 (&data, align); | |
2410 | } | |
2411 | ||
2412 | /* Callback routine for clear_by_pieces. | |
2413 | Return const0_rtx unconditionally. */ | |
2414 | ||
2415 | static rtx | |
35cb5232 | 2416 | clear_by_pieces_1 (void *data ATTRIBUTE_UNUSED, |
2417 | HOST_WIDE_INT offset ATTRIBUTE_UNUSED, | |
2418 | enum machine_mode mode ATTRIBUTE_UNUSED) | |
6840589f | 2419 | { |
2420 | return const0_rtx; | |
2421 | } | |
2422 | ||
2423 | /* Subroutine of clear_by_pieces and store_by_pieces. | |
2424 | Generate several move instructions to store LEN bytes of block TO. (A MEM | |
0a534ba7 | 2425 | rtx with BLKmode). ALIGN is maximum alignment we can assume. */ |
6840589f | 2426 | |
2427 | static void | |
584511c1 | 2428 | store_by_pieces_1 (struct store_by_pieces_d *data ATTRIBUTE_UNUSED, |
35cb5232 | 2429 | unsigned int align ATTRIBUTE_UNUSED) |
6840589f | 2430 | { |
98155838 | 2431 | enum machine_mode to_addr_mode |
2432 | = targetm.addr_space.address_mode (MEM_ADDR_SPACE (data->to)); | |
6840589f | 2433 | rtx to_addr = XEXP (data->to, 0); |
025d4f81 | 2434 | unsigned int max_size = STORE_MAX_PIECES + 1; |
53bd09ab | 2435 | enum insn_code icode; |
dbd14dc5 | 2436 | |
6840589f | 2437 | data->offset = 0; |
2438 | data->to_addr = to_addr; | |
2439 | data->autinc_to | |
dbd14dc5 | 2440 | = (GET_CODE (to_addr) == PRE_INC || GET_CODE (to_addr) == PRE_DEC |
2441 | || GET_CODE (to_addr) == POST_INC || GET_CODE (to_addr) == POST_DEC); | |
2442 | ||
6840589f | 2443 | data->explicit_inc_to = 0; |
2444 | data->reverse | |
dbd14dc5 | 2445 | = (GET_CODE (to_addr) == PRE_DEC || GET_CODE (to_addr) == POST_DEC); |
6840589f | 2446 | if (data->reverse) |
2447 | data->offset = data->len; | |
dbd14dc5 | 2448 | |
6840589f | 2449 | /* If storing requires more than two move insns, |
dbd14dc5 | 2450 | copy addresses to registers (to make displacements shorter) |
2451 | and use post-increment if available. */ | |
6840589f | 2452 | if (!data->autinc_to |
025d4f81 | 2453 | && move_by_pieces_ninsns (data->len, align, max_size) > 2) |
dbd14dc5 | 2454 | { |
c7e41aee | 2455 | /* Determine the main mode we'll be using. |
2456 | MODE might not be used depending on the definitions of the | |
2457 | USE_* macros below. */ | |
2458 | enum machine_mode mode ATTRIBUTE_UNUSED | |
2459 | = widest_int_mode_for_size (max_size); | |
53bd09ab | 2460 | |
6840589f | 2461 | if (USE_STORE_PRE_DECREMENT (mode) && data->reverse && ! data->autinc_to) |
dbd14dc5 | 2462 | { |
98155838 | 2463 | data->to_addr = copy_to_mode_reg (to_addr_mode, |
2464 | plus_constant (to_addr, data->len)); | |
6840589f | 2465 | data->autinc_to = 1; |
2466 | data->explicit_inc_to = -1; | |
dbd14dc5 | 2467 | } |
f7c44134 | 2468 | |
6840589f | 2469 | if (USE_STORE_POST_INCREMENT (mode) && ! data->reverse |
2470 | && ! data->autinc_to) | |
dbd14dc5 | 2471 | { |
98155838 | 2472 | data->to_addr = copy_to_mode_reg (to_addr_mode, to_addr); |
6840589f | 2473 | data->autinc_to = 1; |
2474 | data->explicit_inc_to = 1; | |
dbd14dc5 | 2475 | } |
f7c44134 | 2476 | |
6840589f | 2477 | if ( !data->autinc_to && CONSTANT_P (to_addr)) |
98155838 | 2478 | data->to_addr = copy_to_mode_reg (to_addr_mode, to_addr); |
dbd14dc5 | 2479 | } |
2480 | ||
c7e41aee | 2481 | align = alignment_for_piecewise_move (STORE_MAX_PIECES, align); |
dbd14dc5 | 2482 | |
6840589f | 2483 | /* First store what we can in the largest integer mode, then go to |
dbd14dc5 | 2484 | successively smaller modes. */ |
2485 | ||
2486 | while (max_size > 1) | |
2487 | { | |
c7e41aee | 2488 | enum machine_mode mode = widest_int_mode_for_size (max_size); |
dbd14dc5 | 2489 | |
2490 | if (mode == VOIDmode) | |
2491 | break; | |
2492 | ||
d6bf3b14 | 2493 | icode = optab_handler (mov_optab, mode); |
325d1c45 | 2494 | if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode)) |
6840589f | 2495 | store_by_pieces_2 (GEN_FCN (icode), mode, data); |
dbd14dc5 | 2496 | |
2497 | max_size = GET_MODE_SIZE (mode); | |
2498 | } | |
2499 | ||
2500 | /* The code above should have handled everything. */ | |
611234b4 | 2501 | gcc_assert (!data->len); |
dbd14dc5 | 2502 | } |
2503 | ||
6840589f | 2504 | /* Subroutine of store_by_pieces_1. Store as many bytes as appropriate |
dbd14dc5 | 2505 | with move instructions for mode MODE. GENFUN is the gen_... function |
2506 | to make a move insn for that mode. DATA has all the other info. */ | |
2507 | ||
2508 | static void | |
35cb5232 | 2509 | store_by_pieces_2 (rtx (*genfun) (rtx, ...), enum machine_mode mode, |
584511c1 | 2510 | struct store_by_pieces_d *data) |
dbd14dc5 | 2511 | { |
f7c44134 | 2512 | unsigned int size = GET_MODE_SIZE (mode); |
6840589f | 2513 | rtx to1, cst; |
dbd14dc5 | 2514 | |
2515 | while (data->len >= size) | |
2516 | { | |
f7c44134 | 2517 | if (data->reverse) |
2518 | data->offset -= size; | |
dbd14dc5 | 2519 | |
f7c44134 | 2520 | if (data->autinc_to) |
bf42c62d | 2521 | to1 = adjust_automodify_address (data->to, mode, data->to_addr, |
2522 | data->offset); | |
fa56dc1d | 2523 | else |
e513d163 | 2524 | to1 = adjust_address (data->to, mode, data->offset); |
dbd14dc5 | 2525 | |
e4e498cf | 2526 | if (HAVE_PRE_DECREMENT && data->explicit_inc_to < 0) |
6840589f | 2527 | emit_insn (gen_add2_insn (data->to_addr, |
2528 | GEN_INT (-(HOST_WIDE_INT) size))); | |
dbd14dc5 | 2529 | |
6840589f | 2530 | cst = (*data->constfun) (data->constfundata, data->offset, mode); |
2531 | emit_insn ((*genfun) (to1, cst)); | |
f7c44134 | 2532 | |
e4e498cf | 2533 | if (HAVE_POST_INCREMENT && data->explicit_inc_to > 0) |
dbd14dc5 | 2534 | emit_insn (gen_add2_insn (data->to_addr, GEN_INT (size))); |
dbd14dc5 | 2535 | |
f7c44134 | 2536 | if (! data->reverse) |
2537 | data->offset += size; | |
dbd14dc5 | 2538 | |
2539 | data->len -= size; | |
2540 | } | |
2541 | } | |
2542 | \f | |
325d1c45 | 2543 | /* Write zeros through the storage of OBJECT. If OBJECT has BLKmode, SIZE is |
2a631e19 | 2544 | its length in bytes. */ |
0dbd1c74 | 2545 | |
2546 | rtx | |
162719b3 | 2547 | clear_storage_hints (rtx object, rtx size, enum block_op_methods method, |
2548 | unsigned int expected_align, HOST_WIDE_INT expected_size) | |
10f307d9 | 2549 | { |
83016f38 | 2550 | enum machine_mode mode = GET_MODE (object); |
2551 | unsigned int align; | |
0dbd1c74 | 2552 | |
0b25db21 | 2553 | gcc_assert (method == BLOCK_OP_NORMAL || method == BLOCK_OP_TAILCALL); |
2554 | ||
20c377c2 | 2555 | /* If OBJECT is not BLKmode and SIZE is the same size as its mode, |
2556 | just move a zero. Otherwise, do this a piece at a time. */ | |
83016f38 | 2557 | if (mode != BLKmode |
971ba038 | 2558 | && CONST_INT_P (size) |
83016f38 | 2559 | && INTVAL (size) == (HOST_WIDE_INT) GET_MODE_SIZE (mode)) |
10f307d9 | 2560 | { |
83016f38 | 2561 | rtx zero = CONST0_RTX (mode); |
2562 | if (zero != NULL) | |
2563 | { | |
2564 | emit_move_insn (object, zero); | |
2565 | return NULL; | |
2566 | } | |
2567 | ||
2568 | if (COMPLEX_MODE_P (mode)) | |
2569 | { | |
2570 | zero = CONST0_RTX (GET_MODE_INNER (mode)); | |
2571 | if (zero != NULL) | |
2572 | { | |
2573 | write_complex_part (object, zero, 0); | |
2574 | write_complex_part (object, zero, 1); | |
2575 | return NULL; | |
2576 | } | |
2577 | } | |
c0bfc78e | 2578 | } |
2579 | ||
83016f38 | 2580 | if (size == const0_rtx) |
2581 | return NULL; | |
2582 | ||
2583 | align = MEM_ALIGN (object); | |
2584 | ||
971ba038 | 2585 | if (CONST_INT_P (size) |
83016f38 | 2586 | && CLEAR_BY_PIECES_P (INTVAL (size), align)) |
2587 | clear_by_pieces (object, INTVAL (size), align); | |
162719b3 | 2588 | else if (set_storage_via_setmem (object, size, const0_rtx, align, |
2589 | expected_align, expected_size)) | |
83016f38 | 2590 | ; |
bd1a81f7 | 2591 | else if (ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (object))) |
ab608690 | 2592 | return set_storage_via_libcall (object, size, const0_rtx, |
2593 | method == BLOCK_OP_TAILCALL); | |
bd1a81f7 | 2594 | else |
2595 | gcc_unreachable (); | |
83016f38 | 2596 | |
2597 | return NULL; | |
c0bfc78e | 2598 | } |
2599 | ||
162719b3 | 2600 | rtx |
2601 | clear_storage (rtx object, rtx size, enum block_op_methods method) | |
2602 | { | |
2603 | return clear_storage_hints (object, size, method, 0, -1); | |
2604 | } | |
2605 | ||
2606 | ||
f896c932 | 2607 | /* A subroutine of clear_storage. Expand a call to memset. |
c0bfc78e | 2608 | Return the return value of memset, 0 otherwise. */ |
dbd14dc5 | 2609 | |
ab608690 | 2610 | rtx |
2611 | set_storage_via_libcall (rtx object, rtx size, rtx val, bool tailcall) | |
c0bfc78e | 2612 | { |
c2f47e15 | 2613 | tree call_expr, fn, object_tree, size_tree, val_tree; |
c0bfc78e | 2614 | enum machine_mode size_mode; |
2615 | rtx retval; | |
dbd14dc5 | 2616 | |
0a534ba7 | 2617 | /* Emit code to copy OBJECT and SIZE into new pseudos. We can then |
2618 | place those into new pseudos into a VAR_DECL and use them later. */ | |
f708f8fd | 2619 | |
c0bfc78e | 2620 | object = copy_to_mode_reg (Pmode, XEXP (object, 0)); |
f708f8fd | 2621 | |
f896c932 | 2622 | size_mode = TYPE_MODE (sizetype); |
c0bfc78e | 2623 | size = convert_to_mode (size_mode, size, 1); |
2624 | size = copy_to_mode_reg (size_mode, size); | |
f708f8fd | 2625 | |
c0bfc78e | 2626 | /* It is incorrect to use the libcall calling conventions to call |
2627 | memset in this context. This could be a user call to memset and | |
2628 | the user may wish to examine the return value from memset. For | |
2629 | targets where libcalls and normal calls have different conventions | |
f896c932 | 2630 | for returning pointers, we could end up generating incorrect code. */ |
06b8e3db | 2631 | |
c0bfc78e | 2632 | object_tree = make_tree (ptr_type_node, object); |
971ba038 | 2633 | if (!CONST_INT_P (val)) |
ab608690 | 2634 | val = convert_to_mode (TYPE_MODE (integer_type_node), val, 1); |
f896c932 | 2635 | size_tree = make_tree (sizetype, size); |
ab608690 | 2636 | val_tree = make_tree (integer_type_node, val); |
c0bfc78e | 2637 | |
2638 | fn = clear_storage_libcall_fn (true); | |
d52d7a3a | 2639 | call_expr = build_call_expr (fn, 3, object_tree, val_tree, size_tree); |
0b25db21 | 2640 | CALL_EXPR_TAILCALL (call_expr) = tailcall; |
c0bfc78e | 2641 | |
8ec3c5c2 | 2642 | retval = expand_normal (call_expr); |
c0bfc78e | 2643 | |
f896c932 | 2644 | return retval; |
c0bfc78e | 2645 | } |
2646 | ||
ab608690 | 2647 | /* A subroutine of set_storage_via_libcall. Create the tree node |
c0bfc78e | 2648 | for the function we use for block clears. The first time FOR_CALL |
2649 | is true, we call assemble_external. */ | |
2650 | ||
aa140b76 | 2651 | tree block_clear_fn; |
8ca560c1 | 2652 | |
d459e0d8 | 2653 | void |
35cb5232 | 2654 | init_block_clear_fn (const char *asmspec) |
c0bfc78e | 2655 | { |
d459e0d8 | 2656 | if (!block_clear_fn) |
c0bfc78e | 2657 | { |
d459e0d8 | 2658 | tree fn, args; |
2659 | ||
f896c932 | 2660 | fn = get_identifier ("memset"); |
2661 | args = build_function_type_list (ptr_type_node, ptr_type_node, | |
2662 | integer_type_node, sizetype, | |
2663 | NULL_TREE); | |
c0bfc78e | 2664 | |
e60a6f7b | 2665 | fn = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL, fn, args); |
c0bfc78e | 2666 | DECL_EXTERNAL (fn) = 1; |
2667 | TREE_PUBLIC (fn) = 1; | |
2668 | DECL_ARTIFICIAL (fn) = 1; | |
2669 | TREE_NOTHROW (fn) = 1; | |
f0f2eb24 | 2670 | DECL_VISIBILITY (fn) = VISIBILITY_DEFAULT; |
2671 | DECL_VISIBILITY_SPECIFIED (fn) = 1; | |
c0bfc78e | 2672 | |
2673 | block_clear_fn = fn; | |
10f307d9 | 2674 | } |
0dbd1c74 | 2675 | |
d459e0d8 | 2676 | if (asmspec) |
b2c4af5e | 2677 | set_user_assembler_name (block_clear_fn, asmspec); |
d459e0d8 | 2678 | } |
2679 | ||
2680 | static tree | |
35cb5232 | 2681 | clear_storage_libcall_fn (int for_call) |
d459e0d8 | 2682 | { |
2683 | static bool emitted_extern; | |
2684 | ||
2685 | if (!block_clear_fn) | |
2686 | init_block_clear_fn (NULL); | |
2687 | ||
c0bfc78e | 2688 | if (for_call && !emitted_extern) |
2689 | { | |
2690 | emitted_extern = true; | |
b2c4af5e | 2691 | make_decl_rtl (block_clear_fn); |
d459e0d8 | 2692 | assemble_external (block_clear_fn); |
c0bfc78e | 2693 | } |
10f307d9 | 2694 | |
d459e0d8 | 2695 | return block_clear_fn; |
c0bfc78e | 2696 | } |
7a3e5564 | 2697 | \f |
2698 | /* Expand a setmem pattern; return true if successful. */ | |
2699 | ||
2700 | bool | |
162719b3 | 2701 | set_storage_via_setmem (rtx object, rtx size, rtx val, unsigned int align, |
2702 | unsigned int expected_align, HOST_WIDE_INT expected_size) | |
7a3e5564 | 2703 | { |
2704 | /* Try the most limited insn first, because there's no point | |
2705 | including more than one in the machine description unless | |
2706 | the more limited one has some advantage. */ | |
2707 | ||
2708 | rtx opalign = GEN_INT (align / BITS_PER_UNIT); | |
2709 | enum machine_mode mode; | |
2710 | ||
162719b3 | 2711 | if (expected_align < align) |
2712 | expected_align = align; | |
2713 | ||
7a3e5564 | 2714 | for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode; |
2715 | mode = GET_MODE_WIDER_MODE (mode)) | |
2716 | { | |
6b531606 | 2717 | enum insn_code code = direct_optab_handler (setmem_optab, mode); |
7a3e5564 | 2718 | insn_operand_predicate_fn pred; |
2719 | ||
2720 | if (code != CODE_FOR_nothing | |
2721 | /* We don't need MODE to be narrower than | |
2722 | BITS_PER_HOST_WIDE_INT here because if SIZE is less than | |
2723 | the mode mask, as it is returned by the macro, it will | |
2724 | definitely be less than the actual mode mask. */ | |
971ba038 | 2725 | && ((CONST_INT_P (size) |
7a3e5564 | 2726 | && ((unsigned HOST_WIDE_INT) INTVAL (size) |
2727 | <= (GET_MODE_MASK (mode) >> 1))) | |
2728 | || GET_MODE_BITSIZE (mode) >= BITS_PER_WORD) | |
2729 | && ((pred = insn_data[(int) code].operand[0].predicate) == 0 | |
2730 | || (*pred) (object, BLKmode)) | |
2731 | && ((pred = insn_data[(int) code].operand[3].predicate) == 0 | |
2732 | || (*pred) (opalign, VOIDmode))) | |
2733 | { | |
cc0dc0e0 | 2734 | rtx opsize, opchar; |
2735 | enum machine_mode char_mode; | |
7a3e5564 | 2736 | rtx last = get_last_insn (); |
2737 | rtx pat; | |
2738 | ||
2739 | opsize = convert_to_mode (mode, size, 1); | |
2740 | pred = insn_data[(int) code].operand[1].predicate; | |
2741 | if (pred != 0 && ! (*pred) (opsize, mode)) | |
2742 | opsize = copy_to_mode_reg (mode, opsize); | |
1f8b6002 | 2743 | |
cc0dc0e0 | 2744 | opchar = val; |
2745 | char_mode = insn_data[(int) code].operand[2].mode; | |
2746 | if (char_mode != VOIDmode) | |
2747 | { | |
2748 | opchar = convert_to_mode (char_mode, opchar, 1); | |
2749 | pred = insn_data[(int) code].operand[2].predicate; | |
2750 | if (pred != 0 && ! (*pred) (opchar, char_mode)) | |
2751 | opchar = copy_to_mode_reg (char_mode, opchar); | |
2752 | } | |
7a3e5564 | 2753 | |
162719b3 | 2754 | if (insn_data[(int) code].n_operands == 4) |
2755 | pat = GEN_FCN ((int) code) (object, opsize, opchar, opalign); | |
2756 | else | |
2757 | pat = GEN_FCN ((int) code) (object, opsize, opchar, opalign, | |
4e85cee6 | 2758 | GEN_INT (expected_align |
2759 | / BITS_PER_UNIT), | |
162719b3 | 2760 | GEN_INT (expected_size)); |
7a3e5564 | 2761 | if (pat) |
2762 | { | |
2763 | emit_insn (pat); | |
2764 | return true; | |
2765 | } | |
2766 | else | |
2767 | delete_insns_since (last); | |
2768 | } | |
2769 | } | |
2770 | ||
2771 | return false; | |
2772 | } | |
2773 | ||
c0bfc78e | 2774 | \f |
de17a47b | 2775 | /* Write to one of the components of the complex value CPLX. Write VAL to |
2776 | the real part if IMAG_P is false, and the imaginary part if its true. */ | |
10f307d9 | 2777 | |
de17a47b | 2778 | static void |
2779 | write_complex_part (rtx cplx, rtx val, bool imag_p) | |
2780 | { | |
a3b104d2 | 2781 | enum machine_mode cmode; |
2782 | enum machine_mode imode; | |
2783 | unsigned ibitsize; | |
2784 | ||
de17a47b | 2785 | if (GET_CODE (cplx) == CONCAT) |
de17a47b | 2786 | { |
a3b104d2 | 2787 | emit_move_insn (XEXP (cplx, imag_p), val); |
2788 | return; | |
2789 | } | |
2790 | ||
2791 | cmode = GET_MODE (cplx); | |
2792 | imode = GET_MODE_INNER (cmode); | |
2793 | ibitsize = GET_MODE_BITSIZE (imode); | |
10f307d9 | 2794 | |
ba881251 | 2795 | /* For MEMs simplify_gen_subreg may generate an invalid new address |
2796 | because, e.g., the original address is considered mode-dependent | |
2797 | by the target, which restricts simplify_subreg from invoking | |
2798 | adjust_address_nv. Instead of preparing fallback support for an | |
2799 | invalid address, we call adjust_address_nv directly. */ | |
2800 | if (MEM_P (cplx)) | |
69edf651 | 2801 | { |
2802 | emit_move_insn (adjust_address_nv (cplx, imode, | |
2803 | imag_p ? GET_MODE_SIZE (imode) : 0), | |
2804 | val); | |
2805 | return; | |
2806 | } | |
ba881251 | 2807 | |
a3b104d2 | 2808 | /* If the sub-object is at least word sized, then we know that subregging |
2809 | will work. This special case is important, since store_bit_field | |
2810 | wants to operate on integer modes, and there's rarely an OImode to | |
2811 | correspond to TCmode. */ | |
ccd5a3ef | 2812 | if (ibitsize >= BITS_PER_WORD |
2813 | /* For hard regs we have exact predicates. Assume we can split | |
2814 | the original object if it spans an even number of hard regs. | |
2815 | This special case is important for SCmode on 64-bit platforms | |
2816 | where the natural size of floating-point regs is 32-bit. */ | |
1c14a50e | 2817 | || (REG_P (cplx) |
ccd5a3ef | 2818 | && REGNO (cplx) < FIRST_PSEUDO_REGISTER |
ba881251 | 2819 | && hard_regno_nregs[REGNO (cplx)][cmode] % 2 == 0)) |
a3b104d2 | 2820 | { |
2821 | rtx part = simplify_gen_subreg (imode, cplx, cmode, | |
2822 | imag_p ? GET_MODE_SIZE (imode) : 0); | |
ccd5a3ef | 2823 | if (part) |
2824 | { | |
2825 | emit_move_insn (part, val); | |
2826 | return; | |
2827 | } | |
2828 | else | |
2829 | /* simplify_gen_subreg may fail for sub-word MEMs. */ | |
2830 | gcc_assert (MEM_P (cplx) && ibitsize < BITS_PER_WORD); | |
de17a47b | 2831 | } |
ccd5a3ef | 2832 | |
2833 | store_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0, imode, val); | |
de17a47b | 2834 | } |
2835 | ||
2836 | /* Extract one of the components of the complex value CPLX. Extract the | |
2837 | real part if IMAG_P is false, and the imaginary part if it's true. */ | |
2838 | ||
2839 | static rtx | |
2840 | read_complex_part (rtx cplx, bool imag_p) | |
10f307d9 | 2841 | { |
de17a47b | 2842 | enum machine_mode cmode, imode; |
2843 | unsigned ibitsize; | |
10f307d9 | 2844 | |
de17a47b | 2845 | if (GET_CODE (cplx) == CONCAT) |
2846 | return XEXP (cplx, imag_p); | |
10f307d9 | 2847 | |
de17a47b | 2848 | cmode = GET_MODE (cplx); |
2849 | imode = GET_MODE_INNER (cmode); | |
2850 | ibitsize = GET_MODE_BITSIZE (imode); | |
2851 | ||
2852 | /* Special case reads from complex constants that got spilled to memory. */ | |
2853 | if (MEM_P (cplx) && GET_CODE (XEXP (cplx, 0)) == SYMBOL_REF) | |
94580317 | 2854 | { |
de17a47b | 2855 | tree decl = SYMBOL_REF_DECL (XEXP (cplx, 0)); |
2856 | if (decl && TREE_CODE (decl) == COMPLEX_CST) | |
2857 | { | |
2858 | tree part = imag_p ? TREE_IMAGPART (decl) : TREE_REALPART (decl); | |
2859 | if (CONSTANT_CLASS_P (part)) | |
2860 | return expand_expr (part, NULL_RTX, imode, EXPAND_NORMAL); | |
2861 | } | |
2862 | } | |
c0c4a46d | 2863 | |
ba881251 | 2864 | /* For MEMs simplify_gen_subreg may generate an invalid new address |
2865 | because, e.g., the original address is considered mode-dependent | |
2866 | by the target, which restricts simplify_subreg from invoking | |
2867 | adjust_address_nv. Instead of preparing fallback support for an | |
2868 | invalid address, we call adjust_address_nv directly. */ | |
2869 | if (MEM_P (cplx)) | |
2870 | return adjust_address_nv (cplx, imode, | |
2871 | imag_p ? GET_MODE_SIZE (imode) : 0); | |
2872 | ||
a3b104d2 | 2873 | /* If the sub-object is at least word sized, then we know that subregging |
2874 | will work. This special case is important, since extract_bit_field | |
2875 | wants to operate on integer modes, and there's rarely an OImode to | |
2876 | correspond to TCmode. */ | |
ccd5a3ef | 2877 | if (ibitsize >= BITS_PER_WORD |
2878 | /* For hard regs we have exact predicates. Assume we can split | |
2879 | the original object if it spans an even number of hard regs. | |
2880 | This special case is important for SCmode on 64-bit platforms | |
2881 | where the natural size of floating-point regs is 32-bit. */ | |
1c14a50e | 2882 | || (REG_P (cplx) |
ccd5a3ef | 2883 | && REGNO (cplx) < FIRST_PSEUDO_REGISTER |
ba881251 | 2884 | && hard_regno_nregs[REGNO (cplx)][cmode] % 2 == 0)) |
a3b104d2 | 2885 | { |
2886 | rtx ret = simplify_gen_subreg (imode, cplx, cmode, | |
2887 | imag_p ? GET_MODE_SIZE (imode) : 0); | |
ccd5a3ef | 2888 | if (ret) |
2889 | return ret; | |
2890 | else | |
2891 | /* simplify_gen_subreg may fail for sub-word MEMs. */ | |
2892 | gcc_assert (MEM_P (cplx) && ibitsize < BITS_PER_WORD); | |
a3b104d2 | 2893 | } |
2894 | ||
de17a47b | 2895 | return extract_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0, |
8eef3a45 | 2896 | true, false, NULL_RTX, imode, imode); |
de17a47b | 2897 | } |
2898 | \f | |
f2ed60da | 2899 | /* A subroutine of emit_move_insn_1. Yet another lowpart generator. |
df297520 | 2900 | NEW_MODE and OLD_MODE are the same size. Return NULL if X cannot be |
f2ed60da | 2901 | represented in NEW_MODE. If FORCE is true, this will never happen, as |
2902 | we'll force-create a SUBREG if needed. */ | |
6442675c | 2903 | |
de17a47b | 2904 | static rtx |
df297520 | 2905 | emit_move_change_mode (enum machine_mode new_mode, |
f2ed60da | 2906 | enum machine_mode old_mode, rtx x, bool force) |
de17a47b | 2907 | { |
df297520 | 2908 | rtx ret; |
de17a47b | 2909 | |
2749a22e | 2910 | if (push_operand (x, GET_MODE (x))) |
2911 | { | |
2912 | ret = gen_rtx_MEM (new_mode, XEXP (x, 0)); | |
2913 | MEM_COPY_ATTRIBUTES (ret, x); | |
2914 | } | |
2915 | else if (MEM_P (x)) | |
de17a47b | 2916 | { |
d2121072 | 2917 | /* We don't have to worry about changing the address since the |
2918 | size in bytes is supposed to be the same. */ | |
2919 | if (reload_in_progress) | |
2920 | { | |
2921 | /* Copy the MEM to change the mode and move any | |
2922 | substitutions from the old MEM to the new one. */ | |
2923 | ret = adjust_address_nv (x, new_mode, 0); | |
2924 | copy_replacements (x, ret); | |
2925 | } | |
2926 | else | |
2927 | ret = adjust_address (x, new_mode, 0); | |
94580317 | 2928 | } |
de17a47b | 2929 | else |
2930 | { | |
0975351b | 2931 | /* Note that we do want simplify_subreg's behavior of validating |
df297520 | 2932 | that the new mode is ok for a hard register. If we were to use |
2933 | simplify_gen_subreg, we would create the subreg, but would | |
2934 | probably run into the target not being able to implement it. */ | |
f2ed60da | 2935 | /* Except, of course, when FORCE is true, when this is exactly what |
2936 | we want. Which is needed for CCmodes on some targets. */ | |
2937 | if (force) | |
2938 | ret = simplify_gen_subreg (new_mode, x, old_mode, 0); | |
2939 | else | |
2940 | ret = simplify_subreg (new_mode, x, old_mode, 0); | |
de17a47b | 2941 | } |
10f307d9 | 2942 | |
df297520 | 2943 | return ret; |
2944 | } | |
2945 | ||
de17a47b | 2946 | /* A subroutine of emit_move_insn_1. Generate a move from Y into X using |
2947 | an integer mode of the same size as MODE. Returns the instruction | |
2948 | emitted, or NULL if such a move could not be generated. */ | |
10f307d9 | 2949 | |
de17a47b | 2950 | static rtx |
80e467e2 | 2951 | emit_move_via_integer (enum machine_mode mode, rtx x, rtx y, bool force) |
de17a47b | 2952 | { |
2953 | enum machine_mode imode; | |
2954 | enum insn_code code; | |
10f307d9 | 2955 | |
de17a47b | 2956 | /* There must exist a mode of the exact size we require. */ |
2957 | imode = int_mode_for_mode (mode); | |
2958 | if (imode == BLKmode) | |
2959 | return NULL_RTX; | |
94580317 | 2960 | |
de17a47b | 2961 | /* The target must support moves in this mode. */ |
d6bf3b14 | 2962 | code = optab_handler (mov_optab, imode); |
de17a47b | 2963 | if (code == CODE_FOR_nothing) |
2964 | return NULL_RTX; | |
94580317 | 2965 | |
80e467e2 | 2966 | x = emit_move_change_mode (imode, mode, x, force); |
f2ed60da | 2967 | if (x == NULL_RTX) |
2968 | return NULL_RTX; | |
80e467e2 | 2969 | y = emit_move_change_mode (imode, mode, y, force); |
f2ed60da | 2970 | if (y == NULL_RTX) |
2971 | return NULL_RTX; | |
2972 | return emit_insn (GEN_FCN (code) (x, y)); | |
aaad03e5 | 2973 | } |
2974 | ||
de17a47b | 2975 | /* A subroutine of emit_move_insn_1. X is a push_operand in MODE. |
2976 | Return an equivalent MEM that does not use an auto-increment. */ | |
aaad03e5 | 2977 | |
de17a47b | 2978 | static rtx |
2979 | emit_move_resolve_push (enum machine_mode mode, rtx x) | |
aaad03e5 | 2980 | { |
de17a47b | 2981 | enum rtx_code code = GET_CODE (XEXP (x, 0)); |
2982 | HOST_WIDE_INT adjust; | |
2983 | rtx temp; | |
aaad03e5 | 2984 | |
de17a47b | 2985 | adjust = GET_MODE_SIZE (mode); |
2986 | #ifdef PUSH_ROUNDING | |
2987 | adjust = PUSH_ROUNDING (adjust); | |
2988 | #endif | |
2989 | if (code == PRE_DEC || code == POST_DEC) | |
2990 | adjust = -adjust; | |
3cb7a129 | 2991 | else if (code == PRE_MODIFY || code == POST_MODIFY) |
2992 | { | |
2993 | rtx expr = XEXP (XEXP (x, 0), 1); | |
2994 | HOST_WIDE_INT val; | |
2995 | ||
2996 | gcc_assert (GET_CODE (expr) == PLUS || GET_CODE (expr) == MINUS); | |
971ba038 | 2997 | gcc_assert (CONST_INT_P (XEXP (expr, 1))); |
3cb7a129 | 2998 | val = INTVAL (XEXP (expr, 1)); |
2999 | if (GET_CODE (expr) == MINUS) | |
3000 | val = -val; | |
3001 | gcc_assert (adjust == val || adjust == -val); | |
3002 | adjust = val; | |
3003 | } | |
1203f673 | 3004 | |
de17a47b | 3005 | /* Do not use anti_adjust_stack, since we don't want to update |
3006 | stack_pointer_delta. */ | |
3007 | temp = expand_simple_binop (Pmode, PLUS, stack_pointer_rtx, | |
3008 | GEN_INT (adjust), stack_pointer_rtx, | |
3009 | 0, OPTAB_LIB_WIDEN); | |
3010 | if (temp != stack_pointer_rtx) | |
3011 | emit_move_insn (stack_pointer_rtx, temp); | |
10f307d9 | 3012 | |
de17a47b | 3013 | switch (code) |
b63679d2 | 3014 | { |
de17a47b | 3015 | case PRE_INC: |
3016 | case PRE_DEC: | |
3cb7a129 | 3017 | case PRE_MODIFY: |
de17a47b | 3018 | temp = stack_pointer_rtx; |
3019 | break; | |
3020 | case POST_INC: | |
de17a47b | 3021 | case POST_DEC: |
3cb7a129 | 3022 | case POST_MODIFY: |
3023 | temp = plus_constant (stack_pointer_rtx, -adjust); | |
de17a47b | 3024 | break; |
3025 | default: | |
3026 | gcc_unreachable (); | |
3027 | } | |
b63679d2 | 3028 | |
de17a47b | 3029 | return replace_equiv_address (x, temp); |
3030 | } | |
a8d8b962 | 3031 | |
de17a47b | 3032 | /* A subroutine of emit_move_complex. Generate a move from Y into X. |
3033 | X is known to satisfy push_operand, and MODE is known to be complex. | |
3034 | Returns the last instruction emitted. */ | |
76ab50f8 | 3035 | |
64003036 | 3036 | rtx |
de17a47b | 3037 | emit_move_complex_push (enum machine_mode mode, rtx x, rtx y) |
3038 | { | |
3039 | enum machine_mode submode = GET_MODE_INNER (mode); | |
3040 | bool imag_first; | |
76ab50f8 | 3041 | |
de17a47b | 3042 | #ifdef PUSH_ROUNDING |
3043 | unsigned int submodesize = GET_MODE_SIZE (submode); | |
76ab50f8 | 3044 | |
de17a47b | 3045 | /* In case we output to the stack, but the size is smaller than the |
3046 | machine can push exactly, we need to use move instructions. */ | |
3047 | if (PUSH_ROUNDING (submodesize) != submodesize) | |
3048 | { | |
3049 | x = emit_move_resolve_push (mode, x); | |
3050 | return emit_move_insn (x, y); | |
3051 | } | |
4ed008e7 | 3052 | #endif |
b63679d2 | 3053 | |
de17a47b | 3054 | /* Note that the real part always precedes the imag part in memory |
3055 | regardless of machine's endianness. */ | |
3056 | switch (GET_CODE (XEXP (x, 0))) | |
3057 | { | |
3058 | case PRE_DEC: | |
3059 | case POST_DEC: | |
3060 | imag_first = true; | |
3061 | break; | |
3062 | case PRE_INC: | |
3063 | case POST_INC: | |
3064 | imag_first = false; | |
3065 | break; | |
3066 | default: | |
3067 | gcc_unreachable (); | |
3068 | } | |
2166bbaa | 3069 | |
de17a47b | 3070 | emit_move_insn (gen_rtx_MEM (submode, XEXP (x, 0)), |
3071 | read_complex_part (y, imag_first)); | |
3072 | return emit_move_insn (gen_rtx_MEM (submode, XEXP (x, 0)), | |
3073 | read_complex_part (y, !imag_first)); | |
3074 | } | |
5b5abf88 | 3075 | |
64003036 | 3076 | /* A subroutine of emit_move_complex. Perform the move from Y to X |
3077 | via two moves of the parts. Returns the last instruction emitted. */ | |
3078 | ||
3079 | rtx | |
3080 | emit_move_complex_parts (rtx x, rtx y) | |
3081 | { | |
3082 | /* Show the output dies here. This is necessary for SUBREGs | |
3083 | of pseudos since we cannot track their lifetimes correctly; | |
3084 | hard regs shouldn't appear here except as return values. */ | |
3085 | if (!reload_completed && !reload_in_progress | |
3086 | && REG_P (x) && !reg_overlap_mentioned_p (x, y)) | |
18b42941 | 3087 | emit_clobber (x); |
64003036 | 3088 | |
3089 | write_complex_part (x, read_complex_part (y, false), false); | |
3090 | write_complex_part (x, read_complex_part (y, true), true); | |
3091 | ||
3092 | return get_last_insn (); | |
3093 | } | |
3094 | ||
de17a47b | 3095 | /* A subroutine of emit_move_insn_1. Generate a move from Y into X. |
3096 | MODE is known to be complex. Returns the last instruction emitted. */ | |
2166bbaa | 3097 | |
de17a47b | 3098 | static rtx |
3099 | emit_move_complex (enum machine_mode mode, rtx x, rtx y) | |
3100 | { | |
3101 | bool try_int; | |
5b5abf88 | 3102 | |
de17a47b | 3103 | /* Need to take special care for pushes, to maintain proper ordering |
3104 | of the data, and possibly extra padding. */ | |
3105 | if (push_operand (x, mode)) | |
3106 | return emit_move_complex_push (mode, x, y); | |
b63679d2 | 3107 | |
de17a47b | 3108 | /* See if we can coerce the target into moving both values at once. */ |
3109 | ||
5720e0a5 | 3110 | /* Move floating point as parts. */ |
3111 | if (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT | |
d6bf3b14 | 3112 | && optab_handler (mov_optab, GET_MODE_INNER (mode)) != CODE_FOR_nothing) |
5720e0a5 | 3113 | try_int = false; |
de17a47b | 3114 | /* Not possible if the values are inherently not adjacent. */ |
5720e0a5 | 3115 | else if (GET_CODE (x) == CONCAT || GET_CODE (y) == CONCAT) |
de17a47b | 3116 | try_int = false; |
3117 | /* Is possible if both are registers (or subregs of registers). */ | |
3118 | else if (register_operand (x, mode) && register_operand (y, mode)) | |
3119 | try_int = true; | |
3120 | /* If one of the operands is a memory, and alignment constraints | |
3121 | are friendly enough, we may be able to do combined memory operations. | |
3122 | We do not attempt this if Y is a constant because that combination is | |
3123 | usually better with the by-parts thing below. */ | |
3124 | else if ((MEM_P (x) ? !CONSTANT_P (y) : MEM_P (y)) | |
3125 | && (!STRICT_ALIGNMENT | |
3126 | || get_mode_alignment (mode) == BIGGEST_ALIGNMENT)) | |
3127 | try_int = true; | |
3128 | else | |
3129 | try_int = false; | |
3130 | ||
3131 | if (try_int) | |
8d94ba7c | 3132 | { |
5720e0a5 | 3133 | rtx ret; |
3134 | ||
3135 | /* For memory to memory moves, optimal behavior can be had with the | |
3136 | existing block move logic. */ | |
3137 | if (MEM_P (x) && MEM_P (y)) | |
3138 | { | |
3139 | emit_block_move (x, y, GEN_INT (GET_MODE_SIZE (mode)), | |
3140 | BLOCK_OP_NO_LIBCALL); | |
3141 | return get_last_insn (); | |
3142 | } | |
3143 | ||
80e467e2 | 3144 | ret = emit_move_via_integer (mode, x, y, true); |
de17a47b | 3145 | if (ret) |
3146 | return ret; | |
3147 | } | |
8d94ba7c | 3148 | |
64003036 | 3149 | return emit_move_complex_parts (x, y); |
de17a47b | 3150 | } |
8d94ba7c | 3151 | |
de17a47b | 3152 | /* A subroutine of emit_move_insn_1. Generate a move from Y into X. |
3153 | MODE is known to be MODE_CC. Returns the last instruction emitted. */ | |
8d94ba7c | 3154 | |
de17a47b | 3155 | static rtx |
3156 | emit_move_ccmode (enum machine_mode mode, rtx x, rtx y) | |
3157 | { | |
3158 | rtx ret; | |
8d94ba7c | 3159 | |
de17a47b | 3160 | /* Assume all MODE_CC modes are equivalent; if we have movcc, use it. */ |
3161 | if (mode != CCmode) | |
3162 | { | |
d6bf3b14 | 3163 | enum insn_code code = optab_handler (mov_optab, CCmode); |
de17a47b | 3164 | if (code != CODE_FOR_nothing) |
f2ed60da | 3165 | { |
3166 | x = emit_move_change_mode (CCmode, mode, x, true); | |
3167 | y = emit_move_change_mode (CCmode, mode, y, true); | |
3168 | return emit_insn (GEN_FCN (code) (x, y)); | |
3169 | } | |
de17a47b | 3170 | } |
3171 | ||
3172 | /* Otherwise, find the MODE_INT mode of the same width. */ | |
80e467e2 | 3173 | ret = emit_move_via_integer (mode, x, y, false); |
de17a47b | 3174 | gcc_assert (ret != NULL); |
3175 | return ret; | |
3176 | } | |
3177 | ||
8dfa1b7f | 3178 | /* Return true if word I of OP lies entirely in the |
3179 | undefined bits of a paradoxical subreg. */ | |
3180 | ||
3181 | static bool | |
1f1872fd | 3182 | undefined_operand_subword_p (const_rtx op, int i) |
8dfa1b7f | 3183 | { |
3184 | enum machine_mode innermode, innermostmode; | |
3185 | int offset; | |
3186 | if (GET_CODE (op) != SUBREG) | |
3187 | return false; | |
3188 | innermode = GET_MODE (op); | |
3189 | innermostmode = GET_MODE (SUBREG_REG (op)); | |
3190 | offset = i * UNITS_PER_WORD + SUBREG_BYTE (op); | |
3191 | /* The SUBREG_BYTE represents offset, as if the value were stored in | |
3192 | memory, except for a paradoxical subreg where we define | |
3193 | SUBREG_BYTE to be 0; undo this exception as in | |
3194 | simplify_subreg. */ | |
3195 | if (SUBREG_BYTE (op) == 0 | |
3196 | && GET_MODE_SIZE (innermostmode) < GET_MODE_SIZE (innermode)) | |
3197 | { | |
3198 | int difference = (GET_MODE_SIZE (innermostmode) - GET_MODE_SIZE (innermode)); | |
3199 | if (WORDS_BIG_ENDIAN) | |
3200 | offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD; | |
3201 | if (BYTES_BIG_ENDIAN) | |
3202 | offset += difference % UNITS_PER_WORD; | |
3203 | } | |
3204 | if (offset >= GET_MODE_SIZE (innermostmode) | |
3205 | || offset <= -GET_MODE_SIZE (word_mode)) | |
3206 | return true; | |
3207 | return false; | |
3208 | } | |
3209 | ||
de17a47b | 3210 | /* A subroutine of emit_move_insn_1. Generate a move from Y into X. |
3211 | MODE is any multi-word or full-word mode that lacks a move_insn | |
3212 | pattern. Note that you will get better code if you define such | |
3213 | patterns, even if they must turn into multiple assembler instructions. */ | |
3214 | ||
3215 | static rtx | |
3216 | emit_move_multi_word (enum machine_mode mode, rtx x, rtx y) | |
3217 | { | |
3218 | rtx last_insn = 0; | |
3219 | rtx seq, inner; | |
3220 | bool need_clobber; | |
3221 | int i; | |
1f8b6002 | 3222 | |
de17a47b | 3223 | gcc_assert (GET_MODE_SIZE (mode) >= UNITS_PER_WORD); |
1f8b6002 | 3224 | |
de17a47b | 3225 | /* If X is a push on the stack, do the push now and replace |
3226 | X with a reference to the stack pointer. */ | |
3227 | if (push_operand (x, mode)) | |
3228 | x = emit_move_resolve_push (mode, x); | |
3229 | ||
3230 | /* If we are in reload, see if either operand is a MEM whose address | |
3231 | is scheduled for replacement. */ | |
3232 | if (reload_in_progress && MEM_P (x) | |
3233 | && (inner = find_replacement (&XEXP (x, 0))) != XEXP (x, 0)) | |
3234 | x = replace_equiv_address_nv (x, inner); | |
3235 | if (reload_in_progress && MEM_P (y) | |
3236 | && (inner = find_replacement (&XEXP (y, 0))) != XEXP (y, 0)) | |
3237 | y = replace_equiv_address_nv (y, inner); | |
3238 | ||
3239 | start_sequence (); | |
3240 | ||
3241 | need_clobber = false; | |
3242 | for (i = 0; | |
3243 | i < (GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD; | |
3244 | i++) | |
3245 | { | |
3246 | rtx xpart = operand_subword (x, i, 1, mode); | |
8dfa1b7f | 3247 | rtx ypart; |
3248 | ||
3249 | /* Do not generate code for a move if it would come entirely | |
3250 | from the undefined bits of a paradoxical subreg. */ | |
3251 | if (undefined_operand_subword_p (y, i)) | |
3252 | continue; | |
3253 | ||
3254 | ypart = operand_subword (y, i, 1, mode); | |
de17a47b | 3255 | |
3256 | /* If we can't get a part of Y, put Y into memory if it is a | |
89f18f73 | 3257 | constant. Otherwise, force it into a register. Then we must |
3258 | be able to get a part of Y. */ | |
de17a47b | 3259 | if (ypart == 0 && CONSTANT_P (y)) |
8d94ba7c | 3260 | { |
f2d0e9f1 | 3261 | y = use_anchored_address (force_const_mem (mode, y)); |
de17a47b | 3262 | ypart = operand_subword (y, i, 1, mode); |
8d94ba7c | 3263 | } |
de17a47b | 3264 | else if (ypart == 0) |
3265 | ypart = operand_subword_force (y, i, mode); | |
3266 | ||
3267 | gcc_assert (xpart && ypart); | |
3268 | ||
3269 | need_clobber |= (GET_CODE (xpart) == SUBREG); | |
35cb5232 | 3270 | |
de17a47b | 3271 | last_insn = emit_move_insn (xpart, ypart); |
8d94ba7c | 3272 | } |
3273 | ||
de17a47b | 3274 | seq = get_insns (); |
3275 | end_sequence (); | |
3276 | ||
3277 | /* Show the output dies here. This is necessary for SUBREGs | |
3278 | of pseudos since we cannot track their lifetimes correctly; | |
3279 | hard regs shouldn't appear here except as return values. | |
3280 | We never want to emit such a clobber after reload. */ | |
3281 | if (x != y | |
3282 | && ! (reload_in_progress || reload_completed) | |
3283 | && need_clobber != 0) | |
18b42941 | 3284 | emit_clobber (x); |
de17a47b | 3285 | |
3286 | emit_insn (seq); | |
3287 | ||
3288 | return last_insn; | |
3289 | } | |
3290 | ||
3291 | /* Low level part of emit_move_insn. | |
3292 | Called just like emit_move_insn, but assumes X and Y | |
3293 | are basically valid. */ | |
3294 | ||
3295 | rtx | |
3296 | emit_move_insn_1 (rtx x, rtx y) | |
3297 | { | |
3298 | enum machine_mode mode = GET_MODE (x); | |
3299 | enum insn_code code; | |
3300 | ||
3301 | gcc_assert ((unsigned int) mode < (unsigned int) MAX_MACHINE_MODE); | |
3302 | ||
d6bf3b14 | 3303 | code = optab_handler (mov_optab, mode); |
de17a47b | 3304 | if (code != CODE_FOR_nothing) |
3305 | return emit_insn (GEN_FCN (code) (x, y)); | |
3306 | ||
3307 | /* Expand complex moves by moving real part and imag part. */ | |
3308 | if (COMPLEX_MODE_P (mode)) | |
3309 | return emit_move_complex (mode, x, y); | |
3310 | ||
68a556d6 | 3311 | if (GET_MODE_CLASS (mode) == MODE_DECIMAL_FLOAT |
3312 | || ALL_FIXED_POINT_MODE_P (mode)) | |
d2121072 | 3313 | { |
3314 | rtx result = emit_move_via_integer (mode, x, y, true); | |
3315 | ||
3316 | /* If we can't find an integer mode, use multi words. */ | |
3317 | if (result) | |
3318 | return result; | |
3319 | else | |
3320 | return emit_move_multi_word (mode, x, y); | |
3321 | } | |
3322 | ||
de17a47b | 3323 | if (GET_MODE_CLASS (mode) == MODE_CC) |
3324 | return emit_move_ccmode (mode, x, y); | |
3325 | ||
7be9cf34 | 3326 | /* Try using a move pattern for the corresponding integer mode. This is |
3327 | only safe when simplify_subreg can convert MODE constants into integer | |
3328 | constants. At present, it can only do this reliably if the value | |
3329 | fits within a HOST_WIDE_INT. */ | |
de17a47b | 3330 | if (!CONSTANT_P (y) || GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT) |
10f307d9 | 3331 | { |
80e467e2 | 3332 | rtx ret = emit_move_via_integer (mode, x, y, false); |
de17a47b | 3333 | if (ret) |
3334 | return ret; | |
3335 | } | |
ff385626 | 3336 | |
de17a47b | 3337 | return emit_move_multi_word (mode, x, y); |
3338 | } | |
07c143fb | 3339 | |
de17a47b | 3340 | /* Generate code to copy Y into X. |
3341 | Both Y and X must have the same mode, except that | |
3342 | Y can be a constant with VOIDmode. | |
3343 | This mode cannot be BLKmode; use emit_block_move for that. | |
fa56dc1d | 3344 | |
de17a47b | 3345 | Return the last instruction emitted. */ |
6702c250 | 3346 | |
de17a47b | 3347 | rtx |
3348 | emit_move_insn (rtx x, rtx y) | |
3349 | { | |
3350 | enum machine_mode mode = GET_MODE (x); | |
3351 | rtx y_cst = NULL_RTX; | |
3352 | rtx last_insn, set; | |
9cb64ebc | 3353 | |
de17a47b | 3354 | gcc_assert (mode != BLKmode |
3355 | && (GET_MODE (y) == mode || GET_MODE (y) == VOIDmode)); | |
10f307d9 | 3356 | |
de17a47b | 3357 | if (CONSTANT_P (y)) |
3358 | { | |
3359 | if (optimize | |
3360 | && SCALAR_FLOAT_MODE_P (GET_MODE (x)) | |
3361 | && (last_insn = compress_float_constant (x, y))) | |
3362 | return last_insn; | |
10f307d9 | 3363 | |
de17a47b | 3364 | y_cst = y; |
10f307d9 | 3365 | |
de17a47b | 3366 | if (!LEGITIMATE_CONSTANT_P (y)) |
3367 | { | |
3368 | y = force_const_mem (mode, y); | |
7f964718 | 3369 | |
de17a47b | 3370 | /* If the target's cannot_force_const_mem prevented the spill, |
3371 | assume that the target's move expanders will also take care | |
3372 | of the non-legitimate constant. */ | |
3373 | if (!y) | |
3374 | y = y_cst; | |
f2d0e9f1 | 3375 | else |
3376 | y = use_anchored_address (y); | |
10f307d9 | 3377 | } |
de17a47b | 3378 | } |
dd0d17cd | 3379 | |
de17a47b | 3380 | /* If X or Y are memory references, verify that their addresses are valid |
3381 | for the machine. */ | |
3382 | if (MEM_P (x) | |
bd1a81f7 | 3383 | && (! memory_address_addr_space_p (GET_MODE (x), XEXP (x, 0), |
3384 | MEM_ADDR_SPACE (x)) | |
4d25f9eb | 3385 | && ! push_operand (x, GET_MODE (x)))) |
de17a47b | 3386 | x = validize_mem (x); |
7f964718 | 3387 | |
de17a47b | 3388 | if (MEM_P (y) |
bd1a81f7 | 3389 | && ! memory_address_addr_space_p (GET_MODE (y), XEXP (y, 0), |
3390 | MEM_ADDR_SPACE (y))) | |
de17a47b | 3391 | y = validize_mem (y); |
7f964718 | 3392 | |
de17a47b | 3393 | gcc_assert (mode != BLKmode); |
7f964718 | 3394 | |
de17a47b | 3395 | last_insn = emit_move_insn_1 (x, y); |
3396 | ||
3397 | if (y_cst && REG_P (x) | |
3398 | && (set = single_set (last_insn)) != NULL_RTX | |
3399 | && SET_DEST (set) == x | |
3400 | && ! rtx_equal_p (y_cst, SET_SRC (set))) | |
722c0f6e | 3401 | set_unique_reg_note (last_insn, REG_EQUAL, copy_rtx (y_cst)); |
de17a47b | 3402 | |
3403 | return last_insn; | |
10f307d9 | 3404 | } |
c0c4a46d | 3405 | |
3406 | /* If Y is representable exactly in a narrower mode, and the target can | |
3407 | perform the extension directly from constant or memory, then emit the | |
3408 | move as an extension. */ | |
3409 | ||
3410 | static rtx | |
35cb5232 | 3411 | compress_float_constant (rtx x, rtx y) |
c0c4a46d | 3412 | { |
3413 | enum machine_mode dstmode = GET_MODE (x); | |
3414 | enum machine_mode orig_srcmode = GET_MODE (y); | |
3415 | enum machine_mode srcmode; | |
3416 | REAL_VALUE_TYPE r; | |
8b1bf1e9 | 3417 | int oldcost, newcost; |
f529eb25 | 3418 | bool speed = optimize_insn_for_speed_p (); |
c0c4a46d | 3419 | |
3420 | REAL_VALUE_FROM_CONST_DOUBLE (r, y); | |
3421 | ||
8b1bf1e9 | 3422 | if (LEGITIMATE_CONSTANT_P (y)) |
f529eb25 | 3423 | oldcost = rtx_cost (y, SET, speed); |
8b1bf1e9 | 3424 | else |
f529eb25 | 3425 | oldcost = rtx_cost (force_const_mem (dstmode, y), SET, speed); |
8b1bf1e9 | 3426 | |
c0c4a46d | 3427 | for (srcmode = GET_CLASS_NARROWEST_MODE (GET_MODE_CLASS (orig_srcmode)); |
3428 | srcmode != orig_srcmode; | |
3429 | srcmode = GET_MODE_WIDER_MODE (srcmode)) | |
3430 | { | |
3431 | enum insn_code ic; | |
3432 | rtx trunc_y, last_insn; | |
3433 | ||
3434 | /* Skip if the target can't extend this way. */ | |
3435 | ic = can_extend_p (dstmode, srcmode, 0); | |
3436 | if (ic == CODE_FOR_nothing) | |
3437 | continue; | |
3438 | ||
3439 | /* Skip if the narrowed value isn't exact. */ | |
3440 | if (! exact_real_truncate (srcmode, &r)) | |
3441 | continue; | |
3442 | ||
3443 | trunc_y = CONST_DOUBLE_FROM_REAL_VALUE (r, srcmode); | |
3444 | ||
3445 | if (LEGITIMATE_CONSTANT_P (trunc_y)) | |
3446 | { | |
3447 | /* Skip if the target needs extra instructions to perform | |
3448 | the extension. */ | |
39c56a89 | 3449 | if (!insn_operand_matches (ic, 1, trunc_y)) |
c0c4a46d | 3450 | continue; |
8b1bf1e9 | 3451 | /* This is valid, but may not be cheaper than the original. */ |
f529eb25 | 3452 | newcost = rtx_cost (gen_rtx_FLOAT_EXTEND (dstmode, trunc_y), SET, speed); |
8b1bf1e9 | 3453 | if (oldcost < newcost) |
3454 | continue; | |
c0c4a46d | 3455 | } |
3456 | else if (float_extend_from_mem[dstmode][srcmode]) | |
8b1bf1e9 | 3457 | { |
3458 | trunc_y = force_const_mem (srcmode, trunc_y); | |
3459 | /* This is valid, but may not be cheaper than the original. */ | |
f529eb25 | 3460 | newcost = rtx_cost (gen_rtx_FLOAT_EXTEND (dstmode, trunc_y), SET, speed); |
8b1bf1e9 | 3461 | if (oldcost < newcost) |
3462 | continue; | |
3463 | trunc_y = validize_mem (trunc_y); | |
3464 | } | |
c0c4a46d | 3465 | else |
3466 | continue; | |
3220d3c5 | 3467 | |
3468 | /* For CSE's benefit, force the compressed constant pool entry | |
3469 | into a new pseudo. This constant may be used in different modes, | |
3470 | and if not, combine will put things back together for us. */ | |
3471 | trunc_y = force_reg (srcmode, trunc_y); | |
c0c4a46d | 3472 | emit_unop_insn (ic, x, trunc_y, UNKNOWN); |
3473 | last_insn = get_last_insn (); | |
3474 | ||
8ad4c111 | 3475 | if (REG_P (x)) |
6442675c | 3476 | set_unique_reg_note (last_insn, REG_EQUAL, y); |
c0c4a46d | 3477 | |
3478 | return last_insn; | |
3479 | } | |
3480 | ||
3481 | return NULL_RTX; | |
3482 | } | |
10f307d9 | 3483 | \f |
3484 | /* Pushing data onto the stack. */ | |
3485 | ||
3486 | /* Push a block of length SIZE (perhaps variable) | |
3487 | and return an rtx to address the beginning of the block. | |
10f307d9 | 3488 | The value may be virtual_outgoing_args_rtx. |
3489 | ||
3490 | EXTRA is the number of bytes of padding to push in addition to SIZE. | |
3491 | BELOW nonzero means this padding comes at low addresses; | |
3492 | otherwise, the padding comes at high addresses. */ | |
3493 | ||
3494 | rtx | |
35cb5232 | 3495 | push_block (rtx size, int extra, int below) |
10f307d9 | 3496 | { |
19cb6b50 | 3497 | rtx temp; |
ed8d3eee | 3498 | |
3499 | size = convert_modes (Pmode, ptr_mode, size, 1); | |
10f307d9 | 3500 | if (CONSTANT_P (size)) |
3501 | anti_adjust_stack (plus_constant (size, extra)); | |
8ad4c111 | 3502 | else if (REG_P (size) && extra == 0) |
10f307d9 | 3503 | anti_adjust_stack (size); |
3504 | else | |
3505 | { | |
481feae3 | 3506 | temp = copy_to_mode_reg (Pmode, size); |
10f307d9 | 3507 | if (extra != 0) |
b572011e | 3508 | temp = expand_binop (Pmode, add_optab, temp, GEN_INT (extra), |
10f307d9 | 3509 | temp, 0, OPTAB_LIB_WIDEN); |
3510 | anti_adjust_stack (temp); | |
3511 | } | |
3512 | ||
4448f543 | 3513 | #ifndef STACK_GROWS_DOWNWARD |
4448f543 | 3514 | if (0) |
4448f543 | 3515 | #else |
3516 | if (1) | |
10f307d9 | 3517 | #endif |
4448f543 | 3518 | { |
4448f543 | 3519 | temp = virtual_outgoing_args_rtx; |
3520 | if (extra != 0 && below) | |
3521 | temp = plus_constant (temp, extra); | |
3522 | } | |
3523 | else | |
3524 | { | |
971ba038 | 3525 | if (CONST_INT_P (size)) |
4448f543 | 3526 | temp = plus_constant (virtual_outgoing_args_rtx, |
fa56dc1d | 3527 | -INTVAL (size) - (below ? 0 : extra)); |
4448f543 | 3528 | else if (extra != 0 && !below) |
3529 | temp = gen_rtx_PLUS (Pmode, virtual_outgoing_args_rtx, | |
f7c44134 | 3530 | negate_rtx (Pmode, plus_constant (size, extra))); |
4448f543 | 3531 | else |
3532 | temp = gen_rtx_PLUS (Pmode, virtual_outgoing_args_rtx, | |
3533 | negate_rtx (Pmode, size)); | |
3534 | } | |
10f307d9 | 3535 | |
3536 | return memory_address (GET_CLASS_NARROWEST_MODE (MODE_INT), temp); | |
3537 | } | |
3538 | ||
fad4a30c | 3539 | #ifdef PUSH_ROUNDING |
3540 | ||
ef7dc4b4 | 3541 | /* Emit single push insn. */ |
fad4a30c | 3542 | |
ef7dc4b4 | 3543 | static void |
35cb5232 | 3544 | emit_single_push_insn (enum machine_mode mode, rtx x, tree type) |
ef7dc4b4 | 3545 | { |
ef7dc4b4 | 3546 | rtx dest_addr; |
07c143fb | 3547 | unsigned rounded_size = PUSH_ROUNDING (GET_MODE_SIZE (mode)); |
ef7dc4b4 | 3548 | rtx dest; |
675b92cc | 3549 | enum insn_code icode; |
3550 | insn_operand_predicate_fn pred; | |
ef7dc4b4 | 3551 | |
675b92cc | 3552 | stack_pointer_delta += PUSH_ROUNDING (GET_MODE_SIZE (mode)); |
3553 | /* If there is push pattern, use it. Otherwise try old way of throwing | |
3554 | MEM representing push operation to move expander. */ | |
d6bf3b14 | 3555 | icode = optab_handler (push_optab, mode); |
675b92cc | 3556 | if (icode != CODE_FOR_nothing) |
3557 | { | |
3558 | if (((pred = insn_data[(int) icode].operand[0].predicate) | |
e17f5b23 | 3559 | && !((*pred) (x, mode)))) |
675b92cc | 3560 | x = force_reg (mode, x); |
3561 | emit_insn (GEN_FCN (icode) (x)); | |
3562 | return; | |
3563 | } | |
ef7dc4b4 | 3564 | if (GET_MODE_SIZE (mode) == rounded_size) |
3565 | dest_addr = gen_rtx_fmt_e (STACK_PUSH_CODE, Pmode, stack_pointer_rtx); | |
20e1fca5 | 3566 | /* If we are to pad downward, adjust the stack pointer first and |
3567 | then store X into the stack location using an offset. This is | |
3568 | because emit_move_insn does not know how to pad; it does not have | |
3569 | access to type. */ | |
3570 | else if (FUNCTION_ARG_PADDING (mode, type) == downward) | |
3571 | { | |
3572 | unsigned padding_size = rounded_size - GET_MODE_SIZE (mode); | |
3573 | HOST_WIDE_INT offset; | |
3574 | ||
3575 | emit_move_insn (stack_pointer_rtx, | |
3576 | expand_binop (Pmode, | |
3577 | #ifdef STACK_GROWS_DOWNWARD | |
3578 | sub_optab, | |
3579 | #else | |
3580 | add_optab, | |
3581 | #endif | |
3582 | stack_pointer_rtx, | |
3583 | GEN_INT (rounded_size), | |
3584 | NULL_RTX, 0, OPTAB_LIB_WIDEN)); | |
3585 | ||
3586 | offset = (HOST_WIDE_INT) padding_size; | |
3587 | #ifdef STACK_GROWS_DOWNWARD | |
3588 | if (STACK_PUSH_CODE == POST_DEC) | |
3589 | /* We have already decremented the stack pointer, so get the | |
3590 | previous value. */ | |
3591 | offset += (HOST_WIDE_INT) rounded_size; | |
3592 | #else | |
3593 | if (STACK_PUSH_CODE == POST_INC) | |
3594 | /* We have already incremented the stack pointer, so get the | |
3595 | previous value. */ | |
3596 | offset -= (HOST_WIDE_INT) rounded_size; | |
3597 | #endif | |
3598 | dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx, GEN_INT (offset)); | |
3599 | } | |
ef7dc4b4 | 3600 | else |
3601 | { | |
3602 | #ifdef STACK_GROWS_DOWNWARD | |
20e1fca5 | 3603 | /* ??? This seems wrong if STACK_PUSH_CODE == POST_DEC. */ |
ef7dc4b4 | 3604 | dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx, |
e17f5b23 | 3605 | GEN_INT (-(HOST_WIDE_INT) rounded_size)); |
ef7dc4b4 | 3606 | #else |
20e1fca5 | 3607 | /* ??? This seems wrong if STACK_PUSH_CODE == POST_INC. */ |
ef7dc4b4 | 3608 | dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx, |
3609 | GEN_INT (rounded_size)); | |
3610 | #endif | |
3611 | dest_addr = gen_rtx_PRE_MODIFY (Pmode, stack_pointer_rtx, dest_addr); | |
3612 | } | |
3613 | ||
3614 | dest = gen_rtx_MEM (mode, dest_addr); | |
3615 | ||
ef7dc4b4 | 3616 | if (type != 0) |
3617 | { | |
3618 | set_mem_attributes (dest, type, 1); | |
a9d9ab08 | 3619 | |
3620 | if (flag_optimize_sibling_calls) | |
3621 | /* Function incoming arguments may overlap with sibling call | |
3622 | outgoing arguments and we cannot allow reordering of reads | |
3623 | from function arguments with stores to outgoing arguments | |
3624 | of sibling calls. */ | |
3625 | set_mem_alias_set (dest, 0); | |
ef7dc4b4 | 3626 | } |
3627 | emit_move_insn (dest, x); | |
ef7dc4b4 | 3628 | } |
fad4a30c | 3629 | #endif |
ef7dc4b4 | 3630 | |
10f307d9 | 3631 | /* Generate code to push X onto the stack, assuming it has mode MODE and |
3632 | type TYPE. | |
3633 | MODE is redundant except when X is a CONST_INT (since they don't | |
3634 | carry mode info). | |
3635 | SIZE is an rtx for the size of data to be copied (in bytes), | |
3636 | needed only if X is BLKmode. | |
3637 | ||
decd7a45 | 3638 | ALIGN (in bits) is maximum alignment we can assume. |
10f307d9 | 3639 | |
a984cc1e | 3640 | If PARTIAL and REG are both nonzero, then copy that many of the first |
f054eb3c | 3641 | bytes of X into registers starting with REG, and push the rest of X. |
3642 | The amount of space pushed is decreased by PARTIAL bytes. | |
10f307d9 | 3643 | REG must be a hard register in this case. |
a984cc1e | 3644 | If REG is zero but PARTIAL is not, take any all others actions for an |
3645 | argument partially in registers, but do not actually load any | |
3646 | registers. | |
10f307d9 | 3647 | |
3648 | EXTRA is the amount in bytes of extra space to leave next to this arg. | |
4bbea254 | 3649 | This is ignored if an argument block has already been allocated. |
10f307d9 | 3650 | |
3651 | On a machine that lacks real push insns, ARGS_ADDR is the address of | |
3652 | the bottom of the argument block for this call. We use indexing off there | |
3653 | to store the arg. On machines with push insns, ARGS_ADDR is 0 when a | |
3654 | argument block has not been preallocated. | |
3655 | ||
997d68fe | 3656 | ARGS_SO_FAR is the size of args previously pushed for this call. |
3657 | ||
3658 | REG_PARM_STACK_SPACE is nonzero if functions require stack space | |
3659 | for arguments passed in registers. If nonzero, it will be the number | |
3660 | of bytes required. */ | |
10f307d9 | 3661 | |
3662 | void | |
35cb5232 | 3663 | emit_push_insn (rtx x, enum machine_mode mode, tree type, rtx size, |
3664 | unsigned int align, int partial, rtx reg, int extra, | |
3665 | rtx args_addr, rtx args_so_far, int reg_parm_stack_space, | |
3666 | rtx alignment_pad) | |
10f307d9 | 3667 | { |
3668 | rtx xinner; | |
3669 | enum direction stack_direction | |
3670 | #ifdef STACK_GROWS_DOWNWARD | |
3671 | = downward; | |
3672 | #else | |
3673 | = upward; | |
3674 | #endif | |
3675 | ||
3676 | /* Decide where to pad the argument: `downward' for below, | |
3677 | `upward' for above, or `none' for don't pad it. | |
3678 | Default is below for small data on big-endian machines; else above. */ | |
3679 | enum direction where_pad = FUNCTION_ARG_PADDING (mode, type); | |
3680 | ||
ff385626 | 3681 | /* Invert direction if stack is post-decrement. |
12a97a04 | 3682 | FIXME: why? */ |
3683 | if (STACK_PUSH_CODE == POST_DEC) | |
10f307d9 | 3684 | if (where_pad != none) |
3685 | where_pad = (where_pad == downward ? upward : downward); | |
3686 | ||
0a534ba7 | 3687 | xinner = x; |
10f307d9 | 3688 | |
851fc2b3 | 3689 | if (mode == BLKmode |
3690 | || (STRICT_ALIGNMENT && align < GET_MODE_ALIGNMENT (mode))) | |
10f307d9 | 3691 | { |
3692 | /* Copy a block into the stack, entirely or partially. */ | |
3693 | ||
19cb6b50 | 3694 | rtx temp; |
f054eb3c | 3695 | int used; |
a2509aaa | 3696 | int offset; |
10f307d9 | 3697 | int skip; |
fa56dc1d | 3698 | |
f054eb3c | 3699 | offset = partial % (PARM_BOUNDARY / BITS_PER_UNIT); |
3700 | used = partial - offset; | |
a2509aaa | 3701 | |
851fc2b3 | 3702 | if (mode != BLKmode) |
3703 | { | |
3704 | /* A value is to be stored in an insufficiently aligned | |
3705 | stack slot; copy via a suitably aligned slot if | |
3706 | necessary. */ | |
3707 | size = GEN_INT (GET_MODE_SIZE (mode)); | |
3708 | if (!MEM_P (xinner)) | |
3709 | { | |
3710 | temp = assign_temp (type, 0, 1, 1); | |
3711 | emit_move_insn (temp, xinner); | |
3712 | xinner = temp; | |
3713 | } | |
3714 | } | |
3715 | ||
611234b4 | 3716 | gcc_assert (size); |
10f307d9 | 3717 | |
10f307d9 | 3718 | /* USED is now the # of bytes we need not copy to the stack |
3719 | because registers will take care of them. */ | |
3720 | ||
3721 | if (partial != 0) | |
e513d163 | 3722 | xinner = adjust_address (xinner, BLKmode, used); |
10f307d9 | 3723 | |
3724 | /* If the partial register-part of the arg counts in its stack size, | |
3725 | skip the part of stack space corresponding to the registers. | |
3726 | Otherwise, start copying to the beginning of the stack space, | |
3727 | by setting SKIP to 0. */ | |
997d68fe | 3728 | skip = (reg_parm_stack_space == 0) ? 0 : used; |
10f307d9 | 3729 | |
3730 | #ifdef PUSH_ROUNDING | |
3731 | /* Do it with several push insns if that doesn't take lots of insns | |
3732 | and if there is no difficulty with push insns that skip bytes | |
3733 | on the stack for alignment purposes. */ | |
3734 | if (args_addr == 0 | |
4448f543 | 3735 | && PUSH_ARGS |
971ba038 | 3736 | && CONST_INT_P (size) |
10f307d9 | 3737 | && skip == 0 |
b4ad0ea6 | 3738 | && MEM_ALIGN (xinner) >= align |
928a6bdc | 3739 | && (MOVE_BY_PIECES_P ((unsigned) INTVAL (size) - used, align)) |
10f307d9 | 3740 | /* Here we avoid the case of a structure whose weak alignment |
3741 | forces many pushes of a small amount of data, | |
3742 | and such small pushes do rounding that causes trouble. */ | |
9439ebf7 | 3743 | && ((! SLOW_UNALIGNED_ACCESS (word_mode, align)) |
325d1c45 | 3744 | || align >= BIGGEST_ALIGNMENT |
decd7a45 | 3745 | || (PUSH_ROUNDING (align / BITS_PER_UNIT) |
3746 | == (align / BITS_PER_UNIT))) | |
db5b2472 | 3747 | && (HOST_WIDE_INT) PUSH_ROUNDING (INTVAL (size)) == INTVAL (size)) |
10f307d9 | 3748 | { |
3749 | /* Push padding now if padding above and stack grows down, | |
3750 | or if padding below and stack grows up. | |
3751 | But if space already allocated, this has already been done. */ | |
3752 | if (extra && args_addr == 0 | |
3753 | && where_pad != none && where_pad != stack_direction) | |
b572011e | 3754 | anti_adjust_stack (GEN_INT (extra)); |
10f307d9 | 3755 | |
9fe0e1b8 | 3756 | move_by_pieces (NULL, xinner, INTVAL (size) - used, align, 0); |
10f307d9 | 3757 | } |
3758 | else | |
fa56dc1d | 3759 | #endif /* PUSH_ROUNDING */ |
10f307d9 | 3760 | { |
a9f2963b | 3761 | rtx target; |
3762 | ||
10f307d9 | 3763 | /* Otherwise make space on the stack and copy the data |
3764 | to the address of that space. */ | |
3765 | ||
3766 | /* Deduct words put into registers from the size we must copy. */ | |
3767 | if (partial != 0) | |
3768 | { | |
971ba038 | 3769 | if (CONST_INT_P (size)) |
b572011e | 3770 | size = GEN_INT (INTVAL (size) - used); |
10f307d9 | 3771 | else |
3772 | size = expand_binop (GET_MODE (size), sub_optab, size, | |
b572011e | 3773 | GEN_INT (used), NULL_RTX, 0, |
3774 | OPTAB_LIB_WIDEN); | |
10f307d9 | 3775 | } |
3776 | ||
3777 | /* Get the address of the stack space. | |
3778 | In this case, we do not deal with EXTRA separately. | |
3779 | A single stack adjust will do. */ | |
3780 | if (! args_addr) | |
3781 | { | |
3782 | temp = push_block (size, extra, where_pad == downward); | |
3783 | extra = 0; | |
3784 | } | |
971ba038 | 3785 | else if (CONST_INT_P (args_so_far)) |
10f307d9 | 3786 | temp = memory_address (BLKmode, |
3787 | plus_constant (args_addr, | |
3788 | skip + INTVAL (args_so_far))); | |
3789 | else | |
3790 | temp = memory_address (BLKmode, | |
941522d6 | 3791 | plus_constant (gen_rtx_PLUS (Pmode, |
3792 | args_addr, | |
3793 | args_so_far), | |
10f307d9 | 3794 | skip)); |
c0bfc78e | 3795 | |
3796 | if (!ACCUMULATE_OUTGOING_ARGS) | |
3797 | { | |
3798 | /* If the source is referenced relative to the stack pointer, | |
3799 | copy it to another register to stabilize it. We do not need | |
3800 | to do this if we know that we won't be changing sp. */ | |
3801 | ||
3802 | if (reg_mentioned_p (virtual_stack_dynamic_rtx, temp) | |
3803 | || reg_mentioned_p (virtual_outgoing_args_rtx, temp)) | |
3804 | temp = copy_to_reg (temp); | |
3805 | } | |
3806 | ||
fa56dc1d | 3807 | target = gen_rtx_MEM (BLKmode, temp); |
a9f2963b | 3808 | |
f7db692b | 3809 | /* We do *not* set_mem_attributes here, because incoming arguments |
3810 | may overlap with sibling call outgoing arguments and we cannot | |
3811 | allow reordering of reads from function arguments with stores | |
3812 | to outgoing arguments of sibling calls. We do, however, want | |
3813 | to record the alignment of the stack slot. */ | |
0378dbdc | 3814 | /* ALIGN may well be better aligned than TYPE, e.g. due to |
3815 | PARM_BOUNDARY. Assume the caller isn't lying. */ | |
3816 | set_mem_align (target, align); | |
c0bfc78e | 3817 | |
0378dbdc | 3818 | emit_block_move (target, xinner, size, BLOCK_OP_CALL_PARM); |
10f307d9 | 3819 | } |
3820 | } | |
3821 | else if (partial > 0) | |
3822 | { | |
3823 | /* Scalar partly in registers. */ | |
3824 | ||
3825 | int size = GET_MODE_SIZE (mode) / UNITS_PER_WORD; | |
3826 | int i; | |
3827 | int not_stack; | |
f054eb3c | 3828 | /* # bytes of start of argument |
10f307d9 | 3829 | that we must make space for but need not store. */ |
f0cf03cb | 3830 | int offset = partial % (PARM_BOUNDARY / BITS_PER_UNIT); |
10f307d9 | 3831 | int args_offset = INTVAL (args_so_far); |
3832 | int skip; | |
3833 | ||
3834 | /* Push padding now if padding above and stack grows down, | |
3835 | or if padding below and stack grows up. | |
3836 | But if space already allocated, this has already been done. */ | |
3837 | if (extra && args_addr == 0 | |
3838 | && where_pad != none && where_pad != stack_direction) | |
b572011e | 3839 | anti_adjust_stack (GEN_INT (extra)); |
10f307d9 | 3840 | |
3841 | /* If we make space by pushing it, we might as well push | |
3842 | the real data. Otherwise, we can leave OFFSET nonzero | |
3843 | and leave the space uninitialized. */ | |
3844 | if (args_addr == 0) | |
3845 | offset = 0; | |
3846 | ||
3847 | /* Now NOT_STACK gets the number of words that we don't need to | |
dc537795 | 3848 | allocate on the stack. Convert OFFSET to words too. */ |
f054eb3c | 3849 | not_stack = (partial - offset) / UNITS_PER_WORD; |
f0cf03cb | 3850 | offset /= UNITS_PER_WORD; |
10f307d9 | 3851 | |
3852 | /* If the partial register-part of the arg counts in its stack size, | |
3853 | skip the part of stack space corresponding to the registers. | |
3854 | Otherwise, start copying to the beginning of the stack space, | |
3855 | by setting SKIP to 0. */ | |
997d68fe | 3856 | skip = (reg_parm_stack_space == 0) ? 0 : not_stack; |
10f307d9 | 3857 | |
3858 | if (CONSTANT_P (x) && ! LEGITIMATE_CONSTANT_P (x)) | |
3859 | x = validize_mem (force_const_mem (mode, x)); | |
3860 | ||
3861 | /* If X is a hard register in a non-integer mode, copy it into a pseudo; | |
3862 | SUBREGs of such registers are not allowed. */ | |
8ad4c111 | 3863 | if ((REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER |
10f307d9 | 3864 | && GET_MODE_CLASS (GET_MODE (x)) != MODE_INT)) |
3865 | x = copy_to_reg (x); | |
3866 | ||
3867 | /* Loop over all the words allocated on the stack for this arg. */ | |
3868 | /* We can do it by words, because any scalar bigger than a word | |
3869 | has a size a multiple of a word. */ | |
3870 | #ifndef PUSH_ARGS_REVERSED | |
3871 | for (i = not_stack; i < size; i++) | |
3872 | #else | |
3873 | for (i = size - 1; i >= not_stack; i--) | |
3874 | #endif | |
3875 | if (i >= not_stack + offset) | |
3876 | emit_push_insn (operand_subword_force (x, i, mode), | |
b572011e | 3877 | word_mode, NULL_TREE, NULL_RTX, align, 0, NULL_RTX, |
3878 | 0, args_addr, | |
3879 | GEN_INT (args_offset + ((i - not_stack + skip) | |
997d68fe | 3880 | * UNITS_PER_WORD)), |
9d855d2f | 3881 | reg_parm_stack_space, alignment_pad); |
10f307d9 | 3882 | } |
3883 | else | |
3884 | { | |
3885 | rtx addr; | |
f7c44134 | 3886 | rtx dest; |
10f307d9 | 3887 | |
3888 | /* Push padding now if padding above and stack grows down, | |
3889 | or if padding below and stack grows up. | |
3890 | But if space already allocated, this has already been done. */ | |
3891 | if (extra && args_addr == 0 | |
3892 | && where_pad != none && where_pad != stack_direction) | |
b572011e | 3893 | anti_adjust_stack (GEN_INT (extra)); |
10f307d9 | 3894 | |
3895 | #ifdef PUSH_ROUNDING | |
4448f543 | 3896 | if (args_addr == 0 && PUSH_ARGS) |
ef7dc4b4 | 3897 | emit_single_push_insn (mode, x, type); |
10f307d9 | 3898 | else |
3899 | #endif | |
eb4b06b6 | 3900 | { |
971ba038 | 3901 | if (CONST_INT_P (args_so_far)) |
eb4b06b6 | 3902 | addr |
3903 | = memory_address (mode, | |
fa56dc1d | 3904 | plus_constant (args_addr, |
eb4b06b6 | 3905 | INTVAL (args_so_far))); |
fa56dc1d | 3906 | else |
941522d6 | 3907 | addr = memory_address (mode, gen_rtx_PLUS (Pmode, args_addr, |
3908 | args_so_far)); | |
ef7dc4b4 | 3909 | dest = gen_rtx_MEM (mode, addr); |
f7db692b | 3910 | |
3911 | /* We do *not* set_mem_attributes here, because incoming arguments | |
3912 | may overlap with sibling call outgoing arguments and we cannot | |
3913 | allow reordering of reads from function arguments with stores | |
3914 | to outgoing arguments of sibling calls. We do, however, want | |
3915 | to record the alignment of the stack slot. */ | |
3916 | /* ALIGN may well be better aligned than TYPE, e.g. due to | |
3917 | PARM_BOUNDARY. Assume the caller isn't lying. */ | |
3918 | set_mem_align (dest, align); | |
10f307d9 | 3919 | |
ef7dc4b4 | 3920 | emit_move_insn (dest, x); |
ef7dc4b4 | 3921 | } |
10f307d9 | 3922 | } |
3923 | ||
10f307d9 | 3924 | /* If part should go in registers, copy that part |
3925 | into the appropriate registers. Do this now, at the end, | |
3926 | since mem-to-mem copies above may do function calls. */ | |
a984cc1e | 3927 | if (partial > 0 && reg != 0) |
ce739127 | 3928 | { |
3929 | /* Handle calls that pass values in multiple non-contiguous locations. | |
3930 | The Irix 6 ABI has examples of this. */ | |
3931 | if (GET_CODE (reg) == PARALLEL) | |
5f4cd670 | 3932 | emit_group_load (reg, x, type, -1); |
ce739127 | 3933 | else |
f054eb3c | 3934 | { |
3935 | gcc_assert (partial % UNITS_PER_WORD == 0); | |
3936 | move_block_to_reg (REGNO (reg), x, partial / UNITS_PER_WORD, mode); | |
3937 | } | |
ce739127 | 3938 | } |
10f307d9 | 3939 | |
3940 | if (extra && args_addr == 0 && where_pad == stack_direction) | |
b572011e | 3941 | anti_adjust_stack (GEN_INT (extra)); |
fa56dc1d | 3942 | |
364a85bd | 3943 | if (alignment_pad && args_addr == 0) |
9d855d2f | 3944 | anti_adjust_stack (alignment_pad); |
10f307d9 | 3945 | } |
3946 | \f | |
d8e5b213 | 3947 | /* Return X if X can be used as a subtarget in a sequence of arithmetic |
3948 | operations. */ | |
3949 | ||
3950 | static rtx | |
35cb5232 | 3951 | get_subtarget (rtx x) |
d8e5b213 | 3952 | { |
a1ad7483 | 3953 | return (optimize |
3954 | || x == 0 | |
d8e5b213 | 3955 | /* Only registers can be subtargets. */ |
8ad4c111 | 3956 | || !REG_P (x) |
d8e5b213 | 3957 | /* Don't use hard regs to avoid extending their life. */ |
3958 | || REGNO (x) < FIRST_PSEUDO_REGISTER | |
d8e5b213 | 3959 | ? 0 : x); |
3960 | } | |
3961 | ||
79367e65 | 3962 | /* A subroutine of expand_assignment. Optimize FIELD op= VAL, where |
3963 | FIELD is a bitfield. Returns true if the optimization was successful, | |
3964 | and there's nothing else to do. */ | |
3965 | ||
3966 | static bool | |
3967 | optimize_bitfield_assignment_op (unsigned HOST_WIDE_INT bitsize, | |
3968 | unsigned HOST_WIDE_INT bitpos, | |
3969 | enum machine_mode mode1, rtx str_rtx, | |
3970 | tree to, tree src) | |
3971 | { | |
3972 | enum machine_mode str_mode = GET_MODE (str_rtx); | |
3973 | unsigned int str_bitsize = GET_MODE_BITSIZE (str_mode); | |
3974 | tree op0, op1; | |
3975 | rtx value, result; | |
3976 | optab binop; | |
c4532f22 | 3977 | gimple srcstmt; |
3978 | enum tree_code code; | |
79367e65 | 3979 | |
3980 | if (mode1 != VOIDmode | |
3981 | || bitsize >= BITS_PER_WORD | |
3982 | || str_bitsize > BITS_PER_WORD | |
3983 | || TREE_SIDE_EFFECTS (to) | |
3984 | || TREE_THIS_VOLATILE (to)) | |
3985 | return false; | |
3986 | ||
3987 | STRIP_NOPS (src); | |
c4532f22 | 3988 | if (TREE_CODE (src) != SSA_NAME) |
3989 | return false; | |
3990 | if (TREE_CODE (TREE_TYPE (src)) != INTEGER_TYPE) | |
3991 | return false; | |
3992 | ||
3993 | srcstmt = get_gimple_for_ssa_name (src); | |
3994 | if (!srcstmt | |
3995 | || TREE_CODE_CLASS (gimple_assign_rhs_code (srcstmt)) != tcc_binary) | |
79367e65 | 3996 | return false; |
3997 | ||
c4532f22 | 3998 | code = gimple_assign_rhs_code (srcstmt); |
3999 | ||
4000 | op0 = gimple_assign_rhs1 (srcstmt); | |
4001 | ||
4002 | /* If OP0 is an SSA_NAME, then we want to walk the use-def chain | |
4003 | to find its initialization. Hopefully the initialization will | |
4004 | be from a bitfield load. */ | |
4005 | if (TREE_CODE (op0) == SSA_NAME) | |
4006 | { | |
4007 | gimple op0stmt = get_gimple_for_ssa_name (op0); | |
4008 | ||
4009 | /* We want to eventually have OP0 be the same as TO, which | |
4010 | should be a bitfield. */ | |
4011 | if (!op0stmt | |
4012 | || !is_gimple_assign (op0stmt) | |
4013 | || gimple_assign_rhs_code (op0stmt) != TREE_CODE (to)) | |
4014 | return false; | |
4015 | op0 = gimple_assign_rhs1 (op0stmt); | |
4016 | } | |
4017 | ||
4018 | op1 = gimple_assign_rhs2 (srcstmt); | |
79367e65 | 4019 | |
4020 | if (!operand_equal_p (to, op0, 0)) | |
4021 | return false; | |
4022 | ||
4023 | if (MEM_P (str_rtx)) | |
4024 | { | |
4025 | unsigned HOST_WIDE_INT offset1; | |
4026 | ||
4027 | if (str_bitsize == 0 || str_bitsize > BITS_PER_WORD) | |
4028 | str_mode = word_mode; | |
4029 | str_mode = get_best_mode (bitsize, bitpos, | |
4030 | MEM_ALIGN (str_rtx), str_mode, 0); | |
4031 | if (str_mode == VOIDmode) | |
4032 | return false; | |
4033 | str_bitsize = GET_MODE_BITSIZE (str_mode); | |
4034 | ||
4035 | offset1 = bitpos; | |
4036 | bitpos %= str_bitsize; | |
4037 | offset1 = (offset1 - bitpos) / BITS_PER_UNIT; | |
4038 | str_rtx = adjust_address (str_rtx, str_mode, offset1); | |
4039 | } | |
4040 | else if (!REG_P (str_rtx) && GET_CODE (str_rtx) != SUBREG) | |
4041 | return false; | |
4042 | ||
4043 | /* If the bit field covers the whole REG/MEM, store_field | |
4044 | will likely generate better code. */ | |
4045 | if (bitsize >= str_bitsize) | |
4046 | return false; | |
4047 | ||
4048 | /* We can't handle fields split across multiple entities. */ | |
4049 | if (bitpos + bitsize > str_bitsize) | |
4050 | return false; | |
4051 | ||
4052 | if (BYTES_BIG_ENDIAN) | |
4053 | bitpos = str_bitsize - bitpos - bitsize; | |
4054 | ||
c4532f22 | 4055 | switch (code) |
79367e65 | 4056 | { |
4057 | case PLUS_EXPR: | |
4058 | case MINUS_EXPR: | |
4059 | /* For now, just optimize the case of the topmost bitfield | |
4060 | where we don't need to do any masking and also | |
4061 | 1 bit bitfields where xor can be used. | |
4062 | We might win by one instruction for the other bitfields | |
4063 | too if insv/extv instructions aren't used, so that | |
4064 | can be added later. */ | |
4065 | if (bitpos + bitsize != str_bitsize | |
4066 | && (bitsize != 1 || TREE_CODE (op1) != INTEGER_CST)) | |
4067 | break; | |
4068 | ||
1db6d067 | 4069 | value = expand_expr (op1, NULL_RTX, str_mode, EXPAND_NORMAL); |
79367e65 | 4070 | value = convert_modes (str_mode, |
4071 | TYPE_MODE (TREE_TYPE (op1)), value, | |
4072 | TYPE_UNSIGNED (TREE_TYPE (op1))); | |
4073 | ||
4074 | /* We may be accessing data outside the field, which means | |
4075 | we can alias adjacent data. */ | |
4076 | if (MEM_P (str_rtx)) | |
4077 | { | |
4078 | str_rtx = shallow_copy_rtx (str_rtx); | |
4079 | set_mem_alias_set (str_rtx, 0); | |
4080 | set_mem_expr (str_rtx, 0); | |
4081 | } | |
4082 | ||
c4532f22 | 4083 | binop = code == PLUS_EXPR ? add_optab : sub_optab; |
79367e65 | 4084 | if (bitsize == 1 && bitpos + bitsize != str_bitsize) |
4085 | { | |
4086 | value = expand_and (str_mode, value, const1_rtx, NULL); | |
4087 | binop = xor_optab; | |
4088 | } | |
4089 | value = expand_shift (LSHIFT_EXPR, str_mode, value, | |
4090 | build_int_cst (NULL_TREE, bitpos), | |
4091 | NULL_RTX, 1); | |
4092 | result = expand_binop (str_mode, binop, str_rtx, | |
4093 | value, str_rtx, 1, OPTAB_WIDEN); | |
4094 | if (result != str_rtx) | |
4095 | emit_move_insn (str_rtx, result); | |
4096 | return true; | |
4097 | ||
0ebe5db7 | 4098 | case BIT_IOR_EXPR: |
4099 | case BIT_XOR_EXPR: | |
4100 | if (TREE_CODE (op1) != INTEGER_CST) | |
4101 | break; | |
1db6d067 | 4102 | value = expand_expr (op1, NULL_RTX, GET_MODE (str_rtx), EXPAND_NORMAL); |
0ebe5db7 | 4103 | value = convert_modes (GET_MODE (str_rtx), |
4104 | TYPE_MODE (TREE_TYPE (op1)), value, | |
4105 | TYPE_UNSIGNED (TREE_TYPE (op1))); | |
4106 | ||
4107 | /* We may be accessing data outside the field, which means | |
4108 | we can alias adjacent data. */ | |
4109 | if (MEM_P (str_rtx)) | |
4110 | { | |
4111 | str_rtx = shallow_copy_rtx (str_rtx); | |
4112 | set_mem_alias_set (str_rtx, 0); | |
4113 | set_mem_expr (str_rtx, 0); | |
4114 | } | |
4115 | ||
c4532f22 | 4116 | binop = code == BIT_IOR_EXPR ? ior_optab : xor_optab; |
0ebe5db7 | 4117 | if (bitpos + bitsize != GET_MODE_BITSIZE (GET_MODE (str_rtx))) |
4118 | { | |
4119 | rtx mask = GEN_INT (((unsigned HOST_WIDE_INT) 1 << bitsize) | |
4120 | - 1); | |
4121 | value = expand_and (GET_MODE (str_rtx), value, mask, | |
4122 | NULL_RTX); | |
4123 | } | |
4124 | value = expand_shift (LSHIFT_EXPR, GET_MODE (str_rtx), value, | |
4125 | build_int_cst (NULL_TREE, bitpos), | |
4126 | NULL_RTX, 1); | |
4127 | result = expand_binop (GET_MODE (str_rtx), binop, str_rtx, | |
4128 | value, str_rtx, 1, OPTAB_WIDEN); | |
4129 | if (result != str_rtx) | |
4130 | emit_move_insn (str_rtx, result); | |
4131 | return true; | |
4132 | ||
79367e65 | 4133 | default: |
4134 | break; | |
4135 | } | |
4136 | ||
4137 | return false; | |
4138 | } | |
4139 | ||
4140 | ||
5b5037b3 | 4141 | /* Expand an assignment that stores the value of FROM into TO. If NONTEMPORAL |
4142 | is true, try generating a nontemporal store. */ | |
10f307d9 | 4143 | |
5d3c0894 | 4144 | void |
5b5037b3 | 4145 | expand_assignment (tree to, tree from, bool nontemporal) |
10f307d9 | 4146 | { |
19cb6b50 | 4147 | rtx to_rtx = 0; |
10f307d9 | 4148 | rtx result; |
5d9de213 | 4149 | enum machine_mode mode; |
4150 | int align, icode; | |
10f307d9 | 4151 | |
4152 | /* Don't crash if the lhs of the assignment was erroneous. */ | |
10f307d9 | 4153 | if (TREE_CODE (to) == ERROR_MARK) |
9282409c | 4154 | { |
8ec3c5c2 | 4155 | result = expand_normal (from); |
5d3c0894 | 4156 | return; |
9282409c | 4157 | } |
10f307d9 | 4158 | |
8f3e551a | 4159 | /* Optimize away no-op moves without side-effects. */ |
4160 | if (operand_equal_p (to, from, 0)) | |
4161 | return; | |
4162 | ||
5d9de213 | 4163 | mode = TYPE_MODE (TREE_TYPE (to)); |
4164 | if ((TREE_CODE (to) == MEM_REF | |
4165 | || TREE_CODE (to) == TARGET_MEM_REF) | |
4166 | && mode != BLKmode | |
4167 | && ((align = MAX (TYPE_ALIGN (TREE_TYPE (to)), | |
4168 | get_object_alignment (to, BIGGEST_ALIGNMENT))) | |
4169 | < (signed) GET_MODE_ALIGNMENT (mode)) | |
4170 | && ((icode = optab_handler (movmisalign_optab, mode)) | |
4171 | != CODE_FOR_nothing)) | |
4172 | { | |
4173 | enum machine_mode address_mode, op_mode1; | |
4174 | rtx insn, reg, op0, mem; | |
4175 | ||
4176 | reg = expand_expr (from, NULL_RTX, VOIDmode, EXPAND_NORMAL); | |
4177 | reg = force_not_mem (reg); | |
4178 | ||
4179 | if (TREE_CODE (to) == MEM_REF) | |
4180 | { | |
4181 | addr_space_t as | |
4182 | = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (to, 1)))); | |
4183 | tree base = TREE_OPERAND (to, 0); | |
4184 | address_mode = targetm.addr_space.address_mode (as); | |
4185 | op0 = expand_expr (base, NULL_RTX, VOIDmode, EXPAND_NORMAL); | |
4186 | op0 = convert_memory_address_addr_space (address_mode, op0, as); | |
4187 | if (!integer_zerop (TREE_OPERAND (to, 1))) | |
4188 | { | |
4189 | rtx off | |
4190 | = immed_double_int_const (mem_ref_offset (to), address_mode); | |
4191 | op0 = simplify_gen_binary (PLUS, address_mode, op0, off); | |
4192 | } | |
4193 | op0 = memory_address_addr_space (mode, op0, as); | |
4194 | mem = gen_rtx_MEM (mode, op0); | |
4195 | set_mem_attributes (mem, to, 0); | |
4196 | set_mem_addr_space (mem, as); | |
4197 | } | |
4198 | else if (TREE_CODE (to) == TARGET_MEM_REF) | |
4199 | { | |
4200 | addr_space_t as = TYPE_ADDR_SPACE (TREE_TYPE (to)); | |
4201 | struct mem_address addr; | |
4202 | ||
4203 | get_address_description (to, &addr); | |
4204 | op0 = addr_for_mem_ref (&addr, as, true); | |
4205 | op0 = memory_address_addr_space (mode, op0, as); | |
4206 | mem = gen_rtx_MEM (mode, op0); | |
4207 | set_mem_attributes (mem, to, 0); | |
4208 | set_mem_addr_space (mem, as); | |
4209 | } | |
4210 | else | |
4211 | gcc_unreachable (); | |
4212 | if (TREE_THIS_VOLATILE (to)) | |
4213 | MEM_VOLATILE_P (mem) = 1; | |
4214 | ||
4215 | op_mode1 = insn_data[icode].operand[1].mode; | |
4216 | if (! (*insn_data[icode].operand[1].predicate) (reg, op_mode1) | |
4217 | && op_mode1 != VOIDmode) | |
4218 | reg = copy_to_mode_reg (op_mode1, reg); | |
4219 | ||
4220 | insn = GEN_FCN (icode) (mem, reg); | |
dd0cb1e8 | 4221 | /* The movmisalign<mode> pattern cannot fail, else the assignment would |
4222 | silently be omitted. */ | |
4223 | gcc_assert (insn != NULL_RTX); | |
5d9de213 | 4224 | emit_insn (insn); |
4225 | return; | |
4226 | } | |
4227 | ||
10f307d9 | 4228 | /* Assignment of a structure component needs special treatment |
4229 | if the structure component's rtx is not simply a MEM. | |
e3a8913c | 4230 | Assignment of an array element at a constant index, and assignment of |
4231 | an array element in an unaligned packed structure field, has the same | |
4232 | problem. */ | |
79367e65 | 4233 | if (handled_component_p (to) |
182cf5a9 | 4234 | /* ??? We only need to handle MEM_REF here if the access is not |
4235 | a full access of the base object. */ | |
4236 | || (TREE_CODE (to) == MEM_REF | |
4237 | && TREE_CODE (TREE_OPERAND (to, 0)) == ADDR_EXPR) | |
2d55cbd9 | 4238 | || TREE_CODE (TREE_TYPE (to)) == ARRAY_TYPE) |
10f307d9 | 4239 | { |
4240 | enum machine_mode mode1; | |
02e7a332 | 4241 | HOST_WIDE_INT bitsize, bitpos; |
954bdcb1 | 4242 | tree offset; |
10f307d9 | 4243 | int unsignedp; |
4244 | int volatilep = 0; | |
88ac3f7f | 4245 | tree tem; |
4246 | ||
4247 | push_temp_slots (); | |
7fce34be | 4248 | tem = get_inner_reference (to, &bitsize, &bitpos, &offset, &mode1, |
e7e9416e | 4249 | &unsignedp, &volatilep, true); |
10f307d9 | 4250 | |
4251 | /* If we are going to use store_bit_field and extract_bit_field, | |
4252 | make sure to_rtx will be safe for multiple use. */ | |
4253 | ||
8ec3c5c2 | 4254 | to_rtx = expand_normal (tem); |
a689a61a | 4255 | |
a420d927 | 4256 | /* If the bitfield is volatile, we want to access it in the |
1795103a | 4257 | field's mode, not the computed mode. |
4258 | If a MEM has VOIDmode (external with incomplete type), | |
4259 | use BLKmode for it instead. */ | |
4260 | if (MEM_P (to_rtx)) | |
4261 | { | |
4262 | if (volatilep && flag_strict_volatile_bitfields > 0) | |
4263 | to_rtx = adjust_address (to_rtx, mode1, 0); | |
4264 | else if (GET_MODE (to_rtx) == VOIDmode) | |
4265 | to_rtx = adjust_address (to_rtx, BLKmode, 0); | |
4266 | } | |
a420d927 | 4267 | |
954bdcb1 | 4268 | if (offset != 0) |
4269 | { | |
98155838 | 4270 | enum machine_mode address_mode; |
c22de3f0 | 4271 | rtx offset_rtx; |
954bdcb1 | 4272 | |
c22de3f0 | 4273 | if (!MEM_P (to_rtx)) |
4274 | { | |
4275 | /* We can get constant negative offsets into arrays with broken | |
4276 | user code. Translate this to a trap instead of ICEing. */ | |
4277 | gcc_assert (TREE_CODE (offset) == INTEGER_CST); | |
4278 | expand_builtin_trap (); | |
4279 | to_rtx = gen_rtx_MEM (BLKmode, const0_rtx); | |
4280 | } | |
33ef2f52 | 4281 | |
c22de3f0 | 4282 | offset_rtx = expand_expr (offset, NULL_RTX, VOIDmode, EXPAND_SUM); |
98155838 | 4283 | address_mode |
4284 | = targetm.addr_space.address_mode (MEM_ADDR_SPACE (to_rtx)); | |
4285 | if (GET_MODE (offset_rtx) != address_mode) | |
4286 | offset_rtx = convert_to_mode (address_mode, offset_rtx, 0); | |
33ef2f52 | 4287 | |
d89d783c | 4288 | /* A constant address in TO_RTX can have VOIDmode, we must not try |
4289 | to call force_reg for that case. Avoid that case. */ | |
e16ceb8e | 4290 | if (MEM_P (to_rtx) |
25d55d72 | 4291 | && GET_MODE (to_rtx) == BLKmode |
d89d783c | 4292 | && GET_MODE (XEXP (to_rtx, 0)) != VOIDmode |
2b96c5f6 | 4293 | && bitsize > 0 |
fa56dc1d | 4294 | && (bitpos % bitsize) == 0 |
25d55d72 | 4295 | && (bitsize % GET_MODE_ALIGNMENT (mode1)) == 0 |
2b96c5f6 | 4296 | && MEM_ALIGN (to_rtx) == GET_MODE_ALIGNMENT (mode1)) |
25d55d72 | 4297 | { |
fac6aae6 | 4298 | to_rtx = adjust_address (to_rtx, mode1, bitpos / BITS_PER_UNIT); |
25d55d72 | 4299 | bitpos = 0; |
4300 | } | |
4301 | ||
fcdc122e | 4302 | to_rtx = offset_address (to_rtx, offset_rtx, |
252d0e4d | 4303 | highest_pow2_factor_for_target (to, |
4304 | offset)); | |
954bdcb1 | 4305 | } |
7014838c | 4306 | |
d8d9af50 | 4307 | /* No action is needed if the target is not a memory and the field |
4308 | lies completely outside that target. This can occur if the source | |
4309 | code contains an out-of-bounds access to a small array. */ | |
4310 | if (!MEM_P (to_rtx) | |
4311 | && GET_MODE (to_rtx) != BLKmode | |
4312 | && (unsigned HOST_WIDE_INT) bitpos | |
4313 | >= GET_MODE_BITSIZE (GET_MODE (to_rtx))) | |
4314 | { | |
4315 | expand_normal (from); | |
4316 | result = NULL; | |
4317 | } | |
79367e65 | 4318 | /* Handle expand_expr of a complex value returning a CONCAT. */ |
d8d9af50 | 4319 | else if (GET_CODE (to_rtx) == CONCAT) |
2b96c5f6 | 4320 | { |
aa7bb50e | 4321 | if (COMPLEX_MODE_P (TYPE_MODE (TREE_TYPE (from)))) |
020823de | 4322 | { |
4323 | gcc_assert (bitpos == 0); | |
5b5037b3 | 4324 | result = store_expr (from, to_rtx, false, nontemporal); |
020823de | 4325 | } |
4326 | else | |
4327 | { | |
4328 | gcc_assert (bitpos == 0 || bitpos == GET_MODE_BITSIZE (mode1)); | |
5b5037b3 | 4329 | result = store_expr (from, XEXP (to_rtx, bitpos != 0), false, |
4330 | nontemporal); | |
020823de | 4331 | } |
10f307d9 | 4332 | } |
79367e65 | 4333 | else |
0717ec39 | 4334 | { |
79367e65 | 4335 | if (MEM_P (to_rtx)) |
d4ca42d3 | 4336 | { |
79367e65 | 4337 | /* If the field is at offset zero, we could have been given the |
4338 | DECL_RTX of the parent struct. Don't munge it. */ | |
4339 | to_rtx = shallow_copy_rtx (to_rtx); | |
d4ca42d3 | 4340 | |
79367e65 | 4341 | set_mem_attributes_minus_bitpos (to_rtx, to, 0, bitpos); |
d4ca42d3 | 4342 | |
79367e65 | 4343 | /* Deal with volatile and readonly fields. The former is only |
4344 | done for MEM. Also set MEM_KEEP_ALIAS_SET_P if needed. */ | |
4345 | if (volatilep) | |
4346 | MEM_VOLATILE_P (to_rtx) = 1; | |
2b02580f | 4347 | if (component_uses_parent_alias_set (to)) |
79367e65 | 4348 | MEM_KEEP_ALIAS_SET_P (to_rtx) = 1; |
0717ec39 | 4349 | } |
9c5f26b0 | 4350 | |
79367e65 | 4351 | if (optimize_bitfield_assignment_op (bitsize, bitpos, mode1, |
4352 | to_rtx, to, from)) | |
4353 | result = NULL; | |
4354 | else | |
4355 | result = store_field (to_rtx, bitsize, bitpos, mode1, from, | |
5b5037b3 | 4356 | TREE_TYPE (tem), get_alias_set (to), |
4357 | nontemporal); | |
0717ec39 | 4358 | } |
4359 | ||
79367e65 | 4360 | if (result) |
4361 | preserve_temp_slots (result); | |
2b96c5f6 | 4362 | free_temp_slots (); |
4363 | pop_temp_slots (); | |
5d3c0894 | 4364 | return; |
10f307d9 | 4365 | } |
4366 | ||
a2e044a5 | 4367 | /* If the rhs is a function call and its value is not an aggregate, |
4368 | call the function before we start to compute the lhs. | |
4369 | This is needed for correct code for cases such as | |
4370 | val = setjmp (buf) on machines where reference to val | |
e767499e | 4371 | requires loading up part of an address in a separate insn. |
4372 | ||
16a8193d | 4373 | Don't do this if TO is a VAR_DECL or PARM_DECL whose DECL_RTL is REG |
4374 | since it might be a promoted variable where the zero- or sign- extension | |
4375 | needs to be done. Handling this in the normal way is safe because no | |
a8dd994c | 4376 | computation is done before the call. The same is true for SSA names. */ |
45550790 | 4377 | if (TREE_CODE (from) == CALL_EXPR && ! aggregate_value_p (from, from) |
b35c122b | 4378 | && COMPLETE_TYPE_P (TREE_TYPE (from)) |
61b44857 | 4379 | && TREE_CODE (TYPE_SIZE (TREE_TYPE (from))) == INTEGER_CST |
a8dd994c | 4380 | && ! (((TREE_CODE (to) == VAR_DECL || TREE_CODE (to) == PARM_DECL) |
4381 | && REG_P (DECL_RTL (to))) | |
4382 | || TREE_CODE (to) == SSA_NAME)) | |
a2e044a5 | 4383 | { |
88ac3f7f | 4384 | rtx value; |
4385 | ||
4386 | push_temp_slots (); | |
8ec3c5c2 | 4387 | value = expand_normal (from); |
a2e044a5 | 4388 | if (to_rtx == 0) |
8a06f2d4 | 4389 | to_rtx = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE); |
ac263f88 | 4390 | |
ce739127 | 4391 | /* Handle calls that return values in multiple non-contiguous locations. |
4392 | The Irix 6 ABI has examples of this. */ | |
4393 | if (GET_CODE (to_rtx) == PARALLEL) | |
5f4cd670 | 4394 | emit_group_load (to_rtx, value, TREE_TYPE (from), |
4395 | int_size_in_bytes (TREE_TYPE (from))); | |
ce739127 | 4396 | else if (GET_MODE (to_rtx) == BLKmode) |
0378dbdc | 4397 | emit_block_move (to_rtx, value, expr_size (from), BLOCK_OP_NORMAL); |
ac263f88 | 4398 | else |
5471b3be | 4399 | { |
85d654dd | 4400 | if (POINTER_TYPE_P (TREE_TYPE (to))) |
98155838 | 4401 | value = convert_memory_address_addr_space |
4402 | (GET_MODE (to_rtx), value, | |
4403 | TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (to)))); | |
4404 | ||
5471b3be | 4405 | emit_move_insn (to_rtx, value); |
4406 | } | |
a2e044a5 | 4407 | preserve_temp_slots (to_rtx); |
4408 | free_temp_slots (); | |
88ac3f7f | 4409 | pop_temp_slots (); |
5d3c0894 | 4410 | return; |
a2e044a5 | 4411 | } |
4412 | ||
10f307d9 | 4413 | /* Ordinary treatment. Expand TO to get a REG or MEM rtx. |
4414 | Don't re-expand if it was expanded already (in COMPONENT_REF case). */ | |
4415 | ||
4416 | if (to_rtx == 0) | |
8a06f2d4 | 4417 | to_rtx = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE); |
10f307d9 | 4418 | |
addbe7ac | 4419 | /* Don't move directly into a return register. */ |
155b05dc | 4420 | if (TREE_CODE (to) == RESULT_DECL |
8ad4c111 | 4421 | && (REG_P (to_rtx) || GET_CODE (to_rtx) == PARALLEL)) |
addbe7ac | 4422 | { |
88ac3f7f | 4423 | rtx temp; |
4424 | ||
4425 | push_temp_slots (); | |
1db6d067 | 4426 | temp = expand_expr (from, NULL_RTX, GET_MODE (to_rtx), EXPAND_NORMAL); |
155b05dc | 4427 | |
4428 | if (GET_CODE (to_rtx) == PARALLEL) | |
5f4cd670 | 4429 | emit_group_load (to_rtx, temp, TREE_TYPE (from), |
4430 | int_size_in_bytes (TREE_TYPE (from))); | |
155b05dc | 4431 | else |
4432 | emit_move_insn (to_rtx, temp); | |
4433 | ||
addbe7ac | 4434 | preserve_temp_slots (to_rtx); |
4435 | free_temp_slots (); | |
88ac3f7f | 4436 | pop_temp_slots (); |
5d3c0894 | 4437 | return; |
addbe7ac | 4438 | } |
4439 | ||
10f307d9 | 4440 | /* In case we are returning the contents of an object which overlaps |
4441 | the place the value is being stored, use a safe function when copying | |
4442 | a value through a pointer into a structure value return block. */ | |
865c8a7e | 4443 | if (TREE_CODE (to) == RESULT_DECL |
4444 | && TREE_CODE (from) == INDIRECT_REF | |
bd1a81f7 | 4445 | && ADDR_SPACE_GENERIC_P |
865c8a7e | 4446 | (TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (from, 0))))) |
4447 | && refs_may_alias_p (to, from) | |
18d50ae6 | 4448 | && cfun->returns_struct |
4449 | && !cfun->returns_pcc_struct) | |
10f307d9 | 4450 | { |
88ac3f7f | 4451 | rtx from_rtx, size; |
4452 | ||
4453 | push_temp_slots (); | |
eaf7767e | 4454 | size = expr_size (from); |
8ec3c5c2 | 4455 | from_rtx = expand_normal (from); |
10f307d9 | 4456 | |
f896c932 | 4457 | emit_library_call (memmove_libfunc, LCT_NORMAL, |
4458 | VOIDmode, 3, XEXP (to_rtx, 0), Pmode, | |
4459 | XEXP (from_rtx, 0), Pmode, | |
4460 | convert_to_mode (TYPE_MODE (sizetype), | |
4461 | size, TYPE_UNSIGNED (sizetype)), | |
4462 | TYPE_MODE (sizetype)); | |
10f307d9 | 4463 | |
4464 | preserve_temp_slots (to_rtx); | |
4465 | free_temp_slots (); | |
88ac3f7f | 4466 | pop_temp_slots (); |
5d3c0894 | 4467 | return; |
10f307d9 | 4468 | } |
4469 | ||
4470 | /* Compute FROM and store the value in the rtx we got. */ | |
4471 | ||
88ac3f7f | 4472 | push_temp_slots (); |
5b5037b3 | 4473 | result = store_expr (from, to_rtx, 0, nontemporal); |
10f307d9 | 4474 | preserve_temp_slots (result); |
4475 | free_temp_slots (); | |
88ac3f7f | 4476 | pop_temp_slots (); |
5d3c0894 | 4477 | return; |
10f307d9 | 4478 | } |
4479 | ||
5b5037b3 | 4480 | /* Emits nontemporal store insn that moves FROM to TO. Returns true if this |
4481 | succeeded, false otherwise. */ | |
4482 | ||
16c9337c | 4483 | bool |
5b5037b3 | 4484 | emit_storent_insn (rtx to, rtx from) |
4485 | { | |
4486 | enum machine_mode mode = GET_MODE (to), imode; | |
d6bf3b14 | 4487 | enum insn_code code = optab_handler (storent_optab, mode); |
5b5037b3 | 4488 | rtx pattern; |
4489 | ||
4490 | if (code == CODE_FOR_nothing) | |
4491 | return false; | |
4492 | ||
4493 | imode = insn_data[code].operand[0].mode; | |
4494 | if (!insn_data[code].operand[0].predicate (to, imode)) | |
4495 | return false; | |
4496 | ||
4497 | imode = insn_data[code].operand[1].mode; | |
4498 | if (!insn_data[code].operand[1].predicate (from, imode)) | |
4499 | { | |
4500 | from = copy_to_mode_reg (imode, from); | |
4501 | if (!insn_data[code].operand[1].predicate (from, imode)) | |
4502 | return false; | |
4503 | } | |
4504 | ||
4505 | pattern = GEN_FCN (code) (to, from); | |
4506 | if (pattern == NULL_RTX) | |
4507 | return false; | |
4508 | ||
4509 | emit_insn (pattern); | |
4510 | return true; | |
4511 | } | |
4512 | ||
10f307d9 | 4513 | /* Generate code for computing expression EXP, |
4514 | and storing the value into TARGET. | |
10f307d9 | 4515 | |
9282409c | 4516 | If the mode is BLKmode then we may return TARGET itself. |
4517 | It turns out that in BLKmode it doesn't cause a problem. | |
4518 | because C has no operators that could combine two different | |
4519 | assignments into the same BLKmode object with different values | |
4520 | with no sequence point. Will other languages need this to | |
4521 | be more thorough? | |
4522 | ||
c0f85e83 | 4523 | If CALL_PARAM_P is nonzero, this is a store into a call param on the |
5b5037b3 | 4524 | stack, and block moves may need to be treated specially. |
48e1416a | 4525 | |
5b5037b3 | 4526 | If NONTEMPORAL is true, try using a nontemporal store instruction. */ |
10f307d9 | 4527 | |
4528 | rtx | |
5b5037b3 | 4529 | store_expr (tree exp, rtx target, int call_param_p, bool nontemporal) |
10f307d9 | 4530 | { |
19cb6b50 | 4531 | rtx temp; |
60ffaf4d | 4532 | rtx alt_rtl = NULL_RTX; |
389dd41b | 4533 | location_t loc = EXPR_LOCATION (exp); |
10f307d9 | 4534 | |
824638f9 | 4535 | if (VOID_TYPE_P (TREE_TYPE (exp))) |
4536 | { | |
4537 | /* C++ can generate ?: expressions with a throw expression in one | |
4538 | branch and an rvalue in the other. Here, we resolve attempts to | |
917bbcab | 4539 | store the throw expression's nonexistent result. */ |
c0f85e83 | 4540 | gcc_assert (!call_param_p); |
1db6d067 | 4541 | expand_expr (exp, const0_rtx, VOIDmode, EXPAND_NORMAL); |
824638f9 | 4542 | return NULL_RTX; |
4543 | } | |
10f307d9 | 4544 | if (TREE_CODE (exp) == COMPOUND_EXPR) |
4545 | { | |
4546 | /* Perform first part of compound expression, then assign from second | |
4547 | part. */ | |
a35a63ff | 4548 | expand_expr (TREE_OPERAND (exp, 0), const0_rtx, VOIDmode, |
c0f85e83 | 4549 | call_param_p ? EXPAND_STACK_PARM : EXPAND_NORMAL); |
5b5037b3 | 4550 | return store_expr (TREE_OPERAND (exp, 1), target, call_param_p, |
4551 | nontemporal); | |
10f307d9 | 4552 | } |
4553 | else if (TREE_CODE (exp) == COND_EXPR && GET_MODE (target) == BLKmode) | |
4554 | { | |
4555 | /* For conditional expression, get safe form of the target. Then | |
4556 | test the condition, doing the appropriate assignment on either | |
4557 | side. This avoids the creation of unnecessary temporaries. | |
4558 | For non-BLKmode, it is more efficient not to do this. */ | |
4559 | ||
4560 | rtx lab1 = gen_label_rtx (), lab2 = gen_label_rtx (); | |
4561 | ||
d07f1b1f | 4562 | do_pending_stack_adjust (); |
10f307d9 | 4563 | NO_DEFER_POP; |
79ab74cc | 4564 | jumpifnot (TREE_OPERAND (exp, 0), lab1, -1); |
5b5037b3 | 4565 | store_expr (TREE_OPERAND (exp, 1), target, call_param_p, |
4566 | nontemporal); | |
10f307d9 | 4567 | emit_jump_insn (gen_jump (lab2)); |
4568 | emit_barrier (); | |
4569 | emit_label (lab1); | |
5b5037b3 | 4570 | store_expr (TREE_OPERAND (exp, 2), target, call_param_p, |
4571 | nontemporal); | |
10f307d9 | 4572 | emit_label (lab2); |
4573 | OK_DEFER_POP; | |
9012f57d | 4574 | |
3f2a8027 | 4575 | return NULL_RTX; |
bb11bacb | 4576 | } |
acfb31e5 | 4577 | else if (GET_CODE (target) == SUBREG && SUBREG_PROMOTED_VAR_P (target)) |
edc2a478 | 4578 | /* If this is a scalar in a register that is stored in a wider mode |
acfb31e5 | 4579 | than the declared mode, compute the result into its declared mode |
4580 | and then convert to the wider mode. Our value is the computed | |
4581 | expression. */ | |
4582 | { | |
d2422fc2 | 4583 | rtx inner_target = 0; |
4584 | ||
3f2a8027 | 4585 | /* We can do the conversion inside EXP, which will often result |
4586 | in some optimizations. Do the conversion in two steps: first | |
4587 | change the signedness, if needed, then the extend. But don't | |
4588 | do this if the type of EXP is a subtype of something else | |
4589 | since then the conversion might involve more than just | |
4590 | converting modes. */ | |
4591 | if (INTEGRAL_TYPE_P (TREE_TYPE (exp)) | |
aec30911 | 4592 | && TREE_TYPE (TREE_TYPE (exp)) == 0 |
dcfc697f | 4593 | && GET_MODE_PRECISION (GET_MODE (target)) |
4594 | == TYPE_PRECISION (TREE_TYPE (exp))) | |
8d426db9 | 4595 | { |
78a8ed03 | 4596 | if (TYPE_UNSIGNED (TREE_TYPE (exp)) |
8d426db9 | 4597 | != SUBREG_PROMOTED_UNSIGNED_P (target)) |
a4521f7e | 4598 | { |
4599 | /* Some types, e.g. Fortran's logical*4, won't have a signed | |
4600 | version, so use the mode instead. */ | |
4601 | tree ntype | |
11773141 | 4602 | = (signed_or_unsigned_type_for |
a4521f7e | 4603 | (SUBREG_PROMOTED_UNSIGNED_P (target), TREE_TYPE (exp))); |
4604 | if (ntype == NULL) | |
4605 | ntype = lang_hooks.types.type_for_mode | |
4606 | (TYPE_MODE (TREE_TYPE (exp)), | |
4607 | SUBREG_PROMOTED_UNSIGNED_P (target)); | |
4608 | ||
389dd41b | 4609 | exp = fold_convert_loc (loc, ntype, exp); |
a4521f7e | 4610 | } |
8d426db9 | 4611 | |
389dd41b | 4612 | exp = fold_convert_loc (loc, lang_hooks.types.type_for_mode |
4613 | (GET_MODE (SUBREG_REG (target)), | |
4614 | SUBREG_PROMOTED_UNSIGNED_P (target)), | |
4615 | exp); | |
d2422fc2 | 4616 | |
4617 | inner_target = SUBREG_REG (target); | |
8d426db9 | 4618 | } |
fa56dc1d | 4619 | |
a35a63ff | 4620 | temp = expand_expr (exp, inner_target, VOIDmode, |
c0f85e83 | 4621 | call_param_p ? EXPAND_STACK_PARM : EXPAND_NORMAL); |
ceefa980 | 4622 | |
4623 | /* If TEMP is a VOIDmode constant, use convert_modes to make | |
4624 | sure that we properly convert it. */ | |
4625 | if (CONSTANT_P (temp) && GET_MODE (temp) == VOIDmode) | |
c3ba908e | 4626 | { |
4627 | temp = convert_modes (GET_MODE (target), TYPE_MODE (TREE_TYPE (exp)), | |
4628 | temp, SUBREG_PROMOTED_UNSIGNED_P (target)); | |
4629 | temp = convert_modes (GET_MODE (SUBREG_REG (target)), | |
4630 | GET_MODE (target), temp, | |
4631 | SUBREG_PROMOTED_UNSIGNED_P (target)); | |
4632 | } | |
ceefa980 | 4633 | |
acfb31e5 | 4634 | convert_move (SUBREG_REG (target), temp, |
4635 | SUBREG_PROMOTED_UNSIGNED_P (target)); | |
28ad8d33 | 4636 | |
3f2a8027 | 4637 | return NULL_RTX; |
acfb31e5 | 4638 | } |
b412eb5b | 4639 | else if ((TREE_CODE (exp) == STRING_CST |
4640 | || (TREE_CODE (exp) == MEM_REF | |
4641 | && TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR | |
4642 | && TREE_CODE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0)) | |
4643 | == STRING_CST | |
4644 | && integer_zerop (TREE_OPERAND (exp, 1)))) | |
09879952 | 4645 | && !nontemporal && !call_param_p |
b412eb5b | 4646 | && MEM_P (target)) |
09879952 | 4647 | { |
4648 | /* Optimize initialization of an array with a STRING_CST. */ | |
4649 | HOST_WIDE_INT exp_len, str_copy_len; | |
4650 | rtx dest_mem; | |
b412eb5b | 4651 | tree str = TREE_CODE (exp) == STRING_CST |
4652 | ? exp : TREE_OPERAND (TREE_OPERAND (exp, 0), 0); | |
09879952 | 4653 | |
4654 | exp_len = int_expr_size (exp); | |
4655 | if (exp_len <= 0) | |
4656 | goto normal_expr; | |
4657 | ||
b412eb5b | 4658 | if (TREE_STRING_LENGTH (str) <= 0) |
182cf5a9 | 4659 | goto normal_expr; |
4660 | ||
4661 | str_copy_len = strlen (TREE_STRING_POINTER (str)); | |
4662 | if (str_copy_len < TREE_STRING_LENGTH (str) - 1) | |
4663 | goto normal_expr; | |
4664 | ||
4665 | str_copy_len = TREE_STRING_LENGTH (str); | |
b412eb5b | 4666 | if ((STORE_MAX_PIECES & (STORE_MAX_PIECES - 1)) == 0 |
4667 | && TREE_STRING_POINTER (str)[TREE_STRING_LENGTH (str) - 1] == '\0') | |
182cf5a9 | 4668 | { |
4669 | str_copy_len += STORE_MAX_PIECES - 1; | |
4670 | str_copy_len &= ~(STORE_MAX_PIECES - 1); | |
4671 | } | |
4672 | str_copy_len = MIN (str_copy_len, exp_len); | |
4673 | if (!can_store_by_pieces (str_copy_len, builtin_strncpy_read_str, | |
b412eb5b | 4674 | CONST_CAST (char *, TREE_STRING_POINTER (str)), |
182cf5a9 | 4675 | MEM_ALIGN (target), false)) |
4676 | goto normal_expr; | |
4677 | ||
4678 | dest_mem = target; | |
4679 | ||
4680 | dest_mem = store_by_pieces (dest_mem, | |
4681 | str_copy_len, builtin_strncpy_read_str, | |
b412eb5b | 4682 | CONST_CAST (char *, |
4683 | TREE_STRING_POINTER (str)), | |
182cf5a9 | 4684 | MEM_ALIGN (target), false, |
4685 | exp_len > str_copy_len ? 1 : 0); | |
4686 | if (exp_len > str_copy_len) | |
4687 | clear_storage (adjust_address (dest_mem, BLKmode, 0), | |
4688 | GEN_INT (exp_len - str_copy_len), | |
4689 | BLOCK_OP_NORMAL); | |
4690 | return NULL_RTX; | |
4691 | } | |
10f307d9 | 4692 | else |
4693 | { | |
5b5037b3 | 4694 | rtx tmp_target; |
4695 | ||
09879952 | 4696 | normal_expr: |
5b5037b3 | 4697 | /* If we want to use a nontemporal store, force the value to |
4698 | register first. */ | |
4699 | tmp_target = nontemporal ? NULL_RTX : target; | |
4700 | temp = expand_expr_real (exp, tmp_target, GET_MODE (target), | |
c0f85e83 | 4701 | (call_param_p |
60ffaf4d | 4702 | ? EXPAND_STACK_PARM : EXPAND_NORMAL), |
4703 | &alt_rtl); | |
10f307d9 | 4704 | } |
4705 | ||
ceefa980 | 4706 | /* If TEMP is a VOIDmode constant and the mode of the type of EXP is not |
4707 | the same as that of TARGET, adjust the constant. This is needed, for | |
4708 | example, in case it is a CONST_DOUBLE and we want only a word-sized | |
4709 | value. */ | |
4710 | if (CONSTANT_P (temp) && GET_MODE (temp) == VOIDmode | |
43769aba | 4711 | && TREE_CODE (exp) != ERROR_MARK |
ceefa980 | 4712 | && GET_MODE (target) != TYPE_MODE (TREE_TYPE (exp))) |
4713 | temp = convert_modes (GET_MODE (target), TYPE_MODE (TREE_TYPE (exp)), | |
78a8ed03 | 4714 | temp, TYPE_UNSIGNED (TREE_TYPE (exp))); |
ceefa980 | 4715 | |
10f307d9 | 4716 | /* If value was not generated in the target, store it there. |
c0d93299 | 4717 | Convert the value to TARGET's type first if necessary and emit the |
4718 | pending incrementations that have been queued when expanding EXP. | |
4719 | Note that we cannot emit the whole queue blindly because this will | |
4720 | effectively disable the POST_INC optimization later. | |
4721 | ||
8a06f2d4 | 4722 | If TEMP and TARGET compare equal according to rtx_equal_p, but |
14e396bb | 4723 | one or both of them are volatile memory refs, we have to distinguish |
4724 | two cases: | |
4725 | - expand_expr has used TARGET. In this case, we must not generate | |
4726 | another copy. This can be detected by TARGET being equal according | |
4727 | to == . | |
4728 | - expand_expr has not used TARGET - that means that the source just | |
4729 | happens to have the same RTX form. Since temp will have been created | |
4730 | by expand_expr, it will compare unequal according to == . | |
4731 | We must generate a copy in this case, to reach the correct number | |
4732 | of volatile memory references. */ | |
10f307d9 | 4733 | |
b1ba8c8b | 4734 | if ((! rtx_equal_p (temp, target) |
14e396bb | 4735 | || (temp != target && (side_effects_p (temp) |
4736 | || side_effects_p (target)))) | |
afadb0ab | 4737 | && TREE_CODE (exp) != ERROR_MARK |
72a64688 | 4738 | /* If store_expr stores a DECL whose DECL_RTL(exp) == TARGET, |
4739 | but TARGET is not valid memory reference, TEMP will differ | |
4740 | from TARGET although it is really the same location. */ | |
1e20370f | 4741 | && !(alt_rtl |
4742 | && rtx_equal_p (alt_rtl, target) | |
4743 | && !side_effects_p (alt_rtl) | |
4744 | && !side_effects_p (target)) | |
89f18f73 | 4745 | /* If there's nothing to copy, don't bother. Don't call |
4746 | expr_size unless necessary, because some front-ends (C++) | |
4747 | expr_size-hook must not be given objects that are not | |
4748 | supposed to be bit-copied or bit-initialized. */ | |
d18d957a | 4749 | && expr_size (exp) != const0_rtx) |
10f307d9 | 4750 | { |
10f307d9 | 4751 | if (GET_MODE (temp) != GET_MODE (target) |
d0ddddf7 | 4752 | && GET_MODE (temp) != VOIDmode) |
10f307d9 | 4753 | { |
78a8ed03 | 4754 | int unsignedp = TYPE_UNSIGNED (TREE_TYPE (exp)); |
16c9337c | 4755 | if (GET_MODE (target) == BLKmode |
1c2b9ab6 | 4756 | && GET_MODE (temp) == BLKmode) |
1f8b6002 | 4757 | emit_block_move (target, temp, expr_size (exp), |
4758 | (call_param_p | |
4759 | ? BLOCK_OP_CALL_PARM | |
4760 | : BLOCK_OP_NORMAL)); | |
1c2b9ab6 | 4761 | else if (GET_MODE (target) == BLKmode) |
4762 | store_bit_field (target, INTVAL (expr_size (exp)) * BITS_PER_UNIT, | |
4763 | 0, GET_MODE (temp), temp); | |
10f307d9 | 4764 | else |
4765 | convert_move (target, temp, unsignedp); | |
4766 | } | |
4767 | ||
4768 | else if (GET_MODE (temp) == BLKmode && TREE_CODE (exp) == STRING_CST) | |
4769 | { | |
18279aee | 4770 | /* Handle copying a string constant into an array. The string |
4771 | constant may be shorter than the array. So copy just the string's | |
4772 | actual length, and clear the rest. First get the size of the data | |
4773 | type of the string, which is actually the size of the target. */ | |
4774 | rtx size = expr_size (exp); | |
10f307d9 | 4775 | |
971ba038 | 4776 | if (CONST_INT_P (size) |
35f44ac1 | 4777 | && INTVAL (size) < TREE_STRING_LENGTH (exp)) |
a35a63ff | 4778 | emit_block_move (target, temp, size, |
c0f85e83 | 4779 | (call_param_p |
a35a63ff | 4780 | ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL)); |
35f44ac1 | 4781 | else |
10f307d9 | 4782 | { |
98155838 | 4783 | enum machine_mode pointer_mode |
4784 | = targetm.addr_space.pointer_mode (MEM_ADDR_SPACE (target)); | |
4785 | enum machine_mode address_mode | |
4786 | = targetm.addr_space.address_mode (MEM_ADDR_SPACE (target)); | |
4787 | ||
35f44ac1 | 4788 | /* Compute the size of the data to copy from the string. */ |
4789 | tree copy_size | |
389dd41b | 4790 | = size_binop_loc (loc, MIN_EXPR, |
4791 | make_tree (sizetype, size), | |
4792 | size_int (TREE_STRING_LENGTH (exp))); | |
a35a63ff | 4793 | rtx copy_size_rtx |
4794 | = expand_expr (copy_size, NULL_RTX, VOIDmode, | |
c0f85e83 | 4795 | (call_param_p |
a35a63ff | 4796 | ? EXPAND_STACK_PARM : EXPAND_NORMAL)); |
35f44ac1 | 4797 | rtx label = 0; |
4798 | ||
4799 | /* Copy that much. */ | |
98155838 | 4800 | copy_size_rtx = convert_to_mode (pointer_mode, copy_size_rtx, |
78a8ed03 | 4801 | TYPE_UNSIGNED (sizetype)); |
a35a63ff | 4802 | emit_block_move (target, temp, copy_size_rtx, |
c0f85e83 | 4803 | (call_param_p |
a35a63ff | 4804 | ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL)); |
35f44ac1 | 4805 | |
ed8d3eee | 4806 | /* Figure out how much is left in TARGET that we have to clear. |
98155838 | 4807 | Do all calculations in pointer_mode. */ |
971ba038 | 4808 | if (CONST_INT_P (copy_size_rtx)) |
35f44ac1 | 4809 | { |
18279aee | 4810 | size = plus_constant (size, -INTVAL (copy_size_rtx)); |
4811 | target = adjust_address (target, BLKmode, | |
4812 | INTVAL (copy_size_rtx)); | |
35f44ac1 | 4813 | } |
4814 | else | |
4815 | { | |
4a836698 | 4816 | size = expand_binop (TYPE_MODE (sizetype), sub_optab, size, |
b572011e | 4817 | copy_size_rtx, NULL_RTX, 0, |
4818 | OPTAB_LIB_WIDEN); | |
35f44ac1 | 4819 | |
98155838 | 4820 | if (GET_MODE (copy_size_rtx) != address_mode) |
4821 | copy_size_rtx = convert_to_mode (address_mode, | |
4822 | copy_size_rtx, | |
78a8ed03 | 4823 | TYPE_UNSIGNED (sizetype)); |
18279aee | 4824 | |
4825 | target = offset_address (target, copy_size_rtx, | |
4826 | highest_pow2_factor (copy_size)); | |
35f44ac1 | 4827 | label = gen_label_rtx (); |
5a894bc6 | 4828 | emit_cmp_and_jump_insns (size, const0_rtx, LT, NULL_RTX, |
2b96c5f6 | 4829 | GET_MODE (size), 0, label); |
35f44ac1 | 4830 | } |
4831 | ||
4832 | if (size != const0_rtx) | |
0b25db21 | 4833 | clear_storage (target, size, BLOCK_OP_NORMAL); |
bdf60b71 | 4834 | |
35f44ac1 | 4835 | if (label) |
4836 | emit_label (label); | |
10f307d9 | 4837 | } |
4838 | } | |
ce739127 | 4839 | /* Handle calls that return values in multiple non-contiguous locations. |
4840 | The Irix 6 ABI has examples of this. */ | |
4841 | else if (GET_CODE (target) == PARALLEL) | |
5f4cd670 | 4842 | emit_group_load (target, temp, TREE_TYPE (exp), |
4843 | int_size_in_bytes (TREE_TYPE (exp))); | |
10f307d9 | 4844 | else if (GET_MODE (temp) == BLKmode) |
a35a63ff | 4845 | emit_block_move (target, temp, expr_size (exp), |
c0f85e83 | 4846 | (call_param_p |
a35a63ff | 4847 | ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL)); |
5b5037b3 | 4848 | else if (nontemporal |
4849 | && emit_storent_insn (target, temp)) | |
4850 | /* If we managed to emit a nontemporal store, there is nothing else to | |
4851 | do. */ | |
4852 | ; | |
10f307d9 | 4853 | else |
828eae76 | 4854 | { |
4855 | temp = force_operand (temp, target); | |
4856 | if (temp != target) | |
4857 | emit_move_insn (target, temp); | |
4858 | } | |
10f307d9 | 4859 | } |
9282409c | 4860 | |
3f2a8027 | 4861 | return NULL_RTX; |
10f307d9 | 4862 | } |
4863 | \f | |
20169a64 | 4864 | /* Helper for categorize_ctor_elements. Identical interface. */ |
dbd14dc5 | 4865 | |
20169a64 | 4866 | static bool |
b7bf20db | 4867 | categorize_ctor_elements_1 (const_tree ctor, HOST_WIDE_INT *p_nz_elts, |
7cb4a4d0 | 4868 | HOST_WIDE_INT *p_elt_count, |
4869 | bool *p_must_clear) | |
dbd14dc5 | 4870 | { |
c75b4594 | 4871 | unsigned HOST_WIDE_INT idx; |
20169a64 | 4872 | HOST_WIDE_INT nz_elts, elt_count; |
c75b4594 | 4873 | tree value, purpose; |
dbd14dc5 | 4874 | |
20169a64 | 4875 | /* Whether CTOR is a valid constant initializer, in accordance with what |
4876 | initializer_constant_valid_p does. If inferred from the constructor | |
4877 | elements, true until proven otherwise. */ | |
4878 | bool const_from_elts_p = constructor_static_from_elts_p (ctor); | |
4879 | bool const_p = const_from_elts_p ? true : TREE_STATIC (ctor); | |
4880 | ||
4ee9c684 | 4881 | nz_elts = 0; |
42b74698 | 4882 | elt_count = 0; |
491e04ef | 4883 | |
c75b4594 | 4884 | FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (ctor), idx, purpose, value) |
dbd14dc5 | 4885 | { |
30d12889 | 4886 | HOST_WIDE_INT mult = 1; |
dbd14dc5 | 4887 | |
4ee9c684 | 4888 | if (TREE_CODE (purpose) == RANGE_EXPR) |
4889 | { | |
4890 | tree lo_index = TREE_OPERAND (purpose, 0); | |
4891 | tree hi_index = TREE_OPERAND (purpose, 1); | |
dbd14dc5 | 4892 | |
4ee9c684 | 4893 | if (host_integerp (lo_index, 1) && host_integerp (hi_index, 1)) |
4894 | mult = (tree_low_cst (hi_index, 1) | |
4895 | - tree_low_cst (lo_index, 1) + 1); | |
4896 | } | |
dbd14dc5 | 4897 | |
4ee9c684 | 4898 | switch (TREE_CODE (value)) |
4899 | { | |
4900 | case CONSTRUCTOR: | |
4901 | { | |
20169a64 | 4902 | HOST_WIDE_INT nz = 0, ic = 0; |
1f8b6002 | 4903 | |
20169a64 | 4904 | bool const_elt_p |
4905 | = categorize_ctor_elements_1 (value, &nz, &ic, p_must_clear); | |
4906 | ||
4ee9c684 | 4907 | nz_elts += mult * nz; |
20169a64 | 4908 | elt_count += mult * ic; |
4909 | ||
4910 | if (const_from_elts_p && const_p) | |
4911 | const_p = const_elt_p; | |
4ee9c684 | 4912 | } |
4913 | break; | |
dbd14dc5 | 4914 | |
4ee9c684 | 4915 | case INTEGER_CST: |
4916 | case REAL_CST: | |
68a556d6 | 4917 | case FIXED_CST: |
4ee9c684 | 4918 | if (!initializer_zerop (value)) |
4919 | nz_elts += mult; | |
42b74698 | 4920 | elt_count += mult; |
4ee9c684 | 4921 | break; |
839db04c | 4922 | |
4923 | case STRING_CST: | |
4924 | nz_elts += mult * TREE_STRING_LENGTH (value); | |
42b74698 | 4925 | elt_count += mult * TREE_STRING_LENGTH (value); |
839db04c | 4926 | break; |
4927 | ||
4ee9c684 | 4928 | case COMPLEX_CST: |
4929 | if (!initializer_zerop (TREE_REALPART (value))) | |
4930 | nz_elts += mult; | |
4931 | if (!initializer_zerop (TREE_IMAGPART (value))) | |
4932 | nz_elts += mult; | |
42b74698 | 4933 | elt_count += mult; |
4ee9c684 | 4934 | break; |
839db04c | 4935 | |
4ee9c684 | 4936 | case VECTOR_CST: |
4937 | { | |
4938 | tree v; | |
4939 | for (v = TREE_VECTOR_CST_ELTS (value); v; v = TREE_CHAIN (v)) | |
42b74698 | 4940 | { |
4941 | if (!initializer_zerop (TREE_VALUE (v))) | |
4942 | nz_elts += mult; | |
4943 | elt_count += mult; | |
4944 | } | |
4ee9c684 | 4945 | } |
4946 | break; | |
886cfd4f | 4947 | |
4ee9c684 | 4948 | default: |
30d12889 | 4949 | { |
4950 | HOST_WIDE_INT tc = count_type_elements (TREE_TYPE (value), true); | |
4951 | if (tc < 1) | |
4952 | tc = 1; | |
4953 | nz_elts += mult * tc; | |
4954 | elt_count += mult * tc; | |
20169a64 | 4955 | |
30d12889 | 4956 | if (const_from_elts_p && const_p) |
4957 | const_p = initializer_constant_valid_p (value, TREE_TYPE (value)) | |
4958 | != NULL_TREE; | |
4959 | } | |
4ee9c684 | 4960 | break; |
4961 | } | |
4962 | } | |
886cfd4f | 4963 | |
7cb4a4d0 | 4964 | if (!*p_must_clear |
4965 | && (TREE_CODE (TREE_TYPE (ctor)) == UNION_TYPE | |
4966 | || TREE_CODE (TREE_TYPE (ctor)) == QUAL_UNION_TYPE)) | |
4967 | { | |
4968 | tree init_sub_type; | |
ab397fa7 | 4969 | bool clear_this = true; |
7cb4a4d0 | 4970 | |
c75b4594 | 4971 | if (!VEC_empty (constructor_elt, CONSTRUCTOR_ELTS (ctor))) |
7cb4a4d0 | 4972 | { |
ab397fa7 | 4973 | /* We don't expect more than one element of the union to be |
4974 | initialized. Not sure what we should do otherwise... */ | |
c75b4594 | 4975 | gcc_assert (VEC_length (constructor_elt, CONSTRUCTOR_ELTS (ctor)) |
4976 | == 1); | |
ab397fa7 | 4977 | |
c75b4594 | 4978 | init_sub_type = TREE_TYPE (VEC_index (constructor_elt, |
4979 | CONSTRUCTOR_ELTS (ctor), | |
4980 | 0)->value); | |
ab397fa7 | 4981 | |
4982 | /* ??? We could look at each element of the union, and find the | |
4983 | largest element. Which would avoid comparing the size of the | |
4984 | initialized element against any tail padding in the union. | |
4985 | Doesn't seem worth the effort... */ | |
1f8b6002 | 4986 | if (simple_cst_equal (TYPE_SIZE (TREE_TYPE (ctor)), |
ab397fa7 | 4987 | TYPE_SIZE (init_sub_type)) == 1) |
4988 | { | |
4989 | /* And now we have to find out if the element itself is fully | |
4990 | constructed. E.g. for union { struct { int a, b; } s; } u | |
4991 | = { .s = { .a = 1 } }. */ | |
b7f95d09 | 4992 | if (elt_count == count_type_elements (init_sub_type, false)) |
ab397fa7 | 4993 | clear_this = false; |
4994 | } | |
7cb4a4d0 | 4995 | } |
ab397fa7 | 4996 | |
4997 | *p_must_clear = clear_this; | |
7cb4a4d0 | 4998 | } |
4999 | ||
4ee9c684 | 5000 | *p_nz_elts += nz_elts; |
42b74698 | 5001 | *p_elt_count += elt_count; |
20169a64 | 5002 | |
5003 | return const_p; | |
4ee9c684 | 5004 | } |
5005 | ||
20169a64 | 5006 | /* Examine CTOR to discover: |
5007 | * how many scalar fields are set to nonzero values, | |
5008 | and place it in *P_NZ_ELTS; | |
5009 | * how many scalar fields in total are in CTOR, | |
5010 | and place it in *P_ELT_COUNT. | |
5011 | * if a type is a union, and the initializer from the constructor | |
5012 | is not the largest element in the union, then set *p_must_clear. | |
5013 | ||
5014 | Return whether or not CTOR is a valid static constant initializer, the same | |
5015 | as "initializer_constant_valid_p (CTOR, TREE_TYPE (CTOR)) != 0". */ | |
5016 | ||
5017 | bool | |
b7bf20db | 5018 | categorize_ctor_elements (const_tree ctor, HOST_WIDE_INT *p_nz_elts, |
7cb4a4d0 | 5019 | HOST_WIDE_INT *p_elt_count, |
5020 | bool *p_must_clear) | |
4ee9c684 | 5021 | { |
5022 | *p_nz_elts = 0; | |
42b74698 | 5023 | *p_elt_count = 0; |
7cb4a4d0 | 5024 | *p_must_clear = false; |
20169a64 | 5025 | |
5026 | return | |
5027 | categorize_ctor_elements_1 (ctor, p_nz_elts, p_elt_count, p_must_clear); | |
4ee9c684 | 5028 | } |
5029 | ||
5030 | /* Count the number of scalars in TYPE. Return -1 on overflow or | |
b7f95d09 | 5031 | variable-sized. If ALLOW_FLEXARR is true, don't count flexible |
5032 | array member at the end of the structure. */ | |
4ee9c684 | 5033 | |
5034 | HOST_WIDE_INT | |
b7bf20db | 5035 | count_type_elements (const_tree type, bool allow_flexarr) |
4ee9c684 | 5036 | { |
5037 | const HOST_WIDE_INT max = ~((HOST_WIDE_INT)1 << (HOST_BITS_PER_WIDE_INT-1)); | |
5038 | switch (TREE_CODE (type)) | |
5039 | { | |
5040 | case ARRAY_TYPE: | |
5041 | { | |
5042 | tree telts = array_type_nelts (type); | |
5043 | if (telts && host_integerp (telts, 1)) | |
5044 | { | |
1f8a6ff8 | 5045 | HOST_WIDE_INT n = tree_low_cst (telts, 1) + 1; |
b7f95d09 | 5046 | HOST_WIDE_INT m = count_type_elements (TREE_TYPE (type), false); |
4ee9c684 | 5047 | if (n == 0) |
5048 | return 0; | |
1f8a6ff8 | 5049 | else if (max / n > m) |
4ee9c684 | 5050 | return n * m; |
5051 | } | |
5052 | return -1; | |
5053 | } | |
5054 | ||
5055 | case RECORD_TYPE: | |
5056 | { | |
5057 | HOST_WIDE_INT n = 0, t; | |
5058 | tree f; | |
5059 | ||
1767a056 | 5060 | for (f = TYPE_FIELDS (type); f ; f = DECL_CHAIN (f)) |
4ee9c684 | 5061 | if (TREE_CODE (f) == FIELD_DECL) |
5062 | { | |
b7f95d09 | 5063 | t = count_type_elements (TREE_TYPE (f), false); |
4ee9c684 | 5064 | if (t < 0) |
b7f95d09 | 5065 | { |
5066 | /* Check for structures with flexible array member. */ | |
5067 | tree tf = TREE_TYPE (f); | |
5068 | if (allow_flexarr | |
1767a056 | 5069 | && DECL_CHAIN (f) == NULL |
b7f95d09 | 5070 | && TREE_CODE (tf) == ARRAY_TYPE |
5071 | && TYPE_DOMAIN (tf) | |
5072 | && TYPE_MIN_VALUE (TYPE_DOMAIN (tf)) | |
5073 | && integer_zerop (TYPE_MIN_VALUE (TYPE_DOMAIN (tf))) | |
5074 | && !TYPE_MAX_VALUE (TYPE_DOMAIN (tf)) | |
5075 | && int_size_in_bytes (type) >= 0) | |
5076 | break; | |
5077 | ||
5078 | return -1; | |
5079 | } | |
4ee9c684 | 5080 | n += t; |
5081 | } | |
5082 | ||
5083 | return n; | |
5084 | } | |
dbd14dc5 | 5085 | |
4ee9c684 | 5086 | case UNION_TYPE: |
5087 | case QUAL_UNION_TYPE: | |
bbf511cd | 5088 | return -1; |
4ee9c684 | 5089 | |
5090 | case COMPLEX_TYPE: | |
5091 | return 2; | |
5092 | ||
5093 | case VECTOR_TYPE: | |
4418a1d4 | 5094 | return TYPE_VECTOR_SUBPARTS (type); |
4ee9c684 | 5095 | |
5096 | case INTEGER_TYPE: | |
5097 | case REAL_TYPE: | |
68a556d6 | 5098 | case FIXED_POINT_TYPE: |
4ee9c684 | 5099 | case ENUMERAL_TYPE: |
5100 | case BOOLEAN_TYPE: | |
4ee9c684 | 5101 | case POINTER_TYPE: |
5102 | case OFFSET_TYPE: | |
5103 | case REFERENCE_TYPE: | |
dbd14dc5 | 5104 | return 1; |
fa56dc1d | 5105 | |
026a11f4 | 5106 | case ERROR_MARK: |
5107 | return 0; | |
5108 | ||
4ee9c684 | 5109 | case VOID_TYPE: |
5110 | case METHOD_TYPE: | |
4ee9c684 | 5111 | case FUNCTION_TYPE: |
5112 | case LANG_TYPE: | |
0dbd1c74 | 5113 | default: |
611234b4 | 5114 | gcc_unreachable (); |
dbd14dc5 | 5115 | } |
dbd14dc5 | 5116 | } |
5117 | ||
5118 | /* Return 1 if EXP contains mostly (3/4) zeros. */ | |
5119 | ||
a9adb06f | 5120 | static int |
1f1872fd | 5121 | mostly_zeros_p (const_tree exp) |
dbd14dc5 | 5122 | { |
dbd14dc5 | 5123 | if (TREE_CODE (exp) == CONSTRUCTOR) |
491e04ef | 5124 | |
dbd14dc5 | 5125 | { |
20169a64 | 5126 | HOST_WIDE_INT nz_elts, count, elts; |
7cb4a4d0 | 5127 | bool must_clear; |
5128 | ||
20169a64 | 5129 | categorize_ctor_elements (exp, &nz_elts, &count, &must_clear); |
7cb4a4d0 | 5130 | if (must_clear) |
5131 | return 1; | |
4ee9c684 | 5132 | |
b7f95d09 | 5133 | elts = count_type_elements (TREE_TYPE (exp), false); |
dbd14dc5 | 5134 | |
4ee9c684 | 5135 | return nz_elts < elts / 4; |
dbd14dc5 | 5136 | } |
5137 | ||
4ee9c684 | 5138 | return initializer_zerop (exp); |
dbd14dc5 | 5139 | } |
c69ad7b2 | 5140 | |
5141 | /* Return 1 if EXP contains all zeros. */ | |
5142 | ||
5143 | static int | |
1f1872fd | 5144 | all_zeros_p (const_tree exp) |
c69ad7b2 | 5145 | { |
5146 | if (TREE_CODE (exp) == CONSTRUCTOR) | |
5147 | ||
5148 | { | |
20169a64 | 5149 | HOST_WIDE_INT nz_elts, count; |
c69ad7b2 | 5150 | bool must_clear; |
5151 | ||
20169a64 | 5152 | categorize_ctor_elements (exp, &nz_elts, &count, &must_clear); |
c69ad7b2 | 5153 | return nz_elts == 0; |
5154 | } | |
5155 | ||
5156 | return initializer_zerop (exp); | |
5157 | } | |
dbd14dc5 | 5158 | \f |
e7ef3ff2 | 5159 | /* Helper function for store_constructor. |
5160 | TARGET, BITSIZE, BITPOS, MODE, EXP are as for store_field. | |
5161 | TYPE is the type of the CONSTRUCTOR, not the element type. | |
2c269e73 | 5162 | CLEARED is as for store_constructor. |
1179a68b | 5163 | ALIAS_SET is the alias set to use for any stores. |
a5b7fc8b | 5164 | |
5165 | This provides a recursive shortcut back to store_constructor when it isn't | |
5166 | necessary to go through store_field. This is so that we can pass through | |
5167 | the cleared field to let store_constructor know that we may not have to | |
5168 | clear a substructure if the outer structure has already been cleared. */ | |
e7ef3ff2 | 5169 | |
5170 | static void | |
35cb5232 | 5171 | store_constructor_field (rtx target, unsigned HOST_WIDE_INT bitsize, |
5172 | HOST_WIDE_INT bitpos, enum machine_mode mode, | |
32c2fdea | 5173 | tree exp, tree type, int cleared, |
5174 | alias_set_type alias_set) | |
e7ef3ff2 | 5175 | { |
5176 | if (TREE_CODE (exp) == CONSTRUCTOR | |
a6645eae | 5177 | /* We can only call store_constructor recursively if the size and |
5178 | bit position are on a byte boundary. */ | |
a5b7fc8b | 5179 | && bitpos % BITS_PER_UNIT == 0 |
a6645eae | 5180 | && (bitsize > 0 && bitsize % BITS_PER_UNIT == 0) |
6ef828f9 | 5181 | /* If we have a nonzero bitpos for a register target, then we just |
a5b7fc8b | 5182 | let store_field do the bitfield handling. This is unlikely to |
5183 | generate unnecessary clear instructions anyways. */ | |
e16ceb8e | 5184 | && (bitpos == 0 || MEM_P (target))) |
e7ef3ff2 | 5185 | { |
e16ceb8e | 5186 | if (MEM_P (target)) |
459b8611 | 5187 | target |
5188 | = adjust_address (target, | |
5189 | GET_MODE (target) == BLKmode | |
5190 | || 0 != (bitpos | |
5191 | % GET_MODE_ALIGNMENT (GET_MODE (target))) | |
5192 | ? BLKmode : VOIDmode, bitpos / BITS_PER_UNIT); | |
1179a68b | 5193 | |
5b90bb08 | 5194 | |
2c269e73 | 5195 | /* Update the alias set, if required. */ |
e16ceb8e | 5196 | if (MEM_P (target) && ! MEM_KEEP_ALIAS_SET_P (target) |
5cc193e7 | 5197 | && MEM_ALIAS_SET (target) != 0) |
86ce88aa | 5198 | { |
5199 | target = copy_rtx (target); | |
5200 | set_mem_alias_set (target, alias_set); | |
5201 | } | |
5b90bb08 | 5202 | |
e792f237 | 5203 | store_constructor (exp, target, cleared, bitsize / BITS_PER_UNIT); |
e7ef3ff2 | 5204 | } |
5205 | else | |
5b5037b3 | 5206 | store_field (target, bitsize, bitpos, mode, exp, type, alias_set, false); |
e7ef3ff2 | 5207 | } |
5208 | ||
10f307d9 | 5209 | /* Store the value of constructor EXP into the rtx TARGET. |
2c269e73 | 5210 | TARGET is either a REG or a MEM; we know it cannot conflict, since |
5211 | safe_from_p has been called. | |
e792f237 | 5212 | CLEARED is true if TARGET is known to have been zero'd. |
5213 | SIZE is the number of bytes of TARGET we are allowed to modify: this | |
a316ea6a | 5214 | may not be the same as the size of EXP if we are assigning to a field |
5215 | which has been packed to exclude padding bits. */ | |
10f307d9 | 5216 | |
5217 | static void | |
35cb5232 | 5218 | store_constructor (tree exp, rtx target, int cleared, HOST_WIDE_INT size) |
10f307d9 | 5219 | { |
2ef1e405 | 5220 | tree type = TREE_TYPE (exp); |
0bf16c4a | 5221 | #ifdef WORD_REGISTER_OPERATIONS |
3a6656ad | 5222 | HOST_WIDE_INT exp_size = int_size_in_bytes (type); |
0bf16c4a | 5223 | #endif |
2ef1e405 | 5224 | |
611234b4 | 5225 | switch (TREE_CODE (type)) |
10f307d9 | 5226 | { |
611234b4 | 5227 | case RECORD_TYPE: |
5228 | case UNION_TYPE: | |
5229 | case QUAL_UNION_TYPE: | |
5230 | { | |
c75b4594 | 5231 | unsigned HOST_WIDE_INT idx; |
5232 | tree field, value; | |
dbd14dc5 | 5233 | |
611234b4 | 5234 | /* If size is zero or the target is already cleared, do nothing. */ |
5235 | if (size == 0 || cleared) | |
dbd14dc5 | 5236 | cleared = 1; |
611234b4 | 5237 | /* We either clear the aggregate or indicate the value is dead. */ |
5238 | else if ((TREE_CODE (type) == UNION_TYPE | |
5239 | || TREE_CODE (type) == QUAL_UNION_TYPE) | |
5240 | && ! CONSTRUCTOR_ELTS (exp)) | |
5241 | /* If the constructor is empty, clear the union. */ | |
5242 | { | |
0b25db21 | 5243 | clear_storage (target, expr_size (exp), BLOCK_OP_NORMAL); |
611234b4 | 5244 | cleared = 1; |
5245 | } | |
10f307d9 | 5246 | |
611234b4 | 5247 | /* If we are building a static constructor into a register, |
5248 | set the initial value as zero so we can fold the value into | |
5249 | a constant. But if more than one register is involved, | |
5250 | this probably loses. */ | |
5251 | else if (REG_P (target) && TREE_STATIC (exp) | |
5252 | && GET_MODE_SIZE (GET_MODE (target)) <= UNITS_PER_WORD) | |
5253 | { | |
5254 | emit_move_insn (target, CONST0_RTX (GET_MODE (target))); | |
5255 | cleared = 1; | |
5256 | } | |
fa56dc1d | 5257 | |
611234b4 | 5258 | /* If the constructor has fewer fields than the structure or |
5259 | if we are initializing the structure to mostly zeros, clear | |
5260 | the whole structure first. Don't do this if TARGET is a | |
5261 | register whose mode size isn't equal to SIZE since | |
5262 | clear_storage can't handle this case. */ | |
5263 | else if (size > 0 | |
c75b4594 | 5264 | && (((int)VEC_length (constructor_elt, CONSTRUCTOR_ELTS (exp)) |
611234b4 | 5265 | != fields_length (type)) |
5266 | || mostly_zeros_p (exp)) | |
5267 | && (!REG_P (target) | |
5268 | || ((HOST_WIDE_INT) GET_MODE_SIZE (GET_MODE (target)) | |
5269 | == size))) | |
5270 | { | |
0b25db21 | 5271 | clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL); |
611234b4 | 5272 | cleared = 1; |
5273 | } | |
c869557a | 5274 | |
e8d1dcf2 | 5275 | if (REG_P (target) && !cleared) |
18b42941 | 5276 | emit_clobber (target); |
10f307d9 | 5277 | |
611234b4 | 5278 | /* Store each element of the constructor into the |
5279 | corresponding field of TARGET. */ | |
c75b4594 | 5280 | FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), idx, field, value) |
611234b4 | 5281 | { |
611234b4 | 5282 | enum machine_mode mode; |
5283 | HOST_WIDE_INT bitsize; | |
5284 | HOST_WIDE_INT bitpos = 0; | |
5285 | tree offset; | |
5286 | rtx to_rtx = target; | |
1f8b6002 | 5287 | |
611234b4 | 5288 | /* Just ignore missing fields. We cleared the whole |
5289 | structure, above, if any fields are missing. */ | |
5290 | if (field == 0) | |
5291 | continue; | |
1f8b6002 | 5292 | |
611234b4 | 5293 | if (cleared && initializer_zerop (value)) |
5294 | continue; | |
1f8b6002 | 5295 | |
611234b4 | 5296 | if (host_integerp (DECL_SIZE (field), 1)) |
5297 | bitsize = tree_low_cst (DECL_SIZE (field), 1); | |
5298 | else | |
5299 | bitsize = -1; | |
1f8b6002 | 5300 | |
611234b4 | 5301 | mode = DECL_MODE (field); |
5302 | if (DECL_BIT_FIELD (field)) | |
5303 | mode = VOIDmode; | |
1f8b6002 | 5304 | |
611234b4 | 5305 | offset = DECL_FIELD_OFFSET (field); |
5306 | if (host_integerp (offset, 0) | |
5307 | && host_integerp (bit_position (field), 0)) | |
5308 | { | |
5309 | bitpos = int_bit_position (field); | |
5310 | offset = 0; | |
5311 | } | |
5312 | else | |
5313 | bitpos = tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 0); | |
1f8b6002 | 5314 | |
611234b4 | 5315 | if (offset) |
5316 | { | |
98155838 | 5317 | enum machine_mode address_mode; |
611234b4 | 5318 | rtx offset_rtx; |
1f8b6002 | 5319 | |
611234b4 | 5320 | offset |
5321 | = SUBSTITUTE_PLACEHOLDER_IN_EXPR (offset, | |
5322 | make_tree (TREE_TYPE (exp), | |
5323 | target)); | |
5324 | ||
8ec3c5c2 | 5325 | offset_rtx = expand_normal (offset); |
611234b4 | 5326 | gcc_assert (MEM_P (to_rtx)); |
1f8b6002 | 5327 | |
98155838 | 5328 | address_mode |
5329 | = targetm.addr_space.address_mode (MEM_ADDR_SPACE (to_rtx)); | |
5330 | if (GET_MODE (offset_rtx) != address_mode) | |
5331 | offset_rtx = convert_to_mode (address_mode, offset_rtx, 0); | |
33ef2f52 | 5332 | |
611234b4 | 5333 | to_rtx = offset_address (to_rtx, offset_rtx, |
5334 | highest_pow2_factor (offset)); | |
5335 | } | |
7014838c | 5336 | |
e6860d27 | 5337 | #ifdef WORD_REGISTER_OPERATIONS |
611234b4 | 5338 | /* If this initializes a field that is smaller than a |
5339 | word, at the start of a word, try to widen it to a full | |
5340 | word. This special case allows us to output C++ member | |
5341 | function initializations in a form that the optimizers | |
5342 | can understand. */ | |
5343 | if (REG_P (target) | |
5344 | && bitsize < BITS_PER_WORD | |
5345 | && bitpos % BITS_PER_WORD == 0 | |
5346 | && GET_MODE_CLASS (mode) == MODE_INT | |
5347 | && TREE_CODE (value) == INTEGER_CST | |
5348 | && exp_size >= 0 | |
5349 | && bitpos + BITS_PER_WORD <= exp_size * BITS_PER_UNIT) | |
5350 | { | |
5351 | tree type = TREE_TYPE (value); | |
1f8b6002 | 5352 | |
611234b4 | 5353 | if (TYPE_PRECISION (type) < BITS_PER_WORD) |
5354 | { | |
5355 | type = lang_hooks.types.type_for_size | |
5356 | (BITS_PER_WORD, TYPE_UNSIGNED (type)); | |
e3b560a6 | 5357 | value = fold_convert (type, value); |
611234b4 | 5358 | } |
1f8b6002 | 5359 | |
611234b4 | 5360 | if (BYTES_BIG_ENDIAN) |
5361 | value | |
faa43f85 | 5362 | = fold_build2 (LSHIFT_EXPR, type, value, |
e3b560a6 | 5363 | build_int_cst (type, |
faa43f85 | 5364 | BITS_PER_WORD - bitsize)); |
611234b4 | 5365 | bitsize = BITS_PER_WORD; |
5366 | mode = word_mode; | |
5367 | } | |
e6860d27 | 5368 | #endif |
5cc193e7 | 5369 | |
611234b4 | 5370 | if (MEM_P (to_rtx) && !MEM_KEEP_ALIAS_SET_P (to_rtx) |
5371 | && DECL_NONADDRESSABLE_P (field)) | |
5372 | { | |
5373 | to_rtx = copy_rtx (to_rtx); | |
5374 | MEM_KEEP_ALIAS_SET_P (to_rtx) = 1; | |
5375 | } | |
1f8b6002 | 5376 | |
611234b4 | 5377 | store_constructor_field (to_rtx, bitsize, bitpos, mode, |
5378 | value, type, cleared, | |
5379 | get_alias_set (TREE_TYPE (field))); | |
5380 | } | |
5381 | break; | |
5382 | } | |
5383 | case ARRAY_TYPE: | |
5384 | { | |
c75b4594 | 5385 | tree value, index; |
5386 | unsigned HOST_WIDE_INT i; | |
611234b4 | 5387 | int need_to_clear; |
5388 | tree domain; | |
5389 | tree elttype = TREE_TYPE (type); | |
5390 | int const_bounds_p; | |
5391 | HOST_WIDE_INT minelt = 0; | |
5392 | HOST_WIDE_INT maxelt = 0; | |
5393 | ||
5394 | domain = TYPE_DOMAIN (type); | |
5395 | const_bounds_p = (TYPE_MIN_VALUE (domain) | |
5396 | && TYPE_MAX_VALUE (domain) | |
5397 | && host_integerp (TYPE_MIN_VALUE (domain), 0) | |
5398 | && host_integerp (TYPE_MAX_VALUE (domain), 0)); | |
5399 | ||
5400 | /* If we have constant bounds for the range of the type, get them. */ | |
5401 | if (const_bounds_p) | |
5402 | { | |
5403 | minelt = tree_low_cst (TYPE_MIN_VALUE (domain), 0); | |
5404 | maxelt = tree_low_cst (TYPE_MAX_VALUE (domain), 0); | |
5405 | } | |
4418a1d4 | 5406 | |
611234b4 | 5407 | /* If the constructor has fewer elements than the array, clear |
5408 | the whole array first. Similarly if this is static | |
5409 | constructor of a non-BLKmode object. */ | |
5410 | if (cleared) | |
5411 | need_to_clear = 0; | |
5412 | else if (REG_P (target) && TREE_STATIC (exp)) | |
5413 | need_to_clear = 1; | |
5414 | else | |
5415 | { | |
c75b4594 | 5416 | unsigned HOST_WIDE_INT idx; |
5417 | tree index, value; | |
611234b4 | 5418 | HOST_WIDE_INT count = 0, zero_count = 0; |
5419 | need_to_clear = ! const_bounds_p; | |
1f8b6002 | 5420 | |
611234b4 | 5421 | /* This loop is a more accurate version of the loop in |
5422 | mostly_zeros_p (it handles RANGE_EXPR in an index). It | |
5423 | is also needed to check for missing elements. */ | |
c75b4594 | 5424 | FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), idx, index, value) |
611234b4 | 5425 | { |
611234b4 | 5426 | HOST_WIDE_INT this_node_count; |
c75b4594 | 5427 | |
5428 | if (need_to_clear) | |
5429 | break; | |
1f8b6002 | 5430 | |
611234b4 | 5431 | if (index != NULL_TREE && TREE_CODE (index) == RANGE_EXPR) |
5432 | { | |
5433 | tree lo_index = TREE_OPERAND (index, 0); | |
5434 | tree hi_index = TREE_OPERAND (index, 1); | |
1f8b6002 | 5435 | |
611234b4 | 5436 | if (! host_integerp (lo_index, 1) |
5437 | || ! host_integerp (hi_index, 1)) | |
5438 | { | |
5439 | need_to_clear = 1; | |
5440 | break; | |
5441 | } | |
1f8b6002 | 5442 | |
611234b4 | 5443 | this_node_count = (tree_low_cst (hi_index, 1) |
5444 | - tree_low_cst (lo_index, 1) + 1); | |
5445 | } | |
5446 | else | |
5447 | this_node_count = 1; | |
1f8b6002 | 5448 | |
611234b4 | 5449 | count += this_node_count; |
c75b4594 | 5450 | if (mostly_zeros_p (value)) |
611234b4 | 5451 | zero_count += this_node_count; |
5452 | } | |
1f8b6002 | 5453 | |
611234b4 | 5454 | /* Clear the entire array first if there are any missing |
5455 | elements, or if the incidence of zero elements is >= | |
5456 | 75%. */ | |
5457 | if (! need_to_clear | |
5458 | && (count < maxelt - minelt + 1 | |
5459 | || 4 * zero_count >= 3 * count)) | |
5460 | need_to_clear = 1; | |
5461 | } | |
1f8b6002 | 5462 | |
611234b4 | 5463 | if (need_to_clear && size > 0) |
5464 | { | |
5465 | if (REG_P (target)) | |
5466 | emit_move_insn (target, CONST0_RTX (GET_MODE (target))); | |
5467 | else | |
0b25db21 | 5468 | clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL); |
611234b4 | 5469 | cleared = 1; |
5470 | } | |
4418a1d4 | 5471 | |
611234b4 | 5472 | if (!cleared && REG_P (target)) |
5473 | /* Inform later passes that the old value is dead. */ | |
18b42941 | 5474 | emit_clobber (target); |
4418a1d4 | 5475 | |
611234b4 | 5476 | /* Store each element of the constructor into the |
5477 | corresponding element of TARGET, determined by counting the | |
5478 | elements. */ | |
c75b4594 | 5479 | FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), i, index, value) |
611234b4 | 5480 | { |
5481 | enum machine_mode mode; | |
5482 | HOST_WIDE_INT bitsize; | |
5483 | HOST_WIDE_INT bitpos; | |
611234b4 | 5484 | rtx xtarget = target; |
1f8b6002 | 5485 | |
611234b4 | 5486 | if (cleared && initializer_zerop (value)) |
5487 | continue; | |
1f8b6002 | 5488 | |
611234b4 | 5489 | mode = TYPE_MODE (elttype); |
5490 | if (mode == BLKmode) | |
5491 | bitsize = (host_integerp (TYPE_SIZE (elttype), 1) | |
5492 | ? tree_low_cst (TYPE_SIZE (elttype), 1) | |
5493 | : -1); | |
5494 | else | |
5495 | bitsize = GET_MODE_BITSIZE (mode); | |
1f8b6002 | 5496 | |
611234b4 | 5497 | if (index != NULL_TREE && TREE_CODE (index) == RANGE_EXPR) |
5498 | { | |
5499 | tree lo_index = TREE_OPERAND (index, 0); | |
5500 | tree hi_index = TREE_OPERAND (index, 1); | |
5501 | rtx index_r, pos_rtx; | |
5502 | HOST_WIDE_INT lo, hi, count; | |
5503 | tree position; | |
1f8b6002 | 5504 | |
611234b4 | 5505 | /* If the range is constant and "small", unroll the loop. */ |
5506 | if (const_bounds_p | |
5507 | && host_integerp (lo_index, 0) | |
5508 | && host_integerp (hi_index, 0) | |
5509 | && (lo = tree_low_cst (lo_index, 0), | |
5510 | hi = tree_low_cst (hi_index, 0), | |
5511 | count = hi - lo + 1, | |
5512 | (!MEM_P (target) | |
5513 | || count <= 2 | |
5514 | || (host_integerp (TYPE_SIZE (elttype), 1) | |
5515 | && (tree_low_cst (TYPE_SIZE (elttype), 1) * count | |
5516 | <= 40 * 8))))) | |
5517 | { | |
5518 | lo -= minelt; hi -= minelt; | |
5519 | for (; lo <= hi; lo++) | |
5520 | { | |
5521 | bitpos = lo * tree_low_cst (TYPE_SIZE (elttype), 0); | |
1f8b6002 | 5522 | |
611234b4 | 5523 | if (MEM_P (target) |
5524 | && !MEM_KEEP_ALIAS_SET_P (target) | |
5525 | && TREE_CODE (type) == ARRAY_TYPE | |
5526 | && TYPE_NONALIASED_COMPONENT (type)) | |
5527 | { | |
5528 | target = copy_rtx (target); | |
5529 | MEM_KEEP_ALIAS_SET_P (target) = 1; | |
5530 | } | |
1f8b6002 | 5531 | |
611234b4 | 5532 | store_constructor_field |
5533 | (target, bitsize, bitpos, mode, value, type, cleared, | |
5534 | get_alias_set (elttype)); | |
5535 | } | |
5536 | } | |
5537 | else | |
5538 | { | |
5539 | rtx loop_start = gen_label_rtx (); | |
5540 | rtx loop_end = gen_label_rtx (); | |
5541 | tree exit_cond; | |
1f8b6002 | 5542 | |
8ec3c5c2 | 5543 | expand_normal (hi_index); |
1f8b6002 | 5544 | |
e60a6f7b | 5545 | index = build_decl (EXPR_LOCATION (exp), |
5546 | VAR_DECL, NULL_TREE, domain); | |
3b2411a8 | 5547 | index_r = gen_reg_rtx (promote_decl_mode (index, NULL)); |
611234b4 | 5548 | SET_DECL_RTL (index, index_r); |
5b5037b3 | 5549 | store_expr (lo_index, index_r, 0, false); |
1f8b6002 | 5550 | |
611234b4 | 5551 | /* Build the head of the loop. */ |
5552 | do_pending_stack_adjust (); | |
5553 | emit_label (loop_start); | |
5554 | ||
5555 | /* Assign value to element index. */ | |
e3b560a6 | 5556 | position = |
5557 | fold_convert (ssizetype, | |
5558 | fold_build2 (MINUS_EXPR, | |
5559 | TREE_TYPE (index), | |
5560 | index, | |
5561 | TYPE_MIN_VALUE (domain))); | |
5562 | ||
5563 | position = | |
5564 | size_binop (MULT_EXPR, position, | |
5565 | fold_convert (ssizetype, | |
5566 | TYPE_SIZE_UNIT (elttype))); | |
1f8b6002 | 5567 | |
8ec3c5c2 | 5568 | pos_rtx = expand_normal (position); |
611234b4 | 5569 | xtarget = offset_address (target, pos_rtx, |
5570 | highest_pow2_factor (position)); | |
5571 | xtarget = adjust_address (xtarget, mode, 0); | |
5572 | if (TREE_CODE (value) == CONSTRUCTOR) | |
5573 | store_constructor (value, xtarget, cleared, | |
5574 | bitsize / BITS_PER_UNIT); | |
5575 | else | |
5b5037b3 | 5576 | store_expr (value, xtarget, 0, false); |
611234b4 | 5577 | |
5578 | /* Generate a conditional jump to exit the loop. */ | |
5579 | exit_cond = build2 (LT_EXPR, integer_type_node, | |
5580 | index, hi_index); | |
79ab74cc | 5581 | jumpif (exit_cond, loop_end, -1); |
1f8b6002 | 5582 | |
611234b4 | 5583 | /* Update the loop counter, and jump to the head of |
5584 | the loop. */ | |
5585 | expand_assignment (index, | |
5586 | build2 (PLUS_EXPR, TREE_TYPE (index), | |
5b5037b3 | 5587 | index, integer_one_node), |
5588 | false); | |
1f8b6002 | 5589 | |
611234b4 | 5590 | emit_jump (loop_start); |
1f8b6002 | 5591 | |
611234b4 | 5592 | /* Build the end of the loop. */ |
5593 | emit_label (loop_end); | |
5594 | } | |
5595 | } | |
5596 | else if ((index != 0 && ! host_integerp (index, 0)) | |
5597 | || ! host_integerp (TYPE_SIZE (elttype), 1)) | |
5598 | { | |
5599 | tree position; | |
1f8b6002 | 5600 | |
611234b4 | 5601 | if (index == 0) |
5602 | index = ssize_int (1); | |
1f8b6002 | 5603 | |
611234b4 | 5604 | if (minelt) |
5605 | index = fold_convert (ssizetype, | |
faa43f85 | 5606 | fold_build2 (MINUS_EXPR, |
5607 | TREE_TYPE (index), | |
5608 | index, | |
5609 | TYPE_MIN_VALUE (domain))); | |
1f8b6002 | 5610 | |
e3b560a6 | 5611 | position = |
5612 | size_binop (MULT_EXPR, index, | |
5613 | fold_convert (ssizetype, | |
5614 | TYPE_SIZE_UNIT (elttype))); | |
611234b4 | 5615 | xtarget = offset_address (target, |
8ec3c5c2 | 5616 | expand_normal (position), |
611234b4 | 5617 | highest_pow2_factor (position)); |
5618 | xtarget = adjust_address (xtarget, mode, 0); | |
5b5037b3 | 5619 | store_expr (value, xtarget, 0, false); |
611234b4 | 5620 | } |
5621 | else | |
5622 | { | |
5623 | if (index != 0) | |
5624 | bitpos = ((tree_low_cst (index, 0) - minelt) | |
5625 | * tree_low_cst (TYPE_SIZE (elttype), 1)); | |
5626 | else | |
5627 | bitpos = (i * tree_low_cst (TYPE_SIZE (elttype), 1)); | |
1f8b6002 | 5628 | |
611234b4 | 5629 | if (MEM_P (target) && !MEM_KEEP_ALIAS_SET_P (target) |
5630 | && TREE_CODE (type) == ARRAY_TYPE | |
5631 | && TYPE_NONALIASED_COMPONENT (type)) | |
5632 | { | |
5633 | target = copy_rtx (target); | |
5634 | MEM_KEEP_ALIAS_SET_P (target) = 1; | |
5635 | } | |
5636 | store_constructor_field (target, bitsize, bitpos, mode, value, | |
5637 | type, cleared, get_alias_set (elttype)); | |
5638 | } | |
5639 | } | |
5640 | break; | |
5641 | } | |
4418a1d4 | 5642 | |
611234b4 | 5643 | case VECTOR_TYPE: |
5644 | { | |
c75b4594 | 5645 | unsigned HOST_WIDE_INT idx; |
5646 | constructor_elt *ce; | |
611234b4 | 5647 | int i; |
5648 | int need_to_clear; | |
5649 | int icode = 0; | |
5650 | tree elttype = TREE_TYPE (type); | |
5651 | int elt_size = tree_low_cst (TYPE_SIZE (elttype), 1); | |
5652 | enum machine_mode eltmode = TYPE_MODE (elttype); | |
5653 | HOST_WIDE_INT bitsize; | |
5654 | HOST_WIDE_INT bitpos; | |
9c1b832c | 5655 | rtvec vector = NULL; |
611234b4 | 5656 | unsigned n_elts; |
4eaf1e94 | 5657 | alias_set_type alias; |
1f8b6002 | 5658 | |
611234b4 | 5659 | gcc_assert (eltmode != BLKmode); |
1f8b6002 | 5660 | |
611234b4 | 5661 | n_elts = TYPE_VECTOR_SUBPARTS (type); |
5662 | if (REG_P (target) && VECTOR_MODE_P (GET_MODE (target))) | |
5663 | { | |
5664 | enum machine_mode mode = GET_MODE (target); | |
1f8b6002 | 5665 | |
d6bf3b14 | 5666 | icode = (int) optab_handler (vec_init_optab, mode); |
611234b4 | 5667 | if (icode != CODE_FOR_nothing) |
5668 | { | |
5669 | unsigned int i; | |
1f8b6002 | 5670 | |
9c1b832c | 5671 | vector = rtvec_alloc (n_elts); |
611234b4 | 5672 | for (i = 0; i < n_elts; i++) |
9c1b832c | 5673 | RTVEC_ELT (vector, i) = CONST0_RTX (GET_MODE_INNER (mode)); |
611234b4 | 5674 | } |
5675 | } | |
1f8b6002 | 5676 | |
611234b4 | 5677 | /* If the constructor has fewer elements than the vector, |
5678 | clear the whole array first. Similarly if this is static | |
5679 | constructor of a non-BLKmode object. */ | |
5680 | if (cleared) | |
5681 | need_to_clear = 0; | |
5682 | else if (REG_P (target) && TREE_STATIC (exp)) | |
5683 | need_to_clear = 1; | |
5684 | else | |
5685 | { | |
5686 | unsigned HOST_WIDE_INT count = 0, zero_count = 0; | |
c75b4594 | 5687 | tree value; |
1f8b6002 | 5688 | |
c75b4594 | 5689 | FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp), idx, value) |
611234b4 | 5690 | { |
5691 | int n_elts_here = tree_low_cst | |
5692 | (int_const_binop (TRUNC_DIV_EXPR, | |
c75b4594 | 5693 | TYPE_SIZE (TREE_TYPE (value)), |
611234b4 | 5694 | TYPE_SIZE (elttype), 0), 1); |
1f8b6002 | 5695 | |
611234b4 | 5696 | count += n_elts_here; |
c75b4594 | 5697 | if (mostly_zeros_p (value)) |
611234b4 | 5698 | zero_count += n_elts_here; |
5699 | } | |
4418a1d4 | 5700 | |
611234b4 | 5701 | /* Clear the entire vector first if there are any missing elements, |
5702 | or if the incidence of zero elements is >= 75%. */ | |
5703 | need_to_clear = (count < n_elts || 4 * zero_count >= 3 * count); | |
5704 | } | |
1f8b6002 | 5705 | |
611234b4 | 5706 | if (need_to_clear && size > 0 && !vector) |
5707 | { | |
5708 | if (REG_P (target)) | |
4eaf1e94 | 5709 | emit_move_insn (target, CONST0_RTX (GET_MODE (target))); |
611234b4 | 5710 | else |
0b25db21 | 5711 | clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL); |
611234b4 | 5712 | cleared = 1; |
5713 | } | |
1f8b6002 | 5714 | |
49f312aa | 5715 | /* Inform later passes that the old value is dead. */ |
1abf6b04 | 5716 | if (!cleared && !vector && REG_P (target)) |
49f312aa | 5717 | emit_move_insn (target, CONST0_RTX (GET_MODE (target))); |
611234b4 | 5718 | |
4eaf1e94 | 5719 | if (MEM_P (target)) |
5720 | alias = MEM_ALIAS_SET (target); | |
5721 | else | |
5722 | alias = get_alias_set (elttype); | |
5723 | ||
611234b4 | 5724 | /* Store each element of the constructor into the corresponding |
5725 | element of TARGET, determined by counting the elements. */ | |
c75b4594 | 5726 | for (idx = 0, i = 0; |
5727 | VEC_iterate (constructor_elt, CONSTRUCTOR_ELTS (exp), idx, ce); | |
5728 | idx++, i += bitsize / elt_size) | |
611234b4 | 5729 | { |
611234b4 | 5730 | HOST_WIDE_INT eltpos; |
c75b4594 | 5731 | tree value = ce->value; |
1f8b6002 | 5732 | |
611234b4 | 5733 | bitsize = tree_low_cst (TYPE_SIZE (TREE_TYPE (value)), 1); |
5734 | if (cleared && initializer_zerop (value)) | |
5735 | continue; | |
1f8b6002 | 5736 | |
c75b4594 | 5737 | if (ce->index) |
5738 | eltpos = tree_low_cst (ce->index, 1); | |
611234b4 | 5739 | else |
5740 | eltpos = i; | |
1f8b6002 | 5741 | |
611234b4 | 5742 | if (vector) |
5743 | { | |
5744 | /* Vector CONSTRUCTORs should only be built from smaller | |
5745 | vectors in the case of BLKmode vectors. */ | |
5746 | gcc_assert (TREE_CODE (TREE_TYPE (value)) != VECTOR_TYPE); | |
9c1b832c | 5747 | RTVEC_ELT (vector, eltpos) |
8ec3c5c2 | 5748 | = expand_normal (value); |
611234b4 | 5749 | } |
5750 | else | |
5751 | { | |
5752 | enum machine_mode value_mode = | |
5753 | TREE_CODE (TREE_TYPE (value)) == VECTOR_TYPE | |
4418a1d4 | 5754 | ? TYPE_MODE (TREE_TYPE (value)) |
5755 | : eltmode; | |
611234b4 | 5756 | bitpos = eltpos * elt_size; |
5757 | store_constructor_field (target, bitsize, bitpos, | |
5758 | value_mode, value, type, | |
4eaf1e94 | 5759 | cleared, alias); |
611234b4 | 5760 | } |
5761 | } | |
1f8b6002 | 5762 | |
611234b4 | 5763 | if (vector) |
5764 | emit_insn (GEN_FCN (icode) | |
5765 | (target, | |
9c1b832c | 5766 | gen_rtx_PARALLEL (GET_MODE (target), vector))); |
611234b4 | 5767 | break; |
5768 | } | |
1f8b6002 | 5769 | |
611234b4 | 5770 | default: |
5771 | gcc_unreachable (); | |
97b2af42 | 5772 | } |
10f307d9 | 5773 | } |
5774 | ||
5775 | /* Store the value of EXP (an expression tree) | |
5776 | into a subfield of TARGET which has mode MODE and occupies | |
5777 | BITSIZE bits, starting BITPOS bits from the start of TARGET. | |
5778 | If MODE is VOIDmode, it means that we are storing into a bit-field. | |
5779 | ||
58f9138c | 5780 | Always return const0_rtx unless we have something particular to |
5781 | return. | |
10f307d9 | 5782 | |
2b96c5f6 | 5783 | TYPE is the type of the underlying object, |
1e2513d9 | 5784 | |
5785 | ALIAS_SET is the alias set for the destination. This value will | |
5786 | (in general) be different from that for TARGET, since TARGET is a | |
5b5037b3 | 5787 | reference to the containing structure. |
48e1416a | 5788 | |
5b5037b3 | 5789 | If NONTEMPORAL is true, try generating a nontemporal store. */ |
10f307d9 | 5790 | |
5791 | static rtx | |
35cb5232 | 5792 | store_field (rtx target, HOST_WIDE_INT bitsize, HOST_WIDE_INT bitpos, |
32c2fdea | 5793 | enum machine_mode mode, tree exp, tree type, |
5794 | alias_set_type alias_set, bool nontemporal) | |
10f307d9 | 5795 | { |
0dbd1c74 | 5796 | if (TREE_CODE (exp) == ERROR_MARK) |
5797 | return const0_rtx; | |
5798 | ||
55e9836d | 5799 | /* If we have nothing to store, do nothing unless the expression has |
5800 | side-effects. */ | |
5801 | if (bitsize == 0) | |
1db6d067 | 5802 | return expand_expr (exp, const0_rtx, VOIDmode, EXPAND_NORMAL); |
10f307d9 | 5803 | |
5804 | /* If we are storing into an unaligned field of an aligned union that is | |
5805 | in a register, we may have the mode of TARGET being an integer mode but | |
5806 | MODE == BLKmode. In that case, get an aligned object whose size and | |
5807 | alignment are the same as TARGET and store TARGET into it (we can avoid | |
5808 | the store if the field being stored is the entire width of TARGET). Then | |
5809 | call ourselves recursively to store the field into a BLKmode version of | |
5810 | that object. Finally, load from the object into TARGET. This is not | |
5811 | very efficient in general, but should only be slightly more expensive | |
5812 | than the otherwise-required unaligned accesses. Perhaps this can be | |
d2e73365 | 5813 | cleaned up later. It's tempting to make OBJECT readonly, but it's set |
5814 | twice, once with emit_move_insn and once via store_field. */ | |
10f307d9 | 5815 | |
5816 | if (mode == BLKmode | |
8ad4c111 | 5817 | && (REG_P (target) || GET_CODE (target) == SUBREG)) |
10f307d9 | 5818 | { |
d2e73365 | 5819 | rtx object = assign_temp (type, 0, 1, 1); |
7a827396 | 5820 | rtx blk_object = adjust_address (object, BLKmode, 0); |
10f307d9 | 5821 | |
e1439bcb | 5822 | if (bitsize != (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (target))) |
10f307d9 | 5823 | emit_move_insn (object, target); |
5824 | ||
5b5037b3 | 5825 | store_field (blk_object, bitsize, bitpos, mode, exp, type, alias_set, |
5826 | nontemporal); | |
10f307d9 | 5827 | |
5828 | emit_move_insn (target, object); | |
5829 | ||
2b96c5f6 | 5830 | /* We want to return the BLKmode version of the data. */ |
559a13ea | 5831 | return blk_object; |
10f307d9 | 5832 | } |
efd3939c | 5833 | |
5834 | if (GET_CODE (target) == CONCAT) | |
5835 | { | |
5836 | /* We're storing into a struct containing a single __complex. */ | |
5837 | ||
611234b4 | 5838 | gcc_assert (!bitpos); |
5b5037b3 | 5839 | return store_expr (exp, target, 0, nontemporal); |
efd3939c | 5840 | } |
10f307d9 | 5841 | |
5842 | /* If the structure is in a register or if the component | |
5843 | is a bit field, we cannot use addressing to access it. | |
5844 | Use bit-field techniques or SUBREG to store in it. */ | |
5845 | ||
07edfa02 | 5846 | if (mode == VOIDmode |
03519f22 | 5847 | || (mode != BLKmode && ! direct_store[(int) mode] |
5848 | && GET_MODE_CLASS (mode) != MODE_COMPLEX_INT | |
5849 | && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT) | |
8ad4c111 | 5850 | || REG_P (target) |
66aa258b | 5851 | || GET_CODE (target) == SUBREG |
4e05e574 | 5852 | /* If the field isn't aligned enough to store as an ordinary memref, |
5853 | store it as a bit field. */ | |
9a0db358 | 5854 | || (mode != BLKmode |
8f6f6bc8 | 5855 | && ((((MEM_ALIGN (target) < GET_MODE_ALIGNMENT (mode)) |
5856 | || bitpos % GET_MODE_ALIGNMENT (mode)) | |
5857 | && SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (target))) | |
35cb5232 | 5858 | || (bitpos % BITS_PER_UNIT != 0))) |
155b05dc | 5859 | /* If the RHS and field are a constant size and the size of the |
5860 | RHS isn't the same size as the bitfield, we must use bitfield | |
5861 | operations. */ | |
a0c2c45b | 5862 | || (bitsize >= 0 |
5863 | && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST | |
182cf5a9 | 5864 | && compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)), bitsize) != 0) |
5865 | /* If we are expanding a MEM_REF of a non-BLKmode non-addressable | |
5866 | decl we must use bitfield operations. */ | |
5867 | || (bitsize >= 0 | |
5868 | && TREE_CODE (exp) == MEM_REF | |
5869 | && TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR | |
5870 | && DECL_P (TREE_OPERAND (TREE_OPERAND (exp, 0), 0)) | |
5871 | && !TREE_ADDRESSABLE (TREE_OPERAND (TREE_OPERAND (exp, 0),0 )) | |
5872 | && DECL_MODE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0)) != BLKmode)) | |
10f307d9 | 5873 | { |
24bdc387 | 5874 | rtx temp; |
c1a83279 | 5875 | gimple nop_def; |
24bdc387 | 5876 | |
5877 | /* If EXP is a NOP_EXPR of precision less than its mode, then that | |
5878 | implies a mask operation. If the precision is the same size as | |
5879 | the field we're storing into, that mask is redundant. This is | |
5880 | particularly common with bit field assignments generated by the | |
5881 | C front end. */ | |
c1a83279 | 5882 | nop_def = get_def_for_expr (exp, NOP_EXPR); |
5883 | if (nop_def) | |
60fb4601 | 5884 | { |
5885 | tree type = TREE_TYPE (exp); | |
5886 | if (INTEGRAL_TYPE_P (type) | |
5887 | && TYPE_PRECISION (type) < GET_MODE_BITSIZE (TYPE_MODE (type)) | |
5888 | && bitsize == TYPE_PRECISION (type)) | |
5889 | { | |
c1a83279 | 5890 | tree op = gimple_assign_rhs1 (nop_def); |
5891 | type = TREE_TYPE (op); | |
60fb4601 | 5892 | if (INTEGRAL_TYPE_P (type) && TYPE_PRECISION (type) >= bitsize) |
c1a83279 | 5893 | exp = op; |
60fb4601 | 5894 | } |
5895 | } | |
24bdc387 | 5896 | |
8ec3c5c2 | 5897 | temp = expand_normal (exp); |
97d7f645 | 5898 | |
0aa5cbcc | 5899 | /* If BITSIZE is narrower than the size of the type of EXP |
5900 | we will be narrowing TEMP. Normally, what's wanted are the | |
5901 | low-order bits. However, if EXP's type is a record and this is | |
5902 | big-endian machine, we want the upper BITSIZE bits. */ | |
5903 | if (BYTES_BIG_ENDIAN && GET_MODE_CLASS (GET_MODE (temp)) == MODE_INT | |
cce8da2f | 5904 | && bitsize < (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (temp)) |
0aa5cbcc | 5905 | && TREE_CODE (TREE_TYPE (exp)) == RECORD_TYPE) |
5906 | temp = expand_shift (RSHIFT_EXPR, GET_MODE (temp), temp, | |
5907 | size_int (GET_MODE_BITSIZE (GET_MODE (temp)) | |
5908 | - bitsize), | |
8a348c93 | 5909 | NULL_RTX, 1); |
0aa5cbcc | 5910 | |
97d7f645 | 5911 | /* Unless MODE is VOIDmode or BLKmode, convert TEMP to |
5912 | MODE. */ | |
5913 | if (mode != VOIDmode && mode != BLKmode | |
5914 | && mode != TYPE_MODE (TREE_TYPE (exp))) | |
5915 | temp = convert_modes (mode, TYPE_MODE (TREE_TYPE (exp)), temp, 1); | |
5916 | ||
3bfa8ada | 5917 | /* If the modes of TEMP and TARGET are both BLKmode, both |
0e20f9fb | 5918 | must be in memory and BITPOS must be aligned on a byte |
3bfa8ada | 5919 | boundary. If so, we simply do a block copy. Likewise |
5920 | for a BLKmode-like TARGET. */ | |
5921 | if (GET_MODE (temp) == BLKmode | |
5922 | && (GET_MODE (target) == BLKmode | |
5923 | || (MEM_P (target) | |
5924 | && GET_MODE_CLASS (GET_MODE (target)) == MODE_INT | |
5925 | && (bitpos % BITS_PER_UNIT) == 0 | |
5926 | && (bitsize % BITS_PER_UNIT) == 0))) | |
0e20f9fb | 5927 | { |
611234b4 | 5928 | gcc_assert (MEM_P (target) && MEM_P (temp) |
3bfa8ada | 5929 | && (bitpos % BITS_PER_UNIT) == 0); |
0e20f9fb | 5930 | |
e513d163 | 5931 | target = adjust_address (target, VOIDmode, bitpos / BITS_PER_UNIT); |
0e20f9fb | 5932 | emit_block_move (target, temp, |
2b96c5f6 | 5933 | GEN_INT ((bitsize + BITS_PER_UNIT - 1) |
0378dbdc | 5934 | / BITS_PER_UNIT), |
5935 | BLOCK_OP_NORMAL); | |
0e20f9fb | 5936 | |
58f9138c | 5937 | return const0_rtx; |
0e20f9fb | 5938 | } |
5939 | ||
10f307d9 | 5940 | /* Store the value in the bitfield. */ |
1445ea5b | 5941 | store_bit_field (target, bitsize, bitpos, mode, temp); |
2b96c5f6 | 5942 | |
10f307d9 | 5943 | return const0_rtx; |
5944 | } | |
5945 | else | |
5946 | { | |
10f307d9 | 5947 | /* Now build a reference to just the desired component. */ |
58f9138c | 5948 | rtx to_rtx = adjust_address (target, mode, bitpos / BITS_PER_UNIT); |
2b96c5f6 | 5949 | |
5950 | if (to_rtx == target) | |
5951 | to_rtx = copy_rtx (to_rtx); | |
537ffcfc | 5952 | |
a7101bd3 | 5953 | if (!MEM_SCALAR_P (to_rtx)) |
5954 | MEM_IN_STRUCT_P (to_rtx) = 1; | |
5cc193e7 | 5955 | if (!MEM_KEEP_ALIAS_SET_P (to_rtx) && MEM_ALIAS_SET (to_rtx) != 0) |
2b96c5f6 | 5956 | set_mem_alias_set (to_rtx, alias_set); |
10f307d9 | 5957 | |
5b5037b3 | 5958 | return store_expr (exp, to_rtx, 0, nontemporal); |
10f307d9 | 5959 | } |
5960 | } | |
5961 | \f | |
5962 | /* Given an expression EXP that may be a COMPONENT_REF, a BIT_FIELD_REF, | |
ba04d9d5 | 5963 | an ARRAY_REF, or an ARRAY_RANGE_REF, look for nested operations of these |
5964 | codes and find the ultimate containing object, which we return. | |
10f307d9 | 5965 | |
5966 | We set *PBITSIZE to the size in bits that we want, *PBITPOS to the | |
5967 | bit position, and *PUNSIGNEDP to the signedness of the field. | |
954bdcb1 | 5968 | If the position of the field is variable, we store a tree |
5969 | giving the variable offset (in units) in *POFFSET. | |
5970 | This offset is in addition to the bit position. | |
5971 | If the position is not variable, we store 0 in *POFFSET. | |
10f307d9 | 5972 | |
5973 | If any of the extraction expressions is volatile, | |
5974 | we store 1 in *PVOLATILEP. Otherwise we don't change that. | |
5975 | ||
3bfa8ada | 5976 | If the field is a non-BLKmode bit-field, *PMODE is set to VOIDmode. |
5977 | Otherwise, it is a mode that can be used to access the field. | |
01ab6370 | 5978 | |
5979 | If the field describes a variable-sized object, *PMODE is set to | |
3bfa8ada | 5980 | BLKmode and *PBITSIZE is set to -1. An access cannot be made in |
e7e9416e | 5981 | this case, but the address of the object can be found. |
5982 | ||
5983 | If KEEP_ALIGNING is true and the target is STRICT_ALIGNMENT, we don't | |
5984 | look through nodes that serve as markers of a greater alignment than | |
5985 | the one that can be deduced from the expression. These nodes make it | |
5986 | possible for front-ends to prevent temporaries from being created by | |
5987 | the middle-end on alignment considerations. For that purpose, the | |
5988 | normal operating mode at high-level is to always pass FALSE so that | |
5989 | the ultimate containing object is really returned; moreover, the | |
5990 | associated predicate handled_component_p will always return TRUE | |
5991 | on these nodes, thus indicating that they are essentially handled | |
5992 | by get_inner_reference. TRUE should only be passed when the caller | |
5993 | is scanning the expression in order to build another representation | |
5994 | and specifically knows how to handle these nodes; as such, this is | |
5995 | the normal operating mode in the RTL expanders. */ | |
10f307d9 | 5996 | |
5997 | tree | |
35cb5232 | 5998 | get_inner_reference (tree exp, HOST_WIDE_INT *pbitsize, |
5999 | HOST_WIDE_INT *pbitpos, tree *poffset, | |
6000 | enum machine_mode *pmode, int *punsignedp, | |
e7e9416e | 6001 | int *pvolatilep, bool keep_aligning) |
10f307d9 | 6002 | { |
6003 | tree size_tree = 0; | |
6004 | enum machine_mode mode = VOIDmode; | |
3bfa8ada | 6005 | bool blkmode_bitfield = false; |
902de8ed | 6006 | tree offset = size_zero_node; |
07e3326b | 6007 | double_int bit_offset = double_int_zero; |
10f307d9 | 6008 | |
02e7a332 | 6009 | /* First get the mode, signedness, and size. We do this from just the |
6010 | outermost expression. */ | |
b21392bb | 6011 | *pbitsize = -1; |
10f307d9 | 6012 | if (TREE_CODE (exp) == COMPONENT_REF) |
6013 | { | |
3bfa8ada | 6014 | tree field = TREE_OPERAND (exp, 1); |
6015 | size_tree = DECL_SIZE (field); | |
6016 | if (!DECL_BIT_FIELD (field)) | |
6017 | mode = DECL_MODE (field); | |
6018 | else if (DECL_MODE (field) == BLKmode) | |
6019 | blkmode_bitfield = true; | |
a420d927 | 6020 | else if (TREE_THIS_VOLATILE (exp) |
6021 | && flag_strict_volatile_bitfields > 0) | |
6022 | /* Volatile bitfields should be accessed in the mode of the | |
6023 | field's type, not the mode computed based on the bit | |
6024 | size. */ | |
6025 | mode = TYPE_MODE (DECL_BIT_FIELD_TYPE (field)); | |
3bfa8ada | 6026 | |
6027 | *punsignedp = DECL_UNSIGNED (field); | |
10f307d9 | 6028 | } |
6029 | else if (TREE_CODE (exp) == BIT_FIELD_REF) | |
6030 | { | |
6031 | size_tree = TREE_OPERAND (exp, 1); | |
70337474 | 6032 | *punsignedp = (! INTEGRAL_TYPE_P (TREE_TYPE (exp)) |
6033 | || TYPE_UNSIGNED (TREE_TYPE (exp))); | |
1f8b6002 | 6034 | |
8ea8de24 | 6035 | /* For vector types, with the correct size of access, use the mode of |
6036 | inner type. */ | |
6037 | if (TREE_CODE (TREE_TYPE (TREE_OPERAND (exp, 0))) == VECTOR_TYPE | |
6038 | && TREE_TYPE (exp) == TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0))) | |
6039 | && tree_int_cst_equal (size_tree, TYPE_SIZE (TREE_TYPE (exp)))) | |
6040 | mode = TYPE_MODE (TREE_TYPE (exp)); | |
10f307d9 | 6041 | } |
6042 | else | |
6043 | { | |
6044 | mode = TYPE_MODE (TREE_TYPE (exp)); | |
78a8ed03 | 6045 | *punsignedp = TYPE_UNSIGNED (TREE_TYPE (exp)); |
02e7a332 | 6046 | |
be2828ce | 6047 | if (mode == BLKmode) |
6048 | size_tree = TYPE_SIZE (TREE_TYPE (exp)); | |
02e7a332 | 6049 | else |
6050 | *pbitsize = GET_MODE_BITSIZE (mode); | |
10f307d9 | 6051 | } |
fa56dc1d | 6052 | |
02e7a332 | 6053 | if (size_tree != 0) |
10f307d9 | 6054 | { |
02e7a332 | 6055 | if (! host_integerp (size_tree, 1)) |
01ab6370 | 6056 | mode = BLKmode, *pbitsize = -1; |
6057 | else | |
02e7a332 | 6058 | *pbitsize = tree_low_cst (size_tree, 1); |
10f307d9 | 6059 | } |
6060 | ||
6061 | /* Compute cumulative bit-offset for nested component-refs and array-refs, | |
6062 | and find the ultimate containing object. */ | |
10f307d9 | 6063 | while (1) |
6064 | { | |
1f9b622b | 6065 | switch (TREE_CODE (exp)) |
10f307d9 | 6066 | { |
1f9b622b | 6067 | case BIT_FIELD_REF: |
07e3326b | 6068 | bit_offset |
6069 | = double_int_add (bit_offset, | |
6070 | tree_to_double_int (TREE_OPERAND (exp, 2))); | |
1f9b622b | 6071 | break; |
10f307d9 | 6072 | |
1f9b622b | 6073 | case COMPONENT_REF: |
6074 | { | |
6075 | tree field = TREE_OPERAND (exp, 1); | |
6076 | tree this_offset = component_ref_field_offset (exp); | |
227bf826 | 6077 | |
1f9b622b | 6078 | /* If this field hasn't been filled in yet, don't go past it. |
6079 | This should only happen when folding expressions made during | |
6080 | type construction. */ | |
6081 | if (this_offset == 0) | |
6082 | break; | |
75f7b24f | 6083 | |
1f9b622b | 6084 | offset = size_binop (PLUS_EXPR, offset, this_offset); |
07e3326b | 6085 | bit_offset = double_int_add (bit_offset, |
6086 | tree_to_double_int | |
6087 | (DECL_FIELD_BIT_OFFSET (field))); | |
7114c815 | 6088 | |
1f9b622b | 6089 | /* ??? Right now we don't do anything with DECL_OFFSET_ALIGN. */ |
6090 | } | |
6091 | break; | |
7114c815 | 6092 | |
1f9b622b | 6093 | case ARRAY_REF: |
6094 | case ARRAY_RANGE_REF: | |
6095 | { | |
6096 | tree index = TREE_OPERAND (exp, 1); | |
6097 | tree low_bound = array_ref_low_bound (exp); | |
6098 | tree unit_size = array_ref_element_size (exp); | |
6099 | ||
6100 | /* We assume all arrays have sizes that are a multiple of a byte. | |
6101 | First subtract the lower bound, if any, in the type of the | |
6102 | index, then convert to sizetype and multiply by the size of | |
6103 | the array element. */ | |
6104 | if (! integer_zerop (low_bound)) | |
faa43f85 | 6105 | index = fold_build2 (MINUS_EXPR, TREE_TYPE (index), |
6106 | index, low_bound); | |
1f9b622b | 6107 | |
6108 | offset = size_binop (PLUS_EXPR, offset, | |
6109 | size_binop (MULT_EXPR, | |
e3b560a6 | 6110 | fold_convert (sizetype, index), |
1f9b622b | 6111 | unit_size)); |
6112 | } | |
6113 | break; | |
6114 | ||
6115 | case REALPART_EXPR: | |
1f9b622b | 6116 | break; |
6117 | ||
6118 | case IMAGPART_EXPR: | |
07e3326b | 6119 | bit_offset = double_int_add (bit_offset, |
6120 | uhwi_to_double_int (*pbitsize)); | |
1f9b622b | 6121 | break; |
6122 | ||
1f9b622b | 6123 | case VIEW_CONVERT_EXPR: |
e7e9416e | 6124 | if (keep_aligning && STRICT_ALIGNMENT |
6125 | && (TYPE_ALIGN (TREE_TYPE (exp)) | |
1f9b622b | 6126 | > TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (exp, 0)))) |
1f9b622b | 6127 | && (TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (exp, 0))) |
6128 | < BIGGEST_ALIGNMENT) | |
6129 | && (TYPE_ALIGN_OK (TREE_TYPE (exp)) | |
6130 | || TYPE_ALIGN_OK (TREE_TYPE (TREE_OPERAND (exp, 0))))) | |
6131 | goto done; | |
6132 | break; | |
6133 | ||
182cf5a9 | 6134 | case MEM_REF: |
6135 | /* Hand back the decl for MEM[&decl, off]. */ | |
6136 | if (TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR) | |
6137 | { | |
6138 | tree off = TREE_OPERAND (exp, 1); | |
6139 | if (!integer_zerop (off)) | |
6140 | { | |
6141 | double_int boff, coff = mem_ref_offset (exp); | |
6142 | boff = double_int_lshift (coff, | |
6143 | BITS_PER_UNIT == 8 | |
6144 | ? 3 : exact_log2 (BITS_PER_UNIT), | |
6145 | HOST_BITS_PER_DOUBLE_INT, true); | |
6146 | bit_offset = double_int_add (bit_offset, boff); | |
6147 | } | |
6148 | exp = TREE_OPERAND (TREE_OPERAND (exp, 0), 0); | |
6149 | } | |
6150 | goto done; | |
6151 | ||
1f9b622b | 6152 | default: |
6153 | goto done; | |
6154 | } | |
954bdcb1 | 6155 | |
6156 | /* If any reference in the chain is volatile, the effect is volatile. */ | |
6157 | if (TREE_THIS_VOLATILE (exp)) | |
6158 | *pvolatilep = 1; | |
7fce34be | 6159 | |
10f307d9 | 6160 | exp = TREE_OPERAND (exp, 0); |
6161 | } | |
1f9b622b | 6162 | done: |
10f307d9 | 6163 | |
02e7a332 | 6164 | /* If OFFSET is constant, see if we can return the whole thing as a |
85a32bdb | 6165 | constant bit position. Make sure to handle overflow during |
6166 | this conversion. */ | |
6167 | if (host_integerp (offset, 0)) | |
6168 | { | |
07e3326b | 6169 | double_int tem = double_int_lshift (tree_to_double_int (offset), |
6170 | BITS_PER_UNIT == 8 | |
6171 | ? 3 : exact_log2 (BITS_PER_UNIT), | |
6172 | HOST_BITS_PER_DOUBLE_INT, true); | |
6173 | tem = double_int_add (tem, bit_offset); | |
85a32bdb | 6174 | if (double_int_fits_in_shwi_p (tem)) |
6175 | { | |
6176 | *pbitpos = double_int_to_shwi (tem); | |
3bfa8ada | 6177 | *poffset = offset = NULL_TREE; |
85a32bdb | 6178 | } |
6179 | } | |
6180 | ||
6181 | /* Otherwise, split it up. */ | |
3bfa8ada | 6182 | if (offset) |
6183 | { | |
07e3326b | 6184 | *pbitpos = double_int_to_shwi (bit_offset); |
3bfa8ada | 6185 | *poffset = offset; |
6186 | } | |
6187 | ||
6188 | /* We can use BLKmode for a byte-aligned BLKmode bitfield. */ | |
6189 | if (mode == VOIDmode | |
6190 | && blkmode_bitfield | |
6191 | && (*pbitpos % BITS_PER_UNIT) == 0 | |
6192 | && (*pbitsize % BITS_PER_UNIT) == 0) | |
6193 | *pmode = BLKmode; | |
6194 | else | |
6195 | *pmode = mode; | |
c869557a | 6196 | |
10f307d9 | 6197 | return exp; |
6198 | } | |
eb4b06b6 | 6199 | |
5e19919e | 6200 | /* Given an expression EXP that may be a COMPONENT_REF, an ARRAY_REF or an |
6201 | ARRAY_RANGE_REF, look for whether EXP or any nested component-refs within | |
6202 | EXP is marked as PACKED. */ | |
5a2538e1 | 6203 | |
6204 | bool | |
b7bf20db | 6205 | contains_packed_reference (const_tree exp) |
5a2538e1 | 6206 | { |
6207 | bool packed_p = false; | |
6208 | ||
6209 | while (1) | |
6210 | { | |
6211 | switch (TREE_CODE (exp)) | |
6212 | { | |
6213 | case COMPONENT_REF: | |
6214 | { | |
6215 | tree field = TREE_OPERAND (exp, 1); | |
48e1416a | 6216 | packed_p = DECL_PACKED (field) |
5a2538e1 | 6217 | || TYPE_PACKED (TREE_TYPE (field)) |
6218 | || TYPE_PACKED (TREE_TYPE (exp)); | |
6219 | if (packed_p) | |
6220 | goto done; | |
6221 | } | |
6222 | break; | |
6223 | ||
6224 | case BIT_FIELD_REF: | |
6225 | case ARRAY_REF: | |
6226 | case ARRAY_RANGE_REF: | |
6227 | case REALPART_EXPR: | |
6228 | case IMAGPART_EXPR: | |
6229 | case VIEW_CONVERT_EXPR: | |
6230 | break; | |
6231 | ||
6232 | default: | |
6233 | goto done; | |
6234 | } | |
6235 | exp = TREE_OPERAND (exp, 0); | |
6236 | } | |
6237 | done: | |
6238 | return packed_p; | |
6239 | } | |
6240 | ||
6374121b | 6241 | /* Return a tree of sizetype representing the size, in bytes, of the element |
5e19919e | 6242 | of EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */ |
6374121b | 6243 | |
6244 | tree | |
6245 | array_ref_element_size (tree exp) | |
6246 | { | |
6247 | tree aligned_size = TREE_OPERAND (exp, 3); | |
6248 | tree elmt_type = TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0))); | |
389dd41b | 6249 | location_t loc = EXPR_LOCATION (exp); |
6374121b | 6250 | |
6251 | /* If a size was specified in the ARRAY_REF, it's the size measured | |
6252 | in alignment units of the element type. So multiply by that value. */ | |
6253 | if (aligned_size) | |
20506a1d | 6254 | { |
6255 | /* ??? tree_ssa_useless_type_conversion will eliminate casts to | |
6256 | sizetype from another type of the same width and signedness. */ | |
6257 | if (TREE_TYPE (aligned_size) != sizetype) | |
389dd41b | 6258 | aligned_size = fold_convert_loc (loc, sizetype, aligned_size); |
6259 | return size_binop_loc (loc, MULT_EXPR, aligned_size, | |
6260 | size_int (TYPE_ALIGN_UNIT (elmt_type))); | |
20506a1d | 6261 | } |
6374121b | 6262 | |
491e04ef | 6263 | /* Otherwise, take the size from that of the element type. Substitute |
6374121b | 6264 | any PLACEHOLDER_EXPR that we have. */ |
6265 | else | |
6266 | return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_SIZE_UNIT (elmt_type), exp); | |
6267 | } | |
6268 | ||
6269 | /* Return a tree representing the lower bound of the array mentioned in | |
5e19919e | 6270 | EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */ |
6374121b | 6271 | |
6272 | tree | |
6273 | array_ref_low_bound (tree exp) | |
6274 | { | |
6275 | tree domain_type = TYPE_DOMAIN (TREE_TYPE (TREE_OPERAND (exp, 0))); | |
6276 | ||
6277 | /* If a lower bound is specified in EXP, use it. */ | |
6278 | if (TREE_OPERAND (exp, 2)) | |
6279 | return TREE_OPERAND (exp, 2); | |
6280 | ||
6281 | /* Otherwise, if there is a domain type and it has a lower bound, use it, | |
6282 | substituting for a PLACEHOLDER_EXPR as needed. */ | |
6283 | if (domain_type && TYPE_MIN_VALUE (domain_type)) | |
6284 | return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_MIN_VALUE (domain_type), exp); | |
6285 | ||
6286 | /* Otherwise, return a zero of the appropriate type. */ | |
779b4c41 | 6287 | return build_int_cst (TREE_TYPE (TREE_OPERAND (exp, 1)), 0); |
6374121b | 6288 | } |
6289 | ||
7d23383d | 6290 | /* Return a tree representing the upper bound of the array mentioned in |
5e19919e | 6291 | EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */ |
7d23383d | 6292 | |
6293 | tree | |
6294 | array_ref_up_bound (tree exp) | |
6295 | { | |
6296 | tree domain_type = TYPE_DOMAIN (TREE_TYPE (TREE_OPERAND (exp, 0))); | |
6297 | ||
6298 | /* If there is a domain type and it has an upper bound, use it, substituting | |
6299 | for a PLACEHOLDER_EXPR as needed. */ | |
6300 | if (domain_type && TYPE_MAX_VALUE (domain_type)) | |
6301 | return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_MAX_VALUE (domain_type), exp); | |
6302 | ||
6303 | /* Otherwise fail. */ | |
6304 | return NULL_TREE; | |
6305 | } | |
6306 | ||
6374121b | 6307 | /* Return a tree representing the offset, in bytes, of the field referenced |
6308 | by EXP. This does not include any offset in DECL_FIELD_BIT_OFFSET. */ | |
6309 | ||
6310 | tree | |
6311 | component_ref_field_offset (tree exp) | |
6312 | { | |
6313 | tree aligned_offset = TREE_OPERAND (exp, 2); | |
6314 | tree field = TREE_OPERAND (exp, 1); | |
389dd41b | 6315 | location_t loc = EXPR_LOCATION (exp); |
6374121b | 6316 | |
6317 | /* If an offset was specified in the COMPONENT_REF, it's the offset measured | |
6318 | in units of DECL_OFFSET_ALIGN / BITS_PER_UNIT. So multiply by that | |
6319 | value. */ | |
6320 | if (aligned_offset) | |
20506a1d | 6321 | { |
6322 | /* ??? tree_ssa_useless_type_conversion will eliminate casts to | |
6323 | sizetype from another type of the same width and signedness. */ | |
6324 | if (TREE_TYPE (aligned_offset) != sizetype) | |
389dd41b | 6325 | aligned_offset = fold_convert_loc (loc, sizetype, aligned_offset); |
6326 | return size_binop_loc (loc, MULT_EXPR, aligned_offset, | |
6327 | size_int (DECL_OFFSET_ALIGN (field) | |
6328 | / BITS_PER_UNIT)); | |
20506a1d | 6329 | } |
6374121b | 6330 | |
491e04ef | 6331 | /* Otherwise, take the offset from that of the field. Substitute |
6374121b | 6332 | any PLACEHOLDER_EXPR that we have. */ |
6333 | else | |
6334 | return SUBSTITUTE_PLACEHOLDER_IN_EXPR (DECL_FIELD_OFFSET (field), exp); | |
6335 | } | |
6cbeacbb | 6336 | |
6337 | /* Alignment in bits the TARGET of an assignment may be assumed to have. */ | |
6338 | ||
6339 | static unsigned HOST_WIDE_INT | |
6340 | target_align (const_tree target) | |
6341 | { | |
6342 | /* We might have a chain of nested references with intermediate misaligning | |
6343 | bitfields components, so need to recurse to find out. */ | |
6344 | ||
6345 | unsigned HOST_WIDE_INT this_align, outer_align; | |
6346 | ||
6347 | switch (TREE_CODE (target)) | |
6348 | { | |
6349 | case BIT_FIELD_REF: | |
6350 | return 1; | |
6351 | ||
6352 | case COMPONENT_REF: | |
6353 | this_align = DECL_ALIGN (TREE_OPERAND (target, 1)); | |
6354 | outer_align = target_align (TREE_OPERAND (target, 0)); | |
6355 | return MIN (this_align, outer_align); | |
6356 | ||
6357 | case ARRAY_REF: | |
6358 | case ARRAY_RANGE_REF: | |
6359 | this_align = TYPE_ALIGN (TREE_TYPE (target)); | |
6360 | outer_align = target_align (TREE_OPERAND (target, 0)); | |
6361 | return MIN (this_align, outer_align); | |
6362 | ||
6363 | CASE_CONVERT: | |
6364 | case NON_LVALUE_EXPR: | |
6365 | case VIEW_CONVERT_EXPR: | |
6366 | this_align = TYPE_ALIGN (TREE_TYPE (target)); | |
6367 | outer_align = target_align (TREE_OPERAND (target, 0)); | |
6368 | return MAX (this_align, outer_align); | |
6369 | ||
6370 | default: | |
6371 | return TYPE_ALIGN (TREE_TYPE (target)); | |
6372 | } | |
6373 | } | |
6374 | ||
10f307d9 | 6375 | \f |
dc183975 | 6376 | /* Given an rtx VALUE that may contain additions and multiplications, return |
6377 | an equivalent value that just refers to a register, memory, or constant. | |
6378 | This is done by generating instructions to perform the arithmetic and | |
6379 | returning a pseudo-register containing the value. | |
c4f1a887 | 6380 | |
6381 | The returned value may be a REG, SUBREG, MEM or constant. */ | |
10f307d9 | 6382 | |
6383 | rtx | |
35cb5232 | 6384 | force_operand (rtx value, rtx target) |
10f307d9 | 6385 | { |
fef8467d | 6386 | rtx op1, op2; |
10f307d9 | 6387 | /* Use subtarget as the target for operand 0 of a binary operation. */ |
19cb6b50 | 6388 | rtx subtarget = get_subtarget (target); |
fef8467d | 6389 | enum rtx_code code = GET_CODE (value); |
10f307d9 | 6390 | |
f9cce2dc | 6391 | /* Check for subreg applied to an expression produced by loop optimizer. */ |
6392 | if (code == SUBREG | |
8ad4c111 | 6393 | && !REG_P (SUBREG_REG (value)) |
e16ceb8e | 6394 | && !MEM_P (SUBREG_REG (value))) |
f9cce2dc | 6395 | { |
4631d202 | 6396 | value |
6397 | = simplify_gen_subreg (GET_MODE (value), | |
6398 | force_reg (GET_MODE (SUBREG_REG (value)), | |
6399 | force_operand (SUBREG_REG (value), | |
6400 | NULL_RTX)), | |
6401 | GET_MODE (SUBREG_REG (value)), | |
6402 | SUBREG_BYTE (value)); | |
f9cce2dc | 6403 | code = GET_CODE (value); |
6404 | } | |
6405 | ||
8b59469a | 6406 | /* Check for a PIC address load. */ |
fef8467d | 6407 | if ((code == PLUS || code == MINUS) |
8b59469a | 6408 | && XEXP (value, 0) == pic_offset_table_rtx |
6409 | && (GET_CODE (XEXP (value, 1)) == SYMBOL_REF | |
6410 | || GET_CODE (XEXP (value, 1)) == LABEL_REF | |
6411 | || GET_CODE (XEXP (value, 1)) == CONST)) | |
6412 | { | |
6413 | if (!subtarget) | |
6414 | subtarget = gen_reg_rtx (GET_MODE (value)); | |
6415 | emit_move_insn (subtarget, value); | |
6416 | return subtarget; | |
6417 | } | |
6418 | ||
6720e96c | 6419 | if (ARITHMETIC_P (value)) |
10f307d9 | 6420 | { |
6421 | op2 = XEXP (value, 1); | |
8ad4c111 | 6422 | if (!CONSTANT_P (op2) && !(REG_P (op2) && op2 != subtarget)) |
10f307d9 | 6423 | subtarget = 0; |
971ba038 | 6424 | if (code == MINUS && CONST_INT_P (op2)) |
10f307d9 | 6425 | { |
fef8467d | 6426 | code = PLUS; |
10f307d9 | 6427 | op2 = negate_rtx (GET_MODE (value), op2); |
6428 | } | |
6429 | ||
6430 | /* Check for an addition with OP2 a constant integer and our first | |
fef8467d | 6431 | operand a PLUS of a virtual register and something else. In that |
6432 | case, we want to emit the sum of the virtual register and the | |
6433 | constant first and then add the other value. This allows virtual | |
6434 | register instantiation to simply modify the constant rather than | |
6435 | creating another one around this addition. */ | |
971ba038 | 6436 | if (code == PLUS && CONST_INT_P (op2) |
10f307d9 | 6437 | && GET_CODE (XEXP (value, 0)) == PLUS |
8ad4c111 | 6438 | && REG_P (XEXP (XEXP (value, 0), 0)) |
10f307d9 | 6439 | && REGNO (XEXP (XEXP (value, 0), 0)) >= FIRST_VIRTUAL_REGISTER |
6440 | && REGNO (XEXP (XEXP (value, 0), 0)) <= LAST_VIRTUAL_REGISTER) | |
6441 | { | |
fef8467d | 6442 | rtx temp = expand_simple_binop (GET_MODE (value), code, |
6443 | XEXP (XEXP (value, 0), 0), op2, | |
6444 | subtarget, 0, OPTAB_LIB_WIDEN); | |
6445 | return expand_simple_binop (GET_MODE (value), code, temp, | |
6446 | force_operand (XEXP (XEXP (value, | |
6447 | 0), 1), 0), | |
6448 | target, 0, OPTAB_LIB_WIDEN); | |
10f307d9 | 6449 | } |
fa56dc1d | 6450 | |
fef8467d | 6451 | op1 = force_operand (XEXP (value, 0), subtarget); |
6452 | op2 = force_operand (op2, NULL_RTX); | |
6453 | switch (code) | |
6454 | { | |
6455 | case MULT: | |
6456 | return expand_mult (GET_MODE (value), op1, op2, target, 1); | |
6457 | case DIV: | |
6458 | if (!INTEGRAL_MODE_P (GET_MODE (value))) | |
6459 | return expand_simple_binop (GET_MODE (value), code, op1, op2, | |
6460 | target, 1, OPTAB_LIB_WIDEN); | |
6461 | else | |
6462 | return expand_divmod (0, | |
6463 | FLOAT_MODE_P (GET_MODE (value)) | |
6464 | ? RDIV_EXPR : TRUNC_DIV_EXPR, | |
6465 | GET_MODE (value), op1, op2, target, 0); | |
fef8467d | 6466 | case MOD: |
6467 | return expand_divmod (1, TRUNC_MOD_EXPR, GET_MODE (value), op1, op2, | |
6468 | target, 0); | |
fef8467d | 6469 | case UDIV: |
6470 | return expand_divmod (0, TRUNC_DIV_EXPR, GET_MODE (value), op1, op2, | |
6471 | target, 1); | |
fef8467d | 6472 | case UMOD: |
6473 | return expand_divmod (1, TRUNC_MOD_EXPR, GET_MODE (value), op1, op2, | |
6474 | target, 1); | |
fef8467d | 6475 | case ASHIFTRT: |
6476 | return expand_simple_binop (GET_MODE (value), code, op1, op2, | |
6477 | target, 0, OPTAB_LIB_WIDEN); | |
fef8467d | 6478 | default: |
6479 | return expand_simple_binop (GET_MODE (value), code, op1, op2, | |
6480 | target, 1, OPTAB_LIB_WIDEN); | |
6481 | } | |
6482 | } | |
6720e96c | 6483 | if (UNARY_P (value)) |
fef8467d | 6484 | { |
c0427b5d | 6485 | if (!target) |
6486 | target = gen_reg_rtx (GET_MODE (value)); | |
fef8467d | 6487 | op1 = force_operand (XEXP (value, 0), NULL_RTX); |
6184cd69 | 6488 | switch (code) |
6489 | { | |
c0427b5d | 6490 | case ZERO_EXTEND: |
6491 | case SIGN_EXTEND: | |
6184cd69 | 6492 | case TRUNCATE: |
e40df2f5 | 6493 | case FLOAT_EXTEND: |
6494 | case FLOAT_TRUNCATE: | |
c0427b5d | 6495 | convert_move (target, op1, code == ZERO_EXTEND); |
6496 | return target; | |
6497 | ||
6498 | case FIX: | |
6499 | case UNSIGNED_FIX: | |
6500 | expand_fix (target, op1, code == UNSIGNED_FIX); | |
6501 | return target; | |
6502 | ||
6503 | case FLOAT: | |
6504 | case UNSIGNED_FLOAT: | |
6505 | expand_float (target, op1, code == UNSIGNED_FLOAT); | |
6506 | return target; | |
6507 | ||
6184cd69 | 6508 | default: |
6509 | return expand_simple_unop (GET_MODE (value), code, op1, target, 0); | |
6510 | } | |
10f307d9 | 6511 | } |
3084721c | 6512 | |
6513 | #ifdef INSN_SCHEDULING | |
6514 | /* On machines that have insn scheduling, we want all memory reference to be | |
6515 | explicit, so we need to deal with such paradoxical SUBREGs. */ | |
e16ceb8e | 6516 | if (GET_CODE (value) == SUBREG && MEM_P (SUBREG_REG (value)) |
3084721c | 6517 | && (GET_MODE_SIZE (GET_MODE (value)) |
6518 | > GET_MODE_SIZE (GET_MODE (SUBREG_REG (value))))) | |
6519 | value | |
6520 | = simplify_gen_subreg (GET_MODE (value), | |
6521 | force_reg (GET_MODE (SUBREG_REG (value)), | |
6522 | force_operand (SUBREG_REG (value), | |
6523 | NULL_RTX)), | |
6524 | GET_MODE (SUBREG_REG (value)), | |
6525 | SUBREG_BYTE (value)); | |
6526 | #endif | |
6527 | ||
10f307d9 | 6528 | return value; |
6529 | } | |
6530 | \f | |
10f307d9 | 6531 | /* Subroutine of expand_expr: return nonzero iff there is no way that |
997d68fe | 6532 | EXP can reference X, which is being modified. TOP_P is nonzero if this |
6533 | call is going to be used to determine whether we need a temporary | |
67e40adc | 6534 | for EXP, as opposed to a recursive call to this function. |
6535 | ||
6536 | It is always safe for this routine to return zero since it merely | |
6537 | searches for optimization opportunities. */ | |
10f307d9 | 6538 | |
e41f0d80 | 6539 | int |
1f1872fd | 6540 | safe_from_p (const_rtx x, tree exp, int top_p) |
10f307d9 | 6541 | { |
6542 | rtx exp_rtl = 0; | |
6543 | int i, nops; | |
6544 | ||
a71ba0b1 | 6545 | if (x == 0 |
6546 | /* If EXP has varying size, we MUST use a target since we currently | |
62d8c952 | 6547 | have no way of allocating temporaries of variable size |
6548 | (except for arrays that have TYPE_ARRAY_MAX_SIZE set). | |
6549 | So we assume here that something at a higher level has prevented a | |
b9438b95 | 6550 | clash. This is somewhat bogus, but the best we can do. Only |
997d68fe | 6551 | do this when X is BLKmode and when we are at the top level. */ |
4b72716d | 6552 | || (top_p && TREE_TYPE (exp) != 0 && COMPLETE_TYPE_P (TREE_TYPE (exp)) |
b9438b95 | 6553 | && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) != INTEGER_CST |
62d8c952 | 6554 | && (TREE_CODE (TREE_TYPE (exp)) != ARRAY_TYPE |
6555 | || TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp)) == NULL_TREE | |
6556 | || TREE_CODE (TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp))) | |
6557 | != INTEGER_CST) | |
387bc205 | 6558 | && GET_MODE (x) == BLKmode) |
6559 | /* If X is in the outgoing argument area, it is always safe. */ | |
e16ceb8e | 6560 | || (MEM_P (x) |
387bc205 | 6561 | && (XEXP (x, 0) == virtual_outgoing_args_rtx |
6562 | || (GET_CODE (XEXP (x, 0)) == PLUS | |
6563 | && XEXP (XEXP (x, 0), 0) == virtual_outgoing_args_rtx)))) | |
10f307d9 | 6564 | return 1; |
6565 | ||
6566 | /* If this is a subreg of a hard register, declare it unsafe, otherwise, | |
6567 | find the underlying pseudo. */ | |
6568 | if (GET_CODE (x) == SUBREG) | |
6569 | { | |
6570 | x = SUBREG_REG (x); | |
8ad4c111 | 6571 | if (REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER) |
10f307d9 | 6572 | return 0; |
6573 | } | |
6574 | ||
387bc205 | 6575 | /* Now look at our tree code and possibly recurse. */ |
10f307d9 | 6576 | switch (TREE_CODE_CLASS (TREE_CODE (exp))) |
6577 | { | |
ce45a448 | 6578 | case tcc_declaration: |
6db2b7ab | 6579 | exp_rtl = DECL_RTL_IF_SET (exp); |
10f307d9 | 6580 | break; |
6581 | ||
ce45a448 | 6582 | case tcc_constant: |
10f307d9 | 6583 | return 1; |
6584 | ||
ce45a448 | 6585 | case tcc_exceptional: |
10f307d9 | 6586 | if (TREE_CODE (exp) == TREE_LIST) |
56c7ac50 | 6587 | { |
6588 | while (1) | |
6589 | { | |
6590 | if (TREE_VALUE (exp) && !safe_from_p (x, TREE_VALUE (exp), 0)) | |
6591 | return 0; | |
6592 | exp = TREE_CHAIN (exp); | |
6593 | if (!exp) | |
6594 | return 1; | |
6595 | if (TREE_CODE (exp) != TREE_LIST) | |
6596 | return safe_from_p (x, exp, 0); | |
6597 | } | |
6598 | } | |
a5b684d2 | 6599 | else if (TREE_CODE (exp) == CONSTRUCTOR) |
6600 | { | |
6601 | constructor_elt *ce; | |
6602 | unsigned HOST_WIDE_INT idx; | |
6603 | ||
48148244 | 6604 | FOR_EACH_VEC_ELT (constructor_elt, CONSTRUCTOR_ELTS (exp), idx, ce) |
a5b684d2 | 6605 | if ((ce->index != NULL_TREE && !safe_from_p (x, ce->index, 0)) |
6606 | || !safe_from_p (x, ce->value, 0)) | |
6607 | return 0; | |
6608 | return 1; | |
6609 | } | |
67e40adc | 6610 | else if (TREE_CODE (exp) == ERROR_MARK) |
6611 | return 1; /* An already-visited SAVE_EXPR? */ | |
10f307d9 | 6612 | else |
6613 | return 0; | |
6614 | ||
ce45a448 | 6615 | case tcc_statement: |
7dd37241 | 6616 | /* The only case we look at here is the DECL_INITIAL inside a |
6617 | DECL_EXPR. */ | |
6618 | return (TREE_CODE (exp) != DECL_EXPR | |
6619 | || TREE_CODE (DECL_EXPR_DECL (exp)) != VAR_DECL | |
6620 | || !DECL_INITIAL (DECL_EXPR_DECL (exp)) | |
6621 | || safe_from_p (x, DECL_INITIAL (DECL_EXPR_DECL (exp)), 0)); | |
6622 | ||
ce45a448 | 6623 | case tcc_binary: |
6624 | case tcc_comparison: | |
56c7ac50 | 6625 | if (!safe_from_p (x, TREE_OPERAND (exp, 1), 0)) |
6626 | return 0; | |
d632b59a | 6627 | /* Fall through. */ |
56c7ac50 | 6628 | |
ce45a448 | 6629 | case tcc_unary: |
56c7ac50 | 6630 | return safe_from_p (x, TREE_OPERAND (exp, 0), 0); |
10f307d9 | 6631 | |
ce45a448 | 6632 | case tcc_expression: |
6633 | case tcc_reference: | |
c2f47e15 | 6634 | case tcc_vl_exp: |
10f307d9 | 6635 | /* Now do code-specific tests. EXP_RTL is set to any rtx we find in |
6636 | the expression. If it is set, we conflict iff we are that rtx or | |
6637 | both are in memory. Otherwise, we check all operands of the | |
6638 | expression recursively. */ | |
6639 | ||
6640 | switch (TREE_CODE (exp)) | |
6641 | { | |
6642 | case ADDR_EXPR: | |
86ce88aa | 6643 | /* If the operand is static or we are static, we can't conflict. |
6644 | Likewise if we don't conflict with the operand at all. */ | |
6645 | if (staticp (TREE_OPERAND (exp, 0)) | |
6646 | || TREE_STATIC (exp) | |
6647 | || safe_from_p (x, TREE_OPERAND (exp, 0), 0)) | |
6648 | return 1; | |
6649 | ||
6650 | /* Otherwise, the only way this can conflict is if we are taking | |
6651 | the address of a DECL a that address if part of X, which is | |
6652 | very rare. */ | |
6653 | exp = TREE_OPERAND (exp, 0); | |
6654 | if (DECL_P (exp)) | |
6655 | { | |
6656 | if (!DECL_RTL_SET_P (exp) | |
e16ceb8e | 6657 | || !MEM_P (DECL_RTL (exp))) |
86ce88aa | 6658 | return 0; |
6659 | else | |
6660 | exp_rtl = XEXP (DECL_RTL (exp), 0); | |
6661 | } | |
6662 | break; | |
10f307d9 | 6663 | |
5d9de213 | 6664 | case MEM_REF: |
e16ceb8e | 6665 | if (MEM_P (x) |
387bc205 | 6666 | && alias_sets_conflict_p (MEM_ALIAS_SET (x), |
6667 | get_alias_set (exp))) | |
10f307d9 | 6668 | return 0; |
6669 | break; | |
6670 | ||
6671 | case CALL_EXPR: | |
bc33ff05 | 6672 | /* Assume that the call will clobber all hard registers and |
6673 | all of memory. */ | |
8ad4c111 | 6674 | if ((REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER) |
e16ceb8e | 6675 | || MEM_P (x)) |
bc33ff05 | 6676 | return 0; |
10f307d9 | 6677 | break; |
6678 | ||
10f307d9 | 6679 | case WITH_CLEANUP_EXPR: |
34e2ddcd | 6680 | case CLEANUP_POINT_EXPR: |
6388f9f7 | 6681 | /* Lowered by gimplify.c. */ |
611234b4 | 6682 | gcc_unreachable (); |
6388f9f7 | 6683 | |
10f307d9 | 6684 | case SAVE_EXPR: |
67c155cb | 6685 | return safe_from_p (x, TREE_OPERAND (exp, 0), 0); |
10f307d9 | 6686 | |
0dbd1c74 | 6687 | default: |
6688 | break; | |
10f307d9 | 6689 | } |
6690 | ||
6691 | /* If we have an rtx, we do not need to scan our operands. */ | |
6692 | if (exp_rtl) | |
6693 | break; | |
6694 | ||
c2f47e15 | 6695 | nops = TREE_OPERAND_LENGTH (exp); |
10f307d9 | 6696 | for (i = 0; i < nops; i++) |
6697 | if (TREE_OPERAND (exp, i) != 0 | |
997d68fe | 6698 | && ! safe_from_p (x, TREE_OPERAND (exp, i), 0)) |
10f307d9 | 6699 | return 0; |
e41f0d80 | 6700 | |
ce45a448 | 6701 | break; |
6702 | ||
6703 | case tcc_type: | |
6704 | /* Should never get a type here. */ | |
6705 | gcc_unreachable (); | |
10f307d9 | 6706 | } |
6707 | ||
6708 | /* If we have an rtl, find any enclosed object. Then see if we conflict | |
6709 | with it. */ | |
6710 | if (exp_rtl) | |
6711 | { | |
6712 | if (GET_CODE (exp_rtl) == SUBREG) | |
6713 | { | |
6714 | exp_rtl = SUBREG_REG (exp_rtl); | |
8ad4c111 | 6715 | if (REG_P (exp_rtl) |
10f307d9 | 6716 | && REGNO (exp_rtl) < FIRST_PSEUDO_REGISTER) |
6717 | return 0; | |
6718 | } | |
6719 | ||
6720 | /* If the rtl is X, then it is not safe. Otherwise, it is unless both | |
387bc205 | 6721 | are memory and they conflict. */ |
10f307d9 | 6722 | return ! (rtx_equal_p (x, exp_rtl) |
e16ceb8e | 6723 | || (MEM_P (x) && MEM_P (exp_rtl) |
c5e81ca5 | 6724 | && true_dependence (exp_rtl, VOIDmode, x, |
387bc205 | 6725 | rtx_addr_varies_p))); |
10f307d9 | 6726 | } |
6727 | ||
6728 | /* If we reach here, it is safe. */ | |
6729 | return 1; | |
6730 | } | |
6731 | ||
155b05dc | 6732 | \f |
fcdc122e | 6733 | /* Return the highest power of two that EXP is known to be a multiple of. |
6734 | This is used in updating alignment of MEMs in array references. */ | |
6735 | ||
516849c7 | 6736 | unsigned HOST_WIDE_INT |
b7bf20db | 6737 | highest_pow2_factor (const_tree exp) |
fcdc122e | 6738 | { |
84130727 | 6739 | unsigned HOST_WIDE_INT c0, c1; |
fcdc122e | 6740 | |
6741 | switch (TREE_CODE (exp)) | |
6742 | { | |
6743 | case INTEGER_CST: | |
fe93cfe6 | 6744 | /* We can find the lowest bit that's a one. If the low |
6745 | HOST_BITS_PER_WIDE_INT bits are zero, return BIGGEST_ALIGNMENT. | |
6746 | We need to handle this case since we can find it in a COND_EXPR, | |
91c82c20 | 6747 | a MIN_EXPR, or a MAX_EXPR. If the constant overflows, we have an |
fe93cfe6 | 6748 | erroneous program, so return BIGGEST_ALIGNMENT to avoid any |
e62299bd | 6749 | later ICE. */ |
f96bd2bf | 6750 | if (TREE_OVERFLOW (exp)) |
a689a61a | 6751 | return BIGGEST_ALIGNMENT; |
fe93cfe6 | 6752 | else |
fcdc122e | 6753 | { |
fe93cfe6 | 6754 | /* Note: tree_low_cst is intentionally not used here, |
6755 | we don't care about the upper bits. */ | |
6756 | c0 = TREE_INT_CST_LOW (exp); | |
6757 | c0 &= -c0; | |
6758 | return c0 ? c0 : BIGGEST_ALIGNMENT; | |
fcdc122e | 6759 | } |
6760 | break; | |
6761 | ||
cce8da2f | 6762 | case PLUS_EXPR: case MINUS_EXPR: case MIN_EXPR: case MAX_EXPR: |
fcdc122e | 6763 | c0 = highest_pow2_factor (TREE_OPERAND (exp, 0)); |
6764 | c1 = highest_pow2_factor (TREE_OPERAND (exp, 1)); | |
6765 | return MIN (c0, c1); | |
6766 | ||
6767 | case MULT_EXPR: | |
6768 | c0 = highest_pow2_factor (TREE_OPERAND (exp, 0)); | |
6769 | c1 = highest_pow2_factor (TREE_OPERAND (exp, 1)); | |
6770 | return c0 * c1; | |
6771 | ||
6772 | case ROUND_DIV_EXPR: case TRUNC_DIV_EXPR: case FLOOR_DIV_EXPR: | |
6773 | case CEIL_DIV_EXPR: | |
cce8da2f | 6774 | if (integer_pow2p (TREE_OPERAND (exp, 1)) |
6775 | && host_integerp (TREE_OPERAND (exp, 1), 1)) | |
6776 | { | |
6777 | c0 = highest_pow2_factor (TREE_OPERAND (exp, 0)); | |
6778 | c1 = tree_low_cst (TREE_OPERAND (exp, 1), 1); | |
6779 | return MAX (1, c0 / c1); | |
6780 | } | |
6781 | break; | |
fcdc122e | 6782 | |
9ca16083 | 6783 | case BIT_AND_EXPR: |
6784 | /* The highest power of two of a bit-and expression is the maximum of | |
6785 | that of its operands. We typically get here for a complex LHS and | |
6786 | a constant negative power of two on the RHS to force an explicit | |
6787 | alignment, so don't bother looking at the LHS. */ | |
6788 | return highest_pow2_factor (TREE_OPERAND (exp, 1)); | |
6789 | ||
72dd6141 | 6790 | CASE_CONVERT: |
55f9d7dc | 6791 | case SAVE_EXPR: |
fcdc122e | 6792 | return highest_pow2_factor (TREE_OPERAND (exp, 0)); |
6793 | ||
cce8da2f | 6794 | case COMPOUND_EXPR: |
6795 | return highest_pow2_factor (TREE_OPERAND (exp, 1)); | |
6796 | ||
fcdc122e | 6797 | case COND_EXPR: |
6798 | c0 = highest_pow2_factor (TREE_OPERAND (exp, 1)); | |
6799 | c1 = highest_pow2_factor (TREE_OPERAND (exp, 2)); | |
6800 | return MIN (c0, c1); | |
6801 | ||
6802 | default: | |
6803 | break; | |
6804 | } | |
6805 | ||
6806 | return 1; | |
6807 | } | |
5b965633 | 6808 | |
252d0e4d | 6809 | /* Similar, except that the alignment requirements of TARGET are |
6810 | taken into account. Assume it is at least as aligned as its | |
6811 | type, unless it is a COMPONENT_REF in which case the layout of | |
6812 | the structure gives the alignment. */ | |
5b965633 | 6813 | |
84130727 | 6814 | static unsigned HOST_WIDE_INT |
b7bf20db | 6815 | highest_pow2_factor_for_target (const_tree target, const_tree exp) |
5b965633 | 6816 | { |
6cbeacbb | 6817 | unsigned HOST_WIDE_INT talign = target_align (target) / BITS_PER_UNIT; |
6818 | unsigned HOST_WIDE_INT factor = highest_pow2_factor (exp); | |
48e1416a | 6819 | |
6cbeacbb | 6820 | return MAX (factor, talign); |
5b965633 | 6821 | } |
fcdc122e | 6822 | \f |
33204670 | 6823 | /* Subroutine of expand_expr. Expand the two operands of a binary |
6824 | expression EXP0 and EXP1 placing the results in OP0 and OP1. | |
6825 | The value may be stored in TARGET if TARGET is nonzero. The | |
6826 | MODIFIER argument is as documented by expand_expr. */ | |
6827 | ||
6828 | static void | |
6829 | expand_operands (tree exp0, tree exp1, rtx target, rtx *op0, rtx *op1, | |
6830 | enum expand_modifier modifier) | |
6831 | { | |
6832 | if (! safe_from_p (target, exp1, 1)) | |
6833 | target = 0; | |
6834 | if (operand_equal_p (exp0, exp1, 0)) | |
6835 | { | |
6836 | *op0 = expand_expr (exp0, target, VOIDmode, modifier); | |
6837 | *op1 = copy_rtx (*op0); | |
6838 | } | |
6839 | else | |
6840 | { | |
3541e113 | 6841 | /* If we need to preserve evaluation order, copy exp0 into its own |
6842 | temporary variable so that it can't be clobbered by exp1. */ | |
6843 | if (flag_evaluation_order && TREE_SIDE_EFFECTS (exp1)) | |
6844 | exp0 = save_expr (exp0); | |
33204670 | 6845 | *op0 = expand_expr (exp0, target, VOIDmode, modifier); |
6846 | *op1 = expand_expr (exp1, NULL_RTX, VOIDmode, modifier); | |
6847 | } | |
6848 | } | |
6849 | ||
c3a9c149 | 6850 | \f |
334ec2d8 | 6851 | /* Return a MEM that contains constant EXP. DEFER is as for |
f2d0e9f1 | 6852 | output_constant_def and MODIFIER is as for expand_expr. */ |
6853 | ||
6854 | static rtx | |
6855 | expand_expr_constant (tree exp, int defer, enum expand_modifier modifier) | |
6856 | { | |
6857 | rtx mem; | |
6858 | ||
6859 | mem = output_constant_def (exp, defer); | |
6860 | if (modifier != EXPAND_INITIALIZER) | |
6861 | mem = use_anchored_address (mem); | |
6862 | return mem; | |
6863 | } | |
6864 | ||
b51e4016 | 6865 | /* A subroutine of expand_expr_addr_expr. Evaluate the address of EXP. |
ec1e52d1 | 6866 | The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */ |
6867 | ||
6868 | static rtx | |
b51e4016 | 6869 | expand_expr_addr_expr_1 (tree exp, rtx target, enum machine_mode tmode, |
98155838 | 6870 | enum expand_modifier modifier, addr_space_t as) |
ec1e52d1 | 6871 | { |
6872 | rtx result, subtarget; | |
6873 | tree inner, offset; | |
6874 | HOST_WIDE_INT bitsize, bitpos; | |
6875 | int volatilep, unsignedp; | |
6876 | enum machine_mode mode1; | |
6877 | ||
6878 | /* If we are taking the address of a constant and are at the top level, | |
6879 | we have to use output_constant_def since we can't call force_const_mem | |
6880 | at top level. */ | |
6881 | /* ??? This should be considered a front-end bug. We should not be | |
6882 | generating ADDR_EXPR of something that isn't an LVALUE. The only | |
6883 | exception here is STRING_CST. */ | |
e54c9818 | 6884 | if (CONSTANT_CLASS_P (exp)) |
f2d0e9f1 | 6885 | return XEXP (expand_expr_constant (exp, 0, modifier), 0); |
ec1e52d1 | 6886 | |
6887 | /* Everything must be something allowed by is_gimple_addressable. */ | |
6888 | switch (TREE_CODE (exp)) | |
6889 | { | |
6890 | case INDIRECT_REF: | |
6891 | /* This case will happen via recursion for &a->b. */ | |
f2d0e9f1 | 6892 | return expand_expr (TREE_OPERAND (exp, 0), target, tmode, modifier); |
ec1e52d1 | 6893 | |
182cf5a9 | 6894 | case MEM_REF: |
6895 | { | |
6896 | tree tem = TREE_OPERAND (exp, 0); | |
6897 | if (!integer_zerop (TREE_OPERAND (exp, 1))) | |
6898 | tem = build2 (POINTER_PLUS_EXPR, TREE_TYPE (TREE_OPERAND (exp, 1)), | |
6899 | tem, | |
6900 | double_int_to_tree (sizetype, mem_ref_offset (exp))); | |
6901 | return expand_expr (tem, target, tmode, modifier); | |
6902 | } | |
6903 | ||
ec1e52d1 | 6904 | case CONST_DECL: |
c5075621 | 6905 | /* Expand the initializer like constants above. */ |
6906 | return XEXP (expand_expr_constant (DECL_INITIAL (exp), 0, modifier), 0); | |
ec1e52d1 | 6907 | |
6908 | case REALPART_EXPR: | |
6909 | /* The real part of the complex number is always first, therefore | |
6910 | the address is the same as the address of the parent object. */ | |
6911 | offset = 0; | |
6912 | bitpos = 0; | |
6913 | inner = TREE_OPERAND (exp, 0); | |
6914 | break; | |
6915 | ||
6916 | case IMAGPART_EXPR: | |
6917 | /* The imaginary part of the complex number is always second. | |
91275768 | 6918 | The expression is therefore always offset by the size of the |
ec1e52d1 | 6919 | scalar type. */ |
6920 | offset = 0; | |
6921 | bitpos = GET_MODE_BITSIZE (TYPE_MODE (TREE_TYPE (exp))); | |
6922 | inner = TREE_OPERAND (exp, 0); | |
6923 | break; | |
6924 | ||
6925 | default: | |
6926 | /* If the object is a DECL, then expand it for its rtl. Don't bypass | |
6927 | expand_expr, as that can have various side effects; LABEL_DECLs for | |
e54c9818 | 6928 | example, may not have their DECL_RTL set yet. Expand the rtl of |
6929 | CONSTRUCTORs too, which should yield a memory reference for the | |
6930 | constructor's contents. Assume language specific tree nodes can | |
6931 | be expanded in some interesting way. */ | |
862f468c | 6932 | gcc_assert (TREE_CODE (exp) < LAST_AND_UNUSED_TREE_CODE); |
ec1e52d1 | 6933 | if (DECL_P (exp) |
e54c9818 | 6934 | || TREE_CODE (exp) == CONSTRUCTOR |
862f468c | 6935 | || TREE_CODE (exp) == COMPOUND_LITERAL_EXPR) |
ec1e52d1 | 6936 | { |
6937 | result = expand_expr (exp, target, tmode, | |
6938 | modifier == EXPAND_INITIALIZER | |
6939 | ? EXPAND_INITIALIZER : EXPAND_CONST_ADDRESS); | |
6940 | ||
6941 | /* If the DECL isn't in memory, then the DECL wasn't properly | |
6942 | marked TREE_ADDRESSABLE, which will be either a front-end | |
6943 | or a tree optimizer bug. */ | |
1c14a50e | 6944 | gcc_assert (MEM_P (result)); |
ec1e52d1 | 6945 | result = XEXP (result, 0); |
6946 | ||
6947 | /* ??? Is this needed anymore? */ | |
07f6ff58 | 6948 | if (DECL_P (exp) && !TREE_USED (exp) == 0) |
ec1e52d1 | 6949 | { |
6950 | assemble_external (exp); | |
6951 | TREE_USED (exp) = 1; | |
6952 | } | |
6953 | ||
6954 | if (modifier != EXPAND_INITIALIZER | |
6955 | && modifier != EXPAND_CONST_ADDRESS) | |
6956 | result = force_operand (result, target); | |
6957 | return result; | |
6958 | } | |
6959 | ||
e7e9416e | 6960 | /* Pass FALSE as the last argument to get_inner_reference although |
6961 | we are expanding to RTL. The rationale is that we know how to | |
6962 | handle "aligning nodes" here: we can just bypass them because | |
6963 | they won't change the final object whose address will be returned | |
6964 | (they actually exist only for that purpose). */ | |
ec1e52d1 | 6965 | inner = get_inner_reference (exp, &bitsize, &bitpos, &offset, |
e7e9416e | 6966 | &mode1, &unsignedp, &volatilep, false); |
ec1e52d1 | 6967 | break; |
6968 | } | |
6969 | ||
6970 | /* We must have made progress. */ | |
611234b4 | 6971 | gcc_assert (inner != exp); |
ec1e52d1 | 6972 | |
6973 | subtarget = offset || bitpos ? NULL_RTX : target; | |
41727a57 | 6974 | /* For VIEW_CONVERT_EXPR, where the outer alignment is bigger than |
6975 | inner alignment, force the inner to be sufficiently aligned. */ | |
6976 | if (CONSTANT_CLASS_P (inner) | |
6977 | && TYPE_ALIGN (TREE_TYPE (inner)) < TYPE_ALIGN (TREE_TYPE (exp))) | |
6978 | { | |
6979 | inner = copy_node (inner); | |
6980 | TREE_TYPE (inner) = copy_node (TREE_TYPE (inner)); | |
6981 | TYPE_ALIGN (TREE_TYPE (inner)) = TYPE_ALIGN (TREE_TYPE (exp)); | |
6982 | TYPE_USER_ALIGN (TREE_TYPE (inner)) = 1; | |
6983 | } | |
98155838 | 6984 | result = expand_expr_addr_expr_1 (inner, subtarget, tmode, modifier, as); |
ec1e52d1 | 6985 | |
ec1e52d1 | 6986 | if (offset) |
6987 | { | |
6988 | rtx tmp; | |
6989 | ||
6990 | if (modifier != EXPAND_NORMAL) | |
6991 | result = force_operand (result, NULL); | |
48e1416a | 6992 | tmp = expand_expr (offset, NULL_RTX, tmode, |
af391a06 | 6993 | modifier == EXPAND_INITIALIZER |
6994 | ? EXPAND_INITIALIZER : EXPAND_NORMAL); | |
ec1e52d1 | 6995 | |
98155838 | 6996 | result = convert_memory_address_addr_space (tmode, result, as); |
6997 | tmp = convert_memory_address_addr_space (tmode, tmp, as); | |
07f6ff58 | 6998 | |
3286ab0c | 6999 | if (modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER) |
88ff2f0d | 7000 | result = simplify_gen_binary (PLUS, tmode, result, tmp); |
ec1e52d1 | 7001 | else |
7002 | { | |
7003 | subtarget = bitpos ? NULL_RTX : target; | |
7004 | result = expand_simple_binop (tmode, PLUS, result, tmp, subtarget, | |
7005 | 1, OPTAB_LIB_WIDEN); | |
7006 | } | |
7007 | } | |
7008 | ||
7009 | if (bitpos) | |
7010 | { | |
7011 | /* Someone beforehand should have rejected taking the address | |
7012 | of such an object. */ | |
07f6ff58 | 7013 | gcc_assert ((bitpos % BITS_PER_UNIT) == 0); |
ec1e52d1 | 7014 | |
7015 | result = plus_constant (result, bitpos / BITS_PER_UNIT); | |
7016 | if (modifier < EXPAND_SUM) | |
7017 | result = force_operand (result, target); | |
7018 | } | |
7019 | ||
7020 | return result; | |
7021 | } | |
7022 | ||
b51e4016 | 7023 | /* A subroutine of expand_expr. Evaluate EXP, which is an ADDR_EXPR. |
7024 | The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */ | |
7025 | ||
7026 | static rtx | |
7027 | expand_expr_addr_expr (tree exp, rtx target, enum machine_mode tmode, | |
7028 | enum expand_modifier modifier) | |
7029 | { | |
98155838 | 7030 | addr_space_t as = ADDR_SPACE_GENERIC; |
7031 | enum machine_mode address_mode = Pmode; | |
7032 | enum machine_mode pointer_mode = ptr_mode; | |
b51e4016 | 7033 | enum machine_mode rmode; |
7034 | rtx result; | |
7035 | ||
07f6ff58 | 7036 | /* Target mode of VOIDmode says "whatever's natural". */ |
7037 | if (tmode == VOIDmode) | |
7038 | tmode = TYPE_MODE (TREE_TYPE (exp)); | |
7039 | ||
98155838 | 7040 | if (POINTER_TYPE_P (TREE_TYPE (exp))) |
7041 | { | |
7042 | as = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (exp))); | |
7043 | address_mode = targetm.addr_space.address_mode (as); | |
7044 | pointer_mode = targetm.addr_space.pointer_mode (as); | |
7045 | } | |
7046 | ||
07f6ff58 | 7047 | /* We can get called with some Weird Things if the user does silliness |
7048 | like "(short) &a". In that case, convert_memory_address won't do | |
7049 | the right thing, so ignore the given target mode. */ | |
98155838 | 7050 | if (tmode != address_mode && tmode != pointer_mode) |
7051 | tmode = address_mode; | |
07f6ff58 | 7052 | |
b51e4016 | 7053 | result = expand_expr_addr_expr_1 (TREE_OPERAND (exp, 0), target, |
98155838 | 7054 | tmode, modifier, as); |
b51e4016 | 7055 | |
7056 | /* Despite expand_expr claims concerning ignoring TMODE when not | |
07f6ff58 | 7057 | strictly convenient, stuff breaks if we don't honor it. Note |
7058 | that combined with the above, we only do this for pointer modes. */ | |
b51e4016 | 7059 | rmode = GET_MODE (result); |
7060 | if (rmode == VOIDmode) | |
7061 | rmode = tmode; | |
7062 | if (rmode != tmode) | |
98155838 | 7063 | result = convert_memory_address_addr_space (tmode, result, as); |
07f6ff58 | 7064 | |
b51e4016 | 7065 | return result; |
7066 | } | |
7067 | ||
d4cf8ff7 | 7068 | /* Generate code for computing CONSTRUCTOR EXP. |
7069 | An rtx for the computed value is returned. If AVOID_TEMP_MEM | |
7070 | is TRUE, instead of creating a temporary variable in memory | |
7071 | NULL is returned and the caller needs to handle it differently. */ | |
7072 | ||
7073 | static rtx | |
7074 | expand_constructor (tree exp, rtx target, enum expand_modifier modifier, | |
7075 | bool avoid_temp_mem) | |
7076 | { | |
7077 | tree type = TREE_TYPE (exp); | |
7078 | enum machine_mode mode = TYPE_MODE (type); | |
7079 | ||
7080 | /* Try to avoid creating a temporary at all. This is possible | |
7081 | if all of the initializer is zero. | |
7082 | FIXME: try to handle all [0..255] initializers we can handle | |
7083 | with memset. */ | |
7084 | if (TREE_STATIC (exp) | |
7085 | && !TREE_ADDRESSABLE (exp) | |
7086 | && target != 0 && mode == BLKmode | |
7087 | && all_zeros_p (exp)) | |
7088 | { | |
7089 | clear_storage (target, expr_size (exp), BLOCK_OP_NORMAL); | |
7090 | return target; | |
7091 | } | |
7092 | ||
7093 | /* All elts simple constants => refer to a constant in memory. But | |
7094 | if this is a non-BLKmode mode, let it store a field at a time | |
7095 | since that should make a CONST_INT or CONST_DOUBLE when we | |
7096 | fold. Likewise, if we have a target we can use, it is best to | |
7097 | store directly into the target unless the type is large enough | |
7098 | that memcpy will be used. If we are making an initializer and | |
7099 | all operands are constant, put it in memory as well. | |
7100 | ||
7101 | FIXME: Avoid trying to fill vector constructors piece-meal. | |
7102 | Output them with output_constant_def below unless we're sure | |
7103 | they're zeros. This should go away when vector initializers | |
7104 | are treated like VECTOR_CST instead of arrays. */ | |
7105 | if ((TREE_STATIC (exp) | |
7106 | && ((mode == BLKmode | |
7107 | && ! (target != 0 && safe_from_p (target, exp, 1))) | |
7108 | || TREE_ADDRESSABLE (exp) | |
7109 | || (host_integerp (TYPE_SIZE_UNIT (type), 1) | |
7110 | && (! MOVE_BY_PIECES_P | |
7111 | (tree_low_cst (TYPE_SIZE_UNIT (type), 1), | |
7112 | TYPE_ALIGN (type))) | |
7113 | && ! mostly_zeros_p (exp)))) | |
7114 | || ((modifier == EXPAND_INITIALIZER || modifier == EXPAND_CONST_ADDRESS) | |
7115 | && TREE_CONSTANT (exp))) | |
7116 | { | |
7117 | rtx constructor; | |
7118 | ||
7119 | if (avoid_temp_mem) | |
7120 | return NULL_RTX; | |
7121 | ||
7122 | constructor = expand_expr_constant (exp, 1, modifier); | |
7123 | ||
7124 | if (modifier != EXPAND_CONST_ADDRESS | |
7125 | && modifier != EXPAND_INITIALIZER | |
7126 | && modifier != EXPAND_SUM) | |
7127 | constructor = validize_mem (constructor); | |
7128 | ||
7129 | return constructor; | |
7130 | } | |
7131 | ||
7132 | /* Handle calls that pass values in multiple non-contiguous | |
7133 | locations. The Irix 6 ABI has examples of this. */ | |
7134 | if (target == 0 || ! safe_from_p (target, exp, 1) | |
7135 | || GET_CODE (target) == PARALLEL || modifier == EXPAND_STACK_PARM) | |
7136 | { | |
7137 | if (avoid_temp_mem) | |
7138 | return NULL_RTX; | |
7139 | ||
7140 | target | |
7141 | = assign_temp (build_qualified_type (type, (TYPE_QUALS (type) | |
7142 | | (TREE_READONLY (exp) | |
7143 | * TYPE_QUAL_CONST))), | |
7144 | 0, TREE_ADDRESSABLE (exp), 1); | |
7145 | } | |
7146 | ||
7147 | store_constructor (exp, target, 0, int_expr_size (exp)); | |
7148 | return target; | |
7149 | } | |
7150 | ||
b51e4016 | 7151 | |
10f307d9 | 7152 | /* expand_expr: generate code for computing expression EXP. |
7153 | An rtx for the computed value is returned. The value is never null. | |
7154 | In the case of a void EXP, const0_rtx is returned. | |
7155 | ||
7156 | The value may be stored in TARGET if TARGET is nonzero. | |
7157 | TARGET is just a suggestion; callers must assume that | |
7158 | the rtx returned may not be the same as TARGET. | |
7159 | ||
7160 | If TARGET is CONST0_RTX, it means that the value will be ignored. | |
7161 | ||
7162 | If TMODE is not VOIDmode, it suggests generating the | |
7163 | result in mode TMODE. But this is done only when convenient. | |
7164 | Otherwise, TMODE is ignored and the value generated in its natural mode. | |
7165 | TMODE is just a suggestion; callers must assume that | |
7166 | the rtx returned may not have mode TMODE. | |
7167 | ||
d2ae1b1e | 7168 | Note that TARGET may have neither TMODE nor MODE. In that case, it |
7169 | probably will not be used. | |
10f307d9 | 7170 | |
7171 | If MODIFIER is EXPAND_SUM then when EXP is an addition | |
7172 | we can return an rtx of the form (MULT (REG ...) (CONST_INT ...)) | |
7173 | or a nest of (PLUS ...) and (MINUS ...) where the terms are | |
7174 | products as above, or REG or MEM, or constant. | |
7175 | Ordinarily in such cases we would output mul or add instructions | |
7176 | and then return a pseudo reg containing the sum. | |
7177 | ||
7178 | EXPAND_INITIALIZER is much like EXPAND_SUM except that | |
7179 | it also marks a label as absolutely required (it can't be dead). | |
1aaabd2e | 7180 | It also makes a ZERO_EXTEND or SIGN_EXTEND instead of emitting extend insns. |
d2ae1b1e | 7181 | This is used for outputting expressions used in initializers. |
7182 | ||
7183 | EXPAND_CONST_ADDRESS says that it is okay to return a MEM | |
7184 | with a constant address even if that address is not normally legitimate. | |
a35a63ff | 7185 | EXPAND_INITIALIZER and EXPAND_SUM also have this effect. |
7186 | ||
7187 | EXPAND_STACK_PARM is used when expanding to a TARGET on the stack for | |
7188 | a call parameter. Such targets require special care as we haven't yet | |
7189 | marked TARGET so that it's safe from being trashed by libcalls. We | |
7190 | don't want to use TARGET for anything but the final result; | |
7191 | Intermediate values must go elsewhere. Additionally, calls to | |
491e04ef | 7192 | emit_block_move will be flagged with BLOCK_OP_CALL_PARM. |
60ffaf4d | 7193 | |
7194 | If EXP is a VAR_DECL whose DECL_RTL was a MEM with an invalid | |
7195 | address, and ALT_RTL is non-NULL, then *ALT_RTL is set to the | |
7196 | DECL_RTL of the VAR_DECL. *ALT_RTL is also set if EXP is a | |
7197 | COMPOUND_EXPR whose second argument is such a VAR_DECL, and so on | |
7198 | recursively. */ | |
10f307d9 | 7199 | |
7200 | rtx | |
60ffaf4d | 7201 | expand_expr_real (tree exp, rtx target, enum machine_mode tmode, |
7202 | enum expand_modifier modifier, rtx *alt_rtl) | |
4ee9c684 | 7203 | { |
8cee8dc0 | 7204 | rtx ret; |
4ee9c684 | 7205 | |
7206 | /* Handle ERROR_MARK before anybody tries to access its type. */ | |
7207 | if (TREE_CODE (exp) == ERROR_MARK | |
75a70cf9 | 7208 | || (TREE_CODE (TREE_TYPE (exp)) == ERROR_MARK)) |
4ee9c684 | 7209 | { |
7210 | ret = CONST0_RTX (tmode); | |
7211 | return ret ? ret : const0_rtx; | |
7212 | } | |
7213 | ||
4ee9c684 | 7214 | /* If this is an expression of some kind and it has an associated line |
491e04ef | 7215 | number, then emit the line number before expanding the expression. |
4ee9c684 | 7216 | |
7217 | We need to save and restore the file and line information so that | |
7218 | errors discovered during expansion are emitted with the right | |
491e04ef | 7219 | information. It would be better of the diagnostic routines |
4ee9c684 | 7220 | used the file/line information embedded in the tree nodes rather |
7221 | than globals. */ | |
375c1c8a | 7222 | if (cfun && EXPR_HAS_LOCATION (exp)) |
4ee9c684 | 7223 | { |
7224 | location_t saved_location = input_location; | |
dfecf957 | 7225 | location_t saved_curr_loc = get_curr_insn_source_location (); |
7226 | tree saved_block = get_curr_insn_block (); | |
4ee9c684 | 7227 | input_location = EXPR_LOCATION (exp); |
375c1c8a | 7228 | set_curr_insn_source_location (input_location); |
491e04ef | 7229 | |
4ee9c684 | 7230 | /* Record where the insns produced belong. */ |
375c1c8a | 7231 | set_curr_insn_block (TREE_BLOCK (exp)); |
4ee9c684 | 7232 | |
7233 | ret = expand_expr_real_1 (exp, target, tmode, modifier, alt_rtl); | |
7234 | ||
7235 | input_location = saved_location; | |
dfecf957 | 7236 | set_curr_insn_block (saved_block); |
7237 | set_curr_insn_source_location (saved_curr_loc); | |
4ee9c684 | 7238 | } |
7239 | else | |
7240 | { | |
7241 | ret = expand_expr_real_1 (exp, target, tmode, modifier, alt_rtl); | |
7242 | } | |
7243 | ||
4ee9c684 | 7244 | return ret; |
7245 | } | |
7246 | ||
16c9337c | 7247 | rtx |
dff12ad7 | 7248 | expand_expr_real_2 (sepops ops, rtx target, enum machine_mode tmode, |
7249 | enum expand_modifier modifier) | |
10f307d9 | 7250 | { |
dff12ad7 | 7251 | rtx op0, op1, op2, temp; |
35cc02b5 | 7252 | tree type; |
78a8ed03 | 7253 | int unsignedp; |
19cb6b50 | 7254 | enum machine_mode mode; |
dff12ad7 | 7255 | enum tree_code code = ops->code; |
10f307d9 | 7256 | optab this_optab; |
32b3a273 | 7257 | rtx subtarget, original_target; |
7258 | int ignore; | |
dcfc697f | 7259 | bool reduce_bit_field; |
dff12ad7 | 7260 | location_t loc = ops->location; |
b9be572e | 7261 | tree treeop0, treeop1, treeop2; |
dcfc697f | 7262 | #define REDUCE_BIT_FIELD(expr) (reduce_bit_field \ |
4f7f7efd | 7263 | ? reduce_to_bit_field_precision ((expr), \ |
7264 | target, \ | |
7265 | type) \ | |
7266 | : (expr)) | |
10f307d9 | 7267 | |
dff12ad7 | 7268 | type = ops->type; |
75a70cf9 | 7269 | mode = TYPE_MODE (type); |
7270 | unsignedp = TYPE_UNSIGNED (type); | |
78a8ed03 | 7271 | |
dff12ad7 | 7272 | treeop0 = ops->op0; |
7273 | treeop1 = ops->op1; | |
b9be572e | 7274 | treeop2 = ops->op2; |
dff12ad7 | 7275 | |
7276 | /* We should be called only on simple (binary or unary) expressions, | |
7277 | exactly those that are valid in gimple expressions that aren't | |
7278 | GIMPLE_SINGLE_RHS (or invalid). */ | |
7279 | gcc_assert (get_gimple_rhs_class (code) == GIMPLE_UNARY_RHS | |
00f4f705 | 7280 | || get_gimple_rhs_class (code) == GIMPLE_BINARY_RHS |
7281 | || get_gimple_rhs_class (code) == GIMPLE_TERNARY_RHS); | |
588e1cc3 | 7282 | |
32b3a273 | 7283 | ignore = (target == const0_rtx |
d9659041 | 7284 | || ((CONVERT_EXPR_CODE_P (code) |
6a2b2394 | 7285 | || code == COND_EXPR || code == VIEW_CONVERT_EXPR) |
32b3a273 | 7286 | && TREE_CODE (type) == VOID_TYPE)); |
7287 | ||
dff12ad7 | 7288 | /* We should be called only if we need the result. */ |
7289 | gcc_assert (!ignore); | |
7290 | ||
dcfc697f | 7291 | /* An operation in what may be a bit-field type needs the |
7292 | result to be reduced to the precision of the bit-field type, | |
7293 | which is narrower than that of the type's mode. */ | |
dff12ad7 | 7294 | reduce_bit_field = (TREE_CODE (type) == INTEGER_TYPE |
dcfc697f | 7295 | && GET_MODE_PRECISION (mode) > TYPE_PRECISION (type)); |
7296 | ||
dcfc697f | 7297 | if (reduce_bit_field && modifier == EXPAND_STACK_PARM) |
7298 | target = 0; | |
7299 | ||
7300 | /* Use subtarget as the target for operand 0 of a binary operation. */ | |
7301 | subtarget = get_subtarget (target); | |
7302 | original_target = target; | |
10f307d9 | 7303 | |
10f307d9 | 7304 | switch (code) |
7305 | { | |
e38def9c | 7306 | case NON_LVALUE_EXPR: |
dff12ad7 | 7307 | case PAREN_EXPR: |
7308 | CASE_CONVERT: | |
7309 | if (treeop0 == error_mark_node) | |
7310 | return const0_rtx; | |
4ee9c684 | 7311 | |
dff12ad7 | 7312 | if (TREE_CODE (type) == UNION_TYPE) |
7313 | { | |
7314 | tree valtype = TREE_TYPE (treeop0); | |
4ee9c684 | 7315 | |
dff12ad7 | 7316 | /* If both input and output are BLKmode, this conversion isn't doing |
7317 | anything except possibly changing memory attribute. */ | |
7318 | if (mode == BLKmode && TYPE_MODE (valtype) == BLKmode) | |
7319 | { | |
7320 | rtx result = expand_expr (treeop0, target, tmode, | |
7321 | modifier); | |
10f307d9 | 7322 | |
dff12ad7 | 7323 | result = copy_rtx (result); |
7324 | set_mem_attributes (result, type, 0); | |
7325 | return result; | |
7326 | } | |
dec41e98 | 7327 | |
dff12ad7 | 7328 | if (target == 0) |
7329 | { | |
7330 | if (TYPE_MODE (type) != BLKmode) | |
7331 | target = gen_reg_rtx (TYPE_MODE (type)); | |
7332 | else | |
7333 | target = assign_temp (type, 0, 1, 1); | |
7334 | } | |
eb4b06b6 | 7335 | |
dff12ad7 | 7336 | if (MEM_P (target)) |
7337 | /* Store data into beginning of memory target. */ | |
7338 | store_expr (treeop0, | |
7339 | adjust_address (target, TYPE_MODE (valtype), 0), | |
7340 | modifier == EXPAND_STACK_PARM, | |
7341 | false); | |
9dda1f80 | 7342 | |
dff12ad7 | 7343 | else |
7344 | { | |
7345 | gcc_assert (REG_P (target)); | |
d2ae1b1e | 7346 | |
dff12ad7 | 7347 | /* Store this field into a union of the proper type. */ |
7348 | store_field (target, | |
7349 | MIN ((int_size_in_bytes (TREE_TYPE | |
7350 | (treeop0)) | |
7351 | * BITS_PER_UNIT), | |
7352 | (HOST_WIDE_INT) GET_MODE_BITSIZE (mode)), | |
7353 | 0, TYPE_MODE (valtype), treeop0, | |
7354 | type, 0, false); | |
7355 | } | |
d2ae1b1e | 7356 | |
dff12ad7 | 7357 | /* Return the entire union. */ |
7358 | return target; | |
34f17b00 | 7359 | } |
7360 | ||
dff12ad7 | 7361 | if (mode == TYPE_MODE (TREE_TYPE (treeop0))) |
7362 | { | |
7363 | op0 = expand_expr (treeop0, target, VOIDmode, | |
7364 | modifier); | |
d2ae1b1e | 7365 | |
dff12ad7 | 7366 | /* If the signedness of the conversion differs and OP0 is |
7367 | a promoted SUBREG, clear that indication since we now | |
7368 | have to do the proper extension. */ | |
7369 | if (TYPE_UNSIGNED (TREE_TYPE (treeop0)) != unsignedp | |
7370 | && GET_CODE (op0) == SUBREG) | |
7371 | SUBREG_PROMOTED_VAR_P (op0) = 0; | |
d2ae1b1e | 7372 | |
dff12ad7 | 7373 | return REDUCE_BIT_FIELD (op0); |
60ffaf4d | 7374 | } |
acfb31e5 | 7375 | |
dff12ad7 | 7376 | op0 = expand_expr (treeop0, NULL_RTX, mode, |
7377 | modifier == EXPAND_SUM ? EXPAND_NORMAL : modifier); | |
7378 | if (GET_MODE (op0) == mode) | |
7379 | ; | |
7380 | ||
7381 | /* If OP0 is a constant, just convert it into the proper mode. */ | |
7382 | else if (CONSTANT_P (op0)) | |
6e6b4174 | 7383 | { |
dff12ad7 | 7384 | tree inner_type = TREE_TYPE (treeop0); |
7385 | enum machine_mode inner_mode = TYPE_MODE (inner_type); | |
6e6b4174 | 7386 | |
dff12ad7 | 7387 | if (modifier == EXPAND_INITIALIZER) |
7388 | op0 = simplify_gen_subreg (mode, op0, inner_mode, | |
7389 | subreg_lowpart_offset (mode, | |
7390 | inner_mode)); | |
7391 | else | |
7392 | op0= convert_modes (mode, inner_mode, op0, | |
7393 | TYPE_UNSIGNED (inner_type)); | |
6e6b4174 | 7394 | } |
7395 | ||
dff12ad7 | 7396 | else if (modifier == EXPAND_INITIALIZER) |
7397 | op0 = gen_rtx_fmt_e (unsignedp ? ZERO_EXTEND : SIGN_EXTEND, mode, op0); | |
acfb31e5 | 7398 | |
dff12ad7 | 7399 | else if (target == 0) |
7400 | op0 = convert_to_mode (mode, op0, | |
7401 | TYPE_UNSIGNED (TREE_TYPE | |
7402 | (treeop0))); | |
7403 | else | |
acfb31e5 | 7404 | { |
dff12ad7 | 7405 | convert_move (target, op0, |
7406 | TYPE_UNSIGNED (TREE_TYPE (treeop0))); | |
7407 | op0 = target; | |
7408 | } | |
1f8b6002 | 7409 | |
dff12ad7 | 7410 | return REDUCE_BIT_FIELD (op0); |
10f307d9 | 7411 | |
bd1a81f7 | 7412 | case ADDR_SPACE_CONVERT_EXPR: |
7413 | { | |
7414 | tree treeop0_type = TREE_TYPE (treeop0); | |
7415 | addr_space_t as_to; | |
7416 | addr_space_t as_from; | |
7417 | ||
7418 | gcc_assert (POINTER_TYPE_P (type)); | |
7419 | gcc_assert (POINTER_TYPE_P (treeop0_type)); | |
7420 | ||
7421 | as_to = TYPE_ADDR_SPACE (TREE_TYPE (type)); | |
7422 | as_from = TYPE_ADDR_SPACE (TREE_TYPE (treeop0_type)); | |
7423 | ||
7424 | /* Conversions between pointers to the same address space should | |
7425 | have been implemented via CONVERT_EXPR / NOP_EXPR. */ | |
7426 | gcc_assert (as_to != as_from); | |
7427 | ||
7428 | /* Ask target code to handle conversion between pointers | |
7429 | to overlapping address spaces. */ | |
7430 | if (targetm.addr_space.subset_p (as_to, as_from) | |
7431 | || targetm.addr_space.subset_p (as_from, as_to)) | |
7432 | { | |
7433 | op0 = expand_expr (treeop0, NULL_RTX, VOIDmode, modifier); | |
7434 | op0 = targetm.addr_space.convert (op0, treeop0_type, type); | |
7435 | gcc_assert (op0); | |
7436 | return op0; | |
7437 | } | |
7438 | ||
7439 | /* For disjoint address spaces, converting anything but | |
7440 | a null pointer invokes undefined behaviour. We simply | |
7441 | always return a null pointer here. */ | |
7442 | return CONST0_RTX (mode); | |
7443 | } | |
7444 | ||
48e1416a | 7445 | case POINTER_PLUS_EXPR: |
dff12ad7 | 7446 | /* Even though the sizetype mode and the pointer's mode can be different |
48e1416a | 7447 | expand is able to handle this correctly and get the correct result out |
dff12ad7 | 7448 | of the PLUS_EXPR code. */ |
7449 | /* Make sure to sign-extend the sizetype offset in a POINTER_PLUS_EXPR | |
7450 | if sizetype precision is smaller than pointer precision. */ | |
7451 | if (TYPE_PRECISION (sizetype) < TYPE_PRECISION (type)) | |
7452 | treeop1 = fold_convert_loc (loc, type, | |
7453 | fold_convert_loc (loc, ssizetype, | |
7454 | treeop1)); | |
7455 | case PLUS_EXPR: | |
dff12ad7 | 7456 | /* If we are adding a constant, a VAR_DECL that is sp, fp, or ap, and |
7457 | something else, make sure we add the register to the constant and | |
7458 | then to the other thing. This case can occur during strength | |
7459 | reduction and doing it this way will produce better code if the | |
7460 | frame pointer or argument pointer is eliminated. | |
10f307d9 | 7461 | |
dff12ad7 | 7462 | fold-const.c will ensure that the constant is always in the inner |
7463 | PLUS_EXPR, so the only case we need to do anything about is if | |
7464 | sp, ap, or fp is our second argument, in which case we must swap | |
7465 | the innermost first argument and our second argument. */ | |
fa56dc1d | 7466 | |
dff12ad7 | 7467 | if (TREE_CODE (treeop0) == PLUS_EXPR |
7468 | && TREE_CODE (TREE_OPERAND (treeop0, 1)) == INTEGER_CST | |
7469 | && TREE_CODE (treeop1) == VAR_DECL | |
7470 | && (DECL_RTL (treeop1) == frame_pointer_rtx | |
7471 | || DECL_RTL (treeop1) == stack_pointer_rtx | |
7472 | || DECL_RTL (treeop1) == arg_pointer_rtx)) | |
7473 | { | |
7474 | tree t = treeop1; | |
10f307d9 | 7475 | |
dff12ad7 | 7476 | treeop1 = TREE_OPERAND (treeop0, 0); |
7477 | TREE_OPERAND (treeop0, 0) = t; | |
7478 | } | |
10f307d9 | 7479 | |
dff12ad7 | 7480 | /* If the result is to be ptr_mode and we are adding an integer to |
7481 | something, we might be forming a constant. So try to use | |
7482 | plus_constant. If it produces a sum and we can't accept it, | |
7483 | use force_operand. This allows P = &ARR[const] to generate | |
7484 | efficient code on machines where a SYMBOL_REF is not a valid | |
7485 | address. | |
68a556d6 | 7486 | |
dff12ad7 | 7487 | If this is an EXPAND_SUM call, always return the sum. */ |
7488 | if (modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER | |
7489 | || (mode == ptr_mode && (unsignedp || ! flag_trapv))) | |
67cae17d | 7490 | { |
dff12ad7 | 7491 | if (modifier == EXPAND_STACK_PARM) |
7492 | target = 0; | |
7493 | if (TREE_CODE (treeop0) == INTEGER_CST | |
7494 | && GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT | |
7495 | && TREE_CONSTANT (treeop1)) | |
7496 | { | |
7497 | rtx constant_part; | |
67cae17d | 7498 | |
dff12ad7 | 7499 | op1 = expand_expr (treeop1, subtarget, VOIDmode, |
7500 | EXPAND_SUM); | |
7501 | /* Use immed_double_const to ensure that the constant is | |
7502 | truncated according to the mode of OP1, then sign extended | |
7503 | to a HOST_WIDE_INT. Using the constant directly can result | |
7504 | in non-canonical RTL in a 64x32 cross compile. */ | |
7505 | constant_part | |
7506 | = immed_double_const (TREE_INT_CST_LOW (treeop0), | |
7507 | (HOST_WIDE_INT) 0, | |
7508 | TYPE_MODE (TREE_TYPE (treeop1))); | |
7509 | op1 = plus_constant (op1, INTVAL (constant_part)); | |
7510 | if (modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER) | |
7511 | op1 = force_operand (op1, target); | |
7512 | return REDUCE_BIT_FIELD (op1); | |
7513 | } | |
67cae17d | 7514 | |
dff12ad7 | 7515 | else if (TREE_CODE (treeop1) == INTEGER_CST |
7516 | && GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT | |
7517 | && TREE_CONSTANT (treeop0)) | |
7518 | { | |
7519 | rtx constant_part; | |
67cae17d | 7520 | |
dff12ad7 | 7521 | op0 = expand_expr (treeop0, subtarget, VOIDmode, |
7522 | (modifier == EXPAND_INITIALIZER | |
7523 | ? EXPAND_INITIALIZER : EXPAND_SUM)); | |
7524 | if (! CONSTANT_P (op0)) | |
7525 | { | |
7526 | op1 = expand_expr (treeop1, NULL_RTX, | |
7527 | VOIDmode, modifier); | |
7528 | /* Return a PLUS if modifier says it's OK. */ | |
7529 | if (modifier == EXPAND_SUM | |
7530 | || modifier == EXPAND_INITIALIZER) | |
7531 | return simplify_gen_binary (PLUS, mode, op0, op1); | |
7532 | goto binop2; | |
7533 | } | |
7534 | /* Use immed_double_const to ensure that the constant is | |
7535 | truncated according to the mode of OP1, then sign extended | |
7536 | to a HOST_WIDE_INT. Using the constant directly can result | |
7537 | in non-canonical RTL in a 64x32 cross compile. */ | |
7538 | constant_part | |
7539 | = immed_double_const (TREE_INT_CST_LOW (treeop1), | |
7540 | (HOST_WIDE_INT) 0, | |
7541 | TYPE_MODE (TREE_TYPE (treeop0))); | |
7542 | op0 = plus_constant (op0, INTVAL (constant_part)); | |
7543 | if (modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER) | |
7544 | op0 = force_operand (op0, target); | |
7545 | return REDUCE_BIT_FIELD (op0); | |
7546 | } | |
67cae17d | 7547 | } |
7548 | ||
46b155e1 | 7549 | /* Use TER to expand pointer addition of a negated value |
7550 | as pointer subtraction. */ | |
7551 | if ((POINTER_TYPE_P (TREE_TYPE (treeop0)) | |
7552 | || (TREE_CODE (TREE_TYPE (treeop0)) == VECTOR_TYPE | |
7553 | && POINTER_TYPE_P (TREE_TYPE (TREE_TYPE (treeop0))))) | |
7554 | && TREE_CODE (treeop1) == SSA_NAME | |
7555 | && TYPE_MODE (TREE_TYPE (treeop0)) | |
7556 | == TYPE_MODE (TREE_TYPE (treeop1))) | |
7557 | { | |
7558 | gimple def = get_def_for_expr (treeop1, NEGATE_EXPR); | |
7559 | if (def) | |
7560 | { | |
7561 | treeop1 = gimple_assign_rhs1 (def); | |
7562 | code = MINUS_EXPR; | |
7563 | goto do_minus; | |
7564 | } | |
7565 | } | |
7566 | ||
dff12ad7 | 7567 | /* No sense saving up arithmetic to be done |
7568 | if it's all in the wrong mode to form part of an address. | |
7569 | And force_operand won't know whether to sign-extend or | |
7570 | zero-extend. */ | |
7571 | if ((modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER) | |
7572 | || mode != ptr_mode) | |
7573 | { | |
7574 | expand_operands (treeop0, treeop1, | |
7575 | subtarget, &op0, &op1, EXPAND_NORMAL); | |
7576 | if (op0 == const0_rtx) | |
7577 | return op1; | |
7578 | if (op1 == const0_rtx) | |
7579 | return op0; | |
7580 | goto binop2; | |
7581 | } | |
67cae17d | 7582 | |
dff12ad7 | 7583 | expand_operands (treeop0, treeop1, |
7584 | subtarget, &op0, &op1, modifier); | |
7585 | return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS, mode, op0, op1)); | |
10f307d9 | 7586 | |
dff12ad7 | 7587 | case MINUS_EXPR: |
46b155e1 | 7588 | do_minus: |
dff12ad7 | 7589 | /* For initializers, we are allowed to return a MINUS of two |
7590 | symbolic constants. Here we handle all cases when both operands | |
7591 | are constant. */ | |
7592 | /* Handle difference of two symbolic constants, | |
7593 | for the sake of an initializer. */ | |
7594 | if ((modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER) | |
7595 | && really_constant_p (treeop0) | |
7596 | && really_constant_p (treeop1)) | |
7597 | { | |
7598 | expand_operands (treeop0, treeop1, | |
7599 | NULL_RTX, &op0, &op1, modifier); | |
acfb31e5 | 7600 | |
dff12ad7 | 7601 | /* If the last operand is a CONST_INT, use plus_constant of |
7602 | the negated constant. Else make the MINUS. */ | |
7603 | if (CONST_INT_P (op1)) | |
7604 | return REDUCE_BIT_FIELD (plus_constant (op0, - INTVAL (op1))); | |
7605 | else | |
7606 | return REDUCE_BIT_FIELD (gen_rtx_MINUS (mode, op0, op1)); | |
7607 | } | |
acfb31e5 | 7608 | |
dff12ad7 | 7609 | /* No sense saving up arithmetic to be done |
7610 | if it's all in the wrong mode to form part of an address. | |
7611 | And force_operand won't know whether to sign-extend or | |
7612 | zero-extend. */ | |
7613 | if ((modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER) | |
7614 | || mode != ptr_mode) | |
7615 | goto binop; | |
10f307d9 | 7616 | |
dff12ad7 | 7617 | expand_operands (treeop0, treeop1, |
7618 | subtarget, &op0, &op1, modifier); | |
c19f64ba | 7619 | |
dff12ad7 | 7620 | /* Convert A - const to A + (-const). */ |
7621 | if (CONST_INT_P (op1)) | |
f75fb6ae | 7622 | { |
dff12ad7 | 7623 | op1 = negate_rtx (mode, op1); |
7624 | return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS, mode, op0, op1)); | |
f75fb6ae | 7625 | } |
603c4ee1 | 7626 | |
dff12ad7 | 7627 | goto binop2; |
fa56dc1d | 7628 | |
00f4f705 | 7629 | case WIDEN_MULT_PLUS_EXPR: |
7630 | case WIDEN_MULT_MINUS_EXPR: | |
7631 | expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1, EXPAND_NORMAL); | |
b9be572e | 7632 | op2 = expand_normal (treeop2); |
00f4f705 | 7633 | target = expand_widen_pattern_expr (ops, op0, op1, op2, |
7634 | target, unsignedp); | |
7635 | return target; | |
7636 | ||
62be004c | 7637 | case WIDEN_MULT_EXPR: |
dff12ad7 | 7638 | /* If first operand is constant, swap them. |
7639 | Thus the following special case checks need only | |
7640 | check the second operand. */ | |
7641 | if (TREE_CODE (treeop0) == INTEGER_CST) | |
7642 | { | |
7643 | tree t1 = treeop0; | |
7644 | treeop0 = treeop1; | |
7645 | treeop1 = t1; | |
7646 | } | |
10f307d9 | 7647 | |
dff12ad7 | 7648 | /* First, check if we have a multiplication of one signed and one |
7649 | unsigned operand. */ | |
62be004c | 7650 | if (TREE_CODE (treeop1) != INTEGER_CST |
7651 | && (TYPE_UNSIGNED (TREE_TYPE (treeop0)) | |
7652 | != TYPE_UNSIGNED (TREE_TYPE (treeop1)))) | |
dff12ad7 | 7653 | { |
62be004c | 7654 | enum machine_mode innermode = TYPE_MODE (TREE_TYPE (treeop0)); |
dff12ad7 | 7655 | this_optab = usmul_widen_optab; |
62be004c | 7656 | if (mode == GET_MODE_2XWIDER_MODE (innermode)) |
dff12ad7 | 7657 | { |
d6bf3b14 | 7658 | if (optab_handler (this_optab, mode) != CODE_FOR_nothing) |
dff12ad7 | 7659 | { |
62be004c | 7660 | if (TYPE_UNSIGNED (TREE_TYPE (treeop0))) |
38ba30bf | 7661 | expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1, |
dff12ad7 | 7662 | EXPAND_NORMAL); |
7663 | else | |
38ba30bf | 7664 | expand_operands (treeop0, treeop1, NULL_RTX, &op1, &op0, |
dff12ad7 | 7665 | EXPAND_NORMAL); |
dff12ad7 | 7666 | goto binop3; |
7667 | } | |
7668 | } | |
7669 | } | |
62be004c | 7670 | /* Check for a multiplication with matching signedness. */ |
7671 | else if ((TREE_CODE (treeop1) == INTEGER_CST | |
7672 | && int_fits_type_p (treeop1, TREE_TYPE (treeop0))) | |
7673 | || (TYPE_UNSIGNED (TREE_TYPE (treeop1)) | |
7674 | == TYPE_UNSIGNED (TREE_TYPE (treeop0)))) | |
dff12ad7 | 7675 | { |
62be004c | 7676 | tree op0type = TREE_TYPE (treeop0); |
dff12ad7 | 7677 | enum machine_mode innermode = TYPE_MODE (op0type); |
7678 | bool zextend_p = TYPE_UNSIGNED (op0type); | |
7679 | optab other_optab = zextend_p ? smul_widen_optab : umul_widen_optab; | |
7680 | this_optab = zextend_p ? umul_widen_optab : smul_widen_optab; | |
f1a494f4 | 7681 | |
38ba30bf | 7682 | if (mode == GET_MODE_2XWIDER_MODE (innermode) |
7683 | && TREE_CODE (treeop0) != INTEGER_CST) | |
dff12ad7 | 7684 | { |
d6bf3b14 | 7685 | if (optab_handler (this_optab, mode) != CODE_FOR_nothing) |
dff12ad7 | 7686 | { |
62be004c | 7687 | expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1, |
7688 | EXPAND_NORMAL); | |
7689 | temp = expand_widening_mult (mode, op0, op1, target, | |
7690 | unsignedp, this_optab); | |
7691 | return REDUCE_BIT_FIELD (temp); | |
dff12ad7 | 7692 | } |
d6bf3b14 | 7693 | if (optab_handler (other_optab, mode) != CODE_FOR_nothing |
62be004c | 7694 | && innermode == word_mode) |
dff12ad7 | 7695 | { |
7696 | rtx htem, hipart; | |
62be004c | 7697 | op0 = expand_normal (treeop0); |
7698 | if (TREE_CODE (treeop1) == INTEGER_CST) | |
dff12ad7 | 7699 | op1 = convert_modes (innermode, mode, |
62be004c | 7700 | expand_normal (treeop1), unsignedp); |
dff12ad7 | 7701 | else |
62be004c | 7702 | op1 = expand_normal (treeop1); |
dff12ad7 | 7703 | temp = expand_binop (mode, other_optab, op0, op1, target, |
7704 | unsignedp, OPTAB_LIB_WIDEN); | |
7705 | hipart = gen_highpart (innermode, temp); | |
7706 | htem = expand_mult_highpart_adjust (innermode, hipart, | |
7707 | op0, op1, hipart, | |
7708 | zextend_p); | |
7709 | if (htem != hipart) | |
7710 | emit_move_insn (hipart, htem); | |
7711 | return REDUCE_BIT_FIELD (temp); | |
7712 | } | |
7713 | } | |
7714 | } | |
62be004c | 7715 | treeop0 = fold_build1 (CONVERT_EXPR, type, treeop0); |
7716 | treeop1 = fold_build1 (CONVERT_EXPR, type, treeop1); | |
7717 | expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL); | |
7718 | return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1, target, unsignedp)); | |
7719 | ||
b9be572e | 7720 | case FMA_EXPR: |
7721 | { | |
7722 | optab opt = fma_optab; | |
7723 | gimple def0, def2; | |
7724 | ||
d325c8f4 | 7725 | /* If there is no insn for FMA, emit it as __builtin_fma{,f,l} |
7726 | call. */ | |
7727 | if (optab_handler (fma_optab, mode) == CODE_FOR_nothing) | |
7728 | { | |
7729 | tree fn = mathfn_built_in (TREE_TYPE (treeop0), BUILT_IN_FMA); | |
7730 | tree call_expr; | |
7731 | ||
7732 | gcc_assert (fn != NULL_TREE); | |
7733 | call_expr = build_call_expr (fn, 3, treeop0, treeop1, treeop2); | |
7734 | return expand_builtin (call_expr, target, subtarget, mode, false); | |
7735 | } | |
7736 | ||
b9be572e | 7737 | def0 = get_def_for_expr (treeop0, NEGATE_EXPR); |
7738 | def2 = get_def_for_expr (treeop2, NEGATE_EXPR); | |
7739 | ||
7740 | op0 = op2 = NULL; | |
7741 | ||
7742 | if (def0 && def2 | |
7743 | && optab_handler (fnms_optab, mode) != CODE_FOR_nothing) | |
7744 | { | |
7745 | opt = fnms_optab; | |
7746 | op0 = expand_normal (gimple_assign_rhs1 (def0)); | |
7747 | op2 = expand_normal (gimple_assign_rhs1 (def2)); | |
7748 | } | |
7749 | else if (def0 | |
7750 | && optab_handler (fnma_optab, mode) != CODE_FOR_nothing) | |
7751 | { | |
7752 | opt = fnma_optab; | |
7753 | op0 = expand_normal (gimple_assign_rhs1 (def0)); | |
7754 | } | |
7755 | else if (def2 | |
7756 | && optab_handler (fms_optab, mode) != CODE_FOR_nothing) | |
7757 | { | |
7758 | opt = fms_optab; | |
7759 | op2 = expand_normal (gimple_assign_rhs1 (def2)); | |
7760 | } | |
7761 | ||
7762 | if (op0 == NULL) | |
7763 | op0 = expand_expr (treeop0, subtarget, VOIDmode, EXPAND_NORMAL); | |
7764 | if (op2 == NULL) | |
7765 | op2 = expand_normal (treeop2); | |
7766 | op1 = expand_normal (treeop1); | |
7767 | ||
7768 | return expand_ternary_op (TYPE_MODE (type), opt, | |
7769 | op0, op1, op2, target, 0); | |
7770 | } | |
7771 | ||
62be004c | 7772 | case MULT_EXPR: |
7773 | /* If this is a fixed-point operation, then we cannot use the code | |
7774 | below because "expand_mult" doesn't support sat/no-sat fixed-point | |
7775 | multiplications. */ | |
7776 | if (ALL_FIXED_POINT_MODE_P (mode)) | |
7777 | goto binop; | |
7778 | ||
7779 | /* If first operand is constant, swap them. | |
7780 | Thus the following special case checks need only | |
7781 | check the second operand. */ | |
7782 | if (TREE_CODE (treeop0) == INTEGER_CST) | |
7783 | { | |
7784 | tree t1 = treeop0; | |
7785 | treeop0 = treeop1; | |
7786 | treeop1 = t1; | |
7787 | } | |
7788 | ||
7789 | /* Attempt to return something suitable for generating an | |
7790 | indexed address, for machines that support that. */ | |
7791 | ||
7792 | if (modifier == EXPAND_SUM && mode == ptr_mode | |
7793 | && host_integerp (treeop1, 0)) | |
7794 | { | |
7795 | tree exp1 = treeop1; | |
7796 | ||
7797 | op0 = expand_expr (treeop0, subtarget, VOIDmode, | |
7798 | EXPAND_SUM); | |
7799 | ||
7800 | if (!REG_P (op0)) | |
7801 | op0 = force_operand (op0, NULL_RTX); | |
7802 | if (!REG_P (op0)) | |
7803 | op0 = copy_to_mode_reg (mode, op0); | |
7804 | ||
7805 | return REDUCE_BIT_FIELD (gen_rtx_MULT (mode, op0, | |
7806 | gen_int_mode (tree_low_cst (exp1, 0), | |
7807 | TYPE_MODE (TREE_TYPE (exp1))))); | |
7808 | } | |
7809 | ||
7810 | if (modifier == EXPAND_STACK_PARM) | |
7811 | target = 0; | |
7812 | ||
7813 | expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL); | |
dff12ad7 | 7814 | return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1, target, unsignedp)); |
10f307d9 | 7815 | |
dff12ad7 | 7816 | case TRUNC_DIV_EXPR: |
7817 | case FLOOR_DIV_EXPR: | |
7818 | case CEIL_DIV_EXPR: | |
7819 | case ROUND_DIV_EXPR: | |
7820 | case EXACT_DIV_EXPR: | |
7821 | /* If this is a fixed-point operation, then we cannot use the code | |
7822 | below because "expand_divmod" doesn't support sat/no-sat fixed-point | |
7823 | divisions. */ | |
7824 | if (ALL_FIXED_POINT_MODE_P (mode)) | |
7825 | goto binop; | |
aed164c3 | 7826 | |
dff12ad7 | 7827 | if (modifier == EXPAND_STACK_PARM) |
7828 | target = 0; | |
7829 | /* Possible optimization: compute the dividend with EXPAND_SUM | |
7830 | then if the divisor is constant can optimize the case | |
7831 | where some terms of the dividend have coeffs divisible by it. */ | |
7832 | expand_operands (treeop0, treeop1, | |
7833 | subtarget, &op0, &op1, EXPAND_NORMAL); | |
7834 | return expand_divmod (0, code, mode, op0, op1, target, unsignedp); | |
aed164c3 | 7835 | |
dff12ad7 | 7836 | case RDIV_EXPR: |
7837 | goto binop; | |
4ee9c684 | 7838 | |
dff12ad7 | 7839 | case TRUNC_MOD_EXPR: |
7840 | case FLOOR_MOD_EXPR: | |
7841 | case CEIL_MOD_EXPR: | |
7842 | case ROUND_MOD_EXPR: | |
7843 | if (modifier == EXPAND_STACK_PARM) | |
7844 | target = 0; | |
7845 | expand_operands (treeop0, treeop1, | |
7846 | subtarget, &op0, &op1, EXPAND_NORMAL); | |
7847 | return expand_divmod (1, code, mode, op0, op1, target, unsignedp); | |
cf389750 | 7848 | |
dff12ad7 | 7849 | case FIXED_CONVERT_EXPR: |
7850 | op0 = expand_normal (treeop0); | |
7851 | if (target == 0 || modifier == EXPAND_STACK_PARM) | |
7852 | target = gen_reg_rtx (mode); | |
cf389750 | 7853 | |
dff12ad7 | 7854 | if ((TREE_CODE (TREE_TYPE (treeop0)) == INTEGER_TYPE |
7855 | && TYPE_UNSIGNED (TREE_TYPE (treeop0))) | |
7856 | || (TREE_CODE (type) == INTEGER_TYPE && TYPE_UNSIGNED (type))) | |
7857 | expand_fixed_convert (target, op0, 1, TYPE_SATURATING (type)); | |
7858 | else | |
7859 | expand_fixed_convert (target, op0, 0, TYPE_SATURATING (type)); | |
7860 | return target; | |
4ee9c684 | 7861 | |
dff12ad7 | 7862 | case FIX_TRUNC_EXPR: |
7863 | op0 = expand_normal (treeop0); | |
7864 | if (target == 0 || modifier == EXPAND_STACK_PARM) | |
7865 | target = gen_reg_rtx (mode); | |
7866 | expand_fix (target, op0, unsignedp); | |
7867 | return target; | |
10f307d9 | 7868 | |
dff12ad7 | 7869 | case FLOAT_EXPR: |
7870 | op0 = expand_normal (treeop0); | |
7871 | if (target == 0 || modifier == EXPAND_STACK_PARM) | |
7872 | target = gen_reg_rtx (mode); | |
7873 | /* expand_float can't figure out what to do if FROM has VOIDmode. | |
7874 | So give it the correct mode. With -O, cse will optimize this. */ | |
7875 | if (GET_MODE (op0) == VOIDmode) | |
7876 | op0 = copy_to_mode_reg (TYPE_MODE (TREE_TYPE (treeop0)), | |
7877 | op0); | |
7878 | expand_float (target, op0, | |
7879 | TYPE_UNSIGNED (TREE_TYPE (treeop0))); | |
7880 | return target; | |
2ef1e405 | 7881 | |
dff12ad7 | 7882 | case NEGATE_EXPR: |
7883 | op0 = expand_expr (treeop0, subtarget, | |
7884 | VOIDmode, EXPAND_NORMAL); | |
7885 | if (modifier == EXPAND_STACK_PARM) | |
7886 | target = 0; | |
7887 | temp = expand_unop (mode, | |
7888 | optab_for_tree_code (NEGATE_EXPR, type, | |
7889 | optab_default), | |
7890 | op0, target, 0); | |
7891 | gcc_assert (temp); | |
7892 | return REDUCE_BIT_FIELD (temp); | |
a0c2c45b | 7893 | |
dff12ad7 | 7894 | case ABS_EXPR: |
7895 | op0 = expand_expr (treeop0, subtarget, | |
7896 | VOIDmode, EXPAND_NORMAL); | |
7897 | if (modifier == EXPAND_STACK_PARM) | |
7898 | target = 0; | |
fa56dc1d | 7899 | |
dff12ad7 | 7900 | /* ABS_EXPR is not valid for complex arguments. */ |
7901 | gcc_assert (GET_MODE_CLASS (mode) != MODE_COMPLEX_INT | |
7902 | && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT); | |
cf389750 | 7903 | |
dff12ad7 | 7904 | /* Unsigned abs is simply the operand. Testing here means we don't |
7905 | risk generating incorrect code below. */ | |
7906 | if (TYPE_UNSIGNED (type)) | |
7907 | return op0; | |
c75b4594 | 7908 | |
dff12ad7 | 7909 | return expand_abs (mode, op0, target, unsignedp, |
7910 | safe_from_p (target, treeop0, 1)); | |
d4cf8ff7 | 7911 | |
dff12ad7 | 7912 | case MAX_EXPR: |
7913 | case MIN_EXPR: | |
7914 | target = original_target; | |
7915 | if (target == 0 | |
7916 | || modifier == EXPAND_STACK_PARM | |
7917 | || (MEM_P (target) && MEM_VOLATILE_P (target)) | |
7918 | || GET_MODE (target) != mode | |
7919 | || (REG_P (target) | |
7920 | && REGNO (target) < FIRST_PSEUDO_REGISTER)) | |
7921 | target = gen_reg_rtx (mode); | |
7922 | expand_operands (treeop0, treeop1, | |
7923 | target, &op0, &op1, EXPAND_NORMAL); | |
d4cf8ff7 | 7924 | |
dff12ad7 | 7925 | /* First try to do it with a special MIN or MAX instruction. |
7926 | If that does not win, use a conditional jump to select the proper | |
7927 | value. */ | |
7928 | this_optab = optab_for_tree_code (code, type, optab_default); | |
7929 | temp = expand_binop (mode, this_optab, op0, op1, target, unsignedp, | |
7930 | OPTAB_WIDEN); | |
7931 | if (temp != 0) | |
7932 | return temp; | |
1f8b6002 | 7933 | |
dff12ad7 | 7934 | /* At this point, a MEM target is no longer useful; we will get better |
7935 | code without it. */ | |
1f8b6002 | 7936 | |
dff12ad7 | 7937 | if (! REG_P (target)) |
7938 | target = gen_reg_rtx (mode); | |
1f8b6002 | 7939 | |
dff12ad7 | 7940 | /* If op1 was placed in target, swap op0 and op1. */ |
7941 | if (target != op0 && target == op1) | |
7942 | { | |
7943 | temp = op0; | |
7944 | op0 = op1; | |
7945 | op1 = temp; | |
7946 | } | |
1f8b6002 | 7947 | |
dff12ad7 | 7948 | /* We generate better code and avoid problems with op1 mentioning |
7949 | target by forcing op1 into a pseudo if it isn't a constant. */ | |
7950 | if (! CONSTANT_P (op1)) | |
7951 | op1 = force_reg (mode, op1); | |
2ef1e405 | 7952 | |
10f307d9 | 7953 | { |
dff12ad7 | 7954 | enum rtx_code comparison_code; |
7955 | rtx cmpop1 = op1; | |
952f3892 | 7956 | |
dff12ad7 | 7957 | if (code == MAX_EXPR) |
7958 | comparison_code = unsignedp ? GEU : GE; | |
7959 | else | |
7960 | comparison_code = unsignedp ? LEU : LE; | |
952f3892 | 7961 | |
dff12ad7 | 7962 | /* Canonicalize to comparisons against 0. */ |
7963 | if (op1 == const1_rtx) | |
5fb2a157 | 7964 | { |
dff12ad7 | 7965 | /* Converting (a >= 1 ? a : 1) into (a > 0 ? a : 1) |
7966 | or (a != 0 ? a : 1) for unsigned. | |
7967 | For MIN we are safe converting (a <= 1 ? a : 1) | |
7968 | into (a <= 0 ? a : 1) */ | |
7969 | cmpop1 = const0_rtx; | |
7970 | if (code == MAX_EXPR) | |
7971 | comparison_code = unsignedp ? NE : GT; | |
5fb2a157 | 7972 | } |
dff12ad7 | 7973 | if (op1 == constm1_rtx && !unsignedp) |
a7bab26c | 7974 | { |
dff12ad7 | 7975 | /* Converting (a >= -1 ? a : -1) into (a >= 0 ? a : -1) |
7976 | and (a <= -1 ? a : -1) into (a < 0 ? a : -1) */ | |
7977 | cmpop1 = const0_rtx; | |
7978 | if (code == MIN_EXPR) | |
7979 | comparison_code = LT; | |
a7bab26c | 7980 | } |
dff12ad7 | 7981 | #ifdef HAVE_conditional_move |
7982 | /* Use a conditional move if possible. */ | |
7983 | if (can_conditionally_move_p (mode)) | |
954bdcb1 | 7984 | { |
dff12ad7 | 7985 | rtx insn; |
954bdcb1 | 7986 | |
dff12ad7 | 7987 | /* ??? Same problem as in expmed.c: emit_conditional_move |
7988 | forces a stack adjustment via compare_from_rtx, and we | |
7989 | lose the stack adjustment if the sequence we are about | |
7990 | to create is discarded. */ | |
7991 | do_pending_stack_adjust (); | |
5785f96f | 7992 | |
dff12ad7 | 7993 | start_sequence (); |
5785f96f | 7994 | |
dff12ad7 | 7995 | /* Try to emit the conditional move. */ |
7996 | insn = emit_conditional_move (target, comparison_code, | |
7997 | op0, cmpop1, mode, | |
7998 | op0, op1, mode, | |
7999 | unsignedp); | |
8000 | ||
8001 | /* If we could do the conditional move, emit the sequence, | |
8002 | and return. */ | |
8003 | if (insn) | |
25d55d72 | 8004 | { |
dff12ad7 | 8005 | rtx seq = get_insns (); |
8006 | end_sequence (); | |
8007 | emit_insn (seq); | |
8008 | return target; | |
25d55d72 | 8009 | } |
8010 | ||
dff12ad7 | 8011 | /* Otherwise discard the sequence and fall back to code with |
8012 | branches. */ | |
8013 | end_sequence (); | |
954bdcb1 | 8014 | } |
dff12ad7 | 8015 | #endif |
8016 | if (target != op0) | |
8017 | emit_move_insn (target, op0); | |
954bdcb1 | 8018 | |
dff12ad7 | 8019 | temp = gen_label_rtx (); |
8020 | do_compare_rtx_and_jump (target, cmpop1, comparison_code, | |
79ab74cc | 8021 | unsignedp, mode, NULL_RTX, NULL_RTX, temp, |
8022 | -1); | |
dff12ad7 | 8023 | } |
8024 | emit_move_insn (target, op1); | |
8025 | emit_label (temp); | |
8026 | return target; | |
67c68e45 | 8027 | |
dff12ad7 | 8028 | case BIT_NOT_EXPR: |
8029 | op0 = expand_expr (treeop0, subtarget, | |
8030 | VOIDmode, EXPAND_NORMAL); | |
8031 | if (modifier == EXPAND_STACK_PARM) | |
8032 | target = 0; | |
8033 | temp = expand_unop (mode, one_cmpl_optab, op0, target, 1); | |
8034 | gcc_assert (temp); | |
8035 | return temp; | |
c3a9c149 | 8036 | |
dff12ad7 | 8037 | /* ??? Can optimize bitwise operations with one arg constant. |
8038 | Can optimize (a bitwise1 n) bitwise2 (a bitwise3 b) | |
8039 | and (a bitwise1 b) bitwise2 b (etc) | |
8040 | but that is probably not worth while. */ | |
10f307d9 | 8041 | |
dff12ad7 | 8042 | /* BIT_AND_EXPR is for bitwise anding. TRUTH_AND_EXPR is for anding two |
8043 | boolean values when we want in all cases to compute both of them. In | |
8044 | general it is fastest to do TRUTH_AND_EXPR by computing both operands | |
8045 | as actual zero-or-1 values and then bitwise anding. In cases where | |
8046 | there cannot be any side effects, better code would be made by | |
8047 | treating TRUTH_AND_EXPR like TRUTH_ANDIF_EXPR; but the question is | |
8048 | how to recognize those cases. */ | |
10f307d9 | 8049 | |
dff12ad7 | 8050 | case TRUTH_AND_EXPR: |
8051 | code = BIT_AND_EXPR; | |
8052 | case BIT_AND_EXPR: | |
8053 | goto binop; | |
10f307d9 | 8054 | |
dff12ad7 | 8055 | case TRUTH_OR_EXPR: |
8056 | code = BIT_IOR_EXPR; | |
8057 | case BIT_IOR_EXPR: | |
8058 | goto binop; | |
0e9fefce | 8059 | |
dff12ad7 | 8060 | case TRUTH_XOR_EXPR: |
8061 | code = BIT_XOR_EXPR; | |
8062 | case BIT_XOR_EXPR: | |
8063 | goto binop; | |
0e9fefce | 8064 | |
dff12ad7 | 8065 | case LROTATE_EXPR: |
8066 | case RROTATE_EXPR: | |
8067 | gcc_assert (VECTOR_MODE_P (TYPE_MODE (type)) | |
8068 | || (GET_MODE_PRECISION (TYPE_MODE (type)) | |
8069 | == TYPE_PRECISION (type))); | |
8070 | /* fall through */ | |
0e20f9fb | 8071 | |
dff12ad7 | 8072 | case LSHIFT_EXPR: |
8073 | case RSHIFT_EXPR: | |
8074 | /* If this is a fixed-point operation, then we cannot use the code | |
8075 | below because "expand_shift" doesn't support sat/no-sat fixed-point | |
8076 | shifts. */ | |
8077 | if (ALL_FIXED_POINT_MODE_P (mode)) | |
8078 | goto binop; | |
fa56dc1d | 8079 | |
dff12ad7 | 8080 | if (! safe_from_p (subtarget, treeop1, 1)) |
8081 | subtarget = 0; | |
8082 | if (modifier == EXPAND_STACK_PARM) | |
8083 | target = 0; | |
8084 | op0 = expand_expr (treeop0, subtarget, | |
8085 | VOIDmode, EXPAND_NORMAL); | |
8086 | temp = expand_shift (code, mode, op0, treeop1, target, | |
8087 | unsignedp); | |
8088 | if (code == LSHIFT_EXPR) | |
8089 | temp = REDUCE_BIT_FIELD (temp); | |
8090 | return temp; | |
10f307d9 | 8091 | |
dff12ad7 | 8092 | /* Could determine the answer when only additive constants differ. Also, |
8093 | the addition of one can be handled by changing the condition. */ | |
8094 | case LT_EXPR: | |
8095 | case LE_EXPR: | |
8096 | case GT_EXPR: | |
8097 | case GE_EXPR: | |
8098 | case EQ_EXPR: | |
8099 | case NE_EXPR: | |
8100 | case UNORDERED_EXPR: | |
8101 | case ORDERED_EXPR: | |
8102 | case UNLT_EXPR: | |
8103 | case UNLE_EXPR: | |
8104 | case UNGT_EXPR: | |
8105 | case UNGE_EXPR: | |
8106 | case UNEQ_EXPR: | |
8107 | case LTGT_EXPR: | |
8108 | temp = do_store_flag (ops, | |
8109 | modifier != EXPAND_STACK_PARM ? target : NULL_RTX, | |
8110 | tmode != VOIDmode ? tmode : mode); | |
8111 | if (temp) | |
8112 | return temp; | |
6e6b4174 | 8113 | |
dff12ad7 | 8114 | /* Use a compare and a jump for BLKmode comparisons, or for function |
8115 | type comparisons is HAVE_canonicalize_funcptr_for_compare. */ | |
6e6b4174 | 8116 | |
dff12ad7 | 8117 | if ((target == 0 |
8118 | || modifier == EXPAND_STACK_PARM | |
8119 | || ! safe_from_p (target, treeop0, 1) | |
8120 | || ! safe_from_p (target, treeop1, 1) | |
8121 | /* Make sure we don't have a hard reg (such as function's return | |
8122 | value) live across basic blocks, if not optimizing. */ | |
8123 | || (!optimize && REG_P (target) | |
8124 | && REGNO (target) < FIRST_PSEUDO_REGISTER))) | |
8125 | target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode); | |
0aa5cbcc | 8126 | |
dff12ad7 | 8127 | emit_move_insn (target, const0_rtx); |
0aa5cbcc | 8128 | |
dff12ad7 | 8129 | op1 = gen_label_rtx (); |
79ab74cc | 8130 | jumpifnot_1 (code, treeop0, treeop1, op1, -1); |
4432b023 | 8131 | |
dff12ad7 | 8132 | emit_move_insn (target, const1_rtx); |
10f307d9 | 8133 | |
dff12ad7 | 8134 | emit_label (op1); |
8135 | return target; | |
10f307d9 | 8136 | |
dff12ad7 | 8137 | case TRUTH_NOT_EXPR: |
8138 | if (modifier == EXPAND_STACK_PARM) | |
8139 | target = 0; | |
8140 | op0 = expand_expr (treeop0, target, | |
8141 | VOIDmode, EXPAND_NORMAL); | |
8142 | /* The parser is careful to generate TRUTH_NOT_EXPR | |
8143 | only with operands that are always zero or one. */ | |
8144 | temp = expand_binop (mode, xor_optab, op0, const1_rtx, | |
8145 | target, 1, OPTAB_LIB_WIDEN); | |
8146 | gcc_assert (temp); | |
8147 | return temp; | |
10f307d9 | 8148 | |
dff12ad7 | 8149 | case COMPLEX_EXPR: |
8150 | /* Get the rtx code of the operands. */ | |
8151 | op0 = expand_normal (treeop0); | |
8152 | op1 = expand_normal (treeop1); | |
f8ca8b77 | 8153 | |
dff12ad7 | 8154 | if (!target) |
8155 | target = gen_reg_rtx (TYPE_MODE (type)); | |
b5ba9f3a | 8156 | |
dff12ad7 | 8157 | /* Move the real (op0) and imaginary (op1) parts to their location. */ |
8158 | write_complex_part (target, op0, false); | |
8159 | write_complex_part (target, op1, true); | |
c3a9c149 | 8160 | |
dff12ad7 | 8161 | return target; |
6e6b4174 | 8162 | |
dff12ad7 | 8163 | case WIDEN_SUM_EXPR: |
8164 | { | |
8165 | tree oprnd0 = treeop0; | |
8166 | tree oprnd1 = treeop1; | |
1c9f9aa6 | 8167 | |
dff12ad7 | 8168 | expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL); |
8169 | target = expand_widen_pattern_expr (ops, op0, NULL_RTX, op1, | |
8170 | target, unsignedp); | |
8171 | return target; | |
10f307d9 | 8172 | } |
8173 | ||
dff12ad7 | 8174 | case REDUC_MAX_EXPR: |
8175 | case REDUC_MIN_EXPR: | |
8176 | case REDUC_PLUS_EXPR: | |
10fc867f | 8177 | { |
dff12ad7 | 8178 | op0 = expand_normal (treeop0); |
8179 | this_optab = optab_for_tree_code (code, type, optab_default); | |
8180 | temp = expand_unop (mode, this_optab, op0, target, unsignedp); | |
8181 | gcc_assert (temp); | |
8182 | return temp; | |
8183 | } | |
10fc867f | 8184 | |
dff12ad7 | 8185 | case VEC_EXTRACT_EVEN_EXPR: |
8186 | case VEC_EXTRACT_ODD_EXPR: | |
8187 | { | |
8188 | expand_operands (treeop0, treeop1, | |
8189 | NULL_RTX, &op0, &op1, EXPAND_NORMAL); | |
8190 | this_optab = optab_for_tree_code (code, type, optab_default); | |
8191 | temp = expand_binop (mode, this_optab, op0, op1, target, unsignedp, | |
8192 | OPTAB_WIDEN); | |
8193 | gcc_assert (temp); | |
8194 | return temp; | |
10fc867f | 8195 | } |
10f307d9 | 8196 | |
dff12ad7 | 8197 | case VEC_INTERLEAVE_HIGH_EXPR: |
8198 | case VEC_INTERLEAVE_LOW_EXPR: | |
8199 | { | |
8200 | expand_operands (treeop0, treeop1, | |
8201 | NULL_RTX, &op0, &op1, EXPAND_NORMAL); | |
8202 | this_optab = optab_for_tree_code (code, type, optab_default); | |
8203 | temp = expand_binop (mode, this_optab, op0, op1, target, unsignedp, | |
8204 | OPTAB_WIDEN); | |
8205 | gcc_assert (temp); | |
8206 | return temp; | |
8207 | } | |
87ec3f77 | 8208 | |
dff12ad7 | 8209 | case VEC_LSHIFT_EXPR: |
8210 | case VEC_RSHIFT_EXPR: | |
8211 | { | |
8212 | target = expand_vec_shift_expr (ops, target); | |
8213 | return target; | |
8214 | } | |
155b05dc | 8215 | |
dff12ad7 | 8216 | case VEC_UNPACK_HI_EXPR: |
8217 | case VEC_UNPACK_LO_EXPR: | |
8218 | { | |
8219 | op0 = expand_normal (treeop0); | |
8220 | this_optab = optab_for_tree_code (code, type, optab_default); | |
8221 | temp = expand_widen_pattern_expr (ops, op0, NULL_RTX, NULL_RTX, | |
8222 | target, unsignedp); | |
8223 | gcc_assert (temp); | |
8224 | return temp; | |
8225 | } | |
a9d9ab08 | 8226 | |
dff12ad7 | 8227 | case VEC_UNPACK_FLOAT_HI_EXPR: |
8228 | case VEC_UNPACK_FLOAT_LO_EXPR: | |
8229 | { | |
8230 | op0 = expand_normal (treeop0); | |
8231 | /* The signedness is determined from input operand. */ | |
8232 | this_optab = optab_for_tree_code (code, | |
8233 | TREE_TYPE (treeop0), | |
8234 | optab_default); | |
8235 | temp = expand_widen_pattern_expr | |
8236 | (ops, op0, NULL_RTX, NULL_RTX, | |
8237 | target, TYPE_UNSIGNED (TREE_TYPE (treeop0))); | |
155b05dc | 8238 | |
dff12ad7 | 8239 | gcc_assert (temp); |
8240 | return temp; | |
8241 | } | |
d2ae1b1e | 8242 | |
dff12ad7 | 8243 | case VEC_WIDEN_MULT_HI_EXPR: |
8244 | case VEC_WIDEN_MULT_LO_EXPR: | |
8245 | { | |
8246 | tree oprnd0 = treeop0; | |
8247 | tree oprnd1 = treeop1; | |
acfb31e5 | 8248 | |
dff12ad7 | 8249 | expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL); |
8250 | target = expand_widen_pattern_expr (ops, op0, op1, NULL_RTX, | |
8251 | target, unsignedp); | |
8252 | gcc_assert (target); | |
8253 | return target; | |
8254 | } | |
1f8b6002 | 8255 | |
dff12ad7 | 8256 | case VEC_PACK_TRUNC_EXPR: |
8257 | case VEC_PACK_SAT_EXPR: | |
8258 | case VEC_PACK_FIX_TRUNC_EXPR: | |
8259 | mode = TYPE_MODE (TREE_TYPE (treeop0)); | |
8260 | goto binop; | |
10f307d9 | 8261 | |
c86930b0 | 8262 | case DOT_PROD_EXPR: |
8263 | { | |
8264 | tree oprnd0 = treeop0; | |
8265 | tree oprnd1 = treeop1; | |
8266 | tree oprnd2 = treeop2; | |
8267 | rtx op2; | |
8268 | ||
8269 | expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL); | |
8270 | op2 = expand_normal (oprnd2); | |
8271 | target = expand_widen_pattern_expr (ops, op0, op1, op2, | |
8272 | target, unsignedp); | |
8273 | return target; | |
8274 | } | |
8275 | ||
8276 | case REALIGN_LOAD_EXPR: | |
8277 | { | |
8278 | tree oprnd0 = treeop0; | |
8279 | tree oprnd1 = treeop1; | |
8280 | tree oprnd2 = treeop2; | |
8281 | rtx op2; | |
8282 | ||
8283 | this_optab = optab_for_tree_code (code, type, optab_default); | |
8284 | expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL); | |
8285 | op2 = expand_normal (oprnd2); | |
8286 | temp = expand_ternary_op (mode, this_optab, op0, op1, op2, | |
8287 | target, unsignedp); | |
8288 | gcc_assert (temp); | |
8289 | return temp; | |
8290 | } | |
8291 | ||
dff12ad7 | 8292 | default: |
8293 | gcc_unreachable (); | |
8294 | } | |
d2ae1b1e | 8295 | |
dff12ad7 | 8296 | /* Here to do an ordinary binary operator. */ |
8297 | binop: | |
8298 | expand_operands (treeop0, treeop1, | |
8299 | subtarget, &op0, &op1, EXPAND_NORMAL); | |
8300 | binop2: | |
8301 | this_optab = optab_for_tree_code (code, type, optab_default); | |
8302 | binop3: | |
8303 | if (modifier == EXPAND_STACK_PARM) | |
8304 | target = 0; | |
8305 | temp = expand_binop (mode, this_optab, op0, op1, target, | |
8306 | unsignedp, OPTAB_LIB_WIDEN); | |
8307 | gcc_assert (temp); | |
8308 | return REDUCE_BIT_FIELD (temp); | |
8309 | } | |
8310 | #undef REDUCE_BIT_FIELD | |
d324678b | 8311 | |
16c9337c | 8312 | rtx |
dff12ad7 | 8313 | expand_expr_real_1 (tree exp, rtx target, enum machine_mode tmode, |
8314 | enum expand_modifier modifier, rtx *alt_rtl) | |
8315 | { | |
8316 | rtx op0, op1, temp, decl_rtl; | |
8317 | tree type; | |
8318 | int unsignedp; | |
8319 | enum machine_mode mode; | |
8320 | enum tree_code code = TREE_CODE (exp); | |
dff12ad7 | 8321 | rtx subtarget, original_target; |
8322 | int ignore; | |
8323 | tree context; | |
8324 | bool reduce_bit_field; | |
8325 | location_t loc = EXPR_LOCATION (exp); | |
8326 | struct separate_ops ops; | |
8327 | tree treeop0, treeop1, treeop2; | |
ae929441 | 8328 | tree ssa_name = NULL_TREE; |
8329 | gimple g; | |
d324678b | 8330 | |
dff12ad7 | 8331 | type = TREE_TYPE (exp); |
8332 | mode = TYPE_MODE (type); | |
8333 | unsignedp = TYPE_UNSIGNED (type); | |
d324678b | 8334 | |
dff12ad7 | 8335 | treeop0 = treeop1 = treeop2 = NULL_TREE; |
8336 | if (!VL_EXP_CLASS_P (exp)) | |
8337 | switch (TREE_CODE_LENGTH (code)) | |
8338 | { | |
8339 | default: | |
8340 | case 3: treeop2 = TREE_OPERAND (exp, 2); | |
8341 | case 2: treeop1 = TREE_OPERAND (exp, 1); | |
8342 | case 1: treeop0 = TREE_OPERAND (exp, 0); | |
8343 | case 0: break; | |
8344 | } | |
8345 | ops.code = code; | |
8346 | ops.type = type; | |
8347 | ops.op0 = treeop0; | |
8348 | ops.op1 = treeop1; | |
8349 | ops.op2 = treeop2; | |
8350 | ops.location = loc; | |
dda75192 | 8351 | |
dff12ad7 | 8352 | ignore = (target == const0_rtx |
8353 | || ((CONVERT_EXPR_CODE_P (code) | |
8354 | || code == COND_EXPR || code == VIEW_CONVERT_EXPR) | |
8355 | && TREE_CODE (type) == VOID_TYPE)); | |
5b1bb114 | 8356 | |
dff12ad7 | 8357 | /* An operation in what may be a bit-field type needs the |
8358 | result to be reduced to the precision of the bit-field type, | |
8359 | which is narrower than that of the type's mode. */ | |
8360 | reduce_bit_field = (!ignore | |
8361 | && TREE_CODE (type) == INTEGER_TYPE | |
8362 | && GET_MODE_PRECISION (mode) > TYPE_PRECISION (type)); | |
dda75192 | 8363 | |
dff12ad7 | 8364 | /* If we are going to ignore this result, we need only do something |
8365 | if there is a side-effect somewhere in the expression. If there | |
8366 | is, short-circuit the most common cases here. Note that we must | |
8367 | not call expand_expr with anything but const0_rtx in case this | |
8368 | is an initial expansion of a size that contains a PLACEHOLDER_EXPR. */ | |
d2ae1b1e | 8369 | |
dff12ad7 | 8370 | if (ignore) |
8371 | { | |
8372 | if (! TREE_SIDE_EFFECTS (exp)) | |
8373 | return const0_rtx; | |
8374 | ||
8375 | /* Ensure we reference a volatile object even if value is ignored, but | |
8376 | don't do this if all we are doing is taking its address. */ | |
8377 | if (TREE_THIS_VOLATILE (exp) | |
8378 | && TREE_CODE (exp) != FUNCTION_DECL | |
8379 | && mode != VOIDmode && mode != BLKmode | |
8380 | && modifier != EXPAND_CONST_ADDRESS) | |
78aee3e4 | 8381 | { |
dff12ad7 | 8382 | temp = expand_expr (exp, NULL_RTX, VOIDmode, modifier); |
8383 | if (MEM_P (temp)) | |
8384 | temp = copy_to_reg (temp); | |
8385 | return const0_rtx; | |
78aee3e4 | 8386 | } |
8387 | ||
dff12ad7 | 8388 | if (TREE_CODE_CLASS (code) == tcc_unary |
8389 | || code == COMPONENT_REF || code == INDIRECT_REF) | |
8390 | return expand_expr (treeop0, const0_rtx, VOIDmode, | |
8391 | modifier); | |
f9b618cc | 8392 | |
dff12ad7 | 8393 | else if (TREE_CODE_CLASS (code) == tcc_binary |
8394 | || TREE_CODE_CLASS (code) == tcc_comparison | |
8395 | || code == ARRAY_REF || code == ARRAY_RANGE_REF) | |
8396 | { | |
8397 | expand_expr (treeop0, const0_rtx, VOIDmode, modifier); | |
8398 | expand_expr (treeop1, const0_rtx, VOIDmode, modifier); | |
8399 | return const0_rtx; | |
8400 | } | |
8401 | else if (code == BIT_FIELD_REF) | |
8402 | { | |
8403 | expand_expr (treeop0, const0_rtx, VOIDmode, modifier); | |
8404 | expand_expr (treeop1, const0_rtx, VOIDmode, modifier); | |
8405 | expand_expr (treeop2, const0_rtx, VOIDmode, modifier); | |
8406 | return const0_rtx; | |
8407 | } | |
f9b618cc | 8408 | |
dff12ad7 | 8409 | target = 0; |
8410 | } | |
f9b618cc | 8411 | |
dff12ad7 | 8412 | if (reduce_bit_field && modifier == EXPAND_STACK_PARM) |
8413 | target = 0; | |
f9b618cc | 8414 | |
dff12ad7 | 8415 | /* Use subtarget as the target for operand 0 of a binary operation. */ |
8416 | subtarget = get_subtarget (target); | |
8417 | original_target = target; | |
f9b618cc | 8418 | |
dff12ad7 | 8419 | switch (code) |
8420 | { | |
8421 | case LABEL_DECL: | |
8422 | { | |
8423 | tree function = decl_function_context (exp); | |
f9b618cc | 8424 | |
dff12ad7 | 8425 | temp = label_rtx (exp); |
8426 | temp = gen_rtx_LABEL_REF (Pmode, temp); | |
f9b618cc | 8427 | |
dff12ad7 | 8428 | if (function != current_function_decl |
8429 | && function != 0) | |
8430 | LABEL_REF_NONLOCAL_P (temp) = 1; | |
8431 | ||
8432 | temp = gen_rtx_MEM (FUNCTION_MODE, temp); | |
8433 | return temp; | |
f9b618cc | 8434 | } |
8435 | ||
dff12ad7 | 8436 | case SSA_NAME: |
8437 | /* ??? ivopts calls expander, without any preparation from | |
8438 | out-of-ssa. So fake instructions as if this was an access to the | |
8439 | base variable. This unnecessarily allocates a pseudo, see how we can | |
8440 | reuse it, if partition base vars have it set already. */ | |
8441 | if (!currently_expanding_to_rtl) | |
ae929441 | 8442 | return expand_expr_real_1 (SSA_NAME_VAR (exp), target, tmode, modifier, |
8443 | NULL); | |
8444 | ||
8445 | g = get_gimple_for_ssa_name (exp); | |
351b6ccf | 8446 | /* For EXPAND_INITIALIZER try harder to get something simpler. */ |
8447 | if (g == NULL | |
8448 | && modifier == EXPAND_INITIALIZER | |
8449 | && !SSA_NAME_IS_DEFAULT_DEF (exp) | |
8450 | && (optimize || DECL_IGNORED_P (SSA_NAME_VAR (exp))) | |
8451 | && stmt_is_replaceable_p (SSA_NAME_DEF_STMT (exp))) | |
8452 | g = SSA_NAME_DEF_STMT (exp); | |
ae929441 | 8453 | if (g) |
8454 | return expand_expr_real (gimple_assign_rhs_to_tree (g), target, tmode, | |
8455 | modifier, NULL); | |
8456 | ||
8457 | ssa_name = exp; | |
8458 | decl_rtl = get_rtx_for_ssa_name (ssa_name); | |
8459 | exp = SSA_NAME_VAR (ssa_name); | |
dff12ad7 | 8460 | goto expand_decl_rtl; |
f96c43fb | 8461 | |
dff12ad7 | 8462 | case PARM_DECL: |
8463 | case VAR_DECL: | |
8464 | /* If a static var's type was incomplete when the decl was written, | |
8465 | but the type is complete now, lay out the decl now. */ | |
8466 | if (DECL_SIZE (exp) == 0 | |
8467 | && COMPLETE_OR_UNBOUND_ARRAY_TYPE_P (TREE_TYPE (exp)) | |
8468 | && (TREE_STATIC (exp) || DECL_EXTERNAL (exp))) | |
8469 | layout_decl (exp, 0); | |
8470 | ||
dff12ad7 | 8471 | /* ... fall through ... */ |
f96c43fb | 8472 | |
dff12ad7 | 8473 | case FUNCTION_DECL: |
8474 | case RESULT_DECL: | |
8475 | decl_rtl = DECL_RTL (exp); | |
8476 | expand_decl_rtl: | |
8477 | gcc_assert (decl_rtl); | |
8478 | decl_rtl = copy_rtx (decl_rtl); | |
47a55be7 | 8479 | /* Record writes to register variables. */ |
8480 | if (modifier == EXPAND_WRITE && REG_P (decl_rtl) | |
8481 | && REGNO (decl_rtl) < FIRST_PSEUDO_REGISTER) | |
8482 | { | |
8483 | int i = REGNO (decl_rtl); | |
8484 | int nregs = hard_regno_nregs[i][GET_MODE (decl_rtl)]; | |
8485 | while (nregs) | |
8486 | { | |
8487 | SET_HARD_REG_BIT (crtl->asm_clobbers, i); | |
8488 | i++; | |
8489 | nregs--; | |
8490 | } | |
8491 | } | |
f96c43fb | 8492 | |
dff12ad7 | 8493 | /* Ensure variable marked as used even if it doesn't go through |
8494 | a parser. If it hasn't be used yet, write out an external | |
8495 | definition. */ | |
8496 | if (! TREE_USED (exp)) | |
8497 | { | |
8498 | assemble_external (exp); | |
8499 | TREE_USED (exp) = 1; | |
f96c43fb | 8500 | } |
8501 | ||
dff12ad7 | 8502 | /* Show we haven't gotten RTL for this yet. */ |
8503 | temp = 0; | |
f96c43fb | 8504 | |
dff12ad7 | 8505 | /* Variables inherited from containing functions should have |
8506 | been lowered by this point. */ | |
8507 | context = decl_function_context (exp); | |
8508 | gcc_assert (!context | |
8509 | || context == current_function_decl | |
8510 | || TREE_STATIC (exp) | |
ca601f81 | 8511 | || DECL_EXTERNAL (exp) |
dff12ad7 | 8512 | /* ??? C++ creates functions that are not TREE_STATIC. */ |
8513 | || TREE_CODE (exp) == FUNCTION_DECL); | |
f96c43fb | 8514 | |
dff12ad7 | 8515 | /* This is the case of an array whose size is to be determined |
8516 | from its initializer, while the initializer is still being parsed. | |
8517 | See expand_decl. */ | |
e58d0f17 | 8518 | |
dff12ad7 | 8519 | if (MEM_P (decl_rtl) && REG_P (XEXP (decl_rtl, 0))) |
8520 | temp = validize_mem (decl_rtl); | |
f96c43fb | 8521 | |
dff12ad7 | 8522 | /* If DECL_RTL is memory, we are in the normal case and the |
8523 | address is not valid, get the address into a register. */ | |
ff385626 | 8524 | |
dff12ad7 | 8525 | else if (MEM_P (decl_rtl) && modifier != EXPAND_INITIALIZER) |
8526 | { | |
8527 | if (alt_rtl) | |
8528 | *alt_rtl = decl_rtl; | |
8529 | decl_rtl = use_anchored_address (decl_rtl); | |
8530 | if (modifier != EXPAND_CONST_ADDRESS | |
8531 | && modifier != EXPAND_SUM | |
bd1a81f7 | 8532 | && !memory_address_addr_space_p (DECL_MODE (exp), |
8533 | XEXP (decl_rtl, 0), | |
8534 | MEM_ADDR_SPACE (decl_rtl))) | |
dff12ad7 | 8535 | temp = replace_equiv_address (decl_rtl, |
8536 | copy_rtx (XEXP (decl_rtl, 0))); | |
f96c43fb | 8537 | } |
8538 | ||
dff12ad7 | 8539 | /* If we got something, return it. But first, set the alignment |
8540 | if the address is a register. */ | |
8541 | if (temp != 0) | |
8542 | { | |
8543 | if (MEM_P (temp) && REG_P (XEXP (temp, 0))) | |
8544 | mark_reg_pointer (XEXP (temp, 0), DECL_ALIGN (exp)); | |
f96c43fb | 8545 | |
dff12ad7 | 8546 | return temp; |
8547 | } | |
0de36bdb | 8548 | |
dff12ad7 | 8549 | /* If the mode of DECL_RTL does not match that of the decl, it |
8550 | must be a promoted value. We return a SUBREG of the wanted mode, | |
8551 | but mark it so that we know that it was already extended. */ | |
ae929441 | 8552 | if (REG_P (decl_rtl) && GET_MODE (decl_rtl) != DECL_MODE (exp)) |
7e564f73 | 8553 | { |
dff12ad7 | 8554 | enum machine_mode pmode; |
7e564f73 | 8555 | |
ae929441 | 8556 | /* Get the signedness to be used for this variable. Ensure we get |
8557 | the same mode we got when the variable was declared. */ | |
8558 | if (code == SSA_NAME | |
8559 | && (g = SSA_NAME_DEF_STMT (ssa_name)) | |
8560 | && gimple_code (g) == GIMPLE_CALL) | |
8561 | pmode = promote_function_mode (type, mode, &unsignedp, | |
8562 | TREE_TYPE | |
8563 | (TREE_TYPE (gimple_call_fn (g))), | |
8564 | 2); | |
8565 | else | |
8566 | pmode = promote_decl_mode (exp, &unsignedp); | |
dff12ad7 | 8567 | gcc_assert (GET_MODE (decl_rtl) == pmode); |
8568 | ||
8569 | temp = gen_lowpart_SUBREG (mode, decl_rtl); | |
8570 | SUBREG_PROMOTED_VAR_P (temp) = 1; | |
8571 | SUBREG_PROMOTED_UNSIGNED_SET (temp, unsignedp); | |
8572 | return temp; | |
7e564f73 | 8573 | } |
8574 | ||
dff12ad7 | 8575 | return decl_rtl; |
10f307d9 | 8576 | |
dff12ad7 | 8577 | case INTEGER_CST: |
8578 | temp = immed_double_const (TREE_INT_CST_LOW (exp), | |
8579 | TREE_INT_CST_HIGH (exp), mode); | |
10f307d9 | 8580 | |
dff12ad7 | 8581 | return temp; |
10f307d9 | 8582 | |
dff12ad7 | 8583 | case VECTOR_CST: |
8584 | { | |
8585 | tree tmp = NULL_TREE; | |
8586 | if (GET_MODE_CLASS (mode) == MODE_VECTOR_INT | |
8587 | || GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT | |
8588 | || GET_MODE_CLASS (mode) == MODE_VECTOR_FRACT | |
8589 | || GET_MODE_CLASS (mode) == MODE_VECTOR_UFRACT | |
8590 | || GET_MODE_CLASS (mode) == MODE_VECTOR_ACCUM | |
8591 | || GET_MODE_CLASS (mode) == MODE_VECTOR_UACCUM) | |
8592 | return const_vector_from_tree (exp); | |
8593 | if (GET_MODE_CLASS (mode) == MODE_INT) | |
8594 | { | |
8595 | tree type_for_mode = lang_hooks.types.type_for_mode (mode, 1); | |
8596 | if (type_for_mode) | |
8597 | tmp = fold_unary_loc (loc, VIEW_CONVERT_EXPR, type_for_mode, exp); | |
8598 | } | |
8599 | if (!tmp) | |
8600 | tmp = build_constructor_from_list (type, | |
8601 | TREE_VECTOR_CST_ELTS (exp)); | |
8602 | return expand_expr (tmp, ignore ? const0_rtx : target, | |
8603 | tmode, modifier); | |
8604 | } | |
10f307d9 | 8605 | |
dff12ad7 | 8606 | case CONST_DECL: |
8607 | return expand_expr (DECL_INITIAL (exp), target, VOIDmode, modifier); | |
10f307d9 | 8608 | |
dff12ad7 | 8609 | case REAL_CST: |
8610 | /* If optimized, generate immediate CONST_DOUBLE | |
8611 | which will be turned into memory by reload if necessary. | |
2c551bbe | 8612 | |
dff12ad7 | 8613 | We used to force a register so that loop.c could see it. But |
8614 | this does not allow gen_* patterns to perform optimizations with | |
8615 | the constants. It also produces two insns in cases like "x = 1.0;". | |
8616 | On most machines, floating-point constants are not permitted in | |
8617 | many insns, so we'd end up copying it to a register in any case. | |
10f307d9 | 8618 | |
dff12ad7 | 8619 | Now, we do the copying in expand_binop, if appropriate. */ |
8620 | return CONST_DOUBLE_FROM_REAL_VALUE (TREE_REAL_CST (exp), | |
8621 | TYPE_MODE (TREE_TYPE (exp))); | |
2c551bbe | 8622 | |
dff12ad7 | 8623 | case FIXED_CST: |
8624 | return CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (exp), | |
8625 | TYPE_MODE (TREE_TYPE (exp))); | |
10f307d9 | 8626 | |
dff12ad7 | 8627 | case COMPLEX_CST: |
8628 | /* Handle evaluating a complex constant in a CONCAT target. */ | |
8629 | if (original_target && GET_CODE (original_target) == CONCAT) | |
a60e4107 | 8630 | { |
dff12ad7 | 8631 | enum machine_mode mode = TYPE_MODE (TREE_TYPE (TREE_TYPE (exp))); |
8632 | rtx rtarg, itarg; | |
8633 | ||
8634 | rtarg = XEXP (original_target, 0); | |
8635 | itarg = XEXP (original_target, 1); | |
8636 | ||
8637 | /* Move the real and imaginary parts separately. */ | |
8638 | op0 = expand_expr (TREE_REALPART (exp), rtarg, mode, EXPAND_NORMAL); | |
8639 | op1 = expand_expr (TREE_IMAGPART (exp), itarg, mode, EXPAND_NORMAL); | |
8640 | ||
8641 | if (op0 != rtarg) | |
8642 | emit_move_insn (rtarg, op0); | |
8643 | if (op1 != itarg) | |
8644 | emit_move_insn (itarg, op1); | |
8645 | ||
8646 | return original_target; | |
a60e4107 | 8647 | } |
10f307d9 | 8648 | |
dff12ad7 | 8649 | /* ... fall through ... */ |
10f307d9 | 8650 | |
dff12ad7 | 8651 | case STRING_CST: |
8652 | temp = expand_expr_constant (exp, 1, modifier); | |
43fda261 | 8653 | |
dff12ad7 | 8654 | /* temp contains a constant address. |
8655 | On RISC machines where a constant address isn't valid, | |
8656 | make some insns to get that address into a register. */ | |
8657 | if (modifier != EXPAND_CONST_ADDRESS | |
8658 | && modifier != EXPAND_INITIALIZER | |
8659 | && modifier != EXPAND_SUM | |
bd1a81f7 | 8660 | && ! memory_address_addr_space_p (mode, XEXP (temp, 0), |
8661 | MEM_ADDR_SPACE (temp))) | |
dff12ad7 | 8662 | return replace_equiv_address (temp, |
8663 | copy_rtx (XEXP (temp, 0))); | |
8664 | return temp; | |
43fda261 | 8665 | |
dff12ad7 | 8666 | case SAVE_EXPR: |
8667 | { | |
8668 | tree val = treeop0; | |
8669 | rtx ret = expand_expr_real_1 (val, target, tmode, modifier, alt_rtl); | |
94d01330 | 8670 | |
dff12ad7 | 8671 | if (!SAVE_EXPR_RESOLVED_P (exp)) |
8672 | { | |
8673 | /* We can indeed still hit this case, typically via builtin | |
8674 | expanders calling save_expr immediately before expanding | |
8675 | something. Assume this means that we only have to deal | |
8676 | with non-BLKmode values. */ | |
8677 | gcc_assert (GET_MODE (ret) != BLKmode); | |
a02b3586 | 8678 | |
dff12ad7 | 8679 | val = build_decl (EXPR_LOCATION (exp), |
8680 | VAR_DECL, NULL, TREE_TYPE (exp)); | |
8681 | DECL_ARTIFICIAL (val) = 1; | |
8682 | DECL_IGNORED_P (val) = 1; | |
8683 | treeop0 = val; | |
8684 | TREE_OPERAND (exp, 0) = treeop0; | |
8685 | SAVE_EXPR_RESOLVED_P (exp) = 1; | |
acd367d1 | 8686 | |
dff12ad7 | 8687 | if (!CONSTANT_P (ret)) |
8688 | ret = copy_to_reg (ret); | |
8689 | SET_DECL_RTL (val, ret); | |
8690 | } | |
acd367d1 | 8691 | |
dff12ad7 | 8692 | return ret; |
8693 | } | |
8694 | ||
dff12ad7 | 8695 | |
8696 | case CONSTRUCTOR: | |
8697 | /* If we don't need the result, just ensure we evaluate any | |
8698 | subexpressions. */ | |
8699 | if (ignore) | |
acd367d1 | 8700 | { |
dff12ad7 | 8701 | unsigned HOST_WIDE_INT idx; |
8702 | tree value; | |
8703 | ||
8704 | FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp), idx, value) | |
8705 | expand_expr (value, const0_rtx, VOIDmode, EXPAND_NORMAL); | |
8706 | ||
8707 | return const0_rtx; | |
acd367d1 | 8708 | } |
8709 | ||
dff12ad7 | 8710 | return expand_constructor (exp, target, modifier, false); |
10f307d9 | 8711 | |
5d9de213 | 8712 | case TARGET_MEM_REF: |
dff12ad7 | 8713 | { |
5d9de213 | 8714 | addr_space_t as = TYPE_ADDR_SPACE (TREE_TYPE (exp)); |
8715 | struct mem_address addr; | |
8716 | int icode, align; | |
bd1a81f7 | 8717 | |
5d9de213 | 8718 | get_address_description (exp, &addr); |
8719 | op0 = addr_for_mem_ref (&addr, as, true); | |
bd1a81f7 | 8720 | op0 = memory_address_addr_space (mode, op0, as); |
dff12ad7 | 8721 | temp = gen_rtx_MEM (mode, op0); |
dff12ad7 | 8722 | set_mem_attributes (temp, exp, 0); |
bd1a81f7 | 8723 | set_mem_addr_space (temp, as); |
5d9de213 | 8724 | align = MAX (TYPE_ALIGN (TREE_TYPE (exp)), |
8725 | get_object_alignment (exp, BIGGEST_ALIGNMENT)); | |
8726 | if (mode != BLKmode | |
8727 | && (unsigned) align < GET_MODE_ALIGNMENT (mode) | |
8728 | /* If the target does not have special handling for unaligned | |
8729 | loads of mode then it can use regular moves for them. */ | |
8730 | && ((icode = optab_handler (movmisalign_optab, mode)) | |
8731 | != CODE_FOR_nothing)) | |
dff12ad7 | 8732 | { |
dff12ad7 | 8733 | rtx reg, insn; |
a35a63ff | 8734 | |
dff12ad7 | 8735 | /* We've already validated the memory, and we're creating a |
8736 | new pseudo destination. The predicates really can't fail. */ | |
8737 | reg = gen_reg_rtx (mode); | |
8f0c8a8b | 8738 | |
dff12ad7 | 8739 | /* Nor can the insn generator. */ |
8740 | insn = GEN_FCN (icode) (reg, temp); | |
dd0cb1e8 | 8741 | gcc_assert (insn != NULL_RTX); |
dff12ad7 | 8742 | emit_insn (insn); |
99e03bd2 | 8743 | |
dff12ad7 | 8744 | return reg; |
8745 | } | |
dff12ad7 | 8746 | return temp; |
8747 | } | |
8748 | ||
182cf5a9 | 8749 | case MEM_REF: |
8750 | { | |
8751 | addr_space_t as | |
8752 | = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 1)))); | |
8753 | enum machine_mode address_mode; | |
8754 | tree base = TREE_OPERAND (exp, 0); | |
86638c2e | 8755 | gimple def_stmt; |
5d9de213 | 8756 | int icode, align; |
182cf5a9 | 8757 | /* Handle expansion of non-aliased memory with non-BLKmode. That |
8758 | might end up in a register. */ | |
8759 | if (TREE_CODE (base) == ADDR_EXPR) | |
8760 | { | |
8761 | HOST_WIDE_INT offset = mem_ref_offset (exp).low; | |
8762 | tree bit_offset; | |
8763 | base = TREE_OPERAND (base, 0); | |
8764 | if (!DECL_P (base)) | |
8765 | { | |
8766 | HOST_WIDE_INT off; | |
8767 | base = get_addr_base_and_unit_offset (base, &off); | |
8768 | gcc_assert (base); | |
8769 | offset += off; | |
8770 | } | |
8771 | /* If we are expanding a MEM_REF of a non-BLKmode non-addressable | |
8772 | decl we must use bitfield operations. */ | |
8773 | if (DECL_P (base) | |
8774 | && !TREE_ADDRESSABLE (base) | |
8775 | && DECL_MODE (base) != BLKmode | |
8776 | && DECL_RTL_SET_P (base) | |
8777 | && !MEM_P (DECL_RTL (base))) | |
8778 | { | |
8779 | tree bftype; | |
8780 | if (offset == 0 | |
8781 | && host_integerp (TYPE_SIZE (TREE_TYPE (exp)), 1) | |
8782 | && (GET_MODE_BITSIZE (DECL_MODE (base)) | |
8783 | == TREE_INT_CST_LOW (TYPE_SIZE (TREE_TYPE (exp))))) | |
8784 | return expand_expr (build1 (VIEW_CONVERT_EXPR, | |
8785 | TREE_TYPE (exp), base), | |
8786 | target, tmode, modifier); | |
8787 | bit_offset = bitsize_int (offset * BITS_PER_UNIT); | |
8788 | bftype = TREE_TYPE (base); | |
8789 | if (TYPE_MODE (TREE_TYPE (exp)) != BLKmode) | |
8790 | bftype = TREE_TYPE (exp); | |
8791 | return expand_expr (build3 (BIT_FIELD_REF, bftype, | |
8792 | base, | |
8793 | TYPE_SIZE (TREE_TYPE (exp)), | |
8794 | bit_offset), | |
8795 | target, tmode, modifier); | |
8796 | } | |
8797 | } | |
8798 | address_mode = targetm.addr_space.address_mode (as); | |
86638c2e | 8799 | base = TREE_OPERAND (exp, 0); |
8800 | if ((def_stmt = get_def_for_expr (base, BIT_AND_EXPR))) | |
5d9de213 | 8801 | { |
8802 | tree mask = gimple_assign_rhs2 (def_stmt); | |
8803 | base = build2 (BIT_AND_EXPR, TREE_TYPE (base), | |
8804 | gimple_assign_rhs1 (def_stmt), mask); | |
8805 | TREE_OPERAND (exp, 0) = base; | |
8806 | } | |
8807 | align = MAX (TYPE_ALIGN (TREE_TYPE (exp)), | |
8808 | get_object_alignment (exp, BIGGEST_ALIGNMENT)); | |
84f7af3e | 8809 | op0 = expand_expr (base, NULL_RTX, VOIDmode, EXPAND_SUM); |
86347018 | 8810 | op0 = memory_address_addr_space (address_mode, op0, as); |
182cf5a9 | 8811 | if (!integer_zerop (TREE_OPERAND (exp, 1))) |
6b0e9e4b | 8812 | { |
8813 | rtx off | |
8814 | = immed_double_int_const (mem_ref_offset (exp), address_mode); | |
8815 | op0 = simplify_gen_binary (PLUS, address_mode, op0, off); | |
8816 | } | |
182cf5a9 | 8817 | op0 = memory_address_addr_space (mode, op0, as); |
8818 | temp = gen_rtx_MEM (mode, op0); | |
8819 | set_mem_attributes (temp, exp, 0); | |
8820 | set_mem_addr_space (temp, as); | |
8821 | if (TREE_THIS_VOLATILE (exp)) | |
8822 | MEM_VOLATILE_P (temp) = 1; | |
5d9de213 | 8823 | if (mode != BLKmode |
8824 | && (unsigned) align < GET_MODE_ALIGNMENT (mode) | |
8825 | /* If the target does not have special handling for unaligned | |
8826 | loads of mode then it can use regular moves for them. */ | |
8827 | && ((icode = optab_handler (movmisalign_optab, mode)) | |
8828 | != CODE_FOR_nothing)) | |
8829 | { | |
8830 | rtx reg, insn; | |
8831 | ||
8832 | /* We've already validated the memory, and we're creating a | |
8833 | new pseudo destination. The predicates really can't fail. */ | |
8834 | reg = gen_reg_rtx (mode); | |
8835 | ||
8836 | /* Nor can the insn generator. */ | |
8837 | insn = GEN_FCN (icode) (reg, temp); | |
8838 | emit_insn (insn); | |
8839 | ||
8840 | return reg; | |
8841 | } | |
182cf5a9 | 8842 | return temp; |
8843 | } | |
8844 | ||
dff12ad7 | 8845 | case ARRAY_REF: |
8846 | ||
8847 | { | |
8848 | tree array = treeop0; | |
8849 | tree index = treeop1; | |
8850 | ||
8851 | /* Fold an expression like: "foo"[2]. | |
8852 | This is not done in fold so it won't happen inside &. | |
8853 | Don't fold if this is for wide characters since it's too | |
8854 | difficult to do correctly and this is a very rare case. */ | |
8855 | ||
8856 | if (modifier != EXPAND_CONST_ADDRESS | |
8857 | && modifier != EXPAND_INITIALIZER | |
8858 | && modifier != EXPAND_MEMORY) | |
8859 | { | |
8860 | tree t = fold_read_from_constant_string (exp); | |
8861 | ||
8862 | if (t) | |
8863 | return expand_expr (t, target, tmode, modifier); | |
8864 | } | |
8865 | ||
8866 | /* If this is a constant index into a constant array, | |
8867 | just get the value from the array. Handle both the cases when | |
8868 | we have an explicit constructor and when our operand is a variable | |
8869 | that was declared const. */ | |
8870 | ||
8871 | if (modifier != EXPAND_CONST_ADDRESS | |
8872 | && modifier != EXPAND_INITIALIZER | |
8873 | && modifier != EXPAND_MEMORY | |
8874 | && TREE_CODE (array) == CONSTRUCTOR | |
8875 | && ! TREE_SIDE_EFFECTS (array) | |
8876 | && TREE_CODE (index) == INTEGER_CST) | |
8877 | { | |
8878 | unsigned HOST_WIDE_INT ix; | |
8879 | tree field, value; | |
8880 | ||
8881 | FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (array), ix, | |
8882 | field, value) | |
8883 | if (tree_int_cst_equal (field, index)) | |
10b58489 | 8884 | { |
dff12ad7 | 8885 | if (!TREE_SIDE_EFFECTS (value)) |
8886 | return expand_expr (fold (value), target, tmode, modifier); | |
8887 | break; | |
10b58489 | 8888 | } |
dff12ad7 | 8889 | } |
10f307d9 | 8890 | |
dff12ad7 | 8891 | else if (optimize >= 1 |
8892 | && modifier != EXPAND_CONST_ADDRESS | |
8893 | && modifier != EXPAND_INITIALIZER | |
8894 | && modifier != EXPAND_MEMORY | |
8895 | && TREE_READONLY (array) && ! TREE_SIDE_EFFECTS (array) | |
8896 | && TREE_CODE (array) == VAR_DECL && DECL_INITIAL (array) | |
8897 | && TREE_CODE (DECL_INITIAL (array)) != ERROR_MARK | |
9ced88d0 | 8898 | && const_value_known_p (array)) |
dff12ad7 | 8899 | { |
8900 | if (TREE_CODE (index) == INTEGER_CST) | |
8901 | { | |
8902 | tree init = DECL_INITIAL (array); | |
68a556d6 | 8903 | |
dff12ad7 | 8904 | if (TREE_CODE (init) == CONSTRUCTOR) |
8905 | { | |
8906 | unsigned HOST_WIDE_INT ix; | |
8907 | tree field, value; | |
10f307d9 | 8908 | |
dff12ad7 | 8909 | FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (init), ix, |
8910 | field, value) | |
8911 | if (tree_int_cst_equal (field, index)) | |
8912 | { | |
8913 | if (TREE_SIDE_EFFECTS (value)) | |
8914 | break; | |
10f307d9 | 8915 | |
dff12ad7 | 8916 | if (TREE_CODE (value) == CONSTRUCTOR) |
8917 | { | |
8918 | /* If VALUE is a CONSTRUCTOR, this | |
8919 | optimization is only useful if | |
8920 | this doesn't store the CONSTRUCTOR | |
8921 | into memory. If it does, it is more | |
8922 | efficient to just load the data from | |
8923 | the array directly. */ | |
8924 | rtx ret = expand_constructor (value, target, | |
8925 | modifier, true); | |
8926 | if (ret == NULL_RTX) | |
8927 | break; | |
8928 | } | |
10f307d9 | 8929 | |
dff12ad7 | 8930 | return expand_expr (fold (value), target, tmode, |
8931 | modifier); | |
8932 | } | |
8933 | } | |
8934 | else if(TREE_CODE (init) == STRING_CST) | |
8935 | { | |
8936 | tree index1 = index; | |
8937 | tree low_bound = array_ref_low_bound (exp); | |
8938 | index1 = fold_convert_loc (loc, sizetype, | |
8939 | treeop1); | |
68a556d6 | 8940 | |
dff12ad7 | 8941 | /* Optimize the special-case of a zero lower bound. |
68a556d6 | 8942 | |
dff12ad7 | 8943 | We convert the low_bound to sizetype to avoid some problems |
8944 | with constant folding. (E.g. suppose the lower bound is 1, | |
8945 | and its mode is QI. Without the conversion,l (ARRAY | |
8946 | +(INDEX-(unsigned char)1)) becomes ((ARRAY+(-(unsigned char)1)) | |
8947 | +INDEX), which becomes (ARRAY+255+INDEX). Opps!) */ | |
10f307d9 | 8948 | |
dff12ad7 | 8949 | if (! integer_zerop (low_bound)) |
8950 | index1 = size_diffop_loc (loc, index1, | |
8951 | fold_convert_loc (loc, sizetype, | |
8952 | low_bound)); | |
10f307d9 | 8953 | |
dff12ad7 | 8954 | if (0 > compare_tree_int (index1, |
8955 | TREE_STRING_LENGTH (init))) | |
8956 | { | |
8957 | tree type = TREE_TYPE (TREE_TYPE (init)); | |
8958 | enum machine_mode mode = TYPE_MODE (type); | |
10f307d9 | 8959 | |
dff12ad7 | 8960 | if (GET_MODE_CLASS (mode) == MODE_INT |
8961 | && GET_MODE_SIZE (mode) == 1) | |
8962 | return gen_int_mode (TREE_STRING_POINTER (init) | |
8963 | [TREE_INT_CST_LOW (index1)], | |
8964 | mode); | |
8965 | } | |
8966 | } | |
8967 | } | |
8968 | } | |
8969 | } | |
8970 | goto normal_inner_ref; | |
8971 | ||
8972 | case COMPONENT_REF: | |
8973 | /* If the operand is a CONSTRUCTOR, we can just extract the | |
8974 | appropriate field if it is present. */ | |
8975 | if (TREE_CODE (treeop0) == CONSTRUCTOR) | |
8976 | { | |
8977 | unsigned HOST_WIDE_INT idx; | |
8978 | tree field, value; | |
8979 | ||
8980 | FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (treeop0), | |
8981 | idx, field, value) | |
8982 | if (field == treeop1 | |
8983 | /* We can normally use the value of the field in the | |
8984 | CONSTRUCTOR. However, if this is a bitfield in | |
8985 | an integral mode that we can fit in a HOST_WIDE_INT, | |
8986 | we must mask only the number of bits in the bitfield, | |
8987 | since this is done implicitly by the constructor. If | |
8988 | the bitfield does not meet either of those conditions, | |
8989 | we can't do this optimization. */ | |
8990 | && (! DECL_BIT_FIELD (field) | |
8991 | || ((GET_MODE_CLASS (DECL_MODE (field)) == MODE_INT) | |
8992 | && (GET_MODE_BITSIZE (DECL_MODE (field)) | |
8993 | <= HOST_BITS_PER_WIDE_INT)))) | |
8994 | { | |
8995 | if (DECL_BIT_FIELD (field) | |
8996 | && modifier == EXPAND_STACK_PARM) | |
8997 | target = 0; | |
8998 | op0 = expand_expr (value, target, tmode, modifier); | |
8999 | if (DECL_BIT_FIELD (field)) | |
9000 | { | |
9001 | HOST_WIDE_INT bitsize = TREE_INT_CST_LOW (DECL_SIZE (field)); | |
9002 | enum machine_mode imode = TYPE_MODE (TREE_TYPE (field)); | |
9003 | ||
9004 | if (TYPE_UNSIGNED (TREE_TYPE (field))) | |
9005 | { | |
9006 | op1 = GEN_INT (((HOST_WIDE_INT) 1 << bitsize) - 1); | |
9007 | op0 = expand_and (imode, op0, op1, target); | |
9008 | } | |
9009 | else | |
9010 | { | |
9011 | tree count | |
9012 | = build_int_cst (NULL_TREE, | |
9013 | GET_MODE_BITSIZE (imode) - bitsize); | |
9014 | ||
9015 | op0 = expand_shift (LSHIFT_EXPR, imode, op0, count, | |
9016 | target, 0); | |
9017 | op0 = expand_shift (RSHIFT_EXPR, imode, op0, count, | |
9018 | target, 0); | |
9019 | } | |
9020 | } | |
9021 | ||
9022 | return op0; | |
9023 | } | |
9024 | } | |
9025 | goto normal_inner_ref; | |
9026 | ||
9027 | case BIT_FIELD_REF: | |
9028 | case ARRAY_RANGE_REF: | |
9029 | normal_inner_ref: | |
9030 | { | |
9031 | enum machine_mode mode1, mode2; | |
9032 | HOST_WIDE_INT bitsize, bitpos; | |
9033 | tree offset; | |
9034 | int volatilep = 0, must_force_mem; | |
8eef3a45 | 9035 | bool packedp = false; |
dff12ad7 | 9036 | tree tem = get_inner_reference (exp, &bitsize, &bitpos, &offset, |
9037 | &mode1, &unsignedp, &volatilep, true); | |
9038 | rtx orig_op0, memloc; | |
9039 | ||
9040 | /* If we got back the original object, something is wrong. Perhaps | |
9041 | we are evaluating an expression too early. In any event, don't | |
9042 | infinitely recurse. */ | |
9043 | gcc_assert (tem != exp); | |
9044 | ||
8eef3a45 | 9045 | if (TYPE_PACKED (TREE_TYPE (TREE_OPERAND (exp, 0))) |
9046 | || (TREE_CODE (TREE_OPERAND (exp, 1)) == FIELD_DECL | |
9047 | && DECL_PACKED (TREE_OPERAND (exp, 1)))) | |
9048 | packedp = true; | |
9049 | ||
dff12ad7 | 9050 | /* If TEM's type is a union of variable size, pass TARGET to the inner |
9051 | computation, since it will need a temporary and TARGET is known | |
9052 | to have to do. This occurs in unchecked conversion in Ada. */ | |
9053 | orig_op0 = op0 | |
9054 | = expand_expr (tem, | |
9055 | (TREE_CODE (TREE_TYPE (tem)) == UNION_TYPE | |
9056 | && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem))) | |
9057 | != INTEGER_CST) | |
9058 | && modifier != EXPAND_STACK_PARM | |
9059 | ? target : NULL_RTX), | |
9060 | VOIDmode, | |
9061 | (modifier == EXPAND_INITIALIZER | |
9062 | || modifier == EXPAND_CONST_ADDRESS | |
9063 | || modifier == EXPAND_STACK_PARM) | |
9064 | ? modifier : EXPAND_NORMAL); | |
9065 | ||
a420d927 | 9066 | |
9067 | /* If the bitfield is volatile, we want to access it in the | |
1795103a | 9068 | field's mode, not the computed mode. |
9069 | If a MEM has VOIDmode (external with incomplete type), | |
9070 | use BLKmode for it instead. */ | |
9071 | if (MEM_P (op0)) | |
9072 | { | |
9073 | if (volatilep && flag_strict_volatile_bitfields > 0) | |
9074 | op0 = adjust_address (op0, mode1, 0); | |
9075 | else if (GET_MODE (op0) == VOIDmode) | |
9076 | op0 = adjust_address (op0, BLKmode, 0); | |
9077 | } | |
a420d927 | 9078 | |
dff12ad7 | 9079 | mode2 |
9080 | = CONSTANT_P (op0) ? TYPE_MODE (TREE_TYPE (tem)) : GET_MODE (op0); | |
9081 | ||
9082 | /* If we have either an offset, a BLKmode result, or a reference | |
9083 | outside the underlying object, we must force it to memory. | |
9084 | Such a case can occur in Ada if we have unchecked conversion | |
9085 | of an expression from a scalar type to an aggregate type or | |
9086 | for an ARRAY_RANGE_REF whose type is BLKmode, or if we were | |
9087 | passed a partially uninitialized object or a view-conversion | |
9088 | to a larger size. */ | |
9089 | must_force_mem = (offset | |
9090 | || mode1 == BLKmode | |
9091 | || bitpos + bitsize > GET_MODE_BITSIZE (mode2)); | |
9092 | ||
9093 | /* Handle CONCAT first. */ | |
9094 | if (GET_CODE (op0) == CONCAT && !must_force_mem) | |
9095 | { | |
9096 | if (bitpos == 0 | |
9097 | && bitsize == GET_MODE_BITSIZE (GET_MODE (op0))) | |
9098 | return op0; | |
9099 | if (bitpos == 0 | |
9100 | && bitsize == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 0))) | |
9101 | && bitsize) | |
9102 | { | |
9103 | op0 = XEXP (op0, 0); | |
9104 | mode2 = GET_MODE (op0); | |
9105 | } | |
9106 | else if (bitpos == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 0))) | |
9107 | && bitsize == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 1))) | |
9108 | && bitpos | |
9109 | && bitsize) | |
9110 | { | |
9111 | op0 = XEXP (op0, 1); | |
9112 | bitpos = 0; | |
9113 | mode2 = GET_MODE (op0); | |
9114 | } | |
9115 | else | |
9116 | /* Otherwise force into memory. */ | |
9117 | must_force_mem = 1; | |
9118 | } | |
9119 | ||
9120 | /* If this is a constant, put it in a register if it is a legitimate | |
9121 | constant and we don't need a memory reference. */ | |
9122 | if (CONSTANT_P (op0) | |
9123 | && mode2 != BLKmode | |
9124 | && LEGITIMATE_CONSTANT_P (op0) | |
9125 | && !must_force_mem) | |
9126 | op0 = force_reg (mode2, op0); | |
9127 | ||
9128 | /* Otherwise, if this is a constant, try to force it to the constant | |
9129 | pool. Note that back-ends, e.g. MIPS, may refuse to do so if it | |
9130 | is a legitimate constant. */ | |
9131 | else if (CONSTANT_P (op0) && (memloc = force_const_mem (mode2, op0))) | |
9132 | op0 = validize_mem (memloc); | |
9133 | ||
9134 | /* Otherwise, if this is a constant or the object is not in memory | |
9135 | and need be, put it there. */ | |
9136 | else if (CONSTANT_P (op0) || (!MEM_P (op0) && must_force_mem)) | |
9137 | { | |
9138 | tree nt = build_qualified_type (TREE_TYPE (tem), | |
9139 | (TYPE_QUALS (TREE_TYPE (tem)) | |
9140 | | TYPE_QUAL_CONST)); | |
9141 | memloc = assign_temp (nt, 1, 1, 1); | |
9142 | emit_move_insn (memloc, op0); | |
9143 | op0 = memloc; | |
9144 | } | |
9145 | ||
9146 | if (offset) | |
9147 | { | |
98155838 | 9148 | enum machine_mode address_mode; |
dff12ad7 | 9149 | rtx offset_rtx = expand_expr (offset, NULL_RTX, VOIDmode, |
9150 | EXPAND_SUM); | |
9151 | ||
9152 | gcc_assert (MEM_P (op0)); | |
9153 | ||
98155838 | 9154 | address_mode |
9155 | = targetm.addr_space.address_mode (MEM_ADDR_SPACE (op0)); | |
9156 | if (GET_MODE (offset_rtx) != address_mode) | |
9157 | offset_rtx = convert_to_mode (address_mode, offset_rtx, 0); | |
dff12ad7 | 9158 | |
9159 | if (GET_MODE (op0) == BLKmode | |
9160 | /* A constant address in OP0 can have VOIDmode, we must | |
9161 | not try to call force_reg in that case. */ | |
9162 | && GET_MODE (XEXP (op0, 0)) != VOIDmode | |
9163 | && bitsize != 0 | |
9164 | && (bitpos % bitsize) == 0 | |
9165 | && (bitsize % GET_MODE_ALIGNMENT (mode1)) == 0 | |
9166 | && MEM_ALIGN (op0) == GET_MODE_ALIGNMENT (mode1)) | |
9167 | { | |
9168 | op0 = adjust_address (op0, mode1, bitpos / BITS_PER_UNIT); | |
9169 | bitpos = 0; | |
9170 | } | |
9171 | ||
9172 | op0 = offset_address (op0, offset_rtx, | |
9173 | highest_pow2_factor (offset)); | |
9174 | } | |
9175 | ||
9176 | /* If OFFSET is making OP0 more aligned than BIGGEST_ALIGNMENT, | |
9177 | record its alignment as BIGGEST_ALIGNMENT. */ | |
9178 | if (MEM_P (op0) && bitpos == 0 && offset != 0 | |
9179 | && is_aligning_offset (offset, tem)) | |
9180 | set_mem_align (op0, BIGGEST_ALIGNMENT); | |
9181 | ||
9182 | /* Don't forget about volatility even if this is a bitfield. */ | |
9183 | if (MEM_P (op0) && volatilep && ! MEM_VOLATILE_P (op0)) | |
9184 | { | |
9185 | if (op0 == orig_op0) | |
9186 | op0 = copy_rtx (op0); | |
9187 | ||
9188 | MEM_VOLATILE_P (op0) = 1; | |
9189 | } | |
9190 | ||
9191 | /* In cases where an aligned union has an unaligned object | |
9192 | as a field, we might be extracting a BLKmode value from | |
9193 | an integer-mode (e.g., SImode) object. Handle this case | |
9194 | by doing the extract into an object as wide as the field | |
9195 | (which we know to be the width of a basic mode), then | |
9196 | storing into memory, and changing the mode to BLKmode. */ | |
9197 | if (mode1 == VOIDmode | |
9198 | || REG_P (op0) || GET_CODE (op0) == SUBREG | |
9199 | || (mode1 != BLKmode && ! direct_load[(int) mode1] | |
9200 | && GET_MODE_CLASS (mode) != MODE_COMPLEX_INT | |
9201 | && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT | |
9202 | && modifier != EXPAND_CONST_ADDRESS | |
9203 | && modifier != EXPAND_INITIALIZER) | |
a420d927 | 9204 | /* If the field is volatile, we always want an aligned |
9205 | access. */ | |
9206 | || (volatilep && flag_strict_volatile_bitfields > 0) | |
dff12ad7 | 9207 | /* If the field isn't aligned enough to fetch as a memref, |
9208 | fetch it as a bit field. */ | |
9209 | || (mode1 != BLKmode | |
9210 | && (((TYPE_ALIGN (TREE_TYPE (tem)) < GET_MODE_ALIGNMENT (mode) | |
9211 | || (bitpos % GET_MODE_ALIGNMENT (mode) != 0) | |
9212 | || (MEM_P (op0) | |
9213 | && (MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode1) | |
9214 | || (bitpos % GET_MODE_ALIGNMENT (mode1) != 0)))) | |
9215 | && ((modifier == EXPAND_CONST_ADDRESS | |
9216 | || modifier == EXPAND_INITIALIZER) | |
9217 | ? STRICT_ALIGNMENT | |
9218 | : SLOW_UNALIGNED_ACCESS (mode1, MEM_ALIGN (op0)))) | |
9219 | || (bitpos % BITS_PER_UNIT != 0))) | |
9220 | /* If the type and the field are a constant size and the | |
9221 | size of the type isn't the same size as the bitfield, | |
9222 | we must use bitfield operations. */ | |
9223 | || (bitsize >= 0 | |
9224 | && TYPE_SIZE (TREE_TYPE (exp)) | |
9225 | && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST | |
9226 | && 0 != compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)), | |
9227 | bitsize))) | |
9228 | { | |
9229 | enum machine_mode ext_mode = mode; | |
9230 | ||
9231 | if (ext_mode == BLKmode | |
9232 | && ! (target != 0 && MEM_P (op0) | |
9233 | && MEM_P (target) | |
9234 | && bitpos % BITS_PER_UNIT == 0)) | |
9235 | ext_mode = mode_for_size (bitsize, MODE_INT, 1); | |
9236 | ||
9237 | if (ext_mode == BLKmode) | |
9238 | { | |
9239 | if (target == 0) | |
9240 | target = assign_temp (type, 0, 1, 1); | |
9241 | ||
9242 | if (bitsize == 0) | |
9243 | return target; | |
9244 | ||
9245 | /* In this case, BITPOS must start at a byte boundary and | |
9246 | TARGET, if specified, must be a MEM. */ | |
9247 | gcc_assert (MEM_P (op0) | |
9248 | && (!target || MEM_P (target)) | |
9249 | && !(bitpos % BITS_PER_UNIT)); | |
9250 | ||
9251 | emit_block_move (target, | |
9252 | adjust_address (op0, VOIDmode, | |
9253 | bitpos / BITS_PER_UNIT), | |
9254 | GEN_INT ((bitsize + BITS_PER_UNIT - 1) | |
9255 | / BITS_PER_UNIT), | |
9256 | (modifier == EXPAND_STACK_PARM | |
9257 | ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL)); | |
9258 | ||
9259 | return target; | |
9260 | } | |
9261 | ||
9262 | op0 = validize_mem (op0); | |
9263 | ||
9264 | if (MEM_P (op0) && REG_P (XEXP (op0, 0))) | |
9265 | mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0)); | |
9266 | ||
8eef3a45 | 9267 | op0 = extract_bit_field (op0, bitsize, bitpos, unsignedp, packedp, |
dff12ad7 | 9268 | (modifier == EXPAND_STACK_PARM |
9269 | ? NULL_RTX : target), | |
9270 | ext_mode, ext_mode); | |
9271 | ||
9272 | /* If the result is a record type and BITSIZE is narrower than | |
9273 | the mode of OP0, an integral mode, and this is a big endian | |
9274 | machine, we must put the field into the high-order bits. */ | |
9275 | if (TREE_CODE (type) == RECORD_TYPE && BYTES_BIG_ENDIAN | |
9276 | && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT | |
9277 | && bitsize < (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (op0))) | |
9278 | op0 = expand_shift (LSHIFT_EXPR, GET_MODE (op0), op0, | |
9279 | size_int (GET_MODE_BITSIZE (GET_MODE (op0)) | |
9280 | - bitsize), | |
9281 | op0, 1); | |
9282 | ||
9283 | /* If the result type is BLKmode, store the data into a temporary | |
9284 | of the appropriate type, but with the mode corresponding to the | |
9285 | mode for the data we have (op0's mode). It's tempting to make | |
9286 | this a constant type, since we know it's only being stored once, | |
9287 | but that can cause problems if we are taking the address of this | |
9288 | COMPONENT_REF because the MEM of any reference via that address | |
9289 | will have flags corresponding to the type, which will not | |
9290 | necessarily be constant. */ | |
9291 | if (mode == BLKmode) | |
9292 | { | |
9293 | HOST_WIDE_INT size = GET_MODE_BITSIZE (ext_mode); | |
9294 | rtx new_rtx; | |
9295 | ||
9296 | /* If the reference doesn't use the alias set of its type, | |
9297 | we cannot create the temporary using that type. */ | |
9298 | if (component_uses_parent_alias_set (exp)) | |
9299 | { | |
9300 | new_rtx = assign_stack_local (ext_mode, size, 0); | |
9301 | set_mem_alias_set (new_rtx, get_alias_set (exp)); | |
9302 | } | |
9303 | else | |
9304 | new_rtx = assign_stack_temp_for_type (ext_mode, size, 0, type); | |
10f307d9 | 9305 | |
dff12ad7 | 9306 | emit_move_insn (new_rtx, op0); |
9307 | op0 = copy_rtx (new_rtx); | |
9308 | PUT_MODE (op0, BLKmode); | |
9309 | set_mem_attributes (op0, exp, 1); | |
9310 | } | |
5db186f1 | 9311 | |
dff12ad7 | 9312 | return op0; |
9313 | } | |
10f307d9 | 9314 | |
dff12ad7 | 9315 | /* If the result is BLKmode, use that to access the object |
9316 | now as well. */ | |
9317 | if (mode == BLKmode) | |
9318 | mode1 = BLKmode; | |
10f307d9 | 9319 | |
dff12ad7 | 9320 | /* Get a reference to just this component. */ |
9321 | if (modifier == EXPAND_CONST_ADDRESS | |
9322 | || modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER) | |
9323 | op0 = adjust_address_nv (op0, mode1, bitpos / BITS_PER_UNIT); | |
9324 | else | |
9325 | op0 = adjust_address (op0, mode1, bitpos / BITS_PER_UNIT); | |
10f307d9 | 9326 | |
dff12ad7 | 9327 | if (op0 == orig_op0) |
9328 | op0 = copy_rtx (op0); | |
10f307d9 | 9329 | |
dff12ad7 | 9330 | set_mem_attributes (op0, exp, 0); |
9331 | if (REG_P (XEXP (op0, 0))) | |
9332 | mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0)); | |
fa56dc1d | 9333 | |
dff12ad7 | 9334 | MEM_VOLATILE_P (op0) |= volatilep; |
9335 | if (mode == mode1 || mode1 == BLKmode || mode1 == tmode | |
9336 | || modifier == EXPAND_CONST_ADDRESS | |
9337 | || modifier == EXPAND_INITIALIZER) | |
9338 | return op0; | |
9339 | else if (target == 0) | |
9340 | target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode); | |
446a42ee | 9341 | |
dff12ad7 | 9342 | convert_move (target, op0, unsignedp); |
9343 | return target; | |
9344 | } | |
a54ebf2e | 9345 | |
dff12ad7 | 9346 | case OBJ_TYPE_REF: |
9347 | return expand_expr (OBJ_TYPE_REF_EXPR (exp), target, tmode, modifier); | |
93d9d66f | 9348 | |
dff12ad7 | 9349 | case CALL_EXPR: |
9350 | /* All valid uses of __builtin_va_arg_pack () are removed during | |
9351 | inlining. */ | |
9352 | if (CALL_EXPR_VA_ARG_PACK (exp)) | |
9353 | error ("%Kinvalid use of %<__builtin_va_arg_pack ()%>", exp); | |
b533d30b | 9354 | { |
dff12ad7 | 9355 | tree fndecl = get_callee_fndecl (exp), attr; |
ca436b82 | 9356 | |
dff12ad7 | 9357 | if (fndecl |
9358 | && (attr = lookup_attribute ("error", | |
9359 | DECL_ATTRIBUTES (fndecl))) != NULL) | |
9360 | error ("%Kcall to %qs declared with attribute error: %s", | |
9361 | exp, identifier_to_locale (lang_hooks.decl_printable_name (fndecl, 1)), | |
9362 | TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr)))); | |
9363 | if (fndecl | |
9364 | && (attr = lookup_attribute ("warning", | |
9365 | DECL_ATTRIBUTES (fndecl))) != NULL) | |
9366 | warning_at (tree_nonartificial_location (exp), | |
9367 | 0, "%Kcall to %qs declared with attribute warning: %s", | |
9368 | exp, identifier_to_locale (lang_hooks.decl_printable_name (fndecl, 1)), | |
9369 | TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr)))); | |
ca436b82 | 9370 | |
dff12ad7 | 9371 | /* Check for a built-in function. */ |
9372 | if (fndecl && DECL_BUILT_IN (fndecl)) | |
b533d30b | 9373 | { |
dff12ad7 | 9374 | gcc_assert (DECL_BUILT_IN_CLASS (fndecl) != BUILT_IN_FRONTEND); |
9375 | return expand_builtin (exp, target, subtarget, tmode, ignore); | |
b533d30b | 9376 | } |
dff12ad7 | 9377 | } |
9378 | return expand_call (exp, target, ignore); | |
ca436b82 | 9379 | |
dff12ad7 | 9380 | case VIEW_CONVERT_EXPR: |
9381 | op0 = NULL_RTX; | |
ca436b82 | 9382 | |
dff12ad7 | 9383 | /* If we are converting to BLKmode, try to avoid an intermediate |
9384 | temporary by fetching an inner memory reference. */ | |
9385 | if (mode == BLKmode | |
9386 | && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST | |
9387 | && TYPE_MODE (TREE_TYPE (treeop0)) != BLKmode | |
9388 | && handled_component_p (treeop0)) | |
9389 | { | |
9390 | enum machine_mode mode1; | |
9391 | HOST_WIDE_INT bitsize, bitpos; | |
9392 | tree offset; | |
9393 | int unsignedp; | |
9394 | int volatilep = 0; | |
9395 | tree tem | |
9396 | = get_inner_reference (treeop0, &bitsize, &bitpos, | |
9397 | &offset, &mode1, &unsignedp, &volatilep, | |
9398 | true); | |
9399 | rtx orig_op0; | |
ca436b82 | 9400 | |
dff12ad7 | 9401 | /* ??? We should work harder and deal with non-zero offsets. */ |
9402 | if (!offset | |
9403 | && (bitpos % BITS_PER_UNIT) == 0 | |
9404 | && bitsize >= 0 | |
9405 | && compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)), bitsize) == 0) | |
9406 | { | |
9407 | /* See the normal_inner_ref case for the rationale. */ | |
9408 | orig_op0 | |
9409 | = expand_expr (tem, | |
9410 | (TREE_CODE (TREE_TYPE (tem)) == UNION_TYPE | |
9411 | && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem))) | |
9412 | != INTEGER_CST) | |
9413 | && modifier != EXPAND_STACK_PARM | |
9414 | ? target : NULL_RTX), | |
9415 | VOIDmode, | |
9416 | (modifier == EXPAND_INITIALIZER | |
9417 | || modifier == EXPAND_CONST_ADDRESS | |
9418 | || modifier == EXPAND_STACK_PARM) | |
9419 | ? modifier : EXPAND_NORMAL); | |
ca436b82 | 9420 | |
dff12ad7 | 9421 | if (MEM_P (orig_op0)) |
b533d30b | 9422 | { |
dff12ad7 | 9423 | op0 = orig_op0; |
b533d30b | 9424 | |
dff12ad7 | 9425 | /* Get a reference to just this component. */ |
9426 | if (modifier == EXPAND_CONST_ADDRESS | |
9427 | || modifier == EXPAND_SUM | |
9428 | || modifier == EXPAND_INITIALIZER) | |
9429 | op0 = adjust_address_nv (op0, mode, bitpos / BITS_PER_UNIT); | |
9430 | else | |
9431 | op0 = adjust_address (op0, mode, bitpos / BITS_PER_UNIT); | |
d2ae1b1e | 9432 | |
dff12ad7 | 9433 | if (op0 == orig_op0) |
9434 | op0 = copy_rtx (op0); | |
9435 | ||
9436 | set_mem_attributes (op0, treeop0, 0); | |
9437 | if (REG_P (XEXP (op0, 0))) | |
9438 | mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0)); | |
9439 | ||
9440 | MEM_VOLATILE_P (op0) |= volatilep; | |
9441 | } | |
9442 | } | |
b533d30b | 9443 | } |
10f307d9 | 9444 | |
dff12ad7 | 9445 | if (!op0) |
9446 | op0 = expand_expr (treeop0, | |
9447 | NULL_RTX, VOIDmode, modifier); | |
9448 | ||
9449 | /* If the input and output modes are both the same, we are done. */ | |
9450 | if (mode == GET_MODE (op0)) | |
9451 | ; | |
9452 | /* If neither mode is BLKmode, and both modes are the same size | |
9453 | then we can use gen_lowpart. */ | |
9454 | else if (mode != BLKmode && GET_MODE (op0) != BLKmode | |
9455 | && GET_MODE_SIZE (mode) == GET_MODE_SIZE (GET_MODE (op0)) | |
9456 | && !COMPLEX_MODE_P (GET_MODE (op0))) | |
9457 | { | |
9458 | if (GET_CODE (op0) == SUBREG) | |
9459 | op0 = force_reg (GET_MODE (op0), op0); | |
062fb763 | 9460 | temp = gen_lowpart_common (mode, op0); |
9461 | if (temp) | |
9462 | op0 = temp; | |
9463 | else | |
9464 | { | |
9465 | if (!REG_P (op0) && !MEM_P (op0)) | |
9466 | op0 = force_reg (GET_MODE (op0), op0); | |
9467 | op0 = gen_lowpart (mode, op0); | |
9468 | } | |
dff12ad7 | 9469 | } |
f235634e | 9470 | /* If both types are integral, convert from one mode to the other. */ |
9471 | else if (INTEGRAL_TYPE_P (type) && INTEGRAL_TYPE_P (TREE_TYPE (treeop0))) | |
48e1416a | 9472 | op0 = convert_modes (mode, GET_MODE (op0), op0, |
dff12ad7 | 9473 | TYPE_UNSIGNED (TREE_TYPE (treeop0))); |
9474 | /* As a last resort, spill op0 to memory, and reload it in a | |
9475 | different mode. */ | |
9476 | else if (!MEM_P (op0)) | |
9477 | { | |
9478 | /* If the operand is not a MEM, force it into memory. Since we | |
9479 | are going to be changing the mode of the MEM, don't call | |
9480 | force_const_mem for constants because we don't allow pool | |
9481 | constants to change mode. */ | |
9482 | tree inner_type = TREE_TYPE (treeop0); | |
9483 | ||
9484 | gcc_assert (!TREE_ADDRESSABLE (exp)); | |
10f307d9 | 9485 | |
dff12ad7 | 9486 | if (target == 0 || GET_MODE (target) != TYPE_MODE (inner_type)) |
9487 | target | |
9488 | = assign_stack_temp_for_type | |
9489 | (TYPE_MODE (inner_type), | |
9490 | GET_MODE_SIZE (TYPE_MODE (inner_type)), 0, inner_type); | |
d2ae1b1e | 9491 | |
dff12ad7 | 9492 | emit_move_insn (target, op0); |
9493 | op0 = target; | |
9494 | } | |
d2ae1b1e | 9495 | |
dff12ad7 | 9496 | /* At this point, OP0 is in the correct mode. If the output type is |
9497 | such that the operand is known to be aligned, indicate that it is. | |
9498 | Otherwise, we need only be concerned about alignment for non-BLKmode | |
9499 | results. */ | |
9500 | if (MEM_P (op0)) | |
9501 | { | |
9502 | op0 = copy_rtx (op0); | |
10f307d9 | 9503 | |
dff12ad7 | 9504 | if (TYPE_ALIGN_OK (type)) |
9505 | set_mem_align (op0, MAX (MEM_ALIGN (op0), TYPE_ALIGN (type))); | |
9506 | else if (STRICT_ALIGNMENT | |
9507 | && mode != BLKmode | |
9508 | && MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode)) | |
9509 | { | |
9510 | tree inner_type = TREE_TYPE (treeop0); | |
9511 | HOST_WIDE_INT temp_size | |
9512 | = MAX (int_size_in_bytes (inner_type), | |
9513 | (HOST_WIDE_INT) GET_MODE_SIZE (mode)); | |
9514 | rtx new_rtx | |
9515 | = assign_stack_temp_for_type (mode, temp_size, 0, type); | |
9516 | rtx new_with_op0_mode | |
9517 | = adjust_address (new_rtx, GET_MODE (op0), 0); | |
10f307d9 | 9518 | |
dff12ad7 | 9519 | gcc_assert (!TREE_ADDRESSABLE (exp)); |
10f307d9 | 9520 | |
dff12ad7 | 9521 | if (GET_MODE (op0) == BLKmode) |
9522 | emit_block_move (new_with_op0_mode, op0, | |
9523 | GEN_INT (GET_MODE_SIZE (mode)), | |
9524 | (modifier == EXPAND_STACK_PARM | |
9525 | ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL)); | |
9526 | else | |
9527 | emit_move_insn (new_with_op0_mode, op0); | |
6295ca72 | 9528 | |
dff12ad7 | 9529 | op0 = new_rtx; |
9530 | } | |
68a556d6 | 9531 | |
dff12ad7 | 9532 | op0 = adjust_address (op0, mode, 0); |
9533 | } | |
10f307d9 | 9534 | |
dff12ad7 | 9535 | return op0; |
7dbdd983 | 9536 | |
9537 | /* Use a compare and a jump for BLKmode comparisons, or for function | |
9538 | type comparisons is HAVE_canonicalize_funcptr_for_compare. */ | |
d2ae1b1e | 9539 | |
e715d565 | 9540 | /* Although TRUTH_{AND,OR}IF_EXPR aren't present in GIMPLE, they |
9541 | are occassionally created by folding during expansion. */ | |
9542 | case TRUTH_ANDIF_EXPR: | |
9543 | case TRUTH_ORIF_EXPR: | |
47954a5b | 9544 | if (! ignore |
9545 | && (target == 0 | |
9546 | || modifier == EXPAND_STACK_PARM | |
588e1cc3 | 9547 | || ! safe_from_p (target, treeop0, 1) |
9548 | || ! safe_from_p (target, treeop1, 1) | |
47954a5b | 9549 | /* Make sure we don't have a hard reg (such as function's return |
9550 | value) live across basic blocks, if not optimizing. */ | |
9551 | || (!optimize && REG_P (target) | |
9552 | && REGNO (target) < FIRST_PSEUDO_REGISTER))) | |
9553 | target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode); | |
9554 | ||
9555 | if (target) | |
9556 | emit_move_insn (target, const0_rtx); | |
9557 | ||
9558 | op1 = gen_label_rtx (); | |
79ab74cc | 9559 | jumpifnot_1 (code, treeop0, treeop1, op1, -1); |
47954a5b | 9560 | |
9561 | if (target) | |
9562 | emit_move_insn (target, const1_rtx); | |
9563 | ||
9564 | emit_label (op1); | |
9565 | return ignore ? const0_rtx : target; | |
9566 | ||
4ee9c684 | 9567 | case STATEMENT_LIST: |
9568 | { | |
9569 | tree_stmt_iterator iter; | |
9570 | ||
611234b4 | 9571 | gcc_assert (ignore); |
4ee9c684 | 9572 | |
9573 | for (iter = tsi_start (exp); !tsi_end_p (iter); tsi_next (&iter)) | |
9574 | expand_expr (tsi_stmt (iter), const0_rtx, VOIDmode, modifier); | |
9575 | } | |
9576 | return const0_rtx; | |
9577 | ||
10f307d9 | 9578 | case COND_EXPR: |
b36308e6 | 9579 | /* A COND_EXPR with its type being VOID_TYPE represents a |
9580 | conditional jump and is handled in | |
9581 | expand_gimple_cond_expr. */ | |
588e1cc3 | 9582 | gcc_assert (!VOID_TYPE_P (type)); |
9e7454d0 | 9583 | |
e3ee6a3e | 9584 | /* Note that COND_EXPRs whose type is a structure or union |
9585 | are required to be constructed to contain assignments of | |
9586 | a temporary variable, so that we can evaluate them here | |
9587 | for side effect only. If type is void, we must do likewise. */ | |
9588 | ||
611234b4 | 9589 | gcc_assert (!TREE_ADDRESSABLE (type) |
9590 | && !ignore | |
588e1cc3 | 9591 | && TREE_TYPE (treeop1) != void_type_node |
9592 | && TREE_TYPE (treeop2) != void_type_node); | |
9e7454d0 | 9593 | |
e3ee6a3e | 9594 | /* If we are not to produce a result, we have no target. Otherwise, |
9595 | if a target was specified use it; it will not be used as an | |
9596 | intermediate target unless it is safe. If no target, use a | |
9597 | temporary. */ | |
9e7454d0 | 9598 | |
e3ee6a3e | 9599 | if (modifier != EXPAND_STACK_PARM |
9600 | && original_target | |
588e1cc3 | 9601 | && safe_from_p (original_target, treeop0, 1) |
e3ee6a3e | 9602 | && GET_MODE (original_target) == mode |
e500743d | 9603 | #ifdef HAVE_conditional_move |
e3ee6a3e | 9604 | && (! can_conditionally_move_p (mode) |
9605 | || REG_P (original_target)) | |
e500743d | 9606 | #endif |
e3ee6a3e | 9607 | && !MEM_P (original_target)) |
9608 | temp = original_target; | |
9609 | else | |
9610 | temp = assign_temp (type, 0, 0, 1); | |
9e7454d0 | 9611 | |
e3ee6a3e | 9612 | do_pending_stack_adjust (); |
9613 | NO_DEFER_POP; | |
9614 | op0 = gen_label_rtx (); | |
9615 | op1 = gen_label_rtx (); | |
79ab74cc | 9616 | jumpifnot (treeop0, op0, -1); |
588e1cc3 | 9617 | store_expr (treeop1, temp, |
5b5037b3 | 9618 | modifier == EXPAND_STACK_PARM, |
9619 | false); | |
9e7454d0 | 9620 | |
e3ee6a3e | 9621 | emit_jump_insn (gen_jump (op1)); |
9622 | emit_barrier (); | |
9623 | emit_label (op0); | |
588e1cc3 | 9624 | store_expr (treeop2, temp, |
5b5037b3 | 9625 | modifier == EXPAND_STACK_PARM, |
9626 | false); | |
9e7454d0 | 9627 | |
e3ee6a3e | 9628 | emit_label (op1); |
9629 | OK_DEFER_POP; | |
9630 | return temp; | |
9e7454d0 | 9631 | |
6b7acc28 | 9632 | case VEC_COND_EXPR: |
2c02962c | 9633 | target = expand_vec_cond_expr (type, treeop0, treeop1, treeop2, target); |
9634 | return target; | |
6b7acc28 | 9635 | |
41076ef6 | 9636 | case MODIFY_EXPR: |
9637 | { | |
588e1cc3 | 9638 | tree lhs = treeop0; |
9639 | tree rhs = treeop1; | |
987329ad | 9640 | gcc_assert (ignore); |
9641 | ||
10f307d9 | 9642 | /* Check for |= or &= of a bitfield of size one into another bitfield |
9643 | of size 1. In this case, (unless we need the result of the | |
9644 | assignment) we can do this more efficiently with a | |
9645 | test followed by an assignment, if necessary. | |
9646 | ||
9647 | ??? At this point, we can't get a BIT_FIELD_REF here. But if | |
9648 | things change so we do, this code should be enhanced to | |
9649 | support it. */ | |
987329ad | 9650 | if (TREE_CODE (lhs) == COMPONENT_REF |
10f307d9 | 9651 | && (TREE_CODE (rhs) == BIT_IOR_EXPR |
9652 | || TREE_CODE (rhs) == BIT_AND_EXPR) | |
9653 | && TREE_OPERAND (rhs, 0) == lhs | |
9654 | && TREE_CODE (TREE_OPERAND (rhs, 1)) == COMPONENT_REF | |
a0c2c45b | 9655 | && integer_onep (DECL_SIZE (TREE_OPERAND (lhs, 1))) |
9656 | && integer_onep (DECL_SIZE (TREE_OPERAND (TREE_OPERAND (rhs, 1), 1)))) | |
10f307d9 | 9657 | { |
9658 | rtx label = gen_label_rtx (); | |
e3b560a6 | 9659 | int value = TREE_CODE (rhs) == BIT_IOR_EXPR; |
10f307d9 | 9660 | do_jump (TREE_OPERAND (rhs, 1), |
e3b560a6 | 9661 | value ? label : 0, |
79ab74cc | 9662 | value ? 0 : label, -1); |
5b5037b3 | 9663 | expand_assignment (lhs, build_int_cst (TREE_TYPE (rhs), value), |
9664 | MOVE_NONTEMPORAL (exp)); | |
01ab6370 | 9665 | do_pending_stack_adjust (); |
10f307d9 | 9666 | emit_label (label); |
9667 | return const0_rtx; | |
9668 | } | |
9669 | ||
5b5037b3 | 9670 | expand_assignment (lhs, rhs, MOVE_NONTEMPORAL (exp)); |
993e4bab | 9671 | return const0_rtx; |
10f307d9 | 9672 | } |
9673 | ||
10f307d9 | 9674 | case ADDR_EXPR: |
b51e4016 | 9675 | return expand_expr_addr_expr (exp, target, tmode, modifier); |
10f307d9 | 9676 | |
b63679d2 | 9677 | case REALPART_EXPR: |
588e1cc3 | 9678 | op0 = expand_normal (treeop0); |
de17a47b | 9679 | return read_complex_part (op0, false); |
fa56dc1d | 9680 | |
b63679d2 | 9681 | case IMAGPART_EXPR: |
588e1cc3 | 9682 | op0 = expand_normal (treeop0); |
de17a47b | 9683 | return read_complex_part (op0, true); |
b63679d2 | 9684 | |
16c9337c | 9685 | case RETURN_EXPR: |
9686 | case LABEL_EXPR: | |
9687 | case GOTO_EXPR: | |
9688 | case SWITCH_EXPR: | |
9689 | case ASM_EXPR: | |
16c9337c | 9690 | /* Expanded in cfgexpand.c. */ |
9691 | gcc_unreachable (); | |
4ee9c684 | 9692 | |
694ec519 | 9693 | case TRY_CATCH_EXPR: |
4ee9c684 | 9694 | case CATCH_EXPR: |
4ee9c684 | 9695 | case EH_FILTER_EXPR: |
f0c211a3 | 9696 | case TRY_FINALLY_EXPR: |
6388f9f7 | 9697 | /* Lowered by tree-eh.c. */ |
611234b4 | 9698 | gcc_unreachable (); |
f0c211a3 | 9699 | |
6388f9f7 | 9700 | case WITH_CLEANUP_EXPR: |
9701 | case CLEANUP_POINT_EXPR: | |
9702 | case TARGET_EXPR: | |
873f1e89 | 9703 | case CASE_LABEL_EXPR: |
2799a2b7 | 9704 | case VA_ARG_EXPR: |
491e04ef | 9705 | case BIND_EXPR: |
e3ee6a3e | 9706 | case INIT_EXPR: |
9707 | case CONJ_EXPR: | |
9708 | case COMPOUND_EXPR: | |
9709 | case PREINCREMENT_EXPR: | |
9710 | case PREDECREMENT_EXPR: | |
9711 | case POSTINCREMENT_EXPR: | |
9712 | case POSTDECREMENT_EXPR: | |
9713 | case LOOP_EXPR: | |
9714 | case EXIT_EXPR: | |
6388f9f7 | 9715 | /* Lowered by gimplify.c. */ |
611234b4 | 9716 | gcc_unreachable (); |
f0c211a3 | 9717 | |
6bfa2cc1 | 9718 | case FDESC_EXPR: |
9719 | /* Function descriptors are not valid except for as | |
9720 | initialization constants, and should not be expanded. */ | |
611234b4 | 9721 | gcc_unreachable (); |
6bfa2cc1 | 9722 | |
80f06481 | 9723 | case WITH_SIZE_EXPR: |
9724 | /* WITH_SIZE_EXPR expands to its first argument. The caller should | |
9725 | have pulled out the size to use in whatever context it needed. */ | |
588e1cc3 | 9726 | return expand_expr_real (treeop0, original_target, tmode, |
80f06481 | 9727 | modifier, alt_rtl); |
9728 | ||
862f468c | 9729 | case COMPOUND_LITERAL_EXPR: |
9730 | { | |
9731 | /* Initialize the anonymous variable declared in the compound | |
9732 | literal, then return the variable. */ | |
9733 | tree decl = COMPOUND_LITERAL_EXPR_DECL (exp); | |
9734 | ||
9735 | /* Create RTL for this variable. */ | |
9736 | if (!DECL_RTL_SET_P (decl)) | |
9737 | { | |
9738 | if (DECL_HARD_REGISTER (decl)) | |
9739 | /* The user specified an assembler name for this variable. | |
9740 | Set that up now. */ | |
9741 | rest_of_decl_compilation (decl, 0, 0); | |
9742 | else | |
9743 | expand_decl (decl); | |
9744 | } | |
9745 | ||
9746 | return expand_expr_real (decl, original_target, tmode, | |
9747 | modifier, alt_rtl); | |
9748 | } | |
9749 | ||
10f307d9 | 9750 | default: |
dff12ad7 | 9751 | return expand_expr_real_2 (&ops, target, tmode, modifier); |
10f307d9 | 9752 | } |
4f7f7efd | 9753 | } |
4f7f7efd | 9754 | \f |
9755 | /* Subroutine of above: reduce EXP to the precision of TYPE (in the | |
9756 | signedness of TYPE), possibly returning the result in TARGET. */ | |
9757 | static rtx | |
9758 | reduce_to_bit_field_precision (rtx exp, rtx target, tree type) | |
9759 | { | |
9760 | HOST_WIDE_INT prec = TYPE_PRECISION (type); | |
9761 | if (target && GET_MODE (target) != GET_MODE (exp)) | |
9762 | target = 0; | |
32e79ae6 | 9763 | /* For constant values, reduce using build_int_cst_type. */ |
971ba038 | 9764 | if (CONST_INT_P (exp)) |
32e79ae6 | 9765 | { |
9766 | HOST_WIDE_INT value = INTVAL (exp); | |
9767 | tree t = build_int_cst_type (type, value); | |
9768 | return expand_expr (t, target, VOIDmode, EXPAND_NORMAL); | |
9769 | } | |
9770 | else if (TYPE_UNSIGNED (type)) | |
4f7f7efd | 9771 | { |
3e052aec | 9772 | rtx mask = immed_double_int_const (double_int_mask (prec), |
9773 | GET_MODE (exp)); | |
4f7f7efd | 9774 | return expand_and (GET_MODE (exp), exp, mask, target); |
9775 | } | |
9776 | else | |
9777 | { | |
7c446c95 | 9778 | tree count = build_int_cst (NULL_TREE, |
7016c612 | 9779 | GET_MODE_BITSIZE (GET_MODE (exp)) - prec); |
4f7f7efd | 9780 | exp = expand_shift (LSHIFT_EXPR, GET_MODE (exp), exp, count, target, 0); |
9781 | return expand_shift (RSHIFT_EXPR, GET_MODE (exp), exp, count, target, 0); | |
9782 | } | |
10f307d9 | 9783 | } |
b54842d8 | 9784 | \f |
67c68e45 | 9785 | /* Subroutine of above: returns 1 if OFFSET corresponds to an offset that |
9786 | when applied to the address of EXP produces an address known to be | |
9787 | aligned more than BIGGEST_ALIGNMENT. */ | |
9788 | ||
9789 | static int | |
1f1872fd | 9790 | is_aligning_offset (const_tree offset, const_tree exp) |
67c68e45 | 9791 | { |
55f9d7dc | 9792 | /* Strip off any conversions. */ |
72dd6141 | 9793 | while (CONVERT_EXPR_P (offset)) |
67c68e45 | 9794 | offset = TREE_OPERAND (offset, 0); |
9795 | ||
9796 | /* We must now have a BIT_AND_EXPR with a constant that is one less than | |
9797 | power of 2 and which is larger than BIGGEST_ALIGNMENT. */ | |
9798 | if (TREE_CODE (offset) != BIT_AND_EXPR | |
9799 | || !host_integerp (TREE_OPERAND (offset, 1), 1) | |
491e04ef | 9800 | || compare_tree_int (TREE_OPERAND (offset, 1), |
6be0ba7c | 9801 | BIGGEST_ALIGNMENT / BITS_PER_UNIT) <= 0 |
67c68e45 | 9802 | || !exact_log2 (tree_low_cst (TREE_OPERAND (offset, 1), 1) + 1) < 0) |
9803 | return 0; | |
9804 | ||
9805 | /* Look at the first operand of BIT_AND_EXPR and strip any conversion. | |
9806 | It must be NEGATE_EXPR. Then strip any more conversions. */ | |
9807 | offset = TREE_OPERAND (offset, 0); | |
72dd6141 | 9808 | while (CONVERT_EXPR_P (offset)) |
67c68e45 | 9809 | offset = TREE_OPERAND (offset, 0); |
9810 | ||
9811 | if (TREE_CODE (offset) != NEGATE_EXPR) | |
9812 | return 0; | |
9813 | ||
9814 | offset = TREE_OPERAND (offset, 0); | |
72dd6141 | 9815 | while (CONVERT_EXPR_P (offset)) |
67c68e45 | 9816 | offset = TREE_OPERAND (offset, 0); |
9817 | ||
55f9d7dc | 9818 | /* This must now be the address of EXP. */ |
9819 | return TREE_CODE (offset) == ADDR_EXPR && TREE_OPERAND (offset, 0) == exp; | |
67c68e45 | 9820 | } |
9821 | \f | |
dafdd1c8 | 9822 | /* Return the tree node if an ARG corresponds to a string constant or zero |
6ef828f9 | 9823 | if it doesn't. If we return nonzero, set *PTR_OFFSET to the offset |
902de8ed | 9824 | in bytes within the string that ARG is accessing. The type of the |
9825 | offset will be `sizetype'. */ | |
b54842d8 | 9826 | |
53800dbe | 9827 | tree |
35cb5232 | 9828 | string_constant (tree arg, tree *ptr_offset) |
b54842d8 | 9829 | { |
de556b32 | 9830 | tree array, offset, lower_bound; |
b54842d8 | 9831 | STRIP_NOPS (arg); |
9832 | ||
d2165e90 | 9833 | if (TREE_CODE (arg) == ADDR_EXPR) |
b54842d8 | 9834 | { |
d2165e90 | 9835 | if (TREE_CODE (TREE_OPERAND (arg, 0)) == STRING_CST) |
9836 | { | |
9837 | *ptr_offset = size_zero_node; | |
9838 | return TREE_OPERAND (arg, 0); | |
9839 | } | |
9840 | else if (TREE_CODE (TREE_OPERAND (arg, 0)) == VAR_DECL) | |
9841 | { | |
9842 | array = TREE_OPERAND (arg, 0); | |
9843 | offset = size_zero_node; | |
9844 | } | |
9845 | else if (TREE_CODE (TREE_OPERAND (arg, 0)) == ARRAY_REF) | |
9846 | { | |
9847 | array = TREE_OPERAND (TREE_OPERAND (arg, 0), 0); | |
9848 | offset = TREE_OPERAND (TREE_OPERAND (arg, 0), 1); | |
9849 | if (TREE_CODE (array) != STRING_CST | |
9850 | && TREE_CODE (array) != VAR_DECL) | |
9851 | return 0; | |
de556b32 | 9852 | |
f2b32076 | 9853 | /* Check if the array has a nonzero lower bound. */ |
de556b32 | 9854 | lower_bound = array_ref_low_bound (TREE_OPERAND (arg, 0)); |
9855 | if (!integer_zerop (lower_bound)) | |
9856 | { | |
9857 | /* If the offset and base aren't both constants, return 0. */ | |
9858 | if (TREE_CODE (lower_bound) != INTEGER_CST) | |
9859 | return 0; | |
9860 | if (TREE_CODE (offset) != INTEGER_CST) | |
9861 | return 0; | |
9862 | /* Adjust offset by the lower bound. */ | |
1f8b6002 | 9863 | offset = size_diffop (fold_convert (sizetype, offset), |
de556b32 | 9864 | fold_convert (sizetype, lower_bound)); |
9865 | } | |
d2165e90 | 9866 | } |
9867 | else | |
9868 | return 0; | |
4ee9c684 | 9869 | } |
0de36bdb | 9870 | else if (TREE_CODE (arg) == PLUS_EXPR || TREE_CODE (arg) == POINTER_PLUS_EXPR) |
b54842d8 | 9871 | { |
9872 | tree arg0 = TREE_OPERAND (arg, 0); | |
9873 | tree arg1 = TREE_OPERAND (arg, 1); | |
9874 | ||
9875 | STRIP_NOPS (arg0); | |
9876 | STRIP_NOPS (arg1); | |
9877 | ||
9878 | if (TREE_CODE (arg0) == ADDR_EXPR | |
d2165e90 | 9879 | && (TREE_CODE (TREE_OPERAND (arg0, 0)) == STRING_CST |
9880 | || TREE_CODE (TREE_OPERAND (arg0, 0)) == VAR_DECL)) | |
10f307d9 | 9881 | { |
d2165e90 | 9882 | array = TREE_OPERAND (arg0, 0); |
9883 | offset = arg1; | |
10f307d9 | 9884 | } |
b54842d8 | 9885 | else if (TREE_CODE (arg1) == ADDR_EXPR |
d2165e90 | 9886 | && (TREE_CODE (TREE_OPERAND (arg1, 0)) == STRING_CST |
9887 | || TREE_CODE (TREE_OPERAND (arg1, 0)) == VAR_DECL)) | |
10f307d9 | 9888 | { |
d2165e90 | 9889 | array = TREE_OPERAND (arg1, 0); |
9890 | offset = arg0; | |
10f307d9 | 9891 | } |
d2165e90 | 9892 | else |
9893 | return 0; | |
9894 | } | |
9895 | else | |
9896 | return 0; | |
9897 | ||
9898 | if (TREE_CODE (array) == STRING_CST) | |
9899 | { | |
e3b560a6 | 9900 | *ptr_offset = fold_convert (sizetype, offset); |
d2165e90 | 9901 | return array; |
9902 | } | |
93b79643 | 9903 | else if (TREE_CODE (array) == VAR_DECL |
9904 | || TREE_CODE (array) == CONST_DECL) | |
d2165e90 | 9905 | { |
9906 | int length; | |
9907 | ||
9908 | /* Variables initialized to string literals can be handled too. */ | |
7ae8b539 | 9909 | if (!const_value_known_p (array) |
93b79643 | 9910 | || !DECL_INITIAL (array) |
d2165e90 | 9911 | || TREE_CODE (DECL_INITIAL (array)) != STRING_CST) |
9912 | return 0; | |
9913 | ||
d2165e90 | 9914 | /* Avoid const char foo[4] = "abcde"; */ |
9915 | if (DECL_SIZE_UNIT (array) == NULL_TREE | |
9916 | || TREE_CODE (DECL_SIZE_UNIT (array)) != INTEGER_CST | |
9917 | || (length = TREE_STRING_LENGTH (DECL_INITIAL (array))) <= 0 | |
9918 | || compare_tree_int (DECL_SIZE_UNIT (array), length) < 0) | |
9919 | return 0; | |
9920 | ||
9921 | /* If variable is bigger than the string literal, OFFSET must be constant | |
9922 | and inside of the bounds of the string literal. */ | |
e3b560a6 | 9923 | offset = fold_convert (sizetype, offset); |
d2165e90 | 9924 | if (compare_tree_int (DECL_SIZE_UNIT (array), length) > 0 |
9925 | && (! host_integerp (offset, 1) | |
9926 | || compare_tree_int (offset, length) >= 0)) | |
9927 | return 0; | |
9928 | ||
9929 | *ptr_offset = offset; | |
9930 | return DECL_INITIAL (array); | |
b54842d8 | 9931 | } |
649d8da6 | 9932 | |
b54842d8 | 9933 | return 0; |
9934 | } | |
649d8da6 | 9935 | \f |
2c02962c | 9936 | /* Generate code to calculate OPS, and exploded expression |
9937 | using a store-flag instruction and return an rtx for the result. | |
9938 | OPS reflects a comparison. | |
649d8da6 | 9939 | |
b54842d8 | 9940 | If TARGET is nonzero, store the result there if convenient. |
649d8da6 | 9941 | |
b54842d8 | 9942 | Return zero if there is no suitable set-flag instruction |
9943 | available on this machine. | |
649d8da6 | 9944 | |
b54842d8 | 9945 | Once expand_expr has been called on the arguments of the comparison, |
9946 | we are committed to doing the store flag, since it is not safe to | |
9947 | re-evaluate the expression. We emit the store-flag insn by calling | |
9948 | emit_store_flag, but only expand the arguments if we have a reason | |
9949 | to believe that emit_store_flag will be successful. If we think that | |
9950 | it will, but it isn't, we have to simulate the store-flag with a | |
9951 | set/jump/set sequence. */ | |
649d8da6 | 9952 | |
b54842d8 | 9953 | static rtx |
2c02962c | 9954 | do_store_flag (sepops ops, rtx target, enum machine_mode mode) |
b54842d8 | 9955 | { |
9956 | enum rtx_code code; | |
9957 | tree arg0, arg1, type; | |
9958 | tree tem; | |
9959 | enum machine_mode operand_mode; | |
b54842d8 | 9960 | int unsignedp; |
9961 | rtx op0, op1; | |
b54842d8 | 9962 | rtx subtarget = target; |
2c02962c | 9963 | location_t loc = ops->location; |
649d8da6 | 9964 | |
2c02962c | 9965 | arg0 = ops->op0; |
9966 | arg1 = ops->op1; | |
fc80e4dd | 9967 | |
9968 | /* Don't crash if the comparison was erroneous. */ | |
9969 | if (arg0 == error_mark_node || arg1 == error_mark_node) | |
9970 | return const0_rtx; | |
9971 | ||
b54842d8 | 9972 | type = TREE_TYPE (arg0); |
9973 | operand_mode = TYPE_MODE (type); | |
78a8ed03 | 9974 | unsignedp = TYPE_UNSIGNED (type); |
649d8da6 | 9975 | |
b54842d8 | 9976 | /* We won't bother with BLKmode store-flag operations because it would mean |
9977 | passing a lot of information to emit_store_flag. */ | |
9978 | if (operand_mode == BLKmode) | |
9979 | return 0; | |
649d8da6 | 9980 | |
b54842d8 | 9981 | /* We won't bother with store-flag operations involving function pointers |
9982 | when function pointers must be canonicalized before comparisons. */ | |
9983 | #ifdef HAVE_canonicalize_funcptr_for_compare | |
9984 | if (HAVE_canonicalize_funcptr_for_compare | |
2c02962c | 9985 | && ((TREE_CODE (TREE_TYPE (arg0)) == POINTER_TYPE |
9986 | && (TREE_CODE (TREE_TYPE (TREE_TYPE (arg0))) | |
b54842d8 | 9987 | == FUNCTION_TYPE)) |
2c02962c | 9988 | || (TREE_CODE (TREE_TYPE (arg1)) == POINTER_TYPE |
9989 | && (TREE_CODE (TREE_TYPE (TREE_TYPE (arg1))) | |
b54842d8 | 9990 | == FUNCTION_TYPE)))) |
9991 | return 0; | |
649d8da6 | 9992 | #endif |
9993 | ||
b54842d8 | 9994 | STRIP_NOPS (arg0); |
9995 | STRIP_NOPS (arg1); | |
649d8da6 | 9996 | |
b54842d8 | 9997 | /* Get the rtx comparison code to use. We know that EXP is a comparison |
9998 | operation of some type. Some comparisons against 1 and -1 can be | |
9999 | converted to comparisons with zero. Do so here so that the tests | |
10000 | below will be aware that we have a comparison with zero. These | |
10001 | tests will not catch constants in the first operand, but constants | |
10002 | are rarely passed as the first operand. */ | |
649d8da6 | 10003 | |
2c02962c | 10004 | switch (ops->code) |
b54842d8 | 10005 | { |
10006 | case EQ_EXPR: | |
10007 | code = EQ; | |
10f307d9 | 10008 | break; |
b54842d8 | 10009 | case NE_EXPR: |
10010 | code = NE; | |
10f307d9 | 10011 | break; |
b54842d8 | 10012 | case LT_EXPR: |
10013 | if (integer_onep (arg1)) | |
10014 | arg1 = integer_zero_node, code = unsignedp ? LEU : LE; | |
10015 | else | |
10016 | code = unsignedp ? LTU : LT; | |
649d8da6 | 10017 | break; |
b54842d8 | 10018 | case LE_EXPR: |
10019 | if (! unsignedp && integer_all_onesp (arg1)) | |
10020 | arg1 = integer_zero_node, code = LT; | |
10021 | else | |
10022 | code = unsignedp ? LEU : LE; | |
649d8da6 | 10023 | break; |
b54842d8 | 10024 | case GT_EXPR: |
10025 | if (! unsignedp && integer_all_onesp (arg1)) | |
10026 | arg1 = integer_zero_node, code = GE; | |
10027 | else | |
10028 | code = unsignedp ? GTU : GT; | |
10029 | break; | |
10030 | case GE_EXPR: | |
10031 | if (integer_onep (arg1)) | |
10032 | arg1 = integer_zero_node, code = unsignedp ? GTU : GT; | |
10033 | else | |
10034 | code = unsignedp ? GEU : GE; | |
649d8da6 | 10035 | break; |
a4110d9a | 10036 | |
10037 | case UNORDERED_EXPR: | |
10038 | code = UNORDERED; | |
10039 | break; | |
10040 | case ORDERED_EXPR: | |
10041 | code = ORDERED; | |
10042 | break; | |
10043 | case UNLT_EXPR: | |
10044 | code = UNLT; | |
10045 | break; | |
10046 | case UNLE_EXPR: | |
10047 | code = UNLE; | |
10048 | break; | |
10049 | case UNGT_EXPR: | |
10050 | code = UNGT; | |
10051 | break; | |
10052 | case UNGE_EXPR: | |
10053 | code = UNGE; | |
10054 | break; | |
10055 | case UNEQ_EXPR: | |
10056 | code = UNEQ; | |
10057 | break; | |
318a728f | 10058 | case LTGT_EXPR: |
10059 | code = LTGT; | |
10060 | break; | |
a4110d9a | 10061 | |
649d8da6 | 10062 | default: |
611234b4 | 10063 | gcc_unreachable (); |
10f307d9 | 10064 | } |
10f307d9 | 10065 | |
b54842d8 | 10066 | /* Put a constant second. */ |
68a556d6 | 10067 | if (TREE_CODE (arg0) == REAL_CST || TREE_CODE (arg0) == INTEGER_CST |
10068 | || TREE_CODE (arg0) == FIXED_CST) | |
b54842d8 | 10069 | { |
10070 | tem = arg0; arg0 = arg1; arg1 = tem; | |
10071 | code = swap_condition (code); | |
649d8da6 | 10072 | } |
10f307d9 | 10073 | |
b54842d8 | 10074 | /* If this is an equality or inequality test of a single bit, we can |
10075 | do this by shifting the bit being tested to the low-order bit and | |
10076 | masking the result with the constant 1. If the condition was EQ, | |
10077 | we xor it with 1. This does not require an scc insn and is faster | |
6881f973 | 10078 | than an scc insn even if we have it. |
10079 | ||
10080 | The code to make this transformation was moved into fold_single_bit_test, | |
10081 | so we just call into the folder and expand its result. */ | |
3218a49d | 10082 | |
b54842d8 | 10083 | if ((code == NE || code == EQ) |
10084 | && TREE_CODE (arg0) == BIT_AND_EXPR && integer_zerop (arg1) | |
10085 | && integer_pow2p (TREE_OPERAND (arg0, 1))) | |
76c3b8b7 | 10086 | { |
dc24ddbd | 10087 | tree type = lang_hooks.types.type_for_mode (mode, unsignedp); |
389dd41b | 10088 | return expand_expr (fold_single_bit_test (loc, |
10089 | code == NE ? NE_EXPR : EQ_EXPR, | |
1d5ca076 | 10090 | arg0, arg1, type), |
76c3b8b7 | 10091 | target, VOIDmode, EXPAND_NORMAL); |
10092 | } | |
10f307d9 | 10093 | |
d8e5b213 | 10094 | if (! get_subtarget (target) |
a54ebf2e | 10095 | || GET_MODE (subtarget) != operand_mode) |
b54842d8 | 10096 | subtarget = 0; |
10097 | ||
b9c74b4d | 10098 | expand_operands (arg0, arg1, subtarget, &op0, &op1, EXPAND_NORMAL); |
b54842d8 | 10099 | |
10100 | if (target == 0) | |
10101 | target = gen_reg_rtx (mode); | |
10102 | ||
80e1bfa1 | 10103 | /* Try a cstore if possible. */ |
10104 | return emit_store_flag_force (target, code, op0, op1, | |
10105 | operand_mode, unsignedp, 1); | |
649d8da6 | 10106 | } |
b54842d8 | 10107 | \f |
b54842d8 | 10108 | |
539a3a92 | 10109 | /* Stubs in case we haven't got a casesi insn. */ |
10110 | #ifndef HAVE_casesi | |
10111 | # define HAVE_casesi 0 | |
10112 | # define gen_casesi(a, b, c, d, e) (0) | |
10113 | # define CODE_FOR_casesi CODE_FOR_nothing | |
10114 | #endif | |
10115 | ||
539a3a92 | 10116 | /* Attempt to generate a casesi instruction. Returns 1 if successful, |
10117 | 0 otherwise (i.e. if there is no casesi instruction). */ | |
10118 | int | |
35cb5232 | 10119 | try_casesi (tree index_type, tree index_expr, tree minval, tree range, |
469b75f7 | 10120 | rtx table_label ATTRIBUTE_UNUSED, rtx default_label, |
10121 | rtx fallback_label ATTRIBUTE_UNUSED) | |
539a3a92 | 10122 | { |
10123 | enum machine_mode index_mode = SImode; | |
10124 | int index_bits = GET_MODE_BITSIZE (index_mode); | |
10125 | rtx op1, op2, index; | |
10126 | enum machine_mode op_mode; | |
10127 | ||
10128 | if (! HAVE_casesi) | |
10129 | return 0; | |
10130 | ||
10131 | /* Convert the index to SImode. */ | |
10132 | if (GET_MODE_BITSIZE (TYPE_MODE (index_type)) > GET_MODE_BITSIZE (index_mode)) | |
10133 | { | |
10134 | enum machine_mode omode = TYPE_MODE (index_type); | |
8ec3c5c2 | 10135 | rtx rangertx = expand_normal (range); |
539a3a92 | 10136 | |
10137 | /* We must handle the endpoints in the original mode. */ | |
b55f9493 | 10138 | index_expr = build2 (MINUS_EXPR, index_type, |
10139 | index_expr, minval); | |
539a3a92 | 10140 | minval = integer_zero_node; |
8ec3c5c2 | 10141 | index = expand_normal (index_expr); |
72c30859 | 10142 | if (default_label) |
10143 | emit_cmp_and_jump_insns (rangertx, index, LTU, NULL_RTX, | |
10144 | omode, 1, default_label); | |
539a3a92 | 10145 | /* Now we can safely truncate. */ |
10146 | index = convert_to_mode (index_mode, index, 0); | |
10147 | } | |
10148 | else | |
10149 | { | |
10150 | if (TYPE_MODE (index_type) != index_mode) | |
10151 | { | |
e3b560a6 | 10152 | index_type = lang_hooks.types.type_for_size (index_bits, 0); |
10153 | index_expr = fold_convert (index_type, index_expr); | |
539a3a92 | 10154 | } |
10155 | ||
8ec3c5c2 | 10156 | index = expand_normal (index_expr); |
539a3a92 | 10157 | } |
0a534ba7 | 10158 | |
539a3a92 | 10159 | do_pending_stack_adjust (); |
10160 | ||
10161 | op_mode = insn_data[(int) CODE_FOR_casesi].operand[0].mode; | |
10162 | if (! (*insn_data[(int) CODE_FOR_casesi].operand[0].predicate) | |
10163 | (index, op_mode)) | |
10164 | index = copy_to_mode_reg (op_mode, index); | |
35f44ac1 | 10165 | |
8ec3c5c2 | 10166 | op1 = expand_normal (minval); |
539a3a92 | 10167 | |
10168 | op_mode = insn_data[(int) CODE_FOR_casesi].operand[1].mode; | |
10169 | op1 = convert_modes (op_mode, TYPE_MODE (TREE_TYPE (minval)), | |
78a8ed03 | 10170 | op1, TYPE_UNSIGNED (TREE_TYPE (minval))); |
539a3a92 | 10171 | if (! (*insn_data[(int) CODE_FOR_casesi].operand[1].predicate) |
10172 | (op1, op_mode)) | |
10173 | op1 = copy_to_mode_reg (op_mode, op1); | |
10174 | ||
8ec3c5c2 | 10175 | op2 = expand_normal (range); |
539a3a92 | 10176 | |
10177 | op_mode = insn_data[(int) CODE_FOR_casesi].operand[2].mode; | |
10178 | op2 = convert_modes (op_mode, TYPE_MODE (TREE_TYPE (range)), | |
78a8ed03 | 10179 | op2, TYPE_UNSIGNED (TREE_TYPE (range))); |
539a3a92 | 10180 | if (! (*insn_data[(int) CODE_FOR_casesi].operand[2].predicate) |
10181 | (op2, op_mode)) | |
10182 | op2 = copy_to_mode_reg (op_mode, op2); | |
10183 | ||
10184 | emit_jump_insn (gen_casesi (index, op1, op2, | |
469b75f7 | 10185 | table_label, !default_label |
10186 | ? fallback_label : default_label)); | |
539a3a92 | 10187 | return 1; |
10188 | } | |
10189 | ||
10190 | /* Attempt to generate a tablejump instruction; same concept. */ | |
10191 | #ifndef HAVE_tablejump | |
10192 | #define HAVE_tablejump 0 | |
10193 | #define gen_tablejump(x, y) (0) | |
10194 | #endif | |
10195 | ||
10196 | /* Subroutine of the next function. | |
10197 | ||
10198 | INDEX is the value being switched on, with the lowest value | |
b54842d8 | 10199 | in the table already subtracted. |
10200 | MODE is its expected mode (needed if INDEX is constant). | |
10201 | RANGE is the length of the jump table. | |
10202 | TABLE_LABEL is a CODE_LABEL rtx for the table itself. | |
1ccc1a7e | 10203 | |
b54842d8 | 10204 | DEFAULT_LABEL is a CODE_LABEL rtx to jump to if the |
10205 | index value is out of range. */ | |
a92771b8 | 10206 | |
539a3a92 | 10207 | static void |
35cb5232 | 10208 | do_tablejump (rtx index, enum machine_mode mode, rtx range, rtx table_label, |
10209 | rtx default_label) | |
649d8da6 | 10210 | { |
19cb6b50 | 10211 | rtx temp, vector; |
1ccc1a7e | 10212 | |
edb7afe8 | 10213 | if (INTVAL (range) > cfun->cfg->max_jumptable_ents) |
10214 | cfun->cfg->max_jumptable_ents = INTVAL (range); | |
71a455ac | 10215 | |
b54842d8 | 10216 | /* Do an unsigned comparison (in the proper mode) between the index |
10217 | expression and the value which represents the length of the range. | |
10218 | Since we just finished subtracting the lower bound of the range | |
10219 | from the index expression, this comparison allows us to simultaneously | |
10220 | check that the original index expression value is both greater than | |
10221 | or equal to the minimum value of the range and less than or equal to | |
10222 | the maximum value of the range. */ | |
9282409c | 10223 | |
72c30859 | 10224 | if (default_label) |
10225 | emit_cmp_and_jump_insns (index, range, GTU, NULL_RTX, mode, 1, | |
10226 | default_label); | |
10f307d9 | 10227 | |
b54842d8 | 10228 | /* If index is in range, it must fit in Pmode. |
10229 | Convert to Pmode so we can index with it. */ | |
10230 | if (mode != Pmode) | |
10231 | index = convert_to_mode (Pmode, index, 1); | |
10f307d9 | 10232 | |
c7bf1374 | 10233 | /* Don't let a MEM slip through, because then INDEX that comes |
b54842d8 | 10234 | out of PIC_CASE_VECTOR_ADDRESS won't be a valid address, |
10235 | and break_out_memory_refs will go to work on it and mess it up. */ | |
10236 | #ifdef PIC_CASE_VECTOR_ADDRESS | |
8ad4c111 | 10237 | if (flag_pic && !REG_P (index)) |
b54842d8 | 10238 | index = copy_to_mode_reg (Pmode, index); |
10239 | #endif | |
649d8da6 | 10240 | |
b54842d8 | 10241 | /* ??? The only correct use of CASE_VECTOR_MODE is the one inside the |
10242 | GET_MODE_SIZE, because this indicates how large insns are. The other | |
10243 | uses should all be Pmode, because they are addresses. This code | |
10244 | could fail if addresses and insns are not the same size. */ | |
10245 | index = gen_rtx_PLUS (Pmode, | |
10246 | gen_rtx_MULT (Pmode, index, | |
10247 | GEN_INT (GET_MODE_SIZE (CASE_VECTOR_MODE))), | |
10248 | gen_rtx_LABEL_REF (Pmode, table_label)); | |
10249 | #ifdef PIC_CASE_VECTOR_ADDRESS | |
10250 | if (flag_pic) | |
10251 | index = PIC_CASE_VECTOR_ADDRESS (index); | |
10252 | else | |
10f307d9 | 10253 | #endif |
4d25f9eb | 10254 | index = memory_address (CASE_VECTOR_MODE, index); |
b54842d8 | 10255 | temp = gen_reg_rtx (CASE_VECTOR_MODE); |
e265a6da | 10256 | vector = gen_const_mem (CASE_VECTOR_MODE, index); |
b54842d8 | 10257 | convert_move (temp, vector, 0); |
10258 | ||
10259 | emit_jump_insn (gen_tablejump (temp, table_label)); | |
10260 | ||
10261 | /* If we are generating PIC code or if the table is PC-relative, the | |
10262 | table and JUMP_INSN must be adjacent, so don't output a BARRIER. */ | |
10263 | if (! CASE_VECTOR_PC_RELATIVE && ! flag_pic) | |
10264 | emit_barrier (); | |
10f307d9 | 10265 | } |
b54842d8 | 10266 | |
539a3a92 | 10267 | int |
35cb5232 | 10268 | try_tablejump (tree index_type, tree index_expr, tree minval, tree range, |
10269 | rtx table_label, rtx default_label) | |
539a3a92 | 10270 | { |
10271 | rtx index; | |
10272 | ||
10273 | if (! HAVE_tablejump) | |
10274 | return 0; | |
10275 | ||
faa43f85 | 10276 | index_expr = fold_build2 (MINUS_EXPR, index_type, |
e3b560a6 | 10277 | fold_convert (index_type, index_expr), |
10278 | fold_convert (index_type, minval)); | |
8ec3c5c2 | 10279 | index = expand_normal (index_expr); |
539a3a92 | 10280 | do_pending_stack_adjust (); |
10281 | ||
10282 | do_tablejump (index, TYPE_MODE (index_type), | |
10283 | convert_modes (TYPE_MODE (index_type), | |
10284 | TYPE_MODE (TREE_TYPE (range)), | |
8ec3c5c2 | 10285 | expand_normal (range), |
78a8ed03 | 10286 | TYPE_UNSIGNED (TREE_TYPE (range))), |
539a3a92 | 10287 | table_label, default_label); |
10288 | return 1; | |
10289 | } | |
1f3233d1 | 10290 | |
c3309fc6 | 10291 | /* Return a CONST_VECTOR rtx for a VECTOR_CST tree. */ |
10292 | static rtx | |
35cb5232 | 10293 | const_vector_from_tree (tree exp) |
c3309fc6 | 10294 | { |
10295 | rtvec v; | |
10296 | int units, i; | |
10297 | tree link, elt; | |
10298 | enum machine_mode inner, mode; | |
10299 | ||
10300 | mode = TYPE_MODE (TREE_TYPE (exp)); | |
10301 | ||
4ee9c684 | 10302 | if (initializer_zerop (exp)) |
c3309fc6 | 10303 | return CONST0_RTX (mode); |
10304 | ||
10305 | units = GET_MODE_NUNITS (mode); | |
10306 | inner = GET_MODE_INNER (mode); | |
10307 | ||
10308 | v = rtvec_alloc (units); | |
10309 | ||
10310 | link = TREE_VECTOR_CST_ELTS (exp); | |
10311 | for (i = 0; link; link = TREE_CHAIN (link), ++i) | |
10312 | { | |
10313 | elt = TREE_VALUE (link); | |
10314 | ||
10315 | if (TREE_CODE (elt) == REAL_CST) | |
10316 | RTVEC_ELT (v, i) = CONST_DOUBLE_FROM_REAL_VALUE (TREE_REAL_CST (elt), | |
10317 | inner); | |
68a556d6 | 10318 | else if (TREE_CODE (elt) == FIXED_CST) |
10319 | RTVEC_ELT (v, i) = CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (elt), | |
10320 | inner); | |
c3309fc6 | 10321 | else |
3e052aec | 10322 | RTVEC_ELT (v, i) = immed_double_int_const (tree_to_double_int (elt), |
10323 | inner); | |
c3309fc6 | 10324 | } |
10325 | ||
c2f2aba8 | 10326 | /* Initialize remaining elements to 0. */ |
10327 | for (; i < units; ++i) | |
10328 | RTVEC_ELT (v, i) = CONST0_RTX (inner); | |
10329 | ||
6e68dcb2 | 10330 | return gen_rtx_CONST_VECTOR (mode, v); |
c3309fc6 | 10331 | } |
58d82cd0 | 10332 | |
382597e4 | 10333 | /* Build a decl for a personality function given a language prefix. */ |
58d82cd0 | 10334 | |
10335 | tree | |
382597e4 | 10336 | build_personality_function (const char *lang) |
58d82cd0 | 10337 | { |
382597e4 | 10338 | const char *unwind_and_version; |
58d82cd0 | 10339 | tree decl, type; |
382597e4 | 10340 | char *name; |
10341 | ||
b213bf24 | 10342 | switch (targetm.except_unwind_info (&global_options)) |
382597e4 | 10343 | { |
10344 | case UI_NONE: | |
10345 | return NULL; | |
10346 | case UI_SJLJ: | |
10347 | unwind_and_version = "_sj0"; | |
10348 | break; | |
10349 | case UI_DWARF2: | |
10350 | case UI_TARGET: | |
10351 | unwind_and_version = "_v0"; | |
10352 | break; | |
10353 | default: | |
10354 | gcc_unreachable (); | |
10355 | } | |
10356 | ||
10357 | name = ACONCAT (("__", lang, "_personality", unwind_and_version, NULL)); | |
58d82cd0 | 10358 | |
10359 | type = build_function_type_list (integer_type_node, integer_type_node, | |
10360 | long_long_unsigned_type_node, | |
10361 | ptr_type_node, ptr_type_node, NULL_TREE); | |
10362 | decl = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL, | |
10363 | get_identifier (name), type); | |
10364 | DECL_ARTIFICIAL (decl) = 1; | |
10365 | DECL_EXTERNAL (decl) = 1; | |
10366 | TREE_PUBLIC (decl) = 1; | |
10367 | ||
10368 | /* Zap the nonsensical SYMBOL_REF_DECL for this. What we're left with | |
10369 | are the flags assigned by targetm.encode_section_info. */ | |
10370 | SET_SYMBOL_REF_DECL (XEXP (DECL_RTL (decl), 0), NULL); | |
10371 | ||
10372 | return decl; | |
10373 | } | |
10374 | ||
10375 | /* Extracts the personality function of DECL and returns the corresponding | |
10376 | libfunc. */ | |
10377 | ||
10378 | rtx | |
10379 | get_personality_function (tree decl) | |
10380 | { | |
10381 | tree personality = DECL_FUNCTION_PERSONALITY (decl); | |
10382 | enum eh_personality_kind pk; | |
10383 | ||
10384 | pk = function_needs_eh_personality (DECL_STRUCT_FUNCTION (decl)); | |
10385 | if (pk == eh_personality_none) | |
10386 | return NULL; | |
10387 | ||
10388 | if (!personality | |
10389 | && pk == eh_personality_any) | |
10390 | personality = lang_hooks.eh_personality (); | |
10391 | ||
10392 | if (pk == eh_personality_lang) | |
10393 | gcc_assert (personality != NULL_TREE); | |
10394 | ||
10395 | return XEXP (DECL_RTL (personality), 0); | |
10396 | } | |
10397 | ||
1f3233d1 | 10398 | #include "gt-expr.h" |