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3cf2715d | 1 | /* Convert RTL to assembler code and output it, for GNU compiler. |
3b708058 | 2 | Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, |
17ac08e2 ILT |
3 | 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005 |
4 | Free Software Foundation, Inc. | |
3cf2715d | 5 | |
1322177d | 6 | This file is part of GCC. |
3cf2715d | 7 | |
1322177d LB |
8 | GCC is free software; you can redistribute it and/or modify it under |
9 | the terms of the GNU General Public License as published by the Free | |
10 | Software Foundation; either version 2, or (at your option) any later | |
11 | version. | |
3cf2715d | 12 | |
1322177d LB |
13 | GCC is distributed in the hope that it will be useful, but WITHOUT ANY |
14 | WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
15 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
16 | for more details. | |
3cf2715d DE |
17 | |
18 | You should have received a copy of the GNU General Public License | |
1322177d LB |
19 | along with GCC; see the file COPYING. If not, write to the Free |
20 | Software Foundation, 59 Temple Place - Suite 330, Boston, MA | |
21 | 02111-1307, USA. */ | |
3cf2715d | 22 | |
3cf2715d DE |
23 | /* This is the final pass of the compiler. |
24 | It looks at the rtl code for a function and outputs assembler code. | |
25 | ||
26 | Call `final_start_function' to output the assembler code for function entry, | |
27 | `final' to output assembler code for some RTL code, | |
28 | `final_end_function' to output assembler code for function exit. | |
29 | If a function is compiled in several pieces, each piece is | |
30 | output separately with `final'. | |
31 | ||
32 | Some optimizations are also done at this level. | |
33 | Move instructions that were made unnecessary by good register allocation | |
34 | are detected and omitted from the output. (Though most of these | |
35 | are removed by the last jump pass.) | |
36 | ||
37 | Instructions to set the condition codes are omitted when it can be | |
38 | seen that the condition codes already had the desired values. | |
39 | ||
40 | In some cases it is sufficient if the inherited condition codes | |
41 | have related values, but this may require the following insn | |
42 | (the one that tests the condition codes) to be modified. | |
43 | ||
44 | The code for the function prologue and epilogue are generated | |
08c148a8 NB |
45 | directly in assembler by the target functions function_prologue and |
46 | function_epilogue. Those instructions never exist as rtl. */ | |
3cf2715d DE |
47 | |
48 | #include "config.h" | |
670ee920 | 49 | #include "system.h" |
4977bab6 ZW |
50 | #include "coretypes.h" |
51 | #include "tm.h" | |
3cf2715d DE |
52 | |
53 | #include "tree.h" | |
54 | #include "rtl.h" | |
6baf1cc8 | 55 | #include "tm_p.h" |
3cf2715d DE |
56 | #include "regs.h" |
57 | #include "insn-config.h" | |
3cf2715d | 58 | #include "insn-attr.h" |
3cf2715d DE |
59 | #include "recog.h" |
60 | #include "conditions.h" | |
61 | #include "flags.h" | |
62 | #include "real.h" | |
63 | #include "hard-reg-set.h" | |
3cf2715d | 64 | #include "output.h" |
3d195391 | 65 | #include "except.h" |
49ad7cfa | 66 | #include "function.h" |
10f0ad3d | 67 | #include "toplev.h" |
d6f4ec51 | 68 | #include "reload.h" |
ab87f8c8 | 69 | #include "intl.h" |
be1bb652 | 70 | #include "basic-block.h" |
08c148a8 | 71 | #include "target.h" |
a5a42b92 | 72 | #include "debug.h" |
49d801d3 | 73 | #include "expr.h" |
ba4f7968 | 74 | #include "cfglayout.h" |
3cf2715d | 75 | |
440aabf8 NB |
76 | #ifdef XCOFF_DEBUGGING_INFO |
77 | #include "xcoffout.h" /* Needed for external data | |
78 | declarations for e.g. AIX 4.x. */ | |
79 | #endif | |
80 | ||
76ead72b RL |
81 | #if defined (DWARF2_UNWIND_INFO) || defined (DWARF2_DEBUGGING_INFO) |
82 | #include "dwarf2out.h" | |
83 | #endif | |
84 | ||
6a08f7b3 DP |
85 | #ifdef DBX_DEBUGGING_INFO |
86 | #include "dbxout.h" | |
87 | #endif | |
88 | ||
3cf2715d DE |
89 | /* If we aren't using cc0, CC_STATUS_INIT shouldn't exist. So define a |
90 | null default for it to save conditionalization later. */ | |
91 | #ifndef CC_STATUS_INIT | |
92 | #define CC_STATUS_INIT | |
93 | #endif | |
94 | ||
95 | /* How to start an assembler comment. */ | |
96 | #ifndef ASM_COMMENT_START | |
97 | #define ASM_COMMENT_START ";#" | |
98 | #endif | |
99 | ||
100 | /* Is the given character a logical line separator for the assembler? */ | |
101 | #ifndef IS_ASM_LOGICAL_LINE_SEPARATOR | |
102 | #define IS_ASM_LOGICAL_LINE_SEPARATOR(C) ((C) == ';') | |
103 | #endif | |
104 | ||
75197b37 BS |
105 | #ifndef JUMP_TABLES_IN_TEXT_SECTION |
106 | #define JUMP_TABLES_IN_TEXT_SECTION 0 | |
107 | #endif | |
108 | ||
d48bc59a RH |
109 | #if defined(READONLY_DATA_SECTION) || defined(READONLY_DATA_SECTION_ASM_OP) |
110 | #define HAVE_READONLY_DATA_SECTION 1 | |
111 | #else | |
112 | #define HAVE_READONLY_DATA_SECTION 0 | |
113 | #endif | |
114 | ||
589fe865 DJ |
115 | /* Bitflags used by final_scan_insn. */ |
116 | #define SEEN_BB 1 | |
117 | #define SEEN_NOTE 2 | |
118 | #define SEEN_EMITTED 4 | |
119 | ||
3cf2715d | 120 | /* Last insn processed by final_scan_insn. */ |
b1a9f6a0 RH |
121 | static rtx debug_insn; |
122 | rtx current_output_insn; | |
3cf2715d DE |
123 | |
124 | /* Line number of last NOTE. */ | |
125 | static int last_linenum; | |
126 | ||
eac40081 RK |
127 | /* Highest line number in current block. */ |
128 | static int high_block_linenum; | |
129 | ||
130 | /* Likewise for function. */ | |
131 | static int high_function_linenum; | |
132 | ||
3cf2715d | 133 | /* Filename of last NOTE. */ |
3cce094d | 134 | static const char *last_filename; |
3cf2715d | 135 | |
fc470718 R |
136 | extern int length_unit_log; /* This is defined in insn-attrtab.c. */ |
137 | ||
3cf2715d DE |
138 | /* Nonzero while outputting an `asm' with operands. |
139 | This means that inconsistencies are the user's fault, so don't abort. | |
140 | The precise value is the insn being output, to pass to error_for_asm. */ | |
c8b94768 | 141 | rtx this_is_asm_operands; |
3cf2715d DE |
142 | |
143 | /* Number of operands of this insn, for an `asm' with operands. */ | |
22bf4422 | 144 | static unsigned int insn_noperands; |
3cf2715d DE |
145 | |
146 | /* Compare optimization flag. */ | |
147 | ||
148 | static rtx last_ignored_compare = 0; | |
149 | ||
3cf2715d DE |
150 | /* Assign a unique number to each insn that is output. |
151 | This can be used to generate unique local labels. */ | |
152 | ||
153 | static int insn_counter = 0; | |
154 | ||
155 | #ifdef HAVE_cc0 | |
156 | /* This variable contains machine-dependent flags (defined in tm.h) | |
157 | set and examined by output routines | |
158 | that describe how to interpret the condition codes properly. */ | |
159 | ||
160 | CC_STATUS cc_status; | |
161 | ||
162 | /* During output of an insn, this contains a copy of cc_status | |
163 | from before the insn. */ | |
164 | ||
165 | CC_STATUS cc_prev_status; | |
166 | #endif | |
167 | ||
168 | /* Indexed by hardware reg number, is 1 if that register is ever | |
169 | used in the current function. | |
170 | ||
171 | In life_analysis, or in stupid_life_analysis, this is set | |
172 | up to record the hard regs used explicitly. Reload adds | |
173 | in the hard regs used for holding pseudo regs. Final uses | |
174 | it to generate the code in the function prologue and epilogue | |
175 | to save and restore registers as needed. */ | |
176 | ||
177 | char regs_ever_live[FIRST_PSEUDO_REGISTER]; | |
178 | ||
df2ef49b AM |
179 | /* Like regs_ever_live, but 1 if a reg is set or clobbered from an asm. |
180 | Unlike regs_ever_live, elements of this array corresponding to | |
181 | eliminable regs like the frame pointer are set if an asm sets them. */ | |
182 | ||
183 | char regs_asm_clobbered[FIRST_PSEUDO_REGISTER]; | |
184 | ||
3cf2715d | 185 | /* Nonzero means current function must be given a frame pointer. |
b483cfb7 EB |
186 | Initialized in function.c to 0. Set only in reload1.c as per |
187 | the needs of the function. */ | |
3cf2715d DE |
188 | |
189 | int frame_pointer_needed; | |
190 | ||
18c038b9 | 191 | /* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */ |
3cf2715d DE |
192 | |
193 | static int block_depth; | |
194 | ||
195 | /* Nonzero if have enabled APP processing of our assembler output. */ | |
196 | ||
197 | static int app_on; | |
198 | ||
199 | /* If we are outputting an insn sequence, this contains the sequence rtx. | |
200 | Zero otherwise. */ | |
201 | ||
202 | rtx final_sequence; | |
203 | ||
204 | #ifdef ASSEMBLER_DIALECT | |
205 | ||
206 | /* Number of the assembler dialect to use, starting at 0. */ | |
207 | static int dialect_number; | |
208 | #endif | |
209 | ||
afe48e06 RH |
210 | #ifdef HAVE_conditional_execution |
211 | /* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */ | |
212 | rtx current_insn_predicate; | |
213 | #endif | |
214 | ||
1d300e19 | 215 | #ifdef HAVE_ATTR_length |
6cf9ac28 AJ |
216 | static int asm_insn_count (rtx); |
217 | #endif | |
218 | static void profile_function (FILE *); | |
219 | static void profile_after_prologue (FILE *); | |
220 | static bool notice_source_line (rtx); | |
221 | static rtx walk_alter_subreg (rtx *); | |
222 | static void output_asm_name (void); | |
223 | static void output_alternate_entry_point (FILE *, rtx); | |
224 | static tree get_mem_expr_from_op (rtx, int *); | |
225 | static void output_asm_operand_names (rtx *, int *, int); | |
226 | static void output_operand (rtx, int); | |
e9a25f70 | 227 | #ifdef LEAF_REGISTERS |
6cf9ac28 | 228 | static void leaf_renumber_regs (rtx); |
e9a25f70 JL |
229 | #endif |
230 | #ifdef HAVE_cc0 | |
6cf9ac28 | 231 | static int alter_cond (rtx); |
e9a25f70 | 232 | #endif |
ca3075bd | 233 | #ifndef ADDR_VEC_ALIGN |
6cf9ac28 | 234 | static int final_addr_vec_align (rtx); |
ca3075bd | 235 | #endif |
7bdb32b9 | 236 | #ifdef HAVE_ATTR_length |
6cf9ac28 | 237 | static int align_fuzz (rtx, rtx, int, unsigned); |
7bdb32b9 | 238 | #endif |
3cf2715d DE |
239 | \f |
240 | /* Initialize data in final at the beginning of a compilation. */ | |
241 | ||
242 | void | |
6cf9ac28 | 243 | init_final (const char *filename ATTRIBUTE_UNUSED) |
3cf2715d | 244 | { |
3cf2715d | 245 | app_on = 0; |
3cf2715d DE |
246 | final_sequence = 0; |
247 | ||
248 | #ifdef ASSEMBLER_DIALECT | |
249 | dialect_number = ASSEMBLER_DIALECT; | |
250 | #endif | |
251 | } | |
252 | ||
08c148a8 | 253 | /* Default target function prologue and epilogue assembler output. |
b9f22704 | 254 | |
08c148a8 NB |
255 | If not overridden for epilogue code, then the function body itself |
256 | contains return instructions wherever needed. */ | |
257 | void | |
6cf9ac28 AJ |
258 | default_function_pro_epilogue (FILE *file ATTRIBUTE_UNUSED, |
259 | HOST_WIDE_INT size ATTRIBUTE_UNUSED) | |
08c148a8 NB |
260 | { |
261 | } | |
262 | ||
b4c25db2 NB |
263 | /* Default target hook that outputs nothing to a stream. */ |
264 | void | |
6cf9ac28 | 265 | no_asm_to_stream (FILE *file ATTRIBUTE_UNUSED) |
b4c25db2 NB |
266 | { |
267 | } | |
268 | ||
3cf2715d DE |
269 | /* Enable APP processing of subsequent output. |
270 | Used before the output from an `asm' statement. */ | |
271 | ||
272 | void | |
6cf9ac28 | 273 | app_enable (void) |
3cf2715d DE |
274 | { |
275 | if (! app_on) | |
276 | { | |
51723711 | 277 | fputs (ASM_APP_ON, asm_out_file); |
3cf2715d DE |
278 | app_on = 1; |
279 | } | |
280 | } | |
281 | ||
282 | /* Disable APP processing of subsequent output. | |
283 | Called from varasm.c before most kinds of output. */ | |
284 | ||
285 | void | |
6cf9ac28 | 286 | app_disable (void) |
3cf2715d DE |
287 | { |
288 | if (app_on) | |
289 | { | |
51723711 | 290 | fputs (ASM_APP_OFF, asm_out_file); |
3cf2715d DE |
291 | app_on = 0; |
292 | } | |
293 | } | |
294 | \f | |
f5d927c0 | 295 | /* Return the number of slots filled in the current |
3cf2715d DE |
296 | delayed branch sequence (we don't count the insn needing the |
297 | delay slot). Zero if not in a delayed branch sequence. */ | |
298 | ||
299 | #ifdef DELAY_SLOTS | |
300 | int | |
6cf9ac28 | 301 | dbr_sequence_length (void) |
3cf2715d DE |
302 | { |
303 | if (final_sequence != 0) | |
304 | return XVECLEN (final_sequence, 0) - 1; | |
305 | else | |
306 | return 0; | |
307 | } | |
308 | #endif | |
309 | \f | |
310 | /* The next two pages contain routines used to compute the length of an insn | |
311 | and to shorten branches. */ | |
312 | ||
313 | /* Arrays for insn lengths, and addresses. The latter is referenced by | |
314 | `insn_current_length'. */ | |
315 | ||
addd7df6 | 316 | static int *insn_lengths; |
9d98a694 | 317 | |
9d98a694 | 318 | varray_type insn_addresses_; |
3cf2715d | 319 | |
ea3cbda5 R |
320 | /* Max uid for which the above arrays are valid. */ |
321 | static int insn_lengths_max_uid; | |
322 | ||
3cf2715d DE |
323 | /* Address of insn being processed. Used by `insn_current_length'. */ |
324 | int insn_current_address; | |
325 | ||
fc470718 R |
326 | /* Address of insn being processed in previous iteration. */ |
327 | int insn_last_address; | |
328 | ||
d6a7951f | 329 | /* known invariant alignment of insn being processed. */ |
fc470718 R |
330 | int insn_current_align; |
331 | ||
95707627 R |
332 | /* After shorten_branches, for any insn, uid_align[INSN_UID (insn)] |
333 | gives the next following alignment insn that increases the known | |
334 | alignment, or NULL_RTX if there is no such insn. | |
335 | For any alignment obtained this way, we can again index uid_align with | |
336 | its uid to obtain the next following align that in turn increases the | |
337 | alignment, till we reach NULL_RTX; the sequence obtained this way | |
338 | for each insn we'll call the alignment chain of this insn in the following | |
339 | comments. */ | |
340 | ||
f5d927c0 KH |
341 | struct label_alignment |
342 | { | |
9e423e6d JW |
343 | short alignment; |
344 | short max_skip; | |
345 | }; | |
346 | ||
347 | static rtx *uid_align; | |
348 | static int *uid_shuid; | |
349 | static struct label_alignment *label_align; | |
95707627 | 350 | |
3cf2715d DE |
351 | /* Indicate that branch shortening hasn't yet been done. */ |
352 | ||
353 | void | |
6cf9ac28 | 354 | init_insn_lengths (void) |
3cf2715d | 355 | { |
95707627 R |
356 | if (uid_shuid) |
357 | { | |
358 | free (uid_shuid); | |
359 | uid_shuid = 0; | |
360 | } | |
361 | if (insn_lengths) | |
362 | { | |
363 | free (insn_lengths); | |
364 | insn_lengths = 0; | |
ea3cbda5 | 365 | insn_lengths_max_uid = 0; |
95707627 | 366 | } |
9d98a694 AO |
367 | #ifdef HAVE_ATTR_length |
368 | INSN_ADDRESSES_FREE (); | |
369 | #endif | |
95707627 R |
370 | if (uid_align) |
371 | { | |
372 | free (uid_align); | |
373 | uid_align = 0; | |
374 | } | |
3cf2715d DE |
375 | } |
376 | ||
377 | /* Obtain the current length of an insn. If branch shortening has been done, | |
378 | get its actual length. Otherwise, get its maximum length. */ | |
379 | ||
380 | int | |
6cf9ac28 | 381 | get_attr_length (rtx insn ATTRIBUTE_UNUSED) |
3cf2715d DE |
382 | { |
383 | #ifdef HAVE_ATTR_length | |
384 | rtx body; | |
385 | int i; | |
386 | int length = 0; | |
387 | ||
ea3cbda5 | 388 | if (insn_lengths_max_uid > INSN_UID (insn)) |
3cf2715d DE |
389 | return insn_lengths[INSN_UID (insn)]; |
390 | else | |
391 | switch (GET_CODE (insn)) | |
392 | { | |
393 | case NOTE: | |
394 | case BARRIER: | |
395 | case CODE_LABEL: | |
396 | return 0; | |
397 | ||
398 | case CALL_INSN: | |
399 | length = insn_default_length (insn); | |
400 | break; | |
401 | ||
402 | case JUMP_INSN: | |
403 | body = PATTERN (insn); | |
dd3f0101 | 404 | if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC) |
3cf2715d | 405 | { |
fc470718 R |
406 | /* Alignment is machine-dependent and should be handled by |
407 | ADDR_VEC_ALIGN. */ | |
3cf2715d DE |
408 | } |
409 | else | |
410 | length = insn_default_length (insn); | |
411 | break; | |
412 | ||
413 | case INSN: | |
414 | body = PATTERN (insn); | |
415 | if (GET_CODE (body) == USE || GET_CODE (body) == CLOBBER) | |
416 | return 0; | |
417 | ||
418 | else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0) | |
419 | length = asm_insn_count (body) * insn_default_length (insn); | |
420 | else if (GET_CODE (body) == SEQUENCE) | |
421 | for (i = 0; i < XVECLEN (body, 0); i++) | |
422 | length += get_attr_length (XVECEXP (body, 0, i)); | |
423 | else | |
424 | length = insn_default_length (insn); | |
e9a25f70 JL |
425 | break; |
426 | ||
427 | default: | |
428 | break; | |
3cf2715d DE |
429 | } |
430 | ||
431 | #ifdef ADJUST_INSN_LENGTH | |
432 | ADJUST_INSN_LENGTH (insn, length); | |
433 | #endif | |
434 | return length; | |
435 | #else /* not HAVE_ATTR_length */ | |
436 | return 0; | |
437 | #endif /* not HAVE_ATTR_length */ | |
438 | } | |
439 | \f | |
fc470718 R |
440 | /* Code to handle alignment inside shorten_branches. */ |
441 | ||
442 | /* Here is an explanation how the algorithm in align_fuzz can give | |
443 | proper results: | |
444 | ||
445 | Call a sequence of instructions beginning with alignment point X | |
446 | and continuing until the next alignment point `block X'. When `X' | |
f5d927c0 | 447 | is used in an expression, it means the alignment value of the |
fc470718 | 448 | alignment point. |
f5d927c0 | 449 | |
fc470718 R |
450 | Call the distance between the start of the first insn of block X, and |
451 | the end of the last insn of block X `IX', for the `inner size of X'. | |
452 | This is clearly the sum of the instruction lengths. | |
f5d927c0 | 453 | |
fc470718 R |
454 | Likewise with the next alignment-delimited block following X, which we |
455 | shall call block Y. | |
f5d927c0 | 456 | |
fc470718 R |
457 | Call the distance between the start of the first insn of block X, and |
458 | the start of the first insn of block Y `OX', for the `outer size of X'. | |
f5d927c0 | 459 | |
fc470718 | 460 | The estimated padding is then OX - IX. |
f5d927c0 | 461 | |
fc470718 | 462 | OX can be safely estimated as |
f5d927c0 | 463 | |
fc470718 R |
464 | if (X >= Y) |
465 | OX = round_up(IX, Y) | |
466 | else | |
467 | OX = round_up(IX, X) + Y - X | |
f5d927c0 | 468 | |
fc470718 R |
469 | Clearly est(IX) >= real(IX), because that only depends on the |
470 | instruction lengths, and those being overestimated is a given. | |
f5d927c0 | 471 | |
fc470718 R |
472 | Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so |
473 | we needn't worry about that when thinking about OX. | |
f5d927c0 | 474 | |
fc470718 R |
475 | When X >= Y, the alignment provided by Y adds no uncertainty factor |
476 | for branch ranges starting before X, so we can just round what we have. | |
477 | But when X < Y, we don't know anything about the, so to speak, | |
478 | `middle bits', so we have to assume the worst when aligning up from an | |
479 | address mod X to one mod Y, which is Y - X. */ | |
480 | ||
481 | #ifndef LABEL_ALIGN | |
efa3896a | 482 | #define LABEL_ALIGN(LABEL) align_labels_log |
fc470718 R |
483 | #endif |
484 | ||
9e423e6d | 485 | #ifndef LABEL_ALIGN_MAX_SKIP |
2cca7283 | 486 | #define LABEL_ALIGN_MAX_SKIP align_labels_max_skip |
9e423e6d JW |
487 | #endif |
488 | ||
fc470718 | 489 | #ifndef LOOP_ALIGN |
efa3896a | 490 | #define LOOP_ALIGN(LABEL) align_loops_log |
fc470718 R |
491 | #endif |
492 | ||
9e423e6d | 493 | #ifndef LOOP_ALIGN_MAX_SKIP |
2cca7283 | 494 | #define LOOP_ALIGN_MAX_SKIP align_loops_max_skip |
9e423e6d JW |
495 | #endif |
496 | ||
fc470718 | 497 | #ifndef LABEL_ALIGN_AFTER_BARRIER |
340f7e7c | 498 | #define LABEL_ALIGN_AFTER_BARRIER(LABEL) 0 |
fc470718 R |
499 | #endif |
500 | ||
9e423e6d | 501 | #ifndef LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP |
247a370b JH |
502 | #define LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP 0 |
503 | #endif | |
504 | ||
505 | #ifndef JUMP_ALIGN | |
506 | #define JUMP_ALIGN(LABEL) align_jumps_log | |
507 | #endif | |
508 | ||
509 | #ifndef JUMP_ALIGN_MAX_SKIP | |
2cca7283 | 510 | #define JUMP_ALIGN_MAX_SKIP align_jumps_max_skip |
9e423e6d JW |
511 | #endif |
512 | ||
fc470718 | 513 | #ifndef ADDR_VEC_ALIGN |
ca3075bd | 514 | static int |
6cf9ac28 | 515 | final_addr_vec_align (rtx addr_vec) |
fc470718 | 516 | { |
2a841588 | 517 | int align = GET_MODE_SIZE (GET_MODE (PATTERN (addr_vec))); |
fc470718 R |
518 | |
519 | if (align > BIGGEST_ALIGNMENT / BITS_PER_UNIT) | |
520 | align = BIGGEST_ALIGNMENT / BITS_PER_UNIT; | |
2a841588 | 521 | return exact_log2 (align); |
fc470718 R |
522 | |
523 | } | |
f5d927c0 | 524 | |
fc470718 R |
525 | #define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC) |
526 | #endif | |
527 | ||
528 | #ifndef INSN_LENGTH_ALIGNMENT | |
529 | #define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log | |
530 | #endif | |
531 | ||
fc470718 R |
532 | #define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)]) |
533 | ||
de7987a6 | 534 | static int min_labelno, max_labelno; |
fc470718 R |
535 | |
536 | #define LABEL_TO_ALIGNMENT(LABEL) \ | |
9e423e6d JW |
537 | (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment) |
538 | ||
539 | #define LABEL_TO_MAX_SKIP(LABEL) \ | |
540 | (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip) | |
fc470718 R |
541 | |
542 | /* For the benefit of port specific code do this also as a function. */ | |
f5d927c0 | 543 | |
fc470718 | 544 | int |
6cf9ac28 | 545 | label_to_alignment (rtx label) |
fc470718 R |
546 | { |
547 | return LABEL_TO_ALIGNMENT (label); | |
548 | } | |
549 | ||
550 | #ifdef HAVE_ATTR_length | |
551 | /* The differences in addresses | |
552 | between a branch and its target might grow or shrink depending on | |
553 | the alignment the start insn of the range (the branch for a forward | |
554 | branch or the label for a backward branch) starts out on; if these | |
555 | differences are used naively, they can even oscillate infinitely. | |
556 | We therefore want to compute a 'worst case' address difference that | |
557 | is independent of the alignment the start insn of the range end | |
558 | up on, and that is at least as large as the actual difference. | |
559 | The function align_fuzz calculates the amount we have to add to the | |
560 | naively computed difference, by traversing the part of the alignment | |
561 | chain of the start insn of the range that is in front of the end insn | |
562 | of the range, and considering for each alignment the maximum amount | |
563 | that it might contribute to a size increase. | |
564 | ||
565 | For casesi tables, we also want to know worst case minimum amounts of | |
566 | address difference, in case a machine description wants to introduce | |
567 | some common offset that is added to all offsets in a table. | |
d6a7951f | 568 | For this purpose, align_fuzz with a growth argument of 0 computes the |
fc470718 R |
569 | appropriate adjustment. */ |
570 | ||
fc470718 R |
571 | /* Compute the maximum delta by which the difference of the addresses of |
572 | START and END might grow / shrink due to a different address for start | |
573 | which changes the size of alignment insns between START and END. | |
574 | KNOWN_ALIGN_LOG is the alignment known for START. | |
575 | GROWTH should be ~0 if the objective is to compute potential code size | |
576 | increase, and 0 if the objective is to compute potential shrink. | |
577 | The return value is undefined for any other value of GROWTH. */ | |
f5d927c0 | 578 | |
ca3075bd | 579 | static int |
6cf9ac28 | 580 | align_fuzz (rtx start, rtx end, int known_align_log, unsigned int growth) |
fc470718 R |
581 | { |
582 | int uid = INSN_UID (start); | |
583 | rtx align_label; | |
584 | int known_align = 1 << known_align_log; | |
585 | int end_shuid = INSN_SHUID (end); | |
586 | int fuzz = 0; | |
587 | ||
588 | for (align_label = uid_align[uid]; align_label; align_label = uid_align[uid]) | |
589 | { | |
590 | int align_addr, new_align; | |
591 | ||
592 | uid = INSN_UID (align_label); | |
9d98a694 | 593 | align_addr = INSN_ADDRESSES (uid) - insn_lengths[uid]; |
fc470718 R |
594 | if (uid_shuid[uid] > end_shuid) |
595 | break; | |
596 | known_align_log = LABEL_TO_ALIGNMENT (align_label); | |
597 | new_align = 1 << known_align_log; | |
598 | if (new_align < known_align) | |
599 | continue; | |
600 | fuzz += (-align_addr ^ growth) & (new_align - known_align); | |
601 | known_align = new_align; | |
602 | } | |
603 | return fuzz; | |
604 | } | |
605 | ||
606 | /* Compute a worst-case reference address of a branch so that it | |
607 | can be safely used in the presence of aligned labels. Since the | |
608 | size of the branch itself is unknown, the size of the branch is | |
609 | not included in the range. I.e. for a forward branch, the reference | |
610 | address is the end address of the branch as known from the previous | |
611 | branch shortening pass, minus a value to account for possible size | |
612 | increase due to alignment. For a backward branch, it is the start | |
613 | address of the branch as known from the current pass, plus a value | |
614 | to account for possible size increase due to alignment. | |
615 | NB.: Therefore, the maximum offset allowed for backward branches needs | |
616 | to exclude the branch size. */ | |
f5d927c0 | 617 | |
fc470718 | 618 | int |
6cf9ac28 | 619 | insn_current_reference_address (rtx branch) |
fc470718 | 620 | { |
5527bf14 RH |
621 | rtx dest, seq; |
622 | int seq_uid; | |
623 | ||
624 | if (! INSN_ADDRESSES_SET_P ()) | |
625 | return 0; | |
626 | ||
627 | seq = NEXT_INSN (PREV_INSN (branch)); | |
628 | seq_uid = INSN_UID (seq); | |
4b4bf941 | 629 | if (!JUMP_P (branch)) |
fc470718 R |
630 | /* This can happen for example on the PA; the objective is to know the |
631 | offset to address something in front of the start of the function. | |
632 | Thus, we can treat it like a backward branch. | |
633 | We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than | |
634 | any alignment we'd encounter, so we skip the call to align_fuzz. */ | |
635 | return insn_current_address; | |
636 | dest = JUMP_LABEL (branch); | |
5527bf14 | 637 | |
b9f22704 | 638 | /* BRANCH has no proper alignment chain set, so use SEQ. |
afc6898e BS |
639 | BRANCH also has no INSN_SHUID. */ |
640 | if (INSN_SHUID (seq) < INSN_SHUID (dest)) | |
fc470718 | 641 | { |
f5d927c0 | 642 | /* Forward branch. */ |
fc470718 | 643 | return (insn_last_address + insn_lengths[seq_uid] |
26024475 | 644 | - align_fuzz (seq, dest, length_unit_log, ~0)); |
fc470718 R |
645 | } |
646 | else | |
647 | { | |
f5d927c0 | 648 | /* Backward branch. */ |
fc470718 | 649 | return (insn_current_address |
923f7cf9 | 650 | + align_fuzz (dest, seq, length_unit_log, ~0)); |
fc470718 R |
651 | } |
652 | } | |
653 | #endif /* HAVE_ATTR_length */ | |
654 | \f | |
247a370b | 655 | void |
6cf9ac28 | 656 | compute_alignments (void) |
247a370b | 657 | { |
247a370b | 658 | int log, max_skip, max_log; |
e0082a72 | 659 | basic_block bb; |
247a370b JH |
660 | |
661 | if (label_align) | |
662 | { | |
663 | free (label_align); | |
664 | label_align = 0; | |
665 | } | |
666 | ||
667 | max_labelno = max_label_num (); | |
668 | min_labelno = get_first_label_num (); | |
703ad42b KG |
669 | label_align = xcalloc (max_labelno - min_labelno + 1, |
670 | sizeof (struct label_alignment)); | |
247a370b JH |
671 | |
672 | /* If not optimizing or optimizing for size, don't assign any alignments. */ | |
ba712955 | 673 | if (! optimize || optimize_size) |
247a370b JH |
674 | return; |
675 | ||
e0082a72 | 676 | FOR_EACH_BB (bb) |
247a370b | 677 | { |
a813c111 | 678 | rtx label = BB_HEAD (bb); |
247a370b JH |
679 | int fallthru_frequency = 0, branch_frequency = 0, has_fallthru = 0; |
680 | edge e; | |
628f6a4e | 681 | edge_iterator ei; |
247a370b | 682 | |
4b4bf941 | 683 | if (!LABEL_P (label) |
66b4e478 | 684 | || probably_never_executed_bb_p (bb)) |
247a370b JH |
685 | continue; |
686 | max_log = LABEL_ALIGN (label); | |
687 | max_skip = LABEL_ALIGN_MAX_SKIP; | |
688 | ||
628f6a4e | 689 | FOR_EACH_EDGE (e, ei, bb->preds) |
247a370b JH |
690 | { |
691 | if (e->flags & EDGE_FALLTHRU) | |
692 | has_fallthru = 1, fallthru_frequency += EDGE_FREQUENCY (e); | |
693 | else | |
694 | branch_frequency += EDGE_FREQUENCY (e); | |
695 | } | |
696 | ||
f63d1bf7 | 697 | /* There are two purposes to align block with no fallthru incoming edge: |
247a370b | 698 | 1) to avoid fetch stalls when branch destination is near cache boundary |
d6a7951f | 699 | 2) to improve cache efficiency in case the previous block is not executed |
247a370b JH |
700 | (so it does not need to be in the cache). |
701 | ||
702 | We to catch first case, we align frequently executed blocks. | |
703 | To catch the second, we align blocks that are executed more frequently | |
eaec9b3d | 704 | than the predecessor and the predecessor is likely to not be executed |
247a370b JH |
705 | when function is called. */ |
706 | ||
707 | if (!has_fallthru | |
708 | && (branch_frequency > BB_FREQ_MAX / 10 | |
f6366fc7 ZD |
709 | || (bb->frequency > bb->prev_bb->frequency * 10 |
710 | && (bb->prev_bb->frequency | |
247a370b JH |
711 | <= ENTRY_BLOCK_PTR->frequency / 2)))) |
712 | { | |
713 | log = JUMP_ALIGN (label); | |
714 | if (max_log < log) | |
715 | { | |
716 | max_log = log; | |
717 | max_skip = JUMP_ALIGN_MAX_SKIP; | |
718 | } | |
719 | } | |
720 | /* In case block is frequent and reached mostly by non-fallthru edge, | |
09da1532 | 721 | align it. It is most likely a first block of loop. */ |
247a370b | 722 | if (has_fallthru |
66b4e478 | 723 | && maybe_hot_bb_p (bb) |
247a370b | 724 | && branch_frequency + fallthru_frequency > BB_FREQ_MAX / 10 |
1877be45 | 725 | && branch_frequency > fallthru_frequency * 2) |
247a370b JH |
726 | { |
727 | log = LOOP_ALIGN (label); | |
728 | if (max_log < log) | |
729 | { | |
730 | max_log = log; | |
731 | max_skip = LOOP_ALIGN_MAX_SKIP; | |
732 | } | |
733 | } | |
734 | LABEL_TO_ALIGNMENT (label) = max_log; | |
735 | LABEL_TO_MAX_SKIP (label) = max_skip; | |
736 | } | |
737 | } | |
738 | \f | |
3cf2715d DE |
739 | /* Make a pass over all insns and compute their actual lengths by shortening |
740 | any branches of variable length if possible. */ | |
741 | ||
fc470718 R |
742 | /* shorten_branches might be called multiple times: for example, the SH |
743 | port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG. | |
744 | In order to do this, it needs proper length information, which it obtains | |
745 | by calling shorten_branches. This cannot be collapsed with | |
d6a7951f | 746 | shorten_branches itself into a single pass unless we also want to integrate |
fc470718 R |
747 | reorg.c, since the branch splitting exposes new instructions with delay |
748 | slots. */ | |
749 | ||
3cf2715d | 750 | void |
6cf9ac28 | 751 | shorten_branches (rtx first ATTRIBUTE_UNUSED) |
3cf2715d | 752 | { |
3cf2715d | 753 | rtx insn; |
fc470718 R |
754 | int max_uid; |
755 | int i; | |
fc470718 | 756 | int max_log; |
9e423e6d | 757 | int max_skip; |
fc470718 R |
758 | #ifdef HAVE_ATTR_length |
759 | #define MAX_CODE_ALIGN 16 | |
760 | rtx seq; | |
3cf2715d | 761 | int something_changed = 1; |
3cf2715d DE |
762 | char *varying_length; |
763 | rtx body; | |
764 | int uid; | |
fc470718 | 765 | rtx align_tab[MAX_CODE_ALIGN]; |
3cf2715d | 766 | |
fc470718 | 767 | #endif |
3d14e82f | 768 | |
3446405d JH |
769 | /* Compute maximum UID and allocate label_align / uid_shuid. */ |
770 | max_uid = get_max_uid (); | |
d9b6874b | 771 | |
471854f8 | 772 | /* Free uid_shuid before reallocating it. */ |
07a1f795 AP |
773 | free (uid_shuid); |
774 | ||
703ad42b | 775 | uid_shuid = xmalloc (max_uid * sizeof *uid_shuid); |
25e22dc0 | 776 | |
247a370b JH |
777 | if (max_labelno != max_label_num ()) |
778 | { | |
779 | int old = max_labelno; | |
780 | int n_labels; | |
781 | int n_old_labels; | |
782 | ||
783 | max_labelno = max_label_num (); | |
784 | ||
785 | n_labels = max_labelno - min_labelno + 1; | |
786 | n_old_labels = old - min_labelno + 1; | |
787 | ||
703ad42b KG |
788 | label_align = xrealloc (label_align, |
789 | n_labels * sizeof (struct label_alignment)); | |
247a370b JH |
790 | |
791 | /* Range of labels grows monotonically in the function. Abort here | |
792 | means that the initialization of array got lost. */ | |
0bccc606 | 793 | gcc_assert (n_old_labels <= n_labels); |
247a370b JH |
794 | |
795 | memset (label_align + n_old_labels, 0, | |
796 | (n_labels - n_old_labels) * sizeof (struct label_alignment)); | |
797 | } | |
798 | ||
fc470718 R |
799 | /* Initialize label_align and set up uid_shuid to be strictly |
800 | monotonically rising with insn order. */ | |
e2faec75 R |
801 | /* We use max_log here to keep track of the maximum alignment we want to |
802 | impose on the next CODE_LABEL (or the current one if we are processing | |
803 | the CODE_LABEL itself). */ | |
f5d927c0 | 804 | |
9e423e6d JW |
805 | max_log = 0; |
806 | max_skip = 0; | |
807 | ||
808 | for (insn = get_insns (), i = 1; insn; insn = NEXT_INSN (insn)) | |
fc470718 R |
809 | { |
810 | int log; | |
811 | ||
812 | INSN_SHUID (insn) = i++; | |
2c3c49de | 813 | if (INSN_P (insn)) |
e2faec75 R |
814 | { |
815 | /* reorg might make the first insn of a loop being run once only, | |
816 | and delete the label in front of it. Then we want to apply | |
817 | the loop alignment to the new label created by reorg, which | |
818 | is separated by the former loop start insn from the | |
819 | NOTE_INSN_LOOP_BEG. */ | |
820 | } | |
4b4bf941 | 821 | else if (LABEL_P (insn)) |
fc470718 R |
822 | { |
823 | rtx next; | |
ff81832f | 824 | |
247a370b JH |
825 | /* Merge in alignments computed by compute_alignments. */ |
826 | log = LABEL_TO_ALIGNMENT (insn); | |
827 | if (max_log < log) | |
828 | { | |
829 | max_log = log; | |
830 | max_skip = LABEL_TO_MAX_SKIP (insn); | |
831 | } | |
fc470718 R |
832 | |
833 | log = LABEL_ALIGN (insn); | |
834 | if (max_log < log) | |
9e423e6d JW |
835 | { |
836 | max_log = log; | |
837 | max_skip = LABEL_ALIGN_MAX_SKIP; | |
838 | } | |
b2a6a2fb | 839 | next = next_nonnote_insn (insn); |
75197b37 BS |
840 | /* ADDR_VECs only take room if read-only data goes into the text |
841 | section. */ | |
d48bc59a | 842 | if (JUMP_TABLES_IN_TEXT_SECTION || !HAVE_READONLY_DATA_SECTION) |
4b4bf941 | 843 | if (next && JUMP_P (next)) |
75197b37 BS |
844 | { |
845 | rtx nextbody = PATTERN (next); | |
846 | if (GET_CODE (nextbody) == ADDR_VEC | |
847 | || GET_CODE (nextbody) == ADDR_DIFF_VEC) | |
848 | { | |
849 | log = ADDR_VEC_ALIGN (next); | |
850 | if (max_log < log) | |
851 | { | |
852 | max_log = log; | |
853 | max_skip = LABEL_ALIGN_MAX_SKIP; | |
854 | } | |
855 | } | |
856 | } | |
fc470718 | 857 | LABEL_TO_ALIGNMENT (insn) = max_log; |
9e423e6d | 858 | LABEL_TO_MAX_SKIP (insn) = max_skip; |
fc470718 | 859 | max_log = 0; |
9e423e6d | 860 | max_skip = 0; |
fc470718 | 861 | } |
4b4bf941 | 862 | else if (BARRIER_P (insn)) |
fc470718 R |
863 | { |
864 | rtx label; | |
865 | ||
2c3c49de | 866 | for (label = insn; label && ! INSN_P (label); |
fc470718 | 867 | label = NEXT_INSN (label)) |
4b4bf941 | 868 | if (LABEL_P (label)) |
fc470718 R |
869 | { |
870 | log = LABEL_ALIGN_AFTER_BARRIER (insn); | |
871 | if (max_log < log) | |
9e423e6d JW |
872 | { |
873 | max_log = log; | |
874 | max_skip = LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP; | |
875 | } | |
fc470718 R |
876 | break; |
877 | } | |
878 | } | |
fc470718 R |
879 | } |
880 | #ifdef HAVE_ATTR_length | |
881 | ||
882 | /* Allocate the rest of the arrays. */ | |
703ad42b | 883 | insn_lengths = xmalloc (max_uid * sizeof (*insn_lengths)); |
ea3cbda5 | 884 | insn_lengths_max_uid = max_uid; |
af035616 R |
885 | /* Syntax errors can lead to labels being outside of the main insn stream. |
886 | Initialize insn_addresses, so that we get reproducible results. */ | |
9d98a694 | 887 | INSN_ADDRESSES_ALLOC (max_uid); |
fc470718 | 888 | |
703ad42b | 889 | varying_length = xcalloc (max_uid, sizeof (char)); |
fc470718 R |
890 | |
891 | /* Initialize uid_align. We scan instructions | |
892 | from end to start, and keep in align_tab[n] the last seen insn | |
893 | that does an alignment of at least n+1, i.e. the successor | |
894 | in the alignment chain for an insn that does / has a known | |
895 | alignment of n. */ | |
703ad42b | 896 | uid_align = xcalloc (max_uid, sizeof *uid_align); |
fc470718 | 897 | |
f5d927c0 | 898 | for (i = MAX_CODE_ALIGN; --i >= 0;) |
fc470718 R |
899 | align_tab[i] = NULL_RTX; |
900 | seq = get_last_insn (); | |
33f7f353 | 901 | for (; seq; seq = PREV_INSN (seq)) |
fc470718 R |
902 | { |
903 | int uid = INSN_UID (seq); | |
904 | int log; | |
4b4bf941 | 905 | log = (LABEL_P (seq) ? LABEL_TO_ALIGNMENT (seq) : 0); |
fc470718 | 906 | uid_align[uid] = align_tab[0]; |
fc470718 R |
907 | if (log) |
908 | { | |
909 | /* Found an alignment label. */ | |
910 | uid_align[uid] = align_tab[log]; | |
911 | for (i = log - 1; i >= 0; i--) | |
912 | align_tab[i] = seq; | |
913 | } | |
33f7f353 JR |
914 | } |
915 | #ifdef CASE_VECTOR_SHORTEN_MODE | |
916 | if (optimize) | |
917 | { | |
918 | /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum | |
919 | label fields. */ | |
920 | ||
921 | int min_shuid = INSN_SHUID (get_insns ()) - 1; | |
922 | int max_shuid = INSN_SHUID (get_last_insn ()) + 1; | |
923 | int rel; | |
924 | ||
925 | for (insn = first; insn != 0; insn = NEXT_INSN (insn)) | |
fc470718 | 926 | { |
33f7f353 JR |
927 | rtx min_lab = NULL_RTX, max_lab = NULL_RTX, pat; |
928 | int len, i, min, max, insn_shuid; | |
929 | int min_align; | |
930 | addr_diff_vec_flags flags; | |
931 | ||
4b4bf941 | 932 | if (!JUMP_P (insn) |
33f7f353 JR |
933 | || GET_CODE (PATTERN (insn)) != ADDR_DIFF_VEC) |
934 | continue; | |
935 | pat = PATTERN (insn); | |
936 | len = XVECLEN (pat, 1); | |
0bccc606 | 937 | gcc_assert (len > 0); |
33f7f353 JR |
938 | min_align = MAX_CODE_ALIGN; |
939 | for (min = max_shuid, max = min_shuid, i = len - 1; i >= 0; i--) | |
940 | { | |
941 | rtx lab = XEXP (XVECEXP (pat, 1, i), 0); | |
942 | int shuid = INSN_SHUID (lab); | |
943 | if (shuid < min) | |
944 | { | |
945 | min = shuid; | |
946 | min_lab = lab; | |
947 | } | |
948 | if (shuid > max) | |
949 | { | |
950 | max = shuid; | |
951 | max_lab = lab; | |
952 | } | |
953 | if (min_align > LABEL_TO_ALIGNMENT (lab)) | |
954 | min_align = LABEL_TO_ALIGNMENT (lab); | |
955 | } | |
956 | XEXP (pat, 2) = gen_rtx_LABEL_REF (VOIDmode, min_lab); | |
957 | XEXP (pat, 3) = gen_rtx_LABEL_REF (VOIDmode, max_lab); | |
958 | insn_shuid = INSN_SHUID (insn); | |
959 | rel = INSN_SHUID (XEXP (XEXP (pat, 0), 0)); | |
5921f276 | 960 | memset (&flags, 0, sizeof (flags)); |
33f7f353 JR |
961 | flags.min_align = min_align; |
962 | flags.base_after_vec = rel > insn_shuid; | |
963 | flags.min_after_vec = min > insn_shuid; | |
964 | flags.max_after_vec = max > insn_shuid; | |
965 | flags.min_after_base = min > rel; | |
966 | flags.max_after_base = max > rel; | |
967 | ADDR_DIFF_VEC_FLAGS (pat) = flags; | |
fc470718 R |
968 | } |
969 | } | |
33f7f353 | 970 | #endif /* CASE_VECTOR_SHORTEN_MODE */ |
3cf2715d | 971 | |
3cf2715d | 972 | /* Compute initial lengths, addresses, and varying flags for each insn. */ |
b816f339 | 973 | for (insn_current_address = 0, insn = first; |
3cf2715d DE |
974 | insn != 0; |
975 | insn_current_address += insn_lengths[uid], insn = NEXT_INSN (insn)) | |
976 | { | |
977 | uid = INSN_UID (insn); | |
fc470718 | 978 | |
3cf2715d | 979 | insn_lengths[uid] = 0; |
fc470718 | 980 | |
4b4bf941 | 981 | if (LABEL_P (insn)) |
fc470718 R |
982 | { |
983 | int log = LABEL_TO_ALIGNMENT (insn); | |
984 | if (log) | |
985 | { | |
986 | int align = 1 << log; | |
ecb06768 | 987 | int new_address = (insn_current_address + align - 1) & -align; |
fc470718 | 988 | insn_lengths[uid] = new_address - insn_current_address; |
fc470718 R |
989 | } |
990 | } | |
991 | ||
5a09edba | 992 | INSN_ADDRESSES (uid) = insn_current_address + insn_lengths[uid]; |
f5d927c0 | 993 | |
4b4bf941 JQ |
994 | if (NOTE_P (insn) || BARRIER_P (insn) |
995 | || LABEL_P (insn)) | |
3cf2715d | 996 | continue; |
04da53bd R |
997 | if (INSN_DELETED_P (insn)) |
998 | continue; | |
3cf2715d DE |
999 | |
1000 | body = PATTERN (insn); | |
1001 | if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC) | |
5a32a90c JR |
1002 | { |
1003 | /* This only takes room if read-only data goes into the text | |
1004 | section. */ | |
d48bc59a | 1005 | if (JUMP_TABLES_IN_TEXT_SECTION || !HAVE_READONLY_DATA_SECTION) |
75197b37 BS |
1006 | insn_lengths[uid] = (XVECLEN (body, |
1007 | GET_CODE (body) == ADDR_DIFF_VEC) | |
1008 | * GET_MODE_SIZE (GET_MODE (body))); | |
5a32a90c | 1009 | /* Alignment is handled by ADDR_VEC_ALIGN. */ |
5a32a90c | 1010 | } |
a30caf5c | 1011 | else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0) |
3cf2715d DE |
1012 | insn_lengths[uid] = asm_insn_count (body) * insn_default_length (insn); |
1013 | else if (GET_CODE (body) == SEQUENCE) | |
1014 | { | |
1015 | int i; | |
1016 | int const_delay_slots; | |
1017 | #ifdef DELAY_SLOTS | |
1018 | const_delay_slots = const_num_delay_slots (XVECEXP (body, 0, 0)); | |
1019 | #else | |
1020 | const_delay_slots = 0; | |
1021 | #endif | |
1022 | /* Inside a delay slot sequence, we do not do any branch shortening | |
1023 | if the shortening could change the number of delay slots | |
0f41302f | 1024 | of the branch. */ |
3cf2715d DE |
1025 | for (i = 0; i < XVECLEN (body, 0); i++) |
1026 | { | |
1027 | rtx inner_insn = XVECEXP (body, 0, i); | |
1028 | int inner_uid = INSN_UID (inner_insn); | |
1029 | int inner_length; | |
1030 | ||
a30caf5c DC |
1031 | if (GET_CODE (body) == ASM_INPUT |
1032 | || asm_noperands (PATTERN (XVECEXP (body, 0, i))) >= 0) | |
3cf2715d DE |
1033 | inner_length = (asm_insn_count (PATTERN (inner_insn)) |
1034 | * insn_default_length (inner_insn)); | |
1035 | else | |
1036 | inner_length = insn_default_length (inner_insn); | |
f5d927c0 | 1037 | |
3cf2715d DE |
1038 | insn_lengths[inner_uid] = inner_length; |
1039 | if (const_delay_slots) | |
1040 | { | |
1041 | if ((varying_length[inner_uid] | |
1042 | = insn_variable_length_p (inner_insn)) != 0) | |
1043 | varying_length[uid] = 1; | |
9d98a694 AO |
1044 | INSN_ADDRESSES (inner_uid) = (insn_current_address |
1045 | + insn_lengths[uid]); | |
3cf2715d DE |
1046 | } |
1047 | else | |
1048 | varying_length[inner_uid] = 0; | |
1049 | insn_lengths[uid] += inner_length; | |
1050 | } | |
1051 | } | |
1052 | else if (GET_CODE (body) != USE && GET_CODE (body) != CLOBBER) | |
1053 | { | |
1054 | insn_lengths[uid] = insn_default_length (insn); | |
1055 | varying_length[uid] = insn_variable_length_p (insn); | |
1056 | } | |
1057 | ||
1058 | /* If needed, do any adjustment. */ | |
1059 | #ifdef ADJUST_INSN_LENGTH | |
1060 | ADJUST_INSN_LENGTH (insn, insn_lengths[uid]); | |
04b6000c | 1061 | if (insn_lengths[uid] < 0) |
c725bd79 | 1062 | fatal_insn ("negative insn length", insn); |
3cf2715d DE |
1063 | #endif |
1064 | } | |
1065 | ||
1066 | /* Now loop over all the insns finding varying length insns. For each, | |
1067 | get the current insn length. If it has changed, reflect the change. | |
1068 | When nothing changes for a full pass, we are done. */ | |
1069 | ||
1070 | while (something_changed) | |
1071 | { | |
1072 | something_changed = 0; | |
fc470718 | 1073 | insn_current_align = MAX_CODE_ALIGN - 1; |
b816f339 | 1074 | for (insn_current_address = 0, insn = first; |
3cf2715d DE |
1075 | insn != 0; |
1076 | insn = NEXT_INSN (insn)) | |
1077 | { | |
1078 | int new_length; | |
b729186a | 1079 | #ifdef ADJUST_INSN_LENGTH |
3cf2715d | 1080 | int tmp_length; |
b729186a | 1081 | #endif |
fc470718 | 1082 | int length_align; |
3cf2715d DE |
1083 | |
1084 | uid = INSN_UID (insn); | |
fc470718 | 1085 | |
4b4bf941 | 1086 | if (LABEL_P (insn)) |
fc470718 R |
1087 | { |
1088 | int log = LABEL_TO_ALIGNMENT (insn); | |
1089 | if (log > insn_current_align) | |
1090 | { | |
1091 | int align = 1 << log; | |
ecb06768 | 1092 | int new_address= (insn_current_address + align - 1) & -align; |
fc470718 R |
1093 | insn_lengths[uid] = new_address - insn_current_address; |
1094 | insn_current_align = log; | |
1095 | insn_current_address = new_address; | |
1096 | } | |
1097 | else | |
1098 | insn_lengths[uid] = 0; | |
9d98a694 | 1099 | INSN_ADDRESSES (uid) = insn_current_address; |
fc470718 R |
1100 | continue; |
1101 | } | |
1102 | ||
1103 | length_align = INSN_LENGTH_ALIGNMENT (insn); | |
1104 | if (length_align < insn_current_align) | |
1105 | insn_current_align = length_align; | |
1106 | ||
9d98a694 AO |
1107 | insn_last_address = INSN_ADDRESSES (uid); |
1108 | INSN_ADDRESSES (uid) = insn_current_address; | |
fc470718 | 1109 | |
5e75ef4a | 1110 | #ifdef CASE_VECTOR_SHORTEN_MODE |
4b4bf941 | 1111 | if (optimize && JUMP_P (insn) |
33f7f353 JR |
1112 | && GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC) |
1113 | { | |
33f7f353 JR |
1114 | rtx body = PATTERN (insn); |
1115 | int old_length = insn_lengths[uid]; | |
1116 | rtx rel_lab = XEXP (XEXP (body, 0), 0); | |
1117 | rtx min_lab = XEXP (XEXP (body, 2), 0); | |
1118 | rtx max_lab = XEXP (XEXP (body, 3), 0); | |
9d98a694 AO |
1119 | int rel_addr = INSN_ADDRESSES (INSN_UID (rel_lab)); |
1120 | int min_addr = INSN_ADDRESSES (INSN_UID (min_lab)); | |
1121 | int max_addr = INSN_ADDRESSES (INSN_UID (max_lab)); | |
33f7f353 JR |
1122 | rtx prev; |
1123 | int rel_align = 0; | |
950a3816 KG |
1124 | addr_diff_vec_flags flags; |
1125 | ||
1126 | /* Avoid automatic aggregate initialization. */ | |
1127 | flags = ADDR_DIFF_VEC_FLAGS (body); | |
33f7f353 JR |
1128 | |
1129 | /* Try to find a known alignment for rel_lab. */ | |
1130 | for (prev = rel_lab; | |
1131 | prev | |
1132 | && ! insn_lengths[INSN_UID (prev)] | |
1133 | && ! (varying_length[INSN_UID (prev)] & 1); | |
1134 | prev = PREV_INSN (prev)) | |
1135 | if (varying_length[INSN_UID (prev)] & 2) | |
1136 | { | |
1137 | rel_align = LABEL_TO_ALIGNMENT (prev); | |
1138 | break; | |
1139 | } | |
1140 | ||
1141 | /* See the comment on addr_diff_vec_flags in rtl.h for the | |
1142 | meaning of the flags values. base: REL_LAB vec: INSN */ | |
1143 | /* Anything after INSN has still addresses from the last | |
1144 | pass; adjust these so that they reflect our current | |
1145 | estimate for this pass. */ | |
1146 | if (flags.base_after_vec) | |
1147 | rel_addr += insn_current_address - insn_last_address; | |
1148 | if (flags.min_after_vec) | |
1149 | min_addr += insn_current_address - insn_last_address; | |
1150 | if (flags.max_after_vec) | |
1151 | max_addr += insn_current_address - insn_last_address; | |
1152 | /* We want to know the worst case, i.e. lowest possible value | |
1153 | for the offset of MIN_LAB. If MIN_LAB is after REL_LAB, | |
1154 | its offset is positive, and we have to be wary of code shrink; | |
1155 | otherwise, it is negative, and we have to be vary of code | |
1156 | size increase. */ | |
1157 | if (flags.min_after_base) | |
1158 | { | |
1159 | /* If INSN is between REL_LAB and MIN_LAB, the size | |
1160 | changes we are about to make can change the alignment | |
1161 | within the observed offset, therefore we have to break | |
1162 | it up into two parts that are independent. */ | |
1163 | if (! flags.base_after_vec && flags.min_after_vec) | |
1164 | { | |
1165 | min_addr -= align_fuzz (rel_lab, insn, rel_align, 0); | |
1166 | min_addr -= align_fuzz (insn, min_lab, 0, 0); | |
1167 | } | |
1168 | else | |
1169 | min_addr -= align_fuzz (rel_lab, min_lab, rel_align, 0); | |
1170 | } | |
1171 | else | |
1172 | { | |
1173 | if (flags.base_after_vec && ! flags.min_after_vec) | |
1174 | { | |
1175 | min_addr -= align_fuzz (min_lab, insn, 0, ~0); | |
1176 | min_addr -= align_fuzz (insn, rel_lab, 0, ~0); | |
1177 | } | |
1178 | else | |
1179 | min_addr -= align_fuzz (min_lab, rel_lab, 0, ~0); | |
1180 | } | |
1181 | /* Likewise, determine the highest lowest possible value | |
1182 | for the offset of MAX_LAB. */ | |
1183 | if (flags.max_after_base) | |
1184 | { | |
1185 | if (! flags.base_after_vec && flags.max_after_vec) | |
1186 | { | |
1187 | max_addr += align_fuzz (rel_lab, insn, rel_align, ~0); | |
1188 | max_addr += align_fuzz (insn, max_lab, 0, ~0); | |
1189 | } | |
1190 | else | |
1191 | max_addr += align_fuzz (rel_lab, max_lab, rel_align, ~0); | |
1192 | } | |
1193 | else | |
1194 | { | |
1195 | if (flags.base_after_vec && ! flags.max_after_vec) | |
1196 | { | |
1197 | max_addr += align_fuzz (max_lab, insn, 0, 0); | |
1198 | max_addr += align_fuzz (insn, rel_lab, 0, 0); | |
1199 | } | |
1200 | else | |
1201 | max_addr += align_fuzz (max_lab, rel_lab, 0, 0); | |
1202 | } | |
1203 | PUT_MODE (body, CASE_VECTOR_SHORTEN_MODE (min_addr - rel_addr, | |
1204 | max_addr - rel_addr, | |
1205 | body)); | |
d48bc59a | 1206 | if (JUMP_TABLES_IN_TEXT_SECTION || !HAVE_READONLY_DATA_SECTION) |
75197b37 BS |
1207 | { |
1208 | insn_lengths[uid] | |
1209 | = (XVECLEN (body, 1) * GET_MODE_SIZE (GET_MODE (body))); | |
1210 | insn_current_address += insn_lengths[uid]; | |
1211 | if (insn_lengths[uid] != old_length) | |
1212 | something_changed = 1; | |
1213 | } | |
1214 | ||
33f7f353 | 1215 | continue; |
33f7f353 | 1216 | } |
5e75ef4a JL |
1217 | #endif /* CASE_VECTOR_SHORTEN_MODE */ |
1218 | ||
1219 | if (! (varying_length[uid])) | |
3cf2715d | 1220 | { |
4b4bf941 | 1221 | if (NONJUMP_INSN_P (insn) |
674fc07d GS |
1222 | && GET_CODE (PATTERN (insn)) == SEQUENCE) |
1223 | { | |
1224 | int i; | |
1225 | ||
1226 | body = PATTERN (insn); | |
1227 | for (i = 0; i < XVECLEN (body, 0); i++) | |
1228 | { | |
1229 | rtx inner_insn = XVECEXP (body, 0, i); | |
1230 | int inner_uid = INSN_UID (inner_insn); | |
1231 | ||
1232 | INSN_ADDRESSES (inner_uid) = insn_current_address; | |
1233 | ||
1234 | insn_current_address += insn_lengths[inner_uid]; | |
1235 | } | |
dd3f0101 | 1236 | } |
674fc07d GS |
1237 | else |
1238 | insn_current_address += insn_lengths[uid]; | |
1239 | ||
3cf2715d DE |
1240 | continue; |
1241 | } | |
674fc07d | 1242 | |
4b4bf941 | 1243 | if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE) |
3cf2715d DE |
1244 | { |
1245 | int i; | |
f5d927c0 | 1246 | |
3cf2715d DE |
1247 | body = PATTERN (insn); |
1248 | new_length = 0; | |
1249 | for (i = 0; i < XVECLEN (body, 0); i++) | |
1250 | { | |
1251 | rtx inner_insn = XVECEXP (body, 0, i); | |
1252 | int inner_uid = INSN_UID (inner_insn); | |
1253 | int inner_length; | |
1254 | ||
9d98a694 | 1255 | INSN_ADDRESSES (inner_uid) = insn_current_address; |
3cf2715d DE |
1256 | |
1257 | /* insn_current_length returns 0 for insns with a | |
1258 | non-varying length. */ | |
1259 | if (! varying_length[inner_uid]) | |
1260 | inner_length = insn_lengths[inner_uid]; | |
1261 | else | |
1262 | inner_length = insn_current_length (inner_insn); | |
1263 | ||
1264 | if (inner_length != insn_lengths[inner_uid]) | |
1265 | { | |
1266 | insn_lengths[inner_uid] = inner_length; | |
1267 | something_changed = 1; | |
1268 | } | |
1269 | insn_current_address += insn_lengths[inner_uid]; | |
1270 | new_length += inner_length; | |
1271 | } | |
1272 | } | |
1273 | else | |
1274 | { | |
1275 | new_length = insn_current_length (insn); | |
1276 | insn_current_address += new_length; | |
1277 | } | |
1278 | ||
3cf2715d DE |
1279 | #ifdef ADJUST_INSN_LENGTH |
1280 | /* If needed, do any adjustment. */ | |
1281 | tmp_length = new_length; | |
1282 | ADJUST_INSN_LENGTH (insn, new_length); | |
1283 | insn_current_address += (new_length - tmp_length); | |
3cf2715d DE |
1284 | #endif |
1285 | ||
1286 | if (new_length != insn_lengths[uid]) | |
1287 | { | |
1288 | insn_lengths[uid] = new_length; | |
1289 | something_changed = 1; | |
1290 | } | |
1291 | } | |
bb4aaf18 TG |
1292 | /* For a non-optimizing compile, do only a single pass. */ |
1293 | if (!optimize) | |
1294 | break; | |
3cf2715d | 1295 | } |
fc470718 R |
1296 | |
1297 | free (varying_length); | |
1298 | ||
3cf2715d DE |
1299 | #endif /* HAVE_ATTR_length */ |
1300 | } | |
1301 | ||
1302 | #ifdef HAVE_ATTR_length | |
1303 | /* Given the body of an INSN known to be generated by an ASM statement, return | |
1304 | the number of machine instructions likely to be generated for this insn. | |
1305 | This is used to compute its length. */ | |
1306 | ||
1307 | static int | |
6cf9ac28 | 1308 | asm_insn_count (rtx body) |
3cf2715d | 1309 | { |
3cce094d | 1310 | const char *template; |
3cf2715d DE |
1311 | int count = 1; |
1312 | ||
5d0930ea DE |
1313 | if (GET_CODE (body) == ASM_INPUT) |
1314 | template = XSTR (body, 0); | |
1315 | else | |
df4ae160 | 1316 | template = decode_asm_operands (body, NULL, NULL, NULL, NULL); |
5d0930ea | 1317 | |
f5d927c0 KH |
1318 | for (; *template; template++) |
1319 | if (IS_ASM_LOGICAL_LINE_SEPARATOR (*template) || *template == '\n') | |
3cf2715d DE |
1320 | count++; |
1321 | ||
1322 | return count; | |
1323 | } | |
1324 | #endif | |
1325 | \f | |
1326 | /* Output assembler code for the start of a function, | |
1327 | and initialize some of the variables in this file | |
1328 | for the new function. The label for the function and associated | |
1329 | assembler pseudo-ops have already been output in `assemble_start_function'. | |
1330 | ||
1331 | FIRST is the first insn of the rtl for the function being compiled. | |
1332 | FILE is the file to write assembler code to. | |
1333 | OPTIMIZE is nonzero if we should eliminate redundant | |
1334 | test and compare insns. */ | |
1335 | ||
1336 | void | |
6cf9ac28 AJ |
1337 | final_start_function (rtx first ATTRIBUTE_UNUSED, FILE *file, |
1338 | int optimize ATTRIBUTE_UNUSED) | |
3cf2715d DE |
1339 | { |
1340 | block_depth = 0; | |
1341 | ||
1342 | this_is_asm_operands = 0; | |
1343 | ||
9ae130f8 JH |
1344 | last_filename = locator_file (prologue_locator); |
1345 | last_linenum = locator_line (prologue_locator); | |
1346 | ||
653e276c | 1347 | high_block_linenum = high_function_linenum = last_linenum; |
eac40081 | 1348 | |
653e276c | 1349 | (*debug_hooks->begin_prologue) (last_linenum, last_filename); |
d291dd49 | 1350 | |
951120ea | 1351 | #if defined (DWARF2_UNWIND_INFO) || defined (TARGET_UNWIND_INFO) |
7a0c8d71 | 1352 | if (write_symbols != DWARF2_DEBUG && write_symbols != VMS_AND_DWARF2_DEBUG) |
653e276c | 1353 | dwarf2out_begin_prologue (0, NULL); |
f5d927c0 | 1354 | #endif |
3cf2715d DE |
1355 | |
1356 | #ifdef LEAF_REG_REMAP | |
54ff41b7 | 1357 | if (current_function_uses_only_leaf_regs) |
3cf2715d DE |
1358 | leaf_renumber_regs (first); |
1359 | #endif | |
1360 | ||
1361 | /* The Sun386i and perhaps other machines don't work right | |
1362 | if the profiling code comes after the prologue. */ | |
1363 | #ifdef PROFILE_BEFORE_PROLOGUE | |
70f4f91c | 1364 | if (current_function_profile) |
3cf2715d DE |
1365 | profile_function (file); |
1366 | #endif /* PROFILE_BEFORE_PROLOGUE */ | |
1367 | ||
0021b564 JM |
1368 | #if defined (DWARF2_UNWIND_INFO) && defined (HAVE_prologue) |
1369 | if (dwarf2out_do_frame ()) | |
e0c0490b | 1370 | dwarf2out_frame_debug (NULL_RTX, false); |
0021b564 JM |
1371 | #endif |
1372 | ||
18c038b9 MM |
1373 | /* If debugging, assign block numbers to all of the blocks in this |
1374 | function. */ | |
1375 | if (write_symbols) | |
1376 | { | |
3ac79482 | 1377 | remove_unnecessary_notes (); |
0435312e | 1378 | reemit_insn_block_notes (); |
a20612aa | 1379 | number_blocks (current_function_decl); |
18c038b9 MM |
1380 | /* We never actually put out begin/end notes for the top-level |
1381 | block in the function. But, conceptually, that block is | |
1382 | always needed. */ | |
1383 | TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl)) = 1; | |
1384 | } | |
1385 | ||
3cf2715d | 1386 | /* First output the function prologue: code to set up the stack frame. */ |
5fd9b178 | 1387 | targetm.asm_out.function_prologue (file, get_frame_size ()); |
3cf2715d | 1388 | |
3cf2715d DE |
1389 | /* If the machine represents the prologue as RTL, the profiling code must |
1390 | be emitted when NOTE_INSN_PROLOGUE_END is scanned. */ | |
1391 | #ifdef HAVE_prologue | |
1392 | if (! HAVE_prologue) | |
1393 | #endif | |
1394 | profile_after_prologue (file); | |
3cf2715d DE |
1395 | } |
1396 | ||
1397 | static void | |
6cf9ac28 | 1398 | profile_after_prologue (FILE *file ATTRIBUTE_UNUSED) |
3cf2715d | 1399 | { |
3cf2715d | 1400 | #ifndef PROFILE_BEFORE_PROLOGUE |
70f4f91c | 1401 | if (current_function_profile) |
3cf2715d DE |
1402 | profile_function (file); |
1403 | #endif /* not PROFILE_BEFORE_PROLOGUE */ | |
1404 | } | |
1405 | ||
1406 | static void | |
6cf9ac28 | 1407 | profile_function (FILE *file ATTRIBUTE_UNUSED) |
3cf2715d | 1408 | { |
dcacfa04 | 1409 | #ifndef NO_PROFILE_COUNTERS |
9739c90c | 1410 | # define NO_PROFILE_COUNTERS 0 |
dcacfa04 | 1411 | #endif |
b729186a | 1412 | #if defined(ASM_OUTPUT_REG_PUSH) |
3cf2715d | 1413 | int sval = current_function_returns_struct; |
61f71b34 | 1414 | rtx svrtx = targetm.calls.struct_value_rtx (TREE_TYPE (current_function_decl), 1); |
b729186a | 1415 | #if defined(STATIC_CHAIN_INCOMING_REGNUM) || defined(STATIC_CHAIN_REGNUM) |
6de9cd9a | 1416 | int cxt = cfun->static_chain_decl != NULL; |
b729186a JL |
1417 | #endif |
1418 | #endif /* ASM_OUTPUT_REG_PUSH */ | |
3cf2715d | 1419 | |
9739c90c JJ |
1420 | if (! NO_PROFILE_COUNTERS) |
1421 | { | |
1422 | int align = MIN (BIGGEST_ALIGNMENT, LONG_TYPE_SIZE); | |
1423 | data_section (); | |
1424 | ASM_OUTPUT_ALIGN (file, floor_log2 (align / BITS_PER_UNIT)); | |
5fd9b178 | 1425 | targetm.asm_out.internal_label (file, "LP", current_function_funcdef_no); |
9739c90c JJ |
1426 | assemble_integer (const0_rtx, LONG_TYPE_SIZE / BITS_PER_UNIT, align, 1); |
1427 | } | |
3cf2715d | 1428 | |
499df339 | 1429 | function_section (current_function_decl); |
3cf2715d | 1430 | |
61f71b34 | 1431 | #if defined(ASM_OUTPUT_REG_PUSH) |
f8cfc6aa | 1432 | if (sval && svrtx != NULL_RTX && REG_P (svrtx)) |
61f71b34 | 1433 | ASM_OUTPUT_REG_PUSH (file, REGNO (svrtx)); |
3cf2715d DE |
1434 | #endif |
1435 | ||
65ed39df | 1436 | #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH) |
3cf2715d DE |
1437 | if (cxt) |
1438 | ASM_OUTPUT_REG_PUSH (file, STATIC_CHAIN_INCOMING_REGNUM); | |
1439 | #else | |
65ed39df | 1440 | #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH) |
3cf2715d | 1441 | if (cxt) |
51723711 KG |
1442 | { |
1443 | ASM_OUTPUT_REG_PUSH (file, STATIC_CHAIN_REGNUM); | |
1444 | } | |
3cf2715d DE |
1445 | #endif |
1446 | #endif | |
3cf2715d | 1447 | |
df696a75 | 1448 | FUNCTION_PROFILER (file, current_function_funcdef_no); |
3cf2715d | 1449 | |
65ed39df | 1450 | #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH) |
3cf2715d DE |
1451 | if (cxt) |
1452 | ASM_OUTPUT_REG_POP (file, STATIC_CHAIN_INCOMING_REGNUM); | |
1453 | #else | |
65ed39df | 1454 | #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH) |
3cf2715d | 1455 | if (cxt) |
51723711 KG |
1456 | { |
1457 | ASM_OUTPUT_REG_POP (file, STATIC_CHAIN_REGNUM); | |
1458 | } | |
3cf2715d DE |
1459 | #endif |
1460 | #endif | |
3cf2715d | 1461 | |
61f71b34 | 1462 | #if defined(ASM_OUTPUT_REG_PUSH) |
f8cfc6aa | 1463 | if (sval && svrtx != NULL_RTX && REG_P (svrtx)) |
61f71b34 | 1464 | ASM_OUTPUT_REG_POP (file, REGNO (svrtx)); |
3cf2715d DE |
1465 | #endif |
1466 | } | |
1467 | ||
1468 | /* Output assembler code for the end of a function. | |
1469 | For clarity, args are same as those of `final_start_function' | |
1470 | even though not all of them are needed. */ | |
1471 | ||
1472 | void | |
6cf9ac28 | 1473 | final_end_function (void) |
3cf2715d | 1474 | { |
be1bb652 | 1475 | app_disable (); |
3cf2715d | 1476 | |
e2a12aca | 1477 | (*debug_hooks->end_function) (high_function_linenum); |
3cf2715d | 1478 | |
3cf2715d DE |
1479 | /* Finally, output the function epilogue: |
1480 | code to restore the stack frame and return to the caller. */ | |
5fd9b178 | 1481 | targetm.asm_out.function_epilogue (asm_out_file, get_frame_size ()); |
3cf2715d | 1482 | |
e2a12aca | 1483 | /* And debug output. */ |
702ada3d | 1484 | (*debug_hooks->end_epilogue) (last_linenum, last_filename); |
3cf2715d | 1485 | |
e2a12aca | 1486 | #if defined (DWARF2_UNWIND_INFO) |
7a0c8d71 DR |
1487 | if (write_symbols != DWARF2_DEBUG && write_symbols != VMS_AND_DWARF2_DEBUG |
1488 | && dwarf2out_do_frame ()) | |
702ada3d | 1489 | dwarf2out_end_epilogue (last_linenum, last_filename); |
9a666dda | 1490 | #endif |
3cf2715d DE |
1491 | } |
1492 | \f | |
3cf2715d DE |
1493 | /* Output assembler code for some insns: all or part of a function. |
1494 | For description of args, see `final_start_function', above. | |
1495 | ||
1496 | PRESCAN is 1 if we are not really outputting, | |
1497 | just scanning as if we were outputting. | |
1498 | Prescanning deletes and rearranges insns just like ordinary output. | |
1499 | PRESCAN is -2 if we are outputting after having prescanned. | |
1500 | In this case, don't try to delete or rearrange insns | |
1501 | because that has already been done. | |
1502 | Prescanning is done only on certain machines. */ | |
1503 | ||
1504 | void | |
6cf9ac28 | 1505 | final (rtx first, FILE *file, int optimize, int prescan) |
3cf2715d | 1506 | { |
b3694847 | 1507 | rtx insn; |
a8c3510c | 1508 | int max_uid = 0; |
589fe865 | 1509 | int seen = 0; |
3cf2715d DE |
1510 | |
1511 | last_ignored_compare = 0; | |
3cf2715d | 1512 | |
589fe865 DJ |
1513 | #ifdef SDB_DEBUGGING_INFO |
1514 | /* When producing SDB debugging info, delete troublesome line number | |
3cf2715d DE |
1515 | notes from inlined functions in other files as well as duplicate |
1516 | line number notes. */ | |
3cf2715d DE |
1517 | if (write_symbols == SDB_DEBUG) |
1518 | { | |
1519 | rtx last = 0; | |
1520 | for (insn = first; insn; insn = NEXT_INSN (insn)) | |
4b4bf941 | 1521 | if (NOTE_P (insn) && NOTE_LINE_NUMBER (insn) > 0) |
3cf2715d | 1522 | { |
6de9cd9a | 1523 | if (last != 0 |
6773e15f PB |
1524 | #ifdef USE_MAPPED_LOCATION |
1525 | && NOTE_SOURCE_LOCATION (insn) == NOTE_SOURCE_LOCATION (last) | |
1526 | #else | |
6de9cd9a | 1527 | && NOTE_LINE_NUMBER (insn) == NOTE_LINE_NUMBER (last) |
6773e15f | 1528 | && NOTE_SOURCE_FILE (insn) == NOTE_SOURCE_FILE (last) |
d70dc103 | 1529 | #endif |
6773e15f | 1530 | ) |
3cf2715d | 1531 | { |
2e106602 | 1532 | delete_insn (insn); /* Use delete_note. */ |
3cf2715d DE |
1533 | continue; |
1534 | } | |
1535 | last = insn; | |
3cf2715d DE |
1536 | } |
1537 | } | |
3cf2715d | 1538 | #endif |
3cf2715d DE |
1539 | |
1540 | for (insn = first; insn; insn = NEXT_INSN (insn)) | |
a8c3510c | 1541 | { |
938d968e | 1542 | if (INSN_UID (insn) > max_uid) /* Find largest UID. */ |
f5d927c0 | 1543 | max_uid = INSN_UID (insn); |
9ef4c6ef JC |
1544 | #ifdef HAVE_cc0 |
1545 | /* If CC tracking across branches is enabled, record the insn which | |
1546 | jumps to each branch only reached from one place. */ | |
4b4bf941 | 1547 | if (optimize && JUMP_P (insn)) |
9ef4c6ef JC |
1548 | { |
1549 | rtx lab = JUMP_LABEL (insn); | |
1550 | if (lab && LABEL_NUSES (lab) == 1) | |
1551 | { | |
1552 | LABEL_REFS (lab) = insn; | |
1553 | } | |
1554 | } | |
1555 | #endif | |
a8c3510c AM |
1556 | } |
1557 | ||
3cf2715d DE |
1558 | init_recog (); |
1559 | ||
1560 | CC_STATUS_INIT; | |
1561 | ||
1562 | /* Output the insns. */ | |
1563 | for (insn = NEXT_INSN (first); insn;) | |
2f16edb1 TG |
1564 | { |
1565 | #ifdef HAVE_ATTR_length | |
b9f22704 | 1566 | if ((unsigned) INSN_UID (insn) >= INSN_ADDRESSES_SIZE ()) |
0ac76ad9 | 1567 | { |
0ac76ad9 RH |
1568 | /* This can be triggered by bugs elsewhere in the compiler if |
1569 | new insns are created after init_insn_lengths is called. */ | |
0bccc606 NS |
1570 | gcc_assert (NOTE_P (insn)); |
1571 | insn_current_address = -1; | |
0ac76ad9 RH |
1572 | } |
1573 | else | |
9d98a694 | 1574 | insn_current_address = INSN_ADDRESSES (INSN_UID (insn)); |
0ac76ad9 RH |
1575 | #endif /* HAVE_ATTR_length */ |
1576 | ||
589fe865 | 1577 | insn = final_scan_insn (insn, file, optimize, prescan, 0, &seen); |
2f16edb1 | 1578 | } |
3cf2715d DE |
1579 | } |
1580 | \f | |
4bbf910e | 1581 | const char * |
6cf9ac28 | 1582 | get_insn_template (int code, rtx insn) |
4bbf910e | 1583 | { |
4bbf910e RH |
1584 | switch (insn_data[code].output_format) |
1585 | { | |
1586 | case INSN_OUTPUT_FORMAT_SINGLE: | |
3897f229 | 1587 | return insn_data[code].output.single; |
4bbf910e | 1588 | case INSN_OUTPUT_FORMAT_MULTI: |
3897f229 | 1589 | return insn_data[code].output.multi[which_alternative]; |
4bbf910e | 1590 | case INSN_OUTPUT_FORMAT_FUNCTION: |
0bccc606 | 1591 | gcc_assert (insn); |
3897f229 | 1592 | return (*insn_data[code].output.function) (recog_data.operand, insn); |
4bbf910e RH |
1593 | |
1594 | default: | |
0bccc606 | 1595 | gcc_unreachable (); |
4bbf910e RH |
1596 | } |
1597 | } | |
f5d927c0 | 1598 | |
0dc36574 ZW |
1599 | /* Emit the appropriate declaration for an alternate-entry-point |
1600 | symbol represented by INSN, to FILE. INSN is a CODE_LABEL with | |
1601 | LABEL_KIND != LABEL_NORMAL. | |
1602 | ||
1603 | The case fall-through in this function is intentional. */ | |
1604 | static void | |
6cf9ac28 | 1605 | output_alternate_entry_point (FILE *file, rtx insn) |
0dc36574 ZW |
1606 | { |
1607 | const char *name = LABEL_NAME (insn); | |
1608 | ||
1609 | switch (LABEL_KIND (insn)) | |
1610 | { | |
1611 | case LABEL_WEAK_ENTRY: | |
1612 | #ifdef ASM_WEAKEN_LABEL | |
1613 | ASM_WEAKEN_LABEL (file, name); | |
1614 | #endif | |
1615 | case LABEL_GLOBAL_ENTRY: | |
5fd9b178 | 1616 | targetm.asm_out.globalize_label (file, name); |
0dc36574 | 1617 | case LABEL_STATIC_ENTRY: |
905173eb ZW |
1618 | #ifdef ASM_OUTPUT_TYPE_DIRECTIVE |
1619 | ASM_OUTPUT_TYPE_DIRECTIVE (file, name, "function"); | |
1620 | #endif | |
0dc36574 ZW |
1621 | ASM_OUTPUT_LABEL (file, name); |
1622 | break; | |
1623 | ||
1624 | case LABEL_NORMAL: | |
1625 | default: | |
0bccc606 | 1626 | gcc_unreachable (); |
0dc36574 ZW |
1627 | } |
1628 | } | |
1629 | ||
750054a2 CT |
1630 | /* Return boolean indicating if there is a NOTE_INSN_UNLIKELY_EXECUTED_CODE |
1631 | note in the instruction chain (going forward) between the current | |
1632 | instruction, and the next 'executable' instruction. */ | |
1633 | ||
1634 | bool | |
1635 | scan_ahead_for_unlikely_executed_note (rtx insn) | |
1636 | { | |
1637 | rtx temp; | |
1638 | int bb_note_count = 0; | |
1639 | ||
1640 | for (temp = insn; temp; temp = NEXT_INSN (temp)) | |
1641 | { | |
4b4bf941 | 1642 | if (NOTE_P (temp) |
750054a2 CT |
1643 | && NOTE_LINE_NUMBER (temp) == NOTE_INSN_UNLIKELY_EXECUTED_CODE) |
1644 | return true; | |
4b4bf941 | 1645 | if (NOTE_P (temp) |
750054a2 CT |
1646 | && NOTE_LINE_NUMBER (temp) == NOTE_INSN_BASIC_BLOCK) |
1647 | { | |
1648 | bb_note_count++; | |
1649 | if (bb_note_count > 1) | |
1650 | return false; | |
1651 | } | |
1652 | if (INSN_P (temp)) | |
1653 | return false; | |
1654 | } | |
1655 | ||
1656 | return false; | |
1657 | } | |
1658 | ||
3cf2715d DE |
1659 | /* The final scan for one insn, INSN. |
1660 | Args are same as in `final', except that INSN | |
1661 | is the insn being scanned. | |
1662 | Value returned is the next insn to be scanned. | |
1663 | ||
ff8cea7e EB |
1664 | NOPEEPHOLES is the flag to disallow peephole processing (currently |
1665 | used for within delayed branch sequence output). | |
3cf2715d | 1666 | |
589fe865 DJ |
1667 | SEEN is used to track the end of the prologue, for emitting |
1668 | debug information. We force the emission of a line note after | |
1669 | both NOTE_INSN_PROLOGUE_END and NOTE_INSN_FUNCTION_BEG, or | |
1670 | at the beginning of the second basic block, whichever comes | |
1671 | first. */ | |
1672 | ||
5cfc5f84 | 1673 | rtx |
6cf9ac28 | 1674 | final_scan_insn (rtx insn, FILE *file, int optimize ATTRIBUTE_UNUSED, |
ff8cea7e EB |
1675 | int prescan, int nopeepholes ATTRIBUTE_UNUSED, |
1676 | int *seen) | |
3cf2715d | 1677 | { |
90ca38bb MM |
1678 | #ifdef HAVE_cc0 |
1679 | rtx set; | |
1680 | #endif | |
b2a6a2fb | 1681 | rtx next; |
90ca38bb | 1682 | |
3cf2715d DE |
1683 | insn_counter++; |
1684 | ||
1685 | /* Ignore deleted insns. These can occur when we split insns (due to a | |
1686 | template of "#") while not optimizing. */ | |
1687 | if (INSN_DELETED_P (insn)) | |
1688 | return NEXT_INSN (insn); | |
1689 | ||
1690 | switch (GET_CODE (insn)) | |
1691 | { | |
1692 | case NOTE: | |
1693 | if (prescan > 0) | |
1694 | break; | |
1695 | ||
be1bb652 RH |
1696 | switch (NOTE_LINE_NUMBER (insn)) |
1697 | { | |
1698 | case NOTE_INSN_DELETED: | |
1699 | case NOTE_INSN_LOOP_BEG: | |
1700 | case NOTE_INSN_LOOP_END: | |
be1bb652 | 1701 | case NOTE_INSN_FUNCTION_END: |
be1bb652 | 1702 | case NOTE_INSN_REPEATED_LINE_NUMBER: |
be1bb652 RH |
1703 | case NOTE_INSN_EXPECTED_VALUE: |
1704 | break; | |
3cf2715d | 1705 | |
750054a2 CT |
1706 | case NOTE_INSN_UNLIKELY_EXECUTED_CODE: |
1707 | ||
1708 | /* The presence of this note indicates that this basic block | |
1709 | belongs in the "cold" section of the .o file. If we are | |
1710 | not already writing to the cold section we need to change | |
1711 | to it. */ | |
1712 | ||
1713 | unlikely_text_section (); | |
1714 | break; | |
1715 | ||
be1bb652 | 1716 | case NOTE_INSN_BASIC_BLOCK: |
750054a2 | 1717 | |
2b8a92de | 1718 | /* If we are performing the optimization that partitions |
750054a2 CT |
1719 | basic blocks into hot & cold sections of the .o file, |
1720 | then at the start of each new basic block, before | |
1721 | beginning to write code for the basic block, we need to | |
1722 | check to see whether the basic block belongs in the hot | |
1723 | or cold section of the .o file, and change the section we | |
1724 | are writing to appropriately. */ | |
1725 | ||
1726 | if (flag_reorder_blocks_and_partition | |
750054a2 | 1727 | && !scan_ahead_for_unlikely_executed_note (insn)) |
9fb32434 | 1728 | function_section (current_function_decl); |
750054a2 | 1729 | |
951120ea PB |
1730 | #ifdef TARGET_UNWIND_INFO |
1731 | targetm.asm_out.unwind_emit (asm_out_file, insn); | |
ad0fc698 | 1732 | #endif |
951120ea | 1733 | |
be1bb652 RH |
1734 | if (flag_debug_asm) |
1735 | fprintf (asm_out_file, "\t%s basic block %d\n", | |
0b17ab2f | 1736 | ASM_COMMENT_START, NOTE_BASIC_BLOCK (insn)->index); |
589fe865 DJ |
1737 | |
1738 | if ((*seen & (SEEN_EMITTED | SEEN_BB)) == SEEN_BB) | |
1739 | { | |
1740 | *seen |= SEEN_EMITTED; | |
1741 | last_filename = NULL; | |
1742 | } | |
1743 | else | |
1744 | *seen |= SEEN_BB; | |
1745 | ||
be1bb652 | 1746 | break; |
3cf2715d | 1747 | |
be1bb652 | 1748 | case NOTE_INSN_EH_REGION_BEG: |
52a11cbf RH |
1749 | ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHB", |
1750 | NOTE_EH_HANDLER (insn)); | |
3d195391 | 1751 | break; |
3d195391 | 1752 | |
be1bb652 | 1753 | case NOTE_INSN_EH_REGION_END: |
52a11cbf RH |
1754 | ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHE", |
1755 | NOTE_EH_HANDLER (insn)); | |
3d195391 | 1756 | break; |
3d195391 | 1757 | |
be1bb652 | 1758 | case NOTE_INSN_PROLOGUE_END: |
5fd9b178 | 1759 | targetm.asm_out.function_end_prologue (file); |
3cf2715d | 1760 | profile_after_prologue (file); |
589fe865 DJ |
1761 | |
1762 | if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE) | |
1763 | { | |
1764 | *seen |= SEEN_EMITTED; | |
1765 | last_filename = NULL; | |
1766 | } | |
1767 | else | |
1768 | *seen |= SEEN_NOTE; | |
1769 | ||
3cf2715d | 1770 | break; |
3cf2715d | 1771 | |
be1bb652 | 1772 | case NOTE_INSN_EPILOGUE_BEG: |
5fd9b178 | 1773 | targetm.asm_out.function_begin_epilogue (file); |
be1bb652 | 1774 | break; |
3cf2715d | 1775 | |
be1bb652 | 1776 | case NOTE_INSN_FUNCTION_BEG: |
653e276c | 1777 | app_disable (); |
702ada3d | 1778 | (*debug_hooks->end_prologue) (last_linenum, last_filename); |
589fe865 DJ |
1779 | |
1780 | if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE) | |
1781 | { | |
1782 | *seen |= SEEN_EMITTED; | |
1783 | last_filename = NULL; | |
1784 | } | |
1785 | else | |
1786 | *seen |= SEEN_NOTE; | |
1787 | ||
3cf2715d | 1788 | break; |
be1bb652 RH |
1789 | |
1790 | case NOTE_INSN_BLOCK_BEG: | |
1791 | if (debug_info_level == DINFO_LEVEL_NORMAL | |
3cf2715d | 1792 | || debug_info_level == DINFO_LEVEL_VERBOSE |
7a0c8d71 DR |
1793 | || write_symbols == DWARF2_DEBUG |
1794 | || write_symbols == VMS_AND_DWARF2_DEBUG | |
1795 | || write_symbols == VMS_DEBUG) | |
be1bb652 RH |
1796 | { |
1797 | int n = BLOCK_NUMBER (NOTE_BLOCK (insn)); | |
3cf2715d | 1798 | |
be1bb652 RH |
1799 | app_disable (); |
1800 | ++block_depth; | |
1801 | high_block_linenum = last_linenum; | |
eac40081 | 1802 | |
a5a42b92 | 1803 | /* Output debugging info about the symbol-block beginning. */ |
e2a12aca | 1804 | (*debug_hooks->begin_block) (last_linenum, n); |
3cf2715d | 1805 | |
be1bb652 RH |
1806 | /* Mark this block as output. */ |
1807 | TREE_ASM_WRITTEN (NOTE_BLOCK (insn)) = 1; | |
1808 | } | |
1809 | break; | |
18c038b9 | 1810 | |
be1bb652 RH |
1811 | case NOTE_INSN_BLOCK_END: |
1812 | if (debug_info_level == DINFO_LEVEL_NORMAL | |
1813 | || debug_info_level == DINFO_LEVEL_VERBOSE | |
7a0c8d71 DR |
1814 | || write_symbols == DWARF2_DEBUG |
1815 | || write_symbols == VMS_AND_DWARF2_DEBUG | |
1816 | || write_symbols == VMS_DEBUG) | |
be1bb652 RH |
1817 | { |
1818 | int n = BLOCK_NUMBER (NOTE_BLOCK (insn)); | |
3cf2715d | 1819 | |
be1bb652 RH |
1820 | app_disable (); |
1821 | ||
1822 | /* End of a symbol-block. */ | |
1823 | --block_depth; | |
0bccc606 | 1824 | gcc_assert (block_depth >= 0); |
3cf2715d | 1825 | |
e2a12aca | 1826 | (*debug_hooks->end_block) (high_block_linenum, n); |
be1bb652 RH |
1827 | } |
1828 | break; | |
1829 | ||
1830 | case NOTE_INSN_DELETED_LABEL: | |
1831 | /* Emit the label. We may have deleted the CODE_LABEL because | |
1832 | the label could be proved to be unreachable, though still | |
1833 | referenced (in the form of having its address taken. */ | |
8215347e | 1834 | ASM_OUTPUT_DEBUG_LABEL (file, "L", CODE_LABEL_NUMBER (insn)); |
be1bb652 | 1835 | break; |
3cf2715d | 1836 | |
014a1138 JZ |
1837 | case NOTE_INSN_VAR_LOCATION: |
1838 | (*debug_hooks->var_location) (insn); | |
1839 | break; | |
1840 | ||
21835d9b JJ |
1841 | case 0: |
1842 | break; | |
1843 | ||
be1bb652 | 1844 | default: |
0bccc606 | 1845 | gcc_assert (NOTE_LINE_NUMBER (insn) > 0); |
f5d927c0 | 1846 | break; |
3cf2715d DE |
1847 | } |
1848 | break; | |
1849 | ||
1850 | case BARRIER: | |
f73ad30e | 1851 | #if defined (DWARF2_UNWIND_INFO) |
fbfa55b0 | 1852 | if (dwarf2out_do_frame ()) |
e0c0490b | 1853 | dwarf2out_frame_debug (insn, false); |
3cf2715d DE |
1854 | #endif |
1855 | break; | |
1856 | ||
1857 | case CODE_LABEL: | |
1dd8faa8 R |
1858 | /* The target port might emit labels in the output function for |
1859 | some insn, e.g. sh.c output_branchy_insn. */ | |
de7987a6 R |
1860 | if (CODE_LABEL_NUMBER (insn) <= max_labelno) |
1861 | { | |
1862 | int align = LABEL_TO_ALIGNMENT (insn); | |
50b2596f | 1863 | #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN |
9e423e6d | 1864 | int max_skip = LABEL_TO_MAX_SKIP (insn); |
50b2596f | 1865 | #endif |
fc470718 | 1866 | |
1dd8faa8 | 1867 | if (align && NEXT_INSN (insn)) |
40cdfca6 | 1868 | { |
9e423e6d | 1869 | #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN |
40cdfca6 | 1870 | ASM_OUTPUT_MAX_SKIP_ALIGN (file, align, max_skip); |
8e16ab99 SF |
1871 | #else |
1872 | #ifdef ASM_OUTPUT_ALIGN_WITH_NOP | |
1873 | ASM_OUTPUT_ALIGN_WITH_NOP (file, align); | |
9e423e6d | 1874 | #else |
40cdfca6 | 1875 | ASM_OUTPUT_ALIGN (file, align); |
8e16ab99 | 1876 | #endif |
9e423e6d | 1877 | #endif |
40cdfca6 | 1878 | } |
de7987a6 | 1879 | } |
9ef4c6ef | 1880 | #ifdef HAVE_cc0 |
3cf2715d | 1881 | CC_STATUS_INIT; |
9ef4c6ef JC |
1882 | /* If this label is reached from only one place, set the condition |
1883 | codes from the instruction just before the branch. */ | |
7ad7f828 JC |
1884 | |
1885 | /* Disabled because some insns set cc_status in the C output code | |
1886 | and NOTICE_UPDATE_CC alone can set incorrect status. */ | |
1887 | if (0 /* optimize && LABEL_NUSES (insn) == 1*/) | |
9ef4c6ef JC |
1888 | { |
1889 | rtx jump = LABEL_REFS (insn); | |
1890 | rtx barrier = prev_nonnote_insn (insn); | |
1891 | rtx prev; | |
1892 | /* If the LABEL_REFS field of this label has been set to point | |
1893 | at a branch, the predecessor of the branch is a regular | |
1894 | insn, and that branch is the only way to reach this label, | |
1895 | set the condition codes based on the branch and its | |
1896 | predecessor. */ | |
4b4bf941 JQ |
1897 | if (barrier && BARRIER_P (barrier) |
1898 | && jump && JUMP_P (jump) | |
9ef4c6ef | 1899 | && (prev = prev_nonnote_insn (jump)) |
4b4bf941 | 1900 | && NONJUMP_INSN_P (prev)) |
9ef4c6ef JC |
1901 | { |
1902 | NOTICE_UPDATE_CC (PATTERN (prev), prev); | |
1903 | NOTICE_UPDATE_CC (PATTERN (jump), jump); | |
1904 | } | |
1905 | } | |
1906 | #endif | |
3cf2715d DE |
1907 | if (prescan > 0) |
1908 | break; | |
03ffa171 | 1909 | |
e1772ac0 NB |
1910 | if (LABEL_NAME (insn)) |
1911 | (*debug_hooks->label) (insn); | |
1912 | ||
750054a2 CT |
1913 | /* If we are doing the optimization that partitions hot & cold |
1914 | basic blocks into separate sections of the .o file, we need | |
1915 | to ensure the jump table ends up in the correct section... */ | |
1916 | ||
9fb32434 CT |
1917 | if (flag_reorder_blocks_and_partition |
1918 | && targetm.have_named_sections) | |
750054a2 CT |
1919 | { |
1920 | rtx tmp_table, tmp_label; | |
4b4bf941 | 1921 | if (LABEL_P (insn) |
750054a2 CT |
1922 | && tablejump_p (NEXT_INSN (insn), &tmp_label, &tmp_table)) |
1923 | { | |
1924 | /* Do nothing; Do NOT change the current section. */ | |
1925 | } | |
1926 | else if (scan_ahead_for_unlikely_executed_note (insn)) | |
1927 | unlikely_text_section (); | |
9fb32434 CT |
1928 | else if (in_unlikely_text_section ()) |
1929 | function_section (current_function_decl); | |
750054a2 CT |
1930 | } |
1931 | ||
3cf2715d DE |
1932 | if (app_on) |
1933 | { | |
51723711 | 1934 | fputs (ASM_APP_OFF, file); |
3cf2715d DE |
1935 | app_on = 0; |
1936 | } | |
b2a6a2fb JJ |
1937 | |
1938 | next = next_nonnote_insn (insn); | |
1939 | if (next != 0 && JUMP_P (next)) | |
3cf2715d | 1940 | { |
b2a6a2fb | 1941 | rtx nextbody = PATTERN (next); |
3cf2715d DE |
1942 | |
1943 | /* If this label is followed by a jump-table, | |
1944 | make sure we put the label in the read-only section. Also | |
1945 | possibly write the label and jump table together. */ | |
1946 | ||
1947 | if (GET_CODE (nextbody) == ADDR_VEC | |
1948 | || GET_CODE (nextbody) == ADDR_DIFF_VEC) | |
1949 | { | |
e0d80184 DM |
1950 | #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC) |
1951 | /* In this case, the case vector is being moved by the | |
1952 | target, so don't output the label at all. Leave that | |
1953 | to the back end macros. */ | |
1954 | #else | |
75197b37 BS |
1955 | if (! JUMP_TABLES_IN_TEXT_SECTION) |
1956 | { | |
340f7e7c RH |
1957 | int log_align; |
1958 | ||
ab5c8549 | 1959 | targetm.asm_out.function_rodata_section (current_function_decl); |
340f7e7c RH |
1960 | |
1961 | #ifdef ADDR_VEC_ALIGN | |
b2a6a2fb | 1962 | log_align = ADDR_VEC_ALIGN (next); |
340f7e7c RH |
1963 | #else |
1964 | log_align = exact_log2 (BIGGEST_ALIGNMENT / BITS_PER_UNIT); | |
1965 | #endif | |
1966 | ASM_OUTPUT_ALIGN (file, log_align); | |
75197b37 BS |
1967 | } |
1968 | else | |
1969 | function_section (current_function_decl); | |
1970 | ||
3cf2715d DE |
1971 | #ifdef ASM_OUTPUT_CASE_LABEL |
1972 | ASM_OUTPUT_CASE_LABEL (file, "L", CODE_LABEL_NUMBER (insn), | |
b2a6a2fb | 1973 | next); |
3cf2715d | 1974 | #else |
5fd9b178 | 1975 | targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn)); |
e0d80184 | 1976 | #endif |
3cf2715d DE |
1977 | #endif |
1978 | break; | |
1979 | } | |
1980 | } | |
0dc36574 ZW |
1981 | if (LABEL_ALT_ENTRY_P (insn)) |
1982 | output_alternate_entry_point (file, insn); | |
8cd0faaf | 1983 | else |
5fd9b178 | 1984 | targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn)); |
3cf2715d DE |
1985 | break; |
1986 | ||
1987 | default: | |
1988 | { | |
b3694847 | 1989 | rtx body = PATTERN (insn); |
3cf2715d | 1990 | int insn_code_number; |
9b3142b3 | 1991 | const char *template; |
3cf2715d DE |
1992 | |
1993 | /* An INSN, JUMP_INSN or CALL_INSN. | |
1994 | First check for special kinds that recog doesn't recognize. */ | |
1995 | ||
6614fd40 | 1996 | if (GET_CODE (body) == USE /* These are just declarations. */ |
3cf2715d DE |
1997 | || GET_CODE (body) == CLOBBER) |
1998 | break; | |
1999 | ||
2000 | #ifdef HAVE_cc0 | |
4928181c SB |
2001 | { |
2002 | /* If there is a REG_CC_SETTER note on this insn, it means that | |
2003 | the setting of the condition code was done in the delay slot | |
2004 | of the insn that branched here. So recover the cc status | |
2005 | from the insn that set it. */ | |
3cf2715d | 2006 | |
4928181c SB |
2007 | rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX); |
2008 | if (note) | |
2009 | { | |
2010 | NOTICE_UPDATE_CC (PATTERN (XEXP (note, 0)), XEXP (note, 0)); | |
2011 | cc_prev_status = cc_status; | |
2012 | } | |
2013 | } | |
3cf2715d DE |
2014 | #endif |
2015 | ||
2016 | /* Detect insns that are really jump-tables | |
2017 | and output them as such. */ | |
2018 | ||
2019 | if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC) | |
2020 | { | |
7f7f8214 | 2021 | #if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)) |
b3694847 | 2022 | int vlen, idx; |
7f7f8214 | 2023 | #endif |
3cf2715d DE |
2024 | |
2025 | if (prescan > 0) | |
2026 | break; | |
2027 | ||
b2a6a2fb JJ |
2028 | if (! JUMP_TABLES_IN_TEXT_SECTION) |
2029 | targetm.asm_out.function_rodata_section (current_function_decl); | |
2030 | else | |
2031 | function_section (current_function_decl); | |
2032 | ||
3cf2715d DE |
2033 | if (app_on) |
2034 | { | |
51723711 | 2035 | fputs (ASM_APP_OFF, file); |
3cf2715d DE |
2036 | app_on = 0; |
2037 | } | |
2038 | ||
e0d80184 DM |
2039 | #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC) |
2040 | if (GET_CODE (body) == ADDR_VEC) | |
2041 | { | |
2042 | #ifdef ASM_OUTPUT_ADDR_VEC | |
2043 | ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn), body); | |
2044 | #else | |
0bccc606 | 2045 | gcc_unreachable (); |
e0d80184 DM |
2046 | #endif |
2047 | } | |
2048 | else | |
2049 | { | |
2050 | #ifdef ASM_OUTPUT_ADDR_DIFF_VEC | |
2051 | ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn), body); | |
2052 | #else | |
0bccc606 | 2053 | gcc_unreachable (); |
e0d80184 DM |
2054 | #endif |
2055 | } | |
2056 | #else | |
3cf2715d DE |
2057 | vlen = XVECLEN (body, GET_CODE (body) == ADDR_DIFF_VEC); |
2058 | for (idx = 0; idx < vlen; idx++) | |
2059 | { | |
2060 | if (GET_CODE (body) == ADDR_VEC) | |
2061 | { | |
2062 | #ifdef ASM_OUTPUT_ADDR_VEC_ELT | |
2063 | ASM_OUTPUT_ADDR_VEC_ELT | |
2064 | (file, CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 0, idx), 0))); | |
2065 | #else | |
0bccc606 | 2066 | gcc_unreachable (); |
3cf2715d DE |
2067 | #endif |
2068 | } | |
2069 | else | |
2070 | { | |
2071 | #ifdef ASM_OUTPUT_ADDR_DIFF_ELT | |
2072 | ASM_OUTPUT_ADDR_DIFF_ELT | |
2073 | (file, | |
33f7f353 | 2074 | body, |
3cf2715d DE |
2075 | CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 1, idx), 0)), |
2076 | CODE_LABEL_NUMBER (XEXP (XEXP (body, 0), 0))); | |
2077 | #else | |
0bccc606 | 2078 | gcc_unreachable (); |
3cf2715d DE |
2079 | #endif |
2080 | } | |
2081 | } | |
2082 | #ifdef ASM_OUTPUT_CASE_END | |
2083 | ASM_OUTPUT_CASE_END (file, | |
2084 | CODE_LABEL_NUMBER (PREV_INSN (insn)), | |
2085 | insn); | |
e0d80184 | 2086 | #endif |
3cf2715d DE |
2087 | #endif |
2088 | ||
4d1065ed | 2089 | function_section (current_function_decl); |
3cf2715d DE |
2090 | |
2091 | break; | |
2092 | } | |
0435312e JH |
2093 | /* Output this line note if it is the first or the last line |
2094 | note in a row. */ | |
2095 | if (notice_source_line (insn)) | |
2096 | { | |
2097 | (*debug_hooks->source_line) (last_linenum, last_filename); | |
2098 | } | |
3cf2715d | 2099 | |
3cf2715d DE |
2100 | if (GET_CODE (body) == ASM_INPUT) |
2101 | { | |
36d7136e RH |
2102 | const char *string = XSTR (body, 0); |
2103 | ||
3cf2715d DE |
2104 | /* There's no telling what that did to the condition codes. */ |
2105 | CC_STATUS_INIT; | |
2106 | if (prescan > 0) | |
2107 | break; | |
36d7136e RH |
2108 | |
2109 | if (string[0]) | |
3cf2715d | 2110 | { |
36d7136e RH |
2111 | if (! app_on) |
2112 | { | |
2113 | fputs (ASM_APP_ON, file); | |
2114 | app_on = 1; | |
2115 | } | |
2116 | fprintf (asm_out_file, "\t%s\n", string); | |
3cf2715d | 2117 | } |
3cf2715d DE |
2118 | break; |
2119 | } | |
2120 | ||
2121 | /* Detect `asm' construct with operands. */ | |
2122 | if (asm_noperands (body) >= 0) | |
2123 | { | |
22bf4422 | 2124 | unsigned int noperands = asm_noperands (body); |
703ad42b | 2125 | rtx *ops = alloca (noperands * sizeof (rtx)); |
3cce094d | 2126 | const char *string; |
3cf2715d DE |
2127 | |
2128 | /* There's no telling what that did to the condition codes. */ | |
2129 | CC_STATUS_INIT; | |
2130 | if (prescan > 0) | |
2131 | break; | |
2132 | ||
3cf2715d | 2133 | /* Get out the operand values. */ |
df4ae160 | 2134 | string = decode_asm_operands (body, ops, NULL, NULL, NULL); |
3cf2715d DE |
2135 | /* Inhibit aborts on what would otherwise be compiler bugs. */ |
2136 | insn_noperands = noperands; | |
2137 | this_is_asm_operands = insn; | |
2138 | ||
ad7e39ca AO |
2139 | #ifdef FINAL_PRESCAN_INSN |
2140 | FINAL_PRESCAN_INSN (insn, ops, insn_noperands); | |
2141 | #endif | |
2142 | ||
3cf2715d | 2143 | /* Output the insn using them. */ |
36d7136e RH |
2144 | if (string[0]) |
2145 | { | |
2146 | if (! app_on) | |
2147 | { | |
2148 | fputs (ASM_APP_ON, file); | |
2149 | app_on = 1; | |
2150 | } | |
2151 | output_asm_insn (string, ops); | |
2152 | } | |
2153 | ||
3cf2715d DE |
2154 | this_is_asm_operands = 0; |
2155 | break; | |
2156 | } | |
2157 | ||
2158 | if (prescan <= 0 && app_on) | |
2159 | { | |
51723711 | 2160 | fputs (ASM_APP_OFF, file); |
3cf2715d DE |
2161 | app_on = 0; |
2162 | } | |
2163 | ||
2164 | if (GET_CODE (body) == SEQUENCE) | |
2165 | { | |
2166 | /* A delayed-branch sequence */ | |
b3694847 | 2167 | int i; |
3cf2715d DE |
2168 | |
2169 | if (prescan > 0) | |
2170 | break; | |
2171 | final_sequence = body; | |
2172 | ||
d660cefe RS |
2173 | /* Record the delay slots' frame information before the branch. |
2174 | This is needed for delayed calls: see execute_cfa_program(). */ | |
2175 | #if defined (DWARF2_UNWIND_INFO) | |
2176 | if (dwarf2out_do_frame ()) | |
2177 | for (i = 1; i < XVECLEN (body, 0); i++) | |
e0c0490b | 2178 | dwarf2out_frame_debug (XVECEXP (body, 0, i), false); |
d660cefe RS |
2179 | #endif |
2180 | ||
3cf2715d DE |
2181 | /* The first insn in this SEQUENCE might be a JUMP_INSN that will |
2182 | force the restoration of a comparison that was previously | |
2183 | thought unnecessary. If that happens, cancel this sequence | |
2184 | and cause that insn to be restored. */ | |
2185 | ||
589fe865 | 2186 | next = final_scan_insn (XVECEXP (body, 0, 0), file, 0, prescan, 1, seen); |
3cf2715d DE |
2187 | if (next != XVECEXP (body, 0, 1)) |
2188 | { | |
2189 | final_sequence = 0; | |
2190 | return next; | |
2191 | } | |
2192 | ||
2193 | for (i = 1; i < XVECLEN (body, 0); i++) | |
c7eee2df RK |
2194 | { |
2195 | rtx insn = XVECEXP (body, 0, i); | |
2196 | rtx next = NEXT_INSN (insn); | |
2197 | /* We loop in case any instruction in a delay slot gets | |
2198 | split. */ | |
2199 | do | |
ff8cea7e | 2200 | insn = final_scan_insn (insn, file, 0, prescan, 1, seen); |
c7eee2df RK |
2201 | while (insn != next); |
2202 | } | |
3cf2715d DE |
2203 | #ifdef DBR_OUTPUT_SEQEND |
2204 | DBR_OUTPUT_SEQEND (file); | |
2205 | #endif | |
2206 | final_sequence = 0; | |
2207 | ||
2208 | /* If the insn requiring the delay slot was a CALL_INSN, the | |
2209 | insns in the delay slot are actually executed before the | |
2210 | called function. Hence we don't preserve any CC-setting | |
2211 | actions in these insns and the CC must be marked as being | |
2212 | clobbered by the function. */ | |
4b4bf941 | 2213 | if (CALL_P (XVECEXP (body, 0, 0))) |
b729186a JL |
2214 | { |
2215 | CC_STATUS_INIT; | |
2216 | } | |
3cf2715d DE |
2217 | break; |
2218 | } | |
2219 | ||
2220 | /* We have a real machine instruction as rtl. */ | |
2221 | ||
2222 | body = PATTERN (insn); | |
2223 | ||
2224 | #ifdef HAVE_cc0 | |
f5d927c0 | 2225 | set = single_set (insn); |
b88c92cc | 2226 | |
3cf2715d DE |
2227 | /* Check for redundant test and compare instructions |
2228 | (when the condition codes are already set up as desired). | |
2229 | This is done only when optimizing; if not optimizing, | |
2230 | it should be possible for the user to alter a variable | |
2231 | with the debugger in between statements | |
2232 | and the next statement should reexamine the variable | |
2233 | to compute the condition codes. */ | |
2234 | ||
30f5e9f5 | 2235 | if (optimize) |
3cf2715d | 2236 | { |
30f5e9f5 RK |
2237 | if (set |
2238 | && GET_CODE (SET_DEST (set)) == CC0 | |
2239 | && insn != last_ignored_compare) | |
3cf2715d | 2240 | { |
30f5e9f5 | 2241 | if (GET_CODE (SET_SRC (set)) == SUBREG) |
49d801d3 | 2242 | SET_SRC (set) = alter_subreg (&SET_SRC (set)); |
30f5e9f5 RK |
2243 | else if (GET_CODE (SET_SRC (set)) == COMPARE) |
2244 | { | |
2245 | if (GET_CODE (XEXP (SET_SRC (set), 0)) == SUBREG) | |
2246 | XEXP (SET_SRC (set), 0) | |
49d801d3 | 2247 | = alter_subreg (&XEXP (SET_SRC (set), 0)); |
30f5e9f5 RK |
2248 | if (GET_CODE (XEXP (SET_SRC (set), 1)) == SUBREG) |
2249 | XEXP (SET_SRC (set), 1) | |
49d801d3 | 2250 | = alter_subreg (&XEXP (SET_SRC (set), 1)); |
30f5e9f5 RK |
2251 | } |
2252 | if ((cc_status.value1 != 0 | |
2253 | && rtx_equal_p (SET_SRC (set), cc_status.value1)) | |
2254 | || (cc_status.value2 != 0 | |
2255 | && rtx_equal_p (SET_SRC (set), cc_status.value2))) | |
3cf2715d | 2256 | { |
30f5e9f5 | 2257 | /* Don't delete insn if it has an addressing side-effect. */ |
ff81832f | 2258 | if (! FIND_REG_INC_NOTE (insn, NULL_RTX) |
30f5e9f5 RK |
2259 | /* or if anything in it is volatile. */ |
2260 | && ! volatile_refs_p (PATTERN (insn))) | |
2261 | { | |
2262 | /* We don't really delete the insn; just ignore it. */ | |
2263 | last_ignored_compare = insn; | |
2264 | break; | |
2265 | } | |
3cf2715d DE |
2266 | } |
2267 | } | |
2268 | } | |
2269 | #endif | |
2270 | ||
3cf2715d DE |
2271 | #ifdef HAVE_cc0 |
2272 | /* If this is a conditional branch, maybe modify it | |
2273 | if the cc's are in a nonstandard state | |
2274 | so that it accomplishes the same thing that it would | |
2275 | do straightforwardly if the cc's were set up normally. */ | |
2276 | ||
2277 | if (cc_status.flags != 0 | |
4b4bf941 | 2278 | && JUMP_P (insn) |
3cf2715d DE |
2279 | && GET_CODE (body) == SET |
2280 | && SET_DEST (body) == pc_rtx | |
2281 | && GET_CODE (SET_SRC (body)) == IF_THEN_ELSE | |
ec8e098d | 2282 | && COMPARISON_P (XEXP (SET_SRC (body), 0)) |
fff752ad | 2283 | && XEXP (XEXP (SET_SRC (body), 0), 0) == cc0_rtx |
3cf2715d DE |
2284 | /* This is done during prescan; it is not done again |
2285 | in final scan when prescan has been done. */ | |
2286 | && prescan >= 0) | |
2287 | { | |
2288 | /* This function may alter the contents of its argument | |
2289 | and clear some of the cc_status.flags bits. | |
2290 | It may also return 1 meaning condition now always true | |
2291 | or -1 meaning condition now always false | |
2292 | or 2 meaning condition nontrivial but altered. */ | |
b3694847 | 2293 | int result = alter_cond (XEXP (SET_SRC (body), 0)); |
3cf2715d DE |
2294 | /* If condition now has fixed value, replace the IF_THEN_ELSE |
2295 | with its then-operand or its else-operand. */ | |
2296 | if (result == 1) | |
2297 | SET_SRC (body) = XEXP (SET_SRC (body), 1); | |
2298 | if (result == -1) | |
2299 | SET_SRC (body) = XEXP (SET_SRC (body), 2); | |
2300 | ||
2301 | /* The jump is now either unconditional or a no-op. | |
2302 | If it has become a no-op, don't try to output it. | |
2303 | (It would not be recognized.) */ | |
2304 | if (SET_SRC (body) == pc_rtx) | |
2305 | { | |
ca6c03ca | 2306 | delete_insn (insn); |
3cf2715d DE |
2307 | break; |
2308 | } | |
2309 | else if (GET_CODE (SET_SRC (body)) == RETURN) | |
2310 | /* Replace (set (pc) (return)) with (return). */ | |
2311 | PATTERN (insn) = body = SET_SRC (body); | |
2312 | ||
2313 | /* Rerecognize the instruction if it has changed. */ | |
2314 | if (result != 0) | |
2315 | INSN_CODE (insn) = -1; | |
2316 | } | |
2317 | ||
2318 | /* Make same adjustments to instructions that examine the | |
462da2af SC |
2319 | condition codes without jumping and instructions that |
2320 | handle conditional moves (if this machine has either one). */ | |
3cf2715d DE |
2321 | |
2322 | if (cc_status.flags != 0 | |
b88c92cc | 2323 | && set != 0) |
3cf2715d | 2324 | { |
462da2af | 2325 | rtx cond_rtx, then_rtx, else_rtx; |
f5d927c0 | 2326 | |
4b4bf941 | 2327 | if (!JUMP_P (insn) |
b88c92cc | 2328 | && GET_CODE (SET_SRC (set)) == IF_THEN_ELSE) |
462da2af | 2329 | { |
b88c92cc RK |
2330 | cond_rtx = XEXP (SET_SRC (set), 0); |
2331 | then_rtx = XEXP (SET_SRC (set), 1); | |
2332 | else_rtx = XEXP (SET_SRC (set), 2); | |
462da2af SC |
2333 | } |
2334 | else | |
2335 | { | |
b88c92cc | 2336 | cond_rtx = SET_SRC (set); |
462da2af SC |
2337 | then_rtx = const_true_rtx; |
2338 | else_rtx = const0_rtx; | |
2339 | } | |
f5d927c0 | 2340 | |
462da2af | 2341 | switch (GET_CODE (cond_rtx)) |
3cf2715d DE |
2342 | { |
2343 | case GTU: | |
2344 | case GT: | |
2345 | case LTU: | |
2346 | case LT: | |
2347 | case GEU: | |
2348 | case GE: | |
2349 | case LEU: | |
2350 | case LE: | |
2351 | case EQ: | |
2352 | case NE: | |
2353 | { | |
b3694847 | 2354 | int result; |
462da2af | 2355 | if (XEXP (cond_rtx, 0) != cc0_rtx) |
3cf2715d | 2356 | break; |
462da2af | 2357 | result = alter_cond (cond_rtx); |
3cf2715d | 2358 | if (result == 1) |
b88c92cc | 2359 | validate_change (insn, &SET_SRC (set), then_rtx, 0); |
3cf2715d | 2360 | else if (result == -1) |
b88c92cc | 2361 | validate_change (insn, &SET_SRC (set), else_rtx, 0); |
3cf2715d DE |
2362 | else if (result == 2) |
2363 | INSN_CODE (insn) = -1; | |
b88c92cc | 2364 | if (SET_DEST (set) == SET_SRC (set)) |
ca6c03ca | 2365 | delete_insn (insn); |
3cf2715d | 2366 | } |
e9a25f70 JL |
2367 | break; |
2368 | ||
2369 | default: | |
2370 | break; | |
3cf2715d DE |
2371 | } |
2372 | } | |
462da2af | 2373 | |
3cf2715d DE |
2374 | #endif |
2375 | ||
ede7cd44 | 2376 | #ifdef HAVE_peephole |
3cf2715d DE |
2377 | /* Do machine-specific peephole optimizations if desired. */ |
2378 | ||
2379 | if (optimize && !flag_no_peephole && !nopeepholes) | |
2380 | { | |
2381 | rtx next = peephole (insn); | |
2382 | /* When peepholing, if there were notes within the peephole, | |
2383 | emit them before the peephole. */ | |
2384 | if (next != 0 && next != NEXT_INSN (insn)) | |
2385 | { | |
4928181c | 2386 | rtx note, prev = PREV_INSN (insn); |
3cf2715d DE |
2387 | |
2388 | for (note = NEXT_INSN (insn); note != next; | |
2389 | note = NEXT_INSN (note)) | |
589fe865 | 2390 | final_scan_insn (note, file, optimize, prescan, nopeepholes, seen); |
3cf2715d DE |
2391 | |
2392 | /* In case this is prescan, put the notes | |
2393 | in proper position for later rescan. */ | |
2394 | note = NEXT_INSN (insn); | |
2395 | PREV_INSN (note) = prev; | |
2396 | NEXT_INSN (prev) = note; | |
2397 | NEXT_INSN (PREV_INSN (next)) = insn; | |
2398 | PREV_INSN (insn) = PREV_INSN (next); | |
2399 | NEXT_INSN (insn) = next; | |
2400 | PREV_INSN (next) = insn; | |
2401 | } | |
2402 | ||
2403 | /* PEEPHOLE might have changed this. */ | |
2404 | body = PATTERN (insn); | |
2405 | } | |
ede7cd44 | 2406 | #endif |
3cf2715d DE |
2407 | |
2408 | /* Try to recognize the instruction. | |
2409 | If successful, verify that the operands satisfy the | |
2410 | constraints for the instruction. Crash if they don't, | |
2411 | since `reload' should have changed them so that they do. */ | |
2412 | ||
2413 | insn_code_number = recog_memoized (insn); | |
0304f787 | 2414 | cleanup_subreg_operands (insn); |
3cf2715d | 2415 | |
dd3f0101 KH |
2416 | /* Dump the insn in the assembly for debugging. */ |
2417 | if (flag_dump_rtl_in_asm) | |
2418 | { | |
2419 | print_rtx_head = ASM_COMMENT_START; | |
2420 | print_rtl_single (asm_out_file, insn); | |
2421 | print_rtx_head = ""; | |
2422 | } | |
b9f22704 | 2423 | |
6c698a6d | 2424 | if (! constrain_operands_cached (1)) |
3cf2715d | 2425 | fatal_insn_not_found (insn); |
3cf2715d DE |
2426 | |
2427 | /* Some target machines need to prescan each insn before | |
2428 | it is output. */ | |
2429 | ||
2430 | #ifdef FINAL_PRESCAN_INSN | |
1ccbefce | 2431 | FINAL_PRESCAN_INSN (insn, recog_data.operand, recog_data.n_operands); |
3cf2715d DE |
2432 | #endif |
2433 | ||
afe48e06 RH |
2434 | #ifdef HAVE_conditional_execution |
2435 | if (GET_CODE (PATTERN (insn)) == COND_EXEC) | |
2436 | current_insn_predicate = COND_EXEC_TEST (PATTERN (insn)); | |
2437 | else | |
2438 | current_insn_predicate = NULL_RTX; | |
2439 | #endif | |
2440 | ||
3cf2715d DE |
2441 | #ifdef HAVE_cc0 |
2442 | cc_prev_status = cc_status; | |
2443 | ||
2444 | /* Update `cc_status' for this instruction. | |
2445 | The instruction's output routine may change it further. | |
2446 | If the output routine for a jump insn needs to depend | |
2447 | on the cc status, it should look at cc_prev_status. */ | |
2448 | ||
2449 | NOTICE_UPDATE_CC (body, insn); | |
2450 | #endif | |
2451 | ||
b1a9f6a0 | 2452 | current_output_insn = debug_insn = insn; |
3cf2715d | 2453 | |
f73ad30e | 2454 | #if defined (DWARF2_UNWIND_INFO) |
4b4bf941 | 2455 | if (CALL_P (insn) && dwarf2out_do_frame ()) |
e0c0490b | 2456 | dwarf2out_frame_debug (insn, false); |
b57d9225 JM |
2457 | #endif |
2458 | ||
4bbf910e RH |
2459 | /* Find the proper template for this insn. */ |
2460 | template = get_insn_template (insn_code_number, insn); | |
3cf2715d | 2461 | |
4bbf910e RH |
2462 | /* If the C code returns 0, it means that it is a jump insn |
2463 | which follows a deleted test insn, and that test insn | |
2464 | needs to be reinserted. */ | |
3cf2715d DE |
2465 | if (template == 0) |
2466 | { | |
efd0378b HPN |
2467 | rtx prev; |
2468 | ||
0bccc606 | 2469 | gcc_assert (prev_nonnote_insn (insn) == last_ignored_compare); |
efd0378b HPN |
2470 | |
2471 | /* We have already processed the notes between the setter and | |
2472 | the user. Make sure we don't process them again, this is | |
2473 | particularly important if one of the notes is a block | |
2474 | scope note or an EH note. */ | |
2475 | for (prev = insn; | |
2476 | prev != last_ignored_compare; | |
2477 | prev = PREV_INSN (prev)) | |
2478 | { | |
4b4bf941 | 2479 | if (NOTE_P (prev)) |
ca6c03ca | 2480 | delete_insn (prev); /* Use delete_note. */ |
efd0378b HPN |
2481 | } |
2482 | ||
2483 | return prev; | |
3cf2715d DE |
2484 | } |
2485 | ||
2486 | /* If the template is the string "#", it means that this insn must | |
2487 | be split. */ | |
2488 | if (template[0] == '#' && template[1] == '\0') | |
2489 | { | |
2490 | rtx new = try_split (body, insn, 0); | |
2491 | ||
2492 | /* If we didn't split the insn, go away. */ | |
2493 | if (new == insn && PATTERN (new) == body) | |
c725bd79 | 2494 | fatal_insn ("could not split insn", insn); |
f5d927c0 | 2495 | |
3d14e82f JW |
2496 | #ifdef HAVE_ATTR_length |
2497 | /* This instruction should have been split in shorten_branches, | |
2498 | to ensure that we would have valid length info for the | |
2499 | splitees. */ | |
0bccc606 | 2500 | gcc_unreachable (); |
3d14e82f JW |
2501 | #endif |
2502 | ||
3cf2715d DE |
2503 | return new; |
2504 | } | |
f5d927c0 | 2505 | |
3cf2715d DE |
2506 | if (prescan > 0) |
2507 | break; | |
2508 | ||
951120ea PB |
2509 | #ifdef TARGET_UNWIND_INFO |
2510 | /* ??? This will put the directives in the wrong place if | |
2511 | get_insn_template outputs assembly directly. However calling it | |
2512 | before get_insn_template breaks if the insns is split. */ | |
2513 | targetm.asm_out.unwind_emit (asm_out_file, insn); | |
ce152ef8 | 2514 | #endif |
3cf2715d | 2515 | |
951120ea | 2516 | /* Output assembler code from the template. */ |
1ccbefce | 2517 | output_asm_insn (template, recog_data.operand); |
3cf2715d | 2518 | |
d660cefe RS |
2519 | /* If necessary, report the effect that the instruction has on |
2520 | the unwind info. We've already done this for delay slots | |
2521 | and call instructions. */ | |
0021b564 | 2522 | #if defined (DWARF2_UNWIND_INFO) |
e0c0490b | 2523 | if (final_sequence == 0 |
d660cefe RS |
2524 | #if !defined (HAVE_prologue) |
2525 | && !ACCUMULATE_OUTGOING_ARGS | |
2526 | #endif | |
fbfa55b0 | 2527 | && dwarf2out_do_frame ()) |
e0c0490b | 2528 | dwarf2out_frame_debug (insn, true); |
0021b564 | 2529 | #endif |
469ac993 | 2530 | |
b1a9f6a0 | 2531 | current_output_insn = debug_insn = 0; |
3cf2715d DE |
2532 | } |
2533 | } | |
2534 | return NEXT_INSN (insn); | |
2535 | } | |
2536 | \f | |
2537 | /* Output debugging info to the assembler file FILE | |
2538 | based on the NOTE-insn INSN, assumed to be a line number. */ | |
2539 | ||
0435312e | 2540 | static bool |
6cf9ac28 | 2541 | notice_source_line (rtx insn) |
3cf2715d | 2542 | { |
0435312e JH |
2543 | const char *filename = insn_file (insn); |
2544 | int linenum = insn_line (insn); | |
3cf2715d | 2545 | |
0435312e JH |
2546 | if (filename && (filename != last_filename || last_linenum != linenum)) |
2547 | { | |
2548 | last_filename = filename; | |
2549 | last_linenum = linenum; | |
2550 | high_block_linenum = MAX (last_linenum, high_block_linenum); | |
2551 | high_function_linenum = MAX (last_linenum, high_function_linenum); | |
2552 | return true; | |
2553 | } | |
2554 | return false; | |
3cf2715d DE |
2555 | } |
2556 | \f | |
0304f787 JL |
2557 | /* For each operand in INSN, simplify (subreg (reg)) so that it refers |
2558 | directly to the desired hard register. */ | |
f5d927c0 | 2559 | |
0304f787 | 2560 | void |
6cf9ac28 | 2561 | cleanup_subreg_operands (rtx insn) |
0304f787 | 2562 | { |
f62a15e3 | 2563 | int i; |
6c698a6d | 2564 | extract_insn_cached (insn); |
1ccbefce | 2565 | for (i = 0; i < recog_data.n_operands; i++) |
0304f787 | 2566 | { |
2067c116 | 2567 | /* The following test cannot use recog_data.operand when testing |
9f4524f2 RE |
2568 | for a SUBREG: the underlying object might have been changed |
2569 | already if we are inside a match_operator expression that | |
2570 | matches the else clause. Instead we test the underlying | |
2571 | expression directly. */ | |
2572 | if (GET_CODE (*recog_data.operand_loc[i]) == SUBREG) | |
49d801d3 | 2573 | recog_data.operand[i] = alter_subreg (recog_data.operand_loc[i]); |
1ccbefce | 2574 | else if (GET_CODE (recog_data.operand[i]) == PLUS |
04337620 | 2575 | || GET_CODE (recog_data.operand[i]) == MULT |
3c0cb5de | 2576 | || MEM_P (recog_data.operand[i])) |
49d801d3 | 2577 | recog_data.operand[i] = walk_alter_subreg (recog_data.operand_loc[i]); |
0304f787 JL |
2578 | } |
2579 | ||
1ccbefce | 2580 | for (i = 0; i < recog_data.n_dups; i++) |
0304f787 | 2581 | { |
1ccbefce | 2582 | if (GET_CODE (*recog_data.dup_loc[i]) == SUBREG) |
49d801d3 | 2583 | *recog_data.dup_loc[i] = alter_subreg (recog_data.dup_loc[i]); |
1ccbefce | 2584 | else if (GET_CODE (*recog_data.dup_loc[i]) == PLUS |
04337620 | 2585 | || GET_CODE (*recog_data.dup_loc[i]) == MULT |
3c0cb5de | 2586 | || MEM_P (*recog_data.dup_loc[i])) |
49d801d3 | 2587 | *recog_data.dup_loc[i] = walk_alter_subreg (recog_data.dup_loc[i]); |
0304f787 JL |
2588 | } |
2589 | } | |
2590 | ||
3cf2715d DE |
2591 | /* If X is a SUBREG, replace it with a REG or a MEM, |
2592 | based on the thing it is a subreg of. */ | |
2593 | ||
2594 | rtx | |
6cf9ac28 | 2595 | alter_subreg (rtx *xp) |
3cf2715d | 2596 | { |
49d801d3 | 2597 | rtx x = *xp; |
b3694847 | 2598 | rtx y = SUBREG_REG (x); |
f5963e61 | 2599 | |
49d801d3 JH |
2600 | /* simplify_subreg does not remove subreg from volatile references. |
2601 | We are required to. */ | |
3c0cb5de | 2602 | if (MEM_P (y)) |
fd326ba8 UW |
2603 | { |
2604 | int offset = SUBREG_BYTE (x); | |
2605 | ||
2606 | /* For paradoxical subregs on big-endian machines, SUBREG_BYTE | |
2607 | contains 0 instead of the proper offset. See simplify_subreg. */ | |
2608 | if (offset == 0 | |
2609 | && GET_MODE_SIZE (GET_MODE (y)) < GET_MODE_SIZE (GET_MODE (x))) | |
2610 | { | |
2611 | int difference = GET_MODE_SIZE (GET_MODE (y)) | |
2612 | - GET_MODE_SIZE (GET_MODE (x)); | |
2613 | if (WORDS_BIG_ENDIAN) | |
2614 | offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD; | |
2615 | if (BYTES_BIG_ENDIAN) | |
2616 | offset += difference % UNITS_PER_WORD; | |
2617 | } | |
2618 | ||
2619 | *xp = adjust_address (y, GET_MODE (x), offset); | |
2620 | } | |
49d801d3 | 2621 | else |
fea54805 RK |
2622 | { |
2623 | rtx new = simplify_subreg (GET_MODE (x), y, GET_MODE (y), | |
2624 | SUBREG_BYTE (x)); | |
2625 | ||
2626 | if (new != 0) | |
2627 | *xp = new; | |
0bccc606 | 2628 | else |
fea54805 | 2629 | { |
0bccc606 | 2630 | /* Simplify_subreg can't handle some REG cases, but we have to. */ |
6f9e3578 | 2631 | unsigned int regno = subreg_regno (x); |
0bccc606 | 2632 | gcc_assert (REG_P (y)); |
a560d4d4 | 2633 | *xp = gen_rtx_REG_offset (y, GET_MODE (x), regno, SUBREG_BYTE (x)); |
fea54805 | 2634 | } |
fea54805 RK |
2635 | } |
2636 | ||
49d801d3 | 2637 | return *xp; |
3cf2715d DE |
2638 | } |
2639 | ||
2640 | /* Do alter_subreg on all the SUBREGs contained in X. */ | |
2641 | ||
2642 | static rtx | |
6cf9ac28 | 2643 | walk_alter_subreg (rtx *xp) |
3cf2715d | 2644 | { |
49d801d3 | 2645 | rtx x = *xp; |
3cf2715d DE |
2646 | switch (GET_CODE (x)) |
2647 | { | |
2648 | case PLUS: | |
2649 | case MULT: | |
beed8fc0 | 2650 | case AND: |
49d801d3 JH |
2651 | XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0)); |
2652 | XEXP (x, 1) = walk_alter_subreg (&XEXP (x, 1)); | |
3cf2715d DE |
2653 | break; |
2654 | ||
2655 | case MEM: | |
beed8fc0 | 2656 | case ZERO_EXTEND: |
49d801d3 | 2657 | XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0)); |
3cf2715d DE |
2658 | break; |
2659 | ||
2660 | case SUBREG: | |
49d801d3 | 2661 | return alter_subreg (xp); |
f5d927c0 | 2662 | |
e9a25f70 JL |
2663 | default: |
2664 | break; | |
3cf2715d DE |
2665 | } |
2666 | ||
5bc72aeb | 2667 | return *xp; |
3cf2715d DE |
2668 | } |
2669 | \f | |
2670 | #ifdef HAVE_cc0 | |
2671 | ||
2672 | /* Given BODY, the body of a jump instruction, alter the jump condition | |
2673 | as required by the bits that are set in cc_status.flags. | |
2674 | Not all of the bits there can be handled at this level in all cases. | |
2675 | ||
2676 | The value is normally 0. | |
2677 | 1 means that the condition has become always true. | |
2678 | -1 means that the condition has become always false. | |
2679 | 2 means that COND has been altered. */ | |
2680 | ||
2681 | static int | |
6cf9ac28 | 2682 | alter_cond (rtx cond) |
3cf2715d DE |
2683 | { |
2684 | int value = 0; | |
2685 | ||
2686 | if (cc_status.flags & CC_REVERSED) | |
2687 | { | |
2688 | value = 2; | |
2689 | PUT_CODE (cond, swap_condition (GET_CODE (cond))); | |
2690 | } | |
2691 | ||
2692 | if (cc_status.flags & CC_INVERTED) | |
2693 | { | |
2694 | value = 2; | |
2695 | PUT_CODE (cond, reverse_condition (GET_CODE (cond))); | |
2696 | } | |
2697 | ||
2698 | if (cc_status.flags & CC_NOT_POSITIVE) | |
2699 | switch (GET_CODE (cond)) | |
2700 | { | |
2701 | case LE: | |
2702 | case LEU: | |
2703 | case GEU: | |
2704 | /* Jump becomes unconditional. */ | |
2705 | return 1; | |
2706 | ||
2707 | case GT: | |
2708 | case GTU: | |
2709 | case LTU: | |
2710 | /* Jump becomes no-op. */ | |
2711 | return -1; | |
2712 | ||
2713 | case GE: | |
2714 | PUT_CODE (cond, EQ); | |
2715 | value = 2; | |
2716 | break; | |
2717 | ||
2718 | case LT: | |
2719 | PUT_CODE (cond, NE); | |
2720 | value = 2; | |
2721 | break; | |
f5d927c0 | 2722 | |
e9a25f70 JL |
2723 | default: |
2724 | break; | |
3cf2715d DE |
2725 | } |
2726 | ||
2727 | if (cc_status.flags & CC_NOT_NEGATIVE) | |
2728 | switch (GET_CODE (cond)) | |
2729 | { | |
2730 | case GE: | |
2731 | case GEU: | |
2732 | /* Jump becomes unconditional. */ | |
2733 | return 1; | |
2734 | ||
2735 | case LT: | |
2736 | case LTU: | |
2737 | /* Jump becomes no-op. */ | |
2738 | return -1; | |
2739 | ||
2740 | case LE: | |
2741 | case LEU: | |
2742 | PUT_CODE (cond, EQ); | |
2743 | value = 2; | |
2744 | break; | |
2745 | ||
2746 | case GT: | |
2747 | case GTU: | |
2748 | PUT_CODE (cond, NE); | |
2749 | value = 2; | |
2750 | break; | |
f5d927c0 | 2751 | |
e9a25f70 JL |
2752 | default: |
2753 | break; | |
3cf2715d DE |
2754 | } |
2755 | ||
2756 | if (cc_status.flags & CC_NO_OVERFLOW) | |
2757 | switch (GET_CODE (cond)) | |
2758 | { | |
2759 | case GEU: | |
2760 | /* Jump becomes unconditional. */ | |
2761 | return 1; | |
2762 | ||
2763 | case LEU: | |
2764 | PUT_CODE (cond, EQ); | |
2765 | value = 2; | |
2766 | break; | |
2767 | ||
2768 | case GTU: | |
2769 | PUT_CODE (cond, NE); | |
2770 | value = 2; | |
2771 | break; | |
2772 | ||
2773 | case LTU: | |
2774 | /* Jump becomes no-op. */ | |
2775 | return -1; | |
f5d927c0 | 2776 | |
e9a25f70 JL |
2777 | default: |
2778 | break; | |
3cf2715d DE |
2779 | } |
2780 | ||
2781 | if (cc_status.flags & (CC_Z_IN_NOT_N | CC_Z_IN_N)) | |
2782 | switch (GET_CODE (cond)) | |
2783 | { | |
e9a25f70 | 2784 | default: |
0bccc606 | 2785 | gcc_unreachable (); |
3cf2715d DE |
2786 | |
2787 | case NE: | |
2788 | PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? GE : LT); | |
2789 | value = 2; | |
2790 | break; | |
2791 | ||
2792 | case EQ: | |
2793 | PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? LT : GE); | |
2794 | value = 2; | |
2795 | break; | |
2796 | } | |
2797 | ||
2798 | if (cc_status.flags & CC_NOT_SIGNED) | |
2799 | /* The flags are valid if signed condition operators are converted | |
2800 | to unsigned. */ | |
2801 | switch (GET_CODE (cond)) | |
2802 | { | |
2803 | case LE: | |
2804 | PUT_CODE (cond, LEU); | |
2805 | value = 2; | |
2806 | break; | |
2807 | ||
2808 | case LT: | |
2809 | PUT_CODE (cond, LTU); | |
2810 | value = 2; | |
2811 | break; | |
2812 | ||
2813 | case GT: | |
2814 | PUT_CODE (cond, GTU); | |
2815 | value = 2; | |
2816 | break; | |
2817 | ||
2818 | case GE: | |
2819 | PUT_CODE (cond, GEU); | |
2820 | value = 2; | |
2821 | break; | |
e9a25f70 JL |
2822 | |
2823 | default: | |
2824 | break; | |
3cf2715d DE |
2825 | } |
2826 | ||
2827 | return value; | |
2828 | } | |
2829 | #endif | |
2830 | \f | |
2831 | /* Report inconsistency between the assembler template and the operands. | |
2832 | In an `asm', it's the user's fault; otherwise, the compiler's fault. */ | |
2833 | ||
2834 | void | |
e34d07f2 | 2835 | output_operand_lossage (const char *msgid, ...) |
3cf2715d | 2836 | { |
a52453cc PT |
2837 | char *fmt_string; |
2838 | char *new_message; | |
fd478a0a | 2839 | const char *pfx_str; |
e34d07f2 | 2840 | va_list ap; |
6cf9ac28 | 2841 | |
e34d07f2 | 2842 | va_start (ap, msgid); |
a52453cc | 2843 | |
9e637a26 | 2844 | pfx_str = this_is_asm_operands ? _("invalid 'asm': ") : "output_operand: "; |
a52453cc PT |
2845 | asprintf (&fmt_string, "%s%s", pfx_str, _(msgid)); |
2846 | vasprintf (&new_message, fmt_string, ap); | |
dd3f0101 | 2847 | |
3cf2715d | 2848 | if (this_is_asm_operands) |
a52453cc | 2849 | error_for_asm (this_is_asm_operands, "%s", new_message); |
3cf2715d | 2850 | else |
a52453cc PT |
2851 | internal_error ("%s", new_message); |
2852 | ||
2853 | free (fmt_string); | |
2854 | free (new_message); | |
e34d07f2 | 2855 | va_end (ap); |
3cf2715d DE |
2856 | } |
2857 | \f | |
2858 | /* Output of assembler code from a template, and its subroutines. */ | |
2859 | ||
0d4903b8 RK |
2860 | /* Annotate the assembly with a comment describing the pattern and |
2861 | alternative used. */ | |
2862 | ||
2863 | static void | |
6cf9ac28 | 2864 | output_asm_name (void) |
0d4903b8 RK |
2865 | { |
2866 | if (debug_insn) | |
2867 | { | |
2868 | int num = INSN_CODE (debug_insn); | |
2869 | fprintf (asm_out_file, "\t%s %d\t%s", | |
2870 | ASM_COMMENT_START, INSN_UID (debug_insn), | |
2871 | insn_data[num].name); | |
2872 | if (insn_data[num].n_alternatives > 1) | |
2873 | fprintf (asm_out_file, "/%d", which_alternative + 1); | |
2874 | #ifdef HAVE_ATTR_length | |
2875 | fprintf (asm_out_file, "\t[length = %d]", | |
2876 | get_attr_length (debug_insn)); | |
2877 | #endif | |
2878 | /* Clear this so only the first assembler insn | |
2879 | of any rtl insn will get the special comment for -dp. */ | |
2880 | debug_insn = 0; | |
2881 | } | |
2882 | } | |
2883 | ||
998d7deb RH |
2884 | /* If OP is a REG or MEM and we can find a MEM_EXPR corresponding to it |
2885 | or its address, return that expr . Set *PADDRESSP to 1 if the expr | |
c5adc06a RK |
2886 | corresponds to the address of the object and 0 if to the object. */ |
2887 | ||
2888 | static tree | |
6cf9ac28 | 2889 | get_mem_expr_from_op (rtx op, int *paddressp) |
c5adc06a | 2890 | { |
998d7deb | 2891 | tree expr; |
c5adc06a RK |
2892 | int inner_addressp; |
2893 | ||
2894 | *paddressp = 0; | |
2895 | ||
f8cfc6aa | 2896 | if (REG_P (op)) |
a560d4d4 | 2897 | return REG_EXPR (op); |
3c0cb5de | 2898 | else if (!MEM_P (op)) |
c5adc06a RK |
2899 | return 0; |
2900 | ||
998d7deb RH |
2901 | if (MEM_EXPR (op) != 0) |
2902 | return MEM_EXPR (op); | |
c5adc06a RK |
2903 | |
2904 | /* Otherwise we have an address, so indicate it and look at the address. */ | |
2905 | *paddressp = 1; | |
2906 | op = XEXP (op, 0); | |
2907 | ||
2908 | /* First check if we have a decl for the address, then look at the right side | |
2909 | if it is a PLUS. Otherwise, strip off arithmetic and keep looking. | |
2910 | But don't allow the address to itself be indirect. */ | |
998d7deb RH |
2911 | if ((expr = get_mem_expr_from_op (op, &inner_addressp)) && ! inner_addressp) |
2912 | return expr; | |
c5adc06a | 2913 | else if (GET_CODE (op) == PLUS |
998d7deb RH |
2914 | && (expr = get_mem_expr_from_op (XEXP (op, 1), &inner_addressp))) |
2915 | return expr; | |
c5adc06a | 2916 | |
ec8e098d PB |
2917 | while (GET_RTX_CLASS (GET_CODE (op)) == RTX_UNARY |
2918 | || GET_RTX_CLASS (GET_CODE (op)) == RTX_BIN_ARITH) | |
c5adc06a RK |
2919 | op = XEXP (op, 0); |
2920 | ||
998d7deb RH |
2921 | expr = get_mem_expr_from_op (op, &inner_addressp); |
2922 | return inner_addressp ? 0 : expr; | |
c5adc06a | 2923 | } |
ff81832f | 2924 | |
4f9b4029 RK |
2925 | /* Output operand names for assembler instructions. OPERANDS is the |
2926 | operand vector, OPORDER is the order to write the operands, and NOPS | |
2927 | is the number of operands to write. */ | |
2928 | ||
2929 | static void | |
6cf9ac28 | 2930 | output_asm_operand_names (rtx *operands, int *oporder, int nops) |
4f9b4029 RK |
2931 | { |
2932 | int wrote = 0; | |
2933 | int i; | |
2934 | ||
2935 | for (i = 0; i < nops; i++) | |
2936 | { | |
2937 | int addressp; | |
a560d4d4 JH |
2938 | rtx op = operands[oporder[i]]; |
2939 | tree expr = get_mem_expr_from_op (op, &addressp); | |
4f9b4029 | 2940 | |
a560d4d4 JH |
2941 | fprintf (asm_out_file, "%c%s", |
2942 | wrote ? ',' : '\t', wrote ? "" : ASM_COMMENT_START); | |
2943 | wrote = 1; | |
998d7deb | 2944 | if (expr) |
4f9b4029 | 2945 | { |
a560d4d4 | 2946 | fprintf (asm_out_file, "%s", |
998d7deb RH |
2947 | addressp ? "*" : ""); |
2948 | print_mem_expr (asm_out_file, expr); | |
4f9b4029 RK |
2949 | wrote = 1; |
2950 | } | |
a560d4d4 JH |
2951 | else if (REG_P (op) && ORIGINAL_REGNO (op) |
2952 | && ORIGINAL_REGNO (op) != REGNO (op)) | |
2953 | fprintf (asm_out_file, " tmp%i", ORIGINAL_REGNO (op)); | |
4f9b4029 RK |
2954 | } |
2955 | } | |
2956 | ||
3cf2715d DE |
2957 | /* Output text from TEMPLATE to the assembler output file, |
2958 | obeying %-directions to substitute operands taken from | |
2959 | the vector OPERANDS. | |
2960 | ||
2961 | %N (for N a digit) means print operand N in usual manner. | |
2962 | %lN means require operand N to be a CODE_LABEL or LABEL_REF | |
2963 | and print the label name with no punctuation. | |
2964 | %cN means require operand N to be a constant | |
2965 | and print the constant expression with no punctuation. | |
2966 | %aN means expect operand N to be a memory address | |
2967 | (not a memory reference!) and print a reference | |
2968 | to that address. | |
2969 | %nN means expect operand N to be a constant | |
2970 | and print a constant expression for minus the value | |
2971 | of the operand, with no other punctuation. */ | |
2972 | ||
2973 | void | |
6cf9ac28 | 2974 | output_asm_insn (const char *template, rtx *operands) |
3cf2715d | 2975 | { |
b3694847 SS |
2976 | const char *p; |
2977 | int c; | |
8554d9a4 JJ |
2978 | #ifdef ASSEMBLER_DIALECT |
2979 | int dialect = 0; | |
2980 | #endif | |
0d4903b8 | 2981 | int oporder[MAX_RECOG_OPERANDS]; |
4f9b4029 | 2982 | char opoutput[MAX_RECOG_OPERANDS]; |
0d4903b8 | 2983 | int ops = 0; |
3cf2715d DE |
2984 | |
2985 | /* An insn may return a null string template | |
2986 | in a case where no assembler code is needed. */ | |
2987 | if (*template == 0) | |
2988 | return; | |
2989 | ||
4f9b4029 | 2990 | memset (opoutput, 0, sizeof opoutput); |
3cf2715d DE |
2991 | p = template; |
2992 | putc ('\t', asm_out_file); | |
2993 | ||
2994 | #ifdef ASM_OUTPUT_OPCODE | |
2995 | ASM_OUTPUT_OPCODE (asm_out_file, p); | |
2996 | #endif | |
2997 | ||
b729186a | 2998 | while ((c = *p++)) |
3cf2715d DE |
2999 | switch (c) |
3000 | { | |
3cf2715d | 3001 | case '\n': |
4f9b4029 RK |
3002 | if (flag_verbose_asm) |
3003 | output_asm_operand_names (operands, oporder, ops); | |
0d4903b8 RK |
3004 | if (flag_print_asm_name) |
3005 | output_asm_name (); | |
3006 | ||
4f9b4029 RK |
3007 | ops = 0; |
3008 | memset (opoutput, 0, sizeof opoutput); | |
3009 | ||
3cf2715d | 3010 | putc (c, asm_out_file); |
cb649530 | 3011 | #ifdef ASM_OUTPUT_OPCODE |
3cf2715d DE |
3012 | while ((c = *p) == '\t') |
3013 | { | |
3014 | putc (c, asm_out_file); | |
3015 | p++; | |
3016 | } | |
3017 | ASM_OUTPUT_OPCODE (asm_out_file, p); | |
3cf2715d | 3018 | #endif |
cb649530 | 3019 | break; |
3cf2715d DE |
3020 | |
3021 | #ifdef ASSEMBLER_DIALECT | |
3022 | case '{': | |
b729186a | 3023 | { |
b3694847 | 3024 | int i; |
f5d927c0 | 3025 | |
8554d9a4 JJ |
3026 | if (dialect) |
3027 | output_operand_lossage ("nested assembly dialect alternatives"); | |
3028 | else | |
3029 | dialect = 1; | |
3030 | ||
b729186a JL |
3031 | /* If we want the first dialect, do nothing. Otherwise, skip |
3032 | DIALECT_NUMBER of strings ending with '|'. */ | |
3033 | for (i = 0; i < dialect_number; i++) | |
3034 | { | |
463a8384 | 3035 | while (*p && *p != '}' && *p++ != '|') |
b729186a | 3036 | ; |
463a8384 BS |
3037 | if (*p == '}') |
3038 | break; | |
b729186a JL |
3039 | if (*p == '|') |
3040 | p++; | |
3041 | } | |
8554d9a4 JJ |
3042 | |
3043 | if (*p == '\0') | |
3044 | output_operand_lossage ("unterminated assembly dialect alternative"); | |
b729186a | 3045 | } |
3cf2715d DE |
3046 | break; |
3047 | ||
3048 | case '|': | |
8554d9a4 JJ |
3049 | if (dialect) |
3050 | { | |
3051 | /* Skip to close brace. */ | |
3052 | do | |
3053 | { | |
3054 | if (*p == '\0') | |
3055 | { | |
3056 | output_operand_lossage ("unterminated assembly dialect alternative"); | |
3057 | break; | |
3058 | } | |
ff81832f | 3059 | } |
8554d9a4 JJ |
3060 | while (*p++ != '}'); |
3061 | dialect = 0; | |
3062 | } | |
3063 | else | |
3064 | putc (c, asm_out_file); | |
3cf2715d DE |
3065 | break; |
3066 | ||
3067 | case '}': | |
8554d9a4 JJ |
3068 | if (! dialect) |
3069 | putc (c, asm_out_file); | |
3070 | dialect = 0; | |
3cf2715d DE |
3071 | break; |
3072 | #endif | |
3073 | ||
3074 | case '%': | |
3075 | /* %% outputs a single %. */ | |
3076 | if (*p == '%') | |
3077 | { | |
3078 | p++; | |
3079 | putc (c, asm_out_file); | |
3080 | } | |
3081 | /* %= outputs a number which is unique to each insn in the entire | |
3082 | compilation. This is useful for making local labels that are | |
3083 | referred to more than once in a given insn. */ | |
3084 | else if (*p == '=') | |
3085 | { | |
3086 | p++; | |
3087 | fprintf (asm_out_file, "%d", insn_counter); | |
3088 | } | |
3089 | /* % followed by a letter and some digits | |
3090 | outputs an operand in a special way depending on the letter. | |
3091 | Letters `acln' are implemented directly. | |
3092 | Other letters are passed to `output_operand' so that | |
3093 | the PRINT_OPERAND macro can define them. */ | |
0df6c2c7 | 3094 | else if (ISALPHA (*p)) |
3cf2715d DE |
3095 | { |
3096 | int letter = *p++; | |
c383c15f GK |
3097 | unsigned long opnum; |
3098 | char *endptr; | |
3099 | ||
3100 | opnum = strtoul (p, &endptr, 10); | |
3101 | ||
3102 | if (endptr == p) | |
3103 | output_operand_lossage ("operand number missing " | |
3104 | "after %%-letter"); | |
3105 | else if (this_is_asm_operands && opnum >= insn_noperands) | |
3cf2715d DE |
3106 | output_operand_lossage ("operand number out of range"); |
3107 | else if (letter == 'l') | |
c383c15f | 3108 | output_asm_label (operands[opnum]); |
3cf2715d | 3109 | else if (letter == 'a') |
c383c15f | 3110 | output_address (operands[opnum]); |
3cf2715d DE |
3111 | else if (letter == 'c') |
3112 | { | |
c383c15f GK |
3113 | if (CONSTANT_ADDRESS_P (operands[opnum])) |
3114 | output_addr_const (asm_out_file, operands[opnum]); | |
3cf2715d | 3115 | else |
c383c15f | 3116 | output_operand (operands[opnum], 'c'); |
3cf2715d DE |
3117 | } |
3118 | else if (letter == 'n') | |
3119 | { | |
c383c15f | 3120 | if (GET_CODE (operands[opnum]) == CONST_INT) |
21e3a81b | 3121 | fprintf (asm_out_file, HOST_WIDE_INT_PRINT_DEC, |
c383c15f | 3122 | - INTVAL (operands[opnum])); |
3cf2715d DE |
3123 | else |
3124 | { | |
3125 | putc ('-', asm_out_file); | |
c383c15f | 3126 | output_addr_const (asm_out_file, operands[opnum]); |
3cf2715d DE |
3127 | } |
3128 | } | |
3129 | else | |
c383c15f | 3130 | output_operand (operands[opnum], letter); |
f5d927c0 | 3131 | |
c383c15f | 3132 | if (!opoutput[opnum]) |
dc9d0b14 | 3133 | oporder[ops++] = opnum; |
c383c15f | 3134 | opoutput[opnum] = 1; |
0d4903b8 | 3135 | |
c383c15f GK |
3136 | p = endptr; |
3137 | c = *p; | |
3cf2715d DE |
3138 | } |
3139 | /* % followed by a digit outputs an operand the default way. */ | |
0df6c2c7 | 3140 | else if (ISDIGIT (*p)) |
3cf2715d | 3141 | { |
c383c15f GK |
3142 | unsigned long opnum; |
3143 | char *endptr; | |
3144 | ||
3145 | opnum = strtoul (p, &endptr, 10); | |
3146 | if (this_is_asm_operands && opnum >= insn_noperands) | |
3cf2715d DE |
3147 | output_operand_lossage ("operand number out of range"); |
3148 | else | |
c383c15f | 3149 | output_operand (operands[opnum], 0); |
0d4903b8 | 3150 | |
c383c15f | 3151 | if (!opoutput[opnum]) |
dc9d0b14 | 3152 | oporder[ops++] = opnum; |
c383c15f | 3153 | opoutput[opnum] = 1; |
4f9b4029 | 3154 | |
c383c15f GK |
3155 | p = endptr; |
3156 | c = *p; | |
3cf2715d DE |
3157 | } |
3158 | /* % followed by punctuation: output something for that | |
3159 | punctuation character alone, with no operand. | |
3160 | The PRINT_OPERAND macro decides what is actually done. */ | |
3161 | #ifdef PRINT_OPERAND_PUNCT_VALID_P | |
f5d927c0 | 3162 | else if (PRINT_OPERAND_PUNCT_VALID_P ((unsigned char) *p)) |
3cf2715d DE |
3163 | output_operand (NULL_RTX, *p++); |
3164 | #endif | |
3165 | else | |
3166 | output_operand_lossage ("invalid %%-code"); | |
3167 | break; | |
3168 | ||
3169 | default: | |
3170 | putc (c, asm_out_file); | |
3171 | } | |
3172 | ||
0d4903b8 RK |
3173 | /* Write out the variable names for operands, if we know them. */ |
3174 | if (flag_verbose_asm) | |
4f9b4029 | 3175 | output_asm_operand_names (operands, oporder, ops); |
0d4903b8 RK |
3176 | if (flag_print_asm_name) |
3177 | output_asm_name (); | |
3cf2715d DE |
3178 | |
3179 | putc ('\n', asm_out_file); | |
3180 | } | |
3181 | \f | |
3182 | /* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */ | |
3183 | ||
3184 | void | |
6cf9ac28 | 3185 | output_asm_label (rtx x) |
3cf2715d DE |
3186 | { |
3187 | char buf[256]; | |
3188 | ||
3189 | if (GET_CODE (x) == LABEL_REF) | |
be1bb652 | 3190 | x = XEXP (x, 0); |
4b4bf941 JQ |
3191 | if (LABEL_P (x) |
3192 | || (NOTE_P (x) | |
be1bb652 | 3193 | && NOTE_LINE_NUMBER (x) == NOTE_INSN_DELETED_LABEL)) |
3cf2715d DE |
3194 | ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x)); |
3195 | else | |
9e637a26 | 3196 | output_operand_lossage ("'%%l' operand isn't a label"); |
3cf2715d DE |
3197 | |
3198 | assemble_name (asm_out_file, buf); | |
3199 | } | |
3200 | ||
3201 | /* Print operand X using machine-dependent assembler syntax. | |
3202 | The macro PRINT_OPERAND is defined just to control this function. | |
3203 | CODE is a non-digit that preceded the operand-number in the % spec, | |
3204 | such as 'z' if the spec was `%z3'. CODE is 0 if there was no char | |
3205 | between the % and the digits. | |
3206 | When CODE is a non-letter, X is 0. | |
3207 | ||
3208 | The meanings of the letters are machine-dependent and controlled | |
3209 | by PRINT_OPERAND. */ | |
3210 | ||
3211 | static void | |
6cf9ac28 | 3212 | output_operand (rtx x, int code ATTRIBUTE_UNUSED) |
3cf2715d DE |
3213 | { |
3214 | if (x && GET_CODE (x) == SUBREG) | |
49d801d3 | 3215 | x = alter_subreg (&x); |
3cf2715d DE |
3216 | |
3217 | /* If X is a pseudo-register, abort now rather than writing trash to the | |
3218 | assembler file. */ | |
0bccc606 | 3219 | gcc_assert (!x || !REG_P (x) || REGNO (x) < FIRST_PSEUDO_REGISTER); |
3cf2715d DE |
3220 | |
3221 | PRINT_OPERAND (asm_out_file, x, code); | |
3222 | } | |
3223 | ||
3224 | /* Print a memory reference operand for address X | |
3225 | using machine-dependent assembler syntax. | |
3226 | The macro PRINT_OPERAND_ADDRESS exists just to control this function. */ | |
3227 | ||
3228 | void | |
6cf9ac28 | 3229 | output_address (rtx x) |
3cf2715d | 3230 | { |
49d801d3 | 3231 | walk_alter_subreg (&x); |
3cf2715d DE |
3232 | PRINT_OPERAND_ADDRESS (asm_out_file, x); |
3233 | } | |
3234 | \f | |
3235 | /* Print an integer constant expression in assembler syntax. | |
3236 | Addition and subtraction are the only arithmetic | |
3237 | that may appear in these expressions. */ | |
3238 | ||
3239 | void | |
6cf9ac28 | 3240 | output_addr_const (FILE *file, rtx x) |
3cf2715d DE |
3241 | { |
3242 | char buf[256]; | |
3243 | ||
3244 | restart: | |
3245 | switch (GET_CODE (x)) | |
3246 | { | |
3247 | case PC: | |
eac50d7a | 3248 | putc ('.', file); |
3cf2715d DE |
3249 | break; |
3250 | ||
3251 | case SYMBOL_REF: | |
bb9a388d ZW |
3252 | if (SYMBOL_REF_DECL (x)) |
3253 | mark_decl_referenced (SYMBOL_REF_DECL (x)); | |
99c8c61c AO |
3254 | #ifdef ASM_OUTPUT_SYMBOL_REF |
3255 | ASM_OUTPUT_SYMBOL_REF (file, x); | |
3256 | #else | |
3cf2715d | 3257 | assemble_name (file, XSTR (x, 0)); |
99c8c61c | 3258 | #endif |
3cf2715d DE |
3259 | break; |
3260 | ||
3261 | case LABEL_REF: | |
422be3c3 AO |
3262 | x = XEXP (x, 0); |
3263 | /* Fall through. */ | |
3cf2715d DE |
3264 | case CODE_LABEL: |
3265 | ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x)); | |
2f0b7af6 GK |
3266 | #ifdef ASM_OUTPUT_LABEL_REF |
3267 | ASM_OUTPUT_LABEL_REF (file, buf); | |
3268 | #else | |
3cf2715d | 3269 | assemble_name (file, buf); |
2f0b7af6 | 3270 | #endif |
3cf2715d DE |
3271 | break; |
3272 | ||
3273 | case CONST_INT: | |
21e3a81b | 3274 | fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x)); |
3cf2715d DE |
3275 | break; |
3276 | ||
3277 | case CONST: | |
3278 | /* This used to output parentheses around the expression, | |
3279 | but that does not work on the 386 (either ATT or BSD assembler). */ | |
3280 | output_addr_const (file, XEXP (x, 0)); | |
3281 | break; | |
3282 | ||
3283 | case CONST_DOUBLE: | |
3284 | if (GET_MODE (x) == VOIDmode) | |
3285 | { | |
3286 | /* We can use %d if the number is one word and positive. */ | |
3287 | if (CONST_DOUBLE_HIGH (x)) | |
21e3a81b | 3288 | fprintf (file, HOST_WIDE_INT_PRINT_DOUBLE_HEX, |
3cf2715d | 3289 | CONST_DOUBLE_HIGH (x), CONST_DOUBLE_LOW (x)); |
f5d927c0 | 3290 | else if (CONST_DOUBLE_LOW (x) < 0) |
21e3a81b | 3291 | fprintf (file, HOST_WIDE_INT_PRINT_HEX, CONST_DOUBLE_LOW (x)); |
3cf2715d | 3292 | else |
21e3a81b | 3293 | fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x)); |
3cf2715d DE |
3294 | } |
3295 | else | |
3296 | /* We can't handle floating point constants; | |
3297 | PRINT_OPERAND must handle them. */ | |
3298 | output_operand_lossage ("floating constant misused"); | |
3299 | break; | |
3300 | ||
3301 | case PLUS: | |
3302 | /* Some assemblers need integer constants to appear last (eg masm). */ | |
3303 | if (GET_CODE (XEXP (x, 0)) == CONST_INT) | |
3304 | { | |
3305 | output_addr_const (file, XEXP (x, 1)); | |
3306 | if (INTVAL (XEXP (x, 0)) >= 0) | |
3307 | fprintf (file, "+"); | |
3308 | output_addr_const (file, XEXP (x, 0)); | |
3309 | } | |
3310 | else | |
3311 | { | |
3312 | output_addr_const (file, XEXP (x, 0)); | |
08106825 AO |
3313 | if (GET_CODE (XEXP (x, 1)) != CONST_INT |
3314 | || INTVAL (XEXP (x, 1)) >= 0) | |
3cf2715d DE |
3315 | fprintf (file, "+"); |
3316 | output_addr_const (file, XEXP (x, 1)); | |
3317 | } | |
3318 | break; | |
3319 | ||
3320 | case MINUS: | |
3321 | /* Avoid outputting things like x-x or x+5-x, | |
3322 | since some assemblers can't handle that. */ | |
3323 | x = simplify_subtraction (x); | |
3324 | if (GET_CODE (x) != MINUS) | |
3325 | goto restart; | |
3326 | ||
3327 | output_addr_const (file, XEXP (x, 0)); | |
3328 | fprintf (file, "-"); | |
301d03af RS |
3329 | if ((GET_CODE (XEXP (x, 1)) == CONST_INT && INTVAL (XEXP (x, 1)) >= 0) |
3330 | || GET_CODE (XEXP (x, 1)) == PC | |
3331 | || GET_CODE (XEXP (x, 1)) == SYMBOL_REF) | |
3332 | output_addr_const (file, XEXP (x, 1)); | |
3333 | else | |
3cf2715d | 3334 | { |
17b53c33 | 3335 | fputs (targetm.asm_out.open_paren, file); |
3cf2715d | 3336 | output_addr_const (file, XEXP (x, 1)); |
17b53c33 | 3337 | fputs (targetm.asm_out.close_paren, file); |
3cf2715d | 3338 | } |
3cf2715d DE |
3339 | break; |
3340 | ||
3341 | case ZERO_EXTEND: | |
3342 | case SIGN_EXTEND: | |
fdf473ae | 3343 | case SUBREG: |
3cf2715d DE |
3344 | output_addr_const (file, XEXP (x, 0)); |
3345 | break; | |
3346 | ||
3347 | default: | |
422be3c3 AO |
3348 | #ifdef OUTPUT_ADDR_CONST_EXTRA |
3349 | OUTPUT_ADDR_CONST_EXTRA (file, x, fail); | |
3350 | break; | |
3351 | ||
3352 | fail: | |
3353 | #endif | |
3cf2715d DE |
3354 | output_operand_lossage ("invalid expression as operand"); |
3355 | } | |
3356 | } | |
3357 | \f | |
3358 | /* A poor man's fprintf, with the added features of %I, %R, %L, and %U. | |
3359 | %R prints the value of REGISTER_PREFIX. | |
3360 | %L prints the value of LOCAL_LABEL_PREFIX. | |
3361 | %U prints the value of USER_LABEL_PREFIX. | |
3362 | %I prints the value of IMMEDIATE_PREFIX. | |
3363 | %O runs ASM_OUTPUT_OPCODE to transform what follows in the string. | |
b1721339 | 3364 | Also supported are %d, %i, %u, %x, %X, %o, %c, %s and %%. |
3cf2715d DE |
3365 | |
3366 | We handle alternate assembler dialects here, just like output_asm_insn. */ | |
3367 | ||
3368 | void | |
e34d07f2 | 3369 | asm_fprintf (FILE *file, const char *p, ...) |
3cf2715d | 3370 | { |
3cf2715d DE |
3371 | char buf[10]; |
3372 | char *q, c; | |
e34d07f2 | 3373 | va_list argptr; |
6cf9ac28 | 3374 | |
e34d07f2 | 3375 | va_start (argptr, p); |
3cf2715d DE |
3376 | |
3377 | buf[0] = '%'; | |
3378 | ||
b729186a | 3379 | while ((c = *p++)) |
3cf2715d DE |
3380 | switch (c) |
3381 | { | |
3382 | #ifdef ASSEMBLER_DIALECT | |
3383 | case '{': | |
b729186a JL |
3384 | { |
3385 | int i; | |
3cf2715d | 3386 | |
b729186a JL |
3387 | /* If we want the first dialect, do nothing. Otherwise, skip |
3388 | DIALECT_NUMBER of strings ending with '|'. */ | |
3389 | for (i = 0; i < dialect_number; i++) | |
3390 | { | |
3391 | while (*p && *p++ != '|') | |
3392 | ; | |
3393 | ||
3394 | if (*p == '|') | |
3395 | p++; | |
f5d927c0 | 3396 | } |
b729186a | 3397 | } |
3cf2715d DE |
3398 | break; |
3399 | ||
3400 | case '|': | |
3401 | /* Skip to close brace. */ | |
3402 | while (*p && *p++ != '}') | |
3403 | ; | |
3404 | break; | |
3405 | ||
3406 | case '}': | |
3407 | break; | |
3408 | #endif | |
3409 | ||
3410 | case '%': | |
3411 | c = *p++; | |
3412 | q = &buf[1]; | |
b1721339 KG |
3413 | while (strchr ("-+ #0", c)) |
3414 | { | |
3415 | *q++ = c; | |
3416 | c = *p++; | |
3417 | } | |
0df6c2c7 | 3418 | while (ISDIGIT (c) || c == '.') |
3cf2715d DE |
3419 | { |
3420 | *q++ = c; | |
3421 | c = *p++; | |
3422 | } | |
3423 | switch (c) | |
3424 | { | |
3425 | case '%': | |
b1721339 | 3426 | putc ('%', file); |
3cf2715d DE |
3427 | break; |
3428 | ||
3429 | case 'd': case 'i': case 'u': | |
b1721339 KG |
3430 | case 'x': case 'X': case 'o': |
3431 | case 'c': | |
3cf2715d DE |
3432 | *q++ = c; |
3433 | *q = 0; | |
3434 | fprintf (file, buf, va_arg (argptr, int)); | |
3435 | break; | |
3436 | ||
3437 | case 'w': | |
b1721339 KG |
3438 | /* This is a prefix to the 'd', 'i', 'u', 'x', 'X', and |
3439 | 'o' cases, but we do not check for those cases. It | |
3440 | means that the value is a HOST_WIDE_INT, which may be | |
3441 | either `long' or `long long'. */ | |
85f015e1 KG |
3442 | memcpy (q, HOST_WIDE_INT_PRINT, strlen (HOST_WIDE_INT_PRINT)); |
3443 | q += strlen (HOST_WIDE_INT_PRINT); | |
3cf2715d DE |
3444 | *q++ = *p++; |
3445 | *q = 0; | |
3446 | fprintf (file, buf, va_arg (argptr, HOST_WIDE_INT)); | |
3447 | break; | |
3448 | ||
3449 | case 'l': | |
3450 | *q++ = c; | |
b1721339 KG |
3451 | #ifdef HAVE_LONG_LONG |
3452 | if (*p == 'l') | |
3453 | { | |
3454 | *q++ = *p++; | |
3455 | *q++ = *p++; | |
3456 | *q = 0; | |
3457 | fprintf (file, buf, va_arg (argptr, long long)); | |
3458 | } | |
3459 | else | |
3460 | #endif | |
3461 | { | |
3462 | *q++ = *p++; | |
3463 | *q = 0; | |
3464 | fprintf (file, buf, va_arg (argptr, long)); | |
3465 | } | |
6cf9ac28 | 3466 | |
3cf2715d DE |
3467 | break; |
3468 | ||
3469 | case 's': | |
3470 | *q++ = c; | |
3471 | *q = 0; | |
3472 | fprintf (file, buf, va_arg (argptr, char *)); | |
3473 | break; | |
3474 | ||
3475 | case 'O': | |
3476 | #ifdef ASM_OUTPUT_OPCODE | |
3477 | ASM_OUTPUT_OPCODE (asm_out_file, p); | |
3478 | #endif | |
3479 | break; | |
3480 | ||
3481 | case 'R': | |
3482 | #ifdef REGISTER_PREFIX | |
3483 | fprintf (file, "%s", REGISTER_PREFIX); | |
3484 | #endif | |
3485 | break; | |
3486 | ||
3487 | case 'I': | |
3488 | #ifdef IMMEDIATE_PREFIX | |
3489 | fprintf (file, "%s", IMMEDIATE_PREFIX); | |
3490 | #endif | |
3491 | break; | |
3492 | ||
3493 | case 'L': | |
3494 | #ifdef LOCAL_LABEL_PREFIX | |
3495 | fprintf (file, "%s", LOCAL_LABEL_PREFIX); | |
3496 | #endif | |
3497 | break; | |
3498 | ||
3499 | case 'U': | |
19283265 | 3500 | fputs (user_label_prefix, file); |
3cf2715d DE |
3501 | break; |
3502 | ||
fe0503ea | 3503 | #ifdef ASM_FPRINTF_EXTENSIONS |
7ef0daad | 3504 | /* Uppercase letters are reserved for general use by asm_fprintf |
fe0503ea NC |
3505 | and so are not available to target specific code. In order to |
3506 | prevent the ASM_FPRINTF_EXTENSIONS macro from using them then, | |
3507 | they are defined here. As they get turned into real extensions | |
3508 | to asm_fprintf they should be removed from this list. */ | |
3509 | case 'A': case 'B': case 'C': case 'D': case 'E': | |
3510 | case 'F': case 'G': case 'H': case 'J': case 'K': | |
3511 | case 'M': case 'N': case 'P': case 'Q': case 'S': | |
3512 | case 'T': case 'V': case 'W': case 'Y': case 'Z': | |
3513 | break; | |
f5d927c0 | 3514 | |
fe0503ea NC |
3515 | ASM_FPRINTF_EXTENSIONS (file, argptr, p) |
3516 | #endif | |
3cf2715d | 3517 | default: |
0bccc606 | 3518 | gcc_unreachable (); |
3cf2715d DE |
3519 | } |
3520 | break; | |
3521 | ||
3522 | default: | |
b1721339 | 3523 | putc (c, file); |
3cf2715d | 3524 | } |
e34d07f2 | 3525 | va_end (argptr); |
3cf2715d DE |
3526 | } |
3527 | \f | |
3528 | /* Split up a CONST_DOUBLE or integer constant rtx | |
3529 | into two rtx's for single words, | |
3530 | storing in *FIRST the word that comes first in memory in the target | |
3531 | and in *SECOND the other. */ | |
3532 | ||
3533 | void | |
6cf9ac28 | 3534 | split_double (rtx value, rtx *first, rtx *second) |
3cf2715d DE |
3535 | { |
3536 | if (GET_CODE (value) == CONST_INT) | |
3537 | { | |
5a1a6efd | 3538 | if (HOST_BITS_PER_WIDE_INT >= (2 * BITS_PER_WORD)) |
f76b9db2 | 3539 | { |
5a1a6efd | 3540 | /* In this case the CONST_INT holds both target words. |
27eef9ce JC |
3541 | Extract the bits from it into two word-sized pieces. |
3542 | Sign extend each half to HOST_WIDE_INT. */ | |
7f251dee AO |
3543 | unsigned HOST_WIDE_INT low, high; |
3544 | unsigned HOST_WIDE_INT mask, sign_bit, sign_extend; | |
3545 | ||
3546 | /* Set sign_bit to the most significant bit of a word. */ | |
3547 | sign_bit = 1; | |
3548 | sign_bit <<= BITS_PER_WORD - 1; | |
3549 | ||
3550 | /* Set mask so that all bits of the word are set. We could | |
3551 | have used 1 << BITS_PER_WORD instead of basing the | |
3552 | calculation on sign_bit. However, on machines where | |
3553 | HOST_BITS_PER_WIDE_INT == BITS_PER_WORD, it could cause a | |
3554 | compiler warning, even though the code would never be | |
3555 | executed. */ | |
3556 | mask = sign_bit << 1; | |
3557 | mask--; | |
3558 | ||
3559 | /* Set sign_extend as any remaining bits. */ | |
3560 | sign_extend = ~mask; | |
f5d927c0 | 3561 | |
7f251dee AO |
3562 | /* Pick the lower word and sign-extend it. */ |
3563 | low = INTVAL (value); | |
3564 | low &= mask; | |
3565 | if (low & sign_bit) | |
3566 | low |= sign_extend; | |
3567 | ||
3568 | /* Pick the higher word, shifted to the least significant | |
3569 | bits, and sign-extend it. */ | |
3570 | high = INTVAL (value); | |
3571 | high >>= BITS_PER_WORD - 1; | |
3572 | high >>= 1; | |
3573 | high &= mask; | |
3574 | if (high & sign_bit) | |
3575 | high |= sign_extend; | |
3576 | ||
3577 | /* Store the words in the target machine order. */ | |
5a1a6efd RK |
3578 | if (WORDS_BIG_ENDIAN) |
3579 | { | |
7f251dee AO |
3580 | *first = GEN_INT (high); |
3581 | *second = GEN_INT (low); | |
5a1a6efd RK |
3582 | } |
3583 | else | |
3584 | { | |
7f251dee AO |
3585 | *first = GEN_INT (low); |
3586 | *second = GEN_INT (high); | |
5a1a6efd | 3587 | } |
f76b9db2 ILT |
3588 | } |
3589 | else | |
3590 | { | |
5a1a6efd RK |
3591 | /* The rule for using CONST_INT for a wider mode |
3592 | is that we regard the value as signed. | |
3593 | So sign-extend it. */ | |
3594 | rtx high = (INTVAL (value) < 0 ? constm1_rtx : const0_rtx); | |
3595 | if (WORDS_BIG_ENDIAN) | |
3596 | { | |
3597 | *first = high; | |
3598 | *second = value; | |
3599 | } | |
3600 | else | |
3601 | { | |
3602 | *first = value; | |
3603 | *second = high; | |
3604 | } | |
f76b9db2 | 3605 | } |
3cf2715d DE |
3606 | } |
3607 | else if (GET_CODE (value) != CONST_DOUBLE) | |
3608 | { | |
f76b9db2 ILT |
3609 | if (WORDS_BIG_ENDIAN) |
3610 | { | |
3611 | *first = const0_rtx; | |
3612 | *second = value; | |
3613 | } | |
3614 | else | |
3615 | { | |
3616 | *first = value; | |
3617 | *second = const0_rtx; | |
3618 | } | |
3cf2715d DE |
3619 | } |
3620 | else if (GET_MODE (value) == VOIDmode | |
3621 | /* This is the old way we did CONST_DOUBLE integers. */ | |
3622 | || GET_MODE_CLASS (GET_MODE (value)) == MODE_INT) | |
3623 | { | |
3624 | /* In an integer, the words are defined as most and least significant. | |
3625 | So order them by the target's convention. */ | |
f76b9db2 ILT |
3626 | if (WORDS_BIG_ENDIAN) |
3627 | { | |
3628 | *first = GEN_INT (CONST_DOUBLE_HIGH (value)); | |
3629 | *second = GEN_INT (CONST_DOUBLE_LOW (value)); | |
3630 | } | |
3631 | else | |
3632 | { | |
3633 | *first = GEN_INT (CONST_DOUBLE_LOW (value)); | |
3634 | *second = GEN_INT (CONST_DOUBLE_HIGH (value)); | |
3635 | } | |
3cf2715d DE |
3636 | } |
3637 | else | |
3638 | { | |
f5d927c0 KH |
3639 | REAL_VALUE_TYPE r; |
3640 | long l[2]; | |
3cf2715d DE |
3641 | REAL_VALUE_FROM_CONST_DOUBLE (r, value); |
3642 | ||
3643 | /* Note, this converts the REAL_VALUE_TYPE to the target's | |
3644 | format, splits up the floating point double and outputs | |
3645 | exactly 32 bits of it into each of l[0] and l[1] -- | |
0f41302f | 3646 | not necessarily BITS_PER_WORD bits. */ |
3cf2715d DE |
3647 | REAL_VALUE_TO_TARGET_DOUBLE (r, l); |
3648 | ||
b5a3eb84 JW |
3649 | /* If 32 bits is an entire word for the target, but not for the host, |
3650 | then sign-extend on the host so that the number will look the same | |
3651 | way on the host that it would on the target. See for instance | |
3652 | simplify_unary_operation. The #if is needed to avoid compiler | |
3653 | warnings. */ | |
3654 | ||
3655 | #if HOST_BITS_PER_LONG > 32 | |
3656 | if (BITS_PER_WORD < HOST_BITS_PER_LONG && BITS_PER_WORD == 32) | |
3657 | { | |
3658 | if (l[0] & ((long) 1 << 31)) | |
3659 | l[0] |= ((long) (-1) << 32); | |
3660 | if (l[1] & ((long) 1 << 31)) | |
3661 | l[1] |= ((long) (-1) << 32); | |
3662 | } | |
3663 | #endif | |
3664 | ||
3e95a7cb ZW |
3665 | *first = GEN_INT (l[0]); |
3666 | *second = GEN_INT (l[1]); | |
3cf2715d DE |
3667 | } |
3668 | } | |
3669 | \f | |
3670 | /* Return nonzero if this function has no function calls. */ | |
3671 | ||
3672 | int | |
6cf9ac28 | 3673 | leaf_function_p (void) |
3cf2715d DE |
3674 | { |
3675 | rtx insn; | |
b660f82f | 3676 | rtx link; |
3cf2715d | 3677 | |
70f4f91c | 3678 | if (current_function_profile || profile_arc_flag) |
3cf2715d DE |
3679 | return 0; |
3680 | ||
3681 | for (insn = get_insns (); insn; insn = NEXT_INSN (insn)) | |
3682 | { | |
4b4bf941 | 3683 | if (CALL_P (insn) |
7d167afd | 3684 | && ! SIBLING_CALL_P (insn)) |
3cf2715d | 3685 | return 0; |
4b4bf941 | 3686 | if (NONJUMP_INSN_P (insn) |
3cf2715d | 3687 | && GET_CODE (PATTERN (insn)) == SEQUENCE |
4b4bf941 | 3688 | && CALL_P (XVECEXP (PATTERN (insn), 0, 0)) |
0a1c58a2 | 3689 | && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0))) |
3cf2715d DE |
3690 | return 0; |
3691 | } | |
b660f82f JW |
3692 | for (link = current_function_epilogue_delay_list; |
3693 | link; | |
3694 | link = XEXP (link, 1)) | |
3cf2715d | 3695 | { |
b660f82f JW |
3696 | insn = XEXP (link, 0); |
3697 | ||
4b4bf941 | 3698 | if (CALL_P (insn) |
7d167afd | 3699 | && ! SIBLING_CALL_P (insn)) |
3cf2715d | 3700 | return 0; |
4b4bf941 | 3701 | if (NONJUMP_INSN_P (insn) |
b660f82f | 3702 | && GET_CODE (PATTERN (insn)) == SEQUENCE |
4b4bf941 | 3703 | && CALL_P (XVECEXP (PATTERN (insn), 0, 0)) |
b660f82f | 3704 | && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0))) |
3cf2715d DE |
3705 | return 0; |
3706 | } | |
3707 | ||
3708 | return 1; | |
3709 | } | |
3710 | ||
09da1532 | 3711 | /* Return 1 if branch is a forward branch. |
ef6257cd JH |
3712 | Uses insn_shuid array, so it works only in the final pass. May be used by |
3713 | output templates to customary add branch prediction hints. | |
3714 | */ | |
3715 | int | |
6cf9ac28 | 3716 | final_forward_branch_p (rtx insn) |
ef6257cd JH |
3717 | { |
3718 | int insn_id, label_id; | |
0bccc606 NS |
3719 | |
3720 | gcc_assert (uid_shuid); | |
ef6257cd JH |
3721 | insn_id = INSN_SHUID (insn); |
3722 | label_id = INSN_SHUID (JUMP_LABEL (insn)); | |
3723 | /* We've hit some insns that does not have id information available. */ | |
0bccc606 | 3724 | gcc_assert (insn_id && label_id); |
ef6257cd JH |
3725 | return insn_id < label_id; |
3726 | } | |
3727 | ||
3cf2715d DE |
3728 | /* On some machines, a function with no call insns |
3729 | can run faster if it doesn't create its own register window. | |
3730 | When output, the leaf function should use only the "output" | |
3731 | registers. Ordinarily, the function would be compiled to use | |
3732 | the "input" registers to find its arguments; it is a candidate | |
3733 | for leaf treatment if it uses only the "input" registers. | |
3734 | Leaf function treatment means renumbering so the function | |
3735 | uses the "output" registers instead. */ | |
3736 | ||
3737 | #ifdef LEAF_REGISTERS | |
3738 | ||
3cf2715d DE |
3739 | /* Return 1 if this function uses only the registers that can be |
3740 | safely renumbered. */ | |
3741 | ||
3742 | int | |
6cf9ac28 | 3743 | only_leaf_regs_used (void) |
3cf2715d DE |
3744 | { |
3745 | int i; | |
4977bab6 | 3746 | const char *const permitted_reg_in_leaf_functions = LEAF_REGISTERS; |
3cf2715d DE |
3747 | |
3748 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
e5e809f4 JL |
3749 | if ((regs_ever_live[i] || global_regs[i]) |
3750 | && ! permitted_reg_in_leaf_functions[i]) | |
3751 | return 0; | |
3752 | ||
3753 | if (current_function_uses_pic_offset_table | |
3754 | && pic_offset_table_rtx != 0 | |
f8cfc6aa | 3755 | && REG_P (pic_offset_table_rtx) |
e5e809f4 JL |
3756 | && ! permitted_reg_in_leaf_functions[REGNO (pic_offset_table_rtx)]) |
3757 | return 0; | |
3758 | ||
3cf2715d DE |
3759 | return 1; |
3760 | } | |
3761 | ||
3762 | /* Scan all instructions and renumber all registers into those | |
3763 | available in leaf functions. */ | |
3764 | ||
3765 | static void | |
6cf9ac28 | 3766 | leaf_renumber_regs (rtx first) |
3cf2715d DE |
3767 | { |
3768 | rtx insn; | |
3769 | ||
3770 | /* Renumber only the actual patterns. | |
3771 | The reg-notes can contain frame pointer refs, | |
3772 | and renumbering them could crash, and should not be needed. */ | |
3773 | for (insn = first; insn; insn = NEXT_INSN (insn)) | |
2c3c49de | 3774 | if (INSN_P (insn)) |
3cf2715d | 3775 | leaf_renumber_regs_insn (PATTERN (insn)); |
f5d927c0 KH |
3776 | for (insn = current_function_epilogue_delay_list; |
3777 | insn; | |
3778 | insn = XEXP (insn, 1)) | |
2c3c49de | 3779 | if (INSN_P (XEXP (insn, 0))) |
3cf2715d DE |
3780 | leaf_renumber_regs_insn (PATTERN (XEXP (insn, 0))); |
3781 | } | |
3782 | ||
3783 | /* Scan IN_RTX and its subexpressions, and renumber all regs into those | |
3784 | available in leaf functions. */ | |
3785 | ||
3786 | void | |
6cf9ac28 | 3787 | leaf_renumber_regs_insn (rtx in_rtx) |
3cf2715d | 3788 | { |
b3694847 SS |
3789 | int i, j; |
3790 | const char *format_ptr; | |
3cf2715d DE |
3791 | |
3792 | if (in_rtx == 0) | |
3793 | return; | |
3794 | ||
3795 | /* Renumber all input-registers into output-registers. | |
3796 | renumbered_regs would be 1 for an output-register; | |
3797 | they */ | |
3798 | ||
f8cfc6aa | 3799 | if (REG_P (in_rtx)) |
3cf2715d DE |
3800 | { |
3801 | int newreg; | |
3802 | ||
3803 | /* Don't renumber the same reg twice. */ | |
3804 | if (in_rtx->used) | |
3805 | return; | |
3806 | ||
3807 | newreg = REGNO (in_rtx); | |
3808 | /* Don't try to renumber pseudo regs. It is possible for a pseudo reg | |
3809 | to reach here as part of a REG_NOTE. */ | |
3810 | if (newreg >= FIRST_PSEUDO_REGISTER) | |
3811 | { | |
3812 | in_rtx->used = 1; | |
3813 | return; | |
3814 | } | |
3815 | newreg = LEAF_REG_REMAP (newreg); | |
0bccc606 | 3816 | gcc_assert (newreg >= 0); |
3cf2715d DE |
3817 | regs_ever_live[REGNO (in_rtx)] = 0; |
3818 | regs_ever_live[newreg] = 1; | |
3819 | REGNO (in_rtx) = newreg; | |
3820 | in_rtx->used = 1; | |
3821 | } | |
3822 | ||
2c3c49de | 3823 | if (INSN_P (in_rtx)) |
3cf2715d DE |
3824 | { |
3825 | /* Inside a SEQUENCE, we find insns. | |
3826 | Renumber just the patterns of these insns, | |
3827 | just as we do for the top-level insns. */ | |
3828 | leaf_renumber_regs_insn (PATTERN (in_rtx)); | |
3829 | return; | |
3830 | } | |
3831 | ||
3832 | format_ptr = GET_RTX_FORMAT (GET_CODE (in_rtx)); | |
3833 | ||
3834 | for (i = 0; i < GET_RTX_LENGTH (GET_CODE (in_rtx)); i++) | |
3835 | switch (*format_ptr++) | |
3836 | { | |
3837 | case 'e': | |
3838 | leaf_renumber_regs_insn (XEXP (in_rtx, i)); | |
3839 | break; | |
3840 | ||
3841 | case 'E': | |
3842 | if (NULL != XVEC (in_rtx, i)) | |
3843 | { | |
3844 | for (j = 0; j < XVECLEN (in_rtx, i); j++) | |
3845 | leaf_renumber_regs_insn (XVECEXP (in_rtx, i, j)); | |
3846 | } | |
3847 | break; | |
3848 | ||
3849 | case 'S': | |
3850 | case 's': | |
3851 | case '0': | |
3852 | case 'i': | |
3853 | case 'w': | |
3854 | case 'n': | |
3855 | case 'u': | |
3856 | break; | |
3857 | ||
3858 | default: | |
0bccc606 | 3859 | gcc_unreachable (); |
3cf2715d DE |
3860 | } |
3861 | } | |
3862 | #endif | |
6a08f7b3 DP |
3863 | |
3864 | ||
3865 | /* When -gused is used, emit debug info for only used symbols. But in | |
3866 | addition to the standard intercepted debug_hooks there are some direct | |
3867 | calls into this file, i.e., dbxout_symbol, dbxout_parms, and dbxout_reg_params. | |
3868 | Those routines may also be called from a higher level intercepted routine. So | |
3869 | to prevent recording data for an inner call to one of these for an intercept, | |
5d3cc252 | 3870 | we maintain an intercept nesting counter (debug_nesting). We only save the |
6a08f7b3 DP |
3871 | intercepted arguments if the nesting is 1. */ |
3872 | int debug_nesting = 0; | |
3873 | ||
3874 | static tree *symbol_queue; | |
3875 | int symbol_queue_index = 0; | |
3876 | static int symbol_queue_size = 0; | |
3877 | ||
3878 | /* Generate the symbols for any queued up type symbols we encountered | |
3879 | while generating the type info for some originally used symbol. | |
3880 | This might generate additional entries in the queue. Only when | |
3881 | the nesting depth goes to 0 is this routine called. */ | |
3882 | ||
3883 | void | |
6cf9ac28 | 3884 | debug_flush_symbol_queue (void) |
6a08f7b3 DP |
3885 | { |
3886 | int i; | |
6cf9ac28 | 3887 | |
6a08f7b3 DP |
3888 | /* Make sure that additionally queued items are not flushed |
3889 | prematurely. */ | |
6cf9ac28 | 3890 | |
6a08f7b3 | 3891 | ++debug_nesting; |
6cf9ac28 | 3892 | |
6a08f7b3 DP |
3893 | for (i = 0; i < symbol_queue_index; ++i) |
3894 | { | |
3895 | /* If we pushed queued symbols then such symbols are must be | |
3896 | output no matter what anyone else says. Specifically, | |
3897 | we need to make sure dbxout_symbol() thinks the symbol was | |
3898 | used and also we need to override TYPE_DECL_SUPPRESS_DEBUG | |
3899 | which may be set for outside reasons. */ | |
3900 | int saved_tree_used = TREE_USED (symbol_queue[i]); | |
3901 | int saved_suppress_debug = TYPE_DECL_SUPPRESS_DEBUG (symbol_queue[i]); | |
3902 | TREE_USED (symbol_queue[i]) = 1; | |
3903 | TYPE_DECL_SUPPRESS_DEBUG (symbol_queue[i]) = 0; | |
3904 | ||
3905 | #ifdef DBX_DEBUGGING_INFO | |
3906 | dbxout_symbol (symbol_queue[i], 0); | |
3907 | #endif | |
3908 | ||
3909 | TREE_USED (symbol_queue[i]) = saved_tree_used; | |
3910 | TYPE_DECL_SUPPRESS_DEBUG (symbol_queue[i]) = saved_suppress_debug; | |
3911 | } | |
3912 | ||
3913 | symbol_queue_index = 0; | |
6cf9ac28 | 3914 | --debug_nesting; |
6a08f7b3 DP |
3915 | } |
3916 | ||
3917 | /* Queue a type symbol needed as part of the definition of a decl | |
3918 | symbol. These symbols are generated when debug_flush_symbol_queue() | |
3919 | is called. */ | |
3920 | ||
6cf9ac28 | 3921 | void |
6a08f7b3 DP |
3922 | debug_queue_symbol (tree decl) |
3923 | { | |
6cf9ac28 | 3924 | if (symbol_queue_index >= symbol_queue_size) |
6a08f7b3 DP |
3925 | { |
3926 | symbol_queue_size += 10; | |
703ad42b KG |
3927 | symbol_queue = xrealloc (symbol_queue, |
3928 | symbol_queue_size * sizeof (tree)); | |
6a08f7b3 DP |
3929 | } |
3930 | ||
3931 | symbol_queue[symbol_queue_index++] = decl; | |
6cf9ac28 | 3932 | } |
6a08f7b3 | 3933 | |
f9da5064 | 3934 | /* Free symbol queue. */ |
6a08f7b3 | 3935 | void |
6cf9ac28 | 3936 | debug_free_queue (void) |
6a08f7b3 DP |
3937 | { |
3938 | if (symbol_queue) | |
3939 | { | |
3940 | free (symbol_queue); | |
3941 | symbol_queue = NULL; | |
3942 | symbol_queue_size = 0; | |
3943 | } | |
3944 | } |