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3cf2715d | 1 | /* Convert RTL to assembler code and output it, for GNU compiler. |
23a5b65a | 2 | Copyright (C) 1987-2014 Free Software Foundation, Inc. |
3cf2715d | 3 | |
1322177d | 4 | This file is part of GCC. |
3cf2715d | 5 | |
1322177d LB |
6 | GCC is free software; you can redistribute it and/or modify it under |
7 | the terms of the GNU General Public License as published by the Free | |
9dcd6f09 | 8 | Software Foundation; either version 3, or (at your option) any later |
1322177d | 9 | version. |
3cf2715d | 10 | |
1322177d LB |
11 | GCC is distributed in the hope that it will be useful, but WITHOUT ANY |
12 | WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
13 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
14 | for more details. | |
3cf2715d DE |
15 | |
16 | You should have received a copy of the GNU General Public License | |
9dcd6f09 NC |
17 | along with GCC; see the file COPYING3. If not see |
18 | <http://www.gnu.org/licenses/>. */ | |
3cf2715d | 19 | |
3cf2715d DE |
20 | /* This is the final pass of the compiler. |
21 | It looks at the rtl code for a function and outputs assembler code. | |
22 | ||
23 | Call `final_start_function' to output the assembler code for function entry, | |
24 | `final' to output assembler code for some RTL code, | |
25 | `final_end_function' to output assembler code for function exit. | |
26 | If a function is compiled in several pieces, each piece is | |
27 | output separately with `final'. | |
28 | ||
29 | Some optimizations are also done at this level. | |
30 | Move instructions that were made unnecessary by good register allocation | |
31 | are detected and omitted from the output. (Though most of these | |
32 | are removed by the last jump pass.) | |
33 | ||
34 | Instructions to set the condition codes are omitted when it can be | |
35 | seen that the condition codes already had the desired values. | |
36 | ||
37 | In some cases it is sufficient if the inherited condition codes | |
38 | have related values, but this may require the following insn | |
39 | (the one that tests the condition codes) to be modified. | |
40 | ||
41 | The code for the function prologue and epilogue are generated | |
08c148a8 NB |
42 | directly in assembler by the target functions function_prologue and |
43 | function_epilogue. Those instructions never exist as rtl. */ | |
3cf2715d DE |
44 | |
45 | #include "config.h" | |
670ee920 | 46 | #include "system.h" |
4977bab6 ZW |
47 | #include "coretypes.h" |
48 | #include "tm.h" | |
3cf2715d DE |
49 | |
50 | #include "tree.h" | |
d8a2d370 | 51 | #include "varasm.h" |
27c07cc5 | 52 | #include "hard-reg-set.h" |
3cf2715d | 53 | #include "rtl.h" |
6baf1cc8 | 54 | #include "tm_p.h" |
3cf2715d DE |
55 | #include "regs.h" |
56 | #include "insn-config.h" | |
3cf2715d | 57 | #include "insn-attr.h" |
3cf2715d DE |
58 | #include "recog.h" |
59 | #include "conditions.h" | |
60 | #include "flags.h" | |
3cf2715d | 61 | #include "output.h" |
3d195391 | 62 | #include "except.h" |
49ad7cfa | 63 | #include "function.h" |
0cbd9993 MLI |
64 | #include "rtl-error.h" |
65 | #include "toplev.h" /* exact_log2, floor_log2 */ | |
d6f4ec51 | 66 | #include "reload.h" |
ab87f8c8 | 67 | #include "intl.h" |
be1bb652 | 68 | #include "basic-block.h" |
08c148a8 | 69 | #include "target.h" |
ad0c4c36 | 70 | #include "targhooks.h" |
a5a42b92 | 71 | #include "debug.h" |
49d801d3 | 72 | #include "expr.h" |
ef330312 | 73 | #include "tree-pass.h" |
ef330312 | 74 | #include "cgraph.h" |
442b4905 | 75 | #include "tree-ssa.h" |
ef330312 | 76 | #include "coverage.h" |
6fb5fa3c | 77 | #include "df.h" |
c8aea42c | 78 | #include "ggc.h" |
edbed3d3 JH |
79 | #include "cfgloop.h" |
80 | #include "params.h" | |
6f4185d7 | 81 | #include "tree-pretty-print.h" /* for dump_function_header */ |
ef1b3fda | 82 | #include "asan.h" |
807e902e | 83 | #include "wide-int-print.h" |
3cf2715d | 84 | |
440aabf8 NB |
85 | #ifdef XCOFF_DEBUGGING_INFO |
86 | #include "xcoffout.h" /* Needed for external data | |
87 | declarations for e.g. AIX 4.x. */ | |
88 | #endif | |
89 | ||
76ead72b | 90 | #include "dwarf2out.h" |
76ead72b | 91 | |
6a08f7b3 DP |
92 | #ifdef DBX_DEBUGGING_INFO |
93 | #include "dbxout.h" | |
94 | #endif | |
95 | ||
ce82daed DB |
96 | #ifdef SDB_DEBUGGING_INFO |
97 | #include "sdbout.h" | |
98 | #endif | |
99 | ||
906668bb BS |
100 | /* Most ports that aren't using cc0 don't need to define CC_STATUS_INIT. |
101 | So define a null default for it to save conditionalization later. */ | |
3cf2715d DE |
102 | #ifndef CC_STATUS_INIT |
103 | #define CC_STATUS_INIT | |
104 | #endif | |
105 | ||
3cf2715d DE |
106 | /* Is the given character a logical line separator for the assembler? */ |
107 | #ifndef IS_ASM_LOGICAL_LINE_SEPARATOR | |
980d8882 | 108 | #define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) ((C) == ';') |
3cf2715d DE |
109 | #endif |
110 | ||
75197b37 BS |
111 | #ifndef JUMP_TABLES_IN_TEXT_SECTION |
112 | #define JUMP_TABLES_IN_TEXT_SECTION 0 | |
113 | #endif | |
114 | ||
589fe865 | 115 | /* Bitflags used by final_scan_insn. */ |
70aacc97 JJ |
116 | #define SEEN_NOTE 1 |
117 | #define SEEN_EMITTED 2 | |
589fe865 | 118 | |
3cf2715d | 119 | /* Last insn processed by final_scan_insn. */ |
b1a9f6a0 RH |
120 | static rtx debug_insn; |
121 | rtx current_output_insn; | |
3cf2715d DE |
122 | |
123 | /* Line number of last NOTE. */ | |
124 | static int last_linenum; | |
125 | ||
6c52e687 CC |
126 | /* Last discriminator written to assembly. */ |
127 | static int last_discriminator; | |
128 | ||
129 | /* Discriminator of current block. */ | |
130 | static int discriminator; | |
131 | ||
eac40081 RK |
132 | /* Highest line number in current block. */ |
133 | static int high_block_linenum; | |
134 | ||
135 | /* Likewise for function. */ | |
136 | static int high_function_linenum; | |
137 | ||
3cf2715d | 138 | /* Filename of last NOTE. */ |
3cce094d | 139 | static const char *last_filename; |
3cf2715d | 140 | |
d752cfdb JJ |
141 | /* Override filename and line number. */ |
142 | static const char *override_filename; | |
143 | static int override_linenum; | |
144 | ||
b8176fe4 EB |
145 | /* Whether to force emission of a line note before the next insn. */ |
146 | static bool force_source_line = false; | |
b0efb46b | 147 | |
5f2f0edd | 148 | extern const int length_unit_log; /* This is defined in insn-attrtab.c. */ |
fc470718 | 149 | |
3cf2715d | 150 | /* Nonzero while outputting an `asm' with operands. |
535a42b1 | 151 | This means that inconsistencies are the user's fault, so don't die. |
3cf2715d | 152 | The precise value is the insn being output, to pass to error_for_asm. */ |
c8b94768 | 153 | rtx this_is_asm_operands; |
3cf2715d DE |
154 | |
155 | /* Number of operands of this insn, for an `asm' with operands. */ | |
22bf4422 | 156 | static unsigned int insn_noperands; |
3cf2715d DE |
157 | |
158 | /* Compare optimization flag. */ | |
159 | ||
160 | static rtx last_ignored_compare = 0; | |
161 | ||
3cf2715d DE |
162 | /* Assign a unique number to each insn that is output. |
163 | This can be used to generate unique local labels. */ | |
164 | ||
165 | static int insn_counter = 0; | |
166 | ||
167 | #ifdef HAVE_cc0 | |
168 | /* This variable contains machine-dependent flags (defined in tm.h) | |
169 | set and examined by output routines | |
170 | that describe how to interpret the condition codes properly. */ | |
171 | ||
172 | CC_STATUS cc_status; | |
173 | ||
174 | /* During output of an insn, this contains a copy of cc_status | |
175 | from before the insn. */ | |
176 | ||
177 | CC_STATUS cc_prev_status; | |
178 | #endif | |
179 | ||
18c038b9 | 180 | /* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */ |
3cf2715d DE |
181 | |
182 | static int block_depth; | |
183 | ||
184 | /* Nonzero if have enabled APP processing of our assembler output. */ | |
185 | ||
186 | static int app_on; | |
187 | ||
188 | /* If we are outputting an insn sequence, this contains the sequence rtx. | |
189 | Zero otherwise. */ | |
190 | ||
191 | rtx final_sequence; | |
192 | ||
193 | #ifdef ASSEMBLER_DIALECT | |
194 | ||
195 | /* Number of the assembler dialect to use, starting at 0. */ | |
196 | static int dialect_number; | |
197 | #endif | |
198 | ||
afe48e06 RH |
199 | /* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */ |
200 | rtx current_insn_predicate; | |
afe48e06 | 201 | |
6ca5d1f6 JJ |
202 | /* True if printing into -fdump-final-insns= dump. */ |
203 | bool final_insns_dump_p; | |
204 | ||
ddd84654 JJ |
205 | /* True if profile_function should be called, but hasn't been called yet. */ |
206 | static bool need_profile_function; | |
207 | ||
6cf9ac28 | 208 | static int asm_insn_count (rtx); |
6cf9ac28 AJ |
209 | static void profile_function (FILE *); |
210 | static void profile_after_prologue (FILE *); | |
ed5ef2e4 | 211 | static bool notice_source_line (rtx, bool *); |
6fb5fa3c | 212 | static rtx walk_alter_subreg (rtx *, bool *); |
6cf9ac28 AJ |
213 | static void output_asm_name (void); |
214 | static void output_alternate_entry_point (FILE *, rtx); | |
215 | static tree get_mem_expr_from_op (rtx, int *); | |
216 | static void output_asm_operand_names (rtx *, int *, int); | |
e9a25f70 | 217 | #ifdef LEAF_REGISTERS |
6cf9ac28 | 218 | static void leaf_renumber_regs (rtx); |
e9a25f70 JL |
219 | #endif |
220 | #ifdef HAVE_cc0 | |
6cf9ac28 | 221 | static int alter_cond (rtx); |
e9a25f70 | 222 | #endif |
ca3075bd | 223 | #ifndef ADDR_VEC_ALIGN |
6cf9ac28 | 224 | static int final_addr_vec_align (rtx); |
ca3075bd | 225 | #endif |
6cf9ac28 | 226 | static int align_fuzz (rtx, rtx, int, unsigned); |
27c07cc5 | 227 | static void collect_fn_hard_reg_usage (void); |
3cf2715d DE |
228 | \f |
229 | /* Initialize data in final at the beginning of a compilation. */ | |
230 | ||
231 | void | |
6cf9ac28 | 232 | init_final (const char *filename ATTRIBUTE_UNUSED) |
3cf2715d | 233 | { |
3cf2715d | 234 | app_on = 0; |
3cf2715d DE |
235 | final_sequence = 0; |
236 | ||
237 | #ifdef ASSEMBLER_DIALECT | |
238 | dialect_number = ASSEMBLER_DIALECT; | |
239 | #endif | |
240 | } | |
241 | ||
08c148a8 | 242 | /* Default target function prologue and epilogue assembler output. |
b9f22704 | 243 | |
08c148a8 NB |
244 | If not overridden for epilogue code, then the function body itself |
245 | contains return instructions wherever needed. */ | |
246 | void | |
6cf9ac28 AJ |
247 | default_function_pro_epilogue (FILE *file ATTRIBUTE_UNUSED, |
248 | HOST_WIDE_INT size ATTRIBUTE_UNUSED) | |
08c148a8 NB |
249 | { |
250 | } | |
251 | ||
14d11d40 IS |
252 | void |
253 | default_function_switched_text_sections (FILE *file ATTRIBUTE_UNUSED, | |
254 | tree decl ATTRIBUTE_UNUSED, | |
255 | bool new_is_cold ATTRIBUTE_UNUSED) | |
256 | { | |
257 | } | |
258 | ||
b4c25db2 NB |
259 | /* Default target hook that outputs nothing to a stream. */ |
260 | void | |
6cf9ac28 | 261 | no_asm_to_stream (FILE *file ATTRIBUTE_UNUSED) |
b4c25db2 NB |
262 | { |
263 | } | |
264 | ||
3cf2715d DE |
265 | /* Enable APP processing of subsequent output. |
266 | Used before the output from an `asm' statement. */ | |
267 | ||
268 | void | |
6cf9ac28 | 269 | app_enable (void) |
3cf2715d DE |
270 | { |
271 | if (! app_on) | |
272 | { | |
51723711 | 273 | fputs (ASM_APP_ON, asm_out_file); |
3cf2715d DE |
274 | app_on = 1; |
275 | } | |
276 | } | |
277 | ||
278 | /* Disable APP processing of subsequent output. | |
279 | Called from varasm.c before most kinds of output. */ | |
280 | ||
281 | void | |
6cf9ac28 | 282 | app_disable (void) |
3cf2715d DE |
283 | { |
284 | if (app_on) | |
285 | { | |
51723711 | 286 | fputs (ASM_APP_OFF, asm_out_file); |
3cf2715d DE |
287 | app_on = 0; |
288 | } | |
289 | } | |
290 | \f | |
f5d927c0 | 291 | /* Return the number of slots filled in the current |
3cf2715d DE |
292 | delayed branch sequence (we don't count the insn needing the |
293 | delay slot). Zero if not in a delayed branch sequence. */ | |
294 | ||
295 | #ifdef DELAY_SLOTS | |
296 | int | |
6cf9ac28 | 297 | dbr_sequence_length (void) |
3cf2715d DE |
298 | { |
299 | if (final_sequence != 0) | |
300 | return XVECLEN (final_sequence, 0) - 1; | |
301 | else | |
302 | return 0; | |
303 | } | |
304 | #endif | |
305 | \f | |
306 | /* The next two pages contain routines used to compute the length of an insn | |
307 | and to shorten branches. */ | |
308 | ||
309 | /* Arrays for insn lengths, and addresses. The latter is referenced by | |
310 | `insn_current_length'. */ | |
311 | ||
addd7df6 | 312 | static int *insn_lengths; |
9d98a694 | 313 | |
9771b263 | 314 | vec<int> insn_addresses_; |
3cf2715d | 315 | |
ea3cbda5 R |
316 | /* Max uid for which the above arrays are valid. */ |
317 | static int insn_lengths_max_uid; | |
318 | ||
3cf2715d DE |
319 | /* Address of insn being processed. Used by `insn_current_length'. */ |
320 | int insn_current_address; | |
321 | ||
fc470718 R |
322 | /* Address of insn being processed in previous iteration. */ |
323 | int insn_last_address; | |
324 | ||
d6a7951f | 325 | /* known invariant alignment of insn being processed. */ |
fc470718 R |
326 | int insn_current_align; |
327 | ||
95707627 R |
328 | /* After shorten_branches, for any insn, uid_align[INSN_UID (insn)] |
329 | gives the next following alignment insn that increases the known | |
330 | alignment, or NULL_RTX if there is no such insn. | |
331 | For any alignment obtained this way, we can again index uid_align with | |
332 | its uid to obtain the next following align that in turn increases the | |
333 | alignment, till we reach NULL_RTX; the sequence obtained this way | |
334 | for each insn we'll call the alignment chain of this insn in the following | |
335 | comments. */ | |
336 | ||
f5d927c0 KH |
337 | struct label_alignment |
338 | { | |
9e423e6d JW |
339 | short alignment; |
340 | short max_skip; | |
341 | }; | |
342 | ||
343 | static rtx *uid_align; | |
344 | static int *uid_shuid; | |
345 | static struct label_alignment *label_align; | |
95707627 | 346 | |
3cf2715d DE |
347 | /* Indicate that branch shortening hasn't yet been done. */ |
348 | ||
349 | void | |
6cf9ac28 | 350 | init_insn_lengths (void) |
3cf2715d | 351 | { |
95707627 R |
352 | if (uid_shuid) |
353 | { | |
354 | free (uid_shuid); | |
355 | uid_shuid = 0; | |
356 | } | |
357 | if (insn_lengths) | |
358 | { | |
359 | free (insn_lengths); | |
360 | insn_lengths = 0; | |
ea3cbda5 | 361 | insn_lengths_max_uid = 0; |
95707627 | 362 | } |
d327457f JR |
363 | if (HAVE_ATTR_length) |
364 | INSN_ADDRESSES_FREE (); | |
95707627 R |
365 | if (uid_align) |
366 | { | |
367 | free (uid_align); | |
368 | uid_align = 0; | |
369 | } | |
3cf2715d DE |
370 | } |
371 | ||
372 | /* Obtain the current length of an insn. If branch shortening has been done, | |
6fc0bb99 | 373 | get its actual length. Otherwise, use FALLBACK_FN to calculate the |
070a7956 | 374 | length. */ |
4df199d1 | 375 | static int |
d327457f | 376 | get_attr_length_1 (rtx insn, int (*fallback_fn) (rtx)) |
3cf2715d | 377 | { |
3cf2715d DE |
378 | rtx body; |
379 | int i; | |
380 | int length = 0; | |
381 | ||
d327457f JR |
382 | if (!HAVE_ATTR_length) |
383 | return 0; | |
384 | ||
ea3cbda5 | 385 | if (insn_lengths_max_uid > INSN_UID (insn)) |
3cf2715d DE |
386 | return insn_lengths[INSN_UID (insn)]; |
387 | else | |
388 | switch (GET_CODE (insn)) | |
389 | { | |
390 | case NOTE: | |
391 | case BARRIER: | |
392 | case CODE_LABEL: | |
b5b8b0ac | 393 | case DEBUG_INSN: |
3cf2715d DE |
394 | return 0; |
395 | ||
396 | case CALL_INSN: | |
3cf2715d | 397 | case JUMP_INSN: |
39718607 | 398 | length = fallback_fn (insn); |
3cf2715d DE |
399 | break; |
400 | ||
401 | case INSN: | |
402 | body = PATTERN (insn); | |
403 | if (GET_CODE (body) == USE || GET_CODE (body) == CLOBBER) | |
404 | return 0; | |
405 | ||
406 | else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0) | |
070a7956 | 407 | length = asm_insn_count (body) * fallback_fn (insn); |
3cf2715d DE |
408 | else if (GET_CODE (body) == SEQUENCE) |
409 | for (i = 0; i < XVECLEN (body, 0); i++) | |
47d268d0 | 410 | length += get_attr_length_1 (XVECEXP (body, 0, i), fallback_fn); |
3cf2715d | 411 | else |
070a7956 | 412 | length = fallback_fn (insn); |
e9a25f70 JL |
413 | break; |
414 | ||
415 | default: | |
416 | break; | |
3cf2715d DE |
417 | } |
418 | ||
419 | #ifdef ADJUST_INSN_LENGTH | |
420 | ADJUST_INSN_LENGTH (insn, length); | |
421 | #endif | |
422 | return length; | |
3cf2715d | 423 | } |
070a7956 R |
424 | |
425 | /* Obtain the current length of an insn. If branch shortening has been done, | |
426 | get its actual length. Otherwise, get its maximum length. */ | |
427 | int | |
428 | get_attr_length (rtx insn) | |
429 | { | |
430 | return get_attr_length_1 (insn, insn_default_length); | |
431 | } | |
432 | ||
433 | /* Obtain the current length of an insn. If branch shortening has been done, | |
434 | get its actual length. Otherwise, get its minimum length. */ | |
435 | int | |
436 | get_attr_min_length (rtx insn) | |
437 | { | |
438 | return get_attr_length_1 (insn, insn_min_length); | |
439 | } | |
3cf2715d | 440 | \f |
fc470718 R |
441 | /* Code to handle alignment inside shorten_branches. */ |
442 | ||
443 | /* Here is an explanation how the algorithm in align_fuzz can give | |
444 | proper results: | |
445 | ||
446 | Call a sequence of instructions beginning with alignment point X | |
447 | and continuing until the next alignment point `block X'. When `X' | |
f5d927c0 | 448 | is used in an expression, it means the alignment value of the |
fc470718 | 449 | alignment point. |
f5d927c0 | 450 | |
fc470718 R |
451 | Call the distance between the start of the first insn of block X, and |
452 | the end of the last insn of block X `IX', for the `inner size of X'. | |
453 | This is clearly the sum of the instruction lengths. | |
f5d927c0 | 454 | |
fc470718 R |
455 | Likewise with the next alignment-delimited block following X, which we |
456 | shall call block Y. | |
f5d927c0 | 457 | |
fc470718 R |
458 | Call the distance between the start of the first insn of block X, and |
459 | the start of the first insn of block Y `OX', for the `outer size of X'. | |
f5d927c0 | 460 | |
fc470718 | 461 | The estimated padding is then OX - IX. |
f5d927c0 | 462 | |
fc470718 | 463 | OX can be safely estimated as |
f5d927c0 | 464 | |
fc470718 R |
465 | if (X >= Y) |
466 | OX = round_up(IX, Y) | |
467 | else | |
468 | OX = round_up(IX, X) + Y - X | |
f5d927c0 | 469 | |
fc470718 R |
470 | Clearly est(IX) >= real(IX), because that only depends on the |
471 | instruction lengths, and those being overestimated is a given. | |
f5d927c0 | 472 | |
fc470718 R |
473 | Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so |
474 | we needn't worry about that when thinking about OX. | |
f5d927c0 | 475 | |
fc470718 R |
476 | When X >= Y, the alignment provided by Y adds no uncertainty factor |
477 | for branch ranges starting before X, so we can just round what we have. | |
478 | But when X < Y, we don't know anything about the, so to speak, | |
479 | `middle bits', so we have to assume the worst when aligning up from an | |
480 | address mod X to one mod Y, which is Y - X. */ | |
481 | ||
482 | #ifndef LABEL_ALIGN | |
efa3896a | 483 | #define LABEL_ALIGN(LABEL) align_labels_log |
fc470718 R |
484 | #endif |
485 | ||
486 | #ifndef LOOP_ALIGN | |
efa3896a | 487 | #define LOOP_ALIGN(LABEL) align_loops_log |
fc470718 R |
488 | #endif |
489 | ||
490 | #ifndef LABEL_ALIGN_AFTER_BARRIER | |
340f7e7c | 491 | #define LABEL_ALIGN_AFTER_BARRIER(LABEL) 0 |
fc470718 R |
492 | #endif |
493 | ||
247a370b JH |
494 | #ifndef JUMP_ALIGN |
495 | #define JUMP_ALIGN(LABEL) align_jumps_log | |
496 | #endif | |
497 | ||
ad0c4c36 DD |
498 | int |
499 | default_label_align_after_barrier_max_skip (rtx insn ATTRIBUTE_UNUSED) | |
500 | { | |
501 | return 0; | |
502 | } | |
503 | ||
504 | int | |
505 | default_loop_align_max_skip (rtx insn ATTRIBUTE_UNUSED) | |
506 | { | |
507 | return align_loops_max_skip; | |
508 | } | |
509 | ||
510 | int | |
511 | default_label_align_max_skip (rtx insn ATTRIBUTE_UNUSED) | |
512 | { | |
513 | return align_labels_max_skip; | |
514 | } | |
515 | ||
516 | int | |
517 | default_jump_align_max_skip (rtx insn ATTRIBUTE_UNUSED) | |
518 | { | |
519 | return align_jumps_max_skip; | |
520 | } | |
9e423e6d | 521 | |
fc470718 | 522 | #ifndef ADDR_VEC_ALIGN |
ca3075bd | 523 | static int |
6cf9ac28 | 524 | final_addr_vec_align (rtx addr_vec) |
fc470718 | 525 | { |
2a841588 | 526 | int align = GET_MODE_SIZE (GET_MODE (PATTERN (addr_vec))); |
fc470718 R |
527 | |
528 | if (align > BIGGEST_ALIGNMENT / BITS_PER_UNIT) | |
529 | align = BIGGEST_ALIGNMENT / BITS_PER_UNIT; | |
2a841588 | 530 | return exact_log2 (align); |
fc470718 R |
531 | |
532 | } | |
f5d927c0 | 533 | |
fc470718 R |
534 | #define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC) |
535 | #endif | |
536 | ||
537 | #ifndef INSN_LENGTH_ALIGNMENT | |
538 | #define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log | |
539 | #endif | |
540 | ||
fc470718 R |
541 | #define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)]) |
542 | ||
de7987a6 | 543 | static int min_labelno, max_labelno; |
fc470718 R |
544 | |
545 | #define LABEL_TO_ALIGNMENT(LABEL) \ | |
9e423e6d JW |
546 | (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment) |
547 | ||
548 | #define LABEL_TO_MAX_SKIP(LABEL) \ | |
549 | (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip) | |
fc470718 R |
550 | |
551 | /* For the benefit of port specific code do this also as a function. */ | |
f5d927c0 | 552 | |
fc470718 | 553 | int |
6cf9ac28 | 554 | label_to_alignment (rtx label) |
fc470718 | 555 | { |
40a8f07a JJ |
556 | if (CODE_LABEL_NUMBER (label) <= max_labelno) |
557 | return LABEL_TO_ALIGNMENT (label); | |
558 | return 0; | |
559 | } | |
560 | ||
561 | int | |
562 | label_to_max_skip (rtx label) | |
563 | { | |
564 | if (CODE_LABEL_NUMBER (label) <= max_labelno) | |
565 | return LABEL_TO_MAX_SKIP (label); | |
566 | return 0; | |
fc470718 R |
567 | } |
568 | ||
fc470718 R |
569 | /* The differences in addresses |
570 | between a branch and its target might grow or shrink depending on | |
571 | the alignment the start insn of the range (the branch for a forward | |
572 | branch or the label for a backward branch) starts out on; if these | |
573 | differences are used naively, they can even oscillate infinitely. | |
574 | We therefore want to compute a 'worst case' address difference that | |
575 | is independent of the alignment the start insn of the range end | |
576 | up on, and that is at least as large as the actual difference. | |
577 | The function align_fuzz calculates the amount we have to add to the | |
578 | naively computed difference, by traversing the part of the alignment | |
579 | chain of the start insn of the range that is in front of the end insn | |
580 | of the range, and considering for each alignment the maximum amount | |
581 | that it might contribute to a size increase. | |
582 | ||
583 | For casesi tables, we also want to know worst case minimum amounts of | |
584 | address difference, in case a machine description wants to introduce | |
585 | some common offset that is added to all offsets in a table. | |
d6a7951f | 586 | For this purpose, align_fuzz with a growth argument of 0 computes the |
fc470718 R |
587 | appropriate adjustment. */ |
588 | ||
fc470718 R |
589 | /* Compute the maximum delta by which the difference of the addresses of |
590 | START and END might grow / shrink due to a different address for start | |
591 | which changes the size of alignment insns between START and END. | |
592 | KNOWN_ALIGN_LOG is the alignment known for START. | |
593 | GROWTH should be ~0 if the objective is to compute potential code size | |
594 | increase, and 0 if the objective is to compute potential shrink. | |
595 | The return value is undefined for any other value of GROWTH. */ | |
f5d927c0 | 596 | |
ca3075bd | 597 | static int |
6cf9ac28 | 598 | align_fuzz (rtx start, rtx end, int known_align_log, unsigned int growth) |
fc470718 R |
599 | { |
600 | int uid = INSN_UID (start); | |
601 | rtx align_label; | |
602 | int known_align = 1 << known_align_log; | |
603 | int end_shuid = INSN_SHUID (end); | |
604 | int fuzz = 0; | |
605 | ||
606 | for (align_label = uid_align[uid]; align_label; align_label = uid_align[uid]) | |
607 | { | |
608 | int align_addr, new_align; | |
609 | ||
610 | uid = INSN_UID (align_label); | |
9d98a694 | 611 | align_addr = INSN_ADDRESSES (uid) - insn_lengths[uid]; |
fc470718 R |
612 | if (uid_shuid[uid] > end_shuid) |
613 | break; | |
614 | known_align_log = LABEL_TO_ALIGNMENT (align_label); | |
615 | new_align = 1 << known_align_log; | |
616 | if (new_align < known_align) | |
617 | continue; | |
618 | fuzz += (-align_addr ^ growth) & (new_align - known_align); | |
619 | known_align = new_align; | |
620 | } | |
621 | return fuzz; | |
622 | } | |
623 | ||
624 | /* Compute a worst-case reference address of a branch so that it | |
625 | can be safely used in the presence of aligned labels. Since the | |
626 | size of the branch itself is unknown, the size of the branch is | |
627 | not included in the range. I.e. for a forward branch, the reference | |
628 | address is the end address of the branch as known from the previous | |
629 | branch shortening pass, minus a value to account for possible size | |
630 | increase due to alignment. For a backward branch, it is the start | |
631 | address of the branch as known from the current pass, plus a value | |
632 | to account for possible size increase due to alignment. | |
633 | NB.: Therefore, the maximum offset allowed for backward branches needs | |
634 | to exclude the branch size. */ | |
f5d927c0 | 635 | |
fc470718 | 636 | int |
6cf9ac28 | 637 | insn_current_reference_address (rtx branch) |
fc470718 | 638 | { |
5527bf14 RH |
639 | rtx dest, seq; |
640 | int seq_uid; | |
641 | ||
642 | if (! INSN_ADDRESSES_SET_P ()) | |
643 | return 0; | |
644 | ||
645 | seq = NEXT_INSN (PREV_INSN (branch)); | |
646 | seq_uid = INSN_UID (seq); | |
4b4bf941 | 647 | if (!JUMP_P (branch)) |
fc470718 R |
648 | /* This can happen for example on the PA; the objective is to know the |
649 | offset to address something in front of the start of the function. | |
650 | Thus, we can treat it like a backward branch. | |
651 | We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than | |
652 | any alignment we'd encounter, so we skip the call to align_fuzz. */ | |
653 | return insn_current_address; | |
654 | dest = JUMP_LABEL (branch); | |
5527bf14 | 655 | |
b9f22704 | 656 | /* BRANCH has no proper alignment chain set, so use SEQ. |
afc6898e BS |
657 | BRANCH also has no INSN_SHUID. */ |
658 | if (INSN_SHUID (seq) < INSN_SHUID (dest)) | |
fc470718 | 659 | { |
f5d927c0 | 660 | /* Forward branch. */ |
fc470718 | 661 | return (insn_last_address + insn_lengths[seq_uid] |
26024475 | 662 | - align_fuzz (seq, dest, length_unit_log, ~0)); |
fc470718 R |
663 | } |
664 | else | |
665 | { | |
f5d927c0 | 666 | /* Backward branch. */ |
fc470718 | 667 | return (insn_current_address |
923f7cf9 | 668 | + align_fuzz (dest, seq, length_unit_log, ~0)); |
fc470718 R |
669 | } |
670 | } | |
fc470718 | 671 | \f |
65727068 KH |
672 | /* Compute branch alignments based on frequency information in the |
673 | CFG. */ | |
674 | ||
e855c69d | 675 | unsigned int |
6cf9ac28 | 676 | compute_alignments (void) |
247a370b | 677 | { |
247a370b | 678 | int log, max_skip, max_log; |
e0082a72 | 679 | basic_block bb; |
edbed3d3 JH |
680 | int freq_max = 0; |
681 | int freq_threshold = 0; | |
247a370b JH |
682 | |
683 | if (label_align) | |
684 | { | |
685 | free (label_align); | |
686 | label_align = 0; | |
687 | } | |
688 | ||
689 | max_labelno = max_label_num (); | |
690 | min_labelno = get_first_label_num (); | |
5ed6ace5 | 691 | label_align = XCNEWVEC (struct label_alignment, max_labelno - min_labelno + 1); |
247a370b JH |
692 | |
693 | /* If not optimizing or optimizing for size, don't assign any alignments. */ | |
efd8f750 | 694 | if (! optimize || optimize_function_for_size_p (cfun)) |
c2924966 | 695 | return 0; |
247a370b | 696 | |
edbed3d3 JH |
697 | if (dump_file) |
698 | { | |
532aafad | 699 | dump_reg_info (dump_file); |
edbed3d3 JH |
700 | dump_flow_info (dump_file, TDF_DETAILS); |
701 | flow_loops_dump (dump_file, NULL, 1); | |
edbed3d3 | 702 | } |
58082ff6 | 703 | loop_optimizer_init (AVOID_CFG_MODIFICATIONS); |
11cd3bed | 704 | FOR_EACH_BB_FN (bb, cfun) |
edbed3d3 JH |
705 | if (bb->frequency > freq_max) |
706 | freq_max = bb->frequency; | |
707 | freq_threshold = freq_max / PARAM_VALUE (PARAM_ALIGN_THRESHOLD); | |
708 | ||
709 | if (dump_file) | |
c3284718 | 710 | fprintf (dump_file, "freq_max: %i\n",freq_max); |
11cd3bed | 711 | FOR_EACH_BB_FN (bb, cfun) |
247a370b | 712 | { |
a813c111 | 713 | rtx label = BB_HEAD (bb); |
247a370b JH |
714 | int fallthru_frequency = 0, branch_frequency = 0, has_fallthru = 0; |
715 | edge e; | |
628f6a4e | 716 | edge_iterator ei; |
247a370b | 717 | |
4b4bf941 | 718 | if (!LABEL_P (label) |
8bcf15f6 | 719 | || optimize_bb_for_size_p (bb)) |
edbed3d3 JH |
720 | { |
721 | if (dump_file) | |
c3284718 RS |
722 | fprintf (dump_file, |
723 | "BB %4i freq %4i loop %2i loop_depth %2i skipped.\n", | |
724 | bb->index, bb->frequency, bb->loop_father->num, | |
725 | bb_loop_depth (bb)); | |
edbed3d3 JH |
726 | continue; |
727 | } | |
247a370b | 728 | max_log = LABEL_ALIGN (label); |
ad0c4c36 | 729 | max_skip = targetm.asm_out.label_align_max_skip (label); |
247a370b | 730 | |
628f6a4e | 731 | FOR_EACH_EDGE (e, ei, bb->preds) |
247a370b JH |
732 | { |
733 | if (e->flags & EDGE_FALLTHRU) | |
734 | has_fallthru = 1, fallthru_frequency += EDGE_FREQUENCY (e); | |
735 | else | |
736 | branch_frequency += EDGE_FREQUENCY (e); | |
737 | } | |
edbed3d3 JH |
738 | if (dump_file) |
739 | { | |
c3284718 RS |
740 | fprintf (dump_file, "BB %4i freq %4i loop %2i loop_depth" |
741 | " %2i fall %4i branch %4i", | |
742 | bb->index, bb->frequency, bb->loop_father->num, | |
743 | bb_loop_depth (bb), | |
744 | fallthru_frequency, branch_frequency); | |
edbed3d3 JH |
745 | if (!bb->loop_father->inner && bb->loop_father->num) |
746 | fprintf (dump_file, " inner_loop"); | |
747 | if (bb->loop_father->header == bb) | |
748 | fprintf (dump_file, " loop_header"); | |
749 | fprintf (dump_file, "\n"); | |
750 | } | |
247a370b | 751 | |
f63d1bf7 | 752 | /* There are two purposes to align block with no fallthru incoming edge: |
247a370b | 753 | 1) to avoid fetch stalls when branch destination is near cache boundary |
d6a7951f | 754 | 2) to improve cache efficiency in case the previous block is not executed |
247a370b JH |
755 | (so it does not need to be in the cache). |
756 | ||
757 | We to catch first case, we align frequently executed blocks. | |
758 | To catch the second, we align blocks that are executed more frequently | |
eaec9b3d | 759 | than the predecessor and the predecessor is likely to not be executed |
247a370b JH |
760 | when function is called. */ |
761 | ||
762 | if (!has_fallthru | |
edbed3d3 | 763 | && (branch_frequency > freq_threshold |
f6366fc7 ZD |
764 | || (bb->frequency > bb->prev_bb->frequency * 10 |
765 | && (bb->prev_bb->frequency | |
fefa31b5 | 766 | <= ENTRY_BLOCK_PTR_FOR_FN (cfun)->frequency / 2)))) |
247a370b JH |
767 | { |
768 | log = JUMP_ALIGN (label); | |
edbed3d3 | 769 | if (dump_file) |
c3284718 | 770 | fprintf (dump_file, " jump alignment added.\n"); |
247a370b JH |
771 | if (max_log < log) |
772 | { | |
773 | max_log = log; | |
ad0c4c36 | 774 | max_skip = targetm.asm_out.jump_align_max_skip (label); |
247a370b JH |
775 | } |
776 | } | |
777 | /* In case block is frequent and reached mostly by non-fallthru edge, | |
09da1532 | 778 | align it. It is most likely a first block of loop. */ |
247a370b | 779 | if (has_fallthru |
82b9c015 EB |
780 | && !(single_succ_p (bb) |
781 | && single_succ (bb) == EXIT_BLOCK_PTR_FOR_FN (cfun)) | |
efd8f750 | 782 | && optimize_bb_for_speed_p (bb) |
edbed3d3 JH |
783 | && branch_frequency + fallthru_frequency > freq_threshold |
784 | && (branch_frequency | |
785 | > fallthru_frequency * PARAM_VALUE (PARAM_ALIGN_LOOP_ITERATIONS))) | |
247a370b JH |
786 | { |
787 | log = LOOP_ALIGN (label); | |
edbed3d3 | 788 | if (dump_file) |
c3284718 | 789 | fprintf (dump_file, " internal loop alignment added.\n"); |
247a370b JH |
790 | if (max_log < log) |
791 | { | |
792 | max_log = log; | |
ad0c4c36 | 793 | max_skip = targetm.asm_out.loop_align_max_skip (label); |
247a370b JH |
794 | } |
795 | } | |
796 | LABEL_TO_ALIGNMENT (label) = max_log; | |
797 | LABEL_TO_MAX_SKIP (label) = max_skip; | |
798 | } | |
edbed3d3 | 799 | |
58082ff6 PH |
800 | loop_optimizer_finalize (); |
801 | free_dominance_info (CDI_DOMINATORS); | |
c2924966 | 802 | return 0; |
247a370b | 803 | } |
ef330312 | 804 | |
5cf6635b EB |
805 | /* Grow the LABEL_ALIGN array after new labels are created. */ |
806 | ||
807 | static void | |
808 | grow_label_align (void) | |
809 | { | |
810 | int old = max_labelno; | |
811 | int n_labels; | |
812 | int n_old_labels; | |
813 | ||
814 | max_labelno = max_label_num (); | |
815 | ||
816 | n_labels = max_labelno - min_labelno + 1; | |
817 | n_old_labels = old - min_labelno + 1; | |
818 | ||
819 | label_align = XRESIZEVEC (struct label_alignment, label_align, n_labels); | |
820 | ||
821 | /* Range of labels grows monotonically in the function. Failing here | |
822 | means that the initialization of array got lost. */ | |
823 | gcc_assert (n_old_labels <= n_labels); | |
824 | ||
825 | memset (label_align + n_old_labels, 0, | |
826 | (n_labels - n_old_labels) * sizeof (struct label_alignment)); | |
827 | } | |
828 | ||
829 | /* Update the already computed alignment information. LABEL_PAIRS is a vector | |
830 | made up of pairs of labels for which the alignment information of the first | |
831 | element will be copied from that of the second element. */ | |
832 | ||
833 | void | |
834 | update_alignments (vec<rtx> &label_pairs) | |
835 | { | |
836 | unsigned int i = 0; | |
33fd5699 | 837 | rtx iter, label = NULL_RTX; |
5cf6635b EB |
838 | |
839 | if (max_labelno != max_label_num ()) | |
840 | grow_label_align (); | |
841 | ||
842 | FOR_EACH_VEC_ELT (label_pairs, i, iter) | |
843 | if (i & 1) | |
844 | { | |
845 | LABEL_TO_ALIGNMENT (label) = LABEL_TO_ALIGNMENT (iter); | |
846 | LABEL_TO_MAX_SKIP (label) = LABEL_TO_MAX_SKIP (iter); | |
847 | } | |
848 | else | |
849 | label = iter; | |
850 | } | |
851 | ||
27a4cd48 DM |
852 | namespace { |
853 | ||
854 | const pass_data pass_data_compute_alignments = | |
ef330312 | 855 | { |
27a4cd48 DM |
856 | RTL_PASS, /* type */ |
857 | "alignments", /* name */ | |
858 | OPTGROUP_NONE, /* optinfo_flags */ | |
27a4cd48 DM |
859 | true, /* has_execute */ |
860 | TV_NONE, /* tv_id */ | |
861 | 0, /* properties_required */ | |
862 | 0, /* properties_provided */ | |
863 | 0, /* properties_destroyed */ | |
864 | 0, /* todo_flags_start */ | |
3bea341f | 865 | 0, /* todo_flags_finish */ |
ef330312 PB |
866 | }; |
867 | ||
27a4cd48 DM |
868 | class pass_compute_alignments : public rtl_opt_pass |
869 | { | |
870 | public: | |
c3284718 RS |
871 | pass_compute_alignments (gcc::context *ctxt) |
872 | : rtl_opt_pass (pass_data_compute_alignments, ctxt) | |
27a4cd48 DM |
873 | {} |
874 | ||
875 | /* opt_pass methods: */ | |
be55bfe6 | 876 | virtual unsigned int execute (function *) { return compute_alignments (); } |
27a4cd48 DM |
877 | |
878 | }; // class pass_compute_alignments | |
879 | ||
880 | } // anon namespace | |
881 | ||
882 | rtl_opt_pass * | |
883 | make_pass_compute_alignments (gcc::context *ctxt) | |
884 | { | |
885 | return new pass_compute_alignments (ctxt); | |
886 | } | |
887 | ||
247a370b | 888 | \f |
3cf2715d DE |
889 | /* Make a pass over all insns and compute their actual lengths by shortening |
890 | any branches of variable length if possible. */ | |
891 | ||
fc470718 R |
892 | /* shorten_branches might be called multiple times: for example, the SH |
893 | port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG. | |
894 | In order to do this, it needs proper length information, which it obtains | |
895 | by calling shorten_branches. This cannot be collapsed with | |
d6a7951f | 896 | shorten_branches itself into a single pass unless we also want to integrate |
fc470718 R |
897 | reorg.c, since the branch splitting exposes new instructions with delay |
898 | slots. */ | |
899 | ||
3cf2715d | 900 | void |
d327457f | 901 | shorten_branches (rtx first) |
3cf2715d | 902 | { |
3cf2715d | 903 | rtx insn; |
fc470718 R |
904 | int max_uid; |
905 | int i; | |
fc470718 | 906 | int max_log; |
9e423e6d | 907 | int max_skip; |
fc470718 R |
908 | #define MAX_CODE_ALIGN 16 |
909 | rtx seq; | |
3cf2715d | 910 | int something_changed = 1; |
3cf2715d DE |
911 | char *varying_length; |
912 | rtx body; | |
913 | int uid; | |
fc470718 | 914 | rtx align_tab[MAX_CODE_ALIGN]; |
3cf2715d | 915 | |
3446405d JH |
916 | /* Compute maximum UID and allocate label_align / uid_shuid. */ |
917 | max_uid = get_max_uid (); | |
d9b6874b | 918 | |
471854f8 | 919 | /* Free uid_shuid before reallocating it. */ |
07a1f795 | 920 | free (uid_shuid); |
b0efb46b | 921 | |
5ed6ace5 | 922 | uid_shuid = XNEWVEC (int, max_uid); |
25e22dc0 | 923 | |
247a370b | 924 | if (max_labelno != max_label_num ()) |
5cf6635b | 925 | grow_label_align (); |
247a370b | 926 | |
fc470718 R |
927 | /* Initialize label_align and set up uid_shuid to be strictly |
928 | monotonically rising with insn order. */ | |
e2faec75 R |
929 | /* We use max_log here to keep track of the maximum alignment we want to |
930 | impose on the next CODE_LABEL (or the current one if we are processing | |
931 | the CODE_LABEL itself). */ | |
f5d927c0 | 932 | |
9e423e6d JW |
933 | max_log = 0; |
934 | max_skip = 0; | |
935 | ||
936 | for (insn = get_insns (), i = 1; insn; insn = NEXT_INSN (insn)) | |
fc470718 R |
937 | { |
938 | int log; | |
939 | ||
940 | INSN_SHUID (insn) = i++; | |
2c3c49de | 941 | if (INSN_P (insn)) |
80838531 | 942 | continue; |
b0efb46b | 943 | |
80838531 | 944 | if (LABEL_P (insn)) |
fc470718 R |
945 | { |
946 | rtx next; | |
0676c393 | 947 | bool next_is_jumptable; |
ff81832f | 948 | |
247a370b JH |
949 | /* Merge in alignments computed by compute_alignments. */ |
950 | log = LABEL_TO_ALIGNMENT (insn); | |
951 | if (max_log < log) | |
952 | { | |
953 | max_log = log; | |
954 | max_skip = LABEL_TO_MAX_SKIP (insn); | |
955 | } | |
fc470718 | 956 | |
0676c393 MM |
957 | next = next_nonnote_insn (insn); |
958 | next_is_jumptable = next && JUMP_TABLE_DATA_P (next); | |
959 | if (!next_is_jumptable) | |
9e423e6d | 960 | { |
0676c393 MM |
961 | log = LABEL_ALIGN (insn); |
962 | if (max_log < log) | |
963 | { | |
964 | max_log = log; | |
ad0c4c36 | 965 | max_skip = targetm.asm_out.label_align_max_skip (insn); |
0676c393 | 966 | } |
9e423e6d | 967 | } |
75197b37 BS |
968 | /* ADDR_VECs only take room if read-only data goes into the text |
969 | section. */ | |
0676c393 MM |
970 | if ((JUMP_TABLES_IN_TEXT_SECTION |
971 | || readonly_data_section == text_section) | |
972 | && next_is_jumptable) | |
973 | { | |
974 | log = ADDR_VEC_ALIGN (next); | |
975 | if (max_log < log) | |
976 | { | |
977 | max_log = log; | |
ad0c4c36 | 978 | max_skip = targetm.asm_out.label_align_max_skip (insn); |
0676c393 MM |
979 | } |
980 | } | |
fc470718 | 981 | LABEL_TO_ALIGNMENT (insn) = max_log; |
9e423e6d | 982 | LABEL_TO_MAX_SKIP (insn) = max_skip; |
fc470718 | 983 | max_log = 0; |
9e423e6d | 984 | max_skip = 0; |
fc470718 | 985 | } |
4b4bf941 | 986 | else if (BARRIER_P (insn)) |
fc470718 R |
987 | { |
988 | rtx label; | |
989 | ||
2c3c49de | 990 | for (label = insn; label && ! INSN_P (label); |
fc470718 | 991 | label = NEXT_INSN (label)) |
4b4bf941 | 992 | if (LABEL_P (label)) |
fc470718 R |
993 | { |
994 | log = LABEL_ALIGN_AFTER_BARRIER (insn); | |
995 | if (max_log < log) | |
9e423e6d JW |
996 | { |
997 | max_log = log; | |
ad0c4c36 | 998 | max_skip = targetm.asm_out.label_align_after_barrier_max_skip (label); |
9e423e6d | 999 | } |
fc470718 R |
1000 | break; |
1001 | } | |
1002 | } | |
fc470718 | 1003 | } |
d327457f JR |
1004 | if (!HAVE_ATTR_length) |
1005 | return; | |
fc470718 R |
1006 | |
1007 | /* Allocate the rest of the arrays. */ | |
5ed6ace5 | 1008 | insn_lengths = XNEWVEC (int, max_uid); |
ea3cbda5 | 1009 | insn_lengths_max_uid = max_uid; |
af035616 R |
1010 | /* Syntax errors can lead to labels being outside of the main insn stream. |
1011 | Initialize insn_addresses, so that we get reproducible results. */ | |
9d98a694 | 1012 | INSN_ADDRESSES_ALLOC (max_uid); |
fc470718 | 1013 | |
5ed6ace5 | 1014 | varying_length = XCNEWVEC (char, max_uid); |
fc470718 R |
1015 | |
1016 | /* Initialize uid_align. We scan instructions | |
1017 | from end to start, and keep in align_tab[n] the last seen insn | |
1018 | that does an alignment of at least n+1, i.e. the successor | |
1019 | in the alignment chain for an insn that does / has a known | |
1020 | alignment of n. */ | |
5ed6ace5 | 1021 | uid_align = XCNEWVEC (rtx, max_uid); |
fc470718 | 1022 | |
f5d927c0 | 1023 | for (i = MAX_CODE_ALIGN; --i >= 0;) |
fc470718 R |
1024 | align_tab[i] = NULL_RTX; |
1025 | seq = get_last_insn (); | |
33f7f353 | 1026 | for (; seq; seq = PREV_INSN (seq)) |
fc470718 R |
1027 | { |
1028 | int uid = INSN_UID (seq); | |
1029 | int log; | |
4b4bf941 | 1030 | log = (LABEL_P (seq) ? LABEL_TO_ALIGNMENT (seq) : 0); |
fc470718 | 1031 | uid_align[uid] = align_tab[0]; |
fc470718 R |
1032 | if (log) |
1033 | { | |
1034 | /* Found an alignment label. */ | |
1035 | uid_align[uid] = align_tab[log]; | |
1036 | for (i = log - 1; i >= 0; i--) | |
1037 | align_tab[i] = seq; | |
1038 | } | |
33f7f353 | 1039 | } |
f6df08e6 JR |
1040 | |
1041 | /* When optimizing, we start assuming minimum length, and keep increasing | |
1042 | lengths as we find the need for this, till nothing changes. | |
1043 | When not optimizing, we start assuming maximum lengths, and | |
1044 | do a single pass to update the lengths. */ | |
1045 | bool increasing = optimize != 0; | |
1046 | ||
33f7f353 JR |
1047 | #ifdef CASE_VECTOR_SHORTEN_MODE |
1048 | if (optimize) | |
1049 | { | |
1050 | /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum | |
1051 | label fields. */ | |
1052 | ||
1053 | int min_shuid = INSN_SHUID (get_insns ()) - 1; | |
1054 | int max_shuid = INSN_SHUID (get_last_insn ()) + 1; | |
1055 | int rel; | |
1056 | ||
1057 | for (insn = first; insn != 0; insn = NEXT_INSN (insn)) | |
fc470718 | 1058 | { |
33f7f353 JR |
1059 | rtx min_lab = NULL_RTX, max_lab = NULL_RTX, pat; |
1060 | int len, i, min, max, insn_shuid; | |
1061 | int min_align; | |
1062 | addr_diff_vec_flags flags; | |
1063 | ||
34f0d87a | 1064 | if (! JUMP_TABLE_DATA_P (insn) |
33f7f353 JR |
1065 | || GET_CODE (PATTERN (insn)) != ADDR_DIFF_VEC) |
1066 | continue; | |
1067 | pat = PATTERN (insn); | |
1068 | len = XVECLEN (pat, 1); | |
0bccc606 | 1069 | gcc_assert (len > 0); |
33f7f353 JR |
1070 | min_align = MAX_CODE_ALIGN; |
1071 | for (min = max_shuid, max = min_shuid, i = len - 1; i >= 0; i--) | |
1072 | { | |
1073 | rtx lab = XEXP (XVECEXP (pat, 1, i), 0); | |
1074 | int shuid = INSN_SHUID (lab); | |
1075 | if (shuid < min) | |
1076 | { | |
1077 | min = shuid; | |
1078 | min_lab = lab; | |
1079 | } | |
1080 | if (shuid > max) | |
1081 | { | |
1082 | max = shuid; | |
1083 | max_lab = lab; | |
1084 | } | |
1085 | if (min_align > LABEL_TO_ALIGNMENT (lab)) | |
1086 | min_align = LABEL_TO_ALIGNMENT (lab); | |
1087 | } | |
4c33cb26 R |
1088 | XEXP (pat, 2) = gen_rtx_LABEL_REF (Pmode, min_lab); |
1089 | XEXP (pat, 3) = gen_rtx_LABEL_REF (Pmode, max_lab); | |
33f7f353 JR |
1090 | insn_shuid = INSN_SHUID (insn); |
1091 | rel = INSN_SHUID (XEXP (XEXP (pat, 0), 0)); | |
5921f276 | 1092 | memset (&flags, 0, sizeof (flags)); |
33f7f353 JR |
1093 | flags.min_align = min_align; |
1094 | flags.base_after_vec = rel > insn_shuid; | |
1095 | flags.min_after_vec = min > insn_shuid; | |
1096 | flags.max_after_vec = max > insn_shuid; | |
1097 | flags.min_after_base = min > rel; | |
1098 | flags.max_after_base = max > rel; | |
1099 | ADDR_DIFF_VEC_FLAGS (pat) = flags; | |
f6df08e6 JR |
1100 | |
1101 | if (increasing) | |
1102 | PUT_MODE (pat, CASE_VECTOR_SHORTEN_MODE (0, 0, pat)); | |
fc470718 R |
1103 | } |
1104 | } | |
33f7f353 | 1105 | #endif /* CASE_VECTOR_SHORTEN_MODE */ |
3cf2715d | 1106 | |
3cf2715d | 1107 | /* Compute initial lengths, addresses, and varying flags for each insn. */ |
f6df08e6 JR |
1108 | int (*length_fun) (rtx) = increasing ? insn_min_length : insn_default_length; |
1109 | ||
b816f339 | 1110 | for (insn_current_address = 0, insn = first; |
3cf2715d DE |
1111 | insn != 0; |
1112 | insn_current_address += insn_lengths[uid], insn = NEXT_INSN (insn)) | |
1113 | { | |
1114 | uid = INSN_UID (insn); | |
fc470718 | 1115 | |
3cf2715d | 1116 | insn_lengths[uid] = 0; |
fc470718 | 1117 | |
4b4bf941 | 1118 | if (LABEL_P (insn)) |
fc470718 R |
1119 | { |
1120 | int log = LABEL_TO_ALIGNMENT (insn); | |
1121 | if (log) | |
1122 | { | |
1123 | int align = 1 << log; | |
ecb06768 | 1124 | int new_address = (insn_current_address + align - 1) & -align; |
fc470718 | 1125 | insn_lengths[uid] = new_address - insn_current_address; |
fc470718 R |
1126 | } |
1127 | } | |
1128 | ||
5a09edba | 1129 | INSN_ADDRESSES (uid) = insn_current_address + insn_lengths[uid]; |
f5d927c0 | 1130 | |
4b4bf941 | 1131 | if (NOTE_P (insn) || BARRIER_P (insn) |
c3284718 | 1132 | || LABEL_P (insn) || DEBUG_INSN_P (insn)) |
3cf2715d | 1133 | continue; |
04da53bd R |
1134 | if (INSN_DELETED_P (insn)) |
1135 | continue; | |
3cf2715d DE |
1136 | |
1137 | body = PATTERN (insn); | |
34f0d87a | 1138 | if (JUMP_TABLE_DATA_P (insn)) |
5a32a90c JR |
1139 | { |
1140 | /* This only takes room if read-only data goes into the text | |
1141 | section. */ | |
d6b5193b RS |
1142 | if (JUMP_TABLES_IN_TEXT_SECTION |
1143 | || readonly_data_section == text_section) | |
75197b37 BS |
1144 | insn_lengths[uid] = (XVECLEN (body, |
1145 | GET_CODE (body) == ADDR_DIFF_VEC) | |
1146 | * GET_MODE_SIZE (GET_MODE (body))); | |
5a32a90c | 1147 | /* Alignment is handled by ADDR_VEC_ALIGN. */ |
5a32a90c | 1148 | } |
a30caf5c | 1149 | else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0) |
3cf2715d DE |
1150 | insn_lengths[uid] = asm_insn_count (body) * insn_default_length (insn); |
1151 | else if (GET_CODE (body) == SEQUENCE) | |
1152 | { | |
1153 | int i; | |
1154 | int const_delay_slots; | |
1155 | #ifdef DELAY_SLOTS | |
1156 | const_delay_slots = const_num_delay_slots (XVECEXP (body, 0, 0)); | |
1157 | #else | |
1158 | const_delay_slots = 0; | |
1159 | #endif | |
f6df08e6 JR |
1160 | int (*inner_length_fun) (rtx) |
1161 | = const_delay_slots ? length_fun : insn_default_length; | |
3cf2715d DE |
1162 | /* Inside a delay slot sequence, we do not do any branch shortening |
1163 | if the shortening could change the number of delay slots | |
0f41302f | 1164 | of the branch. */ |
3cf2715d DE |
1165 | for (i = 0; i < XVECLEN (body, 0); i++) |
1166 | { | |
1167 | rtx inner_insn = XVECEXP (body, 0, i); | |
1168 | int inner_uid = INSN_UID (inner_insn); | |
1169 | int inner_length; | |
1170 | ||
a30caf5c DC |
1171 | if (GET_CODE (body) == ASM_INPUT |
1172 | || asm_noperands (PATTERN (XVECEXP (body, 0, i))) >= 0) | |
3cf2715d DE |
1173 | inner_length = (asm_insn_count (PATTERN (inner_insn)) |
1174 | * insn_default_length (inner_insn)); | |
1175 | else | |
f6df08e6 | 1176 | inner_length = inner_length_fun (inner_insn); |
f5d927c0 | 1177 | |
3cf2715d DE |
1178 | insn_lengths[inner_uid] = inner_length; |
1179 | if (const_delay_slots) | |
1180 | { | |
1181 | if ((varying_length[inner_uid] | |
1182 | = insn_variable_length_p (inner_insn)) != 0) | |
1183 | varying_length[uid] = 1; | |
9d98a694 AO |
1184 | INSN_ADDRESSES (inner_uid) = (insn_current_address |
1185 | + insn_lengths[uid]); | |
3cf2715d DE |
1186 | } |
1187 | else | |
1188 | varying_length[inner_uid] = 0; | |
1189 | insn_lengths[uid] += inner_length; | |
1190 | } | |
1191 | } | |
1192 | else if (GET_CODE (body) != USE && GET_CODE (body) != CLOBBER) | |
1193 | { | |
f6df08e6 | 1194 | insn_lengths[uid] = length_fun (insn); |
3cf2715d DE |
1195 | varying_length[uid] = insn_variable_length_p (insn); |
1196 | } | |
1197 | ||
1198 | /* If needed, do any adjustment. */ | |
1199 | #ifdef ADJUST_INSN_LENGTH | |
1200 | ADJUST_INSN_LENGTH (insn, insn_lengths[uid]); | |
04b6000c | 1201 | if (insn_lengths[uid] < 0) |
c725bd79 | 1202 | fatal_insn ("negative insn length", insn); |
3cf2715d DE |
1203 | #endif |
1204 | } | |
1205 | ||
1206 | /* Now loop over all the insns finding varying length insns. For each, | |
1207 | get the current insn length. If it has changed, reflect the change. | |
1208 | When nothing changes for a full pass, we are done. */ | |
1209 | ||
1210 | while (something_changed) | |
1211 | { | |
1212 | something_changed = 0; | |
fc470718 | 1213 | insn_current_align = MAX_CODE_ALIGN - 1; |
b816f339 | 1214 | for (insn_current_address = 0, insn = first; |
3cf2715d DE |
1215 | insn != 0; |
1216 | insn = NEXT_INSN (insn)) | |
1217 | { | |
1218 | int new_length; | |
b729186a | 1219 | #ifdef ADJUST_INSN_LENGTH |
3cf2715d | 1220 | int tmp_length; |
b729186a | 1221 | #endif |
fc470718 | 1222 | int length_align; |
3cf2715d DE |
1223 | |
1224 | uid = INSN_UID (insn); | |
fc470718 | 1225 | |
4b4bf941 | 1226 | if (LABEL_P (insn)) |
fc470718 R |
1227 | { |
1228 | int log = LABEL_TO_ALIGNMENT (insn); | |
b0fe107e JM |
1229 | |
1230 | #ifdef CASE_VECTOR_SHORTEN_MODE | |
1231 | /* If the mode of a following jump table was changed, we | |
1232 | may need to update the alignment of this label. */ | |
1233 | rtx next; | |
1234 | bool next_is_jumptable; | |
1235 | ||
1236 | next = next_nonnote_insn (insn); | |
1237 | next_is_jumptable = next && JUMP_TABLE_DATA_P (next); | |
1238 | if ((JUMP_TABLES_IN_TEXT_SECTION | |
1239 | || readonly_data_section == text_section) | |
1240 | && next_is_jumptable) | |
1241 | { | |
1242 | int newlog = ADDR_VEC_ALIGN (next); | |
1243 | if (newlog != log) | |
1244 | { | |
1245 | log = newlog; | |
1246 | LABEL_TO_ALIGNMENT (insn) = log; | |
1247 | something_changed = 1; | |
1248 | } | |
1249 | } | |
1250 | #endif | |
1251 | ||
fc470718 R |
1252 | if (log > insn_current_align) |
1253 | { | |
1254 | int align = 1 << log; | |
ecb06768 | 1255 | int new_address= (insn_current_address + align - 1) & -align; |
fc470718 R |
1256 | insn_lengths[uid] = new_address - insn_current_address; |
1257 | insn_current_align = log; | |
1258 | insn_current_address = new_address; | |
1259 | } | |
1260 | else | |
1261 | insn_lengths[uid] = 0; | |
9d98a694 | 1262 | INSN_ADDRESSES (uid) = insn_current_address; |
fc470718 R |
1263 | continue; |
1264 | } | |
1265 | ||
1266 | length_align = INSN_LENGTH_ALIGNMENT (insn); | |
1267 | if (length_align < insn_current_align) | |
1268 | insn_current_align = length_align; | |
1269 | ||
9d98a694 AO |
1270 | insn_last_address = INSN_ADDRESSES (uid); |
1271 | INSN_ADDRESSES (uid) = insn_current_address; | |
fc470718 | 1272 | |
5e75ef4a | 1273 | #ifdef CASE_VECTOR_SHORTEN_MODE |
34f0d87a SB |
1274 | if (optimize |
1275 | && JUMP_TABLE_DATA_P (insn) | |
33f7f353 JR |
1276 | && GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC) |
1277 | { | |
33f7f353 JR |
1278 | rtx body = PATTERN (insn); |
1279 | int old_length = insn_lengths[uid]; | |
1280 | rtx rel_lab = XEXP (XEXP (body, 0), 0); | |
1281 | rtx min_lab = XEXP (XEXP (body, 2), 0); | |
1282 | rtx max_lab = XEXP (XEXP (body, 3), 0); | |
9d98a694 AO |
1283 | int rel_addr = INSN_ADDRESSES (INSN_UID (rel_lab)); |
1284 | int min_addr = INSN_ADDRESSES (INSN_UID (min_lab)); | |
1285 | int max_addr = INSN_ADDRESSES (INSN_UID (max_lab)); | |
33f7f353 JR |
1286 | rtx prev; |
1287 | int rel_align = 0; | |
950a3816 | 1288 | addr_diff_vec_flags flags; |
f6df08e6 | 1289 | enum machine_mode vec_mode; |
950a3816 KG |
1290 | |
1291 | /* Avoid automatic aggregate initialization. */ | |
1292 | flags = ADDR_DIFF_VEC_FLAGS (body); | |
33f7f353 JR |
1293 | |
1294 | /* Try to find a known alignment for rel_lab. */ | |
1295 | for (prev = rel_lab; | |
1296 | prev | |
1297 | && ! insn_lengths[INSN_UID (prev)] | |
1298 | && ! (varying_length[INSN_UID (prev)] & 1); | |
1299 | prev = PREV_INSN (prev)) | |
1300 | if (varying_length[INSN_UID (prev)] & 2) | |
1301 | { | |
1302 | rel_align = LABEL_TO_ALIGNMENT (prev); | |
1303 | break; | |
1304 | } | |
1305 | ||
1306 | /* See the comment on addr_diff_vec_flags in rtl.h for the | |
1307 | meaning of the flags values. base: REL_LAB vec: INSN */ | |
1308 | /* Anything after INSN has still addresses from the last | |
1309 | pass; adjust these so that they reflect our current | |
1310 | estimate for this pass. */ | |
1311 | if (flags.base_after_vec) | |
1312 | rel_addr += insn_current_address - insn_last_address; | |
1313 | if (flags.min_after_vec) | |
1314 | min_addr += insn_current_address - insn_last_address; | |
1315 | if (flags.max_after_vec) | |
1316 | max_addr += insn_current_address - insn_last_address; | |
1317 | /* We want to know the worst case, i.e. lowest possible value | |
1318 | for the offset of MIN_LAB. If MIN_LAB is after REL_LAB, | |
1319 | its offset is positive, and we have to be wary of code shrink; | |
1320 | otherwise, it is negative, and we have to be vary of code | |
1321 | size increase. */ | |
1322 | if (flags.min_after_base) | |
1323 | { | |
1324 | /* If INSN is between REL_LAB and MIN_LAB, the size | |
1325 | changes we are about to make can change the alignment | |
1326 | within the observed offset, therefore we have to break | |
1327 | it up into two parts that are independent. */ | |
1328 | if (! flags.base_after_vec && flags.min_after_vec) | |
1329 | { | |
1330 | min_addr -= align_fuzz (rel_lab, insn, rel_align, 0); | |
1331 | min_addr -= align_fuzz (insn, min_lab, 0, 0); | |
1332 | } | |
1333 | else | |
1334 | min_addr -= align_fuzz (rel_lab, min_lab, rel_align, 0); | |
1335 | } | |
1336 | else | |
1337 | { | |
1338 | if (flags.base_after_vec && ! flags.min_after_vec) | |
1339 | { | |
1340 | min_addr -= align_fuzz (min_lab, insn, 0, ~0); | |
1341 | min_addr -= align_fuzz (insn, rel_lab, 0, ~0); | |
1342 | } | |
1343 | else | |
1344 | min_addr -= align_fuzz (min_lab, rel_lab, 0, ~0); | |
1345 | } | |
1346 | /* Likewise, determine the highest lowest possible value | |
1347 | for the offset of MAX_LAB. */ | |
1348 | if (flags.max_after_base) | |
1349 | { | |
1350 | if (! flags.base_after_vec && flags.max_after_vec) | |
1351 | { | |
1352 | max_addr += align_fuzz (rel_lab, insn, rel_align, ~0); | |
1353 | max_addr += align_fuzz (insn, max_lab, 0, ~0); | |
1354 | } | |
1355 | else | |
1356 | max_addr += align_fuzz (rel_lab, max_lab, rel_align, ~0); | |
1357 | } | |
1358 | else | |
1359 | { | |
1360 | if (flags.base_after_vec && ! flags.max_after_vec) | |
1361 | { | |
1362 | max_addr += align_fuzz (max_lab, insn, 0, 0); | |
1363 | max_addr += align_fuzz (insn, rel_lab, 0, 0); | |
1364 | } | |
1365 | else | |
1366 | max_addr += align_fuzz (max_lab, rel_lab, 0, 0); | |
1367 | } | |
f6df08e6 JR |
1368 | vec_mode = CASE_VECTOR_SHORTEN_MODE (min_addr - rel_addr, |
1369 | max_addr - rel_addr, body); | |
1370 | if (!increasing | |
1371 | || (GET_MODE_SIZE (vec_mode) | |
1372 | >= GET_MODE_SIZE (GET_MODE (body)))) | |
1373 | PUT_MODE (body, vec_mode); | |
d6b5193b RS |
1374 | if (JUMP_TABLES_IN_TEXT_SECTION |
1375 | || readonly_data_section == text_section) | |
75197b37 BS |
1376 | { |
1377 | insn_lengths[uid] | |
1378 | = (XVECLEN (body, 1) * GET_MODE_SIZE (GET_MODE (body))); | |
1379 | insn_current_address += insn_lengths[uid]; | |
1380 | if (insn_lengths[uid] != old_length) | |
1381 | something_changed = 1; | |
1382 | } | |
1383 | ||
33f7f353 | 1384 | continue; |
33f7f353 | 1385 | } |
5e75ef4a JL |
1386 | #endif /* CASE_VECTOR_SHORTEN_MODE */ |
1387 | ||
1388 | if (! (varying_length[uid])) | |
3cf2715d | 1389 | { |
4b4bf941 | 1390 | if (NONJUMP_INSN_P (insn) |
674fc07d GS |
1391 | && GET_CODE (PATTERN (insn)) == SEQUENCE) |
1392 | { | |
1393 | int i; | |
1394 | ||
1395 | body = PATTERN (insn); | |
1396 | for (i = 0; i < XVECLEN (body, 0); i++) | |
1397 | { | |
1398 | rtx inner_insn = XVECEXP (body, 0, i); | |
1399 | int inner_uid = INSN_UID (inner_insn); | |
1400 | ||
1401 | INSN_ADDRESSES (inner_uid) = insn_current_address; | |
1402 | ||
1403 | insn_current_address += insn_lengths[inner_uid]; | |
1404 | } | |
dd3f0101 | 1405 | } |
674fc07d GS |
1406 | else |
1407 | insn_current_address += insn_lengths[uid]; | |
1408 | ||
3cf2715d DE |
1409 | continue; |
1410 | } | |
674fc07d | 1411 | |
4b4bf941 | 1412 | if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE) |
3cf2715d DE |
1413 | { |
1414 | int i; | |
f5d927c0 | 1415 | |
3cf2715d DE |
1416 | body = PATTERN (insn); |
1417 | new_length = 0; | |
1418 | for (i = 0; i < XVECLEN (body, 0); i++) | |
1419 | { | |
1420 | rtx inner_insn = XVECEXP (body, 0, i); | |
1421 | int inner_uid = INSN_UID (inner_insn); | |
1422 | int inner_length; | |
1423 | ||
9d98a694 | 1424 | INSN_ADDRESSES (inner_uid) = insn_current_address; |
3cf2715d DE |
1425 | |
1426 | /* insn_current_length returns 0 for insns with a | |
1427 | non-varying length. */ | |
1428 | if (! varying_length[inner_uid]) | |
1429 | inner_length = insn_lengths[inner_uid]; | |
1430 | else | |
1431 | inner_length = insn_current_length (inner_insn); | |
1432 | ||
1433 | if (inner_length != insn_lengths[inner_uid]) | |
1434 | { | |
f6df08e6 JR |
1435 | if (!increasing || inner_length > insn_lengths[inner_uid]) |
1436 | { | |
1437 | insn_lengths[inner_uid] = inner_length; | |
1438 | something_changed = 1; | |
1439 | } | |
1440 | else | |
1441 | inner_length = insn_lengths[inner_uid]; | |
3cf2715d | 1442 | } |
f6df08e6 | 1443 | insn_current_address += inner_length; |
3cf2715d DE |
1444 | new_length += inner_length; |
1445 | } | |
1446 | } | |
1447 | else | |
1448 | { | |
1449 | new_length = insn_current_length (insn); | |
1450 | insn_current_address += new_length; | |
1451 | } | |
1452 | ||
3cf2715d DE |
1453 | #ifdef ADJUST_INSN_LENGTH |
1454 | /* If needed, do any adjustment. */ | |
1455 | tmp_length = new_length; | |
1456 | ADJUST_INSN_LENGTH (insn, new_length); | |
1457 | insn_current_address += (new_length - tmp_length); | |
3cf2715d DE |
1458 | #endif |
1459 | ||
f6df08e6 JR |
1460 | if (new_length != insn_lengths[uid] |
1461 | && (!increasing || new_length > insn_lengths[uid])) | |
3cf2715d DE |
1462 | { |
1463 | insn_lengths[uid] = new_length; | |
1464 | something_changed = 1; | |
1465 | } | |
f6df08e6 JR |
1466 | else |
1467 | insn_current_address += insn_lengths[uid] - new_length; | |
3cf2715d | 1468 | } |
bb4aaf18 | 1469 | /* For a non-optimizing compile, do only a single pass. */ |
f6df08e6 | 1470 | if (!increasing) |
bb4aaf18 | 1471 | break; |
3cf2715d | 1472 | } |
fc470718 R |
1473 | |
1474 | free (varying_length); | |
3cf2715d DE |
1475 | } |
1476 | ||
3cf2715d DE |
1477 | /* Given the body of an INSN known to be generated by an ASM statement, return |
1478 | the number of machine instructions likely to be generated for this insn. | |
1479 | This is used to compute its length. */ | |
1480 | ||
1481 | static int | |
6cf9ac28 | 1482 | asm_insn_count (rtx body) |
3cf2715d | 1483 | { |
48c54229 | 1484 | const char *templ; |
3cf2715d | 1485 | |
5d0930ea | 1486 | if (GET_CODE (body) == ASM_INPUT) |
48c54229 | 1487 | templ = XSTR (body, 0); |
5d0930ea | 1488 | else |
48c54229 | 1489 | templ = decode_asm_operands (body, NULL, NULL, NULL, NULL, NULL); |
5d0930ea | 1490 | |
2bd1d2c8 AP |
1491 | return asm_str_count (templ); |
1492 | } | |
2bd1d2c8 AP |
1493 | |
1494 | /* Return the number of machine instructions likely to be generated for the | |
1495 | inline-asm template. */ | |
1496 | int | |
1497 | asm_str_count (const char *templ) | |
1498 | { | |
1499 | int count = 1; | |
b8698a0f | 1500 | |
48c54229 | 1501 | if (!*templ) |
5bc4fa7c MS |
1502 | return 0; |
1503 | ||
48c54229 KG |
1504 | for (; *templ; templ++) |
1505 | if (IS_ASM_LOGICAL_LINE_SEPARATOR (*templ, templ) | |
1506 | || *templ == '\n') | |
3cf2715d DE |
1507 | count++; |
1508 | ||
1509 | return count; | |
1510 | } | |
3cf2715d | 1511 | \f |
c8aea42c PB |
1512 | /* ??? This is probably the wrong place for these. */ |
1513 | /* Structure recording the mapping from source file and directory | |
1514 | names at compile time to those to be embedded in debug | |
1515 | information. */ | |
1516 | typedef struct debug_prefix_map | |
1517 | { | |
1518 | const char *old_prefix; | |
1519 | const char *new_prefix; | |
1520 | size_t old_len; | |
1521 | size_t new_len; | |
1522 | struct debug_prefix_map *next; | |
1523 | } debug_prefix_map; | |
1524 | ||
1525 | /* Linked list of such structures. */ | |
ffa66012 | 1526 | static debug_prefix_map *debug_prefix_maps; |
c8aea42c PB |
1527 | |
1528 | ||
1529 | /* Record a debug file prefix mapping. ARG is the argument to | |
1530 | -fdebug-prefix-map and must be of the form OLD=NEW. */ | |
1531 | ||
1532 | void | |
1533 | add_debug_prefix_map (const char *arg) | |
1534 | { | |
1535 | debug_prefix_map *map; | |
1536 | const char *p; | |
1537 | ||
1538 | p = strchr (arg, '='); | |
1539 | if (!p) | |
1540 | { | |
1541 | error ("invalid argument %qs to -fdebug-prefix-map", arg); | |
1542 | return; | |
1543 | } | |
1544 | map = XNEW (debug_prefix_map); | |
fe83055d | 1545 | map->old_prefix = xstrndup (arg, p - arg); |
c8aea42c PB |
1546 | map->old_len = p - arg; |
1547 | p++; | |
fe83055d | 1548 | map->new_prefix = xstrdup (p); |
c8aea42c PB |
1549 | map->new_len = strlen (p); |
1550 | map->next = debug_prefix_maps; | |
1551 | debug_prefix_maps = map; | |
1552 | } | |
1553 | ||
1554 | /* Perform user-specified mapping of debug filename prefixes. Return | |
1555 | the new name corresponding to FILENAME. */ | |
1556 | ||
1557 | const char * | |
1558 | remap_debug_filename (const char *filename) | |
1559 | { | |
1560 | debug_prefix_map *map; | |
1561 | char *s; | |
1562 | const char *name; | |
1563 | size_t name_len; | |
1564 | ||
1565 | for (map = debug_prefix_maps; map; map = map->next) | |
94369251 | 1566 | if (filename_ncmp (filename, map->old_prefix, map->old_len) == 0) |
c8aea42c PB |
1567 | break; |
1568 | if (!map) | |
1569 | return filename; | |
1570 | name = filename + map->old_len; | |
1571 | name_len = strlen (name) + 1; | |
1572 | s = (char *) alloca (name_len + map->new_len); | |
1573 | memcpy (s, map->new_prefix, map->new_len); | |
1574 | memcpy (s + map->new_len, name, name_len); | |
1575 | return ggc_strdup (s); | |
1576 | } | |
1577 | \f | |
725730f2 EB |
1578 | /* Return true if DWARF2 debug info can be emitted for DECL. */ |
1579 | ||
1580 | static bool | |
1581 | dwarf2_debug_info_emitted_p (tree decl) | |
1582 | { | |
1583 | if (write_symbols != DWARF2_DEBUG && write_symbols != VMS_AND_DWARF2_DEBUG) | |
1584 | return false; | |
1585 | ||
1586 | if (DECL_IGNORED_P (decl)) | |
1587 | return false; | |
1588 | ||
1589 | return true; | |
1590 | } | |
1591 | ||
78bde837 SB |
1592 | /* Return scope resulting from combination of S1 and S2. */ |
1593 | static tree | |
1594 | choose_inner_scope (tree s1, tree s2) | |
1595 | { | |
1596 | if (!s1) | |
1597 | return s2; | |
1598 | if (!s2) | |
1599 | return s1; | |
1600 | if (BLOCK_NUMBER (s1) > BLOCK_NUMBER (s2)) | |
1601 | return s1; | |
1602 | return s2; | |
1603 | } | |
1604 | ||
1605 | /* Emit lexical block notes needed to change scope from S1 to S2. */ | |
1606 | ||
1607 | static void | |
1608 | change_scope (rtx orig_insn, tree s1, tree s2) | |
1609 | { | |
1610 | rtx insn = orig_insn; | |
1611 | tree com = NULL_TREE; | |
1612 | tree ts1 = s1, ts2 = s2; | |
1613 | tree s; | |
1614 | ||
1615 | while (ts1 != ts2) | |
1616 | { | |
1617 | gcc_assert (ts1 && ts2); | |
1618 | if (BLOCK_NUMBER (ts1) > BLOCK_NUMBER (ts2)) | |
1619 | ts1 = BLOCK_SUPERCONTEXT (ts1); | |
1620 | else if (BLOCK_NUMBER (ts1) < BLOCK_NUMBER (ts2)) | |
1621 | ts2 = BLOCK_SUPERCONTEXT (ts2); | |
1622 | else | |
1623 | { | |
1624 | ts1 = BLOCK_SUPERCONTEXT (ts1); | |
1625 | ts2 = BLOCK_SUPERCONTEXT (ts2); | |
1626 | } | |
1627 | } | |
1628 | com = ts1; | |
1629 | ||
1630 | /* Close scopes. */ | |
1631 | s = s1; | |
1632 | while (s != com) | |
1633 | { | |
1634 | rtx note = emit_note_before (NOTE_INSN_BLOCK_END, insn); | |
1635 | NOTE_BLOCK (note) = s; | |
1636 | s = BLOCK_SUPERCONTEXT (s); | |
1637 | } | |
1638 | ||
1639 | /* Open scopes. */ | |
1640 | s = s2; | |
1641 | while (s != com) | |
1642 | { | |
1643 | insn = emit_note_before (NOTE_INSN_BLOCK_BEG, insn); | |
1644 | NOTE_BLOCK (insn) = s; | |
1645 | s = BLOCK_SUPERCONTEXT (s); | |
1646 | } | |
1647 | } | |
1648 | ||
1649 | /* Rebuild all the NOTE_INSN_BLOCK_BEG and NOTE_INSN_BLOCK_END notes based | |
1650 | on the scope tree and the newly reordered instructions. */ | |
1651 | ||
1652 | static void | |
1653 | reemit_insn_block_notes (void) | |
1654 | { | |
1655 | tree cur_block = DECL_INITIAL (cfun->decl); | |
1656 | rtx insn, note; | |
1657 | ||
1658 | insn = get_insns (); | |
97aba8e9 | 1659 | for (; insn; insn = NEXT_INSN (insn)) |
78bde837 SB |
1660 | { |
1661 | tree this_block; | |
1662 | ||
67598720 TJ |
1663 | /* Prevent lexical blocks from straddling section boundaries. */ |
1664 | if (NOTE_P (insn) && NOTE_KIND (insn) == NOTE_INSN_SWITCH_TEXT_SECTIONS) | |
1665 | { | |
1666 | for (tree s = cur_block; s != DECL_INITIAL (cfun->decl); | |
1667 | s = BLOCK_SUPERCONTEXT (s)) | |
1668 | { | |
1669 | rtx note = emit_note_before (NOTE_INSN_BLOCK_END, insn); | |
1670 | NOTE_BLOCK (note) = s; | |
1671 | note = emit_note_after (NOTE_INSN_BLOCK_BEG, insn); | |
1672 | NOTE_BLOCK (note) = s; | |
1673 | } | |
1674 | } | |
1675 | ||
1676 | if (!active_insn_p (insn)) | |
1677 | continue; | |
1678 | ||
78bde837 SB |
1679 | /* Avoid putting scope notes between jump table and its label. */ |
1680 | if (JUMP_TABLE_DATA_P (insn)) | |
1681 | continue; | |
1682 | ||
1683 | this_block = insn_scope (insn); | |
1684 | /* For sequences compute scope resulting from merging all scopes | |
1685 | of instructions nested inside. */ | |
1686 | if (GET_CODE (PATTERN (insn)) == SEQUENCE) | |
1687 | { | |
1688 | int i; | |
1689 | rtx body = PATTERN (insn); | |
1690 | ||
1691 | this_block = NULL; | |
1692 | for (i = 0; i < XVECLEN (body, 0); i++) | |
1693 | this_block = choose_inner_scope (this_block, | |
1694 | insn_scope (XVECEXP (body, 0, i))); | |
1695 | } | |
1696 | if (! this_block) | |
48866799 DC |
1697 | { |
1698 | if (INSN_LOCATION (insn) == UNKNOWN_LOCATION) | |
1699 | continue; | |
1700 | else | |
1701 | this_block = DECL_INITIAL (cfun->decl); | |
1702 | } | |
78bde837 SB |
1703 | |
1704 | if (this_block != cur_block) | |
1705 | { | |
1706 | change_scope (insn, cur_block, this_block); | |
1707 | cur_block = this_block; | |
1708 | } | |
1709 | } | |
1710 | ||
1711 | /* change_scope emits before the insn, not after. */ | |
1712 | note = emit_note (NOTE_INSN_DELETED); | |
1713 | change_scope (note, cur_block, DECL_INITIAL (cfun->decl)); | |
1714 | delete_insn (note); | |
1715 | ||
1716 | reorder_blocks (); | |
1717 | } | |
1718 | ||
3cf2715d DE |
1719 | /* Output assembler code for the start of a function, |
1720 | and initialize some of the variables in this file | |
1721 | for the new function. The label for the function and associated | |
1722 | assembler pseudo-ops have already been output in `assemble_start_function'. | |
1723 | ||
1724 | FIRST is the first insn of the rtl for the function being compiled. | |
1725 | FILE is the file to write assembler code to. | |
46625112 | 1726 | OPTIMIZE_P is nonzero if we should eliminate redundant |
3cf2715d DE |
1727 | test and compare insns. */ |
1728 | ||
1729 | void | |
ddd84654 | 1730 | final_start_function (rtx first, FILE *file, |
46625112 | 1731 | int optimize_p ATTRIBUTE_UNUSED) |
3cf2715d DE |
1732 | { |
1733 | block_depth = 0; | |
1734 | ||
1735 | this_is_asm_operands = 0; | |
1736 | ||
ddd84654 JJ |
1737 | need_profile_function = false; |
1738 | ||
5368224f DC |
1739 | last_filename = LOCATION_FILE (prologue_location); |
1740 | last_linenum = LOCATION_LINE (prologue_location); | |
6c52e687 | 1741 | last_discriminator = discriminator = 0; |
9ae130f8 | 1742 | |
653e276c | 1743 | high_block_linenum = high_function_linenum = last_linenum; |
eac40081 | 1744 | |
ef1b3fda KS |
1745 | if (flag_sanitize & SANITIZE_ADDRESS) |
1746 | asan_function_start (); | |
1747 | ||
725730f2 EB |
1748 | if (!DECL_IGNORED_P (current_function_decl)) |
1749 | debug_hooks->begin_prologue (last_linenum, last_filename); | |
d291dd49 | 1750 | |
725730f2 | 1751 | if (!dwarf2_debug_info_emitted_p (current_function_decl)) |
653e276c | 1752 | dwarf2out_begin_prologue (0, NULL); |
3cf2715d DE |
1753 | |
1754 | #ifdef LEAF_REG_REMAP | |
416ff32e | 1755 | if (crtl->uses_only_leaf_regs) |
3cf2715d DE |
1756 | leaf_renumber_regs (first); |
1757 | #endif | |
1758 | ||
1759 | /* The Sun386i and perhaps other machines don't work right | |
1760 | if the profiling code comes after the prologue. */ | |
3c5273a9 | 1761 | if (targetm.profile_before_prologue () && crtl->profile) |
ddd84654 JJ |
1762 | { |
1763 | if (targetm.asm_out.function_prologue | |
1764 | == default_function_pro_epilogue | |
1765 | #ifdef HAVE_prologue | |
1766 | && HAVE_prologue | |
1767 | #endif | |
1768 | ) | |
1769 | { | |
1770 | rtx insn; | |
1771 | for (insn = first; insn; insn = NEXT_INSN (insn)) | |
1772 | if (!NOTE_P (insn)) | |
1773 | { | |
1774 | insn = NULL_RTX; | |
1775 | break; | |
1776 | } | |
1777 | else if (NOTE_KIND (insn) == NOTE_INSN_BASIC_BLOCK | |
1778 | || NOTE_KIND (insn) == NOTE_INSN_FUNCTION_BEG) | |
1779 | break; | |
1780 | else if (NOTE_KIND (insn) == NOTE_INSN_DELETED | |
1781 | || NOTE_KIND (insn) == NOTE_INSN_VAR_LOCATION) | |
1782 | continue; | |
1783 | else | |
1784 | { | |
1785 | insn = NULL_RTX; | |
1786 | break; | |
1787 | } | |
1788 | ||
1789 | if (insn) | |
1790 | need_profile_function = true; | |
1791 | else | |
1792 | profile_function (file); | |
1793 | } | |
1794 | else | |
1795 | profile_function (file); | |
1796 | } | |
3cf2715d | 1797 | |
18c038b9 MM |
1798 | /* If debugging, assign block numbers to all of the blocks in this |
1799 | function. */ | |
1800 | if (write_symbols) | |
1801 | { | |
0435312e | 1802 | reemit_insn_block_notes (); |
a20612aa | 1803 | number_blocks (current_function_decl); |
18c038b9 MM |
1804 | /* We never actually put out begin/end notes for the top-level |
1805 | block in the function. But, conceptually, that block is | |
1806 | always needed. */ | |
1807 | TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl)) = 1; | |
1808 | } | |
1809 | ||
a214518f SP |
1810 | if (warn_frame_larger_than |
1811 | && get_frame_size () > frame_larger_than_size) | |
1812 | { | |
1813 | /* Issue a warning */ | |
1814 | warning (OPT_Wframe_larger_than_, | |
1815 | "the frame size of %wd bytes is larger than %wd bytes", | |
1816 | get_frame_size (), frame_larger_than_size); | |
1817 | } | |
1818 | ||
3cf2715d | 1819 | /* First output the function prologue: code to set up the stack frame. */ |
5fd9b178 | 1820 | targetm.asm_out.function_prologue (file, get_frame_size ()); |
3cf2715d | 1821 | |
3cf2715d DE |
1822 | /* If the machine represents the prologue as RTL, the profiling code must |
1823 | be emitted when NOTE_INSN_PROLOGUE_END is scanned. */ | |
1824 | #ifdef HAVE_prologue | |
1825 | if (! HAVE_prologue) | |
1826 | #endif | |
1827 | profile_after_prologue (file); | |
3cf2715d DE |
1828 | } |
1829 | ||
1830 | static void | |
6cf9ac28 | 1831 | profile_after_prologue (FILE *file ATTRIBUTE_UNUSED) |
3cf2715d | 1832 | { |
3c5273a9 | 1833 | if (!targetm.profile_before_prologue () && crtl->profile) |
3cf2715d | 1834 | profile_function (file); |
3cf2715d DE |
1835 | } |
1836 | ||
1837 | static void | |
6cf9ac28 | 1838 | profile_function (FILE *file ATTRIBUTE_UNUSED) |
3cf2715d | 1839 | { |
dcacfa04 | 1840 | #ifndef NO_PROFILE_COUNTERS |
9739c90c | 1841 | # define NO_PROFILE_COUNTERS 0 |
dcacfa04 | 1842 | #endif |
531ca746 RH |
1843 | #ifdef ASM_OUTPUT_REG_PUSH |
1844 | rtx sval = NULL, chain = NULL; | |
1845 | ||
1846 | if (cfun->returns_struct) | |
1847 | sval = targetm.calls.struct_value_rtx (TREE_TYPE (current_function_decl), | |
1848 | true); | |
1849 | if (cfun->static_chain_decl) | |
1850 | chain = targetm.calls.static_chain (current_function_decl, true); | |
b729186a | 1851 | #endif /* ASM_OUTPUT_REG_PUSH */ |
3cf2715d | 1852 | |
9739c90c JJ |
1853 | if (! NO_PROFILE_COUNTERS) |
1854 | { | |
1855 | int align = MIN (BIGGEST_ALIGNMENT, LONG_TYPE_SIZE); | |
d6b5193b | 1856 | switch_to_section (data_section); |
9739c90c | 1857 | ASM_OUTPUT_ALIGN (file, floor_log2 (align / BITS_PER_UNIT)); |
5fd9b178 | 1858 | targetm.asm_out.internal_label (file, "LP", current_function_funcdef_no); |
9739c90c JJ |
1859 | assemble_integer (const0_rtx, LONG_TYPE_SIZE / BITS_PER_UNIT, align, 1); |
1860 | } | |
3cf2715d | 1861 | |
d6b5193b | 1862 | switch_to_section (current_function_section ()); |
3cf2715d | 1863 | |
531ca746 RH |
1864 | #ifdef ASM_OUTPUT_REG_PUSH |
1865 | if (sval && REG_P (sval)) | |
1866 | ASM_OUTPUT_REG_PUSH (file, REGNO (sval)); | |
1867 | if (chain && REG_P (chain)) | |
1868 | ASM_OUTPUT_REG_PUSH (file, REGNO (chain)); | |
3cf2715d | 1869 | #endif |
3cf2715d | 1870 | |
df696a75 | 1871 | FUNCTION_PROFILER (file, current_function_funcdef_no); |
3cf2715d | 1872 | |
531ca746 RH |
1873 | #ifdef ASM_OUTPUT_REG_PUSH |
1874 | if (chain && REG_P (chain)) | |
1875 | ASM_OUTPUT_REG_POP (file, REGNO (chain)); | |
1876 | if (sval && REG_P (sval)) | |
1877 | ASM_OUTPUT_REG_POP (file, REGNO (sval)); | |
3cf2715d DE |
1878 | #endif |
1879 | } | |
1880 | ||
1881 | /* Output assembler code for the end of a function. | |
1882 | For clarity, args are same as those of `final_start_function' | |
1883 | even though not all of them are needed. */ | |
1884 | ||
1885 | void | |
6cf9ac28 | 1886 | final_end_function (void) |
3cf2715d | 1887 | { |
be1bb652 | 1888 | app_disable (); |
3cf2715d | 1889 | |
725730f2 EB |
1890 | if (!DECL_IGNORED_P (current_function_decl)) |
1891 | debug_hooks->end_function (high_function_linenum); | |
3cf2715d | 1892 | |
3cf2715d DE |
1893 | /* Finally, output the function epilogue: |
1894 | code to restore the stack frame and return to the caller. */ | |
5fd9b178 | 1895 | targetm.asm_out.function_epilogue (asm_out_file, get_frame_size ()); |
3cf2715d | 1896 | |
e2a12aca | 1897 | /* And debug output. */ |
725730f2 EB |
1898 | if (!DECL_IGNORED_P (current_function_decl)) |
1899 | debug_hooks->end_epilogue (last_linenum, last_filename); | |
3cf2715d | 1900 | |
725730f2 | 1901 | if (!dwarf2_debug_info_emitted_p (current_function_decl) |
7a0c8d71 | 1902 | && dwarf2out_do_frame ()) |
702ada3d | 1903 | dwarf2out_end_epilogue (last_linenum, last_filename); |
3cf2715d DE |
1904 | } |
1905 | \f | |
6a801cf2 XDL |
1906 | |
1907 | /* Dumper helper for basic block information. FILE is the assembly | |
1908 | output file, and INSN is the instruction being emitted. */ | |
1909 | ||
1910 | static void | |
1911 | dump_basic_block_info (FILE *file, rtx insn, basic_block *start_to_bb, | |
1912 | basic_block *end_to_bb, int bb_map_size, int *bb_seqn) | |
1913 | { | |
1914 | basic_block bb; | |
1915 | ||
1916 | if (!flag_debug_asm) | |
1917 | return; | |
1918 | ||
1919 | if (INSN_UID (insn) < bb_map_size | |
1920 | && (bb = start_to_bb[INSN_UID (insn)]) != NULL) | |
1921 | { | |
1922 | edge e; | |
1923 | edge_iterator ei; | |
1924 | ||
1c13f168 | 1925 | fprintf (file, "%s BLOCK %d", ASM_COMMENT_START, bb->index); |
6a801cf2 XDL |
1926 | if (bb->frequency) |
1927 | fprintf (file, " freq:%d", bb->frequency); | |
1928 | if (bb->count) | |
a9243bfc | 1929 | fprintf (file, " count:%"PRId64, |
6a801cf2 XDL |
1930 | bb->count); |
1931 | fprintf (file, " seq:%d", (*bb_seqn)++); | |
1c13f168 | 1932 | fprintf (file, "\n%s PRED:", ASM_COMMENT_START); |
6a801cf2 XDL |
1933 | FOR_EACH_EDGE (e, ei, bb->preds) |
1934 | { | |
a315c44c | 1935 | dump_edge_info (file, e, TDF_DETAILS, 0); |
6a801cf2 XDL |
1936 | } |
1937 | fprintf (file, "\n"); | |
1938 | } | |
1939 | if (INSN_UID (insn) < bb_map_size | |
1940 | && (bb = end_to_bb[INSN_UID (insn)]) != NULL) | |
1941 | { | |
1942 | edge e; | |
1943 | edge_iterator ei; | |
1944 | ||
1c13f168 | 1945 | fprintf (asm_out_file, "%s SUCC:", ASM_COMMENT_START); |
6a801cf2 XDL |
1946 | FOR_EACH_EDGE (e, ei, bb->succs) |
1947 | { | |
a315c44c | 1948 | dump_edge_info (asm_out_file, e, TDF_DETAILS, 1); |
6a801cf2 XDL |
1949 | } |
1950 | fprintf (file, "\n"); | |
1951 | } | |
1952 | } | |
1953 | ||
3cf2715d | 1954 | /* Output assembler code for some insns: all or part of a function. |
c9d691e9 | 1955 | For description of args, see `final_start_function', above. */ |
3cf2715d DE |
1956 | |
1957 | void | |
46625112 | 1958 | final (rtx first, FILE *file, int optimize_p) |
3cf2715d | 1959 | { |
bc5612ed | 1960 | rtx insn, next; |
589fe865 | 1961 | int seen = 0; |
3cf2715d | 1962 | |
6a801cf2 XDL |
1963 | /* Used for -dA dump. */ |
1964 | basic_block *start_to_bb = NULL; | |
1965 | basic_block *end_to_bb = NULL; | |
1966 | int bb_map_size = 0; | |
1967 | int bb_seqn = 0; | |
1968 | ||
3cf2715d | 1969 | last_ignored_compare = 0; |
3cf2715d | 1970 | |
c8b8af71 | 1971 | #ifdef HAVE_cc0 |
3cf2715d | 1972 | for (insn = first; insn; insn = NEXT_INSN (insn)) |
a8c3510c | 1973 | { |
9ef4c6ef JC |
1974 | /* If CC tracking across branches is enabled, record the insn which |
1975 | jumps to each branch only reached from one place. */ | |
46625112 | 1976 | if (optimize_p && JUMP_P (insn)) |
9ef4c6ef JC |
1977 | { |
1978 | rtx lab = JUMP_LABEL (insn); | |
0c514727 | 1979 | if (lab && LABEL_P (lab) && LABEL_NUSES (lab) == 1) |
9ef4c6ef JC |
1980 | { |
1981 | LABEL_REFS (lab) = insn; | |
1982 | } | |
1983 | } | |
a8c3510c | 1984 | } |
c8b8af71 | 1985 | #endif |
a8c3510c | 1986 | |
3cf2715d DE |
1987 | init_recog (); |
1988 | ||
1989 | CC_STATUS_INIT; | |
1990 | ||
6a801cf2 XDL |
1991 | if (flag_debug_asm) |
1992 | { | |
1993 | basic_block bb; | |
1994 | ||
1995 | bb_map_size = get_max_uid () + 1; | |
1996 | start_to_bb = XCNEWVEC (basic_block, bb_map_size); | |
1997 | end_to_bb = XCNEWVEC (basic_block, bb_map_size); | |
1998 | ||
292ffe86 CC |
1999 | /* There is no cfg for a thunk. */ |
2000 | if (!cfun->is_thunk) | |
4f42035e | 2001 | FOR_EACH_BB_REVERSE_FN (bb, cfun) |
292ffe86 CC |
2002 | { |
2003 | start_to_bb[INSN_UID (BB_HEAD (bb))] = bb; | |
2004 | end_to_bb[INSN_UID (BB_END (bb))] = bb; | |
2005 | } | |
6a801cf2 XDL |
2006 | } |
2007 | ||
3cf2715d | 2008 | /* Output the insns. */ |
9ff57809 | 2009 | for (insn = first; insn;) |
2f16edb1 | 2010 | { |
d327457f | 2011 | if (HAVE_ATTR_length) |
0ac76ad9 | 2012 | { |
d327457f JR |
2013 | if ((unsigned) INSN_UID (insn) >= INSN_ADDRESSES_SIZE ()) |
2014 | { | |
2015 | /* This can be triggered by bugs elsewhere in the compiler if | |
2016 | new insns are created after init_insn_lengths is called. */ | |
2017 | gcc_assert (NOTE_P (insn)); | |
2018 | insn_current_address = -1; | |
2019 | } | |
2020 | else | |
2021 | insn_current_address = INSN_ADDRESSES (INSN_UID (insn)); | |
0ac76ad9 | 2022 | } |
0ac76ad9 | 2023 | |
6a801cf2 XDL |
2024 | dump_basic_block_info (file, insn, start_to_bb, end_to_bb, |
2025 | bb_map_size, &bb_seqn); | |
46625112 | 2026 | insn = final_scan_insn (insn, file, optimize_p, 0, &seen); |
2f16edb1 | 2027 | } |
6a801cf2 XDL |
2028 | |
2029 | if (flag_debug_asm) | |
2030 | { | |
2031 | free (start_to_bb); | |
2032 | free (end_to_bb); | |
2033 | } | |
bc5612ed BS |
2034 | |
2035 | /* Remove CFI notes, to avoid compare-debug failures. */ | |
2036 | for (insn = first; insn; insn = next) | |
2037 | { | |
2038 | next = NEXT_INSN (insn); | |
2039 | if (NOTE_P (insn) | |
2040 | && (NOTE_KIND (insn) == NOTE_INSN_CFI | |
2041 | || NOTE_KIND (insn) == NOTE_INSN_CFI_LABEL)) | |
2042 | delete_insn (insn); | |
2043 | } | |
3cf2715d DE |
2044 | } |
2045 | \f | |
4bbf910e | 2046 | const char * |
6cf9ac28 | 2047 | get_insn_template (int code, rtx insn) |
4bbf910e | 2048 | { |
4bbf910e RH |
2049 | switch (insn_data[code].output_format) |
2050 | { | |
2051 | case INSN_OUTPUT_FORMAT_SINGLE: | |
3897f229 | 2052 | return insn_data[code].output.single; |
4bbf910e | 2053 | case INSN_OUTPUT_FORMAT_MULTI: |
3897f229 | 2054 | return insn_data[code].output.multi[which_alternative]; |
4bbf910e | 2055 | case INSN_OUTPUT_FORMAT_FUNCTION: |
0bccc606 | 2056 | gcc_assert (insn); |
3897f229 | 2057 | return (*insn_data[code].output.function) (recog_data.operand, insn); |
4bbf910e RH |
2058 | |
2059 | default: | |
0bccc606 | 2060 | gcc_unreachable (); |
4bbf910e RH |
2061 | } |
2062 | } | |
f5d927c0 | 2063 | |
0dc36574 ZW |
2064 | /* Emit the appropriate declaration for an alternate-entry-point |
2065 | symbol represented by INSN, to FILE. INSN is a CODE_LABEL with | |
2066 | LABEL_KIND != LABEL_NORMAL. | |
2067 | ||
2068 | The case fall-through in this function is intentional. */ | |
2069 | static void | |
6cf9ac28 | 2070 | output_alternate_entry_point (FILE *file, rtx insn) |
0dc36574 ZW |
2071 | { |
2072 | const char *name = LABEL_NAME (insn); | |
2073 | ||
2074 | switch (LABEL_KIND (insn)) | |
2075 | { | |
2076 | case LABEL_WEAK_ENTRY: | |
2077 | #ifdef ASM_WEAKEN_LABEL | |
2078 | ASM_WEAKEN_LABEL (file, name); | |
2079 | #endif | |
2080 | case LABEL_GLOBAL_ENTRY: | |
5fd9b178 | 2081 | targetm.asm_out.globalize_label (file, name); |
0dc36574 | 2082 | case LABEL_STATIC_ENTRY: |
905173eb ZW |
2083 | #ifdef ASM_OUTPUT_TYPE_DIRECTIVE |
2084 | ASM_OUTPUT_TYPE_DIRECTIVE (file, name, "function"); | |
2085 | #endif | |
0dc36574 ZW |
2086 | ASM_OUTPUT_LABEL (file, name); |
2087 | break; | |
2088 | ||
2089 | case LABEL_NORMAL: | |
2090 | default: | |
0bccc606 | 2091 | gcc_unreachable (); |
0dc36574 ZW |
2092 | } |
2093 | } | |
2094 | ||
f410e1b3 RAE |
2095 | /* Given a CALL_INSN, find and return the nested CALL. */ |
2096 | static rtx | |
2097 | call_from_call_insn (rtx insn) | |
2098 | { | |
2099 | rtx x; | |
2100 | gcc_assert (CALL_P (insn)); | |
2101 | x = PATTERN (insn); | |
2102 | ||
2103 | while (GET_CODE (x) != CALL) | |
2104 | { | |
2105 | switch (GET_CODE (x)) | |
2106 | { | |
2107 | default: | |
2108 | gcc_unreachable (); | |
b8c71e40 RAE |
2109 | case COND_EXEC: |
2110 | x = COND_EXEC_CODE (x); | |
2111 | break; | |
f410e1b3 RAE |
2112 | case PARALLEL: |
2113 | x = XVECEXP (x, 0, 0); | |
2114 | break; | |
2115 | case SET: | |
2116 | x = XEXP (x, 1); | |
2117 | break; | |
2118 | } | |
2119 | } | |
2120 | return x; | |
2121 | } | |
2122 | ||
3cf2715d DE |
2123 | /* The final scan for one insn, INSN. |
2124 | Args are same as in `final', except that INSN | |
2125 | is the insn being scanned. | |
2126 | Value returned is the next insn to be scanned. | |
2127 | ||
ff8cea7e EB |
2128 | NOPEEPHOLES is the flag to disallow peephole processing (currently |
2129 | used for within delayed branch sequence output). | |
3cf2715d | 2130 | |
589fe865 DJ |
2131 | SEEN is used to track the end of the prologue, for emitting |
2132 | debug information. We force the emission of a line note after | |
70aacc97 | 2133 | both NOTE_INSN_PROLOGUE_END and NOTE_INSN_FUNCTION_BEG. */ |
589fe865 | 2134 | |
5cfc5f84 | 2135 | rtx |
46625112 | 2136 | final_scan_insn (rtx insn, FILE *file, int optimize_p ATTRIBUTE_UNUSED, |
c9d691e9 | 2137 | int nopeepholes ATTRIBUTE_UNUSED, int *seen) |
3cf2715d | 2138 | { |
90ca38bb MM |
2139 | #ifdef HAVE_cc0 |
2140 | rtx set; | |
2141 | #endif | |
b2a6a2fb | 2142 | rtx next; |
90ca38bb | 2143 | |
3cf2715d DE |
2144 | insn_counter++; |
2145 | ||
2146 | /* Ignore deleted insns. These can occur when we split insns (due to a | |
2147 | template of "#") while not optimizing. */ | |
2148 | if (INSN_DELETED_P (insn)) | |
2149 | return NEXT_INSN (insn); | |
2150 | ||
2151 | switch (GET_CODE (insn)) | |
2152 | { | |
2153 | case NOTE: | |
a38e7aa5 | 2154 | switch (NOTE_KIND (insn)) |
be1bb652 RH |
2155 | { |
2156 | case NOTE_INSN_DELETED: | |
be1bb652 | 2157 | break; |
3cf2715d | 2158 | |
87c8b4be | 2159 | case NOTE_INSN_SWITCH_TEXT_SECTIONS: |
c543ca49 | 2160 | in_cold_section_p = !in_cold_section_p; |
f0a0390e | 2161 | |
a4b6974e UB |
2162 | if (dwarf2out_do_frame ()) |
2163 | dwarf2out_switch_text_section (); | |
f0a0390e | 2164 | else if (!DECL_IGNORED_P (current_function_decl)) |
725730f2 | 2165 | debug_hooks->switch_text_section (); |
a4b6974e | 2166 | |
c543ca49 | 2167 | switch_to_section (current_function_section ()); |
14d11d40 IS |
2168 | targetm.asm_out.function_switched_text_sections (asm_out_file, |
2169 | current_function_decl, | |
2170 | in_cold_section_p); | |
2ae367c1 ST |
2171 | /* Emit a label for the split cold section. Form label name by |
2172 | suffixing "cold" to the original function's name. */ | |
2173 | if (in_cold_section_p) | |
2174 | { | |
2175 | tree cold_function_name | |
2176 | = clone_function_name (current_function_decl, "cold"); | |
2177 | ASM_OUTPUT_LABEL (asm_out_file, | |
2178 | IDENTIFIER_POINTER (cold_function_name)); | |
2179 | } | |
750054a2 | 2180 | break; |
b0efb46b | 2181 | |
be1bb652 | 2182 | case NOTE_INSN_BASIC_BLOCK: |
ddd84654 JJ |
2183 | if (need_profile_function) |
2184 | { | |
2185 | profile_function (asm_out_file); | |
2186 | need_profile_function = false; | |
2187 | } | |
2188 | ||
2784ed9c KT |
2189 | if (targetm.asm_out.unwind_emit) |
2190 | targetm.asm_out.unwind_emit (asm_out_file, insn); | |
951120ea | 2191 | |
6c52e687 CC |
2192 | discriminator = NOTE_BASIC_BLOCK (insn)->discriminator; |
2193 | ||
be1bb652 | 2194 | break; |
3cf2715d | 2195 | |
be1bb652 | 2196 | case NOTE_INSN_EH_REGION_BEG: |
52a11cbf RH |
2197 | ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHB", |
2198 | NOTE_EH_HANDLER (insn)); | |
3d195391 | 2199 | break; |
3d195391 | 2200 | |
be1bb652 | 2201 | case NOTE_INSN_EH_REGION_END: |
52a11cbf RH |
2202 | ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHE", |
2203 | NOTE_EH_HANDLER (insn)); | |
3d195391 | 2204 | break; |
3d195391 | 2205 | |
be1bb652 | 2206 | case NOTE_INSN_PROLOGUE_END: |
5fd9b178 | 2207 | targetm.asm_out.function_end_prologue (file); |
3cf2715d | 2208 | profile_after_prologue (file); |
589fe865 DJ |
2209 | |
2210 | if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE) | |
2211 | { | |
2212 | *seen |= SEEN_EMITTED; | |
b8176fe4 | 2213 | force_source_line = true; |
589fe865 DJ |
2214 | } |
2215 | else | |
2216 | *seen |= SEEN_NOTE; | |
2217 | ||
3cf2715d | 2218 | break; |
3cf2715d | 2219 | |
be1bb652 | 2220 | case NOTE_INSN_EPILOGUE_BEG: |
bc45e4ba TG |
2221 | if (!DECL_IGNORED_P (current_function_decl)) |
2222 | (*debug_hooks->begin_epilogue) (last_linenum, last_filename); | |
5fd9b178 | 2223 | targetm.asm_out.function_begin_epilogue (file); |
be1bb652 | 2224 | break; |
3cf2715d | 2225 | |
bc5612ed BS |
2226 | case NOTE_INSN_CFI: |
2227 | dwarf2out_emit_cfi (NOTE_CFI (insn)); | |
2228 | break; | |
2229 | ||
2230 | case NOTE_INSN_CFI_LABEL: | |
2231 | ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LCFI", | |
2232 | NOTE_LABEL_NUMBER (insn)); | |
cd9c1ca8 RH |
2233 | break; |
2234 | ||
be1bb652 | 2235 | case NOTE_INSN_FUNCTION_BEG: |
ddd84654 JJ |
2236 | if (need_profile_function) |
2237 | { | |
2238 | profile_function (asm_out_file); | |
2239 | need_profile_function = false; | |
2240 | } | |
2241 | ||
653e276c | 2242 | app_disable (); |
725730f2 EB |
2243 | if (!DECL_IGNORED_P (current_function_decl)) |
2244 | debug_hooks->end_prologue (last_linenum, last_filename); | |
589fe865 DJ |
2245 | |
2246 | if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE) | |
2247 | { | |
2248 | *seen |= SEEN_EMITTED; | |
b8176fe4 | 2249 | force_source_line = true; |
589fe865 DJ |
2250 | } |
2251 | else | |
2252 | *seen |= SEEN_NOTE; | |
2253 | ||
3cf2715d | 2254 | break; |
be1bb652 RH |
2255 | |
2256 | case NOTE_INSN_BLOCK_BEG: | |
2257 | if (debug_info_level == DINFO_LEVEL_NORMAL | |
3cf2715d | 2258 | || debug_info_level == DINFO_LEVEL_VERBOSE |
7a0c8d71 DR |
2259 | || write_symbols == DWARF2_DEBUG |
2260 | || write_symbols == VMS_AND_DWARF2_DEBUG | |
2261 | || write_symbols == VMS_DEBUG) | |
be1bb652 RH |
2262 | { |
2263 | int n = BLOCK_NUMBER (NOTE_BLOCK (insn)); | |
3cf2715d | 2264 | |
be1bb652 RH |
2265 | app_disable (); |
2266 | ++block_depth; | |
2267 | high_block_linenum = last_linenum; | |
eac40081 | 2268 | |
a5a42b92 | 2269 | /* Output debugging info about the symbol-block beginning. */ |
725730f2 EB |
2270 | if (!DECL_IGNORED_P (current_function_decl)) |
2271 | debug_hooks->begin_block (last_linenum, n); | |
3cf2715d | 2272 | |
be1bb652 RH |
2273 | /* Mark this block as output. */ |
2274 | TREE_ASM_WRITTEN (NOTE_BLOCK (insn)) = 1; | |
2275 | } | |
d752cfdb JJ |
2276 | if (write_symbols == DBX_DEBUG |
2277 | || write_symbols == SDB_DEBUG) | |
2278 | { | |
2279 | location_t *locus_ptr | |
2280 | = block_nonartificial_location (NOTE_BLOCK (insn)); | |
2281 | ||
2282 | if (locus_ptr != NULL) | |
2283 | { | |
2284 | override_filename = LOCATION_FILE (*locus_ptr); | |
2285 | override_linenum = LOCATION_LINE (*locus_ptr); | |
2286 | } | |
2287 | } | |
be1bb652 | 2288 | break; |
18c038b9 | 2289 | |
be1bb652 RH |
2290 | case NOTE_INSN_BLOCK_END: |
2291 | if (debug_info_level == DINFO_LEVEL_NORMAL | |
2292 | || debug_info_level == DINFO_LEVEL_VERBOSE | |
7a0c8d71 DR |
2293 | || write_symbols == DWARF2_DEBUG |
2294 | || write_symbols == VMS_AND_DWARF2_DEBUG | |
2295 | || write_symbols == VMS_DEBUG) | |
be1bb652 RH |
2296 | { |
2297 | int n = BLOCK_NUMBER (NOTE_BLOCK (insn)); | |
3cf2715d | 2298 | |
be1bb652 RH |
2299 | app_disable (); |
2300 | ||
2301 | /* End of a symbol-block. */ | |
2302 | --block_depth; | |
0bccc606 | 2303 | gcc_assert (block_depth >= 0); |
3cf2715d | 2304 | |
725730f2 EB |
2305 | if (!DECL_IGNORED_P (current_function_decl)) |
2306 | debug_hooks->end_block (high_block_linenum, n); | |
be1bb652 | 2307 | } |
d752cfdb JJ |
2308 | if (write_symbols == DBX_DEBUG |
2309 | || write_symbols == SDB_DEBUG) | |
2310 | { | |
2311 | tree outer_block = BLOCK_SUPERCONTEXT (NOTE_BLOCK (insn)); | |
2312 | location_t *locus_ptr | |
2313 | = block_nonartificial_location (outer_block); | |
2314 | ||
2315 | if (locus_ptr != NULL) | |
2316 | { | |
2317 | override_filename = LOCATION_FILE (*locus_ptr); | |
2318 | override_linenum = LOCATION_LINE (*locus_ptr); | |
2319 | } | |
2320 | else | |
2321 | { | |
2322 | override_filename = NULL; | |
2323 | override_linenum = 0; | |
2324 | } | |
2325 | } | |
be1bb652 RH |
2326 | break; |
2327 | ||
2328 | case NOTE_INSN_DELETED_LABEL: | |
2329 | /* Emit the label. We may have deleted the CODE_LABEL because | |
2330 | the label could be proved to be unreachable, though still | |
2331 | referenced (in the form of having its address taken. */ | |
8215347e | 2332 | ASM_OUTPUT_DEBUG_LABEL (file, "L", CODE_LABEL_NUMBER (insn)); |
be1bb652 | 2333 | break; |
3cf2715d | 2334 | |
5619e52c JJ |
2335 | case NOTE_INSN_DELETED_DEBUG_LABEL: |
2336 | /* Similarly, but need to use different namespace for it. */ | |
2337 | if (CODE_LABEL_NUMBER (insn) != -1) | |
2338 | ASM_OUTPUT_DEBUG_LABEL (file, "LDL", CODE_LABEL_NUMBER (insn)); | |
2339 | break; | |
2340 | ||
014a1138 | 2341 | case NOTE_INSN_VAR_LOCATION: |
2b1c5433 | 2342 | case NOTE_INSN_CALL_ARG_LOCATION: |
725730f2 EB |
2343 | if (!DECL_IGNORED_P (current_function_decl)) |
2344 | debug_hooks->var_location (insn); | |
014a1138 JZ |
2345 | break; |
2346 | ||
be1bb652 | 2347 | default: |
a38e7aa5 | 2348 | gcc_unreachable (); |
f5d927c0 | 2349 | break; |
3cf2715d DE |
2350 | } |
2351 | break; | |
2352 | ||
2353 | case BARRIER: | |
3cf2715d DE |
2354 | break; |
2355 | ||
2356 | case CODE_LABEL: | |
1dd8faa8 R |
2357 | /* The target port might emit labels in the output function for |
2358 | some insn, e.g. sh.c output_branchy_insn. */ | |
de7987a6 R |
2359 | if (CODE_LABEL_NUMBER (insn) <= max_labelno) |
2360 | { | |
2361 | int align = LABEL_TO_ALIGNMENT (insn); | |
50b2596f | 2362 | #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN |
9e423e6d | 2363 | int max_skip = LABEL_TO_MAX_SKIP (insn); |
50b2596f | 2364 | #endif |
fc470718 | 2365 | |
1dd8faa8 | 2366 | if (align && NEXT_INSN (insn)) |
40cdfca6 | 2367 | { |
9e423e6d | 2368 | #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN |
40cdfca6 | 2369 | ASM_OUTPUT_MAX_SKIP_ALIGN (file, align, max_skip); |
8e16ab99 SF |
2370 | #else |
2371 | #ifdef ASM_OUTPUT_ALIGN_WITH_NOP | |
2372 | ASM_OUTPUT_ALIGN_WITH_NOP (file, align); | |
9e423e6d | 2373 | #else |
40cdfca6 | 2374 | ASM_OUTPUT_ALIGN (file, align); |
8e16ab99 | 2375 | #endif |
9e423e6d | 2376 | #endif |
40cdfca6 | 2377 | } |
de7987a6 | 2378 | } |
3cf2715d | 2379 | CC_STATUS_INIT; |
03ffa171 | 2380 | |
725730f2 EB |
2381 | if (!DECL_IGNORED_P (current_function_decl) && LABEL_NAME (insn)) |
2382 | debug_hooks->label (insn); | |
e1772ac0 | 2383 | |
bad4f40b | 2384 | app_disable (); |
b2a6a2fb JJ |
2385 | |
2386 | next = next_nonnote_insn (insn); | |
0676c393 MM |
2387 | /* If this label is followed by a jump-table, make sure we put |
2388 | the label in the read-only section. Also possibly write the | |
2389 | label and jump table together. */ | |
2390 | if (next != 0 && JUMP_TABLE_DATA_P (next)) | |
3cf2715d | 2391 | { |
e0d80184 | 2392 | #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC) |
0676c393 MM |
2393 | /* In this case, the case vector is being moved by the |
2394 | target, so don't output the label at all. Leave that | |
2395 | to the back end macros. */ | |
e0d80184 | 2396 | #else |
0676c393 MM |
2397 | if (! JUMP_TABLES_IN_TEXT_SECTION) |
2398 | { | |
2399 | int log_align; | |
340f7e7c | 2400 | |
0676c393 MM |
2401 | switch_to_section (targetm.asm_out.function_rodata_section |
2402 | (current_function_decl)); | |
340f7e7c RH |
2403 | |
2404 | #ifdef ADDR_VEC_ALIGN | |
0676c393 | 2405 | log_align = ADDR_VEC_ALIGN (next); |
340f7e7c | 2406 | #else |
0676c393 | 2407 | log_align = exact_log2 (BIGGEST_ALIGNMENT / BITS_PER_UNIT); |
340f7e7c | 2408 | #endif |
0676c393 MM |
2409 | ASM_OUTPUT_ALIGN (file, log_align); |
2410 | } | |
2411 | else | |
2412 | switch_to_section (current_function_section ()); | |
75197b37 | 2413 | |
3cf2715d | 2414 | #ifdef ASM_OUTPUT_CASE_LABEL |
0676c393 MM |
2415 | ASM_OUTPUT_CASE_LABEL (file, "L", CODE_LABEL_NUMBER (insn), |
2416 | next); | |
3cf2715d | 2417 | #else |
0676c393 | 2418 | targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn)); |
e0d80184 | 2419 | #endif |
3cf2715d | 2420 | #endif |
0676c393 | 2421 | break; |
3cf2715d | 2422 | } |
0dc36574 ZW |
2423 | if (LABEL_ALT_ENTRY_P (insn)) |
2424 | output_alternate_entry_point (file, insn); | |
8cd0faaf | 2425 | else |
5fd9b178 | 2426 | targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn)); |
3cf2715d DE |
2427 | break; |
2428 | ||
2429 | default: | |
2430 | { | |
b3694847 | 2431 | rtx body = PATTERN (insn); |
3cf2715d | 2432 | int insn_code_number; |
48c54229 | 2433 | const char *templ; |
ed5ef2e4 | 2434 | bool is_stmt; |
3cf2715d | 2435 | |
9a1a4737 PB |
2436 | /* Reset this early so it is correct for ASM statements. */ |
2437 | current_insn_predicate = NULL_RTX; | |
2929029c | 2438 | |
3cf2715d DE |
2439 | /* An INSN, JUMP_INSN or CALL_INSN. |
2440 | First check for special kinds that recog doesn't recognize. */ | |
2441 | ||
6614fd40 | 2442 | if (GET_CODE (body) == USE /* These are just declarations. */ |
3cf2715d DE |
2443 | || GET_CODE (body) == CLOBBER) |
2444 | break; | |
2445 | ||
2446 | #ifdef HAVE_cc0 | |
4928181c SB |
2447 | { |
2448 | /* If there is a REG_CC_SETTER note on this insn, it means that | |
2449 | the setting of the condition code was done in the delay slot | |
2450 | of the insn that branched here. So recover the cc status | |
2451 | from the insn that set it. */ | |
3cf2715d | 2452 | |
4928181c SB |
2453 | rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX); |
2454 | if (note) | |
2455 | { | |
2456 | NOTICE_UPDATE_CC (PATTERN (XEXP (note, 0)), XEXP (note, 0)); | |
2457 | cc_prev_status = cc_status; | |
2458 | } | |
2459 | } | |
3cf2715d DE |
2460 | #endif |
2461 | ||
2462 | /* Detect insns that are really jump-tables | |
2463 | and output them as such. */ | |
2464 | ||
34f0d87a | 2465 | if (JUMP_TABLE_DATA_P (insn)) |
3cf2715d | 2466 | { |
7f7f8214 | 2467 | #if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)) |
b3694847 | 2468 | int vlen, idx; |
7f7f8214 | 2469 | #endif |
3cf2715d | 2470 | |
b2a6a2fb | 2471 | if (! JUMP_TABLES_IN_TEXT_SECTION) |
d6b5193b RS |
2472 | switch_to_section (targetm.asm_out.function_rodata_section |
2473 | (current_function_decl)); | |
b2a6a2fb | 2474 | else |
d6b5193b | 2475 | switch_to_section (current_function_section ()); |
b2a6a2fb | 2476 | |
bad4f40b | 2477 | app_disable (); |
3cf2715d | 2478 | |
e0d80184 DM |
2479 | #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC) |
2480 | if (GET_CODE (body) == ADDR_VEC) | |
2481 | { | |
2482 | #ifdef ASM_OUTPUT_ADDR_VEC | |
2483 | ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn), body); | |
2484 | #else | |
0bccc606 | 2485 | gcc_unreachable (); |
e0d80184 DM |
2486 | #endif |
2487 | } | |
2488 | else | |
2489 | { | |
2490 | #ifdef ASM_OUTPUT_ADDR_DIFF_VEC | |
2491 | ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn), body); | |
2492 | #else | |
0bccc606 | 2493 | gcc_unreachable (); |
e0d80184 DM |
2494 | #endif |
2495 | } | |
2496 | #else | |
3cf2715d DE |
2497 | vlen = XVECLEN (body, GET_CODE (body) == ADDR_DIFF_VEC); |
2498 | for (idx = 0; idx < vlen; idx++) | |
2499 | { | |
2500 | if (GET_CODE (body) == ADDR_VEC) | |
2501 | { | |
2502 | #ifdef ASM_OUTPUT_ADDR_VEC_ELT | |
2503 | ASM_OUTPUT_ADDR_VEC_ELT | |
2504 | (file, CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 0, idx), 0))); | |
2505 | #else | |
0bccc606 | 2506 | gcc_unreachable (); |
3cf2715d DE |
2507 | #endif |
2508 | } | |
2509 | else | |
2510 | { | |
2511 | #ifdef ASM_OUTPUT_ADDR_DIFF_ELT | |
2512 | ASM_OUTPUT_ADDR_DIFF_ELT | |
2513 | (file, | |
33f7f353 | 2514 | body, |
3cf2715d DE |
2515 | CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 1, idx), 0)), |
2516 | CODE_LABEL_NUMBER (XEXP (XEXP (body, 0), 0))); | |
2517 | #else | |
0bccc606 | 2518 | gcc_unreachable (); |
3cf2715d DE |
2519 | #endif |
2520 | } | |
2521 | } | |
2522 | #ifdef ASM_OUTPUT_CASE_END | |
2523 | ASM_OUTPUT_CASE_END (file, | |
2524 | CODE_LABEL_NUMBER (PREV_INSN (insn)), | |
2525 | insn); | |
e0d80184 | 2526 | #endif |
3cf2715d DE |
2527 | #endif |
2528 | ||
d6b5193b | 2529 | switch_to_section (current_function_section ()); |
3cf2715d DE |
2530 | |
2531 | break; | |
2532 | } | |
0435312e JH |
2533 | /* Output this line note if it is the first or the last line |
2534 | note in a row. */ | |
725730f2 EB |
2535 | if (!DECL_IGNORED_P (current_function_decl) |
2536 | && notice_source_line (insn, &is_stmt)) | |
2537 | (*debug_hooks->source_line) (last_linenum, last_filename, | |
2538 | last_discriminator, is_stmt); | |
3cf2715d | 2539 | |
3cf2715d DE |
2540 | if (GET_CODE (body) == ASM_INPUT) |
2541 | { | |
36d7136e RH |
2542 | const char *string = XSTR (body, 0); |
2543 | ||
3cf2715d DE |
2544 | /* There's no telling what that did to the condition codes. */ |
2545 | CC_STATUS_INIT; | |
36d7136e RH |
2546 | |
2547 | if (string[0]) | |
3cf2715d | 2548 | { |
5ffeb913 | 2549 | expanded_location loc; |
bff4b63d | 2550 | |
3a694d86 | 2551 | app_enable (); |
5ffeb913 | 2552 | loc = expand_location (ASM_INPUT_SOURCE_LOCATION (body)); |
0de2ae02 | 2553 | if (*loc.file && loc.line) |
bff4b63d AO |
2554 | fprintf (asm_out_file, "%s %i \"%s\" 1\n", |
2555 | ASM_COMMENT_START, loc.line, loc.file); | |
36d7136e | 2556 | fprintf (asm_out_file, "\t%s\n", string); |
03943c05 AO |
2557 | #if HAVE_AS_LINE_ZERO |
2558 | if (*loc.file && loc.line) | |
bff4b63d | 2559 | fprintf (asm_out_file, "%s 0 \"\" 2\n", ASM_COMMENT_START); |
03943c05 | 2560 | #endif |
3cf2715d | 2561 | } |
3cf2715d DE |
2562 | break; |
2563 | } | |
2564 | ||
2565 | /* Detect `asm' construct with operands. */ | |
2566 | if (asm_noperands (body) >= 0) | |
2567 | { | |
22bf4422 | 2568 | unsigned int noperands = asm_noperands (body); |
1b4572a8 | 2569 | rtx *ops = XALLOCAVEC (rtx, noperands); |
3cce094d | 2570 | const char *string; |
bff4b63d | 2571 | location_t loc; |
5ffeb913 | 2572 | expanded_location expanded; |
3cf2715d DE |
2573 | |
2574 | /* There's no telling what that did to the condition codes. */ | |
2575 | CC_STATUS_INIT; | |
3cf2715d | 2576 | |
3cf2715d | 2577 | /* Get out the operand values. */ |
bff4b63d | 2578 | string = decode_asm_operands (body, ops, NULL, NULL, NULL, &loc); |
41129be2 | 2579 | /* Inhibit dying on what would otherwise be compiler bugs. */ |
3cf2715d DE |
2580 | insn_noperands = noperands; |
2581 | this_is_asm_operands = insn; | |
5ffeb913 | 2582 | expanded = expand_location (loc); |
3cf2715d | 2583 | |
ad7e39ca AO |
2584 | #ifdef FINAL_PRESCAN_INSN |
2585 | FINAL_PRESCAN_INSN (insn, ops, insn_noperands); | |
2586 | #endif | |
2587 | ||
3cf2715d | 2588 | /* Output the insn using them. */ |
36d7136e RH |
2589 | if (string[0]) |
2590 | { | |
3a694d86 | 2591 | app_enable (); |
5ffeb913 | 2592 | if (expanded.file && expanded.line) |
bff4b63d | 2593 | fprintf (asm_out_file, "%s %i \"%s\" 1\n", |
5ffeb913 | 2594 | ASM_COMMENT_START, expanded.line, expanded.file); |
36d7136e | 2595 | output_asm_insn (string, ops); |
03943c05 | 2596 | #if HAVE_AS_LINE_ZERO |
5ffeb913 | 2597 | if (expanded.file && expanded.line) |
bff4b63d | 2598 | fprintf (asm_out_file, "%s 0 \"\" 2\n", ASM_COMMENT_START); |
03943c05 | 2599 | #endif |
36d7136e RH |
2600 | } |
2601 | ||
1afc5373 CF |
2602 | if (targetm.asm_out.final_postscan_insn) |
2603 | targetm.asm_out.final_postscan_insn (file, insn, ops, | |
2604 | insn_noperands); | |
2605 | ||
3cf2715d DE |
2606 | this_is_asm_operands = 0; |
2607 | break; | |
2608 | } | |
2609 | ||
bad4f40b | 2610 | app_disable (); |
3cf2715d DE |
2611 | |
2612 | if (GET_CODE (body) == SEQUENCE) | |
2613 | { | |
2614 | /* A delayed-branch sequence */ | |
b3694847 | 2615 | int i; |
3cf2715d | 2616 | |
3cf2715d DE |
2617 | final_sequence = body; |
2618 | ||
2619 | /* The first insn in this SEQUENCE might be a JUMP_INSN that will | |
2620 | force the restoration of a comparison that was previously | |
2621 | thought unnecessary. If that happens, cancel this sequence | |
2622 | and cause that insn to be restored. */ | |
2623 | ||
c9d691e9 | 2624 | next = final_scan_insn (XVECEXP (body, 0, 0), file, 0, 1, seen); |
3cf2715d DE |
2625 | if (next != XVECEXP (body, 0, 1)) |
2626 | { | |
2627 | final_sequence = 0; | |
2628 | return next; | |
2629 | } | |
2630 | ||
2631 | for (i = 1; i < XVECLEN (body, 0); i++) | |
c7eee2df RK |
2632 | { |
2633 | rtx insn = XVECEXP (body, 0, i); | |
2634 | rtx next = NEXT_INSN (insn); | |
2635 | /* We loop in case any instruction in a delay slot gets | |
2636 | split. */ | |
2637 | do | |
c9d691e9 | 2638 | insn = final_scan_insn (insn, file, 0, 1, seen); |
c7eee2df RK |
2639 | while (insn != next); |
2640 | } | |
3cf2715d DE |
2641 | #ifdef DBR_OUTPUT_SEQEND |
2642 | DBR_OUTPUT_SEQEND (file); | |
2643 | #endif | |
2644 | final_sequence = 0; | |
2645 | ||
2646 | /* If the insn requiring the delay slot was a CALL_INSN, the | |
2647 | insns in the delay slot are actually executed before the | |
2648 | called function. Hence we don't preserve any CC-setting | |
2649 | actions in these insns and the CC must be marked as being | |
2650 | clobbered by the function. */ | |
4b4bf941 | 2651 | if (CALL_P (XVECEXP (body, 0, 0))) |
b729186a JL |
2652 | { |
2653 | CC_STATUS_INIT; | |
2654 | } | |
3cf2715d DE |
2655 | break; |
2656 | } | |
2657 | ||
2658 | /* We have a real machine instruction as rtl. */ | |
2659 | ||
2660 | body = PATTERN (insn); | |
2661 | ||
2662 | #ifdef HAVE_cc0 | |
f5d927c0 | 2663 | set = single_set (insn); |
b88c92cc | 2664 | |
3cf2715d DE |
2665 | /* Check for redundant test and compare instructions |
2666 | (when the condition codes are already set up as desired). | |
2667 | This is done only when optimizing; if not optimizing, | |
2668 | it should be possible for the user to alter a variable | |
2669 | with the debugger in between statements | |
2670 | and the next statement should reexamine the variable | |
2671 | to compute the condition codes. */ | |
2672 | ||
46625112 | 2673 | if (optimize_p) |
3cf2715d | 2674 | { |
30f5e9f5 RK |
2675 | if (set |
2676 | && GET_CODE (SET_DEST (set)) == CC0 | |
2677 | && insn != last_ignored_compare) | |
3cf2715d | 2678 | { |
f90b7a5a | 2679 | rtx src1, src2; |
30f5e9f5 | 2680 | if (GET_CODE (SET_SRC (set)) == SUBREG) |
55a2c322 | 2681 | SET_SRC (set) = alter_subreg (&SET_SRC (set), true); |
f90b7a5a PB |
2682 | |
2683 | src1 = SET_SRC (set); | |
2684 | src2 = NULL_RTX; | |
2685 | if (GET_CODE (SET_SRC (set)) == COMPARE) | |
30f5e9f5 RK |
2686 | { |
2687 | if (GET_CODE (XEXP (SET_SRC (set), 0)) == SUBREG) | |
2688 | XEXP (SET_SRC (set), 0) | |
55a2c322 | 2689 | = alter_subreg (&XEXP (SET_SRC (set), 0), true); |
30f5e9f5 RK |
2690 | if (GET_CODE (XEXP (SET_SRC (set), 1)) == SUBREG) |
2691 | XEXP (SET_SRC (set), 1) | |
55a2c322 | 2692 | = alter_subreg (&XEXP (SET_SRC (set), 1), true); |
f90b7a5a PB |
2693 | if (XEXP (SET_SRC (set), 1) |
2694 | == CONST0_RTX (GET_MODE (XEXP (SET_SRC (set), 0)))) | |
2695 | src2 = XEXP (SET_SRC (set), 0); | |
30f5e9f5 RK |
2696 | } |
2697 | if ((cc_status.value1 != 0 | |
f90b7a5a | 2698 | && rtx_equal_p (src1, cc_status.value1)) |
30f5e9f5 | 2699 | || (cc_status.value2 != 0 |
f90b7a5a PB |
2700 | && rtx_equal_p (src1, cc_status.value2)) |
2701 | || (src2 != 0 && cc_status.value1 != 0 | |
2702 | && rtx_equal_p (src2, cc_status.value1)) | |
2703 | || (src2 != 0 && cc_status.value2 != 0 | |
2704 | && rtx_equal_p (src2, cc_status.value2))) | |
3cf2715d | 2705 | { |
30f5e9f5 | 2706 | /* Don't delete insn if it has an addressing side-effect. */ |
ff81832f | 2707 | if (! FIND_REG_INC_NOTE (insn, NULL_RTX) |
30f5e9f5 RK |
2708 | /* or if anything in it is volatile. */ |
2709 | && ! volatile_refs_p (PATTERN (insn))) | |
2710 | { | |
2711 | /* We don't really delete the insn; just ignore it. */ | |
2712 | last_ignored_compare = insn; | |
2713 | break; | |
2714 | } | |
3cf2715d DE |
2715 | } |
2716 | } | |
2717 | } | |
3cf2715d | 2718 | |
3cf2715d DE |
2719 | /* If this is a conditional branch, maybe modify it |
2720 | if the cc's are in a nonstandard state | |
2721 | so that it accomplishes the same thing that it would | |
2722 | do straightforwardly if the cc's were set up normally. */ | |
2723 | ||
2724 | if (cc_status.flags != 0 | |
4b4bf941 | 2725 | && JUMP_P (insn) |
3cf2715d DE |
2726 | && GET_CODE (body) == SET |
2727 | && SET_DEST (body) == pc_rtx | |
2728 | && GET_CODE (SET_SRC (body)) == IF_THEN_ELSE | |
ec8e098d | 2729 | && COMPARISON_P (XEXP (SET_SRC (body), 0)) |
c9d691e9 | 2730 | && XEXP (XEXP (SET_SRC (body), 0), 0) == cc0_rtx) |
3cf2715d DE |
2731 | { |
2732 | /* This function may alter the contents of its argument | |
2733 | and clear some of the cc_status.flags bits. | |
2734 | It may also return 1 meaning condition now always true | |
2735 | or -1 meaning condition now always false | |
2736 | or 2 meaning condition nontrivial but altered. */ | |
b3694847 | 2737 | int result = alter_cond (XEXP (SET_SRC (body), 0)); |
3cf2715d DE |
2738 | /* If condition now has fixed value, replace the IF_THEN_ELSE |
2739 | with its then-operand or its else-operand. */ | |
2740 | if (result == 1) | |
2741 | SET_SRC (body) = XEXP (SET_SRC (body), 1); | |
2742 | if (result == -1) | |
2743 | SET_SRC (body) = XEXP (SET_SRC (body), 2); | |
2744 | ||
2745 | /* The jump is now either unconditional or a no-op. | |
2746 | If it has become a no-op, don't try to output it. | |
2747 | (It would not be recognized.) */ | |
2748 | if (SET_SRC (body) == pc_rtx) | |
2749 | { | |
ca6c03ca | 2750 | delete_insn (insn); |
3cf2715d DE |
2751 | break; |
2752 | } | |
26898771 | 2753 | else if (ANY_RETURN_P (SET_SRC (body))) |
3cf2715d DE |
2754 | /* Replace (set (pc) (return)) with (return). */ |
2755 | PATTERN (insn) = body = SET_SRC (body); | |
2756 | ||
2757 | /* Rerecognize the instruction if it has changed. */ | |
2758 | if (result != 0) | |
2759 | INSN_CODE (insn) = -1; | |
2760 | } | |
2761 | ||
604e4ce3 | 2762 | /* If this is a conditional trap, maybe modify it if the cc's |
604e4ce3 KH |
2763 | are in a nonstandard state so that it accomplishes the same |
2764 | thing that it would do straightforwardly if the cc's were | |
2765 | set up normally. */ | |
2766 | if (cc_status.flags != 0 | |
2767 | && NONJUMP_INSN_P (insn) | |
2768 | && GET_CODE (body) == TRAP_IF | |
2769 | && COMPARISON_P (TRAP_CONDITION (body)) | |
2770 | && XEXP (TRAP_CONDITION (body), 0) == cc0_rtx) | |
2771 | { | |
2772 | /* This function may alter the contents of its argument | |
2773 | and clear some of the cc_status.flags bits. | |
2774 | It may also return 1 meaning condition now always true | |
2775 | or -1 meaning condition now always false | |
2776 | or 2 meaning condition nontrivial but altered. */ | |
2777 | int result = alter_cond (TRAP_CONDITION (body)); | |
2778 | ||
2779 | /* If TRAP_CONDITION has become always false, delete the | |
2780 | instruction. */ | |
2781 | if (result == -1) | |
2782 | { | |
2783 | delete_insn (insn); | |
2784 | break; | |
2785 | } | |
2786 | ||
2787 | /* If TRAP_CONDITION has become always true, replace | |
2788 | TRAP_CONDITION with const_true_rtx. */ | |
2789 | if (result == 1) | |
2790 | TRAP_CONDITION (body) = const_true_rtx; | |
2791 | ||
2792 | /* Rerecognize the instruction if it has changed. */ | |
2793 | if (result != 0) | |
2794 | INSN_CODE (insn) = -1; | |
2795 | } | |
2796 | ||
3cf2715d | 2797 | /* Make same adjustments to instructions that examine the |
462da2af SC |
2798 | condition codes without jumping and instructions that |
2799 | handle conditional moves (if this machine has either one). */ | |
3cf2715d DE |
2800 | |
2801 | if (cc_status.flags != 0 | |
b88c92cc | 2802 | && set != 0) |
3cf2715d | 2803 | { |
462da2af | 2804 | rtx cond_rtx, then_rtx, else_rtx; |
f5d927c0 | 2805 | |
4b4bf941 | 2806 | if (!JUMP_P (insn) |
b88c92cc | 2807 | && GET_CODE (SET_SRC (set)) == IF_THEN_ELSE) |
462da2af | 2808 | { |
b88c92cc RK |
2809 | cond_rtx = XEXP (SET_SRC (set), 0); |
2810 | then_rtx = XEXP (SET_SRC (set), 1); | |
2811 | else_rtx = XEXP (SET_SRC (set), 2); | |
462da2af SC |
2812 | } |
2813 | else | |
2814 | { | |
b88c92cc | 2815 | cond_rtx = SET_SRC (set); |
462da2af SC |
2816 | then_rtx = const_true_rtx; |
2817 | else_rtx = const0_rtx; | |
2818 | } | |
f5d927c0 | 2819 | |
511d31d8 AS |
2820 | if (COMPARISON_P (cond_rtx) |
2821 | && XEXP (cond_rtx, 0) == cc0_rtx) | |
3cf2715d | 2822 | { |
511d31d8 AS |
2823 | int result; |
2824 | result = alter_cond (cond_rtx); | |
2825 | if (result == 1) | |
2826 | validate_change (insn, &SET_SRC (set), then_rtx, 0); | |
2827 | else if (result == -1) | |
2828 | validate_change (insn, &SET_SRC (set), else_rtx, 0); | |
2829 | else if (result == 2) | |
2830 | INSN_CODE (insn) = -1; | |
2831 | if (SET_DEST (set) == SET_SRC (set)) | |
2832 | delete_insn (insn); | |
3cf2715d DE |
2833 | } |
2834 | } | |
462da2af | 2835 | |
3cf2715d DE |
2836 | #endif |
2837 | ||
ede7cd44 | 2838 | #ifdef HAVE_peephole |
3cf2715d DE |
2839 | /* Do machine-specific peephole optimizations if desired. */ |
2840 | ||
46625112 | 2841 | if (optimize_p && !flag_no_peephole && !nopeepholes) |
3cf2715d DE |
2842 | { |
2843 | rtx next = peephole (insn); | |
2844 | /* When peepholing, if there were notes within the peephole, | |
2845 | emit them before the peephole. */ | |
2846 | if (next != 0 && next != NEXT_INSN (insn)) | |
2847 | { | |
a2785739 | 2848 | rtx note, prev = PREV_INSN (insn); |
3cf2715d DE |
2849 | |
2850 | for (note = NEXT_INSN (insn); note != next; | |
2851 | note = NEXT_INSN (note)) | |
46625112 | 2852 | final_scan_insn (note, file, optimize_p, nopeepholes, seen); |
a2785739 ILT |
2853 | |
2854 | /* Put the notes in the proper position for a later | |
2855 | rescan. For example, the SH target can do this | |
2856 | when generating a far jump in a delayed branch | |
2857 | sequence. */ | |
2858 | note = NEXT_INSN (insn); | |
2859 | PREV_INSN (note) = prev; | |
2860 | NEXT_INSN (prev) = note; | |
2861 | NEXT_INSN (PREV_INSN (next)) = insn; | |
2862 | PREV_INSN (insn) = PREV_INSN (next); | |
2863 | NEXT_INSN (insn) = next; | |
2864 | PREV_INSN (next) = insn; | |
3cf2715d DE |
2865 | } |
2866 | ||
2867 | /* PEEPHOLE might have changed this. */ | |
2868 | body = PATTERN (insn); | |
2869 | } | |
ede7cd44 | 2870 | #endif |
3cf2715d DE |
2871 | |
2872 | /* Try to recognize the instruction. | |
2873 | If successful, verify that the operands satisfy the | |
2874 | constraints for the instruction. Crash if they don't, | |
2875 | since `reload' should have changed them so that they do. */ | |
2876 | ||
2877 | insn_code_number = recog_memoized (insn); | |
0304f787 | 2878 | cleanup_subreg_operands (insn); |
3cf2715d | 2879 | |
8c503f0d SB |
2880 | /* Dump the insn in the assembly for debugging (-dAP). |
2881 | If the final dump is requested as slim RTL, dump slim | |
2882 | RTL to the assembly file also. */ | |
dd3f0101 KH |
2883 | if (flag_dump_rtl_in_asm) |
2884 | { | |
2885 | print_rtx_head = ASM_COMMENT_START; | |
8c503f0d SB |
2886 | if (! (dump_flags & TDF_SLIM)) |
2887 | print_rtl_single (asm_out_file, insn); | |
2888 | else | |
2889 | dump_insn_slim (asm_out_file, insn); | |
dd3f0101 KH |
2890 | print_rtx_head = ""; |
2891 | } | |
b9f22704 | 2892 | |
6c698a6d | 2893 | if (! constrain_operands_cached (1)) |
3cf2715d | 2894 | fatal_insn_not_found (insn); |
3cf2715d DE |
2895 | |
2896 | /* Some target machines need to prescan each insn before | |
2897 | it is output. */ | |
2898 | ||
2899 | #ifdef FINAL_PRESCAN_INSN | |
1ccbefce | 2900 | FINAL_PRESCAN_INSN (insn, recog_data.operand, recog_data.n_operands); |
3cf2715d DE |
2901 | #endif |
2902 | ||
2929029c WG |
2903 | if (targetm.have_conditional_execution () |
2904 | && GET_CODE (PATTERN (insn)) == COND_EXEC) | |
afe48e06 | 2905 | current_insn_predicate = COND_EXEC_TEST (PATTERN (insn)); |
afe48e06 | 2906 | |
3cf2715d DE |
2907 | #ifdef HAVE_cc0 |
2908 | cc_prev_status = cc_status; | |
2909 | ||
2910 | /* Update `cc_status' for this instruction. | |
2911 | The instruction's output routine may change it further. | |
2912 | If the output routine for a jump insn needs to depend | |
2913 | on the cc status, it should look at cc_prev_status. */ | |
2914 | ||
2915 | NOTICE_UPDATE_CC (body, insn); | |
2916 | #endif | |
2917 | ||
b1a9f6a0 | 2918 | current_output_insn = debug_insn = insn; |
3cf2715d | 2919 | |
4bbf910e | 2920 | /* Find the proper template for this insn. */ |
48c54229 | 2921 | templ = get_insn_template (insn_code_number, insn); |
3cf2715d | 2922 | |
4bbf910e RH |
2923 | /* If the C code returns 0, it means that it is a jump insn |
2924 | which follows a deleted test insn, and that test insn | |
2925 | needs to be reinserted. */ | |
48c54229 | 2926 | if (templ == 0) |
3cf2715d | 2927 | { |
efd0378b HPN |
2928 | rtx prev; |
2929 | ||
0bccc606 | 2930 | gcc_assert (prev_nonnote_insn (insn) == last_ignored_compare); |
efd0378b HPN |
2931 | |
2932 | /* We have already processed the notes between the setter and | |
2933 | the user. Make sure we don't process them again, this is | |
2934 | particularly important if one of the notes is a block | |
2935 | scope note or an EH note. */ | |
2936 | for (prev = insn; | |
2937 | prev != last_ignored_compare; | |
2938 | prev = PREV_INSN (prev)) | |
2939 | { | |
4b4bf941 | 2940 | if (NOTE_P (prev)) |
ca6c03ca | 2941 | delete_insn (prev); /* Use delete_note. */ |
efd0378b HPN |
2942 | } |
2943 | ||
2944 | return prev; | |
3cf2715d DE |
2945 | } |
2946 | ||
2947 | /* If the template is the string "#", it means that this insn must | |
2948 | be split. */ | |
48c54229 | 2949 | if (templ[0] == '#' && templ[1] == '\0') |
3cf2715d | 2950 | { |
48c54229 | 2951 | rtx new_rtx = try_split (body, insn, 0); |
3cf2715d DE |
2952 | |
2953 | /* If we didn't split the insn, go away. */ | |
48c54229 | 2954 | if (new_rtx == insn && PATTERN (new_rtx) == body) |
c725bd79 | 2955 | fatal_insn ("could not split insn", insn); |
f5d927c0 | 2956 | |
d327457f JR |
2957 | /* If we have a length attribute, this instruction should have |
2958 | been split in shorten_branches, to ensure that we would have | |
2959 | valid length info for the splitees. */ | |
2960 | gcc_assert (!HAVE_ATTR_length); | |
3d14e82f | 2961 | |
48c54229 | 2962 | return new_rtx; |
3cf2715d | 2963 | } |
f5d927c0 | 2964 | |
951120ea PB |
2965 | /* ??? This will put the directives in the wrong place if |
2966 | get_insn_template outputs assembly directly. However calling it | |
2967 | before get_insn_template breaks if the insns is split. */ | |
3bc6b3e6 RH |
2968 | if (targetm.asm_out.unwind_emit_before_insn |
2969 | && targetm.asm_out.unwind_emit) | |
2784ed9c | 2970 | targetm.asm_out.unwind_emit (asm_out_file, insn); |
3cf2715d | 2971 | |
f410e1b3 RAE |
2972 | if (CALL_P (insn)) |
2973 | { | |
2974 | rtx x = call_from_call_insn (insn); | |
2975 | x = XEXP (x, 0); | |
2976 | if (x && MEM_P (x) && GET_CODE (XEXP (x, 0)) == SYMBOL_REF) | |
2977 | { | |
2978 | tree t; | |
2979 | x = XEXP (x, 0); | |
2980 | t = SYMBOL_REF_DECL (x); | |
2981 | if (t) | |
2982 | assemble_external (t); | |
2983 | } | |
2b1c5433 JJ |
2984 | if (!DECL_IGNORED_P (current_function_decl)) |
2985 | debug_hooks->var_location (insn); | |
f410e1b3 RAE |
2986 | } |
2987 | ||
951120ea | 2988 | /* Output assembler code from the template. */ |
48c54229 | 2989 | output_asm_insn (templ, recog_data.operand); |
3cf2715d | 2990 | |
1afc5373 CF |
2991 | /* Some target machines need to postscan each insn after |
2992 | it is output. */ | |
2993 | if (targetm.asm_out.final_postscan_insn) | |
2994 | targetm.asm_out.final_postscan_insn (file, insn, recog_data.operand, | |
2995 | recog_data.n_operands); | |
2996 | ||
3bc6b3e6 RH |
2997 | if (!targetm.asm_out.unwind_emit_before_insn |
2998 | && targetm.asm_out.unwind_emit) | |
2999 | targetm.asm_out.unwind_emit (asm_out_file, insn); | |
3000 | ||
b1a9f6a0 | 3001 | current_output_insn = debug_insn = 0; |
3cf2715d DE |
3002 | } |
3003 | } | |
3004 | return NEXT_INSN (insn); | |
3005 | } | |
3006 | \f | |
ed5ef2e4 CC |
3007 | /* Return whether a source line note needs to be emitted before INSN. |
3008 | Sets IS_STMT to TRUE if the line should be marked as a possible | |
3009 | breakpoint location. */ | |
3cf2715d | 3010 | |
0435312e | 3011 | static bool |
ed5ef2e4 | 3012 | notice_source_line (rtx insn, bool *is_stmt) |
3cf2715d | 3013 | { |
d752cfdb JJ |
3014 | const char *filename; |
3015 | int linenum; | |
3016 | ||
3017 | if (override_filename) | |
3018 | { | |
3019 | filename = override_filename; | |
3020 | linenum = override_linenum; | |
3021 | } | |
3022 | else | |
3023 | { | |
3024 | filename = insn_file (insn); | |
3025 | linenum = insn_line (insn); | |
3026 | } | |
3cf2715d | 3027 | |
ed5ef2e4 CC |
3028 | if (filename == NULL) |
3029 | return false; | |
3030 | ||
3031 | if (force_source_line | |
3032 | || filename != last_filename | |
3033 | || last_linenum != linenum) | |
0435312e | 3034 | { |
b8176fe4 | 3035 | force_source_line = false; |
0435312e JH |
3036 | last_filename = filename; |
3037 | last_linenum = linenum; | |
6c52e687 | 3038 | last_discriminator = discriminator; |
ed5ef2e4 | 3039 | *is_stmt = true; |
0435312e JH |
3040 | high_block_linenum = MAX (last_linenum, high_block_linenum); |
3041 | high_function_linenum = MAX (last_linenum, high_function_linenum); | |
3042 | return true; | |
3043 | } | |
ed5ef2e4 CC |
3044 | |
3045 | if (SUPPORTS_DISCRIMINATOR && last_discriminator != discriminator) | |
3046 | { | |
3047 | /* If the discriminator changed, but the line number did not, | |
3048 | output the line table entry with is_stmt false so the | |
3049 | debugger does not treat this as a breakpoint location. */ | |
3050 | last_discriminator = discriminator; | |
3051 | *is_stmt = false; | |
3052 | return true; | |
3053 | } | |
3054 | ||
0435312e | 3055 | return false; |
3cf2715d DE |
3056 | } |
3057 | \f | |
0304f787 JL |
3058 | /* For each operand in INSN, simplify (subreg (reg)) so that it refers |
3059 | directly to the desired hard register. */ | |
f5d927c0 | 3060 | |
0304f787 | 3061 | void |
6cf9ac28 | 3062 | cleanup_subreg_operands (rtx insn) |
0304f787 | 3063 | { |
f62a15e3 | 3064 | int i; |
6fb5fa3c | 3065 | bool changed = false; |
6c698a6d | 3066 | extract_insn_cached (insn); |
1ccbefce | 3067 | for (i = 0; i < recog_data.n_operands; i++) |
0304f787 | 3068 | { |
2067c116 | 3069 | /* The following test cannot use recog_data.operand when testing |
9f4524f2 RE |
3070 | for a SUBREG: the underlying object might have been changed |
3071 | already if we are inside a match_operator expression that | |
3072 | matches the else clause. Instead we test the underlying | |
3073 | expression directly. */ | |
3074 | if (GET_CODE (*recog_data.operand_loc[i]) == SUBREG) | |
6fb5fa3c | 3075 | { |
55a2c322 | 3076 | recog_data.operand[i] = alter_subreg (recog_data.operand_loc[i], true); |
6fb5fa3c DB |
3077 | changed = true; |
3078 | } | |
1ccbefce | 3079 | else if (GET_CODE (recog_data.operand[i]) == PLUS |
04337620 | 3080 | || GET_CODE (recog_data.operand[i]) == MULT |
3c0cb5de | 3081 | || MEM_P (recog_data.operand[i])) |
6fb5fa3c | 3082 | recog_data.operand[i] = walk_alter_subreg (recog_data.operand_loc[i], &changed); |
0304f787 JL |
3083 | } |
3084 | ||
1ccbefce | 3085 | for (i = 0; i < recog_data.n_dups; i++) |
0304f787 | 3086 | { |
1ccbefce | 3087 | if (GET_CODE (*recog_data.dup_loc[i]) == SUBREG) |
6fb5fa3c | 3088 | { |
55a2c322 | 3089 | *recog_data.dup_loc[i] = alter_subreg (recog_data.dup_loc[i], true); |
6fb5fa3c DB |
3090 | changed = true; |
3091 | } | |
1ccbefce | 3092 | else if (GET_CODE (*recog_data.dup_loc[i]) == PLUS |
04337620 | 3093 | || GET_CODE (*recog_data.dup_loc[i]) == MULT |
3c0cb5de | 3094 | || MEM_P (*recog_data.dup_loc[i])) |
6fb5fa3c | 3095 | *recog_data.dup_loc[i] = walk_alter_subreg (recog_data.dup_loc[i], &changed); |
0304f787 | 3096 | } |
6fb5fa3c DB |
3097 | if (changed) |
3098 | df_insn_rescan (insn); | |
0304f787 JL |
3099 | } |
3100 | ||
55a2c322 VM |
3101 | /* If X is a SUBREG, try to replace it with a REG or a MEM, based on |
3102 | the thing it is a subreg of. Do it anyway if FINAL_P. */ | |
3cf2715d DE |
3103 | |
3104 | rtx | |
55a2c322 | 3105 | alter_subreg (rtx *xp, bool final_p) |
3cf2715d | 3106 | { |
49d801d3 | 3107 | rtx x = *xp; |
b3694847 | 3108 | rtx y = SUBREG_REG (x); |
f5963e61 | 3109 | |
49d801d3 JH |
3110 | /* simplify_subreg does not remove subreg from volatile references. |
3111 | We are required to. */ | |
3c0cb5de | 3112 | if (MEM_P (y)) |
fd326ba8 UW |
3113 | { |
3114 | int offset = SUBREG_BYTE (x); | |
3115 | ||
3116 | /* For paradoxical subregs on big-endian machines, SUBREG_BYTE | |
3117 | contains 0 instead of the proper offset. See simplify_subreg. */ | |
3118 | if (offset == 0 | |
3119 | && GET_MODE_SIZE (GET_MODE (y)) < GET_MODE_SIZE (GET_MODE (x))) | |
3120 | { | |
3121 | int difference = GET_MODE_SIZE (GET_MODE (y)) | |
3122 | - GET_MODE_SIZE (GET_MODE (x)); | |
3123 | if (WORDS_BIG_ENDIAN) | |
3124 | offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD; | |
3125 | if (BYTES_BIG_ENDIAN) | |
3126 | offset += difference % UNITS_PER_WORD; | |
3127 | } | |
3128 | ||
55a2c322 VM |
3129 | if (final_p) |
3130 | *xp = adjust_address (y, GET_MODE (x), offset); | |
3131 | else | |
3132 | *xp = adjust_address_nv (y, GET_MODE (x), offset); | |
fd326ba8 | 3133 | } |
49d801d3 | 3134 | else |
fea54805 | 3135 | { |
48c54229 | 3136 | rtx new_rtx = simplify_subreg (GET_MODE (x), y, GET_MODE (y), |
55a2c322 | 3137 | SUBREG_BYTE (x)); |
fea54805 | 3138 | |
48c54229 KG |
3139 | if (new_rtx != 0) |
3140 | *xp = new_rtx; | |
55a2c322 | 3141 | else if (final_p && REG_P (y)) |
fea54805 | 3142 | { |
0bccc606 | 3143 | /* Simplify_subreg can't handle some REG cases, but we have to. */ |
38ae7651 RS |
3144 | unsigned int regno; |
3145 | HOST_WIDE_INT offset; | |
3146 | ||
3147 | regno = subreg_regno (x); | |
3148 | if (subreg_lowpart_p (x)) | |
3149 | offset = byte_lowpart_offset (GET_MODE (x), GET_MODE (y)); | |
3150 | else | |
3151 | offset = SUBREG_BYTE (x); | |
3152 | *xp = gen_rtx_REG_offset (y, GET_MODE (x), regno, offset); | |
fea54805 | 3153 | } |
fea54805 RK |
3154 | } |
3155 | ||
49d801d3 | 3156 | return *xp; |
3cf2715d DE |
3157 | } |
3158 | ||
3159 | /* Do alter_subreg on all the SUBREGs contained in X. */ | |
3160 | ||
3161 | static rtx | |
6fb5fa3c | 3162 | walk_alter_subreg (rtx *xp, bool *changed) |
3cf2715d | 3163 | { |
49d801d3 | 3164 | rtx x = *xp; |
3cf2715d DE |
3165 | switch (GET_CODE (x)) |
3166 | { | |
3167 | case PLUS: | |
3168 | case MULT: | |
beed8fc0 | 3169 | case AND: |
6fb5fa3c DB |
3170 | XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0), changed); |
3171 | XEXP (x, 1) = walk_alter_subreg (&XEXP (x, 1), changed); | |
3cf2715d DE |
3172 | break; |
3173 | ||
3174 | case MEM: | |
beed8fc0 | 3175 | case ZERO_EXTEND: |
6fb5fa3c | 3176 | XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0), changed); |
3cf2715d DE |
3177 | break; |
3178 | ||
3179 | case SUBREG: | |
6fb5fa3c | 3180 | *changed = true; |
55a2c322 | 3181 | return alter_subreg (xp, true); |
f5d927c0 | 3182 | |
e9a25f70 JL |
3183 | default: |
3184 | break; | |
3cf2715d DE |
3185 | } |
3186 | ||
5bc72aeb | 3187 | return *xp; |
3cf2715d DE |
3188 | } |
3189 | \f | |
3190 | #ifdef HAVE_cc0 | |
3191 | ||
3192 | /* Given BODY, the body of a jump instruction, alter the jump condition | |
3193 | as required by the bits that are set in cc_status.flags. | |
3194 | Not all of the bits there can be handled at this level in all cases. | |
3195 | ||
3196 | The value is normally 0. | |
3197 | 1 means that the condition has become always true. | |
3198 | -1 means that the condition has become always false. | |
3199 | 2 means that COND has been altered. */ | |
3200 | ||
3201 | static int | |
6cf9ac28 | 3202 | alter_cond (rtx cond) |
3cf2715d DE |
3203 | { |
3204 | int value = 0; | |
3205 | ||
3206 | if (cc_status.flags & CC_REVERSED) | |
3207 | { | |
3208 | value = 2; | |
3209 | PUT_CODE (cond, swap_condition (GET_CODE (cond))); | |
3210 | } | |
3211 | ||
3212 | if (cc_status.flags & CC_INVERTED) | |
3213 | { | |
3214 | value = 2; | |
3215 | PUT_CODE (cond, reverse_condition (GET_CODE (cond))); | |
3216 | } | |
3217 | ||
3218 | if (cc_status.flags & CC_NOT_POSITIVE) | |
3219 | switch (GET_CODE (cond)) | |
3220 | { | |
3221 | case LE: | |
3222 | case LEU: | |
3223 | case GEU: | |
3224 | /* Jump becomes unconditional. */ | |
3225 | return 1; | |
3226 | ||
3227 | case GT: | |
3228 | case GTU: | |
3229 | case LTU: | |
3230 | /* Jump becomes no-op. */ | |
3231 | return -1; | |
3232 | ||
3233 | case GE: | |
3234 | PUT_CODE (cond, EQ); | |
3235 | value = 2; | |
3236 | break; | |
3237 | ||
3238 | case LT: | |
3239 | PUT_CODE (cond, NE); | |
3240 | value = 2; | |
3241 | break; | |
f5d927c0 | 3242 | |
e9a25f70 JL |
3243 | default: |
3244 | break; | |
3cf2715d DE |
3245 | } |
3246 | ||
3247 | if (cc_status.flags & CC_NOT_NEGATIVE) | |
3248 | switch (GET_CODE (cond)) | |
3249 | { | |
3250 | case GE: | |
3251 | case GEU: | |
3252 | /* Jump becomes unconditional. */ | |
3253 | return 1; | |
3254 | ||
3255 | case LT: | |
3256 | case LTU: | |
3257 | /* Jump becomes no-op. */ | |
3258 | return -1; | |
3259 | ||
3260 | case LE: | |
3261 | case LEU: | |
3262 | PUT_CODE (cond, EQ); | |
3263 | value = 2; | |
3264 | break; | |
3265 | ||
3266 | case GT: | |
3267 | case GTU: | |
3268 | PUT_CODE (cond, NE); | |
3269 | value = 2; | |
3270 | break; | |
f5d927c0 | 3271 | |
e9a25f70 JL |
3272 | default: |
3273 | break; | |
3cf2715d DE |
3274 | } |
3275 | ||
3276 | if (cc_status.flags & CC_NO_OVERFLOW) | |
3277 | switch (GET_CODE (cond)) | |
3278 | { | |
3279 | case GEU: | |
3280 | /* Jump becomes unconditional. */ | |
3281 | return 1; | |
3282 | ||
3283 | case LEU: | |
3284 | PUT_CODE (cond, EQ); | |
3285 | value = 2; | |
3286 | break; | |
3287 | ||
3288 | case GTU: | |
3289 | PUT_CODE (cond, NE); | |
3290 | value = 2; | |
3291 | break; | |
3292 | ||
3293 | case LTU: | |
3294 | /* Jump becomes no-op. */ | |
3295 | return -1; | |
f5d927c0 | 3296 | |
e9a25f70 JL |
3297 | default: |
3298 | break; | |
3cf2715d DE |
3299 | } |
3300 | ||
3301 | if (cc_status.flags & (CC_Z_IN_NOT_N | CC_Z_IN_N)) | |
3302 | switch (GET_CODE (cond)) | |
3303 | { | |
e9a25f70 | 3304 | default: |
0bccc606 | 3305 | gcc_unreachable (); |
3cf2715d DE |
3306 | |
3307 | case NE: | |
3308 | PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? GE : LT); | |
3309 | value = 2; | |
3310 | break; | |
3311 | ||
3312 | case EQ: | |
3313 | PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? LT : GE); | |
3314 | value = 2; | |
3315 | break; | |
3316 | } | |
3317 | ||
3318 | if (cc_status.flags & CC_NOT_SIGNED) | |
3319 | /* The flags are valid if signed condition operators are converted | |
3320 | to unsigned. */ | |
3321 | switch (GET_CODE (cond)) | |
3322 | { | |
3323 | case LE: | |
3324 | PUT_CODE (cond, LEU); | |
3325 | value = 2; | |
3326 | break; | |
3327 | ||
3328 | case LT: | |
3329 | PUT_CODE (cond, LTU); | |
3330 | value = 2; | |
3331 | break; | |
3332 | ||
3333 | case GT: | |
3334 | PUT_CODE (cond, GTU); | |
3335 | value = 2; | |
3336 | break; | |
3337 | ||
3338 | case GE: | |
3339 | PUT_CODE (cond, GEU); | |
3340 | value = 2; | |
3341 | break; | |
e9a25f70 JL |
3342 | |
3343 | default: | |
3344 | break; | |
3cf2715d DE |
3345 | } |
3346 | ||
3347 | return value; | |
3348 | } | |
3349 | #endif | |
3350 | \f | |
3351 | /* Report inconsistency between the assembler template and the operands. | |
3352 | In an `asm', it's the user's fault; otherwise, the compiler's fault. */ | |
3353 | ||
3354 | void | |
4b794eaf | 3355 | output_operand_lossage (const char *cmsgid, ...) |
3cf2715d | 3356 | { |
a52453cc PT |
3357 | char *fmt_string; |
3358 | char *new_message; | |
fd478a0a | 3359 | const char *pfx_str; |
e34d07f2 | 3360 | va_list ap; |
6cf9ac28 | 3361 | |
4b794eaf | 3362 | va_start (ap, cmsgid); |
a52453cc | 3363 | |
9e637a26 | 3364 | pfx_str = this_is_asm_operands ? _("invalid 'asm': ") : "output_operand: "; |
4b794eaf | 3365 | asprintf (&fmt_string, "%s%s", pfx_str, _(cmsgid)); |
a52453cc | 3366 | vasprintf (&new_message, fmt_string, ap); |
dd3f0101 | 3367 | |
3cf2715d | 3368 | if (this_is_asm_operands) |
a52453cc | 3369 | error_for_asm (this_is_asm_operands, "%s", new_message); |
3cf2715d | 3370 | else |
a52453cc PT |
3371 | internal_error ("%s", new_message); |
3372 | ||
3373 | free (fmt_string); | |
3374 | free (new_message); | |
e34d07f2 | 3375 | va_end (ap); |
3cf2715d DE |
3376 | } |
3377 | \f | |
3378 | /* Output of assembler code from a template, and its subroutines. */ | |
3379 | ||
0d4903b8 RK |
3380 | /* Annotate the assembly with a comment describing the pattern and |
3381 | alternative used. */ | |
3382 | ||
3383 | static void | |
6cf9ac28 | 3384 | output_asm_name (void) |
0d4903b8 RK |
3385 | { |
3386 | if (debug_insn) | |
3387 | { | |
3388 | int num = INSN_CODE (debug_insn); | |
3389 | fprintf (asm_out_file, "\t%s %d\t%s", | |
3390 | ASM_COMMENT_START, INSN_UID (debug_insn), | |
3391 | insn_data[num].name); | |
3392 | if (insn_data[num].n_alternatives > 1) | |
3393 | fprintf (asm_out_file, "/%d", which_alternative + 1); | |
d327457f JR |
3394 | |
3395 | if (HAVE_ATTR_length) | |
3396 | fprintf (asm_out_file, "\t[length = %d]", | |
3397 | get_attr_length (debug_insn)); | |
3398 | ||
0d4903b8 RK |
3399 | /* Clear this so only the first assembler insn |
3400 | of any rtl insn will get the special comment for -dp. */ | |
3401 | debug_insn = 0; | |
3402 | } | |
3403 | } | |
3404 | ||
998d7deb RH |
3405 | /* If OP is a REG or MEM and we can find a MEM_EXPR corresponding to it |
3406 | or its address, return that expr . Set *PADDRESSP to 1 if the expr | |
c5adc06a RK |
3407 | corresponds to the address of the object and 0 if to the object. */ |
3408 | ||
3409 | static tree | |
6cf9ac28 | 3410 | get_mem_expr_from_op (rtx op, int *paddressp) |
c5adc06a | 3411 | { |
998d7deb | 3412 | tree expr; |
c5adc06a RK |
3413 | int inner_addressp; |
3414 | ||
3415 | *paddressp = 0; | |
3416 | ||
f8cfc6aa | 3417 | if (REG_P (op)) |
a560d4d4 | 3418 | return REG_EXPR (op); |
3c0cb5de | 3419 | else if (!MEM_P (op)) |
c5adc06a RK |
3420 | return 0; |
3421 | ||
998d7deb RH |
3422 | if (MEM_EXPR (op) != 0) |
3423 | return MEM_EXPR (op); | |
c5adc06a RK |
3424 | |
3425 | /* Otherwise we have an address, so indicate it and look at the address. */ | |
3426 | *paddressp = 1; | |
3427 | op = XEXP (op, 0); | |
3428 | ||
3429 | /* First check if we have a decl for the address, then look at the right side | |
3430 | if it is a PLUS. Otherwise, strip off arithmetic and keep looking. | |
3431 | But don't allow the address to itself be indirect. */ | |
998d7deb RH |
3432 | if ((expr = get_mem_expr_from_op (op, &inner_addressp)) && ! inner_addressp) |
3433 | return expr; | |
c5adc06a | 3434 | else if (GET_CODE (op) == PLUS |
998d7deb RH |
3435 | && (expr = get_mem_expr_from_op (XEXP (op, 1), &inner_addressp))) |
3436 | return expr; | |
c5adc06a | 3437 | |
481683e1 | 3438 | while (UNARY_P (op) |
ec8e098d | 3439 | || GET_RTX_CLASS (GET_CODE (op)) == RTX_BIN_ARITH) |
c5adc06a RK |
3440 | op = XEXP (op, 0); |
3441 | ||
998d7deb RH |
3442 | expr = get_mem_expr_from_op (op, &inner_addressp); |
3443 | return inner_addressp ? 0 : expr; | |
c5adc06a | 3444 | } |
ff81832f | 3445 | |
4f9b4029 RK |
3446 | /* Output operand names for assembler instructions. OPERANDS is the |
3447 | operand vector, OPORDER is the order to write the operands, and NOPS | |
3448 | is the number of operands to write. */ | |
3449 | ||
3450 | static void | |
6cf9ac28 | 3451 | output_asm_operand_names (rtx *operands, int *oporder, int nops) |
4f9b4029 RK |
3452 | { |
3453 | int wrote = 0; | |
3454 | int i; | |
3455 | ||
3456 | for (i = 0; i < nops; i++) | |
3457 | { | |
3458 | int addressp; | |
a560d4d4 JH |
3459 | rtx op = operands[oporder[i]]; |
3460 | tree expr = get_mem_expr_from_op (op, &addressp); | |
4f9b4029 | 3461 | |
a560d4d4 JH |
3462 | fprintf (asm_out_file, "%c%s", |
3463 | wrote ? ',' : '\t', wrote ? "" : ASM_COMMENT_START); | |
3464 | wrote = 1; | |
998d7deb | 3465 | if (expr) |
4f9b4029 | 3466 | { |
a560d4d4 | 3467 | fprintf (asm_out_file, "%s", |
998d7deb RH |
3468 | addressp ? "*" : ""); |
3469 | print_mem_expr (asm_out_file, expr); | |
4f9b4029 RK |
3470 | wrote = 1; |
3471 | } | |
a560d4d4 JH |
3472 | else if (REG_P (op) && ORIGINAL_REGNO (op) |
3473 | && ORIGINAL_REGNO (op) != REGNO (op)) | |
3474 | fprintf (asm_out_file, " tmp%i", ORIGINAL_REGNO (op)); | |
4f9b4029 RK |
3475 | } |
3476 | } | |
3477 | ||
d1658619 SP |
3478 | #ifdef ASSEMBLER_DIALECT |
3479 | /* Helper function to parse assembler dialects in the asm string. | |
3480 | This is called from output_asm_insn and asm_fprintf. */ | |
3481 | static const char * | |
3482 | do_assembler_dialects (const char *p, int *dialect) | |
3483 | { | |
3484 | char c = *(p - 1); | |
3485 | ||
3486 | switch (c) | |
3487 | { | |
3488 | case '{': | |
3489 | { | |
3490 | int i; | |
3491 | ||
3492 | if (*dialect) | |
3493 | output_operand_lossage ("nested assembly dialect alternatives"); | |
3494 | else | |
3495 | *dialect = 1; | |
3496 | ||
3497 | /* If we want the first dialect, do nothing. Otherwise, skip | |
3498 | DIALECT_NUMBER of strings ending with '|'. */ | |
3499 | for (i = 0; i < dialect_number; i++) | |
3500 | { | |
382522cb MK |
3501 | while (*p && *p != '}') |
3502 | { | |
3503 | if (*p == '|') | |
3504 | { | |
3505 | p++; | |
3506 | break; | |
3507 | } | |
3508 | ||
3509 | /* Skip over any character after a percent sign. */ | |
3510 | if (*p == '%') | |
3511 | p++; | |
3512 | if (*p) | |
3513 | p++; | |
3514 | } | |
3515 | ||
d1658619 SP |
3516 | if (*p == '}') |
3517 | break; | |
3518 | } | |
3519 | ||
3520 | if (*p == '\0') | |
3521 | output_operand_lossage ("unterminated assembly dialect alternative"); | |
3522 | } | |
3523 | break; | |
3524 | ||
3525 | case '|': | |
3526 | if (*dialect) | |
3527 | { | |
3528 | /* Skip to close brace. */ | |
3529 | do | |
3530 | { | |
3531 | if (*p == '\0') | |
3532 | { | |
3533 | output_operand_lossage ("unterminated assembly dialect alternative"); | |
3534 | break; | |
3535 | } | |
382522cb MK |
3536 | |
3537 | /* Skip over any character after a percent sign. */ | |
3538 | if (*p == '%' && p[1]) | |
3539 | { | |
3540 | p += 2; | |
3541 | continue; | |
3542 | } | |
3543 | ||
3544 | if (*p++ == '}') | |
3545 | break; | |
d1658619 | 3546 | } |
382522cb MK |
3547 | while (1); |
3548 | ||
d1658619 SP |
3549 | *dialect = 0; |
3550 | } | |
3551 | else | |
3552 | putc (c, asm_out_file); | |
3553 | break; | |
3554 | ||
3555 | case '}': | |
3556 | if (! *dialect) | |
3557 | putc (c, asm_out_file); | |
3558 | *dialect = 0; | |
3559 | break; | |
3560 | default: | |
3561 | gcc_unreachable (); | |
3562 | } | |
3563 | ||
3564 | return p; | |
3565 | } | |
3566 | #endif | |
3567 | ||
3cf2715d DE |
3568 | /* Output text from TEMPLATE to the assembler output file, |
3569 | obeying %-directions to substitute operands taken from | |
3570 | the vector OPERANDS. | |
3571 | ||
3572 | %N (for N a digit) means print operand N in usual manner. | |
3573 | %lN means require operand N to be a CODE_LABEL or LABEL_REF | |
3574 | and print the label name with no punctuation. | |
3575 | %cN means require operand N to be a constant | |
3576 | and print the constant expression with no punctuation. | |
3577 | %aN means expect operand N to be a memory address | |
3578 | (not a memory reference!) and print a reference | |
3579 | to that address. | |
3580 | %nN means expect operand N to be a constant | |
3581 | and print a constant expression for minus the value | |
3582 | of the operand, with no other punctuation. */ | |
3583 | ||
3584 | void | |
48c54229 | 3585 | output_asm_insn (const char *templ, rtx *operands) |
3cf2715d | 3586 | { |
b3694847 SS |
3587 | const char *p; |
3588 | int c; | |
8554d9a4 JJ |
3589 | #ifdef ASSEMBLER_DIALECT |
3590 | int dialect = 0; | |
3591 | #endif | |
0d4903b8 | 3592 | int oporder[MAX_RECOG_OPERANDS]; |
4f9b4029 | 3593 | char opoutput[MAX_RECOG_OPERANDS]; |
0d4903b8 | 3594 | int ops = 0; |
3cf2715d DE |
3595 | |
3596 | /* An insn may return a null string template | |
3597 | in a case where no assembler code is needed. */ | |
48c54229 | 3598 | if (*templ == 0) |
3cf2715d DE |
3599 | return; |
3600 | ||
4f9b4029 | 3601 | memset (opoutput, 0, sizeof opoutput); |
48c54229 | 3602 | p = templ; |
3cf2715d DE |
3603 | putc ('\t', asm_out_file); |
3604 | ||
3605 | #ifdef ASM_OUTPUT_OPCODE | |
3606 | ASM_OUTPUT_OPCODE (asm_out_file, p); | |
3607 | #endif | |
3608 | ||
b729186a | 3609 | while ((c = *p++)) |
3cf2715d DE |
3610 | switch (c) |
3611 | { | |
3cf2715d | 3612 | case '\n': |
4f9b4029 RK |
3613 | if (flag_verbose_asm) |
3614 | output_asm_operand_names (operands, oporder, ops); | |
0d4903b8 RK |
3615 | if (flag_print_asm_name) |
3616 | output_asm_name (); | |
3617 | ||
4f9b4029 RK |
3618 | ops = 0; |
3619 | memset (opoutput, 0, sizeof opoutput); | |
3620 | ||
3cf2715d | 3621 | putc (c, asm_out_file); |
cb649530 | 3622 | #ifdef ASM_OUTPUT_OPCODE |
3cf2715d DE |
3623 | while ((c = *p) == '\t') |
3624 | { | |
3625 | putc (c, asm_out_file); | |
3626 | p++; | |
3627 | } | |
3628 | ASM_OUTPUT_OPCODE (asm_out_file, p); | |
3cf2715d | 3629 | #endif |
cb649530 | 3630 | break; |
3cf2715d DE |
3631 | |
3632 | #ifdef ASSEMBLER_DIALECT | |
3633 | case '{': | |
3cf2715d | 3634 | case '}': |
d1658619 SP |
3635 | case '|': |
3636 | p = do_assembler_dialects (p, &dialect); | |
3cf2715d DE |
3637 | break; |
3638 | #endif | |
3639 | ||
3640 | case '%': | |
382522cb MK |
3641 | /* %% outputs a single %. %{, %} and %| print {, } and | respectively |
3642 | if ASSEMBLER_DIALECT defined and these characters have a special | |
3643 | meaning as dialect delimiters.*/ | |
3644 | if (*p == '%' | |
3645 | #ifdef ASSEMBLER_DIALECT | |
3646 | || *p == '{' || *p == '}' || *p == '|' | |
3647 | #endif | |
3648 | ) | |
3cf2715d | 3649 | { |
382522cb | 3650 | putc (*p, asm_out_file); |
3cf2715d | 3651 | p++; |
3cf2715d DE |
3652 | } |
3653 | /* %= outputs a number which is unique to each insn in the entire | |
3654 | compilation. This is useful for making local labels that are | |
3655 | referred to more than once in a given insn. */ | |
3656 | else if (*p == '=') | |
3657 | { | |
3658 | p++; | |
3659 | fprintf (asm_out_file, "%d", insn_counter); | |
3660 | } | |
3661 | /* % followed by a letter and some digits | |
3662 | outputs an operand in a special way depending on the letter. | |
3663 | Letters `acln' are implemented directly. | |
3664 | Other letters are passed to `output_operand' so that | |
6e2188e0 | 3665 | the TARGET_PRINT_OPERAND hook can define them. */ |
0df6c2c7 | 3666 | else if (ISALPHA (*p)) |
3cf2715d DE |
3667 | { |
3668 | int letter = *p++; | |
c383c15f GK |
3669 | unsigned long opnum; |
3670 | char *endptr; | |
b0efb46b | 3671 | |
c383c15f GK |
3672 | opnum = strtoul (p, &endptr, 10); |
3673 | ||
3674 | if (endptr == p) | |
3675 | output_operand_lossage ("operand number missing " | |
3676 | "after %%-letter"); | |
3677 | else if (this_is_asm_operands && opnum >= insn_noperands) | |
3cf2715d DE |
3678 | output_operand_lossage ("operand number out of range"); |
3679 | else if (letter == 'l') | |
c383c15f | 3680 | output_asm_label (operands[opnum]); |
3cf2715d | 3681 | else if (letter == 'a') |
c383c15f | 3682 | output_address (operands[opnum]); |
3cf2715d DE |
3683 | else if (letter == 'c') |
3684 | { | |
c383c15f GK |
3685 | if (CONSTANT_ADDRESS_P (operands[opnum])) |
3686 | output_addr_const (asm_out_file, operands[opnum]); | |
3cf2715d | 3687 | else |
c383c15f | 3688 | output_operand (operands[opnum], 'c'); |
3cf2715d DE |
3689 | } |
3690 | else if (letter == 'n') | |
3691 | { | |
481683e1 | 3692 | if (CONST_INT_P (operands[opnum])) |
21e3a81b | 3693 | fprintf (asm_out_file, HOST_WIDE_INT_PRINT_DEC, |
c383c15f | 3694 | - INTVAL (operands[opnum])); |
3cf2715d DE |
3695 | else |
3696 | { | |
3697 | putc ('-', asm_out_file); | |
c383c15f | 3698 | output_addr_const (asm_out_file, operands[opnum]); |
3cf2715d DE |
3699 | } |
3700 | } | |
3701 | else | |
c383c15f | 3702 | output_operand (operands[opnum], letter); |
f5d927c0 | 3703 | |
c383c15f | 3704 | if (!opoutput[opnum]) |
dc9d0b14 | 3705 | oporder[ops++] = opnum; |
c383c15f | 3706 | opoutput[opnum] = 1; |
0d4903b8 | 3707 | |
c383c15f GK |
3708 | p = endptr; |
3709 | c = *p; | |
3cf2715d DE |
3710 | } |
3711 | /* % followed by a digit outputs an operand the default way. */ | |
0df6c2c7 | 3712 | else if (ISDIGIT (*p)) |
3cf2715d | 3713 | { |
c383c15f GK |
3714 | unsigned long opnum; |
3715 | char *endptr; | |
b0efb46b | 3716 | |
c383c15f GK |
3717 | opnum = strtoul (p, &endptr, 10); |
3718 | if (this_is_asm_operands && opnum >= insn_noperands) | |
3cf2715d DE |
3719 | output_operand_lossage ("operand number out of range"); |
3720 | else | |
c383c15f | 3721 | output_operand (operands[opnum], 0); |
0d4903b8 | 3722 | |
c383c15f | 3723 | if (!opoutput[opnum]) |
dc9d0b14 | 3724 | oporder[ops++] = opnum; |
c383c15f | 3725 | opoutput[opnum] = 1; |
4f9b4029 | 3726 | |
c383c15f GK |
3727 | p = endptr; |
3728 | c = *p; | |
3cf2715d DE |
3729 | } |
3730 | /* % followed by punctuation: output something for that | |
6e2188e0 NF |
3731 | punctuation character alone, with no operand. The |
3732 | TARGET_PRINT_OPERAND hook decides what is actually done. */ | |
3733 | else if (targetm.asm_out.print_operand_punct_valid_p ((unsigned char) *p)) | |
3cf2715d | 3734 | output_operand (NULL_RTX, *p++); |
3cf2715d DE |
3735 | else |
3736 | output_operand_lossage ("invalid %%-code"); | |
3737 | break; | |
3738 | ||
3739 | default: | |
3740 | putc (c, asm_out_file); | |
3741 | } | |
3742 | ||
0d4903b8 RK |
3743 | /* Write out the variable names for operands, if we know them. */ |
3744 | if (flag_verbose_asm) | |
4f9b4029 | 3745 | output_asm_operand_names (operands, oporder, ops); |
0d4903b8 RK |
3746 | if (flag_print_asm_name) |
3747 | output_asm_name (); | |
3cf2715d DE |
3748 | |
3749 | putc ('\n', asm_out_file); | |
3750 | } | |
3751 | \f | |
3752 | /* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */ | |
3753 | ||
3754 | void | |
6cf9ac28 | 3755 | output_asm_label (rtx x) |
3cf2715d DE |
3756 | { |
3757 | char buf[256]; | |
3758 | ||
3759 | if (GET_CODE (x) == LABEL_REF) | |
be1bb652 | 3760 | x = XEXP (x, 0); |
4b4bf941 JQ |
3761 | if (LABEL_P (x) |
3762 | || (NOTE_P (x) | |
a38e7aa5 | 3763 | && NOTE_KIND (x) == NOTE_INSN_DELETED_LABEL)) |
3cf2715d DE |
3764 | ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x)); |
3765 | else | |
9e637a26 | 3766 | output_operand_lossage ("'%%l' operand isn't a label"); |
3cf2715d DE |
3767 | |
3768 | assemble_name (asm_out_file, buf); | |
3769 | } | |
3770 | ||
a7fe25b8 JJ |
3771 | /* Helper rtx-iteration-function for mark_symbol_refs_as_used and |
3772 | output_operand. Marks SYMBOL_REFs as referenced through use of | |
3773 | assemble_external. */ | |
c70d0414 HPN |
3774 | |
3775 | static int | |
3776 | mark_symbol_ref_as_used (rtx *xp, void *dummy ATTRIBUTE_UNUSED) | |
3777 | { | |
3778 | rtx x = *xp; | |
3779 | ||
3780 | /* If we have a used symbol, we may have to emit assembly | |
3781 | annotations corresponding to whether the symbol is external, weak | |
3782 | or has non-default visibility. */ | |
3783 | if (GET_CODE (x) == SYMBOL_REF) | |
3784 | { | |
3785 | tree t; | |
3786 | ||
3787 | t = SYMBOL_REF_DECL (x); | |
3788 | if (t) | |
3789 | assemble_external (t); | |
3790 | ||
3791 | return -1; | |
3792 | } | |
3793 | ||
3794 | return 0; | |
3795 | } | |
3796 | ||
a7fe25b8 JJ |
3797 | /* Marks SYMBOL_REFs in x as referenced through use of assemble_external. */ |
3798 | ||
3799 | void | |
3800 | mark_symbol_refs_as_used (rtx x) | |
3801 | { | |
3802 | for_each_rtx (&x, mark_symbol_ref_as_used, NULL); | |
3803 | } | |
3804 | ||
3cf2715d | 3805 | /* Print operand X using machine-dependent assembler syntax. |
3cf2715d DE |
3806 | CODE is a non-digit that preceded the operand-number in the % spec, |
3807 | such as 'z' if the spec was `%z3'. CODE is 0 if there was no char | |
3808 | between the % and the digits. | |
3809 | When CODE is a non-letter, X is 0. | |
3810 | ||
3811 | The meanings of the letters are machine-dependent and controlled | |
6e2188e0 | 3812 | by TARGET_PRINT_OPERAND. */ |
3cf2715d | 3813 | |
6b3c42ae | 3814 | void |
6cf9ac28 | 3815 | output_operand (rtx x, int code ATTRIBUTE_UNUSED) |
3cf2715d DE |
3816 | { |
3817 | if (x && GET_CODE (x) == SUBREG) | |
55a2c322 | 3818 | x = alter_subreg (&x, true); |
3cf2715d | 3819 | |
04c7ae48 | 3820 | /* X must not be a pseudo reg. */ |
0bccc606 | 3821 | gcc_assert (!x || !REG_P (x) || REGNO (x) < FIRST_PSEUDO_REGISTER); |
3cf2715d | 3822 | |
6e2188e0 | 3823 | targetm.asm_out.print_operand (asm_out_file, x, code); |
c70d0414 HPN |
3824 | |
3825 | if (x == NULL_RTX) | |
3826 | return; | |
3827 | ||
3828 | for_each_rtx (&x, mark_symbol_ref_as_used, NULL); | |
3cf2715d DE |
3829 | } |
3830 | ||
6e2188e0 NF |
3831 | /* Print a memory reference operand for address X using |
3832 | machine-dependent assembler syntax. */ | |
3cf2715d DE |
3833 | |
3834 | void | |
6cf9ac28 | 3835 | output_address (rtx x) |
3cf2715d | 3836 | { |
6fb5fa3c DB |
3837 | bool changed = false; |
3838 | walk_alter_subreg (&x, &changed); | |
6e2188e0 | 3839 | targetm.asm_out.print_operand_address (asm_out_file, x); |
3cf2715d DE |
3840 | } |
3841 | \f | |
3842 | /* Print an integer constant expression in assembler syntax. | |
3843 | Addition and subtraction are the only arithmetic | |
3844 | that may appear in these expressions. */ | |
3845 | ||
3846 | void | |
6cf9ac28 | 3847 | output_addr_const (FILE *file, rtx x) |
3cf2715d DE |
3848 | { |
3849 | char buf[256]; | |
3850 | ||
3851 | restart: | |
3852 | switch (GET_CODE (x)) | |
3853 | { | |
3854 | case PC: | |
eac50d7a | 3855 | putc ('.', file); |
3cf2715d DE |
3856 | break; |
3857 | ||
3858 | case SYMBOL_REF: | |
21dad7e6 | 3859 | if (SYMBOL_REF_DECL (x)) |
152464d2 | 3860 | assemble_external (SYMBOL_REF_DECL (x)); |
99c8c61c AO |
3861 | #ifdef ASM_OUTPUT_SYMBOL_REF |
3862 | ASM_OUTPUT_SYMBOL_REF (file, x); | |
3863 | #else | |
3cf2715d | 3864 | assemble_name (file, XSTR (x, 0)); |
99c8c61c | 3865 | #endif |
3cf2715d DE |
3866 | break; |
3867 | ||
3868 | case LABEL_REF: | |
422be3c3 AO |
3869 | x = XEXP (x, 0); |
3870 | /* Fall through. */ | |
3cf2715d DE |
3871 | case CODE_LABEL: |
3872 | ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x)); | |
2f0b7af6 GK |
3873 | #ifdef ASM_OUTPUT_LABEL_REF |
3874 | ASM_OUTPUT_LABEL_REF (file, buf); | |
3875 | #else | |
3cf2715d | 3876 | assemble_name (file, buf); |
2f0b7af6 | 3877 | #endif |
3cf2715d DE |
3878 | break; |
3879 | ||
3880 | case CONST_INT: | |
6725cc58 | 3881 | fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x)); |
3cf2715d DE |
3882 | break; |
3883 | ||
3884 | case CONST: | |
3885 | /* This used to output parentheses around the expression, | |
3886 | but that does not work on the 386 (either ATT or BSD assembler). */ | |
3887 | output_addr_const (file, XEXP (x, 0)); | |
3888 | break; | |
3889 | ||
807e902e KZ |
3890 | case CONST_WIDE_INT: |
3891 | /* We do not know the mode here so we have to use a round about | |
3892 | way to build a wide-int to get it printed properly. */ | |
3893 | { | |
3894 | wide_int w = wide_int::from_array (&CONST_WIDE_INT_ELT (x, 0), | |
3895 | CONST_WIDE_INT_NUNITS (x), | |
3896 | CONST_WIDE_INT_NUNITS (x) | |
3897 | * HOST_BITS_PER_WIDE_INT, | |
3898 | false); | |
3899 | print_decs (w, file); | |
3900 | } | |
3901 | break; | |
3902 | ||
3cf2715d | 3903 | case CONST_DOUBLE: |
807e902e | 3904 | if (CONST_DOUBLE_AS_INT_P (x)) |
3cf2715d DE |
3905 | { |
3906 | /* We can use %d if the number is one word and positive. */ | |
3907 | if (CONST_DOUBLE_HIGH (x)) | |
21e3a81b | 3908 | fprintf (file, HOST_WIDE_INT_PRINT_DOUBLE_HEX, |
3d57d7ce DK |
3909 | (unsigned HOST_WIDE_INT) CONST_DOUBLE_HIGH (x), |
3910 | (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (x)); | |
f5d927c0 | 3911 | else if (CONST_DOUBLE_LOW (x) < 0) |
3d57d7ce DK |
3912 | fprintf (file, HOST_WIDE_INT_PRINT_HEX, |
3913 | (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (x)); | |
3cf2715d | 3914 | else |
21e3a81b | 3915 | fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x)); |
3cf2715d DE |
3916 | } |
3917 | else | |
3918 | /* We can't handle floating point constants; | |
3919 | PRINT_OPERAND must handle them. */ | |
3920 | output_operand_lossage ("floating constant misused"); | |
3921 | break; | |
3922 | ||
14c931f1 | 3923 | case CONST_FIXED: |
848fac28 | 3924 | fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_FIXED_VALUE_LOW (x)); |
14c931f1 CF |
3925 | break; |
3926 | ||
3cf2715d DE |
3927 | case PLUS: |
3928 | /* Some assemblers need integer constants to appear last (eg masm). */ | |
481683e1 | 3929 | if (CONST_INT_P (XEXP (x, 0))) |
3cf2715d DE |
3930 | { |
3931 | output_addr_const (file, XEXP (x, 1)); | |
3932 | if (INTVAL (XEXP (x, 0)) >= 0) | |
3933 | fprintf (file, "+"); | |
3934 | output_addr_const (file, XEXP (x, 0)); | |
3935 | } | |
3936 | else | |
3937 | { | |
3938 | output_addr_const (file, XEXP (x, 0)); | |
481683e1 | 3939 | if (!CONST_INT_P (XEXP (x, 1)) |
08106825 | 3940 | || INTVAL (XEXP (x, 1)) >= 0) |
3cf2715d DE |
3941 | fprintf (file, "+"); |
3942 | output_addr_const (file, XEXP (x, 1)); | |
3943 | } | |
3944 | break; | |
3945 | ||
3946 | case MINUS: | |
3947 | /* Avoid outputting things like x-x or x+5-x, | |
3948 | since some assemblers can't handle that. */ | |
3949 | x = simplify_subtraction (x); | |
3950 | if (GET_CODE (x) != MINUS) | |
3951 | goto restart; | |
3952 | ||
3953 | output_addr_const (file, XEXP (x, 0)); | |
3954 | fprintf (file, "-"); | |
481683e1 | 3955 | if ((CONST_INT_P (XEXP (x, 1)) && INTVAL (XEXP (x, 1)) >= 0) |
301d03af RS |
3956 | || GET_CODE (XEXP (x, 1)) == PC |
3957 | || GET_CODE (XEXP (x, 1)) == SYMBOL_REF) | |
3958 | output_addr_const (file, XEXP (x, 1)); | |
3959 | else | |
3cf2715d | 3960 | { |
17b53c33 | 3961 | fputs (targetm.asm_out.open_paren, file); |
3cf2715d | 3962 | output_addr_const (file, XEXP (x, 1)); |
17b53c33 | 3963 | fputs (targetm.asm_out.close_paren, file); |
3cf2715d | 3964 | } |
3cf2715d DE |
3965 | break; |
3966 | ||
3967 | case ZERO_EXTEND: | |
3968 | case SIGN_EXTEND: | |
fdf473ae | 3969 | case SUBREG: |
c01e4479 | 3970 | case TRUNCATE: |
3cf2715d DE |
3971 | output_addr_const (file, XEXP (x, 0)); |
3972 | break; | |
3973 | ||
3974 | default: | |
6cbd8875 AS |
3975 | if (targetm.asm_out.output_addr_const_extra (file, x)) |
3976 | break; | |
422be3c3 | 3977 | |
3cf2715d DE |
3978 | output_operand_lossage ("invalid expression as operand"); |
3979 | } | |
3980 | } | |
3981 | \f | |
a803773f JM |
3982 | /* Output a quoted string. */ |
3983 | ||
3984 | void | |
3985 | output_quoted_string (FILE *asm_file, const char *string) | |
3986 | { | |
3987 | #ifdef OUTPUT_QUOTED_STRING | |
3988 | OUTPUT_QUOTED_STRING (asm_file, string); | |
3989 | #else | |
3990 | char c; | |
3991 | ||
3992 | putc ('\"', asm_file); | |
3993 | while ((c = *string++) != 0) | |
3994 | { | |
3995 | if (ISPRINT (c)) | |
3996 | { | |
3997 | if (c == '\"' || c == '\\') | |
3998 | putc ('\\', asm_file); | |
3999 | putc (c, asm_file); | |
4000 | } | |
4001 | else | |
4002 | fprintf (asm_file, "\\%03o", (unsigned char) c); | |
4003 | } | |
4004 | putc ('\"', asm_file); | |
4005 | #endif | |
4006 | } | |
4007 | \f | |
5e3929ed DA |
4008 | /* Write a HOST_WIDE_INT number in hex form 0x1234, fast. */ |
4009 | ||
4010 | void | |
4011 | fprint_whex (FILE *f, unsigned HOST_WIDE_INT value) | |
4012 | { | |
4013 | char buf[2 + CHAR_BIT * sizeof (value) / 4]; | |
4014 | if (value == 0) | |
4015 | putc ('0', f); | |
4016 | else | |
4017 | { | |
4018 | char *p = buf + sizeof (buf); | |
4019 | do | |
4020 | *--p = "0123456789abcdef"[value % 16]; | |
4021 | while ((value /= 16) != 0); | |
4022 | *--p = 'x'; | |
4023 | *--p = '0'; | |
4024 | fwrite (p, 1, buf + sizeof (buf) - p, f); | |
4025 | } | |
4026 | } | |
4027 | ||
4028 | /* Internal function that prints an unsigned long in decimal in reverse. | |
4029 | The output string IS NOT null-terminated. */ | |
4030 | ||
4031 | static int | |
4032 | sprint_ul_rev (char *s, unsigned long value) | |
4033 | { | |
4034 | int i = 0; | |
4035 | do | |
4036 | { | |
4037 | s[i] = "0123456789"[value % 10]; | |
4038 | value /= 10; | |
4039 | i++; | |
4040 | /* alternate version, without modulo */ | |
4041 | /* oldval = value; */ | |
4042 | /* value /= 10; */ | |
4043 | /* s[i] = "0123456789" [oldval - 10*value]; */ | |
4044 | /* i++ */ | |
4045 | } | |
4046 | while (value != 0); | |
4047 | return i; | |
4048 | } | |
4049 | ||
5e3929ed DA |
4050 | /* Write an unsigned long as decimal to a file, fast. */ |
4051 | ||
4052 | void | |
4053 | fprint_ul (FILE *f, unsigned long value) | |
4054 | { | |
4055 | /* python says: len(str(2**64)) == 20 */ | |
4056 | char s[20]; | |
4057 | int i; | |
4058 | ||
4059 | i = sprint_ul_rev (s, value); | |
4060 | ||
4061 | /* It's probably too small to bother with string reversal and fputs. */ | |
4062 | do | |
4063 | { | |
4064 | i--; | |
4065 | putc (s[i], f); | |
4066 | } | |
4067 | while (i != 0); | |
4068 | } | |
4069 | ||
4070 | /* Write an unsigned long as decimal to a string, fast. | |
4071 | s must be wide enough to not overflow, at least 21 chars. | |
4072 | Returns the length of the string (without terminating '\0'). */ | |
4073 | ||
4074 | int | |
4075 | sprint_ul (char *s, unsigned long value) | |
4076 | { | |
4077 | int len; | |
4078 | char tmp_c; | |
4079 | int i; | |
4080 | int j; | |
4081 | ||
4082 | len = sprint_ul_rev (s, value); | |
4083 | s[len] = '\0'; | |
4084 | ||
4085 | /* Reverse the string. */ | |
4086 | i = 0; | |
4087 | j = len - 1; | |
4088 | while (i < j) | |
4089 | { | |
4090 | tmp_c = s[i]; | |
4091 | s[i] = s[j]; | |
4092 | s[j] = tmp_c; | |
4093 | i++; j--; | |
4094 | } | |
4095 | ||
4096 | return len; | |
4097 | } | |
4098 | ||
3cf2715d DE |
4099 | /* A poor man's fprintf, with the added features of %I, %R, %L, and %U. |
4100 | %R prints the value of REGISTER_PREFIX. | |
4101 | %L prints the value of LOCAL_LABEL_PREFIX. | |
4102 | %U prints the value of USER_LABEL_PREFIX. | |
4103 | %I prints the value of IMMEDIATE_PREFIX. | |
4104 | %O runs ASM_OUTPUT_OPCODE to transform what follows in the string. | |
b1721339 | 4105 | Also supported are %d, %i, %u, %x, %X, %o, %c, %s and %%. |
3cf2715d DE |
4106 | |
4107 | We handle alternate assembler dialects here, just like output_asm_insn. */ | |
4108 | ||
4109 | void | |
e34d07f2 | 4110 | asm_fprintf (FILE *file, const char *p, ...) |
3cf2715d | 4111 | { |
3cf2715d DE |
4112 | char buf[10]; |
4113 | char *q, c; | |
d1658619 SP |
4114 | #ifdef ASSEMBLER_DIALECT |
4115 | int dialect = 0; | |
4116 | #endif | |
e34d07f2 | 4117 | va_list argptr; |
6cf9ac28 | 4118 | |
e34d07f2 | 4119 | va_start (argptr, p); |
3cf2715d DE |
4120 | |
4121 | buf[0] = '%'; | |
4122 | ||
b729186a | 4123 | while ((c = *p++)) |
3cf2715d DE |
4124 | switch (c) |
4125 | { | |
4126 | #ifdef ASSEMBLER_DIALECT | |
4127 | case '{': | |
3cf2715d | 4128 | case '}': |
d1658619 SP |
4129 | case '|': |
4130 | p = do_assembler_dialects (p, &dialect); | |
3cf2715d DE |
4131 | break; |
4132 | #endif | |
4133 | ||
4134 | case '%': | |
4135 | c = *p++; | |
4136 | q = &buf[1]; | |
b1721339 KG |
4137 | while (strchr ("-+ #0", c)) |
4138 | { | |
4139 | *q++ = c; | |
4140 | c = *p++; | |
4141 | } | |
0df6c2c7 | 4142 | while (ISDIGIT (c) || c == '.') |
3cf2715d DE |
4143 | { |
4144 | *q++ = c; | |
4145 | c = *p++; | |
4146 | } | |
4147 | switch (c) | |
4148 | { | |
4149 | case '%': | |
b1721339 | 4150 | putc ('%', file); |
3cf2715d DE |
4151 | break; |
4152 | ||
4153 | case 'd': case 'i': case 'u': | |
b1721339 KG |
4154 | case 'x': case 'X': case 'o': |
4155 | case 'c': | |
3cf2715d DE |
4156 | *q++ = c; |
4157 | *q = 0; | |
4158 | fprintf (file, buf, va_arg (argptr, int)); | |
4159 | break; | |
4160 | ||
4161 | case 'w': | |
b1721339 KG |
4162 | /* This is a prefix to the 'd', 'i', 'u', 'x', 'X', and |
4163 | 'o' cases, but we do not check for those cases. It | |
4164 | means that the value is a HOST_WIDE_INT, which may be | |
4165 | either `long' or `long long'. */ | |
85f015e1 KG |
4166 | memcpy (q, HOST_WIDE_INT_PRINT, strlen (HOST_WIDE_INT_PRINT)); |
4167 | q += strlen (HOST_WIDE_INT_PRINT); | |
3cf2715d DE |
4168 | *q++ = *p++; |
4169 | *q = 0; | |
4170 | fprintf (file, buf, va_arg (argptr, HOST_WIDE_INT)); | |
4171 | break; | |
4172 | ||
4173 | case 'l': | |
4174 | *q++ = c; | |
b1721339 KG |
4175 | #ifdef HAVE_LONG_LONG |
4176 | if (*p == 'l') | |
4177 | { | |
4178 | *q++ = *p++; | |
4179 | *q++ = *p++; | |
4180 | *q = 0; | |
4181 | fprintf (file, buf, va_arg (argptr, long long)); | |
4182 | } | |
4183 | else | |
4184 | #endif | |
4185 | { | |
4186 | *q++ = *p++; | |
4187 | *q = 0; | |
4188 | fprintf (file, buf, va_arg (argptr, long)); | |
4189 | } | |
6cf9ac28 | 4190 | |
3cf2715d DE |
4191 | break; |
4192 | ||
4193 | case 's': | |
4194 | *q++ = c; | |
4195 | *q = 0; | |
4196 | fprintf (file, buf, va_arg (argptr, char *)); | |
4197 | break; | |
4198 | ||
4199 | case 'O': | |
4200 | #ifdef ASM_OUTPUT_OPCODE | |
4201 | ASM_OUTPUT_OPCODE (asm_out_file, p); | |
4202 | #endif | |
4203 | break; | |
4204 | ||
4205 | case 'R': | |
4206 | #ifdef REGISTER_PREFIX | |
4207 | fprintf (file, "%s", REGISTER_PREFIX); | |
4208 | #endif | |
4209 | break; | |
4210 | ||
4211 | case 'I': | |
4212 | #ifdef IMMEDIATE_PREFIX | |
4213 | fprintf (file, "%s", IMMEDIATE_PREFIX); | |
4214 | #endif | |
4215 | break; | |
4216 | ||
4217 | case 'L': | |
4218 | #ifdef LOCAL_LABEL_PREFIX | |
4219 | fprintf (file, "%s", LOCAL_LABEL_PREFIX); | |
4220 | #endif | |
4221 | break; | |
4222 | ||
4223 | case 'U': | |
19283265 | 4224 | fputs (user_label_prefix, file); |
3cf2715d DE |
4225 | break; |
4226 | ||
fe0503ea | 4227 | #ifdef ASM_FPRINTF_EXTENSIONS |
7ef0daad | 4228 | /* Uppercase letters are reserved for general use by asm_fprintf |
fe0503ea NC |
4229 | and so are not available to target specific code. In order to |
4230 | prevent the ASM_FPRINTF_EXTENSIONS macro from using them then, | |
4231 | they are defined here. As they get turned into real extensions | |
4232 | to asm_fprintf they should be removed from this list. */ | |
4233 | case 'A': case 'B': case 'C': case 'D': case 'E': | |
4234 | case 'F': case 'G': case 'H': case 'J': case 'K': | |
4235 | case 'M': case 'N': case 'P': case 'Q': case 'S': | |
4236 | case 'T': case 'V': case 'W': case 'Y': case 'Z': | |
4237 | break; | |
f5d927c0 | 4238 | |
fe0503ea NC |
4239 | ASM_FPRINTF_EXTENSIONS (file, argptr, p) |
4240 | #endif | |
3cf2715d | 4241 | default: |
0bccc606 | 4242 | gcc_unreachable (); |
3cf2715d DE |
4243 | } |
4244 | break; | |
4245 | ||
4246 | default: | |
b1721339 | 4247 | putc (c, file); |
3cf2715d | 4248 | } |
e34d07f2 | 4249 | va_end (argptr); |
3cf2715d DE |
4250 | } |
4251 | \f | |
3cf2715d DE |
4252 | /* Return nonzero if this function has no function calls. */ |
4253 | ||
4254 | int | |
6cf9ac28 | 4255 | leaf_function_p (void) |
3cf2715d DE |
4256 | { |
4257 | rtx insn; | |
4258 | ||
d56a43a0 AK |
4259 | /* Some back-ends (e.g. s390) want leaf functions to stay leaf |
4260 | functions even if they call mcount. */ | |
4261 | if (crtl->profile && !targetm.keep_leaf_when_profiled ()) | |
3cf2715d DE |
4262 | return 0; |
4263 | ||
4264 | for (insn = get_insns (); insn; insn = NEXT_INSN (insn)) | |
4265 | { | |
4b4bf941 | 4266 | if (CALL_P (insn) |
7d167afd | 4267 | && ! SIBLING_CALL_P (insn)) |
3cf2715d | 4268 | return 0; |
4b4bf941 | 4269 | if (NONJUMP_INSN_P (insn) |
3cf2715d | 4270 | && GET_CODE (PATTERN (insn)) == SEQUENCE |
4b4bf941 | 4271 | && CALL_P (XVECEXP (PATTERN (insn), 0, 0)) |
0a1c58a2 | 4272 | && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0))) |
3cf2715d DE |
4273 | return 0; |
4274 | } | |
3cf2715d DE |
4275 | |
4276 | return 1; | |
4277 | } | |
4278 | ||
09da1532 | 4279 | /* Return 1 if branch is a forward branch. |
ef6257cd JH |
4280 | Uses insn_shuid array, so it works only in the final pass. May be used by |
4281 | output templates to customary add branch prediction hints. | |
4282 | */ | |
4283 | int | |
6cf9ac28 | 4284 | final_forward_branch_p (rtx insn) |
ef6257cd JH |
4285 | { |
4286 | int insn_id, label_id; | |
b0efb46b | 4287 | |
0bccc606 | 4288 | gcc_assert (uid_shuid); |
ef6257cd JH |
4289 | insn_id = INSN_SHUID (insn); |
4290 | label_id = INSN_SHUID (JUMP_LABEL (insn)); | |
4291 | /* We've hit some insns that does not have id information available. */ | |
0bccc606 | 4292 | gcc_assert (insn_id && label_id); |
ef6257cd JH |
4293 | return insn_id < label_id; |
4294 | } | |
4295 | ||
3cf2715d DE |
4296 | /* On some machines, a function with no call insns |
4297 | can run faster if it doesn't create its own register window. | |
4298 | When output, the leaf function should use only the "output" | |
4299 | registers. Ordinarily, the function would be compiled to use | |
4300 | the "input" registers to find its arguments; it is a candidate | |
4301 | for leaf treatment if it uses only the "input" registers. | |
4302 | Leaf function treatment means renumbering so the function | |
4303 | uses the "output" registers instead. */ | |
4304 | ||
4305 | #ifdef LEAF_REGISTERS | |
4306 | ||
3cf2715d DE |
4307 | /* Return 1 if this function uses only the registers that can be |
4308 | safely renumbered. */ | |
4309 | ||
4310 | int | |
6cf9ac28 | 4311 | only_leaf_regs_used (void) |
3cf2715d DE |
4312 | { |
4313 | int i; | |
4977bab6 | 4314 | const char *const permitted_reg_in_leaf_functions = LEAF_REGISTERS; |
3cf2715d DE |
4315 | |
4316 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
6fb5fa3c | 4317 | if ((df_regs_ever_live_p (i) || global_regs[i]) |
e5e809f4 JL |
4318 | && ! permitted_reg_in_leaf_functions[i]) |
4319 | return 0; | |
4320 | ||
e3b5732b | 4321 | if (crtl->uses_pic_offset_table |
e5e809f4 | 4322 | && pic_offset_table_rtx != 0 |
f8cfc6aa | 4323 | && REG_P (pic_offset_table_rtx) |
e5e809f4 JL |
4324 | && ! permitted_reg_in_leaf_functions[REGNO (pic_offset_table_rtx)]) |
4325 | return 0; | |
4326 | ||
3cf2715d DE |
4327 | return 1; |
4328 | } | |
4329 | ||
4330 | /* Scan all instructions and renumber all registers into those | |
4331 | available in leaf functions. */ | |
4332 | ||
4333 | static void | |
6cf9ac28 | 4334 | leaf_renumber_regs (rtx first) |
3cf2715d DE |
4335 | { |
4336 | rtx insn; | |
4337 | ||
4338 | /* Renumber only the actual patterns. | |
4339 | The reg-notes can contain frame pointer refs, | |
4340 | and renumbering them could crash, and should not be needed. */ | |
4341 | for (insn = first; insn; insn = NEXT_INSN (insn)) | |
2c3c49de | 4342 | if (INSN_P (insn)) |
3cf2715d | 4343 | leaf_renumber_regs_insn (PATTERN (insn)); |
3cf2715d DE |
4344 | } |
4345 | ||
4346 | /* Scan IN_RTX and its subexpressions, and renumber all regs into those | |
4347 | available in leaf functions. */ | |
4348 | ||
4349 | void | |
6cf9ac28 | 4350 | leaf_renumber_regs_insn (rtx in_rtx) |
3cf2715d | 4351 | { |
b3694847 SS |
4352 | int i, j; |
4353 | const char *format_ptr; | |
3cf2715d DE |
4354 | |
4355 | if (in_rtx == 0) | |
4356 | return; | |
4357 | ||
4358 | /* Renumber all input-registers into output-registers. | |
4359 | renumbered_regs would be 1 for an output-register; | |
4360 | they */ | |
4361 | ||
f8cfc6aa | 4362 | if (REG_P (in_rtx)) |
3cf2715d DE |
4363 | { |
4364 | int newreg; | |
4365 | ||
4366 | /* Don't renumber the same reg twice. */ | |
4367 | if (in_rtx->used) | |
4368 | return; | |
4369 | ||
4370 | newreg = REGNO (in_rtx); | |
4371 | /* Don't try to renumber pseudo regs. It is possible for a pseudo reg | |
4372 | to reach here as part of a REG_NOTE. */ | |
4373 | if (newreg >= FIRST_PSEUDO_REGISTER) | |
4374 | { | |
4375 | in_rtx->used = 1; | |
4376 | return; | |
4377 | } | |
4378 | newreg = LEAF_REG_REMAP (newreg); | |
0bccc606 | 4379 | gcc_assert (newreg >= 0); |
6fb5fa3c DB |
4380 | df_set_regs_ever_live (REGNO (in_rtx), false); |
4381 | df_set_regs_ever_live (newreg, true); | |
4382 | SET_REGNO (in_rtx, newreg); | |
3cf2715d DE |
4383 | in_rtx->used = 1; |
4384 | } | |
4385 | ||
2c3c49de | 4386 | if (INSN_P (in_rtx)) |
3cf2715d DE |
4387 | { |
4388 | /* Inside a SEQUENCE, we find insns. | |
4389 | Renumber just the patterns of these insns, | |
4390 | just as we do for the top-level insns. */ | |
4391 | leaf_renumber_regs_insn (PATTERN (in_rtx)); | |
4392 | return; | |
4393 | } | |
4394 | ||
4395 | format_ptr = GET_RTX_FORMAT (GET_CODE (in_rtx)); | |
4396 | ||
4397 | for (i = 0; i < GET_RTX_LENGTH (GET_CODE (in_rtx)); i++) | |
4398 | switch (*format_ptr++) | |
4399 | { | |
4400 | case 'e': | |
4401 | leaf_renumber_regs_insn (XEXP (in_rtx, i)); | |
4402 | break; | |
4403 | ||
4404 | case 'E': | |
4405 | if (NULL != XVEC (in_rtx, i)) | |
4406 | { | |
4407 | for (j = 0; j < XVECLEN (in_rtx, i); j++) | |
4408 | leaf_renumber_regs_insn (XVECEXP (in_rtx, i, j)); | |
4409 | } | |
4410 | break; | |
4411 | ||
4412 | case 'S': | |
4413 | case 's': | |
4414 | case '0': | |
4415 | case 'i': | |
4416 | case 'w': | |
4417 | case 'n': | |
4418 | case 'u': | |
4419 | break; | |
4420 | ||
4421 | default: | |
0bccc606 | 4422 | gcc_unreachable (); |
3cf2715d DE |
4423 | } |
4424 | } | |
4425 | #endif | |
ef330312 PB |
4426 | \f |
4427 | /* Turn the RTL into assembly. */ | |
c2924966 | 4428 | static unsigned int |
ef330312 PB |
4429 | rest_of_handle_final (void) |
4430 | { | |
4431 | rtx x; | |
4432 | const char *fnname; | |
4433 | ||
4434 | /* Get the function's name, as described by its RTL. This may be | |
4435 | different from the DECL_NAME name used in the source file. */ | |
4436 | ||
4437 | x = DECL_RTL (current_function_decl); | |
4438 | gcc_assert (MEM_P (x)); | |
4439 | x = XEXP (x, 0); | |
4440 | gcc_assert (GET_CODE (x) == SYMBOL_REF); | |
4441 | fnname = XSTR (x, 0); | |
4442 | ||
4443 | assemble_start_function (current_function_decl, fnname); | |
4444 | final_start_function (get_insns (), asm_out_file, optimize); | |
4445 | final (get_insns (), asm_out_file, optimize); | |
27c07cc5 RO |
4446 | if (flag_use_caller_save) |
4447 | collect_fn_hard_reg_usage (); | |
ef330312 PB |
4448 | final_end_function (); |
4449 | ||
182a0c11 RH |
4450 | /* The IA-64 ".handlerdata" directive must be issued before the ".endp" |
4451 | directive that closes the procedure descriptor. Similarly, for x64 SEH. | |
4452 | Otherwise it's not strictly necessary, but it doesn't hurt either. */ | |
22ba88ef | 4453 | output_function_exception_table (fnname); |
ef330312 PB |
4454 | |
4455 | assemble_end_function (current_function_decl, fnname); | |
4456 | ||
ef330312 PB |
4457 | user_defined_section_attribute = false; |
4458 | ||
6fb5fa3c DB |
4459 | /* Free up reg info memory. */ |
4460 | free_reg_info (); | |
4461 | ||
ef330312 PB |
4462 | if (! quiet_flag) |
4463 | fflush (asm_out_file); | |
4464 | ||
ef330312 PB |
4465 | /* Write DBX symbols if requested. */ |
4466 | ||
4467 | /* Note that for those inline functions where we don't initially | |
4468 | know for certain that we will be generating an out-of-line copy, | |
4469 | the first invocation of this routine (rest_of_compilation) will | |
4470 | skip over this code by doing a `goto exit_rest_of_compilation;'. | |
4471 | Later on, wrapup_global_declarations will (indirectly) call | |
4472 | rest_of_compilation again for those inline functions that need | |
4473 | to have out-of-line copies generated. During that call, we | |
4474 | *will* be routed past here. */ | |
4475 | ||
4476 | timevar_push (TV_SYMOUT); | |
725730f2 EB |
4477 | if (!DECL_IGNORED_P (current_function_decl)) |
4478 | debug_hooks->function_decl (current_function_decl); | |
ef330312 | 4479 | timevar_pop (TV_SYMOUT); |
6b20f353 DS |
4480 | |
4481 | /* Release the blocks that are linked to DECL_INITIAL() to free the memory. */ | |
4482 | DECL_INITIAL (current_function_decl) = error_mark_node; | |
4483 | ||
395a40e0 JH |
4484 | if (DECL_STATIC_CONSTRUCTOR (current_function_decl) |
4485 | && targetm.have_ctors_dtors) | |
4486 | targetm.asm_out.constructor (XEXP (DECL_RTL (current_function_decl), 0), | |
4487 | decl_init_priority_lookup | |
4488 | (current_function_decl)); | |
4489 | if (DECL_STATIC_DESTRUCTOR (current_function_decl) | |
4490 | && targetm.have_ctors_dtors) | |
4491 | targetm.asm_out.destructor (XEXP (DECL_RTL (current_function_decl), 0), | |
4492 | decl_fini_priority_lookup | |
4493 | (current_function_decl)); | |
c2924966 | 4494 | return 0; |
ef330312 PB |
4495 | } |
4496 | ||
27a4cd48 DM |
4497 | namespace { |
4498 | ||
4499 | const pass_data pass_data_final = | |
ef330312 | 4500 | { |
27a4cd48 DM |
4501 | RTL_PASS, /* type */ |
4502 | "final", /* name */ | |
4503 | OPTGROUP_NONE, /* optinfo_flags */ | |
27a4cd48 DM |
4504 | true, /* has_execute */ |
4505 | TV_FINAL, /* tv_id */ | |
4506 | 0, /* properties_required */ | |
4507 | 0, /* properties_provided */ | |
4508 | 0, /* properties_destroyed */ | |
4509 | 0, /* todo_flags_start */ | |
4510 | 0, /* todo_flags_finish */ | |
ef330312 PB |
4511 | }; |
4512 | ||
27a4cd48 DM |
4513 | class pass_final : public rtl_opt_pass |
4514 | { | |
4515 | public: | |
c3284718 RS |
4516 | pass_final (gcc::context *ctxt) |
4517 | : rtl_opt_pass (pass_data_final, ctxt) | |
27a4cd48 DM |
4518 | {} |
4519 | ||
4520 | /* opt_pass methods: */ | |
be55bfe6 | 4521 | virtual unsigned int execute (function *) { return rest_of_handle_final (); } |
27a4cd48 DM |
4522 | |
4523 | }; // class pass_final | |
4524 | ||
4525 | } // anon namespace | |
4526 | ||
4527 | rtl_opt_pass * | |
4528 | make_pass_final (gcc::context *ctxt) | |
4529 | { | |
4530 | return new pass_final (ctxt); | |
4531 | } | |
4532 | ||
ef330312 | 4533 | |
c2924966 | 4534 | static unsigned int |
ef330312 PB |
4535 | rest_of_handle_shorten_branches (void) |
4536 | { | |
4537 | /* Shorten branches. */ | |
4538 | shorten_branches (get_insns ()); | |
c2924966 | 4539 | return 0; |
ef330312 | 4540 | } |
b0efb46b | 4541 | |
27a4cd48 DM |
4542 | namespace { |
4543 | ||
4544 | const pass_data pass_data_shorten_branches = | |
ef330312 | 4545 | { |
27a4cd48 DM |
4546 | RTL_PASS, /* type */ |
4547 | "shorten", /* name */ | |
4548 | OPTGROUP_NONE, /* optinfo_flags */ | |
27a4cd48 DM |
4549 | true, /* has_execute */ |
4550 | TV_SHORTEN_BRANCH, /* tv_id */ | |
4551 | 0, /* properties_required */ | |
4552 | 0, /* properties_provided */ | |
4553 | 0, /* properties_destroyed */ | |
4554 | 0, /* todo_flags_start */ | |
4555 | 0, /* todo_flags_finish */ | |
ef330312 PB |
4556 | }; |
4557 | ||
27a4cd48 DM |
4558 | class pass_shorten_branches : public rtl_opt_pass |
4559 | { | |
4560 | public: | |
c3284718 RS |
4561 | pass_shorten_branches (gcc::context *ctxt) |
4562 | : rtl_opt_pass (pass_data_shorten_branches, ctxt) | |
27a4cd48 DM |
4563 | {} |
4564 | ||
4565 | /* opt_pass methods: */ | |
be55bfe6 TS |
4566 | virtual unsigned int execute (function *) |
4567 | { | |
4568 | return rest_of_handle_shorten_branches (); | |
4569 | } | |
27a4cd48 DM |
4570 | |
4571 | }; // class pass_shorten_branches | |
4572 | ||
4573 | } // anon namespace | |
4574 | ||
4575 | rtl_opt_pass * | |
4576 | make_pass_shorten_branches (gcc::context *ctxt) | |
4577 | { | |
4578 | return new pass_shorten_branches (ctxt); | |
4579 | } | |
4580 | ||
ef330312 | 4581 | |
c2924966 | 4582 | static unsigned int |
ef330312 PB |
4583 | rest_of_clean_state (void) |
4584 | { | |
4585 | rtx insn, next; | |
2153915d AO |
4586 | FILE *final_output = NULL; |
4587 | int save_unnumbered = flag_dump_unnumbered; | |
4588 | int save_noaddr = flag_dump_noaddr; | |
4589 | ||
4590 | if (flag_dump_final_insns) | |
4591 | { | |
4592 | final_output = fopen (flag_dump_final_insns, "a"); | |
4593 | if (!final_output) | |
4594 | { | |
7ca92787 JM |
4595 | error ("could not open final insn dump file %qs: %m", |
4596 | flag_dump_final_insns); | |
2153915d AO |
4597 | flag_dump_final_insns = NULL; |
4598 | } | |
4599 | else | |
4600 | { | |
2153915d | 4601 | flag_dump_noaddr = flag_dump_unnumbered = 1; |
c7ba0cfb RG |
4602 | if (flag_compare_debug_opt || flag_compare_debug) |
4603 | dump_flags |= TDF_NOUID; | |
6d8402ac AO |
4604 | dump_function_header (final_output, current_function_decl, |
4605 | dump_flags); | |
6ca5d1f6 | 4606 | final_insns_dump_p = true; |
2153915d AO |
4607 | |
4608 | for (insn = get_insns (); insn; insn = NEXT_INSN (insn)) | |
4609 | if (LABEL_P (insn)) | |
4610 | INSN_UID (insn) = CODE_LABEL_NUMBER (insn); | |
4611 | else | |
a59d15cf AO |
4612 | { |
4613 | if (NOTE_P (insn)) | |
4614 | set_block_for_insn (insn, NULL); | |
4615 | INSN_UID (insn) = 0; | |
4616 | } | |
2153915d AO |
4617 | } |
4618 | } | |
ef330312 PB |
4619 | |
4620 | /* It is very important to decompose the RTL instruction chain here: | |
4621 | debug information keeps pointing into CODE_LABEL insns inside the function | |
4622 | body. If these remain pointing to the other insns, we end up preserving | |
4623 | whole RTL chain and attached detailed debug info in memory. */ | |
4624 | for (insn = get_insns (); insn; insn = next) | |
4625 | { | |
4626 | next = NEXT_INSN (insn); | |
4627 | NEXT_INSN (insn) = NULL; | |
4628 | PREV_INSN (insn) = NULL; | |
2153915d AO |
4629 | |
4630 | if (final_output | |
4631 | && (!NOTE_P (insn) || | |
4632 | (NOTE_KIND (insn) != NOTE_INSN_VAR_LOCATION | |
2b1c5433 | 4633 | && NOTE_KIND (insn) != NOTE_INSN_CALL_ARG_LOCATION |
2153915d | 4634 | && NOTE_KIND (insn) != NOTE_INSN_BLOCK_BEG |
5619e52c JJ |
4635 | && NOTE_KIND (insn) != NOTE_INSN_BLOCK_END |
4636 | && NOTE_KIND (insn) != NOTE_INSN_DELETED_DEBUG_LABEL))) | |
2153915d | 4637 | print_rtl_single (final_output, insn); |
2153915d AO |
4638 | } |
4639 | ||
4640 | if (final_output) | |
4641 | { | |
4642 | flag_dump_noaddr = save_noaddr; | |
4643 | flag_dump_unnumbered = save_unnumbered; | |
6ca5d1f6 | 4644 | final_insns_dump_p = false; |
2153915d AO |
4645 | |
4646 | if (fclose (final_output)) | |
4647 | { | |
7ca92787 JM |
4648 | error ("could not close final insn dump file %qs: %m", |
4649 | flag_dump_final_insns); | |
2153915d AO |
4650 | flag_dump_final_insns = NULL; |
4651 | } | |
ef330312 PB |
4652 | } |
4653 | ||
4654 | /* In case the function was not output, | |
4655 | don't leave any temporary anonymous types | |
4656 | queued up for sdb output. */ | |
4657 | #ifdef SDB_DEBUGGING_INFO | |
4658 | if (write_symbols == SDB_DEBUG) | |
4659 | sdbout_types (NULL_TREE); | |
4660 | #endif | |
4661 | ||
5f39ad47 | 4662 | flag_rerun_cse_after_global_opts = 0; |
ef330312 PB |
4663 | reload_completed = 0; |
4664 | epilogue_completed = 0; | |
23249ac4 DB |
4665 | #ifdef STACK_REGS |
4666 | regstack_completed = 0; | |
4667 | #endif | |
ef330312 PB |
4668 | |
4669 | /* Clear out the insn_length contents now that they are no | |
4670 | longer valid. */ | |
4671 | init_insn_lengths (); | |
4672 | ||
4673 | /* Show no temporary slots allocated. */ | |
4674 | init_temp_slots (); | |
4675 | ||
ef330312 PB |
4676 | free_bb_for_insn (); |
4677 | ||
55b34b5f RG |
4678 | delete_tree_ssa (); |
4679 | ||
051f8cc6 JH |
4680 | /* We can reduce stack alignment on call site only when we are sure that |
4681 | the function body just produced will be actually used in the final | |
4682 | executable. */ | |
4683 | if (decl_binds_to_current_def_p (current_function_decl)) | |
ef330312 | 4684 | { |
17b29c0a | 4685 | unsigned int pref = crtl->preferred_stack_boundary; |
cb91fab0 JH |
4686 | if (crtl->stack_alignment_needed > crtl->preferred_stack_boundary) |
4687 | pref = crtl->stack_alignment_needed; | |
ef330312 PB |
4688 | cgraph_rtl_info (current_function_decl)->preferred_incoming_stack_boundary |
4689 | = pref; | |
4690 | } | |
4691 | ||
4692 | /* Make sure volatile mem refs aren't considered valid operands for | |
4693 | arithmetic insns. We must call this here if this is a nested inline | |
4694 | function, since the above code leaves us in the init_recog state, | |
4695 | and the function context push/pop code does not save/restore volatile_ok. | |
4696 | ||
4697 | ??? Maybe it isn't necessary for expand_start_function to call this | |
4698 | anymore if we do it here? */ | |
4699 | ||
4700 | init_recog_no_volatile (); | |
4701 | ||
4702 | /* We're done with this function. Free up memory if we can. */ | |
4703 | free_after_parsing (cfun); | |
4704 | free_after_compilation (cfun); | |
c2924966 | 4705 | return 0; |
ef330312 PB |
4706 | } |
4707 | ||
27a4cd48 DM |
4708 | namespace { |
4709 | ||
4710 | const pass_data pass_data_clean_state = | |
ef330312 | 4711 | { |
27a4cd48 DM |
4712 | RTL_PASS, /* type */ |
4713 | "*clean_state", /* name */ | |
4714 | OPTGROUP_NONE, /* optinfo_flags */ | |
27a4cd48 DM |
4715 | true, /* has_execute */ |
4716 | TV_FINAL, /* tv_id */ | |
4717 | 0, /* properties_required */ | |
4718 | 0, /* properties_provided */ | |
4719 | PROP_rtl, /* properties_destroyed */ | |
4720 | 0, /* todo_flags_start */ | |
4721 | 0, /* todo_flags_finish */ | |
ef330312 | 4722 | }; |
27a4cd48 DM |
4723 | |
4724 | class pass_clean_state : public rtl_opt_pass | |
4725 | { | |
4726 | public: | |
c3284718 RS |
4727 | pass_clean_state (gcc::context *ctxt) |
4728 | : rtl_opt_pass (pass_data_clean_state, ctxt) | |
27a4cd48 DM |
4729 | {} |
4730 | ||
4731 | /* opt_pass methods: */ | |
be55bfe6 TS |
4732 | virtual unsigned int execute (function *) |
4733 | { | |
4734 | return rest_of_clean_state (); | |
4735 | } | |
27a4cd48 DM |
4736 | |
4737 | }; // class pass_clean_state | |
4738 | ||
4739 | } // anon namespace | |
4740 | ||
4741 | rtl_opt_pass * | |
4742 | make_pass_clean_state (gcc::context *ctxt) | |
4743 | { | |
4744 | return new pass_clean_state (ctxt); | |
4745 | } | |
27c07cc5 RO |
4746 | |
4747 | /* Collect hard register usage for the current function. */ | |
4748 | ||
4749 | static void | |
4750 | collect_fn_hard_reg_usage (void) | |
4751 | { | |
4752 | rtx insn; | |
4b29b965 | 4753 | #ifdef STACK_REGS |
27c07cc5 | 4754 | int i; |
4b29b965 | 4755 | #endif |
27c07cc5 RO |
4756 | struct cgraph_rtl_info *node; |
4757 | ||
4758 | /* ??? To be removed when all the ports have been fixed. */ | |
4759 | if (!targetm.call_fusage_contains_non_callee_clobbers) | |
4760 | return; | |
4761 | ||
4762 | node = cgraph_rtl_info (current_function_decl); | |
4763 | gcc_assert (node != NULL); | |
4764 | ||
4765 | for (insn = get_insns (); insn != NULL_RTX; insn = next_insn (insn)) | |
4766 | { | |
4767 | HARD_REG_SET insn_used_regs; | |
4768 | ||
4769 | if (!NONDEBUG_INSN_P (insn)) | |
4770 | continue; | |
4771 | ||
4772 | find_all_hard_reg_sets (insn, &insn_used_regs, false); | |
4773 | ||
4774 | if (CALL_P (insn) | |
4775 | && !get_call_reg_set_usage (insn, &insn_used_regs, call_used_reg_set)) | |
4776 | { | |
4777 | CLEAR_HARD_REG_SET (node->function_used_regs); | |
4778 | return; | |
4779 | } | |
4780 | ||
4781 | IOR_HARD_REG_SET (node->function_used_regs, insn_used_regs); | |
4782 | } | |
4783 | ||
4784 | /* Be conservative - mark fixed and global registers as used. */ | |
4785 | IOR_HARD_REG_SET (node->function_used_regs, fixed_reg_set); | |
27c07cc5 RO |
4786 | |
4787 | #ifdef STACK_REGS | |
4788 | /* Handle STACK_REGS conservatively, since the df-framework does not | |
4789 | provide accurate information for them. */ | |
4790 | ||
4791 | for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++) | |
4792 | SET_HARD_REG_BIT (node->function_used_regs, i); | |
4793 | #endif | |
4794 | ||
4795 | node->function_used_regs_valid = 1; | |
4796 | } | |
4797 | ||
4798 | /* Get the declaration of the function called by INSN. */ | |
4799 | ||
4800 | static tree | |
4801 | get_call_fndecl (rtx insn) | |
4802 | { | |
4803 | rtx note, datum; | |
4804 | ||
4805 | note = find_reg_note (insn, REG_CALL_DECL, NULL_RTX); | |
4806 | if (note == NULL_RTX) | |
4807 | return NULL_TREE; | |
4808 | ||
4809 | datum = XEXP (note, 0); | |
4810 | if (datum != NULL_RTX) | |
4811 | return SYMBOL_REF_DECL (datum); | |
4812 | ||
4813 | return NULL_TREE; | |
4814 | } | |
4815 | ||
4816 | /* Return the cgraph_rtl_info of the function called by INSN. Returns NULL for | |
4817 | call targets that can be overwritten. */ | |
4818 | ||
4819 | static struct cgraph_rtl_info * | |
4820 | get_call_cgraph_rtl_info (rtx insn) | |
4821 | { | |
4822 | tree fndecl; | |
4823 | ||
4824 | if (insn == NULL_RTX) | |
4825 | return NULL; | |
4826 | ||
4827 | fndecl = get_call_fndecl (insn); | |
4828 | if (fndecl == NULL_TREE | |
4829 | || !decl_binds_to_current_def_p (fndecl)) | |
4830 | return NULL; | |
4831 | ||
4832 | return cgraph_rtl_info (fndecl); | |
4833 | } | |
4834 | ||
4835 | /* Find hard registers used by function call instruction INSN, and return them | |
4836 | in REG_SET. Return DEFAULT_SET in REG_SET if not found. */ | |
4837 | ||
4838 | bool | |
4839 | get_call_reg_set_usage (rtx insn, HARD_REG_SET *reg_set, | |
4840 | HARD_REG_SET default_set) | |
4841 | { | |
4842 | if (flag_use_caller_save) | |
4843 | { | |
4844 | struct cgraph_rtl_info *node = get_call_cgraph_rtl_info (insn); | |
4845 | if (node != NULL | |
4846 | && node->function_used_regs_valid) | |
4847 | { | |
4848 | COPY_HARD_REG_SET (*reg_set, node->function_used_regs); | |
4849 | AND_HARD_REG_SET (*reg_set, default_set); | |
4850 | return true; | |
4851 | } | |
4852 | } | |
4853 | ||
4854 | COPY_HARD_REG_SET (*reg_set, default_set); | |
4855 | return false; | |
4856 | } |