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3cf2715d | 1 | /* Convert RTL to assembler code and output it, for GNU compiler. |
3b708058 | 2 | Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, |
6ca5d1f6 | 3 | 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010 |
17ac08e2 | 4 | Free Software Foundation, Inc. |
3cf2715d | 5 | |
1322177d | 6 | This file is part of GCC. |
3cf2715d | 7 | |
1322177d LB |
8 | GCC is free software; you can redistribute it and/or modify it under |
9 | the terms of the GNU General Public License as published by the Free | |
9dcd6f09 | 10 | Software Foundation; either version 3, or (at your option) any later |
1322177d | 11 | version. |
3cf2715d | 12 | |
1322177d LB |
13 | GCC is distributed in the hope that it will be useful, but WITHOUT ANY |
14 | WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
15 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
16 | for more details. | |
3cf2715d DE |
17 | |
18 | You should have received a copy of the GNU General Public License | |
9dcd6f09 NC |
19 | along with GCC; see the file COPYING3. If not see |
20 | <http://www.gnu.org/licenses/>. */ | |
3cf2715d | 21 | |
3cf2715d DE |
22 | /* This is the final pass of the compiler. |
23 | It looks at the rtl code for a function and outputs assembler code. | |
24 | ||
25 | Call `final_start_function' to output the assembler code for function entry, | |
26 | `final' to output assembler code for some RTL code, | |
27 | `final_end_function' to output assembler code for function exit. | |
28 | If a function is compiled in several pieces, each piece is | |
29 | output separately with `final'. | |
30 | ||
31 | Some optimizations are also done at this level. | |
32 | Move instructions that were made unnecessary by good register allocation | |
33 | are detected and omitted from the output. (Though most of these | |
34 | are removed by the last jump pass.) | |
35 | ||
36 | Instructions to set the condition codes are omitted when it can be | |
37 | seen that the condition codes already had the desired values. | |
38 | ||
39 | In some cases it is sufficient if the inherited condition codes | |
40 | have related values, but this may require the following insn | |
41 | (the one that tests the condition codes) to be modified. | |
42 | ||
43 | The code for the function prologue and epilogue are generated | |
08c148a8 NB |
44 | directly in assembler by the target functions function_prologue and |
45 | function_epilogue. Those instructions never exist as rtl. */ | |
3cf2715d DE |
46 | |
47 | #include "config.h" | |
670ee920 | 48 | #include "system.h" |
4977bab6 ZW |
49 | #include "coretypes.h" |
50 | #include "tm.h" | |
3cf2715d DE |
51 | |
52 | #include "tree.h" | |
53 | #include "rtl.h" | |
6baf1cc8 | 54 | #include "tm_p.h" |
3cf2715d DE |
55 | #include "regs.h" |
56 | #include "insn-config.h" | |
3cf2715d | 57 | #include "insn-attr.h" |
3cf2715d DE |
58 | #include "recog.h" |
59 | #include "conditions.h" | |
60 | #include "flags.h" | |
61 | #include "real.h" | |
62 | #include "hard-reg-set.h" | |
3cf2715d | 63 | #include "output.h" |
3d195391 | 64 | #include "except.h" |
49ad7cfa | 65 | #include "function.h" |
10f0ad3d | 66 | #include "toplev.h" |
d6f4ec51 | 67 | #include "reload.h" |
ab87f8c8 | 68 | #include "intl.h" |
be1bb652 | 69 | #include "basic-block.h" |
08c148a8 | 70 | #include "target.h" |
a5a42b92 | 71 | #include "debug.h" |
49d801d3 | 72 | #include "expr.h" |
ba4f7968 | 73 | #include "cfglayout.h" |
ef330312 | 74 | #include "tree-pass.h" |
55b34b5f | 75 | #include "tree-flow.h" |
ef330312 PB |
76 | #include "timevar.h" |
77 | #include "cgraph.h" | |
78 | #include "coverage.h" | |
6fb5fa3c | 79 | #include "df.h" |
294340bf | 80 | #include "vecprim.h" |
c8aea42c | 81 | #include "ggc.h" |
edbed3d3 JH |
82 | #include "cfgloop.h" |
83 | #include "params.h" | |
3cf2715d | 84 | |
440aabf8 NB |
85 | #ifdef XCOFF_DEBUGGING_INFO |
86 | #include "xcoffout.h" /* Needed for external data | |
87 | declarations for e.g. AIX 4.x. */ | |
88 | #endif | |
89 | ||
76ead72b RL |
90 | #if defined (DWARF2_UNWIND_INFO) || defined (DWARF2_DEBUGGING_INFO) |
91 | #include "dwarf2out.h" | |
92 | #endif | |
93 | ||
6a08f7b3 DP |
94 | #ifdef DBX_DEBUGGING_INFO |
95 | #include "dbxout.h" | |
96 | #endif | |
97 | ||
ce82daed DB |
98 | #ifdef SDB_DEBUGGING_INFO |
99 | #include "sdbout.h" | |
100 | #endif | |
101 | ||
3cf2715d DE |
102 | /* If we aren't using cc0, CC_STATUS_INIT shouldn't exist. So define a |
103 | null default for it to save conditionalization later. */ | |
104 | #ifndef CC_STATUS_INIT | |
105 | #define CC_STATUS_INIT | |
106 | #endif | |
107 | ||
108 | /* How to start an assembler comment. */ | |
109 | #ifndef ASM_COMMENT_START | |
110 | #define ASM_COMMENT_START ";#" | |
111 | #endif | |
112 | ||
113 | /* Is the given character a logical line separator for the assembler? */ | |
114 | #ifndef IS_ASM_LOGICAL_LINE_SEPARATOR | |
980d8882 | 115 | #define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) ((C) == ';') |
3cf2715d DE |
116 | #endif |
117 | ||
75197b37 BS |
118 | #ifndef JUMP_TABLES_IN_TEXT_SECTION |
119 | #define JUMP_TABLES_IN_TEXT_SECTION 0 | |
120 | #endif | |
121 | ||
589fe865 DJ |
122 | /* Bitflags used by final_scan_insn. */ |
123 | #define SEEN_BB 1 | |
124 | #define SEEN_NOTE 2 | |
125 | #define SEEN_EMITTED 4 | |
126 | ||
3cf2715d | 127 | /* Last insn processed by final_scan_insn. */ |
b1a9f6a0 RH |
128 | static rtx debug_insn; |
129 | rtx current_output_insn; | |
3cf2715d DE |
130 | |
131 | /* Line number of last NOTE. */ | |
132 | static int last_linenum; | |
133 | ||
6c52e687 CC |
134 | /* Last discriminator written to assembly. */ |
135 | static int last_discriminator; | |
136 | ||
137 | /* Discriminator of current block. */ | |
138 | static int discriminator; | |
139 | ||
eac40081 RK |
140 | /* Highest line number in current block. */ |
141 | static int high_block_linenum; | |
142 | ||
143 | /* Likewise for function. */ | |
144 | static int high_function_linenum; | |
145 | ||
3cf2715d | 146 | /* Filename of last NOTE. */ |
3cce094d | 147 | static const char *last_filename; |
3cf2715d | 148 | |
d752cfdb JJ |
149 | /* Override filename and line number. */ |
150 | static const char *override_filename; | |
151 | static int override_linenum; | |
152 | ||
b8176fe4 EB |
153 | /* Whether to force emission of a line note before the next insn. */ |
154 | static bool force_source_line = false; | |
b0efb46b | 155 | |
5f2f0edd | 156 | extern const int length_unit_log; /* This is defined in insn-attrtab.c. */ |
fc470718 | 157 | |
3cf2715d | 158 | /* Nonzero while outputting an `asm' with operands. |
535a42b1 | 159 | This means that inconsistencies are the user's fault, so don't die. |
3cf2715d | 160 | The precise value is the insn being output, to pass to error_for_asm. */ |
c8b94768 | 161 | rtx this_is_asm_operands; |
3cf2715d DE |
162 | |
163 | /* Number of operands of this insn, for an `asm' with operands. */ | |
22bf4422 | 164 | static unsigned int insn_noperands; |
3cf2715d DE |
165 | |
166 | /* Compare optimization flag. */ | |
167 | ||
168 | static rtx last_ignored_compare = 0; | |
169 | ||
3cf2715d DE |
170 | /* Assign a unique number to each insn that is output. |
171 | This can be used to generate unique local labels. */ | |
172 | ||
173 | static int insn_counter = 0; | |
174 | ||
175 | #ifdef HAVE_cc0 | |
176 | /* This variable contains machine-dependent flags (defined in tm.h) | |
177 | set and examined by output routines | |
178 | that describe how to interpret the condition codes properly. */ | |
179 | ||
180 | CC_STATUS cc_status; | |
181 | ||
182 | /* During output of an insn, this contains a copy of cc_status | |
183 | from before the insn. */ | |
184 | ||
185 | CC_STATUS cc_prev_status; | |
186 | #endif | |
187 | ||
18c038b9 | 188 | /* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */ |
3cf2715d DE |
189 | |
190 | static int block_depth; | |
191 | ||
192 | /* Nonzero if have enabled APP processing of our assembler output. */ | |
193 | ||
194 | static int app_on; | |
195 | ||
196 | /* If we are outputting an insn sequence, this contains the sequence rtx. | |
197 | Zero otherwise. */ | |
198 | ||
199 | rtx final_sequence; | |
200 | ||
201 | #ifdef ASSEMBLER_DIALECT | |
202 | ||
203 | /* Number of the assembler dialect to use, starting at 0. */ | |
204 | static int dialect_number; | |
205 | #endif | |
206 | ||
afe48e06 RH |
207 | /* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */ |
208 | rtx current_insn_predicate; | |
afe48e06 | 209 | |
6ca5d1f6 JJ |
210 | /* True if printing into -fdump-final-insns= dump. */ |
211 | bool final_insns_dump_p; | |
212 | ||
1d300e19 | 213 | #ifdef HAVE_ATTR_length |
6cf9ac28 AJ |
214 | static int asm_insn_count (rtx); |
215 | #endif | |
216 | static void profile_function (FILE *); | |
217 | static void profile_after_prologue (FILE *); | |
ed5ef2e4 | 218 | static bool notice_source_line (rtx, bool *); |
6fb5fa3c | 219 | static rtx walk_alter_subreg (rtx *, bool *); |
6cf9ac28 AJ |
220 | static void output_asm_name (void); |
221 | static void output_alternate_entry_point (FILE *, rtx); | |
222 | static tree get_mem_expr_from_op (rtx, int *); | |
223 | static void output_asm_operand_names (rtx *, int *, int); | |
224 | static void output_operand (rtx, int); | |
e9a25f70 | 225 | #ifdef LEAF_REGISTERS |
6cf9ac28 | 226 | static void leaf_renumber_regs (rtx); |
e9a25f70 JL |
227 | #endif |
228 | #ifdef HAVE_cc0 | |
6cf9ac28 | 229 | static int alter_cond (rtx); |
e9a25f70 | 230 | #endif |
ca3075bd | 231 | #ifndef ADDR_VEC_ALIGN |
6cf9ac28 | 232 | static int final_addr_vec_align (rtx); |
ca3075bd | 233 | #endif |
7bdb32b9 | 234 | #ifdef HAVE_ATTR_length |
6cf9ac28 | 235 | static int align_fuzz (rtx, rtx, int, unsigned); |
7bdb32b9 | 236 | #endif |
3cf2715d DE |
237 | \f |
238 | /* Initialize data in final at the beginning of a compilation. */ | |
239 | ||
240 | void | |
6cf9ac28 | 241 | init_final (const char *filename ATTRIBUTE_UNUSED) |
3cf2715d | 242 | { |
3cf2715d | 243 | app_on = 0; |
3cf2715d DE |
244 | final_sequence = 0; |
245 | ||
246 | #ifdef ASSEMBLER_DIALECT | |
247 | dialect_number = ASSEMBLER_DIALECT; | |
248 | #endif | |
249 | } | |
250 | ||
08c148a8 | 251 | /* Default target function prologue and epilogue assembler output. |
b9f22704 | 252 | |
08c148a8 NB |
253 | If not overridden for epilogue code, then the function body itself |
254 | contains return instructions wherever needed. */ | |
255 | void | |
6cf9ac28 AJ |
256 | default_function_pro_epilogue (FILE *file ATTRIBUTE_UNUSED, |
257 | HOST_WIDE_INT size ATTRIBUTE_UNUSED) | |
08c148a8 NB |
258 | { |
259 | } | |
260 | ||
b4c25db2 NB |
261 | /* Default target hook that outputs nothing to a stream. */ |
262 | void | |
6cf9ac28 | 263 | no_asm_to_stream (FILE *file ATTRIBUTE_UNUSED) |
b4c25db2 NB |
264 | { |
265 | } | |
266 | ||
3cf2715d DE |
267 | /* Enable APP processing of subsequent output. |
268 | Used before the output from an `asm' statement. */ | |
269 | ||
270 | void | |
6cf9ac28 | 271 | app_enable (void) |
3cf2715d DE |
272 | { |
273 | if (! app_on) | |
274 | { | |
51723711 | 275 | fputs (ASM_APP_ON, asm_out_file); |
3cf2715d DE |
276 | app_on = 1; |
277 | } | |
278 | } | |
279 | ||
280 | /* Disable APP processing of subsequent output. | |
281 | Called from varasm.c before most kinds of output. */ | |
282 | ||
283 | void | |
6cf9ac28 | 284 | app_disable (void) |
3cf2715d DE |
285 | { |
286 | if (app_on) | |
287 | { | |
51723711 | 288 | fputs (ASM_APP_OFF, asm_out_file); |
3cf2715d DE |
289 | app_on = 0; |
290 | } | |
291 | } | |
292 | \f | |
f5d927c0 | 293 | /* Return the number of slots filled in the current |
3cf2715d DE |
294 | delayed branch sequence (we don't count the insn needing the |
295 | delay slot). Zero if not in a delayed branch sequence. */ | |
296 | ||
297 | #ifdef DELAY_SLOTS | |
298 | int | |
6cf9ac28 | 299 | dbr_sequence_length (void) |
3cf2715d DE |
300 | { |
301 | if (final_sequence != 0) | |
302 | return XVECLEN (final_sequence, 0) - 1; | |
303 | else | |
304 | return 0; | |
305 | } | |
306 | #endif | |
307 | \f | |
308 | /* The next two pages contain routines used to compute the length of an insn | |
309 | and to shorten branches. */ | |
310 | ||
311 | /* Arrays for insn lengths, and addresses. The latter is referenced by | |
312 | `insn_current_length'. */ | |
313 | ||
addd7df6 | 314 | static int *insn_lengths; |
9d98a694 | 315 | |
294340bf | 316 | VEC(int,heap) *insn_addresses_; |
3cf2715d | 317 | |
ea3cbda5 R |
318 | /* Max uid for which the above arrays are valid. */ |
319 | static int insn_lengths_max_uid; | |
320 | ||
3cf2715d DE |
321 | /* Address of insn being processed. Used by `insn_current_length'. */ |
322 | int insn_current_address; | |
323 | ||
fc470718 R |
324 | /* Address of insn being processed in previous iteration. */ |
325 | int insn_last_address; | |
326 | ||
d6a7951f | 327 | /* known invariant alignment of insn being processed. */ |
fc470718 R |
328 | int insn_current_align; |
329 | ||
95707627 R |
330 | /* After shorten_branches, for any insn, uid_align[INSN_UID (insn)] |
331 | gives the next following alignment insn that increases the known | |
332 | alignment, or NULL_RTX if there is no such insn. | |
333 | For any alignment obtained this way, we can again index uid_align with | |
334 | its uid to obtain the next following align that in turn increases the | |
335 | alignment, till we reach NULL_RTX; the sequence obtained this way | |
336 | for each insn we'll call the alignment chain of this insn in the following | |
337 | comments. */ | |
338 | ||
f5d927c0 KH |
339 | struct label_alignment |
340 | { | |
9e423e6d JW |
341 | short alignment; |
342 | short max_skip; | |
343 | }; | |
344 | ||
345 | static rtx *uid_align; | |
346 | static int *uid_shuid; | |
347 | static struct label_alignment *label_align; | |
95707627 | 348 | |
3cf2715d DE |
349 | /* Indicate that branch shortening hasn't yet been done. */ |
350 | ||
351 | void | |
6cf9ac28 | 352 | init_insn_lengths (void) |
3cf2715d | 353 | { |
95707627 R |
354 | if (uid_shuid) |
355 | { | |
356 | free (uid_shuid); | |
357 | uid_shuid = 0; | |
358 | } | |
359 | if (insn_lengths) | |
360 | { | |
361 | free (insn_lengths); | |
362 | insn_lengths = 0; | |
ea3cbda5 | 363 | insn_lengths_max_uid = 0; |
95707627 | 364 | } |
9d98a694 AO |
365 | #ifdef HAVE_ATTR_length |
366 | INSN_ADDRESSES_FREE (); | |
367 | #endif | |
95707627 R |
368 | if (uid_align) |
369 | { | |
370 | free (uid_align); | |
371 | uid_align = 0; | |
372 | } | |
3cf2715d DE |
373 | } |
374 | ||
375 | /* Obtain the current length of an insn. If branch shortening has been done, | |
6fc0bb99 | 376 | get its actual length. Otherwise, use FALLBACK_FN to calculate the |
070a7956 R |
377 | length. */ |
378 | static inline int | |
379 | get_attr_length_1 (rtx insn ATTRIBUTE_UNUSED, | |
380 | int (*fallback_fn) (rtx) ATTRIBUTE_UNUSED) | |
3cf2715d DE |
381 | { |
382 | #ifdef HAVE_ATTR_length | |
383 | rtx body; | |
384 | int i; | |
385 | int length = 0; | |
386 | ||
ea3cbda5 | 387 | if (insn_lengths_max_uid > INSN_UID (insn)) |
3cf2715d DE |
388 | return insn_lengths[INSN_UID (insn)]; |
389 | else | |
390 | switch (GET_CODE (insn)) | |
391 | { | |
392 | case NOTE: | |
393 | case BARRIER: | |
394 | case CODE_LABEL: | |
b5b8b0ac | 395 | case DEBUG_INSN: |
3cf2715d DE |
396 | return 0; |
397 | ||
398 | case CALL_INSN: | |
070a7956 | 399 | length = fallback_fn (insn); |
3cf2715d DE |
400 | break; |
401 | ||
402 | case JUMP_INSN: | |
403 | body = PATTERN (insn); | |
dd3f0101 | 404 | if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC) |
3cf2715d | 405 | { |
fc470718 R |
406 | /* Alignment is machine-dependent and should be handled by |
407 | ADDR_VEC_ALIGN. */ | |
3cf2715d DE |
408 | } |
409 | else | |
070a7956 | 410 | length = fallback_fn (insn); |
3cf2715d DE |
411 | break; |
412 | ||
413 | case INSN: | |
414 | body = PATTERN (insn); | |
415 | if (GET_CODE (body) == USE || GET_CODE (body) == CLOBBER) | |
416 | return 0; | |
417 | ||
418 | else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0) | |
070a7956 | 419 | length = asm_insn_count (body) * fallback_fn (insn); |
3cf2715d DE |
420 | else if (GET_CODE (body) == SEQUENCE) |
421 | for (i = 0; i < XVECLEN (body, 0); i++) | |
47d268d0 | 422 | length += get_attr_length_1 (XVECEXP (body, 0, i), fallback_fn); |
3cf2715d | 423 | else |
070a7956 | 424 | length = fallback_fn (insn); |
e9a25f70 JL |
425 | break; |
426 | ||
427 | default: | |
428 | break; | |
3cf2715d DE |
429 | } |
430 | ||
431 | #ifdef ADJUST_INSN_LENGTH | |
432 | ADJUST_INSN_LENGTH (insn, length); | |
433 | #endif | |
434 | return length; | |
435 | #else /* not HAVE_ATTR_length */ | |
436 | return 0; | |
a9305dcb R |
437 | #define insn_default_length 0 |
438 | #define insn_min_length 0 | |
3cf2715d DE |
439 | #endif /* not HAVE_ATTR_length */ |
440 | } | |
070a7956 R |
441 | |
442 | /* Obtain the current length of an insn. If branch shortening has been done, | |
443 | get its actual length. Otherwise, get its maximum length. */ | |
444 | int | |
445 | get_attr_length (rtx insn) | |
446 | { | |
447 | return get_attr_length_1 (insn, insn_default_length); | |
448 | } | |
449 | ||
450 | /* Obtain the current length of an insn. If branch shortening has been done, | |
451 | get its actual length. Otherwise, get its minimum length. */ | |
452 | int | |
453 | get_attr_min_length (rtx insn) | |
454 | { | |
455 | return get_attr_length_1 (insn, insn_min_length); | |
456 | } | |
3cf2715d | 457 | \f |
fc470718 R |
458 | /* Code to handle alignment inside shorten_branches. */ |
459 | ||
460 | /* Here is an explanation how the algorithm in align_fuzz can give | |
461 | proper results: | |
462 | ||
463 | Call a sequence of instructions beginning with alignment point X | |
464 | and continuing until the next alignment point `block X'. When `X' | |
f5d927c0 | 465 | is used in an expression, it means the alignment value of the |
fc470718 | 466 | alignment point. |
f5d927c0 | 467 | |
fc470718 R |
468 | Call the distance between the start of the first insn of block X, and |
469 | the end of the last insn of block X `IX', for the `inner size of X'. | |
470 | This is clearly the sum of the instruction lengths. | |
f5d927c0 | 471 | |
fc470718 R |
472 | Likewise with the next alignment-delimited block following X, which we |
473 | shall call block Y. | |
f5d927c0 | 474 | |
fc470718 R |
475 | Call the distance between the start of the first insn of block X, and |
476 | the start of the first insn of block Y `OX', for the `outer size of X'. | |
f5d927c0 | 477 | |
fc470718 | 478 | The estimated padding is then OX - IX. |
f5d927c0 | 479 | |
fc470718 | 480 | OX can be safely estimated as |
f5d927c0 | 481 | |
fc470718 R |
482 | if (X >= Y) |
483 | OX = round_up(IX, Y) | |
484 | else | |
485 | OX = round_up(IX, X) + Y - X | |
f5d927c0 | 486 | |
fc470718 R |
487 | Clearly est(IX) >= real(IX), because that only depends on the |
488 | instruction lengths, and those being overestimated is a given. | |
f5d927c0 | 489 | |
fc470718 R |
490 | Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so |
491 | we needn't worry about that when thinking about OX. | |
f5d927c0 | 492 | |
fc470718 R |
493 | When X >= Y, the alignment provided by Y adds no uncertainty factor |
494 | for branch ranges starting before X, so we can just round what we have. | |
495 | But when X < Y, we don't know anything about the, so to speak, | |
496 | `middle bits', so we have to assume the worst when aligning up from an | |
497 | address mod X to one mod Y, which is Y - X. */ | |
498 | ||
499 | #ifndef LABEL_ALIGN | |
efa3896a | 500 | #define LABEL_ALIGN(LABEL) align_labels_log |
fc470718 R |
501 | #endif |
502 | ||
9e423e6d | 503 | #ifndef LABEL_ALIGN_MAX_SKIP |
2cca7283 | 504 | #define LABEL_ALIGN_MAX_SKIP align_labels_max_skip |
9e423e6d JW |
505 | #endif |
506 | ||
fc470718 | 507 | #ifndef LOOP_ALIGN |
efa3896a | 508 | #define LOOP_ALIGN(LABEL) align_loops_log |
fc470718 R |
509 | #endif |
510 | ||
9e423e6d | 511 | #ifndef LOOP_ALIGN_MAX_SKIP |
2cca7283 | 512 | #define LOOP_ALIGN_MAX_SKIP align_loops_max_skip |
9e423e6d JW |
513 | #endif |
514 | ||
fc470718 | 515 | #ifndef LABEL_ALIGN_AFTER_BARRIER |
340f7e7c | 516 | #define LABEL_ALIGN_AFTER_BARRIER(LABEL) 0 |
fc470718 R |
517 | #endif |
518 | ||
9e423e6d | 519 | #ifndef LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP |
247a370b JH |
520 | #define LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP 0 |
521 | #endif | |
522 | ||
523 | #ifndef JUMP_ALIGN | |
524 | #define JUMP_ALIGN(LABEL) align_jumps_log | |
525 | #endif | |
526 | ||
527 | #ifndef JUMP_ALIGN_MAX_SKIP | |
2cca7283 | 528 | #define JUMP_ALIGN_MAX_SKIP align_jumps_max_skip |
9e423e6d JW |
529 | #endif |
530 | ||
fc470718 | 531 | #ifndef ADDR_VEC_ALIGN |
ca3075bd | 532 | static int |
6cf9ac28 | 533 | final_addr_vec_align (rtx addr_vec) |
fc470718 | 534 | { |
2a841588 | 535 | int align = GET_MODE_SIZE (GET_MODE (PATTERN (addr_vec))); |
fc470718 R |
536 | |
537 | if (align > BIGGEST_ALIGNMENT / BITS_PER_UNIT) | |
538 | align = BIGGEST_ALIGNMENT / BITS_PER_UNIT; | |
2a841588 | 539 | return exact_log2 (align); |
fc470718 R |
540 | |
541 | } | |
f5d927c0 | 542 | |
fc470718 R |
543 | #define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC) |
544 | #endif | |
545 | ||
546 | #ifndef INSN_LENGTH_ALIGNMENT | |
547 | #define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log | |
548 | #endif | |
549 | ||
fc470718 R |
550 | #define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)]) |
551 | ||
de7987a6 | 552 | static int min_labelno, max_labelno; |
fc470718 R |
553 | |
554 | #define LABEL_TO_ALIGNMENT(LABEL) \ | |
9e423e6d JW |
555 | (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment) |
556 | ||
557 | #define LABEL_TO_MAX_SKIP(LABEL) \ | |
558 | (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip) | |
fc470718 R |
559 | |
560 | /* For the benefit of port specific code do this also as a function. */ | |
f5d927c0 | 561 | |
fc470718 | 562 | int |
6cf9ac28 | 563 | label_to_alignment (rtx label) |
fc470718 | 564 | { |
40a8f07a JJ |
565 | if (CODE_LABEL_NUMBER (label) <= max_labelno) |
566 | return LABEL_TO_ALIGNMENT (label); | |
567 | return 0; | |
568 | } | |
569 | ||
570 | int | |
571 | label_to_max_skip (rtx label) | |
572 | { | |
573 | if (CODE_LABEL_NUMBER (label) <= max_labelno) | |
574 | return LABEL_TO_MAX_SKIP (label); | |
575 | return 0; | |
fc470718 R |
576 | } |
577 | ||
578 | #ifdef HAVE_ATTR_length | |
579 | /* The differences in addresses | |
580 | between a branch and its target might grow or shrink depending on | |
581 | the alignment the start insn of the range (the branch for a forward | |
582 | branch or the label for a backward branch) starts out on; if these | |
583 | differences are used naively, they can even oscillate infinitely. | |
584 | We therefore want to compute a 'worst case' address difference that | |
585 | is independent of the alignment the start insn of the range end | |
586 | up on, and that is at least as large as the actual difference. | |
587 | The function align_fuzz calculates the amount we have to add to the | |
588 | naively computed difference, by traversing the part of the alignment | |
589 | chain of the start insn of the range that is in front of the end insn | |
590 | of the range, and considering for each alignment the maximum amount | |
591 | that it might contribute to a size increase. | |
592 | ||
593 | For casesi tables, we also want to know worst case minimum amounts of | |
594 | address difference, in case a machine description wants to introduce | |
595 | some common offset that is added to all offsets in a table. | |
d6a7951f | 596 | For this purpose, align_fuzz with a growth argument of 0 computes the |
fc470718 R |
597 | appropriate adjustment. */ |
598 | ||
fc470718 R |
599 | /* Compute the maximum delta by which the difference of the addresses of |
600 | START and END might grow / shrink due to a different address for start | |
601 | which changes the size of alignment insns between START and END. | |
602 | KNOWN_ALIGN_LOG is the alignment known for START. | |
603 | GROWTH should be ~0 if the objective is to compute potential code size | |
604 | increase, and 0 if the objective is to compute potential shrink. | |
605 | The return value is undefined for any other value of GROWTH. */ | |
f5d927c0 | 606 | |
ca3075bd | 607 | static int |
6cf9ac28 | 608 | align_fuzz (rtx start, rtx end, int known_align_log, unsigned int growth) |
fc470718 R |
609 | { |
610 | int uid = INSN_UID (start); | |
611 | rtx align_label; | |
612 | int known_align = 1 << known_align_log; | |
613 | int end_shuid = INSN_SHUID (end); | |
614 | int fuzz = 0; | |
615 | ||
616 | for (align_label = uid_align[uid]; align_label; align_label = uid_align[uid]) | |
617 | { | |
618 | int align_addr, new_align; | |
619 | ||
620 | uid = INSN_UID (align_label); | |
9d98a694 | 621 | align_addr = INSN_ADDRESSES (uid) - insn_lengths[uid]; |
fc470718 R |
622 | if (uid_shuid[uid] > end_shuid) |
623 | break; | |
624 | known_align_log = LABEL_TO_ALIGNMENT (align_label); | |
625 | new_align = 1 << known_align_log; | |
626 | if (new_align < known_align) | |
627 | continue; | |
628 | fuzz += (-align_addr ^ growth) & (new_align - known_align); | |
629 | known_align = new_align; | |
630 | } | |
631 | return fuzz; | |
632 | } | |
633 | ||
634 | /* Compute a worst-case reference address of a branch so that it | |
635 | can be safely used in the presence of aligned labels. Since the | |
636 | size of the branch itself is unknown, the size of the branch is | |
637 | not included in the range. I.e. for a forward branch, the reference | |
638 | address is the end address of the branch as known from the previous | |
639 | branch shortening pass, minus a value to account for possible size | |
640 | increase due to alignment. For a backward branch, it is the start | |
641 | address of the branch as known from the current pass, plus a value | |
642 | to account for possible size increase due to alignment. | |
643 | NB.: Therefore, the maximum offset allowed for backward branches needs | |
644 | to exclude the branch size. */ | |
f5d927c0 | 645 | |
fc470718 | 646 | int |
6cf9ac28 | 647 | insn_current_reference_address (rtx branch) |
fc470718 | 648 | { |
5527bf14 RH |
649 | rtx dest, seq; |
650 | int seq_uid; | |
651 | ||
652 | if (! INSN_ADDRESSES_SET_P ()) | |
653 | return 0; | |
654 | ||
655 | seq = NEXT_INSN (PREV_INSN (branch)); | |
656 | seq_uid = INSN_UID (seq); | |
4b4bf941 | 657 | if (!JUMP_P (branch)) |
fc470718 R |
658 | /* This can happen for example on the PA; the objective is to know the |
659 | offset to address something in front of the start of the function. | |
660 | Thus, we can treat it like a backward branch. | |
661 | We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than | |
662 | any alignment we'd encounter, so we skip the call to align_fuzz. */ | |
663 | return insn_current_address; | |
664 | dest = JUMP_LABEL (branch); | |
5527bf14 | 665 | |
b9f22704 | 666 | /* BRANCH has no proper alignment chain set, so use SEQ. |
afc6898e BS |
667 | BRANCH also has no INSN_SHUID. */ |
668 | if (INSN_SHUID (seq) < INSN_SHUID (dest)) | |
fc470718 | 669 | { |
f5d927c0 | 670 | /* Forward branch. */ |
fc470718 | 671 | return (insn_last_address + insn_lengths[seq_uid] |
26024475 | 672 | - align_fuzz (seq, dest, length_unit_log, ~0)); |
fc470718 R |
673 | } |
674 | else | |
675 | { | |
f5d927c0 | 676 | /* Backward branch. */ |
fc470718 | 677 | return (insn_current_address |
923f7cf9 | 678 | + align_fuzz (dest, seq, length_unit_log, ~0)); |
fc470718 R |
679 | } |
680 | } | |
681 | #endif /* HAVE_ATTR_length */ | |
682 | \f | |
65727068 KH |
683 | /* Compute branch alignments based on frequency information in the |
684 | CFG. */ | |
685 | ||
e855c69d | 686 | unsigned int |
6cf9ac28 | 687 | compute_alignments (void) |
247a370b | 688 | { |
247a370b | 689 | int log, max_skip, max_log; |
e0082a72 | 690 | basic_block bb; |
edbed3d3 JH |
691 | int freq_max = 0; |
692 | int freq_threshold = 0; | |
247a370b JH |
693 | |
694 | if (label_align) | |
695 | { | |
696 | free (label_align); | |
697 | label_align = 0; | |
698 | } | |
699 | ||
700 | max_labelno = max_label_num (); | |
701 | min_labelno = get_first_label_num (); | |
5ed6ace5 | 702 | label_align = XCNEWVEC (struct label_alignment, max_labelno - min_labelno + 1); |
247a370b JH |
703 | |
704 | /* If not optimizing or optimizing for size, don't assign any alignments. */ | |
efd8f750 | 705 | if (! optimize || optimize_function_for_size_p (cfun)) |
c2924966 | 706 | return 0; |
247a370b | 707 | |
edbed3d3 JH |
708 | if (dump_file) |
709 | { | |
710 | dump_flow_info (dump_file, TDF_DETAILS); | |
711 | flow_loops_dump (dump_file, NULL, 1); | |
712 | loop_optimizer_init (AVOID_CFG_MODIFICATIONS); | |
713 | } | |
714 | FOR_EACH_BB (bb) | |
715 | if (bb->frequency > freq_max) | |
716 | freq_max = bb->frequency; | |
717 | freq_threshold = freq_max / PARAM_VALUE (PARAM_ALIGN_THRESHOLD); | |
718 | ||
719 | if (dump_file) | |
720 | fprintf(dump_file, "freq_max: %i\n",freq_max); | |
e0082a72 | 721 | FOR_EACH_BB (bb) |
247a370b | 722 | { |
a813c111 | 723 | rtx label = BB_HEAD (bb); |
247a370b JH |
724 | int fallthru_frequency = 0, branch_frequency = 0, has_fallthru = 0; |
725 | edge e; | |
628f6a4e | 726 | edge_iterator ei; |
247a370b | 727 | |
4b4bf941 | 728 | if (!LABEL_P (label) |
8bcf15f6 | 729 | || optimize_bb_for_size_p (bb)) |
edbed3d3 JH |
730 | { |
731 | if (dump_file) | |
732 | fprintf(dump_file, "BB %4i freq %4i loop %2i loop_depth %2i skipped.\n", | |
733 | bb->index, bb->frequency, bb->loop_father->num, bb->loop_depth); | |
734 | continue; | |
735 | } | |
247a370b JH |
736 | max_log = LABEL_ALIGN (label); |
737 | max_skip = LABEL_ALIGN_MAX_SKIP; | |
738 | ||
628f6a4e | 739 | FOR_EACH_EDGE (e, ei, bb->preds) |
247a370b JH |
740 | { |
741 | if (e->flags & EDGE_FALLTHRU) | |
742 | has_fallthru = 1, fallthru_frequency += EDGE_FREQUENCY (e); | |
743 | else | |
744 | branch_frequency += EDGE_FREQUENCY (e); | |
745 | } | |
edbed3d3 JH |
746 | if (dump_file) |
747 | { | |
748 | fprintf(dump_file, "BB %4i freq %4i loop %2i loop_depth %2i fall %4i branch %4i", | |
749 | bb->index, bb->frequency, bb->loop_father->num, | |
750 | bb->loop_depth, | |
751 | fallthru_frequency, branch_frequency); | |
752 | if (!bb->loop_father->inner && bb->loop_father->num) | |
753 | fprintf (dump_file, " inner_loop"); | |
754 | if (bb->loop_father->header == bb) | |
755 | fprintf (dump_file, " loop_header"); | |
756 | fprintf (dump_file, "\n"); | |
757 | } | |
247a370b | 758 | |
f63d1bf7 | 759 | /* There are two purposes to align block with no fallthru incoming edge: |
247a370b | 760 | 1) to avoid fetch stalls when branch destination is near cache boundary |
d6a7951f | 761 | 2) to improve cache efficiency in case the previous block is not executed |
247a370b JH |
762 | (so it does not need to be in the cache). |
763 | ||
764 | We to catch first case, we align frequently executed blocks. | |
765 | To catch the second, we align blocks that are executed more frequently | |
eaec9b3d | 766 | than the predecessor and the predecessor is likely to not be executed |
247a370b JH |
767 | when function is called. */ |
768 | ||
769 | if (!has_fallthru | |
edbed3d3 | 770 | && (branch_frequency > freq_threshold |
f6366fc7 ZD |
771 | || (bb->frequency > bb->prev_bb->frequency * 10 |
772 | && (bb->prev_bb->frequency | |
247a370b JH |
773 | <= ENTRY_BLOCK_PTR->frequency / 2)))) |
774 | { | |
775 | log = JUMP_ALIGN (label); | |
edbed3d3 JH |
776 | if (dump_file) |
777 | fprintf(dump_file, " jump alignment added.\n"); | |
247a370b JH |
778 | if (max_log < log) |
779 | { | |
780 | max_log = log; | |
781 | max_skip = JUMP_ALIGN_MAX_SKIP; | |
782 | } | |
783 | } | |
784 | /* In case block is frequent and reached mostly by non-fallthru edge, | |
09da1532 | 785 | align it. It is most likely a first block of loop. */ |
247a370b | 786 | if (has_fallthru |
efd8f750 | 787 | && optimize_bb_for_speed_p (bb) |
edbed3d3 JH |
788 | && branch_frequency + fallthru_frequency > freq_threshold |
789 | && (branch_frequency | |
790 | > fallthru_frequency * PARAM_VALUE (PARAM_ALIGN_LOOP_ITERATIONS))) | |
247a370b JH |
791 | { |
792 | log = LOOP_ALIGN (label); | |
edbed3d3 JH |
793 | if (dump_file) |
794 | fprintf(dump_file, " internal loop alignment added.\n"); | |
247a370b JH |
795 | if (max_log < log) |
796 | { | |
797 | max_log = log; | |
798 | max_skip = LOOP_ALIGN_MAX_SKIP; | |
799 | } | |
800 | } | |
801 | LABEL_TO_ALIGNMENT (label) = max_log; | |
802 | LABEL_TO_MAX_SKIP (label) = max_skip; | |
803 | } | |
edbed3d3 JH |
804 | |
805 | if (dump_file) | |
e855c69d AB |
806 | { |
807 | loop_optimizer_finalize (); | |
808 | free_dominance_info (CDI_DOMINATORS); | |
809 | } | |
c2924966 | 810 | return 0; |
247a370b | 811 | } |
ef330312 | 812 | |
8ddbbcae | 813 | struct rtl_opt_pass pass_compute_alignments = |
ef330312 | 814 | { |
8ddbbcae JH |
815 | { |
816 | RTL_PASS, | |
edbed3d3 | 817 | "alignments", /* name */ |
ef330312 PB |
818 | NULL, /* gate */ |
819 | compute_alignments, /* execute */ | |
820 | NULL, /* sub */ | |
821 | NULL, /* next */ | |
822 | 0, /* static_pass_number */ | |
7072a650 | 823 | TV_NONE, /* tv_id */ |
ef330312 PB |
824 | 0, /* properties_required */ |
825 | 0, /* properties_provided */ | |
826 | 0, /* properties_destroyed */ | |
827 | 0, /* todo_flags_start */ | |
edbed3d3 | 828 | TODO_dump_func | TODO_verify_rtl_sharing |
8ddbbcae JH |
829 | | TODO_ggc_collect /* todo_flags_finish */ |
830 | } | |
ef330312 PB |
831 | }; |
832 | ||
247a370b | 833 | \f |
3cf2715d DE |
834 | /* Make a pass over all insns and compute their actual lengths by shortening |
835 | any branches of variable length if possible. */ | |
836 | ||
fc470718 R |
837 | /* shorten_branches might be called multiple times: for example, the SH |
838 | port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG. | |
839 | In order to do this, it needs proper length information, which it obtains | |
840 | by calling shorten_branches. This cannot be collapsed with | |
d6a7951f | 841 | shorten_branches itself into a single pass unless we also want to integrate |
fc470718 R |
842 | reorg.c, since the branch splitting exposes new instructions with delay |
843 | slots. */ | |
844 | ||
3cf2715d | 845 | void |
6cf9ac28 | 846 | shorten_branches (rtx first ATTRIBUTE_UNUSED) |
3cf2715d | 847 | { |
3cf2715d | 848 | rtx insn; |
fc470718 R |
849 | int max_uid; |
850 | int i; | |
fc470718 | 851 | int max_log; |
9e423e6d | 852 | int max_skip; |
fc470718 R |
853 | #ifdef HAVE_ATTR_length |
854 | #define MAX_CODE_ALIGN 16 | |
855 | rtx seq; | |
3cf2715d | 856 | int something_changed = 1; |
3cf2715d DE |
857 | char *varying_length; |
858 | rtx body; | |
859 | int uid; | |
fc470718 | 860 | rtx align_tab[MAX_CODE_ALIGN]; |
3cf2715d | 861 | |
fc470718 | 862 | #endif |
3d14e82f | 863 | |
3446405d JH |
864 | /* Compute maximum UID and allocate label_align / uid_shuid. */ |
865 | max_uid = get_max_uid (); | |
d9b6874b | 866 | |
471854f8 | 867 | /* Free uid_shuid before reallocating it. */ |
07a1f795 | 868 | free (uid_shuid); |
b0efb46b | 869 | |
5ed6ace5 | 870 | uid_shuid = XNEWVEC (int, max_uid); |
25e22dc0 | 871 | |
247a370b JH |
872 | if (max_labelno != max_label_num ()) |
873 | { | |
874 | int old = max_labelno; | |
875 | int n_labels; | |
876 | int n_old_labels; | |
877 | ||
878 | max_labelno = max_label_num (); | |
879 | ||
880 | n_labels = max_labelno - min_labelno + 1; | |
881 | n_old_labels = old - min_labelno + 1; | |
882 | ||
1b4572a8 | 883 | label_align = XRESIZEVEC (struct label_alignment, label_align, n_labels); |
247a370b | 884 | |
535a42b1 | 885 | /* Range of labels grows monotonically in the function. Failing here |
247a370b | 886 | means that the initialization of array got lost. */ |
0bccc606 | 887 | gcc_assert (n_old_labels <= n_labels); |
247a370b JH |
888 | |
889 | memset (label_align + n_old_labels, 0, | |
890 | (n_labels - n_old_labels) * sizeof (struct label_alignment)); | |
891 | } | |
892 | ||
fc470718 R |
893 | /* Initialize label_align and set up uid_shuid to be strictly |
894 | monotonically rising with insn order. */ | |
e2faec75 R |
895 | /* We use max_log here to keep track of the maximum alignment we want to |
896 | impose on the next CODE_LABEL (or the current one if we are processing | |
897 | the CODE_LABEL itself). */ | |
f5d927c0 | 898 | |
9e423e6d JW |
899 | max_log = 0; |
900 | max_skip = 0; | |
901 | ||
902 | for (insn = get_insns (), i = 1; insn; insn = NEXT_INSN (insn)) | |
fc470718 R |
903 | { |
904 | int log; | |
905 | ||
906 | INSN_SHUID (insn) = i++; | |
2c3c49de | 907 | if (INSN_P (insn)) |
80838531 | 908 | continue; |
b0efb46b | 909 | |
80838531 | 910 | if (LABEL_P (insn)) |
fc470718 R |
911 | { |
912 | rtx next; | |
0676c393 | 913 | bool next_is_jumptable; |
ff81832f | 914 | |
247a370b JH |
915 | /* Merge in alignments computed by compute_alignments. */ |
916 | log = LABEL_TO_ALIGNMENT (insn); | |
917 | if (max_log < log) | |
918 | { | |
919 | max_log = log; | |
920 | max_skip = LABEL_TO_MAX_SKIP (insn); | |
921 | } | |
fc470718 | 922 | |
0676c393 MM |
923 | next = next_nonnote_insn (insn); |
924 | next_is_jumptable = next && JUMP_TABLE_DATA_P (next); | |
925 | if (!next_is_jumptable) | |
9e423e6d | 926 | { |
0676c393 MM |
927 | log = LABEL_ALIGN (insn); |
928 | if (max_log < log) | |
929 | { | |
930 | max_log = log; | |
931 | max_skip = LABEL_ALIGN_MAX_SKIP; | |
932 | } | |
9e423e6d | 933 | } |
75197b37 BS |
934 | /* ADDR_VECs only take room if read-only data goes into the text |
935 | section. */ | |
0676c393 MM |
936 | if ((JUMP_TABLES_IN_TEXT_SECTION |
937 | || readonly_data_section == text_section) | |
938 | && next_is_jumptable) | |
939 | { | |
940 | log = ADDR_VEC_ALIGN (next); | |
941 | if (max_log < log) | |
942 | { | |
943 | max_log = log; | |
944 | max_skip = LABEL_ALIGN_MAX_SKIP; | |
945 | } | |
946 | } | |
fc470718 | 947 | LABEL_TO_ALIGNMENT (insn) = max_log; |
9e423e6d | 948 | LABEL_TO_MAX_SKIP (insn) = max_skip; |
fc470718 | 949 | max_log = 0; |
9e423e6d | 950 | max_skip = 0; |
fc470718 | 951 | } |
4b4bf941 | 952 | else if (BARRIER_P (insn)) |
fc470718 R |
953 | { |
954 | rtx label; | |
955 | ||
2c3c49de | 956 | for (label = insn; label && ! INSN_P (label); |
fc470718 | 957 | label = NEXT_INSN (label)) |
4b4bf941 | 958 | if (LABEL_P (label)) |
fc470718 R |
959 | { |
960 | log = LABEL_ALIGN_AFTER_BARRIER (insn); | |
961 | if (max_log < log) | |
9e423e6d JW |
962 | { |
963 | max_log = log; | |
964 | max_skip = LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP; | |
965 | } | |
fc470718 R |
966 | break; |
967 | } | |
968 | } | |
fc470718 R |
969 | } |
970 | #ifdef HAVE_ATTR_length | |
971 | ||
972 | /* Allocate the rest of the arrays. */ | |
5ed6ace5 | 973 | insn_lengths = XNEWVEC (int, max_uid); |
ea3cbda5 | 974 | insn_lengths_max_uid = max_uid; |
af035616 R |
975 | /* Syntax errors can lead to labels being outside of the main insn stream. |
976 | Initialize insn_addresses, so that we get reproducible results. */ | |
9d98a694 | 977 | INSN_ADDRESSES_ALLOC (max_uid); |
fc470718 | 978 | |
5ed6ace5 | 979 | varying_length = XCNEWVEC (char, max_uid); |
fc470718 R |
980 | |
981 | /* Initialize uid_align. We scan instructions | |
982 | from end to start, and keep in align_tab[n] the last seen insn | |
983 | that does an alignment of at least n+1, i.e. the successor | |
984 | in the alignment chain for an insn that does / has a known | |
985 | alignment of n. */ | |
5ed6ace5 | 986 | uid_align = XCNEWVEC (rtx, max_uid); |
fc470718 | 987 | |
f5d927c0 | 988 | for (i = MAX_CODE_ALIGN; --i >= 0;) |
fc470718 R |
989 | align_tab[i] = NULL_RTX; |
990 | seq = get_last_insn (); | |
33f7f353 | 991 | for (; seq; seq = PREV_INSN (seq)) |
fc470718 R |
992 | { |
993 | int uid = INSN_UID (seq); | |
994 | int log; | |
4b4bf941 | 995 | log = (LABEL_P (seq) ? LABEL_TO_ALIGNMENT (seq) : 0); |
fc470718 | 996 | uid_align[uid] = align_tab[0]; |
fc470718 R |
997 | if (log) |
998 | { | |
999 | /* Found an alignment label. */ | |
1000 | uid_align[uid] = align_tab[log]; | |
1001 | for (i = log - 1; i >= 0; i--) | |
1002 | align_tab[i] = seq; | |
1003 | } | |
33f7f353 JR |
1004 | } |
1005 | #ifdef CASE_VECTOR_SHORTEN_MODE | |
1006 | if (optimize) | |
1007 | { | |
1008 | /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum | |
1009 | label fields. */ | |
1010 | ||
1011 | int min_shuid = INSN_SHUID (get_insns ()) - 1; | |
1012 | int max_shuid = INSN_SHUID (get_last_insn ()) + 1; | |
1013 | int rel; | |
1014 | ||
1015 | for (insn = first; insn != 0; insn = NEXT_INSN (insn)) | |
fc470718 | 1016 | { |
33f7f353 JR |
1017 | rtx min_lab = NULL_RTX, max_lab = NULL_RTX, pat; |
1018 | int len, i, min, max, insn_shuid; | |
1019 | int min_align; | |
1020 | addr_diff_vec_flags flags; | |
1021 | ||
4b4bf941 | 1022 | if (!JUMP_P (insn) |
33f7f353 JR |
1023 | || GET_CODE (PATTERN (insn)) != ADDR_DIFF_VEC) |
1024 | continue; | |
1025 | pat = PATTERN (insn); | |
1026 | len = XVECLEN (pat, 1); | |
0bccc606 | 1027 | gcc_assert (len > 0); |
33f7f353 JR |
1028 | min_align = MAX_CODE_ALIGN; |
1029 | for (min = max_shuid, max = min_shuid, i = len - 1; i >= 0; i--) | |
1030 | { | |
1031 | rtx lab = XEXP (XVECEXP (pat, 1, i), 0); | |
1032 | int shuid = INSN_SHUID (lab); | |
1033 | if (shuid < min) | |
1034 | { | |
1035 | min = shuid; | |
1036 | min_lab = lab; | |
1037 | } | |
1038 | if (shuid > max) | |
1039 | { | |
1040 | max = shuid; | |
1041 | max_lab = lab; | |
1042 | } | |
1043 | if (min_align > LABEL_TO_ALIGNMENT (lab)) | |
1044 | min_align = LABEL_TO_ALIGNMENT (lab); | |
1045 | } | |
4c33cb26 R |
1046 | XEXP (pat, 2) = gen_rtx_LABEL_REF (Pmode, min_lab); |
1047 | XEXP (pat, 3) = gen_rtx_LABEL_REF (Pmode, max_lab); | |
33f7f353 JR |
1048 | insn_shuid = INSN_SHUID (insn); |
1049 | rel = INSN_SHUID (XEXP (XEXP (pat, 0), 0)); | |
5921f276 | 1050 | memset (&flags, 0, sizeof (flags)); |
33f7f353 JR |
1051 | flags.min_align = min_align; |
1052 | flags.base_after_vec = rel > insn_shuid; | |
1053 | flags.min_after_vec = min > insn_shuid; | |
1054 | flags.max_after_vec = max > insn_shuid; | |
1055 | flags.min_after_base = min > rel; | |
1056 | flags.max_after_base = max > rel; | |
1057 | ADDR_DIFF_VEC_FLAGS (pat) = flags; | |
fc470718 R |
1058 | } |
1059 | } | |
33f7f353 | 1060 | #endif /* CASE_VECTOR_SHORTEN_MODE */ |
3cf2715d | 1061 | |
3cf2715d | 1062 | /* Compute initial lengths, addresses, and varying flags for each insn. */ |
b816f339 | 1063 | for (insn_current_address = 0, insn = first; |
3cf2715d DE |
1064 | insn != 0; |
1065 | insn_current_address += insn_lengths[uid], insn = NEXT_INSN (insn)) | |
1066 | { | |
1067 | uid = INSN_UID (insn); | |
fc470718 | 1068 | |
3cf2715d | 1069 | insn_lengths[uid] = 0; |
fc470718 | 1070 | |
4b4bf941 | 1071 | if (LABEL_P (insn)) |
fc470718 R |
1072 | { |
1073 | int log = LABEL_TO_ALIGNMENT (insn); | |
1074 | if (log) | |
1075 | { | |
1076 | int align = 1 << log; | |
ecb06768 | 1077 | int new_address = (insn_current_address + align - 1) & -align; |
fc470718 | 1078 | insn_lengths[uid] = new_address - insn_current_address; |
fc470718 R |
1079 | } |
1080 | } | |
1081 | ||
5a09edba | 1082 | INSN_ADDRESSES (uid) = insn_current_address + insn_lengths[uid]; |
f5d927c0 | 1083 | |
4b4bf941 | 1084 | if (NOTE_P (insn) || BARRIER_P (insn) |
f90f4827 | 1085 | || LABEL_P (insn) || DEBUG_INSN_P(insn)) |
3cf2715d | 1086 | continue; |
04da53bd R |
1087 | if (INSN_DELETED_P (insn)) |
1088 | continue; | |
3cf2715d DE |
1089 | |
1090 | body = PATTERN (insn); | |
1091 | if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC) | |
5a32a90c JR |
1092 | { |
1093 | /* This only takes room if read-only data goes into the text | |
1094 | section. */ | |
d6b5193b RS |
1095 | if (JUMP_TABLES_IN_TEXT_SECTION |
1096 | || readonly_data_section == text_section) | |
75197b37 BS |
1097 | insn_lengths[uid] = (XVECLEN (body, |
1098 | GET_CODE (body) == ADDR_DIFF_VEC) | |
1099 | * GET_MODE_SIZE (GET_MODE (body))); | |
5a32a90c | 1100 | /* Alignment is handled by ADDR_VEC_ALIGN. */ |
5a32a90c | 1101 | } |
a30caf5c | 1102 | else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0) |
3cf2715d DE |
1103 | insn_lengths[uid] = asm_insn_count (body) * insn_default_length (insn); |
1104 | else if (GET_CODE (body) == SEQUENCE) | |
1105 | { | |
1106 | int i; | |
1107 | int const_delay_slots; | |
1108 | #ifdef DELAY_SLOTS | |
1109 | const_delay_slots = const_num_delay_slots (XVECEXP (body, 0, 0)); | |
1110 | #else | |
1111 | const_delay_slots = 0; | |
1112 | #endif | |
1113 | /* Inside a delay slot sequence, we do not do any branch shortening | |
1114 | if the shortening could change the number of delay slots | |
0f41302f | 1115 | of the branch. */ |
3cf2715d DE |
1116 | for (i = 0; i < XVECLEN (body, 0); i++) |
1117 | { | |
1118 | rtx inner_insn = XVECEXP (body, 0, i); | |
1119 | int inner_uid = INSN_UID (inner_insn); | |
1120 | int inner_length; | |
1121 | ||
a30caf5c DC |
1122 | if (GET_CODE (body) == ASM_INPUT |
1123 | || asm_noperands (PATTERN (XVECEXP (body, 0, i))) >= 0) | |
3cf2715d DE |
1124 | inner_length = (asm_insn_count (PATTERN (inner_insn)) |
1125 | * insn_default_length (inner_insn)); | |
1126 | else | |
1127 | inner_length = insn_default_length (inner_insn); | |
f5d927c0 | 1128 | |
3cf2715d DE |
1129 | insn_lengths[inner_uid] = inner_length; |
1130 | if (const_delay_slots) | |
1131 | { | |
1132 | if ((varying_length[inner_uid] | |
1133 | = insn_variable_length_p (inner_insn)) != 0) | |
1134 | varying_length[uid] = 1; | |
9d98a694 AO |
1135 | INSN_ADDRESSES (inner_uid) = (insn_current_address |
1136 | + insn_lengths[uid]); | |
3cf2715d DE |
1137 | } |
1138 | else | |
1139 | varying_length[inner_uid] = 0; | |
1140 | insn_lengths[uid] += inner_length; | |
1141 | } | |
1142 | } | |
1143 | else if (GET_CODE (body) != USE && GET_CODE (body) != CLOBBER) | |
1144 | { | |
1145 | insn_lengths[uid] = insn_default_length (insn); | |
1146 | varying_length[uid] = insn_variable_length_p (insn); | |
1147 | } | |
1148 | ||
1149 | /* If needed, do any adjustment. */ | |
1150 | #ifdef ADJUST_INSN_LENGTH | |
1151 | ADJUST_INSN_LENGTH (insn, insn_lengths[uid]); | |
04b6000c | 1152 | if (insn_lengths[uid] < 0) |
c725bd79 | 1153 | fatal_insn ("negative insn length", insn); |
3cf2715d DE |
1154 | #endif |
1155 | } | |
1156 | ||
1157 | /* Now loop over all the insns finding varying length insns. For each, | |
1158 | get the current insn length. If it has changed, reflect the change. | |
1159 | When nothing changes for a full pass, we are done. */ | |
1160 | ||
1161 | while (something_changed) | |
1162 | { | |
1163 | something_changed = 0; | |
fc470718 | 1164 | insn_current_align = MAX_CODE_ALIGN - 1; |
b816f339 | 1165 | for (insn_current_address = 0, insn = first; |
3cf2715d DE |
1166 | insn != 0; |
1167 | insn = NEXT_INSN (insn)) | |
1168 | { | |
1169 | int new_length; | |
b729186a | 1170 | #ifdef ADJUST_INSN_LENGTH |
3cf2715d | 1171 | int tmp_length; |
b729186a | 1172 | #endif |
fc470718 | 1173 | int length_align; |
3cf2715d DE |
1174 | |
1175 | uid = INSN_UID (insn); | |
fc470718 | 1176 | |
4b4bf941 | 1177 | if (LABEL_P (insn)) |
fc470718 R |
1178 | { |
1179 | int log = LABEL_TO_ALIGNMENT (insn); | |
1180 | if (log > insn_current_align) | |
1181 | { | |
1182 | int align = 1 << log; | |
ecb06768 | 1183 | int new_address= (insn_current_address + align - 1) & -align; |
fc470718 R |
1184 | insn_lengths[uid] = new_address - insn_current_address; |
1185 | insn_current_align = log; | |
1186 | insn_current_address = new_address; | |
1187 | } | |
1188 | else | |
1189 | insn_lengths[uid] = 0; | |
9d98a694 | 1190 | INSN_ADDRESSES (uid) = insn_current_address; |
fc470718 R |
1191 | continue; |
1192 | } | |
1193 | ||
1194 | length_align = INSN_LENGTH_ALIGNMENT (insn); | |
1195 | if (length_align < insn_current_align) | |
1196 | insn_current_align = length_align; | |
1197 | ||
9d98a694 AO |
1198 | insn_last_address = INSN_ADDRESSES (uid); |
1199 | INSN_ADDRESSES (uid) = insn_current_address; | |
fc470718 | 1200 | |
5e75ef4a | 1201 | #ifdef CASE_VECTOR_SHORTEN_MODE |
4b4bf941 | 1202 | if (optimize && JUMP_P (insn) |
33f7f353 JR |
1203 | && GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC) |
1204 | { | |
33f7f353 JR |
1205 | rtx body = PATTERN (insn); |
1206 | int old_length = insn_lengths[uid]; | |
1207 | rtx rel_lab = XEXP (XEXP (body, 0), 0); | |
1208 | rtx min_lab = XEXP (XEXP (body, 2), 0); | |
1209 | rtx max_lab = XEXP (XEXP (body, 3), 0); | |
9d98a694 AO |
1210 | int rel_addr = INSN_ADDRESSES (INSN_UID (rel_lab)); |
1211 | int min_addr = INSN_ADDRESSES (INSN_UID (min_lab)); | |
1212 | int max_addr = INSN_ADDRESSES (INSN_UID (max_lab)); | |
33f7f353 JR |
1213 | rtx prev; |
1214 | int rel_align = 0; | |
950a3816 KG |
1215 | addr_diff_vec_flags flags; |
1216 | ||
1217 | /* Avoid automatic aggregate initialization. */ | |
1218 | flags = ADDR_DIFF_VEC_FLAGS (body); | |
33f7f353 JR |
1219 | |
1220 | /* Try to find a known alignment for rel_lab. */ | |
1221 | for (prev = rel_lab; | |
1222 | prev | |
1223 | && ! insn_lengths[INSN_UID (prev)] | |
1224 | && ! (varying_length[INSN_UID (prev)] & 1); | |
1225 | prev = PREV_INSN (prev)) | |
1226 | if (varying_length[INSN_UID (prev)] & 2) | |
1227 | { | |
1228 | rel_align = LABEL_TO_ALIGNMENT (prev); | |
1229 | break; | |
1230 | } | |
1231 | ||
1232 | /* See the comment on addr_diff_vec_flags in rtl.h for the | |
1233 | meaning of the flags values. base: REL_LAB vec: INSN */ | |
1234 | /* Anything after INSN has still addresses from the last | |
1235 | pass; adjust these so that they reflect our current | |
1236 | estimate for this pass. */ | |
1237 | if (flags.base_after_vec) | |
1238 | rel_addr += insn_current_address - insn_last_address; | |
1239 | if (flags.min_after_vec) | |
1240 | min_addr += insn_current_address - insn_last_address; | |
1241 | if (flags.max_after_vec) | |
1242 | max_addr += insn_current_address - insn_last_address; | |
1243 | /* We want to know the worst case, i.e. lowest possible value | |
1244 | for the offset of MIN_LAB. If MIN_LAB is after REL_LAB, | |
1245 | its offset is positive, and we have to be wary of code shrink; | |
1246 | otherwise, it is negative, and we have to be vary of code | |
1247 | size increase. */ | |
1248 | if (flags.min_after_base) | |
1249 | { | |
1250 | /* If INSN is between REL_LAB and MIN_LAB, the size | |
1251 | changes we are about to make can change the alignment | |
1252 | within the observed offset, therefore we have to break | |
1253 | it up into two parts that are independent. */ | |
1254 | if (! flags.base_after_vec && flags.min_after_vec) | |
1255 | { | |
1256 | min_addr -= align_fuzz (rel_lab, insn, rel_align, 0); | |
1257 | min_addr -= align_fuzz (insn, min_lab, 0, 0); | |
1258 | } | |
1259 | else | |
1260 | min_addr -= align_fuzz (rel_lab, min_lab, rel_align, 0); | |
1261 | } | |
1262 | else | |
1263 | { | |
1264 | if (flags.base_after_vec && ! flags.min_after_vec) | |
1265 | { | |
1266 | min_addr -= align_fuzz (min_lab, insn, 0, ~0); | |
1267 | min_addr -= align_fuzz (insn, rel_lab, 0, ~0); | |
1268 | } | |
1269 | else | |
1270 | min_addr -= align_fuzz (min_lab, rel_lab, 0, ~0); | |
1271 | } | |
1272 | /* Likewise, determine the highest lowest possible value | |
1273 | for the offset of MAX_LAB. */ | |
1274 | if (flags.max_after_base) | |
1275 | { | |
1276 | if (! flags.base_after_vec && flags.max_after_vec) | |
1277 | { | |
1278 | max_addr += align_fuzz (rel_lab, insn, rel_align, ~0); | |
1279 | max_addr += align_fuzz (insn, max_lab, 0, ~0); | |
1280 | } | |
1281 | else | |
1282 | max_addr += align_fuzz (rel_lab, max_lab, rel_align, ~0); | |
1283 | } | |
1284 | else | |
1285 | { | |
1286 | if (flags.base_after_vec && ! flags.max_after_vec) | |
1287 | { | |
1288 | max_addr += align_fuzz (max_lab, insn, 0, 0); | |
1289 | max_addr += align_fuzz (insn, rel_lab, 0, 0); | |
1290 | } | |
1291 | else | |
1292 | max_addr += align_fuzz (max_lab, rel_lab, 0, 0); | |
1293 | } | |
1294 | PUT_MODE (body, CASE_VECTOR_SHORTEN_MODE (min_addr - rel_addr, | |
1295 | max_addr - rel_addr, | |
1296 | body)); | |
d6b5193b RS |
1297 | if (JUMP_TABLES_IN_TEXT_SECTION |
1298 | || readonly_data_section == text_section) | |
75197b37 BS |
1299 | { |
1300 | insn_lengths[uid] | |
1301 | = (XVECLEN (body, 1) * GET_MODE_SIZE (GET_MODE (body))); | |
1302 | insn_current_address += insn_lengths[uid]; | |
1303 | if (insn_lengths[uid] != old_length) | |
1304 | something_changed = 1; | |
1305 | } | |
1306 | ||
33f7f353 | 1307 | continue; |
33f7f353 | 1308 | } |
5e75ef4a JL |
1309 | #endif /* CASE_VECTOR_SHORTEN_MODE */ |
1310 | ||
1311 | if (! (varying_length[uid])) | |
3cf2715d | 1312 | { |
4b4bf941 | 1313 | if (NONJUMP_INSN_P (insn) |
674fc07d GS |
1314 | && GET_CODE (PATTERN (insn)) == SEQUENCE) |
1315 | { | |
1316 | int i; | |
1317 | ||
1318 | body = PATTERN (insn); | |
1319 | for (i = 0; i < XVECLEN (body, 0); i++) | |
1320 | { | |
1321 | rtx inner_insn = XVECEXP (body, 0, i); | |
1322 | int inner_uid = INSN_UID (inner_insn); | |
1323 | ||
1324 | INSN_ADDRESSES (inner_uid) = insn_current_address; | |
1325 | ||
1326 | insn_current_address += insn_lengths[inner_uid]; | |
1327 | } | |
dd3f0101 | 1328 | } |
674fc07d GS |
1329 | else |
1330 | insn_current_address += insn_lengths[uid]; | |
1331 | ||
3cf2715d DE |
1332 | continue; |
1333 | } | |
674fc07d | 1334 | |
4b4bf941 | 1335 | if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE) |
3cf2715d DE |
1336 | { |
1337 | int i; | |
f5d927c0 | 1338 | |
3cf2715d DE |
1339 | body = PATTERN (insn); |
1340 | new_length = 0; | |
1341 | for (i = 0; i < XVECLEN (body, 0); i++) | |
1342 | { | |
1343 | rtx inner_insn = XVECEXP (body, 0, i); | |
1344 | int inner_uid = INSN_UID (inner_insn); | |
1345 | int inner_length; | |
1346 | ||
9d98a694 | 1347 | INSN_ADDRESSES (inner_uid) = insn_current_address; |
3cf2715d DE |
1348 | |
1349 | /* insn_current_length returns 0 for insns with a | |
1350 | non-varying length. */ | |
1351 | if (! varying_length[inner_uid]) | |
1352 | inner_length = insn_lengths[inner_uid]; | |
1353 | else | |
1354 | inner_length = insn_current_length (inner_insn); | |
1355 | ||
1356 | if (inner_length != insn_lengths[inner_uid]) | |
1357 | { | |
1358 | insn_lengths[inner_uid] = inner_length; | |
1359 | something_changed = 1; | |
1360 | } | |
1361 | insn_current_address += insn_lengths[inner_uid]; | |
1362 | new_length += inner_length; | |
1363 | } | |
1364 | } | |
1365 | else | |
1366 | { | |
1367 | new_length = insn_current_length (insn); | |
1368 | insn_current_address += new_length; | |
1369 | } | |
1370 | ||
3cf2715d DE |
1371 | #ifdef ADJUST_INSN_LENGTH |
1372 | /* If needed, do any adjustment. */ | |
1373 | tmp_length = new_length; | |
1374 | ADJUST_INSN_LENGTH (insn, new_length); | |
1375 | insn_current_address += (new_length - tmp_length); | |
3cf2715d DE |
1376 | #endif |
1377 | ||
1378 | if (new_length != insn_lengths[uid]) | |
1379 | { | |
1380 | insn_lengths[uid] = new_length; | |
1381 | something_changed = 1; | |
1382 | } | |
1383 | } | |
bb4aaf18 TG |
1384 | /* For a non-optimizing compile, do only a single pass. */ |
1385 | if (!optimize) | |
1386 | break; | |
3cf2715d | 1387 | } |
fc470718 R |
1388 | |
1389 | free (varying_length); | |
1390 | ||
3cf2715d DE |
1391 | #endif /* HAVE_ATTR_length */ |
1392 | } | |
1393 | ||
1394 | #ifdef HAVE_ATTR_length | |
1395 | /* Given the body of an INSN known to be generated by an ASM statement, return | |
1396 | the number of machine instructions likely to be generated for this insn. | |
1397 | This is used to compute its length. */ | |
1398 | ||
1399 | static int | |
6cf9ac28 | 1400 | asm_insn_count (rtx body) |
3cf2715d | 1401 | { |
48c54229 | 1402 | const char *templ; |
3cf2715d | 1403 | |
5d0930ea | 1404 | if (GET_CODE (body) == ASM_INPUT) |
48c54229 | 1405 | templ = XSTR (body, 0); |
5d0930ea | 1406 | else |
48c54229 | 1407 | templ = decode_asm_operands (body, NULL, NULL, NULL, NULL, NULL); |
5d0930ea | 1408 | |
2bd1d2c8 AP |
1409 | return asm_str_count (templ); |
1410 | } | |
1411 | #endif | |
1412 | ||
1413 | /* Return the number of machine instructions likely to be generated for the | |
1414 | inline-asm template. */ | |
1415 | int | |
1416 | asm_str_count (const char *templ) | |
1417 | { | |
1418 | int count = 1; | |
b8698a0f | 1419 | |
48c54229 | 1420 | if (!*templ) |
5bc4fa7c MS |
1421 | return 0; |
1422 | ||
48c54229 KG |
1423 | for (; *templ; templ++) |
1424 | if (IS_ASM_LOGICAL_LINE_SEPARATOR (*templ, templ) | |
1425 | || *templ == '\n') | |
3cf2715d DE |
1426 | count++; |
1427 | ||
1428 | return count; | |
1429 | } | |
3cf2715d | 1430 | \f |
c8aea42c PB |
1431 | /* ??? This is probably the wrong place for these. */ |
1432 | /* Structure recording the mapping from source file and directory | |
1433 | names at compile time to those to be embedded in debug | |
1434 | information. */ | |
1435 | typedef struct debug_prefix_map | |
1436 | { | |
1437 | const char *old_prefix; | |
1438 | const char *new_prefix; | |
1439 | size_t old_len; | |
1440 | size_t new_len; | |
1441 | struct debug_prefix_map *next; | |
1442 | } debug_prefix_map; | |
1443 | ||
1444 | /* Linked list of such structures. */ | |
1445 | debug_prefix_map *debug_prefix_maps; | |
1446 | ||
1447 | ||
1448 | /* Record a debug file prefix mapping. ARG is the argument to | |
1449 | -fdebug-prefix-map and must be of the form OLD=NEW. */ | |
1450 | ||
1451 | void | |
1452 | add_debug_prefix_map (const char *arg) | |
1453 | { | |
1454 | debug_prefix_map *map; | |
1455 | const char *p; | |
1456 | ||
1457 | p = strchr (arg, '='); | |
1458 | if (!p) | |
1459 | { | |
1460 | error ("invalid argument %qs to -fdebug-prefix-map", arg); | |
1461 | return; | |
1462 | } | |
1463 | map = XNEW (debug_prefix_map); | |
fe83055d | 1464 | map->old_prefix = xstrndup (arg, p - arg); |
c8aea42c PB |
1465 | map->old_len = p - arg; |
1466 | p++; | |
fe83055d | 1467 | map->new_prefix = xstrdup (p); |
c8aea42c PB |
1468 | map->new_len = strlen (p); |
1469 | map->next = debug_prefix_maps; | |
1470 | debug_prefix_maps = map; | |
1471 | } | |
1472 | ||
1473 | /* Perform user-specified mapping of debug filename prefixes. Return | |
1474 | the new name corresponding to FILENAME. */ | |
1475 | ||
1476 | const char * | |
1477 | remap_debug_filename (const char *filename) | |
1478 | { | |
1479 | debug_prefix_map *map; | |
1480 | char *s; | |
1481 | const char *name; | |
1482 | size_t name_len; | |
1483 | ||
1484 | for (map = debug_prefix_maps; map; map = map->next) | |
1485 | if (strncmp (filename, map->old_prefix, map->old_len) == 0) | |
1486 | break; | |
1487 | if (!map) | |
1488 | return filename; | |
1489 | name = filename + map->old_len; | |
1490 | name_len = strlen (name) + 1; | |
1491 | s = (char *) alloca (name_len + map->new_len); | |
1492 | memcpy (s, map->new_prefix, map->new_len); | |
1493 | memcpy (s + map->new_len, name, name_len); | |
1494 | return ggc_strdup (s); | |
1495 | } | |
1496 | \f | |
725730f2 EB |
1497 | /* Return true if DWARF2 debug info can be emitted for DECL. */ |
1498 | ||
1499 | static bool | |
1500 | dwarf2_debug_info_emitted_p (tree decl) | |
1501 | { | |
1502 | if (write_symbols != DWARF2_DEBUG && write_symbols != VMS_AND_DWARF2_DEBUG) | |
1503 | return false; | |
1504 | ||
1505 | if (DECL_IGNORED_P (decl)) | |
1506 | return false; | |
1507 | ||
1508 | return true; | |
1509 | } | |
1510 | ||
3cf2715d DE |
1511 | /* Output assembler code for the start of a function, |
1512 | and initialize some of the variables in this file | |
1513 | for the new function. The label for the function and associated | |
1514 | assembler pseudo-ops have already been output in `assemble_start_function'. | |
1515 | ||
1516 | FIRST is the first insn of the rtl for the function being compiled. | |
1517 | FILE is the file to write assembler code to. | |
1518 | OPTIMIZE is nonzero if we should eliminate redundant | |
1519 | test and compare insns. */ | |
1520 | ||
1521 | void | |
6cf9ac28 AJ |
1522 | final_start_function (rtx first ATTRIBUTE_UNUSED, FILE *file, |
1523 | int optimize ATTRIBUTE_UNUSED) | |
3cf2715d DE |
1524 | { |
1525 | block_depth = 0; | |
1526 | ||
1527 | this_is_asm_operands = 0; | |
1528 | ||
9ae130f8 JH |
1529 | last_filename = locator_file (prologue_locator); |
1530 | last_linenum = locator_line (prologue_locator); | |
6c52e687 | 1531 | last_discriminator = discriminator = 0; |
9ae130f8 | 1532 | |
653e276c | 1533 | high_block_linenum = high_function_linenum = last_linenum; |
eac40081 | 1534 | |
725730f2 EB |
1535 | if (!DECL_IGNORED_P (current_function_decl)) |
1536 | debug_hooks->begin_prologue (last_linenum, last_filename); | |
d291dd49 | 1537 | |
951120ea | 1538 | #if defined (DWARF2_UNWIND_INFO) || defined (TARGET_UNWIND_INFO) |
725730f2 | 1539 | if (!dwarf2_debug_info_emitted_p (current_function_decl)) |
653e276c | 1540 | dwarf2out_begin_prologue (0, NULL); |
f5d927c0 | 1541 | #endif |
3cf2715d DE |
1542 | |
1543 | #ifdef LEAF_REG_REMAP | |
54ff41b7 | 1544 | if (current_function_uses_only_leaf_regs) |
3cf2715d DE |
1545 | leaf_renumber_regs (first); |
1546 | #endif | |
1547 | ||
1548 | /* The Sun386i and perhaps other machines don't work right | |
1549 | if the profiling code comes after the prologue. */ | |
1550 | #ifdef PROFILE_BEFORE_PROLOGUE | |
e3b5732b | 1551 | if (crtl->profile) |
3cf2715d DE |
1552 | profile_function (file); |
1553 | #endif /* PROFILE_BEFORE_PROLOGUE */ | |
1554 | ||
0021b564 JM |
1555 | #if defined (DWARF2_UNWIND_INFO) && defined (HAVE_prologue) |
1556 | if (dwarf2out_do_frame ()) | |
e0c0490b | 1557 | dwarf2out_frame_debug (NULL_RTX, false); |
0021b564 JM |
1558 | #endif |
1559 | ||
18c038b9 MM |
1560 | /* If debugging, assign block numbers to all of the blocks in this |
1561 | function. */ | |
1562 | if (write_symbols) | |
1563 | { | |
0435312e | 1564 | reemit_insn_block_notes (); |
a20612aa | 1565 | number_blocks (current_function_decl); |
18c038b9 MM |
1566 | /* We never actually put out begin/end notes for the top-level |
1567 | block in the function. But, conceptually, that block is | |
1568 | always needed. */ | |
1569 | TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl)) = 1; | |
1570 | } | |
1571 | ||
a214518f SP |
1572 | if (warn_frame_larger_than |
1573 | && get_frame_size () > frame_larger_than_size) | |
1574 | { | |
1575 | /* Issue a warning */ | |
1576 | warning (OPT_Wframe_larger_than_, | |
1577 | "the frame size of %wd bytes is larger than %wd bytes", | |
1578 | get_frame_size (), frame_larger_than_size); | |
1579 | } | |
1580 | ||
3cf2715d | 1581 | /* First output the function prologue: code to set up the stack frame. */ |
5fd9b178 | 1582 | targetm.asm_out.function_prologue (file, get_frame_size ()); |
3cf2715d | 1583 | |
3cf2715d DE |
1584 | /* If the machine represents the prologue as RTL, the profiling code must |
1585 | be emitted when NOTE_INSN_PROLOGUE_END is scanned. */ | |
1586 | #ifdef HAVE_prologue | |
1587 | if (! HAVE_prologue) | |
1588 | #endif | |
1589 | profile_after_prologue (file); | |
3cf2715d DE |
1590 | } |
1591 | ||
1592 | static void | |
6cf9ac28 | 1593 | profile_after_prologue (FILE *file ATTRIBUTE_UNUSED) |
3cf2715d | 1594 | { |
3cf2715d | 1595 | #ifndef PROFILE_BEFORE_PROLOGUE |
e3b5732b | 1596 | if (crtl->profile) |
3cf2715d DE |
1597 | profile_function (file); |
1598 | #endif /* not PROFILE_BEFORE_PROLOGUE */ | |
1599 | } | |
1600 | ||
1601 | static void | |
6cf9ac28 | 1602 | profile_function (FILE *file ATTRIBUTE_UNUSED) |
3cf2715d | 1603 | { |
dcacfa04 | 1604 | #ifndef NO_PROFILE_COUNTERS |
9739c90c | 1605 | # define NO_PROFILE_COUNTERS 0 |
dcacfa04 | 1606 | #endif |
531ca746 RH |
1607 | #ifdef ASM_OUTPUT_REG_PUSH |
1608 | rtx sval = NULL, chain = NULL; | |
1609 | ||
1610 | if (cfun->returns_struct) | |
1611 | sval = targetm.calls.struct_value_rtx (TREE_TYPE (current_function_decl), | |
1612 | true); | |
1613 | if (cfun->static_chain_decl) | |
1614 | chain = targetm.calls.static_chain (current_function_decl, true); | |
b729186a | 1615 | #endif /* ASM_OUTPUT_REG_PUSH */ |
3cf2715d | 1616 | |
9739c90c JJ |
1617 | if (! NO_PROFILE_COUNTERS) |
1618 | { | |
1619 | int align = MIN (BIGGEST_ALIGNMENT, LONG_TYPE_SIZE); | |
d6b5193b | 1620 | switch_to_section (data_section); |
9739c90c | 1621 | ASM_OUTPUT_ALIGN (file, floor_log2 (align / BITS_PER_UNIT)); |
5fd9b178 | 1622 | targetm.asm_out.internal_label (file, "LP", current_function_funcdef_no); |
9739c90c JJ |
1623 | assemble_integer (const0_rtx, LONG_TYPE_SIZE / BITS_PER_UNIT, align, 1); |
1624 | } | |
3cf2715d | 1625 | |
d6b5193b | 1626 | switch_to_section (current_function_section ()); |
3cf2715d | 1627 | |
531ca746 RH |
1628 | #ifdef ASM_OUTPUT_REG_PUSH |
1629 | if (sval && REG_P (sval)) | |
1630 | ASM_OUTPUT_REG_PUSH (file, REGNO (sval)); | |
1631 | if (chain && REG_P (chain)) | |
1632 | ASM_OUTPUT_REG_PUSH (file, REGNO (chain)); | |
3cf2715d | 1633 | #endif |
3cf2715d | 1634 | |
df696a75 | 1635 | FUNCTION_PROFILER (file, current_function_funcdef_no); |
3cf2715d | 1636 | |
531ca746 RH |
1637 | #ifdef ASM_OUTPUT_REG_PUSH |
1638 | if (chain && REG_P (chain)) | |
1639 | ASM_OUTPUT_REG_POP (file, REGNO (chain)); | |
1640 | if (sval && REG_P (sval)) | |
1641 | ASM_OUTPUT_REG_POP (file, REGNO (sval)); | |
3cf2715d DE |
1642 | #endif |
1643 | } | |
1644 | ||
1645 | /* Output assembler code for the end of a function. | |
1646 | For clarity, args are same as those of `final_start_function' | |
1647 | even though not all of them are needed. */ | |
1648 | ||
1649 | void | |
6cf9ac28 | 1650 | final_end_function (void) |
3cf2715d | 1651 | { |
be1bb652 | 1652 | app_disable (); |
3cf2715d | 1653 | |
725730f2 EB |
1654 | if (!DECL_IGNORED_P (current_function_decl)) |
1655 | debug_hooks->end_function (high_function_linenum); | |
3cf2715d | 1656 | |
3cf2715d DE |
1657 | /* Finally, output the function epilogue: |
1658 | code to restore the stack frame and return to the caller. */ | |
5fd9b178 | 1659 | targetm.asm_out.function_epilogue (asm_out_file, get_frame_size ()); |
3cf2715d | 1660 | |
e2a12aca | 1661 | /* And debug output. */ |
725730f2 EB |
1662 | if (!DECL_IGNORED_P (current_function_decl)) |
1663 | debug_hooks->end_epilogue (last_linenum, last_filename); | |
3cf2715d | 1664 | |
e2a12aca | 1665 | #if defined (DWARF2_UNWIND_INFO) |
725730f2 | 1666 | if (!dwarf2_debug_info_emitted_p (current_function_decl) |
7a0c8d71 | 1667 | && dwarf2out_do_frame ()) |
702ada3d | 1668 | dwarf2out_end_epilogue (last_linenum, last_filename); |
9a666dda | 1669 | #endif |
3cf2715d DE |
1670 | } |
1671 | \f | |
3cf2715d | 1672 | /* Output assembler code for some insns: all or part of a function. |
c9d691e9 | 1673 | For description of args, see `final_start_function', above. */ |
3cf2715d DE |
1674 | |
1675 | void | |
c9d691e9 | 1676 | final (rtx first, FILE *file, int optimize) |
3cf2715d | 1677 | { |
b3694847 | 1678 | rtx insn; |
a8c3510c | 1679 | int max_uid = 0; |
589fe865 | 1680 | int seen = 0; |
3cf2715d DE |
1681 | |
1682 | last_ignored_compare = 0; | |
3cf2715d | 1683 | |
3cf2715d | 1684 | for (insn = first; insn; insn = NEXT_INSN (insn)) |
a8c3510c | 1685 | { |
938d968e | 1686 | if (INSN_UID (insn) > max_uid) /* Find largest UID. */ |
f5d927c0 | 1687 | max_uid = INSN_UID (insn); |
9ef4c6ef JC |
1688 | #ifdef HAVE_cc0 |
1689 | /* If CC tracking across branches is enabled, record the insn which | |
1690 | jumps to each branch only reached from one place. */ | |
4b4bf941 | 1691 | if (optimize && JUMP_P (insn)) |
9ef4c6ef JC |
1692 | { |
1693 | rtx lab = JUMP_LABEL (insn); | |
1694 | if (lab && LABEL_NUSES (lab) == 1) | |
1695 | { | |
1696 | LABEL_REFS (lab) = insn; | |
1697 | } | |
1698 | } | |
1699 | #endif | |
a8c3510c AM |
1700 | } |
1701 | ||
3cf2715d DE |
1702 | init_recog (); |
1703 | ||
1704 | CC_STATUS_INIT; | |
1705 | ||
1706 | /* Output the insns. */ | |
9ff57809 | 1707 | for (insn = first; insn;) |
2f16edb1 TG |
1708 | { |
1709 | #ifdef HAVE_ATTR_length | |
b9f22704 | 1710 | if ((unsigned) INSN_UID (insn) >= INSN_ADDRESSES_SIZE ()) |
0ac76ad9 | 1711 | { |
0ac76ad9 RH |
1712 | /* This can be triggered by bugs elsewhere in the compiler if |
1713 | new insns are created after init_insn_lengths is called. */ | |
0bccc606 NS |
1714 | gcc_assert (NOTE_P (insn)); |
1715 | insn_current_address = -1; | |
0ac76ad9 RH |
1716 | } |
1717 | else | |
9d98a694 | 1718 | insn_current_address = INSN_ADDRESSES (INSN_UID (insn)); |
0ac76ad9 RH |
1719 | #endif /* HAVE_ATTR_length */ |
1720 | ||
c9d691e9 | 1721 | insn = final_scan_insn (insn, file, optimize, 0, &seen); |
2f16edb1 | 1722 | } |
3cf2715d DE |
1723 | } |
1724 | \f | |
4bbf910e | 1725 | const char * |
6cf9ac28 | 1726 | get_insn_template (int code, rtx insn) |
4bbf910e | 1727 | { |
4bbf910e RH |
1728 | switch (insn_data[code].output_format) |
1729 | { | |
1730 | case INSN_OUTPUT_FORMAT_SINGLE: | |
3897f229 | 1731 | return insn_data[code].output.single; |
4bbf910e | 1732 | case INSN_OUTPUT_FORMAT_MULTI: |
3897f229 | 1733 | return insn_data[code].output.multi[which_alternative]; |
4bbf910e | 1734 | case INSN_OUTPUT_FORMAT_FUNCTION: |
0bccc606 | 1735 | gcc_assert (insn); |
3897f229 | 1736 | return (*insn_data[code].output.function) (recog_data.operand, insn); |
4bbf910e RH |
1737 | |
1738 | default: | |
0bccc606 | 1739 | gcc_unreachable (); |
4bbf910e RH |
1740 | } |
1741 | } | |
f5d927c0 | 1742 | |
0dc36574 ZW |
1743 | /* Emit the appropriate declaration for an alternate-entry-point |
1744 | symbol represented by INSN, to FILE. INSN is a CODE_LABEL with | |
1745 | LABEL_KIND != LABEL_NORMAL. | |
1746 | ||
1747 | The case fall-through in this function is intentional. */ | |
1748 | static void | |
6cf9ac28 | 1749 | output_alternate_entry_point (FILE *file, rtx insn) |
0dc36574 ZW |
1750 | { |
1751 | const char *name = LABEL_NAME (insn); | |
1752 | ||
1753 | switch (LABEL_KIND (insn)) | |
1754 | { | |
1755 | case LABEL_WEAK_ENTRY: | |
1756 | #ifdef ASM_WEAKEN_LABEL | |
1757 | ASM_WEAKEN_LABEL (file, name); | |
1758 | #endif | |
1759 | case LABEL_GLOBAL_ENTRY: | |
5fd9b178 | 1760 | targetm.asm_out.globalize_label (file, name); |
0dc36574 | 1761 | case LABEL_STATIC_ENTRY: |
905173eb ZW |
1762 | #ifdef ASM_OUTPUT_TYPE_DIRECTIVE |
1763 | ASM_OUTPUT_TYPE_DIRECTIVE (file, name, "function"); | |
1764 | #endif | |
0dc36574 ZW |
1765 | ASM_OUTPUT_LABEL (file, name); |
1766 | break; | |
1767 | ||
1768 | case LABEL_NORMAL: | |
1769 | default: | |
0bccc606 | 1770 | gcc_unreachable (); |
0dc36574 ZW |
1771 | } |
1772 | } | |
1773 | ||
f410e1b3 RAE |
1774 | /* Given a CALL_INSN, find and return the nested CALL. */ |
1775 | static rtx | |
1776 | call_from_call_insn (rtx insn) | |
1777 | { | |
1778 | rtx x; | |
1779 | gcc_assert (CALL_P (insn)); | |
1780 | x = PATTERN (insn); | |
1781 | ||
1782 | while (GET_CODE (x) != CALL) | |
1783 | { | |
1784 | switch (GET_CODE (x)) | |
1785 | { | |
1786 | default: | |
1787 | gcc_unreachable (); | |
b8c71e40 RAE |
1788 | case COND_EXEC: |
1789 | x = COND_EXEC_CODE (x); | |
1790 | break; | |
f410e1b3 RAE |
1791 | case PARALLEL: |
1792 | x = XVECEXP (x, 0, 0); | |
1793 | break; | |
1794 | case SET: | |
1795 | x = XEXP (x, 1); | |
1796 | break; | |
1797 | } | |
1798 | } | |
1799 | return x; | |
1800 | } | |
1801 | ||
3cf2715d DE |
1802 | /* The final scan for one insn, INSN. |
1803 | Args are same as in `final', except that INSN | |
1804 | is the insn being scanned. | |
1805 | Value returned is the next insn to be scanned. | |
1806 | ||
ff8cea7e EB |
1807 | NOPEEPHOLES is the flag to disallow peephole processing (currently |
1808 | used for within delayed branch sequence output). | |
3cf2715d | 1809 | |
589fe865 DJ |
1810 | SEEN is used to track the end of the prologue, for emitting |
1811 | debug information. We force the emission of a line note after | |
1812 | both NOTE_INSN_PROLOGUE_END and NOTE_INSN_FUNCTION_BEG, or | |
1813 | at the beginning of the second basic block, whichever comes | |
1814 | first. */ | |
1815 | ||
5cfc5f84 | 1816 | rtx |
6cf9ac28 | 1817 | final_scan_insn (rtx insn, FILE *file, int optimize ATTRIBUTE_UNUSED, |
c9d691e9 | 1818 | int nopeepholes ATTRIBUTE_UNUSED, int *seen) |
3cf2715d | 1819 | { |
90ca38bb MM |
1820 | #ifdef HAVE_cc0 |
1821 | rtx set; | |
1822 | #endif | |
b2a6a2fb | 1823 | rtx next; |
90ca38bb | 1824 | |
3cf2715d DE |
1825 | insn_counter++; |
1826 | ||
1827 | /* Ignore deleted insns. These can occur when we split insns (due to a | |
1828 | template of "#") while not optimizing. */ | |
1829 | if (INSN_DELETED_P (insn)) | |
1830 | return NEXT_INSN (insn); | |
1831 | ||
1832 | switch (GET_CODE (insn)) | |
1833 | { | |
1834 | case NOTE: | |
a38e7aa5 | 1835 | switch (NOTE_KIND (insn)) |
be1bb652 RH |
1836 | { |
1837 | case NOTE_INSN_DELETED: | |
be1bb652 | 1838 | break; |
3cf2715d | 1839 | |
87c8b4be | 1840 | case NOTE_INSN_SWITCH_TEXT_SECTIONS: |
c543ca49 | 1841 | in_cold_section_p = !in_cold_section_p; |
a4b6974e UB |
1842 | #ifdef DWARF2_UNWIND_INFO |
1843 | if (dwarf2out_do_frame ()) | |
1844 | dwarf2out_switch_text_section (); | |
1845 | else | |
1846 | #endif | |
725730f2 EB |
1847 | if (!DECL_IGNORED_P (current_function_decl)) |
1848 | debug_hooks->switch_text_section (); | |
a4b6974e | 1849 | |
c543ca49 | 1850 | switch_to_section (current_function_section ()); |
750054a2 | 1851 | break; |
b0efb46b | 1852 | |
be1bb652 | 1853 | case NOTE_INSN_BASIC_BLOCK: |
951120ea PB |
1854 | #ifdef TARGET_UNWIND_INFO |
1855 | targetm.asm_out.unwind_emit (asm_out_file, insn); | |
ad0fc698 | 1856 | #endif |
951120ea | 1857 | |
be1bb652 RH |
1858 | if (flag_debug_asm) |
1859 | fprintf (asm_out_file, "\t%s basic block %d\n", | |
0b17ab2f | 1860 | ASM_COMMENT_START, NOTE_BASIC_BLOCK (insn)->index); |
589fe865 DJ |
1861 | |
1862 | if ((*seen & (SEEN_EMITTED | SEEN_BB)) == SEEN_BB) | |
1863 | { | |
1864 | *seen |= SEEN_EMITTED; | |
b8176fe4 | 1865 | force_source_line = true; |
589fe865 DJ |
1866 | } |
1867 | else | |
1868 | *seen |= SEEN_BB; | |
1869 | ||
6c52e687 CC |
1870 | discriminator = NOTE_BASIC_BLOCK (insn)->discriminator; |
1871 | ||
be1bb652 | 1872 | break; |
3cf2715d | 1873 | |
be1bb652 | 1874 | case NOTE_INSN_EH_REGION_BEG: |
52a11cbf RH |
1875 | ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHB", |
1876 | NOTE_EH_HANDLER (insn)); | |
3d195391 | 1877 | break; |
3d195391 | 1878 | |
be1bb652 | 1879 | case NOTE_INSN_EH_REGION_END: |
52a11cbf RH |
1880 | ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHE", |
1881 | NOTE_EH_HANDLER (insn)); | |
3d195391 | 1882 | break; |
3d195391 | 1883 | |
be1bb652 | 1884 | case NOTE_INSN_PROLOGUE_END: |
5fd9b178 | 1885 | targetm.asm_out.function_end_prologue (file); |
3cf2715d | 1886 | profile_after_prologue (file); |
589fe865 DJ |
1887 | |
1888 | if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE) | |
1889 | { | |
1890 | *seen |= SEEN_EMITTED; | |
b8176fe4 | 1891 | force_source_line = true; |
589fe865 DJ |
1892 | } |
1893 | else | |
1894 | *seen |= SEEN_NOTE; | |
1895 | ||
3cf2715d | 1896 | break; |
3cf2715d | 1897 | |
be1bb652 | 1898 | case NOTE_INSN_EPILOGUE_BEG: |
cd9c1ca8 RH |
1899 | #if defined (DWARF2_UNWIND_INFO) && defined (HAVE_epilogue) |
1900 | if (dwarf2out_do_frame ()) | |
1901 | dwarf2out_begin_epilogue (insn); | |
1902 | #endif | |
5fd9b178 | 1903 | targetm.asm_out.function_begin_epilogue (file); |
be1bb652 | 1904 | break; |
3cf2715d | 1905 | |
cd9c1ca8 RH |
1906 | case NOTE_INSN_CFA_RESTORE_STATE: |
1907 | #if defined (DWARF2_UNWIND_INFO) | |
1908 | dwarf2out_frame_debug_restore_state (); | |
1909 | #endif | |
1910 | break; | |
1911 | ||
be1bb652 | 1912 | case NOTE_INSN_FUNCTION_BEG: |
653e276c | 1913 | app_disable (); |
725730f2 EB |
1914 | if (!DECL_IGNORED_P (current_function_decl)) |
1915 | debug_hooks->end_prologue (last_linenum, last_filename); | |
589fe865 DJ |
1916 | |
1917 | if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE) | |
1918 | { | |
1919 | *seen |= SEEN_EMITTED; | |
b8176fe4 | 1920 | force_source_line = true; |
589fe865 DJ |
1921 | } |
1922 | else | |
1923 | *seen |= SEEN_NOTE; | |
1924 | ||
3cf2715d | 1925 | break; |
be1bb652 RH |
1926 | |
1927 | case NOTE_INSN_BLOCK_BEG: | |
1928 | if (debug_info_level == DINFO_LEVEL_NORMAL | |
3cf2715d | 1929 | || debug_info_level == DINFO_LEVEL_VERBOSE |
7a0c8d71 DR |
1930 | || write_symbols == DWARF2_DEBUG |
1931 | || write_symbols == VMS_AND_DWARF2_DEBUG | |
1932 | || write_symbols == VMS_DEBUG) | |
be1bb652 RH |
1933 | { |
1934 | int n = BLOCK_NUMBER (NOTE_BLOCK (insn)); | |
3cf2715d | 1935 | |
be1bb652 RH |
1936 | app_disable (); |
1937 | ++block_depth; | |
1938 | high_block_linenum = last_linenum; | |
eac40081 | 1939 | |
a5a42b92 | 1940 | /* Output debugging info about the symbol-block beginning. */ |
725730f2 EB |
1941 | if (!DECL_IGNORED_P (current_function_decl)) |
1942 | debug_hooks->begin_block (last_linenum, n); | |
3cf2715d | 1943 | |
be1bb652 RH |
1944 | /* Mark this block as output. */ |
1945 | TREE_ASM_WRITTEN (NOTE_BLOCK (insn)) = 1; | |
1946 | } | |
d752cfdb JJ |
1947 | if (write_symbols == DBX_DEBUG |
1948 | || write_symbols == SDB_DEBUG) | |
1949 | { | |
1950 | location_t *locus_ptr | |
1951 | = block_nonartificial_location (NOTE_BLOCK (insn)); | |
1952 | ||
1953 | if (locus_ptr != NULL) | |
1954 | { | |
1955 | override_filename = LOCATION_FILE (*locus_ptr); | |
1956 | override_linenum = LOCATION_LINE (*locus_ptr); | |
1957 | } | |
1958 | } | |
be1bb652 | 1959 | break; |
18c038b9 | 1960 | |
be1bb652 RH |
1961 | case NOTE_INSN_BLOCK_END: |
1962 | if (debug_info_level == DINFO_LEVEL_NORMAL | |
1963 | || debug_info_level == DINFO_LEVEL_VERBOSE | |
7a0c8d71 DR |
1964 | || write_symbols == DWARF2_DEBUG |
1965 | || write_symbols == VMS_AND_DWARF2_DEBUG | |
1966 | || write_symbols == VMS_DEBUG) | |
be1bb652 RH |
1967 | { |
1968 | int n = BLOCK_NUMBER (NOTE_BLOCK (insn)); | |
3cf2715d | 1969 | |
be1bb652 RH |
1970 | app_disable (); |
1971 | ||
1972 | /* End of a symbol-block. */ | |
1973 | --block_depth; | |
0bccc606 | 1974 | gcc_assert (block_depth >= 0); |
3cf2715d | 1975 | |
725730f2 EB |
1976 | if (!DECL_IGNORED_P (current_function_decl)) |
1977 | debug_hooks->end_block (high_block_linenum, n); | |
be1bb652 | 1978 | } |
d752cfdb JJ |
1979 | if (write_symbols == DBX_DEBUG |
1980 | || write_symbols == SDB_DEBUG) | |
1981 | { | |
1982 | tree outer_block = BLOCK_SUPERCONTEXT (NOTE_BLOCK (insn)); | |
1983 | location_t *locus_ptr | |
1984 | = block_nonartificial_location (outer_block); | |
1985 | ||
1986 | if (locus_ptr != NULL) | |
1987 | { | |
1988 | override_filename = LOCATION_FILE (*locus_ptr); | |
1989 | override_linenum = LOCATION_LINE (*locus_ptr); | |
1990 | } | |
1991 | else | |
1992 | { | |
1993 | override_filename = NULL; | |
1994 | override_linenum = 0; | |
1995 | } | |
1996 | } | |
be1bb652 RH |
1997 | break; |
1998 | ||
1999 | case NOTE_INSN_DELETED_LABEL: | |
2000 | /* Emit the label. We may have deleted the CODE_LABEL because | |
2001 | the label could be proved to be unreachable, though still | |
2002 | referenced (in the form of having its address taken. */ | |
8215347e | 2003 | ASM_OUTPUT_DEBUG_LABEL (file, "L", CODE_LABEL_NUMBER (insn)); |
be1bb652 | 2004 | break; |
3cf2715d | 2005 | |
014a1138 | 2006 | case NOTE_INSN_VAR_LOCATION: |
725730f2 EB |
2007 | if (!DECL_IGNORED_P (current_function_decl)) |
2008 | debug_hooks->var_location (insn); | |
014a1138 JZ |
2009 | break; |
2010 | ||
be1bb652 | 2011 | default: |
a38e7aa5 | 2012 | gcc_unreachable (); |
f5d927c0 | 2013 | break; |
3cf2715d DE |
2014 | } |
2015 | break; | |
2016 | ||
2017 | case BARRIER: | |
f73ad30e | 2018 | #if defined (DWARF2_UNWIND_INFO) |
fbfa55b0 | 2019 | if (dwarf2out_do_frame ()) |
e0c0490b | 2020 | dwarf2out_frame_debug (insn, false); |
3cf2715d DE |
2021 | #endif |
2022 | break; | |
2023 | ||
2024 | case CODE_LABEL: | |
1dd8faa8 R |
2025 | /* The target port might emit labels in the output function for |
2026 | some insn, e.g. sh.c output_branchy_insn. */ | |
de7987a6 R |
2027 | if (CODE_LABEL_NUMBER (insn) <= max_labelno) |
2028 | { | |
2029 | int align = LABEL_TO_ALIGNMENT (insn); | |
50b2596f | 2030 | #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN |
9e423e6d | 2031 | int max_skip = LABEL_TO_MAX_SKIP (insn); |
50b2596f | 2032 | #endif |
fc470718 | 2033 | |
1dd8faa8 | 2034 | if (align && NEXT_INSN (insn)) |
40cdfca6 | 2035 | { |
9e423e6d | 2036 | #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN |
40cdfca6 | 2037 | ASM_OUTPUT_MAX_SKIP_ALIGN (file, align, max_skip); |
8e16ab99 SF |
2038 | #else |
2039 | #ifdef ASM_OUTPUT_ALIGN_WITH_NOP | |
2040 | ASM_OUTPUT_ALIGN_WITH_NOP (file, align); | |
9e423e6d | 2041 | #else |
40cdfca6 | 2042 | ASM_OUTPUT_ALIGN (file, align); |
8e16ab99 | 2043 | #endif |
9e423e6d | 2044 | #endif |
40cdfca6 | 2045 | } |
de7987a6 | 2046 | } |
9ef4c6ef | 2047 | #ifdef HAVE_cc0 |
3cf2715d | 2048 | CC_STATUS_INIT; |
9ef4c6ef | 2049 | #endif |
03ffa171 | 2050 | |
725730f2 EB |
2051 | if (!DECL_IGNORED_P (current_function_decl) && LABEL_NAME (insn)) |
2052 | debug_hooks->label (insn); | |
e1772ac0 | 2053 | |
bad4f40b | 2054 | app_disable (); |
b2a6a2fb JJ |
2055 | |
2056 | next = next_nonnote_insn (insn); | |
0676c393 MM |
2057 | /* If this label is followed by a jump-table, make sure we put |
2058 | the label in the read-only section. Also possibly write the | |
2059 | label and jump table together. */ | |
2060 | if (next != 0 && JUMP_TABLE_DATA_P (next)) | |
3cf2715d | 2061 | { |
e0d80184 | 2062 | #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC) |
0676c393 MM |
2063 | /* In this case, the case vector is being moved by the |
2064 | target, so don't output the label at all. Leave that | |
2065 | to the back end macros. */ | |
e0d80184 | 2066 | #else |
0676c393 MM |
2067 | if (! JUMP_TABLES_IN_TEXT_SECTION) |
2068 | { | |
2069 | int log_align; | |
340f7e7c | 2070 | |
0676c393 MM |
2071 | switch_to_section (targetm.asm_out.function_rodata_section |
2072 | (current_function_decl)); | |
340f7e7c RH |
2073 | |
2074 | #ifdef ADDR_VEC_ALIGN | |
0676c393 | 2075 | log_align = ADDR_VEC_ALIGN (next); |
340f7e7c | 2076 | #else |
0676c393 | 2077 | log_align = exact_log2 (BIGGEST_ALIGNMENT / BITS_PER_UNIT); |
340f7e7c | 2078 | #endif |
0676c393 MM |
2079 | ASM_OUTPUT_ALIGN (file, log_align); |
2080 | } | |
2081 | else | |
2082 | switch_to_section (current_function_section ()); | |
75197b37 | 2083 | |
3cf2715d | 2084 | #ifdef ASM_OUTPUT_CASE_LABEL |
0676c393 MM |
2085 | ASM_OUTPUT_CASE_LABEL (file, "L", CODE_LABEL_NUMBER (insn), |
2086 | next); | |
3cf2715d | 2087 | #else |
0676c393 | 2088 | targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn)); |
e0d80184 | 2089 | #endif |
3cf2715d | 2090 | #endif |
0676c393 | 2091 | break; |
3cf2715d | 2092 | } |
0dc36574 ZW |
2093 | if (LABEL_ALT_ENTRY_P (insn)) |
2094 | output_alternate_entry_point (file, insn); | |
8cd0faaf | 2095 | else |
5fd9b178 | 2096 | targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn)); |
3cf2715d DE |
2097 | break; |
2098 | ||
2099 | default: | |
2100 | { | |
b3694847 | 2101 | rtx body = PATTERN (insn); |
3cf2715d | 2102 | int insn_code_number; |
48c54229 | 2103 | const char *templ; |
ed5ef2e4 | 2104 | bool is_stmt; |
3cf2715d | 2105 | |
9a1a4737 PB |
2106 | /* Reset this early so it is correct for ASM statements. */ |
2107 | current_insn_predicate = NULL_RTX; | |
2929029c | 2108 | |
3cf2715d DE |
2109 | /* An INSN, JUMP_INSN or CALL_INSN. |
2110 | First check for special kinds that recog doesn't recognize. */ | |
2111 | ||
6614fd40 | 2112 | if (GET_CODE (body) == USE /* These are just declarations. */ |
3cf2715d DE |
2113 | || GET_CODE (body) == CLOBBER) |
2114 | break; | |
2115 | ||
2116 | #ifdef HAVE_cc0 | |
4928181c SB |
2117 | { |
2118 | /* If there is a REG_CC_SETTER note on this insn, it means that | |
2119 | the setting of the condition code was done in the delay slot | |
2120 | of the insn that branched here. So recover the cc status | |
2121 | from the insn that set it. */ | |
3cf2715d | 2122 | |
4928181c SB |
2123 | rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX); |
2124 | if (note) | |
2125 | { | |
2126 | NOTICE_UPDATE_CC (PATTERN (XEXP (note, 0)), XEXP (note, 0)); | |
2127 | cc_prev_status = cc_status; | |
2128 | } | |
2129 | } | |
3cf2715d DE |
2130 | #endif |
2131 | ||
2132 | /* Detect insns that are really jump-tables | |
2133 | and output them as such. */ | |
2134 | ||
2135 | if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC) | |
2136 | { | |
7f7f8214 | 2137 | #if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)) |
b3694847 | 2138 | int vlen, idx; |
7f7f8214 | 2139 | #endif |
3cf2715d | 2140 | |
b2a6a2fb | 2141 | if (! JUMP_TABLES_IN_TEXT_SECTION) |
d6b5193b RS |
2142 | switch_to_section (targetm.asm_out.function_rodata_section |
2143 | (current_function_decl)); | |
b2a6a2fb | 2144 | else |
d6b5193b | 2145 | switch_to_section (current_function_section ()); |
b2a6a2fb | 2146 | |
bad4f40b | 2147 | app_disable (); |
3cf2715d | 2148 | |
e0d80184 DM |
2149 | #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC) |
2150 | if (GET_CODE (body) == ADDR_VEC) | |
2151 | { | |
2152 | #ifdef ASM_OUTPUT_ADDR_VEC | |
2153 | ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn), body); | |
2154 | #else | |
0bccc606 | 2155 | gcc_unreachable (); |
e0d80184 DM |
2156 | #endif |
2157 | } | |
2158 | else | |
2159 | { | |
2160 | #ifdef ASM_OUTPUT_ADDR_DIFF_VEC | |
2161 | ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn), body); | |
2162 | #else | |
0bccc606 | 2163 | gcc_unreachable (); |
e0d80184 DM |
2164 | #endif |
2165 | } | |
2166 | #else | |
3cf2715d DE |
2167 | vlen = XVECLEN (body, GET_CODE (body) == ADDR_DIFF_VEC); |
2168 | for (idx = 0; idx < vlen; idx++) | |
2169 | { | |
2170 | if (GET_CODE (body) == ADDR_VEC) | |
2171 | { | |
2172 | #ifdef ASM_OUTPUT_ADDR_VEC_ELT | |
2173 | ASM_OUTPUT_ADDR_VEC_ELT | |
2174 | (file, CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 0, idx), 0))); | |
2175 | #else | |
0bccc606 | 2176 | gcc_unreachable (); |
3cf2715d DE |
2177 | #endif |
2178 | } | |
2179 | else | |
2180 | { | |
2181 | #ifdef ASM_OUTPUT_ADDR_DIFF_ELT | |
2182 | ASM_OUTPUT_ADDR_DIFF_ELT | |
2183 | (file, | |
33f7f353 | 2184 | body, |
3cf2715d DE |
2185 | CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 1, idx), 0)), |
2186 | CODE_LABEL_NUMBER (XEXP (XEXP (body, 0), 0))); | |
2187 | #else | |
0bccc606 | 2188 | gcc_unreachable (); |
3cf2715d DE |
2189 | #endif |
2190 | } | |
2191 | } | |
2192 | #ifdef ASM_OUTPUT_CASE_END | |
2193 | ASM_OUTPUT_CASE_END (file, | |
2194 | CODE_LABEL_NUMBER (PREV_INSN (insn)), | |
2195 | insn); | |
e0d80184 | 2196 | #endif |
3cf2715d DE |
2197 | #endif |
2198 | ||
d6b5193b | 2199 | switch_to_section (current_function_section ()); |
3cf2715d DE |
2200 | |
2201 | break; | |
2202 | } | |
0435312e JH |
2203 | /* Output this line note if it is the first or the last line |
2204 | note in a row. */ | |
725730f2 EB |
2205 | if (!DECL_IGNORED_P (current_function_decl) |
2206 | && notice_source_line (insn, &is_stmt)) | |
2207 | (*debug_hooks->source_line) (last_linenum, last_filename, | |
2208 | last_discriminator, is_stmt); | |
3cf2715d | 2209 | |
3cf2715d DE |
2210 | if (GET_CODE (body) == ASM_INPUT) |
2211 | { | |
36d7136e RH |
2212 | const char *string = XSTR (body, 0); |
2213 | ||
3cf2715d DE |
2214 | /* There's no telling what that did to the condition codes. */ |
2215 | CC_STATUS_INIT; | |
36d7136e RH |
2216 | |
2217 | if (string[0]) | |
3cf2715d | 2218 | { |
5ffeb913 | 2219 | expanded_location loc; |
bff4b63d | 2220 | |
3a694d86 | 2221 | app_enable (); |
5ffeb913 | 2222 | loc = expand_location (ASM_INPUT_SOURCE_LOCATION (body)); |
0de2ae02 | 2223 | if (*loc.file && loc.line) |
bff4b63d AO |
2224 | fprintf (asm_out_file, "%s %i \"%s\" 1\n", |
2225 | ASM_COMMENT_START, loc.line, loc.file); | |
36d7136e | 2226 | fprintf (asm_out_file, "\t%s\n", string); |
03943c05 AO |
2227 | #if HAVE_AS_LINE_ZERO |
2228 | if (*loc.file && loc.line) | |
bff4b63d | 2229 | fprintf (asm_out_file, "%s 0 \"\" 2\n", ASM_COMMENT_START); |
03943c05 | 2230 | #endif |
3cf2715d | 2231 | } |
3cf2715d DE |
2232 | break; |
2233 | } | |
2234 | ||
2235 | /* Detect `asm' construct with operands. */ | |
2236 | if (asm_noperands (body) >= 0) | |
2237 | { | |
22bf4422 | 2238 | unsigned int noperands = asm_noperands (body); |
1b4572a8 | 2239 | rtx *ops = XALLOCAVEC (rtx, noperands); |
3cce094d | 2240 | const char *string; |
bff4b63d | 2241 | location_t loc; |
5ffeb913 | 2242 | expanded_location expanded; |
3cf2715d DE |
2243 | |
2244 | /* There's no telling what that did to the condition codes. */ | |
2245 | CC_STATUS_INIT; | |
3cf2715d | 2246 | |
3cf2715d | 2247 | /* Get out the operand values. */ |
bff4b63d | 2248 | string = decode_asm_operands (body, ops, NULL, NULL, NULL, &loc); |
41129be2 | 2249 | /* Inhibit dying on what would otherwise be compiler bugs. */ |
3cf2715d DE |
2250 | insn_noperands = noperands; |
2251 | this_is_asm_operands = insn; | |
5ffeb913 | 2252 | expanded = expand_location (loc); |
3cf2715d | 2253 | |
ad7e39ca AO |
2254 | #ifdef FINAL_PRESCAN_INSN |
2255 | FINAL_PRESCAN_INSN (insn, ops, insn_noperands); | |
2256 | #endif | |
2257 | ||
3cf2715d | 2258 | /* Output the insn using them. */ |
36d7136e RH |
2259 | if (string[0]) |
2260 | { | |
3a694d86 | 2261 | app_enable (); |
5ffeb913 | 2262 | if (expanded.file && expanded.line) |
bff4b63d | 2263 | fprintf (asm_out_file, "%s %i \"%s\" 1\n", |
5ffeb913 | 2264 | ASM_COMMENT_START, expanded.line, expanded.file); |
36d7136e | 2265 | output_asm_insn (string, ops); |
03943c05 | 2266 | #if HAVE_AS_LINE_ZERO |
5ffeb913 | 2267 | if (expanded.file && expanded.line) |
bff4b63d | 2268 | fprintf (asm_out_file, "%s 0 \"\" 2\n", ASM_COMMENT_START); |
03943c05 | 2269 | #endif |
36d7136e RH |
2270 | } |
2271 | ||
1afc5373 CF |
2272 | if (targetm.asm_out.final_postscan_insn) |
2273 | targetm.asm_out.final_postscan_insn (file, insn, ops, | |
2274 | insn_noperands); | |
2275 | ||
3cf2715d DE |
2276 | this_is_asm_operands = 0; |
2277 | break; | |
2278 | } | |
2279 | ||
bad4f40b | 2280 | app_disable (); |
3cf2715d DE |
2281 | |
2282 | if (GET_CODE (body) == SEQUENCE) | |
2283 | { | |
2284 | /* A delayed-branch sequence */ | |
b3694847 | 2285 | int i; |
3cf2715d | 2286 | |
3cf2715d DE |
2287 | final_sequence = body; |
2288 | ||
d660cefe RS |
2289 | /* Record the delay slots' frame information before the branch. |
2290 | This is needed for delayed calls: see execute_cfa_program(). */ | |
2291 | #if defined (DWARF2_UNWIND_INFO) | |
2292 | if (dwarf2out_do_frame ()) | |
2293 | for (i = 1; i < XVECLEN (body, 0); i++) | |
e0c0490b | 2294 | dwarf2out_frame_debug (XVECEXP (body, 0, i), false); |
d660cefe RS |
2295 | #endif |
2296 | ||
3cf2715d DE |
2297 | /* The first insn in this SEQUENCE might be a JUMP_INSN that will |
2298 | force the restoration of a comparison that was previously | |
2299 | thought unnecessary. If that happens, cancel this sequence | |
2300 | and cause that insn to be restored. */ | |
2301 | ||
c9d691e9 | 2302 | next = final_scan_insn (XVECEXP (body, 0, 0), file, 0, 1, seen); |
3cf2715d DE |
2303 | if (next != XVECEXP (body, 0, 1)) |
2304 | { | |
2305 | final_sequence = 0; | |
2306 | return next; | |
2307 | } | |
2308 | ||
2309 | for (i = 1; i < XVECLEN (body, 0); i++) | |
c7eee2df RK |
2310 | { |
2311 | rtx insn = XVECEXP (body, 0, i); | |
2312 | rtx next = NEXT_INSN (insn); | |
2313 | /* We loop in case any instruction in a delay slot gets | |
2314 | split. */ | |
2315 | do | |
c9d691e9 | 2316 | insn = final_scan_insn (insn, file, 0, 1, seen); |
c7eee2df RK |
2317 | while (insn != next); |
2318 | } | |
3cf2715d DE |
2319 | #ifdef DBR_OUTPUT_SEQEND |
2320 | DBR_OUTPUT_SEQEND (file); | |
2321 | #endif | |
2322 | final_sequence = 0; | |
2323 | ||
2324 | /* If the insn requiring the delay slot was a CALL_INSN, the | |
2325 | insns in the delay slot are actually executed before the | |
2326 | called function. Hence we don't preserve any CC-setting | |
2327 | actions in these insns and the CC must be marked as being | |
2328 | clobbered by the function. */ | |
4b4bf941 | 2329 | if (CALL_P (XVECEXP (body, 0, 0))) |
b729186a JL |
2330 | { |
2331 | CC_STATUS_INIT; | |
2332 | } | |
3cf2715d DE |
2333 | break; |
2334 | } | |
2335 | ||
2336 | /* We have a real machine instruction as rtl. */ | |
2337 | ||
2338 | body = PATTERN (insn); | |
2339 | ||
2340 | #ifdef HAVE_cc0 | |
f5d927c0 | 2341 | set = single_set (insn); |
b88c92cc | 2342 | |
3cf2715d DE |
2343 | /* Check for redundant test and compare instructions |
2344 | (when the condition codes are already set up as desired). | |
2345 | This is done only when optimizing; if not optimizing, | |
2346 | it should be possible for the user to alter a variable | |
2347 | with the debugger in between statements | |
2348 | and the next statement should reexamine the variable | |
2349 | to compute the condition codes. */ | |
2350 | ||
30f5e9f5 | 2351 | if (optimize) |
3cf2715d | 2352 | { |
30f5e9f5 RK |
2353 | if (set |
2354 | && GET_CODE (SET_DEST (set)) == CC0 | |
2355 | && insn != last_ignored_compare) | |
3cf2715d | 2356 | { |
f90b7a5a | 2357 | rtx src1, src2; |
30f5e9f5 | 2358 | if (GET_CODE (SET_SRC (set)) == SUBREG) |
49d801d3 | 2359 | SET_SRC (set) = alter_subreg (&SET_SRC (set)); |
f90b7a5a PB |
2360 | |
2361 | src1 = SET_SRC (set); | |
2362 | src2 = NULL_RTX; | |
2363 | if (GET_CODE (SET_SRC (set)) == COMPARE) | |
30f5e9f5 RK |
2364 | { |
2365 | if (GET_CODE (XEXP (SET_SRC (set), 0)) == SUBREG) | |
2366 | XEXP (SET_SRC (set), 0) | |
49d801d3 | 2367 | = alter_subreg (&XEXP (SET_SRC (set), 0)); |
30f5e9f5 RK |
2368 | if (GET_CODE (XEXP (SET_SRC (set), 1)) == SUBREG) |
2369 | XEXP (SET_SRC (set), 1) | |
49d801d3 | 2370 | = alter_subreg (&XEXP (SET_SRC (set), 1)); |
f90b7a5a PB |
2371 | if (XEXP (SET_SRC (set), 1) |
2372 | == CONST0_RTX (GET_MODE (XEXP (SET_SRC (set), 0)))) | |
2373 | src2 = XEXP (SET_SRC (set), 0); | |
30f5e9f5 RK |
2374 | } |
2375 | if ((cc_status.value1 != 0 | |
f90b7a5a | 2376 | && rtx_equal_p (src1, cc_status.value1)) |
30f5e9f5 | 2377 | || (cc_status.value2 != 0 |
f90b7a5a PB |
2378 | && rtx_equal_p (src1, cc_status.value2)) |
2379 | || (src2 != 0 && cc_status.value1 != 0 | |
2380 | && rtx_equal_p (src2, cc_status.value1)) | |
2381 | || (src2 != 0 && cc_status.value2 != 0 | |
2382 | && rtx_equal_p (src2, cc_status.value2))) | |
3cf2715d | 2383 | { |
30f5e9f5 | 2384 | /* Don't delete insn if it has an addressing side-effect. */ |
ff81832f | 2385 | if (! FIND_REG_INC_NOTE (insn, NULL_RTX) |
30f5e9f5 RK |
2386 | /* or if anything in it is volatile. */ |
2387 | && ! volatile_refs_p (PATTERN (insn))) | |
2388 | { | |
2389 | /* We don't really delete the insn; just ignore it. */ | |
2390 | last_ignored_compare = insn; | |
2391 | break; | |
2392 | } | |
3cf2715d DE |
2393 | } |
2394 | } | |
2395 | } | |
3cf2715d | 2396 | |
3cf2715d DE |
2397 | /* If this is a conditional branch, maybe modify it |
2398 | if the cc's are in a nonstandard state | |
2399 | so that it accomplishes the same thing that it would | |
2400 | do straightforwardly if the cc's were set up normally. */ | |
2401 | ||
2402 | if (cc_status.flags != 0 | |
4b4bf941 | 2403 | && JUMP_P (insn) |
3cf2715d DE |
2404 | && GET_CODE (body) == SET |
2405 | && SET_DEST (body) == pc_rtx | |
2406 | && GET_CODE (SET_SRC (body)) == IF_THEN_ELSE | |
ec8e098d | 2407 | && COMPARISON_P (XEXP (SET_SRC (body), 0)) |
c9d691e9 | 2408 | && XEXP (XEXP (SET_SRC (body), 0), 0) == cc0_rtx) |
3cf2715d DE |
2409 | { |
2410 | /* This function may alter the contents of its argument | |
2411 | and clear some of the cc_status.flags bits. | |
2412 | It may also return 1 meaning condition now always true | |
2413 | or -1 meaning condition now always false | |
2414 | or 2 meaning condition nontrivial but altered. */ | |
b3694847 | 2415 | int result = alter_cond (XEXP (SET_SRC (body), 0)); |
3cf2715d DE |
2416 | /* If condition now has fixed value, replace the IF_THEN_ELSE |
2417 | with its then-operand or its else-operand. */ | |
2418 | if (result == 1) | |
2419 | SET_SRC (body) = XEXP (SET_SRC (body), 1); | |
2420 | if (result == -1) | |
2421 | SET_SRC (body) = XEXP (SET_SRC (body), 2); | |
2422 | ||
2423 | /* The jump is now either unconditional or a no-op. | |
2424 | If it has become a no-op, don't try to output it. | |
2425 | (It would not be recognized.) */ | |
2426 | if (SET_SRC (body) == pc_rtx) | |
2427 | { | |
ca6c03ca | 2428 | delete_insn (insn); |
3cf2715d DE |
2429 | break; |
2430 | } | |
2431 | else if (GET_CODE (SET_SRC (body)) == RETURN) | |
2432 | /* Replace (set (pc) (return)) with (return). */ | |
2433 | PATTERN (insn) = body = SET_SRC (body); | |
2434 | ||
2435 | /* Rerecognize the instruction if it has changed. */ | |
2436 | if (result != 0) | |
2437 | INSN_CODE (insn) = -1; | |
2438 | } | |
2439 | ||
604e4ce3 | 2440 | /* If this is a conditional trap, maybe modify it if the cc's |
604e4ce3 KH |
2441 | are in a nonstandard state so that it accomplishes the same |
2442 | thing that it would do straightforwardly if the cc's were | |
2443 | set up normally. */ | |
2444 | if (cc_status.flags != 0 | |
2445 | && NONJUMP_INSN_P (insn) | |
2446 | && GET_CODE (body) == TRAP_IF | |
2447 | && COMPARISON_P (TRAP_CONDITION (body)) | |
2448 | && XEXP (TRAP_CONDITION (body), 0) == cc0_rtx) | |
2449 | { | |
2450 | /* This function may alter the contents of its argument | |
2451 | and clear some of the cc_status.flags bits. | |
2452 | It may also return 1 meaning condition now always true | |
2453 | or -1 meaning condition now always false | |
2454 | or 2 meaning condition nontrivial but altered. */ | |
2455 | int result = alter_cond (TRAP_CONDITION (body)); | |
2456 | ||
2457 | /* If TRAP_CONDITION has become always false, delete the | |
2458 | instruction. */ | |
2459 | if (result == -1) | |
2460 | { | |
2461 | delete_insn (insn); | |
2462 | break; | |
2463 | } | |
2464 | ||
2465 | /* If TRAP_CONDITION has become always true, replace | |
2466 | TRAP_CONDITION with const_true_rtx. */ | |
2467 | if (result == 1) | |
2468 | TRAP_CONDITION (body) = const_true_rtx; | |
2469 | ||
2470 | /* Rerecognize the instruction if it has changed. */ | |
2471 | if (result != 0) | |
2472 | INSN_CODE (insn) = -1; | |
2473 | } | |
2474 | ||
3cf2715d | 2475 | /* Make same adjustments to instructions that examine the |
462da2af SC |
2476 | condition codes without jumping and instructions that |
2477 | handle conditional moves (if this machine has either one). */ | |
3cf2715d DE |
2478 | |
2479 | if (cc_status.flags != 0 | |
b88c92cc | 2480 | && set != 0) |
3cf2715d | 2481 | { |
462da2af | 2482 | rtx cond_rtx, then_rtx, else_rtx; |
f5d927c0 | 2483 | |
4b4bf941 | 2484 | if (!JUMP_P (insn) |
b88c92cc | 2485 | && GET_CODE (SET_SRC (set)) == IF_THEN_ELSE) |
462da2af | 2486 | { |
b88c92cc RK |
2487 | cond_rtx = XEXP (SET_SRC (set), 0); |
2488 | then_rtx = XEXP (SET_SRC (set), 1); | |
2489 | else_rtx = XEXP (SET_SRC (set), 2); | |
462da2af SC |
2490 | } |
2491 | else | |
2492 | { | |
b88c92cc | 2493 | cond_rtx = SET_SRC (set); |
462da2af SC |
2494 | then_rtx = const_true_rtx; |
2495 | else_rtx = const0_rtx; | |
2496 | } | |
f5d927c0 | 2497 | |
462da2af | 2498 | switch (GET_CODE (cond_rtx)) |
3cf2715d DE |
2499 | { |
2500 | case GTU: | |
2501 | case GT: | |
2502 | case LTU: | |
2503 | case LT: | |
2504 | case GEU: | |
2505 | case GE: | |
2506 | case LEU: | |
2507 | case LE: | |
2508 | case EQ: | |
2509 | case NE: | |
2510 | { | |
b3694847 | 2511 | int result; |
462da2af | 2512 | if (XEXP (cond_rtx, 0) != cc0_rtx) |
3cf2715d | 2513 | break; |
462da2af | 2514 | result = alter_cond (cond_rtx); |
3cf2715d | 2515 | if (result == 1) |
b88c92cc | 2516 | validate_change (insn, &SET_SRC (set), then_rtx, 0); |
3cf2715d | 2517 | else if (result == -1) |
b88c92cc | 2518 | validate_change (insn, &SET_SRC (set), else_rtx, 0); |
3cf2715d DE |
2519 | else if (result == 2) |
2520 | INSN_CODE (insn) = -1; | |
b88c92cc | 2521 | if (SET_DEST (set) == SET_SRC (set)) |
ca6c03ca | 2522 | delete_insn (insn); |
3cf2715d | 2523 | } |
e9a25f70 JL |
2524 | break; |
2525 | ||
2526 | default: | |
2527 | break; | |
3cf2715d DE |
2528 | } |
2529 | } | |
462da2af | 2530 | |
3cf2715d DE |
2531 | #endif |
2532 | ||
ede7cd44 | 2533 | #ifdef HAVE_peephole |
3cf2715d DE |
2534 | /* Do machine-specific peephole optimizations if desired. */ |
2535 | ||
2536 | if (optimize && !flag_no_peephole && !nopeepholes) | |
2537 | { | |
2538 | rtx next = peephole (insn); | |
2539 | /* When peepholing, if there were notes within the peephole, | |
2540 | emit them before the peephole. */ | |
2541 | if (next != 0 && next != NEXT_INSN (insn)) | |
2542 | { | |
a2785739 | 2543 | rtx note, prev = PREV_INSN (insn); |
3cf2715d DE |
2544 | |
2545 | for (note = NEXT_INSN (insn); note != next; | |
2546 | note = NEXT_INSN (note)) | |
c9d691e9 | 2547 | final_scan_insn (note, file, optimize, nopeepholes, seen); |
a2785739 ILT |
2548 | |
2549 | /* Put the notes in the proper position for a later | |
2550 | rescan. For example, the SH target can do this | |
2551 | when generating a far jump in a delayed branch | |
2552 | sequence. */ | |
2553 | note = NEXT_INSN (insn); | |
2554 | PREV_INSN (note) = prev; | |
2555 | NEXT_INSN (prev) = note; | |
2556 | NEXT_INSN (PREV_INSN (next)) = insn; | |
2557 | PREV_INSN (insn) = PREV_INSN (next); | |
2558 | NEXT_INSN (insn) = next; | |
2559 | PREV_INSN (next) = insn; | |
3cf2715d DE |
2560 | } |
2561 | ||
2562 | /* PEEPHOLE might have changed this. */ | |
2563 | body = PATTERN (insn); | |
2564 | } | |
ede7cd44 | 2565 | #endif |
3cf2715d DE |
2566 | |
2567 | /* Try to recognize the instruction. | |
2568 | If successful, verify that the operands satisfy the | |
2569 | constraints for the instruction. Crash if they don't, | |
2570 | since `reload' should have changed them so that they do. */ | |
2571 | ||
2572 | insn_code_number = recog_memoized (insn); | |
0304f787 | 2573 | cleanup_subreg_operands (insn); |
3cf2715d | 2574 | |
dd3f0101 KH |
2575 | /* Dump the insn in the assembly for debugging. */ |
2576 | if (flag_dump_rtl_in_asm) | |
2577 | { | |
2578 | print_rtx_head = ASM_COMMENT_START; | |
2579 | print_rtl_single (asm_out_file, insn); | |
2580 | print_rtx_head = ""; | |
2581 | } | |
b9f22704 | 2582 | |
6c698a6d | 2583 | if (! constrain_operands_cached (1)) |
3cf2715d | 2584 | fatal_insn_not_found (insn); |
3cf2715d DE |
2585 | |
2586 | /* Some target machines need to prescan each insn before | |
2587 | it is output. */ | |
2588 | ||
2589 | #ifdef FINAL_PRESCAN_INSN | |
1ccbefce | 2590 | FINAL_PRESCAN_INSN (insn, recog_data.operand, recog_data.n_operands); |
3cf2715d DE |
2591 | #endif |
2592 | ||
2929029c WG |
2593 | if (targetm.have_conditional_execution () |
2594 | && GET_CODE (PATTERN (insn)) == COND_EXEC) | |
afe48e06 | 2595 | current_insn_predicate = COND_EXEC_TEST (PATTERN (insn)); |
afe48e06 | 2596 | |
3cf2715d DE |
2597 | #ifdef HAVE_cc0 |
2598 | cc_prev_status = cc_status; | |
2599 | ||
2600 | /* Update `cc_status' for this instruction. | |
2601 | The instruction's output routine may change it further. | |
2602 | If the output routine for a jump insn needs to depend | |
2603 | on the cc status, it should look at cc_prev_status. */ | |
2604 | ||
2605 | NOTICE_UPDATE_CC (body, insn); | |
2606 | #endif | |
2607 | ||
b1a9f6a0 | 2608 | current_output_insn = debug_insn = insn; |
3cf2715d | 2609 | |
f73ad30e | 2610 | #if defined (DWARF2_UNWIND_INFO) |
4b4bf941 | 2611 | if (CALL_P (insn) && dwarf2out_do_frame ()) |
e0c0490b | 2612 | dwarf2out_frame_debug (insn, false); |
b57d9225 JM |
2613 | #endif |
2614 | ||
4bbf910e | 2615 | /* Find the proper template for this insn. */ |
48c54229 | 2616 | templ = get_insn_template (insn_code_number, insn); |
3cf2715d | 2617 | |
4bbf910e RH |
2618 | /* If the C code returns 0, it means that it is a jump insn |
2619 | which follows a deleted test insn, and that test insn | |
2620 | needs to be reinserted. */ | |
48c54229 | 2621 | if (templ == 0) |
3cf2715d | 2622 | { |
efd0378b HPN |
2623 | rtx prev; |
2624 | ||
0bccc606 | 2625 | gcc_assert (prev_nonnote_insn (insn) == last_ignored_compare); |
efd0378b HPN |
2626 | |
2627 | /* We have already processed the notes between the setter and | |
2628 | the user. Make sure we don't process them again, this is | |
2629 | particularly important if one of the notes is a block | |
2630 | scope note or an EH note. */ | |
2631 | for (prev = insn; | |
2632 | prev != last_ignored_compare; | |
2633 | prev = PREV_INSN (prev)) | |
2634 | { | |
4b4bf941 | 2635 | if (NOTE_P (prev)) |
ca6c03ca | 2636 | delete_insn (prev); /* Use delete_note. */ |
efd0378b HPN |
2637 | } |
2638 | ||
2639 | return prev; | |
3cf2715d DE |
2640 | } |
2641 | ||
2642 | /* If the template is the string "#", it means that this insn must | |
2643 | be split. */ | |
48c54229 | 2644 | if (templ[0] == '#' && templ[1] == '\0') |
3cf2715d | 2645 | { |
48c54229 | 2646 | rtx new_rtx = try_split (body, insn, 0); |
3cf2715d DE |
2647 | |
2648 | /* If we didn't split the insn, go away. */ | |
48c54229 | 2649 | if (new_rtx == insn && PATTERN (new_rtx) == body) |
c725bd79 | 2650 | fatal_insn ("could not split insn", insn); |
f5d927c0 | 2651 | |
3d14e82f JW |
2652 | #ifdef HAVE_ATTR_length |
2653 | /* This instruction should have been split in shorten_branches, | |
2654 | to ensure that we would have valid length info for the | |
2655 | splitees. */ | |
0bccc606 | 2656 | gcc_unreachable (); |
3d14e82f JW |
2657 | #endif |
2658 | ||
48c54229 | 2659 | return new_rtx; |
3cf2715d | 2660 | } |
f5d927c0 | 2661 | |
951120ea PB |
2662 | #ifdef TARGET_UNWIND_INFO |
2663 | /* ??? This will put the directives in the wrong place if | |
2664 | get_insn_template outputs assembly directly. However calling it | |
2665 | before get_insn_template breaks if the insns is split. */ | |
2666 | targetm.asm_out.unwind_emit (asm_out_file, insn); | |
ce152ef8 | 2667 | #endif |
3cf2715d | 2668 | |
f410e1b3 RAE |
2669 | if (CALL_P (insn)) |
2670 | { | |
2671 | rtx x = call_from_call_insn (insn); | |
2672 | x = XEXP (x, 0); | |
2673 | if (x && MEM_P (x) && GET_CODE (XEXP (x, 0)) == SYMBOL_REF) | |
2674 | { | |
2675 | tree t; | |
2676 | x = XEXP (x, 0); | |
2677 | t = SYMBOL_REF_DECL (x); | |
2678 | if (t) | |
2679 | assemble_external (t); | |
2680 | } | |
2681 | } | |
2682 | ||
951120ea | 2683 | /* Output assembler code from the template. */ |
48c54229 | 2684 | output_asm_insn (templ, recog_data.operand); |
3cf2715d | 2685 | |
77831620 CC |
2686 | /* Record point-of-call information for ICF debugging. */ |
2687 | if (flag_enable_icf_debug && CALL_P (insn)) | |
2688 | { | |
2689 | rtx x = call_from_call_insn (insn); | |
2690 | x = XEXP (x, 0); | |
2691 | if (x && MEM_P (x)) | |
2692 | { | |
2693 | if (GET_CODE (XEXP (x, 0)) == SYMBOL_REF) | |
2694 | { | |
2695 | tree t; | |
2696 | x = XEXP (x, 0); | |
2697 | t = SYMBOL_REF_DECL (x); | |
2698 | if (t) | |
2699 | (*debug_hooks->direct_call) (t); | |
2700 | } | |
2701 | else | |
2702 | (*debug_hooks->virtual_call) (INSN_UID (insn)); | |
2703 | } | |
2704 | } | |
2705 | ||
1afc5373 CF |
2706 | /* Some target machines need to postscan each insn after |
2707 | it is output. */ | |
2708 | if (targetm.asm_out.final_postscan_insn) | |
2709 | targetm.asm_out.final_postscan_insn (file, insn, recog_data.operand, | |
2710 | recog_data.n_operands); | |
2711 | ||
d660cefe RS |
2712 | /* If necessary, report the effect that the instruction has on |
2713 | the unwind info. We've already done this for delay slots | |
2714 | and call instructions. */ | |
0021b564 | 2715 | #if defined (DWARF2_UNWIND_INFO) |
e0c0490b | 2716 | if (final_sequence == 0 |
d660cefe RS |
2717 | #if !defined (HAVE_prologue) |
2718 | && !ACCUMULATE_OUTGOING_ARGS | |
2719 | #endif | |
fbfa55b0 | 2720 | && dwarf2out_do_frame ()) |
e0c0490b | 2721 | dwarf2out_frame_debug (insn, true); |
0021b564 | 2722 | #endif |
469ac993 | 2723 | |
b1a9f6a0 | 2724 | current_output_insn = debug_insn = 0; |
3cf2715d DE |
2725 | } |
2726 | } | |
2727 | return NEXT_INSN (insn); | |
2728 | } | |
2729 | \f | |
ed5ef2e4 CC |
2730 | /* Return whether a source line note needs to be emitted before INSN. |
2731 | Sets IS_STMT to TRUE if the line should be marked as a possible | |
2732 | breakpoint location. */ | |
3cf2715d | 2733 | |
0435312e | 2734 | static bool |
ed5ef2e4 | 2735 | notice_source_line (rtx insn, bool *is_stmt) |
3cf2715d | 2736 | { |
d752cfdb JJ |
2737 | const char *filename; |
2738 | int linenum; | |
2739 | ||
2740 | if (override_filename) | |
2741 | { | |
2742 | filename = override_filename; | |
2743 | linenum = override_linenum; | |
2744 | } | |
2745 | else | |
2746 | { | |
2747 | filename = insn_file (insn); | |
2748 | linenum = insn_line (insn); | |
2749 | } | |
3cf2715d | 2750 | |
ed5ef2e4 CC |
2751 | if (filename == NULL) |
2752 | return false; | |
2753 | ||
2754 | if (force_source_line | |
2755 | || filename != last_filename | |
2756 | || last_linenum != linenum) | |
0435312e | 2757 | { |
b8176fe4 | 2758 | force_source_line = false; |
0435312e JH |
2759 | last_filename = filename; |
2760 | last_linenum = linenum; | |
6c52e687 | 2761 | last_discriminator = discriminator; |
ed5ef2e4 | 2762 | *is_stmt = true; |
0435312e JH |
2763 | high_block_linenum = MAX (last_linenum, high_block_linenum); |
2764 | high_function_linenum = MAX (last_linenum, high_function_linenum); | |
2765 | return true; | |
2766 | } | |
ed5ef2e4 CC |
2767 | |
2768 | if (SUPPORTS_DISCRIMINATOR && last_discriminator != discriminator) | |
2769 | { | |
2770 | /* If the discriminator changed, but the line number did not, | |
2771 | output the line table entry with is_stmt false so the | |
2772 | debugger does not treat this as a breakpoint location. */ | |
2773 | last_discriminator = discriminator; | |
2774 | *is_stmt = false; | |
2775 | return true; | |
2776 | } | |
2777 | ||
0435312e | 2778 | return false; |
3cf2715d DE |
2779 | } |
2780 | \f | |
0304f787 JL |
2781 | /* For each operand in INSN, simplify (subreg (reg)) so that it refers |
2782 | directly to the desired hard register. */ | |
f5d927c0 | 2783 | |
0304f787 | 2784 | void |
6cf9ac28 | 2785 | cleanup_subreg_operands (rtx insn) |
0304f787 | 2786 | { |
f62a15e3 | 2787 | int i; |
6fb5fa3c | 2788 | bool changed = false; |
6c698a6d | 2789 | extract_insn_cached (insn); |
1ccbefce | 2790 | for (i = 0; i < recog_data.n_operands; i++) |
0304f787 | 2791 | { |
2067c116 | 2792 | /* The following test cannot use recog_data.operand when testing |
9f4524f2 RE |
2793 | for a SUBREG: the underlying object might have been changed |
2794 | already if we are inside a match_operator expression that | |
2795 | matches the else clause. Instead we test the underlying | |
2796 | expression directly. */ | |
2797 | if (GET_CODE (*recog_data.operand_loc[i]) == SUBREG) | |
6fb5fa3c DB |
2798 | { |
2799 | recog_data.operand[i] = alter_subreg (recog_data.operand_loc[i]); | |
2800 | changed = true; | |
2801 | } | |
1ccbefce | 2802 | else if (GET_CODE (recog_data.operand[i]) == PLUS |
04337620 | 2803 | || GET_CODE (recog_data.operand[i]) == MULT |
3c0cb5de | 2804 | || MEM_P (recog_data.operand[i])) |
6fb5fa3c | 2805 | recog_data.operand[i] = walk_alter_subreg (recog_data.operand_loc[i], &changed); |
0304f787 JL |
2806 | } |
2807 | ||
1ccbefce | 2808 | for (i = 0; i < recog_data.n_dups; i++) |
0304f787 | 2809 | { |
1ccbefce | 2810 | if (GET_CODE (*recog_data.dup_loc[i]) == SUBREG) |
6fb5fa3c DB |
2811 | { |
2812 | *recog_data.dup_loc[i] = alter_subreg (recog_data.dup_loc[i]); | |
2813 | changed = true; | |
2814 | } | |
1ccbefce | 2815 | else if (GET_CODE (*recog_data.dup_loc[i]) == PLUS |
04337620 | 2816 | || GET_CODE (*recog_data.dup_loc[i]) == MULT |
3c0cb5de | 2817 | || MEM_P (*recog_data.dup_loc[i])) |
6fb5fa3c | 2818 | *recog_data.dup_loc[i] = walk_alter_subreg (recog_data.dup_loc[i], &changed); |
0304f787 | 2819 | } |
6fb5fa3c DB |
2820 | if (changed) |
2821 | df_insn_rescan (insn); | |
0304f787 JL |
2822 | } |
2823 | ||
3cf2715d DE |
2824 | /* If X is a SUBREG, replace it with a REG or a MEM, |
2825 | based on the thing it is a subreg of. */ | |
2826 | ||
2827 | rtx | |
6cf9ac28 | 2828 | alter_subreg (rtx *xp) |
3cf2715d | 2829 | { |
49d801d3 | 2830 | rtx x = *xp; |
b3694847 | 2831 | rtx y = SUBREG_REG (x); |
f5963e61 | 2832 | |
49d801d3 JH |
2833 | /* simplify_subreg does not remove subreg from volatile references. |
2834 | We are required to. */ | |
3c0cb5de | 2835 | if (MEM_P (y)) |
fd326ba8 UW |
2836 | { |
2837 | int offset = SUBREG_BYTE (x); | |
2838 | ||
2839 | /* For paradoxical subregs on big-endian machines, SUBREG_BYTE | |
2840 | contains 0 instead of the proper offset. See simplify_subreg. */ | |
2841 | if (offset == 0 | |
2842 | && GET_MODE_SIZE (GET_MODE (y)) < GET_MODE_SIZE (GET_MODE (x))) | |
2843 | { | |
2844 | int difference = GET_MODE_SIZE (GET_MODE (y)) | |
2845 | - GET_MODE_SIZE (GET_MODE (x)); | |
2846 | if (WORDS_BIG_ENDIAN) | |
2847 | offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD; | |
2848 | if (BYTES_BIG_ENDIAN) | |
2849 | offset += difference % UNITS_PER_WORD; | |
2850 | } | |
2851 | ||
2852 | *xp = adjust_address (y, GET_MODE (x), offset); | |
2853 | } | |
49d801d3 | 2854 | else |
fea54805 | 2855 | { |
48c54229 | 2856 | rtx new_rtx = simplify_subreg (GET_MODE (x), y, GET_MODE (y), |
fea54805 RK |
2857 | SUBREG_BYTE (x)); |
2858 | ||
48c54229 KG |
2859 | if (new_rtx != 0) |
2860 | *xp = new_rtx; | |
bbe37912 | 2861 | else if (REG_P (y)) |
fea54805 | 2862 | { |
0bccc606 | 2863 | /* Simplify_subreg can't handle some REG cases, but we have to. */ |
38ae7651 RS |
2864 | unsigned int regno; |
2865 | HOST_WIDE_INT offset; | |
2866 | ||
2867 | regno = subreg_regno (x); | |
2868 | if (subreg_lowpart_p (x)) | |
2869 | offset = byte_lowpart_offset (GET_MODE (x), GET_MODE (y)); | |
2870 | else | |
2871 | offset = SUBREG_BYTE (x); | |
2872 | *xp = gen_rtx_REG_offset (y, GET_MODE (x), regno, offset); | |
fea54805 | 2873 | } |
fea54805 RK |
2874 | } |
2875 | ||
49d801d3 | 2876 | return *xp; |
3cf2715d DE |
2877 | } |
2878 | ||
2879 | /* Do alter_subreg on all the SUBREGs contained in X. */ | |
2880 | ||
2881 | static rtx | |
6fb5fa3c | 2882 | walk_alter_subreg (rtx *xp, bool *changed) |
3cf2715d | 2883 | { |
49d801d3 | 2884 | rtx x = *xp; |
3cf2715d DE |
2885 | switch (GET_CODE (x)) |
2886 | { | |
2887 | case PLUS: | |
2888 | case MULT: | |
beed8fc0 | 2889 | case AND: |
6fb5fa3c DB |
2890 | XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0), changed); |
2891 | XEXP (x, 1) = walk_alter_subreg (&XEXP (x, 1), changed); | |
3cf2715d DE |
2892 | break; |
2893 | ||
2894 | case MEM: | |
beed8fc0 | 2895 | case ZERO_EXTEND: |
6fb5fa3c | 2896 | XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0), changed); |
3cf2715d DE |
2897 | break; |
2898 | ||
2899 | case SUBREG: | |
6fb5fa3c | 2900 | *changed = true; |
49d801d3 | 2901 | return alter_subreg (xp); |
f5d927c0 | 2902 | |
e9a25f70 JL |
2903 | default: |
2904 | break; | |
3cf2715d DE |
2905 | } |
2906 | ||
5bc72aeb | 2907 | return *xp; |
3cf2715d DE |
2908 | } |
2909 | \f | |
2910 | #ifdef HAVE_cc0 | |
2911 | ||
2912 | /* Given BODY, the body of a jump instruction, alter the jump condition | |
2913 | as required by the bits that are set in cc_status.flags. | |
2914 | Not all of the bits there can be handled at this level in all cases. | |
2915 | ||
2916 | The value is normally 0. | |
2917 | 1 means that the condition has become always true. | |
2918 | -1 means that the condition has become always false. | |
2919 | 2 means that COND has been altered. */ | |
2920 | ||
2921 | static int | |
6cf9ac28 | 2922 | alter_cond (rtx cond) |
3cf2715d DE |
2923 | { |
2924 | int value = 0; | |
2925 | ||
2926 | if (cc_status.flags & CC_REVERSED) | |
2927 | { | |
2928 | value = 2; | |
2929 | PUT_CODE (cond, swap_condition (GET_CODE (cond))); | |
2930 | } | |
2931 | ||
2932 | if (cc_status.flags & CC_INVERTED) | |
2933 | { | |
2934 | value = 2; | |
2935 | PUT_CODE (cond, reverse_condition (GET_CODE (cond))); | |
2936 | } | |
2937 | ||
2938 | if (cc_status.flags & CC_NOT_POSITIVE) | |
2939 | switch (GET_CODE (cond)) | |
2940 | { | |
2941 | case LE: | |
2942 | case LEU: | |
2943 | case GEU: | |
2944 | /* Jump becomes unconditional. */ | |
2945 | return 1; | |
2946 | ||
2947 | case GT: | |
2948 | case GTU: | |
2949 | case LTU: | |
2950 | /* Jump becomes no-op. */ | |
2951 | return -1; | |
2952 | ||
2953 | case GE: | |
2954 | PUT_CODE (cond, EQ); | |
2955 | value = 2; | |
2956 | break; | |
2957 | ||
2958 | case LT: | |
2959 | PUT_CODE (cond, NE); | |
2960 | value = 2; | |
2961 | break; | |
f5d927c0 | 2962 | |
e9a25f70 JL |
2963 | default: |
2964 | break; | |
3cf2715d DE |
2965 | } |
2966 | ||
2967 | if (cc_status.flags & CC_NOT_NEGATIVE) | |
2968 | switch (GET_CODE (cond)) | |
2969 | { | |
2970 | case GE: | |
2971 | case GEU: | |
2972 | /* Jump becomes unconditional. */ | |
2973 | return 1; | |
2974 | ||
2975 | case LT: | |
2976 | case LTU: | |
2977 | /* Jump becomes no-op. */ | |
2978 | return -1; | |
2979 | ||
2980 | case LE: | |
2981 | case LEU: | |
2982 | PUT_CODE (cond, EQ); | |
2983 | value = 2; | |
2984 | break; | |
2985 | ||
2986 | case GT: | |
2987 | case GTU: | |
2988 | PUT_CODE (cond, NE); | |
2989 | value = 2; | |
2990 | break; | |
f5d927c0 | 2991 | |
e9a25f70 JL |
2992 | default: |
2993 | break; | |
3cf2715d DE |
2994 | } |
2995 | ||
2996 | if (cc_status.flags & CC_NO_OVERFLOW) | |
2997 | switch (GET_CODE (cond)) | |
2998 | { | |
2999 | case GEU: | |
3000 | /* Jump becomes unconditional. */ | |
3001 | return 1; | |
3002 | ||
3003 | case LEU: | |
3004 | PUT_CODE (cond, EQ); | |
3005 | value = 2; | |
3006 | break; | |
3007 | ||
3008 | case GTU: | |
3009 | PUT_CODE (cond, NE); | |
3010 | value = 2; | |
3011 | break; | |
3012 | ||
3013 | case LTU: | |
3014 | /* Jump becomes no-op. */ | |
3015 | return -1; | |
f5d927c0 | 3016 | |
e9a25f70 JL |
3017 | default: |
3018 | break; | |
3cf2715d DE |
3019 | } |
3020 | ||
3021 | if (cc_status.flags & (CC_Z_IN_NOT_N | CC_Z_IN_N)) | |
3022 | switch (GET_CODE (cond)) | |
3023 | { | |
e9a25f70 | 3024 | default: |
0bccc606 | 3025 | gcc_unreachable (); |
3cf2715d DE |
3026 | |
3027 | case NE: | |
3028 | PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? GE : LT); | |
3029 | value = 2; | |
3030 | break; | |
3031 | ||
3032 | case EQ: | |
3033 | PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? LT : GE); | |
3034 | value = 2; | |
3035 | break; | |
3036 | } | |
3037 | ||
3038 | if (cc_status.flags & CC_NOT_SIGNED) | |
3039 | /* The flags are valid if signed condition operators are converted | |
3040 | to unsigned. */ | |
3041 | switch (GET_CODE (cond)) | |
3042 | { | |
3043 | case LE: | |
3044 | PUT_CODE (cond, LEU); | |
3045 | value = 2; | |
3046 | break; | |
3047 | ||
3048 | case LT: | |
3049 | PUT_CODE (cond, LTU); | |
3050 | value = 2; | |
3051 | break; | |
3052 | ||
3053 | case GT: | |
3054 | PUT_CODE (cond, GTU); | |
3055 | value = 2; | |
3056 | break; | |
3057 | ||
3058 | case GE: | |
3059 | PUT_CODE (cond, GEU); | |
3060 | value = 2; | |
3061 | break; | |
e9a25f70 JL |
3062 | |
3063 | default: | |
3064 | break; | |
3cf2715d DE |
3065 | } |
3066 | ||
3067 | return value; | |
3068 | } | |
3069 | #endif | |
3070 | \f | |
3071 | /* Report inconsistency between the assembler template and the operands. | |
3072 | In an `asm', it's the user's fault; otherwise, the compiler's fault. */ | |
3073 | ||
3074 | void | |
4b794eaf | 3075 | output_operand_lossage (const char *cmsgid, ...) |
3cf2715d | 3076 | { |
a52453cc PT |
3077 | char *fmt_string; |
3078 | char *new_message; | |
fd478a0a | 3079 | const char *pfx_str; |
e34d07f2 | 3080 | va_list ap; |
6cf9ac28 | 3081 | |
4b794eaf | 3082 | va_start (ap, cmsgid); |
a52453cc | 3083 | |
9e637a26 | 3084 | pfx_str = this_is_asm_operands ? _("invalid 'asm': ") : "output_operand: "; |
4b794eaf | 3085 | asprintf (&fmt_string, "%s%s", pfx_str, _(cmsgid)); |
a52453cc | 3086 | vasprintf (&new_message, fmt_string, ap); |
dd3f0101 | 3087 | |
3cf2715d | 3088 | if (this_is_asm_operands) |
a52453cc | 3089 | error_for_asm (this_is_asm_operands, "%s", new_message); |
3cf2715d | 3090 | else |
a52453cc PT |
3091 | internal_error ("%s", new_message); |
3092 | ||
3093 | free (fmt_string); | |
3094 | free (new_message); | |
e34d07f2 | 3095 | va_end (ap); |
3cf2715d DE |
3096 | } |
3097 | \f | |
3098 | /* Output of assembler code from a template, and its subroutines. */ | |
3099 | ||
0d4903b8 RK |
3100 | /* Annotate the assembly with a comment describing the pattern and |
3101 | alternative used. */ | |
3102 | ||
3103 | static void | |
6cf9ac28 | 3104 | output_asm_name (void) |
0d4903b8 RK |
3105 | { |
3106 | if (debug_insn) | |
3107 | { | |
3108 | int num = INSN_CODE (debug_insn); | |
3109 | fprintf (asm_out_file, "\t%s %d\t%s", | |
3110 | ASM_COMMENT_START, INSN_UID (debug_insn), | |
3111 | insn_data[num].name); | |
3112 | if (insn_data[num].n_alternatives > 1) | |
3113 | fprintf (asm_out_file, "/%d", which_alternative + 1); | |
3114 | #ifdef HAVE_ATTR_length | |
3115 | fprintf (asm_out_file, "\t[length = %d]", | |
3116 | get_attr_length (debug_insn)); | |
3117 | #endif | |
3118 | /* Clear this so only the first assembler insn | |
3119 | of any rtl insn will get the special comment for -dp. */ | |
3120 | debug_insn = 0; | |
3121 | } | |
3122 | } | |
3123 | ||
998d7deb RH |
3124 | /* If OP is a REG or MEM and we can find a MEM_EXPR corresponding to it |
3125 | or its address, return that expr . Set *PADDRESSP to 1 if the expr | |
c5adc06a RK |
3126 | corresponds to the address of the object and 0 if to the object. */ |
3127 | ||
3128 | static tree | |
6cf9ac28 | 3129 | get_mem_expr_from_op (rtx op, int *paddressp) |
c5adc06a | 3130 | { |
998d7deb | 3131 | tree expr; |
c5adc06a RK |
3132 | int inner_addressp; |
3133 | ||
3134 | *paddressp = 0; | |
3135 | ||
f8cfc6aa | 3136 | if (REG_P (op)) |
a560d4d4 | 3137 | return REG_EXPR (op); |
3c0cb5de | 3138 | else if (!MEM_P (op)) |
c5adc06a RK |
3139 | return 0; |
3140 | ||
998d7deb RH |
3141 | if (MEM_EXPR (op) != 0) |
3142 | return MEM_EXPR (op); | |
c5adc06a RK |
3143 | |
3144 | /* Otherwise we have an address, so indicate it and look at the address. */ | |
3145 | *paddressp = 1; | |
3146 | op = XEXP (op, 0); | |
3147 | ||
3148 | /* First check if we have a decl for the address, then look at the right side | |
3149 | if it is a PLUS. Otherwise, strip off arithmetic and keep looking. | |
3150 | But don't allow the address to itself be indirect. */ | |
998d7deb RH |
3151 | if ((expr = get_mem_expr_from_op (op, &inner_addressp)) && ! inner_addressp) |
3152 | return expr; | |
c5adc06a | 3153 | else if (GET_CODE (op) == PLUS |
998d7deb RH |
3154 | && (expr = get_mem_expr_from_op (XEXP (op, 1), &inner_addressp))) |
3155 | return expr; | |
c5adc06a | 3156 | |
481683e1 | 3157 | while (UNARY_P (op) |
ec8e098d | 3158 | || GET_RTX_CLASS (GET_CODE (op)) == RTX_BIN_ARITH) |
c5adc06a RK |
3159 | op = XEXP (op, 0); |
3160 | ||
998d7deb RH |
3161 | expr = get_mem_expr_from_op (op, &inner_addressp); |
3162 | return inner_addressp ? 0 : expr; | |
c5adc06a | 3163 | } |
ff81832f | 3164 | |
4f9b4029 RK |
3165 | /* Output operand names for assembler instructions. OPERANDS is the |
3166 | operand vector, OPORDER is the order to write the operands, and NOPS | |
3167 | is the number of operands to write. */ | |
3168 | ||
3169 | static void | |
6cf9ac28 | 3170 | output_asm_operand_names (rtx *operands, int *oporder, int nops) |
4f9b4029 RK |
3171 | { |
3172 | int wrote = 0; | |
3173 | int i; | |
3174 | ||
3175 | for (i = 0; i < nops; i++) | |
3176 | { | |
3177 | int addressp; | |
a560d4d4 JH |
3178 | rtx op = operands[oporder[i]]; |
3179 | tree expr = get_mem_expr_from_op (op, &addressp); | |
4f9b4029 | 3180 | |
a560d4d4 JH |
3181 | fprintf (asm_out_file, "%c%s", |
3182 | wrote ? ',' : '\t', wrote ? "" : ASM_COMMENT_START); | |
3183 | wrote = 1; | |
998d7deb | 3184 | if (expr) |
4f9b4029 | 3185 | { |
a560d4d4 | 3186 | fprintf (asm_out_file, "%s", |
998d7deb RH |
3187 | addressp ? "*" : ""); |
3188 | print_mem_expr (asm_out_file, expr); | |
4f9b4029 RK |
3189 | wrote = 1; |
3190 | } | |
a560d4d4 JH |
3191 | else if (REG_P (op) && ORIGINAL_REGNO (op) |
3192 | && ORIGINAL_REGNO (op) != REGNO (op)) | |
3193 | fprintf (asm_out_file, " tmp%i", ORIGINAL_REGNO (op)); | |
4f9b4029 RK |
3194 | } |
3195 | } | |
3196 | ||
3cf2715d DE |
3197 | /* Output text from TEMPLATE to the assembler output file, |
3198 | obeying %-directions to substitute operands taken from | |
3199 | the vector OPERANDS. | |
3200 | ||
3201 | %N (for N a digit) means print operand N in usual manner. | |
3202 | %lN means require operand N to be a CODE_LABEL or LABEL_REF | |
3203 | and print the label name with no punctuation. | |
3204 | %cN means require operand N to be a constant | |
3205 | and print the constant expression with no punctuation. | |
3206 | %aN means expect operand N to be a memory address | |
3207 | (not a memory reference!) and print a reference | |
3208 | to that address. | |
3209 | %nN means expect operand N to be a constant | |
3210 | and print a constant expression for minus the value | |
3211 | of the operand, with no other punctuation. */ | |
3212 | ||
3213 | void | |
48c54229 | 3214 | output_asm_insn (const char *templ, rtx *operands) |
3cf2715d | 3215 | { |
b3694847 SS |
3216 | const char *p; |
3217 | int c; | |
8554d9a4 JJ |
3218 | #ifdef ASSEMBLER_DIALECT |
3219 | int dialect = 0; | |
3220 | #endif | |
0d4903b8 | 3221 | int oporder[MAX_RECOG_OPERANDS]; |
4f9b4029 | 3222 | char opoutput[MAX_RECOG_OPERANDS]; |
0d4903b8 | 3223 | int ops = 0; |
3cf2715d DE |
3224 | |
3225 | /* An insn may return a null string template | |
3226 | in a case where no assembler code is needed. */ | |
48c54229 | 3227 | if (*templ == 0) |
3cf2715d DE |
3228 | return; |
3229 | ||
4f9b4029 | 3230 | memset (opoutput, 0, sizeof opoutput); |
48c54229 | 3231 | p = templ; |
3cf2715d DE |
3232 | putc ('\t', asm_out_file); |
3233 | ||
3234 | #ifdef ASM_OUTPUT_OPCODE | |
3235 | ASM_OUTPUT_OPCODE (asm_out_file, p); | |
3236 | #endif | |
3237 | ||
b729186a | 3238 | while ((c = *p++)) |
3cf2715d DE |
3239 | switch (c) |
3240 | { | |
3cf2715d | 3241 | case '\n': |
4f9b4029 RK |
3242 | if (flag_verbose_asm) |
3243 | output_asm_operand_names (operands, oporder, ops); | |
0d4903b8 RK |
3244 | if (flag_print_asm_name) |
3245 | output_asm_name (); | |
3246 | ||
4f9b4029 RK |
3247 | ops = 0; |
3248 | memset (opoutput, 0, sizeof opoutput); | |
3249 | ||
3cf2715d | 3250 | putc (c, asm_out_file); |
cb649530 | 3251 | #ifdef ASM_OUTPUT_OPCODE |
3cf2715d DE |
3252 | while ((c = *p) == '\t') |
3253 | { | |
3254 | putc (c, asm_out_file); | |
3255 | p++; | |
3256 | } | |
3257 | ASM_OUTPUT_OPCODE (asm_out_file, p); | |
3cf2715d | 3258 | #endif |
cb649530 | 3259 | break; |
3cf2715d DE |
3260 | |
3261 | #ifdef ASSEMBLER_DIALECT | |
3262 | case '{': | |
b729186a | 3263 | { |
b3694847 | 3264 | int i; |
f5d927c0 | 3265 | |
8554d9a4 JJ |
3266 | if (dialect) |
3267 | output_operand_lossage ("nested assembly dialect alternatives"); | |
3268 | else | |
3269 | dialect = 1; | |
3270 | ||
b729186a JL |
3271 | /* If we want the first dialect, do nothing. Otherwise, skip |
3272 | DIALECT_NUMBER of strings ending with '|'. */ | |
3273 | for (i = 0; i < dialect_number; i++) | |
3274 | { | |
463a8384 | 3275 | while (*p && *p != '}' && *p++ != '|') |
b729186a | 3276 | ; |
463a8384 BS |
3277 | if (*p == '}') |
3278 | break; | |
b729186a JL |
3279 | if (*p == '|') |
3280 | p++; | |
3281 | } | |
8554d9a4 JJ |
3282 | |
3283 | if (*p == '\0') | |
3284 | output_operand_lossage ("unterminated assembly dialect alternative"); | |
b729186a | 3285 | } |
3cf2715d DE |
3286 | break; |
3287 | ||
3288 | case '|': | |
8554d9a4 JJ |
3289 | if (dialect) |
3290 | { | |
3291 | /* Skip to close brace. */ | |
3292 | do | |
3293 | { | |
3294 | if (*p == '\0') | |
3295 | { | |
3296 | output_operand_lossage ("unterminated assembly dialect alternative"); | |
3297 | break; | |
3298 | } | |
ff81832f | 3299 | } |
8554d9a4 JJ |
3300 | while (*p++ != '}'); |
3301 | dialect = 0; | |
3302 | } | |
3303 | else | |
3304 | putc (c, asm_out_file); | |
3cf2715d DE |
3305 | break; |
3306 | ||
3307 | case '}': | |
8554d9a4 JJ |
3308 | if (! dialect) |
3309 | putc (c, asm_out_file); | |
3310 | dialect = 0; | |
3cf2715d DE |
3311 | break; |
3312 | #endif | |
3313 | ||
3314 | case '%': | |
3315 | /* %% outputs a single %. */ | |
3316 | if (*p == '%') | |
3317 | { | |
3318 | p++; | |
3319 | putc (c, asm_out_file); | |
3320 | } | |
3321 | /* %= outputs a number which is unique to each insn in the entire | |
3322 | compilation. This is useful for making local labels that are | |
3323 | referred to more than once in a given insn. */ | |
3324 | else if (*p == '=') | |
3325 | { | |
3326 | p++; | |
3327 | fprintf (asm_out_file, "%d", insn_counter); | |
3328 | } | |
3329 | /* % followed by a letter and some digits | |
3330 | outputs an operand in a special way depending on the letter. | |
3331 | Letters `acln' are implemented directly. | |
3332 | Other letters are passed to `output_operand' so that | |
3333 | the PRINT_OPERAND macro can define them. */ | |
0df6c2c7 | 3334 | else if (ISALPHA (*p)) |
3cf2715d DE |
3335 | { |
3336 | int letter = *p++; | |
c383c15f GK |
3337 | unsigned long opnum; |
3338 | char *endptr; | |
b0efb46b | 3339 | |
c383c15f GK |
3340 | opnum = strtoul (p, &endptr, 10); |
3341 | ||
3342 | if (endptr == p) | |
3343 | output_operand_lossage ("operand number missing " | |
3344 | "after %%-letter"); | |
3345 | else if (this_is_asm_operands && opnum >= insn_noperands) | |
3cf2715d DE |
3346 | output_operand_lossage ("operand number out of range"); |
3347 | else if (letter == 'l') | |
c383c15f | 3348 | output_asm_label (operands[opnum]); |
3cf2715d | 3349 | else if (letter == 'a') |
c383c15f | 3350 | output_address (operands[opnum]); |
3cf2715d DE |
3351 | else if (letter == 'c') |
3352 | { | |
c383c15f GK |
3353 | if (CONSTANT_ADDRESS_P (operands[opnum])) |
3354 | output_addr_const (asm_out_file, operands[opnum]); | |
3cf2715d | 3355 | else |
c383c15f | 3356 | output_operand (operands[opnum], 'c'); |
3cf2715d DE |
3357 | } |
3358 | else if (letter == 'n') | |
3359 | { | |
481683e1 | 3360 | if (CONST_INT_P (operands[opnum])) |
21e3a81b | 3361 | fprintf (asm_out_file, HOST_WIDE_INT_PRINT_DEC, |
c383c15f | 3362 | - INTVAL (operands[opnum])); |
3cf2715d DE |
3363 | else |
3364 | { | |
3365 | putc ('-', asm_out_file); | |
c383c15f | 3366 | output_addr_const (asm_out_file, operands[opnum]); |
3cf2715d DE |
3367 | } |
3368 | } | |
3369 | else | |
c383c15f | 3370 | output_operand (operands[opnum], letter); |
f5d927c0 | 3371 | |
c383c15f | 3372 | if (!opoutput[opnum]) |
dc9d0b14 | 3373 | oporder[ops++] = opnum; |
c383c15f | 3374 | opoutput[opnum] = 1; |
0d4903b8 | 3375 | |
c383c15f GK |
3376 | p = endptr; |
3377 | c = *p; | |
3cf2715d DE |
3378 | } |
3379 | /* % followed by a digit outputs an operand the default way. */ | |
0df6c2c7 | 3380 | else if (ISDIGIT (*p)) |
3cf2715d | 3381 | { |
c383c15f GK |
3382 | unsigned long opnum; |
3383 | char *endptr; | |
b0efb46b | 3384 | |
c383c15f GK |
3385 | opnum = strtoul (p, &endptr, 10); |
3386 | if (this_is_asm_operands && opnum >= insn_noperands) | |
3cf2715d DE |
3387 | output_operand_lossage ("operand number out of range"); |
3388 | else | |
c383c15f | 3389 | output_operand (operands[opnum], 0); |
0d4903b8 | 3390 | |
c383c15f | 3391 | if (!opoutput[opnum]) |
dc9d0b14 | 3392 | oporder[ops++] = opnum; |
c383c15f | 3393 | opoutput[opnum] = 1; |
4f9b4029 | 3394 | |
c383c15f GK |
3395 | p = endptr; |
3396 | c = *p; | |
3cf2715d DE |
3397 | } |
3398 | /* % followed by punctuation: output something for that | |
3399 | punctuation character alone, with no operand. | |
3400 | The PRINT_OPERAND macro decides what is actually done. */ | |
3401 | #ifdef PRINT_OPERAND_PUNCT_VALID_P | |
f5d927c0 | 3402 | else if (PRINT_OPERAND_PUNCT_VALID_P ((unsigned char) *p)) |
3cf2715d DE |
3403 | output_operand (NULL_RTX, *p++); |
3404 | #endif | |
3405 | else | |
3406 | output_operand_lossage ("invalid %%-code"); | |
3407 | break; | |
3408 | ||
3409 | default: | |
3410 | putc (c, asm_out_file); | |
3411 | } | |
3412 | ||
0d4903b8 RK |
3413 | /* Write out the variable names for operands, if we know them. */ |
3414 | if (flag_verbose_asm) | |
4f9b4029 | 3415 | output_asm_operand_names (operands, oporder, ops); |
0d4903b8 RK |
3416 | if (flag_print_asm_name) |
3417 | output_asm_name (); | |
3cf2715d DE |
3418 | |
3419 | putc ('\n', asm_out_file); | |
3420 | } | |
3421 | \f | |
3422 | /* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */ | |
3423 | ||
3424 | void | |
6cf9ac28 | 3425 | output_asm_label (rtx x) |
3cf2715d DE |
3426 | { |
3427 | char buf[256]; | |
3428 | ||
3429 | if (GET_CODE (x) == LABEL_REF) | |
be1bb652 | 3430 | x = XEXP (x, 0); |
4b4bf941 JQ |
3431 | if (LABEL_P (x) |
3432 | || (NOTE_P (x) | |
a38e7aa5 | 3433 | && NOTE_KIND (x) == NOTE_INSN_DELETED_LABEL)) |
3cf2715d DE |
3434 | ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x)); |
3435 | else | |
9e637a26 | 3436 | output_operand_lossage ("'%%l' operand isn't a label"); |
3cf2715d DE |
3437 | |
3438 | assemble_name (asm_out_file, buf); | |
3439 | } | |
3440 | ||
a7fe25b8 JJ |
3441 | /* Helper rtx-iteration-function for mark_symbol_refs_as_used and |
3442 | output_operand. Marks SYMBOL_REFs as referenced through use of | |
3443 | assemble_external. */ | |
c70d0414 HPN |
3444 | |
3445 | static int | |
3446 | mark_symbol_ref_as_used (rtx *xp, void *dummy ATTRIBUTE_UNUSED) | |
3447 | { | |
3448 | rtx x = *xp; | |
3449 | ||
3450 | /* If we have a used symbol, we may have to emit assembly | |
3451 | annotations corresponding to whether the symbol is external, weak | |
3452 | or has non-default visibility. */ | |
3453 | if (GET_CODE (x) == SYMBOL_REF) | |
3454 | { | |
3455 | tree t; | |
3456 | ||
3457 | t = SYMBOL_REF_DECL (x); | |
3458 | if (t) | |
3459 | assemble_external (t); | |
3460 | ||
3461 | return -1; | |
3462 | } | |
3463 | ||
3464 | return 0; | |
3465 | } | |
3466 | ||
a7fe25b8 JJ |
3467 | /* Marks SYMBOL_REFs in x as referenced through use of assemble_external. */ |
3468 | ||
3469 | void | |
3470 | mark_symbol_refs_as_used (rtx x) | |
3471 | { | |
3472 | for_each_rtx (&x, mark_symbol_ref_as_used, NULL); | |
3473 | } | |
3474 | ||
3cf2715d DE |
3475 | /* Print operand X using machine-dependent assembler syntax. |
3476 | The macro PRINT_OPERAND is defined just to control this function. | |
3477 | CODE is a non-digit that preceded the operand-number in the % spec, | |
3478 | such as 'z' if the spec was `%z3'. CODE is 0 if there was no char | |
3479 | between the % and the digits. | |
3480 | When CODE is a non-letter, X is 0. | |
3481 | ||
3482 | The meanings of the letters are machine-dependent and controlled | |
3483 | by PRINT_OPERAND. */ | |
3484 | ||
3485 | static void | |
6cf9ac28 | 3486 | output_operand (rtx x, int code ATTRIBUTE_UNUSED) |
3cf2715d DE |
3487 | { |
3488 | if (x && GET_CODE (x) == SUBREG) | |
49d801d3 | 3489 | x = alter_subreg (&x); |
3cf2715d | 3490 | |
04c7ae48 | 3491 | /* X must not be a pseudo reg. */ |
0bccc606 | 3492 | gcc_assert (!x || !REG_P (x) || REGNO (x) < FIRST_PSEUDO_REGISTER); |
3cf2715d DE |
3493 | |
3494 | PRINT_OPERAND (asm_out_file, x, code); | |
c70d0414 HPN |
3495 | |
3496 | if (x == NULL_RTX) | |
3497 | return; | |
3498 | ||
3499 | for_each_rtx (&x, mark_symbol_ref_as_used, NULL); | |
3cf2715d DE |
3500 | } |
3501 | ||
3502 | /* Print a memory reference operand for address X | |
3503 | using machine-dependent assembler syntax. | |
3504 | The macro PRINT_OPERAND_ADDRESS exists just to control this function. */ | |
3505 | ||
3506 | void | |
6cf9ac28 | 3507 | output_address (rtx x) |
3cf2715d | 3508 | { |
6fb5fa3c DB |
3509 | bool changed = false; |
3510 | walk_alter_subreg (&x, &changed); | |
3cf2715d DE |
3511 | PRINT_OPERAND_ADDRESS (asm_out_file, x); |
3512 | } | |
3513 | \f | |
3514 | /* Print an integer constant expression in assembler syntax. | |
3515 | Addition and subtraction are the only arithmetic | |
3516 | that may appear in these expressions. */ | |
3517 | ||
3518 | void | |
6cf9ac28 | 3519 | output_addr_const (FILE *file, rtx x) |
3cf2715d DE |
3520 | { |
3521 | char buf[256]; | |
3522 | ||
3523 | restart: | |
3524 | switch (GET_CODE (x)) | |
3525 | { | |
3526 | case PC: | |
eac50d7a | 3527 | putc ('.', file); |
3cf2715d DE |
3528 | break; |
3529 | ||
3530 | case SYMBOL_REF: | |
21dad7e6 | 3531 | if (SYMBOL_REF_DECL (x)) |
0462b9b5 EB |
3532 | { |
3533 | mark_decl_referenced (SYMBOL_REF_DECL (x)); | |
3534 | assemble_external (SYMBOL_REF_DECL (x)); | |
3535 | } | |
99c8c61c AO |
3536 | #ifdef ASM_OUTPUT_SYMBOL_REF |
3537 | ASM_OUTPUT_SYMBOL_REF (file, x); | |
3538 | #else | |
3cf2715d | 3539 | assemble_name (file, XSTR (x, 0)); |
99c8c61c | 3540 | #endif |
3cf2715d DE |
3541 | break; |
3542 | ||
3543 | case LABEL_REF: | |
422be3c3 AO |
3544 | x = XEXP (x, 0); |
3545 | /* Fall through. */ | |
3cf2715d DE |
3546 | case CODE_LABEL: |
3547 | ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x)); | |
2f0b7af6 GK |
3548 | #ifdef ASM_OUTPUT_LABEL_REF |
3549 | ASM_OUTPUT_LABEL_REF (file, buf); | |
3550 | #else | |
3cf2715d | 3551 | assemble_name (file, buf); |
2f0b7af6 | 3552 | #endif |
3cf2715d DE |
3553 | break; |
3554 | ||
3555 | case CONST_INT: | |
21e3a81b | 3556 | fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x)); |
3cf2715d DE |
3557 | break; |
3558 | ||
3559 | case CONST: | |
3560 | /* This used to output parentheses around the expression, | |
3561 | but that does not work on the 386 (either ATT or BSD assembler). */ | |
3562 | output_addr_const (file, XEXP (x, 0)); | |
3563 | break; | |
3564 | ||
3565 | case CONST_DOUBLE: | |
3566 | if (GET_MODE (x) == VOIDmode) | |
3567 | { | |
3568 | /* We can use %d if the number is one word and positive. */ | |
3569 | if (CONST_DOUBLE_HIGH (x)) | |
21e3a81b | 3570 | fprintf (file, HOST_WIDE_INT_PRINT_DOUBLE_HEX, |
3d57d7ce DK |
3571 | (unsigned HOST_WIDE_INT) CONST_DOUBLE_HIGH (x), |
3572 | (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (x)); | |
f5d927c0 | 3573 | else if (CONST_DOUBLE_LOW (x) < 0) |
3d57d7ce DK |
3574 | fprintf (file, HOST_WIDE_INT_PRINT_HEX, |
3575 | (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (x)); | |
3cf2715d | 3576 | else |
21e3a81b | 3577 | fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x)); |
3cf2715d DE |
3578 | } |
3579 | else | |
3580 | /* We can't handle floating point constants; | |
3581 | PRINT_OPERAND must handle them. */ | |
3582 | output_operand_lossage ("floating constant misused"); | |
3583 | break; | |
3584 | ||
14c931f1 | 3585 | case CONST_FIXED: |
3d57d7ce DK |
3586 | fprintf (file, HOST_WIDE_INT_PRINT_HEX, |
3587 | (unsigned HOST_WIDE_INT) CONST_FIXED_VALUE_LOW (x)); | |
14c931f1 CF |
3588 | break; |
3589 | ||
3cf2715d DE |
3590 | case PLUS: |
3591 | /* Some assemblers need integer constants to appear last (eg masm). */ | |
481683e1 | 3592 | if (CONST_INT_P (XEXP (x, 0))) |
3cf2715d DE |
3593 | { |
3594 | output_addr_const (file, XEXP (x, 1)); | |
3595 | if (INTVAL (XEXP (x, 0)) >= 0) | |
3596 | fprintf (file, "+"); | |
3597 | output_addr_const (file, XEXP (x, 0)); | |
3598 | } | |
3599 | else | |
3600 | { | |
3601 | output_addr_const (file, XEXP (x, 0)); | |
481683e1 | 3602 | if (!CONST_INT_P (XEXP (x, 1)) |
08106825 | 3603 | || INTVAL (XEXP (x, 1)) >= 0) |
3cf2715d DE |
3604 | fprintf (file, "+"); |
3605 | output_addr_const (file, XEXP (x, 1)); | |
3606 | } | |
3607 | break; | |
3608 | ||
3609 | case MINUS: | |
3610 | /* Avoid outputting things like x-x or x+5-x, | |
3611 | since some assemblers can't handle that. */ | |
3612 | x = simplify_subtraction (x); | |
3613 | if (GET_CODE (x) != MINUS) | |
3614 | goto restart; | |
3615 | ||
3616 | output_addr_const (file, XEXP (x, 0)); | |
3617 | fprintf (file, "-"); | |
481683e1 | 3618 | if ((CONST_INT_P (XEXP (x, 1)) && INTVAL (XEXP (x, 1)) >= 0) |
301d03af RS |
3619 | || GET_CODE (XEXP (x, 1)) == PC |
3620 | || GET_CODE (XEXP (x, 1)) == SYMBOL_REF) | |
3621 | output_addr_const (file, XEXP (x, 1)); | |
3622 | else | |
3cf2715d | 3623 | { |
17b53c33 | 3624 | fputs (targetm.asm_out.open_paren, file); |
3cf2715d | 3625 | output_addr_const (file, XEXP (x, 1)); |
17b53c33 | 3626 | fputs (targetm.asm_out.close_paren, file); |
3cf2715d | 3627 | } |
3cf2715d DE |
3628 | break; |
3629 | ||
3630 | case ZERO_EXTEND: | |
3631 | case SIGN_EXTEND: | |
fdf473ae | 3632 | case SUBREG: |
c01e4479 | 3633 | case TRUNCATE: |
3cf2715d DE |
3634 | output_addr_const (file, XEXP (x, 0)); |
3635 | break; | |
3636 | ||
3637 | default: | |
422be3c3 AO |
3638 | #ifdef OUTPUT_ADDR_CONST_EXTRA |
3639 | OUTPUT_ADDR_CONST_EXTRA (file, x, fail); | |
3640 | break; | |
3641 | ||
3642 | fail: | |
3643 | #endif | |
3cf2715d DE |
3644 | output_operand_lossage ("invalid expression as operand"); |
3645 | } | |
3646 | } | |
3647 | \f | |
3648 | /* A poor man's fprintf, with the added features of %I, %R, %L, and %U. | |
3649 | %R prints the value of REGISTER_PREFIX. | |
3650 | %L prints the value of LOCAL_LABEL_PREFIX. | |
3651 | %U prints the value of USER_LABEL_PREFIX. | |
3652 | %I prints the value of IMMEDIATE_PREFIX. | |
3653 | %O runs ASM_OUTPUT_OPCODE to transform what follows in the string. | |
b1721339 | 3654 | Also supported are %d, %i, %u, %x, %X, %o, %c, %s and %%. |
3cf2715d DE |
3655 | |
3656 | We handle alternate assembler dialects here, just like output_asm_insn. */ | |
3657 | ||
3658 | void | |
e34d07f2 | 3659 | asm_fprintf (FILE *file, const char *p, ...) |
3cf2715d | 3660 | { |
3cf2715d DE |
3661 | char buf[10]; |
3662 | char *q, c; | |
e34d07f2 | 3663 | va_list argptr; |
6cf9ac28 | 3664 | |
e34d07f2 | 3665 | va_start (argptr, p); |
3cf2715d DE |
3666 | |
3667 | buf[0] = '%'; | |
3668 | ||
b729186a | 3669 | while ((c = *p++)) |
3cf2715d DE |
3670 | switch (c) |
3671 | { | |
3672 | #ifdef ASSEMBLER_DIALECT | |
3673 | case '{': | |
b729186a JL |
3674 | { |
3675 | int i; | |
3cf2715d | 3676 | |
b729186a JL |
3677 | /* If we want the first dialect, do nothing. Otherwise, skip |
3678 | DIALECT_NUMBER of strings ending with '|'. */ | |
3679 | for (i = 0; i < dialect_number; i++) | |
3680 | { | |
3681 | while (*p && *p++ != '|') | |
3682 | ; | |
3683 | ||
3684 | if (*p == '|') | |
3685 | p++; | |
f5d927c0 | 3686 | } |
b729186a | 3687 | } |
3cf2715d DE |
3688 | break; |
3689 | ||
3690 | case '|': | |
3691 | /* Skip to close brace. */ | |
3692 | while (*p && *p++ != '}') | |
3693 | ; | |
3694 | break; | |
3695 | ||
3696 | case '}': | |
3697 | break; | |
3698 | #endif | |
3699 | ||
3700 | case '%': | |
3701 | c = *p++; | |
3702 | q = &buf[1]; | |
b1721339 KG |
3703 | while (strchr ("-+ #0", c)) |
3704 | { | |
3705 | *q++ = c; | |
3706 | c = *p++; | |
3707 | } | |
0df6c2c7 | 3708 | while (ISDIGIT (c) || c == '.') |
3cf2715d DE |
3709 | { |
3710 | *q++ = c; | |
3711 | c = *p++; | |
3712 | } | |
3713 | switch (c) | |
3714 | { | |
3715 | case '%': | |
b1721339 | 3716 | putc ('%', file); |
3cf2715d DE |
3717 | break; |
3718 | ||
3719 | case 'd': case 'i': case 'u': | |
b1721339 KG |
3720 | case 'x': case 'X': case 'o': |
3721 | case 'c': | |
3cf2715d DE |
3722 | *q++ = c; |
3723 | *q = 0; | |
3724 | fprintf (file, buf, va_arg (argptr, int)); | |
3725 | break; | |
3726 | ||
3727 | case 'w': | |
b1721339 KG |
3728 | /* This is a prefix to the 'd', 'i', 'u', 'x', 'X', and |
3729 | 'o' cases, but we do not check for those cases. It | |
3730 | means that the value is a HOST_WIDE_INT, which may be | |
3731 | either `long' or `long long'. */ | |
85f015e1 KG |
3732 | memcpy (q, HOST_WIDE_INT_PRINT, strlen (HOST_WIDE_INT_PRINT)); |
3733 | q += strlen (HOST_WIDE_INT_PRINT); | |
3cf2715d DE |
3734 | *q++ = *p++; |
3735 | *q = 0; | |
3736 | fprintf (file, buf, va_arg (argptr, HOST_WIDE_INT)); | |
3737 | break; | |
3738 | ||
3739 | case 'l': | |
3740 | *q++ = c; | |
b1721339 KG |
3741 | #ifdef HAVE_LONG_LONG |
3742 | if (*p == 'l') | |
3743 | { | |
3744 | *q++ = *p++; | |
3745 | *q++ = *p++; | |
3746 | *q = 0; | |
3747 | fprintf (file, buf, va_arg (argptr, long long)); | |
3748 | } | |
3749 | else | |
3750 | #endif | |
3751 | { | |
3752 | *q++ = *p++; | |
3753 | *q = 0; | |
3754 | fprintf (file, buf, va_arg (argptr, long)); | |
3755 | } | |
6cf9ac28 | 3756 | |
3cf2715d DE |
3757 | break; |
3758 | ||
3759 | case 's': | |
3760 | *q++ = c; | |
3761 | *q = 0; | |
3762 | fprintf (file, buf, va_arg (argptr, char *)); | |
3763 | break; | |
3764 | ||
3765 | case 'O': | |
3766 | #ifdef ASM_OUTPUT_OPCODE | |
3767 | ASM_OUTPUT_OPCODE (asm_out_file, p); | |
3768 | #endif | |
3769 | break; | |
3770 | ||
3771 | case 'R': | |
3772 | #ifdef REGISTER_PREFIX | |
3773 | fprintf (file, "%s", REGISTER_PREFIX); | |
3774 | #endif | |
3775 | break; | |
3776 | ||
3777 | case 'I': | |
3778 | #ifdef IMMEDIATE_PREFIX | |
3779 | fprintf (file, "%s", IMMEDIATE_PREFIX); | |
3780 | #endif | |
3781 | break; | |
3782 | ||
3783 | case 'L': | |
3784 | #ifdef LOCAL_LABEL_PREFIX | |
3785 | fprintf (file, "%s", LOCAL_LABEL_PREFIX); | |
3786 | #endif | |
3787 | break; | |
3788 | ||
3789 | case 'U': | |
19283265 | 3790 | fputs (user_label_prefix, file); |
3cf2715d DE |
3791 | break; |
3792 | ||
fe0503ea | 3793 | #ifdef ASM_FPRINTF_EXTENSIONS |
7ef0daad | 3794 | /* Uppercase letters are reserved for general use by asm_fprintf |
fe0503ea NC |
3795 | and so are not available to target specific code. In order to |
3796 | prevent the ASM_FPRINTF_EXTENSIONS macro from using them then, | |
3797 | they are defined here. As they get turned into real extensions | |
3798 | to asm_fprintf they should be removed from this list. */ | |
3799 | case 'A': case 'B': case 'C': case 'D': case 'E': | |
3800 | case 'F': case 'G': case 'H': case 'J': case 'K': | |
3801 | case 'M': case 'N': case 'P': case 'Q': case 'S': | |
3802 | case 'T': case 'V': case 'W': case 'Y': case 'Z': | |
3803 | break; | |
f5d927c0 | 3804 | |
fe0503ea NC |
3805 | ASM_FPRINTF_EXTENSIONS (file, argptr, p) |
3806 | #endif | |
3cf2715d | 3807 | default: |
0bccc606 | 3808 | gcc_unreachable (); |
3cf2715d DE |
3809 | } |
3810 | break; | |
3811 | ||
3812 | default: | |
b1721339 | 3813 | putc (c, file); |
3cf2715d | 3814 | } |
e34d07f2 | 3815 | va_end (argptr); |
3cf2715d DE |
3816 | } |
3817 | \f | |
3818 | /* Split up a CONST_DOUBLE or integer constant rtx | |
3819 | into two rtx's for single words, | |
3820 | storing in *FIRST the word that comes first in memory in the target | |
3821 | and in *SECOND the other. */ | |
3822 | ||
3823 | void | |
6cf9ac28 | 3824 | split_double (rtx value, rtx *first, rtx *second) |
3cf2715d | 3825 | { |
481683e1 | 3826 | if (CONST_INT_P (value)) |
3cf2715d | 3827 | { |
5a1a6efd | 3828 | if (HOST_BITS_PER_WIDE_INT >= (2 * BITS_PER_WORD)) |
f76b9db2 | 3829 | { |
5a1a6efd | 3830 | /* In this case the CONST_INT holds both target words. |
27eef9ce JC |
3831 | Extract the bits from it into two word-sized pieces. |
3832 | Sign extend each half to HOST_WIDE_INT. */ | |
7f251dee AO |
3833 | unsigned HOST_WIDE_INT low, high; |
3834 | unsigned HOST_WIDE_INT mask, sign_bit, sign_extend; | |
3835 | ||
3836 | /* Set sign_bit to the most significant bit of a word. */ | |
3837 | sign_bit = 1; | |
3838 | sign_bit <<= BITS_PER_WORD - 1; | |
3839 | ||
3840 | /* Set mask so that all bits of the word are set. We could | |
3841 | have used 1 << BITS_PER_WORD instead of basing the | |
3842 | calculation on sign_bit. However, on machines where | |
3843 | HOST_BITS_PER_WIDE_INT == BITS_PER_WORD, it could cause a | |
3844 | compiler warning, even though the code would never be | |
3845 | executed. */ | |
3846 | mask = sign_bit << 1; | |
3847 | mask--; | |
3848 | ||
3849 | /* Set sign_extend as any remaining bits. */ | |
3850 | sign_extend = ~mask; | |
f5d927c0 | 3851 | |
7f251dee AO |
3852 | /* Pick the lower word and sign-extend it. */ |
3853 | low = INTVAL (value); | |
3854 | low &= mask; | |
3855 | if (low & sign_bit) | |
3856 | low |= sign_extend; | |
3857 | ||
3858 | /* Pick the higher word, shifted to the least significant | |
3859 | bits, and sign-extend it. */ | |
3860 | high = INTVAL (value); | |
3861 | high >>= BITS_PER_WORD - 1; | |
3862 | high >>= 1; | |
3863 | high &= mask; | |
3864 | if (high & sign_bit) | |
3865 | high |= sign_extend; | |
3866 | ||
3867 | /* Store the words in the target machine order. */ | |
5a1a6efd RK |
3868 | if (WORDS_BIG_ENDIAN) |
3869 | { | |
7f251dee AO |
3870 | *first = GEN_INT (high); |
3871 | *second = GEN_INT (low); | |
5a1a6efd RK |
3872 | } |
3873 | else | |
3874 | { | |
7f251dee AO |
3875 | *first = GEN_INT (low); |
3876 | *second = GEN_INT (high); | |
5a1a6efd | 3877 | } |
f76b9db2 ILT |
3878 | } |
3879 | else | |
3880 | { | |
5a1a6efd RK |
3881 | /* The rule for using CONST_INT for a wider mode |
3882 | is that we regard the value as signed. | |
3883 | So sign-extend it. */ | |
3884 | rtx high = (INTVAL (value) < 0 ? constm1_rtx : const0_rtx); | |
3885 | if (WORDS_BIG_ENDIAN) | |
3886 | { | |
3887 | *first = high; | |
3888 | *second = value; | |
3889 | } | |
3890 | else | |
3891 | { | |
3892 | *first = value; | |
3893 | *second = high; | |
3894 | } | |
f76b9db2 | 3895 | } |
3cf2715d DE |
3896 | } |
3897 | else if (GET_CODE (value) != CONST_DOUBLE) | |
3898 | { | |
f76b9db2 ILT |
3899 | if (WORDS_BIG_ENDIAN) |
3900 | { | |
3901 | *first = const0_rtx; | |
3902 | *second = value; | |
3903 | } | |
3904 | else | |
3905 | { | |
3906 | *first = value; | |
3907 | *second = const0_rtx; | |
3908 | } | |
3cf2715d DE |
3909 | } |
3910 | else if (GET_MODE (value) == VOIDmode | |
3911 | /* This is the old way we did CONST_DOUBLE integers. */ | |
3912 | || GET_MODE_CLASS (GET_MODE (value)) == MODE_INT) | |
3913 | { | |
3914 | /* In an integer, the words are defined as most and least significant. | |
3915 | So order them by the target's convention. */ | |
f76b9db2 ILT |
3916 | if (WORDS_BIG_ENDIAN) |
3917 | { | |
3918 | *first = GEN_INT (CONST_DOUBLE_HIGH (value)); | |
3919 | *second = GEN_INT (CONST_DOUBLE_LOW (value)); | |
3920 | } | |
3921 | else | |
3922 | { | |
3923 | *first = GEN_INT (CONST_DOUBLE_LOW (value)); | |
3924 | *second = GEN_INT (CONST_DOUBLE_HIGH (value)); | |
3925 | } | |
3cf2715d DE |
3926 | } |
3927 | else | |
3928 | { | |
f5d927c0 KH |
3929 | REAL_VALUE_TYPE r; |
3930 | long l[2]; | |
3cf2715d DE |
3931 | REAL_VALUE_FROM_CONST_DOUBLE (r, value); |
3932 | ||
3933 | /* Note, this converts the REAL_VALUE_TYPE to the target's | |
3934 | format, splits up the floating point double and outputs | |
3935 | exactly 32 bits of it into each of l[0] and l[1] -- | |
0f41302f | 3936 | not necessarily BITS_PER_WORD bits. */ |
3cf2715d DE |
3937 | REAL_VALUE_TO_TARGET_DOUBLE (r, l); |
3938 | ||
b5a3eb84 JW |
3939 | /* If 32 bits is an entire word for the target, but not for the host, |
3940 | then sign-extend on the host so that the number will look the same | |
3941 | way on the host that it would on the target. See for instance | |
3942 | simplify_unary_operation. The #if is needed to avoid compiler | |
3943 | warnings. */ | |
3944 | ||
3945 | #if HOST_BITS_PER_LONG > 32 | |
3946 | if (BITS_PER_WORD < HOST_BITS_PER_LONG && BITS_PER_WORD == 32) | |
3947 | { | |
3948 | if (l[0] & ((long) 1 << 31)) | |
3949 | l[0] |= ((long) (-1) << 32); | |
3950 | if (l[1] & ((long) 1 << 31)) | |
3951 | l[1] |= ((long) (-1) << 32); | |
3952 | } | |
3953 | #endif | |
3954 | ||
3e95a7cb ZW |
3955 | *first = GEN_INT (l[0]); |
3956 | *second = GEN_INT (l[1]); | |
3cf2715d DE |
3957 | } |
3958 | } | |
3959 | \f | |
3960 | /* Return nonzero if this function has no function calls. */ | |
3961 | ||
3962 | int | |
6cf9ac28 | 3963 | leaf_function_p (void) |
3cf2715d DE |
3964 | { |
3965 | rtx insn; | |
b660f82f | 3966 | rtx link; |
3cf2715d | 3967 | |
e3b5732b | 3968 | if (crtl->profile || profile_arc_flag) |
3cf2715d DE |
3969 | return 0; |
3970 | ||
3971 | for (insn = get_insns (); insn; insn = NEXT_INSN (insn)) | |
3972 | { | |
4b4bf941 | 3973 | if (CALL_P (insn) |
7d167afd | 3974 | && ! SIBLING_CALL_P (insn)) |
3cf2715d | 3975 | return 0; |
4b4bf941 | 3976 | if (NONJUMP_INSN_P (insn) |
3cf2715d | 3977 | && GET_CODE (PATTERN (insn)) == SEQUENCE |
4b4bf941 | 3978 | && CALL_P (XVECEXP (PATTERN (insn), 0, 0)) |
0a1c58a2 | 3979 | && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0))) |
3cf2715d DE |
3980 | return 0; |
3981 | } | |
cb91fab0 | 3982 | for (link = crtl->epilogue_delay_list; |
b660f82f JW |
3983 | link; |
3984 | link = XEXP (link, 1)) | |
3cf2715d | 3985 | { |
b660f82f JW |
3986 | insn = XEXP (link, 0); |
3987 | ||
4b4bf941 | 3988 | if (CALL_P (insn) |
7d167afd | 3989 | && ! SIBLING_CALL_P (insn)) |
3cf2715d | 3990 | return 0; |
4b4bf941 | 3991 | if (NONJUMP_INSN_P (insn) |
b660f82f | 3992 | && GET_CODE (PATTERN (insn)) == SEQUENCE |
4b4bf941 | 3993 | && CALL_P (XVECEXP (PATTERN (insn), 0, 0)) |
b660f82f | 3994 | && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0))) |
3cf2715d DE |
3995 | return 0; |
3996 | } | |
3997 | ||
3998 | return 1; | |
3999 | } | |
4000 | ||
09da1532 | 4001 | /* Return 1 if branch is a forward branch. |
ef6257cd JH |
4002 | Uses insn_shuid array, so it works only in the final pass. May be used by |
4003 | output templates to customary add branch prediction hints. | |
4004 | */ | |
4005 | int | |
6cf9ac28 | 4006 | final_forward_branch_p (rtx insn) |
ef6257cd JH |
4007 | { |
4008 | int insn_id, label_id; | |
b0efb46b | 4009 | |
0bccc606 | 4010 | gcc_assert (uid_shuid); |
ef6257cd JH |
4011 | insn_id = INSN_SHUID (insn); |
4012 | label_id = INSN_SHUID (JUMP_LABEL (insn)); | |
4013 | /* We've hit some insns that does not have id information available. */ | |
0bccc606 | 4014 | gcc_assert (insn_id && label_id); |
ef6257cd JH |
4015 | return insn_id < label_id; |
4016 | } | |
4017 | ||
3cf2715d DE |
4018 | /* On some machines, a function with no call insns |
4019 | can run faster if it doesn't create its own register window. | |
4020 | When output, the leaf function should use only the "output" | |
4021 | registers. Ordinarily, the function would be compiled to use | |
4022 | the "input" registers to find its arguments; it is a candidate | |
4023 | for leaf treatment if it uses only the "input" registers. | |
4024 | Leaf function treatment means renumbering so the function | |
4025 | uses the "output" registers instead. */ | |
4026 | ||
4027 | #ifdef LEAF_REGISTERS | |
4028 | ||
3cf2715d DE |
4029 | /* Return 1 if this function uses only the registers that can be |
4030 | safely renumbered. */ | |
4031 | ||
4032 | int | |
6cf9ac28 | 4033 | only_leaf_regs_used (void) |
3cf2715d DE |
4034 | { |
4035 | int i; | |
4977bab6 | 4036 | const char *const permitted_reg_in_leaf_functions = LEAF_REGISTERS; |
3cf2715d DE |
4037 | |
4038 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
6fb5fa3c | 4039 | if ((df_regs_ever_live_p (i) || global_regs[i]) |
e5e809f4 JL |
4040 | && ! permitted_reg_in_leaf_functions[i]) |
4041 | return 0; | |
4042 | ||
e3b5732b | 4043 | if (crtl->uses_pic_offset_table |
e5e809f4 | 4044 | && pic_offset_table_rtx != 0 |
f8cfc6aa | 4045 | && REG_P (pic_offset_table_rtx) |
e5e809f4 JL |
4046 | && ! permitted_reg_in_leaf_functions[REGNO (pic_offset_table_rtx)]) |
4047 | return 0; | |
4048 | ||
3cf2715d DE |
4049 | return 1; |
4050 | } | |
4051 | ||
4052 | /* Scan all instructions and renumber all registers into those | |
4053 | available in leaf functions. */ | |
4054 | ||
4055 | static void | |
6cf9ac28 | 4056 | leaf_renumber_regs (rtx first) |
3cf2715d DE |
4057 | { |
4058 | rtx insn; | |
4059 | ||
4060 | /* Renumber only the actual patterns. | |
4061 | The reg-notes can contain frame pointer refs, | |
4062 | and renumbering them could crash, and should not be needed. */ | |
4063 | for (insn = first; insn; insn = NEXT_INSN (insn)) | |
2c3c49de | 4064 | if (INSN_P (insn)) |
3cf2715d | 4065 | leaf_renumber_regs_insn (PATTERN (insn)); |
cb91fab0 | 4066 | for (insn = crtl->epilogue_delay_list; |
f5d927c0 KH |
4067 | insn; |
4068 | insn = XEXP (insn, 1)) | |
2c3c49de | 4069 | if (INSN_P (XEXP (insn, 0))) |
3cf2715d DE |
4070 | leaf_renumber_regs_insn (PATTERN (XEXP (insn, 0))); |
4071 | } | |
4072 | ||
4073 | /* Scan IN_RTX and its subexpressions, and renumber all regs into those | |
4074 | available in leaf functions. */ | |
4075 | ||
4076 | void | |
6cf9ac28 | 4077 | leaf_renumber_regs_insn (rtx in_rtx) |
3cf2715d | 4078 | { |
b3694847 SS |
4079 | int i, j; |
4080 | const char *format_ptr; | |
3cf2715d DE |
4081 | |
4082 | if (in_rtx == 0) | |
4083 | return; | |
4084 | ||
4085 | /* Renumber all input-registers into output-registers. | |
4086 | renumbered_regs would be 1 for an output-register; | |
4087 | they */ | |
4088 | ||
f8cfc6aa | 4089 | if (REG_P (in_rtx)) |
3cf2715d DE |
4090 | { |
4091 | int newreg; | |
4092 | ||
4093 | /* Don't renumber the same reg twice. */ | |
4094 | if (in_rtx->used) | |
4095 | return; | |
4096 | ||
4097 | newreg = REGNO (in_rtx); | |
4098 | /* Don't try to renumber pseudo regs. It is possible for a pseudo reg | |
4099 | to reach here as part of a REG_NOTE. */ | |
4100 | if (newreg >= FIRST_PSEUDO_REGISTER) | |
4101 | { | |
4102 | in_rtx->used = 1; | |
4103 | return; | |
4104 | } | |
4105 | newreg = LEAF_REG_REMAP (newreg); | |
0bccc606 | 4106 | gcc_assert (newreg >= 0); |
6fb5fa3c DB |
4107 | df_set_regs_ever_live (REGNO (in_rtx), false); |
4108 | df_set_regs_ever_live (newreg, true); | |
4109 | SET_REGNO (in_rtx, newreg); | |
3cf2715d DE |
4110 | in_rtx->used = 1; |
4111 | } | |
4112 | ||
2c3c49de | 4113 | if (INSN_P (in_rtx)) |
3cf2715d DE |
4114 | { |
4115 | /* Inside a SEQUENCE, we find insns. | |
4116 | Renumber just the patterns of these insns, | |
4117 | just as we do for the top-level insns. */ | |
4118 | leaf_renumber_regs_insn (PATTERN (in_rtx)); | |
4119 | return; | |
4120 | } | |
4121 | ||
4122 | format_ptr = GET_RTX_FORMAT (GET_CODE (in_rtx)); | |
4123 | ||
4124 | for (i = 0; i < GET_RTX_LENGTH (GET_CODE (in_rtx)); i++) | |
4125 | switch (*format_ptr++) | |
4126 | { | |
4127 | case 'e': | |
4128 | leaf_renumber_regs_insn (XEXP (in_rtx, i)); | |
4129 | break; | |
4130 | ||
4131 | case 'E': | |
4132 | if (NULL != XVEC (in_rtx, i)) | |
4133 | { | |
4134 | for (j = 0; j < XVECLEN (in_rtx, i); j++) | |
4135 | leaf_renumber_regs_insn (XVECEXP (in_rtx, i, j)); | |
4136 | } | |
4137 | break; | |
4138 | ||
4139 | case 'S': | |
4140 | case 's': | |
4141 | case '0': | |
4142 | case 'i': | |
4143 | case 'w': | |
4144 | case 'n': | |
4145 | case 'u': | |
4146 | break; | |
4147 | ||
4148 | default: | |
0bccc606 | 4149 | gcc_unreachable (); |
3cf2715d DE |
4150 | } |
4151 | } | |
4152 | #endif | |
6a08f7b3 DP |
4153 | |
4154 | ||
4155 | /* When -gused is used, emit debug info for only used symbols. But in | |
4156 | addition to the standard intercepted debug_hooks there are some direct | |
4157 | calls into this file, i.e., dbxout_symbol, dbxout_parms, and dbxout_reg_params. | |
4158 | Those routines may also be called from a higher level intercepted routine. So | |
4159 | to prevent recording data for an inner call to one of these for an intercept, | |
5d3cc252 | 4160 | we maintain an intercept nesting counter (debug_nesting). We only save the |
6a08f7b3 DP |
4161 | intercepted arguments if the nesting is 1. */ |
4162 | int debug_nesting = 0; | |
4163 | ||
4164 | static tree *symbol_queue; | |
4165 | int symbol_queue_index = 0; | |
4166 | static int symbol_queue_size = 0; | |
4167 | ||
4168 | /* Generate the symbols for any queued up type symbols we encountered | |
4169 | while generating the type info for some originally used symbol. | |
4170 | This might generate additional entries in the queue. Only when | |
4171 | the nesting depth goes to 0 is this routine called. */ | |
4172 | ||
4173 | void | |
6cf9ac28 | 4174 | debug_flush_symbol_queue (void) |
6a08f7b3 DP |
4175 | { |
4176 | int i; | |
6cf9ac28 | 4177 | |
6a08f7b3 DP |
4178 | /* Make sure that additionally queued items are not flushed |
4179 | prematurely. */ | |
6cf9ac28 | 4180 | |
6a08f7b3 | 4181 | ++debug_nesting; |
6cf9ac28 | 4182 | |
6a08f7b3 DP |
4183 | for (i = 0; i < symbol_queue_index; ++i) |
4184 | { | |
b0efb46b | 4185 | /* If we pushed queued symbols then such symbols must be |
6a08f7b3 DP |
4186 | output no matter what anyone else says. Specifically, |
4187 | we need to make sure dbxout_symbol() thinks the symbol was | |
4188 | used and also we need to override TYPE_DECL_SUPPRESS_DEBUG | |
4189 | which may be set for outside reasons. */ | |
4190 | int saved_tree_used = TREE_USED (symbol_queue[i]); | |
4191 | int saved_suppress_debug = TYPE_DECL_SUPPRESS_DEBUG (symbol_queue[i]); | |
4192 | TREE_USED (symbol_queue[i]) = 1; | |
4193 | TYPE_DECL_SUPPRESS_DEBUG (symbol_queue[i]) = 0; | |
4194 | ||
4195 | #ifdef DBX_DEBUGGING_INFO | |
4196 | dbxout_symbol (symbol_queue[i], 0); | |
4197 | #endif | |
4198 | ||
4199 | TREE_USED (symbol_queue[i]) = saved_tree_used; | |
4200 | TYPE_DECL_SUPPRESS_DEBUG (symbol_queue[i]) = saved_suppress_debug; | |
4201 | } | |
4202 | ||
4203 | symbol_queue_index = 0; | |
6cf9ac28 | 4204 | --debug_nesting; |
6a08f7b3 DP |
4205 | } |
4206 | ||
4207 | /* Queue a type symbol needed as part of the definition of a decl | |
4208 | symbol. These symbols are generated when debug_flush_symbol_queue() | |
4209 | is called. */ | |
4210 | ||
6cf9ac28 | 4211 | void |
6a08f7b3 DP |
4212 | debug_queue_symbol (tree decl) |
4213 | { | |
6cf9ac28 | 4214 | if (symbol_queue_index >= symbol_queue_size) |
6a08f7b3 DP |
4215 | { |
4216 | symbol_queue_size += 10; | |
1b4572a8 | 4217 | symbol_queue = XRESIZEVEC (tree, symbol_queue, symbol_queue_size); |
6a08f7b3 DP |
4218 | } |
4219 | ||
4220 | symbol_queue[symbol_queue_index++] = decl; | |
6cf9ac28 | 4221 | } |
6a08f7b3 | 4222 | |
f9da5064 | 4223 | /* Free symbol queue. */ |
6a08f7b3 | 4224 | void |
6cf9ac28 | 4225 | debug_free_queue (void) |
6a08f7b3 DP |
4226 | { |
4227 | if (symbol_queue) | |
4228 | { | |
4229 | free (symbol_queue); | |
4230 | symbol_queue = NULL; | |
4231 | symbol_queue_size = 0; | |
4232 | } | |
4233 | } | |
ef330312 PB |
4234 | \f |
4235 | /* Turn the RTL into assembly. */ | |
c2924966 | 4236 | static unsigned int |
ef330312 PB |
4237 | rest_of_handle_final (void) |
4238 | { | |
4239 | rtx x; | |
4240 | const char *fnname; | |
4241 | ||
4242 | /* Get the function's name, as described by its RTL. This may be | |
4243 | different from the DECL_NAME name used in the source file. */ | |
4244 | ||
4245 | x = DECL_RTL (current_function_decl); | |
4246 | gcc_assert (MEM_P (x)); | |
4247 | x = XEXP (x, 0); | |
4248 | gcc_assert (GET_CODE (x) == SYMBOL_REF); | |
4249 | fnname = XSTR (x, 0); | |
4250 | ||
4251 | assemble_start_function (current_function_decl, fnname); | |
4252 | final_start_function (get_insns (), asm_out_file, optimize); | |
4253 | final (get_insns (), asm_out_file, optimize); | |
4254 | final_end_function (); | |
4255 | ||
4256 | #ifdef TARGET_UNWIND_INFO | |
4257 | /* ??? The IA-64 ".handlerdata" directive must be issued before | |
4258 | the ".endp" directive that closes the procedure descriptor. */ | |
22ba88ef | 4259 | output_function_exception_table (fnname); |
ef330312 PB |
4260 | #endif |
4261 | ||
4262 | assemble_end_function (current_function_decl, fnname); | |
4263 | ||
4264 | #ifndef TARGET_UNWIND_INFO | |
4265 | /* Otherwise, it feels unclean to switch sections in the middle. */ | |
22ba88ef | 4266 | output_function_exception_table (fnname); |
ef330312 PB |
4267 | #endif |
4268 | ||
4269 | user_defined_section_attribute = false; | |
4270 | ||
6fb5fa3c DB |
4271 | /* Free up reg info memory. */ |
4272 | free_reg_info (); | |
4273 | ||
ef330312 PB |
4274 | if (! quiet_flag) |
4275 | fflush (asm_out_file); | |
4276 | ||
ef330312 PB |
4277 | /* Write DBX symbols if requested. */ |
4278 | ||
4279 | /* Note that for those inline functions where we don't initially | |
4280 | know for certain that we will be generating an out-of-line copy, | |
4281 | the first invocation of this routine (rest_of_compilation) will | |
4282 | skip over this code by doing a `goto exit_rest_of_compilation;'. | |
4283 | Later on, wrapup_global_declarations will (indirectly) call | |
4284 | rest_of_compilation again for those inline functions that need | |
4285 | to have out-of-line copies generated. During that call, we | |
4286 | *will* be routed past here. */ | |
4287 | ||
4288 | timevar_push (TV_SYMOUT); | |
725730f2 EB |
4289 | if (!DECL_IGNORED_P (current_function_decl)) |
4290 | debug_hooks->function_decl (current_function_decl); | |
ef330312 | 4291 | timevar_pop (TV_SYMOUT); |
6b20f353 DS |
4292 | |
4293 | /* Release the blocks that are linked to DECL_INITIAL() to free the memory. */ | |
4294 | DECL_INITIAL (current_function_decl) = error_mark_node; | |
4295 | ||
395a40e0 JH |
4296 | if (DECL_STATIC_CONSTRUCTOR (current_function_decl) |
4297 | && targetm.have_ctors_dtors) | |
4298 | targetm.asm_out.constructor (XEXP (DECL_RTL (current_function_decl), 0), | |
4299 | decl_init_priority_lookup | |
4300 | (current_function_decl)); | |
4301 | if (DECL_STATIC_DESTRUCTOR (current_function_decl) | |
4302 | && targetm.have_ctors_dtors) | |
4303 | targetm.asm_out.destructor (XEXP (DECL_RTL (current_function_decl), 0), | |
4304 | decl_fini_priority_lookup | |
4305 | (current_function_decl)); | |
c2924966 | 4306 | return 0; |
ef330312 PB |
4307 | } |
4308 | ||
8ddbbcae | 4309 | struct rtl_opt_pass pass_final = |
ef330312 | 4310 | { |
8ddbbcae JH |
4311 | { |
4312 | RTL_PASS, | |
e7f373fa | 4313 | "final", /* name */ |
ef330312 PB |
4314 | NULL, /* gate */ |
4315 | rest_of_handle_final, /* execute */ | |
4316 | NULL, /* sub */ | |
4317 | NULL, /* next */ | |
4318 | 0, /* static_pass_number */ | |
4319 | TV_FINAL, /* tv_id */ | |
4320 | 0, /* properties_required */ | |
4321 | 0, /* properties_provided */ | |
4322 | 0, /* properties_destroyed */ | |
4323 | 0, /* todo_flags_start */ | |
8ddbbcae JH |
4324 | TODO_ggc_collect /* todo_flags_finish */ |
4325 | } | |
ef330312 PB |
4326 | }; |
4327 | ||
4328 | ||
c2924966 | 4329 | static unsigned int |
ef330312 PB |
4330 | rest_of_handle_shorten_branches (void) |
4331 | { | |
4332 | /* Shorten branches. */ | |
4333 | shorten_branches (get_insns ()); | |
c2924966 | 4334 | return 0; |
ef330312 | 4335 | } |
b0efb46b | 4336 | |
8ddbbcae | 4337 | struct rtl_opt_pass pass_shorten_branches = |
ef330312 | 4338 | { |
8ddbbcae JH |
4339 | { |
4340 | RTL_PASS, | |
defb77dc | 4341 | "shorten", /* name */ |
ef330312 PB |
4342 | NULL, /* gate */ |
4343 | rest_of_handle_shorten_branches, /* execute */ | |
4344 | NULL, /* sub */ | |
4345 | NULL, /* next */ | |
4346 | 0, /* static_pass_number */ | |
4347 | TV_FINAL, /* tv_id */ | |
4348 | 0, /* properties_required */ | |
4349 | 0, /* properties_provided */ | |
4350 | 0, /* properties_destroyed */ | |
4351 | 0, /* todo_flags_start */ | |
8ddbbcae JH |
4352 | TODO_dump_func /* todo_flags_finish */ |
4353 | } | |
ef330312 PB |
4354 | }; |
4355 | ||
4356 | ||
c2924966 | 4357 | static unsigned int |
ef330312 PB |
4358 | rest_of_clean_state (void) |
4359 | { | |
4360 | rtx insn, next; | |
2153915d AO |
4361 | FILE *final_output = NULL; |
4362 | int save_unnumbered = flag_dump_unnumbered; | |
4363 | int save_noaddr = flag_dump_noaddr; | |
4364 | ||
4365 | if (flag_dump_final_insns) | |
4366 | { | |
4367 | final_output = fopen (flag_dump_final_insns, "a"); | |
4368 | if (!final_output) | |
4369 | { | |
4370 | error ("could not open final insn dump file %qs: %s", | |
4371 | flag_dump_final_insns, strerror (errno)); | |
4372 | flag_dump_final_insns = NULL; | |
4373 | } | |
4374 | else | |
4375 | { | |
4376 | const char *aname; | |
5fefcf92 | 4377 | struct cgraph_node *node = cgraph_node (current_function_decl); |
2153915d AO |
4378 | |
4379 | aname = (IDENTIFIER_POINTER | |
4380 | (DECL_ASSEMBLER_NAME (current_function_decl))); | |
4381 | fprintf (final_output, "\n;; Function (%s) %s\n\n", aname, | |
5fefcf92 | 4382 | node->frequency == NODE_FREQUENCY_HOT |
2153915d | 4383 | ? " (hot)" |
5fefcf92 | 4384 | : node->frequency == NODE_FREQUENCY_UNLIKELY_EXECUTED |
2153915d | 4385 | ? " (unlikely executed)" |
5fefcf92 JH |
4386 | : node->frequency == NODE_FREQUENCY_EXECUTED_ONCE |
4387 | ? " (executed once)" | |
2153915d AO |
4388 | : ""); |
4389 | ||
4390 | flag_dump_noaddr = flag_dump_unnumbered = 1; | |
c7ba0cfb RG |
4391 | if (flag_compare_debug_opt || flag_compare_debug) |
4392 | dump_flags |= TDF_NOUID; | |
6ca5d1f6 | 4393 | final_insns_dump_p = true; |
2153915d AO |
4394 | |
4395 | for (insn = get_insns (); insn; insn = NEXT_INSN (insn)) | |
4396 | if (LABEL_P (insn)) | |
4397 | INSN_UID (insn) = CODE_LABEL_NUMBER (insn); | |
4398 | else | |
4399 | INSN_UID (insn) = 0; | |
4400 | } | |
4401 | } | |
ef330312 PB |
4402 | |
4403 | /* It is very important to decompose the RTL instruction chain here: | |
4404 | debug information keeps pointing into CODE_LABEL insns inside the function | |
4405 | body. If these remain pointing to the other insns, we end up preserving | |
4406 | whole RTL chain and attached detailed debug info in memory. */ | |
4407 | for (insn = get_insns (); insn; insn = next) | |
4408 | { | |
4409 | next = NEXT_INSN (insn); | |
4410 | NEXT_INSN (insn) = NULL; | |
4411 | PREV_INSN (insn) = NULL; | |
2153915d AO |
4412 | |
4413 | if (final_output | |
4414 | && (!NOTE_P (insn) || | |
4415 | (NOTE_KIND (insn) != NOTE_INSN_VAR_LOCATION | |
4416 | && NOTE_KIND (insn) != NOTE_INSN_BLOCK_BEG | |
b5b8b0ac AO |
4417 | && NOTE_KIND (insn) != NOTE_INSN_BLOCK_END |
4418 | && NOTE_KIND (insn) != NOTE_INSN_CFA_RESTORE_STATE))) | |
2153915d AO |
4419 | print_rtl_single (final_output, insn); |
4420 | ||
4421 | } | |
4422 | ||
4423 | if (final_output) | |
4424 | { | |
4425 | flag_dump_noaddr = save_noaddr; | |
4426 | flag_dump_unnumbered = save_unnumbered; | |
6ca5d1f6 | 4427 | final_insns_dump_p = false; |
2153915d AO |
4428 | |
4429 | if (fclose (final_output)) | |
4430 | { | |
4431 | error ("could not close final insn dump file %qs: %s", | |
4432 | flag_dump_final_insns, strerror (errno)); | |
4433 | flag_dump_final_insns = NULL; | |
4434 | } | |
ef330312 PB |
4435 | } |
4436 | ||
4437 | /* In case the function was not output, | |
4438 | don't leave any temporary anonymous types | |
4439 | queued up for sdb output. */ | |
4440 | #ifdef SDB_DEBUGGING_INFO | |
4441 | if (write_symbols == SDB_DEBUG) | |
4442 | sdbout_types (NULL_TREE); | |
4443 | #endif | |
4444 | ||
5f39ad47 | 4445 | flag_rerun_cse_after_global_opts = 0; |
ef330312 PB |
4446 | reload_completed = 0; |
4447 | epilogue_completed = 0; | |
23249ac4 DB |
4448 | #ifdef STACK_REGS |
4449 | regstack_completed = 0; | |
4450 | #endif | |
ef330312 PB |
4451 | |
4452 | /* Clear out the insn_length contents now that they are no | |
4453 | longer valid. */ | |
4454 | init_insn_lengths (); | |
4455 | ||
4456 | /* Show no temporary slots allocated. */ | |
4457 | init_temp_slots (); | |
4458 | ||
ef330312 PB |
4459 | free_bb_for_insn (); |
4460 | ||
55b34b5f RG |
4461 | delete_tree_ssa (); |
4462 | ||
ef330312 PB |
4463 | if (targetm.binds_local_p (current_function_decl)) |
4464 | { | |
17b29c0a | 4465 | unsigned int pref = crtl->preferred_stack_boundary; |
cb91fab0 JH |
4466 | if (crtl->stack_alignment_needed > crtl->preferred_stack_boundary) |
4467 | pref = crtl->stack_alignment_needed; | |
ef330312 PB |
4468 | cgraph_rtl_info (current_function_decl)->preferred_incoming_stack_boundary |
4469 | = pref; | |
4470 | } | |
4471 | ||
4472 | /* Make sure volatile mem refs aren't considered valid operands for | |
4473 | arithmetic insns. We must call this here if this is a nested inline | |
4474 | function, since the above code leaves us in the init_recog state, | |
4475 | and the function context push/pop code does not save/restore volatile_ok. | |
4476 | ||
4477 | ??? Maybe it isn't necessary for expand_start_function to call this | |
4478 | anymore if we do it here? */ | |
4479 | ||
4480 | init_recog_no_volatile (); | |
4481 | ||
4482 | /* We're done with this function. Free up memory if we can. */ | |
4483 | free_after_parsing (cfun); | |
4484 | free_after_compilation (cfun); | |
c2924966 | 4485 | return 0; |
ef330312 PB |
4486 | } |
4487 | ||
8ddbbcae | 4488 | struct rtl_opt_pass pass_clean_state = |
ef330312 | 4489 | { |
8ddbbcae JH |
4490 | { |
4491 | RTL_PASS, | |
cf400ddb | 4492 | "*clean_state", /* name */ |
ef330312 PB |
4493 | NULL, /* gate */ |
4494 | rest_of_clean_state, /* execute */ | |
4495 | NULL, /* sub */ | |
4496 | NULL, /* next */ | |
4497 | 0, /* static_pass_number */ | |
4498 | TV_FINAL, /* tv_id */ | |
4499 | 0, /* properties_required */ | |
4500 | 0, /* properties_provided */ | |
4501 | PROP_rtl, /* properties_destroyed */ | |
4502 | 0, /* todo_flags_start */ | |
8ddbbcae JH |
4503 | 0 /* todo_flags_finish */ |
4504 | } | |
ef330312 | 4505 | }; |