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3cf2715d | 1 | /* Convert RTL to assembler code and output it, for GNU compiler. |
cbe34bb5 | 2 | Copyright (C) 1987-2017 Free Software Foundation, Inc. |
3cf2715d | 3 | |
1322177d | 4 | This file is part of GCC. |
3cf2715d | 5 | |
1322177d LB |
6 | GCC is free software; you can redistribute it and/or modify it under |
7 | the terms of the GNU General Public License as published by the Free | |
9dcd6f09 | 8 | Software Foundation; either version 3, or (at your option) any later |
1322177d | 9 | version. |
3cf2715d | 10 | |
1322177d LB |
11 | GCC is distributed in the hope that it will be useful, but WITHOUT ANY |
12 | WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
13 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
14 | for more details. | |
3cf2715d DE |
15 | |
16 | You should have received a copy of the GNU General Public License | |
9dcd6f09 NC |
17 | along with GCC; see the file COPYING3. If not see |
18 | <http://www.gnu.org/licenses/>. */ | |
3cf2715d | 19 | |
3cf2715d DE |
20 | /* This is the final pass of the compiler. |
21 | It looks at the rtl code for a function and outputs assembler code. | |
22 | ||
23 | Call `final_start_function' to output the assembler code for function entry, | |
24 | `final' to output assembler code for some RTL code, | |
25 | `final_end_function' to output assembler code for function exit. | |
26 | If a function is compiled in several pieces, each piece is | |
27 | output separately with `final'. | |
28 | ||
29 | Some optimizations are also done at this level. | |
30 | Move instructions that were made unnecessary by good register allocation | |
31 | are detected and omitted from the output. (Though most of these | |
32 | are removed by the last jump pass.) | |
33 | ||
34 | Instructions to set the condition codes are omitted when it can be | |
35 | seen that the condition codes already had the desired values. | |
36 | ||
37 | In some cases it is sufficient if the inherited condition codes | |
38 | have related values, but this may require the following insn | |
39 | (the one that tests the condition codes) to be modified. | |
40 | ||
41 | The code for the function prologue and epilogue are generated | |
08c148a8 NB |
42 | directly in assembler by the target functions function_prologue and |
43 | function_epilogue. Those instructions never exist as rtl. */ | |
3cf2715d DE |
44 | |
45 | #include "config.h" | |
01736018 | 46 | #define INCLUDE_ALGORITHM /* reverse */ |
670ee920 | 47 | #include "system.h" |
4977bab6 | 48 | #include "coretypes.h" |
c7131fb2 | 49 | #include "backend.h" |
957060b5 | 50 | #include "target.h" |
3cf2715d | 51 | #include "rtl.h" |
957060b5 AM |
52 | #include "tree.h" |
53 | #include "cfghooks.h" | |
c7131fb2 | 54 | #include "df.h" |
4d0cdd0c | 55 | #include "memmodel.h" |
6baf1cc8 | 56 | #include "tm_p.h" |
3cf2715d | 57 | #include "insn-config.h" |
957060b5 AM |
58 | #include "regs.h" |
59 | #include "emit-rtl.h" | |
3cf2715d | 60 | #include "recog.h" |
957060b5 | 61 | #include "cgraph.h" |
957060b5 | 62 | #include "tree-pretty-print.h" /* for dump_function_header */ |
957060b5 AM |
63 | #include "varasm.h" |
64 | #include "insn-attr.h" | |
3cf2715d DE |
65 | #include "conditions.h" |
66 | #include "flags.h" | |
3cf2715d | 67 | #include "output.h" |
3d195391 | 68 | #include "except.h" |
0cbd9993 MLI |
69 | #include "rtl-error.h" |
70 | #include "toplev.h" /* exact_log2, floor_log2 */ | |
d6f4ec51 | 71 | #include "reload.h" |
ab87f8c8 | 72 | #include "intl.h" |
60393bbc | 73 | #include "cfgrtl.h" |
a5a42b92 | 74 | #include "debug.h" |
ef330312 | 75 | #include "tree-pass.h" |
442b4905 | 76 | #include "tree-ssa.h" |
edbed3d3 JH |
77 | #include "cfgloop.h" |
78 | #include "params.h" | |
ef1b3fda | 79 | #include "asan.h" |
effb8a26 | 80 | #include "rtl-iter.h" |
013a8899 | 81 | #include "print-rtl.h" |
3cf2715d | 82 | |
440aabf8 | 83 | #ifdef XCOFF_DEBUGGING_INFO |
957060b5 | 84 | #include "xcoffout.h" /* Needed for external data declarations. */ |
440aabf8 NB |
85 | #endif |
86 | ||
76ead72b | 87 | #include "dwarf2out.h" |
76ead72b | 88 | |
6a08f7b3 DP |
89 | #ifdef DBX_DEBUGGING_INFO |
90 | #include "dbxout.h" | |
91 | #endif | |
92 | ||
ce82daed | 93 | #include "sdbout.h" |
ce82daed | 94 | |
906668bb BS |
95 | /* Most ports that aren't using cc0 don't need to define CC_STATUS_INIT. |
96 | So define a null default for it to save conditionalization later. */ | |
3cf2715d DE |
97 | #ifndef CC_STATUS_INIT |
98 | #define CC_STATUS_INIT | |
99 | #endif | |
100 | ||
3cf2715d DE |
101 | /* Is the given character a logical line separator for the assembler? */ |
102 | #ifndef IS_ASM_LOGICAL_LINE_SEPARATOR | |
980d8882 | 103 | #define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) ((C) == ';') |
3cf2715d DE |
104 | #endif |
105 | ||
75197b37 BS |
106 | #ifndef JUMP_TABLES_IN_TEXT_SECTION |
107 | #define JUMP_TABLES_IN_TEXT_SECTION 0 | |
108 | #endif | |
109 | ||
589fe865 | 110 | /* Bitflags used by final_scan_insn. */ |
70aacc97 JJ |
111 | #define SEEN_NOTE 1 |
112 | #define SEEN_EMITTED 2 | |
589fe865 | 113 | |
3cf2715d | 114 | /* Last insn processed by final_scan_insn. */ |
fa7af581 DM |
115 | static rtx_insn *debug_insn; |
116 | rtx_insn *current_output_insn; | |
3cf2715d DE |
117 | |
118 | /* Line number of last NOTE. */ | |
119 | static int last_linenum; | |
120 | ||
497b7c47 JJ |
121 | /* Column number of last NOTE. */ |
122 | static int last_columnnum; | |
123 | ||
6c52e687 CC |
124 | /* Last discriminator written to assembly. */ |
125 | static int last_discriminator; | |
126 | ||
127 | /* Discriminator of current block. */ | |
128 | static int discriminator; | |
129 | ||
eac40081 RK |
130 | /* Highest line number in current block. */ |
131 | static int high_block_linenum; | |
132 | ||
133 | /* Likewise for function. */ | |
134 | static int high_function_linenum; | |
135 | ||
3cf2715d | 136 | /* Filename of last NOTE. */ |
3cce094d | 137 | static const char *last_filename; |
3cf2715d | 138 | |
497b7c47 | 139 | /* Override filename, line and column number. */ |
d752cfdb JJ |
140 | static const char *override_filename; |
141 | static int override_linenum; | |
497b7c47 | 142 | static int override_columnnum; |
d752cfdb | 143 | |
b8176fe4 EB |
144 | /* Whether to force emission of a line note before the next insn. */ |
145 | static bool force_source_line = false; | |
b0efb46b | 146 | |
5f2f0edd | 147 | extern const int length_unit_log; /* This is defined in insn-attrtab.c. */ |
fc470718 | 148 | |
3cf2715d | 149 | /* Nonzero while outputting an `asm' with operands. |
535a42b1 | 150 | This means that inconsistencies are the user's fault, so don't die. |
3cf2715d | 151 | The precise value is the insn being output, to pass to error_for_asm. */ |
1c22488e | 152 | const rtx_insn *this_is_asm_operands; |
3cf2715d DE |
153 | |
154 | /* Number of operands of this insn, for an `asm' with operands. */ | |
22bf4422 | 155 | static unsigned int insn_noperands; |
3cf2715d DE |
156 | |
157 | /* Compare optimization flag. */ | |
158 | ||
159 | static rtx last_ignored_compare = 0; | |
160 | ||
3cf2715d DE |
161 | /* Assign a unique number to each insn that is output. |
162 | This can be used to generate unique local labels. */ | |
163 | ||
164 | static int insn_counter = 0; | |
165 | ||
3cf2715d DE |
166 | /* This variable contains machine-dependent flags (defined in tm.h) |
167 | set and examined by output routines | |
168 | that describe how to interpret the condition codes properly. */ | |
169 | ||
170 | CC_STATUS cc_status; | |
171 | ||
172 | /* During output of an insn, this contains a copy of cc_status | |
173 | from before the insn. */ | |
174 | ||
175 | CC_STATUS cc_prev_status; | |
3cf2715d | 176 | |
18c038b9 | 177 | /* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */ |
3cf2715d DE |
178 | |
179 | static int block_depth; | |
180 | ||
181 | /* Nonzero if have enabled APP processing of our assembler output. */ | |
182 | ||
183 | static int app_on; | |
184 | ||
185 | /* If we are outputting an insn sequence, this contains the sequence rtx. | |
186 | Zero otherwise. */ | |
187 | ||
b32d5189 | 188 | rtx_sequence *final_sequence; |
3cf2715d DE |
189 | |
190 | #ifdef ASSEMBLER_DIALECT | |
191 | ||
192 | /* Number of the assembler dialect to use, starting at 0. */ | |
193 | static int dialect_number; | |
194 | #endif | |
195 | ||
afe48e06 RH |
196 | /* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */ |
197 | rtx current_insn_predicate; | |
afe48e06 | 198 | |
6ca5d1f6 JJ |
199 | /* True if printing into -fdump-final-insns= dump. */ |
200 | bool final_insns_dump_p; | |
201 | ||
ddd84654 JJ |
202 | /* True if profile_function should be called, but hasn't been called yet. */ |
203 | static bool need_profile_function; | |
204 | ||
6cf9ac28 | 205 | static int asm_insn_count (rtx); |
6cf9ac28 AJ |
206 | static void profile_function (FILE *); |
207 | static void profile_after_prologue (FILE *); | |
fa7af581 | 208 | static bool notice_source_line (rtx_insn *, bool *); |
6fb5fa3c | 209 | static rtx walk_alter_subreg (rtx *, bool *); |
6cf9ac28 | 210 | static void output_asm_name (void); |
fa7af581 | 211 | static void output_alternate_entry_point (FILE *, rtx_insn *); |
6cf9ac28 AJ |
212 | static tree get_mem_expr_from_op (rtx, int *); |
213 | static void output_asm_operand_names (rtx *, int *, int); | |
e9a25f70 | 214 | #ifdef LEAF_REGISTERS |
fa7af581 | 215 | static void leaf_renumber_regs (rtx_insn *); |
e9a25f70 | 216 | #endif |
f1e52ed6 | 217 | #if HAVE_cc0 |
6cf9ac28 | 218 | static int alter_cond (rtx); |
e9a25f70 | 219 | #endif |
ca3075bd | 220 | #ifndef ADDR_VEC_ALIGN |
9b2ea071 | 221 | static int final_addr_vec_align (rtx_insn *); |
ca3075bd | 222 | #endif |
6cf9ac28 | 223 | static int align_fuzz (rtx, rtx, int, unsigned); |
27c07cc5 | 224 | static void collect_fn_hard_reg_usage (void); |
fa7af581 | 225 | static tree get_call_fndecl (rtx_insn *); |
3cf2715d DE |
226 | \f |
227 | /* Initialize data in final at the beginning of a compilation. */ | |
228 | ||
229 | void | |
6cf9ac28 | 230 | init_final (const char *filename ATTRIBUTE_UNUSED) |
3cf2715d | 231 | { |
3cf2715d | 232 | app_on = 0; |
3cf2715d DE |
233 | final_sequence = 0; |
234 | ||
235 | #ifdef ASSEMBLER_DIALECT | |
236 | dialect_number = ASSEMBLER_DIALECT; | |
237 | #endif | |
238 | } | |
239 | ||
08c148a8 | 240 | /* Default target function prologue and epilogue assembler output. |
b9f22704 | 241 | |
08c148a8 NB |
242 | If not overridden for epilogue code, then the function body itself |
243 | contains return instructions wherever needed. */ | |
244 | void | |
6cf9ac28 AJ |
245 | default_function_pro_epilogue (FILE *file ATTRIBUTE_UNUSED, |
246 | HOST_WIDE_INT size ATTRIBUTE_UNUSED) | |
08c148a8 NB |
247 | { |
248 | } | |
249 | ||
14d11d40 IS |
250 | void |
251 | default_function_switched_text_sections (FILE *file ATTRIBUTE_UNUSED, | |
252 | tree decl ATTRIBUTE_UNUSED, | |
253 | bool new_is_cold ATTRIBUTE_UNUSED) | |
254 | { | |
255 | } | |
256 | ||
b4c25db2 NB |
257 | /* Default target hook that outputs nothing to a stream. */ |
258 | void | |
6cf9ac28 | 259 | no_asm_to_stream (FILE *file ATTRIBUTE_UNUSED) |
b4c25db2 NB |
260 | { |
261 | } | |
262 | ||
3cf2715d DE |
263 | /* Enable APP processing of subsequent output. |
264 | Used before the output from an `asm' statement. */ | |
265 | ||
266 | void | |
6cf9ac28 | 267 | app_enable (void) |
3cf2715d DE |
268 | { |
269 | if (! app_on) | |
270 | { | |
51723711 | 271 | fputs (ASM_APP_ON, asm_out_file); |
3cf2715d DE |
272 | app_on = 1; |
273 | } | |
274 | } | |
275 | ||
276 | /* Disable APP processing of subsequent output. | |
277 | Called from varasm.c before most kinds of output. */ | |
278 | ||
279 | void | |
6cf9ac28 | 280 | app_disable (void) |
3cf2715d DE |
281 | { |
282 | if (app_on) | |
283 | { | |
51723711 | 284 | fputs (ASM_APP_OFF, asm_out_file); |
3cf2715d DE |
285 | app_on = 0; |
286 | } | |
287 | } | |
288 | \f | |
f5d927c0 | 289 | /* Return the number of slots filled in the current |
3cf2715d DE |
290 | delayed branch sequence (we don't count the insn needing the |
291 | delay slot). Zero if not in a delayed branch sequence. */ | |
292 | ||
3cf2715d | 293 | int |
6cf9ac28 | 294 | dbr_sequence_length (void) |
3cf2715d DE |
295 | { |
296 | if (final_sequence != 0) | |
297 | return XVECLEN (final_sequence, 0) - 1; | |
298 | else | |
299 | return 0; | |
300 | } | |
3cf2715d DE |
301 | \f |
302 | /* The next two pages contain routines used to compute the length of an insn | |
303 | and to shorten branches. */ | |
304 | ||
305 | /* Arrays for insn lengths, and addresses. The latter is referenced by | |
306 | `insn_current_length'. */ | |
307 | ||
addd7df6 | 308 | static int *insn_lengths; |
9d98a694 | 309 | |
9771b263 | 310 | vec<int> insn_addresses_; |
3cf2715d | 311 | |
ea3cbda5 R |
312 | /* Max uid for which the above arrays are valid. */ |
313 | static int insn_lengths_max_uid; | |
314 | ||
3cf2715d DE |
315 | /* Address of insn being processed. Used by `insn_current_length'. */ |
316 | int insn_current_address; | |
317 | ||
fc470718 R |
318 | /* Address of insn being processed in previous iteration. */ |
319 | int insn_last_address; | |
320 | ||
d6a7951f | 321 | /* known invariant alignment of insn being processed. */ |
fc470718 R |
322 | int insn_current_align; |
323 | ||
95707627 R |
324 | /* After shorten_branches, for any insn, uid_align[INSN_UID (insn)] |
325 | gives the next following alignment insn that increases the known | |
326 | alignment, or NULL_RTX if there is no such insn. | |
327 | For any alignment obtained this way, we can again index uid_align with | |
328 | its uid to obtain the next following align that in turn increases the | |
329 | alignment, till we reach NULL_RTX; the sequence obtained this way | |
330 | for each insn we'll call the alignment chain of this insn in the following | |
331 | comments. */ | |
332 | ||
f5d927c0 KH |
333 | struct label_alignment |
334 | { | |
9e423e6d JW |
335 | short alignment; |
336 | short max_skip; | |
337 | }; | |
338 | ||
339 | static rtx *uid_align; | |
340 | static int *uid_shuid; | |
341 | static struct label_alignment *label_align; | |
95707627 | 342 | |
3cf2715d DE |
343 | /* Indicate that branch shortening hasn't yet been done. */ |
344 | ||
345 | void | |
6cf9ac28 | 346 | init_insn_lengths (void) |
3cf2715d | 347 | { |
95707627 R |
348 | if (uid_shuid) |
349 | { | |
350 | free (uid_shuid); | |
351 | uid_shuid = 0; | |
352 | } | |
353 | if (insn_lengths) | |
354 | { | |
355 | free (insn_lengths); | |
356 | insn_lengths = 0; | |
ea3cbda5 | 357 | insn_lengths_max_uid = 0; |
95707627 | 358 | } |
d327457f JR |
359 | if (HAVE_ATTR_length) |
360 | INSN_ADDRESSES_FREE (); | |
95707627 R |
361 | if (uid_align) |
362 | { | |
363 | free (uid_align); | |
364 | uid_align = 0; | |
365 | } | |
3cf2715d DE |
366 | } |
367 | ||
368 | /* Obtain the current length of an insn. If branch shortening has been done, | |
6fc0bb99 | 369 | get its actual length. Otherwise, use FALLBACK_FN to calculate the |
070a7956 | 370 | length. */ |
4df199d1 | 371 | static int |
84034c69 | 372 | get_attr_length_1 (rtx_insn *insn, int (*fallback_fn) (rtx_insn *)) |
3cf2715d | 373 | { |
3cf2715d DE |
374 | rtx body; |
375 | int i; | |
376 | int length = 0; | |
377 | ||
d327457f JR |
378 | if (!HAVE_ATTR_length) |
379 | return 0; | |
380 | ||
ea3cbda5 | 381 | if (insn_lengths_max_uid > INSN_UID (insn)) |
3cf2715d DE |
382 | return insn_lengths[INSN_UID (insn)]; |
383 | else | |
384 | switch (GET_CODE (insn)) | |
385 | { | |
386 | case NOTE: | |
387 | case BARRIER: | |
388 | case CODE_LABEL: | |
b5b8b0ac | 389 | case DEBUG_INSN: |
3cf2715d DE |
390 | return 0; |
391 | ||
392 | case CALL_INSN: | |
3cf2715d | 393 | case JUMP_INSN: |
39718607 | 394 | length = fallback_fn (insn); |
3cf2715d DE |
395 | break; |
396 | ||
397 | case INSN: | |
398 | body = PATTERN (insn); | |
399 | if (GET_CODE (body) == USE || GET_CODE (body) == CLOBBER) | |
400 | return 0; | |
401 | ||
402 | else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0) | |
070a7956 | 403 | length = asm_insn_count (body) * fallback_fn (insn); |
e429a50b DM |
404 | else if (rtx_sequence *seq = dyn_cast <rtx_sequence *> (body)) |
405 | for (i = 0; i < seq->len (); i++) | |
406 | length += get_attr_length_1 (seq->insn (i), fallback_fn); | |
3cf2715d | 407 | else |
070a7956 | 408 | length = fallback_fn (insn); |
e9a25f70 JL |
409 | break; |
410 | ||
411 | default: | |
412 | break; | |
3cf2715d DE |
413 | } |
414 | ||
415 | #ifdef ADJUST_INSN_LENGTH | |
416 | ADJUST_INSN_LENGTH (insn, length); | |
417 | #endif | |
418 | return length; | |
3cf2715d | 419 | } |
070a7956 R |
420 | |
421 | /* Obtain the current length of an insn. If branch shortening has been done, | |
422 | get its actual length. Otherwise, get its maximum length. */ | |
423 | int | |
84034c69 | 424 | get_attr_length (rtx_insn *insn) |
070a7956 R |
425 | { |
426 | return get_attr_length_1 (insn, insn_default_length); | |
427 | } | |
428 | ||
429 | /* Obtain the current length of an insn. If branch shortening has been done, | |
430 | get its actual length. Otherwise, get its minimum length. */ | |
431 | int | |
84034c69 | 432 | get_attr_min_length (rtx_insn *insn) |
070a7956 R |
433 | { |
434 | return get_attr_length_1 (insn, insn_min_length); | |
435 | } | |
3cf2715d | 436 | \f |
fc470718 R |
437 | /* Code to handle alignment inside shorten_branches. */ |
438 | ||
439 | /* Here is an explanation how the algorithm in align_fuzz can give | |
440 | proper results: | |
441 | ||
442 | Call a sequence of instructions beginning with alignment point X | |
443 | and continuing until the next alignment point `block X'. When `X' | |
f5d927c0 | 444 | is used in an expression, it means the alignment value of the |
fc470718 | 445 | alignment point. |
f5d927c0 | 446 | |
fc470718 R |
447 | Call the distance between the start of the first insn of block X, and |
448 | the end of the last insn of block X `IX', for the `inner size of X'. | |
449 | This is clearly the sum of the instruction lengths. | |
f5d927c0 | 450 | |
fc470718 R |
451 | Likewise with the next alignment-delimited block following X, which we |
452 | shall call block Y. | |
f5d927c0 | 453 | |
fc470718 R |
454 | Call the distance between the start of the first insn of block X, and |
455 | the start of the first insn of block Y `OX', for the `outer size of X'. | |
f5d927c0 | 456 | |
fc470718 | 457 | The estimated padding is then OX - IX. |
f5d927c0 | 458 | |
fc470718 | 459 | OX can be safely estimated as |
f5d927c0 | 460 | |
fc470718 R |
461 | if (X >= Y) |
462 | OX = round_up(IX, Y) | |
463 | else | |
464 | OX = round_up(IX, X) + Y - X | |
f5d927c0 | 465 | |
fc470718 R |
466 | Clearly est(IX) >= real(IX), because that only depends on the |
467 | instruction lengths, and those being overestimated is a given. | |
f5d927c0 | 468 | |
fc470718 R |
469 | Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so |
470 | we needn't worry about that when thinking about OX. | |
f5d927c0 | 471 | |
fc470718 R |
472 | When X >= Y, the alignment provided by Y adds no uncertainty factor |
473 | for branch ranges starting before X, so we can just round what we have. | |
474 | But when X < Y, we don't know anything about the, so to speak, | |
475 | `middle bits', so we have to assume the worst when aligning up from an | |
476 | address mod X to one mod Y, which is Y - X. */ | |
477 | ||
478 | #ifndef LABEL_ALIGN | |
efa3896a | 479 | #define LABEL_ALIGN(LABEL) align_labels_log |
fc470718 R |
480 | #endif |
481 | ||
482 | #ifndef LOOP_ALIGN | |
efa3896a | 483 | #define LOOP_ALIGN(LABEL) align_loops_log |
fc470718 R |
484 | #endif |
485 | ||
486 | #ifndef LABEL_ALIGN_AFTER_BARRIER | |
340f7e7c | 487 | #define LABEL_ALIGN_AFTER_BARRIER(LABEL) 0 |
fc470718 R |
488 | #endif |
489 | ||
247a370b JH |
490 | #ifndef JUMP_ALIGN |
491 | #define JUMP_ALIGN(LABEL) align_jumps_log | |
492 | #endif | |
493 | ||
ad0c4c36 | 494 | int |
9158a0d8 | 495 | default_label_align_after_barrier_max_skip (rtx_insn *insn ATTRIBUTE_UNUSED) |
ad0c4c36 DD |
496 | { |
497 | return 0; | |
498 | } | |
499 | ||
500 | int | |
9158a0d8 | 501 | default_loop_align_max_skip (rtx_insn *insn ATTRIBUTE_UNUSED) |
ad0c4c36 DD |
502 | { |
503 | return align_loops_max_skip; | |
504 | } | |
505 | ||
506 | int | |
9158a0d8 | 507 | default_label_align_max_skip (rtx_insn *insn ATTRIBUTE_UNUSED) |
ad0c4c36 DD |
508 | { |
509 | return align_labels_max_skip; | |
510 | } | |
511 | ||
512 | int | |
9158a0d8 | 513 | default_jump_align_max_skip (rtx_insn *insn ATTRIBUTE_UNUSED) |
ad0c4c36 DD |
514 | { |
515 | return align_jumps_max_skip; | |
516 | } | |
9e423e6d | 517 | |
fc470718 | 518 | #ifndef ADDR_VEC_ALIGN |
ca3075bd | 519 | static int |
9b2ea071 | 520 | final_addr_vec_align (rtx_insn *addr_vec) |
fc470718 | 521 | { |
2a841588 | 522 | int align = GET_MODE_SIZE (GET_MODE (PATTERN (addr_vec))); |
fc470718 R |
523 | |
524 | if (align > BIGGEST_ALIGNMENT / BITS_PER_UNIT) | |
525 | align = BIGGEST_ALIGNMENT / BITS_PER_UNIT; | |
2a841588 | 526 | return exact_log2 (align); |
fc470718 R |
527 | |
528 | } | |
f5d927c0 | 529 | |
fc470718 R |
530 | #define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC) |
531 | #endif | |
532 | ||
533 | #ifndef INSN_LENGTH_ALIGNMENT | |
534 | #define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log | |
535 | #endif | |
536 | ||
fc470718 R |
537 | #define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)]) |
538 | ||
de7987a6 | 539 | static int min_labelno, max_labelno; |
fc470718 R |
540 | |
541 | #define LABEL_TO_ALIGNMENT(LABEL) \ | |
9e423e6d JW |
542 | (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment) |
543 | ||
544 | #define LABEL_TO_MAX_SKIP(LABEL) \ | |
545 | (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip) | |
fc470718 R |
546 | |
547 | /* For the benefit of port specific code do this also as a function. */ | |
f5d927c0 | 548 | |
fc470718 | 549 | int |
6cf9ac28 | 550 | label_to_alignment (rtx label) |
fc470718 | 551 | { |
40a8f07a JJ |
552 | if (CODE_LABEL_NUMBER (label) <= max_labelno) |
553 | return LABEL_TO_ALIGNMENT (label); | |
554 | return 0; | |
555 | } | |
556 | ||
557 | int | |
558 | label_to_max_skip (rtx label) | |
559 | { | |
560 | if (CODE_LABEL_NUMBER (label) <= max_labelno) | |
561 | return LABEL_TO_MAX_SKIP (label); | |
562 | return 0; | |
fc470718 R |
563 | } |
564 | ||
fc470718 R |
565 | /* The differences in addresses |
566 | between a branch and its target might grow or shrink depending on | |
567 | the alignment the start insn of the range (the branch for a forward | |
568 | branch or the label for a backward branch) starts out on; if these | |
569 | differences are used naively, they can even oscillate infinitely. | |
570 | We therefore want to compute a 'worst case' address difference that | |
571 | is independent of the alignment the start insn of the range end | |
572 | up on, and that is at least as large as the actual difference. | |
573 | The function align_fuzz calculates the amount we have to add to the | |
574 | naively computed difference, by traversing the part of the alignment | |
575 | chain of the start insn of the range that is in front of the end insn | |
576 | of the range, and considering for each alignment the maximum amount | |
577 | that it might contribute to a size increase. | |
578 | ||
579 | For casesi tables, we also want to know worst case minimum amounts of | |
580 | address difference, in case a machine description wants to introduce | |
581 | some common offset that is added to all offsets in a table. | |
d6a7951f | 582 | For this purpose, align_fuzz with a growth argument of 0 computes the |
fc470718 R |
583 | appropriate adjustment. */ |
584 | ||
fc470718 R |
585 | /* Compute the maximum delta by which the difference of the addresses of |
586 | START and END might grow / shrink due to a different address for start | |
587 | which changes the size of alignment insns between START and END. | |
588 | KNOWN_ALIGN_LOG is the alignment known for START. | |
589 | GROWTH should be ~0 if the objective is to compute potential code size | |
590 | increase, and 0 if the objective is to compute potential shrink. | |
591 | The return value is undefined for any other value of GROWTH. */ | |
f5d927c0 | 592 | |
ca3075bd | 593 | static int |
6cf9ac28 | 594 | align_fuzz (rtx start, rtx end, int known_align_log, unsigned int growth) |
fc470718 R |
595 | { |
596 | int uid = INSN_UID (start); | |
597 | rtx align_label; | |
598 | int known_align = 1 << known_align_log; | |
599 | int end_shuid = INSN_SHUID (end); | |
600 | int fuzz = 0; | |
601 | ||
602 | for (align_label = uid_align[uid]; align_label; align_label = uid_align[uid]) | |
603 | { | |
604 | int align_addr, new_align; | |
605 | ||
606 | uid = INSN_UID (align_label); | |
9d98a694 | 607 | align_addr = INSN_ADDRESSES (uid) - insn_lengths[uid]; |
fc470718 R |
608 | if (uid_shuid[uid] > end_shuid) |
609 | break; | |
610 | known_align_log = LABEL_TO_ALIGNMENT (align_label); | |
611 | new_align = 1 << known_align_log; | |
612 | if (new_align < known_align) | |
613 | continue; | |
614 | fuzz += (-align_addr ^ growth) & (new_align - known_align); | |
615 | known_align = new_align; | |
616 | } | |
617 | return fuzz; | |
618 | } | |
619 | ||
620 | /* Compute a worst-case reference address of a branch so that it | |
621 | can be safely used in the presence of aligned labels. Since the | |
622 | size of the branch itself is unknown, the size of the branch is | |
623 | not included in the range. I.e. for a forward branch, the reference | |
624 | address is the end address of the branch as known from the previous | |
625 | branch shortening pass, minus a value to account for possible size | |
626 | increase due to alignment. For a backward branch, it is the start | |
627 | address of the branch as known from the current pass, plus a value | |
628 | to account for possible size increase due to alignment. | |
629 | NB.: Therefore, the maximum offset allowed for backward branches needs | |
630 | to exclude the branch size. */ | |
f5d927c0 | 631 | |
fc470718 | 632 | int |
8ba24b7b | 633 | insn_current_reference_address (rtx_insn *branch) |
fc470718 | 634 | { |
e67d1102 | 635 | rtx dest; |
5527bf14 RH |
636 | int seq_uid; |
637 | ||
638 | if (! INSN_ADDRESSES_SET_P ()) | |
639 | return 0; | |
640 | ||
e67d1102 | 641 | rtx_insn *seq = NEXT_INSN (PREV_INSN (branch)); |
5527bf14 | 642 | seq_uid = INSN_UID (seq); |
4b4bf941 | 643 | if (!JUMP_P (branch)) |
fc470718 R |
644 | /* This can happen for example on the PA; the objective is to know the |
645 | offset to address something in front of the start of the function. | |
646 | Thus, we can treat it like a backward branch. | |
647 | We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than | |
648 | any alignment we'd encounter, so we skip the call to align_fuzz. */ | |
649 | return insn_current_address; | |
650 | dest = JUMP_LABEL (branch); | |
5527bf14 | 651 | |
b9f22704 | 652 | /* BRANCH has no proper alignment chain set, so use SEQ. |
afc6898e BS |
653 | BRANCH also has no INSN_SHUID. */ |
654 | if (INSN_SHUID (seq) < INSN_SHUID (dest)) | |
fc470718 | 655 | { |
f5d927c0 | 656 | /* Forward branch. */ |
fc470718 | 657 | return (insn_last_address + insn_lengths[seq_uid] |
26024475 | 658 | - align_fuzz (seq, dest, length_unit_log, ~0)); |
fc470718 R |
659 | } |
660 | else | |
661 | { | |
f5d927c0 | 662 | /* Backward branch. */ |
fc470718 | 663 | return (insn_current_address |
923f7cf9 | 664 | + align_fuzz (dest, seq, length_unit_log, ~0)); |
fc470718 R |
665 | } |
666 | } | |
fc470718 | 667 | \f |
65727068 KH |
668 | /* Compute branch alignments based on frequency information in the |
669 | CFG. */ | |
670 | ||
e855c69d | 671 | unsigned int |
6cf9ac28 | 672 | compute_alignments (void) |
247a370b | 673 | { |
247a370b | 674 | int log, max_skip, max_log; |
e0082a72 | 675 | basic_block bb; |
edbed3d3 JH |
676 | int freq_max = 0; |
677 | int freq_threshold = 0; | |
247a370b JH |
678 | |
679 | if (label_align) | |
680 | { | |
681 | free (label_align); | |
682 | label_align = 0; | |
683 | } | |
684 | ||
685 | max_labelno = max_label_num (); | |
686 | min_labelno = get_first_label_num (); | |
5ed6ace5 | 687 | label_align = XCNEWVEC (struct label_alignment, max_labelno - min_labelno + 1); |
247a370b JH |
688 | |
689 | /* If not optimizing or optimizing for size, don't assign any alignments. */ | |
efd8f750 | 690 | if (! optimize || optimize_function_for_size_p (cfun)) |
c2924966 | 691 | return 0; |
247a370b | 692 | |
edbed3d3 JH |
693 | if (dump_file) |
694 | { | |
532aafad | 695 | dump_reg_info (dump_file); |
edbed3d3 JH |
696 | dump_flow_info (dump_file, TDF_DETAILS); |
697 | flow_loops_dump (dump_file, NULL, 1); | |
edbed3d3 | 698 | } |
58082ff6 | 699 | loop_optimizer_init (AVOID_CFG_MODIFICATIONS); |
11cd3bed | 700 | FOR_EACH_BB_FN (bb, cfun) |
edbed3d3 JH |
701 | if (bb->frequency > freq_max) |
702 | freq_max = bb->frequency; | |
703 | freq_threshold = freq_max / PARAM_VALUE (PARAM_ALIGN_THRESHOLD); | |
704 | ||
705 | if (dump_file) | |
c3284718 | 706 | fprintf (dump_file, "freq_max: %i\n",freq_max); |
11cd3bed | 707 | FOR_EACH_BB_FN (bb, cfun) |
247a370b | 708 | { |
fa7af581 | 709 | rtx_insn *label = BB_HEAD (bb); |
247a370b JH |
710 | int fallthru_frequency = 0, branch_frequency = 0, has_fallthru = 0; |
711 | edge e; | |
628f6a4e | 712 | edge_iterator ei; |
247a370b | 713 | |
4b4bf941 | 714 | if (!LABEL_P (label) |
8bcf15f6 | 715 | || optimize_bb_for_size_p (bb)) |
edbed3d3 JH |
716 | { |
717 | if (dump_file) | |
c3284718 RS |
718 | fprintf (dump_file, |
719 | "BB %4i freq %4i loop %2i loop_depth %2i skipped.\n", | |
720 | bb->index, bb->frequency, bb->loop_father->num, | |
721 | bb_loop_depth (bb)); | |
edbed3d3 JH |
722 | continue; |
723 | } | |
247a370b | 724 | max_log = LABEL_ALIGN (label); |
ad0c4c36 | 725 | max_skip = targetm.asm_out.label_align_max_skip (label); |
247a370b | 726 | |
628f6a4e | 727 | FOR_EACH_EDGE (e, ei, bb->preds) |
247a370b JH |
728 | { |
729 | if (e->flags & EDGE_FALLTHRU) | |
730 | has_fallthru = 1, fallthru_frequency += EDGE_FREQUENCY (e); | |
731 | else | |
732 | branch_frequency += EDGE_FREQUENCY (e); | |
733 | } | |
edbed3d3 JH |
734 | if (dump_file) |
735 | { | |
c3284718 RS |
736 | fprintf (dump_file, "BB %4i freq %4i loop %2i loop_depth" |
737 | " %2i fall %4i branch %4i", | |
738 | bb->index, bb->frequency, bb->loop_father->num, | |
739 | bb_loop_depth (bb), | |
740 | fallthru_frequency, branch_frequency); | |
edbed3d3 JH |
741 | if (!bb->loop_father->inner && bb->loop_father->num) |
742 | fprintf (dump_file, " inner_loop"); | |
743 | if (bb->loop_father->header == bb) | |
744 | fprintf (dump_file, " loop_header"); | |
745 | fprintf (dump_file, "\n"); | |
746 | } | |
247a370b | 747 | |
f63d1bf7 | 748 | /* There are two purposes to align block with no fallthru incoming edge: |
247a370b | 749 | 1) to avoid fetch stalls when branch destination is near cache boundary |
d6a7951f | 750 | 2) to improve cache efficiency in case the previous block is not executed |
247a370b JH |
751 | (so it does not need to be in the cache). |
752 | ||
753 | We to catch first case, we align frequently executed blocks. | |
754 | To catch the second, we align blocks that are executed more frequently | |
eaec9b3d | 755 | than the predecessor and the predecessor is likely to not be executed |
247a370b JH |
756 | when function is called. */ |
757 | ||
758 | if (!has_fallthru | |
edbed3d3 | 759 | && (branch_frequency > freq_threshold |
f6366fc7 ZD |
760 | || (bb->frequency > bb->prev_bb->frequency * 10 |
761 | && (bb->prev_bb->frequency | |
fefa31b5 | 762 | <= ENTRY_BLOCK_PTR_FOR_FN (cfun)->frequency / 2)))) |
247a370b JH |
763 | { |
764 | log = JUMP_ALIGN (label); | |
edbed3d3 | 765 | if (dump_file) |
c3284718 | 766 | fprintf (dump_file, " jump alignment added.\n"); |
247a370b JH |
767 | if (max_log < log) |
768 | { | |
769 | max_log = log; | |
ad0c4c36 | 770 | max_skip = targetm.asm_out.jump_align_max_skip (label); |
247a370b JH |
771 | } |
772 | } | |
773 | /* In case block is frequent and reached mostly by non-fallthru edge, | |
09da1532 | 774 | align it. It is most likely a first block of loop. */ |
247a370b | 775 | if (has_fallthru |
82b9c015 EB |
776 | && !(single_succ_p (bb) |
777 | && single_succ (bb) == EXIT_BLOCK_PTR_FOR_FN (cfun)) | |
efd8f750 | 778 | && optimize_bb_for_speed_p (bb) |
edbed3d3 JH |
779 | && branch_frequency + fallthru_frequency > freq_threshold |
780 | && (branch_frequency | |
781 | > fallthru_frequency * PARAM_VALUE (PARAM_ALIGN_LOOP_ITERATIONS))) | |
247a370b JH |
782 | { |
783 | log = LOOP_ALIGN (label); | |
edbed3d3 | 784 | if (dump_file) |
c3284718 | 785 | fprintf (dump_file, " internal loop alignment added.\n"); |
247a370b JH |
786 | if (max_log < log) |
787 | { | |
788 | max_log = log; | |
ad0c4c36 | 789 | max_skip = targetm.asm_out.loop_align_max_skip (label); |
247a370b JH |
790 | } |
791 | } | |
792 | LABEL_TO_ALIGNMENT (label) = max_log; | |
793 | LABEL_TO_MAX_SKIP (label) = max_skip; | |
794 | } | |
edbed3d3 | 795 | |
58082ff6 PH |
796 | loop_optimizer_finalize (); |
797 | free_dominance_info (CDI_DOMINATORS); | |
c2924966 | 798 | return 0; |
247a370b | 799 | } |
ef330312 | 800 | |
5cf6635b EB |
801 | /* Grow the LABEL_ALIGN array after new labels are created. */ |
802 | ||
803 | static void | |
804 | grow_label_align (void) | |
805 | { | |
806 | int old = max_labelno; | |
807 | int n_labels; | |
808 | int n_old_labels; | |
809 | ||
810 | max_labelno = max_label_num (); | |
811 | ||
812 | n_labels = max_labelno - min_labelno + 1; | |
813 | n_old_labels = old - min_labelno + 1; | |
814 | ||
815 | label_align = XRESIZEVEC (struct label_alignment, label_align, n_labels); | |
816 | ||
817 | /* Range of labels grows monotonically in the function. Failing here | |
818 | means that the initialization of array got lost. */ | |
819 | gcc_assert (n_old_labels <= n_labels); | |
820 | ||
821 | memset (label_align + n_old_labels, 0, | |
822 | (n_labels - n_old_labels) * sizeof (struct label_alignment)); | |
823 | } | |
824 | ||
825 | /* Update the already computed alignment information. LABEL_PAIRS is a vector | |
826 | made up of pairs of labels for which the alignment information of the first | |
827 | element will be copied from that of the second element. */ | |
828 | ||
829 | void | |
830 | update_alignments (vec<rtx> &label_pairs) | |
831 | { | |
832 | unsigned int i = 0; | |
33fd5699 | 833 | rtx iter, label = NULL_RTX; |
5cf6635b EB |
834 | |
835 | if (max_labelno != max_label_num ()) | |
836 | grow_label_align (); | |
837 | ||
838 | FOR_EACH_VEC_ELT (label_pairs, i, iter) | |
839 | if (i & 1) | |
840 | { | |
841 | LABEL_TO_ALIGNMENT (label) = LABEL_TO_ALIGNMENT (iter); | |
842 | LABEL_TO_MAX_SKIP (label) = LABEL_TO_MAX_SKIP (iter); | |
843 | } | |
844 | else | |
845 | label = iter; | |
846 | } | |
847 | ||
27a4cd48 DM |
848 | namespace { |
849 | ||
850 | const pass_data pass_data_compute_alignments = | |
ef330312 | 851 | { |
27a4cd48 DM |
852 | RTL_PASS, /* type */ |
853 | "alignments", /* name */ | |
854 | OPTGROUP_NONE, /* optinfo_flags */ | |
27a4cd48 DM |
855 | TV_NONE, /* tv_id */ |
856 | 0, /* properties_required */ | |
857 | 0, /* properties_provided */ | |
858 | 0, /* properties_destroyed */ | |
859 | 0, /* todo_flags_start */ | |
3bea341f | 860 | 0, /* todo_flags_finish */ |
ef330312 PB |
861 | }; |
862 | ||
27a4cd48 DM |
863 | class pass_compute_alignments : public rtl_opt_pass |
864 | { | |
865 | public: | |
c3284718 RS |
866 | pass_compute_alignments (gcc::context *ctxt) |
867 | : rtl_opt_pass (pass_data_compute_alignments, ctxt) | |
27a4cd48 DM |
868 | {} |
869 | ||
870 | /* opt_pass methods: */ | |
be55bfe6 | 871 | virtual unsigned int execute (function *) { return compute_alignments (); } |
27a4cd48 DM |
872 | |
873 | }; // class pass_compute_alignments | |
874 | ||
875 | } // anon namespace | |
876 | ||
877 | rtl_opt_pass * | |
878 | make_pass_compute_alignments (gcc::context *ctxt) | |
879 | { | |
880 | return new pass_compute_alignments (ctxt); | |
881 | } | |
882 | ||
247a370b | 883 | \f |
3cf2715d DE |
884 | /* Make a pass over all insns and compute their actual lengths by shortening |
885 | any branches of variable length if possible. */ | |
886 | ||
fc470718 R |
887 | /* shorten_branches might be called multiple times: for example, the SH |
888 | port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG. | |
889 | In order to do this, it needs proper length information, which it obtains | |
890 | by calling shorten_branches. This cannot be collapsed with | |
d6a7951f | 891 | shorten_branches itself into a single pass unless we also want to integrate |
fc470718 R |
892 | reorg.c, since the branch splitting exposes new instructions with delay |
893 | slots. */ | |
894 | ||
3cf2715d | 895 | void |
49922db8 | 896 | shorten_branches (rtx_insn *first) |
3cf2715d | 897 | { |
fa7af581 | 898 | rtx_insn *insn; |
fc470718 R |
899 | int max_uid; |
900 | int i; | |
fc470718 | 901 | int max_log; |
9e423e6d | 902 | int max_skip; |
fc470718 | 903 | #define MAX_CODE_ALIGN 16 |
fa7af581 | 904 | rtx_insn *seq; |
3cf2715d | 905 | int something_changed = 1; |
3cf2715d DE |
906 | char *varying_length; |
907 | rtx body; | |
908 | int uid; | |
fc470718 | 909 | rtx align_tab[MAX_CODE_ALIGN]; |
3cf2715d | 910 | |
3446405d JH |
911 | /* Compute maximum UID and allocate label_align / uid_shuid. */ |
912 | max_uid = get_max_uid (); | |
d9b6874b | 913 | |
471854f8 | 914 | /* Free uid_shuid before reallocating it. */ |
07a1f795 | 915 | free (uid_shuid); |
b0efb46b | 916 | |
5ed6ace5 | 917 | uid_shuid = XNEWVEC (int, max_uid); |
25e22dc0 | 918 | |
247a370b | 919 | if (max_labelno != max_label_num ()) |
5cf6635b | 920 | grow_label_align (); |
247a370b | 921 | |
fc470718 R |
922 | /* Initialize label_align and set up uid_shuid to be strictly |
923 | monotonically rising with insn order. */ | |
e2faec75 R |
924 | /* We use max_log here to keep track of the maximum alignment we want to |
925 | impose on the next CODE_LABEL (or the current one if we are processing | |
926 | the CODE_LABEL itself). */ | |
f5d927c0 | 927 | |
9e423e6d JW |
928 | max_log = 0; |
929 | max_skip = 0; | |
930 | ||
931 | for (insn = get_insns (), i = 1; insn; insn = NEXT_INSN (insn)) | |
fc470718 R |
932 | { |
933 | int log; | |
934 | ||
935 | INSN_SHUID (insn) = i++; | |
2c3c49de | 936 | if (INSN_P (insn)) |
80838531 | 937 | continue; |
b0efb46b | 938 | |
80838531 | 939 | if (LABEL_P (insn)) |
fc470718 | 940 | { |
fa7af581 | 941 | rtx_insn *next; |
0676c393 | 942 | bool next_is_jumptable; |
ff81832f | 943 | |
247a370b JH |
944 | /* Merge in alignments computed by compute_alignments. */ |
945 | log = LABEL_TO_ALIGNMENT (insn); | |
946 | if (max_log < log) | |
947 | { | |
948 | max_log = log; | |
949 | max_skip = LABEL_TO_MAX_SKIP (insn); | |
950 | } | |
fc470718 | 951 | |
0676c393 MM |
952 | next = next_nonnote_insn (insn); |
953 | next_is_jumptable = next && JUMP_TABLE_DATA_P (next); | |
954 | if (!next_is_jumptable) | |
9e423e6d | 955 | { |
0676c393 MM |
956 | log = LABEL_ALIGN (insn); |
957 | if (max_log < log) | |
958 | { | |
959 | max_log = log; | |
ad0c4c36 | 960 | max_skip = targetm.asm_out.label_align_max_skip (insn); |
0676c393 | 961 | } |
9e423e6d | 962 | } |
75197b37 BS |
963 | /* ADDR_VECs only take room if read-only data goes into the text |
964 | section. */ | |
0676c393 MM |
965 | if ((JUMP_TABLES_IN_TEXT_SECTION |
966 | || readonly_data_section == text_section) | |
967 | && next_is_jumptable) | |
968 | { | |
969 | log = ADDR_VEC_ALIGN (next); | |
970 | if (max_log < log) | |
971 | { | |
972 | max_log = log; | |
ad0c4c36 | 973 | max_skip = targetm.asm_out.label_align_max_skip (insn); |
0676c393 MM |
974 | } |
975 | } | |
fc470718 | 976 | LABEL_TO_ALIGNMENT (insn) = max_log; |
9e423e6d | 977 | LABEL_TO_MAX_SKIP (insn) = max_skip; |
fc470718 | 978 | max_log = 0; |
9e423e6d | 979 | max_skip = 0; |
fc470718 | 980 | } |
4b4bf941 | 981 | else if (BARRIER_P (insn)) |
fc470718 | 982 | { |
fa7af581 | 983 | rtx_insn *label; |
fc470718 | 984 | |
2c3c49de | 985 | for (label = insn; label && ! INSN_P (label); |
fc470718 | 986 | label = NEXT_INSN (label)) |
4b4bf941 | 987 | if (LABEL_P (label)) |
fc470718 R |
988 | { |
989 | log = LABEL_ALIGN_AFTER_BARRIER (insn); | |
990 | if (max_log < log) | |
9e423e6d JW |
991 | { |
992 | max_log = log; | |
ad0c4c36 | 993 | max_skip = targetm.asm_out.label_align_after_barrier_max_skip (label); |
9e423e6d | 994 | } |
fc470718 R |
995 | break; |
996 | } | |
997 | } | |
fc470718 | 998 | } |
d327457f JR |
999 | if (!HAVE_ATTR_length) |
1000 | return; | |
fc470718 R |
1001 | |
1002 | /* Allocate the rest of the arrays. */ | |
5ed6ace5 | 1003 | insn_lengths = XNEWVEC (int, max_uid); |
ea3cbda5 | 1004 | insn_lengths_max_uid = max_uid; |
af035616 R |
1005 | /* Syntax errors can lead to labels being outside of the main insn stream. |
1006 | Initialize insn_addresses, so that we get reproducible results. */ | |
9d98a694 | 1007 | INSN_ADDRESSES_ALLOC (max_uid); |
fc470718 | 1008 | |
5ed6ace5 | 1009 | varying_length = XCNEWVEC (char, max_uid); |
fc470718 R |
1010 | |
1011 | /* Initialize uid_align. We scan instructions | |
1012 | from end to start, and keep in align_tab[n] the last seen insn | |
1013 | that does an alignment of at least n+1, i.e. the successor | |
1014 | in the alignment chain for an insn that does / has a known | |
1015 | alignment of n. */ | |
5ed6ace5 | 1016 | uid_align = XCNEWVEC (rtx, max_uid); |
fc470718 | 1017 | |
f5d927c0 | 1018 | for (i = MAX_CODE_ALIGN; --i >= 0;) |
fc470718 R |
1019 | align_tab[i] = NULL_RTX; |
1020 | seq = get_last_insn (); | |
33f7f353 | 1021 | for (; seq; seq = PREV_INSN (seq)) |
fc470718 R |
1022 | { |
1023 | int uid = INSN_UID (seq); | |
1024 | int log; | |
4b4bf941 | 1025 | log = (LABEL_P (seq) ? LABEL_TO_ALIGNMENT (seq) : 0); |
fc470718 | 1026 | uid_align[uid] = align_tab[0]; |
fc470718 R |
1027 | if (log) |
1028 | { | |
1029 | /* Found an alignment label. */ | |
1030 | uid_align[uid] = align_tab[log]; | |
1031 | for (i = log - 1; i >= 0; i--) | |
1032 | align_tab[i] = seq; | |
1033 | } | |
33f7f353 | 1034 | } |
f6df08e6 JR |
1035 | |
1036 | /* When optimizing, we start assuming minimum length, and keep increasing | |
1037 | lengths as we find the need for this, till nothing changes. | |
1038 | When not optimizing, we start assuming maximum lengths, and | |
1039 | do a single pass to update the lengths. */ | |
1040 | bool increasing = optimize != 0; | |
1041 | ||
33f7f353 JR |
1042 | #ifdef CASE_VECTOR_SHORTEN_MODE |
1043 | if (optimize) | |
1044 | { | |
1045 | /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum | |
1046 | label fields. */ | |
1047 | ||
1048 | int min_shuid = INSN_SHUID (get_insns ()) - 1; | |
1049 | int max_shuid = INSN_SHUID (get_last_insn ()) + 1; | |
1050 | int rel; | |
1051 | ||
1052 | for (insn = first; insn != 0; insn = NEXT_INSN (insn)) | |
fc470718 | 1053 | { |
33f7f353 JR |
1054 | rtx min_lab = NULL_RTX, max_lab = NULL_RTX, pat; |
1055 | int len, i, min, max, insn_shuid; | |
1056 | int min_align; | |
1057 | addr_diff_vec_flags flags; | |
1058 | ||
34f0d87a | 1059 | if (! JUMP_TABLE_DATA_P (insn) |
33f7f353 JR |
1060 | || GET_CODE (PATTERN (insn)) != ADDR_DIFF_VEC) |
1061 | continue; | |
1062 | pat = PATTERN (insn); | |
1063 | len = XVECLEN (pat, 1); | |
0bccc606 | 1064 | gcc_assert (len > 0); |
33f7f353 JR |
1065 | min_align = MAX_CODE_ALIGN; |
1066 | for (min = max_shuid, max = min_shuid, i = len - 1; i >= 0; i--) | |
1067 | { | |
1068 | rtx lab = XEXP (XVECEXP (pat, 1, i), 0); | |
1069 | int shuid = INSN_SHUID (lab); | |
1070 | if (shuid < min) | |
1071 | { | |
1072 | min = shuid; | |
1073 | min_lab = lab; | |
1074 | } | |
1075 | if (shuid > max) | |
1076 | { | |
1077 | max = shuid; | |
1078 | max_lab = lab; | |
1079 | } | |
1080 | if (min_align > LABEL_TO_ALIGNMENT (lab)) | |
1081 | min_align = LABEL_TO_ALIGNMENT (lab); | |
1082 | } | |
4c33cb26 R |
1083 | XEXP (pat, 2) = gen_rtx_LABEL_REF (Pmode, min_lab); |
1084 | XEXP (pat, 3) = gen_rtx_LABEL_REF (Pmode, max_lab); | |
33f7f353 JR |
1085 | insn_shuid = INSN_SHUID (insn); |
1086 | rel = INSN_SHUID (XEXP (XEXP (pat, 0), 0)); | |
5921f276 | 1087 | memset (&flags, 0, sizeof (flags)); |
33f7f353 JR |
1088 | flags.min_align = min_align; |
1089 | flags.base_after_vec = rel > insn_shuid; | |
1090 | flags.min_after_vec = min > insn_shuid; | |
1091 | flags.max_after_vec = max > insn_shuid; | |
1092 | flags.min_after_base = min > rel; | |
1093 | flags.max_after_base = max > rel; | |
1094 | ADDR_DIFF_VEC_FLAGS (pat) = flags; | |
f6df08e6 JR |
1095 | |
1096 | if (increasing) | |
1097 | PUT_MODE (pat, CASE_VECTOR_SHORTEN_MODE (0, 0, pat)); | |
fc470718 R |
1098 | } |
1099 | } | |
33f7f353 | 1100 | #endif /* CASE_VECTOR_SHORTEN_MODE */ |
3cf2715d | 1101 | |
3cf2715d | 1102 | /* Compute initial lengths, addresses, and varying flags for each insn. */ |
84034c69 | 1103 | int (*length_fun) (rtx_insn *) = increasing ? insn_min_length : insn_default_length; |
f6df08e6 | 1104 | |
b816f339 | 1105 | for (insn_current_address = 0, insn = first; |
3cf2715d DE |
1106 | insn != 0; |
1107 | insn_current_address += insn_lengths[uid], insn = NEXT_INSN (insn)) | |
1108 | { | |
1109 | uid = INSN_UID (insn); | |
fc470718 | 1110 | |
3cf2715d | 1111 | insn_lengths[uid] = 0; |
fc470718 | 1112 | |
4b4bf941 | 1113 | if (LABEL_P (insn)) |
fc470718 R |
1114 | { |
1115 | int log = LABEL_TO_ALIGNMENT (insn); | |
1116 | if (log) | |
1117 | { | |
1118 | int align = 1 << log; | |
ecb06768 | 1119 | int new_address = (insn_current_address + align - 1) & -align; |
fc470718 | 1120 | insn_lengths[uid] = new_address - insn_current_address; |
fc470718 R |
1121 | } |
1122 | } | |
1123 | ||
5a09edba | 1124 | INSN_ADDRESSES (uid) = insn_current_address + insn_lengths[uid]; |
f5d927c0 | 1125 | |
4b4bf941 | 1126 | if (NOTE_P (insn) || BARRIER_P (insn) |
c3284718 | 1127 | || LABEL_P (insn) || DEBUG_INSN_P (insn)) |
3cf2715d | 1128 | continue; |
4654c0cf | 1129 | if (insn->deleted ()) |
04da53bd | 1130 | continue; |
3cf2715d DE |
1131 | |
1132 | body = PATTERN (insn); | |
34f0d87a | 1133 | if (JUMP_TABLE_DATA_P (insn)) |
5a32a90c JR |
1134 | { |
1135 | /* This only takes room if read-only data goes into the text | |
1136 | section. */ | |
d6b5193b RS |
1137 | if (JUMP_TABLES_IN_TEXT_SECTION |
1138 | || readonly_data_section == text_section) | |
75197b37 BS |
1139 | insn_lengths[uid] = (XVECLEN (body, |
1140 | GET_CODE (body) == ADDR_DIFF_VEC) | |
1141 | * GET_MODE_SIZE (GET_MODE (body))); | |
5a32a90c | 1142 | /* Alignment is handled by ADDR_VEC_ALIGN. */ |
5a32a90c | 1143 | } |
a30caf5c | 1144 | else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0) |
3cf2715d | 1145 | insn_lengths[uid] = asm_insn_count (body) * insn_default_length (insn); |
e429a50b | 1146 | else if (rtx_sequence *body_seq = dyn_cast <rtx_sequence *> (body)) |
3cf2715d DE |
1147 | { |
1148 | int i; | |
1149 | int const_delay_slots; | |
e90bedf5 TS |
1150 | if (DELAY_SLOTS) |
1151 | const_delay_slots = const_num_delay_slots (body_seq->insn (0)); | |
1152 | else | |
1153 | const_delay_slots = 0; | |
1154 | ||
84034c69 | 1155 | int (*inner_length_fun) (rtx_insn *) |
f6df08e6 | 1156 | = const_delay_slots ? length_fun : insn_default_length; |
3cf2715d DE |
1157 | /* Inside a delay slot sequence, we do not do any branch shortening |
1158 | if the shortening could change the number of delay slots | |
0f41302f | 1159 | of the branch. */ |
e429a50b | 1160 | for (i = 0; i < body_seq->len (); i++) |
3cf2715d | 1161 | { |
e429a50b | 1162 | rtx_insn *inner_insn = body_seq->insn (i); |
3cf2715d DE |
1163 | int inner_uid = INSN_UID (inner_insn); |
1164 | int inner_length; | |
1165 | ||
5dd2902a | 1166 | if (GET_CODE (PATTERN (inner_insn)) == ASM_INPUT |
e429a50b | 1167 | || asm_noperands (PATTERN (inner_insn)) >= 0) |
3cf2715d DE |
1168 | inner_length = (asm_insn_count (PATTERN (inner_insn)) |
1169 | * insn_default_length (inner_insn)); | |
1170 | else | |
f6df08e6 | 1171 | inner_length = inner_length_fun (inner_insn); |
f5d927c0 | 1172 | |
3cf2715d DE |
1173 | insn_lengths[inner_uid] = inner_length; |
1174 | if (const_delay_slots) | |
1175 | { | |
1176 | if ((varying_length[inner_uid] | |
1177 | = insn_variable_length_p (inner_insn)) != 0) | |
1178 | varying_length[uid] = 1; | |
9d98a694 AO |
1179 | INSN_ADDRESSES (inner_uid) = (insn_current_address |
1180 | + insn_lengths[uid]); | |
3cf2715d DE |
1181 | } |
1182 | else | |
1183 | varying_length[inner_uid] = 0; | |
1184 | insn_lengths[uid] += inner_length; | |
1185 | } | |
1186 | } | |
1187 | else if (GET_CODE (body) != USE && GET_CODE (body) != CLOBBER) | |
1188 | { | |
f6df08e6 | 1189 | insn_lengths[uid] = length_fun (insn); |
3cf2715d DE |
1190 | varying_length[uid] = insn_variable_length_p (insn); |
1191 | } | |
1192 | ||
1193 | /* If needed, do any adjustment. */ | |
1194 | #ifdef ADJUST_INSN_LENGTH | |
1195 | ADJUST_INSN_LENGTH (insn, insn_lengths[uid]); | |
04b6000c | 1196 | if (insn_lengths[uid] < 0) |
c725bd79 | 1197 | fatal_insn ("negative insn length", insn); |
3cf2715d DE |
1198 | #endif |
1199 | } | |
1200 | ||
1201 | /* Now loop over all the insns finding varying length insns. For each, | |
1202 | get the current insn length. If it has changed, reflect the change. | |
1203 | When nothing changes for a full pass, we are done. */ | |
1204 | ||
1205 | while (something_changed) | |
1206 | { | |
1207 | something_changed = 0; | |
fc470718 | 1208 | insn_current_align = MAX_CODE_ALIGN - 1; |
b816f339 | 1209 | for (insn_current_address = 0, insn = first; |
3cf2715d DE |
1210 | insn != 0; |
1211 | insn = NEXT_INSN (insn)) | |
1212 | { | |
1213 | int new_length; | |
b729186a | 1214 | #ifdef ADJUST_INSN_LENGTH |
3cf2715d | 1215 | int tmp_length; |
b729186a | 1216 | #endif |
fc470718 | 1217 | int length_align; |
3cf2715d DE |
1218 | |
1219 | uid = INSN_UID (insn); | |
fc470718 | 1220 | |
4b4bf941 | 1221 | if (LABEL_P (insn)) |
fc470718 R |
1222 | { |
1223 | int log = LABEL_TO_ALIGNMENT (insn); | |
b0fe107e JM |
1224 | |
1225 | #ifdef CASE_VECTOR_SHORTEN_MODE | |
1226 | /* If the mode of a following jump table was changed, we | |
1227 | may need to update the alignment of this label. */ | |
fa7af581 | 1228 | rtx_insn *next; |
b0fe107e JM |
1229 | bool next_is_jumptable; |
1230 | ||
1231 | next = next_nonnote_insn (insn); | |
1232 | next_is_jumptable = next && JUMP_TABLE_DATA_P (next); | |
1233 | if ((JUMP_TABLES_IN_TEXT_SECTION | |
1234 | || readonly_data_section == text_section) | |
1235 | && next_is_jumptable) | |
1236 | { | |
1237 | int newlog = ADDR_VEC_ALIGN (next); | |
1238 | if (newlog != log) | |
1239 | { | |
1240 | log = newlog; | |
1241 | LABEL_TO_ALIGNMENT (insn) = log; | |
1242 | something_changed = 1; | |
1243 | } | |
1244 | } | |
1245 | #endif | |
1246 | ||
fc470718 R |
1247 | if (log > insn_current_align) |
1248 | { | |
1249 | int align = 1 << log; | |
ecb06768 | 1250 | int new_address= (insn_current_address + align - 1) & -align; |
fc470718 R |
1251 | insn_lengths[uid] = new_address - insn_current_address; |
1252 | insn_current_align = log; | |
1253 | insn_current_address = new_address; | |
1254 | } | |
1255 | else | |
1256 | insn_lengths[uid] = 0; | |
9d98a694 | 1257 | INSN_ADDRESSES (uid) = insn_current_address; |
fc470718 R |
1258 | continue; |
1259 | } | |
1260 | ||
1261 | length_align = INSN_LENGTH_ALIGNMENT (insn); | |
1262 | if (length_align < insn_current_align) | |
1263 | insn_current_align = length_align; | |
1264 | ||
9d98a694 AO |
1265 | insn_last_address = INSN_ADDRESSES (uid); |
1266 | INSN_ADDRESSES (uid) = insn_current_address; | |
fc470718 | 1267 | |
5e75ef4a | 1268 | #ifdef CASE_VECTOR_SHORTEN_MODE |
34f0d87a SB |
1269 | if (optimize |
1270 | && JUMP_TABLE_DATA_P (insn) | |
33f7f353 JR |
1271 | && GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC) |
1272 | { | |
33f7f353 JR |
1273 | rtx body = PATTERN (insn); |
1274 | int old_length = insn_lengths[uid]; | |
b32d5189 DM |
1275 | rtx_insn *rel_lab = |
1276 | safe_as_a <rtx_insn *> (XEXP (XEXP (body, 0), 0)); | |
33f7f353 JR |
1277 | rtx min_lab = XEXP (XEXP (body, 2), 0); |
1278 | rtx max_lab = XEXP (XEXP (body, 3), 0); | |
9d98a694 AO |
1279 | int rel_addr = INSN_ADDRESSES (INSN_UID (rel_lab)); |
1280 | int min_addr = INSN_ADDRESSES (INSN_UID (min_lab)); | |
1281 | int max_addr = INSN_ADDRESSES (INSN_UID (max_lab)); | |
b32d5189 | 1282 | rtx_insn *prev; |
33f7f353 | 1283 | int rel_align = 0; |
950a3816 | 1284 | addr_diff_vec_flags flags; |
ef4bddc2 | 1285 | machine_mode vec_mode; |
950a3816 KG |
1286 | |
1287 | /* Avoid automatic aggregate initialization. */ | |
1288 | flags = ADDR_DIFF_VEC_FLAGS (body); | |
33f7f353 JR |
1289 | |
1290 | /* Try to find a known alignment for rel_lab. */ | |
1291 | for (prev = rel_lab; | |
1292 | prev | |
1293 | && ! insn_lengths[INSN_UID (prev)] | |
1294 | && ! (varying_length[INSN_UID (prev)] & 1); | |
1295 | prev = PREV_INSN (prev)) | |
1296 | if (varying_length[INSN_UID (prev)] & 2) | |
1297 | { | |
1298 | rel_align = LABEL_TO_ALIGNMENT (prev); | |
1299 | break; | |
1300 | } | |
1301 | ||
1302 | /* See the comment on addr_diff_vec_flags in rtl.h for the | |
1303 | meaning of the flags values. base: REL_LAB vec: INSN */ | |
1304 | /* Anything after INSN has still addresses from the last | |
1305 | pass; adjust these so that they reflect our current | |
1306 | estimate for this pass. */ | |
1307 | if (flags.base_after_vec) | |
1308 | rel_addr += insn_current_address - insn_last_address; | |
1309 | if (flags.min_after_vec) | |
1310 | min_addr += insn_current_address - insn_last_address; | |
1311 | if (flags.max_after_vec) | |
1312 | max_addr += insn_current_address - insn_last_address; | |
1313 | /* We want to know the worst case, i.e. lowest possible value | |
1314 | for the offset of MIN_LAB. If MIN_LAB is after REL_LAB, | |
1315 | its offset is positive, and we have to be wary of code shrink; | |
1316 | otherwise, it is negative, and we have to be vary of code | |
1317 | size increase. */ | |
1318 | if (flags.min_after_base) | |
1319 | { | |
1320 | /* If INSN is between REL_LAB and MIN_LAB, the size | |
1321 | changes we are about to make can change the alignment | |
1322 | within the observed offset, therefore we have to break | |
1323 | it up into two parts that are independent. */ | |
1324 | if (! flags.base_after_vec && flags.min_after_vec) | |
1325 | { | |
1326 | min_addr -= align_fuzz (rel_lab, insn, rel_align, 0); | |
1327 | min_addr -= align_fuzz (insn, min_lab, 0, 0); | |
1328 | } | |
1329 | else | |
1330 | min_addr -= align_fuzz (rel_lab, min_lab, rel_align, 0); | |
1331 | } | |
1332 | else | |
1333 | { | |
1334 | if (flags.base_after_vec && ! flags.min_after_vec) | |
1335 | { | |
1336 | min_addr -= align_fuzz (min_lab, insn, 0, ~0); | |
1337 | min_addr -= align_fuzz (insn, rel_lab, 0, ~0); | |
1338 | } | |
1339 | else | |
1340 | min_addr -= align_fuzz (min_lab, rel_lab, 0, ~0); | |
1341 | } | |
1342 | /* Likewise, determine the highest lowest possible value | |
1343 | for the offset of MAX_LAB. */ | |
1344 | if (flags.max_after_base) | |
1345 | { | |
1346 | if (! flags.base_after_vec && flags.max_after_vec) | |
1347 | { | |
1348 | max_addr += align_fuzz (rel_lab, insn, rel_align, ~0); | |
1349 | max_addr += align_fuzz (insn, max_lab, 0, ~0); | |
1350 | } | |
1351 | else | |
1352 | max_addr += align_fuzz (rel_lab, max_lab, rel_align, ~0); | |
1353 | } | |
1354 | else | |
1355 | { | |
1356 | if (flags.base_after_vec && ! flags.max_after_vec) | |
1357 | { | |
1358 | max_addr += align_fuzz (max_lab, insn, 0, 0); | |
1359 | max_addr += align_fuzz (insn, rel_lab, 0, 0); | |
1360 | } | |
1361 | else | |
1362 | max_addr += align_fuzz (max_lab, rel_lab, 0, 0); | |
1363 | } | |
f6df08e6 JR |
1364 | vec_mode = CASE_VECTOR_SHORTEN_MODE (min_addr - rel_addr, |
1365 | max_addr - rel_addr, body); | |
1366 | if (!increasing | |
1367 | || (GET_MODE_SIZE (vec_mode) | |
1368 | >= GET_MODE_SIZE (GET_MODE (body)))) | |
1369 | PUT_MODE (body, vec_mode); | |
d6b5193b RS |
1370 | if (JUMP_TABLES_IN_TEXT_SECTION |
1371 | || readonly_data_section == text_section) | |
75197b37 BS |
1372 | { |
1373 | insn_lengths[uid] | |
1374 | = (XVECLEN (body, 1) * GET_MODE_SIZE (GET_MODE (body))); | |
1375 | insn_current_address += insn_lengths[uid]; | |
1376 | if (insn_lengths[uid] != old_length) | |
1377 | something_changed = 1; | |
1378 | } | |
1379 | ||
33f7f353 | 1380 | continue; |
33f7f353 | 1381 | } |
5e75ef4a JL |
1382 | #endif /* CASE_VECTOR_SHORTEN_MODE */ |
1383 | ||
1384 | if (! (varying_length[uid])) | |
3cf2715d | 1385 | { |
4b4bf941 | 1386 | if (NONJUMP_INSN_P (insn) |
674fc07d GS |
1387 | && GET_CODE (PATTERN (insn)) == SEQUENCE) |
1388 | { | |
1389 | int i; | |
1390 | ||
1391 | body = PATTERN (insn); | |
1392 | for (i = 0; i < XVECLEN (body, 0); i++) | |
1393 | { | |
1394 | rtx inner_insn = XVECEXP (body, 0, i); | |
1395 | int inner_uid = INSN_UID (inner_insn); | |
1396 | ||
1397 | INSN_ADDRESSES (inner_uid) = insn_current_address; | |
1398 | ||
1399 | insn_current_address += insn_lengths[inner_uid]; | |
1400 | } | |
dd3f0101 | 1401 | } |
674fc07d GS |
1402 | else |
1403 | insn_current_address += insn_lengths[uid]; | |
1404 | ||
3cf2715d DE |
1405 | continue; |
1406 | } | |
674fc07d | 1407 | |
4b4bf941 | 1408 | if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE) |
3cf2715d | 1409 | { |
84034c69 | 1410 | rtx_sequence *seqn = as_a <rtx_sequence *> (PATTERN (insn)); |
3cf2715d | 1411 | int i; |
f5d927c0 | 1412 | |
3cf2715d DE |
1413 | body = PATTERN (insn); |
1414 | new_length = 0; | |
84034c69 | 1415 | for (i = 0; i < seqn->len (); i++) |
3cf2715d | 1416 | { |
84034c69 | 1417 | rtx_insn *inner_insn = seqn->insn (i); |
3cf2715d DE |
1418 | int inner_uid = INSN_UID (inner_insn); |
1419 | int inner_length; | |
1420 | ||
9d98a694 | 1421 | INSN_ADDRESSES (inner_uid) = insn_current_address; |
3cf2715d DE |
1422 | |
1423 | /* insn_current_length returns 0 for insns with a | |
1424 | non-varying length. */ | |
1425 | if (! varying_length[inner_uid]) | |
1426 | inner_length = insn_lengths[inner_uid]; | |
1427 | else | |
1428 | inner_length = insn_current_length (inner_insn); | |
1429 | ||
1430 | if (inner_length != insn_lengths[inner_uid]) | |
1431 | { | |
f6df08e6 JR |
1432 | if (!increasing || inner_length > insn_lengths[inner_uid]) |
1433 | { | |
1434 | insn_lengths[inner_uid] = inner_length; | |
1435 | something_changed = 1; | |
1436 | } | |
1437 | else | |
1438 | inner_length = insn_lengths[inner_uid]; | |
3cf2715d | 1439 | } |
f6df08e6 | 1440 | insn_current_address += inner_length; |
3cf2715d DE |
1441 | new_length += inner_length; |
1442 | } | |
1443 | } | |
1444 | else | |
1445 | { | |
1446 | new_length = insn_current_length (insn); | |
1447 | insn_current_address += new_length; | |
1448 | } | |
1449 | ||
3cf2715d DE |
1450 | #ifdef ADJUST_INSN_LENGTH |
1451 | /* If needed, do any adjustment. */ | |
1452 | tmp_length = new_length; | |
1453 | ADJUST_INSN_LENGTH (insn, new_length); | |
1454 | insn_current_address += (new_length - tmp_length); | |
3cf2715d DE |
1455 | #endif |
1456 | ||
f6df08e6 JR |
1457 | if (new_length != insn_lengths[uid] |
1458 | && (!increasing || new_length > insn_lengths[uid])) | |
3cf2715d DE |
1459 | { |
1460 | insn_lengths[uid] = new_length; | |
1461 | something_changed = 1; | |
1462 | } | |
f6df08e6 JR |
1463 | else |
1464 | insn_current_address += insn_lengths[uid] - new_length; | |
3cf2715d | 1465 | } |
bb4aaf18 | 1466 | /* For a non-optimizing compile, do only a single pass. */ |
f6df08e6 | 1467 | if (!increasing) |
bb4aaf18 | 1468 | break; |
3cf2715d | 1469 | } |
8cac4d85 | 1470 | crtl->max_insn_address = insn_current_address; |
fc470718 | 1471 | free (varying_length); |
3cf2715d DE |
1472 | } |
1473 | ||
3cf2715d DE |
1474 | /* Given the body of an INSN known to be generated by an ASM statement, return |
1475 | the number of machine instructions likely to be generated for this insn. | |
1476 | This is used to compute its length. */ | |
1477 | ||
1478 | static int | |
6cf9ac28 | 1479 | asm_insn_count (rtx body) |
3cf2715d | 1480 | { |
48c54229 | 1481 | const char *templ; |
3cf2715d | 1482 | |
5d0930ea | 1483 | if (GET_CODE (body) == ASM_INPUT) |
48c54229 | 1484 | templ = XSTR (body, 0); |
5d0930ea | 1485 | else |
48c54229 | 1486 | templ = decode_asm_operands (body, NULL, NULL, NULL, NULL, NULL); |
5d0930ea | 1487 | |
2bd1d2c8 AP |
1488 | return asm_str_count (templ); |
1489 | } | |
2bd1d2c8 AP |
1490 | |
1491 | /* Return the number of machine instructions likely to be generated for the | |
1492 | inline-asm template. */ | |
1493 | int | |
1494 | asm_str_count (const char *templ) | |
1495 | { | |
1496 | int count = 1; | |
b8698a0f | 1497 | |
48c54229 | 1498 | if (!*templ) |
5bc4fa7c MS |
1499 | return 0; |
1500 | ||
48c54229 KG |
1501 | for (; *templ; templ++) |
1502 | if (IS_ASM_LOGICAL_LINE_SEPARATOR (*templ, templ) | |
1503 | || *templ == '\n') | |
3cf2715d DE |
1504 | count++; |
1505 | ||
1506 | return count; | |
1507 | } | |
3cf2715d | 1508 | \f |
c8aea42c PB |
1509 | /* ??? This is probably the wrong place for these. */ |
1510 | /* Structure recording the mapping from source file and directory | |
1511 | names at compile time to those to be embedded in debug | |
1512 | information. */ | |
50686850 | 1513 | struct debug_prefix_map |
c8aea42c PB |
1514 | { |
1515 | const char *old_prefix; | |
1516 | const char *new_prefix; | |
1517 | size_t old_len; | |
1518 | size_t new_len; | |
1519 | struct debug_prefix_map *next; | |
50686850 | 1520 | }; |
c8aea42c PB |
1521 | |
1522 | /* Linked list of such structures. */ | |
ffa66012 | 1523 | static debug_prefix_map *debug_prefix_maps; |
c8aea42c PB |
1524 | |
1525 | ||
1526 | /* Record a debug file prefix mapping. ARG is the argument to | |
1527 | -fdebug-prefix-map and must be of the form OLD=NEW. */ | |
1528 | ||
1529 | void | |
1530 | add_debug_prefix_map (const char *arg) | |
1531 | { | |
1532 | debug_prefix_map *map; | |
1533 | const char *p; | |
1534 | ||
1535 | p = strchr (arg, '='); | |
1536 | if (!p) | |
1537 | { | |
1538 | error ("invalid argument %qs to -fdebug-prefix-map", arg); | |
1539 | return; | |
1540 | } | |
1541 | map = XNEW (debug_prefix_map); | |
fe83055d | 1542 | map->old_prefix = xstrndup (arg, p - arg); |
c8aea42c PB |
1543 | map->old_len = p - arg; |
1544 | p++; | |
fe83055d | 1545 | map->new_prefix = xstrdup (p); |
c8aea42c PB |
1546 | map->new_len = strlen (p); |
1547 | map->next = debug_prefix_maps; | |
1548 | debug_prefix_maps = map; | |
1549 | } | |
1550 | ||
1551 | /* Perform user-specified mapping of debug filename prefixes. Return | |
1552 | the new name corresponding to FILENAME. */ | |
1553 | ||
1554 | const char * | |
1555 | remap_debug_filename (const char *filename) | |
1556 | { | |
1557 | debug_prefix_map *map; | |
1558 | char *s; | |
1559 | const char *name; | |
1560 | size_t name_len; | |
1561 | ||
1562 | for (map = debug_prefix_maps; map; map = map->next) | |
94369251 | 1563 | if (filename_ncmp (filename, map->old_prefix, map->old_len) == 0) |
c8aea42c PB |
1564 | break; |
1565 | if (!map) | |
1566 | return filename; | |
1567 | name = filename + map->old_len; | |
1568 | name_len = strlen (name) + 1; | |
1569 | s = (char *) alloca (name_len + map->new_len); | |
1570 | memcpy (s, map->new_prefix, map->new_len); | |
1571 | memcpy (s + map->new_len, name, name_len); | |
1572 | return ggc_strdup (s); | |
1573 | } | |
1574 | \f | |
725730f2 EB |
1575 | /* Return true if DWARF2 debug info can be emitted for DECL. */ |
1576 | ||
1577 | static bool | |
1578 | dwarf2_debug_info_emitted_p (tree decl) | |
1579 | { | |
1580 | if (write_symbols != DWARF2_DEBUG && write_symbols != VMS_AND_DWARF2_DEBUG) | |
1581 | return false; | |
1582 | ||
1583 | if (DECL_IGNORED_P (decl)) | |
1584 | return false; | |
1585 | ||
1586 | return true; | |
1587 | } | |
1588 | ||
78bde837 SB |
1589 | /* Return scope resulting from combination of S1 and S2. */ |
1590 | static tree | |
1591 | choose_inner_scope (tree s1, tree s2) | |
1592 | { | |
1593 | if (!s1) | |
1594 | return s2; | |
1595 | if (!s2) | |
1596 | return s1; | |
1597 | if (BLOCK_NUMBER (s1) > BLOCK_NUMBER (s2)) | |
1598 | return s1; | |
1599 | return s2; | |
1600 | } | |
1601 | ||
1602 | /* Emit lexical block notes needed to change scope from S1 to S2. */ | |
1603 | ||
1604 | static void | |
fa7af581 | 1605 | change_scope (rtx_insn *orig_insn, tree s1, tree s2) |
78bde837 | 1606 | { |
fa7af581 | 1607 | rtx_insn *insn = orig_insn; |
78bde837 SB |
1608 | tree com = NULL_TREE; |
1609 | tree ts1 = s1, ts2 = s2; | |
1610 | tree s; | |
1611 | ||
1612 | while (ts1 != ts2) | |
1613 | { | |
1614 | gcc_assert (ts1 && ts2); | |
1615 | if (BLOCK_NUMBER (ts1) > BLOCK_NUMBER (ts2)) | |
1616 | ts1 = BLOCK_SUPERCONTEXT (ts1); | |
1617 | else if (BLOCK_NUMBER (ts1) < BLOCK_NUMBER (ts2)) | |
1618 | ts2 = BLOCK_SUPERCONTEXT (ts2); | |
1619 | else | |
1620 | { | |
1621 | ts1 = BLOCK_SUPERCONTEXT (ts1); | |
1622 | ts2 = BLOCK_SUPERCONTEXT (ts2); | |
1623 | } | |
1624 | } | |
1625 | com = ts1; | |
1626 | ||
1627 | /* Close scopes. */ | |
1628 | s = s1; | |
1629 | while (s != com) | |
1630 | { | |
66e8df53 | 1631 | rtx_note *note = emit_note_before (NOTE_INSN_BLOCK_END, insn); |
78bde837 SB |
1632 | NOTE_BLOCK (note) = s; |
1633 | s = BLOCK_SUPERCONTEXT (s); | |
1634 | } | |
1635 | ||
1636 | /* Open scopes. */ | |
1637 | s = s2; | |
1638 | while (s != com) | |
1639 | { | |
1640 | insn = emit_note_before (NOTE_INSN_BLOCK_BEG, insn); | |
1641 | NOTE_BLOCK (insn) = s; | |
1642 | s = BLOCK_SUPERCONTEXT (s); | |
1643 | } | |
1644 | } | |
1645 | ||
1646 | /* Rebuild all the NOTE_INSN_BLOCK_BEG and NOTE_INSN_BLOCK_END notes based | |
1647 | on the scope tree and the newly reordered instructions. */ | |
1648 | ||
1649 | static void | |
1650 | reemit_insn_block_notes (void) | |
1651 | { | |
1652 | tree cur_block = DECL_INITIAL (cfun->decl); | |
66e8df53 DM |
1653 | rtx_insn *insn; |
1654 | rtx_note *note; | |
78bde837 SB |
1655 | |
1656 | insn = get_insns (); | |
97aba8e9 | 1657 | for (; insn; insn = NEXT_INSN (insn)) |
78bde837 SB |
1658 | { |
1659 | tree this_block; | |
1660 | ||
67598720 TJ |
1661 | /* Prevent lexical blocks from straddling section boundaries. */ |
1662 | if (NOTE_P (insn) && NOTE_KIND (insn) == NOTE_INSN_SWITCH_TEXT_SECTIONS) | |
1663 | { | |
1664 | for (tree s = cur_block; s != DECL_INITIAL (cfun->decl); | |
1665 | s = BLOCK_SUPERCONTEXT (s)) | |
1666 | { | |
66e8df53 | 1667 | rtx_note *note = emit_note_before (NOTE_INSN_BLOCK_END, insn); |
67598720 TJ |
1668 | NOTE_BLOCK (note) = s; |
1669 | note = emit_note_after (NOTE_INSN_BLOCK_BEG, insn); | |
1670 | NOTE_BLOCK (note) = s; | |
1671 | } | |
1672 | } | |
1673 | ||
1674 | if (!active_insn_p (insn)) | |
1675 | continue; | |
1676 | ||
78bde837 SB |
1677 | /* Avoid putting scope notes between jump table and its label. */ |
1678 | if (JUMP_TABLE_DATA_P (insn)) | |
1679 | continue; | |
1680 | ||
1681 | this_block = insn_scope (insn); | |
1682 | /* For sequences compute scope resulting from merging all scopes | |
1683 | of instructions nested inside. */ | |
e429a50b | 1684 | if (rtx_sequence *body = dyn_cast <rtx_sequence *> (PATTERN (insn))) |
78bde837 SB |
1685 | { |
1686 | int i; | |
78bde837 SB |
1687 | |
1688 | this_block = NULL; | |
e429a50b | 1689 | for (i = 0; i < body->len (); i++) |
78bde837 | 1690 | this_block = choose_inner_scope (this_block, |
e429a50b | 1691 | insn_scope (body->insn (i))); |
78bde837 SB |
1692 | } |
1693 | if (! this_block) | |
48866799 DC |
1694 | { |
1695 | if (INSN_LOCATION (insn) == UNKNOWN_LOCATION) | |
1696 | continue; | |
1697 | else | |
1698 | this_block = DECL_INITIAL (cfun->decl); | |
1699 | } | |
78bde837 SB |
1700 | |
1701 | if (this_block != cur_block) | |
1702 | { | |
1703 | change_scope (insn, cur_block, this_block); | |
1704 | cur_block = this_block; | |
1705 | } | |
1706 | } | |
1707 | ||
1708 | /* change_scope emits before the insn, not after. */ | |
1709 | note = emit_note (NOTE_INSN_DELETED); | |
1710 | change_scope (note, cur_block, DECL_INITIAL (cfun->decl)); | |
1711 | delete_insn (note); | |
1712 | ||
1713 | reorder_blocks (); | |
1714 | } | |
1715 | ||
4fbca4ba RS |
1716 | static const char *some_local_dynamic_name; |
1717 | ||
1718 | /* Locate some local-dynamic symbol still in use by this function | |
1719 | so that we can print its name in local-dynamic base patterns. | |
1720 | Return null if there are no local-dynamic references. */ | |
1721 | ||
1722 | const char * | |
1723 | get_some_local_dynamic_name () | |
1724 | { | |
1725 | subrtx_iterator::array_type array; | |
1726 | rtx_insn *insn; | |
1727 | ||
1728 | if (some_local_dynamic_name) | |
1729 | return some_local_dynamic_name; | |
1730 | ||
1731 | for (insn = get_insns (); insn ; insn = NEXT_INSN (insn)) | |
1732 | if (NONDEBUG_INSN_P (insn)) | |
1733 | FOR_EACH_SUBRTX (iter, array, PATTERN (insn), ALL) | |
1734 | { | |
1735 | const_rtx x = *iter; | |
1736 | if (GET_CODE (x) == SYMBOL_REF) | |
1737 | { | |
1738 | if (SYMBOL_REF_TLS_MODEL (x) == TLS_MODEL_LOCAL_DYNAMIC) | |
1739 | return some_local_dynamic_name = XSTR (x, 0); | |
1740 | if (CONSTANT_POOL_ADDRESS_P (x)) | |
1741 | iter.substitute (get_pool_constant (x)); | |
1742 | } | |
1743 | } | |
1744 | ||
1745 | return 0; | |
1746 | } | |
1747 | ||
3cf2715d DE |
1748 | /* Output assembler code for the start of a function, |
1749 | and initialize some of the variables in this file | |
1750 | for the new function. The label for the function and associated | |
1751 | assembler pseudo-ops have already been output in `assemble_start_function'. | |
1752 | ||
1753 | FIRST is the first insn of the rtl for the function being compiled. | |
1754 | FILE is the file to write assembler code to. | |
46625112 | 1755 | OPTIMIZE_P is nonzero if we should eliminate redundant |
3cf2715d DE |
1756 | test and compare insns. */ |
1757 | ||
1758 | void | |
f0cb8ae0 | 1759 | final_start_function (rtx_insn *first, FILE *file, |
46625112 | 1760 | int optimize_p ATTRIBUTE_UNUSED) |
3cf2715d DE |
1761 | { |
1762 | block_depth = 0; | |
1763 | ||
1764 | this_is_asm_operands = 0; | |
1765 | ||
ddd84654 JJ |
1766 | need_profile_function = false; |
1767 | ||
5368224f DC |
1768 | last_filename = LOCATION_FILE (prologue_location); |
1769 | last_linenum = LOCATION_LINE (prologue_location); | |
497b7c47 | 1770 | last_columnnum = LOCATION_COLUMN (prologue_location); |
6c52e687 | 1771 | last_discriminator = discriminator = 0; |
9ae130f8 | 1772 | |
653e276c | 1773 | high_block_linenum = high_function_linenum = last_linenum; |
eac40081 | 1774 | |
ef1b3fda KS |
1775 | if (flag_sanitize & SANITIZE_ADDRESS) |
1776 | asan_function_start (); | |
1777 | ||
725730f2 | 1778 | if (!DECL_IGNORED_P (current_function_decl)) |
497b7c47 | 1779 | debug_hooks->begin_prologue (last_linenum, last_columnnum, last_filename); |
d291dd49 | 1780 | |
725730f2 | 1781 | if (!dwarf2_debug_info_emitted_p (current_function_decl)) |
497b7c47 | 1782 | dwarf2out_begin_prologue (0, 0, NULL); |
3cf2715d DE |
1783 | |
1784 | #ifdef LEAF_REG_REMAP | |
416ff32e | 1785 | if (crtl->uses_only_leaf_regs) |
3cf2715d DE |
1786 | leaf_renumber_regs (first); |
1787 | #endif | |
1788 | ||
1789 | /* The Sun386i and perhaps other machines don't work right | |
1790 | if the profiling code comes after the prologue. */ | |
3c5273a9 | 1791 | if (targetm.profile_before_prologue () && crtl->profile) |
ddd84654 | 1792 | { |
e86a9946 RS |
1793 | if (targetm.asm_out.function_prologue == default_function_pro_epilogue |
1794 | && targetm.have_prologue ()) | |
ddd84654 | 1795 | { |
fa7af581 | 1796 | rtx_insn *insn; |
ddd84654 JJ |
1797 | for (insn = first; insn; insn = NEXT_INSN (insn)) |
1798 | if (!NOTE_P (insn)) | |
1799 | { | |
fa7af581 | 1800 | insn = NULL; |
ddd84654 JJ |
1801 | break; |
1802 | } | |
1803 | else if (NOTE_KIND (insn) == NOTE_INSN_BASIC_BLOCK | |
1804 | || NOTE_KIND (insn) == NOTE_INSN_FUNCTION_BEG) | |
1805 | break; | |
1806 | else if (NOTE_KIND (insn) == NOTE_INSN_DELETED | |
1807 | || NOTE_KIND (insn) == NOTE_INSN_VAR_LOCATION) | |
1808 | continue; | |
1809 | else | |
1810 | { | |
fa7af581 | 1811 | insn = NULL; |
ddd84654 JJ |
1812 | break; |
1813 | } | |
1814 | ||
1815 | if (insn) | |
1816 | need_profile_function = true; | |
1817 | else | |
1818 | profile_function (file); | |
1819 | } | |
1820 | else | |
1821 | profile_function (file); | |
1822 | } | |
3cf2715d | 1823 | |
18c038b9 MM |
1824 | /* If debugging, assign block numbers to all of the blocks in this |
1825 | function. */ | |
1826 | if (write_symbols) | |
1827 | { | |
0435312e | 1828 | reemit_insn_block_notes (); |
a20612aa | 1829 | number_blocks (current_function_decl); |
18c038b9 MM |
1830 | /* We never actually put out begin/end notes for the top-level |
1831 | block in the function. But, conceptually, that block is | |
1832 | always needed. */ | |
1833 | TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl)) = 1; | |
1834 | } | |
1835 | ||
a214518f SP |
1836 | if (warn_frame_larger_than |
1837 | && get_frame_size () > frame_larger_than_size) | |
1838 | { | |
1839 | /* Issue a warning */ | |
1840 | warning (OPT_Wframe_larger_than_, | |
1841 | "the frame size of %wd bytes is larger than %wd bytes", | |
1842 | get_frame_size (), frame_larger_than_size); | |
1843 | } | |
1844 | ||
3cf2715d | 1845 | /* First output the function prologue: code to set up the stack frame. */ |
5fd9b178 | 1846 | targetm.asm_out.function_prologue (file, get_frame_size ()); |
3cf2715d | 1847 | |
3cf2715d DE |
1848 | /* If the machine represents the prologue as RTL, the profiling code must |
1849 | be emitted when NOTE_INSN_PROLOGUE_END is scanned. */ | |
e86a9946 | 1850 | if (! targetm.have_prologue ()) |
3cf2715d | 1851 | profile_after_prologue (file); |
3cf2715d DE |
1852 | } |
1853 | ||
1854 | static void | |
6cf9ac28 | 1855 | profile_after_prologue (FILE *file ATTRIBUTE_UNUSED) |
3cf2715d | 1856 | { |
3c5273a9 | 1857 | if (!targetm.profile_before_prologue () && crtl->profile) |
3cf2715d | 1858 | profile_function (file); |
3cf2715d DE |
1859 | } |
1860 | ||
1861 | static void | |
6cf9ac28 | 1862 | profile_function (FILE *file ATTRIBUTE_UNUSED) |
3cf2715d | 1863 | { |
dcacfa04 | 1864 | #ifndef NO_PROFILE_COUNTERS |
9739c90c | 1865 | # define NO_PROFILE_COUNTERS 0 |
dcacfa04 | 1866 | #endif |
531ca746 RH |
1867 | #ifdef ASM_OUTPUT_REG_PUSH |
1868 | rtx sval = NULL, chain = NULL; | |
1869 | ||
1870 | if (cfun->returns_struct) | |
1871 | sval = targetm.calls.struct_value_rtx (TREE_TYPE (current_function_decl), | |
1872 | true); | |
1873 | if (cfun->static_chain_decl) | |
1874 | chain = targetm.calls.static_chain (current_function_decl, true); | |
b729186a | 1875 | #endif /* ASM_OUTPUT_REG_PUSH */ |
3cf2715d | 1876 | |
9739c90c JJ |
1877 | if (! NO_PROFILE_COUNTERS) |
1878 | { | |
1879 | int align = MIN (BIGGEST_ALIGNMENT, LONG_TYPE_SIZE); | |
d6b5193b | 1880 | switch_to_section (data_section); |
9739c90c | 1881 | ASM_OUTPUT_ALIGN (file, floor_log2 (align / BITS_PER_UNIT)); |
5fd9b178 | 1882 | targetm.asm_out.internal_label (file, "LP", current_function_funcdef_no); |
9739c90c JJ |
1883 | assemble_integer (const0_rtx, LONG_TYPE_SIZE / BITS_PER_UNIT, align, 1); |
1884 | } | |
3cf2715d | 1885 | |
d6b5193b | 1886 | switch_to_section (current_function_section ()); |
3cf2715d | 1887 | |
531ca746 RH |
1888 | #ifdef ASM_OUTPUT_REG_PUSH |
1889 | if (sval && REG_P (sval)) | |
1890 | ASM_OUTPUT_REG_PUSH (file, REGNO (sval)); | |
1891 | if (chain && REG_P (chain)) | |
1892 | ASM_OUTPUT_REG_PUSH (file, REGNO (chain)); | |
3cf2715d | 1893 | #endif |
3cf2715d | 1894 | |
df696a75 | 1895 | FUNCTION_PROFILER (file, current_function_funcdef_no); |
3cf2715d | 1896 | |
531ca746 RH |
1897 | #ifdef ASM_OUTPUT_REG_PUSH |
1898 | if (chain && REG_P (chain)) | |
1899 | ASM_OUTPUT_REG_POP (file, REGNO (chain)); | |
1900 | if (sval && REG_P (sval)) | |
1901 | ASM_OUTPUT_REG_POP (file, REGNO (sval)); | |
3cf2715d DE |
1902 | #endif |
1903 | } | |
1904 | ||
1905 | /* Output assembler code for the end of a function. | |
1906 | For clarity, args are same as those of `final_start_function' | |
1907 | even though not all of them are needed. */ | |
1908 | ||
1909 | void | |
6cf9ac28 | 1910 | final_end_function (void) |
3cf2715d | 1911 | { |
be1bb652 | 1912 | app_disable (); |
3cf2715d | 1913 | |
725730f2 EB |
1914 | if (!DECL_IGNORED_P (current_function_decl)) |
1915 | debug_hooks->end_function (high_function_linenum); | |
3cf2715d | 1916 | |
3cf2715d DE |
1917 | /* Finally, output the function epilogue: |
1918 | code to restore the stack frame and return to the caller. */ | |
5fd9b178 | 1919 | targetm.asm_out.function_epilogue (asm_out_file, get_frame_size ()); |
3cf2715d | 1920 | |
e2a12aca | 1921 | /* And debug output. */ |
725730f2 EB |
1922 | if (!DECL_IGNORED_P (current_function_decl)) |
1923 | debug_hooks->end_epilogue (last_linenum, last_filename); | |
3cf2715d | 1924 | |
725730f2 | 1925 | if (!dwarf2_debug_info_emitted_p (current_function_decl) |
7a0c8d71 | 1926 | && dwarf2out_do_frame ()) |
702ada3d | 1927 | dwarf2out_end_epilogue (last_linenum, last_filename); |
4fbca4ba RS |
1928 | |
1929 | some_local_dynamic_name = 0; | |
3cf2715d DE |
1930 | } |
1931 | \f | |
6a801cf2 XDL |
1932 | |
1933 | /* Dumper helper for basic block information. FILE is the assembly | |
1934 | output file, and INSN is the instruction being emitted. */ | |
1935 | ||
1936 | static void | |
fa7af581 | 1937 | dump_basic_block_info (FILE *file, rtx_insn *insn, basic_block *start_to_bb, |
6a801cf2 XDL |
1938 | basic_block *end_to_bb, int bb_map_size, int *bb_seqn) |
1939 | { | |
1940 | basic_block bb; | |
1941 | ||
1942 | if (!flag_debug_asm) | |
1943 | return; | |
1944 | ||
1945 | if (INSN_UID (insn) < bb_map_size | |
1946 | && (bb = start_to_bb[INSN_UID (insn)]) != NULL) | |
1947 | { | |
1948 | edge e; | |
1949 | edge_iterator ei; | |
1950 | ||
1c13f168 | 1951 | fprintf (file, "%s BLOCK %d", ASM_COMMENT_START, bb->index); |
6a801cf2 XDL |
1952 | if (bb->frequency) |
1953 | fprintf (file, " freq:%d", bb->frequency); | |
3995f3a2 JH |
1954 | if (bb->count.initialized_p ()) |
1955 | { | |
1956 | fprintf (file, ", count:"); | |
1957 | bb->count.dump (file); | |
1958 | } | |
6a801cf2 | 1959 | fprintf (file, " seq:%d", (*bb_seqn)++); |
1c13f168 | 1960 | fprintf (file, "\n%s PRED:", ASM_COMMENT_START); |
6a801cf2 XDL |
1961 | FOR_EACH_EDGE (e, ei, bb->preds) |
1962 | { | |
a315c44c | 1963 | dump_edge_info (file, e, TDF_DETAILS, 0); |
6a801cf2 XDL |
1964 | } |
1965 | fprintf (file, "\n"); | |
1966 | } | |
1967 | if (INSN_UID (insn) < bb_map_size | |
1968 | && (bb = end_to_bb[INSN_UID (insn)]) != NULL) | |
1969 | { | |
1970 | edge e; | |
1971 | edge_iterator ei; | |
1972 | ||
1c13f168 | 1973 | fprintf (asm_out_file, "%s SUCC:", ASM_COMMENT_START); |
6a801cf2 XDL |
1974 | FOR_EACH_EDGE (e, ei, bb->succs) |
1975 | { | |
a315c44c | 1976 | dump_edge_info (asm_out_file, e, TDF_DETAILS, 1); |
6a801cf2 XDL |
1977 | } |
1978 | fprintf (file, "\n"); | |
1979 | } | |
1980 | } | |
1981 | ||
3cf2715d | 1982 | /* Output assembler code for some insns: all or part of a function. |
c9d691e9 | 1983 | For description of args, see `final_start_function', above. */ |
3cf2715d DE |
1984 | |
1985 | void | |
a943bf7a | 1986 | final (rtx_insn *first, FILE *file, int optimize_p) |
3cf2715d | 1987 | { |
fa7af581 | 1988 | rtx_insn *insn, *next; |
589fe865 | 1989 | int seen = 0; |
3cf2715d | 1990 | |
6a801cf2 XDL |
1991 | /* Used for -dA dump. */ |
1992 | basic_block *start_to_bb = NULL; | |
1993 | basic_block *end_to_bb = NULL; | |
1994 | int bb_map_size = 0; | |
1995 | int bb_seqn = 0; | |
1996 | ||
3cf2715d | 1997 | last_ignored_compare = 0; |
3cf2715d | 1998 | |
618f4073 TS |
1999 | if (HAVE_cc0) |
2000 | for (insn = first; insn; insn = NEXT_INSN (insn)) | |
2001 | { | |
2002 | /* If CC tracking across branches is enabled, record the insn which | |
2003 | jumps to each branch only reached from one place. */ | |
2004 | if (optimize_p && JUMP_P (insn)) | |
2005 | { | |
2006 | rtx lab = JUMP_LABEL (insn); | |
2007 | if (lab && LABEL_P (lab) && LABEL_NUSES (lab) == 1) | |
2008 | { | |
2009 | LABEL_REFS (lab) = insn; | |
2010 | } | |
2011 | } | |
2012 | } | |
a8c3510c | 2013 | |
3cf2715d DE |
2014 | init_recog (); |
2015 | ||
2016 | CC_STATUS_INIT; | |
2017 | ||
6a801cf2 XDL |
2018 | if (flag_debug_asm) |
2019 | { | |
2020 | basic_block bb; | |
2021 | ||
2022 | bb_map_size = get_max_uid () + 1; | |
2023 | start_to_bb = XCNEWVEC (basic_block, bb_map_size); | |
2024 | end_to_bb = XCNEWVEC (basic_block, bb_map_size); | |
2025 | ||
292ffe86 CC |
2026 | /* There is no cfg for a thunk. */ |
2027 | if (!cfun->is_thunk) | |
4f42035e | 2028 | FOR_EACH_BB_REVERSE_FN (bb, cfun) |
292ffe86 CC |
2029 | { |
2030 | start_to_bb[INSN_UID (BB_HEAD (bb))] = bb; | |
2031 | end_to_bb[INSN_UID (BB_END (bb))] = bb; | |
2032 | } | |
6a801cf2 XDL |
2033 | } |
2034 | ||
3cf2715d | 2035 | /* Output the insns. */ |
9ff57809 | 2036 | for (insn = first; insn;) |
2f16edb1 | 2037 | { |
d327457f | 2038 | if (HAVE_ATTR_length) |
0ac76ad9 | 2039 | { |
d327457f JR |
2040 | if ((unsigned) INSN_UID (insn) >= INSN_ADDRESSES_SIZE ()) |
2041 | { | |
2042 | /* This can be triggered by bugs elsewhere in the compiler if | |
2043 | new insns are created after init_insn_lengths is called. */ | |
2044 | gcc_assert (NOTE_P (insn)); | |
2045 | insn_current_address = -1; | |
2046 | } | |
2047 | else | |
2048 | insn_current_address = INSN_ADDRESSES (INSN_UID (insn)); | |
0ac76ad9 | 2049 | } |
0ac76ad9 | 2050 | |
6a801cf2 XDL |
2051 | dump_basic_block_info (file, insn, start_to_bb, end_to_bb, |
2052 | bb_map_size, &bb_seqn); | |
46625112 | 2053 | insn = final_scan_insn (insn, file, optimize_p, 0, &seen); |
2f16edb1 | 2054 | } |
6a801cf2 XDL |
2055 | |
2056 | if (flag_debug_asm) | |
2057 | { | |
2058 | free (start_to_bb); | |
2059 | free (end_to_bb); | |
2060 | } | |
bc5612ed BS |
2061 | |
2062 | /* Remove CFI notes, to avoid compare-debug failures. */ | |
2063 | for (insn = first; insn; insn = next) | |
2064 | { | |
2065 | next = NEXT_INSN (insn); | |
2066 | if (NOTE_P (insn) | |
2067 | && (NOTE_KIND (insn) == NOTE_INSN_CFI | |
2068 | || NOTE_KIND (insn) == NOTE_INSN_CFI_LABEL)) | |
2069 | delete_insn (insn); | |
2070 | } | |
3cf2715d DE |
2071 | } |
2072 | \f | |
4bbf910e | 2073 | const char * |
6cf9ac28 | 2074 | get_insn_template (int code, rtx insn) |
4bbf910e | 2075 | { |
4bbf910e RH |
2076 | switch (insn_data[code].output_format) |
2077 | { | |
2078 | case INSN_OUTPUT_FORMAT_SINGLE: | |
3897f229 | 2079 | return insn_data[code].output.single; |
4bbf910e | 2080 | case INSN_OUTPUT_FORMAT_MULTI: |
3897f229 | 2081 | return insn_data[code].output.multi[which_alternative]; |
4bbf910e | 2082 | case INSN_OUTPUT_FORMAT_FUNCTION: |
0bccc606 | 2083 | gcc_assert (insn); |
95770ca3 DM |
2084 | return (*insn_data[code].output.function) (recog_data.operand, |
2085 | as_a <rtx_insn *> (insn)); | |
4bbf910e RH |
2086 | |
2087 | default: | |
0bccc606 | 2088 | gcc_unreachable (); |
4bbf910e RH |
2089 | } |
2090 | } | |
f5d927c0 | 2091 | |
0dc36574 ZW |
2092 | /* Emit the appropriate declaration for an alternate-entry-point |
2093 | symbol represented by INSN, to FILE. INSN is a CODE_LABEL with | |
2094 | LABEL_KIND != LABEL_NORMAL. | |
2095 | ||
2096 | The case fall-through in this function is intentional. */ | |
2097 | static void | |
fa7af581 | 2098 | output_alternate_entry_point (FILE *file, rtx_insn *insn) |
0dc36574 ZW |
2099 | { |
2100 | const char *name = LABEL_NAME (insn); | |
2101 | ||
2102 | switch (LABEL_KIND (insn)) | |
2103 | { | |
2104 | case LABEL_WEAK_ENTRY: | |
2105 | #ifdef ASM_WEAKEN_LABEL | |
2106 | ASM_WEAKEN_LABEL (file, name); | |
81fea426 | 2107 | gcc_fallthrough (); |
0dc36574 ZW |
2108 | #endif |
2109 | case LABEL_GLOBAL_ENTRY: | |
5fd9b178 | 2110 | targetm.asm_out.globalize_label (file, name); |
81fea426 | 2111 | gcc_fallthrough (); |
0dc36574 | 2112 | case LABEL_STATIC_ENTRY: |
905173eb ZW |
2113 | #ifdef ASM_OUTPUT_TYPE_DIRECTIVE |
2114 | ASM_OUTPUT_TYPE_DIRECTIVE (file, name, "function"); | |
2115 | #endif | |
0dc36574 ZW |
2116 | ASM_OUTPUT_LABEL (file, name); |
2117 | break; | |
2118 | ||
2119 | case LABEL_NORMAL: | |
2120 | default: | |
0bccc606 | 2121 | gcc_unreachable (); |
0dc36574 ZW |
2122 | } |
2123 | } | |
2124 | ||
f410e1b3 RAE |
2125 | /* Given a CALL_INSN, find and return the nested CALL. */ |
2126 | static rtx | |
fa7af581 | 2127 | call_from_call_insn (rtx_call_insn *insn) |
f410e1b3 RAE |
2128 | { |
2129 | rtx x; | |
2130 | gcc_assert (CALL_P (insn)); | |
2131 | x = PATTERN (insn); | |
2132 | ||
2133 | while (GET_CODE (x) != CALL) | |
2134 | { | |
2135 | switch (GET_CODE (x)) | |
2136 | { | |
2137 | default: | |
2138 | gcc_unreachable (); | |
b8c71e40 RAE |
2139 | case COND_EXEC: |
2140 | x = COND_EXEC_CODE (x); | |
2141 | break; | |
f410e1b3 RAE |
2142 | case PARALLEL: |
2143 | x = XVECEXP (x, 0, 0); | |
2144 | break; | |
2145 | case SET: | |
2146 | x = XEXP (x, 1); | |
2147 | break; | |
2148 | } | |
2149 | } | |
2150 | return x; | |
2151 | } | |
2152 | ||
82f72146 DM |
2153 | /* Print a comment into the asm showing FILENAME, LINENUM, and the |
2154 | corresponding source line, if available. */ | |
2155 | ||
2156 | static void | |
2157 | asm_show_source (const char *filename, int linenum) | |
2158 | { | |
2159 | if (!filename) | |
2160 | return; | |
2161 | ||
2162 | int line_size; | |
2163 | const char *line = location_get_source_line (filename, linenum, &line_size); | |
2164 | if (!line) | |
2165 | return; | |
2166 | ||
2167 | fprintf (asm_out_file, "%s %s:%i: ", ASM_COMMENT_START, filename, linenum); | |
2168 | /* "line" is not 0-terminated, so we must use line_size. */ | |
2169 | fwrite (line, 1, line_size, asm_out_file); | |
2170 | fputc ('\n', asm_out_file); | |
2171 | } | |
2172 | ||
3cf2715d DE |
2173 | /* The final scan for one insn, INSN. |
2174 | Args are same as in `final', except that INSN | |
2175 | is the insn being scanned. | |
2176 | Value returned is the next insn to be scanned. | |
2177 | ||
ff8cea7e EB |
2178 | NOPEEPHOLES is the flag to disallow peephole processing (currently |
2179 | used for within delayed branch sequence output). | |
3cf2715d | 2180 | |
589fe865 DJ |
2181 | SEEN is used to track the end of the prologue, for emitting |
2182 | debug information. We force the emission of a line note after | |
70aacc97 | 2183 | both NOTE_INSN_PROLOGUE_END and NOTE_INSN_FUNCTION_BEG. */ |
589fe865 | 2184 | |
fa7af581 | 2185 | rtx_insn * |
7fa55ff6 | 2186 | final_scan_insn (rtx_insn *insn, FILE *file, int optimize_p ATTRIBUTE_UNUSED, |
c9d691e9 | 2187 | int nopeepholes ATTRIBUTE_UNUSED, int *seen) |
3cf2715d | 2188 | { |
f1e52ed6 | 2189 | #if HAVE_cc0 |
90ca38bb MM |
2190 | rtx set; |
2191 | #endif | |
fa7af581 DM |
2192 | rtx_insn *next; |
2193 | ||
3cf2715d DE |
2194 | insn_counter++; |
2195 | ||
2196 | /* Ignore deleted insns. These can occur when we split insns (due to a | |
2197 | template of "#") while not optimizing. */ | |
4654c0cf | 2198 | if (insn->deleted ()) |
3cf2715d DE |
2199 | return NEXT_INSN (insn); |
2200 | ||
2201 | switch (GET_CODE (insn)) | |
2202 | { | |
2203 | case NOTE: | |
a38e7aa5 | 2204 | switch (NOTE_KIND (insn)) |
be1bb652 RH |
2205 | { |
2206 | case NOTE_INSN_DELETED: | |
d33606c3 | 2207 | case NOTE_INSN_UPDATE_SJLJ_CONTEXT: |
be1bb652 | 2208 | break; |
3cf2715d | 2209 | |
87c8b4be | 2210 | case NOTE_INSN_SWITCH_TEXT_SECTIONS: |
c543ca49 | 2211 | in_cold_section_p = !in_cold_section_p; |
f0a0390e | 2212 | |
a4b6974e UB |
2213 | if (dwarf2out_do_frame ()) |
2214 | dwarf2out_switch_text_section (); | |
f0a0390e | 2215 | else if (!DECL_IGNORED_P (current_function_decl)) |
725730f2 | 2216 | debug_hooks->switch_text_section (); |
a4b6974e | 2217 | |
c543ca49 | 2218 | switch_to_section (current_function_section ()); |
14d11d40 IS |
2219 | targetm.asm_out.function_switched_text_sections (asm_out_file, |
2220 | current_function_decl, | |
2221 | in_cold_section_p); | |
2ae367c1 ST |
2222 | /* Emit a label for the split cold section. Form label name by |
2223 | suffixing "cold" to the original function's name. */ | |
2224 | if (in_cold_section_p) | |
2225 | { | |
16d710b1 | 2226 | cold_function_name |
2ae367c1 | 2227 | = clone_function_name (current_function_decl, "cold"); |
11c3d071 CT |
2228 | #ifdef ASM_DECLARE_COLD_FUNCTION_NAME |
2229 | ASM_DECLARE_COLD_FUNCTION_NAME (asm_out_file, | |
2230 | IDENTIFIER_POINTER | |
2231 | (cold_function_name), | |
2232 | current_function_decl); | |
16d710b1 | 2233 | #else |
2ae367c1 ST |
2234 | ASM_OUTPUT_LABEL (asm_out_file, |
2235 | IDENTIFIER_POINTER (cold_function_name)); | |
16d710b1 | 2236 | #endif |
2ae367c1 | 2237 | } |
750054a2 | 2238 | break; |
b0efb46b | 2239 | |
be1bb652 | 2240 | case NOTE_INSN_BASIC_BLOCK: |
ddd84654 JJ |
2241 | if (need_profile_function) |
2242 | { | |
2243 | profile_function (asm_out_file); | |
2244 | need_profile_function = false; | |
2245 | } | |
2246 | ||
2784ed9c KT |
2247 | if (targetm.asm_out.unwind_emit) |
2248 | targetm.asm_out.unwind_emit (asm_out_file, insn); | |
951120ea | 2249 | |
6c52e687 CC |
2250 | discriminator = NOTE_BASIC_BLOCK (insn)->discriminator; |
2251 | ||
be1bb652 | 2252 | break; |
3cf2715d | 2253 | |
be1bb652 | 2254 | case NOTE_INSN_EH_REGION_BEG: |
52a11cbf RH |
2255 | ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHB", |
2256 | NOTE_EH_HANDLER (insn)); | |
3d195391 | 2257 | break; |
3d195391 | 2258 | |
be1bb652 | 2259 | case NOTE_INSN_EH_REGION_END: |
52a11cbf RH |
2260 | ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHE", |
2261 | NOTE_EH_HANDLER (insn)); | |
3d195391 | 2262 | break; |
3d195391 | 2263 | |
be1bb652 | 2264 | case NOTE_INSN_PROLOGUE_END: |
5fd9b178 | 2265 | targetm.asm_out.function_end_prologue (file); |
3cf2715d | 2266 | profile_after_prologue (file); |
589fe865 DJ |
2267 | |
2268 | if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE) | |
2269 | { | |
2270 | *seen |= SEEN_EMITTED; | |
b8176fe4 | 2271 | force_source_line = true; |
589fe865 DJ |
2272 | } |
2273 | else | |
2274 | *seen |= SEEN_NOTE; | |
2275 | ||
3cf2715d | 2276 | break; |
3cf2715d | 2277 | |
be1bb652 | 2278 | case NOTE_INSN_EPILOGUE_BEG: |
bc45e4ba TG |
2279 | if (!DECL_IGNORED_P (current_function_decl)) |
2280 | (*debug_hooks->begin_epilogue) (last_linenum, last_filename); | |
5fd9b178 | 2281 | targetm.asm_out.function_begin_epilogue (file); |
be1bb652 | 2282 | break; |
3cf2715d | 2283 | |
bc5612ed BS |
2284 | case NOTE_INSN_CFI: |
2285 | dwarf2out_emit_cfi (NOTE_CFI (insn)); | |
2286 | break; | |
2287 | ||
2288 | case NOTE_INSN_CFI_LABEL: | |
2289 | ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LCFI", | |
2290 | NOTE_LABEL_NUMBER (insn)); | |
cd9c1ca8 RH |
2291 | break; |
2292 | ||
be1bb652 | 2293 | case NOTE_INSN_FUNCTION_BEG: |
ddd84654 JJ |
2294 | if (need_profile_function) |
2295 | { | |
2296 | profile_function (asm_out_file); | |
2297 | need_profile_function = false; | |
2298 | } | |
2299 | ||
653e276c | 2300 | app_disable (); |
725730f2 EB |
2301 | if (!DECL_IGNORED_P (current_function_decl)) |
2302 | debug_hooks->end_prologue (last_linenum, last_filename); | |
589fe865 DJ |
2303 | |
2304 | if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE) | |
2305 | { | |
2306 | *seen |= SEEN_EMITTED; | |
b8176fe4 | 2307 | force_source_line = true; |
589fe865 DJ |
2308 | } |
2309 | else | |
2310 | *seen |= SEEN_NOTE; | |
2311 | ||
3cf2715d | 2312 | break; |
be1bb652 RH |
2313 | |
2314 | case NOTE_INSN_BLOCK_BEG: | |
2315 | if (debug_info_level == DINFO_LEVEL_NORMAL | |
3cf2715d | 2316 | || debug_info_level == DINFO_LEVEL_VERBOSE |
7a0c8d71 DR |
2317 | || write_symbols == DWARF2_DEBUG |
2318 | || write_symbols == VMS_AND_DWARF2_DEBUG | |
2319 | || write_symbols == VMS_DEBUG) | |
be1bb652 RH |
2320 | { |
2321 | int n = BLOCK_NUMBER (NOTE_BLOCK (insn)); | |
3cf2715d | 2322 | |
be1bb652 RH |
2323 | app_disable (); |
2324 | ++block_depth; | |
2325 | high_block_linenum = last_linenum; | |
eac40081 | 2326 | |
a5a42b92 | 2327 | /* Output debugging info about the symbol-block beginning. */ |
725730f2 EB |
2328 | if (!DECL_IGNORED_P (current_function_decl)) |
2329 | debug_hooks->begin_block (last_linenum, n); | |
3cf2715d | 2330 | |
be1bb652 RH |
2331 | /* Mark this block as output. */ |
2332 | TREE_ASM_WRITTEN (NOTE_BLOCK (insn)) = 1; | |
aaec3d85 | 2333 | BLOCK_IN_COLD_SECTION_P (NOTE_BLOCK (insn)) = in_cold_section_p; |
be1bb652 | 2334 | } |
d752cfdb JJ |
2335 | if (write_symbols == DBX_DEBUG |
2336 | || write_symbols == SDB_DEBUG) | |
2337 | { | |
2338 | location_t *locus_ptr | |
2339 | = block_nonartificial_location (NOTE_BLOCK (insn)); | |
2340 | ||
2341 | if (locus_ptr != NULL) | |
2342 | { | |
2343 | override_filename = LOCATION_FILE (*locus_ptr); | |
2344 | override_linenum = LOCATION_LINE (*locus_ptr); | |
497b7c47 | 2345 | override_columnnum = LOCATION_COLUMN (*locus_ptr); |
d752cfdb JJ |
2346 | } |
2347 | } | |
be1bb652 | 2348 | break; |
18c038b9 | 2349 | |
be1bb652 RH |
2350 | case NOTE_INSN_BLOCK_END: |
2351 | if (debug_info_level == DINFO_LEVEL_NORMAL | |
2352 | || debug_info_level == DINFO_LEVEL_VERBOSE | |
7a0c8d71 DR |
2353 | || write_symbols == DWARF2_DEBUG |
2354 | || write_symbols == VMS_AND_DWARF2_DEBUG | |
2355 | || write_symbols == VMS_DEBUG) | |
be1bb652 RH |
2356 | { |
2357 | int n = BLOCK_NUMBER (NOTE_BLOCK (insn)); | |
3cf2715d | 2358 | |
be1bb652 RH |
2359 | app_disable (); |
2360 | ||
2361 | /* End of a symbol-block. */ | |
2362 | --block_depth; | |
0bccc606 | 2363 | gcc_assert (block_depth >= 0); |
3cf2715d | 2364 | |
725730f2 EB |
2365 | if (!DECL_IGNORED_P (current_function_decl)) |
2366 | debug_hooks->end_block (high_block_linenum, n); | |
aaec3d85 JJ |
2367 | gcc_assert (BLOCK_IN_COLD_SECTION_P (NOTE_BLOCK (insn)) |
2368 | == in_cold_section_p); | |
be1bb652 | 2369 | } |
d752cfdb JJ |
2370 | if (write_symbols == DBX_DEBUG |
2371 | || write_symbols == SDB_DEBUG) | |
2372 | { | |
2373 | tree outer_block = BLOCK_SUPERCONTEXT (NOTE_BLOCK (insn)); | |
2374 | location_t *locus_ptr | |
2375 | = block_nonartificial_location (outer_block); | |
2376 | ||
2377 | if (locus_ptr != NULL) | |
2378 | { | |
2379 | override_filename = LOCATION_FILE (*locus_ptr); | |
2380 | override_linenum = LOCATION_LINE (*locus_ptr); | |
497b7c47 | 2381 | override_columnnum = LOCATION_COLUMN (*locus_ptr); |
d752cfdb JJ |
2382 | } |
2383 | else | |
2384 | { | |
2385 | override_filename = NULL; | |
2386 | override_linenum = 0; | |
497b7c47 | 2387 | override_columnnum = 0; |
d752cfdb JJ |
2388 | } |
2389 | } | |
be1bb652 RH |
2390 | break; |
2391 | ||
2392 | case NOTE_INSN_DELETED_LABEL: | |
2393 | /* Emit the label. We may have deleted the CODE_LABEL because | |
2394 | the label could be proved to be unreachable, though still | |
2395 | referenced (in the form of having its address taken. */ | |
8215347e | 2396 | ASM_OUTPUT_DEBUG_LABEL (file, "L", CODE_LABEL_NUMBER (insn)); |
be1bb652 | 2397 | break; |
3cf2715d | 2398 | |
5619e52c JJ |
2399 | case NOTE_INSN_DELETED_DEBUG_LABEL: |
2400 | /* Similarly, but need to use different namespace for it. */ | |
2401 | if (CODE_LABEL_NUMBER (insn) != -1) | |
2402 | ASM_OUTPUT_DEBUG_LABEL (file, "LDL", CODE_LABEL_NUMBER (insn)); | |
2403 | break; | |
2404 | ||
014a1138 | 2405 | case NOTE_INSN_VAR_LOCATION: |
2b1c5433 | 2406 | case NOTE_INSN_CALL_ARG_LOCATION: |
725730f2 | 2407 | if (!DECL_IGNORED_P (current_function_decl)) |
fa7af581 | 2408 | debug_hooks->var_location (insn); |
014a1138 JZ |
2409 | break; |
2410 | ||
be1bb652 | 2411 | default: |
a38e7aa5 | 2412 | gcc_unreachable (); |
f5d927c0 | 2413 | break; |
3cf2715d DE |
2414 | } |
2415 | break; | |
2416 | ||
2417 | case BARRIER: | |
3cf2715d DE |
2418 | break; |
2419 | ||
2420 | case CODE_LABEL: | |
1dd8faa8 R |
2421 | /* The target port might emit labels in the output function for |
2422 | some insn, e.g. sh.c output_branchy_insn. */ | |
de7987a6 R |
2423 | if (CODE_LABEL_NUMBER (insn) <= max_labelno) |
2424 | { | |
2425 | int align = LABEL_TO_ALIGNMENT (insn); | |
50b2596f | 2426 | #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN |
9e423e6d | 2427 | int max_skip = LABEL_TO_MAX_SKIP (insn); |
50b2596f | 2428 | #endif |
fc470718 | 2429 | |
1dd8faa8 | 2430 | if (align && NEXT_INSN (insn)) |
40cdfca6 | 2431 | { |
9e423e6d | 2432 | #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN |
40cdfca6 | 2433 | ASM_OUTPUT_MAX_SKIP_ALIGN (file, align, max_skip); |
8e16ab99 SF |
2434 | #else |
2435 | #ifdef ASM_OUTPUT_ALIGN_WITH_NOP | |
2436 | ASM_OUTPUT_ALIGN_WITH_NOP (file, align); | |
9e423e6d | 2437 | #else |
40cdfca6 | 2438 | ASM_OUTPUT_ALIGN (file, align); |
8e16ab99 | 2439 | #endif |
9e423e6d | 2440 | #endif |
40cdfca6 | 2441 | } |
de7987a6 | 2442 | } |
3cf2715d | 2443 | CC_STATUS_INIT; |
03ffa171 | 2444 | |
725730f2 | 2445 | if (!DECL_IGNORED_P (current_function_decl) && LABEL_NAME (insn)) |
f630fc6a | 2446 | debug_hooks->label (as_a <rtx_code_label *> (insn)); |
e1772ac0 | 2447 | |
bad4f40b | 2448 | app_disable (); |
b2a6a2fb JJ |
2449 | |
2450 | next = next_nonnote_insn (insn); | |
0676c393 MM |
2451 | /* If this label is followed by a jump-table, make sure we put |
2452 | the label in the read-only section. Also possibly write the | |
2453 | label and jump table together. */ | |
2454 | if (next != 0 && JUMP_TABLE_DATA_P (next)) | |
3cf2715d | 2455 | { |
e0d80184 | 2456 | #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC) |
0676c393 MM |
2457 | /* In this case, the case vector is being moved by the |
2458 | target, so don't output the label at all. Leave that | |
2459 | to the back end macros. */ | |
e0d80184 | 2460 | #else |
0676c393 MM |
2461 | if (! JUMP_TABLES_IN_TEXT_SECTION) |
2462 | { | |
2463 | int log_align; | |
340f7e7c | 2464 | |
0676c393 MM |
2465 | switch_to_section (targetm.asm_out.function_rodata_section |
2466 | (current_function_decl)); | |
340f7e7c RH |
2467 | |
2468 | #ifdef ADDR_VEC_ALIGN | |
0676c393 | 2469 | log_align = ADDR_VEC_ALIGN (next); |
340f7e7c | 2470 | #else |
0676c393 | 2471 | log_align = exact_log2 (BIGGEST_ALIGNMENT / BITS_PER_UNIT); |
340f7e7c | 2472 | #endif |
0676c393 MM |
2473 | ASM_OUTPUT_ALIGN (file, log_align); |
2474 | } | |
2475 | else | |
2476 | switch_to_section (current_function_section ()); | |
75197b37 | 2477 | |
3cf2715d | 2478 | #ifdef ASM_OUTPUT_CASE_LABEL |
0676c393 MM |
2479 | ASM_OUTPUT_CASE_LABEL (file, "L", CODE_LABEL_NUMBER (insn), |
2480 | next); | |
3cf2715d | 2481 | #else |
0676c393 | 2482 | targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn)); |
e0d80184 | 2483 | #endif |
3cf2715d | 2484 | #endif |
0676c393 | 2485 | break; |
3cf2715d | 2486 | } |
0dc36574 ZW |
2487 | if (LABEL_ALT_ENTRY_P (insn)) |
2488 | output_alternate_entry_point (file, insn); | |
8cd0faaf | 2489 | else |
5fd9b178 | 2490 | targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn)); |
3cf2715d DE |
2491 | break; |
2492 | ||
2493 | default: | |
2494 | { | |
b3694847 | 2495 | rtx body = PATTERN (insn); |
3cf2715d | 2496 | int insn_code_number; |
48c54229 | 2497 | const char *templ; |
ed5ef2e4 | 2498 | bool is_stmt; |
3cf2715d | 2499 | |
9a1a4737 PB |
2500 | /* Reset this early so it is correct for ASM statements. */ |
2501 | current_insn_predicate = NULL_RTX; | |
2929029c | 2502 | |
3cf2715d DE |
2503 | /* An INSN, JUMP_INSN or CALL_INSN. |
2504 | First check for special kinds that recog doesn't recognize. */ | |
2505 | ||
6614fd40 | 2506 | if (GET_CODE (body) == USE /* These are just declarations. */ |
3cf2715d DE |
2507 | || GET_CODE (body) == CLOBBER) |
2508 | break; | |
2509 | ||
f1e52ed6 | 2510 | #if HAVE_cc0 |
4928181c SB |
2511 | { |
2512 | /* If there is a REG_CC_SETTER note on this insn, it means that | |
2513 | the setting of the condition code was done in the delay slot | |
2514 | of the insn that branched here. So recover the cc status | |
2515 | from the insn that set it. */ | |
3cf2715d | 2516 | |
4928181c SB |
2517 | rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX); |
2518 | if (note) | |
2519 | { | |
647d790d DM |
2520 | rtx_insn *other = as_a <rtx_insn *> (XEXP (note, 0)); |
2521 | NOTICE_UPDATE_CC (PATTERN (other), other); | |
4928181c SB |
2522 | cc_prev_status = cc_status; |
2523 | } | |
2524 | } | |
3cf2715d DE |
2525 | #endif |
2526 | ||
2527 | /* Detect insns that are really jump-tables | |
2528 | and output them as such. */ | |
2529 | ||
34f0d87a | 2530 | if (JUMP_TABLE_DATA_P (insn)) |
3cf2715d | 2531 | { |
7f7f8214 | 2532 | #if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)) |
b3694847 | 2533 | int vlen, idx; |
7f7f8214 | 2534 | #endif |
3cf2715d | 2535 | |
b2a6a2fb | 2536 | if (! JUMP_TABLES_IN_TEXT_SECTION) |
d6b5193b RS |
2537 | switch_to_section (targetm.asm_out.function_rodata_section |
2538 | (current_function_decl)); | |
b2a6a2fb | 2539 | else |
d6b5193b | 2540 | switch_to_section (current_function_section ()); |
b2a6a2fb | 2541 | |
bad4f40b | 2542 | app_disable (); |
3cf2715d | 2543 | |
e0d80184 DM |
2544 | #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC) |
2545 | if (GET_CODE (body) == ADDR_VEC) | |
2546 | { | |
2547 | #ifdef ASM_OUTPUT_ADDR_VEC | |
2548 | ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn), body); | |
2549 | #else | |
0bccc606 | 2550 | gcc_unreachable (); |
e0d80184 DM |
2551 | #endif |
2552 | } | |
2553 | else | |
2554 | { | |
2555 | #ifdef ASM_OUTPUT_ADDR_DIFF_VEC | |
2556 | ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn), body); | |
2557 | #else | |
0bccc606 | 2558 | gcc_unreachable (); |
e0d80184 DM |
2559 | #endif |
2560 | } | |
2561 | #else | |
3cf2715d DE |
2562 | vlen = XVECLEN (body, GET_CODE (body) == ADDR_DIFF_VEC); |
2563 | for (idx = 0; idx < vlen; idx++) | |
2564 | { | |
2565 | if (GET_CODE (body) == ADDR_VEC) | |
2566 | { | |
2567 | #ifdef ASM_OUTPUT_ADDR_VEC_ELT | |
2568 | ASM_OUTPUT_ADDR_VEC_ELT | |
2569 | (file, CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 0, idx), 0))); | |
2570 | #else | |
0bccc606 | 2571 | gcc_unreachable (); |
3cf2715d DE |
2572 | #endif |
2573 | } | |
2574 | else | |
2575 | { | |
2576 | #ifdef ASM_OUTPUT_ADDR_DIFF_ELT | |
2577 | ASM_OUTPUT_ADDR_DIFF_ELT | |
2578 | (file, | |
33f7f353 | 2579 | body, |
3cf2715d DE |
2580 | CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 1, idx), 0)), |
2581 | CODE_LABEL_NUMBER (XEXP (XEXP (body, 0), 0))); | |
2582 | #else | |
0bccc606 | 2583 | gcc_unreachable (); |
3cf2715d DE |
2584 | #endif |
2585 | } | |
2586 | } | |
2587 | #ifdef ASM_OUTPUT_CASE_END | |
2588 | ASM_OUTPUT_CASE_END (file, | |
2589 | CODE_LABEL_NUMBER (PREV_INSN (insn)), | |
2590 | insn); | |
e0d80184 | 2591 | #endif |
3cf2715d DE |
2592 | #endif |
2593 | ||
d6b5193b | 2594 | switch_to_section (current_function_section ()); |
3cf2715d DE |
2595 | |
2596 | break; | |
2597 | } | |
0435312e JH |
2598 | /* Output this line note if it is the first or the last line |
2599 | note in a row. */ | |
725730f2 EB |
2600 | if (!DECL_IGNORED_P (current_function_decl) |
2601 | && notice_source_line (insn, &is_stmt)) | |
82f72146 DM |
2602 | { |
2603 | if (flag_verbose_asm) | |
2604 | asm_show_source (last_filename, last_linenum); | |
497b7c47 JJ |
2605 | (*debug_hooks->source_line) (last_linenum, last_columnnum, |
2606 | last_filename, last_discriminator, | |
2607 | is_stmt); | |
82f72146 | 2608 | } |
3cf2715d | 2609 | |
93671519 BE |
2610 | if (GET_CODE (body) == PARALLEL |
2611 | && GET_CODE (XVECEXP (body, 0, 0)) == ASM_INPUT) | |
2612 | body = XVECEXP (body, 0, 0); | |
2613 | ||
3cf2715d DE |
2614 | if (GET_CODE (body) == ASM_INPUT) |
2615 | { | |
36d7136e RH |
2616 | const char *string = XSTR (body, 0); |
2617 | ||
3cf2715d DE |
2618 | /* There's no telling what that did to the condition codes. */ |
2619 | CC_STATUS_INIT; | |
36d7136e RH |
2620 | |
2621 | if (string[0]) | |
3cf2715d | 2622 | { |
5ffeb913 | 2623 | expanded_location loc; |
bff4b63d | 2624 | |
3a694d86 | 2625 | app_enable (); |
5ffeb913 | 2626 | loc = expand_location (ASM_INPUT_SOURCE_LOCATION (body)); |
0de2ae02 | 2627 | if (*loc.file && loc.line) |
bff4b63d AO |
2628 | fprintf (asm_out_file, "%s %i \"%s\" 1\n", |
2629 | ASM_COMMENT_START, loc.line, loc.file); | |
36d7136e | 2630 | fprintf (asm_out_file, "\t%s\n", string); |
03943c05 AO |
2631 | #if HAVE_AS_LINE_ZERO |
2632 | if (*loc.file && loc.line) | |
bff4b63d | 2633 | fprintf (asm_out_file, "%s 0 \"\" 2\n", ASM_COMMENT_START); |
03943c05 | 2634 | #endif |
3cf2715d | 2635 | } |
3cf2715d DE |
2636 | break; |
2637 | } | |
2638 | ||
2639 | /* Detect `asm' construct with operands. */ | |
2640 | if (asm_noperands (body) >= 0) | |
2641 | { | |
22bf4422 | 2642 | unsigned int noperands = asm_noperands (body); |
1b4572a8 | 2643 | rtx *ops = XALLOCAVEC (rtx, noperands); |
3cce094d | 2644 | const char *string; |
bff4b63d | 2645 | location_t loc; |
5ffeb913 | 2646 | expanded_location expanded; |
3cf2715d DE |
2647 | |
2648 | /* There's no telling what that did to the condition codes. */ | |
2649 | CC_STATUS_INIT; | |
3cf2715d | 2650 | |
3cf2715d | 2651 | /* Get out the operand values. */ |
bff4b63d | 2652 | string = decode_asm_operands (body, ops, NULL, NULL, NULL, &loc); |
41129be2 | 2653 | /* Inhibit dying on what would otherwise be compiler bugs. */ |
3cf2715d DE |
2654 | insn_noperands = noperands; |
2655 | this_is_asm_operands = insn; | |
5ffeb913 | 2656 | expanded = expand_location (loc); |
3cf2715d | 2657 | |
ad7e39ca AO |
2658 | #ifdef FINAL_PRESCAN_INSN |
2659 | FINAL_PRESCAN_INSN (insn, ops, insn_noperands); | |
2660 | #endif | |
2661 | ||
3cf2715d | 2662 | /* Output the insn using them. */ |
36d7136e RH |
2663 | if (string[0]) |
2664 | { | |
3a694d86 | 2665 | app_enable (); |
5ffeb913 | 2666 | if (expanded.file && expanded.line) |
bff4b63d | 2667 | fprintf (asm_out_file, "%s %i \"%s\" 1\n", |
5ffeb913 | 2668 | ASM_COMMENT_START, expanded.line, expanded.file); |
36d7136e | 2669 | output_asm_insn (string, ops); |
03943c05 | 2670 | #if HAVE_AS_LINE_ZERO |
5ffeb913 | 2671 | if (expanded.file && expanded.line) |
bff4b63d | 2672 | fprintf (asm_out_file, "%s 0 \"\" 2\n", ASM_COMMENT_START); |
03943c05 | 2673 | #endif |
36d7136e RH |
2674 | } |
2675 | ||
1afc5373 CF |
2676 | if (targetm.asm_out.final_postscan_insn) |
2677 | targetm.asm_out.final_postscan_insn (file, insn, ops, | |
2678 | insn_noperands); | |
2679 | ||
3cf2715d DE |
2680 | this_is_asm_operands = 0; |
2681 | break; | |
2682 | } | |
2683 | ||
bad4f40b | 2684 | app_disable (); |
3cf2715d | 2685 | |
e429a50b | 2686 | if (rtx_sequence *seq = dyn_cast <rtx_sequence *> (body)) |
3cf2715d DE |
2687 | { |
2688 | /* A delayed-branch sequence */ | |
b3694847 | 2689 | int i; |
3cf2715d | 2690 | |
b32d5189 | 2691 | final_sequence = seq; |
3cf2715d DE |
2692 | |
2693 | /* The first insn in this SEQUENCE might be a JUMP_INSN that will | |
2694 | force the restoration of a comparison that was previously | |
2695 | thought unnecessary. If that happens, cancel this sequence | |
2696 | and cause that insn to be restored. */ | |
2697 | ||
e429a50b DM |
2698 | next = final_scan_insn (seq->insn (0), file, 0, 1, seen); |
2699 | if (next != seq->insn (1)) | |
3cf2715d DE |
2700 | { |
2701 | final_sequence = 0; | |
2702 | return next; | |
2703 | } | |
2704 | ||
e429a50b | 2705 | for (i = 1; i < seq->len (); i++) |
c7eee2df | 2706 | { |
e429a50b | 2707 | rtx_insn *insn = seq->insn (i); |
fa7af581 | 2708 | rtx_insn *next = NEXT_INSN (insn); |
c7eee2df RK |
2709 | /* We loop in case any instruction in a delay slot gets |
2710 | split. */ | |
2711 | do | |
c9d691e9 | 2712 | insn = final_scan_insn (insn, file, 0, 1, seen); |
c7eee2df RK |
2713 | while (insn != next); |
2714 | } | |
3cf2715d DE |
2715 | #ifdef DBR_OUTPUT_SEQEND |
2716 | DBR_OUTPUT_SEQEND (file); | |
2717 | #endif | |
2718 | final_sequence = 0; | |
2719 | ||
2720 | /* If the insn requiring the delay slot was a CALL_INSN, the | |
2721 | insns in the delay slot are actually executed before the | |
2722 | called function. Hence we don't preserve any CC-setting | |
2723 | actions in these insns and the CC must be marked as being | |
2724 | clobbered by the function. */ | |
e429a50b | 2725 | if (CALL_P (seq->insn (0))) |
b729186a JL |
2726 | { |
2727 | CC_STATUS_INIT; | |
2728 | } | |
3cf2715d DE |
2729 | break; |
2730 | } | |
2731 | ||
2732 | /* We have a real machine instruction as rtl. */ | |
2733 | ||
2734 | body = PATTERN (insn); | |
2735 | ||
f1e52ed6 | 2736 | #if HAVE_cc0 |
f5d927c0 | 2737 | set = single_set (insn); |
b88c92cc | 2738 | |
3cf2715d DE |
2739 | /* Check for redundant test and compare instructions |
2740 | (when the condition codes are already set up as desired). | |
2741 | This is done only when optimizing; if not optimizing, | |
2742 | it should be possible for the user to alter a variable | |
2743 | with the debugger in between statements | |
2744 | and the next statement should reexamine the variable | |
2745 | to compute the condition codes. */ | |
2746 | ||
46625112 | 2747 | if (optimize_p) |
3cf2715d | 2748 | { |
30f5e9f5 RK |
2749 | if (set |
2750 | && GET_CODE (SET_DEST (set)) == CC0 | |
2751 | && insn != last_ignored_compare) | |
3cf2715d | 2752 | { |
f90b7a5a | 2753 | rtx src1, src2; |
30f5e9f5 | 2754 | if (GET_CODE (SET_SRC (set)) == SUBREG) |
55a2c322 | 2755 | SET_SRC (set) = alter_subreg (&SET_SRC (set), true); |
f90b7a5a PB |
2756 | |
2757 | src1 = SET_SRC (set); | |
2758 | src2 = NULL_RTX; | |
2759 | if (GET_CODE (SET_SRC (set)) == COMPARE) | |
30f5e9f5 RK |
2760 | { |
2761 | if (GET_CODE (XEXP (SET_SRC (set), 0)) == SUBREG) | |
2762 | XEXP (SET_SRC (set), 0) | |
55a2c322 | 2763 | = alter_subreg (&XEXP (SET_SRC (set), 0), true); |
30f5e9f5 RK |
2764 | if (GET_CODE (XEXP (SET_SRC (set), 1)) == SUBREG) |
2765 | XEXP (SET_SRC (set), 1) | |
55a2c322 | 2766 | = alter_subreg (&XEXP (SET_SRC (set), 1), true); |
f90b7a5a PB |
2767 | if (XEXP (SET_SRC (set), 1) |
2768 | == CONST0_RTX (GET_MODE (XEXP (SET_SRC (set), 0)))) | |
2769 | src2 = XEXP (SET_SRC (set), 0); | |
30f5e9f5 RK |
2770 | } |
2771 | if ((cc_status.value1 != 0 | |
f90b7a5a | 2772 | && rtx_equal_p (src1, cc_status.value1)) |
30f5e9f5 | 2773 | || (cc_status.value2 != 0 |
f90b7a5a PB |
2774 | && rtx_equal_p (src1, cc_status.value2)) |
2775 | || (src2 != 0 && cc_status.value1 != 0 | |
2776 | && rtx_equal_p (src2, cc_status.value1)) | |
2777 | || (src2 != 0 && cc_status.value2 != 0 | |
2778 | && rtx_equal_p (src2, cc_status.value2))) | |
3cf2715d | 2779 | { |
30f5e9f5 | 2780 | /* Don't delete insn if it has an addressing side-effect. */ |
ff81832f | 2781 | if (! FIND_REG_INC_NOTE (insn, NULL_RTX) |
30f5e9f5 RK |
2782 | /* or if anything in it is volatile. */ |
2783 | && ! volatile_refs_p (PATTERN (insn))) | |
2784 | { | |
2785 | /* We don't really delete the insn; just ignore it. */ | |
2786 | last_ignored_compare = insn; | |
2787 | break; | |
2788 | } | |
3cf2715d DE |
2789 | } |
2790 | } | |
2791 | } | |
3cf2715d | 2792 | |
3cf2715d DE |
2793 | /* If this is a conditional branch, maybe modify it |
2794 | if the cc's are in a nonstandard state | |
2795 | so that it accomplishes the same thing that it would | |
2796 | do straightforwardly if the cc's were set up normally. */ | |
2797 | ||
2798 | if (cc_status.flags != 0 | |
4b4bf941 | 2799 | && JUMP_P (insn) |
3cf2715d DE |
2800 | && GET_CODE (body) == SET |
2801 | && SET_DEST (body) == pc_rtx | |
2802 | && GET_CODE (SET_SRC (body)) == IF_THEN_ELSE | |
ec8e098d | 2803 | && COMPARISON_P (XEXP (SET_SRC (body), 0)) |
c9d691e9 | 2804 | && XEXP (XEXP (SET_SRC (body), 0), 0) == cc0_rtx) |
3cf2715d DE |
2805 | { |
2806 | /* This function may alter the contents of its argument | |
2807 | and clear some of the cc_status.flags bits. | |
2808 | It may also return 1 meaning condition now always true | |
2809 | or -1 meaning condition now always false | |
2810 | or 2 meaning condition nontrivial but altered. */ | |
b3694847 | 2811 | int result = alter_cond (XEXP (SET_SRC (body), 0)); |
3cf2715d DE |
2812 | /* If condition now has fixed value, replace the IF_THEN_ELSE |
2813 | with its then-operand or its else-operand. */ | |
2814 | if (result == 1) | |
2815 | SET_SRC (body) = XEXP (SET_SRC (body), 1); | |
2816 | if (result == -1) | |
2817 | SET_SRC (body) = XEXP (SET_SRC (body), 2); | |
2818 | ||
2819 | /* The jump is now either unconditional or a no-op. | |
2820 | If it has become a no-op, don't try to output it. | |
2821 | (It would not be recognized.) */ | |
2822 | if (SET_SRC (body) == pc_rtx) | |
2823 | { | |
ca6c03ca | 2824 | delete_insn (insn); |
3cf2715d DE |
2825 | break; |
2826 | } | |
26898771 | 2827 | else if (ANY_RETURN_P (SET_SRC (body))) |
3cf2715d DE |
2828 | /* Replace (set (pc) (return)) with (return). */ |
2829 | PATTERN (insn) = body = SET_SRC (body); | |
2830 | ||
2831 | /* Rerecognize the instruction if it has changed. */ | |
2832 | if (result != 0) | |
2833 | INSN_CODE (insn) = -1; | |
2834 | } | |
2835 | ||
604e4ce3 | 2836 | /* If this is a conditional trap, maybe modify it if the cc's |
604e4ce3 KH |
2837 | are in a nonstandard state so that it accomplishes the same |
2838 | thing that it would do straightforwardly if the cc's were | |
2839 | set up normally. */ | |
2840 | if (cc_status.flags != 0 | |
2841 | && NONJUMP_INSN_P (insn) | |
2842 | && GET_CODE (body) == TRAP_IF | |
2843 | && COMPARISON_P (TRAP_CONDITION (body)) | |
2844 | && XEXP (TRAP_CONDITION (body), 0) == cc0_rtx) | |
2845 | { | |
2846 | /* This function may alter the contents of its argument | |
2847 | and clear some of the cc_status.flags bits. | |
2848 | It may also return 1 meaning condition now always true | |
2849 | or -1 meaning condition now always false | |
2850 | or 2 meaning condition nontrivial but altered. */ | |
2851 | int result = alter_cond (TRAP_CONDITION (body)); | |
2852 | ||
2853 | /* If TRAP_CONDITION has become always false, delete the | |
2854 | instruction. */ | |
2855 | if (result == -1) | |
2856 | { | |
2857 | delete_insn (insn); | |
2858 | break; | |
2859 | } | |
2860 | ||
2861 | /* If TRAP_CONDITION has become always true, replace | |
2862 | TRAP_CONDITION with const_true_rtx. */ | |
2863 | if (result == 1) | |
2864 | TRAP_CONDITION (body) = const_true_rtx; | |
2865 | ||
2866 | /* Rerecognize the instruction if it has changed. */ | |
2867 | if (result != 0) | |
2868 | INSN_CODE (insn) = -1; | |
2869 | } | |
2870 | ||
3cf2715d | 2871 | /* Make same adjustments to instructions that examine the |
462da2af SC |
2872 | condition codes without jumping and instructions that |
2873 | handle conditional moves (if this machine has either one). */ | |
3cf2715d DE |
2874 | |
2875 | if (cc_status.flags != 0 | |
b88c92cc | 2876 | && set != 0) |
3cf2715d | 2877 | { |
462da2af | 2878 | rtx cond_rtx, then_rtx, else_rtx; |
f5d927c0 | 2879 | |
4b4bf941 | 2880 | if (!JUMP_P (insn) |
b88c92cc | 2881 | && GET_CODE (SET_SRC (set)) == IF_THEN_ELSE) |
462da2af | 2882 | { |
b88c92cc RK |
2883 | cond_rtx = XEXP (SET_SRC (set), 0); |
2884 | then_rtx = XEXP (SET_SRC (set), 1); | |
2885 | else_rtx = XEXP (SET_SRC (set), 2); | |
462da2af SC |
2886 | } |
2887 | else | |
2888 | { | |
b88c92cc | 2889 | cond_rtx = SET_SRC (set); |
462da2af SC |
2890 | then_rtx = const_true_rtx; |
2891 | else_rtx = const0_rtx; | |
2892 | } | |
f5d927c0 | 2893 | |
511d31d8 AS |
2894 | if (COMPARISON_P (cond_rtx) |
2895 | && XEXP (cond_rtx, 0) == cc0_rtx) | |
3cf2715d | 2896 | { |
511d31d8 AS |
2897 | int result; |
2898 | result = alter_cond (cond_rtx); | |
2899 | if (result == 1) | |
2900 | validate_change (insn, &SET_SRC (set), then_rtx, 0); | |
2901 | else if (result == -1) | |
2902 | validate_change (insn, &SET_SRC (set), else_rtx, 0); | |
2903 | else if (result == 2) | |
2904 | INSN_CODE (insn) = -1; | |
2905 | if (SET_DEST (set) == SET_SRC (set)) | |
2906 | delete_insn (insn); | |
3cf2715d DE |
2907 | } |
2908 | } | |
462da2af | 2909 | |
3cf2715d DE |
2910 | #endif |
2911 | ||
2912 | /* Do machine-specific peephole optimizations if desired. */ | |
2913 | ||
d87834de | 2914 | if (HAVE_peephole && optimize_p && !flag_no_peephole && !nopeepholes) |
3cf2715d | 2915 | { |
fa7af581 | 2916 | rtx_insn *next = peephole (insn); |
3cf2715d DE |
2917 | /* When peepholing, if there were notes within the peephole, |
2918 | emit them before the peephole. */ | |
2919 | if (next != 0 && next != NEXT_INSN (insn)) | |
2920 | { | |
fa7af581 | 2921 | rtx_insn *note, *prev = PREV_INSN (insn); |
3cf2715d DE |
2922 | |
2923 | for (note = NEXT_INSN (insn); note != next; | |
2924 | note = NEXT_INSN (note)) | |
46625112 | 2925 | final_scan_insn (note, file, optimize_p, nopeepholes, seen); |
a2785739 ILT |
2926 | |
2927 | /* Put the notes in the proper position for a later | |
2928 | rescan. For example, the SH target can do this | |
2929 | when generating a far jump in a delayed branch | |
2930 | sequence. */ | |
2931 | note = NEXT_INSN (insn); | |
0f82e5c9 DM |
2932 | SET_PREV_INSN (note) = prev; |
2933 | SET_NEXT_INSN (prev) = note; | |
2934 | SET_NEXT_INSN (PREV_INSN (next)) = insn; | |
2935 | SET_PREV_INSN (insn) = PREV_INSN (next); | |
2936 | SET_NEXT_INSN (insn) = next; | |
2937 | SET_PREV_INSN (next) = insn; | |
3cf2715d DE |
2938 | } |
2939 | ||
2940 | /* PEEPHOLE might have changed this. */ | |
2941 | body = PATTERN (insn); | |
2942 | } | |
2943 | ||
2944 | /* Try to recognize the instruction. | |
2945 | If successful, verify that the operands satisfy the | |
2946 | constraints for the instruction. Crash if they don't, | |
2947 | since `reload' should have changed them so that they do. */ | |
2948 | ||
2949 | insn_code_number = recog_memoized (insn); | |
0304f787 | 2950 | cleanup_subreg_operands (insn); |
3cf2715d | 2951 | |
8c503f0d SB |
2952 | /* Dump the insn in the assembly for debugging (-dAP). |
2953 | If the final dump is requested as slim RTL, dump slim | |
2954 | RTL to the assembly file also. */ | |
dd3f0101 KH |
2955 | if (flag_dump_rtl_in_asm) |
2956 | { | |
2957 | print_rtx_head = ASM_COMMENT_START; | |
8c503f0d SB |
2958 | if (! (dump_flags & TDF_SLIM)) |
2959 | print_rtl_single (asm_out_file, insn); | |
2960 | else | |
2961 | dump_insn_slim (asm_out_file, insn); | |
dd3f0101 KH |
2962 | print_rtx_head = ""; |
2963 | } | |
b9f22704 | 2964 | |
daca1a96 | 2965 | if (! constrain_operands_cached (insn, 1)) |
3cf2715d | 2966 | fatal_insn_not_found (insn); |
3cf2715d DE |
2967 | |
2968 | /* Some target machines need to prescan each insn before | |
2969 | it is output. */ | |
2970 | ||
2971 | #ifdef FINAL_PRESCAN_INSN | |
1ccbefce | 2972 | FINAL_PRESCAN_INSN (insn, recog_data.operand, recog_data.n_operands); |
3cf2715d DE |
2973 | #endif |
2974 | ||
2929029c WG |
2975 | if (targetm.have_conditional_execution () |
2976 | && GET_CODE (PATTERN (insn)) == COND_EXEC) | |
afe48e06 | 2977 | current_insn_predicate = COND_EXEC_TEST (PATTERN (insn)); |
afe48e06 | 2978 | |
f1e52ed6 | 2979 | #if HAVE_cc0 |
3cf2715d DE |
2980 | cc_prev_status = cc_status; |
2981 | ||
2982 | /* Update `cc_status' for this instruction. | |
2983 | The instruction's output routine may change it further. | |
2984 | If the output routine for a jump insn needs to depend | |
2985 | on the cc status, it should look at cc_prev_status. */ | |
2986 | ||
2987 | NOTICE_UPDATE_CC (body, insn); | |
2988 | #endif | |
2989 | ||
b1a9f6a0 | 2990 | current_output_insn = debug_insn = insn; |
3cf2715d | 2991 | |
4bbf910e | 2992 | /* Find the proper template for this insn. */ |
48c54229 | 2993 | templ = get_insn_template (insn_code_number, insn); |
3cf2715d | 2994 | |
4bbf910e RH |
2995 | /* If the C code returns 0, it means that it is a jump insn |
2996 | which follows a deleted test insn, and that test insn | |
2997 | needs to be reinserted. */ | |
48c54229 | 2998 | if (templ == 0) |
3cf2715d | 2999 | { |
fa7af581 | 3000 | rtx_insn *prev; |
efd0378b | 3001 | |
0bccc606 | 3002 | gcc_assert (prev_nonnote_insn (insn) == last_ignored_compare); |
efd0378b HPN |
3003 | |
3004 | /* We have already processed the notes between the setter and | |
3005 | the user. Make sure we don't process them again, this is | |
3006 | particularly important if one of the notes is a block | |
3007 | scope note or an EH note. */ | |
3008 | for (prev = insn; | |
3009 | prev != last_ignored_compare; | |
3010 | prev = PREV_INSN (prev)) | |
3011 | { | |
4b4bf941 | 3012 | if (NOTE_P (prev)) |
ca6c03ca | 3013 | delete_insn (prev); /* Use delete_note. */ |
efd0378b HPN |
3014 | } |
3015 | ||
3016 | return prev; | |
3cf2715d DE |
3017 | } |
3018 | ||
3019 | /* If the template is the string "#", it means that this insn must | |
3020 | be split. */ | |
48c54229 | 3021 | if (templ[0] == '#' && templ[1] == '\0') |
3cf2715d | 3022 | { |
fa7af581 | 3023 | rtx_insn *new_rtx = try_split (body, insn, 0); |
3cf2715d DE |
3024 | |
3025 | /* If we didn't split the insn, go away. */ | |
48c54229 | 3026 | if (new_rtx == insn && PATTERN (new_rtx) == body) |
c725bd79 | 3027 | fatal_insn ("could not split insn", insn); |
f5d927c0 | 3028 | |
d327457f JR |
3029 | /* If we have a length attribute, this instruction should have |
3030 | been split in shorten_branches, to ensure that we would have | |
3031 | valid length info for the splitees. */ | |
3032 | gcc_assert (!HAVE_ATTR_length); | |
3d14e82f | 3033 | |
48c54229 | 3034 | return new_rtx; |
3cf2715d | 3035 | } |
f5d927c0 | 3036 | |
951120ea PB |
3037 | /* ??? This will put the directives in the wrong place if |
3038 | get_insn_template outputs assembly directly. However calling it | |
3039 | before get_insn_template breaks if the insns is split. */ | |
3bc6b3e6 RH |
3040 | if (targetm.asm_out.unwind_emit_before_insn |
3041 | && targetm.asm_out.unwind_emit) | |
2784ed9c | 3042 | targetm.asm_out.unwind_emit (asm_out_file, insn); |
3cf2715d | 3043 | |
f2834b5d PMR |
3044 | rtx_call_insn *call_insn = dyn_cast <rtx_call_insn *> (insn); |
3045 | if (call_insn != NULL) | |
f410e1b3 | 3046 | { |
fa7af581 | 3047 | rtx x = call_from_call_insn (call_insn); |
f410e1b3 RAE |
3048 | x = XEXP (x, 0); |
3049 | if (x && MEM_P (x) && GET_CODE (XEXP (x, 0)) == SYMBOL_REF) | |
3050 | { | |
3051 | tree t; | |
3052 | x = XEXP (x, 0); | |
3053 | t = SYMBOL_REF_DECL (x); | |
3054 | if (t) | |
3055 | assemble_external (t); | |
3056 | } | |
3057 | } | |
3058 | ||
951120ea | 3059 | /* Output assembler code from the template. */ |
48c54229 | 3060 | output_asm_insn (templ, recog_data.operand); |
3cf2715d | 3061 | |
1afc5373 CF |
3062 | /* Some target machines need to postscan each insn after |
3063 | it is output. */ | |
3064 | if (targetm.asm_out.final_postscan_insn) | |
3065 | targetm.asm_out.final_postscan_insn (file, insn, recog_data.operand, | |
3066 | recog_data.n_operands); | |
3067 | ||
3bc6b3e6 RH |
3068 | if (!targetm.asm_out.unwind_emit_before_insn |
3069 | && targetm.asm_out.unwind_emit) | |
3070 | targetm.asm_out.unwind_emit (asm_out_file, insn); | |
3071 | ||
f2834b5d PMR |
3072 | /* Let the debug info back-end know about this call. We do this only |
3073 | after the instruction has been emitted because labels that may be | |
3074 | created to reference the call instruction must appear after it. */ | |
3075 | if (call_insn != NULL && !DECL_IGNORED_P (current_function_decl)) | |
3076 | debug_hooks->var_location (insn); | |
3077 | ||
b1a9f6a0 | 3078 | current_output_insn = debug_insn = 0; |
3cf2715d DE |
3079 | } |
3080 | } | |
3081 | return NEXT_INSN (insn); | |
3082 | } | |
3083 | \f | |
ed5ef2e4 CC |
3084 | /* Return whether a source line note needs to be emitted before INSN. |
3085 | Sets IS_STMT to TRUE if the line should be marked as a possible | |
3086 | breakpoint location. */ | |
3cf2715d | 3087 | |
0435312e | 3088 | static bool |
fa7af581 | 3089 | notice_source_line (rtx_insn *insn, bool *is_stmt) |
3cf2715d | 3090 | { |
d752cfdb | 3091 | const char *filename; |
497b7c47 | 3092 | int linenum, columnnum; |
d752cfdb JJ |
3093 | |
3094 | if (override_filename) | |
3095 | { | |
3096 | filename = override_filename; | |
3097 | linenum = override_linenum; | |
497b7c47 | 3098 | columnnum = override_columnnum; |
d752cfdb | 3099 | } |
ffa4602f EB |
3100 | else if (INSN_HAS_LOCATION (insn)) |
3101 | { | |
3102 | expanded_location xloc = insn_location (insn); | |
3103 | filename = xloc.file; | |
3104 | linenum = xloc.line; | |
497b7c47 | 3105 | columnnum = xloc.column; |
ffa4602f | 3106 | } |
d752cfdb JJ |
3107 | else |
3108 | { | |
ffa4602f EB |
3109 | filename = NULL; |
3110 | linenum = 0; | |
497b7c47 | 3111 | columnnum = 0; |
d752cfdb | 3112 | } |
3cf2715d | 3113 | |
ed5ef2e4 CC |
3114 | if (filename == NULL) |
3115 | return false; | |
3116 | ||
3117 | if (force_source_line | |
3118 | || filename != last_filename | |
497b7c47 JJ |
3119 | || last_linenum != linenum |
3120 | || (debug_column_info && last_columnnum != columnnum)) | |
0435312e | 3121 | { |
b8176fe4 | 3122 | force_source_line = false; |
0435312e JH |
3123 | last_filename = filename; |
3124 | last_linenum = linenum; | |
497b7c47 | 3125 | last_columnnum = columnnum; |
6c52e687 | 3126 | last_discriminator = discriminator; |
ed5ef2e4 | 3127 | *is_stmt = true; |
0435312e JH |
3128 | high_block_linenum = MAX (last_linenum, high_block_linenum); |
3129 | high_function_linenum = MAX (last_linenum, high_function_linenum); | |
3130 | return true; | |
3131 | } | |
ed5ef2e4 CC |
3132 | |
3133 | if (SUPPORTS_DISCRIMINATOR && last_discriminator != discriminator) | |
3134 | { | |
3135 | /* If the discriminator changed, but the line number did not, | |
3136 | output the line table entry with is_stmt false so the | |
3137 | debugger does not treat this as a breakpoint location. */ | |
3138 | last_discriminator = discriminator; | |
3139 | *is_stmt = false; | |
3140 | return true; | |
3141 | } | |
3142 | ||
0435312e | 3143 | return false; |
3cf2715d DE |
3144 | } |
3145 | \f | |
0304f787 JL |
3146 | /* For each operand in INSN, simplify (subreg (reg)) so that it refers |
3147 | directly to the desired hard register. */ | |
f5d927c0 | 3148 | |
0304f787 | 3149 | void |
647d790d | 3150 | cleanup_subreg_operands (rtx_insn *insn) |
0304f787 | 3151 | { |
f62a15e3 | 3152 | int i; |
6fb5fa3c | 3153 | bool changed = false; |
6c698a6d | 3154 | extract_insn_cached (insn); |
1ccbefce | 3155 | for (i = 0; i < recog_data.n_operands; i++) |
0304f787 | 3156 | { |
2067c116 | 3157 | /* The following test cannot use recog_data.operand when testing |
9f4524f2 RE |
3158 | for a SUBREG: the underlying object might have been changed |
3159 | already if we are inside a match_operator expression that | |
3160 | matches the else clause. Instead we test the underlying | |
3161 | expression directly. */ | |
3162 | if (GET_CODE (*recog_data.operand_loc[i]) == SUBREG) | |
6fb5fa3c | 3163 | { |
55a2c322 | 3164 | recog_data.operand[i] = alter_subreg (recog_data.operand_loc[i], true); |
6fb5fa3c DB |
3165 | changed = true; |
3166 | } | |
1ccbefce | 3167 | else if (GET_CODE (recog_data.operand[i]) == PLUS |
04337620 | 3168 | || GET_CODE (recog_data.operand[i]) == MULT |
3c0cb5de | 3169 | || MEM_P (recog_data.operand[i])) |
6fb5fa3c | 3170 | recog_data.operand[i] = walk_alter_subreg (recog_data.operand_loc[i], &changed); |
0304f787 JL |
3171 | } |
3172 | ||
1ccbefce | 3173 | for (i = 0; i < recog_data.n_dups; i++) |
0304f787 | 3174 | { |
1ccbefce | 3175 | if (GET_CODE (*recog_data.dup_loc[i]) == SUBREG) |
6fb5fa3c | 3176 | { |
55a2c322 | 3177 | *recog_data.dup_loc[i] = alter_subreg (recog_data.dup_loc[i], true); |
6fb5fa3c DB |
3178 | changed = true; |
3179 | } | |
1ccbefce | 3180 | else if (GET_CODE (*recog_data.dup_loc[i]) == PLUS |
04337620 | 3181 | || GET_CODE (*recog_data.dup_loc[i]) == MULT |
3c0cb5de | 3182 | || MEM_P (*recog_data.dup_loc[i])) |
6fb5fa3c | 3183 | *recog_data.dup_loc[i] = walk_alter_subreg (recog_data.dup_loc[i], &changed); |
0304f787 | 3184 | } |
6fb5fa3c | 3185 | if (changed) |
647d790d | 3186 | df_insn_rescan (insn); |
0304f787 JL |
3187 | } |
3188 | ||
55a2c322 VM |
3189 | /* If X is a SUBREG, try to replace it with a REG or a MEM, based on |
3190 | the thing it is a subreg of. Do it anyway if FINAL_P. */ | |
3cf2715d DE |
3191 | |
3192 | rtx | |
55a2c322 | 3193 | alter_subreg (rtx *xp, bool final_p) |
3cf2715d | 3194 | { |
49d801d3 | 3195 | rtx x = *xp; |
b3694847 | 3196 | rtx y = SUBREG_REG (x); |
f5963e61 | 3197 | |
49d801d3 JH |
3198 | /* simplify_subreg does not remove subreg from volatile references. |
3199 | We are required to. */ | |
3c0cb5de | 3200 | if (MEM_P (y)) |
fd326ba8 UW |
3201 | { |
3202 | int offset = SUBREG_BYTE (x); | |
3203 | ||
3204 | /* For paradoxical subregs on big-endian machines, SUBREG_BYTE | |
3205 | contains 0 instead of the proper offset. See simplify_subreg. */ | |
3206 | if (offset == 0 | |
3207 | && GET_MODE_SIZE (GET_MODE (y)) < GET_MODE_SIZE (GET_MODE (x))) | |
3208 | { | |
3209 | int difference = GET_MODE_SIZE (GET_MODE (y)) | |
3210 | - GET_MODE_SIZE (GET_MODE (x)); | |
3211 | if (WORDS_BIG_ENDIAN) | |
3212 | offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD; | |
3213 | if (BYTES_BIG_ENDIAN) | |
3214 | offset += difference % UNITS_PER_WORD; | |
3215 | } | |
3216 | ||
55a2c322 VM |
3217 | if (final_p) |
3218 | *xp = adjust_address (y, GET_MODE (x), offset); | |
3219 | else | |
3220 | *xp = adjust_address_nv (y, GET_MODE (x), offset); | |
fd326ba8 | 3221 | } |
a50fa76a | 3222 | else if (REG_P (y) && HARD_REGISTER_P (y)) |
fea54805 | 3223 | { |
48c54229 | 3224 | rtx new_rtx = simplify_subreg (GET_MODE (x), y, GET_MODE (y), |
55a2c322 | 3225 | SUBREG_BYTE (x)); |
fea54805 | 3226 | |
48c54229 KG |
3227 | if (new_rtx != 0) |
3228 | *xp = new_rtx; | |
55a2c322 | 3229 | else if (final_p && REG_P (y)) |
fea54805 | 3230 | { |
0bccc606 | 3231 | /* Simplify_subreg can't handle some REG cases, but we have to. */ |
38ae7651 RS |
3232 | unsigned int regno; |
3233 | HOST_WIDE_INT offset; | |
3234 | ||
3235 | regno = subreg_regno (x); | |
3236 | if (subreg_lowpart_p (x)) | |
3237 | offset = byte_lowpart_offset (GET_MODE (x), GET_MODE (y)); | |
3238 | else | |
3239 | offset = SUBREG_BYTE (x); | |
3240 | *xp = gen_rtx_REG_offset (y, GET_MODE (x), regno, offset); | |
fea54805 | 3241 | } |
fea54805 RK |
3242 | } |
3243 | ||
49d801d3 | 3244 | return *xp; |
3cf2715d DE |
3245 | } |
3246 | ||
3247 | /* Do alter_subreg on all the SUBREGs contained in X. */ | |
3248 | ||
3249 | static rtx | |
6fb5fa3c | 3250 | walk_alter_subreg (rtx *xp, bool *changed) |
3cf2715d | 3251 | { |
49d801d3 | 3252 | rtx x = *xp; |
3cf2715d DE |
3253 | switch (GET_CODE (x)) |
3254 | { | |
3255 | case PLUS: | |
3256 | case MULT: | |
beed8fc0 | 3257 | case AND: |
6fb5fa3c DB |
3258 | XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0), changed); |
3259 | XEXP (x, 1) = walk_alter_subreg (&XEXP (x, 1), changed); | |
3cf2715d DE |
3260 | break; |
3261 | ||
3262 | case MEM: | |
beed8fc0 | 3263 | case ZERO_EXTEND: |
6fb5fa3c | 3264 | XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0), changed); |
3cf2715d DE |
3265 | break; |
3266 | ||
3267 | case SUBREG: | |
6fb5fa3c | 3268 | *changed = true; |
55a2c322 | 3269 | return alter_subreg (xp, true); |
f5d927c0 | 3270 | |
e9a25f70 JL |
3271 | default: |
3272 | break; | |
3cf2715d DE |
3273 | } |
3274 | ||
5bc72aeb | 3275 | return *xp; |
3cf2715d DE |
3276 | } |
3277 | \f | |
f1e52ed6 | 3278 | #if HAVE_cc0 |
3cf2715d DE |
3279 | |
3280 | /* Given BODY, the body of a jump instruction, alter the jump condition | |
3281 | as required by the bits that are set in cc_status.flags. | |
3282 | Not all of the bits there can be handled at this level in all cases. | |
3283 | ||
3284 | The value is normally 0. | |
3285 | 1 means that the condition has become always true. | |
3286 | -1 means that the condition has become always false. | |
3287 | 2 means that COND has been altered. */ | |
3288 | ||
3289 | static int | |
6cf9ac28 | 3290 | alter_cond (rtx cond) |
3cf2715d DE |
3291 | { |
3292 | int value = 0; | |
3293 | ||
3294 | if (cc_status.flags & CC_REVERSED) | |
3295 | { | |
3296 | value = 2; | |
3297 | PUT_CODE (cond, swap_condition (GET_CODE (cond))); | |
3298 | } | |
3299 | ||
3300 | if (cc_status.flags & CC_INVERTED) | |
3301 | { | |
3302 | value = 2; | |
3303 | PUT_CODE (cond, reverse_condition (GET_CODE (cond))); | |
3304 | } | |
3305 | ||
3306 | if (cc_status.flags & CC_NOT_POSITIVE) | |
3307 | switch (GET_CODE (cond)) | |
3308 | { | |
3309 | case LE: | |
3310 | case LEU: | |
3311 | case GEU: | |
3312 | /* Jump becomes unconditional. */ | |
3313 | return 1; | |
3314 | ||
3315 | case GT: | |
3316 | case GTU: | |
3317 | case LTU: | |
3318 | /* Jump becomes no-op. */ | |
3319 | return -1; | |
3320 | ||
3321 | case GE: | |
3322 | PUT_CODE (cond, EQ); | |
3323 | value = 2; | |
3324 | break; | |
3325 | ||
3326 | case LT: | |
3327 | PUT_CODE (cond, NE); | |
3328 | value = 2; | |
3329 | break; | |
f5d927c0 | 3330 | |
e9a25f70 JL |
3331 | default: |
3332 | break; | |
3cf2715d DE |
3333 | } |
3334 | ||
3335 | if (cc_status.flags & CC_NOT_NEGATIVE) | |
3336 | switch (GET_CODE (cond)) | |
3337 | { | |
3338 | case GE: | |
3339 | case GEU: | |
3340 | /* Jump becomes unconditional. */ | |
3341 | return 1; | |
3342 | ||
3343 | case LT: | |
3344 | case LTU: | |
3345 | /* Jump becomes no-op. */ | |
3346 | return -1; | |
3347 | ||
3348 | case LE: | |
3349 | case LEU: | |
3350 | PUT_CODE (cond, EQ); | |
3351 | value = 2; | |
3352 | break; | |
3353 | ||
3354 | case GT: | |
3355 | case GTU: | |
3356 | PUT_CODE (cond, NE); | |
3357 | value = 2; | |
3358 | break; | |
f5d927c0 | 3359 | |
e9a25f70 JL |
3360 | default: |
3361 | break; | |
3cf2715d DE |
3362 | } |
3363 | ||
3364 | if (cc_status.flags & CC_NO_OVERFLOW) | |
3365 | switch (GET_CODE (cond)) | |
3366 | { | |
3367 | case GEU: | |
3368 | /* Jump becomes unconditional. */ | |
3369 | return 1; | |
3370 | ||
3371 | case LEU: | |
3372 | PUT_CODE (cond, EQ); | |
3373 | value = 2; | |
3374 | break; | |
3375 | ||
3376 | case GTU: | |
3377 | PUT_CODE (cond, NE); | |
3378 | value = 2; | |
3379 | break; | |
3380 | ||
3381 | case LTU: | |
3382 | /* Jump becomes no-op. */ | |
3383 | return -1; | |
f5d927c0 | 3384 | |
e9a25f70 JL |
3385 | default: |
3386 | break; | |
3cf2715d DE |
3387 | } |
3388 | ||
3389 | if (cc_status.flags & (CC_Z_IN_NOT_N | CC_Z_IN_N)) | |
3390 | switch (GET_CODE (cond)) | |
3391 | { | |
e9a25f70 | 3392 | default: |
0bccc606 | 3393 | gcc_unreachable (); |
3cf2715d DE |
3394 | |
3395 | case NE: | |
3396 | PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? GE : LT); | |
3397 | value = 2; | |
3398 | break; | |
3399 | ||
3400 | case EQ: | |
3401 | PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? LT : GE); | |
3402 | value = 2; | |
3403 | break; | |
3404 | } | |
3405 | ||
3406 | if (cc_status.flags & CC_NOT_SIGNED) | |
3407 | /* The flags are valid if signed condition operators are converted | |
3408 | to unsigned. */ | |
3409 | switch (GET_CODE (cond)) | |
3410 | { | |
3411 | case LE: | |
3412 | PUT_CODE (cond, LEU); | |
3413 | value = 2; | |
3414 | break; | |
3415 | ||
3416 | case LT: | |
3417 | PUT_CODE (cond, LTU); | |
3418 | value = 2; | |
3419 | break; | |
3420 | ||
3421 | case GT: | |
3422 | PUT_CODE (cond, GTU); | |
3423 | value = 2; | |
3424 | break; | |
3425 | ||
3426 | case GE: | |
3427 | PUT_CODE (cond, GEU); | |
3428 | value = 2; | |
3429 | break; | |
e9a25f70 JL |
3430 | |
3431 | default: | |
3432 | break; | |
3cf2715d DE |
3433 | } |
3434 | ||
3435 | return value; | |
3436 | } | |
3437 | #endif | |
3438 | \f | |
3439 | /* Report inconsistency between the assembler template and the operands. | |
3440 | In an `asm', it's the user's fault; otherwise, the compiler's fault. */ | |
3441 | ||
3442 | void | |
4b794eaf | 3443 | output_operand_lossage (const char *cmsgid, ...) |
3cf2715d | 3444 | { |
a52453cc PT |
3445 | char *fmt_string; |
3446 | char *new_message; | |
fd478a0a | 3447 | const char *pfx_str; |
e34d07f2 | 3448 | va_list ap; |
6cf9ac28 | 3449 | |
4b794eaf | 3450 | va_start (ap, cmsgid); |
a52453cc | 3451 | |
9e637a26 | 3452 | pfx_str = this_is_asm_operands ? _("invalid 'asm': ") : "output_operand: "; |
582f770b UB |
3453 | fmt_string = xasprintf ("%s%s", pfx_str, _(cmsgid)); |
3454 | new_message = xvasprintf (fmt_string, ap); | |
dd3f0101 | 3455 | |
3cf2715d | 3456 | if (this_is_asm_operands) |
a52453cc | 3457 | error_for_asm (this_is_asm_operands, "%s", new_message); |
3cf2715d | 3458 | else |
a52453cc PT |
3459 | internal_error ("%s", new_message); |
3460 | ||
3461 | free (fmt_string); | |
3462 | free (new_message); | |
e34d07f2 | 3463 | va_end (ap); |
3cf2715d DE |
3464 | } |
3465 | \f | |
3466 | /* Output of assembler code from a template, and its subroutines. */ | |
3467 | ||
0d4903b8 RK |
3468 | /* Annotate the assembly with a comment describing the pattern and |
3469 | alternative used. */ | |
3470 | ||
3471 | static void | |
6cf9ac28 | 3472 | output_asm_name (void) |
0d4903b8 RK |
3473 | { |
3474 | if (debug_insn) | |
3475 | { | |
3476 | int num = INSN_CODE (debug_insn); | |
3477 | fprintf (asm_out_file, "\t%s %d\t%s", | |
3478 | ASM_COMMENT_START, INSN_UID (debug_insn), | |
3479 | insn_data[num].name); | |
3480 | if (insn_data[num].n_alternatives > 1) | |
3481 | fprintf (asm_out_file, "/%d", which_alternative + 1); | |
d327457f JR |
3482 | |
3483 | if (HAVE_ATTR_length) | |
3484 | fprintf (asm_out_file, "\t[length = %d]", | |
3485 | get_attr_length (debug_insn)); | |
3486 | ||
0d4903b8 RK |
3487 | /* Clear this so only the first assembler insn |
3488 | of any rtl insn will get the special comment for -dp. */ | |
3489 | debug_insn = 0; | |
3490 | } | |
3491 | } | |
3492 | ||
998d7deb RH |
3493 | /* If OP is a REG or MEM and we can find a MEM_EXPR corresponding to it |
3494 | or its address, return that expr . Set *PADDRESSP to 1 if the expr | |
c5adc06a RK |
3495 | corresponds to the address of the object and 0 if to the object. */ |
3496 | ||
3497 | static tree | |
6cf9ac28 | 3498 | get_mem_expr_from_op (rtx op, int *paddressp) |
c5adc06a | 3499 | { |
998d7deb | 3500 | tree expr; |
c5adc06a RK |
3501 | int inner_addressp; |
3502 | ||
3503 | *paddressp = 0; | |
3504 | ||
f8cfc6aa | 3505 | if (REG_P (op)) |
a560d4d4 | 3506 | return REG_EXPR (op); |
3c0cb5de | 3507 | else if (!MEM_P (op)) |
c5adc06a RK |
3508 | return 0; |
3509 | ||
998d7deb RH |
3510 | if (MEM_EXPR (op) != 0) |
3511 | return MEM_EXPR (op); | |
c5adc06a RK |
3512 | |
3513 | /* Otherwise we have an address, so indicate it and look at the address. */ | |
3514 | *paddressp = 1; | |
3515 | op = XEXP (op, 0); | |
3516 | ||
3517 | /* First check if we have a decl for the address, then look at the right side | |
3518 | if it is a PLUS. Otherwise, strip off arithmetic and keep looking. | |
3519 | But don't allow the address to itself be indirect. */ | |
998d7deb RH |
3520 | if ((expr = get_mem_expr_from_op (op, &inner_addressp)) && ! inner_addressp) |
3521 | return expr; | |
c5adc06a | 3522 | else if (GET_CODE (op) == PLUS |
998d7deb RH |
3523 | && (expr = get_mem_expr_from_op (XEXP (op, 1), &inner_addressp))) |
3524 | return expr; | |
c5adc06a | 3525 | |
481683e1 | 3526 | while (UNARY_P (op) |
ec8e098d | 3527 | || GET_RTX_CLASS (GET_CODE (op)) == RTX_BIN_ARITH) |
c5adc06a RK |
3528 | op = XEXP (op, 0); |
3529 | ||
998d7deb RH |
3530 | expr = get_mem_expr_from_op (op, &inner_addressp); |
3531 | return inner_addressp ? 0 : expr; | |
c5adc06a | 3532 | } |
ff81832f | 3533 | |
4f9b4029 RK |
3534 | /* Output operand names for assembler instructions. OPERANDS is the |
3535 | operand vector, OPORDER is the order to write the operands, and NOPS | |
3536 | is the number of operands to write. */ | |
3537 | ||
3538 | static void | |
6cf9ac28 | 3539 | output_asm_operand_names (rtx *operands, int *oporder, int nops) |
4f9b4029 RK |
3540 | { |
3541 | int wrote = 0; | |
3542 | int i; | |
3543 | ||
3544 | for (i = 0; i < nops; i++) | |
3545 | { | |
3546 | int addressp; | |
a560d4d4 JH |
3547 | rtx op = operands[oporder[i]]; |
3548 | tree expr = get_mem_expr_from_op (op, &addressp); | |
4f9b4029 | 3549 | |
a560d4d4 JH |
3550 | fprintf (asm_out_file, "%c%s", |
3551 | wrote ? ',' : '\t', wrote ? "" : ASM_COMMENT_START); | |
3552 | wrote = 1; | |
998d7deb | 3553 | if (expr) |
4f9b4029 | 3554 | { |
a560d4d4 | 3555 | fprintf (asm_out_file, "%s", |
998d7deb RH |
3556 | addressp ? "*" : ""); |
3557 | print_mem_expr (asm_out_file, expr); | |
4f9b4029 RK |
3558 | wrote = 1; |
3559 | } | |
a560d4d4 JH |
3560 | else if (REG_P (op) && ORIGINAL_REGNO (op) |
3561 | && ORIGINAL_REGNO (op) != REGNO (op)) | |
3562 | fprintf (asm_out_file, " tmp%i", ORIGINAL_REGNO (op)); | |
4f9b4029 RK |
3563 | } |
3564 | } | |
3565 | ||
d1658619 SP |
3566 | #ifdef ASSEMBLER_DIALECT |
3567 | /* Helper function to parse assembler dialects in the asm string. | |
3568 | This is called from output_asm_insn and asm_fprintf. */ | |
3569 | static const char * | |
3570 | do_assembler_dialects (const char *p, int *dialect) | |
3571 | { | |
3572 | char c = *(p - 1); | |
3573 | ||
3574 | switch (c) | |
3575 | { | |
3576 | case '{': | |
3577 | { | |
3578 | int i; | |
3579 | ||
3580 | if (*dialect) | |
3581 | output_operand_lossage ("nested assembly dialect alternatives"); | |
3582 | else | |
3583 | *dialect = 1; | |
3584 | ||
3585 | /* If we want the first dialect, do nothing. Otherwise, skip | |
3586 | DIALECT_NUMBER of strings ending with '|'. */ | |
3587 | for (i = 0; i < dialect_number; i++) | |
3588 | { | |
382522cb MK |
3589 | while (*p && *p != '}') |
3590 | { | |
3591 | if (*p == '|') | |
3592 | { | |
3593 | p++; | |
3594 | break; | |
3595 | } | |
3596 | ||
3597 | /* Skip over any character after a percent sign. */ | |
3598 | if (*p == '%') | |
3599 | p++; | |
3600 | if (*p) | |
3601 | p++; | |
3602 | } | |
3603 | ||
d1658619 SP |
3604 | if (*p == '}') |
3605 | break; | |
3606 | } | |
3607 | ||
3608 | if (*p == '\0') | |
3609 | output_operand_lossage ("unterminated assembly dialect alternative"); | |
3610 | } | |
3611 | break; | |
3612 | ||
3613 | case '|': | |
3614 | if (*dialect) | |
3615 | { | |
3616 | /* Skip to close brace. */ | |
3617 | do | |
3618 | { | |
3619 | if (*p == '\0') | |
3620 | { | |
3621 | output_operand_lossage ("unterminated assembly dialect alternative"); | |
3622 | break; | |
3623 | } | |
382522cb MK |
3624 | |
3625 | /* Skip over any character after a percent sign. */ | |
3626 | if (*p == '%' && p[1]) | |
3627 | { | |
3628 | p += 2; | |
3629 | continue; | |
3630 | } | |
3631 | ||
3632 | if (*p++ == '}') | |
3633 | break; | |
d1658619 | 3634 | } |
382522cb MK |
3635 | while (1); |
3636 | ||
d1658619 SP |
3637 | *dialect = 0; |
3638 | } | |
3639 | else | |
3640 | putc (c, asm_out_file); | |
3641 | break; | |
3642 | ||
3643 | case '}': | |
3644 | if (! *dialect) | |
3645 | putc (c, asm_out_file); | |
3646 | *dialect = 0; | |
3647 | break; | |
3648 | default: | |
3649 | gcc_unreachable (); | |
3650 | } | |
3651 | ||
3652 | return p; | |
3653 | } | |
3654 | #endif | |
3655 | ||
3cf2715d DE |
3656 | /* Output text from TEMPLATE to the assembler output file, |
3657 | obeying %-directions to substitute operands taken from | |
3658 | the vector OPERANDS. | |
3659 | ||
3660 | %N (for N a digit) means print operand N in usual manner. | |
3661 | %lN means require operand N to be a CODE_LABEL or LABEL_REF | |
3662 | and print the label name with no punctuation. | |
3663 | %cN means require operand N to be a constant | |
3664 | and print the constant expression with no punctuation. | |
3665 | %aN means expect operand N to be a memory address | |
3666 | (not a memory reference!) and print a reference | |
3667 | to that address. | |
3668 | %nN means expect operand N to be a constant | |
3669 | and print a constant expression for minus the value | |
3670 | of the operand, with no other punctuation. */ | |
3671 | ||
3672 | void | |
48c54229 | 3673 | output_asm_insn (const char *templ, rtx *operands) |
3cf2715d | 3674 | { |
b3694847 SS |
3675 | const char *p; |
3676 | int c; | |
8554d9a4 JJ |
3677 | #ifdef ASSEMBLER_DIALECT |
3678 | int dialect = 0; | |
3679 | #endif | |
0d4903b8 | 3680 | int oporder[MAX_RECOG_OPERANDS]; |
4f9b4029 | 3681 | char opoutput[MAX_RECOG_OPERANDS]; |
0d4903b8 | 3682 | int ops = 0; |
3cf2715d DE |
3683 | |
3684 | /* An insn may return a null string template | |
3685 | in a case where no assembler code is needed. */ | |
48c54229 | 3686 | if (*templ == 0) |
3cf2715d DE |
3687 | return; |
3688 | ||
4f9b4029 | 3689 | memset (opoutput, 0, sizeof opoutput); |
48c54229 | 3690 | p = templ; |
3cf2715d DE |
3691 | putc ('\t', asm_out_file); |
3692 | ||
3693 | #ifdef ASM_OUTPUT_OPCODE | |
3694 | ASM_OUTPUT_OPCODE (asm_out_file, p); | |
3695 | #endif | |
3696 | ||
b729186a | 3697 | while ((c = *p++)) |
3cf2715d DE |
3698 | switch (c) |
3699 | { | |
3cf2715d | 3700 | case '\n': |
4f9b4029 RK |
3701 | if (flag_verbose_asm) |
3702 | output_asm_operand_names (operands, oporder, ops); | |
0d4903b8 RK |
3703 | if (flag_print_asm_name) |
3704 | output_asm_name (); | |
3705 | ||
4f9b4029 RK |
3706 | ops = 0; |
3707 | memset (opoutput, 0, sizeof opoutput); | |
3708 | ||
3cf2715d | 3709 | putc (c, asm_out_file); |
cb649530 | 3710 | #ifdef ASM_OUTPUT_OPCODE |
3cf2715d DE |
3711 | while ((c = *p) == '\t') |
3712 | { | |
3713 | putc (c, asm_out_file); | |
3714 | p++; | |
3715 | } | |
3716 | ASM_OUTPUT_OPCODE (asm_out_file, p); | |
3cf2715d | 3717 | #endif |
cb649530 | 3718 | break; |
3cf2715d DE |
3719 | |
3720 | #ifdef ASSEMBLER_DIALECT | |
3721 | case '{': | |
3cf2715d | 3722 | case '}': |
d1658619 SP |
3723 | case '|': |
3724 | p = do_assembler_dialects (p, &dialect); | |
3cf2715d DE |
3725 | break; |
3726 | #endif | |
3727 | ||
3728 | case '%': | |
382522cb MK |
3729 | /* %% outputs a single %. %{, %} and %| print {, } and | respectively |
3730 | if ASSEMBLER_DIALECT defined and these characters have a special | |
3731 | meaning as dialect delimiters.*/ | |
3732 | if (*p == '%' | |
3733 | #ifdef ASSEMBLER_DIALECT | |
3734 | || *p == '{' || *p == '}' || *p == '|' | |
3735 | #endif | |
3736 | ) | |
3cf2715d | 3737 | { |
382522cb | 3738 | putc (*p, asm_out_file); |
3cf2715d | 3739 | p++; |
3cf2715d DE |
3740 | } |
3741 | /* %= outputs a number which is unique to each insn in the entire | |
3742 | compilation. This is useful for making local labels that are | |
3743 | referred to more than once in a given insn. */ | |
3744 | else if (*p == '=') | |
3745 | { | |
3746 | p++; | |
3747 | fprintf (asm_out_file, "%d", insn_counter); | |
3748 | } | |
3749 | /* % followed by a letter and some digits | |
3750 | outputs an operand in a special way depending on the letter. | |
3751 | Letters `acln' are implemented directly. | |
3752 | Other letters are passed to `output_operand' so that | |
6e2188e0 | 3753 | the TARGET_PRINT_OPERAND hook can define them. */ |
0df6c2c7 | 3754 | else if (ISALPHA (*p)) |
3cf2715d DE |
3755 | { |
3756 | int letter = *p++; | |
c383c15f GK |
3757 | unsigned long opnum; |
3758 | char *endptr; | |
b0efb46b | 3759 | |
c383c15f GK |
3760 | opnum = strtoul (p, &endptr, 10); |
3761 | ||
3762 | if (endptr == p) | |
3763 | output_operand_lossage ("operand number missing " | |
3764 | "after %%-letter"); | |
3765 | else if (this_is_asm_operands && opnum >= insn_noperands) | |
3cf2715d DE |
3766 | output_operand_lossage ("operand number out of range"); |
3767 | else if (letter == 'l') | |
c383c15f | 3768 | output_asm_label (operands[opnum]); |
3cf2715d | 3769 | else if (letter == 'a') |
cc8ca59e | 3770 | output_address (VOIDmode, operands[opnum]); |
3cf2715d DE |
3771 | else if (letter == 'c') |
3772 | { | |
c383c15f GK |
3773 | if (CONSTANT_ADDRESS_P (operands[opnum])) |
3774 | output_addr_const (asm_out_file, operands[opnum]); | |
3cf2715d | 3775 | else |
c383c15f | 3776 | output_operand (operands[opnum], 'c'); |
3cf2715d DE |
3777 | } |
3778 | else if (letter == 'n') | |
3779 | { | |
481683e1 | 3780 | if (CONST_INT_P (operands[opnum])) |
21e3a81b | 3781 | fprintf (asm_out_file, HOST_WIDE_INT_PRINT_DEC, |
c383c15f | 3782 | - INTVAL (operands[opnum])); |
3cf2715d DE |
3783 | else |
3784 | { | |
3785 | putc ('-', asm_out_file); | |
c383c15f | 3786 | output_addr_const (asm_out_file, operands[opnum]); |
3cf2715d DE |
3787 | } |
3788 | } | |
3789 | else | |
c383c15f | 3790 | output_operand (operands[opnum], letter); |
f5d927c0 | 3791 | |
c383c15f | 3792 | if (!opoutput[opnum]) |
dc9d0b14 | 3793 | oporder[ops++] = opnum; |
c383c15f | 3794 | opoutput[opnum] = 1; |
0d4903b8 | 3795 | |
c383c15f GK |
3796 | p = endptr; |
3797 | c = *p; | |
3cf2715d DE |
3798 | } |
3799 | /* % followed by a digit outputs an operand the default way. */ | |
0df6c2c7 | 3800 | else if (ISDIGIT (*p)) |
3cf2715d | 3801 | { |
c383c15f GK |
3802 | unsigned long opnum; |
3803 | char *endptr; | |
b0efb46b | 3804 | |
c383c15f GK |
3805 | opnum = strtoul (p, &endptr, 10); |
3806 | if (this_is_asm_operands && opnum >= insn_noperands) | |
3cf2715d DE |
3807 | output_operand_lossage ("operand number out of range"); |
3808 | else | |
c383c15f | 3809 | output_operand (operands[opnum], 0); |
0d4903b8 | 3810 | |
c383c15f | 3811 | if (!opoutput[opnum]) |
dc9d0b14 | 3812 | oporder[ops++] = opnum; |
c383c15f | 3813 | opoutput[opnum] = 1; |
4f9b4029 | 3814 | |
c383c15f GK |
3815 | p = endptr; |
3816 | c = *p; | |
3cf2715d DE |
3817 | } |
3818 | /* % followed by punctuation: output something for that | |
6e2188e0 NF |
3819 | punctuation character alone, with no operand. The |
3820 | TARGET_PRINT_OPERAND hook decides what is actually done. */ | |
3821 | else if (targetm.asm_out.print_operand_punct_valid_p ((unsigned char) *p)) | |
3cf2715d | 3822 | output_operand (NULL_RTX, *p++); |
3cf2715d DE |
3823 | else |
3824 | output_operand_lossage ("invalid %%-code"); | |
3825 | break; | |
3826 | ||
3827 | default: | |
3828 | putc (c, asm_out_file); | |
3829 | } | |
3830 | ||
0d4903b8 RK |
3831 | /* Write out the variable names for operands, if we know them. */ |
3832 | if (flag_verbose_asm) | |
4f9b4029 | 3833 | output_asm_operand_names (operands, oporder, ops); |
0d4903b8 RK |
3834 | if (flag_print_asm_name) |
3835 | output_asm_name (); | |
3cf2715d DE |
3836 | |
3837 | putc ('\n', asm_out_file); | |
3838 | } | |
3839 | \f | |
3840 | /* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */ | |
3841 | ||
3842 | void | |
6cf9ac28 | 3843 | output_asm_label (rtx x) |
3cf2715d DE |
3844 | { |
3845 | char buf[256]; | |
3846 | ||
3847 | if (GET_CODE (x) == LABEL_REF) | |
04a121a7 | 3848 | x = label_ref_label (x); |
4b4bf941 JQ |
3849 | if (LABEL_P (x) |
3850 | || (NOTE_P (x) | |
a38e7aa5 | 3851 | && NOTE_KIND (x) == NOTE_INSN_DELETED_LABEL)) |
3cf2715d DE |
3852 | ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x)); |
3853 | else | |
9e637a26 | 3854 | output_operand_lossage ("'%%l' operand isn't a label"); |
3cf2715d DE |
3855 | |
3856 | assemble_name (asm_out_file, buf); | |
3857 | } | |
3858 | ||
a7fe25b8 JJ |
3859 | /* Marks SYMBOL_REFs in x as referenced through use of assemble_external. */ |
3860 | ||
3861 | void | |
3862 | mark_symbol_refs_as_used (rtx x) | |
3863 | { | |
effb8a26 RS |
3864 | subrtx_iterator::array_type array; |
3865 | FOR_EACH_SUBRTX (iter, array, x, ALL) | |
3866 | { | |
3867 | const_rtx x = *iter; | |
3868 | if (GET_CODE (x) == SYMBOL_REF) | |
3869 | if (tree t = SYMBOL_REF_DECL (x)) | |
3870 | assemble_external (t); | |
3871 | } | |
a7fe25b8 JJ |
3872 | } |
3873 | ||
3cf2715d | 3874 | /* Print operand X using machine-dependent assembler syntax. |
3cf2715d DE |
3875 | CODE is a non-digit that preceded the operand-number in the % spec, |
3876 | such as 'z' if the spec was `%z3'. CODE is 0 if there was no char | |
3877 | between the % and the digits. | |
3878 | When CODE is a non-letter, X is 0. | |
3879 | ||
3880 | The meanings of the letters are machine-dependent and controlled | |
6e2188e0 | 3881 | by TARGET_PRINT_OPERAND. */ |
3cf2715d | 3882 | |
6b3c42ae | 3883 | void |
6cf9ac28 | 3884 | output_operand (rtx x, int code ATTRIBUTE_UNUSED) |
3cf2715d DE |
3885 | { |
3886 | if (x && GET_CODE (x) == SUBREG) | |
55a2c322 | 3887 | x = alter_subreg (&x, true); |
3cf2715d | 3888 | |
04c7ae48 | 3889 | /* X must not be a pseudo reg. */ |
a50fa76a BS |
3890 | if (!targetm.no_register_allocation) |
3891 | gcc_assert (!x || !REG_P (x) || REGNO (x) < FIRST_PSEUDO_REGISTER); | |
3cf2715d | 3892 | |
6e2188e0 | 3893 | targetm.asm_out.print_operand (asm_out_file, x, code); |
c70d0414 HPN |
3894 | |
3895 | if (x == NULL_RTX) | |
3896 | return; | |
3897 | ||
effb8a26 | 3898 | mark_symbol_refs_as_used (x); |
3cf2715d DE |
3899 | } |
3900 | ||
6e2188e0 NF |
3901 | /* Print a memory reference operand for address X using |
3902 | machine-dependent assembler syntax. */ | |
3cf2715d DE |
3903 | |
3904 | void | |
cc8ca59e | 3905 | output_address (machine_mode mode, rtx x) |
3cf2715d | 3906 | { |
6fb5fa3c DB |
3907 | bool changed = false; |
3908 | walk_alter_subreg (&x, &changed); | |
cc8ca59e | 3909 | targetm.asm_out.print_operand_address (asm_out_file, mode, x); |
3cf2715d DE |
3910 | } |
3911 | \f | |
3912 | /* Print an integer constant expression in assembler syntax. | |
3913 | Addition and subtraction are the only arithmetic | |
3914 | that may appear in these expressions. */ | |
3915 | ||
3916 | void | |
6cf9ac28 | 3917 | output_addr_const (FILE *file, rtx x) |
3cf2715d DE |
3918 | { |
3919 | char buf[256]; | |
3920 | ||
3921 | restart: | |
3922 | switch (GET_CODE (x)) | |
3923 | { | |
3924 | case PC: | |
eac50d7a | 3925 | putc ('.', file); |
3cf2715d DE |
3926 | break; |
3927 | ||
3928 | case SYMBOL_REF: | |
21dad7e6 | 3929 | if (SYMBOL_REF_DECL (x)) |
152464d2 | 3930 | assemble_external (SYMBOL_REF_DECL (x)); |
99c8c61c AO |
3931 | #ifdef ASM_OUTPUT_SYMBOL_REF |
3932 | ASM_OUTPUT_SYMBOL_REF (file, x); | |
3933 | #else | |
3cf2715d | 3934 | assemble_name (file, XSTR (x, 0)); |
99c8c61c | 3935 | #endif |
3cf2715d DE |
3936 | break; |
3937 | ||
3938 | case LABEL_REF: | |
04a121a7 | 3939 | x = label_ref_label (x); |
422be3c3 | 3940 | /* Fall through. */ |
3cf2715d DE |
3941 | case CODE_LABEL: |
3942 | ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x)); | |
2f0b7af6 GK |
3943 | #ifdef ASM_OUTPUT_LABEL_REF |
3944 | ASM_OUTPUT_LABEL_REF (file, buf); | |
3945 | #else | |
3cf2715d | 3946 | assemble_name (file, buf); |
2f0b7af6 | 3947 | #endif |
3cf2715d DE |
3948 | break; |
3949 | ||
3950 | case CONST_INT: | |
6725cc58 | 3951 | fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x)); |
3cf2715d DE |
3952 | break; |
3953 | ||
3954 | case CONST: | |
3955 | /* This used to output parentheses around the expression, | |
3956 | but that does not work on the 386 (either ATT or BSD assembler). */ | |
3957 | output_addr_const (file, XEXP (x, 0)); | |
3958 | break; | |
3959 | ||
807e902e KZ |
3960 | case CONST_WIDE_INT: |
3961 | /* We do not know the mode here so we have to use a round about | |
3962 | way to build a wide-int to get it printed properly. */ | |
3963 | { | |
3964 | wide_int w = wide_int::from_array (&CONST_WIDE_INT_ELT (x, 0), | |
3965 | CONST_WIDE_INT_NUNITS (x), | |
3966 | CONST_WIDE_INT_NUNITS (x) | |
3967 | * HOST_BITS_PER_WIDE_INT, | |
3968 | false); | |
3969 | print_decs (w, file); | |
3970 | } | |
3971 | break; | |
3972 | ||
3cf2715d | 3973 | case CONST_DOUBLE: |
807e902e | 3974 | if (CONST_DOUBLE_AS_INT_P (x)) |
3cf2715d DE |
3975 | { |
3976 | /* We can use %d if the number is one word and positive. */ | |
3977 | if (CONST_DOUBLE_HIGH (x)) | |
21e3a81b | 3978 | fprintf (file, HOST_WIDE_INT_PRINT_DOUBLE_HEX, |
3d57d7ce DK |
3979 | (unsigned HOST_WIDE_INT) CONST_DOUBLE_HIGH (x), |
3980 | (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (x)); | |
f5d927c0 | 3981 | else if (CONST_DOUBLE_LOW (x) < 0) |
3d57d7ce DK |
3982 | fprintf (file, HOST_WIDE_INT_PRINT_HEX, |
3983 | (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (x)); | |
3cf2715d | 3984 | else |
21e3a81b | 3985 | fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x)); |
3cf2715d DE |
3986 | } |
3987 | else | |
3988 | /* We can't handle floating point constants; | |
3989 | PRINT_OPERAND must handle them. */ | |
3990 | output_operand_lossage ("floating constant misused"); | |
3991 | break; | |
3992 | ||
14c931f1 | 3993 | case CONST_FIXED: |
848fac28 | 3994 | fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_FIXED_VALUE_LOW (x)); |
14c931f1 CF |
3995 | break; |
3996 | ||
3cf2715d DE |
3997 | case PLUS: |
3998 | /* Some assemblers need integer constants to appear last (eg masm). */ | |
481683e1 | 3999 | if (CONST_INT_P (XEXP (x, 0))) |
3cf2715d DE |
4000 | { |
4001 | output_addr_const (file, XEXP (x, 1)); | |
4002 | if (INTVAL (XEXP (x, 0)) >= 0) | |
4003 | fprintf (file, "+"); | |
4004 | output_addr_const (file, XEXP (x, 0)); | |
4005 | } | |
4006 | else | |
4007 | { | |
4008 | output_addr_const (file, XEXP (x, 0)); | |
481683e1 | 4009 | if (!CONST_INT_P (XEXP (x, 1)) |
08106825 | 4010 | || INTVAL (XEXP (x, 1)) >= 0) |
3cf2715d DE |
4011 | fprintf (file, "+"); |
4012 | output_addr_const (file, XEXP (x, 1)); | |
4013 | } | |
4014 | break; | |
4015 | ||
4016 | case MINUS: | |
4017 | /* Avoid outputting things like x-x or x+5-x, | |
4018 | since some assemblers can't handle that. */ | |
4019 | x = simplify_subtraction (x); | |
4020 | if (GET_CODE (x) != MINUS) | |
4021 | goto restart; | |
4022 | ||
4023 | output_addr_const (file, XEXP (x, 0)); | |
4024 | fprintf (file, "-"); | |
481683e1 | 4025 | if ((CONST_INT_P (XEXP (x, 1)) && INTVAL (XEXP (x, 1)) >= 0) |
301d03af RS |
4026 | || GET_CODE (XEXP (x, 1)) == PC |
4027 | || GET_CODE (XEXP (x, 1)) == SYMBOL_REF) | |
4028 | output_addr_const (file, XEXP (x, 1)); | |
4029 | else | |
3cf2715d | 4030 | { |
17b53c33 | 4031 | fputs (targetm.asm_out.open_paren, file); |
3cf2715d | 4032 | output_addr_const (file, XEXP (x, 1)); |
17b53c33 | 4033 | fputs (targetm.asm_out.close_paren, file); |
3cf2715d | 4034 | } |
3cf2715d DE |
4035 | break; |
4036 | ||
4037 | case ZERO_EXTEND: | |
4038 | case SIGN_EXTEND: | |
fdf473ae | 4039 | case SUBREG: |
c01e4479 | 4040 | case TRUNCATE: |
3cf2715d DE |
4041 | output_addr_const (file, XEXP (x, 0)); |
4042 | break; | |
4043 | ||
4044 | default: | |
6cbd8875 AS |
4045 | if (targetm.asm_out.output_addr_const_extra (file, x)) |
4046 | break; | |
422be3c3 | 4047 | |
3cf2715d DE |
4048 | output_operand_lossage ("invalid expression as operand"); |
4049 | } | |
4050 | } | |
4051 | \f | |
a803773f JM |
4052 | /* Output a quoted string. */ |
4053 | ||
4054 | void | |
4055 | output_quoted_string (FILE *asm_file, const char *string) | |
4056 | { | |
4057 | #ifdef OUTPUT_QUOTED_STRING | |
4058 | OUTPUT_QUOTED_STRING (asm_file, string); | |
4059 | #else | |
4060 | char c; | |
4061 | ||
4062 | putc ('\"', asm_file); | |
4063 | while ((c = *string++) != 0) | |
4064 | { | |
4065 | if (ISPRINT (c)) | |
4066 | { | |
4067 | if (c == '\"' || c == '\\') | |
4068 | putc ('\\', asm_file); | |
4069 | putc (c, asm_file); | |
4070 | } | |
4071 | else | |
4072 | fprintf (asm_file, "\\%03o", (unsigned char) c); | |
4073 | } | |
4074 | putc ('\"', asm_file); | |
4075 | #endif | |
4076 | } | |
4077 | \f | |
5e3929ed DA |
4078 | /* Write a HOST_WIDE_INT number in hex form 0x1234, fast. */ |
4079 | ||
4080 | void | |
4081 | fprint_whex (FILE *f, unsigned HOST_WIDE_INT value) | |
4082 | { | |
4083 | char buf[2 + CHAR_BIT * sizeof (value) / 4]; | |
4084 | if (value == 0) | |
4085 | putc ('0', f); | |
4086 | else | |
4087 | { | |
4088 | char *p = buf + sizeof (buf); | |
4089 | do | |
4090 | *--p = "0123456789abcdef"[value % 16]; | |
4091 | while ((value /= 16) != 0); | |
4092 | *--p = 'x'; | |
4093 | *--p = '0'; | |
4094 | fwrite (p, 1, buf + sizeof (buf) - p, f); | |
4095 | } | |
4096 | } | |
4097 | ||
4098 | /* Internal function that prints an unsigned long in decimal in reverse. | |
4099 | The output string IS NOT null-terminated. */ | |
4100 | ||
4101 | static int | |
4102 | sprint_ul_rev (char *s, unsigned long value) | |
4103 | { | |
4104 | int i = 0; | |
4105 | do | |
4106 | { | |
4107 | s[i] = "0123456789"[value % 10]; | |
4108 | value /= 10; | |
4109 | i++; | |
4110 | /* alternate version, without modulo */ | |
4111 | /* oldval = value; */ | |
4112 | /* value /= 10; */ | |
4113 | /* s[i] = "0123456789" [oldval - 10*value]; */ | |
4114 | /* i++ */ | |
4115 | } | |
4116 | while (value != 0); | |
4117 | return i; | |
4118 | } | |
4119 | ||
5e3929ed DA |
4120 | /* Write an unsigned long as decimal to a file, fast. */ |
4121 | ||
4122 | void | |
4123 | fprint_ul (FILE *f, unsigned long value) | |
4124 | { | |
4125 | /* python says: len(str(2**64)) == 20 */ | |
4126 | char s[20]; | |
4127 | int i; | |
4128 | ||
4129 | i = sprint_ul_rev (s, value); | |
4130 | ||
4131 | /* It's probably too small to bother with string reversal and fputs. */ | |
4132 | do | |
4133 | { | |
4134 | i--; | |
4135 | putc (s[i], f); | |
4136 | } | |
4137 | while (i != 0); | |
4138 | } | |
4139 | ||
4140 | /* Write an unsigned long as decimal to a string, fast. | |
4141 | s must be wide enough to not overflow, at least 21 chars. | |
4142 | Returns the length of the string (without terminating '\0'). */ | |
4143 | ||
4144 | int | |
4145 | sprint_ul (char *s, unsigned long value) | |
4146 | { | |
fab27f52 | 4147 | int len = sprint_ul_rev (s, value); |
5e3929ed DA |
4148 | s[len] = '\0'; |
4149 | ||
fab27f52 | 4150 | std::reverse (s, s + len); |
5e3929ed DA |
4151 | return len; |
4152 | } | |
4153 | ||
3cf2715d DE |
4154 | /* A poor man's fprintf, with the added features of %I, %R, %L, and %U. |
4155 | %R prints the value of REGISTER_PREFIX. | |
4156 | %L prints the value of LOCAL_LABEL_PREFIX. | |
4157 | %U prints the value of USER_LABEL_PREFIX. | |
4158 | %I prints the value of IMMEDIATE_PREFIX. | |
4159 | %O runs ASM_OUTPUT_OPCODE to transform what follows in the string. | |
b1721339 | 4160 | Also supported are %d, %i, %u, %x, %X, %o, %c, %s and %%. |
3cf2715d DE |
4161 | |
4162 | We handle alternate assembler dialects here, just like output_asm_insn. */ | |
4163 | ||
4164 | void | |
e34d07f2 | 4165 | asm_fprintf (FILE *file, const char *p, ...) |
3cf2715d | 4166 | { |
3cf2715d DE |
4167 | char buf[10]; |
4168 | char *q, c; | |
d1658619 SP |
4169 | #ifdef ASSEMBLER_DIALECT |
4170 | int dialect = 0; | |
4171 | #endif | |
e34d07f2 | 4172 | va_list argptr; |
6cf9ac28 | 4173 | |
e34d07f2 | 4174 | va_start (argptr, p); |
3cf2715d DE |
4175 | |
4176 | buf[0] = '%'; | |
4177 | ||
b729186a | 4178 | while ((c = *p++)) |
3cf2715d DE |
4179 | switch (c) |
4180 | { | |
4181 | #ifdef ASSEMBLER_DIALECT | |
4182 | case '{': | |
3cf2715d | 4183 | case '}': |
d1658619 SP |
4184 | case '|': |
4185 | p = do_assembler_dialects (p, &dialect); | |
3cf2715d DE |
4186 | break; |
4187 | #endif | |
4188 | ||
4189 | case '%': | |
4190 | c = *p++; | |
4191 | q = &buf[1]; | |
b1721339 KG |
4192 | while (strchr ("-+ #0", c)) |
4193 | { | |
4194 | *q++ = c; | |
4195 | c = *p++; | |
4196 | } | |
0df6c2c7 | 4197 | while (ISDIGIT (c) || c == '.') |
3cf2715d DE |
4198 | { |
4199 | *q++ = c; | |
4200 | c = *p++; | |
4201 | } | |
4202 | switch (c) | |
4203 | { | |
4204 | case '%': | |
b1721339 | 4205 | putc ('%', file); |
3cf2715d DE |
4206 | break; |
4207 | ||
4208 | case 'd': case 'i': case 'u': | |
b1721339 KG |
4209 | case 'x': case 'X': case 'o': |
4210 | case 'c': | |
3cf2715d DE |
4211 | *q++ = c; |
4212 | *q = 0; | |
4213 | fprintf (file, buf, va_arg (argptr, int)); | |
4214 | break; | |
4215 | ||
4216 | case 'w': | |
b1721339 KG |
4217 | /* This is a prefix to the 'd', 'i', 'u', 'x', 'X', and |
4218 | 'o' cases, but we do not check for those cases. It | |
4219 | means that the value is a HOST_WIDE_INT, which may be | |
4220 | either `long' or `long long'. */ | |
85f015e1 KG |
4221 | memcpy (q, HOST_WIDE_INT_PRINT, strlen (HOST_WIDE_INT_PRINT)); |
4222 | q += strlen (HOST_WIDE_INT_PRINT); | |
3cf2715d DE |
4223 | *q++ = *p++; |
4224 | *q = 0; | |
4225 | fprintf (file, buf, va_arg (argptr, HOST_WIDE_INT)); | |
4226 | break; | |
4227 | ||
4228 | case 'l': | |
4229 | *q++ = c; | |
b1721339 KG |
4230 | #ifdef HAVE_LONG_LONG |
4231 | if (*p == 'l') | |
4232 | { | |
4233 | *q++ = *p++; | |
4234 | *q++ = *p++; | |
4235 | *q = 0; | |
4236 | fprintf (file, buf, va_arg (argptr, long long)); | |
4237 | } | |
4238 | else | |
4239 | #endif | |
4240 | { | |
4241 | *q++ = *p++; | |
4242 | *q = 0; | |
4243 | fprintf (file, buf, va_arg (argptr, long)); | |
4244 | } | |
6cf9ac28 | 4245 | |
3cf2715d DE |
4246 | break; |
4247 | ||
4248 | case 's': | |
4249 | *q++ = c; | |
4250 | *q = 0; | |
4251 | fprintf (file, buf, va_arg (argptr, char *)); | |
4252 | break; | |
4253 | ||
4254 | case 'O': | |
4255 | #ifdef ASM_OUTPUT_OPCODE | |
4256 | ASM_OUTPUT_OPCODE (asm_out_file, p); | |
4257 | #endif | |
4258 | break; | |
4259 | ||
4260 | case 'R': | |
4261 | #ifdef REGISTER_PREFIX | |
4262 | fprintf (file, "%s", REGISTER_PREFIX); | |
4263 | #endif | |
4264 | break; | |
4265 | ||
4266 | case 'I': | |
4267 | #ifdef IMMEDIATE_PREFIX | |
4268 | fprintf (file, "%s", IMMEDIATE_PREFIX); | |
4269 | #endif | |
4270 | break; | |
4271 | ||
4272 | case 'L': | |
4273 | #ifdef LOCAL_LABEL_PREFIX | |
4274 | fprintf (file, "%s", LOCAL_LABEL_PREFIX); | |
4275 | #endif | |
4276 | break; | |
4277 | ||
4278 | case 'U': | |
19283265 | 4279 | fputs (user_label_prefix, file); |
3cf2715d DE |
4280 | break; |
4281 | ||
fe0503ea | 4282 | #ifdef ASM_FPRINTF_EXTENSIONS |
7ef0daad | 4283 | /* Uppercase letters are reserved for general use by asm_fprintf |
fe0503ea NC |
4284 | and so are not available to target specific code. In order to |
4285 | prevent the ASM_FPRINTF_EXTENSIONS macro from using them then, | |
4286 | they are defined here. As they get turned into real extensions | |
4287 | to asm_fprintf they should be removed from this list. */ | |
4288 | case 'A': case 'B': case 'C': case 'D': case 'E': | |
4289 | case 'F': case 'G': case 'H': case 'J': case 'K': | |
4290 | case 'M': case 'N': case 'P': case 'Q': case 'S': | |
4291 | case 'T': case 'V': case 'W': case 'Y': case 'Z': | |
4292 | break; | |
f5d927c0 | 4293 | |
fe0503ea NC |
4294 | ASM_FPRINTF_EXTENSIONS (file, argptr, p) |
4295 | #endif | |
3cf2715d | 4296 | default: |
0bccc606 | 4297 | gcc_unreachable (); |
3cf2715d DE |
4298 | } |
4299 | break; | |
4300 | ||
4301 | default: | |
b1721339 | 4302 | putc (c, file); |
3cf2715d | 4303 | } |
e34d07f2 | 4304 | va_end (argptr); |
3cf2715d DE |
4305 | } |
4306 | \f | |
3cf2715d DE |
4307 | /* Return nonzero if this function has no function calls. */ |
4308 | ||
4309 | int | |
6cf9ac28 | 4310 | leaf_function_p (void) |
3cf2715d | 4311 | { |
fa7af581 | 4312 | rtx_insn *insn; |
3cf2715d | 4313 | |
00d60013 WD |
4314 | /* Ensure we walk the entire function body. */ |
4315 | gcc_assert (!in_sequence_p ()); | |
4316 | ||
d56a43a0 AK |
4317 | /* Some back-ends (e.g. s390) want leaf functions to stay leaf |
4318 | functions even if they call mcount. */ | |
4319 | if (crtl->profile && !targetm.keep_leaf_when_profiled ()) | |
3cf2715d DE |
4320 | return 0; |
4321 | ||
4322 | for (insn = get_insns (); insn; insn = NEXT_INSN (insn)) | |
4323 | { | |
4b4bf941 | 4324 | if (CALL_P (insn) |
7d167afd | 4325 | && ! SIBLING_CALL_P (insn)) |
3cf2715d | 4326 | return 0; |
4b4bf941 | 4327 | if (NONJUMP_INSN_P (insn) |
3cf2715d | 4328 | && GET_CODE (PATTERN (insn)) == SEQUENCE |
4b4bf941 | 4329 | && CALL_P (XVECEXP (PATTERN (insn), 0, 0)) |
0a1c58a2 | 4330 | && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0))) |
3cf2715d DE |
4331 | return 0; |
4332 | } | |
3cf2715d DE |
4333 | |
4334 | return 1; | |
4335 | } | |
4336 | ||
09da1532 | 4337 | /* Return 1 if branch is a forward branch. |
ef6257cd JH |
4338 | Uses insn_shuid array, so it works only in the final pass. May be used by |
4339 | output templates to customary add branch prediction hints. | |
4340 | */ | |
4341 | int | |
fa7af581 | 4342 | final_forward_branch_p (rtx_insn *insn) |
ef6257cd JH |
4343 | { |
4344 | int insn_id, label_id; | |
b0efb46b | 4345 | |
0bccc606 | 4346 | gcc_assert (uid_shuid); |
ef6257cd JH |
4347 | insn_id = INSN_SHUID (insn); |
4348 | label_id = INSN_SHUID (JUMP_LABEL (insn)); | |
4349 | /* We've hit some insns that does not have id information available. */ | |
0bccc606 | 4350 | gcc_assert (insn_id && label_id); |
ef6257cd JH |
4351 | return insn_id < label_id; |
4352 | } | |
4353 | ||
3cf2715d DE |
4354 | /* On some machines, a function with no call insns |
4355 | can run faster if it doesn't create its own register window. | |
4356 | When output, the leaf function should use only the "output" | |
4357 | registers. Ordinarily, the function would be compiled to use | |
4358 | the "input" registers to find its arguments; it is a candidate | |
4359 | for leaf treatment if it uses only the "input" registers. | |
4360 | Leaf function treatment means renumbering so the function | |
4361 | uses the "output" registers instead. */ | |
4362 | ||
4363 | #ifdef LEAF_REGISTERS | |
4364 | ||
3cf2715d DE |
4365 | /* Return 1 if this function uses only the registers that can be |
4366 | safely renumbered. */ | |
4367 | ||
4368 | int | |
6cf9ac28 | 4369 | only_leaf_regs_used (void) |
3cf2715d DE |
4370 | { |
4371 | int i; | |
4977bab6 | 4372 | const char *const permitted_reg_in_leaf_functions = LEAF_REGISTERS; |
3cf2715d DE |
4373 | |
4374 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
6fb5fa3c | 4375 | if ((df_regs_ever_live_p (i) || global_regs[i]) |
e5e809f4 JL |
4376 | && ! permitted_reg_in_leaf_functions[i]) |
4377 | return 0; | |
4378 | ||
e3b5732b | 4379 | if (crtl->uses_pic_offset_table |
e5e809f4 | 4380 | && pic_offset_table_rtx != 0 |
f8cfc6aa | 4381 | && REG_P (pic_offset_table_rtx) |
e5e809f4 JL |
4382 | && ! permitted_reg_in_leaf_functions[REGNO (pic_offset_table_rtx)]) |
4383 | return 0; | |
4384 | ||
3cf2715d DE |
4385 | return 1; |
4386 | } | |
4387 | ||
4388 | /* Scan all instructions and renumber all registers into those | |
4389 | available in leaf functions. */ | |
4390 | ||
4391 | static void | |
fa7af581 | 4392 | leaf_renumber_regs (rtx_insn *first) |
3cf2715d | 4393 | { |
fa7af581 | 4394 | rtx_insn *insn; |
3cf2715d DE |
4395 | |
4396 | /* Renumber only the actual patterns. | |
4397 | The reg-notes can contain frame pointer refs, | |
4398 | and renumbering them could crash, and should not be needed. */ | |
4399 | for (insn = first; insn; insn = NEXT_INSN (insn)) | |
2c3c49de | 4400 | if (INSN_P (insn)) |
3cf2715d | 4401 | leaf_renumber_regs_insn (PATTERN (insn)); |
3cf2715d DE |
4402 | } |
4403 | ||
4404 | /* Scan IN_RTX and its subexpressions, and renumber all regs into those | |
4405 | available in leaf functions. */ | |
4406 | ||
4407 | void | |
6cf9ac28 | 4408 | leaf_renumber_regs_insn (rtx in_rtx) |
3cf2715d | 4409 | { |
b3694847 SS |
4410 | int i, j; |
4411 | const char *format_ptr; | |
3cf2715d DE |
4412 | |
4413 | if (in_rtx == 0) | |
4414 | return; | |
4415 | ||
4416 | /* Renumber all input-registers into output-registers. | |
4417 | renumbered_regs would be 1 for an output-register; | |
4418 | they */ | |
4419 | ||
f8cfc6aa | 4420 | if (REG_P (in_rtx)) |
3cf2715d DE |
4421 | { |
4422 | int newreg; | |
4423 | ||
4424 | /* Don't renumber the same reg twice. */ | |
4425 | if (in_rtx->used) | |
4426 | return; | |
4427 | ||
4428 | newreg = REGNO (in_rtx); | |
4429 | /* Don't try to renumber pseudo regs. It is possible for a pseudo reg | |
4430 | to reach here as part of a REG_NOTE. */ | |
4431 | if (newreg >= FIRST_PSEUDO_REGISTER) | |
4432 | { | |
4433 | in_rtx->used = 1; | |
4434 | return; | |
4435 | } | |
4436 | newreg = LEAF_REG_REMAP (newreg); | |
0bccc606 | 4437 | gcc_assert (newreg >= 0); |
6fb5fa3c DB |
4438 | df_set_regs_ever_live (REGNO (in_rtx), false); |
4439 | df_set_regs_ever_live (newreg, true); | |
4440 | SET_REGNO (in_rtx, newreg); | |
3cf2715d | 4441 | in_rtx->used = 1; |
9fccb335 | 4442 | return; |
3cf2715d DE |
4443 | } |
4444 | ||
2c3c49de | 4445 | if (INSN_P (in_rtx)) |
3cf2715d DE |
4446 | { |
4447 | /* Inside a SEQUENCE, we find insns. | |
4448 | Renumber just the patterns of these insns, | |
4449 | just as we do for the top-level insns. */ | |
4450 | leaf_renumber_regs_insn (PATTERN (in_rtx)); | |
4451 | return; | |
4452 | } | |
4453 | ||
4454 | format_ptr = GET_RTX_FORMAT (GET_CODE (in_rtx)); | |
4455 | ||
4456 | for (i = 0; i < GET_RTX_LENGTH (GET_CODE (in_rtx)); i++) | |
4457 | switch (*format_ptr++) | |
4458 | { | |
4459 | case 'e': | |
4460 | leaf_renumber_regs_insn (XEXP (in_rtx, i)); | |
4461 | break; | |
4462 | ||
4463 | case 'E': | |
4464 | if (NULL != XVEC (in_rtx, i)) | |
4465 | { | |
4466 | for (j = 0; j < XVECLEN (in_rtx, i); j++) | |
4467 | leaf_renumber_regs_insn (XVECEXP (in_rtx, i, j)); | |
4468 | } | |
4469 | break; | |
4470 | ||
4471 | case 'S': | |
4472 | case 's': | |
4473 | case '0': | |
4474 | case 'i': | |
4475 | case 'w': | |
4476 | case 'n': | |
4477 | case 'u': | |
4478 | break; | |
4479 | ||
4480 | default: | |
0bccc606 | 4481 | gcc_unreachable (); |
3cf2715d DE |
4482 | } |
4483 | } | |
4484 | #endif | |
ef330312 PB |
4485 | \f |
4486 | /* Turn the RTL into assembly. */ | |
c2924966 | 4487 | static unsigned int |
ef330312 PB |
4488 | rest_of_handle_final (void) |
4489 | { | |
0d4b5b86 | 4490 | const char *fnname = get_fnname_from_decl (current_function_decl); |
ef330312 PB |
4491 | |
4492 | assemble_start_function (current_function_decl, fnname); | |
4493 | final_start_function (get_insns (), asm_out_file, optimize); | |
4494 | final (get_insns (), asm_out_file, optimize); | |
1e288103 | 4495 | if (flag_ipa_ra) |
27c07cc5 | 4496 | collect_fn_hard_reg_usage (); |
ef330312 PB |
4497 | final_end_function (); |
4498 | ||
182a0c11 RH |
4499 | /* The IA-64 ".handlerdata" directive must be issued before the ".endp" |
4500 | directive that closes the procedure descriptor. Similarly, for x64 SEH. | |
4501 | Otherwise it's not strictly necessary, but it doesn't hurt either. */ | |
22ba88ef | 4502 | output_function_exception_table (fnname); |
ef330312 PB |
4503 | |
4504 | assemble_end_function (current_function_decl, fnname); | |
4505 | ||
6fb5fa3c DB |
4506 | /* Free up reg info memory. */ |
4507 | free_reg_info (); | |
4508 | ||
ef330312 PB |
4509 | if (! quiet_flag) |
4510 | fflush (asm_out_file); | |
4511 | ||
ef330312 PB |
4512 | /* Write DBX symbols if requested. */ |
4513 | ||
4514 | /* Note that for those inline functions where we don't initially | |
4515 | know for certain that we will be generating an out-of-line copy, | |
4516 | the first invocation of this routine (rest_of_compilation) will | |
4517 | skip over this code by doing a `goto exit_rest_of_compilation;'. | |
4518 | Later on, wrapup_global_declarations will (indirectly) call | |
4519 | rest_of_compilation again for those inline functions that need | |
4520 | to have out-of-line copies generated. During that call, we | |
4521 | *will* be routed past here. */ | |
4522 | ||
4523 | timevar_push (TV_SYMOUT); | |
725730f2 EB |
4524 | if (!DECL_IGNORED_P (current_function_decl)) |
4525 | debug_hooks->function_decl (current_function_decl); | |
ef330312 | 4526 | timevar_pop (TV_SYMOUT); |
6b20f353 DS |
4527 | |
4528 | /* Release the blocks that are linked to DECL_INITIAL() to free the memory. */ | |
4529 | DECL_INITIAL (current_function_decl) = error_mark_node; | |
4530 | ||
395a40e0 JH |
4531 | if (DECL_STATIC_CONSTRUCTOR (current_function_decl) |
4532 | && targetm.have_ctors_dtors) | |
4533 | targetm.asm_out.constructor (XEXP (DECL_RTL (current_function_decl), 0), | |
4534 | decl_init_priority_lookup | |
4535 | (current_function_decl)); | |
4536 | if (DECL_STATIC_DESTRUCTOR (current_function_decl) | |
4537 | && targetm.have_ctors_dtors) | |
4538 | targetm.asm_out.destructor (XEXP (DECL_RTL (current_function_decl), 0), | |
4539 | decl_fini_priority_lookup | |
4540 | (current_function_decl)); | |
c2924966 | 4541 | return 0; |
ef330312 PB |
4542 | } |
4543 | ||
27a4cd48 DM |
4544 | namespace { |
4545 | ||
4546 | const pass_data pass_data_final = | |
ef330312 | 4547 | { |
27a4cd48 DM |
4548 | RTL_PASS, /* type */ |
4549 | "final", /* name */ | |
4550 | OPTGROUP_NONE, /* optinfo_flags */ | |
27a4cd48 DM |
4551 | TV_FINAL, /* tv_id */ |
4552 | 0, /* properties_required */ | |
4553 | 0, /* properties_provided */ | |
4554 | 0, /* properties_destroyed */ | |
4555 | 0, /* todo_flags_start */ | |
4556 | 0, /* todo_flags_finish */ | |
ef330312 PB |
4557 | }; |
4558 | ||
27a4cd48 DM |
4559 | class pass_final : public rtl_opt_pass |
4560 | { | |
4561 | public: | |
c3284718 RS |
4562 | pass_final (gcc::context *ctxt) |
4563 | : rtl_opt_pass (pass_data_final, ctxt) | |
27a4cd48 DM |
4564 | {} |
4565 | ||
4566 | /* opt_pass methods: */ | |
be55bfe6 | 4567 | virtual unsigned int execute (function *) { return rest_of_handle_final (); } |
27a4cd48 DM |
4568 | |
4569 | }; // class pass_final | |
4570 | ||
4571 | } // anon namespace | |
4572 | ||
4573 | rtl_opt_pass * | |
4574 | make_pass_final (gcc::context *ctxt) | |
4575 | { | |
4576 | return new pass_final (ctxt); | |
4577 | } | |
4578 | ||
ef330312 | 4579 | |
c2924966 | 4580 | static unsigned int |
ef330312 PB |
4581 | rest_of_handle_shorten_branches (void) |
4582 | { | |
4583 | /* Shorten branches. */ | |
4584 | shorten_branches (get_insns ()); | |
c2924966 | 4585 | return 0; |
ef330312 | 4586 | } |
b0efb46b | 4587 | |
27a4cd48 DM |
4588 | namespace { |
4589 | ||
4590 | const pass_data pass_data_shorten_branches = | |
ef330312 | 4591 | { |
27a4cd48 DM |
4592 | RTL_PASS, /* type */ |
4593 | "shorten", /* name */ | |
4594 | OPTGROUP_NONE, /* optinfo_flags */ | |
27a4cd48 DM |
4595 | TV_SHORTEN_BRANCH, /* tv_id */ |
4596 | 0, /* properties_required */ | |
4597 | 0, /* properties_provided */ | |
4598 | 0, /* properties_destroyed */ | |
4599 | 0, /* todo_flags_start */ | |
4600 | 0, /* todo_flags_finish */ | |
ef330312 PB |
4601 | }; |
4602 | ||
27a4cd48 DM |
4603 | class pass_shorten_branches : public rtl_opt_pass |
4604 | { | |
4605 | public: | |
c3284718 RS |
4606 | pass_shorten_branches (gcc::context *ctxt) |
4607 | : rtl_opt_pass (pass_data_shorten_branches, ctxt) | |
27a4cd48 DM |
4608 | {} |
4609 | ||
4610 | /* opt_pass methods: */ | |
be55bfe6 TS |
4611 | virtual unsigned int execute (function *) |
4612 | { | |
4613 | return rest_of_handle_shorten_branches (); | |
4614 | } | |
27a4cd48 DM |
4615 | |
4616 | }; // class pass_shorten_branches | |
4617 | ||
4618 | } // anon namespace | |
4619 | ||
4620 | rtl_opt_pass * | |
4621 | make_pass_shorten_branches (gcc::context *ctxt) | |
4622 | { | |
4623 | return new pass_shorten_branches (ctxt); | |
4624 | } | |
4625 | ||
ef330312 | 4626 | |
c2924966 | 4627 | static unsigned int |
ef330312 PB |
4628 | rest_of_clean_state (void) |
4629 | { | |
fa7af581 | 4630 | rtx_insn *insn, *next; |
2153915d AO |
4631 | FILE *final_output = NULL; |
4632 | int save_unnumbered = flag_dump_unnumbered; | |
4633 | int save_noaddr = flag_dump_noaddr; | |
4634 | ||
4635 | if (flag_dump_final_insns) | |
4636 | { | |
4637 | final_output = fopen (flag_dump_final_insns, "a"); | |
4638 | if (!final_output) | |
4639 | { | |
7ca92787 JM |
4640 | error ("could not open final insn dump file %qs: %m", |
4641 | flag_dump_final_insns); | |
2153915d AO |
4642 | flag_dump_final_insns = NULL; |
4643 | } | |
4644 | else | |
4645 | { | |
2153915d | 4646 | flag_dump_noaddr = flag_dump_unnumbered = 1; |
c7ba0cfb RG |
4647 | if (flag_compare_debug_opt || flag_compare_debug) |
4648 | dump_flags |= TDF_NOUID; | |
6d8402ac AO |
4649 | dump_function_header (final_output, current_function_decl, |
4650 | dump_flags); | |
6ca5d1f6 | 4651 | final_insns_dump_p = true; |
2153915d AO |
4652 | |
4653 | for (insn = get_insns (); insn; insn = NEXT_INSN (insn)) | |
4654 | if (LABEL_P (insn)) | |
4655 | INSN_UID (insn) = CODE_LABEL_NUMBER (insn); | |
4656 | else | |
a59d15cf AO |
4657 | { |
4658 | if (NOTE_P (insn)) | |
4659 | set_block_for_insn (insn, NULL); | |
4660 | INSN_UID (insn) = 0; | |
4661 | } | |
2153915d AO |
4662 | } |
4663 | } | |
ef330312 PB |
4664 | |
4665 | /* It is very important to decompose the RTL instruction chain here: | |
4666 | debug information keeps pointing into CODE_LABEL insns inside the function | |
4667 | body. If these remain pointing to the other insns, we end up preserving | |
4668 | whole RTL chain and attached detailed debug info in memory. */ | |
4669 | for (insn = get_insns (); insn; insn = next) | |
4670 | { | |
4671 | next = NEXT_INSN (insn); | |
0f82e5c9 DM |
4672 | SET_NEXT_INSN (insn) = NULL; |
4673 | SET_PREV_INSN (insn) = NULL; | |
2153915d AO |
4674 | |
4675 | if (final_output | |
4676 | && (!NOTE_P (insn) || | |
4677 | (NOTE_KIND (insn) != NOTE_INSN_VAR_LOCATION | |
2b1c5433 | 4678 | && NOTE_KIND (insn) != NOTE_INSN_CALL_ARG_LOCATION |
2153915d | 4679 | && NOTE_KIND (insn) != NOTE_INSN_BLOCK_BEG |
5619e52c JJ |
4680 | && NOTE_KIND (insn) != NOTE_INSN_BLOCK_END |
4681 | && NOTE_KIND (insn) != NOTE_INSN_DELETED_DEBUG_LABEL))) | |
2153915d | 4682 | print_rtl_single (final_output, insn); |
2153915d AO |
4683 | } |
4684 | ||
4685 | if (final_output) | |
4686 | { | |
4687 | flag_dump_noaddr = save_noaddr; | |
4688 | flag_dump_unnumbered = save_unnumbered; | |
6ca5d1f6 | 4689 | final_insns_dump_p = false; |
2153915d AO |
4690 | |
4691 | if (fclose (final_output)) | |
4692 | { | |
7ca92787 JM |
4693 | error ("could not close final insn dump file %qs: %m", |
4694 | flag_dump_final_insns); | |
2153915d AO |
4695 | flag_dump_final_insns = NULL; |
4696 | } | |
ef330312 PB |
4697 | } |
4698 | ||
4699 | /* In case the function was not output, | |
4700 | don't leave any temporary anonymous types | |
4701 | queued up for sdb output. */ | |
53943148 | 4702 | if (SDB_DEBUGGING_INFO && write_symbols == SDB_DEBUG) |
ef330312 | 4703 | sdbout_types (NULL_TREE); |
ef330312 | 4704 | |
5f39ad47 | 4705 | flag_rerun_cse_after_global_opts = 0; |
ef330312 PB |
4706 | reload_completed = 0; |
4707 | epilogue_completed = 0; | |
23249ac4 DB |
4708 | #ifdef STACK_REGS |
4709 | regstack_completed = 0; | |
4710 | #endif | |
ef330312 PB |
4711 | |
4712 | /* Clear out the insn_length contents now that they are no | |
4713 | longer valid. */ | |
4714 | init_insn_lengths (); | |
4715 | ||
4716 | /* Show no temporary slots allocated. */ | |
4717 | init_temp_slots (); | |
4718 | ||
ef330312 PB |
4719 | free_bb_for_insn (); |
4720 | ||
c2e84327 DM |
4721 | if (cfun->gimple_df) |
4722 | delete_tree_ssa (cfun); | |
55b34b5f | 4723 | |
051f8cc6 JH |
4724 | /* We can reduce stack alignment on call site only when we are sure that |
4725 | the function body just produced will be actually used in the final | |
4726 | executable. */ | |
4727 | if (decl_binds_to_current_def_p (current_function_decl)) | |
ef330312 | 4728 | { |
17b29c0a | 4729 | unsigned int pref = crtl->preferred_stack_boundary; |
cb91fab0 JH |
4730 | if (crtl->stack_alignment_needed > crtl->preferred_stack_boundary) |
4731 | pref = crtl->stack_alignment_needed; | |
3dafb85c ML |
4732 | cgraph_node::rtl_info (current_function_decl) |
4733 | ->preferred_incoming_stack_boundary = pref; | |
ef330312 PB |
4734 | } |
4735 | ||
4736 | /* Make sure volatile mem refs aren't considered valid operands for | |
4737 | arithmetic insns. We must call this here if this is a nested inline | |
4738 | function, since the above code leaves us in the init_recog state, | |
4739 | and the function context push/pop code does not save/restore volatile_ok. | |
4740 | ||
4741 | ??? Maybe it isn't necessary for expand_start_function to call this | |
4742 | anymore if we do it here? */ | |
4743 | ||
4744 | init_recog_no_volatile (); | |
4745 | ||
4746 | /* We're done with this function. Free up memory if we can. */ | |
4747 | free_after_parsing (cfun); | |
4748 | free_after_compilation (cfun); | |
c2924966 | 4749 | return 0; |
ef330312 PB |
4750 | } |
4751 | ||
27a4cd48 DM |
4752 | namespace { |
4753 | ||
4754 | const pass_data pass_data_clean_state = | |
ef330312 | 4755 | { |
27a4cd48 DM |
4756 | RTL_PASS, /* type */ |
4757 | "*clean_state", /* name */ | |
4758 | OPTGROUP_NONE, /* optinfo_flags */ | |
27a4cd48 DM |
4759 | TV_FINAL, /* tv_id */ |
4760 | 0, /* properties_required */ | |
4761 | 0, /* properties_provided */ | |
4762 | PROP_rtl, /* properties_destroyed */ | |
4763 | 0, /* todo_flags_start */ | |
4764 | 0, /* todo_flags_finish */ | |
ef330312 | 4765 | }; |
27a4cd48 DM |
4766 | |
4767 | class pass_clean_state : public rtl_opt_pass | |
4768 | { | |
4769 | public: | |
c3284718 RS |
4770 | pass_clean_state (gcc::context *ctxt) |
4771 | : rtl_opt_pass (pass_data_clean_state, ctxt) | |
27a4cd48 DM |
4772 | {} |
4773 | ||
4774 | /* opt_pass methods: */ | |
be55bfe6 TS |
4775 | virtual unsigned int execute (function *) |
4776 | { | |
4777 | return rest_of_clean_state (); | |
4778 | } | |
27a4cd48 DM |
4779 | |
4780 | }; // class pass_clean_state | |
4781 | ||
4782 | } // anon namespace | |
4783 | ||
4784 | rtl_opt_pass * | |
4785 | make_pass_clean_state (gcc::context *ctxt) | |
4786 | { | |
4787 | return new pass_clean_state (ctxt); | |
4788 | } | |
27c07cc5 | 4789 | |
026c3cfd | 4790 | /* Return true if INSN is a call to the current function. */ |
26e288ba TV |
4791 | |
4792 | static bool | |
fa7af581 | 4793 | self_recursive_call_p (rtx_insn *insn) |
26e288ba TV |
4794 | { |
4795 | tree fndecl = get_call_fndecl (insn); | |
4796 | return (fndecl == current_function_decl | |
4797 | && decl_binds_to_current_def_p (fndecl)); | |
4798 | } | |
4799 | ||
27c07cc5 RO |
4800 | /* Collect hard register usage for the current function. */ |
4801 | ||
4802 | static void | |
4803 | collect_fn_hard_reg_usage (void) | |
4804 | { | |
fa7af581 | 4805 | rtx_insn *insn; |
4b29b965 | 4806 | #ifdef STACK_REGS |
27c07cc5 | 4807 | int i; |
4b29b965 | 4808 | #endif |
27c07cc5 | 4809 | struct cgraph_rtl_info *node; |
53f2f6c1 | 4810 | HARD_REG_SET function_used_regs; |
27c07cc5 RO |
4811 | |
4812 | /* ??? To be removed when all the ports have been fixed. */ | |
4813 | if (!targetm.call_fusage_contains_non_callee_clobbers) | |
4814 | return; | |
4815 | ||
53f2f6c1 | 4816 | CLEAR_HARD_REG_SET (function_used_regs); |
27c07cc5 RO |
4817 | |
4818 | for (insn = get_insns (); insn != NULL_RTX; insn = next_insn (insn)) | |
4819 | { | |
4820 | HARD_REG_SET insn_used_regs; | |
4821 | ||
4822 | if (!NONDEBUG_INSN_P (insn)) | |
4823 | continue; | |
4824 | ||
26e288ba TV |
4825 | if (CALL_P (insn) |
4826 | && !self_recursive_call_p (insn)) | |
6621ab68 TV |
4827 | { |
4828 | if (!get_call_reg_set_usage (insn, &insn_used_regs, | |
4829 | call_used_reg_set)) | |
4830 | return; | |
27c07cc5 | 4831 | |
6621ab68 TV |
4832 | IOR_HARD_REG_SET (function_used_regs, insn_used_regs); |
4833 | } | |
27c07cc5 | 4834 | |
6621ab68 | 4835 | find_all_hard_reg_sets (insn, &insn_used_regs, false); |
53f2f6c1 | 4836 | IOR_HARD_REG_SET (function_used_regs, insn_used_regs); |
27c07cc5 RO |
4837 | } |
4838 | ||
4839 | /* Be conservative - mark fixed and global registers as used. */ | |
53f2f6c1 | 4840 | IOR_HARD_REG_SET (function_used_regs, fixed_reg_set); |
27c07cc5 RO |
4841 | |
4842 | #ifdef STACK_REGS | |
4843 | /* Handle STACK_REGS conservatively, since the df-framework does not | |
4844 | provide accurate information for them. */ | |
4845 | ||
4846 | for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++) | |
53f2f6c1 | 4847 | SET_HARD_REG_BIT (function_used_regs, i); |
27c07cc5 RO |
4848 | #endif |
4849 | ||
5fea8186 TV |
4850 | /* The information we have gathered is only interesting if it exposes a |
4851 | register from the call_used_regs that is not used in this function. */ | |
4852 | if (hard_reg_set_subset_p (call_used_reg_set, function_used_regs)) | |
4853 | return; | |
4854 | ||
3dafb85c | 4855 | node = cgraph_node::rtl_info (current_function_decl); |
53f2f6c1 TV |
4856 | gcc_assert (node != NULL); |
4857 | ||
4858 | COPY_HARD_REG_SET (node->function_used_regs, function_used_regs); | |
27c07cc5 RO |
4859 | node->function_used_regs_valid = 1; |
4860 | } | |
4861 | ||
4862 | /* Get the declaration of the function called by INSN. */ | |
4863 | ||
4864 | static tree | |
fa7af581 | 4865 | get_call_fndecl (rtx_insn *insn) |
27c07cc5 RO |
4866 | { |
4867 | rtx note, datum; | |
4868 | ||
4869 | note = find_reg_note (insn, REG_CALL_DECL, NULL_RTX); | |
4870 | if (note == NULL_RTX) | |
4871 | return NULL_TREE; | |
4872 | ||
4873 | datum = XEXP (note, 0); | |
4874 | if (datum != NULL_RTX) | |
4875 | return SYMBOL_REF_DECL (datum); | |
4876 | ||
4877 | return NULL_TREE; | |
4878 | } | |
4879 | ||
4880 | /* Return the cgraph_rtl_info of the function called by INSN. Returns NULL for | |
4881 | call targets that can be overwritten. */ | |
4882 | ||
4883 | static struct cgraph_rtl_info * | |
fa7af581 | 4884 | get_call_cgraph_rtl_info (rtx_insn *insn) |
27c07cc5 RO |
4885 | { |
4886 | tree fndecl; | |
4887 | ||
4888 | if (insn == NULL_RTX) | |
4889 | return NULL; | |
4890 | ||
4891 | fndecl = get_call_fndecl (insn); | |
4892 | if (fndecl == NULL_TREE | |
4893 | || !decl_binds_to_current_def_p (fndecl)) | |
4894 | return NULL; | |
4895 | ||
3dafb85c | 4896 | return cgraph_node::rtl_info (fndecl); |
27c07cc5 RO |
4897 | } |
4898 | ||
4899 | /* Find hard registers used by function call instruction INSN, and return them | |
4900 | in REG_SET. Return DEFAULT_SET in REG_SET if not found. */ | |
4901 | ||
4902 | bool | |
86bf2d46 | 4903 | get_call_reg_set_usage (rtx_insn *insn, HARD_REG_SET *reg_set, |
27c07cc5 RO |
4904 | HARD_REG_SET default_set) |
4905 | { | |
1e288103 | 4906 | if (flag_ipa_ra) |
27c07cc5 RO |
4907 | { |
4908 | struct cgraph_rtl_info *node = get_call_cgraph_rtl_info (insn); | |
4909 | if (node != NULL | |
4910 | && node->function_used_regs_valid) | |
4911 | { | |
4912 | COPY_HARD_REG_SET (*reg_set, node->function_used_regs); | |
4913 | AND_HARD_REG_SET (*reg_set, default_set); | |
4914 | return true; | |
4915 | } | |
4916 | } | |
4917 | ||
4918 | COPY_HARD_REG_SET (*reg_set, default_set); | |
4919 | return false; | |
4920 | } |