]> git.ipfire.org Git - thirdparty/gcc.git/blame - gcc/final.c
Makefile.in (optabs.o): Depend on real.h
[thirdparty/gcc.git] / gcc / final.c
CommitLineData
3cf2715d 1/* Convert RTL to assembler code and output it, for GNU compiler.
a30caf5c 2 Copyright (C) 1987, 88, 89, 92-99, 2000 Free Software Foundation, Inc.
3cf2715d
DE
3
4This file is part of GNU CC.
5
6GNU CC is free software; you can redistribute it and/or modify
7it under the terms of the GNU General Public License as published by
8the Free Software Foundation; either version 2, or (at your option)
9any later version.
10
11GNU CC is distributed in the hope that it will be useful,
12but WITHOUT ANY WARRANTY; without even the implied warranty of
13MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14GNU General Public License for more details.
15
16You should have received a copy of the GNU General Public License
17along with GNU CC; see the file COPYING. If not, write to
940d9d63
RK
18the Free Software Foundation, 59 Temple Place - Suite 330,
19Boston, MA 02111-1307, USA. */
3cf2715d
DE
20
21
22/* This is the final pass of the compiler.
23 It looks at the rtl code for a function and outputs assembler code.
24
25 Call `final_start_function' to output the assembler code for function entry,
26 `final' to output assembler code for some RTL code,
27 `final_end_function' to output assembler code for function exit.
28 If a function is compiled in several pieces, each piece is
29 output separately with `final'.
30
31 Some optimizations are also done at this level.
32 Move instructions that were made unnecessary by good register allocation
33 are detected and omitted from the output. (Though most of these
34 are removed by the last jump pass.)
35
36 Instructions to set the condition codes are omitted when it can be
37 seen that the condition codes already had the desired values.
38
39 In some cases it is sufficient if the inherited condition codes
40 have related values, but this may require the following insn
41 (the one that tests the condition codes) to be modified.
42
43 The code for the function prologue and epilogue are generated
44 directly as assembler code by the macros FUNCTION_PROLOGUE and
45 FUNCTION_EPILOGUE. Those instructions never exist as rtl. */
46
47#include "config.h"
670ee920 48#include "system.h"
3cf2715d
DE
49
50#include "tree.h"
51#include "rtl.h"
6baf1cc8 52#include "tm_p.h"
3cf2715d
DE
53#include "regs.h"
54#include "insn-config.h"
55#include "insn-flags.h"
56#include "insn-attr.h"
57#include "insn-codes.h"
58#include "recog.h"
59#include "conditions.h"
60#include "flags.h"
61#include "real.h"
62#include "hard-reg-set.h"
63#include "defaults.h"
64#include "output.h"
3d195391 65#include "except.h"
49ad7cfa 66#include "function.h"
10f0ad3d 67#include "toplev.h"
d6f4ec51 68#include "reload.h"
ab87f8c8 69#include "intl.h"
3cf2715d
DE
70
71/* Get N_SLINE and N_SOL from stab.h if we can expect the file to exist. */
72#if defined (DBX_DEBUGGING_INFO) || defined (XCOFF_DEBUGGING_INFO)
76ead72b 73#include "dbxout.h"
c7391272 74#if defined (USG) || !defined (HAVE_STAB_H)
3cf2715d
DE
75#include "gstab.h" /* If doing DBX on sysV, use our own stab.h. */
76#else
9ec36da5
JL
77#include <stab.h>
78#endif
79
3cf2715d
DE
80#endif /* DBX_DEBUGGING_INFO || XCOFF_DEBUGGING_INFO */
81
82#ifdef XCOFF_DEBUGGING_INFO
83#include "xcoffout.h"
84#endif
85
76ead72b
RL
86#ifdef DWARF_DEBUGGING_INFO
87#include "dwarfout.h"
88#endif
89
90#if defined (DWARF2_UNWIND_INFO) || defined (DWARF2_DEBUGGING_INFO)
91#include "dwarf2out.h"
92#endif
93
94#ifdef SDB_DEBUGGING_INFO
95#include "sdbout.h"
96#endif
97
3cf2715d
DE
98/* .stabd code for line number. */
99#ifndef N_SLINE
100#define N_SLINE 0x44
101#endif
102
103/* .stabs code for included file name. */
104#ifndef N_SOL
105#define N_SOL 0x84
106#endif
107
108#ifndef INT_TYPE_SIZE
109#define INT_TYPE_SIZE BITS_PER_WORD
110#endif
111
9e2f9a7f
DE
112#ifndef LONG_TYPE_SIZE
113#define LONG_TYPE_SIZE BITS_PER_WORD
114#endif
115
3cf2715d
DE
116/* If we aren't using cc0, CC_STATUS_INIT shouldn't exist. So define a
117 null default for it to save conditionalization later. */
118#ifndef CC_STATUS_INIT
119#define CC_STATUS_INIT
120#endif
121
122/* How to start an assembler comment. */
123#ifndef ASM_COMMENT_START
124#define ASM_COMMENT_START ";#"
125#endif
126
127/* Is the given character a logical line separator for the assembler? */
128#ifndef IS_ASM_LOGICAL_LINE_SEPARATOR
129#define IS_ASM_LOGICAL_LINE_SEPARATOR(C) ((C) == ';')
130#endif
131
75197b37
BS
132#ifndef JUMP_TABLES_IN_TEXT_SECTION
133#define JUMP_TABLES_IN_TEXT_SECTION 0
134#endif
135
3cf2715d
DE
136/* Last insn processed by final_scan_insn. */
137static rtx debug_insn = 0;
138
139/* Line number of last NOTE. */
140static int last_linenum;
141
eac40081
RK
142/* Highest line number in current block. */
143static int high_block_linenum;
144
145/* Likewise for function. */
146static int high_function_linenum;
147
3cf2715d
DE
148/* Filename of last NOTE. */
149static char *last_filename;
150
151/* Number of basic blocks seen so far;
152 used if profile_block_flag is set. */
153static int count_basic_blocks;
154
9e2f9a7f
DE
155/* Number of instrumented arcs when profile_arc_flag is set. */
156extern int count_instrumented_arcs;
157
fc470718
R
158extern int length_unit_log; /* This is defined in insn-attrtab.c. */
159
3cf2715d
DE
160/* Nonzero while outputting an `asm' with operands.
161 This means that inconsistencies are the user's fault, so don't abort.
162 The precise value is the insn being output, to pass to error_for_asm. */
163static rtx this_is_asm_operands;
164
165/* Number of operands of this insn, for an `asm' with operands. */
22bf4422 166static unsigned int insn_noperands;
3cf2715d
DE
167
168/* Compare optimization flag. */
169
170static rtx last_ignored_compare = 0;
171
172/* Flag indicating this insn is the start of a new basic block. */
173
174static int new_block = 1;
175
176/* All the symbol-blocks (levels of scoping) in the compilation
177 are assigned sequence numbers in order of appearance of the
178 beginnings of the symbol-blocks. Both final and dbxout do this,
179 and assume that they will both give the same number to each block.
180 Final uses these sequence numbers to generate assembler label names
181 LBBnnn and LBEnnn for the beginning and end of the symbol-block.
182 Dbxout uses the sequence numbers to generate references to the same labels
183 from the dbx debugging information.
184
185 Sdb records this level at the beginning of each function,
186 in order to find the current level when recursing down declarations.
187 It outputs the block beginning and endings
188 at the point in the asm file where the blocks would begin and end. */
189
190int next_block_index;
191
192/* Assign a unique number to each insn that is output.
193 This can be used to generate unique local labels. */
194
195static int insn_counter = 0;
196
197#ifdef HAVE_cc0
198/* This variable contains machine-dependent flags (defined in tm.h)
199 set and examined by output routines
200 that describe how to interpret the condition codes properly. */
201
202CC_STATUS cc_status;
203
204/* During output of an insn, this contains a copy of cc_status
205 from before the insn. */
206
207CC_STATUS cc_prev_status;
208#endif
209
210/* Indexed by hardware reg number, is 1 if that register is ever
211 used in the current function.
212
213 In life_analysis, or in stupid_life_analysis, this is set
214 up to record the hard regs used explicitly. Reload adds
215 in the hard regs used for holding pseudo regs. Final uses
216 it to generate the code in the function prologue and epilogue
217 to save and restore registers as needed. */
218
219char regs_ever_live[FIRST_PSEUDO_REGISTER];
220
221/* Nonzero means current function must be given a frame pointer.
222 Set in stmt.c if anything is allocated on the stack there.
223 Set in reload1.c if anything is allocated on the stack there. */
224
225int frame_pointer_needed;
226
227/* Assign unique numbers to labels generated for profiling. */
228
229int profile_label_no;
230
231/* Length so far allocated in PENDING_BLOCKS. */
232
233static int max_block_depth;
234
235/* Stack of sequence numbers of symbol-blocks of which we have seen the
236 beginning but not yet the end. Sequence numbers are assigned at
237 the beginning; this stack allows us to find the sequence number
238 of a block that is ending. */
239
240static int *pending_blocks;
241
242/* Number of elements currently in use in PENDING_BLOCKS. */
243
244static int block_depth;
245
246/* Nonzero if have enabled APP processing of our assembler output. */
247
248static int app_on;
249
250/* If we are outputting an insn sequence, this contains the sequence rtx.
251 Zero otherwise. */
252
253rtx final_sequence;
254
255#ifdef ASSEMBLER_DIALECT
256
257/* Number of the assembler dialect to use, starting at 0. */
258static int dialect_number;
259#endif
260
261/* Indexed by line number, nonzero if there is a note for that line. */
262
263static char *line_note_exists;
264
265/* Linked list to hold line numbers for each basic block. */
266
267struct bb_list {
268 struct bb_list *next; /* pointer to next basic block */
269 int line_num; /* line number */
270 int file_label_num; /* LPBC<n> label # for stored filename */
271 int func_label_num; /* LPBC<n> label # for stored function name */
272};
273
274static struct bb_list *bb_head = 0; /* Head of basic block list */
275static struct bb_list **bb_tail = &bb_head; /* Ptr to store next bb ptr */
276static int bb_file_label_num = -1; /* Current label # for file */
277static int bb_func_label_num = -1; /* Current label # for func */
278
279/* Linked list to hold the strings for each file and function name output. */
280
281struct bb_str {
282 struct bb_str *next; /* pointer to next string */
9b3142b3 283 const char *string; /* string */
3cf2715d
DE
284 int label_num; /* label number */
285 int length; /* string length */
286};
287
3cf2715d
DE
288static struct bb_str *sbb_head = 0; /* Head of string list. */
289static struct bb_str **sbb_tail = &sbb_head; /* Ptr to store next bb str */
290static int sbb_label_num = 0; /* Last label used */
291
1d300e19 292#ifdef HAVE_ATTR_length
3cf2715d 293static int asm_insn_count PROTO((rtx));
1d300e19 294#endif
3cf2715d
DE
295static void profile_function PROTO((FILE *));
296static void profile_after_prologue PROTO((FILE *));
297static void add_bb PROTO((FILE *));
9b3142b3 298static int add_bb_string PROTO((const char *, int));
3cf2715d
DE
299static void output_source_line PROTO((FILE *, rtx));
300static rtx walk_alter_subreg PROTO((rtx));
cb649530 301static void output_asm_name PROTO((void));
3cf2715d 302static void output_operand PROTO((rtx, int));
e9a25f70 303#ifdef LEAF_REGISTERS
3cf2715d 304static void leaf_renumber_regs PROTO((rtx));
e9a25f70
JL
305#endif
306#ifdef HAVE_cc0
307static int alter_cond PROTO((rtx));
308#endif
ca3075bd
KG
309#ifndef ADDR_VEC_ALIGN
310static int final_addr_vec_align PROTO ((rtx));
311#endif
7bdb32b9 312#ifdef HAVE_ATTR_length
ca3075bd 313static int align_fuzz PROTO ((rtx, rtx, int, unsigned));
7bdb32b9 314#endif
3cf2715d
DE
315\f
316/* Initialize data in final at the beginning of a compilation. */
317
318void
319init_final (filename)
6a651371 320 const char *filename ATTRIBUTE_UNUSED;
3cf2715d
DE
321{
322 next_block_index = 2;
323 app_on = 0;
324 max_block_depth = 20;
325 pending_blocks = (int *) xmalloc (20 * sizeof *pending_blocks);
326 final_sequence = 0;
327
328#ifdef ASSEMBLER_DIALECT
329 dialect_number = ASSEMBLER_DIALECT;
330#endif
331}
332
333/* Called at end of source file,
334 to output the block-profiling table for this entire compilation. */
335
336void
337end_final (filename)
87e11268 338 const char *filename;
3cf2715d
DE
339{
340 int i;
341
9e2f9a7f 342 if (profile_block_flag || profile_arc_flag)
3cf2715d
DE
343 {
344 char name[20];
345 int align = exact_log2 (BIGGEST_ALIGNMENT / BITS_PER_UNIT);
9e2f9a7f 346 int size, rounded;
3cf2715d
DE
347 struct bb_list *ptr;
348 struct bb_str *sptr;
9e2f9a7f
DE
349 int long_bytes = LONG_TYPE_SIZE / BITS_PER_UNIT;
350 int pointer_bytes = POINTER_SIZE / BITS_PER_UNIT;
351
352 if (profile_block_flag)
353 size = long_bytes * count_basic_blocks;
354 else
355 size = long_bytes * count_instrumented_arcs;
356 rounded = size;
3cf2715d
DE
357
358 rounded += (BIGGEST_ALIGNMENT / BITS_PER_UNIT) - 1;
359 rounded = (rounded / (BIGGEST_ALIGNMENT / BITS_PER_UNIT)
360 * (BIGGEST_ALIGNMENT / BITS_PER_UNIT));
361
362 data_section ();
363
47431dff
RK
364 /* Output the main header, of 11 words:
365 0: 1 if this file is initialized, else 0.
3cf2715d
DE
366 1: address of file name (LPBX1).
367 2: address of table of counts (LPBX2).
368 3: number of counts in the table.
369 4: always 0, for compatibility with Sun.
370
371 The following are GNU extensions:
372
373 5: address of table of start addrs of basic blocks (LPBX3).
374 6: Number of bytes in this header.
375 7: address of table of function names (LPBX4).
376 8: address of table of line numbers (LPBX5) or 0.
47431dff 377 9: address of table of file names (LPBX6) or 0.
0f41302f 378 10: space reserved for basic block profiling. */
3cf2715d
DE
379
380 ASM_OUTPUT_ALIGN (asm_out_file, align);
381
382 ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBX", 0);
383 /* zero word */
9e2f9a7f 384 assemble_integer (const0_rtx, long_bytes, 1);
3cf2715d
DE
385
386 /* address of filename */
387 ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 1);
38a448ca 388 assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name), pointer_bytes, 1);
3cf2715d
DE
389
390 /* address of count table */
391 ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 2);
38a448ca 392 assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name), pointer_bytes, 1);
3cf2715d 393
9e2f9a7f
DE
394 /* count of the # of basic blocks or # of instrumented arcs */
395 if (profile_block_flag)
396 assemble_integer (GEN_INT (count_basic_blocks), long_bytes, 1);
397 else
398 assemble_integer (GEN_INT (count_instrumented_arcs), long_bytes,
399 1);
3cf2715d
DE
400
401 /* zero word (link field) */
9e2f9a7f 402 assemble_integer (const0_rtx, pointer_bytes, 1);
3cf2715d
DE
403
404 /* address of basic block start address table */
9e2f9a7f
DE
405 if (profile_block_flag)
406 {
407 ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 3);
38a448ca 408 assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name), pointer_bytes,
9e2f9a7f
DE
409 1);
410 }
411 else
412 assemble_integer (const0_rtx, pointer_bytes, 1);
3cf2715d
DE
413
414 /* byte count for extended structure. */
d7502074 415 assemble_integer (GEN_INT (11 * UNITS_PER_WORD), long_bytes, 1);
3cf2715d
DE
416
417 /* address of function name table */
9e2f9a7f
DE
418 if (profile_block_flag)
419 {
420 ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 4);
38a448ca 421 assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name), pointer_bytes,
9e2f9a7f
DE
422 1);
423 }
424 else
425 assemble_integer (const0_rtx, pointer_bytes, 1);
3cf2715d
DE
426
427 /* address of line number and filename tables if debugging. */
9e2f9a7f 428 if (write_symbols != NO_DEBUG && profile_block_flag)
3cf2715d
DE
429 {
430 ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 5);
c5c76735
JL
431 assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name),
432 pointer_bytes, 1);
3cf2715d 433 ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 6);
c5c76735
JL
434 assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name),
435 pointer_bytes, 1);
3cf2715d
DE
436 }
437 else
438 {
9e2f9a7f
DE
439 assemble_integer (const0_rtx, pointer_bytes, 1);
440 assemble_integer (const0_rtx, pointer_bytes, 1);
3cf2715d
DE
441 }
442
47431dff
RK
443 /* space for extension ptr (link field) */
444 assemble_integer (const0_rtx, UNITS_PER_WORD, 1);
445
3cf2715d
DE
446 /* Output the file name changing the suffix to .d for Sun tcov
447 compatibility. */
448 ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBX", 1);
449 {
67e23d2f
JW
450 char *cwd = getpwd ();
451 int len = strlen (filename) + strlen (cwd) + 1;
452 char *data_file = (char *) alloca (len + 4);
453
454 strcpy (data_file, cwd);
455 strcat (data_file, "/");
456 strcat (data_file, filename);
3cf2715d 457 strip_off_ending (data_file, len);
9e2f9a7f
DE
458 if (profile_block_flag)
459 strcat (data_file, ".d");
460 else
461 strcat (data_file, ".da");
3cf2715d
DE
462 assemble_string (data_file, strlen (data_file) + 1);
463 }
464
465 /* Make space for the table of counts. */
2786cbad 466 if (size == 0)
3cf2715d
DE
467 {
468 /* Realign data section. */
469 ASM_OUTPUT_ALIGN (asm_out_file, align);
470 ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBX", 2);
471 if (size != 0)
472 assemble_zeros (size);
473 }
474 else
475 {
476 ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 2);
477#ifdef ASM_OUTPUT_SHARED_LOCAL
478 if (flag_shared_data)
479 ASM_OUTPUT_SHARED_LOCAL (asm_out_file, name, size, rounded);
480 else
481#endif
e9a25f70
JL
482#ifdef ASM_OUTPUT_ALIGNED_DECL_LOCAL
483 ASM_OUTPUT_ALIGNED_DECL_LOCAL (asm_out_file, NULL_TREE, name, size,
484 BIGGEST_ALIGNMENT);
485#else
3cf2715d
DE
486#ifdef ASM_OUTPUT_ALIGNED_LOCAL
487 ASM_OUTPUT_ALIGNED_LOCAL (asm_out_file, name, size,
488 BIGGEST_ALIGNMENT);
489#else
490 ASM_OUTPUT_LOCAL (asm_out_file, name, size, rounded);
e9a25f70 491#endif
3cf2715d
DE
492#endif
493 }
494
495 /* Output any basic block strings */
9e2f9a7f 496 if (profile_block_flag)
3cf2715d 497 {
9e2f9a7f
DE
498 readonly_data_section ();
499 if (sbb_head)
3cf2715d 500 {
9e2f9a7f
DE
501 ASM_OUTPUT_ALIGN (asm_out_file, align);
502 for (sptr = sbb_head; sptr != 0; sptr = sptr->next)
503 {
504 ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBC",
505 sptr->label_num);
506 assemble_string (sptr->string, sptr->length);
507 }
3cf2715d
DE
508 }
509 }
510
511 /* Output the table of addresses. */
9e2f9a7f 512 if (profile_block_flag)
3cf2715d 513 {
9e2f9a7f
DE
514 /* Realign in new section */
515 ASM_OUTPUT_ALIGN (asm_out_file, align);
516 ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBX", 3);
517 for (i = 0; i < count_basic_blocks; i++)
518 {
519 ASM_GENERATE_INTERNAL_LABEL (name, "LPB", i);
38a448ca 520 assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name),
9e2f9a7f
DE
521 pointer_bytes, 1);
522 }
3cf2715d
DE
523 }
524
525 /* Output the table of function names. */
9e2f9a7f 526 if (profile_block_flag)
3cf2715d 527 {
9e2f9a7f
DE
528 ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBX", 4);
529 for ((ptr = bb_head), (i = 0); ptr != 0; (ptr = ptr->next), i++)
3cf2715d 530 {
9e2f9a7f
DE
531 if (ptr->func_label_num >= 0)
532 {
533 ASM_GENERATE_INTERNAL_LABEL (name, "LPBC",
534 ptr->func_label_num);
38a448ca 535 assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name),
9e2f9a7f
DE
536 pointer_bytes, 1);
537 }
538 else
539 assemble_integer (const0_rtx, pointer_bytes, 1);
3cf2715d 540 }
3cf2715d 541
9e2f9a7f
DE
542 for ( ; i < count_basic_blocks; i++)
543 assemble_integer (const0_rtx, pointer_bytes, 1);
544 }
3cf2715d 545
9e2f9a7f 546 if (write_symbols != NO_DEBUG && profile_block_flag)
3cf2715d
DE
547 {
548 /* Output the table of line numbers. */
549 ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBX", 5);
550 for ((ptr = bb_head), (i = 0); ptr != 0; (ptr = ptr->next), i++)
9e2f9a7f 551 assemble_integer (GEN_INT (ptr->line_num), long_bytes, 1);
3cf2715d
DE
552
553 for ( ; i < count_basic_blocks; i++)
9e2f9a7f 554 assemble_integer (const0_rtx, long_bytes, 1);
3cf2715d
DE
555
556 /* Output the table of file names. */
557 ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBX", 6);
558 for ((ptr = bb_head), (i = 0); ptr != 0; (ptr = ptr->next), i++)
559 {
560 if (ptr->file_label_num >= 0)
561 {
9e2f9a7f
DE
562 ASM_GENERATE_INTERNAL_LABEL (name, "LPBC",
563 ptr->file_label_num);
38a448ca 564 assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name),
9e2f9a7f 565 pointer_bytes, 1);
3cf2715d
DE
566 }
567 else
9e2f9a7f 568 assemble_integer (const0_rtx, pointer_bytes, 1);
3cf2715d
DE
569 }
570
571 for ( ; i < count_basic_blocks; i++)
9e2f9a7f 572 assemble_integer (const0_rtx, pointer_bytes, 1);
3cf2715d
DE
573 }
574
575 /* End with the address of the table of addresses,
576 so we can find it easily, as the last word in the file's text. */
9e2f9a7f
DE
577 if (profile_block_flag)
578 {
579 ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 3);
38a448ca 580 assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name), pointer_bytes,
9e2f9a7f
DE
581 1);
582 }
3cf2715d
DE
583 }
584}
585
586/* Enable APP processing of subsequent output.
587 Used before the output from an `asm' statement. */
588
589void
590app_enable ()
591{
592 if (! app_on)
593 {
51723711 594 fputs (ASM_APP_ON, asm_out_file);
3cf2715d
DE
595 app_on = 1;
596 }
597}
598
599/* Disable APP processing of subsequent output.
600 Called from varasm.c before most kinds of output. */
601
602void
603app_disable ()
604{
605 if (app_on)
606 {
51723711 607 fputs (ASM_APP_OFF, asm_out_file);
3cf2715d
DE
608 app_on = 0;
609 }
610}
611\f
612/* Return the number of slots filled in the current
613 delayed branch sequence (we don't count the insn needing the
614 delay slot). Zero if not in a delayed branch sequence. */
615
616#ifdef DELAY_SLOTS
617int
618dbr_sequence_length ()
619{
620 if (final_sequence != 0)
621 return XVECLEN (final_sequence, 0) - 1;
622 else
623 return 0;
624}
625#endif
626\f
627/* The next two pages contain routines used to compute the length of an insn
628 and to shorten branches. */
629
630/* Arrays for insn lengths, and addresses. The latter is referenced by
631 `insn_current_length'. */
632
633static short *insn_lengths;
634int *insn_addresses;
635
ea3cbda5
R
636/* Max uid for which the above arrays are valid. */
637static int insn_lengths_max_uid;
638
3cf2715d
DE
639/* Address of insn being processed. Used by `insn_current_length'. */
640int insn_current_address;
641
fc470718
R
642/* Address of insn being processed in previous iteration. */
643int insn_last_address;
644
645/* konwn invariant alignment of insn being processed. */
646int insn_current_align;
647
95707627
R
648/* After shorten_branches, for any insn, uid_align[INSN_UID (insn)]
649 gives the next following alignment insn that increases the known
650 alignment, or NULL_RTX if there is no such insn.
651 For any alignment obtained this way, we can again index uid_align with
652 its uid to obtain the next following align that in turn increases the
653 alignment, till we reach NULL_RTX; the sequence obtained this way
654 for each insn we'll call the alignment chain of this insn in the following
655 comments. */
656
9e423e6d
JW
657struct label_alignment {
658 short alignment;
659 short max_skip;
660};
661
662static rtx *uid_align;
663static int *uid_shuid;
664static struct label_alignment *label_align;
95707627 665
3cf2715d
DE
666/* Indicate that branch shortening hasn't yet been done. */
667
668void
669init_insn_lengths ()
670{
95707627
R
671 if (label_align)
672 {
673 free (label_align);
674 label_align = 0;
675 }
676 if (uid_shuid)
677 {
678 free (uid_shuid);
679 uid_shuid = 0;
680 }
681 if (insn_lengths)
682 {
683 free (insn_lengths);
684 insn_lengths = 0;
ea3cbda5 685 insn_lengths_max_uid = 0;
95707627
R
686 }
687 if (insn_addresses)
688 {
689 free (insn_addresses);
690 insn_addresses = 0;
691 }
692 if (uid_align)
693 {
694 free (uid_align);
695 uid_align = 0;
696 }
3cf2715d
DE
697}
698
699/* Obtain the current length of an insn. If branch shortening has been done,
700 get its actual length. Otherwise, get its maximum length. */
701
702int
703get_attr_length (insn)
7bdb32b9 704 rtx insn ATTRIBUTE_UNUSED;
3cf2715d
DE
705{
706#ifdef HAVE_ATTR_length
707 rtx body;
708 int i;
709 int length = 0;
710
ea3cbda5 711 if (insn_lengths_max_uid > INSN_UID (insn))
3cf2715d
DE
712 return insn_lengths[INSN_UID (insn)];
713 else
714 switch (GET_CODE (insn))
715 {
716 case NOTE:
717 case BARRIER:
718 case CODE_LABEL:
719 return 0;
720
721 case CALL_INSN:
722 length = insn_default_length (insn);
723 break;
724
725 case JUMP_INSN:
726 body = PATTERN (insn);
727 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
728 {
fc470718
R
729 /* Alignment is machine-dependent and should be handled by
730 ADDR_VEC_ALIGN. */
3cf2715d
DE
731 }
732 else
733 length = insn_default_length (insn);
734 break;
735
736 case INSN:
737 body = PATTERN (insn);
738 if (GET_CODE (body) == USE || GET_CODE (body) == CLOBBER)
739 return 0;
740
741 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
742 length = asm_insn_count (body) * insn_default_length (insn);
743 else if (GET_CODE (body) == SEQUENCE)
744 for (i = 0; i < XVECLEN (body, 0); i++)
745 length += get_attr_length (XVECEXP (body, 0, i));
746 else
747 length = insn_default_length (insn);
e9a25f70
JL
748 break;
749
750 default:
751 break;
3cf2715d
DE
752 }
753
754#ifdef ADJUST_INSN_LENGTH
755 ADJUST_INSN_LENGTH (insn, length);
756#endif
757 return length;
758#else /* not HAVE_ATTR_length */
759 return 0;
760#endif /* not HAVE_ATTR_length */
761}
762\f
fc470718
R
763/* Code to handle alignment inside shorten_branches. */
764
765/* Here is an explanation how the algorithm in align_fuzz can give
766 proper results:
767
768 Call a sequence of instructions beginning with alignment point X
769 and continuing until the next alignment point `block X'. When `X'
770 is used in an expression, it means the alignment value of the
771 alignment point.
772
773 Call the distance between the start of the first insn of block X, and
774 the end of the last insn of block X `IX', for the `inner size of X'.
775 This is clearly the sum of the instruction lengths.
776
777 Likewise with the next alignment-delimited block following X, which we
778 shall call block Y.
779
780 Call the distance between the start of the first insn of block X, and
781 the start of the first insn of block Y `OX', for the `outer size of X'.
782
783 The estimated padding is then OX - IX.
784
785 OX can be safely estimated as
786
787 if (X >= Y)
788 OX = round_up(IX, Y)
789 else
790 OX = round_up(IX, X) + Y - X
791
792 Clearly est(IX) >= real(IX), because that only depends on the
793 instruction lengths, and those being overestimated is a given.
794
795 Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so
796 we needn't worry about that when thinking about OX.
797
798 When X >= Y, the alignment provided by Y adds no uncertainty factor
799 for branch ranges starting before X, so we can just round what we have.
800 But when X < Y, we don't know anything about the, so to speak,
801 `middle bits', so we have to assume the worst when aligning up from an
802 address mod X to one mod Y, which is Y - X. */
803
804#ifndef LABEL_ALIGN
efa3896a 805#define LABEL_ALIGN(LABEL) align_labels_log
fc470718
R
806#endif
807
9e423e6d 808#ifndef LABEL_ALIGN_MAX_SKIP
efa3896a 809#define LABEL_ALIGN_MAX_SKIP (align_labels-1)
9e423e6d
JW
810#endif
811
fc470718 812#ifndef LOOP_ALIGN
efa3896a 813#define LOOP_ALIGN(LABEL) align_loops_log
fc470718
R
814#endif
815
9e423e6d 816#ifndef LOOP_ALIGN_MAX_SKIP
efa3896a 817#define LOOP_ALIGN_MAX_SKIP (align_loops-1)
9e423e6d
JW
818#endif
819
fc470718 820#ifndef LABEL_ALIGN_AFTER_BARRIER
efa3896a 821#define LABEL_ALIGN_AFTER_BARRIER(LABEL) align_jumps_log
fc470718
R
822#endif
823
9e423e6d 824#ifndef LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP
efa3896a 825#define LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP (align_jumps-1)
9e423e6d
JW
826#endif
827
fc470718 828#ifndef ADDR_VEC_ALIGN
ca3075bd 829static int
fc470718
R
830final_addr_vec_align (addr_vec)
831 rtx addr_vec;
832{
833 int align = exact_log2 (GET_MODE_SIZE (GET_MODE (PATTERN (addr_vec))));
834
835 if (align > BIGGEST_ALIGNMENT / BITS_PER_UNIT)
836 align = BIGGEST_ALIGNMENT / BITS_PER_UNIT;
837 return align;
838
839}
840#define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC)
841#endif
842
843#ifndef INSN_LENGTH_ALIGNMENT
844#define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log
845#endif
846
fc470718
R
847#define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)])
848
de7987a6 849static int min_labelno, max_labelno;
fc470718
R
850
851#define LABEL_TO_ALIGNMENT(LABEL) \
9e423e6d
JW
852 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment)
853
854#define LABEL_TO_MAX_SKIP(LABEL) \
855 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip)
fc470718
R
856
857/* For the benefit of port specific code do this also as a function. */
858int
859label_to_alignment (label)
860 rtx label;
861{
862 return LABEL_TO_ALIGNMENT (label);
863}
864
865#ifdef HAVE_ATTR_length
866/* The differences in addresses
867 between a branch and its target might grow or shrink depending on
868 the alignment the start insn of the range (the branch for a forward
869 branch or the label for a backward branch) starts out on; if these
870 differences are used naively, they can even oscillate infinitely.
871 We therefore want to compute a 'worst case' address difference that
872 is independent of the alignment the start insn of the range end
873 up on, and that is at least as large as the actual difference.
874 The function align_fuzz calculates the amount we have to add to the
875 naively computed difference, by traversing the part of the alignment
876 chain of the start insn of the range that is in front of the end insn
877 of the range, and considering for each alignment the maximum amount
878 that it might contribute to a size increase.
879
880 For casesi tables, we also want to know worst case minimum amounts of
881 address difference, in case a machine description wants to introduce
882 some common offset that is added to all offsets in a table.
883 For this purpose, align_fuzz with a growth argument of 0 comuptes the
884 appropriate adjustment. */
885
886
887/* Compute the maximum delta by which the difference of the addresses of
888 START and END might grow / shrink due to a different address for start
889 which changes the size of alignment insns between START and END.
890 KNOWN_ALIGN_LOG is the alignment known for START.
891 GROWTH should be ~0 if the objective is to compute potential code size
892 increase, and 0 if the objective is to compute potential shrink.
893 The return value is undefined for any other value of GROWTH. */
ca3075bd 894static int
687d0ab6 895align_fuzz (start, end, known_align_log, growth)
fc470718
R
896 rtx start, end;
897 int known_align_log;
898 unsigned growth;
899{
900 int uid = INSN_UID (start);
901 rtx align_label;
902 int known_align = 1 << known_align_log;
903 int end_shuid = INSN_SHUID (end);
904 int fuzz = 0;
905
906 for (align_label = uid_align[uid]; align_label; align_label = uid_align[uid])
907 {
908 int align_addr, new_align;
909
910 uid = INSN_UID (align_label);
911 align_addr = insn_addresses[uid] - insn_lengths[uid];
912 if (uid_shuid[uid] > end_shuid)
913 break;
914 known_align_log = LABEL_TO_ALIGNMENT (align_label);
915 new_align = 1 << known_align_log;
916 if (new_align < known_align)
917 continue;
918 fuzz += (-align_addr ^ growth) & (new_align - known_align);
919 known_align = new_align;
920 }
921 return fuzz;
922}
923
924/* Compute a worst-case reference address of a branch so that it
925 can be safely used in the presence of aligned labels. Since the
926 size of the branch itself is unknown, the size of the branch is
927 not included in the range. I.e. for a forward branch, the reference
928 address is the end address of the branch as known from the previous
929 branch shortening pass, minus a value to account for possible size
930 increase due to alignment. For a backward branch, it is the start
931 address of the branch as known from the current pass, plus a value
932 to account for possible size increase due to alignment.
933 NB.: Therefore, the maximum offset allowed for backward branches needs
934 to exclude the branch size. */
935int
936insn_current_reference_address (branch)
937 rtx branch;
938{
939 rtx dest;
940 rtx seq = NEXT_INSN (PREV_INSN (branch));
941 int seq_uid = INSN_UID (seq);
942 if (GET_CODE (branch) != JUMP_INSN)
943 /* This can happen for example on the PA; the objective is to know the
944 offset to address something in front of the start of the function.
945 Thus, we can treat it like a backward branch.
946 We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than
947 any alignment we'd encounter, so we skip the call to align_fuzz. */
948 return insn_current_address;
949 dest = JUMP_LABEL (branch);
33f7f353 950 /* BRANCH has no proper alignment chain set, so use SEQ. */
fc470718
R
951 if (INSN_SHUID (branch) < INSN_SHUID (dest))
952 {
953 /* Forward branch. */
954 return (insn_last_address + insn_lengths[seq_uid]
26024475 955 - align_fuzz (seq, dest, length_unit_log, ~0));
fc470718
R
956 }
957 else
958 {
959 /* Backward branch. */
960 return (insn_current_address
923f7cf9 961 + align_fuzz (dest, seq, length_unit_log, ~0));
fc470718
R
962 }
963}
964#endif /* HAVE_ATTR_length */
965\f
3cf2715d
DE
966/* Make a pass over all insns and compute their actual lengths by shortening
967 any branches of variable length if possible. */
968
969/* Give a default value for the lowest address in a function. */
970
971#ifndef FIRST_INSN_ADDRESS
972#define FIRST_INSN_ADDRESS 0
973#endif
974
fc470718
R
975/* shorten_branches might be called multiple times: for example, the SH
976 port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG.
977 In order to do this, it needs proper length information, which it obtains
978 by calling shorten_branches. This cannot be collapsed with
979 shorten_branches itself into a single pass unless we also want to intergate
980 reorg.c, since the branch splitting exposes new instructions with delay
981 slots. */
982
3cf2715d
DE
983void
984shorten_branches (first)
7bdb32b9 985 rtx first ATTRIBUTE_UNUSED;
3cf2715d 986{
3cf2715d 987 rtx insn;
fc470718
R
988 int max_uid;
989 int i;
fc470718 990 int max_log;
9e423e6d 991 int max_skip;
fc470718
R
992#ifdef HAVE_ATTR_length
993#define MAX_CODE_ALIGN 16
994 rtx seq;
3cf2715d 995 int something_changed = 1;
3cf2715d
DE
996 char *varying_length;
997 rtx body;
998 int uid;
fc470718 999 rtx align_tab[MAX_CODE_ALIGN];
3cf2715d 1000
3d14e82f
JW
1001 /* In order to make sure that all instructions have valid length info,
1002 we must split them before we compute the address/length info. */
1003
1004 for (insn = NEXT_INSN (first); insn; insn = NEXT_INSN (insn))
1005 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
fc470718
R
1006 {
1007 rtx old = insn;
1b4d9ecd
RE
1008 /* Don't split the insn if it has been deleted. */
1009 if (! INSN_DELETED_P (old))
1010 insn = try_split (PATTERN (old), old, 1);
fc470718
R
1011 /* When not optimizing, the old insn will be still left around
1012 with only the 'deleted' bit set. Transform it into a note
1013 to avoid confusion of subsequent processing. */
1014 if (INSN_DELETED_P (old))
1015 {
1016 PUT_CODE (old , NOTE);
1017 NOTE_LINE_NUMBER (old) = NOTE_INSN_DELETED;
1018 NOTE_SOURCE_FILE (old) = 0;
1019 }
1020 }
1021#endif
3d14e82f 1022
fc470718
R
1023 /* We must do some computations even when not actually shortening, in
1024 order to get the alignment information for the labels. */
1025
95707627
R
1026 init_insn_lengths ();
1027
fc470718
R
1028 /* Compute maximum UID and allocate label_align / uid_shuid. */
1029 max_uid = get_max_uid ();
1030
1031 max_labelno = max_label_num ();
1032 min_labelno = get_first_label_num ();
d0f3d9c2 1033 label_align = (struct label_alignment *)
3de90026 1034 xcalloc ((max_labelno - min_labelno + 1), sizeof (struct label_alignment));
fc470718 1035
fc470718
R
1036 uid_shuid = (int *) xmalloc (max_uid * sizeof *uid_shuid);
1037
1038 /* Initialize label_align and set up uid_shuid to be strictly
1039 monotonically rising with insn order. */
e2faec75
R
1040 /* We use max_log here to keep track of the maximum alignment we want to
1041 impose on the next CODE_LABEL (or the current one if we are processing
1042 the CODE_LABEL itself). */
1043
9e423e6d
JW
1044 max_log = 0;
1045 max_skip = 0;
1046
1047 for (insn = get_insns (), i = 1; insn; insn = NEXT_INSN (insn))
fc470718
R
1048 {
1049 int log;
1050
1051 INSN_SHUID (insn) = i++;
1052 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
e2faec75
R
1053 {
1054 /* reorg might make the first insn of a loop being run once only,
1055 and delete the label in front of it. Then we want to apply
1056 the loop alignment to the new label created by reorg, which
1057 is separated by the former loop start insn from the
1058 NOTE_INSN_LOOP_BEG. */
1059 }
fc470718
R
1060 else if (GET_CODE (insn) == CODE_LABEL)
1061 {
1062 rtx next;
1063
1064 log = LABEL_ALIGN (insn);
1065 if (max_log < log)
9e423e6d
JW
1066 {
1067 max_log = log;
1068 max_skip = LABEL_ALIGN_MAX_SKIP;
1069 }
fc470718 1070 next = NEXT_INSN (insn);
75197b37
BS
1071 /* ADDR_VECs only take room if read-only data goes into the text
1072 section. */
1073 if (JUMP_TABLES_IN_TEXT_SECTION
1074#if !defined(READONLY_DATA_SECTION)
1075 || 1
fc470718 1076#endif
75197b37
BS
1077 )
1078 if (next && GET_CODE (next) == JUMP_INSN)
1079 {
1080 rtx nextbody = PATTERN (next);
1081 if (GET_CODE (nextbody) == ADDR_VEC
1082 || GET_CODE (nextbody) == ADDR_DIFF_VEC)
1083 {
1084 log = ADDR_VEC_ALIGN (next);
1085 if (max_log < log)
1086 {
1087 max_log = log;
1088 max_skip = LABEL_ALIGN_MAX_SKIP;
1089 }
1090 }
1091 }
fc470718 1092 LABEL_TO_ALIGNMENT (insn) = max_log;
9e423e6d 1093 LABEL_TO_MAX_SKIP (insn) = max_skip;
fc470718 1094 max_log = 0;
9e423e6d 1095 max_skip = 0;
fc470718
R
1096 }
1097 else if (GET_CODE (insn) == BARRIER)
1098 {
1099 rtx label;
1100
1101 for (label = insn; label && GET_RTX_CLASS (GET_CODE (label)) != 'i';
1102 label = NEXT_INSN (label))
1103 if (GET_CODE (label) == CODE_LABEL)
1104 {
1105 log = LABEL_ALIGN_AFTER_BARRIER (insn);
1106 if (max_log < log)
9e423e6d
JW
1107 {
1108 max_log = log;
1109 max_skip = LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP;
1110 }
fc470718
R
1111 break;
1112 }
1113 }
e2faec75
R
1114 /* Again, we allow NOTE_INSN_LOOP_BEG - INSN - CODE_LABEL
1115 sequences in order to handle reorg output efficiently. */
fc470718
R
1116 else if (GET_CODE (insn) == NOTE
1117 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
1118 {
1119 rtx label;
edd6ede7 1120 int nest = 0;
fc470718 1121
edd6ede7
R
1122 /* Search for the label that starts the loop.
1123 Don't skip past the end of the loop, since that could
1124 lead to putting an alignment where it does not belong.
1125 However, a label after a nested (non-)loop would be OK. */
e2faec75 1126 for (label = insn; label; label = NEXT_INSN (label))
edd6ede7
R
1127 {
1128 if (GET_CODE (label) == NOTE
1129 && NOTE_LINE_NUMBER (label) == NOTE_INSN_LOOP_BEG)
1130 nest++;
1131 else if (GET_CODE (label) == NOTE
1132 && NOTE_LINE_NUMBER (label) == NOTE_INSN_LOOP_END
1133 && --nest == 0)
fc470718 1134 break;
edd6ede7
R
1135 else if (GET_CODE (label) == CODE_LABEL)
1136 {
1137 log = LOOP_ALIGN (insn);
1138 if (max_log < log)
1139 {
1140 max_log = log;
1141 max_skip = LOOP_ALIGN_MAX_SKIP;
1142 }
1143 break;
1144 }
1145 }
fc470718
R
1146 }
1147 else
1148 continue;
1149 }
1150#ifdef HAVE_ATTR_length
1151
1152 /* Allocate the rest of the arrays. */
fc470718 1153 insn_lengths = (short *) xmalloc (max_uid * sizeof (short));
ea3cbda5 1154 insn_lengths_max_uid = max_uid;
af035616
R
1155 /* Syntax errors can lead to labels being outside of the main insn stream.
1156 Initialize insn_addresses, so that we get reproducible results. */
3de90026 1157 insn_addresses = (int *) xcalloc (max_uid, sizeof (int));
fc470718 1158
3de90026 1159 varying_length = (char *) xcalloc (max_uid, sizeof (char));
fc470718
R
1160
1161 /* Initialize uid_align. We scan instructions
1162 from end to start, and keep in align_tab[n] the last seen insn
1163 that does an alignment of at least n+1, i.e. the successor
1164 in the alignment chain for an insn that does / has a known
1165 alignment of n. */
3de90026 1166 uid_align = (rtx *) xcalloc (max_uid, sizeof *uid_align);
fc470718
R
1167
1168 for (i = MAX_CODE_ALIGN; --i >= 0; )
1169 align_tab[i] = NULL_RTX;
1170 seq = get_last_insn ();
33f7f353 1171 for (; seq; seq = PREV_INSN (seq))
fc470718
R
1172 {
1173 int uid = INSN_UID (seq);
1174 int log;
fc470718
R
1175 log = (GET_CODE (seq) == CODE_LABEL ? LABEL_TO_ALIGNMENT (seq) : 0);
1176 uid_align[uid] = align_tab[0];
fc470718
R
1177 if (log)
1178 {
1179 /* Found an alignment label. */
1180 uid_align[uid] = align_tab[log];
1181 for (i = log - 1; i >= 0; i--)
1182 align_tab[i] = seq;
1183 }
33f7f353
JR
1184 }
1185#ifdef CASE_VECTOR_SHORTEN_MODE
1186 if (optimize)
1187 {
1188 /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum
1189 label fields. */
1190
1191 int min_shuid = INSN_SHUID (get_insns ()) - 1;
1192 int max_shuid = INSN_SHUID (get_last_insn ()) + 1;
1193 int rel;
1194
1195 for (insn = first; insn != 0; insn = NEXT_INSN (insn))
fc470718 1196 {
33f7f353
JR
1197 rtx min_lab = NULL_RTX, max_lab = NULL_RTX, pat;
1198 int len, i, min, max, insn_shuid;
1199 int min_align;
1200 addr_diff_vec_flags flags;
1201
1202 if (GET_CODE (insn) != JUMP_INSN
1203 || GET_CODE (PATTERN (insn)) != ADDR_DIFF_VEC)
1204 continue;
1205 pat = PATTERN (insn);
1206 len = XVECLEN (pat, 1);
1207 if (len <= 0)
1208 abort ();
1209 min_align = MAX_CODE_ALIGN;
1210 for (min = max_shuid, max = min_shuid, i = len - 1; i >= 0; i--)
1211 {
1212 rtx lab = XEXP (XVECEXP (pat, 1, i), 0);
1213 int shuid = INSN_SHUID (lab);
1214 if (shuid < min)
1215 {
1216 min = shuid;
1217 min_lab = lab;
1218 }
1219 if (shuid > max)
1220 {
1221 max = shuid;
1222 max_lab = lab;
1223 }
1224 if (min_align > LABEL_TO_ALIGNMENT (lab))
1225 min_align = LABEL_TO_ALIGNMENT (lab);
1226 }
1227 XEXP (pat, 2) = gen_rtx_LABEL_REF (VOIDmode, min_lab);
1228 XEXP (pat, 3) = gen_rtx_LABEL_REF (VOIDmode, max_lab);
1229 insn_shuid = INSN_SHUID (insn);
1230 rel = INSN_SHUID (XEXP (XEXP (pat, 0), 0));
1231 flags.min_align = min_align;
1232 flags.base_after_vec = rel > insn_shuid;
1233 flags.min_after_vec = min > insn_shuid;
1234 flags.max_after_vec = max > insn_shuid;
1235 flags.min_after_base = min > rel;
1236 flags.max_after_base = max > rel;
1237 ADDR_DIFF_VEC_FLAGS (pat) = flags;
fc470718
R
1238 }
1239 }
33f7f353 1240#endif /* CASE_VECTOR_SHORTEN_MODE */
3cf2715d 1241
3cf2715d
DE
1242
1243 /* Compute initial lengths, addresses, and varying flags for each insn. */
1244 for (insn_current_address = FIRST_INSN_ADDRESS, insn = first;
1245 insn != 0;
1246 insn_current_address += insn_lengths[uid], insn = NEXT_INSN (insn))
1247 {
1248 uid = INSN_UID (insn);
fc470718 1249
3cf2715d 1250 insn_lengths[uid] = 0;
fc470718
R
1251
1252 if (GET_CODE (insn) == CODE_LABEL)
1253 {
1254 int log = LABEL_TO_ALIGNMENT (insn);
1255 if (log)
1256 {
1257 int align = 1 << log;
ecb06768 1258 int new_address = (insn_current_address + align - 1) & -align;
fc470718
R
1259 insn_lengths[uid] = new_address - insn_current_address;
1260 insn_current_address = new_address;
1261 }
1262 }
1263
1264 insn_addresses[uid] = insn_current_address;
3cf2715d
DE
1265
1266 if (GET_CODE (insn) == NOTE || GET_CODE (insn) == BARRIER
1267 || GET_CODE (insn) == CODE_LABEL)
1268 continue;
04da53bd
R
1269 if (INSN_DELETED_P (insn))
1270 continue;
3cf2715d
DE
1271
1272 body = PATTERN (insn);
1273 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
5a32a90c
JR
1274 {
1275 /* This only takes room if read-only data goes into the text
1276 section. */
75197b37
BS
1277 if (JUMP_TABLES_IN_TEXT_SECTION
1278#if !defined(READONLY_DATA_SECTION)
1279 || 1
1280#endif
1281 )
1282 insn_lengths[uid] = (XVECLEN (body,
1283 GET_CODE (body) == ADDR_DIFF_VEC)
1284 * GET_MODE_SIZE (GET_MODE (body)));
5a32a90c 1285 /* Alignment is handled by ADDR_VEC_ALIGN. */
5a32a90c 1286 }
a30caf5c 1287 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
3cf2715d
DE
1288 insn_lengths[uid] = asm_insn_count (body) * insn_default_length (insn);
1289 else if (GET_CODE (body) == SEQUENCE)
1290 {
1291 int i;
1292 int const_delay_slots;
1293#ifdef DELAY_SLOTS
1294 const_delay_slots = const_num_delay_slots (XVECEXP (body, 0, 0));
1295#else
1296 const_delay_slots = 0;
1297#endif
1298 /* Inside a delay slot sequence, we do not do any branch shortening
1299 if the shortening could change the number of delay slots
0f41302f 1300 of the branch. */
3cf2715d
DE
1301 for (i = 0; i < XVECLEN (body, 0); i++)
1302 {
1303 rtx inner_insn = XVECEXP (body, 0, i);
1304 int inner_uid = INSN_UID (inner_insn);
1305 int inner_length;
1306
a30caf5c
DC
1307 if (GET_CODE (body) == ASM_INPUT
1308 || asm_noperands (PATTERN (XVECEXP (body, 0, i))) >= 0)
3cf2715d
DE
1309 inner_length = (asm_insn_count (PATTERN (inner_insn))
1310 * insn_default_length (inner_insn));
1311 else
1312 inner_length = insn_default_length (inner_insn);
1313
1314 insn_lengths[inner_uid] = inner_length;
1315 if (const_delay_slots)
1316 {
1317 if ((varying_length[inner_uid]
1318 = insn_variable_length_p (inner_insn)) != 0)
1319 varying_length[uid] = 1;
1320 insn_addresses[inner_uid] = (insn_current_address +
1321 insn_lengths[uid]);
1322 }
1323 else
1324 varying_length[inner_uid] = 0;
1325 insn_lengths[uid] += inner_length;
1326 }
1327 }
1328 else if (GET_CODE (body) != USE && GET_CODE (body) != CLOBBER)
1329 {
1330 insn_lengths[uid] = insn_default_length (insn);
1331 varying_length[uid] = insn_variable_length_p (insn);
1332 }
1333
1334 /* If needed, do any adjustment. */
1335#ifdef ADJUST_INSN_LENGTH
1336 ADJUST_INSN_LENGTH (insn, insn_lengths[uid]);
04b6000c
VM
1337 if (insn_lengths[uid] < 0)
1338 fatal_insn ("Negative insn length", insn);
3cf2715d
DE
1339#endif
1340 }
1341
1342 /* Now loop over all the insns finding varying length insns. For each,
1343 get the current insn length. If it has changed, reflect the change.
1344 When nothing changes for a full pass, we are done. */
1345
1346 while (something_changed)
1347 {
1348 something_changed = 0;
fc470718 1349 insn_current_align = MAX_CODE_ALIGN - 1;
3cf2715d
DE
1350 for (insn_current_address = FIRST_INSN_ADDRESS, insn = first;
1351 insn != 0;
1352 insn = NEXT_INSN (insn))
1353 {
1354 int new_length;
b729186a 1355#ifdef ADJUST_INSN_LENGTH
3cf2715d 1356 int tmp_length;
b729186a 1357#endif
fc470718 1358 int length_align;
3cf2715d
DE
1359
1360 uid = INSN_UID (insn);
fc470718
R
1361
1362 if (GET_CODE (insn) == CODE_LABEL)
1363 {
1364 int log = LABEL_TO_ALIGNMENT (insn);
1365 if (log > insn_current_align)
1366 {
1367 int align = 1 << log;
ecb06768 1368 int new_address= (insn_current_address + align - 1) & -align;
fc470718
R
1369 insn_lengths[uid] = new_address - insn_current_address;
1370 insn_current_align = log;
1371 insn_current_address = new_address;
1372 }
1373 else
1374 insn_lengths[uid] = 0;
1375 insn_addresses[uid] = insn_current_address;
1376 continue;
1377 }
1378
1379 length_align = INSN_LENGTH_ALIGNMENT (insn);
1380 if (length_align < insn_current_align)
1381 insn_current_align = length_align;
1382
1383 insn_last_address = insn_addresses[uid];
3cf2715d 1384 insn_addresses[uid] = insn_current_address;
fc470718 1385
5e75ef4a 1386#ifdef CASE_VECTOR_SHORTEN_MODE
33f7f353
JR
1387 if (optimize && GET_CODE (insn) == JUMP_INSN
1388 && GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC)
1389 {
33f7f353
JR
1390 rtx body = PATTERN (insn);
1391 int old_length = insn_lengths[uid];
1392 rtx rel_lab = XEXP (XEXP (body, 0), 0);
1393 rtx min_lab = XEXP (XEXP (body, 2), 0);
1394 rtx max_lab = XEXP (XEXP (body, 3), 0);
1395 addr_diff_vec_flags flags = ADDR_DIFF_VEC_FLAGS (body);
1396 int rel_addr = insn_addresses[INSN_UID (rel_lab)];
1397 int min_addr = insn_addresses[INSN_UID (min_lab)];
1398 int max_addr = insn_addresses[INSN_UID (max_lab)];
1399 rtx prev;
1400 int rel_align = 0;
1401
1402 /* Try to find a known alignment for rel_lab. */
1403 for (prev = rel_lab;
1404 prev
1405 && ! insn_lengths[INSN_UID (prev)]
1406 && ! (varying_length[INSN_UID (prev)] & 1);
1407 prev = PREV_INSN (prev))
1408 if (varying_length[INSN_UID (prev)] & 2)
1409 {
1410 rel_align = LABEL_TO_ALIGNMENT (prev);
1411 break;
1412 }
1413
1414 /* See the comment on addr_diff_vec_flags in rtl.h for the
1415 meaning of the flags values. base: REL_LAB vec: INSN */
1416 /* Anything after INSN has still addresses from the last
1417 pass; adjust these so that they reflect our current
1418 estimate for this pass. */
1419 if (flags.base_after_vec)
1420 rel_addr += insn_current_address - insn_last_address;
1421 if (flags.min_after_vec)
1422 min_addr += insn_current_address - insn_last_address;
1423 if (flags.max_after_vec)
1424 max_addr += insn_current_address - insn_last_address;
1425 /* We want to know the worst case, i.e. lowest possible value
1426 for the offset of MIN_LAB. If MIN_LAB is after REL_LAB,
1427 its offset is positive, and we have to be wary of code shrink;
1428 otherwise, it is negative, and we have to be vary of code
1429 size increase. */
1430 if (flags.min_after_base)
1431 {
1432 /* If INSN is between REL_LAB and MIN_LAB, the size
1433 changes we are about to make can change the alignment
1434 within the observed offset, therefore we have to break
1435 it up into two parts that are independent. */
1436 if (! flags.base_after_vec && flags.min_after_vec)
1437 {
1438 min_addr -= align_fuzz (rel_lab, insn, rel_align, 0);
1439 min_addr -= align_fuzz (insn, min_lab, 0, 0);
1440 }
1441 else
1442 min_addr -= align_fuzz (rel_lab, min_lab, rel_align, 0);
1443 }
1444 else
1445 {
1446 if (flags.base_after_vec && ! flags.min_after_vec)
1447 {
1448 min_addr -= align_fuzz (min_lab, insn, 0, ~0);
1449 min_addr -= align_fuzz (insn, rel_lab, 0, ~0);
1450 }
1451 else
1452 min_addr -= align_fuzz (min_lab, rel_lab, 0, ~0);
1453 }
1454 /* Likewise, determine the highest lowest possible value
1455 for the offset of MAX_LAB. */
1456 if (flags.max_after_base)
1457 {
1458 if (! flags.base_after_vec && flags.max_after_vec)
1459 {
1460 max_addr += align_fuzz (rel_lab, insn, rel_align, ~0);
1461 max_addr += align_fuzz (insn, max_lab, 0, ~0);
1462 }
1463 else
1464 max_addr += align_fuzz (rel_lab, max_lab, rel_align, ~0);
1465 }
1466 else
1467 {
1468 if (flags.base_after_vec && ! flags.max_after_vec)
1469 {
1470 max_addr += align_fuzz (max_lab, insn, 0, 0);
1471 max_addr += align_fuzz (insn, rel_lab, 0, 0);
1472 }
1473 else
1474 max_addr += align_fuzz (max_lab, rel_lab, 0, 0);
1475 }
1476 PUT_MODE (body, CASE_VECTOR_SHORTEN_MODE (min_addr - rel_addr,
1477 max_addr - rel_addr,
1478 body));
75197b37
BS
1479 if (JUMP_TABLES_IN_TEXT_SECTION
1480#if !defined(READONLY_DATA_SECTION)
1481 || 1
33f7f353 1482#endif
75197b37
BS
1483 )
1484 {
1485 insn_lengths[uid]
1486 = (XVECLEN (body, 1) * GET_MODE_SIZE (GET_MODE (body)));
1487 insn_current_address += insn_lengths[uid];
1488 if (insn_lengths[uid] != old_length)
1489 something_changed = 1;
1490 }
1491
33f7f353 1492 continue;
33f7f353 1493 }
5e75ef4a
JL
1494#endif /* CASE_VECTOR_SHORTEN_MODE */
1495
1496 if (! (varying_length[uid]))
3cf2715d
DE
1497 {
1498 insn_current_address += insn_lengths[uid];
1499 continue;
1500 }
1501 if (GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
1502 {
1503 int i;
1504
1505 body = PATTERN (insn);
1506 new_length = 0;
1507 for (i = 0; i < XVECLEN (body, 0); i++)
1508 {
1509 rtx inner_insn = XVECEXP (body, 0, i);
1510 int inner_uid = INSN_UID (inner_insn);
1511 int inner_length;
1512
1513 insn_addresses[inner_uid] = insn_current_address;
1514
1515 /* insn_current_length returns 0 for insns with a
1516 non-varying length. */
1517 if (! varying_length[inner_uid])
1518 inner_length = insn_lengths[inner_uid];
1519 else
1520 inner_length = insn_current_length (inner_insn);
1521
1522 if (inner_length != insn_lengths[inner_uid])
1523 {
1524 insn_lengths[inner_uid] = inner_length;
1525 something_changed = 1;
1526 }
1527 insn_current_address += insn_lengths[inner_uid];
1528 new_length += inner_length;
1529 }
1530 }
1531 else
1532 {
1533 new_length = insn_current_length (insn);
1534 insn_current_address += new_length;
1535 }
1536
3cf2715d
DE
1537#ifdef ADJUST_INSN_LENGTH
1538 /* If needed, do any adjustment. */
1539 tmp_length = new_length;
1540 ADJUST_INSN_LENGTH (insn, new_length);
1541 insn_current_address += (new_length - tmp_length);
3cf2715d
DE
1542#endif
1543
1544 if (new_length != insn_lengths[uid])
1545 {
1546 insn_lengths[uid] = new_length;
1547 something_changed = 1;
1548 }
1549 }
bb4aaf18
TG
1550 /* For a non-optimizing compile, do only a single pass. */
1551 if (!optimize)
1552 break;
3cf2715d 1553 }
fc470718
R
1554
1555 free (varying_length);
1556
3cf2715d
DE
1557#endif /* HAVE_ATTR_length */
1558}
1559
1560#ifdef HAVE_ATTR_length
1561/* Given the body of an INSN known to be generated by an ASM statement, return
1562 the number of machine instructions likely to be generated for this insn.
1563 This is used to compute its length. */
1564
1565static int
1566asm_insn_count (body)
1567 rtx body;
1568{
1569 char *template;
1570 int count = 1;
1571
5d0930ea
DE
1572 if (GET_CODE (body) == ASM_INPUT)
1573 template = XSTR (body, 0);
1574 else
1575 template = decode_asm_operands (body, NULL_PTR, NULL_PTR,
1576 NULL_PTR, NULL_PTR);
1577
1578 for ( ; *template; template++)
3cf2715d
DE
1579 if (IS_ASM_LOGICAL_LINE_SEPARATOR(*template) || *template == '\n')
1580 count++;
1581
1582 return count;
1583}
1584#endif
1585\f
1586/* Output assembler code for the start of a function,
1587 and initialize some of the variables in this file
1588 for the new function. The label for the function and associated
1589 assembler pseudo-ops have already been output in `assemble_start_function'.
1590
1591 FIRST is the first insn of the rtl for the function being compiled.
1592 FILE is the file to write assembler code to.
1593 OPTIMIZE is nonzero if we should eliminate redundant
1594 test and compare insns. */
1595
1596void
1597final_start_function (first, file, optimize)
1598 rtx first;
1599 FILE *file;
6a651371 1600 int optimize ATTRIBUTE_UNUSED;
3cf2715d
DE
1601{
1602 block_depth = 0;
1603
1604 this_is_asm_operands = 0;
1605
1606#ifdef NON_SAVING_SETJMP
1607 /* A function that calls setjmp should save and restore all the
1608 call-saved registers on a system where longjmp clobbers them. */
1609 if (NON_SAVING_SETJMP && current_function_calls_setjmp)
1610 {
1611 int i;
1612
1613 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
252f342a 1614 if (!call_used_regs[i])
3cf2715d
DE
1615 regs_ever_live[i] = 1;
1616 }
1617#endif
1618
1619 /* Initial line number is supposed to be output
1620 before the function's prologue and label
1621 so that the function's address will not appear to be
1622 in the last statement of the preceding function. */
1623 if (NOTE_LINE_NUMBER (first) != NOTE_INSN_DELETED)
5fad6898
RK
1624 last_linenum = high_block_linenum = high_function_linenum
1625 = NOTE_LINE_NUMBER (first);
eac40081 1626
c5cec899 1627#if defined (DWARF2_UNWIND_INFO) || defined (DWARF2_DEBUGGING_INFO)
d291dd49 1628 /* Output DWARF definition of the function. */
0021b564 1629 if (dwarf2out_do_frame ())
9a666dda 1630 dwarf2out_begin_prologue ();
d291dd49
JM
1631#endif
1632
5fad6898
RK
1633 /* For SDB and XCOFF, the function beginning must be marked between
1634 the function label and the prologue. We always need this, even when
3c734272 1635 -g1 was used. Defer on MIPS systems so that parameter descriptions
0f41302f 1636 follow function entry. */
3c734272 1637#if defined(SDB_DEBUGGING_INFO) && !defined(MIPS_DEBUGGING_INFO)
5fad6898
RK
1638 if (write_symbols == SDB_DEBUG)
1639 sdbout_begin_function (last_linenum);
1640 else
2e2bbce2 1641#endif
3cf2715d 1642#ifdef XCOFF_DEBUGGING_INFO
5fad6898
RK
1643 if (write_symbols == XCOFF_DEBUG)
1644 xcoffout_begin_function (file, last_linenum);
1645 else
3cf2715d 1646#endif
5fad6898
RK
1647 /* But only output line number for other debug info types if -g2
1648 or better. */
1649 if (NOTE_LINE_NUMBER (first) != NOTE_INSN_DELETED)
1650 output_source_line (file, first);
3cf2715d
DE
1651
1652#ifdef LEAF_REG_REMAP
54ff41b7 1653 if (current_function_uses_only_leaf_regs)
3cf2715d
DE
1654 leaf_renumber_regs (first);
1655#endif
1656
1657 /* The Sun386i and perhaps other machines don't work right
1658 if the profiling code comes after the prologue. */
1659#ifdef PROFILE_BEFORE_PROLOGUE
1660 if (profile_flag)
1661 profile_function (file);
1662#endif /* PROFILE_BEFORE_PROLOGUE */
1663
0021b564
JM
1664#if defined (DWARF2_UNWIND_INFO) && defined (HAVE_prologue)
1665 if (dwarf2out_do_frame ())
1666 dwarf2out_frame_debug (NULL_RTX);
1667#endif
1668
3cf2715d
DE
1669#ifdef FUNCTION_PROLOGUE
1670 /* First output the function prologue: code to set up the stack frame. */
1671 FUNCTION_PROLOGUE (file, get_frame_size ());
1672#endif
1673
1674#if defined (SDB_DEBUGGING_INFO) || defined (XCOFF_DEBUGGING_INFO)
1675 if (write_symbols == SDB_DEBUG || write_symbols == XCOFF_DEBUG)
1676 next_block_index = 1;
1677#endif
1678
1679 /* If the machine represents the prologue as RTL, the profiling code must
1680 be emitted when NOTE_INSN_PROLOGUE_END is scanned. */
1681#ifdef HAVE_prologue
1682 if (! HAVE_prologue)
1683#endif
1684 profile_after_prologue (file);
1685
1686 profile_label_no++;
1687
1688 /* If we are doing basic block profiling, remember a printable version
1689 of the function name. */
1690 if (profile_block_flag)
1691 {
db3cf6fb
MS
1692 bb_func_label_num
1693 = add_bb_string ((*decl_printable_name) (current_function_decl, 2), FALSE);
3cf2715d
DE
1694 }
1695}
1696
1697static void
1698profile_after_prologue (file)
7bdb32b9 1699 FILE *file ATTRIBUTE_UNUSED;
3cf2715d
DE
1700{
1701#ifdef FUNCTION_BLOCK_PROFILER
1702 if (profile_block_flag)
1703 {
47431dff 1704 FUNCTION_BLOCK_PROFILER (file, count_basic_blocks);
3cf2715d
DE
1705 }
1706#endif /* FUNCTION_BLOCK_PROFILER */
1707
1708#ifndef PROFILE_BEFORE_PROLOGUE
1709 if (profile_flag)
1710 profile_function (file);
1711#endif /* not PROFILE_BEFORE_PROLOGUE */
1712}
1713
1714static void
1715profile_function (file)
1716 FILE *file;
1717{
9e2f9a7f 1718 int align = MIN (BIGGEST_ALIGNMENT, LONG_TYPE_SIZE);
b729186a
JL
1719#if defined(ASM_OUTPUT_REG_PUSH)
1720#if defined(STRUCT_VALUE_INCOMING_REGNUM) || defined(STRUCT_VALUE_REGNUM)
3cf2715d 1721 int sval = current_function_returns_struct;
b729186a
JL
1722#endif
1723#if defined(STATIC_CHAIN_INCOMING_REGNUM) || defined(STATIC_CHAIN_REGNUM)
3cf2715d 1724 int cxt = current_function_needs_context;
b729186a
JL
1725#endif
1726#endif /* ASM_OUTPUT_REG_PUSH */
3cf2715d
DE
1727
1728 data_section ();
1729 ASM_OUTPUT_ALIGN (file, floor_log2 (align / BITS_PER_UNIT));
1730 ASM_OUTPUT_INTERNAL_LABEL (file, "LP", profile_label_no);
9e2f9a7f 1731 assemble_integer (const0_rtx, LONG_TYPE_SIZE / BITS_PER_UNIT, 1);
3cf2715d 1732
499df339 1733 function_section (current_function_decl);
3cf2715d 1734
65ed39df 1735#if defined(STRUCT_VALUE_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
3cf2715d
DE
1736 if (sval)
1737 ASM_OUTPUT_REG_PUSH (file, STRUCT_VALUE_INCOMING_REGNUM);
1738#else
65ed39df 1739#if defined(STRUCT_VALUE_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
3cf2715d 1740 if (sval)
51723711
KG
1741 {
1742 ASM_OUTPUT_REG_PUSH (file, STRUCT_VALUE_REGNUM);
1743 }
3cf2715d
DE
1744#endif
1745#endif
1746
65ed39df 1747#if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
3cf2715d
DE
1748 if (cxt)
1749 ASM_OUTPUT_REG_PUSH (file, STATIC_CHAIN_INCOMING_REGNUM);
1750#else
65ed39df 1751#if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
3cf2715d 1752 if (cxt)
51723711
KG
1753 {
1754 ASM_OUTPUT_REG_PUSH (file, STATIC_CHAIN_REGNUM);
1755 }
3cf2715d
DE
1756#endif
1757#endif
3cf2715d
DE
1758
1759 FUNCTION_PROFILER (file, profile_label_no);
1760
65ed39df 1761#if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
3cf2715d
DE
1762 if (cxt)
1763 ASM_OUTPUT_REG_POP (file, STATIC_CHAIN_INCOMING_REGNUM);
1764#else
65ed39df 1765#if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
3cf2715d 1766 if (cxt)
51723711
KG
1767 {
1768 ASM_OUTPUT_REG_POP (file, STATIC_CHAIN_REGNUM);
1769 }
3cf2715d
DE
1770#endif
1771#endif
3cf2715d 1772
65ed39df 1773#if defined(STRUCT_VALUE_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
3cf2715d
DE
1774 if (sval)
1775 ASM_OUTPUT_REG_POP (file, STRUCT_VALUE_INCOMING_REGNUM);
1776#else
65ed39df 1777#if defined(STRUCT_VALUE_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
3cf2715d 1778 if (sval)
51723711
KG
1779 {
1780 ASM_OUTPUT_REG_POP (file, STRUCT_VALUE_REGNUM);
1781 }
3cf2715d
DE
1782#endif
1783#endif
1784}
1785
1786/* Output assembler code for the end of a function.
1787 For clarity, args are same as those of `final_start_function'
1788 even though not all of them are needed. */
1789
1790void
1791final_end_function (first, file, optimize)
6a651371 1792 rtx first ATTRIBUTE_UNUSED;
3cf2715d 1793 FILE *file;
6a651371 1794 int optimize ATTRIBUTE_UNUSED;
3cf2715d
DE
1795{
1796 if (app_on)
1797 {
51723711 1798 fputs (ASM_APP_OFF, file);
3cf2715d
DE
1799 app_on = 0;
1800 }
1801
1802#ifdef SDB_DEBUGGING_INFO
1803 if (write_symbols == SDB_DEBUG)
eac40081 1804 sdbout_end_function (high_function_linenum);
3cf2715d
DE
1805#endif
1806
1807#ifdef DWARF_DEBUGGING_INFO
1808 if (write_symbols == DWARF_DEBUG)
1809 dwarfout_end_function ();
1810#endif
1811
1812#ifdef XCOFF_DEBUGGING_INFO
1813 if (write_symbols == XCOFF_DEBUG)
eac40081 1814 xcoffout_end_function (file, high_function_linenum);
3cf2715d
DE
1815#endif
1816
1817#ifdef FUNCTION_EPILOGUE
1818 /* Finally, output the function epilogue:
1819 code to restore the stack frame and return to the caller. */
1820 FUNCTION_EPILOGUE (file, get_frame_size ());
1821#endif
1822
1823#ifdef SDB_DEBUGGING_INFO
1824 if (write_symbols == SDB_DEBUG)
1825 sdbout_end_epilogue ();
1826#endif
1827
1828#ifdef DWARF_DEBUGGING_INFO
1829 if (write_symbols == DWARF_DEBUG)
1830 dwarfout_end_epilogue ();
1831#endif
1832
c5cec899 1833#if defined (DWARF2_UNWIND_INFO) || defined (DWARF2_DEBUGGING_INFO)
0021b564 1834 if (dwarf2out_do_frame ())
9a666dda
JM
1835 dwarf2out_end_epilogue ();
1836#endif
1837
3cf2715d
DE
1838#ifdef XCOFF_DEBUGGING_INFO
1839 if (write_symbols == XCOFF_DEBUG)
1840 xcoffout_end_epilogue (file);
1841#endif
1842
1843 bb_func_label_num = -1; /* not in function, nuke label # */
1844
1845 /* If FUNCTION_EPILOGUE is not defined, then the function body
1846 itself contains return instructions wherever needed. */
1847}
1848\f
1849/* Add a block to the linked list that remembers the current line/file/function
1850 for basic block profiling. Emit the label in front of the basic block and
1851 the instructions that increment the count field. */
1852
1853static void
1854add_bb (file)
1855 FILE *file;
1856{
1857 struct bb_list *ptr = (struct bb_list *) permalloc (sizeof (struct bb_list));
1858
1859 /* Add basic block to linked list. */
1860 ptr->next = 0;
1861 ptr->line_num = last_linenum;
1862 ptr->file_label_num = bb_file_label_num;
1863 ptr->func_label_num = bb_func_label_num;
1864 *bb_tail = ptr;
1865 bb_tail = &ptr->next;
1866
1867 /* Enable the table of basic-block use counts
1868 to point at the code it applies to. */
1869 ASM_OUTPUT_INTERNAL_LABEL (file, "LPB", count_basic_blocks);
1870
1871 /* Before first insn of this basic block, increment the
1872 count of times it was entered. */
1873#ifdef BLOCK_PROFILER
1874 BLOCK_PROFILER (file, count_basic_blocks);
9e2f9a7f
DE
1875#endif
1876#ifdef HAVE_cc0
3cf2715d
DE
1877 CC_STATUS_INIT;
1878#endif
1879
1880 new_block = 0;
1881 count_basic_blocks++;
1882}
1883
1884/* Add a string to be used for basic block profiling. */
1885
1886static int
1887add_bb_string (string, perm_p)
9b3142b3 1888 const char *string;
3cf2715d
DE
1889 int perm_p;
1890{
1891 int len;
1892 struct bb_str *ptr = 0;
1893
1894 if (!string)
1895 {
1896 string = "<unknown>";
1897 perm_p = TRUE;
1898 }
1899
1900 /* Allocate a new string if the current string isn't permanent. If
1901 the string is permanent search for the same string in other
1902 allocations. */
1903
1904 len = strlen (string) + 1;
1905 if (!perm_p)
1906 {
1907 char *p = (char *) permalloc (len);
1908 bcopy (string, p, len);
1909 string = p;
1910 }
1911 else
0f41302f 1912 for (ptr = sbb_head; ptr != (struct bb_str *) 0; ptr = ptr->next)
3cf2715d
DE
1913 if (ptr->string == string)
1914 break;
1915
1916 /* Allocate a new string block if we need to. */
1917 if (!ptr)
1918 {
1919 ptr = (struct bb_str *) permalloc (sizeof (*ptr));
1920 ptr->next = 0;
1921 ptr->length = len;
1922 ptr->label_num = sbb_label_num++;
1923 ptr->string = string;
1924 *sbb_tail = ptr;
1925 sbb_tail = &ptr->next;
1926 }
1927
1928 return ptr->label_num;
1929}
1930
1931\f
1932/* Output assembler code for some insns: all or part of a function.
1933 For description of args, see `final_start_function', above.
1934
1935 PRESCAN is 1 if we are not really outputting,
1936 just scanning as if we were outputting.
1937 Prescanning deletes and rearranges insns just like ordinary output.
1938 PRESCAN is -2 if we are outputting after having prescanned.
1939 In this case, don't try to delete or rearrange insns
1940 because that has already been done.
1941 Prescanning is done only on certain machines. */
1942
1943void
1944final (first, file, optimize, prescan)
1945 rtx first;
1946 FILE *file;
1947 int optimize;
1948 int prescan;
1949{
1950 register rtx insn;
1951 int max_line = 0;
a8c3510c 1952 int max_uid = 0;
3cf2715d
DE
1953
1954 last_ignored_compare = 0;
1955 new_block = 1;
1956
3d195391
MS
1957 check_exception_handler_labels ();
1958
3cf2715d
DE
1959 /* Make a map indicating which line numbers appear in this function.
1960 When producing SDB debugging info, delete troublesome line number
1961 notes from inlined functions in other files as well as duplicate
1962 line number notes. */
1963#ifdef SDB_DEBUGGING_INFO
1964 if (write_symbols == SDB_DEBUG)
1965 {
1966 rtx last = 0;
1967 for (insn = first; insn; insn = NEXT_INSN (insn))
1968 if (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) > 0)
1969 {
1970 if ((RTX_INTEGRATED_P (insn)
1971 && strcmp (NOTE_SOURCE_FILE (insn), main_input_filename) != 0)
1972 || (last != 0
1973 && NOTE_LINE_NUMBER (insn) == NOTE_LINE_NUMBER (last)
1974 && NOTE_SOURCE_FILE (insn) == NOTE_SOURCE_FILE (last)))
1975 {
1976 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
1977 NOTE_SOURCE_FILE (insn) = 0;
1978 continue;
1979 }
1980 last = insn;
1981 if (NOTE_LINE_NUMBER (insn) > max_line)
1982 max_line = NOTE_LINE_NUMBER (insn);
1983 }
1984 }
1985 else
1986#endif
1987 {
1988 for (insn = first; insn; insn = NEXT_INSN (insn))
1989 if (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) > max_line)
1990 max_line = NOTE_LINE_NUMBER (insn);
1991 }
1992
1993 line_note_exists = (char *) oballoc (max_line + 1);
1994 bzero (line_note_exists, max_line + 1);
1995
1996 for (insn = first; insn; insn = NEXT_INSN (insn))
a8c3510c
AM
1997 {
1998 if (INSN_UID (insn) > max_uid) /* find largest UID */
1999 max_uid = INSN_UID (insn);
2000 if (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) > 0)
2001 line_note_exists[NOTE_LINE_NUMBER (insn)] = 1;
9ef4c6ef
JC
2002#ifdef HAVE_cc0
2003 /* If CC tracking across branches is enabled, record the insn which
2004 jumps to each branch only reached from one place. */
7ad7f828 2005 if (optimize && GET_CODE (insn) == JUMP_INSN)
9ef4c6ef
JC
2006 {
2007 rtx lab = JUMP_LABEL (insn);
2008 if (lab && LABEL_NUSES (lab) == 1)
2009 {
2010 LABEL_REFS (lab) = insn;
2011 }
2012 }
2013#endif
a8c3510c
AM
2014 }
2015
2016 /* Initialize insn_eh_region table if eh is being used. */
2017
2018 init_insn_eh_region (first, max_uid);
3cf2715d
DE
2019
2020 init_recog ();
2021
2022 CC_STATUS_INIT;
2023
2024 /* Output the insns. */
2025 for (insn = NEXT_INSN (first); insn;)
2f16edb1
TG
2026 {
2027#ifdef HAVE_ATTR_length
2028 insn_current_address = insn_addresses[INSN_UID (insn)];
2029#endif
2030 insn = final_scan_insn (insn, file, optimize, prescan, 0);
2031 }
3cf2715d
DE
2032
2033 /* Do basic-block profiling here
2034 if the last insn was a conditional branch. */
2035 if (profile_block_flag && new_block)
2036 add_bb (file);
a8c3510c
AM
2037
2038 free_insn_eh_region ();
3cf2715d
DE
2039}
2040\f
4bbf910e
RH
2041const char *
2042get_insn_template (code, insn)
2043 int code;
2044 rtx insn;
2045{
2046 const void *output = insn_data[code].output;
2047 switch (insn_data[code].output_format)
2048 {
2049 case INSN_OUTPUT_FORMAT_SINGLE:
2050 return (const char *) output;
2051 case INSN_OUTPUT_FORMAT_MULTI:
2052 return ((const char * const *) output)[which_alternative];
2053 case INSN_OUTPUT_FORMAT_FUNCTION:
2054 if (insn == NULL)
2055 abort ();
2056 return (* (insn_output_fn) output) (recog_data.operand, insn);
2057
2058 default:
2059 abort ();
2060 }
2061}
3cf2715d
DE
2062/* The final scan for one insn, INSN.
2063 Args are same as in `final', except that INSN
2064 is the insn being scanned.
2065 Value returned is the next insn to be scanned.
2066
2067 NOPEEPHOLES is the flag to disallow peephole processing (currently
2068 used for within delayed branch sequence output). */
2069
2070rtx
2071final_scan_insn (insn, file, optimize, prescan, nopeepholes)
2072 rtx insn;
2073 FILE *file;
272df862 2074 int optimize ATTRIBUTE_UNUSED;
3cf2715d 2075 int prescan;
272df862 2076 int nopeepholes ATTRIBUTE_UNUSED;
3cf2715d 2077{
90ca38bb
MM
2078#ifdef HAVE_cc0
2079 rtx set;
2080#endif
2081
3cf2715d
DE
2082 insn_counter++;
2083
2084 /* Ignore deleted insns. These can occur when we split insns (due to a
2085 template of "#") while not optimizing. */
2086 if (INSN_DELETED_P (insn))
2087 return NEXT_INSN (insn);
2088
2089 switch (GET_CODE (insn))
2090 {
2091 case NOTE:
2092 if (prescan > 0)
2093 break;
2094
2095 /* Align the beginning of a loop, for higher speed
2096 on certain machines. */
2097
fc470718
R
2098 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
2099 break; /* This used to depend on optimize, but that was bogus. */
3cf2715d
DE
2100 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END)
2101 break;
2102
9ad8a5f0
MS
2103 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_EH_REGION_BEG
2104 && ! exceptions_via_longjmp)
3d195391 2105 {
bf43101e 2106 ASM_OUTPUT_INTERNAL_LABEL (file, "LEHB", NOTE_EH_HANDLER (insn));
a1622f83 2107 if (! flag_new_exceptions)
bf43101e 2108 add_eh_table_entry (NOTE_EH_HANDLER (insn));
3d195391 2109#ifdef ASM_OUTPUT_EH_REGION_BEG
bf43101e 2110 ASM_OUTPUT_EH_REGION_BEG (file, NOTE_EH_HANDLER (insn));
3d195391
MS
2111#endif
2112 break;
2113 }
2114
9ad8a5f0
MS
2115 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_EH_REGION_END
2116 && ! exceptions_via_longjmp)
3d195391 2117 {
bf43101e 2118 ASM_OUTPUT_INTERNAL_LABEL (file, "LEHE", NOTE_EH_HANDLER (insn));
a1622f83 2119 if (flag_new_exceptions)
bf43101e 2120 add_eh_table_entry (NOTE_EH_HANDLER (insn));
3d195391 2121#ifdef ASM_OUTPUT_EH_REGION_END
bf43101e 2122 ASM_OUTPUT_EH_REGION_END (file, NOTE_EH_HANDLER (insn));
3d195391
MS
2123#endif
2124 break;
2125 }
2126
3cf2715d
DE
2127 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_PROLOGUE_END)
2128 {
2129#ifdef FUNCTION_END_PROLOGUE
2130 FUNCTION_END_PROLOGUE (file);
2131#endif
2132 profile_after_prologue (file);
2133 break;
2134 }
2135
2136#ifdef FUNCTION_BEGIN_EPILOGUE
2137 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_EPILOGUE_BEG)
2138 {
2139 FUNCTION_BEGIN_EPILOGUE (file);
2140 break;
2141 }
2142#endif
2143
2144 if (write_symbols == NO_DEBUG)
2145 break;
2146 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_FUNCTION_BEG)
2147 {
3c734272
RK
2148#if defined(SDB_DEBUGGING_INFO) && defined(MIPS_DEBUGGING_INFO)
2149 /* MIPS stabs require the parameter descriptions to be after the
0f41302f 2150 function entry point rather than before. */
3c734272
RK
2151 if (write_symbols == SDB_DEBUG)
2152 sdbout_begin_function (last_linenum);
2153 else
2154#endif
3cf2715d 2155#ifdef DWARF_DEBUGGING_INFO
2e2bbce2
RK
2156 /* This outputs a marker where the function body starts, so it
2157 must be after the prologue. */
3cf2715d
DE
2158 if (write_symbols == DWARF_DEBUG)
2159 dwarfout_begin_function ();
2160#endif
2161 break;
2162 }
2163 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_DELETED)
2164 break; /* An insn that was "deleted" */
2165 if (app_on)
2166 {
51723711 2167 fputs (ASM_APP_OFF, file);
3cf2715d
DE
2168 app_on = 0;
2169 }
2170 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_BLOCK_BEG
2171 && (debug_info_level == DINFO_LEVEL_NORMAL
2172 || debug_info_level == DINFO_LEVEL_VERBOSE
3cf2715d 2173 || write_symbols == DWARF_DEBUG
9a666dda 2174 || write_symbols == DWARF2_DEBUG))
3cf2715d
DE
2175 {
2176 /* Beginning of a symbol-block. Assign it a sequence number
2177 and push the number onto the stack PENDING_BLOCKS. */
2178
2179 if (block_depth == max_block_depth)
2180 {
2181 /* PENDING_BLOCKS is full; make it longer. */
2182 max_block_depth *= 2;
2183 pending_blocks
2184 = (int *) xrealloc (pending_blocks,
2185 max_block_depth * sizeof (int));
2186 }
2187 pending_blocks[block_depth++] = next_block_index;
2188
eac40081
RK
2189 high_block_linenum = last_linenum;
2190
3cf2715d
DE
2191 /* Output debugging info about the symbol-block beginning. */
2192
2193#ifdef SDB_DEBUGGING_INFO
2194 if (write_symbols == SDB_DEBUG)
2195 sdbout_begin_block (file, last_linenum, next_block_index);
2196#endif
2197#ifdef XCOFF_DEBUGGING_INFO
2198 if (write_symbols == XCOFF_DEBUG)
2199 xcoffout_begin_block (file, last_linenum, next_block_index);
2200#endif
2201#ifdef DBX_DEBUGGING_INFO
2202 if (write_symbols == DBX_DEBUG)
2203 ASM_OUTPUT_INTERNAL_LABEL (file, "LBB", next_block_index);
2204#endif
2205#ifdef DWARF_DEBUGGING_INFO
7aecea25 2206 if (write_symbols == DWARF_DEBUG)
3cf2715d
DE
2207 dwarfout_begin_block (next_block_index);
2208#endif
9a666dda
JM
2209#ifdef DWARF2_DEBUGGING_INFO
2210 if (write_symbols == DWARF2_DEBUG)
2211 dwarf2out_begin_block (next_block_index);
2212#endif
3cf2715d
DE
2213
2214 next_block_index++;
2215 }
2216 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_BLOCK_END
2217 && (debug_info_level == DINFO_LEVEL_NORMAL
2218 || debug_info_level == DINFO_LEVEL_VERBOSE
3cf2715d 2219 || write_symbols == DWARF_DEBUG
9a666dda 2220 || write_symbols == DWARF2_DEBUG))
3cf2715d
DE
2221 {
2222 /* End of a symbol-block. Pop its sequence number off
2223 PENDING_BLOCKS and output debugging info based on that. */
2224
2225 --block_depth;
df3ba30a
RH
2226 if (block_depth < 0)
2227 abort ();
3cf2715d
DE
2228
2229#ifdef XCOFF_DEBUGGING_INFO
df3ba30a 2230 if (write_symbols == XCOFF_DEBUG)
eac40081
RK
2231 xcoffout_end_block (file, high_block_linenum,
2232 pending_blocks[block_depth]);
3cf2715d
DE
2233#endif
2234#ifdef DBX_DEBUGGING_INFO
df3ba30a 2235 if (write_symbols == DBX_DEBUG)
3cf2715d
DE
2236 ASM_OUTPUT_INTERNAL_LABEL (file, "LBE",
2237 pending_blocks[block_depth]);
2238#endif
2239#ifdef SDB_DEBUGGING_INFO
df3ba30a 2240 if (write_symbols == SDB_DEBUG)
eac40081
RK
2241 sdbout_end_block (file, high_block_linenum,
2242 pending_blocks[block_depth]);
3cf2715d
DE
2243#endif
2244#ifdef DWARF_DEBUGGING_INFO
df3ba30a 2245 if (write_symbols == DWARF_DEBUG)
3cf2715d 2246 dwarfout_end_block (pending_blocks[block_depth]);
9a666dda
JM
2247#endif
2248#ifdef DWARF2_DEBUGGING_INFO
df3ba30a 2249 if (write_symbols == DWARF2_DEBUG)
9a666dda 2250 dwarf2out_end_block (pending_blocks[block_depth]);
3cf2715d
DE
2251#endif
2252 }
2253 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_DELETED_LABEL
2254 && (debug_info_level == DINFO_LEVEL_NORMAL
2255 || debug_info_level == DINFO_LEVEL_VERBOSE))
2256 {
2257#ifdef DWARF_DEBUGGING_INFO
2258 if (write_symbols == DWARF_DEBUG)
2259 dwarfout_label (insn);
9a666dda
JM
2260#endif
2261#ifdef DWARF2_DEBUGGING_INFO
2262 if (write_symbols == DWARF2_DEBUG)
2263 dwarf2out_label (insn);
3cf2715d
DE
2264#endif
2265 }
2266 else if (NOTE_LINE_NUMBER (insn) > 0)
2267 /* This note is a line-number. */
2268 {
2269 register rtx note;
2270
2271#if 0 /* This is what we used to do. */
2272 output_source_line (file, insn);
2273#endif
2274 int note_after = 0;
2275
2276 /* If there is anything real after this note,
2277 output it. If another line note follows, omit this one. */
2278 for (note = NEXT_INSN (insn); note; note = NEXT_INSN (note))
2279 {
2280 if (GET_CODE (note) != NOTE && GET_CODE (note) != CODE_LABEL)
2281 break;
2282 /* These types of notes can be significant
2283 so make sure the preceding line number stays. */
2284 else if (GET_CODE (note) == NOTE
2285 && (NOTE_LINE_NUMBER (note) == NOTE_INSN_BLOCK_BEG
2286 || NOTE_LINE_NUMBER (note) == NOTE_INSN_BLOCK_END
2287 || NOTE_LINE_NUMBER (note) == NOTE_INSN_FUNCTION_BEG))
2288 break;
2289 else if (GET_CODE (note) == NOTE && NOTE_LINE_NUMBER (note) > 0)
2290 {
2291 /* Another line note follows; we can delete this note
2292 if no intervening line numbers have notes elsewhere. */
2293 int num;
2294 for (num = NOTE_LINE_NUMBER (insn) + 1;
2295 num < NOTE_LINE_NUMBER (note);
2296 num++)
2297 if (line_note_exists[num])
2298 break;
2299
2300 if (num >= NOTE_LINE_NUMBER (note))
2301 note_after = 1;
2302 break;
2303 }
2304 }
2305
2306 /* Output this line note
2307 if it is the first or the last line note in a row. */
2308 if (!note_after)
2309 output_source_line (file, insn);
2310 }
2311 break;
2312
2313 case BARRIER:
6020d360
JM
2314#if defined (DWARF2_UNWIND_INFO) && !defined (ACCUMULATE_OUTGOING_ARGS)
2315 /* If we push arguments, we need to check all insns for stack
2316 adjustments. */
2317 if (dwarf2out_do_frame ())
2318 dwarf2out_frame_debug (insn);
3cf2715d
DE
2319#endif
2320 break;
2321
2322 case CODE_LABEL:
1dd8faa8
R
2323 /* The target port might emit labels in the output function for
2324 some insn, e.g. sh.c output_branchy_insn. */
de7987a6
R
2325 if (CODE_LABEL_NUMBER (insn) <= max_labelno)
2326 {
2327 int align = LABEL_TO_ALIGNMENT (insn);
50b2596f 2328#ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
9e423e6d 2329 int max_skip = LABEL_TO_MAX_SKIP (insn);
50b2596f 2330#endif
fc470718 2331
1dd8faa8 2332 if (align && NEXT_INSN (insn))
9e423e6d
JW
2333#ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
2334 ASM_OUTPUT_MAX_SKIP_ALIGN (file, align, max_skip);
2335#else
de7987a6 2336 ASM_OUTPUT_ALIGN (file, align);
9e423e6d 2337#endif
de7987a6 2338 }
9ef4c6ef 2339#ifdef HAVE_cc0
3cf2715d 2340 CC_STATUS_INIT;
9ef4c6ef
JC
2341 /* If this label is reached from only one place, set the condition
2342 codes from the instruction just before the branch. */
7ad7f828
JC
2343
2344 /* Disabled because some insns set cc_status in the C output code
2345 and NOTICE_UPDATE_CC alone can set incorrect status. */
2346 if (0 /* optimize && LABEL_NUSES (insn) == 1*/)
9ef4c6ef
JC
2347 {
2348 rtx jump = LABEL_REFS (insn);
2349 rtx barrier = prev_nonnote_insn (insn);
2350 rtx prev;
2351 /* If the LABEL_REFS field of this label has been set to point
2352 at a branch, the predecessor of the branch is a regular
2353 insn, and that branch is the only way to reach this label,
2354 set the condition codes based on the branch and its
2355 predecessor. */
2356 if (barrier && GET_CODE (barrier) == BARRIER
2357 && jump && GET_CODE (jump) == JUMP_INSN
2358 && (prev = prev_nonnote_insn (jump))
2359 && GET_CODE (prev) == INSN)
2360 {
2361 NOTICE_UPDATE_CC (PATTERN (prev), prev);
2362 NOTICE_UPDATE_CC (PATTERN (jump), jump);
2363 }
2364 }
2365#endif
3cf2715d
DE
2366 if (prescan > 0)
2367 break;
2368 new_block = 1;
03ffa171
RK
2369
2370#ifdef FINAL_PRESCAN_LABEL
2371 FINAL_PRESCAN_INSN (insn, NULL_PTR, 0);
2372#endif
2373
3cf2715d
DE
2374#ifdef SDB_DEBUGGING_INFO
2375 if (write_symbols == SDB_DEBUG && LABEL_NAME (insn))
2376 sdbout_label (insn);
2377#endif
2378#ifdef DWARF_DEBUGGING_INFO
2379 if (write_symbols == DWARF_DEBUG && LABEL_NAME (insn))
2380 dwarfout_label (insn);
9a666dda
JM
2381#endif
2382#ifdef DWARF2_DEBUGGING_INFO
2383 if (write_symbols == DWARF2_DEBUG && LABEL_NAME (insn))
2384 dwarf2out_label (insn);
3cf2715d
DE
2385#endif
2386 if (app_on)
2387 {
51723711 2388 fputs (ASM_APP_OFF, file);
3cf2715d
DE
2389 app_on = 0;
2390 }
2391 if (NEXT_INSN (insn) != 0
2392 && GET_CODE (NEXT_INSN (insn)) == JUMP_INSN)
2393 {
2394 rtx nextbody = PATTERN (NEXT_INSN (insn));
2395
2396 /* If this label is followed by a jump-table,
2397 make sure we put the label in the read-only section. Also
2398 possibly write the label and jump table together. */
2399
2400 if (GET_CODE (nextbody) == ADDR_VEC
2401 || GET_CODE (nextbody) == ADDR_DIFF_VEC)
2402 {
e0d80184
DM
2403#if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2404 /* In this case, the case vector is being moved by the
2405 target, so don't output the label at all. Leave that
2406 to the back end macros. */
2407#else
75197b37
BS
2408 if (! JUMP_TABLES_IN_TEXT_SECTION)
2409 {
2410 readonly_data_section ();
3cf2715d 2411#ifdef READONLY_DATA_SECTION
75197b37
BS
2412 ASM_OUTPUT_ALIGN (file,
2413 exact_log2 (BIGGEST_ALIGNMENT
2414 / BITS_PER_UNIT));
3cf2715d 2415#endif /* READONLY_DATA_SECTION */
75197b37
BS
2416 }
2417 else
2418 function_section (current_function_decl);
2419
3cf2715d
DE
2420#ifdef ASM_OUTPUT_CASE_LABEL
2421 ASM_OUTPUT_CASE_LABEL (file, "L", CODE_LABEL_NUMBER (insn),
2422 NEXT_INSN (insn));
2423#else
8cd0faaf
CM
2424 if (LABEL_ALTERNATE_NAME (insn))
2425 ASM_OUTPUT_ALTERNATE_LABEL_NAME (file, insn);
2426 else
2427 ASM_OUTPUT_INTERNAL_LABEL (file, "L", CODE_LABEL_NUMBER (insn));
e0d80184 2428#endif
3cf2715d
DE
2429#endif
2430 break;
2431 }
2432 }
8cd0faaf
CM
2433 if (LABEL_ALTERNATE_NAME (insn))
2434 ASM_OUTPUT_ALTERNATE_LABEL_NAME (file, insn);
2435 else
2436 ASM_OUTPUT_INTERNAL_LABEL (file, "L", CODE_LABEL_NUMBER (insn));
3cf2715d
DE
2437 break;
2438
2439 default:
2440 {
51723711 2441 register rtx body = PATTERN (insn);
3cf2715d 2442 int insn_code_number;
9b3142b3 2443 const char *template;
b729186a 2444#ifdef HAVE_cc0
3cf2715d 2445 rtx note;
b729186a 2446#endif
3cf2715d
DE
2447
2448 /* An INSN, JUMP_INSN or CALL_INSN.
2449 First check for special kinds that recog doesn't recognize. */
2450
2451 if (GET_CODE (body) == USE /* These are just declarations */
2452 || GET_CODE (body) == CLOBBER)
2453 break;
2454
2455#ifdef HAVE_cc0
2456 /* If there is a REG_CC_SETTER note on this insn, it means that
2457 the setting of the condition code was done in the delay slot
2458 of the insn that branched here. So recover the cc status
2459 from the insn that set it. */
2460
2461 note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2462 if (note)
2463 {
2464 NOTICE_UPDATE_CC (PATTERN (XEXP (note, 0)), XEXP (note, 0));
2465 cc_prev_status = cc_status;
2466 }
2467#endif
2468
2469 /* Detect insns that are really jump-tables
2470 and output them as such. */
2471
2472 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
2473 {
7f7f8214 2474#if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC))
3cf2715d 2475 register int vlen, idx;
7f7f8214 2476#endif
3cf2715d
DE
2477
2478 if (prescan > 0)
2479 break;
2480
2481 if (app_on)
2482 {
51723711 2483 fputs (ASM_APP_OFF, file);
3cf2715d
DE
2484 app_on = 0;
2485 }
2486
e0d80184
DM
2487#if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2488 if (GET_CODE (body) == ADDR_VEC)
2489 {
2490#ifdef ASM_OUTPUT_ADDR_VEC
2491 ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn), body);
2492#else
2493 abort();
2494#endif
2495 }
2496 else
2497 {
2498#ifdef ASM_OUTPUT_ADDR_DIFF_VEC
2499 ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn), body);
2500#else
2501 abort();
2502#endif
2503 }
2504#else
3cf2715d
DE
2505 vlen = XVECLEN (body, GET_CODE (body) == ADDR_DIFF_VEC);
2506 for (idx = 0; idx < vlen; idx++)
2507 {
2508 if (GET_CODE (body) == ADDR_VEC)
2509 {
2510#ifdef ASM_OUTPUT_ADDR_VEC_ELT
2511 ASM_OUTPUT_ADDR_VEC_ELT
2512 (file, CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 0, idx), 0)));
2513#else
2514 abort ();
2515#endif
2516 }
2517 else
2518 {
2519#ifdef ASM_OUTPUT_ADDR_DIFF_ELT
2520 ASM_OUTPUT_ADDR_DIFF_ELT
2521 (file,
33f7f353 2522 body,
3cf2715d
DE
2523 CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 1, idx), 0)),
2524 CODE_LABEL_NUMBER (XEXP (XEXP (body, 0), 0)));
2525#else
2526 abort ();
2527#endif
2528 }
2529 }
2530#ifdef ASM_OUTPUT_CASE_END
2531 ASM_OUTPUT_CASE_END (file,
2532 CODE_LABEL_NUMBER (PREV_INSN (insn)),
2533 insn);
e0d80184 2534#endif
3cf2715d
DE
2535#endif
2536
4d1065ed 2537 function_section (current_function_decl);
3cf2715d
DE
2538
2539 break;
2540 }
2541
2542 /* Do basic-block profiling when we reach a new block.
2543 Done here to avoid jump tables. */
2544 if (profile_block_flag && new_block)
2545 add_bb (file);
2546
2547 if (GET_CODE (body) == ASM_INPUT)
2548 {
2549 /* There's no telling what that did to the condition codes. */
2550 CC_STATUS_INIT;
2551 if (prescan > 0)
2552 break;
2553 if (! app_on)
2554 {
51723711 2555 fputs (ASM_APP_ON, file);
3cf2715d
DE
2556 app_on = 1;
2557 }
2558 fprintf (asm_out_file, "\t%s\n", XSTR (body, 0));
2559 break;
2560 }
2561
2562 /* Detect `asm' construct with operands. */
2563 if (asm_noperands (body) >= 0)
2564 {
22bf4422 2565 unsigned int noperands = asm_noperands (body);
3cf2715d
DE
2566 rtx *ops = (rtx *) alloca (noperands * sizeof (rtx));
2567 char *string;
2568
2569 /* There's no telling what that did to the condition codes. */
2570 CC_STATUS_INIT;
2571 if (prescan > 0)
2572 break;
2573
2574 if (! app_on)
2575 {
51723711 2576 fputs (ASM_APP_ON, file);
3cf2715d
DE
2577 app_on = 1;
2578 }
2579
2580 /* Get out the operand values. */
2581 string = decode_asm_operands (body, ops, NULL_PTR,
2582 NULL_PTR, NULL_PTR);
2583 /* Inhibit aborts on what would otherwise be compiler bugs. */
2584 insn_noperands = noperands;
2585 this_is_asm_operands = insn;
2586
2587 /* Output the insn using them. */
2588 output_asm_insn (string, ops);
2589 this_is_asm_operands = 0;
2590 break;
2591 }
2592
2593 if (prescan <= 0 && app_on)
2594 {
51723711 2595 fputs (ASM_APP_OFF, file);
3cf2715d
DE
2596 app_on = 0;
2597 }
2598
2599 if (GET_CODE (body) == SEQUENCE)
2600 {
2601 /* A delayed-branch sequence */
2602 register int i;
2603 rtx next;
2604
2605 if (prescan > 0)
2606 break;
2607 final_sequence = body;
2608
2609 /* The first insn in this SEQUENCE might be a JUMP_INSN that will
2610 force the restoration of a comparison that was previously
2611 thought unnecessary. If that happens, cancel this sequence
2612 and cause that insn to be restored. */
2613
2614 next = final_scan_insn (XVECEXP (body, 0, 0), file, 0, prescan, 1);
2615 if (next != XVECEXP (body, 0, 1))
2616 {
2617 final_sequence = 0;
2618 return next;
2619 }
2620
2621 for (i = 1; i < XVECLEN (body, 0); i++)
c7eee2df
RK
2622 {
2623 rtx insn = XVECEXP (body, 0, i);
2624 rtx next = NEXT_INSN (insn);
2625 /* We loop in case any instruction in a delay slot gets
2626 split. */
2627 do
2628 insn = final_scan_insn (insn, file, 0, prescan, 1);
2629 while (insn != next);
2630 }
3cf2715d
DE
2631#ifdef DBR_OUTPUT_SEQEND
2632 DBR_OUTPUT_SEQEND (file);
2633#endif
2634 final_sequence = 0;
2635
2636 /* If the insn requiring the delay slot was a CALL_INSN, the
2637 insns in the delay slot are actually executed before the
2638 called function. Hence we don't preserve any CC-setting
2639 actions in these insns and the CC must be marked as being
2640 clobbered by the function. */
2641 if (GET_CODE (XVECEXP (body, 0, 0)) == CALL_INSN)
b729186a
JL
2642 {
2643 CC_STATUS_INIT;
2644 }
3cf2715d
DE
2645
2646 /* Following a conditional branch sequence, we have a new basic
2647 block. */
2648 if (profile_block_flag)
2649 {
2650 rtx insn = XVECEXP (body, 0, 0);
2651 rtx body = PATTERN (insn);
2652
2653 if ((GET_CODE (insn) == JUMP_INSN && GET_CODE (body) == SET
2654 && GET_CODE (SET_SRC (body)) != LABEL_REF)
2655 || (GET_CODE (insn) == JUMP_INSN
2656 && GET_CODE (body) == PARALLEL
2657 && GET_CODE (XVECEXP (body, 0, 0)) == SET
2658 && GET_CODE (SET_SRC (XVECEXP (body, 0, 0))) != LABEL_REF))
2659 new_block = 1;
2660 }
2661 break;
2662 }
2663
2664 /* We have a real machine instruction as rtl. */
2665
2666 body = PATTERN (insn);
2667
2668#ifdef HAVE_cc0
b88c92cc
RK
2669 set = single_set(insn);
2670
3cf2715d
DE
2671 /* Check for redundant test and compare instructions
2672 (when the condition codes are already set up as desired).
2673 This is done only when optimizing; if not optimizing,
2674 it should be possible for the user to alter a variable
2675 with the debugger in between statements
2676 and the next statement should reexamine the variable
2677 to compute the condition codes. */
2678
30f5e9f5 2679 if (optimize)
3cf2715d 2680 {
b88c92cc 2681#if 0
30f5e9f5 2682 rtx set = single_set(insn);
b88c92cc 2683#endif
30f5e9f5
RK
2684
2685 if (set
2686 && GET_CODE (SET_DEST (set)) == CC0
2687 && insn != last_ignored_compare)
3cf2715d 2688 {
30f5e9f5
RK
2689 if (GET_CODE (SET_SRC (set)) == SUBREG)
2690 SET_SRC (set) = alter_subreg (SET_SRC (set));
2691 else if (GET_CODE (SET_SRC (set)) == COMPARE)
2692 {
2693 if (GET_CODE (XEXP (SET_SRC (set), 0)) == SUBREG)
2694 XEXP (SET_SRC (set), 0)
2695 = alter_subreg (XEXP (SET_SRC (set), 0));
2696 if (GET_CODE (XEXP (SET_SRC (set), 1)) == SUBREG)
2697 XEXP (SET_SRC (set), 1)
2698 = alter_subreg (XEXP (SET_SRC (set), 1));
2699 }
2700 if ((cc_status.value1 != 0
2701 && rtx_equal_p (SET_SRC (set), cc_status.value1))
2702 || (cc_status.value2 != 0
2703 && rtx_equal_p (SET_SRC (set), cc_status.value2)))
3cf2715d 2704 {
30f5e9f5
RK
2705 /* Don't delete insn if it has an addressing side-effect. */
2706 if (! FIND_REG_INC_NOTE (insn, 0)
2707 /* or if anything in it is volatile. */
2708 && ! volatile_refs_p (PATTERN (insn)))
2709 {
2710 /* We don't really delete the insn; just ignore it. */
2711 last_ignored_compare = insn;
2712 break;
2713 }
3cf2715d
DE
2714 }
2715 }
2716 }
2717#endif
2718
2719 /* Following a conditional branch, we have a new basic block.
2720 But if we are inside a sequence, the new block starts after the
2721 last insn of the sequence. */
2722 if (profile_block_flag && final_sequence == 0
2723 && ((GET_CODE (insn) == JUMP_INSN && GET_CODE (body) == SET
2724 && GET_CODE (SET_SRC (body)) != LABEL_REF)
2725 || (GET_CODE (insn) == JUMP_INSN && GET_CODE (body) == PARALLEL
2726 && GET_CODE (XVECEXP (body, 0, 0)) == SET
2727 && GET_CODE (SET_SRC (XVECEXP (body, 0, 0))) != LABEL_REF)))
2728 new_block = 1;
2729
2730#ifndef STACK_REGS
2731 /* Don't bother outputting obvious no-ops, even without -O.
2732 This optimization is fast and doesn't interfere with debugging.
2733 Don't do this if the insn is in a delay slot, since this
2734 will cause an improper number of delay insns to be written. */
2735 if (final_sequence == 0
2736 && prescan >= 0
2737 && GET_CODE (insn) == INSN && GET_CODE (body) == SET
2738 && GET_CODE (SET_SRC (body)) == REG
2739 && GET_CODE (SET_DEST (body)) == REG
2740 && REGNO (SET_SRC (body)) == REGNO (SET_DEST (body)))
2741 break;
2742#endif
2743
2744#ifdef HAVE_cc0
2745 /* If this is a conditional branch, maybe modify it
2746 if the cc's are in a nonstandard state
2747 so that it accomplishes the same thing that it would
2748 do straightforwardly if the cc's were set up normally. */
2749
2750 if (cc_status.flags != 0
2751 && GET_CODE (insn) == JUMP_INSN
2752 && GET_CODE (body) == SET
2753 && SET_DEST (body) == pc_rtx
2754 && GET_CODE (SET_SRC (body)) == IF_THEN_ELSE
de2b56f9 2755 && GET_RTX_CLASS (GET_CODE (XEXP (SET_SRC (body), 0))) == '<'
fff752ad 2756 && XEXP (XEXP (SET_SRC (body), 0), 0) == cc0_rtx
3cf2715d
DE
2757 /* This is done during prescan; it is not done again
2758 in final scan when prescan has been done. */
2759 && prescan >= 0)
2760 {
2761 /* This function may alter the contents of its argument
2762 and clear some of the cc_status.flags bits.
2763 It may also return 1 meaning condition now always true
2764 or -1 meaning condition now always false
2765 or 2 meaning condition nontrivial but altered. */
2766 register int result = alter_cond (XEXP (SET_SRC (body), 0));
2767 /* If condition now has fixed value, replace the IF_THEN_ELSE
2768 with its then-operand or its else-operand. */
2769 if (result == 1)
2770 SET_SRC (body) = XEXP (SET_SRC (body), 1);
2771 if (result == -1)
2772 SET_SRC (body) = XEXP (SET_SRC (body), 2);
2773
2774 /* The jump is now either unconditional or a no-op.
2775 If it has become a no-op, don't try to output it.
2776 (It would not be recognized.) */
2777 if (SET_SRC (body) == pc_rtx)
2778 {
2779 PUT_CODE (insn, NOTE);
2780 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
2781 NOTE_SOURCE_FILE (insn) = 0;
2782 break;
2783 }
2784 else if (GET_CODE (SET_SRC (body)) == RETURN)
2785 /* Replace (set (pc) (return)) with (return). */
2786 PATTERN (insn) = body = SET_SRC (body);
2787
2788 /* Rerecognize the instruction if it has changed. */
2789 if (result != 0)
2790 INSN_CODE (insn) = -1;
2791 }
2792
2793 /* Make same adjustments to instructions that examine the
462da2af
SC
2794 condition codes without jumping and instructions that
2795 handle conditional moves (if this machine has either one). */
3cf2715d
DE
2796
2797 if (cc_status.flags != 0
b88c92cc 2798 && set != 0)
3cf2715d 2799 {
462da2af
SC
2800 rtx cond_rtx, then_rtx, else_rtx;
2801
2802 if (GET_CODE (insn) != JUMP_INSN
b88c92cc 2803 && GET_CODE (SET_SRC (set)) == IF_THEN_ELSE)
462da2af 2804 {
b88c92cc
RK
2805 cond_rtx = XEXP (SET_SRC (set), 0);
2806 then_rtx = XEXP (SET_SRC (set), 1);
2807 else_rtx = XEXP (SET_SRC (set), 2);
462da2af
SC
2808 }
2809 else
2810 {
b88c92cc 2811 cond_rtx = SET_SRC (set);
462da2af
SC
2812 then_rtx = const_true_rtx;
2813 else_rtx = const0_rtx;
2814 }
2815
2816 switch (GET_CODE (cond_rtx))
3cf2715d
DE
2817 {
2818 case GTU:
2819 case GT:
2820 case LTU:
2821 case LT:
2822 case GEU:
2823 case GE:
2824 case LEU:
2825 case LE:
2826 case EQ:
2827 case NE:
2828 {
2829 register int result;
462da2af 2830 if (XEXP (cond_rtx, 0) != cc0_rtx)
3cf2715d 2831 break;
462da2af 2832 result = alter_cond (cond_rtx);
3cf2715d 2833 if (result == 1)
b88c92cc 2834 validate_change (insn, &SET_SRC (set), then_rtx, 0);
3cf2715d 2835 else if (result == -1)
b88c92cc 2836 validate_change (insn, &SET_SRC (set), else_rtx, 0);
3cf2715d
DE
2837 else if (result == 2)
2838 INSN_CODE (insn) = -1;
b88c92cc 2839 if (SET_DEST (set) == SET_SRC (set))
462da2af
SC
2840 {
2841 PUT_CODE (insn, NOTE);
2842 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
2843 NOTE_SOURCE_FILE (insn) = 0;
462da2af 2844 }
3cf2715d 2845 }
e9a25f70
JL
2846 break;
2847
2848 default:
2849 break;
3cf2715d
DE
2850 }
2851 }
462da2af 2852
3cf2715d
DE
2853#endif
2854
ede7cd44 2855#ifdef HAVE_peephole
3cf2715d
DE
2856 /* Do machine-specific peephole optimizations if desired. */
2857
2858 if (optimize && !flag_no_peephole && !nopeepholes)
2859 {
2860 rtx next = peephole (insn);
2861 /* When peepholing, if there were notes within the peephole,
2862 emit them before the peephole. */
2863 if (next != 0 && next != NEXT_INSN (insn))
2864 {
2865 rtx prev = PREV_INSN (insn);
2866 rtx note;
2867
2868 for (note = NEXT_INSN (insn); note != next;
2869 note = NEXT_INSN (note))
2870 final_scan_insn (note, file, optimize, prescan, nopeepholes);
2871
2872 /* In case this is prescan, put the notes
2873 in proper position for later rescan. */
2874 note = NEXT_INSN (insn);
2875 PREV_INSN (note) = prev;
2876 NEXT_INSN (prev) = note;
2877 NEXT_INSN (PREV_INSN (next)) = insn;
2878 PREV_INSN (insn) = PREV_INSN (next);
2879 NEXT_INSN (insn) = next;
2880 PREV_INSN (next) = insn;
2881 }
2882
2883 /* PEEPHOLE might have changed this. */
2884 body = PATTERN (insn);
2885 }
ede7cd44 2886#endif
3cf2715d
DE
2887
2888 /* Try to recognize the instruction.
2889 If successful, verify that the operands satisfy the
2890 constraints for the instruction. Crash if they don't,
2891 since `reload' should have changed them so that they do. */
2892
2893 insn_code_number = recog_memoized (insn);
0eadeb15 2894 extract_insn (insn);
0304f787 2895 cleanup_subreg_operands (insn);
3cf2715d 2896
0eadeb15 2897 if (! constrain_operands (1))
3cf2715d 2898 fatal_insn_not_found (insn);
3cf2715d
DE
2899
2900 /* Some target machines need to prescan each insn before
2901 it is output. */
2902
2903#ifdef FINAL_PRESCAN_INSN
1ccbefce 2904 FINAL_PRESCAN_INSN (insn, recog_data.operand, recog_data.n_operands);
3cf2715d
DE
2905#endif
2906
2907#ifdef HAVE_cc0
2908 cc_prev_status = cc_status;
2909
2910 /* Update `cc_status' for this instruction.
2911 The instruction's output routine may change it further.
2912 If the output routine for a jump insn needs to depend
2913 on the cc status, it should look at cc_prev_status. */
2914
2915 NOTICE_UPDATE_CC (body, insn);
2916#endif
2917
2918 debug_insn = insn;
2919
b57d9225
JM
2920#if defined (DWARF2_UNWIND_INFO) && !defined (ACCUMULATE_OUTGOING_ARGS)
2921 /* If we push arguments, we want to know where the calls are. */
2922 if (GET_CODE (insn) == CALL_INSN && dwarf2out_do_frame ())
2923 dwarf2out_frame_debug (insn);
2924#endif
2925
4bbf910e
RH
2926 /* Find the proper template for this insn. */
2927 template = get_insn_template (insn_code_number, insn);
3cf2715d 2928
4bbf910e
RH
2929 /* If the C code returns 0, it means that it is a jump insn
2930 which follows a deleted test insn, and that test insn
2931 needs to be reinserted. */
3cf2715d
DE
2932 if (template == 0)
2933 {
4bbf910e
RH
2934 if (prev_nonnote_insn (insn) != last_ignored_compare)
2935 abort ();
2936 new_block = 0;
2937 return prev_nonnote_insn (insn);
3cf2715d
DE
2938 }
2939
2940 /* If the template is the string "#", it means that this insn must
2941 be split. */
2942 if (template[0] == '#' && template[1] == '\0')
2943 {
2944 rtx new = try_split (body, insn, 0);
2945
2946 /* If we didn't split the insn, go away. */
2947 if (new == insn && PATTERN (new) == body)
cf879efa 2948 fatal_insn ("Could not split insn", insn);
3cf2715d 2949
3d14e82f
JW
2950#ifdef HAVE_ATTR_length
2951 /* This instruction should have been split in shorten_branches,
2952 to ensure that we would have valid length info for the
2953 splitees. */
2954 abort ();
2955#endif
2956
3cf2715d
DE
2957 new_block = 0;
2958 return new;
2959 }
2960
2961 if (prescan > 0)
2962 break;
2963
2964 /* Output assembler code from the template. */
2965
1ccbefce 2966 output_asm_insn (template, recog_data.operand);
3cf2715d 2967
0021b564
JM
2968#if defined (DWARF2_UNWIND_INFO)
2969#if !defined (ACCUMULATE_OUTGOING_ARGS)
2970 /* If we push arguments, we need to check all insns for stack
2971 adjustments. */
b57d9225 2972 if (GET_CODE (insn) == INSN && dwarf2out_do_frame ())
0021b564
JM
2973 dwarf2out_frame_debug (insn);
2974#else
2975#if defined (HAVE_prologue)
469ac993
JM
2976 /* If this insn is part of the prologue, emit DWARF v2
2977 call frame info. */
0021b564 2978 if (RTX_FRAME_RELATED_P (insn) && dwarf2out_do_frame ())
469ac993
JM
2979 dwarf2out_frame_debug (insn);
2980#endif
0021b564
JM
2981#endif
2982#endif
469ac993 2983
3cf2715d
DE
2984#if 0
2985 /* It's not at all clear why we did this and doing so interferes
2986 with tests we'd like to do to use REG_WAS_0 notes, so let's try
2987 with this out. */
2988
2989 /* Mark this insn as having been output. */
2990 INSN_DELETED_P (insn) = 1;
2991#endif
2992
2993 debug_insn = 0;
2994 }
2995 }
2996 return NEXT_INSN (insn);
2997}
2998\f
2999/* Output debugging info to the assembler file FILE
3000 based on the NOTE-insn INSN, assumed to be a line number. */
3001
3002static void
3003output_source_line (file, insn)
6a651371 3004 FILE *file ATTRIBUTE_UNUSED;
3cf2715d
DE
3005 rtx insn;
3006{
3007 register char *filename = NOTE_SOURCE_FILE (insn);
3008
3009 /* Remember filename for basic block profiling.
3010 Filenames are allocated on the permanent obstack
3011 or are passed in ARGV, so we don't have to save
3012 the string. */
3013
3014 if (profile_block_flag && last_filename != filename)
3015 bb_file_label_num = add_bb_string (filename, TRUE);
3016
3017 last_filename = filename;
3018 last_linenum = NOTE_LINE_NUMBER (insn);
eac40081
RK
3019 high_block_linenum = MAX (last_linenum, high_block_linenum);
3020 high_function_linenum = MAX (last_linenum, high_function_linenum);
3cf2715d
DE
3021
3022 if (write_symbols != NO_DEBUG)
3023 {
3024#ifdef SDB_DEBUGGING_INFO
3025 if (write_symbols == SDB_DEBUG
3026#if 0 /* People like having line numbers even in wrong file! */
3027 /* COFF can't handle multiple source files--lose, lose. */
3028 && !strcmp (filename, main_input_filename)
3029#endif
3030 /* COFF relative line numbers must be positive. */
3031 && last_linenum > sdb_begin_function_line)
3032 {
3033#ifdef ASM_OUTPUT_SOURCE_LINE
3034 ASM_OUTPUT_SOURCE_LINE (file, last_linenum);
3035#else
3036 fprintf (file, "\t.ln\t%d\n",
3037 ((sdb_begin_function_line > -1)
3038 ? last_linenum - sdb_begin_function_line : 1));
3039#endif
3040 }
3041#endif
3042
3043#if defined (DBX_DEBUGGING_INFO)
3044 if (write_symbols == DBX_DEBUG)
3045 dbxout_source_line (file, filename, NOTE_LINE_NUMBER (insn));
3046#endif
3047
3048#if defined (XCOFF_DEBUGGING_INFO)
3049 if (write_symbols == XCOFF_DEBUG)
3050 xcoffout_source_line (file, filename, insn);
3051#endif
3052
3053#ifdef DWARF_DEBUGGING_INFO
3054 if (write_symbols == DWARF_DEBUG)
3055 dwarfout_line (filename, NOTE_LINE_NUMBER (insn));
3056#endif
9a666dda
JM
3057
3058#ifdef DWARF2_DEBUGGING_INFO
3059 if (write_symbols == DWARF2_DEBUG)
3060 dwarf2out_line (filename, NOTE_LINE_NUMBER (insn));
3061#endif
3cf2715d
DE
3062 }
3063}
3064\f
0304f787
JL
3065
3066/* For each operand in INSN, simplify (subreg (reg)) so that it refers
3067 directly to the desired hard register. */
3068void
3069cleanup_subreg_operands (insn)
3070 rtx insn;
3071{
f62a15e3
BS
3072 int i;
3073
0eadeb15 3074 extract_insn (insn);
1ccbefce 3075 for (i = 0; i < recog_data.n_operands; i++)
0304f787 3076 {
1ccbefce
RH
3077 if (GET_CODE (recog_data.operand[i]) == SUBREG)
3078 recog_data.operand[i] = alter_subreg (recog_data.operand[i]);
3079 else if (GET_CODE (recog_data.operand[i]) == PLUS
3080 || GET_CODE (recog_data.operand[i]) == MULT)
3081 recog_data.operand[i] = walk_alter_subreg (recog_data.operand[i]);
0304f787
JL
3082 }
3083
1ccbefce 3084 for (i = 0; i < recog_data.n_dups; i++)
0304f787 3085 {
1ccbefce
RH
3086 if (GET_CODE (*recog_data.dup_loc[i]) == SUBREG)
3087 *recog_data.dup_loc[i] = alter_subreg (*recog_data.dup_loc[i]);
3088 else if (GET_CODE (*recog_data.dup_loc[i]) == PLUS
3089 || GET_CODE (*recog_data.dup_loc[i]) == MULT)
3090 *recog_data.dup_loc[i] = walk_alter_subreg (*recog_data.dup_loc[i]);
0304f787
JL
3091 }
3092}
3093
3cf2715d
DE
3094/* If X is a SUBREG, replace it with a REG or a MEM,
3095 based on the thing it is a subreg of. */
3096
3097rtx
3098alter_subreg (x)
3099 register rtx x;
3100{
3101 register rtx y = SUBREG_REG (x);
f5963e61 3102
3cf2715d
DE
3103 if (GET_CODE (y) == SUBREG)
3104 y = alter_subreg (y);
3105
f5963e61
JL
3106 /* If reload is operating, we may be replacing inside this SUBREG.
3107 Check for that and make a new one if so. */
3108 if (reload_in_progress && find_replacement (&SUBREG_REG (x)) != 0)
3109 x = copy_rtx (x);
3110
3cf2715d
DE
3111 if (GET_CODE (y) == REG)
3112 {
ef178af3 3113 int regno;
ce4d78eb
RH
3114 /* If the word size is larger than the size of this register,
3115 adjust the register number to compensate. */
3116 /* ??? Note that this just catches stragglers created by/for
3117 integrate. It would be better if we either caught these
3118 earlier, or kept _all_ subregs until now and eliminate
3119 gen_lowpart and friends. */
3120
ce4d78eb 3121#ifdef ALTER_HARD_SUBREG
ef178af3
ZW
3122 regno = ALTER_HARD_SUBREG(GET_MODE (x), SUBREG_WORD (x),
3123 GET_MODE (y), REGNO (y));
ce4d78eb 3124#else
ef178af3 3125 regno = REGNO (y) + SUBREG_WORD (x);
ce4d78eb 3126#endif
ef178af3
ZW
3127 PUT_CODE (x, REG);
3128 REGNO (x) = regno;
0304f787
JL
3129 /* This field has a different meaning for REGs and SUBREGs. Make sure
3130 to clear it! */
3131 x->used = 0;
3cf2715d
DE
3132 }
3133 else if (GET_CODE (y) == MEM)
3134 {
3135 register int offset = SUBREG_WORD (x) * UNITS_PER_WORD;
f76b9db2
ILT
3136 if (BYTES_BIG_ENDIAN)
3137 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x)))
3138 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (y))));
3cf2715d 3139 PUT_CODE (x, MEM);
c6df88cb 3140 MEM_COPY_ATTRIBUTES (x, y);
41472af8 3141 MEM_ALIAS_SET (x) = MEM_ALIAS_SET (y);
3cf2715d
DE
3142 XEXP (x, 0) = plus_constant (XEXP (y, 0), offset);
3143 }
3144
3145 return x;
3146}
3147
3148/* Do alter_subreg on all the SUBREGs contained in X. */
3149
3150static rtx
3151walk_alter_subreg (x)
3152 rtx x;
3153{
3154 switch (GET_CODE (x))
3155 {
3156 case PLUS:
3157 case MULT:
3158 XEXP (x, 0) = walk_alter_subreg (XEXP (x, 0));
3159 XEXP (x, 1) = walk_alter_subreg (XEXP (x, 1));
3160 break;
3161
3162 case MEM:
3163 XEXP (x, 0) = walk_alter_subreg (XEXP (x, 0));
3164 break;
3165
3166 case SUBREG:
3167 return alter_subreg (x);
e9a25f70
JL
3168
3169 default:
3170 break;
3cf2715d
DE
3171 }
3172
3173 return x;
3174}
3175\f
3176#ifdef HAVE_cc0
3177
3178/* Given BODY, the body of a jump instruction, alter the jump condition
3179 as required by the bits that are set in cc_status.flags.
3180 Not all of the bits there can be handled at this level in all cases.
3181
3182 The value is normally 0.
3183 1 means that the condition has become always true.
3184 -1 means that the condition has become always false.
3185 2 means that COND has been altered. */
3186
3187static int
3188alter_cond (cond)
3189 register rtx cond;
3190{
3191 int value = 0;
3192
3193 if (cc_status.flags & CC_REVERSED)
3194 {
3195 value = 2;
3196 PUT_CODE (cond, swap_condition (GET_CODE (cond)));
3197 }
3198
3199 if (cc_status.flags & CC_INVERTED)
3200 {
3201 value = 2;
3202 PUT_CODE (cond, reverse_condition (GET_CODE (cond)));
3203 }
3204
3205 if (cc_status.flags & CC_NOT_POSITIVE)
3206 switch (GET_CODE (cond))
3207 {
3208 case LE:
3209 case LEU:
3210 case GEU:
3211 /* Jump becomes unconditional. */
3212 return 1;
3213
3214 case GT:
3215 case GTU:
3216 case LTU:
3217 /* Jump becomes no-op. */
3218 return -1;
3219
3220 case GE:
3221 PUT_CODE (cond, EQ);
3222 value = 2;
3223 break;
3224
3225 case LT:
3226 PUT_CODE (cond, NE);
3227 value = 2;
3228 break;
e9a25f70
JL
3229
3230 default:
3231 break;
3cf2715d
DE
3232 }
3233
3234 if (cc_status.flags & CC_NOT_NEGATIVE)
3235 switch (GET_CODE (cond))
3236 {
3237 case GE:
3238 case GEU:
3239 /* Jump becomes unconditional. */
3240 return 1;
3241
3242 case LT:
3243 case LTU:
3244 /* Jump becomes no-op. */
3245 return -1;
3246
3247 case LE:
3248 case LEU:
3249 PUT_CODE (cond, EQ);
3250 value = 2;
3251 break;
3252
3253 case GT:
3254 case GTU:
3255 PUT_CODE (cond, NE);
3256 value = 2;
3257 break;
e9a25f70
JL
3258
3259 default:
3260 break;
3cf2715d
DE
3261 }
3262
3263 if (cc_status.flags & CC_NO_OVERFLOW)
3264 switch (GET_CODE (cond))
3265 {
3266 case GEU:
3267 /* Jump becomes unconditional. */
3268 return 1;
3269
3270 case LEU:
3271 PUT_CODE (cond, EQ);
3272 value = 2;
3273 break;
3274
3275 case GTU:
3276 PUT_CODE (cond, NE);
3277 value = 2;
3278 break;
3279
3280 case LTU:
3281 /* Jump becomes no-op. */
3282 return -1;
e9a25f70
JL
3283
3284 default:
3285 break;
3cf2715d
DE
3286 }
3287
3288 if (cc_status.flags & (CC_Z_IN_NOT_N | CC_Z_IN_N))
3289 switch (GET_CODE (cond))
3290 {
e9a25f70 3291 default:
3cf2715d
DE
3292 abort ();
3293
3294 case NE:
3295 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? GE : LT);
3296 value = 2;
3297 break;
3298
3299 case EQ:
3300 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? LT : GE);
3301 value = 2;
3302 break;
3303 }
3304
3305 if (cc_status.flags & CC_NOT_SIGNED)
3306 /* The flags are valid if signed condition operators are converted
3307 to unsigned. */
3308 switch (GET_CODE (cond))
3309 {
3310 case LE:
3311 PUT_CODE (cond, LEU);
3312 value = 2;
3313 break;
3314
3315 case LT:
3316 PUT_CODE (cond, LTU);
3317 value = 2;
3318 break;
3319
3320 case GT:
3321 PUT_CODE (cond, GTU);
3322 value = 2;
3323 break;
3324
3325 case GE:
3326 PUT_CODE (cond, GEU);
3327 value = 2;
3328 break;
e9a25f70
JL
3329
3330 default:
3331 break;
3cf2715d
DE
3332 }
3333
3334 return value;
3335}
3336#endif
3337\f
3338/* Report inconsistency between the assembler template and the operands.
3339 In an `asm', it's the user's fault; otherwise, the compiler's fault. */
3340
3341void
ab87f8c8
JL
3342output_operand_lossage (msgid)
3343 const char *msgid;
3cf2715d
DE
3344{
3345 if (this_is_asm_operands)
ab87f8c8 3346 error_for_asm (this_is_asm_operands, "invalid `asm': %s", _(msgid));
3cf2715d 3347 else
987009bf
ZW
3348 {
3349 error ("output_operand: %s", _(msgid));
3350 abort ();
3351 }
3cf2715d
DE
3352}
3353\f
3354/* Output of assembler code from a template, and its subroutines. */
3355
3356/* Output text from TEMPLATE to the assembler output file,
3357 obeying %-directions to substitute operands taken from
3358 the vector OPERANDS.
3359
3360 %N (for N a digit) means print operand N in usual manner.
3361 %lN means require operand N to be a CODE_LABEL or LABEL_REF
3362 and print the label name with no punctuation.
3363 %cN means require operand N to be a constant
3364 and print the constant expression with no punctuation.
3365 %aN means expect operand N to be a memory address
3366 (not a memory reference!) and print a reference
3367 to that address.
3368 %nN means expect operand N to be a constant
3369 and print a constant expression for minus the value
3370 of the operand, with no other punctuation. */
3371
cb649530
RK
3372static void
3373output_asm_name ()
3374{
3375 if (flag_print_asm_name)
3376 {
3377 /* Annotate the assembly with a comment describing the pattern and
3378 alternative used. */
3379 if (debug_insn)
3380 {
3381 register int num = INSN_CODE (debug_insn);
1db9f6ce 3382 fprintf (asm_out_file, "\t%s %d\t%s",
a995e389
RH
3383 ASM_COMMENT_START, INSN_UID (debug_insn),
3384 insn_data[num].name);
3385 if (insn_data[num].n_alternatives > 1)
cb649530 3386 fprintf (asm_out_file, "/%d", which_alternative + 1);
1db9f6ce 3387#ifdef HAVE_ATTR_length
a995e389
RH
3388 fprintf (asm_out_file, "\t[length = %d]",
3389 get_attr_length (debug_insn));
1db9f6ce 3390#endif
cb649530
RK
3391 /* Clear this so only the first assembler insn
3392 of any rtl insn will get the special comment for -dp. */
3393 debug_insn = 0;
3394 }
3395 }
3396}
3397
3cf2715d
DE
3398void
3399output_asm_insn (template, operands)
9b3142b3 3400 const char *template;
3cf2715d
DE
3401 rtx *operands;
3402{
9b3142b3 3403 register const char *p;
b729186a 3404 register int c;
3cf2715d
DE
3405
3406 /* An insn may return a null string template
3407 in a case where no assembler code is needed. */
3408 if (*template == 0)
3409 return;
3410
3411 p = template;
3412 putc ('\t', asm_out_file);
3413
3414#ifdef ASM_OUTPUT_OPCODE
3415 ASM_OUTPUT_OPCODE (asm_out_file, p);
3416#endif
3417
b729186a 3418 while ((c = *p++))
3cf2715d
DE
3419 switch (c)
3420 {
3cf2715d 3421 case '\n':
cb649530 3422 output_asm_name ();
3cf2715d 3423 putc (c, asm_out_file);
cb649530 3424#ifdef ASM_OUTPUT_OPCODE
3cf2715d
DE
3425 while ((c = *p) == '\t')
3426 {
3427 putc (c, asm_out_file);
3428 p++;
3429 }
3430 ASM_OUTPUT_OPCODE (asm_out_file, p);
3cf2715d 3431#endif
cb649530 3432 break;
3cf2715d
DE
3433
3434#ifdef ASSEMBLER_DIALECT
3435 case '{':
b729186a
JL
3436 {
3437 register int i;
3438
3439 /* If we want the first dialect, do nothing. Otherwise, skip
3440 DIALECT_NUMBER of strings ending with '|'. */
3441 for (i = 0; i < dialect_number; i++)
3442 {
463a8384 3443 while (*p && *p != '}' && *p++ != '|')
b729186a 3444 ;
463a8384
BS
3445 if (*p == '}')
3446 break;
b729186a
JL
3447 if (*p == '|')
3448 p++;
3449 }
3450 }
3cf2715d
DE
3451 break;
3452
3453 case '|':
3454 /* Skip to close brace. */
3455 while (*p && *p++ != '}')
3456 ;
3457 break;
3458
3459 case '}':
3460 break;
3461#endif
3462
3463 case '%':
3464 /* %% outputs a single %. */
3465 if (*p == '%')
3466 {
3467 p++;
3468 putc (c, asm_out_file);
3469 }
3470 /* %= outputs a number which is unique to each insn in the entire
3471 compilation. This is useful for making local labels that are
3472 referred to more than once in a given insn. */
3473 else if (*p == '=')
3474 {
3475 p++;
3476 fprintf (asm_out_file, "%d", insn_counter);
3477 }
3478 /* % followed by a letter and some digits
3479 outputs an operand in a special way depending on the letter.
3480 Letters `acln' are implemented directly.
3481 Other letters are passed to `output_operand' so that
3482 the PRINT_OPERAND macro can define them. */
3483 else if ((*p >= 'a' && *p <= 'z')
3484 || (*p >= 'A' && *p <= 'Z'))
3485 {
3486 int letter = *p++;
3487 c = atoi (p);
3488
3489 if (! (*p >= '0' && *p <= '9'))
3490 output_operand_lossage ("operand number missing after %-letter");
22bf4422 3491 else if (this_is_asm_operands && (c < 0 || (unsigned int) c >= insn_noperands))
3cf2715d
DE
3492 output_operand_lossage ("operand number out of range");
3493 else if (letter == 'l')
3494 output_asm_label (operands[c]);
3495 else if (letter == 'a')
3496 output_address (operands[c]);
3497 else if (letter == 'c')
3498 {
3499 if (CONSTANT_ADDRESS_P (operands[c]))
3500 output_addr_const (asm_out_file, operands[c]);
3501 else
3502 output_operand (operands[c], 'c');
3503 }
3504 else if (letter == 'n')
3505 {
3506 if (GET_CODE (operands[c]) == CONST_INT)
21e3a81b 3507 fprintf (asm_out_file, HOST_WIDE_INT_PRINT_DEC,
3cf2715d
DE
3508 - INTVAL (operands[c]));
3509 else
3510 {
3511 putc ('-', asm_out_file);
3512 output_addr_const (asm_out_file, operands[c]);
3513 }
3514 }
3515 else
3516 output_operand (operands[c], letter);
3517
3518 while ((c = *p) >= '0' && c <= '9') p++;
3519 }
3520 /* % followed by a digit outputs an operand the default way. */
3521 else if (*p >= '0' && *p <= '9')
3522 {
3523 c = atoi (p);
22bf4422 3524 if (this_is_asm_operands && (c < 0 || (unsigned int) c >= insn_noperands))
3cf2715d
DE
3525 output_operand_lossage ("operand number out of range");
3526 else
3527 output_operand (operands[c], 0);
3528 while ((c = *p) >= '0' && c <= '9') p++;
3529 }
3530 /* % followed by punctuation: output something for that
3531 punctuation character alone, with no operand.
3532 The PRINT_OPERAND macro decides what is actually done. */
3533#ifdef PRINT_OPERAND_PUNCT_VALID_P
973838fd 3534 else if (PRINT_OPERAND_PUNCT_VALID_P ((unsigned char)*p))
3cf2715d
DE
3535 output_operand (NULL_RTX, *p++);
3536#endif
3537 else
3538 output_operand_lossage ("invalid %%-code");
3539 break;
3540
3541 default:
3542 putc (c, asm_out_file);
3543 }
3544
cb649530 3545 output_asm_name ();
3cf2715d
DE
3546
3547 putc ('\n', asm_out_file);
3548}
3549\f
3550/* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */
3551
3552void
3553output_asm_label (x)
3554 rtx x;
3555{
3556 char buf[256];
3557
3558 if (GET_CODE (x) == LABEL_REF)
3559 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (XEXP (x, 0)));
3560 else if (GET_CODE (x) == CODE_LABEL)
3561 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
3562 else
3563 output_operand_lossage ("`%l' operand isn't a label");
3564
3565 assemble_name (asm_out_file, buf);
3566}
3567
3568/* Print operand X using machine-dependent assembler syntax.
3569 The macro PRINT_OPERAND is defined just to control this function.
3570 CODE is a non-digit that preceded the operand-number in the % spec,
3571 such as 'z' if the spec was `%z3'. CODE is 0 if there was no char
3572 between the % and the digits.
3573 When CODE is a non-letter, X is 0.
3574
3575 The meanings of the letters are machine-dependent and controlled
3576 by PRINT_OPERAND. */
3577
3578static void
3579output_operand (x, code)
3580 rtx x;
3581 int code;
3582{
3583 if (x && GET_CODE (x) == SUBREG)
3584 x = alter_subreg (x);
3585
3586 /* If X is a pseudo-register, abort now rather than writing trash to the
3587 assembler file. */
3588
3589 if (x && GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER)
3590 abort ();
3591
3592 PRINT_OPERAND (asm_out_file, x, code);
3593}
3594
3595/* Print a memory reference operand for address X
3596 using machine-dependent assembler syntax.
3597 The macro PRINT_OPERAND_ADDRESS exists just to control this function. */
3598
3599void
3600output_address (x)
3601 rtx x;
3602{
3603 walk_alter_subreg (x);
3604 PRINT_OPERAND_ADDRESS (asm_out_file, x);
3605}
3606\f
3607/* Print an integer constant expression in assembler syntax.
3608 Addition and subtraction are the only arithmetic
3609 that may appear in these expressions. */
3610
3611void
3612output_addr_const (file, x)
3613 FILE *file;
3614 rtx x;
3615{
3616 char buf[256];
3617
3618 restart:
3619 switch (GET_CODE (x))
3620 {
3621 case PC:
3622 if (flag_pic)
3623 putc ('.', file);
3624 else
3625 abort ();
3626 break;
3627
3628 case SYMBOL_REF:
3629 assemble_name (file, XSTR (x, 0));
3630 break;
3631
3632 case LABEL_REF:
3633 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (XEXP (x, 0)));
3634 assemble_name (file, buf);
3635 break;
3636
3637 case CODE_LABEL:
3638 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
3639 assemble_name (file, buf);
3640 break;
3641
3642 case CONST_INT:
21e3a81b 3643 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x));
3cf2715d
DE
3644 break;
3645
3646 case CONST:
3647 /* This used to output parentheses around the expression,
3648 but that does not work on the 386 (either ATT or BSD assembler). */
3649 output_addr_const (file, XEXP (x, 0));
3650 break;
3651
3652 case CONST_DOUBLE:
3653 if (GET_MODE (x) == VOIDmode)
3654 {
3655 /* We can use %d if the number is one word and positive. */
3656 if (CONST_DOUBLE_HIGH (x))
21e3a81b 3657 fprintf (file, HOST_WIDE_INT_PRINT_DOUBLE_HEX,
3cf2715d
DE
3658 CONST_DOUBLE_HIGH (x), CONST_DOUBLE_LOW (x));
3659 else if (CONST_DOUBLE_LOW (x) < 0)
21e3a81b 3660 fprintf (file, HOST_WIDE_INT_PRINT_HEX, CONST_DOUBLE_LOW (x));
3cf2715d 3661 else
21e3a81b 3662 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x));
3cf2715d
DE
3663 }
3664 else
3665 /* We can't handle floating point constants;
3666 PRINT_OPERAND must handle them. */
3667 output_operand_lossage ("floating constant misused");
3668 break;
3669
3670 case PLUS:
3671 /* Some assemblers need integer constants to appear last (eg masm). */
3672 if (GET_CODE (XEXP (x, 0)) == CONST_INT)
3673 {
3674 output_addr_const (file, XEXP (x, 1));
3675 if (INTVAL (XEXP (x, 0)) >= 0)
3676 fprintf (file, "+");
3677 output_addr_const (file, XEXP (x, 0));
3678 }
3679 else
3680 {
3681 output_addr_const (file, XEXP (x, 0));
3682 if (INTVAL (XEXP (x, 1)) >= 0)
3683 fprintf (file, "+");
3684 output_addr_const (file, XEXP (x, 1));
3685 }
3686 break;
3687
3688 case MINUS:
3689 /* Avoid outputting things like x-x or x+5-x,
3690 since some assemblers can't handle that. */
3691 x = simplify_subtraction (x);
3692 if (GET_CODE (x) != MINUS)
3693 goto restart;
3694
3695 output_addr_const (file, XEXP (x, 0));
3696 fprintf (file, "-");
3697 if (GET_CODE (XEXP (x, 1)) == CONST_INT
3698 && INTVAL (XEXP (x, 1)) < 0)
3699 {
b6c8689d 3700 fprintf (file, "%s", ASM_OPEN_PAREN);
3cf2715d 3701 output_addr_const (file, XEXP (x, 1));
b6c8689d 3702 fprintf (file, "%s", ASM_CLOSE_PAREN);
3cf2715d
DE
3703 }
3704 else
3705 output_addr_const (file, XEXP (x, 1));
3706 break;
3707
3708 case ZERO_EXTEND:
3709 case SIGN_EXTEND:
3710 output_addr_const (file, XEXP (x, 0));
3711 break;
3712
3713 default:
3714 output_operand_lossage ("invalid expression as operand");
3715 }
3716}
3717\f
3718/* A poor man's fprintf, with the added features of %I, %R, %L, and %U.
3719 %R prints the value of REGISTER_PREFIX.
3720 %L prints the value of LOCAL_LABEL_PREFIX.
3721 %U prints the value of USER_LABEL_PREFIX.
3722 %I prints the value of IMMEDIATE_PREFIX.
3723 %O runs ASM_OUTPUT_OPCODE to transform what follows in the string.
3724 Also supported are %d, %x, %s, %e, %f, %g and %%.
3725
3726 We handle alternate assembler dialects here, just like output_asm_insn. */
3727
3728void
87e11268 3729asm_fprintf VPROTO((FILE *file, const char *p, ...))
3cf2715d 3730{
5148a72b 3731#ifndef ANSI_PROTOTYPES
3cf2715d 3732 FILE *file;
87e11268 3733 const char *p;
3cf2715d
DE
3734#endif
3735 va_list argptr;
3736 char buf[10];
3737 char *q, c;
3cf2715d
DE
3738
3739 VA_START (argptr, p);
3740
5148a72b 3741#ifndef ANSI_PROTOTYPES
0f41302f 3742 file = va_arg (argptr, FILE *);
87e11268 3743 p = va_arg (argptr, const char *);
3cf2715d
DE
3744#endif
3745
3746 buf[0] = '%';
3747
b729186a 3748 while ((c = *p++))
3cf2715d
DE
3749 switch (c)
3750 {
3751#ifdef ASSEMBLER_DIALECT
3752 case '{':
b729186a
JL
3753 {
3754 int i;
3cf2715d 3755
b729186a
JL
3756 /* If we want the first dialect, do nothing. Otherwise, skip
3757 DIALECT_NUMBER of strings ending with '|'. */
3758 for (i = 0; i < dialect_number; i++)
3759 {
3760 while (*p && *p++ != '|')
3761 ;
3762
3763 if (*p == '|')
3764 p++;
3cf2715d 3765 }
b729186a 3766 }
3cf2715d
DE
3767 break;
3768
3769 case '|':
3770 /* Skip to close brace. */
3771 while (*p && *p++ != '}')
3772 ;
3773 break;
3774
3775 case '}':
3776 break;
3777#endif
3778
3779 case '%':
3780 c = *p++;
3781 q = &buf[1];
3782 while ((c >= '0' && c <= '9') || c == '.')
3783 {
3784 *q++ = c;
3785 c = *p++;
3786 }
3787 switch (c)
3788 {
3789 case '%':
3790 fprintf (file, "%%");
3791 break;
3792
3793 case 'd': case 'i': case 'u':
3794 case 'x': case 'p': case 'X':
3795 case 'o':
3796 *q++ = c;
3797 *q = 0;
3798 fprintf (file, buf, va_arg (argptr, int));
3799 break;
3800
3801 case 'w':
3802 /* This is a prefix to the 'd', 'i', 'u', 'x', 'p', and 'X' cases,
3803 but we do not check for those cases. It means that the value
3804 is a HOST_WIDE_INT, which may be either `int' or `long'. */
3805
21e3a81b
RK
3806#if HOST_BITS_PER_WIDE_INT == HOST_BITS_PER_INT
3807#else
3808#if HOST_BITS_PER_WIDE_INT == HOST_BITS_PER_LONG
3809 *q++ = 'l';
3810#else
3811 *q++ = 'l';
3cf2715d 3812 *q++ = 'l';
21e3a81b 3813#endif
3cf2715d
DE
3814#endif
3815
3816 *q++ = *p++;
3817 *q = 0;
3818 fprintf (file, buf, va_arg (argptr, HOST_WIDE_INT));
3819 break;
3820
3821 case 'l':
3822 *q++ = c;
3823 *q++ = *p++;
3824 *q = 0;
3825 fprintf (file, buf, va_arg (argptr, long));
3826 break;
3827
3828 case 'e':
3829 case 'f':
3830 case 'g':
3831 *q++ = c;
3832 *q = 0;
3833 fprintf (file, buf, va_arg (argptr, double));
3834 break;
3835
3836 case 's':
3837 *q++ = c;
3838 *q = 0;
3839 fprintf (file, buf, va_arg (argptr, char *));
3840 break;
3841
3842 case 'O':
3843#ifdef ASM_OUTPUT_OPCODE
3844 ASM_OUTPUT_OPCODE (asm_out_file, p);
3845#endif
3846 break;
3847
3848 case 'R':
3849#ifdef REGISTER_PREFIX
3850 fprintf (file, "%s", REGISTER_PREFIX);
3851#endif
3852 break;
3853
3854 case 'I':
3855#ifdef IMMEDIATE_PREFIX
3856 fprintf (file, "%s", IMMEDIATE_PREFIX);
3857#endif
3858 break;
3859
3860 case 'L':
3861#ifdef LOCAL_LABEL_PREFIX
3862 fprintf (file, "%s", LOCAL_LABEL_PREFIX);
3863#endif
3864 break;
3865
3866 case 'U':
19283265 3867 fputs (user_label_prefix, file);
3cf2715d
DE
3868 break;
3869
fe0503ea
NC
3870#ifdef ASM_FPRINTF_EXTENSIONS
3871 /* Upper case letters are reserved for general use by asm_fprintf
3872 and so are not available to target specific code. In order to
3873 prevent the ASM_FPRINTF_EXTENSIONS macro from using them then,
3874 they are defined here. As they get turned into real extensions
3875 to asm_fprintf they should be removed from this list. */
3876 case 'A': case 'B': case 'C': case 'D': case 'E':
3877 case 'F': case 'G': case 'H': case 'J': case 'K':
3878 case 'M': case 'N': case 'P': case 'Q': case 'S':
3879 case 'T': case 'V': case 'W': case 'Y': case 'Z':
3880 break;
3881
3882 ASM_FPRINTF_EXTENSIONS (file, argptr, p)
3883#endif
3cf2715d
DE
3884 default:
3885 abort ();
3886 }
3887 break;
3888
3889 default:
3890 fputc (c, file);
3891 }
f0305a2b 3892 va_end (argptr);
3cf2715d
DE
3893}
3894\f
3895/* Split up a CONST_DOUBLE or integer constant rtx
3896 into two rtx's for single words,
3897 storing in *FIRST the word that comes first in memory in the target
3898 and in *SECOND the other. */
3899
3900void
3901split_double (value, first, second)
3902 rtx value;
3903 rtx *first, *second;
3904{
3905 if (GET_CODE (value) == CONST_INT)
3906 {
5a1a6efd 3907 if (HOST_BITS_PER_WIDE_INT >= (2 * BITS_PER_WORD))
f76b9db2 3908 {
5a1a6efd 3909 /* In this case the CONST_INT holds both target words.
27eef9ce
JC
3910 Extract the bits from it into two word-sized pieces.
3911 Sign extend each half to HOST_WIDE_INT. */
5a1a6efd 3912 rtx low, high;
563c063f
MM
3913 /* On machines where HOST_BITS_PER_WIDE_INT == BITS_PER_WORD
3914 the shift below will cause a compiler warning, even though
3915 this code won't be executed. So put the shift amounts in
3916 variables to avoid the warning. */
3917 int rshift = HOST_BITS_PER_WIDE_INT - BITS_PER_WORD;
3918 int lshift = HOST_BITS_PER_WIDE_INT - 2 * BITS_PER_WORD;
3919
3920 low = GEN_INT ((INTVAL (value) << rshift) >> rshift);
3921 high = GEN_INT ((INTVAL (value) << lshift) >> rshift);
5a1a6efd
RK
3922 if (WORDS_BIG_ENDIAN)
3923 {
3924 *first = high;
3925 *second = low;
3926 }
3927 else
3928 {
3929 *first = low;
3930 *second = high;
3931 }
f76b9db2
ILT
3932 }
3933 else
3934 {
5a1a6efd
RK
3935 /* The rule for using CONST_INT for a wider mode
3936 is that we regard the value as signed.
3937 So sign-extend it. */
3938 rtx high = (INTVAL (value) < 0 ? constm1_rtx : const0_rtx);
3939 if (WORDS_BIG_ENDIAN)
3940 {
3941 *first = high;
3942 *second = value;
3943 }
3944 else
3945 {
3946 *first = value;
3947 *second = high;
3948 }
f76b9db2 3949 }
3cf2715d
DE
3950 }
3951 else if (GET_CODE (value) != CONST_DOUBLE)
3952 {
f76b9db2
ILT
3953 if (WORDS_BIG_ENDIAN)
3954 {
3955 *first = const0_rtx;
3956 *second = value;
3957 }
3958 else
3959 {
3960 *first = value;
3961 *second = const0_rtx;
3962 }
3cf2715d
DE
3963 }
3964 else if (GET_MODE (value) == VOIDmode
3965 /* This is the old way we did CONST_DOUBLE integers. */
3966 || GET_MODE_CLASS (GET_MODE (value)) == MODE_INT)
3967 {
3968 /* In an integer, the words are defined as most and least significant.
3969 So order them by the target's convention. */
f76b9db2
ILT
3970 if (WORDS_BIG_ENDIAN)
3971 {
3972 *first = GEN_INT (CONST_DOUBLE_HIGH (value));
3973 *second = GEN_INT (CONST_DOUBLE_LOW (value));
3974 }
3975 else
3976 {
3977 *first = GEN_INT (CONST_DOUBLE_LOW (value));
3978 *second = GEN_INT (CONST_DOUBLE_HIGH (value));
3979 }
3cf2715d
DE
3980 }
3981 else
3982 {
3983#ifdef REAL_ARITHMETIC
3984 REAL_VALUE_TYPE r; long l[2];
3985 REAL_VALUE_FROM_CONST_DOUBLE (r, value);
3986
3987 /* Note, this converts the REAL_VALUE_TYPE to the target's
3988 format, splits up the floating point double and outputs
3989 exactly 32 bits of it into each of l[0] and l[1] --
0f41302f 3990 not necessarily BITS_PER_WORD bits. */
3cf2715d
DE
3991 REAL_VALUE_TO_TARGET_DOUBLE (r, l);
3992
b5a3eb84
JW
3993 /* If 32 bits is an entire word for the target, but not for the host,
3994 then sign-extend on the host so that the number will look the same
3995 way on the host that it would on the target. See for instance
3996 simplify_unary_operation. The #if is needed to avoid compiler
3997 warnings. */
3998
3999#if HOST_BITS_PER_LONG > 32
4000 if (BITS_PER_WORD < HOST_BITS_PER_LONG && BITS_PER_WORD == 32)
4001 {
4002 if (l[0] & ((long) 1 << 31))
4003 l[0] |= ((long) (-1) << 32);
4004 if (l[1] & ((long) 1 << 31))
4005 l[1] |= ((long) (-1) << 32);
4006 }
4007#endif
4008
3cf2715d
DE
4009 *first = GEN_INT ((HOST_WIDE_INT) l[0]);
4010 *second = GEN_INT ((HOST_WIDE_INT) l[1]);
4011#else
4012 if ((HOST_FLOAT_FORMAT != TARGET_FLOAT_FORMAT
4013 || HOST_BITS_PER_WIDE_INT != BITS_PER_WORD)
4014 && ! flag_pretend_float)
4015 abort ();
4016
f76b9db2
ILT
4017 if (
4018#ifdef HOST_WORDS_BIG_ENDIAN
4019 WORDS_BIG_ENDIAN
3cf2715d 4020#else
f76b9db2 4021 ! WORDS_BIG_ENDIAN
3cf2715d 4022#endif
f76b9db2
ILT
4023 )
4024 {
4025 /* Host and target agree => no need to swap. */
4026 *first = GEN_INT (CONST_DOUBLE_LOW (value));
4027 *second = GEN_INT (CONST_DOUBLE_HIGH (value));
4028 }
4029 else
4030 {
4031 *second = GEN_INT (CONST_DOUBLE_LOW (value));
4032 *first = GEN_INT (CONST_DOUBLE_HIGH (value));
4033 }
3cf2715d
DE
4034#endif /* no REAL_ARITHMETIC */
4035 }
4036}
4037\f
4038/* Return nonzero if this function has no function calls. */
4039
4040int
4041leaf_function_p ()
4042{
4043 rtx insn;
4044
9e2f9a7f 4045 if (profile_flag || profile_block_flag || profile_arc_flag)
3cf2715d
DE
4046 return 0;
4047
4048 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4049 {
4050 if (GET_CODE (insn) == CALL_INSN)
4051 return 0;
4052 if (GET_CODE (insn) == INSN
4053 && GET_CODE (PATTERN (insn)) == SEQUENCE
4054 && GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) == CALL_INSN)
4055 return 0;
4056 }
4057 for (insn = current_function_epilogue_delay_list; insn; insn = XEXP (insn, 1))
4058 {
4059 if (GET_CODE (XEXP (insn, 0)) == CALL_INSN)
4060 return 0;
4061 if (GET_CODE (XEXP (insn, 0)) == INSN
4062 && GET_CODE (PATTERN (XEXP (insn, 0))) == SEQUENCE
4063 && GET_CODE (XVECEXP (PATTERN (XEXP (insn, 0)), 0, 0)) == CALL_INSN)
4064 return 0;
4065 }
4066
4067 return 1;
4068}
4069
4070/* On some machines, a function with no call insns
4071 can run faster if it doesn't create its own register window.
4072 When output, the leaf function should use only the "output"
4073 registers. Ordinarily, the function would be compiled to use
4074 the "input" registers to find its arguments; it is a candidate
4075 for leaf treatment if it uses only the "input" registers.
4076 Leaf function treatment means renumbering so the function
4077 uses the "output" registers instead. */
4078
4079#ifdef LEAF_REGISTERS
4080
4081static char permitted_reg_in_leaf_functions[] = LEAF_REGISTERS;
4082
4083/* Return 1 if this function uses only the registers that can be
4084 safely renumbered. */
4085
4086int
4087only_leaf_regs_used ()
4088{
4089 int i;
4090
4091 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
e5e809f4
JL
4092 if ((regs_ever_live[i] || global_regs[i])
4093 && ! permitted_reg_in_leaf_functions[i])
4094 return 0;
4095
4096 if (current_function_uses_pic_offset_table
4097 && pic_offset_table_rtx != 0
4098 && GET_CODE (pic_offset_table_rtx) == REG
4099 && ! permitted_reg_in_leaf_functions[REGNO (pic_offset_table_rtx)])
4100 return 0;
4101
3cf2715d
DE
4102 return 1;
4103}
4104
4105/* Scan all instructions and renumber all registers into those
4106 available in leaf functions. */
4107
4108static void
4109leaf_renumber_regs (first)
4110 rtx first;
4111{
4112 rtx insn;
4113
4114 /* Renumber only the actual patterns.
4115 The reg-notes can contain frame pointer refs,
4116 and renumbering them could crash, and should not be needed. */
4117 for (insn = first; insn; insn = NEXT_INSN (insn))
4118 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
4119 leaf_renumber_regs_insn (PATTERN (insn));
4120 for (insn = current_function_epilogue_delay_list; insn; insn = XEXP (insn, 1))
4121 if (GET_RTX_CLASS (GET_CODE (XEXP (insn, 0))) == 'i')
4122 leaf_renumber_regs_insn (PATTERN (XEXP (insn, 0)));
4123}
4124
4125/* Scan IN_RTX and its subexpressions, and renumber all regs into those
4126 available in leaf functions. */
4127
4128void
4129leaf_renumber_regs_insn (in_rtx)
4130 register rtx in_rtx;
4131{
4132 register int i, j;
6f7d635c 4133 register const char *format_ptr;
3cf2715d
DE
4134
4135 if (in_rtx == 0)
4136 return;
4137
4138 /* Renumber all input-registers into output-registers.
4139 renumbered_regs would be 1 for an output-register;
4140 they */
4141
4142 if (GET_CODE (in_rtx) == REG)
4143 {
4144 int newreg;
4145
4146 /* Don't renumber the same reg twice. */
4147 if (in_rtx->used)
4148 return;
4149
4150 newreg = REGNO (in_rtx);
4151 /* Don't try to renumber pseudo regs. It is possible for a pseudo reg
4152 to reach here as part of a REG_NOTE. */
4153 if (newreg >= FIRST_PSEUDO_REGISTER)
4154 {
4155 in_rtx->used = 1;
4156 return;
4157 }
4158 newreg = LEAF_REG_REMAP (newreg);
4159 if (newreg < 0)
4160 abort ();
4161 regs_ever_live[REGNO (in_rtx)] = 0;
4162 regs_ever_live[newreg] = 1;
4163 REGNO (in_rtx) = newreg;
4164 in_rtx->used = 1;
4165 }
4166
4167 if (GET_RTX_CLASS (GET_CODE (in_rtx)) == 'i')
4168 {
4169 /* Inside a SEQUENCE, we find insns.
4170 Renumber just the patterns of these insns,
4171 just as we do for the top-level insns. */
4172 leaf_renumber_regs_insn (PATTERN (in_rtx));
4173 return;
4174 }
4175
4176 format_ptr = GET_RTX_FORMAT (GET_CODE (in_rtx));
4177
4178 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (in_rtx)); i++)
4179 switch (*format_ptr++)
4180 {
4181 case 'e':
4182 leaf_renumber_regs_insn (XEXP (in_rtx, i));
4183 break;
4184
4185 case 'E':
4186 if (NULL != XVEC (in_rtx, i))
4187 {
4188 for (j = 0; j < XVECLEN (in_rtx, i); j++)
4189 leaf_renumber_regs_insn (XVECEXP (in_rtx, i, j));
4190 }
4191 break;
4192
4193 case 'S':
4194 case 's':
4195 case '0':
4196 case 'i':
4197 case 'w':
4198 case 'n':
4199 case 'u':
4200 break;
4201
4202 default:
4203 abort ();
4204 }
4205}
4206#endif