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3cf2715d | 1 | /* Convert RTL to assembler code and output it, for GNU compiler. |
cbe34bb5 | 2 | Copyright (C) 1987-2017 Free Software Foundation, Inc. |
3cf2715d | 3 | |
1322177d | 4 | This file is part of GCC. |
3cf2715d | 5 | |
1322177d LB |
6 | GCC is free software; you can redistribute it and/or modify it under |
7 | the terms of the GNU General Public License as published by the Free | |
9dcd6f09 | 8 | Software Foundation; either version 3, or (at your option) any later |
1322177d | 9 | version. |
3cf2715d | 10 | |
1322177d LB |
11 | GCC is distributed in the hope that it will be useful, but WITHOUT ANY |
12 | WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
13 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
14 | for more details. | |
3cf2715d DE |
15 | |
16 | You should have received a copy of the GNU General Public License | |
9dcd6f09 NC |
17 | along with GCC; see the file COPYING3. If not see |
18 | <http://www.gnu.org/licenses/>. */ | |
3cf2715d | 19 | |
3cf2715d DE |
20 | /* This is the final pass of the compiler. |
21 | It looks at the rtl code for a function and outputs assembler code. | |
22 | ||
23 | Call `final_start_function' to output the assembler code for function entry, | |
24 | `final' to output assembler code for some RTL code, | |
25 | `final_end_function' to output assembler code for function exit. | |
26 | If a function is compiled in several pieces, each piece is | |
27 | output separately with `final'. | |
28 | ||
29 | Some optimizations are also done at this level. | |
30 | Move instructions that were made unnecessary by good register allocation | |
31 | are detected and omitted from the output. (Though most of these | |
32 | are removed by the last jump pass.) | |
33 | ||
34 | Instructions to set the condition codes are omitted when it can be | |
35 | seen that the condition codes already had the desired values. | |
36 | ||
37 | In some cases it is sufficient if the inherited condition codes | |
38 | have related values, but this may require the following insn | |
39 | (the one that tests the condition codes) to be modified. | |
40 | ||
41 | The code for the function prologue and epilogue are generated | |
08c148a8 NB |
42 | directly in assembler by the target functions function_prologue and |
43 | function_epilogue. Those instructions never exist as rtl. */ | |
3cf2715d DE |
44 | |
45 | #include "config.h" | |
01736018 | 46 | #define INCLUDE_ALGORITHM /* reverse */ |
670ee920 | 47 | #include "system.h" |
4977bab6 | 48 | #include "coretypes.h" |
c7131fb2 | 49 | #include "backend.h" |
957060b5 | 50 | #include "target.h" |
3cf2715d | 51 | #include "rtl.h" |
957060b5 AM |
52 | #include "tree.h" |
53 | #include "cfghooks.h" | |
c7131fb2 | 54 | #include "df.h" |
4d0cdd0c | 55 | #include "memmodel.h" |
6baf1cc8 | 56 | #include "tm_p.h" |
3cf2715d | 57 | #include "insn-config.h" |
957060b5 AM |
58 | #include "regs.h" |
59 | #include "emit-rtl.h" | |
3cf2715d | 60 | #include "recog.h" |
957060b5 | 61 | #include "cgraph.h" |
957060b5 | 62 | #include "tree-pretty-print.h" /* for dump_function_header */ |
957060b5 AM |
63 | #include "varasm.h" |
64 | #include "insn-attr.h" | |
3cf2715d DE |
65 | #include "conditions.h" |
66 | #include "flags.h" | |
3cf2715d | 67 | #include "output.h" |
3d195391 | 68 | #include "except.h" |
0cbd9993 MLI |
69 | #include "rtl-error.h" |
70 | #include "toplev.h" /* exact_log2, floor_log2 */ | |
d6f4ec51 | 71 | #include "reload.h" |
ab87f8c8 | 72 | #include "intl.h" |
60393bbc | 73 | #include "cfgrtl.h" |
a5a42b92 | 74 | #include "debug.h" |
ef330312 | 75 | #include "tree-pass.h" |
442b4905 | 76 | #include "tree-ssa.h" |
edbed3d3 JH |
77 | #include "cfgloop.h" |
78 | #include "params.h" | |
314e6352 ML |
79 | #include "stringpool.h" |
80 | #include "attribs.h" | |
ef1b3fda | 81 | #include "asan.h" |
effb8a26 | 82 | #include "rtl-iter.h" |
013a8899 | 83 | #include "print-rtl.h" |
3cf2715d | 84 | |
440aabf8 | 85 | #ifdef XCOFF_DEBUGGING_INFO |
957060b5 | 86 | #include "xcoffout.h" /* Needed for external data declarations. */ |
440aabf8 NB |
87 | #endif |
88 | ||
76ead72b | 89 | #include "dwarf2out.h" |
76ead72b | 90 | |
6a08f7b3 DP |
91 | #ifdef DBX_DEBUGGING_INFO |
92 | #include "dbxout.h" | |
93 | #endif | |
94 | ||
906668bb BS |
95 | /* Most ports that aren't using cc0 don't need to define CC_STATUS_INIT. |
96 | So define a null default for it to save conditionalization later. */ | |
3cf2715d DE |
97 | #ifndef CC_STATUS_INIT |
98 | #define CC_STATUS_INIT | |
99 | #endif | |
100 | ||
3cf2715d DE |
101 | /* Is the given character a logical line separator for the assembler? */ |
102 | #ifndef IS_ASM_LOGICAL_LINE_SEPARATOR | |
980d8882 | 103 | #define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) ((C) == ';') |
3cf2715d DE |
104 | #endif |
105 | ||
75197b37 BS |
106 | #ifndef JUMP_TABLES_IN_TEXT_SECTION |
107 | #define JUMP_TABLES_IN_TEXT_SECTION 0 | |
108 | #endif | |
109 | ||
589fe865 | 110 | /* Bitflags used by final_scan_insn. */ |
70aacc97 JJ |
111 | #define SEEN_NOTE 1 |
112 | #define SEEN_EMITTED 2 | |
589fe865 | 113 | |
3cf2715d | 114 | /* Last insn processed by final_scan_insn. */ |
fa7af581 DM |
115 | static rtx_insn *debug_insn; |
116 | rtx_insn *current_output_insn; | |
3cf2715d DE |
117 | |
118 | /* Line number of last NOTE. */ | |
119 | static int last_linenum; | |
120 | ||
497b7c47 JJ |
121 | /* Column number of last NOTE. */ |
122 | static int last_columnnum; | |
123 | ||
6c52e687 CC |
124 | /* Last discriminator written to assembly. */ |
125 | static int last_discriminator; | |
126 | ||
127 | /* Discriminator of current block. */ | |
128 | static int discriminator; | |
129 | ||
eac40081 RK |
130 | /* Highest line number in current block. */ |
131 | static int high_block_linenum; | |
132 | ||
133 | /* Likewise for function. */ | |
134 | static int high_function_linenum; | |
135 | ||
3cf2715d | 136 | /* Filename of last NOTE. */ |
3cce094d | 137 | static const char *last_filename; |
3cf2715d | 138 | |
497b7c47 | 139 | /* Override filename, line and column number. */ |
d752cfdb JJ |
140 | static const char *override_filename; |
141 | static int override_linenum; | |
497b7c47 | 142 | static int override_columnnum; |
d752cfdb | 143 | |
b8176fe4 EB |
144 | /* Whether to force emission of a line note before the next insn. */ |
145 | static bool force_source_line = false; | |
b0efb46b | 146 | |
5f2f0edd | 147 | extern const int length_unit_log; /* This is defined in insn-attrtab.c. */ |
fc470718 | 148 | |
3cf2715d | 149 | /* Nonzero while outputting an `asm' with operands. |
535a42b1 | 150 | This means that inconsistencies are the user's fault, so don't die. |
3cf2715d | 151 | The precise value is the insn being output, to pass to error_for_asm. */ |
1c22488e | 152 | const rtx_insn *this_is_asm_operands; |
3cf2715d DE |
153 | |
154 | /* Number of operands of this insn, for an `asm' with operands. */ | |
22bf4422 | 155 | static unsigned int insn_noperands; |
3cf2715d DE |
156 | |
157 | /* Compare optimization flag. */ | |
158 | ||
159 | static rtx last_ignored_compare = 0; | |
160 | ||
3cf2715d DE |
161 | /* Assign a unique number to each insn that is output. |
162 | This can be used to generate unique local labels. */ | |
163 | ||
164 | static int insn_counter = 0; | |
165 | ||
3cf2715d DE |
166 | /* This variable contains machine-dependent flags (defined in tm.h) |
167 | set and examined by output routines | |
168 | that describe how to interpret the condition codes properly. */ | |
169 | ||
170 | CC_STATUS cc_status; | |
171 | ||
172 | /* During output of an insn, this contains a copy of cc_status | |
173 | from before the insn. */ | |
174 | ||
175 | CC_STATUS cc_prev_status; | |
3cf2715d | 176 | |
18c038b9 | 177 | /* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */ |
3cf2715d DE |
178 | |
179 | static int block_depth; | |
180 | ||
181 | /* Nonzero if have enabled APP processing of our assembler output. */ | |
182 | ||
183 | static int app_on; | |
184 | ||
185 | /* If we are outputting an insn sequence, this contains the sequence rtx. | |
186 | Zero otherwise. */ | |
187 | ||
b32d5189 | 188 | rtx_sequence *final_sequence; |
3cf2715d DE |
189 | |
190 | #ifdef ASSEMBLER_DIALECT | |
191 | ||
192 | /* Number of the assembler dialect to use, starting at 0. */ | |
193 | static int dialect_number; | |
194 | #endif | |
195 | ||
afe48e06 RH |
196 | /* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */ |
197 | rtx current_insn_predicate; | |
afe48e06 | 198 | |
6ca5d1f6 JJ |
199 | /* True if printing into -fdump-final-insns= dump. */ |
200 | bool final_insns_dump_p; | |
201 | ||
ddd84654 JJ |
202 | /* True if profile_function should be called, but hasn't been called yet. */ |
203 | static bool need_profile_function; | |
204 | ||
6cf9ac28 | 205 | static int asm_insn_count (rtx); |
6cf9ac28 AJ |
206 | static void profile_function (FILE *); |
207 | static void profile_after_prologue (FILE *); | |
fa7af581 | 208 | static bool notice_source_line (rtx_insn *, bool *); |
6fb5fa3c | 209 | static rtx walk_alter_subreg (rtx *, bool *); |
6cf9ac28 | 210 | static void output_asm_name (void); |
fa7af581 | 211 | static void output_alternate_entry_point (FILE *, rtx_insn *); |
6cf9ac28 AJ |
212 | static tree get_mem_expr_from_op (rtx, int *); |
213 | static void output_asm_operand_names (rtx *, int *, int); | |
e9a25f70 | 214 | #ifdef LEAF_REGISTERS |
fa7af581 | 215 | static void leaf_renumber_regs (rtx_insn *); |
e9a25f70 | 216 | #endif |
f1e52ed6 | 217 | #if HAVE_cc0 |
6cf9ac28 | 218 | static int alter_cond (rtx); |
e9a25f70 | 219 | #endif |
6cf9ac28 | 220 | static int align_fuzz (rtx, rtx, int, unsigned); |
27c07cc5 | 221 | static void collect_fn_hard_reg_usage (void); |
fa7af581 | 222 | static tree get_call_fndecl (rtx_insn *); |
3cf2715d DE |
223 | \f |
224 | /* Initialize data in final at the beginning of a compilation. */ | |
225 | ||
226 | void | |
6cf9ac28 | 227 | init_final (const char *filename ATTRIBUTE_UNUSED) |
3cf2715d | 228 | { |
3cf2715d | 229 | app_on = 0; |
3cf2715d DE |
230 | final_sequence = 0; |
231 | ||
232 | #ifdef ASSEMBLER_DIALECT | |
233 | dialect_number = ASSEMBLER_DIALECT; | |
234 | #endif | |
235 | } | |
236 | ||
08c148a8 | 237 | /* Default target function prologue and epilogue assembler output. |
b9f22704 | 238 | |
08c148a8 NB |
239 | If not overridden for epilogue code, then the function body itself |
240 | contains return instructions wherever needed. */ | |
241 | void | |
42776416 | 242 | default_function_pro_epilogue (FILE *) |
08c148a8 NB |
243 | { |
244 | } | |
245 | ||
14d11d40 IS |
246 | void |
247 | default_function_switched_text_sections (FILE *file ATTRIBUTE_UNUSED, | |
248 | tree decl ATTRIBUTE_UNUSED, | |
249 | bool new_is_cold ATTRIBUTE_UNUSED) | |
250 | { | |
251 | } | |
252 | ||
b4c25db2 NB |
253 | /* Default target hook that outputs nothing to a stream. */ |
254 | void | |
6cf9ac28 | 255 | no_asm_to_stream (FILE *file ATTRIBUTE_UNUSED) |
b4c25db2 NB |
256 | { |
257 | } | |
258 | ||
3cf2715d DE |
259 | /* Enable APP processing of subsequent output. |
260 | Used before the output from an `asm' statement. */ | |
261 | ||
262 | void | |
6cf9ac28 | 263 | app_enable (void) |
3cf2715d DE |
264 | { |
265 | if (! app_on) | |
266 | { | |
51723711 | 267 | fputs (ASM_APP_ON, asm_out_file); |
3cf2715d DE |
268 | app_on = 1; |
269 | } | |
270 | } | |
271 | ||
272 | /* Disable APP processing of subsequent output. | |
273 | Called from varasm.c before most kinds of output. */ | |
274 | ||
275 | void | |
6cf9ac28 | 276 | app_disable (void) |
3cf2715d DE |
277 | { |
278 | if (app_on) | |
279 | { | |
51723711 | 280 | fputs (ASM_APP_OFF, asm_out_file); |
3cf2715d DE |
281 | app_on = 0; |
282 | } | |
283 | } | |
284 | \f | |
f5d927c0 | 285 | /* Return the number of slots filled in the current |
3cf2715d DE |
286 | delayed branch sequence (we don't count the insn needing the |
287 | delay slot). Zero if not in a delayed branch sequence. */ | |
288 | ||
3cf2715d | 289 | int |
6cf9ac28 | 290 | dbr_sequence_length (void) |
3cf2715d DE |
291 | { |
292 | if (final_sequence != 0) | |
293 | return XVECLEN (final_sequence, 0) - 1; | |
294 | else | |
295 | return 0; | |
296 | } | |
3cf2715d DE |
297 | \f |
298 | /* The next two pages contain routines used to compute the length of an insn | |
299 | and to shorten branches. */ | |
300 | ||
301 | /* Arrays for insn lengths, and addresses. The latter is referenced by | |
302 | `insn_current_length'. */ | |
303 | ||
addd7df6 | 304 | static int *insn_lengths; |
9d98a694 | 305 | |
9771b263 | 306 | vec<int> insn_addresses_; |
3cf2715d | 307 | |
ea3cbda5 R |
308 | /* Max uid for which the above arrays are valid. */ |
309 | static int insn_lengths_max_uid; | |
310 | ||
3cf2715d DE |
311 | /* Address of insn being processed. Used by `insn_current_length'. */ |
312 | int insn_current_address; | |
313 | ||
fc470718 R |
314 | /* Address of insn being processed in previous iteration. */ |
315 | int insn_last_address; | |
316 | ||
d6a7951f | 317 | /* known invariant alignment of insn being processed. */ |
fc470718 R |
318 | int insn_current_align; |
319 | ||
95707627 R |
320 | /* After shorten_branches, for any insn, uid_align[INSN_UID (insn)] |
321 | gives the next following alignment insn that increases the known | |
322 | alignment, or NULL_RTX if there is no such insn. | |
323 | For any alignment obtained this way, we can again index uid_align with | |
324 | its uid to obtain the next following align that in turn increases the | |
325 | alignment, till we reach NULL_RTX; the sequence obtained this way | |
326 | for each insn we'll call the alignment chain of this insn in the following | |
327 | comments. */ | |
328 | ||
f5d927c0 KH |
329 | struct label_alignment |
330 | { | |
9e423e6d JW |
331 | short alignment; |
332 | short max_skip; | |
333 | }; | |
334 | ||
335 | static rtx *uid_align; | |
336 | static int *uid_shuid; | |
337 | static struct label_alignment *label_align; | |
95707627 | 338 | |
3cf2715d DE |
339 | /* Indicate that branch shortening hasn't yet been done. */ |
340 | ||
341 | void | |
6cf9ac28 | 342 | init_insn_lengths (void) |
3cf2715d | 343 | { |
95707627 R |
344 | if (uid_shuid) |
345 | { | |
346 | free (uid_shuid); | |
347 | uid_shuid = 0; | |
348 | } | |
349 | if (insn_lengths) | |
350 | { | |
351 | free (insn_lengths); | |
352 | insn_lengths = 0; | |
ea3cbda5 | 353 | insn_lengths_max_uid = 0; |
95707627 | 354 | } |
d327457f JR |
355 | if (HAVE_ATTR_length) |
356 | INSN_ADDRESSES_FREE (); | |
95707627 R |
357 | if (uid_align) |
358 | { | |
359 | free (uid_align); | |
360 | uid_align = 0; | |
361 | } | |
3cf2715d DE |
362 | } |
363 | ||
364 | /* Obtain the current length of an insn. If branch shortening has been done, | |
6fc0bb99 | 365 | get its actual length. Otherwise, use FALLBACK_FN to calculate the |
070a7956 | 366 | length. */ |
4df199d1 | 367 | static int |
84034c69 | 368 | get_attr_length_1 (rtx_insn *insn, int (*fallback_fn) (rtx_insn *)) |
3cf2715d | 369 | { |
3cf2715d DE |
370 | rtx body; |
371 | int i; | |
372 | int length = 0; | |
373 | ||
d327457f JR |
374 | if (!HAVE_ATTR_length) |
375 | return 0; | |
376 | ||
ea3cbda5 | 377 | if (insn_lengths_max_uid > INSN_UID (insn)) |
3cf2715d DE |
378 | return insn_lengths[INSN_UID (insn)]; |
379 | else | |
380 | switch (GET_CODE (insn)) | |
381 | { | |
382 | case NOTE: | |
383 | case BARRIER: | |
384 | case CODE_LABEL: | |
b5b8b0ac | 385 | case DEBUG_INSN: |
3cf2715d DE |
386 | return 0; |
387 | ||
388 | case CALL_INSN: | |
3cf2715d | 389 | case JUMP_INSN: |
39718607 | 390 | length = fallback_fn (insn); |
3cf2715d DE |
391 | break; |
392 | ||
393 | case INSN: | |
394 | body = PATTERN (insn); | |
395 | if (GET_CODE (body) == USE || GET_CODE (body) == CLOBBER) | |
396 | return 0; | |
397 | ||
398 | else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0) | |
070a7956 | 399 | length = asm_insn_count (body) * fallback_fn (insn); |
e429a50b DM |
400 | else if (rtx_sequence *seq = dyn_cast <rtx_sequence *> (body)) |
401 | for (i = 0; i < seq->len (); i++) | |
402 | length += get_attr_length_1 (seq->insn (i), fallback_fn); | |
3cf2715d | 403 | else |
070a7956 | 404 | length = fallback_fn (insn); |
e9a25f70 JL |
405 | break; |
406 | ||
407 | default: | |
408 | break; | |
3cf2715d DE |
409 | } |
410 | ||
411 | #ifdef ADJUST_INSN_LENGTH | |
412 | ADJUST_INSN_LENGTH (insn, length); | |
413 | #endif | |
414 | return length; | |
3cf2715d | 415 | } |
070a7956 R |
416 | |
417 | /* Obtain the current length of an insn. If branch shortening has been done, | |
418 | get its actual length. Otherwise, get its maximum length. */ | |
419 | int | |
84034c69 | 420 | get_attr_length (rtx_insn *insn) |
070a7956 R |
421 | { |
422 | return get_attr_length_1 (insn, insn_default_length); | |
423 | } | |
424 | ||
425 | /* Obtain the current length of an insn. If branch shortening has been done, | |
426 | get its actual length. Otherwise, get its minimum length. */ | |
427 | int | |
84034c69 | 428 | get_attr_min_length (rtx_insn *insn) |
070a7956 R |
429 | { |
430 | return get_attr_length_1 (insn, insn_min_length); | |
431 | } | |
3cf2715d | 432 | \f |
fc470718 R |
433 | /* Code to handle alignment inside shorten_branches. */ |
434 | ||
435 | /* Here is an explanation how the algorithm in align_fuzz can give | |
436 | proper results: | |
437 | ||
438 | Call a sequence of instructions beginning with alignment point X | |
439 | and continuing until the next alignment point `block X'. When `X' | |
f5d927c0 | 440 | is used in an expression, it means the alignment value of the |
fc470718 | 441 | alignment point. |
f5d927c0 | 442 | |
fc470718 R |
443 | Call the distance between the start of the first insn of block X, and |
444 | the end of the last insn of block X `IX', for the `inner size of X'. | |
445 | This is clearly the sum of the instruction lengths. | |
f5d927c0 | 446 | |
fc470718 R |
447 | Likewise with the next alignment-delimited block following X, which we |
448 | shall call block Y. | |
f5d927c0 | 449 | |
fc470718 R |
450 | Call the distance between the start of the first insn of block X, and |
451 | the start of the first insn of block Y `OX', for the `outer size of X'. | |
f5d927c0 | 452 | |
fc470718 | 453 | The estimated padding is then OX - IX. |
f5d927c0 | 454 | |
fc470718 | 455 | OX can be safely estimated as |
f5d927c0 | 456 | |
fc470718 R |
457 | if (X >= Y) |
458 | OX = round_up(IX, Y) | |
459 | else | |
460 | OX = round_up(IX, X) + Y - X | |
f5d927c0 | 461 | |
fc470718 R |
462 | Clearly est(IX) >= real(IX), because that only depends on the |
463 | instruction lengths, and those being overestimated is a given. | |
f5d927c0 | 464 | |
fc470718 R |
465 | Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so |
466 | we needn't worry about that when thinking about OX. | |
f5d927c0 | 467 | |
fc470718 R |
468 | When X >= Y, the alignment provided by Y adds no uncertainty factor |
469 | for branch ranges starting before X, so we can just round what we have. | |
470 | But when X < Y, we don't know anything about the, so to speak, | |
471 | `middle bits', so we have to assume the worst when aligning up from an | |
472 | address mod X to one mod Y, which is Y - X. */ | |
473 | ||
474 | #ifndef LABEL_ALIGN | |
efa3896a | 475 | #define LABEL_ALIGN(LABEL) align_labels_log |
fc470718 R |
476 | #endif |
477 | ||
478 | #ifndef LOOP_ALIGN | |
efa3896a | 479 | #define LOOP_ALIGN(LABEL) align_loops_log |
fc470718 R |
480 | #endif |
481 | ||
482 | #ifndef LABEL_ALIGN_AFTER_BARRIER | |
340f7e7c | 483 | #define LABEL_ALIGN_AFTER_BARRIER(LABEL) 0 |
fc470718 R |
484 | #endif |
485 | ||
247a370b JH |
486 | #ifndef JUMP_ALIGN |
487 | #define JUMP_ALIGN(LABEL) align_jumps_log | |
488 | #endif | |
489 | ||
ad0c4c36 | 490 | int |
9158a0d8 | 491 | default_label_align_after_barrier_max_skip (rtx_insn *insn ATTRIBUTE_UNUSED) |
ad0c4c36 DD |
492 | { |
493 | return 0; | |
494 | } | |
495 | ||
496 | int | |
9158a0d8 | 497 | default_loop_align_max_skip (rtx_insn *insn ATTRIBUTE_UNUSED) |
ad0c4c36 DD |
498 | { |
499 | return align_loops_max_skip; | |
500 | } | |
501 | ||
502 | int | |
9158a0d8 | 503 | default_label_align_max_skip (rtx_insn *insn ATTRIBUTE_UNUSED) |
ad0c4c36 DD |
504 | { |
505 | return align_labels_max_skip; | |
506 | } | |
507 | ||
508 | int | |
9158a0d8 | 509 | default_jump_align_max_skip (rtx_insn *insn ATTRIBUTE_UNUSED) |
ad0c4c36 DD |
510 | { |
511 | return align_jumps_max_skip; | |
512 | } | |
9e423e6d | 513 | |
fc470718 | 514 | #ifndef ADDR_VEC_ALIGN |
ca3075bd | 515 | static int |
d305ca88 | 516 | final_addr_vec_align (rtx_jump_table_data *addr_vec) |
fc470718 | 517 | { |
d305ca88 | 518 | int align = GET_MODE_SIZE (addr_vec->get_data_mode ()); |
fc470718 R |
519 | |
520 | if (align > BIGGEST_ALIGNMENT / BITS_PER_UNIT) | |
521 | align = BIGGEST_ALIGNMENT / BITS_PER_UNIT; | |
2a841588 | 522 | return exact_log2 (align); |
fc470718 R |
523 | |
524 | } | |
f5d927c0 | 525 | |
fc470718 R |
526 | #define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC) |
527 | #endif | |
528 | ||
529 | #ifndef INSN_LENGTH_ALIGNMENT | |
530 | #define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log | |
531 | #endif | |
532 | ||
fc470718 R |
533 | #define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)]) |
534 | ||
de7987a6 | 535 | static int min_labelno, max_labelno; |
fc470718 R |
536 | |
537 | #define LABEL_TO_ALIGNMENT(LABEL) \ | |
9e423e6d JW |
538 | (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment) |
539 | ||
540 | #define LABEL_TO_MAX_SKIP(LABEL) \ | |
541 | (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip) | |
fc470718 R |
542 | |
543 | /* For the benefit of port specific code do this also as a function. */ | |
f5d927c0 | 544 | |
fc470718 | 545 | int |
6cf9ac28 | 546 | label_to_alignment (rtx label) |
fc470718 | 547 | { |
40a8f07a JJ |
548 | if (CODE_LABEL_NUMBER (label) <= max_labelno) |
549 | return LABEL_TO_ALIGNMENT (label); | |
550 | return 0; | |
551 | } | |
552 | ||
553 | int | |
554 | label_to_max_skip (rtx label) | |
555 | { | |
556 | if (CODE_LABEL_NUMBER (label) <= max_labelno) | |
557 | return LABEL_TO_MAX_SKIP (label); | |
558 | return 0; | |
fc470718 R |
559 | } |
560 | ||
fc470718 R |
561 | /* The differences in addresses |
562 | between a branch and its target might grow or shrink depending on | |
563 | the alignment the start insn of the range (the branch for a forward | |
564 | branch or the label for a backward branch) starts out on; if these | |
565 | differences are used naively, they can even oscillate infinitely. | |
566 | We therefore want to compute a 'worst case' address difference that | |
567 | is independent of the alignment the start insn of the range end | |
568 | up on, and that is at least as large as the actual difference. | |
569 | The function align_fuzz calculates the amount we have to add to the | |
570 | naively computed difference, by traversing the part of the alignment | |
571 | chain of the start insn of the range that is in front of the end insn | |
572 | of the range, and considering for each alignment the maximum amount | |
573 | that it might contribute to a size increase. | |
574 | ||
575 | For casesi tables, we also want to know worst case minimum amounts of | |
576 | address difference, in case a machine description wants to introduce | |
577 | some common offset that is added to all offsets in a table. | |
d6a7951f | 578 | For this purpose, align_fuzz with a growth argument of 0 computes the |
fc470718 R |
579 | appropriate adjustment. */ |
580 | ||
fc470718 R |
581 | /* Compute the maximum delta by which the difference of the addresses of |
582 | START and END might grow / shrink due to a different address for start | |
583 | which changes the size of alignment insns between START and END. | |
584 | KNOWN_ALIGN_LOG is the alignment known for START. | |
585 | GROWTH should be ~0 if the objective is to compute potential code size | |
586 | increase, and 0 if the objective is to compute potential shrink. | |
587 | The return value is undefined for any other value of GROWTH. */ | |
f5d927c0 | 588 | |
ca3075bd | 589 | static int |
6cf9ac28 | 590 | align_fuzz (rtx start, rtx end, int known_align_log, unsigned int growth) |
fc470718 R |
591 | { |
592 | int uid = INSN_UID (start); | |
593 | rtx align_label; | |
594 | int known_align = 1 << known_align_log; | |
595 | int end_shuid = INSN_SHUID (end); | |
596 | int fuzz = 0; | |
597 | ||
598 | for (align_label = uid_align[uid]; align_label; align_label = uid_align[uid]) | |
599 | { | |
600 | int align_addr, new_align; | |
601 | ||
602 | uid = INSN_UID (align_label); | |
9d98a694 | 603 | align_addr = INSN_ADDRESSES (uid) - insn_lengths[uid]; |
fc470718 R |
604 | if (uid_shuid[uid] > end_shuid) |
605 | break; | |
606 | known_align_log = LABEL_TO_ALIGNMENT (align_label); | |
607 | new_align = 1 << known_align_log; | |
608 | if (new_align < known_align) | |
609 | continue; | |
610 | fuzz += (-align_addr ^ growth) & (new_align - known_align); | |
611 | known_align = new_align; | |
612 | } | |
613 | return fuzz; | |
614 | } | |
615 | ||
616 | /* Compute a worst-case reference address of a branch so that it | |
617 | can be safely used in the presence of aligned labels. Since the | |
618 | size of the branch itself is unknown, the size of the branch is | |
619 | not included in the range. I.e. for a forward branch, the reference | |
620 | address is the end address of the branch as known from the previous | |
621 | branch shortening pass, minus a value to account for possible size | |
622 | increase due to alignment. For a backward branch, it is the start | |
623 | address of the branch as known from the current pass, plus a value | |
624 | to account for possible size increase due to alignment. | |
625 | NB.: Therefore, the maximum offset allowed for backward branches needs | |
626 | to exclude the branch size. */ | |
f5d927c0 | 627 | |
fc470718 | 628 | int |
8ba24b7b | 629 | insn_current_reference_address (rtx_insn *branch) |
fc470718 | 630 | { |
e67d1102 | 631 | rtx dest; |
5527bf14 RH |
632 | int seq_uid; |
633 | ||
634 | if (! INSN_ADDRESSES_SET_P ()) | |
635 | return 0; | |
636 | ||
e67d1102 | 637 | rtx_insn *seq = NEXT_INSN (PREV_INSN (branch)); |
5527bf14 | 638 | seq_uid = INSN_UID (seq); |
4b4bf941 | 639 | if (!JUMP_P (branch)) |
fc470718 R |
640 | /* This can happen for example on the PA; the objective is to know the |
641 | offset to address something in front of the start of the function. | |
642 | Thus, we can treat it like a backward branch. | |
643 | We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than | |
644 | any alignment we'd encounter, so we skip the call to align_fuzz. */ | |
645 | return insn_current_address; | |
646 | dest = JUMP_LABEL (branch); | |
5527bf14 | 647 | |
b9f22704 | 648 | /* BRANCH has no proper alignment chain set, so use SEQ. |
afc6898e BS |
649 | BRANCH also has no INSN_SHUID. */ |
650 | if (INSN_SHUID (seq) < INSN_SHUID (dest)) | |
fc470718 | 651 | { |
f5d927c0 | 652 | /* Forward branch. */ |
fc470718 | 653 | return (insn_last_address + insn_lengths[seq_uid] |
26024475 | 654 | - align_fuzz (seq, dest, length_unit_log, ~0)); |
fc470718 R |
655 | } |
656 | else | |
657 | { | |
f5d927c0 | 658 | /* Backward branch. */ |
fc470718 | 659 | return (insn_current_address |
923f7cf9 | 660 | + align_fuzz (dest, seq, length_unit_log, ~0)); |
fc470718 R |
661 | } |
662 | } | |
fc470718 | 663 | \f |
6786ba1a | 664 | /* Compute branch alignments based on CFG profile. */ |
65727068 | 665 | |
e855c69d | 666 | unsigned int |
6cf9ac28 | 667 | compute_alignments (void) |
247a370b | 668 | { |
247a370b | 669 | int log, max_skip, max_log; |
e0082a72 | 670 | basic_block bb; |
247a370b JH |
671 | |
672 | if (label_align) | |
673 | { | |
674 | free (label_align); | |
675 | label_align = 0; | |
676 | } | |
677 | ||
678 | max_labelno = max_label_num (); | |
679 | min_labelno = get_first_label_num (); | |
5ed6ace5 | 680 | label_align = XCNEWVEC (struct label_alignment, max_labelno - min_labelno + 1); |
247a370b JH |
681 | |
682 | /* If not optimizing or optimizing for size, don't assign any alignments. */ | |
efd8f750 | 683 | if (! optimize || optimize_function_for_size_p (cfun)) |
c2924966 | 684 | return 0; |
247a370b | 685 | |
edbed3d3 JH |
686 | if (dump_file) |
687 | { | |
532aafad | 688 | dump_reg_info (dump_file); |
edbed3d3 JH |
689 | dump_flow_info (dump_file, TDF_DETAILS); |
690 | flow_loops_dump (dump_file, NULL, 1); | |
edbed3d3 | 691 | } |
58082ff6 | 692 | loop_optimizer_init (AVOID_CFG_MODIFICATIONS); |
6786ba1a JH |
693 | profile_count count_threshold = cfun->cfg->count_max.apply_scale |
694 | (1, PARAM_VALUE (PARAM_ALIGN_THRESHOLD)); | |
edbed3d3 JH |
695 | |
696 | if (dump_file) | |
6786ba1a JH |
697 | { |
698 | fprintf (dump_file, "count_max: "); | |
699 | cfun->cfg->count_max.dump (dump_file); | |
700 | fprintf (dump_file, "\n"); | |
701 | } | |
11cd3bed | 702 | FOR_EACH_BB_FN (bb, cfun) |
247a370b | 703 | { |
fa7af581 | 704 | rtx_insn *label = BB_HEAD (bb); |
6786ba1a | 705 | bool has_fallthru = 0; |
247a370b | 706 | edge e; |
628f6a4e | 707 | edge_iterator ei; |
247a370b | 708 | |
4b4bf941 | 709 | if (!LABEL_P (label) |
8bcf15f6 | 710 | || optimize_bb_for_size_p (bb)) |
edbed3d3 JH |
711 | { |
712 | if (dump_file) | |
c3284718 | 713 | fprintf (dump_file, |
6786ba1a JH |
714 | "BB %4i loop %2i loop_depth %2i skipped.\n", |
715 | bb->index, | |
e7a74006 | 716 | bb->loop_father->num, |
c3284718 | 717 | bb_loop_depth (bb)); |
edbed3d3 JH |
718 | continue; |
719 | } | |
247a370b | 720 | max_log = LABEL_ALIGN (label); |
ad0c4c36 | 721 | max_skip = targetm.asm_out.label_align_max_skip (label); |
6786ba1a JH |
722 | profile_count fallthru_count = profile_count::zero (); |
723 | profile_count branch_count = profile_count::zero (); | |
247a370b | 724 | |
628f6a4e | 725 | FOR_EACH_EDGE (e, ei, bb->preds) |
247a370b JH |
726 | { |
727 | if (e->flags & EDGE_FALLTHRU) | |
6786ba1a | 728 | has_fallthru = 1, fallthru_count += e->count (); |
247a370b | 729 | else |
6786ba1a | 730 | branch_count += e->count (); |
247a370b | 731 | } |
edbed3d3 JH |
732 | if (dump_file) |
733 | { | |
6786ba1a JH |
734 | fprintf (dump_file, "BB %4i loop %2i loop_depth" |
735 | " %2i fall ", | |
736 | bb->index, bb->loop_father->num, | |
737 | bb_loop_depth (bb)); | |
738 | fallthru_count.dump (dump_file); | |
739 | fprintf (dump_file, " branch "); | |
740 | branch_count.dump (dump_file); | |
edbed3d3 JH |
741 | if (!bb->loop_father->inner && bb->loop_father->num) |
742 | fprintf (dump_file, " inner_loop"); | |
743 | if (bb->loop_father->header == bb) | |
744 | fprintf (dump_file, " loop_header"); | |
745 | fprintf (dump_file, "\n"); | |
746 | } | |
6786ba1a JH |
747 | if (!fallthru_count.initialized_p () || !branch_count.initialized_p ()) |
748 | continue; | |
247a370b | 749 | |
f63d1bf7 | 750 | /* There are two purposes to align block with no fallthru incoming edge: |
247a370b | 751 | 1) to avoid fetch stalls when branch destination is near cache boundary |
d6a7951f | 752 | 2) to improve cache efficiency in case the previous block is not executed |
247a370b JH |
753 | (so it does not need to be in the cache). |
754 | ||
755 | We to catch first case, we align frequently executed blocks. | |
756 | To catch the second, we align blocks that are executed more frequently | |
eaec9b3d | 757 | than the predecessor and the predecessor is likely to not be executed |
247a370b JH |
758 | when function is called. */ |
759 | ||
760 | if (!has_fallthru | |
6786ba1a JH |
761 | && (branch_count > count_threshold |
762 | || (bb->count > bb->prev_bb->count.apply_scale (10, 1) | |
763 | && (bb->prev_bb->count | |
764 | <= ENTRY_BLOCK_PTR_FOR_FN (cfun) | |
765 | ->count.apply_scale (1, 2))))) | |
247a370b JH |
766 | { |
767 | log = JUMP_ALIGN (label); | |
edbed3d3 | 768 | if (dump_file) |
c3284718 | 769 | fprintf (dump_file, " jump alignment added.\n"); |
247a370b JH |
770 | if (max_log < log) |
771 | { | |
772 | max_log = log; | |
ad0c4c36 | 773 | max_skip = targetm.asm_out.jump_align_max_skip (label); |
247a370b JH |
774 | } |
775 | } | |
776 | /* In case block is frequent and reached mostly by non-fallthru edge, | |
09da1532 | 777 | align it. It is most likely a first block of loop. */ |
247a370b | 778 | if (has_fallthru |
82b9c015 EB |
779 | && !(single_succ_p (bb) |
780 | && single_succ (bb) == EXIT_BLOCK_PTR_FOR_FN (cfun)) | |
efd8f750 | 781 | && optimize_bb_for_speed_p (bb) |
6786ba1a JH |
782 | && branch_count + fallthru_count > count_threshold |
783 | && (branch_count | |
784 | > fallthru_count.apply_scale | |
785 | (PARAM_VALUE (PARAM_ALIGN_LOOP_ITERATIONS), 1))) | |
247a370b JH |
786 | { |
787 | log = LOOP_ALIGN (label); | |
edbed3d3 | 788 | if (dump_file) |
c3284718 | 789 | fprintf (dump_file, " internal loop alignment added.\n"); |
247a370b JH |
790 | if (max_log < log) |
791 | { | |
792 | max_log = log; | |
ad0c4c36 | 793 | max_skip = targetm.asm_out.loop_align_max_skip (label); |
247a370b JH |
794 | } |
795 | } | |
796 | LABEL_TO_ALIGNMENT (label) = max_log; | |
797 | LABEL_TO_MAX_SKIP (label) = max_skip; | |
798 | } | |
edbed3d3 | 799 | |
58082ff6 PH |
800 | loop_optimizer_finalize (); |
801 | free_dominance_info (CDI_DOMINATORS); | |
c2924966 | 802 | return 0; |
247a370b | 803 | } |
ef330312 | 804 | |
5cf6635b EB |
805 | /* Grow the LABEL_ALIGN array after new labels are created. */ |
806 | ||
807 | static void | |
808 | grow_label_align (void) | |
809 | { | |
810 | int old = max_labelno; | |
811 | int n_labels; | |
812 | int n_old_labels; | |
813 | ||
814 | max_labelno = max_label_num (); | |
815 | ||
816 | n_labels = max_labelno - min_labelno + 1; | |
817 | n_old_labels = old - min_labelno + 1; | |
818 | ||
819 | label_align = XRESIZEVEC (struct label_alignment, label_align, n_labels); | |
820 | ||
821 | /* Range of labels grows monotonically in the function. Failing here | |
822 | means that the initialization of array got lost. */ | |
823 | gcc_assert (n_old_labels <= n_labels); | |
824 | ||
825 | memset (label_align + n_old_labels, 0, | |
826 | (n_labels - n_old_labels) * sizeof (struct label_alignment)); | |
827 | } | |
828 | ||
829 | /* Update the already computed alignment information. LABEL_PAIRS is a vector | |
830 | made up of pairs of labels for which the alignment information of the first | |
831 | element will be copied from that of the second element. */ | |
832 | ||
833 | void | |
834 | update_alignments (vec<rtx> &label_pairs) | |
835 | { | |
836 | unsigned int i = 0; | |
33fd5699 | 837 | rtx iter, label = NULL_RTX; |
5cf6635b EB |
838 | |
839 | if (max_labelno != max_label_num ()) | |
840 | grow_label_align (); | |
841 | ||
842 | FOR_EACH_VEC_ELT (label_pairs, i, iter) | |
843 | if (i & 1) | |
844 | { | |
845 | LABEL_TO_ALIGNMENT (label) = LABEL_TO_ALIGNMENT (iter); | |
846 | LABEL_TO_MAX_SKIP (label) = LABEL_TO_MAX_SKIP (iter); | |
847 | } | |
848 | else | |
849 | label = iter; | |
850 | } | |
851 | ||
27a4cd48 DM |
852 | namespace { |
853 | ||
854 | const pass_data pass_data_compute_alignments = | |
ef330312 | 855 | { |
27a4cd48 DM |
856 | RTL_PASS, /* type */ |
857 | "alignments", /* name */ | |
858 | OPTGROUP_NONE, /* optinfo_flags */ | |
27a4cd48 DM |
859 | TV_NONE, /* tv_id */ |
860 | 0, /* properties_required */ | |
861 | 0, /* properties_provided */ | |
862 | 0, /* properties_destroyed */ | |
863 | 0, /* todo_flags_start */ | |
3bea341f | 864 | 0, /* todo_flags_finish */ |
ef330312 PB |
865 | }; |
866 | ||
27a4cd48 DM |
867 | class pass_compute_alignments : public rtl_opt_pass |
868 | { | |
869 | public: | |
c3284718 RS |
870 | pass_compute_alignments (gcc::context *ctxt) |
871 | : rtl_opt_pass (pass_data_compute_alignments, ctxt) | |
27a4cd48 DM |
872 | {} |
873 | ||
874 | /* opt_pass methods: */ | |
be55bfe6 | 875 | virtual unsigned int execute (function *) { return compute_alignments (); } |
27a4cd48 DM |
876 | |
877 | }; // class pass_compute_alignments | |
878 | ||
879 | } // anon namespace | |
880 | ||
881 | rtl_opt_pass * | |
882 | make_pass_compute_alignments (gcc::context *ctxt) | |
883 | { | |
884 | return new pass_compute_alignments (ctxt); | |
885 | } | |
886 | ||
247a370b | 887 | \f |
3cf2715d DE |
888 | /* Make a pass over all insns and compute their actual lengths by shortening |
889 | any branches of variable length if possible. */ | |
890 | ||
fc470718 R |
891 | /* shorten_branches might be called multiple times: for example, the SH |
892 | port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG. | |
893 | In order to do this, it needs proper length information, which it obtains | |
894 | by calling shorten_branches. This cannot be collapsed with | |
d6a7951f | 895 | shorten_branches itself into a single pass unless we also want to integrate |
fc470718 R |
896 | reorg.c, since the branch splitting exposes new instructions with delay |
897 | slots. */ | |
898 | ||
3cf2715d | 899 | void |
49922db8 | 900 | shorten_branches (rtx_insn *first) |
3cf2715d | 901 | { |
fa7af581 | 902 | rtx_insn *insn; |
fc470718 R |
903 | int max_uid; |
904 | int i; | |
fc470718 | 905 | int max_log; |
9e423e6d | 906 | int max_skip; |
fc470718 | 907 | #define MAX_CODE_ALIGN 16 |
fa7af581 | 908 | rtx_insn *seq; |
3cf2715d | 909 | int something_changed = 1; |
3cf2715d DE |
910 | char *varying_length; |
911 | rtx body; | |
912 | int uid; | |
fc470718 | 913 | rtx align_tab[MAX_CODE_ALIGN]; |
3cf2715d | 914 | |
3446405d JH |
915 | /* Compute maximum UID and allocate label_align / uid_shuid. */ |
916 | max_uid = get_max_uid (); | |
d9b6874b | 917 | |
471854f8 | 918 | /* Free uid_shuid before reallocating it. */ |
07a1f795 | 919 | free (uid_shuid); |
b0efb46b | 920 | |
5ed6ace5 | 921 | uid_shuid = XNEWVEC (int, max_uid); |
25e22dc0 | 922 | |
247a370b | 923 | if (max_labelno != max_label_num ()) |
5cf6635b | 924 | grow_label_align (); |
247a370b | 925 | |
fc470718 R |
926 | /* Initialize label_align and set up uid_shuid to be strictly |
927 | monotonically rising with insn order. */ | |
e2faec75 R |
928 | /* We use max_log here to keep track of the maximum alignment we want to |
929 | impose on the next CODE_LABEL (or the current one if we are processing | |
930 | the CODE_LABEL itself). */ | |
f5d927c0 | 931 | |
9e423e6d JW |
932 | max_log = 0; |
933 | max_skip = 0; | |
934 | ||
935 | for (insn = get_insns (), i = 1; insn; insn = NEXT_INSN (insn)) | |
fc470718 R |
936 | { |
937 | int log; | |
938 | ||
939 | INSN_SHUID (insn) = i++; | |
2c3c49de | 940 | if (INSN_P (insn)) |
80838531 | 941 | continue; |
b0efb46b | 942 | |
d305ca88 | 943 | if (rtx_code_label *label = dyn_cast <rtx_code_label *> (insn)) |
fc470718 | 944 | { |
247a370b | 945 | /* Merge in alignments computed by compute_alignments. */ |
d305ca88 | 946 | log = LABEL_TO_ALIGNMENT (label); |
247a370b JH |
947 | if (max_log < log) |
948 | { | |
949 | max_log = log; | |
d305ca88 | 950 | max_skip = LABEL_TO_MAX_SKIP (label); |
247a370b | 951 | } |
fc470718 | 952 | |
d305ca88 RS |
953 | rtx_jump_table_data *table = jump_table_for_label (label); |
954 | if (!table) | |
9e423e6d | 955 | { |
d305ca88 | 956 | log = LABEL_ALIGN (label); |
0676c393 MM |
957 | if (max_log < log) |
958 | { | |
959 | max_log = log; | |
d305ca88 | 960 | max_skip = targetm.asm_out.label_align_max_skip (label); |
0676c393 | 961 | } |
9e423e6d | 962 | } |
75197b37 BS |
963 | /* ADDR_VECs only take room if read-only data goes into the text |
964 | section. */ | |
0676c393 MM |
965 | if ((JUMP_TABLES_IN_TEXT_SECTION |
966 | || readonly_data_section == text_section) | |
d305ca88 | 967 | && table) |
0676c393 | 968 | { |
d305ca88 | 969 | log = ADDR_VEC_ALIGN (table); |
0676c393 MM |
970 | if (max_log < log) |
971 | { | |
972 | max_log = log; | |
d305ca88 | 973 | max_skip = targetm.asm_out.label_align_max_skip (label); |
0676c393 MM |
974 | } |
975 | } | |
d305ca88 RS |
976 | LABEL_TO_ALIGNMENT (label) = max_log; |
977 | LABEL_TO_MAX_SKIP (label) = max_skip; | |
fc470718 | 978 | max_log = 0; |
9e423e6d | 979 | max_skip = 0; |
fc470718 | 980 | } |
4b4bf941 | 981 | else if (BARRIER_P (insn)) |
fc470718 | 982 | { |
fa7af581 | 983 | rtx_insn *label; |
fc470718 | 984 | |
2c3c49de | 985 | for (label = insn; label && ! INSN_P (label); |
fc470718 | 986 | label = NEXT_INSN (label)) |
4b4bf941 | 987 | if (LABEL_P (label)) |
fc470718 R |
988 | { |
989 | log = LABEL_ALIGN_AFTER_BARRIER (insn); | |
990 | if (max_log < log) | |
9e423e6d JW |
991 | { |
992 | max_log = log; | |
ad0c4c36 | 993 | max_skip = targetm.asm_out.label_align_after_barrier_max_skip (label); |
9e423e6d | 994 | } |
fc470718 R |
995 | break; |
996 | } | |
997 | } | |
fc470718 | 998 | } |
d327457f JR |
999 | if (!HAVE_ATTR_length) |
1000 | return; | |
fc470718 R |
1001 | |
1002 | /* Allocate the rest of the arrays. */ | |
5ed6ace5 | 1003 | insn_lengths = XNEWVEC (int, max_uid); |
ea3cbda5 | 1004 | insn_lengths_max_uid = max_uid; |
af035616 R |
1005 | /* Syntax errors can lead to labels being outside of the main insn stream. |
1006 | Initialize insn_addresses, so that we get reproducible results. */ | |
9d98a694 | 1007 | INSN_ADDRESSES_ALLOC (max_uid); |
fc470718 | 1008 | |
5ed6ace5 | 1009 | varying_length = XCNEWVEC (char, max_uid); |
fc470718 R |
1010 | |
1011 | /* Initialize uid_align. We scan instructions | |
1012 | from end to start, and keep in align_tab[n] the last seen insn | |
1013 | that does an alignment of at least n+1, i.e. the successor | |
1014 | in the alignment chain for an insn that does / has a known | |
1015 | alignment of n. */ | |
5ed6ace5 | 1016 | uid_align = XCNEWVEC (rtx, max_uid); |
fc470718 | 1017 | |
f5d927c0 | 1018 | for (i = MAX_CODE_ALIGN; --i >= 0;) |
fc470718 R |
1019 | align_tab[i] = NULL_RTX; |
1020 | seq = get_last_insn (); | |
33f7f353 | 1021 | for (; seq; seq = PREV_INSN (seq)) |
fc470718 R |
1022 | { |
1023 | int uid = INSN_UID (seq); | |
1024 | int log; | |
4b4bf941 | 1025 | log = (LABEL_P (seq) ? LABEL_TO_ALIGNMENT (seq) : 0); |
fc470718 | 1026 | uid_align[uid] = align_tab[0]; |
fc470718 R |
1027 | if (log) |
1028 | { | |
1029 | /* Found an alignment label. */ | |
1030 | uid_align[uid] = align_tab[log]; | |
1031 | for (i = log - 1; i >= 0; i--) | |
1032 | align_tab[i] = seq; | |
1033 | } | |
33f7f353 | 1034 | } |
f6df08e6 JR |
1035 | |
1036 | /* When optimizing, we start assuming minimum length, and keep increasing | |
1037 | lengths as we find the need for this, till nothing changes. | |
1038 | When not optimizing, we start assuming maximum lengths, and | |
1039 | do a single pass to update the lengths. */ | |
1040 | bool increasing = optimize != 0; | |
1041 | ||
33f7f353 JR |
1042 | #ifdef CASE_VECTOR_SHORTEN_MODE |
1043 | if (optimize) | |
1044 | { | |
1045 | /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum | |
1046 | label fields. */ | |
1047 | ||
1048 | int min_shuid = INSN_SHUID (get_insns ()) - 1; | |
1049 | int max_shuid = INSN_SHUID (get_last_insn ()) + 1; | |
1050 | int rel; | |
1051 | ||
1052 | for (insn = first; insn != 0; insn = NEXT_INSN (insn)) | |
fc470718 | 1053 | { |
33f7f353 JR |
1054 | rtx min_lab = NULL_RTX, max_lab = NULL_RTX, pat; |
1055 | int len, i, min, max, insn_shuid; | |
1056 | int min_align; | |
1057 | addr_diff_vec_flags flags; | |
1058 | ||
34f0d87a | 1059 | if (! JUMP_TABLE_DATA_P (insn) |
33f7f353 JR |
1060 | || GET_CODE (PATTERN (insn)) != ADDR_DIFF_VEC) |
1061 | continue; | |
1062 | pat = PATTERN (insn); | |
1063 | len = XVECLEN (pat, 1); | |
0bccc606 | 1064 | gcc_assert (len > 0); |
33f7f353 JR |
1065 | min_align = MAX_CODE_ALIGN; |
1066 | for (min = max_shuid, max = min_shuid, i = len - 1; i >= 0; i--) | |
1067 | { | |
1068 | rtx lab = XEXP (XVECEXP (pat, 1, i), 0); | |
1069 | int shuid = INSN_SHUID (lab); | |
1070 | if (shuid < min) | |
1071 | { | |
1072 | min = shuid; | |
1073 | min_lab = lab; | |
1074 | } | |
1075 | if (shuid > max) | |
1076 | { | |
1077 | max = shuid; | |
1078 | max_lab = lab; | |
1079 | } | |
1080 | if (min_align > LABEL_TO_ALIGNMENT (lab)) | |
1081 | min_align = LABEL_TO_ALIGNMENT (lab); | |
1082 | } | |
4c33cb26 R |
1083 | XEXP (pat, 2) = gen_rtx_LABEL_REF (Pmode, min_lab); |
1084 | XEXP (pat, 3) = gen_rtx_LABEL_REF (Pmode, max_lab); | |
33f7f353 JR |
1085 | insn_shuid = INSN_SHUID (insn); |
1086 | rel = INSN_SHUID (XEXP (XEXP (pat, 0), 0)); | |
5921f276 | 1087 | memset (&flags, 0, sizeof (flags)); |
33f7f353 JR |
1088 | flags.min_align = min_align; |
1089 | flags.base_after_vec = rel > insn_shuid; | |
1090 | flags.min_after_vec = min > insn_shuid; | |
1091 | flags.max_after_vec = max > insn_shuid; | |
1092 | flags.min_after_base = min > rel; | |
1093 | flags.max_after_base = max > rel; | |
1094 | ADDR_DIFF_VEC_FLAGS (pat) = flags; | |
f6df08e6 JR |
1095 | |
1096 | if (increasing) | |
1097 | PUT_MODE (pat, CASE_VECTOR_SHORTEN_MODE (0, 0, pat)); | |
fc470718 R |
1098 | } |
1099 | } | |
33f7f353 | 1100 | #endif /* CASE_VECTOR_SHORTEN_MODE */ |
3cf2715d | 1101 | |
3cf2715d | 1102 | /* Compute initial lengths, addresses, and varying flags for each insn. */ |
84034c69 | 1103 | int (*length_fun) (rtx_insn *) = increasing ? insn_min_length : insn_default_length; |
f6df08e6 | 1104 | |
b816f339 | 1105 | for (insn_current_address = 0, insn = first; |
3cf2715d DE |
1106 | insn != 0; |
1107 | insn_current_address += insn_lengths[uid], insn = NEXT_INSN (insn)) | |
1108 | { | |
1109 | uid = INSN_UID (insn); | |
fc470718 | 1110 | |
3cf2715d | 1111 | insn_lengths[uid] = 0; |
fc470718 | 1112 | |
4b4bf941 | 1113 | if (LABEL_P (insn)) |
fc470718 R |
1114 | { |
1115 | int log = LABEL_TO_ALIGNMENT (insn); | |
1116 | if (log) | |
1117 | { | |
1118 | int align = 1 << log; | |
ecb06768 | 1119 | int new_address = (insn_current_address + align - 1) & -align; |
fc470718 | 1120 | insn_lengths[uid] = new_address - insn_current_address; |
fc470718 R |
1121 | } |
1122 | } | |
1123 | ||
5a09edba | 1124 | INSN_ADDRESSES (uid) = insn_current_address + insn_lengths[uid]; |
f5d927c0 | 1125 | |
4b4bf941 | 1126 | if (NOTE_P (insn) || BARRIER_P (insn) |
c3284718 | 1127 | || LABEL_P (insn) || DEBUG_INSN_P (insn)) |
3cf2715d | 1128 | continue; |
4654c0cf | 1129 | if (insn->deleted ()) |
04da53bd | 1130 | continue; |
3cf2715d DE |
1131 | |
1132 | body = PATTERN (insn); | |
d305ca88 | 1133 | if (rtx_jump_table_data *table = dyn_cast <rtx_jump_table_data *> (insn)) |
5a32a90c JR |
1134 | { |
1135 | /* This only takes room if read-only data goes into the text | |
1136 | section. */ | |
d6b5193b RS |
1137 | if (JUMP_TABLES_IN_TEXT_SECTION |
1138 | || readonly_data_section == text_section) | |
75197b37 BS |
1139 | insn_lengths[uid] = (XVECLEN (body, |
1140 | GET_CODE (body) == ADDR_DIFF_VEC) | |
d305ca88 | 1141 | * GET_MODE_SIZE (table->get_data_mode ())); |
5a32a90c | 1142 | /* Alignment is handled by ADDR_VEC_ALIGN. */ |
5a32a90c | 1143 | } |
a30caf5c | 1144 | else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0) |
3cf2715d | 1145 | insn_lengths[uid] = asm_insn_count (body) * insn_default_length (insn); |
e429a50b | 1146 | else if (rtx_sequence *body_seq = dyn_cast <rtx_sequence *> (body)) |
3cf2715d DE |
1147 | { |
1148 | int i; | |
1149 | int const_delay_slots; | |
e90bedf5 TS |
1150 | if (DELAY_SLOTS) |
1151 | const_delay_slots = const_num_delay_slots (body_seq->insn (0)); | |
1152 | else | |
1153 | const_delay_slots = 0; | |
1154 | ||
84034c69 | 1155 | int (*inner_length_fun) (rtx_insn *) |
f6df08e6 | 1156 | = const_delay_slots ? length_fun : insn_default_length; |
3cf2715d DE |
1157 | /* Inside a delay slot sequence, we do not do any branch shortening |
1158 | if the shortening could change the number of delay slots | |
0f41302f | 1159 | of the branch. */ |
e429a50b | 1160 | for (i = 0; i < body_seq->len (); i++) |
3cf2715d | 1161 | { |
e429a50b | 1162 | rtx_insn *inner_insn = body_seq->insn (i); |
3cf2715d DE |
1163 | int inner_uid = INSN_UID (inner_insn); |
1164 | int inner_length; | |
1165 | ||
5dd2902a | 1166 | if (GET_CODE (PATTERN (inner_insn)) == ASM_INPUT |
e429a50b | 1167 | || asm_noperands (PATTERN (inner_insn)) >= 0) |
3cf2715d DE |
1168 | inner_length = (asm_insn_count (PATTERN (inner_insn)) |
1169 | * insn_default_length (inner_insn)); | |
1170 | else | |
f6df08e6 | 1171 | inner_length = inner_length_fun (inner_insn); |
f5d927c0 | 1172 | |
3cf2715d DE |
1173 | insn_lengths[inner_uid] = inner_length; |
1174 | if (const_delay_slots) | |
1175 | { | |
1176 | if ((varying_length[inner_uid] | |
1177 | = insn_variable_length_p (inner_insn)) != 0) | |
1178 | varying_length[uid] = 1; | |
9d98a694 AO |
1179 | INSN_ADDRESSES (inner_uid) = (insn_current_address |
1180 | + insn_lengths[uid]); | |
3cf2715d DE |
1181 | } |
1182 | else | |
1183 | varying_length[inner_uid] = 0; | |
1184 | insn_lengths[uid] += inner_length; | |
1185 | } | |
1186 | } | |
1187 | else if (GET_CODE (body) != USE && GET_CODE (body) != CLOBBER) | |
1188 | { | |
f6df08e6 | 1189 | insn_lengths[uid] = length_fun (insn); |
3cf2715d DE |
1190 | varying_length[uid] = insn_variable_length_p (insn); |
1191 | } | |
1192 | ||
1193 | /* If needed, do any adjustment. */ | |
1194 | #ifdef ADJUST_INSN_LENGTH | |
1195 | ADJUST_INSN_LENGTH (insn, insn_lengths[uid]); | |
04b6000c | 1196 | if (insn_lengths[uid] < 0) |
c725bd79 | 1197 | fatal_insn ("negative insn length", insn); |
3cf2715d DE |
1198 | #endif |
1199 | } | |
1200 | ||
1201 | /* Now loop over all the insns finding varying length insns. For each, | |
1202 | get the current insn length. If it has changed, reflect the change. | |
1203 | When nothing changes for a full pass, we are done. */ | |
1204 | ||
1205 | while (something_changed) | |
1206 | { | |
1207 | something_changed = 0; | |
fc470718 | 1208 | insn_current_align = MAX_CODE_ALIGN - 1; |
b816f339 | 1209 | for (insn_current_address = 0, insn = first; |
3cf2715d DE |
1210 | insn != 0; |
1211 | insn = NEXT_INSN (insn)) | |
1212 | { | |
1213 | int new_length; | |
b729186a | 1214 | #ifdef ADJUST_INSN_LENGTH |
3cf2715d | 1215 | int tmp_length; |
b729186a | 1216 | #endif |
fc470718 | 1217 | int length_align; |
3cf2715d DE |
1218 | |
1219 | uid = INSN_UID (insn); | |
fc470718 | 1220 | |
d305ca88 | 1221 | if (rtx_code_label *label = dyn_cast <rtx_code_label *> (insn)) |
fc470718 | 1222 | { |
d305ca88 | 1223 | int log = LABEL_TO_ALIGNMENT (label); |
b0fe107e JM |
1224 | |
1225 | #ifdef CASE_VECTOR_SHORTEN_MODE | |
1226 | /* If the mode of a following jump table was changed, we | |
1227 | may need to update the alignment of this label. */ | |
d305ca88 RS |
1228 | |
1229 | if (JUMP_TABLES_IN_TEXT_SECTION | |
1230 | || readonly_data_section == text_section) | |
b0fe107e | 1231 | { |
d305ca88 RS |
1232 | rtx_jump_table_data *table = jump_table_for_label (label); |
1233 | if (table) | |
b0fe107e | 1234 | { |
d305ca88 RS |
1235 | int newlog = ADDR_VEC_ALIGN (table); |
1236 | if (newlog != log) | |
1237 | { | |
1238 | log = newlog; | |
1239 | LABEL_TO_ALIGNMENT (insn) = log; | |
1240 | something_changed = 1; | |
1241 | } | |
b0fe107e JM |
1242 | } |
1243 | } | |
1244 | #endif | |
1245 | ||
fc470718 R |
1246 | if (log > insn_current_align) |
1247 | { | |
1248 | int align = 1 << log; | |
ecb06768 | 1249 | int new_address= (insn_current_address + align - 1) & -align; |
fc470718 R |
1250 | insn_lengths[uid] = new_address - insn_current_address; |
1251 | insn_current_align = log; | |
1252 | insn_current_address = new_address; | |
1253 | } | |
1254 | else | |
1255 | insn_lengths[uid] = 0; | |
9d98a694 | 1256 | INSN_ADDRESSES (uid) = insn_current_address; |
fc470718 R |
1257 | continue; |
1258 | } | |
1259 | ||
1260 | length_align = INSN_LENGTH_ALIGNMENT (insn); | |
1261 | if (length_align < insn_current_align) | |
1262 | insn_current_align = length_align; | |
1263 | ||
9d98a694 AO |
1264 | insn_last_address = INSN_ADDRESSES (uid); |
1265 | INSN_ADDRESSES (uid) = insn_current_address; | |
fc470718 | 1266 | |
5e75ef4a | 1267 | #ifdef CASE_VECTOR_SHORTEN_MODE |
34f0d87a SB |
1268 | if (optimize |
1269 | && JUMP_TABLE_DATA_P (insn) | |
33f7f353 JR |
1270 | && GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC) |
1271 | { | |
d305ca88 | 1272 | rtx_jump_table_data *table = as_a <rtx_jump_table_data *> (insn); |
33f7f353 JR |
1273 | rtx body = PATTERN (insn); |
1274 | int old_length = insn_lengths[uid]; | |
b32d5189 DM |
1275 | rtx_insn *rel_lab = |
1276 | safe_as_a <rtx_insn *> (XEXP (XEXP (body, 0), 0)); | |
33f7f353 JR |
1277 | rtx min_lab = XEXP (XEXP (body, 2), 0); |
1278 | rtx max_lab = XEXP (XEXP (body, 3), 0); | |
9d98a694 AO |
1279 | int rel_addr = INSN_ADDRESSES (INSN_UID (rel_lab)); |
1280 | int min_addr = INSN_ADDRESSES (INSN_UID (min_lab)); | |
1281 | int max_addr = INSN_ADDRESSES (INSN_UID (max_lab)); | |
b32d5189 | 1282 | rtx_insn *prev; |
33f7f353 | 1283 | int rel_align = 0; |
950a3816 | 1284 | addr_diff_vec_flags flags; |
095a2d76 | 1285 | scalar_int_mode vec_mode; |
950a3816 KG |
1286 | |
1287 | /* Avoid automatic aggregate initialization. */ | |
1288 | flags = ADDR_DIFF_VEC_FLAGS (body); | |
33f7f353 JR |
1289 | |
1290 | /* Try to find a known alignment for rel_lab. */ | |
1291 | for (prev = rel_lab; | |
1292 | prev | |
1293 | && ! insn_lengths[INSN_UID (prev)] | |
1294 | && ! (varying_length[INSN_UID (prev)] & 1); | |
1295 | prev = PREV_INSN (prev)) | |
1296 | if (varying_length[INSN_UID (prev)] & 2) | |
1297 | { | |
1298 | rel_align = LABEL_TO_ALIGNMENT (prev); | |
1299 | break; | |
1300 | } | |
1301 | ||
1302 | /* See the comment on addr_diff_vec_flags in rtl.h for the | |
1303 | meaning of the flags values. base: REL_LAB vec: INSN */ | |
1304 | /* Anything after INSN has still addresses from the last | |
1305 | pass; adjust these so that they reflect our current | |
1306 | estimate for this pass. */ | |
1307 | if (flags.base_after_vec) | |
1308 | rel_addr += insn_current_address - insn_last_address; | |
1309 | if (flags.min_after_vec) | |
1310 | min_addr += insn_current_address - insn_last_address; | |
1311 | if (flags.max_after_vec) | |
1312 | max_addr += insn_current_address - insn_last_address; | |
1313 | /* We want to know the worst case, i.e. lowest possible value | |
1314 | for the offset of MIN_LAB. If MIN_LAB is after REL_LAB, | |
1315 | its offset is positive, and we have to be wary of code shrink; | |
1316 | otherwise, it is negative, and we have to be vary of code | |
1317 | size increase. */ | |
1318 | if (flags.min_after_base) | |
1319 | { | |
1320 | /* If INSN is between REL_LAB and MIN_LAB, the size | |
1321 | changes we are about to make can change the alignment | |
1322 | within the observed offset, therefore we have to break | |
1323 | it up into two parts that are independent. */ | |
1324 | if (! flags.base_after_vec && flags.min_after_vec) | |
1325 | { | |
1326 | min_addr -= align_fuzz (rel_lab, insn, rel_align, 0); | |
1327 | min_addr -= align_fuzz (insn, min_lab, 0, 0); | |
1328 | } | |
1329 | else | |
1330 | min_addr -= align_fuzz (rel_lab, min_lab, rel_align, 0); | |
1331 | } | |
1332 | else | |
1333 | { | |
1334 | if (flags.base_after_vec && ! flags.min_after_vec) | |
1335 | { | |
1336 | min_addr -= align_fuzz (min_lab, insn, 0, ~0); | |
1337 | min_addr -= align_fuzz (insn, rel_lab, 0, ~0); | |
1338 | } | |
1339 | else | |
1340 | min_addr -= align_fuzz (min_lab, rel_lab, 0, ~0); | |
1341 | } | |
1342 | /* Likewise, determine the highest lowest possible value | |
1343 | for the offset of MAX_LAB. */ | |
1344 | if (flags.max_after_base) | |
1345 | { | |
1346 | if (! flags.base_after_vec && flags.max_after_vec) | |
1347 | { | |
1348 | max_addr += align_fuzz (rel_lab, insn, rel_align, ~0); | |
1349 | max_addr += align_fuzz (insn, max_lab, 0, ~0); | |
1350 | } | |
1351 | else | |
1352 | max_addr += align_fuzz (rel_lab, max_lab, rel_align, ~0); | |
1353 | } | |
1354 | else | |
1355 | { | |
1356 | if (flags.base_after_vec && ! flags.max_after_vec) | |
1357 | { | |
1358 | max_addr += align_fuzz (max_lab, insn, 0, 0); | |
1359 | max_addr += align_fuzz (insn, rel_lab, 0, 0); | |
1360 | } | |
1361 | else | |
1362 | max_addr += align_fuzz (max_lab, rel_lab, 0, 0); | |
1363 | } | |
f6df08e6 JR |
1364 | vec_mode = CASE_VECTOR_SHORTEN_MODE (min_addr - rel_addr, |
1365 | max_addr - rel_addr, body); | |
1366 | if (!increasing | |
1367 | || (GET_MODE_SIZE (vec_mode) | |
d305ca88 | 1368 | >= GET_MODE_SIZE (table->get_data_mode ()))) |
f6df08e6 | 1369 | PUT_MODE (body, vec_mode); |
d6b5193b RS |
1370 | if (JUMP_TABLES_IN_TEXT_SECTION |
1371 | || readonly_data_section == text_section) | |
75197b37 BS |
1372 | { |
1373 | insn_lengths[uid] | |
d305ca88 RS |
1374 | = (XVECLEN (body, 1) |
1375 | * GET_MODE_SIZE (table->get_data_mode ())); | |
75197b37 BS |
1376 | insn_current_address += insn_lengths[uid]; |
1377 | if (insn_lengths[uid] != old_length) | |
1378 | something_changed = 1; | |
1379 | } | |
1380 | ||
33f7f353 | 1381 | continue; |
33f7f353 | 1382 | } |
5e75ef4a JL |
1383 | #endif /* CASE_VECTOR_SHORTEN_MODE */ |
1384 | ||
1385 | if (! (varying_length[uid])) | |
3cf2715d | 1386 | { |
4b4bf941 | 1387 | if (NONJUMP_INSN_P (insn) |
674fc07d GS |
1388 | && GET_CODE (PATTERN (insn)) == SEQUENCE) |
1389 | { | |
1390 | int i; | |
1391 | ||
1392 | body = PATTERN (insn); | |
1393 | for (i = 0; i < XVECLEN (body, 0); i++) | |
1394 | { | |
1395 | rtx inner_insn = XVECEXP (body, 0, i); | |
1396 | int inner_uid = INSN_UID (inner_insn); | |
1397 | ||
1398 | INSN_ADDRESSES (inner_uid) = insn_current_address; | |
1399 | ||
1400 | insn_current_address += insn_lengths[inner_uid]; | |
1401 | } | |
dd3f0101 | 1402 | } |
674fc07d GS |
1403 | else |
1404 | insn_current_address += insn_lengths[uid]; | |
1405 | ||
3cf2715d DE |
1406 | continue; |
1407 | } | |
674fc07d | 1408 | |
4b4bf941 | 1409 | if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE) |
3cf2715d | 1410 | { |
84034c69 | 1411 | rtx_sequence *seqn = as_a <rtx_sequence *> (PATTERN (insn)); |
3cf2715d | 1412 | int i; |
f5d927c0 | 1413 | |
3cf2715d DE |
1414 | body = PATTERN (insn); |
1415 | new_length = 0; | |
84034c69 | 1416 | for (i = 0; i < seqn->len (); i++) |
3cf2715d | 1417 | { |
84034c69 | 1418 | rtx_insn *inner_insn = seqn->insn (i); |
3cf2715d DE |
1419 | int inner_uid = INSN_UID (inner_insn); |
1420 | int inner_length; | |
1421 | ||
9d98a694 | 1422 | INSN_ADDRESSES (inner_uid) = insn_current_address; |
3cf2715d DE |
1423 | |
1424 | /* insn_current_length returns 0 for insns with a | |
1425 | non-varying length. */ | |
1426 | if (! varying_length[inner_uid]) | |
1427 | inner_length = insn_lengths[inner_uid]; | |
1428 | else | |
1429 | inner_length = insn_current_length (inner_insn); | |
1430 | ||
1431 | if (inner_length != insn_lengths[inner_uid]) | |
1432 | { | |
f6df08e6 JR |
1433 | if (!increasing || inner_length > insn_lengths[inner_uid]) |
1434 | { | |
1435 | insn_lengths[inner_uid] = inner_length; | |
1436 | something_changed = 1; | |
1437 | } | |
1438 | else | |
1439 | inner_length = insn_lengths[inner_uid]; | |
3cf2715d | 1440 | } |
f6df08e6 | 1441 | insn_current_address += inner_length; |
3cf2715d DE |
1442 | new_length += inner_length; |
1443 | } | |
1444 | } | |
1445 | else | |
1446 | { | |
1447 | new_length = insn_current_length (insn); | |
1448 | insn_current_address += new_length; | |
1449 | } | |
1450 | ||
3cf2715d DE |
1451 | #ifdef ADJUST_INSN_LENGTH |
1452 | /* If needed, do any adjustment. */ | |
1453 | tmp_length = new_length; | |
1454 | ADJUST_INSN_LENGTH (insn, new_length); | |
1455 | insn_current_address += (new_length - tmp_length); | |
3cf2715d DE |
1456 | #endif |
1457 | ||
f6df08e6 JR |
1458 | if (new_length != insn_lengths[uid] |
1459 | && (!increasing || new_length > insn_lengths[uid])) | |
3cf2715d DE |
1460 | { |
1461 | insn_lengths[uid] = new_length; | |
1462 | something_changed = 1; | |
1463 | } | |
f6df08e6 JR |
1464 | else |
1465 | insn_current_address += insn_lengths[uid] - new_length; | |
3cf2715d | 1466 | } |
bb4aaf18 | 1467 | /* For a non-optimizing compile, do only a single pass. */ |
f6df08e6 | 1468 | if (!increasing) |
bb4aaf18 | 1469 | break; |
3cf2715d | 1470 | } |
8cac4d85 | 1471 | crtl->max_insn_address = insn_current_address; |
fc470718 | 1472 | free (varying_length); |
3cf2715d DE |
1473 | } |
1474 | ||
3cf2715d DE |
1475 | /* Given the body of an INSN known to be generated by an ASM statement, return |
1476 | the number of machine instructions likely to be generated for this insn. | |
1477 | This is used to compute its length. */ | |
1478 | ||
1479 | static int | |
6cf9ac28 | 1480 | asm_insn_count (rtx body) |
3cf2715d | 1481 | { |
48c54229 | 1482 | const char *templ; |
3cf2715d | 1483 | |
5d0930ea | 1484 | if (GET_CODE (body) == ASM_INPUT) |
48c54229 | 1485 | templ = XSTR (body, 0); |
5d0930ea | 1486 | else |
48c54229 | 1487 | templ = decode_asm_operands (body, NULL, NULL, NULL, NULL, NULL); |
5d0930ea | 1488 | |
2bd1d2c8 AP |
1489 | return asm_str_count (templ); |
1490 | } | |
2bd1d2c8 AP |
1491 | |
1492 | /* Return the number of machine instructions likely to be generated for the | |
1493 | inline-asm template. */ | |
1494 | int | |
1495 | asm_str_count (const char *templ) | |
1496 | { | |
1497 | int count = 1; | |
b8698a0f | 1498 | |
48c54229 | 1499 | if (!*templ) |
5bc4fa7c MS |
1500 | return 0; |
1501 | ||
48c54229 KG |
1502 | for (; *templ; templ++) |
1503 | if (IS_ASM_LOGICAL_LINE_SEPARATOR (*templ, templ) | |
1504 | || *templ == '\n') | |
3cf2715d DE |
1505 | count++; |
1506 | ||
1507 | return count; | |
1508 | } | |
3cf2715d | 1509 | \f |
c8aea42c PB |
1510 | /* ??? This is probably the wrong place for these. */ |
1511 | /* Structure recording the mapping from source file and directory | |
1512 | names at compile time to those to be embedded in debug | |
1513 | information. */ | |
50686850 | 1514 | struct debug_prefix_map |
c8aea42c PB |
1515 | { |
1516 | const char *old_prefix; | |
1517 | const char *new_prefix; | |
1518 | size_t old_len; | |
1519 | size_t new_len; | |
1520 | struct debug_prefix_map *next; | |
50686850 | 1521 | }; |
c8aea42c PB |
1522 | |
1523 | /* Linked list of such structures. */ | |
ffa66012 | 1524 | static debug_prefix_map *debug_prefix_maps; |
c8aea42c PB |
1525 | |
1526 | ||
1527 | /* Record a debug file prefix mapping. ARG is the argument to | |
1528 | -fdebug-prefix-map and must be of the form OLD=NEW. */ | |
1529 | ||
1530 | void | |
1531 | add_debug_prefix_map (const char *arg) | |
1532 | { | |
1533 | debug_prefix_map *map; | |
1534 | const char *p; | |
1535 | ||
1536 | p = strchr (arg, '='); | |
1537 | if (!p) | |
1538 | { | |
1539 | error ("invalid argument %qs to -fdebug-prefix-map", arg); | |
1540 | return; | |
1541 | } | |
1542 | map = XNEW (debug_prefix_map); | |
fe83055d | 1543 | map->old_prefix = xstrndup (arg, p - arg); |
c8aea42c PB |
1544 | map->old_len = p - arg; |
1545 | p++; | |
fe83055d | 1546 | map->new_prefix = xstrdup (p); |
c8aea42c PB |
1547 | map->new_len = strlen (p); |
1548 | map->next = debug_prefix_maps; | |
1549 | debug_prefix_maps = map; | |
1550 | } | |
1551 | ||
1552 | /* Perform user-specified mapping of debug filename prefixes. Return | |
1553 | the new name corresponding to FILENAME. */ | |
1554 | ||
1555 | const char * | |
1556 | remap_debug_filename (const char *filename) | |
1557 | { | |
1558 | debug_prefix_map *map; | |
1559 | char *s; | |
1560 | const char *name; | |
1561 | size_t name_len; | |
1562 | ||
1563 | for (map = debug_prefix_maps; map; map = map->next) | |
94369251 | 1564 | if (filename_ncmp (filename, map->old_prefix, map->old_len) == 0) |
c8aea42c PB |
1565 | break; |
1566 | if (!map) | |
1567 | return filename; | |
1568 | name = filename + map->old_len; | |
1569 | name_len = strlen (name) + 1; | |
1570 | s = (char *) alloca (name_len + map->new_len); | |
1571 | memcpy (s, map->new_prefix, map->new_len); | |
1572 | memcpy (s + map->new_len, name, name_len); | |
1573 | return ggc_strdup (s); | |
1574 | } | |
1575 | \f | |
725730f2 EB |
1576 | /* Return true if DWARF2 debug info can be emitted for DECL. */ |
1577 | ||
1578 | static bool | |
1579 | dwarf2_debug_info_emitted_p (tree decl) | |
1580 | { | |
1581 | if (write_symbols != DWARF2_DEBUG && write_symbols != VMS_AND_DWARF2_DEBUG) | |
1582 | return false; | |
1583 | ||
1584 | if (DECL_IGNORED_P (decl)) | |
1585 | return false; | |
1586 | ||
1587 | return true; | |
1588 | } | |
1589 | ||
78bde837 SB |
1590 | /* Return scope resulting from combination of S1 and S2. */ |
1591 | static tree | |
1592 | choose_inner_scope (tree s1, tree s2) | |
1593 | { | |
1594 | if (!s1) | |
1595 | return s2; | |
1596 | if (!s2) | |
1597 | return s1; | |
1598 | if (BLOCK_NUMBER (s1) > BLOCK_NUMBER (s2)) | |
1599 | return s1; | |
1600 | return s2; | |
1601 | } | |
1602 | ||
1603 | /* Emit lexical block notes needed to change scope from S1 to S2. */ | |
1604 | ||
1605 | static void | |
fa7af581 | 1606 | change_scope (rtx_insn *orig_insn, tree s1, tree s2) |
78bde837 | 1607 | { |
fa7af581 | 1608 | rtx_insn *insn = orig_insn; |
78bde837 SB |
1609 | tree com = NULL_TREE; |
1610 | tree ts1 = s1, ts2 = s2; | |
1611 | tree s; | |
1612 | ||
1613 | while (ts1 != ts2) | |
1614 | { | |
1615 | gcc_assert (ts1 && ts2); | |
1616 | if (BLOCK_NUMBER (ts1) > BLOCK_NUMBER (ts2)) | |
1617 | ts1 = BLOCK_SUPERCONTEXT (ts1); | |
1618 | else if (BLOCK_NUMBER (ts1) < BLOCK_NUMBER (ts2)) | |
1619 | ts2 = BLOCK_SUPERCONTEXT (ts2); | |
1620 | else | |
1621 | { | |
1622 | ts1 = BLOCK_SUPERCONTEXT (ts1); | |
1623 | ts2 = BLOCK_SUPERCONTEXT (ts2); | |
1624 | } | |
1625 | } | |
1626 | com = ts1; | |
1627 | ||
1628 | /* Close scopes. */ | |
1629 | s = s1; | |
1630 | while (s != com) | |
1631 | { | |
66e8df53 | 1632 | rtx_note *note = emit_note_before (NOTE_INSN_BLOCK_END, insn); |
78bde837 SB |
1633 | NOTE_BLOCK (note) = s; |
1634 | s = BLOCK_SUPERCONTEXT (s); | |
1635 | } | |
1636 | ||
1637 | /* Open scopes. */ | |
1638 | s = s2; | |
1639 | while (s != com) | |
1640 | { | |
1641 | insn = emit_note_before (NOTE_INSN_BLOCK_BEG, insn); | |
1642 | NOTE_BLOCK (insn) = s; | |
1643 | s = BLOCK_SUPERCONTEXT (s); | |
1644 | } | |
1645 | } | |
1646 | ||
1647 | /* Rebuild all the NOTE_INSN_BLOCK_BEG and NOTE_INSN_BLOCK_END notes based | |
1648 | on the scope tree and the newly reordered instructions. */ | |
1649 | ||
1650 | static void | |
1651 | reemit_insn_block_notes (void) | |
1652 | { | |
1653 | tree cur_block = DECL_INITIAL (cfun->decl); | |
66e8df53 | 1654 | rtx_insn *insn; |
78bde837 SB |
1655 | |
1656 | insn = get_insns (); | |
97aba8e9 | 1657 | for (; insn; insn = NEXT_INSN (insn)) |
78bde837 SB |
1658 | { |
1659 | tree this_block; | |
1660 | ||
67598720 | 1661 | /* Prevent lexical blocks from straddling section boundaries. */ |
96a95ac1 AO |
1662 | if (NOTE_P (insn)) |
1663 | switch (NOTE_KIND (insn)) | |
1664 | { | |
1665 | case NOTE_INSN_SWITCH_TEXT_SECTIONS: | |
1666 | { | |
1667 | for (tree s = cur_block; s != DECL_INITIAL (cfun->decl); | |
1668 | s = BLOCK_SUPERCONTEXT (s)) | |
1669 | { | |
1670 | rtx_note *note = emit_note_before (NOTE_INSN_BLOCK_END, insn); | |
1671 | NOTE_BLOCK (note) = s; | |
1672 | note = emit_note_after (NOTE_INSN_BLOCK_BEG, insn); | |
1673 | NOTE_BLOCK (note) = s; | |
1674 | } | |
1675 | } | |
1676 | break; | |
1677 | ||
1678 | case NOTE_INSN_BEGIN_STMT: | |
1679 | this_block = LOCATION_BLOCK (NOTE_MARKER_LOCATION (insn)); | |
1680 | goto set_cur_block_to_this_block; | |
1681 | ||
1682 | default: | |
1683 | continue; | |
1684 | } | |
67598720 TJ |
1685 | |
1686 | if (!active_insn_p (insn)) | |
1687 | continue; | |
1688 | ||
78bde837 SB |
1689 | /* Avoid putting scope notes between jump table and its label. */ |
1690 | if (JUMP_TABLE_DATA_P (insn)) | |
1691 | continue; | |
1692 | ||
1693 | this_block = insn_scope (insn); | |
1694 | /* For sequences compute scope resulting from merging all scopes | |
1695 | of instructions nested inside. */ | |
e429a50b | 1696 | if (rtx_sequence *body = dyn_cast <rtx_sequence *> (PATTERN (insn))) |
78bde837 SB |
1697 | { |
1698 | int i; | |
78bde837 SB |
1699 | |
1700 | this_block = NULL; | |
e429a50b | 1701 | for (i = 0; i < body->len (); i++) |
78bde837 | 1702 | this_block = choose_inner_scope (this_block, |
e429a50b | 1703 | insn_scope (body->insn (i))); |
78bde837 | 1704 | } |
96a95ac1 | 1705 | set_cur_block_to_this_block: |
78bde837 | 1706 | if (! this_block) |
48866799 DC |
1707 | { |
1708 | if (INSN_LOCATION (insn) == UNKNOWN_LOCATION) | |
1709 | continue; | |
1710 | else | |
1711 | this_block = DECL_INITIAL (cfun->decl); | |
1712 | } | |
78bde837 SB |
1713 | |
1714 | if (this_block != cur_block) | |
1715 | { | |
1716 | change_scope (insn, cur_block, this_block); | |
1717 | cur_block = this_block; | |
1718 | } | |
1719 | } | |
1720 | ||
1721 | /* change_scope emits before the insn, not after. */ | |
96a95ac1 | 1722 | rtx_note *note = emit_note (NOTE_INSN_DELETED); |
78bde837 SB |
1723 | change_scope (note, cur_block, DECL_INITIAL (cfun->decl)); |
1724 | delete_insn (note); | |
1725 | ||
1726 | reorder_blocks (); | |
1727 | } | |
1728 | ||
4fbca4ba RS |
1729 | static const char *some_local_dynamic_name; |
1730 | ||
1731 | /* Locate some local-dynamic symbol still in use by this function | |
1732 | so that we can print its name in local-dynamic base patterns. | |
1733 | Return null if there are no local-dynamic references. */ | |
1734 | ||
1735 | const char * | |
1736 | get_some_local_dynamic_name () | |
1737 | { | |
1738 | subrtx_iterator::array_type array; | |
1739 | rtx_insn *insn; | |
1740 | ||
1741 | if (some_local_dynamic_name) | |
1742 | return some_local_dynamic_name; | |
1743 | ||
1744 | for (insn = get_insns (); insn ; insn = NEXT_INSN (insn)) | |
1745 | if (NONDEBUG_INSN_P (insn)) | |
1746 | FOR_EACH_SUBRTX (iter, array, PATTERN (insn), ALL) | |
1747 | { | |
1748 | const_rtx x = *iter; | |
1749 | if (GET_CODE (x) == SYMBOL_REF) | |
1750 | { | |
1751 | if (SYMBOL_REF_TLS_MODEL (x) == TLS_MODEL_LOCAL_DYNAMIC) | |
1752 | return some_local_dynamic_name = XSTR (x, 0); | |
1753 | if (CONSTANT_POOL_ADDRESS_P (x)) | |
1754 | iter.substitute (get_pool_constant (x)); | |
1755 | } | |
1756 | } | |
1757 | ||
1758 | return 0; | |
1759 | } | |
1760 | ||
3cf2715d DE |
1761 | /* Output assembler code for the start of a function, |
1762 | and initialize some of the variables in this file | |
1763 | for the new function. The label for the function and associated | |
1764 | assembler pseudo-ops have already been output in `assemble_start_function'. | |
1765 | ||
1766 | FIRST is the first insn of the rtl for the function being compiled. | |
1767 | FILE is the file to write assembler code to. | |
46625112 | 1768 | OPTIMIZE_P is nonzero if we should eliminate redundant |
3cf2715d DE |
1769 | test and compare insns. */ |
1770 | ||
1771 | void | |
f0cb8ae0 | 1772 | final_start_function (rtx_insn *first, FILE *file, |
46625112 | 1773 | int optimize_p ATTRIBUTE_UNUSED) |
3cf2715d DE |
1774 | { |
1775 | block_depth = 0; | |
1776 | ||
1777 | this_is_asm_operands = 0; | |
1778 | ||
ddd84654 JJ |
1779 | need_profile_function = false; |
1780 | ||
5368224f DC |
1781 | last_filename = LOCATION_FILE (prologue_location); |
1782 | last_linenum = LOCATION_LINE (prologue_location); | |
497b7c47 | 1783 | last_columnnum = LOCATION_COLUMN (prologue_location); |
6c52e687 | 1784 | last_discriminator = discriminator = 0; |
9ae130f8 | 1785 | |
653e276c | 1786 | high_block_linenum = high_function_linenum = last_linenum; |
eac40081 | 1787 | |
ef1b3fda KS |
1788 | if (flag_sanitize & SANITIZE_ADDRESS) |
1789 | asan_function_start (); | |
1790 | ||
725730f2 | 1791 | if (!DECL_IGNORED_P (current_function_decl)) |
497b7c47 | 1792 | debug_hooks->begin_prologue (last_linenum, last_columnnum, last_filename); |
d291dd49 | 1793 | |
725730f2 | 1794 | if (!dwarf2_debug_info_emitted_p (current_function_decl)) |
497b7c47 | 1795 | dwarf2out_begin_prologue (0, 0, NULL); |
3cf2715d DE |
1796 | |
1797 | #ifdef LEAF_REG_REMAP | |
416ff32e | 1798 | if (crtl->uses_only_leaf_regs) |
3cf2715d DE |
1799 | leaf_renumber_regs (first); |
1800 | #endif | |
1801 | ||
1802 | /* The Sun386i and perhaps other machines don't work right | |
1803 | if the profiling code comes after the prologue. */ | |
3c5273a9 | 1804 | if (targetm.profile_before_prologue () && crtl->profile) |
ddd84654 | 1805 | { |
e86a9946 RS |
1806 | if (targetm.asm_out.function_prologue == default_function_pro_epilogue |
1807 | && targetm.have_prologue ()) | |
ddd84654 | 1808 | { |
fa7af581 | 1809 | rtx_insn *insn; |
ddd84654 JJ |
1810 | for (insn = first; insn; insn = NEXT_INSN (insn)) |
1811 | if (!NOTE_P (insn)) | |
1812 | { | |
fa7af581 | 1813 | insn = NULL; |
ddd84654 JJ |
1814 | break; |
1815 | } | |
1816 | else if (NOTE_KIND (insn) == NOTE_INSN_BASIC_BLOCK | |
1817 | || NOTE_KIND (insn) == NOTE_INSN_FUNCTION_BEG) | |
1818 | break; | |
1819 | else if (NOTE_KIND (insn) == NOTE_INSN_DELETED | |
1820 | || NOTE_KIND (insn) == NOTE_INSN_VAR_LOCATION) | |
1821 | continue; | |
1822 | else | |
1823 | { | |
fa7af581 | 1824 | insn = NULL; |
ddd84654 JJ |
1825 | break; |
1826 | } | |
1827 | ||
1828 | if (insn) | |
1829 | need_profile_function = true; | |
1830 | else | |
1831 | profile_function (file); | |
1832 | } | |
1833 | else | |
1834 | profile_function (file); | |
1835 | } | |
3cf2715d | 1836 | |
18c038b9 MM |
1837 | /* If debugging, assign block numbers to all of the blocks in this |
1838 | function. */ | |
1839 | if (write_symbols) | |
1840 | { | |
0435312e | 1841 | reemit_insn_block_notes (); |
a20612aa | 1842 | number_blocks (current_function_decl); |
18c038b9 MM |
1843 | /* We never actually put out begin/end notes for the top-level |
1844 | block in the function. But, conceptually, that block is | |
1845 | always needed. */ | |
1846 | TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl)) = 1; | |
1847 | } | |
1848 | ||
a214518f SP |
1849 | if (warn_frame_larger_than |
1850 | && get_frame_size () > frame_larger_than_size) | |
1851 | { | |
1852 | /* Issue a warning */ | |
1853 | warning (OPT_Wframe_larger_than_, | |
1854 | "the frame size of %wd bytes is larger than %wd bytes", | |
1855 | get_frame_size (), frame_larger_than_size); | |
1856 | } | |
1857 | ||
3cf2715d | 1858 | /* First output the function prologue: code to set up the stack frame. */ |
42776416 | 1859 | targetm.asm_out.function_prologue (file); |
3cf2715d | 1860 | |
3cf2715d DE |
1861 | /* If the machine represents the prologue as RTL, the profiling code must |
1862 | be emitted when NOTE_INSN_PROLOGUE_END is scanned. */ | |
e86a9946 | 1863 | if (! targetm.have_prologue ()) |
3cf2715d | 1864 | profile_after_prologue (file); |
3cf2715d DE |
1865 | } |
1866 | ||
1867 | static void | |
6cf9ac28 | 1868 | profile_after_prologue (FILE *file ATTRIBUTE_UNUSED) |
3cf2715d | 1869 | { |
3c5273a9 | 1870 | if (!targetm.profile_before_prologue () && crtl->profile) |
3cf2715d | 1871 | profile_function (file); |
3cf2715d DE |
1872 | } |
1873 | ||
1874 | static void | |
6cf9ac28 | 1875 | profile_function (FILE *file ATTRIBUTE_UNUSED) |
3cf2715d | 1876 | { |
dcacfa04 | 1877 | #ifndef NO_PROFILE_COUNTERS |
9739c90c | 1878 | # define NO_PROFILE_COUNTERS 0 |
dcacfa04 | 1879 | #endif |
531ca746 RH |
1880 | #ifdef ASM_OUTPUT_REG_PUSH |
1881 | rtx sval = NULL, chain = NULL; | |
1882 | ||
1883 | if (cfun->returns_struct) | |
1884 | sval = targetm.calls.struct_value_rtx (TREE_TYPE (current_function_decl), | |
1885 | true); | |
1886 | if (cfun->static_chain_decl) | |
1887 | chain = targetm.calls.static_chain (current_function_decl, true); | |
b729186a | 1888 | #endif /* ASM_OUTPUT_REG_PUSH */ |
3cf2715d | 1889 | |
9739c90c JJ |
1890 | if (! NO_PROFILE_COUNTERS) |
1891 | { | |
1892 | int align = MIN (BIGGEST_ALIGNMENT, LONG_TYPE_SIZE); | |
d6b5193b | 1893 | switch_to_section (data_section); |
9739c90c | 1894 | ASM_OUTPUT_ALIGN (file, floor_log2 (align / BITS_PER_UNIT)); |
5fd9b178 | 1895 | targetm.asm_out.internal_label (file, "LP", current_function_funcdef_no); |
9739c90c JJ |
1896 | assemble_integer (const0_rtx, LONG_TYPE_SIZE / BITS_PER_UNIT, align, 1); |
1897 | } | |
3cf2715d | 1898 | |
d6b5193b | 1899 | switch_to_section (current_function_section ()); |
3cf2715d | 1900 | |
531ca746 RH |
1901 | #ifdef ASM_OUTPUT_REG_PUSH |
1902 | if (sval && REG_P (sval)) | |
1903 | ASM_OUTPUT_REG_PUSH (file, REGNO (sval)); | |
1904 | if (chain && REG_P (chain)) | |
1905 | ASM_OUTPUT_REG_PUSH (file, REGNO (chain)); | |
3cf2715d | 1906 | #endif |
3cf2715d | 1907 | |
df696a75 | 1908 | FUNCTION_PROFILER (file, current_function_funcdef_no); |
3cf2715d | 1909 | |
531ca746 RH |
1910 | #ifdef ASM_OUTPUT_REG_PUSH |
1911 | if (chain && REG_P (chain)) | |
1912 | ASM_OUTPUT_REG_POP (file, REGNO (chain)); | |
1913 | if (sval && REG_P (sval)) | |
1914 | ASM_OUTPUT_REG_POP (file, REGNO (sval)); | |
3cf2715d DE |
1915 | #endif |
1916 | } | |
1917 | ||
1918 | /* Output assembler code for the end of a function. | |
1919 | For clarity, args are same as those of `final_start_function' | |
1920 | even though not all of them are needed. */ | |
1921 | ||
1922 | void | |
6cf9ac28 | 1923 | final_end_function (void) |
3cf2715d | 1924 | { |
be1bb652 | 1925 | app_disable (); |
3cf2715d | 1926 | |
725730f2 EB |
1927 | if (!DECL_IGNORED_P (current_function_decl)) |
1928 | debug_hooks->end_function (high_function_linenum); | |
3cf2715d | 1929 | |
3cf2715d DE |
1930 | /* Finally, output the function epilogue: |
1931 | code to restore the stack frame and return to the caller. */ | |
42776416 | 1932 | targetm.asm_out.function_epilogue (asm_out_file); |
3cf2715d | 1933 | |
e2a12aca | 1934 | /* And debug output. */ |
725730f2 EB |
1935 | if (!DECL_IGNORED_P (current_function_decl)) |
1936 | debug_hooks->end_epilogue (last_linenum, last_filename); | |
3cf2715d | 1937 | |
725730f2 | 1938 | if (!dwarf2_debug_info_emitted_p (current_function_decl) |
7a0c8d71 | 1939 | && dwarf2out_do_frame ()) |
702ada3d | 1940 | dwarf2out_end_epilogue (last_linenum, last_filename); |
4fbca4ba RS |
1941 | |
1942 | some_local_dynamic_name = 0; | |
3cf2715d DE |
1943 | } |
1944 | \f | |
6a801cf2 XDL |
1945 | |
1946 | /* Dumper helper for basic block information. FILE is the assembly | |
1947 | output file, and INSN is the instruction being emitted. */ | |
1948 | ||
1949 | static void | |
fa7af581 | 1950 | dump_basic_block_info (FILE *file, rtx_insn *insn, basic_block *start_to_bb, |
6a801cf2 XDL |
1951 | basic_block *end_to_bb, int bb_map_size, int *bb_seqn) |
1952 | { | |
1953 | basic_block bb; | |
1954 | ||
1955 | if (!flag_debug_asm) | |
1956 | return; | |
1957 | ||
1958 | if (INSN_UID (insn) < bb_map_size | |
1959 | && (bb = start_to_bb[INSN_UID (insn)]) != NULL) | |
1960 | { | |
1961 | edge e; | |
1962 | edge_iterator ei; | |
1963 | ||
1c13f168 | 1964 | fprintf (file, "%s BLOCK %d", ASM_COMMENT_START, bb->index); |
3995f3a2 JH |
1965 | if (bb->count.initialized_p ()) |
1966 | { | |
1967 | fprintf (file, ", count:"); | |
1968 | bb->count.dump (file); | |
1969 | } | |
6a801cf2 | 1970 | fprintf (file, " seq:%d", (*bb_seqn)++); |
1c13f168 | 1971 | fprintf (file, "\n%s PRED:", ASM_COMMENT_START); |
6a801cf2 XDL |
1972 | FOR_EACH_EDGE (e, ei, bb->preds) |
1973 | { | |
a315c44c | 1974 | dump_edge_info (file, e, TDF_DETAILS, 0); |
6a801cf2 XDL |
1975 | } |
1976 | fprintf (file, "\n"); | |
1977 | } | |
1978 | if (INSN_UID (insn) < bb_map_size | |
1979 | && (bb = end_to_bb[INSN_UID (insn)]) != NULL) | |
1980 | { | |
1981 | edge e; | |
1982 | edge_iterator ei; | |
1983 | ||
1c13f168 | 1984 | fprintf (asm_out_file, "%s SUCC:", ASM_COMMENT_START); |
6a801cf2 XDL |
1985 | FOR_EACH_EDGE (e, ei, bb->succs) |
1986 | { | |
a315c44c | 1987 | dump_edge_info (asm_out_file, e, TDF_DETAILS, 1); |
6a801cf2 XDL |
1988 | } |
1989 | fprintf (file, "\n"); | |
1990 | } | |
1991 | } | |
1992 | ||
3cf2715d | 1993 | /* Output assembler code for some insns: all or part of a function. |
c9d691e9 | 1994 | For description of args, see `final_start_function', above. */ |
3cf2715d DE |
1995 | |
1996 | void | |
a943bf7a | 1997 | final (rtx_insn *first, FILE *file, int optimize_p) |
3cf2715d | 1998 | { |
fa7af581 | 1999 | rtx_insn *insn, *next; |
589fe865 | 2000 | int seen = 0; |
3cf2715d | 2001 | |
6a801cf2 XDL |
2002 | /* Used for -dA dump. */ |
2003 | basic_block *start_to_bb = NULL; | |
2004 | basic_block *end_to_bb = NULL; | |
2005 | int bb_map_size = 0; | |
2006 | int bb_seqn = 0; | |
2007 | ||
3cf2715d | 2008 | last_ignored_compare = 0; |
3cf2715d | 2009 | |
618f4073 TS |
2010 | if (HAVE_cc0) |
2011 | for (insn = first; insn; insn = NEXT_INSN (insn)) | |
2012 | { | |
2013 | /* If CC tracking across branches is enabled, record the insn which | |
2014 | jumps to each branch only reached from one place. */ | |
2015 | if (optimize_p && JUMP_P (insn)) | |
2016 | { | |
2017 | rtx lab = JUMP_LABEL (insn); | |
2018 | if (lab && LABEL_P (lab) && LABEL_NUSES (lab) == 1) | |
2019 | { | |
2020 | LABEL_REFS (lab) = insn; | |
2021 | } | |
2022 | } | |
2023 | } | |
a8c3510c | 2024 | |
3cf2715d DE |
2025 | init_recog (); |
2026 | ||
2027 | CC_STATUS_INIT; | |
2028 | ||
6a801cf2 XDL |
2029 | if (flag_debug_asm) |
2030 | { | |
2031 | basic_block bb; | |
2032 | ||
2033 | bb_map_size = get_max_uid () + 1; | |
2034 | start_to_bb = XCNEWVEC (basic_block, bb_map_size); | |
2035 | end_to_bb = XCNEWVEC (basic_block, bb_map_size); | |
2036 | ||
292ffe86 CC |
2037 | /* There is no cfg for a thunk. */ |
2038 | if (!cfun->is_thunk) | |
4f42035e | 2039 | FOR_EACH_BB_REVERSE_FN (bb, cfun) |
292ffe86 CC |
2040 | { |
2041 | start_to_bb[INSN_UID (BB_HEAD (bb))] = bb; | |
2042 | end_to_bb[INSN_UID (BB_END (bb))] = bb; | |
2043 | } | |
6a801cf2 XDL |
2044 | } |
2045 | ||
3cf2715d | 2046 | /* Output the insns. */ |
9ff57809 | 2047 | for (insn = first; insn;) |
2f16edb1 | 2048 | { |
d327457f | 2049 | if (HAVE_ATTR_length) |
0ac76ad9 | 2050 | { |
d327457f JR |
2051 | if ((unsigned) INSN_UID (insn) >= INSN_ADDRESSES_SIZE ()) |
2052 | { | |
2053 | /* This can be triggered by bugs elsewhere in the compiler if | |
2054 | new insns are created after init_insn_lengths is called. */ | |
2055 | gcc_assert (NOTE_P (insn)); | |
2056 | insn_current_address = -1; | |
2057 | } | |
2058 | else | |
2059 | insn_current_address = INSN_ADDRESSES (INSN_UID (insn)); | |
0ac76ad9 | 2060 | } |
0ac76ad9 | 2061 | |
6a801cf2 XDL |
2062 | dump_basic_block_info (file, insn, start_to_bb, end_to_bb, |
2063 | bb_map_size, &bb_seqn); | |
46625112 | 2064 | insn = final_scan_insn (insn, file, optimize_p, 0, &seen); |
2f16edb1 | 2065 | } |
6a801cf2 XDL |
2066 | |
2067 | if (flag_debug_asm) | |
2068 | { | |
2069 | free (start_to_bb); | |
2070 | free (end_to_bb); | |
2071 | } | |
bc5612ed BS |
2072 | |
2073 | /* Remove CFI notes, to avoid compare-debug failures. */ | |
2074 | for (insn = first; insn; insn = next) | |
2075 | { | |
2076 | next = NEXT_INSN (insn); | |
2077 | if (NOTE_P (insn) | |
2078 | && (NOTE_KIND (insn) == NOTE_INSN_CFI | |
2079 | || NOTE_KIND (insn) == NOTE_INSN_CFI_LABEL)) | |
2080 | delete_insn (insn); | |
2081 | } | |
3cf2715d DE |
2082 | } |
2083 | \f | |
4bbf910e | 2084 | const char * |
6cf9ac28 | 2085 | get_insn_template (int code, rtx insn) |
4bbf910e | 2086 | { |
4bbf910e RH |
2087 | switch (insn_data[code].output_format) |
2088 | { | |
2089 | case INSN_OUTPUT_FORMAT_SINGLE: | |
3897f229 | 2090 | return insn_data[code].output.single; |
4bbf910e | 2091 | case INSN_OUTPUT_FORMAT_MULTI: |
3897f229 | 2092 | return insn_data[code].output.multi[which_alternative]; |
4bbf910e | 2093 | case INSN_OUTPUT_FORMAT_FUNCTION: |
0bccc606 | 2094 | gcc_assert (insn); |
95770ca3 DM |
2095 | return (*insn_data[code].output.function) (recog_data.operand, |
2096 | as_a <rtx_insn *> (insn)); | |
4bbf910e RH |
2097 | |
2098 | default: | |
0bccc606 | 2099 | gcc_unreachable (); |
4bbf910e RH |
2100 | } |
2101 | } | |
f5d927c0 | 2102 | |
0dc36574 ZW |
2103 | /* Emit the appropriate declaration for an alternate-entry-point |
2104 | symbol represented by INSN, to FILE. INSN is a CODE_LABEL with | |
2105 | LABEL_KIND != LABEL_NORMAL. | |
2106 | ||
2107 | The case fall-through in this function is intentional. */ | |
2108 | static void | |
fa7af581 | 2109 | output_alternate_entry_point (FILE *file, rtx_insn *insn) |
0dc36574 ZW |
2110 | { |
2111 | const char *name = LABEL_NAME (insn); | |
2112 | ||
2113 | switch (LABEL_KIND (insn)) | |
2114 | { | |
2115 | case LABEL_WEAK_ENTRY: | |
2116 | #ifdef ASM_WEAKEN_LABEL | |
2117 | ASM_WEAKEN_LABEL (file, name); | |
81fea426 | 2118 | gcc_fallthrough (); |
0dc36574 ZW |
2119 | #endif |
2120 | case LABEL_GLOBAL_ENTRY: | |
5fd9b178 | 2121 | targetm.asm_out.globalize_label (file, name); |
81fea426 | 2122 | gcc_fallthrough (); |
0dc36574 | 2123 | case LABEL_STATIC_ENTRY: |
905173eb ZW |
2124 | #ifdef ASM_OUTPUT_TYPE_DIRECTIVE |
2125 | ASM_OUTPUT_TYPE_DIRECTIVE (file, name, "function"); | |
2126 | #endif | |
0dc36574 ZW |
2127 | ASM_OUTPUT_LABEL (file, name); |
2128 | break; | |
2129 | ||
2130 | case LABEL_NORMAL: | |
2131 | default: | |
0bccc606 | 2132 | gcc_unreachable (); |
0dc36574 ZW |
2133 | } |
2134 | } | |
2135 | ||
f410e1b3 RAE |
2136 | /* Given a CALL_INSN, find and return the nested CALL. */ |
2137 | static rtx | |
fa7af581 | 2138 | call_from_call_insn (rtx_call_insn *insn) |
f410e1b3 RAE |
2139 | { |
2140 | rtx x; | |
2141 | gcc_assert (CALL_P (insn)); | |
2142 | x = PATTERN (insn); | |
2143 | ||
2144 | while (GET_CODE (x) != CALL) | |
2145 | { | |
2146 | switch (GET_CODE (x)) | |
2147 | { | |
2148 | default: | |
2149 | gcc_unreachable (); | |
b8c71e40 RAE |
2150 | case COND_EXEC: |
2151 | x = COND_EXEC_CODE (x); | |
2152 | break; | |
f410e1b3 RAE |
2153 | case PARALLEL: |
2154 | x = XVECEXP (x, 0, 0); | |
2155 | break; | |
2156 | case SET: | |
2157 | x = XEXP (x, 1); | |
2158 | break; | |
2159 | } | |
2160 | } | |
2161 | return x; | |
2162 | } | |
2163 | ||
82f72146 DM |
2164 | /* Print a comment into the asm showing FILENAME, LINENUM, and the |
2165 | corresponding source line, if available. */ | |
2166 | ||
2167 | static void | |
2168 | asm_show_source (const char *filename, int linenum) | |
2169 | { | |
2170 | if (!filename) | |
2171 | return; | |
2172 | ||
2173 | int line_size; | |
2174 | const char *line = location_get_source_line (filename, linenum, &line_size); | |
2175 | if (!line) | |
2176 | return; | |
2177 | ||
2178 | fprintf (asm_out_file, "%s %s:%i: ", ASM_COMMENT_START, filename, linenum); | |
2179 | /* "line" is not 0-terminated, so we must use line_size. */ | |
2180 | fwrite (line, 1, line_size, asm_out_file); | |
2181 | fputc ('\n', asm_out_file); | |
2182 | } | |
2183 | ||
3cf2715d DE |
2184 | /* The final scan for one insn, INSN. |
2185 | Args are same as in `final', except that INSN | |
2186 | is the insn being scanned. | |
2187 | Value returned is the next insn to be scanned. | |
2188 | ||
ff8cea7e EB |
2189 | NOPEEPHOLES is the flag to disallow peephole processing (currently |
2190 | used for within delayed branch sequence output). | |
3cf2715d | 2191 | |
589fe865 DJ |
2192 | SEEN is used to track the end of the prologue, for emitting |
2193 | debug information. We force the emission of a line note after | |
70aacc97 | 2194 | both NOTE_INSN_PROLOGUE_END and NOTE_INSN_FUNCTION_BEG. */ |
589fe865 | 2195 | |
fa7af581 | 2196 | rtx_insn * |
7fa55ff6 | 2197 | final_scan_insn (rtx_insn *insn, FILE *file, int optimize_p ATTRIBUTE_UNUSED, |
c9d691e9 | 2198 | int nopeepholes ATTRIBUTE_UNUSED, int *seen) |
3cf2715d | 2199 | { |
f1e52ed6 | 2200 | #if HAVE_cc0 |
90ca38bb MM |
2201 | rtx set; |
2202 | #endif | |
fa7af581 | 2203 | rtx_insn *next; |
d305ca88 | 2204 | rtx_jump_table_data *table; |
fa7af581 | 2205 | |
3cf2715d DE |
2206 | insn_counter++; |
2207 | ||
2208 | /* Ignore deleted insns. These can occur when we split insns (due to a | |
2209 | template of "#") while not optimizing. */ | |
4654c0cf | 2210 | if (insn->deleted ()) |
3cf2715d DE |
2211 | return NEXT_INSN (insn); |
2212 | ||
2213 | switch (GET_CODE (insn)) | |
2214 | { | |
2215 | case NOTE: | |
a38e7aa5 | 2216 | switch (NOTE_KIND (insn)) |
be1bb652 RH |
2217 | { |
2218 | case NOTE_INSN_DELETED: | |
d33606c3 | 2219 | case NOTE_INSN_UPDATE_SJLJ_CONTEXT: |
be1bb652 | 2220 | break; |
3cf2715d | 2221 | |
87c8b4be | 2222 | case NOTE_INSN_SWITCH_TEXT_SECTIONS: |
c543ca49 | 2223 | in_cold_section_p = !in_cold_section_p; |
f0a0390e | 2224 | |
b8cb3096 JJ |
2225 | if (in_cold_section_p) |
2226 | cold_function_name | |
2227 | = clone_function_name (current_function_decl, "cold"); | |
2228 | ||
a4b6974e | 2229 | if (dwarf2out_do_frame ()) |
b8cb3096 JJ |
2230 | { |
2231 | dwarf2out_switch_text_section (); | |
2232 | if (!dwarf2_debug_info_emitted_p (current_function_decl) | |
2233 | && !DECL_IGNORED_P (current_function_decl)) | |
2234 | debug_hooks->switch_text_section (); | |
2235 | } | |
f0a0390e | 2236 | else if (!DECL_IGNORED_P (current_function_decl)) |
725730f2 | 2237 | debug_hooks->switch_text_section (); |
a4b6974e | 2238 | |
c543ca49 | 2239 | switch_to_section (current_function_section ()); |
14d11d40 IS |
2240 | targetm.asm_out.function_switched_text_sections (asm_out_file, |
2241 | current_function_decl, | |
2242 | in_cold_section_p); | |
2ae367c1 ST |
2243 | /* Emit a label for the split cold section. Form label name by |
2244 | suffixing "cold" to the original function's name. */ | |
2245 | if (in_cold_section_p) | |
2246 | { | |
11c3d071 CT |
2247 | #ifdef ASM_DECLARE_COLD_FUNCTION_NAME |
2248 | ASM_DECLARE_COLD_FUNCTION_NAME (asm_out_file, | |
2249 | IDENTIFIER_POINTER | |
2250 | (cold_function_name), | |
2251 | current_function_decl); | |
16d710b1 | 2252 | #else |
2ae367c1 ST |
2253 | ASM_OUTPUT_LABEL (asm_out_file, |
2254 | IDENTIFIER_POINTER (cold_function_name)); | |
16d710b1 | 2255 | #endif |
2ae367c1 | 2256 | } |
750054a2 | 2257 | break; |
b0efb46b | 2258 | |
be1bb652 | 2259 | case NOTE_INSN_BASIC_BLOCK: |
ddd84654 JJ |
2260 | if (need_profile_function) |
2261 | { | |
2262 | profile_function (asm_out_file); | |
2263 | need_profile_function = false; | |
2264 | } | |
2265 | ||
2784ed9c KT |
2266 | if (targetm.asm_out.unwind_emit) |
2267 | targetm.asm_out.unwind_emit (asm_out_file, insn); | |
951120ea | 2268 | |
6c52e687 CC |
2269 | discriminator = NOTE_BASIC_BLOCK (insn)->discriminator; |
2270 | ||
be1bb652 | 2271 | break; |
3cf2715d | 2272 | |
be1bb652 | 2273 | case NOTE_INSN_EH_REGION_BEG: |
52a11cbf RH |
2274 | ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHB", |
2275 | NOTE_EH_HANDLER (insn)); | |
3d195391 | 2276 | break; |
3d195391 | 2277 | |
be1bb652 | 2278 | case NOTE_INSN_EH_REGION_END: |
52a11cbf RH |
2279 | ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHE", |
2280 | NOTE_EH_HANDLER (insn)); | |
3d195391 | 2281 | break; |
3d195391 | 2282 | |
be1bb652 | 2283 | case NOTE_INSN_PROLOGUE_END: |
5fd9b178 | 2284 | targetm.asm_out.function_end_prologue (file); |
3cf2715d | 2285 | profile_after_prologue (file); |
589fe865 DJ |
2286 | |
2287 | if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE) | |
2288 | { | |
2289 | *seen |= SEEN_EMITTED; | |
b8176fe4 | 2290 | force_source_line = true; |
589fe865 DJ |
2291 | } |
2292 | else | |
2293 | *seen |= SEEN_NOTE; | |
2294 | ||
3cf2715d | 2295 | break; |
3cf2715d | 2296 | |
be1bb652 | 2297 | case NOTE_INSN_EPILOGUE_BEG: |
bc45e4ba TG |
2298 | if (!DECL_IGNORED_P (current_function_decl)) |
2299 | (*debug_hooks->begin_epilogue) (last_linenum, last_filename); | |
5fd9b178 | 2300 | targetm.asm_out.function_begin_epilogue (file); |
be1bb652 | 2301 | break; |
3cf2715d | 2302 | |
bc5612ed BS |
2303 | case NOTE_INSN_CFI: |
2304 | dwarf2out_emit_cfi (NOTE_CFI (insn)); | |
2305 | break; | |
2306 | ||
2307 | case NOTE_INSN_CFI_LABEL: | |
2308 | ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LCFI", | |
2309 | NOTE_LABEL_NUMBER (insn)); | |
cd9c1ca8 RH |
2310 | break; |
2311 | ||
be1bb652 | 2312 | case NOTE_INSN_FUNCTION_BEG: |
ddd84654 JJ |
2313 | if (need_profile_function) |
2314 | { | |
2315 | profile_function (asm_out_file); | |
2316 | need_profile_function = false; | |
2317 | } | |
2318 | ||
653e276c | 2319 | app_disable (); |
725730f2 EB |
2320 | if (!DECL_IGNORED_P (current_function_decl)) |
2321 | debug_hooks->end_prologue (last_linenum, last_filename); | |
589fe865 DJ |
2322 | |
2323 | if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE) | |
2324 | { | |
2325 | *seen |= SEEN_EMITTED; | |
b8176fe4 | 2326 | force_source_line = true; |
589fe865 DJ |
2327 | } |
2328 | else | |
2329 | *seen |= SEEN_NOTE; | |
2330 | ||
3cf2715d | 2331 | break; |
be1bb652 RH |
2332 | |
2333 | case NOTE_INSN_BLOCK_BEG: | |
2334 | if (debug_info_level == DINFO_LEVEL_NORMAL | |
3cf2715d | 2335 | || debug_info_level == DINFO_LEVEL_VERBOSE |
7a0c8d71 DR |
2336 | || write_symbols == DWARF2_DEBUG |
2337 | || write_symbols == VMS_AND_DWARF2_DEBUG | |
2338 | || write_symbols == VMS_DEBUG) | |
be1bb652 RH |
2339 | { |
2340 | int n = BLOCK_NUMBER (NOTE_BLOCK (insn)); | |
3cf2715d | 2341 | |
be1bb652 RH |
2342 | app_disable (); |
2343 | ++block_depth; | |
2344 | high_block_linenum = last_linenum; | |
eac40081 | 2345 | |
a5a42b92 | 2346 | /* Output debugging info about the symbol-block beginning. */ |
725730f2 EB |
2347 | if (!DECL_IGNORED_P (current_function_decl)) |
2348 | debug_hooks->begin_block (last_linenum, n); | |
3cf2715d | 2349 | |
be1bb652 RH |
2350 | /* Mark this block as output. */ |
2351 | TREE_ASM_WRITTEN (NOTE_BLOCK (insn)) = 1; | |
aaec3d85 | 2352 | BLOCK_IN_COLD_SECTION_P (NOTE_BLOCK (insn)) = in_cold_section_p; |
be1bb652 | 2353 | } |
180295ed | 2354 | if (write_symbols == DBX_DEBUG) |
d752cfdb JJ |
2355 | { |
2356 | location_t *locus_ptr | |
2357 | = block_nonartificial_location (NOTE_BLOCK (insn)); | |
2358 | ||
2359 | if (locus_ptr != NULL) | |
2360 | { | |
2361 | override_filename = LOCATION_FILE (*locus_ptr); | |
2362 | override_linenum = LOCATION_LINE (*locus_ptr); | |
497b7c47 | 2363 | override_columnnum = LOCATION_COLUMN (*locus_ptr); |
d752cfdb JJ |
2364 | } |
2365 | } | |
be1bb652 | 2366 | break; |
18c038b9 | 2367 | |
be1bb652 RH |
2368 | case NOTE_INSN_BLOCK_END: |
2369 | if (debug_info_level == DINFO_LEVEL_NORMAL | |
2370 | || debug_info_level == DINFO_LEVEL_VERBOSE | |
7a0c8d71 DR |
2371 | || write_symbols == DWARF2_DEBUG |
2372 | || write_symbols == VMS_AND_DWARF2_DEBUG | |
2373 | || write_symbols == VMS_DEBUG) | |
be1bb652 RH |
2374 | { |
2375 | int n = BLOCK_NUMBER (NOTE_BLOCK (insn)); | |
3cf2715d | 2376 | |
be1bb652 RH |
2377 | app_disable (); |
2378 | ||
2379 | /* End of a symbol-block. */ | |
2380 | --block_depth; | |
0bccc606 | 2381 | gcc_assert (block_depth >= 0); |
3cf2715d | 2382 | |
725730f2 EB |
2383 | if (!DECL_IGNORED_P (current_function_decl)) |
2384 | debug_hooks->end_block (high_block_linenum, n); | |
aaec3d85 JJ |
2385 | gcc_assert (BLOCK_IN_COLD_SECTION_P (NOTE_BLOCK (insn)) |
2386 | == in_cold_section_p); | |
be1bb652 | 2387 | } |
180295ed | 2388 | if (write_symbols == DBX_DEBUG) |
d752cfdb JJ |
2389 | { |
2390 | tree outer_block = BLOCK_SUPERCONTEXT (NOTE_BLOCK (insn)); | |
2391 | location_t *locus_ptr | |
2392 | = block_nonartificial_location (outer_block); | |
2393 | ||
2394 | if (locus_ptr != NULL) | |
2395 | { | |
2396 | override_filename = LOCATION_FILE (*locus_ptr); | |
2397 | override_linenum = LOCATION_LINE (*locus_ptr); | |
497b7c47 | 2398 | override_columnnum = LOCATION_COLUMN (*locus_ptr); |
d752cfdb JJ |
2399 | } |
2400 | else | |
2401 | { | |
2402 | override_filename = NULL; | |
2403 | override_linenum = 0; | |
497b7c47 | 2404 | override_columnnum = 0; |
d752cfdb JJ |
2405 | } |
2406 | } | |
be1bb652 RH |
2407 | break; |
2408 | ||
2409 | case NOTE_INSN_DELETED_LABEL: | |
2410 | /* Emit the label. We may have deleted the CODE_LABEL because | |
2411 | the label could be proved to be unreachable, though still | |
2412 | referenced (in the form of having its address taken. */ | |
8215347e | 2413 | ASM_OUTPUT_DEBUG_LABEL (file, "L", CODE_LABEL_NUMBER (insn)); |
be1bb652 | 2414 | break; |
3cf2715d | 2415 | |
5619e52c JJ |
2416 | case NOTE_INSN_DELETED_DEBUG_LABEL: |
2417 | /* Similarly, but need to use different namespace for it. */ | |
2418 | if (CODE_LABEL_NUMBER (insn) != -1) | |
2419 | ASM_OUTPUT_DEBUG_LABEL (file, "LDL", CODE_LABEL_NUMBER (insn)); | |
2420 | break; | |
2421 | ||
014a1138 | 2422 | case NOTE_INSN_VAR_LOCATION: |
2b1c5433 | 2423 | case NOTE_INSN_CALL_ARG_LOCATION: |
725730f2 | 2424 | if (!DECL_IGNORED_P (current_function_decl)) |
fa7af581 | 2425 | debug_hooks->var_location (insn); |
014a1138 JZ |
2426 | break; |
2427 | ||
96a95ac1 AO |
2428 | case NOTE_INSN_BEGIN_STMT: |
2429 | gcc_checking_assert (cfun->debug_nonbind_markers); | |
2430 | if (!DECL_IGNORED_P (current_function_decl) | |
2431 | && notice_source_line (insn, NULL)) | |
2432 | { | |
2433 | (*debug_hooks->source_line) (last_linenum, last_columnnum, | |
2434 | last_filename, last_discriminator, | |
2435 | true); | |
2436 | } | |
2437 | break; | |
2438 | ||
be1bb652 | 2439 | default: |
a38e7aa5 | 2440 | gcc_unreachable (); |
f5d927c0 | 2441 | break; |
3cf2715d DE |
2442 | } |
2443 | break; | |
2444 | ||
2445 | case BARRIER: | |
3cf2715d DE |
2446 | break; |
2447 | ||
2448 | case CODE_LABEL: | |
1dd8faa8 R |
2449 | /* The target port might emit labels in the output function for |
2450 | some insn, e.g. sh.c output_branchy_insn. */ | |
de7987a6 R |
2451 | if (CODE_LABEL_NUMBER (insn) <= max_labelno) |
2452 | { | |
2453 | int align = LABEL_TO_ALIGNMENT (insn); | |
50b2596f | 2454 | #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN |
9e423e6d | 2455 | int max_skip = LABEL_TO_MAX_SKIP (insn); |
50b2596f | 2456 | #endif |
fc470718 | 2457 | |
1dd8faa8 | 2458 | if (align && NEXT_INSN (insn)) |
40cdfca6 | 2459 | { |
9e423e6d | 2460 | #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN |
40cdfca6 | 2461 | ASM_OUTPUT_MAX_SKIP_ALIGN (file, align, max_skip); |
8e16ab99 SF |
2462 | #else |
2463 | #ifdef ASM_OUTPUT_ALIGN_WITH_NOP | |
2464 | ASM_OUTPUT_ALIGN_WITH_NOP (file, align); | |
9e423e6d | 2465 | #else |
40cdfca6 | 2466 | ASM_OUTPUT_ALIGN (file, align); |
8e16ab99 | 2467 | #endif |
9e423e6d | 2468 | #endif |
40cdfca6 | 2469 | } |
de7987a6 | 2470 | } |
3cf2715d | 2471 | CC_STATUS_INIT; |
03ffa171 | 2472 | |
725730f2 | 2473 | if (!DECL_IGNORED_P (current_function_decl) && LABEL_NAME (insn)) |
f630fc6a | 2474 | debug_hooks->label (as_a <rtx_code_label *> (insn)); |
e1772ac0 | 2475 | |
bad4f40b | 2476 | app_disable (); |
b2a6a2fb | 2477 | |
0676c393 MM |
2478 | /* If this label is followed by a jump-table, make sure we put |
2479 | the label in the read-only section. Also possibly write the | |
2480 | label and jump table together. */ | |
d305ca88 RS |
2481 | table = jump_table_for_label (as_a <rtx_code_label *> (insn)); |
2482 | if (table) | |
3cf2715d | 2483 | { |
e0d80184 | 2484 | #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC) |
0676c393 MM |
2485 | /* In this case, the case vector is being moved by the |
2486 | target, so don't output the label at all. Leave that | |
2487 | to the back end macros. */ | |
e0d80184 | 2488 | #else |
0676c393 MM |
2489 | if (! JUMP_TABLES_IN_TEXT_SECTION) |
2490 | { | |
2491 | int log_align; | |
340f7e7c | 2492 | |
0676c393 MM |
2493 | switch_to_section (targetm.asm_out.function_rodata_section |
2494 | (current_function_decl)); | |
340f7e7c RH |
2495 | |
2496 | #ifdef ADDR_VEC_ALIGN | |
d305ca88 | 2497 | log_align = ADDR_VEC_ALIGN (table); |
340f7e7c | 2498 | #else |
0676c393 | 2499 | log_align = exact_log2 (BIGGEST_ALIGNMENT / BITS_PER_UNIT); |
340f7e7c | 2500 | #endif |
0676c393 MM |
2501 | ASM_OUTPUT_ALIGN (file, log_align); |
2502 | } | |
2503 | else | |
2504 | switch_to_section (current_function_section ()); | |
75197b37 | 2505 | |
3cf2715d | 2506 | #ifdef ASM_OUTPUT_CASE_LABEL |
d305ca88 | 2507 | ASM_OUTPUT_CASE_LABEL (file, "L", CODE_LABEL_NUMBER (insn), table); |
3cf2715d | 2508 | #else |
0676c393 | 2509 | targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn)); |
e0d80184 | 2510 | #endif |
3cf2715d | 2511 | #endif |
0676c393 | 2512 | break; |
3cf2715d | 2513 | } |
0dc36574 ZW |
2514 | if (LABEL_ALT_ENTRY_P (insn)) |
2515 | output_alternate_entry_point (file, insn); | |
8cd0faaf | 2516 | else |
5fd9b178 | 2517 | targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn)); |
3cf2715d DE |
2518 | break; |
2519 | ||
2520 | default: | |
2521 | { | |
b3694847 | 2522 | rtx body = PATTERN (insn); |
3cf2715d | 2523 | int insn_code_number; |
48c54229 | 2524 | const char *templ; |
96a95ac1 AO |
2525 | bool is_stmt, *is_stmt_p; |
2526 | ||
2527 | if (MAY_HAVE_DEBUG_MARKER_INSNS && cfun->debug_nonbind_markers) | |
2528 | { | |
2529 | is_stmt = false; | |
2530 | is_stmt_p = NULL; | |
2531 | } | |
2532 | else | |
2533 | is_stmt_p = &is_stmt; | |
3cf2715d | 2534 | |
9a1a4737 PB |
2535 | /* Reset this early so it is correct for ASM statements. */ |
2536 | current_insn_predicate = NULL_RTX; | |
2929029c | 2537 | |
3cf2715d DE |
2538 | /* An INSN, JUMP_INSN or CALL_INSN. |
2539 | First check for special kinds that recog doesn't recognize. */ | |
2540 | ||
6614fd40 | 2541 | if (GET_CODE (body) == USE /* These are just declarations. */ |
3cf2715d DE |
2542 | || GET_CODE (body) == CLOBBER) |
2543 | break; | |
2544 | ||
f1e52ed6 | 2545 | #if HAVE_cc0 |
4928181c SB |
2546 | { |
2547 | /* If there is a REG_CC_SETTER note on this insn, it means that | |
2548 | the setting of the condition code was done in the delay slot | |
2549 | of the insn that branched here. So recover the cc status | |
2550 | from the insn that set it. */ | |
3cf2715d | 2551 | |
4928181c SB |
2552 | rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX); |
2553 | if (note) | |
2554 | { | |
647d790d DM |
2555 | rtx_insn *other = as_a <rtx_insn *> (XEXP (note, 0)); |
2556 | NOTICE_UPDATE_CC (PATTERN (other), other); | |
4928181c SB |
2557 | cc_prev_status = cc_status; |
2558 | } | |
2559 | } | |
3cf2715d DE |
2560 | #endif |
2561 | ||
2562 | /* Detect insns that are really jump-tables | |
2563 | and output them as such. */ | |
2564 | ||
34f0d87a | 2565 | if (JUMP_TABLE_DATA_P (insn)) |
3cf2715d | 2566 | { |
7f7f8214 | 2567 | #if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)) |
b3694847 | 2568 | int vlen, idx; |
7f7f8214 | 2569 | #endif |
3cf2715d | 2570 | |
b2a6a2fb | 2571 | if (! JUMP_TABLES_IN_TEXT_SECTION) |
d6b5193b RS |
2572 | switch_to_section (targetm.asm_out.function_rodata_section |
2573 | (current_function_decl)); | |
b2a6a2fb | 2574 | else |
d6b5193b | 2575 | switch_to_section (current_function_section ()); |
b2a6a2fb | 2576 | |
bad4f40b | 2577 | app_disable (); |
3cf2715d | 2578 | |
e0d80184 DM |
2579 | #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC) |
2580 | if (GET_CODE (body) == ADDR_VEC) | |
2581 | { | |
2582 | #ifdef ASM_OUTPUT_ADDR_VEC | |
2583 | ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn), body); | |
2584 | #else | |
0bccc606 | 2585 | gcc_unreachable (); |
e0d80184 DM |
2586 | #endif |
2587 | } | |
2588 | else | |
2589 | { | |
2590 | #ifdef ASM_OUTPUT_ADDR_DIFF_VEC | |
2591 | ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn), body); | |
2592 | #else | |
0bccc606 | 2593 | gcc_unreachable (); |
e0d80184 DM |
2594 | #endif |
2595 | } | |
2596 | #else | |
3cf2715d DE |
2597 | vlen = XVECLEN (body, GET_CODE (body) == ADDR_DIFF_VEC); |
2598 | for (idx = 0; idx < vlen; idx++) | |
2599 | { | |
2600 | if (GET_CODE (body) == ADDR_VEC) | |
2601 | { | |
2602 | #ifdef ASM_OUTPUT_ADDR_VEC_ELT | |
2603 | ASM_OUTPUT_ADDR_VEC_ELT | |
2604 | (file, CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 0, idx), 0))); | |
2605 | #else | |
0bccc606 | 2606 | gcc_unreachable (); |
3cf2715d DE |
2607 | #endif |
2608 | } | |
2609 | else | |
2610 | { | |
2611 | #ifdef ASM_OUTPUT_ADDR_DIFF_ELT | |
2612 | ASM_OUTPUT_ADDR_DIFF_ELT | |
2613 | (file, | |
33f7f353 | 2614 | body, |
3cf2715d DE |
2615 | CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 1, idx), 0)), |
2616 | CODE_LABEL_NUMBER (XEXP (XEXP (body, 0), 0))); | |
2617 | #else | |
0bccc606 | 2618 | gcc_unreachable (); |
3cf2715d DE |
2619 | #endif |
2620 | } | |
2621 | } | |
2622 | #ifdef ASM_OUTPUT_CASE_END | |
2623 | ASM_OUTPUT_CASE_END (file, | |
2624 | CODE_LABEL_NUMBER (PREV_INSN (insn)), | |
2625 | insn); | |
e0d80184 | 2626 | #endif |
3cf2715d DE |
2627 | #endif |
2628 | ||
d6b5193b | 2629 | switch_to_section (current_function_section ()); |
3cf2715d DE |
2630 | |
2631 | break; | |
2632 | } | |
0435312e JH |
2633 | /* Output this line note if it is the first or the last line |
2634 | note in a row. */ | |
725730f2 | 2635 | if (!DECL_IGNORED_P (current_function_decl) |
96a95ac1 | 2636 | && notice_source_line (insn, is_stmt_p)) |
82f72146 DM |
2637 | { |
2638 | if (flag_verbose_asm) | |
2639 | asm_show_source (last_filename, last_linenum); | |
497b7c47 JJ |
2640 | (*debug_hooks->source_line) (last_linenum, last_columnnum, |
2641 | last_filename, last_discriminator, | |
2642 | is_stmt); | |
82f72146 | 2643 | } |
3cf2715d | 2644 | |
93671519 BE |
2645 | if (GET_CODE (body) == PARALLEL |
2646 | && GET_CODE (XVECEXP (body, 0, 0)) == ASM_INPUT) | |
2647 | body = XVECEXP (body, 0, 0); | |
2648 | ||
3cf2715d DE |
2649 | if (GET_CODE (body) == ASM_INPUT) |
2650 | { | |
36d7136e RH |
2651 | const char *string = XSTR (body, 0); |
2652 | ||
3cf2715d DE |
2653 | /* There's no telling what that did to the condition codes. */ |
2654 | CC_STATUS_INIT; | |
36d7136e RH |
2655 | |
2656 | if (string[0]) | |
3cf2715d | 2657 | { |
5ffeb913 | 2658 | expanded_location loc; |
bff4b63d | 2659 | |
3a694d86 | 2660 | app_enable (); |
5ffeb913 | 2661 | loc = expand_location (ASM_INPUT_SOURCE_LOCATION (body)); |
0de2ae02 | 2662 | if (*loc.file && loc.line) |
bff4b63d AO |
2663 | fprintf (asm_out_file, "%s %i \"%s\" 1\n", |
2664 | ASM_COMMENT_START, loc.line, loc.file); | |
36d7136e | 2665 | fprintf (asm_out_file, "\t%s\n", string); |
03943c05 AO |
2666 | #if HAVE_AS_LINE_ZERO |
2667 | if (*loc.file && loc.line) | |
bff4b63d | 2668 | fprintf (asm_out_file, "%s 0 \"\" 2\n", ASM_COMMENT_START); |
03943c05 | 2669 | #endif |
3cf2715d | 2670 | } |
3cf2715d DE |
2671 | break; |
2672 | } | |
2673 | ||
2674 | /* Detect `asm' construct with operands. */ | |
2675 | if (asm_noperands (body) >= 0) | |
2676 | { | |
22bf4422 | 2677 | unsigned int noperands = asm_noperands (body); |
1b4572a8 | 2678 | rtx *ops = XALLOCAVEC (rtx, noperands); |
3cce094d | 2679 | const char *string; |
bff4b63d | 2680 | location_t loc; |
5ffeb913 | 2681 | expanded_location expanded; |
3cf2715d DE |
2682 | |
2683 | /* There's no telling what that did to the condition codes. */ | |
2684 | CC_STATUS_INIT; | |
3cf2715d | 2685 | |
3cf2715d | 2686 | /* Get out the operand values. */ |
bff4b63d | 2687 | string = decode_asm_operands (body, ops, NULL, NULL, NULL, &loc); |
41129be2 | 2688 | /* Inhibit dying on what would otherwise be compiler bugs. */ |
3cf2715d DE |
2689 | insn_noperands = noperands; |
2690 | this_is_asm_operands = insn; | |
5ffeb913 | 2691 | expanded = expand_location (loc); |
3cf2715d | 2692 | |
ad7e39ca AO |
2693 | #ifdef FINAL_PRESCAN_INSN |
2694 | FINAL_PRESCAN_INSN (insn, ops, insn_noperands); | |
2695 | #endif | |
2696 | ||
3cf2715d | 2697 | /* Output the insn using them. */ |
36d7136e RH |
2698 | if (string[0]) |
2699 | { | |
3a694d86 | 2700 | app_enable (); |
5ffeb913 | 2701 | if (expanded.file && expanded.line) |
bff4b63d | 2702 | fprintf (asm_out_file, "%s %i \"%s\" 1\n", |
5ffeb913 | 2703 | ASM_COMMENT_START, expanded.line, expanded.file); |
36d7136e | 2704 | output_asm_insn (string, ops); |
03943c05 | 2705 | #if HAVE_AS_LINE_ZERO |
5ffeb913 | 2706 | if (expanded.file && expanded.line) |
bff4b63d | 2707 | fprintf (asm_out_file, "%s 0 \"\" 2\n", ASM_COMMENT_START); |
03943c05 | 2708 | #endif |
36d7136e RH |
2709 | } |
2710 | ||
1afc5373 CF |
2711 | if (targetm.asm_out.final_postscan_insn) |
2712 | targetm.asm_out.final_postscan_insn (file, insn, ops, | |
2713 | insn_noperands); | |
2714 | ||
3cf2715d DE |
2715 | this_is_asm_operands = 0; |
2716 | break; | |
2717 | } | |
2718 | ||
bad4f40b | 2719 | app_disable (); |
3cf2715d | 2720 | |
e429a50b | 2721 | if (rtx_sequence *seq = dyn_cast <rtx_sequence *> (body)) |
3cf2715d DE |
2722 | { |
2723 | /* A delayed-branch sequence */ | |
b3694847 | 2724 | int i; |
3cf2715d | 2725 | |
b32d5189 | 2726 | final_sequence = seq; |
3cf2715d DE |
2727 | |
2728 | /* The first insn in this SEQUENCE might be a JUMP_INSN that will | |
2729 | force the restoration of a comparison that was previously | |
2730 | thought unnecessary. If that happens, cancel this sequence | |
2731 | and cause that insn to be restored. */ | |
2732 | ||
e429a50b DM |
2733 | next = final_scan_insn (seq->insn (0), file, 0, 1, seen); |
2734 | if (next != seq->insn (1)) | |
3cf2715d DE |
2735 | { |
2736 | final_sequence = 0; | |
2737 | return next; | |
2738 | } | |
2739 | ||
e429a50b | 2740 | for (i = 1; i < seq->len (); i++) |
c7eee2df | 2741 | { |
e429a50b | 2742 | rtx_insn *insn = seq->insn (i); |
fa7af581 | 2743 | rtx_insn *next = NEXT_INSN (insn); |
c7eee2df RK |
2744 | /* We loop in case any instruction in a delay slot gets |
2745 | split. */ | |
2746 | do | |
c9d691e9 | 2747 | insn = final_scan_insn (insn, file, 0, 1, seen); |
c7eee2df RK |
2748 | while (insn != next); |
2749 | } | |
3cf2715d DE |
2750 | #ifdef DBR_OUTPUT_SEQEND |
2751 | DBR_OUTPUT_SEQEND (file); | |
2752 | #endif | |
2753 | final_sequence = 0; | |
2754 | ||
2755 | /* If the insn requiring the delay slot was a CALL_INSN, the | |
2756 | insns in the delay slot are actually executed before the | |
2757 | called function. Hence we don't preserve any CC-setting | |
2758 | actions in these insns and the CC must be marked as being | |
2759 | clobbered by the function. */ | |
e429a50b | 2760 | if (CALL_P (seq->insn (0))) |
b729186a JL |
2761 | { |
2762 | CC_STATUS_INIT; | |
2763 | } | |
3cf2715d DE |
2764 | break; |
2765 | } | |
2766 | ||
2767 | /* We have a real machine instruction as rtl. */ | |
2768 | ||
2769 | body = PATTERN (insn); | |
2770 | ||
f1e52ed6 | 2771 | #if HAVE_cc0 |
f5d927c0 | 2772 | set = single_set (insn); |
b88c92cc | 2773 | |
3cf2715d DE |
2774 | /* Check for redundant test and compare instructions |
2775 | (when the condition codes are already set up as desired). | |
2776 | This is done only when optimizing; if not optimizing, | |
2777 | it should be possible for the user to alter a variable | |
2778 | with the debugger in between statements | |
2779 | and the next statement should reexamine the variable | |
2780 | to compute the condition codes. */ | |
2781 | ||
46625112 | 2782 | if (optimize_p) |
3cf2715d | 2783 | { |
30f5e9f5 RK |
2784 | if (set |
2785 | && GET_CODE (SET_DEST (set)) == CC0 | |
2786 | && insn != last_ignored_compare) | |
3cf2715d | 2787 | { |
f90b7a5a | 2788 | rtx src1, src2; |
30f5e9f5 | 2789 | if (GET_CODE (SET_SRC (set)) == SUBREG) |
55a2c322 | 2790 | SET_SRC (set) = alter_subreg (&SET_SRC (set), true); |
f90b7a5a PB |
2791 | |
2792 | src1 = SET_SRC (set); | |
2793 | src2 = NULL_RTX; | |
2794 | if (GET_CODE (SET_SRC (set)) == COMPARE) | |
30f5e9f5 RK |
2795 | { |
2796 | if (GET_CODE (XEXP (SET_SRC (set), 0)) == SUBREG) | |
2797 | XEXP (SET_SRC (set), 0) | |
55a2c322 | 2798 | = alter_subreg (&XEXP (SET_SRC (set), 0), true); |
30f5e9f5 RK |
2799 | if (GET_CODE (XEXP (SET_SRC (set), 1)) == SUBREG) |
2800 | XEXP (SET_SRC (set), 1) | |
55a2c322 | 2801 | = alter_subreg (&XEXP (SET_SRC (set), 1), true); |
f90b7a5a PB |
2802 | if (XEXP (SET_SRC (set), 1) |
2803 | == CONST0_RTX (GET_MODE (XEXP (SET_SRC (set), 0)))) | |
2804 | src2 = XEXP (SET_SRC (set), 0); | |
30f5e9f5 RK |
2805 | } |
2806 | if ((cc_status.value1 != 0 | |
f90b7a5a | 2807 | && rtx_equal_p (src1, cc_status.value1)) |
30f5e9f5 | 2808 | || (cc_status.value2 != 0 |
f90b7a5a PB |
2809 | && rtx_equal_p (src1, cc_status.value2)) |
2810 | || (src2 != 0 && cc_status.value1 != 0 | |
2811 | && rtx_equal_p (src2, cc_status.value1)) | |
2812 | || (src2 != 0 && cc_status.value2 != 0 | |
2813 | && rtx_equal_p (src2, cc_status.value2))) | |
3cf2715d | 2814 | { |
30f5e9f5 | 2815 | /* Don't delete insn if it has an addressing side-effect. */ |
ff81832f | 2816 | if (! FIND_REG_INC_NOTE (insn, NULL_RTX) |
30f5e9f5 RK |
2817 | /* or if anything in it is volatile. */ |
2818 | && ! volatile_refs_p (PATTERN (insn))) | |
2819 | { | |
2820 | /* We don't really delete the insn; just ignore it. */ | |
2821 | last_ignored_compare = insn; | |
2822 | break; | |
2823 | } | |
3cf2715d DE |
2824 | } |
2825 | } | |
2826 | } | |
3cf2715d | 2827 | |
3cf2715d DE |
2828 | /* If this is a conditional branch, maybe modify it |
2829 | if the cc's are in a nonstandard state | |
2830 | so that it accomplishes the same thing that it would | |
2831 | do straightforwardly if the cc's were set up normally. */ | |
2832 | ||
2833 | if (cc_status.flags != 0 | |
4b4bf941 | 2834 | && JUMP_P (insn) |
3cf2715d DE |
2835 | && GET_CODE (body) == SET |
2836 | && SET_DEST (body) == pc_rtx | |
2837 | && GET_CODE (SET_SRC (body)) == IF_THEN_ELSE | |
ec8e098d | 2838 | && COMPARISON_P (XEXP (SET_SRC (body), 0)) |
c9d691e9 | 2839 | && XEXP (XEXP (SET_SRC (body), 0), 0) == cc0_rtx) |
3cf2715d DE |
2840 | { |
2841 | /* This function may alter the contents of its argument | |
2842 | and clear some of the cc_status.flags bits. | |
2843 | It may also return 1 meaning condition now always true | |
2844 | or -1 meaning condition now always false | |
2845 | or 2 meaning condition nontrivial but altered. */ | |
b3694847 | 2846 | int result = alter_cond (XEXP (SET_SRC (body), 0)); |
3cf2715d DE |
2847 | /* If condition now has fixed value, replace the IF_THEN_ELSE |
2848 | with its then-operand or its else-operand. */ | |
2849 | if (result == 1) | |
2850 | SET_SRC (body) = XEXP (SET_SRC (body), 1); | |
2851 | if (result == -1) | |
2852 | SET_SRC (body) = XEXP (SET_SRC (body), 2); | |
2853 | ||
2854 | /* The jump is now either unconditional or a no-op. | |
2855 | If it has become a no-op, don't try to output it. | |
2856 | (It would not be recognized.) */ | |
2857 | if (SET_SRC (body) == pc_rtx) | |
2858 | { | |
ca6c03ca | 2859 | delete_insn (insn); |
3cf2715d DE |
2860 | break; |
2861 | } | |
26898771 | 2862 | else if (ANY_RETURN_P (SET_SRC (body))) |
3cf2715d DE |
2863 | /* Replace (set (pc) (return)) with (return). */ |
2864 | PATTERN (insn) = body = SET_SRC (body); | |
2865 | ||
2866 | /* Rerecognize the instruction if it has changed. */ | |
2867 | if (result != 0) | |
2868 | INSN_CODE (insn) = -1; | |
2869 | } | |
2870 | ||
604e4ce3 | 2871 | /* If this is a conditional trap, maybe modify it if the cc's |
604e4ce3 KH |
2872 | are in a nonstandard state so that it accomplishes the same |
2873 | thing that it would do straightforwardly if the cc's were | |
2874 | set up normally. */ | |
2875 | if (cc_status.flags != 0 | |
2876 | && NONJUMP_INSN_P (insn) | |
2877 | && GET_CODE (body) == TRAP_IF | |
2878 | && COMPARISON_P (TRAP_CONDITION (body)) | |
2879 | && XEXP (TRAP_CONDITION (body), 0) == cc0_rtx) | |
2880 | { | |
2881 | /* This function may alter the contents of its argument | |
2882 | and clear some of the cc_status.flags bits. | |
2883 | It may also return 1 meaning condition now always true | |
2884 | or -1 meaning condition now always false | |
2885 | or 2 meaning condition nontrivial but altered. */ | |
2886 | int result = alter_cond (TRAP_CONDITION (body)); | |
2887 | ||
2888 | /* If TRAP_CONDITION has become always false, delete the | |
2889 | instruction. */ | |
2890 | if (result == -1) | |
2891 | { | |
2892 | delete_insn (insn); | |
2893 | break; | |
2894 | } | |
2895 | ||
2896 | /* If TRAP_CONDITION has become always true, replace | |
2897 | TRAP_CONDITION with const_true_rtx. */ | |
2898 | if (result == 1) | |
2899 | TRAP_CONDITION (body) = const_true_rtx; | |
2900 | ||
2901 | /* Rerecognize the instruction if it has changed. */ | |
2902 | if (result != 0) | |
2903 | INSN_CODE (insn) = -1; | |
2904 | } | |
2905 | ||
3cf2715d | 2906 | /* Make same adjustments to instructions that examine the |
462da2af SC |
2907 | condition codes without jumping and instructions that |
2908 | handle conditional moves (if this machine has either one). */ | |
3cf2715d DE |
2909 | |
2910 | if (cc_status.flags != 0 | |
b88c92cc | 2911 | && set != 0) |
3cf2715d | 2912 | { |
462da2af | 2913 | rtx cond_rtx, then_rtx, else_rtx; |
f5d927c0 | 2914 | |
4b4bf941 | 2915 | if (!JUMP_P (insn) |
b88c92cc | 2916 | && GET_CODE (SET_SRC (set)) == IF_THEN_ELSE) |
462da2af | 2917 | { |
b88c92cc RK |
2918 | cond_rtx = XEXP (SET_SRC (set), 0); |
2919 | then_rtx = XEXP (SET_SRC (set), 1); | |
2920 | else_rtx = XEXP (SET_SRC (set), 2); | |
462da2af SC |
2921 | } |
2922 | else | |
2923 | { | |
b88c92cc | 2924 | cond_rtx = SET_SRC (set); |
462da2af SC |
2925 | then_rtx = const_true_rtx; |
2926 | else_rtx = const0_rtx; | |
2927 | } | |
f5d927c0 | 2928 | |
511d31d8 AS |
2929 | if (COMPARISON_P (cond_rtx) |
2930 | && XEXP (cond_rtx, 0) == cc0_rtx) | |
3cf2715d | 2931 | { |
511d31d8 AS |
2932 | int result; |
2933 | result = alter_cond (cond_rtx); | |
2934 | if (result == 1) | |
2935 | validate_change (insn, &SET_SRC (set), then_rtx, 0); | |
2936 | else if (result == -1) | |
2937 | validate_change (insn, &SET_SRC (set), else_rtx, 0); | |
2938 | else if (result == 2) | |
2939 | INSN_CODE (insn) = -1; | |
2940 | if (SET_DEST (set) == SET_SRC (set)) | |
2941 | delete_insn (insn); | |
3cf2715d DE |
2942 | } |
2943 | } | |
462da2af | 2944 | |
3cf2715d DE |
2945 | #endif |
2946 | ||
2947 | /* Do machine-specific peephole optimizations if desired. */ | |
2948 | ||
d87834de | 2949 | if (HAVE_peephole && optimize_p && !flag_no_peephole && !nopeepholes) |
3cf2715d | 2950 | { |
fa7af581 | 2951 | rtx_insn *next = peephole (insn); |
3cf2715d DE |
2952 | /* When peepholing, if there were notes within the peephole, |
2953 | emit them before the peephole. */ | |
2954 | if (next != 0 && next != NEXT_INSN (insn)) | |
2955 | { | |
fa7af581 | 2956 | rtx_insn *note, *prev = PREV_INSN (insn); |
3cf2715d DE |
2957 | |
2958 | for (note = NEXT_INSN (insn); note != next; | |
2959 | note = NEXT_INSN (note)) | |
46625112 | 2960 | final_scan_insn (note, file, optimize_p, nopeepholes, seen); |
a2785739 ILT |
2961 | |
2962 | /* Put the notes in the proper position for a later | |
2963 | rescan. For example, the SH target can do this | |
2964 | when generating a far jump in a delayed branch | |
2965 | sequence. */ | |
2966 | note = NEXT_INSN (insn); | |
0f82e5c9 DM |
2967 | SET_PREV_INSN (note) = prev; |
2968 | SET_NEXT_INSN (prev) = note; | |
2969 | SET_NEXT_INSN (PREV_INSN (next)) = insn; | |
2970 | SET_PREV_INSN (insn) = PREV_INSN (next); | |
2971 | SET_NEXT_INSN (insn) = next; | |
2972 | SET_PREV_INSN (next) = insn; | |
3cf2715d DE |
2973 | } |
2974 | ||
2975 | /* PEEPHOLE might have changed this. */ | |
2976 | body = PATTERN (insn); | |
2977 | } | |
2978 | ||
2979 | /* Try to recognize the instruction. | |
2980 | If successful, verify that the operands satisfy the | |
2981 | constraints for the instruction. Crash if they don't, | |
2982 | since `reload' should have changed them so that they do. */ | |
2983 | ||
2984 | insn_code_number = recog_memoized (insn); | |
0304f787 | 2985 | cleanup_subreg_operands (insn); |
3cf2715d | 2986 | |
8c503f0d SB |
2987 | /* Dump the insn in the assembly for debugging (-dAP). |
2988 | If the final dump is requested as slim RTL, dump slim | |
2989 | RTL to the assembly file also. */ | |
dd3f0101 KH |
2990 | if (flag_dump_rtl_in_asm) |
2991 | { | |
2992 | print_rtx_head = ASM_COMMENT_START; | |
8c503f0d SB |
2993 | if (! (dump_flags & TDF_SLIM)) |
2994 | print_rtl_single (asm_out_file, insn); | |
2995 | else | |
2996 | dump_insn_slim (asm_out_file, insn); | |
dd3f0101 KH |
2997 | print_rtx_head = ""; |
2998 | } | |
b9f22704 | 2999 | |
daca1a96 | 3000 | if (! constrain_operands_cached (insn, 1)) |
3cf2715d | 3001 | fatal_insn_not_found (insn); |
3cf2715d DE |
3002 | |
3003 | /* Some target machines need to prescan each insn before | |
3004 | it is output. */ | |
3005 | ||
3006 | #ifdef FINAL_PRESCAN_INSN | |
1ccbefce | 3007 | FINAL_PRESCAN_INSN (insn, recog_data.operand, recog_data.n_operands); |
3cf2715d DE |
3008 | #endif |
3009 | ||
2929029c WG |
3010 | if (targetm.have_conditional_execution () |
3011 | && GET_CODE (PATTERN (insn)) == COND_EXEC) | |
afe48e06 | 3012 | current_insn_predicate = COND_EXEC_TEST (PATTERN (insn)); |
afe48e06 | 3013 | |
f1e52ed6 | 3014 | #if HAVE_cc0 |
3cf2715d DE |
3015 | cc_prev_status = cc_status; |
3016 | ||
3017 | /* Update `cc_status' for this instruction. | |
3018 | The instruction's output routine may change it further. | |
3019 | If the output routine for a jump insn needs to depend | |
3020 | on the cc status, it should look at cc_prev_status. */ | |
3021 | ||
3022 | NOTICE_UPDATE_CC (body, insn); | |
3023 | #endif | |
3024 | ||
b1a9f6a0 | 3025 | current_output_insn = debug_insn = insn; |
3cf2715d | 3026 | |
4bbf910e | 3027 | /* Find the proper template for this insn. */ |
48c54229 | 3028 | templ = get_insn_template (insn_code_number, insn); |
3cf2715d | 3029 | |
4bbf910e RH |
3030 | /* If the C code returns 0, it means that it is a jump insn |
3031 | which follows a deleted test insn, and that test insn | |
3032 | needs to be reinserted. */ | |
48c54229 | 3033 | if (templ == 0) |
3cf2715d | 3034 | { |
fa7af581 | 3035 | rtx_insn *prev; |
efd0378b | 3036 | |
0bccc606 | 3037 | gcc_assert (prev_nonnote_insn (insn) == last_ignored_compare); |
efd0378b HPN |
3038 | |
3039 | /* We have already processed the notes between the setter and | |
3040 | the user. Make sure we don't process them again, this is | |
3041 | particularly important if one of the notes is a block | |
3042 | scope note or an EH note. */ | |
3043 | for (prev = insn; | |
3044 | prev != last_ignored_compare; | |
3045 | prev = PREV_INSN (prev)) | |
3046 | { | |
4b4bf941 | 3047 | if (NOTE_P (prev)) |
ca6c03ca | 3048 | delete_insn (prev); /* Use delete_note. */ |
efd0378b HPN |
3049 | } |
3050 | ||
3051 | return prev; | |
3cf2715d DE |
3052 | } |
3053 | ||
3054 | /* If the template is the string "#", it means that this insn must | |
3055 | be split. */ | |
48c54229 | 3056 | if (templ[0] == '#' && templ[1] == '\0') |
3cf2715d | 3057 | { |
fa7af581 | 3058 | rtx_insn *new_rtx = try_split (body, insn, 0); |
3cf2715d DE |
3059 | |
3060 | /* If we didn't split the insn, go away. */ | |
48c54229 | 3061 | if (new_rtx == insn && PATTERN (new_rtx) == body) |
c725bd79 | 3062 | fatal_insn ("could not split insn", insn); |
f5d927c0 | 3063 | |
d327457f JR |
3064 | /* If we have a length attribute, this instruction should have |
3065 | been split in shorten_branches, to ensure that we would have | |
3066 | valid length info for the splitees. */ | |
3067 | gcc_assert (!HAVE_ATTR_length); | |
3d14e82f | 3068 | |
48c54229 | 3069 | return new_rtx; |
3cf2715d | 3070 | } |
f5d927c0 | 3071 | |
951120ea PB |
3072 | /* ??? This will put the directives in the wrong place if |
3073 | get_insn_template outputs assembly directly. However calling it | |
3074 | before get_insn_template breaks if the insns is split. */ | |
3bc6b3e6 RH |
3075 | if (targetm.asm_out.unwind_emit_before_insn |
3076 | && targetm.asm_out.unwind_emit) | |
2784ed9c | 3077 | targetm.asm_out.unwind_emit (asm_out_file, insn); |
3cf2715d | 3078 | |
f2834b5d PMR |
3079 | rtx_call_insn *call_insn = dyn_cast <rtx_call_insn *> (insn); |
3080 | if (call_insn != NULL) | |
f410e1b3 | 3081 | { |
fa7af581 | 3082 | rtx x = call_from_call_insn (call_insn); |
f410e1b3 RAE |
3083 | x = XEXP (x, 0); |
3084 | if (x && MEM_P (x) && GET_CODE (XEXP (x, 0)) == SYMBOL_REF) | |
3085 | { | |
3086 | tree t; | |
3087 | x = XEXP (x, 0); | |
3088 | t = SYMBOL_REF_DECL (x); | |
3089 | if (t) | |
3090 | assemble_external (t); | |
3091 | } | |
3092 | } | |
3093 | ||
951120ea | 3094 | /* Output assembler code from the template. */ |
48c54229 | 3095 | output_asm_insn (templ, recog_data.operand); |
3cf2715d | 3096 | |
1afc5373 CF |
3097 | /* Some target machines need to postscan each insn after |
3098 | it is output. */ | |
3099 | if (targetm.asm_out.final_postscan_insn) | |
3100 | targetm.asm_out.final_postscan_insn (file, insn, recog_data.operand, | |
3101 | recog_data.n_operands); | |
3102 | ||
3bc6b3e6 RH |
3103 | if (!targetm.asm_out.unwind_emit_before_insn |
3104 | && targetm.asm_out.unwind_emit) | |
3105 | targetm.asm_out.unwind_emit (asm_out_file, insn); | |
3106 | ||
f2834b5d PMR |
3107 | /* Let the debug info back-end know about this call. We do this only |
3108 | after the instruction has been emitted because labels that may be | |
3109 | created to reference the call instruction must appear after it. */ | |
3110 | if (call_insn != NULL && !DECL_IGNORED_P (current_function_decl)) | |
3111 | debug_hooks->var_location (insn); | |
3112 | ||
b1a9f6a0 | 3113 | current_output_insn = debug_insn = 0; |
3cf2715d DE |
3114 | } |
3115 | } | |
3116 | return NEXT_INSN (insn); | |
3117 | } | |
3118 | \f | |
ed5ef2e4 CC |
3119 | /* Return whether a source line note needs to be emitted before INSN. |
3120 | Sets IS_STMT to TRUE if the line should be marked as a possible | |
3121 | breakpoint location. */ | |
3cf2715d | 3122 | |
0435312e | 3123 | static bool |
fa7af581 | 3124 | notice_source_line (rtx_insn *insn, bool *is_stmt) |
3cf2715d | 3125 | { |
d752cfdb | 3126 | const char *filename; |
497b7c47 | 3127 | int linenum, columnnum; |
d752cfdb | 3128 | |
96a95ac1 AO |
3129 | if (NOTE_MARKER_P (insn)) |
3130 | { | |
3131 | location_t loc = NOTE_MARKER_LOCATION (insn); | |
3132 | expanded_location xloc = expand_location (loc); | |
3133 | if (xloc.line == 0) | |
3134 | { | |
3135 | gcc_checking_assert (LOCATION_LOCUS (loc) == UNKNOWN_LOCATION | |
3136 | || LOCATION_LOCUS (loc) == BUILTINS_LOCATION); | |
3137 | return false; | |
3138 | } | |
3139 | filename = xloc.file; | |
3140 | linenum = xloc.line; | |
3141 | columnnum = xloc.column; | |
3142 | force_source_line = true; | |
3143 | } | |
3144 | else if (override_filename) | |
d752cfdb JJ |
3145 | { |
3146 | filename = override_filename; | |
3147 | linenum = override_linenum; | |
497b7c47 | 3148 | columnnum = override_columnnum; |
d752cfdb | 3149 | } |
ffa4602f EB |
3150 | else if (INSN_HAS_LOCATION (insn)) |
3151 | { | |
3152 | expanded_location xloc = insn_location (insn); | |
3153 | filename = xloc.file; | |
3154 | linenum = xloc.line; | |
497b7c47 | 3155 | columnnum = xloc.column; |
ffa4602f | 3156 | } |
d752cfdb JJ |
3157 | else |
3158 | { | |
ffa4602f EB |
3159 | filename = NULL; |
3160 | linenum = 0; | |
497b7c47 | 3161 | columnnum = 0; |
d752cfdb | 3162 | } |
3cf2715d | 3163 | |
ed5ef2e4 CC |
3164 | if (filename == NULL) |
3165 | return false; | |
3166 | ||
3167 | if (force_source_line | |
3168 | || filename != last_filename | |
497b7c47 JJ |
3169 | || last_linenum != linenum |
3170 | || (debug_column_info && last_columnnum != columnnum)) | |
0435312e | 3171 | { |
b8176fe4 | 3172 | force_source_line = false; |
0435312e JH |
3173 | last_filename = filename; |
3174 | last_linenum = linenum; | |
497b7c47 | 3175 | last_columnnum = columnnum; |
6c52e687 | 3176 | last_discriminator = discriminator; |
96a95ac1 AO |
3177 | if (is_stmt) |
3178 | *is_stmt = true; | |
0435312e JH |
3179 | high_block_linenum = MAX (last_linenum, high_block_linenum); |
3180 | high_function_linenum = MAX (last_linenum, high_function_linenum); | |
3181 | return true; | |
3182 | } | |
ed5ef2e4 CC |
3183 | |
3184 | if (SUPPORTS_DISCRIMINATOR && last_discriminator != discriminator) | |
3185 | { | |
3186 | /* If the discriminator changed, but the line number did not, | |
3187 | output the line table entry with is_stmt false so the | |
3188 | debugger does not treat this as a breakpoint location. */ | |
3189 | last_discriminator = discriminator; | |
96a95ac1 AO |
3190 | if (is_stmt) |
3191 | *is_stmt = false; | |
ed5ef2e4 CC |
3192 | return true; |
3193 | } | |
3194 | ||
0435312e | 3195 | return false; |
3cf2715d DE |
3196 | } |
3197 | \f | |
0304f787 JL |
3198 | /* For each operand in INSN, simplify (subreg (reg)) so that it refers |
3199 | directly to the desired hard register. */ | |
f5d927c0 | 3200 | |
0304f787 | 3201 | void |
647d790d | 3202 | cleanup_subreg_operands (rtx_insn *insn) |
0304f787 | 3203 | { |
f62a15e3 | 3204 | int i; |
6fb5fa3c | 3205 | bool changed = false; |
6c698a6d | 3206 | extract_insn_cached (insn); |
1ccbefce | 3207 | for (i = 0; i < recog_data.n_operands; i++) |
0304f787 | 3208 | { |
2067c116 | 3209 | /* The following test cannot use recog_data.operand when testing |
9f4524f2 RE |
3210 | for a SUBREG: the underlying object might have been changed |
3211 | already if we are inside a match_operator expression that | |
3212 | matches the else clause. Instead we test the underlying | |
3213 | expression directly. */ | |
3214 | if (GET_CODE (*recog_data.operand_loc[i]) == SUBREG) | |
6fb5fa3c | 3215 | { |
55a2c322 | 3216 | recog_data.operand[i] = alter_subreg (recog_data.operand_loc[i], true); |
6fb5fa3c DB |
3217 | changed = true; |
3218 | } | |
1ccbefce | 3219 | else if (GET_CODE (recog_data.operand[i]) == PLUS |
04337620 | 3220 | || GET_CODE (recog_data.operand[i]) == MULT |
3c0cb5de | 3221 | || MEM_P (recog_data.operand[i])) |
6fb5fa3c | 3222 | recog_data.operand[i] = walk_alter_subreg (recog_data.operand_loc[i], &changed); |
0304f787 JL |
3223 | } |
3224 | ||
1ccbefce | 3225 | for (i = 0; i < recog_data.n_dups; i++) |
0304f787 | 3226 | { |
1ccbefce | 3227 | if (GET_CODE (*recog_data.dup_loc[i]) == SUBREG) |
6fb5fa3c | 3228 | { |
55a2c322 | 3229 | *recog_data.dup_loc[i] = alter_subreg (recog_data.dup_loc[i], true); |
6fb5fa3c DB |
3230 | changed = true; |
3231 | } | |
1ccbefce | 3232 | else if (GET_CODE (*recog_data.dup_loc[i]) == PLUS |
04337620 | 3233 | || GET_CODE (*recog_data.dup_loc[i]) == MULT |
3c0cb5de | 3234 | || MEM_P (*recog_data.dup_loc[i])) |
6fb5fa3c | 3235 | *recog_data.dup_loc[i] = walk_alter_subreg (recog_data.dup_loc[i], &changed); |
0304f787 | 3236 | } |
6fb5fa3c | 3237 | if (changed) |
647d790d | 3238 | df_insn_rescan (insn); |
0304f787 JL |
3239 | } |
3240 | ||
55a2c322 VM |
3241 | /* If X is a SUBREG, try to replace it with a REG or a MEM, based on |
3242 | the thing it is a subreg of. Do it anyway if FINAL_P. */ | |
3cf2715d DE |
3243 | |
3244 | rtx | |
55a2c322 | 3245 | alter_subreg (rtx *xp, bool final_p) |
3cf2715d | 3246 | { |
49d801d3 | 3247 | rtx x = *xp; |
b3694847 | 3248 | rtx y = SUBREG_REG (x); |
f5963e61 | 3249 | |
49d801d3 JH |
3250 | /* simplify_subreg does not remove subreg from volatile references. |
3251 | We are required to. */ | |
3c0cb5de | 3252 | if (MEM_P (y)) |
fd326ba8 | 3253 | { |
91914e56 | 3254 | poly_int64 offset = SUBREG_BYTE (x); |
fd326ba8 UW |
3255 | |
3256 | /* For paradoxical subregs on big-endian machines, SUBREG_BYTE | |
3257 | contains 0 instead of the proper offset. See simplify_subreg. */ | |
03a95621 | 3258 | if (paradoxical_subreg_p (x)) |
90f2b7e2 | 3259 | offset = byte_lowpart_offset (GET_MODE (x), GET_MODE (y)); |
fd326ba8 | 3260 | |
55a2c322 VM |
3261 | if (final_p) |
3262 | *xp = adjust_address (y, GET_MODE (x), offset); | |
3263 | else | |
3264 | *xp = adjust_address_nv (y, GET_MODE (x), offset); | |
fd326ba8 | 3265 | } |
a50fa76a | 3266 | else if (REG_P (y) && HARD_REGISTER_P (y)) |
fea54805 | 3267 | { |
48c54229 | 3268 | rtx new_rtx = simplify_subreg (GET_MODE (x), y, GET_MODE (y), |
55a2c322 | 3269 | SUBREG_BYTE (x)); |
fea54805 | 3270 | |
48c54229 KG |
3271 | if (new_rtx != 0) |
3272 | *xp = new_rtx; | |
55a2c322 | 3273 | else if (final_p && REG_P (y)) |
fea54805 | 3274 | { |
0bccc606 | 3275 | /* Simplify_subreg can't handle some REG cases, but we have to. */ |
38ae7651 | 3276 | unsigned int regno; |
91914e56 | 3277 | poly_int64 offset; |
38ae7651 RS |
3278 | |
3279 | regno = subreg_regno (x); | |
3280 | if (subreg_lowpart_p (x)) | |
3281 | offset = byte_lowpart_offset (GET_MODE (x), GET_MODE (y)); | |
3282 | else | |
3283 | offset = SUBREG_BYTE (x); | |
3284 | *xp = gen_rtx_REG_offset (y, GET_MODE (x), regno, offset); | |
fea54805 | 3285 | } |
fea54805 RK |
3286 | } |
3287 | ||
49d801d3 | 3288 | return *xp; |
3cf2715d DE |
3289 | } |
3290 | ||
3291 | /* Do alter_subreg on all the SUBREGs contained in X. */ | |
3292 | ||
3293 | static rtx | |
6fb5fa3c | 3294 | walk_alter_subreg (rtx *xp, bool *changed) |
3cf2715d | 3295 | { |
49d801d3 | 3296 | rtx x = *xp; |
3cf2715d DE |
3297 | switch (GET_CODE (x)) |
3298 | { | |
3299 | case PLUS: | |
3300 | case MULT: | |
beed8fc0 | 3301 | case AND: |
6fb5fa3c DB |
3302 | XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0), changed); |
3303 | XEXP (x, 1) = walk_alter_subreg (&XEXP (x, 1), changed); | |
3cf2715d DE |
3304 | break; |
3305 | ||
3306 | case MEM: | |
beed8fc0 | 3307 | case ZERO_EXTEND: |
6fb5fa3c | 3308 | XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0), changed); |
3cf2715d DE |
3309 | break; |
3310 | ||
3311 | case SUBREG: | |
6fb5fa3c | 3312 | *changed = true; |
55a2c322 | 3313 | return alter_subreg (xp, true); |
f5d927c0 | 3314 | |
e9a25f70 JL |
3315 | default: |
3316 | break; | |
3cf2715d DE |
3317 | } |
3318 | ||
5bc72aeb | 3319 | return *xp; |
3cf2715d DE |
3320 | } |
3321 | \f | |
f1e52ed6 | 3322 | #if HAVE_cc0 |
3cf2715d DE |
3323 | |
3324 | /* Given BODY, the body of a jump instruction, alter the jump condition | |
3325 | as required by the bits that are set in cc_status.flags. | |
3326 | Not all of the bits there can be handled at this level in all cases. | |
3327 | ||
3328 | The value is normally 0. | |
3329 | 1 means that the condition has become always true. | |
3330 | -1 means that the condition has become always false. | |
3331 | 2 means that COND has been altered. */ | |
3332 | ||
3333 | static int | |
6cf9ac28 | 3334 | alter_cond (rtx cond) |
3cf2715d DE |
3335 | { |
3336 | int value = 0; | |
3337 | ||
3338 | if (cc_status.flags & CC_REVERSED) | |
3339 | { | |
3340 | value = 2; | |
3341 | PUT_CODE (cond, swap_condition (GET_CODE (cond))); | |
3342 | } | |
3343 | ||
3344 | if (cc_status.flags & CC_INVERTED) | |
3345 | { | |
3346 | value = 2; | |
3347 | PUT_CODE (cond, reverse_condition (GET_CODE (cond))); | |
3348 | } | |
3349 | ||
3350 | if (cc_status.flags & CC_NOT_POSITIVE) | |
3351 | switch (GET_CODE (cond)) | |
3352 | { | |
3353 | case LE: | |
3354 | case LEU: | |
3355 | case GEU: | |
3356 | /* Jump becomes unconditional. */ | |
3357 | return 1; | |
3358 | ||
3359 | case GT: | |
3360 | case GTU: | |
3361 | case LTU: | |
3362 | /* Jump becomes no-op. */ | |
3363 | return -1; | |
3364 | ||
3365 | case GE: | |
3366 | PUT_CODE (cond, EQ); | |
3367 | value = 2; | |
3368 | break; | |
3369 | ||
3370 | case LT: | |
3371 | PUT_CODE (cond, NE); | |
3372 | value = 2; | |
3373 | break; | |
f5d927c0 | 3374 | |
e9a25f70 JL |
3375 | default: |
3376 | break; | |
3cf2715d DE |
3377 | } |
3378 | ||
3379 | if (cc_status.flags & CC_NOT_NEGATIVE) | |
3380 | switch (GET_CODE (cond)) | |
3381 | { | |
3382 | case GE: | |
3383 | case GEU: | |
3384 | /* Jump becomes unconditional. */ | |
3385 | return 1; | |
3386 | ||
3387 | case LT: | |
3388 | case LTU: | |
3389 | /* Jump becomes no-op. */ | |
3390 | return -1; | |
3391 | ||
3392 | case LE: | |
3393 | case LEU: | |
3394 | PUT_CODE (cond, EQ); | |
3395 | value = 2; | |
3396 | break; | |
3397 | ||
3398 | case GT: | |
3399 | case GTU: | |
3400 | PUT_CODE (cond, NE); | |
3401 | value = 2; | |
3402 | break; | |
f5d927c0 | 3403 | |
e9a25f70 JL |
3404 | default: |
3405 | break; | |
3cf2715d DE |
3406 | } |
3407 | ||
3408 | if (cc_status.flags & CC_NO_OVERFLOW) | |
3409 | switch (GET_CODE (cond)) | |
3410 | { | |
3411 | case GEU: | |
3412 | /* Jump becomes unconditional. */ | |
3413 | return 1; | |
3414 | ||
3415 | case LEU: | |
3416 | PUT_CODE (cond, EQ); | |
3417 | value = 2; | |
3418 | break; | |
3419 | ||
3420 | case GTU: | |
3421 | PUT_CODE (cond, NE); | |
3422 | value = 2; | |
3423 | break; | |
3424 | ||
3425 | case LTU: | |
3426 | /* Jump becomes no-op. */ | |
3427 | return -1; | |
f5d927c0 | 3428 | |
e9a25f70 JL |
3429 | default: |
3430 | break; | |
3cf2715d DE |
3431 | } |
3432 | ||
3433 | if (cc_status.flags & (CC_Z_IN_NOT_N | CC_Z_IN_N)) | |
3434 | switch (GET_CODE (cond)) | |
3435 | { | |
e9a25f70 | 3436 | default: |
0bccc606 | 3437 | gcc_unreachable (); |
3cf2715d DE |
3438 | |
3439 | case NE: | |
3440 | PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? GE : LT); | |
3441 | value = 2; | |
3442 | break; | |
3443 | ||
3444 | case EQ: | |
3445 | PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? LT : GE); | |
3446 | value = 2; | |
3447 | break; | |
3448 | } | |
3449 | ||
3450 | if (cc_status.flags & CC_NOT_SIGNED) | |
3451 | /* The flags are valid if signed condition operators are converted | |
3452 | to unsigned. */ | |
3453 | switch (GET_CODE (cond)) | |
3454 | { | |
3455 | case LE: | |
3456 | PUT_CODE (cond, LEU); | |
3457 | value = 2; | |
3458 | break; | |
3459 | ||
3460 | case LT: | |
3461 | PUT_CODE (cond, LTU); | |
3462 | value = 2; | |
3463 | break; | |
3464 | ||
3465 | case GT: | |
3466 | PUT_CODE (cond, GTU); | |
3467 | value = 2; | |
3468 | break; | |
3469 | ||
3470 | case GE: | |
3471 | PUT_CODE (cond, GEU); | |
3472 | value = 2; | |
3473 | break; | |
e9a25f70 JL |
3474 | |
3475 | default: | |
3476 | break; | |
3cf2715d DE |
3477 | } |
3478 | ||
3479 | return value; | |
3480 | } | |
3481 | #endif | |
3482 | \f | |
3483 | /* Report inconsistency between the assembler template and the operands. | |
3484 | In an `asm', it's the user's fault; otherwise, the compiler's fault. */ | |
3485 | ||
3486 | void | |
4b794eaf | 3487 | output_operand_lossage (const char *cmsgid, ...) |
3cf2715d | 3488 | { |
a52453cc PT |
3489 | char *fmt_string; |
3490 | char *new_message; | |
fd478a0a | 3491 | const char *pfx_str; |
e34d07f2 | 3492 | va_list ap; |
6cf9ac28 | 3493 | |
4b794eaf | 3494 | va_start (ap, cmsgid); |
a52453cc | 3495 | |
9e637a26 | 3496 | pfx_str = this_is_asm_operands ? _("invalid 'asm': ") : "output_operand: "; |
582f770b UB |
3497 | fmt_string = xasprintf ("%s%s", pfx_str, _(cmsgid)); |
3498 | new_message = xvasprintf (fmt_string, ap); | |
dd3f0101 | 3499 | |
3cf2715d | 3500 | if (this_is_asm_operands) |
a52453cc | 3501 | error_for_asm (this_is_asm_operands, "%s", new_message); |
3cf2715d | 3502 | else |
a52453cc PT |
3503 | internal_error ("%s", new_message); |
3504 | ||
3505 | free (fmt_string); | |
3506 | free (new_message); | |
e34d07f2 | 3507 | va_end (ap); |
3cf2715d DE |
3508 | } |
3509 | \f | |
3510 | /* Output of assembler code from a template, and its subroutines. */ | |
3511 | ||
0d4903b8 RK |
3512 | /* Annotate the assembly with a comment describing the pattern and |
3513 | alternative used. */ | |
3514 | ||
3515 | static void | |
6cf9ac28 | 3516 | output_asm_name (void) |
0d4903b8 RK |
3517 | { |
3518 | if (debug_insn) | |
3519 | { | |
dff125eb SB |
3520 | fprintf (asm_out_file, "\t%s %d\t", |
3521 | ASM_COMMENT_START, INSN_UID (debug_insn)); | |
d327457f | 3522 | |
dff125eb SB |
3523 | fprintf (asm_out_file, "[c=%d", |
3524 | insn_cost (debug_insn, optimize_insn_for_speed_p ())); | |
d327457f | 3525 | if (HAVE_ATTR_length) |
dff125eb | 3526 | fprintf (asm_out_file, " l=%d", |
d327457f | 3527 | get_attr_length (debug_insn)); |
dff125eb SB |
3528 | fprintf (asm_out_file, "] "); |
3529 | ||
3530 | int num = INSN_CODE (debug_insn); | |
3531 | fprintf (asm_out_file, "%s", insn_data[num].name); | |
3532 | if (insn_data[num].n_alternatives > 1) | |
3533 | fprintf (asm_out_file, "/%d", which_alternative); | |
d327457f | 3534 | |
0d4903b8 RK |
3535 | /* Clear this so only the first assembler insn |
3536 | of any rtl insn will get the special comment for -dp. */ | |
3537 | debug_insn = 0; | |
3538 | } | |
3539 | } | |
3540 | ||
998d7deb RH |
3541 | /* If OP is a REG or MEM and we can find a MEM_EXPR corresponding to it |
3542 | or its address, return that expr . Set *PADDRESSP to 1 if the expr | |
c5adc06a RK |
3543 | corresponds to the address of the object and 0 if to the object. */ |
3544 | ||
3545 | static tree | |
6cf9ac28 | 3546 | get_mem_expr_from_op (rtx op, int *paddressp) |
c5adc06a | 3547 | { |
998d7deb | 3548 | tree expr; |
c5adc06a RK |
3549 | int inner_addressp; |
3550 | ||
3551 | *paddressp = 0; | |
3552 | ||
f8cfc6aa | 3553 | if (REG_P (op)) |
a560d4d4 | 3554 | return REG_EXPR (op); |
3c0cb5de | 3555 | else if (!MEM_P (op)) |
c5adc06a RK |
3556 | return 0; |
3557 | ||
998d7deb RH |
3558 | if (MEM_EXPR (op) != 0) |
3559 | return MEM_EXPR (op); | |
c5adc06a RK |
3560 | |
3561 | /* Otherwise we have an address, so indicate it and look at the address. */ | |
3562 | *paddressp = 1; | |
3563 | op = XEXP (op, 0); | |
3564 | ||
3565 | /* First check if we have a decl for the address, then look at the right side | |
3566 | if it is a PLUS. Otherwise, strip off arithmetic and keep looking. | |
3567 | But don't allow the address to itself be indirect. */ | |
998d7deb RH |
3568 | if ((expr = get_mem_expr_from_op (op, &inner_addressp)) && ! inner_addressp) |
3569 | return expr; | |
c5adc06a | 3570 | else if (GET_CODE (op) == PLUS |
998d7deb RH |
3571 | && (expr = get_mem_expr_from_op (XEXP (op, 1), &inner_addressp))) |
3572 | return expr; | |
c5adc06a | 3573 | |
481683e1 | 3574 | while (UNARY_P (op) |
ec8e098d | 3575 | || GET_RTX_CLASS (GET_CODE (op)) == RTX_BIN_ARITH) |
c5adc06a RK |
3576 | op = XEXP (op, 0); |
3577 | ||
998d7deb RH |
3578 | expr = get_mem_expr_from_op (op, &inner_addressp); |
3579 | return inner_addressp ? 0 : expr; | |
c5adc06a | 3580 | } |
ff81832f | 3581 | |
4f9b4029 RK |
3582 | /* Output operand names for assembler instructions. OPERANDS is the |
3583 | operand vector, OPORDER is the order to write the operands, and NOPS | |
3584 | is the number of operands to write. */ | |
3585 | ||
3586 | static void | |
6cf9ac28 | 3587 | output_asm_operand_names (rtx *operands, int *oporder, int nops) |
4f9b4029 RK |
3588 | { |
3589 | int wrote = 0; | |
3590 | int i; | |
3591 | ||
3592 | for (i = 0; i < nops; i++) | |
3593 | { | |
3594 | int addressp; | |
a560d4d4 JH |
3595 | rtx op = operands[oporder[i]]; |
3596 | tree expr = get_mem_expr_from_op (op, &addressp); | |
4f9b4029 | 3597 | |
a560d4d4 JH |
3598 | fprintf (asm_out_file, "%c%s", |
3599 | wrote ? ',' : '\t', wrote ? "" : ASM_COMMENT_START); | |
3600 | wrote = 1; | |
998d7deb | 3601 | if (expr) |
4f9b4029 | 3602 | { |
a560d4d4 | 3603 | fprintf (asm_out_file, "%s", |
998d7deb RH |
3604 | addressp ? "*" : ""); |
3605 | print_mem_expr (asm_out_file, expr); | |
4f9b4029 RK |
3606 | wrote = 1; |
3607 | } | |
a560d4d4 JH |
3608 | else if (REG_P (op) && ORIGINAL_REGNO (op) |
3609 | && ORIGINAL_REGNO (op) != REGNO (op)) | |
3610 | fprintf (asm_out_file, " tmp%i", ORIGINAL_REGNO (op)); | |
4f9b4029 RK |
3611 | } |
3612 | } | |
3613 | ||
d1658619 SP |
3614 | #ifdef ASSEMBLER_DIALECT |
3615 | /* Helper function to parse assembler dialects in the asm string. | |
3616 | This is called from output_asm_insn and asm_fprintf. */ | |
3617 | static const char * | |
3618 | do_assembler_dialects (const char *p, int *dialect) | |
3619 | { | |
3620 | char c = *(p - 1); | |
3621 | ||
3622 | switch (c) | |
3623 | { | |
3624 | case '{': | |
3625 | { | |
3626 | int i; | |
3627 | ||
3628 | if (*dialect) | |
3629 | output_operand_lossage ("nested assembly dialect alternatives"); | |
3630 | else | |
3631 | *dialect = 1; | |
3632 | ||
3633 | /* If we want the first dialect, do nothing. Otherwise, skip | |
3634 | DIALECT_NUMBER of strings ending with '|'. */ | |
3635 | for (i = 0; i < dialect_number; i++) | |
3636 | { | |
382522cb MK |
3637 | while (*p && *p != '}') |
3638 | { | |
3639 | if (*p == '|') | |
3640 | { | |
3641 | p++; | |
3642 | break; | |
3643 | } | |
3644 | ||
3645 | /* Skip over any character after a percent sign. */ | |
3646 | if (*p == '%') | |
3647 | p++; | |
3648 | if (*p) | |
3649 | p++; | |
3650 | } | |
3651 | ||
d1658619 SP |
3652 | if (*p == '}') |
3653 | break; | |
3654 | } | |
3655 | ||
3656 | if (*p == '\0') | |
3657 | output_operand_lossage ("unterminated assembly dialect alternative"); | |
3658 | } | |
3659 | break; | |
3660 | ||
3661 | case '|': | |
3662 | if (*dialect) | |
3663 | { | |
3664 | /* Skip to close brace. */ | |
3665 | do | |
3666 | { | |
3667 | if (*p == '\0') | |
3668 | { | |
3669 | output_operand_lossage ("unterminated assembly dialect alternative"); | |
3670 | break; | |
3671 | } | |
382522cb MK |
3672 | |
3673 | /* Skip over any character after a percent sign. */ | |
3674 | if (*p == '%' && p[1]) | |
3675 | { | |
3676 | p += 2; | |
3677 | continue; | |
3678 | } | |
3679 | ||
3680 | if (*p++ == '}') | |
3681 | break; | |
d1658619 | 3682 | } |
382522cb MK |
3683 | while (1); |
3684 | ||
d1658619 SP |
3685 | *dialect = 0; |
3686 | } | |
3687 | else | |
3688 | putc (c, asm_out_file); | |
3689 | break; | |
3690 | ||
3691 | case '}': | |
3692 | if (! *dialect) | |
3693 | putc (c, asm_out_file); | |
3694 | *dialect = 0; | |
3695 | break; | |
3696 | default: | |
3697 | gcc_unreachable (); | |
3698 | } | |
3699 | ||
3700 | return p; | |
3701 | } | |
3702 | #endif | |
3703 | ||
3cf2715d DE |
3704 | /* Output text from TEMPLATE to the assembler output file, |
3705 | obeying %-directions to substitute operands taken from | |
3706 | the vector OPERANDS. | |
3707 | ||
3708 | %N (for N a digit) means print operand N in usual manner. | |
3709 | %lN means require operand N to be a CODE_LABEL or LABEL_REF | |
3710 | and print the label name with no punctuation. | |
3711 | %cN means require operand N to be a constant | |
3712 | and print the constant expression with no punctuation. | |
3713 | %aN means expect operand N to be a memory address | |
3714 | (not a memory reference!) and print a reference | |
3715 | to that address. | |
3716 | %nN means expect operand N to be a constant | |
3717 | and print a constant expression for minus the value | |
3718 | of the operand, with no other punctuation. */ | |
3719 | ||
3720 | void | |
48c54229 | 3721 | output_asm_insn (const char *templ, rtx *operands) |
3cf2715d | 3722 | { |
b3694847 SS |
3723 | const char *p; |
3724 | int c; | |
8554d9a4 JJ |
3725 | #ifdef ASSEMBLER_DIALECT |
3726 | int dialect = 0; | |
3727 | #endif | |
0d4903b8 | 3728 | int oporder[MAX_RECOG_OPERANDS]; |
4f9b4029 | 3729 | char opoutput[MAX_RECOG_OPERANDS]; |
0d4903b8 | 3730 | int ops = 0; |
3cf2715d DE |
3731 | |
3732 | /* An insn may return a null string template | |
3733 | in a case where no assembler code is needed. */ | |
48c54229 | 3734 | if (*templ == 0) |
3cf2715d DE |
3735 | return; |
3736 | ||
4f9b4029 | 3737 | memset (opoutput, 0, sizeof opoutput); |
48c54229 | 3738 | p = templ; |
3cf2715d DE |
3739 | putc ('\t', asm_out_file); |
3740 | ||
3741 | #ifdef ASM_OUTPUT_OPCODE | |
3742 | ASM_OUTPUT_OPCODE (asm_out_file, p); | |
3743 | #endif | |
3744 | ||
b729186a | 3745 | while ((c = *p++)) |
3cf2715d DE |
3746 | switch (c) |
3747 | { | |
3cf2715d | 3748 | case '\n': |
4f9b4029 RK |
3749 | if (flag_verbose_asm) |
3750 | output_asm_operand_names (operands, oporder, ops); | |
0d4903b8 RK |
3751 | if (flag_print_asm_name) |
3752 | output_asm_name (); | |
3753 | ||
4f9b4029 RK |
3754 | ops = 0; |
3755 | memset (opoutput, 0, sizeof opoutput); | |
3756 | ||
3cf2715d | 3757 | putc (c, asm_out_file); |
cb649530 | 3758 | #ifdef ASM_OUTPUT_OPCODE |
3cf2715d DE |
3759 | while ((c = *p) == '\t') |
3760 | { | |
3761 | putc (c, asm_out_file); | |
3762 | p++; | |
3763 | } | |
3764 | ASM_OUTPUT_OPCODE (asm_out_file, p); | |
3cf2715d | 3765 | #endif |
cb649530 | 3766 | break; |
3cf2715d DE |
3767 | |
3768 | #ifdef ASSEMBLER_DIALECT | |
3769 | case '{': | |
3cf2715d | 3770 | case '}': |
d1658619 SP |
3771 | case '|': |
3772 | p = do_assembler_dialects (p, &dialect); | |
3cf2715d DE |
3773 | break; |
3774 | #endif | |
3775 | ||
3776 | case '%': | |
382522cb MK |
3777 | /* %% outputs a single %. %{, %} and %| print {, } and | respectively |
3778 | if ASSEMBLER_DIALECT defined and these characters have a special | |
3779 | meaning as dialect delimiters.*/ | |
3780 | if (*p == '%' | |
3781 | #ifdef ASSEMBLER_DIALECT | |
3782 | || *p == '{' || *p == '}' || *p == '|' | |
3783 | #endif | |
3784 | ) | |
3cf2715d | 3785 | { |
382522cb | 3786 | putc (*p, asm_out_file); |
3cf2715d | 3787 | p++; |
3cf2715d DE |
3788 | } |
3789 | /* %= outputs a number which is unique to each insn in the entire | |
3790 | compilation. This is useful for making local labels that are | |
3791 | referred to more than once in a given insn. */ | |
3792 | else if (*p == '=') | |
3793 | { | |
3794 | p++; | |
3795 | fprintf (asm_out_file, "%d", insn_counter); | |
3796 | } | |
3797 | /* % followed by a letter and some digits | |
3798 | outputs an operand in a special way depending on the letter. | |
3799 | Letters `acln' are implemented directly. | |
3800 | Other letters are passed to `output_operand' so that | |
6e2188e0 | 3801 | the TARGET_PRINT_OPERAND hook can define them. */ |
0df6c2c7 | 3802 | else if (ISALPHA (*p)) |
3cf2715d DE |
3803 | { |
3804 | int letter = *p++; | |
c383c15f GK |
3805 | unsigned long opnum; |
3806 | char *endptr; | |
b0efb46b | 3807 | |
c383c15f GK |
3808 | opnum = strtoul (p, &endptr, 10); |
3809 | ||
3810 | if (endptr == p) | |
3811 | output_operand_lossage ("operand number missing " | |
3812 | "after %%-letter"); | |
3813 | else if (this_is_asm_operands && opnum >= insn_noperands) | |
3cf2715d DE |
3814 | output_operand_lossage ("operand number out of range"); |
3815 | else if (letter == 'l') | |
c383c15f | 3816 | output_asm_label (operands[opnum]); |
3cf2715d | 3817 | else if (letter == 'a') |
cc8ca59e | 3818 | output_address (VOIDmode, operands[opnum]); |
3cf2715d DE |
3819 | else if (letter == 'c') |
3820 | { | |
c383c15f GK |
3821 | if (CONSTANT_ADDRESS_P (operands[opnum])) |
3822 | output_addr_const (asm_out_file, operands[opnum]); | |
3cf2715d | 3823 | else |
c383c15f | 3824 | output_operand (operands[opnum], 'c'); |
3cf2715d DE |
3825 | } |
3826 | else if (letter == 'n') | |
3827 | { | |
481683e1 | 3828 | if (CONST_INT_P (operands[opnum])) |
21e3a81b | 3829 | fprintf (asm_out_file, HOST_WIDE_INT_PRINT_DEC, |
c383c15f | 3830 | - INTVAL (operands[opnum])); |
3cf2715d DE |
3831 | else |
3832 | { | |
3833 | putc ('-', asm_out_file); | |
c383c15f | 3834 | output_addr_const (asm_out_file, operands[opnum]); |
3cf2715d DE |
3835 | } |
3836 | } | |
3837 | else | |
c383c15f | 3838 | output_operand (operands[opnum], letter); |
f5d927c0 | 3839 | |
c383c15f | 3840 | if (!opoutput[opnum]) |
dc9d0b14 | 3841 | oporder[ops++] = opnum; |
c383c15f | 3842 | opoutput[opnum] = 1; |
0d4903b8 | 3843 | |
c383c15f GK |
3844 | p = endptr; |
3845 | c = *p; | |
3cf2715d DE |
3846 | } |
3847 | /* % followed by a digit outputs an operand the default way. */ | |
0df6c2c7 | 3848 | else if (ISDIGIT (*p)) |
3cf2715d | 3849 | { |
c383c15f GK |
3850 | unsigned long opnum; |
3851 | char *endptr; | |
b0efb46b | 3852 | |
c383c15f GK |
3853 | opnum = strtoul (p, &endptr, 10); |
3854 | if (this_is_asm_operands && opnum >= insn_noperands) | |
3cf2715d DE |
3855 | output_operand_lossage ("operand number out of range"); |
3856 | else | |
c383c15f | 3857 | output_operand (operands[opnum], 0); |
0d4903b8 | 3858 | |
c383c15f | 3859 | if (!opoutput[opnum]) |
dc9d0b14 | 3860 | oporder[ops++] = opnum; |
c383c15f | 3861 | opoutput[opnum] = 1; |
4f9b4029 | 3862 | |
c383c15f GK |
3863 | p = endptr; |
3864 | c = *p; | |
3cf2715d DE |
3865 | } |
3866 | /* % followed by punctuation: output something for that | |
6e2188e0 NF |
3867 | punctuation character alone, with no operand. The |
3868 | TARGET_PRINT_OPERAND hook decides what is actually done. */ | |
3869 | else if (targetm.asm_out.print_operand_punct_valid_p ((unsigned char) *p)) | |
3cf2715d | 3870 | output_operand (NULL_RTX, *p++); |
3cf2715d DE |
3871 | else |
3872 | output_operand_lossage ("invalid %%-code"); | |
3873 | break; | |
3874 | ||
3875 | default: | |
3876 | putc (c, asm_out_file); | |
3877 | } | |
3878 | ||
dff125eb SB |
3879 | /* Try to keep the asm a bit more readable. */ |
3880 | if ((flag_verbose_asm || flag_print_asm_name) && strlen (templ) < 9) | |
3881 | putc ('\t', asm_out_file); | |
3882 | ||
0d4903b8 RK |
3883 | /* Write out the variable names for operands, if we know them. */ |
3884 | if (flag_verbose_asm) | |
4f9b4029 | 3885 | output_asm_operand_names (operands, oporder, ops); |
0d4903b8 RK |
3886 | if (flag_print_asm_name) |
3887 | output_asm_name (); | |
3cf2715d DE |
3888 | |
3889 | putc ('\n', asm_out_file); | |
3890 | } | |
3891 | \f | |
3892 | /* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */ | |
3893 | ||
3894 | void | |
6cf9ac28 | 3895 | output_asm_label (rtx x) |
3cf2715d DE |
3896 | { |
3897 | char buf[256]; | |
3898 | ||
3899 | if (GET_CODE (x) == LABEL_REF) | |
04a121a7 | 3900 | x = label_ref_label (x); |
4b4bf941 JQ |
3901 | if (LABEL_P (x) |
3902 | || (NOTE_P (x) | |
a38e7aa5 | 3903 | && NOTE_KIND (x) == NOTE_INSN_DELETED_LABEL)) |
3cf2715d DE |
3904 | ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x)); |
3905 | else | |
9e637a26 | 3906 | output_operand_lossage ("'%%l' operand isn't a label"); |
3cf2715d DE |
3907 | |
3908 | assemble_name (asm_out_file, buf); | |
3909 | } | |
3910 | ||
a7fe25b8 JJ |
3911 | /* Marks SYMBOL_REFs in x as referenced through use of assemble_external. */ |
3912 | ||
3913 | void | |
3914 | mark_symbol_refs_as_used (rtx x) | |
3915 | { | |
effb8a26 RS |
3916 | subrtx_iterator::array_type array; |
3917 | FOR_EACH_SUBRTX (iter, array, x, ALL) | |
3918 | { | |
3919 | const_rtx x = *iter; | |
3920 | if (GET_CODE (x) == SYMBOL_REF) | |
3921 | if (tree t = SYMBOL_REF_DECL (x)) | |
3922 | assemble_external (t); | |
3923 | } | |
a7fe25b8 JJ |
3924 | } |
3925 | ||
3cf2715d | 3926 | /* Print operand X using machine-dependent assembler syntax. |
3cf2715d DE |
3927 | CODE is a non-digit that preceded the operand-number in the % spec, |
3928 | such as 'z' if the spec was `%z3'. CODE is 0 if there was no char | |
3929 | between the % and the digits. | |
3930 | When CODE is a non-letter, X is 0. | |
3931 | ||
3932 | The meanings of the letters are machine-dependent and controlled | |
6e2188e0 | 3933 | by TARGET_PRINT_OPERAND. */ |
3cf2715d | 3934 | |
6b3c42ae | 3935 | void |
6cf9ac28 | 3936 | output_operand (rtx x, int code ATTRIBUTE_UNUSED) |
3cf2715d DE |
3937 | { |
3938 | if (x && GET_CODE (x) == SUBREG) | |
55a2c322 | 3939 | x = alter_subreg (&x, true); |
3cf2715d | 3940 | |
04c7ae48 | 3941 | /* X must not be a pseudo reg. */ |
a50fa76a BS |
3942 | if (!targetm.no_register_allocation) |
3943 | gcc_assert (!x || !REG_P (x) || REGNO (x) < FIRST_PSEUDO_REGISTER); | |
3cf2715d | 3944 | |
6e2188e0 | 3945 | targetm.asm_out.print_operand (asm_out_file, x, code); |
c70d0414 HPN |
3946 | |
3947 | if (x == NULL_RTX) | |
3948 | return; | |
3949 | ||
effb8a26 | 3950 | mark_symbol_refs_as_used (x); |
3cf2715d DE |
3951 | } |
3952 | ||
6e2188e0 NF |
3953 | /* Print a memory reference operand for address X using |
3954 | machine-dependent assembler syntax. */ | |
3cf2715d DE |
3955 | |
3956 | void | |
cc8ca59e | 3957 | output_address (machine_mode mode, rtx x) |
3cf2715d | 3958 | { |
6fb5fa3c DB |
3959 | bool changed = false; |
3960 | walk_alter_subreg (&x, &changed); | |
cc8ca59e | 3961 | targetm.asm_out.print_operand_address (asm_out_file, mode, x); |
3cf2715d DE |
3962 | } |
3963 | \f | |
3964 | /* Print an integer constant expression in assembler syntax. | |
3965 | Addition and subtraction are the only arithmetic | |
3966 | that may appear in these expressions. */ | |
3967 | ||
3968 | void | |
6cf9ac28 | 3969 | output_addr_const (FILE *file, rtx x) |
3cf2715d DE |
3970 | { |
3971 | char buf[256]; | |
3972 | ||
3973 | restart: | |
3974 | switch (GET_CODE (x)) | |
3975 | { | |
3976 | case PC: | |
eac50d7a | 3977 | putc ('.', file); |
3cf2715d DE |
3978 | break; |
3979 | ||
3980 | case SYMBOL_REF: | |
21dad7e6 | 3981 | if (SYMBOL_REF_DECL (x)) |
152464d2 | 3982 | assemble_external (SYMBOL_REF_DECL (x)); |
99c8c61c AO |
3983 | #ifdef ASM_OUTPUT_SYMBOL_REF |
3984 | ASM_OUTPUT_SYMBOL_REF (file, x); | |
3985 | #else | |
3cf2715d | 3986 | assemble_name (file, XSTR (x, 0)); |
99c8c61c | 3987 | #endif |
3cf2715d DE |
3988 | break; |
3989 | ||
3990 | case LABEL_REF: | |
04a121a7 | 3991 | x = label_ref_label (x); |
422be3c3 | 3992 | /* Fall through. */ |
3cf2715d DE |
3993 | case CODE_LABEL: |
3994 | ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x)); | |
2f0b7af6 GK |
3995 | #ifdef ASM_OUTPUT_LABEL_REF |
3996 | ASM_OUTPUT_LABEL_REF (file, buf); | |
3997 | #else | |
3cf2715d | 3998 | assemble_name (file, buf); |
2f0b7af6 | 3999 | #endif |
3cf2715d DE |
4000 | break; |
4001 | ||
4002 | case CONST_INT: | |
6725cc58 | 4003 | fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x)); |
3cf2715d DE |
4004 | break; |
4005 | ||
4006 | case CONST: | |
4007 | /* This used to output parentheses around the expression, | |
4008 | but that does not work on the 386 (either ATT or BSD assembler). */ | |
4009 | output_addr_const (file, XEXP (x, 0)); | |
4010 | break; | |
4011 | ||
807e902e KZ |
4012 | case CONST_WIDE_INT: |
4013 | /* We do not know the mode here so we have to use a round about | |
4014 | way to build a wide-int to get it printed properly. */ | |
4015 | { | |
4016 | wide_int w = wide_int::from_array (&CONST_WIDE_INT_ELT (x, 0), | |
4017 | CONST_WIDE_INT_NUNITS (x), | |
4018 | CONST_WIDE_INT_NUNITS (x) | |
4019 | * HOST_BITS_PER_WIDE_INT, | |
4020 | false); | |
4021 | print_decs (w, file); | |
4022 | } | |
4023 | break; | |
4024 | ||
3cf2715d | 4025 | case CONST_DOUBLE: |
807e902e | 4026 | if (CONST_DOUBLE_AS_INT_P (x)) |
3cf2715d DE |
4027 | { |
4028 | /* We can use %d if the number is one word and positive. */ | |
4029 | if (CONST_DOUBLE_HIGH (x)) | |
21e3a81b | 4030 | fprintf (file, HOST_WIDE_INT_PRINT_DOUBLE_HEX, |
3d57d7ce DK |
4031 | (unsigned HOST_WIDE_INT) CONST_DOUBLE_HIGH (x), |
4032 | (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (x)); | |
f5d927c0 | 4033 | else if (CONST_DOUBLE_LOW (x) < 0) |
3d57d7ce DK |
4034 | fprintf (file, HOST_WIDE_INT_PRINT_HEX, |
4035 | (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (x)); | |
3cf2715d | 4036 | else |
21e3a81b | 4037 | fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x)); |
3cf2715d DE |
4038 | } |
4039 | else | |
4040 | /* We can't handle floating point constants; | |
4041 | PRINT_OPERAND must handle them. */ | |
4042 | output_operand_lossage ("floating constant misused"); | |
4043 | break; | |
4044 | ||
14c931f1 | 4045 | case CONST_FIXED: |
848fac28 | 4046 | fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_FIXED_VALUE_LOW (x)); |
14c931f1 CF |
4047 | break; |
4048 | ||
3cf2715d DE |
4049 | case PLUS: |
4050 | /* Some assemblers need integer constants to appear last (eg masm). */ | |
481683e1 | 4051 | if (CONST_INT_P (XEXP (x, 0))) |
3cf2715d DE |
4052 | { |
4053 | output_addr_const (file, XEXP (x, 1)); | |
4054 | if (INTVAL (XEXP (x, 0)) >= 0) | |
4055 | fprintf (file, "+"); | |
4056 | output_addr_const (file, XEXP (x, 0)); | |
4057 | } | |
4058 | else | |
4059 | { | |
4060 | output_addr_const (file, XEXP (x, 0)); | |
481683e1 | 4061 | if (!CONST_INT_P (XEXP (x, 1)) |
08106825 | 4062 | || INTVAL (XEXP (x, 1)) >= 0) |
3cf2715d DE |
4063 | fprintf (file, "+"); |
4064 | output_addr_const (file, XEXP (x, 1)); | |
4065 | } | |
4066 | break; | |
4067 | ||
4068 | case MINUS: | |
4069 | /* Avoid outputting things like x-x or x+5-x, | |
4070 | since some assemblers can't handle that. */ | |
4071 | x = simplify_subtraction (x); | |
4072 | if (GET_CODE (x) != MINUS) | |
4073 | goto restart; | |
4074 | ||
4075 | output_addr_const (file, XEXP (x, 0)); | |
4076 | fprintf (file, "-"); | |
481683e1 | 4077 | if ((CONST_INT_P (XEXP (x, 1)) && INTVAL (XEXP (x, 1)) >= 0) |
301d03af RS |
4078 | || GET_CODE (XEXP (x, 1)) == PC |
4079 | || GET_CODE (XEXP (x, 1)) == SYMBOL_REF) | |
4080 | output_addr_const (file, XEXP (x, 1)); | |
4081 | else | |
3cf2715d | 4082 | { |
17b53c33 | 4083 | fputs (targetm.asm_out.open_paren, file); |
3cf2715d | 4084 | output_addr_const (file, XEXP (x, 1)); |
17b53c33 | 4085 | fputs (targetm.asm_out.close_paren, file); |
3cf2715d | 4086 | } |
3cf2715d DE |
4087 | break; |
4088 | ||
4089 | case ZERO_EXTEND: | |
4090 | case SIGN_EXTEND: | |
fdf473ae | 4091 | case SUBREG: |
c01e4479 | 4092 | case TRUNCATE: |
3cf2715d DE |
4093 | output_addr_const (file, XEXP (x, 0)); |
4094 | break; | |
4095 | ||
4096 | default: | |
6cbd8875 AS |
4097 | if (targetm.asm_out.output_addr_const_extra (file, x)) |
4098 | break; | |
422be3c3 | 4099 | |
3cf2715d DE |
4100 | output_operand_lossage ("invalid expression as operand"); |
4101 | } | |
4102 | } | |
4103 | \f | |
a803773f JM |
4104 | /* Output a quoted string. */ |
4105 | ||
4106 | void | |
4107 | output_quoted_string (FILE *asm_file, const char *string) | |
4108 | { | |
4109 | #ifdef OUTPUT_QUOTED_STRING | |
4110 | OUTPUT_QUOTED_STRING (asm_file, string); | |
4111 | #else | |
4112 | char c; | |
4113 | ||
4114 | putc ('\"', asm_file); | |
4115 | while ((c = *string++) != 0) | |
4116 | { | |
4117 | if (ISPRINT (c)) | |
4118 | { | |
4119 | if (c == '\"' || c == '\\') | |
4120 | putc ('\\', asm_file); | |
4121 | putc (c, asm_file); | |
4122 | } | |
4123 | else | |
4124 | fprintf (asm_file, "\\%03o", (unsigned char) c); | |
4125 | } | |
4126 | putc ('\"', asm_file); | |
4127 | #endif | |
4128 | } | |
4129 | \f | |
5e3929ed DA |
4130 | /* Write a HOST_WIDE_INT number in hex form 0x1234, fast. */ |
4131 | ||
4132 | void | |
4133 | fprint_whex (FILE *f, unsigned HOST_WIDE_INT value) | |
4134 | { | |
4135 | char buf[2 + CHAR_BIT * sizeof (value) / 4]; | |
4136 | if (value == 0) | |
4137 | putc ('0', f); | |
4138 | else | |
4139 | { | |
4140 | char *p = buf + sizeof (buf); | |
4141 | do | |
4142 | *--p = "0123456789abcdef"[value % 16]; | |
4143 | while ((value /= 16) != 0); | |
4144 | *--p = 'x'; | |
4145 | *--p = '0'; | |
4146 | fwrite (p, 1, buf + sizeof (buf) - p, f); | |
4147 | } | |
4148 | } | |
4149 | ||
4150 | /* Internal function that prints an unsigned long in decimal in reverse. | |
4151 | The output string IS NOT null-terminated. */ | |
4152 | ||
4153 | static int | |
4154 | sprint_ul_rev (char *s, unsigned long value) | |
4155 | { | |
4156 | int i = 0; | |
4157 | do | |
4158 | { | |
4159 | s[i] = "0123456789"[value % 10]; | |
4160 | value /= 10; | |
4161 | i++; | |
4162 | /* alternate version, without modulo */ | |
4163 | /* oldval = value; */ | |
4164 | /* value /= 10; */ | |
4165 | /* s[i] = "0123456789" [oldval - 10*value]; */ | |
4166 | /* i++ */ | |
4167 | } | |
4168 | while (value != 0); | |
4169 | return i; | |
4170 | } | |
4171 | ||
5e3929ed DA |
4172 | /* Write an unsigned long as decimal to a file, fast. */ |
4173 | ||
4174 | void | |
4175 | fprint_ul (FILE *f, unsigned long value) | |
4176 | { | |
4177 | /* python says: len(str(2**64)) == 20 */ | |
4178 | char s[20]; | |
4179 | int i; | |
4180 | ||
4181 | i = sprint_ul_rev (s, value); | |
4182 | ||
4183 | /* It's probably too small to bother with string reversal and fputs. */ | |
4184 | do | |
4185 | { | |
4186 | i--; | |
4187 | putc (s[i], f); | |
4188 | } | |
4189 | while (i != 0); | |
4190 | } | |
4191 | ||
4192 | /* Write an unsigned long as decimal to a string, fast. | |
4193 | s must be wide enough to not overflow, at least 21 chars. | |
4194 | Returns the length of the string (without terminating '\0'). */ | |
4195 | ||
4196 | int | |
4197 | sprint_ul (char *s, unsigned long value) | |
4198 | { | |
fab27f52 | 4199 | int len = sprint_ul_rev (s, value); |
5e3929ed DA |
4200 | s[len] = '\0'; |
4201 | ||
fab27f52 | 4202 | std::reverse (s, s + len); |
5e3929ed DA |
4203 | return len; |
4204 | } | |
4205 | ||
3cf2715d DE |
4206 | /* A poor man's fprintf, with the added features of %I, %R, %L, and %U. |
4207 | %R prints the value of REGISTER_PREFIX. | |
4208 | %L prints the value of LOCAL_LABEL_PREFIX. | |
4209 | %U prints the value of USER_LABEL_PREFIX. | |
4210 | %I prints the value of IMMEDIATE_PREFIX. | |
4211 | %O runs ASM_OUTPUT_OPCODE to transform what follows in the string. | |
b1721339 | 4212 | Also supported are %d, %i, %u, %x, %X, %o, %c, %s and %%. |
3cf2715d DE |
4213 | |
4214 | We handle alternate assembler dialects here, just like output_asm_insn. */ | |
4215 | ||
4216 | void | |
e34d07f2 | 4217 | asm_fprintf (FILE *file, const char *p, ...) |
3cf2715d | 4218 | { |
3cf2715d DE |
4219 | char buf[10]; |
4220 | char *q, c; | |
d1658619 SP |
4221 | #ifdef ASSEMBLER_DIALECT |
4222 | int dialect = 0; | |
4223 | #endif | |
e34d07f2 | 4224 | va_list argptr; |
6cf9ac28 | 4225 | |
e34d07f2 | 4226 | va_start (argptr, p); |
3cf2715d DE |
4227 | |
4228 | buf[0] = '%'; | |
4229 | ||
b729186a | 4230 | while ((c = *p++)) |
3cf2715d DE |
4231 | switch (c) |
4232 | { | |
4233 | #ifdef ASSEMBLER_DIALECT | |
4234 | case '{': | |
3cf2715d | 4235 | case '}': |
d1658619 SP |
4236 | case '|': |
4237 | p = do_assembler_dialects (p, &dialect); | |
3cf2715d DE |
4238 | break; |
4239 | #endif | |
4240 | ||
4241 | case '%': | |
4242 | c = *p++; | |
4243 | q = &buf[1]; | |
b1721339 KG |
4244 | while (strchr ("-+ #0", c)) |
4245 | { | |
4246 | *q++ = c; | |
4247 | c = *p++; | |
4248 | } | |
0df6c2c7 | 4249 | while (ISDIGIT (c) || c == '.') |
3cf2715d DE |
4250 | { |
4251 | *q++ = c; | |
4252 | c = *p++; | |
4253 | } | |
4254 | switch (c) | |
4255 | { | |
4256 | case '%': | |
b1721339 | 4257 | putc ('%', file); |
3cf2715d DE |
4258 | break; |
4259 | ||
4260 | case 'd': case 'i': case 'u': | |
b1721339 KG |
4261 | case 'x': case 'X': case 'o': |
4262 | case 'c': | |
3cf2715d DE |
4263 | *q++ = c; |
4264 | *q = 0; | |
4265 | fprintf (file, buf, va_arg (argptr, int)); | |
4266 | break; | |
4267 | ||
4268 | case 'w': | |
b1721339 KG |
4269 | /* This is a prefix to the 'd', 'i', 'u', 'x', 'X', and |
4270 | 'o' cases, but we do not check for those cases. It | |
4271 | means that the value is a HOST_WIDE_INT, which may be | |
4272 | either `long' or `long long'. */ | |
85f015e1 KG |
4273 | memcpy (q, HOST_WIDE_INT_PRINT, strlen (HOST_WIDE_INT_PRINT)); |
4274 | q += strlen (HOST_WIDE_INT_PRINT); | |
3cf2715d DE |
4275 | *q++ = *p++; |
4276 | *q = 0; | |
4277 | fprintf (file, buf, va_arg (argptr, HOST_WIDE_INT)); | |
4278 | break; | |
4279 | ||
4280 | case 'l': | |
4281 | *q++ = c; | |
b1721339 KG |
4282 | #ifdef HAVE_LONG_LONG |
4283 | if (*p == 'l') | |
4284 | { | |
4285 | *q++ = *p++; | |
4286 | *q++ = *p++; | |
4287 | *q = 0; | |
4288 | fprintf (file, buf, va_arg (argptr, long long)); | |
4289 | } | |
4290 | else | |
4291 | #endif | |
4292 | { | |
4293 | *q++ = *p++; | |
4294 | *q = 0; | |
4295 | fprintf (file, buf, va_arg (argptr, long)); | |
4296 | } | |
6cf9ac28 | 4297 | |
3cf2715d DE |
4298 | break; |
4299 | ||
4300 | case 's': | |
4301 | *q++ = c; | |
4302 | *q = 0; | |
4303 | fprintf (file, buf, va_arg (argptr, char *)); | |
4304 | break; | |
4305 | ||
4306 | case 'O': | |
4307 | #ifdef ASM_OUTPUT_OPCODE | |
4308 | ASM_OUTPUT_OPCODE (asm_out_file, p); | |
4309 | #endif | |
4310 | break; | |
4311 | ||
4312 | case 'R': | |
4313 | #ifdef REGISTER_PREFIX | |
4314 | fprintf (file, "%s", REGISTER_PREFIX); | |
4315 | #endif | |
4316 | break; | |
4317 | ||
4318 | case 'I': | |
4319 | #ifdef IMMEDIATE_PREFIX | |
4320 | fprintf (file, "%s", IMMEDIATE_PREFIX); | |
4321 | #endif | |
4322 | break; | |
4323 | ||
4324 | case 'L': | |
4325 | #ifdef LOCAL_LABEL_PREFIX | |
4326 | fprintf (file, "%s", LOCAL_LABEL_PREFIX); | |
4327 | #endif | |
4328 | break; | |
4329 | ||
4330 | case 'U': | |
19283265 | 4331 | fputs (user_label_prefix, file); |
3cf2715d DE |
4332 | break; |
4333 | ||
fe0503ea | 4334 | #ifdef ASM_FPRINTF_EXTENSIONS |
7ef0daad | 4335 | /* Uppercase letters are reserved for general use by asm_fprintf |
fe0503ea NC |
4336 | and so are not available to target specific code. In order to |
4337 | prevent the ASM_FPRINTF_EXTENSIONS macro from using them then, | |
4338 | they are defined here. As they get turned into real extensions | |
4339 | to asm_fprintf they should be removed from this list. */ | |
4340 | case 'A': case 'B': case 'C': case 'D': case 'E': | |
4341 | case 'F': case 'G': case 'H': case 'J': case 'K': | |
4342 | case 'M': case 'N': case 'P': case 'Q': case 'S': | |
4343 | case 'T': case 'V': case 'W': case 'Y': case 'Z': | |
4344 | break; | |
f5d927c0 | 4345 | |
fe0503ea NC |
4346 | ASM_FPRINTF_EXTENSIONS (file, argptr, p) |
4347 | #endif | |
3cf2715d | 4348 | default: |
0bccc606 | 4349 | gcc_unreachable (); |
3cf2715d DE |
4350 | } |
4351 | break; | |
4352 | ||
4353 | default: | |
b1721339 | 4354 | putc (c, file); |
3cf2715d | 4355 | } |
e34d07f2 | 4356 | va_end (argptr); |
3cf2715d DE |
4357 | } |
4358 | \f | |
3cf2715d DE |
4359 | /* Return nonzero if this function has no function calls. */ |
4360 | ||
4361 | int | |
6cf9ac28 | 4362 | leaf_function_p (void) |
3cf2715d | 4363 | { |
fa7af581 | 4364 | rtx_insn *insn; |
3cf2715d | 4365 | |
00d60013 WD |
4366 | /* Ensure we walk the entire function body. */ |
4367 | gcc_assert (!in_sequence_p ()); | |
4368 | ||
d56a43a0 AK |
4369 | /* Some back-ends (e.g. s390) want leaf functions to stay leaf |
4370 | functions even if they call mcount. */ | |
4371 | if (crtl->profile && !targetm.keep_leaf_when_profiled ()) | |
3cf2715d DE |
4372 | return 0; |
4373 | ||
4374 | for (insn = get_insns (); insn; insn = NEXT_INSN (insn)) | |
4375 | { | |
4b4bf941 | 4376 | if (CALL_P (insn) |
7d167afd | 4377 | && ! SIBLING_CALL_P (insn)) |
3cf2715d | 4378 | return 0; |
4b4bf941 | 4379 | if (NONJUMP_INSN_P (insn) |
3cf2715d | 4380 | && GET_CODE (PATTERN (insn)) == SEQUENCE |
4b4bf941 | 4381 | && CALL_P (XVECEXP (PATTERN (insn), 0, 0)) |
0a1c58a2 | 4382 | && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0))) |
3cf2715d DE |
4383 | return 0; |
4384 | } | |
3cf2715d DE |
4385 | |
4386 | return 1; | |
4387 | } | |
4388 | ||
09da1532 | 4389 | /* Return 1 if branch is a forward branch. |
ef6257cd JH |
4390 | Uses insn_shuid array, so it works only in the final pass. May be used by |
4391 | output templates to customary add branch prediction hints. | |
4392 | */ | |
4393 | int | |
fa7af581 | 4394 | final_forward_branch_p (rtx_insn *insn) |
ef6257cd JH |
4395 | { |
4396 | int insn_id, label_id; | |
b0efb46b | 4397 | |
0bccc606 | 4398 | gcc_assert (uid_shuid); |
ef6257cd JH |
4399 | insn_id = INSN_SHUID (insn); |
4400 | label_id = INSN_SHUID (JUMP_LABEL (insn)); | |
4401 | /* We've hit some insns that does not have id information available. */ | |
0bccc606 | 4402 | gcc_assert (insn_id && label_id); |
ef6257cd JH |
4403 | return insn_id < label_id; |
4404 | } | |
4405 | ||
3cf2715d DE |
4406 | /* On some machines, a function with no call insns |
4407 | can run faster if it doesn't create its own register window. | |
4408 | When output, the leaf function should use only the "output" | |
4409 | registers. Ordinarily, the function would be compiled to use | |
4410 | the "input" registers to find its arguments; it is a candidate | |
4411 | for leaf treatment if it uses only the "input" registers. | |
4412 | Leaf function treatment means renumbering so the function | |
4413 | uses the "output" registers instead. */ | |
4414 | ||
4415 | #ifdef LEAF_REGISTERS | |
4416 | ||
3cf2715d DE |
4417 | /* Return 1 if this function uses only the registers that can be |
4418 | safely renumbered. */ | |
4419 | ||
4420 | int | |
6cf9ac28 | 4421 | only_leaf_regs_used (void) |
3cf2715d DE |
4422 | { |
4423 | int i; | |
4977bab6 | 4424 | const char *const permitted_reg_in_leaf_functions = LEAF_REGISTERS; |
3cf2715d DE |
4425 | |
4426 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
6fb5fa3c | 4427 | if ((df_regs_ever_live_p (i) || global_regs[i]) |
e5e809f4 JL |
4428 | && ! permitted_reg_in_leaf_functions[i]) |
4429 | return 0; | |
4430 | ||
e3b5732b | 4431 | if (crtl->uses_pic_offset_table |
e5e809f4 | 4432 | && pic_offset_table_rtx != 0 |
f8cfc6aa | 4433 | && REG_P (pic_offset_table_rtx) |
e5e809f4 JL |
4434 | && ! permitted_reg_in_leaf_functions[REGNO (pic_offset_table_rtx)]) |
4435 | return 0; | |
4436 | ||
3cf2715d DE |
4437 | return 1; |
4438 | } | |
4439 | ||
4440 | /* Scan all instructions and renumber all registers into those | |
4441 | available in leaf functions. */ | |
4442 | ||
4443 | static void | |
fa7af581 | 4444 | leaf_renumber_regs (rtx_insn *first) |
3cf2715d | 4445 | { |
fa7af581 | 4446 | rtx_insn *insn; |
3cf2715d DE |
4447 | |
4448 | /* Renumber only the actual patterns. | |
4449 | The reg-notes can contain frame pointer refs, | |
4450 | and renumbering them could crash, and should not be needed. */ | |
4451 | for (insn = first; insn; insn = NEXT_INSN (insn)) | |
2c3c49de | 4452 | if (INSN_P (insn)) |
3cf2715d | 4453 | leaf_renumber_regs_insn (PATTERN (insn)); |
3cf2715d DE |
4454 | } |
4455 | ||
4456 | /* Scan IN_RTX and its subexpressions, and renumber all regs into those | |
4457 | available in leaf functions. */ | |
4458 | ||
4459 | void | |
6cf9ac28 | 4460 | leaf_renumber_regs_insn (rtx in_rtx) |
3cf2715d | 4461 | { |
b3694847 SS |
4462 | int i, j; |
4463 | const char *format_ptr; | |
3cf2715d DE |
4464 | |
4465 | if (in_rtx == 0) | |
4466 | return; | |
4467 | ||
4468 | /* Renumber all input-registers into output-registers. | |
4469 | renumbered_regs would be 1 for an output-register; | |
4470 | they */ | |
4471 | ||
f8cfc6aa | 4472 | if (REG_P (in_rtx)) |
3cf2715d DE |
4473 | { |
4474 | int newreg; | |
4475 | ||
4476 | /* Don't renumber the same reg twice. */ | |
4477 | if (in_rtx->used) | |
4478 | return; | |
4479 | ||
4480 | newreg = REGNO (in_rtx); | |
4481 | /* Don't try to renumber pseudo regs. It is possible for a pseudo reg | |
4482 | to reach here as part of a REG_NOTE. */ | |
4483 | if (newreg >= FIRST_PSEUDO_REGISTER) | |
4484 | { | |
4485 | in_rtx->used = 1; | |
4486 | return; | |
4487 | } | |
4488 | newreg = LEAF_REG_REMAP (newreg); | |
0bccc606 | 4489 | gcc_assert (newreg >= 0); |
6fb5fa3c DB |
4490 | df_set_regs_ever_live (REGNO (in_rtx), false); |
4491 | df_set_regs_ever_live (newreg, true); | |
4492 | SET_REGNO (in_rtx, newreg); | |
3cf2715d | 4493 | in_rtx->used = 1; |
9fccb335 | 4494 | return; |
3cf2715d DE |
4495 | } |
4496 | ||
2c3c49de | 4497 | if (INSN_P (in_rtx)) |
3cf2715d DE |
4498 | { |
4499 | /* Inside a SEQUENCE, we find insns. | |
4500 | Renumber just the patterns of these insns, | |
4501 | just as we do for the top-level insns. */ | |
4502 | leaf_renumber_regs_insn (PATTERN (in_rtx)); | |
4503 | return; | |
4504 | } | |
4505 | ||
4506 | format_ptr = GET_RTX_FORMAT (GET_CODE (in_rtx)); | |
4507 | ||
4508 | for (i = 0; i < GET_RTX_LENGTH (GET_CODE (in_rtx)); i++) | |
4509 | switch (*format_ptr++) | |
4510 | { | |
4511 | case 'e': | |
4512 | leaf_renumber_regs_insn (XEXP (in_rtx, i)); | |
4513 | break; | |
4514 | ||
4515 | case 'E': | |
01512446 JJ |
4516 | if (XVEC (in_rtx, i) != NULL) |
4517 | for (j = 0; j < XVECLEN (in_rtx, i); j++) | |
4518 | leaf_renumber_regs_insn (XVECEXP (in_rtx, i, j)); | |
3cf2715d DE |
4519 | break; |
4520 | ||
4521 | case 'S': | |
4522 | case 's': | |
4523 | case '0': | |
4524 | case 'i': | |
4525 | case 'w': | |
91914e56 | 4526 | case 'p': |
3cf2715d DE |
4527 | case 'n': |
4528 | case 'u': | |
4529 | break; | |
4530 | ||
4531 | default: | |
0bccc606 | 4532 | gcc_unreachable (); |
3cf2715d DE |
4533 | } |
4534 | } | |
4535 | #endif | |
ef330312 PB |
4536 | \f |
4537 | /* Turn the RTL into assembly. */ | |
c2924966 | 4538 | static unsigned int |
ef330312 PB |
4539 | rest_of_handle_final (void) |
4540 | { | |
0d4b5b86 | 4541 | const char *fnname = get_fnname_from_decl (current_function_decl); |
ef330312 | 4542 | |
60012ddc JJ |
4543 | /* Turn debug markers into notes if the var-tracking pass has not |
4544 | been invoked. */ | |
4545 | if (!flag_var_tracking && MAY_HAVE_DEBUG_MARKER_INSNS) | |
96a95ac1 AO |
4546 | variable_tracking_main (); |
4547 | ||
ef330312 PB |
4548 | assemble_start_function (current_function_decl, fnname); |
4549 | final_start_function (get_insns (), asm_out_file, optimize); | |
4550 | final (get_insns (), asm_out_file, optimize); | |
036ea399 JJ |
4551 | if (flag_ipa_ra |
4552 | && !lookup_attribute ("noipa", DECL_ATTRIBUTES (current_function_decl))) | |
27c07cc5 | 4553 | collect_fn_hard_reg_usage (); |
ef330312 PB |
4554 | final_end_function (); |
4555 | ||
182a0c11 RH |
4556 | /* The IA-64 ".handlerdata" directive must be issued before the ".endp" |
4557 | directive that closes the procedure descriptor. Similarly, for x64 SEH. | |
4558 | Otherwise it's not strictly necessary, but it doesn't hurt either. */ | |
22ba88ef | 4559 | output_function_exception_table (fnname); |
ef330312 PB |
4560 | |
4561 | assemble_end_function (current_function_decl, fnname); | |
4562 | ||
6fb5fa3c DB |
4563 | /* Free up reg info memory. */ |
4564 | free_reg_info (); | |
4565 | ||
ef330312 PB |
4566 | if (! quiet_flag) |
4567 | fflush (asm_out_file); | |
4568 | ||
ef330312 PB |
4569 | /* Write DBX symbols if requested. */ |
4570 | ||
4571 | /* Note that for those inline functions where we don't initially | |
4572 | know for certain that we will be generating an out-of-line copy, | |
4573 | the first invocation of this routine (rest_of_compilation) will | |
4574 | skip over this code by doing a `goto exit_rest_of_compilation;'. | |
4575 | Later on, wrapup_global_declarations will (indirectly) call | |
4576 | rest_of_compilation again for those inline functions that need | |
4577 | to have out-of-line copies generated. During that call, we | |
4578 | *will* be routed past here. */ | |
4579 | ||
4580 | timevar_push (TV_SYMOUT); | |
725730f2 EB |
4581 | if (!DECL_IGNORED_P (current_function_decl)) |
4582 | debug_hooks->function_decl (current_function_decl); | |
ef330312 | 4583 | timevar_pop (TV_SYMOUT); |
6b20f353 DS |
4584 | |
4585 | /* Release the blocks that are linked to DECL_INITIAL() to free the memory. */ | |
4586 | DECL_INITIAL (current_function_decl) = error_mark_node; | |
4587 | ||
395a40e0 JH |
4588 | if (DECL_STATIC_CONSTRUCTOR (current_function_decl) |
4589 | && targetm.have_ctors_dtors) | |
4590 | targetm.asm_out.constructor (XEXP (DECL_RTL (current_function_decl), 0), | |
4591 | decl_init_priority_lookup | |
4592 | (current_function_decl)); | |
4593 | if (DECL_STATIC_DESTRUCTOR (current_function_decl) | |
4594 | && targetm.have_ctors_dtors) | |
4595 | targetm.asm_out.destructor (XEXP (DECL_RTL (current_function_decl), 0), | |
4596 | decl_fini_priority_lookup | |
4597 | (current_function_decl)); | |
c2924966 | 4598 | return 0; |
ef330312 PB |
4599 | } |
4600 | ||
27a4cd48 DM |
4601 | namespace { |
4602 | ||
4603 | const pass_data pass_data_final = | |
ef330312 | 4604 | { |
27a4cd48 DM |
4605 | RTL_PASS, /* type */ |
4606 | "final", /* name */ | |
4607 | OPTGROUP_NONE, /* optinfo_flags */ | |
27a4cd48 DM |
4608 | TV_FINAL, /* tv_id */ |
4609 | 0, /* properties_required */ | |
4610 | 0, /* properties_provided */ | |
4611 | 0, /* properties_destroyed */ | |
4612 | 0, /* todo_flags_start */ | |
4613 | 0, /* todo_flags_finish */ | |
ef330312 PB |
4614 | }; |
4615 | ||
27a4cd48 DM |
4616 | class pass_final : public rtl_opt_pass |
4617 | { | |
4618 | public: | |
c3284718 RS |
4619 | pass_final (gcc::context *ctxt) |
4620 | : rtl_opt_pass (pass_data_final, ctxt) | |
27a4cd48 DM |
4621 | {} |
4622 | ||
4623 | /* opt_pass methods: */ | |
be55bfe6 | 4624 | virtual unsigned int execute (function *) { return rest_of_handle_final (); } |
27a4cd48 DM |
4625 | |
4626 | }; // class pass_final | |
4627 | ||
4628 | } // anon namespace | |
4629 | ||
4630 | rtl_opt_pass * | |
4631 | make_pass_final (gcc::context *ctxt) | |
4632 | { | |
4633 | return new pass_final (ctxt); | |
4634 | } | |
4635 | ||
ef330312 | 4636 | |
c2924966 | 4637 | static unsigned int |
ef330312 PB |
4638 | rest_of_handle_shorten_branches (void) |
4639 | { | |
4640 | /* Shorten branches. */ | |
4641 | shorten_branches (get_insns ()); | |
c2924966 | 4642 | return 0; |
ef330312 | 4643 | } |
b0efb46b | 4644 | |
27a4cd48 DM |
4645 | namespace { |
4646 | ||
4647 | const pass_data pass_data_shorten_branches = | |
ef330312 | 4648 | { |
27a4cd48 DM |
4649 | RTL_PASS, /* type */ |
4650 | "shorten", /* name */ | |
4651 | OPTGROUP_NONE, /* optinfo_flags */ | |
27a4cd48 DM |
4652 | TV_SHORTEN_BRANCH, /* tv_id */ |
4653 | 0, /* properties_required */ | |
4654 | 0, /* properties_provided */ | |
4655 | 0, /* properties_destroyed */ | |
4656 | 0, /* todo_flags_start */ | |
4657 | 0, /* todo_flags_finish */ | |
ef330312 PB |
4658 | }; |
4659 | ||
27a4cd48 DM |
4660 | class pass_shorten_branches : public rtl_opt_pass |
4661 | { | |
4662 | public: | |
c3284718 RS |
4663 | pass_shorten_branches (gcc::context *ctxt) |
4664 | : rtl_opt_pass (pass_data_shorten_branches, ctxt) | |
27a4cd48 DM |
4665 | {} |
4666 | ||
4667 | /* opt_pass methods: */ | |
be55bfe6 TS |
4668 | virtual unsigned int execute (function *) |
4669 | { | |
4670 | return rest_of_handle_shorten_branches (); | |
4671 | } | |
27a4cd48 DM |
4672 | |
4673 | }; // class pass_shorten_branches | |
4674 | ||
4675 | } // anon namespace | |
4676 | ||
4677 | rtl_opt_pass * | |
4678 | make_pass_shorten_branches (gcc::context *ctxt) | |
4679 | { | |
4680 | return new pass_shorten_branches (ctxt); | |
4681 | } | |
4682 | ||
ef330312 | 4683 | |
c2924966 | 4684 | static unsigned int |
ef330312 PB |
4685 | rest_of_clean_state (void) |
4686 | { | |
fa7af581 | 4687 | rtx_insn *insn, *next; |
2153915d AO |
4688 | FILE *final_output = NULL; |
4689 | int save_unnumbered = flag_dump_unnumbered; | |
4690 | int save_noaddr = flag_dump_noaddr; | |
4691 | ||
4692 | if (flag_dump_final_insns) | |
4693 | { | |
4694 | final_output = fopen (flag_dump_final_insns, "a"); | |
4695 | if (!final_output) | |
4696 | { | |
7ca92787 JM |
4697 | error ("could not open final insn dump file %qs: %m", |
4698 | flag_dump_final_insns); | |
2153915d AO |
4699 | flag_dump_final_insns = NULL; |
4700 | } | |
4701 | else | |
4702 | { | |
2153915d | 4703 | flag_dump_noaddr = flag_dump_unnumbered = 1; |
c7ba0cfb | 4704 | if (flag_compare_debug_opt || flag_compare_debug) |
171a55e7 | 4705 | dump_flags |= TDF_NOUID | TDF_COMPARE_DEBUG; |
6d8402ac AO |
4706 | dump_function_header (final_output, current_function_decl, |
4707 | dump_flags); | |
6ca5d1f6 | 4708 | final_insns_dump_p = true; |
2153915d AO |
4709 | |
4710 | for (insn = get_insns (); insn; insn = NEXT_INSN (insn)) | |
4711 | if (LABEL_P (insn)) | |
4712 | INSN_UID (insn) = CODE_LABEL_NUMBER (insn); | |
4713 | else | |
a59d15cf AO |
4714 | { |
4715 | if (NOTE_P (insn)) | |
4716 | set_block_for_insn (insn, NULL); | |
4717 | INSN_UID (insn) = 0; | |
4718 | } | |
2153915d AO |
4719 | } |
4720 | } | |
ef330312 PB |
4721 | |
4722 | /* It is very important to decompose the RTL instruction chain here: | |
4723 | debug information keeps pointing into CODE_LABEL insns inside the function | |
4724 | body. If these remain pointing to the other insns, we end up preserving | |
4725 | whole RTL chain and attached detailed debug info in memory. */ | |
4726 | for (insn = get_insns (); insn; insn = next) | |
4727 | { | |
4728 | next = NEXT_INSN (insn); | |
0f82e5c9 DM |
4729 | SET_NEXT_INSN (insn) = NULL; |
4730 | SET_PREV_INSN (insn) = NULL; | |
2153915d AO |
4731 | |
4732 | if (final_output | |
4733 | && (!NOTE_P (insn) || | |
4734 | (NOTE_KIND (insn) != NOTE_INSN_VAR_LOCATION | |
96a95ac1 | 4735 | && NOTE_KIND (insn) != NOTE_INSN_BEGIN_STMT |
2b1c5433 | 4736 | && NOTE_KIND (insn) != NOTE_INSN_CALL_ARG_LOCATION |
2153915d | 4737 | && NOTE_KIND (insn) != NOTE_INSN_BLOCK_BEG |
5619e52c JJ |
4738 | && NOTE_KIND (insn) != NOTE_INSN_BLOCK_END |
4739 | && NOTE_KIND (insn) != NOTE_INSN_DELETED_DEBUG_LABEL))) | |
2153915d | 4740 | print_rtl_single (final_output, insn); |
2153915d AO |
4741 | } |
4742 | ||
4743 | if (final_output) | |
4744 | { | |
4745 | flag_dump_noaddr = save_noaddr; | |
4746 | flag_dump_unnumbered = save_unnumbered; | |
6ca5d1f6 | 4747 | final_insns_dump_p = false; |
2153915d AO |
4748 | |
4749 | if (fclose (final_output)) | |
4750 | { | |
7ca92787 JM |
4751 | error ("could not close final insn dump file %qs: %m", |
4752 | flag_dump_final_insns); | |
2153915d AO |
4753 | flag_dump_final_insns = NULL; |
4754 | } | |
ef330312 PB |
4755 | } |
4756 | ||
5f39ad47 | 4757 | flag_rerun_cse_after_global_opts = 0; |
ef330312 PB |
4758 | reload_completed = 0; |
4759 | epilogue_completed = 0; | |
23249ac4 DB |
4760 | #ifdef STACK_REGS |
4761 | regstack_completed = 0; | |
4762 | #endif | |
ef330312 PB |
4763 | |
4764 | /* Clear out the insn_length contents now that they are no | |
4765 | longer valid. */ | |
4766 | init_insn_lengths (); | |
4767 | ||
4768 | /* Show no temporary slots allocated. */ | |
4769 | init_temp_slots (); | |
4770 | ||
ef330312 PB |
4771 | free_bb_for_insn (); |
4772 | ||
c2e84327 DM |
4773 | if (cfun->gimple_df) |
4774 | delete_tree_ssa (cfun); | |
55b34b5f | 4775 | |
051f8cc6 JH |
4776 | /* We can reduce stack alignment on call site only when we are sure that |
4777 | the function body just produced will be actually used in the final | |
4778 | executable. */ | |
4779 | if (decl_binds_to_current_def_p (current_function_decl)) | |
ef330312 | 4780 | { |
17b29c0a | 4781 | unsigned int pref = crtl->preferred_stack_boundary; |
cb91fab0 JH |
4782 | if (crtl->stack_alignment_needed > crtl->preferred_stack_boundary) |
4783 | pref = crtl->stack_alignment_needed; | |
3dafb85c ML |
4784 | cgraph_node::rtl_info (current_function_decl) |
4785 | ->preferred_incoming_stack_boundary = pref; | |
ef330312 PB |
4786 | } |
4787 | ||
4788 | /* Make sure volatile mem refs aren't considered valid operands for | |
4789 | arithmetic insns. We must call this here if this is a nested inline | |
4790 | function, since the above code leaves us in the init_recog state, | |
4791 | and the function context push/pop code does not save/restore volatile_ok. | |
4792 | ||
4793 | ??? Maybe it isn't necessary for expand_start_function to call this | |
4794 | anymore if we do it here? */ | |
4795 | ||
4796 | init_recog_no_volatile (); | |
4797 | ||
4798 | /* We're done with this function. Free up memory if we can. */ | |
4799 | free_after_parsing (cfun); | |
4800 | free_after_compilation (cfun); | |
c2924966 | 4801 | return 0; |
ef330312 PB |
4802 | } |
4803 | ||
27a4cd48 DM |
4804 | namespace { |
4805 | ||
4806 | const pass_data pass_data_clean_state = | |
ef330312 | 4807 | { |
27a4cd48 DM |
4808 | RTL_PASS, /* type */ |
4809 | "*clean_state", /* name */ | |
4810 | OPTGROUP_NONE, /* optinfo_flags */ | |
27a4cd48 DM |
4811 | TV_FINAL, /* tv_id */ |
4812 | 0, /* properties_required */ | |
4813 | 0, /* properties_provided */ | |
4814 | PROP_rtl, /* properties_destroyed */ | |
4815 | 0, /* todo_flags_start */ | |
4816 | 0, /* todo_flags_finish */ | |
ef330312 | 4817 | }; |
27a4cd48 DM |
4818 | |
4819 | class pass_clean_state : public rtl_opt_pass | |
4820 | { | |
4821 | public: | |
c3284718 RS |
4822 | pass_clean_state (gcc::context *ctxt) |
4823 | : rtl_opt_pass (pass_data_clean_state, ctxt) | |
27a4cd48 DM |
4824 | {} |
4825 | ||
4826 | /* opt_pass methods: */ | |
be55bfe6 TS |
4827 | virtual unsigned int execute (function *) |
4828 | { | |
4829 | return rest_of_clean_state (); | |
4830 | } | |
27a4cd48 DM |
4831 | |
4832 | }; // class pass_clean_state | |
4833 | ||
4834 | } // anon namespace | |
4835 | ||
4836 | rtl_opt_pass * | |
4837 | make_pass_clean_state (gcc::context *ctxt) | |
4838 | { | |
4839 | return new pass_clean_state (ctxt); | |
4840 | } | |
27c07cc5 | 4841 | |
026c3cfd | 4842 | /* Return true if INSN is a call to the current function. */ |
26e288ba TV |
4843 | |
4844 | static bool | |
fa7af581 | 4845 | self_recursive_call_p (rtx_insn *insn) |
26e288ba TV |
4846 | { |
4847 | tree fndecl = get_call_fndecl (insn); | |
4848 | return (fndecl == current_function_decl | |
4849 | && decl_binds_to_current_def_p (fndecl)); | |
4850 | } | |
4851 | ||
27c07cc5 RO |
4852 | /* Collect hard register usage for the current function. */ |
4853 | ||
4854 | static void | |
4855 | collect_fn_hard_reg_usage (void) | |
4856 | { | |
fa7af581 | 4857 | rtx_insn *insn; |
4b29b965 | 4858 | #ifdef STACK_REGS |
27c07cc5 | 4859 | int i; |
4b29b965 | 4860 | #endif |
27c07cc5 | 4861 | struct cgraph_rtl_info *node; |
53f2f6c1 | 4862 | HARD_REG_SET function_used_regs; |
27c07cc5 RO |
4863 | |
4864 | /* ??? To be removed when all the ports have been fixed. */ | |
4865 | if (!targetm.call_fusage_contains_non_callee_clobbers) | |
4866 | return; | |
4867 | ||
53f2f6c1 | 4868 | CLEAR_HARD_REG_SET (function_used_regs); |
27c07cc5 RO |
4869 | |
4870 | for (insn = get_insns (); insn != NULL_RTX; insn = next_insn (insn)) | |
4871 | { | |
4872 | HARD_REG_SET insn_used_regs; | |
4873 | ||
4874 | if (!NONDEBUG_INSN_P (insn)) | |
4875 | continue; | |
4876 | ||
26e288ba TV |
4877 | if (CALL_P (insn) |
4878 | && !self_recursive_call_p (insn)) | |
6621ab68 TV |
4879 | { |
4880 | if (!get_call_reg_set_usage (insn, &insn_used_regs, | |
4881 | call_used_reg_set)) | |
4882 | return; | |
27c07cc5 | 4883 | |
6621ab68 TV |
4884 | IOR_HARD_REG_SET (function_used_regs, insn_used_regs); |
4885 | } | |
27c07cc5 | 4886 | |
6621ab68 | 4887 | find_all_hard_reg_sets (insn, &insn_used_regs, false); |
53f2f6c1 | 4888 | IOR_HARD_REG_SET (function_used_regs, insn_used_regs); |
27c07cc5 RO |
4889 | } |
4890 | ||
4891 | /* Be conservative - mark fixed and global registers as used. */ | |
53f2f6c1 | 4892 | IOR_HARD_REG_SET (function_used_regs, fixed_reg_set); |
27c07cc5 RO |
4893 | |
4894 | #ifdef STACK_REGS | |
4895 | /* Handle STACK_REGS conservatively, since the df-framework does not | |
4896 | provide accurate information for them. */ | |
4897 | ||
4898 | for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++) | |
53f2f6c1 | 4899 | SET_HARD_REG_BIT (function_used_regs, i); |
27c07cc5 RO |
4900 | #endif |
4901 | ||
5fea8186 TV |
4902 | /* The information we have gathered is only interesting if it exposes a |
4903 | register from the call_used_regs that is not used in this function. */ | |
4904 | if (hard_reg_set_subset_p (call_used_reg_set, function_used_regs)) | |
4905 | return; | |
4906 | ||
3dafb85c | 4907 | node = cgraph_node::rtl_info (current_function_decl); |
53f2f6c1 TV |
4908 | gcc_assert (node != NULL); |
4909 | ||
4910 | COPY_HARD_REG_SET (node->function_used_regs, function_used_regs); | |
27c07cc5 RO |
4911 | node->function_used_regs_valid = 1; |
4912 | } | |
4913 | ||
4914 | /* Get the declaration of the function called by INSN. */ | |
4915 | ||
4916 | static tree | |
fa7af581 | 4917 | get_call_fndecl (rtx_insn *insn) |
27c07cc5 RO |
4918 | { |
4919 | rtx note, datum; | |
4920 | ||
4921 | note = find_reg_note (insn, REG_CALL_DECL, NULL_RTX); | |
4922 | if (note == NULL_RTX) | |
4923 | return NULL_TREE; | |
4924 | ||
4925 | datum = XEXP (note, 0); | |
4926 | if (datum != NULL_RTX) | |
4927 | return SYMBOL_REF_DECL (datum); | |
4928 | ||
4929 | return NULL_TREE; | |
4930 | } | |
4931 | ||
4932 | /* Return the cgraph_rtl_info of the function called by INSN. Returns NULL for | |
4933 | call targets that can be overwritten. */ | |
4934 | ||
4935 | static struct cgraph_rtl_info * | |
fa7af581 | 4936 | get_call_cgraph_rtl_info (rtx_insn *insn) |
27c07cc5 RO |
4937 | { |
4938 | tree fndecl; | |
4939 | ||
4940 | if (insn == NULL_RTX) | |
4941 | return NULL; | |
4942 | ||
4943 | fndecl = get_call_fndecl (insn); | |
4944 | if (fndecl == NULL_TREE | |
4945 | || !decl_binds_to_current_def_p (fndecl)) | |
4946 | return NULL; | |
4947 | ||
3dafb85c | 4948 | return cgraph_node::rtl_info (fndecl); |
27c07cc5 RO |
4949 | } |
4950 | ||
4951 | /* Find hard registers used by function call instruction INSN, and return them | |
4952 | in REG_SET. Return DEFAULT_SET in REG_SET if not found. */ | |
4953 | ||
4954 | bool | |
86bf2d46 | 4955 | get_call_reg_set_usage (rtx_insn *insn, HARD_REG_SET *reg_set, |
27c07cc5 RO |
4956 | HARD_REG_SET default_set) |
4957 | { | |
1e288103 | 4958 | if (flag_ipa_ra) |
27c07cc5 RO |
4959 | { |
4960 | struct cgraph_rtl_info *node = get_call_cgraph_rtl_info (insn); | |
4961 | if (node != NULL | |
4962 | && node->function_used_regs_valid) | |
4963 | { | |
4964 | COPY_HARD_REG_SET (*reg_set, node->function_used_regs); | |
4965 | AND_HARD_REG_SET (*reg_set, default_set); | |
4966 | return true; | |
4967 | } | |
4968 | } | |
4969 | ||
4970 | COPY_HARD_REG_SET (*reg_set, default_set); | |
4971 | return false; | |
4972 | } |