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3cf2715d | 1 | /* Convert RTL to assembler code and output it, for GNU compiler. |
3b708058 | 2 | Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, |
ff81832f | 3 | 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc. |
3cf2715d | 4 | |
1322177d | 5 | This file is part of GCC. |
3cf2715d | 6 | |
1322177d LB |
7 | GCC is free software; you can redistribute it and/or modify it under |
8 | the terms of the GNU General Public License as published by the Free | |
9 | Software Foundation; either version 2, or (at your option) any later | |
10 | version. | |
3cf2715d | 11 | |
1322177d LB |
12 | GCC is distributed in the hope that it will be useful, but WITHOUT ANY |
13 | WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
14 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
15 | for more details. | |
3cf2715d DE |
16 | |
17 | You should have received a copy of the GNU General Public License | |
1322177d LB |
18 | along with GCC; see the file COPYING. If not, write to the Free |
19 | Software Foundation, 59 Temple Place - Suite 330, Boston, MA | |
20 | 02111-1307, USA. */ | |
3cf2715d | 21 | |
3cf2715d DE |
22 | /* This is the final pass of the compiler. |
23 | It looks at the rtl code for a function and outputs assembler code. | |
24 | ||
25 | Call `final_start_function' to output the assembler code for function entry, | |
26 | `final' to output assembler code for some RTL code, | |
27 | `final_end_function' to output assembler code for function exit. | |
28 | If a function is compiled in several pieces, each piece is | |
29 | output separately with `final'. | |
30 | ||
31 | Some optimizations are also done at this level. | |
32 | Move instructions that were made unnecessary by good register allocation | |
33 | are detected and omitted from the output. (Though most of these | |
34 | are removed by the last jump pass.) | |
35 | ||
36 | Instructions to set the condition codes are omitted when it can be | |
37 | seen that the condition codes already had the desired values. | |
38 | ||
39 | In some cases it is sufficient if the inherited condition codes | |
40 | have related values, but this may require the following insn | |
41 | (the one that tests the condition codes) to be modified. | |
42 | ||
43 | The code for the function prologue and epilogue are generated | |
08c148a8 NB |
44 | directly in assembler by the target functions function_prologue and |
45 | function_epilogue. Those instructions never exist as rtl. */ | |
3cf2715d DE |
46 | |
47 | #include "config.h" | |
670ee920 | 48 | #include "system.h" |
4977bab6 ZW |
49 | #include "coretypes.h" |
50 | #include "tm.h" | |
3cf2715d DE |
51 | |
52 | #include "tree.h" | |
53 | #include "rtl.h" | |
6baf1cc8 | 54 | #include "tm_p.h" |
3cf2715d DE |
55 | #include "regs.h" |
56 | #include "insn-config.h" | |
3cf2715d | 57 | #include "insn-attr.h" |
3cf2715d DE |
58 | #include "recog.h" |
59 | #include "conditions.h" | |
60 | #include "flags.h" | |
61 | #include "real.h" | |
62 | #include "hard-reg-set.h" | |
3cf2715d | 63 | #include "output.h" |
3d195391 | 64 | #include "except.h" |
49ad7cfa | 65 | #include "function.h" |
10f0ad3d | 66 | #include "toplev.h" |
d6f4ec51 | 67 | #include "reload.h" |
ab87f8c8 | 68 | #include "intl.h" |
be1bb652 | 69 | #include "basic-block.h" |
08c148a8 | 70 | #include "target.h" |
a5a42b92 | 71 | #include "debug.h" |
49d801d3 | 72 | #include "expr.h" |
ba4f7968 | 73 | #include "cfglayout.h" |
3cf2715d | 74 | |
440aabf8 NB |
75 | #ifdef XCOFF_DEBUGGING_INFO |
76 | #include "xcoffout.h" /* Needed for external data | |
77 | declarations for e.g. AIX 4.x. */ | |
78 | #endif | |
79 | ||
76ead72b RL |
80 | #if defined (DWARF2_UNWIND_INFO) || defined (DWARF2_DEBUGGING_INFO) |
81 | #include "dwarf2out.h" | |
82 | #endif | |
83 | ||
3cf2715d DE |
84 | /* If we aren't using cc0, CC_STATUS_INIT shouldn't exist. So define a |
85 | null default for it to save conditionalization later. */ | |
86 | #ifndef CC_STATUS_INIT | |
87 | #define CC_STATUS_INIT | |
88 | #endif | |
89 | ||
90 | /* How to start an assembler comment. */ | |
91 | #ifndef ASM_COMMENT_START | |
92 | #define ASM_COMMENT_START ";#" | |
93 | #endif | |
94 | ||
95 | /* Is the given character a logical line separator for the assembler? */ | |
96 | #ifndef IS_ASM_LOGICAL_LINE_SEPARATOR | |
97 | #define IS_ASM_LOGICAL_LINE_SEPARATOR(C) ((C) == ';') | |
98 | #endif | |
99 | ||
75197b37 BS |
100 | #ifndef JUMP_TABLES_IN_TEXT_SECTION |
101 | #define JUMP_TABLES_IN_TEXT_SECTION 0 | |
102 | #endif | |
103 | ||
d48bc59a RH |
104 | #if defined(READONLY_DATA_SECTION) || defined(READONLY_DATA_SECTION_ASM_OP) |
105 | #define HAVE_READONLY_DATA_SECTION 1 | |
106 | #else | |
107 | #define HAVE_READONLY_DATA_SECTION 0 | |
108 | #endif | |
109 | ||
3cf2715d | 110 | /* Last insn processed by final_scan_insn. */ |
b1a9f6a0 RH |
111 | static rtx debug_insn; |
112 | rtx current_output_insn; | |
3cf2715d DE |
113 | |
114 | /* Line number of last NOTE. */ | |
115 | static int last_linenum; | |
116 | ||
eac40081 RK |
117 | /* Highest line number in current block. */ |
118 | static int high_block_linenum; | |
119 | ||
120 | /* Likewise for function. */ | |
121 | static int high_function_linenum; | |
122 | ||
3cf2715d | 123 | /* Filename of last NOTE. */ |
3cce094d | 124 | static const char *last_filename; |
3cf2715d | 125 | |
fc470718 R |
126 | extern int length_unit_log; /* This is defined in insn-attrtab.c. */ |
127 | ||
3cf2715d DE |
128 | /* Nonzero while outputting an `asm' with operands. |
129 | This means that inconsistencies are the user's fault, so don't abort. | |
130 | The precise value is the insn being output, to pass to error_for_asm. */ | |
c8b94768 | 131 | rtx this_is_asm_operands; |
3cf2715d DE |
132 | |
133 | /* Number of operands of this insn, for an `asm' with operands. */ | |
22bf4422 | 134 | static unsigned int insn_noperands; |
3cf2715d DE |
135 | |
136 | /* Compare optimization flag. */ | |
137 | ||
138 | static rtx last_ignored_compare = 0; | |
139 | ||
3cf2715d DE |
140 | /* Assign a unique number to each insn that is output. |
141 | This can be used to generate unique local labels. */ | |
142 | ||
143 | static int insn_counter = 0; | |
144 | ||
145 | #ifdef HAVE_cc0 | |
146 | /* This variable contains machine-dependent flags (defined in tm.h) | |
147 | set and examined by output routines | |
148 | that describe how to interpret the condition codes properly. */ | |
149 | ||
150 | CC_STATUS cc_status; | |
151 | ||
152 | /* During output of an insn, this contains a copy of cc_status | |
153 | from before the insn. */ | |
154 | ||
155 | CC_STATUS cc_prev_status; | |
156 | #endif | |
157 | ||
158 | /* Indexed by hardware reg number, is 1 if that register is ever | |
159 | used in the current function. | |
160 | ||
161 | In life_analysis, or in stupid_life_analysis, this is set | |
162 | up to record the hard regs used explicitly. Reload adds | |
163 | in the hard regs used for holding pseudo regs. Final uses | |
164 | it to generate the code in the function prologue and epilogue | |
165 | to save and restore registers as needed. */ | |
166 | ||
167 | char regs_ever_live[FIRST_PSEUDO_REGISTER]; | |
168 | ||
169 | /* Nonzero means current function must be given a frame pointer. | |
170 | Set in stmt.c if anything is allocated on the stack there. | |
171 | Set in reload1.c if anything is allocated on the stack there. */ | |
172 | ||
173 | int frame_pointer_needed; | |
174 | ||
18c038b9 | 175 | /* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */ |
3cf2715d DE |
176 | |
177 | static int block_depth; | |
178 | ||
179 | /* Nonzero if have enabled APP processing of our assembler output. */ | |
180 | ||
181 | static int app_on; | |
182 | ||
183 | /* If we are outputting an insn sequence, this contains the sequence rtx. | |
184 | Zero otherwise. */ | |
185 | ||
186 | rtx final_sequence; | |
187 | ||
188 | #ifdef ASSEMBLER_DIALECT | |
189 | ||
190 | /* Number of the assembler dialect to use, starting at 0. */ | |
191 | static int dialect_number; | |
192 | #endif | |
193 | ||
194 | /* Indexed by line number, nonzero if there is a note for that line. */ | |
195 | ||
196 | static char *line_note_exists; | |
197 | ||
afe48e06 RH |
198 | #ifdef HAVE_conditional_execution |
199 | /* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */ | |
200 | rtx current_insn_predicate; | |
201 | #endif | |
202 | ||
1d300e19 | 203 | #ifdef HAVE_ATTR_length |
711d877c KG |
204 | static int asm_insn_count PARAMS ((rtx)); |
205 | #endif | |
206 | static void profile_function PARAMS ((FILE *)); | |
207 | static void profile_after_prologue PARAMS ((FILE *)); | |
653e276c | 208 | static void notice_source_line PARAMS ((rtx)); |
49d801d3 | 209 | static rtx walk_alter_subreg PARAMS ((rtx *)); |
711d877c | 210 | static void output_asm_name PARAMS ((void)); |
0dc36574 | 211 | static void output_alternate_entry_point PARAMS ((FILE *, rtx)); |
998d7deb | 212 | static tree get_mem_expr_from_op PARAMS ((rtx, int *)); |
4f9b4029 | 213 | static void output_asm_operand_names PARAMS ((rtx *, int *, int)); |
711d877c | 214 | static void output_operand PARAMS ((rtx, int)); |
e9a25f70 | 215 | #ifdef LEAF_REGISTERS |
711d877c | 216 | static void leaf_renumber_regs PARAMS ((rtx)); |
e9a25f70 JL |
217 | #endif |
218 | #ifdef HAVE_cc0 | |
711d877c | 219 | static int alter_cond PARAMS ((rtx)); |
e9a25f70 | 220 | #endif |
ca3075bd | 221 | #ifndef ADDR_VEC_ALIGN |
711d877c | 222 | static int final_addr_vec_align PARAMS ((rtx)); |
ca3075bd | 223 | #endif |
7bdb32b9 | 224 | #ifdef HAVE_ATTR_length |
711d877c | 225 | static int align_fuzz PARAMS ((rtx, rtx, int, unsigned)); |
7bdb32b9 | 226 | #endif |
3cf2715d DE |
227 | \f |
228 | /* Initialize data in final at the beginning of a compilation. */ | |
229 | ||
230 | void | |
231 | init_final (filename) | |
6a651371 | 232 | const char *filename ATTRIBUTE_UNUSED; |
3cf2715d | 233 | { |
3cf2715d | 234 | app_on = 0; |
3cf2715d DE |
235 | final_sequence = 0; |
236 | ||
237 | #ifdef ASSEMBLER_DIALECT | |
238 | dialect_number = ASSEMBLER_DIALECT; | |
239 | #endif | |
240 | } | |
241 | ||
08c148a8 | 242 | /* Default target function prologue and epilogue assembler output. |
b9f22704 | 243 | |
08c148a8 NB |
244 | If not overridden for epilogue code, then the function body itself |
245 | contains return instructions wherever needed. */ | |
246 | void | |
247 | default_function_pro_epilogue (file, size) | |
248 | FILE *file ATTRIBUTE_UNUSED; | |
249 | HOST_WIDE_INT size ATTRIBUTE_UNUSED; | |
250 | { | |
251 | } | |
252 | ||
b4c25db2 NB |
253 | /* Default target hook that outputs nothing to a stream. */ |
254 | void | |
255 | no_asm_to_stream (file) | |
256 | FILE *file ATTRIBUTE_UNUSED; | |
257 | { | |
258 | } | |
259 | ||
3cf2715d DE |
260 | /* Enable APP processing of subsequent output. |
261 | Used before the output from an `asm' statement. */ | |
262 | ||
263 | void | |
264 | app_enable () | |
265 | { | |
266 | if (! app_on) | |
267 | { | |
51723711 | 268 | fputs (ASM_APP_ON, asm_out_file); |
3cf2715d DE |
269 | app_on = 1; |
270 | } | |
271 | } | |
272 | ||
273 | /* Disable APP processing of subsequent output. | |
274 | Called from varasm.c before most kinds of output. */ | |
275 | ||
276 | void | |
277 | app_disable () | |
278 | { | |
279 | if (app_on) | |
280 | { | |
51723711 | 281 | fputs (ASM_APP_OFF, asm_out_file); |
3cf2715d DE |
282 | app_on = 0; |
283 | } | |
284 | } | |
285 | \f | |
f5d927c0 | 286 | /* Return the number of slots filled in the current |
3cf2715d DE |
287 | delayed branch sequence (we don't count the insn needing the |
288 | delay slot). Zero if not in a delayed branch sequence. */ | |
289 | ||
290 | #ifdef DELAY_SLOTS | |
291 | int | |
292 | dbr_sequence_length () | |
293 | { | |
294 | if (final_sequence != 0) | |
295 | return XVECLEN (final_sequence, 0) - 1; | |
296 | else | |
297 | return 0; | |
298 | } | |
299 | #endif | |
300 | \f | |
301 | /* The next two pages contain routines used to compute the length of an insn | |
302 | and to shorten branches. */ | |
303 | ||
304 | /* Arrays for insn lengths, and addresses. The latter is referenced by | |
305 | `insn_current_length'. */ | |
306 | ||
addd7df6 | 307 | static int *insn_lengths; |
9d98a694 | 308 | |
9d98a694 | 309 | varray_type insn_addresses_; |
3cf2715d | 310 | |
ea3cbda5 R |
311 | /* Max uid for which the above arrays are valid. */ |
312 | static int insn_lengths_max_uid; | |
313 | ||
3cf2715d DE |
314 | /* Address of insn being processed. Used by `insn_current_length'. */ |
315 | int insn_current_address; | |
316 | ||
fc470718 R |
317 | /* Address of insn being processed in previous iteration. */ |
318 | int insn_last_address; | |
319 | ||
d6a7951f | 320 | /* known invariant alignment of insn being processed. */ |
fc470718 R |
321 | int insn_current_align; |
322 | ||
95707627 R |
323 | /* After shorten_branches, for any insn, uid_align[INSN_UID (insn)] |
324 | gives the next following alignment insn that increases the known | |
325 | alignment, or NULL_RTX if there is no such insn. | |
326 | For any alignment obtained this way, we can again index uid_align with | |
327 | its uid to obtain the next following align that in turn increases the | |
328 | alignment, till we reach NULL_RTX; the sequence obtained this way | |
329 | for each insn we'll call the alignment chain of this insn in the following | |
330 | comments. */ | |
331 | ||
f5d927c0 KH |
332 | struct label_alignment |
333 | { | |
9e423e6d JW |
334 | short alignment; |
335 | short max_skip; | |
336 | }; | |
337 | ||
338 | static rtx *uid_align; | |
339 | static int *uid_shuid; | |
340 | static struct label_alignment *label_align; | |
95707627 | 341 | |
3cf2715d DE |
342 | /* Indicate that branch shortening hasn't yet been done. */ |
343 | ||
344 | void | |
345 | init_insn_lengths () | |
346 | { | |
95707627 R |
347 | if (uid_shuid) |
348 | { | |
349 | free (uid_shuid); | |
350 | uid_shuid = 0; | |
351 | } | |
352 | if (insn_lengths) | |
353 | { | |
354 | free (insn_lengths); | |
355 | insn_lengths = 0; | |
ea3cbda5 | 356 | insn_lengths_max_uid = 0; |
95707627 | 357 | } |
9d98a694 AO |
358 | #ifdef HAVE_ATTR_length |
359 | INSN_ADDRESSES_FREE (); | |
360 | #endif | |
95707627 R |
361 | if (uid_align) |
362 | { | |
363 | free (uid_align); | |
364 | uid_align = 0; | |
365 | } | |
3cf2715d DE |
366 | } |
367 | ||
368 | /* Obtain the current length of an insn. If branch shortening has been done, | |
369 | get its actual length. Otherwise, get its maximum length. */ | |
370 | ||
371 | int | |
372 | get_attr_length (insn) | |
7bdb32b9 | 373 | rtx insn ATTRIBUTE_UNUSED; |
3cf2715d DE |
374 | { |
375 | #ifdef HAVE_ATTR_length | |
376 | rtx body; | |
377 | int i; | |
378 | int length = 0; | |
379 | ||
ea3cbda5 | 380 | if (insn_lengths_max_uid > INSN_UID (insn)) |
3cf2715d DE |
381 | return insn_lengths[INSN_UID (insn)]; |
382 | else | |
383 | switch (GET_CODE (insn)) | |
384 | { | |
385 | case NOTE: | |
386 | case BARRIER: | |
387 | case CODE_LABEL: | |
388 | return 0; | |
389 | ||
390 | case CALL_INSN: | |
391 | length = insn_default_length (insn); | |
392 | break; | |
393 | ||
394 | case JUMP_INSN: | |
395 | body = PATTERN (insn); | |
dd3f0101 | 396 | if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC) |
3cf2715d | 397 | { |
fc470718 R |
398 | /* Alignment is machine-dependent and should be handled by |
399 | ADDR_VEC_ALIGN. */ | |
3cf2715d DE |
400 | } |
401 | else | |
402 | length = insn_default_length (insn); | |
403 | break; | |
404 | ||
405 | case INSN: | |
406 | body = PATTERN (insn); | |
407 | if (GET_CODE (body) == USE || GET_CODE (body) == CLOBBER) | |
408 | return 0; | |
409 | ||
410 | else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0) | |
411 | length = asm_insn_count (body) * insn_default_length (insn); | |
412 | else if (GET_CODE (body) == SEQUENCE) | |
413 | for (i = 0; i < XVECLEN (body, 0); i++) | |
414 | length += get_attr_length (XVECEXP (body, 0, i)); | |
415 | else | |
416 | length = insn_default_length (insn); | |
e9a25f70 JL |
417 | break; |
418 | ||
419 | default: | |
420 | break; | |
3cf2715d DE |
421 | } |
422 | ||
423 | #ifdef ADJUST_INSN_LENGTH | |
424 | ADJUST_INSN_LENGTH (insn, length); | |
425 | #endif | |
426 | return length; | |
427 | #else /* not HAVE_ATTR_length */ | |
428 | return 0; | |
429 | #endif /* not HAVE_ATTR_length */ | |
430 | } | |
431 | \f | |
fc470718 R |
432 | /* Code to handle alignment inside shorten_branches. */ |
433 | ||
434 | /* Here is an explanation how the algorithm in align_fuzz can give | |
435 | proper results: | |
436 | ||
437 | Call a sequence of instructions beginning with alignment point X | |
438 | and continuing until the next alignment point `block X'. When `X' | |
f5d927c0 | 439 | is used in an expression, it means the alignment value of the |
fc470718 | 440 | alignment point. |
f5d927c0 | 441 | |
fc470718 R |
442 | Call the distance between the start of the first insn of block X, and |
443 | the end of the last insn of block X `IX', for the `inner size of X'. | |
444 | This is clearly the sum of the instruction lengths. | |
f5d927c0 | 445 | |
fc470718 R |
446 | Likewise with the next alignment-delimited block following X, which we |
447 | shall call block Y. | |
f5d927c0 | 448 | |
fc470718 R |
449 | Call the distance between the start of the first insn of block X, and |
450 | the start of the first insn of block Y `OX', for the `outer size of X'. | |
f5d927c0 | 451 | |
fc470718 | 452 | The estimated padding is then OX - IX. |
f5d927c0 | 453 | |
fc470718 | 454 | OX can be safely estimated as |
f5d927c0 | 455 | |
fc470718 R |
456 | if (X >= Y) |
457 | OX = round_up(IX, Y) | |
458 | else | |
459 | OX = round_up(IX, X) + Y - X | |
f5d927c0 | 460 | |
fc470718 R |
461 | Clearly est(IX) >= real(IX), because that only depends on the |
462 | instruction lengths, and those being overestimated is a given. | |
f5d927c0 | 463 | |
fc470718 R |
464 | Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so |
465 | we needn't worry about that when thinking about OX. | |
f5d927c0 | 466 | |
fc470718 R |
467 | When X >= Y, the alignment provided by Y adds no uncertainty factor |
468 | for branch ranges starting before X, so we can just round what we have. | |
469 | But when X < Y, we don't know anything about the, so to speak, | |
470 | `middle bits', so we have to assume the worst when aligning up from an | |
471 | address mod X to one mod Y, which is Y - X. */ | |
472 | ||
473 | #ifndef LABEL_ALIGN | |
efa3896a | 474 | #define LABEL_ALIGN(LABEL) align_labels_log |
fc470718 R |
475 | #endif |
476 | ||
9e423e6d | 477 | #ifndef LABEL_ALIGN_MAX_SKIP |
2cca7283 | 478 | #define LABEL_ALIGN_MAX_SKIP align_labels_max_skip |
9e423e6d JW |
479 | #endif |
480 | ||
fc470718 | 481 | #ifndef LOOP_ALIGN |
efa3896a | 482 | #define LOOP_ALIGN(LABEL) align_loops_log |
fc470718 R |
483 | #endif |
484 | ||
9e423e6d | 485 | #ifndef LOOP_ALIGN_MAX_SKIP |
2cca7283 | 486 | #define LOOP_ALIGN_MAX_SKIP align_loops_max_skip |
9e423e6d JW |
487 | #endif |
488 | ||
fc470718 | 489 | #ifndef LABEL_ALIGN_AFTER_BARRIER |
340f7e7c | 490 | #define LABEL_ALIGN_AFTER_BARRIER(LABEL) 0 |
fc470718 R |
491 | #endif |
492 | ||
9e423e6d | 493 | #ifndef LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP |
247a370b JH |
494 | #define LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP 0 |
495 | #endif | |
496 | ||
497 | #ifndef JUMP_ALIGN | |
498 | #define JUMP_ALIGN(LABEL) align_jumps_log | |
499 | #endif | |
500 | ||
501 | #ifndef JUMP_ALIGN_MAX_SKIP | |
2cca7283 | 502 | #define JUMP_ALIGN_MAX_SKIP align_jumps_max_skip |
9e423e6d JW |
503 | #endif |
504 | ||
fc470718 | 505 | #ifndef ADDR_VEC_ALIGN |
ca3075bd | 506 | static int |
fc470718 R |
507 | final_addr_vec_align (addr_vec) |
508 | rtx addr_vec; | |
509 | { | |
2a841588 | 510 | int align = GET_MODE_SIZE (GET_MODE (PATTERN (addr_vec))); |
fc470718 R |
511 | |
512 | if (align > BIGGEST_ALIGNMENT / BITS_PER_UNIT) | |
513 | align = BIGGEST_ALIGNMENT / BITS_PER_UNIT; | |
2a841588 | 514 | return exact_log2 (align); |
fc470718 R |
515 | |
516 | } | |
f5d927c0 | 517 | |
fc470718 R |
518 | #define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC) |
519 | #endif | |
520 | ||
521 | #ifndef INSN_LENGTH_ALIGNMENT | |
522 | #define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log | |
523 | #endif | |
524 | ||
fc470718 R |
525 | #define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)]) |
526 | ||
de7987a6 | 527 | static int min_labelno, max_labelno; |
fc470718 R |
528 | |
529 | #define LABEL_TO_ALIGNMENT(LABEL) \ | |
9e423e6d JW |
530 | (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment) |
531 | ||
532 | #define LABEL_TO_MAX_SKIP(LABEL) \ | |
533 | (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip) | |
fc470718 R |
534 | |
535 | /* For the benefit of port specific code do this also as a function. */ | |
f5d927c0 | 536 | |
fc470718 R |
537 | int |
538 | label_to_alignment (label) | |
539 | rtx label; | |
540 | { | |
541 | return LABEL_TO_ALIGNMENT (label); | |
542 | } | |
543 | ||
544 | #ifdef HAVE_ATTR_length | |
545 | /* The differences in addresses | |
546 | between a branch and its target might grow or shrink depending on | |
547 | the alignment the start insn of the range (the branch for a forward | |
548 | branch or the label for a backward branch) starts out on; if these | |
549 | differences are used naively, they can even oscillate infinitely. | |
550 | We therefore want to compute a 'worst case' address difference that | |
551 | is independent of the alignment the start insn of the range end | |
552 | up on, and that is at least as large as the actual difference. | |
553 | The function align_fuzz calculates the amount we have to add to the | |
554 | naively computed difference, by traversing the part of the alignment | |
555 | chain of the start insn of the range that is in front of the end insn | |
556 | of the range, and considering for each alignment the maximum amount | |
557 | that it might contribute to a size increase. | |
558 | ||
559 | For casesi tables, we also want to know worst case minimum amounts of | |
560 | address difference, in case a machine description wants to introduce | |
561 | some common offset that is added to all offsets in a table. | |
d6a7951f | 562 | For this purpose, align_fuzz with a growth argument of 0 computes the |
fc470718 R |
563 | appropriate adjustment. */ |
564 | ||
fc470718 R |
565 | /* Compute the maximum delta by which the difference of the addresses of |
566 | START and END might grow / shrink due to a different address for start | |
567 | which changes the size of alignment insns between START and END. | |
568 | KNOWN_ALIGN_LOG is the alignment known for START. | |
569 | GROWTH should be ~0 if the objective is to compute potential code size | |
570 | increase, and 0 if the objective is to compute potential shrink. | |
571 | The return value is undefined for any other value of GROWTH. */ | |
f5d927c0 | 572 | |
ca3075bd | 573 | static int |
687d0ab6 | 574 | align_fuzz (start, end, known_align_log, growth) |
fc470718 R |
575 | rtx start, end; |
576 | int known_align_log; | |
577 | unsigned growth; | |
578 | { | |
579 | int uid = INSN_UID (start); | |
580 | rtx align_label; | |
581 | int known_align = 1 << known_align_log; | |
582 | int end_shuid = INSN_SHUID (end); | |
583 | int fuzz = 0; | |
584 | ||
585 | for (align_label = uid_align[uid]; align_label; align_label = uid_align[uid]) | |
586 | { | |
587 | int align_addr, new_align; | |
588 | ||
589 | uid = INSN_UID (align_label); | |
9d98a694 | 590 | align_addr = INSN_ADDRESSES (uid) - insn_lengths[uid]; |
fc470718 R |
591 | if (uid_shuid[uid] > end_shuid) |
592 | break; | |
593 | known_align_log = LABEL_TO_ALIGNMENT (align_label); | |
594 | new_align = 1 << known_align_log; | |
595 | if (new_align < known_align) | |
596 | continue; | |
597 | fuzz += (-align_addr ^ growth) & (new_align - known_align); | |
598 | known_align = new_align; | |
599 | } | |
600 | return fuzz; | |
601 | } | |
602 | ||
603 | /* Compute a worst-case reference address of a branch so that it | |
604 | can be safely used in the presence of aligned labels. Since the | |
605 | size of the branch itself is unknown, the size of the branch is | |
606 | not included in the range. I.e. for a forward branch, the reference | |
607 | address is the end address of the branch as known from the previous | |
608 | branch shortening pass, minus a value to account for possible size | |
609 | increase due to alignment. For a backward branch, it is the start | |
610 | address of the branch as known from the current pass, plus a value | |
611 | to account for possible size increase due to alignment. | |
612 | NB.: Therefore, the maximum offset allowed for backward branches needs | |
613 | to exclude the branch size. */ | |
f5d927c0 | 614 | |
fc470718 R |
615 | int |
616 | insn_current_reference_address (branch) | |
617 | rtx branch; | |
618 | { | |
5527bf14 RH |
619 | rtx dest, seq; |
620 | int seq_uid; | |
621 | ||
622 | if (! INSN_ADDRESSES_SET_P ()) | |
623 | return 0; | |
624 | ||
625 | seq = NEXT_INSN (PREV_INSN (branch)); | |
626 | seq_uid = INSN_UID (seq); | |
fc470718 R |
627 | if (GET_CODE (branch) != JUMP_INSN) |
628 | /* This can happen for example on the PA; the objective is to know the | |
629 | offset to address something in front of the start of the function. | |
630 | Thus, we can treat it like a backward branch. | |
631 | We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than | |
632 | any alignment we'd encounter, so we skip the call to align_fuzz. */ | |
633 | return insn_current_address; | |
634 | dest = JUMP_LABEL (branch); | |
5527bf14 | 635 | |
b9f22704 | 636 | /* BRANCH has no proper alignment chain set, so use SEQ. |
afc6898e BS |
637 | BRANCH also has no INSN_SHUID. */ |
638 | if (INSN_SHUID (seq) < INSN_SHUID (dest)) | |
fc470718 | 639 | { |
f5d927c0 | 640 | /* Forward branch. */ |
fc470718 | 641 | return (insn_last_address + insn_lengths[seq_uid] |
26024475 | 642 | - align_fuzz (seq, dest, length_unit_log, ~0)); |
fc470718 R |
643 | } |
644 | else | |
645 | { | |
f5d927c0 | 646 | /* Backward branch. */ |
fc470718 | 647 | return (insn_current_address |
923f7cf9 | 648 | + align_fuzz (dest, seq, length_unit_log, ~0)); |
fc470718 R |
649 | } |
650 | } | |
651 | #endif /* HAVE_ATTR_length */ | |
652 | \f | |
247a370b JH |
653 | void |
654 | compute_alignments () | |
655 | { | |
247a370b | 656 | int log, max_skip, max_log; |
e0082a72 | 657 | basic_block bb; |
247a370b JH |
658 | |
659 | if (label_align) | |
660 | { | |
661 | free (label_align); | |
662 | label_align = 0; | |
663 | } | |
664 | ||
665 | max_labelno = max_label_num (); | |
666 | min_labelno = get_first_label_num (); | |
667 | label_align = (struct label_alignment *) | |
668 | xcalloc (max_labelno - min_labelno + 1, sizeof (struct label_alignment)); | |
669 | ||
670 | /* If not optimizing or optimizing for size, don't assign any alignments. */ | |
ba712955 | 671 | if (! optimize || optimize_size) |
247a370b JH |
672 | return; |
673 | ||
e0082a72 | 674 | FOR_EACH_BB (bb) |
247a370b | 675 | { |
247a370b JH |
676 | rtx label = bb->head; |
677 | int fallthru_frequency = 0, branch_frequency = 0, has_fallthru = 0; | |
678 | edge e; | |
679 | ||
66b4e478 JH |
680 | if (GET_CODE (label) != CODE_LABEL |
681 | || probably_never_executed_bb_p (bb)) | |
247a370b JH |
682 | continue; |
683 | max_log = LABEL_ALIGN (label); | |
684 | max_skip = LABEL_ALIGN_MAX_SKIP; | |
685 | ||
686 | for (e = bb->pred; e; e = e->pred_next) | |
687 | { | |
688 | if (e->flags & EDGE_FALLTHRU) | |
689 | has_fallthru = 1, fallthru_frequency += EDGE_FREQUENCY (e); | |
690 | else | |
691 | branch_frequency += EDGE_FREQUENCY (e); | |
692 | } | |
693 | ||
f63d1bf7 | 694 | /* There are two purposes to align block with no fallthru incoming edge: |
247a370b | 695 | 1) to avoid fetch stalls when branch destination is near cache boundary |
d6a7951f | 696 | 2) to improve cache efficiency in case the previous block is not executed |
247a370b JH |
697 | (so it does not need to be in the cache). |
698 | ||
699 | We to catch first case, we align frequently executed blocks. | |
700 | To catch the second, we align blocks that are executed more frequently | |
eaec9b3d | 701 | than the predecessor and the predecessor is likely to not be executed |
247a370b JH |
702 | when function is called. */ |
703 | ||
704 | if (!has_fallthru | |
705 | && (branch_frequency > BB_FREQ_MAX / 10 | |
f6366fc7 ZD |
706 | || (bb->frequency > bb->prev_bb->frequency * 10 |
707 | && (bb->prev_bb->frequency | |
247a370b JH |
708 | <= ENTRY_BLOCK_PTR->frequency / 2)))) |
709 | { | |
710 | log = JUMP_ALIGN (label); | |
711 | if (max_log < log) | |
712 | { | |
713 | max_log = log; | |
714 | max_skip = JUMP_ALIGN_MAX_SKIP; | |
715 | } | |
716 | } | |
717 | /* In case block is frequent and reached mostly by non-fallthru edge, | |
09da1532 | 718 | align it. It is most likely a first block of loop. */ |
247a370b | 719 | if (has_fallthru |
66b4e478 | 720 | && maybe_hot_bb_p (bb) |
247a370b | 721 | && branch_frequency + fallthru_frequency > BB_FREQ_MAX / 10 |
1877be45 | 722 | && branch_frequency > fallthru_frequency * 2) |
247a370b JH |
723 | { |
724 | log = LOOP_ALIGN (label); | |
725 | if (max_log < log) | |
726 | { | |
727 | max_log = log; | |
728 | max_skip = LOOP_ALIGN_MAX_SKIP; | |
729 | } | |
730 | } | |
731 | LABEL_TO_ALIGNMENT (label) = max_log; | |
732 | LABEL_TO_MAX_SKIP (label) = max_skip; | |
733 | } | |
734 | } | |
735 | \f | |
3cf2715d DE |
736 | /* Make a pass over all insns and compute their actual lengths by shortening |
737 | any branches of variable length if possible. */ | |
738 | ||
739 | /* Give a default value for the lowest address in a function. */ | |
740 | ||
741 | #ifndef FIRST_INSN_ADDRESS | |
742 | #define FIRST_INSN_ADDRESS 0 | |
743 | #endif | |
744 | ||
fc470718 R |
745 | /* shorten_branches might be called multiple times: for example, the SH |
746 | port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG. | |
747 | In order to do this, it needs proper length information, which it obtains | |
748 | by calling shorten_branches. This cannot be collapsed with | |
d6a7951f | 749 | shorten_branches itself into a single pass unless we also want to integrate |
fc470718 R |
750 | reorg.c, since the branch splitting exposes new instructions with delay |
751 | slots. */ | |
752 | ||
3cf2715d DE |
753 | void |
754 | shorten_branches (first) | |
7bdb32b9 | 755 | rtx first ATTRIBUTE_UNUSED; |
3cf2715d | 756 | { |
3cf2715d | 757 | rtx insn; |
fc470718 R |
758 | int max_uid; |
759 | int i; | |
fc470718 | 760 | int max_log; |
9e423e6d | 761 | int max_skip; |
fc470718 R |
762 | #ifdef HAVE_ATTR_length |
763 | #define MAX_CODE_ALIGN 16 | |
764 | rtx seq; | |
3cf2715d | 765 | int something_changed = 1; |
3cf2715d DE |
766 | char *varying_length; |
767 | rtx body; | |
768 | int uid; | |
fc470718 | 769 | rtx align_tab[MAX_CODE_ALIGN]; |
3cf2715d | 770 | |
fc470718 | 771 | #endif |
3d14e82f | 772 | |
3446405d JH |
773 | /* Compute maximum UID and allocate label_align / uid_shuid. */ |
774 | max_uid = get_max_uid (); | |
d9b6874b | 775 | |
3446405d | 776 | uid_shuid = (int *) xmalloc (max_uid * sizeof *uid_shuid); |
25e22dc0 | 777 | |
247a370b JH |
778 | if (max_labelno != max_label_num ()) |
779 | { | |
780 | int old = max_labelno; | |
781 | int n_labels; | |
782 | int n_old_labels; | |
783 | ||
784 | max_labelno = max_label_num (); | |
785 | ||
786 | n_labels = max_labelno - min_labelno + 1; | |
787 | n_old_labels = old - min_labelno + 1; | |
788 | ||
789 | label_align = (struct label_alignment *) xrealloc | |
790 | (label_align, n_labels * sizeof (struct label_alignment)); | |
791 | ||
792 | /* Range of labels grows monotonically in the function. Abort here | |
793 | means that the initialization of array got lost. */ | |
794 | if (n_old_labels > n_labels) | |
795 | abort (); | |
796 | ||
797 | memset (label_align + n_old_labels, 0, | |
798 | (n_labels - n_old_labels) * sizeof (struct label_alignment)); | |
799 | } | |
800 | ||
fc470718 R |
801 | /* Initialize label_align and set up uid_shuid to be strictly |
802 | monotonically rising with insn order. */ | |
e2faec75 R |
803 | /* We use max_log here to keep track of the maximum alignment we want to |
804 | impose on the next CODE_LABEL (or the current one if we are processing | |
805 | the CODE_LABEL itself). */ | |
f5d927c0 | 806 | |
9e423e6d JW |
807 | max_log = 0; |
808 | max_skip = 0; | |
809 | ||
810 | for (insn = get_insns (), i = 1; insn; insn = NEXT_INSN (insn)) | |
fc470718 R |
811 | { |
812 | int log; | |
813 | ||
814 | INSN_SHUID (insn) = i++; | |
2c3c49de | 815 | if (INSN_P (insn)) |
e2faec75 R |
816 | { |
817 | /* reorg might make the first insn of a loop being run once only, | |
818 | and delete the label in front of it. Then we want to apply | |
819 | the loop alignment to the new label created by reorg, which | |
820 | is separated by the former loop start insn from the | |
821 | NOTE_INSN_LOOP_BEG. */ | |
822 | } | |
fc470718 R |
823 | else if (GET_CODE (insn) == CODE_LABEL) |
824 | { | |
825 | rtx next; | |
ff81832f | 826 | |
247a370b JH |
827 | /* Merge in alignments computed by compute_alignments. */ |
828 | log = LABEL_TO_ALIGNMENT (insn); | |
829 | if (max_log < log) | |
830 | { | |
831 | max_log = log; | |
832 | max_skip = LABEL_TO_MAX_SKIP (insn); | |
833 | } | |
fc470718 R |
834 | |
835 | log = LABEL_ALIGN (insn); | |
836 | if (max_log < log) | |
9e423e6d JW |
837 | { |
838 | max_log = log; | |
839 | max_skip = LABEL_ALIGN_MAX_SKIP; | |
840 | } | |
fc470718 | 841 | next = NEXT_INSN (insn); |
75197b37 BS |
842 | /* ADDR_VECs only take room if read-only data goes into the text |
843 | section. */ | |
d48bc59a | 844 | if (JUMP_TABLES_IN_TEXT_SECTION || !HAVE_READONLY_DATA_SECTION) |
75197b37 BS |
845 | if (next && GET_CODE (next) == JUMP_INSN) |
846 | { | |
847 | rtx nextbody = PATTERN (next); | |
848 | if (GET_CODE (nextbody) == ADDR_VEC | |
849 | || GET_CODE (nextbody) == ADDR_DIFF_VEC) | |
850 | { | |
851 | log = ADDR_VEC_ALIGN (next); | |
852 | if (max_log < log) | |
853 | { | |
854 | max_log = log; | |
855 | max_skip = LABEL_ALIGN_MAX_SKIP; | |
856 | } | |
857 | } | |
858 | } | |
fc470718 | 859 | LABEL_TO_ALIGNMENT (insn) = max_log; |
9e423e6d | 860 | LABEL_TO_MAX_SKIP (insn) = max_skip; |
fc470718 | 861 | max_log = 0; |
9e423e6d | 862 | max_skip = 0; |
fc470718 R |
863 | } |
864 | else if (GET_CODE (insn) == BARRIER) | |
865 | { | |
866 | rtx label; | |
867 | ||
2c3c49de | 868 | for (label = insn; label && ! INSN_P (label); |
fc470718 R |
869 | label = NEXT_INSN (label)) |
870 | if (GET_CODE (label) == CODE_LABEL) | |
871 | { | |
872 | log = LABEL_ALIGN_AFTER_BARRIER (insn); | |
873 | if (max_log < log) | |
9e423e6d JW |
874 | { |
875 | max_log = log; | |
876 | max_skip = LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP; | |
877 | } | |
fc470718 R |
878 | break; |
879 | } | |
880 | } | |
fc470718 R |
881 | } |
882 | #ifdef HAVE_ATTR_length | |
883 | ||
884 | /* Allocate the rest of the arrays. */ | |
addd7df6 | 885 | insn_lengths = (int *) xmalloc (max_uid * sizeof (*insn_lengths)); |
ea3cbda5 | 886 | insn_lengths_max_uid = max_uid; |
af035616 R |
887 | /* Syntax errors can lead to labels being outside of the main insn stream. |
888 | Initialize insn_addresses, so that we get reproducible results. */ | |
9d98a694 | 889 | INSN_ADDRESSES_ALLOC (max_uid); |
fc470718 | 890 | |
3de90026 | 891 | varying_length = (char *) xcalloc (max_uid, sizeof (char)); |
fc470718 R |
892 | |
893 | /* Initialize uid_align. We scan instructions | |
894 | from end to start, and keep in align_tab[n] the last seen insn | |
895 | that does an alignment of at least n+1, i.e. the successor | |
896 | in the alignment chain for an insn that does / has a known | |
897 | alignment of n. */ | |
3de90026 | 898 | uid_align = (rtx *) xcalloc (max_uid, sizeof *uid_align); |
fc470718 | 899 | |
f5d927c0 | 900 | for (i = MAX_CODE_ALIGN; --i >= 0;) |
fc470718 R |
901 | align_tab[i] = NULL_RTX; |
902 | seq = get_last_insn (); | |
33f7f353 | 903 | for (; seq; seq = PREV_INSN (seq)) |
fc470718 R |
904 | { |
905 | int uid = INSN_UID (seq); | |
906 | int log; | |
fc470718 R |
907 | log = (GET_CODE (seq) == CODE_LABEL ? LABEL_TO_ALIGNMENT (seq) : 0); |
908 | uid_align[uid] = align_tab[0]; | |
fc470718 R |
909 | if (log) |
910 | { | |
911 | /* Found an alignment label. */ | |
912 | uid_align[uid] = align_tab[log]; | |
913 | for (i = log - 1; i >= 0; i--) | |
914 | align_tab[i] = seq; | |
915 | } | |
33f7f353 JR |
916 | } |
917 | #ifdef CASE_VECTOR_SHORTEN_MODE | |
918 | if (optimize) | |
919 | { | |
920 | /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum | |
921 | label fields. */ | |
922 | ||
923 | int min_shuid = INSN_SHUID (get_insns ()) - 1; | |
924 | int max_shuid = INSN_SHUID (get_last_insn ()) + 1; | |
925 | int rel; | |
926 | ||
927 | for (insn = first; insn != 0; insn = NEXT_INSN (insn)) | |
fc470718 | 928 | { |
33f7f353 JR |
929 | rtx min_lab = NULL_RTX, max_lab = NULL_RTX, pat; |
930 | int len, i, min, max, insn_shuid; | |
931 | int min_align; | |
932 | addr_diff_vec_flags flags; | |
933 | ||
934 | if (GET_CODE (insn) != JUMP_INSN | |
935 | || GET_CODE (PATTERN (insn)) != ADDR_DIFF_VEC) | |
936 | continue; | |
937 | pat = PATTERN (insn); | |
938 | len = XVECLEN (pat, 1); | |
939 | if (len <= 0) | |
940 | abort (); | |
941 | min_align = MAX_CODE_ALIGN; | |
942 | for (min = max_shuid, max = min_shuid, i = len - 1; i >= 0; i--) | |
943 | { | |
944 | rtx lab = XEXP (XVECEXP (pat, 1, i), 0); | |
945 | int shuid = INSN_SHUID (lab); | |
946 | if (shuid < min) | |
947 | { | |
948 | min = shuid; | |
949 | min_lab = lab; | |
950 | } | |
951 | if (shuid > max) | |
952 | { | |
953 | max = shuid; | |
954 | max_lab = lab; | |
955 | } | |
956 | if (min_align > LABEL_TO_ALIGNMENT (lab)) | |
957 | min_align = LABEL_TO_ALIGNMENT (lab); | |
958 | } | |
959 | XEXP (pat, 2) = gen_rtx_LABEL_REF (VOIDmode, min_lab); | |
960 | XEXP (pat, 3) = gen_rtx_LABEL_REF (VOIDmode, max_lab); | |
961 | insn_shuid = INSN_SHUID (insn); | |
962 | rel = INSN_SHUID (XEXP (XEXP (pat, 0), 0)); | |
963 | flags.min_align = min_align; | |
964 | flags.base_after_vec = rel > insn_shuid; | |
965 | flags.min_after_vec = min > insn_shuid; | |
966 | flags.max_after_vec = max > insn_shuid; | |
967 | flags.min_after_base = min > rel; | |
968 | flags.max_after_base = max > rel; | |
969 | ADDR_DIFF_VEC_FLAGS (pat) = flags; | |
fc470718 R |
970 | } |
971 | } | |
33f7f353 | 972 | #endif /* CASE_VECTOR_SHORTEN_MODE */ |
3cf2715d | 973 | |
3cf2715d DE |
974 | /* Compute initial lengths, addresses, and varying flags for each insn. */ |
975 | for (insn_current_address = FIRST_INSN_ADDRESS, insn = first; | |
976 | insn != 0; | |
977 | insn_current_address += insn_lengths[uid], insn = NEXT_INSN (insn)) | |
978 | { | |
979 | uid = INSN_UID (insn); | |
fc470718 | 980 | |
3cf2715d | 981 | insn_lengths[uid] = 0; |
fc470718 R |
982 | |
983 | if (GET_CODE (insn) == CODE_LABEL) | |
984 | { | |
985 | int log = LABEL_TO_ALIGNMENT (insn); | |
986 | if (log) | |
987 | { | |
988 | int align = 1 << log; | |
ecb06768 | 989 | int new_address = (insn_current_address + align - 1) & -align; |
fc470718 | 990 | insn_lengths[uid] = new_address - insn_current_address; |
fc470718 R |
991 | } |
992 | } | |
993 | ||
5a09edba | 994 | INSN_ADDRESSES (uid) = insn_current_address + insn_lengths[uid]; |
f5d927c0 | 995 | |
3cf2715d DE |
996 | if (GET_CODE (insn) == NOTE || GET_CODE (insn) == BARRIER |
997 | || GET_CODE (insn) == CODE_LABEL) | |
998 | continue; | |
04da53bd R |
999 | if (INSN_DELETED_P (insn)) |
1000 | continue; | |
3cf2715d DE |
1001 | |
1002 | body = PATTERN (insn); | |
1003 | if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC) | |
5a32a90c JR |
1004 | { |
1005 | /* This only takes room if read-only data goes into the text | |
1006 | section. */ | |
d48bc59a | 1007 | if (JUMP_TABLES_IN_TEXT_SECTION || !HAVE_READONLY_DATA_SECTION) |
75197b37 BS |
1008 | insn_lengths[uid] = (XVECLEN (body, |
1009 | GET_CODE (body) == ADDR_DIFF_VEC) | |
1010 | * GET_MODE_SIZE (GET_MODE (body))); | |
5a32a90c | 1011 | /* Alignment is handled by ADDR_VEC_ALIGN. */ |
5a32a90c | 1012 | } |
a30caf5c | 1013 | else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0) |
3cf2715d DE |
1014 | insn_lengths[uid] = asm_insn_count (body) * insn_default_length (insn); |
1015 | else if (GET_CODE (body) == SEQUENCE) | |
1016 | { | |
1017 | int i; | |
1018 | int const_delay_slots; | |
1019 | #ifdef DELAY_SLOTS | |
1020 | const_delay_slots = const_num_delay_slots (XVECEXP (body, 0, 0)); | |
1021 | #else | |
1022 | const_delay_slots = 0; | |
1023 | #endif | |
1024 | /* Inside a delay slot sequence, we do not do any branch shortening | |
1025 | if the shortening could change the number of delay slots | |
0f41302f | 1026 | of the branch. */ |
3cf2715d DE |
1027 | for (i = 0; i < XVECLEN (body, 0); i++) |
1028 | { | |
1029 | rtx inner_insn = XVECEXP (body, 0, i); | |
1030 | int inner_uid = INSN_UID (inner_insn); | |
1031 | int inner_length; | |
1032 | ||
a30caf5c DC |
1033 | if (GET_CODE (body) == ASM_INPUT |
1034 | || asm_noperands (PATTERN (XVECEXP (body, 0, i))) >= 0) | |
3cf2715d DE |
1035 | inner_length = (asm_insn_count (PATTERN (inner_insn)) |
1036 | * insn_default_length (inner_insn)); | |
1037 | else | |
1038 | inner_length = insn_default_length (inner_insn); | |
f5d927c0 | 1039 | |
3cf2715d DE |
1040 | insn_lengths[inner_uid] = inner_length; |
1041 | if (const_delay_slots) | |
1042 | { | |
1043 | if ((varying_length[inner_uid] | |
1044 | = insn_variable_length_p (inner_insn)) != 0) | |
1045 | varying_length[uid] = 1; | |
9d98a694 AO |
1046 | INSN_ADDRESSES (inner_uid) = (insn_current_address |
1047 | + insn_lengths[uid]); | |
3cf2715d DE |
1048 | } |
1049 | else | |
1050 | varying_length[inner_uid] = 0; | |
1051 | insn_lengths[uid] += inner_length; | |
1052 | } | |
1053 | } | |
1054 | else if (GET_CODE (body) != USE && GET_CODE (body) != CLOBBER) | |
1055 | { | |
1056 | insn_lengths[uid] = insn_default_length (insn); | |
1057 | varying_length[uid] = insn_variable_length_p (insn); | |
1058 | } | |
1059 | ||
1060 | /* If needed, do any adjustment. */ | |
1061 | #ifdef ADJUST_INSN_LENGTH | |
1062 | ADJUST_INSN_LENGTH (insn, insn_lengths[uid]); | |
04b6000c | 1063 | if (insn_lengths[uid] < 0) |
c725bd79 | 1064 | fatal_insn ("negative insn length", insn); |
3cf2715d DE |
1065 | #endif |
1066 | } | |
1067 | ||
1068 | /* Now loop over all the insns finding varying length insns. For each, | |
1069 | get the current insn length. If it has changed, reflect the change. | |
1070 | When nothing changes for a full pass, we are done. */ | |
1071 | ||
1072 | while (something_changed) | |
1073 | { | |
1074 | something_changed = 0; | |
fc470718 | 1075 | insn_current_align = MAX_CODE_ALIGN - 1; |
3cf2715d DE |
1076 | for (insn_current_address = FIRST_INSN_ADDRESS, insn = first; |
1077 | insn != 0; | |
1078 | insn = NEXT_INSN (insn)) | |
1079 | { | |
1080 | int new_length; | |
b729186a | 1081 | #ifdef ADJUST_INSN_LENGTH |
3cf2715d | 1082 | int tmp_length; |
b729186a | 1083 | #endif |
fc470718 | 1084 | int length_align; |
3cf2715d DE |
1085 | |
1086 | uid = INSN_UID (insn); | |
fc470718 R |
1087 | |
1088 | if (GET_CODE (insn) == CODE_LABEL) | |
1089 | { | |
1090 | int log = LABEL_TO_ALIGNMENT (insn); | |
1091 | if (log > insn_current_align) | |
1092 | { | |
1093 | int align = 1 << log; | |
ecb06768 | 1094 | int new_address= (insn_current_address + align - 1) & -align; |
fc470718 R |
1095 | insn_lengths[uid] = new_address - insn_current_address; |
1096 | insn_current_align = log; | |
1097 | insn_current_address = new_address; | |
1098 | } | |
1099 | else | |
1100 | insn_lengths[uid] = 0; | |
9d98a694 | 1101 | INSN_ADDRESSES (uid) = insn_current_address; |
fc470718 R |
1102 | continue; |
1103 | } | |
1104 | ||
1105 | length_align = INSN_LENGTH_ALIGNMENT (insn); | |
1106 | if (length_align < insn_current_align) | |
1107 | insn_current_align = length_align; | |
1108 | ||
9d98a694 AO |
1109 | insn_last_address = INSN_ADDRESSES (uid); |
1110 | INSN_ADDRESSES (uid) = insn_current_address; | |
fc470718 | 1111 | |
5e75ef4a | 1112 | #ifdef CASE_VECTOR_SHORTEN_MODE |
33f7f353 JR |
1113 | if (optimize && GET_CODE (insn) == JUMP_INSN |
1114 | && GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC) | |
1115 | { | |
33f7f353 JR |
1116 | rtx body = PATTERN (insn); |
1117 | int old_length = insn_lengths[uid]; | |
1118 | rtx rel_lab = XEXP (XEXP (body, 0), 0); | |
1119 | rtx min_lab = XEXP (XEXP (body, 2), 0); | |
1120 | rtx max_lab = XEXP (XEXP (body, 3), 0); | |
9d98a694 AO |
1121 | int rel_addr = INSN_ADDRESSES (INSN_UID (rel_lab)); |
1122 | int min_addr = INSN_ADDRESSES (INSN_UID (min_lab)); | |
1123 | int max_addr = INSN_ADDRESSES (INSN_UID (max_lab)); | |
33f7f353 JR |
1124 | rtx prev; |
1125 | int rel_align = 0; | |
950a3816 KG |
1126 | addr_diff_vec_flags flags; |
1127 | ||
1128 | /* Avoid automatic aggregate initialization. */ | |
1129 | flags = ADDR_DIFF_VEC_FLAGS (body); | |
33f7f353 JR |
1130 | |
1131 | /* Try to find a known alignment for rel_lab. */ | |
1132 | for (prev = rel_lab; | |
1133 | prev | |
1134 | && ! insn_lengths[INSN_UID (prev)] | |
1135 | && ! (varying_length[INSN_UID (prev)] & 1); | |
1136 | prev = PREV_INSN (prev)) | |
1137 | if (varying_length[INSN_UID (prev)] & 2) | |
1138 | { | |
1139 | rel_align = LABEL_TO_ALIGNMENT (prev); | |
1140 | break; | |
1141 | } | |
1142 | ||
1143 | /* See the comment on addr_diff_vec_flags in rtl.h for the | |
1144 | meaning of the flags values. base: REL_LAB vec: INSN */ | |
1145 | /* Anything after INSN has still addresses from the last | |
1146 | pass; adjust these so that they reflect our current | |
1147 | estimate for this pass. */ | |
1148 | if (flags.base_after_vec) | |
1149 | rel_addr += insn_current_address - insn_last_address; | |
1150 | if (flags.min_after_vec) | |
1151 | min_addr += insn_current_address - insn_last_address; | |
1152 | if (flags.max_after_vec) | |
1153 | max_addr += insn_current_address - insn_last_address; | |
1154 | /* We want to know the worst case, i.e. lowest possible value | |
1155 | for the offset of MIN_LAB. If MIN_LAB is after REL_LAB, | |
1156 | its offset is positive, and we have to be wary of code shrink; | |
1157 | otherwise, it is negative, and we have to be vary of code | |
1158 | size increase. */ | |
1159 | if (flags.min_after_base) | |
1160 | { | |
1161 | /* If INSN is between REL_LAB and MIN_LAB, the size | |
1162 | changes we are about to make can change the alignment | |
1163 | within the observed offset, therefore we have to break | |
1164 | it up into two parts that are independent. */ | |
1165 | if (! flags.base_after_vec && flags.min_after_vec) | |
1166 | { | |
1167 | min_addr -= align_fuzz (rel_lab, insn, rel_align, 0); | |
1168 | min_addr -= align_fuzz (insn, min_lab, 0, 0); | |
1169 | } | |
1170 | else | |
1171 | min_addr -= align_fuzz (rel_lab, min_lab, rel_align, 0); | |
1172 | } | |
1173 | else | |
1174 | { | |
1175 | if (flags.base_after_vec && ! flags.min_after_vec) | |
1176 | { | |
1177 | min_addr -= align_fuzz (min_lab, insn, 0, ~0); | |
1178 | min_addr -= align_fuzz (insn, rel_lab, 0, ~0); | |
1179 | } | |
1180 | else | |
1181 | min_addr -= align_fuzz (min_lab, rel_lab, 0, ~0); | |
1182 | } | |
1183 | /* Likewise, determine the highest lowest possible value | |
1184 | for the offset of MAX_LAB. */ | |
1185 | if (flags.max_after_base) | |
1186 | { | |
1187 | if (! flags.base_after_vec && flags.max_after_vec) | |
1188 | { | |
1189 | max_addr += align_fuzz (rel_lab, insn, rel_align, ~0); | |
1190 | max_addr += align_fuzz (insn, max_lab, 0, ~0); | |
1191 | } | |
1192 | else | |
1193 | max_addr += align_fuzz (rel_lab, max_lab, rel_align, ~0); | |
1194 | } | |
1195 | else | |
1196 | { | |
1197 | if (flags.base_after_vec && ! flags.max_after_vec) | |
1198 | { | |
1199 | max_addr += align_fuzz (max_lab, insn, 0, 0); | |
1200 | max_addr += align_fuzz (insn, rel_lab, 0, 0); | |
1201 | } | |
1202 | else | |
1203 | max_addr += align_fuzz (max_lab, rel_lab, 0, 0); | |
1204 | } | |
1205 | PUT_MODE (body, CASE_VECTOR_SHORTEN_MODE (min_addr - rel_addr, | |
1206 | max_addr - rel_addr, | |
1207 | body)); | |
d48bc59a | 1208 | if (JUMP_TABLES_IN_TEXT_SECTION || !HAVE_READONLY_DATA_SECTION) |
75197b37 BS |
1209 | { |
1210 | insn_lengths[uid] | |
1211 | = (XVECLEN (body, 1) * GET_MODE_SIZE (GET_MODE (body))); | |
1212 | insn_current_address += insn_lengths[uid]; | |
1213 | if (insn_lengths[uid] != old_length) | |
1214 | something_changed = 1; | |
1215 | } | |
1216 | ||
33f7f353 | 1217 | continue; |
33f7f353 | 1218 | } |
5e75ef4a JL |
1219 | #endif /* CASE_VECTOR_SHORTEN_MODE */ |
1220 | ||
1221 | if (! (varying_length[uid])) | |
3cf2715d | 1222 | { |
674fc07d GS |
1223 | if (GET_CODE (insn) == INSN |
1224 | && GET_CODE (PATTERN (insn)) == SEQUENCE) | |
1225 | { | |
1226 | int i; | |
1227 | ||
1228 | body = PATTERN (insn); | |
1229 | for (i = 0; i < XVECLEN (body, 0); i++) | |
1230 | { | |
1231 | rtx inner_insn = XVECEXP (body, 0, i); | |
1232 | int inner_uid = INSN_UID (inner_insn); | |
1233 | ||
1234 | INSN_ADDRESSES (inner_uid) = insn_current_address; | |
1235 | ||
1236 | insn_current_address += insn_lengths[inner_uid]; | |
1237 | } | |
dd3f0101 | 1238 | } |
674fc07d GS |
1239 | else |
1240 | insn_current_address += insn_lengths[uid]; | |
1241 | ||
3cf2715d DE |
1242 | continue; |
1243 | } | |
674fc07d | 1244 | |
3cf2715d DE |
1245 | if (GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE) |
1246 | { | |
1247 | int i; | |
f5d927c0 | 1248 | |
3cf2715d DE |
1249 | body = PATTERN (insn); |
1250 | new_length = 0; | |
1251 | for (i = 0; i < XVECLEN (body, 0); i++) | |
1252 | { | |
1253 | rtx inner_insn = XVECEXP (body, 0, i); | |
1254 | int inner_uid = INSN_UID (inner_insn); | |
1255 | int inner_length; | |
1256 | ||
9d98a694 | 1257 | INSN_ADDRESSES (inner_uid) = insn_current_address; |
3cf2715d DE |
1258 | |
1259 | /* insn_current_length returns 0 for insns with a | |
1260 | non-varying length. */ | |
1261 | if (! varying_length[inner_uid]) | |
1262 | inner_length = insn_lengths[inner_uid]; | |
1263 | else | |
1264 | inner_length = insn_current_length (inner_insn); | |
1265 | ||
1266 | if (inner_length != insn_lengths[inner_uid]) | |
1267 | { | |
1268 | insn_lengths[inner_uid] = inner_length; | |
1269 | something_changed = 1; | |
1270 | } | |
1271 | insn_current_address += insn_lengths[inner_uid]; | |
1272 | new_length += inner_length; | |
1273 | } | |
1274 | } | |
1275 | else | |
1276 | { | |
1277 | new_length = insn_current_length (insn); | |
1278 | insn_current_address += new_length; | |
1279 | } | |
1280 | ||
3cf2715d DE |
1281 | #ifdef ADJUST_INSN_LENGTH |
1282 | /* If needed, do any adjustment. */ | |
1283 | tmp_length = new_length; | |
1284 | ADJUST_INSN_LENGTH (insn, new_length); | |
1285 | insn_current_address += (new_length - tmp_length); | |
3cf2715d DE |
1286 | #endif |
1287 | ||
1288 | if (new_length != insn_lengths[uid]) | |
1289 | { | |
1290 | insn_lengths[uid] = new_length; | |
1291 | something_changed = 1; | |
1292 | } | |
1293 | } | |
bb4aaf18 TG |
1294 | /* For a non-optimizing compile, do only a single pass. */ |
1295 | if (!optimize) | |
1296 | break; | |
3cf2715d | 1297 | } |
fc470718 R |
1298 | |
1299 | free (varying_length); | |
1300 | ||
3cf2715d DE |
1301 | #endif /* HAVE_ATTR_length */ |
1302 | } | |
1303 | ||
1304 | #ifdef HAVE_ATTR_length | |
1305 | /* Given the body of an INSN known to be generated by an ASM statement, return | |
1306 | the number of machine instructions likely to be generated for this insn. | |
1307 | This is used to compute its length. */ | |
1308 | ||
1309 | static int | |
1310 | asm_insn_count (body) | |
1311 | rtx body; | |
1312 | { | |
3cce094d | 1313 | const char *template; |
3cf2715d DE |
1314 | int count = 1; |
1315 | ||
5d0930ea DE |
1316 | if (GET_CODE (body) == ASM_INPUT) |
1317 | template = XSTR (body, 0); | |
1318 | else | |
df4ae160 | 1319 | template = decode_asm_operands (body, NULL, NULL, NULL, NULL); |
5d0930ea | 1320 | |
f5d927c0 KH |
1321 | for (; *template; template++) |
1322 | if (IS_ASM_LOGICAL_LINE_SEPARATOR (*template) || *template == '\n') | |
3cf2715d DE |
1323 | count++; |
1324 | ||
1325 | return count; | |
1326 | } | |
1327 | #endif | |
1328 | \f | |
1329 | /* Output assembler code for the start of a function, | |
1330 | and initialize some of the variables in this file | |
1331 | for the new function. The label for the function and associated | |
1332 | assembler pseudo-ops have already been output in `assemble_start_function'. | |
1333 | ||
1334 | FIRST is the first insn of the rtl for the function being compiled. | |
1335 | FILE is the file to write assembler code to. | |
1336 | OPTIMIZE is nonzero if we should eliminate redundant | |
1337 | test and compare insns. */ | |
1338 | ||
1339 | void | |
1340 | final_start_function (first, file, optimize) | |
1341 | rtx first; | |
1342 | FILE *file; | |
6a651371 | 1343 | int optimize ATTRIBUTE_UNUSED; |
3cf2715d DE |
1344 | { |
1345 | block_depth = 0; | |
1346 | ||
1347 | this_is_asm_operands = 0; | |
1348 | ||
1349 | #ifdef NON_SAVING_SETJMP | |
1350 | /* A function that calls setjmp should save and restore all the | |
1351 | call-saved registers on a system where longjmp clobbers them. */ | |
1352 | if (NON_SAVING_SETJMP && current_function_calls_setjmp) | |
1353 | { | |
1354 | int i; | |
1355 | ||
1356 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
252f342a | 1357 | if (!call_used_regs[i]) |
3cf2715d DE |
1358 | regs_ever_live[i] = 1; |
1359 | } | |
1360 | #endif | |
f5d927c0 | 1361 | |
3cf2715d | 1362 | if (NOTE_LINE_NUMBER (first) != NOTE_INSN_DELETED) |
653e276c NB |
1363 | notice_source_line (first); |
1364 | high_block_linenum = high_function_linenum = last_linenum; | |
eac40081 | 1365 | |
653e276c | 1366 | (*debug_hooks->begin_prologue) (last_linenum, last_filename); |
d291dd49 | 1367 | |
653e276c | 1368 | #if defined (DWARF2_UNWIND_INFO) || defined (IA64_UNWIND_INFO) |
7a0c8d71 | 1369 | if (write_symbols != DWARF2_DEBUG && write_symbols != VMS_AND_DWARF2_DEBUG) |
653e276c | 1370 | dwarf2out_begin_prologue (0, NULL); |
f5d927c0 | 1371 | #endif |
3cf2715d DE |
1372 | |
1373 | #ifdef LEAF_REG_REMAP | |
54ff41b7 | 1374 | if (current_function_uses_only_leaf_regs) |
3cf2715d DE |
1375 | leaf_renumber_regs (first); |
1376 | #endif | |
1377 | ||
1378 | /* The Sun386i and perhaps other machines don't work right | |
1379 | if the profiling code comes after the prologue. */ | |
1380 | #ifdef PROFILE_BEFORE_PROLOGUE | |
70f4f91c | 1381 | if (current_function_profile) |
3cf2715d DE |
1382 | profile_function (file); |
1383 | #endif /* PROFILE_BEFORE_PROLOGUE */ | |
1384 | ||
0021b564 JM |
1385 | #if defined (DWARF2_UNWIND_INFO) && defined (HAVE_prologue) |
1386 | if (dwarf2out_do_frame ()) | |
1387 | dwarf2out_frame_debug (NULL_RTX); | |
1388 | #endif | |
1389 | ||
18c038b9 MM |
1390 | /* If debugging, assign block numbers to all of the blocks in this |
1391 | function. */ | |
1392 | if (write_symbols) | |
1393 | { | |
3ac79482 | 1394 | remove_unnecessary_notes (); |
ba4f7968 | 1395 | scope_to_insns_finalize (); |
a20612aa | 1396 | number_blocks (current_function_decl); |
18c038b9 MM |
1397 | /* We never actually put out begin/end notes for the top-level |
1398 | block in the function. But, conceptually, that block is | |
1399 | always needed. */ | |
1400 | TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl)) = 1; | |
1401 | } | |
1402 | ||
3cf2715d | 1403 | /* First output the function prologue: code to set up the stack frame. */ |
f6897b10 | 1404 | (*targetm.asm_out.function_prologue) (file, get_frame_size ()); |
3cf2715d | 1405 | |
3cf2715d DE |
1406 | /* If the machine represents the prologue as RTL, the profiling code must |
1407 | be emitted when NOTE_INSN_PROLOGUE_END is scanned. */ | |
1408 | #ifdef HAVE_prologue | |
1409 | if (! HAVE_prologue) | |
1410 | #endif | |
1411 | profile_after_prologue (file); | |
3cf2715d DE |
1412 | } |
1413 | ||
1414 | static void | |
1415 | profile_after_prologue (file) | |
7bdb32b9 | 1416 | FILE *file ATTRIBUTE_UNUSED; |
3cf2715d | 1417 | { |
3cf2715d | 1418 | #ifndef PROFILE_BEFORE_PROLOGUE |
70f4f91c | 1419 | if (current_function_profile) |
3cf2715d DE |
1420 | profile_function (file); |
1421 | #endif /* not PROFILE_BEFORE_PROLOGUE */ | |
1422 | } | |
1423 | ||
1424 | static void | |
1425 | profile_function (file) | |
b3656137 | 1426 | FILE *file ATTRIBUTE_UNUSED; |
3cf2715d | 1427 | { |
dcacfa04 | 1428 | #ifndef NO_PROFILE_COUNTERS |
9e2f9a7f | 1429 | int align = MIN (BIGGEST_ALIGNMENT, LONG_TYPE_SIZE); |
dcacfa04 | 1430 | #endif |
b729186a JL |
1431 | #if defined(ASM_OUTPUT_REG_PUSH) |
1432 | #if defined(STRUCT_VALUE_INCOMING_REGNUM) || defined(STRUCT_VALUE_REGNUM) | |
3cf2715d | 1433 | int sval = current_function_returns_struct; |
b729186a JL |
1434 | #endif |
1435 | #if defined(STATIC_CHAIN_INCOMING_REGNUM) || defined(STATIC_CHAIN_REGNUM) | |
3cf2715d | 1436 | int cxt = current_function_needs_context; |
b729186a JL |
1437 | #endif |
1438 | #endif /* ASM_OUTPUT_REG_PUSH */ | |
3cf2715d | 1439 | |
dcacfa04 | 1440 | #ifndef NO_PROFILE_COUNTERS |
3cf2715d DE |
1441 | data_section (); |
1442 | ASM_OUTPUT_ALIGN (file, floor_log2 (align / BITS_PER_UNIT)); | |
4977bab6 | 1443 | (*targetm.asm_out.internal_label) (file, "LP", current_function_funcdef_no); |
c8af3574 | 1444 | assemble_integer (const0_rtx, LONG_TYPE_SIZE / BITS_PER_UNIT, align, 1); |
dcacfa04 | 1445 | #endif |
3cf2715d | 1446 | |
499df339 | 1447 | function_section (current_function_decl); |
3cf2715d | 1448 | |
65ed39df | 1449 | #if defined(STRUCT_VALUE_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH) |
3cf2715d DE |
1450 | if (sval) |
1451 | ASM_OUTPUT_REG_PUSH (file, STRUCT_VALUE_INCOMING_REGNUM); | |
1452 | #else | |
65ed39df | 1453 | #if defined(STRUCT_VALUE_REGNUM) && defined(ASM_OUTPUT_REG_PUSH) |
3cf2715d | 1454 | if (sval) |
51723711 KG |
1455 | { |
1456 | ASM_OUTPUT_REG_PUSH (file, STRUCT_VALUE_REGNUM); | |
1457 | } | |
3cf2715d DE |
1458 | #endif |
1459 | #endif | |
1460 | ||
65ed39df | 1461 | #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH) |
3cf2715d DE |
1462 | if (cxt) |
1463 | ASM_OUTPUT_REG_PUSH (file, STATIC_CHAIN_INCOMING_REGNUM); | |
1464 | #else | |
65ed39df | 1465 | #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH) |
3cf2715d | 1466 | if (cxt) |
51723711 KG |
1467 | { |
1468 | ASM_OUTPUT_REG_PUSH (file, STATIC_CHAIN_REGNUM); | |
1469 | } | |
3cf2715d DE |
1470 | #endif |
1471 | #endif | |
3cf2715d | 1472 | |
df696a75 | 1473 | FUNCTION_PROFILER (file, current_function_funcdef_no); |
3cf2715d | 1474 | |
65ed39df | 1475 | #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH) |
3cf2715d DE |
1476 | if (cxt) |
1477 | ASM_OUTPUT_REG_POP (file, STATIC_CHAIN_INCOMING_REGNUM); | |
1478 | #else | |
65ed39df | 1479 | #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH) |
3cf2715d | 1480 | if (cxt) |
51723711 KG |
1481 | { |
1482 | ASM_OUTPUT_REG_POP (file, STATIC_CHAIN_REGNUM); | |
1483 | } | |
3cf2715d DE |
1484 | #endif |
1485 | #endif | |
3cf2715d | 1486 | |
65ed39df | 1487 | #if defined(STRUCT_VALUE_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH) |
3cf2715d DE |
1488 | if (sval) |
1489 | ASM_OUTPUT_REG_POP (file, STRUCT_VALUE_INCOMING_REGNUM); | |
1490 | #else | |
65ed39df | 1491 | #if defined(STRUCT_VALUE_REGNUM) && defined(ASM_OUTPUT_REG_PUSH) |
3cf2715d | 1492 | if (sval) |
51723711 KG |
1493 | { |
1494 | ASM_OUTPUT_REG_POP (file, STRUCT_VALUE_REGNUM); | |
1495 | } | |
3cf2715d DE |
1496 | #endif |
1497 | #endif | |
1498 | } | |
1499 | ||
1500 | /* Output assembler code for the end of a function. | |
1501 | For clarity, args are same as those of `final_start_function' | |
1502 | even though not all of them are needed. */ | |
1503 | ||
1504 | void | |
e2a12aca | 1505 | final_end_function () |
3cf2715d | 1506 | { |
be1bb652 | 1507 | app_disable (); |
3cf2715d | 1508 | |
e2a12aca | 1509 | (*debug_hooks->end_function) (high_function_linenum); |
3cf2715d | 1510 | |
3cf2715d DE |
1511 | /* Finally, output the function epilogue: |
1512 | code to restore the stack frame and return to the caller. */ | |
e2a12aca | 1513 | (*targetm.asm_out.function_epilogue) (asm_out_file, get_frame_size ()); |
3cf2715d | 1514 | |
e2a12aca | 1515 | /* And debug output. */ |
702ada3d | 1516 | (*debug_hooks->end_epilogue) (last_linenum, last_filename); |
3cf2715d | 1517 | |
e2a12aca | 1518 | #if defined (DWARF2_UNWIND_INFO) |
7a0c8d71 DR |
1519 | if (write_symbols != DWARF2_DEBUG && write_symbols != VMS_AND_DWARF2_DEBUG |
1520 | && dwarf2out_do_frame ()) | |
702ada3d | 1521 | dwarf2out_end_epilogue (last_linenum, last_filename); |
9a666dda | 1522 | #endif |
3cf2715d DE |
1523 | } |
1524 | \f | |
3cf2715d DE |
1525 | /* Output assembler code for some insns: all or part of a function. |
1526 | For description of args, see `final_start_function', above. | |
1527 | ||
1528 | PRESCAN is 1 if we are not really outputting, | |
1529 | just scanning as if we were outputting. | |
1530 | Prescanning deletes and rearranges insns just like ordinary output. | |
1531 | PRESCAN is -2 if we are outputting after having prescanned. | |
1532 | In this case, don't try to delete or rearrange insns | |
1533 | because that has already been done. | |
1534 | Prescanning is done only on certain machines. */ | |
1535 | ||
1536 | void | |
1537 | final (first, file, optimize, prescan) | |
1538 | rtx first; | |
1539 | FILE *file; | |
1540 | int optimize; | |
1541 | int prescan; | |
1542 | { | |
b3694847 | 1543 | rtx insn; |
3cf2715d | 1544 | int max_line = 0; |
a8c3510c | 1545 | int max_uid = 0; |
3cf2715d DE |
1546 | |
1547 | last_ignored_compare = 0; | |
3cf2715d DE |
1548 | |
1549 | /* Make a map indicating which line numbers appear in this function. | |
1550 | When producing SDB debugging info, delete troublesome line number | |
1551 | notes from inlined functions in other files as well as duplicate | |
1552 | line number notes. */ | |
1553 | #ifdef SDB_DEBUGGING_INFO | |
1554 | if (write_symbols == SDB_DEBUG) | |
1555 | { | |
1556 | rtx last = 0; | |
1557 | for (insn = first; insn; insn = NEXT_INSN (insn)) | |
1558 | if (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) > 0) | |
1559 | { | |
1560 | if ((RTX_INTEGRATED_P (insn) | |
1561 | && strcmp (NOTE_SOURCE_FILE (insn), main_input_filename) != 0) | |
1562 | || (last != 0 | |
1563 | && NOTE_LINE_NUMBER (insn) == NOTE_LINE_NUMBER (last) | |
1564 | && NOTE_SOURCE_FILE (insn) == NOTE_SOURCE_FILE (last))) | |
1565 | { | |
2e106602 | 1566 | delete_insn (insn); /* Use delete_note. */ |
3cf2715d DE |
1567 | continue; |
1568 | } | |
1569 | last = insn; | |
1570 | if (NOTE_LINE_NUMBER (insn) > max_line) | |
1571 | max_line = NOTE_LINE_NUMBER (insn); | |
1572 | } | |
1573 | } | |
1574 | else | |
1575 | #endif | |
1576 | { | |
1577 | for (insn = first; insn; insn = NEXT_INSN (insn)) | |
1578 | if (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) > max_line) | |
1579 | max_line = NOTE_LINE_NUMBER (insn); | |
1580 | } | |
1581 | ||
bedda2da | 1582 | line_note_exists = (char *) xcalloc (max_line + 1, sizeof (char)); |
3cf2715d DE |
1583 | |
1584 | for (insn = first; insn; insn = NEXT_INSN (insn)) | |
a8c3510c AM |
1585 | { |
1586 | if (INSN_UID (insn) > max_uid) /* find largest UID */ | |
f5d927c0 | 1587 | max_uid = INSN_UID (insn); |
a8c3510c | 1588 | if (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) > 0) |
f5d927c0 | 1589 | line_note_exists[NOTE_LINE_NUMBER (insn)] = 1; |
9ef4c6ef JC |
1590 | #ifdef HAVE_cc0 |
1591 | /* If CC tracking across branches is enabled, record the insn which | |
1592 | jumps to each branch only reached from one place. */ | |
7ad7f828 | 1593 | if (optimize && GET_CODE (insn) == JUMP_INSN) |
9ef4c6ef JC |
1594 | { |
1595 | rtx lab = JUMP_LABEL (insn); | |
1596 | if (lab && LABEL_NUSES (lab) == 1) | |
1597 | { | |
1598 | LABEL_REFS (lab) = insn; | |
1599 | } | |
1600 | } | |
1601 | #endif | |
a8c3510c AM |
1602 | } |
1603 | ||
3cf2715d DE |
1604 | init_recog (); |
1605 | ||
1606 | CC_STATUS_INIT; | |
1607 | ||
1608 | /* Output the insns. */ | |
1609 | for (insn = NEXT_INSN (first); insn;) | |
2f16edb1 TG |
1610 | { |
1611 | #ifdef HAVE_ATTR_length | |
b9f22704 | 1612 | if ((unsigned) INSN_UID (insn) >= INSN_ADDRESSES_SIZE ()) |
0ac76ad9 | 1613 | { |
0ac76ad9 RH |
1614 | /* This can be triggered by bugs elsewhere in the compiler if |
1615 | new insns are created after init_insn_lengths is called. */ | |
0acb0203 JH |
1616 | if (GET_CODE (insn) == NOTE) |
1617 | insn_current_address = -1; | |
1618 | else | |
1619 | abort (); | |
0ac76ad9 RH |
1620 | } |
1621 | else | |
9d98a694 | 1622 | insn_current_address = INSN_ADDRESSES (INSN_UID (insn)); |
0ac76ad9 RH |
1623 | #endif /* HAVE_ATTR_length */ |
1624 | ||
2f16edb1 TG |
1625 | insn = final_scan_insn (insn, file, optimize, prescan, 0); |
1626 | } | |
3cf2715d | 1627 | |
bedda2da MM |
1628 | free (line_note_exists); |
1629 | line_note_exists = NULL; | |
3cf2715d DE |
1630 | } |
1631 | \f | |
4bbf910e RH |
1632 | const char * |
1633 | get_insn_template (code, insn) | |
1634 | int code; | |
1635 | rtx insn; | |
1636 | { | |
1637 | const void *output = insn_data[code].output; | |
1638 | switch (insn_data[code].output_format) | |
1639 | { | |
1640 | case INSN_OUTPUT_FORMAT_SINGLE: | |
1641 | return (const char *) output; | |
1642 | case INSN_OUTPUT_FORMAT_MULTI: | |
f5d927c0 | 1643 | return ((const char *const *) output)[which_alternative]; |
4bbf910e RH |
1644 | case INSN_OUTPUT_FORMAT_FUNCTION: |
1645 | if (insn == NULL) | |
1646 | abort (); | |
f5d927c0 | 1647 | return (*(insn_output_fn) output) (recog_data.operand, insn); |
4bbf910e RH |
1648 | |
1649 | default: | |
1650 | abort (); | |
1651 | } | |
1652 | } | |
f5d927c0 | 1653 | |
0dc36574 ZW |
1654 | /* Emit the appropriate declaration for an alternate-entry-point |
1655 | symbol represented by INSN, to FILE. INSN is a CODE_LABEL with | |
1656 | LABEL_KIND != LABEL_NORMAL. | |
1657 | ||
1658 | The case fall-through in this function is intentional. */ | |
1659 | static void | |
1660 | output_alternate_entry_point (file, insn) | |
1661 | FILE *file; | |
1662 | rtx insn; | |
1663 | { | |
1664 | const char *name = LABEL_NAME (insn); | |
1665 | ||
1666 | switch (LABEL_KIND (insn)) | |
1667 | { | |
1668 | case LABEL_WEAK_ENTRY: | |
1669 | #ifdef ASM_WEAKEN_LABEL | |
1670 | ASM_WEAKEN_LABEL (file, name); | |
1671 | #endif | |
1672 | case LABEL_GLOBAL_ENTRY: | |
5eb99654 | 1673 | (*targetm.asm_out.globalize_label) (file, name); |
0dc36574 | 1674 | case LABEL_STATIC_ENTRY: |
905173eb ZW |
1675 | #ifdef ASM_OUTPUT_TYPE_DIRECTIVE |
1676 | ASM_OUTPUT_TYPE_DIRECTIVE (file, name, "function"); | |
1677 | #endif | |
0dc36574 ZW |
1678 | ASM_OUTPUT_LABEL (file, name); |
1679 | break; | |
1680 | ||
1681 | case LABEL_NORMAL: | |
1682 | default: | |
1683 | abort (); | |
1684 | } | |
1685 | } | |
1686 | ||
3cf2715d DE |
1687 | /* The final scan for one insn, INSN. |
1688 | Args are same as in `final', except that INSN | |
1689 | is the insn being scanned. | |
1690 | Value returned is the next insn to be scanned. | |
1691 | ||
1692 | NOPEEPHOLES is the flag to disallow peephole processing (currently | |
1693 | used for within delayed branch sequence output). */ | |
1694 | ||
1695 | rtx | |
1696 | final_scan_insn (insn, file, optimize, prescan, nopeepholes) | |
1697 | rtx insn; | |
1698 | FILE *file; | |
272df862 | 1699 | int optimize ATTRIBUTE_UNUSED; |
3cf2715d | 1700 | int prescan; |
272df862 | 1701 | int nopeepholes ATTRIBUTE_UNUSED; |
3cf2715d | 1702 | { |
90ca38bb MM |
1703 | #ifdef HAVE_cc0 |
1704 | rtx set; | |
1705 | #endif | |
1706 | ||
3cf2715d DE |
1707 | insn_counter++; |
1708 | ||
1709 | /* Ignore deleted insns. These can occur when we split insns (due to a | |
1710 | template of "#") while not optimizing. */ | |
1711 | if (INSN_DELETED_P (insn)) | |
1712 | return NEXT_INSN (insn); | |
1713 | ||
1714 | switch (GET_CODE (insn)) | |
1715 | { | |
1716 | case NOTE: | |
1717 | if (prescan > 0) | |
1718 | break; | |
1719 | ||
be1bb652 RH |
1720 | switch (NOTE_LINE_NUMBER (insn)) |
1721 | { | |
1722 | case NOTE_INSN_DELETED: | |
1723 | case NOTE_INSN_LOOP_BEG: | |
1724 | case NOTE_INSN_LOOP_END: | |
2c79137a | 1725 | case NOTE_INSN_LOOP_END_TOP_COND: |
be1bb652 RH |
1726 | case NOTE_INSN_LOOP_CONT: |
1727 | case NOTE_INSN_LOOP_VTOP: | |
1728 | case NOTE_INSN_FUNCTION_END: | |
be1bb652 | 1729 | case NOTE_INSN_REPEATED_LINE_NUMBER: |
be1bb652 RH |
1730 | case NOTE_INSN_EXPECTED_VALUE: |
1731 | break; | |
3cf2715d | 1732 | |
be1bb652 | 1733 | case NOTE_INSN_BASIC_BLOCK: |
ad0fc698 JW |
1734 | #ifdef IA64_UNWIND_INFO |
1735 | IA64_UNWIND_EMIT (asm_out_file, insn); | |
1736 | #endif | |
be1bb652 RH |
1737 | if (flag_debug_asm) |
1738 | fprintf (asm_out_file, "\t%s basic block %d\n", | |
0b17ab2f | 1739 | ASM_COMMENT_START, NOTE_BASIC_BLOCK (insn)->index); |
be1bb652 | 1740 | break; |
3cf2715d | 1741 | |
be1bb652 | 1742 | case NOTE_INSN_EH_REGION_BEG: |
52a11cbf RH |
1743 | ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHB", |
1744 | NOTE_EH_HANDLER (insn)); | |
3d195391 | 1745 | break; |
3d195391 | 1746 | |
be1bb652 | 1747 | case NOTE_INSN_EH_REGION_END: |
52a11cbf RH |
1748 | ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHE", |
1749 | NOTE_EH_HANDLER (insn)); | |
3d195391 | 1750 | break; |
3d195391 | 1751 | |
be1bb652 | 1752 | case NOTE_INSN_PROLOGUE_END: |
b9f22704 | 1753 | (*targetm.asm_out.function_end_prologue) (file); |
3cf2715d DE |
1754 | profile_after_prologue (file); |
1755 | break; | |
3cf2715d | 1756 | |
be1bb652 | 1757 | case NOTE_INSN_EPILOGUE_BEG: |
b9f22704 | 1758 | (*targetm.asm_out.function_begin_epilogue) (file); |
be1bb652 | 1759 | break; |
3cf2715d | 1760 | |
be1bb652 | 1761 | case NOTE_INSN_FUNCTION_BEG: |
653e276c | 1762 | app_disable (); |
702ada3d | 1763 | (*debug_hooks->end_prologue) (last_linenum, last_filename); |
3cf2715d | 1764 | break; |
be1bb652 RH |
1765 | |
1766 | case NOTE_INSN_BLOCK_BEG: | |
1767 | if (debug_info_level == DINFO_LEVEL_NORMAL | |
3cf2715d | 1768 | || debug_info_level == DINFO_LEVEL_VERBOSE |
3cf2715d | 1769 | || write_symbols == DWARF_DEBUG |
7a0c8d71 DR |
1770 | || write_symbols == DWARF2_DEBUG |
1771 | || write_symbols == VMS_AND_DWARF2_DEBUG | |
1772 | || write_symbols == VMS_DEBUG) | |
be1bb652 RH |
1773 | { |
1774 | int n = BLOCK_NUMBER (NOTE_BLOCK (insn)); | |
3cf2715d | 1775 | |
be1bb652 RH |
1776 | app_disable (); |
1777 | ++block_depth; | |
1778 | high_block_linenum = last_linenum; | |
eac40081 | 1779 | |
a5a42b92 | 1780 | /* Output debugging info about the symbol-block beginning. */ |
e2a12aca | 1781 | (*debug_hooks->begin_block) (last_linenum, n); |
3cf2715d | 1782 | |
be1bb652 RH |
1783 | /* Mark this block as output. */ |
1784 | TREE_ASM_WRITTEN (NOTE_BLOCK (insn)) = 1; | |
1785 | } | |
1786 | break; | |
18c038b9 | 1787 | |
be1bb652 RH |
1788 | case NOTE_INSN_BLOCK_END: |
1789 | if (debug_info_level == DINFO_LEVEL_NORMAL | |
1790 | || debug_info_level == DINFO_LEVEL_VERBOSE | |
1791 | || write_symbols == DWARF_DEBUG | |
7a0c8d71 DR |
1792 | || write_symbols == DWARF2_DEBUG |
1793 | || write_symbols == VMS_AND_DWARF2_DEBUG | |
1794 | || write_symbols == VMS_DEBUG) | |
be1bb652 RH |
1795 | { |
1796 | int n = BLOCK_NUMBER (NOTE_BLOCK (insn)); | |
3cf2715d | 1797 | |
be1bb652 RH |
1798 | app_disable (); |
1799 | ||
1800 | /* End of a symbol-block. */ | |
1801 | --block_depth; | |
1802 | if (block_depth < 0) | |
1803 | abort (); | |
3cf2715d | 1804 | |
e2a12aca | 1805 | (*debug_hooks->end_block) (high_block_linenum, n); |
be1bb652 RH |
1806 | } |
1807 | break; | |
1808 | ||
1809 | case NOTE_INSN_DELETED_LABEL: | |
1810 | /* Emit the label. We may have deleted the CODE_LABEL because | |
1811 | the label could be proved to be unreachable, though still | |
1812 | referenced (in the form of having its address taken. */ | |
8215347e | 1813 | ASM_OUTPUT_DEBUG_LABEL (file, "L", CODE_LABEL_NUMBER (insn)); |
be1bb652 | 1814 | break; |
3cf2715d | 1815 | |
21835d9b JJ |
1816 | case 0: |
1817 | break; | |
1818 | ||
be1bb652 RH |
1819 | default: |
1820 | if (NOTE_LINE_NUMBER (insn) <= 0) | |
1821 | abort (); | |
3cf2715d | 1822 | |
be1bb652 RH |
1823 | /* This note is a line-number. */ |
1824 | { | |
b3694847 | 1825 | rtx note; |
be1bb652 RH |
1826 | int note_after = 0; |
1827 | ||
f5d927c0 | 1828 | /* If there is anything real after this note, output it. |
be1bb652 RH |
1829 | If another line note follows, omit this one. */ |
1830 | for (note = NEXT_INSN (insn); note; note = NEXT_INSN (note)) | |
1831 | { | |
1832 | if (GET_CODE (note) != NOTE && GET_CODE (note) != CODE_LABEL) | |
3cf2715d | 1833 | break; |
3cf2715d | 1834 | |
be1bb652 RH |
1835 | /* These types of notes can be significant |
1836 | so make sure the preceding line number stays. */ | |
1837 | else if (GET_CODE (note) == NOTE | |
1838 | && (NOTE_LINE_NUMBER (note) == NOTE_INSN_BLOCK_BEG | |
1839 | || NOTE_LINE_NUMBER (note) == NOTE_INSN_BLOCK_END | |
1840 | || NOTE_LINE_NUMBER (note) == NOTE_INSN_FUNCTION_BEG)) | |
1841 | break; | |
1842 | else if (GET_CODE (note) == NOTE && NOTE_LINE_NUMBER (note) > 0) | |
1843 | { | |
1844 | /* Another line note follows; we can delete this note | |
1845 | if no intervening line numbers have notes elsewhere. */ | |
1846 | int num; | |
1847 | for (num = NOTE_LINE_NUMBER (insn) + 1; | |
1848 | num < NOTE_LINE_NUMBER (note); | |
1849 | num++) | |
1850 | if (line_note_exists[num]) | |
1851 | break; | |
1852 | ||
1853 | if (num >= NOTE_LINE_NUMBER (note)) | |
1854 | note_after = 1; | |
1855 | break; | |
1856 | } | |
1857 | } | |
1858 | ||
1859 | /* Output this line note if it is the first or the last line | |
1860 | note in a row. */ | |
1861 | if (!note_after) | |
653e276c NB |
1862 | { |
1863 | notice_source_line (insn); | |
1864 | (*debug_hooks->source_line) (last_linenum, last_filename); | |
1865 | } | |
be1bb652 | 1866 | } |
f5d927c0 | 1867 | break; |
3cf2715d DE |
1868 | } |
1869 | break; | |
1870 | ||
1871 | case BARRIER: | |
f73ad30e | 1872 | #if defined (DWARF2_UNWIND_INFO) |
fbfa55b0 | 1873 | if (dwarf2out_do_frame ()) |
be1bb652 | 1874 | dwarf2out_frame_debug (insn); |
3cf2715d DE |
1875 | #endif |
1876 | break; | |
1877 | ||
1878 | case CODE_LABEL: | |
1dd8faa8 R |
1879 | /* The target port might emit labels in the output function for |
1880 | some insn, e.g. sh.c output_branchy_insn. */ | |
de7987a6 R |
1881 | if (CODE_LABEL_NUMBER (insn) <= max_labelno) |
1882 | { | |
1883 | int align = LABEL_TO_ALIGNMENT (insn); | |
50b2596f | 1884 | #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN |
9e423e6d | 1885 | int max_skip = LABEL_TO_MAX_SKIP (insn); |
50b2596f | 1886 | #endif |
fc470718 | 1887 | |
1dd8faa8 | 1888 | if (align && NEXT_INSN (insn)) |
40cdfca6 | 1889 | { |
9e423e6d | 1890 | #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN |
40cdfca6 | 1891 | ASM_OUTPUT_MAX_SKIP_ALIGN (file, align, max_skip); |
8e16ab99 SF |
1892 | #else |
1893 | #ifdef ASM_OUTPUT_ALIGN_WITH_NOP | |
1894 | ASM_OUTPUT_ALIGN_WITH_NOP (file, align); | |
9e423e6d | 1895 | #else |
40cdfca6 | 1896 | ASM_OUTPUT_ALIGN (file, align); |
8e16ab99 | 1897 | #endif |
9e423e6d | 1898 | #endif |
40cdfca6 | 1899 | } |
de7987a6 | 1900 | } |
9ef4c6ef | 1901 | #ifdef HAVE_cc0 |
3cf2715d | 1902 | CC_STATUS_INIT; |
9ef4c6ef JC |
1903 | /* If this label is reached from only one place, set the condition |
1904 | codes from the instruction just before the branch. */ | |
7ad7f828 JC |
1905 | |
1906 | /* Disabled because some insns set cc_status in the C output code | |
1907 | and NOTICE_UPDATE_CC alone can set incorrect status. */ | |
1908 | if (0 /* optimize && LABEL_NUSES (insn) == 1*/) | |
9ef4c6ef JC |
1909 | { |
1910 | rtx jump = LABEL_REFS (insn); | |
1911 | rtx barrier = prev_nonnote_insn (insn); | |
1912 | rtx prev; | |
1913 | /* If the LABEL_REFS field of this label has been set to point | |
1914 | at a branch, the predecessor of the branch is a regular | |
1915 | insn, and that branch is the only way to reach this label, | |
1916 | set the condition codes based on the branch and its | |
1917 | predecessor. */ | |
1918 | if (barrier && GET_CODE (barrier) == BARRIER | |
1919 | && jump && GET_CODE (jump) == JUMP_INSN | |
1920 | && (prev = prev_nonnote_insn (jump)) | |
1921 | && GET_CODE (prev) == INSN) | |
1922 | { | |
1923 | NOTICE_UPDATE_CC (PATTERN (prev), prev); | |
1924 | NOTICE_UPDATE_CC (PATTERN (jump), jump); | |
1925 | } | |
1926 | } | |
1927 | #endif | |
3cf2715d DE |
1928 | if (prescan > 0) |
1929 | break; | |
03ffa171 RK |
1930 | |
1931 | #ifdef FINAL_PRESCAN_LABEL | |
df4ae160 | 1932 | FINAL_PRESCAN_INSN (insn, NULL, 0); |
03ffa171 RK |
1933 | #endif |
1934 | ||
e1772ac0 NB |
1935 | if (LABEL_NAME (insn)) |
1936 | (*debug_hooks->label) (insn); | |
1937 | ||
3cf2715d DE |
1938 | if (app_on) |
1939 | { | |
51723711 | 1940 | fputs (ASM_APP_OFF, file); |
3cf2715d DE |
1941 | app_on = 0; |
1942 | } | |
1943 | if (NEXT_INSN (insn) != 0 | |
1944 | && GET_CODE (NEXT_INSN (insn)) == JUMP_INSN) | |
1945 | { | |
1946 | rtx nextbody = PATTERN (NEXT_INSN (insn)); | |
1947 | ||
1948 | /* If this label is followed by a jump-table, | |
1949 | make sure we put the label in the read-only section. Also | |
1950 | possibly write the label and jump table together. */ | |
1951 | ||
1952 | if (GET_CODE (nextbody) == ADDR_VEC | |
1953 | || GET_CODE (nextbody) == ADDR_DIFF_VEC) | |
1954 | { | |
e0d80184 DM |
1955 | #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC) |
1956 | /* In this case, the case vector is being moved by the | |
1957 | target, so don't output the label at all. Leave that | |
1958 | to the back end macros. */ | |
1959 | #else | |
75197b37 BS |
1960 | if (! JUMP_TABLES_IN_TEXT_SECTION) |
1961 | { | |
340f7e7c RH |
1962 | int log_align; |
1963 | ||
75197b37 | 1964 | readonly_data_section (); |
340f7e7c RH |
1965 | |
1966 | #ifdef ADDR_VEC_ALIGN | |
3e4eece3 | 1967 | log_align = ADDR_VEC_ALIGN (NEXT_INSN (insn)); |
340f7e7c RH |
1968 | #else |
1969 | log_align = exact_log2 (BIGGEST_ALIGNMENT / BITS_PER_UNIT); | |
1970 | #endif | |
1971 | ASM_OUTPUT_ALIGN (file, log_align); | |
75197b37 BS |
1972 | } |
1973 | else | |
1974 | function_section (current_function_decl); | |
1975 | ||
3cf2715d DE |
1976 | #ifdef ASM_OUTPUT_CASE_LABEL |
1977 | ASM_OUTPUT_CASE_LABEL (file, "L", CODE_LABEL_NUMBER (insn), | |
1978 | NEXT_INSN (insn)); | |
1979 | #else | |
4977bab6 | 1980 | (*targetm.asm_out.internal_label) (file, "L", CODE_LABEL_NUMBER (insn)); |
e0d80184 | 1981 | #endif |
3cf2715d DE |
1982 | #endif |
1983 | break; | |
1984 | } | |
1985 | } | |
0dc36574 ZW |
1986 | if (LABEL_ALT_ENTRY_P (insn)) |
1987 | output_alternate_entry_point (file, insn); | |
8cd0faaf | 1988 | else |
4977bab6 | 1989 | (*targetm.asm_out.internal_label) (file, "L", CODE_LABEL_NUMBER (insn)); |
3cf2715d DE |
1990 | break; |
1991 | ||
1992 | default: | |
1993 | { | |
b3694847 | 1994 | rtx body = PATTERN (insn); |
3cf2715d | 1995 | int insn_code_number; |
9b3142b3 | 1996 | const char *template; |
3cf2715d DE |
1997 | rtx note; |
1998 | ||
1999 | /* An INSN, JUMP_INSN or CALL_INSN. | |
2000 | First check for special kinds that recog doesn't recognize. */ | |
2001 | ||
2002 | if (GET_CODE (body) == USE /* These are just declarations */ | |
2003 | || GET_CODE (body) == CLOBBER) | |
2004 | break; | |
2005 | ||
2006 | #ifdef HAVE_cc0 | |
2007 | /* If there is a REG_CC_SETTER note on this insn, it means that | |
2008 | the setting of the condition code was done in the delay slot | |
2009 | of the insn that branched here. So recover the cc status | |
2010 | from the insn that set it. */ | |
2011 | ||
2012 | note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX); | |
2013 | if (note) | |
2014 | { | |
2015 | NOTICE_UPDATE_CC (PATTERN (XEXP (note, 0)), XEXP (note, 0)); | |
2016 | cc_prev_status = cc_status; | |
2017 | } | |
2018 | #endif | |
2019 | ||
2020 | /* Detect insns that are really jump-tables | |
2021 | and output them as such. */ | |
2022 | ||
2023 | if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC) | |
2024 | { | |
7f7f8214 | 2025 | #if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)) |
b3694847 | 2026 | int vlen, idx; |
7f7f8214 | 2027 | #endif |
3cf2715d DE |
2028 | |
2029 | if (prescan > 0) | |
2030 | break; | |
2031 | ||
2032 | if (app_on) | |
2033 | { | |
51723711 | 2034 | fputs (ASM_APP_OFF, file); |
3cf2715d DE |
2035 | app_on = 0; |
2036 | } | |
2037 | ||
e0d80184 DM |
2038 | #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC) |
2039 | if (GET_CODE (body) == ADDR_VEC) | |
2040 | { | |
2041 | #ifdef ASM_OUTPUT_ADDR_VEC | |
2042 | ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn), body); | |
2043 | #else | |
f5d927c0 | 2044 | abort (); |
e0d80184 DM |
2045 | #endif |
2046 | } | |
2047 | else | |
2048 | { | |
2049 | #ifdef ASM_OUTPUT_ADDR_DIFF_VEC | |
2050 | ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn), body); | |
2051 | #else | |
f5d927c0 | 2052 | abort (); |
e0d80184 DM |
2053 | #endif |
2054 | } | |
2055 | #else | |
3cf2715d DE |
2056 | vlen = XVECLEN (body, GET_CODE (body) == ADDR_DIFF_VEC); |
2057 | for (idx = 0; idx < vlen; idx++) | |
2058 | { | |
2059 | if (GET_CODE (body) == ADDR_VEC) | |
2060 | { | |
2061 | #ifdef ASM_OUTPUT_ADDR_VEC_ELT | |
2062 | ASM_OUTPUT_ADDR_VEC_ELT | |
2063 | (file, CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 0, idx), 0))); | |
2064 | #else | |
2065 | abort (); | |
2066 | #endif | |
2067 | } | |
2068 | else | |
2069 | { | |
2070 | #ifdef ASM_OUTPUT_ADDR_DIFF_ELT | |
2071 | ASM_OUTPUT_ADDR_DIFF_ELT | |
2072 | (file, | |
33f7f353 | 2073 | body, |
3cf2715d DE |
2074 | CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 1, idx), 0)), |
2075 | CODE_LABEL_NUMBER (XEXP (XEXP (body, 0), 0))); | |
2076 | #else | |
2077 | abort (); | |
2078 | #endif | |
2079 | } | |
2080 | } | |
2081 | #ifdef ASM_OUTPUT_CASE_END | |
2082 | ASM_OUTPUT_CASE_END (file, | |
2083 | CODE_LABEL_NUMBER (PREV_INSN (insn)), | |
2084 | insn); | |
e0d80184 | 2085 | #endif |
3cf2715d DE |
2086 | #endif |
2087 | ||
4d1065ed | 2088 | function_section (current_function_decl); |
3cf2715d DE |
2089 | |
2090 | break; | |
2091 | } | |
2092 | ||
3cf2715d DE |
2093 | if (GET_CODE (body) == ASM_INPUT) |
2094 | { | |
36d7136e RH |
2095 | const char *string = XSTR (body, 0); |
2096 | ||
3cf2715d DE |
2097 | /* There's no telling what that did to the condition codes. */ |
2098 | CC_STATUS_INIT; | |
2099 | if (prescan > 0) | |
2100 | break; | |
36d7136e RH |
2101 | |
2102 | if (string[0]) | |
3cf2715d | 2103 | { |
36d7136e RH |
2104 | if (! app_on) |
2105 | { | |
2106 | fputs (ASM_APP_ON, file); | |
2107 | app_on = 1; | |
2108 | } | |
2109 | fprintf (asm_out_file, "\t%s\n", string); | |
3cf2715d | 2110 | } |
3cf2715d DE |
2111 | break; |
2112 | } | |
2113 | ||
2114 | /* Detect `asm' construct with operands. */ | |
2115 | if (asm_noperands (body) >= 0) | |
2116 | { | |
22bf4422 | 2117 | unsigned int noperands = asm_noperands (body); |
3cf2715d | 2118 | rtx *ops = (rtx *) alloca (noperands * sizeof (rtx)); |
3cce094d | 2119 | const char *string; |
3cf2715d DE |
2120 | |
2121 | /* There's no telling what that did to the condition codes. */ | |
2122 | CC_STATUS_INIT; | |
2123 | if (prescan > 0) | |
2124 | break; | |
2125 | ||
3cf2715d | 2126 | /* Get out the operand values. */ |
df4ae160 | 2127 | string = decode_asm_operands (body, ops, NULL, NULL, NULL); |
3cf2715d DE |
2128 | /* Inhibit aborts on what would otherwise be compiler bugs. */ |
2129 | insn_noperands = noperands; | |
2130 | this_is_asm_operands = insn; | |
2131 | ||
2132 | /* Output the insn using them. */ | |
36d7136e RH |
2133 | if (string[0]) |
2134 | { | |
2135 | if (! app_on) | |
2136 | { | |
2137 | fputs (ASM_APP_ON, file); | |
2138 | app_on = 1; | |
2139 | } | |
2140 | output_asm_insn (string, ops); | |
2141 | } | |
2142 | ||
3cf2715d DE |
2143 | this_is_asm_operands = 0; |
2144 | break; | |
2145 | } | |
2146 | ||
2147 | if (prescan <= 0 && app_on) | |
2148 | { | |
51723711 | 2149 | fputs (ASM_APP_OFF, file); |
3cf2715d DE |
2150 | app_on = 0; |
2151 | } | |
2152 | ||
2153 | if (GET_CODE (body) == SEQUENCE) | |
2154 | { | |
2155 | /* A delayed-branch sequence */ | |
b3694847 | 2156 | int i; |
3cf2715d DE |
2157 | rtx next; |
2158 | ||
2159 | if (prescan > 0) | |
2160 | break; | |
2161 | final_sequence = body; | |
2162 | ||
d660cefe RS |
2163 | /* Record the delay slots' frame information before the branch. |
2164 | This is needed for delayed calls: see execute_cfa_program(). */ | |
2165 | #if defined (DWARF2_UNWIND_INFO) | |
2166 | if (dwarf2out_do_frame ()) | |
2167 | for (i = 1; i < XVECLEN (body, 0); i++) | |
2168 | dwarf2out_frame_debug (XVECEXP (body, 0, i)); | |
2169 | #endif | |
2170 | ||
3cf2715d DE |
2171 | /* The first insn in this SEQUENCE might be a JUMP_INSN that will |
2172 | force the restoration of a comparison that was previously | |
2173 | thought unnecessary. If that happens, cancel this sequence | |
2174 | and cause that insn to be restored. */ | |
2175 | ||
2176 | next = final_scan_insn (XVECEXP (body, 0, 0), file, 0, prescan, 1); | |
2177 | if (next != XVECEXP (body, 0, 1)) | |
2178 | { | |
2179 | final_sequence = 0; | |
2180 | return next; | |
2181 | } | |
2182 | ||
2183 | for (i = 1; i < XVECLEN (body, 0); i++) | |
c7eee2df RK |
2184 | { |
2185 | rtx insn = XVECEXP (body, 0, i); | |
2186 | rtx next = NEXT_INSN (insn); | |
2187 | /* We loop in case any instruction in a delay slot gets | |
2188 | split. */ | |
2189 | do | |
2190 | insn = final_scan_insn (insn, file, 0, prescan, 1); | |
2191 | while (insn != next); | |
2192 | } | |
3cf2715d DE |
2193 | #ifdef DBR_OUTPUT_SEQEND |
2194 | DBR_OUTPUT_SEQEND (file); | |
2195 | #endif | |
2196 | final_sequence = 0; | |
2197 | ||
2198 | /* If the insn requiring the delay slot was a CALL_INSN, the | |
2199 | insns in the delay slot are actually executed before the | |
2200 | called function. Hence we don't preserve any CC-setting | |
2201 | actions in these insns and the CC must be marked as being | |
2202 | clobbered by the function. */ | |
2203 | if (GET_CODE (XVECEXP (body, 0, 0)) == CALL_INSN) | |
b729186a JL |
2204 | { |
2205 | CC_STATUS_INIT; | |
2206 | } | |
3cf2715d DE |
2207 | break; |
2208 | } | |
2209 | ||
2210 | /* We have a real machine instruction as rtl. */ | |
2211 | ||
2212 | body = PATTERN (insn); | |
2213 | ||
2214 | #ifdef HAVE_cc0 | |
f5d927c0 | 2215 | set = single_set (insn); |
b88c92cc | 2216 | |
3cf2715d DE |
2217 | /* Check for redundant test and compare instructions |
2218 | (when the condition codes are already set up as desired). | |
2219 | This is done only when optimizing; if not optimizing, | |
2220 | it should be possible for the user to alter a variable | |
2221 | with the debugger in between statements | |
2222 | and the next statement should reexamine the variable | |
2223 | to compute the condition codes. */ | |
2224 | ||
30f5e9f5 | 2225 | if (optimize) |
3cf2715d | 2226 | { |
b88c92cc | 2227 | #if 0 |
f5d927c0 | 2228 | rtx set = single_set (insn); |
b88c92cc | 2229 | #endif |
30f5e9f5 RK |
2230 | |
2231 | if (set | |
2232 | && GET_CODE (SET_DEST (set)) == CC0 | |
2233 | && insn != last_ignored_compare) | |
3cf2715d | 2234 | { |
30f5e9f5 | 2235 | if (GET_CODE (SET_SRC (set)) == SUBREG) |
49d801d3 | 2236 | SET_SRC (set) = alter_subreg (&SET_SRC (set)); |
30f5e9f5 RK |
2237 | else if (GET_CODE (SET_SRC (set)) == COMPARE) |
2238 | { | |
2239 | if (GET_CODE (XEXP (SET_SRC (set), 0)) == SUBREG) | |
2240 | XEXP (SET_SRC (set), 0) | |
49d801d3 | 2241 | = alter_subreg (&XEXP (SET_SRC (set), 0)); |
30f5e9f5 RK |
2242 | if (GET_CODE (XEXP (SET_SRC (set), 1)) == SUBREG) |
2243 | XEXP (SET_SRC (set), 1) | |
49d801d3 | 2244 | = alter_subreg (&XEXP (SET_SRC (set), 1)); |
30f5e9f5 RK |
2245 | } |
2246 | if ((cc_status.value1 != 0 | |
2247 | && rtx_equal_p (SET_SRC (set), cc_status.value1)) | |
2248 | || (cc_status.value2 != 0 | |
2249 | && rtx_equal_p (SET_SRC (set), cc_status.value2))) | |
3cf2715d | 2250 | { |
30f5e9f5 | 2251 | /* Don't delete insn if it has an addressing side-effect. */ |
ff81832f | 2252 | if (! FIND_REG_INC_NOTE (insn, NULL_RTX) |
30f5e9f5 RK |
2253 | /* or if anything in it is volatile. */ |
2254 | && ! volatile_refs_p (PATTERN (insn))) | |
2255 | { | |
2256 | /* We don't really delete the insn; just ignore it. */ | |
2257 | last_ignored_compare = insn; | |
2258 | break; | |
2259 | } | |
3cf2715d DE |
2260 | } |
2261 | } | |
2262 | } | |
2263 | #endif | |
2264 | ||
3cf2715d DE |
2265 | #ifndef STACK_REGS |
2266 | /* Don't bother outputting obvious no-ops, even without -O. | |
2267 | This optimization is fast and doesn't interfere with debugging. | |
2268 | Don't do this if the insn is in a delay slot, since this | |
2269 | will cause an improper number of delay insns to be written. */ | |
2270 | if (final_sequence == 0 | |
2271 | && prescan >= 0 | |
2272 | && GET_CODE (insn) == INSN && GET_CODE (body) == SET | |
2273 | && GET_CODE (SET_SRC (body)) == REG | |
2274 | && GET_CODE (SET_DEST (body)) == REG | |
2275 | && REGNO (SET_SRC (body)) == REGNO (SET_DEST (body))) | |
2276 | break; | |
2277 | #endif | |
2278 | ||
2279 | #ifdef HAVE_cc0 | |
2280 | /* If this is a conditional branch, maybe modify it | |
2281 | if the cc's are in a nonstandard state | |
2282 | so that it accomplishes the same thing that it would | |
2283 | do straightforwardly if the cc's were set up normally. */ | |
2284 | ||
2285 | if (cc_status.flags != 0 | |
2286 | && GET_CODE (insn) == JUMP_INSN | |
2287 | && GET_CODE (body) == SET | |
2288 | && SET_DEST (body) == pc_rtx | |
2289 | && GET_CODE (SET_SRC (body)) == IF_THEN_ELSE | |
de2b56f9 | 2290 | && GET_RTX_CLASS (GET_CODE (XEXP (SET_SRC (body), 0))) == '<' |
fff752ad | 2291 | && XEXP (XEXP (SET_SRC (body), 0), 0) == cc0_rtx |
3cf2715d DE |
2292 | /* This is done during prescan; it is not done again |
2293 | in final scan when prescan has been done. */ | |
2294 | && prescan >= 0) | |
2295 | { | |
2296 | /* This function may alter the contents of its argument | |
2297 | and clear some of the cc_status.flags bits. | |
2298 | It may also return 1 meaning condition now always true | |
2299 | or -1 meaning condition now always false | |
2300 | or 2 meaning condition nontrivial but altered. */ | |
b3694847 | 2301 | int result = alter_cond (XEXP (SET_SRC (body), 0)); |
3cf2715d DE |
2302 | /* If condition now has fixed value, replace the IF_THEN_ELSE |
2303 | with its then-operand or its else-operand. */ | |
2304 | if (result == 1) | |
2305 | SET_SRC (body) = XEXP (SET_SRC (body), 1); | |
2306 | if (result == -1) | |
2307 | SET_SRC (body) = XEXP (SET_SRC (body), 2); | |
2308 | ||
2309 | /* The jump is now either unconditional or a no-op. | |
2310 | If it has become a no-op, don't try to output it. | |
2311 | (It would not be recognized.) */ | |
2312 | if (SET_SRC (body) == pc_rtx) | |
2313 | { | |
ca6c03ca | 2314 | delete_insn (insn); |
3cf2715d DE |
2315 | break; |
2316 | } | |
2317 | else if (GET_CODE (SET_SRC (body)) == RETURN) | |
2318 | /* Replace (set (pc) (return)) with (return). */ | |
2319 | PATTERN (insn) = body = SET_SRC (body); | |
2320 | ||
2321 | /* Rerecognize the instruction if it has changed. */ | |
2322 | if (result != 0) | |
2323 | INSN_CODE (insn) = -1; | |
2324 | } | |
2325 | ||
2326 | /* Make same adjustments to instructions that examine the | |
462da2af SC |
2327 | condition codes without jumping and instructions that |
2328 | handle conditional moves (if this machine has either one). */ | |
3cf2715d DE |
2329 | |
2330 | if (cc_status.flags != 0 | |
b88c92cc | 2331 | && set != 0) |
3cf2715d | 2332 | { |
462da2af | 2333 | rtx cond_rtx, then_rtx, else_rtx; |
f5d927c0 | 2334 | |
462da2af | 2335 | if (GET_CODE (insn) != JUMP_INSN |
b88c92cc | 2336 | && GET_CODE (SET_SRC (set)) == IF_THEN_ELSE) |
462da2af | 2337 | { |
b88c92cc RK |
2338 | cond_rtx = XEXP (SET_SRC (set), 0); |
2339 | then_rtx = XEXP (SET_SRC (set), 1); | |
2340 | else_rtx = XEXP (SET_SRC (set), 2); | |
462da2af SC |
2341 | } |
2342 | else | |
2343 | { | |
b88c92cc | 2344 | cond_rtx = SET_SRC (set); |
462da2af SC |
2345 | then_rtx = const_true_rtx; |
2346 | else_rtx = const0_rtx; | |
2347 | } | |
f5d927c0 | 2348 | |
462da2af | 2349 | switch (GET_CODE (cond_rtx)) |
3cf2715d DE |
2350 | { |
2351 | case GTU: | |
2352 | case GT: | |
2353 | case LTU: | |
2354 | case LT: | |
2355 | case GEU: | |
2356 | case GE: | |
2357 | case LEU: | |
2358 | case LE: | |
2359 | case EQ: | |
2360 | case NE: | |
2361 | { | |
b3694847 | 2362 | int result; |
462da2af | 2363 | if (XEXP (cond_rtx, 0) != cc0_rtx) |
3cf2715d | 2364 | break; |
462da2af | 2365 | result = alter_cond (cond_rtx); |
3cf2715d | 2366 | if (result == 1) |
b88c92cc | 2367 | validate_change (insn, &SET_SRC (set), then_rtx, 0); |
3cf2715d | 2368 | else if (result == -1) |
b88c92cc | 2369 | validate_change (insn, &SET_SRC (set), else_rtx, 0); |
3cf2715d DE |
2370 | else if (result == 2) |
2371 | INSN_CODE (insn) = -1; | |
b88c92cc | 2372 | if (SET_DEST (set) == SET_SRC (set)) |
ca6c03ca | 2373 | delete_insn (insn); |
3cf2715d | 2374 | } |
e9a25f70 JL |
2375 | break; |
2376 | ||
2377 | default: | |
2378 | break; | |
3cf2715d DE |
2379 | } |
2380 | } | |
462da2af | 2381 | |
3cf2715d DE |
2382 | #endif |
2383 | ||
ede7cd44 | 2384 | #ifdef HAVE_peephole |
3cf2715d DE |
2385 | /* Do machine-specific peephole optimizations if desired. */ |
2386 | ||
2387 | if (optimize && !flag_no_peephole && !nopeepholes) | |
2388 | { | |
2389 | rtx next = peephole (insn); | |
2390 | /* When peepholing, if there were notes within the peephole, | |
2391 | emit them before the peephole. */ | |
2392 | if (next != 0 && next != NEXT_INSN (insn)) | |
2393 | { | |
2394 | rtx prev = PREV_INSN (insn); | |
3cf2715d DE |
2395 | |
2396 | for (note = NEXT_INSN (insn); note != next; | |
2397 | note = NEXT_INSN (note)) | |
2398 | final_scan_insn (note, file, optimize, prescan, nopeepholes); | |
2399 | ||
2400 | /* In case this is prescan, put the notes | |
2401 | in proper position for later rescan. */ | |
2402 | note = NEXT_INSN (insn); | |
2403 | PREV_INSN (note) = prev; | |
2404 | NEXT_INSN (prev) = note; | |
2405 | NEXT_INSN (PREV_INSN (next)) = insn; | |
2406 | PREV_INSN (insn) = PREV_INSN (next); | |
2407 | NEXT_INSN (insn) = next; | |
2408 | PREV_INSN (next) = insn; | |
2409 | } | |
2410 | ||
2411 | /* PEEPHOLE might have changed this. */ | |
2412 | body = PATTERN (insn); | |
2413 | } | |
ede7cd44 | 2414 | #endif |
3cf2715d DE |
2415 | |
2416 | /* Try to recognize the instruction. | |
2417 | If successful, verify that the operands satisfy the | |
2418 | constraints for the instruction. Crash if they don't, | |
2419 | since `reload' should have changed them so that they do. */ | |
2420 | ||
2421 | insn_code_number = recog_memoized (insn); | |
0304f787 | 2422 | cleanup_subreg_operands (insn); |
3cf2715d | 2423 | |
dd3f0101 KH |
2424 | /* Dump the insn in the assembly for debugging. */ |
2425 | if (flag_dump_rtl_in_asm) | |
2426 | { | |
2427 | print_rtx_head = ASM_COMMENT_START; | |
2428 | print_rtl_single (asm_out_file, insn); | |
2429 | print_rtx_head = ""; | |
2430 | } | |
b9f22704 | 2431 | |
6c698a6d | 2432 | if (! constrain_operands_cached (1)) |
3cf2715d | 2433 | fatal_insn_not_found (insn); |
3cf2715d DE |
2434 | |
2435 | /* Some target machines need to prescan each insn before | |
2436 | it is output. */ | |
2437 | ||
2438 | #ifdef FINAL_PRESCAN_INSN | |
1ccbefce | 2439 | FINAL_PRESCAN_INSN (insn, recog_data.operand, recog_data.n_operands); |
3cf2715d DE |
2440 | #endif |
2441 | ||
afe48e06 RH |
2442 | #ifdef HAVE_conditional_execution |
2443 | if (GET_CODE (PATTERN (insn)) == COND_EXEC) | |
2444 | current_insn_predicate = COND_EXEC_TEST (PATTERN (insn)); | |
2445 | else | |
2446 | current_insn_predicate = NULL_RTX; | |
2447 | #endif | |
2448 | ||
3cf2715d DE |
2449 | #ifdef HAVE_cc0 |
2450 | cc_prev_status = cc_status; | |
2451 | ||
2452 | /* Update `cc_status' for this instruction. | |
2453 | The instruction's output routine may change it further. | |
2454 | If the output routine for a jump insn needs to depend | |
2455 | on the cc status, it should look at cc_prev_status. */ | |
2456 | ||
2457 | NOTICE_UPDATE_CC (body, insn); | |
2458 | #endif | |
2459 | ||
b1a9f6a0 | 2460 | current_output_insn = debug_insn = insn; |
3cf2715d | 2461 | |
f73ad30e | 2462 | #if defined (DWARF2_UNWIND_INFO) |
fbfa55b0 | 2463 | if (GET_CODE (insn) == CALL_INSN && dwarf2out_do_frame ()) |
b57d9225 JM |
2464 | dwarf2out_frame_debug (insn); |
2465 | #endif | |
2466 | ||
4bbf910e RH |
2467 | /* Find the proper template for this insn. */ |
2468 | template = get_insn_template (insn_code_number, insn); | |
3cf2715d | 2469 | |
4bbf910e RH |
2470 | /* If the C code returns 0, it means that it is a jump insn |
2471 | which follows a deleted test insn, and that test insn | |
2472 | needs to be reinserted. */ | |
3cf2715d DE |
2473 | if (template == 0) |
2474 | { | |
efd0378b HPN |
2475 | rtx prev; |
2476 | ||
4bbf910e RH |
2477 | if (prev_nonnote_insn (insn) != last_ignored_compare) |
2478 | abort (); | |
efd0378b HPN |
2479 | |
2480 | /* We have already processed the notes between the setter and | |
2481 | the user. Make sure we don't process them again, this is | |
2482 | particularly important if one of the notes is a block | |
2483 | scope note or an EH note. */ | |
2484 | for (prev = insn; | |
2485 | prev != last_ignored_compare; | |
2486 | prev = PREV_INSN (prev)) | |
2487 | { | |
2488 | if (GET_CODE (prev) == NOTE) | |
ca6c03ca | 2489 | delete_insn (prev); /* Use delete_note. */ |
efd0378b HPN |
2490 | } |
2491 | ||
2492 | return prev; | |
3cf2715d DE |
2493 | } |
2494 | ||
2495 | /* If the template is the string "#", it means that this insn must | |
2496 | be split. */ | |
2497 | if (template[0] == '#' && template[1] == '\0') | |
2498 | { | |
2499 | rtx new = try_split (body, insn, 0); | |
2500 | ||
2501 | /* If we didn't split the insn, go away. */ | |
2502 | if (new == insn && PATTERN (new) == body) | |
c725bd79 | 2503 | fatal_insn ("could not split insn", insn); |
f5d927c0 | 2504 | |
3d14e82f JW |
2505 | #ifdef HAVE_ATTR_length |
2506 | /* This instruction should have been split in shorten_branches, | |
2507 | to ensure that we would have valid length info for the | |
2508 | splitees. */ | |
2509 | abort (); | |
2510 | #endif | |
2511 | ||
3cf2715d DE |
2512 | return new; |
2513 | } | |
f5d927c0 | 2514 | |
3cf2715d DE |
2515 | if (prescan > 0) |
2516 | break; | |
2517 | ||
ce152ef8 AM |
2518 | #ifdef IA64_UNWIND_INFO |
2519 | IA64_UNWIND_EMIT (asm_out_file, insn); | |
2520 | #endif | |
3cf2715d DE |
2521 | /* Output assembler code from the template. */ |
2522 | ||
1ccbefce | 2523 | output_asm_insn (template, recog_data.operand); |
3cf2715d | 2524 | |
d660cefe RS |
2525 | /* If necessary, report the effect that the instruction has on |
2526 | the unwind info. We've already done this for delay slots | |
2527 | and call instructions. */ | |
0021b564 | 2528 | #if defined (DWARF2_UNWIND_INFO) |
d660cefe RS |
2529 | if (GET_CODE (insn) == INSN |
2530 | #if !defined (HAVE_prologue) | |
2531 | && !ACCUMULATE_OUTGOING_ARGS | |
2532 | #endif | |
2533 | && final_sequence == 0 | |
fbfa55b0 RH |
2534 | && dwarf2out_do_frame ()) |
2535 | dwarf2out_frame_debug (insn); | |
0021b564 | 2536 | #endif |
469ac993 | 2537 | |
3cf2715d DE |
2538 | #if 0 |
2539 | /* It's not at all clear why we did this and doing so interferes | |
2540 | with tests we'd like to do to use REG_WAS_0 notes, so let's try | |
2541 | with this out. */ | |
2542 | ||
2543 | /* Mark this insn as having been output. */ | |
2544 | INSN_DELETED_P (insn) = 1; | |
2545 | #endif | |
2546 | ||
4a8d0c9c RH |
2547 | /* Emit information for vtable gc. */ |
2548 | note = find_reg_note (insn, REG_VTABLE_REF, NULL_RTX); | |
2549 | if (note) | |
2550 | assemble_vtable_entry (XEXP (XEXP (note, 0), 0), | |
2551 | INTVAL (XEXP (XEXP (note, 0), 1))); | |
2552 | ||
b1a9f6a0 | 2553 | current_output_insn = debug_insn = 0; |
3cf2715d DE |
2554 | } |
2555 | } | |
2556 | return NEXT_INSN (insn); | |
2557 | } | |
2558 | \f | |
2559 | /* Output debugging info to the assembler file FILE | |
2560 | based on the NOTE-insn INSN, assumed to be a line number. */ | |
2561 | ||
2562 | static void | |
653e276c | 2563 | notice_source_line (insn) |
3cf2715d DE |
2564 | rtx insn; |
2565 | { | |
b3694847 | 2566 | const char *filename = NOTE_SOURCE_FILE (insn); |
3cf2715d | 2567 | |
3cf2715d DE |
2568 | last_filename = filename; |
2569 | last_linenum = NOTE_LINE_NUMBER (insn); | |
eac40081 RK |
2570 | high_block_linenum = MAX (last_linenum, high_block_linenum); |
2571 | high_function_linenum = MAX (last_linenum, high_function_linenum); | |
3cf2715d DE |
2572 | } |
2573 | \f | |
0304f787 JL |
2574 | /* For each operand in INSN, simplify (subreg (reg)) so that it refers |
2575 | directly to the desired hard register. */ | |
f5d927c0 | 2576 | |
0304f787 JL |
2577 | void |
2578 | cleanup_subreg_operands (insn) | |
2579 | rtx insn; | |
2580 | { | |
f62a15e3 | 2581 | int i; |
6c698a6d | 2582 | extract_insn_cached (insn); |
1ccbefce | 2583 | for (i = 0; i < recog_data.n_operands; i++) |
0304f787 | 2584 | { |
9f4524f2 RE |
2585 | /* The following test cannot use recog_data.operand when tesing |
2586 | for a SUBREG: the underlying object might have been changed | |
2587 | already if we are inside a match_operator expression that | |
2588 | matches the else clause. Instead we test the underlying | |
2589 | expression directly. */ | |
2590 | if (GET_CODE (*recog_data.operand_loc[i]) == SUBREG) | |
49d801d3 | 2591 | recog_data.operand[i] = alter_subreg (recog_data.operand_loc[i]); |
1ccbefce | 2592 | else if (GET_CODE (recog_data.operand[i]) == PLUS |
04337620 BS |
2593 | || GET_CODE (recog_data.operand[i]) == MULT |
2594 | || GET_CODE (recog_data.operand[i]) == MEM) | |
49d801d3 | 2595 | recog_data.operand[i] = walk_alter_subreg (recog_data.operand_loc[i]); |
0304f787 JL |
2596 | } |
2597 | ||
1ccbefce | 2598 | for (i = 0; i < recog_data.n_dups; i++) |
0304f787 | 2599 | { |
1ccbefce | 2600 | if (GET_CODE (*recog_data.dup_loc[i]) == SUBREG) |
49d801d3 | 2601 | *recog_data.dup_loc[i] = alter_subreg (recog_data.dup_loc[i]); |
1ccbefce | 2602 | else if (GET_CODE (*recog_data.dup_loc[i]) == PLUS |
04337620 BS |
2603 | || GET_CODE (*recog_data.dup_loc[i]) == MULT |
2604 | || GET_CODE (*recog_data.dup_loc[i]) == MEM) | |
49d801d3 | 2605 | *recog_data.dup_loc[i] = walk_alter_subreg (recog_data.dup_loc[i]); |
0304f787 JL |
2606 | } |
2607 | } | |
2608 | ||
3cf2715d DE |
2609 | /* If X is a SUBREG, replace it with a REG or a MEM, |
2610 | based on the thing it is a subreg of. */ | |
2611 | ||
2612 | rtx | |
49d801d3 JH |
2613 | alter_subreg (xp) |
2614 | rtx *xp; | |
3cf2715d | 2615 | { |
49d801d3 | 2616 | rtx x = *xp; |
b3694847 | 2617 | rtx y = SUBREG_REG (x); |
f5963e61 | 2618 | |
49d801d3 JH |
2619 | /* simplify_subreg does not remove subreg from volatile references. |
2620 | We are required to. */ | |
2621 | if (GET_CODE (y) == MEM) | |
2622 | *xp = adjust_address (y, GET_MODE (x), SUBREG_BYTE (x)); | |
2623 | else | |
fea54805 RK |
2624 | { |
2625 | rtx new = simplify_subreg (GET_MODE (x), y, GET_MODE (y), | |
2626 | SUBREG_BYTE (x)); | |
2627 | ||
2628 | if (new != 0) | |
2629 | *xp = new; | |
2630 | /* Simplify_subreg can't handle some REG cases, but we have to. */ | |
2631 | else if (GET_CODE (y) == REG) | |
2632 | { | |
7687c5b8 | 2633 | unsigned int regno = subreg_hard_regno (x, 1); |
a560d4d4 | 2634 | *xp = gen_rtx_REG_offset (y, GET_MODE (x), regno, SUBREG_BYTE (x)); |
fea54805 RK |
2635 | } |
2636 | else | |
2637 | abort (); | |
2638 | } | |
2639 | ||
49d801d3 | 2640 | return *xp; |
3cf2715d DE |
2641 | } |
2642 | ||
2643 | /* Do alter_subreg on all the SUBREGs contained in X. */ | |
2644 | ||
2645 | static rtx | |
49d801d3 JH |
2646 | walk_alter_subreg (xp) |
2647 | rtx *xp; | |
3cf2715d | 2648 | { |
49d801d3 | 2649 | rtx x = *xp; |
3cf2715d DE |
2650 | switch (GET_CODE (x)) |
2651 | { | |
2652 | case PLUS: | |
2653 | case MULT: | |
49d801d3 JH |
2654 | XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0)); |
2655 | XEXP (x, 1) = walk_alter_subreg (&XEXP (x, 1)); | |
3cf2715d DE |
2656 | break; |
2657 | ||
2658 | case MEM: | |
49d801d3 | 2659 | XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0)); |
3cf2715d DE |
2660 | break; |
2661 | ||
2662 | case SUBREG: | |
49d801d3 | 2663 | return alter_subreg (xp); |
f5d927c0 | 2664 | |
e9a25f70 JL |
2665 | default: |
2666 | break; | |
3cf2715d DE |
2667 | } |
2668 | ||
5bc72aeb | 2669 | return *xp; |
3cf2715d DE |
2670 | } |
2671 | \f | |
2672 | #ifdef HAVE_cc0 | |
2673 | ||
2674 | /* Given BODY, the body of a jump instruction, alter the jump condition | |
2675 | as required by the bits that are set in cc_status.flags. | |
2676 | Not all of the bits there can be handled at this level in all cases. | |
2677 | ||
2678 | The value is normally 0. | |
2679 | 1 means that the condition has become always true. | |
2680 | -1 means that the condition has become always false. | |
2681 | 2 means that COND has been altered. */ | |
2682 | ||
2683 | static int | |
2684 | alter_cond (cond) | |
b3694847 | 2685 | rtx cond; |
3cf2715d DE |
2686 | { |
2687 | int value = 0; | |
2688 | ||
2689 | if (cc_status.flags & CC_REVERSED) | |
2690 | { | |
2691 | value = 2; | |
2692 | PUT_CODE (cond, swap_condition (GET_CODE (cond))); | |
2693 | } | |
2694 | ||
2695 | if (cc_status.flags & CC_INVERTED) | |
2696 | { | |
2697 | value = 2; | |
2698 | PUT_CODE (cond, reverse_condition (GET_CODE (cond))); | |
2699 | } | |
2700 | ||
2701 | if (cc_status.flags & CC_NOT_POSITIVE) | |
2702 | switch (GET_CODE (cond)) | |
2703 | { | |
2704 | case LE: | |
2705 | case LEU: | |
2706 | case GEU: | |
2707 | /* Jump becomes unconditional. */ | |
2708 | return 1; | |
2709 | ||
2710 | case GT: | |
2711 | case GTU: | |
2712 | case LTU: | |
2713 | /* Jump becomes no-op. */ | |
2714 | return -1; | |
2715 | ||
2716 | case GE: | |
2717 | PUT_CODE (cond, EQ); | |
2718 | value = 2; | |
2719 | break; | |
2720 | ||
2721 | case LT: | |
2722 | PUT_CODE (cond, NE); | |
2723 | value = 2; | |
2724 | break; | |
f5d927c0 | 2725 | |
e9a25f70 JL |
2726 | default: |
2727 | break; | |
3cf2715d DE |
2728 | } |
2729 | ||
2730 | if (cc_status.flags & CC_NOT_NEGATIVE) | |
2731 | switch (GET_CODE (cond)) | |
2732 | { | |
2733 | case GE: | |
2734 | case GEU: | |
2735 | /* Jump becomes unconditional. */ | |
2736 | return 1; | |
2737 | ||
2738 | case LT: | |
2739 | case LTU: | |
2740 | /* Jump becomes no-op. */ | |
2741 | return -1; | |
2742 | ||
2743 | case LE: | |
2744 | case LEU: | |
2745 | PUT_CODE (cond, EQ); | |
2746 | value = 2; | |
2747 | break; | |
2748 | ||
2749 | case GT: | |
2750 | case GTU: | |
2751 | PUT_CODE (cond, NE); | |
2752 | value = 2; | |
2753 | break; | |
f5d927c0 | 2754 | |
e9a25f70 JL |
2755 | default: |
2756 | break; | |
3cf2715d DE |
2757 | } |
2758 | ||
2759 | if (cc_status.flags & CC_NO_OVERFLOW) | |
2760 | switch (GET_CODE (cond)) | |
2761 | { | |
2762 | case GEU: | |
2763 | /* Jump becomes unconditional. */ | |
2764 | return 1; | |
2765 | ||
2766 | case LEU: | |
2767 | PUT_CODE (cond, EQ); | |
2768 | value = 2; | |
2769 | break; | |
2770 | ||
2771 | case GTU: | |
2772 | PUT_CODE (cond, NE); | |
2773 | value = 2; | |
2774 | break; | |
2775 | ||
2776 | case LTU: | |
2777 | /* Jump becomes no-op. */ | |
2778 | return -1; | |
f5d927c0 | 2779 | |
e9a25f70 JL |
2780 | default: |
2781 | break; | |
3cf2715d DE |
2782 | } |
2783 | ||
2784 | if (cc_status.flags & (CC_Z_IN_NOT_N | CC_Z_IN_N)) | |
2785 | switch (GET_CODE (cond)) | |
2786 | { | |
e9a25f70 | 2787 | default: |
3cf2715d DE |
2788 | abort (); |
2789 | ||
2790 | case NE: | |
2791 | PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? GE : LT); | |
2792 | value = 2; | |
2793 | break; | |
2794 | ||
2795 | case EQ: | |
2796 | PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? LT : GE); | |
2797 | value = 2; | |
2798 | break; | |
2799 | } | |
2800 | ||
2801 | if (cc_status.flags & CC_NOT_SIGNED) | |
2802 | /* The flags are valid if signed condition operators are converted | |
2803 | to unsigned. */ | |
2804 | switch (GET_CODE (cond)) | |
2805 | { | |
2806 | case LE: | |
2807 | PUT_CODE (cond, LEU); | |
2808 | value = 2; | |
2809 | break; | |
2810 | ||
2811 | case LT: | |
2812 | PUT_CODE (cond, LTU); | |
2813 | value = 2; | |
2814 | break; | |
2815 | ||
2816 | case GT: | |
2817 | PUT_CODE (cond, GTU); | |
2818 | value = 2; | |
2819 | break; | |
2820 | ||
2821 | case GE: | |
2822 | PUT_CODE (cond, GEU); | |
2823 | value = 2; | |
2824 | break; | |
e9a25f70 JL |
2825 | |
2826 | default: | |
2827 | break; | |
3cf2715d DE |
2828 | } |
2829 | ||
2830 | return value; | |
2831 | } | |
2832 | #endif | |
2833 | \f | |
2834 | /* Report inconsistency between the assembler template and the operands. | |
2835 | In an `asm', it's the user's fault; otherwise, the compiler's fault. */ | |
2836 | ||
2837 | void | |
e34d07f2 | 2838 | output_operand_lossage (const char *msgid, ...) |
3cf2715d | 2839 | { |
a52453cc PT |
2840 | char *fmt_string; |
2841 | char *new_message; | |
fd478a0a | 2842 | const char *pfx_str; |
e34d07f2 KG |
2843 | va_list ap; |
2844 | ||
2845 | va_start (ap, msgid); | |
a52453cc PT |
2846 | |
2847 | pfx_str = this_is_asm_operands ? _("invalid `asm': ") : "output_operand: "; | |
2848 | asprintf (&fmt_string, "%s%s", pfx_str, _(msgid)); | |
2849 | vasprintf (&new_message, fmt_string, ap); | |
dd3f0101 | 2850 | |
3cf2715d | 2851 | if (this_is_asm_operands) |
a52453cc | 2852 | error_for_asm (this_is_asm_operands, "%s", new_message); |
3cf2715d | 2853 | else |
a52453cc PT |
2854 | internal_error ("%s", new_message); |
2855 | ||
2856 | free (fmt_string); | |
2857 | free (new_message); | |
e34d07f2 | 2858 | va_end (ap); |
3cf2715d DE |
2859 | } |
2860 | \f | |
2861 | /* Output of assembler code from a template, and its subroutines. */ | |
2862 | ||
0d4903b8 RK |
2863 | /* Annotate the assembly with a comment describing the pattern and |
2864 | alternative used. */ | |
2865 | ||
2866 | static void | |
2867 | output_asm_name () | |
2868 | { | |
2869 | if (debug_insn) | |
2870 | { | |
2871 | int num = INSN_CODE (debug_insn); | |
2872 | fprintf (asm_out_file, "\t%s %d\t%s", | |
2873 | ASM_COMMENT_START, INSN_UID (debug_insn), | |
2874 | insn_data[num].name); | |
2875 | if (insn_data[num].n_alternatives > 1) | |
2876 | fprintf (asm_out_file, "/%d", which_alternative + 1); | |
2877 | #ifdef HAVE_ATTR_length | |
2878 | fprintf (asm_out_file, "\t[length = %d]", | |
2879 | get_attr_length (debug_insn)); | |
2880 | #endif | |
2881 | /* Clear this so only the first assembler insn | |
2882 | of any rtl insn will get the special comment for -dp. */ | |
2883 | debug_insn = 0; | |
2884 | } | |
2885 | } | |
2886 | ||
998d7deb RH |
2887 | /* If OP is a REG or MEM and we can find a MEM_EXPR corresponding to it |
2888 | or its address, return that expr . Set *PADDRESSP to 1 if the expr | |
c5adc06a RK |
2889 | corresponds to the address of the object and 0 if to the object. */ |
2890 | ||
2891 | static tree | |
998d7deb | 2892 | get_mem_expr_from_op (op, paddressp) |
c5adc06a RK |
2893 | rtx op; |
2894 | int *paddressp; | |
2895 | { | |
998d7deb | 2896 | tree expr; |
c5adc06a RK |
2897 | int inner_addressp; |
2898 | ||
2899 | *paddressp = 0; | |
2900 | ||
a560d4d4 JH |
2901 | if (GET_CODE (op) == REG) |
2902 | return REG_EXPR (op); | |
c5adc06a RK |
2903 | else if (GET_CODE (op) != MEM) |
2904 | return 0; | |
2905 | ||
998d7deb RH |
2906 | if (MEM_EXPR (op) != 0) |
2907 | return MEM_EXPR (op); | |
c5adc06a RK |
2908 | |
2909 | /* Otherwise we have an address, so indicate it and look at the address. */ | |
2910 | *paddressp = 1; | |
2911 | op = XEXP (op, 0); | |
2912 | ||
2913 | /* First check if we have a decl for the address, then look at the right side | |
2914 | if it is a PLUS. Otherwise, strip off arithmetic and keep looking. | |
2915 | But don't allow the address to itself be indirect. */ | |
998d7deb RH |
2916 | if ((expr = get_mem_expr_from_op (op, &inner_addressp)) && ! inner_addressp) |
2917 | return expr; | |
c5adc06a | 2918 | else if (GET_CODE (op) == PLUS |
998d7deb RH |
2919 | && (expr = get_mem_expr_from_op (XEXP (op, 1), &inner_addressp))) |
2920 | return expr; | |
c5adc06a RK |
2921 | |
2922 | while (GET_RTX_CLASS (GET_CODE (op)) == '1' | |
2923 | || GET_RTX_CLASS (GET_CODE (op)) == '2') | |
2924 | op = XEXP (op, 0); | |
2925 | ||
998d7deb RH |
2926 | expr = get_mem_expr_from_op (op, &inner_addressp); |
2927 | return inner_addressp ? 0 : expr; | |
c5adc06a | 2928 | } |
ff81832f | 2929 | |
4f9b4029 RK |
2930 | /* Output operand names for assembler instructions. OPERANDS is the |
2931 | operand vector, OPORDER is the order to write the operands, and NOPS | |
2932 | is the number of operands to write. */ | |
2933 | ||
2934 | static void | |
2935 | output_asm_operand_names (operands, oporder, nops) | |
2936 | rtx *operands; | |
2937 | int *oporder; | |
2938 | int nops; | |
2939 | { | |
2940 | int wrote = 0; | |
2941 | int i; | |
2942 | ||
2943 | for (i = 0; i < nops; i++) | |
2944 | { | |
2945 | int addressp; | |
a560d4d4 JH |
2946 | rtx op = operands[oporder[i]]; |
2947 | tree expr = get_mem_expr_from_op (op, &addressp); | |
4f9b4029 | 2948 | |
a560d4d4 JH |
2949 | fprintf (asm_out_file, "%c%s", |
2950 | wrote ? ',' : '\t', wrote ? "" : ASM_COMMENT_START); | |
2951 | wrote = 1; | |
998d7deb | 2952 | if (expr) |
4f9b4029 | 2953 | { |
a560d4d4 | 2954 | fprintf (asm_out_file, "%s", |
998d7deb RH |
2955 | addressp ? "*" : ""); |
2956 | print_mem_expr (asm_out_file, expr); | |
4f9b4029 RK |
2957 | wrote = 1; |
2958 | } | |
a560d4d4 JH |
2959 | else if (REG_P (op) && ORIGINAL_REGNO (op) |
2960 | && ORIGINAL_REGNO (op) != REGNO (op)) | |
2961 | fprintf (asm_out_file, " tmp%i", ORIGINAL_REGNO (op)); | |
4f9b4029 RK |
2962 | } |
2963 | } | |
2964 | ||
3cf2715d DE |
2965 | /* Output text from TEMPLATE to the assembler output file, |
2966 | obeying %-directions to substitute operands taken from | |
2967 | the vector OPERANDS. | |
2968 | ||
2969 | %N (for N a digit) means print operand N in usual manner. | |
2970 | %lN means require operand N to be a CODE_LABEL or LABEL_REF | |
2971 | and print the label name with no punctuation. | |
2972 | %cN means require operand N to be a constant | |
2973 | and print the constant expression with no punctuation. | |
2974 | %aN means expect operand N to be a memory address | |
2975 | (not a memory reference!) and print a reference | |
2976 | to that address. | |
2977 | %nN means expect operand N to be a constant | |
2978 | and print a constant expression for minus the value | |
2979 | of the operand, with no other punctuation. */ | |
2980 | ||
2981 | void | |
2982 | output_asm_insn (template, operands) | |
9b3142b3 | 2983 | const char *template; |
3cf2715d DE |
2984 | rtx *operands; |
2985 | { | |
b3694847 SS |
2986 | const char *p; |
2987 | int c; | |
8554d9a4 JJ |
2988 | #ifdef ASSEMBLER_DIALECT |
2989 | int dialect = 0; | |
2990 | #endif | |
0d4903b8 | 2991 | int oporder[MAX_RECOG_OPERANDS]; |
4f9b4029 | 2992 | char opoutput[MAX_RECOG_OPERANDS]; |
0d4903b8 | 2993 | int ops = 0; |
3cf2715d DE |
2994 | |
2995 | /* An insn may return a null string template | |
2996 | in a case where no assembler code is needed. */ | |
2997 | if (*template == 0) | |
2998 | return; | |
2999 | ||
4f9b4029 | 3000 | memset (opoutput, 0, sizeof opoutput); |
3cf2715d DE |
3001 | p = template; |
3002 | putc ('\t', asm_out_file); | |
3003 | ||
3004 | #ifdef ASM_OUTPUT_OPCODE | |
3005 | ASM_OUTPUT_OPCODE (asm_out_file, p); | |
3006 | #endif | |
3007 | ||
b729186a | 3008 | while ((c = *p++)) |
3cf2715d DE |
3009 | switch (c) |
3010 | { | |
3cf2715d | 3011 | case '\n': |
4f9b4029 RK |
3012 | if (flag_verbose_asm) |
3013 | output_asm_operand_names (operands, oporder, ops); | |
0d4903b8 RK |
3014 | if (flag_print_asm_name) |
3015 | output_asm_name (); | |
3016 | ||
4f9b4029 RK |
3017 | ops = 0; |
3018 | memset (opoutput, 0, sizeof opoutput); | |
3019 | ||
3cf2715d | 3020 | putc (c, asm_out_file); |
cb649530 | 3021 | #ifdef ASM_OUTPUT_OPCODE |
3cf2715d DE |
3022 | while ((c = *p) == '\t') |
3023 | { | |
3024 | putc (c, asm_out_file); | |
3025 | p++; | |
3026 | } | |
3027 | ASM_OUTPUT_OPCODE (asm_out_file, p); | |
3cf2715d | 3028 | #endif |
cb649530 | 3029 | break; |
3cf2715d DE |
3030 | |
3031 | #ifdef ASSEMBLER_DIALECT | |
3032 | case '{': | |
b729186a | 3033 | { |
b3694847 | 3034 | int i; |
f5d927c0 | 3035 | |
8554d9a4 JJ |
3036 | if (dialect) |
3037 | output_operand_lossage ("nested assembly dialect alternatives"); | |
3038 | else | |
3039 | dialect = 1; | |
3040 | ||
b729186a JL |
3041 | /* If we want the first dialect, do nothing. Otherwise, skip |
3042 | DIALECT_NUMBER of strings ending with '|'. */ | |
3043 | for (i = 0; i < dialect_number; i++) | |
3044 | { | |
463a8384 | 3045 | while (*p && *p != '}' && *p++ != '|') |
b729186a | 3046 | ; |
463a8384 BS |
3047 | if (*p == '}') |
3048 | break; | |
b729186a JL |
3049 | if (*p == '|') |
3050 | p++; | |
3051 | } | |
8554d9a4 JJ |
3052 | |
3053 | if (*p == '\0') | |
3054 | output_operand_lossage ("unterminated assembly dialect alternative"); | |
b729186a | 3055 | } |
3cf2715d DE |
3056 | break; |
3057 | ||
3058 | case '|': | |
8554d9a4 JJ |
3059 | if (dialect) |
3060 | { | |
3061 | /* Skip to close brace. */ | |
3062 | do | |
3063 | { | |
3064 | if (*p == '\0') | |
3065 | { | |
3066 | output_operand_lossage ("unterminated assembly dialect alternative"); | |
3067 | break; | |
3068 | } | |
ff81832f | 3069 | } |
8554d9a4 JJ |
3070 | while (*p++ != '}'); |
3071 | dialect = 0; | |
3072 | } | |
3073 | else | |
3074 | putc (c, asm_out_file); | |
3cf2715d DE |
3075 | break; |
3076 | ||
3077 | case '}': | |
8554d9a4 JJ |
3078 | if (! dialect) |
3079 | putc (c, asm_out_file); | |
3080 | dialect = 0; | |
3cf2715d DE |
3081 | break; |
3082 | #endif | |
3083 | ||
3084 | case '%': | |
3085 | /* %% outputs a single %. */ | |
3086 | if (*p == '%') | |
3087 | { | |
3088 | p++; | |
3089 | putc (c, asm_out_file); | |
3090 | } | |
3091 | /* %= outputs a number which is unique to each insn in the entire | |
3092 | compilation. This is useful for making local labels that are | |
3093 | referred to more than once in a given insn. */ | |
3094 | else if (*p == '=') | |
3095 | { | |
3096 | p++; | |
3097 | fprintf (asm_out_file, "%d", insn_counter); | |
3098 | } | |
3099 | /* % followed by a letter and some digits | |
3100 | outputs an operand in a special way depending on the letter. | |
3101 | Letters `acln' are implemented directly. | |
3102 | Other letters are passed to `output_operand' so that | |
3103 | the PRINT_OPERAND macro can define them. */ | |
0df6c2c7 | 3104 | else if (ISALPHA (*p)) |
3cf2715d DE |
3105 | { |
3106 | int letter = *p++; | |
3107 | c = atoi (p); | |
3108 | ||
0df6c2c7 | 3109 | if (! ISDIGIT (*p)) |
a52453cc | 3110 | output_operand_lossage ("operand number missing after %%-letter"); |
0d4903b8 RK |
3111 | else if (this_is_asm_operands |
3112 | && (c < 0 || (unsigned int) c >= insn_noperands)) | |
3cf2715d DE |
3113 | output_operand_lossage ("operand number out of range"); |
3114 | else if (letter == 'l') | |
3115 | output_asm_label (operands[c]); | |
3116 | else if (letter == 'a') | |
3117 | output_address (operands[c]); | |
3118 | else if (letter == 'c') | |
3119 | { | |
3120 | if (CONSTANT_ADDRESS_P (operands[c])) | |
3121 | output_addr_const (asm_out_file, operands[c]); | |
3122 | else | |
3123 | output_operand (operands[c], 'c'); | |
3124 | } | |
3125 | else if (letter == 'n') | |
3126 | { | |
3127 | if (GET_CODE (operands[c]) == CONST_INT) | |
21e3a81b | 3128 | fprintf (asm_out_file, HOST_WIDE_INT_PRINT_DEC, |
3cf2715d DE |
3129 | - INTVAL (operands[c])); |
3130 | else | |
3131 | { | |
3132 | putc ('-', asm_out_file); | |
3133 | output_addr_const (asm_out_file, operands[c]); | |
3134 | } | |
3135 | } | |
3136 | else | |
3137 | output_operand (operands[c], letter); | |
f5d927c0 | 3138 | |
4f9b4029 RK |
3139 | if (!opoutput[c]) |
3140 | oporder[ops++] = c; | |
3141 | opoutput[c] = 1; | |
0d4903b8 | 3142 | |
0df6c2c7 | 3143 | while (ISDIGIT (c = *p)) |
f5d927c0 | 3144 | p++; |
3cf2715d DE |
3145 | } |
3146 | /* % followed by a digit outputs an operand the default way. */ | |
0df6c2c7 | 3147 | else if (ISDIGIT (*p)) |
3cf2715d DE |
3148 | { |
3149 | c = atoi (p); | |
f5d927c0 KH |
3150 | if (this_is_asm_operands |
3151 | && (c < 0 || (unsigned int) c >= insn_noperands)) | |
3cf2715d DE |
3152 | output_operand_lossage ("operand number out of range"); |
3153 | else | |
3154 | output_operand (operands[c], 0); | |
0d4903b8 | 3155 | |
4f9b4029 RK |
3156 | if (!opoutput[c]) |
3157 | oporder[ops++] = c; | |
3158 | opoutput[c] = 1; | |
3159 | ||
0df6c2c7 | 3160 | while (ISDIGIT (c = *p)) |
f5d927c0 | 3161 | p++; |
3cf2715d DE |
3162 | } |
3163 | /* % followed by punctuation: output something for that | |
3164 | punctuation character alone, with no operand. | |
3165 | The PRINT_OPERAND macro decides what is actually done. */ | |
3166 | #ifdef PRINT_OPERAND_PUNCT_VALID_P | |
f5d927c0 | 3167 | else if (PRINT_OPERAND_PUNCT_VALID_P ((unsigned char) *p)) |
3cf2715d DE |
3168 | output_operand (NULL_RTX, *p++); |
3169 | #endif | |
3170 | else | |
3171 | output_operand_lossage ("invalid %%-code"); | |
3172 | break; | |
3173 | ||
3174 | default: | |
3175 | putc (c, asm_out_file); | |
3176 | } | |
3177 | ||
0d4903b8 RK |
3178 | /* Write out the variable names for operands, if we know them. */ |
3179 | if (flag_verbose_asm) | |
4f9b4029 | 3180 | output_asm_operand_names (operands, oporder, ops); |
0d4903b8 RK |
3181 | if (flag_print_asm_name) |
3182 | output_asm_name (); | |
3cf2715d DE |
3183 | |
3184 | putc ('\n', asm_out_file); | |
3185 | } | |
3186 | \f | |
3187 | /* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */ | |
3188 | ||
3189 | void | |
3190 | output_asm_label (x) | |
3191 | rtx x; | |
3192 | { | |
3193 | char buf[256]; | |
3194 | ||
3195 | if (GET_CODE (x) == LABEL_REF) | |
be1bb652 RH |
3196 | x = XEXP (x, 0); |
3197 | if (GET_CODE (x) == CODE_LABEL | |
3198 | || (GET_CODE (x) == NOTE | |
3199 | && NOTE_LINE_NUMBER (x) == NOTE_INSN_DELETED_LABEL)) | |
3cf2715d DE |
3200 | ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x)); |
3201 | else | |
a52453cc | 3202 | output_operand_lossage ("`%%l' operand isn't a label"); |
3cf2715d DE |
3203 | |
3204 | assemble_name (asm_out_file, buf); | |
3205 | } | |
3206 | ||
3207 | /* Print operand X using machine-dependent assembler syntax. | |
3208 | The macro PRINT_OPERAND is defined just to control this function. | |
3209 | CODE is a non-digit that preceded the operand-number in the % spec, | |
3210 | such as 'z' if the spec was `%z3'. CODE is 0 if there was no char | |
3211 | between the % and the digits. | |
3212 | When CODE is a non-letter, X is 0. | |
3213 | ||
3214 | The meanings of the letters are machine-dependent and controlled | |
3215 | by PRINT_OPERAND. */ | |
3216 | ||
3217 | static void | |
3218 | output_operand (x, code) | |
3219 | rtx x; | |
962f1324 | 3220 | int code ATTRIBUTE_UNUSED; |
3cf2715d DE |
3221 | { |
3222 | if (x && GET_CODE (x) == SUBREG) | |
49d801d3 | 3223 | x = alter_subreg (&x); |
3cf2715d DE |
3224 | |
3225 | /* If X is a pseudo-register, abort now rather than writing trash to the | |
3226 | assembler file. */ | |
3227 | ||
3228 | if (x && GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER) | |
3229 | abort (); | |
3230 | ||
3231 | PRINT_OPERAND (asm_out_file, x, code); | |
3232 | } | |
3233 | ||
3234 | /* Print a memory reference operand for address X | |
3235 | using machine-dependent assembler syntax. | |
3236 | The macro PRINT_OPERAND_ADDRESS exists just to control this function. */ | |
3237 | ||
3238 | void | |
3239 | output_address (x) | |
3240 | rtx x; | |
3241 | { | |
49d801d3 | 3242 | walk_alter_subreg (&x); |
3cf2715d DE |
3243 | PRINT_OPERAND_ADDRESS (asm_out_file, x); |
3244 | } | |
3245 | \f | |
3246 | /* Print an integer constant expression in assembler syntax. | |
3247 | Addition and subtraction are the only arithmetic | |
3248 | that may appear in these expressions. */ | |
3249 | ||
3250 | void | |
3251 | output_addr_const (file, x) | |
3252 | FILE *file; | |
3253 | rtx x; | |
3254 | { | |
3255 | char buf[256]; | |
3256 | ||
3257 | restart: | |
3258 | switch (GET_CODE (x)) | |
3259 | { | |
3260 | case PC: | |
eac50d7a | 3261 | putc ('.', file); |
3cf2715d DE |
3262 | break; |
3263 | ||
3264 | case SYMBOL_REF: | |
99c8c61c AO |
3265 | #ifdef ASM_OUTPUT_SYMBOL_REF |
3266 | ASM_OUTPUT_SYMBOL_REF (file, x); | |
3267 | #else | |
3cf2715d | 3268 | assemble_name (file, XSTR (x, 0)); |
99c8c61c | 3269 | #endif |
3cf2715d DE |
3270 | break; |
3271 | ||
3272 | case LABEL_REF: | |
422be3c3 AO |
3273 | x = XEXP (x, 0); |
3274 | /* Fall through. */ | |
3cf2715d DE |
3275 | case CODE_LABEL: |
3276 | ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x)); | |
2f0b7af6 GK |
3277 | #ifdef ASM_OUTPUT_LABEL_REF |
3278 | ASM_OUTPUT_LABEL_REF (file, buf); | |
3279 | #else | |
3cf2715d | 3280 | assemble_name (file, buf); |
2f0b7af6 | 3281 | #endif |
3cf2715d DE |
3282 | break; |
3283 | ||
3284 | case CONST_INT: | |
21e3a81b | 3285 | fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x)); |
3cf2715d DE |
3286 | break; |
3287 | ||
3288 | case CONST: | |
3289 | /* This used to output parentheses around the expression, | |
3290 | but that does not work on the 386 (either ATT or BSD assembler). */ | |
3291 | output_addr_const (file, XEXP (x, 0)); | |
3292 | break; | |
3293 | ||
3294 | case CONST_DOUBLE: | |
3295 | if (GET_MODE (x) == VOIDmode) | |
3296 | { | |
3297 | /* We can use %d if the number is one word and positive. */ | |
3298 | if (CONST_DOUBLE_HIGH (x)) | |
21e3a81b | 3299 | fprintf (file, HOST_WIDE_INT_PRINT_DOUBLE_HEX, |
3cf2715d | 3300 | CONST_DOUBLE_HIGH (x), CONST_DOUBLE_LOW (x)); |
f5d927c0 | 3301 | else if (CONST_DOUBLE_LOW (x) < 0) |
21e3a81b | 3302 | fprintf (file, HOST_WIDE_INT_PRINT_HEX, CONST_DOUBLE_LOW (x)); |
3cf2715d | 3303 | else |
21e3a81b | 3304 | fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x)); |
3cf2715d DE |
3305 | } |
3306 | else | |
3307 | /* We can't handle floating point constants; | |
3308 | PRINT_OPERAND must handle them. */ | |
3309 | output_operand_lossage ("floating constant misused"); | |
3310 | break; | |
3311 | ||
3312 | case PLUS: | |
3313 | /* Some assemblers need integer constants to appear last (eg masm). */ | |
3314 | if (GET_CODE (XEXP (x, 0)) == CONST_INT) | |
3315 | { | |
3316 | output_addr_const (file, XEXP (x, 1)); | |
3317 | if (INTVAL (XEXP (x, 0)) >= 0) | |
3318 | fprintf (file, "+"); | |
3319 | output_addr_const (file, XEXP (x, 0)); | |
3320 | } | |
3321 | else | |
3322 | { | |
3323 | output_addr_const (file, XEXP (x, 0)); | |
08106825 AO |
3324 | if (GET_CODE (XEXP (x, 1)) != CONST_INT |
3325 | || INTVAL (XEXP (x, 1)) >= 0) | |
3cf2715d DE |
3326 | fprintf (file, "+"); |
3327 | output_addr_const (file, XEXP (x, 1)); | |
3328 | } | |
3329 | break; | |
3330 | ||
3331 | case MINUS: | |
3332 | /* Avoid outputting things like x-x or x+5-x, | |
3333 | since some assemblers can't handle that. */ | |
3334 | x = simplify_subtraction (x); | |
3335 | if (GET_CODE (x) != MINUS) | |
3336 | goto restart; | |
3337 | ||
3338 | output_addr_const (file, XEXP (x, 0)); | |
3339 | fprintf (file, "-"); | |
301d03af RS |
3340 | if ((GET_CODE (XEXP (x, 1)) == CONST_INT && INTVAL (XEXP (x, 1)) >= 0) |
3341 | || GET_CODE (XEXP (x, 1)) == PC | |
3342 | || GET_CODE (XEXP (x, 1)) == SYMBOL_REF) | |
3343 | output_addr_const (file, XEXP (x, 1)); | |
3344 | else | |
3cf2715d | 3345 | { |
17b53c33 | 3346 | fputs (targetm.asm_out.open_paren, file); |
3cf2715d | 3347 | output_addr_const (file, XEXP (x, 1)); |
17b53c33 | 3348 | fputs (targetm.asm_out.close_paren, file); |
3cf2715d | 3349 | } |
3cf2715d DE |
3350 | break; |
3351 | ||
3352 | case ZERO_EXTEND: | |
3353 | case SIGN_EXTEND: | |
fdf473ae | 3354 | case SUBREG: |
3cf2715d DE |
3355 | output_addr_const (file, XEXP (x, 0)); |
3356 | break; | |
3357 | ||
3358 | default: | |
422be3c3 AO |
3359 | #ifdef OUTPUT_ADDR_CONST_EXTRA |
3360 | OUTPUT_ADDR_CONST_EXTRA (file, x, fail); | |
3361 | break; | |
3362 | ||
3363 | fail: | |
3364 | #endif | |
3cf2715d DE |
3365 | output_operand_lossage ("invalid expression as operand"); |
3366 | } | |
3367 | } | |
3368 | \f | |
3369 | /* A poor man's fprintf, with the added features of %I, %R, %L, and %U. | |
3370 | %R prints the value of REGISTER_PREFIX. | |
3371 | %L prints the value of LOCAL_LABEL_PREFIX. | |
3372 | %U prints the value of USER_LABEL_PREFIX. | |
3373 | %I prints the value of IMMEDIATE_PREFIX. | |
3374 | %O runs ASM_OUTPUT_OPCODE to transform what follows in the string. | |
3375 | Also supported are %d, %x, %s, %e, %f, %g and %%. | |
3376 | ||
3377 | We handle alternate assembler dialects here, just like output_asm_insn. */ | |
3378 | ||
3379 | void | |
e34d07f2 | 3380 | asm_fprintf (FILE *file, const char *p, ...) |
3cf2715d | 3381 | { |
3cf2715d DE |
3382 | char buf[10]; |
3383 | char *q, c; | |
e34d07f2 KG |
3384 | va_list argptr; |
3385 | ||
3386 | va_start (argptr, p); | |
3cf2715d DE |
3387 | |
3388 | buf[0] = '%'; | |
3389 | ||
b729186a | 3390 | while ((c = *p++)) |
3cf2715d DE |
3391 | switch (c) |
3392 | { | |
3393 | #ifdef ASSEMBLER_DIALECT | |
3394 | case '{': | |
b729186a JL |
3395 | { |
3396 | int i; | |
3cf2715d | 3397 | |
b729186a JL |
3398 | /* If we want the first dialect, do nothing. Otherwise, skip |
3399 | DIALECT_NUMBER of strings ending with '|'. */ | |
3400 | for (i = 0; i < dialect_number; i++) | |
3401 | { | |
3402 | while (*p && *p++ != '|') | |
3403 | ; | |
3404 | ||
3405 | if (*p == '|') | |
3406 | p++; | |
f5d927c0 | 3407 | } |
b729186a | 3408 | } |
3cf2715d DE |
3409 | break; |
3410 | ||
3411 | case '|': | |
3412 | /* Skip to close brace. */ | |
3413 | while (*p && *p++ != '}') | |
3414 | ; | |
3415 | break; | |
3416 | ||
3417 | case '}': | |
3418 | break; | |
3419 | #endif | |
3420 | ||
3421 | case '%': | |
3422 | c = *p++; | |
3423 | q = &buf[1]; | |
0df6c2c7 | 3424 | while (ISDIGIT (c) || c == '.') |
3cf2715d DE |
3425 | { |
3426 | *q++ = c; | |
3427 | c = *p++; | |
3428 | } | |
3429 | switch (c) | |
3430 | { | |
3431 | case '%': | |
3432 | fprintf (file, "%%"); | |
3433 | break; | |
3434 | ||
3435 | case 'd': case 'i': case 'u': | |
3436 | case 'x': case 'p': case 'X': | |
3437 | case 'o': | |
3438 | *q++ = c; | |
3439 | *q = 0; | |
3440 | fprintf (file, buf, va_arg (argptr, int)); | |
3441 | break; | |
3442 | ||
3443 | case 'w': | |
3444 | /* This is a prefix to the 'd', 'i', 'u', 'x', 'p', and 'X' cases, | |
3445 | but we do not check for those cases. It means that the value | |
3446 | is a HOST_WIDE_INT, which may be either `int' or `long'. */ | |
3447 | ||
21e3a81b RK |
3448 | #if HOST_BITS_PER_WIDE_INT == HOST_BITS_PER_INT |
3449 | #else | |
3450 | #if HOST_BITS_PER_WIDE_INT == HOST_BITS_PER_LONG | |
3451 | *q++ = 'l'; | |
3452 | #else | |
3453 | *q++ = 'l'; | |
3cf2715d | 3454 | *q++ = 'l'; |
21e3a81b | 3455 | #endif |
3cf2715d DE |
3456 | #endif |
3457 | ||
3458 | *q++ = *p++; | |
3459 | *q = 0; | |
3460 | fprintf (file, buf, va_arg (argptr, HOST_WIDE_INT)); | |
3461 | break; | |
3462 | ||
3463 | case 'l': | |
3464 | *q++ = c; | |
3465 | *q++ = *p++; | |
3466 | *q = 0; | |
3467 | fprintf (file, buf, va_arg (argptr, long)); | |
3468 | break; | |
3469 | ||
3470 | case 'e': | |
3471 | case 'f': | |
3472 | case 'g': | |
3473 | *q++ = c; | |
3474 | *q = 0; | |
3475 | fprintf (file, buf, va_arg (argptr, double)); | |
3476 | break; | |
3477 | ||
3478 | case 's': | |
3479 | *q++ = c; | |
3480 | *q = 0; | |
3481 | fprintf (file, buf, va_arg (argptr, char *)); | |
3482 | break; | |
3483 | ||
3484 | case 'O': | |
3485 | #ifdef ASM_OUTPUT_OPCODE | |
3486 | ASM_OUTPUT_OPCODE (asm_out_file, p); | |
3487 | #endif | |
3488 | break; | |
3489 | ||
3490 | case 'R': | |
3491 | #ifdef REGISTER_PREFIX | |
3492 | fprintf (file, "%s", REGISTER_PREFIX); | |
3493 | #endif | |
3494 | break; | |
3495 | ||
3496 | case 'I': | |
3497 | #ifdef IMMEDIATE_PREFIX | |
3498 | fprintf (file, "%s", IMMEDIATE_PREFIX); | |
3499 | #endif | |
3500 | break; | |
3501 | ||
3502 | case 'L': | |
3503 | #ifdef LOCAL_LABEL_PREFIX | |
3504 | fprintf (file, "%s", LOCAL_LABEL_PREFIX); | |
3505 | #endif | |
3506 | break; | |
3507 | ||
3508 | case 'U': | |
19283265 | 3509 | fputs (user_label_prefix, file); |
3cf2715d DE |
3510 | break; |
3511 | ||
fe0503ea NC |
3512 | #ifdef ASM_FPRINTF_EXTENSIONS |
3513 | /* Upper case letters are reserved for general use by asm_fprintf | |
3514 | and so are not available to target specific code. In order to | |
3515 | prevent the ASM_FPRINTF_EXTENSIONS macro from using them then, | |
3516 | they are defined here. As they get turned into real extensions | |
3517 | to asm_fprintf they should be removed from this list. */ | |
3518 | case 'A': case 'B': case 'C': case 'D': case 'E': | |
3519 | case 'F': case 'G': case 'H': case 'J': case 'K': | |
3520 | case 'M': case 'N': case 'P': case 'Q': case 'S': | |
3521 | case 'T': case 'V': case 'W': case 'Y': case 'Z': | |
3522 | break; | |
f5d927c0 | 3523 | |
fe0503ea NC |
3524 | ASM_FPRINTF_EXTENSIONS (file, argptr, p) |
3525 | #endif | |
3cf2715d DE |
3526 | default: |
3527 | abort (); | |
3528 | } | |
3529 | break; | |
3530 | ||
3531 | default: | |
3532 | fputc (c, file); | |
3533 | } | |
e34d07f2 | 3534 | va_end (argptr); |
3cf2715d DE |
3535 | } |
3536 | \f | |
3537 | /* Split up a CONST_DOUBLE or integer constant rtx | |
3538 | into two rtx's for single words, | |
3539 | storing in *FIRST the word that comes first in memory in the target | |
3540 | and in *SECOND the other. */ | |
3541 | ||
3542 | void | |
3543 | split_double (value, first, second) | |
3544 | rtx value; | |
3545 | rtx *first, *second; | |
3546 | { | |
3547 | if (GET_CODE (value) == CONST_INT) | |
3548 | { | |
5a1a6efd | 3549 | if (HOST_BITS_PER_WIDE_INT >= (2 * BITS_PER_WORD)) |
f76b9db2 | 3550 | { |
5a1a6efd | 3551 | /* In this case the CONST_INT holds both target words. |
27eef9ce JC |
3552 | Extract the bits from it into two word-sized pieces. |
3553 | Sign extend each half to HOST_WIDE_INT. */ | |
7f251dee AO |
3554 | unsigned HOST_WIDE_INT low, high; |
3555 | unsigned HOST_WIDE_INT mask, sign_bit, sign_extend; | |
3556 | ||
3557 | /* Set sign_bit to the most significant bit of a word. */ | |
3558 | sign_bit = 1; | |
3559 | sign_bit <<= BITS_PER_WORD - 1; | |
3560 | ||
3561 | /* Set mask so that all bits of the word are set. We could | |
3562 | have used 1 << BITS_PER_WORD instead of basing the | |
3563 | calculation on sign_bit. However, on machines where | |
3564 | HOST_BITS_PER_WIDE_INT == BITS_PER_WORD, it could cause a | |
3565 | compiler warning, even though the code would never be | |
3566 | executed. */ | |
3567 | mask = sign_bit << 1; | |
3568 | mask--; | |
3569 | ||
3570 | /* Set sign_extend as any remaining bits. */ | |
3571 | sign_extend = ~mask; | |
f5d927c0 | 3572 | |
7f251dee AO |
3573 | /* Pick the lower word and sign-extend it. */ |
3574 | low = INTVAL (value); | |
3575 | low &= mask; | |
3576 | if (low & sign_bit) | |
3577 | low |= sign_extend; | |
3578 | ||
3579 | /* Pick the higher word, shifted to the least significant | |
3580 | bits, and sign-extend it. */ | |
3581 | high = INTVAL (value); | |
3582 | high >>= BITS_PER_WORD - 1; | |
3583 | high >>= 1; | |
3584 | high &= mask; | |
3585 | if (high & sign_bit) | |
3586 | high |= sign_extend; | |
3587 | ||
3588 | /* Store the words in the target machine order. */ | |
5a1a6efd RK |
3589 | if (WORDS_BIG_ENDIAN) |
3590 | { | |
7f251dee AO |
3591 | *first = GEN_INT (high); |
3592 | *second = GEN_INT (low); | |
5a1a6efd RK |
3593 | } |
3594 | else | |
3595 | { | |
7f251dee AO |
3596 | *first = GEN_INT (low); |
3597 | *second = GEN_INT (high); | |
5a1a6efd | 3598 | } |
f76b9db2 ILT |
3599 | } |
3600 | else | |
3601 | { | |
5a1a6efd RK |
3602 | /* The rule for using CONST_INT for a wider mode |
3603 | is that we regard the value as signed. | |
3604 | So sign-extend it. */ | |
3605 | rtx high = (INTVAL (value) < 0 ? constm1_rtx : const0_rtx); | |
3606 | if (WORDS_BIG_ENDIAN) | |
3607 | { | |
3608 | *first = high; | |
3609 | *second = value; | |
3610 | } | |
3611 | else | |
3612 | { | |
3613 | *first = value; | |
3614 | *second = high; | |
3615 | } | |
f76b9db2 | 3616 | } |
3cf2715d DE |
3617 | } |
3618 | else if (GET_CODE (value) != CONST_DOUBLE) | |
3619 | { | |
f76b9db2 ILT |
3620 | if (WORDS_BIG_ENDIAN) |
3621 | { | |
3622 | *first = const0_rtx; | |
3623 | *second = value; | |
3624 | } | |
3625 | else | |
3626 | { | |
3627 | *first = value; | |
3628 | *second = const0_rtx; | |
3629 | } | |
3cf2715d DE |
3630 | } |
3631 | else if (GET_MODE (value) == VOIDmode | |
3632 | /* This is the old way we did CONST_DOUBLE integers. */ | |
3633 | || GET_MODE_CLASS (GET_MODE (value)) == MODE_INT) | |
3634 | { | |
3635 | /* In an integer, the words are defined as most and least significant. | |
3636 | So order them by the target's convention. */ | |
f76b9db2 ILT |
3637 | if (WORDS_BIG_ENDIAN) |
3638 | { | |
3639 | *first = GEN_INT (CONST_DOUBLE_HIGH (value)); | |
3640 | *second = GEN_INT (CONST_DOUBLE_LOW (value)); | |
3641 | } | |
3642 | else | |
3643 | { | |
3644 | *first = GEN_INT (CONST_DOUBLE_LOW (value)); | |
3645 | *second = GEN_INT (CONST_DOUBLE_HIGH (value)); | |
3646 | } | |
3cf2715d DE |
3647 | } |
3648 | else | |
3649 | { | |
f5d927c0 KH |
3650 | REAL_VALUE_TYPE r; |
3651 | long l[2]; | |
3cf2715d DE |
3652 | REAL_VALUE_FROM_CONST_DOUBLE (r, value); |
3653 | ||
3654 | /* Note, this converts the REAL_VALUE_TYPE to the target's | |
3655 | format, splits up the floating point double and outputs | |
3656 | exactly 32 bits of it into each of l[0] and l[1] -- | |
0f41302f | 3657 | not necessarily BITS_PER_WORD bits. */ |
3cf2715d DE |
3658 | REAL_VALUE_TO_TARGET_DOUBLE (r, l); |
3659 | ||
b5a3eb84 JW |
3660 | /* If 32 bits is an entire word for the target, but not for the host, |
3661 | then sign-extend on the host so that the number will look the same | |
3662 | way on the host that it would on the target. See for instance | |
3663 | simplify_unary_operation. The #if is needed to avoid compiler | |
3664 | warnings. */ | |
3665 | ||
3666 | #if HOST_BITS_PER_LONG > 32 | |
3667 | if (BITS_PER_WORD < HOST_BITS_PER_LONG && BITS_PER_WORD == 32) | |
3668 | { | |
3669 | if (l[0] & ((long) 1 << 31)) | |
3670 | l[0] |= ((long) (-1) << 32); | |
3671 | if (l[1] & ((long) 1 << 31)) | |
3672 | l[1] |= ((long) (-1) << 32); | |
3673 | } | |
3674 | #endif | |
3675 | ||
3cf2715d DE |
3676 | *first = GEN_INT ((HOST_WIDE_INT) l[0]); |
3677 | *second = GEN_INT ((HOST_WIDE_INT) l[1]); | |
3cf2715d DE |
3678 | } |
3679 | } | |
3680 | \f | |
3681 | /* Return nonzero if this function has no function calls. */ | |
3682 | ||
3683 | int | |
3684 | leaf_function_p () | |
3685 | { | |
3686 | rtx insn; | |
b660f82f | 3687 | rtx link; |
3cf2715d | 3688 | |
70f4f91c | 3689 | if (current_function_profile || profile_arc_flag) |
3cf2715d DE |
3690 | return 0; |
3691 | ||
3692 | for (insn = get_insns (); insn; insn = NEXT_INSN (insn)) | |
3693 | { | |
7d167afd JJ |
3694 | if (GET_CODE (insn) == CALL_INSN |
3695 | && ! SIBLING_CALL_P (insn)) | |
3cf2715d DE |
3696 | return 0; |
3697 | if (GET_CODE (insn) == INSN | |
3698 | && GET_CODE (PATTERN (insn)) == SEQUENCE | |
0a1c58a2 JL |
3699 | && GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) == CALL_INSN |
3700 | && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0))) | |
3cf2715d DE |
3701 | return 0; |
3702 | } | |
b660f82f JW |
3703 | for (link = current_function_epilogue_delay_list; |
3704 | link; | |
3705 | link = XEXP (link, 1)) | |
3cf2715d | 3706 | { |
b660f82f JW |
3707 | insn = XEXP (link, 0); |
3708 | ||
3709 | if (GET_CODE (insn) == CALL_INSN | |
7d167afd | 3710 | && ! SIBLING_CALL_P (insn)) |
3cf2715d | 3711 | return 0; |
b660f82f JW |
3712 | if (GET_CODE (insn) == INSN |
3713 | && GET_CODE (PATTERN (insn)) == SEQUENCE | |
3714 | && GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) == CALL_INSN | |
3715 | && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0))) | |
3cf2715d DE |
3716 | return 0; |
3717 | } | |
3718 | ||
3719 | return 1; | |
3720 | } | |
3721 | ||
09da1532 | 3722 | /* Return 1 if branch is a forward branch. |
ef6257cd JH |
3723 | Uses insn_shuid array, so it works only in the final pass. May be used by |
3724 | output templates to customary add branch prediction hints. | |
3725 | */ | |
3726 | int | |
3727 | final_forward_branch_p (insn) | |
3728 | rtx insn; | |
3729 | { | |
3730 | int insn_id, label_id; | |
3731 | if (!uid_shuid) | |
3732 | abort (); | |
3733 | insn_id = INSN_SHUID (insn); | |
3734 | label_id = INSN_SHUID (JUMP_LABEL (insn)); | |
3735 | /* We've hit some insns that does not have id information available. */ | |
3736 | if (!insn_id || !label_id) | |
3737 | abort (); | |
3738 | return insn_id < label_id; | |
3739 | } | |
3740 | ||
3cf2715d DE |
3741 | /* On some machines, a function with no call insns |
3742 | can run faster if it doesn't create its own register window. | |
3743 | When output, the leaf function should use only the "output" | |
3744 | registers. Ordinarily, the function would be compiled to use | |
3745 | the "input" registers to find its arguments; it is a candidate | |
3746 | for leaf treatment if it uses only the "input" registers. | |
3747 | Leaf function treatment means renumbering so the function | |
3748 | uses the "output" registers instead. */ | |
3749 | ||
3750 | #ifdef LEAF_REGISTERS | |
3751 | ||
3cf2715d DE |
3752 | /* Return 1 if this function uses only the registers that can be |
3753 | safely renumbered. */ | |
3754 | ||
3755 | int | |
3756 | only_leaf_regs_used () | |
3757 | { | |
3758 | int i; | |
4977bab6 | 3759 | const char *const permitted_reg_in_leaf_functions = LEAF_REGISTERS; |
3cf2715d DE |
3760 | |
3761 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
e5e809f4 JL |
3762 | if ((regs_ever_live[i] || global_regs[i]) |
3763 | && ! permitted_reg_in_leaf_functions[i]) | |
3764 | return 0; | |
3765 | ||
3766 | if (current_function_uses_pic_offset_table | |
3767 | && pic_offset_table_rtx != 0 | |
3768 | && GET_CODE (pic_offset_table_rtx) == REG | |
3769 | && ! permitted_reg_in_leaf_functions[REGNO (pic_offset_table_rtx)]) | |
3770 | return 0; | |
3771 | ||
3cf2715d DE |
3772 | return 1; |
3773 | } | |
3774 | ||
3775 | /* Scan all instructions and renumber all registers into those | |
3776 | available in leaf functions. */ | |
3777 | ||
3778 | static void | |
3779 | leaf_renumber_regs (first) | |
3780 | rtx first; | |
3781 | { | |
3782 | rtx insn; | |
3783 | ||
3784 | /* Renumber only the actual patterns. | |
3785 | The reg-notes can contain frame pointer refs, | |
3786 | and renumbering them could crash, and should not be needed. */ | |
3787 | for (insn = first; insn; insn = NEXT_INSN (insn)) | |
2c3c49de | 3788 | if (INSN_P (insn)) |
3cf2715d | 3789 | leaf_renumber_regs_insn (PATTERN (insn)); |
f5d927c0 KH |
3790 | for (insn = current_function_epilogue_delay_list; |
3791 | insn; | |
3792 | insn = XEXP (insn, 1)) | |
2c3c49de | 3793 | if (INSN_P (XEXP (insn, 0))) |
3cf2715d DE |
3794 | leaf_renumber_regs_insn (PATTERN (XEXP (insn, 0))); |
3795 | } | |
3796 | ||
3797 | /* Scan IN_RTX and its subexpressions, and renumber all regs into those | |
3798 | available in leaf functions. */ | |
3799 | ||
3800 | void | |
3801 | leaf_renumber_regs_insn (in_rtx) | |
b3694847 | 3802 | rtx in_rtx; |
3cf2715d | 3803 | { |
b3694847 SS |
3804 | int i, j; |
3805 | const char *format_ptr; | |
3cf2715d DE |
3806 | |
3807 | if (in_rtx == 0) | |
3808 | return; | |
3809 | ||
3810 | /* Renumber all input-registers into output-registers. | |
3811 | renumbered_regs would be 1 for an output-register; | |
3812 | they */ | |
3813 | ||
3814 | if (GET_CODE (in_rtx) == REG) | |
3815 | { | |
3816 | int newreg; | |
3817 | ||
3818 | /* Don't renumber the same reg twice. */ | |
3819 | if (in_rtx->used) | |
3820 | return; | |
3821 | ||
3822 | newreg = REGNO (in_rtx); | |
3823 | /* Don't try to renumber pseudo regs. It is possible for a pseudo reg | |
3824 | to reach here as part of a REG_NOTE. */ | |
3825 | if (newreg >= FIRST_PSEUDO_REGISTER) | |
3826 | { | |
3827 | in_rtx->used = 1; | |
3828 | return; | |
3829 | } | |
3830 | newreg = LEAF_REG_REMAP (newreg); | |
3831 | if (newreg < 0) | |
3832 | abort (); | |
3833 | regs_ever_live[REGNO (in_rtx)] = 0; | |
3834 | regs_ever_live[newreg] = 1; | |
3835 | REGNO (in_rtx) = newreg; | |
3836 | in_rtx->used = 1; | |
3837 | } | |
3838 | ||
2c3c49de | 3839 | if (INSN_P (in_rtx)) |
3cf2715d DE |
3840 | { |
3841 | /* Inside a SEQUENCE, we find insns. | |
3842 | Renumber just the patterns of these insns, | |
3843 | just as we do for the top-level insns. */ | |
3844 | leaf_renumber_regs_insn (PATTERN (in_rtx)); | |
3845 | return; | |
3846 | } | |
3847 | ||
3848 | format_ptr = GET_RTX_FORMAT (GET_CODE (in_rtx)); | |
3849 | ||
3850 | for (i = 0; i < GET_RTX_LENGTH (GET_CODE (in_rtx)); i++) | |
3851 | switch (*format_ptr++) | |
3852 | { | |
3853 | case 'e': | |
3854 | leaf_renumber_regs_insn (XEXP (in_rtx, i)); | |
3855 | break; | |
3856 | ||
3857 | case 'E': | |
3858 | if (NULL != XVEC (in_rtx, i)) | |
3859 | { | |
3860 | for (j = 0; j < XVECLEN (in_rtx, i); j++) | |
3861 | leaf_renumber_regs_insn (XVECEXP (in_rtx, i, j)); | |
3862 | } | |
3863 | break; | |
3864 | ||
3865 | case 'S': | |
3866 | case 's': | |
3867 | case '0': | |
3868 | case 'i': | |
3869 | case 'w': | |
3870 | case 'n': | |
3871 | case 'u': | |
3872 | break; | |
3873 | ||
3874 | default: | |
3875 | abort (); | |
3876 | } | |
3877 | } | |
3878 | #endif |