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7f446223 | 1 | /* Convert RTL to assembler code and output it, for GNU compiler. |
3aea1f79 | 2 | Copyright (C) 1987-2014 Free Software Foundation, Inc. |
7f446223 | 3 | |
f12b58b3 | 4 | This file is part of GCC. |
7f446223 | 5 | |
f12b58b3 | 6 | GCC is free software; you can redistribute it and/or modify it under |
7 | the terms of the GNU General Public License as published by the Free | |
8c4c00c1 | 8 | Software Foundation; either version 3, or (at your option) any later |
f12b58b3 | 9 | version. |
7f446223 | 10 | |
f12b58b3 | 11 | GCC is distributed in the hope that it will be useful, but WITHOUT ANY |
12 | WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
13 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
14 | for more details. | |
7f446223 | 15 | |
16 | You should have received a copy of the GNU General Public License | |
8c4c00c1 | 17 | along with GCC; see the file COPYING3. If not see |
18 | <http://www.gnu.org/licenses/>. */ | |
7f446223 | 19 | |
7f446223 | 20 | /* This is the final pass of the compiler. |
21 | It looks at the rtl code for a function and outputs assembler code. | |
22 | ||
23 | Call `final_start_function' to output the assembler code for function entry, | |
24 | `final' to output assembler code for some RTL code, | |
25 | `final_end_function' to output assembler code for function exit. | |
26 | If a function is compiled in several pieces, each piece is | |
27 | output separately with `final'. | |
28 | ||
29 | Some optimizations are also done at this level. | |
30 | Move instructions that were made unnecessary by good register allocation | |
31 | are detected and omitted from the output. (Though most of these | |
32 | are removed by the last jump pass.) | |
33 | ||
34 | Instructions to set the condition codes are omitted when it can be | |
35 | seen that the condition codes already had the desired values. | |
36 | ||
37 | In some cases it is sufficient if the inherited condition codes | |
38 | have related values, but this may require the following insn | |
39 | (the one that tests the condition codes) to be modified. | |
40 | ||
41 | The code for the function prologue and epilogue are generated | |
17d9b0c3 | 42 | directly in assembler by the target functions function_prologue and |
43 | function_epilogue. Those instructions never exist as rtl. */ | |
7f446223 | 44 | |
45 | #include "config.h" | |
405711de | 46 | #include "system.h" |
805e22b2 | 47 | #include "coretypes.h" |
48 | #include "tm.h" | |
7f446223 | 49 | |
50 | #include "tree.h" | |
9ed99284 | 51 | #include "varasm.h" |
9ac9a758 | 52 | #include "hard-reg-set.h" |
7f446223 | 53 | #include "rtl.h" |
7953c610 | 54 | #include "tm_p.h" |
7f446223 | 55 | #include "regs.h" |
56 | #include "insn-config.h" | |
7f446223 | 57 | #include "insn-attr.h" |
7f446223 | 58 | #include "recog.h" |
59 | #include "conditions.h" | |
60 | #include "flags.h" | |
7f446223 | 61 | #include "output.h" |
037a5228 | 62 | #include "except.h" |
a3020f2f | 63 | #include "hashtab.h" |
64 | #include "hash-set.h" | |
65 | #include "vec.h" | |
66 | #include "machmode.h" | |
67 | #include "input.h" | |
0a893c29 | 68 | #include "function.h" |
d7091a76 | 69 | #include "rtl-error.h" |
70 | #include "toplev.h" /* exact_log2, floor_log2 */ | |
cd03a192 | 71 | #include "reload.h" |
be2828ce | 72 | #include "intl.h" |
74b0991d | 73 | #include "basic-block.h" |
17d9b0c3 | 74 | #include "target.h" |
ae2b9f1f | 75 | #include "targhooks.h" |
1dff614c | 76 | #include "debug.h" |
06b3c9f7 | 77 | #include "expr.h" |
77fce4cd | 78 | #include "tree-pass.h" |
77fce4cd | 79 | #include "cgraph.h" |
073c1fd5 | 80 | #include "tree-ssa.h" |
77fce4cd | 81 | #include "coverage.h" |
3072d30e | 82 | #include "df.h" |
5f1f2de5 | 83 | #include "ggc.h" |
7bd530d9 | 84 | #include "cfgloop.h" |
85 | #include "params.h" | |
0f246197 | 86 | #include "tree-pretty-print.h" /* for dump_function_header */ |
1e80ce41 | 87 | #include "asan.h" |
e913b5cd | 88 | #include "wide-int-print.h" |
705f0a50 | 89 | #include "rtl-iter.h" |
7f446223 | 90 | |
397c7bc7 | 91 | #ifdef XCOFF_DEBUGGING_INFO |
92 | #include "xcoffout.h" /* Needed for external data | |
93 | declarations for e.g. AIX 4.x. */ | |
94 | #endif | |
95 | ||
744d3441 | 96 | #include "dwarf2out.h" |
744d3441 | 97 | |
262444a6 | 98 | #ifdef DBX_DEBUGGING_INFO |
99 | #include "dbxout.h" | |
100 | #endif | |
101 | ||
e70665b0 | 102 | #ifdef SDB_DEBUGGING_INFO |
103 | #include "sdbout.h" | |
104 | #endif | |
105 | ||
747b7458 | 106 | /* Most ports that aren't using cc0 don't need to define CC_STATUS_INIT. |
107 | So define a null default for it to save conditionalization later. */ | |
7f446223 | 108 | #ifndef CC_STATUS_INIT |
109 | #define CC_STATUS_INIT | |
110 | #endif | |
111 | ||
7f446223 | 112 | /* Is the given character a logical line separator for the assembler? */ |
113 | #ifndef IS_ASM_LOGICAL_LINE_SEPARATOR | |
0cb73417 | 114 | #define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) ((C) == ';') |
7f446223 | 115 | #endif |
116 | ||
6b5be7f8 | 117 | #ifndef JUMP_TABLES_IN_TEXT_SECTION |
118 | #define JUMP_TABLES_IN_TEXT_SECTION 0 | |
119 | #endif | |
120 | ||
e69efecb | 121 | /* Bitflags used by final_scan_insn. */ |
46ab8d2c | 122 | #define SEEN_NOTE 1 |
123 | #define SEEN_EMITTED 2 | |
e69efecb | 124 | |
7f446223 | 125 | /* Last insn processed by final_scan_insn. */ |
82f53c1f | 126 | static rtx_insn *debug_insn; |
127 | rtx_insn *current_output_insn; | |
7f446223 | 128 | |
129 | /* Line number of last NOTE. */ | |
130 | static int last_linenum; | |
131 | ||
d01c707b | 132 | /* Last discriminator written to assembly. */ |
133 | static int last_discriminator; | |
134 | ||
135 | /* Discriminator of current block. */ | |
136 | static int discriminator; | |
137 | ||
5ebf1393 | 138 | /* Highest line number in current block. */ |
139 | static int high_block_linenum; | |
140 | ||
141 | /* Likewise for function. */ | |
142 | static int high_function_linenum; | |
143 | ||
7f446223 | 144 | /* Filename of last NOTE. */ |
9a356c3c | 145 | static const char *last_filename; |
7f446223 | 146 | |
1b16fc45 | 147 | /* Override filename and line number. */ |
148 | static const char *override_filename; | |
149 | static int override_linenum; | |
150 | ||
e47ccf94 | 151 | /* Whether to force emission of a line note before the next insn. */ |
152 | static bool force_source_line = false; | |
312f4798 | 153 | |
c966a2e2 | 154 | extern const int length_unit_log; /* This is defined in insn-attrtab.c. */ |
21d55c67 | 155 | |
7f446223 | 156 | /* Nonzero while outputting an `asm' with operands. |
89f18f73 | 157 | This means that inconsistencies are the user's fault, so don't die. |
7f446223 | 158 | The precise value is the insn being output, to pass to error_for_asm. */ |
c55d3fa5 | 159 | const rtx_insn *this_is_asm_operands; |
7f446223 | 160 | |
161 | /* Number of operands of this insn, for an `asm' with operands. */ | |
a101c7ef | 162 | static unsigned int insn_noperands; |
7f446223 | 163 | |
164 | /* Compare optimization flag. */ | |
165 | ||
166 | static rtx last_ignored_compare = 0; | |
167 | ||
7f446223 | 168 | /* Assign a unique number to each insn that is output. |
169 | This can be used to generate unique local labels. */ | |
170 | ||
171 | static int insn_counter = 0; | |
172 | ||
173 | #ifdef HAVE_cc0 | |
174 | /* This variable contains machine-dependent flags (defined in tm.h) | |
175 | set and examined by output routines | |
176 | that describe how to interpret the condition codes properly. */ | |
177 | ||
178 | CC_STATUS cc_status; | |
179 | ||
180 | /* During output of an insn, this contains a copy of cc_status | |
181 | from before the insn. */ | |
182 | ||
183 | CC_STATUS cc_prev_status; | |
184 | #endif | |
185 | ||
5846cb0f | 186 | /* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */ |
7f446223 | 187 | |
188 | static int block_depth; | |
189 | ||
190 | /* Nonzero if have enabled APP processing of our assembler output. */ | |
191 | ||
192 | static int app_on; | |
193 | ||
194 | /* If we are outputting an insn sequence, this contains the sequence rtx. | |
195 | Zero otherwise. */ | |
196 | ||
91a55c11 | 197 | rtx_sequence *final_sequence; |
7f446223 | 198 | |
199 | #ifdef ASSEMBLER_DIALECT | |
200 | ||
201 | /* Number of the assembler dialect to use, starting at 0. */ | |
202 | static int dialect_number; | |
203 | #endif | |
204 | ||
308f360f | 205 | /* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */ |
206 | rtx current_insn_predicate; | |
308f360f | 207 | |
090bd40b | 208 | /* True if printing into -fdump-final-insns= dump. */ |
209 | bool final_insns_dump_p; | |
210 | ||
2436e54f | 211 | /* True if profile_function should be called, but hasn't been called yet. */ |
212 | static bool need_profile_function; | |
213 | ||
8a82c3cf | 214 | static int asm_insn_count (rtx); |
8a82c3cf | 215 | static void profile_function (FILE *); |
216 | static void profile_after_prologue (FILE *); | |
82f53c1f | 217 | static bool notice_source_line (rtx_insn *, bool *); |
3072d30e | 218 | static rtx walk_alter_subreg (rtx *, bool *); |
8a82c3cf | 219 | static void output_asm_name (void); |
82f53c1f | 220 | static void output_alternate_entry_point (FILE *, rtx_insn *); |
8a82c3cf | 221 | static tree get_mem_expr_from_op (rtx, int *); |
222 | static void output_asm_operand_names (rtx *, int *, int); | |
0dbd1c74 | 223 | #ifdef LEAF_REGISTERS |
82f53c1f | 224 | static void leaf_renumber_regs (rtx_insn *); |
0dbd1c74 | 225 | #endif |
226 | #ifdef HAVE_cc0 | |
8a82c3cf | 227 | static int alter_cond (rtx); |
0dbd1c74 | 228 | #endif |
29fd0b7a | 229 | #ifndef ADDR_VEC_ALIGN |
8a82c3cf | 230 | static int final_addr_vec_align (rtx); |
29fd0b7a | 231 | #endif |
8a82c3cf | 232 | static int align_fuzz (rtx, rtx, int, unsigned); |
9ac9a758 | 233 | static void collect_fn_hard_reg_usage (void); |
82f53c1f | 234 | static tree get_call_fndecl (rtx_insn *); |
7f446223 | 235 | \f |
236 | /* Initialize data in final at the beginning of a compilation. */ | |
237 | ||
238 | void | |
8a82c3cf | 239 | init_final (const char *filename ATTRIBUTE_UNUSED) |
7f446223 | 240 | { |
7f446223 | 241 | app_on = 0; |
7f446223 | 242 | final_sequence = 0; |
243 | ||
244 | #ifdef ASSEMBLER_DIALECT | |
245 | dialect_number = ASSEMBLER_DIALECT; | |
246 | #endif | |
247 | } | |
248 | ||
17d9b0c3 | 249 | /* Default target function prologue and epilogue assembler output. |
eca1c9c0 | 250 | |
17d9b0c3 | 251 | If not overridden for epilogue code, then the function body itself |
252 | contains return instructions wherever needed. */ | |
253 | void | |
8a82c3cf | 254 | default_function_pro_epilogue (FILE *file ATTRIBUTE_UNUSED, |
255 | HOST_WIDE_INT size ATTRIBUTE_UNUSED) | |
17d9b0c3 | 256 | { |
257 | } | |
258 | ||
3b3edcd4 | 259 | void |
260 | default_function_switched_text_sections (FILE *file ATTRIBUTE_UNUSED, | |
261 | tree decl ATTRIBUTE_UNUSED, | |
262 | bool new_is_cold ATTRIBUTE_UNUSED) | |
263 | { | |
264 | } | |
265 | ||
85ae73e8 | 266 | /* Default target hook that outputs nothing to a stream. */ |
267 | void | |
8a82c3cf | 268 | no_asm_to_stream (FILE *file ATTRIBUTE_UNUSED) |
85ae73e8 | 269 | { |
270 | } | |
271 | ||
7f446223 | 272 | /* Enable APP processing of subsequent output. |
273 | Used before the output from an `asm' statement. */ | |
274 | ||
275 | void | |
8a82c3cf | 276 | app_enable (void) |
7f446223 | 277 | { |
278 | if (! app_on) | |
279 | { | |
7d27e4c9 | 280 | fputs (ASM_APP_ON, asm_out_file); |
7f446223 | 281 | app_on = 1; |
282 | } | |
283 | } | |
284 | ||
285 | /* Disable APP processing of subsequent output. | |
286 | Called from varasm.c before most kinds of output. */ | |
287 | ||
288 | void | |
8a82c3cf | 289 | app_disable (void) |
7f446223 | 290 | { |
291 | if (app_on) | |
292 | { | |
7d27e4c9 | 293 | fputs (ASM_APP_OFF, asm_out_file); |
7f446223 | 294 | app_on = 0; |
295 | } | |
296 | } | |
297 | \f | |
2ee6d904 | 298 | /* Return the number of slots filled in the current |
7f446223 | 299 | delayed branch sequence (we don't count the insn needing the |
300 | delay slot). Zero if not in a delayed branch sequence. */ | |
301 | ||
302 | #ifdef DELAY_SLOTS | |
303 | int | |
8a82c3cf | 304 | dbr_sequence_length (void) |
7f446223 | 305 | { |
306 | if (final_sequence != 0) | |
307 | return XVECLEN (final_sequence, 0) - 1; | |
308 | else | |
309 | return 0; | |
310 | } | |
311 | #endif | |
312 | \f | |
313 | /* The next two pages contain routines used to compute the length of an insn | |
314 | and to shorten branches. */ | |
315 | ||
316 | /* Arrays for insn lengths, and addresses. The latter is referenced by | |
317 | `insn_current_length'. */ | |
318 | ||
44bf35d8 | 319 | static int *insn_lengths; |
47fc0706 | 320 | |
f1f41a6c | 321 | vec<int> insn_addresses_; |
7f446223 | 322 | |
c624cb53 | 323 | /* Max uid for which the above arrays are valid. */ |
324 | static int insn_lengths_max_uid; | |
325 | ||
7f446223 | 326 | /* Address of insn being processed. Used by `insn_current_length'. */ |
327 | int insn_current_address; | |
328 | ||
21d55c67 | 329 | /* Address of insn being processed in previous iteration. */ |
330 | int insn_last_address; | |
331 | ||
cb0ccc1e | 332 | /* known invariant alignment of insn being processed. */ |
21d55c67 | 333 | int insn_current_align; |
334 | ||
dd348f62 | 335 | /* After shorten_branches, for any insn, uid_align[INSN_UID (insn)] |
336 | gives the next following alignment insn that increases the known | |
337 | alignment, or NULL_RTX if there is no such insn. | |
338 | For any alignment obtained this way, we can again index uid_align with | |
339 | its uid to obtain the next following align that in turn increases the | |
340 | alignment, till we reach NULL_RTX; the sequence obtained this way | |
341 | for each insn we'll call the alignment chain of this insn in the following | |
342 | comments. */ | |
343 | ||
2ee6d904 | 344 | struct label_alignment |
345 | { | |
3245cd4f | 346 | short alignment; |
347 | short max_skip; | |
348 | }; | |
349 | ||
350 | static rtx *uid_align; | |
351 | static int *uid_shuid; | |
352 | static struct label_alignment *label_align; | |
dd348f62 | 353 | |
7f446223 | 354 | /* Indicate that branch shortening hasn't yet been done. */ |
355 | ||
356 | void | |
8a82c3cf | 357 | init_insn_lengths (void) |
7f446223 | 358 | { |
dd348f62 | 359 | if (uid_shuid) |
360 | { | |
361 | free (uid_shuid); | |
362 | uid_shuid = 0; | |
363 | } | |
364 | if (insn_lengths) | |
365 | { | |
366 | free (insn_lengths); | |
367 | insn_lengths = 0; | |
c624cb53 | 368 | insn_lengths_max_uid = 0; |
dd348f62 | 369 | } |
f2d92d7a | 370 | if (HAVE_ATTR_length) |
371 | INSN_ADDRESSES_FREE (); | |
dd348f62 | 372 | if (uid_align) |
373 | { | |
374 | free (uid_align); | |
375 | uid_align = 0; | |
376 | } | |
7f446223 | 377 | } |
378 | ||
379 | /* Obtain the current length of an insn. If branch shortening has been done, | |
554f2707 | 380 | get its actual length. Otherwise, use FALLBACK_FN to calculate the |
16afa8ae | 381 | length. */ |
03edaad8 | 382 | static int |
d3ffa7b4 | 383 | get_attr_length_1 (rtx_insn *insn, int (*fallback_fn) (rtx_insn *)) |
7f446223 | 384 | { |
7f446223 | 385 | rtx body; |
386 | int i; | |
387 | int length = 0; | |
388 | ||
f2d92d7a | 389 | if (!HAVE_ATTR_length) |
390 | return 0; | |
391 | ||
c624cb53 | 392 | if (insn_lengths_max_uid > INSN_UID (insn)) |
7f446223 | 393 | return insn_lengths[INSN_UID (insn)]; |
394 | else | |
395 | switch (GET_CODE (insn)) | |
396 | { | |
397 | case NOTE: | |
398 | case BARRIER: | |
399 | case CODE_LABEL: | |
9845d120 | 400 | case DEBUG_INSN: |
7f446223 | 401 | return 0; |
402 | ||
403 | case CALL_INSN: | |
7f446223 | 404 | case JUMP_INSN: |
91f71fa3 | 405 | length = fallback_fn (insn); |
7f446223 | 406 | break; |
407 | ||
408 | case INSN: | |
409 | body = PATTERN (insn); | |
410 | if (GET_CODE (body) == USE || GET_CODE (body) == CLOBBER) | |
411 | return 0; | |
412 | ||
413 | else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0) | |
16afa8ae | 414 | length = asm_insn_count (body) * fallback_fn (insn); |
3a0b41f5 | 415 | else if (rtx_sequence *seq = dyn_cast <rtx_sequence *> (body)) |
416 | for (i = 0; i < seq->len (); i++) | |
417 | length += get_attr_length_1 (seq->insn (i), fallback_fn); | |
7f446223 | 418 | else |
16afa8ae | 419 | length = fallback_fn (insn); |
0dbd1c74 | 420 | break; |
421 | ||
422 | default: | |
423 | break; | |
7f446223 | 424 | } |
425 | ||
426 | #ifdef ADJUST_INSN_LENGTH | |
427 | ADJUST_INSN_LENGTH (insn, length); | |
428 | #endif | |
429 | return length; | |
7f446223 | 430 | } |
16afa8ae | 431 | |
432 | /* Obtain the current length of an insn. If branch shortening has been done, | |
433 | get its actual length. Otherwise, get its maximum length. */ | |
434 | int | |
d3ffa7b4 | 435 | get_attr_length (rtx_insn *insn) |
16afa8ae | 436 | { |
437 | return get_attr_length_1 (insn, insn_default_length); | |
438 | } | |
439 | ||
440 | /* Obtain the current length of an insn. If branch shortening has been done, | |
441 | get its actual length. Otherwise, get its minimum length. */ | |
442 | int | |
d3ffa7b4 | 443 | get_attr_min_length (rtx_insn *insn) |
16afa8ae | 444 | { |
445 | return get_attr_length_1 (insn, insn_min_length); | |
446 | } | |
7f446223 | 447 | \f |
21d55c67 | 448 | /* Code to handle alignment inside shorten_branches. */ |
449 | ||
450 | /* Here is an explanation how the algorithm in align_fuzz can give | |
451 | proper results: | |
452 | ||
453 | Call a sequence of instructions beginning with alignment point X | |
454 | and continuing until the next alignment point `block X'. When `X' | |
2ee6d904 | 455 | is used in an expression, it means the alignment value of the |
21d55c67 | 456 | alignment point. |
2ee6d904 | 457 | |
21d55c67 | 458 | Call the distance between the start of the first insn of block X, and |
459 | the end of the last insn of block X `IX', for the `inner size of X'. | |
460 | This is clearly the sum of the instruction lengths. | |
2ee6d904 | 461 | |
21d55c67 | 462 | Likewise with the next alignment-delimited block following X, which we |
463 | shall call block Y. | |
2ee6d904 | 464 | |
21d55c67 | 465 | Call the distance between the start of the first insn of block X, and |
466 | the start of the first insn of block Y `OX', for the `outer size of X'. | |
2ee6d904 | 467 | |
21d55c67 | 468 | The estimated padding is then OX - IX. |
2ee6d904 | 469 | |
21d55c67 | 470 | OX can be safely estimated as |
2ee6d904 | 471 | |
21d55c67 | 472 | if (X >= Y) |
473 | OX = round_up(IX, Y) | |
474 | else | |
475 | OX = round_up(IX, X) + Y - X | |
2ee6d904 | 476 | |
21d55c67 | 477 | Clearly est(IX) >= real(IX), because that only depends on the |
478 | instruction lengths, and those being overestimated is a given. | |
2ee6d904 | 479 | |
21d55c67 | 480 | Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so |
481 | we needn't worry about that when thinking about OX. | |
2ee6d904 | 482 | |
21d55c67 | 483 | When X >= Y, the alignment provided by Y adds no uncertainty factor |
484 | for branch ranges starting before X, so we can just round what we have. | |
485 | But when X < Y, we don't know anything about the, so to speak, | |
486 | `middle bits', so we have to assume the worst when aligning up from an | |
487 | address mod X to one mod Y, which is Y - X. */ | |
488 | ||
489 | #ifndef LABEL_ALIGN | |
61e95947 | 490 | #define LABEL_ALIGN(LABEL) align_labels_log |
21d55c67 | 491 | #endif |
492 | ||
493 | #ifndef LOOP_ALIGN | |
61e95947 | 494 | #define LOOP_ALIGN(LABEL) align_loops_log |
21d55c67 | 495 | #endif |
496 | ||
497 | #ifndef LABEL_ALIGN_AFTER_BARRIER | |
feb8ef57 | 498 | #define LABEL_ALIGN_AFTER_BARRIER(LABEL) 0 |
21d55c67 | 499 | #endif |
500 | ||
312866af | 501 | #ifndef JUMP_ALIGN |
502 | #define JUMP_ALIGN(LABEL) align_jumps_log | |
503 | #endif | |
504 | ||
ae2b9f1f | 505 | int |
695d0571 | 506 | default_label_align_after_barrier_max_skip (rtx_insn *insn ATTRIBUTE_UNUSED) |
ae2b9f1f | 507 | { |
508 | return 0; | |
509 | } | |
510 | ||
511 | int | |
695d0571 | 512 | default_loop_align_max_skip (rtx_insn *insn ATTRIBUTE_UNUSED) |
ae2b9f1f | 513 | { |
514 | return align_loops_max_skip; | |
515 | } | |
516 | ||
517 | int | |
695d0571 | 518 | default_label_align_max_skip (rtx_insn *insn ATTRIBUTE_UNUSED) |
ae2b9f1f | 519 | { |
520 | return align_labels_max_skip; | |
521 | } | |
522 | ||
523 | int | |
695d0571 | 524 | default_jump_align_max_skip (rtx_insn *insn ATTRIBUTE_UNUSED) |
ae2b9f1f | 525 | { |
526 | return align_jumps_max_skip; | |
527 | } | |
3245cd4f | 528 | |
21d55c67 | 529 | #ifndef ADDR_VEC_ALIGN |
29fd0b7a | 530 | static int |
8a82c3cf | 531 | final_addr_vec_align (rtx addr_vec) |
21d55c67 | 532 | { |
3ed5e556 | 533 | int align = GET_MODE_SIZE (GET_MODE (PATTERN (addr_vec))); |
21d55c67 | 534 | |
535 | if (align > BIGGEST_ALIGNMENT / BITS_PER_UNIT) | |
536 | align = BIGGEST_ALIGNMENT / BITS_PER_UNIT; | |
3ed5e556 | 537 | return exact_log2 (align); |
21d55c67 | 538 | |
539 | } | |
2ee6d904 | 540 | |
21d55c67 | 541 | #define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC) |
542 | #endif | |
543 | ||
544 | #ifndef INSN_LENGTH_ALIGNMENT | |
545 | #define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log | |
546 | #endif | |
547 | ||
21d55c67 | 548 | #define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)]) |
549 | ||
f554d413 | 550 | static int min_labelno, max_labelno; |
21d55c67 | 551 | |
552 | #define LABEL_TO_ALIGNMENT(LABEL) \ | |
3245cd4f | 553 | (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment) |
554 | ||
555 | #define LABEL_TO_MAX_SKIP(LABEL) \ | |
556 | (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip) | |
21d55c67 | 557 | |
558 | /* For the benefit of port specific code do this also as a function. */ | |
2ee6d904 | 559 | |
21d55c67 | 560 | int |
8a82c3cf | 561 | label_to_alignment (rtx label) |
21d55c67 | 562 | { |
01e60dc2 | 563 | if (CODE_LABEL_NUMBER (label) <= max_labelno) |
564 | return LABEL_TO_ALIGNMENT (label); | |
565 | return 0; | |
566 | } | |
567 | ||
568 | int | |
569 | label_to_max_skip (rtx label) | |
570 | { | |
571 | if (CODE_LABEL_NUMBER (label) <= max_labelno) | |
572 | return LABEL_TO_MAX_SKIP (label); | |
573 | return 0; | |
21d55c67 | 574 | } |
575 | ||
21d55c67 | 576 | /* The differences in addresses |
577 | between a branch and its target might grow or shrink depending on | |
578 | the alignment the start insn of the range (the branch for a forward | |
579 | branch or the label for a backward branch) starts out on; if these | |
580 | differences are used naively, they can even oscillate infinitely. | |
581 | We therefore want to compute a 'worst case' address difference that | |
582 | is independent of the alignment the start insn of the range end | |
583 | up on, and that is at least as large as the actual difference. | |
584 | The function align_fuzz calculates the amount we have to add to the | |
585 | naively computed difference, by traversing the part of the alignment | |
586 | chain of the start insn of the range that is in front of the end insn | |
587 | of the range, and considering for each alignment the maximum amount | |
588 | that it might contribute to a size increase. | |
589 | ||
590 | For casesi tables, we also want to know worst case minimum amounts of | |
591 | address difference, in case a machine description wants to introduce | |
592 | some common offset that is added to all offsets in a table. | |
cb0ccc1e | 593 | For this purpose, align_fuzz with a growth argument of 0 computes the |
21d55c67 | 594 | appropriate adjustment. */ |
595 | ||
21d55c67 | 596 | /* Compute the maximum delta by which the difference of the addresses of |
597 | START and END might grow / shrink due to a different address for start | |
598 | which changes the size of alignment insns between START and END. | |
599 | KNOWN_ALIGN_LOG is the alignment known for START. | |
600 | GROWTH should be ~0 if the objective is to compute potential code size | |
601 | increase, and 0 if the objective is to compute potential shrink. | |
602 | The return value is undefined for any other value of GROWTH. */ | |
2ee6d904 | 603 | |
29fd0b7a | 604 | static int |
8a82c3cf | 605 | align_fuzz (rtx start, rtx end, int known_align_log, unsigned int growth) |
21d55c67 | 606 | { |
607 | int uid = INSN_UID (start); | |
608 | rtx align_label; | |
609 | int known_align = 1 << known_align_log; | |
610 | int end_shuid = INSN_SHUID (end); | |
611 | int fuzz = 0; | |
612 | ||
613 | for (align_label = uid_align[uid]; align_label; align_label = uid_align[uid]) | |
614 | { | |
615 | int align_addr, new_align; | |
616 | ||
617 | uid = INSN_UID (align_label); | |
47fc0706 | 618 | align_addr = INSN_ADDRESSES (uid) - insn_lengths[uid]; |
21d55c67 | 619 | if (uid_shuid[uid] > end_shuid) |
620 | break; | |
621 | known_align_log = LABEL_TO_ALIGNMENT (align_label); | |
622 | new_align = 1 << known_align_log; | |
623 | if (new_align < known_align) | |
624 | continue; | |
625 | fuzz += (-align_addr ^ growth) & (new_align - known_align); | |
626 | known_align = new_align; | |
627 | } | |
628 | return fuzz; | |
629 | } | |
630 | ||
631 | /* Compute a worst-case reference address of a branch so that it | |
632 | can be safely used in the presence of aligned labels. Since the | |
633 | size of the branch itself is unknown, the size of the branch is | |
634 | not included in the range. I.e. for a forward branch, the reference | |
635 | address is the end address of the branch as known from the previous | |
636 | branch shortening pass, minus a value to account for possible size | |
637 | increase due to alignment. For a backward branch, it is the start | |
638 | address of the branch as known from the current pass, plus a value | |
639 | to account for possible size increase due to alignment. | |
640 | NB.: Therefore, the maximum offset allowed for backward branches needs | |
641 | to exclude the branch size. */ | |
2ee6d904 | 642 | |
21d55c67 | 643 | int |
297a1f5a | 644 | insn_current_reference_address (rtx_insn *branch) |
21d55c67 | 645 | { |
9641f63c | 646 | rtx dest, seq; |
647 | int seq_uid; | |
648 | ||
649 | if (! INSN_ADDRESSES_SET_P ()) | |
650 | return 0; | |
651 | ||
652 | seq = NEXT_INSN (PREV_INSN (branch)); | |
653 | seq_uid = INSN_UID (seq); | |
6d7dc5b9 | 654 | if (!JUMP_P (branch)) |
21d55c67 | 655 | /* This can happen for example on the PA; the objective is to know the |
656 | offset to address something in front of the start of the function. | |
657 | Thus, we can treat it like a backward branch. | |
658 | We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than | |
659 | any alignment we'd encounter, so we skip the call to align_fuzz. */ | |
660 | return insn_current_address; | |
661 | dest = JUMP_LABEL (branch); | |
9641f63c | 662 | |
eca1c9c0 | 663 | /* BRANCH has no proper alignment chain set, so use SEQ. |
6da65e4e | 664 | BRANCH also has no INSN_SHUID. */ |
665 | if (INSN_SHUID (seq) < INSN_SHUID (dest)) | |
21d55c67 | 666 | { |
2ee6d904 | 667 | /* Forward branch. */ |
21d55c67 | 668 | return (insn_last_address + insn_lengths[seq_uid] |
a990bd38 | 669 | - align_fuzz (seq, dest, length_unit_log, ~0)); |
21d55c67 | 670 | } |
671 | else | |
672 | { | |
2ee6d904 | 673 | /* Backward branch. */ |
21d55c67 | 674 | return (insn_current_address |
7c1e0d7e | 675 | + align_fuzz (dest, seq, length_unit_log, ~0)); |
21d55c67 | 676 | } |
677 | } | |
21d55c67 | 678 | \f |
f9567f01 | 679 | /* Compute branch alignments based on frequency information in the |
680 | CFG. */ | |
681 | ||
e1ab7874 | 682 | unsigned int |
8a82c3cf | 683 | compute_alignments (void) |
312866af | 684 | { |
312866af | 685 | int log, max_skip, max_log; |
4c26117a | 686 | basic_block bb; |
7bd530d9 | 687 | int freq_max = 0; |
688 | int freq_threshold = 0; | |
312866af | 689 | |
690 | if (label_align) | |
691 | { | |
692 | free (label_align); | |
693 | label_align = 0; | |
694 | } | |
695 | ||
696 | max_labelno = max_label_num (); | |
697 | min_labelno = get_first_label_num (); | |
4c36ffe6 | 698 | label_align = XCNEWVEC (struct label_alignment, max_labelno - min_labelno + 1); |
312866af | 699 | |
700 | /* If not optimizing or optimizing for size, don't assign any alignments. */ | |
0bfd8d5c | 701 | if (! optimize || optimize_function_for_size_p (cfun)) |
2a1990e9 | 702 | return 0; |
312866af | 703 | |
7bd530d9 | 704 | if (dump_file) |
705 | { | |
4a020a8c | 706 | dump_reg_info (dump_file); |
7bd530d9 | 707 | dump_flow_info (dump_file, TDF_DETAILS); |
708 | flow_loops_dump (dump_file, NULL, 1); | |
7bd530d9 | 709 | } |
0683140a | 710 | loop_optimizer_init (AVOID_CFG_MODIFICATIONS); |
fc00614f | 711 | FOR_EACH_BB_FN (bb, cfun) |
7bd530d9 | 712 | if (bb->frequency > freq_max) |
713 | freq_max = bb->frequency; | |
714 | freq_threshold = freq_max / PARAM_VALUE (PARAM_ALIGN_THRESHOLD); | |
715 | ||
716 | if (dump_file) | |
9af5ce0c | 717 | fprintf (dump_file, "freq_max: %i\n",freq_max); |
fc00614f | 718 | FOR_EACH_BB_FN (bb, cfun) |
312866af | 719 | { |
82f53c1f | 720 | rtx_insn *label = BB_HEAD (bb); |
312866af | 721 | int fallthru_frequency = 0, branch_frequency = 0, has_fallthru = 0; |
722 | edge e; | |
cd665a06 | 723 | edge_iterator ei; |
312866af | 724 | |
6d7dc5b9 | 725 | if (!LABEL_P (label) |
7baffbd3 | 726 | || optimize_bb_for_size_p (bb)) |
7bd530d9 | 727 | { |
728 | if (dump_file) | |
9af5ce0c | 729 | fprintf (dump_file, |
730 | "BB %4i freq %4i loop %2i loop_depth %2i skipped.\n", | |
731 | bb->index, bb->frequency, bb->loop_father->num, | |
732 | bb_loop_depth (bb)); | |
7bd530d9 | 733 | continue; |
734 | } | |
312866af | 735 | max_log = LABEL_ALIGN (label); |
ae2b9f1f | 736 | max_skip = targetm.asm_out.label_align_max_skip (label); |
312866af | 737 | |
cd665a06 | 738 | FOR_EACH_EDGE (e, ei, bb->preds) |
312866af | 739 | { |
740 | if (e->flags & EDGE_FALLTHRU) | |
741 | has_fallthru = 1, fallthru_frequency += EDGE_FREQUENCY (e); | |
742 | else | |
743 | branch_frequency += EDGE_FREQUENCY (e); | |
744 | } | |
7bd530d9 | 745 | if (dump_file) |
746 | { | |
9af5ce0c | 747 | fprintf (dump_file, "BB %4i freq %4i loop %2i loop_depth" |
748 | " %2i fall %4i branch %4i", | |
749 | bb->index, bb->frequency, bb->loop_father->num, | |
750 | bb_loop_depth (bb), | |
751 | fallthru_frequency, branch_frequency); | |
7bd530d9 | 752 | if (!bb->loop_father->inner && bb->loop_father->num) |
753 | fprintf (dump_file, " inner_loop"); | |
754 | if (bb->loop_father->header == bb) | |
755 | fprintf (dump_file, " loop_header"); | |
756 | fprintf (dump_file, "\n"); | |
757 | } | |
312866af | 758 | |
dd5b4b36 | 759 | /* There are two purposes to align block with no fallthru incoming edge: |
312866af | 760 | 1) to avoid fetch stalls when branch destination is near cache boundary |
cb0ccc1e | 761 | 2) to improve cache efficiency in case the previous block is not executed |
312866af | 762 | (so it does not need to be in the cache). |
763 | ||
764 | We to catch first case, we align frequently executed blocks. | |
765 | To catch the second, we align blocks that are executed more frequently | |
4a82352a | 766 | than the predecessor and the predecessor is likely to not be executed |
312866af | 767 | when function is called. */ |
768 | ||
769 | if (!has_fallthru | |
7bd530d9 | 770 | && (branch_frequency > freq_threshold |
345ac34a | 771 | || (bb->frequency > bb->prev_bb->frequency * 10 |
772 | && (bb->prev_bb->frequency | |
34154e27 | 773 | <= ENTRY_BLOCK_PTR_FOR_FN (cfun)->frequency / 2)))) |
312866af | 774 | { |
775 | log = JUMP_ALIGN (label); | |
7bd530d9 | 776 | if (dump_file) |
9af5ce0c | 777 | fprintf (dump_file, " jump alignment added.\n"); |
312866af | 778 | if (max_log < log) |
779 | { | |
780 | max_log = log; | |
ae2b9f1f | 781 | max_skip = targetm.asm_out.jump_align_max_skip (label); |
312866af | 782 | } |
783 | } | |
784 | /* In case block is frequent and reached mostly by non-fallthru edge, | |
edc2a478 | 785 | align it. It is most likely a first block of loop. */ |
312866af | 786 | if (has_fallthru |
9e7cf504 | 787 | && !(single_succ_p (bb) |
788 | && single_succ (bb) == EXIT_BLOCK_PTR_FOR_FN (cfun)) | |
0bfd8d5c | 789 | && optimize_bb_for_speed_p (bb) |
7bd530d9 | 790 | && branch_frequency + fallthru_frequency > freq_threshold |
791 | && (branch_frequency | |
792 | > fallthru_frequency * PARAM_VALUE (PARAM_ALIGN_LOOP_ITERATIONS))) | |
312866af | 793 | { |
794 | log = LOOP_ALIGN (label); | |
7bd530d9 | 795 | if (dump_file) |
9af5ce0c | 796 | fprintf (dump_file, " internal loop alignment added.\n"); |
312866af | 797 | if (max_log < log) |
798 | { | |
799 | max_log = log; | |
ae2b9f1f | 800 | max_skip = targetm.asm_out.loop_align_max_skip (label); |
312866af | 801 | } |
802 | } | |
803 | LABEL_TO_ALIGNMENT (label) = max_log; | |
804 | LABEL_TO_MAX_SKIP (label) = max_skip; | |
805 | } | |
7bd530d9 | 806 | |
0683140a | 807 | loop_optimizer_finalize (); |
808 | free_dominance_info (CDI_DOMINATORS); | |
2a1990e9 | 809 | return 0; |
312866af | 810 | } |
77fce4cd | 811 | |
14e08599 | 812 | /* Grow the LABEL_ALIGN array after new labels are created. */ |
813 | ||
814 | static void | |
815 | grow_label_align (void) | |
816 | { | |
817 | int old = max_labelno; | |
818 | int n_labels; | |
819 | int n_old_labels; | |
820 | ||
821 | max_labelno = max_label_num (); | |
822 | ||
823 | n_labels = max_labelno - min_labelno + 1; | |
824 | n_old_labels = old - min_labelno + 1; | |
825 | ||
826 | label_align = XRESIZEVEC (struct label_alignment, label_align, n_labels); | |
827 | ||
828 | /* Range of labels grows monotonically in the function. Failing here | |
829 | means that the initialization of array got lost. */ | |
830 | gcc_assert (n_old_labels <= n_labels); | |
831 | ||
832 | memset (label_align + n_old_labels, 0, | |
833 | (n_labels - n_old_labels) * sizeof (struct label_alignment)); | |
834 | } | |
835 | ||
836 | /* Update the already computed alignment information. LABEL_PAIRS is a vector | |
837 | made up of pairs of labels for which the alignment information of the first | |
838 | element will be copied from that of the second element. */ | |
839 | ||
840 | void | |
841 | update_alignments (vec<rtx> &label_pairs) | |
842 | { | |
843 | unsigned int i = 0; | |
84c25f5d | 844 | rtx iter, label = NULL_RTX; |
14e08599 | 845 | |
846 | if (max_labelno != max_label_num ()) | |
847 | grow_label_align (); | |
848 | ||
849 | FOR_EACH_VEC_ELT (label_pairs, i, iter) | |
850 | if (i & 1) | |
851 | { | |
852 | LABEL_TO_ALIGNMENT (label) = LABEL_TO_ALIGNMENT (iter); | |
853 | LABEL_TO_MAX_SKIP (label) = LABEL_TO_MAX_SKIP (iter); | |
854 | } | |
855 | else | |
856 | label = iter; | |
857 | } | |
858 | ||
cbe8bda8 | 859 | namespace { |
860 | ||
861 | const pass_data pass_data_compute_alignments = | |
77fce4cd | 862 | { |
cbe8bda8 | 863 | RTL_PASS, /* type */ |
864 | "alignments", /* name */ | |
865 | OPTGROUP_NONE, /* optinfo_flags */ | |
cbe8bda8 | 866 | TV_NONE, /* tv_id */ |
867 | 0, /* properties_required */ | |
868 | 0, /* properties_provided */ | |
869 | 0, /* properties_destroyed */ | |
870 | 0, /* todo_flags_start */ | |
8b88439e | 871 | 0, /* todo_flags_finish */ |
77fce4cd | 872 | }; |
873 | ||
cbe8bda8 | 874 | class pass_compute_alignments : public rtl_opt_pass |
875 | { | |
876 | public: | |
9af5ce0c | 877 | pass_compute_alignments (gcc::context *ctxt) |
878 | : rtl_opt_pass (pass_data_compute_alignments, ctxt) | |
cbe8bda8 | 879 | {} |
880 | ||
881 | /* opt_pass methods: */ | |
65b0537f | 882 | virtual unsigned int execute (function *) { return compute_alignments (); } |
cbe8bda8 | 883 | |
884 | }; // class pass_compute_alignments | |
885 | ||
886 | } // anon namespace | |
887 | ||
888 | rtl_opt_pass * | |
889 | make_pass_compute_alignments (gcc::context *ctxt) | |
890 | { | |
891 | return new pass_compute_alignments (ctxt); | |
892 | } | |
893 | ||
312866af | 894 | \f |
7f446223 | 895 | /* Make a pass over all insns and compute their actual lengths by shortening |
896 | any branches of variable length if possible. */ | |
897 | ||
21d55c67 | 898 | /* shorten_branches might be called multiple times: for example, the SH |
899 | port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG. | |
900 | In order to do this, it needs proper length information, which it obtains | |
901 | by calling shorten_branches. This cannot be collapsed with | |
cb0ccc1e | 902 | shorten_branches itself into a single pass unless we also want to integrate |
21d55c67 | 903 | reorg.c, since the branch splitting exposes new instructions with delay |
904 | slots. */ | |
905 | ||
7f446223 | 906 | void |
91211f47 | 907 | shorten_branches (rtx_insn *first) |
7f446223 | 908 | { |
82f53c1f | 909 | rtx_insn *insn; |
21d55c67 | 910 | int max_uid; |
911 | int i; | |
21d55c67 | 912 | int max_log; |
3245cd4f | 913 | int max_skip; |
21d55c67 | 914 | #define MAX_CODE_ALIGN 16 |
82f53c1f | 915 | rtx_insn *seq; |
7f446223 | 916 | int something_changed = 1; |
7f446223 | 917 | char *varying_length; |
918 | rtx body; | |
919 | int uid; | |
21d55c67 | 920 | rtx align_tab[MAX_CODE_ALIGN]; |
7f446223 | 921 | |
e6c99545 | 922 | /* Compute maximum UID and allocate label_align / uid_shuid. */ |
923 | max_uid = get_max_uid (); | |
8ebf91ff | 924 | |
dac49aa5 | 925 | /* Free uid_shuid before reallocating it. */ |
c1b26572 | 926 | free (uid_shuid); |
312f4798 | 927 | |
4c36ffe6 | 928 | uid_shuid = XNEWVEC (int, max_uid); |
9a21c785 | 929 | |
312866af | 930 | if (max_labelno != max_label_num ()) |
14e08599 | 931 | grow_label_align (); |
312866af | 932 | |
21d55c67 | 933 | /* Initialize label_align and set up uid_shuid to be strictly |
934 | monotonically rising with insn order. */ | |
a80ce1a1 | 935 | /* We use max_log here to keep track of the maximum alignment we want to |
936 | impose on the next CODE_LABEL (or the current one if we are processing | |
937 | the CODE_LABEL itself). */ | |
2ee6d904 | 938 | |
3245cd4f | 939 | max_log = 0; |
940 | max_skip = 0; | |
941 | ||
942 | for (insn = get_insns (), i = 1; insn; insn = NEXT_INSN (insn)) | |
21d55c67 | 943 | { |
944 | int log; | |
945 | ||
946 | INSN_SHUID (insn) = i++; | |
9204e736 | 947 | if (INSN_P (insn)) |
d84aa71e | 948 | continue; |
312f4798 | 949 | |
d84aa71e | 950 | if (LABEL_P (insn)) |
21d55c67 | 951 | { |
82f53c1f | 952 | rtx_insn *next; |
88facd8b | 953 | bool next_is_jumptable; |
ed1e5d40 | 954 | |
312866af | 955 | /* Merge in alignments computed by compute_alignments. */ |
956 | log = LABEL_TO_ALIGNMENT (insn); | |
957 | if (max_log < log) | |
958 | { | |
959 | max_log = log; | |
960 | max_skip = LABEL_TO_MAX_SKIP (insn); | |
961 | } | |
21d55c67 | 962 | |
88facd8b | 963 | next = next_nonnote_insn (insn); |
964 | next_is_jumptable = next && JUMP_TABLE_DATA_P (next); | |
965 | if (!next_is_jumptable) | |
3245cd4f | 966 | { |
88facd8b | 967 | log = LABEL_ALIGN (insn); |
968 | if (max_log < log) | |
969 | { | |
970 | max_log = log; | |
ae2b9f1f | 971 | max_skip = targetm.asm_out.label_align_max_skip (insn); |
88facd8b | 972 | } |
3245cd4f | 973 | } |
6b5be7f8 | 974 | /* ADDR_VECs only take room if read-only data goes into the text |
975 | section. */ | |
88facd8b | 976 | if ((JUMP_TABLES_IN_TEXT_SECTION |
977 | || readonly_data_section == text_section) | |
978 | && next_is_jumptable) | |
979 | { | |
980 | log = ADDR_VEC_ALIGN (next); | |
981 | if (max_log < log) | |
982 | { | |
983 | max_log = log; | |
ae2b9f1f | 984 | max_skip = targetm.asm_out.label_align_max_skip (insn); |
88facd8b | 985 | } |
986 | } | |
21d55c67 | 987 | LABEL_TO_ALIGNMENT (insn) = max_log; |
3245cd4f | 988 | LABEL_TO_MAX_SKIP (insn) = max_skip; |
21d55c67 | 989 | max_log = 0; |
3245cd4f | 990 | max_skip = 0; |
21d55c67 | 991 | } |
6d7dc5b9 | 992 | else if (BARRIER_P (insn)) |
21d55c67 | 993 | { |
82f53c1f | 994 | rtx_insn *label; |
21d55c67 | 995 | |
9204e736 | 996 | for (label = insn; label && ! INSN_P (label); |
21d55c67 | 997 | label = NEXT_INSN (label)) |
6d7dc5b9 | 998 | if (LABEL_P (label)) |
21d55c67 | 999 | { |
1000 | log = LABEL_ALIGN_AFTER_BARRIER (insn); | |
1001 | if (max_log < log) | |
3245cd4f | 1002 | { |
1003 | max_log = log; | |
ae2b9f1f | 1004 | max_skip = targetm.asm_out.label_align_after_barrier_max_skip (label); |
3245cd4f | 1005 | } |
21d55c67 | 1006 | break; |
1007 | } | |
1008 | } | |
21d55c67 | 1009 | } |
f2d92d7a | 1010 | if (!HAVE_ATTR_length) |
1011 | return; | |
21d55c67 | 1012 | |
1013 | /* Allocate the rest of the arrays. */ | |
4c36ffe6 | 1014 | insn_lengths = XNEWVEC (int, max_uid); |
c624cb53 | 1015 | insn_lengths_max_uid = max_uid; |
24fcb0a5 | 1016 | /* Syntax errors can lead to labels being outside of the main insn stream. |
1017 | Initialize insn_addresses, so that we get reproducible results. */ | |
47fc0706 | 1018 | INSN_ADDRESSES_ALLOC (max_uid); |
21d55c67 | 1019 | |
4c36ffe6 | 1020 | varying_length = XCNEWVEC (char, max_uid); |
21d55c67 | 1021 | |
1022 | /* Initialize uid_align. We scan instructions | |
1023 | from end to start, and keep in align_tab[n] the last seen insn | |
1024 | that does an alignment of at least n+1, i.e. the successor | |
1025 | in the alignment chain for an insn that does / has a known | |
1026 | alignment of n. */ | |
4c36ffe6 | 1027 | uid_align = XCNEWVEC (rtx, max_uid); |
21d55c67 | 1028 | |
2ee6d904 | 1029 | for (i = MAX_CODE_ALIGN; --i >= 0;) |
21d55c67 | 1030 | align_tab[i] = NULL_RTX; |
1031 | seq = get_last_insn (); | |
9eaab178 | 1032 | for (; seq; seq = PREV_INSN (seq)) |
21d55c67 | 1033 | { |
1034 | int uid = INSN_UID (seq); | |
1035 | int log; | |
6d7dc5b9 | 1036 | log = (LABEL_P (seq) ? LABEL_TO_ALIGNMENT (seq) : 0); |
21d55c67 | 1037 | uid_align[uid] = align_tab[0]; |
21d55c67 | 1038 | if (log) |
1039 | { | |
1040 | /* Found an alignment label. */ | |
1041 | uid_align[uid] = align_tab[log]; | |
1042 | for (i = log - 1; i >= 0; i--) | |
1043 | align_tab[i] = seq; | |
1044 | } | |
9eaab178 | 1045 | } |
f860c994 | 1046 | |
1047 | /* When optimizing, we start assuming minimum length, and keep increasing | |
1048 | lengths as we find the need for this, till nothing changes. | |
1049 | When not optimizing, we start assuming maximum lengths, and | |
1050 | do a single pass to update the lengths. */ | |
1051 | bool increasing = optimize != 0; | |
1052 | ||
9eaab178 | 1053 | #ifdef CASE_VECTOR_SHORTEN_MODE |
1054 | if (optimize) | |
1055 | { | |
1056 | /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum | |
1057 | label fields. */ | |
1058 | ||
1059 | int min_shuid = INSN_SHUID (get_insns ()) - 1; | |
1060 | int max_shuid = INSN_SHUID (get_last_insn ()) + 1; | |
1061 | int rel; | |
1062 | ||
1063 | for (insn = first; insn != 0; insn = NEXT_INSN (insn)) | |
21d55c67 | 1064 | { |
9eaab178 | 1065 | rtx min_lab = NULL_RTX, max_lab = NULL_RTX, pat; |
1066 | int len, i, min, max, insn_shuid; | |
1067 | int min_align; | |
1068 | addr_diff_vec_flags flags; | |
1069 | ||
77985f1a | 1070 | if (! JUMP_TABLE_DATA_P (insn) |
9eaab178 | 1071 | || GET_CODE (PATTERN (insn)) != ADDR_DIFF_VEC) |
1072 | continue; | |
1073 | pat = PATTERN (insn); | |
1074 | len = XVECLEN (pat, 1); | |
fdada98f | 1075 | gcc_assert (len > 0); |
9eaab178 | 1076 | min_align = MAX_CODE_ALIGN; |
1077 | for (min = max_shuid, max = min_shuid, i = len - 1; i >= 0; i--) | |
1078 | { | |
1079 | rtx lab = XEXP (XVECEXP (pat, 1, i), 0); | |
1080 | int shuid = INSN_SHUID (lab); | |
1081 | if (shuid < min) | |
1082 | { | |
1083 | min = shuid; | |
1084 | min_lab = lab; | |
1085 | } | |
1086 | if (shuid > max) | |
1087 | { | |
1088 | max = shuid; | |
1089 | max_lab = lab; | |
1090 | } | |
1091 | if (min_align > LABEL_TO_ALIGNMENT (lab)) | |
1092 | min_align = LABEL_TO_ALIGNMENT (lab); | |
1093 | } | |
514b43f8 | 1094 | XEXP (pat, 2) = gen_rtx_LABEL_REF (Pmode, min_lab); |
1095 | XEXP (pat, 3) = gen_rtx_LABEL_REF (Pmode, max_lab); | |
9eaab178 | 1096 | insn_shuid = INSN_SHUID (insn); |
1097 | rel = INSN_SHUID (XEXP (XEXP (pat, 0), 0)); | |
f02ab8c0 | 1098 | memset (&flags, 0, sizeof (flags)); |
9eaab178 | 1099 | flags.min_align = min_align; |
1100 | flags.base_after_vec = rel > insn_shuid; | |
1101 | flags.min_after_vec = min > insn_shuid; | |
1102 | flags.max_after_vec = max > insn_shuid; | |
1103 | flags.min_after_base = min > rel; | |
1104 | flags.max_after_base = max > rel; | |
1105 | ADDR_DIFF_VEC_FLAGS (pat) = flags; | |
f860c994 | 1106 | |
1107 | if (increasing) | |
1108 | PUT_MODE (pat, CASE_VECTOR_SHORTEN_MODE (0, 0, pat)); | |
21d55c67 | 1109 | } |
1110 | } | |
9eaab178 | 1111 | #endif /* CASE_VECTOR_SHORTEN_MODE */ |
7f446223 | 1112 | |
7f446223 | 1113 | /* Compute initial lengths, addresses, and varying flags for each insn. */ |
d3ffa7b4 | 1114 | int (*length_fun) (rtx_insn *) = increasing ? insn_min_length : insn_default_length; |
f860c994 | 1115 | |
0d3fde44 | 1116 | for (insn_current_address = 0, insn = first; |
7f446223 | 1117 | insn != 0; |
1118 | insn_current_address += insn_lengths[uid], insn = NEXT_INSN (insn)) | |
1119 | { | |
1120 | uid = INSN_UID (insn); | |
21d55c67 | 1121 | |
7f446223 | 1122 | insn_lengths[uid] = 0; |
21d55c67 | 1123 | |
6d7dc5b9 | 1124 | if (LABEL_P (insn)) |
21d55c67 | 1125 | { |
1126 | int log = LABEL_TO_ALIGNMENT (insn); | |
1127 | if (log) | |
1128 | { | |
1129 | int align = 1 << log; | |
3c5c852a | 1130 | int new_address = (insn_current_address + align - 1) & -align; |
21d55c67 | 1131 | insn_lengths[uid] = new_address - insn_current_address; |
21d55c67 | 1132 | } |
1133 | } | |
1134 | ||
cea53e0a | 1135 | INSN_ADDRESSES (uid) = insn_current_address + insn_lengths[uid]; |
2ee6d904 | 1136 | |
6d7dc5b9 | 1137 | if (NOTE_P (insn) || BARRIER_P (insn) |
9af5ce0c | 1138 | || LABEL_P (insn) || DEBUG_INSN_P (insn)) |
7f446223 | 1139 | continue; |
dd1286fb | 1140 | if (insn->deleted ()) |
1e72441c | 1141 | continue; |
7f446223 | 1142 | |
1143 | body = PATTERN (insn); | |
77985f1a | 1144 | if (JUMP_TABLE_DATA_P (insn)) |
ed3baa9d | 1145 | { |
1146 | /* This only takes room if read-only data goes into the text | |
1147 | section. */ | |
2f14b1f9 | 1148 | if (JUMP_TABLES_IN_TEXT_SECTION |
1149 | || readonly_data_section == text_section) | |
6b5be7f8 | 1150 | insn_lengths[uid] = (XVECLEN (body, |
1151 | GET_CODE (body) == ADDR_DIFF_VEC) | |
1152 | * GET_MODE_SIZE (GET_MODE (body))); | |
ed3baa9d | 1153 | /* Alignment is handled by ADDR_VEC_ALIGN. */ |
ed3baa9d | 1154 | } |
f5ce8a6d | 1155 | else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0) |
7f446223 | 1156 | insn_lengths[uid] = asm_insn_count (body) * insn_default_length (insn); |
3a0b41f5 | 1157 | else if (rtx_sequence *body_seq = dyn_cast <rtx_sequence *> (body)) |
7f446223 | 1158 | { |
1159 | int i; | |
1160 | int const_delay_slots; | |
1161 | #ifdef DELAY_SLOTS | |
3a0b41f5 | 1162 | const_delay_slots = const_num_delay_slots (body_seq->insn (0)); |
7f446223 | 1163 | #else |
1164 | const_delay_slots = 0; | |
1165 | #endif | |
d3ffa7b4 | 1166 | int (*inner_length_fun) (rtx_insn *) |
f860c994 | 1167 | = const_delay_slots ? length_fun : insn_default_length; |
7f446223 | 1168 | /* Inside a delay slot sequence, we do not do any branch shortening |
1169 | if the shortening could change the number of delay slots | |
a92771b8 | 1170 | of the branch. */ |
3a0b41f5 | 1171 | for (i = 0; i < body_seq->len (); i++) |
7f446223 | 1172 | { |
3a0b41f5 | 1173 | rtx_insn *inner_insn = body_seq->insn (i); |
7f446223 | 1174 | int inner_uid = INSN_UID (inner_insn); |
1175 | int inner_length; | |
1176 | ||
f5ce8a6d | 1177 | if (GET_CODE (body) == ASM_INPUT |
3a0b41f5 | 1178 | || asm_noperands (PATTERN (inner_insn)) >= 0) |
7f446223 | 1179 | inner_length = (asm_insn_count (PATTERN (inner_insn)) |
1180 | * insn_default_length (inner_insn)); | |
1181 | else | |
f860c994 | 1182 | inner_length = inner_length_fun (inner_insn); |
2ee6d904 | 1183 | |
7f446223 | 1184 | insn_lengths[inner_uid] = inner_length; |
1185 | if (const_delay_slots) | |
1186 | { | |
1187 | if ((varying_length[inner_uid] | |
1188 | = insn_variable_length_p (inner_insn)) != 0) | |
1189 | varying_length[uid] = 1; | |
47fc0706 | 1190 | INSN_ADDRESSES (inner_uid) = (insn_current_address |
1191 | + insn_lengths[uid]); | |
7f446223 | 1192 | } |
1193 | else | |
1194 | varying_length[inner_uid] = 0; | |
1195 | insn_lengths[uid] += inner_length; | |
1196 | } | |
1197 | } | |
1198 | else if (GET_CODE (body) != USE && GET_CODE (body) != CLOBBER) | |
1199 | { | |
f860c994 | 1200 | insn_lengths[uid] = length_fun (insn); |
7f446223 | 1201 | varying_length[uid] = insn_variable_length_p (insn); |
1202 | } | |
1203 | ||
1204 | /* If needed, do any adjustment. */ | |
1205 | #ifdef ADJUST_INSN_LENGTH | |
1206 | ADJUST_INSN_LENGTH (insn, insn_lengths[uid]); | |
8d0fbce4 | 1207 | if (insn_lengths[uid] < 0) |
68435912 | 1208 | fatal_insn ("negative insn length", insn); |
7f446223 | 1209 | #endif |
1210 | } | |
1211 | ||
1212 | /* Now loop over all the insns finding varying length insns. For each, | |
1213 | get the current insn length. If it has changed, reflect the change. | |
1214 | When nothing changes for a full pass, we are done. */ | |
1215 | ||
1216 | while (something_changed) | |
1217 | { | |
1218 | something_changed = 0; | |
21d55c67 | 1219 | insn_current_align = MAX_CODE_ALIGN - 1; |
0d3fde44 | 1220 | for (insn_current_address = 0, insn = first; |
7f446223 | 1221 | insn != 0; |
1222 | insn = NEXT_INSN (insn)) | |
1223 | { | |
1224 | int new_length; | |
6536bc06 | 1225 | #ifdef ADJUST_INSN_LENGTH |
7f446223 | 1226 | int tmp_length; |
6536bc06 | 1227 | #endif |
21d55c67 | 1228 | int length_align; |
7f446223 | 1229 | |
1230 | uid = INSN_UID (insn); | |
21d55c67 | 1231 | |
6d7dc5b9 | 1232 | if (LABEL_P (insn)) |
21d55c67 | 1233 | { |
1234 | int log = LABEL_TO_ALIGNMENT (insn); | |
1969f96d | 1235 | |
1236 | #ifdef CASE_VECTOR_SHORTEN_MODE | |
1237 | /* If the mode of a following jump table was changed, we | |
1238 | may need to update the alignment of this label. */ | |
82f53c1f | 1239 | rtx_insn *next; |
1969f96d | 1240 | bool next_is_jumptable; |
1241 | ||
1242 | next = next_nonnote_insn (insn); | |
1243 | next_is_jumptable = next && JUMP_TABLE_DATA_P (next); | |
1244 | if ((JUMP_TABLES_IN_TEXT_SECTION | |
1245 | || readonly_data_section == text_section) | |
1246 | && next_is_jumptable) | |
1247 | { | |
1248 | int newlog = ADDR_VEC_ALIGN (next); | |
1249 | if (newlog != log) | |
1250 | { | |
1251 | log = newlog; | |
1252 | LABEL_TO_ALIGNMENT (insn) = log; | |
1253 | something_changed = 1; | |
1254 | } | |
1255 | } | |
1256 | #endif | |
1257 | ||
21d55c67 | 1258 | if (log > insn_current_align) |
1259 | { | |
1260 | int align = 1 << log; | |
3c5c852a | 1261 | int new_address= (insn_current_address + align - 1) & -align; |
21d55c67 | 1262 | insn_lengths[uid] = new_address - insn_current_address; |
1263 | insn_current_align = log; | |
1264 | insn_current_address = new_address; | |
1265 | } | |
1266 | else | |
1267 | insn_lengths[uid] = 0; | |
47fc0706 | 1268 | INSN_ADDRESSES (uid) = insn_current_address; |
21d55c67 | 1269 | continue; |
1270 | } | |
1271 | ||
1272 | length_align = INSN_LENGTH_ALIGNMENT (insn); | |
1273 | if (length_align < insn_current_align) | |
1274 | insn_current_align = length_align; | |
1275 | ||
47fc0706 | 1276 | insn_last_address = INSN_ADDRESSES (uid); |
1277 | INSN_ADDRESSES (uid) = insn_current_address; | |
21d55c67 | 1278 | |
e7b305d0 | 1279 | #ifdef CASE_VECTOR_SHORTEN_MODE |
77985f1a | 1280 | if (optimize |
1281 | && JUMP_TABLE_DATA_P (insn) | |
9eaab178 | 1282 | && GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC) |
1283 | { | |
9eaab178 | 1284 | rtx body = PATTERN (insn); |
1285 | int old_length = insn_lengths[uid]; | |
91a55c11 | 1286 | rtx_insn *rel_lab = |
1287 | safe_as_a <rtx_insn *> (XEXP (XEXP (body, 0), 0)); | |
9eaab178 | 1288 | rtx min_lab = XEXP (XEXP (body, 2), 0); |
1289 | rtx max_lab = XEXP (XEXP (body, 3), 0); | |
47fc0706 | 1290 | int rel_addr = INSN_ADDRESSES (INSN_UID (rel_lab)); |
1291 | int min_addr = INSN_ADDRESSES (INSN_UID (min_lab)); | |
1292 | int max_addr = INSN_ADDRESSES (INSN_UID (max_lab)); | |
91a55c11 | 1293 | rtx_insn *prev; |
9eaab178 | 1294 | int rel_align = 0; |
e51fa923 | 1295 | addr_diff_vec_flags flags; |
f860c994 | 1296 | enum machine_mode vec_mode; |
e51fa923 | 1297 | |
1298 | /* Avoid automatic aggregate initialization. */ | |
1299 | flags = ADDR_DIFF_VEC_FLAGS (body); | |
9eaab178 | 1300 | |
1301 | /* Try to find a known alignment for rel_lab. */ | |
1302 | for (prev = rel_lab; | |
1303 | prev | |
1304 | && ! insn_lengths[INSN_UID (prev)] | |
1305 | && ! (varying_length[INSN_UID (prev)] & 1); | |
1306 | prev = PREV_INSN (prev)) | |
1307 | if (varying_length[INSN_UID (prev)] & 2) | |
1308 | { | |
1309 | rel_align = LABEL_TO_ALIGNMENT (prev); | |
1310 | break; | |
1311 | } | |
1312 | ||
1313 | /* See the comment on addr_diff_vec_flags in rtl.h for the | |
1314 | meaning of the flags values. base: REL_LAB vec: INSN */ | |
1315 | /* Anything after INSN has still addresses from the last | |
1316 | pass; adjust these so that they reflect our current | |
1317 | estimate for this pass. */ | |
1318 | if (flags.base_after_vec) | |
1319 | rel_addr += insn_current_address - insn_last_address; | |
1320 | if (flags.min_after_vec) | |
1321 | min_addr += insn_current_address - insn_last_address; | |
1322 | if (flags.max_after_vec) | |
1323 | max_addr += insn_current_address - insn_last_address; | |
1324 | /* We want to know the worst case, i.e. lowest possible value | |
1325 | for the offset of MIN_LAB. If MIN_LAB is after REL_LAB, | |
1326 | its offset is positive, and we have to be wary of code shrink; | |
1327 | otherwise, it is negative, and we have to be vary of code | |
1328 | size increase. */ | |
1329 | if (flags.min_after_base) | |
1330 | { | |
1331 | /* If INSN is between REL_LAB and MIN_LAB, the size | |
1332 | changes we are about to make can change the alignment | |
1333 | within the observed offset, therefore we have to break | |
1334 | it up into two parts that are independent. */ | |
1335 | if (! flags.base_after_vec && flags.min_after_vec) | |
1336 | { | |
1337 | min_addr -= align_fuzz (rel_lab, insn, rel_align, 0); | |
1338 | min_addr -= align_fuzz (insn, min_lab, 0, 0); | |
1339 | } | |
1340 | else | |
1341 | min_addr -= align_fuzz (rel_lab, min_lab, rel_align, 0); | |
1342 | } | |
1343 | else | |
1344 | { | |
1345 | if (flags.base_after_vec && ! flags.min_after_vec) | |
1346 | { | |
1347 | min_addr -= align_fuzz (min_lab, insn, 0, ~0); | |
1348 | min_addr -= align_fuzz (insn, rel_lab, 0, ~0); | |
1349 | } | |
1350 | else | |
1351 | min_addr -= align_fuzz (min_lab, rel_lab, 0, ~0); | |
1352 | } | |
1353 | /* Likewise, determine the highest lowest possible value | |
1354 | for the offset of MAX_LAB. */ | |
1355 | if (flags.max_after_base) | |
1356 | { | |
1357 | if (! flags.base_after_vec && flags.max_after_vec) | |
1358 | { | |
1359 | max_addr += align_fuzz (rel_lab, insn, rel_align, ~0); | |
1360 | max_addr += align_fuzz (insn, max_lab, 0, ~0); | |
1361 | } | |
1362 | else | |
1363 | max_addr += align_fuzz (rel_lab, max_lab, rel_align, ~0); | |
1364 | } | |
1365 | else | |
1366 | { | |
1367 | if (flags.base_after_vec && ! flags.max_after_vec) | |
1368 | { | |
1369 | max_addr += align_fuzz (max_lab, insn, 0, 0); | |
1370 | max_addr += align_fuzz (insn, rel_lab, 0, 0); | |
1371 | } | |
1372 | else | |
1373 | max_addr += align_fuzz (max_lab, rel_lab, 0, 0); | |
1374 | } | |
f860c994 | 1375 | vec_mode = CASE_VECTOR_SHORTEN_MODE (min_addr - rel_addr, |
1376 | max_addr - rel_addr, body); | |
1377 | if (!increasing | |
1378 | || (GET_MODE_SIZE (vec_mode) | |
1379 | >= GET_MODE_SIZE (GET_MODE (body)))) | |
1380 | PUT_MODE (body, vec_mode); | |
2f14b1f9 | 1381 | if (JUMP_TABLES_IN_TEXT_SECTION |
1382 | || readonly_data_section == text_section) | |
6b5be7f8 | 1383 | { |
1384 | insn_lengths[uid] | |
1385 | = (XVECLEN (body, 1) * GET_MODE_SIZE (GET_MODE (body))); | |
1386 | insn_current_address += insn_lengths[uid]; | |
1387 | if (insn_lengths[uid] != old_length) | |
1388 | something_changed = 1; | |
1389 | } | |
1390 | ||
9eaab178 | 1391 | continue; |
9eaab178 | 1392 | } |
e7b305d0 | 1393 | #endif /* CASE_VECTOR_SHORTEN_MODE */ |
1394 | ||
1395 | if (! (varying_length[uid])) | |
7f446223 | 1396 | { |
6d7dc5b9 | 1397 | if (NONJUMP_INSN_P (insn) |
79141bb7 | 1398 | && GET_CODE (PATTERN (insn)) == SEQUENCE) |
1399 | { | |
1400 | int i; | |
1401 | ||
1402 | body = PATTERN (insn); | |
1403 | for (i = 0; i < XVECLEN (body, 0); i++) | |
1404 | { | |
1405 | rtx inner_insn = XVECEXP (body, 0, i); | |
1406 | int inner_uid = INSN_UID (inner_insn); | |
1407 | ||
1408 | INSN_ADDRESSES (inner_uid) = insn_current_address; | |
1409 | ||
1410 | insn_current_address += insn_lengths[inner_uid]; | |
1411 | } | |
d3371fcd | 1412 | } |
79141bb7 | 1413 | else |
1414 | insn_current_address += insn_lengths[uid]; | |
1415 | ||
7f446223 | 1416 | continue; |
1417 | } | |
79141bb7 | 1418 | |
6d7dc5b9 | 1419 | if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE) |
7f446223 | 1420 | { |
d3ffa7b4 | 1421 | rtx_sequence *seqn = as_a <rtx_sequence *> (PATTERN (insn)); |
7f446223 | 1422 | int i; |
2ee6d904 | 1423 | |
7f446223 | 1424 | body = PATTERN (insn); |
1425 | new_length = 0; | |
d3ffa7b4 | 1426 | for (i = 0; i < seqn->len (); i++) |
7f446223 | 1427 | { |
d3ffa7b4 | 1428 | rtx_insn *inner_insn = seqn->insn (i); |
7f446223 | 1429 | int inner_uid = INSN_UID (inner_insn); |
1430 | int inner_length; | |
1431 | ||
47fc0706 | 1432 | INSN_ADDRESSES (inner_uid) = insn_current_address; |
7f446223 | 1433 | |
1434 | /* insn_current_length returns 0 for insns with a | |
1435 | non-varying length. */ | |
1436 | if (! varying_length[inner_uid]) | |
1437 | inner_length = insn_lengths[inner_uid]; | |
1438 | else | |
1439 | inner_length = insn_current_length (inner_insn); | |
1440 | ||
1441 | if (inner_length != insn_lengths[inner_uid]) | |
1442 | { | |
f860c994 | 1443 | if (!increasing || inner_length > insn_lengths[inner_uid]) |
1444 | { | |
1445 | insn_lengths[inner_uid] = inner_length; | |
1446 | something_changed = 1; | |
1447 | } | |
1448 | else | |
1449 | inner_length = insn_lengths[inner_uid]; | |
7f446223 | 1450 | } |
f860c994 | 1451 | insn_current_address += inner_length; |
7f446223 | 1452 | new_length += inner_length; |
1453 | } | |
1454 | } | |
1455 | else | |
1456 | { | |
1457 | new_length = insn_current_length (insn); | |
1458 | insn_current_address += new_length; | |
1459 | } | |
1460 | ||
7f446223 | 1461 | #ifdef ADJUST_INSN_LENGTH |
1462 | /* If needed, do any adjustment. */ | |
1463 | tmp_length = new_length; | |
1464 | ADJUST_INSN_LENGTH (insn, new_length); | |
1465 | insn_current_address += (new_length - tmp_length); | |
7f446223 | 1466 | #endif |
1467 | ||
f860c994 | 1468 | if (new_length != insn_lengths[uid] |
1469 | && (!increasing || new_length > insn_lengths[uid])) | |
7f446223 | 1470 | { |
1471 | insn_lengths[uid] = new_length; | |
1472 | something_changed = 1; | |
1473 | } | |
f860c994 | 1474 | else |
1475 | insn_current_address += insn_lengths[uid] - new_length; | |
7f446223 | 1476 | } |
1280554a | 1477 | /* For a non-optimizing compile, do only a single pass. */ |
f860c994 | 1478 | if (!increasing) |
1280554a | 1479 | break; |
7f446223 | 1480 | } |
21d55c67 | 1481 | |
1482 | free (varying_length); | |
7f446223 | 1483 | } |
1484 | ||
7f446223 | 1485 | /* Given the body of an INSN known to be generated by an ASM statement, return |
1486 | the number of machine instructions likely to be generated for this insn. | |
1487 | This is used to compute its length. */ | |
1488 | ||
1489 | static int | |
8a82c3cf | 1490 | asm_insn_count (rtx body) |
7f446223 | 1491 | { |
c32319fc | 1492 | const char *templ; |
7f446223 | 1493 | |
6c8647ba | 1494 | if (GET_CODE (body) == ASM_INPUT) |
c32319fc | 1495 | templ = XSTR (body, 0); |
6c8647ba | 1496 | else |
c32319fc | 1497 | templ = decode_asm_operands (body, NULL, NULL, NULL, NULL, NULL); |
6c8647ba | 1498 | |
1ca8efe4 | 1499 | return asm_str_count (templ); |
1500 | } | |
1ca8efe4 | 1501 | |
1502 | /* Return the number of machine instructions likely to be generated for the | |
1503 | inline-asm template. */ | |
1504 | int | |
1505 | asm_str_count (const char *templ) | |
1506 | { | |
1507 | int count = 1; | |
48e1416a | 1508 | |
c32319fc | 1509 | if (!*templ) |
c3e89507 | 1510 | return 0; |
1511 | ||
c32319fc | 1512 | for (; *templ; templ++) |
1513 | if (IS_ASM_LOGICAL_LINE_SEPARATOR (*templ, templ) | |
1514 | || *templ == '\n') | |
7f446223 | 1515 | count++; |
1516 | ||
1517 | return count; | |
1518 | } | |
7f446223 | 1519 | \f |
5f1f2de5 | 1520 | /* ??? This is probably the wrong place for these. */ |
1521 | /* Structure recording the mapping from source file and directory | |
1522 | names at compile time to those to be embedded in debug | |
1523 | information. */ | |
1524 | typedef struct debug_prefix_map | |
1525 | { | |
1526 | const char *old_prefix; | |
1527 | const char *new_prefix; | |
1528 | size_t old_len; | |
1529 | size_t new_len; | |
1530 | struct debug_prefix_map *next; | |
1531 | } debug_prefix_map; | |
1532 | ||
1533 | /* Linked list of such structures. */ | |
94a2945a | 1534 | static debug_prefix_map *debug_prefix_maps; |
5f1f2de5 | 1535 | |
1536 | ||
1537 | /* Record a debug file prefix mapping. ARG is the argument to | |
1538 | -fdebug-prefix-map and must be of the form OLD=NEW. */ | |
1539 | ||
1540 | void | |
1541 | add_debug_prefix_map (const char *arg) | |
1542 | { | |
1543 | debug_prefix_map *map; | |
1544 | const char *p; | |
1545 | ||
1546 | p = strchr (arg, '='); | |
1547 | if (!p) | |
1548 | { | |
1549 | error ("invalid argument %qs to -fdebug-prefix-map", arg); | |
1550 | return; | |
1551 | } | |
1552 | map = XNEW (debug_prefix_map); | |
c937fbea | 1553 | map->old_prefix = xstrndup (arg, p - arg); |
5f1f2de5 | 1554 | map->old_len = p - arg; |
1555 | p++; | |
c937fbea | 1556 | map->new_prefix = xstrdup (p); |
5f1f2de5 | 1557 | map->new_len = strlen (p); |
1558 | map->next = debug_prefix_maps; | |
1559 | debug_prefix_maps = map; | |
1560 | } | |
1561 | ||
1562 | /* Perform user-specified mapping of debug filename prefixes. Return | |
1563 | the new name corresponding to FILENAME. */ | |
1564 | ||
1565 | const char * | |
1566 | remap_debug_filename (const char *filename) | |
1567 | { | |
1568 | debug_prefix_map *map; | |
1569 | char *s; | |
1570 | const char *name; | |
1571 | size_t name_len; | |
1572 | ||
1573 | for (map = debug_prefix_maps; map; map = map->next) | |
875ffd1d | 1574 | if (filename_ncmp (filename, map->old_prefix, map->old_len) == 0) |
5f1f2de5 | 1575 | break; |
1576 | if (!map) | |
1577 | return filename; | |
1578 | name = filename + map->old_len; | |
1579 | name_len = strlen (name) + 1; | |
1580 | s = (char *) alloca (name_len + map->new_len); | |
1581 | memcpy (s, map->new_prefix, map->new_len); | |
1582 | memcpy (s + map->new_len, name, name_len); | |
1583 | return ggc_strdup (s); | |
1584 | } | |
1585 | \f | |
888bd5c2 | 1586 | /* Return true if DWARF2 debug info can be emitted for DECL. */ |
1587 | ||
1588 | static bool | |
1589 | dwarf2_debug_info_emitted_p (tree decl) | |
1590 | { | |
1591 | if (write_symbols != DWARF2_DEBUG && write_symbols != VMS_AND_DWARF2_DEBUG) | |
1592 | return false; | |
1593 | ||
1594 | if (DECL_IGNORED_P (decl)) | |
1595 | return false; | |
1596 | ||
1597 | return true; | |
1598 | } | |
1599 | ||
23a070f3 | 1600 | /* Return scope resulting from combination of S1 and S2. */ |
1601 | static tree | |
1602 | choose_inner_scope (tree s1, tree s2) | |
1603 | { | |
1604 | if (!s1) | |
1605 | return s2; | |
1606 | if (!s2) | |
1607 | return s1; | |
1608 | if (BLOCK_NUMBER (s1) > BLOCK_NUMBER (s2)) | |
1609 | return s1; | |
1610 | return s2; | |
1611 | } | |
1612 | ||
1613 | /* Emit lexical block notes needed to change scope from S1 to S2. */ | |
1614 | ||
1615 | static void | |
82f53c1f | 1616 | change_scope (rtx_insn *orig_insn, tree s1, tree s2) |
23a070f3 | 1617 | { |
82f53c1f | 1618 | rtx_insn *insn = orig_insn; |
23a070f3 | 1619 | tree com = NULL_TREE; |
1620 | tree ts1 = s1, ts2 = s2; | |
1621 | tree s; | |
1622 | ||
1623 | while (ts1 != ts2) | |
1624 | { | |
1625 | gcc_assert (ts1 && ts2); | |
1626 | if (BLOCK_NUMBER (ts1) > BLOCK_NUMBER (ts2)) | |
1627 | ts1 = BLOCK_SUPERCONTEXT (ts1); | |
1628 | else if (BLOCK_NUMBER (ts1) < BLOCK_NUMBER (ts2)) | |
1629 | ts2 = BLOCK_SUPERCONTEXT (ts2); | |
1630 | else | |
1631 | { | |
1632 | ts1 = BLOCK_SUPERCONTEXT (ts1); | |
1633 | ts2 = BLOCK_SUPERCONTEXT (ts2); | |
1634 | } | |
1635 | } | |
1636 | com = ts1; | |
1637 | ||
1638 | /* Close scopes. */ | |
1639 | s = s1; | |
1640 | while (s != com) | |
1641 | { | |
cef3d8ad | 1642 | rtx_note *note = emit_note_before (NOTE_INSN_BLOCK_END, insn); |
23a070f3 | 1643 | NOTE_BLOCK (note) = s; |
1644 | s = BLOCK_SUPERCONTEXT (s); | |
1645 | } | |
1646 | ||
1647 | /* Open scopes. */ | |
1648 | s = s2; | |
1649 | while (s != com) | |
1650 | { | |
1651 | insn = emit_note_before (NOTE_INSN_BLOCK_BEG, insn); | |
1652 | NOTE_BLOCK (insn) = s; | |
1653 | s = BLOCK_SUPERCONTEXT (s); | |
1654 | } | |
1655 | } | |
1656 | ||
1657 | /* Rebuild all the NOTE_INSN_BLOCK_BEG and NOTE_INSN_BLOCK_END notes based | |
1658 | on the scope tree and the newly reordered instructions. */ | |
1659 | ||
1660 | static void | |
1661 | reemit_insn_block_notes (void) | |
1662 | { | |
1663 | tree cur_block = DECL_INITIAL (cfun->decl); | |
cef3d8ad | 1664 | rtx_insn *insn; |
1665 | rtx_note *note; | |
23a070f3 | 1666 | |
1667 | insn = get_insns (); | |
04ad818c | 1668 | for (; insn; insn = NEXT_INSN (insn)) |
23a070f3 | 1669 | { |
1670 | tree this_block; | |
1671 | ||
4874cc89 | 1672 | /* Prevent lexical blocks from straddling section boundaries. */ |
1673 | if (NOTE_P (insn) && NOTE_KIND (insn) == NOTE_INSN_SWITCH_TEXT_SECTIONS) | |
1674 | { | |
1675 | for (tree s = cur_block; s != DECL_INITIAL (cfun->decl); | |
1676 | s = BLOCK_SUPERCONTEXT (s)) | |
1677 | { | |
cef3d8ad | 1678 | rtx_note *note = emit_note_before (NOTE_INSN_BLOCK_END, insn); |
4874cc89 | 1679 | NOTE_BLOCK (note) = s; |
1680 | note = emit_note_after (NOTE_INSN_BLOCK_BEG, insn); | |
1681 | NOTE_BLOCK (note) = s; | |
1682 | } | |
1683 | } | |
1684 | ||
1685 | if (!active_insn_p (insn)) | |
1686 | continue; | |
1687 | ||
23a070f3 | 1688 | /* Avoid putting scope notes between jump table and its label. */ |
1689 | if (JUMP_TABLE_DATA_P (insn)) | |
1690 | continue; | |
1691 | ||
1692 | this_block = insn_scope (insn); | |
1693 | /* For sequences compute scope resulting from merging all scopes | |
1694 | of instructions nested inside. */ | |
3a0b41f5 | 1695 | if (rtx_sequence *body = dyn_cast <rtx_sequence *> (PATTERN (insn))) |
23a070f3 | 1696 | { |
1697 | int i; | |
23a070f3 | 1698 | |
1699 | this_block = NULL; | |
3a0b41f5 | 1700 | for (i = 0; i < body->len (); i++) |
23a070f3 | 1701 | this_block = choose_inner_scope (this_block, |
3a0b41f5 | 1702 | insn_scope (body->insn (i))); |
23a070f3 | 1703 | } |
1704 | if (! this_block) | |
6d74a254 | 1705 | { |
1706 | if (INSN_LOCATION (insn) == UNKNOWN_LOCATION) | |
1707 | continue; | |
1708 | else | |
1709 | this_block = DECL_INITIAL (cfun->decl); | |
1710 | } | |
23a070f3 | 1711 | |
1712 | if (this_block != cur_block) | |
1713 | { | |
1714 | change_scope (insn, cur_block, this_block); | |
1715 | cur_block = this_block; | |
1716 | } | |
1717 | } | |
1718 | ||
1719 | /* change_scope emits before the insn, not after. */ | |
1720 | note = emit_note (NOTE_INSN_DELETED); | |
1721 | change_scope (note, cur_block, DECL_INITIAL (cfun->decl)); | |
1722 | delete_insn (note); | |
1723 | ||
1724 | reorder_blocks (); | |
1725 | } | |
1726 | ||
3677652f | 1727 | static const char *some_local_dynamic_name; |
1728 | ||
1729 | /* Locate some local-dynamic symbol still in use by this function | |
1730 | so that we can print its name in local-dynamic base patterns. | |
1731 | Return null if there are no local-dynamic references. */ | |
1732 | ||
1733 | const char * | |
1734 | get_some_local_dynamic_name () | |
1735 | { | |
1736 | subrtx_iterator::array_type array; | |
1737 | rtx_insn *insn; | |
1738 | ||
1739 | if (some_local_dynamic_name) | |
1740 | return some_local_dynamic_name; | |
1741 | ||
1742 | for (insn = get_insns (); insn ; insn = NEXT_INSN (insn)) | |
1743 | if (NONDEBUG_INSN_P (insn)) | |
1744 | FOR_EACH_SUBRTX (iter, array, PATTERN (insn), ALL) | |
1745 | { | |
1746 | const_rtx x = *iter; | |
1747 | if (GET_CODE (x) == SYMBOL_REF) | |
1748 | { | |
1749 | if (SYMBOL_REF_TLS_MODEL (x) == TLS_MODEL_LOCAL_DYNAMIC) | |
1750 | return some_local_dynamic_name = XSTR (x, 0); | |
1751 | if (CONSTANT_POOL_ADDRESS_P (x)) | |
1752 | iter.substitute (get_pool_constant (x)); | |
1753 | } | |
1754 | } | |
1755 | ||
1756 | return 0; | |
1757 | } | |
1758 | ||
7f446223 | 1759 | /* Output assembler code for the start of a function, |
1760 | and initialize some of the variables in this file | |
1761 | for the new function. The label for the function and associated | |
1762 | assembler pseudo-ops have already been output in `assemble_start_function'. | |
1763 | ||
1764 | FIRST is the first insn of the rtl for the function being compiled. | |
1765 | FILE is the file to write assembler code to. | |
2c5d2e39 | 1766 | OPTIMIZE_P is nonzero if we should eliminate redundant |
7f446223 | 1767 | test and compare insns. */ |
1768 | ||
1769 | void | |
2007d20f | 1770 | final_start_function (rtx_insn *first, FILE *file, |
2c5d2e39 | 1771 | int optimize_p ATTRIBUTE_UNUSED) |
7f446223 | 1772 | { |
1773 | block_depth = 0; | |
1774 | ||
1775 | this_is_asm_operands = 0; | |
1776 | ||
2436e54f | 1777 | need_profile_function = false; |
1778 | ||
5169661d | 1779 | last_filename = LOCATION_FILE (prologue_location); |
1780 | last_linenum = LOCATION_LINE (prologue_location); | |
d01c707b | 1781 | last_discriminator = discriminator = 0; |
c6a8cd53 | 1782 | |
f76df888 | 1783 | high_block_linenum = high_function_linenum = last_linenum; |
5ebf1393 | 1784 | |
1e80ce41 | 1785 | if (flag_sanitize & SANITIZE_ADDRESS) |
1786 | asan_function_start (); | |
1787 | ||
888bd5c2 | 1788 | if (!DECL_IGNORED_P (current_function_decl)) |
1789 | debug_hooks->begin_prologue (last_linenum, last_filename); | |
dc7a29ce | 1790 | |
888bd5c2 | 1791 | if (!dwarf2_debug_info_emitted_p (current_function_decl)) |
f76df888 | 1792 | dwarf2out_begin_prologue (0, NULL); |
7f446223 | 1793 | |
1794 | #ifdef LEAF_REG_REMAP | |
d5bf7b64 | 1795 | if (crtl->uses_only_leaf_regs) |
7f446223 | 1796 | leaf_renumber_regs (first); |
1797 | #endif | |
1798 | ||
1799 | /* The Sun386i and perhaps other machines don't work right | |
1800 | if the profiling code comes after the prologue. */ | |
8637d6a2 | 1801 | if (targetm.profile_before_prologue () && crtl->profile) |
2436e54f | 1802 | { |
1803 | if (targetm.asm_out.function_prologue | |
1804 | == default_function_pro_epilogue | |
1805 | #ifdef HAVE_prologue | |
1806 | && HAVE_prologue | |
1807 | #endif | |
1808 | ) | |
1809 | { | |
82f53c1f | 1810 | rtx_insn *insn; |
2436e54f | 1811 | for (insn = first; insn; insn = NEXT_INSN (insn)) |
1812 | if (!NOTE_P (insn)) | |
1813 | { | |
82f53c1f | 1814 | insn = NULL; |
2436e54f | 1815 | break; |
1816 | } | |
1817 | else if (NOTE_KIND (insn) == NOTE_INSN_BASIC_BLOCK | |
1818 | || NOTE_KIND (insn) == NOTE_INSN_FUNCTION_BEG) | |
1819 | break; | |
1820 | else if (NOTE_KIND (insn) == NOTE_INSN_DELETED | |
1821 | || NOTE_KIND (insn) == NOTE_INSN_VAR_LOCATION) | |
1822 | continue; | |
1823 | else | |
1824 | { | |
82f53c1f | 1825 | insn = NULL; |
2436e54f | 1826 | break; |
1827 | } | |
1828 | ||
1829 | if (insn) | |
1830 | need_profile_function = true; | |
1831 | else | |
1832 | profile_function (file); | |
1833 | } | |
1834 | else | |
1835 | profile_function (file); | |
1836 | } | |
7f446223 | 1837 | |
5846cb0f | 1838 | /* If debugging, assign block numbers to all of the blocks in this |
1839 | function. */ | |
1840 | if (write_symbols) | |
1841 | { | |
13751393 | 1842 | reemit_insn_block_notes (); |
a36145ca | 1843 | number_blocks (current_function_decl); |
5846cb0f | 1844 | /* We never actually put out begin/end notes for the top-level |
1845 | block in the function. But, conceptually, that block is | |
1846 | always needed. */ | |
1847 | TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl)) = 1; | |
1848 | } | |
1849 | ||
6fdade09 | 1850 | if (warn_frame_larger_than |
1851 | && get_frame_size () > frame_larger_than_size) | |
1852 | { | |
1853 | /* Issue a warning */ | |
1854 | warning (OPT_Wframe_larger_than_, | |
1855 | "the frame size of %wd bytes is larger than %wd bytes", | |
1856 | get_frame_size (), frame_larger_than_size); | |
1857 | } | |
1858 | ||
7f446223 | 1859 | /* First output the function prologue: code to set up the stack frame. */ |
883b2e73 | 1860 | targetm.asm_out.function_prologue (file, get_frame_size ()); |
7f446223 | 1861 | |
7f446223 | 1862 | /* If the machine represents the prologue as RTL, the profiling code must |
1863 | be emitted when NOTE_INSN_PROLOGUE_END is scanned. */ | |
1864 | #ifdef HAVE_prologue | |
1865 | if (! HAVE_prologue) | |
1866 | #endif | |
1867 | profile_after_prologue (file); | |
7f446223 | 1868 | } |
1869 | ||
1870 | static void | |
8a82c3cf | 1871 | profile_after_prologue (FILE *file ATTRIBUTE_UNUSED) |
7f446223 | 1872 | { |
8637d6a2 | 1873 | if (!targetm.profile_before_prologue () && crtl->profile) |
7f446223 | 1874 | profile_function (file); |
7f446223 | 1875 | } |
1876 | ||
1877 | static void | |
8a82c3cf | 1878 | profile_function (FILE *file ATTRIBUTE_UNUSED) |
7f446223 | 1879 | { |
bad4935b | 1880 | #ifndef NO_PROFILE_COUNTERS |
527d5be8 | 1881 | # define NO_PROFILE_COUNTERS 0 |
bad4935b | 1882 | #endif |
82c7907c | 1883 | #ifdef ASM_OUTPUT_REG_PUSH |
1884 | rtx sval = NULL, chain = NULL; | |
1885 | ||
1886 | if (cfun->returns_struct) | |
1887 | sval = targetm.calls.struct_value_rtx (TREE_TYPE (current_function_decl), | |
1888 | true); | |
1889 | if (cfun->static_chain_decl) | |
1890 | chain = targetm.calls.static_chain (current_function_decl, true); | |
6536bc06 | 1891 | #endif /* ASM_OUTPUT_REG_PUSH */ |
7f446223 | 1892 | |
527d5be8 | 1893 | if (! NO_PROFILE_COUNTERS) |
1894 | { | |
1895 | int align = MIN (BIGGEST_ALIGNMENT, LONG_TYPE_SIZE); | |
2f14b1f9 | 1896 | switch_to_section (data_section); |
527d5be8 | 1897 | ASM_OUTPUT_ALIGN (file, floor_log2 (align / BITS_PER_UNIT)); |
883b2e73 | 1898 | targetm.asm_out.internal_label (file, "LP", current_function_funcdef_no); |
527d5be8 | 1899 | assemble_integer (const0_rtx, LONG_TYPE_SIZE / BITS_PER_UNIT, align, 1); |
1900 | } | |
7f446223 | 1901 | |
2f14b1f9 | 1902 | switch_to_section (current_function_section ()); |
7f446223 | 1903 | |
82c7907c | 1904 | #ifdef ASM_OUTPUT_REG_PUSH |
1905 | if (sval && REG_P (sval)) | |
1906 | ASM_OUTPUT_REG_PUSH (file, REGNO (sval)); | |
1907 | if (chain && REG_P (chain)) | |
1908 | ASM_OUTPUT_REG_PUSH (file, REGNO (chain)); | |
7f446223 | 1909 | #endif |
7f446223 | 1910 | |
4781f9b9 | 1911 | FUNCTION_PROFILER (file, current_function_funcdef_no); |
7f446223 | 1912 | |
82c7907c | 1913 | #ifdef ASM_OUTPUT_REG_PUSH |
1914 | if (chain && REG_P (chain)) | |
1915 | ASM_OUTPUT_REG_POP (file, REGNO (chain)); | |
1916 | if (sval && REG_P (sval)) | |
1917 | ASM_OUTPUT_REG_POP (file, REGNO (sval)); | |
7f446223 | 1918 | #endif |
1919 | } | |
1920 | ||
1921 | /* Output assembler code for the end of a function. | |
1922 | For clarity, args are same as those of `final_start_function' | |
1923 | even though not all of them are needed. */ | |
1924 | ||
1925 | void | |
8a82c3cf | 1926 | final_end_function (void) |
7f446223 | 1927 | { |
74b0991d | 1928 | app_disable (); |
7f446223 | 1929 | |
888bd5c2 | 1930 | if (!DECL_IGNORED_P (current_function_decl)) |
1931 | debug_hooks->end_function (high_function_linenum); | |
7f446223 | 1932 | |
7f446223 | 1933 | /* Finally, output the function epilogue: |
1934 | code to restore the stack frame and return to the caller. */ | |
883b2e73 | 1935 | targetm.asm_out.function_epilogue (asm_out_file, get_frame_size ()); |
7f446223 | 1936 | |
b9b7f8b4 | 1937 | /* And debug output. */ |
888bd5c2 | 1938 | if (!DECL_IGNORED_P (current_function_decl)) |
1939 | debug_hooks->end_epilogue (last_linenum, last_filename); | |
7f446223 | 1940 | |
888bd5c2 | 1941 | if (!dwarf2_debug_info_emitted_p (current_function_decl) |
8d60d2bc | 1942 | && dwarf2out_do_frame ()) |
e74e8242 | 1943 | dwarf2out_end_epilogue (last_linenum, last_filename); |
3677652f | 1944 | |
1945 | some_local_dynamic_name = 0; | |
7f446223 | 1946 | } |
1947 | \f | |
33e4567d | 1948 | |
1949 | /* Dumper helper for basic block information. FILE is the assembly | |
1950 | output file, and INSN is the instruction being emitted. */ | |
1951 | ||
1952 | static void | |
82f53c1f | 1953 | dump_basic_block_info (FILE *file, rtx_insn *insn, basic_block *start_to_bb, |
33e4567d | 1954 | basic_block *end_to_bb, int bb_map_size, int *bb_seqn) |
1955 | { | |
1956 | basic_block bb; | |
1957 | ||
1958 | if (!flag_debug_asm) | |
1959 | return; | |
1960 | ||
1961 | if (INSN_UID (insn) < bb_map_size | |
1962 | && (bb = start_to_bb[INSN_UID (insn)]) != NULL) | |
1963 | { | |
1964 | edge e; | |
1965 | edge_iterator ei; | |
1966 | ||
e51c3f95 | 1967 | fprintf (file, "%s BLOCK %d", ASM_COMMENT_START, bb->index); |
33e4567d | 1968 | if (bb->frequency) |
1969 | fprintf (file, " freq:%d", bb->frequency); | |
1970 | if (bb->count) | |
3a4303e7 | 1971 | fprintf (file, " count:%"PRId64, |
33e4567d | 1972 | bb->count); |
1973 | fprintf (file, " seq:%d", (*bb_seqn)++); | |
e51c3f95 | 1974 | fprintf (file, "\n%s PRED:", ASM_COMMENT_START); |
33e4567d | 1975 | FOR_EACH_EDGE (e, ei, bb->preds) |
1976 | { | |
5147ec07 | 1977 | dump_edge_info (file, e, TDF_DETAILS, 0); |
33e4567d | 1978 | } |
1979 | fprintf (file, "\n"); | |
1980 | } | |
1981 | if (INSN_UID (insn) < bb_map_size | |
1982 | && (bb = end_to_bb[INSN_UID (insn)]) != NULL) | |
1983 | { | |
1984 | edge e; | |
1985 | edge_iterator ei; | |
1986 | ||
e51c3f95 | 1987 | fprintf (asm_out_file, "%s SUCC:", ASM_COMMENT_START); |
33e4567d | 1988 | FOR_EACH_EDGE (e, ei, bb->succs) |
1989 | { | |
5147ec07 | 1990 | dump_edge_info (asm_out_file, e, TDF_DETAILS, 1); |
33e4567d | 1991 | } |
1992 | fprintf (file, "\n"); | |
1993 | } | |
1994 | } | |
1995 | ||
7f446223 | 1996 | /* Output assembler code for some insns: all or part of a function. |
4bf029b0 | 1997 | For description of args, see `final_start_function', above. */ |
7f446223 | 1998 | |
1999 | void | |
4f124fa9 | 2000 | final (rtx_insn *first, FILE *file, int optimize_p) |
7f446223 | 2001 | { |
82f53c1f | 2002 | rtx_insn *insn, *next; |
e69efecb | 2003 | int seen = 0; |
7f446223 | 2004 | |
33e4567d | 2005 | /* Used for -dA dump. */ |
2006 | basic_block *start_to_bb = NULL; | |
2007 | basic_block *end_to_bb = NULL; | |
2008 | int bb_map_size = 0; | |
2009 | int bb_seqn = 0; | |
2010 | ||
7f446223 | 2011 | last_ignored_compare = 0; |
7f446223 | 2012 | |
bc6d217b | 2013 | #ifdef HAVE_cc0 |
7f446223 | 2014 | for (insn = first; insn; insn = NEXT_INSN (insn)) |
5ecc296b | 2015 | { |
1030e8a8 | 2016 | /* If CC tracking across branches is enabled, record the insn which |
2017 | jumps to each branch only reached from one place. */ | |
2c5d2e39 | 2018 | if (optimize_p && JUMP_P (insn)) |
1030e8a8 | 2019 | { |
2020 | rtx lab = JUMP_LABEL (insn); | |
198b8289 | 2021 | if (lab && LABEL_P (lab) && LABEL_NUSES (lab) == 1) |
1030e8a8 | 2022 | { |
2023 | LABEL_REFS (lab) = insn; | |
2024 | } | |
2025 | } | |
5ecc296b | 2026 | } |
bc6d217b | 2027 | #endif |
5ecc296b | 2028 | |
7f446223 | 2029 | init_recog (); |
2030 | ||
2031 | CC_STATUS_INIT; | |
2032 | ||
33e4567d | 2033 | if (flag_debug_asm) |
2034 | { | |
2035 | basic_block bb; | |
2036 | ||
2037 | bb_map_size = get_max_uid () + 1; | |
2038 | start_to_bb = XCNEWVEC (basic_block, bb_map_size); | |
2039 | end_to_bb = XCNEWVEC (basic_block, bb_map_size); | |
2040 | ||
35e514ff | 2041 | /* There is no cfg for a thunk. */ |
2042 | if (!cfun->is_thunk) | |
7a46197b | 2043 | FOR_EACH_BB_REVERSE_FN (bb, cfun) |
35e514ff | 2044 | { |
2045 | start_to_bb[INSN_UID (BB_HEAD (bb))] = bb; | |
2046 | end_to_bb[INSN_UID (BB_END (bb))] = bb; | |
2047 | } | |
33e4567d | 2048 | } |
2049 | ||
7f446223 | 2050 | /* Output the insns. */ |
b55d87cc | 2051 | for (insn = first; insn;) |
65c166b7 | 2052 | { |
f2d92d7a | 2053 | if (HAVE_ATTR_length) |
f6a90948 | 2054 | { |
f2d92d7a | 2055 | if ((unsigned) INSN_UID (insn) >= INSN_ADDRESSES_SIZE ()) |
2056 | { | |
2057 | /* This can be triggered by bugs elsewhere in the compiler if | |
2058 | new insns are created after init_insn_lengths is called. */ | |
2059 | gcc_assert (NOTE_P (insn)); | |
2060 | insn_current_address = -1; | |
2061 | } | |
2062 | else | |
2063 | insn_current_address = INSN_ADDRESSES (INSN_UID (insn)); | |
f6a90948 | 2064 | } |
f6a90948 | 2065 | |
33e4567d | 2066 | dump_basic_block_info (file, insn, start_to_bb, end_to_bb, |
2067 | bb_map_size, &bb_seqn); | |
2c5d2e39 | 2068 | insn = final_scan_insn (insn, file, optimize_p, 0, &seen); |
65c166b7 | 2069 | } |
33e4567d | 2070 | |
2071 | if (flag_debug_asm) | |
2072 | { | |
2073 | free (start_to_bb); | |
2074 | free (end_to_bb); | |
2075 | } | |
46346a52 | 2076 | |
2077 | /* Remove CFI notes, to avoid compare-debug failures. */ | |
2078 | for (insn = first; insn; insn = next) | |
2079 | { | |
2080 | next = NEXT_INSN (insn); | |
2081 | if (NOTE_P (insn) | |
2082 | && (NOTE_KIND (insn) == NOTE_INSN_CFI | |
2083 | || NOTE_KIND (insn) == NOTE_INSN_CFI_LABEL)) | |
2084 | delete_insn (insn); | |
2085 | } | |
7f446223 | 2086 | } |
2087 | \f | |
ae9660c8 | 2088 | const char * |
8a82c3cf | 2089 | get_insn_template (int code, rtx insn) |
ae9660c8 | 2090 | { |
ae9660c8 | 2091 | switch (insn_data[code].output_format) |
2092 | { | |
2093 | case INSN_OUTPUT_FORMAT_SINGLE: | |
48b3d385 | 2094 | return insn_data[code].output.single; |
ae9660c8 | 2095 | case INSN_OUTPUT_FORMAT_MULTI: |
48b3d385 | 2096 | return insn_data[code].output.multi[which_alternative]; |
ae9660c8 | 2097 | case INSN_OUTPUT_FORMAT_FUNCTION: |
fdada98f | 2098 | gcc_assert (insn); |
bf59a32d | 2099 | return (*insn_data[code].output.function) (recog_data.operand, |
2100 | as_a <rtx_insn *> (insn)); | |
ae9660c8 | 2101 | |
2102 | default: | |
fdada98f | 2103 | gcc_unreachable (); |
ae9660c8 | 2104 | } |
2105 | } | |
2ee6d904 | 2106 | |
a7ae1e59 | 2107 | /* Emit the appropriate declaration for an alternate-entry-point |
2108 | symbol represented by INSN, to FILE. INSN is a CODE_LABEL with | |
2109 | LABEL_KIND != LABEL_NORMAL. | |
2110 | ||
2111 | The case fall-through in this function is intentional. */ | |
2112 | static void | |
82f53c1f | 2113 | output_alternate_entry_point (FILE *file, rtx_insn *insn) |
a7ae1e59 | 2114 | { |
2115 | const char *name = LABEL_NAME (insn); | |
2116 | ||
2117 | switch (LABEL_KIND (insn)) | |
2118 | { | |
2119 | case LABEL_WEAK_ENTRY: | |
2120 | #ifdef ASM_WEAKEN_LABEL | |
2121 | ASM_WEAKEN_LABEL (file, name); | |
2122 | #endif | |
2123 | case LABEL_GLOBAL_ENTRY: | |
883b2e73 | 2124 | targetm.asm_out.globalize_label (file, name); |
a7ae1e59 | 2125 | case LABEL_STATIC_ENTRY: |
33ec64c4 | 2126 | #ifdef ASM_OUTPUT_TYPE_DIRECTIVE |
2127 | ASM_OUTPUT_TYPE_DIRECTIVE (file, name, "function"); | |
2128 | #endif | |
a7ae1e59 | 2129 | ASM_OUTPUT_LABEL (file, name); |
2130 | break; | |
2131 | ||
2132 | case LABEL_NORMAL: | |
2133 | default: | |
fdada98f | 2134 | gcc_unreachable (); |
a7ae1e59 | 2135 | } |
2136 | } | |
2137 | ||
9cb02f75 | 2138 | /* Given a CALL_INSN, find and return the nested CALL. */ |
2139 | static rtx | |
82f53c1f | 2140 | call_from_call_insn (rtx_call_insn *insn) |
9cb02f75 | 2141 | { |
2142 | rtx x; | |
2143 | gcc_assert (CALL_P (insn)); | |
2144 | x = PATTERN (insn); | |
2145 | ||
2146 | while (GET_CODE (x) != CALL) | |
2147 | { | |
2148 | switch (GET_CODE (x)) | |
2149 | { | |
2150 | default: | |
2151 | gcc_unreachable (); | |
efc49b99 | 2152 | case COND_EXEC: |
2153 | x = COND_EXEC_CODE (x); | |
2154 | break; | |
9cb02f75 | 2155 | case PARALLEL: |
2156 | x = XVECEXP (x, 0, 0); | |
2157 | break; | |
2158 | case SET: | |
2159 | x = XEXP (x, 1); | |
2160 | break; | |
2161 | } | |
2162 | } | |
2163 | return x; | |
2164 | } | |
2165 | ||
7f446223 | 2166 | /* The final scan for one insn, INSN. |
2167 | Args are same as in `final', except that INSN | |
2168 | is the insn being scanned. | |
2169 | Value returned is the next insn to be scanned. | |
2170 | ||
3edd9032 | 2171 | NOPEEPHOLES is the flag to disallow peephole processing (currently |
2172 | used for within delayed branch sequence output). | |
7f446223 | 2173 | |
e69efecb | 2174 | SEEN is used to track the end of the prologue, for emitting |
2175 | debug information. We force the emission of a line note after | |
46ab8d2c | 2176 | both NOTE_INSN_PROLOGUE_END and NOTE_INSN_FUNCTION_BEG. */ |
e69efecb | 2177 | |
82f53c1f | 2178 | rtx_insn * |
cdf962b7 | 2179 | final_scan_insn (rtx_insn *insn, FILE *file, int optimize_p ATTRIBUTE_UNUSED, |
4bf029b0 | 2180 | int nopeepholes ATTRIBUTE_UNUSED, int *seen) |
7f446223 | 2181 | { |
c9bf9e88 | 2182 | #ifdef HAVE_cc0 |
2183 | rtx set; | |
2184 | #endif | |
82f53c1f | 2185 | rtx_insn *next; |
2186 | ||
7f446223 | 2187 | insn_counter++; |
2188 | ||
2189 | /* Ignore deleted insns. These can occur when we split insns (due to a | |
2190 | template of "#") while not optimizing. */ | |
dd1286fb | 2191 | if (insn->deleted ()) |
7f446223 | 2192 | return NEXT_INSN (insn); |
2193 | ||
2194 | switch (GET_CODE (insn)) | |
2195 | { | |
2196 | case NOTE: | |
ad4583d9 | 2197 | switch (NOTE_KIND (insn)) |
74b0991d | 2198 | { |
2199 | case NOTE_INSN_DELETED: | |
74b0991d | 2200 | break; |
7f446223 | 2201 | |
1897b881 | 2202 | case NOTE_INSN_SWITCH_TEXT_SECTIONS: |
5fbee89d | 2203 | in_cold_section_p = !in_cold_section_p; |
cc7d6aed | 2204 | |
9bf03e06 | 2205 | if (dwarf2out_do_frame ()) |
2206 | dwarf2out_switch_text_section (); | |
cc7d6aed | 2207 | else if (!DECL_IGNORED_P (current_function_decl)) |
888bd5c2 | 2208 | debug_hooks->switch_text_section (); |
9bf03e06 | 2209 | |
5fbee89d | 2210 | switch_to_section (current_function_section ()); |
3b3edcd4 | 2211 | targetm.asm_out.function_switched_text_sections (asm_out_file, |
2212 | current_function_decl, | |
2213 | in_cold_section_p); | |
ec614604 | 2214 | /* Emit a label for the split cold section. Form label name by |
2215 | suffixing "cold" to the original function's name. */ | |
2216 | if (in_cold_section_p) | |
2217 | { | |
2218 | tree cold_function_name | |
2219 | = clone_function_name (current_function_decl, "cold"); | |
2220 | ASM_OUTPUT_LABEL (asm_out_file, | |
2221 | IDENTIFIER_POINTER (cold_function_name)); | |
2222 | } | |
4f18499c | 2223 | break; |
312f4798 | 2224 | |
74b0991d | 2225 | case NOTE_INSN_BASIC_BLOCK: |
2436e54f | 2226 | if (need_profile_function) |
2227 | { | |
2228 | profile_function (asm_out_file); | |
2229 | need_profile_function = false; | |
2230 | } | |
2231 | ||
53b72e99 | 2232 | if (targetm.asm_out.unwind_emit) |
2233 | targetm.asm_out.unwind_emit (asm_out_file, insn); | |
8ec87476 | 2234 | |
d01c707b | 2235 | discriminator = NOTE_BASIC_BLOCK (insn)->discriminator; |
2236 | ||
74b0991d | 2237 | break; |
7f446223 | 2238 | |
74b0991d | 2239 | case NOTE_INSN_EH_REGION_BEG: |
df4b504c | 2240 | ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHB", |
2241 | NOTE_EH_HANDLER (insn)); | |
037a5228 | 2242 | break; |
037a5228 | 2243 | |
74b0991d | 2244 | case NOTE_INSN_EH_REGION_END: |
df4b504c | 2245 | ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHE", |
2246 | NOTE_EH_HANDLER (insn)); | |
037a5228 | 2247 | break; |
037a5228 | 2248 | |
74b0991d | 2249 | case NOTE_INSN_PROLOGUE_END: |
883b2e73 | 2250 | targetm.asm_out.function_end_prologue (file); |
7f446223 | 2251 | profile_after_prologue (file); |
e69efecb | 2252 | |
2253 | if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE) | |
2254 | { | |
2255 | *seen |= SEEN_EMITTED; | |
e47ccf94 | 2256 | force_source_line = true; |
e69efecb | 2257 | } |
2258 | else | |
2259 | *seen |= SEEN_NOTE; | |
2260 | ||
7f446223 | 2261 | break; |
7f446223 | 2262 | |
74b0991d | 2263 | case NOTE_INSN_EPILOGUE_BEG: |
6036b90d | 2264 | if (!DECL_IGNORED_P (current_function_decl)) |
2265 | (*debug_hooks->begin_epilogue) (last_linenum, last_filename); | |
883b2e73 | 2266 | targetm.asm_out.function_begin_epilogue (file); |
74b0991d | 2267 | break; |
7f446223 | 2268 | |
46346a52 | 2269 | case NOTE_INSN_CFI: |
2270 | dwarf2out_emit_cfi (NOTE_CFI (insn)); | |
2271 | break; | |
2272 | ||
2273 | case NOTE_INSN_CFI_LABEL: | |
2274 | ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LCFI", | |
2275 | NOTE_LABEL_NUMBER (insn)); | |
25e880b1 | 2276 | break; |
2277 | ||
74b0991d | 2278 | case NOTE_INSN_FUNCTION_BEG: |
2436e54f | 2279 | if (need_profile_function) |
2280 | { | |
2281 | profile_function (asm_out_file); | |
2282 | need_profile_function = false; | |
2283 | } | |
2284 | ||
f76df888 | 2285 | app_disable (); |
888bd5c2 | 2286 | if (!DECL_IGNORED_P (current_function_decl)) |
2287 | debug_hooks->end_prologue (last_linenum, last_filename); | |
e69efecb | 2288 | |
2289 | if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE) | |
2290 | { | |
2291 | *seen |= SEEN_EMITTED; | |
e47ccf94 | 2292 | force_source_line = true; |
e69efecb | 2293 | } |
2294 | else | |
2295 | *seen |= SEEN_NOTE; | |
2296 | ||
7f446223 | 2297 | break; |
74b0991d | 2298 | |
2299 | case NOTE_INSN_BLOCK_BEG: | |
2300 | if (debug_info_level == DINFO_LEVEL_NORMAL | |
7f446223 | 2301 | || debug_info_level == DINFO_LEVEL_VERBOSE |
8d60d2bc | 2302 | || write_symbols == DWARF2_DEBUG |
2303 | || write_symbols == VMS_AND_DWARF2_DEBUG | |
2304 | || write_symbols == VMS_DEBUG) | |
74b0991d | 2305 | { |
2306 | int n = BLOCK_NUMBER (NOTE_BLOCK (insn)); | |
7f446223 | 2307 | |
74b0991d | 2308 | app_disable (); |
2309 | ++block_depth; | |
2310 | high_block_linenum = last_linenum; | |
5ebf1393 | 2311 | |
1dff614c | 2312 | /* Output debugging info about the symbol-block beginning. */ |
888bd5c2 | 2313 | if (!DECL_IGNORED_P (current_function_decl)) |
2314 | debug_hooks->begin_block (last_linenum, n); | |
7f446223 | 2315 | |
74b0991d | 2316 | /* Mark this block as output. */ |
2317 | TREE_ASM_WRITTEN (NOTE_BLOCK (insn)) = 1; | |
2318 | } | |
1b16fc45 | 2319 | if (write_symbols == DBX_DEBUG |
2320 | || write_symbols == SDB_DEBUG) | |
2321 | { | |
2322 | location_t *locus_ptr | |
2323 | = block_nonartificial_location (NOTE_BLOCK (insn)); | |
2324 | ||
2325 | if (locus_ptr != NULL) | |
2326 | { | |
2327 | override_filename = LOCATION_FILE (*locus_ptr); | |
2328 | override_linenum = LOCATION_LINE (*locus_ptr); | |
2329 | } | |
2330 | } | |
74b0991d | 2331 | break; |
5846cb0f | 2332 | |
74b0991d | 2333 | case NOTE_INSN_BLOCK_END: |
2334 | if (debug_info_level == DINFO_LEVEL_NORMAL | |
2335 | || debug_info_level == DINFO_LEVEL_VERBOSE | |
8d60d2bc | 2336 | || write_symbols == DWARF2_DEBUG |
2337 | || write_symbols == VMS_AND_DWARF2_DEBUG | |
2338 | || write_symbols == VMS_DEBUG) | |
74b0991d | 2339 | { |
2340 | int n = BLOCK_NUMBER (NOTE_BLOCK (insn)); | |
7f446223 | 2341 | |
74b0991d | 2342 | app_disable (); |
2343 | ||
2344 | /* End of a symbol-block. */ | |
2345 | --block_depth; | |
fdada98f | 2346 | gcc_assert (block_depth >= 0); |
7f446223 | 2347 | |
888bd5c2 | 2348 | if (!DECL_IGNORED_P (current_function_decl)) |
2349 | debug_hooks->end_block (high_block_linenum, n); | |
74b0991d | 2350 | } |
1b16fc45 | 2351 | if (write_symbols == DBX_DEBUG |
2352 | || write_symbols == SDB_DEBUG) | |
2353 | { | |
2354 | tree outer_block = BLOCK_SUPERCONTEXT (NOTE_BLOCK (insn)); | |
2355 | location_t *locus_ptr | |
2356 | = block_nonartificial_location (outer_block); | |
2357 | ||
2358 | if (locus_ptr != NULL) | |
2359 | { | |
2360 | override_filename = LOCATION_FILE (*locus_ptr); | |
2361 | override_linenum = LOCATION_LINE (*locus_ptr); | |
2362 | } | |
2363 | else | |
2364 | { | |
2365 | override_filename = NULL; | |
2366 | override_linenum = 0; | |
2367 | } | |
2368 | } | |
74b0991d | 2369 | break; |
2370 | ||
2371 | case NOTE_INSN_DELETED_LABEL: | |
2372 | /* Emit the label. We may have deleted the CODE_LABEL because | |
2373 | the label could be proved to be unreachable, though still | |
2374 | referenced (in the form of having its address taken. */ | |
64e17633 | 2375 | ASM_OUTPUT_DEBUG_LABEL (file, "L", CODE_LABEL_NUMBER (insn)); |
74b0991d | 2376 | break; |
7f446223 | 2377 | |
63f5ad44 | 2378 | case NOTE_INSN_DELETED_DEBUG_LABEL: |
2379 | /* Similarly, but need to use different namespace for it. */ | |
2380 | if (CODE_LABEL_NUMBER (insn) != -1) | |
2381 | ASM_OUTPUT_DEBUG_LABEL (file, "LDL", CODE_LABEL_NUMBER (insn)); | |
2382 | break; | |
2383 | ||
5923a5e7 | 2384 | case NOTE_INSN_VAR_LOCATION: |
4143d08b | 2385 | case NOTE_INSN_CALL_ARG_LOCATION: |
888bd5c2 | 2386 | if (!DECL_IGNORED_P (current_function_decl)) |
82f53c1f | 2387 | debug_hooks->var_location (insn); |
5923a5e7 | 2388 | break; |
2389 | ||
74b0991d | 2390 | default: |
ad4583d9 | 2391 | gcc_unreachable (); |
2ee6d904 | 2392 | break; |
7f446223 | 2393 | } |
2394 | break; | |
2395 | ||
2396 | case BARRIER: | |
7f446223 | 2397 | break; |
2398 | ||
2399 | case CODE_LABEL: | |
3e97b49e | 2400 | /* The target port might emit labels in the output function for |
2401 | some insn, e.g. sh.c output_branchy_insn. */ | |
f554d413 | 2402 | if (CODE_LABEL_NUMBER (insn) <= max_labelno) |
2403 | { | |
2404 | int align = LABEL_TO_ALIGNMENT (insn); | |
ebd9163c | 2405 | #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN |
3245cd4f | 2406 | int max_skip = LABEL_TO_MAX_SKIP (insn); |
ebd9163c | 2407 | #endif |
21d55c67 | 2408 | |
3e97b49e | 2409 | if (align && NEXT_INSN (insn)) |
7e6b5e54 | 2410 | { |
3245cd4f | 2411 | #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN |
7e6b5e54 | 2412 | ASM_OUTPUT_MAX_SKIP_ALIGN (file, align, max_skip); |
7af58cc3 | 2413 | #else |
2414 | #ifdef ASM_OUTPUT_ALIGN_WITH_NOP | |
2415 | ASM_OUTPUT_ALIGN_WITH_NOP (file, align); | |
3245cd4f | 2416 | #else |
7e6b5e54 | 2417 | ASM_OUTPUT_ALIGN (file, align); |
7af58cc3 | 2418 | #endif |
3245cd4f | 2419 | #endif |
7e6b5e54 | 2420 | } |
f554d413 | 2421 | } |
7f446223 | 2422 | CC_STATUS_INIT; |
7d8c2e0d | 2423 | |
888bd5c2 | 2424 | if (!DECL_IGNORED_P (current_function_decl) && LABEL_NAME (insn)) |
3352ba19 | 2425 | debug_hooks->label (as_a <rtx_code_label *> (insn)); |
b29760a8 | 2426 | |
e50260bb | 2427 | app_disable (); |
8476db15 | 2428 | |
2429 | next = next_nonnote_insn (insn); | |
88facd8b | 2430 | /* If this label is followed by a jump-table, make sure we put |
2431 | the label in the read-only section. Also possibly write the | |
2432 | label and jump table together. */ | |
2433 | if (next != 0 && JUMP_TABLE_DATA_P (next)) | |
7f446223 | 2434 | { |
998032ba | 2435 | #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC) |
88facd8b | 2436 | /* In this case, the case vector is being moved by the |
2437 | target, so don't output the label at all. Leave that | |
2438 | to the back end macros. */ | |
998032ba | 2439 | #else |
88facd8b | 2440 | if (! JUMP_TABLES_IN_TEXT_SECTION) |
2441 | { | |
2442 | int log_align; | |
feb8ef57 | 2443 | |
88facd8b | 2444 | switch_to_section (targetm.asm_out.function_rodata_section |
2445 | (current_function_decl)); | |
feb8ef57 | 2446 | |
2447 | #ifdef ADDR_VEC_ALIGN | |
88facd8b | 2448 | log_align = ADDR_VEC_ALIGN (next); |
feb8ef57 | 2449 | #else |
88facd8b | 2450 | log_align = exact_log2 (BIGGEST_ALIGNMENT / BITS_PER_UNIT); |
feb8ef57 | 2451 | #endif |
88facd8b | 2452 | ASM_OUTPUT_ALIGN (file, log_align); |
2453 | } | |
2454 | else | |
2455 | switch_to_section (current_function_section ()); | |
6b5be7f8 | 2456 | |
7f446223 | 2457 | #ifdef ASM_OUTPUT_CASE_LABEL |
88facd8b | 2458 | ASM_OUTPUT_CASE_LABEL (file, "L", CODE_LABEL_NUMBER (insn), |
2459 | next); | |
7f446223 | 2460 | #else |
88facd8b | 2461 | targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn)); |
998032ba | 2462 | #endif |
7f446223 | 2463 | #endif |
88facd8b | 2464 | break; |
7f446223 | 2465 | } |
a7ae1e59 | 2466 | if (LABEL_ALT_ENTRY_P (insn)) |
2467 | output_alternate_entry_point (file, insn); | |
bfee5366 | 2468 | else |
883b2e73 | 2469 | targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn)); |
7f446223 | 2470 | break; |
2471 | ||
2472 | default: | |
2473 | { | |
19cb6b50 | 2474 | rtx body = PATTERN (insn); |
7f446223 | 2475 | int insn_code_number; |
c32319fc | 2476 | const char *templ; |
1488fe24 | 2477 | bool is_stmt; |
7f446223 | 2478 | |
168bf671 | 2479 | /* Reset this early so it is correct for ASM statements. */ |
2480 | current_insn_predicate = NULL_RTX; | |
751d3ba7 | 2481 | |
7f446223 | 2482 | /* An INSN, JUMP_INSN or CALL_INSN. |
2483 | First check for special kinds that recog doesn't recognize. */ | |
2484 | ||
8b332087 | 2485 | if (GET_CODE (body) == USE /* These are just declarations. */ |
7f446223 | 2486 | || GET_CODE (body) == CLOBBER) |
2487 | break; | |
2488 | ||
2489 | #ifdef HAVE_cc0 | |
1337c7b6 | 2490 | { |
2491 | /* If there is a REG_CC_SETTER note on this insn, it means that | |
2492 | the setting of the condition code was done in the delay slot | |
2493 | of the insn that branched here. So recover the cc status | |
2494 | from the insn that set it. */ | |
7f446223 | 2495 | |
1337c7b6 | 2496 | rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX); |
2497 | if (note) | |
2498 | { | |
ed3e6e5d | 2499 | rtx_insn *other = as_a <rtx_insn *> (XEXP (note, 0)); |
2500 | NOTICE_UPDATE_CC (PATTERN (other), other); | |
1337c7b6 | 2501 | cc_prev_status = cc_status; |
2502 | } | |
2503 | } | |
7f446223 | 2504 | #endif |
2505 | ||
2506 | /* Detect insns that are really jump-tables | |
2507 | and output them as such. */ | |
2508 | ||
77985f1a | 2509 | if (JUMP_TABLE_DATA_P (insn)) |
7f446223 | 2510 | { |
4063e82c | 2511 | #if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)) |
19cb6b50 | 2512 | int vlen, idx; |
4063e82c | 2513 | #endif |
7f446223 | 2514 | |
8476db15 | 2515 | if (! JUMP_TABLES_IN_TEXT_SECTION) |
2f14b1f9 | 2516 | switch_to_section (targetm.asm_out.function_rodata_section |
2517 | (current_function_decl)); | |
8476db15 | 2518 | else |
2f14b1f9 | 2519 | switch_to_section (current_function_section ()); |
8476db15 | 2520 | |
e50260bb | 2521 | app_disable (); |
7f446223 | 2522 | |
998032ba | 2523 | #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC) |
2524 | if (GET_CODE (body) == ADDR_VEC) | |
2525 | { | |
2526 | #ifdef ASM_OUTPUT_ADDR_VEC | |
2527 | ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn), body); | |
2528 | #else | |
fdada98f | 2529 | gcc_unreachable (); |
998032ba | 2530 | #endif |
2531 | } | |
2532 | else | |
2533 | { | |
2534 | #ifdef ASM_OUTPUT_ADDR_DIFF_VEC | |
2535 | ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn), body); | |
2536 | #else | |
fdada98f | 2537 | gcc_unreachable (); |
998032ba | 2538 | #endif |
2539 | } | |
2540 | #else | |
7f446223 | 2541 | vlen = XVECLEN (body, GET_CODE (body) == ADDR_DIFF_VEC); |
2542 | for (idx = 0; idx < vlen; idx++) | |
2543 | { | |
2544 | if (GET_CODE (body) == ADDR_VEC) | |
2545 | { | |
2546 | #ifdef ASM_OUTPUT_ADDR_VEC_ELT | |
2547 | ASM_OUTPUT_ADDR_VEC_ELT | |
2548 | (file, CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 0, idx), 0))); | |
2549 | #else | |
fdada98f | 2550 | gcc_unreachable (); |
7f446223 | 2551 | #endif |
2552 | } | |
2553 | else | |
2554 | { | |
2555 | #ifdef ASM_OUTPUT_ADDR_DIFF_ELT | |
2556 | ASM_OUTPUT_ADDR_DIFF_ELT | |
2557 | (file, | |
9eaab178 | 2558 | body, |
7f446223 | 2559 | CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 1, idx), 0)), |
2560 | CODE_LABEL_NUMBER (XEXP (XEXP (body, 0), 0))); | |
2561 | #else | |
fdada98f | 2562 | gcc_unreachable (); |
7f446223 | 2563 | #endif |
2564 | } | |
2565 | } | |
2566 | #ifdef ASM_OUTPUT_CASE_END | |
2567 | ASM_OUTPUT_CASE_END (file, | |
2568 | CODE_LABEL_NUMBER (PREV_INSN (insn)), | |
2569 | insn); | |
998032ba | 2570 | #endif |
7f446223 | 2571 | #endif |
2572 | ||
2f14b1f9 | 2573 | switch_to_section (current_function_section ()); |
7f446223 | 2574 | |
2575 | break; | |
2576 | } | |
13751393 | 2577 | /* Output this line note if it is the first or the last line |
2578 | note in a row. */ | |
888bd5c2 | 2579 | if (!DECL_IGNORED_P (current_function_decl) |
2580 | && notice_source_line (insn, &is_stmt)) | |
2581 | (*debug_hooks->source_line) (last_linenum, last_filename, | |
2582 | last_discriminator, is_stmt); | |
7f446223 | 2583 | |
7f446223 | 2584 | if (GET_CODE (body) == ASM_INPUT) |
2585 | { | |
38606abf | 2586 | const char *string = XSTR (body, 0); |
2587 | ||
7f446223 | 2588 | /* There's no telling what that did to the condition codes. */ |
2589 | CC_STATUS_INIT; | |
38606abf | 2590 | |
2591 | if (string[0]) | |
7f446223 | 2592 | { |
931b0a0f | 2593 | expanded_location loc; |
09fb10e8 | 2594 | |
b8ddfc61 | 2595 | app_enable (); |
931b0a0f | 2596 | loc = expand_location (ASM_INPUT_SOURCE_LOCATION (body)); |
565b6b35 | 2597 | if (*loc.file && loc.line) |
09fb10e8 | 2598 | fprintf (asm_out_file, "%s %i \"%s\" 1\n", |
2599 | ASM_COMMENT_START, loc.line, loc.file); | |
38606abf | 2600 | fprintf (asm_out_file, "\t%s\n", string); |
a8971681 | 2601 | #if HAVE_AS_LINE_ZERO |
2602 | if (*loc.file && loc.line) | |
09fb10e8 | 2603 | fprintf (asm_out_file, "%s 0 \"\" 2\n", ASM_COMMENT_START); |
a8971681 | 2604 | #endif |
7f446223 | 2605 | } |
7f446223 | 2606 | break; |
2607 | } | |
2608 | ||
2609 | /* Detect `asm' construct with operands. */ | |
2610 | if (asm_noperands (body) >= 0) | |
2611 | { | |
a101c7ef | 2612 | unsigned int noperands = asm_noperands (body); |
2457c754 | 2613 | rtx *ops = XALLOCAVEC (rtx, noperands); |
9a356c3c | 2614 | const char *string; |
09fb10e8 | 2615 | location_t loc; |
931b0a0f | 2616 | expanded_location expanded; |
7f446223 | 2617 | |
2618 | /* There's no telling what that did to the condition codes. */ | |
2619 | CC_STATUS_INIT; | |
7f446223 | 2620 | |
7f446223 | 2621 | /* Get out the operand values. */ |
09fb10e8 | 2622 | string = decode_asm_operands (body, ops, NULL, NULL, NULL, &loc); |
73b5bf07 | 2623 | /* Inhibit dying on what would otherwise be compiler bugs. */ |
7f446223 | 2624 | insn_noperands = noperands; |
2625 | this_is_asm_operands = insn; | |
931b0a0f | 2626 | expanded = expand_location (loc); |
7f446223 | 2627 | |
561c9236 | 2628 | #ifdef FINAL_PRESCAN_INSN |
2629 | FINAL_PRESCAN_INSN (insn, ops, insn_noperands); | |
2630 | #endif | |
2631 | ||
7f446223 | 2632 | /* Output the insn using them. */ |
38606abf | 2633 | if (string[0]) |
2634 | { | |
b8ddfc61 | 2635 | app_enable (); |
931b0a0f | 2636 | if (expanded.file && expanded.line) |
09fb10e8 | 2637 | fprintf (asm_out_file, "%s %i \"%s\" 1\n", |
931b0a0f | 2638 | ASM_COMMENT_START, expanded.line, expanded.file); |
38606abf | 2639 | output_asm_insn (string, ops); |
a8971681 | 2640 | #if HAVE_AS_LINE_ZERO |
931b0a0f | 2641 | if (expanded.file && expanded.line) |
09fb10e8 | 2642 | fprintf (asm_out_file, "%s 0 \"\" 2\n", ASM_COMMENT_START); |
a8971681 | 2643 | #endif |
38606abf | 2644 | } |
2645 | ||
e6554c42 | 2646 | if (targetm.asm_out.final_postscan_insn) |
2647 | targetm.asm_out.final_postscan_insn (file, insn, ops, | |
2648 | insn_noperands); | |
2649 | ||
7f446223 | 2650 | this_is_asm_operands = 0; |
2651 | break; | |
2652 | } | |
2653 | ||
e50260bb | 2654 | app_disable (); |
7f446223 | 2655 | |
3a0b41f5 | 2656 | if (rtx_sequence *seq = dyn_cast <rtx_sequence *> (body)) |
7f446223 | 2657 | { |
2658 | /* A delayed-branch sequence */ | |
19cb6b50 | 2659 | int i; |
7f446223 | 2660 | |
91a55c11 | 2661 | final_sequence = seq; |
7f446223 | 2662 | |
2663 | /* The first insn in this SEQUENCE might be a JUMP_INSN that will | |
2664 | force the restoration of a comparison that was previously | |
2665 | thought unnecessary. If that happens, cancel this sequence | |
2666 | and cause that insn to be restored. */ | |
2667 | ||
3a0b41f5 | 2668 | next = final_scan_insn (seq->insn (0), file, 0, 1, seen); |
2669 | if (next != seq->insn (1)) | |
7f446223 | 2670 | { |
2671 | final_sequence = 0; | |
2672 | return next; | |
2673 | } | |
2674 | ||
3a0b41f5 | 2675 | for (i = 1; i < seq->len (); i++) |
1208daeb | 2676 | { |
3a0b41f5 | 2677 | rtx_insn *insn = seq->insn (i); |
82f53c1f | 2678 | rtx_insn *next = NEXT_INSN (insn); |
1208daeb | 2679 | /* We loop in case any instruction in a delay slot gets |
2680 | split. */ | |
2681 | do | |
4bf029b0 | 2682 | insn = final_scan_insn (insn, file, 0, 1, seen); |
1208daeb | 2683 | while (insn != next); |
2684 | } | |
7f446223 | 2685 | #ifdef DBR_OUTPUT_SEQEND |
2686 | DBR_OUTPUT_SEQEND (file); | |
2687 | #endif | |
2688 | final_sequence = 0; | |
2689 | ||
2690 | /* If the insn requiring the delay slot was a CALL_INSN, the | |
2691 | insns in the delay slot are actually executed before the | |
2692 | called function. Hence we don't preserve any CC-setting | |
2693 | actions in these insns and the CC must be marked as being | |
2694 | clobbered by the function. */ | |
3a0b41f5 | 2695 | if (CALL_P (seq->insn (0))) |
6536bc06 | 2696 | { |
2697 | CC_STATUS_INIT; | |
2698 | } | |
7f446223 | 2699 | break; |
2700 | } | |
2701 | ||
2702 | /* We have a real machine instruction as rtl. */ | |
2703 | ||
2704 | body = PATTERN (insn); | |
2705 | ||
2706 | #ifdef HAVE_cc0 | |
2ee6d904 | 2707 | set = single_set (insn); |
52afbef4 | 2708 | |
7f446223 | 2709 | /* Check for redundant test and compare instructions |
2710 | (when the condition codes are already set up as desired). | |
2711 | This is done only when optimizing; if not optimizing, | |
2712 | it should be possible for the user to alter a variable | |
2713 | with the debugger in between statements | |
2714 | and the next statement should reexamine the variable | |
2715 | to compute the condition codes. */ | |
2716 | ||
2c5d2e39 | 2717 | if (optimize_p) |
7f446223 | 2718 | { |
d8ce7f2b | 2719 | if (set |
2720 | && GET_CODE (SET_DEST (set)) == CC0 | |
2721 | && insn != last_ignored_compare) | |
7f446223 | 2722 | { |
74f4459c | 2723 | rtx src1, src2; |
d8ce7f2b | 2724 | if (GET_CODE (SET_SRC (set)) == SUBREG) |
c6a6cdaa | 2725 | SET_SRC (set) = alter_subreg (&SET_SRC (set), true); |
74f4459c | 2726 | |
2727 | src1 = SET_SRC (set); | |
2728 | src2 = NULL_RTX; | |
2729 | if (GET_CODE (SET_SRC (set)) == COMPARE) | |
d8ce7f2b | 2730 | { |
2731 | if (GET_CODE (XEXP (SET_SRC (set), 0)) == SUBREG) | |
2732 | XEXP (SET_SRC (set), 0) | |
c6a6cdaa | 2733 | = alter_subreg (&XEXP (SET_SRC (set), 0), true); |
d8ce7f2b | 2734 | if (GET_CODE (XEXP (SET_SRC (set), 1)) == SUBREG) |
2735 | XEXP (SET_SRC (set), 1) | |
c6a6cdaa | 2736 | = alter_subreg (&XEXP (SET_SRC (set), 1), true); |
74f4459c | 2737 | if (XEXP (SET_SRC (set), 1) |
2738 | == CONST0_RTX (GET_MODE (XEXP (SET_SRC (set), 0)))) | |
2739 | src2 = XEXP (SET_SRC (set), 0); | |
d8ce7f2b | 2740 | } |
2741 | if ((cc_status.value1 != 0 | |
74f4459c | 2742 | && rtx_equal_p (src1, cc_status.value1)) |
d8ce7f2b | 2743 | || (cc_status.value2 != 0 |
74f4459c | 2744 | && rtx_equal_p (src1, cc_status.value2)) |
2745 | || (src2 != 0 && cc_status.value1 != 0 | |
2746 | && rtx_equal_p (src2, cc_status.value1)) | |
2747 | || (src2 != 0 && cc_status.value2 != 0 | |
2748 | && rtx_equal_p (src2, cc_status.value2))) | |
7f446223 | 2749 | { |
d8ce7f2b | 2750 | /* Don't delete insn if it has an addressing side-effect. */ |
ed1e5d40 | 2751 | if (! FIND_REG_INC_NOTE (insn, NULL_RTX) |
d8ce7f2b | 2752 | /* or if anything in it is volatile. */ |
2753 | && ! volatile_refs_p (PATTERN (insn))) | |
2754 | { | |
2755 | /* We don't really delete the insn; just ignore it. */ | |
2756 | last_ignored_compare = insn; | |
2757 | break; | |
2758 | } | |
7f446223 | 2759 | } |
2760 | } | |
2761 | } | |
7f446223 | 2762 | |
7f446223 | 2763 | /* If this is a conditional branch, maybe modify it |
2764 | if the cc's are in a nonstandard state | |
2765 | so that it accomplishes the same thing that it would | |
2766 | do straightforwardly if the cc's were set up normally. */ | |
2767 | ||
2768 | if (cc_status.flags != 0 | |
6d7dc5b9 | 2769 | && JUMP_P (insn) |
7f446223 | 2770 | && GET_CODE (body) == SET |
2771 | && SET_DEST (body) == pc_rtx | |
2772 | && GET_CODE (SET_SRC (body)) == IF_THEN_ELSE | |
6720e96c | 2773 | && COMPARISON_P (XEXP (SET_SRC (body), 0)) |
4bf029b0 | 2774 | && XEXP (XEXP (SET_SRC (body), 0), 0) == cc0_rtx) |
7f446223 | 2775 | { |
2776 | /* This function may alter the contents of its argument | |
2777 | and clear some of the cc_status.flags bits. | |
2778 | It may also return 1 meaning condition now always true | |
2779 | or -1 meaning condition now always false | |
2780 | or 2 meaning condition nontrivial but altered. */ | |
19cb6b50 | 2781 | int result = alter_cond (XEXP (SET_SRC (body), 0)); |
7f446223 | 2782 | /* If condition now has fixed value, replace the IF_THEN_ELSE |
2783 | with its then-operand or its else-operand. */ | |
2784 | if (result == 1) | |
2785 | SET_SRC (body) = XEXP (SET_SRC (body), 1); | |
2786 | if (result == -1) | |
2787 | SET_SRC (body) = XEXP (SET_SRC (body), 2); | |
2788 | ||
2789 | /* The jump is now either unconditional or a no-op. | |
2790 | If it has become a no-op, don't try to output it. | |
2791 | (It would not be recognized.) */ | |
2792 | if (SET_SRC (body) == pc_rtx) | |
2793 | { | |
b36d64df | 2794 | delete_insn (insn); |
7f446223 | 2795 | break; |
2796 | } | |
9cb2517e | 2797 | else if (ANY_RETURN_P (SET_SRC (body))) |
7f446223 | 2798 | /* Replace (set (pc) (return)) with (return). */ |
2799 | PATTERN (insn) = body = SET_SRC (body); | |
2800 | ||
2801 | /* Rerecognize the instruction if it has changed. */ | |
2802 | if (result != 0) | |
2803 | INSN_CODE (insn) = -1; | |
2804 | } | |
2805 | ||
f8df4da2 | 2806 | /* If this is a conditional trap, maybe modify it if the cc's |
f8df4da2 | 2807 | are in a nonstandard state so that it accomplishes the same |
2808 | thing that it would do straightforwardly if the cc's were | |
2809 | set up normally. */ | |
2810 | if (cc_status.flags != 0 | |
2811 | && NONJUMP_INSN_P (insn) | |
2812 | && GET_CODE (body) == TRAP_IF | |
2813 | && COMPARISON_P (TRAP_CONDITION (body)) | |
2814 | && XEXP (TRAP_CONDITION (body), 0) == cc0_rtx) | |
2815 | { | |
2816 | /* This function may alter the contents of its argument | |
2817 | and clear some of the cc_status.flags bits. | |
2818 | It may also return 1 meaning condition now always true | |
2819 | or -1 meaning condition now always false | |
2820 | or 2 meaning condition nontrivial but altered. */ | |
2821 | int result = alter_cond (TRAP_CONDITION (body)); | |
2822 | ||
2823 | /* If TRAP_CONDITION has become always false, delete the | |
2824 | instruction. */ | |
2825 | if (result == -1) | |
2826 | { | |
2827 | delete_insn (insn); | |
2828 | break; | |
2829 | } | |
2830 | ||
2831 | /* If TRAP_CONDITION has become always true, replace | |
2832 | TRAP_CONDITION with const_true_rtx. */ | |
2833 | if (result == 1) | |
2834 | TRAP_CONDITION (body) = const_true_rtx; | |
2835 | ||
2836 | /* Rerecognize the instruction if it has changed. */ | |
2837 | if (result != 0) | |
2838 | INSN_CODE (insn) = -1; | |
2839 | } | |
2840 | ||
7f446223 | 2841 | /* Make same adjustments to instructions that examine the |
1feceddb | 2842 | condition codes without jumping and instructions that |
2843 | handle conditional moves (if this machine has either one). */ | |
7f446223 | 2844 | |
2845 | if (cc_status.flags != 0 | |
52afbef4 | 2846 | && set != 0) |
7f446223 | 2847 | { |
1feceddb | 2848 | rtx cond_rtx, then_rtx, else_rtx; |
2ee6d904 | 2849 | |
6d7dc5b9 | 2850 | if (!JUMP_P (insn) |
52afbef4 | 2851 | && GET_CODE (SET_SRC (set)) == IF_THEN_ELSE) |
1feceddb | 2852 | { |
52afbef4 | 2853 | cond_rtx = XEXP (SET_SRC (set), 0); |
2854 | then_rtx = XEXP (SET_SRC (set), 1); | |
2855 | else_rtx = XEXP (SET_SRC (set), 2); | |
1feceddb | 2856 | } |
2857 | else | |
2858 | { | |
52afbef4 | 2859 | cond_rtx = SET_SRC (set); |
1feceddb | 2860 | then_rtx = const_true_rtx; |
2861 | else_rtx = const0_rtx; | |
2862 | } | |
2ee6d904 | 2863 | |
70479e6f | 2864 | if (COMPARISON_P (cond_rtx) |
2865 | && XEXP (cond_rtx, 0) == cc0_rtx) | |
7f446223 | 2866 | { |
70479e6f | 2867 | int result; |
2868 | result = alter_cond (cond_rtx); | |
2869 | if (result == 1) | |
2870 | validate_change (insn, &SET_SRC (set), then_rtx, 0); | |
2871 | else if (result == -1) | |
2872 | validate_change (insn, &SET_SRC (set), else_rtx, 0); | |
2873 | else if (result == 2) | |
2874 | INSN_CODE (insn) = -1; | |
2875 | if (SET_DEST (set) == SET_SRC (set)) | |
2876 | delete_insn (insn); | |
7f446223 | 2877 | } |
2878 | } | |
1feceddb | 2879 | |
7f446223 | 2880 | #endif |
2881 | ||
82575fa7 | 2882 | #ifdef HAVE_peephole |
7f446223 | 2883 | /* Do machine-specific peephole optimizations if desired. */ |
2884 | ||
2c5d2e39 | 2885 | if (optimize_p && !flag_no_peephole && !nopeepholes) |
7f446223 | 2886 | { |
82f53c1f | 2887 | rtx_insn *next = peephole (insn); |
7f446223 | 2888 | /* When peepholing, if there were notes within the peephole, |
2889 | emit them before the peephole. */ | |
2890 | if (next != 0 && next != NEXT_INSN (insn)) | |
2891 | { | |
82f53c1f | 2892 | rtx_insn *note, *prev = PREV_INSN (insn); |
7f446223 | 2893 | |
2894 | for (note = NEXT_INSN (insn); note != next; | |
2895 | note = NEXT_INSN (note)) | |
2c5d2e39 | 2896 | final_scan_insn (note, file, optimize_p, nopeepholes, seen); |
e1f3beab | 2897 | |
2898 | /* Put the notes in the proper position for a later | |
2899 | rescan. For example, the SH target can do this | |
2900 | when generating a far jump in a delayed branch | |
2901 | sequence. */ | |
2902 | note = NEXT_INSN (insn); | |
4a57a2e8 | 2903 | SET_PREV_INSN (note) = prev; |
2904 | SET_NEXT_INSN (prev) = note; | |
2905 | SET_NEXT_INSN (PREV_INSN (next)) = insn; | |
2906 | SET_PREV_INSN (insn) = PREV_INSN (next); | |
2907 | SET_NEXT_INSN (insn) = next; | |
2908 | SET_PREV_INSN (next) = insn; | |
7f446223 | 2909 | } |
2910 | ||
2911 | /* PEEPHOLE might have changed this. */ | |
2912 | body = PATTERN (insn); | |
2913 | } | |
82575fa7 | 2914 | #endif |
7f446223 | 2915 | |
2916 | /* Try to recognize the instruction. | |
2917 | If successful, verify that the operands satisfy the | |
2918 | constraints for the instruction. Crash if they don't, | |
2919 | since `reload' should have changed them so that they do. */ | |
2920 | ||
2921 | insn_code_number = recog_memoized (insn); | |
d740a1dd | 2922 | cleanup_subreg_operands (insn); |
7f446223 | 2923 | |
86c98a43 | 2924 | /* Dump the insn in the assembly for debugging (-dAP). |
2925 | If the final dump is requested as slim RTL, dump slim | |
2926 | RTL to the assembly file also. */ | |
d3371fcd | 2927 | if (flag_dump_rtl_in_asm) |
2928 | { | |
2929 | print_rtx_head = ASM_COMMENT_START; | |
86c98a43 | 2930 | if (! (dump_flags & TDF_SLIM)) |
2931 | print_rtl_single (asm_out_file, insn); | |
2932 | else | |
2933 | dump_insn_slim (asm_out_file, insn); | |
d3371fcd | 2934 | print_rtx_head = ""; |
2935 | } | |
eca1c9c0 | 2936 | |
60f1f5cc | 2937 | if (! constrain_operands_cached (1)) |
7f446223 | 2938 | fatal_insn_not_found (insn); |
7f446223 | 2939 | |
2940 | /* Some target machines need to prescan each insn before | |
2941 | it is output. */ | |
2942 | ||
2943 | #ifdef FINAL_PRESCAN_INSN | |
ed420a25 | 2944 | FINAL_PRESCAN_INSN (insn, recog_data.operand, recog_data.n_operands); |
7f446223 | 2945 | #endif |
2946 | ||
751d3ba7 | 2947 | if (targetm.have_conditional_execution () |
2948 | && GET_CODE (PATTERN (insn)) == COND_EXEC) | |
308f360f | 2949 | current_insn_predicate = COND_EXEC_TEST (PATTERN (insn)); |
308f360f | 2950 | |
7f446223 | 2951 | #ifdef HAVE_cc0 |
2952 | cc_prev_status = cc_status; | |
2953 | ||
2954 | /* Update `cc_status' for this instruction. | |
2955 | The instruction's output routine may change it further. | |
2956 | If the output routine for a jump insn needs to depend | |
2957 | on the cc status, it should look at cc_prev_status. */ | |
2958 | ||
2959 | NOTICE_UPDATE_CC (body, insn); | |
2960 | #endif | |
2961 | ||
19f8cf12 | 2962 | current_output_insn = debug_insn = insn; |
7f446223 | 2963 | |
ae9660c8 | 2964 | /* Find the proper template for this insn. */ |
c32319fc | 2965 | templ = get_insn_template (insn_code_number, insn); |
7f446223 | 2966 | |
ae9660c8 | 2967 | /* If the C code returns 0, it means that it is a jump insn |
2968 | which follows a deleted test insn, and that test insn | |
2969 | needs to be reinserted. */ | |
c32319fc | 2970 | if (templ == 0) |
7f446223 | 2971 | { |
82f53c1f | 2972 | rtx_insn *prev; |
07c6fb87 | 2973 | |
fdada98f | 2974 | gcc_assert (prev_nonnote_insn (insn) == last_ignored_compare); |
07c6fb87 | 2975 | |
2976 | /* We have already processed the notes between the setter and | |
2977 | the user. Make sure we don't process them again, this is | |
2978 | particularly important if one of the notes is a block | |
2979 | scope note or an EH note. */ | |
2980 | for (prev = insn; | |
2981 | prev != last_ignored_compare; | |
2982 | prev = PREV_INSN (prev)) | |
2983 | { | |
6d7dc5b9 | 2984 | if (NOTE_P (prev)) |
b36d64df | 2985 | delete_insn (prev); /* Use delete_note. */ |
07c6fb87 | 2986 | } |
2987 | ||
2988 | return prev; | |
7f446223 | 2989 | } |
2990 | ||
2991 | /* If the template is the string "#", it means that this insn must | |
2992 | be split. */ | |
c32319fc | 2993 | if (templ[0] == '#' && templ[1] == '\0') |
7f446223 | 2994 | { |
82f53c1f | 2995 | rtx_insn *new_rtx = try_split (body, insn, 0); |
7f446223 | 2996 | |
2997 | /* If we didn't split the insn, go away. */ | |
c32319fc | 2998 | if (new_rtx == insn && PATTERN (new_rtx) == body) |
68435912 | 2999 | fatal_insn ("could not split insn", insn); |
2ee6d904 | 3000 | |
f2d92d7a | 3001 | /* If we have a length attribute, this instruction should have |
3002 | been split in shorten_branches, to ensure that we would have | |
3003 | valid length info for the splitees. */ | |
3004 | gcc_assert (!HAVE_ATTR_length); | |
4d7cc64a | 3005 | |
c32319fc | 3006 | return new_rtx; |
7f446223 | 3007 | } |
2ee6d904 | 3008 | |
8ec87476 | 3009 | /* ??? This will put the directives in the wrong place if |
3010 | get_insn_template outputs assembly directly. However calling it | |
3011 | before get_insn_template breaks if the insns is split. */ | |
f3e8e368 | 3012 | if (targetm.asm_out.unwind_emit_before_insn |
3013 | && targetm.asm_out.unwind_emit) | |
53b72e99 | 3014 | targetm.asm_out.unwind_emit (asm_out_file, insn); |
7f446223 | 3015 | |
82f53c1f | 3016 | if (rtx_call_insn *call_insn = dyn_cast <rtx_call_insn *> (insn)) |
9cb02f75 | 3017 | { |
82f53c1f | 3018 | rtx x = call_from_call_insn (call_insn); |
9cb02f75 | 3019 | x = XEXP (x, 0); |
3020 | if (x && MEM_P (x) && GET_CODE (XEXP (x, 0)) == SYMBOL_REF) | |
3021 | { | |
3022 | tree t; | |
3023 | x = XEXP (x, 0); | |
3024 | t = SYMBOL_REF_DECL (x); | |
3025 | if (t) | |
3026 | assemble_external (t); | |
3027 | } | |
4143d08b | 3028 | if (!DECL_IGNORED_P (current_function_decl)) |
82f53c1f | 3029 | debug_hooks->var_location (insn); |
9cb02f75 | 3030 | } |
3031 | ||
8ec87476 | 3032 | /* Output assembler code from the template. */ |
c32319fc | 3033 | output_asm_insn (templ, recog_data.operand); |
7f446223 | 3034 | |
e6554c42 | 3035 | /* Some target machines need to postscan each insn after |
3036 | it is output. */ | |
3037 | if (targetm.asm_out.final_postscan_insn) | |
3038 | targetm.asm_out.final_postscan_insn (file, insn, recog_data.operand, | |
3039 | recog_data.n_operands); | |
3040 | ||
f3e8e368 | 3041 | if (!targetm.asm_out.unwind_emit_before_insn |
3042 | && targetm.asm_out.unwind_emit) | |
3043 | targetm.asm_out.unwind_emit (asm_out_file, insn); | |
3044 | ||
19f8cf12 | 3045 | current_output_insn = debug_insn = 0; |
7f446223 | 3046 | } |
3047 | } | |
3048 | return NEXT_INSN (insn); | |
3049 | } | |
3050 | \f | |
1488fe24 | 3051 | /* Return whether a source line note needs to be emitted before INSN. |
3052 | Sets IS_STMT to TRUE if the line should be marked as a possible | |
3053 | breakpoint location. */ | |
7f446223 | 3054 | |
13751393 | 3055 | static bool |
82f53c1f | 3056 | notice_source_line (rtx_insn *insn, bool *is_stmt) |
7f446223 | 3057 | { |
1b16fc45 | 3058 | const char *filename; |
3059 | int linenum; | |
3060 | ||
3061 | if (override_filename) | |
3062 | { | |
3063 | filename = override_filename; | |
3064 | linenum = override_linenum; | |
3065 | } | |
0e7ae557 | 3066 | else if (INSN_HAS_LOCATION (insn)) |
3067 | { | |
3068 | expanded_location xloc = insn_location (insn); | |
3069 | filename = xloc.file; | |
3070 | linenum = xloc.line; | |
3071 | } | |
1b16fc45 | 3072 | else |
3073 | { | |
0e7ae557 | 3074 | filename = NULL; |
3075 | linenum = 0; | |
1b16fc45 | 3076 | } |
7f446223 | 3077 | |
1488fe24 | 3078 | if (filename == NULL) |
3079 | return false; | |
3080 | ||
3081 | if (force_source_line | |
3082 | || filename != last_filename | |
3083 | || last_linenum != linenum) | |
13751393 | 3084 | { |
e47ccf94 | 3085 | force_source_line = false; |
13751393 | 3086 | last_filename = filename; |
3087 | last_linenum = linenum; | |
d01c707b | 3088 | last_discriminator = discriminator; |
1488fe24 | 3089 | *is_stmt = true; |
13751393 | 3090 | high_block_linenum = MAX (last_linenum, high_block_linenum); |
3091 | high_function_linenum = MAX (last_linenum, high_function_linenum); | |
3092 | return true; | |
3093 | } | |
1488fe24 | 3094 | |
3095 | if (SUPPORTS_DISCRIMINATOR && last_discriminator != discriminator) | |
3096 | { | |
3097 | /* If the discriminator changed, but the line number did not, | |
3098 | output the line table entry with is_stmt false so the | |
3099 | debugger does not treat this as a breakpoint location. */ | |
3100 | last_discriminator = discriminator; | |
3101 | *is_stmt = false; | |
3102 | return true; | |
3103 | } | |
3104 | ||
13751393 | 3105 | return false; |
7f446223 | 3106 | } |
3107 | \f | |
d740a1dd | 3108 | /* For each operand in INSN, simplify (subreg (reg)) so that it refers |
3109 | directly to the desired hard register. */ | |
2ee6d904 | 3110 | |
d740a1dd | 3111 | void |
ed3e6e5d | 3112 | cleanup_subreg_operands (rtx_insn *insn) |
d740a1dd | 3113 | { |
78e49515 | 3114 | int i; |
3072d30e | 3115 | bool changed = false; |
60f1f5cc | 3116 | extract_insn_cached (insn); |
ed420a25 | 3117 | for (i = 0; i < recog_data.n_operands; i++) |
d740a1dd | 3118 | { |
f024691d | 3119 | /* The following test cannot use recog_data.operand when testing |
eb6bd2dc | 3120 | for a SUBREG: the underlying object might have been changed |
3121 | already if we are inside a match_operator expression that | |
3122 | matches the else clause. Instead we test the underlying | |
3123 | expression directly. */ | |
3124 | if (GET_CODE (*recog_data.operand_loc[i]) == SUBREG) | |
3072d30e | 3125 | { |
c6a6cdaa | 3126 | recog_data.operand[i] = alter_subreg (recog_data.operand_loc[i], true); |
3072d30e | 3127 | changed = true; |
3128 | } | |
ed420a25 | 3129 | else if (GET_CODE (recog_data.operand[i]) == PLUS |
ab8df056 | 3130 | || GET_CODE (recog_data.operand[i]) == MULT |
e16ceb8e | 3131 | || MEM_P (recog_data.operand[i])) |
3072d30e | 3132 | recog_data.operand[i] = walk_alter_subreg (recog_data.operand_loc[i], &changed); |
d740a1dd | 3133 | } |
3134 | ||
ed420a25 | 3135 | for (i = 0; i < recog_data.n_dups; i++) |
d740a1dd | 3136 | { |
ed420a25 | 3137 | if (GET_CODE (*recog_data.dup_loc[i]) == SUBREG) |
3072d30e | 3138 | { |
c6a6cdaa | 3139 | *recog_data.dup_loc[i] = alter_subreg (recog_data.dup_loc[i], true); |
3072d30e | 3140 | changed = true; |
3141 | } | |
ed420a25 | 3142 | else if (GET_CODE (*recog_data.dup_loc[i]) == PLUS |
ab8df056 | 3143 | || GET_CODE (*recog_data.dup_loc[i]) == MULT |
e16ceb8e | 3144 | || MEM_P (*recog_data.dup_loc[i])) |
3072d30e | 3145 | *recog_data.dup_loc[i] = walk_alter_subreg (recog_data.dup_loc[i], &changed); |
d740a1dd | 3146 | } |
3072d30e | 3147 | if (changed) |
ed3e6e5d | 3148 | df_insn_rescan (insn); |
d740a1dd | 3149 | } |
3150 | ||
c6a6cdaa | 3151 | /* If X is a SUBREG, try to replace it with a REG or a MEM, based on |
3152 | the thing it is a subreg of. Do it anyway if FINAL_P. */ | |
7f446223 | 3153 | |
3154 | rtx | |
c6a6cdaa | 3155 | alter_subreg (rtx *xp, bool final_p) |
7f446223 | 3156 | { |
06b3c9f7 | 3157 | rtx x = *xp; |
19cb6b50 | 3158 | rtx y = SUBREG_REG (x); |
c5aa1e92 | 3159 | |
06b3c9f7 | 3160 | /* simplify_subreg does not remove subreg from volatile references. |
3161 | We are required to. */ | |
e16ceb8e | 3162 | if (MEM_P (y)) |
d7041732 | 3163 | { |
3164 | int offset = SUBREG_BYTE (x); | |
3165 | ||
3166 | /* For paradoxical subregs on big-endian machines, SUBREG_BYTE | |
3167 | contains 0 instead of the proper offset. See simplify_subreg. */ | |
3168 | if (offset == 0 | |
3169 | && GET_MODE_SIZE (GET_MODE (y)) < GET_MODE_SIZE (GET_MODE (x))) | |
3170 | { | |
3171 | int difference = GET_MODE_SIZE (GET_MODE (y)) | |
3172 | - GET_MODE_SIZE (GET_MODE (x)); | |
3173 | if (WORDS_BIG_ENDIAN) | |
3174 | offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD; | |
3175 | if (BYTES_BIG_ENDIAN) | |
3176 | offset += difference % UNITS_PER_WORD; | |
3177 | } | |
3178 | ||
c6a6cdaa | 3179 | if (final_p) |
3180 | *xp = adjust_address (y, GET_MODE (x), offset); | |
3181 | else | |
3182 | *xp = adjust_address_nv (y, GET_MODE (x), offset); | |
d7041732 | 3183 | } |
06b3c9f7 | 3184 | else |
89b7108e | 3185 | { |
c32319fc | 3186 | rtx new_rtx = simplify_subreg (GET_MODE (x), y, GET_MODE (y), |
c6a6cdaa | 3187 | SUBREG_BYTE (x)); |
89b7108e | 3188 | |
c32319fc | 3189 | if (new_rtx != 0) |
3190 | *xp = new_rtx; | |
c6a6cdaa | 3191 | else if (final_p && REG_P (y)) |
89b7108e | 3192 | { |
fdada98f | 3193 | /* Simplify_subreg can't handle some REG cases, but we have to. */ |
80c70e76 | 3194 | unsigned int regno; |
3195 | HOST_WIDE_INT offset; | |
3196 | ||
3197 | regno = subreg_regno (x); | |
3198 | if (subreg_lowpart_p (x)) | |
3199 | offset = byte_lowpart_offset (GET_MODE (x), GET_MODE (y)); | |
3200 | else | |
3201 | offset = SUBREG_BYTE (x); | |
3202 | *xp = gen_rtx_REG_offset (y, GET_MODE (x), regno, offset); | |
89b7108e | 3203 | } |
89b7108e | 3204 | } |
3205 | ||
06b3c9f7 | 3206 | return *xp; |
7f446223 | 3207 | } |
3208 | ||
3209 | /* Do alter_subreg on all the SUBREGs contained in X. */ | |
3210 | ||
3211 | static rtx | |
3072d30e | 3212 | walk_alter_subreg (rtx *xp, bool *changed) |
7f446223 | 3213 | { |
06b3c9f7 | 3214 | rtx x = *xp; |
7f446223 | 3215 | switch (GET_CODE (x)) |
3216 | { | |
3217 | case PLUS: | |
3218 | case MULT: | |
727c62dd | 3219 | case AND: |
3072d30e | 3220 | XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0), changed); |
3221 | XEXP (x, 1) = walk_alter_subreg (&XEXP (x, 1), changed); | |
7f446223 | 3222 | break; |
3223 | ||
3224 | case MEM: | |
727c62dd | 3225 | case ZERO_EXTEND: |
3072d30e | 3226 | XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0), changed); |
7f446223 | 3227 | break; |
3228 | ||
3229 | case SUBREG: | |
3072d30e | 3230 | *changed = true; |
c6a6cdaa | 3231 | return alter_subreg (xp, true); |
2ee6d904 | 3232 | |
0dbd1c74 | 3233 | default: |
3234 | break; | |
7f446223 | 3235 | } |
3236 | ||
50b55036 | 3237 | return *xp; |
7f446223 | 3238 | } |
3239 | \f | |
3240 | #ifdef HAVE_cc0 | |
3241 | ||
3242 | /* Given BODY, the body of a jump instruction, alter the jump condition | |
3243 | as required by the bits that are set in cc_status.flags. | |
3244 | Not all of the bits there can be handled at this level in all cases. | |
3245 | ||
3246 | The value is normally 0. | |
3247 | 1 means that the condition has become always true. | |
3248 | -1 means that the condition has become always false. | |
3249 | 2 means that COND has been altered. */ | |
3250 | ||
3251 | static int | |
8a82c3cf | 3252 | alter_cond (rtx cond) |
7f446223 | 3253 | { |
3254 | int value = 0; | |
3255 | ||
3256 | if (cc_status.flags & CC_REVERSED) | |
3257 | { | |
3258 | value = 2; | |
3259 | PUT_CODE (cond, swap_condition (GET_CODE (cond))); | |
3260 | } | |
3261 | ||
3262 | if (cc_status.flags & CC_INVERTED) | |
3263 | { | |
3264 | value = 2; | |
3265 | PUT_CODE (cond, reverse_condition (GET_CODE (cond))); | |
3266 | } | |
3267 | ||
3268 | if (cc_status.flags & CC_NOT_POSITIVE) | |
3269 | switch (GET_CODE (cond)) | |
3270 | { | |
3271 | case LE: | |
3272 | case LEU: | |
3273 | case GEU: | |
3274 | /* Jump becomes unconditional. */ | |
3275 | return 1; | |
3276 | ||
3277 | case GT: | |
3278 | case GTU: | |
3279 | case LTU: | |
3280 | /* Jump becomes no-op. */ | |
3281 | return -1; | |
3282 | ||
3283 | case GE: | |
3284 | PUT_CODE (cond, EQ); | |
3285 | value = 2; | |
3286 | break; | |
3287 | ||
3288 | case LT: | |
3289 | PUT_CODE (cond, NE); | |
3290 | value = 2; | |
3291 | break; | |
2ee6d904 | 3292 | |
0dbd1c74 | 3293 | default: |
3294 | break; | |
7f446223 | 3295 | } |
3296 | ||
3297 | if (cc_status.flags & CC_NOT_NEGATIVE) | |
3298 | switch (GET_CODE (cond)) | |
3299 | { | |
3300 | case GE: | |
3301 | case GEU: | |
3302 | /* Jump becomes unconditional. */ | |
3303 | return 1; | |
3304 | ||
3305 | case LT: | |
3306 | case LTU: | |
3307 | /* Jump becomes no-op. */ | |
3308 | return -1; | |
3309 | ||
3310 | case LE: | |
3311 | case LEU: | |
3312 | PUT_CODE (cond, EQ); | |
3313 | value = 2; | |
3314 | break; | |
3315 | ||
3316 | case GT: | |
3317 | case GTU: | |
3318 | PUT_CODE (cond, NE); | |
3319 | value = 2; | |
3320 | break; | |
2ee6d904 | 3321 | |
0dbd1c74 | 3322 | default: |
3323 | break; | |
7f446223 | 3324 | } |
3325 | ||
3326 | if (cc_status.flags & CC_NO_OVERFLOW) | |
3327 | switch (GET_CODE (cond)) | |
3328 | { | |
3329 | case GEU: | |
3330 | /* Jump becomes unconditional. */ | |
3331 | return 1; | |
3332 | ||
3333 | case LEU: | |
3334 | PUT_CODE (cond, EQ); | |
3335 | value = 2; | |
3336 | break; | |
3337 | ||
3338 | case GTU: | |
3339 | PUT_CODE (cond, NE); | |
3340 | value = 2; | |
3341 | break; | |
3342 | ||
3343 | case LTU: | |
3344 | /* Jump becomes no-op. */ | |
3345 | return -1; | |
2ee6d904 | 3346 | |
0dbd1c74 | 3347 | default: |
3348 | break; | |
7f446223 | 3349 | } |
3350 | ||
3351 | if (cc_status.flags & (CC_Z_IN_NOT_N | CC_Z_IN_N)) | |
3352 | switch (GET_CODE (cond)) | |
3353 | { | |
0dbd1c74 | 3354 | default: |
fdada98f | 3355 | gcc_unreachable (); |
7f446223 | 3356 | |
3357 | case NE: | |
3358 | PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? GE : LT); | |
3359 | value = 2; | |
3360 | break; | |
3361 | ||
3362 | case EQ: | |
3363 | PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? LT : GE); | |
3364 | value = 2; | |
3365 | break; | |
3366 | } | |
3367 | ||
3368 | if (cc_status.flags & CC_NOT_SIGNED) | |
3369 | /* The flags are valid if signed condition operators are converted | |
3370 | to unsigned. */ | |
3371 | switch (GET_CODE (cond)) | |
3372 | { | |
3373 | case LE: | |
3374 | PUT_CODE (cond, LEU); | |
3375 | value = 2; | |
3376 | break; | |
3377 | ||
3378 | case LT: | |
3379 | PUT_CODE (cond, LTU); | |
3380 | value = 2; | |
3381 | break; | |
3382 | ||
3383 | case GT: | |
3384 | PUT_CODE (cond, GTU); | |
3385 | value = 2; | |
3386 | break; | |
3387 | ||
3388 | case GE: | |
3389 | PUT_CODE (cond, GEU); | |
3390 | value = 2; | |
3391 | break; | |
0dbd1c74 | 3392 | |
3393 | default: | |
3394 | break; | |
7f446223 | 3395 | } |
3396 | ||
3397 | return value; | |
3398 | } | |
3399 | #endif | |
3400 | \f | |
3401 | /* Report inconsistency between the assembler template and the operands. | |
3402 | In an `asm', it's the user's fault; otherwise, the compiler's fault. */ | |
3403 | ||
3404 | void | |
380c6697 | 3405 | output_operand_lossage (const char *cmsgid, ...) |
7f446223 | 3406 | { |
a1657b95 | 3407 | char *fmt_string; |
3408 | char *new_message; | |
0d8434b0 | 3409 | const char *pfx_str; |
ee582a61 | 3410 | va_list ap; |
8a82c3cf | 3411 | |
380c6697 | 3412 | va_start (ap, cmsgid); |
a1657b95 | 3413 | |
1e5fcbe2 | 3414 | pfx_str = this_is_asm_operands ? _("invalid 'asm': ") : "output_operand: "; |
380c6697 | 3415 | asprintf (&fmt_string, "%s%s", pfx_str, _(cmsgid)); |
a1657b95 | 3416 | vasprintf (&new_message, fmt_string, ap); |
d3371fcd | 3417 | |
7f446223 | 3418 | if (this_is_asm_operands) |
a1657b95 | 3419 | error_for_asm (this_is_asm_operands, "%s", new_message); |
7f446223 | 3420 | else |
a1657b95 | 3421 | internal_error ("%s", new_message); |
3422 | ||
3423 | free (fmt_string); | |
3424 | free (new_message); | |
ee582a61 | 3425 | va_end (ap); |
7f446223 | 3426 | } |
3427 | \f | |
3428 | /* Output of assembler code from a template, and its subroutines. */ | |
3429 | ||
fcdc122e | 3430 | /* Annotate the assembly with a comment describing the pattern and |
3431 | alternative used. */ | |
3432 | ||
3433 | static void | |
8a82c3cf | 3434 | output_asm_name (void) |
fcdc122e | 3435 | { |
3436 | if (debug_insn) | |
3437 | { | |
3438 | int num = INSN_CODE (debug_insn); | |
3439 | fprintf (asm_out_file, "\t%s %d\t%s", | |
3440 | ASM_COMMENT_START, INSN_UID (debug_insn), | |
3441 | insn_data[num].name); | |
3442 | if (insn_data[num].n_alternatives > 1) | |
3443 | fprintf (asm_out_file, "/%d", which_alternative + 1); | |
f2d92d7a | 3444 | |
3445 | if (HAVE_ATTR_length) | |
3446 | fprintf (asm_out_file, "\t[length = %d]", | |
3447 | get_attr_length (debug_insn)); | |
3448 | ||
fcdc122e | 3449 | /* Clear this so only the first assembler insn |
3450 | of any rtl insn will get the special comment for -dp. */ | |
3451 | debug_insn = 0; | |
3452 | } | |
3453 | } | |
3454 | ||
b10dbbca | 3455 | /* If OP is a REG or MEM and we can find a MEM_EXPR corresponding to it |
3456 | or its address, return that expr . Set *PADDRESSP to 1 if the expr | |
955034d1 | 3457 | corresponds to the address of the object and 0 if to the object. */ |
3458 | ||
3459 | static tree | |
8a82c3cf | 3460 | get_mem_expr_from_op (rtx op, int *paddressp) |
955034d1 | 3461 | { |
b10dbbca | 3462 | tree expr; |
955034d1 | 3463 | int inner_addressp; |
3464 | ||
3465 | *paddressp = 0; | |
3466 | ||
8ad4c111 | 3467 | if (REG_P (op)) |
ca74b940 | 3468 | return REG_EXPR (op); |
e16ceb8e | 3469 | else if (!MEM_P (op)) |
955034d1 | 3470 | return 0; |
3471 | ||
b10dbbca | 3472 | if (MEM_EXPR (op) != 0) |
3473 | return MEM_EXPR (op); | |
955034d1 | 3474 | |
3475 | /* Otherwise we have an address, so indicate it and look at the address. */ | |
3476 | *paddressp = 1; | |
3477 | op = XEXP (op, 0); | |
3478 | ||
3479 | /* First check if we have a decl for the address, then look at the right side | |
3480 | if it is a PLUS. Otherwise, strip off arithmetic and keep looking. | |
3481 | But don't allow the address to itself be indirect. */ | |
b10dbbca | 3482 | if ((expr = get_mem_expr_from_op (op, &inner_addressp)) && ! inner_addressp) |
3483 | return expr; | |
955034d1 | 3484 | else if (GET_CODE (op) == PLUS |
b10dbbca | 3485 | && (expr = get_mem_expr_from_op (XEXP (op, 1), &inner_addressp))) |
3486 | return expr; | |
955034d1 | 3487 | |
971ba038 | 3488 | while (UNARY_P (op) |
6720e96c | 3489 | || GET_RTX_CLASS (GET_CODE (op)) == RTX_BIN_ARITH) |
955034d1 | 3490 | op = XEXP (op, 0); |
3491 | ||
b10dbbca | 3492 | expr = get_mem_expr_from_op (op, &inner_addressp); |
3493 | return inner_addressp ? 0 : expr; | |
955034d1 | 3494 | } |
ed1e5d40 | 3495 | |
0f3163d6 | 3496 | /* Output operand names for assembler instructions. OPERANDS is the |
3497 | operand vector, OPORDER is the order to write the operands, and NOPS | |
3498 | is the number of operands to write. */ | |
3499 | ||
3500 | static void | |
8a82c3cf | 3501 | output_asm_operand_names (rtx *operands, int *oporder, int nops) |
0f3163d6 | 3502 | { |
3503 | int wrote = 0; | |
3504 | int i; | |
3505 | ||
3506 | for (i = 0; i < nops; i++) | |
3507 | { | |
3508 | int addressp; | |
ca74b940 | 3509 | rtx op = operands[oporder[i]]; |
3510 | tree expr = get_mem_expr_from_op (op, &addressp); | |
0f3163d6 | 3511 | |
ca74b940 | 3512 | fprintf (asm_out_file, "%c%s", |
3513 | wrote ? ',' : '\t', wrote ? "" : ASM_COMMENT_START); | |
3514 | wrote = 1; | |
b10dbbca | 3515 | if (expr) |
0f3163d6 | 3516 | { |
ca74b940 | 3517 | fprintf (asm_out_file, "%s", |
b10dbbca | 3518 | addressp ? "*" : ""); |
3519 | print_mem_expr (asm_out_file, expr); | |
0f3163d6 | 3520 | wrote = 1; |
3521 | } | |
ca74b940 | 3522 | else if (REG_P (op) && ORIGINAL_REGNO (op) |
3523 | && ORIGINAL_REGNO (op) != REGNO (op)) | |
3524 | fprintf (asm_out_file, " tmp%i", ORIGINAL_REGNO (op)); | |
0f3163d6 | 3525 | } |
3526 | } | |
3527 | ||
18474b2c | 3528 | #ifdef ASSEMBLER_DIALECT |
3529 | /* Helper function to parse assembler dialects in the asm string. | |
3530 | This is called from output_asm_insn and asm_fprintf. */ | |
3531 | static const char * | |
3532 | do_assembler_dialects (const char *p, int *dialect) | |
3533 | { | |
3534 | char c = *(p - 1); | |
3535 | ||
3536 | switch (c) | |
3537 | { | |
3538 | case '{': | |
3539 | { | |
3540 | int i; | |
3541 | ||
3542 | if (*dialect) | |
3543 | output_operand_lossage ("nested assembly dialect alternatives"); | |
3544 | else | |
3545 | *dialect = 1; | |
3546 | ||
3547 | /* If we want the first dialect, do nothing. Otherwise, skip | |
3548 | DIALECT_NUMBER of strings ending with '|'. */ | |
3549 | for (i = 0; i < dialect_number; i++) | |
3550 | { | |
82353beb | 3551 | while (*p && *p != '}') |
3552 | { | |
3553 | if (*p == '|') | |
3554 | { | |
3555 | p++; | |
3556 | break; | |
3557 | } | |
3558 | ||
3559 | /* Skip over any character after a percent sign. */ | |
3560 | if (*p == '%') | |
3561 | p++; | |
3562 | if (*p) | |
3563 | p++; | |
3564 | } | |
3565 | ||
18474b2c | 3566 | if (*p == '}') |
3567 | break; | |
3568 | } | |
3569 | ||
3570 | if (*p == '\0') | |
3571 | output_operand_lossage ("unterminated assembly dialect alternative"); | |
3572 | } | |
3573 | break; | |
3574 | ||
3575 | case '|': | |
3576 | if (*dialect) | |
3577 | { | |
3578 | /* Skip to close brace. */ | |
3579 | do | |
3580 | { | |
3581 | if (*p == '\0') | |
3582 | { | |
3583 | output_operand_lossage ("unterminated assembly dialect alternative"); | |
3584 | break; | |
3585 | } | |
82353beb | 3586 | |
3587 | /* Skip over any character after a percent sign. */ | |
3588 | if (*p == '%' && p[1]) | |
3589 | { | |
3590 | p += 2; | |
3591 | continue; | |
3592 | } | |
3593 | ||
3594 | if (*p++ == '}') | |
3595 | break; | |
18474b2c | 3596 | } |
82353beb | 3597 | while (1); |
3598 | ||
18474b2c | 3599 | *dialect = 0; |
3600 | } | |
3601 | else | |
3602 | putc (c, asm_out_file); | |
3603 | break; | |
3604 | ||
3605 | case '}': | |
3606 | if (! *dialect) | |
3607 | putc (c, asm_out_file); | |
3608 | *dialect = 0; | |
3609 | break; | |
3610 | default: | |
3611 | gcc_unreachable (); | |
3612 | } | |
3613 | ||
3614 | return p; | |
3615 | } | |
3616 | #endif | |
3617 | ||
7f446223 | 3618 | /* Output text from TEMPLATE to the assembler output file, |
3619 | obeying %-directions to substitute operands taken from | |
3620 | the vector OPERANDS. | |
3621 | ||
3622 | %N (for N a digit) means print operand N in usual manner. | |
3623 | %lN means require operand N to be a CODE_LABEL or LABEL_REF | |
3624 | and print the label name with no punctuation. | |
3625 | %cN means require operand N to be a constant | |
3626 | and print the constant expression with no punctuation. | |
3627 | %aN means expect operand N to be a memory address | |
3628 | (not a memory reference!) and print a reference | |
3629 | to that address. | |
3630 | %nN means expect operand N to be a constant | |
3631 | and print a constant expression for minus the value | |
3632 | of the operand, with no other punctuation. */ | |
3633 | ||
3634 | void | |
c32319fc | 3635 | output_asm_insn (const char *templ, rtx *operands) |
7f446223 | 3636 | { |
19cb6b50 | 3637 | const char *p; |
3638 | int c; | |
b2975779 | 3639 | #ifdef ASSEMBLER_DIALECT |
3640 | int dialect = 0; | |
3641 | #endif | |
fcdc122e | 3642 | int oporder[MAX_RECOG_OPERANDS]; |
0f3163d6 | 3643 | char opoutput[MAX_RECOG_OPERANDS]; |
fcdc122e | 3644 | int ops = 0; |
7f446223 | 3645 | |
3646 | /* An insn may return a null string template | |
3647 | in a case where no assembler code is needed. */ | |
c32319fc | 3648 | if (*templ == 0) |
7f446223 | 3649 | return; |
3650 | ||
0f3163d6 | 3651 | memset (opoutput, 0, sizeof opoutput); |
c32319fc | 3652 | p = templ; |
7f446223 | 3653 | putc ('\t', asm_out_file); |
3654 | ||
3655 | #ifdef ASM_OUTPUT_OPCODE | |
3656 | ASM_OUTPUT_OPCODE (asm_out_file, p); | |
3657 | #endif | |
3658 | ||
6536bc06 | 3659 | while ((c = *p++)) |
7f446223 | 3660 | switch (c) |
3661 | { | |
7f446223 | 3662 | case '\n': |
0f3163d6 | 3663 | if (flag_verbose_asm) |
3664 | output_asm_operand_names (operands, oporder, ops); | |
fcdc122e | 3665 | if (flag_print_asm_name) |
3666 | output_asm_name (); | |
3667 | ||
0f3163d6 | 3668 | ops = 0; |
3669 | memset (opoutput, 0, sizeof opoutput); | |
3670 | ||
7f446223 | 3671 | putc (c, asm_out_file); |
40c98bdc | 3672 | #ifdef ASM_OUTPUT_OPCODE |
7f446223 | 3673 | while ((c = *p) == '\t') |
3674 | { | |
3675 | putc (c, asm_out_file); | |
3676 | p++; | |
3677 | } | |
3678 | ASM_OUTPUT_OPCODE (asm_out_file, p); | |
7f446223 | 3679 | #endif |
40c98bdc | 3680 | break; |
7f446223 | 3681 | |
3682 | #ifdef ASSEMBLER_DIALECT | |
3683 | case '{': | |
7f446223 | 3684 | case '}': |
18474b2c | 3685 | case '|': |
3686 | p = do_assembler_dialects (p, &dialect); | |
7f446223 | 3687 | break; |
3688 | #endif | |
3689 | ||
3690 | case '%': | |
82353beb | 3691 | /* %% outputs a single %. %{, %} and %| print {, } and | respectively |
3692 | if ASSEMBLER_DIALECT defined and these characters have a special | |
3693 | meaning as dialect delimiters.*/ | |
3694 | if (*p == '%' | |
3695 | #ifdef ASSEMBLER_DIALECT | |
3696 | || *p == '{' || *p == '}' || *p == '|' | |
3697 | #endif | |
3698 | ) | |
7f446223 | 3699 | { |
82353beb | 3700 | putc (*p, asm_out_file); |
7f446223 | 3701 | p++; |
7f446223 | 3702 | } |
3703 | /* %= outputs a number which is unique to each insn in the entire | |
3704 | compilation. This is useful for making local labels that are | |
3705 | referred to more than once in a given insn. */ | |
3706 | else if (*p == '=') | |
3707 | { | |
3708 | p++; | |
3709 | fprintf (asm_out_file, "%d", insn_counter); | |
3710 | } | |
3711 | /* % followed by a letter and some digits | |
3712 | outputs an operand in a special way depending on the letter. | |
3713 | Letters `acln' are implemented directly. | |
3714 | Other letters are passed to `output_operand' so that | |
182e98f4 | 3715 | the TARGET_PRINT_OPERAND hook can define them. */ |
66a33570 | 3716 | else if (ISALPHA (*p)) |
7f446223 | 3717 | { |
3718 | int letter = *p++; | |
ad05a264 | 3719 | unsigned long opnum; |
3720 | char *endptr; | |
312f4798 | 3721 | |
ad05a264 | 3722 | opnum = strtoul (p, &endptr, 10); |
3723 | ||
3724 | if (endptr == p) | |
3725 | output_operand_lossage ("operand number missing " | |
3726 | "after %%-letter"); | |
3727 | else if (this_is_asm_operands && opnum >= insn_noperands) | |
7f446223 | 3728 | output_operand_lossage ("operand number out of range"); |
3729 | else if (letter == 'l') | |
ad05a264 | 3730 | output_asm_label (operands[opnum]); |
7f446223 | 3731 | else if (letter == 'a') |
ad05a264 | 3732 | output_address (operands[opnum]); |
7f446223 | 3733 | else if (letter == 'c') |
3734 | { | |
ad05a264 | 3735 | if (CONSTANT_ADDRESS_P (operands[opnum])) |
3736 | output_addr_const (asm_out_file, operands[opnum]); | |
7f446223 | 3737 | else |
ad05a264 | 3738 | output_operand (operands[opnum], 'c'); |
7f446223 | 3739 | } |
3740 | else if (letter == 'n') | |
3741 | { | |
971ba038 | 3742 | if (CONST_INT_P (operands[opnum])) |
e1e05abb | 3743 | fprintf (asm_out_file, HOST_WIDE_INT_PRINT_DEC, |
ad05a264 | 3744 | - INTVAL (operands[opnum])); |
7f446223 | 3745 | else |
3746 | { | |
3747 | putc ('-', asm_out_file); | |
ad05a264 | 3748 | output_addr_const (asm_out_file, operands[opnum]); |
7f446223 | 3749 | } |
3750 | } | |
3751 | else | |
ad05a264 | 3752 | output_operand (operands[opnum], letter); |
2ee6d904 | 3753 | |
ad05a264 | 3754 | if (!opoutput[opnum]) |
b77121a6 | 3755 | oporder[ops++] = opnum; |
ad05a264 | 3756 | opoutput[opnum] = 1; |
fcdc122e | 3757 | |
ad05a264 | 3758 | p = endptr; |
3759 | c = *p; | |
7f446223 | 3760 | } |
3761 | /* % followed by a digit outputs an operand the default way. */ | |
66a33570 | 3762 | else if (ISDIGIT (*p)) |
7f446223 | 3763 | { |
ad05a264 | 3764 | unsigned long opnum; |
3765 | char *endptr; | |
312f4798 | 3766 | |
ad05a264 | 3767 | opnum = strtoul (p, &endptr, 10); |
3768 | if (this_is_asm_operands && opnum >= insn_noperands) | |
7f446223 | 3769 | output_operand_lossage ("operand number out of range"); |
3770 | else | |
ad05a264 | 3771 | output_operand (operands[opnum], 0); |
fcdc122e | 3772 | |
ad05a264 | 3773 | if (!opoutput[opnum]) |
b77121a6 | 3774 | oporder[ops++] = opnum; |
ad05a264 | 3775 | opoutput[opnum] = 1; |
0f3163d6 | 3776 | |
ad05a264 | 3777 | p = endptr; |
3778 | c = *p; | |
7f446223 | 3779 | } |
3780 | /* % followed by punctuation: output something for that | |
182e98f4 | 3781 | punctuation character alone, with no operand. The |
3782 | TARGET_PRINT_OPERAND hook decides what is actually done. */ | |
3783 | else if (targetm.asm_out.print_operand_punct_valid_p ((unsigned char) *p)) | |
7f446223 | 3784 | output_operand (NULL_RTX, *p++); |
7f446223 | 3785 | else |
3786 | output_operand_lossage ("invalid %%-code"); | |
3787 | break; | |
3788 | ||
3789 | default: | |
3790 | putc (c, asm_out_file); | |
3791 | } | |
3792 | ||
fcdc122e | 3793 | /* Write out the variable names for operands, if we know them. */ |
3794 | if (flag_verbose_asm) | |
0f3163d6 | 3795 | output_asm_operand_names (operands, oporder, ops); |
fcdc122e | 3796 | if (flag_print_asm_name) |
3797 | output_asm_name (); | |
7f446223 | 3798 | |
3799 | putc ('\n', asm_out_file); | |
3800 | } | |
3801 | \f | |
3802 | /* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */ | |
3803 | ||
3804 | void | |
8a82c3cf | 3805 | output_asm_label (rtx x) |
7f446223 | 3806 | { |
3807 | char buf[256]; | |
3808 | ||
3809 | if (GET_CODE (x) == LABEL_REF) | |
b49f2e4b | 3810 | x = LABEL_REF_LABEL (x); |
6d7dc5b9 | 3811 | if (LABEL_P (x) |
3812 | || (NOTE_P (x) | |
ad4583d9 | 3813 | && NOTE_KIND (x) == NOTE_INSN_DELETED_LABEL)) |
7f446223 | 3814 | ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x)); |
3815 | else | |
1e5fcbe2 | 3816 | output_operand_lossage ("'%%l' operand isn't a label"); |
7f446223 | 3817 | |
3818 | assemble_name (asm_out_file, buf); | |
3819 | } | |
3820 | ||
af2a449c | 3821 | /* Marks SYMBOL_REFs in x as referenced through use of assemble_external. */ |
3822 | ||
3823 | void | |
3824 | mark_symbol_refs_as_used (rtx x) | |
3825 | { | |
705f0a50 | 3826 | subrtx_iterator::array_type array; |
3827 | FOR_EACH_SUBRTX (iter, array, x, ALL) | |
3828 | { | |
3829 | const_rtx x = *iter; | |
3830 | if (GET_CODE (x) == SYMBOL_REF) | |
3831 | if (tree t = SYMBOL_REF_DECL (x)) | |
3832 | assemble_external (t); | |
3833 | } | |
af2a449c | 3834 | } |
3835 | ||
7f446223 | 3836 | /* Print operand X using machine-dependent assembler syntax. |
7f446223 | 3837 | CODE is a non-digit that preceded the operand-number in the % spec, |
3838 | such as 'z' if the spec was `%z3'. CODE is 0 if there was no char | |
3839 | between the % and the digits. | |
3840 | When CODE is a non-letter, X is 0. | |
3841 | ||
3842 | The meanings of the letters are machine-dependent and controlled | |
182e98f4 | 3843 | by TARGET_PRINT_OPERAND. */ |
7f446223 | 3844 | |
99b6f860 | 3845 | void |
8a82c3cf | 3846 | output_operand (rtx x, int code ATTRIBUTE_UNUSED) |
7f446223 | 3847 | { |
3848 | if (x && GET_CODE (x) == SUBREG) | |
c6a6cdaa | 3849 | x = alter_subreg (&x, true); |
7f446223 | 3850 | |
f689eec7 | 3851 | /* X must not be a pseudo reg. */ |
fdada98f | 3852 | gcc_assert (!x || !REG_P (x) || REGNO (x) < FIRST_PSEUDO_REGISTER); |
7f446223 | 3853 | |
182e98f4 | 3854 | targetm.asm_out.print_operand (asm_out_file, x, code); |
cd186228 | 3855 | |
3856 | if (x == NULL_RTX) | |
3857 | return; | |
3858 | ||
705f0a50 | 3859 | mark_symbol_refs_as_used (x); |
7f446223 | 3860 | } |
3861 | ||
182e98f4 | 3862 | /* Print a memory reference operand for address X using |
3863 | machine-dependent assembler syntax. */ | |
7f446223 | 3864 | |
3865 | void | |
8a82c3cf | 3866 | output_address (rtx x) |
7f446223 | 3867 | { |
3072d30e | 3868 | bool changed = false; |
3869 | walk_alter_subreg (&x, &changed); | |
182e98f4 | 3870 | targetm.asm_out.print_operand_address (asm_out_file, x); |
7f446223 | 3871 | } |
3872 | \f | |
3873 | /* Print an integer constant expression in assembler syntax. | |
3874 | Addition and subtraction are the only arithmetic | |
3875 | that may appear in these expressions. */ | |
3876 | ||
3877 | void | |
8a82c3cf | 3878 | output_addr_const (FILE *file, rtx x) |
7f446223 | 3879 | { |
3880 | char buf[256]; | |
3881 | ||
3882 | restart: | |
3883 | switch (GET_CODE (x)) | |
3884 | { | |
3885 | case PC: | |
ea3ddd7d | 3886 | putc ('.', file); |
7f446223 | 3887 | break; |
3888 | ||
3889 | case SYMBOL_REF: | |
4fe7a68f | 3890 | if (SYMBOL_REF_DECL (x)) |
0b49f8f8 | 3891 | assemble_external (SYMBOL_REF_DECL (x)); |
258e5000 | 3892 | #ifdef ASM_OUTPUT_SYMBOL_REF |
3893 | ASM_OUTPUT_SYMBOL_REF (file, x); | |
3894 | #else | |
7f446223 | 3895 | assemble_name (file, XSTR (x, 0)); |
258e5000 | 3896 | #endif |
7f446223 | 3897 | break; |
3898 | ||
3899 | case LABEL_REF: | |
b49f2e4b | 3900 | x = LABEL_REF_LABEL (x); |
b60f0749 | 3901 | /* Fall through. */ |
7f446223 | 3902 | case CODE_LABEL: |
3903 | ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x)); | |
633beede | 3904 | #ifdef ASM_OUTPUT_LABEL_REF |
3905 | ASM_OUTPUT_LABEL_REF (file, buf); | |
3906 | #else | |
7f446223 | 3907 | assemble_name (file, buf); |
633beede | 3908 | #endif |
7f446223 | 3909 | break; |
3910 | ||
3911 | case CONST_INT: | |
5ea9766a | 3912 | fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x)); |
7f446223 | 3913 | break; |
3914 | ||
3915 | case CONST: | |
3916 | /* This used to output parentheses around the expression, | |
3917 | but that does not work on the 386 (either ATT or BSD assembler). */ | |
3918 | output_addr_const (file, XEXP (x, 0)); | |
3919 | break; | |
3920 | ||
e913b5cd | 3921 | case CONST_WIDE_INT: |
3922 | /* We do not know the mode here so we have to use a round about | |
3923 | way to build a wide-int to get it printed properly. */ | |
3924 | { | |
3925 | wide_int w = wide_int::from_array (&CONST_WIDE_INT_ELT (x, 0), | |
3926 | CONST_WIDE_INT_NUNITS (x), | |
ddb1be65 | 3927 | CONST_WIDE_INT_NUNITS (x) |
e913b5cd | 3928 | * HOST_BITS_PER_WIDE_INT, |
3929 | false); | |
3930 | print_decs (w, file); | |
3931 | } | |
3932 | break; | |
3933 | ||
7f446223 | 3934 | case CONST_DOUBLE: |
e913b5cd | 3935 | if (CONST_DOUBLE_AS_INT_P (x)) |
7f446223 | 3936 | { |
3937 | /* We can use %d if the number is one word and positive. */ | |
3938 | if (CONST_DOUBLE_HIGH (x)) | |
e1e05abb | 3939 | fprintf (file, HOST_WIDE_INT_PRINT_DOUBLE_HEX, |
7df7561b | 3940 | (unsigned HOST_WIDE_INT) CONST_DOUBLE_HIGH (x), |
3941 | (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (x)); | |
2ee6d904 | 3942 | else if (CONST_DOUBLE_LOW (x) < 0) |
7df7561b | 3943 | fprintf (file, HOST_WIDE_INT_PRINT_HEX, |
3944 | (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (x)); | |
7f446223 | 3945 | else |
e1e05abb | 3946 | fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x)); |
7f446223 | 3947 | } |
3948 | else | |
3949 | /* We can't handle floating point constants; | |
3950 | PRINT_OPERAND must handle them. */ | |
3951 | output_operand_lossage ("floating constant misused"); | |
3952 | break; | |
3953 | ||
b563b483 | 3954 | case CONST_FIXED: |
ba002eb4 | 3955 | fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_FIXED_VALUE_LOW (x)); |
b563b483 | 3956 | break; |
3957 | ||
7f446223 | 3958 | case PLUS: |
3959 | /* Some assemblers need integer constants to appear last (eg masm). */ | |
971ba038 | 3960 | if (CONST_INT_P (XEXP (x, 0))) |
7f446223 | 3961 | { |
3962 | output_addr_const (file, XEXP (x, 1)); | |
3963 | if (INTVAL (XEXP (x, 0)) >= 0) | |
3964 | fprintf (file, "+"); | |
3965 | output_addr_const (file, XEXP (x, 0)); | |
3966 | } | |
3967 | else | |
3968 | { | |
3969 | output_addr_const (file, XEXP (x, 0)); | |
971ba038 | 3970 | if (!CONST_INT_P (XEXP (x, 1)) |
6da29e21 | 3971 | || INTVAL (XEXP (x, 1)) >= 0) |
7f446223 | 3972 | fprintf (file, "+"); |
3973 | output_addr_const (file, XEXP (x, 1)); | |
3974 | } | |
3975 | break; | |
3976 | ||
3977 | case MINUS: | |
3978 | /* Avoid outputting things like x-x or x+5-x, | |
3979 | since some assemblers can't handle that. */ | |
3980 | x = simplify_subtraction (x); | |
3981 | if (GET_CODE (x) != MINUS) | |
3982 | goto restart; | |
3983 | ||
3984 | output_addr_const (file, XEXP (x, 0)); | |
3985 | fprintf (file, "-"); | |
971ba038 | 3986 | if ((CONST_INT_P (XEXP (x, 1)) && INTVAL (XEXP (x, 1)) >= 0) |
58356836 | 3987 | || GET_CODE (XEXP (x, 1)) == PC |
3988 | || GET_CODE (XEXP (x, 1)) == SYMBOL_REF) | |
3989 | output_addr_const (file, XEXP (x, 1)); | |
3990 | else | |
7f446223 | 3991 | { |
11ff5d0d | 3992 | fputs (targetm.asm_out.open_paren, file); |
7f446223 | 3993 | output_addr_const (file, XEXP (x, 1)); |
11ff5d0d | 3994 | fputs (targetm.asm_out.close_paren, file); |
7f446223 | 3995 | } |
7f446223 | 3996 | break; |
3997 | ||
3998 | case ZERO_EXTEND: | |
3999 | case SIGN_EXTEND: | |
5b1bb114 | 4000 | case SUBREG: |
b32b308d | 4001 | case TRUNCATE: |
7f446223 | 4002 | output_addr_const (file, XEXP (x, 0)); |
4003 | break; | |
4004 | ||
4005 | default: | |
1282f299 | 4006 | if (targetm.asm_out.output_addr_const_extra (file, x)) |
4007 | break; | |
b60f0749 | 4008 | |
7f446223 | 4009 | output_operand_lossage ("invalid expression as operand"); |
4010 | } | |
4011 | } | |
4012 | \f | |
0e763b2a | 4013 | /* Output a quoted string. */ |
4014 | ||
4015 | void | |
4016 | output_quoted_string (FILE *asm_file, const char *string) | |
4017 | { | |
4018 | #ifdef OUTPUT_QUOTED_STRING | |
4019 | OUTPUT_QUOTED_STRING (asm_file, string); | |
4020 | #else | |
4021 | char c; | |
4022 | ||
4023 | putc ('\"', asm_file); | |
4024 | while ((c = *string++) != 0) | |
4025 | { | |
4026 | if (ISPRINT (c)) | |
4027 | { | |
4028 | if (c == '\"' || c == '\\') | |
4029 | putc ('\\', asm_file); | |
4030 | putc (c, asm_file); | |
4031 | } | |
4032 | else | |
4033 | fprintf (asm_file, "\\%03o", (unsigned char) c); | |
4034 | } | |
4035 | putc ('\"', asm_file); | |
4036 | #endif | |
4037 | } | |
4038 | \f | |
c0e76f1f | 4039 | /* Write a HOST_WIDE_INT number in hex form 0x1234, fast. */ |
4040 | ||
4041 | void | |
4042 | fprint_whex (FILE *f, unsigned HOST_WIDE_INT value) | |
4043 | { | |
4044 | char buf[2 + CHAR_BIT * sizeof (value) / 4]; | |
4045 | if (value == 0) | |
4046 | putc ('0', f); | |
4047 | else | |
4048 | { | |
4049 | char *p = buf + sizeof (buf); | |
4050 | do | |
4051 | *--p = "0123456789abcdef"[value % 16]; | |
4052 | while ((value /= 16) != 0); | |
4053 | *--p = 'x'; | |
4054 | *--p = '0'; | |
4055 | fwrite (p, 1, buf + sizeof (buf) - p, f); | |
4056 | } | |
4057 | } | |
4058 | ||
4059 | /* Internal function that prints an unsigned long in decimal in reverse. | |
4060 | The output string IS NOT null-terminated. */ | |
4061 | ||
4062 | static int | |
4063 | sprint_ul_rev (char *s, unsigned long value) | |
4064 | { | |
4065 | int i = 0; | |
4066 | do | |
4067 | { | |
4068 | s[i] = "0123456789"[value % 10]; | |
4069 | value /= 10; | |
4070 | i++; | |
4071 | /* alternate version, without modulo */ | |
4072 | /* oldval = value; */ | |
4073 | /* value /= 10; */ | |
4074 | /* s[i] = "0123456789" [oldval - 10*value]; */ | |
4075 | /* i++ */ | |
4076 | } | |
4077 | while (value != 0); | |
4078 | return i; | |
4079 | } | |
4080 | ||
c0e76f1f | 4081 | /* Write an unsigned long as decimal to a file, fast. */ |
4082 | ||
4083 | void | |
4084 | fprint_ul (FILE *f, unsigned long value) | |
4085 | { | |
4086 | /* python says: len(str(2**64)) == 20 */ | |
4087 | char s[20]; | |
4088 | int i; | |
4089 | ||
4090 | i = sprint_ul_rev (s, value); | |
4091 | ||
4092 | /* It's probably too small to bother with string reversal and fputs. */ | |
4093 | do | |
4094 | { | |
4095 | i--; | |
4096 | putc (s[i], f); | |
4097 | } | |
4098 | while (i != 0); | |
4099 | } | |
4100 | ||
4101 | /* Write an unsigned long as decimal to a string, fast. | |
4102 | s must be wide enough to not overflow, at least 21 chars. | |
4103 | Returns the length of the string (without terminating '\0'). */ | |
4104 | ||
4105 | int | |
4106 | sprint_ul (char *s, unsigned long value) | |
4107 | { | |
4108 | int len; | |
4109 | char tmp_c; | |
4110 | int i; | |
4111 | int j; | |
4112 | ||
4113 | len = sprint_ul_rev (s, value); | |
4114 | s[len] = '\0'; | |
4115 | ||
4116 | /* Reverse the string. */ | |
4117 | i = 0; | |
4118 | j = len - 1; | |
4119 | while (i < j) | |
4120 | { | |
4121 | tmp_c = s[i]; | |
4122 | s[i] = s[j]; | |
4123 | s[j] = tmp_c; | |
4124 | i++; j--; | |
4125 | } | |
4126 | ||
4127 | return len; | |
4128 | } | |
4129 | ||
7f446223 | 4130 | /* A poor man's fprintf, with the added features of %I, %R, %L, and %U. |
4131 | %R prints the value of REGISTER_PREFIX. | |
4132 | %L prints the value of LOCAL_LABEL_PREFIX. | |
4133 | %U prints the value of USER_LABEL_PREFIX. | |
4134 | %I prints the value of IMMEDIATE_PREFIX. | |
4135 | %O runs ASM_OUTPUT_OPCODE to transform what follows in the string. | |
a15360e1 | 4136 | Also supported are %d, %i, %u, %x, %X, %o, %c, %s and %%. |
7f446223 | 4137 | |
4138 | We handle alternate assembler dialects here, just like output_asm_insn. */ | |
4139 | ||
4140 | void | |
ee582a61 | 4141 | asm_fprintf (FILE *file, const char *p, ...) |
7f446223 | 4142 | { |
7f446223 | 4143 | char buf[10]; |
4144 | char *q, c; | |
18474b2c | 4145 | #ifdef ASSEMBLER_DIALECT |
4146 | int dialect = 0; | |
4147 | #endif | |
ee582a61 | 4148 | va_list argptr; |
8a82c3cf | 4149 | |
ee582a61 | 4150 | va_start (argptr, p); |
7f446223 | 4151 | |
4152 | buf[0] = '%'; | |
4153 | ||
6536bc06 | 4154 | while ((c = *p++)) |
7f446223 | 4155 | switch (c) |
4156 | { | |
4157 | #ifdef ASSEMBLER_DIALECT | |
4158 | case '{': | |
7f446223 | 4159 | case '}': |
18474b2c | 4160 | case '|': |
4161 | p = do_assembler_dialects (p, &dialect); | |
7f446223 | 4162 | break; |
4163 | #endif | |
4164 | ||
4165 | case '%': | |
4166 | c = *p++; | |
4167 | q = &buf[1]; | |
a15360e1 | 4168 | while (strchr ("-+ #0", c)) |
4169 | { | |
4170 | *q++ = c; | |
4171 | c = *p++; | |
4172 | } | |
66a33570 | 4173 | while (ISDIGIT (c) || c == '.') |
7f446223 | 4174 | { |
4175 | *q++ = c; | |
4176 | c = *p++; | |
4177 | } | |
4178 | switch (c) | |
4179 | { | |
4180 | case '%': | |
a15360e1 | 4181 | putc ('%', file); |
7f446223 | 4182 | break; |
4183 | ||
4184 | case 'd': case 'i': case 'u': | |
a15360e1 | 4185 | case 'x': case 'X': case 'o': |
4186 | case 'c': | |
7f446223 | 4187 | *q++ = c; |
4188 | *q = 0; | |
4189 | fprintf (file, buf, va_arg (argptr, int)); | |
4190 | break; | |
4191 | ||
4192 | case 'w': | |
a15360e1 | 4193 | /* This is a prefix to the 'd', 'i', 'u', 'x', 'X', and |
4194 | 'o' cases, but we do not check for those cases. It | |
4195 | means that the value is a HOST_WIDE_INT, which may be | |
4196 | either `long' or `long long'. */ | |
c4cf1b46 | 4197 | memcpy (q, HOST_WIDE_INT_PRINT, strlen (HOST_WIDE_INT_PRINT)); |
4198 | q += strlen (HOST_WIDE_INT_PRINT); | |
7f446223 | 4199 | *q++ = *p++; |
4200 | *q = 0; | |
4201 | fprintf (file, buf, va_arg (argptr, HOST_WIDE_INT)); | |
4202 | break; | |
4203 | ||
4204 | case 'l': | |
4205 | *q++ = c; | |
a15360e1 | 4206 | #ifdef HAVE_LONG_LONG |
4207 | if (*p == 'l') | |
4208 | { | |
4209 | *q++ = *p++; | |
4210 | *q++ = *p++; | |
4211 | *q = 0; | |
4212 | fprintf (file, buf, va_arg (argptr, long long)); | |
4213 | } | |
4214 | else | |
4215 | #endif | |
4216 | { | |
4217 | *q++ = *p++; | |
4218 | *q = 0; | |
4219 | fprintf (file, buf, va_arg (argptr, long)); | |
4220 | } | |
8a82c3cf | 4221 | |
7f446223 | 4222 | break; |
4223 | ||
4224 | case 's': | |
4225 | *q++ = c; | |
4226 | *q = 0; | |
4227 | fprintf (file, buf, va_arg (argptr, char *)); | |
4228 | break; | |
4229 | ||
4230 | case 'O': | |
4231 | #ifdef ASM_OUTPUT_OPCODE | |
4232 | ASM_OUTPUT_OPCODE (asm_out_file, p); | |
4233 | #endif | |
4234 | break; | |
4235 | ||
4236 | case 'R': | |
4237 | #ifdef REGISTER_PREFIX | |
4238 | fprintf (file, "%s", REGISTER_PREFIX); | |
4239 | #endif | |
4240 | break; | |
4241 | ||
4242 | case 'I': | |
4243 | #ifdef IMMEDIATE_PREFIX | |
4244 | fprintf (file, "%s", IMMEDIATE_PREFIX); | |
4245 | #endif | |
4246 | break; | |
4247 | ||
4248 | case 'L': | |
4249 | #ifdef LOCAL_LABEL_PREFIX | |
4250 | fprintf (file, "%s", LOCAL_LABEL_PREFIX); | |
4251 | #endif | |
4252 | break; | |
4253 | ||
4254 | case 'U': | |
95c4b02a | 4255 | fputs (user_label_prefix, file); |
7f446223 | 4256 | break; |
4257 | ||
31b6f0a8 | 4258 | #ifdef ASM_FPRINTF_EXTENSIONS |
de44dcb9 | 4259 | /* Uppercase letters are reserved for general use by asm_fprintf |
31b6f0a8 | 4260 | and so are not available to target specific code. In order to |
4261 | prevent the ASM_FPRINTF_EXTENSIONS macro from using them then, | |
4262 | they are defined here. As they get turned into real extensions | |
4263 | to asm_fprintf they should be removed from this list. */ | |
4264 | case 'A': case 'B': case 'C': case 'D': case 'E': | |
4265 | case 'F': case 'G': case 'H': case 'J': case 'K': | |
4266 | case 'M': case 'N': case 'P': case 'Q': case 'S': | |
4267 | case 'T': case 'V': case 'W': case 'Y': case 'Z': | |
4268 | break; | |
2ee6d904 | 4269 | |
31b6f0a8 | 4270 | ASM_FPRINTF_EXTENSIONS (file, argptr, p) |
4271 | #endif | |
7f446223 | 4272 | default: |
fdada98f | 4273 | gcc_unreachable (); |
7f446223 | 4274 | } |
4275 | break; | |
4276 | ||
4277 | default: | |
a15360e1 | 4278 | putc (c, file); |
7f446223 | 4279 | } |
ee582a61 | 4280 | va_end (argptr); |
7f446223 | 4281 | } |
4282 | \f | |
7f446223 | 4283 | /* Return nonzero if this function has no function calls. */ |
4284 | ||
4285 | int | |
8a82c3cf | 4286 | leaf_function_p (void) |
7f446223 | 4287 | { |
82f53c1f | 4288 | rtx_insn *insn; |
7f446223 | 4289 | |
d44f2f7c | 4290 | /* Some back-ends (e.g. s390) want leaf functions to stay leaf |
4291 | functions even if they call mcount. */ | |
4292 | if (crtl->profile && !targetm.keep_leaf_when_profiled ()) | |
7f446223 | 4293 | return 0; |
4294 | ||
4295 | for (insn = get_insns (); insn; insn = NEXT_INSN (insn)) | |
4296 | { | |
6d7dc5b9 | 4297 | if (CALL_P (insn) |
7a8d641b | 4298 | && ! SIBLING_CALL_P (insn)) |
7f446223 | 4299 | return 0; |
6d7dc5b9 | 4300 | if (NONJUMP_INSN_P (insn) |
7f446223 | 4301 | && GET_CODE (PATTERN (insn)) == SEQUENCE |
6d7dc5b9 | 4302 | && CALL_P (XVECEXP (PATTERN (insn), 0, 0)) |
60ecc450 | 4303 | && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0))) |
7f446223 | 4304 | return 0; |
4305 | } | |
7f446223 | 4306 | |
4307 | return 1; | |
4308 | } | |
4309 | ||
edc2a478 | 4310 | /* Return 1 if branch is a forward branch. |
e0f05f0c | 4311 | Uses insn_shuid array, so it works only in the final pass. May be used by |
4312 | output templates to customary add branch prediction hints. | |
4313 | */ | |
4314 | int | |
82f53c1f | 4315 | final_forward_branch_p (rtx_insn *insn) |
e0f05f0c | 4316 | { |
4317 | int insn_id, label_id; | |
312f4798 | 4318 | |
fdada98f | 4319 | gcc_assert (uid_shuid); |
e0f05f0c | 4320 | insn_id = INSN_SHUID (insn); |
4321 | label_id = INSN_SHUID (JUMP_LABEL (insn)); | |
4322 | /* We've hit some insns that does not have id information available. */ | |
fdada98f | 4323 | gcc_assert (insn_id && label_id); |
e0f05f0c | 4324 | return insn_id < label_id; |
4325 | } | |
4326 | ||
7f446223 | 4327 | /* On some machines, a function with no call insns |
4328 | can run faster if it doesn't create its own register window. | |
4329 | When output, the leaf function should use only the "output" | |
4330 | registers. Ordinarily, the function would be compiled to use | |
4331 | the "input" registers to find its arguments; it is a candidate | |
4332 | for leaf treatment if it uses only the "input" registers. | |
4333 | Leaf function treatment means renumbering so the function | |
4334 | uses the "output" registers instead. */ | |
4335 | ||
4336 | #ifdef LEAF_REGISTERS | |
4337 | ||
7f446223 | 4338 | /* Return 1 if this function uses only the registers that can be |
4339 | safely renumbered. */ | |
4340 | ||
4341 | int | |
8a82c3cf | 4342 | only_leaf_regs_used (void) |
7f446223 | 4343 | { |
4344 | int i; | |
805e22b2 | 4345 | const char *const permitted_reg_in_leaf_functions = LEAF_REGISTERS; |
7f446223 | 4346 | |
4347 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
3072d30e | 4348 | if ((df_regs_ever_live_p (i) || global_regs[i]) |
997d68fe | 4349 | && ! permitted_reg_in_leaf_functions[i]) |
4350 | return 0; | |
4351 | ||
18d50ae6 | 4352 | if (crtl->uses_pic_offset_table |
997d68fe | 4353 | && pic_offset_table_rtx != 0 |
8ad4c111 | 4354 | && REG_P (pic_offset_table_rtx) |
997d68fe | 4355 | && ! permitted_reg_in_leaf_functions[REGNO (pic_offset_table_rtx)]) |
4356 | return 0; | |
4357 | ||
7f446223 | 4358 | return 1; |
4359 | } | |
4360 | ||
4361 | /* Scan all instructions and renumber all registers into those | |
4362 | available in leaf functions. */ | |
4363 | ||
4364 | static void | |
82f53c1f | 4365 | leaf_renumber_regs (rtx_insn *first) |
7f446223 | 4366 | { |
82f53c1f | 4367 | rtx_insn *insn; |
7f446223 | 4368 | |
4369 | /* Renumber only the actual patterns. | |
4370 | The reg-notes can contain frame pointer refs, | |
4371 | and renumbering them could crash, and should not be needed. */ | |
4372 | for (insn = first; insn; insn = NEXT_INSN (insn)) | |
9204e736 | 4373 | if (INSN_P (insn)) |
7f446223 | 4374 | leaf_renumber_regs_insn (PATTERN (insn)); |
7f446223 | 4375 | } |
4376 | ||
4377 | /* Scan IN_RTX and its subexpressions, and renumber all regs into those | |
4378 | available in leaf functions. */ | |
4379 | ||
4380 | void | |
8a82c3cf | 4381 | leaf_renumber_regs_insn (rtx in_rtx) |
7f446223 | 4382 | { |
19cb6b50 | 4383 | int i, j; |
4384 | const char *format_ptr; | |
7f446223 | 4385 | |
4386 | if (in_rtx == 0) | |
4387 | return; | |
4388 | ||
4389 | /* Renumber all input-registers into output-registers. | |
4390 | renumbered_regs would be 1 for an output-register; | |
4391 | they */ | |
4392 | ||
8ad4c111 | 4393 | if (REG_P (in_rtx)) |
7f446223 | 4394 | { |
4395 | int newreg; | |
4396 | ||
4397 | /* Don't renumber the same reg twice. */ | |
4398 | if (in_rtx->used) | |
4399 | return; | |
4400 | ||
4401 | newreg = REGNO (in_rtx); | |
4402 | /* Don't try to renumber pseudo regs. It is possible for a pseudo reg | |
4403 | to reach here as part of a REG_NOTE. */ | |
4404 | if (newreg >= FIRST_PSEUDO_REGISTER) | |
4405 | { | |
4406 | in_rtx->used = 1; | |
4407 | return; | |
4408 | } | |
4409 | newreg = LEAF_REG_REMAP (newreg); | |
fdada98f | 4410 | gcc_assert (newreg >= 0); |
3072d30e | 4411 | df_set_regs_ever_live (REGNO (in_rtx), false); |
4412 | df_set_regs_ever_live (newreg, true); | |
4413 | SET_REGNO (in_rtx, newreg); | |
7f446223 | 4414 | in_rtx->used = 1; |
4415 | } | |
4416 | ||
9204e736 | 4417 | if (INSN_P (in_rtx)) |
7f446223 | 4418 | { |
4419 | /* Inside a SEQUENCE, we find insns. | |
4420 | Renumber just the patterns of these insns, | |
4421 | just as we do for the top-level insns. */ | |
4422 | leaf_renumber_regs_insn (PATTERN (in_rtx)); | |
4423 | return; | |
4424 | } | |
4425 | ||
4426 | format_ptr = GET_RTX_FORMAT (GET_CODE (in_rtx)); | |
4427 | ||
4428 | for (i = 0; i < GET_RTX_LENGTH (GET_CODE (in_rtx)); i++) | |
4429 | switch (*format_ptr++) | |
4430 | { | |
4431 | case 'e': | |
4432 | leaf_renumber_regs_insn (XEXP (in_rtx, i)); | |
4433 | break; | |
4434 | ||
4435 | case 'E': | |
4436 | if (NULL != XVEC (in_rtx, i)) | |
4437 | { | |
4438 | for (j = 0; j < XVECLEN (in_rtx, i); j++) | |
4439 | leaf_renumber_regs_insn (XVECEXP (in_rtx, i, j)); | |
4440 | } | |
4441 | break; | |
4442 | ||
4443 | case 'S': | |
4444 | case 's': | |
4445 | case '0': | |
4446 | case 'i': | |
4447 | case 'w': | |
4448 | case 'n': | |
4449 | case 'u': | |
4450 | break; | |
4451 | ||
4452 | default: | |
fdada98f | 4453 | gcc_unreachable (); |
7f446223 | 4454 | } |
4455 | } | |
4456 | #endif | |
77fce4cd | 4457 | \f |
4458 | /* Turn the RTL into assembly. */ | |
2a1990e9 | 4459 | static unsigned int |
77fce4cd | 4460 | rest_of_handle_final (void) |
4461 | { | |
4462 | rtx x; | |
4463 | const char *fnname; | |
4464 | ||
4465 | /* Get the function's name, as described by its RTL. This may be | |
4466 | different from the DECL_NAME name used in the source file. */ | |
4467 | ||
4468 | x = DECL_RTL (current_function_decl); | |
4469 | gcc_assert (MEM_P (x)); | |
4470 | x = XEXP (x, 0); | |
4471 | gcc_assert (GET_CODE (x) == SYMBOL_REF); | |
4472 | fnname = XSTR (x, 0); | |
4473 | ||
4474 | assemble_start_function (current_function_decl, fnname); | |
4475 | final_start_function (get_insns (), asm_out_file, optimize); | |
4476 | final (get_insns (), asm_out_file, optimize); | |
9ac9a758 | 4477 | if (flag_use_caller_save) |
4478 | collect_fn_hard_reg_usage (); | |
77fce4cd | 4479 | final_end_function (); |
4480 | ||
d3de9256 | 4481 | /* The IA-64 ".handlerdata" directive must be issued before the ".endp" |
4482 | directive that closes the procedure descriptor. Similarly, for x64 SEH. | |
4483 | Otherwise it's not strictly necessary, but it doesn't hurt either. */ | |
0a011112 | 4484 | output_function_exception_table (fnname); |
77fce4cd | 4485 | |
4486 | assemble_end_function (current_function_decl, fnname); | |
4487 | ||
77fce4cd | 4488 | user_defined_section_attribute = false; |
4489 | ||
3072d30e | 4490 | /* Free up reg info memory. */ |
4491 | free_reg_info (); | |
4492 | ||
77fce4cd | 4493 | if (! quiet_flag) |
4494 | fflush (asm_out_file); | |
4495 | ||
77fce4cd | 4496 | /* Write DBX symbols if requested. */ |
4497 | ||
4498 | /* Note that for those inline functions where we don't initially | |
4499 | know for certain that we will be generating an out-of-line copy, | |
4500 | the first invocation of this routine (rest_of_compilation) will | |
4501 | skip over this code by doing a `goto exit_rest_of_compilation;'. | |
4502 | Later on, wrapup_global_declarations will (indirectly) call | |
4503 | rest_of_compilation again for those inline functions that need | |
4504 | to have out-of-line copies generated. During that call, we | |
4505 | *will* be routed past here. */ | |
4506 | ||
4507 | timevar_push (TV_SYMOUT); | |
888bd5c2 | 4508 | if (!DECL_IGNORED_P (current_function_decl)) |
4509 | debug_hooks->function_decl (current_function_decl); | |
77fce4cd | 4510 | timevar_pop (TV_SYMOUT); |
d544ceff | 4511 | |
4512 | /* Release the blocks that are linked to DECL_INITIAL() to free the memory. */ | |
4513 | DECL_INITIAL (current_function_decl) = error_mark_node; | |
4514 | ||
64c2e9b0 | 4515 | if (DECL_STATIC_CONSTRUCTOR (current_function_decl) |
4516 | && targetm.have_ctors_dtors) | |
4517 | targetm.asm_out.constructor (XEXP (DECL_RTL (current_function_decl), 0), | |
4518 | decl_init_priority_lookup | |
4519 | (current_function_decl)); | |
4520 | if (DECL_STATIC_DESTRUCTOR (current_function_decl) | |
4521 | && targetm.have_ctors_dtors) | |
4522 | targetm.asm_out.destructor (XEXP (DECL_RTL (current_function_decl), 0), | |
4523 | decl_fini_priority_lookup | |
4524 | (current_function_decl)); | |
2a1990e9 | 4525 | return 0; |
77fce4cd | 4526 | } |
4527 | ||
cbe8bda8 | 4528 | namespace { |
4529 | ||
4530 | const pass_data pass_data_final = | |
77fce4cd | 4531 | { |
cbe8bda8 | 4532 | RTL_PASS, /* type */ |
4533 | "final", /* name */ | |
4534 | OPTGROUP_NONE, /* optinfo_flags */ | |
cbe8bda8 | 4535 | TV_FINAL, /* tv_id */ |
4536 | 0, /* properties_required */ | |
4537 | 0, /* properties_provided */ | |
4538 | 0, /* properties_destroyed */ | |
4539 | 0, /* todo_flags_start */ | |
4540 | 0, /* todo_flags_finish */ | |
77fce4cd | 4541 | }; |
4542 | ||
cbe8bda8 | 4543 | class pass_final : public rtl_opt_pass |
4544 | { | |
4545 | public: | |
9af5ce0c | 4546 | pass_final (gcc::context *ctxt) |
4547 | : rtl_opt_pass (pass_data_final, ctxt) | |
cbe8bda8 | 4548 | {} |
4549 | ||
4550 | /* opt_pass methods: */ | |
65b0537f | 4551 | virtual unsigned int execute (function *) { return rest_of_handle_final (); } |
cbe8bda8 | 4552 | |
4553 | }; // class pass_final | |
4554 | ||
4555 | } // anon namespace | |
4556 | ||
4557 | rtl_opt_pass * | |
4558 | make_pass_final (gcc::context *ctxt) | |
4559 | { | |
4560 | return new pass_final (ctxt); | |
4561 | } | |
4562 | ||
77fce4cd | 4563 | |
2a1990e9 | 4564 | static unsigned int |
77fce4cd | 4565 | rest_of_handle_shorten_branches (void) |
4566 | { | |
4567 | /* Shorten branches. */ | |
4568 | shorten_branches (get_insns ()); | |
2a1990e9 | 4569 | return 0; |
77fce4cd | 4570 | } |
312f4798 | 4571 | |
cbe8bda8 | 4572 | namespace { |
4573 | ||
4574 | const pass_data pass_data_shorten_branches = | |
77fce4cd | 4575 | { |
cbe8bda8 | 4576 | RTL_PASS, /* type */ |
4577 | "shorten", /* name */ | |
4578 | OPTGROUP_NONE, /* optinfo_flags */ | |
cbe8bda8 | 4579 | TV_SHORTEN_BRANCH, /* tv_id */ |
4580 | 0, /* properties_required */ | |
4581 | 0, /* properties_provided */ | |
4582 | 0, /* properties_destroyed */ | |
4583 | 0, /* todo_flags_start */ | |
4584 | 0, /* todo_flags_finish */ | |
77fce4cd | 4585 | }; |
4586 | ||
cbe8bda8 | 4587 | class pass_shorten_branches : public rtl_opt_pass |
4588 | { | |
4589 | public: | |
9af5ce0c | 4590 | pass_shorten_branches (gcc::context *ctxt) |
4591 | : rtl_opt_pass (pass_data_shorten_branches, ctxt) | |
cbe8bda8 | 4592 | {} |
4593 | ||
4594 | /* opt_pass methods: */ | |
65b0537f | 4595 | virtual unsigned int execute (function *) |
4596 | { | |
4597 | return rest_of_handle_shorten_branches (); | |
4598 | } | |
cbe8bda8 | 4599 | |
4600 | }; // class pass_shorten_branches | |
4601 | ||
4602 | } // anon namespace | |
4603 | ||
4604 | rtl_opt_pass * | |
4605 | make_pass_shorten_branches (gcc::context *ctxt) | |
4606 | { | |
4607 | return new pass_shorten_branches (ctxt); | |
4608 | } | |
4609 | ||
77fce4cd | 4610 | |
2a1990e9 | 4611 | static unsigned int |
77fce4cd | 4612 | rest_of_clean_state (void) |
4613 | { | |
82f53c1f | 4614 | rtx_insn *insn, *next; |
71278019 | 4615 | FILE *final_output = NULL; |
4616 | int save_unnumbered = flag_dump_unnumbered; | |
4617 | int save_noaddr = flag_dump_noaddr; | |
4618 | ||
4619 | if (flag_dump_final_insns) | |
4620 | { | |
4621 | final_output = fopen (flag_dump_final_insns, "a"); | |
4622 | if (!final_output) | |
4623 | { | |
8fb69344 | 4624 | error ("could not open final insn dump file %qs: %m", |
4625 | flag_dump_final_insns); | |
71278019 | 4626 | flag_dump_final_insns = NULL; |
4627 | } | |
4628 | else | |
4629 | { | |
71278019 | 4630 | flag_dump_noaddr = flag_dump_unnumbered = 1; |
45b2f957 | 4631 | if (flag_compare_debug_opt || flag_compare_debug) |
4632 | dump_flags |= TDF_NOUID; | |
55b028fe | 4633 | dump_function_header (final_output, current_function_decl, |
4634 | dump_flags); | |
090bd40b | 4635 | final_insns_dump_p = true; |
71278019 | 4636 | |
4637 | for (insn = get_insns (); insn; insn = NEXT_INSN (insn)) | |
4638 | if (LABEL_P (insn)) | |
4639 | INSN_UID (insn) = CODE_LABEL_NUMBER (insn); | |
4640 | else | |
9221ec44 | 4641 | { |
4642 | if (NOTE_P (insn)) | |
4643 | set_block_for_insn (insn, NULL); | |
4644 | INSN_UID (insn) = 0; | |
4645 | } | |
71278019 | 4646 | } |
4647 | } | |
77fce4cd | 4648 | |
4649 | /* It is very important to decompose the RTL instruction chain here: | |
4650 | debug information keeps pointing into CODE_LABEL insns inside the function | |
4651 | body. If these remain pointing to the other insns, we end up preserving | |
4652 | whole RTL chain and attached detailed debug info in memory. */ | |
4653 | for (insn = get_insns (); insn; insn = next) | |
4654 | { | |
4655 | next = NEXT_INSN (insn); | |
4a57a2e8 | 4656 | SET_NEXT_INSN (insn) = NULL; |
4657 | SET_PREV_INSN (insn) = NULL; | |
71278019 | 4658 | |
4659 | if (final_output | |
4660 | && (!NOTE_P (insn) || | |
4661 | (NOTE_KIND (insn) != NOTE_INSN_VAR_LOCATION | |
4143d08b | 4662 | && NOTE_KIND (insn) != NOTE_INSN_CALL_ARG_LOCATION |
71278019 | 4663 | && NOTE_KIND (insn) != NOTE_INSN_BLOCK_BEG |
63f5ad44 | 4664 | && NOTE_KIND (insn) != NOTE_INSN_BLOCK_END |
4665 | && NOTE_KIND (insn) != NOTE_INSN_DELETED_DEBUG_LABEL))) | |
71278019 | 4666 | print_rtl_single (final_output, insn); |
71278019 | 4667 | } |
4668 | ||
4669 | if (final_output) | |
4670 | { | |
4671 | flag_dump_noaddr = save_noaddr; | |
4672 | flag_dump_unnumbered = save_unnumbered; | |
090bd40b | 4673 | final_insns_dump_p = false; |
71278019 | 4674 | |
4675 | if (fclose (final_output)) | |
4676 | { | |
8fb69344 | 4677 | error ("could not close final insn dump file %qs: %m", |
4678 | flag_dump_final_insns); | |
71278019 | 4679 | flag_dump_final_insns = NULL; |
4680 | } | |
77fce4cd | 4681 | } |
4682 | ||
4683 | /* In case the function was not output, | |
4684 | don't leave any temporary anonymous types | |
4685 | queued up for sdb output. */ | |
4686 | #ifdef SDB_DEBUGGING_INFO | |
4687 | if (write_symbols == SDB_DEBUG) | |
4688 | sdbout_types (NULL_TREE); | |
4689 | #endif | |
4690 | ||
d743aba2 | 4691 | flag_rerun_cse_after_global_opts = 0; |
77fce4cd | 4692 | reload_completed = 0; |
4693 | epilogue_completed = 0; | |
3e6933a8 | 4694 | #ifdef STACK_REGS |
4695 | regstack_completed = 0; | |
4696 | #endif | |
77fce4cd | 4697 | |
4698 | /* Clear out the insn_length contents now that they are no | |
4699 | longer valid. */ | |
4700 | init_insn_lengths (); | |
4701 | ||
4702 | /* Show no temporary slots allocated. */ | |
4703 | init_temp_slots (); | |
4704 | ||
77fce4cd | 4705 | free_bb_for_insn (); |
4706 | ||
3a443843 | 4707 | delete_tree_ssa (); |
4708 | ||
9ced88d0 | 4709 | /* We can reduce stack alignment on call site only when we are sure that |
4710 | the function body just produced will be actually used in the final | |
4711 | executable. */ | |
4712 | if (decl_binds_to_current_def_p (current_function_decl)) | |
77fce4cd | 4713 | { |
9a27561f | 4714 | unsigned int pref = crtl->preferred_stack_boundary; |
edb7afe8 | 4715 | if (crtl->stack_alignment_needed > crtl->preferred_stack_boundary) |
4716 | pref = crtl->stack_alignment_needed; | |
35ee1c66 | 4717 | cgraph_node::rtl_info (current_function_decl) |
4718 | ->preferred_incoming_stack_boundary = pref; | |
77fce4cd | 4719 | } |
4720 | ||
4721 | /* Make sure volatile mem refs aren't considered valid operands for | |
4722 | arithmetic insns. We must call this here if this is a nested inline | |
4723 | function, since the above code leaves us in the init_recog state, | |
4724 | and the function context push/pop code does not save/restore volatile_ok. | |
4725 | ||
4726 | ??? Maybe it isn't necessary for expand_start_function to call this | |
4727 | anymore if we do it here? */ | |
4728 | ||
4729 | init_recog_no_volatile (); | |
4730 | ||
4731 | /* We're done with this function. Free up memory if we can. */ | |
4732 | free_after_parsing (cfun); | |
4733 | free_after_compilation (cfun); | |
2a1990e9 | 4734 | return 0; |
77fce4cd | 4735 | } |
4736 | ||
cbe8bda8 | 4737 | namespace { |
4738 | ||
4739 | const pass_data pass_data_clean_state = | |
77fce4cd | 4740 | { |
cbe8bda8 | 4741 | RTL_PASS, /* type */ |
4742 | "*clean_state", /* name */ | |
4743 | OPTGROUP_NONE, /* optinfo_flags */ | |
cbe8bda8 | 4744 | TV_FINAL, /* tv_id */ |
4745 | 0, /* properties_required */ | |
4746 | 0, /* properties_provided */ | |
4747 | PROP_rtl, /* properties_destroyed */ | |
4748 | 0, /* todo_flags_start */ | |
4749 | 0, /* todo_flags_finish */ | |
77fce4cd | 4750 | }; |
cbe8bda8 | 4751 | |
4752 | class pass_clean_state : public rtl_opt_pass | |
4753 | { | |
4754 | public: | |
9af5ce0c | 4755 | pass_clean_state (gcc::context *ctxt) |
4756 | : rtl_opt_pass (pass_data_clean_state, ctxt) | |
cbe8bda8 | 4757 | {} |
4758 | ||
4759 | /* opt_pass methods: */ | |
65b0537f | 4760 | virtual unsigned int execute (function *) |
4761 | { | |
4762 | return rest_of_clean_state (); | |
4763 | } | |
cbe8bda8 | 4764 | |
4765 | }; // class pass_clean_state | |
4766 | ||
4767 | } // anon namespace | |
4768 | ||
4769 | rtl_opt_pass * | |
4770 | make_pass_clean_state (gcc::context *ctxt) | |
4771 | { | |
4772 | return new pass_clean_state (ctxt); | |
4773 | } | |
9ac9a758 | 4774 | |
c85c0aaa | 4775 | /* Return true if INSN is a call to the the current function. */ |
4776 | ||
4777 | static bool | |
82f53c1f | 4778 | self_recursive_call_p (rtx_insn *insn) |
c85c0aaa | 4779 | { |
4780 | tree fndecl = get_call_fndecl (insn); | |
4781 | return (fndecl == current_function_decl | |
4782 | && decl_binds_to_current_def_p (fndecl)); | |
4783 | } | |
4784 | ||
9ac9a758 | 4785 | /* Collect hard register usage for the current function. */ |
4786 | ||
4787 | static void | |
4788 | collect_fn_hard_reg_usage (void) | |
4789 | { | |
82f53c1f | 4790 | rtx_insn *insn; |
e00f9348 | 4791 | #ifdef STACK_REGS |
9ac9a758 | 4792 | int i; |
e00f9348 | 4793 | #endif |
9ac9a758 | 4794 | struct cgraph_rtl_info *node; |
a9909cdd | 4795 | HARD_REG_SET function_used_regs; |
9ac9a758 | 4796 | |
4797 | /* ??? To be removed when all the ports have been fixed. */ | |
4798 | if (!targetm.call_fusage_contains_non_callee_clobbers) | |
4799 | return; | |
4800 | ||
a9909cdd | 4801 | CLEAR_HARD_REG_SET (function_used_regs); |
9ac9a758 | 4802 | |
4803 | for (insn = get_insns (); insn != NULL_RTX; insn = next_insn (insn)) | |
4804 | { | |
4805 | HARD_REG_SET insn_used_regs; | |
4806 | ||
4807 | if (!NONDEBUG_INSN_P (insn)) | |
4808 | continue; | |
4809 | ||
c85c0aaa | 4810 | if (CALL_P (insn) |
4811 | && !self_recursive_call_p (insn)) | |
df9a2dbd | 4812 | { |
4813 | if (!get_call_reg_set_usage (insn, &insn_used_regs, | |
4814 | call_used_reg_set)) | |
4815 | return; | |
9ac9a758 | 4816 | |
df9a2dbd | 4817 | IOR_HARD_REG_SET (function_used_regs, insn_used_regs); |
4818 | } | |
9ac9a758 | 4819 | |
df9a2dbd | 4820 | find_all_hard_reg_sets (insn, &insn_used_regs, false); |
a9909cdd | 4821 | IOR_HARD_REG_SET (function_used_regs, insn_used_regs); |
9ac9a758 | 4822 | } |
4823 | ||
4824 | /* Be conservative - mark fixed and global registers as used. */ | |
a9909cdd | 4825 | IOR_HARD_REG_SET (function_used_regs, fixed_reg_set); |
9ac9a758 | 4826 | |
4827 | #ifdef STACK_REGS | |
4828 | /* Handle STACK_REGS conservatively, since the df-framework does not | |
4829 | provide accurate information for them. */ | |
4830 | ||
4831 | for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++) | |
a9909cdd | 4832 | SET_HARD_REG_BIT (function_used_regs, i); |
9ac9a758 | 4833 | #endif |
4834 | ||
cda974e6 | 4835 | /* The information we have gathered is only interesting if it exposes a |
4836 | register from the call_used_regs that is not used in this function. */ | |
4837 | if (hard_reg_set_subset_p (call_used_reg_set, function_used_regs)) | |
4838 | return; | |
4839 | ||
35ee1c66 | 4840 | node = cgraph_node::rtl_info (current_function_decl); |
a9909cdd | 4841 | gcc_assert (node != NULL); |
4842 | ||
4843 | COPY_HARD_REG_SET (node->function_used_regs, function_used_regs); | |
9ac9a758 | 4844 | node->function_used_regs_valid = 1; |
4845 | } | |
4846 | ||
4847 | /* Get the declaration of the function called by INSN. */ | |
4848 | ||
4849 | static tree | |
82f53c1f | 4850 | get_call_fndecl (rtx_insn *insn) |
9ac9a758 | 4851 | { |
4852 | rtx note, datum; | |
4853 | ||
4854 | note = find_reg_note (insn, REG_CALL_DECL, NULL_RTX); | |
4855 | if (note == NULL_RTX) | |
4856 | return NULL_TREE; | |
4857 | ||
4858 | datum = XEXP (note, 0); | |
4859 | if (datum != NULL_RTX) | |
4860 | return SYMBOL_REF_DECL (datum); | |
4861 | ||
4862 | return NULL_TREE; | |
4863 | } | |
4864 | ||
4865 | /* Return the cgraph_rtl_info of the function called by INSN. Returns NULL for | |
4866 | call targets that can be overwritten. */ | |
4867 | ||
4868 | static struct cgraph_rtl_info * | |
82f53c1f | 4869 | get_call_cgraph_rtl_info (rtx_insn *insn) |
9ac9a758 | 4870 | { |
4871 | tree fndecl; | |
4872 | ||
4873 | if (insn == NULL_RTX) | |
4874 | return NULL; | |
4875 | ||
4876 | fndecl = get_call_fndecl (insn); | |
4877 | if (fndecl == NULL_TREE | |
4878 | || !decl_binds_to_current_def_p (fndecl)) | |
4879 | return NULL; | |
4880 | ||
35ee1c66 | 4881 | return cgraph_node::rtl_info (fndecl); |
9ac9a758 | 4882 | } |
4883 | ||
4884 | /* Find hard registers used by function call instruction INSN, and return them | |
4885 | in REG_SET. Return DEFAULT_SET in REG_SET if not found. */ | |
4886 | ||
4887 | bool | |
a5412d60 | 4888 | get_call_reg_set_usage (rtx_insn *insn, HARD_REG_SET *reg_set, |
9ac9a758 | 4889 | HARD_REG_SET default_set) |
4890 | { | |
4891 | if (flag_use_caller_save) | |
4892 | { | |
4893 | struct cgraph_rtl_info *node = get_call_cgraph_rtl_info (insn); | |
4894 | if (node != NULL | |
4895 | && node->function_used_regs_valid) | |
4896 | { | |
4897 | COPY_HARD_REG_SET (*reg_set, node->function_used_regs); | |
4898 | AND_HARD_REG_SET (*reg_set, default_set); | |
4899 | return true; | |
4900 | } | |
4901 | } | |
4902 | ||
4903 | COPY_HARD_REG_SET (*reg_set, default_set); | |
4904 | return false; | |
4905 | } |