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3cf2715d 1/* Convert RTL to assembler code and output it, for GNU compiler.
85ec4feb 2 Copyright (C) 1987-2018 Free Software Foundation, Inc.
3cf2715d 3
1322177d 4This file is part of GCC.
3cf2715d 5
1322177d
LB
6GCC is free software; you can redistribute it and/or modify it under
7the terms of the GNU General Public License as published by the Free
9dcd6f09 8Software Foundation; either version 3, or (at your option) any later
1322177d 9version.
3cf2715d 10
1322177d
LB
11GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12WARRANTY; without even the implied warranty of MERCHANTABILITY or
13FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14for more details.
3cf2715d
DE
15
16You should have received a copy of the GNU General Public License
9dcd6f09
NC
17along with GCC; see the file COPYING3. If not see
18<http://www.gnu.org/licenses/>. */
3cf2715d 19
3cf2715d
DE
20/* This is the final pass of the compiler.
21 It looks at the rtl code for a function and outputs assembler code.
22
23 Call `final_start_function' to output the assembler code for function entry,
24 `final' to output assembler code for some RTL code,
25 `final_end_function' to output assembler code for function exit.
26 If a function is compiled in several pieces, each piece is
27 output separately with `final'.
28
29 Some optimizations are also done at this level.
30 Move instructions that were made unnecessary by good register allocation
31 are detected and omitted from the output. (Though most of these
32 are removed by the last jump pass.)
33
34 Instructions to set the condition codes are omitted when it can be
35 seen that the condition codes already had the desired values.
36
37 In some cases it is sufficient if the inherited condition codes
38 have related values, but this may require the following insn
39 (the one that tests the condition codes) to be modified.
40
41 The code for the function prologue and epilogue are generated
08c148a8
NB
42 directly in assembler by the target functions function_prologue and
43 function_epilogue. Those instructions never exist as rtl. */
3cf2715d
DE
44
45#include "config.h"
01736018 46#define INCLUDE_ALGORITHM /* reverse */
670ee920 47#include "system.h"
4977bab6 48#include "coretypes.h"
c7131fb2 49#include "backend.h"
957060b5 50#include "target.h"
3cf2715d 51#include "rtl.h"
957060b5
AM
52#include "tree.h"
53#include "cfghooks.h"
c7131fb2 54#include "df.h"
4d0cdd0c 55#include "memmodel.h"
6baf1cc8 56#include "tm_p.h"
3cf2715d 57#include "insn-config.h"
957060b5
AM
58#include "regs.h"
59#include "emit-rtl.h"
3cf2715d 60#include "recog.h"
957060b5 61#include "cgraph.h"
957060b5 62#include "tree-pretty-print.h" /* for dump_function_header */
957060b5
AM
63#include "varasm.h"
64#include "insn-attr.h"
3cf2715d
DE
65#include "conditions.h"
66#include "flags.h"
3cf2715d 67#include "output.h"
3d195391 68#include "except.h"
0cbd9993
MLI
69#include "rtl-error.h"
70#include "toplev.h" /* exact_log2, floor_log2 */
d6f4ec51 71#include "reload.h"
ab87f8c8 72#include "intl.h"
60393bbc 73#include "cfgrtl.h"
a5a42b92 74#include "debug.h"
ef330312 75#include "tree-pass.h"
442b4905 76#include "tree-ssa.h"
edbed3d3
JH
77#include "cfgloop.h"
78#include "params.h"
314e6352
ML
79#include "stringpool.h"
80#include "attribs.h"
ef1b3fda 81#include "asan.h"
effb8a26 82#include "rtl-iter.h"
013a8899 83#include "print-rtl.h"
3cf2715d 84
440aabf8 85#ifdef XCOFF_DEBUGGING_INFO
957060b5 86#include "xcoffout.h" /* Needed for external data declarations. */
440aabf8
NB
87#endif
88
76ead72b 89#include "dwarf2out.h"
76ead72b 90
6a08f7b3
DP
91#ifdef DBX_DEBUGGING_INFO
92#include "dbxout.h"
93#endif
94
906668bb
BS
95/* Most ports that aren't using cc0 don't need to define CC_STATUS_INIT.
96 So define a null default for it to save conditionalization later. */
3cf2715d
DE
97#ifndef CC_STATUS_INIT
98#define CC_STATUS_INIT
99#endif
100
3cf2715d
DE
101/* Is the given character a logical line separator for the assembler? */
102#ifndef IS_ASM_LOGICAL_LINE_SEPARATOR
980d8882 103#define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) ((C) == ';')
3cf2715d
DE
104#endif
105
75197b37
BS
106#ifndef JUMP_TABLES_IN_TEXT_SECTION
107#define JUMP_TABLES_IN_TEXT_SECTION 0
108#endif
109
589fe865 110/* Bitflags used by final_scan_insn. */
70aacc97
JJ
111#define SEEN_NOTE 1
112#define SEEN_EMITTED 2
bd2b9f1e 113#define SEEN_NEXT_VIEW 4
589fe865 114
3cf2715d 115/* Last insn processed by final_scan_insn. */
fa7af581
DM
116static rtx_insn *debug_insn;
117rtx_insn *current_output_insn;
3cf2715d
DE
118
119/* Line number of last NOTE. */
120static int last_linenum;
121
497b7c47
JJ
122/* Column number of last NOTE. */
123static int last_columnnum;
124
6c52e687
CC
125/* Last discriminator written to assembly. */
126static int last_discriminator;
127
128/* Discriminator of current block. */
129static int discriminator;
130
eac40081
RK
131/* Highest line number in current block. */
132static int high_block_linenum;
133
134/* Likewise for function. */
135static int high_function_linenum;
136
3cf2715d 137/* Filename of last NOTE. */
3cce094d 138static const char *last_filename;
3cf2715d 139
497b7c47 140/* Override filename, line and column number. */
d752cfdb
JJ
141static const char *override_filename;
142static int override_linenum;
497b7c47 143static int override_columnnum;
d752cfdb 144
b8176fe4
EB
145/* Whether to force emission of a line note before the next insn. */
146static bool force_source_line = false;
b0efb46b 147
5f2f0edd 148extern const int length_unit_log; /* This is defined in insn-attrtab.c. */
fc470718 149
3cf2715d 150/* Nonzero while outputting an `asm' with operands.
535a42b1 151 This means that inconsistencies are the user's fault, so don't die.
3cf2715d 152 The precise value is the insn being output, to pass to error_for_asm. */
1c22488e 153const rtx_insn *this_is_asm_operands;
3cf2715d
DE
154
155/* Number of operands of this insn, for an `asm' with operands. */
22bf4422 156static unsigned int insn_noperands;
3cf2715d
DE
157
158/* Compare optimization flag. */
159
160static rtx last_ignored_compare = 0;
161
3cf2715d
DE
162/* Assign a unique number to each insn that is output.
163 This can be used to generate unique local labels. */
164
165static int insn_counter = 0;
166
3cf2715d
DE
167/* This variable contains machine-dependent flags (defined in tm.h)
168 set and examined by output routines
169 that describe how to interpret the condition codes properly. */
170
171CC_STATUS cc_status;
172
173/* During output of an insn, this contains a copy of cc_status
174 from before the insn. */
175
176CC_STATUS cc_prev_status;
3cf2715d 177
18c038b9 178/* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */
3cf2715d
DE
179
180static int block_depth;
181
182/* Nonzero if have enabled APP processing of our assembler output. */
183
184static int app_on;
185
186/* If we are outputting an insn sequence, this contains the sequence rtx.
187 Zero otherwise. */
188
b32d5189 189rtx_sequence *final_sequence;
3cf2715d
DE
190
191#ifdef ASSEMBLER_DIALECT
192
193/* Number of the assembler dialect to use, starting at 0. */
194static int dialect_number;
195#endif
196
afe48e06
RH
197/* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */
198rtx current_insn_predicate;
afe48e06 199
7365279f 200/* True if printing into -fdump-final-insns= dump. */
6ca5d1f6
JJ
201bool final_insns_dump_p;
202
ddd84654
JJ
203/* True if profile_function should be called, but hasn't been called yet. */
204static bool need_profile_function;
205
6cf9ac28 206static int asm_insn_count (rtx);
6cf9ac28
AJ
207static void profile_function (FILE *);
208static void profile_after_prologue (FILE *);
fa7af581 209static bool notice_source_line (rtx_insn *, bool *);
6fb5fa3c 210static rtx walk_alter_subreg (rtx *, bool *);
6cf9ac28 211static void output_asm_name (void);
fa7af581 212static void output_alternate_entry_point (FILE *, rtx_insn *);
6cf9ac28
AJ
213static tree get_mem_expr_from_op (rtx, int *);
214static void output_asm_operand_names (rtx *, int *, int);
e9a25f70 215#ifdef LEAF_REGISTERS
fa7af581 216static void leaf_renumber_regs (rtx_insn *);
e9a25f70 217#endif
f1e52ed6 218#if HAVE_cc0
6cf9ac28 219static int alter_cond (rtx);
e9a25f70 220#endif
6cf9ac28 221static int align_fuzz (rtx, rtx, int, unsigned);
27c07cc5 222static void collect_fn_hard_reg_usage (void);
fa7af581 223static tree get_call_fndecl (rtx_insn *);
3cf2715d
DE
224\f
225/* Initialize data in final at the beginning of a compilation. */
226
227void
6cf9ac28 228init_final (const char *filename ATTRIBUTE_UNUSED)
3cf2715d 229{
3cf2715d 230 app_on = 0;
3cf2715d
DE
231 final_sequence = 0;
232
233#ifdef ASSEMBLER_DIALECT
234 dialect_number = ASSEMBLER_DIALECT;
235#endif
236}
237
08c148a8 238/* Default target function prologue and epilogue assembler output.
b9f22704 239
08c148a8
NB
240 If not overridden for epilogue code, then the function body itself
241 contains return instructions wherever needed. */
242void
42776416 243default_function_pro_epilogue (FILE *)
08c148a8
NB
244{
245}
246
14d11d40
IS
247void
248default_function_switched_text_sections (FILE *file ATTRIBUTE_UNUSED,
249 tree decl ATTRIBUTE_UNUSED,
250 bool new_is_cold ATTRIBUTE_UNUSED)
251{
252}
253
b4c25db2
NB
254/* Default target hook that outputs nothing to a stream. */
255void
6cf9ac28 256no_asm_to_stream (FILE *file ATTRIBUTE_UNUSED)
b4c25db2
NB
257{
258}
259
3cf2715d
DE
260/* Enable APP processing of subsequent output.
261 Used before the output from an `asm' statement. */
262
263void
6cf9ac28 264app_enable (void)
3cf2715d
DE
265{
266 if (! app_on)
267 {
51723711 268 fputs (ASM_APP_ON, asm_out_file);
3cf2715d
DE
269 app_on = 1;
270 }
271}
272
273/* Disable APP processing of subsequent output.
274 Called from varasm.c before most kinds of output. */
275
276void
6cf9ac28 277app_disable (void)
3cf2715d
DE
278{
279 if (app_on)
280 {
51723711 281 fputs (ASM_APP_OFF, asm_out_file);
3cf2715d
DE
282 app_on = 0;
283 }
284}
285\f
f5d927c0 286/* Return the number of slots filled in the current
3cf2715d
DE
287 delayed branch sequence (we don't count the insn needing the
288 delay slot). Zero if not in a delayed branch sequence. */
289
3cf2715d 290int
6cf9ac28 291dbr_sequence_length (void)
3cf2715d
DE
292{
293 if (final_sequence != 0)
294 return XVECLEN (final_sequence, 0) - 1;
295 else
296 return 0;
297}
3cf2715d
DE
298\f
299/* The next two pages contain routines used to compute the length of an insn
300 and to shorten branches. */
301
302/* Arrays for insn lengths, and addresses. The latter is referenced by
303 `insn_current_length'. */
304
addd7df6 305static int *insn_lengths;
9d98a694 306
9771b263 307vec<int> insn_addresses_;
3cf2715d 308
ea3cbda5
R
309/* Max uid for which the above arrays are valid. */
310static int insn_lengths_max_uid;
311
3cf2715d
DE
312/* Address of insn being processed. Used by `insn_current_length'. */
313int insn_current_address;
314
fc470718
R
315/* Address of insn being processed in previous iteration. */
316int insn_last_address;
317
d6a7951f 318/* known invariant alignment of insn being processed. */
fc470718
R
319int insn_current_align;
320
95707627
R
321/* After shorten_branches, for any insn, uid_align[INSN_UID (insn)]
322 gives the next following alignment insn that increases the known
323 alignment, or NULL_RTX if there is no such insn.
324 For any alignment obtained this way, we can again index uid_align with
325 its uid to obtain the next following align that in turn increases the
326 alignment, till we reach NULL_RTX; the sequence obtained this way
327 for each insn we'll call the alignment chain of this insn in the following
328 comments. */
329
f5d927c0
KH
330struct label_alignment
331{
9e423e6d
JW
332 short alignment;
333 short max_skip;
334};
335
336static rtx *uid_align;
337static int *uid_shuid;
338static struct label_alignment *label_align;
95707627 339
3cf2715d
DE
340/* Indicate that branch shortening hasn't yet been done. */
341
342void
6cf9ac28 343init_insn_lengths (void)
3cf2715d 344{
95707627
R
345 if (uid_shuid)
346 {
347 free (uid_shuid);
348 uid_shuid = 0;
349 }
350 if (insn_lengths)
351 {
352 free (insn_lengths);
353 insn_lengths = 0;
ea3cbda5 354 insn_lengths_max_uid = 0;
95707627 355 }
d327457f
JR
356 if (HAVE_ATTR_length)
357 INSN_ADDRESSES_FREE ();
95707627
R
358 if (uid_align)
359 {
360 free (uid_align);
361 uid_align = 0;
362 }
3cf2715d
DE
363}
364
365/* Obtain the current length of an insn. If branch shortening has been done,
6fc0bb99 366 get its actual length. Otherwise, use FALLBACK_FN to calculate the
070a7956 367 length. */
4df199d1 368static int
84034c69 369get_attr_length_1 (rtx_insn *insn, int (*fallback_fn) (rtx_insn *))
3cf2715d 370{
3cf2715d
DE
371 rtx body;
372 int i;
373 int length = 0;
374
d327457f
JR
375 if (!HAVE_ATTR_length)
376 return 0;
377
ea3cbda5 378 if (insn_lengths_max_uid > INSN_UID (insn))
3cf2715d
DE
379 return insn_lengths[INSN_UID (insn)];
380 else
381 switch (GET_CODE (insn))
382 {
383 case NOTE:
384 case BARRIER:
385 case CODE_LABEL:
b5b8b0ac 386 case DEBUG_INSN:
3cf2715d
DE
387 return 0;
388
389 case CALL_INSN:
3cf2715d 390 case JUMP_INSN:
39718607 391 length = fallback_fn (insn);
3cf2715d
DE
392 break;
393
394 case INSN:
395 body = PATTERN (insn);
396 if (GET_CODE (body) == USE || GET_CODE (body) == CLOBBER)
397 return 0;
398
399 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
070a7956 400 length = asm_insn_count (body) * fallback_fn (insn);
e429a50b
DM
401 else if (rtx_sequence *seq = dyn_cast <rtx_sequence *> (body))
402 for (i = 0; i < seq->len (); i++)
403 length += get_attr_length_1 (seq->insn (i), fallback_fn);
3cf2715d 404 else
070a7956 405 length = fallback_fn (insn);
e9a25f70
JL
406 break;
407
408 default:
409 break;
3cf2715d
DE
410 }
411
412#ifdef ADJUST_INSN_LENGTH
413 ADJUST_INSN_LENGTH (insn, length);
414#endif
415 return length;
3cf2715d 416}
070a7956
R
417
418/* Obtain the current length of an insn. If branch shortening has been done,
419 get its actual length. Otherwise, get its maximum length. */
420int
84034c69 421get_attr_length (rtx_insn *insn)
070a7956
R
422{
423 return get_attr_length_1 (insn, insn_default_length);
424}
425
426/* Obtain the current length of an insn. If branch shortening has been done,
427 get its actual length. Otherwise, get its minimum length. */
428int
84034c69 429get_attr_min_length (rtx_insn *insn)
070a7956
R
430{
431 return get_attr_length_1 (insn, insn_min_length);
432}
3cf2715d 433\f
fc470718
R
434/* Code to handle alignment inside shorten_branches. */
435
436/* Here is an explanation how the algorithm in align_fuzz can give
437 proper results:
438
439 Call a sequence of instructions beginning with alignment point X
440 and continuing until the next alignment point `block X'. When `X'
f5d927c0 441 is used in an expression, it means the alignment value of the
fc470718 442 alignment point.
f5d927c0 443
fc470718
R
444 Call the distance between the start of the first insn of block X, and
445 the end of the last insn of block X `IX', for the `inner size of X'.
446 This is clearly the sum of the instruction lengths.
f5d927c0 447
fc470718
R
448 Likewise with the next alignment-delimited block following X, which we
449 shall call block Y.
f5d927c0 450
fc470718
R
451 Call the distance between the start of the first insn of block X, and
452 the start of the first insn of block Y `OX', for the `outer size of X'.
f5d927c0 453
fc470718 454 The estimated padding is then OX - IX.
f5d927c0 455
fc470718 456 OX can be safely estimated as
f5d927c0 457
fc470718
R
458 if (X >= Y)
459 OX = round_up(IX, Y)
460 else
461 OX = round_up(IX, X) + Y - X
f5d927c0 462
fc470718
R
463 Clearly est(IX) >= real(IX), because that only depends on the
464 instruction lengths, and those being overestimated is a given.
f5d927c0 465
fc470718
R
466 Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so
467 we needn't worry about that when thinking about OX.
f5d927c0 468
fc470718
R
469 When X >= Y, the alignment provided by Y adds no uncertainty factor
470 for branch ranges starting before X, so we can just round what we have.
471 But when X < Y, we don't know anything about the, so to speak,
472 `middle bits', so we have to assume the worst when aligning up from an
473 address mod X to one mod Y, which is Y - X. */
474
475#ifndef LABEL_ALIGN
efa3896a 476#define LABEL_ALIGN(LABEL) align_labels_log
fc470718
R
477#endif
478
479#ifndef LOOP_ALIGN
efa3896a 480#define LOOP_ALIGN(LABEL) align_loops_log
fc470718
R
481#endif
482
483#ifndef LABEL_ALIGN_AFTER_BARRIER
340f7e7c 484#define LABEL_ALIGN_AFTER_BARRIER(LABEL) 0
fc470718
R
485#endif
486
247a370b
JH
487#ifndef JUMP_ALIGN
488#define JUMP_ALIGN(LABEL) align_jumps_log
489#endif
490
ad0c4c36 491int
9158a0d8 492default_label_align_after_barrier_max_skip (rtx_insn *insn ATTRIBUTE_UNUSED)
ad0c4c36
DD
493{
494 return 0;
495}
496
497int
9158a0d8 498default_loop_align_max_skip (rtx_insn *insn ATTRIBUTE_UNUSED)
ad0c4c36
DD
499{
500 return align_loops_max_skip;
501}
502
503int
9158a0d8 504default_label_align_max_skip (rtx_insn *insn ATTRIBUTE_UNUSED)
ad0c4c36
DD
505{
506 return align_labels_max_skip;
507}
508
509int
9158a0d8 510default_jump_align_max_skip (rtx_insn *insn ATTRIBUTE_UNUSED)
ad0c4c36
DD
511{
512 return align_jumps_max_skip;
513}
9e423e6d 514
fc470718 515#ifndef ADDR_VEC_ALIGN
ca3075bd 516static int
d305ca88 517final_addr_vec_align (rtx_jump_table_data *addr_vec)
fc470718 518{
d305ca88 519 int align = GET_MODE_SIZE (addr_vec->get_data_mode ());
fc470718
R
520
521 if (align > BIGGEST_ALIGNMENT / BITS_PER_UNIT)
522 align = BIGGEST_ALIGNMENT / BITS_PER_UNIT;
2a841588 523 return exact_log2 (align);
fc470718
R
524
525}
f5d927c0 526
fc470718
R
527#define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC)
528#endif
529
530#ifndef INSN_LENGTH_ALIGNMENT
531#define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log
532#endif
533
fc470718
R
534#define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)])
535
de7987a6 536static int min_labelno, max_labelno;
fc470718
R
537
538#define LABEL_TO_ALIGNMENT(LABEL) \
9e423e6d
JW
539 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment)
540
541#define LABEL_TO_MAX_SKIP(LABEL) \
542 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip)
fc470718
R
543
544/* For the benefit of port specific code do this also as a function. */
f5d927c0 545
fc470718 546int
6cf9ac28 547label_to_alignment (rtx label)
fc470718 548{
40a8f07a
JJ
549 if (CODE_LABEL_NUMBER (label) <= max_labelno)
550 return LABEL_TO_ALIGNMENT (label);
551 return 0;
552}
553
554int
555label_to_max_skip (rtx label)
556{
557 if (CODE_LABEL_NUMBER (label) <= max_labelno)
558 return LABEL_TO_MAX_SKIP (label);
559 return 0;
fc470718
R
560}
561
fc470718
R
562/* The differences in addresses
563 between a branch and its target might grow or shrink depending on
564 the alignment the start insn of the range (the branch for a forward
565 branch or the label for a backward branch) starts out on; if these
566 differences are used naively, they can even oscillate infinitely.
567 We therefore want to compute a 'worst case' address difference that
568 is independent of the alignment the start insn of the range end
569 up on, and that is at least as large as the actual difference.
570 The function align_fuzz calculates the amount we have to add to the
571 naively computed difference, by traversing the part of the alignment
572 chain of the start insn of the range that is in front of the end insn
573 of the range, and considering for each alignment the maximum amount
574 that it might contribute to a size increase.
575
576 For casesi tables, we also want to know worst case minimum amounts of
577 address difference, in case a machine description wants to introduce
578 some common offset that is added to all offsets in a table.
d6a7951f 579 For this purpose, align_fuzz with a growth argument of 0 computes the
fc470718
R
580 appropriate adjustment. */
581
fc470718
R
582/* Compute the maximum delta by which the difference of the addresses of
583 START and END might grow / shrink due to a different address for start
584 which changes the size of alignment insns between START and END.
585 KNOWN_ALIGN_LOG is the alignment known for START.
586 GROWTH should be ~0 if the objective is to compute potential code size
587 increase, and 0 if the objective is to compute potential shrink.
588 The return value is undefined for any other value of GROWTH. */
f5d927c0 589
ca3075bd 590static int
6cf9ac28 591align_fuzz (rtx start, rtx end, int known_align_log, unsigned int growth)
fc470718
R
592{
593 int uid = INSN_UID (start);
594 rtx align_label;
595 int known_align = 1 << known_align_log;
596 int end_shuid = INSN_SHUID (end);
597 int fuzz = 0;
598
599 for (align_label = uid_align[uid]; align_label; align_label = uid_align[uid])
600 {
601 int align_addr, new_align;
602
603 uid = INSN_UID (align_label);
9d98a694 604 align_addr = INSN_ADDRESSES (uid) - insn_lengths[uid];
fc470718
R
605 if (uid_shuid[uid] > end_shuid)
606 break;
607 known_align_log = LABEL_TO_ALIGNMENT (align_label);
608 new_align = 1 << known_align_log;
609 if (new_align < known_align)
610 continue;
611 fuzz += (-align_addr ^ growth) & (new_align - known_align);
612 known_align = new_align;
613 }
614 return fuzz;
615}
616
617/* Compute a worst-case reference address of a branch so that it
618 can be safely used in the presence of aligned labels. Since the
619 size of the branch itself is unknown, the size of the branch is
620 not included in the range. I.e. for a forward branch, the reference
621 address is the end address of the branch as known from the previous
622 branch shortening pass, minus a value to account for possible size
623 increase due to alignment. For a backward branch, it is the start
624 address of the branch as known from the current pass, plus a value
625 to account for possible size increase due to alignment.
626 NB.: Therefore, the maximum offset allowed for backward branches needs
627 to exclude the branch size. */
f5d927c0 628
fc470718 629int
8ba24b7b 630insn_current_reference_address (rtx_insn *branch)
fc470718 631{
e67d1102 632 rtx dest;
5527bf14
RH
633 int seq_uid;
634
635 if (! INSN_ADDRESSES_SET_P ())
636 return 0;
637
e67d1102 638 rtx_insn *seq = NEXT_INSN (PREV_INSN (branch));
5527bf14 639 seq_uid = INSN_UID (seq);
4b4bf941 640 if (!JUMP_P (branch))
fc470718
R
641 /* This can happen for example on the PA; the objective is to know the
642 offset to address something in front of the start of the function.
643 Thus, we can treat it like a backward branch.
644 We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than
645 any alignment we'd encounter, so we skip the call to align_fuzz. */
646 return insn_current_address;
647 dest = JUMP_LABEL (branch);
5527bf14 648
b9f22704 649 /* BRANCH has no proper alignment chain set, so use SEQ.
afc6898e
BS
650 BRANCH also has no INSN_SHUID. */
651 if (INSN_SHUID (seq) < INSN_SHUID (dest))
fc470718 652 {
f5d927c0 653 /* Forward branch. */
fc470718 654 return (insn_last_address + insn_lengths[seq_uid]
26024475 655 - align_fuzz (seq, dest, length_unit_log, ~0));
fc470718
R
656 }
657 else
658 {
f5d927c0 659 /* Backward branch. */
fc470718 660 return (insn_current_address
923f7cf9 661 + align_fuzz (dest, seq, length_unit_log, ~0));
fc470718
R
662 }
663}
fc470718 664\f
6786ba1a 665/* Compute branch alignments based on CFG profile. */
65727068 666
e855c69d 667unsigned int
6cf9ac28 668compute_alignments (void)
247a370b 669{
247a370b 670 int log, max_skip, max_log;
e0082a72 671 basic_block bb;
247a370b
JH
672
673 if (label_align)
674 {
675 free (label_align);
676 label_align = 0;
677 }
678
679 max_labelno = max_label_num ();
680 min_labelno = get_first_label_num ();
5ed6ace5 681 label_align = XCNEWVEC (struct label_alignment, max_labelno - min_labelno + 1);
247a370b
JH
682
683 /* If not optimizing or optimizing for size, don't assign any alignments. */
efd8f750 684 if (! optimize || optimize_function_for_size_p (cfun))
c2924966 685 return 0;
247a370b 686
edbed3d3
JH
687 if (dump_file)
688 {
532aafad 689 dump_reg_info (dump_file);
edbed3d3
JH
690 dump_flow_info (dump_file, TDF_DETAILS);
691 flow_loops_dump (dump_file, NULL, 1);
edbed3d3 692 }
58082ff6 693 loop_optimizer_init (AVOID_CFG_MODIFICATIONS);
6786ba1a
JH
694 profile_count count_threshold = cfun->cfg->count_max.apply_scale
695 (1, PARAM_VALUE (PARAM_ALIGN_THRESHOLD));
edbed3d3
JH
696
697 if (dump_file)
6786ba1a
JH
698 {
699 fprintf (dump_file, "count_max: ");
700 cfun->cfg->count_max.dump (dump_file);
701 fprintf (dump_file, "\n");
702 }
11cd3bed 703 FOR_EACH_BB_FN (bb, cfun)
247a370b 704 {
fa7af581 705 rtx_insn *label = BB_HEAD (bb);
6786ba1a 706 bool has_fallthru = 0;
247a370b 707 edge e;
628f6a4e 708 edge_iterator ei;
247a370b 709
4b4bf941 710 if (!LABEL_P (label)
8bcf15f6 711 || optimize_bb_for_size_p (bb))
edbed3d3
JH
712 {
713 if (dump_file)
c3284718 714 fprintf (dump_file,
6786ba1a
JH
715 "BB %4i loop %2i loop_depth %2i skipped.\n",
716 bb->index,
e7a74006 717 bb->loop_father->num,
c3284718 718 bb_loop_depth (bb));
edbed3d3
JH
719 continue;
720 }
247a370b 721 max_log = LABEL_ALIGN (label);
ad0c4c36 722 max_skip = targetm.asm_out.label_align_max_skip (label);
6786ba1a
JH
723 profile_count fallthru_count = profile_count::zero ();
724 profile_count branch_count = profile_count::zero ();
247a370b 725
628f6a4e 726 FOR_EACH_EDGE (e, ei, bb->preds)
247a370b
JH
727 {
728 if (e->flags & EDGE_FALLTHRU)
6786ba1a 729 has_fallthru = 1, fallthru_count += e->count ();
247a370b 730 else
6786ba1a 731 branch_count += e->count ();
247a370b 732 }
edbed3d3
JH
733 if (dump_file)
734 {
6786ba1a
JH
735 fprintf (dump_file, "BB %4i loop %2i loop_depth"
736 " %2i fall ",
737 bb->index, bb->loop_father->num,
738 bb_loop_depth (bb));
739 fallthru_count.dump (dump_file);
740 fprintf (dump_file, " branch ");
741 branch_count.dump (dump_file);
edbed3d3
JH
742 if (!bb->loop_father->inner && bb->loop_father->num)
743 fprintf (dump_file, " inner_loop");
744 if (bb->loop_father->header == bb)
745 fprintf (dump_file, " loop_header");
746 fprintf (dump_file, "\n");
747 }
6786ba1a
JH
748 if (!fallthru_count.initialized_p () || !branch_count.initialized_p ())
749 continue;
247a370b 750
f63d1bf7 751 /* There are two purposes to align block with no fallthru incoming edge:
247a370b 752 1) to avoid fetch stalls when branch destination is near cache boundary
d6a7951f 753 2) to improve cache efficiency in case the previous block is not executed
247a370b
JH
754 (so it does not need to be in the cache).
755
756 We to catch first case, we align frequently executed blocks.
757 To catch the second, we align blocks that are executed more frequently
eaec9b3d 758 than the predecessor and the predecessor is likely to not be executed
247a370b
JH
759 when function is called. */
760
761 if (!has_fallthru
6786ba1a
JH
762 && (branch_count > count_threshold
763 || (bb->count > bb->prev_bb->count.apply_scale (10, 1)
7365279f 764 && (bb->prev_bb->count
6786ba1a
JH
765 <= ENTRY_BLOCK_PTR_FOR_FN (cfun)
766 ->count.apply_scale (1, 2)))))
247a370b
JH
767 {
768 log = JUMP_ALIGN (label);
edbed3d3 769 if (dump_file)
c3284718 770 fprintf (dump_file, " jump alignment added.\n");
247a370b
JH
771 if (max_log < log)
772 {
773 max_log = log;
ad0c4c36 774 max_skip = targetm.asm_out.jump_align_max_skip (label);
247a370b
JH
775 }
776 }
777 /* In case block is frequent and reached mostly by non-fallthru edge,
09da1532 778 align it. It is most likely a first block of loop. */
247a370b 779 if (has_fallthru
82b9c015
EB
780 && !(single_succ_p (bb)
781 && single_succ (bb) == EXIT_BLOCK_PTR_FOR_FN (cfun))
efd8f750 782 && optimize_bb_for_speed_p (bb)
6786ba1a
JH
783 && branch_count + fallthru_count > count_threshold
784 && (branch_count
785 > fallthru_count.apply_scale
786 (PARAM_VALUE (PARAM_ALIGN_LOOP_ITERATIONS), 1)))
247a370b
JH
787 {
788 log = LOOP_ALIGN (label);
edbed3d3 789 if (dump_file)
c3284718 790 fprintf (dump_file, " internal loop alignment added.\n");
247a370b
JH
791 if (max_log < log)
792 {
793 max_log = log;
ad0c4c36 794 max_skip = targetm.asm_out.loop_align_max_skip (label);
247a370b
JH
795 }
796 }
797 LABEL_TO_ALIGNMENT (label) = max_log;
798 LABEL_TO_MAX_SKIP (label) = max_skip;
799 }
edbed3d3 800
58082ff6
PH
801 loop_optimizer_finalize ();
802 free_dominance_info (CDI_DOMINATORS);
c2924966 803 return 0;
247a370b 804}
ef330312 805
5cf6635b
EB
806/* Grow the LABEL_ALIGN array after new labels are created. */
807
7365279f 808static void
5cf6635b
EB
809grow_label_align (void)
810{
811 int old = max_labelno;
812 int n_labels;
813 int n_old_labels;
814
815 max_labelno = max_label_num ();
816
817 n_labels = max_labelno - min_labelno + 1;
818 n_old_labels = old - min_labelno + 1;
819
820 label_align = XRESIZEVEC (struct label_alignment, label_align, n_labels);
821
822 /* Range of labels grows monotonically in the function. Failing here
823 means that the initialization of array got lost. */
824 gcc_assert (n_old_labels <= n_labels);
825
826 memset (label_align + n_old_labels, 0,
827 (n_labels - n_old_labels) * sizeof (struct label_alignment));
828}
829
830/* Update the already computed alignment information. LABEL_PAIRS is a vector
831 made up of pairs of labels for which the alignment information of the first
832 element will be copied from that of the second element. */
833
834void
835update_alignments (vec<rtx> &label_pairs)
836{
837 unsigned int i = 0;
33fd5699 838 rtx iter, label = NULL_RTX;
5cf6635b
EB
839
840 if (max_labelno != max_label_num ())
841 grow_label_align ();
842
843 FOR_EACH_VEC_ELT (label_pairs, i, iter)
844 if (i & 1)
845 {
846 LABEL_TO_ALIGNMENT (label) = LABEL_TO_ALIGNMENT (iter);
847 LABEL_TO_MAX_SKIP (label) = LABEL_TO_MAX_SKIP (iter);
848 }
849 else
850 label = iter;
851}
852
27a4cd48
DM
853namespace {
854
855const pass_data pass_data_compute_alignments =
ef330312 856{
27a4cd48
DM
857 RTL_PASS, /* type */
858 "alignments", /* name */
859 OPTGROUP_NONE, /* optinfo_flags */
27a4cd48
DM
860 TV_NONE, /* tv_id */
861 0, /* properties_required */
862 0, /* properties_provided */
863 0, /* properties_destroyed */
864 0, /* todo_flags_start */
3bea341f 865 0, /* todo_flags_finish */
ef330312
PB
866};
867
27a4cd48
DM
868class pass_compute_alignments : public rtl_opt_pass
869{
870public:
c3284718
RS
871 pass_compute_alignments (gcc::context *ctxt)
872 : rtl_opt_pass (pass_data_compute_alignments, ctxt)
27a4cd48
DM
873 {}
874
875 /* opt_pass methods: */
be55bfe6 876 virtual unsigned int execute (function *) { return compute_alignments (); }
27a4cd48
DM
877
878}; // class pass_compute_alignments
879
880} // anon namespace
881
882rtl_opt_pass *
883make_pass_compute_alignments (gcc::context *ctxt)
884{
885 return new pass_compute_alignments (ctxt);
886}
887
247a370b 888\f
3cf2715d
DE
889/* Make a pass over all insns and compute their actual lengths by shortening
890 any branches of variable length if possible. */
891
fc470718
R
892/* shorten_branches might be called multiple times: for example, the SH
893 port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG.
894 In order to do this, it needs proper length information, which it obtains
895 by calling shorten_branches. This cannot be collapsed with
d6a7951f 896 shorten_branches itself into a single pass unless we also want to integrate
fc470718
R
897 reorg.c, since the branch splitting exposes new instructions with delay
898 slots. */
899
3cf2715d 900void
49922db8 901shorten_branches (rtx_insn *first)
3cf2715d 902{
fa7af581 903 rtx_insn *insn;
fc470718
R
904 int max_uid;
905 int i;
fc470718 906 int max_log;
9e423e6d 907 int max_skip;
fc470718 908#define MAX_CODE_ALIGN 16
fa7af581 909 rtx_insn *seq;
3cf2715d 910 int something_changed = 1;
3cf2715d
DE
911 char *varying_length;
912 rtx body;
913 int uid;
5bbccd92 914 rtx align_tab[MAX_CODE_ALIGN + 1];
3cf2715d 915
3446405d
JH
916 /* Compute maximum UID and allocate label_align / uid_shuid. */
917 max_uid = get_max_uid ();
d9b6874b 918
471854f8 919 /* Free uid_shuid before reallocating it. */
07a1f795 920 free (uid_shuid);
b0efb46b 921
5ed6ace5 922 uid_shuid = XNEWVEC (int, max_uid);
25e22dc0 923
247a370b 924 if (max_labelno != max_label_num ())
5cf6635b 925 grow_label_align ();
247a370b 926
fc470718
R
927 /* Initialize label_align and set up uid_shuid to be strictly
928 monotonically rising with insn order. */
e2faec75
R
929 /* We use max_log here to keep track of the maximum alignment we want to
930 impose on the next CODE_LABEL (or the current one if we are processing
931 the CODE_LABEL itself). */
f5d927c0 932
9e423e6d
JW
933 max_log = 0;
934 max_skip = 0;
935
936 for (insn = get_insns (), i = 1; insn; insn = NEXT_INSN (insn))
fc470718
R
937 {
938 int log;
939
940 INSN_SHUID (insn) = i++;
2c3c49de 941 if (INSN_P (insn))
80838531 942 continue;
b0efb46b 943
d305ca88 944 if (rtx_code_label *label = dyn_cast <rtx_code_label *> (insn))
fc470718 945 {
247a370b 946 /* Merge in alignments computed by compute_alignments. */
d305ca88 947 log = LABEL_TO_ALIGNMENT (label);
247a370b
JH
948 if (max_log < log)
949 {
950 max_log = log;
d305ca88 951 max_skip = LABEL_TO_MAX_SKIP (label);
247a370b 952 }
fc470718 953
d305ca88
RS
954 rtx_jump_table_data *table = jump_table_for_label (label);
955 if (!table)
9e423e6d 956 {
d305ca88 957 log = LABEL_ALIGN (label);
0676c393
MM
958 if (max_log < log)
959 {
960 max_log = log;
d305ca88 961 max_skip = targetm.asm_out.label_align_max_skip (label);
0676c393 962 }
9e423e6d 963 }
75197b37
BS
964 /* ADDR_VECs only take room if read-only data goes into the text
965 section. */
0676c393
MM
966 if ((JUMP_TABLES_IN_TEXT_SECTION
967 || readonly_data_section == text_section)
d305ca88 968 && table)
0676c393 969 {
d305ca88 970 log = ADDR_VEC_ALIGN (table);
0676c393
MM
971 if (max_log < log)
972 {
973 max_log = log;
d305ca88 974 max_skip = targetm.asm_out.label_align_max_skip (label);
0676c393
MM
975 }
976 }
d305ca88
RS
977 LABEL_TO_ALIGNMENT (label) = max_log;
978 LABEL_TO_MAX_SKIP (label) = max_skip;
fc470718 979 max_log = 0;
9e423e6d 980 max_skip = 0;
fc470718 981 }
4b4bf941 982 else if (BARRIER_P (insn))
fc470718 983 {
fa7af581 984 rtx_insn *label;
fc470718 985
2c3c49de 986 for (label = insn; label && ! INSN_P (label);
fc470718 987 label = NEXT_INSN (label))
4b4bf941 988 if (LABEL_P (label))
fc470718
R
989 {
990 log = LABEL_ALIGN_AFTER_BARRIER (insn);
991 if (max_log < log)
9e423e6d
JW
992 {
993 max_log = log;
ad0c4c36 994 max_skip = targetm.asm_out.label_align_after_barrier_max_skip (label);
9e423e6d 995 }
fc470718
R
996 break;
997 }
998 }
fc470718 999 }
d327457f
JR
1000 if (!HAVE_ATTR_length)
1001 return;
fc470718
R
1002
1003 /* Allocate the rest of the arrays. */
5ed6ace5 1004 insn_lengths = XNEWVEC (int, max_uid);
ea3cbda5 1005 insn_lengths_max_uid = max_uid;
af035616
R
1006 /* Syntax errors can lead to labels being outside of the main insn stream.
1007 Initialize insn_addresses, so that we get reproducible results. */
9d98a694 1008 INSN_ADDRESSES_ALLOC (max_uid);
fc470718 1009
5ed6ace5 1010 varying_length = XCNEWVEC (char, max_uid);
fc470718
R
1011
1012 /* Initialize uid_align. We scan instructions
1013 from end to start, and keep in align_tab[n] the last seen insn
1014 that does an alignment of at least n+1, i.e. the successor
1015 in the alignment chain for an insn that does / has a known
1016 alignment of n. */
5ed6ace5 1017 uid_align = XCNEWVEC (rtx, max_uid);
fc470718 1018
5bbccd92 1019 for (i = MAX_CODE_ALIGN + 1; --i >= 0;)
fc470718
R
1020 align_tab[i] = NULL_RTX;
1021 seq = get_last_insn ();
33f7f353 1022 for (; seq; seq = PREV_INSN (seq))
fc470718
R
1023 {
1024 int uid = INSN_UID (seq);
1025 int log;
4b4bf941 1026 log = (LABEL_P (seq) ? LABEL_TO_ALIGNMENT (seq) : 0);
fc470718 1027 uid_align[uid] = align_tab[0];
fc470718
R
1028 if (log)
1029 {
1030 /* Found an alignment label. */
1031 uid_align[uid] = align_tab[log];
1032 for (i = log - 1; i >= 0; i--)
1033 align_tab[i] = seq;
1034 }
33f7f353 1035 }
f6df08e6
JR
1036
1037 /* When optimizing, we start assuming minimum length, and keep increasing
1038 lengths as we find the need for this, till nothing changes.
1039 When not optimizing, we start assuming maximum lengths, and
1040 do a single pass to update the lengths. */
1041 bool increasing = optimize != 0;
1042
33f7f353
JR
1043#ifdef CASE_VECTOR_SHORTEN_MODE
1044 if (optimize)
1045 {
1046 /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum
1047 label fields. */
1048
1049 int min_shuid = INSN_SHUID (get_insns ()) - 1;
1050 int max_shuid = INSN_SHUID (get_last_insn ()) + 1;
1051 int rel;
1052
1053 for (insn = first; insn != 0; insn = NEXT_INSN (insn))
fc470718 1054 {
33f7f353
JR
1055 rtx min_lab = NULL_RTX, max_lab = NULL_RTX, pat;
1056 int len, i, min, max, insn_shuid;
1057 int min_align;
1058 addr_diff_vec_flags flags;
1059
34f0d87a 1060 if (! JUMP_TABLE_DATA_P (insn)
33f7f353
JR
1061 || GET_CODE (PATTERN (insn)) != ADDR_DIFF_VEC)
1062 continue;
1063 pat = PATTERN (insn);
1064 len = XVECLEN (pat, 1);
0bccc606 1065 gcc_assert (len > 0);
33f7f353
JR
1066 min_align = MAX_CODE_ALIGN;
1067 for (min = max_shuid, max = min_shuid, i = len - 1; i >= 0; i--)
1068 {
1069 rtx lab = XEXP (XVECEXP (pat, 1, i), 0);
1070 int shuid = INSN_SHUID (lab);
1071 if (shuid < min)
1072 {
1073 min = shuid;
1074 min_lab = lab;
1075 }
1076 if (shuid > max)
1077 {
1078 max = shuid;
1079 max_lab = lab;
1080 }
1081 if (min_align > LABEL_TO_ALIGNMENT (lab))
1082 min_align = LABEL_TO_ALIGNMENT (lab);
1083 }
4c33cb26
R
1084 XEXP (pat, 2) = gen_rtx_LABEL_REF (Pmode, min_lab);
1085 XEXP (pat, 3) = gen_rtx_LABEL_REF (Pmode, max_lab);
33f7f353
JR
1086 insn_shuid = INSN_SHUID (insn);
1087 rel = INSN_SHUID (XEXP (XEXP (pat, 0), 0));
5921f276 1088 memset (&flags, 0, sizeof (flags));
33f7f353
JR
1089 flags.min_align = min_align;
1090 flags.base_after_vec = rel > insn_shuid;
1091 flags.min_after_vec = min > insn_shuid;
1092 flags.max_after_vec = max > insn_shuid;
1093 flags.min_after_base = min > rel;
1094 flags.max_after_base = max > rel;
1095 ADDR_DIFF_VEC_FLAGS (pat) = flags;
f6df08e6
JR
1096
1097 if (increasing)
1098 PUT_MODE (pat, CASE_VECTOR_SHORTEN_MODE (0, 0, pat));
fc470718
R
1099 }
1100 }
33f7f353 1101#endif /* CASE_VECTOR_SHORTEN_MODE */
3cf2715d 1102
3cf2715d 1103 /* Compute initial lengths, addresses, and varying flags for each insn. */
84034c69 1104 int (*length_fun) (rtx_insn *) = increasing ? insn_min_length : insn_default_length;
f6df08e6 1105
b816f339 1106 for (insn_current_address = 0, insn = first;
3cf2715d
DE
1107 insn != 0;
1108 insn_current_address += insn_lengths[uid], insn = NEXT_INSN (insn))
1109 {
1110 uid = INSN_UID (insn);
fc470718 1111
3cf2715d 1112 insn_lengths[uid] = 0;
fc470718 1113
4b4bf941 1114 if (LABEL_P (insn))
fc470718
R
1115 {
1116 int log = LABEL_TO_ALIGNMENT (insn);
1117 if (log)
1118 {
1119 int align = 1 << log;
ecb06768 1120 int new_address = (insn_current_address + align - 1) & -align;
fc470718 1121 insn_lengths[uid] = new_address - insn_current_address;
fc470718
R
1122 }
1123 }
1124
5a09edba 1125 INSN_ADDRESSES (uid) = insn_current_address + insn_lengths[uid];
f5d927c0 1126
4b4bf941 1127 if (NOTE_P (insn) || BARRIER_P (insn)
c3284718 1128 || LABEL_P (insn) || DEBUG_INSN_P (insn))
3cf2715d 1129 continue;
4654c0cf 1130 if (insn->deleted ())
04da53bd 1131 continue;
3cf2715d
DE
1132
1133 body = PATTERN (insn);
d305ca88 1134 if (rtx_jump_table_data *table = dyn_cast <rtx_jump_table_data *> (insn))
5a32a90c
JR
1135 {
1136 /* This only takes room if read-only data goes into the text
1137 section. */
d6b5193b
RS
1138 if (JUMP_TABLES_IN_TEXT_SECTION
1139 || readonly_data_section == text_section)
75197b37
BS
1140 insn_lengths[uid] = (XVECLEN (body,
1141 GET_CODE (body) == ADDR_DIFF_VEC)
d305ca88 1142 * GET_MODE_SIZE (table->get_data_mode ()));
5a32a90c 1143 /* Alignment is handled by ADDR_VEC_ALIGN. */
5a32a90c 1144 }
a30caf5c 1145 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
3cf2715d 1146 insn_lengths[uid] = asm_insn_count (body) * insn_default_length (insn);
e429a50b 1147 else if (rtx_sequence *body_seq = dyn_cast <rtx_sequence *> (body))
3cf2715d
DE
1148 {
1149 int i;
1150 int const_delay_slots;
e90bedf5
TS
1151 if (DELAY_SLOTS)
1152 const_delay_slots = const_num_delay_slots (body_seq->insn (0));
1153 else
1154 const_delay_slots = 0;
1155
84034c69 1156 int (*inner_length_fun) (rtx_insn *)
f6df08e6 1157 = const_delay_slots ? length_fun : insn_default_length;
3cf2715d
DE
1158 /* Inside a delay slot sequence, we do not do any branch shortening
1159 if the shortening could change the number of delay slots
0f41302f 1160 of the branch. */
e429a50b 1161 for (i = 0; i < body_seq->len (); i++)
3cf2715d 1162 {
e429a50b 1163 rtx_insn *inner_insn = body_seq->insn (i);
3cf2715d
DE
1164 int inner_uid = INSN_UID (inner_insn);
1165 int inner_length;
1166
5dd2902a 1167 if (GET_CODE (PATTERN (inner_insn)) == ASM_INPUT
e429a50b 1168 || asm_noperands (PATTERN (inner_insn)) >= 0)
3cf2715d
DE
1169 inner_length = (asm_insn_count (PATTERN (inner_insn))
1170 * insn_default_length (inner_insn));
1171 else
f6df08e6 1172 inner_length = inner_length_fun (inner_insn);
f5d927c0 1173
3cf2715d
DE
1174 insn_lengths[inner_uid] = inner_length;
1175 if (const_delay_slots)
1176 {
1177 if ((varying_length[inner_uid]
1178 = insn_variable_length_p (inner_insn)) != 0)
1179 varying_length[uid] = 1;
9d98a694
AO
1180 INSN_ADDRESSES (inner_uid) = (insn_current_address
1181 + insn_lengths[uid]);
3cf2715d
DE
1182 }
1183 else
1184 varying_length[inner_uid] = 0;
1185 insn_lengths[uid] += inner_length;
1186 }
1187 }
1188 else if (GET_CODE (body) != USE && GET_CODE (body) != CLOBBER)
1189 {
f6df08e6 1190 insn_lengths[uid] = length_fun (insn);
3cf2715d
DE
1191 varying_length[uid] = insn_variable_length_p (insn);
1192 }
1193
1194 /* If needed, do any adjustment. */
1195#ifdef ADJUST_INSN_LENGTH
1196 ADJUST_INSN_LENGTH (insn, insn_lengths[uid]);
04b6000c 1197 if (insn_lengths[uid] < 0)
c725bd79 1198 fatal_insn ("negative insn length", insn);
3cf2715d
DE
1199#endif
1200 }
1201
1202 /* Now loop over all the insns finding varying length insns. For each,
1203 get the current insn length. If it has changed, reflect the change.
1204 When nothing changes for a full pass, we are done. */
1205
1206 while (something_changed)
1207 {
1208 something_changed = 0;
fc470718 1209 insn_current_align = MAX_CODE_ALIGN - 1;
b816f339 1210 for (insn_current_address = 0, insn = first;
3cf2715d
DE
1211 insn != 0;
1212 insn = NEXT_INSN (insn))
1213 {
1214 int new_length;
b729186a 1215#ifdef ADJUST_INSN_LENGTH
3cf2715d 1216 int tmp_length;
b729186a 1217#endif
fc470718 1218 int length_align;
3cf2715d
DE
1219
1220 uid = INSN_UID (insn);
fc470718 1221
d305ca88 1222 if (rtx_code_label *label = dyn_cast <rtx_code_label *> (insn))
fc470718 1223 {
d305ca88 1224 int log = LABEL_TO_ALIGNMENT (label);
b0fe107e
JM
1225
1226#ifdef CASE_VECTOR_SHORTEN_MODE
1227 /* If the mode of a following jump table was changed, we
1228 may need to update the alignment of this label. */
d305ca88
RS
1229
1230 if (JUMP_TABLES_IN_TEXT_SECTION
1231 || readonly_data_section == text_section)
b0fe107e 1232 {
d305ca88
RS
1233 rtx_jump_table_data *table = jump_table_for_label (label);
1234 if (table)
b0fe107e 1235 {
d305ca88
RS
1236 int newlog = ADDR_VEC_ALIGN (table);
1237 if (newlog != log)
1238 {
1239 log = newlog;
1240 LABEL_TO_ALIGNMENT (insn) = log;
1241 something_changed = 1;
1242 }
b0fe107e
JM
1243 }
1244 }
1245#endif
1246
fc470718
R
1247 if (log > insn_current_align)
1248 {
1249 int align = 1 << log;
ecb06768 1250 int new_address= (insn_current_address + align - 1) & -align;
fc470718
R
1251 insn_lengths[uid] = new_address - insn_current_address;
1252 insn_current_align = log;
1253 insn_current_address = new_address;
1254 }
1255 else
1256 insn_lengths[uid] = 0;
9d98a694 1257 INSN_ADDRESSES (uid) = insn_current_address;
fc470718
R
1258 continue;
1259 }
1260
1261 length_align = INSN_LENGTH_ALIGNMENT (insn);
1262 if (length_align < insn_current_align)
1263 insn_current_align = length_align;
1264
9d98a694
AO
1265 insn_last_address = INSN_ADDRESSES (uid);
1266 INSN_ADDRESSES (uid) = insn_current_address;
fc470718 1267
5e75ef4a 1268#ifdef CASE_VECTOR_SHORTEN_MODE
34f0d87a
SB
1269 if (optimize
1270 && JUMP_TABLE_DATA_P (insn)
33f7f353
JR
1271 && GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC)
1272 {
d305ca88 1273 rtx_jump_table_data *table = as_a <rtx_jump_table_data *> (insn);
33f7f353
JR
1274 rtx body = PATTERN (insn);
1275 int old_length = insn_lengths[uid];
b32d5189
DM
1276 rtx_insn *rel_lab =
1277 safe_as_a <rtx_insn *> (XEXP (XEXP (body, 0), 0));
33f7f353
JR
1278 rtx min_lab = XEXP (XEXP (body, 2), 0);
1279 rtx max_lab = XEXP (XEXP (body, 3), 0);
9d98a694
AO
1280 int rel_addr = INSN_ADDRESSES (INSN_UID (rel_lab));
1281 int min_addr = INSN_ADDRESSES (INSN_UID (min_lab));
1282 int max_addr = INSN_ADDRESSES (INSN_UID (max_lab));
b32d5189 1283 rtx_insn *prev;
33f7f353 1284 int rel_align = 0;
950a3816 1285 addr_diff_vec_flags flags;
095a2d76 1286 scalar_int_mode vec_mode;
950a3816
KG
1287
1288 /* Avoid automatic aggregate initialization. */
1289 flags = ADDR_DIFF_VEC_FLAGS (body);
33f7f353
JR
1290
1291 /* Try to find a known alignment for rel_lab. */
1292 for (prev = rel_lab;
1293 prev
1294 && ! insn_lengths[INSN_UID (prev)]
1295 && ! (varying_length[INSN_UID (prev)] & 1);
1296 prev = PREV_INSN (prev))
1297 if (varying_length[INSN_UID (prev)] & 2)
1298 {
1299 rel_align = LABEL_TO_ALIGNMENT (prev);
1300 break;
1301 }
1302
1303 /* See the comment on addr_diff_vec_flags in rtl.h for the
1304 meaning of the flags values. base: REL_LAB vec: INSN */
1305 /* Anything after INSN has still addresses from the last
1306 pass; adjust these so that they reflect our current
1307 estimate for this pass. */
1308 if (flags.base_after_vec)
1309 rel_addr += insn_current_address - insn_last_address;
1310 if (flags.min_after_vec)
1311 min_addr += insn_current_address - insn_last_address;
1312 if (flags.max_after_vec)
1313 max_addr += insn_current_address - insn_last_address;
1314 /* We want to know the worst case, i.e. lowest possible value
1315 for the offset of MIN_LAB. If MIN_LAB is after REL_LAB,
1316 its offset is positive, and we have to be wary of code shrink;
1317 otherwise, it is negative, and we have to be vary of code
1318 size increase. */
1319 if (flags.min_after_base)
1320 {
1321 /* If INSN is between REL_LAB and MIN_LAB, the size
1322 changes we are about to make can change the alignment
1323 within the observed offset, therefore we have to break
1324 it up into two parts that are independent. */
1325 if (! flags.base_after_vec && flags.min_after_vec)
1326 {
1327 min_addr -= align_fuzz (rel_lab, insn, rel_align, 0);
1328 min_addr -= align_fuzz (insn, min_lab, 0, 0);
1329 }
1330 else
1331 min_addr -= align_fuzz (rel_lab, min_lab, rel_align, 0);
1332 }
1333 else
1334 {
1335 if (flags.base_after_vec && ! flags.min_after_vec)
1336 {
1337 min_addr -= align_fuzz (min_lab, insn, 0, ~0);
1338 min_addr -= align_fuzz (insn, rel_lab, 0, ~0);
1339 }
1340 else
1341 min_addr -= align_fuzz (min_lab, rel_lab, 0, ~0);
1342 }
1343 /* Likewise, determine the highest lowest possible value
1344 for the offset of MAX_LAB. */
1345 if (flags.max_after_base)
1346 {
1347 if (! flags.base_after_vec && flags.max_after_vec)
1348 {
1349 max_addr += align_fuzz (rel_lab, insn, rel_align, ~0);
1350 max_addr += align_fuzz (insn, max_lab, 0, ~0);
1351 }
1352 else
1353 max_addr += align_fuzz (rel_lab, max_lab, rel_align, ~0);
1354 }
1355 else
1356 {
1357 if (flags.base_after_vec && ! flags.max_after_vec)
1358 {
1359 max_addr += align_fuzz (max_lab, insn, 0, 0);
1360 max_addr += align_fuzz (insn, rel_lab, 0, 0);
1361 }
1362 else
1363 max_addr += align_fuzz (max_lab, rel_lab, 0, 0);
1364 }
f6df08e6
JR
1365 vec_mode = CASE_VECTOR_SHORTEN_MODE (min_addr - rel_addr,
1366 max_addr - rel_addr, body);
1367 if (!increasing
1368 || (GET_MODE_SIZE (vec_mode)
d305ca88 1369 >= GET_MODE_SIZE (table->get_data_mode ())))
f6df08e6 1370 PUT_MODE (body, vec_mode);
d6b5193b
RS
1371 if (JUMP_TABLES_IN_TEXT_SECTION
1372 || readonly_data_section == text_section)
75197b37
BS
1373 {
1374 insn_lengths[uid]
d305ca88
RS
1375 = (XVECLEN (body, 1)
1376 * GET_MODE_SIZE (table->get_data_mode ()));
75197b37
BS
1377 insn_current_address += insn_lengths[uid];
1378 if (insn_lengths[uid] != old_length)
1379 something_changed = 1;
1380 }
1381
33f7f353 1382 continue;
33f7f353 1383 }
5e75ef4a
JL
1384#endif /* CASE_VECTOR_SHORTEN_MODE */
1385
1386 if (! (varying_length[uid]))
3cf2715d 1387 {
4b4bf941 1388 if (NONJUMP_INSN_P (insn)
674fc07d
GS
1389 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1390 {
1391 int i;
1392
1393 body = PATTERN (insn);
1394 for (i = 0; i < XVECLEN (body, 0); i++)
1395 {
1396 rtx inner_insn = XVECEXP (body, 0, i);
1397 int inner_uid = INSN_UID (inner_insn);
1398
1399 INSN_ADDRESSES (inner_uid) = insn_current_address;
1400
1401 insn_current_address += insn_lengths[inner_uid];
1402 }
dd3f0101 1403 }
674fc07d
GS
1404 else
1405 insn_current_address += insn_lengths[uid];
1406
3cf2715d
DE
1407 continue;
1408 }
674fc07d 1409
4b4bf941 1410 if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
3cf2715d 1411 {
84034c69 1412 rtx_sequence *seqn = as_a <rtx_sequence *> (PATTERN (insn));
3cf2715d 1413 int i;
f5d927c0 1414
3cf2715d
DE
1415 body = PATTERN (insn);
1416 new_length = 0;
84034c69 1417 for (i = 0; i < seqn->len (); i++)
3cf2715d 1418 {
84034c69 1419 rtx_insn *inner_insn = seqn->insn (i);
3cf2715d
DE
1420 int inner_uid = INSN_UID (inner_insn);
1421 int inner_length;
1422
9d98a694 1423 INSN_ADDRESSES (inner_uid) = insn_current_address;
3cf2715d
DE
1424
1425 /* insn_current_length returns 0 for insns with a
1426 non-varying length. */
1427 if (! varying_length[inner_uid])
1428 inner_length = insn_lengths[inner_uid];
1429 else
1430 inner_length = insn_current_length (inner_insn);
1431
1432 if (inner_length != insn_lengths[inner_uid])
1433 {
f6df08e6
JR
1434 if (!increasing || inner_length > insn_lengths[inner_uid])
1435 {
1436 insn_lengths[inner_uid] = inner_length;
1437 something_changed = 1;
1438 }
1439 else
1440 inner_length = insn_lengths[inner_uid];
3cf2715d 1441 }
f6df08e6 1442 insn_current_address += inner_length;
3cf2715d
DE
1443 new_length += inner_length;
1444 }
1445 }
1446 else
1447 {
1448 new_length = insn_current_length (insn);
1449 insn_current_address += new_length;
1450 }
1451
3cf2715d
DE
1452#ifdef ADJUST_INSN_LENGTH
1453 /* If needed, do any adjustment. */
1454 tmp_length = new_length;
1455 ADJUST_INSN_LENGTH (insn, new_length);
1456 insn_current_address += (new_length - tmp_length);
3cf2715d
DE
1457#endif
1458
f6df08e6
JR
1459 if (new_length != insn_lengths[uid]
1460 && (!increasing || new_length > insn_lengths[uid]))
3cf2715d
DE
1461 {
1462 insn_lengths[uid] = new_length;
1463 something_changed = 1;
1464 }
f6df08e6
JR
1465 else
1466 insn_current_address += insn_lengths[uid] - new_length;
3cf2715d 1467 }
bb4aaf18 1468 /* For a non-optimizing compile, do only a single pass. */
f6df08e6 1469 if (!increasing)
bb4aaf18 1470 break;
3cf2715d 1471 }
8cac4d85 1472 crtl->max_insn_address = insn_current_address;
fc470718 1473 free (varying_length);
3cf2715d
DE
1474}
1475
3cf2715d
DE
1476/* Given the body of an INSN known to be generated by an ASM statement, return
1477 the number of machine instructions likely to be generated for this insn.
1478 This is used to compute its length. */
1479
1480static int
6cf9ac28 1481asm_insn_count (rtx body)
3cf2715d 1482{
48c54229 1483 const char *templ;
3cf2715d 1484
5d0930ea 1485 if (GET_CODE (body) == ASM_INPUT)
48c54229 1486 templ = XSTR (body, 0);
5d0930ea 1487 else
48c54229 1488 templ = decode_asm_operands (body, NULL, NULL, NULL, NULL, NULL);
5d0930ea 1489
2bd1d2c8
AP
1490 return asm_str_count (templ);
1491}
2bd1d2c8
AP
1492
1493/* Return the number of machine instructions likely to be generated for the
1494 inline-asm template. */
1495int
1496asm_str_count (const char *templ)
1497{
1498 int count = 1;
b8698a0f 1499
48c54229 1500 if (!*templ)
5bc4fa7c
MS
1501 return 0;
1502
48c54229
KG
1503 for (; *templ; templ++)
1504 if (IS_ASM_LOGICAL_LINE_SEPARATOR (*templ, templ)
1505 || *templ == '\n')
3cf2715d
DE
1506 count++;
1507
1508 return count;
1509}
3cf2715d 1510\f
725730f2
EB
1511/* Return true if DWARF2 debug info can be emitted for DECL. */
1512
1513static bool
1514dwarf2_debug_info_emitted_p (tree decl)
1515{
1516 if (write_symbols != DWARF2_DEBUG && write_symbols != VMS_AND_DWARF2_DEBUG)
1517 return false;
1518
1519 if (DECL_IGNORED_P (decl))
1520 return false;
1521
1522 return true;
1523}
1524
78bde837
SB
1525/* Return scope resulting from combination of S1 and S2. */
1526static tree
1527choose_inner_scope (tree s1, tree s2)
1528{
1529 if (!s1)
1530 return s2;
1531 if (!s2)
1532 return s1;
1533 if (BLOCK_NUMBER (s1) > BLOCK_NUMBER (s2))
1534 return s1;
1535 return s2;
1536}
1537
1538/* Emit lexical block notes needed to change scope from S1 to S2. */
1539
1540static void
fa7af581 1541change_scope (rtx_insn *orig_insn, tree s1, tree s2)
78bde837 1542{
fa7af581 1543 rtx_insn *insn = orig_insn;
78bde837
SB
1544 tree com = NULL_TREE;
1545 tree ts1 = s1, ts2 = s2;
1546 tree s;
1547
1548 while (ts1 != ts2)
1549 {
1550 gcc_assert (ts1 && ts2);
1551 if (BLOCK_NUMBER (ts1) > BLOCK_NUMBER (ts2))
1552 ts1 = BLOCK_SUPERCONTEXT (ts1);
1553 else if (BLOCK_NUMBER (ts1) < BLOCK_NUMBER (ts2))
1554 ts2 = BLOCK_SUPERCONTEXT (ts2);
1555 else
1556 {
1557 ts1 = BLOCK_SUPERCONTEXT (ts1);
1558 ts2 = BLOCK_SUPERCONTEXT (ts2);
1559 }
1560 }
1561 com = ts1;
1562
1563 /* Close scopes. */
1564 s = s1;
1565 while (s != com)
1566 {
66e8df53 1567 rtx_note *note = emit_note_before (NOTE_INSN_BLOCK_END, insn);
78bde837
SB
1568 NOTE_BLOCK (note) = s;
1569 s = BLOCK_SUPERCONTEXT (s);
1570 }
1571
1572 /* Open scopes. */
1573 s = s2;
1574 while (s != com)
1575 {
1576 insn = emit_note_before (NOTE_INSN_BLOCK_BEG, insn);
1577 NOTE_BLOCK (insn) = s;
1578 s = BLOCK_SUPERCONTEXT (s);
1579 }
1580}
1581
1582/* Rebuild all the NOTE_INSN_BLOCK_BEG and NOTE_INSN_BLOCK_END notes based
1583 on the scope tree and the newly reordered instructions. */
1584
1585static void
1586reemit_insn_block_notes (void)
1587{
1588 tree cur_block = DECL_INITIAL (cfun->decl);
66e8df53 1589 rtx_insn *insn;
78bde837
SB
1590
1591 insn = get_insns ();
97aba8e9 1592 for (; insn; insn = NEXT_INSN (insn))
78bde837
SB
1593 {
1594 tree this_block;
1595
67598720 1596 /* Prevent lexical blocks from straddling section boundaries. */
96a95ac1
AO
1597 if (NOTE_P (insn))
1598 switch (NOTE_KIND (insn))
1599 {
1600 case NOTE_INSN_SWITCH_TEXT_SECTIONS:
1601 {
1602 for (tree s = cur_block; s != DECL_INITIAL (cfun->decl);
1603 s = BLOCK_SUPERCONTEXT (s))
1604 {
1605 rtx_note *note = emit_note_before (NOTE_INSN_BLOCK_END, insn);
1606 NOTE_BLOCK (note) = s;
1607 note = emit_note_after (NOTE_INSN_BLOCK_BEG, insn);
1608 NOTE_BLOCK (note) = s;
1609 }
1610 }
1611 break;
1612
1613 case NOTE_INSN_BEGIN_STMT:
58006663 1614 case NOTE_INSN_INLINE_ENTRY:
96a95ac1
AO
1615 this_block = LOCATION_BLOCK (NOTE_MARKER_LOCATION (insn));
1616 goto set_cur_block_to_this_block;
1617
1618 default:
1619 continue;
1620 }
67598720
TJ
1621
1622 if (!active_insn_p (insn))
1623 continue;
1624
78bde837
SB
1625 /* Avoid putting scope notes between jump table and its label. */
1626 if (JUMP_TABLE_DATA_P (insn))
1627 continue;
1628
1629 this_block = insn_scope (insn);
1630 /* For sequences compute scope resulting from merging all scopes
1631 of instructions nested inside. */
e429a50b 1632 if (rtx_sequence *body = dyn_cast <rtx_sequence *> (PATTERN (insn)))
78bde837
SB
1633 {
1634 int i;
78bde837
SB
1635
1636 this_block = NULL;
e429a50b 1637 for (i = 0; i < body->len (); i++)
78bde837 1638 this_block = choose_inner_scope (this_block,
e429a50b 1639 insn_scope (body->insn (i)));
78bde837 1640 }
96a95ac1 1641 set_cur_block_to_this_block:
78bde837 1642 if (! this_block)
48866799
DC
1643 {
1644 if (INSN_LOCATION (insn) == UNKNOWN_LOCATION)
1645 continue;
1646 else
1647 this_block = DECL_INITIAL (cfun->decl);
1648 }
78bde837
SB
1649
1650 if (this_block != cur_block)
1651 {
1652 change_scope (insn, cur_block, this_block);
1653 cur_block = this_block;
1654 }
1655 }
1656
1657 /* change_scope emits before the insn, not after. */
96a95ac1 1658 rtx_note *note = emit_note (NOTE_INSN_DELETED);
78bde837
SB
1659 change_scope (note, cur_block, DECL_INITIAL (cfun->decl));
1660 delete_insn (note);
1661
1662 reorder_blocks ();
1663}
1664
4fbca4ba
RS
1665static const char *some_local_dynamic_name;
1666
1667/* Locate some local-dynamic symbol still in use by this function
1668 so that we can print its name in local-dynamic base patterns.
1669 Return null if there are no local-dynamic references. */
1670
1671const char *
1672get_some_local_dynamic_name ()
1673{
1674 subrtx_iterator::array_type array;
1675 rtx_insn *insn;
1676
1677 if (some_local_dynamic_name)
1678 return some_local_dynamic_name;
1679
1680 for (insn = get_insns (); insn ; insn = NEXT_INSN (insn))
1681 if (NONDEBUG_INSN_P (insn))
1682 FOR_EACH_SUBRTX (iter, array, PATTERN (insn), ALL)
1683 {
1684 const_rtx x = *iter;
1685 if (GET_CODE (x) == SYMBOL_REF)
1686 {
1687 if (SYMBOL_REF_TLS_MODEL (x) == TLS_MODEL_LOCAL_DYNAMIC)
1688 return some_local_dynamic_name = XSTR (x, 0);
1689 if (CONSTANT_POOL_ADDRESS_P (x))
1690 iter.substitute (get_pool_constant (x));
1691 }
1692 }
1693
1694 return 0;
1695}
1696
bd2b9f1e
AO
1697/* Arrange for us to emit a source location note before any further
1698 real insns or section changes, by setting the SEEN_NEXT_VIEW bit in
1699 *SEEN, as long as we are keeping track of location views. The bit
1700 indicates we have referenced the next view at the current PC, so we
1701 have to emit it. This should be called next to the var_location
1702 debug hook. */
1703
1704static inline void
1705set_next_view_needed (int *seen)
1706{
1707 if (debug_variable_location_views)
1708 *seen |= SEEN_NEXT_VIEW;
1709}
1710
1711/* Clear the flag in *SEEN indicating we need to emit the next view.
1712 This should be called next to the source_line debug hook. */
1713
1714static inline void
1715clear_next_view_needed (int *seen)
1716{
1717 *seen &= ~SEEN_NEXT_VIEW;
1718}
1719
1720/* Test whether we have a pending request to emit the next view in
1721 *SEEN, and emit it if needed, clearing the request bit. */
1722
1723static inline void
1724maybe_output_next_view (int *seen)
1725{
1726 if ((*seen & SEEN_NEXT_VIEW) != 0)
1727 {
1728 clear_next_view_needed (seen);
1729 (*debug_hooks->source_line) (last_linenum, last_columnnum,
1730 last_filename, last_discriminator,
1731 false);
1732 }
1733}
1734
1735/* We want to emit param bindings (before the first begin_stmt) in the
1736 initial view, if we are emitting views. To that end, we may
1737 consume initial notes in the function, processing them in
1738 final_start_function, before signaling the beginning of the
1739 prologue, rather than in final.
1740
1741 We don't test whether the DECLs are PARM_DECLs: the assumption is
1742 that there will be a NOTE_INSN_BEGIN_STMT marker before any
1743 non-parameter NOTE_INSN_VAR_LOCATION. It's ok if the marker is not
1744 there, we'll just have more variable locations bound in the initial
1745 view, which is consistent with their being bound without any code
1746 that would give them a value. */
1747
1748static inline bool
1749in_initial_view_p (rtx_insn *insn)
1750{
1751 return (!DECL_IGNORED_P (current_function_decl)
1752 && debug_variable_location_views
1753 && insn && GET_CODE (insn) == NOTE
1754 && (NOTE_KIND (insn) == NOTE_INSN_VAR_LOCATION
1755 || NOTE_KIND (insn) == NOTE_INSN_DELETED));
1756}
1757
3cf2715d
DE
1758/* Output assembler code for the start of a function,
1759 and initialize some of the variables in this file
1760 for the new function. The label for the function and associated
1761 assembler pseudo-ops have already been output in `assemble_start_function'.
1762
1763 FIRST is the first insn of the rtl for the function being compiled.
1764 FILE is the file to write assembler code to.
bd2b9f1e
AO
1765 SEEN should be initially set to zero, and it may be updated to
1766 indicate we have references to the next location view, that would
1767 require us to emit it at the current PC.
46625112 1768 OPTIMIZE_P is nonzero if we should eliminate redundant
3cf2715d
DE
1769 test and compare insns. */
1770
bd2b9f1e
AO
1771static void
1772final_start_function_1 (rtx_insn **firstp, FILE *file, int *seen,
1773 int optimize_p ATTRIBUTE_UNUSED)
3cf2715d
DE
1774{
1775 block_depth = 0;
1776
1777 this_is_asm_operands = 0;
1778
ddd84654
JJ
1779 need_profile_function = false;
1780
5368224f
DC
1781 last_filename = LOCATION_FILE (prologue_location);
1782 last_linenum = LOCATION_LINE (prologue_location);
497b7c47 1783 last_columnnum = LOCATION_COLUMN (prologue_location);
6c52e687 1784 last_discriminator = discriminator = 0;
9ae130f8 1785
653e276c 1786 high_block_linenum = high_function_linenum = last_linenum;
eac40081 1787
ef1b3fda
KS
1788 if (flag_sanitize & SANITIZE_ADDRESS)
1789 asan_function_start ();
1790
bd2b9f1e
AO
1791 rtx_insn *first = *firstp;
1792 if (in_initial_view_p (first))
1793 {
1794 do
1795 {
1796 final_scan_insn (first, file, 0, 0, seen);
1797 first = NEXT_INSN (first);
1798 }
1799 while (in_initial_view_p (first));
1800 *firstp = first;
1801 }
1802
725730f2 1803 if (!DECL_IGNORED_P (current_function_decl))
bd2b9f1e
AO
1804 debug_hooks->begin_prologue (last_linenum, last_columnnum,
1805 last_filename);
d291dd49 1806
725730f2 1807 if (!dwarf2_debug_info_emitted_p (current_function_decl))
497b7c47 1808 dwarf2out_begin_prologue (0, 0, NULL);
3cf2715d
DE
1809
1810#ifdef LEAF_REG_REMAP
416ff32e 1811 if (crtl->uses_only_leaf_regs)
3cf2715d
DE
1812 leaf_renumber_regs (first);
1813#endif
1814
1815 /* The Sun386i and perhaps other machines don't work right
1816 if the profiling code comes after the prologue. */
3c5273a9 1817 if (targetm.profile_before_prologue () && crtl->profile)
ddd84654 1818 {
e86a9946
RS
1819 if (targetm.asm_out.function_prologue == default_function_pro_epilogue
1820 && targetm.have_prologue ())
ddd84654 1821 {
fa7af581 1822 rtx_insn *insn;
ddd84654
JJ
1823 for (insn = first; insn; insn = NEXT_INSN (insn))
1824 if (!NOTE_P (insn))
1825 {
fa7af581 1826 insn = NULL;
ddd84654
JJ
1827 break;
1828 }
1829 else if (NOTE_KIND (insn) == NOTE_INSN_BASIC_BLOCK
1830 || NOTE_KIND (insn) == NOTE_INSN_FUNCTION_BEG)
1831 break;
1832 else if (NOTE_KIND (insn) == NOTE_INSN_DELETED
1833 || NOTE_KIND (insn) == NOTE_INSN_VAR_LOCATION)
1834 continue;
1835 else
1836 {
fa7af581 1837 insn = NULL;
ddd84654
JJ
1838 break;
1839 }
1840
1841 if (insn)
1842 need_profile_function = true;
1843 else
1844 profile_function (file);
1845 }
1846 else
1847 profile_function (file);
1848 }
3cf2715d 1849
18c038b9
MM
1850 /* If debugging, assign block numbers to all of the blocks in this
1851 function. */
1852 if (write_symbols)
1853 {
0435312e 1854 reemit_insn_block_notes ();
a20612aa 1855 number_blocks (current_function_decl);
18c038b9
MM
1856 /* We never actually put out begin/end notes for the top-level
1857 block in the function. But, conceptually, that block is
1858 always needed. */
1859 TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl)) = 1;
1860 }
1861
f075bd95 1862 HOST_WIDE_INT min_frame_size = constant_lower_bound (get_frame_size ());
a214518f 1863 if (warn_frame_larger_than
f075bd95
RS
1864 && min_frame_size > frame_larger_than_size)
1865 {
a214518f
SP
1866 /* Issue a warning */
1867 warning (OPT_Wframe_larger_than_,
f075bd95
RS
1868 "the frame size of %wd bytes is larger than %wd bytes",
1869 min_frame_size, frame_larger_than_size);
1870 }
a214518f 1871
3cf2715d 1872 /* First output the function prologue: code to set up the stack frame. */
42776416 1873 targetm.asm_out.function_prologue (file);
3cf2715d 1874
3cf2715d
DE
1875 /* If the machine represents the prologue as RTL, the profiling code must
1876 be emitted when NOTE_INSN_PROLOGUE_END is scanned. */
e86a9946 1877 if (! targetm.have_prologue ())
3cf2715d 1878 profile_after_prologue (file);
3cf2715d
DE
1879}
1880
bd2b9f1e
AO
1881/* This is an exported final_start_function_1, callable without SEEN. */
1882
1883void
1884final_start_function (rtx_insn *first, FILE *file,
1885 int optimize_p ATTRIBUTE_UNUSED)
1886{
1887 int seen = 0;
1888 final_start_function_1 (&first, file, &seen, optimize_p);
1889 gcc_assert (seen == 0);
1890}
1891
3cf2715d 1892static void
6cf9ac28 1893profile_after_prologue (FILE *file ATTRIBUTE_UNUSED)
3cf2715d 1894{
3c5273a9 1895 if (!targetm.profile_before_prologue () && crtl->profile)
3cf2715d 1896 profile_function (file);
3cf2715d
DE
1897}
1898
1899static void
6cf9ac28 1900profile_function (FILE *file ATTRIBUTE_UNUSED)
3cf2715d 1901{
dcacfa04 1902#ifndef NO_PROFILE_COUNTERS
9739c90c 1903# define NO_PROFILE_COUNTERS 0
dcacfa04 1904#endif
531ca746
RH
1905#ifdef ASM_OUTPUT_REG_PUSH
1906 rtx sval = NULL, chain = NULL;
1907
1908 if (cfun->returns_struct)
1909 sval = targetm.calls.struct_value_rtx (TREE_TYPE (current_function_decl),
1910 true);
1911 if (cfun->static_chain_decl)
1912 chain = targetm.calls.static_chain (current_function_decl, true);
b729186a 1913#endif /* ASM_OUTPUT_REG_PUSH */
3cf2715d 1914
9739c90c
JJ
1915 if (! NO_PROFILE_COUNTERS)
1916 {
1917 int align = MIN (BIGGEST_ALIGNMENT, LONG_TYPE_SIZE);
d6b5193b 1918 switch_to_section (data_section);
9739c90c 1919 ASM_OUTPUT_ALIGN (file, floor_log2 (align / BITS_PER_UNIT));
5fd9b178 1920 targetm.asm_out.internal_label (file, "LP", current_function_funcdef_no);
9739c90c
JJ
1921 assemble_integer (const0_rtx, LONG_TYPE_SIZE / BITS_PER_UNIT, align, 1);
1922 }
3cf2715d 1923
d6b5193b 1924 switch_to_section (current_function_section ());
3cf2715d 1925
531ca746
RH
1926#ifdef ASM_OUTPUT_REG_PUSH
1927 if (sval && REG_P (sval))
1928 ASM_OUTPUT_REG_PUSH (file, REGNO (sval));
1929 if (chain && REG_P (chain))
1930 ASM_OUTPUT_REG_PUSH (file, REGNO (chain));
3cf2715d 1931#endif
3cf2715d 1932
df696a75 1933 FUNCTION_PROFILER (file, current_function_funcdef_no);
3cf2715d 1934
531ca746
RH
1935#ifdef ASM_OUTPUT_REG_PUSH
1936 if (chain && REG_P (chain))
1937 ASM_OUTPUT_REG_POP (file, REGNO (chain));
1938 if (sval && REG_P (sval))
1939 ASM_OUTPUT_REG_POP (file, REGNO (sval));
3cf2715d
DE
1940#endif
1941}
1942
1943/* Output assembler code for the end of a function.
1944 For clarity, args are same as those of `final_start_function'
1945 even though not all of them are needed. */
1946
1947void
6cf9ac28 1948final_end_function (void)
3cf2715d 1949{
be1bb652 1950 app_disable ();
3cf2715d 1951
725730f2
EB
1952 if (!DECL_IGNORED_P (current_function_decl))
1953 debug_hooks->end_function (high_function_linenum);
3cf2715d 1954
3cf2715d
DE
1955 /* Finally, output the function epilogue:
1956 code to restore the stack frame and return to the caller. */
42776416 1957 targetm.asm_out.function_epilogue (asm_out_file);
3cf2715d 1958
e2a12aca 1959 /* And debug output. */
725730f2
EB
1960 if (!DECL_IGNORED_P (current_function_decl))
1961 debug_hooks->end_epilogue (last_linenum, last_filename);
3cf2715d 1962
725730f2 1963 if (!dwarf2_debug_info_emitted_p (current_function_decl)
7a0c8d71 1964 && dwarf2out_do_frame ())
702ada3d 1965 dwarf2out_end_epilogue (last_linenum, last_filename);
4fbca4ba
RS
1966
1967 some_local_dynamic_name = 0;
3cf2715d
DE
1968}
1969\f
6a801cf2
XDL
1970
1971/* Dumper helper for basic block information. FILE is the assembly
1972 output file, and INSN is the instruction being emitted. */
1973
1974static void
fa7af581 1975dump_basic_block_info (FILE *file, rtx_insn *insn, basic_block *start_to_bb,
6a801cf2
XDL
1976 basic_block *end_to_bb, int bb_map_size, int *bb_seqn)
1977{
1978 basic_block bb;
1979
1980 if (!flag_debug_asm)
1981 return;
1982
1983 if (INSN_UID (insn) < bb_map_size
1984 && (bb = start_to_bb[INSN_UID (insn)]) != NULL)
1985 {
1986 edge e;
1987 edge_iterator ei;
1988
1c13f168 1989 fprintf (file, "%s BLOCK %d", ASM_COMMENT_START, bb->index);
3995f3a2
JH
1990 if (bb->count.initialized_p ())
1991 {
1992 fprintf (file, ", count:");
1993 bb->count.dump (file);
1994 }
6a801cf2 1995 fprintf (file, " seq:%d", (*bb_seqn)++);
1c13f168 1996 fprintf (file, "\n%s PRED:", ASM_COMMENT_START);
6a801cf2
XDL
1997 FOR_EACH_EDGE (e, ei, bb->preds)
1998 {
a315c44c 1999 dump_edge_info (file, e, TDF_DETAILS, 0);
6a801cf2
XDL
2000 }
2001 fprintf (file, "\n");
2002 }
2003 if (INSN_UID (insn) < bb_map_size
2004 && (bb = end_to_bb[INSN_UID (insn)]) != NULL)
2005 {
2006 edge e;
2007 edge_iterator ei;
2008
1c13f168 2009 fprintf (asm_out_file, "%s SUCC:", ASM_COMMENT_START);
6a801cf2
XDL
2010 FOR_EACH_EDGE (e, ei, bb->succs)
2011 {
a315c44c 2012 dump_edge_info (asm_out_file, e, TDF_DETAILS, 1);
6a801cf2
XDL
2013 }
2014 fprintf (file, "\n");
2015 }
2016}
2017
3cf2715d 2018/* Output assembler code for some insns: all or part of a function.
c9d691e9 2019 For description of args, see `final_start_function', above. */
3cf2715d 2020
bd2b9f1e
AO
2021static void
2022final_1 (rtx_insn *first, FILE *file, int seen, int optimize_p)
3cf2715d 2023{
fa7af581 2024 rtx_insn *insn, *next;
3cf2715d 2025
6a801cf2
XDL
2026 /* Used for -dA dump. */
2027 basic_block *start_to_bb = NULL;
2028 basic_block *end_to_bb = NULL;
2029 int bb_map_size = 0;
2030 int bb_seqn = 0;
2031
3cf2715d 2032 last_ignored_compare = 0;
3cf2715d 2033
618f4073
TS
2034 if (HAVE_cc0)
2035 for (insn = first; insn; insn = NEXT_INSN (insn))
2036 {
2037 /* If CC tracking across branches is enabled, record the insn which
2038 jumps to each branch only reached from one place. */
2039 if (optimize_p && JUMP_P (insn))
2040 {
2041 rtx lab = JUMP_LABEL (insn);
2042 if (lab && LABEL_P (lab) && LABEL_NUSES (lab) == 1)
2043 {
2044 LABEL_REFS (lab) = insn;
2045 }
2046 }
2047 }
a8c3510c 2048
3cf2715d
DE
2049 init_recog ();
2050
2051 CC_STATUS_INIT;
2052
6a801cf2
XDL
2053 if (flag_debug_asm)
2054 {
2055 basic_block bb;
2056
2057 bb_map_size = get_max_uid () + 1;
2058 start_to_bb = XCNEWVEC (basic_block, bb_map_size);
2059 end_to_bb = XCNEWVEC (basic_block, bb_map_size);
2060
292ffe86
CC
2061 /* There is no cfg for a thunk. */
2062 if (!cfun->is_thunk)
4f42035e 2063 FOR_EACH_BB_REVERSE_FN (bb, cfun)
292ffe86
CC
2064 {
2065 start_to_bb[INSN_UID (BB_HEAD (bb))] = bb;
2066 end_to_bb[INSN_UID (BB_END (bb))] = bb;
2067 }
6a801cf2
XDL
2068 }
2069
3cf2715d 2070 /* Output the insns. */
9ff57809 2071 for (insn = first; insn;)
2f16edb1 2072 {
d327457f 2073 if (HAVE_ATTR_length)
0ac76ad9 2074 {
d327457f
JR
2075 if ((unsigned) INSN_UID (insn) >= INSN_ADDRESSES_SIZE ())
2076 {
2077 /* This can be triggered by bugs elsewhere in the compiler if
2078 new insns are created after init_insn_lengths is called. */
2079 gcc_assert (NOTE_P (insn));
2080 insn_current_address = -1;
2081 }
2082 else
2083 insn_current_address = INSN_ADDRESSES (INSN_UID (insn));
0ac76ad9 2084 }
0ac76ad9 2085
6a801cf2
XDL
2086 dump_basic_block_info (file, insn, start_to_bb, end_to_bb,
2087 bb_map_size, &bb_seqn);
46625112 2088 insn = final_scan_insn (insn, file, optimize_p, 0, &seen);
2f16edb1 2089 }
6a801cf2 2090
bd2b9f1e
AO
2091 maybe_output_next_view (&seen);
2092
6a801cf2
XDL
2093 if (flag_debug_asm)
2094 {
2095 free (start_to_bb);
2096 free (end_to_bb);
2097 }
bc5612ed
BS
2098
2099 /* Remove CFI notes, to avoid compare-debug failures. */
2100 for (insn = first; insn; insn = next)
2101 {
2102 next = NEXT_INSN (insn);
2103 if (NOTE_P (insn)
2104 && (NOTE_KIND (insn) == NOTE_INSN_CFI
2105 || NOTE_KIND (insn) == NOTE_INSN_CFI_LABEL))
2106 delete_insn (insn);
2107 }
3cf2715d 2108}
bd2b9f1e
AO
2109
2110/* This is an exported final_1, callable without SEEN. */
2111
2112void
2113final (rtx_insn *first, FILE *file, int optimize_p)
2114{
2115 /* Those that use the internal final_start_function_1/final_1 API
2116 skip initial debug bind notes in final_start_function_1, and pass
2117 the modified FIRST to final_1. But those that use the public
2118 final_start_function/final APIs, final_start_function can't move
2119 FIRST because it's not passed by reference, so if they were
2120 skipped there, skip them again here. */
2121 while (in_initial_view_p (first))
2122 first = NEXT_INSN (first);
2123
2124 final_1 (first, file, 0, optimize_p);
2125}
3cf2715d 2126\f
4bbf910e 2127const char *
6cf9ac28 2128get_insn_template (int code, rtx insn)
4bbf910e 2129{
4bbf910e
RH
2130 switch (insn_data[code].output_format)
2131 {
2132 case INSN_OUTPUT_FORMAT_SINGLE:
3897f229 2133 return insn_data[code].output.single;
4bbf910e 2134 case INSN_OUTPUT_FORMAT_MULTI:
3897f229 2135 return insn_data[code].output.multi[which_alternative];
4bbf910e 2136 case INSN_OUTPUT_FORMAT_FUNCTION:
0bccc606 2137 gcc_assert (insn);
95770ca3
DM
2138 return (*insn_data[code].output.function) (recog_data.operand,
2139 as_a <rtx_insn *> (insn));
4bbf910e
RH
2140
2141 default:
0bccc606 2142 gcc_unreachable ();
4bbf910e
RH
2143 }
2144}
f5d927c0 2145
0dc36574
ZW
2146/* Emit the appropriate declaration for an alternate-entry-point
2147 symbol represented by INSN, to FILE. INSN is a CODE_LABEL with
2148 LABEL_KIND != LABEL_NORMAL.
2149
2150 The case fall-through in this function is intentional. */
2151static void
fa7af581 2152output_alternate_entry_point (FILE *file, rtx_insn *insn)
0dc36574
ZW
2153{
2154 const char *name = LABEL_NAME (insn);
2155
2156 switch (LABEL_KIND (insn))
2157 {
2158 case LABEL_WEAK_ENTRY:
2159#ifdef ASM_WEAKEN_LABEL
2160 ASM_WEAKEN_LABEL (file, name);
81fea426 2161 gcc_fallthrough ();
0dc36574
ZW
2162#endif
2163 case LABEL_GLOBAL_ENTRY:
5fd9b178 2164 targetm.asm_out.globalize_label (file, name);
81fea426 2165 gcc_fallthrough ();
0dc36574 2166 case LABEL_STATIC_ENTRY:
905173eb
ZW
2167#ifdef ASM_OUTPUT_TYPE_DIRECTIVE
2168 ASM_OUTPUT_TYPE_DIRECTIVE (file, name, "function");
2169#endif
0dc36574
ZW
2170 ASM_OUTPUT_LABEL (file, name);
2171 break;
2172
2173 case LABEL_NORMAL:
2174 default:
0bccc606 2175 gcc_unreachable ();
0dc36574
ZW
2176 }
2177}
2178
f410e1b3
RAE
2179/* Given a CALL_INSN, find and return the nested CALL. */
2180static rtx
fa7af581 2181call_from_call_insn (rtx_call_insn *insn)
f410e1b3
RAE
2182{
2183 rtx x;
2184 gcc_assert (CALL_P (insn));
2185 x = PATTERN (insn);
2186
2187 while (GET_CODE (x) != CALL)
2188 {
2189 switch (GET_CODE (x))
2190 {
2191 default:
2192 gcc_unreachable ();
b8c71e40
RAE
2193 case COND_EXEC:
2194 x = COND_EXEC_CODE (x);
2195 break;
f410e1b3
RAE
2196 case PARALLEL:
2197 x = XVECEXP (x, 0, 0);
2198 break;
2199 case SET:
2200 x = XEXP (x, 1);
2201 break;
2202 }
2203 }
2204 return x;
2205}
2206
82f72146
DM
2207/* Print a comment into the asm showing FILENAME, LINENUM, and the
2208 corresponding source line, if available. */
2209
2210static void
2211asm_show_source (const char *filename, int linenum)
2212{
2213 if (!filename)
2214 return;
2215
2216 int line_size;
2217 const char *line = location_get_source_line (filename, linenum, &line_size);
2218 if (!line)
2219 return;
2220
2221 fprintf (asm_out_file, "%s %s:%i: ", ASM_COMMENT_START, filename, linenum);
2222 /* "line" is not 0-terminated, so we must use line_size. */
2223 fwrite (line, 1, line_size, asm_out_file);
2224 fputc ('\n', asm_out_file);
2225}
2226
3cf2715d
DE
2227/* The final scan for one insn, INSN.
2228 Args are same as in `final', except that INSN
2229 is the insn being scanned.
2230 Value returned is the next insn to be scanned.
2231
ff8cea7e
EB
2232 NOPEEPHOLES is the flag to disallow peephole processing (currently
2233 used for within delayed branch sequence output).
3cf2715d 2234
589fe865
DJ
2235 SEEN is used to track the end of the prologue, for emitting
2236 debug information. We force the emission of a line note after
70aacc97 2237 both NOTE_INSN_PROLOGUE_END and NOTE_INSN_FUNCTION_BEG. */
589fe865 2238
e094c0bf
AO
2239static rtx_insn *
2240final_scan_insn_1 (rtx_insn *insn, FILE *file, int optimize_p ATTRIBUTE_UNUSED,
2241 int nopeepholes ATTRIBUTE_UNUSED, int *seen)
3cf2715d 2242{
f1e52ed6 2243#if HAVE_cc0
90ca38bb
MM
2244 rtx set;
2245#endif
fa7af581 2246 rtx_insn *next;
d305ca88 2247 rtx_jump_table_data *table;
fa7af581 2248
3cf2715d
DE
2249 insn_counter++;
2250
2251 /* Ignore deleted insns. These can occur when we split insns (due to a
2252 template of "#") while not optimizing. */
4654c0cf 2253 if (insn->deleted ())
3cf2715d
DE
2254 return NEXT_INSN (insn);
2255
2256 switch (GET_CODE (insn))
2257 {
2258 case NOTE:
a38e7aa5 2259 switch (NOTE_KIND (insn))
be1bb652
RH
2260 {
2261 case NOTE_INSN_DELETED:
d33606c3 2262 case NOTE_INSN_UPDATE_SJLJ_CONTEXT:
be1bb652 2263 break;
3cf2715d 2264
87c8b4be 2265 case NOTE_INSN_SWITCH_TEXT_SECTIONS:
bd2b9f1e
AO
2266 maybe_output_next_view (seen);
2267
c543ca49 2268 in_cold_section_p = !in_cold_section_p;
f0a0390e 2269
b8cb3096
JJ
2270 if (in_cold_section_p)
2271 cold_function_name
2272 = clone_function_name (current_function_decl, "cold");
2273
a4b6974e 2274 if (dwarf2out_do_frame ())
b8cb3096
JJ
2275 {
2276 dwarf2out_switch_text_section ();
2277 if (!dwarf2_debug_info_emitted_p (current_function_decl)
2278 && !DECL_IGNORED_P (current_function_decl))
2279 debug_hooks->switch_text_section ();
2280 }
f0a0390e 2281 else if (!DECL_IGNORED_P (current_function_decl))
725730f2 2282 debug_hooks->switch_text_section ();
a4b6974e 2283
c543ca49 2284 switch_to_section (current_function_section ());
14d11d40
IS
2285 targetm.asm_out.function_switched_text_sections (asm_out_file,
2286 current_function_decl,
2287 in_cold_section_p);
2ae367c1
ST
2288 /* Emit a label for the split cold section. Form label name by
2289 suffixing "cold" to the original function's name. */
2290 if (in_cold_section_p)
2291 {
11c3d071
CT
2292#ifdef ASM_DECLARE_COLD_FUNCTION_NAME
2293 ASM_DECLARE_COLD_FUNCTION_NAME (asm_out_file,
2294 IDENTIFIER_POINTER
2295 (cold_function_name),
2296 current_function_decl);
16d710b1 2297#else
2ae367c1
ST
2298 ASM_OUTPUT_LABEL (asm_out_file,
2299 IDENTIFIER_POINTER (cold_function_name));
16d710b1 2300#endif
2ae367c1 2301 }
750054a2 2302 break;
b0efb46b 2303
be1bb652 2304 case NOTE_INSN_BASIC_BLOCK:
ddd84654
JJ
2305 if (need_profile_function)
2306 {
2307 profile_function (asm_out_file);
2308 need_profile_function = false;
2309 }
2310
2784ed9c
KT
2311 if (targetm.asm_out.unwind_emit)
2312 targetm.asm_out.unwind_emit (asm_out_file, insn);
951120ea 2313
6c52e687
CC
2314 discriminator = NOTE_BASIC_BLOCK (insn)->discriminator;
2315
be1bb652 2316 break;
3cf2715d 2317
be1bb652 2318 case NOTE_INSN_EH_REGION_BEG:
52a11cbf
RH
2319 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHB",
2320 NOTE_EH_HANDLER (insn));
3d195391 2321 break;
3d195391 2322
be1bb652 2323 case NOTE_INSN_EH_REGION_END:
52a11cbf
RH
2324 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHE",
2325 NOTE_EH_HANDLER (insn));
3d195391 2326 break;
3d195391 2327
be1bb652 2328 case NOTE_INSN_PROLOGUE_END:
5fd9b178 2329 targetm.asm_out.function_end_prologue (file);
3cf2715d 2330 profile_after_prologue (file);
589fe865
DJ
2331
2332 if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE)
2333 {
2334 *seen |= SEEN_EMITTED;
b8176fe4 2335 force_source_line = true;
589fe865
DJ
2336 }
2337 else
2338 *seen |= SEEN_NOTE;
2339
3cf2715d 2340 break;
3cf2715d 2341
be1bb652 2342 case NOTE_INSN_EPILOGUE_BEG:
bc45e4ba
TG
2343 if (!DECL_IGNORED_P (current_function_decl))
2344 (*debug_hooks->begin_epilogue) (last_linenum, last_filename);
5fd9b178 2345 targetm.asm_out.function_begin_epilogue (file);
be1bb652 2346 break;
3cf2715d 2347
bc5612ed
BS
2348 case NOTE_INSN_CFI:
2349 dwarf2out_emit_cfi (NOTE_CFI (insn));
2350 break;
2351
2352 case NOTE_INSN_CFI_LABEL:
2353 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LCFI",
2354 NOTE_LABEL_NUMBER (insn));
cd9c1ca8
RH
2355 break;
2356
be1bb652 2357 case NOTE_INSN_FUNCTION_BEG:
ddd84654
JJ
2358 if (need_profile_function)
2359 {
2360 profile_function (asm_out_file);
2361 need_profile_function = false;
2362 }
2363
653e276c 2364 app_disable ();
725730f2
EB
2365 if (!DECL_IGNORED_P (current_function_decl))
2366 debug_hooks->end_prologue (last_linenum, last_filename);
589fe865
DJ
2367
2368 if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE)
2369 {
2370 *seen |= SEEN_EMITTED;
b8176fe4 2371 force_source_line = true;
589fe865
DJ
2372 }
2373 else
2374 *seen |= SEEN_NOTE;
2375
3cf2715d 2376 break;
be1bb652
RH
2377
2378 case NOTE_INSN_BLOCK_BEG:
2379 if (debug_info_level == DINFO_LEVEL_NORMAL
3cf2715d 2380 || debug_info_level == DINFO_LEVEL_VERBOSE
7a0c8d71
DR
2381 || write_symbols == DWARF2_DEBUG
2382 || write_symbols == VMS_AND_DWARF2_DEBUG
2383 || write_symbols == VMS_DEBUG)
be1bb652
RH
2384 {
2385 int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
3cf2715d 2386
be1bb652
RH
2387 app_disable ();
2388 ++block_depth;
2389 high_block_linenum = last_linenum;
eac40081 2390
a5a42b92 2391 /* Output debugging info about the symbol-block beginning. */
725730f2
EB
2392 if (!DECL_IGNORED_P (current_function_decl))
2393 debug_hooks->begin_block (last_linenum, n);
3cf2715d 2394
be1bb652
RH
2395 /* Mark this block as output. */
2396 TREE_ASM_WRITTEN (NOTE_BLOCK (insn)) = 1;
aaec3d85 2397 BLOCK_IN_COLD_SECTION_P (NOTE_BLOCK (insn)) = in_cold_section_p;
be1bb652 2398 }
180295ed 2399 if (write_symbols == DBX_DEBUG)
d752cfdb
JJ
2400 {
2401 location_t *locus_ptr
2402 = block_nonartificial_location (NOTE_BLOCK (insn));
2403
2404 if (locus_ptr != NULL)
2405 {
2406 override_filename = LOCATION_FILE (*locus_ptr);
2407 override_linenum = LOCATION_LINE (*locus_ptr);
497b7c47 2408 override_columnnum = LOCATION_COLUMN (*locus_ptr);
d752cfdb
JJ
2409 }
2410 }
be1bb652 2411 break;
18c038b9 2412
be1bb652 2413 case NOTE_INSN_BLOCK_END:
bd2b9f1e
AO
2414 maybe_output_next_view (seen);
2415
be1bb652
RH
2416 if (debug_info_level == DINFO_LEVEL_NORMAL
2417 || debug_info_level == DINFO_LEVEL_VERBOSE
7a0c8d71
DR
2418 || write_symbols == DWARF2_DEBUG
2419 || write_symbols == VMS_AND_DWARF2_DEBUG
2420 || write_symbols == VMS_DEBUG)
be1bb652
RH
2421 {
2422 int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
3cf2715d 2423
be1bb652
RH
2424 app_disable ();
2425
2426 /* End of a symbol-block. */
2427 --block_depth;
0bccc606 2428 gcc_assert (block_depth >= 0);
3cf2715d 2429
725730f2
EB
2430 if (!DECL_IGNORED_P (current_function_decl))
2431 debug_hooks->end_block (high_block_linenum, n);
aaec3d85
JJ
2432 gcc_assert (BLOCK_IN_COLD_SECTION_P (NOTE_BLOCK (insn))
2433 == in_cold_section_p);
be1bb652 2434 }
180295ed 2435 if (write_symbols == DBX_DEBUG)
d752cfdb
JJ
2436 {
2437 tree outer_block = BLOCK_SUPERCONTEXT (NOTE_BLOCK (insn));
2438 location_t *locus_ptr
2439 = block_nonartificial_location (outer_block);
2440
2441 if (locus_ptr != NULL)
2442 {
2443 override_filename = LOCATION_FILE (*locus_ptr);
2444 override_linenum = LOCATION_LINE (*locus_ptr);
497b7c47 2445 override_columnnum = LOCATION_COLUMN (*locus_ptr);
d752cfdb
JJ
2446 }
2447 else
2448 {
2449 override_filename = NULL;
2450 override_linenum = 0;
497b7c47 2451 override_columnnum = 0;
d752cfdb
JJ
2452 }
2453 }
be1bb652
RH
2454 break;
2455
2456 case NOTE_INSN_DELETED_LABEL:
2457 /* Emit the label. We may have deleted the CODE_LABEL because
2458 the label could be proved to be unreachable, though still
2459 referenced (in the form of having its address taken. */
8215347e 2460 ASM_OUTPUT_DEBUG_LABEL (file, "L", CODE_LABEL_NUMBER (insn));
be1bb652 2461 break;
3cf2715d 2462
5619e52c
JJ
2463 case NOTE_INSN_DELETED_DEBUG_LABEL:
2464 /* Similarly, but need to use different namespace for it. */
2465 if (CODE_LABEL_NUMBER (insn) != -1)
2466 ASM_OUTPUT_DEBUG_LABEL (file, "LDL", CODE_LABEL_NUMBER (insn));
2467 break;
2468
014a1138 2469 case NOTE_INSN_VAR_LOCATION:
725730f2 2470 if (!DECL_IGNORED_P (current_function_decl))
bd2b9f1e
AO
2471 {
2472 debug_hooks->var_location (insn);
2473 set_next_view_needed (seen);
2474 }
014a1138
JZ
2475 break;
2476
96a95ac1
AO
2477 case NOTE_INSN_BEGIN_STMT:
2478 gcc_checking_assert (cfun->debug_nonbind_markers);
2479 if (!DECL_IGNORED_P (current_function_decl)
2480 && notice_source_line (insn, NULL))
2481 {
58006663 2482 output_source_line:
96a95ac1
AO
2483 (*debug_hooks->source_line) (last_linenum, last_columnnum,
2484 last_filename, last_discriminator,
2485 true);
bd2b9f1e 2486 clear_next_view_needed (seen);
96a95ac1
AO
2487 }
2488 break;
2489
58006663
AO
2490 case NOTE_INSN_INLINE_ENTRY:
2491 gcc_checking_assert (cfun->debug_nonbind_markers);
2492 if (!DECL_IGNORED_P (current_function_decl))
2493 {
2494 if (!notice_source_line (insn, NULL))
2495 break;
2496 (*debug_hooks->inline_entry) (LOCATION_BLOCK
2497 (NOTE_MARKER_LOCATION (insn)));
2498 goto output_source_line;
2499 }
2500 break;
2501
be1bb652 2502 default:
a38e7aa5 2503 gcc_unreachable ();
f5d927c0 2504 break;
3cf2715d
DE
2505 }
2506 break;
2507
2508 case BARRIER:
3cf2715d
DE
2509 break;
2510
2511 case CODE_LABEL:
1dd8faa8
R
2512 /* The target port might emit labels in the output function for
2513 some insn, e.g. sh.c output_branchy_insn. */
de7987a6
R
2514 if (CODE_LABEL_NUMBER (insn) <= max_labelno)
2515 {
2516 int align = LABEL_TO_ALIGNMENT (insn);
50b2596f 2517#ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
9e423e6d 2518 int max_skip = LABEL_TO_MAX_SKIP (insn);
50b2596f 2519#endif
fc470718 2520
1dd8faa8 2521 if (align && NEXT_INSN (insn))
40cdfca6 2522 {
9e423e6d 2523#ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
40cdfca6 2524 ASM_OUTPUT_MAX_SKIP_ALIGN (file, align, max_skip);
8e16ab99
SF
2525#else
2526#ifdef ASM_OUTPUT_ALIGN_WITH_NOP
2527 ASM_OUTPUT_ALIGN_WITH_NOP (file, align);
9e423e6d 2528#else
40cdfca6 2529 ASM_OUTPUT_ALIGN (file, align);
8e16ab99 2530#endif
9e423e6d 2531#endif
40cdfca6 2532 }
de7987a6 2533 }
3cf2715d 2534 CC_STATUS_INIT;
03ffa171 2535
725730f2 2536 if (!DECL_IGNORED_P (current_function_decl) && LABEL_NAME (insn))
f630fc6a 2537 debug_hooks->label (as_a <rtx_code_label *> (insn));
e1772ac0 2538
bad4f40b 2539 app_disable ();
b2a6a2fb 2540
0676c393
MM
2541 /* If this label is followed by a jump-table, make sure we put
2542 the label in the read-only section. Also possibly write the
2543 label and jump table together. */
d305ca88
RS
2544 table = jump_table_for_label (as_a <rtx_code_label *> (insn));
2545 if (table)
3cf2715d 2546 {
e0d80184 2547#if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
0676c393
MM
2548 /* In this case, the case vector is being moved by the
2549 target, so don't output the label at all. Leave that
2550 to the back end macros. */
e0d80184 2551#else
0676c393
MM
2552 if (! JUMP_TABLES_IN_TEXT_SECTION)
2553 {
2554 int log_align;
340f7e7c 2555
0676c393
MM
2556 switch_to_section (targetm.asm_out.function_rodata_section
2557 (current_function_decl));
340f7e7c
RH
2558
2559#ifdef ADDR_VEC_ALIGN
d305ca88 2560 log_align = ADDR_VEC_ALIGN (table);
340f7e7c 2561#else
0676c393 2562 log_align = exact_log2 (BIGGEST_ALIGNMENT / BITS_PER_UNIT);
340f7e7c 2563#endif
0676c393
MM
2564 ASM_OUTPUT_ALIGN (file, log_align);
2565 }
2566 else
2567 switch_to_section (current_function_section ());
75197b37 2568
3cf2715d 2569#ifdef ASM_OUTPUT_CASE_LABEL
d305ca88 2570 ASM_OUTPUT_CASE_LABEL (file, "L", CODE_LABEL_NUMBER (insn), table);
3cf2715d 2571#else
0676c393 2572 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn));
e0d80184 2573#endif
3cf2715d 2574#endif
0676c393 2575 break;
3cf2715d 2576 }
0dc36574
ZW
2577 if (LABEL_ALT_ENTRY_P (insn))
2578 output_alternate_entry_point (file, insn);
8cd0faaf 2579 else
5fd9b178 2580 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn));
3cf2715d
DE
2581 break;
2582
2583 default:
2584 {
b3694847 2585 rtx body = PATTERN (insn);
3cf2715d 2586 int insn_code_number;
48c54229 2587 const char *templ;
96a95ac1
AO
2588 bool is_stmt, *is_stmt_p;
2589
2590 if (MAY_HAVE_DEBUG_MARKER_INSNS && cfun->debug_nonbind_markers)
2591 {
2592 is_stmt = false;
2593 is_stmt_p = NULL;
2594 }
2595 else
2596 is_stmt_p = &is_stmt;
3cf2715d 2597
9a1a4737
PB
2598 /* Reset this early so it is correct for ASM statements. */
2599 current_insn_predicate = NULL_RTX;
2929029c 2600
3cf2715d
DE
2601 /* An INSN, JUMP_INSN or CALL_INSN.
2602 First check for special kinds that recog doesn't recognize. */
2603
6614fd40 2604 if (GET_CODE (body) == USE /* These are just declarations. */
3cf2715d
DE
2605 || GET_CODE (body) == CLOBBER)
2606 break;
2607
f1e52ed6 2608#if HAVE_cc0
4928181c
SB
2609 {
2610 /* If there is a REG_CC_SETTER note on this insn, it means that
2611 the setting of the condition code was done in the delay slot
2612 of the insn that branched here. So recover the cc status
2613 from the insn that set it. */
3cf2715d 2614
4928181c
SB
2615 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2616 if (note)
2617 {
647d790d
DM
2618 rtx_insn *other = as_a <rtx_insn *> (XEXP (note, 0));
2619 NOTICE_UPDATE_CC (PATTERN (other), other);
4928181c
SB
2620 cc_prev_status = cc_status;
2621 }
2622 }
3cf2715d
DE
2623#endif
2624
2625 /* Detect insns that are really jump-tables
2626 and output them as such. */
2627
34f0d87a 2628 if (JUMP_TABLE_DATA_P (insn))
3cf2715d 2629 {
7f7f8214 2630#if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC))
b3694847 2631 int vlen, idx;
7f7f8214 2632#endif
3cf2715d 2633
b2a6a2fb 2634 if (! JUMP_TABLES_IN_TEXT_SECTION)
d6b5193b
RS
2635 switch_to_section (targetm.asm_out.function_rodata_section
2636 (current_function_decl));
b2a6a2fb 2637 else
d6b5193b 2638 switch_to_section (current_function_section ());
b2a6a2fb 2639
bad4f40b 2640 app_disable ();
3cf2715d 2641
e0d80184
DM
2642#if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2643 if (GET_CODE (body) == ADDR_VEC)
2644 {
2645#ifdef ASM_OUTPUT_ADDR_VEC
2646 ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn), body);
2647#else
0bccc606 2648 gcc_unreachable ();
e0d80184
DM
2649#endif
2650 }
2651 else
2652 {
2653#ifdef ASM_OUTPUT_ADDR_DIFF_VEC
2654 ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn), body);
2655#else
0bccc606 2656 gcc_unreachable ();
e0d80184
DM
2657#endif
2658 }
2659#else
3cf2715d
DE
2660 vlen = XVECLEN (body, GET_CODE (body) == ADDR_DIFF_VEC);
2661 for (idx = 0; idx < vlen; idx++)
2662 {
2663 if (GET_CODE (body) == ADDR_VEC)
2664 {
2665#ifdef ASM_OUTPUT_ADDR_VEC_ELT
2666 ASM_OUTPUT_ADDR_VEC_ELT
2667 (file, CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 0, idx), 0)));
2668#else
0bccc606 2669 gcc_unreachable ();
3cf2715d
DE
2670#endif
2671 }
2672 else
2673 {
2674#ifdef ASM_OUTPUT_ADDR_DIFF_ELT
2675 ASM_OUTPUT_ADDR_DIFF_ELT
2676 (file,
33f7f353 2677 body,
3cf2715d
DE
2678 CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 1, idx), 0)),
2679 CODE_LABEL_NUMBER (XEXP (XEXP (body, 0), 0)));
2680#else
0bccc606 2681 gcc_unreachable ();
3cf2715d
DE
2682#endif
2683 }
2684 }
2685#ifdef ASM_OUTPUT_CASE_END
2686 ASM_OUTPUT_CASE_END (file,
2687 CODE_LABEL_NUMBER (PREV_INSN (insn)),
2688 insn);
e0d80184 2689#endif
3cf2715d
DE
2690#endif
2691
d6b5193b 2692 switch_to_section (current_function_section ());
3cf2715d 2693
bd2b9f1e
AO
2694 if (debug_variable_location_views
2695 && !DECL_IGNORED_P (current_function_decl))
2696 debug_hooks->var_location (insn);
2697
3cf2715d
DE
2698 break;
2699 }
0435312e
JH
2700 /* Output this line note if it is the first or the last line
2701 note in a row. */
725730f2 2702 if (!DECL_IGNORED_P (current_function_decl)
96a95ac1 2703 && notice_source_line (insn, is_stmt_p))
82f72146
DM
2704 {
2705 if (flag_verbose_asm)
2706 asm_show_source (last_filename, last_linenum);
497b7c47
JJ
2707 (*debug_hooks->source_line) (last_linenum, last_columnnum,
2708 last_filename, last_discriminator,
2709 is_stmt);
bd2b9f1e 2710 clear_next_view_needed (seen);
82f72146 2711 }
bd2b9f1e
AO
2712 else
2713 maybe_output_next_view (seen);
2714
2715 gcc_checking_assert (!DEBUG_INSN_P (insn));
3cf2715d 2716
93671519
BE
2717 if (GET_CODE (body) == PARALLEL
2718 && GET_CODE (XVECEXP (body, 0, 0)) == ASM_INPUT)
2719 body = XVECEXP (body, 0, 0);
2720
3cf2715d
DE
2721 if (GET_CODE (body) == ASM_INPUT)
2722 {
36d7136e
RH
2723 const char *string = XSTR (body, 0);
2724
3cf2715d
DE
2725 /* There's no telling what that did to the condition codes. */
2726 CC_STATUS_INIT;
36d7136e
RH
2727
2728 if (string[0])
3cf2715d 2729 {
5ffeb913 2730 expanded_location loc;
bff4b63d 2731
3a694d86 2732 app_enable ();
5ffeb913 2733 loc = expand_location (ASM_INPUT_SOURCE_LOCATION (body));
0de2ae02 2734 if (*loc.file && loc.line)
bff4b63d
AO
2735 fprintf (asm_out_file, "%s %i \"%s\" 1\n",
2736 ASM_COMMENT_START, loc.line, loc.file);
36d7136e 2737 fprintf (asm_out_file, "\t%s\n", string);
03943c05
AO
2738#if HAVE_AS_LINE_ZERO
2739 if (*loc.file && loc.line)
bff4b63d 2740 fprintf (asm_out_file, "%s 0 \"\" 2\n", ASM_COMMENT_START);
03943c05 2741#endif
3cf2715d 2742 }
3cf2715d
DE
2743 break;
2744 }
2745
2746 /* Detect `asm' construct with operands. */
2747 if (asm_noperands (body) >= 0)
2748 {
22bf4422 2749 unsigned int noperands = asm_noperands (body);
1b4572a8 2750 rtx *ops = XALLOCAVEC (rtx, noperands);
3cce094d 2751 const char *string;
bff4b63d 2752 location_t loc;
5ffeb913 2753 expanded_location expanded;
3cf2715d
DE
2754
2755 /* There's no telling what that did to the condition codes. */
2756 CC_STATUS_INIT;
3cf2715d 2757
3cf2715d 2758 /* Get out the operand values. */
bff4b63d 2759 string = decode_asm_operands (body, ops, NULL, NULL, NULL, &loc);
41129be2 2760 /* Inhibit dying on what would otherwise be compiler bugs. */
3cf2715d
DE
2761 insn_noperands = noperands;
2762 this_is_asm_operands = insn;
5ffeb913 2763 expanded = expand_location (loc);
3cf2715d 2764
ad7e39ca
AO
2765#ifdef FINAL_PRESCAN_INSN
2766 FINAL_PRESCAN_INSN (insn, ops, insn_noperands);
2767#endif
2768
3cf2715d 2769 /* Output the insn using them. */
36d7136e
RH
2770 if (string[0])
2771 {
3a694d86 2772 app_enable ();
5ffeb913 2773 if (expanded.file && expanded.line)
bff4b63d 2774 fprintf (asm_out_file, "%s %i \"%s\" 1\n",
5ffeb913 2775 ASM_COMMENT_START, expanded.line, expanded.file);
36d7136e 2776 output_asm_insn (string, ops);
03943c05 2777#if HAVE_AS_LINE_ZERO
5ffeb913 2778 if (expanded.file && expanded.line)
bff4b63d 2779 fprintf (asm_out_file, "%s 0 \"\" 2\n", ASM_COMMENT_START);
03943c05 2780#endif
36d7136e
RH
2781 }
2782
1afc5373
CF
2783 if (targetm.asm_out.final_postscan_insn)
2784 targetm.asm_out.final_postscan_insn (file, insn, ops,
2785 insn_noperands);
2786
3cf2715d
DE
2787 this_is_asm_operands = 0;
2788 break;
2789 }
2790
bad4f40b 2791 app_disable ();
3cf2715d 2792
e429a50b 2793 if (rtx_sequence *seq = dyn_cast <rtx_sequence *> (body))
3cf2715d
DE
2794 {
2795 /* A delayed-branch sequence */
b3694847 2796 int i;
3cf2715d 2797
b32d5189 2798 final_sequence = seq;
3cf2715d
DE
2799
2800 /* The first insn in this SEQUENCE might be a JUMP_INSN that will
2801 force the restoration of a comparison that was previously
2802 thought unnecessary. If that happens, cancel this sequence
2803 and cause that insn to be restored. */
2804
e429a50b
DM
2805 next = final_scan_insn (seq->insn (0), file, 0, 1, seen);
2806 if (next != seq->insn (1))
3cf2715d
DE
2807 {
2808 final_sequence = 0;
2809 return next;
2810 }
2811
e429a50b 2812 for (i = 1; i < seq->len (); i++)
c7eee2df 2813 {
e429a50b 2814 rtx_insn *insn = seq->insn (i);
fa7af581 2815 rtx_insn *next = NEXT_INSN (insn);
c7eee2df
RK
2816 /* We loop in case any instruction in a delay slot gets
2817 split. */
2818 do
c9d691e9 2819 insn = final_scan_insn (insn, file, 0, 1, seen);
c7eee2df
RK
2820 while (insn != next);
2821 }
3cf2715d
DE
2822#ifdef DBR_OUTPUT_SEQEND
2823 DBR_OUTPUT_SEQEND (file);
2824#endif
2825 final_sequence = 0;
2826
2827 /* If the insn requiring the delay slot was a CALL_INSN, the
2828 insns in the delay slot are actually executed before the
2829 called function. Hence we don't preserve any CC-setting
2830 actions in these insns and the CC must be marked as being
2831 clobbered by the function. */
e429a50b 2832 if (CALL_P (seq->insn (0)))
b729186a
JL
2833 {
2834 CC_STATUS_INIT;
2835 }
3cf2715d
DE
2836 break;
2837 }
2838
2839 /* We have a real machine instruction as rtl. */
2840
2841 body = PATTERN (insn);
2842
f1e52ed6 2843#if HAVE_cc0
f5d927c0 2844 set = single_set (insn);
b88c92cc 2845
3cf2715d
DE
2846 /* Check for redundant test and compare instructions
2847 (when the condition codes are already set up as desired).
2848 This is done only when optimizing; if not optimizing,
2849 it should be possible for the user to alter a variable
2850 with the debugger in between statements
2851 and the next statement should reexamine the variable
2852 to compute the condition codes. */
2853
46625112 2854 if (optimize_p)
3cf2715d 2855 {
30f5e9f5
RK
2856 if (set
2857 && GET_CODE (SET_DEST (set)) == CC0
2858 && insn != last_ignored_compare)
3cf2715d 2859 {
f90b7a5a 2860 rtx src1, src2;
30f5e9f5 2861 if (GET_CODE (SET_SRC (set)) == SUBREG)
55a2c322 2862 SET_SRC (set) = alter_subreg (&SET_SRC (set), true);
f90b7a5a
PB
2863
2864 src1 = SET_SRC (set);
2865 src2 = NULL_RTX;
2866 if (GET_CODE (SET_SRC (set)) == COMPARE)
30f5e9f5
RK
2867 {
2868 if (GET_CODE (XEXP (SET_SRC (set), 0)) == SUBREG)
2869 XEXP (SET_SRC (set), 0)
55a2c322 2870 = alter_subreg (&XEXP (SET_SRC (set), 0), true);
30f5e9f5
RK
2871 if (GET_CODE (XEXP (SET_SRC (set), 1)) == SUBREG)
2872 XEXP (SET_SRC (set), 1)
55a2c322 2873 = alter_subreg (&XEXP (SET_SRC (set), 1), true);
f90b7a5a
PB
2874 if (XEXP (SET_SRC (set), 1)
2875 == CONST0_RTX (GET_MODE (XEXP (SET_SRC (set), 0))))
2876 src2 = XEXP (SET_SRC (set), 0);
30f5e9f5
RK
2877 }
2878 if ((cc_status.value1 != 0
f90b7a5a 2879 && rtx_equal_p (src1, cc_status.value1))
30f5e9f5 2880 || (cc_status.value2 != 0
f90b7a5a
PB
2881 && rtx_equal_p (src1, cc_status.value2))
2882 || (src2 != 0 && cc_status.value1 != 0
2883 && rtx_equal_p (src2, cc_status.value1))
2884 || (src2 != 0 && cc_status.value2 != 0
2885 && rtx_equal_p (src2, cc_status.value2)))
3cf2715d 2886 {
30f5e9f5 2887 /* Don't delete insn if it has an addressing side-effect. */
ff81832f 2888 if (! FIND_REG_INC_NOTE (insn, NULL_RTX)
30f5e9f5
RK
2889 /* or if anything in it is volatile. */
2890 && ! volatile_refs_p (PATTERN (insn)))
2891 {
2892 /* We don't really delete the insn; just ignore it. */
2893 last_ignored_compare = insn;
2894 break;
2895 }
3cf2715d
DE
2896 }
2897 }
2898 }
3cf2715d 2899
3cf2715d
DE
2900 /* If this is a conditional branch, maybe modify it
2901 if the cc's are in a nonstandard state
2902 so that it accomplishes the same thing that it would
2903 do straightforwardly if the cc's were set up normally. */
2904
2905 if (cc_status.flags != 0
4b4bf941 2906 && JUMP_P (insn)
3cf2715d
DE
2907 && GET_CODE (body) == SET
2908 && SET_DEST (body) == pc_rtx
2909 && GET_CODE (SET_SRC (body)) == IF_THEN_ELSE
ec8e098d 2910 && COMPARISON_P (XEXP (SET_SRC (body), 0))
c9d691e9 2911 && XEXP (XEXP (SET_SRC (body), 0), 0) == cc0_rtx)
3cf2715d
DE
2912 {
2913 /* This function may alter the contents of its argument
2914 and clear some of the cc_status.flags bits.
2915 It may also return 1 meaning condition now always true
2916 or -1 meaning condition now always false
2917 or 2 meaning condition nontrivial but altered. */
b3694847 2918 int result = alter_cond (XEXP (SET_SRC (body), 0));
3cf2715d
DE
2919 /* If condition now has fixed value, replace the IF_THEN_ELSE
2920 with its then-operand or its else-operand. */
2921 if (result == 1)
2922 SET_SRC (body) = XEXP (SET_SRC (body), 1);
2923 if (result == -1)
2924 SET_SRC (body) = XEXP (SET_SRC (body), 2);
2925
2926 /* The jump is now either unconditional or a no-op.
2927 If it has become a no-op, don't try to output it.
2928 (It would not be recognized.) */
2929 if (SET_SRC (body) == pc_rtx)
2930 {
ca6c03ca 2931 delete_insn (insn);
3cf2715d
DE
2932 break;
2933 }
26898771 2934 else if (ANY_RETURN_P (SET_SRC (body)))
3cf2715d
DE
2935 /* Replace (set (pc) (return)) with (return). */
2936 PATTERN (insn) = body = SET_SRC (body);
2937
2938 /* Rerecognize the instruction if it has changed. */
2939 if (result != 0)
2940 INSN_CODE (insn) = -1;
2941 }
2942
604e4ce3 2943 /* If this is a conditional trap, maybe modify it if the cc's
604e4ce3
KH
2944 are in a nonstandard state so that it accomplishes the same
2945 thing that it would do straightforwardly if the cc's were
2946 set up normally. */
2947 if (cc_status.flags != 0
2948 && NONJUMP_INSN_P (insn)
2949 && GET_CODE (body) == TRAP_IF
2950 && COMPARISON_P (TRAP_CONDITION (body))
2951 && XEXP (TRAP_CONDITION (body), 0) == cc0_rtx)
2952 {
2953 /* This function may alter the contents of its argument
2954 and clear some of the cc_status.flags bits.
2955 It may also return 1 meaning condition now always true
2956 or -1 meaning condition now always false
2957 or 2 meaning condition nontrivial but altered. */
2958 int result = alter_cond (TRAP_CONDITION (body));
2959
2960 /* If TRAP_CONDITION has become always false, delete the
2961 instruction. */
2962 if (result == -1)
2963 {
2964 delete_insn (insn);
2965 break;
2966 }
2967
2968 /* If TRAP_CONDITION has become always true, replace
2969 TRAP_CONDITION with const_true_rtx. */
2970 if (result == 1)
2971 TRAP_CONDITION (body) = const_true_rtx;
2972
2973 /* Rerecognize the instruction if it has changed. */
2974 if (result != 0)
2975 INSN_CODE (insn) = -1;
2976 }
2977
3cf2715d 2978 /* Make same adjustments to instructions that examine the
462da2af
SC
2979 condition codes without jumping and instructions that
2980 handle conditional moves (if this machine has either one). */
3cf2715d
DE
2981
2982 if (cc_status.flags != 0
b88c92cc 2983 && set != 0)
3cf2715d 2984 {
462da2af 2985 rtx cond_rtx, then_rtx, else_rtx;
f5d927c0 2986
4b4bf941 2987 if (!JUMP_P (insn)
b88c92cc 2988 && GET_CODE (SET_SRC (set)) == IF_THEN_ELSE)
462da2af 2989 {
b88c92cc
RK
2990 cond_rtx = XEXP (SET_SRC (set), 0);
2991 then_rtx = XEXP (SET_SRC (set), 1);
2992 else_rtx = XEXP (SET_SRC (set), 2);
462da2af
SC
2993 }
2994 else
2995 {
b88c92cc 2996 cond_rtx = SET_SRC (set);
462da2af
SC
2997 then_rtx = const_true_rtx;
2998 else_rtx = const0_rtx;
2999 }
f5d927c0 3000
511d31d8
AS
3001 if (COMPARISON_P (cond_rtx)
3002 && XEXP (cond_rtx, 0) == cc0_rtx)
3cf2715d 3003 {
511d31d8
AS
3004 int result;
3005 result = alter_cond (cond_rtx);
3006 if (result == 1)
3007 validate_change (insn, &SET_SRC (set), then_rtx, 0);
3008 else if (result == -1)
3009 validate_change (insn, &SET_SRC (set), else_rtx, 0);
3010 else if (result == 2)
3011 INSN_CODE (insn) = -1;
3012 if (SET_DEST (set) == SET_SRC (set))
3013 delete_insn (insn);
3cf2715d
DE
3014 }
3015 }
462da2af 3016
3cf2715d
DE
3017#endif
3018
3019 /* Do machine-specific peephole optimizations if desired. */
3020
d87834de 3021 if (HAVE_peephole && optimize_p && !flag_no_peephole && !nopeepholes)
3cf2715d 3022 {
fa7af581 3023 rtx_insn *next = peephole (insn);
3cf2715d
DE
3024 /* When peepholing, if there were notes within the peephole,
3025 emit them before the peephole. */
3026 if (next != 0 && next != NEXT_INSN (insn))
3027 {
fa7af581 3028 rtx_insn *note, *prev = PREV_INSN (insn);
3cf2715d
DE
3029
3030 for (note = NEXT_INSN (insn); note != next;
3031 note = NEXT_INSN (note))
46625112 3032 final_scan_insn (note, file, optimize_p, nopeepholes, seen);
a2785739
ILT
3033
3034 /* Put the notes in the proper position for a later
3035 rescan. For example, the SH target can do this
3036 when generating a far jump in a delayed branch
3037 sequence. */
3038 note = NEXT_INSN (insn);
0f82e5c9
DM
3039 SET_PREV_INSN (note) = prev;
3040 SET_NEXT_INSN (prev) = note;
3041 SET_NEXT_INSN (PREV_INSN (next)) = insn;
3042 SET_PREV_INSN (insn) = PREV_INSN (next);
3043 SET_NEXT_INSN (insn) = next;
3044 SET_PREV_INSN (next) = insn;
3cf2715d
DE
3045 }
3046
3047 /* PEEPHOLE might have changed this. */
3048 body = PATTERN (insn);
3049 }
3050
3051 /* Try to recognize the instruction.
3052 If successful, verify that the operands satisfy the
3053 constraints for the instruction. Crash if they don't,
3054 since `reload' should have changed them so that they do. */
3055
3056 insn_code_number = recog_memoized (insn);
0304f787 3057 cleanup_subreg_operands (insn);
3cf2715d 3058
8c503f0d
SB
3059 /* Dump the insn in the assembly for debugging (-dAP).
3060 If the final dump is requested as slim RTL, dump slim
3061 RTL to the assembly file also. */
dd3f0101
KH
3062 if (flag_dump_rtl_in_asm)
3063 {
3064 print_rtx_head = ASM_COMMENT_START;
8c503f0d
SB
3065 if (! (dump_flags & TDF_SLIM))
3066 print_rtl_single (asm_out_file, insn);
3067 else
3068 dump_insn_slim (asm_out_file, insn);
dd3f0101
KH
3069 print_rtx_head = "";
3070 }
b9f22704 3071
daca1a96 3072 if (! constrain_operands_cached (insn, 1))
3cf2715d 3073 fatal_insn_not_found (insn);
3cf2715d
DE
3074
3075 /* Some target machines need to prescan each insn before
3076 it is output. */
3077
3078#ifdef FINAL_PRESCAN_INSN
1ccbefce 3079 FINAL_PRESCAN_INSN (insn, recog_data.operand, recog_data.n_operands);
3cf2715d
DE
3080#endif
3081
2929029c
WG
3082 if (targetm.have_conditional_execution ()
3083 && GET_CODE (PATTERN (insn)) == COND_EXEC)
afe48e06 3084 current_insn_predicate = COND_EXEC_TEST (PATTERN (insn));
afe48e06 3085
f1e52ed6 3086#if HAVE_cc0
3cf2715d
DE
3087 cc_prev_status = cc_status;
3088
3089 /* Update `cc_status' for this instruction.
3090 The instruction's output routine may change it further.
3091 If the output routine for a jump insn needs to depend
3092 on the cc status, it should look at cc_prev_status. */
3093
3094 NOTICE_UPDATE_CC (body, insn);
3095#endif
3096
b1a9f6a0 3097 current_output_insn = debug_insn = insn;
3cf2715d 3098
4bbf910e 3099 /* Find the proper template for this insn. */
48c54229 3100 templ = get_insn_template (insn_code_number, insn);
3cf2715d 3101
4bbf910e
RH
3102 /* If the C code returns 0, it means that it is a jump insn
3103 which follows a deleted test insn, and that test insn
3104 needs to be reinserted. */
48c54229 3105 if (templ == 0)
3cf2715d 3106 {
fa7af581 3107 rtx_insn *prev;
efd0378b 3108
0bccc606 3109 gcc_assert (prev_nonnote_insn (insn) == last_ignored_compare);
efd0378b
HPN
3110
3111 /* We have already processed the notes between the setter and
3112 the user. Make sure we don't process them again, this is
3113 particularly important if one of the notes is a block
3114 scope note or an EH note. */
3115 for (prev = insn;
3116 prev != last_ignored_compare;
3117 prev = PREV_INSN (prev))
3118 {
4b4bf941 3119 if (NOTE_P (prev))
ca6c03ca 3120 delete_insn (prev); /* Use delete_note. */
efd0378b
HPN
3121 }
3122
3123 return prev;
3cf2715d
DE
3124 }
3125
3126 /* If the template is the string "#", it means that this insn must
3127 be split. */
48c54229 3128 if (templ[0] == '#' && templ[1] == '\0')
3cf2715d 3129 {
fa7af581 3130 rtx_insn *new_rtx = try_split (body, insn, 0);
3cf2715d
DE
3131
3132 /* If we didn't split the insn, go away. */
48c54229 3133 if (new_rtx == insn && PATTERN (new_rtx) == body)
c725bd79 3134 fatal_insn ("could not split insn", insn);
f5d927c0 3135
d327457f
JR
3136 /* If we have a length attribute, this instruction should have
3137 been split in shorten_branches, to ensure that we would have
3138 valid length info for the splitees. */
3139 gcc_assert (!HAVE_ATTR_length);
3d14e82f 3140
48c54229 3141 return new_rtx;
3cf2715d 3142 }
f5d927c0 3143
951120ea
PB
3144 /* ??? This will put the directives in the wrong place if
3145 get_insn_template outputs assembly directly. However calling it
3146 before get_insn_template breaks if the insns is split. */
3bc6b3e6
RH
3147 if (targetm.asm_out.unwind_emit_before_insn
3148 && targetm.asm_out.unwind_emit)
2784ed9c 3149 targetm.asm_out.unwind_emit (asm_out_file, insn);
3cf2715d 3150
f2834b5d
PMR
3151 rtx_call_insn *call_insn = dyn_cast <rtx_call_insn *> (insn);
3152 if (call_insn != NULL)
f410e1b3 3153 {
fa7af581 3154 rtx x = call_from_call_insn (call_insn);
f410e1b3
RAE
3155 x = XEXP (x, 0);
3156 if (x && MEM_P (x) && GET_CODE (XEXP (x, 0)) == SYMBOL_REF)
3157 {
3158 tree t;
3159 x = XEXP (x, 0);
3160 t = SYMBOL_REF_DECL (x);
3161 if (t)
3162 assemble_external (t);
3163 }
3164 }
3165
951120ea 3166 /* Output assembler code from the template. */
48c54229 3167 output_asm_insn (templ, recog_data.operand);
3cf2715d 3168
1afc5373
CF
3169 /* Some target machines need to postscan each insn after
3170 it is output. */
3171 if (targetm.asm_out.final_postscan_insn)
3172 targetm.asm_out.final_postscan_insn (file, insn, recog_data.operand,
3173 recog_data.n_operands);
3174
3bc6b3e6
RH
3175 if (!targetm.asm_out.unwind_emit_before_insn
3176 && targetm.asm_out.unwind_emit)
3177 targetm.asm_out.unwind_emit (asm_out_file, insn);
3178
f2834b5d
PMR
3179 /* Let the debug info back-end know about this call. We do this only
3180 after the instruction has been emitted because labels that may be
3181 created to reference the call instruction must appear after it. */
bd2b9f1e
AO
3182 if ((debug_variable_location_views || call_insn != NULL)
3183 && !DECL_IGNORED_P (current_function_decl))
f2834b5d
PMR
3184 debug_hooks->var_location (insn);
3185
b1a9f6a0 3186 current_output_insn = debug_insn = 0;
3cf2715d
DE
3187 }
3188 }
3189 return NEXT_INSN (insn);
3190}
e094c0bf
AO
3191
3192/* This is a wrapper around final_scan_insn_1 that allows ports to
3193 call it recursively without a known value for SEEN. The value is
3194 saved at the outermost call, and recovered for recursive calls.
3195 Recursive calls MUST pass NULL, or the same pointer if they can
3196 otherwise get to it. */
3197
3198rtx_insn *
3199final_scan_insn (rtx_insn *insn, FILE *file, int optimize_p,
3200 int nopeepholes, int *seen)
3201{
3202 static int *enclosing_seen;
3203 static int recursion_counter;
3204
3205 gcc_assert (seen || recursion_counter);
3206 gcc_assert (!recursion_counter || !seen || seen == enclosing_seen);
3207
3208 if (!recursion_counter++)
3209 enclosing_seen = seen;
3210 else if (!seen)
3211 seen = enclosing_seen;
3212
3213 rtx_insn *ret = final_scan_insn_1 (insn, file, optimize_p, nopeepholes, seen);
3214
3215 if (!--recursion_counter)
3216 enclosing_seen = NULL;
3217
3218 return ret;
3219}
3220
3cf2715d 3221\f
ed5ef2e4
CC
3222/* Return whether a source line note needs to be emitted before INSN.
3223 Sets IS_STMT to TRUE if the line should be marked as a possible
3224 breakpoint location. */
3cf2715d 3225
0435312e 3226static bool
fa7af581 3227notice_source_line (rtx_insn *insn, bool *is_stmt)
3cf2715d 3228{
d752cfdb 3229 const char *filename;
497b7c47 3230 int linenum, columnnum;
d752cfdb 3231
96a95ac1
AO
3232 if (NOTE_MARKER_P (insn))
3233 {
3234 location_t loc = NOTE_MARKER_LOCATION (insn);
58006663
AO
3235 /* The inline entry markers (gimple, insn, note) carry the
3236 location of the call, because that's what we want to carry
3237 during compilation, but the location we want to output in
3238 debug information for the inline entry point is the location
3239 of the function itself. */
3240 if (NOTE_KIND (insn) == NOTE_INSN_INLINE_ENTRY)
3241 {
3242 tree block = LOCATION_BLOCK (loc);
3243 tree fn = block_ultimate_origin (block);
3244 loc = DECL_SOURCE_LOCATION (fn);
3245 }
96a95ac1
AO
3246 expanded_location xloc = expand_location (loc);
3247 if (xloc.line == 0)
3248 {
3249 gcc_checking_assert (LOCATION_LOCUS (loc) == UNKNOWN_LOCATION
3250 || LOCATION_LOCUS (loc) == BUILTINS_LOCATION);
3251 return false;
3252 }
3253 filename = xloc.file;
3254 linenum = xloc.line;
3255 columnnum = xloc.column;
3256 force_source_line = true;
3257 }
3258 else if (override_filename)
d752cfdb
JJ
3259 {
3260 filename = override_filename;
3261 linenum = override_linenum;
497b7c47 3262 columnnum = override_columnnum;
d752cfdb 3263 }
ffa4602f
EB
3264 else if (INSN_HAS_LOCATION (insn))
3265 {
3266 expanded_location xloc = insn_location (insn);
3267 filename = xloc.file;
3268 linenum = xloc.line;
497b7c47 3269 columnnum = xloc.column;
ffa4602f 3270 }
d752cfdb
JJ
3271 else
3272 {
ffa4602f
EB
3273 filename = NULL;
3274 linenum = 0;
497b7c47 3275 columnnum = 0;
d752cfdb 3276 }
3cf2715d 3277
ed5ef2e4
CC
3278 if (filename == NULL)
3279 return false;
3280
3281 if (force_source_line
3282 || filename != last_filename
497b7c47
JJ
3283 || last_linenum != linenum
3284 || (debug_column_info && last_columnnum != columnnum))
0435312e 3285 {
b8176fe4 3286 force_source_line = false;
0435312e
JH
3287 last_filename = filename;
3288 last_linenum = linenum;
497b7c47 3289 last_columnnum = columnnum;
6c52e687 3290 last_discriminator = discriminator;
96a95ac1
AO
3291 if (is_stmt)
3292 *is_stmt = true;
0435312e
JH
3293 high_block_linenum = MAX (last_linenum, high_block_linenum);
3294 high_function_linenum = MAX (last_linenum, high_function_linenum);
3295 return true;
3296 }
ed5ef2e4
CC
3297
3298 if (SUPPORTS_DISCRIMINATOR && last_discriminator != discriminator)
3299 {
3300 /* If the discriminator changed, but the line number did not,
3301 output the line table entry with is_stmt false so the
3302 debugger does not treat this as a breakpoint location. */
3303 last_discriminator = discriminator;
96a95ac1
AO
3304 if (is_stmt)
3305 *is_stmt = false;
ed5ef2e4
CC
3306 return true;
3307 }
3308
0435312e 3309 return false;
3cf2715d
DE
3310}
3311\f
0304f787
JL
3312/* For each operand in INSN, simplify (subreg (reg)) so that it refers
3313 directly to the desired hard register. */
f5d927c0 3314
0304f787 3315void
647d790d 3316cleanup_subreg_operands (rtx_insn *insn)
0304f787 3317{
f62a15e3 3318 int i;
6fb5fa3c 3319 bool changed = false;
6c698a6d 3320 extract_insn_cached (insn);
1ccbefce 3321 for (i = 0; i < recog_data.n_operands; i++)
0304f787 3322 {
2067c116 3323 /* The following test cannot use recog_data.operand when testing
9f4524f2
RE
3324 for a SUBREG: the underlying object might have been changed
3325 already if we are inside a match_operator expression that
3326 matches the else clause. Instead we test the underlying
3327 expression directly. */
3328 if (GET_CODE (*recog_data.operand_loc[i]) == SUBREG)
6fb5fa3c 3329 {
55a2c322 3330 recog_data.operand[i] = alter_subreg (recog_data.operand_loc[i], true);
6fb5fa3c
DB
3331 changed = true;
3332 }
1ccbefce 3333 else if (GET_CODE (recog_data.operand[i]) == PLUS
04337620 3334 || GET_CODE (recog_data.operand[i]) == MULT
3c0cb5de 3335 || MEM_P (recog_data.operand[i]))
6fb5fa3c 3336 recog_data.operand[i] = walk_alter_subreg (recog_data.operand_loc[i], &changed);
0304f787
JL
3337 }
3338
1ccbefce 3339 for (i = 0; i < recog_data.n_dups; i++)
0304f787 3340 {
1ccbefce 3341 if (GET_CODE (*recog_data.dup_loc[i]) == SUBREG)
6fb5fa3c 3342 {
55a2c322 3343 *recog_data.dup_loc[i] = alter_subreg (recog_data.dup_loc[i], true);
6fb5fa3c
DB
3344 changed = true;
3345 }
1ccbefce 3346 else if (GET_CODE (*recog_data.dup_loc[i]) == PLUS
04337620 3347 || GET_CODE (*recog_data.dup_loc[i]) == MULT
3c0cb5de 3348 || MEM_P (*recog_data.dup_loc[i]))
6fb5fa3c 3349 *recog_data.dup_loc[i] = walk_alter_subreg (recog_data.dup_loc[i], &changed);
0304f787 3350 }
6fb5fa3c 3351 if (changed)
647d790d 3352 df_insn_rescan (insn);
0304f787
JL
3353}
3354
55a2c322
VM
3355/* If X is a SUBREG, try to replace it with a REG or a MEM, based on
3356 the thing it is a subreg of. Do it anyway if FINAL_P. */
3cf2715d
DE
3357
3358rtx
55a2c322 3359alter_subreg (rtx *xp, bool final_p)
3cf2715d 3360{
49d801d3 3361 rtx x = *xp;
b3694847 3362 rtx y = SUBREG_REG (x);
f5963e61 3363
49d801d3
JH
3364 /* simplify_subreg does not remove subreg from volatile references.
3365 We are required to. */
3c0cb5de 3366 if (MEM_P (y))
fd326ba8 3367 {
91914e56 3368 poly_int64 offset = SUBREG_BYTE (x);
fd326ba8
UW
3369
3370 /* For paradoxical subregs on big-endian machines, SUBREG_BYTE
3371 contains 0 instead of the proper offset. See simplify_subreg. */
03a95621 3372 if (paradoxical_subreg_p (x))
90f2b7e2 3373 offset = byte_lowpart_offset (GET_MODE (x), GET_MODE (y));
fd326ba8 3374
55a2c322
VM
3375 if (final_p)
3376 *xp = adjust_address (y, GET_MODE (x), offset);
3377 else
3378 *xp = adjust_address_nv (y, GET_MODE (x), offset);
fd326ba8 3379 }
a50fa76a 3380 else if (REG_P (y) && HARD_REGISTER_P (y))
fea54805 3381 {
48c54229 3382 rtx new_rtx = simplify_subreg (GET_MODE (x), y, GET_MODE (y),
55a2c322 3383 SUBREG_BYTE (x));
fea54805 3384
48c54229
KG
3385 if (new_rtx != 0)
3386 *xp = new_rtx;
55a2c322 3387 else if (final_p && REG_P (y))
fea54805 3388 {
0bccc606 3389 /* Simplify_subreg can't handle some REG cases, but we have to. */
38ae7651 3390 unsigned int regno;
91914e56 3391 poly_int64 offset;
38ae7651
RS
3392
3393 regno = subreg_regno (x);
3394 if (subreg_lowpart_p (x))
3395 offset = byte_lowpart_offset (GET_MODE (x), GET_MODE (y));
3396 else
3397 offset = SUBREG_BYTE (x);
3398 *xp = gen_rtx_REG_offset (y, GET_MODE (x), regno, offset);
fea54805 3399 }
fea54805
RK
3400 }
3401
49d801d3 3402 return *xp;
3cf2715d
DE
3403}
3404
3405/* Do alter_subreg on all the SUBREGs contained in X. */
3406
3407static rtx
6fb5fa3c 3408walk_alter_subreg (rtx *xp, bool *changed)
3cf2715d 3409{
49d801d3 3410 rtx x = *xp;
3cf2715d
DE
3411 switch (GET_CODE (x))
3412 {
3413 case PLUS:
3414 case MULT:
beed8fc0 3415 case AND:
6fb5fa3c
DB
3416 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0), changed);
3417 XEXP (x, 1) = walk_alter_subreg (&XEXP (x, 1), changed);
3cf2715d
DE
3418 break;
3419
3420 case MEM:
beed8fc0 3421 case ZERO_EXTEND:
6fb5fa3c 3422 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0), changed);
3cf2715d
DE
3423 break;
3424
3425 case SUBREG:
6fb5fa3c 3426 *changed = true;
55a2c322 3427 return alter_subreg (xp, true);
f5d927c0 3428
e9a25f70
JL
3429 default:
3430 break;
3cf2715d
DE
3431 }
3432
5bc72aeb 3433 return *xp;
3cf2715d
DE
3434}
3435\f
f1e52ed6 3436#if HAVE_cc0
3cf2715d
DE
3437
3438/* Given BODY, the body of a jump instruction, alter the jump condition
3439 as required by the bits that are set in cc_status.flags.
3440 Not all of the bits there can be handled at this level in all cases.
3441
3442 The value is normally 0.
3443 1 means that the condition has become always true.
3444 -1 means that the condition has become always false.
3445 2 means that COND has been altered. */
3446
3447static int
6cf9ac28 3448alter_cond (rtx cond)
3cf2715d
DE
3449{
3450 int value = 0;
3451
3452 if (cc_status.flags & CC_REVERSED)
3453 {
3454 value = 2;
3455 PUT_CODE (cond, swap_condition (GET_CODE (cond)));
3456 }
3457
3458 if (cc_status.flags & CC_INVERTED)
3459 {
3460 value = 2;
3461 PUT_CODE (cond, reverse_condition (GET_CODE (cond)));
3462 }
3463
3464 if (cc_status.flags & CC_NOT_POSITIVE)
3465 switch (GET_CODE (cond))
3466 {
3467 case LE:
3468 case LEU:
3469 case GEU:
3470 /* Jump becomes unconditional. */
3471 return 1;
3472
3473 case GT:
3474 case GTU:
3475 case LTU:
3476 /* Jump becomes no-op. */
3477 return -1;
3478
3479 case GE:
3480 PUT_CODE (cond, EQ);
3481 value = 2;
3482 break;
3483
3484 case LT:
3485 PUT_CODE (cond, NE);
3486 value = 2;
3487 break;
f5d927c0 3488
e9a25f70
JL
3489 default:
3490 break;
3cf2715d
DE
3491 }
3492
3493 if (cc_status.flags & CC_NOT_NEGATIVE)
3494 switch (GET_CODE (cond))
3495 {
3496 case GE:
3497 case GEU:
3498 /* Jump becomes unconditional. */
3499 return 1;
3500
3501 case LT:
3502 case LTU:
3503 /* Jump becomes no-op. */
3504 return -1;
3505
3506 case LE:
3507 case LEU:
3508 PUT_CODE (cond, EQ);
3509 value = 2;
3510 break;
3511
3512 case GT:
3513 case GTU:
3514 PUT_CODE (cond, NE);
3515 value = 2;
3516 break;
f5d927c0 3517
e9a25f70
JL
3518 default:
3519 break;
3cf2715d
DE
3520 }
3521
3522 if (cc_status.flags & CC_NO_OVERFLOW)
3523 switch (GET_CODE (cond))
3524 {
3525 case GEU:
3526 /* Jump becomes unconditional. */
3527 return 1;
3528
3529 case LEU:
3530 PUT_CODE (cond, EQ);
3531 value = 2;
3532 break;
3533
3534 case GTU:
3535 PUT_CODE (cond, NE);
3536 value = 2;
3537 break;
3538
3539 case LTU:
3540 /* Jump becomes no-op. */
3541 return -1;
f5d927c0 3542
e9a25f70
JL
3543 default:
3544 break;
3cf2715d
DE
3545 }
3546
3547 if (cc_status.flags & (CC_Z_IN_NOT_N | CC_Z_IN_N))
3548 switch (GET_CODE (cond))
3549 {
e9a25f70 3550 default:
0bccc606 3551 gcc_unreachable ();
3cf2715d
DE
3552
3553 case NE:
3554 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? GE : LT);
3555 value = 2;
3556 break;
3557
3558 case EQ:
3559 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? LT : GE);
3560 value = 2;
3561 break;
3562 }
3563
3564 if (cc_status.flags & CC_NOT_SIGNED)
3565 /* The flags are valid if signed condition operators are converted
3566 to unsigned. */
3567 switch (GET_CODE (cond))
3568 {
3569 case LE:
3570 PUT_CODE (cond, LEU);
3571 value = 2;
3572 break;
3573
3574 case LT:
3575 PUT_CODE (cond, LTU);
3576 value = 2;
3577 break;
3578
3579 case GT:
3580 PUT_CODE (cond, GTU);
3581 value = 2;
3582 break;
3583
3584 case GE:
3585 PUT_CODE (cond, GEU);
3586 value = 2;
3587 break;
e9a25f70
JL
3588
3589 default:
3590 break;
3cf2715d
DE
3591 }
3592
3593 return value;
3594}
3595#endif
3596\f
3597/* Report inconsistency between the assembler template and the operands.
3598 In an `asm', it's the user's fault; otherwise, the compiler's fault. */
3599
3600void
4b794eaf 3601output_operand_lossage (const char *cmsgid, ...)
3cf2715d 3602{
a52453cc
PT
3603 char *fmt_string;
3604 char *new_message;
fd478a0a 3605 const char *pfx_str;
e34d07f2 3606 va_list ap;
6cf9ac28 3607
4b794eaf 3608 va_start (ap, cmsgid);
a52453cc 3609
9e637a26 3610 pfx_str = this_is_asm_operands ? _("invalid 'asm': ") : "output_operand: ";
582f770b
UB
3611 fmt_string = xasprintf ("%s%s", pfx_str, _(cmsgid));
3612 new_message = xvasprintf (fmt_string, ap);
dd3f0101 3613
3cf2715d 3614 if (this_is_asm_operands)
a52453cc 3615 error_for_asm (this_is_asm_operands, "%s", new_message);
3cf2715d 3616 else
a52453cc
PT
3617 internal_error ("%s", new_message);
3618
3619 free (fmt_string);
3620 free (new_message);
e34d07f2 3621 va_end (ap);
3cf2715d
DE
3622}
3623\f
3624/* Output of assembler code from a template, and its subroutines. */
3625
0d4903b8
RK
3626/* Annotate the assembly with a comment describing the pattern and
3627 alternative used. */
3628
3629static void
6cf9ac28 3630output_asm_name (void)
0d4903b8
RK
3631{
3632 if (debug_insn)
3633 {
dff125eb
SB
3634 fprintf (asm_out_file, "\t%s %d\t",
3635 ASM_COMMENT_START, INSN_UID (debug_insn));
d327457f 3636
dff125eb
SB
3637 fprintf (asm_out_file, "[c=%d",
3638 insn_cost (debug_insn, optimize_insn_for_speed_p ()));
d327457f 3639 if (HAVE_ATTR_length)
dff125eb 3640 fprintf (asm_out_file, " l=%d",
d327457f 3641 get_attr_length (debug_insn));
dff125eb
SB
3642 fprintf (asm_out_file, "] ");
3643
3644 int num = INSN_CODE (debug_insn);
3645 fprintf (asm_out_file, "%s", insn_data[num].name);
3646 if (insn_data[num].n_alternatives > 1)
3647 fprintf (asm_out_file, "/%d", which_alternative);
d327457f 3648
0d4903b8
RK
3649 /* Clear this so only the first assembler insn
3650 of any rtl insn will get the special comment for -dp. */
3651 debug_insn = 0;
3652 }
3653}
3654
998d7deb
RH
3655/* If OP is a REG or MEM and we can find a MEM_EXPR corresponding to it
3656 or its address, return that expr . Set *PADDRESSP to 1 if the expr
c5adc06a
RK
3657 corresponds to the address of the object and 0 if to the object. */
3658
3659static tree
6cf9ac28 3660get_mem_expr_from_op (rtx op, int *paddressp)
c5adc06a 3661{
998d7deb 3662 tree expr;
c5adc06a
RK
3663 int inner_addressp;
3664
3665 *paddressp = 0;
3666
f8cfc6aa 3667 if (REG_P (op))
a560d4d4 3668 return REG_EXPR (op);
3c0cb5de 3669 else if (!MEM_P (op))
c5adc06a
RK
3670 return 0;
3671
998d7deb
RH
3672 if (MEM_EXPR (op) != 0)
3673 return MEM_EXPR (op);
c5adc06a
RK
3674
3675 /* Otherwise we have an address, so indicate it and look at the address. */
3676 *paddressp = 1;
3677 op = XEXP (op, 0);
3678
3679 /* First check if we have a decl for the address, then look at the right side
3680 if it is a PLUS. Otherwise, strip off arithmetic and keep looking.
3681 But don't allow the address to itself be indirect. */
998d7deb
RH
3682 if ((expr = get_mem_expr_from_op (op, &inner_addressp)) && ! inner_addressp)
3683 return expr;
c5adc06a 3684 else if (GET_CODE (op) == PLUS
998d7deb
RH
3685 && (expr = get_mem_expr_from_op (XEXP (op, 1), &inner_addressp)))
3686 return expr;
c5adc06a 3687
481683e1 3688 while (UNARY_P (op)
ec8e098d 3689 || GET_RTX_CLASS (GET_CODE (op)) == RTX_BIN_ARITH)
c5adc06a
RK
3690 op = XEXP (op, 0);
3691
998d7deb
RH
3692 expr = get_mem_expr_from_op (op, &inner_addressp);
3693 return inner_addressp ? 0 : expr;
c5adc06a 3694}
ff81832f 3695
4f9b4029
RK
3696/* Output operand names for assembler instructions. OPERANDS is the
3697 operand vector, OPORDER is the order to write the operands, and NOPS
3698 is the number of operands to write. */
3699
3700static void
6cf9ac28 3701output_asm_operand_names (rtx *operands, int *oporder, int nops)
4f9b4029
RK
3702{
3703 int wrote = 0;
3704 int i;
3705
3706 for (i = 0; i < nops; i++)
3707 {
3708 int addressp;
a560d4d4
JH
3709 rtx op = operands[oporder[i]];
3710 tree expr = get_mem_expr_from_op (op, &addressp);
4f9b4029 3711
a560d4d4
JH
3712 fprintf (asm_out_file, "%c%s",
3713 wrote ? ',' : '\t', wrote ? "" : ASM_COMMENT_START);
3714 wrote = 1;
998d7deb 3715 if (expr)
4f9b4029 3716 {
a560d4d4 3717 fprintf (asm_out_file, "%s",
998d7deb
RH
3718 addressp ? "*" : "");
3719 print_mem_expr (asm_out_file, expr);
4f9b4029
RK
3720 wrote = 1;
3721 }
a560d4d4
JH
3722 else if (REG_P (op) && ORIGINAL_REGNO (op)
3723 && ORIGINAL_REGNO (op) != REGNO (op))
3724 fprintf (asm_out_file, " tmp%i", ORIGINAL_REGNO (op));
4f9b4029
RK
3725 }
3726}
3727
d1658619
SP
3728#ifdef ASSEMBLER_DIALECT
3729/* Helper function to parse assembler dialects in the asm string.
3730 This is called from output_asm_insn and asm_fprintf. */
3731static const char *
3732do_assembler_dialects (const char *p, int *dialect)
3733{
3734 char c = *(p - 1);
3735
3736 switch (c)
3737 {
3738 case '{':
3739 {
3740 int i;
3741
3742 if (*dialect)
3743 output_operand_lossage ("nested assembly dialect alternatives");
3744 else
3745 *dialect = 1;
3746
3747 /* If we want the first dialect, do nothing. Otherwise, skip
3748 DIALECT_NUMBER of strings ending with '|'. */
3749 for (i = 0; i < dialect_number; i++)
3750 {
382522cb
MK
3751 while (*p && *p != '}')
3752 {
3753 if (*p == '|')
3754 {
3755 p++;
3756 break;
3757 }
3758
3759 /* Skip over any character after a percent sign. */
3760 if (*p == '%')
3761 p++;
3762 if (*p)
3763 p++;
3764 }
3765
d1658619
SP
3766 if (*p == '}')
3767 break;
3768 }
3769
3770 if (*p == '\0')
3771 output_operand_lossage ("unterminated assembly dialect alternative");
3772 }
3773 break;
3774
3775 case '|':
3776 if (*dialect)
3777 {
3778 /* Skip to close brace. */
3779 do
3780 {
3781 if (*p == '\0')
3782 {
3783 output_operand_lossage ("unterminated assembly dialect alternative");
3784 break;
3785 }
382522cb
MK
3786
3787 /* Skip over any character after a percent sign. */
3788 if (*p == '%' && p[1])
3789 {
3790 p += 2;
3791 continue;
3792 }
3793
3794 if (*p++ == '}')
3795 break;
d1658619 3796 }
382522cb
MK
3797 while (1);
3798
d1658619
SP
3799 *dialect = 0;
3800 }
3801 else
3802 putc (c, asm_out_file);
3803 break;
3804
3805 case '}':
3806 if (! *dialect)
3807 putc (c, asm_out_file);
3808 *dialect = 0;
3809 break;
3810 default:
3811 gcc_unreachable ();
3812 }
3813
3814 return p;
3815}
3816#endif
3817
3cf2715d
DE
3818/* Output text from TEMPLATE to the assembler output file,
3819 obeying %-directions to substitute operands taken from
3820 the vector OPERANDS.
3821
3822 %N (for N a digit) means print operand N in usual manner.
3823 %lN means require operand N to be a CODE_LABEL or LABEL_REF
3824 and print the label name with no punctuation.
3825 %cN means require operand N to be a constant
3826 and print the constant expression with no punctuation.
3827 %aN means expect operand N to be a memory address
3828 (not a memory reference!) and print a reference
3829 to that address.
3830 %nN means expect operand N to be a constant
3831 and print a constant expression for minus the value
3832 of the operand, with no other punctuation. */
3833
3834void
48c54229 3835output_asm_insn (const char *templ, rtx *operands)
3cf2715d 3836{
b3694847
SS
3837 const char *p;
3838 int c;
8554d9a4
JJ
3839#ifdef ASSEMBLER_DIALECT
3840 int dialect = 0;
3841#endif
0d4903b8 3842 int oporder[MAX_RECOG_OPERANDS];
4f9b4029 3843 char opoutput[MAX_RECOG_OPERANDS];
0d4903b8 3844 int ops = 0;
3cf2715d
DE
3845
3846 /* An insn may return a null string template
3847 in a case where no assembler code is needed. */
48c54229 3848 if (*templ == 0)
3cf2715d
DE
3849 return;
3850
4f9b4029 3851 memset (opoutput, 0, sizeof opoutput);
48c54229 3852 p = templ;
3cf2715d
DE
3853 putc ('\t', asm_out_file);
3854
3855#ifdef ASM_OUTPUT_OPCODE
3856 ASM_OUTPUT_OPCODE (asm_out_file, p);
3857#endif
3858
b729186a 3859 while ((c = *p++))
3cf2715d
DE
3860 switch (c)
3861 {
3cf2715d 3862 case '\n':
4f9b4029
RK
3863 if (flag_verbose_asm)
3864 output_asm_operand_names (operands, oporder, ops);
0d4903b8
RK
3865 if (flag_print_asm_name)
3866 output_asm_name ();
3867
4f9b4029
RK
3868 ops = 0;
3869 memset (opoutput, 0, sizeof opoutput);
3870
3cf2715d 3871 putc (c, asm_out_file);
cb649530 3872#ifdef ASM_OUTPUT_OPCODE
3cf2715d
DE
3873 while ((c = *p) == '\t')
3874 {
3875 putc (c, asm_out_file);
3876 p++;
3877 }
3878 ASM_OUTPUT_OPCODE (asm_out_file, p);
3cf2715d 3879#endif
cb649530 3880 break;
3cf2715d
DE
3881
3882#ifdef ASSEMBLER_DIALECT
3883 case '{':
3cf2715d 3884 case '}':
d1658619
SP
3885 case '|':
3886 p = do_assembler_dialects (p, &dialect);
3cf2715d
DE
3887 break;
3888#endif
3889
3890 case '%':
382522cb
MK
3891 /* %% outputs a single %. %{, %} and %| print {, } and | respectively
3892 if ASSEMBLER_DIALECT defined and these characters have a special
3893 meaning as dialect delimiters.*/
3894 if (*p == '%'
3895#ifdef ASSEMBLER_DIALECT
3896 || *p == '{' || *p == '}' || *p == '|'
3897#endif
3898 )
3cf2715d 3899 {
382522cb 3900 putc (*p, asm_out_file);
3cf2715d 3901 p++;
3cf2715d
DE
3902 }
3903 /* %= outputs a number which is unique to each insn in the entire
3904 compilation. This is useful for making local labels that are
3905 referred to more than once in a given insn. */
3906 else if (*p == '=')
3907 {
3908 p++;
3909 fprintf (asm_out_file, "%d", insn_counter);
3910 }
3911 /* % followed by a letter and some digits
3912 outputs an operand in a special way depending on the letter.
3913 Letters `acln' are implemented directly.
3914 Other letters are passed to `output_operand' so that
6e2188e0 3915 the TARGET_PRINT_OPERAND hook can define them. */
0df6c2c7 3916 else if (ISALPHA (*p))
3cf2715d
DE
3917 {
3918 int letter = *p++;
c383c15f
GK
3919 unsigned long opnum;
3920 char *endptr;
b0efb46b 3921
c383c15f
GK
3922 opnum = strtoul (p, &endptr, 10);
3923
3924 if (endptr == p)
3925 output_operand_lossage ("operand number missing "
3926 "after %%-letter");
3927 else if (this_is_asm_operands && opnum >= insn_noperands)
3cf2715d
DE
3928 output_operand_lossage ("operand number out of range");
3929 else if (letter == 'l')
c383c15f 3930 output_asm_label (operands[opnum]);
3cf2715d 3931 else if (letter == 'a')
cc8ca59e 3932 output_address (VOIDmode, operands[opnum]);
3cf2715d
DE
3933 else if (letter == 'c')
3934 {
c383c15f
GK
3935 if (CONSTANT_ADDRESS_P (operands[opnum]))
3936 output_addr_const (asm_out_file, operands[opnum]);
3cf2715d 3937 else
c383c15f 3938 output_operand (operands[opnum], 'c');
3cf2715d
DE
3939 }
3940 else if (letter == 'n')
3941 {
481683e1 3942 if (CONST_INT_P (operands[opnum]))
21e3a81b 3943 fprintf (asm_out_file, HOST_WIDE_INT_PRINT_DEC,
c383c15f 3944 - INTVAL (operands[opnum]));
3cf2715d
DE
3945 else
3946 {
3947 putc ('-', asm_out_file);
c383c15f 3948 output_addr_const (asm_out_file, operands[opnum]);
3cf2715d
DE
3949 }
3950 }
3951 else
c383c15f 3952 output_operand (operands[opnum], letter);
f5d927c0 3953
c383c15f 3954 if (!opoutput[opnum])
dc9d0b14 3955 oporder[ops++] = opnum;
c383c15f 3956 opoutput[opnum] = 1;
0d4903b8 3957
c383c15f
GK
3958 p = endptr;
3959 c = *p;
3cf2715d
DE
3960 }
3961 /* % followed by a digit outputs an operand the default way. */
0df6c2c7 3962 else if (ISDIGIT (*p))
3cf2715d 3963 {
c383c15f
GK
3964 unsigned long opnum;
3965 char *endptr;
b0efb46b 3966
c383c15f
GK
3967 opnum = strtoul (p, &endptr, 10);
3968 if (this_is_asm_operands && opnum >= insn_noperands)
3cf2715d
DE
3969 output_operand_lossage ("operand number out of range");
3970 else
c383c15f 3971 output_operand (operands[opnum], 0);
0d4903b8 3972
c383c15f 3973 if (!opoutput[opnum])
dc9d0b14 3974 oporder[ops++] = opnum;
c383c15f 3975 opoutput[opnum] = 1;
4f9b4029 3976
c383c15f
GK
3977 p = endptr;
3978 c = *p;
3cf2715d
DE
3979 }
3980 /* % followed by punctuation: output something for that
6e2188e0
NF
3981 punctuation character alone, with no operand. The
3982 TARGET_PRINT_OPERAND hook decides what is actually done. */
3983 else if (targetm.asm_out.print_operand_punct_valid_p ((unsigned char) *p))
3cf2715d 3984 output_operand (NULL_RTX, *p++);
3cf2715d
DE
3985 else
3986 output_operand_lossage ("invalid %%-code");
3987 break;
3988
3989 default:
3990 putc (c, asm_out_file);
3991 }
3992
dff125eb
SB
3993 /* Try to keep the asm a bit more readable. */
3994 if ((flag_verbose_asm || flag_print_asm_name) && strlen (templ) < 9)
3995 putc ('\t', asm_out_file);
3996
0d4903b8
RK
3997 /* Write out the variable names for operands, if we know them. */
3998 if (flag_verbose_asm)
4f9b4029 3999 output_asm_operand_names (operands, oporder, ops);
0d4903b8
RK
4000 if (flag_print_asm_name)
4001 output_asm_name ();
3cf2715d
DE
4002
4003 putc ('\n', asm_out_file);
4004}
4005\f
4006/* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */
4007
4008void
6cf9ac28 4009output_asm_label (rtx x)
3cf2715d
DE
4010{
4011 char buf[256];
4012
4013 if (GET_CODE (x) == LABEL_REF)
04a121a7 4014 x = label_ref_label (x);
4b4bf941
JQ
4015 if (LABEL_P (x)
4016 || (NOTE_P (x)
a38e7aa5 4017 && NOTE_KIND (x) == NOTE_INSN_DELETED_LABEL))
3cf2715d
DE
4018 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
4019 else
9e637a26 4020 output_operand_lossage ("'%%l' operand isn't a label");
3cf2715d
DE
4021
4022 assemble_name (asm_out_file, buf);
4023}
4024
a7fe25b8
JJ
4025/* Marks SYMBOL_REFs in x as referenced through use of assemble_external. */
4026
4027void
4028mark_symbol_refs_as_used (rtx x)
4029{
effb8a26
RS
4030 subrtx_iterator::array_type array;
4031 FOR_EACH_SUBRTX (iter, array, x, ALL)
4032 {
4033 const_rtx x = *iter;
4034 if (GET_CODE (x) == SYMBOL_REF)
4035 if (tree t = SYMBOL_REF_DECL (x))
4036 assemble_external (t);
4037 }
a7fe25b8
JJ
4038}
4039
3cf2715d 4040/* Print operand X using machine-dependent assembler syntax.
3cf2715d
DE
4041 CODE is a non-digit that preceded the operand-number in the % spec,
4042 such as 'z' if the spec was `%z3'. CODE is 0 if there was no char
4043 between the % and the digits.
4044 When CODE is a non-letter, X is 0.
4045
4046 The meanings of the letters are machine-dependent and controlled
6e2188e0 4047 by TARGET_PRINT_OPERAND. */
3cf2715d 4048
6b3c42ae 4049void
6cf9ac28 4050output_operand (rtx x, int code ATTRIBUTE_UNUSED)
3cf2715d
DE
4051{
4052 if (x && GET_CODE (x) == SUBREG)
55a2c322 4053 x = alter_subreg (&x, true);
3cf2715d 4054
04c7ae48 4055 /* X must not be a pseudo reg. */
a50fa76a
BS
4056 if (!targetm.no_register_allocation)
4057 gcc_assert (!x || !REG_P (x) || REGNO (x) < FIRST_PSEUDO_REGISTER);
3cf2715d 4058
6e2188e0 4059 targetm.asm_out.print_operand (asm_out_file, x, code);
c70d0414
HPN
4060
4061 if (x == NULL_RTX)
4062 return;
4063
effb8a26 4064 mark_symbol_refs_as_used (x);
3cf2715d
DE
4065}
4066
6e2188e0
NF
4067/* Print a memory reference operand for address X using
4068 machine-dependent assembler syntax. */
3cf2715d
DE
4069
4070void
cc8ca59e 4071output_address (machine_mode mode, rtx x)
3cf2715d 4072{
6fb5fa3c
DB
4073 bool changed = false;
4074 walk_alter_subreg (&x, &changed);
cc8ca59e 4075 targetm.asm_out.print_operand_address (asm_out_file, mode, x);
3cf2715d
DE
4076}
4077\f
4078/* Print an integer constant expression in assembler syntax.
4079 Addition and subtraction are the only arithmetic
4080 that may appear in these expressions. */
4081
4082void
6cf9ac28 4083output_addr_const (FILE *file, rtx x)
3cf2715d
DE
4084{
4085 char buf[256];
4086
4087 restart:
4088 switch (GET_CODE (x))
4089 {
4090 case PC:
eac50d7a 4091 putc ('.', file);
3cf2715d
DE
4092 break;
4093
4094 case SYMBOL_REF:
21dad7e6 4095 if (SYMBOL_REF_DECL (x))
152464d2 4096 assemble_external (SYMBOL_REF_DECL (x));
99c8c61c
AO
4097#ifdef ASM_OUTPUT_SYMBOL_REF
4098 ASM_OUTPUT_SYMBOL_REF (file, x);
4099#else
3cf2715d 4100 assemble_name (file, XSTR (x, 0));
99c8c61c 4101#endif
3cf2715d
DE
4102 break;
4103
4104 case LABEL_REF:
04a121a7 4105 x = label_ref_label (x);
422be3c3 4106 /* Fall through. */
3cf2715d
DE
4107 case CODE_LABEL:
4108 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
2f0b7af6
GK
4109#ifdef ASM_OUTPUT_LABEL_REF
4110 ASM_OUTPUT_LABEL_REF (file, buf);
4111#else
3cf2715d 4112 assemble_name (file, buf);
2f0b7af6 4113#endif
3cf2715d
DE
4114 break;
4115
4116 case CONST_INT:
6725cc58 4117 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x));
3cf2715d
DE
4118 break;
4119
4120 case CONST:
4121 /* This used to output parentheses around the expression,
4122 but that does not work on the 386 (either ATT or BSD assembler). */
4123 output_addr_const (file, XEXP (x, 0));
4124 break;
4125
807e902e
KZ
4126 case CONST_WIDE_INT:
4127 /* We do not know the mode here so we have to use a round about
4128 way to build a wide-int to get it printed properly. */
4129 {
4130 wide_int w = wide_int::from_array (&CONST_WIDE_INT_ELT (x, 0),
4131 CONST_WIDE_INT_NUNITS (x),
4132 CONST_WIDE_INT_NUNITS (x)
4133 * HOST_BITS_PER_WIDE_INT,
4134 false);
4135 print_decs (w, file);
4136 }
4137 break;
4138
3cf2715d 4139 case CONST_DOUBLE:
807e902e 4140 if (CONST_DOUBLE_AS_INT_P (x))
3cf2715d
DE
4141 {
4142 /* We can use %d if the number is one word and positive. */
4143 if (CONST_DOUBLE_HIGH (x))
21e3a81b 4144 fprintf (file, HOST_WIDE_INT_PRINT_DOUBLE_HEX,
3d57d7ce
DK
4145 (unsigned HOST_WIDE_INT) CONST_DOUBLE_HIGH (x),
4146 (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (x));
f5d927c0 4147 else if (CONST_DOUBLE_LOW (x) < 0)
3d57d7ce
DK
4148 fprintf (file, HOST_WIDE_INT_PRINT_HEX,
4149 (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (x));
3cf2715d 4150 else
21e3a81b 4151 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x));
3cf2715d
DE
4152 }
4153 else
4154 /* We can't handle floating point constants;
4155 PRINT_OPERAND must handle them. */
4156 output_operand_lossage ("floating constant misused");
4157 break;
4158
14c931f1 4159 case CONST_FIXED:
848fac28 4160 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_FIXED_VALUE_LOW (x));
14c931f1
CF
4161 break;
4162
3cf2715d
DE
4163 case PLUS:
4164 /* Some assemblers need integer constants to appear last (eg masm). */
481683e1 4165 if (CONST_INT_P (XEXP (x, 0)))
3cf2715d
DE
4166 {
4167 output_addr_const (file, XEXP (x, 1));
4168 if (INTVAL (XEXP (x, 0)) >= 0)
4169 fprintf (file, "+");
4170 output_addr_const (file, XEXP (x, 0));
4171 }
4172 else
4173 {
4174 output_addr_const (file, XEXP (x, 0));
481683e1 4175 if (!CONST_INT_P (XEXP (x, 1))
08106825 4176 || INTVAL (XEXP (x, 1)) >= 0)
3cf2715d
DE
4177 fprintf (file, "+");
4178 output_addr_const (file, XEXP (x, 1));
4179 }
4180 break;
4181
4182 case MINUS:
4183 /* Avoid outputting things like x-x or x+5-x,
4184 since some assemblers can't handle that. */
4185 x = simplify_subtraction (x);
4186 if (GET_CODE (x) != MINUS)
4187 goto restart;
4188
4189 output_addr_const (file, XEXP (x, 0));
4190 fprintf (file, "-");
481683e1 4191 if ((CONST_INT_P (XEXP (x, 1)) && INTVAL (XEXP (x, 1)) >= 0)
301d03af
RS
4192 || GET_CODE (XEXP (x, 1)) == PC
4193 || GET_CODE (XEXP (x, 1)) == SYMBOL_REF)
4194 output_addr_const (file, XEXP (x, 1));
4195 else
3cf2715d 4196 {
17b53c33 4197 fputs (targetm.asm_out.open_paren, file);
3cf2715d 4198 output_addr_const (file, XEXP (x, 1));
17b53c33 4199 fputs (targetm.asm_out.close_paren, file);
3cf2715d 4200 }
3cf2715d
DE
4201 break;
4202
4203 case ZERO_EXTEND:
4204 case SIGN_EXTEND:
fdf473ae 4205 case SUBREG:
c01e4479 4206 case TRUNCATE:
3cf2715d
DE
4207 output_addr_const (file, XEXP (x, 0));
4208 break;
4209
4210 default:
6cbd8875
AS
4211 if (targetm.asm_out.output_addr_const_extra (file, x))
4212 break;
422be3c3 4213
3cf2715d
DE
4214 output_operand_lossage ("invalid expression as operand");
4215 }
4216}
4217\f
a803773f
JM
4218/* Output a quoted string. */
4219
4220void
4221output_quoted_string (FILE *asm_file, const char *string)
4222{
4223#ifdef OUTPUT_QUOTED_STRING
4224 OUTPUT_QUOTED_STRING (asm_file, string);
4225#else
4226 char c;
4227
4228 putc ('\"', asm_file);
4229 while ((c = *string++) != 0)
4230 {
4231 if (ISPRINT (c))
4232 {
4233 if (c == '\"' || c == '\\')
4234 putc ('\\', asm_file);
4235 putc (c, asm_file);
4236 }
4237 else
4238 fprintf (asm_file, "\\%03o", (unsigned char) c);
4239 }
4240 putc ('\"', asm_file);
4241#endif
4242}
4243\f
5e3929ed
DA
4244/* Write a HOST_WIDE_INT number in hex form 0x1234, fast. */
4245
4246void
4247fprint_whex (FILE *f, unsigned HOST_WIDE_INT value)
4248{
4249 char buf[2 + CHAR_BIT * sizeof (value) / 4];
4250 if (value == 0)
4251 putc ('0', f);
4252 else
4253 {
4254 char *p = buf + sizeof (buf);
4255 do
4256 *--p = "0123456789abcdef"[value % 16];
4257 while ((value /= 16) != 0);
4258 *--p = 'x';
4259 *--p = '0';
4260 fwrite (p, 1, buf + sizeof (buf) - p, f);
4261 }
4262}
4263
4264/* Internal function that prints an unsigned long in decimal in reverse.
4265 The output string IS NOT null-terminated. */
4266
4267static int
4268sprint_ul_rev (char *s, unsigned long value)
4269{
4270 int i = 0;
4271 do
4272 {
4273 s[i] = "0123456789"[value % 10];
4274 value /= 10;
4275 i++;
4276 /* alternate version, without modulo */
4277 /* oldval = value; */
4278 /* value /= 10; */
4279 /* s[i] = "0123456789" [oldval - 10*value]; */
4280 /* i++ */
4281 }
4282 while (value != 0);
4283 return i;
4284}
4285
5e3929ed
DA
4286/* Write an unsigned long as decimal to a file, fast. */
4287
4288void
4289fprint_ul (FILE *f, unsigned long value)
4290{
4291 /* python says: len(str(2**64)) == 20 */
4292 char s[20];
4293 int i;
4294
4295 i = sprint_ul_rev (s, value);
4296
4297 /* It's probably too small to bother with string reversal and fputs. */
4298 do
4299 {
4300 i--;
4301 putc (s[i], f);
4302 }
4303 while (i != 0);
4304}
4305
4306/* Write an unsigned long as decimal to a string, fast.
4307 s must be wide enough to not overflow, at least 21 chars.
4308 Returns the length of the string (without terminating '\0'). */
4309
4310int
4311sprint_ul (char *s, unsigned long value)
4312{
fab27f52 4313 int len = sprint_ul_rev (s, value);
5e3929ed
DA
4314 s[len] = '\0';
4315
fab27f52 4316 std::reverse (s, s + len);
5e3929ed
DA
4317 return len;
4318}
4319
3cf2715d
DE
4320/* A poor man's fprintf, with the added features of %I, %R, %L, and %U.
4321 %R prints the value of REGISTER_PREFIX.
4322 %L prints the value of LOCAL_LABEL_PREFIX.
4323 %U prints the value of USER_LABEL_PREFIX.
4324 %I prints the value of IMMEDIATE_PREFIX.
4325 %O runs ASM_OUTPUT_OPCODE to transform what follows in the string.
b1721339 4326 Also supported are %d, %i, %u, %x, %X, %o, %c, %s and %%.
3cf2715d
DE
4327
4328 We handle alternate assembler dialects here, just like output_asm_insn. */
4329
4330void
e34d07f2 4331asm_fprintf (FILE *file, const char *p, ...)
3cf2715d 4332{
3cf2715d
DE
4333 char buf[10];
4334 char *q, c;
d1658619
SP
4335#ifdef ASSEMBLER_DIALECT
4336 int dialect = 0;
4337#endif
e34d07f2 4338 va_list argptr;
6cf9ac28 4339
e34d07f2 4340 va_start (argptr, p);
3cf2715d
DE
4341
4342 buf[0] = '%';
4343
b729186a 4344 while ((c = *p++))
3cf2715d
DE
4345 switch (c)
4346 {
4347#ifdef ASSEMBLER_DIALECT
4348 case '{':
3cf2715d 4349 case '}':
d1658619
SP
4350 case '|':
4351 p = do_assembler_dialects (p, &dialect);
3cf2715d
DE
4352 break;
4353#endif
4354
4355 case '%':
4356 c = *p++;
4357 q = &buf[1];
b1721339
KG
4358 while (strchr ("-+ #0", c))
4359 {
4360 *q++ = c;
4361 c = *p++;
4362 }
0df6c2c7 4363 while (ISDIGIT (c) || c == '.')
3cf2715d
DE
4364 {
4365 *q++ = c;
4366 c = *p++;
4367 }
4368 switch (c)
4369 {
4370 case '%':
b1721339 4371 putc ('%', file);
3cf2715d
DE
4372 break;
4373
4374 case 'd': case 'i': case 'u':
b1721339
KG
4375 case 'x': case 'X': case 'o':
4376 case 'c':
3cf2715d
DE
4377 *q++ = c;
4378 *q = 0;
4379 fprintf (file, buf, va_arg (argptr, int));
4380 break;
4381
4382 case 'w':
b1721339
KG
4383 /* This is a prefix to the 'd', 'i', 'u', 'x', 'X', and
4384 'o' cases, but we do not check for those cases. It
4385 means that the value is a HOST_WIDE_INT, which may be
4386 either `long' or `long long'. */
85f015e1
KG
4387 memcpy (q, HOST_WIDE_INT_PRINT, strlen (HOST_WIDE_INT_PRINT));
4388 q += strlen (HOST_WIDE_INT_PRINT);
3cf2715d
DE
4389 *q++ = *p++;
4390 *q = 0;
4391 fprintf (file, buf, va_arg (argptr, HOST_WIDE_INT));
4392 break;
4393
4394 case 'l':
4395 *q++ = c;
b1721339
KG
4396#ifdef HAVE_LONG_LONG
4397 if (*p == 'l')
4398 {
4399 *q++ = *p++;
4400 *q++ = *p++;
4401 *q = 0;
4402 fprintf (file, buf, va_arg (argptr, long long));
4403 }
4404 else
4405#endif
4406 {
4407 *q++ = *p++;
4408 *q = 0;
4409 fprintf (file, buf, va_arg (argptr, long));
4410 }
6cf9ac28 4411
3cf2715d
DE
4412 break;
4413
4414 case 's':
4415 *q++ = c;
4416 *q = 0;
4417 fprintf (file, buf, va_arg (argptr, char *));
4418 break;
4419
4420 case 'O':
4421#ifdef ASM_OUTPUT_OPCODE
4422 ASM_OUTPUT_OPCODE (asm_out_file, p);
4423#endif
4424 break;
4425
4426 case 'R':
4427#ifdef REGISTER_PREFIX
4428 fprintf (file, "%s", REGISTER_PREFIX);
4429#endif
4430 break;
4431
4432 case 'I':
4433#ifdef IMMEDIATE_PREFIX
4434 fprintf (file, "%s", IMMEDIATE_PREFIX);
4435#endif
4436 break;
4437
4438 case 'L':
4439#ifdef LOCAL_LABEL_PREFIX
4440 fprintf (file, "%s", LOCAL_LABEL_PREFIX);
4441#endif
4442 break;
4443
4444 case 'U':
19283265 4445 fputs (user_label_prefix, file);
3cf2715d
DE
4446 break;
4447
fe0503ea 4448#ifdef ASM_FPRINTF_EXTENSIONS
7ef0daad 4449 /* Uppercase letters are reserved for general use by asm_fprintf
fe0503ea
NC
4450 and so are not available to target specific code. In order to
4451 prevent the ASM_FPRINTF_EXTENSIONS macro from using them then,
4452 they are defined here. As they get turned into real extensions
4453 to asm_fprintf they should be removed from this list. */
4454 case 'A': case 'B': case 'C': case 'D': case 'E':
4455 case 'F': case 'G': case 'H': case 'J': case 'K':
4456 case 'M': case 'N': case 'P': case 'Q': case 'S':
4457 case 'T': case 'V': case 'W': case 'Y': case 'Z':
4458 break;
f5d927c0 4459
fe0503ea
NC
4460 ASM_FPRINTF_EXTENSIONS (file, argptr, p)
4461#endif
3cf2715d 4462 default:
0bccc606 4463 gcc_unreachable ();
3cf2715d
DE
4464 }
4465 break;
4466
4467 default:
b1721339 4468 putc (c, file);
3cf2715d 4469 }
e34d07f2 4470 va_end (argptr);
3cf2715d
DE
4471}
4472\f
3cf2715d
DE
4473/* Return nonzero if this function has no function calls. */
4474
4475int
6cf9ac28 4476leaf_function_p (void)
3cf2715d 4477{
fa7af581 4478 rtx_insn *insn;
3cf2715d 4479
00d60013
WD
4480 /* Ensure we walk the entire function body. */
4481 gcc_assert (!in_sequence_p ());
4482
d56a43a0
AK
4483 /* Some back-ends (e.g. s390) want leaf functions to stay leaf
4484 functions even if they call mcount. */
4485 if (crtl->profile && !targetm.keep_leaf_when_profiled ())
3cf2715d
DE
4486 return 0;
4487
4488 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4489 {
4b4bf941 4490 if (CALL_P (insn)
7d167afd 4491 && ! SIBLING_CALL_P (insn))
3cf2715d 4492 return 0;
4b4bf941 4493 if (NONJUMP_INSN_P (insn)
3cf2715d 4494 && GET_CODE (PATTERN (insn)) == SEQUENCE
4b4bf941 4495 && CALL_P (XVECEXP (PATTERN (insn), 0, 0))
0a1c58a2 4496 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0)))
3cf2715d
DE
4497 return 0;
4498 }
3cf2715d
DE
4499
4500 return 1;
4501}
4502
09da1532 4503/* Return 1 if branch is a forward branch.
ef6257cd
JH
4504 Uses insn_shuid array, so it works only in the final pass. May be used by
4505 output templates to customary add branch prediction hints.
4506 */
4507int
fa7af581 4508final_forward_branch_p (rtx_insn *insn)
ef6257cd
JH
4509{
4510 int insn_id, label_id;
b0efb46b 4511
0bccc606 4512 gcc_assert (uid_shuid);
ef6257cd
JH
4513 insn_id = INSN_SHUID (insn);
4514 label_id = INSN_SHUID (JUMP_LABEL (insn));
4515 /* We've hit some insns that does not have id information available. */
0bccc606 4516 gcc_assert (insn_id && label_id);
ef6257cd
JH
4517 return insn_id < label_id;
4518}
4519
3cf2715d
DE
4520/* On some machines, a function with no call insns
4521 can run faster if it doesn't create its own register window.
4522 When output, the leaf function should use only the "output"
4523 registers. Ordinarily, the function would be compiled to use
4524 the "input" registers to find its arguments; it is a candidate
4525 for leaf treatment if it uses only the "input" registers.
4526 Leaf function treatment means renumbering so the function
4527 uses the "output" registers instead. */
4528
4529#ifdef LEAF_REGISTERS
4530
3cf2715d
DE
4531/* Return 1 if this function uses only the registers that can be
4532 safely renumbered. */
4533
4534int
6cf9ac28 4535only_leaf_regs_used (void)
3cf2715d
DE
4536{
4537 int i;
4977bab6 4538 const char *const permitted_reg_in_leaf_functions = LEAF_REGISTERS;
3cf2715d
DE
4539
4540 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
6fb5fa3c 4541 if ((df_regs_ever_live_p (i) || global_regs[i])
e5e809f4
JL
4542 && ! permitted_reg_in_leaf_functions[i])
4543 return 0;
4544
e3b5732b 4545 if (crtl->uses_pic_offset_table
e5e809f4 4546 && pic_offset_table_rtx != 0
f8cfc6aa 4547 && REG_P (pic_offset_table_rtx)
e5e809f4
JL
4548 && ! permitted_reg_in_leaf_functions[REGNO (pic_offset_table_rtx)])
4549 return 0;
4550
3cf2715d
DE
4551 return 1;
4552}
4553
4554/* Scan all instructions and renumber all registers into those
4555 available in leaf functions. */
4556
4557static void
fa7af581 4558leaf_renumber_regs (rtx_insn *first)
3cf2715d 4559{
fa7af581 4560 rtx_insn *insn;
3cf2715d
DE
4561
4562 /* Renumber only the actual patterns.
4563 The reg-notes can contain frame pointer refs,
4564 and renumbering them could crash, and should not be needed. */
4565 for (insn = first; insn; insn = NEXT_INSN (insn))
2c3c49de 4566 if (INSN_P (insn))
3cf2715d 4567 leaf_renumber_regs_insn (PATTERN (insn));
3cf2715d
DE
4568}
4569
4570/* Scan IN_RTX and its subexpressions, and renumber all regs into those
4571 available in leaf functions. */
4572
4573void
6cf9ac28 4574leaf_renumber_regs_insn (rtx in_rtx)
3cf2715d 4575{
b3694847
SS
4576 int i, j;
4577 const char *format_ptr;
3cf2715d
DE
4578
4579 if (in_rtx == 0)
4580 return;
4581
4582 /* Renumber all input-registers into output-registers.
4583 renumbered_regs would be 1 for an output-register;
4584 they */
4585
f8cfc6aa 4586 if (REG_P (in_rtx))
3cf2715d
DE
4587 {
4588 int newreg;
4589
4590 /* Don't renumber the same reg twice. */
4591 if (in_rtx->used)
4592 return;
4593
4594 newreg = REGNO (in_rtx);
4595 /* Don't try to renumber pseudo regs. It is possible for a pseudo reg
4596 to reach here as part of a REG_NOTE. */
4597 if (newreg >= FIRST_PSEUDO_REGISTER)
4598 {
4599 in_rtx->used = 1;
4600 return;
4601 }
4602 newreg = LEAF_REG_REMAP (newreg);
0bccc606 4603 gcc_assert (newreg >= 0);
6fb5fa3c
DB
4604 df_set_regs_ever_live (REGNO (in_rtx), false);
4605 df_set_regs_ever_live (newreg, true);
4606 SET_REGNO (in_rtx, newreg);
3cf2715d 4607 in_rtx->used = 1;
9fccb335 4608 return;
3cf2715d
DE
4609 }
4610
2c3c49de 4611 if (INSN_P (in_rtx))
3cf2715d
DE
4612 {
4613 /* Inside a SEQUENCE, we find insns.
4614 Renumber just the patterns of these insns,
4615 just as we do for the top-level insns. */
4616 leaf_renumber_regs_insn (PATTERN (in_rtx));
4617 return;
4618 }
4619
4620 format_ptr = GET_RTX_FORMAT (GET_CODE (in_rtx));
4621
4622 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (in_rtx)); i++)
4623 switch (*format_ptr++)
4624 {
4625 case 'e':
4626 leaf_renumber_regs_insn (XEXP (in_rtx, i));
4627 break;
4628
4629 case 'E':
01512446
JJ
4630 if (XVEC (in_rtx, i) != NULL)
4631 for (j = 0; j < XVECLEN (in_rtx, i); j++)
4632 leaf_renumber_regs_insn (XVECEXP (in_rtx, i, j));
3cf2715d
DE
4633 break;
4634
4635 case 'S':
4636 case 's':
4637 case '0':
4638 case 'i':
4639 case 'w':
91914e56 4640 case 'p':
3cf2715d
DE
4641 case 'n':
4642 case 'u':
4643 break;
4644
4645 default:
0bccc606 4646 gcc_unreachable ();
3cf2715d
DE
4647 }
4648}
4649#endif
ef330312
PB
4650\f
4651/* Turn the RTL into assembly. */
c2924966 4652static unsigned int
ef330312
PB
4653rest_of_handle_final (void)
4654{
0d4b5b86 4655 const char *fnname = get_fnname_from_decl (current_function_decl);
ef330312 4656
60012ddc
JJ
4657 /* Turn debug markers into notes if the var-tracking pass has not
4658 been invoked. */
4659 if (!flag_var_tracking && MAY_HAVE_DEBUG_MARKER_INSNS)
e3a174d0 4660 delete_vta_debug_insns (false);
96a95ac1 4661
ef330312 4662 assemble_start_function (current_function_decl, fnname);
bd2b9f1e
AO
4663 rtx_insn *first = get_insns ();
4664 int seen = 0;
4665 final_start_function_1 (&first, asm_out_file, &seen, optimize);
4666 final_1 (first, asm_out_file, seen, optimize);
036ea399
JJ
4667 if (flag_ipa_ra
4668 && !lookup_attribute ("noipa", DECL_ATTRIBUTES (current_function_decl)))
27c07cc5 4669 collect_fn_hard_reg_usage ();
ef330312
PB
4670 final_end_function ();
4671
182a0c11
RH
4672 /* The IA-64 ".handlerdata" directive must be issued before the ".endp"
4673 directive that closes the procedure descriptor. Similarly, for x64 SEH.
4674 Otherwise it's not strictly necessary, but it doesn't hurt either. */
22ba88ef 4675 output_function_exception_table (fnname);
ef330312
PB
4676
4677 assemble_end_function (current_function_decl, fnname);
4678
6fb5fa3c
DB
4679 /* Free up reg info memory. */
4680 free_reg_info ();
4681
ef330312
PB
4682 if (! quiet_flag)
4683 fflush (asm_out_file);
4684
ef330312
PB
4685 /* Write DBX symbols if requested. */
4686
4687 /* Note that for those inline functions where we don't initially
4688 know for certain that we will be generating an out-of-line copy,
4689 the first invocation of this routine (rest_of_compilation) will
4690 skip over this code by doing a `goto exit_rest_of_compilation;'.
4691 Later on, wrapup_global_declarations will (indirectly) call
4692 rest_of_compilation again for those inline functions that need
4693 to have out-of-line copies generated. During that call, we
4694 *will* be routed past here. */
4695
4696 timevar_push (TV_SYMOUT);
725730f2
EB
4697 if (!DECL_IGNORED_P (current_function_decl))
4698 debug_hooks->function_decl (current_function_decl);
ef330312 4699 timevar_pop (TV_SYMOUT);
6b20f353
DS
4700
4701 /* Release the blocks that are linked to DECL_INITIAL() to free the memory. */
4702 DECL_INITIAL (current_function_decl) = error_mark_node;
4703
395a40e0
JH
4704 if (DECL_STATIC_CONSTRUCTOR (current_function_decl)
4705 && targetm.have_ctors_dtors)
4706 targetm.asm_out.constructor (XEXP (DECL_RTL (current_function_decl), 0),
4707 decl_init_priority_lookup
4708 (current_function_decl));
4709 if (DECL_STATIC_DESTRUCTOR (current_function_decl)
4710 && targetm.have_ctors_dtors)
4711 targetm.asm_out.destructor (XEXP (DECL_RTL (current_function_decl), 0),
4712 decl_fini_priority_lookup
4713 (current_function_decl));
c2924966 4714 return 0;
ef330312
PB
4715}
4716
27a4cd48
DM
4717namespace {
4718
4719const pass_data pass_data_final =
ef330312 4720{
27a4cd48
DM
4721 RTL_PASS, /* type */
4722 "final", /* name */
4723 OPTGROUP_NONE, /* optinfo_flags */
27a4cd48
DM
4724 TV_FINAL, /* tv_id */
4725 0, /* properties_required */
4726 0, /* properties_provided */
4727 0, /* properties_destroyed */
4728 0, /* todo_flags_start */
4729 0, /* todo_flags_finish */
ef330312
PB
4730};
4731
27a4cd48
DM
4732class pass_final : public rtl_opt_pass
4733{
4734public:
c3284718
RS
4735 pass_final (gcc::context *ctxt)
4736 : rtl_opt_pass (pass_data_final, ctxt)
27a4cd48
DM
4737 {}
4738
4739 /* opt_pass methods: */
be55bfe6 4740 virtual unsigned int execute (function *) { return rest_of_handle_final (); }
27a4cd48
DM
4741
4742}; // class pass_final
4743
4744} // anon namespace
4745
4746rtl_opt_pass *
4747make_pass_final (gcc::context *ctxt)
4748{
4749 return new pass_final (ctxt);
4750}
4751
ef330312 4752
c2924966 4753static unsigned int
ef330312
PB
4754rest_of_handle_shorten_branches (void)
4755{
4756 /* Shorten branches. */
4757 shorten_branches (get_insns ());
c2924966 4758 return 0;
ef330312 4759}
b0efb46b 4760
27a4cd48
DM
4761namespace {
4762
4763const pass_data pass_data_shorten_branches =
ef330312 4764{
27a4cd48
DM
4765 RTL_PASS, /* type */
4766 "shorten", /* name */
4767 OPTGROUP_NONE, /* optinfo_flags */
27a4cd48
DM
4768 TV_SHORTEN_BRANCH, /* tv_id */
4769 0, /* properties_required */
4770 0, /* properties_provided */
4771 0, /* properties_destroyed */
4772 0, /* todo_flags_start */
4773 0, /* todo_flags_finish */
ef330312
PB
4774};
4775
27a4cd48
DM
4776class pass_shorten_branches : public rtl_opt_pass
4777{
4778public:
c3284718
RS
4779 pass_shorten_branches (gcc::context *ctxt)
4780 : rtl_opt_pass (pass_data_shorten_branches, ctxt)
27a4cd48
DM
4781 {}
4782
4783 /* opt_pass methods: */
be55bfe6
TS
4784 virtual unsigned int execute (function *)
4785 {
4786 return rest_of_handle_shorten_branches ();
4787 }
27a4cd48
DM
4788
4789}; // class pass_shorten_branches
4790
4791} // anon namespace
4792
4793rtl_opt_pass *
4794make_pass_shorten_branches (gcc::context *ctxt)
4795{
4796 return new pass_shorten_branches (ctxt);
4797}
4798
ef330312 4799
c2924966 4800static unsigned int
ef330312
PB
4801rest_of_clean_state (void)
4802{
fa7af581 4803 rtx_insn *insn, *next;
2153915d
AO
4804 FILE *final_output = NULL;
4805 int save_unnumbered = flag_dump_unnumbered;
4806 int save_noaddr = flag_dump_noaddr;
4807
4808 if (flag_dump_final_insns)
4809 {
4810 final_output = fopen (flag_dump_final_insns, "a");
4811 if (!final_output)
4812 {
7ca92787
JM
4813 error ("could not open final insn dump file %qs: %m",
4814 flag_dump_final_insns);
2153915d
AO
4815 flag_dump_final_insns = NULL;
4816 }
4817 else
4818 {
2153915d 4819 flag_dump_noaddr = flag_dump_unnumbered = 1;
c7ba0cfb 4820 if (flag_compare_debug_opt || flag_compare_debug)
171a55e7 4821 dump_flags |= TDF_NOUID | TDF_COMPARE_DEBUG;
6d8402ac
AO
4822 dump_function_header (final_output, current_function_decl,
4823 dump_flags);
6ca5d1f6 4824 final_insns_dump_p = true;
2153915d
AO
4825
4826 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4827 if (LABEL_P (insn))
4828 INSN_UID (insn) = CODE_LABEL_NUMBER (insn);
4829 else
a59d15cf
AO
4830 {
4831 if (NOTE_P (insn))
4832 set_block_for_insn (insn, NULL);
4833 INSN_UID (insn) = 0;
4834 }
2153915d
AO
4835 }
4836 }
ef330312
PB
4837
4838 /* It is very important to decompose the RTL instruction chain here:
4839 debug information keeps pointing into CODE_LABEL insns inside the function
4840 body. If these remain pointing to the other insns, we end up preserving
4841 whole RTL chain and attached detailed debug info in memory. */
4842 for (insn = get_insns (); insn; insn = next)
4843 {
4844 next = NEXT_INSN (insn);
0f82e5c9
DM
4845 SET_NEXT_INSN (insn) = NULL;
4846 SET_PREV_INSN (insn) = NULL;
2153915d 4847
00b94487
JJ
4848 if (CALL_P (insn))
4849 {
4850 rtx note = find_reg_note (insn, REG_CALL_ARG_LOCATION, NULL_RTX);
4851 if (note)
4852 remove_note (insn, note);
4853 }
4854
2153915d 4855 if (final_output
00b94487
JJ
4856 && (!NOTE_P (insn)
4857 || (NOTE_KIND (insn) != NOTE_INSN_VAR_LOCATION
4858 && NOTE_KIND (insn) != NOTE_INSN_BEGIN_STMT
4859 && NOTE_KIND (insn) != NOTE_INSN_INLINE_ENTRY
4860 && NOTE_KIND (insn) != NOTE_INSN_BLOCK_BEG
4861 && NOTE_KIND (insn) != NOTE_INSN_BLOCK_END
4862 && NOTE_KIND (insn) != NOTE_INSN_DELETED_DEBUG_LABEL)))
2153915d 4863 print_rtl_single (final_output, insn);
2153915d
AO
4864 }
4865
4866 if (final_output)
4867 {
4868 flag_dump_noaddr = save_noaddr;
4869 flag_dump_unnumbered = save_unnumbered;
6ca5d1f6 4870 final_insns_dump_p = false;
2153915d
AO
4871
4872 if (fclose (final_output))
4873 {
7ca92787
JM
4874 error ("could not close final insn dump file %qs: %m",
4875 flag_dump_final_insns);
2153915d
AO
4876 flag_dump_final_insns = NULL;
4877 }
ef330312
PB
4878 }
4879
5f39ad47 4880 flag_rerun_cse_after_global_opts = 0;
ef330312
PB
4881 reload_completed = 0;
4882 epilogue_completed = 0;
23249ac4
DB
4883#ifdef STACK_REGS
4884 regstack_completed = 0;
4885#endif
ef330312
PB
4886
4887 /* Clear out the insn_length contents now that they are no
4888 longer valid. */
4889 init_insn_lengths ();
4890
4891 /* Show no temporary slots allocated. */
4892 init_temp_slots ();
4893
ef330312
PB
4894 free_bb_for_insn ();
4895
c2e84327
DM
4896 if (cfun->gimple_df)
4897 delete_tree_ssa (cfun);
55b34b5f 4898
051f8cc6
JH
4899 /* We can reduce stack alignment on call site only when we are sure that
4900 the function body just produced will be actually used in the final
4901 executable. */
4902 if (decl_binds_to_current_def_p (current_function_decl))
ef330312 4903 {
17b29c0a 4904 unsigned int pref = crtl->preferred_stack_boundary;
cb91fab0
JH
4905 if (crtl->stack_alignment_needed > crtl->preferred_stack_boundary)
4906 pref = crtl->stack_alignment_needed;
3dafb85c
ML
4907 cgraph_node::rtl_info (current_function_decl)
4908 ->preferred_incoming_stack_boundary = pref;
ef330312
PB
4909 }
4910
4911 /* Make sure volatile mem refs aren't considered valid operands for
4912 arithmetic insns. We must call this here if this is a nested inline
4913 function, since the above code leaves us in the init_recog state,
4914 and the function context push/pop code does not save/restore volatile_ok.
4915
4916 ??? Maybe it isn't necessary for expand_start_function to call this
4917 anymore if we do it here? */
4918
4919 init_recog_no_volatile ();
4920
4921 /* We're done with this function. Free up memory if we can. */
4922 free_after_parsing (cfun);
4923 free_after_compilation (cfun);
c2924966 4924 return 0;
ef330312
PB
4925}
4926
27a4cd48
DM
4927namespace {
4928
4929const pass_data pass_data_clean_state =
ef330312 4930{
27a4cd48
DM
4931 RTL_PASS, /* type */
4932 "*clean_state", /* name */
4933 OPTGROUP_NONE, /* optinfo_flags */
27a4cd48
DM
4934 TV_FINAL, /* tv_id */
4935 0, /* properties_required */
4936 0, /* properties_provided */
4937 PROP_rtl, /* properties_destroyed */
4938 0, /* todo_flags_start */
4939 0, /* todo_flags_finish */
ef330312 4940};
27a4cd48
DM
4941
4942class pass_clean_state : public rtl_opt_pass
4943{
4944public:
c3284718
RS
4945 pass_clean_state (gcc::context *ctxt)
4946 : rtl_opt_pass (pass_data_clean_state, ctxt)
27a4cd48
DM
4947 {}
4948
4949 /* opt_pass methods: */
be55bfe6
TS
4950 virtual unsigned int execute (function *)
4951 {
4952 return rest_of_clean_state ();
4953 }
27a4cd48
DM
4954
4955}; // class pass_clean_state
4956
4957} // anon namespace
4958
4959rtl_opt_pass *
4960make_pass_clean_state (gcc::context *ctxt)
4961{
4962 return new pass_clean_state (ctxt);
4963}
27c07cc5 4964
026c3cfd 4965/* Return true if INSN is a call to the current function. */
26e288ba
TV
4966
4967static bool
fa7af581 4968self_recursive_call_p (rtx_insn *insn)
26e288ba
TV
4969{
4970 tree fndecl = get_call_fndecl (insn);
4971 return (fndecl == current_function_decl
4972 && decl_binds_to_current_def_p (fndecl));
4973}
4974
27c07cc5
RO
4975/* Collect hard register usage for the current function. */
4976
4977static void
4978collect_fn_hard_reg_usage (void)
4979{
fa7af581 4980 rtx_insn *insn;
4b29b965 4981#ifdef STACK_REGS
27c07cc5 4982 int i;
4b29b965 4983#endif
27c07cc5 4984 struct cgraph_rtl_info *node;
53f2f6c1 4985 HARD_REG_SET function_used_regs;
27c07cc5
RO
4986
4987 /* ??? To be removed when all the ports have been fixed. */
4988 if (!targetm.call_fusage_contains_non_callee_clobbers)
4989 return;
4990
53f2f6c1 4991 CLEAR_HARD_REG_SET (function_used_regs);
27c07cc5
RO
4992
4993 for (insn = get_insns (); insn != NULL_RTX; insn = next_insn (insn))
4994 {
4995 HARD_REG_SET insn_used_regs;
4996
4997 if (!NONDEBUG_INSN_P (insn))
4998 continue;
4999
26e288ba
TV
5000 if (CALL_P (insn)
5001 && !self_recursive_call_p (insn))
6621ab68
TV
5002 {
5003 if (!get_call_reg_set_usage (insn, &insn_used_regs,
5004 call_used_reg_set))
5005 return;
27c07cc5 5006
6621ab68
TV
5007 IOR_HARD_REG_SET (function_used_regs, insn_used_regs);
5008 }
27c07cc5 5009
6621ab68 5010 find_all_hard_reg_sets (insn, &insn_used_regs, false);
53f2f6c1 5011 IOR_HARD_REG_SET (function_used_regs, insn_used_regs);
27c07cc5
RO
5012 }
5013
5014 /* Be conservative - mark fixed and global registers as used. */
53f2f6c1 5015 IOR_HARD_REG_SET (function_used_regs, fixed_reg_set);
27c07cc5
RO
5016
5017#ifdef STACK_REGS
5018 /* Handle STACK_REGS conservatively, since the df-framework does not
5019 provide accurate information for them. */
5020
5021 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
53f2f6c1 5022 SET_HARD_REG_BIT (function_used_regs, i);
27c07cc5
RO
5023#endif
5024
5fea8186
TV
5025 /* The information we have gathered is only interesting if it exposes a
5026 register from the call_used_regs that is not used in this function. */
5027 if (hard_reg_set_subset_p (call_used_reg_set, function_used_regs))
5028 return;
5029
3dafb85c 5030 node = cgraph_node::rtl_info (current_function_decl);
53f2f6c1
TV
5031 gcc_assert (node != NULL);
5032
5033 COPY_HARD_REG_SET (node->function_used_regs, function_used_regs);
27c07cc5
RO
5034 node->function_used_regs_valid = 1;
5035}
5036
5037/* Get the declaration of the function called by INSN. */
5038
5039static tree
fa7af581 5040get_call_fndecl (rtx_insn *insn)
27c07cc5
RO
5041{
5042 rtx note, datum;
5043
5044 note = find_reg_note (insn, REG_CALL_DECL, NULL_RTX);
5045 if (note == NULL_RTX)
5046 return NULL_TREE;
5047
5048 datum = XEXP (note, 0);
5049 if (datum != NULL_RTX)
5050 return SYMBOL_REF_DECL (datum);
5051
5052 return NULL_TREE;
5053}
5054
5055/* Return the cgraph_rtl_info of the function called by INSN. Returns NULL for
5056 call targets that can be overwritten. */
5057
5058static struct cgraph_rtl_info *
fa7af581 5059get_call_cgraph_rtl_info (rtx_insn *insn)
27c07cc5
RO
5060{
5061 tree fndecl;
5062
5063 if (insn == NULL_RTX)
5064 return NULL;
5065
5066 fndecl = get_call_fndecl (insn);
5067 if (fndecl == NULL_TREE
5068 || !decl_binds_to_current_def_p (fndecl))
5069 return NULL;
5070
3dafb85c 5071 return cgraph_node::rtl_info (fndecl);
27c07cc5
RO
5072}
5073
5074/* Find hard registers used by function call instruction INSN, and return them
5075 in REG_SET. Return DEFAULT_SET in REG_SET if not found. */
5076
5077bool
86bf2d46 5078get_call_reg_set_usage (rtx_insn *insn, HARD_REG_SET *reg_set,
27c07cc5
RO
5079 HARD_REG_SET default_set)
5080{
1e288103 5081 if (flag_ipa_ra)
27c07cc5
RO
5082 {
5083 struct cgraph_rtl_info *node = get_call_cgraph_rtl_info (insn);
5084 if (node != NULL
5085 && node->function_used_regs_valid)
5086 {
5087 COPY_HARD_REG_SET (*reg_set, node->function_used_regs);
5088 AND_HARD_REG_SET (*reg_set, default_set);
5089 return true;
5090 }
5091 }
5092
5093 COPY_HARD_REG_SET (*reg_set, default_set);
5094 return false;
5095}